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-rw-r--r--src/devices/cpu/8x300/8x300.h5
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.cpp26
-rw-r--r--src/devices/cpu/adsp2100/adsp2100.h13
-rw-r--r--src/devices/cpu/alpha/alpha.h13
-rw-r--r--src/devices/cpu/alto2/a2disp.cpp2
-rw-r--r--src/devices/cpu/alto2/a2disp.h36
-rw-r--r--src/devices/cpu/alto2/a2emu.cpp4
-rw-r--r--src/devices/cpu/alto2/a2ether.cpp2
-rw-r--r--src/devices/cpu/alto2/a2ether.h78
-rw-r--r--src/devices/cpu/alto2/a2mem.cpp18
-rw-r--r--src/devices/cpu/alto2/a2mem.h26
-rw-r--r--src/devices/cpu/alto2/alto2cpu.h13
-rw-r--r--src/devices/cpu/am29000/am29000.cpp2
-rw-r--r--src/devices/cpu/am29000/am29000.h5
-rw-r--r--src/devices/cpu/amis2000/amis2000.cpp2
-rw-r--r--src/devices/cpu/amis2000/amis2000.h17
-rw-r--r--src/devices/cpu/amis2000/amis2000d.cpp21
-rw-r--r--src/devices/cpu/amis2000/amis2000d.h13
-rw-r--r--src/devices/cpu/apexc/apexc.cpp6
-rw-r--r--src/devices/cpu/apexc/apexc.h5
-rw-r--r--src/devices/cpu/arc/arc.h5
-rw-r--r--src/devices/cpu/arcompact/arcompact.h7
-rw-r--r--src/devices/cpu/arcompact/arcompact_execute.cpp8
-rw-r--r--src/devices/cpu/arm/arm.h5
-rw-r--r--src/devices/cpu/arm7/ap2010cpu.cpp4
-rw-r--r--src/devices/cpu/arm7/ap2010cpu.h1
-rw-r--r--src/devices/cpu/arm7/arm7.cpp90
-rw-r--r--src/devices/cpu/arm7/arm7.h131
-rw-r--r--src/devices/cpu/arm7/arm7core.h107
-rw-r--r--src/devices/cpu/arm7/arm7core.hxx14
-rw-r--r--src/devices/cpu/arm7/arm7dasm.cpp4
-rw-r--r--src/devices/cpu/arm7/arm7dasm.h4
-rw-r--r--src/devices/cpu/arm7/arm7drc.hxx8
-rw-r--r--src/devices/cpu/arm7/arm7fe.hxx2
-rw-r--r--src/devices/cpu/arm7/lpc210x.cpp3
-rw-r--r--src/devices/cpu/arm7/lpc210x.h17
-rw-r--r--src/devices/cpu/arm7/upd800468.cpp3
-rw-r--r--src/devices/cpu/arm7/upd800468.h15
-rw-r--r--src/devices/cpu/asap/asap.cpp13
-rw-r--r--src/devices/cpu/asap/asap.h5
-rw-r--r--src/devices/cpu/avr8/avr8.cpp49
-rw-r--r--src/devices/cpu/avr8/avr8.h33
-rw-r--r--src/devices/cpu/avr8/avr8ops.hxx47
-rw-r--r--src/devices/cpu/axc51/axc51.h26
-rw-r--r--src/devices/cpu/axc51/axc51dasm.h7
-rw-r--r--src/devices/cpu/bcp/dp8344.h5
-rw-r--r--src/devices/cpu/c33/c33common.h29
-rw-r--r--src/devices/cpu/c33/c33dasm.cpp674
-rw-r--r--src/devices/cpu/c33/c33dasm.h37
-rw-r--r--src/devices/cpu/c33/c33helpers.ipp64
-rw-r--r--src/devices/cpu/c33/c33std.cpp117
-rw-r--r--src/devices/cpu/c33/c33std.h58
-rw-r--r--src/devices/cpu/c33/s1c33209.cpp331
-rw-r--r--src/devices/cpu/c33/s1c33209.h57
-rw-r--r--src/devices/cpu/capricorn/capricorn.h12
-rw-r--r--src/devices/cpu/ccpu/ccpu.cpp32
-rw-r--r--src/devices/cpu/ccpu/ccpu.h51
-rw-r--r--src/devices/cpu/cdc160/cdc160d.cpp379
-rw-r--r--src/devices/cpu/cdc160/cdc160d.h34
-rw-r--r--src/devices/cpu/clipper/clipper.cpp5
-rw-r--r--src/devices/cpu/clipper/clipper.h7
-rw-r--r--src/devices/cpu/clipper/clipperd.h6
-rw-r--r--src/devices/cpu/cop400/cop400.cpp28
-rw-r--r--src/devices/cpu/cop400/cop400.h25
-rw-r--r--src/devices/cpu/cop400/cop410ds.h6
-rw-r--r--src/devices/cpu/cop400/cop420ds.h6
-rw-r--r--src/devices/cpu/cop400/cop424ds.h6
-rw-r--r--src/devices/cpu/cop400/cop444ds.h6
-rw-r--r--src/devices/cpu/cops1/cops1base.h6
-rw-r--r--src/devices/cpu/cops1/cops1d.cpp12
-rw-r--r--src/devices/cpu/cops1/cops1d.h14
-rw-r--r--src/devices/cpu/cops1/mm5799.h8
-rw-r--r--src/devices/cpu/cops1/mm5799op.cpp2
-rw-r--r--src/devices/cpu/cosmac/cosdasm.cpp6
-rw-r--r--src/devices/cpu/cosmac/cosmac.cpp54
-rw-r--r--src/devices/cpu/cosmac/cosmac.h17
-rw-r--r--src/devices/cpu/cp1610/1610dasm.h6
-rw-r--r--src/devices/cpu/cp1610/cp1610.cpp2
-rw-r--r--src/devices/cpu/cp1610/cp1610.h7
-rw-r--r--src/devices/cpu/cr16b/cr16b.h4
-rw-r--r--src/devices/cpu/cubeqcpu/cubeqcpu.h15
-rw-r--r--src/devices/cpu/diablo/diablo1300.h7
-rw-r--r--src/devices/cpu/drcbearm64.cpp5071
-rw-r--r--src/devices/cpu/drcbearm64.h26
-rw-r--r--src/devices/cpu/drcbec.cpp912
-rw-r--r--src/devices/cpu/drcbec.h57
-rw-r--r--src/devices/cpu/drcbeut.cpp271
-rw-r--r--src/devices/cpu/drcbeut.h148
-rw-r--r--src/devices/cpu/drcbex64.cpp3646
-rw-r--r--src/devices/cpu/drcbex64.h290
-rw-r--r--src/devices/cpu/drcbex86.cpp2819
-rw-r--r--src/devices/cpu/drcbex86.h287
-rw-r--r--src/devices/cpu/drcuml.cpp678
-rw-r--r--src/devices/cpu/drcuml.h11
-rw-r--r--src/devices/cpu/drcumlsh.h30
-rw-r--r--src/devices/cpu/dsp16/dsp16.cpp4
-rw-r--r--src/devices/cpu/dsp16/dsp16.h13
-rw-r--r--src/devices/cpu/dsp32/dsp32.cpp12
-rw-r--r--src/devices/cpu/dsp32/dsp32.h5
-rw-r--r--src/devices/cpu/dsp56000/dsp56000.h5
-rw-r--r--src/devices/cpu/dsp56156/dsp56156.cpp6
-rw-r--r--src/devices/cpu/dsp56156/dsp56156.h93
-rw-r--r--src/devices/cpu/dsp56156/dsp56def.h12
-rw-r--r--src/devices/cpu/dsp56156/dsp56dsm.h6
-rw-r--r--src/devices/cpu/dsp56156/dsp56ops.hxx4
-rw-r--r--src/devices/cpu/dsp56156/dsp56pcu.cpp4
-rw-r--r--src/devices/cpu/dsp56156/dsp56pcu.h12
-rw-r--r--src/devices/cpu/dsp56156/inst.cpp7
-rw-r--r--src/devices/cpu/dsp56156/inst.h15
-rw-r--r--src/devices/cpu/dsp56156/opcode.h6
-rw-r--r--src/devices/cpu/dsp56156/pmove.h15
-rw-r--r--src/devices/cpu/dsp56156/tables.h19
-rw-r--r--src/devices/cpu/dspp/dspp.cpp2
-rw-r--r--src/devices/cpu/dspp/dspp.h8
-rw-r--r--src/devices/cpu/dspp/dsppdrc.cpp2
-rw-r--r--src/devices/cpu/dspp/dsppfe.h9
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.cpp21
-rw-r--r--src/devices/cpu/e0c6200/e0c6200.h6
-rw-r--r--src/devices/cpu/e0c6200/e0c6200d.cpp43
-rw-r--r--src/devices/cpu/e0c6200/e0c6200d.h28
-rw-r--r--src/devices/cpu/e0c6200/e0c6200op.cpp5
-rw-r--r--src/devices/cpu/e0c6200/e0c6s46.cpp317
-rw-r--r--src/devices/cpu/e0c6200/e0c6s46.h94
-rw-r--r--src/devices/cpu/e132xs/32xsdasm.cpp2048
-rw-r--r--src/devices/cpu/e132xs/32xsdasm.h27
-rw-r--r--src/devices/cpu/e132xs/32xsdefs.h179
-rw-r--r--src/devices/cpu/e132xs/e132xs.cpp1645
-rw-r--r--src/devices/cpu/e132xs/e132xs.h671
-rw-r--r--src/devices/cpu/e132xs/e132xsdrc.cpp1040
-rw-r--r--src/devices/cpu/e132xs/e132xsdrc_ops.hxx5674
-rw-r--r--src/devices/cpu/e132xs/e132xsfe.cpp359
-rw-r--r--src/devices/cpu/e132xs/e132xsfe.h20
-rw-r--r--src/devices/cpu/e132xs/e132xsop.hxx1135
-rw-r--r--src/devices/cpu/es5510/es5510.cpp18
-rw-r--r--src/devices/cpu/es5510/es5510.h5
-rw-r--r--src/devices/cpu/es5510/es5510d.h6
-rw-r--r--src/devices/cpu/esrip/esrip.cpp13
-rw-r--r--src/devices/cpu/esrip/esrip.h7
-rw-r--r--src/devices/cpu/evolution/evo.h11
-rw-r--r--src/devices/cpu/f2mc16/f2mc16.cpp3091
-rw-r--r--src/devices/cpu/f2mc16/f2mc16.h222
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_adc.cpp304
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_adc.h72
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_clock.cpp355
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_clock.h74
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_intc.cpp269
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_intc.h64
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_port.cpp127
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_port.h57
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_ppg.cpp348
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_ppg.h70
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_reload.cpp381
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_reload.h75
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_uart.cpp456
-rw-r--r--src/devices/cpu/f2mc16/f2mc16_uart.h98
-rw-r--r--src/devices/cpu/f2mc16/f2mc16d.cpp14
-rw-r--r--src/devices/cpu/f2mc16/mb90570.cpp169
-rw-r--r--src/devices/cpu/f2mc16/mb90570.h55
-rw-r--r--src/devices/cpu/f2mc16/mb90610a.cpp138
-rw-r--r--src/devices/cpu/f2mc16/mb90610a.h59
-rw-r--r--src/devices/cpu/f2mc16/mb9061x.cpp442
-rw-r--r--src/devices/cpu/f2mc16/mb9061x.h115
-rw-r--r--src/devices/cpu/f2mc16/mb90640a.cpp134
-rw-r--r--src/devices/cpu/f2mc16/mb90640a.h52
-rw-r--r--src/devices/cpu/f8/f8.h7
-rw-r--r--src/devices/cpu/fr/fr.h6
-rw-r--r--src/devices/cpu/g65816/g65816.cpp166
-rw-r--r--src/devices/cpu/g65816/g65816.h22
-rw-r--r--src/devices/cpu/g65816/g65816cm.h21
-rw-r--r--src/devices/cpu/g65816/g65816ds.cpp29
-rw-r--r--src/devices/cpu/g65816/g65816ds.h41
-rw-r--r--src/devices/cpu/g65816/g65816o0.cpp2
-rw-r--r--src/devices/cpu/g65816/g65816o1.cpp2
-rw-r--r--src/devices/cpu/g65816/g65816o2.cpp2
-rw-r--r--src/devices/cpu/g65816/g65816o3.cpp2
-rw-r--r--src/devices/cpu/g65816/g65816o4.cpp2
-rw-r--r--src/devices/cpu/g65816/g65816op.ipp (renamed from src/devices/cpu/g65816/g65816op.h)41
-rw-r--r--src/devices/cpu/gigatron/gigatron.h24
-rw-r--r--src/devices/cpu/h16/hd641016.h8
-rw-r--r--src/devices/cpu/h6280/h6280.cpp17
-rw-r--r--src/devices/cpu/h6280/h6280.h11
-rw-r--r--src/devices/cpu/h8/c77.cpp216
-rw-r--r--src/devices/cpu/h8/c77.h95
-rw-r--r--src/devices/cpu/h8/gt913.cpp56
-rw-r--r--src/devices/cpu/h8/gt913.h43
-rw-r--r--src/devices/cpu/h8/gt913.lst8
-rw-r--r--src/devices/cpu/h8/h8.cpp620
-rw-r--r--src/devices/cpu/h8/h8.h332
-rw-r--r--src/devices/cpu/h8/h8.lst354
-rw-r--r--src/devices/cpu/h8/h83002.cpp47
-rw-r--r--src/devices/cpu/h8/h83002.h27
-rw-r--r--src/devices/cpu/h8/h83003.cpp51
-rw-r--r--src/devices/cpu/h8/h83003.h27
-rw-r--r--src/devices/cpu/h8/h83006.cpp44
-rw-r--r--src/devices/cpu/h8/h83006.h25
-rw-r--r--src/devices/cpu/h8/h83008.cpp39
-rw-r--r--src/devices/cpu/h8/h83008.h19
-rw-r--r--src/devices/cpu/h8/h83032.cpp49
-rw-r--r--src/devices/cpu/h8/h83032.h27
-rw-r--r--src/devices/cpu/h8/h83042.cpp50
-rw-r--r--src/devices/cpu/h8/h83042.h25
-rw-r--r--src/devices/cpu/h8/h83048.cpp53
-rw-r--r--src/devices/cpu/h8/h83048.h31
-rw-r--r--src/devices/cpu/h8/h83217.cpp282
-rw-r--r--src/devices/cpu/h8/h83217.h120
-rw-r--r--src/devices/cpu/h8/h8325.cpp252
-rw-r--r--src/devices/cpu/h8/h8325.h126
-rw-r--r--src/devices/cpu/h8/h83337.cpp103
-rw-r--r--src/devices/cpu/h8/h83337.h43
-rw-r--r--src/devices/cpu/h8/h8_adc.cpp76
-rw-r--r--src/devices/cpu/h8/h8_adc.h59
-rw-r--r--src/devices/cpu/h8/h8_dma.cpp12
-rw-r--r--src/devices/cpu/h8/h8_dma.h22
-rw-r--r--src/devices/cpu/h8/h8_dtc.cpp37
-rw-r--r--src/devices/cpu/h8/h8_dtc.h24
-rw-r--r--src/devices/cpu/h8/h8_intc.cpp295
-rw-r--r--src/devices/cpu/h8/h8_intc.h116
-rw-r--r--src/devices/cpu/h8/h8_port.cpp89
-rw-r--r--src/devices/cpu/h8/h8_port.h41
-rw-r--r--src/devices/cpu/h8/h8_sci.cpp704
-rw-r--r--src/devices/cpu/h8/h8_sci.h67
-rw-r--r--src/devices/cpu/h8/h8_timer16.cpp360
-rw-r--r--src/devices/cpu/h8/h8_timer16.h175
-rw-r--r--src/devices/cpu/h8/h8_timer8.cpp208
-rw-r--r--src/devices/cpu/h8/h8_timer8.h43
-rw-r--r--src/devices/cpu/h8/h8_watchdog.cpp77
-rw-r--r--src/devices/cpu/h8/h8_watchdog.h56
-rw-r--r--src/devices/cpu/h8/h8d.cpp4
-rw-r--r--src/devices/cpu/h8/h8h.cpp2
-rw-r--r--src/devices/cpu/h8/h8h.h51
-rw-r--r--src/devices/cpu/h8/h8hd.cpp2
-rw-r--r--src/devices/cpu/h8/h8s2000.cpp2
-rw-r--r--src/devices/cpu/h8/h8s2000.h20
-rw-r--r--src/devices/cpu/h8/h8s2000d.cpp2
-rw-r--r--src/devices/cpu/h8/h8s2245.cpp118
-rw-r--r--src/devices/cpu/h8/h8s2245.h35
-rw-r--r--src/devices/cpu/h8/h8s2319.cpp473
-rw-r--r--src/devices/cpu/h8/h8s2319.h164
-rw-r--r--src/devices/cpu/h8/h8s2320.h181
-rw-r--r--src/devices/cpu/h8/h8s2329.cpp179
-rw-r--r--src/devices/cpu/h8/h8s2329.h121
-rw-r--r--src/devices/cpu/h8/h8s2357.cpp167
-rw-r--r--src/devices/cpu/h8/h8s2357.h31
-rw-r--r--src/devices/cpu/h8/h8s2600.cpp17
-rw-r--r--src/devices/cpu/h8/h8s2600.h7
-rw-r--r--src/devices/cpu/h8/h8s2600d.cpp2
-rw-r--r--src/devices/cpu/h8/h8s2655.cpp172
-rw-r--r--src/devices/cpu/h8/h8s2655.h23
-rw-r--r--src/devices/cpu/h8/swx00.cpp (renamed from src/devices/cpu/h8/h8s2320.cpp)379
-rw-r--r--src/devices/cpu/h8/swx00.h152
-rw-r--r--src/devices/cpu/h8500/h8500.cpp14
-rw-r--r--src/devices/cpu/h8500/h8500.h8
-rw-r--r--src/devices/cpu/h8500/h8510.h2
-rw-r--r--src/devices/cpu/h8500/h8520.cpp1
-rw-r--r--src/devices/cpu/h8500/h8520.h2
-rw-r--r--src/devices/cpu/h8500/h8532.cpp1
-rw-r--r--src/devices/cpu/h8500/h8532.h2
-rw-r--r--src/devices/cpu/h8500/h8534.cpp2
-rw-r--r--src/devices/cpu/h8500/h8534.h6
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.cpp683
-rw-r--r--src/devices/cpu/hcd62121/hcd62121.h29
-rw-r--r--src/devices/cpu/hcd62121/hcd62121d.cpp48
-rw-r--r--src/devices/cpu/hcd62121/hcd62121d.h2
-rw-r--r--src/devices/cpu/hd61700/hd61700.cpp9
-rw-r--r--src/devices/cpu/hd61700/hd61700.h5
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.cpp731
-rw-r--r--src/devices/cpu/hmcs40/hmcs40.h198
-rw-r--r--src/devices/cpu/hmcs40/hmcs40d.cpp31
-rw-r--r--src/devices/cpu/hmcs40/hmcs40d.h22
-rw-r--r--src/devices/cpu/hmcs40/hmcs40op.cpp83
-rw-r--r--src/devices/cpu/hmcs400/hmcs400.cpp1024
-rw-r--r--src/devices/cpu/hmcs400/hmcs400.h557
-rw-r--r--src/devices/cpu/hmcs400/hmcs400d.cpp237
-rw-r--r--src/devices/cpu/hmcs400/hmcs400d.h31
-rw-r--r--src/devices/cpu/hmcs400/hmcs400op.cpp692
-rw-r--r--src/devices/cpu/hpc/hpc.h8
-rw-r--r--src/devices/cpu/hphybrid/hphybrid.h11
-rw-r--r--src/devices/cpu/ht1130/ht1130.cpp1
-rw-r--r--src/devices/cpu/ht1130/ht1130.h13
-rw-r--r--src/devices/cpu/i386/athlon.h4
-rw-r--r--src/devices/cpu/i386/cycles.h8
-rw-r--r--src/devices/cpu/i386/i386.cpp5
-rw-r--r--src/devices/cpu/i386/i386.h46
-rw-r--r--src/devices/cpu/i386/i386op16.hxx10
-rw-r--r--src/devices/cpu/i386/i386op32.hxx10
-rw-r--r--src/devices/cpu/i386/i386ops.hxx2
-rw-r--r--src/devices/cpu/i386/i386priv.h10
-rw-r--r--src/devices/cpu/i386/i386segs.hxx70
-rw-r--r--src/devices/cpu/i386/pentops.hxx602
-rw-r--r--src/devices/cpu/i386/x87priv.h8
-rw-r--r--src/devices/cpu/i8008/i8008.cpp2
-rw-r--r--src/devices/cpu/i8008/i8008.h4
-rw-r--r--src/devices/cpu/i8085/i8085.cpp149
-rw-r--r--src/devices/cpu/i8085/i8085.h33
-rw-r--r--src/devices/cpu/i8089/i8089.h6
-rw-r--r--src/devices/cpu/i8089/i8089_channel.h10
-rw-r--r--src/devices/cpu/i8089/i8089_dasm.h6
-rw-r--r--src/devices/cpu/i86/i186.cpp36
-rw-r--r--src/devices/cpu/i86/i186.h10
-rw-r--r--src/devices/cpu/i86/i286.cpp15
-rw-r--r--src/devices/cpu/i86/i286.h5
-rw-r--r--src/devices/cpu/i86/i86.cpp30
-rw-r--r--src/devices/cpu/i86/i86.h9
-rw-r--r--src/devices/cpu/i860/i860.h6
-rw-r--r--src/devices/cpu/i860/i860dec.hxx7
-rw-r--r--src/devices/cpu/i960/i960.cpp4
-rw-r--r--src/devices/cpu/i960/i960.h5
-rw-r--r--src/devices/cpu/i960/i960dis.cpp8
-rw-r--r--src/devices/cpu/ie15/ie15.cpp4
-rw-r--r--src/devices/cpu/ie15/ie15.h4
-rw-r--r--src/devices/cpu/jaguar/jaguar.cpp2
-rw-r--r--src/devices/cpu/jaguar/jaguar.h12
-rw-r--r--src/devices/cpu/ks0164/ks0164.cpp5
-rw-r--r--src/devices/cpu/ks0164/ks0164.h5
-rw-r--r--src/devices/cpu/lc8670/lc8670.cpp8
-rw-r--r--src/devices/cpu/lc8670/lc8670.h7
-rw-r--r--src/devices/cpu/lh5801/5801dasm.cpp4
-rw-r--r--src/devices/cpu/lh5801/lh5801.cpp3
-rw-r--r--src/devices/cpu/lh5801/lh5801.h5
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-rw-r--r--src/devices/cpu/sh/sh3comn.h81
-rw-r--r--src/devices/cpu/sh/sh4.cpp2032
-rw-r--r--src/devices/cpu/sh/sh4.h1553
-rw-r--r--src/devices/cpu/sh/sh4comn.cpp2607
-rw-r--r--src/devices/cpu/sh/sh4comn.h8
-rw-r--r--src/devices/cpu/sh/sh4dmac.cpp330
-rw-r--r--src/devices/cpu/sh/sh4dmac.h35
-rw-r--r--src/devices/cpu/sh/sh4fe.cpp8
-rw-r--r--src/devices/cpu/sh/sh4regs.h165
-rw-r--r--src/devices/cpu/sh/sh4tmu.cpp260
-rw-r--r--src/devices/cpu/sh/sh7014.h8
-rw-r--r--src/devices/cpu/sh/sh7014_bsc.h6
-rw-r--r--src/devices/cpu/sh/sh7014_dmac.h14
-rw-r--r--src/devices/cpu/sh/sh7014_intc.h6
-rw-r--r--src/devices/cpu/sh/sh7014_mtu.h16
-rw-r--r--src/devices/cpu/sh/sh7014_port.h4
-rw-r--r--src/devices/cpu/sh/sh7014_sci.h6
-rw-r--r--src/devices/cpu/sh/sh7021.h6
-rw-r--r--src/devices/cpu/sh/sh7032.h6
-rw-r--r--src/devices/cpu/sh/sh7042.cpp478
-rw-r--r--src/devices/cpu/sh/sh7042.h172
-rw-r--r--src/devices/cpu/sh/sh7604.h6
-rw-r--r--src/devices/cpu/sh/sh7604_bus.h6
-rw-r--r--src/devices/cpu/sh/sh7604_sci.h6
-rw-r--r--src/devices/cpu/sh/sh7604_wdt.h13
-rw-r--r--src/devices/cpu/sh/sh_adc.cpp342
-rw-r--r--src/devices/cpu/sh/sh_adc.h124
-rw-r--r--src/devices/cpu/sh/sh_bsc.cpp139
-rw-r--r--src/devices/cpu/sh/sh_bsc.h47
-rw-r--r--src/devices/cpu/sh/sh_cmt.cpp202
-rw-r--r--src/devices/cpu/sh/sh_cmt.h75
-rw-r--r--src/devices/cpu/sh/sh_dasm.cpp2
-rw-r--r--src/devices/cpu/sh/sh_dasm.h6
-rw-r--r--src/devices/cpu/sh/sh_dmac.cpp115
-rw-r--r--src/devices/cpu/sh/sh_dmac.h79
-rw-r--r--src/devices/cpu/sh/sh_intc.cpp151
-rw-r--r--src/devices/cpu/sh/sh_intc.h58
-rw-r--r--src/devices/cpu/sh/sh_mtu.cpp529
-rw-r--r--src/devices/cpu/sh/sh_mtu.h182
-rw-r--r--src/devices/cpu/sh/sh_port.cpp109
-rw-r--r--src/devices/cpu/sh/sh_port.h75
-rw-r--r--src/devices/cpu/sh/sh_sci.cpp765
-rw-r--r--src/devices/cpu/sh/sh_sci.h151
-rw-r--r--src/devices/cpu/sharc/compute.hxx12
-rw-r--r--src/devices/cpu/sharc/sharc.cpp39
-rw-r--r--src/devices/cpu/sharc/sharc.h9
-rw-r--r--src/devices/cpu/sharc/sharcdrc.cpp2
-rw-r--r--src/devices/cpu/sm510/sm500.cpp2
-rw-r--r--src/devices/cpu/sm510/sm500.h8
-rw-r--r--src/devices/cpu/sm510/sm500op.cpp3
-rw-r--r--src/devices/cpu/sm510/sm510.cpp2
-rw-r--r--src/devices/cpu/sm510/sm510.h4
-rw-r--r--src/devices/cpu/sm510/sm510base.cpp1
-rw-r--r--src/devices/cpu/sm510/sm510base.h5
-rw-r--r--src/devices/cpu/sm510/sm510d.cpp32
-rw-r--r--src/devices/cpu/sm510/sm510d.h33
-rw-r--r--src/devices/cpu/sm510/sm511.cpp2
-rw-r--r--src/devices/cpu/sm510/sm511.h8
-rw-r--r--src/devices/cpu/sm510/sm530.cpp2
-rw-r--r--src/devices/cpu/sm510/sm530.h8
-rw-r--r--src/devices/cpu/sm510/sm590.cpp2
-rw-r--r--src/devices/cpu/sm510/sm590.h16
-rw-r--r--src/devices/cpu/sm510/sm5a.cpp10
-rw-r--r--src/devices/cpu/sm510/sm5a.h11
-rw-r--r--src/devices/cpu/sm8500/sm8500.cpp5
-rw-r--r--src/devices/cpu/sm8500/sm8500.h5
-rw-r--r--src/devices/cpu/sparc/sparc.cpp26
-rw-r--r--src/devices/cpu/sparc/sparc.h31
-rw-r--r--src/devices/cpu/sparc/sparcdasm.h6
-rw-r--r--src/devices/cpu/sparc/sparcdefs.h8
-rw-r--r--src/devices/cpu/spc700/spc700.cpp1
-rw-r--r--src/devices/cpu/spc700/spc700.h5
-rw-r--r--src/devices/cpu/spc700/spc700ds.cpp1
-rw-r--r--src/devices/cpu/spc700/spc700ds.h9
-rw-r--r--src/devices/cpu/ssem/ssem.cpp11
-rw-r--r--src/devices/cpu/ssem/ssem.h7
-rw-r--r--src/devices/cpu/ssp1601/ssp1601.h5
-rw-r--r--src/devices/cpu/ssp1601/ssp1601d.h6
-rw-r--r--src/devices/cpu/st62xx/st62xx.cpp5
-rw-r--r--src/devices/cpu/st62xx/st62xx.h15
-rw-r--r--src/devices/cpu/st62xx/st62xx_dasm.h6
-rw-r--r--src/devices/cpu/st9/st905x.h6
-rw-r--r--src/devices/cpu/st9/st9dasm.cpp6
-rw-r--r--src/devices/cpu/superfx/superfx.cpp1
-rw-r--r--src/devices/cpu/superfx/superfx.h5
-rw-r--r--src/devices/cpu/t11/t11.cpp176
-rw-r--r--src/devices/cpu/t11/t11.h76
-rw-r--r--src/devices/cpu/t11/t11ops.hxx164
-rw-r--r--src/devices/cpu/t11/t11table.hxx2
-rw-r--r--src/devices/cpu/tlcs870/tlcs870.h7
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.cpp59
-rw-r--r--src/devices/cpu/tlcs90/tlcs90.h147
-rw-r--r--src/devices/cpu/tlcs90/tlcs90d.cpp91
-rw-r--r--src/devices/cpu/tlcs90/tlcs90d.h36
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.cpp48
-rw-r--r--src/devices/cpu/tlcs900/tlcs900.h15
-rw-r--r--src/devices/cpu/tlcs900/tmp94c241.cpp1332
-rw-r--r--src/devices/cpu/tlcs900/tmp94c241.h279
-rw-r--r--src/devices/cpu/tlcs900/tmp95c061.cpp503
-rw-r--r--src/devices/cpu/tlcs900/tmp95c061.h128
-rw-r--r--src/devices/cpu/tlcs900/tmp95c063.cpp556
-rw-r--r--src/devices/cpu/tlcs900/tmp95c063.h167
-rw-r--r--src/devices/cpu/tlcs900/tmp96c141.h6
-rw-r--r--src/devices/cpu/tms1000/smc1102.h5
-rw-r--r--src/devices/cpu/tms1000/tms0270.h6
-rw-r--r--src/devices/cpu/tms1000/tms0970.h6
-rw-r--r--src/devices/cpu/tms1000/tms0980.h8
-rw-r--r--src/devices/cpu/tms1000/tms1000.h10
-rw-r--r--src/devices/cpu/tms1000/tms1000c.h2
-rw-r--r--src/devices/cpu/tms1000/tms1100.h4
-rw-r--r--src/devices/cpu/tms1000/tms1400.h4
-rw-r--r--src/devices/cpu/tms1000/tms1k_base.h16
-rw-r--r--src/devices/cpu/tms1000/tms1k_dasm.cpp16
-rw-r--r--src/devices/cpu/tms1000/tms1k_dasm.h17
-rw-r--r--src/devices/cpu/tms1000/tms2100.h7
-rw-r--r--src/devices/cpu/tms1000/tms2400.h2
-rw-r--r--src/devices/cpu/tms1000/tp0320.h6
-rw-r--r--src/devices/cpu/tms32010/32010dsm.h6
-rw-r--r--src/devices/cpu/tms32010/tms32010.cpp481
-rw-r--r--src/devices/cpu/tms32010/tms32010.h84
-rw-r--r--src/devices/cpu/tms32025/tms32025.cpp748
-rw-r--r--src/devices/cpu/tms32025/tms32025.h120
-rw-r--r--src/devices/cpu/tms32031/32031ops.hxx4
-rw-r--r--src/devices/cpu/tms32031/tms32031.cpp15
-rw-r--r--src/devices/cpu/tms32031/tms32031.h17
-rw-r--r--src/devices/cpu/tms32051/tms32051.h15
-rw-r--r--src/devices/cpu/tms32082/tms32082.h14
-rw-r--r--src/devices/cpu/tms34010/34010ops.hxx40
-rw-r--r--src/devices/cpu/tms34010/tms34010.cpp27
-rw-r--r--src/devices/cpu/tms34010/tms34010.h13
-rw-r--r--src/devices/cpu/tms57002/tms57002.cpp28
-rw-r--r--src/devices/cpu/tms57002/tms57002.h9
-rw-r--r--src/devices/cpu/tms7000/tms7000.h25
-rw-r--r--src/devices/cpu/tms9900/9900dasm.h6
-rw-r--r--src/devices/cpu/tms9900/ti990_10.cpp5
-rw-r--r--src/devices/cpu/tms9900/ti990_10.h5
-rw-r--r--src/devices/cpu/tms9900/tms9900.cpp15
-rw-r--r--src/devices/cpu/tms9900/tms9900.h1
-rw-r--r--src/devices/cpu/tms9900/tms9980a.cpp9
-rw-r--r--src/devices/cpu/tms9900/tms9980a.h1
-rw-r--r--src/devices/cpu/tms9900/tms9995.cpp5
-rw-r--r--src/devices/cpu/tms9900/tms9995.h7
-rw-r--r--src/devices/cpu/tms9900/tms99com.h9
-rw-r--r--src/devices/cpu/tx0/tx0.cpp4
-rw-r--r--src/devices/cpu/tx0/tx0.h4
-rw-r--r--src/devices/cpu/ucom4/ucom4.cpp2
-rw-r--r--src/devices/cpu/ucom4/ucom4.h13
-rw-r--r--src/devices/cpu/ucom4/ucom4d.cpp18
-rw-r--r--src/devices/cpu/ucom4/ucom4d.h15
-rw-r--r--src/devices/cpu/uml.cpp1318
-rw-r--r--src/devices/cpu/uml.h136
-rw-r--r--src/devices/cpu/unsp/unsp.h11
-rw-r--r--src/devices/cpu/unsp/unspdrc.cpp2
-rw-r--r--src/devices/cpu/upd177x/upd177x.cpp792
-rw-r--r--src/devices/cpu/upd177x/upd177x.h124
-rw-r--r--src/devices/cpu/upd177x/upd177xd.cpp24
-rw-r--r--src/devices/cpu/upd177x/upd177xd.h2
-rw-r--r--src/devices/cpu/upd7725/upd7725.cpp51
-rw-r--r--src/devices/cpu/upd7725/upd7725.h41
-rw-r--r--src/devices/cpu/upd777/upd777.cpp1262
-rw-r--r--src/devices/cpu/upd777/upd777.h165
-rw-r--r--src/devices/cpu/upd777/upd777dasm.cpp504
-rw-r--r--src/devices/cpu/upd777/upd777dasm.h34
-rw-r--r--src/devices/cpu/upd7810/upd7810.cpp175
-rw-r--r--src/devices/cpu/upd7810/upd7810.h53
-rw-r--r--src/devices/cpu/upd7810/upd7810_dasm.h6
-rw-r--r--src/devices/cpu/upd7810/upd7810_opcodes.cpp17
-rw-r--r--src/devices/cpu/upd7810/upd7811.cpp37
-rw-r--r--src/devices/cpu/upd7810/upd7811.h28
-rw-r--r--src/devices/cpu/upd78k/upd78k0.h10
-rw-r--r--src/devices/cpu/upd78k/upd78k2.h12
-rw-r--r--src/devices/cpu/upd78k/upd78k2d.cpp4
-rw-r--r--src/devices/cpu/upd78k/upd78k3.h10
-rw-r--r--src/devices/cpu/upd78k/upd78k4.h10
-rw-r--r--src/devices/cpu/v30mz/v30mz.h11
-rw-r--r--src/devices/cpu/v60/op12.hxx85
-rw-r--r--src/devices/cpu/v60/op2.hxx20
-rw-r--r--src/devices/cpu/v60/v60.h6
-rw-r--r--src/devices/cpu/v620/v620dasm.h6
-rw-r--r--src/devices/cpu/v810/v810.h5
-rw-r--r--src/devices/cpu/vax/vax.cpp100
-rw-r--r--src/devices/cpu/vax/vax.h82
-rw-r--r--src/devices/cpu/vax/vaxdasm.cpp65
-rw-r--r--src/devices/cpu/vax/vaxdasm.h14
-rw-r--r--src/devices/cpu/vt50/vt50.h4
-rw-r--r--src/devices/cpu/vt61/vt61.h4
-rw-r--r--src/devices/cpu/we32000/we32100.h4
-rw-r--r--src/devices/cpu/xa/xa.cpp2651
-rw-r--r--src/devices/cpu/xa/xa.h968
-rw-r--r--src/devices/cpu/xa/xa_ops.cpp1926
-rw-r--r--src/devices/cpu/xa/xadasm.cpp1908
-rw-r--r--src/devices/cpu/xa/xadasm.h121
-rw-r--r--src/devices/cpu/xavix2/xavix2.cpp7
-rw-r--r--src/devices/cpu/xavix2/xavix2.h5
-rw-r--r--src/devices/cpu/xtensa/xtensa.h6
-rw-r--r--src/devices/cpu/z180/hd647180x.h6
-rw-r--r--src/devices/cpu/z180/z180.cpp29
-rw-r--r--src/devices/cpu/z180/z180.h15
-rw-r--r--src/devices/cpu/z180/z180asci.cpp12
-rw-r--r--src/devices/cpu/z180/z180asci.h8
-rw-r--r--src/devices/cpu/z180/z180csio.h6
-rw-r--r--src/devices/cpu/z180/z180dasm.cpp1
-rw-r--r--src/devices/cpu/z180/z180dasm.h1
-rw-r--r--src/devices/cpu/z180/z180dd.hxx3
-rw-r--r--src/devices/cpu/z180/z180op.hxx2
-rw-r--r--src/devices/cpu/z8/z8.cpp4
-rw-r--r--src/devices/cpu/z8/z8.h11
-rw-r--r--src/devices/cpu/z8/z8ops.hxx2
-rw-r--r--src/devices/cpu/z80/kc82.cpp4
-rw-r--r--src/devices/cpu/z80/kc82.h4
-rw-r--r--src/devices/cpu/z80/kl5c80a12.h10
-rw-r--r--src/devices/cpu/z80/kl5c80a16.h8
-rw-r--r--src/devices/cpu/z80/kp63.h4
-rw-r--r--src/devices/cpu/z80/kp64.h4
-rw-r--r--src/devices/cpu/z80/kp69.h8
-rw-r--r--src/devices/cpu/z80/ky80.h4
-rw-r--r--src/devices/cpu/z80/lz8420m.h6
-rw-r--r--src/devices/cpu/z80/nsc800.cpp87
-rw-r--r--src/devices/cpu/z80/nsc800.h38
-rw-r--r--src/devices/cpu/z80/r800.cpp69
-rw-r--r--src/devices/cpu/z80/r800.h15
-rw-r--r--src/devices/cpu/z80/r800dasm.cpp607
-rw-r--r--src/devices/cpu/z80/r800dasm.h39
-rw-r--r--src/devices/cpu/z80/t6a84.cpp237
-rw-r--r--src/devices/cpu/z80/t6a84.h96
-rw-r--r--src/devices/cpu/z80/tmpz84c011.h8
-rw-r--r--src/devices/cpu/z80/tmpz84c015.h6
-rw-r--r--src/devices/cpu/z80/z80.cpp3365
-rw-r--r--src/devices/cpu/z80/z80.h256
-rw-r--r--src/devices/cpu/z80/z80.inc67
-rw-r--r--src/devices/cpu/z80/z80.lst8987
-rw-r--r--src/devices/cpu/z80/z80dasm.cpp59
-rw-r--r--src/devices/cpu/z80/z80dasm.h8
-rw-r--r--src/devices/cpu/z80/z80make.py351
-rw-r--r--src/devices/cpu/z80/z80n.cpp49
-rw-r--r--src/devices/cpu/z80/z80n.h45
-rw-r--r--src/devices/cpu/z80/z80ndasm.cpp77
-rw-r--r--src/devices/cpu/z80/z80ndasm.h23
-rw-r--r--src/devices/cpu/z80/z84c015.cpp22
-rw-r--r--src/devices/cpu/z80/z84c015.h10
-rw-r--r--src/devices/cpu/z8000/z8000.cpp1
-rw-r--r--src/devices/cpu/z8000/z8000.h5
876 files changed, 168021 insertions, 105288 deletions
diff --git a/src/devices/cpu/8x300/8x300.h b/src/devices/cpu/8x300/8x300.h
index c4e36490b7f..82e82a89f92 100644
--- a/src/devices/cpu/8x300/8x300.h
+++ b/src/devices/cpu/8x300/8x300.h
@@ -55,8 +55,8 @@ protected:
n8x300_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_state_interface implementation
virtual void state_import(const device_state_entry &entry) override;
@@ -64,7 +64,6 @@ protected:
// device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface implementation
diff --git a/src/devices/cpu/adsp2100/adsp2100.cpp b/src/devices/cpu/adsp2100/adsp2100.cpp
index eb787a00a18..817cd2c6bea 100644
--- a/src/devices/cpu/adsp2100/adsp2100.cpp
+++ b/src/devices/cpu/adsp2100/adsp2100.cpp
@@ -1161,27 +1161,6 @@ uint32_t adsp21xx_device::execute_max_cycles() const noexcept
}
-//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t adsp2100_device::execute_input_lines() const noexcept
-{
- return 4;
-}
-
-uint32_t adsp2101_device::execute_input_lines() const noexcept
-{
- return 5;
-}
-
-uint32_t adsp2181_device::execute_input_lines() const noexcept
-{
- return 9;
-}
-
-
void adsp21xx_device::execute_set_input(int inputnum, int state)
{
// update the latched state
@@ -1196,12 +1175,13 @@ void adsp21xx_device::execute_set_input(int inputnum, int state)
void adsp21xx_device::execute_run()
{
// Return if CPU is halted
- if (current_input_state(INPUT_LINE_HALT)) {
+ if (input_line_state(INPUT_LINE_HALT)) {
+ debugger_wait_hook();
m_icount = 0;
return;
}
- bool check_debugger = ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) != 0);
+ const bool check_debugger = debugger_enabled();
check_irqs();
diff --git a/src/devices/cpu/adsp2100/adsp2100.h b/src/devices/cpu/adsp2100/adsp2100.h
index ca45c8756c8..bf50fbca7a3 100644
--- a/src/devices/cpu/adsp2100/adsp2100.h
+++ b/src/devices/cpu/adsp2100/adsp2100.h
@@ -213,8 +213,8 @@ protected:
adsp21xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
// device_execute_interface overrides
@@ -476,9 +476,6 @@ public:
adsp2100_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- // device_execute_interface overrides
- virtual uint32_t execute_input_lines() const noexcept override;
-
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -499,9 +496,6 @@ public:
protected:
adsp2101_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype);
- // device_execute_interface overrides
- virtual uint32_t execute_input_lines() const noexcept override;
-
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -520,9 +514,6 @@ public:
adsp2181_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- // device_execute_interface overrides
- virtual uint32_t execute_input_lines() const noexcept override;
-
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/alpha/alpha.h b/src/devices/cpu/alpha/alpha.h
index c37960c3127..60d0a83ca73 100644
--- a/src/devices/cpu/alpha/alpha.h
+++ b/src/devices/cpu/alpha/alpha.h
@@ -21,8 +21,8 @@ protected:
alpha_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
@@ -80,11 +80,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
-
- // device_execute_interface overrides
- virtual u32 execute_input_lines() const noexcept override { return 6; }
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void cpu_execute(u32 const op) override;
virtual bool cpu_translate(u64 &address, int intention) override;
@@ -256,7 +253,7 @@ public:
dec_21064_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual u32 icache_fetch(u64 const address) override;
diff --git a/src/devices/cpu/alto2/a2disp.cpp b/src/devices/cpu/alto2/a2disp.cpp
index 216542cfd67..5cc9e5cc300 100644
--- a/src/devices/cpu/alto2/a2disp.cpp
+++ b/src/devices/cpu/alto2/a2disp.cpp
@@ -499,7 +499,7 @@ void alto2_cpu_device::f2_late_evenfield()
*/
void alto2_cpu_device::init_disp()
{
- memset(&m_dsp, 0, sizeof(m_dsp));
+ m_dsp = decltype(m_dsp)();
save_item(NAME(m_dsp.state));
save_item(NAME(m_dsp.hlc));
save_item(NAME(m_dsp.setmode));
diff --git a/src/devices/cpu/alto2/a2disp.h b/src/devices/cpu/alto2/a2disp.h
index eee5af359b2..02c51435d5a 100644
--- a/src/devices/cpu/alto2/a2disp.h
+++ b/src/devices/cpu/alto2/a2disp.h
@@ -193,24 +193,24 @@
#ifndef MAME_CPU_ALTO2_A2DISP_H
#define MAME_CPU_ALTO2_A2DISP_H
struct {
- uint32_t state; //!< current state of the display_state_machine()
- uint32_t hlc; //!< horizontal line counter
- uint32_t setmode; //!< value written by last SETMODE<-
- uint32_t inverse; //!< set to 0xffff if line is inverse, 0x0000 otherwise
- uint32_t scanline; //!< current scanline
- bool halfclock; //!< false for normal pixel clock, true for half pixel clock
- bool vblank; //!< true during vblank, false otherwise
- uint16_t fifo[A2_DISP_FIFO]; //!< display word fifo
- uint32_t wa; //!< fifo input pointer (write address; 4-bit)
- uint32_t ra; //!< fifo output pointer (read address; 4-bit)
- uint32_t a63; //!< most recent value read from the PROM a63
- uint32_t a66; //!< most recent value read from the PROM a66
- bool dht_blocks; //!< set true, if the DHT executed BLOCK
- bool dwt_blocks; //!< set true, if the DWT executed BLOCK
- bool curt_blocks; //!< set true, if the CURT executed BLOCK
- bool curt_wakeup; //!< set true, if CURT wakeups are generated
- uint32_t xpreg; //!< cursor cursor x position register (10-bit)
- uint32_t csr; //!< cursor shift register (16-bit)
+ uint32_t state = 0; //!< current state of the display_state_machine()
+ uint32_t hlc = 0; //!< horizontal line counter
+ uint32_t setmode = 0; //!< value written by last SETMODE<-
+ uint32_t inverse = 0; //!< set to 0xffff if line is inverse, 0x0000 otherwise
+ uint32_t scanline = 0; //!< current scanline
+ bool halfclock = false; //!< false for normal pixel clock, true for half pixel clock
+ bool vblank = false; //!< true during vblank, false otherwise
+ uint16_t fifo[A2_DISP_FIFO] = { }; //!< display word fifo
+ uint32_t wa = 0; //!< fifo input pointer (write address; 4-bit)
+ uint32_t ra = 0; //!< fifo output pointer (read address; 4-bit)
+ uint32_t a63 = 0; //!< most recent value read from the PROM a63
+ uint32_t a66 = 0; //!< most recent value read from the PROM a66
+ bool dht_blocks = false; //!< set true, if the DHT executed BLOCK
+ bool dwt_blocks = false; //!< set true, if the DWT executed BLOCK
+ bool curt_blocks = false; //!< set true, if the CURT executed BLOCK
+ bool curt_wakeup = false; //!< set true, if CURT wakeups are generated
+ uint32_t xpreg = 0; //!< cursor cursor x position register (10-bit)
+ uint32_t csr = 0; //!< cursor shift register (16-bit)
std::unique_ptr<uint16_t[]> framebuf; //!< array of words of the raw bitmap that is displayed
std::unique_ptr<uint8_t[]> patterns; //!< array of 65536 patterns (16 bytes) with 1 byte per pixel
std::unique_ptr<bitmap_ind16> bitmap; //!< MAME bitmap with 16 bit indices
diff --git a/src/devices/cpu/alto2/a2emu.cpp b/src/devices/cpu/alto2/a2emu.cpp
index 22aaaadcb68..7b815f44e56 100644
--- a/src/devices/cpu/alto2/a2emu.cpp
+++ b/src/devices/cpu/alto2/a2emu.cpp
@@ -267,8 +267,8 @@ void alto2_cpu_device::f1_early_emu_block()
CPU_CLR_TASK_WAKEUP(m_task);
LOG((this,LOG_EMU,2, " BLOCK %02o:%s\n", m_task, task_name(m_task)));
#elif 0
- throw emu_fatalerror(1, "Emulator task want's to BLOCK.\n" \
- "%s-%04o: r:%02o af:%02o bs:%02o f1:%02o f2:%02o" \
+ throw emu_fatalerror(1, "Emulator task want's to BLOCK.\n"
+ "%s-%04o: r:%02o af:%02o bs:%02o f1:%02o f2:%02o"
" t:%o l:%o next:%05o next2:%05o cycle:%lld\n",
task_name(m_task), m_mpc,
m_rsel, m_daluf, m_dbs, m_df1, mdf2,
diff --git a/src/devices/cpu/alto2/a2ether.cpp b/src/devices/cpu/alto2/a2ether.cpp
index 87ee4268370..4bdd9b649a5 100644
--- a/src/devices/cpu/alto2/a2ether.cpp
+++ b/src/devices/cpu/alto2/a2ether.cpp
@@ -1307,7 +1307,7 @@ void alto2_cpu_device::update_tclk(int tclk)
void alto2_cpu_device::init_ether(int task)
{
// intialize all ethernet variables
- memset(&m_eth, 0, sizeof(m_eth));
+ m_eth = decltype(m_eth)();
save_item(NAME(m_eth.fifo));
save_item(NAME(m_eth.fifo_rd));
save_item(NAME(m_eth.fifo_wr));
diff --git a/src/devices/cpu/alto2/a2ether.h b/src/devices/cpu/alto2/a2ether.h
index 7d0ab567215..7ec4320c226 100644
--- a/src/devices/cpu/alto2/a2ether.h
+++ b/src/devices/cpu/alto2/a2ether.h
@@ -48,45 +48,45 @@ enum {
};
struct {
- uint32_t serin; //!< serial input shift registers 74164 #37 and #33
- uint16_t fifo[ALTO2_ETHER_FIFO_SIZE]; //!< FIFO buffer
- uint16_t fifo_rd; //!< FIFO input pointer
- uint16_t fifo_wr; //!< FIFO output pointer
- uint16_t status; //!< status word
- uint16_t rx_crc; //!< receiver CRC
- uint16_t tx_crc; //!< transmitter CRC
- uint32_t rx_count; //!< received words count
- uint32_t tx_count; //!< transmitted words count
- std::unique_ptr<uint16_t[]> rx_packet; //!< buffer to collect received words
- std::unique_ptr<uint16_t[]> tx_packet; //!< buffer to collect transmitted words
- emu_timer* rx_timer; //!< receiver timer
- emu_timer* tx_timer; //!< transmitter timer
- jkff_t ff_10a; //!< JK flip-flop 10a IBUSY (Sheet 13)
- jkff_t ff_10b; //!< JK flip-flop 10b OBUSY (Sheet 13)
- jkff_t ff_21a; //!< JK flip-flop 21a OUTON (Sheet 19)
- jkff_t ff_21b; //!< JK flip-flop 21b COLL (Sheet 19)
- jkff_t ff_31a; //!< JK flip-flop 31a OUTGONE (Sheet 19)
- jkff_t ff_31b; //!< JK flip-flop 31b OEOT (Sheet 19)
- jkff_t ff_35a; //!< JK flip-flop 35a OCMD (Sheet 7)
- jkff_t ff_35b; //!< JK flip-flop 35b ICMD (Sheet 7)
- jkff_t ff_47a; //!< JK flip-flop 47a ISR14 (Sheet 15)
- jkff_t ff_47b; //!< JK flip-flop 47b ISR15 (Sheet 15)
- jkff_t ff_51a; //!< JK flip-flop 51a EWFCT latch (Sheet 19)
- jkff_t ff_51b; //!< JK flip-flop 51b OCDW (Sheet 19)
- jkff_t ff_52b; //!< JK flip-flop 52b OSLOAD (Sheet 17)
- jkff_t ff_61a; //!< JK flip-flop 61a CRCGO (Sheet 21)
- jkff_t ff_61b; //!< JK flip-flop 61b OUTRGO (Sheet 21)
- jkff_t ff_62a; //!< JK flip-flop 62a OUTON (Sheet 21)
- jkff_t ff_62b; //!< JK flip-flop 62b OUTGO (Sheet 21)
- jkff_t ff_65a; //!< JK flip-flop 65a IDL (Sheet 10)
- jkff_t ff_65b; //!< JK flip-flop 65b IO (Sheet 10)
- jkff_t ff_69a; //!< JK flip-flop 69a IT (Sheet 14)
- jkff_t ff_69b; //!< JK flip-flop 69b INON (Sheet 14)
- jkff_t ff_70a; //!< JK flip-flop 70a IMID (Sheet 14)
- jkff_t ff_70b; //!< JK flip-flop 70b ILOC (Sheet 14)
- jkff_t ff_77a; //!< JK flip-flop 77a WR (Sheet 10)
- jkff_t ff_77b; //!< JK flip-flop 77b WLF (Sheet 10)
- int breath_of_life; //!< if non-zero, interval in seconds at which to broadcast the breath-of-life
+ uint32_t serin = 0; //!< serial input shift registers 74164 #37 and #33
+ uint16_t fifo[ALTO2_ETHER_FIFO_SIZE] = { }; //!< FIFO buffer
+ uint16_t fifo_rd = 0; //!< FIFO input pointer
+ uint16_t fifo_wr = 0; //!< FIFO output pointer
+ uint16_t status = 0; //!< status word
+ uint16_t rx_crc = 0; //!< receiver CRC
+ uint16_t tx_crc = 0; //!< transmitter CRC
+ uint32_t rx_count = 0; //!< received words count
+ uint32_t tx_count = 0; //!< transmitted words count
+ std::unique_ptr<uint16_t []> rx_packet; //!< buffer to collect received words
+ std::unique_ptr<uint16_t []> tx_packet; //!< buffer to collect transmitted words
+ emu_timer *rx_timer = nullptr; //!< receiver timer
+ emu_timer *tx_timer = nullptr; //!< transmitter timer
+ jkff_t ff_10a = JKFF_0; //!< JK flip-flop 10a IBUSY (Sheet 13)
+ jkff_t ff_10b = JKFF_0; //!< JK flip-flop 10b OBUSY (Sheet 13)
+ jkff_t ff_21a = JKFF_0; //!< JK flip-flop 21a OUTON (Sheet 19)
+ jkff_t ff_21b = JKFF_0; //!< JK flip-flop 21b COLL (Sheet 19)
+ jkff_t ff_31a = JKFF_0; //!< JK flip-flop 31a OUTGONE (Sheet 19)
+ jkff_t ff_31b = JKFF_0; //!< JK flip-flop 31b OEOT (Sheet 19)
+ jkff_t ff_35a = JKFF_0; //!< JK flip-flop 35a OCMD (Sheet 7)
+ jkff_t ff_35b = JKFF_0; //!< JK flip-flop 35b ICMD (Sheet 7)
+ jkff_t ff_47a = JKFF_0; //!< JK flip-flop 47a ISR14 (Sheet 15)
+ jkff_t ff_47b = JKFF_0; //!< JK flip-flop 47b ISR15 (Sheet 15)
+ jkff_t ff_51a = JKFF_0; //!< JK flip-flop 51a EWFCT latch (Sheet 19)
+ jkff_t ff_51b = JKFF_0; //!< JK flip-flop 51b OCDW (Sheet 19)
+ jkff_t ff_52b = JKFF_0; //!< JK flip-flop 52b OSLOAD (Sheet 17)
+ jkff_t ff_61a = JKFF_0; //!< JK flip-flop 61a CRCGO (Sheet 21)
+ jkff_t ff_61b = JKFF_0; //!< JK flip-flop 61b OUTRGO (Sheet 21)
+ jkff_t ff_62a = JKFF_0; //!< JK flip-flop 62a OUTON (Sheet 21)
+ jkff_t ff_62b = JKFF_0; //!< JK flip-flop 62b OUTGO (Sheet 21)
+ jkff_t ff_65a = JKFF_0; //!< JK flip-flop 65a IDL (Sheet 10)
+ jkff_t ff_65b = JKFF_0; //!< JK flip-flop 65b IO (Sheet 10)
+ jkff_t ff_69a = JKFF_0; //!< JK flip-flop 69a IT (Sheet 14)
+ jkff_t ff_69b = JKFF_0; //!< JK flip-flop 69b INON (Sheet 14)
+ jkff_t ff_70a = JKFF_0; //!< JK flip-flop 70a IMID (Sheet 14)
+ jkff_t ff_70b = JKFF_0; //!< JK flip-flop 70b ILOC (Sheet 14)
+ jkff_t ff_77a = JKFF_0; //!< JK flip-flop 77a WR (Sheet 10)
+ jkff_t ff_77b = JKFF_0; //!< JK flip-flop 77b WLF (Sheet 10)
+ int breath_of_life = 0; //!< if non-zero, interval in seconds at which to broadcast the breath-of-life
} m_eth;
TIMER_CALLBACK_MEMBER( rx_breath_of_life ); //!< HACK: pull the next word from the breath-of-life in the fifo
diff --git a/src/devices/cpu/alto2/a2mem.cpp b/src/devices/cpu/alto2/a2mem.cpp
index aff5fcdd908..e1887913318 100644
--- a/src/devices/cpu/alto2/a2mem.cpp
+++ b/src/devices/cpu/alto2/a2mem.cpp
@@ -807,7 +807,7 @@ void alto2_cpu_device::debug_write_mem(uint32_t addr, uint16_t data)
*/
void alto2_cpu_device::init_memory()
{
- memset(&m_mem, 0, sizeof(m_mem));
+ m_mem = decltype(m_mem)();
save_item(NAME(m_mem.mar));
save_item(NAME(m_mem.rmdd));
save_item(NAME(m_mem.wmdd));
@@ -826,23 +826,19 @@ void alto2_cpu_device::exit_memory()
void alto2_cpu_device::reset_memory()
{
- if (m_mem.ram) {
- m_mem.ram = nullptr;
- }
- if (m_mem.hpb) {
- m_mem.hpb = nullptr;
- }
+ m_mem.ram.reset();
+ m_mem.hpb.reset();
// allocate 64K or 128K words of main memory
- ioport_port* config = ioport(":CONFIG");
+ ioport_port *const config = ioport(":CONFIG");
m_mem.size = ALTO2_RAM_SIZE;
// config should be valid, unless the driver doesn't define it
if (config && 0 == config->read())
m_mem.size *= 2;
- logerror("Main memory %u KiB\n", static_cast<uint32_t>(sizeof(uint16_t) * m_mem.size / 1024));
+ logerror("Main memory %u KiB\n", sizeof(uint16_t) * m_mem.size / 1024);
- m_mem.ram = make_unique_clear<uint32_t[]>(sizeof(uint16_t) * m_mem.size);
- m_mem.hpb = make_unique_clear<uint8_t[]> (sizeof(uint16_t) * m_mem.size);
+ m_mem.ram = make_unique_clear<uint32_t []>(sizeof(uint16_t) * m_mem.size);
+ m_mem.hpb = make_unique_clear<uint8_t []> (sizeof(uint16_t) * m_mem.size);
// Initialize the hamming codes and parity bits
for (uint32_t addr = 0; addr < m_mem.size; addr++)
diff --git a/src/devices/cpu/alto2/a2mem.h b/src/devices/cpu/alto2/a2mem.h
index 3ce43a4da9f..f58d6aed5ae 100644
--- a/src/devices/cpu/alto2/a2mem.h
+++ b/src/devices/cpu/alto2/a2mem.h
@@ -25,14 +25,14 @@ enum {
};
struct {
- uint32_t size; //!< main memory size (64K or 128K)
- std::unique_ptr<uint32_t[]> ram; //!< main memory organized as double-words
- std::unique_ptr<uint8_t[]> hpb; //!< Hamming Code bits (6) and Parity bits (1) per double word
- uint32_t mar; //!< memory address register
- uint32_t rmdd; //!< read memory data double-word
- uint32_t wmdd; //!< write memory data double-word
- uint32_t md; //!< memory data register
- uint64_t cycle; //!< cycle when the memory address register was loaded
+ uint32_t size = 0; //!< main memory size (64K or 128K)
+ std::unique_ptr<uint32_t []> ram; //!< main memory organized as double-words
+ std::unique_ptr<uint8_t []> hpb; //!< Hamming Code bits (6) and Parity bits (1) per double word
+ uint32_t mar = 0; //!< memory address register
+ uint32_t rmdd = 0; //!< read memory data double-word
+ uint32_t wmdd = 0; //!< write memory data double-word
+ uint32_t md = 0; //!< memory data register
+ uint64_t cycle = 0; //!< cycle when the memory address register was loaded
/**
* @brief memory access under the way if non-zero
@@ -41,11 +41,11 @@ struct {
* 2: memory access even word (MEM_RAM)
* 3: memory access odd word (MEM_RAM | MEM_ODD)
*/
- int access;
- bool error; //!< non-zero after a memory error was detected
- uint32_t mear; //!< memory error address register
- uint32_t mesr; //!< memory error status register
- uint32_t mecr; //!< memory error control register
+ int access = 0;
+ bool error = false; //!< non-zero after a memory error was detected
+ uint32_t mear = 0; //!< memory error address register
+ uint32_t mesr = 0; //!< memory error status register
+ uint32_t mecr = 0; //!< memory error control register
} m_mem;
/**
diff --git a/src/devices/cpu/alto2/alto2cpu.h b/src/devices/cpu/alto2/alto2cpu.h
index c269737d2e6..d8817978ba8 100644
--- a/src/devices/cpu/alto2/alto2cpu.h
+++ b/src/devices/cpu/alto2/alto2cpu.h
@@ -207,9 +207,9 @@ public:
protected:
//! device-level override for start
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
//! device-level override for reset
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
//! device-level override for post reset
void interface_post_reset() override;
@@ -217,7 +217,6 @@ protected:
//! device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -225,7 +224,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
//! device (P)ROMs
- virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
//! device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -253,9 +252,9 @@ private:
std::unique_ptr<uint32_t[]> m_ucode_cram;
std::unique_ptr<uint16_t[]> m_const_data;
- void ucode_map(address_map &map);
- void const_map(address_map &map);
- void iomem_map(address_map &map);
+ void ucode_map(address_map &map) ATTR_COLD;
+ void const_map(address_map &map) ATTR_COLD;
+ void iomem_map(address_map &map) ATTR_COLD;
//! read microcode CROM or CRAM, depending on m_ucode_ram_base
uint32_t crom_cram_r(offs_t offset);
diff --git a/src/devices/cpu/am29000/am29000.cpp b/src/devices/cpu/am29000/am29000.cpp
index b66c5163e1e..d4039c18916 100644
--- a/src/devices/cpu/am29000/am29000.cpp
+++ b/src/devices/cpu/am29000/am29000.cpp
@@ -628,7 +628,7 @@ void am29000_cpu_device::fetch_decode()
void am29000_cpu_device::execute_run()
{
- uint32_t call_debugger = (machine().debug_flags & DEBUG_FLAG_ENABLED) != 0;
+ const bool call_debugger = debugger_enabled();
external_irq_check();
diff --git a/src/devices/cpu/am29000/am29000.h b/src/devices/cpu/am29000/am29000.h
index c19eeb8b9f2..d95efc1f587 100644
--- a/src/devices/cpu/am29000/am29000.h
+++ b/src/devices/cpu/am29000/am29000.h
@@ -440,13 +440,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 2; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/amis2000/amis2000.cpp b/src/devices/cpu/amis2000/amis2000.cpp
index f8daa91eca6..5911cb2543b 100644
--- a/src/devices/cpu/amis2000/amis2000.cpp
+++ b/src/devices/cpu/amis2000/amis2000.cpp
@@ -337,6 +337,6 @@ void amis2000_base_device::execute_run()
}
break; // 0xff
- } // big switch
+ } // 0xf0
}
}
diff --git a/src/devices/cpu/amis2000/amis2000.h b/src/devices/cpu/amis2000/amis2000.h
index e6f5a0f3236..18f6a8baf70 100644
--- a/src/devices/cpu/amis2000/amis2000.h
+++ b/src/devices/cpu/amis2000/amis2000.h
@@ -32,25 +32,24 @@ public:
// uncustomizable, but wildfire proves to be an exception to that rule.
void set_7seg_table(const u8 *ptr) { m_7seg_table = ptr; } // d0=A, d1=B, etc.
- void data_64x4(address_map &map);
- void data_80x4(address_map &map);
- void program_1_5k(address_map &map);
- void program_1k(address_map &map);
+ void data_64x4(address_map &map) ATTR_COLD;
+ void data_80x4(address_map &map) ATTR_COLD;
+ void program_1_5k(address_map &map) ATTR_COLD;
+ void program_1k(address_map &map) ATTR_COLD;
protected:
// construction/destruction
amis2000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 bu_bits, u8 callstack_bits, u8 callstack_depth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } // "
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2; }
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -192,8 +191,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// digital-to-frequency converter
u8 m_d2f_latch;
diff --git a/src/devices/cpu/amis2000/amis2000d.cpp b/src/devices/cpu/amis2000/amis2000d.cpp
index a9a3e5acb70..6f9d95d2a70 100644
--- a/src/devices/cpu/amis2000/amis2000d.cpp
+++ b/src/devices/cpu/amis2000/amis2000d.cpp
@@ -9,6 +9,19 @@
#include "emu.h"
#include "amis2000d.h"
+
+// common lookup tables
+
+enum amis2000_disassembler::e_mnemonics : unsigned
+{
+ mLAB = 0, mLAE, mLAI, mLBE, mLBEP, mLBF, mLBZ, mXAB, mXABU, mXAE,
+ mLAM, mXC, mXCI, mXCD, mSTM, mRSM,
+ mADD, mADCS, mADIS, mAND, mXOR, mCMA, mSTC, mRSC, mSF1, mRF1, mSF2, mRF2,
+ mSAM, mSZM, mSBE, mSZC, mSOS, mSZK, mSZI, mTF1, mTF2,
+ mPP, mJMP, mJMS, mRT, mRTS, mNOP, mHALT,
+ mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR
+};
+
const char *const amis2000_disassembler::s_mnemonics[] =
{
"LAB", "LAE", "LAI", "LBE", "LBEP", "LBF", "LBZ", "XAB", "XABU", "XAE",
@@ -83,6 +96,9 @@ const u8 amis2000_disassembler::s2000_mnemonic[0x100] =
mJMP, mJMP, mJMP, mJMP, mJMP, mJMP, mJMP, mJMP
};
+
+// disasm
+
offs_t amis2000_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
u8 op = opcodes.r8(pc);
@@ -112,8 +128,3 @@ offs_t amis2000_disassembler::disassemble(std::ostream &stream, offs_t pc, const
return 1 | s_flags[instr] | SUPPORTED;
}
-
-u32 amis2000_disassembler::opcode_alignment() const
-{
- return 1;
-}
diff --git a/src/devices/cpu/amis2000/amis2000d.h b/src/devices/cpu/amis2000/amis2000d.h
index 0de1a455fa8..abc9a6dd6a6 100644
--- a/src/devices/cpu/amis2000/amis2000d.h
+++ b/src/devices/cpu/amis2000/amis2000d.h
@@ -17,20 +17,11 @@ public:
amis2000_disassembler() = default;
virtual ~amis2000_disassembler() = default;
- virtual u32 opcode_alignment() const override;
+ virtual u32 opcode_alignment() const override { return 1; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum e_mnemonics
- {
- mLAB = 0, mLAE, mLAI, mLBE, mLBEP, mLBF, mLBZ, mXAB, mXABU, mXAE,
- mLAM, mXC, mXCI, mXCD, mSTM, mRSM,
- mADD, mADCS, mADIS, mAND, mXOR, mCMA, mSTC, mRSC, mSF1, mRF1, mSF2, mRF2,
- mSAM, mSZM, mSBE, mSZC, mSOS, mSZK, mSZI, mTF1, mTF2,
- mPP, mJMP, mJMS, mRT, mRTS, mNOP, mHALT,
- mINP, mOUT, mDISB, mDISN, mMVS, mPSH, mPSL, mEUR
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonics[];
static const s8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/apexc/apexc.cpp b/src/devices/cpu/apexc/apexc.cpp
index b38e66d7aeb..b5a908c2c4b 100644
--- a/src/devices/cpu/apexc/apexc.cpp
+++ b/src/devices/cpu/apexc/apexc.cpp
@@ -842,12 +842,14 @@ void apexc_cpu_device::execute_run()
{
do
{
- debugger_instruction_hook(m_pc);
-
if (m_running)
+ {
+ debugger_instruction_hook(m_pc);
execute();
+ }
else
{
+ debugger_wait_hook();
DELAY(m_icount); /* burn cycles once for all */
}
} while (m_icount > 0);
diff --git a/src/devices/cpu/apexc/apexc.h b/src/devices/cpu/apexc/apexc.h
index 84b44add940..6998a62dad4 100644
--- a/src/devices/cpu/apexc/apexc.h
+++ b/src/devices/cpu/apexc/apexc.h
@@ -28,13 +28,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 75; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/arc/arc.h b/src/devices/cpu/arc/arc.h
index fd4fa0582e1..dc00869bb44 100644
--- a/src/devices/cpu/arc/arc.h
+++ b/src/devices/cpu/arc/arc.h
@@ -25,13 +25,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/arcompact/arcompact.h b/src/devices/cpu/arcompact/arcompact.h
index 3069684449f..714e0f1ebeb 100644
--- a/src/devices/cpu/arcompact/arcompact.h
+++ b/src/devices/cpu/arcompact/arcompact.h
@@ -22,13 +22,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -43,7 +42,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void arcompact_auxreg_map(address_map &map);
+ void arcompact_auxreg_map(address_map &map) ATTR_COLD;
uint32_t arcompact_auxreg002_LPSTART_r();
diff --git a/src/devices/cpu/arcompact/arcompact_execute.cpp b/src/devices/cpu/arcompact/arcompact_execute.cpp
index f6bc43a8b6b..875c12d6543 100644
--- a/src/devices/cpu/arcompact/arcompact_execute.cpp
+++ b/src/devices/cpu/arcompact/arcompact_execute.cpp
@@ -98,16 +98,18 @@ void arcompact_device::execute_run()
{
while (m_icount > 0)
{
- debugger_instruction_hook(m_pc);
-
if (!m_delayactive)
{
check_interrupts();
}
// make sure CPU isn't in 'SLEEP' mode
- if (!debugreg_check_ZZ())
+ if (debugreg_check_ZZ())
+ debugger_wait_hook();
+ else
{
+ debugger_instruction_hook(m_pc);
+
if (m_delayactive)
{
uint16_t op = READ16((m_pc + 0));
diff --git a/src/devices/cpu/arm/arm.h b/src/devices/cpu/arm/arm.h
index aeafa3c0d7b..072ae9b7583 100644
--- a/src/devices/cpu/arm/arm.h
+++ b/src/devices/cpu/arm/arm.h
@@ -44,13 +44,12 @@ protected:
arm_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 3; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/arm7/ap2010cpu.cpp b/src/devices/cpu/arm7/ap2010cpu.cpp
index 19101e80f6b..0a2b1f97264 100644
--- a/src/devices/cpu/arm7/ap2010cpu.cpp
+++ b/src/devices/cpu/arm7/ap2010cpu.cpp
@@ -7,9 +7,11 @@
***************************************************************************/
#include "emu.h"
-
#include "ap2010cpu.h"
+#include "arm7core.h"
+
+
DEFINE_DEVICE_TYPE(AP2010CPU, ap2010cpu_device, "ap2010cpu", "AP2010 CPU")
ap2010cpu_device::ap2010cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
diff --git a/src/devices/cpu/arm7/ap2010cpu.h b/src/devices/cpu/arm7/ap2010cpu.h
index 82b908fbf02..3cf0a3c53dd 100644
--- a/src/devices/cpu/arm7/ap2010cpu.h
+++ b/src/devices/cpu/arm7/ap2010cpu.h
@@ -12,7 +12,6 @@
#pragma once
#include "arm7.h"
-#include "arm7core.h"
class ap2010cpu_device : public arm7_cpu_device
{
diff --git a/src/devices/cpu/arm7/arm7.cpp b/src/devices/cpu/arm7/arm7.cpp
index 7f479a668d4..46ffa46e41a 100644
--- a/src/devices/cpu/arm7/arm7.cpp
+++ b/src/devices/cpu/arm7/arm7.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
- * arm7.c
+ * arm7.cpp
* Portable CPU Emulator for 32-bit ARM v3/4/5/6
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
* Thumb, DSP, and MMU support and many bugfixes by R. Belmont and Ryan Holtz.
*
* This work is based on:
@@ -31,12 +31,16 @@ TODO:
*****************************************************************************/
#include "emu.h"
-#include "debug/debugcon.h"
-#include "debugger.h"
#include "arm7.h"
+
#include "arm7core.h" //include arm7 core
#include "arm7help.h"
+#include "debug/debugcon.h"
+#include "debugger.h"
+
+#include <cassert>
+
#define LOG_MMU (1U << 1)
#define LOG_DSP (1U << 2)
#define LOG_COPRO_READS (1U << 3)
@@ -75,6 +79,7 @@ DEFINE_DEVICE_TYPE(ARM1176JZF_S, arm1176jzf_s_cpu_device, "arm1176jzf_s", "ARM11
DEFINE_DEVICE_TYPE(PXA250, pxa250_cpu_device, "pxa250", "Intel XScale PXA250")
DEFINE_DEVICE_TYPE(PXA255, pxa255_cpu_device, "pxa255", "Intel XScale PXA255")
DEFINE_DEVICE_TYPE(PXA270, pxa270_cpu_device, "pxa270", "Intel XScale PXA270")
+DEFINE_DEVICE_TYPE(SA1100, sa1100_cpu_device, "sa1100", "Intel StrongARM SA-1100")
DEFINE_DEVICE_TYPE(SA1110, sa1110_cpu_device, "sa1110", "Intel StrongARM SA-1110")
DEFINE_DEVICE_TYPE(IGS036, igs036_cpu_device, "igs036", "IGS036")
@@ -83,9 +88,17 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, const char *tag,
{
}
-arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint32_t archFlags, endianness_t endianness)
+arm7_cpu_device::arm7_cpu_device(
+ const machine_config &mconfig,
+ device_type type,
+ const char *tag, device_t *owner,
+ uint32_t clock,
+ uint8_t archRev,
+ uint32_t archFlags,
+ endianness_t endianness,
+ address_map_constructor internal_map)
: cpu_device(mconfig, type, tag, owner, clock)
- , m_program_config("program", endianness, 32, 32, 0)
+ , m_program_config("program", endianness, 32, 32, 0, internal_map)
, m_prefetch_word0_shift(endianness == ENDIANNESS_LITTLE ? 0 : 16)
, m_prefetch_word1_shift(endianness == ENDIANNESS_LITTLE ? 16 : 0)
, m_endian(endianness)
@@ -113,6 +126,10 @@ arm7_cpu_device::arm7_cpu_device(const machine_config &mconfig, device_type type
m_actual_log = 0;
}
+arm7_cpu_device::~arm7_cpu_device()
+{
+}
+
arm7_be_cpu_device::arm7_be_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, ARM7_BE, tag, owner, clock, 4, ARCHFLAG_T, ENDIANNESS_BIG)
@@ -274,6 +291,16 @@ pxa270_cpu_device::pxa270_cpu_device(const machine_config &mconfig, const char *
| ARM9_COPRO_ID_STEP_PXA255_A0;
}
+sa1100_cpu_device::sa1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : arm7_cpu_device(mconfig, SA1100, tag, owner, clock, 4, ARCHFLAG_SA, ENDIANNESS_LITTLE)
+ // has StrongARM, no Thumb, no Enhanced DSP
+{
+ m_copro_id = ARM9_COPRO_ID_MFR_DEC
+ | ARM9_COPRO_ID_ARCH_V4
+ | ARM9_COPRO_ID_PART_SA1100
+ | ARM9_COPRO_ID_STEP_SA1100_A;
+}
+
sa1110_cpu_device::sa1110_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: arm7_cpu_device(mconfig, SA1110, tag, owner, clock, 4, ARCHFLAG_SA, ENDIANNESS_LITTLE)
// has StrongARM, no Thumb, no Enhanced DSP
@@ -1041,7 +1068,7 @@ void arm7_cpu_device::device_start()
state_add(STATE_GENFLAGS, "GENFLAGS", m_r[eCPSR]).formatstr("%13s").noshow();
- if (machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
{
using namespace std::placeholders;
machine().debugger().console().register_command("translate_insn", CMDFLAG_NONE, 1, 1, std::bind(&arm7_cpu_device::translate_insn_command, this, _1));
@@ -1154,10 +1181,6 @@ void arm1176jzf_s_cpu_device::device_reset()
m_control = 0x00050078;
}
-#define UNEXECUTED() \
- m_r[eR15] += 4; \
- m_icount +=2; /* Any unexecuted instruction only takes 1 cycle (page 193) */
-
void arm7_cpu_device::update_insn_prefetch(uint32_t curr_pc)
{
curr_pc &= ~3;
@@ -1237,6 +1260,8 @@ void arm7_cpu_device::add_ce_kernel_addr(offs_t addr, std::string value)
void arm7_cpu_device::execute_run()
{
+ auto const UNEXECUTED = [this] { m_r[eR15] += 4; m_icount += 2; }; // Any unexecuted instruction only takes 1 cycle (page 193)
+
m_tlb_log = m_actual_log;
uint32_t insn;
@@ -1446,12 +1471,10 @@ void arm7_cpu_device::execute_run()
/* handle Thumb instructions if active */
if (T_IS_SET(m_r[eCPSR]))
{
- offs_t raddr;
-
pc = m_r[eR15];
// "In Thumb state, bit [0] is undefined and must be ignored. Bits [31:1] contain the PC."
- raddr = pc & (~1);
+ offs_t const raddr = pc & ~uint32_t(1);
if (!insn_fetch_thumb(raddr, insn))
{
@@ -1463,12 +1486,10 @@ void arm7_cpu_device::execute_run()
}
else
{
- offs_t raddr;
-
/* load 32 bit instruction */
// "In ARM state, bits [1:0] of r15 are undefined and must be ignored. Bits [31:2] contain the PC."
- raddr = pc & (~3);
+ offs_t const raddr = pc & ~uint32_t(3);
if (!insn_fetch_arm(raddr, insn))
{
@@ -1573,24 +1594,25 @@ skip_exec:
void arm7_cpu_device::execute_set_input(int irqline, int state)
{
- switch (irqline) {
- case ARM7_IRQ_LINE: /* IRQ */
- m_pendingIrq = state ? true : false;
+ switch (irqline)
+ {
+ case ARM7_IRQ_LINE: // IRQ
+ m_pendingIrq = state != 0;
break;
- case ARM7_FIRQ_LINE: /* FIRQ */
- m_pendingFiq = state ? true : false;
+ case ARM7_FIRQ_LINE: // FIQ
+ m_pendingFiq = state != 0;
break;
case ARM7_ABORT_EXCEPTION:
- m_pendingAbtD = state ? true : false;
+ m_pendingAbtD = state != 0;
break;
case ARM7_ABORT_PREFETCH_EXCEPTION:
- m_pendingAbtP = state ? true : false;
+ m_pendingAbtP = state != 0;
break;
case ARM7_UNDEFINE_EXCEPTION:
- m_pendingUnd = state ? true : false;
+ m_pendingUnd = state != 0;
break;
}
@@ -1599,6 +1621,24 @@ void arm7_cpu_device::execute_set_input(int irqline, int state)
}
+void arm7_cpu_device::set_irq(int state)
+{
+ assert((machine().scheduler().currently_executing() == static_cast<device_execute_interface *>(this)) || !machine().scheduler().currently_executing());
+ m_pendingIrq = state != 0;
+ update_irq_state();
+ arm7_check_irq_state();
+}
+
+
+void arm7_cpu_device::set_fiq(int state)
+{
+ assert((machine().scheduler().currently_executing() == static_cast<device_execute_interface *>(this)) || !machine().scheduler().currently_executing());
+ m_pendingFiq = state != 0;
+ update_irq_state();
+ arm7_check_irq_state();
+}
+
+
std::unique_ptr<util::disasm_interface> arm7_cpu_device::create_disassembler()
{
return std::make_unique<arm7_disassembler>(this);
diff --git a/src/devices/cpu/arm7/arm7.h b/src/devices/cpu/arm7/arm7.h
index 8b5b1bf94e5..73cf8f44109 100644
--- a/src/devices/cpu/arm7/arm7.h
+++ b/src/devices/cpu/arm7/arm7.h
@@ -5,7 +5,7 @@
* arm7.h
* Portable ARM7TDMI CPU Emulator
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
@@ -50,102 +50,69 @@
class arm7_cpu_device : public cpu_device, public arm7_disassembler::config
{
public:
- // construction/destruction
- arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- void set_high_vectors() { m_vectorbase = 0xffff0000; }
-
-protected:
enum
{
- ARCHFLAG_T = 1, // Thumb present
- ARCHFLAG_E = 2, // extended DSP operations present (only for v5+)
- ARCHFLAG_J = 4, // "Jazelle" (direct execution of Java bytecode)
- ARCHFLAG_MMU = 8, // has on-board MMU (traditional ARM style like the SA1110)
- ARCHFLAG_SA = 16, // StrongARM extensions (enhanced TLB)
- ARCHFLAG_XSCALE = 32, // XScale extensions (CP14, enhanced TLB)
- ARCHFLAG_MODE26 = 64, // supports 26-bit backwards compatibility mode
- ARCHFLAG_K = 128, // enhanced MMU extensions present (only for v6)
- ARCHFLAG_T2 = 256, //Thumb-2 present
+ ARM7_IRQ_LINE=0, ARM7_FIRQ_LINE,
+ ARM7_ABORT_EXCEPTION, ARM7_ABORT_PREFETCH_EXCEPTION, ARM7_UNDEFINE_EXCEPTION,
+ ARM7_NUM_LINES
};
+ // Really there's only 1 ABORT Line.. and cpu decides whether it's during data fetch or prefetch, but we let the user specify
enum
{
- ARM9_COPRO_ID_STEP_SA1110_A0 = 0,
- ARM9_COPRO_ID_STEP_SA1110_B0 = 4,
- ARM9_COPRO_ID_STEP_SA1110_B1 = 5,
- ARM9_COPRO_ID_STEP_SA1110_B2 = 8,
- ARM9_COPRO_ID_STEP_SA1110_B4 = 8,
-
- ARM9_COPRO_ID_STEP_PXA255_A0 = 6,
-
- ARM9_COPRO_ID_STEP_ARM946_A0 = 1,
-
- ARM9_COPRO_ID_STEP_ARM1176JZF_S_R0P0 = 0,
- ARM9_COPRO_ID_STEP_ARM1176JZF_S_R0P7 = 7,
-
- ARM9_COPRO_ID_PART_ARM1176JZF_S = 0xB76 << 4,
- ARM9_COPRO_ID_PART_SA1110 = 0xB11 << 4,
- ARM9_COPRO_ID_PART_ARM946 = 0x946 << 4,
- ARM9_COPRO_ID_PART_ARM920 = 0x920 << 4,
- ARM9_COPRO_ID_PART_ARM710 = 0x710 << 4,
- ARM9_COPRO_ID_PART_PXA250 = 0x200 << 4,
- ARM9_COPRO_ID_PART_PXA255 = 0x2d0 << 4,
- ARM9_COPRO_ID_PART_PXA270 = 0x411 << 4,
- ARM9_COPRO_ID_PART_GENERICARM7 = 0x700 << 4,
-
- ARM9_COPRO_ID_PXA255_CORE_REV_SHIFT = 10,
-
- ARM9_COPRO_ID_ARCH_V4 = 0x01 << 16,
- ARM9_COPRO_ID_ARCH_V4T = 0x02 << 16,
- ARM9_COPRO_ID_ARCH_V5 = 0x03 << 16,
- ARM9_COPRO_ID_ARCH_V5T = 0x04 << 16,
- ARM9_COPRO_ID_ARCH_V5TE = 0x05 << 16,
- ARM9_COPRO_ID_ARCH_V5TEJ = 0x06 << 16,
- ARM9_COPRO_ID_ARCH_V6 = 0x07 << 16,
- ARM9_COPRO_ID_ARCH_CPUID = 0x0F << 16,
-
- ARM9_COPRO_ID_SPEC_REV0 = 0x00 << 20,
- ARM9_COPRO_ID_SPEC_REV1 = 0x01 << 20,
-
- ARM9_COPRO_ID_MFR_ARM = 0x41 << 24,
- ARM9_COPRO_ID_MFR_DEC = 0x44 << 24,
- ARM9_COPRO_ID_MFR_INTEL = 0x69 << 24
+ ARM7_PC = 0,
+ ARM7_R0, ARM7_R1, ARM7_R2, ARM7_R3, ARM7_R4, ARM7_R5, ARM7_R6, ARM7_R7,
+ ARM7_R8, ARM7_R9, ARM7_R10, ARM7_R11, ARM7_R12, ARM7_R13, ARM7_R14, ARM7_R15,
+ ARM7_FR8, ARM7_FR9, ARM7_FR10, ARM7_FR11, ARM7_FR12, ARM7_FR13, ARM7_FR14,
+ ARM7_IR13, ARM7_IR14, ARM7_SR13, ARM7_SR14, ARM7_FSPSR, ARM7_ISPSR, ARM7_SSPSR,
+ ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR, ARM7_LOGTLB
};
- arm7_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t archRev, uint32_t archFlags, endianness_t endianness);
+ // construction/destruction
+ arm7_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual ~arm7_cpu_device();
+
+ void set_high_vectors() { m_vectorbase = 0xffff0000; }
+
+protected:
+ enum arm_arch_flag : uint32_t;
+ enum arm_copro_id : uint32_t;
+
+ arm7_cpu_device(
+ const machine_config &mconfig,
+ device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ uint8_t archRev,
+ uint32_t archFlags,
+ endianness_t endianness,
+ address_map_constructor internal_map = address_map_constructor());
void postload();
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 3; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 4; } /* There are actually only 2 input lines: we use 3 variants of the ABORT line while there is only 1 real one */
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual bool get_t_flag() const override;
- address_space_config m_program_config;
- memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache m_cachele;
- memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cachebe;
-
- uint32_t m_r[/*NUM_REGS*/37];
-
void translate_insn_command(const std::vector<std::string_view> &params);
void translate_data_command(const std::vector<std::string_view> &params);
void translate_command(const std::vector<std::string_view> &params, int intention);
@@ -158,6 +125,16 @@ protected:
void init_ce_kernel_addrs();
void print_ce_kernel_address(const offs_t addr);
+ // for SoCs with onboard interrupt controllers - only call from scheduler or CPU's own context
+ void set_irq(int state);
+ void set_fiq(int state);
+
+ address_space_config m_program_config;
+ memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache m_cachele;
+ memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cachebe;
+
+ uint32_t m_r[/*NUM_REGS*/37];
+
std::string m_ce_kernel_addrs[0x10400];
bool m_ce_kernel_addr_present[0x10400];
@@ -686,7 +663,7 @@ public:
protected:
arm946es_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
private:
uint32_t cp15_control, cp15_itcm_base, cp15_dtcm_base, cp15_itcm_size, cp15_dtcm_size;
@@ -717,7 +694,7 @@ public:
virtual void arm7_rt_w_callback(offs_t offset, uint32_t data) override;
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
class igs036_cpu_device : public arm946es_cpu_device
@@ -748,6 +725,13 @@ public:
pxa270_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
+class sa1100_cpu_device : public arm7_cpu_device
+{
+public:
+ // construction/destruction
+ sa1100_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
class sa1110_cpu_device : public arm7_cpu_device
{
public:
@@ -768,6 +752,7 @@ DECLARE_DEVICE_TYPE(ARM1176JZF_S, arm1176jzf_s_cpu_device)
DECLARE_DEVICE_TYPE(PXA250, pxa250_cpu_device)
DECLARE_DEVICE_TYPE(PXA255, pxa255_cpu_device)
DECLARE_DEVICE_TYPE(PXA270, pxa270_cpu_device)
+DECLARE_DEVICE_TYPE(SA1100, sa1100_cpu_device)
DECLARE_DEVICE_TYPE(SA1110, sa1110_cpu_device)
DECLARE_DEVICE_TYPE(IGS036, igs036_cpu_device)
diff --git a/src/devices/cpu/arm7/arm7core.h b/src/devices/cpu/arm7/arm7core.h
index 937c42a550b..64185a8aa28 100644
--- a/src/devices/cpu/arm7/arm7core.h
+++ b/src/devices/cpu/arm7/arm7core.h
@@ -5,7 +5,7 @@
* arm7core.h
* Portable ARM7TDMI Core Emulator
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
@@ -18,38 +18,20 @@
******************************************************************************/
+#ifndef MAME_CPU_ARM7_ARM7CORE_H
+#define MAME_CPU_ARM7_ARM7CORE_H
+
#pragma once
-#ifndef __ARM7CORE_H__
-#define __ARM7CORE_H__
+#include "arm7.h"
#define ARM7_MMU_ENABLE_HACK 0
#define ARM7_DEBUG_CORE 0
/****************************************************************************************************
- * INTERRUPT LINES/EXCEPTIONS
- ***************************************************************************************************/
-enum
-{
- ARM7_IRQ_LINE=0, ARM7_FIRQ_LINE,
- ARM7_ABORT_EXCEPTION, ARM7_ABORT_PREFETCH_EXCEPTION, ARM7_UNDEFINE_EXCEPTION,
- ARM7_NUM_LINES
-};
-// Really there's only 1 ABORT Line.. and cpu decides whether it's during data fetch or prefetch, but we let the user specify
-
-/****************************************************************************************************
* ARM7 CORE REGISTERS
***************************************************************************************************/
-enum
-{
- ARM7_PC = 0,
- ARM7_R0, ARM7_R1, ARM7_R2, ARM7_R3, ARM7_R4, ARM7_R5, ARM7_R6, ARM7_R7,
- ARM7_R8, ARM7_R9, ARM7_R10, ARM7_R11, ARM7_R12, ARM7_R13, ARM7_R14, ARM7_R15,
- ARM7_FR8, ARM7_FR9, ARM7_FR10, ARM7_FR11, ARM7_FR12, ARM7_FR13, ARM7_FR14,
- ARM7_IR13, ARM7_IR14, ARM7_SR13, ARM7_SR14, ARM7_FSPSR, ARM7_ISPSR, ARM7_SSPSR,
- ARM7_CPSR, ARM7_AR13, ARM7_AR14, ARM7_ASPSR, ARM7_UR13, ARM7_UR14, ARM7_USPSR, ARM7_LOGTLB
-};
/* There are 36 Unique - 32 bit processor registers */
/* Each mode has 17 registers (except user & system, which have 16) */
@@ -207,6 +189,7 @@ struct arm_state
/****************************************************************************************************
* VARIOUS INTERNAL STRUCS/DEFINES/ETC..
***************************************************************************************************/
+
// Mode values come from bit 4-0 of CPSR, but we are ignoring bit 4 here, since bit 4 always = 1 for valid modes
enum
{
@@ -332,7 +315,7 @@ static const int sRegisterTable[ARM7_NUM_MODES][18] =
#define T_IS_CLEAR(pc) (!T_IS_SET(pc))
/* Deconstructing an instruction */
-// todo: use these in all places (including dasm file)
+// TODO: use these in all places (including dasm file)
#define INSN_COND ((uint32_t)0xf0000000u)
#define INSN_SDT_L ((uint32_t)0x00100000u)
#define INSN_SDT_W ((uint32_t)0x00200000u)
@@ -516,19 +499,69 @@ enum
#define ARM7_TLB_WRITE (1 << 3)
/* ARM flavors */
-enum arm_flavor
+enum arm7_cpu_device::arm_arch_flag : uint32_t
+{
+ ARCHFLAG_T = 1U << 0, // Thumb present
+ ARCHFLAG_E = 1U << 1, // extended DSP operations present (only for v5+)
+ ARCHFLAG_J = 1U << 2, // "Jazelle" (direct execution of Java bytecode)
+ ARCHFLAG_MMU = 1U << 3, // has on-board MMU (traditional ARM style like the SA1110)
+ ARCHFLAG_SA = 1U << 4, // StrongARM extensions (enhanced TLB)
+ ARCHFLAG_XSCALE = 1U << 5, // XScale extensions (CP14, enhanced TLB)
+ ARCHFLAG_MODE26 = 1U << 6, // supports 26-bit backwards compatibility mode
+ ARCHFLAG_K = 1U << 7, // enhanced MMU extensions present (only for v6)
+ ARCHFLAG_T2 = 1U << 8, // Thumb-2 present
+};
+
+enum arm7_cpu_device::arm_copro_id : uint32_t
{
- /* ARM7 variants */
- ARM_TYPE_ARM7,
- ARM_TYPE_ARM7BE,
- ARM_TYPE_ARM7500,
- ARM_TYPE_PXA255,
- ARM_TYPE_SA1110,
-
- /* ARM9 variants */
- ARM_TYPE_ARM9,
- ARM_TYPE_ARM920T,
- ARM_TYPE_ARM946ES
+ ARM9_COPRO_ID_STEP_SA1100_A = 0,
+ ARM9_COPRO_ID_STEP_SA1100_B = 1,
+ ARM9_COPRO_ID_STEP_SA1100_C = 2,
+ ARM9_COPRO_ID_STEP_SA1100_D = 8,
+ ARM9_COPRO_ID_STEP_SA1100_E = 9,
+ ARM9_COPRO_ID_STEP_SA1100_G = 11,
+
+ ARM9_COPRO_ID_STEP_SA1110_A0 = 0,
+ ARM9_COPRO_ID_STEP_SA1110_B0 = 4,
+ ARM9_COPRO_ID_STEP_SA1110_B1 = 5,
+ ARM9_COPRO_ID_STEP_SA1110_B2 = 6,
+ ARM9_COPRO_ID_STEP_SA1110_B4 = 8,
+
+ ARM9_COPRO_ID_STEP_PXA255_A0 = 6,
+
+ ARM9_COPRO_ID_STEP_ARM946_A0 = 1,
+
+ ARM9_COPRO_ID_STEP_ARM1176JZF_S_R0P0 = 0,
+ ARM9_COPRO_ID_STEP_ARM1176JZF_S_R0P7 = 7,
+
+ ARM9_COPRO_ID_PART_ARM1176JZF_S = 0xb76 << 4,
+ ARM9_COPRO_ID_PART_SA1100 = 0xa11 << 4,
+ ARM9_COPRO_ID_PART_SA1110 = 0xb11 << 4,
+ ARM9_COPRO_ID_PART_ARM946 = 0x946 << 4,
+ ARM9_COPRO_ID_PART_ARM920 = 0x920 << 4,
+ ARM9_COPRO_ID_PART_ARM710 = 0x710 << 4,
+ ARM9_COPRO_ID_PART_PXA250 = 0x200 << 4,
+ ARM9_COPRO_ID_PART_PXA255 = 0x2d0 << 4,
+ ARM9_COPRO_ID_PART_PXA270 = 0x411 << 4,
+ ARM9_COPRO_ID_PART_GENERICARM7 = 0x700 << 4,
+
+ ARM9_COPRO_ID_PXA255_CORE_REV_SHIFT = 10,
+
+ ARM9_COPRO_ID_ARCH_V4 = 0x01 << 16,
+ ARM9_COPRO_ID_ARCH_V4T = 0x02 << 16,
+ ARM9_COPRO_ID_ARCH_V5 = 0x03 << 16,
+ ARM9_COPRO_ID_ARCH_V5T = 0x04 << 16,
+ ARM9_COPRO_ID_ARCH_V5TE = 0x05 << 16,
+ ARM9_COPRO_ID_ARCH_V5TEJ = 0x06 << 16,
+ ARM9_COPRO_ID_ARCH_V6 = 0x07 << 16,
+ ARM9_COPRO_ID_ARCH_CPUID = 0x0f << 16,
+
+ ARM9_COPRO_ID_SPEC_REV0 = 0x00 << 20,
+ ARM9_COPRO_ID_SPEC_REV1 = 0x01 << 20,
+
+ ARM9_COPRO_ID_MFR_ARM = 0x41 << 24,
+ ARM9_COPRO_ID_MFR_DEC = 0x44 << 24,
+ ARM9_COPRO_ID_MFR_INTEL = 0x69 << 24
};
-#endif /* __ARM7CORE_H__ */
+#endif // MAME_CPU_ARM7_ARM7CORE_H
diff --git a/src/devices/cpu/arm7/arm7core.hxx b/src/devices/cpu/arm7/arm7core.hxx
index 8fba8e61b15..636019caa59 100644
--- a/src/devices/cpu/arm7/arm7core.hxx
+++ b/src/devices/cpu/arm7/arm7core.hxx
@@ -2,10 +2,10 @@
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
- * arm7core.inc
+ * arm7core.hxx
* Portable ARM7TDMI Core Emulator
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
@@ -113,7 +113,7 @@ void arm7_cpu_device::arm7_check_irq_state()
// Data Abort
if (m_pendingAbtD)
{
- if (MODE26) fatalerror( "ARM7: pendingAbtD (todo)\n");
+ if (MODE26) fatalerror("ARM7: pendingAbtD (todo)\n");
SwitchMode(eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
SetRegister(14, pc - 8 + 8); /* save PC to R14 */
SetRegister(SPSR, cpsr); /* Save current CPSR */
@@ -129,7 +129,8 @@ void arm7_cpu_device::arm7_check_irq_state()
// FIQ
if (m_pendingFiq && (cpsr & F_MASK) == 0)
{
- if (MODE26) fatalerror( "pendingFiq (todo)\n");
+ standard_irq_callback(ARM7_FIRQ_LINE, pc);
+ if (MODE26) fatalerror("pendingFiq (todo)\n");
SwitchMode(eARM7_MODE_FIQ); /* Set FIQ mode so PC is saved to correct R14 bank */
SetRegister(14, pc - 4 + 4); /* save PC to R14 */
SetRegister(SPSR, cpsr); /* Save current CPSR */
@@ -144,6 +145,7 @@ void arm7_cpu_device::arm7_check_irq_state()
// IRQ
if (m_pendingIrq && (cpsr & I_MASK) == 0)
{
+ standard_irq_callback(ARM7_IRQ_LINE, pc);
SwitchMode(eARM7_MODE_IRQ); /* Set IRQ mode so PC is saved to correct R14 bank */
SetRegister(14, pc - 4 + 4); /* save PC to R14 */
if (MODE32)
@@ -168,7 +170,7 @@ void arm7_cpu_device::arm7_check_irq_state()
// Prefetch Abort
if (m_pendingAbtP)
{
- if (MODE26) fatalerror( "pendingAbtP (todo)\n");
+ if (MODE26) fatalerror("pendingAbtP (todo)\n");
SwitchMode(eARM7_MODE_ABT); /* Set ABT mode so PC is saved to correct R14 bank */
SetRegister(14, pc - 4 + 4); /* save PC to R14 */
SetRegister(SPSR, cpsr); /* Save current CPSR */
@@ -184,7 +186,7 @@ void arm7_cpu_device::arm7_check_irq_state()
// Undefined instruction
if (m_pendingUnd)
{
- if (MODE26) printf( "ARM7: pendingUnd (todo)\n");
+ if (MODE26) printf("ARM7: pendingUnd (todo)\n");
SwitchMode(eARM7_MODE_UND); /* Set UND mode so PC is saved to correct R14 bank */
// compensate for prefetch (should this also be done for normal IRQ?)
if (T_IS_SET(GET_CPSR))
diff --git a/src/devices/cpu/arm7/arm7dasm.cpp b/src/devices/cpu/arm7/arm7dasm.cpp
index be552b90f2b..f597c5a58d3 100644
--- a/src/devices/cpu/arm7/arm7dasm.cpp
+++ b/src/devices/cpu/arm7/arm7dasm.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
- * arm7dasm.c
+ * arm7dasm.cpp
* Portable ARM7TDMI Core Emulator - Disassembler
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
diff --git a/src/devices/cpu/arm7/arm7dasm.h b/src/devices/cpu/arm7/arm7dasm.h
index 1e0d27ca754..3c9514482bd 100644
--- a/src/devices/cpu/arm7/arm7dasm.h
+++ b/src/devices/cpu/arm7/arm7dasm.h
@@ -2,10 +2,10 @@
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
- * arm7dasm.c
+ * arm7dasm.h
* Portable ARM7TDMI Core Emulator - Disassembler
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
diff --git a/src/devices/cpu/arm7/arm7drc.hxx b/src/devices/cpu/arm7/arm7drc.hxx
index 8264ce5a764..9afdf5e7c88 100644
--- a/src/devices/cpu/arm7/arm7drc.hxx
+++ b/src/devices/cpu/arm7/arm7drc.hxx
@@ -2,10 +2,10 @@
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
- * arm7drc.inc
+ * arm7drc.hxx
* Portable CPU Emulator for 32-bit ARM v3/4/5/6
*
- * Copyright Steve Ellenoff, all rights reserved.
+ * Copyright Steve Ellenoff
* Thumb, DSP, and MMU support and many bugfixes by R. Belmont and Ryan Holtz.
* Dyanmic Recompiler (DRC) / Just In Time Compiler (JIT) by Ryan Holtz.
*
@@ -1027,7 +1027,7 @@ void arm7_cpu_device::static_generate_memory_accessor(int size, bool istlb, bool
}
/* general case: assume paging and perform a translation */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
for (int ramnum = 0; ramnum < ARM7_MAX_FASTRAM; ramnum++)
{
@@ -1266,7 +1266,7 @@ void arm7_cpu_device::generate_sequence_instruction(drcuml_block &block, compile
UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, uml::mem(&R15), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block);
diff --git a/src/devices/cpu/arm7/arm7fe.hxx b/src/devices/cpu/arm7/arm7fe.hxx
index 9fcb97776aa..9cefd6f0f81 100644
--- a/src/devices/cpu/arm7/arm7fe.hxx
+++ b/src/devices/cpu/arm7/arm7fe.hxx
@@ -2,7 +2,7 @@
// copyright-holders:Ryan Holtz
/***************************************************************************
- arm7fe.c
+ arm7fe.hxx
Front-end for ARM7 DRC
diff --git a/src/devices/cpu/arm7/lpc210x.cpp b/src/devices/cpu/arm7/lpc210x.cpp
index 75a322f01a2..9e9c51c620a 100644
--- a/src/devices/cpu/arm7/lpc210x.cpp
+++ b/src/devices/cpu/arm7/lpc210x.cpp
@@ -15,6 +15,9 @@
#include "emu.h"
#include "lpc210x.h"
+#include "arm7core.h"
+
+
DEFINE_DEVICE_TYPE(LPC2103, lpc210x_device, "lpc2103", "NXP LPC2103")
void lpc210x_device::lpc2103_map(address_map &map)
diff --git a/src/devices/cpu/arm7/lpc210x.h b/src/devices/cpu/arm7/lpc210x.h
index 47a801a6058..00bee60ef00 100644
--- a/src/devices/cpu/arm7/lpc210x.h
+++ b/src/devices/cpu/arm7/lpc210x.h
@@ -1,15 +1,16 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
-#ifndef MAME_CPU_ARM7_LPC2103_H
-#define MAME_CPU_ARM7_LPC2103_H
+#ifndef MAME_CPU_ARM7_LPC210X_H
+#define MAME_CPU_ARM7_LPC210X_H
#pragma once
#include "arm7.h"
-#include "arm7core.h"
+
#include "machine/vic_pl192.h"
+
/***************************************************************************
DEVICE CONFIGURATION MACROS
***************************************************************************/
@@ -65,12 +66,12 @@ public:
// todo, use an appropriate flash type instead
uint8_t m_flash[0x8000]; // needs to be public because the harmony/melody device injects contents with memcpy, yuck
- void lpc2103_map(address_map &map);
+ void lpc2103_map(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual space_config_vector memory_space_config() const override;
@@ -86,4 +87,4 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(LPC2103, lpc210x_device)
-#endif // MAME_CPU_ARM7_LPC2103_H
+#endif // MAME_CPU_ARM7_LPC210X_H
diff --git a/src/devices/cpu/arm7/upd800468.cpp b/src/devices/cpu/arm7/upd800468.cpp
index fef0fdc9fce..87dea88ad5c 100644
--- a/src/devices/cpu/arm7/upd800468.cpp
+++ b/src/devices/cpu/arm7/upd800468.cpp
@@ -12,6 +12,9 @@
#include "emu.h"
#include "upd800468.h"
+#include "arm7core.h"
+
+
DEFINE_DEVICE_TYPE(UPD800468_TIMER, upd800468_timer_device, "upd800468_timer", "NEC uPD800468 timer")
upd800468_timer_device::upd800468_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
diff --git a/src/devices/cpu/arm7/upd800468.h b/src/devices/cpu/arm7/upd800468.h
index 7f662581c7f..c3d62ad6572 100644
--- a/src/devices/cpu/arm7/upd800468.h
+++ b/src/devices/cpu/arm7/upd800468.h
@@ -7,10 +7,11 @@
#pragma once
#include "arm7.h"
-#include "arm7core.h"
+
#include "machine/gt913_kbd.h"
#include "machine/vic_pl192.h"
+
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
@@ -29,8 +30,8 @@ public:
void control_w(u8);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
TIMER_CALLBACK_MEMBER(irq_timer_tick);
@@ -47,7 +48,7 @@ class upd800468_device : public arm7_cpu_device
public:
upd800468_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t);
- void upd800468_map(address_map &map);
+ void upd800468_map(address_map &map) ATTR_COLD;
template<offs_t i> auto adc_cb() { return m_adc_cb[i].bind(); }
@@ -74,9 +75,9 @@ protected:
void port_update(offs_t);
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/asap/asap.cpp b/src/devices/cpu/asap/asap.cpp
index 53f66aa1900..703250e7b8f 100644
--- a/src/devices/cpu/asap/asap.cpp
+++ b/src/devices/cpu/asap/asap.cpp
@@ -516,17 +516,6 @@ uint32_t asap_device::execute_max_cycles() const noexcept
}
-//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t asap_device::execute_input_lines() const noexcept
-{
- return 1;
-}
-
-
void asap_device::execute_set_input(int inputnum, int state)
{
m_irq_state = (state != CLEAR_LINE);
@@ -539,7 +528,7 @@ void asap_device::execute_run()
check_irqs();
// core execution loop
- if ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
do
{
diff --git a/src/devices/cpu/asap/asap.h b/src/devices/cpu/asap/asap.h
index 3adb9ef37f4..d8e4bcd8781 100644
--- a/src/devices/cpu/asap/asap.h
+++ b/src/devices/cpu/asap/asap.h
@@ -70,13 +70,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp
index f949ed0ef03..4f319b2131a 100644
--- a/src/devices/cpu/avr8/avr8.cpp
+++ b/src/devices/cpu/avr8/avr8.cpp
@@ -566,6 +566,9 @@ void avr8_device<NumTimers>::base_internal_map(address_map &map)
map(0x003f, 0x003f).w(FUNC(avr8_device::eecr_w));
map(0x0043, 0x0043).w(FUNC(avr8_device::gtccr_w));
map(0x0044, 0x0044).w(FUNC(avr8_device::tccr0a_w));
+ map(0x0045, 0x0045).w(FUNC(avr8_device::tccr0b_w));
+ map(0x0047, 0x0047).w(FUNC(avr8_device::ocr0a_w));
+ map(0x0048, 0x0048).w(FUNC(avr8_device::ocr0b_w));
map(0x004a, 0x004a).w(FUNC(avr8_device::gpior1_w));
map(0x004b, 0x004b).w(FUNC(avr8_device::gpior2_w));
map(0x004c, 0x004c).w(FUNC(avr8_device::spcr_w));
@@ -728,7 +731,7 @@ atmega168_device::atmega168_device(const machine_config &mconfig, const char *ta
//-------------------------------------------------
atmega328_device::atmega328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : avr8_device<3>(mconfig, tag, owner, clock, ATMEGA328, 0x7fff, address_map_constructor(FUNC(atmega328_device::atmega328_internal_map), this))
+ : avr8_device<3>(mconfig, tag, owner, clock, ATMEGA328, 0x3fff, address_map_constructor(FUNC(atmega328_device::atmega328_internal_map), this))
{
}
@@ -737,7 +740,7 @@ atmega328_device::atmega328_device(const machine_config &mconfig, const char *ta
//-------------------------------------------------
atmega644_device::atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : avr8_device<3>(mconfig, tag, owner, clock, ATMEGA644, 0xffff, address_map_constructor(FUNC(atmega644_device::atmega644_internal_map), this))
+ : avr8_device<3>(mconfig, tag, owner, clock, ATMEGA644, 0x7fff, address_map_constructor(FUNC(atmega644_device::atmega644_internal_map), this))
{
}
@@ -746,7 +749,7 @@ atmega644_device::atmega644_device(const machine_config &mconfig, const char *ta
//-------------------------------------------------
atmega1280_device::atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : avr8_device<6>(mconfig, tag, owner, clock, ATMEGA1280, 0x1ffff, address_map_constructor(FUNC(atmega1280_device::atmega1280_internal_map), this))
+ : avr8_device<6>(mconfig, tag, owner, clock, ATMEGA1280, 0xffff, address_map_constructor(FUNC(atmega1280_device::atmega1280_internal_map), this))
{
}
@@ -764,7 +767,7 @@ atmega2560_device::atmega2560_device(const machine_config &mconfig, const char *
//-------------------------------------------------
attiny15_device::attiny15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : avr8_device<2>(mconfig, tag, owner, clock, ATTINY15, 0x03ff, address_map_constructor(FUNC(attiny15_device::attiny15_internal_map), this))
+ : avr8_device<2>(mconfig, tag, owner, clock, ATTINY15, 0x01ff, address_map_constructor(FUNC(attiny15_device::attiny15_internal_map), this))
{
}
@@ -1123,23 +1126,23 @@ void avr8_base_device::device_reset()
switch ((m_hfuses & (BOOTSZ1 | BOOTSZ0)) >> 1)
{
case 0:
- if (m_addr_mask <= 0x1fff) { m_boot_size = 1024; }
- else if (m_addr_mask <= 0xffff) { m_boot_size = 2048; }
+ if (m_addr_mask <= 0x3fff) { m_boot_size = 1024; }
+ else if (m_addr_mask <= 0x7fff) { m_boot_size = 2048; }
else { m_boot_size = 4096; }
break;
case 1:
- if (m_addr_mask <= 0x1fff) { m_boot_size = 512; }
- else if (m_addr_mask <= 0xffff) { m_boot_size = 1024; }
+ if (m_addr_mask <= 0x3fff) { m_boot_size = 512; }
+ else if (m_addr_mask <= 0x7fff) { m_boot_size = 1024; }
else { m_boot_size = 2048; }
break;
case 2:
- if (m_addr_mask <= 0x1fff) { m_boot_size = 256; }
- else if (m_addr_mask <= 0xffff) { m_boot_size = 512; }
+ if (m_addr_mask <= 0x3fff) { m_boot_size = 256; }
+ else if (m_addr_mask <= 0x7fff) { m_boot_size = 512; }
else { m_boot_size = 1024; }
break;
case 3:
- if (m_addr_mask <= 0x1fff) { m_boot_size = 128; }
- else if (m_addr_mask <= 0xffff) { m_boot_size = 256; }
+ if (m_addr_mask <= 0x3fff) { m_boot_size = 128; }
+ else if (m_addr_mask <= 0x7fff) { m_boot_size = 256; }
else { m_boot_size = 512; }
break;
default:
@@ -1217,7 +1220,7 @@ void avr8_base_device::state_string_export(const device_state_entry &entry, std:
case STATE_GENPC:
case STATE_GENPCBASE:
case AVR8_PC:
- str = string_format("%05x", m_pc << 1);
+ str = string_format("%05x", m_pc >> 1);
break;
case STATE_GENFLAGS:
str = string_format("%c%c%c%c%c%c%c%c",
@@ -1481,7 +1484,7 @@ void avr8_device<NumTimers>::timer0_tick_ctc_toggle()
m_timer_top[0] = 0;
LOGMASKED(LOG_TIMER0, "%s: timer0: Toggle OC0B on match\n", machine().describe_context());
m_r[PORTG] ^= (1 << 5);
- m_gpio_out_cb[PORTG](m_r[PORTG]);
+ m_gpio_out_cb[GPIOG](m_r[PORTG]);
}
m_r[TCNT0]++;
m_timer_prescale_count[0] -= m_timer_prescale[0];
@@ -1495,7 +1498,7 @@ void avr8_device<NumTimers>::timer0_tick_ctc_clear()
m_timer_top[0] = 0;
LOGMASKED(LOG_TIMER0, "[0] timer0: Clear OC0B on match\n", machine().describe_context());
m_r[PORTG] &= ~(1 << 5);
- m_gpio_out_cb[PORTG](m_r[PORTG]);
+ m_gpio_out_cb[GPIOG](m_r[PORTG]);
}
m_r[TCNT0]++;
m_timer_prescale_count[0] -= m_timer_prescale[0];
@@ -1509,7 +1512,7 @@ void avr8_device<NumTimers>::timer0_tick_ctc_set()
m_timer_top[0] = 0;
LOGMASKED(LOG_TIMER0, "%s: timer0: Set OC0B on match\n", machine().describe_context());
m_r[PORTG] |= (1 << 5);
- m_gpio_out_cb[PORTG](m_r[PORTG]);
+ m_gpio_out_cb[GPIOG](m_r[PORTG]);
}
m_r[TCNT0]++;
m_timer_prescale_count[0] -= m_timer_prescale[0];
@@ -1958,7 +1961,7 @@ void avr8_device<NumTimers>::update_timer_waveform_gen_mode(uint8_t t, uint8_t m
if (m_timer_top[t] == -1)
{
m_timer_top[t] = 0;
- LOGMASKED((LOG_TIMER0 + t), "%s: update_timer_waveform_gen_mode: Timer %d - Unsupported waveform generation type: %d\n", machine().describe_context(), t, mode);
+ LOGMASKED((LOG_TIMER0 << t), "%s: update_timer_waveform_gen_mode: Timer %d - Unsupported waveform generation type: %d\n", machine().describe_context(), t, mode);
}
}
@@ -2025,7 +2028,7 @@ void avr8_device<NumTimers>::timer2_tick_fast_pwm()
if (m_ocr2_not_reached_yet)
{
// Turn off
- m_r[PORTD] |= 1 << 7;
+ m_r[PORTD] &= ~(1 << 7);
m_gpio_out_cb[GPIOD](m_r[PORTD]);
m_ocr2_not_reached_yet = false;
}
@@ -2188,11 +2191,11 @@ void avr8_device<NumTimers>::update_timer_clock_source(uint8_t clock_select, con
const uint16_t old_prescale = s_prescale_values[(Timer == 2) ? 1 : 0][old_clock_select];
m_timer_prescale[Timer] = (uint16_t)prescale_divisor;
- LOGMASKED(LOG_TIMER0 + Timer, "%s: update_timer_clock_source: t = %d, cs = %d\n", machine().describe_context(), Timer, clock_select);
+ LOGMASKED(LOG_TIMER0 << Timer, "%s: update_timer_clock_source: t = %d, cs = %d\n", machine().describe_context(), Timer, clock_select);
if (prescale_divisor == -1)
{
- LOGMASKED(LOG_TIMER0 + Timer, "%s: timer%d: update_timer_clock_source: External trigger mode not implemented yet\n", machine().describe_context(), Timer);
+ LOGMASKED(LOG_TIMER0 << Timer, "%s: timer%d: update_timer_clock_source: External trigger mode not implemented yet\n", machine().describe_context(), Timer);
m_timer_prescale[Timer] = 0xffff;
}
@@ -2251,7 +2254,7 @@ void avr8_device<NumTimers>::timer5_tick()
m_timer_top[5] = 0;
LOGMASKED(LOG_TIMER5, "%s: timer5: Toggle OC5B on compare match\n", machine().describe_context());
m_r[PORTL] ^= 1 << 4;
- m_gpio_out_cb[PORTL](m_r[PORTL]);
+ m_gpio_out_cb[GPIOL](m_r[PORTL]);
}
break;
case 2: /* Clear OC5B on compare match */
@@ -2261,7 +2264,7 @@ void avr8_device<NumTimers>::timer5_tick()
// Clear OC5B
LOGMASKED(LOG_TIMER5, "%s: timer5: Clear OC5B on compare match\n", machine().describe_context());
m_r[PORTL] &= ~(1 << 4);
- m_gpio_out_cb[PORTL](m_r[PORTL]);
+ m_gpio_out_cb[GPIOL](m_r[PORTL]);
}
break;
case 3: /* Set OC5B on compare match */
@@ -2270,7 +2273,7 @@ void avr8_device<NumTimers>::timer5_tick()
m_timer_top[5] = 0;
LOGMASKED(LOG_TIMER5, "%s: timer5: Set OC5B on compare match\n", machine().describe_context());
m_r[PORTL] |= 1 << 4;
- m_gpio_out_cb[PORTL](m_r[PORTL]);
+ m_gpio_out_cb[GPIOL](m_r[PORTL]);
}
break;
}
diff --git a/src/devices/cpu/avr8/avr8.h b/src/devices/cpu/avr8/avr8.h
index 0254775273d..fbf34b5c1d9 100644
--- a/src/devices/cpu/avr8/avr8.h
+++ b/src/devices/cpu/avr8/avr8.h
@@ -599,13 +599,12 @@ protected:
std::unique_ptr<uint8_t[]> m_shift_flag_cache;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -784,14 +783,14 @@ protected:
typedef delegate<void (void)> timer_func;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
// address maps
- void base_internal_map(address_map &map);
+ void base_internal_map(address_map &map) ATTR_COLD;
// Miscellaneous registers
void wdtcsr_w(uint8_t data);
@@ -939,8 +938,8 @@ protected:
void tccr1a_w(uint8_t data);
void tccr1b_w(uint8_t data);
void tccr1c_w(uint8_t data);
- void tcnt1l_w(uint8_t data);
- void tcnt1h_w(uint8_t data);
+ //void tcnt1l_w(uint8_t data);
+ //void tcnt1h_w(uint8_t data);
void icr1l_w(uint8_t data);
void icr1h_w(uint8_t data);
void ocr1al_w(uint8_t data);
@@ -1046,8 +1045,8 @@ protected:
void tccr3a_w(uint8_t data);
void tccr3b_w(uint8_t data);
void tccr3c_w(uint8_t data);
- void tcnt3l_w(uint8_t data);
- void tcnt3h_w(uint8_t data);
+ //void tcnt3l_w(uint8_t data);
+ //void tcnt3h_w(uint8_t data);
void icr3l_w(uint8_t data);
void icr3h_w(uint8_t data);
void ocr3al_w(uint8_t data);
@@ -1102,7 +1101,7 @@ class atmega88_device : public avr8_device<3>
public:
// construction/destruction
atmega88_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void atmega88_internal_map(address_map &map);
+ void atmega88_internal_map(address_map &map) ATTR_COLD;
};
// ======================> atmega168_device
@@ -1114,7 +1113,7 @@ public:
atmega168_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
- void atmega168_internal_map(address_map &map);
+ void atmega168_internal_map(address_map &map) ATTR_COLD;
};
// ======================> atmega328_device
@@ -1126,7 +1125,7 @@ public:
atmega328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
- void atmega328_internal_map(address_map &map);
+ void atmega328_internal_map(address_map &map) ATTR_COLD;
};
// ======================> atmega644_device
@@ -1138,7 +1137,7 @@ public:
atmega644_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
- void atmega644_internal_map(address_map &map);
+ void atmega644_internal_map(address_map &map) ATTR_COLD;
};
// ======================> atmega1280_device
@@ -1150,7 +1149,7 @@ public:
atmega1280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
- void atmega1280_internal_map(address_map &map);
+ void atmega1280_internal_map(address_map &map) ATTR_COLD;
};
// ======================> atmega2560_device
@@ -1162,7 +1161,7 @@ public:
atmega2560_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual void update_interrupt(int source) override;
- void atmega2560_internal_map(address_map &map);
+ void atmega2560_internal_map(address_map &map) ATTR_COLD;
};
// ======================> attiny15_device
@@ -1172,7 +1171,7 @@ class attiny15_device : public avr8_device<2>
public:
// construction/destruction
attiny15_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void attiny15_internal_map(address_map &map);
+ void attiny15_internal_map(address_map &map) ATTR_COLD;
};
/***************************************************************************
diff --git a/src/devices/cpu/avr8/avr8ops.hxx b/src/devices/cpu/avr8/avr8ops.hxx
index 07fb035c7c7..614adac97b5 100644
--- a/src/devices/cpu/avr8/avr8ops.hxx
+++ b/src/devices/cpu/avr8/avr8ops.hxx
@@ -1047,9 +1047,7 @@ void avr8_base_device::op_neg(uint16_t op)
const uint8_t res = 0 - rd;
m_r[SREG] &= ~(SREG_MASK_C | SREG_MASK_Z | SREG_MASK_N | SREG_MASK_V | SREG_MASK_S | SREG_MASK_H);
if (res == 0)
- {
m_r[SREG] |= SREG_MASK_Z;
- }
else
{
m_r[SREG] |= SREG_MASK_C;
@@ -1122,7 +1120,7 @@ void avr8_base_device::op_clrf(uint16_t op)
void avr8_base_device::op_ijmp(uint16_t op)
{
- m_pc = (ZREG - 1) << 1;
+ m_pc = (ZREG << 1) - 2;
}
void avr8_base_device::op_eijmp(uint16_t op)
@@ -1135,12 +1133,12 @@ void avr8_base_device::op_dec(uint16_t op)
const uint8_t rd = m_r[RD5(op)];
const uint8_t res = rd - 1;
m_r[SREG] &= ~(SREG_MASK_V | SREG_MASK_N | SREG_MASK_S | SREG_MASK_Z);
- if (rd == 0x7f)
+ if (res == 0)
+ m_r[SREG] |= SREG_MASK_Z;
+ else if (res == 0x7f)
m_r[SREG] |= SREG_MASK_V | SREG_MASK_S;
else if (BIT(res, 7))
m_r[SREG] |= SREG_MASK_N | SREG_MASK_S;
- else if (res == 0)
- m_r[SREG] |= SREG_MASK_Z;
m_r[RD5(op)] = res;
}
@@ -1148,8 +1146,7 @@ void avr8_base_device::op_jmp(uint16_t op)
{
uint32_t offs = KCONST22(op) << 16;
m_pc += 2;
- uint16_t wordval = m_program->read_word(m_pc);
- offs |= wordval;
+ offs |= m_program->read_word(m_pc);
m_pc = offs << 1;
m_pc -= 2;
}
@@ -1234,18 +1231,21 @@ void avr8_base_device::op_adiw(uint16_t op)
const uint8_t rr = m_r[25 + (DCONST(op) << 1)];
const uint16_t pd = ((rr << 8) | rd) + KCONST6(op);
m_r[SREG] &= ~(SREG_MASK_V | SREG_MASK_N | SREG_MASK_S | SREG_MASK_Z | SREG_MASK_C);
- if (pd == 0)
- m_r[SREG] |= SREG_MASK_Z;
- else if (BIT(pd, 15))
+ if (BIT(pd, 15))
{
m_r[SREG] |= SREG_MASK_N;
- if (!BIT(rr, 7))
- m_r[SREG] |= SREG_MASK_V;
- else
+ if (BIT(rr, 7))
m_r[SREG] |= SREG_MASK_S;
+ else
+ m_r[SREG] |= SREG_MASK_V;
+ }
+ else
+ {
+ if (pd == 0)
+ m_r[SREG] |= SREG_MASK_Z;
+ if (BIT(rr, 7))
+ m_r[SREG] |= SREG_MASK_C;
}
- if (BIT(rr, 7) && !BIT(pd, 15))
- m_r[SREG] |= SREG_MASK_C;
m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
}
@@ -1256,16 +1256,19 @@ void avr8_base_device::op_sbiw(uint16_t op)
const uint8_t rr = m_r[25 + (DCONST(op) << 1)];
const uint16_t pd = ((rr << 8) | rd) - KCONST6(op);
m_r[SREG] &= ~(SREG_MASK_V | SREG_MASK_N | SREG_MASK_S | SREG_MASK_Z | SREG_MASK_C);
- m_r[SREG] |= (pd == 0) ? SREG_MASK_Z : 0;
if (BIT(pd, 15))
{
+ m_r[SREG] |= SREG_MASK_N | SREG_MASK_S;
+ if (!BIT(rr, 7))
+ m_r[SREG] |= SREG_MASK_C;
+ }
+ else
+ {
+ if (pd == 0)
+ m_r[SREG] |= SREG_MASK_Z;
if (BIT(rr, 7))
- m_r[SREG] |= SREG_MASK_N | SREG_MASK_S | SREG_MASK_C;
- else
- m_r[SREG] |= SREG_MASK_N | SREG_MASK_S;
+ m_r[SREG] |= SREG_MASK_V | SREG_MASK_S;
}
- else if (BIT(rr, 7))
- m_r[SREG] |= SREG_MASK_V | SREG_MASK_S;
m_r[24 + (DCONST(op) << 1)] = pd & 0x00ff;
m_r[25 + (DCONST(op) << 1)] = (pd >> 8) & 0x00ff;
}
diff --git a/src/devices/cpu/axc51/axc51.h b/src/devices/cpu/axc51/axc51.h
index 291c4231414..8dccb9ce981 100644
--- a/src/devices/cpu/axc51/axc51.h
+++ b/src/devices/cpu/axc51/axc51.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff, Manuel Abadia, Couriersud, David Haywood
-#ifndef MAME_CPU_SFR_SFR_H
-#define MAME_CPU_SFR_SFR_H
+#ifndef MAME_CPU_AXC51_AXC51_H
+#define MAME_CPU_AXC51_AXC51_H
#pragma once
@@ -30,9 +30,9 @@ public:
auto spi_out_cb() { return m_spi_out_cb.bind(); }
auto spi_out_dir_cb() { return m_spi_out_dir_cb.bind(); }
- void program_internal(address_map &map);
- void data_internal(address_map &map);
- void io_internal(address_map &map);
+ void program_internal(address_map &map) ATTR_COLD;
+ void data_internal(address_map &map) ATTR_COLD;
+ void io_internal(address_map &map) ATTR_COLD;
protected:
// construction/destruction
@@ -40,13 +40,12 @@ protected:
axc51base_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map, address_map_constructor data_map, address_map_constructor io_map, int program_width, int data_width, uint8_t features = 0);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -524,12 +523,12 @@ public:
protected:
ax208_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
- void ax208_internal_program_mem(address_map &map);
+ void ax208_internal_program_mem(address_map &map) ATTR_COLD;
};
class ax208p_cpu_device : public ax208_cpu_device
@@ -539,8 +538,7 @@ public:
ax208p_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
};
-
-#endif // MAME_CPU_SFR_SFR_H
+#endif // MAME_CPU_AXC51_AXC51_H
diff --git a/src/devices/cpu/axc51/axc51dasm.h b/src/devices/cpu/axc51/axc51dasm.h
index a5b66315bbc..25438dcd2ea 100644
--- a/src/devices/cpu/axc51/axc51dasm.h
+++ b/src/devices/cpu/axc51/axc51dasm.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff, David Haywood
-#ifndef MAME_CPU_SFR_AXC51DASM_H
-#define MAME_CPU_SFR_AXC51DASM_H
+#ifndef MAME_CPU_AXC51_AXC51DASM_H
+#define MAME_CPU_AXC51_AXC51DASM_H
#pragma once
@@ -90,5 +90,4 @@ protected:
virtual void disassemble_op_lcall(std::ostream& stream, unsigned &PC, const data_buffer& params) override;
};
-
-#endif
+#endif // MAME_CPU_AXC51_AXC51DASM_H
diff --git a/src/devices/cpu/bcp/dp8344.h b/src/devices/cpu/bcp/dp8344.h
index aede18c32a0..f805b99fc50 100644
--- a/src/devices/cpu/bcp/dp8344.h
+++ b/src/devices/cpu/bcp/dp8344.h
@@ -65,13 +65,12 @@ protected:
dp8344_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u32 execute_min_cycles() const noexcept override { return 2; }
virtual u32 execute_max_cycles() const noexcept override { return 4; }
- virtual u32 execute_input_lines() const noexcept override { return 3; }
virtual void execute_run() override;
virtual void execute_set_input(int irqline, int state) override;
diff --git a/src/devices/cpu/c33/c33common.h b/src/devices/cpu/c33/c33common.h
new file mode 100644
index 00000000000..4cfd1167c72
--- /dev/null
+++ b/src/devices/cpu/c33/c33common.h
@@ -0,0 +1,29 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Common Epson C33 family stuff
+*/
+
+#ifndef MAME_CPU_C33_C33COMMON_H
+#define MAME_CPU_C33_C33COMMON_H
+
+#pragma once
+
+
+class c33_cpu_common
+{
+public:
+ // state indices
+ enum
+ {
+ C33_R0 = 1, C33_R1, C33_R2, C33_R3, C33_R4, C33_R5, C33_R6, C33_R7,
+ C33_R8, C33_R9, C33_R10, C33_R11, C33_R12, C33_R13, C33_R14, C33_R15,
+ C33_PSR, C33_SP,
+ C33_ALR, C33_AHR,
+ C33_LCO, C33_LSA, C33_LEA,
+ C33_SOR, C33_TTBR, C33_DP, C33_DBBR,
+ C33_USP, C33_SSP
+ };
+};
+
+#endif // MAME_CPU_C33_C33COMMON_H
diff --git a/src/devices/cpu/c33/c33dasm.cpp b/src/devices/cpu/c33/c33dasm.cpp
new file mode 100644
index 00000000000..08daaf81155
--- /dev/null
+++ b/src/devices/cpu/c33/c33dasm.cpp
@@ -0,0 +1,674 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson C33 disassembler
+
+ TODO:
+ * Only C33 ADV Core is currently supported - add support for C33 STD Core, C33 PE Core, etc.
+ * Reconstruct more assembler synthetics
+ * Should psrset and psrclr use symbolic names for bits?
+ * Should 32-bit extended displacements always be displayed as signed?
+ * Should loop instructions have friendlier syntax?
+*/
+
+#include "emu.h"
+#include "c33dasm.h"
+
+#include <tuple>
+#include <utility>
+
+
+namespace {
+
+char const *const special_reg_names[16] = {
+ "%psr",
+ "%sp",
+ "%alr",
+ "%ahr",
+ "%lco",
+ "%lca",
+ "%lea",
+ "%sor",
+ "%ttbr",
+ "%dp",
+ "%idir",
+ "%dbbr",
+ nullptr,
+ "%usp",
+ "%ssp",
+ "%pc" };
+
+std::pair<char const *, unsigned> const class_0_00_ops[32] = {
+ { "nop", 0 }, // 000 0000 0 00 00
+ { "slp", 0 }, // 000 0000 0 01 00
+ { "halt", 0 }, // 000 0000 0 10 00
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { "pushn %%r%1$u", 4 }, // 000 0001 0 00 00
+ { "popn %%r%1$u", 4 }, // 000 0001 0 01 00
+ { nullptr, 0 },
+ { "jpr %%r%1$u", 4 }, // 000 0001 0 11 00
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { "jpr.d %%r%1$u", 4 }, // 000 0001 1 11 00
+ { "brk", 0 }, // 000 0010 0 00 00
+ { "retd", 0 }, // 000 0010 0 01 00
+ { "int %1$u", 2 }, // 000 0010 0 10 00
+ { "reti", 0 }, // 000 0010 0 11 00
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { nullptr, 0 },
+ { "call %%r%1$u", 4 }, // 000 0011 0 00 00
+ { "ret", 0 }, // 000 0011 0 01 00
+ { "jp %%r%1$u", 4 }, // 000 0011 0 10 00
+ { "retm", 0 }, // 000 0011 0 11 00
+ { "call.d %%r%1$u", 4 }, // 000 0011 1 00 00
+ { "ret.d", 0 }, // 000 0011 1 01 00
+ { "jp.d %%r%1$u", 4 }, // 000 0011 1 10 00
+ { nullptr, 0 } };
+
+std::tuple<char const *, char const *, char const *, bool, bool> const class_0_01_ops[32] = {
+ { "push %%r%1$u", nullptr, nullptr, false, false }, // 000 0000 000 01
+ { "pop %%r%1$u", nullptr, nullptr, false, false }, // 000 0000 001 01
+ { "pushs %%r%3$s", nullptr, nullptr, true, false }, // 000 0000 010 01
+ { "pops %%r%3$s", nullptr, nullptr, true, false }, // 000 0000 011 01
+ { "mac.w %%r%1$u", nullptr, nullptr, false, false }, // 000 0000 100 01
+ { "mac.hw %%r%1$u", nullptr, nullptr, false, false }, // 000 0000 101 01
+ { "macclr", nullptr, nullptr, false, true }, // 000 0000 110 01
+ { "ld.cf", nullptr, nullptr, false, true }, // 000 0000 111 01
+ { "divu.w %%r%1$u", nullptr, nullptr, false, false }, // 000 0001 000 01
+ { "div.w %%r%1$u", nullptr, nullptr, false, false }, // 000 0001 001 01
+ { "repeat %%r%1$u", nullptr, nullptr, false, false }, // 000 0001 010 01
+ { "repeat %1$u", nullptr, nullptr, false, false }, // 000 0001 011 01
+ { nullptr, nullptr, nullptr, false, false },
+ { "add %%r%1$u,%%dp", "xadd %%r%1$u,%%dp,0x%2$x", "xadd %%r%1$u,%%dp,%%r%2$u", false, false }, // 000 0001 101 01
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false },
+ { nullptr, nullptr, nullptr, false, false } };
+
+std::pair<char const *, char const *> const class_0_jumps[16] = {
+ { nullptr, nullptr },
+ { nullptr, nullptr },
+ { nullptr, nullptr },
+ { nullptr, nullptr },
+ { "jrgt%1$s 0x%2$x", "xjrgt%1$s 0x%2$x" }, // 000 0100
+ { "jrge%1$s 0x%2$x", "xjrge%1$s 0x%2$x" }, // 000 0101
+ { "jrlt%1$s 0x%2$x", "xjrlt%1$s 0x%2$x" }, // 000 0110
+ { "jrle%1$s 0x%2$x", "xjrle%1$s 0x%2$x" }, // 000 0111
+ { "jrugt%1$s 0x%2$x", "xjrugt%1$s 0x%2$x" }, // 000 1000
+ { "jruge%1$s 0x%2$x", "xjruge%1$s 0x%2$x" }, // 000 1001
+ { "jrult%1$s 0x%2$x", "xjrult%1$s 0x%2$x" }, // 000 1010
+ { "jrule%1$s 0x%2$x", "xjrule%1$s 0x%2$x" }, // 000 1011
+ { "jreq%1$s 0x%2$x", "xjreq%1$s 0x%2$x" }, // 000 1100
+ { "jrne%1$s 0x%2$x", "xjrne%1$s 0x%2$x" }, // 000 1101
+ { "call%1$s 0x%2$x", "xcall%1$s 0x%2$x" }, // 000 1110
+ { "jp%1$s 0x%2$x", "xjp%1$s 0x%2$x" } }; // 000 1111
+
+std::tuple<char const *, char const *, char const *> const class_1_ops[32] = {
+ { "ld.b %%r%1$u,[%%r%2$u]", "xld.b %%r%1$u,[%%r%2$u + 0x%4$x]", "xld.b %%r%1$u,[%%r%2$u + %%r%4$u]" }, // 001 000 00
+ { "ld.b %%r%1$u,[%%r%2$u]+", nullptr, nullptr }, // 001 000 01
+ { "add %%r%1$u,%%r%2$u", "xadd %%r%1$u,%%r%2$u,0x%4$x", "xadd %%r%1$u,%%r%2$u,%%r%4$u" }, // 001 000 10
+ { "srl %%r%1$u,%3$u", nullptr, "xsrl %%r%1$u,%%r%4$u,%3$u" }, // 001 000 11
+ { "ld.ub %%r%1$u,[%%r%2$u]", "xld.ub %%r%1$u,[%%r%2$u + 0x%4$x]", "xld.ub %%r%1$u,[%%r%2$u + %%r%4$u]" }, // 001 001 00
+ { "ld.ub %%r%1$u,[%%r%2$u]+", nullptr, nullptr }, // 001 001 01
+ { "sub %%r%1$u,%%r%2$u", "xsub %%r%1$u,%%r%2$u,0x%4$x", "xsub %%r%1$u,%%r%2$u,%%r%4$u" }, // 001 001 10
+ { "sll %%r%1$u,%3$u", nullptr, "xsll %%r%1$u,%%r%4$u,%3$u" }, // 001 001 11
+ { "ld.h %%r%1$u,[%%r%2$u]", "xld.h %%r%1$u,[%%r%2$u + 0x%4$x]", "xld.h %%r%1$u,[%%r%2$u + %%r%4$u]" }, // 001 010 00
+ { "ld.h %%r%1$u,[%%r%2$u]+", nullptr, nullptr }, // 001 010 01
+ { "cmp %%r%1$u,%%r%2$u", nullptr, nullptr }, // 001 010 10
+ { "sra %%r%1$u,%3$u", nullptr, "xsra %%r%1$u,%%r%4$u,%3$u" }, // 001 010 11
+ { "ld.uh %%r%1$u,[%%r%2$u]", "xld.uh %%r%1$u,[%%r%2$u + 0x%4$x]", "xld.uh %%r%1$u,[%%r%2$u + %%r%4$u]" }, // 001 011 00
+ { "ld.uh %%r%1$u,[%%r%2$u]+", nullptr, nullptr }, // 001 011 01
+ { "ld.w %%r%1$u,%%r%2$u", nullptr, nullptr }, // 001 011 10
+ { "sla %%r%1$u,%3$u", nullptr, "xsla %%r%1$u,%%r%4$u,%3$u" }, // 001 011 11
+ { "ld.w %%r%1$u,[%%r%2$u]", "xld.w %%r%1$u,[%%r%2$u + 0x%4$x]", "xld.w %%r%1$u,[%%r%2$u + %%r%4$u]" }, // 001 100 00
+ { "ld.w %%r%1$u,[%%r%2$u]+", nullptr, nullptr }, // 001 100 01
+ { "and %%r%1$u,%%r%2$u", "xand %%r%1$u,%%r%2$u,0x%4$x", "xand %%r%1$u,%%r%2$u,%%r%4$u" }, // 001 100 10
+ { "rr %%r%1$u,%3$u", nullptr, "xrr %%r%1$u,%%r%4$u,%3$u" }, // 001 100 11
+ { "ld.b [%%r%2$u],%%r%1$u", "xld.b [%%r%2$u + 0x%4$x],%%r%1$u", "xld.b [%%r%2$u + %%r%4$u],%%r%1$u" }, // 001 101 00
+ { "ld.b [%%r%2$u]+,%%r%1$u", nullptr, nullptr }, // 001 101 01
+ { "or %%r%1$u,%%r%2$u", "xoor %%r%1$u,%%r%2$u,0x%4$x", "xoor %%r%1$u,%%r%2$u,%%r%4$u" }, // 001 101 10
+ { "rl %%r%1$u,%3$u", nullptr, "xrl %%r%1$u,%%r%4$u,%3$u" }, // 001 101 11
+ { "ld.h [%%r%2$u],%%r%1$u", "xld.h [%%r%2$u + 0x%4$x],%%r%1$u", "xld.h [%%r%2$u + %%r%4$u],%%r%1$u" }, // 001 110 00
+ { "ld.h [%%r%2$u]+,%%r%1$u", nullptr, nullptr }, // 001 110 01
+ { "xor %%r%1$u,%%r%2$u", "xxor %%r%1$u,%%r%2$u,0x%4$x", "xxor %%r%1$u,%%r%2$u,%%r%4$u" }, // 001 110 10
+ { nullptr, nullptr, nullptr },
+ { "ld.w [%%r%2$u],%%r%1$u", "xld.w [%%r%2$u + 0x%4$x],%%r%1$u", "xld.w [%%r%2$u + %%r%4$u],%%r%1$u" }, // 001 111 00
+ { "ld.w [%%r%2$u]+,%%r%1$u", nullptr, nullptr }, // 001 111 01
+ { "not %%r%1$u,%%r%2$u", nullptr, nullptr }, // 001 111 10
+ { nullptr, nullptr, nullptr } };
+
+char const *const class_1_ext_shifts[4] = {
+ nullptr,
+ "ext sra,%1$u", // 001 110 11 0000 01
+ "ext srl,%1$u", // 001 110 11 0000 10
+ "ext sll,%1$u" }; // 001 110 11 0000 11
+
+char const *const class_1_ext_predicates[16] = {
+ nullptr,
+ nullptr,
+ nullptr,
+ nullptr,
+ "ext gt", // 001 110 11 0100
+ "ext ge", // 001 110 11 0101
+ "ext lt", // 001 110 11 0110
+ "ext le", // 001 110 11 0111
+ "ext ugt", // 001 110 11 1000
+ "ext uge", // 001 110 11 1001
+ "ext ult", // 001 110 11 1010
+ "ext ule", // 001 110 11 1011
+ "ext eq", // 001 110 11 1100
+ "ext ne", // 001 110 11 1101
+ nullptr,
+ nullptr };
+
+std::pair<char const *, bool> class_1_ext_3[4] = {
+ { "ext %%r%1$u", true },
+ { "ext %%r%1$u,sra,%2$u", false },
+ { "ext %%r%1$u,srl,%2$u", false },
+ { "ext %%r%1$u,sll,%2$u", false } };
+
+std::tuple<char const *, char const *, unsigned> const class_2_3_ops[16] = {
+ { "ld.b %%r%1$u,[%%sp + 0x%2$x]", "xld.b %%r%1$u,[%%sp + 0x%2$x]", 1 }, // 010 000
+ { "ld.ub %%r%1$u,[%%sp + 0x%2$x]", "xld.ub %%r%1$u,[%%sp + 0x%2$x]", 1 }, // 010 001
+ { "ld.h %%r%1$u,[%%sp + 0x%2$x]", "xld.h %%r%1$u,[%%sp + 0x%2$x]", 2 }, // 010 010
+ { "ld.uh %%r%1$u,[%%sp + 0x%2$x]", "xld.uh %%r%1$u,[%%sp + 0x%2$x]", 2 }, // 010 011
+ { "ld.w %%r%1$u,[%%sp + 0x%2$x]", "xld.w %%r%1$u,[%%sp + 0x%2$x]", 4 }, // 010 100
+ { "ld.b [%%sp + 0x%2$x],%%r%1$u", "xld.b [%%sp + 0x%2$x],%%r%1$u", 1 }, // 010 101
+ { "ld.h [%%sp + 0x%2$x],%%r%1$u", "xld.h [%%sp + 0x%2$x],%%r%1$u", 2 }, // 010 110
+ { "ld.w [%%sp + 0x%2$x],%%r%1$u", "xld.w [%%sp + 0x%2$x],%%r%1$u", 4 }, // 010 111
+ { "add %%r%1$u,0x%2$x", "xadd %%r%1$u,0x%2$x", 1 }, // 011 000
+ { "sub %%r%1$u,0x%2$x", "xsub %%r%1$u,0x%2$x", 1 }, // 011 001
+ { "cmp %%r%1$u,%5$s0x%4$x", "xcmp %%r%1$u,%5$s0x%4$x", 1 }, // 011 010
+ { "ld.w %%r%1$u,%5$s0x%4$x", "xld.w %%r%1$u,%5$s0x%4$x", 1 }, // 011 011
+ { "and %%r%1$u,0x%3$x", "xand %%r%1$u,0x%3$x", 1 }, // 011 100
+ { "or %%r%1$u,0x%3$x", "xoor %%r%1$u,0x%3$x", 1 }, // 011 101
+ { "xor %%r%1$u,0x%3$x", "xxor %%r%1$u,0x%3$x", 1 }, // 011 110
+ { "not %%r%1$u,0x%3$x", "xnot %%r%1$u,0x%3$x", 1 } }; // 011 111
+
+std::tuple<char const *, char const *, bool> const class_4_ops[32] = {
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { nullptr, nullptr, false },
+ { "srl %%r%1$u,%2$u", "xsrl %%r%1$u,%%r%3$u,%2$u", false }, // 100 010 00
+ { "srl %%r%1$u,%%r%2$u", "xsrl %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 010 01
+ { "scan0 %%r%1$u,%%r%2$u", nullptr, false }, // 100 010 10
+ { "div0s %%r%2$u", nullptr, true }, // 100 010 11
+ { "sll %%r%1$u,%2$u", "xsll %%r%1$u,%%r%3$u,%2$u", false }, // 100 011 00
+ { "sll %%r%1$u,%%r%2$u", "xsll %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 011 01
+ { "scan1 %%r%1$u,%%r%2$u", nullptr, false }, // 100 011 10
+ { "div0u %%r%2$u", nullptr, true }, // 100 011 11
+ { "sra %%r%1$u,%2$u", "xsra %%r%1$u,%%r%3$u,%2$u", false }, // 100 100 00
+ { "sra %%r%1$u,%%r%2$u", "xsra %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 100 01
+ { "swap %%r%1$u,%%r%2$u", nullptr, false }, // 100 100 10
+ { "div1 %%r%2$u", nullptr, true }, // 100 100 11
+ { "sla %%r%1$u,%2$u", "xsla %%r%1$u,%%r%3$u,%2$u", false }, // 100 101 00
+ { "sla %%r%1$u,%%r%2$u", "xsla %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 101 01
+ { "mirror %%r%1$u,%%r%2$u", nullptr, false }, // 100 101 10
+ { "div2s %%r%2$u", nullptr, true }, // 100 101 11
+ { "rr %%r%1$u,%2$u", "xrr %%r%1$u,%%r%3$u,%2$u", false }, // 100 110 00
+ { "rr %%r%1$u,%%r%2$u", "xrr %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 110 01
+ { "swaph %%r%1$u,%%r%2$u", nullptr, false }, // 100 110 10
+ { "div3s %%r%2$u", nullptr, true }, // 100 110 11
+ { "rl %%r%1$u,%2$u", "xrl %%r%1$u,%%r%3$u,%2$u", false }, // 100 111 00
+ { "rl %%r%1$u,%%r%2$u", "xrl %%r%1$u,%%r%3$u,%%r%2$u", false }, // 100 111 01
+ { "sat.b %%r%1$u,%%r%2$u", nullptr, false }, // 100 111 10
+ { "sat.ub %%r%1$u,%%r%2$u", nullptr, false } }; // 100 111 11
+
+std::tuple<char const *, char const *, char const *, unsigned, unsigned> const class_5_ops[32] = {
+ { "ld.w %4$s,%%r%2$d", nullptr, nullptr, 4, 1 }, // 101 000 00
+ { "ld.b %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 000 01
+ { "mlt.h %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 000 10
+ { "mlt.hw %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 000 11
+ { "ld.w %%r%1$d,%4$s", nullptr, nullptr, 4, 2 }, // 101 001 00
+ { "ld.ub %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 001 01
+ { "mltu.h %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 001 10
+ { "mac1.h %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 001 11
+ { "btst [%%r%2$u],%1$u", "xbtst [%%r%2$u + 0x%3$x],%1$u", nullptr, 3, 0 }, // 101 010 00
+ { "ld.h %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 010 01
+ { "mlt.w %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 010 10
+ { "mac1.hw %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 010 11
+ { "bclr [%%r%2$u],%1$u", "xbclr [%%r%2$u + 0x%3$x],%1$u", nullptr, 3, 0 }, // 101 011 00
+ { "ld.uh %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 011 01
+ { "mltu.w %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 011 10
+ { nullptr, nullptr, nullptr, 0, 0 },
+ { "bset [%%r%2$u],%1$u", "xbset [%%r%2$u + 0x%3$x],%1$u", nullptr, 3, 0 }, // 101 100 00
+ { "ld.c %%r%1$u,0x%2$x", nullptr, nullptr, 4, 0 }, // 101 100 01
+ { "mac %%r%2$u", nullptr, nullptr, 0, 0 }, // 101 100 10
+ { "mac1.w %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 100 11
+ { "bnot [%%r%2$u],%1$u", "xbnot [%%r%2$u + 0x%3$x],%1$u", nullptr, 3, 0 }, // 101 101 00
+ { "ld.c 0x%2$x,%%r%1$u", nullptr, nullptr, 4, 0 }, // 101 101 01
+ { "sat.h %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 101 10
+ { "sat.uh %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 101 11
+ { "adc %%r%1$u,%%r%2$u", nullptr, "xadc %%r%1$u,%%r%2$u,%%r%3$u", 4, 0 }, // 101 110 00
+ { "loop %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 110 01
+ { "loop %%r%1$u,%2$u", nullptr, nullptr, 4, 0 }, // 101 110 10
+ { "loop %1$u,%2$u", nullptr, nullptr, 4, 0 }, // 101 110 11
+ { "sbc %%r%1$u,%%r%2$u", nullptr, "xsbc %%r%1$u,%%r%2$u,%%r%3$u", 4, 0 }, // 101 111 00
+ { "sat.w %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 111 01
+ { "sat.uw %%r%1$u,%%r%2$u", nullptr, nullptr, 4, 0 }, // 101 111 10
+ { nullptr, nullptr, nullptr, 0, 0 } };
+
+std::tuple<char const *, char const *, unsigned> const class_7_ops[8] = {
+ { "ld.b %%r%1$u,[%%dp + 0x%2$x]", "xld.b %%r%1$u,[%%dp + 0x%2$x]", 1 }, // 111 000
+ { "ld.ub %%r%1$u,[%%dp + 0x%2$x]", "xld.ub %%r%1$u,[%%dp + 0x%2$x]", 1 }, // 111 001
+ { "ld.h %%r%1$u,[%%dp + 0x%2$x]", "xld.h %%r%1$u,[%%dp + 0x%2$x]", 2 }, // 111 010
+ { "ld.uh %%r%1$u,[%%dp + 0x%2$x]", "xld.uh %%r%1$u,[%%dp + 0x%2$x]", 2 }, // 111 011
+ { "ld.w %%r%1$u,[%%dp + 0x%2$x]", "xld.w %%r%1$u,[%%dp + 0x%2$x]", 4 }, // 111 100
+ { "ld.b [%%dp + 0x%2$x],%%r%1$u", "xld.b [%%dp + 0x%2$x],%%r%1$u", 1 }, // 111 101
+ { "ld.h [%%dp + 0x%2$x],%%r%1$u", "xld.h [%%dp + 0x%2$x],%%r%1$u", 2 }, // 111 110
+ { "ld.w [%%dp + 0x%2$x],%%r%1$u", "xld.w [%%dp + 0x%2$x],%%r%1$u", 4 } }; // 111 111
+
+} // anonymous namespace
+
+
+struct c33_disassembler::ext_info
+{
+ offs_t size() const
+ {
+ switch (type)
+ {
+ case ext_type::NONE:
+ return 0;
+ case ext_type::IMM13:
+ return 2;
+ case ext_type::IMM26:
+ return 4;
+ case ext_type::REG:
+ return 2;
+ }
+
+ throw false; // something is very wrong if we get here
+ }
+
+ unsigned bits() const
+ {
+ switch (type)
+ {
+ case ext_type::NONE:
+ return 0;
+ case ext_type::IMM13:
+ return 13;
+ case ext_type::IMM26:
+ return 26;
+ case ext_type::REG:
+ return 4;
+ }
+
+ throw false; // something is very wrong if we get here
+ }
+
+ char const *inst(char const *base, char const *ext_imm, char const *ext_reg) const
+ {
+ switch (type)
+ {
+ case ext_type::NONE:
+ return base;
+ case ext_type::IMM13:
+ case ext_type::IMM26:
+ return ext_imm;
+ case ext_type::REG:
+ return ext_reg;
+ }
+
+ throw false; // something is very wrong if we get here
+ }
+
+ ext_type type = ext_type::NONE;
+ u32 val = 0;
+ u16 op = 0;
+};
+
+
+c33_disassembler::c33_disassembler()
+{
+}
+
+
+u32 c33_disassembler::opcode_alignment() const
+{
+ return 2;
+}
+
+
+offs_t c33_disassembler::disassemble(
+ std::ostream &stream,
+ offs_t pc,
+ data_buffer const &opcodes,
+ data_buffer const &params)
+{
+ u16 op;
+
+ ext_info ext;
+ op = opcodes.r16(pc);
+ if (BIT(op, 13, 3) == 6)
+ {
+ ext.type = ext_type::IMM13;
+ ext.val = BIT(op, 0, 13);
+ ext.op = op;
+ op = opcodes.r16(pc + 2);
+ if (BIT(op, 13, 3) == 6)
+ {
+ ext.type = ext_type::IMM26;
+ ext.val = (ext.val << 13) | BIT(op, 0, 13);
+ op = opcodes.r16(pc + 4);
+ }
+ }
+ else if ((op & 0b111'111'11'0000'1111) == 0b001'111'11'0000'0000)
+ {
+ ext.type = ext_type::REG;
+ ext.val = BIT(op, 4, 4);
+ ext.op = op;
+ op = opcodes.r16(pc + 2);
+ }
+
+ return dasm(stream, pc, op, ext);
+}
+
+
+offs_t c33_disassembler::dasm(std::ostream &stream, offs_t pc, u16 op, ext_info const &ext) const
+{
+ switch (BIT(op, 13, 3))
+ {
+ case 0:
+ if (offs_t const r = dasm_class_0(stream, pc, op, ext); r)
+ return r;
+ break;
+ case 1:
+ if (offs_t const r = dasm_class_1(stream, op, ext); r)
+ return r;
+ break;
+ case 2:
+ case 3:
+ if (offs_t const r = dasm_class_2_3(stream, op, ext); r)
+ return r;
+ break;
+ case 4:
+ if (offs_t const r = dasm_class_4(stream, op, ext); r)
+ return r;
+ break;
+ case 5:
+ if (offs_t const r = dasm_class_5(stream, op, ext); r)
+ return r;
+ break;
+ case 6:
+ if (offs_t const r = dasm_class_6(stream, op, ext); r)
+ return r;
+ break;
+ case 7:
+ if (offs_t const r = dasm_class_7(stream, op, ext); r)
+ return r;
+ break;
+ };
+
+ if (ext_type::NONE != ext.type)
+ return dasm(stream, pc, ext.op, ext_info());
+
+ stream << "<invalid>";
+ return 2;
+}
+
+
+offs_t c33_disassembler::dasm_class_0(std::ostream &stream, offs_t pc, u16 op, ext_info const &ext) const
+{
+ switch (BIT(op, 9, 4))
+ {
+ case 0b0000:
+ case 0b0001:
+ case 0b0010:
+ case 0b0011:
+ if (BIT(op, 4, 2) == 0)
+ {
+ auto const [inst, target_bits] = class_0_00_ops[BIT(op, 6, 5)];
+ if (inst && ((4 == target_bits) || !BIT(op, target_bits, 4 - target_bits)))
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, inst, BIT(op, 0, 4));
+ return 2;
+ }
+ }
+ else if (BIT(op, 4, 2) == 1)
+ {
+ auto const [inst, inst_ext_imm, inst_ext_reg, use_special_reg, no_arg] = class_0_01_ops[BIT(op, 6, 5)];
+ char const *const special_reg = use_special_reg ? special_reg_names[BIT(op, 0, 4)] : nullptr;
+ if (inst && (!use_special_reg || special_reg) && (!no_arg || !BIT(op, 0, 4)))
+ {
+ char const *const fmt = ext.inst(inst, inst_ext_imm, inst_ext_reg);
+ if (!fmt)
+ return 0;
+
+ util::stream_format(stream, fmt, BIT(op, 0, 4), ext.val, special_reg);
+ return 2 + ext.size();
+ }
+ }
+ break;
+
+ default:
+ {
+ auto const [inst, inst_ext_imm] = class_0_jumps[BIT(op, 9, 5)];
+ char const *const fmt = ext.inst(inst, inst_ext_imm, nullptr);
+ if (!fmt)
+ return 0;
+
+ s32 imm = (BIT(ext.val, 16, 10) << 22) | (BIT(ext.val, 0, 13) << 9) | (BIT(op, 0, 8) << 1);
+ if (ext_type::NONE == ext.type)
+ imm = util::sext(imm, 9);
+ else if (ext_type::IMM13 == ext.type)
+ imm = util::sext(imm, 22);
+
+ util::stream_format(stream, fmt, BIT(op, 8) ? ".d" : " ", pc + ext.size() + imm);
+ return 2 + ext.size();
+ }
+ }
+
+ return 0; // catch invalid forms
+}
+
+offs_t c33_disassembler::dasm_class_1(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ switch (BIT(op, 8, 5))
+ {
+ case 0b110'11:
+ if (!BIT(op, 4, 4))
+ {
+ char const *const inst = class_1_ext_shifts[BIT(op, 2, 2)];
+ if (inst)
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, inst, BIT(op, 0, 2));
+ return 2;
+ }
+ }
+ else
+ {
+ char const *const inst = class_1_ext_predicates[BIT(op, 4, 4)];
+ if (inst && !BIT(op, 0, 4))
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ stream << inst;
+ return 2;
+ }
+ }
+ break;
+
+ case 0b111'11:
+ {
+ auto const [inst, no_imm] = class_1_ext_3[BIT(op, 2, 2)];
+ if (!no_imm || !BIT(op, 0, 2))
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, inst, BIT(op, 4, 4), BIT(op, 0, 2));
+ return 2;
+ }
+ }
+ break;
+
+ default:
+ {
+ auto const [inst, inst_ext_imm, inst_ext_reg] = class_1_ops[BIT(op, 8, 5)];
+ char const *const fmt = ext.inst(inst, inst_ext_imm, inst_ext_reg);
+ if (!fmt)
+ return 0;
+
+ util::stream_format(stream, fmt, BIT(op, 0, 4), BIT(op, 4, 4), 0x10 | BIT(op, 4, 4), ext.val);
+ return 2 + ext.size();
+ }
+ }
+
+ return 0; // catch invalid ext forms
+}
+
+
+offs_t c33_disassembler::dasm_class_2_3(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ auto const [inst, inst_ext_imm, mul] = class_2_3_ops[BIT(op, 10, 4)];
+ char const *const fmt = ext.inst(inst, inst_ext_imm, nullptr);
+ if (!fmt)
+ return 0;
+
+ u8 const reg = BIT(op, 0, 4);
+ u32 imm = (ext.val << 6) | BIT(op, 4, 6);
+ s32 simm = util::sext(imm, 6 + ext.bits());
+ u32 abs = std::abs(simm);
+ char const *const sign = (0 > simm) ? "-" : "";
+ if (ext_type::NONE == ext.type)
+ {
+ imm *= mul;
+ simm *= mul;
+ abs *= mul;
+ }
+ util::stream_format(stream, fmt, reg, imm, simm, abs, sign);
+ return 2 + ext.size();
+}
+
+
+offs_t c33_disassembler::dasm_class_4(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ if (BIT(op, 11, 2) == 0)
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, BIT(op, 10) ? "sub %%sp,0x%1$x" : "add %%sp,0x%1$x", BIT(op, 0, 10) * 4);
+ return 2;
+ }
+ else
+ {
+ auto const [inst, inst_ext_reg, no_dest] = class_4_ops[BIT(op, 8, 5)];
+ if (!no_dest || !BIT(op, 0, 4))
+ {
+ char const *const fmt = ext.inst(inst, nullptr, inst_ext_reg);
+ if (!fmt)
+ return 0;
+
+ util::stream_format(stream, fmt, BIT(op, 0, 4), BIT(op, 4, 4), ext.val);
+ return 2 + ext.size();
+ }
+ }
+
+ return 0; // catch invalid forms of division instructions
+}
+
+
+offs_t c33_disassembler::dasm_class_5(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ if (BIT(op, 6, 7) == 0b111'11'00)
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, "do.c 0x%1$x", BIT(op, 0, 6));
+ return 2;
+ }
+ else if (BIT(op, 5, 8) == 0b111'11'01'0)
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, "psrset %1$u", BIT(op, 0, 5));
+ return 2;
+ }
+ else if (BIT(op, 5, 8) == 0b111'11'10'0)
+ {
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, "psrclr %1$u", BIT(op, 0, 5));
+ return 2;
+ }
+ else
+ {
+ auto const [inst, inst_ext_imm, inst_ext_reg, target_bits, special_reg_pos] = class_5_ops[BIT(op, 8, 5)];
+ char const *const special_reg = special_reg_pos ? special_reg_names[BIT(op, (special_reg_pos - 1) * 4, 4)] : nullptr;
+ if (inst && (!special_reg_pos || special_reg) && ((4 == target_bits) || !BIT(op, target_bits, 4 - target_bits)))
+ {
+ char const *const fmt = ext.inst(inst, inst_ext_imm, inst_ext_reg);
+ if (!fmt)
+ return 0;
+
+ util::stream_format(stream, fmt, BIT(op, 0, 4), BIT(op, 4, 4), ext.val, special_reg);
+ return 2 + ext.size();
+ }
+ }
+
+ return 0; // catch invalid forms
+}
+
+
+offs_t c33_disassembler::dasm_class_6(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ if (ext_type::NONE != ext.type)
+ return 0;
+
+ util::stream_format(stream, "ext 0x%1$x", BIT(op, 0, 13));
+ return 2;
+}
+
+
+offs_t c33_disassembler::dasm_class_7(std::ostream &stream, u16 op, ext_info const &ext) const
+{
+ auto const [inst, inst_ext_imm, mul] = class_7_ops[BIT(op, 10, 3)];
+ char const *const fmt = ext.inst(inst, inst_ext_imm, nullptr);
+ if (!fmt)
+ return 0;
+
+ u8 const reg = BIT(op, 0, 4);
+ u32 imm = (ext.val << 6) | BIT(op, 4, 6);
+ if (ext_type::NONE == ext.type)
+ imm *= mul;
+ util::stream_format(stream, fmt, reg, imm);
+ return 2 + ext.size();
+}
diff --git a/src/devices/cpu/c33/c33dasm.h b/src/devices/cpu/c33/c33dasm.h
new file mode 100644
index 00000000000..4eee7652526
--- /dev/null
+++ b/src/devices/cpu/c33/c33dasm.h
@@ -0,0 +1,37 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson C33 disassembler
+*/
+
+#ifndef MAME_CPU_C33_C33DASM_H
+#define MAME_CPU_C33_C33DASM_H
+
+#pragma once
+
+
+class c33_disassembler : public util::disasm_interface
+{
+public:
+ c33_disassembler();
+
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, data_buffer const &opcodes, data_buffer const &params) override;
+
+private:
+ enum class ext_type { NONE, IMM13, IMM26, REG };
+
+ struct ext_info;
+
+ offs_t dasm(std::ostream &stream, offs_t pc, u16 op, ext_info const &ext) const;
+
+ offs_t dasm_class_0(std::ostream &stream, offs_t pc, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_1(std::ostream &stream, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_2_3(std::ostream &stream, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_4(std::ostream &stream, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_6(std::ostream &stream, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_5(std::ostream &stream, u16 op, ext_info const &ext) const;
+ offs_t dasm_class_7(std::ostream &stream, u16 op, ext_info const &ext) const;
+};
+
+#endif // MAME_CPU_C33_C33DASM_H
diff --git a/src/devices/cpu/c33/c33helpers.ipp b/src/devices/cpu/c33/c33helpers.ipp
new file mode 100644
index 00000000000..38aaaa0a2f7
--- /dev/null
+++ b/src/devices/cpu/c33/c33helpers.ipp
@@ -0,0 +1,64 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson C33 shared helper functions and constants
+*/
+#ifndef MAME_CPU_C33_C33HELPERS_IPP
+#define MAME_CPU_C33_C33HELPERS_IPP
+
+#pragma once
+
+
+enum
+{
+ PSR_BIT_N = 0,
+ PSR_BIT_Z = 1,
+ PSR_BIT_V = 2,
+ PSR_BIT_C = 3,
+ PSR_BIT_IE = 4,
+ PSR_BIT_DS = 6,
+ PSR_BIT_MO = 7,
+ PSR_BIT_IL = 8,
+ PSR_BIT_SV = 12,
+ PSR_BIT_ME = 13,
+ PSR_BIT_DE = 14,
+ PSR_BIT_S = 15,
+ PSR_BIT_HC = 16,
+ PSR_BIT_LC = 17,
+ PSR_BIT_SE = 20,
+ PSR_BIT_OC = 21,
+ PSR_BIT_SW = 22,
+ PSR_BIT_RC = 24,
+ PSR_BIT_PM = 28,
+ PSR_BIT_LM = 29,
+ PSR_BIT_RM = 30,
+ PSR_BIT_HE = 31
+};
+
+enum : u32
+{
+ PSR_MASK_N = u32(0x1) << PSR_BIT_N,
+ PSR_MASK_Z = u32(0x1) << PSR_BIT_Z,
+ PSR_MASK_V = u32(0x1) << PSR_BIT_V,
+ PSR_MASK_C = u32(0x1) << PSR_BIT_C,
+ PSR_MASK_IE = u32(0x1) << PSR_BIT_IE,
+ PSR_MASK_DS = u32(0x1) << PSR_BIT_DS,
+ PSR_MASK_MO = u32(0x1) << PSR_BIT_MO,
+ PSR_MASK_IL = u32(0xf) << PSR_BIT_IL,
+ PSR_MASK_SV = u32(0x1) << PSR_BIT_SV,
+ PSR_MASK_ME = u32(0x1) << PSR_BIT_ME,
+ PSR_MASK_DE = u32(0x1) << PSR_BIT_DE,
+ PSR_MASK_S = u32(0x1) << PSR_BIT_S,
+ PSR_MASK_HC = u32(0x1) << PSR_BIT_HC,
+ PSR_MASK_LC = u32(0x1) << PSR_BIT_LC,
+ PSR_MASK_SE = u32(0x1) << PSR_BIT_SE,
+ PSR_MASK_OC = u32(0x1) << PSR_BIT_OC,
+ PSR_MASK_SW = u32(0x1) << PSR_BIT_SW,
+ PSR_MASK_RC = u32(0xf) << PSR_BIT_RC,
+ PSR_MASK_PM = u32(0x1) << PSR_BIT_PM,
+ PSR_MASK_LM = u32(0x1) << PSR_BIT_LM,
+ PSR_MASK_RM = u32(0x1) << PSR_BIT_RM,
+ PSR_MASK_HE = u32(0x1) << PSR_BIT_HE
+};
+
+#endif // MAME_CPU_C33_C33HELPERS_IPP
diff --git a/src/devices/cpu/c33/c33std.cpp b/src/devices/cpu/c33/c33std.cpp
new file mode 100644
index 00000000000..a4b0438d1b3
--- /dev/null
+++ b/src/devices/cpu/c33/c33std.cpp
@@ -0,0 +1,117 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson C33 STD Core (S1C33000)
+*/
+
+#include "emu.h"
+#include "c33std.h"
+
+#include "c33dasm.h"
+
+#include <algorithm>
+#include <iterator>
+#include <utility>
+
+#include "c33helpers.ipp"
+
+
+c33std_cpu_device_base::c33std_cpu_device_base(
+ machine_config const &mconfig,
+ device_type type,
+ char const *tag,
+ device_t *owner,
+ u32 clock,
+ address_map_constructor internal_map) :
+ cpu_device(mconfig, type, tag, owner, clock),
+ m_memory_config("memory", ENDIANNESS_LITTLE, 16, 28, 0, internal_map),
+ m_icount(0)
+{
+}
+
+
+void c33std_cpu_device_base::device_start()
+{
+ set_icountptr(m_icount);
+
+ space(AS_PROGRAM).cache(m_opcodes);
+ space(AS_PROGRAM).specific(m_data);
+
+ std::fill(std::begin(m_gprs), std::end(m_gprs), 0);
+ m_pc = 0;
+ m_psr = 0;
+ m_sp = 0;
+ m_alr = 0;
+ m_ahr = 0;
+
+ save_item(NAME(m_gprs));
+ save_item(NAME(m_pc));
+ save_item(NAME(m_psr));
+ save_item(NAME(m_sp));
+ save_item(NAME(m_alr));
+ save_item(NAME(m_ahr));
+
+ state_add(STATE_GENPC, "PC", m_pc ).mask(0xffff'fffe);
+ state_add(STATE_GENPCBASE, "PCBASE", m_pc ).mask(0xffff'fffe).noshow();
+ state_add(STATE_GENFLAGS, "GENGLAGS", m_psr ).mask(0x0000'0fdf).formatstr("%4s").noshow();
+ state_add(C33_R0, "R0", m_gprs[0] );
+ state_add(C33_R1, "R1", m_gprs[1] );
+ state_add(C33_R2, "R2", m_gprs[2] );
+ state_add(C33_R3, "R3", m_gprs[3] );
+ state_add(C33_R4, "R4", m_gprs[4] );
+ state_add(C33_R5, "R5", m_gprs[5] );
+ state_add(C33_R6, "R6", m_gprs[6] );
+ state_add(C33_R7, "R7", m_gprs[7] );
+ state_add(C33_R8, "R8", m_gprs[8] );
+ state_add(C33_R9, "R9", m_gprs[9] );
+ state_add(C33_R10, "R10", m_gprs[10]);
+ state_add(C33_R11, "R11", m_gprs[11]);
+ state_add(C33_R12, "R12", m_gprs[12]);
+ state_add(C33_R13, "R13", m_gprs[13]);
+ state_add(C33_R14, "R14", m_gprs[14]);
+ state_add(C33_R15, "R15", m_gprs[15]);
+ state_add(C33_PSR, "PSR", m_psr ).mask(0x0000'0fdf);
+ state_add(C33_SP, "SP", m_sp );
+ state_add(C33_ALR, "ALR", m_alr );
+ state_add(C33_AHR, "AHR", m_ahr );
+}
+
+
+void c33std_cpu_device_base::device_reset()
+{
+ m_psr = 0;
+}
+
+
+void c33std_cpu_device_base::execute_run()
+{
+ debugger_instruction_hook(m_pc);
+ m_icount = 0;
+}
+
+
+device_memory_interface::space_config_vector c33std_cpu_device_base::memory_space_config() const
+{
+ return space_config_vector{ std::make_pair(AS_PROGRAM, &m_memory_config) };
+}
+
+
+std::unique_ptr<util::disasm_interface> c33std_cpu_device_base::create_disassembler()
+{
+ return std::make_unique<c33_disassembler>();
+}
+
+
+void c33std_cpu_device_base::state_string_export(device_state_entry const &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = util::string_format("%c%c%c%c",
+ (m_psr & PSR_MASK_C) ? 'C' : 'c',
+ (m_psr & PSR_MASK_V) ? 'V' : 'v',
+ (m_psr & PSR_MASK_Z) ? 'Z' : 'z',
+ (m_psr & PSR_MASK_N) ? 'N' : 'n');
+ break;
+ }
+}
diff --git a/src/devices/cpu/c33/c33std.h b/src/devices/cpu/c33/c33std.h
new file mode 100644
index 00000000000..41ae2058210
--- /dev/null
+++ b/src/devices/cpu/c33/c33std.h
@@ -0,0 +1,58 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson C33 STD Core (S1C33000)
+*/
+
+#ifndef MAME_CPU_C33_C33STD_H
+#define MAME_CPU_C33_C33STD_H
+
+#pragma once
+
+#include "c33common.h"
+
+#include <memory>
+#include <string>
+
+
+class c33std_cpu_device_base : public cpu_device, public c33_cpu_common
+{
+protected:
+ c33std_cpu_device_base(
+ machine_config const &mconfig,
+ device_type type,
+ char const *tag,
+ device_t *owner,
+ u32 clock,
+ address_map_constructor internal_map);
+
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface implementation
+ virtual void execute_run() override;
+
+ // device_memory_interface implementation
+ virtual space_config_vector memory_space_config() const override ATTR_COLD;
+
+ // device_disassembler_interface implementation
+ std::unique_ptr<util::disasm_interface> create_disassembler() override ATTR_COLD;
+
+ // device_state_interface implementation
+ void state_string_export(device_state_entry const &entry, std::string &str) const override;
+
+ address_space_config const m_memory_config;
+ memory_access<28, 1, 0, ENDIANNESS_LITTLE>::cache m_opcodes;
+ memory_access<28, 1, 0, ENDIANNESS_LITTLE>::specific m_data;
+
+ int m_icount;
+ u32 m_gprs[16];
+ u32 m_pc;
+ u32 m_psr;
+ u32 m_sp;
+ u32 m_alr;
+ u32 m_ahr;
+};
+
+#endif // MAME_CPU_C33_C33STD_H
diff --git a/src/devices/cpu/c33/s1c33209.cpp b/src/devices/cpu/c33/s1c33209.cpp
new file mode 100644
index 00000000000..20a8a546f11
--- /dev/null
+++ b/src/devices/cpu/c33/s1c33209.cpp
@@ -0,0 +1,331 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson S1C33209/221/222 CMOS 32-bit single chip microcomputer
+*/
+
+#include "emu.h"
+#include "s1c33209.h"
+
+
+DEFINE_DEVICE_TYPE(S1C33209, s1c33209_device, "s1c33209", "Epson S1C33209")
+DEFINE_DEVICE_TYPE(S1C33221, s1c33221_device, "s1c33221", "Epson S1C33221")
+DEFINE_DEVICE_TYPE(S1C33222, s1c33222_device, "s1c33222", "Epson S1C33222")
+
+
+s1c33209_device::s1c33209_device(
+ machine_config const &mconfig,
+ device_type type,
+ char const *tag,
+ device_t *owner,
+ u32 clock,
+ address_map_constructor internal_map) :
+ c33std_cpu_device_base(mconfig, type, tag, owner, clock, internal_map)
+{
+}
+
+s1c33209_device::s1c33209_device(
+ machine_config const &mconfig,
+ char const *tag,
+ device_t *owner,
+ u32 clock) :
+ s1c33209_device(
+ mconfig,
+ S1C33209,
+ tag,
+ owner,
+ clock,
+ address_map_constructor(FUNC(s1c33209_device::memory_map<0>), this))
+{
+}
+
+s1c33221_device::s1c33221_device(
+ machine_config const &mconfig,
+ char const *tag,
+ device_t *owner,
+ u32 clock) :
+ s1c33209_device(
+ mconfig,
+ S1C33221,
+ tag,
+ owner,
+ clock,
+ address_map_constructor(FUNC(s1c33221_device::memory_map<128 * 1024>), this))
+{
+}
+
+s1c33222_device::s1c33222_device(
+ machine_config const &mconfig,
+ char const *tag,
+ device_t *owner,
+ u32 clock) :
+ s1c33209_device(
+ mconfig,
+ S1C33222,
+ tag,
+ owner,
+ clock,
+ address_map_constructor(FUNC(s1c33222_device::memory_map<64 * 1024>), this))
+{
+}
+
+
+void s1c33209_device::device_reset()
+{
+ c33std_cpu_device_base::device_reset();
+
+ u32 const boot_vector = m_data.read_dword(0x0c0'0000);
+ m_pc = boot_vector;
+}
+
+
+template <offs_t RomBytes>
+void s1c33209_device::memory_map(address_map &map)
+{
+ map(0x000'0000, 0x000'1fff).mirror(0x000'2000).ram(); // actually 32 bits wide (single cycle word access)
+ map(0x003'0000, 0x003'ffff).m(*this, FUNC(s1c33209_device::peripheral_map));
+ map(0x004'0000, 0x004'ffff).mirror(0x001'0000).m(*this, FUNC(s1c33209_device::peripheral_map));
+ //map(0x006'0000, 0x007'ffff) area 2 reserved for debug mode
+ //map(0x008'0000, 0xfff'ffff) area 3 reserved for middleware
+ //map(0x010'0000, 0x02f'ffff) area 4-5 external memory
+ //map(0x030'0000, 0x037'ffff) area 6 external 8-bit I/O
+ //map(0x038'0000, 0x03f'ffff) area 6 external 8-bit I/O
+ //map(0x040'0000, 0x0bf'ffff) area 7-9 external memory
+ if (RomBytes)
+ map(0xc0'0000, 0x0c0'0000 + RomBytes - 1).rom().region(DEVICE_SELF, 0);
+ //map(0x0c.'...., 0x0ff'ffff) area 10 external memory
+ //map(0x100'0000, 0xfff'ffff) area 11-18 external memory
+}
+
+void s1c33209_device::peripheral_map(address_map &map)
+{
+ //map(0x0140, 0x0140) 8-bit timer 4-5 clock select
+ //map(0x0145, 0x0145) 8-bit timer 4-5 clock control
+ //map(0x0146, 0x0146) 8-bit timer 0-3 clock select
+ //map(0x0147, 0x0147) 16-bit timer 0 clock control
+ //map(0x0148, 0x0148) 16-bit timer 1 clock control
+ //map(0x0149, 0x0149) 16-bit timer 2 clock control
+ //map(0x014a, 0x014a) 16-bit timer 3 clock control
+ //map(0x014b, 0x014b) 16-bit timer 4 clock control
+ //map(0x014c, 0x014c) 16-bit timer 5 clock control
+ //map(0x014d, 0x014d) 8-bit timer 0-1 clock control
+ //map(0x014e, 0x014e) 8-bit timer 2-3 clock control
+ //map(0x014f, 0x014f) A/D clock control
+
+ //map(0x0151, 0x0151) clock timer run/stop
+ //map(0x0152, 0x0152) clock timer interrupt control
+ //map(0x0153, 0x0153) clock timer divider
+ //map(0x0154, 0x0154) clock timer second
+ //map(0x0155, 0x0155) clock timer minute
+ //map(0x0156, 0x0156) clock timer hour
+ //map(0x0157, 0x0157) clock day (low)
+ //map(0x0158, 0x0158) clock day (high)
+ //map(0x0159, 0x0159) clock minute comparison
+ //map(0x015a, 0x015a) clock hour comparison
+ //map(0x015b, 0x015b) clock day comparison
+
+ //map(0x0160, 0x0160) 8-bit timer 0 control
+ //map(0x0161, 0x0161) 8-bit timer 0 reload
+ //map(0x0162, 0x0162) 8-bit timer 0 counter data
+ //map(0x0164, 0x0164) 8-bit timer 1 control
+ //map(0x0165, 0x0165) 8-bit timer 1 reload
+ //map(0x0166, 0x0166) 8-bit timer 1 counter data
+ //map(0x0168, 0x0168) 8-bit timer 2 control
+ //map(0x0169, 0x0169) 8-bit timer 2 reload
+ //map(0x016a, 0x016a) 8-bit timer 2 counter data
+ //map(0x016c, 0x016c) 8-bit timer 3 control
+ //map(0x016d, 0x016d) 8-bit timer 3 reload
+ //map(0x016e, 0x016e) 8-bit timer 3 counter data
+ //map(0x0170, 0x0170) watchdog timer write-protect
+ //map(0x0171, 0x0171) watchdog timer enable
+ //map(0x0174, 0x0174) 8-bit timer 4 control
+ //map(0x0175, 0x0175) 8-bit timer 4 reload
+ //map(0x0176, 0x0176) 8-bit timer 4 counter data
+ //map(0x0178, 0x0178) 8-bit timer 5 control
+ //map(0x0179, 0x0179) 8-bit timer 5 reload
+ //map(0x017a, 0x017a) 8-bit timer 5 counter data
+ //map(0x0180, 0x0180) power control
+ //map(0x0181, 0x0181) prescaler clock select
+ //map(0x0190, 0x0190) clock option
+ //map(0x019e, 0x019e) power control protect
+
+ //map(0x01e0, 0x01e0) serial interface ch. 0 transmit data
+ //map(0x01e1, 0x01e1) serial interface ch. 0 receive data
+ //map(0x01e2, 0x01e2) serial interface ch. 0 status
+ //map(0x01e3, 0x01e3) serial interface ch. 0 control
+ //map(0x01e4, 0x01e4) serial interface ch. 0 IrDA
+ //map(0x01e5, 0x01e5) serial interface ch. 1 transmit data
+ //map(0x01e6, 0x01e6) serial interface ch. 1 receive data
+ //map(0x01e7, 0x01e7) serial interface ch. 1 status
+ //map(0x01e8, 0x01e8) serial interface ch. 1 control
+ //map(0x01e9, 0x01e9) serial interface ch. 1 IrDA
+ //map(0x01f0, 0x01f0) serial interface ch. 2 transmit data
+ //map(0x01f1, 0x01f1) serial interface ch. 2 receive data
+ //map(0x01f2, 0x01f2) serial interface ch. 2 status
+ //map(0x01f3, 0x01f3) serial interface ch. 2 control
+ //map(0x01f4, 0x01f4) serial interface ch. 2 IrDA
+ //map(0x01f5, 0x01f5) serial interface ch. 3 transmit data
+ //map(0x01f6, 0x01f6) serial interface ch. 3 receive data
+ //map(0x01f7, 0x01f7) serial interface ch. 3 status
+ //map(0x01f8, 0x01f8) serial interface ch. 3 control
+ //map(0x01f9, 0x01f9) serial interface ch. 3 IrDA
+
+ //map(0x0240, 0x0240) A/D conversion result (low)
+ //map(0x0241, 0x0241) A/D conversion result (high)
+ //map(0x0242, 0x0242) A/D trigger
+ //map(0x0243, 0x0243) A/D channel
+ //map(0x0244, 0x0244) A/D enable
+ //map(0x0245, 0x0245) A/D sampling
+
+ //map(0x0260, 0x0260) port 0-1 interrupt priority
+ //map(0x0261, 0x0261) port 2-3 interrupt priority
+ //map(0x0262, 0x0262) key input interrupt priority
+ //map(0x0263, 0x0263) high-speed DMA ch.0-1 interrupt priority
+ //map(0x0264, 0x0264) high-speed DMA ch.2-3 interrupt priority
+ //map(0x0265, 0x0265) IDMA interrupt priority
+ //map(0x0266, 0x0266) 16-bit timer 0-1 interrupt priority
+ //map(0x0267, 0x0267) 16-bit timer 2-3 interrupt priority
+ //map(0x0268, 0x0268) 16-bit timer 4-5 interrupt priority
+ //map(0x0269, 0x0269) 8-bit timer and serial interface ch. 0 interrupt priority
+ //map(0x026a, 0x026a) serial interface ch. 1 and A/D interrupt priority
+ //map(0x026b, 0x026b) clock timer interrupt priority
+ //map(0x026c, 0x026c) port input 4-5 interrupt priority
+ //map(0x026d, 0x026d) port input 6-7 interrupt priority
+ //map(0x0270, 0x0270) key input and port 0-3 interrupt enable
+ //map(0x0271, 0x0271) DMA interrupt enable
+ //map(0x0272, 0x0272) 16-bit timer 0-1 interrupt enable
+ //map(0x0273, 0x0273) 16-bit timer 2-3 interrupt enable
+ //map(0x0274, 0x0274) 16-bit timer 4-5 interrupt enable
+ //map(0x0275, 0x0275) 8-bit timer interrupt enable
+ //map(0x0276, 0x0276) serial interface interrupt enable
+ //map(0x0277, 0x0277) port input 4-7, clock timer and A/D interrupt enable
+ //map(0x0280, 0x0280) key input and port 0-3 interrupt factor flag
+ //map(0x0281, 0x0281) DMA interrupt factor flag
+ //map(0x0282, 0x0282) 16-bit timer 0-1 interrupt factor flag
+ //map(0x0283, 0x0283) 16-bit timer 2-3 interrupt factor flag
+ //map(0x0284, 0x0284) 16-bit timer 4-5 interrupt factor flag
+ //map(0x0285, 0x0285) 8-bit timer interrupt factor flag
+ //map(0x0286, 0x0286) serial interface interrupt factor flag
+ //map(0x0287, 0x0287) port input 4-7, clock timer and A/D interrupt factor flag
+ //map(0x0290, 0x0290) port input 0-3, high-speed DMA ch. 0-1 and 16-bit timer 0 IDMA request
+ //map(0x0291, 0x0291) 16-bit timer 1-4 IDMA request
+ //map(0x0292, 0x0292) 16-bit timer 5, 8-bit timer and serial interface ch. 0 IDMA request
+ //map(0x0293, 0x0293) serial interface ch. 1, A/D and port input 4-7 IDMA request
+ //map(0x0294, 0x0294) port input 0-3, high-speed DMA ch. 0-1 and 16-bit timer 0 IDMA enable
+ //map(0x0295, 0x0295) 16-bit timer 1-4 IDMA enable
+ //map(0x0296, 0x0296) 16-bit timer 5, 8-bit timer and serial interface ch. 0 IDMA enable
+ //map(0x0297, 0x0297) serial interface ch. 1, A/D and port input 4-7 IDMA enable
+ //map(0x0298, 0x0298) high-speed DMA ch. 0-1 trigger setup
+ //map(0x0299, 0x0299) high-speed DMA ch. 2-3 trigger setup
+ //map(0x029a, 0x029a) high-speed DMA software trigger
+ //map(0x029f, 0x029f) flag set/reset method select
+
+ //map(0x02c0, 0x02c0) K5 function select
+ //map(0x02c1, 0x02c1) K5 input port data
+ //map(0x02c3, 0x02c3) K6 function select
+ //map(0x02c4, 0x02c4) K6 input port data
+ //map(0x02c5, 0x02c5) interrupt factor FP function switching
+ //map(0x02c6, 0x02c6) port input interrupt select 1
+ //map(0x02c7, 0x02c7) port input interrupt select 2
+ //map(0x02c8, 0x02c8) port input interrupt input polarity select
+ //map(0x02c9, 0x02c9) port input interrupt edge/level select
+ //map(0x02ca, 0x02ca) key input interrupt select
+ //map(0x02cb, 0x02cb) interrupt factor TM16 function switching
+ //map(0x02cc, 0x02cc) key input interrupt (FPK0) input comparison
+ //map(0x02cd, 0x02cd) key input interrupt (FPK1) input comparison
+ //map(0x02ce, 0x02ce) key input interrupt (FPK0) input mask
+ //map(0x02cf, 0x02cf) key input interrupt (FPK1) input mask
+ //map(0x02d0, 0x02d0) P0 function select
+ //map(0x02d1, 0x02d1) P0 I/O port data
+ //map(0x02d2, 0x02d2) P0 I/O control
+ //map(0x02d4, 0x02d4) P1 function select
+ //map(0x02d5, 0x02d5) P1 I/O port data
+ //map(0x02d6, 0x02d6) P1 I/O control
+ //map(0x02d7, 0x02d7) port SIO function extension
+ //map(0x02d8, 0x02d8) P2 function select
+ //map(0x02d9, 0x02d9) P2 I/O port data
+ //map(0x02da, 0x02da) P2 I/O control
+ //map(0x02db, 0x02db) port SIO function extension
+ //map(0x02dc, 0x02dc) P2 function select
+ //map(0x02dd, 0x02dd) P2 I/O port data
+ //map(0x02de, 0x02de) P2 I/O control
+ //map(0x02df, 0x02df) port function extension
+
+ //map(0x8120, 0x8121) area 15-18 setup
+ //map(0x8122, 0x8123) area 13-14 setup
+ //map(0x8124, 0x8125) area 11-12 setup
+ //map(0x8126, 0x8127) area 9-10 setup
+ //map(0x8128, 0x8129) area 7-8 setup
+ //map(0x812a, 0x812b) area 4-6 setup
+ //map(0x812d, 0x812d) TTBR write protect
+ //map(0x812e, 0x812e) bus control
+ //map(0x8130, 0x8131) DRAM timing setup
+ //map(0x8132, 0x8133) access control
+ //map(0x8134, 0x8135) TTBR low
+ //map(0x8136, 0x8137) TTBR high
+ //map(0x8138, 0x8139) G/A read signal control
+ //map(0x813a, 0x813a) BCLK select
+
+ //map(0x8180, 0x8181) 16-bit timer 0 comparison A
+ //map(0x8182, 0x8183) 16-bit timer 0 comparison B
+ //map(0x8184, 0x8185) 16-bit timer 0 counter data
+ //map(0x8186, 0x8186) 16-bit timer 0 control
+ //map(0x8188, 0x8189) 16-bit timer 1 comparison A
+ //map(0x818a, 0x818b) 16-bit timer 1 comparison B
+ //map(0x818c, 0x818d) 16-bit timer 1 counter data
+ //map(0x818e, 0x818e) 16-bit timer 1 control
+ //map(0x8190, 0x8191) 16-bit timer 2 comparison A
+ //map(0x8192, 0x8193) 16-bit timer 2 comparison B
+ //map(0x8194, 0x8195) 16-bit timer 2 counter data
+ //map(0x8196, 0x8196) 16-bit timer 2 control
+ //map(0x8198, 0x8199) 16-bit timer 3 comparison A
+ //map(0x819a, 0x819b) 16-bit timer 3 comparison B
+ //map(0x819c, 0x819d) 16-bit timer 3 counter data
+ //map(0x819e, 0x819e) 16-bit timer 3 control
+ //map(0x81a0, 0x81a1) 16-bit timer 4 comparison A
+ //map(0x81a2, 0x81a3) 16-bit timer 4 comparison B
+ //map(0x81a4, 0x81a5) 16-bit timer 4 counter data
+ //map(0x81a6, 0x81a6) 16-bit timer 4 control
+ //map(0x81a8, 0x81a9) 16-bit timer 5 comparison A
+ //map(0x81aa, 0x81ab) 16-bit timer 5 comparison B
+ //map(0x81ac, 0x81ad) 16-bit timer 5 counter data
+ //map(0x81ae, 0x81ae) 16-bit timer 5 control
+
+ //map(0x8200, 0x8201) IDMA base address low
+ //map(0x8202, 0x8203) IDMA base address high
+ //map(0x8204, 0x8204) IDMA start
+ //map(0x8205, 0x8205) IDMA enable
+
+ //map(0x8220, 0x8221) high-speed DMA ch. 0 transfer counter
+ //map(0x8222, 0x8223) high-speed DMA ch. 0 control
+ //map(0x8224, 0x8225) high-speed DMA ch. 0 low-order source address set-up
+ //map(0x8226, 0x8227) high-speed DMA ch. 0 high-order source address set-up
+ //map(0x8228, 0x8229) high-speed DMA ch. 0 low-order destination address set-up
+ //map(0x822a, 0x822b) high-speed DMA ch. 0 high-order destination address set-up
+ //map(0x822c, 0x822d) high-speed DMA ch. 0 enable
+ //map(0x822e, 0x822f) high-speed DMA ch. 0 trigger flag
+ //map(0x8230, 0x8231) high-speed DMA ch. 1 transfer counter
+ //map(0x8232, 0x8233) high-speed DMA ch. 1 control
+ //map(0x8234, 0x8235) high-speed DMA ch. 1 low-order source address set-up
+ //map(0x8236, 0x8237) high-speed DMA ch. 1 high-order source address set-up
+ //map(0x8238, 0x8239) high-speed DMA ch. 1 low-order destination address set-up
+ //map(0x823a, 0x823b) high-speed DMA ch. 1 high-order destination address set-up
+ //map(0x823c, 0x823d) high-speed DMA ch. 1 enable
+ //map(0x823e, 0x823f) high-speed DMA ch. 1 trigger flag
+ //map(0x8240, 0x8241) high-speed DMA ch. 2 transfer counter
+ //map(0x8242, 0x8243) high-speed DMA ch. 2 control
+ //map(0x8244, 0x8245) high-speed DMA ch. 2 low-order source address set-up
+ //map(0x8246, 0x8247) high-speed DMA ch. 2 high-order source address set-up
+ //map(0x8248, 0x8249) high-speed DMA ch. 2 low-order destination address set-up
+ //map(0x824a, 0x824b) high-speed DMA ch. 2 high-order destination address set-up
+ //map(0x824c, 0x824d) high-speed DMA ch. 2 enable
+ //map(0x824e, 0x824f) high-speed DMA ch. 2 trigger flag
+ //map(0x8250, 0x8251) high-speed DMA ch. 3 transfer counter
+ //map(0x8252, 0x8253) high-speed DMA ch. 3 control
+ //map(0x8254, 0x8255) high-speed DMA ch. 3 low-order source address set-up
+ //map(0x8256, 0x8257) high-speed DMA ch. 3 high-order source address set-up
+ //map(0x8258, 0x8259) high-speed DMA ch. 3 low-order destination address set-up
+ //map(0x825a, 0x825b) high-speed DMA ch. 3 high-order destination address set-up
+ //map(0x825c, 0x825d) high-speed DMA ch. 3 enable
+ //map(0x825e, 0x825f) high-speed DMA ch. 3 trigger flag
+}
diff --git a/src/devices/cpu/c33/s1c33209.h b/src/devices/cpu/c33/s1c33209.h
new file mode 100644
index 00000000000..b92fd094d5c
--- /dev/null
+++ b/src/devices/cpu/c33/s1c33209.h
@@ -0,0 +1,57 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+/*
+ Epson S1C33209/221/222 CMOS 32-bit single chip microcomputer
+*/
+
+#ifndef MAME_CPU_C33_S1C33209_H
+#define MAME_CPU_C33_S1C33209_H
+
+#pragma once
+
+#include "c33std.h"
+
+
+class s1c33209_device : public c33std_cpu_device_base
+{
+public:
+ s1c33209_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+
+protected:
+ s1c33209_device(
+ machine_config const &mconfig,
+ device_type type,
+ char const *tag,
+ device_t *owner,
+ u32 clock,
+ address_map_constructor internal_map);
+
+ template <offs_t RomBytes> void memory_map(address_map &map) ATTR_COLD;
+
+protected:
+ void device_reset() override ATTR_COLD;
+
+private:
+ void peripheral_map(address_map &map) ATTR_COLD;
+};
+
+
+class s1c33221_device : public s1c33209_device
+{
+public:
+ s1c33221_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+};
+
+
+class s1c33222_device : public s1c33209_device
+{
+public:
+ s1c33222_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+};
+
+
+DECLARE_DEVICE_TYPE(S1C33209, s1c33209_device)
+DECLARE_DEVICE_TYPE(S1C33221, s1c33221_device)
+DECLARE_DEVICE_TYPE(S1C33222, s1c33222_device)
+
+#endif // MAME_CPU_C33_S1C33209_H
diff --git a/src/devices/cpu/capricorn/capricorn.h b/src/devices/cpu/capricorn/capricorn.h
index 40bbb2cc3ab..6e5cf79f0d5 100644
--- a/src/devices/cpu/capricorn/capricorn.h
+++ b/src/devices/cpu/capricorn/capricorn.h
@@ -33,16 +33,12 @@ public:
protected:
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual u32 execute_min_cycles() const noexcept override
- { return 2; }
- virtual u32 execute_max_cycles() const noexcept override
- { return 17; }
- virtual u32 execute_input_lines() const noexcept override
- { return 1; }
+ virtual u32 execute_min_cycles() const noexcept override { return 2; }
+ virtual u32 execute_max_cycles() const noexcept override { return 17; }
virtual void execute_run() override;
virtual void execute_set_input(int linenum, int state) override;
diff --git a/src/devices/cpu/ccpu/ccpu.cpp b/src/devices/cpu/ccpu/ccpu.cpp
index 3524724fabe..367df58c595 100644
--- a/src/devices/cpu/ccpu/ccpu.cpp
+++ b/src/devices/cpu/ccpu/ccpu.cpp
@@ -22,18 +22,18 @@ DEFINE_DEVICE_TYPE(CCPU, ccpu_cpu_device, "ccpu", "Cinematronics CPU")
MACROS
***************************************************************************/
-#define READOP(a) (m_cache.read_byte(a))
+#define READOP(a) (m_cache.read_byte(a))
-#define RDMEM(a) (m_data.read_word((a) & 0xfff))
-#define WRMEM(a,v) (m_data.write_word((a), (v)))
+#define RDMEM(a) (m_data.read_word((a) & 0xfff))
+#define WRMEM(a,v) (m_data.write_word((a), (v)))
-#define READPORT(a) (m_io.read_byte(a))
-#define WRITEPORT(a,v) (m_io.write_byte((a), (v)))
+#define READPORT(a) (m_io.read_byte(a))
+#define WRITEPORT(a,v) (m_io.write_byte((a), (v)))
#define SET_A0 do { m_a0flag = m_A; } while (0)
-#define SET_CMP_VAL(x) do { m_cmpacc = *m_acc; m_cmpval = (x) & 0xfff; } while (0)
-#define SET_NC(a) do { m_ncflag = ~(a); } while (0)
-#define SET_MI(a) do { m_nextnextmiflag = (a); } while (0)
+#define SET_CMP_VAL(x) do { m_cmpacc = *m_acc; m_cmpval = (x) & 0xfff; } while (0)
+#define SET_NC(a) do { m_ncflag = ~(a); } while (0)
+#define SET_MI(a) do { m_nextnextmiflag = (a); } while (0)
#define TEST_A0 (m_a0flag & 1)
#define TEST_NC ((m_ncflag >> 12) & 1)
@@ -52,10 +52,10 @@ DEFINE_DEVICE_TYPE(CCPU, ccpu_cpu_device, "ccpu", "Cinematronics CPU")
#define STANDARD_ACC_OP(resexp,cmpval) \
do { \
uint16_t result = resexp; \
- SET_A0; /* set the A0 bit based on the previous 'A' value */ \
- SET_CMP_VAL(cmpval); /* set the compare values to the previous accumulator and the cmpval */ \
- SET_NC(result); /* set the NC flag based on the unmasked result */ \
- *m_acc = result & 0xfff; /* store the low 12 bits of the new value */ \
+ SET_A0; /* set the A0 bit based on the previous 'A' value */ \
+ SET_CMP_VAL(cmpval); /* set the compare values to the previous accumulator and the cmpval */ \
+ SET_NC(result); /* set the NC flag based on the unmasked result */ \
+ *m_acc = result & 0xfff; /* store the low 12 bits of the new value */ \
} while (0)
@@ -92,12 +92,15 @@ uint8_t ccpu_cpu_device::read_jmi()
}
-void ccpu_cpu_device::wdt_timer_trigger()
+void ccpu_cpu_device::wdt_trigger(int state)
{
+ if (!state)
+ return;
+
m_waiting = false;
m_watchdog++;
if (m_watchdog >= 3)
- m_PC = 0;
+ device_reset();
}
@@ -203,6 +206,7 @@ void ccpu_cpu_device::execute_run()
{
if (m_waiting)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/ccpu/ccpu.h b/src/devices/cpu/ccpu/ccpu.h
index c4377f251e3..d5ee13d85ae 100644
--- a/src/devices/cpu/ccpu/ccpu.h
+++ b/src/devices/cpu/ccpu/ccpu.h
@@ -27,7 +27,7 @@ public:
// public because the cinemat driver accesses A/P/X/Y through state interace - should there be a proper public interface to read registers?
enum
{
- CCPU_PC=1,
+ CCPU_PC = 1,
CCPU_FLAGS,
CCPU_A,
CCPU_B,
@@ -50,17 +50,16 @@ public:
template <typename... T> void set_vector_func(T &&... args) { m_vector_callback.set(std::forward<T>(args)...); }
uint8_t read_jmi();
- void wdt_timer_trigger();
+ void wdt_trigger(int state);
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -76,27 +75,27 @@ protected:
address_space_config m_data_config;
address_space_config m_io_config;
- uint16_t m_PC;
- uint16_t m_A;
- uint16_t m_B;
- uint8_t m_I;
- uint16_t m_J;
- uint8_t m_P;
- uint16_t m_X;
- uint16_t m_Y;
- uint16_t m_T;
- uint16_t * m_acc;
-
- uint16_t m_a0flag, m_ncflag, m_cmpacc, m_cmpval;
- uint16_t m_miflag, m_nextmiflag, m_nextnextmiflag;
- uint16_t m_drflag;
-
- devcb_read8 m_external_input;
- vector_delegate m_vector_callback;
-
- uint8_t m_waiting;
- uint8_t m_watchdog;
- uint8_t m_extinput;
+ uint16_t m_PC;
+ uint16_t m_A;
+ uint16_t m_B;
+ uint8_t m_I;
+ uint16_t m_J;
+ uint8_t m_P;
+ uint16_t m_X;
+ uint16_t m_Y;
+ uint16_t m_T;
+ uint16_t * m_acc;
+
+ uint16_t m_a0flag, m_ncflag, m_cmpacc, m_cmpval;
+ uint16_t m_miflag, m_nextmiflag, m_nextnextmiflag;
+ uint16_t m_drflag;
+
+ devcb_read8 m_external_input;
+ vector_delegate m_vector_callback;
+
+ uint8_t m_waiting;
+ uint8_t m_watchdog;
+ uint8_t m_extinput;
int m_icount;
diff --git a/src/devices/cpu/cdc160/cdc160d.cpp b/src/devices/cpu/cdc160/cdc160d.cpp
new file mode 100644
index 00000000000..898ef277e0e
--- /dev/null
+++ b/src/devices/cpu/cdc160/cdc160d.cpp
@@ -0,0 +1,379 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/***************************************************************************
+
+ CDC 160/160-A disassembler
+
+ Some departures from the syntax used by CDC's assemblers:
+ — Two-word instructions are always written on one line each. This
+ was not necessarily permitted, especially for INP and OUT.
+ — For forward and backward addressing modes, the effective address is
+ given rather than the 6-bit displacement to be added to P.
+ — For 160-A only, a synthetic two-word instruction JPM (Jump Memory)
+ represents the common pattern of using JFI with a 1-word displacement
+ to jump to any address in the 4096-word bank.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "cdc160d.h"
+
+cdc160_disassembler::cdc160_disassembler()
+ : util::disasm_interface()
+{
+}
+
+u32 cdc160_disassembler::opcode_alignment() const
+{
+ return 1;
+}
+
+cdc160a_disassembler::cdc160a_disassembler()
+ : cdc160_disassembler()
+{
+}
+
+u32 cdc160a_disassembler::interface_flags() const
+{
+ return PAGED;
+}
+
+u32 cdc160a_disassembler::page_address_bits() const
+{
+ return 12;
+}
+
+namespace {
+
+const char *const f_160a_bank_ops[7] =
+{
+ "SRJ", "SIC", "IRJ", "SDC", "DRJ", "SID", "ACJ"
+};
+
+const char *const f_160_alu_ops[10] =
+{
+ "LP", "LS", "LD", "LC", "AD", "SB", "ST", "SR", "RA", "AO"
+};
+
+const char *const f_160a_alu_ops[10] =
+{
+ "LP", "SC", "LD", "LC", "AD", "SB", "ST", "SR", "RA", "AO"
+};
+
+const char *const f_cond_jp_ops[6] =
+{
+ "ZJ", "NZ", "PJ", "NJ"
+};
+
+// 12-bit ones' complement addition
+inline u16 add_relative(uint_fast16_t a, uint_fast16_t b) noexcept
+{
+ u16 c = (a & 07777) + (b & 07777);
+ if (c >= 07777)
+ c -= 07777;
+ return c;
+}
+
+} // anonymous namespace
+
+offs_t cdc160_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+ u16 inst = opcodes.r16(pc) & 07777;
+ if (inst < 0200)
+ {
+ util::stream_format(stream, "%s %o", BIT(inst, 6) ? "SHA" : "ERR", inst & 0077);
+ return 1 | SUPPORTED;
+ }
+ else if (inst < 01000)
+ {
+ // No address (6-bit immediate) mode
+ util::stream_format(stream, "%sN %o", f_160_alu_ops[BIT(inst, 6, 3) - 2], inst & 0077);
+ return 1 | SUPPORTED;
+ }
+ else if (inst < 06000)
+ {
+ if (BIT(inst, 7))
+ {
+ // Relative forward or backward address mode
+ util::stream_format(stream, "%s%c %04o", f_160_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'B' : 'F',
+ add_relative(pc, BIT(inst, 6) ? ~(inst & 0077) : inst & 0077));
+ return 1 | SUPPORTED;
+ }
+ else
+ {
+ // Direct or indirect address mode
+ util::stream_format(stream, "%s%c %02o", f_160_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'I' : 'D', inst & 0077);
+ return 1 | SUPPORTED;
+ }
+ }
+ else if (inst < 07000)
+ {
+ // Relative conditional jumps
+ util::stream_format(stream, "%s%c %04o", f_cond_jp_ops[BIT(inst, 6, 2)], BIT(inst, 8) ? 'B' : 'F',
+ add_relative(pc, BIT(inst, 8) ? ~(inst & 0077) : inst & 0077));
+ return 1 | STEP_COND | SUPPORTED;
+ }
+ else switch (BIT(inst, 6, 3))
+ {
+ case 0:
+ util::stream_format(stream, "JPI %02o", inst & 0077);
+ return 1 | STEP_OUT | SUPPORTED;
+
+ case 1:
+ // Jump forward indirect
+ util::stream_format(stream, "JFI %04o", add_relative(pc, inst & 0077));
+ return 1 | SUPPORTED;
+
+ case 2: case 3:
+ util::stream_format(stream, "%s %04o %04o", BIT(inst, 6) ? "OUT" : "INP", add_relative(pc, inst & 0077), opcodes.r16(pc + 1) & 07777);
+ return 2 | SUPPORTED;
+
+ case 4:
+ // Output direct
+ util::stream_format(stream, "OTN %02o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ case 5:
+ // External function
+ util::stream_format(stream, "EXF %04o", (pc + (inst & 0077)) & 07777);
+ return 1 | SUPPORTED;
+
+ case 6:
+ util::stream_format(stream, "INA %o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ case 7: default:
+ util::stream_format(stream, "HLT %02o", inst & 0077);
+ return 1 | SUPPORTED;
+ }
+}
+
+offs_t cdc160a_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+ u16 inst = opcodes.r16(pc) & 07777;
+ if (inst < 0200)
+ {
+ if (inst >= 0010 && inst < 0100)
+ {
+ util::stream_format(stream, "%s %d", f_160a_bank_ops[BIT(inst, 3, 3) - 1], inst & 0007);
+ return 1 | SUPPORTED;
+ }
+ else switch (inst)
+ {
+ case 0000:
+ stream << "ERR";
+ return 1 | SUPPORTED;
+
+ case 0001:
+ stream << "NOP";
+ return 1 | SUPPORTED;
+
+ case 0100:
+ util::stream_format(stream, "BLS %04o", opcodes.r16(pc + 1) & 07777);
+ return 2 | STEP_COND | SUPPORTED;
+
+ case 0101:
+ stream << "PTA";
+ return 1 | (BIT(opcodes.r16(pc + 1), 6, 3) == 070 ? STEP_OVER | step_over_extra(1) : 0) | SUPPORTED;
+
+ case 0102:
+ stream << "LS1";
+ return 1 | SUPPORTED;
+
+ case 0103:
+ stream << "LS2";
+ return 1 | SUPPORTED;
+
+ case 0104:
+ stream << "CBC";
+ return 1 | SUPPORTED;
+
+ case 0105:
+ util::stream_format(stream, "ATE %04o", opcodes.r16(pc + 1) & 07777);
+ return 2 | STEP_COND | SUPPORTED;
+
+ case 0106:
+ util::stream_format(stream, "ATX %04o", opcodes.r16(pc + 1) & 07777);
+ return 2 | STEP_COND | SUPPORTED;
+
+ case 0107:
+ stream << "ETA";
+ return 1 | SUPPORTED;
+
+ case 0110:
+ stream << "LS3";
+ return 1 | SUPPORTED;
+
+ case 0111:
+ stream << "LS6";
+ return 1 | SUPPORTED;
+
+ case 0112:
+ stream << "MUT";
+ return 1 | SUPPORTED;
+
+ case 0113:
+ stream << "MUH";
+ return 1 | SUPPORTED;
+
+ case 0114:
+ stream << "RS1";
+ return 1 | SUPPORTED;
+
+ case 0115:
+ stream << "RS2";
+ return 1 | SUPPORTED;
+
+ case 0120:
+ stream << "CIL";
+ return 1 | SUPPORTED;
+
+ case 0130:
+ stream << "CTA";
+ return 1 | SUPPORTED;
+
+ case 0140: case 0141: case 0142: case 0143: case 0144: case 0145: case 0146: case 0147:
+ util::stream_format(stream, "SBU %d", inst & 0007);
+ return 1 | SUPPORTED;
+
+ case 0150: case 0151: case 0152: case 0153: case 0154: case 0155: case 0156: case 0157:
+ util::stream_format(stream, "STP %02o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ case 0160: case 0161: case 0162: case 0163: case 0164: case 0165: case 0166: case 0167:
+ util::stream_format(stream, "STE %02o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ default:
+ util::stream_format(stream, "%04o", inst);
+ return 1 | SUPPORTED;
+ }
+ }
+ else if (inst < 01000)
+ {
+ // No address (6-bit immediate) mode
+ util::stream_format(stream, "%sN %o", f_160a_alu_ops[BIT(inst, 6, 3) - 2], inst & 0077);
+ return 1 | SUPPORTED;
+ }
+ else if (inst < 06000)
+ {
+ if (BIT(inst, 7))
+ {
+ if ((inst & 0077) != 0)
+ {
+ // Relative forward or backward address mode
+ util::stream_format(stream, "%s%c %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'B' : 'F',
+ add_relative(pc, BIT(inst, 6) ? ~(inst & 0077) : inst & 0077));
+ return 1 | SUPPORTED;
+ }
+ else if (BIT(inst, 6))
+ {
+ // Specific address mode
+ util::stream_format(stream, "%sS", f_160a_alu_ops[BIT(inst, 8, 4) - 2]);
+ return 1 | SUPPORTED;
+ }
+ else
+ {
+ // Constant address (12-bit immediate) mode
+ util::stream_format(stream, "%sC %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], opcodes.r16(pc + 1) & 07777);
+ return 2 | SUPPORTED;
+ }
+ }
+ else if ((inst & 0177) == 0100)
+ {
+ // Memory address mode
+ util::stream_format(stream, "%sM %04o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], opcodes.r16(pc + 1) & 07777);
+ return 2 | SUPPORTED;
+ }
+ else
+ {
+ // Direct or indirect address mode
+ util::stream_format(stream, "%s%c %02o", f_160a_alu_ops[BIT(inst, 8, 4) - 2], BIT(inst, 6) ? 'I' : 'D', inst & 0077);
+ return 1 | SUPPORTED;
+ }
+ }
+ else if (inst < 07000)
+ {
+ // Relative conditional jumps
+ util::stream_format(stream, "%s%c %04o", f_cond_jp_ops[BIT(inst, 6, 2)], BIT(inst, 8) ? 'B' : 'F',
+ add_relative(pc, BIT(inst, 8) ? ~(inst & 0077) : inst & 0077));
+ return 1 | STEP_COND | SUPPORTED;
+ }
+ else switch (BIT(inst, 6, 3))
+ {
+ case 0:
+ util::stream_format(stream, "JPI %02o", inst & 0077);
+ return 1 | STEP_OUT | SUPPORTED;
+
+ case 1:
+ if ((inst & 0077) <= 1)
+ {
+ util::stream_format(stream, "JP%c %04o", BIT(inst, 0) ? 'M' : 'R', opcodes.r16(pc + 1) & 07777);
+ return 2 | (BIT(inst, 0) ? 0 : STEP_OVER) | SUPPORTED;
+ }
+ else
+ {
+ util::stream_format(stream, "JFI %04o", add_relative(pc, inst & 0077));
+ return 1 | SUPPORTED;
+ }
+
+ case 2: case 3:
+ if ((inst & 0077) == 0)
+ {
+ // Buffer input/output
+ util::stream_format(stream, "IB%c %04o", BIT(inst, 6) ? 'O' : 'I', opcodes.r16(pc + 1) & 07777);
+ return 2 | STEP_COND | SUPPORTED;
+ }
+ else
+ {
+ // Normal input/output
+ util::stream_format(stream, "%s %04o %04o", BIT(inst, 6) ? "OUT" : "INP", add_relative(pc, inst & 0077), opcodes.r16(pc + 1) & 07777);
+ return 2 | SUPPORTED;
+ }
+ return 1 | SUPPORTED;
+
+ case 4:
+ // Output direct
+ util::stream_format(stream, "OTN %02o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ case 5:
+ // External function
+ if ((inst & 0077) == 0)
+ {
+ util::stream_format(stream, "EXC %04o", opcodes.r16(pc + 1) & 07777);
+ return 2 | SUPPORTED;
+ }
+ else
+ {
+ util::stream_format(stream, "EXF %04o", (pc + (inst & 0077)) & 07777);
+ return 1 | SUPPORTED;
+ }
+
+ case 6:
+ if ((inst & 0077) == 0)
+ stream << "INA";
+ else if ((inst & 0077) == 0077)
+ stream << "OTA";
+ else
+ util::stream_format(stream, "HWI %02o", inst & 0077);
+ return 1 | SUPPORTED;
+
+ case 7: default:
+ if ((inst & 0077) == 0 || (inst & 0077) == 0077)
+ {
+ stream << "HLT";
+ return 1 | SUPPORTED;
+ }
+ else if ((inst & 070) == 0)
+ {
+ util::stream_format(stream, "SLS %d", inst & 0007);
+ return 1 | SUPPORTED;
+ }
+ else
+ {
+ util::stream_format(stream, "%s %02o %04o", (inst & 0007) != 0 ? "SJS" : "SLJ", inst & 077, opcodes.r16(pc + 1) & 07777);
+ return 2 | STEP_COND | SUPPORTED;
+ }
+ }
+}
diff --git a/src/devices/cpu/cdc160/cdc160d.h b/src/devices/cpu/cdc160/cdc160d.h
new file mode 100644
index 00000000000..f564f7c6bf9
--- /dev/null
+++ b/src/devices/cpu/cdc160/cdc160d.h
@@ -0,0 +1,34 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+
+#ifndef MAME_CPU_CDC160_CDC160D_H
+#define MAME_CPU_CDC160_CDC160D_H
+
+#pragma once
+
+class cdc160_disassembler : public util::disasm_interface
+{
+public:
+ // construction/destruction
+ cdc160_disassembler();
+
+protected:
+ // util::disasm_interface overrides
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+};
+
+class cdc160a_disassembler : public cdc160_disassembler
+{
+public:
+ // construction/destruction
+ cdc160a_disassembler();
+
+protected:
+ // util::disasm_interface overrides
+ virtual u32 interface_flags() const override;
+ virtual u32 page_address_bits() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+};
+
+#endif // MAME_CPU_CDC160_CDC160D_H
diff --git a/src/devices/cpu/clipper/clipper.cpp b/src/devices/cpu/clipper/clipper.cpp
index aff0b589a45..32c1d0dee82 100644
--- a/src/devices/cpu/clipper/clipper.cpp
+++ b/src/devices/cpu/clipper/clipper.cpp
@@ -206,14 +206,15 @@ void clipper_device::execute_run()
while (m_icount > 0)
{
- debugger_instruction_hook(m_pc);
-
if (m_wait)
{
+ debugger_wait_hook();
m_icount = 0;
continue;
}
+ debugger_instruction_hook(m_pc);
+
// fetch and decode an instruction
if (decode_instruction())
{
diff --git a/src/devices/cpu/clipper/clipper.h b/src/devices/cpu/clipper/clipper.h
index 44741234df1..19f51650b3b 100644
--- a/src/devices/cpu/clipper/clipper.h
+++ b/src/devices/cpu/clipper/clipper.h
@@ -151,13 +151,12 @@ protected:
clipper_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const endianness_t endianness, const u32 cpuid);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1; } // FIXME: don't know, especially macro instructions
- virtual u32 execute_input_lines() const noexcept override { return 2; } // number of input/interrupt lines (irq/nmi)
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -357,7 +356,7 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual u32 intrap(const u16 vector, const u32 old_pc) override;
diff --git a/src/devices/cpu/clipper/clipperd.h b/src/devices/cpu/clipper/clipperd.h
index cac65afdf93..5db8a4ed2f4 100644
--- a/src/devices/cpu/clipper/clipperd.h
+++ b/src/devices/cpu/clipper/clipperd.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Patrick Mackinlay
-#ifndef MAME_CPU_CLIPPER_CLIPPERDASM_H
-#define MAME_CPU_CLIPPER_CLIPPERDASM_H
+#ifndef MAME_CPU_CLIPPER_CLIPPERD_H
+#define MAME_CPU_CLIPPER_CLIPPERD_H
#pragma once
@@ -20,4 +20,4 @@ private:
std::string address (offs_t pc, const data_buffer &opcodes);
};
-#endif
+#endif // MAME_CPU_CLIPPER_CLIPPERD_H
diff --git a/src/devices/cpu/cop400/cop400.cpp b/src/devices/cpu/cop400/cop400.cpp
index 6b7522350e6..8b4ffbe3094 100644
--- a/src/devices/cpu/cop400/cop400.cpp
+++ b/src/devices/cpu/cop400/cop400.cpp
@@ -1065,11 +1065,11 @@ void cop400_cpu_device::inil_tick()
void cop400_cpu_device::device_start()
{
- /* find address spaces */
+ // find address spaces
space(AS_PROGRAM).cache(m_program);
space(AS_DATA).specific(m_data);
- /* allocate counter timer */
+ // allocate counter timer
m_counter_timer = nullptr;
if (m_has_counter)
{
@@ -1077,7 +1077,7 @@ void cop400_cpu_device::device_start()
m_counter_timer->adjust(attotime::zero, 0, attotime::from_ticks(m_cki * 4, clock()));
}
- /* register for state saving */
+ // register for state saving
save_item(NAME(m_pc));
save_item(NAME(m_prevpc));
save_item(NAME(m_sa));
@@ -1133,21 +1133,39 @@ void cop400_cpu_device::device_start()
set_icountptr(m_icount);
+ // zerofill
+ m_pc = 0;
+ m_prevpc = 0;
+ m_a = 0;
+ m_b = 0;
+ m_c = 0;
+ m_en = 0;
+ m_g = 0;
m_q = 0;
m_sa = 0;
m_sb = 0;
m_sc = 0;
m_sio = 0;
+ m_skl = 0;
+
+ m_t = 0;
+ m_skt_latch = 0;
+
m_il = 0;
- m_in[0] = m_in[1] = m_in[2] = m_in[3] = 0;
+ memset(m_in, 0, sizeof(m_in));
m_si = 0;
m_so_output = 0;
m_sk_output = 0;
m_l_output = 0;
+
+ m_skip = false;
m_skip_lbi = 0;
m_last_skip = false;
- m_skip = false;
+ m_halt = false;
+ m_idle = false;
+
m_opcode = 0x44;
+ m_second_byte = false;
}
diff --git a/src/devices/cpu/cop400/cop400.h b/src/devices/cpu/cop400/cop400.h
index 45b2b4d0f25..c6ad46cb6f3 100644
--- a/src/devices/cpu/cop400/cop400.h
+++ b/src/devices/cpu/cop400/cop400.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_DEVICES_CPU_COP400_H
-#define MAME_DEVICES_CPU_COP400_H
+#ifndef MAME_CPU_COP400_COP400_H
+#define MAME_CPU_COP400_COP400_H
#pragma once
@@ -120,27 +120,26 @@ public:
uint8_t microbus_r();
void microbus_w(uint8_t data);
- void data_128b(address_map &map);
- void data_32b(address_map &map);
- void data_64b(address_map &map);
- void program_1kb(address_map &map);
- void program_2kb(address_map &map);
- void program_512b(address_map &map);
+ void data_128b(address_map &map) ATTR_COLD;
+ void data_32b(address_map &map) ATTR_COLD;
+ void data_64b(address_map &map) ATTR_COLD;
+ void program_1kb(address_map &map) ATTR_COLD;
+ void program_2kb(address_map &map) ATTR_COLD;
+ void program_512b(address_map &map) ATTR_COLD;
protected:
// construction/destruction
cop400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t program_addr_bits, uint8_t data_addr_bits, uint8_t featuremask, uint8_t g_mask, uint8_t d_mask, uint8_t in_mask, bool has_counter, bool has_inil, address_map_constructor internal_map_program, address_map_constructor internal_map_data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + m_cki - 1) / m_cki; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * m_cki); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 2; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -199,7 +198,7 @@ protected:
// registers
uint16_t m_pc; // 9/10/11-bit ROM address program counter
uint16_t m_prevpc; // previous value of program counter
- uint8_t m_a; // 4-bit accumulator
+ uint8_t m_a; // 4-bit accumulator
uint8_t m_b; // 5/6/7-bit RAM address register
int m_c; // 1-bit carry register
uint8_t m_en; // 4-bit enable register
@@ -529,4 +528,4 @@ DECLARE_DEVICE_TYPE(COP444C, cop444c_cpu_device)
DECLARE_DEVICE_TYPE(COP445C, cop445c_cpu_device)
DECLARE_DEVICE_TYPE(COP446C, cop446c_cpu_device)
-#endif // MAME_DEVICES_CPU_COP400_H
+#endif // MAME_CPU_COP400_COP400_H
diff --git a/src/devices/cpu/cop400/cop410ds.h b/src/devices/cpu/cop400/cop410ds.h
index e30eda21588..4a9162f1874 100644
--- a/src/devices/cpu/cop400/cop410ds.h
+++ b/src/devices/cpu/cop400/cop410ds.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_COP410_COP410DS_H
-#define MAME_CPU_COP410_COP410DS_H
+#ifndef MAME_CPU_COP400_COP410DS_H
+#define MAME_CPU_COP400_COP410DS_H
#pragma once
@@ -23,4 +23,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_COP400_COP410DS_H
diff --git a/src/devices/cpu/cop400/cop420ds.h b/src/devices/cpu/cop400/cop420ds.h
index befe8ca7871..58e8610a6e3 100644
--- a/src/devices/cpu/cop400/cop420ds.h
+++ b/src/devices/cpu/cop400/cop420ds.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_COP420_COP420DS_H
-#define MAME_CPU_COP420_COP420DS_H
+#ifndef MAME_CPU_COP400_COP420DS_H
+#define MAME_CPU_COP400_COP420DS_H
#pragma once
@@ -23,4 +23,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_COP400_COP420DS_H
diff --git a/src/devices/cpu/cop400/cop424ds.h b/src/devices/cpu/cop400/cop424ds.h
index 4448f705b6d..8ebaa48b829 100644
--- a/src/devices/cpu/cop400/cop424ds.h
+++ b/src/devices/cpu/cop400/cop424ds.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_COP424_COP424DS_H
-#define MAME_CPU_COP424_COP424DS_H
+#ifndef MAME_CPU_COP400_COP424DS_H
+#define MAME_CPU_COP400_COP424DS_H
#pragma once
@@ -23,4 +23,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_COP400_COP424DS_H
diff --git a/src/devices/cpu/cop400/cop444ds.h b/src/devices/cpu/cop400/cop444ds.h
index 9a976ff33ed..558632e0c46 100644
--- a/src/devices/cpu/cop400/cop444ds.h
+++ b/src/devices/cpu/cop400/cop444ds.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_COP444_COP444DS_H
-#define MAME_CPU_COP444_COP444DS_H
+#ifndef MAME_CPU_COP400_COP444DS_H
+#define MAME_CPU_COP400_COP444DS_H
#pragma once
@@ -23,4 +23,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_COP400_COP444DS_H
diff --git a/src/devices/cpu/cops1/cops1base.h b/src/devices/cpu/cops1/cops1base.h
index 75009fe7b49..0d850f500d5 100644
--- a/src/devices/cpu/cops1/cops1base.h
+++ b/src/devices/cpu/cops1/cops1base.h
@@ -70,9 +70,9 @@ protected:
cops1_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
diff --git a/src/devices/cpu/cops1/cops1d.cpp b/src/devices/cpu/cops1/cops1d.cpp
index aa7622bd22f..8ccdcf8ac08 100644
--- a/src/devices/cpu/cops1/cops1d.cpp
+++ b/src/devices/cpu/cops1/cops1d.cpp
@@ -32,6 +32,18 @@ offs_t cops1_common_disassembler::increment_pc(offs_t pc)
// common lookup tables
+enum cops1_common_disassembler::e_mnemonics : unsigned
+{
+ mILL,
+ mAD, mADD, mSUB, mCOMP, m0TA, mADX, mHXA, mTAM, mSC, mRSC, mTC,
+ mTIN, mTF, mTKB, mTIR,
+ mBTD, mDSPA, mDSPS, mAXO, mLDF, mREAD,
+ mGO, mCALL, mRET, mRETS, mLG, mLGCALL, mNOP,
+ mEXC, mEXCM, mEXCP, mMTA, mLM,
+ mSM1, mSM2, mSM4, mSM8, mRSM1, mRSM2, mRSM4, mRSM8, mTM,
+ mLB, mLBL, mATB, mBTA, mHXBR
+};
+
const char *const cops1_common_disassembler::s_name[] =
{
"?",
diff --git a/src/devices/cpu/cops1/cops1d.h b/src/devices/cpu/cops1/cops1d.h
index ac48fb8853e..d7a98a9f638 100644
--- a/src/devices/cpu/cops1/cops1d.h
+++ b/src/devices/cpu/cops1/cops1d.h
@@ -25,19 +25,7 @@ public:
virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x3f) | m_r2l[pc & 0x3f]; }
protected:
- // opcode mnemonics
- enum e_mnemonics
- {
- mILL,
- mAD, mADD, mSUB, mCOMP, m0TA, mADX, mHXA, mTAM, mSC, mRSC, mTC,
- mTIN, mTF, mTKB, mTIR,
- mBTD, mDSPA, mDSPS, mAXO, mLDF, mREAD,
- mGO, mCALL, mRET, mRETS, mLG, mLGCALL, mNOP,
- mEXC, mEXCM, mEXCP, mMTA, mLM,
- mSM1, mSM2, mSM4, mSM8, mRSM1, mRSM2, mRSM4, mRSM8, mTM,
- mLB, mLBL, mATB, mBTA, mHXBR
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_name[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/cops1/mm5799.h b/src/devices/cpu/cops1/mm5799.h
index a07aecd97fa..e8d45625170 100644
--- a/src/devices/cpu/cops1/mm5799.h
+++ b/src/devices/cpu/cops1/mm5799.h
@@ -41,8 +41,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -51,8 +51,8 @@ protected:
virtual void execute_one() override;
virtual bool op_argument() override;
- void data_map(address_map &map);
- void program_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
+ void program_map(address_map &map) ATTR_COLD;
// opcode helpers
u8 ram_r();
diff --git a/src/devices/cpu/cops1/mm5799op.cpp b/src/devices/cpu/cops1/mm5799op.cpp
index 4e293ff3c3f..84f0c6ef766 100644
--- a/src/devices/cpu/cops1/mm5799op.cpp
+++ b/src/devices/cpu/cops1/mm5799op.cpp
@@ -228,7 +228,7 @@ void mm5799_device::op_ret()
void mm5799_device::op_rets()
{
- // RET: return from subroutine, skip next
+ // RETS: return from subroutine, skip next
op_ret();
m_skip = true;
}
diff --git a/src/devices/cpu/cosmac/cosdasm.cpp b/src/devices/cpu/cosmac/cosdasm.cpp
index d491651da50..d655a2e0a2b 100644
--- a/src/devices/cpu/cosmac/cosdasm.cpp
+++ b/src/devices/cpu/cosmac/cosdasm.cpp
@@ -243,9 +243,9 @@ offs_t cosmac_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
case 0xc6: CDP1802_OPCODE("LSNZ %04X", long_skip(pc)); flags = STEP_COND; break;
case 0xc7: CDP1802_OPCODE("LSNF %04X", long_skip(pc)); flags = STEP_COND; break;
case 0xc8: CDP1802_OPCODE("LSKP %04X", long_skip(pc)); break;
- case 0xc9: CDP1802_OPCODE("LBNQ %04X", long_skip(pc)); flags = STEP_COND; break;
- case 0xca: CDP1802_OPCODE("LBNZ %04X", long_skip(pc)); flags = STEP_COND; break;
- case 0xcb: CDP1802_OPCODE("LBNF %04X", long_skip(pc)); flags = STEP_COND; break;
+ case 0xc9: CDP1802_OPCODE("LBNQ %04X", long_branch(pc, params)); flags = STEP_COND; break;
+ case 0xca: CDP1802_OPCODE("LBNZ %04X", long_branch(pc, params)); flags = STEP_COND; break;
+ case 0xcb: CDP1802_OPCODE("LBNF %04X", long_branch(pc, params)); flags = STEP_COND; break;
case 0xcc: CDP1802_OPCODE("LSIE %04X", long_skip(pc)); flags = STEP_COND; break;
case 0xcd: CDP1802_OPCODE("LSQ %04X", long_skip(pc)); flags = STEP_COND; break;
case 0xce: CDP1802_OPCODE("LSZ %04X", long_skip(pc)); flags = STEP_COND; break;
diff --git a/src/devices/cpu/cosmac/cosmac.cpp b/src/devices/cpu/cosmac/cosmac.cpp
index 6b9c866c92e..eb1b73397ac 100644
--- a/src/devices/cpu/cosmac/cosmac.cpp
+++ b/src/devices/cpu/cosmac/cosmac.cpp
@@ -365,6 +365,9 @@ cosmac_device::cosmac_device(const machine_config &mconfig, device_type type, co
m_io_config("io", ENDIANNESS_LITTLE, 8, 3),
m_read_wait(*this, 0),
m_read_clear(*this, 0),
+ m_read_int(*this, 0),
+ m_read_dma_in(*this, 0),
+ m_read_dma_out(*this, 0),
m_read_ef(*this, 0),
m_write_q(*this),
m_read_dma(*this, 0),
@@ -740,17 +743,6 @@ uint32_t cosmac_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t cosmac_device::execute_input_lines() const noexcept
-{
- return 7;
-}
-
-
-//-------------------------------------------------
// execute_set_input -
//-------------------------------------------------
@@ -807,7 +799,7 @@ void cosmac_device::execute_run()
// execute initialization cycle
m_state = cosmac_state::STATE_1_INIT;
- run();
+ run_state();
// next state is IDLE
m_state = cosmac_state::STATE_1_EXECUTE;
@@ -823,11 +815,13 @@ void cosmac_device::execute_run()
break;
case cosmac_mode::RESET:
+ debugger_wait_hook();
reset_state();
m_icount--;
break;
case cosmac_mode::PAUSE:
+ debugger_wait_hook();
m_icount--;
break;
@@ -917,7 +911,7 @@ inline void cosmac_device::run_state()
inline void cosmac_device::debug()
{
- if ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) && m_state == cosmac_state::STATE_0_FETCH)
+ if (debugger_enabled() && m_state == cosmac_state::STATE_0_FETCH)
{
debugger_instruction_hook(R[P]);
}
@@ -939,6 +933,28 @@ inline void cosmac_device::sample_wait_clear()
//-------------------------------------------------
+// sample_interrupt - sample interrupt line
+//-------------------------------------------------
+
+bool cosmac_device::sample_interrupt()
+{
+ if (!m_read_int.isunset()) m_irq = m_read_int();
+ return bool(m_irq);
+}
+
+
+//-------------------------------------------------
+// sample_dma_io - sample dma in/out lines
+//-------------------------------------------------
+
+inline void cosmac_device::sample_dma_io()
+{
+ if (!m_read_dma_in.isunset()) m_dmain = m_read_dma_in();
+ if (!m_read_dma_out.isunset()) m_dmaout = m_read_dma_out();
+}
+
+
+//-------------------------------------------------
// sample_ef_lines - sample EF input lines
//-------------------------------------------------
@@ -1111,6 +1127,8 @@ inline void cosmac_device::initialize()
m_icount -= CLOCKS_INIT;
+ sample_dma_io();
+
if (m_dmain)
{
m_state = cosmac_state::STATE_2_DMA_IN;
@@ -1139,6 +1157,8 @@ inline void cosmac_device::execute_instruction()
m_icount -= CLOCKS_EXECUTE;
+ sample_dma_io();
+
if (m_state == cosmac_state::STATE_1_EXECUTE && (m_op >> 4) == 0xc) // "long" opcodes
{
m_state = cosmac_state::STATE_1_EXECUTE_2ND;
@@ -1175,6 +1195,8 @@ inline void cosmac_device::dma_input()
m_icount -= CLOCKS_DMA;
+ sample_dma_io();
+
if (m_dmain)
{
m_state = cosmac_state::STATE_2_DMA_IN;
@@ -1211,6 +1233,8 @@ inline void cosmac_device::dma_output()
m_icount -= CLOCKS_DMA;
+ sample_dma_io();
+
if (m_dmain)
{
m_state = cosmac_state::STATE_2_DMA_IN;
@@ -1248,6 +1272,8 @@ inline void cosmac_device::interrupt()
m_icount -= CLOCKS_INTERRUPT;
+ sample_dma_io();
+
if (m_dmain)
{
m_state = cosmac_state::STATE_2_DMA_IN;
@@ -1479,7 +1505,7 @@ void cosmac_device::rsxd() { RAM_W(R[X], R[N] & 0xff); R[X]--; RAM_W(R[X], R[N]
void cosmac_device::rnx() { R[X] = R[N]; }
void cosmac_device::bci() { short_branch(m_cil); m_cil = 0; }
-void cosmac_device::bxi() { short_branch(m_irq); }
+void cosmac_device::bxi() { short_branch(sample_interrupt()); }
void cosmac_device::xie() { m_xie = 1; }
void cosmac_device::xid() { m_xie = 0; }
diff --git a/src/devices/cpu/cosmac/cosmac.h b/src/devices/cpu/cosmac/cosmac.h
index d89d2622156..01b35785911 100644
--- a/src/devices/cpu/cosmac/cosmac.h
+++ b/src/devices/cpu/cosmac/cosmac.h
@@ -158,6 +158,9 @@ public:
auto wait_cb() { return m_read_wait.bind(); }
auto clear_cb() { return m_read_clear.bind(); }
+ auto int_cb() { return m_read_int.bind(); }
+ auto dma_in_cb() { return m_read_dma_in.bind(); }
+ auto dma_out_cb() { return m_read_dma_out.bind(); }
auto ef1_cb() { return m_read_ef[0].bind(); }
auto ef2_cb() { return m_read_ef[1].bind(); }
auto ef3_cb() { return m_read_ef[2].bind(); }
@@ -186,13 +189,12 @@ protected:
cosmac_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -225,8 +227,10 @@ protected:
inline void dma_input();
inline void dma_output();
inline void interrupt();
- virtual bool check_irq() { return m_ie && m_irq; }
+ virtual bool check_irq() { return m_ie && sample_interrupt(); }
inline void sample_wait_clear();
+ bool sample_interrupt();
+ inline void sample_dma_io();
inline void sample_ef_lines();
virtual void output_state_code();
inline void set_q_flag(int state);
@@ -367,6 +371,9 @@ protected:
// device callbacks
devcb_read_line m_read_wait;
devcb_read_line m_read_clear;
+ devcb_read_line m_read_int;
+ devcb_read_line m_read_dma_in;
+ devcb_read_line m_read_dma_out;
devcb_read_line::array<4> m_read_ef;
devcb_write_line m_write_q;
devcb_read8 m_read_dma;
@@ -506,7 +513,7 @@ protected:
virtual cosmac_device::ophandler get_ophandler(uint16_t opcode) const override;
virtual bool has_extended_opcodes() override { return true; }
- virtual bool check_irq() override { return m_ie && ((m_irq && m_xie) || (m_cil && m_cie)); }
+ virtual bool check_irq() override { return m_ie && ((sample_interrupt() && m_xie) || (m_cil && m_cie)); }
virtual void reset_state() override;
private:
diff --git a/src/devices/cpu/cp1610/1610dasm.h b/src/devices/cpu/cp1610/1610dasm.h
index 59cc61b36f9..4f23cf1af24 100644
--- a/src/devices/cpu/cp1610/1610dasm.h
+++ b/src/devices/cpu/cp1610/1610dasm.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Frank Palazzolo
-#ifndef MAME_CPU_CP1610_CP1610DASM_H
-#define MAME_CPU_CP1610_CP1610DASM_H
+#ifndef MAME_CPU_CP1610_1610DASM_H
+#define MAME_CPU_CP1610_1610DASM_H
#pragma once
@@ -16,4 +16,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_CP1610_1610DASM_H
diff --git a/src/devices/cpu/cp1610/cp1610.cpp b/src/devices/cpu/cp1610/cp1610.cpp
index 4746fc18cd2..5b46a84ca63 100644
--- a/src/devices/cpu/cp1610/cp1610.cpp
+++ b/src/devices/cpu/cp1610/cp1610.cpp
@@ -5,7 +5,7 @@
* cp1610.c
* Portable CP1610 emulator (General Instrument CP1610)
*
- * Copyright Frank Palazzolo, all rights reserved.
+ * Copyright Frank Palazzolo
*
* This work is based on Juergen Buchmueller's F8 emulation,
* and the 'General Instruments CP1610' data sheets.
diff --git a/src/devices/cpu/cp1610/cp1610.h b/src/devices/cpu/cp1610/cp1610.h
index af2ed5a7fe2..22dc92d9197 100644
--- a/src/devices/cpu/cp1610/cp1610.h
+++ b/src/devices/cpu/cp1610/cp1610.h
@@ -5,7 +5,7 @@
* cp1610.h
* Portable General Instruments CP1610 emulator interface
*
- * Copyright Frank Palazzolo, all rights reserved.
+ * Copyright Frank Palazzolo
*
*****************************************************************************/
@@ -36,13 +36,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == CP1610_INT_INTR; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/cr16b/cr16b.h b/src/devices/cpu/cr16b/cr16b.h
index a8028b03108..ef63ceed380 100644
--- a/src/devices/cpu/cr16b/cr16b.h
+++ b/src/devices/cpu/cr16b/cr16b.h
@@ -26,8 +26,8 @@ protected:
cr16b_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/cubeqcpu/cubeqcpu.h b/src/devices/cpu/cubeqcpu/cubeqcpu.h
index 543f90a8a82..76ac972bafe 100644
--- a/src/devices/cpu/cubeqcpu/cubeqcpu.h
+++ b/src/devices/cpu/cubeqcpu/cubeqcpu.h
@@ -57,13 +57,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1; }
- virtual u32 execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -156,13 +155,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1; }
- virtual u32 execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -268,13 +266,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1; }
- virtual u32 execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/diablo/diablo1300.h b/src/devices/cpu/diablo/diablo1300.h
index f706938f2a0..7218b8c0356 100644
--- a/src/devices/cpu/diablo/diablo1300.h
+++ b/src/devices/cpu/diablo/diablo1300.h
@@ -24,14 +24,13 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- //virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
//virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/drcbearm64.cpp b/src/devices/cpu/drcbearm64.cpp
new file mode 100644
index 00000000000..9bf5eccf06b
--- /dev/null
+++ b/src/devices/cpu/drcbearm64.cpp
@@ -0,0 +1,5071 @@
+// license:BSD-3-Clause
+// copyright-holders:windyfairy, Vas Crabb
+/***************************************************************************
+
+Register use:
+
+r0 first function parameter/return value
+r1 second function parameter
+r2 third function parameter
+r3 fourth function parameter
+r4
+r5
+r6
+r7
+r8
+r9 temporary for intermediate values
+r10 temporary for intermediate values
+r11 temporary for intermediate values
+r12 scratch register used by helper functions
+r13 scratch register used by helper functions
+r14 scratch register used for address calculation
+r15 temporary used in opcode functions
+r16
+r17
+r18
+r19 UML register I0
+r20 UML register I1
+r21 UML register I2
+r22 UML register I3
+r23 UML register I4
+r24 UML register I5
+r35 UML register I6
+r26 UML register I7
+r27 near cache pointer
+r28 emulated flags
+r29 base generated code frame pointer
+r30 link register
+sp stack pointer
+
+
+Stack layout in top-level generated code frame:
+
+FP -> SP + 0x00 previous FP
+ SP + 0x08 top-level return address
+ SP + 0x10 saved non-volatile registers
+ SP + 0x18 ...
+
+Stack layout in nested generated code subroutine call frame:
+
+SP -> SP + 0x00 saved FP
+ SP + 0x08 return address
+ ...
+ FP - 0x10 saved FP
+ FP - 0x08 return address
+FP -> FP + 0x00 previous FP
+ FP + 0x08 top-level return address
+
+The frame pointer (FP or x29) is only updated by the top-level generated
+code entry point. Generated code subroutines (called using CALLH, EXH or
+on a failed HASHJMP) push FP and LR onto the stack but do not update FP.
+All the saved FP values will be identical.
+
+A native debugger following the FP chain will see any number of nested
+generated code subroutine call frames as a single stack frame. The return
+addresses and duplicate saved FP values for the generated code subroutine
+calls will appear as the local variable area of the frame.
+
+You can calculate the generated code subroutine call depth as
+(FP - SP) / 0x10. You can see the return addresses for the generated code
+subroutine calls at SP + 0x08, SP + 0x18, SP + 0x28, etc. until reaching
+the location FP points to.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "drcbearm64.h"
+
+#include "drcbeut.h"
+#include "uml.h"
+
+#include "debug/debugcpu.h"
+#include "emuopts.h"
+
+#include "mfpresolve.h"
+
+#include "asmjit/src/asmjit/asmjit.h"
+#include "asmjit/src/asmjit/a64.h"
+
+#include <cstddef>
+#include <cstdio>
+#include <cstdlib>
+#include <vector>
+
+
+namespace drc {
+
+namespace {
+
+using namespace uml;
+
+using namespace asmjit;
+
+const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY;
+const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
+const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
+const uint32_t PTYPE_F = 1 << parameter::PTYPE_FLOAT_REGISTER;
+const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R;
+const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
+const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
+
+// Pass/receive value registers
+const a64::Gp REG_PARAM1 = a64::x0;
+const a64::Gp REG_PARAM2 = a64::x1;
+const a64::Gp REG_PARAM3 = a64::x2;
+const a64::Gp REG_PARAM4 = a64::x3;
+
+// Stable registers that can be assumed to be unchanged by internal functions
+const a64::Gp TEMP_REG1 = a64::x9;
+const a64::Gp TEMP_REG2 = a64::x10;
+const a64::Gp TEMP_REG3 = a64::x11;
+
+// Temporary registers that should not be assumed to live between functions
+const a64::Gp SCRATCH_REG1 = a64::x12;
+const a64::Gp SCRATCH_REG2 = a64::x13;
+
+// Temporary memory calculation register, should not be used outside of functions that calculate memory addresses
+const a64::Gp MEM_SCRATCH_REG = a64::x14;
+
+// Only to be used in an opcode level function. Should not be used in helper functions
+const a64::Gp FUNC_SCRATCH_REG = a64::x15;
+
+const a64::Vec TEMPF_REG1 = a64::d16;
+const a64::Vec TEMPF_REG2 = a64::d17;
+const a64::Vec TEMPF_REG3 = a64::d18;
+
+// Base memory address
+const a64::Gp BASE_REG = a64::x27;
+
+// Software emulated flags (bit 0 = FLAG_C, bit 4 = FLAG_U)
+const a64::Gp FLAGS_REG = a64::x28;
+
+const a64::Gp::Id int_register_map[REG_I_COUNT] =
+{
+ a64::Gp::Id(a64::x19.id()),
+ a64::Gp::Id(a64::x20.id()),
+ a64::Gp::Id(a64::x21.id()),
+ a64::Gp::Id(a64::x22.id()),
+ a64::Gp::Id(a64::x23.id()),
+ a64::Gp::Id(a64::x24.id()),
+ a64::Gp::Id(a64::x25.id()),
+ a64::Gp::Id(a64::x26.id()),
+};
+
+const a64::Gp::Id float_register_map[REG_F_COUNT] =
+{
+ a64::Gp::Id(a64::d8.id()),
+ a64::Gp::Id(a64::d9.id()),
+ a64::Gp::Id(a64::d10.id()),
+ a64::Gp::Id(a64::d11.id()),
+ a64::Gp::Id(a64::d12.id()),
+ a64::Gp::Id(a64::d13.id()),
+ a64::Gp::Id(a64::d14.id()),
+ a64::Gp::Id(a64::d15.id()),
+};
+
+// condition mapping table
+const a64::CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
+{
+ a64::CondCode::kEQ, // COND_Z = 0x80, requires Z COND_E
+ a64::CondCode::kNE, // COND_NZ, requires Z COND_NE
+ a64::CondCode::kMI, // COND_S, requires S
+ a64::CondCode::kPL, // COND_NS, requires S
+ a64::CondCode::kLO, // COND_C, requires C COND_B
+ a64::CondCode::kHS, // COND_NC, requires C COND_AE
+ a64::CondCode::kVS, // COND_V, requires V
+ a64::CondCode::kVC, // COND_NV, requires V
+ a64::CondCode::kAL, // COND_U, requires U (emulated in software)
+ a64::CondCode::kAL, // COND_NU, requires U (emulated in software)
+ a64::CondCode::kHI, // COND_A, requires CZ
+ a64::CondCode::kLS, // COND_BE, requires CZ
+ a64::CondCode::kGT, // COND_G, requires SVZ
+ a64::CondCode::kLE, // COND_LE, requires SVZ
+ a64::CondCode::kLT, // COND_L, requires SV
+ a64::CondCode::kGE, // COND_GE, requires SV
+};
+
+// UML flag bit numbers
+constexpr unsigned FLAG_BIT_C = 0;
+constexpr unsigned FLAG_BIT_V = 1;
+constexpr unsigned FLAG_BIT_Z = 2;
+constexpr unsigned FLAG_BIT_S = 3;
+constexpr unsigned FLAG_BIT_U = 4;
+
+// masks for immediate values that can be generated with movz instructions
+constexpr uint64_t LSL0_MASK = 0x00000000'0000ffff;
+constexpr uint64_t LSL16_MASK = 0x00000000'ffff0000;
+constexpr uint64_t LSL32_MASK = 0x0000ffff'00000000;
+constexpr uint64_t LSL48_MASK = 0xffff0000'00000000;
+
+
+#define ARM_CONDITION(condition) (condition_map[condition - COND_Z])
+#define ARM_NOT_CONDITION(condition) (negateCond(condition_map[condition - COND_Z]))
+
+#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
+#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
+#define assert_no_flags(inst) assert((inst).flags() == 0)
+#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
+
+
+class ThrowableErrorHandler : public ErrorHandler
+{
+public:
+ void handleError(Error err, const char *message, BaseEmitter *origin) override
+ {
+ throw emu_fatalerror("asmjit error %d: %s", err, message);
+ }
+};
+
+
+// helper functions
+
+inline a64::Vec select_register(a64::Vec const &reg, uint32_t regsize)
+{
+ if (regsize == 4)
+ return reg.s();
+ return reg.d();
+}
+
+inline a64::Gp select_register(a64::Gp const &reg, uint32_t regsize)
+{
+ if (regsize == 4)
+ return reg.w();
+ return reg.x();
+}
+
+inline bool is_valid_immediate_mask(uint64_t val, size_t bytes)
+{
+ const unsigned bits = bytes * 8;
+
+ // all zeros and all ones aren't allowed, and disallow any value with bits outside of the max bit range
+ if ((val == 0) || (val >= util::make_bitmask<uint64_t>(bits)))
+ return false;
+
+ // work out if the value is repeating sequence of a power-of-two bit group
+ unsigned width = 2;
+ uint64_t mask = util::make_bitmask<uint64_t>(bits - width);
+ while ((width < bits) && ((val & mask) != (val >> width)))
+ {
+ mask >>= width;
+ width <<= 1;
+ }
+
+ // check check that set bits are contiguous
+ const auto lz = count_leading_zeros_64(val & make_bitmask<uint64_t>(width));
+ const uint64_t invleftaligned = ~(val << lz);
+ return !(invleftaligned & (invleftaligned + 1));
+}
+
+inline bool is_valid_immediate(uint64_t val, size_t bits)
+{
+ assert(bits < 64);
+ return val < (uint64_t(1) << bits);
+}
+
+constexpr bool is_valid_immediate_addsub(uint64_t val)
+{
+ // 12-bit unsigned immediate value, optionally left-shifted by 12 bits
+ return !(val & ~util::make_bitmask<uint64_t>(12)) || !(val & ~(util::make_bitmask<uint64_t>(12) << 12));
+}
+
+inline constexpr bool is_valid_immediate_signed(int64_t val, size_t bits)
+{
+ return util::sext(val, bits) == val;
+}
+
+inline constexpr bool is_valid_offset(int64_t diff, int max_shift)
+{
+ if (is_valid_immediate_signed(diff, 9))
+ return true; // 9-bit signed offset
+ else if ((diff >= 0) && (diff < (1 << (12 + max_shift))) && !(diff & make_bitmask<int64_t>(max_shift)))
+ return true; // 12-bit unsigned offset shifted by operand size
+ else
+ return false;
+}
+
+inline bool is_simple_mov_immediate(uint64_t val, size_t bytes)
+{
+ if (!(val & ~LSL0_MASK) || !(val & ~LSL16_MASK) || !(val & ~LSL32_MASK) || !(val & ~LSL48_MASK))
+ return true; // movz
+ else if (!(~val & ~LSL0_MASK) || !(~val & ~LSL16_MASK) || !(~val & ~LSL32_MASK) || !(~val & ~LSL48_MASK))
+ return true; // movn
+ else if ((val == uint32_t(val)) && (((val & LSL0_MASK) == LSL0_MASK) || ((val & LSL16_MASK) == LSL16_MASK)))
+ return true; // movn to w register
+ else if (is_valid_immediate_mask(val, bytes))
+ return true; // orr with zero register
+ else
+ return false;
+}
+
+inline bool emit_add_optimized(a64::Assembler &a, const a64::Gp &dst, const a64::Gp &src, int64_t val)
+{
+ // If the bottom 12 bits are 0s then an optimized form can be used if the remaining bits are <= 12
+ if (is_valid_immediate_addsub(val))
+ {
+ a.add(dst, src, val);
+ return true;
+ }
+
+ return false;
+}
+
+inline bool emit_sub_optimized(a64::Assembler &a, const a64::Gp &dst, const a64::Gp &src, int64_t val)
+{
+ if (val < 0)
+ val = -val;
+
+ // If the bottom 12 bits are 0s then an optimized form can be used if the remaining bits are <= 12
+ if (is_valid_immediate_addsub(val))
+ {
+ a.sub(dst, src, val);
+ return true;
+ }
+
+ return false;
+}
+
+void get_imm_absolute(a64::Assembler &a, const a64::Gp &reg, const uint64_t val)
+{
+ // Check for constants that can be generated with a single instruction
+ if (is_simple_mov_immediate(val, reg.isGpX() ? 8 : 4))
+ {
+ a.mov(reg, val);
+ return;
+ }
+ else if (reg.isGpX() && is_valid_immediate_mask(val, 4))
+ {
+ a.mov(reg.w(), val); // asmjit isn't smart enough to work this out
+ return;
+ }
+
+ // Values close to the program counter can be generated with a single adr
+ const uint64_t codeoffs = a.code()->baseAddress() + a.offset();
+ const int64_t reloffs = int64_t(val) - codeoffs;
+ if (is_valid_immediate_signed(reloffs, 21))
+ {
+ a.adr(reg, val);
+ return;
+ }
+
+ // Values within 4G of the program counter can be generated with adrp followed by add
+ const uint64_t pagebase = codeoffs & ~make_bitmask<uint64_t>(12);
+ const int64_t pagerel = int64_t(val) - pagebase;
+ if (is_valid_immediate_signed(pagerel, 21 + 12))
+ {
+ const uint64_t targetpage = val & ~make_bitmask<uint64_t>(12);
+ const uint64_t pageoffs = val & util::make_bitmask<uint64_t>(12);
+
+ a.adrp(reg.x(), targetpage);
+ if (pageoffs != 0)
+ a.add(reg, reg, pageoffs);
+
+ return;
+ }
+
+ // up to four instructions
+ a.mov(reg, val);
+}
+
+void store_unordered(a64::Assembler &a)
+{
+ a.cset(SCRATCH_REG1, a64::CondCode::kPL);
+ a.cset(SCRATCH_REG2, a64::CondCode::kNE);
+ a.and_(SCRATCH_REG1, SCRATCH_REG1, SCRATCH_REG2);
+ a.cset(SCRATCH_REG2, a64::CondCode::kCS);
+ a.and_(SCRATCH_REG1, SCRATCH_REG1, SCRATCH_REG2);
+ a.cset(SCRATCH_REG2, a64::CondCode::kVS);
+ a.and_(SCRATCH_REG1, SCRATCH_REG1, SCRATCH_REG2);
+ a.bfi(FLAGS_REG, SCRATCH_REG2, FLAG_BIT_U, 1);
+}
+
+inline void get_unordered(a64::Assembler &a, const a64::Gp &reg)
+{
+ a.ubfx(reg.x(), FLAGS_REG, FLAG_BIT_U, 1);
+}
+
+inline void store_carry_reg(a64::Assembler &a, const a64::Gp &reg)
+{
+ a.bfi(FLAGS_REG, reg.x(), FLAG_BIT_C, 1);
+}
+
+inline void get_carry(a64::Assembler &a, const a64::Gp &reg, bool inverted = false)
+{
+ a.and_(reg.x(), FLAGS_REG, 1);
+
+ if (inverted)
+ a.eor(reg.x(), reg.x(), 1);
+}
+
+
+class drcbe_arm64 : public drcbe_interface
+{
+public:
+ drcbe_arm64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
+ virtual ~drcbe_arm64();
+
+ virtual void reset() override;
+ virtual int execute(uml::code_handle &entry) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) const noexcept override;
+ virtual void get_info(drcbe_info &info) const noexcept override;
+ virtual bool logging() const noexcept override { return false; }
+
+private:
+ enum class carry_state
+ {
+ POISON, // does not correspond to UML carry flag
+ CANONICAL, // corresponds directly to UML carry flag
+ LOGICAL // logical borrow state
+ };
+
+ class be_parameter
+ {
+ public:
+ // parameter types
+ enum be_parameter_type
+ {
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
+ PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
+ PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_MAX
+ };
+
+ typedef uint64_t be_parameter_value;
+
+ be_parameter() : m_type(PTYPE_NONE), m_value(0), m_coldreg(false) { }
+ be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val), m_coldreg(false) { }
+ be_parameter(drcbe_arm64 &drcbe, const uml::parameter &param, uint32_t allowed);
+ be_parameter(const be_parameter &param) = default;
+
+ static be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
+ static be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
+ static be_parameter make_memory(void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(base)); }
+ static be_parameter make_memory(const void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(const_cast<void *>(base))); }
+
+ bool operator==(const be_parameter &rhs) const { return (m_type == rhs.m_type) && (m_value == rhs.m_value); }
+ bool operator!=(const be_parameter &rhs) const { return (m_type != rhs.m_type) || (m_value != rhs.m_value); }
+
+ be_parameter_type type() const { return m_type; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint32_t ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ uint32_t freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
+
+ bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
+ bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
+ bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
+ bool is_memory() const { return (m_type == PTYPE_MEMORY); }
+
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+ bool is_cold_register() const { return m_coldreg; }
+
+ a64::Vec get_register_float(uint32_t regsize) const;
+ a64::Gp get_register_int(uint32_t regsize) const;
+ a64::Vec select_register(a64::Vec const &reg, uint32_t regsize) const;
+ a64::Gp select_register(a64::Gp const &reg, uint32_t regsize) const;
+
+ private:
+ static inline constexpr int REG_MAX = 30;
+
+ be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value), m_coldreg(false) { }
+
+ be_parameter_type m_type;
+ be_parameter_value m_value;
+ bool m_coldreg;
+ };
+
+ struct near_state
+ {
+ uint32_t emulated_flags;
+ };
+
+ struct memory_accessors
+ {
+ resolved_memory_accessors resolved;
+ address_space::specific_access_info specific;
+ offs_t address_mask;
+ u8 high_bits;
+ bool no_mask;
+ bool mask_simple;
+ bool mask_high_bits;
+ };
+
+ using arm64_entry_point_func = uint32_t (*)(void *entry);
+
+ void generate_one(a64::Assembler &a, const uml::instruction &inst);
+
+ void op_handle(a64::Assembler &a, const uml::instruction &inst);
+ void op_hash(a64::Assembler &a, const uml::instruction &inst);
+ void op_label(a64::Assembler &a, const uml::instruction &inst);
+ void op_comment(a64::Assembler &a, const uml::instruction &inst);
+ void op_mapvar(a64::Assembler &a, const uml::instruction &inst);
+
+ void op_nop(a64::Assembler &a, const uml::instruction &inst);
+ void op_break(a64::Assembler &a, const uml::instruction &inst);
+ void op_debug(a64::Assembler &a, const uml::instruction &inst);
+ void op_exit(a64::Assembler &a, const uml::instruction &inst);
+ void op_hashjmp(a64::Assembler &a, const uml::instruction &inst);
+ void op_jmp(a64::Assembler &a, const uml::instruction &inst);
+ void op_exh(a64::Assembler &a, const uml::instruction &inst);
+ void op_callh(a64::Assembler &a, const uml::instruction &inst);
+ void op_ret(a64::Assembler &a, const uml::instruction &inst);
+ void op_callc(a64::Assembler &a, const uml::instruction &inst);
+ void op_recover(a64::Assembler &a, const uml::instruction &inst);
+
+ void op_setfmod(a64::Assembler &a, const uml::instruction &inst);
+ void op_getfmod(a64::Assembler &a, const uml::instruction &inst);
+ void op_getexp(a64::Assembler &a, const uml::instruction &inst);
+ void op_getflgs(a64::Assembler &a, const uml::instruction &inst);
+ void op_setflgs(a64::Assembler &a, const uml::instruction &inst);
+ void op_save(a64::Assembler &a, const uml::instruction &inst);
+ void op_restore(a64::Assembler &a, const uml::instruction &inst);
+
+ void op_load(a64::Assembler &a, const uml::instruction &inst);
+ void op_loads(a64::Assembler &a, const uml::instruction &inst);
+ void op_store(a64::Assembler &a, const uml::instruction &inst);
+ void op_read(a64::Assembler &a, const uml::instruction &inst);
+ void op_readm(a64::Assembler &a, const uml::instruction &inst);
+ void op_write(a64::Assembler &a, const uml::instruction &inst);
+ void op_writem(a64::Assembler &a, const uml::instruction &inst);
+ void op_carry(a64::Assembler &a, const uml::instruction &inst);
+ void op_set(a64::Assembler &a, const uml::instruction &inst);
+ void op_mov(a64::Assembler &a, const uml::instruction &inst);
+ void op_sext(a64::Assembler &a, const uml::instruction &inst);
+ void op_roland(a64::Assembler &a, const uml::instruction &inst);
+ void op_rolins(a64::Assembler &a, const uml::instruction &inst);
+ template <bool CarryIn> void op_add(a64::Assembler &a, const uml::instruction &inst);
+ template <bool CarryIn> void op_sub(a64::Assembler &a, const uml::instruction &inst);
+ void op_cmp(a64::Assembler &a, const uml::instruction &inst);
+ void op_mulu(a64::Assembler &a, const uml::instruction &inst);
+ void op_mululw(a64::Assembler &a, const uml::instruction &inst);
+ void op_muls(a64::Assembler &a, const uml::instruction &inst);
+ void op_mulslw(a64::Assembler &a, const uml::instruction &inst);
+ template <a64::Inst::Id Opcode> void op_div(a64::Assembler &a, const uml::instruction &inst);
+ void op_and(a64::Assembler &a, const uml::instruction &inst);
+ void op_test(a64::Assembler &a, const uml::instruction &inst);
+ void op_or(a64::Assembler &a, const uml::instruction &inst);
+ void op_xor(a64::Assembler &a, const uml::instruction &inst);
+ void op_lzcnt(a64::Assembler &a, const uml::instruction &inst);
+ void op_tzcnt(a64::Assembler &a, const uml::instruction &inst);
+ void op_bswap(a64::Assembler &a, const uml::instruction &inst);
+ template <a64::Inst::Id Opcode> void op_shift(a64::Assembler &a, const uml::instruction &inst);
+ void op_rol(a64::Assembler &a, const uml::instruction &inst);
+ void op_rolc(a64::Assembler &a, const uml::instruction &inst);
+ void op_rorc(a64::Assembler &a, const uml::instruction &inst);
+
+ void op_fload(a64::Assembler &a, const uml::instruction &inst);
+ void op_fstore(a64::Assembler &a, const uml::instruction &inst);
+ void op_fread(a64::Assembler &a, const uml::instruction &inst);
+ void op_fwrite(a64::Assembler &a, const uml::instruction &inst);
+ void op_fmov(a64::Assembler &a, const uml::instruction &inst);
+ void op_ftoint(a64::Assembler &a, const uml::instruction &inst);
+ void op_ffrint(a64::Assembler &a, const uml::instruction &inst);
+ void op_ffrflt(a64::Assembler &a, const uml::instruction &inst);
+ void op_frnds(a64::Assembler &a, const uml::instruction &inst);
+ void op_fcmp(a64::Assembler &a, const uml::instruction &inst);
+ void op_fcopyi(a64::Assembler &a, const uml::instruction &inst);
+ void op_icopyf(a64::Assembler &a, const uml::instruction &inst);
+
+ template <a64::Inst::Id Opcode> void op_float_alu(a64::Assembler &a, const uml::instruction &inst);
+ template <a64::Inst::Id Opcode> void op_float_alu2(a64::Assembler &a, const uml::instruction &inst);
+
+ size_t emit(CodeHolder &ch);
+
+
+ // helper functions
+ void get_imm_relative(a64::Assembler &a, const a64::Gp &reg, const uint64_t ptr) const;
+
+ void emit_ldr_str_base_mem(a64::Assembler &a, a64::Inst::Id opcode, const a64::Reg &reg, int max_shift, const void *ptr) const;
+ void emit_ldr_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_ldrb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_ldrh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_ldrsb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_ldrsh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_ldrsw_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_str_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_strb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+ void emit_strh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const;
+
+ void emit_float_ldr_mem(a64::Assembler &a, const a64::Vec &reg, const void *ptr) const;
+ void emit_float_str_mem(a64::Assembler &a, const a64::Vec &reg, const void *ptr) const;
+
+ void emit_skip(a64::Assembler &a, uml::condition_t cond, Label &skip);
+
+ arm::Mem emit_loadstore_address_setup(a64::Assembler &a, const a64::Gp &basereg, const be_parameter &indp, const uml::parameter &scalesizep) const;
+
+ void emit_memaccess_setup(a64::Assembler &a, const be_parameter &addrp, const memory_accessors &accessors, const address_space::specific_access_info::side &side) const;
+ void emit_narrow_memwrite(a64::Assembler &a, const be_parameter &addrp, const parameter &spacesizep, const memory_accessors &accessors) const;
+
+ void store_carry(a64::Assembler &a, bool inverted = false);
+ void load_carry(a64::Assembler &a, bool inverted = false);
+ void set_flags(a64::Assembler &a);
+
+ void calculate_carry_shift_left(a64::Assembler &a, const a64::Gp &reg, const a64::Gp &shift, int maxBits);
+ void calculate_carry_shift_left_imm(a64::Assembler &a, const a64::Gp &reg, const int shift, int maxBits);
+
+ void calculate_carry_shift_right(a64::Assembler &a, const a64::Gp &reg, const a64::Gp &shift);
+ void calculate_carry_shift_right_imm(a64::Assembler &a, const a64::Gp &reg, const int shift);
+
+ void mov_float_reg_param(a64::Assembler &a, uint32_t regsize, a64::Vec const &dst, const be_parameter &src) const;
+ void mov_float_param_param(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const;
+ void mov_float_param_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, a64::Vec const &src) const;
+ void mov_float_param_int_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, a64::Gp const &src) const;
+
+ void mov_reg_param(a64::Assembler &a, uint32_t regsize, const a64::Gp &dst, const be_parameter &src) const;
+ void mov_param_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const a64::Gp &src) const;
+ void mov_param_imm(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, uint64_t src) const;
+ void mov_param_param(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const;
+ void mov_mem_param(a64::Assembler &a, uint32_t regsize, void *dst, const be_parameter &src) const;
+
+ void call_arm_addr(a64::Assembler &a, const void *offs) const;
+
+ [[noreturn]] void end_of_block() const;
+
+ drc_hash_table m_hash;
+ drc_map_variables m_map;
+ FILE *m_log_asmjit;
+ carry_state m_carry_state;
+
+ arm64_entry_point_func m_entry;
+ drccodeptr m_exit;
+ drccodeptr m_nocode;
+ drccodeptr m_endofblock;
+
+ uint8_t *m_baseptr;
+
+ near_state &m_near;
+
+ resolved_member_function m_debug_cpu_instruction_hook;
+ resolved_member_function m_drcmap_get_value;
+ std::vector<memory_accessors> m_memory_accessors;
+};
+
+
+inline void drcbe_arm64::generate_one(a64::Assembler &a, const uml::instruction &inst)
+{
+ switch (inst.opcode())
+ {
+ // Compile-time opcodes
+ case uml::OP_HANDLE: op_handle(a, inst); break; // HANDLE handle
+ case uml::OP_HASH: op_hash(a, inst); break; // HASH mode,pc
+ case uml::OP_LABEL: op_label(a, inst); break; // LABEL imm
+ case uml::OP_COMMENT: op_comment(a, inst); break; // COMMENT string
+ case uml::OP_MAPVAR: op_mapvar(a, inst); break; // MAPVAR mapvar,value
+
+ // Control Flow Operations
+ case uml::OP_NOP: op_nop(a, inst); break; // NOP
+ case uml::OP_BREAK: op_break(a, inst); break; // BREAK
+ case uml::OP_DEBUG: op_debug(a, inst); break; // DEBUG pc
+ case uml::OP_EXIT: op_exit(a, inst); break; // EXIT src1[,c]
+ case uml::OP_HASHJMP: op_hashjmp(a, inst); break; // HASHJMP mode,pc,handle
+ case uml::OP_JMP: op_jmp(a, inst); break; // JMP imm[,c]
+ case uml::OP_EXH: op_exh(a, inst); break; // EXH handle,param[,c]
+ case uml::OP_CALLH: op_callh(a, inst); break; // CALLH handle[,c]
+ case uml::OP_RET: op_ret(a, inst); break; // RET [c]
+ case uml::OP_CALLC: op_callc(a, inst); break; // CALLC func,ptr[,c]
+ case uml::OP_RECOVER: op_recover(a, inst); break; // RECOVER dst,mapvar
+
+ // Internal Register Operations
+ case uml::OP_SETFMOD: op_setfmod(a, inst); break; // SETFMOD src
+ case uml::OP_GETFMOD: op_getfmod(a, inst); break; // GETFMOD dst
+ case uml::OP_GETEXP: op_getexp(a, inst); break; // GETEXP dst
+ case uml::OP_GETFLGS: op_getflgs(a, inst); break; // GETFLGS dst[,f]
+ case uml::OP_SETFLGS: op_setflgs(a, inst); break; // SETFLGS dst[,f]
+ case uml::OP_SAVE: op_save(a, inst); break; // SAVE dst
+ case uml::OP_RESTORE: op_restore(a, inst); break; // RESTORE dst
+
+ // Integer Operations
+ case uml::OP_LOAD: op_load(a, inst); break; // LOAD dst,base,index,size
+ case uml::OP_LOADS: op_loads(a, inst); break; // LOADS dst,base,index,size
+ case uml::OP_STORE: op_store(a, inst); break; // STORE base,index,src,size
+ case uml::OP_READ: op_read(a, inst); break; // READ dst,src1,spacesize
+ case uml::OP_READM: op_readm(a, inst); break; // READM dst,src1,mask,spacesize
+ case uml::OP_WRITE: op_write(a, inst); break; // WRITE dst,src1,spacesize
+ case uml::OP_WRITEM: op_writem(a, inst); break; // WRITEM dst,src1,spacesize
+ case uml::OP_CARRY: op_carry(a, inst); break; // CARRY src,bitnum
+ case uml::OP_SET: op_set(a, inst); break; // SET dst,c
+ case uml::OP_MOV: op_mov(a, inst); break; // MOV dst,src[,c]
+ case uml::OP_SEXT: op_sext(a, inst); break; // SEXT dst,src
+ case uml::OP_ROLAND: op_roland(a, inst); break; // ROLAND dst,src1,src2,src3
+ case uml::OP_ROLINS: op_rolins(a, inst); break; // ROLINS dst,src1,src2,src3
+ case uml::OP_ADD: op_add<false>(a, inst); break; // ADD dst,src1,src2[,f]
+ case uml::OP_ADDC: op_add<true>(a, inst); break; // ADDC dst,src1,src2[,f]
+ case uml::OP_SUB: op_sub<false>(a, inst); break; // SUB dst,src1,src2[,f]
+ case uml::OP_SUBB: op_sub<true>(a, inst); break; // SUBB dst,src1,src2[,f]
+ case uml::OP_CMP: op_cmp(a, inst); break; // CMP src1,src2[,f]
+ case uml::OP_MULU: op_mulu(a, inst); break; // MULU dst,edst,src1,src2[,f]
+ case uml::OP_MULULW: op_mululw(a, inst); break; // MULULW dst,src1,src2[,f]
+ case uml::OP_MULS: op_muls(a, inst); break; // MULS dst,edst,src1,src2[,f]
+ case uml::OP_MULSLW: op_mulslw(a, inst); break; // MULSLW dst,src1,src2[,f]
+ case uml::OP_DIVU: op_div<a64::Inst::kIdUdiv>(a, inst); break; // DIVU dst,edst,src1,src2[,f]
+ case uml::OP_DIVS: op_div<a64::Inst::kIdSdiv>(a, inst); break; // DIVS dst,edst,src1,src2[,f]
+ case uml::OP_AND: op_and(a, inst); break; // AND dst,src1,src2[,f]
+ case uml::OP_TEST: op_test(a, inst); break; // TEST src1,src2[,f]
+ case uml::OP_OR: op_or(a, inst); break; // OR dst,src1,src2[,f]
+ case uml::OP_XOR: op_xor(a, inst); break; // XOR dst,src1,src2[,f]
+ case uml::OP_LZCNT: op_lzcnt(a, inst); break; // LZCNT dst,src[,f]
+ case uml::OP_TZCNT: op_tzcnt(a, inst); break; // TZCNT dst,src[,f]
+ case uml::OP_BSWAP: op_bswap(a, inst); break; // BSWAP dst,src
+ case uml::OP_SHL: op_shift<a64::Inst::kIdLsl>(a, inst); break; // SHL dst,src,count[,f]
+ case uml::OP_SHR: op_shift<a64::Inst::kIdLsr>(a, inst); break; // SHR dst,src,count[,f]
+ case uml::OP_SAR: op_shift<a64::Inst::kIdAsr>(a, inst); break; // SAR dst,src,count[,f]
+ case uml::OP_ROL: op_rol(a, inst); break; // ROL dst,src,count[,f]
+ case uml::OP_ROLC: op_rolc(a, inst); break; // ROLC dst,src,count[,f]
+ case uml::OP_ROR: op_shift<a64::Inst::kIdRor>(a, inst); break; // ROR dst,src,count[,f]
+ case uml::OP_RORC: op_rorc(a, inst); break; // RORC dst,src,count[,f]
+
+ // Floating Point Operations
+ case uml::OP_FLOAD: op_fload(a, inst); break; // FLOAD dst,base,index
+ case uml::OP_FSTORE: op_fstore(a, inst); break; // FSTORE base,index,src
+ case uml::OP_FREAD: op_fread(a, inst); break; // FREAD dst,space,src1
+ case uml::OP_FWRITE: op_fwrite(a, inst); break; // FWRITE space,dst,src1
+ case uml::OP_FMOV: op_fmov(a, inst); break; // FMOV dst,src1[,c]
+ case uml::OP_FTOINT: op_ftoint(a, inst); break; // FTOINT dst,src1,size,round
+ case uml::OP_FFRINT: op_ffrint(a, inst); break; // FFRINT dst,src1,size
+ case uml::OP_FFRFLT: op_ffrflt(a, inst); break; // FFRFLT dst,src1,size
+ case uml::OP_FRNDS: op_frnds(a, inst); break; // FRNDS dst,src1
+ case uml::OP_FADD: op_float_alu<a64::Inst::kIdFadd_v>(a, inst); break; // FADD dst,src1,src2
+ case uml::OP_FSUB: op_float_alu<a64::Inst::kIdFsub_v>(a, inst); break; // FSUB dst,src1,src2
+ case uml::OP_FCMP: op_fcmp(a, inst); break; // FCMP src1,src2
+ case uml::OP_FMUL: op_float_alu<a64::Inst::kIdFmul_v>(a, inst); break; // FMUL dst,src1,src2
+ case uml::OP_FDIV: op_float_alu<a64::Inst::kIdFdiv_v> (a, inst); break; // FDIV dst,src1,src2
+ case uml::OP_FNEG: op_float_alu2<a64::Inst::kIdFneg_v>(a, inst); break; // FNEG dst,src1
+ case uml::OP_FABS: op_float_alu2<a64::Inst::kIdFabs_v>(a, inst); break; // FABS dst,src1
+ case uml::OP_FSQRT: op_float_alu2<a64::Inst::kIdFsqrt_v>(a, inst); break; // FSQRT dst,src1
+ case uml::OP_FRECIP: op_float_alu2<a64::Inst::kIdFrecpe_v>(a, inst); break; // FRECIP dst,src1
+ case uml::OP_FRSQRT: op_float_alu2<a64::Inst::kIdFrsqrte_v>(a, inst); break; // FRSQRT dst,src1
+ case uml::OP_FCOPYI: op_fcopyi(a, inst); break; // FCOPYI dst,src
+ case uml::OP_ICOPYF: op_icopyf(a, inst); break; // ICOPYF dst,src
+
+ default: throw emu_fatalerror("drcbe_arm64(%s): unhandled opcode %u\n", m_device.tag(), inst.opcode());
+ }
+};
+
+drcbe_arm64::be_parameter::be_parameter(drcbe_arm64 &drcbe, const parameter &param, uint32_t allowed)
+{
+ switch (param.type())
+ {
+ // immediates pass through
+ case parameter::PTYPE_IMMEDIATE:
+ assert(allowed & PTYPE_I);
+ *this = param.immediate();
+ break;
+
+ // memory passes through
+ case parameter::PTYPE_MEMORY:
+ assert(allowed & PTYPE_M);
+ *this = make_memory(param.memory());
+ break;
+
+ // if a register maps to a register, keep it as a register; otherwise map it to memory
+ case parameter::PTYPE_INT_REGISTER:
+ assert(allowed & PTYPE_R);
+ assert(allowed & PTYPE_M);
+ if (int regnum = int_register_map[param.ireg() - REG_I0]; regnum != 0)
+ {
+ *this = make_ireg(regnum);
+ }
+ else
+ {
+ *this = make_memory(&drcbe.m_state.r[param.ireg() - REG_I0]);
+ m_coldreg = true;
+ }
+ break;
+
+ // if a register maps to a register, keep it as a register; otherwise map it to memory
+ case parameter::PTYPE_FLOAT_REGISTER:
+ assert(allowed & PTYPE_F);
+ assert(allowed & PTYPE_M);
+ if (int regnum = float_register_map[param.freg() - REG_F0]; regnum != 0)
+ {
+ *this = make_freg(regnum);
+ }
+ else
+ {
+ *this = make_memory(&drcbe.m_state.f[param.freg() - REG_F0]);
+ m_coldreg = true;
+ }
+ break;
+
+ // everything else is unexpected
+ default:
+ fatalerror("Unexpected parameter type %d\n", param.type());
+ }
+}
+
+a64::Vec drcbe_arm64::be_parameter::get_register_float(uint32_t regsize) const
+{
+ assert(m_type == PTYPE_FLOAT_REGISTER);
+ return a64::Vec::fromTypeAndId((regsize == 4) ? RegType::kARM_VecS : RegType::kARM_VecD, m_value);
+}
+
+a64::Gp drcbe_arm64::be_parameter::get_register_int(uint32_t regsize) const
+{
+ assert(m_type == PTYPE_INT_REGISTER);
+ return a64::Gp::fromTypeAndId((regsize == 4) ? RegType::kARM_GpW : RegType::kARM_GpX, m_value);
+}
+
+a64::Vec drcbe_arm64::be_parameter::select_register(a64::Vec const &reg, uint32_t regsize) const
+{
+ if (m_type == PTYPE_FLOAT_REGISTER)
+ return get_register_float(regsize);
+ else if (regsize == 4)
+ return reg.s();
+ else
+ return reg.d();
+}
+
+a64::Gp drcbe_arm64::be_parameter::select_register(a64::Gp const &reg, uint32_t regsize) const
+{
+ if (m_type == PTYPE_INT_REGISTER)
+ return get_register_int(regsize);
+ else if (regsize == 4)
+ return reg.w();
+ else
+ return reg.x();
+}
+
+void drcbe_arm64::get_imm_relative(a64::Assembler &a, const a64::Gp &reg, const uint64_t val) const
+{
+ // Check for constants that can be generated with a single instruction
+ if (is_simple_mov_immediate(val, reg.isGpX() ? 8 : 4))
+ {
+ a.mov(reg, val);
+ return;
+ }
+ else if (reg.isGpX() && is_valid_immediate_mask(val, 4))
+ {
+ a.mov(reg.w(), val); // asmjit isn't smart enough to work this out
+ return;
+ }
+
+ // Values close to the program counter can be generated with a single adr
+ const uint64_t codeoffs = a.code()->baseAddress() + a.offset();
+ const int64_t reloffs = int64_t(val) - codeoffs;
+ if (is_valid_immediate_signed(reloffs, 21))
+ {
+ a.adr(reg, val);
+ return;
+ }
+
+ // If a value can be expressed relative to the base register then it's worth using it
+ const int64_t diff = int64_t(val) - int64_t(m_baseptr);
+ if ((diff > 0) && emit_add_optimized(a, reg, BASE_REG, diff))
+ return;
+ else if ((diff < 0) && emit_sub_optimized(a, reg, BASE_REG, diff))
+ return;
+
+ // Values within 4G of the program counter can be generated with adrp followed by add
+ const uint64_t pagebase = codeoffs & ~make_bitmask<uint64_t>(12);
+ const int64_t pagerel = int64_t(val) - pagebase;
+ if (is_valid_immediate_signed(pagerel, 21 + 12))
+ {
+ const uint64_t targetpage = val & ~make_bitmask<uint64_t>(12);
+ const uint64_t pageoffs = val & util::make_bitmask<uint64_t>(12);
+
+ a.adrp(reg.x(), targetpage);
+ if (pageoffs != 0)
+ a.add(reg, reg, pageoffs);
+
+ return;
+ }
+
+ // up to four instructions
+ a.mov(reg, val);
+}
+
+inline void drcbe_arm64::emit_ldr_str_base_mem(a64::Assembler &a, a64::Inst::Id opcode, const a64::Reg &reg, int max_shift, const void *ptr) const
+{
+ // If it can fit as an immediate offset
+ const int64_t diff = int64_t(ptr) - int64_t(m_baseptr);
+ if (is_valid_offset(diff, max_shift))
+ {
+ a.emit(opcode, reg, arm::Mem(BASE_REG, diff));
+ return;
+ }
+
+ // If it can fit as an offset relative to PC
+ const uint64_t codeoffs = a.code()->baseAddress() + a.offset();
+ const int64_t reloffs = int64_t(ptr) - codeoffs;
+ if (is_valid_immediate_signed(reloffs, 21))
+ {
+ a.adr(MEM_SCRATCH_REG, ptr);
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG));
+ return;
+ }
+
+ if (diff > 0 && is_valid_immediate(diff, 16))
+ {
+ a.mov(MEM_SCRATCH_REG, diff);
+ a.emit(opcode, reg, arm::Mem(BASE_REG, MEM_SCRATCH_REG));
+ return;
+ }
+
+ if (diff > 0 && emit_add_optimized(a, MEM_SCRATCH_REG, BASE_REG, diff))
+ {
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG));
+ return;
+ }
+ else if (diff < 0 && emit_sub_optimized(a, MEM_SCRATCH_REG, BASE_REG, diff))
+ {
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG));
+ return;
+ }
+
+ // If it's in a nearby page
+ const uint64_t pagebase = codeoffs & ~make_bitmask<uint64_t>(12);
+ const int64_t pagerel = (int64_t)ptr - pagebase;
+ if (is_valid_immediate_signed(pagerel, 21 + 12))
+ {
+ const uint64_t targetpage = (uint64_t)ptr & ~make_bitmask<uint64_t>(12);
+ const uint64_t pageoffs = (uint64_t)ptr & util::make_bitmask<uint64_t>(12);
+
+ a.adrp(MEM_SCRATCH_REG, targetpage);
+ if (is_valid_offset(pageoffs, max_shift))
+ {
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG, pageoffs));
+ }
+ else
+ {
+ a.add(MEM_SCRATCH_REG, MEM_SCRATCH_REG, pageoffs);
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG));
+ }
+ return;
+ }
+
+ if (diff >= 0)
+ {
+ const int shift = (diff & make_bitmask<int64_t>(max_shift)) ? 0 : max_shift;
+
+ if (is_valid_immediate(diff >> shift, 32))
+ {
+ a.mov(MEM_SCRATCH_REG, diff >> shift);
+
+ if (shift)
+ a.emit(opcode, reg, arm::Mem(BASE_REG, MEM_SCRATCH_REG, arm::lsl(shift)));
+ else
+ a.emit(opcode, reg, arm::Mem(BASE_REG, MEM_SCRATCH_REG));
+
+ return;
+ }
+ }
+
+ // Can't optimize it at all, most likely becomes 4 MOV instructions
+ a.mov(MEM_SCRATCH_REG, ptr);
+ a.emit(opcode, reg, arm::Mem(MEM_SCRATCH_REG));
+}
+
+void drcbe_arm64::emit_ldr_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdr, reg, reg.isGpW() ? 2 : 3, ptr); }
+void drcbe_arm64::emit_ldrb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrb, reg, 0, ptr); }
+void drcbe_arm64::emit_ldrh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrh, reg, 1, ptr); }
+void drcbe_arm64::emit_ldrsb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsb, reg, 0, ptr); }
+void drcbe_arm64::emit_ldrsh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsh, reg, 1, ptr); }
+void drcbe_arm64::emit_ldrsw_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdrsw, reg, 2, ptr); }
+void drcbe_arm64::emit_str_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStr, reg, reg.isGpW() ? 2 : 3, ptr); }
+void drcbe_arm64::emit_strb_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrb, reg, 0, ptr); }
+void drcbe_arm64::emit_strh_mem(a64::Assembler &a, const a64::Gp &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStrh, reg, 1, ptr); }
+
+void drcbe_arm64::emit_float_ldr_mem(a64::Assembler &a, const a64::Vec &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdLdr_v, reg, reg.isVecS() ? 2 : 3, ptr); }
+void drcbe_arm64::emit_float_str_mem(a64::Assembler &a, const a64::Vec &reg, const void *ptr) const { emit_ldr_str_base_mem(a, a64::Inst::kIdStr_v, reg, reg.isVecS() ? 2 : 3, ptr); }
+
+void drcbe_arm64::emit_skip(a64::Assembler &a, uml::condition_t cond, Label &skip)
+{
+ // Nothing to do if the instruction is unconditional
+ if (cond == uml::COND_ALWAYS)
+ return;
+
+ // Branch to the skip point if the condition is not met
+ skip = a.newLabel();
+ switch (cond)
+ {
+ case uml::COND_U:
+ a.tbz(FLAGS_REG, FLAG_BIT_U, skip);
+ break;
+ case uml::COND_NU:
+ a.tbnz(FLAGS_REG, FLAG_BIT_U, skip);
+ break;
+ case uml::COND_C:
+ case uml::COND_NC:
+ switch (m_carry_state)
+ {
+ case carry_state::CANONICAL:
+ a.b(ARM_CONDITION(cond), skip);
+ break;
+ case carry_state::LOGICAL:
+ a.b(ARM_NOT_CONDITION(cond), skip);
+ break;
+ default:
+ a.emit((cond == uml::COND_C) ? a64::Inst::kIdTbz : a64::Inst::kIdTbnz, FLAGS_REG, FLAG_BIT_C, skip);
+ }
+ break;
+ case uml::COND_A:
+ case uml::COND_BE:
+ load_carry(a, true);
+ [[fallthrough]];
+ default:
+ a.b(ARM_NOT_CONDITION(cond), skip);
+ }
+}
+
+inline arm::Mem drcbe_arm64::emit_loadstore_address_setup(a64::Assembler &a, const a64::Gp &basereg, const be_parameter &indp, const uml::parameter &scalesizep) const
+{
+ assert(!indp.is_immediate());
+
+ const int scale = scalesizep.scale();
+ if (scale == 0)
+ {
+ // if there's no shift, sign extension can be part of the addressing mode
+ const a64::Gp offsreg = TEMP_REG3.w();
+ mov_reg_param(a, 4, offsreg, indp);
+ return arm::Mem(basereg, offsreg, a64::sxtw(0));
+ }
+ else
+ {
+ const a64::Gp indreg = TEMP_REG3.x();
+ if (indp.is_int_register())
+ a.sxtw(indreg, indp.get_register_int(4));
+ else if ((util::endianness::native == util::endianness::big) && indp.is_cold_register())
+ emit_ldrsw_mem(a, indreg, reinterpret_cast<uint8_t *>(indp.memory()) + 4);
+ else
+ emit_ldrsw_mem(a, indreg, indp.memory());
+
+ // the scale needs to match the size for shifting to be part of the addressing mode
+ if (scale == scalesizep.size())
+ return arm::Mem(basereg, indreg, arm::lsl(scale));
+
+ a.add(basereg, basereg, indreg, arm::lsl(scale));
+ return arm::Mem(basereg);
+ }
+}
+
+void drcbe_arm64::emit_memaccess_setup(a64::Assembler &a, const be_parameter &addrp, const memory_accessors &accessors, const address_space::specific_access_info::side &side) const
+{
+ auto const addrreg = (accessors.no_mask || accessors.mask_simple) ? REG_PARAM2 : a64::x6;
+ mov_reg_param(a, 4, addrreg, addrp);
+ get_imm_relative(a, a64::x8, uintptr_t(side.dispatch));
+
+ // if the high bits aren't affected by the global mask, extract them early
+ if (accessors.high_bits && !accessors.mask_high_bits)
+ a.ubfx(a64::w7, addrreg.w(), accessors.specific.low_bits, accessors.high_bits);
+
+ if (accessors.mask_simple)
+ a.and_(REG_PARAM2.w(), addrreg.w(), accessors.address_mask);
+ else if (!accessors.no_mask)
+ a.mov(REG_PARAM2.w(), accessors.address_mask); // 32-bit value, no more than two instructions
+
+ // if the high address bits aren't affected by the global mask, load the dispatch table entry now
+ if (!accessors.high_bits)
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8));
+ else if (!accessors.mask_high_bits)
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8, a64::x7, arm::lsl(3)));
+
+ // apply non-trivial global mask if necessary
+ if (!accessors.no_mask && !accessors.mask_simple)
+ a.and_(REG_PARAM2.w(), REG_PARAM2.w(), addrreg.w());
+
+ // if the high address bits are affected by the global mask, load the dispatch table entry now
+ if (accessors.mask_high_bits)
+ {
+ a.lsr(a64::w7, REG_PARAM2.w(), accessors.specific.low_bits);
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8, a64::x7, arm::lsl(3)));
+ }
+
+ // apply this pointer displacement if necessary
+ if (side.displacement)
+ a.add(REG_PARAM1, REG_PARAM1, side.displacement); // assume less than 4K
+
+ // adjusted dispatch table entry pointer in REG_PARAM1
+ // masked address in REG_PARAM2
+ // x8, x7 and potentially x6 clobbered
+}
+
+void drcbe_arm64::emit_narrow_memwrite(a64::Assembler &a, const be_parameter &addrp, const parameter &spacesizep, const memory_accessors &accessors) const
+{
+ // expects data in REG_PARAM3 and mask in REG_PARAM4
+
+ address_space &space = *m_space[spacesizep.space()];
+ auto const addrreg = (accessors.no_mask || accessors.mask_simple) ? REG_PARAM2 : a64::x5;
+ mov_reg_param(a, 4, addrreg, addrp);
+ get_imm_relative(a, a64::x8, uintptr_t(accessors.specific.write.dispatch));
+
+ // get the shift count for the data and offset in w7
+ int const shift = space.addr_shift() - 3;
+ uint32_t const shiftmask = (accessors.specific.native_bytes - (1 << spacesizep.size())) << 3;
+ if (space.endianness() != ENDIANNESS_LITTLE)
+ {
+ // swizzle for big Endian spaces
+ bool const smallshift = (shift <= 0) && (shift >= -3);
+ if (!smallshift)
+ {
+ if (shift < 0)
+ a.lsl(a64::w6, addrreg.w(), -shift);
+ else
+ a.lsr(a64::w6, addrreg.w(), shift);
+ }
+ a.mov(a64::w7, shiftmask);
+ if (smallshift)
+ a.bic(a64::w7, a64::w7, addrreg.w(), -shift);
+ else
+ a.bic(a64::w7, a64::w7, a64::w6);
+ }
+ else
+ {
+ if (!shift)
+ {
+ a.and_(a64::w7, addrreg.w(), shiftmask);
+ }
+ else
+ {
+ if (shift < 0)
+ a.lsl(a64::w7, addrreg.w(), -shift);
+ else
+ a.lsr(a64::w7, addrreg.w(), shift);
+ a.and_(a64::w7, a64::w7, shiftmask);
+ }
+ }
+
+ // if the high bits aren't affected by the global mask, extract them early
+ if (accessors.high_bits && !accessors.mask_high_bits)
+ a.ubfx(a64::w6, addrreg.w(), accessors.specific.low_bits, accessors.high_bits);
+
+ if (accessors.mask_simple)
+ a.and_(REG_PARAM2.w(), addrreg.w(), accessors.address_mask);
+ else if (!accessors.no_mask)
+ a.mov(REG_PARAM2.w(), accessors.address_mask); // 32-bit value, no more than two instructions
+
+ // if the high address bits aren't affected by the global mask, load the dispatch table entry now
+ if (!accessors.high_bits)
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8));
+ else if (!accessors.mask_high_bits)
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8, a64::x6, arm::lsl(3)));
+
+ // apply non-trivial global mask if necessary
+ if (!accessors.no_mask && !accessors.mask_simple)
+ a.and_(REG_PARAM2.w(), REG_PARAM2.w(), addrreg.w());
+
+ // if the high address bits are affected by the global mask, load the dispatch table entry now
+ if (accessors.mask_high_bits)
+ {
+ a.lsr(a64::w6, REG_PARAM2.w(), accessors.specific.low_bits);
+ a.ldr(REG_PARAM1, a64::Mem(a64::x8, a64::x6, arm::lsl(3)));
+ }
+
+ // apply this pointer displacement if necessary
+ if (accessors.specific.write.displacement)
+ a.add(REG_PARAM1, REG_PARAM1, accessors.specific.write.displacement); // assume less than 4K
+
+ // shift the data and mask
+ a.lsl(REG_PARAM3, REG_PARAM3, a64::x7);
+ a.lsl(REG_PARAM4, REG_PARAM4, a64::x7);
+
+ // call the write function
+ if (accessors.specific.write.is_virtual)
+ {
+ a.ldr(a64::x8, a64::Mem(REG_PARAM1));
+ a.ldr(a64::x8, a64::Mem(a64::x8, accessors.specific.write.function)); // assume no more than 4096 vtable entries
+ a.blr(a64::x8);
+ }
+ else
+ {
+ call_arm_addr(a, (const void *)accessors.specific.write.function);
+ }
+}
+
+void drcbe_arm64::mov_reg_param(a64::Assembler &a, uint32_t regsize, const a64::Gp &dst, const be_parameter &src) const
+{
+ const a64::Gp dstreg = select_register(dst, regsize);
+ if (src.is_immediate())
+ {
+ get_imm_relative(a, dstreg, (regsize == 4) ? uint32_t(src.immediate()) : src.immediate());
+ }
+ else if (src.is_int_register() && dst.id() != src.ireg())
+ {
+ a.mov(dstreg, src.get_register_int(regsize));
+ }
+ else if (src.is_memory())
+ {
+ if ((util::endianness::native == util::endianness::big) && (regsize == 4) && src.is_cold_register())
+ emit_ldr_mem(a, dstreg, reinterpret_cast<uint8_t *>(src.memory()) + 4);
+ else
+ emit_ldr_mem(a, dstreg, src.memory());
+ }
+}
+
+void drcbe_arm64::mov_param_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const a64::Gp &src) const
+{
+ assert(!dst.is_immediate());
+
+ if (dst.is_memory())
+ {
+ if (dst.is_cold_register())
+ emit_str_mem(a, src.x(), dst.memory());
+ else
+ emit_str_mem(a, select_register(src, regsize), dst.memory());
+ }
+ else if (dst.is_int_register() && src.id() != dst.ireg())
+ {
+ a.mov(dst.get_register_int(regsize), select_register(src, regsize));
+ }
+}
+
+void drcbe_arm64::mov_param_imm(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, uint64_t src) const
+{
+ assert(!dst.is_immediate());
+
+ if (dst.is_memory())
+ {
+ const uint32_t movsize = dst.is_cold_register() ? 8 : regsize;
+
+ if (src == 0)
+ {
+ emit_str_mem(a, select_register(a64::xzr, movsize), dst.memory());
+ }
+ else
+ {
+ const a64::Gp scratch = select_register(SCRATCH_REG2, movsize);
+
+ get_imm_relative(a, scratch, (regsize == 4) ? uint32_t(src) : src);
+ emit_str_mem(a, scratch, dst.memory());
+ }
+ }
+ else if (dst.is_int_register())
+ {
+ get_imm_relative(a, dst.get_register_int(regsize), src);
+ }
+}
+
+void drcbe_arm64::mov_param_param(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const
+{
+ // FIXME: this won't clear upper bits of the output for a 4-byte move when the source is a register or immediate
+ // need to fix affected cases (mov, sext), currently confounded by issues in the simplifier
+ assert(!dst.is_immediate());
+
+ if (src.is_memory())
+ {
+ if (dst.is_int_register())
+ {
+ mov_reg_param(a, regsize, dst.get_register_int(regsize), src);
+ }
+ else
+ {
+ mov_reg_param(a, regsize, SCRATCH_REG1, src);
+ mov_param_reg(a, regsize, dst, SCRATCH_REG1);
+ }
+ }
+ else if (src.is_int_register())
+ {
+ mov_param_reg(a, regsize, dst, src.get_register_int(regsize));
+ }
+ else if (src.is_immediate())
+ {
+ mov_param_imm(a, regsize, dst, src.immediate());
+ }
+}
+
+void drcbe_arm64::mov_mem_param(a64::Assembler &a, uint32_t regsize, void *dst, const be_parameter &src) const
+{
+ const a64::Gp scratch = select_register(SCRATCH_REG2, regsize);
+
+ if (src.is_immediate_value(0))
+ {
+ emit_str_mem(a, select_register(a64::xzr, regsize), dst);
+ }
+ else if (src.is_immediate())
+ {
+ get_imm_relative(a, scratch, (regsize == 4) ? uint32_t(src.immediate()) : src.immediate());
+ emit_str_mem(a, scratch, dst);
+ }
+ else if (src.is_memory())
+ {
+ if ((util::endianness::native == util::endianness::big) && (regsize == 4) && src.is_cold_register())
+ emit_ldr_mem(a, scratch, reinterpret_cast<uint8_t *>(src.memory()) + 4);
+ else
+ emit_ldr_mem(a, scratch, src.memory());
+
+ emit_str_mem(a, scratch, dst);
+ }
+ else if (src.is_int_register())
+ {
+ emit_str_mem(a, src.get_register_int(regsize), dst);
+ }
+}
+
+void drcbe_arm64::mov_float_reg_param(a64::Assembler &a, uint32_t regsize, a64::Vec const &dst, const be_parameter &src) const
+{
+ assert(!src.is_immediate());
+
+ if (src.is_memory())
+ emit_float_ldr_mem(a, select_register(dst, regsize), src.memory());
+ else if (src.is_float_register() && dst.id() != src.freg())
+ a.fmov(select_register(dst, regsize), src.get_register_float(regsize));
+}
+
+void drcbe_arm64::mov_float_param_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, a64::Vec const &src) const
+{
+ assert(!dst.is_immediate());
+
+ if (dst.is_memory())
+ emit_float_str_mem(a, select_register(src, regsize), dst.memory());
+ else if (dst.is_float_register() && src.id() != dst.freg())
+ a.fmov(dst.get_register_float(regsize), select_register(src, regsize));
+}
+
+void drcbe_arm64::mov_float_param_int_reg(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, a64::Gp const &src) const
+{
+ assert(!dst.is_immediate());
+
+ if (dst.is_memory())
+ emit_str_mem(a, src, dst.memory());
+ else if (dst.is_float_register())
+ a.fmov(dst.get_register_float(regsize), src);
+}
+
+void drcbe_arm64::mov_float_param_param(a64::Assembler &a, uint32_t regsize, const be_parameter &dst, const be_parameter &src) const
+{
+ assert(!src.is_immediate());
+ assert(!dst.is_immediate());
+
+ if (dst.is_float_register())
+ {
+ mov_float_reg_param(a, regsize, dst.get_register_float(regsize), src);
+ }
+ else if (dst.is_memory())
+ {
+ if (src.is_float_register())
+ {
+ mov_float_param_reg(a, regsize, dst, src.get_register_float(regsize));
+ }
+ else if (src.is_memory())
+ {
+ const a64::Gp scratch = select_register(SCRATCH_REG2, regsize);
+ emit_ldr_mem(a, scratch, src.memory());
+ emit_str_mem(a, scratch, dst.memory());
+ }
+ }
+}
+
+void drcbe_arm64::call_arm_addr(a64::Assembler &a, const void *offs) const
+{
+ const uint64_t codeoffs = a.code()->baseAddress() + a.offset();
+ const int64_t reloffs = int64_t(offs) - codeoffs;
+ if (is_valid_immediate_signed(reloffs, 26 + 2))
+ {
+ a.bl(offs);
+ }
+ else
+ {
+ get_imm_relative(a, SCRATCH_REG1, uintptr_t(offs));
+ a.blr(SCRATCH_REG1);
+ }
+}
+
+void drcbe_arm64::store_carry(a64::Assembler &a, bool inverted)
+{
+ m_carry_state = inverted ? carry_state::LOGICAL : carry_state::CANONICAL;
+
+ if (inverted)
+ a.cset(SCRATCH_REG1, a64::CondCode::kCC);
+ else
+ a.cset(SCRATCH_REG1, a64::CondCode::kCS);
+
+ store_carry_reg(a, SCRATCH_REG1);
+}
+
+void drcbe_arm64::load_carry(a64::Assembler &a, bool inverted)
+{
+ const carry_state desired = inverted ? carry_state::LOGICAL : carry_state::CANONICAL;
+ if (desired != m_carry_state)
+ {
+ m_carry_state = desired;
+
+ a.mrs(SCRATCH_REG1, a64::Predicate::SysReg::kNZCV);
+ a.bfi(SCRATCH_REG1, FLAGS_REG, 29, 1);
+
+ if (inverted)
+ a.eor(SCRATCH_REG1, SCRATCH_REG1, 1 << 29);
+
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+ }
+}
+
+void drcbe_arm64::set_flags(a64::Assembler &a)
+{
+ // Set native condition codes after loading flags register
+ m_carry_state = carry_state::POISON;
+
+ a.mrs(TEMP_REG1, a64::Predicate::SysReg::kNZCV);
+
+ a.and_(TEMP_REG2, FLAGS_REG, 0b1100); // zero + sign
+ a.ubfx(TEMP_REG3, FLAGS_REG, FLAG_BIT_V, 1); // overflow flag
+ a.orr(TEMP_REG2, TEMP_REG2, TEMP_REG3);
+ a.bfi(TEMP_REG1, TEMP_REG2, 28, 4);
+
+ a.msr(a64::Predicate::SysReg::kNZCV, TEMP_REG1);
+
+ a.mov(TEMP_REG2, FLAG_C | FLAG_U);
+ a.and_(FLAGS_REG, FLAGS_REG, TEMP_REG2);
+}
+
+void drcbe_arm64::calculate_carry_shift_left(a64::Assembler &a, const a64::Gp &reg, const a64::Gp &shift, int maxBits)
+{
+ m_carry_state = carry_state::POISON;
+
+ Label calc = a.newLabel();
+ Label end = a.newLabel();
+
+ a.cbnz(shift, calc);
+ store_carry_reg(a, a64::xzr);
+ a.b(end);
+
+ a.bind(calc);
+ const a64::Gp scratch = select_register(SCRATCH_REG1, reg.isGpW() ? 4 : 8);
+
+ // carry = ((PARAM1 << (shift - 1)) >> maxBits) & 1
+ a.movz(scratch, maxBits + 1);
+ a.sub(scratch, scratch, shift);
+ a.lsr(scratch, reg, scratch);
+ store_carry_reg(a, scratch);
+
+ a.bind(end);
+}
+
+void drcbe_arm64::calculate_carry_shift_left_imm(a64::Assembler &a, const a64::Gp &reg, const int shift, int maxBits)
+{
+ m_carry_state = carry_state::POISON;
+
+ if (shift == 0)
+ {
+ store_carry_reg(a, a64::xzr);
+ return;
+ }
+
+ const a64::Gp scratch = select_register(SCRATCH_REG1, reg.isGpW() ? 4 : 8);
+
+ // carry = ((PARAM1 << (shift - 1)) >> maxBits) & 1
+ a.lsr(scratch, reg, maxBits + 1 - shift);
+ store_carry_reg(a, scratch);
+}
+
+void drcbe_arm64::calculate_carry_shift_right(a64::Assembler &a, const a64::Gp &reg, const a64::Gp &shift)
+{
+ m_carry_state = carry_state::POISON;
+
+ Label calc = a.newLabel();
+ Label end = a.newLabel();
+
+ a.cbnz(shift, calc);
+ store_carry_reg(a, a64::xzr);
+ a.b(end);
+
+ a.bind(calc);
+ const a64::Gp scratch = select_register(SCRATCH_REG1, reg.isGpW() ? 4 : 8);
+
+ // carry = (PARAM1 >> (shift - 1)) & 1
+ a.sub(scratch, shift, 1);
+ a.lsr(scratch, reg, scratch);
+ store_carry_reg(a, scratch);
+
+ a.bind(end);
+}
+
+void drcbe_arm64::calculate_carry_shift_right_imm(a64::Assembler &a, const a64::Gp &reg, const int shift)
+{
+ m_carry_state = carry_state::POISON;
+
+ if (shift == 0)
+ {
+ store_carry_reg(a, a64::xzr);
+ return;
+ }
+
+ const a64::Gp scratch = select_register(SCRATCH_REG1, reg.isGpW() ? 4 : 8);
+
+ // carry = (PARAM1 >> (shift - 1)) & 1
+ a.lsr(scratch, reg, shift - 1);
+ store_carry_reg(a, scratch);
+}
+
+drcbe_arm64::drcbe_arm64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
+ : drcbe_interface(drcuml, cache, device)
+ , m_hash(cache, modes, addrbits, ignorebits)
+ , m_map(cache, 0xaaaaaaaa5555)
+ , m_log_asmjit(nullptr)
+ , m_carry_state(carry_state::POISON)
+ , m_entry(nullptr)
+ , m_exit(nullptr)
+ , m_nocode(nullptr)
+ , m_endofblock(nullptr)
+ , m_baseptr(cache.near() + 0x100)
+ , m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
+{
+ m_near.emulated_flags = 0;
+
+ // create the log
+ if (device.machine().options().drc_log_native())
+ {
+ m_log_asmjit = fopen(std::string("drcbearm64_asmjit_").append(device.shortname()).append(".asm").c_str(), "w");
+ }
+
+ // resolve the actual addresses of member functions we need to call
+ m_drcmap_get_value.set(m_map, &drc_map_variables::get_value);
+ if (!m_drcmap_get_value)
+ throw emu_fatalerror("Error resolving map variable get value function!\n");
+ m_memory_accessors.resize(m_space.size());
+ for (int space = 0; m_space.size() > space; ++space)
+ {
+ if (m_space[space])
+ {
+ auto &accessors = m_memory_accessors[space];
+ accessors.resolved.set(*m_space[space]);
+ accessors.specific = m_space[space]->specific_accessors();
+ accessors.address_mask = m_space[space]->addrmask() & make_bitmask<offs_t>(accessors.specific.address_width) & ~make_bitmask<offs_t>(accessors.specific.native_mask_bits);
+ offs_t const shiftedmask = accessors.address_mask >> accessors.specific.low_bits;
+ offs_t const nomask = ~offs_t(0);
+ accessors.high_bits = 32 - count_leading_zeros_32(shiftedmask);
+ accessors.no_mask = nomask == accessors.address_mask;
+ accessors.mask_simple = !accessors.no_mask && is_valid_immediate_mask(accessors.address_mask, 4);
+ accessors.mask_high_bits = (shiftedmask & (shiftedmask + 1)) != 0;
+ }
+ }
+}
+
+drcbe_arm64::~drcbe_arm64()
+{
+ if (m_log_asmjit)
+ fclose(m_log_asmjit);
+}
+
+size_t drcbe_arm64::emit(CodeHolder &ch)
+{
+ Error err;
+
+ size_t const alignment = ch.baseAddress() - uint64_t(m_cache.top());
+ size_t const code_size = ch.codeSize();
+
+ // test if enough room remains in the DRC cache
+ drccodeptr *cachetop = m_cache.begin_codegen(alignment + code_size);
+ if (!cachetop)
+ return 0;
+
+ err = ch.copyFlattenedData(drccodeptr(ch.baseAddress()), code_size, CopySectionFlags::kPadTargetBuffer);
+ if (err)
+ throw emu_fatalerror("CodeHolder::copyFlattenedData() error %d", err);
+
+ // update the drc cache and end codegen
+ *cachetop += alignment + code_size;
+ m_cache.end_codegen();
+
+ return code_size;
+}
+
+void drcbe_arm64::reset()
+{
+ uint8_t *dst = (uint8_t *)m_cache.top();
+
+ CodeHolder ch;
+ ch.init(Environment::host(), uint64_t(dst));
+
+ FileLogger logger(m_log_asmjit);
+ if (logger.file())
+ {
+ logger.setFlags(FormatFlags::kHexOffsets | FormatFlags::kHexImms | FormatFlags::kMachineCode);
+ logger.setIndentation(FormatIndentationGroup::kCode, 4);
+ ch.setLogger(&logger);
+ }
+
+ a64::Assembler a(&ch);
+ if (logger.file())
+ a.addDiagnosticOptions(DiagnosticOptions::kValidateIntermediate);
+
+ // generate entry point
+ m_entry = (arm64_entry_point_func)dst;
+ a.bind(a.newNamedLabel("entry_point"));
+
+ FuncDetail entry_point;
+ entry_point.init(FuncSignature::build<uint32_t, uint8_t *, uint8_t *>(CallConvId::kHost), Environment::host());
+
+ FuncFrame frame;
+ frame.init(entry_point);
+ frame.setPreservedFP();
+ frame.setAllDirty();
+
+ FuncArgsAssignment args(&entry_point);
+ args.assignAll(REG_PARAM1);
+ args.updateFuncFrame(frame);
+
+ frame.finalize();
+
+ a.emitProlog(frame);
+
+ get_imm_absolute(a, BASE_REG, uintptr_t(m_baseptr));
+ emit_ldr_mem(a, FLAGS_REG.w(), &m_near.emulated_flags);
+
+ a.emitArgsAssignment(frame, args);
+
+ a.br(REG_PARAM1);
+
+ // generate exit point
+ m_exit = dst + a.offset();
+ a.bind(a.newNamedLabel("exit_point"));
+
+ a.mov(a64::sp, a64::x29);
+
+ a.emitEpilog(frame);
+ a.ret(a64::x30);
+
+ // generate a no code point
+ m_nocode = dst + a.offset();
+ a.bind(a.newNamedLabel("nocode_point"));
+ a.br(REG_PARAM1);
+
+ // generate an end-of-block handler point
+ m_endofblock = dst + a.offset();
+ a.bind(a.newNamedLabel("end_of_block_point"));
+ auto const [entrypoint, adjusted] = util::resolve_member_function(&drcbe_arm64::end_of_block, *this);
+ get_imm_relative(a, REG_PARAM1, adjusted);
+ call_arm_addr(a, (const void *)entrypoint);
+
+ // emit the generated code
+ emit(ch);
+
+ // reset our hash tables
+ m_hash.reset();
+ m_hash.set_default_codeptr(m_nocode);
+
+ m_carry_state = carry_state::POISON;
+}
+
+int drcbe_arm64::execute(code_handle &entry)
+{
+ m_cache.codegen_complete();
+ return (*m_entry)(entry.codeptr());
+}
+
+void drcbe_arm64::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
+{
+ // do this here because device.debug() isn't initialised at construction time
+ if (!m_debug_cpu_instruction_hook && (m_device.machine().debug_flags & DEBUG_FLAG_ENABLED))
+ {
+ m_debug_cpu_instruction_hook.set(*m_device.debug(), &device_debug::instruction_hook);
+ if (!m_debug_cpu_instruction_hook)
+ throw emu_fatalerror("Error resolving debugger instruction hook member function!\n");
+ }
+
+ // tell all of our utility objects that a block is beginning
+ m_hash.block_begin(block, instlist, numinst);
+ m_map.block_begin(block);
+ m_carry_state = carry_state::POISON;
+
+ // compute the base by aligning the cache top to a cache line
+ auto [err, linesize] = osd_get_cache_line_size();
+ uintptr_t linemask = 63;
+ if (err)
+ {
+ osd_printf_verbose("Error getting cache line size (%s:%d %s), assuming 64 bytes\n", err.category().name(), err.value(), err.message());
+ }
+ else
+ {
+ assert(linesize);
+ linemask = linesize - 1;
+ for (unsigned shift = 1; linemask & (linemask + 1); ++shift)
+ linemask |= linemask >> shift;
+ }
+ uint8_t *dst = (uint8_t *)(uint64_t(m_cache.top() + linemask) & ~linemask);
+
+ CodeHolder ch;
+ ch.init(Environment::host(), uint64_t(dst));
+ ThrowableErrorHandler e;
+ ch.setErrorHandler(&e);
+
+ FileLogger logger(m_log_asmjit);
+ if (logger.file())
+ {
+ logger.setFlags(FormatFlags::kHexOffsets | FormatFlags::kHexImms | FormatFlags::kMachineCode);
+ logger.setIndentation(FormatIndentationGroup::kCode, 4);
+ ch.setLogger(&logger);
+ }
+
+ a64::Assembler a(&ch);
+ if (logger.file())
+ a.addDiagnosticOptions(DiagnosticOptions::kValidateIntermediate);
+
+ // generate code
+ for (int inum = 0; inum < numinst; inum++)
+ {
+ const instruction &inst = instlist[inum];
+
+ // must remain in scope until output
+ std::string dasm;
+
+ // add a comment
+ if (logger.file())
+ {
+ dasm = inst.disasm(&m_drcuml);
+ a.setInlineComment(dasm.c_str());
+ }
+
+ // generate code
+ generate_one(a, inst);
+ }
+
+ // catch falling off the end of a block
+ if (logger.file())
+ a.setInlineComment("end of block");
+ a.b(m_endofblock);
+
+ // emit the generated code
+ if (!emit(ch))
+ block.abort();
+
+ // tell all of our utility objects that the block is finished
+ m_hash.block_end(block);
+ m_map.block_end(block);
+}
+
+bool drcbe_arm64::hash_exists(uint32_t mode, uint32_t pc) const noexcept
+{
+ return m_hash.code_exists(mode, pc);
+}
+
+void drcbe_arm64::get_info(drcbe_info &info) const noexcept
+{
+ for (info.direct_iregs = 0; info.direct_iregs < REG_I_COUNT; info.direct_iregs++)
+ {
+ if (int_register_map[info.direct_iregs] == 0)
+ break;
+ }
+
+ for (info.direct_fregs = 0; info.direct_fregs < REG_F_COUNT; info.direct_fregs++)
+ {
+ if (float_register_map[info.direct_fregs] == 0)
+ break;
+ }
+}
+
+
+[[noreturn]] void drcbe_arm64::end_of_block() const
+{
+ osd_printf_error("drcbe_arm64(%s): fell off the end of a generated code block!\n", m_device.tag());
+ std::fflush(stdout);
+ std::fflush(stderr);
+ std::abort();
+}
+
+
+void drcbe_arm64::op_handle(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 1);
+ assert(inst.param(0).is_code_handle());
+
+ m_carry_state = carry_state::POISON;
+
+ // make a label for documentation
+ Label handle = a.newNamedLabel(inst.param(0).handle().string());
+ a.bind(handle);
+
+ // emit a jump around the stack adjust in case code falls through here
+ Label skip = a.newLabel();
+ a.b(skip);
+
+ // register the current pointer for the handle
+ inst.param(0).handle().set_codeptr(drccodeptr(a.code()->baseAddress() + a.offset()));
+
+ // the handle points to prologue code that creates a minimal non-leaf frame
+ a.stp(a64::x29, a64::x30, a64::ptr_pre(a64::sp, -16));
+ a.bind(skip);
+}
+
+void drcbe_arm64::op_hash(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 2);
+ assert(inst.param(0).is_immediate());
+ assert(inst.param(1).is_immediate());
+
+ m_carry_state = carry_state::POISON;
+
+ const uint64_t mode = inst.param(0).immediate();
+ const uint64_t pc = inst.param(1).immediate();
+
+ m_hash.set_codeptr(mode, pc, drccodeptr(a.code()->baseAddress() + a.offset()));
+}
+
+void drcbe_arm64::op_label(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 1);
+ assert(inst.param(0).is_code_label());
+
+ m_carry_state = carry_state::POISON;
+
+ std::string labelName = util::string_format("PC$%x", inst.param(0).label());
+ Label label = a.labelByName(labelName.c_str());
+ if (!label.isValid())
+ label = a.newNamedLabel(labelName.c_str());
+
+ a.bind(label);
+}
+
+void drcbe_arm64::op_comment(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 1);
+ assert(inst.param(0).is_string());
+}
+
+void drcbe_arm64::op_mapvar(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 2);
+ assert(inst.param(0).is_mapvar());
+ assert(inst.param(1).is_immediate());
+
+ const int mapvar = inst.param(0).mapvar();
+ const uint64_t value = inst.param(1).immediate();
+
+ m_map.set_value(drccodeptr(a.code()->baseAddress() + a.offset()), mapvar, value);
+}
+
+void drcbe_arm64::op_nop(a64::Assembler &a, const uml::instruction &inst)
+{
+ // nothing
+ //a.nop();
+}
+
+void drcbe_arm64::op_break(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ static const char *const message = "break from drc";
+ get_imm_relative(a, REG_PARAM1, (uintptr_t)message);
+ call_arm_addr(a, (const void *)&osd_break_into_debugger);
+}
+
+void drcbe_arm64::op_debug(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ if (m_device.machine().debug_flags & DEBUG_FLAG_ENABLED)
+ {
+ m_carry_state = carry_state::POISON;
+
+ const a64::Gp temp = TEMP_REG1.w();
+
+ be_parameter pcp(*this, inst.param(0), PTYPE_MRI);
+
+ Label skip = a.newLabel();
+
+ emit_ldr_mem(a, temp, &m_device.machine().debug_flags);
+ a.tbz(temp, 1, skip); // DEBUG_FLAG_CALL_HOOK
+
+ get_imm_relative(a, REG_PARAM1, m_debug_cpu_instruction_hook.obj);
+ mov_reg_param(a, 4, REG_PARAM2, pcp);
+
+ call_arm_addr(a, m_debug_cpu_instruction_hook.func);
+
+ a.bind(skip);
+ }
+}
+
+void drcbe_arm64::op_exit(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter retp(*this, inst.param(0), PTYPE_MRI);
+
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ mov_reg_param(a, 4, REG_PARAM1, retp);
+ a.b(m_exit);
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+}
+
+void drcbe_arm64::op_hashjmp(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter modep(*this, inst.param(0), PTYPE_MRI);
+ be_parameter pcp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &exp = inst.param(2);
+ assert(exp.is_code_handle());
+
+ a.mov(a64::sp, a64::x29);
+
+ if (modep.is_immediate() && m_hash.is_mode_populated(modep.immediate()))
+ {
+ if (pcp.is_immediate())
+ {
+ const uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
+ const uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
+ emit_ldr_mem(a, TEMP_REG1, &m_hash.base()[modep.immediate()][l1val][l2val]);
+ }
+ else
+ {
+ mov_reg_param(a, 4, TEMP_REG2, pcp);
+
+ get_imm_relative(a, TEMP_REG1, (uintptr_t)&m_hash.base()[modep.immediate()][0]); // TEMP_REG1 = m_base[mode]
+
+ a.ubfx(TEMP_REG3, TEMP_REG2, m_hash.l1shift(), m_hash.l1bits());
+ a.ldr(TEMP_REG3, a64::Mem(TEMP_REG1, TEMP_REG3, arm::lsl(3))); // TEMP_REG3 = m_base[mode][(pc >> m_l1shift) & m_l1mask]
+
+ a.ubfx(TEMP_REG2, TEMP_REG2, m_hash.l2shift(), m_hash.l2bits());
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG3, TEMP_REG2, arm::lsl(3))); // TEMP_REG1 = m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]
+ }
+ }
+ else
+ {
+ get_imm_relative(a, TEMP_REG2, (uintptr_t)m_hash.base());
+
+ if (modep.is_immediate())
+ {
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG2, modep.immediate() * 8)); // TEMP_REG1 = m_base[modep]
+ }
+ else
+ {
+ const a64::Gp mode = modep.select_register(TEMP_REG1, 8);
+ mov_reg_param(a, 4, mode, modep);
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG2, mode, arm::lsl(3))); // TEMP_REG1 = m_base[modep]
+ }
+
+ if (pcp.is_immediate())
+ {
+ const uint32_t l1val = ((pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask()) * 8;
+ const uint32_t l2val = ((pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask()) * 8;
+
+ if (is_valid_immediate(l1val, 15))
+ {
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG1, l1val));
+ }
+ else
+ {
+ a.mov(SCRATCH_REG1, l1val >> 3);
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG1, SCRATCH_REG1, arm::lsl(3)));
+ }
+
+ if (is_valid_immediate(l2val, 15))
+ {
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG1, l2val));
+ }
+ else
+ {
+ a.mov(SCRATCH_REG1, l2val >> 3);
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG1, SCRATCH_REG1, arm::lsl(3)));
+ }
+ }
+ else
+ {
+ const a64::Gp pc = pcp.select_register(TEMP_REG2, 8);
+ mov_reg_param(a, 4, pc, pcp);
+
+ a.ubfx(TEMP_REG3, pc, m_hash.l1shift(), m_hash.l1bits()); // (pc >> m_l1shift) & m_l1mask
+ a.ldr(TEMP_REG3, a64::Mem(TEMP_REG1, TEMP_REG3, arm::lsl(3))); // TEMP_REG3 = m_base[mode][(pc >> m_l1shift) & m_l1mask]
+
+ a.ubfx(TEMP_REG2, pc, m_hash.l2shift(), m_hash.l2bits()); // (pc >> m_l2shift) & m_l2mask
+ a.ldr(TEMP_REG1, a64::Mem(TEMP_REG3, TEMP_REG2, arm::lsl(3))); // x25 = m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]
+ }
+ }
+
+ Label lab = a.newLabel();
+ a.adr(REG_PARAM1, lab);
+ a.br(TEMP_REG1);
+
+ a.bind(lab);
+
+ mov_mem_param(a, 4, &m_state.exp, pcp);
+
+ drccodeptr *const targetptr = exp.handle().codeptr_addr();
+ if (*targetptr != nullptr)
+ {
+ call_arm_addr(a, *targetptr);
+ }
+ else
+ {
+ emit_ldr_mem(a, SCRATCH_REG1, targetptr);
+ a.blr(SCRATCH_REG1);
+ }
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_jmp(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ const parameter &labelp = inst.param(0);
+ assert(labelp.is_code_label());
+
+ std::string labelName = util::string_format("PC$%x", labelp.label());
+ Label jmptarget = a.labelByName(labelName.c_str());
+ if (!jmptarget.isValid())
+ jmptarget = a.newNamedLabel(labelName.c_str());
+
+ if (inst.condition() == uml::COND_ALWAYS)
+ {
+ a.b(jmptarget);
+ return;
+ }
+
+ const bool bound = a.code()->isLabelBound(jmptarget);
+ const uint64_t targetoffs = a.code()->baseAddress() + a.code()->labelOffset(jmptarget);
+ const uint64_t codeoffs = a.code()->baseAddress() + a.offset();
+ const bool tbnzrange = bound && is_valid_immediate_signed(int64_t(targetoffs) - codeoffs, 14 + 2);
+
+ switch (inst.condition())
+ {
+ case uml::COND_U:
+ case uml::COND_NU:
+ if (tbnzrange)
+ {
+ const a64::Inst::Id opcode = (inst.condition() == uml::COND_U) ? a64::Inst::kIdTbnz : a64::Inst::kIdTbz;
+ a.emit(opcode, FLAGS_REG, FLAG_BIT_U, jmptarget);
+ }
+ else
+ {
+ const a64::Inst::Id opcode = (inst.condition() == uml::COND_U) ? a64::Inst::kIdCbnz : a64::Inst::kIdCbz;
+ get_unordered(a, SCRATCH_REG1);
+ a.emit(opcode, SCRATCH_REG1, jmptarget);
+ }
+ break;
+ case uml::COND_C:
+ case uml::COND_NC:
+ switch (m_carry_state)
+ {
+ case carry_state::CANONICAL:
+ a.b(ARM_NOT_CONDITION(inst.condition()), jmptarget);
+ break;
+ case carry_state::LOGICAL:
+ a.b(ARM_CONDITION(inst.condition()), jmptarget);
+ break;
+ default:
+ if (tbnzrange)
+ {
+ const a64::Inst::Id opcode = (inst.condition() == uml::COND_C) ? a64::Inst::kIdTbnz : a64::Inst::kIdTbz;
+ a.emit(opcode, FLAGS_REG, FLAG_BIT_C, jmptarget);
+ }
+ else
+ {
+ const a64::Inst::Id opcode = (inst.condition() == uml::COND_C) ? a64::Inst::kIdCbnz : a64::Inst::kIdCbz;
+ get_carry(a, SCRATCH_REG1);
+ a.emit(opcode, SCRATCH_REG1, jmptarget);
+ }
+ }
+ break;
+ case uml::COND_A:
+ case uml::COND_BE:
+ load_carry(a, true);
+ [[fallthrough]];
+ default:
+ a.b(ARM_CONDITION(inst.condition()), jmptarget);
+ }
+}
+
+void drcbe_arm64::op_exh(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ const parameter &handp = inst.param(0);
+ assert(handp.is_code_handle());
+ be_parameter exp(*this, inst.param(1), PTYPE_MRI);
+
+ // perform the exception processing
+ Label no_exception;
+ emit_skip(a, inst.condition(), no_exception);
+
+ mov_mem_param(a, 4, &m_state.exp, exp);
+
+ drccodeptr *const targetptr = handp.handle().codeptr_addr();
+ if (*targetptr != nullptr)
+ {
+ call_arm_addr(a, *targetptr);
+ }
+ else
+ {
+ emit_ldr_mem(a, SCRATCH_REG1, targetptr);
+ a.blr(SCRATCH_REG1);
+ }
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(no_exception);
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_callh(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ const parameter &handp = inst.param(0);
+ assert(handp.is_code_handle());
+
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ drccodeptr *const targetptr = handp.handle().codeptr_addr();
+ if (*targetptr != nullptr)
+ {
+ call_arm_addr(a, *targetptr);
+ }
+ else
+ {
+ emit_ldr_mem(a, SCRATCH_REG1, targetptr);
+ a.blr(SCRATCH_REG1);
+ }
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_ret(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+ assert(inst.numparams() == 0);
+
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ a.ldp(a64::x29, a64::x30, a64::ptr_post(a64::sp, 16));
+ a.ret(a64::x30);
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+}
+
+void drcbe_arm64::op_callc(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ const parameter &funcp = inst.param(0);
+ assert(funcp.is_c_function());
+ be_parameter paramp(*this, inst.param(1), PTYPE_M);
+
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ emit_str_mem(a, FLAGS_REG.w(), &m_near.emulated_flags);
+
+ get_imm_relative(a, REG_PARAM1, (uintptr_t)paramp.memory());
+ get_imm_relative(a, TEMP_REG1, (uintptr_t)funcp.cfunc());
+ a.blr(TEMP_REG1);
+
+ emit_ldr_mem(a, FLAGS_REG.w(), &m_near.emulated_flags);
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_recover(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+
+ a.ldr(REG_PARAM2, arm::Mem(a64::x29, -8)); // saved LR (x30) from first level CALLH/EXH or failed hash jump
+ get_imm_relative(a, REG_PARAM1, m_drcmap_get_value.obj);
+ a.mov(REG_PARAM3, inst.param(1).mapvar());
+ a.sub(REG_PARAM2, REG_PARAM2, 4);
+
+ call_arm_addr(a, m_drcmap_get_value.func);
+
+ mov_param_reg(a, inst.size(), dstp, REG_PARAM1);
+}
+
+void drcbe_arm64::op_setfmod(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter srcp(*this, inst.param(0), PTYPE_MRI);
+ const a64::Gp scratch = select_register(FUNC_SCRATCH_REG, inst.size());
+
+ if (srcp.is_immediate())
+ {
+ a.mov(scratch, srcp.immediate() & 3);
+ }
+ else
+ {
+ const a64::Gp src = srcp.select_register(FUNC_SCRATCH_REG, inst.size());
+
+ mov_reg_param(a, inst.size(), src, srcp);
+ a.and_(scratch, src, 3);
+ }
+
+ emit_strb_mem(a, scratch.w(), &m_state.fmod);
+}
+
+void drcbe_arm64::op_getfmod(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size());
+
+ emit_ldrb_mem(a, dst.w(), &m_state.fmod);
+ mov_param_reg(a, inst.size(), dstp, dst);
+}
+
+void drcbe_arm64::op_getexp(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size());
+
+ emit_ldr_mem(a, dst.w(), &m_state.exp);
+ mov_param_reg(a, inst.size(), dstp, dst);
+}
+
+void drcbe_arm64::op_getflgs(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter maskp(*this, inst.param(1), PTYPE_I);
+ assert(maskp.is_immediate());
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, 8);
+
+ bool first = true;
+
+ if (maskp.immediate() & FLAG_C)
+ {
+ a.and_(dst, FLAGS_REG, FLAG_C);
+ first = false;
+ }
+
+ if (maskp.immediate() & FLAG_V)
+ {
+ if (first)
+ {
+ a.cset(dst, a64::CondCode::kVS);
+ a.lsl(dst, dst, FLAG_BIT_V);
+ first = false;
+ }
+ else
+ {
+ a.cset(SCRATCH_REG1, a64::CondCode::kVS);
+ a.orr(dst, dst, SCRATCH_REG1, FLAG_BIT_V);
+ }
+ }
+
+ if (maskp.immediate() & FLAG_Z)
+ {
+ if (first)
+ {
+ a.cset(dst, a64::CondCode::kEQ);
+ a.lsl(dst, dst, FLAG_BIT_Z);
+ first = false;
+ }
+ else
+ {
+ a.cset(SCRATCH_REG1, a64::CondCode::kEQ);
+ a.orr(dst, dst, SCRATCH_REG1, FLAG_BIT_Z);
+ }
+ }
+
+ if (maskp.immediate() & FLAG_S)
+ {
+ if (first)
+ {
+ a.cset(dst, a64::CondCode::kMI);
+ a.lsl(dst, dst, FLAG_BIT_S);
+ first = false;
+ }
+ else
+ {
+ a.cset(SCRATCH_REG1, a64::CondCode::kMI);
+ a.orr(dst, dst, SCRATCH_REG1, FLAG_BIT_S);
+ }
+ }
+
+ if (maskp.immediate() & FLAG_U)
+ {
+ if (first)
+ {
+ a.and_(dst, FLAGS_REG, FLAG_U);
+ first = false;
+ }
+ else
+ {
+ a.and_(SCRATCH_REG1, FLAGS_REG, FLAG_U);
+ a.orr(dst, dst, SCRATCH_REG1);
+ }
+ }
+
+ if (first)
+ a.mov(dst, a64::xzr);
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+}
+
+void drcbe_arm64::op_setflgs(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+
+ be_parameter flagsp(*this, inst.param(0), PTYPE_MRI);
+
+ mov_reg_param(a, inst.size(), FLAGS_REG, flagsp);
+ set_flags(a);
+}
+
+void drcbe_arm64::op_save(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_M);
+
+ const a64::Gp membase = SCRATCH_REG1;
+
+ get_imm_relative(a, membase, (uintptr_t)dstp.memory());
+
+ // Calculate flags to be stored
+ a.mrs(TEMP_REG1, a64::Predicate::SysReg::kNZCV);
+ a.lsr(TEMP_REG1, TEMP_REG1, 28);
+
+ a.and_(TEMP_REG2, TEMP_REG1, 0b1100); // zero + sign
+ a.orr(TEMP_REG2, TEMP_REG2, FLAGS_REG); // carry + unordered flags
+
+ a.bfi(TEMP_REG2, TEMP_REG1, FLAG_BIT_V, 1); // overflow flag
+
+ a.strb(TEMP_REG2.w(), arm::Mem(membase, offsetof(drcuml_machine_state, flags)));
+
+ emit_ldrb_mem(a, TEMP_REG1.w(), &m_state.fmod);
+ a.strb(TEMP_REG1.w(), arm::Mem(membase, offsetof(drcuml_machine_state, fmod)));
+
+ emit_ldr_mem(a, TEMP_REG1.w(), &m_state.exp);
+ a.str(TEMP_REG1.w(), arm::Mem(membase, offsetof(drcuml_machine_state, exp)));
+
+ int regoffs = offsetof(drcuml_machine_state, r);
+ for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
+ {
+ if (int_register_map[regnum] != 0)
+ {
+ a.str(a64::Gp::fromTypeAndId(RegType::kARM_GpX, int_register_map[regnum]), arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ else
+ {
+ emit_ldr_mem(a, TEMP_REG1, &m_state.r[regnum].d);
+ a.str(TEMP_REG1, arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ }
+
+ regoffs = offsetof(drcuml_machine_state, f);
+ for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
+ {
+ if (float_register_map[regnum] != 0)
+ {
+ a.str(a64::Vec::fromTypeAndId(RegType::kARM_VecD, float_register_map[regnum]), arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ else
+ {
+ emit_ldr_mem(a, TEMP_REG1, &m_state.f[regnum].d);
+ a.str(TEMP_REG1, arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ }
+}
+
+void drcbe_arm64::op_restore(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+
+ be_parameter srcp(*this, inst.param(0), PTYPE_M);
+
+ const a64::Gp membase = SCRATCH_REG1;
+
+ get_imm_relative(a, membase, (uintptr_t)srcp.memory());
+
+ int regoffs = offsetof(drcuml_machine_state, r);
+ for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
+ {
+ if (int_register_map[regnum] != 0)
+ {
+ a.ldr(a64::Gp::fromTypeAndId(RegType::kARM_GpX, int_register_map[regnum]), arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ else
+ {
+ a.ldr(TEMP_REG1, arm::Mem(membase, regoffs + (8 * regnum)));
+ emit_str_mem(a, TEMP_REG1, &m_state.r[regnum].d);
+ }
+ }
+
+ regoffs = offsetof(drcuml_machine_state, f);
+ for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
+ {
+ if (float_register_map[regnum] != 0)
+ {
+ a.ldr(a64::Vec::fromTypeAndId(RegType::kARM_VecD, float_register_map[regnum]), arm::Mem(membase, regoffs + (8 * regnum)));
+ }
+ else
+ {
+ a.ldr(TEMP_REG1, arm::Mem(membase, regoffs + (8 * regnum)));
+ emit_str_mem(a, TEMP_REG1, &m_state.f[regnum].d);
+ }
+ }
+
+ a.ldrb(TEMP_REG1.w(), arm::Mem(membase, offsetof(drcuml_machine_state, fmod)));
+ emit_strb_mem(a, TEMP_REG1.w(), &m_state.fmod);
+
+ a.ldr(TEMP_REG1.w(), arm::Mem(membase, offsetof(drcuml_machine_state, exp)));
+ emit_str_mem(a, TEMP_REG1.w(), &m_state.exp);
+
+ a.ldrb(FLAGS_REG.w(), arm::Mem(membase, offsetof(drcuml_machine_state, flags)));
+ set_flags(a);
+}
+
+void drcbe_arm64::op_load(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter basep(*this, inst.param(1), PTYPE_M);
+ be_parameter indp(*this, inst.param(2), PTYPE_MRI);
+ const parameter &scalesizep = inst.param(3);
+ assert(scalesizep.is_size_scale());
+ const int size = scalesizep.size();
+
+ const a64::Gp dstreg = dstp.select_register(TEMP_REG2, inst.size());
+
+ if (indp.is_immediate())
+ {
+ const ptrdiff_t offset = ptrdiff_t(int32_t(uint32_t(indp.immediate()))) << scalesizep.scale();
+ const auto memptr = reinterpret_cast<uint8_t *>(basep.memory()) + offset;
+
+ // immediate index
+ if (size == SIZE_BYTE)
+ emit_ldrb_mem(a, dstreg.w(), memptr);
+ else if (size == SIZE_WORD)
+ emit_ldrh_mem(a, dstreg.w(), memptr);
+ else if (size == SIZE_DWORD)
+ emit_ldr_mem(a, dstreg.w(), memptr);
+ else
+ emit_ldr_mem(a, dstreg.x(), memptr);
+ }
+ else
+ {
+ const a64::Gp basereg = TEMP_REG1;
+
+ get_imm_relative(a, basereg, uint64_t(basep.memory()));
+ const auto mem = emit_loadstore_address_setup(a, basereg, indp, scalesizep);
+
+ if (size == SIZE_BYTE)
+ a.ldrb(dstreg.w(), mem);
+ else if (size == SIZE_WORD)
+ a.ldrh(dstreg.w(), mem);
+ else if (size == SIZE_DWORD)
+ a.ldr(dstreg.w(), mem);
+ else
+ a.ldr(dstreg, mem);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_loads(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter basep(*this, inst.param(1), PTYPE_M);
+ be_parameter indp(*this, inst.param(2), PTYPE_MRI);
+ const parameter &scalesizep = inst.param(3);
+ assert(scalesizep.is_size_scale());
+ const int size = scalesizep.size();
+
+ const a64::Gp dstreg = dstp.select_register(TEMP_REG2, inst.size());
+
+ if (indp.is_immediate())
+ {
+ const ptrdiff_t offset = ptrdiff_t(int32_t(uint32_t(indp.immediate()))) << scalesizep.scale();
+ const auto memptr = reinterpret_cast<uint8_t *>(basep.memory()) + offset;
+
+ // immediate index
+ if (size == SIZE_BYTE)
+ emit_ldrsb_mem(a, dstreg.x(), memptr);
+ else if (size == SIZE_WORD)
+ emit_ldrsh_mem(a, dstreg.x(), memptr);
+ else if (size == SIZE_DWORD)
+ emit_ldrsw_mem(a, dstreg.x(), memptr);
+ else
+ emit_ldr_mem(a, dstreg.x(), memptr);
+ }
+ else
+ {
+ const a64::Gp basereg = TEMP_REG1;
+
+ get_imm_relative(a, basereg, uint64_t(basep.memory()));
+ const auto mem = emit_loadstore_address_setup(a, basereg, indp, scalesizep);
+
+ if (size == SIZE_BYTE)
+ a.ldrsb(dstreg, mem);
+ else if (size == SIZE_WORD)
+ a.ldrsh(dstreg, mem);
+ else if (size == SIZE_DWORD && inst.size() == 8)
+ a.ldrsw(dstreg, mem);
+ else
+ a.ldr(dstreg, mem);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_store(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter basep(*this, inst.param(0), PTYPE_M);
+ be_parameter indp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(2), PTYPE_MRI);
+ const parameter &scalesizep = inst.param(3);
+ const int size = scalesizep.size();
+
+ if (indp.is_immediate())
+ {
+ const a64::Gp srcreg = srcp.select_register(TEMP_REG2, inst.size());
+ const ptrdiff_t offset = ptrdiff_t(int32_t(uint32_t(indp.immediate()))) << scalesizep.scale();
+ const auto memptr = reinterpret_cast<uint8_t *>(basep.memory()) + offset;
+
+ mov_reg_param(a, inst.size(), srcreg, srcp);
+
+ if (size == SIZE_BYTE)
+ emit_strb_mem(a, srcreg.w(), memptr);
+ else if (size == SIZE_WORD)
+ emit_strh_mem(a, srcreg.w(), memptr);
+ else if (size == SIZE_DWORD)
+ emit_str_mem(a, srcreg.w(), memptr);
+ else
+ emit_str_mem(a, srcreg.x(), memptr);
+ }
+ else
+ {
+ const a64::Gp basereg = TEMP_REG1;
+ const a64::Gp srcreg = srcp.select_register(TEMP_REG2, inst.size());
+
+ get_imm_relative(a, basereg, uint64_t(basep.memory()));
+ mov_reg_param(a, inst.size(), srcreg, srcp);
+ const auto mem = emit_loadstore_address_setup(a, basereg, indp, scalesizep);
+
+ if (size == SIZE_BYTE)
+ a.strb(srcreg.w(), mem);
+ else if (size == SIZE_WORD)
+ a.strh(srcreg.w(), mem);
+ else if (size == SIZE_DWORD)
+ a.str(srcreg.w(), mem);
+ else
+ a.str(srcreg, mem);
+ }
+}
+
+void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter addrp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &spacesizep = inst.param(2);
+ assert(spacesizep.is_size_space());
+
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual;
+
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ emit_memaccess_setup(a, addrp, accessors, accessors.specific.read);
+ if (accessors.specific.read.is_virtual)
+ {
+ a.ldr(a64::x8, a64::Mem(REG_PARAM1));
+ a.ldr(a64::x8, a64::Mem(a64::x8, accessors.specific.read.function)); // assume no more than 4096 vtable entries
+ }
+ a.mov(REG_PARAM3, make_bitmask<uint64_t>(accessors.specific.native_bytes << 3));
+ if (accessors.specific.read.is_virtual)
+ a.blr(a64::x8);
+ else
+ call_arm_addr(a, (const void *)accessors.specific.read.function);
+ }
+ else
+ {
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_byte.obj);
+ call_arm_addr(a, accessors.resolved.read_byte.func);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_word.obj);
+ call_arm_addr(a, accessors.resolved.read_word.func);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_dword.obj);
+ call_arm_addr(a, accessors.resolved.read_dword.func);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_qword.obj);
+ call_arm_addr(a, accessors.resolved.read_qword.func);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, REG_PARAM1);
+}
+
+void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter addrp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter maskp(*this, inst.param(2), PTYPE_MRI);
+ const parameter &spacesizep = inst.param(3);
+ assert(spacesizep.is_size_space());
+
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual;
+
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ emit_memaccess_setup(a, addrp, accessors, accessors.specific.read);
+ mov_reg_param(a, inst.size(), REG_PARAM3, maskp);
+ if (accessors.specific.read.is_virtual)
+ {
+ a.ldr(a64::x8, a64::Mem(REG_PARAM1));
+ a.ldr(a64::x8, a64::Mem(a64::x8, accessors.specific.read.function)); // assume no more than 4096 vtable entries
+ a.blr(a64::x8);
+ }
+ else
+ {
+ call_arm_addr(a, (const void *)accessors.specific.read.function);
+ }
+ }
+ else
+ {
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+ mov_reg_param(a, inst.size(), REG_PARAM3, maskp);
+
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_byte_masked.obj);
+ call_arm_addr(a, accessors.resolved.read_byte_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_word_masked.obj);
+ call_arm_addr(a, accessors.resolved.read_word_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_dword_masked.obj);
+ call_arm_addr(a, accessors.resolved.read_dword_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_qword_masked.obj);
+ call_arm_addr(a, accessors.resolved.read_qword_masked.func);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, REG_PARAM1);
+}
+
+void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter addrp(*this, inst.param(0), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &spacesizep = inst.param(2);
+ assert(spacesizep.is_size_space());
+
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual;
+
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ emit_memaccess_setup(a, addrp, accessors, accessors.specific.write);
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+ if (accessors.specific.write.is_virtual)
+ {
+ a.ldr(a64::x8, a64::Mem(REG_PARAM1));
+ a.ldr(a64::x8, a64::Mem(a64::x8, accessors.specific.write.function)); // assume no more than 4096 vtable entries
+ }
+ a.mov(REG_PARAM4, make_bitmask<uint64_t>(accessors.specific.native_bytes << 3));
+ if (accessors.specific.write.is_virtual)
+ a.blr(a64::x8);
+ else
+ call_arm_addr(a, (const void *)accessors.specific.write.function);
+ }
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
+ {
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+ a.mov(REG_PARAM4, make_bitmask<uint64_t>(8 << spacesizep.size()));
+ emit_narrow_memwrite(a, addrp, spacesizep, accessors);
+ }
+ else
+ {
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_byte.obj);
+ call_arm_addr(a, accessors.resolved.write_byte.func);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_word.obj);
+ call_arm_addr(a, accessors.resolved.write_word.func);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_dword.obj);
+ call_arm_addr(a, accessors.resolved.write_dword.func);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_qword.obj);
+ call_arm_addr(a, accessors.resolved.write_qword.func);
+ }
+ }
+}
+
+void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter addrp(*this, inst.param(0), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter maskp(*this, inst.param(2), PTYPE_MRI);
+ const parameter &spacesizep = inst.param(3);
+ assert(spacesizep.is_size_space());
+
+ // set up a call to the write handler
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual;
+
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ emit_memaccess_setup(a, addrp, accessors, accessors.specific.write);
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+ if (accessors.specific.write.is_virtual)
+ {
+ a.ldr(a64::x8, a64::Mem(REG_PARAM1));
+ a.ldr(a64::x8, a64::Mem(a64::x8, accessors.specific.write.function)); // assume no more than 4096 vtable entries
+ }
+ mov_reg_param(a, inst.size(), REG_PARAM4, maskp);
+ if (accessors.specific.write.is_virtual)
+ a.blr(a64::x8);
+ else
+ call_arm_addr(a, (const void *)accessors.specific.write.function);
+ }
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
+ {
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+ mov_reg_param(a, inst.size(), REG_PARAM4, maskp);
+ emit_narrow_memwrite(a, addrp, spacesizep, accessors);
+ }
+ else
+ {
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+ mov_reg_param(a, inst.size(), REG_PARAM3, srcp);
+ mov_reg_param(a, inst.size(), REG_PARAM4, maskp);
+
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_byte_masked.obj);
+ call_arm_addr(a, accessors.resolved.write_byte_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_word_masked.obj);
+ call_arm_addr(a, accessors.resolved.write_word_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_dword_masked.obj);
+ call_arm_addr(a, accessors.resolved.write_dword_masked.func);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_qword_masked.obj);
+ call_arm_addr(a, accessors.resolved.write_qword_masked.func);
+ }
+ }
+}
+
+void drcbe_arm64::op_carry(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter srcp(*this, inst.param(0), PTYPE_MRI);
+ be_parameter bitp(*this, inst.param(1), PTYPE_MRI);
+
+ const a64::Gp src = srcp.select_register(TEMP_REG1, inst.size());
+ const a64::Gp scratch = select_register(TEMP_REG1, inst.size());
+
+ // load non-immediate bit numbers into a register
+ // flags = (flags & ~FLAG_C) | ((src >> (PARAM1 & 31)) & FLAG_C)
+
+ if (srcp.is_immediate() && bitp.is_immediate())
+ {
+ if (BIT(srcp.immediate(), bitp.immediate()))
+ a.orr(FLAGS_REG, FLAGS_REG, FLAG_C);
+ else
+ a.and_(FLAGS_REG, FLAGS_REG, ~FLAG_C);
+ }
+ else if (bitp.is_immediate())
+ {
+ const auto shift = bitp.immediate() % (inst.size() * 8);
+
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ // move carry bit to lsb
+ if (shift != 0)
+ {
+ a.lsr(scratch, src, shift);
+ store_carry_reg(a, scratch);
+ }
+ else
+ {
+ store_carry_reg(a, src);
+ }
+ }
+ else
+ {
+ const a64::Gp bitreg = bitp.select_register(TEMP_REG2, inst.size());
+ const a64::Gp shift = select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), bitreg, bitp);
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ a.and_(shift, bitreg, (inst.size() * 8) - 1);
+
+ // move carry bit to lsb
+ a.lsr(scratch, src, shift);
+ store_carry_reg(a, scratch);
+ }
+}
+
+void drcbe_arm64::op_set(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+
+ if (inst.condition() == uml::COND_ALWAYS)
+ {
+ mov_param_imm(a, inst.size(), dstp, 1);
+ return;
+ }
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size());
+
+ switch (inst.condition())
+ {
+ case uml::COND_U:
+ case uml::COND_NU:
+ get_unordered(a, dst);
+ if (inst.condition() == uml::COND_NU)
+ a.eor(dst, dst, 1);
+ break;
+ case uml::COND_C:
+ case uml::COND_NC:
+ switch (m_carry_state)
+ {
+ case carry_state::CANONICAL:
+ a.cset(dst, ARM_NOT_CONDITION(inst.condition()));
+ break;
+ case carry_state::LOGICAL:
+ a.cset(dst, ARM_CONDITION(inst.condition()));
+ break;
+ default:
+ get_carry(a, dst);
+ if (inst.condition() == uml::COND_NC)
+ a.eor(dst, dst, 1);
+ }
+ break;
+ case uml::COND_A:
+ case uml::COND_BE:
+ load_carry(a, true);
+ [[fallthrough]];
+ default:
+ a.cset(dst, ARM_CONDITION(inst.condition()));
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+}
+
+void drcbe_arm64::op_mov(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+
+ // decide whether a conditional select will be efficient
+ bool usesel = dstp.is_int_register() && (((inst.size() == 8) && srcp.is_int_register()) || (srcp.is_immediate() && is_simple_mov_immediate(srcp.immediate(), inst.size())));
+ switch (inst.condition())
+ {
+ case uml::COND_ALWAYS:
+ case uml::COND_U:
+ case uml::COND_NU:
+ usesel = false;
+ break;
+ case uml::COND_C:
+ case uml::COND_NC:
+ switch (m_carry_state)
+ {
+ case carry_state::CANONICAL:
+ case carry_state::LOGICAL:
+ break;
+ default:
+ usesel = false;
+ }
+ break;
+ default:
+ break;
+ }
+
+ if (usesel)
+ {
+ const bool srczero = srcp.is_immediate_value(0);
+ const bool srcone = srcp.is_immediate_value(1);
+ const bool srcnegone = (inst.size() == 8) && srcp.is_immediate_value(uint64_t(int64_t(-1)));
+ const bool srcspecial = srczero || srcone || srcnegone;
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, 8);
+ const a64::Gp src = srcspecial ? a64::Gp(a64::xzr) : srcp.select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), dst, dstp);
+ if (!srcspecial)
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ switch (inst.condition())
+ {
+ case uml::COND_C:
+ case uml::COND_NC:
+ if (m_carry_state == carry_state::CANONICAL)
+ {
+ if (srcone)
+ a.csinc(dst, dst, src.x(), ARM_CONDITION(inst.condition()));
+ else if (srcnegone)
+ a.csinv(dst, dst, src.x(), ARM_CONDITION(inst.condition()));
+ else
+ a.csel(dst, src.x(), dst, ARM_NOT_CONDITION(inst.condition()));
+ }
+ else
+ {
+ if (srcone)
+ a.csinc(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
+ else if (srcnegone)
+ a.csinv(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
+ else
+ a.csel(dst, src.x(), dst, ARM_CONDITION(inst.condition()));
+ }
+ break;
+ case uml::COND_A:
+ case uml::COND_BE:
+ load_carry(a, true);
+ [[fallthrough]];
+ default:
+ if (srcone)
+ a.csinc(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
+ else if (srcnegone)
+ a.csinv(dst, dst, src.x(), ARM_NOT_CONDITION(inst.condition()));
+ else
+ a.csel(dst, src.x(), dst, ARM_CONDITION(inst.condition()));
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+ }
+ else
+ {
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ mov_param_param(a, inst.size(), dstp, srcp);
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+ }
+}
+
+void drcbe_arm64::op_sext(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_S | FLAG_Z);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &sizep = inst.param(2);
+ assert(sizep.is_size());
+ const auto size = sizep.size();
+
+ const a64::Gp dstreg = dstp.select_register(TEMP_REG2, inst.size());
+
+ if ((1 << size) >= inst.size())
+ {
+ mov_param_param(a, inst.size(), dstp, srcp);
+ }
+ else
+ {
+ if (srcp.is_memory())
+ {
+ // FIXME: need to mangle addresses for big Endian hosts
+ if (size == SIZE_BYTE)
+ emit_ldrsb_mem(a, dstreg.x(), srcp.memory());
+ else if (size == SIZE_WORD)
+ emit_ldrsh_mem(a, dstreg.x(), srcp.memory());
+ else if (size == SIZE_DWORD)
+ emit_ldrsw_mem(a, dstreg.x(), srcp.memory());
+ else if (size == SIZE_QWORD)
+ emit_ldr_mem(a, dstreg.x(), srcp.memory());
+ }
+ else
+ {
+ const a64::Gp tempreg = srcp.select_register(dstreg, 8);
+ mov_reg_param(a, inst.size(), tempreg, srcp);
+
+ if (size == SIZE_BYTE)
+ a.sxtb(dstreg.x(), tempreg.w());
+ else if (size == SIZE_WORD)
+ a.sxth(dstreg.x(), tempreg.w());
+ else if (size == SIZE_DWORD)
+ a.sxtw(dstreg.x(), tempreg.w());
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dstreg);
+ }
+
+ if (inst.flags())
+ {
+ a.tst(dstreg, dstreg);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_roland(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_S | FLAG_Z);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter shiftp(*this, inst.param(2), PTYPE_MRI);
+ be_parameter maskp(*this, inst.param(3), PTYPE_MRI);
+
+ const a64::Gp output = dstp.select_register(TEMP_REG1, inst.size());
+ const uint64_t instbits = inst.size() * 8;
+
+ bool optimized = false;
+ if (maskp.is_immediate() && shiftp.is_immediate() && !maskp.is_immediate_value(util::make_bitmask<uint64_t>(instbits)))
+ {
+ // A mask of all 1s will be handled efficiently in the unoptimized path, so only optimize for the other cases if possible
+ const auto pop = population_count_64(maskp.immediate());
+ const auto lz = count_leading_zeros_64(maskp.immediate()) & (instbits - 1);
+ const auto invlamask = ~(maskp.immediate() << lz) & util::make_bitmask<uint64_t>(instbits);
+ const bool is_right_aligned = (maskp.immediate() & (maskp.immediate() + 1)) == 0;
+ const bool is_contiguous = (invlamask & (invlamask + 1)) == 0;
+ const auto s = shiftp.immediate() & (instbits - 1);
+
+ if (is_right_aligned || is_contiguous)
+ {
+ mov_reg_param(a, inst.size(), output, srcp);
+ optimized = true;
+ }
+
+ if (is_right_aligned)
+ {
+ // Optimize a contiguous right-aligned mask
+ const auto s2 = (instbits - s) & (instbits - 1);
+
+ if (s >= pop)
+ {
+ a.ubfx(output, output, s2, pop);
+ }
+ else
+ {
+ if (s2 > 0)
+ a.ror(output, output, s2);
+
+ a.bfc(output, pop, instbits - pop);
+ }
+ }
+ else if (is_contiguous)
+ {
+ // Optimize a contiguous mask
+ auto const rot = -int(s + pop + lz) & (instbits - 1);
+
+ if (rot > 0)
+ a.ror(output, output, rot);
+
+ a.ubfiz(output, output, instbits - pop - lz, pop);
+ }
+ }
+
+ if (!optimized)
+ {
+ const a64::Gp shift = shiftp.select_register(TEMP_REG2, inst.size());
+ const a64::Gp rshift = select_register(TEMP_REG2, inst.size());
+ const a64::Gp mask = (dstp != maskp) ? maskp.select_register(SCRATCH_REG1, inst.size()) : select_register(SCRATCH_REG1, inst.size());
+
+ if (!shiftp.is_immediate())
+ {
+ // do this first as dst and shift could be the same register
+ mov_reg_param(a, inst.size(), shift, shiftp);
+
+ a.neg(rshift, shift);
+ }
+
+ // mask and dst could also be the same register so do this before rotating dst
+ if (!maskp.is_immediate() || !is_valid_immediate_mask(maskp.immediate(), inst.size()))
+ mov_reg_param(a, inst.size(), mask, maskp);
+
+ mov_reg_param(a, inst.size(), output, srcp);
+
+ if (shiftp.is_immediate())
+ {
+ const auto s = -int64_t(shiftp.immediate()) & (instbits - 1);
+ if (s != 0)
+ a.ror(output, output, s);
+ }
+ else
+ {
+ a.and_(rshift, rshift, (inst.size() * 8) - 1);
+ a.ror(output, output, rshift);
+ }
+
+ const a64::Inst::Id maskop = inst.flags() ? a64::Inst::kIdAnds : a64::Inst::kIdAnd;
+ if (maskp.is_immediate() && is_valid_immediate_mask(maskp.immediate(), inst.size()))
+ a.emit(maskop, output, output, maskp.immediate());
+ else
+ a.emit(maskop, output, output, mask);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, output);
+
+ if (inst.flags())
+ {
+ if (optimized)
+ a.tst(output, output);
+
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_rolins(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_S | FLAG_Z);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter shiftp(*this, inst.param(2), PTYPE_MRI);
+ be_parameter maskp(*this, inst.param(3), PTYPE_MRI);
+ const uint64_t instbits = inst.size() * 8;
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG2, inst.size());
+ const a64::Gp src = srcp.select_register(TEMP_REG1, inst.size());
+ const a64::Gp scratch = select_register(TEMP_REG1, inst.size());
+
+ bool optimized = false;
+ if (maskp.is_immediate() && shiftp.is_immediate())
+ {
+ const auto pop = population_count_64(maskp.immediate());
+ const auto lz = count_leading_zeros_64(maskp.immediate()) & (instbits - 1);
+ const auto invlamask = ~(maskp.immediate() << lz) & util::make_bitmask<uint64_t>(instbits);
+ const bool is_right_aligned = (maskp.immediate() & (maskp.immediate() + 1)) == 0;
+ const bool is_contiguous = (invlamask & (invlamask + 1)) == 0;
+ const auto s = shiftp.immediate() & (instbits - 1);
+
+ if (is_right_aligned || is_contiguous)
+ {
+ mov_reg_param(a, inst.size(), dst, dstp);
+
+ uint32_t rot = 0;
+ uint32_t lsb = 0;
+ if (is_right_aligned)
+ {
+ // Optimize a contiguous right-aligned mask
+ rot = (instbits - s) & (instbits - 1);
+ }
+ else if (is_contiguous)
+ {
+ // Optimize a contiguous mask
+ rot = -int32_t(s + pop + lz) & (instbits - 1);
+ lsb = instbits - pop - lz;
+ }
+
+ if (srcp.is_immediate() && (rot > 0))
+ {
+ // save some instructions by avoid mov to register by computing the ror and storing it into scratch directly
+ uint64_t result;
+ if (inst.size() == 4)
+ result = rotr_32(srcp.immediate(), rot);
+ else
+ result = rotr_64(srcp.immediate(), rot);
+
+ a.mov(scratch, result);
+ }
+ else if (rot > 0)
+ {
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ a.ror(scratch, src, rot);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), scratch, srcp);
+ }
+
+ a.bfi(dst, scratch, lsb, pop);
+
+ optimized = true;
+ }
+ else if (srcp.is_immediate())
+ {
+ // val1 = src & ~PARAM3
+ if (is_valid_immediate_mask(~maskp.immediate() & util::make_bitmask<uint64_t>(instbits), inst.size()))
+ {
+ a.and_(dst, dst, ~maskp.immediate() & util::make_bitmask<uint64_t>(instbits));
+ }
+ else
+ {
+ get_imm_relative(a, scratch, ~maskp.immediate() & util::make_bitmask<uint64_t>(instbits));
+ a.and_(dst, dst, scratch);
+ }
+
+ uint64_t result;
+ if (inst.size() == 4)
+ result = rotl_32(srcp.immediate(), s) & maskp.immediate();
+ else
+ result = rotl_64(srcp.immediate(), s) & maskp.immediate();
+
+ if (result != 0)
+ {
+ if (is_valid_immediate_mask(result, inst.size()))
+ {
+ a.orr(dst, dst, result);
+ }
+ else
+ {
+ get_imm_relative(a, scratch, result);
+ a.orr(dst, dst, scratch);
+ }
+ }
+
+ optimized = true;
+ }
+ }
+
+ if (!optimized)
+ {
+ const a64::Gp shift = shiftp.select_register(SCRATCH_REG1, inst.size());
+ const a64::Gp rshift = select_register(SCRATCH_REG1, inst.size());
+
+ if (!shiftp.is_immediate())
+ {
+ // do this first as dst could be the same register as shift
+ mov_reg_param(a, inst.size(), shift, shiftp);
+
+ a.neg(rshift, shift);
+ }
+
+ mov_reg_param(a, inst.size(), dst, dstp);
+
+ if (shiftp.is_immediate())
+ {
+ const auto shift = -int64_t(shiftp.immediate()) & ((inst.size() * 8) - 1);
+
+ if (shift != 0)
+ {
+ mov_reg_param(a, inst.size(), src, srcp);
+ a.ror(scratch, src, shift);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), scratch, srcp);
+ }
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ a.and_(rshift, rshift, (inst.size() * 8) - 1);
+ a.ror(scratch, src, rshift);
+ }
+
+ const a64::Gp mask = maskp.select_register(SCRATCH_REG1, inst.size());
+ if (!maskp.is_immediate() || !is_valid_immediate_mask(maskp.immediate(), inst.size()) || !is_valid_immediate_mask(~maskp.immediate() & util::make_bitmask<uint64_t>(instbits), inst.size()))
+ mov_reg_param(a, inst.size(), mask, maskp);
+
+ // val2 = val2 & PARAM3
+ if (maskp.is_immediate() && is_valid_immediate_mask(maskp.immediate(), inst.size()))
+ a.and_(scratch, scratch, maskp.immediate());
+ else
+ a.and_(scratch, scratch, mask);
+
+ // val1 = src & ~PARAM3
+ if (maskp.is_immediate() && is_valid_immediate_mask(~maskp.immediate() & util::make_bitmask<uint64_t>(instbits), inst.size()))
+ a.and_(dst, dst, ~maskp.immediate() & util::make_bitmask<uint64_t>(instbits));
+ else
+ a.bic(dst, dst, mask);
+
+ a.orr(dst, dst, scratch); // val1 | val2
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+template <bool CarryIn> void drcbe_arm64::op_add(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_V | FLAG_Z | FLAG_S);
+
+ const a64::Inst::Id opcode = CarryIn
+ ? (inst.flags() ? a64::Inst::kIdAdcs : a64::Inst::kIdAdc)
+ : (inst.flags() ? a64::Inst::kIdAdds : a64::Inst::kIdAdd);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ const a64::Gp zero = select_register(a64::xzr, inst.size());
+ const a64::Gp output = dstp.select_register(TEMP_REG3, inst.size());
+
+ if (CarryIn && (m_carry_state != carry_state::CANONICAL))
+ {
+ m_carry_state = carry_state::CANONICAL;
+
+ a.sbfx(TEMP_REG1, FLAGS_REG, FLAG_BIT_C, 1);
+ a.cmn(TEMP_REG1, 1);
+ }
+
+ if (src1p.is_immediate_value(0))
+ {
+ if (src2p.is_immediate_value(0))
+ {
+ if (CarryIn)
+ {
+ a.emit(opcode, output, zero, zero);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ mov_param_reg(a, inst.size(), dstp, zero);
+ a.emit(opcode, zero, zero, zero);
+ }
+ }
+ else if (!CarryIn && src2p.is_immediate() && is_valid_immediate_addsub(src2p.immediate()))
+ {
+ a.mov(output, zero);
+ a.emit(opcode, output, output, src2p.immediate());
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && src2p.is_immediate() && is_valid_immediate(src2p.immediate(), 24))
+ {
+ a.mov(output, src2p.immediate() & util::make_bitmask<uint64_t>(12));
+ a.emit(opcode, output, output, src2p.immediate() & (util::make_bitmask<uint64_t>(12) << 12));
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ const a64::Gp src = src2p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src2p);
+ a.emit(opcode, output, src, zero);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ }
+ else if (src2p.is_immediate_value(0))
+ {
+ if (!CarryIn && src1p.is_immediate() && is_valid_immediate_addsub(src1p.immediate()))
+ {
+ a.mov(output, zero);
+ a.emit(opcode, output, output, src1p.immediate());
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && src1p.is_immediate() && is_valid_immediate(src1p.immediate(), 24))
+ {
+ a.mov(output, src1p.immediate() & util::make_bitmask<uint64_t>(12));
+ a.emit(opcode, output, output, src1p.immediate() & (util::make_bitmask<uint64_t>(12) << 12));
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ a.emit(opcode, output, src, zero);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ }
+ else if (!CarryIn && src1p.is_immediate() && is_valid_immediate_addsub(src1p.immediate()))
+ {
+ const a64::Gp src = src2p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src2p);
+ a.emit(opcode, output, src, src1p.immediate());
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && src2p.is_immediate() && is_valid_immediate_addsub(src2p.immediate()))
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ a.emit(opcode, output, src, src2p.immediate());
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && !inst.flags() && src1p.is_immediate() && is_valid_immediate(src1p.immediate(), 24))
+ {
+ const a64::Gp src = src2p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src2p);
+ a.emit(opcode, output, src, src1p.immediate() & util::make_bitmask<uint64_t>(12));
+ a.emit(opcode, output, output, src1p.immediate() & (util::make_bitmask<uint64_t>(12) << 12));
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && !inst.flags() && src2p.is_immediate() && is_valid_immediate(src2p.immediate(), 24))
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ a.emit(opcode, output, src, src2p.immediate() & util::make_bitmask<uint64_t>(12));
+ a.emit(opcode, output, output, src2p.immediate() & (util::make_bitmask<uint64_t>(12) << 12));
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+ a.emit(opcode, output, src1, src2);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+
+ if (inst.flags())
+ {
+ if (inst.flags() & FLAG_C)
+ store_carry(a);
+ else
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+template <bool CarryIn> void drcbe_arm64::op_sub(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_V | FLAG_Z | FLAG_S);
+
+ const a64::Inst::Id opcode = CarryIn
+ ? (inst.flags() ? a64::Inst::kIdSbcs : a64::Inst::kIdSbc)
+ : (inst.flags() ? a64::Inst::kIdSubs : a64::Inst::kIdSub);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ if (CarryIn && (m_carry_state != carry_state::LOGICAL))
+ {
+ m_carry_state = carry_state::LOGICAL;
+
+ a.ubfx(TEMP_REG1, FLAGS_REG, FLAG_BIT_C, 1);
+ a.cmp(a64::xzr, TEMP_REG1);
+ }
+
+ const a64::Gp zero = select_register(a64::xzr, inst.size());
+ const a64::Gp output = dstp.select_register(TEMP_REG3, inst.size());
+
+ if (src2p.is_immediate_value(0))
+ {
+ if (src1p.is_immediate_value(0))
+ {
+ if (CarryIn)
+ {
+ a.emit(opcode, output, zero, zero);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ mov_param_reg(a, inst.size(), dstp, zero);
+ a.emit(opcode, zero, zero, zero);
+ }
+ }
+ else
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ if (CarryIn)
+ {
+ a.emit(opcode, output, src, zero);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ mov_param_reg(a, inst.size(), dstp, src);
+ a.emit(opcode, zero, src, zero);
+ }
+ }
+ }
+ else if (!CarryIn && src2p.is_immediate() && is_valid_immediate_addsub(src2p.immediate()))
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ a.emit(opcode, output, src, src2p.immediate());
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else if (!CarryIn && (!inst.flags() || src1p.is_immediate_value(0)) && src2p.is_immediate() && is_valid_immediate(src2p.immediate(), 24))
+ {
+ const a64::Gp src = src1p.select_register(output, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+ a.emit(opcode, output, src, src2p.immediate() & util::make_bitmask<uint64_t>(12));
+ a.emit(opcode, output, output, src2p.immediate() & (util::make_bitmask<uint64_t>(12) << 12));
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+ else
+ {
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+ a.emit(opcode, output, src1, src2);
+ mov_param_reg(a, inst.size(), dstp, output);
+ }
+
+ if (inst.flags())
+ {
+ if (inst.flags() & FLAG_C)
+ store_carry(a, true);
+ else
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_cmp(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter src1p(*this, inst.param(0), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(1), PTYPE_MRI);
+
+ if (src1p == src2p)
+ {
+ const a64::Gp zero = select_register(a64::xzr, inst.size());
+
+ a.cmp(zero, zero);
+ }
+ else
+ {
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ if (src2p.is_immediate() && is_valid_immediate_addsub(src2p.immediate()))
+ {
+ if (src2p.is_immediate_value(0))
+ a.cmp(src1, select_register(a64::xzr, inst.size()));
+ else
+ a.cmp(src1, src2p.immediate());
+ }
+ else
+ {
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), src2, src2p);
+ a.cmp(src1, src2);
+ }
+ }
+
+ if (inst.flags() & FLAG_C)
+ store_carry(a, true);
+ else
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_mulu(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter edstp(*this, inst.param(1), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
+ const bool compute_hi = (dstp != edstp);
+
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp lo = TEMP_REG3;
+ const a64::Gp hi = TEMP_REG2;
+
+ if ((src1p.is_immediate() && src1p.is_immediate_value(0)) || (src2p.is_immediate() && src2p.is_immediate_value(0)))
+ {
+ a.mov(lo, a64::xzr);
+ a.mov(hi, a64::xzr);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ if (inst.size() == 8)
+ {
+ a.mul(lo, src1, src2);
+ a.umulh(hi, src1, src2);
+ }
+ else
+ {
+ a.umull(lo, src1, src2);
+ a.lsr(hi, lo, 32);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, lo);
+ if (compute_hi)
+ mov_param_reg(a, inst.size(), edstp, hi);
+
+ if (inst.flags())
+ {
+ a.mrs(SCRATCH_REG1, a64::Predicate::SysReg::kNZCV);
+
+ a.tst(lo, lo);
+ a.cset(TEMP_REG1, a64::CondCode::kEQ);
+ a.tst(hi, hi);
+ a.cset(TEMP_REG3, a64::CondCode::kEQ);
+ a.and_(TEMP_REG1, TEMP_REG1, TEMP_REG3);
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 30, 1); // zero flag
+
+ a.tst(hi, hi); // overflow check
+ a.cset(TEMP_REG3, a64::CondCode::kNE);
+ a.bfi(SCRATCH_REG1, TEMP_REG3, 28, 1); // overflow flag
+
+ a.lsr(TEMP_REG3, hi, inst.size() * 8 - 1); // take top bit of result as sign flag
+ a.bfi(SCRATCH_REG1, TEMP_REG3, 31, 1); // sign flag
+
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_mululw(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp lo = TEMP_REG3;
+ const a64::Gp hi = TEMP_REG2;
+
+ if ((src1p.is_immediate() && src1p.is_immediate_value(0)) || (src2p.is_immediate() && src2p.is_immediate_value(0)))
+ {
+ a.mov(lo, a64::xzr);
+ a.mov(hi, a64::xzr);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ if (inst.size() == 8)
+ {
+ a.mul(lo, src1, src2);
+ a.umulh(hi, src1, src2);
+ }
+ else
+ {
+ a.umull(lo, src1, src2);
+ a.lsr(hi, lo, 32);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, lo);
+
+ if (inst.flags())
+ {
+ a.mrs(TEMP_REG1, a64::Predicate::SysReg::kNZCV);
+
+ a.tst(select_register(lo, inst.size()), select_register(lo, inst.size()));
+ a.cset(SCRATCH_REG1, a64::CondCode::kEQ);
+ a.bfi(TEMP_REG1, SCRATCH_REG1, 30, 1); // zero flag
+
+ a.cmp(hi, 0);
+ a.cset(SCRATCH_REG1, a64::CondCode::kNE);
+ a.bfi(TEMP_REG1, SCRATCH_REG1, 28, 1); // overflow flag
+
+ a.lsr(SCRATCH_REG1, lo, inst.size() * 8 - 1); // take top bit of result as sign flag
+ a.bfi(TEMP_REG1, SCRATCH_REG1, 31, 1); // sign flag
+
+ a.msr(a64::Predicate::SysReg::kNZCV, TEMP_REG1);
+
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_muls(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter edstp(*this, inst.param(1), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
+ const bool compute_hi = (dstp != edstp);
+
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp lo = TEMP_REG3;
+ const a64::Gp hi = TEMP_REG2;
+
+ if ((src1p.is_immediate() && src1p.is_immediate_value(0)) || (src2p.is_immediate() && src2p.is_immediate_value(0)))
+ {
+ a.mov(lo, a64::xzr);
+ a.mov(hi, a64::xzr);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ if (inst.size() == 8)
+ {
+ a.mul(lo, src1, src2);
+ a.smulh(hi, src1, src2);
+ }
+ else
+ {
+ a.smull(lo, src1, src2);
+ a.lsr(hi, lo, 32);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, lo);
+ if (compute_hi)
+ mov_param_reg(a, inst.size(), edstp, hi);
+
+ if (inst.flags())
+ {
+ a.mrs(SCRATCH_REG1, a64::Predicate::SysReg::kNZCV);
+
+ a.tst(lo, lo);
+ a.cset(TEMP_REG1, a64::CondCode::kEQ);
+ a.tst(hi, hi);
+ a.cset(SCRATCH_REG2, a64::CondCode::kEQ);
+ a.and_(TEMP_REG1, TEMP_REG1, SCRATCH_REG2);
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 30, 1); // zero flag
+
+ if (inst.size() == 4)
+ {
+ a.sxtw(TEMP_REG1, lo.w());
+ a.cmp(TEMP_REG1, lo);
+ }
+ else
+ {
+ a.asr(TEMP_REG1, lo, 63);
+ a.cmp(TEMP_REG1, hi);
+ }
+
+ a.cset(TEMP_REG1, a64::CondCode::kNE);
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 28, 1); // overflow flag
+
+ a.lsr(TEMP_REG1, hi, inst.size() * 8 - 1); // take top bit of result as sign flag
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 31, 1); // sign flag
+
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_mulslw(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp lo = TEMP_REG3;
+ const a64::Gp hi = TEMP_REG2;
+
+ if ((src1p.is_immediate() && src1p.is_immediate_value(0)) || (src2p.is_immediate() && src2p.is_immediate_value(0)))
+ {
+ a.mov(lo, a64::xzr);
+
+ if (inst.flags() && inst.size() == 8)
+ a.mov(hi, a64::xzr);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ if (inst.size() == 8)
+ {
+ a.mul(lo, src1, src2);
+
+ if (inst.flags())
+ a.smulh(hi, src1, src2);
+ }
+ else
+ {
+ a.smull(lo, src1, src2);
+ }
+ }
+
+ mov_param_reg(a, inst.size(), dstp, lo);
+
+ if (inst.flags())
+ {
+ a.mrs(SCRATCH_REG1, a64::Predicate::SysReg::kNZCV);
+
+ a.tst(select_register(lo, inst.size()), select_register(lo, inst.size()));
+ a.cset(TEMP_REG1, a64::CondCode::kEQ);
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 30, 1); // zero flag
+
+ if (inst.size() == 4)
+ {
+ a.sxtw(TEMP_REG1, lo.w());
+ a.cmp(TEMP_REG1, lo);
+ }
+ else
+ {
+ a.asr(TEMP_REG1, lo, 63);
+ a.cmp(TEMP_REG1, hi);
+ }
+
+ a.cset(TEMP_REG1, a64::CondCode::kNE);
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 28, 1); // overflow flag
+
+ a.lsr(TEMP_REG1, lo, inst.size() * 8 - 1); // take top bit of result as sign flag
+ a.bfi(SCRATCH_REG1, TEMP_REG1, 31, 1); // sign flag
+
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+template <a64::Inst::Id Opcode> void drcbe_arm64::op_div(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter edstp(*this, inst.param(1), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
+ const bool compute_rem = (dstp != edstp);
+
+ if (!src2p.is_immediate() || (src2p.is_immediate() && !src2p.is_immediate_value(0)))
+ {
+ Label skip_zero = a.newLabel();
+ Label skip = a.newLabel();
+
+ const a64::Gp temp = select_register(TEMP_REG1, inst.size());
+ const a64::Gp temp2 = select_register(TEMP_REG2, inst.size());
+ const a64::Gp temp3 = select_register(TEMP_REG3, inst.size());
+
+ mov_reg_param(a, inst.size(), temp2, src2p);
+ a.cbz(temp2, skip_zero);
+
+ mov_reg_param(a, inst.size(), temp, src1p);
+
+ a.emit(Opcode, temp3, temp, temp2);
+
+ mov_param_reg(a, inst.size(), dstp, temp3);
+
+ if (compute_rem)
+ {
+ a.msub(temp2, temp3, temp2, temp);
+ mov_param_reg(a, inst.size(), edstp, temp2);
+ }
+
+ if (inst.flags())
+ a.tst(temp3, temp3);
+
+ a.b(skip);
+
+ a.bind(skip_zero);
+ a.mov(SCRATCH_REG1, 1 << 28); // set overflow flag
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+
+ a.bind(skip);
+ }
+ else
+ {
+ a.mov(SCRATCH_REG1, 1 << 28); // set overflow flag
+ a.msr(a64::Predicate::SysReg::kNZCV, SCRATCH_REG1);
+ }
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_and(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ const a64::Inst::Id opcode = inst.flags() ? a64::Inst::kIdAnds : a64::Inst::kIdAnd;
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ if (inst.param(0) == inst.param(2))
+ {
+ using std::swap;
+ swap(src1p, src2p);
+ }
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG3, inst.size());
+ const a64::Gp src1 = src1p.select_register(dst, inst.size());
+
+ if (src1p.is_immediate_value(0) || src2p.is_immediate_value(0))
+ {
+ if (inst.flags())
+ a.ands(dst, select_register(a64::xzr, inst.size()), 1); // immediate value doesn't matter, result will be zero
+ else
+ a.mov(dst, 0);
+ }
+ else if (src1p.is_immediate() && src2p.is_immediate())
+ {
+ get_imm_relative(a, dst, src1p.immediate() & src2p.immediate());
+
+ if (inst.flags())
+ a.tst(dst, dst);
+ }
+ else if (src2p.is_immediate() && is_valid_immediate_mask(src2p.immediate(), inst.size()))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ a.emit(opcode, dst, src1, src2p.immediate());
+ }
+ else if ((inst.size() == 8) && src2p.is_immediate() && is_valid_immediate_mask(src2p.immediate(), 4) && (!inst.flags() || !BIT(src2p.immediate(), 31)))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ a.emit(opcode, dst.w(), src1.w(), src2p.immediate());
+ }
+ else if (src2p.is_immediate_value(util::make_bitmask<uint64_t>(inst.size() * 8)) || (src1p == src2p))
+ {
+ if ((dstp == src1p) && !inst.flags())
+ {
+ if ((inst.size() == 8) || (dstp.is_memory() && !dstp.is_cold_register()))
+ return;
+ }
+
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ if ((dst.id() != src1.id()) || ((inst.size() == 4) && (dstp == src1p) && dstp.is_int_register()))
+ a.emit(opcode, dst, src1, src1);
+ else if (inst.flags())
+ a.tst(dst, dst);
+ }
+ else
+ {
+ const a64::Gp src2 = src2p.select_register(TEMP_REG1, inst.size());
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ a.emit(opcode, dst, src1, src2);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_test(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter src1p(*this, inst.param(0), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(1), PTYPE_MRI);
+
+ const a64::Gp src1 = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp src2 = src2p.select_register(TEMP_REG2, inst.size());
+
+ if (src2p.is_immediate_value(0))
+ {
+ const a64::Gp zero = select_register(a64::xzr, inst.size());
+
+ a.tst(zero, zero);
+ }
+ else if (src2p.is_immediate_value(util::make_bitmask<uint64_t>(inst.size() * 8)))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ a.tst(src1, src1);
+ }
+ else if (src2p.is_immediate() && is_valid_immediate_mask(src2p.immediate(), inst.size()))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ a.tst(src1, src2p.immediate());
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+ a.tst(src1, src2);
+ }
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_or(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ if (inst.param(0) == inst.param(2))
+ {
+ using std::swap;
+ swap(src1p, src2p);
+ }
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG3, inst.size());
+ const a64::Gp src1 = src1p.select_register(dst, inst.size());
+
+ if (src2p.is_immediate_value(util::make_bitmask<uint64_t>(inst.size() * 8)))
+ {
+ a.mov(dst, src2p.immediate());
+ }
+ else if (src2p.is_immediate() && is_valid_immediate_mask(src2p.immediate(), inst.size()))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ a.orr(dst, src1, src2p.immediate());
+ }
+ else
+ {
+ const a64::Gp src2 = src2p.select_register(TEMP_REG1, inst.size());
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ a.orr(dst, src1, src2);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_xor(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ if (inst.param(0) == inst.param(2))
+ {
+ using std::swap;
+ swap(src1p, src2p);
+ }
+
+ const a64::Gp dst = dstp.select_register(TEMP_REG3, inst.size());
+ const a64::Gp src1 = src1p.select_register(dst, inst.size());
+
+ if (src2p.is_immediate_value(util::make_bitmask<uint64_t>(inst.size() * 8)))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ a.mvn(dst, src1);
+ }
+ else if (src2p.is_immediate() && is_valid_immediate_mask(src2p.immediate(), inst.size()))
+ {
+ mov_reg_param(a, inst.size(), src1, src1p);
+
+ a.eor(dst, src1, src2p.immediate());
+ }
+ else
+ {
+ const a64::Gp src2 = src2p.select_register(TEMP_REG1, inst.size());
+ mov_reg_param(a, inst.size(), src1, src1p);
+ mov_reg_param(a, inst.size(), src2, src2p);
+
+ a.eor(dst, src1, src2);
+ }
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_lzcnt(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+
+ const a64::Gp src = srcp.select_register(TEMP_REG1, inst.size());
+ const a64::Gp dst = dstp.select_register(TEMP_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ a.clz(dst, src);
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_tzcnt(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+
+ const a64::Gp src = srcp.select_register(TEMP_REG1, inst.size());
+ const a64::Gp dst = dstp.select_register(TEMP_REG2, inst.size());
+ const a64::Gp temp = select_register(TEMP_REG3, inst.size());
+
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ a.rbit(dst, src); // reverse bits to count the tail bits from the head
+ a.clz(dst, dst);
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.eor(temp, dst, inst.size() * 8);
+ a.tst(temp, temp);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+void drcbe_arm64::op_bswap(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+
+ const a64::Gp src = srcp.select_register(TEMP_REG1, inst.size());
+ const a64::Gp dst = dstp.select_register(TEMP_REG1, inst.size());
+
+ mov_reg_param(a, inst.size(), src, srcp);
+
+ if (inst.size() == 8)
+ a.rev64(dst, src);
+ else
+ a.rev32(dst, src);
+
+ mov_param_reg(a, inst.size(), dstp, dst);
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+}
+
+
+template <a64::Inst::Id Opcode> void drcbe_arm64::op_shift(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ size_t const maxBits = inst.size() * 8 - 1;
+
+ // If possible it's more optimal to write directly to the dst register,
+ // but be careful to not overwrite one of the source values since they're needed for later calculations
+ bool can_use_dst_reg = dstp.is_int_register();
+ if (can_use_dst_reg && src1p.is_int_register())
+ can_use_dst_reg = src1p.ireg() != dstp.ireg();
+ if (can_use_dst_reg && src2p.is_int_register())
+ can_use_dst_reg = src2p.ireg() != dstp.ireg();
+
+ const a64::Gp src = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp shift = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp dst = can_use_dst_reg ? dstp.select_register(TEMP_REG3, inst.size()) : select_register(TEMP_REG3, inst.size());
+ const a64::Gp scratch = select_register(FUNC_SCRATCH_REG, inst.size());
+
+ mov_reg_param(a, inst.size(), src, src1p);
+
+ if (src2p.is_immediate() && is_valid_immediate(src2p.immediate(), (inst.size() == 8) ? 5 : 4))
+ {
+ const auto shift = src2p.immediate() % (inst.size() * 8);
+
+ a.emit(Opcode, dst, src, shift);
+
+ if (Opcode == a64::Inst::kIdRor || Opcode == a64::Inst::kIdLsr || Opcode == a64::Inst::kIdAsr)
+ calculate_carry_shift_right_imm(a, src, shift);
+ else if (Opcode == a64::Inst::kIdLsl)
+ calculate_carry_shift_left_imm(a, src, shift, maxBits);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), shift, src2p);
+
+ a.and_(scratch, shift, inst.size() * 8 - 1);
+
+ a.emit(Opcode, dst, src, scratch);
+
+ if (Opcode == a64::Inst::kIdRor || Opcode == a64::Inst::kIdLsr || Opcode == a64::Inst::kIdAsr)
+ calculate_carry_shift_right(a, src, scratch);
+ else if (Opcode == a64::Inst::kIdLsl)
+ calculate_carry_shift_left(a, src, scratch, maxBits);
+ }
+
+ if (inst.flags())
+ {
+ a.tst(dst, dst);
+ m_carry_state = carry_state::POISON;
+ }
+
+ // save dst after using inputs for calculations so the registers have no chance of being overwritten
+ mov_param_reg(a, inst.size(), dstp, dst);
+}
+
+void drcbe_arm64::op_rol(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ size_t const maxBits = inst.size() * 8 - 1;
+
+ bool can_use_dst_reg = dstp.is_int_register();
+ if (can_use_dst_reg && src1p.is_int_register())
+ can_use_dst_reg = src1p.ireg() != dstp.ireg();
+ if (can_use_dst_reg && src2p.is_int_register())
+ can_use_dst_reg = src2p.ireg() != dstp.ireg();
+
+ const a64::Gp param = src1p.select_register(TEMP_REG1, inst.size());
+ const a64::Gp shift = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp output = can_use_dst_reg ? dstp.select_register(TEMP_REG3, inst.size()) : select_register(TEMP_REG3, inst.size());
+ const a64::Gp scratch2 = select_register(FUNC_SCRATCH_REG, inst.size());
+
+ mov_reg_param(a, inst.size(), param, src1p);
+
+ if (src2p.is_immediate())
+ {
+ const auto s = src2p.immediate() % (inst.size() * 8);
+ const auto s2 = ((inst.size() * 8) - s) % (inst.size() * 8);
+
+ if (s2 == 0)
+ {
+ if (output.id() != param.id())
+ a.mov(output, param);
+ }
+ else
+ {
+ a.ror(output, param, s2);
+ }
+
+ calculate_carry_shift_left_imm(a, param, s, maxBits);
+ }
+ else
+ {
+ mov_reg_param(a, inst.size(), shift, src2p);
+
+ const a64::Gp scratch = select_register(SCRATCH_REG1, inst.size());
+ a.mov(scratch, inst.size() * 8);
+ a.and_(scratch2, shift, maxBits);
+ a.sub(scratch, scratch, scratch2);
+ a.ror(output, param, scratch);
+
+ calculate_carry_shift_left(a, param, scratch2, maxBits);
+ }
+
+ if (inst.flags())
+ {
+ a.tst(output, output);
+ m_carry_state = carry_state::POISON;
+ }
+
+ mov_param_reg(a, inst.size(), dstp, output);
+}
+
+void drcbe_arm64::op_rolc(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ size_t const maxBits = inst.size() * 8 - 1;
+
+ bool can_use_dst_reg = dstp.is_int_register();
+ if (can_use_dst_reg && src1p.is_int_register())
+ can_use_dst_reg = src1p.ireg() != dstp.ireg();
+ if (can_use_dst_reg && src2p.is_int_register())
+ can_use_dst_reg = src2p.ireg() != dstp.ireg();
+
+ const a64::Gp param1 = src1p.select_register(TEMP_REG3, inst.size());
+ const a64::Gp output = can_use_dst_reg ? dstp.select_register(TEMP_REG1, inst.size()) : select_register(TEMP_REG1, inst.size());
+ const a64::Gp carry = select_register(SCRATCH_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), param1, src1p);
+
+ // shift > 1: src = (PARAM1 << shift) | (carry << (shift - 1)) | (PARAM1 >> (33 - shift))
+ // shift = 1: src = (PARAM1 << shift) | carry
+
+ if (src2p.is_immediate())
+ {
+ const auto shift = src2p.immediate() % (inst.size() * 8);
+
+ if (shift != 0)
+ {
+ a.ubfx(carry, param1, (inst.size() * 8) - shift, 1);
+ if (shift > 1)
+ a.ubfx(output, param1, (inst.size() * 8) - shift + 1, shift - 1);
+ a.bfi(output.x(), FLAGS_REG, shift - 1, 1);
+ a.bfi(output, param1, shift, (inst.size() * 8) - shift);
+ a.bfi(FLAGS_REG, carry.x(), 0, 1);
+
+ if (inst.flags() & FLAG_C)
+ calculate_carry_shift_left_imm(a, param1, shift, maxBits);
+ }
+ else
+ {
+ a.mov(output, param1);
+ }
+ }
+ else
+ {
+ const a64::Gp shift = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp scratch = select_register(SCRATCH_REG1, inst.size());
+ const a64::Gp scratch2 = select_register(FUNC_SCRATCH_REG, inst.size());
+
+ mov_reg_param(a, inst.size(), shift, src2p);
+
+ a.and_(scratch2, shift, maxBits);
+
+ a.lsl(output, param1, scratch2); // PARAM1 << shift
+
+ Label skip = a.newLabel();
+ Label skip3 = a.newLabel();
+ a.cbz(scratch2, skip3);
+
+ get_carry(a, carry);
+
+ a.sub(scratch, scratch2, 1);
+ a.cbz(scratch, skip);
+
+ // add carry flag to output
+ a.lsl(carry, carry, scratch);
+
+ a.mov(scratch, maxBits + 2); // PARAM1 >> (33 - shift)
+ a.sub(scratch, scratch, scratch2);
+ a.lsr(scratch, param1, scratch);
+ a.orr(output, output, scratch);
+
+ a.bind(skip);
+
+ a.orr(output, output, carry);
+
+ if (inst.flags() & FLAG_C)
+ calculate_carry_shift_left(a, param1, scratch2, maxBits);
+
+ a.bind(skip3);
+ }
+
+ if (inst.flags() & (FLAG_Z | FLAG_S))
+ a.tst(output, output);
+
+ mov_param_reg(a, inst.size(), dstp, output);
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_rorc(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_Z | FLAG_S);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+
+ size_t const maxBits = inst.size() * 8 - 1;
+
+ bool can_use_dst_reg = dstp.is_int_register();
+ if (can_use_dst_reg && src1p.is_int_register())
+ can_use_dst_reg = src1p.ireg() != dstp.ireg();
+ if (can_use_dst_reg && src2p.is_int_register())
+ can_use_dst_reg = src2p.ireg() != dstp.ireg();
+
+ const a64::Gp param1 = src1p.select_register(TEMP_REG3, inst.size());
+ const a64::Gp output = can_use_dst_reg ? dstp.select_register(TEMP_REG1, inst.size()) : select_register(TEMP_REG1, inst.size());
+ const a64::Gp carry = select_register(SCRATCH_REG2, inst.size());
+
+ mov_reg_param(a, inst.size(), param1, src1p);
+
+ // if (shift > 1)
+ // src = (PARAM1 >> shift) | (((flags & FLAG_C) << 31) >> (shift - 1)) | (PARAM1 << (33 - shift));
+ // else if (shift == 1)
+ // src = (PARAM1 >> shift) | ((flags & FLAG_C) << 31);
+
+ if (src2p.is_immediate())
+ {
+ const auto shift = src2p.immediate() % (inst.size() * 8);
+
+ if (shift != 0)
+ {
+ a.ubfx(carry, param1, shift - 1, 1);
+ a.ubfx(output, param1, shift, (inst.size() * 8) - shift);
+ a.bfi(output.x(), FLAGS_REG, (inst.size() * 8) - shift, 1);
+ if (shift > 1)
+ a.bfi(output, param1, (inst.size() * 8) - shift + 1, shift - 1);
+ a.bfi(FLAGS_REG, carry.x(), 0, 1);
+
+ if (inst.flags() & FLAG_C)
+ calculate_carry_shift_right_imm(a, param1, shift);
+ }
+ else
+ {
+ a.mov(output, param1);
+ }
+ }
+ else
+ {
+ const a64::Gp shift = src2p.select_register(TEMP_REG2, inst.size());
+ const a64::Gp scratch = select_register(SCRATCH_REG1, inst.size());
+ const a64::Gp scratch2 = select_register(FUNC_SCRATCH_REG, inst.size());
+
+ mov_reg_param(a, inst.size(), shift, src2p);
+
+ a.and_(scratch2, shift, maxBits);
+
+ a.lsr(output, param1, shift); // PARAM1 >> shift
+
+ Label skip = a.newLabel();
+ Label skip3 = a.newLabel();
+ a.cbz(scratch2, skip3);
+
+ get_carry(a, carry);
+ a.lsl(carry, carry, maxBits); // (flags & FLAG_C) << 31
+
+ a.sub(scratch, scratch2, 1); // carry >> (shift - 1)
+ a.cbz(scratch, skip);
+
+ // add carry flag to output
+ a.lsr(carry, carry, scratch);
+
+ a.mov(scratch, maxBits + 2); // PARAM1 << (33 - shift)
+ a.sub(scratch, scratch, scratch2);
+ a.lsl(scratch, param1, scratch);
+ a.orr(output, output, scratch);
+
+ a.bind(skip);
+
+ a.orr(output, output, carry);
+
+ if (inst.flags() & FLAG_C)
+ calculate_carry_shift_right(a, param1, scratch2);
+
+ a.bind(skip3);
+ }
+
+ if (inst.flags() & (FLAG_Z | FLAG_S))
+ a.tst(output, output);
+
+ mov_param_reg(a, inst.size(), dstp, output);
+
+ m_carry_state = carry_state::POISON;
+}
+
+void drcbe_arm64::op_fload(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter basep(*this, inst.param(1), PTYPE_M);
+ be_parameter indp(*this, inst.param(2), PTYPE_MRI);
+
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG1, inst.size());
+ const a64::Gp basereg = TEMP_REG1;
+
+ get_imm_relative(a, basereg, uint64_t(basep.memory()));
+
+ if (indp.is_immediate())
+ {
+ a.ldr(dstreg, arm::Mem(basereg, int32_t(uint32_t(indp.immediate())) * inst.size()));
+ }
+ else
+ {
+ const a64::Gp indreg = TEMP_REG1.x();
+ if (indp.is_int_register())
+ a.sxtw(indreg, indp.get_register_int(4));
+ else if ((util::endianness::native == util::endianness::big) && indp.is_cold_register())
+ emit_ldrsw_mem(a, indreg, reinterpret_cast<uint8_t *>(indp.memory()) + 4);
+ else
+ emit_ldrsw_mem(a, indreg, indp.memory());
+
+ a.ldr(dstreg, arm::Mem(basereg, indreg, arm::lsl((inst.size() == 4) ? 2 : 3)));
+ }
+
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_fstore(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter basep(*this, inst.param(0), PTYPE_M);
+ be_parameter indp(*this, inst.param(1), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(2), PTYPE_MF);
+
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG1, inst.size());
+ const a64::Gp basereg = TEMP_REG1;
+
+ get_imm_relative(a, basereg, uint64_t(basep.memory()));
+
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+
+ if (indp.is_immediate())
+ {
+ a.str(srcreg, arm::Mem(basereg, int32_t(uint32_t(indp.immediate())) * inst.size()));
+ }
+ else
+ {
+ const a64::Gp indreg = TEMP_REG1.x();
+ if (indp.is_int_register())
+ a.sxtw(indreg, indp.get_register_int(4));
+ else if ((util::endianness::native == util::endianness::big) && indp.is_cold_register())
+ emit_ldrsw_mem(a, indreg, reinterpret_cast<uint8_t *>(indp.memory()) + 4);
+ else
+ emit_ldrsw_mem(a, indreg, indp.memory());
+
+ a.str(srcreg, arm::Mem(basereg, indreg, arm::lsl((inst.size() == 4) ? 2 : 3)));
+ }
+}
+
+void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter addrp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &spacesizep = inst.param(2);
+ assert(spacesizep.is_size_space());
+ assert((1 << spacesizep.size()) == inst.size());
+
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+
+ if (inst.size() == 4)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_dword.obj);
+ call_arm_addr(a, accessors.resolved.read_dword.func);
+
+ mov_float_param_int_reg(a, inst.size(), dstp, REG_PARAM1.w());
+ }
+ else if (inst.size() == 8)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.read_qword.obj);
+ call_arm_addr(a, accessors.resolved.read_qword.func);
+
+ mov_float_param_int_reg(a, inst.size(), dstp, REG_PARAM1);
+ }
+}
+
+void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ m_carry_state = carry_state::POISON;
+
+ be_parameter addrp(*this, inst.param(0), PTYPE_MRI);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+ const parameter &spacesizep = inst.param(2);
+ assert(spacesizep.is_size_space());
+ assert((1 << spacesizep.size()) == inst.size());
+
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+
+ mov_reg_param(a, 4, REG_PARAM2, addrp);
+ mov_float_reg_param(a, inst.size(), TEMPF_REG1, srcp);
+
+ a.fmov(select_register(REG_PARAM3, inst.size()), select_register(TEMPF_REG1, inst.size()));
+
+ if (inst.size() == 4)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_dword.obj);
+ call_arm_addr(a, accessors.resolved.write_dword.func);
+ }
+ else if (inst.size() == 8)
+ {
+ get_imm_relative(a, REG_PARAM1, accessors.resolved.write_qword.obj);
+ call_arm_addr(a, accessors.resolved.write_qword.func);
+ }
+}
+
+void drcbe_arm64::op_fmov(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_any_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+
+ // decide whether a conditional select will be efficient
+ bool usesel = dstp.is_float_register() && srcp.is_float_register();
+ switch (inst.condition())
+ {
+ case uml::COND_ALWAYS:
+ case uml::COND_U:
+ case uml::COND_NU:
+ usesel = false;
+ break;
+ case uml::COND_C:
+ case uml::COND_NC:
+ switch (m_carry_state)
+ {
+ case carry_state::CANONICAL:
+ case carry_state::LOGICAL:
+ break;
+ default:
+ usesel = false;
+ }
+ break;
+ default:
+ break;
+ }
+
+ if (usesel)
+ {
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG1, inst.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG2, inst.size());
+
+ mov_float_reg_param(a, inst.size(), dstreg, dstp);
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+
+ switch (inst.condition())
+ {
+ case uml::COND_C:
+ case uml::COND_NC:
+ if (m_carry_state == carry_state::CANONICAL)
+ a.fcsel(dstreg, srcreg, dstreg, ARM_NOT_CONDITION(inst.condition()));
+ else
+ a.fcsel(dstreg, srcreg, dstreg, ARM_CONDITION(inst.condition()));
+ break;
+ case uml::COND_A:
+ case uml::COND_BE:
+ load_carry(a, true);
+ [[fallthrough]];
+ default:
+ a.fcsel(dstreg, srcreg, dstreg, ARM_CONDITION(inst.condition()));
+ }
+
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+ }
+ else
+ {
+ Label skip;
+ emit_skip(a, inst.condition(), skip);
+
+ mov_float_param_param(a, inst.size(), dstp, srcp);
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.bind(skip);
+ }
+}
+
+void drcbe_arm64::op_ftoint(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+ const parameter &sizep = inst.param(2);
+ assert(sizep.is_size());
+ const parameter &roundp = inst.param(3);
+ assert(roundp.is_rounding());
+
+ const a64::Gp dstreg = dstp.select_register(TEMP_REG1, 1 << sizep.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG1, inst.size());
+
+ if (!srcp.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+
+ switch (roundp.rounding())
+ {
+ case ROUND_ROUND:
+ a.fcvtns(dstreg, srcreg);
+ break;
+
+ case ROUND_CEIL:
+ a.fcvtps(dstreg, srcreg);
+ break;
+
+ case ROUND_FLOOR:
+ a.fcvtms(dstreg, srcreg);
+ break;
+
+ case ROUND_TRUNC:
+ case ROUND_DEFAULT:
+ default:
+ a.fcvtzs(dstreg, srcreg);
+ break;
+ }
+
+ mov_param_reg(a, 1 << sizep.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_ffrint(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ const parameter &sizep = inst.param(2);
+ assert(sizep.is_size());
+
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG1, inst.size());
+ const a64::Gp srcreg = srcp.select_register(TEMP_REG1, 1 << sizep.size());
+
+ if (!srcp.is_int_register())
+ mov_reg_param(a, 1 << sizep.size(), srcreg, srcp);
+
+ a.scvtf(dstreg, srcreg);
+
+ if (!dstp.is_float_register())
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_ffrflt(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+ const parameter &sizep = inst.param(2);
+ assert(sizep.is_size());
+
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG1, inst.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG2, 1 << sizep.size());
+
+ if (!srcp.is_float_register())
+ mov_float_reg_param(a, 1 << sizep.size(), srcreg, srcp);
+
+ // double to float, or float to double
+ a.fcvt(dstreg, srcreg);
+
+ if (!dstp.is_float_register())
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_frnds(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG2, inst.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG1, inst.size());
+
+ if (!srcp.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+
+ a.fcvt(dstreg.s(), srcreg.d()); // convert double to short
+ a.fcvt(dstreg.d(), dstreg.s()); // convert short to double
+
+ if (!dstp.is_float_register())
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_fcmp(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_C | FLAG_Z | FLAG_U);
+
+ be_parameter src1p(*this, inst.param(0), PTYPE_MF);
+ be_parameter src2p(*this, inst.param(1), PTYPE_MF);
+
+ const a64::Vec srcreg1 = src1p.select_register(TEMPF_REG1, inst.size());
+ const a64::Vec srcreg2 = src2p.select_register(TEMPF_REG2, inst.size());
+
+ if (!src1p.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg1, src1p);
+ if (!src2p.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg2, src2p);
+
+ a.fcmp(srcreg1, srcreg2);
+
+ if (inst.flags() & FLAG_C)
+ store_carry(a, true);
+ else
+ m_carry_state = carry_state::POISON;
+ if (inst.flags() & FLAG_U)
+ store_unordered(a);
+}
+
+template <a64::Inst::Id Opcode> void drcbe_arm64::op_float_alu(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MF);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MF);
+
+ // pick a target register for the general case
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG3, inst.size());
+ const a64::Vec srcreg1 = src1p.select_register(TEMPF_REG1, inst.size());
+ const a64::Vec srcreg2 = src2p.select_register(TEMPF_REG2, inst.size());
+
+ if (!src1p.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg1, src1p);
+ if (!src2p.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg2, src2p);
+
+ a.emit(Opcode, dstreg, srcreg1, srcreg2);
+
+ if (!dstp.is_float_register())
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+template <a64::Inst::Id Opcode> void drcbe_arm64::op_float_alu2(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+
+ // pick a target register for the general case
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG2, inst.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG1, inst.size());
+
+ if (!srcp.is_float_register())
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+
+ a.emit(Opcode, dstreg, srcreg);
+
+ if (!dstp.is_float_register())
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_fcopyi(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MF);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MR);
+
+ const a64::Vec dstreg = dstp.select_register(TEMPF_REG1, inst.size());
+ const a64::Gp srcreg = srcp.select_register(TEMP_REG1, inst.size());
+
+ mov_reg_param(a, inst.size(), srcreg, srcp);
+ a.fmov(dstreg, srcreg);
+ mov_float_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+void drcbe_arm64::op_icopyf(a64::Assembler &a, const uml::instruction &inst)
+{
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter srcp(*this, inst.param(1), PTYPE_MF);
+
+ const a64::Gp dstreg = dstp.select_register(TEMP_REG1, inst.size());
+ const a64::Vec srcreg = srcp.select_register(TEMPF_REG1, inst.size());
+
+ mov_float_reg_param(a, inst.size(), srcreg, srcp);
+ a.fmov(dstreg, srcreg);
+ mov_param_reg(a, inst.size(), dstp, dstreg);
+}
+
+} // anonymous namespace
+
+
+std::unique_ptr<drcbe_interface> make_drcbe_arm64(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits)
+{
+ return std::unique_ptr<drcbe_interface>(new drcbe_arm64(drcuml, device, cache, flags, modes, addrbits, ignorebits));
+}
+
+} // namespace drc
diff --git a/src/devices/cpu/drcbearm64.h b/src/devices/cpu/drcbearm64.h
new file mode 100644
index 00000000000..d21798bb9b3
--- /dev/null
+++ b/src/devices/cpu/drcbearm64.h
@@ -0,0 +1,26 @@
+// license:BSD-3-Clause
+// copyright-holders:windyfairy, Vas Crabb
+#ifndef MAME_CPU_DRCBEARM64_H
+#define MAME_CPU_DRCBEARM64_H
+
+#pragma once
+
+#include "drcuml.h"
+
+#include <memory>
+
+
+namespace drc {
+
+std::unique_ptr<drcbe_interface> make_drcbe_arm64(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits);
+
+} // namespace drc
+
+#endif // MAME_CPU_DRCBEARM64_H
diff --git a/src/devices/cpu/drcbec.cpp b/src/devices/cpu/drcbec.cpp
index 0421693b5dc..5ec9a0b94e4 100644
--- a/src/devices/cpu/drcbec.cpp
+++ b/src/devices/cpu/drcbec.cpp
@@ -9,11 +9,19 @@
***************************************************************************/
#include "emu.h"
-#include "debug/debugcpu.h"
#include "drcbec.h"
+#include "drcbeut.h"
+
+#include "debug/debugcpu.h"
+
#include <cmath>
+
+namespace drc {
+
+namespace {
+
using namespace uml;
@@ -22,22 +30,22 @@ using namespace uml;
//**************************************************************************
// define a bit to match each possible condition, starting at bit 12
-#define ZBIT (0x1000 << (COND_Z & 15))
-#define NZBIT (0x1000 << (COND_NZ & 15))
-#define SBIT (0x1000 << (COND_S & 15))
-#define NSBIT (0x1000 << (COND_NS & 15))
-#define CBIT (0x1000 << (COND_C & 15))
-#define NCBIT (0x1000 << (COND_NC & 15))
-#define VBIT (0x1000 << (COND_V & 15))
-#define NVBIT (0x1000 << (COND_NV & 15))
-#define UBIT (0x1000 << (COND_U & 15))
-#define NUBIT (0x1000 << (COND_NU & 15))
-#define ABIT (0x1000 << (COND_A & 15))
-#define BEBIT (0x1000 << (COND_BE & 15))
-#define GBIT (0x1000 << (COND_G & 15))
-#define GEBIT (0x1000 << (COND_GE & 15))
-#define LBIT (0x1000 << (COND_L & 15))
-#define LEBIT (0x1000 << (COND_LE & 15))
+constexpr uint32_t ZBIT = 0x1000 << (COND_Z & 15);
+constexpr uint32_t NZBIT = 0x1000 << (COND_NZ & 15);
+constexpr uint32_t SBIT = 0x1000 << (COND_S & 15);
+constexpr uint32_t NSBIT = 0x1000 << (COND_NS & 15);
+constexpr uint32_t CBIT = 0x1000 << (COND_C & 15);
+constexpr uint32_t NCBIT = 0x1000 << (COND_NC & 15);
+constexpr uint32_t VBIT = 0x1000 << (COND_V & 15);
+constexpr uint32_t NVBIT = 0x1000 << (COND_NV & 15);
+constexpr uint32_t UBIT = 0x1000 << (COND_U & 15);
+constexpr uint32_t NUBIT = 0x1000 << (COND_NU & 15);
+constexpr uint32_t ABIT = 0x1000 << (COND_A & 15);
+constexpr uint32_t BEBIT = 0x1000 << (COND_BE & 15);
+constexpr uint32_t GBIT = 0x1000 << (COND_G & 15);
+constexpr uint32_t GEBIT = 0x1000 << (COND_GE & 15);
+constexpr uint32_t LBIT = 0x1000 << (COND_L & 15);
+constexpr uint32_t LEBIT = 0x1000 << (COND_LE & 15);
// internal opcodes
@@ -163,6 +171,11 @@ enum
#define PARAM2 (*inst[2].puint32)
#define PARAM3 (*inst[3].puint32)
+#define SPARAM0 (*inst[0].pint32)
+#define SPARAM1 (*inst[1].pint32)
+#define SPARAM2 (*inst[2].pint32)
+#define SPARAM3 (*inst[3].pint32)
+
#define DPARAM0 (*inst[0].puint64)
#define DPARAM1 (*inst[1].puint64)
#define DPARAM2 (*inst[2].puint64)
@@ -178,9 +191,15 @@ enum
#define FDPARAM2 (*inst[2].pdouble)
#define FDPARAM3 (*inst[3].pdouble)
+#define SPACEPARAM0 (*inst[0].space)
+#define SPACEPARAM1 (*inst[1].space)
+#define SPACEPARAM2 (*inst[2].space)
+#define SPACEPARAM3 (*inst[3].space)
+
// compute C and V flags for 32-bit add/subtract
#define FLAGS32_C_ADD(a,b) ((uint32_t)~(a) < (uint32_t)(b))
#define FLAGS32_C_SUB(a,b) ((uint32_t)(b) > (uint32_t)(a))
+#define FLAGS32_C_SUBC(a,b,c) (((uint32_t)(c) != 0 && ((uint32_t)(b) + (uint32_t)(c)) == 0) || (uint32_t)(b) + (uint32_t)(c) > (uint32_t)(a))
#define FLAGS32_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
#define FLAGS32_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 30) & FLAG_V)
@@ -188,10 +207,12 @@ enum
#define FLAGS32_NZ(v) ((((v) >> 28) & FLAG_S) | (((uint32_t)(v) == 0) << 2))
#define FLAGS32_NZCV_ADD(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_ADD(a,b) | FLAGS32_V_ADD(r,a,b))
#define FLAGS32_NZCV_SUB(r,a,b) (FLAGS32_NZ(r) | FLAGS32_C_SUB(a,b) | FLAGS32_V_SUB(r,a,b))
+#define FLAGS32_NZCV_SUBC(r,a,b,c) (FLAGS32_NZ(r) | FLAGS32_C_SUBC(a,b,c) | FLAGS32_V_SUB(r,a,b))
// compute C and V flags for 64-bit add/subtract
#define FLAGS64_C_ADD(a,b) ((uint64_t)~(a) < (uint64_t)(b))
#define FLAGS64_C_SUB(a,b) ((uint64_t)(b) > (uint64_t)(a))
+#define FLAGS64_C_SUBC(a,b,c) (((uint64_t)(c) != 0 && ((uint64_t)(b) + (uint64_t)(c)) == 0) || (uint64_t)(b) + (uint64_t)(c) > (uint64_t)(a))
#define FLAGS64_V_SUB(r,a,b) (((((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
#define FLAGS64_V_ADD(r,a,b) (((~((a) ^ (b)) & ((a) ^ (r))) >> 62) & FLAG_V)
@@ -199,6 +220,122 @@ enum
#define FLAGS64_NZ(v) ((((v) >> 60) & FLAG_S) | (((uint64_t)(v) == 0) << 2))
#define FLAGS64_NZCV_ADD(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_ADD(a,b) | FLAGS64_V_ADD(r,a,b))
#define FLAGS64_NZCV_SUB(r,a,b) (FLAGS64_NZ(r) | FLAGS64_C_SUB(a,b) | FLAGS64_V_SUB(r,a,b))
+#define FLAGS64_NZCV_SUBC(r,a,b,c) (FLAGS64_NZ(r) | FLAGS64_C_SUBC(a,b,c) | FLAGS64_V_SUB(r,a,b))
+
+
+//-------------------------------------------------
+// dmulu - perform a double-wide unsigned multiply
+//-------------------------------------------------
+
+inline int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags)
+{
+ // shortcut if we don't care about the high bits or the flags
+ if (&dstlo == &dsthi && !flags)
+ {
+ dstlo = src1 * src2;
+ return 0;
+ }
+
+ // fetch source values
+ uint64_t a = src1;
+ uint64_t b = src2;
+ if (a == 0 || b == 0)
+ {
+ dsthi = dstlo = 0;
+ return FLAG_Z;
+ }
+
+ // compute high and low parts first
+ uint64_t lo = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 0));
+ uint64_t hi = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 32));
+
+ // compute middle parts
+ uint64_t prevlo = lo;
+ uint64_t temp = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 0));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ prevlo = lo;
+ temp = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 32));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ // store the results
+ dsthi = hi;
+ dstlo = lo;
+ return ((hi >> 60) & FLAG_S) | ((hi != 0) << 1);
+}
+
+
+//-------------------------------------------------
+// dmuls - perform a double-wide signed multiply
+//-------------------------------------------------
+
+inline int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags)
+{
+ // shortcut if we don't care about the high bits or the flags
+ if (&dstlo == &dsthi && !flags)
+ {
+ dstlo = src1 * src2;
+ return 0;
+ }
+
+ // fetch absolute source values
+ uint64_t a = src1; if (int64_t(a) < 0) a = -a;
+ uint64_t b = src2; if (int64_t(b) < 0) b = -b;
+ if (a == 0 || b == 0)
+ {
+ dsthi = dstlo = 0;
+ return FLAG_Z;
+ }
+
+ // compute high and low parts first
+ uint64_t lo = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 0));
+ uint64_t hi = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 32));
+
+ // compute middle parts
+ uint64_t prevlo = lo;
+ uint64_t temp = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 0));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ prevlo = lo;
+ temp = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 32));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ // adjust for signage
+ if (int64_t(src1 ^ src2) < 0)
+ {
+ hi = ~hi + ((lo == 0) ? 1 : 0);
+ lo = ~lo + 1;
+ }
+
+ // store the results
+ dsthi = hi;
+ dstlo = lo;
+ return ((hi >> 60) & FLAG_S) | ((hi != (int64_t(lo) >> 63)) << 1);
+}
+
+inline uint32_t tzcount32(uint32_t value)
+{
+ for (int i = 0; i < 32; i++)
+ {
+ if (value & (uint32_t(1) << i))
+ return i;
+ }
+ return 32;
+}
+
+inline uint64_t tzcount64(uint64_t value)
+{
+ for (int i = 0; i < 64; i++)
+ {
+ if (value & (uint64_t(1) << i))
+ return i;
+ }
+ return 64;
+}
@@ -209,19 +346,20 @@ enum
// union to simplify accessing data via the instruction stream
union drcbec_instruction
{
- uint32_t i;
+ uint32_t i;
void * v;
char * c;
- uint8_t * puint8;
- int8_t * pint8;
- uint16_t * puint16;
- int16_t * pint16;
- uint32_t * puint32;
- int32_t * pint32;
- uint64_t * puint64;
- int64_t * pint64;
+ uint8_t * puint8;
+ int8_t * pint8;
+ uint16_t * puint16;
+ int16_t * pint16;
+ uint32_t * puint32;
+ int32_t * pint32;
+ uint64_t * puint64;
+ int64_t * pint64;
float * pfloat;
double * pdouble;
+ address_space * space;
void (*cfunc)(void *);
drcuml_machine_state *state;
const code_handle * handle;
@@ -230,6 +368,36 @@ union drcbec_instruction
};
+class drcbe_c : public drcbe_interface
+{
+public:
+ // construction/destruction
+ drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
+ virtual ~drcbe_c();
+
+ // required overrides
+ virtual void reset() override;
+ virtual int execute(uml::code_handle &entry) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) const noexcept override;
+ virtual void get_info(drcbe_info &info) const noexcept override;
+
+private:
+ // helpers
+ void output_parameter(drcbec_instruction **dstptr, void *immed, int immoffset, int size, const uml::parameter &param);
+ void fixup_label(void *parameter, drccodeptr labelcodeptr);
+
+ // internal state
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ drc_label_list m_labels; // label list
+ drc_label_fixup_delegate m_fixup_delegate; // precomputed delegate
+
+ static const uint32_t s_condition_map[32];
+ static uint64_t s_immediate_zero;
+};
+
+
//**************************************************************************
// GLOBAL VARIABLES
@@ -283,12 +451,12 @@ const uint32_t drcbe_c::s_condition_map[] =
// drcbe_c - constructor
//-------------------------------------------------
-drcbe_c::drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
- : drcbe_interface(drcuml, cache, device),
- m_hash(cache, modes, addrbits, ignorebits),
- m_map(cache, 0xaaaaaaaa55555555),
- m_labels(cache),
- m_fixup_delegate(&drcbe_c::fixup_label, this)
+drcbe_c::drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits) :
+ drcbe_interface(drcuml, cache, device),
+ m_hash(cache, modes, addrbits, ignorebits),
+ m_map(cache, 0xaaaaaaaa55555555),
+ m_labels(cache),
+ m_fixup_delegate(&drcbe_c::fixup_label, this)
{
}
@@ -320,13 +488,30 @@ void drcbe_c::reset()
void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
+ // Calculate the max possible number of register clears required
+ uint32_t regclears = 0;
+
+ for (int inum = 0; inum < numinst; inum++)
+ {
+ const instruction &inst = instlist[inum];
+
+ if (inst.size() != 4)
+ continue;
+
+ for (int pnum = 0; pnum < inst.numparams(); pnum++)
+ {
+ if (inst.is_param_out(pnum) && inst.param(pnum).is_int_register())
+ regclears++;
+ }
+ }
+
// tell all of our utility objects that a block is beginning
- m_hash.block_begin(block, instlist, numinst);
+ m_hash.block_begin(block, instlist, numinst + regclears);
m_labels.block_begin(block);
m_map.block_begin(block);
// begin codegen; fail if we can't
- drccodeptr *cachetop = m_cache.begin_codegen(numinst * sizeof(drcbec_instruction) * 4);
+ drccodeptr *cachetop = m_cache.begin_codegen((numinst + regclears) * sizeof(drcbec_instruction) * 4);
if (cachetop == nullptr)
block.abort();
@@ -334,11 +519,15 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
drcbec_instruction *base = (drcbec_instruction *)(((uintptr_t)*cachetop + sizeof(drcbec_instruction) - 1) & ~(sizeof(drcbec_instruction) - 1));
drcbec_instruction *dst = base;
+ bool ireg_needs_clearing[REG_I_COUNT];
+ std::fill(std::begin(ireg_needs_clearing), std::end(ireg_needs_clearing), true);
+
// generate code by copying the instructions and extracting immediates
for (int inum = 0; inum < numinst; inum++)
{
const instruction &inst = instlist[inum];
uint8_t psize[instruction::MAX_PARAMS];
+ int8_t immoffset[instruction::MAX_PARAMS];
// handle most instructions generally, but a few special cases
opcode_t opcode = inst.opcode();
@@ -359,9 +548,10 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
m_labels.set_codeptr(inst.param(0).label(), (drccodeptr)dst);
break;
- // ignore COMMENT and NOP opcodes
+ // ignore COMMENT, NOP, and BREAK opcodes
case OP_COMMENT:
case OP_NOP:
+ case OP_BREAK:
break;
// when we hit a MAPVAR opcode, log the change for the current PC
@@ -386,10 +576,14 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
psize[2] = 4;
if (opcode == OP_STORE || opcode == OP_FSTORE)
psize[1] = 4;
- if (opcode == OP_READ || opcode == OP_READM || opcode == OP_FREAD)
+ if (opcode == OP_READ || opcode == OP_FREAD)
psize[1] = psize[2] = 4;
- if (opcode == OP_WRITE || opcode == OP_WRITEM || opcode == OP_FWRITE)
+ if (opcode == OP_WRITE || opcode == OP_FWRITE)
psize[0] = psize[2] = 4;
+ if (opcode == OP_READM)
+ psize[1] = psize[3] = 4;
+ if (opcode == OP_WRITEM)
+ psize[0] = psize[3] = 4;
if (opcode == OP_SEXT && inst.param(2).size() != SIZE_QWORD)
psize[1] = 4;
if (opcode == OP_FTOINT)
@@ -399,35 +593,47 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
// pre-expand opcodes that encode size/scale in them
if (opcode == OP_LOAD)
- opcode = (opcode_t)(OP_LOAD1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_LOAD1 + inst.param(3).size() * 4 + inst.param(3).scale());
if (opcode == OP_LOADS)
- opcode = (opcode_t)(OP_LOADS1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_LOADS1 + inst.param(3).size() * 4 + inst.param(3).scale());
if (opcode == OP_STORE)
- opcode = (opcode_t)(OP_STORE1 + inst.param(3).size() * 4 + inst.param(3).scale());
+ opcode = opcode_t(OP_STORE1 + inst.param(3).size() * 4 + inst.param(3).scale());
if (opcode == OP_READ)
- opcode = (opcode_t)(OP_READ1 + inst.param(2).size());
+ opcode = opcode_t(OP_READ1 + inst.param(2).size());
if (opcode == OP_READM)
- opcode = (opcode_t)(OP_READM1 + inst.param(3).size());
+ opcode = opcode_t(OP_READM1 + inst.param(3).size());
if (opcode == OP_WRITE)
- opcode = (opcode_t)(OP_WRITE1 + inst.param(2).size());
+ opcode = opcode_t(OP_WRITE1 + inst.param(2).size());
if (opcode == OP_WRITEM)
- opcode = (opcode_t)(OP_WRITEM1 + inst.param(3).size());
+ opcode = opcode_t(OP_WRITEM1 + inst.param(3).size());
if (opcode == OP_SEXT)
- opcode = (opcode_t)(OP_SEXT1 + inst.param(2).size());
+ opcode = opcode_t(OP_SEXT1 + inst.param(2).size());
if (opcode == OP_FTOINT)
- opcode = (opcode_t)(OP_FTOI4T + 5 * (inst.param(2).size() - 2) + inst.param(3).rounding());
+ opcode = opcode_t(OP_FTOI4T + 5 * (inst.param(2).size() - 2) + inst.param(3).rounding());
if (opcode == OP_FFRINT)
- opcode = (opcode_t)(OP_FFRI4 + (inst.param(2).size() - 2));
+ opcode = opcode_t(OP_FFRI4 + (inst.param(2).size() - 2));
if (opcode == OP_FFRFLT)
- opcode = (opcode_t)(OP_FFRFS + (inst.param(2).size() - 2));
+ opcode = opcode_t(OP_FFRFS + (inst.param(2).size() - 2));
// count how many bytes of immediates we need
int immedbytes = 0;
for (int pnum = 0; pnum < inst.numparams(); pnum++)
- if (inst.param(pnum).is_mapvar() ||
- (inst.param(pnum).is_immediate() && inst.param(pnum).immediate() != 0) ||
- (inst.param(pnum).is_size_space() && inst.param(pnum).space() != 0))
+ {
+ auto const &param = inst.param(pnum);
+ if (param.is_mapvar() || (param.is_immediate() && (param.immediate() != 0)))
+ {
+ int const align = (psize[pnum] == 4) ? alignof(uint32_t) : alignof(uint64_t);
+ int const misalign = immedbytes % align;
+ if (misalign)
+ immedbytes += align - misalign;
+ immoffset[pnum] = immedbytes;
immedbytes += psize[pnum];
+ }
+ else
+ {
+ immoffset[pnum] = -1;
+ }
+ }
// compute how many instruction words we need for that
int immedwords = (immedbytes + sizeof(drcbec_instruction) - 1) / sizeof(drcbec_instruction);
@@ -440,10 +646,43 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
// output each of the parameters
for (int pnum = 0; pnum < inst.numparams(); pnum++)
- output_parameter(&dst, &immed, psize[pnum], inst.param(pnum));
+ output_parameter(&dst, immed, immoffset[pnum], psize[pnum], inst.param(pnum));
// point past the end of the immediates
dst += immedwords;
+
+ // Keep track of which registers had an 8 byte write and clear it the next time it's written
+ if (inst.size() == 4)
+ {
+ for (int pnum = 0; pnum < inst.numparams(); pnum++)
+ {
+ if (inst.is_param_out(pnum) && inst.param(pnum).is_int_register() && ireg_needs_clearing[inst.param(pnum).ireg() - REG_I0])
+ {
+ immedwords = (8 + sizeof(drcbec_instruction) - 1) / sizeof(drcbec_instruction);
+
+ (dst++)->i = MAKE_OPCODE_FULL(OP_AND, 8, 0, 0, 3 + immedwords);
+
+ immed = dst + 3;
+
+ output_parameter(&dst, immed, -1, 8, inst.param(pnum));
+ output_parameter(&dst, immed, -1, 8, inst.param(pnum));
+ output_parameter(&dst, immed, 0, 8, 0xffffffff);
+
+ dst += immedwords;
+
+ ireg_needs_clearing[inst.param(pnum).ireg() - REG_I0] = false;
+ }
+ }
+ }
+ else if (inst.size() == 8)
+ {
+ for (int pnum = 0; pnum < inst.numparams(); pnum++)
+ {
+ if (inst.is_param_out(pnum) && inst.param(pnum).is_int_register())
+ ireg_needs_clearing[inst.param(pnum).ireg() - REG_I0] = true;
+ }
+ }
+
break;
}
}
@@ -464,7 +703,7 @@ void drcbe_c::generate(drcuml_block &block, const instruction *instlist, uint32_
// exists in the hash table
//-------------------------------------------------
-bool drcbe_c::hash_exists(uint32_t mode, uint32_t pc)
+bool drcbe_c::hash_exists(uint32_t mode, uint32_t pc) const noexcept
{
return m_hash.code_exists(mode, pc);
}
@@ -475,7 +714,7 @@ bool drcbe_c::hash_exists(uint32_t mode, uint32_t pc)
// back-end implementation
//-------------------------------------------------
-void drcbe_c::get_info(drcbe_info &info)
+void drcbe_c::get_info(drcbe_info &info) const noexcept
{
info.direct_iregs = 0;
info.direct_fregs = 0;
@@ -516,7 +755,11 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_MAPVAR, 4, 0): // MAPVAR mapvar,value
// these opcodes should be processed at compile-time only
- fatalerror("Unexpected opcode\n");
+ fatalerror("Unexpected opcode %08x %d %d %d\n", opcode, OPCODE_GET_SHORT(opcode) >> 2, BIT(opcode, 0) ? 8 : 4, BIT(opcode, 1));
+
+ case MAKE_OPCODE_SHORT(OP_BREAK, 4, 0):
+ osd_break_into_debugger("break from drc");
+ break;
case MAKE_OPCODE_SHORT(OP_DEBUG, 4, 0): // DEBUG pc
if (m_device.machine().debug_flags & DEBUG_FLAG_CALL_HOOK)
@@ -606,7 +849,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_RECOVER, 4, 0): // RECOVER dst,mapvar
assert(sp > 0);
- PARAM0 = m_map.get_value((drccodeptr)callstack[0], MAPVAR_M0 + PARAM1);
+ PARAM0 = m_map.get_value(drccodeptr(callstack[0] - 1), PARAM1);
break;
@@ -628,6 +871,11 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = flags & PARAM1;
break;
+ case MAKE_OPCODE_SHORT(OP_SETFLGS, 4, 0): // SETFLGS src
+ case MAKE_OPCODE_SHORT(OP_SETFLGS, 4, 1):
+ flags = PARAM0;
+ break;
+
case MAKE_OPCODE_SHORT(OP_SAVE, 4, 0): // SAVE dst
*inst[0].state = m_state;
inst[0].state->flags = flags;
@@ -643,190 +891,199 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Integer Operations -----------------------
case MAKE_OPCODE_SHORT(OP_LOAD1, 4, 0): // LOAD dst,base,index,BYTE
- PARAM0 = inst[1].puint8[PARAM2];
+ PARAM0 = inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x2, 4, 0): // LOAD dst,base,index,BYTE_x2
- PARAM0 = *(uint8_t *)&inst[1].puint16[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x4, 4, 0): // LOAD dst,base,index,BYTE_x4
- PARAM0 = *(uint8_t *)&inst[1].puint32[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x8, 4, 0): // LOAD dst,base,index,BYTE_x8
- PARAM0 = *(uint8_t *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint8_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x1, 4, 0): // LOAD dst,base,index,WORD_x1
- PARAM0 = *(uint16_t *)&inst[1].puint8[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2, 4, 0): // LOAD dst,base,index,WORD
- PARAM0 = inst[1].puint16[PARAM2];
+ PARAM0 = inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x4, 4, 0): // LOAD dst,base,index,WORD_x4
- PARAM0 = *(uint16_t *)&inst[1].puint32[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x8, 4, 0): // LOAD dst,base,index,WORD_x8
- PARAM0 = *(uint16_t *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint16_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x1, 4, 0): // LOAD dst,base,index,DWORD_x1
- PARAM0 = *(uint32_t *)&inst[1].puint8[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x2, 4, 0): // LOAD dst,base,index,DWORD_x2
- PARAM0 = *(uint32_t *)&inst[1].puint16[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4, 4, 0): // LOAD dst,base,index,DWORD
- PARAM0 = inst[1].puint32[PARAM2];
+ PARAM0 = inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x8, 4, 0): // LOAD dst,base,index,DWORD_x8
- PARAM0 = *(uint32_t *)&inst[1].puint64[PARAM2];
+ PARAM0 = *(uint32_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1, 4, 0): // LOADS dst,base,index,BYTE
- PARAM0 = inst[1].pint8[PARAM2];
+ PARAM0 = inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x2, 4, 0): // LOADS dst,base,index,BYTE_x2
- PARAM0 = *(int8_t *)&inst[1].pint16[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x4, 4, 0): // LOADS dst,base,index,BYTE_x4
- PARAM0 = *(int8_t *)&inst[1].pint32[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x8, 4, 0): // LOADS dst,base,index,BYTE_x8
- PARAM0 = *(int8_t *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int8_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x1, 4, 0): // LOADS dst,base,index,WORD_x1
- PARAM0 = *(int16_t *)&inst[1].pint8[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2, 4, 0): // LOADS dst,base,index,WORD
- PARAM0 = inst[1].pint16[PARAM2];
+ PARAM0 = inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x4, 4, 0): // LOADS dst,base,index,WORD_x4
- PARAM0 = *(int16_t *)&inst[1].pint32[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x8, 4, 0): // LOADS dst,base,index,WORD_x8
- PARAM0 = *(int16_t *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int16_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x1, 4, 0): // LOADS dst,base,index,DWORD_x1
- PARAM0 = *(int32_t *)&inst[1].pint8[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x2, 4, 0): // LOADS dst,base,index,DWORD_x2
- PARAM0 = *(int32_t *)&inst[1].pint16[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4, 4, 0): // LOADS dst,base,index,DWORD
- PARAM0 = inst[1].pint32[PARAM2];
+ PARAM0 = inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x8, 4, 0): // LOADS dst,base,index,DWORD_x8
- PARAM0 = *(int32_t *)&inst[1].pint64[PARAM2];
+ PARAM0 = *(int32_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_STORE1, 4, 0): // STORE dst,base,index,BYTE
- inst[0].puint8[PARAM1] = PARAM2;
+ inst[0].puint8[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x2, 4, 0): // STORE dst,base,index,BYTE_x2
- *(uint8_t *)&inst[0].puint16[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint16[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x4, 4, 0): // STORE dst,base,index,BYTE_x4
- *(uint8_t *)&inst[0].puint32[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint32[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x8, 4, 0): // STORE dst,base,index,BYTE_x8
- *(uint8_t *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint8_t *)&inst[0].puint64[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x1, 4, 0): // STORE dst,base,index,WORD_x1
- *(uint16_t *)&inst[0].puint8[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint8[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2, 4, 0): // STORE dst,base,index,WORD
- inst[0].puint16[PARAM1] = PARAM2;
+ inst[0].puint16[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x4, 4, 0): // STORE dst,base,index,WORD_x4
- *(uint16_t *)&inst[0].puint32[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint32[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x8, 4, 0): // STORE dst,base,index,WORD_x8
- *(uint16_t *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint16_t *)&inst[0].puint64[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x1, 4, 0): // STORE dst,base,index,DWORD_x1
- *(uint32_t *)&inst[0].puint8[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint8[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x2, 4, 0): // STORE dst,base,index,DWORD_x2
- *(uint32_t *)&inst[0].puint16[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint16[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4, 4, 0): // STORE dst,base,index,DWORD
- inst[0].puint32[PARAM1] = PARAM2;
+ inst[0].puint32[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x8, 4, 0): // STORE dst,base,index,DWORD_x8
- *(uint32_t *)&inst[0].puint64[PARAM1] = PARAM2;
+ *(uint32_t *)&inst[0].puint64[SPARAM1] = PARAM2;
break;
case MAKE_OPCODE_SHORT(OP_READ1, 4, 0): // READ dst,src1,space_BYTE
- PARAM0 = m_space[PARAM2]->read_byte(PARAM1);
+ PARAM0 = SPACEPARAM2.read_byte(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_READ2, 4, 0): // READ dst,src1,space_WORD
- PARAM0 = m_space[PARAM2]->read_word(PARAM1);
+ PARAM0 = SPACEPARAM2.read_word(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_READ4, 4, 0): // READ dst,src1,space_DWORD
- PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
+ PARAM0 = SPACEPARAM2.read_dword(PARAM1);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_READM1, 4, 0): // READM dst,src1,mask,space_BYTE
+ PARAM0 = SPACEPARAM3.read_byte(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_READM2, 4, 0): // READM dst,src1,mask,space_WORD
- PARAM0 = m_space[PARAM3]->read_word(PARAM1, PARAM2);
+ PARAM0 = SPACEPARAM3.read_word(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_READM4, 4, 0): // READM dst,src1,mask,space_DWORD
- PARAM0 = m_space[PARAM3]->read_dword(PARAM1, PARAM2);
+ PARAM0 = SPACEPARAM3.read_dword(PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITE1, 4, 0): // WRITE dst,src1,space_BYTE
- m_space[PARAM2]->write_byte(PARAM0, PARAM1);
+ SPACEPARAM2.write_byte(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_WRITE2, 4, 0): // WRITE dst,src1,space_WORD
- m_space[PARAM2]->write_word(PARAM0, PARAM1);
+ SPACEPARAM2.write_word(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_WRITE4, 4, 0): // WRITE dst,src1,space_DWORD
- m_space[PARAM2]->write_dword(PARAM0, PARAM1);
+ SPACEPARAM2.write_dword(PARAM0, PARAM1);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_WRITEM1, 4, 0): // WRITEM dst,src1,mask,space_BYTE
+ SPACEPARAM3.write_byte(PARAM0, PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITEM2, 4, 0): // WRITEM dst,src1,mask,space_WORD
- m_space[PARAM3]->write_word(PARAM0, PARAM1, PARAM2);
+ SPACEPARAM3.write_word(PARAM0, PARAM1, PARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITEM4, 4, 0): // WRITEM dst,src1,mask,space_DWORD
- m_space[PARAM3]->write_dword(PARAM0, PARAM1, PARAM2);
+ SPACEPARAM3.write_dword(PARAM0, PARAM1, PARAM2);
break;
- case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1): // CARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 4, 0): // CARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 4, 1):
flags = (flags & ~FLAG_C) | ((PARAM0 >> (PARAM1 & 31)) & FLAG_C);
break;
@@ -930,33 +1187,23 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SUBB, 4, 1):
temp32 = PARAM1 - PARAM2 - (flags & FLAG_C);
- temp64 = (uint64_t)PARAM1 - (uint64_t)PARAM2 - (uint64_t)(flags & FLAG_C);
- if (PARAM2 + 1 != 0)
- flags = FLAGS32_NZCV_SUB(temp32, PARAM1, PARAM2 + (flags & FLAG_C));
- else
- {
- flags = FLAGS32_NZCV_SUB(temp32, PARAM1 - (flags & FLAG_C), PARAM2);
- flags &= ~(FLAG_C | FLAG_V);
- flags |= ((temp64>>32) & 1) ? FLAG_C : 0;
- flags |= (((PARAM1) ^ (PARAM2)) & ((PARAM1) ^ (temp64)) & 0x80000000) ? FLAG_V : 0;
- }
+ flags = FLAGS32_NZCV_SUBC(temp32, PARAM1, PARAM2, flags & FLAG_C);
PARAM0 = temp32;
break;
case MAKE_OPCODE_SHORT(OP_CMP, 4, 1): // CMP src1,src2[,f]
temp32 = PARAM0 - PARAM1;
flags = FLAGS32_NZCV_SUB(temp32, PARAM0, PARAM1);
-// printf("CMP: %08x - %08x = flags %x\n", PARAM0, PARAM1, flags);
break;
case MAKE_OPCODE_SHORT(OP_MULU, 4, 0): // MULU dst,edst,src1,src2[,f]
- temp64 = (uint64_t)(uint32_t)PARAM2 * (uint64_t)(uint32_t)PARAM3;
+ temp64 = mulu_32x32(PARAM2, PARAM3);
PARAM1 = temp64 >> 32;
PARAM0 = (uint32_t)temp64;
break;
case MAKE_OPCODE_SHORT(OP_MULU, 4, 1):
- temp64 = (uint64_t)(uint32_t)PARAM2 * (uint64_t)(uint32_t)PARAM3;
+ temp64 = mulu_32x32(PARAM2, PARAM3);
flags = FLAGS64_NZ(temp64);
PARAM1 = temp64 >> 32;
PARAM0 = (uint32_t)temp64;
@@ -964,19 +1211,46 @@ int drcbe_c::execute(code_handle &entry)
flags |= FLAG_V;
break;
+ case MAKE_OPCODE_SHORT(OP_MULULW, 4, 0): // MULULW dst,src1,src2[,f]
+ temp64 = mulu_32x32(PARAM1, PARAM2);
+ PARAM0 = (uint32_t)temp64;
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_MULULW, 4, 1):
+ temp64 = mulu_32x32(PARAM1, PARAM2);
+ temp32 = (uint32_t)temp64;
+ flags = FLAGS32_NZ(temp32);
+ PARAM0 = temp32;
+ if (temp64 > temp32)
+ flags |= FLAG_V;
+ break;
+
case MAKE_OPCODE_SHORT(OP_MULS, 4, 0): // MULS dst,edst,src1,src2[,f]
- temp64 = (int64_t)(int32_t)PARAM2 * (int64_t)(int32_t)PARAM3;
+ temp64 = mul_32x32(PARAM2, PARAM3);
PARAM1 = temp64 >> 32;
PARAM0 = (uint32_t)temp64;
break;
case MAKE_OPCODE_SHORT(OP_MULS, 4, 1):
- temp64 = (int64_t)(int32_t)PARAM2 * (int64_t)(int32_t)PARAM3;
- temp32 = (int32_t)temp64;
- flags = FLAGS32_NZ(temp32);
+ temp64 = mul_32x32(PARAM2, PARAM3);
+ flags = FLAGS64_NZ(temp64);
PARAM1 = temp64 >> 32;
PARAM0 = (uint32_t)temp64;
- if (temp64 != (int32_t)temp64)
+ if ((int64_t)temp64 != (int32_t)temp64)
+ flags |= FLAG_V;
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_MULSLW, 4, 0): // MULSLW dst,src1,src2[,f]
+ temp64 = mul_32x32(PARAM1, PARAM2);
+ PARAM0 = (int32_t)temp64;
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_MULSLW, 4, 1):
+ temp64 = mul_32x32(PARAM1, PARAM2);
+ temp32 = (int32_t)temp64;
+ flags = FLAGS32_NZ(temp32);
+ PARAM0 = temp32;
+ if ((int64_t)temp64 != (int32_t)temp64)
flags |= FLAG_V;
break;
@@ -1032,7 +1306,10 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = temp32;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 4, 1): // TEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 4, 0): // TEST src1,src2[,f]
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_TEST, 4, 1):
temp32 = PARAM0 & PARAM1;
flags = FLAGS32_NZ(temp32);
break;
@@ -1084,8 +1361,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_BSWAP, 4, 1):
temp32 = PARAM1;
- flags = FLAGS32_NZ(temp32);
PARAM0 = swapendian_int32(temp32);
+ flags = FLAGS32_NZ(PARAM0);
break;
case MAKE_OPCODE_SHORT(OP_SHL, 4, 0): // SHL dst,src,count[,f]
@@ -1095,11 +1372,9 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SHL, 4, 1):
shift = PARAM2 & 31;
temp32 = PARAM1 << shift;
+ flags = FLAGS32_NZ(temp32);
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
- }
PARAM0 = temp32;
break;
@@ -1110,11 +1385,9 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SHR, 4, 1):
shift = PARAM2 & 31;
temp32 = PARAM1 >> shift;
+ flags = FLAGS32_NZ(temp32);
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
- }
PARAM0 = temp32;
break;
@@ -1125,11 +1398,9 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SAR, 4, 1):
shift = PARAM2 & 31;
temp32 = (int32_t)PARAM1 >> shift;
+ flags = FLAGS32_NZ(temp32);
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
- }
PARAM0 = temp32;
break;
@@ -1140,11 +1411,9 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_ROL, 4, 1):
shift = PARAM2 & 31;
temp32 = rotl_32(PARAM1, shift);
+ flags = FLAGS32_NZ(temp32);
if (shift != 0)
- {
- flags = FLAGS32_NZ(temp32);
flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
- }
PARAM0 = temp32;
break;
@@ -1154,6 +1423,8 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = (PARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (PARAM1 >> (33 - shift));
else if (shift == 1)
PARAM0 = (PARAM1 << shift) | (flags & FLAG_C);
+ else
+ PARAM0 = PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_ROLC, 4, 1):
@@ -1164,8 +1435,7 @@ int drcbe_c::execute(code_handle &entry)
temp32 = (PARAM1 << shift) | (flags & FLAG_C);
else
temp32 = PARAM1;
- flags = FLAGS32_NZ(temp32);
- if (shift != 0) flags |= ((PARAM1 << (shift - 1)) >> 31) & FLAG_C;
+ flags = FLAGS32_NZ(temp32) | (((shift != 0) ? (PARAM1 >> (32 - shift)) : flags) & FLAG_C);
PARAM0 = temp32;
break;
@@ -1177,7 +1447,8 @@ int drcbe_c::execute(code_handle &entry)
shift = PARAM2 & 31;
temp32 = rotr_32(PARAM1, shift);
flags = FLAGS32_NZ(temp32);
- if (shift != 0) flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
+ if (shift != 0)
+ flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
PARAM0 = temp32;
break;
@@ -1187,6 +1458,8 @@ int drcbe_c::execute(code_handle &entry)
PARAM0 = (PARAM1 >> shift) | (((flags & FLAG_C) << 31) >> (shift - 1)) | (PARAM1 << (33 - shift));
else if (shift == 1)
PARAM0 = (PARAM1 >> shift) | ((flags & FLAG_C) << 31);
+ else
+ PARAM0 = PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_RORC, 4, 1):
@@ -1197,8 +1470,7 @@ int drcbe_c::execute(code_handle &entry)
temp32 = (PARAM1 >> shift) | ((flags & FLAG_C) << 31);
else
temp32 = PARAM1;
- flags = FLAGS32_NZ(temp32);
- if (shift != 0) flags |= (PARAM1 >> (shift - 1)) & FLAG_C;
+ flags = FLAGS32_NZ(temp32) | (((shift != 0) ? (PARAM1 >> (shift - 1)) : flags) & FLAG_C);
PARAM0 = temp32;
break;
@@ -1206,254 +1478,263 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 64-Bit Integer Operations -----------------------
case MAKE_OPCODE_SHORT(OP_LOAD1, 8, 0): // DLOAD dst,base,index,BYTE
- DPARAM0 = inst[1].puint8[PARAM2];
+ DPARAM0 = inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x2, 8, 0): // DLOAD dst,base,index,BYTE_x2
- DPARAM0 = *(uint8_t *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x4, 8, 0): // DLOAD dst,base,index,BYTE_x4
- DPARAM0 = *(uint8_t *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD1x8, 8, 0): // DLOAD dst,base,index,BYTE_x8
- DPARAM0 = *(uint8_t *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint8_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x1, 8, 0): // DLOAD dst,base,index,WORD_x1
- DPARAM0 = *(uint16_t *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2, 8, 0): // DLOAD dst,base,index,WORD
- DPARAM0 = inst[1].puint16[PARAM2];
+ DPARAM0 = inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x4, 8, 0): // DLOAD dst,base,index,WORD_x4
- DPARAM0 = *(uint16_t *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD2x8, 8, 0): // DLOAD dst,base,index,WORD_x8
- DPARAM0 = *(uint16_t *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint16_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x1, 8, 0): // DLOAD dst,base,index,DWORD_x1
- DPARAM0 = *(uint32_t *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x2, 8, 0): // DLOAD dst,base,index,DWORD_x2
- DPARAM0 = *(uint32_t *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4, 8, 0): // DLOAD dst,base,index,DWORD
- DPARAM0 = inst[1].puint32[PARAM2];
+ DPARAM0 = inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD4x8, 8, 0): // DLOAD dst,base,index,DWORD_x8
- DPARAM0 = *(uint32_t *)&inst[1].puint64[PARAM2];
+ DPARAM0 = *(uint32_t *)&inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x1, 8, 0): // DLOAD dst,base,index,QWORD_x1
- DPARAM0 = *(uint64_t *)&inst[1].puint8[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x2, 8, 0): // DLOAD dst,base,index,QWORD_x2
- DPARAM0 = *(uint64_t *)&inst[1].puint16[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8x4, 8, 0): // DLOAD dst,base,index,QWORD_x4
- DPARAM0 = *(uint64_t *)&inst[1].puint32[PARAM2];
+ DPARAM0 = *(uint64_t *)&inst[1].puint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOAD8, 8, 0): // DLOAD dst,base,index,QWORD
- DPARAM0 = inst[1].puint64[PARAM2];
+ DPARAM0 = inst[1].puint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1, 8, 0): // DLOADS dst,base,index,BYTE
- DPARAM0 = inst[1].pint8[PARAM2];
+ DPARAM0 = inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x2, 8, 0): // DLOADS dst,base,index,BYTE_x2
- DPARAM0 = *(int8_t *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x4, 8, 0): // DLOADS dst,base,index,BYTE_x4
- DPARAM0 = *(int8_t *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS1x8, 8, 0): // DLOADS dst,base,index,BYTE_x8
- DPARAM0 = *(int8_t *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int8_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x1, 8, 0): // DLOADS dst,base,index,WORD_x1
- DPARAM0 = *(int16_t *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2, 8, 0): // DLOADS dst,base,index,WORD
- DPARAM0 = inst[1].pint16[PARAM2];
+ DPARAM0 = inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x4, 8, 0): // DLOADS dst,base,index,WORD_x4
- DPARAM0 = *(int16_t *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS2x8, 8, 0): // DLOADS dst,base,index,WORD_x8
- DPARAM0 = *(int16_t *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int16_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x1, 8, 0): // DLOADS dst,base,index,DWORD_x1
- DPARAM0 = *(int32_t *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x2, 8, 0): // DLOADS dst,base,index,DWORD_x2
- DPARAM0 = *(int32_t *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4, 8, 0): // DLOADS dst,base,index,DWORD
- DPARAM0 = inst[1].pint32[PARAM2];
+ DPARAM0 = inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS4x8, 8, 0): // DLOADS dst,base,index,DWORD_x8
- DPARAM0 = *(int32_t *)&inst[1].pint64[PARAM2];
+ DPARAM0 = *(int32_t *)&inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x1, 8, 0): // DLOADS dst,base,index,QWORD_x1
- DPARAM0 = *(int64_t *)&inst[1].pint8[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint8[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x2, 8, 0): // DLOADS dst,base,index,QWORD_x2
- DPARAM0 = *(int64_t *)&inst[1].pint16[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint16[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8x4, 8, 0): // DLOADS dst,base,index,QWORD_x4
- DPARAM0 = *(int64_t *)&inst[1].pint32[PARAM2];
+ DPARAM0 = *(int64_t *)&inst[1].pint32[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_LOADS8, 8, 0): // DLOADS dst,base,index,QWORD
- DPARAM0 = inst[1].pint64[PARAM2];
+ DPARAM0 = inst[1].pint64[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_STORE1, 8, 0): // DSTORE dst,base,index,BYTE
- inst[0].puint8[PARAM1] = DPARAM2;
+ inst[0].puint8[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x2, 8, 0): // DSTORE dst,base,index,BYTE_x2
- *(uint8_t *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint16[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x4, 8, 0): // DSTORE dst,base,index,BYTE_x4
- *(uint8_t *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint32[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE1x8, 8, 0): // DSTORE dst,base,index,BYTE_x8
- *(uint8_t *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint8_t *)&inst[0].puint64[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x1, 8, 0): // DSTORE dst,base,index,WORD_x1
- *(uint16_t *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint8[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2, 8, 0): // DSTORE dst,base,index,WORD
- inst[0].puint16[PARAM1] = DPARAM2;
+ inst[0].puint16[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x4, 8, 0): // DSTORE dst,base,index,WORD_x4
- *(uint16_t *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint32[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE2x8, 8, 0): // DSTORE dst,base,index,WORD_x8
- *(uint16_t *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint16_t *)&inst[0].puint64[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x1, 8, 0): // DSTORE dst,base,index,DWORD_x1
- *(uint32_t *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint8[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x2, 8, 0): // DSTORE dst,base,index,DWORD_x2
- *(uint32_t *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint16[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4, 8, 0): // DSTORE dst,base,index,DWORD
- inst[0].puint32[PARAM1] = DPARAM2;
+ inst[0].puint32[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE4x8, 8, 0): // DSTORE dst,base,index,DWORD_x8
- *(uint32_t *)&inst[0].puint64[PARAM1] = DPARAM2;
+ *(uint32_t *)&inst[0].puint64[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x1, 8, 0): // DSTORE dst,base,index,QWORD_x1
- *(uint64_t *)&inst[0].puint8[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint8[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x2, 8, 0): // DSTORE dst,base,index,QWORD_x2
- *(uint64_t *)&inst[0].puint16[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint16[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8x4, 8, 0): // DSTORE dst,base,index,QWORD_x4
- *(uint64_t *)&inst[0].puint32[PARAM1] = DPARAM2;
+ *(uint64_t *)&inst[0].puint32[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_STORE8, 8, 0): // DSTORE dst,base,index,QWORD
- inst[0].puint64[PARAM1] = DPARAM2;
+ inst[0].puint64[SPARAM1] = DPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_READ1, 8, 0): // DREAD dst,src1,space_BYTE
- DPARAM0 = m_space[PARAM2]->read_byte(PARAM1);
+ DPARAM0 = SPACEPARAM2.read_byte(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_READ2, 8, 0): // DREAD dst,src1,space_WORD
- DPARAM0 = m_space[PARAM2]->read_word(PARAM1);
+ DPARAM0 = SPACEPARAM2.read_word(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_READ4, 8, 0): // DREAD dst,src1,space_DWORD
- DPARAM0 = m_space[PARAM2]->read_dword(PARAM1);
+ DPARAM0 = SPACEPARAM2.read_dword(PARAM1);
break;
- case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QOWRD
- DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
+ case MAKE_OPCODE_SHORT(OP_READ8, 8, 0): // DREAD dst,src1,space_QWORD
+ DPARAM0 = SPACEPARAM2.read_qword(PARAM1);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_READM1, 8, 0): // DREADM dst,src1,mask,space_BYTE
+ DPARAM0 = SPACEPARAM3.read_byte(PARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_READM2, 8, 0): // DREADM dst,src1,mask,space_WORD
- DPARAM0 = m_space[PARAM3]->read_word(PARAM1, PARAM2);
+ DPARAM0 = SPACEPARAM3.read_word(PARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_READM4, 8, 0): // DREADM dst,src1,mask,space_DWORD
- DPARAM0 = m_space[PARAM3]->read_dword(PARAM1, PARAM2);
+ DPARAM0 = SPACEPARAM3.read_dword(PARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_READM8, 8, 0): // DREADM dst,src1,mask,space_QWORD
- DPARAM0 = m_space[PARAM3]->read_qword(PARAM1, PARAM2);
+ DPARAM0 = SPACEPARAM3.read_qword(PARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITE1, 8, 0): // DWRITE dst,src1,space_BYTE
- m_space[PARAM2]->write_byte(PARAM0, PARAM1);
+ SPACEPARAM2.write_byte(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_WRITE2, 8, 0): // DWRITE dst,src1,space_WORD
- m_space[PARAM2]->write_word(PARAM0, PARAM1);
+ SPACEPARAM2.write_word(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_WRITE4, 8, 0): // DWRITE dst,src1,space_DWORD
- m_space[PARAM2]->write_dword(PARAM0, PARAM1);
+ SPACEPARAM2.write_dword(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_WRITE8, 8, 0): // DWRITE dst,src1,space_QWORD
- m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
+ SPACEPARAM2.write_qword(PARAM0, DPARAM1);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_WRITEM1, 8, 0): // DWRITEM dst,src1,mask,space_BYTE
+ SPACEPARAM3.write_byte(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITEM2, 8, 0): // DWRITEM dst,src1,mask,space_WORD
- m_space[PARAM3]->write_word(PARAM0, DPARAM1, DPARAM2);
+ SPACEPARAM3.write_word(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITEM4, 8, 0): // DWRITEM dst,src1,mask,space_DWORD
- m_space[PARAM3]->write_dword(PARAM0, DPARAM1, DPARAM2);
+ SPACEPARAM3.write_dword(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_WRITEM8, 8, 0): // DWRITEM dst,src1,mask,space_QWORD
- m_space[PARAM3]->write_qword(PARAM0, DPARAM1, DPARAM2);
+ SPACEPARAM3.write_qword(PARAM0, DPARAM1, DPARAM2);
break;
case MAKE_OPCODE_SHORT(OP_CARRY, 8, 0): // DCARRY src,bitnum
+ case MAKE_OPCODE_SHORT(OP_CARRY, 8, 1):
flags = (flags & ~FLAG_C) | ((DPARAM0 >> (DPARAM1 & 63)) & FLAG_C);
break;
@@ -1559,10 +1840,7 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SUBB, 8, 1):
temp64 = DPARAM1 - DPARAM2 - (flags & FLAG_C);
- if (DPARAM2 + 1 != 0)
- flags = FLAGS64_NZCV_SUB(temp64, DPARAM1, DPARAM2 + (flags & FLAG_C));
- else
- flags = FLAGS64_NZCV_SUB(temp64, DPARAM1 - (flags & FLAG_C), DPARAM2);
+ flags = FLAGS64_NZCV_SUBC(temp64, DPARAM1, DPARAM2, flags & FLAG_C);
DPARAM0 = temp64;
break;
@@ -1579,6 +1857,15 @@ int drcbe_c::execute(code_handle &entry)
flags = dmulu(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, true);
break;
+ case MAKE_OPCODE_SHORT(OP_MULULW, 8, 0): // DMULULW dst,src1,src2[,f]
+ dmulu(*inst[0].puint64, *inst[0].puint64, DPARAM1, DPARAM2, false);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_MULULW, 8, 1):
+ flags = dmulu(*inst[0].puint64, *inst[0].puint64, DPARAM1, DPARAM2, true);
+ flags = FLAGS64_NZ(DPARAM0) | (flags & FLAG_V);
+ break;
+
case MAKE_OPCODE_SHORT(OP_MULS, 8, 0): // DMULS dst,edst,src1,src2[,f]
dmuls(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, false);
break;
@@ -1587,6 +1874,15 @@ int drcbe_c::execute(code_handle &entry)
flags = dmuls(*inst[0].puint64, *inst[1].puint64, DPARAM2, DPARAM3, true);
break;
+ case MAKE_OPCODE_SHORT(OP_MULSLW, 8, 0): // DMULSLW dst,src1,src2[,f]
+ dmuls(*inst[0].puint64, *inst[0].puint64, DPARAM1, DPARAM2, false);
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_MULSLW, 8, 1):
+ flags = dmuls(*inst[0].puint64, *inst[0].puint64, DPARAM1, DPARAM2, true);
+ flags = FLAGS64_NZ(DPARAM0) | (flags & FLAG_V);
+ break;
+
case MAKE_OPCODE_SHORT(OP_DIVU, 8, 0): // DDIVU dst,edst,src1,src2[,f]
if (DPARAM3 != 0)
{
@@ -1639,7 +1935,10 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = temp64;
break;
- case MAKE_OPCODE_SHORT(OP_TEST, 8, 1): // DTEST src1,src2[,f]
+ case MAKE_OPCODE_SHORT(OP_TEST, 8, 0): // DTEST src1,src2[,f]
+ break;
+
+ case MAKE_OPCODE_SHORT(OP_TEST, 8, 1):
temp64 = DPARAM0 & DPARAM1;
flags = FLAGS64_NZ(temp64);
break;
@@ -1691,8 +1990,8 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_BSWAP, 8, 1):
temp64 = DPARAM1;
- flags = FLAGS64_NZ(temp64);
DPARAM0 = swapendian_int64(temp64);
+ flags = FLAGS64_NZ(DPARAM0);
break;
case MAKE_OPCODE_SHORT(OP_SHL, 8, 0): // DSHL dst,src,count[,f]
@@ -1703,7 +2002,8 @@ int drcbe_c::execute(code_handle &entry)
shift = DPARAM2 & 63;
temp64 = DPARAM1 << shift;
flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
+ if (shift != 0)
+ flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
DPARAM0 = temp64;
break;
@@ -1715,7 +2015,8 @@ int drcbe_c::execute(code_handle &entry)
shift = DPARAM2 & 63;
temp64 = DPARAM1 >> shift;
flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
+ if (shift != 0)
+ flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
DPARAM0 = temp64;
break;
@@ -1725,9 +2026,10 @@ int drcbe_c::execute(code_handle &entry)
case MAKE_OPCODE_SHORT(OP_SAR, 8, 1):
shift = DPARAM2 & 63;
- temp64 = (int32_t)DPARAM1 >> shift;
+ temp64 = (int64_t)DPARAM1 >> shift;
flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
+ if (shift != 0)
+ flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
DPARAM0 = temp64;
break;
@@ -1739,7 +2041,8 @@ int drcbe_c::execute(code_handle &entry)
shift = DPARAM2 & 63;
temp64 = rotl_64(DPARAM1, shift);
flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
+ if (shift != 0)
+ flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
DPARAM0 = temp64;
break;
@@ -1749,6 +2052,8 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = (DPARAM1 << shift) | ((flags & FLAG_C) << (shift - 1)) | (DPARAM1 >> (65 - shift));
else if (shift == 1)
DPARAM0 = (DPARAM1 << shift) | (flags & FLAG_C);
+ else
+ DPARAM0 = DPARAM1;
break;
case MAKE_OPCODE_SHORT(OP_ROLC, 8, 1):
@@ -1759,8 +2064,7 @@ int drcbe_c::execute(code_handle &entry)
temp64 = (DPARAM1 << shift) | (flags & FLAG_C);
else
temp64 = DPARAM1;
- flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= ((DPARAM1 << (shift - 1)) >> 63) & FLAG_C;
+ flags = FLAGS64_NZ(temp64) | (((shift != 0) ? (DPARAM1 >> (64 - shift)) : flags) & FLAG_C);
DPARAM0 = temp64;
break;
@@ -1772,7 +2076,8 @@ int drcbe_c::execute(code_handle &entry)
shift = DPARAM2 & 63;
temp64 = rotr_64(DPARAM1, shift);
flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
+ if (shift != 0)
+ flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
DPARAM0 = temp64;
break;
@@ -1782,6 +2087,8 @@ int drcbe_c::execute(code_handle &entry)
DPARAM0 = (DPARAM1 >> shift) | ((((uint64_t)flags & FLAG_C) << 63) >> (shift - 1)) | (DPARAM1 << (65 - shift));
else if (shift == 1)
DPARAM0 = (DPARAM1 >> shift) | (((uint64_t)flags & FLAG_C) << 63);
+ else
+ DPARAM0 = DPARAM1;
break;
case MAKE_OPCODE_SHORT(OP_RORC, 8, 1):
@@ -1792,8 +2099,7 @@ int drcbe_c::execute(code_handle &entry)
temp64 = (DPARAM1 >> shift) | (((uint64_t)flags & FLAG_C) << 63);
else
temp64 = DPARAM1;
- flags = FLAGS64_NZ(temp64);
- if (shift != 0) flags |= (DPARAM1 >> (shift - 1)) & FLAG_C;
+ flags = FLAGS64_NZ(temp64) | (((shift != 0) ? (DPARAM1 >> (shift - 1)) : flags) & FLAG_C);
DPARAM0 = temp64;
break;
@@ -1801,19 +2107,19 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 32-Bit Floating Point Operations -----------------------
case MAKE_OPCODE_SHORT(OP_FLOAD, 4, 0): // FSLOAD dst,base,index
- FSPARAM0 = inst[1].pfloat[PARAM2];
+ FSPARAM0 = inst[1].pfloat[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_FSTORE, 4, 0): // FSSTORE dst,base,index
- inst[0].pfloat[PARAM1] = FSPARAM2;
+ inst[0].pfloat[SPARAM1] = FSPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_FREAD, 4, 0): // FSREAD dst,src1,space
- PARAM0 = m_space[PARAM2]->read_dword(PARAM1);
+ PARAM0 = SPACEPARAM2.read_dword(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_FWRITE, 4, 0): // FSWRITE dst,src1,space
- m_space[PARAM2]->write_dword(PARAM0, PARAM1);
+ SPACEPARAM2.write_dword(PARAM0, PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_FMOV, 4, 1): // FSMOV dst,src[,c]
@@ -1822,7 +2128,7 @@ int drcbe_c::execute(code_handle &entry)
[[fallthrough]];
case MAKE_OPCODE_SHORT(OP_FMOV, 4, 0):
- FSPARAM0 = FSPARAM1;
+ PARAM0 = PARAM1;
break;
case MAKE_OPCODE_SHORT(OP_FTOI4T, 4, 0): // FSTOI4T dst,src1
@@ -1944,19 +2250,19 @@ int drcbe_c::execute(code_handle &entry)
// ----------------------- 64-Bit Floating Point Operations -----------------------
case MAKE_OPCODE_SHORT(OP_FLOAD, 8, 0): // FDLOAD dst,base,index
- FDPARAM0 = inst[1].pdouble[PARAM2];
+ FDPARAM0 = inst[1].pdouble[SPARAM2];
break;
case MAKE_OPCODE_SHORT(OP_FSTORE, 8, 0): // FDSTORE dst,base,index
- inst[0].pdouble[PARAM1] = FDPARAM2;
+ inst[0].pdouble[SPARAM1] = FDPARAM2;
break;
case MAKE_OPCODE_SHORT(OP_FREAD, 8, 0): // FDREAD dst,src1,space
- DPARAM0 = m_space[PARAM2]->read_qword(PARAM1);
+ DPARAM0 = SPACEPARAM2.read_qword(PARAM1);
break;
case MAKE_OPCODE_SHORT(OP_FWRITE, 8, 0): // FDWRITE dst,src1,space
- m_space[PARAM2]->write_qword(PARAM0, DPARAM1);
+ SPACEPARAM2.write_qword(PARAM0, DPARAM1);
break;
case MAKE_OPCODE_SHORT(OP_FMOV, 8, 1): // FDMOV dst,src[,c]
@@ -1965,7 +2271,7 @@ int drcbe_c::execute(code_handle &entry)
[[fallthrough]];
case MAKE_OPCODE_SHORT(OP_FMOV, 8, 0):
- FDPARAM0 = FDPARAM1;
+ DPARAM0 = DPARAM1;
break;
case MAKE_OPCODE_SHORT(OP_FTOI4T, 8, 0): // FDTOI4T dst,src1
@@ -2088,7 +2394,7 @@ int drcbe_c::execute(code_handle &entry)
break;
default:
- fatalerror("Unexpected opcode!\n");
+ fatalerror("Unexpected opcode! %08x %d %d %d\n", opcode, OPCODE_GET_SHORT(opcode) >> 2, BIT(opcode, 0) ? 8 : 4, BIT(opcode, 1));
}
// advance past the parameters and immediates
@@ -2104,26 +2410,27 @@ int drcbe_c::execute(code_handle &entry)
// output_parameter - output a parameter
//-------------------------------------------------
-void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int size, const parameter &param)
+void drcbe_c::output_parameter(drcbec_instruction **dstptr, void *immed, int immoffset, int size, const parameter &param)
{
drcbec_instruction *dst = *dstptr;
- void *immed = *immedptr;
- parameter temp_param;
switch (param.type())
{
// immediates store a pointer to the immediate data, which is stored at the end of the instruction
case parameter::PTYPE_IMMEDIATE:
if (param.immediate() == 0)
+ {
(dst++)->v = &s_immediate_zero;
+ }
else
{
- (dst++)->v = immed;
+ assert(immoffset >= 0);
+ auto const thisimmed = reinterpret_cast<uint8_t *>(immed) + immoffset;
+ (dst++)->v = thisimmed;
if (size == 4)
- *(uint32_t *)immed = (uint32_t)param.immediate();
+ *(uint32_t *)thisimmed = (uint32_t)param.immediate();
else
- *(uint64_t *)immed = (uint64_t)param.immediate();
- immed = (uint8_t *)immed + size;
+ *(uint64_t *)thisimmed = (uint64_t)param.immediate();
}
break;
@@ -2145,8 +2452,7 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
// convert mapvars to immediates
case parameter::PTYPE_MAPVAR:
- temp_param = m_map.get_last_value(param.mapvar());
- return output_parameter(dstptr, immedptr, size, temp_param);
+ return output_parameter(dstptr, immed, immoffset, size, param.mapvar());
// memory just points to the memory
case parameter::PTYPE_MEMORY:
@@ -2158,11 +2464,12 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
case parameter::PTYPE_SIZE_SCALE:
case parameter::PTYPE_ROUNDING:
case parameter::PTYPE_STRING:
- return output_parameter(dstptr, immedptr, size, 0);
+ return output_parameter(dstptr, immed, immoffset, size, 0);
// space/size parameters; sizes are built into our opcodes, but space needs to be encoded
case parameter::PTYPE_SIZE_SPACE:
- return output_parameter(dstptr, immedptr, size, param.space());
+ (dst++)->space = m_space[param.space()];
+ break;
// code handle just points to the handle
case parameter::PTYPE_CODE_HANDLE:
@@ -2171,7 +2478,7 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
// code label just contains the label value
case parameter::PTYPE_CODE_LABEL:
- return output_parameter(dstptr, immedptr, size, uint32_t(param.label()));
+ return output_parameter(dstptr, immed, immoffset, size, uint32_t(param.label()));
// c_function just points to the C function
case parameter::PTYPE_C_FUNCTION:
@@ -2183,7 +2490,6 @@ void drcbe_c::output_parameter(drcbec_instruction **dstptr, void **immedptr, int
}
*dstptr = dst;
- *immedptr = immed;
}
@@ -2198,117 +2504,19 @@ void drcbe_c::fixup_label(void *parameter, drccodeptr labelcodeptr)
dst->inst = (drcbec_instruction *)labelcodeptr;
}
+} // anonymous namespace
-//-------------------------------------------------
-// dmulu - perform a double-wide unsigned multiply
-//-------------------------------------------------
-int drcbe_c::dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags)
+std::unique_ptr<drcbe_interface> make_drcbe_c(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits)
{
- // shortcut if we don't care about the high bits or the flags
- if (&dstlo == &dsthi && flags == false)
- {
- dstlo = src1 * src2;
- return 0;
- }
-
- // fetch source values
- uint64_t a = src1;
- uint64_t b = src2;
- if (a == 0 || b == 0)
- {
- dsthi = dstlo = 0;
- return FLAG_Z;
- }
-
- // compute high and low parts first
- uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
- uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
-
- // compute middle parts
- uint64_t prevlo = lo;
- uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- prevlo = lo;
- temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- // store the results
- dsthi = hi;
- dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != 0) << 1);
-}
-
-
-//-------------------------------------------------
-// dmuls - perform a double-wide signed multiply
-//-------------------------------------------------
-
-int drcbe_c::dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags)
-{
- // shortcut if we don't care about the high bits or the flags
- if (&dstlo == &dsthi && flags == false)
- {
- dstlo = src1 * src2;
- return 0;
- }
-
- // fetch absolute source values
- uint64_t a = src1; if ((int64_t)a < 0) a = -a;
- uint64_t b = src2; if ((int64_t)b < 0) b = -b;
- if (a == 0 || b == 0)
- {
- dsthi = dstlo = 0;
- return FLAG_Z;
- }
-
- // compute high and low parts first
- uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
- uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
-
- // compute middle parts
- uint64_t prevlo = lo;
- uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- prevlo = lo;
- temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- // adjust for signage
- if ((int64_t)(src1 ^ src2) < 0)
- {
- hi = ~hi + (lo == 0);
- lo = ~lo + 1;
- }
-
- // store the results
- dsthi = hi;
- dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != ((int64_t)lo >> 63)) << 1);
+ return std::unique_ptr<drcbe_interface>(new drcbe_c(drcuml, device, cache, flags, modes, addrbits, ignorebits));
}
-uint32_t drcbe_c::tzcount32(uint32_t value)
-{
- for (int i = 0; i < 32; i++)
- {
- if (value & (1 << i))
- return i;
- }
- return 32;
-}
-
-uint64_t drcbe_c::tzcount64(uint64_t value)
-{
- for (int i = 0; i < 64; i++)
- {
- if (value & ((uint64_t)(1) << i))
- return i;
- }
- return 64;
-}
+} // namespace drc
diff --git a/src/devices/cpu/drcbec.h b/src/devices/cpu/drcbec.h
index d9c28612fea..4bfea5a46f4 100644
--- a/src/devices/cpu/drcbec.h
+++ b/src/devices/cpu/drcbec.h
@@ -8,54 +8,27 @@
***************************************************************************/
-#pragma once
+#ifndef MAME_CPU_DRCBEC_H
+#define MAME_CPU_DRCBEC_H
-#ifndef __DRCBEC_H__
-#define __DRCBEC_H__
+#pragma once
#include "drcuml.h"
-#include "drcbeut.h"
-
-
-
-//**************************************************************************
-// TYPE DEFINITIONS
-//**************************************************************************
-
-union drcbec_instruction;
-
-class drcbe_c : public drcbe_interface
-{
-public:
- // construction/destruction
- drcbe_c(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
- virtual ~drcbe_c();
- // required overrides
- virtual void reset() override;
- virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
- virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
- virtual void get_info(drcbe_info &info) override;
+#include <memory>
-private:
- // helpers
- void output_parameter(drcbec_instruction **dstptr, void **immedptr, int size, const uml::parameter &param);
- void fixup_label(void *parameter, drccodeptr labelcodeptr);
- int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags);
- int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags);
- uint32_t tzcount32(uint32_t value);
- uint64_t tzcount64(uint64_t value);
- // internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- drc_label_list m_labels; // label list
- drc_label_fixup_delegate m_fixup_delegate; // precomputed delegate
+namespace drc {
- static const uint32_t s_condition_map[32];
- static uint64_t s_immediate_zero;
-};
+std::unique_ptr<drcbe_interface> make_drcbe_c(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits);
+} // namespace drc
-#endif /* __DRCBEC_H__ */
+#endif // MAME_CPU_DRCBEC_H
diff --git a/src/devices/cpu/drcbeut.cpp b/src/devices/cpu/drcbeut.cpp
index 8ccd8d31fb3..23526e1a8aa 100644
--- a/src/devices/cpu/drcbeut.cpp
+++ b/src/devices/cpu/drcbeut.cpp
@@ -2,8 +2,6 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- drcbeut.c
-
Utility functions for dynamic recompiling backends.
***************************************************************************/
@@ -11,6 +9,11 @@
#include "emu.h"
#include "drcbeut.h"
+#include <algorithm>
+
+
+namespace drc {
+
using namespace uml;
@@ -30,19 +33,19 @@ using namespace uml;
// drc_hash_table - constructor
//-------------------------------------------------
-drc_hash_table::drc_hash_table(drc_cache &cache, uint32_t modes, uint8_t addrbits, uint8_t ignorebits)
- : m_cache(cache),
- m_modes(modes),
- m_nocodeptr(nullptr),
- m_l1bits((addrbits - ignorebits) / 2),
- m_l2bits((addrbits - ignorebits) - m_l1bits),
- m_l1shift(ignorebits + m_l2bits),
- m_l2shift(ignorebits),
- m_l1mask((1 << m_l1bits) - 1),
- m_l2mask((1 << m_l2bits) - 1),
- m_base(reinterpret_cast<drccodeptr ***>(cache.alloc(modes * sizeof(**m_base)))),
- m_emptyl1(nullptr),
- m_emptyl2(nullptr)
+drc_hash_table::drc_hash_table(drc_cache &cache, uint32_t modes, uint8_t addrbits, uint8_t ignorebits) :
+ m_cache(cache),
+ m_modes(modes),
+ m_nocodeptr(nullptr),
+ m_l1bits((addrbits - ignorebits) / 2),
+ m_l2bits((addrbits - ignorebits) - m_l1bits),
+ m_l1shift(ignorebits + m_l2bits),
+ m_l2shift(ignorebits),
+ m_l1mask((1 << m_l1bits) - 1),
+ m_l2mask((1 << m_l2bits) - 1),
+ m_base(reinterpret_cast<drccodeptr ***>(cache.alloc(modes * sizeof(**m_base)))),
+ m_emptyl1(nullptr),
+ m_emptyl2(nullptr)
{
reset();
}
@@ -197,11 +200,11 @@ bool drc_hash_table::set_codeptr(uint32_t mode, uint32_t pc, drccodeptr code)
// drc_map_variables - constructor
//-------------------------------------------------
-drc_map_variables::drc_map_variables(drc_cache &cache, uint64_t uniquevalue)
- : m_cache(cache),
- m_uniquevalue(uniquevalue)
+drc_map_variables::drc_map_variables(drc_cache &cache, uint64_t uniquevalue) :
+ m_cache(cache),
+ m_uniquevalue(uniquevalue)
{
- memset(m_mapvalue, 0, sizeof(m_mapvalue));
+ std::fill(std::begin(m_mapvalue), std::end(m_mapvalue), 0);
}
@@ -211,9 +214,6 @@ drc_map_variables::drc_map_variables(drc_cache &cache, uint64_t uniquevalue)
drc_map_variables::~drc_map_variables()
{
- // must detach all items from the entry list so that the list object
- // doesn't try to free them on exit
- m_entry_list.detach_all();
}
@@ -224,12 +224,11 @@ drc_map_variables::~drc_map_variables()
void drc_map_variables::block_begin(drcuml_block &block)
{
// release any remaining live entries
- map_entry *entry;
- while ((entry = m_entry_list.detach_head()) != nullptr)
- m_cache.dealloc(entry, sizeof(*entry));
+ m_entry_list.clear();
+ m_entry_list.reserve(128);
// reset the variable values
- memset(m_mapvalue, 0, sizeof(m_mapvalue));
+ std::fill(std::begin(m_mapvalue), std::end(m_mapvalue), 0);
}
@@ -240,71 +239,80 @@ void drc_map_variables::block_begin(drcuml_block &block)
void drc_map_variables::block_end(drcuml_block &block)
{
// only process if we have data
- if (m_entry_list.first() == nullptr)
+ if (m_entry_list.empty())
return;
// begin "code generation" aligned to an 8-byte boundary
- drccodeptr *top = m_cache.begin_codegen(sizeof(uint64_t) + sizeof(uint32_t) + 2 * sizeof(uint32_t) * m_entry_list.count());
- if (top == nullptr)
+ drccodeptr *top = m_cache.begin_codegen(sizeof(uint64_t) + sizeof(uint32_t) + 2 * sizeof(uint32_t) * m_entry_list.size());
+ if (!top)
block.abort();
- uint32_t *dest = (uint32_t *)(((uintptr_t)*top + 7) & ~7);
+ auto dest = reinterpret_cast<uint32_t *>((uintptr_t(*top) + 7) & ~uintptr_t(7));
// store the cookie first
*(uint64_t *)dest = m_uniquevalue;
dest += 2;
// get the pointer to the first item and store an initial backwards offset
- drccodeptr lastptr = m_entry_list.first()->m_codeptr;
- *dest = (drccodeptr)dest - lastptr;
+ drccodeptr lastptr = m_entry_list.front().codeptr;
+ *dest = drccodeptr(dest) - lastptr;
dest++;
// now iterate over entries and store them
- uint32_t curvalue[MAPVAR_COUNT] = { 0 };
- bool changed[MAPVAR_COUNT] = { false };
- for (map_entry *entry = m_entry_list.first(); entry != nullptr; entry = entry->next())
+ std::array<uint32_t, MAPVAR_COUNT> curvalue;
+ std::array<bool, MAPVAR_COUNT> changed;
+ std::fill(curvalue.begin(), curvalue.end(), 0);
+ std::fill(changed.begin(), changed.end(), false);
+ auto entry = m_entry_list.begin();
+ while (m_entry_list.end() != entry)
{
// update the current value of the variable and detect changes
- if (curvalue[entry->m_mapvar] != entry->m_newval)
+ if (curvalue[entry->mapvar] != entry->newval)
{
- curvalue[entry->m_mapvar] = entry->m_newval;
- changed[entry->m_mapvar] = true;
+ curvalue[entry->mapvar] = entry->newval;
+ changed[entry->mapvar] = true;
}
// if the next code pointer is different, or if we're at the end, flush changes
- if (entry->next() == nullptr || entry->next()->m_codeptr != entry->m_codeptr)
+ auto const next = std::next(entry);
+ if ((m_entry_list.end() == next) || (next->codeptr != entry->codeptr))
{
// build a mask of changed variables
int numchanged = 0;
uint32_t varmask = 0;
for (int varnum = 0; varnum < std::size(changed); varnum++)
+ {
if (changed[varnum])
{
changed[varnum] = false;
varmask |= 1 << varnum;
numchanged++;
}
+ }
// if nothing really changed, skip it
- if (numchanged == 0)
- continue;
-
- // first word is a code delta plus mask of changed variables
- uint32_t codedelta = entry->m_codeptr - lastptr;
- while (codedelta > 0xffff)
+ if (numchanged)
{
- *dest++ = 0xffff << 16;
- codedelta -= 0xffff;
- }
- *dest++ = (codedelta << 16) | (varmask << 4) | numchanged;
+ // first word is a code delta plus mask of changed variables
+ uint32_t codedelta = entry->codeptr - lastptr;
+ while (codedelta > 0xffff)
+ {
+ *dest++ = uint32_t(0xffff) << 16;
+ codedelta -= 0xffff;
+ }
+ *dest++ = (codedelta << 16) | (varmask << 4) | numchanged;
- // now output updated variable values
- for (int varnum = 0; varnum < std::size(changed); varnum++)
- if ((varmask >> varnum) & 1)
- *dest++ = curvalue[varnum];
+ // now output updated variable values
+ for (int varnum = 0; varnum < changed.size(); varnum++)
+ {
+ if (BIT(varmask, varnum))
+ *dest++ = curvalue[varnum];
+ }
- // remember our lastptr
- lastptr = entry->m_codeptr;
+ // remember our lastptr
+ lastptr = entry->codeptr;
+ }
}
+ entry = next;
}
// add a terminator
@@ -323,21 +331,17 @@ void drc_map_variables::block_end(drcuml_block &block)
void drc_map_variables::set_value(drccodeptr codebase, uint32_t mapvar, uint32_t newvalue)
{
- assert(mapvar >= MAPVAR_M0 && mapvar < MAPVAR_END);
+ assert((mapvar >= MAPVAR_M0) && (mapvar < MAPVAR_END));
// if this value isn't different, skip it
if (m_mapvalue[mapvar - MAPVAR_M0] == newvalue)
return;
// allocate a new entry and fill it in
- map_entry *entry = (map_entry *)m_cache.alloc(sizeof(*entry));
- entry->m_next = nullptr;
- entry->m_codeptr = codebase;
- entry->m_mapvar = mapvar - MAPVAR_M0;
- entry->m_newval = newvalue;
-
- // hook us into the end of the list
- m_entry_list.append(*entry);
+ auto &entry = m_entry_list.emplace_back();
+ entry.codeptr = codebase;
+ entry.mapvar = mapvar - MAPVAR_M0;
+ entry.newval = newvalue;
// update our state in the table as well
m_mapvalue[mapvar - MAPVAR_M0] = newvalue;
@@ -351,27 +355,27 @@ void drc_map_variables::set_value(drccodeptr codebase, uint32_t mapvar, uint32_t
uint32_t drc_map_variables::get_value(drccodeptr codebase, uint32_t mapvar) const
{
- assert(mapvar >= MAPVAR_M0 && mapvar < MAPVAR_END);
+ assert((mapvar >= MAPVAR_M0) && (mapvar < MAPVAR_END));
mapvar -= MAPVAR_M0;
// get an aligned pointer to start scanning
- uint64_t *curscan = (uint64_t *)(((uintptr_t)codebase | 7) + 1);
- uint64_t *endscan = (uint64_t *)m_cache.top();
+ auto curscan = reinterpret_cast<uint64_t const *>((uintptr_t(codebase) | 7) + 1);
+ auto const endscan = reinterpret_cast<uint64_t const *>(m_cache.top());
// look for the signature
- while (curscan < endscan && *curscan++ != m_uniquevalue) {};
+ while ((curscan < endscan) && (*curscan++ != m_uniquevalue)) { }
if (curscan >= endscan)
return 0;
// switch to 32-bit pointers for processing the rest
- uint32_t *data = (uint32_t *)curscan;
+ auto data = reinterpret_cast<uint32_t const *>(curscan);
// first get the 32-bit starting offset to the code
drccodeptr curcode = (drccodeptr)data - *data;
data++;
// now loop until we advance past our target
- uint32_t varmask = 0x10 << mapvar;
+ uint32_t const varmask = 0x10 << mapvar;
uint32_t result = 0;
while (true)
{
@@ -386,7 +390,7 @@ uint32_t drc_map_variables::get_value(drccodeptr codebase, uint32_t mapvar) cons
break;
// if our mapvar has changed, process this word
- if ((controlword & varmask) != 0)
+ if (controlword & varmask)
{
// count how many words precede the one we care about
int dataoffs = 0;
@@ -405,11 +409,6 @@ uint32_t drc_map_variables::get_value(drccodeptr codebase, uint32_t mapvar) cons
return result;
}
-uint32_t drc_map_variables::static_get_value(drc_map_variables &map, drccodeptr codebase, uint32_t mapvar)
-{
- return map.get_value(codebase, mapvar);
-}
-
//-------------------------------------------------
@@ -433,9 +432,9 @@ uint32_t drc_map_variables::get_last_value(uint32_t mapvar)
// drc_label_list - constructor
//-------------------------------------------------
-drc_label_list::drc_label_list(drc_cache &cache)
- : m_cache(cache),
- m_oob_callback_delegate(&drc_label_list::oob_callback, this)
+drc_label_list::drc_label_list(drc_cache &cache) :
+ m_cache(cache),
+ m_oob_callback_delegate(&drc_label_list::oob_callback, this)
{
}
@@ -446,9 +445,6 @@ drc_label_list::drc_label_list(drc_cache &cache)
drc_label_list::~drc_label_list()
{
- // must detach all items from the entry list so that the list object
- // doesn't try to free them on exit
- m_list.detach_all();
}
@@ -473,12 +469,7 @@ void drc_label_list::block_end(drcuml_block &block)
assert(!m_cache.generating_code());
// free all of the pending fixup requests
- label_fixup *fixup;
- while ((fixup = m_fixup_list.detach_head()) != nullptr)
- {
- fixup->~label_fixup();
- m_cache.dealloc(fixup, sizeof(*fixup));
- }
+ m_free_fixups.splice(m_free_fixups.begin(), m_fixup_list);
// make sure the label list is clear, and fatalerror if we missed anything
reset(true);
@@ -493,18 +484,22 @@ void drc_label_list::block_end(drcuml_block &block)
drccodeptr drc_label_list::get_codeptr(uml::code_label label, drc_label_fixup_delegate const &callback, void *param)
{
- label_entry *const curlabel = find_or_allocate(label);
+ label_entry &curlabel = find_or_allocate(label);
// if no code pointer, request an OOB callback
- if (!curlabel->m_codeptr && !callback.isnull())
+ if (!curlabel.codeptr && !callback.isnull())
{
- label_fixup *fixup = reinterpret_cast<label_fixup *>(m_cache.alloc(sizeof(*fixup)));
- new (fixup) label_fixup{ nullptr, curlabel, callback };
- m_fixup_list.append(*fixup);
- m_cache.request_oob_codegen(drc_oob_delegate(m_oob_callback_delegate), fixup, param);
+ label_fixup_list::iterator fixup = m_free_fixups.begin();
+ if (m_free_fixups.end() == fixup)
+ fixup = m_fixup_list.emplace(m_fixup_list.end());
+ else
+ m_fixup_list.splice(m_fixup_list.end(), m_free_fixups, fixup);
+ fixup->label = &curlabel;
+ fixup->callback = callback;
+ m_cache.request_oob_codegen(drc_oob_delegate(m_oob_callback_delegate), &*fixup, param);
}
- return curlabel->m_codeptr;
+ return curlabel.codeptr;
}
@@ -515,9 +510,9 @@ drccodeptr drc_label_list::get_codeptr(uml::code_label label, drc_label_fixup_de
void drc_label_list::set_codeptr(uml::code_label label, drccodeptr codeptr)
{
// set the code pointer
- label_entry *curlabel = find_or_allocate(label);
- assert(curlabel->m_codeptr == nullptr);
- curlabel->m_codeptr = codeptr;
+ label_entry &curlabel = find_or_allocate(label);
+ assert(!curlabel.codeptr);
+ curlabel.codeptr = codeptr;
}
@@ -529,15 +524,14 @@ void drc_label_list::set_codeptr(uml::code_label label, drccodeptr codeptr)
void drc_label_list::reset(bool fatal_on_leftovers)
{
// loop until out of labels
- label_entry *curlabel;
- while ((curlabel = m_list.detach_head()) != nullptr)
+ while (!m_list.empty())
{
// fatal if we were a leftover
- if (fatal_on_leftovers && curlabel->m_codeptr == nullptr)
- fatalerror("Label %08X never defined!\n", curlabel->m_label.label());
+ if (fatal_on_leftovers && !m_list.front().codeptr)
+ throw emu_fatalerror("Label %08X never defined!\n", m_list.front().label.label());
// free the label
- m_cache.dealloc(curlabel, sizeof(*curlabel));
+ m_free_labels.splice(m_free_labels.begin(), m_list, m_list.begin());
}
}
@@ -547,23 +541,24 @@ void drc_label_list::reset(bool fatal_on_leftovers)
// allocate a new one if not found
//-------------------------------------------------
-drc_label_list::label_entry *drc_label_list::find_or_allocate(uml::code_label label)
+drc_label_list::label_entry &drc_label_list::find_or_allocate(uml::code_label label)
{
// find the label, or else allocate a new one
- label_entry *curlabel;
- for (curlabel = m_list.first(); curlabel != nullptr; curlabel = curlabel->next())
- if (curlabel->m_label == label)
- break;
-
- // if none found, allocate
- if (curlabel == nullptr)
+ for (auto curlabel = m_list.begin(); m_list.end() != curlabel; ++curlabel)
{
- curlabel = (label_entry *)m_cache.alloc(sizeof(*curlabel));
- curlabel->m_label = label;
- curlabel->m_codeptr = nullptr;
- m_list.append(*curlabel);
+ if (curlabel->label == label)
+ return *curlabel;
}
- return curlabel;
+
+ // if none found, allocate
+ auto newlabel = m_free_labels.begin();
+ if (m_free_labels.end() == newlabel)
+ newlabel = m_list.emplace(m_list.end());
+ else
+ m_list.splice(m_list.end(), m_free_labels, newlabel);
+ newlabel->label = label;
+ newlabel->codeptr = nullptr;
+ return *newlabel;
}
@@ -575,5 +570,47 @@ drc_label_list::label_entry *drc_label_list::find_or_allocate(uml::code_label la
void drc_label_list::oob_callback(drccodeptr *codeptr, void *param1, void *param2)
{
label_fixup *fixup = reinterpret_cast<label_fixup *>(param1);
- fixup->m_callback(param2, fixup->m_label->m_codeptr);
+ fixup->callback(param2, fixup->label->codeptr);
+}
+
+
+
+//**************************************************************************
+// RESOLVED MEMORY ACCESSORS
+//**************************************************************************
+
+//-------------------------------------------------
+// set - bind to address space
+//-------------------------------------------------
+
+void resolved_memory_accessors::set(address_space &space)
+{
+ read_byte .set(space, static_cast<u8 (address_space::*)(offs_t) >(&address_space::read_byte));
+ read_byte_masked .set(space, static_cast<u8 (address_space::*)(offs_t, u8) >(&address_space::read_byte));
+ read_word .set(space, static_cast<u16 (address_space::*)(offs_t) >(&address_space::read_word));
+ read_word_masked .set(space, static_cast<u16 (address_space::*)(offs_t, u16)>(&address_space::read_word));
+ read_dword .set(space, static_cast<u32 (address_space::*)(offs_t) >(&address_space::read_dword));
+ read_dword_masked .set(space, static_cast<u32 (address_space::*)(offs_t, u32)>(&address_space::read_dword));
+ read_qword .set(space, static_cast<u64 (address_space::*)(offs_t) >(&address_space::read_qword));
+ read_qword_masked .set(space, static_cast<u64 (address_space::*)(offs_t, u64)>(&address_space::read_qword));
+
+ write_byte .set(space, static_cast<void (address_space::*)(offs_t, u8) >(&address_space::write_byte));
+ write_byte_masked .set(space, static_cast<void (address_space::*)(offs_t, u8, u8) >(&address_space::write_byte));
+ write_word .set(space, static_cast<void (address_space::*)(offs_t, u16) >(&address_space::write_word));
+ write_word_masked .set(space, static_cast<void (address_space::*)(offs_t, u16, u16)>(&address_space::write_word));
+ write_dword .set(space, static_cast<void (address_space::*)(offs_t, u32) >(&address_space::write_dword));
+ write_dword_masked .set(space, static_cast<void (address_space::*)(offs_t, u32, u32)>(&address_space::write_dword));
+ write_qword .set(space, static_cast<void (address_space::*)(offs_t, u64) >(&address_space::write_qword));
+ write_qword_masked .set(space, static_cast<void (address_space::*)(offs_t, u64, u64)>(&address_space::write_qword));
+
+ if (
+ !read_byte || !read_byte_masked || !write_byte || !write_byte_masked ||
+ !read_word || !read_word_masked || !write_word || !write_word_masked ||
+ !read_dword || !read_dword_masked || !write_dword || !write_dword_masked ||
+ !read_qword || !read_qword_masked || !write_qword || !write_qword_masked)
+ {
+ throw emu_fatalerror("Error resolving address space accessor member functions!\n");
+ }
}
+
+} // namespace drc
diff --git a/src/devices/cpu/drcbeut.h b/src/devices/cpu/drcbeut.h
index 7317b0ba30b..88945913429 100644
--- a/src/devices/cpu/drcbeut.h
+++ b/src/devices/cpu/drcbeut.h
@@ -2,19 +2,26 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- drcbeut.h
-
Utility functions for dynamic recompiling backends.
***************************************************************************/
-#pragma once
+#ifndef MAME_CPU_DRCBEUT_H
+#define MAME_CPU_DRCBEUT_H
-#ifndef __DRCBEUT_H__
-#define __DRCBEUT_H__
+#pragma once
#include "drcuml.h"
+#include "mfpresolve.h"
+
+#include <cassert>
+#include <list>
+#include <utility>
+#include <vector>
+
+
+namespace drc {
//**************************************************************************
// TYPE DEFINITIONS
@@ -30,14 +37,14 @@ public:
drc_hash_table(drc_cache &cache, uint32_t modes, uint8_t addrbits, uint8_t ignorebits);
// getters
- drccodeptr ***base() const { return m_base; }
- uint8_t l1bits() const { return m_l1bits; }
- uint8_t l2bits() const { return m_l2bits; }
- uint8_t l1shift() const { return m_l1shift; }
- uint8_t l2shift() const { return m_l2shift; }
- offs_t l1mask() const { return m_l1mask; }
- offs_t l2mask() const { return m_l2mask; }
- bool is_mode_populated(uint32_t mode) const { return m_base[mode] != m_emptyl1; }
+ drccodeptr ***base() const noexcept { return m_base; }
+ uint8_t l1bits() const noexcept { return m_l1bits; }
+ uint8_t l2bits() const noexcept { return m_l2bits; }
+ uint8_t l1shift() const noexcept { return m_l1shift; }
+ uint8_t l2shift() const noexcept { return m_l2shift; }
+ offs_t l1mask() const noexcept { return m_l1mask; }
+ offs_t l2mask() const noexcept { return m_l2mask; }
+ bool is_mode_populated(uint32_t mode) const noexcept { return m_base[mode] != m_emptyl1; }
// set up and configuration
bool reset();
@@ -49,20 +56,20 @@ public:
// code pointer access
bool set_codeptr(uint32_t mode, uint32_t pc, drccodeptr code);
- drccodeptr get_codeptr(uint32_t mode, uint32_t pc) { assert(mode < m_modes); return m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]; }
- bool code_exists(uint32_t mode, uint32_t pc) { return get_codeptr(mode, pc) != m_nocodeptr; }
+ drccodeptr get_codeptr(uint32_t mode, uint32_t pc) const noexcept { assert(mode < m_modes); return m_base[mode][(pc >> m_l1shift) & m_l1mask][(pc >> m_l2shift) & m_l2mask]; }
+ bool code_exists(uint32_t mode, uint32_t pc) const noexcept { return get_codeptr(mode, pc) != m_nocodeptr; }
private:
// internal state
drc_cache & m_cache; // cache where allocations come from
- uint32_t m_modes; // number of modes supported
+ uint32_t m_modes; // number of modes supported
drccodeptr m_nocodeptr; // pointer to code which will handle missing entries
- uint8_t m_l1bits; // bits worth of entries in l1 hash tables
- uint8_t m_l2bits; // bits worth of entries in l2 hash tables
- uint8_t m_l1shift; // shift to apply to the PC to get the l1 hash entry
- uint8_t m_l2shift; // shift to apply to the PC to get the l2 hash entry
+ uint8_t m_l1bits; // bits worth of entries in l1 hash tables
+ uint8_t m_l2bits; // bits worth of entries in l2 hash tables
+ uint8_t m_l1shift; // shift to apply to the PC to get the l1 hash entry
+ uint8_t m_l2shift; // shift to apply to the PC to get the l2 hash entry
offs_t m_l1mask; // mask to apply after shifting
offs_t m_l2mask; // mask to apply after shifting
@@ -91,25 +98,20 @@ public:
uint32_t get_value(drccodeptr codebase, uint32_t mapvar) const;
uint32_t get_last_value(uint32_t mapvar);
- // static accessors to be called directly by generated code
- static uint32_t static_get_value(drc_map_variables &map, drccodeptr codebase, uint32_t mapvar);
-
private:
- // internal state
- drc_cache & m_cache; // pointer to the cache
- uint64_t m_uniquevalue; // unique value used to find the table
- uint32_t m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
-
- // list of entries
struct map_entry
{
- map_entry *next() const { return m_next; }
- map_entry * m_next; // pointer to next map entry
- drccodeptr m_codeptr; // pointer to the relevant code
- uint32_t m_mapvar; // map variable id
- uint32_t m_newval; // value of the variable starting at codeptr
+ drccodeptr codeptr; // pointer to the relevant code
+ uint32_t mapvar; // map variable id
+ uint32_t newval; // value of the variable starting at codeptr
};
- simple_list<map_entry> m_entry_list; // list of entries
+ using map_entry_vector = std::vector<map_entry>;
+
+ // internal state
+ drc_cache & m_cache; // pointer to the cache
+ uint64_t m_uniquevalue; // unique value used to find the table
+ uint32_t m_mapvalue[uml::MAPVAR_END - uml::MAPVAR_M0]; // array of current values
+ map_entry_vector m_entry_list; // list of entries
};
@@ -136,31 +138,83 @@ public:
private:
struct label_entry
{
- label_entry *next() const { return m_next; }
- label_entry * m_next; // pointer to next label
- uml::code_label m_label; // the label specified
- drccodeptr m_codeptr; // pointer to the relevant code
+ uml::code_label label; // the label specified
+ drccodeptr codeptr; // pointer to the relevant code
};
+ using label_entry_list = std::list<label_entry>;
struct label_fixup
{
- label_fixup *next() const { return m_next; }
- label_fixup * m_next; // pointer to the next oob
- label_entry * m_label; // the label in question
- drc_label_fixup_delegate m_callback; // callback
+ label_entry * label; // the label in question
+ drc_label_fixup_delegate callback; // callback
};
+ using label_fixup_list = std::list<label_fixup>;
// internal helpers
void reset(bool fatal_on_leftovers);
- label_entry *find_or_allocate(uml::code_label label);
+ label_entry &find_or_allocate(uml::code_label label);
void oob_callback(drccodeptr *codeptr, void *param1, void *param2);
// internal state
drc_cache & m_cache; // pointer to the cache
- simple_list<label_entry> m_list; // head of the live list
- simple_list<label_fixup> m_fixup_list; // list of pending oob fixups
+ label_entry_list m_list; // head of the live list
+ label_fixup_list m_fixup_list; // list of pending oob fixups
drc_oob_delegate m_oob_callback_delegate; // pre-computed delegate
+ label_entry_list m_free_labels;
+ label_fixup_list m_free_fixups;
};
-#endif /* __DRCBEUT_H__ */
+// ======================> resolved_member_function
+
+struct resolved_member_function
+{
+ uintptr_t obj = uintptr_t(nullptr);
+ uint8_t *func = nullptr;
+
+ explicit operator bool() const noexcept
+ {
+ return bool(func);
+ }
+
+ template <typename C, typename F>
+ void set(C &&instance, F &&mfp) noexcept
+ {
+ auto const [entrypoint, adjusted] = util::resolve_member_function(std::forward<F>(mfp), std::forward<C>(instance));
+ obj = adjusted;
+ func = reinterpret_cast<uint8_t *>(entrypoint);
+ }
+};
+
+
+// ======================> resolved_memory_accessors
+
+struct resolved_memory_accessors
+{
+ resolved_member_function read_byte;
+ resolved_member_function read_byte_masked;
+ resolved_member_function read_word;
+ resolved_member_function read_word_masked;
+ resolved_member_function read_dword;
+ resolved_member_function read_dword_masked;
+ resolved_member_function read_qword;
+ resolved_member_function read_qword_masked;
+
+ resolved_member_function write_byte;
+ resolved_member_function write_byte_masked;
+ resolved_member_function write_word;
+ resolved_member_function write_word_masked;
+ resolved_member_function write_dword;
+ resolved_member_function write_dword_masked;
+ resolved_member_function write_qword;
+ resolved_member_function write_qword_masked;
+
+ void set(address_space &space);
+};
+
+using resolved_memory_accessors_vector = std::vector<resolved_memory_accessors>;
+
+} // namespace drc
+
+
+#endif // MAME_CPU_DRCBEUT_H
diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index a8abda5a5d4..ab1bd94bb51 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- drcbex64.c
+ drcbex64.cpp
64-bit x64 back-end for the universal machine language.
@@ -16,8 +16,6 @@
* Identify common pairs and optimize output
- * Convert SUB a,0,b to NEG
-
* Optimize, e.g., and [r5],i0,$FF to use rbx as temporary register
(avoid initial move) if i0 is not needed going forward
@@ -122,7 +120,7 @@
R14 - maps to I5
R15 - maps to I6
- Registers (Linux/MacOS):
+ Registers (SysV)
RAX - scratch register
RBX - maps to I0
RCX - scratch register
@@ -146,46 +144,88 @@
Exit point:
Assumes exit value is in RAX.
- Entry stack:
- [rsp] - return
-
- Runtime stack:
- [rsp] - r9 home
- [rsp+8] - r8 home
- [rsp+16] - rdx home
- [rsp+24] - rcx home
- [rsp+40] - saved r15
- [rsp+48] - saved r14
- [rsp+56] - saved r13
- [rsp+64] - saved r12
- [rsp+72] - saved ebp
- [rsp+80] - saved edi
- [rsp+88] - saved esi
- [rsp+96] - saved ebx
- [rsp+104] - ret
+ Top-level generated code frame (Windows):
+ [rsp+0x00] - rcx home/scratch
+ [rsp+0x08] - rdx home/scratch
+ [rsp+0x10] - r8 home/scratch
+ [rsp+0x18] - r9 home/scratch
+ [rsp+0x20] - scratch
+ [rsp+0x28] - saved r15
+ [rsp+0x30] - saved r14
+ [rsp+0x38] - saved r13
+ [rsp+0x40] - saved r12
+ [rsp+0x48] - saved rbp
+ [rsp+0x50] - saved rdi
+ [rsp+0x58] - saved rsi
+ [rsp+0x60] - saved rbx
+ [rsp+0x68] - ret
+
+ Top-level generated code frame (SysV):
+ [rsp+0x00] - scratch
+ [rsp+0x08] - scratch
+ [rsp+0x10] - scratch
+ [rsp+0x18] - scratch
+ [rsp+0x20] - scratch
+ [rsp+0x28] - saved r15
+ [rsp+0x30] - saved r14
+ [rsp+0x38] - saved r13
+ [rsp+0x40] - saved r12
+ [rsp+0x48] - saved rbp
+ [rsp+0x50] - saved rbx
+ [rsp+0x58] - ret
+
+ Generated code subroutine call frame:
+ [rsp+0x00] - rcx home/scratch
+ [rsp+0x08] - rdx home/scratch
+ [rsp+0x10] - r8 home/scratch
+ [rsp+0x18] - r9 home/scratch
+ [rsp+0x20] - scratch
+ [rsp+0x28] - ret
+ ...
+ - rcx home/scratch
+ - rdx home/scratch
+ - r8 home/scratch
+ - r9 home/scratch
+ - scratch
+ - saved r15
+ - saved r14
+ - saved r13
+ - saved r12
+ ...
***************************************************************************/
#include "emu.h"
#include "drcbex64.h"
+#include "drcbeut.h"
+#include "x86log.h"
+
#include "debug/debugcpu.h"
#include "emuopts.h"
+#include "mfpresolve.h"
+
+#include "asmjit/src/asmjit/asmjit.h"
+
#include <cstddef>
+#include <cstdio>
+#include <cstdlib>
+#include <vector>
// This is a trick to make it build on Android where the ARM SDK declares ::REG_Rn
// and the x64 SDK declares ::REG_Exx and ::REG_Rxx
namespace drc {
+namespace {
+
using namespace uml;
using namespace asmjit;
using namespace asmjit::x86;
-
//**************************************************************************
// DEBUGGING
//**************************************************************************
@@ -213,7 +253,7 @@ const uint32_t PTYPE_MR = PTYPE_M | PTYPE_R;
const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
-#ifdef X64_WINDOWS_ABI
+#ifdef _WIN32
const Gp::Id REG_PARAM1 = Gp::kIdCx;
const Gp::Id REG_PARAM2 = Gp::kIdDx;
@@ -229,54 +269,28 @@ const Gp::Id REG_PARAM4 = Gp::kIdCx;
#endif
-
-
-//**************************************************************************
-// MACROS
-//**************************************************************************
-
-#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
-#define X86_NOT_CONDITION(condition) negateCond(condition_map[condition - uml::COND_Z])
-
-#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
-#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
-#define assert_no_flags(inst) assert((inst).flags() == 0)
-#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
-
-
-
-//**************************************************************************
-// GLOBAL VARIABLES
-//**************************************************************************
-
-drcbe_x64::opcode_generate_func drcbe_x64::s_opcode_table[OP_MAX];
-
-// size-to-mask table
-//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
+const Xmm REG_FSCRATCH1 = xmm0;
+const Xmm REG_FSCRATCH2 = xmm1;
// register mapping tables
-static const Gp::Id int_register_map[REG_I_COUNT] =
+const Gp::Id int_register_map[REG_I_COUNT] =
{
-#ifdef X64_WINDOWS_ABI
+#ifdef _WIN32
Gp::kIdBx, Gp::kIdSi, Gp::kIdDi, Gp::kIdR12, Gp::kIdR13, Gp::kIdR14, Gp::kIdR15,
#else
Gp::kIdBx, Gp::kIdR12, Gp::kIdR13, Gp::kIdR14, Gp::kIdR15
#endif
};
-static uint32_t float_register_map[REG_F_COUNT] =
+uint32_t float_register_map[REG_F_COUNT] =
{
-#ifdef X64_WINDOWS_ABI
+#ifdef _WIN32
6, 7, 8, 9, 10, 11, 12, 13, 14, 15
-#else
- // on AMD x64 ABI, XMM0-7 are FP function args. since this code has no args, and we
- // save/restore them around CALLC, they should be safe for our use.
- 0, 1, 2, 3, 4, 5, 6, 7
#endif
};
// condition mapping table
-static const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
+const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
{
CondCode::kZ, // COND_Z = 0x80, requires Z
CondCode::kNZ, // COND_NZ, requires Z
@@ -298,7 +312,7 @@ static const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
#if 0
// rounding mode mapping table
-static const uint8_t fprnd_map[4] =
+const uint8_t fprnd_map[4] =
{
FPRND_CHOP, // ROUND_TRUNC, truncate
FPRND_NEAR, // ROUND_ROUND, round
@@ -307,109 +321,419 @@ static const uint8_t fprnd_map[4] =
};
#endif
+// size-to-mask table
+//const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
+
+
+
+//**************************************************************************
+// MACROS
+//**************************************************************************
+
+#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
+#define X86_NOT_CONDITION(condition) negateCond(condition_map[condition - uml::COND_Z])
+
+#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
+#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
+#define assert_no_flags(inst) assert((inst).flags() == 0)
+#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
+
+
+
+class ThrowableErrorHandler : public ErrorHandler
+{
+public:
+ void handleError(Error err, const char *message, BaseEmitter *origin) override
+ {
+ throw emu_fatalerror("asmjit error %d: %s", err, message);
+ }
+};
+
+
+inline bool is_nonvolatile_register(Gp reg)
+{
+ auto const r = reg.r64();
+#ifdef _WIN32
+ return (r == rbx) || (r == rsi) || (r == rdi) || (r == rbp) || (r == r12) || (r == r13) || (r == r14) || (r == r15);
+#else
+ return (r == rbx) || (r == rbp) || (r == r12) || (r == r13) || (r == r14) || (r == r15);
+#endif
+}
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class drcbe_x64 : public drcbe_interface
+{
+ using x86_entry_point_func = uint32_t (*)(uint8_t *rbpvalue, x86code *entry);
+
+public:
+ // construction/destruction
+ drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
+ virtual ~drcbe_x64();
+
+ // required overrides
+ virtual void reset() override;
+ virtual int execute(uml::code_handle &entry) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) const noexcept override;
+ virtual void get_info(drcbe_info &info) const noexcept override;
+ virtual bool logging() const noexcept override { return m_log != nullptr; }
+
+private:
+ // a be_parameter is similar to a uml::parameter but maps to native registers/memory
+ class be_parameter
+ {
+ public:
+ // parameter types
+ enum be_parameter_type
+ {
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
+ PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
+ PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_MAX
+ };
+
+ // represents the value of a parameter
+ typedef uint64_t be_parameter_value;
+
+ // construction
+ be_parameter() : m_type(PTYPE_NONE), m_value(0), m_coldreg(false) { }
+ be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val), m_coldreg(false) { }
+ be_parameter(drcbe_x64 &drcbe, const uml::parameter &param, uint32_t allowed);
+ be_parameter(const be_parameter &param) = default;
+
+ // creators for types that don't safely default
+ static be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
+ static be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
+ static be_parameter make_memory(void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(base)); }
+ static be_parameter make_memory(const void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(const_cast<void *>(base))); }
+
+ // operators
+ bool operator==(be_parameter const &rhs) const { return (m_type == rhs.m_type) && (m_value == rhs.m_value); }
+ bool operator!=(be_parameter const &rhs) const { return (m_type != rhs.m_type) || (m_value != rhs.m_value); }
+
+ // getters
+ be_parameter_type type() const { return m_type; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint32_t ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ uint32_t freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
+
+ // type queries
+ bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
+ bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
+ bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
+ bool is_memory() const { return (m_type == PTYPE_MEMORY); }
+
+ // other queries
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+ bool is_cold_register() const { return m_coldreg; }
+
+ // helpers
+ Gp select_register(Gp defreg) const;
+ Xmm select_register(Xmm defreg) const;
+ Gp select_register(Gp defreg, be_parameter const &checkparam) const;
+ Gp select_register(Gp defreg, be_parameter const &checkparam, be_parameter const &checkparam2) const;
+ Xmm select_register(Xmm defreg, be_parameter const &checkparam) const;
+
+ private:
+ // HACK: leftover from x86emit
+ static inline constexpr int REG_MAX = 16;
+
+ // private constructor
+ be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value), m_coldreg(false) { }
+
+ // internals
+ be_parameter_type m_type; // parameter type
+ be_parameter_value m_value; // parameter value
+ bool m_coldreg; // true for a UML register held in memory
+ };
+
+ // state to live in the near cache
+ struct near_state
+ {
+ x86code * debug_log_hashjmp; // hashjmp debugging
+ x86code * debug_log_hashjmp_fail; // hashjmp debugging
+
+ uint32_t ssemode; // saved SSE mode
+ uint32_t ssemodesave; // temporary location for saving
+ uint32_t ssecontrol[4]; // copy of the sse_control array
+ float single1; // 1.0 in single-precision
+ double double1; // 1.0 in double-precision
+
+ void * stacksave; // saved stack pointer
+
+ uint8_t flagsmap[0x1000]; // flags map
+ uint64_t flagsunmap[0x20]; // flags unmapper
+ };
+
+ // resolved memory handler functions
+ struct memory_accessors
+ {
+ resolved_memory_accessors resolved;
+ address_space::specific_access_info specific;
+ offs_t address_mask;
+ bool no_mask;
+ bool has_high_bits;
+ bool mask_high_bits;
+ };
+
+ // helpers
+ Mem MABS(const void *ptr, const uint32_t size = 0) const { return Mem(rbp, offset_from_rbp(ptr), size); }
+ bool short_immediate(int64_t immediate) const { return (int32_t)immediate == immediate; }
+ void normalize_commutative(be_parameter &inner, be_parameter &outer);
+ void normalize_commutative(const be_parameter &dst, be_parameter &inner, be_parameter &outer);
+ int32_t offset_from_rbp(const void *ptr) const;
+ Gp get_base_register_and_offset(Assembler &a, void *target, Gp const &reg, int32_t &offset);
+ void smart_call_r64(Assembler &a, x86code *target, Gp const &reg) const;
+ void smart_call_m64(Assembler &a, x86code **target) const;
+ void emit_memaccess_setup(Assembler &a, const memory_accessors &accessors, const address_space::specific_access_info::side &side) const;
+
+ [[noreturn]] void end_of_block() const;
+ static void debug_log_hashjmp(offs_t pc, int mode);
+ static void debug_log_hashjmp_fail();
+
+ void generate_one(Assembler &a, const uml::instruction &inst);
+
+ // code generators
+ void op_handle(Assembler &a, const uml::instruction &inst);
+ void op_hash(Assembler &a, const uml::instruction &inst);
+ void op_label(Assembler &a, const uml::instruction &inst);
+ void op_comment(Assembler &a, const uml::instruction &inst);
+ void op_mapvar(Assembler &a, const uml::instruction &inst);
+
+ void op_nop(Assembler &a, const uml::instruction &inst);
+ void op_break(Assembler &a, const uml::instruction &inst);
+ void op_debug(Assembler &a, const uml::instruction &inst);
+ void op_exit(Assembler &a, const uml::instruction &inst);
+ void op_hashjmp(Assembler &a, const uml::instruction &inst);
+ void op_jmp(Assembler &a, const uml::instruction &inst);
+ void op_exh(Assembler &a, const uml::instruction &inst);
+ void op_callh(Assembler &a, const uml::instruction &inst);
+ void op_ret(Assembler &a, const uml::instruction &inst);
+ void op_callc(Assembler &a, const uml::instruction &inst);
+ void op_recover(Assembler &a, const uml::instruction &inst);
+
+ void op_setfmod(Assembler &a, const uml::instruction &inst);
+ void op_getfmod(Assembler &a, const uml::instruction &inst);
+ void op_getexp(Assembler &a, const uml::instruction &inst);
+ void op_getflgs(Assembler &a, const uml::instruction &inst);
+ void op_setflgs(Assembler &a, const uml::instruction &inst);
+ void op_save(Assembler &a, const uml::instruction &inst);
+ void op_restore(Assembler &a, const uml::instruction &inst);
+
+ void op_load(Assembler &a, const uml::instruction &inst);
+ void op_loads(Assembler &a, const uml::instruction &inst);
+ void op_store(Assembler &a, const uml::instruction &inst);
+ void op_read(Assembler &a, const uml::instruction &inst);
+ void op_readm(Assembler &a, const uml::instruction &inst);
+ void op_write(Assembler &a, const uml::instruction &inst);
+ void op_writem(Assembler &a, const uml::instruction &inst);
+ void op_carry(Assembler &a, const uml::instruction &inst);
+ void op_set(Assembler &a, const uml::instruction &inst);
+ void op_mov(Assembler &a, const uml::instruction &inst);
+ void op_sext(Assembler &a, const uml::instruction &inst);
+ void op_roland(Assembler &a, const uml::instruction &inst);
+ void op_rolins(Assembler &a, const uml::instruction &inst);
+ void op_add(Assembler &a, const uml::instruction &inst);
+ void op_addc(Assembler &a, const uml::instruction &inst);
+ void op_sub(Assembler &a, const uml::instruction &inst);
+ void op_subc(Assembler &a, const uml::instruction &inst);
+ void op_cmp(Assembler &a, const uml::instruction &inst);
+ template <Inst::Id Opcode> void op_mul(Assembler &a, const uml::instruction &inst);
+ template <Inst::Id Opcode> void op_mullw(Assembler &a, const uml::instruction &inst);
+ void op_divu(Assembler &a, const uml::instruction &inst);
+ void op_divs(Assembler &a, const uml::instruction &inst);
+ void op_and(Assembler &a, const uml::instruction &inst);
+ void op_test(Assembler &a, const uml::instruction &inst);
+ void op_or(Assembler &a, const uml::instruction &inst);
+ void op_xor(Assembler &a, const uml::instruction &inst);
+ void op_lzcnt(Assembler &a, const uml::instruction &inst);
+ void op_tzcnt(Assembler &a, const uml::instruction &inst);
+ void op_bswap(Assembler &a, const uml::instruction &inst);
+ template <Inst::Id Opcode> void op_shift(Assembler &a, const uml::instruction &inst);
+
+ void op_fload(Assembler &a, const uml::instruction &inst);
+ void op_fstore(Assembler &a, const uml::instruction &inst);
+ void op_fread(Assembler &a, const uml::instruction &inst);
+ void op_fwrite(Assembler &a, const uml::instruction &inst);
+ void op_fmov(Assembler &a, const uml::instruction &inst);
+ void op_ftoint(Assembler &a, const uml::instruction &inst);
+ void op_ffrint(Assembler &a, const uml::instruction &inst);
+ void op_ffrflt(Assembler &a, const uml::instruction &inst);
+ void op_frnds(Assembler &a, const uml::instruction &inst);
+ void op_fadd(Assembler &a, const uml::instruction &inst);
+ void op_fsub(Assembler &a, const uml::instruction &inst);
+ void op_fcmp(Assembler &a, const uml::instruction &inst);
+ void op_fmul(Assembler &a, const uml::instruction &inst);
+ void op_fdiv(Assembler &a, const uml::instruction &inst);
+ void op_fneg(Assembler &a, const uml::instruction &inst);
+ void op_fabs(Assembler &a, const uml::instruction &inst);
+ void op_fsqrt(Assembler &a, const uml::instruction &inst);
+ void op_frecip(Assembler &a, const uml::instruction &inst);
+ void op_frsqrt(Assembler &a, const uml::instruction &inst);
+ void op_fcopyi(Assembler &a, const uml::instruction &inst);
+ void op_icopyf(Assembler &a, const uml::instruction &inst);
+
+ // alu and shift operation helpers
+ static bool ones(u64 const value, unsigned const size) noexcept { return (size == 4) ? u32(value) == 0xffffffffU : value == 0xffffffff'ffffffffULL; }
+ template <typename T>
+ void alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, T &&optimize);
+ void alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param) { alu_op_param(a, opcode, dst, param, [] (Assembler &a, Operand const &dst, be_parameter const &src) { return false; }); }
+ void shift_op_param(Assembler &a, Inst::Id const opcode, size_t opsize, Operand const &dst, be_parameter const &param, u8 update_flags);
+
+ // parameter helpers
+ void mov_reg_param(Assembler &a, Gp const &reg, be_parameter const &param, bool const keepflags = false);
+ void mov_param_reg(Assembler &a, be_parameter const &param, Gp const &reg);
+ void mov_mem_param(Assembler &a, Mem const &memref, be_parameter const &param);
+
+ // special-case move helpers
+ void movsx_r64_p32(Assembler &a, Gp const &reg, be_parameter const &param);
+ void mov_r64_imm(Assembler &a, Gp const &reg, uint64_t const imm) const;
+
+ // floating-point helpers
+ void movss_r128_p32(Assembler &a, Xmm const &reg, be_parameter const &param);
+ void movss_p32_r128(Assembler &a, be_parameter const &param, Xmm const &reg);
+ void movsd_r128_p64(Assembler &a, Xmm const &reg, be_parameter const &param);
+ void movsd_p64_r128(Assembler &a, be_parameter const &param, Xmm const &reg);
+
+ void calculate_status_flags(Assembler &a, uint32_t instsize, Operand const &dst, u8 flags);
+ void calculate_status_flags_mul(Assembler &a, uint32_t instsize, Gp const &lo, Gp const &hi);
+ void calculate_status_flags_mul_low(Assembler &a, uint32_t instsize, Gp const &lo);
+
+ size_t emit(CodeHolder &ch);
+
+ // internal state
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ x86log_context * m_log; // logging
+ FILE * m_log_asmjit;
+
+ uint32_t * m_absmask32; // absolute value mask (32-bit)
+ uint64_t * m_absmask64; // absolute value mask (32-bit)
+ uint8_t * m_rbpvalue; // value of RBP
+
+ x86_entry_point_func m_entry; // entry point
+ x86code * m_exit; // exit point
+ x86code * m_nocode; // nocode handler
+ x86code * m_endofblock; // end of block handler
+
+ near_state & m_near;
+
+ resolved_member_function m_debug_cpu_instruction_hook;
+ resolved_member_function m_drcmap_get_value;
+ std::vector<memory_accessors> m_memory_accessors;
+};
+
//**************************************************************************
// TABLES
//**************************************************************************
-const drcbe_x64::opcode_table_entry drcbe_x64::s_opcode_table_source[] =
+inline void drcbe_x64::generate_one(Assembler &a, const uml::instruction &inst)
{
+ switch (inst.opcode())
+ {
// Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x64::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x64::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x64::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x64::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x64::op_mapvar }, // MAPVAR mapvar,value
+ case uml::OP_HANDLE: op_handle(a, inst); break; // HANDLE handle
+ case uml::OP_HASH: op_hash(a, inst); break; // HASH mode,pc
+ case uml::OP_LABEL: op_label(a, inst); break; // LABEL imm
+ case uml::OP_COMMENT: op_comment(a, inst); break; // COMMENT string
+ case uml::OP_MAPVAR: op_mapvar(a, inst); break; // MAPVAR mapvar,value
// Control Flow Operations
- { uml::OP_NOP, &drcbe_x64::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x64::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x64::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x64::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x64::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x64::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x64::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x64::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x64::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x64::op_recover }, // RECOVER dst,mapvar
+ case uml::OP_NOP: op_nop(a, inst); break; // NOP
+ case uml::OP_BREAK: op_break(a, inst); break; // BREAK
+ case uml::OP_DEBUG: op_debug(a, inst); break; // DEBUG pc
+ case uml::OP_EXIT: op_exit(a, inst); break; // EXIT src1[,c]
+ case uml::OP_HASHJMP: op_hashjmp(a, inst); break; // HASHJMP mode,pc,handle
+ case uml::OP_JMP: op_jmp(a, inst); break; // JMP imm[,c]
+ case uml::OP_EXH: op_exh(a, inst); break; // EXH handle,param[,c]
+ case uml::OP_CALLH: op_callh(a, inst); break; // CALLH handle[,c]
+ case uml::OP_RET: op_ret(a, inst); break; // RET [c]
+ case uml::OP_CALLC: op_callc(a, inst); break; // CALLC func,ptr[,c]
+ case uml::OP_RECOVER: op_recover(a, inst); break; // RECOVER dst,mapvar
// Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x64::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x64::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x64::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x64::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x64::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x64::op_restore }, // RESTORE dst
+ case uml::OP_SETFMOD: op_setfmod(a, inst); break; // SETFMOD src
+ case uml::OP_GETFMOD: op_getfmod(a, inst); break; // GETFMOD dst
+ case uml::OP_GETEXP: op_getexp(a, inst); break; // GETEXP dst
+ case uml::OP_GETFLGS: op_getflgs(a, inst); break; // GETFLGS dst[,f]
+ case uml::OP_SETFLGS: op_setflgs(a, inst); break; // SETFLGS src
+ case uml::OP_SAVE: op_save(a, inst); break; // SAVE dst
+ case uml::OP_RESTORE: op_restore(a, inst); break; // RESTORE dst
// Integer Operations
- { uml::OP_LOAD, &drcbe_x64::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x64::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x64::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x64::op_read }, // READ dst,src1,spacesize
- { uml::OP_READM, &drcbe_x64::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x64::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x64::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x64::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x64::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x64::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x64::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x64::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x64::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x64::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x64::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x64::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x64::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x64::op_cmp }, // CMP src1,src2[,f]
- { uml::OP_MULU, &drcbe_x64::op_mulu }, // MULU dst,edst,src1,src2[,f]
- { uml::OP_MULS, &drcbe_x64::op_muls }, // MULS dst,edst,src1,src2[,f]
- { uml::OP_DIVU, &drcbe_x64::op_divu }, // DIVU dst,edst,src1,src2[,f]
- { uml::OP_DIVS, &drcbe_x64::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x64::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x64::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x64::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x64::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x64::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_TZCNT, &drcbe_x64::op_tzcnt }, // TZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x64::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x64::op_shift<Inst::kIdShl> }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x64::op_shift<Inst::kIdShr> }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x64::op_shift<Inst::kIdSar> }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x64::op_shift<Inst::kIdRol> }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x64::op_shift<Inst::kIdRcl> }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x64::op_shift<Inst::kIdRor> }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x64::op_shift<Inst::kIdRcr> }, // RORC dst,src,count[,f]
+ case uml::OP_LOAD: op_load(a, inst); break; // LOAD dst,base,index,size
+ case uml::OP_LOADS: op_loads(a, inst); break; // LOADS dst,base,index,size
+ case uml::OP_STORE: op_store(a, inst); break; // STORE base,index,src,size
+ case uml::OP_READ: op_read(a, inst); break; // READ dst,src1,spacesize
+ case uml::OP_READM: op_readm(a, inst); break; // READM dst,src1,mask,spacesize
+ case uml::OP_WRITE: op_write(a, inst); break; // WRITE dst,src1,spacesize
+ case uml::OP_WRITEM: op_writem(a, inst); break; // WRITEM dst,src1,spacesize
+ case uml::OP_CARRY: op_carry(a, inst); break; // CARRY src,bitnum
+ case uml::OP_SET: op_set(a, inst); break; // SET dst,c
+ case uml::OP_MOV: op_mov(a, inst); break; // MOV dst,src[,c]
+ case uml::OP_SEXT: op_sext(a, inst); break; // SEXT dst,src
+ case uml::OP_ROLAND: op_roland(a, inst); break; // ROLAND dst,src1,src2,src3
+ case uml::OP_ROLINS: op_rolins(a, inst); break; // ROLINS dst,src1,src2,src3
+ case uml::OP_ADD: op_add(a, inst); break; // ADD dst,src1,src2[,f]
+ case uml::OP_ADDC: op_addc(a, inst); break; // ADDC dst,src1,src2[,f]
+ case uml::OP_SUB: op_sub(a, inst); break; // SUB dst,src1,src2[,f]
+ case uml::OP_SUBB: op_subc(a, inst); break; // SUBB dst,src1,src2[,f]
+ case uml::OP_CMP: op_cmp(a, inst); break; // CMP src1,src2[,f]
+ case uml::OP_MULU: op_mul<Inst::kIdMul>(a, inst); break; // MULU dst,edst,src1,src2[,f]
+ case uml::OP_MULULW: op_mullw<Inst::kIdMul>(a, inst); break; // MULULW dst,src1,src2[,f]
+ case uml::OP_MULS: op_mul<Inst::kIdImul>(a, inst); break; // MULS dst,edst,src1,src2[,f]
+ case uml::OP_MULSLW: op_mullw<Inst::kIdImul>(a, inst); break; // MULSLW dst,src1,src2[,f]
+ case uml::OP_DIVU: op_divu(a, inst); break; // DIVU dst,edst,src1,src2[,f]
+ case uml::OP_DIVS: op_divs(a, inst); break; // DIVS dst,edst,src1,src2[,f]
+ case uml::OP_AND: op_and(a, inst); break; // AND dst,src1,src2[,f]
+ case uml::OP_TEST: op_test(a, inst); break; // TEST src1,src2[,f]
+ case uml::OP_OR: op_or(a, inst); break; // OR dst,src1,src2[,f]
+ case uml::OP_XOR: op_xor(a, inst); break; // XOR dst,src1,src2[,f]
+ case uml::OP_LZCNT: op_lzcnt(a, inst); break; // LZCNT dst,src[,f]
+ case uml::OP_TZCNT: op_tzcnt(a, inst); break; // TZCNT dst,src[,f]
+ case uml::OP_BSWAP: op_bswap(a, inst); break; // BSWAP dst,src
+ case uml::OP_SHL: op_shift<Inst::kIdShl>(a, inst); break; // SHL dst,src,count[,f]
+ case uml::OP_SHR: op_shift<Inst::kIdShr>(a, inst); break; // SHR dst,src,count[,f]
+ case uml::OP_SAR: op_shift<Inst::kIdSar>(a, inst); break; // SAR dst,src,count[,f]
+ case uml::OP_ROL: op_shift<Inst::kIdRol>(a, inst); break; // ROL dst,src,count[,f]
+ case uml::OP_ROLC: op_shift<Inst::kIdRcl>(a, inst); break; // ROLC dst,src,count[,f]
+ case uml::OP_ROR: op_shift<Inst::kIdRor>(a, inst); break; // ROR dst,src,count[,f]
+ case uml::OP_RORC: op_shift<Inst::kIdRcr>(a, inst); break; // RORC dst,src,count[,f]
// Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x64::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x64::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x64::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x64::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x64::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x64::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x64::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x64::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x64::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x64::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x64::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x64::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x64::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x64::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x64::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x64::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x64::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x64::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x64::op_frsqrt }, // FRSQRT dst,src1
- { uml::OP_FCOPYI, &drcbe_x64::op_fcopyi }, // FCOPYI dst,src
- { uml::OP_ICOPYF, &drcbe_x64::op_icopyf } // ICOPYF dst,src
-};
-
-class ThrowableErrorHandler : public ErrorHandler
-{
-public:
- void handleError(Error err, const char *message, BaseEmitter *origin) override
- {
- throw emu_fatalerror("asmjit error %d: %s", err, message);
+ case uml::OP_FLOAD: op_fload(a, inst); break; // FLOAD dst,base,index
+ case uml::OP_FSTORE: op_fstore(a, inst); break; // FSTORE base,index,src
+ case uml::OP_FREAD: op_fread(a, inst); break; // FREAD dst,space,src1
+ case uml::OP_FWRITE: op_fwrite(a, inst); break; // FWRITE space,dst,src1
+ case uml::OP_FMOV: op_fmov(a, inst); break; // FMOV dst,src1[,c]
+ case uml::OP_FTOINT: op_ftoint(a, inst); break; // FTOINT dst,src1,size,round
+ case uml::OP_FFRINT: op_ffrint(a, inst); break; // FFRINT dst,src1,size
+ case uml::OP_FFRFLT: op_ffrflt(a, inst); break; // FFRFLT dst,src1,size
+ case uml::OP_FRNDS: op_frnds(a, inst); break; // FRNDS dst,src1
+ case uml::OP_FADD: op_fadd(a, inst); break; // FADD dst,src1,src2
+ case uml::OP_FSUB: op_fsub(a, inst); break; // FSUB dst,src1,src2
+ case uml::OP_FCMP: op_fcmp(a, inst); break; // FCMP src1,src2
+ case uml::OP_FMUL: op_fmul(a, inst); break; // FMUL dst,src1,src2
+ case uml::OP_FDIV: op_fdiv(a, inst); break; // FDIV dst,src1,src2
+ case uml::OP_FNEG: op_fneg(a, inst); break; // FNEG dst,src1
+ case uml::OP_FABS: op_fabs(a, inst); break; // FABS dst,src1
+ case uml::OP_FSQRT: op_fsqrt(a, inst); break; // FSQRT dst,src1
+ case uml::OP_FRECIP: op_frecip(a, inst); break; // FRECIP dst,src1
+ case uml::OP_FRSQRT: op_frsqrt(a, inst); break; // FRSQRT dst,src1
+ case uml::OP_FCOPYI: op_fcopyi(a, inst); break; // FCOPYI dst,src
+ case uml::OP_ICOPYF: op_icopyf(a, inst); break; // ICOPYF dst,src
+
+ default: throw emu_fatalerror("drcbe_x64(%s): unhandled opcode %u\n", m_device.tag(), inst.opcode());
}
};
@@ -447,9 +771,14 @@ drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter &param,
assert(allowed & PTYPE_M);
regnum = int_register_map[param.ireg() - REG_I0];
if (regnum != 0)
+ {
*this = make_ireg(regnum);
+ }
else
+ {
*this = make_memory(&drcbe.m_state.r[param.ireg() - REG_I0]);
+ m_coldreg = true;
+ }
break;
// if a register maps to a register, keep it as a register; otherwise map it to memory
@@ -458,9 +787,14 @@ drcbe_x64::be_parameter::be_parameter(drcbe_x64 &drcbe, const parameter &param,
assert(allowed & PTYPE_M);
regnum = float_register_map[param.freg() - REG_F0];
if (regnum != 0)
+ {
*this = make_freg(regnum);
+ }
else
+ {
*this = make_memory(&drcbe.m_state.f[param.freg() - REG_F0]);
+ m_coldreg = true;
+ }
break;
// everything else is unexpected
@@ -511,28 +845,30 @@ Xmm drcbe_x64::be_parameter::select_register(Xmm defreg, be_parameter const &che
return select_register(defreg);
}
-//-------------------------------------------------
-// select_register - select a register to use,
-// avoiding conflicts with the optional
-// checkparam
-//-------------------------------------------------
-
inline void drcbe_x64::normalize_commutative(be_parameter &inner, be_parameter &outer)
{
+ using std::swap;
+
// if the inner parameter is a memory operand, push it to the outer
- if (inner.is_memory())
- {
- be_parameter temp = inner;
- inner = outer;
- outer = temp;
- }
+ if (inner.is_memory() && !outer.is_memory() && !outer.is_immediate())
+ swap(inner, outer);
// if the inner parameter is an immediate, push it to the outer
- if (inner.is_immediate())
+ if (inner.is_immediate() && !outer.is_immediate())
+ swap(inner, outer);
+}
+
+inline void drcbe_x64::normalize_commutative(const be_parameter &dst, be_parameter &inner, be_parameter &outer)
+{
+ // if the destination is the same as the outer parameter, swap the inner and outer parameters
+ if (dst == outer)
{
- be_parameter temp = inner;
- inner = outer;
- outer = temp;
+ using std::swap;
+ swap(inner, outer);
+ }
+ else
+ {
+ normalize_commutative(inner, outer);
}
}
@@ -579,7 +915,7 @@ inline Gp drcbe_x64::get_base_register_and_offset(Assembler &a, void *target, Gp
// directly or via a call through pointer
//-------------------------------------------------
-inline void drcbe_x64::smart_call_r64(Assembler &a, x86code *target, Gp const &reg)
+inline void drcbe_x64::smart_call_r64(Assembler &a, x86code *target, Gp const &reg) const
{
const int64_t delta = target - (x86code *)(a.code()->baseAddress() + a.offset() + 5);
if (short_immediate(delta))
@@ -597,7 +933,7 @@ inline void drcbe_x64::smart_call_r64(Assembler &a, x86code *target, Gp const &r
// directly or via a call through pointer
//-------------------------------------------------
-inline void drcbe_x64::smart_call_m64(Assembler &a, x86code **target)
+inline void drcbe_x64::smart_call_m64(Assembler &a, x86code **target) const
{
const int64_t delta = *target - (x86code *)(a.code()->baseAddress() + a.offset() + 5);
if (short_immediate(delta))
@@ -607,6 +943,54 @@ inline void drcbe_x64::smart_call_m64(Assembler &a, x86code **target)
}
+//-------------------------------------------------
+// emit_memaccess_setup - set up for call to a
+// memory access handler
+//-------------------------------------------------
+
+void drcbe_x64::emit_memaccess_setup(Assembler &a, const memory_accessors &accessors, const address_space::specific_access_info::side &side) const
+{
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy address for dispatch index
+ if (!accessors.no_mask)
+ a.and_(Gpd(REG_PARAM2), imm(accessors.address_mask)); // apply address mask
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.shr(r10d, accessors.specific.low_bits); // shift off low bits
+ mov_r64_imm(a, rax, uintptr_t(side.dispatch)); // load dispatch table pointer
+ if (accessors.has_high_bits)
+ {
+ if (accessors.mask_high_bits)
+ {
+ if (accessors.specific.low_bits)
+ {
+ a.mov(r10d, Gpd(REG_PARAM2)); // save masked address
+ a.shr(Gpd(REG_PARAM2), accessors.specific.low_bits); // shift off low bits
+ }
+ a.mov(Gpq(REG_PARAM1), ptr(rax, Gpq(REG_PARAM2), 3)); // load dispatch table entry
+ if (accessors.specific.low_bits)
+ a.mov(Gpd(REG_PARAM2), r10d); // restore masked address
+ }
+ else
+ {
+ a.mov(Gpq(REG_PARAM1), ptr(rax, r10, 3)); // load dispatch table entry
+ }
+ }
+ else
+ {
+ a.mov(Gpq(REG_PARAM1), ptr(rax)); // load dispatch table entry
+ }
+
+ if (side.is_virtual)
+ a.mov(rax, ptr(Gpq(REG_PARAM1), side.displacement)); // load vtable pointer
+ if (side.displacement)
+ a.add(Gpq(REG_PARAM1), side.displacement); // apply this pointer offset
+ if (side.is_virtual)
+ a.call(ptr(rax, side.function)); // call virtual member function
+ else
+ smart_call_r64(a, (x86code *)side.function, rax); // call non-virtual member function
+}
+
+
//**************************************************************************
// BACKEND CALLBACKS
@@ -628,6 +1012,7 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
, m_entry(nullptr)
, m_exit(nullptr)
, m_nocode(nullptr)
+ , m_endofblock(nullptr)
, m_near(*(near_state *)cache.alloc_near(sizeof(m_near)))
{
// build up necessary arrays
@@ -649,15 +1034,11 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
m_absmask64[0] = m_absmask64[1] = 0x7fffffffffffffffU;
// get pointers to C functions we need to call
- using debugger_hook_func = void (*)(device_debug *, offs_t);
- static const debugger_hook_func debugger_inst_hook = [] (device_debug *dbg, offs_t pc) { dbg->instruction_hook(pc); }; // TODO: kill trampoline if possible
- m_near.debug_cpu_instruction_hook = (x86code *)debugger_inst_hook;
if (LOG_HASHJMPS)
{
m_near.debug_log_hashjmp = (x86code *)debug_log_hashjmp;
m_near.debug_log_hashjmp_fail = (x86code *)debug_log_hashjmp_fail;
}
- m_near.drcmap_get_value = (x86code *)&drc_map_variables::static_get_value;
// build the flags map
for (int entry = 0; entry < std::size(m_near.flagsmap); entry++)
@@ -681,97 +1062,27 @@ drcbe_x64::drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
m_near.flagsunmap[entry] = flags;
}
- // resolve the actual addresses of the address space handlers
- auto const resolve_accessor =
- [] (resolved_handler &handler, address_space &space, auto accessor)
- {
- if (MAME_DELEGATE_USE_TYPE == MAME_DELEGATE_TYPE_ITANIUM)
- {
- struct { uintptr_t ptr; ptrdiff_t adj; } equiv;
- assert(sizeof(accessor) == sizeof(equiv));
- *reinterpret_cast<decltype(accessor) *>(&equiv) = accessor;
- handler.obj = uintptr_t(reinterpret_cast<u8 *>(&space) + equiv.adj);
- if (BIT(equiv.ptr, 0))
- {
- auto const vptr = *reinterpret_cast<u8 const *const *>(handler.obj) + equiv.ptr - 1;
- handler.func = *reinterpret_cast<x86code *const *>(vptr);
- }
- else
- {
- handler.func = reinterpret_cast<x86code *>(equiv.ptr);
- }
- }
- else if (MAME_DELEGATE_USE_TYPE == MAME_DELEGATE_TYPE_MSVC)
- {
- // interpret the pointer to member function ignoring the virtual inheritance variant
- struct single { uintptr_t ptr; };
- struct multi { uintptr_t ptr; int adj; };
- struct { uintptr_t ptr; int adj; int vadj; int vindex; } unknown;
- assert(sizeof(accessor) <= sizeof(unknown));
- *reinterpret_cast<decltype(accessor) *>(&unknown) = accessor;
- handler.func = reinterpret_cast<x86code *>(unknown.ptr);
- handler.obj = uintptr_t(&space);
- if ((sizeof(unknown) == sizeof(accessor)) && unknown.vindex)
- {
- handler.obj += unknown.vadj;
- auto const vptr = *reinterpret_cast<std::uint8_t const *const *>(handler.obj);
- handler.obj += *reinterpret_cast<int const *>(vptr + unknown.vindex);
- }
- if (sizeof(single) < sizeof(accessor))
- handler.obj += unknown.adj;
-
- // walk past thunks
- while (true)
- {
- if (0xe9 == handler.func[0])
- {
- // absolute jump with 32-bit displacement
- handler.func += 5 + *reinterpret_cast<s32 const *>(handler.func + 1);
- }
- else if ((0x48 == handler.func[0]) && (0x8b == handler.func[1]) && (0x01 == handler.func[2]) && (0xff == handler.func[3]) && ((0x60 == handler.func[4]) || (0xa0 == handler.func[4])))
- {
- // virtual function call thunk
- auto const vptr = *reinterpret_cast<std::uint8_t const *const *>(handler.obj);
- if (0x60 == handler.func[4])
- handler.func = *reinterpret_cast<x86code *const *>(vptr + *reinterpret_cast<s8 const *>(handler.func + 5));
- else
- handler.func = *reinterpret_cast<x86code *const *>(vptr + *reinterpret_cast<s32 const *>(handler.func + 5));
- }
- else
- {
- // not something we can easily bypass
- break;
- }
- }
- }
- };
- m_resolved_accessors.resize(m_space.size());
+ // resolve the actual addresses of member functions we need to call
+ m_drcmap_get_value.set(m_map, &drc_map_variables::get_value);
+ if (!m_drcmap_get_value)
+ throw emu_fatalerror("Error resolving map variable get value function!\n");
+ m_memory_accessors.resize(m_space.size());
for (int space = 0; m_space.size() > space; ++space)
{
if (m_space[space])
{
- resolve_accessor(m_resolved_accessors[space].read_byte, *m_space[space], static_cast<u8 (address_space::*)(offs_t) >(&address_space::read_byte));
- resolve_accessor(m_resolved_accessors[space].read_word, *m_space[space], static_cast<u16 (address_space::*)(offs_t) >(&address_space::read_word));
- resolve_accessor(m_resolved_accessors[space].read_word_masked, *m_space[space], static_cast<u16 (address_space::*)(offs_t, u16)>(&address_space::read_word));
- resolve_accessor(m_resolved_accessors[space].read_dword, *m_space[space], static_cast<u32 (address_space::*)(offs_t) >(&address_space::read_dword));
- resolve_accessor(m_resolved_accessors[space].read_dword_masked, *m_space[space], static_cast<u32 (address_space::*)(offs_t, u32)>(&address_space::read_dword));
- resolve_accessor(m_resolved_accessors[space].read_qword, *m_space[space], static_cast<u64 (address_space::*)(offs_t) >(&address_space::read_qword));
- resolve_accessor(m_resolved_accessors[space].read_qword_masked, *m_space[space], static_cast<u64 (address_space::*)(offs_t, u64)>(&address_space::read_qword));
-
- resolve_accessor(m_resolved_accessors[space].write_byte, *m_space[space], static_cast<void (address_space::*)(offs_t, u8) >(&address_space::write_byte));
- resolve_accessor(m_resolved_accessors[space].write_word, *m_space[space], static_cast<void (address_space::*)(offs_t, u16) >(&address_space::write_word));
- resolve_accessor(m_resolved_accessors[space].write_word_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u16, u16)>(&address_space::write_word));
- resolve_accessor(m_resolved_accessors[space].write_dword, *m_space[space], static_cast<void (address_space::*)(offs_t, u32) >(&address_space::write_dword));
- resolve_accessor(m_resolved_accessors[space].write_dword_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u32, u32)>(&address_space::write_dword));
- resolve_accessor(m_resolved_accessors[space].write_qword, *m_space[space], static_cast<void (address_space::*)(offs_t, u64) >(&address_space::write_qword));
- resolve_accessor(m_resolved_accessors[space].write_qword_masked, *m_space[space], static_cast<void (address_space::*)(offs_t, u64, u64)>(&address_space::write_qword));
+ auto &accessors = m_memory_accessors[space];
+ accessors.resolved.set(*m_space[space]);
+ accessors.specific = m_space[space]->specific_accessors();
+ accessors.address_mask = m_space[space]->addrmask() & make_bitmask<offs_t>(accessors.specific.address_width) & ~make_bitmask<offs_t>(accessors.specific.native_mask_bits);
+ offs_t const shiftedmask = accessors.address_mask >> accessors.specific.low_bits;
+ offs_t const nomask = ~offs_t(0);
+ accessors.no_mask = nomask == accessors.address_mask;
+ accessors.has_high_bits = shiftedmask != 0U;
+ accessors.mask_high_bits = !accessors.specific.low_bits || !BIT(accessors.address_mask, (sizeof(offs_t) * 8) - 1) || (shiftedmask & (shiftedmask + 1));
}
}
- // build the opcode table (static but it doesn't hurt to regenerate it)
- for (auto & elem : s_opcode_table_source)
- s_opcode_table[elem.opcode] = elem.func;
-
// create the log
if (device.machine().options().drc_log_native())
{
@@ -869,7 +1180,7 @@ void drcbe_x64::reset()
a.bind(a.newNamedLabel("entry_point"));
FuncDetail entry_point;
- entry_point.init(FuncSignatureT<uint32_t, uint8_t *, x86code *>(CallConvId::kHost), Environment::host());
+ entry_point.init(FuncSignature::build<uint32_t, uint8_t *, x86code *>(CallConvId::kHost), Environment::host());
FuncFrame frame;
frame.init(entry_point);
@@ -882,9 +1193,7 @@ void drcbe_x64::reset()
a.emitProlog(frame);
a.emitArgsAssignment(frame, args);
- a.sub(rsp, 32);
- a.mov(MABS(&m_near.hashstacksave), rsp);
- a.sub(rsp, 8);
+ a.sub(rsp, 40);
a.mov(MABS(&m_near.stacksave), rsp);
a.stmxcsr(MABS(&m_near.ssemode));
a.jmp(Gpq(REG_PARAM2));
@@ -893,23 +1202,31 @@ void drcbe_x64::reset()
m_exit = dst + a.offset();
a.bind(a.newNamedLabel("exit_point"));
a.ldmxcsr(MABS(&m_near.ssemode));
- a.mov(rsp, MABS(&m_near.hashstacksave));
- a.add(rsp, 32);
+ a.mov(rsp, MABS(&m_near.stacksave));
+ a.add(rsp, 40);
a.emitEpilog(frame);
// generate a no code point
m_nocode = dst + a.offset();
a.bind(a.newNamedLabel("nocode_point"));
- a.ret();
+ a.jmp(Gpq(REG_PARAM1));
+
+ // generate an end-of-block handler point
+ m_endofblock = dst + a.offset();
+ a.bind(a.newNamedLabel("end_of_block_point"));
+ auto const [entrypoint, adjusted] = util::resolve_member_function(&drcbe_x64::end_of_block, *this);
+ mov_r64_imm(a, Gpq(REG_PARAM1), adjusted);
+ smart_call_r64(a, (x86code *)entrypoint, rax);
// emit the generated code
- size_t bytes = emit(ch);
+ const size_t bytes = emit(ch);
- if (m_log != nullptr)
+ if (m_log)
{
x86log_disasm_code_range(m_log, "entry_point", dst, m_exit);
x86log_disasm_code_range(m_log, "exit_point", m_exit, m_nocode);
- x86log_disasm_code_range(m_log, "nocode_point", m_nocode, dst + bytes);
+ x86log_disasm_code_range(m_log, "nocode_point", m_nocode, m_endofblock);
+ x86log_disasm_code_range(m_log, "end_of_block", m_endofblock, dst + bytes);
}
// reset our hash tables
@@ -937,12 +1254,33 @@ int drcbe_x64::execute(code_handle &entry)
void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
+ // do this here because device.debug() isn't initialised at construction time
+ if (!m_debug_cpu_instruction_hook && (m_device.machine().debug_flags & DEBUG_FLAG_ENABLED))
+ {
+ m_debug_cpu_instruction_hook.set(*m_device.debug(), &device_debug::instruction_hook);
+ if (!m_debug_cpu_instruction_hook)
+ throw emu_fatalerror("Error resolving debugger instruction hook member function!\n");
+ }
+
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
m_map.block_begin(block);
- // compute the base by aligning the cache top to a cache line (assumed to be 64 bytes)
- x86code *dst = (x86code *)(uint64_t(m_cache.top() + 63) & ~63);
+ // compute the base by aligning the cache top to a cache line
+ auto [err, linesize] = osd_get_cache_line_size();
+ uintptr_t linemask = 63;
+ if (err)
+ {
+ osd_printf_verbose("Error getting cache line size (%s:%d %s), assuming 64 bytes\n", err.category().name(), err.value(), err.message());
+ }
+ else
+ {
+ assert(linesize);
+ linemask = linesize - 1;
+ for (unsigned shift = 1; linemask & (linemask + 1); ++shift)
+ linemask |= linemask >> shift;
+ }
+ x86code *dst = (x86code *)(uintptr_t(m_cache.top() + linemask) & ~linemask);
CodeHolder ch;
ch.init(Environment::host(), uint64_t(dst));
@@ -958,6 +1296,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
}
Assembler a(&ch);
+ a.addEncodingOptions(EncodingOptions::kOptimizedAlign);
if (logger.file())
a.addDiagnosticOptions(DiagnosticOptions::kValidateIntermediate);
@@ -966,13 +1305,12 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
for (int inum = 0; inum < numinst; inum++)
{
const instruction &inst = instlist[inum];
- assert(inst.opcode() < std::size(s_opcode_table));
// must remain in scope until output
std::string dasm;
// add a comment
- if (m_log != nullptr)
+ if (m_log)
{
dasm = inst.disasm(&m_drcuml);
@@ -990,8 +1328,16 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
}
// generate code
- (this->*s_opcode_table[inst.opcode()])(a, inst);
+ generate_one(a, inst);
+ }
+
+ // catch falling off the end of a block
+ if (m_log)
+ {
+ x86log_add_comment(m_log, dst + a.offset(), "%s", "end of block");
+ a.setInlineComment("end of block");
}
+ a.jmp(imm(m_endofblock));
// emit the generated code
size_t const bytes = emit(ch);
@@ -999,7 +1345,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
block.abort();
// log it
- if (m_log != nullptr)
+ if (m_log)
x86log_disasm_code_range(m_log, (blockname.empty()) ? "Unknown block" : blockname.c_str(), dst, dst + bytes);
// tell all of our utility objects that the block is finished
@@ -1013,7 +1359,7 @@ void drcbe_x64::generate(drcuml_block &block, const instruction *instlist, uint3
// exists in the hash table
//-------------------------------------------------
-bool drcbe_x64::hash_exists(uint32_t mode, uint32_t pc)
+bool drcbe_x64::hash_exists(uint32_t mode, uint32_t pc) const noexcept
{
return m_hash.code_exists(mode, pc);
}
@@ -1024,7 +1370,7 @@ bool drcbe_x64::hash_exists(uint32_t mode, uint32_t pc)
// back-end implementation
//-------------------------------------------------
-void drcbe_x64::get_info(drcbe_info &info)
+void drcbe_x64::get_info(drcbe_info &info) const noexcept
{
for (info.direct_iregs = 0; info.direct_iregs < REG_I_COUNT; info.direct_iregs++)
if (int_register_map[info.direct_iregs] == 0)
@@ -1034,9 +1380,10 @@ void drcbe_x64::get_info(drcbe_info &info)
break;
}
-void drcbe_x64::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, std::function<bool(Assembler &a, Operand const &dst, be_parameter const &src)> optimize)
+template <typename T>
+void drcbe_x64::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, T &&optimize)
{
- bool const is64 = dst.size() == 8;
+ bool const is64 = dst.x86RmSize() == 8;
if (param.is_immediate())
{
@@ -1045,11 +1392,13 @@ void drcbe_x64::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const
if (is64 && !short_immediate(param.immediate()))
{
// use scratch register for 64-bit immediate
- a.mov(r11, param.immediate()); // mov r11,param
- a.emit(opcode, dst, r11); // op dst,r11
+ a.mov(r11, param.immediate());
+ a.emit(opcode, dst, r11);
}
else
- a.emit(opcode, dst, param.immediate()); // op dst,param
+ {
+ a.emit(opcode, dst, param.immediate());
+ }
}
}
else if (param.is_memory())
@@ -1057,54 +1406,240 @@ void drcbe_x64::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const
if (dst.isMem())
{
// use temporary register for memory,memory
- Gp const tmp = is64 ? param.select_register(rax) : param.select_register(eax);
+ Gp const tmp = param.select_register(is64 ? Gp(rax) : Gp(eax));
- a.mov(tmp, MABS(param.memory())); // mov tmp,param
- a.emit(opcode, dst, tmp); // op [dst],tmp
+ a.mov(tmp, MABS(param.memory()));
+ a.emit(opcode, dst, tmp);
}
else if (opcode != Inst::kIdTest)
+ {
// most instructions are register,memory
- a.emit(opcode, dst, MABS(param.memory())); // op dst,[param]
+ a.emit(opcode, dst, MABS(param.memory()));
+ }
else
+ {
// test instruction requires memory,register
- a.emit(opcode, MABS(param.memory()), dst); // op [param],dst
+ a.emit(opcode, MABS(param.memory()), dst);
+ }
}
else if (param.is_int_register())
{
Gp const src = Gp::fromTypeAndId(is64 ? RegType::kX86_Gpq : RegType::kX86_Gpd, param.ireg());
- a.emit(opcode, dst, src); // op dst,param
+ a.emit(opcode, dst, src);
}
}
-void drcbe_x64::shift_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param)
+void drcbe_x64::calculate_status_flags(Assembler &a, uint32_t instsize, Operand const &dst, u8 flags)
{
- Operand shift = cl;
- if (param.is_immediate())
- shift = imm(param.immediate());
+ // calculate status flags in a way that does not modify any other status flags
+ uint32_t flagmask = 0;
+
+ // can't get FLAG_V from lahf so implement it using seto if needed in the future
+ if (flags & FLAG_C) flagmask |= 0x0100;
+ if (flags & FLAG_Z) flagmask |= 0x4000;
+ if (flags & FLAG_S) flagmask |= 0x8000;
+ if (flags & FLAG_U) flagmask |= 0x0400;
+
+ if ((flags & (FLAG_Z | FLAG_S)) == flags)
+ {
+ Gp tempreg = r10;
+ Gp tempreg2 = r11;
+
+ a.mov(tempreg, rax);
+
+ if (dst.isMem())
+ a.mov(tempreg2, dst.as<Mem>());
+ else
+ a.mov(tempreg2, dst.as<Gpq>().r64());
+
+ a.lahf();
+ a.and_(rax, ~flagmask);
+ if (instsize == 4)
+ a.test(tempreg2.r32(), tempreg2.r32());
+ else
+ a.test(tempreg2, tempreg2);
+ a.mov(tempreg2, rax);
+
+ a.lahf();
+ a.and_(rax, flagmask);
+ a.or_(rax, tempreg2);
+ a.sahf();
+
+ a.mov(rax, tempreg);
+ }
+ else
+ {
+ fatalerror("drcbe_x64::calculate_status_flags: unknown flag combination requested: %02x\n", flags);
+ }
+}
+
+void drcbe_x64::calculate_status_flags_mul(Assembler &a, uint32_t instsize, Gp const &lo, Gp const &hi)
+{
+ Gp tempreg = r11;
+ Gp tempreg2 = r10;
+
+ if (lo.id() == rax.id() || hi.id() == rax.id())
+ a.mov(tempreg2, rax);
+
+ a.seto(al);
+ a.movzx(rax, al); // clear out the rest of rax for lahf
+ a.mov(tempreg, rax);
+
+ a.lahf();
+ a.shl(tempreg, 16);
+ a.or_(tempreg, rax);
+
+ if (hi.id() == rax.id())
+ a.mov(rax, tempreg2);
+
+ if (instsize == 4)
+ a.test(hi.r32(), hi.r32());
+ else
+ a.test(hi, hi);
+
+ a.lahf(); // will have the sign flag + upper half zero
+ a.mov(hi, rax);
+
+ if (lo.id() == rax.id())
+ a.mov(rax, tempreg2);
+
+ if (instsize == 4)
+ a.test(lo.r32(), lo.r32());
+ else
+ a.test(lo, lo);
+
+ a.lahf(); // lower half zero
+ a.and_(rax, hi); // if top and bottom are zero then this will leave the zero flag
+ a.and_(rax, 0x4000); // zero
+ a.and_(hi, 0x8000); // sign
+ a.or_(rax, hi); // combine sign flag from top and zero flags for both
+
+ a.and_(tempreg, ~(0x4000 | 0x8000));
+ a.or_(tempreg, rax);
+
+ // restore overflow flag
+ a.mov(rax, tempreg);
+ a.shr(rax, 16);
+ a.add(al, 0x7f);
+
+ a.mov(rax, tempreg);
+ a.sahf();
+}
+
+void drcbe_x64::calculate_status_flags_mul_low(Assembler &a, uint32_t instsize, Gp const &lo)
+{
+ // calculate zero, sign flags based on the lower half of the result but keep the overflow from the multiplication
+ a.seto(dl);
+
+ if (instsize == 4)
+ a.test(lo.r32(), lo.r32());
else
- mov_reg_param(a, ecx, param);
+ a.test(lo, lo);
+
+ // restore overflow flag
+ a.lahf();
+ a.add(dl, 0x7f);
+ a.sahf();
+}
+
+void drcbe_x64::shift_op_param(Assembler &a, Inst::Id const opcode, size_t opsize, Operand const &dst, be_parameter const &param, u8 update_flags)
+{
+ // caller must place non-immediate shift in ECX
+ // FIXME: upper bits may not be cleared for 32-bit form when shift count is zero
+ const bool carryin = (opcode == Inst::kIdRcl) || (opcode == Inst::kIdRcr);
+
+ if (param.is_immediate())
+ {
+ const uint32_t bitshift = param.immediate() & (opsize * 8 - 1);
- a.emit(opcode, dst, shift);
+ if (bitshift)
+ a.emit(opcode, dst, imm(param.immediate()));
+ else if (!carryin && (update_flags & FLAG_C))
+ a.clc(); // throw away carry since it'll never be used
+
+ if (update_flags & (FLAG_S | FLAG_Z))
+ {
+ if (update_flags & FLAG_C)
+ calculate_status_flags(a, opsize, dst, FLAG_S | FLAG_Z);
+ else if (dst.isMem())
+ a.test(dst.as<Mem>(), util::make_bitmask<uint64_t>(opsize * 8));
+ else
+ a.test(dst.as<Gp>(), dst.as<Gp>());
+ }
+ }
+ else if (update_flags || carryin)
+ {
+ // TODO: flag update could be optimised
+ Label end;
+
+ const Gp shift = ecx;
+
+ if (carryin)
+ a.set(CondCode::kC, r10b);
+
+ a.and_(shift, (opsize * 8) - 1);
+
+ if ((update_flags & FLAG_C) || carryin)
+ {
+ const Label calc = a.newLabel();
+ end = a.newLabel();
+
+ a.short_().jnz(calc);
+
+ if (carryin)
+ a.shr(r10b, 1); // restore carry for rolc/rorc
+ else if (update_flags & FLAG_C)
+ a.clc(); // throw away carry since it'll never be used
+
+ a.short_().jmp(end);
+
+ a.bind(calc);
+ }
+
+ if (carryin)
+ a.shr(r10b, 1); // restore carry for rolc/rorc
+
+ a.emit(opcode, dst, cl);
+
+ if ((update_flags & FLAG_C) || carryin)
+ a.bind(end);
+
+ if (update_flags & (FLAG_S | FLAG_Z))
+ {
+ if (update_flags & FLAG_C)
+ calculate_status_flags(a, opsize, dst, FLAG_S | FLAG_Z);
+ else if (dst.isMem())
+ a.test(dst.as<Mem>(), util::make_bitmask<uint64_t>(opsize * 8));
+ else
+ a.test(dst.as<Gp>(), dst.as<Gp>());
+ }
+ }
+ else
+ {
+ a.emit(opcode, dst, cl);
+ }
}
void drcbe_x64::mov_reg_param(Assembler &a, Gp const &reg, be_parameter const &param, bool const keepflags)
{
if (param.is_immediate())
{
- if (param.immediate() == 0 && !keepflags)
- a.xor_(reg.r32(), reg.r32()); // xor reg,reg
+ if (!param.immediate() && !keepflags)
+ a.xor_(reg.r32(), reg.r32());
else if (reg.isGpq())
mov_r64_imm(a, reg, param.immediate());
else
- a.mov(reg, param.immediate()); // mov reg,param
+ a.mov(reg, param.immediate());
}
else if (param.is_memory())
- a.mov(reg, MABS(param.memory())); // mov reg,[param]
+ {
+ a.mov(reg, MABS(param.memory()));
+ }
else if (param.is_int_register())
{
if (reg.id() != param.ireg())
- a.mov(reg, Gp(reg, param.ireg())); // mov reg,param
+ a.mov(reg, Gp(reg, param.ireg()));
}
}
@@ -1113,11 +1648,13 @@ void drcbe_x64::mov_param_reg(Assembler &a, be_parameter const &param, Gp const
assert(!param.is_immediate());
if (param.is_memory())
- a.mov(MABS(param.memory()), reg); // mov [param],reg
+ {
+ a.mov(MABS(param.memory()), param.is_cold_register() ? reg.r64() : reg);
+ }
else if (param.is_int_register())
{
if (reg.id() != param.ireg())
- a.mov(Gp(reg, param.ireg()), reg); // mov param,reg
+ a.mov(Gp(reg, param.ireg()), reg);
}
}
@@ -1154,9 +1691,7 @@ void drcbe_x64::movsx_r64_p32(Assembler &a, Gp const &reg, be_parameter const &p
{
if (param.is_immediate())
{
- if (param.immediate() == 0)
- a.xor_(reg.r32(), reg.r32()); // xor reg,reg
- else if ((int32_t)param.immediate() >= 0)
+ if ((int32_t)param.immediate() >= 0)
a.mov(reg.r32(), param.immediate()); // mov reg,param
else
mov_r64_imm(a, reg, int32_t(param.immediate())); // mov reg,param
@@ -1167,14 +1702,24 @@ void drcbe_x64::movsx_r64_p32(Assembler &a, Gp const &reg, be_parameter const &p
a.movsxd(reg, Gpd(param.ireg())); // movsxd reg,param
}
-void drcbe_x64::mov_r64_imm(Assembler &a, Gp const &reg, uint64_t const imm)
+void drcbe_x64::mov_r64_imm(Assembler &a, Gp const &reg, uint64_t const imm) const
{
- if (u32(imm) == imm)
+ if (s32(u32(imm)) == s64(imm))
+ {
+ a.mov(reg.r64(), imm);
+ }
+ else if (u32(imm) == imm)
+ {
a.mov(reg.r32(), imm);
- else if (s32(imm) == imm)
- a.mov(reg.r64(), s32(imm));
+ }
else
- a.mov(reg.r64(), imm);
+ {
+ const int64_t delta = imm - (a.code()->baseAddress() + a.offset() + 7);
+ if (short_immediate(delta))
+ a.lea(reg.r64(), ptr(rip, delta));
+ else
+ a.mov(reg.r64(), imm);
+ }
}
@@ -1245,11 +1790,11 @@ void drcbe_x64::movsd_p64_r128(Assembler &a, be_parameter const &param, Xmm cons
{
assert(!param.is_immediate());
if (param.is_memory())
- a.movsd(MABS(param.memory(), 8), reg); // movsd [param],reg
+ a.movsd(MABS(param.memory(), 8), reg);
else if (param.is_float_register())
{
if (reg.id() != param.freg())
- a.movsd(Xmm(param.freg()), reg); // movsd param,reg
+ a.movsd(Xmm(param.freg()), reg);
}
}
@@ -1259,13 +1804,27 @@ void drcbe_x64::movsd_p64_r128(Assembler &a, be_parameter const &param, Xmm cons
//**************************************************************************
//-------------------------------------------------
+// end_of_block - function to catch falling off
+// the end of a generated code block
+//-------------------------------------------------
+
+[[noreturn]] void drcbe_x64::end_of_block() const
+{
+ osd_printf_error("drcbe_x64(%s): fell off the end of a generated code block!\n", m_device.tag());
+ std::fflush(stdout);
+ std::fflush(stderr);
+ std::abort();
+}
+
+
+//-------------------------------------------------
// debug_log_hashjmp - callback to handle
// logging of hashjmps
//-------------------------------------------------
void drcbe_x64::debug_log_hashjmp(offs_t pc, int mode)
{
- printf("mode=%d PC=%08X\n", mode, pc);
+ std::printf("mode=%d PC=%08X\n", mode, pc);
}
@@ -1276,7 +1835,7 @@ void drcbe_x64::debug_log_hashjmp(offs_t pc, int mode)
void drcbe_x64::debug_log_hashjmp_fail()
{
- printf(" (FAIL)\n");
+ std::printf(" (FAIL)\n");
}
@@ -1301,14 +1860,15 @@ void drcbe_x64::op_handle(Assembler &a, const instruction &inst)
// emit a jump around the stack adjust in case code falls through here
Label skip = a.newLabel();
- a.short_().jmp(skip); // jmp skip
+ a.short_().jmp(skip);
+ a.align(AlignMode::kCode, 16);
// register the current pointer for the handle
inst.param(0).handle().set_codeptr(drccodeptr(a.code()->baseAddress() + a.offset()));
- // by default, the handle points to prolog code that moves the stack pointer
- a.lea(rsp, ptr(rsp, -40)); // lea rsp,[rsp-40]
- a.bind(skip); // skip:
+ // by default, the handle points to prologue code that moves the stack pointer
+ a.lea(rsp, ptr(rsp, -40));
+ a.bind(skip);
}
@@ -1396,6 +1956,17 @@ void drcbe_x64::op_nop(Assembler &a, const instruction &inst)
// nothing
}
+//-------------------------------------------------
+// op_break - process a BREAK opcode
+//-------------------------------------------------
+
+void drcbe_x64::op_break(Assembler &a, const instruction &inst)
+{
+ static const char *const message = "break from drc";
+ mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)message);
+ smart_call_r64(a, (x86code *)(uintptr_t)&osd_break_into_debugger, rax);
+}
+
//-------------------------------------------------
// op_debug - process a DEBUG opcode
@@ -1420,9 +1991,9 @@ void drcbe_x64::op_debug(Assembler &a, const instruction &inst)
a.short_().jz(skip);
// push the parameter
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_device.debug()); // mov param1,device.debug
+ mov_r64_imm(a, Gpq(REG_PARAM1), m_debug_cpu_instruction_hook.obj); // mov param1,device.debug
mov_reg_param(a, Gpd(REG_PARAM2), pcp); // mov param2,pcp
- smart_call_m64(a, &m_near.debug_cpu_instruction_hook); // call debug_cpu_instruction_hook
+ smart_call_r64(a, m_debug_cpu_instruction_hook.func, rax); // call debug_cpu_instruction_hook
a.bind(skip);
}
@@ -1476,30 +2047,32 @@ void drcbe_x64::op_hashjmp(Assembler &a, const instruction &inst)
smart_call_m64(a, &m_near.debug_log_hashjmp);
}
- // load the stack base one word early so we end up at the right spot after our call below
- a.mov(rsp, MABS(&m_near.hashstacksave)); // mov rsp,[hashstacksave]
+ // load the stack base
+ Label nocode = a.newLabel();
+ a.mov(rsp, MABS(&m_near.stacksave)); // mov rsp,[stacksave]
// fixed mode cases
if (modep.is_immediate() && m_hash.is_mode_populated(modep.immediate()))
{
- // a straight immediate jump is direct, though we need the PC in EAX in case of failure
if (pcp.is_immediate())
{
+ // a straight immediate jump is direct, though we need the PC in EAX in case of failure
uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
- a.call(MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val]
+ a.short_().lea(Gpq(REG_PARAM1), ptr(nocode)); // lea rcx,[rip+nocode]
+ a.jmp(MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // jmp hash[modep][l1val][l2val]
}
-
- // a fixed mode but variable PC
else
{
+ // a fixed mode but variable PC
mov_reg_param(a, eax, pcp); // mov eax,pcp
a.mov(edx, eax); // mov edx,eax
a.shr(edx, m_hash.l1shift()); // shr edx,l1shift
a.and_(eax, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
a.mov(rdx, ptr(rbp, rdx, 3, offset_from_rbp(&m_hash.base()[modep.immediate()][0])));
// mov rdx,hash[modep+edx*8]
- a.call(ptr(rdx, rax, 3 - m_hash.l2shift())); // call [rdx+rax*shift]
+ a.short_().lea(Gpq(REG_PARAM1), ptr(nocode)); // lea rcx,[rip+nocode]
+ a.jmp(ptr(rdx, rax, 3 - m_hash.l2shift())); // jmp [rdx+rax*shift]
}
}
else
@@ -1509,33 +2082,34 @@ void drcbe_x64::op_hashjmp(Assembler &a, const instruction &inst)
mov_reg_param(a, modereg, modep); // mov modereg,modep
a.mov(rcx, ptr(rbp, modereg, 3, offset_from_rbp(m_hash.base()))); // mov rcx,hash[modereg*8]
- // fixed PC
if (pcp.is_immediate())
{
+ // fixed PC
uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
a.mov(rdx, ptr(rcx, l1val * 8)); // mov rdx,[rcx+l1val*8]
- a.call(ptr(rdx, l2val * 8)); // call [l2val*8]
+ a.short_().lea(Gpq(REG_PARAM1), ptr(nocode)); // lea rcx,[rip+nocode]
+ a.jmp(ptr(rdx, l2val * 8)); // jmp [l2val*8]
}
-
- // variable PC
else
{
+ // variable PC
mov_reg_param(a, eax, pcp); // mov eax,pcp
a.mov(edx, eax); // mov edx,eax
a.shr(edx, m_hash.l1shift()); // shr edx,l1shift
a.mov(rdx, ptr(rcx, rdx, 3)); // mov rdx,[rcx+rdx*8]
a.and_(eax, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
- a.call(ptr(rdx, rax, 3 - m_hash.l2shift())); // call [rdx+rax*shift]
+ a.short_().lea(Gpq(REG_PARAM1), ptr(nocode)); // lea rcx,[rip+nocode]
+ a.jmp(ptr(rdx, rax, 3 - m_hash.l2shift())); // jmp [rdx+rax*shift]
}
}
// in all cases, if there is no code, we return here to generate the exception
+ a.bind(nocode);
if (LOG_HASHJMPS)
smart_call_m64(a, &m_near.debug_log_hashjmp_fail);
mov_mem_param(a, MABS(&m_state.exp, 4), pcp); // mov [exp],param
- a.sub(rsp, 8); // sub rsp,8
a.call(MABS(exp.handle().codeptr_addr())); // call [exp]
}
@@ -1587,9 +2161,12 @@ void drcbe_x64::op_exh(Assembler &a, const instruction &inst)
drccodeptr *targetptr = handp.handle().codeptr_addr();
// perform the exception processing
- Label no_exception = a.newLabel();
+ Label no_exception;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ no_exception = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), no_exception); // jcc no_exception
+ }
mov_mem_param(a, MABS(&m_state.exp, 4), exp); // mov [exp],exp
if (*targetptr != nullptr)
a.call(imm(*targetptr)); // call *targetptr
@@ -1619,9 +2196,12 @@ void drcbe_x64::op_callh(Assembler &a, const instruction &inst)
drccodeptr *targetptr = handp.handle().codeptr_addr();
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
// jump through the handle; directly if a normal jump
if (*targetptr != nullptr)
@@ -1648,9 +2228,12 @@ void drcbe_x64::op_ret(Assembler &a, const instruction &inst)
assert(inst.numparams() == 0);
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
// return
a.lea(rsp, ptr(rsp, 40)); // lea rsp,[rsp+40]
@@ -1679,9 +2262,12 @@ void drcbe_x64::op_callc(Assembler &a, const instruction &inst)
be_parameter paramp(*this, inst.param(1), PTYPE_M);
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
// perform the call
mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)paramp.memory()); // mov param1,paramp
@@ -1708,13 +2294,13 @@ void drcbe_x64::op_recover(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
// call the recovery code
- a.mov(rax, MABS(&m_near.stacksave)); // mov rax,stacksave
- a.mov(rax, ptr(rax, -8)); // mov rax,[rax-8]
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)&m_map); // mov param1,m_map
- a.lea(Gpq(REG_PARAM2), ptr(rax, -1)); // lea param2,[rax-1]
- mov_r64_imm(a, Gpq(REG_PARAM3), inst.param(1).mapvar()); // mov param3,param[1].value
- smart_call_m64(a, &m_near.drcmap_get_value); // call drcmap_get_value
- mov_param_reg(a, dstp, eax); // mov dstp,eax
+ a.mov(rax, MABS(&m_near.stacksave));
+ mov_r64_imm(a, Gpq(REG_PARAM1), m_drcmap_get_value.obj);
+ mov_r64_imm(a, Gpq(REG_PARAM3), inst.param(1).mapvar());
+ a.mov(Gpq(REG_PARAM2), ptr(rax, -8));
+ a.sub(Gpq(REG_PARAM2), 1);
+ smart_call_r64(a, m_drcmap_get_value.func, rax);
+ mov_param_reg(a, dstp, eax);
}
@@ -1737,17 +2323,16 @@ void drcbe_x64::op_setfmod(Assembler &a, const instruction &inst)
// normalize parameters
be_parameter srcp(*this, inst.param(0), PTYPE_MRI);
- // immediate case
if (srcp.is_immediate())
{
+ // immediate case
int value = srcp.immediate() & 3;
- a.mov(MABS(&m_state.fmod), value); // mov [fmod],srcp
+ a.mov(MABS(&m_state.fmod, 1), value); // mov [fmod],srcp
a.ldmxcsr(MABS(&m_near.ssecontrol[value])); // ldmxcsr fp_control[srcp]
}
-
- // register/memory case
else
{
+ // register/memory case
mov_reg_param(a, eax, srcp); // mov eax,srcp
a.and_(eax, 3); // and eax,3
a.mov(MABS(&m_state.fmod), al); // mov [fmod],al
@@ -1827,10 +2412,13 @@ void drcbe_x64::op_getflgs(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp dstreg = dstp.select_register(eax);
+ a.lahf();
+ a.mov(r10, rax);
+
// compute mask for flags
+ // can't get FLAG_V from lahf
uint32_t flagmask = 0;
if (maskp.immediate() & FLAG_C) flagmask |= 0x001;
- if (maskp.immediate() & FLAG_V) flagmask |= 0x800;
if (maskp.immediate() & FLAG_Z) flagmask |= 0x040;
if (maskp.immediate() & FLAG_S) flagmask |= 0x080;
if (maskp.immediate() & FLAG_U) flagmask |= 0x004;
@@ -1923,10 +2511,20 @@ void drcbe_x64::op_getflgs(Assembler &a, const instruction &inst)
// default cases
default:
- a.pushfq(); // pushf
- a.pop(eax); // pop eax
- a.and_(eax, flagmask); // and eax,flagmask
- a.movzx(dstreg, byte_ptr(rbp, rax, 0, offset_from_rbp(&m_near.flagsmap[0]))); // movzx dstreg,[flags_map]
+ if (maskp.immediate() & FLAG_V)
+ {
+ a.seto(al);
+ a.movzx(eax, al);
+ a.shl(eax, 1);
+ }
+
+ a.mov(r11, r10);
+ a.shr(r11, 8);
+ a.and_(r11, flagmask);
+ a.movzx(dstreg, byte_ptr(rbp, r11, 0, offset_from_rbp(&m_near.flagsmap[0]))); // movzx dstreg,[flags_map]
+
+ if (maskp.immediate() & FLAG_V)
+ a.or_(dstreg, eax);
break;
}
@@ -1937,6 +2535,42 @@ void drcbe_x64::op_getflgs(Assembler &a, const instruction &inst)
// 64-bit form
else if (inst.size() == 8)
mov_param_reg(a, dstp, dstreg.r64()); // mov dstp,dstreg
+
+ if (maskp.immediate() & FLAG_V)
+ {
+ // Restore overflow flag
+ a.mov(eax, dstreg);
+ a.shr(eax, 1);
+ a.and_(eax, 1);
+ a.add(al, 0x7f);
+ }
+
+ a.mov(rax, r10);
+ a.sahf();
+}
+
+
+//-------------------------------------------------
+// op_setflgs - process a SETFLGS opcode
+//-------------------------------------------------
+
+void drcbe_x64::op_setflgs(Assembler &a, const instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter srcp(*this, inst.param(0), PTYPE_MRI);
+
+ a.pushfq();
+
+ mov_reg_param(a, rax, srcp);
+
+ a.mov(rax, ptr(rbp, rax, 3, offset_from_rbp(&m_near.flagsunmap[0])));
+ a.and_(qword_ptr(rsp), ~0x8c5);
+ a.or_(qword_ptr(rsp), rax);
+
+ a.popfq();
}
@@ -1975,7 +2609,9 @@ void drcbe_x64::op_save(Assembler &a, const instruction &inst)
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
{
if (int_register_map[regnum] != 0)
- a.mov(ptr(rcx, regoffs + 8 * regnum), Gpq(regnum));
+ {
+ a.mov(ptr(rcx, regoffs + 8 * regnum), Gpq(int_register_map[regnum]));
+ }
else
{
a.mov(rax, MABS(&m_state.r[regnum].d));
@@ -1988,7 +2624,9 @@ void drcbe_x64::op_save(Assembler &a, const instruction &inst)
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
{
if (float_register_map[regnum] != 0)
- a.movsd(ptr(rcx, regoffs + 8 * regnum), Xmm(regnum));
+ {
+ a.movsd(ptr(rcx, regoffs + 8 * regnum), Xmm(float_register_map[regnum]));
+ }
else
{
a.mov(rax, MABS(&m_state.f[regnum].d));
@@ -2019,7 +2657,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst)
for (int regnum = 0; regnum < std::size(m_state.r); regnum++)
{
if (int_register_map[regnum] != 0)
- a.mov(Gpq(regnum), ptr(rcx, regoffs + 8 * regnum));
+ a.mov(Gpq(int_register_map[regnum]), ptr(rcx, regoffs + 8 * regnum));
else
{
a.mov(rax, ptr(rcx, regoffs + 8 * regnum));
@@ -2032,7 +2670,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst)
for (int regnum = 0; regnum < std::size(m_state.f); regnum++)
{
if (float_register_map[regnum] != 0)
- a.movsd(Xmm(regnum), ptr(rcx, regoffs + 8 * regnum));
+ a.movsd(Xmm(float_register_map[regnum]), ptr(rcx, regoffs + 8 * regnum));
else
{
a.mov(rax, ptr(rcx, regoffs + 8 * regnum));
@@ -2053,7 +2691,7 @@ void drcbe_x64::op_restore(Assembler &a, const instruction &inst)
// copy flags
a.movzx(eax, byte_ptr(rcx, offsetof(drcuml_machine_state, flags))); // movzx eax,state->flags
- a.push(ptr(rbp, rax, 3, offset_from_rbp(&m_near.flagsunmap[0]))); // push flags_unmap[eax*8]
+ a.push(qword_ptr(rbp, rax, 3, offset_from_rbp(&m_near.flagsunmap[0]))); // push flags_unmap[eax*8]
a.popfq(); // popf
}
@@ -2084,46 +2722,42 @@ void drcbe_x64::op_load(Assembler &a, const instruction &inst)
// determine the pointer base
int32_t baseoffs;
- Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
+ const Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
// pick a target register for the general case
- Gp dstreg = dstp.select_register(eax);
+ const Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
- // immediate index
if (indp.is_immediate())
{
- s32 const offset = baseoffs + (s32(indp.immediate()) << scalesizep.scale());
+ // immediate index
+ ptrdiff_t const offset = baseoffs + (ptrdiff_t(s32(u32(indp.immediate()))) << scalesizep.scale());
if (size == SIZE_BYTE)
- a.movzx(dstreg, byte_ptr(basereg, offset)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, byte_ptr(basereg, offset));
else if (size == SIZE_WORD)
- a.movzx(dstreg, word_ptr(basereg, offset)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, word_ptr(basereg, offset));
else if (size == SIZE_DWORD)
- a.mov(dstreg, ptr(basereg, offset)); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, dword_ptr(basereg, offset));
else if (size == SIZE_QWORD)
- a.mov(dstreg.r64(), ptr(basereg, offset)); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, ptr(basereg, offset));
}
-
- // other index
else
{
- Gp indreg = indp.select_register(rcx);
+ // other index
+ const Gp indreg = rcx;
movsx_r64_p32(a, indreg, indp);
if (size == SIZE_BYTE)
- a.movzx(dstreg, byte_ptr(basereg, indreg, scalesizep.scale(), baseoffs)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, byte_ptr(basereg, indreg, scalesizep.scale(), baseoffs));
else if (size == SIZE_WORD)
- a.movzx(dstreg, word_ptr(basereg, indreg, scalesizep.scale(), baseoffs)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, word_ptr(basereg, indreg, scalesizep.scale(), baseoffs));
else if (size == SIZE_DWORD)
- a.mov(dstreg, ptr(basereg, indreg, scalesizep.scale(), baseoffs)); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, dword_ptr(basereg, indreg, scalesizep.scale(), baseoffs));
else if (size == SIZE_QWORD)
- a.mov(dstreg.r64(), ptr(basereg, indreg, scalesizep.scale(), baseoffs)); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, ptr(basereg, indreg, scalesizep.scale(), baseoffs));
}
// store result
- if (inst.size() == 4)
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- else
- mov_param_reg(a, dstp, dstreg.r64()); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg);
}
@@ -2148,15 +2782,15 @@ void drcbe_x64::op_loads(Assembler &a, const instruction &inst)
// determine the pointer base
int32_t baseoffs;
- Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
+ const Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
// pick a target register for the general case
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax) : dstp.select_register(rax);
+ const Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
- // immediate index
if (indp.is_immediate())
{
- s32 const offset = baseoffs + (s32(indp.immediate()) << scalesizep.scale());
+ // immediate index
+ ptrdiff_t const offset = baseoffs + (ptrdiff_t(s32(u32(indp.immediate()))) << scalesizep.scale());
if (size == SIZE_BYTE)
a.movsx(dstreg, byte_ptr(basereg, offset)); // movsx dstreg,[basep + scale*indp]
@@ -2169,11 +2803,10 @@ void drcbe_x64::op_loads(Assembler &a, const instruction &inst)
else if (size == SIZE_QWORD)
a.mov(dstreg, ptr(basereg, offset)); // mov dstreg,[basep + scale*indp]
}
-
- // other index
else
{
- Gp indreg = indp.select_register(rcx);
+ // other index
+ const Gp indreg = rcx;
movsx_r64_p32(a, indreg, indp);
if (size == SIZE_BYTE)
a.movsx(dstreg, byte_ptr(basereg, indreg, scalesizep.scale(), baseoffs)); // movsx dstreg,[basep + scale*indp]
@@ -2212,15 +2845,15 @@ void drcbe_x64::op_store(Assembler &a, const instruction &inst)
// determine the pointer base
int32_t baseoffs;
- Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
+ const Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
// pick a source register for the general case
- Gp srcreg = srcp.select_register(rax);
+ const Gp srcreg = srcp.select_register(rax);
- // degenerate case: constant index
if (indp.is_immediate())
{
- s32 const offset = baseoffs + (s32(indp.immediate()) << scalesizep.scale());
+ // degenerate case: constant index
+ ptrdiff_t const offset = baseoffs + (ptrdiff_t(s32(u32(indp.immediate()))) << scalesizep.scale());
// immediate source
if (srcp.is_immediate())
@@ -2228,7 +2861,9 @@ void drcbe_x64::op_store(Assembler &a, const instruction &inst)
if (size == SIZE_QWORD)
{
if (short_immediate(srcp.immediate()))
+ {
a.mov(qword_ptr(basereg, offset), s32(srcp.immediate())); // mov [basep + scale*indp],srcp
+ }
else
{
a.mov(ptr(basereg, offset + 0), u32(srcp.immediate() >> 0)); // mov [basep + scale*indp],srcp
@@ -2236,16 +2871,18 @@ void drcbe_x64::op_store(Assembler &a, const instruction &inst)
}
}
else
+ {
a.mov(ptr(basereg, offset, 1 << size), srcp.immediate()); // mov [basep + scale*indp],srcp
+ }
}
-
- // variable source
else
{
+ // variable source
if (size != SIZE_QWORD)
- mov_reg_param(a, srcreg.r32(), srcp); // mov srcreg,srcp
+ mov_reg_param(a, srcreg.r32(), srcp, true); // mov srcreg,srcp
else
- mov_reg_param(a, srcreg.r64(), srcp); // mov srcreg,srcp
+ mov_reg_param(a, srcreg.r64(), srcp, true); // mov srcreg,srcp
+
if (size == SIZE_BYTE)
a.mov(ptr(basereg, offset), srcreg.r8()); // mov [basep + scale*indp],srcreg
else if (size == SIZE_WORD)
@@ -2256,20 +2893,21 @@ void drcbe_x64::op_store(Assembler &a, const instruction &inst)
a.mov(ptr(basereg, offset), srcreg.r64()); // mov [basep + scale*indp],srcreg
}
}
-
- // normal case: variable index
else
{
- Gp indreg = indp.select_register(rcx);
+ // normal case: variable index
+ const Gp indreg = rcx;
movsx_r64_p32(a, indreg, indp); // mov indreg,indp
- // immediate source
if (srcp.is_immediate())
{
+ // immediate source
if (size == SIZE_QWORD)
{
if (short_immediate(srcp.immediate()))
+ {
a.mov(qword_ptr(basereg, indreg, scalesizep.scale(), baseoffs), s32(srcp.immediate())); // mov [basep + scale*indp],srcp
+ }
else
{
a.mov(ptr(basereg, indreg, scalesizep.scale(), baseoffs + 0), u32(srcp.immediate() >> 0)); // mov [basep + scale*ecx],srcp
@@ -2277,16 +2915,18 @@ void drcbe_x64::op_store(Assembler &a, const instruction &inst)
}
}
else
+ {
a.mov(ptr(basereg, indreg, scalesizep.scale(), baseoffs, 1 << size), srcp.immediate()); // mov [basep + scale*ecx],srcp
+ }
}
-
- // variable source
else
{
+ // variable source
if (size != SIZE_QWORD)
- mov_reg_param(a, srcreg.r32(), srcp); // mov srcreg,srcp
+ mov_reg_param(a, srcreg.r32(), srcp, true); // mov srcreg,srcp
else
- mov_reg_param(a, srcreg.r64(), srcp); // mov edx:srcreg,srcp
+ mov_reg_param(a, srcreg.r64(), srcp, true); // mov edx:srcreg,srcp
+
if (size == SIZE_BYTE)
a.mov(ptr(basereg, indreg, scalesizep.scale(), baseoffs), srcreg.r8()); // mov [basep + scale*ecx],srcreg
else if (size == SIZE_WORD)
@@ -2321,73 +2961,150 @@ void drcbe_x64::op_read(Assembler &a, const instruction &inst)
Gp dstreg = dstp.select_register(eax);
// set up a call to the read handler
- auto &trampolines = m_accessors[spacesizep.space()];
- auto &resolved = m_resolved_accessors[spacesizep.space()];
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param2,addrp
- if (spacesizep.size() == SIZE_BYTE)
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ // set default mem_mask
+ if (accessors.specific.native_bytes <= 4)
+ a.mov(Gpd(REG_PARAM3), make_bitmask<uint32_t>(accessors.specific.native_bytes << 3));
+ else
+ a.mov(Gpq(REG_PARAM3), make_bitmask<uint64_t>(accessors.specific.native_bytes << 3));
+
+ emit_memaccess_setup(a, accessors, accessors.specific.read); // get dispatch table entry
+ }
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
{
- if (resolved.read_byte.func)
+ // if the destination register isn't a non-volatile register, we can use it to save the shift count
+ bool need_save = !is_nonvolatile_register(dstreg);
+ if (need_save)
+ a.mov(ptr(rsp, 32), Gpq(int_register_map[0])); // save I0 register
+
+ if ((accessors.specific.native_bytes <= 4) || (spacesizep.size() != SIZE_QWORD))
+ a.mov(Gpd(REG_PARAM3), imm(make_bitmask<uint32_t>(8 << spacesizep.size()))); // set default mem_mask
+ else
+ a.mov(Gpq(REG_PARAM3), imm(make_bitmask<uint64_t>(8 << spacesizep.size()))); // set default mem_mask
+
+ a.mov(ecx, Gpd(REG_PARAM2)); // copy address for bit offset
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy address for dispatch index
+ if (!accessors.no_mask)
+ a.and_(Gpd(REG_PARAM2), imm(accessors.address_mask)); // apply address mask
+
+ int const shift = m_space[spacesizep.space()]->addr_shift() - 3;
+ if (m_space[spacesizep.space()]->endianness() != ENDIANNESS_LITTLE)
+ a.not_(ecx); // swizzle address for big Endian spaces
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.shr(r10d, accessors.specific.low_bits); // shift off low bits
+ mov_r64_imm(a, rax, uintptr_t(accessors.specific.read.dispatch)); // load dispatch table pointer
+ if (shift < 0)
+ a.shl(ecx, imm(-shift)); // convert address to bits (left shift)
+ else if (shift > 0)
+ a.shr(ecx, imm(shift)); // convert address to bits (right shift)
+ if (accessors.has_high_bits)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_byte.obj); // mov param1,space
- smart_call_r64(a, resolved.read_byte.func, rax); // call read_byte
+ if (accessors.mask_high_bits)
+ {
+ if (accessors.specific.low_bits)
+ {
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy masked address
+ a.shr(Gpd(REG_PARAM2), accessors.specific.low_bits); // shift off low bits
+ }
+ a.mov(rax, ptr(rax, Gpq(REG_PARAM2), 3)); // load dispatch table entry
+ }
+ else
+ {
+ a.mov(rax, ptr(rax, r10, 3)); // load dispatch table entry
+ }
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_byte); // call read_byte
+ a.mov(Gpq(REG_PARAM1), ptr(rax)); // load dispatch table entry
}
- a.movzx(dstreg, al); // movzx dstreg,al
- }
- else if (spacesizep.size() == SIZE_WORD)
- {
- if (resolved.read_word.func)
+ a.and_(ecx, imm((accessors.specific.native_bytes - (1 << spacesizep.size())) << 3)); // mask bit address
+ if (accessors.has_high_bits && accessors.mask_high_bits && accessors.specific.low_bits)
+ a.mov(Gpd(REG_PARAM2), r10d); // restore masked address
+ if (need_save)
+ a.mov(Gpd(int_register_map[0]), ecx); // save masked bit address
+ else
+ a.mov(dstreg.r32(), ecx); // save masked bit address
+ if (accessors.specific.read.is_virtual)
+ a.mov(r10, ptr(rax, accessors.specific.read.displacement)); // load vtable pointer
+ if (accessors.specific.read.displacement)
+ a.add(rax, accessors.specific.read.displacement); // apply this pointer offset
+ if (accessors.specific.native_bytes <= 4)
+ a.shl(Gpd(REG_PARAM3), cl); // shift mem_mask by masked bit address
+ else
+ a.shl(Gpq(REG_PARAM3), cl); // shift mem_mask by masked bit address
+
+ // need to do this after finished with CL as REG_PARAM1 is C on Windows
+ a.mov(Gpq(REG_PARAM1), rax);
+ if (accessors.specific.read.is_virtual)
+ a.call(ptr(r10, accessors.specific.read.function)); // call virtual member function
+ else
+ smart_call_r64(a, (x86code *)accessors.specific.read.function, rax); // call non-virtual member function
+
+ if (need_save)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_word.obj); // mov param1,space
- smart_call_r64(a, resolved.read_word.func, rax); // call read_word
+ a.mov(ecx, Gpd(int_register_map[0])); // restore masked bit address
+ a.mov(Gpq(int_register_map[0]), ptr(rsp, 32)); // restore I0 register
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_word); // call read_word
+ a.mov(ecx, dstreg.r32()); // restore masked bit address
}
- a.movzx(dstreg, ax); // movzx dstreg,ax
+ if (accessors.specific.native_bytes <= 4)
+ a.shr(eax, cl); // shift result by masked bit address
+ else
+ a.shr(rax, cl); // shift result by masked bit address
+ }
+ else if (spacesizep.size() == SIZE_BYTE)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_byte.obj);
+ smart_call_r64(a, accessors.resolved.read_byte.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_word.obj);
+ smart_call_r64(a, accessors.resolved.read_word.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_dword.obj);
+ smart_call_r64(a, accessors.resolved.read_dword.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_qword.obj);
+ smart_call_r64(a, accessors.resolved.read_qword.func, rax);
+ }
+
+ // move or zero-extend result if necessary
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ a.movzx(dstreg, al);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ a.movzx(dstreg, ax);
}
else if (spacesizep.size() == SIZE_DWORD)
{
- if (resolved.read_dword.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_dword.obj); // mov param1,space
- smart_call_r64(a, resolved.read_dword.func, rax); // call read_dword
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_dword); // call read_dword
- }
if (dstreg != eax || inst.size() == 8)
- a.mov(dstreg, eax); // mov dstreg,eax
+ a.mov(dstreg, eax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- if (resolved.read_qword.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_qword.obj); // mov param1,space
- smart_call_r64(a, resolved.read_qword.func, rax); // call read_qword
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_qword); // call read_qword
- }
if (dstreg != eax)
- a.mov(dstreg.r64(), rax); // mov dstreg,rax
+ a.mov(dstreg.r64(), rax);
}
// store result
if (inst.size() == 4)
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg);
else
- mov_param_reg(a, dstp, dstreg.r64()); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg.r64());
}
@@ -2413,63 +3130,143 @@ void drcbe_x64::op_readm(Assembler &a, const instruction &inst)
Gp dstreg = dstp.select_register(eax);
// set up a call to the read handler
- auto &trampolines = m_accessors[spacesizep.space()];
- auto &resolved = m_resolved_accessors[spacesizep.space()];
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param2,addrp
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.read.function) || accessors.specific.read.is_virtual;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
if (spacesizep.size() != SIZE_QWORD)
- mov_reg_param(a, Gpd(REG_PARAM3), maskp); // mov param3,maskp
+ mov_reg_param(a, Gpd(REG_PARAM3), maskp);
else
- mov_reg_param(a, Gpq(REG_PARAM3), maskp); // mov param3,maskp
- if (spacesizep.size() == SIZE_WORD)
- {
- if (resolved.read_word_masked.func)
+ mov_reg_param(a, Gpq(REG_PARAM3), maskp);
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
+ {
+ emit_memaccess_setup(a, accessors, accessors.specific.read); // get dispatch table entry
+ }
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
+ {
+ // if the destination register isn't a non-volatile register, we can use it to save the shift count
+ bool need_save = !is_nonvolatile_register(dstreg);
+ if (need_save)
+ a.mov(ptr(rsp, 32), Gpq(int_register_map[0])); // save I0 register
+
+ a.mov(ecx, Gpd(REG_PARAM2)); // copy address for bit offset
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy address for dispatch index
+ if (!accessors.no_mask)
+ a.and_(Gpd(REG_PARAM2), imm(accessors.address_mask)); // apply address mask
+
+ int const shift = m_space[spacesizep.space()]->addr_shift() - 3;
+ if (m_space[spacesizep.space()]->endianness() != ENDIANNESS_LITTLE)
+ a.not_(ecx); // swizzle address for big Endian spaces
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.shr(r10d, accessors.specific.low_bits); // shift off low bits
+ mov_r64_imm(a, rax, uintptr_t(accessors.specific.read.dispatch)); // load dispatch table pointer
+ if (shift < 0)
+ a.shl(ecx, imm(-shift)); // convert address to bits (left shift)
+ else if (shift > 0)
+ a.shr(ecx, imm(shift)); // convert address to bits (right shift)
+ if (accessors.has_high_bits)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_word_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.read_word_masked.func, rax); // call read_byte_masked
+ if (accessors.mask_high_bits)
+ {
+ if (accessors.specific.low_bits)
+ {
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy masked address
+ a.shr(Gpd(REG_PARAM2), accessors.specific.low_bits); // shift off low bits
+ }
+ a.mov(rax, ptr(rax, Gpq(REG_PARAM2), 3)); // load dispatch table entry
+ }
+ else
+ {
+ a.mov(rax, ptr(rax, r10, 3)); // load dispatch table entry
+ }
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_word_masked); // call read_word_masked
+ a.mov(rax, ptr(rax)); // load dispatch table entry
}
- a.movzx(dstreg, ax); // movzx dstreg,ax
- }
- else if (spacesizep.size() == SIZE_DWORD)
- {
- if (resolved.read_dword_masked.func)
+ a.and_(ecx, imm((accessors.specific.native_bytes - (1 << spacesizep.size())) << 3)); // mask bit address
+ if (accessors.has_high_bits && accessors.mask_high_bits && accessors.specific.low_bits)
+ a.mov(Gpd(REG_PARAM2), r10d); // restore masked address
+ if (need_save)
+ a.mov(Gpd(int_register_map[0]), ecx); // save masked bit address
+ else
+ a.mov(dstreg.r32(), ecx); // save masked bit address
+ if (accessors.specific.read.is_virtual)
+ a.mov(r10, ptr(rax, accessors.specific.read.displacement)); // load vtable pointer
+ if (accessors.specific.read.displacement)
+ a.add(rax, accessors.specific.read.displacement); // apply this pointer offset
+ if (accessors.specific.native_bytes <= 4)
+ a.shl(Gpd(REG_PARAM3), cl); // shift mem_mask by masked bit address
+ else
+ a.shl(Gpq(REG_PARAM3), cl); // shift mem_mask by masked bit address
+
+ // need to do this after finished with CL as REG_PARAM1 is C on Windows
+ a.mov(Gpq(REG_PARAM1), rax);
+ if (accessors.specific.read.is_virtual)
+ a.call(ptr(r10, accessors.specific.read.function)); // call virtual member function
+ else
+ smart_call_r64(a, (x86code *)accessors.specific.read.function, rax); // call non-virtual member function
+
+ if (need_save)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_dword_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.read_dword_masked.func, rax); // call read_dword_masked
+ a.mov(ecx, Gpd(int_register_map[0])); // restore masked bit address
+ a.mov(Gpq(int_register_map[0]), ptr(rsp, 32)); // restore I0 register
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_dword_masked); // call read_word_masked
+ a.mov(ecx, dstreg.r32()); // restore masked bit address
}
+ if (accessors.specific.native_bytes <= 4)
+ a.shr(eax, cl); // shift result by masked bit address
+ else
+ a.shr(rax, cl); // shift result by masked bit address
+ }
+ else if (spacesizep.size() == SIZE_BYTE)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_byte_masked.obj);
+ smart_call_r64(a, accessors.resolved.read_byte_masked.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_word_masked.obj);
+ smart_call_r64(a, accessors.resolved.read_word_masked.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_dword_masked.obj);
+ smart_call_r64(a, accessors.resolved.read_dword_masked.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_QWORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.read_qword_masked.obj);
+ smart_call_r64(a, accessors.resolved.read_qword_masked.func, rax);
+ }
+
+ // move or zero-extend result if necessary
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ a.movzx(dstreg, al);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ a.movzx(dstreg, ax);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
if (dstreg != eax || inst.size() == 8)
- a.mov(dstreg, eax); // mov dstreg,eax
+ a.mov(dstreg, eax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- if (resolved.read_qword_masked.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.read_qword_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.read_qword_masked.func, rax); // call read_qword_masked
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.read_qword_masked); // call read_word_masked
- }
if (dstreg != eax)
- a.mov(dstreg.r64(), rax); // mov dstreg,rax
+ a.mov(dstreg.r64(), rax);
}
// store result
if (inst.size() == 4)
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg);
else
- mov_param_reg(a, dstp, dstreg.r64()); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg.r64());
}
@@ -2491,64 +3288,113 @@ void drcbe_x64::op_write(Assembler &a, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write handler
- auto &trampolines = m_accessors[spacesizep.space()];
- auto &resolved = m_resolved_accessors[spacesizep.space()];
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param2,addrp
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
if (spacesizep.size() != SIZE_QWORD)
- mov_reg_param(a, Gpd(REG_PARAM3), srcp); // mov param3,srcp
+ mov_reg_param(a, Gpd(REG_PARAM3), srcp);
else
- mov_reg_param(a, Gpq(REG_PARAM3), srcp); // mov param3,srcp
- if (spacesizep.size() == SIZE_BYTE)
+ mov_reg_param(a, Gpq(REG_PARAM3), srcp);
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
{
- if (resolved.write_byte.func)
+ // set default mem_mask
+ if (accessors.specific.native_bytes <= 4)
+ a.mov(Gpd(REG_PARAM4), make_bitmask<uint32_t>(accessors.specific.native_bytes << 3));
+ else
+ a.mov(Gpq(REG_PARAM4), make_bitmask<uint64_t>(accessors.specific.native_bytes << 3));
+
+ emit_memaccess_setup(a, accessors, accessors.specific.write);
+ }
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
+ {
+ a.mov(ecx, Gpd(REG_PARAM2)); // copy address for bit offset
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy address for dispatch index
+ if (!accessors.no_mask)
+ a.and_(Gpd(REG_PARAM2), imm(accessors.address_mask)); // apply address mask
+
+ int const shift = m_space[spacesizep.space()]->addr_shift() - 3;
+ if (m_space[spacesizep.space()]->endianness() != ENDIANNESS_LITTLE)
+ a.not_(ecx); // swizzle address for big Endian spaces
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.shr(r10d, accessors.specific.low_bits); // shift off low bits
+ mov_r64_imm(a, rax, uintptr_t(accessors.specific.write.dispatch)); // load dispatch table pointer
+ if (shift < 0)
+ a.shl(ecx, imm(-shift)); // convert address to bits (left shift)
+ else if (shift > 0)
+ a.shr(ecx, imm(shift)); // convert address to bits (right shift)
+ if (accessors.has_high_bits)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_byte.obj); // mov param1,space
- smart_call_r64(a, resolved.write_byte.func, rax); // call write_byte
+ if (accessors.mask_high_bits)
+ {
+ if (accessors.specific.low_bits)
+ {
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy masked address
+ a.shr(Gpd(REG_PARAM2), accessors.specific.low_bits); // shift off low bits
+ }
+ a.mov(rax, ptr(rax, Gpq(REG_PARAM2), 3)); // load dispatch table entry
+ }
+ else
+ {
+ a.mov(rax, ptr(rax, r10, 3)); // load dispatch table entry
+ }
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_byte); // call write_byte
+ a.mov(rax, ptr(rax)); // load dispatch table entry
}
- }
- else if (spacesizep.size() == SIZE_WORD)
- {
- if (resolved.write_word.func)
+ a.and_(ecx, imm((accessors.specific.native_bytes - (1 << spacesizep.size())) << 3)); // mask bit address
+ if ((accessors.specific.native_bytes <= 4) || (spacesizep.size() != SIZE_QWORD))
+ a.mov(r11d, imm(make_bitmask<uint32_t>(8 << spacesizep.size()))); // set default mem_mask
+ else
+ a.mov(r11, imm(make_bitmask<uint64_t>(8 << spacesizep.size()))); // set default mem_mask
+ if (accessors.has_high_bits && accessors.mask_high_bits && accessors.specific.low_bits)
+ a.mov(Gpd(REG_PARAM2), r10d); // restore masked address
+ if (accessors.specific.write.is_virtual)
+ a.mov(r10, ptr(rax, accessors.specific.write.displacement)); // load vtable pointer
+ if (accessors.specific.write.displacement)
+ a.add(rax, accessors.specific.write.displacement); // apply this pointer offset
+ if (accessors.specific.native_bytes <= 4)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_word.obj); // mov param1,space
- smart_call_r64(a, resolved.write_word.func, rax); // call write_word
+ a.shl(r11d, cl); // shift mem_mask by masked bit address
+ a.shl(Gpd(REG_PARAM3), cl); // shift data by masked bit address
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_word); // call write_word
+ a.shl(r11, cl); // shift mem_mask by masked bit address
+ a.shl(Gpq(REG_PARAM3), cl); // shift data by masked bit address
}
+
+ // need to do this after finished with CL as REG_PARAM1 is C on Windows and REG_PARAM4 is C on SysV
+ a.mov(Gpq(REG_PARAM1), rax);
+ if (accessors.specific.native_bytes <= 4)
+ a.mov(Gpd(REG_PARAM4), r11d); // copy mem_mask to parameter 4 (ECX on SysV)
+ else
+ a.mov(Gpq(REG_PARAM4), r11); // copy mem_mask to parameter 4 (RCX on SysV)
+ if (accessors.specific.write.is_virtual)
+ a.call(ptr(r10, accessors.specific.write.function)); // call virtual member function
+ else
+ smart_call_r64(a, (x86code *)accessors.specific.write.function, rax); // call non-virtual member function
+ }
+ else if (spacesizep.size() == SIZE_BYTE)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_byte.obj);
+ smart_call_r64(a, accessors.resolved.write_byte.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_word.obj);
+ smart_call_r64(a, accessors.resolved.write_word.func, rax);
}
else if (spacesizep.size() == SIZE_DWORD)
{
- if (resolved.write_dword.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_dword.obj); // mov param1,space
- smart_call_r64(a, resolved.write_dword.func, rax); // call write_dword
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_dword); // call write_dword
- }
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_dword.obj);
+ smart_call_r64(a, accessors.resolved.write_dword.func, rax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- if (resolved.write_qword.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_qword.obj); // mov param1,space
- smart_call_r64(a, resolved.write_qword.func, rax); // call write_qword
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_qword); // call write_qword
- }
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_qword.obj);
+ smart_call_r64(a, accessors.resolved.write_qword.func, rax);
}
}
@@ -2572,57 +3418,116 @@ void drcbe_x64::op_writem(Assembler &a, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write handler
- auto &trampolines = m_accessors[spacesizep.space()];
- auto &resolved = m_resolved_accessors[spacesizep.space()];
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param2,addrp
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ bool const have_specific = (uintptr_t(nullptr) != accessors.specific.write.function) || accessors.specific.write.is_virtual;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
if (spacesizep.size() != SIZE_QWORD)
- {
- mov_reg_param(a, Gpd(REG_PARAM3), srcp); // mov param3,srcp
- mov_reg_param(a, Gpd(REG_PARAM4), maskp); // mov param4,maskp
- }
+ mov_reg_param(a, Gpd(REG_PARAM3), srcp);
else
+ mov_reg_param(a, Gpq(REG_PARAM3), srcp);
+ if (have_specific && ((1 << spacesizep.size()) == accessors.specific.native_bytes))
{
- mov_reg_param(a, Gpq(REG_PARAM3), srcp); // mov param3,srcp
- mov_reg_param(a, Gpq(REG_PARAM4), maskp); // mov param4,maskp
+ if (spacesizep.size() != SIZE_QWORD)
+ mov_reg_param(a, Gpd(REG_PARAM4), maskp); // get mem_mask
+ else
+ mov_reg_param(a, Gpq(REG_PARAM4), maskp); // get mem_mask
+
+ emit_memaccess_setup(a, accessors, accessors.specific.write);
}
- if (spacesizep.size() == SIZE_WORD)
+ else if (have_specific && ((1 << spacesizep.size()) < accessors.specific.native_bytes))
{
- if (resolved.write_word.func)
+ a.mov(ecx, Gpd(REG_PARAM2)); // copy address for bit offset
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy address for dispatch index
+ if (spacesizep.size() != SIZE_QWORD)
+ mov_reg_param(a, r11d, maskp); // get mem_mask
+ else
+ mov_reg_param(a, r11, maskp); // get mem_mask
+ if (!accessors.no_mask)
+ a.and_(Gpd(REG_PARAM2), imm(accessors.address_mask)); // apply address mask
+
+ int const shift = m_space[spacesizep.space()]->addr_shift() - 3;
+ if (m_space[spacesizep.space()]->endianness() != ENDIANNESS_LITTLE)
+ a.not_(ecx); // swizzle address for big Endian spaces
+ if (accessors.has_high_bits && !accessors.mask_high_bits)
+ a.shr(r10d, accessors.specific.low_bits); // shift off low bits
+ mov_r64_imm(a, rax, uintptr_t(accessors.specific.write.dispatch)); // load dispatch table pointer
+ if (shift < 0)
+ a.shl(ecx, imm(-shift)); // convert address to bits (left shift)
+ else if (shift > 0)
+ a.shr(ecx, imm(shift)); // convert address to bits (right shift)
+ if (accessors.has_high_bits)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_word_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.write_word_masked.func, rax); // call write_word_masked
+ if (accessors.mask_high_bits)
+ {
+ if (accessors.specific.low_bits)
+ {
+ a.mov(r10d, Gpd(REG_PARAM2)); // copy masked address
+ a.shr(Gpd(REG_PARAM2), accessors.specific.low_bits); // shift off low bits
+ }
+ a.mov(rax, ptr(rax, Gpq(REG_PARAM2), 3)); // load dispatch table entry
+ }
+ else
+ {
+ a.mov(rax, ptr(rax, r10, 3)); // load dispatch table entry
+ }
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_word_masked); // call write_word_masked
+ a.mov(rax, ptr(rax)); // load dispatch table entry
}
- }
- else if (spacesizep.size() == SIZE_DWORD)
- {
- if (resolved.write_word.func)
+ a.and_(ecx, imm((accessors.specific.native_bytes - (1 << spacesizep.size())) << 3)); // mask bit address
+ if (accessors.has_high_bits && accessors.mask_high_bits && accessors.specific.low_bits)
+ a.mov(Gpd(REG_PARAM2), r10d); // restore masked address
+ if (accessors.specific.native_bytes <= 4)
{
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_dword_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.write_dword_masked.func, rax); // call write_dword_masked
+ a.shl(r11d, cl); // shift mem_mask by masked bit address
+ a.shl(Gpd(REG_PARAM3), cl); // shift data by masked bit address
}
else
{
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_dword_masked); // call write_dword_masked
+ a.shl(r11, cl); // shift mem_mask by masked bit address
+ a.shl(Gpq(REG_PARAM3), cl); // shift data by masked bit address
}
+ if (accessors.specific.write.is_virtual)
+ a.mov(r10, ptr(rax, accessors.specific.write.displacement)); // load vtable pointer
+
+ // need to do this after finished with CL as REG_PARAM1 is C on Windows and REG_PARAM4 is C on SysV
+ a.mov(Gpq(REG_PARAM1), rax);
+ if (accessors.specific.native_bytes <= 4)
+ a.mov(Gpd(REG_PARAM4), r11d); // copy mem_mask to parameter 4 (ECX on SysV)
+ else
+ a.mov(Gpq(REG_PARAM4), r11); // copy mem_mask to parameter 4 (RCX on SysV)
+ if (accessors.specific.write.displacement)
+ a.add(Gpq(REG_PARAM1), accessors.specific.write.displacement); // apply this pointer offset
+ if (accessors.specific.write.is_virtual)
+ a.call(ptr(r10, accessors.specific.write.function)); // call virtual member function
+ else
+ smart_call_r64(a, (x86code *)accessors.specific.write.function, rax); // call non-virtual member function
+ }
+ else if (spacesizep.size() == SIZE_BYTE)
+ {
+ mov_reg_param(a, Gpd(REG_PARAM4), maskp);
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_byte_masked.obj);
+ smart_call_r64(a, accessors.resolved.write_byte_masked.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ mov_reg_param(a, Gpd(REG_PARAM4), maskp);
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_word_masked.obj);
+ smart_call_r64(a, accessors.resolved.write_word_masked.func, rax);
+ }
+ else if (spacesizep.size() == SIZE_DWORD)
+ {
+ mov_reg_param(a, Gpd(REG_PARAM4), maskp);
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_dword_masked.obj);
+ smart_call_r64(a, accessors.resolved.write_dword_masked.func, rax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- if (resolved.write_word.func)
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), resolved.write_qword_masked.obj); // mov param1,space
- smart_call_r64(a, resolved.write_qword_masked.func, rax); // call write_qword_masked
- }
- else
- {
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacesizep.space()]); // mov param1,space
- smart_call_m64(a, (x86code **)&trampolines.write_qword_masked); // call write_qword_masked
- }
+ mov_reg_param(a, Gpq(REG_PARAM4), maskp);
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessors.resolved.write_qword_masked.obj);
+ smart_call_r64(a, accessors.resolved.write_qword_masked.func, rax);
}
}
@@ -2645,33 +3550,37 @@ void drcbe_x64::op_carry(Assembler &a, const instruction &inst)
// degenerate case: source is immediate
if (srcp.is_immediate() && bitp.is_immediate())
{
- if (srcp.immediate() & ((uint64_t)1 << bitp.immediate()))
+ if (BIT(srcp.immediate(), bitp.immediate() & ((inst.size() * 8) - 1)))
a.stc();
else
a.clc();
+
+ return;
}
// load non-immediate bit numbers into a register
+ Gp const bitreg = (inst.size() == 8) ? Gp(rcx) : Gp(ecx);
if (!bitp.is_immediate())
{
- mov_reg_param(a, ecx, bitp);
- a.and_(ecx, inst.size() * 8 - 1);
+ mov_reg_param(a, bitreg, bitp);
+ a.and_(bitreg, (inst.size() * 8) - 1);
}
if (srcp.is_memory())
{
if (bitp.is_immediate())
- a.bt(MABS(srcp.memory(), inst.size()), bitp.immediate()); // bt [srcp],bitp
+ a.bt(MABS(srcp.memory(), inst.size()), bitp.immediate() & ((inst.size() * 8) - 1));
else
- a.bt(MABS(srcp.memory(), inst.size()), ecx); // bt [srcp],ecx
+ a.bt(MABS(srcp.memory(), inst.size()), bitreg);
}
- else if (srcp.is_int_register())
+ else
{
- Gp const src = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, srcp.ireg());
+ Gp const src = srcp.select_register(Gp(bitreg, Gp::kIdAx));
+ mov_reg_param(a, src, srcp);
if (bitp.is_immediate())
- a.bt(src, bitp.immediate()); // bt srcp,bitp
+ a.bt(src, bitp.immediate() & ((inst.size() * 8) - 1));
else
- a.bt(src, ecx); // bt srcp,ecx
+ a.bt(src, bitreg);
}
}
@@ -2716,47 +3625,71 @@ void drcbe_x64::op_mov(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
// add a conditional branch unless a conditional move is possible
- Label skip = a.newLabel();
- if (inst.condition() != uml::COND_ALWAYS && !(dstp.is_int_register() && !srcp.is_immediate()))
- a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ Label skip;
+ const bool need_skip = (inst.condition() != uml::COND_ALWAYS) && !dstp.is_int_register();
+ if (need_skip)
+ {
+ skip = a.newLabel();
+ a.short_().j(X86_NOT_CONDITION(inst.condition()), skip);
+ }
- // register to memory
if (dstp.is_memory() && srcp.is_int_register())
{
+ // register to memory
Gp const src = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, srcp.ireg());
- a.mov(MABS(dstp.memory()), src); // mov [dstp],srcp
+ a.mov(MABS(dstp.memory()), src);
}
- // immediate to memory
else if (dstp.is_memory() && srcp.is_immediate() && short_immediate(srcp.immediate()))
- a.mov(MABS(dstp.memory(), inst.size()), s32(srcp.immediate())); // mov [dstp],srcp
-
- // conditional memory to register
- else if (inst.condition() != 0 && dstp.is_int_register() && srcp.is_memory())
{
- Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
- a.cmov(X86_CONDITION(inst.condition()), dst, MABS(srcp.memory())); // cmovcc dstp,[srcp]
+ // immediate to memory
+ a.mov(MABS(dstp.memory(), inst.size()), s32(srcp.immediate()));
}
-
- // conditional register to register
- else if (inst.condition() != 0 && dstp.is_int_register() && srcp.is_int_register())
+ else if (dstp.is_int_register() && srcp.is_memory())
{
- Gp const src = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, srcp.ireg());
+ // conditional memory to register
Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
- a.cmov(X86_CONDITION(inst.condition()), dst, src); // cmovcc dstp,srcp
+
+ if (inst.condition() != uml::COND_ALWAYS)
+ a.cmov(X86_CONDITION(inst.condition()), dst, MABS(srcp.memory()));
+ else
+ a.mov(dst, MABS(srcp.memory()));
}
+ else if (dstp.is_int_register())
+ {
+ // conditional register to register
+ Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
- // general case
+ if (inst.condition() != uml::COND_ALWAYS)
+ {
+ if (srcp.is_int_register())
+ {
+ Gp const src = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, srcp.ireg());
+ a.cmov(X86_CONDITION(inst.condition()), dst, src);
+ }
+ else
+ {
+ Gp const src = (inst.size() == 4) ? Gp(eax) : Gp(rax);
+ mov_reg_param(a, src, srcp, true);
+ a.cmov(X86_CONDITION(inst.condition()), dst, src);
+ }
+ }
+ else
+ {
+ mov_reg_param(a, dst, srcp, true);
+ }
+ }
else
{
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax) : dstp.select_register(rax);
+ // general case
+ Gp const dstreg = (inst.size() == 4) ? dstp.select_register(eax) : dstp.select_register(rax);
- mov_reg_param(a, dstreg, srcp, true); // mov dstreg,srcp
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg, srcp, true);
+ mov_param_reg(a, dstp, dstreg);
}
// resolve the jump
- if (inst.condition() != uml::COND_ALWAYS && !(dstp.is_int_register() && !srcp.is_immediate()))
+ if (need_skip)
a.bind(skip);
}
@@ -2780,64 +3713,67 @@ void drcbe_x64::op_sext(Assembler &a, const instruction &inst)
Gp dstreg = dstp.select_register(rax);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
dstreg = dstreg.r32();
- // general case
if (srcp.is_memory())
{
if (sizep.size() == SIZE_BYTE)
- a.movsx(dstreg, MABS(srcp.memory(), 1)); // movsx dstreg,[srcp]
+ a.movsx(dstreg, MABS(srcp.memory(), 1));
else if (sizep.size() == SIZE_WORD)
- a.movsx(dstreg, MABS(srcp.memory(), 2)); // movsx dstreg,[srcp]
+ a.movsx(dstreg, MABS(srcp.memory(), 2));
else if (sizep.size() == SIZE_DWORD)
- a.mov(dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
+ a.mov(dstreg, MABS(srcp.memory()));
}
- else if (srcp.is_int_register())
+ else
{
+ Gp const srcreg = srcp.select_register(dstreg);
+ mov_reg_param(a, srcreg, srcp);
if (sizep.size() == SIZE_BYTE)
- a.movsx(dstreg, GpbLo(srcp.ireg())); // movsx dstreg,srcp
+ a.movsx(dstreg, srcreg.r8());
else if (sizep.size() == SIZE_WORD)
- a.movsx(dstreg, Gpw(srcp.ireg())); // movsx dstreg,srcp
+ a.movsx(dstreg, srcreg.r16());
else if (sizep.size() == SIZE_DWORD)
- a.mov(dstreg, Gpd(srcp.ireg())); // mov dstreg,srcp
+ a.mov(dstreg, srcreg);
}
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- }
- // 64-bit form
+ mov_param_reg(a, dstp, dstreg);
+ }
else if (inst.size() == 8)
{
- // general case
+ // 64-bit form
if (srcp.is_memory())
{
if (sizep.size() == SIZE_BYTE)
- a.movsx(dstreg, MABS(srcp.memory(), 1)); // movsx dstreg,[srcp]
+ a.movsx(dstreg, MABS(srcp.memory(), 1));
else if (sizep.size() == SIZE_WORD)
- a.movsx(dstreg, MABS(srcp.memory(), 2)); // movsx dstreg,[srcp]
+ a.movsx(dstreg, MABS(srcp.memory(), 2));
else if (sizep.size() == SIZE_DWORD)
- a.movsxd(dstreg, MABS(srcp.memory(), 4)); // movsxd dstreg,[srcp]
+ a.movsxd(dstreg, MABS(srcp.memory(), 4));
else if (sizep.size() == SIZE_QWORD)
- a.mov(dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
+ a.mov(dstreg, MABS(srcp.memory()));
}
- else if (srcp.is_int_register())
+ else
{
+ Gp const srcreg = srcp.select_register(dstreg);
+ mov_reg_param(a, srcreg, srcp);
if (sizep.size() == SIZE_BYTE)
- a.movsx(dstreg, GpbLo(srcp.ireg())); // movsx dstreg,srcp
+ a.movsx(dstreg, srcreg.r8());
else if (sizep.size() == SIZE_WORD)
- a.movsx(dstreg, Gpw(srcp.ireg())); // movsx dstreg,srcp
+ a.movsx(dstreg, srcreg.r16());
else if (sizep.size() == SIZE_DWORD)
- a.movsxd(dstreg, Gpd(srcp.ireg())); // movsxd dstreg,srcp
+ a.movsxd(dstreg, srcreg.r32());
else if (sizep.size() == SIZE_QWORD)
- a.mov(dstreg, Gpq(srcp.ireg())); // mov dstreg,srcp
+ a.mov(dstreg, srcreg);
}
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+
+ mov_param_reg(a, dstp, dstreg);
}
if (inst.flags() != 0)
- a.test(dstreg, dstreg); // test dstreg,dstreg
+ a.test(dstreg, dstreg);
}
@@ -2857,28 +3793,63 @@ void drcbe_x64::op_roland(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
be_parameter shiftp(*this, inst.param(2), PTYPE_MRI);
be_parameter maskp(*this, inst.param(3), PTYPE_MRI);
+ const unsigned bits = inst.size() * 8;
// pick a target register
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, shiftp, maskp) : dstp.select_register(rax, shiftp, maskp);
+ Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax), maskp);
- mov_reg_param(a, dstreg, srcp); // mov dstreg,srcp
- if (!shiftp.is_immediate_value(0))
- shift_op_param(a, Inst::kIdRol, dstreg, shiftp); // rol dstreg,shiftp
- alu_op_param(a, Inst::kIdAnd, dstreg, maskp, // and dstreg,maskp
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ if (shiftp.is_immediate() && maskp.is_immediate())
+ {
+ const unsigned shift = shiftp.immediate() & (bits - 1);
+ const uint64_t sizemask = util::make_bitmask<uint64_t>(bits);
+ const uint64_t mask = maskp.immediate() & sizemask;
+ mov_reg_param(a, dstreg, srcp);
+ a.rol(dstreg, shift);
+ if (!inst.flags() && (mask == 0x000000ff))
{
- // optimize all-zero and all-one cases
- if (!inst.flags() && !src.immediate())
- {
- a.xor_(dst.as<Gpd>(), dst.as<Gpd>());
- return true;
- }
- else if (!inst.flags() && ones(src.immediate(), inst.size()))
- return true;
+ a.movzx(dstreg, dstreg.r8());
+ }
+ else if (!inst.flags() && (mask == 0x0000ffff))
+ {
+ a.movzx(dstreg, dstreg.r16());
+ }
+ else if (!inst.flags() && (mask == 0xffffffff))
+ {
+ a.mov(dstreg.r32(), dstreg.r32());
+ }
+ else if ((bits == 32) || (util::sext(mask, 32) == mask))
+ {
+ a.and_(dstreg, mask);
+ }
+ else if (uint32_t(mask) == mask)
+ {
+ a.and_(dstreg, mask); // asmjit converts this to a DWORD-size operation
+ if (inst.flags())
+ a.test(dstreg, dstreg);
+ }
+ else
+ {
+ a.mov(rdx, mask);
+ a.and_(dstreg, rdx);
+ }
+ }
+ else
+ {
+ if (shiftp.is_immediate())
+ {
+ mov_reg_param(a, dstreg, srcp);
+ a.rol(dstreg, shiftp.immediate() & (bits - 1));
+ }
+ else
+ {
+ mov_reg_param(a, ecx, shiftp); // must happen before loading dstreg as shift and dst may be the same register
+ mov_reg_param(a, dstreg, srcp);
+ a.rol(dstreg, cl);
+ }
+ alu_op_param(a, Inst::kIdAnd, dstreg, maskp);
+ }
- return false;
- });
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg);
}
@@ -2899,48 +3870,247 @@ void drcbe_x64::op_rolins(Assembler &a, const instruction &inst)
be_parameter shiftp(*this, inst.param(2), PTYPE_MRI);
be_parameter maskp(*this, inst.param(3), PTYPE_MRI);
- // 32-bit form
- if (inst.size() == 4)
- {
- // pick a target register
- Gp dstreg = dstp.select_register(ecx, shiftp, maskp);
+ // pick registers
+ Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(ecx) : Gp(rcx), shiftp, maskp);
+ Gp srcreg = (inst.size() == 4) ? Gp(eax) : Gp(rax);
+ Gp maskreg = (inst.size() == 4) ? Gp(edx) : Gp(rdx);
- mov_reg_param(a, eax, srcp); // mov eax,srcp
- if (!shiftp.is_immediate_value(0))
- shift_op_param(a, Inst::kIdRol, eax, shiftp); // rol eax,shiftp
- mov_reg_param(a, dstreg, dstp); // mov dstreg,dstp
- if (maskp.is_immediate())
+ const unsigned bits = inst.size() * 8;
+ const uint64_t sizemask = util::make_bitmask<uint64_t>(bits);
+
+ if (shiftp.is_immediate() && (srcp.is_immediate() || maskp.is_immediate()))
+ {
+ const unsigned shift = shiftp.immediate() & (bits - 1);
+ if (srcp.is_immediate())
{
- a.and_(eax, maskp.immediate()); // and eax,maskp
- a.and_(dstreg, ~maskp.immediate()); // and dstreg,~maskp
+ // immediate source
+
+ uint64_t src = srcp.immediate() & sizemask;
+ src = ((src << shift) | (src >> (bits - shift))) & sizemask;
+
+ if (maskp.is_immediate())
+ {
+ const uint64_t mask = maskp.immediate() & sizemask;
+ src &= mask;
+
+ bool flags = false;
+ mov_reg_param(a, dstreg, dstp);
+ if (mask == 0xffffffff'00000000)
+ {
+ a.mov(dstreg.r32(), dstreg.r32());
+ }
+ else if (mask == (0xffffffff'ffff0000 & sizemask))
+ {
+ a.movzx(dstreg, dstreg.r16());
+ }
+ else if (mask == (0xffffffff'ffffff00 & sizemask))
+ {
+ a.movzx(dstreg, dstreg.r8());
+ }
+ else if ((bits == 32) || (util::sext(~mask, 32) == ~mask))
+ {
+ a.and_(dstreg, ~mask);
+ flags = true;
+ }
+ else if (uint32_t(~mask) == ~mask)
+ {
+ a.and_(dstreg, ~mask);
+ }
+ else
+ {
+ a.mov(maskreg, ~mask);
+ a.and_(dstreg, maskreg);
+ flags = true;
+ }
+
+ if (src)
+ {
+ if ((bits == 32) || (util::sext(src, 32) == src))
+ {
+ a.or_(dstreg, src);
+ }
+ else
+ {
+ a.mov(srcreg, src);
+ a.or_(dstreg, srcreg);
+ }
+ }
+ else if (!flags && inst.flags())
+ {
+ a.test(dstreg, dstreg);
+ }
+ }
+ else
+ {
+ mov_reg_param(a, dstreg, dstp);
+ mov_reg_param(a, maskreg, maskp);
+ if (src)
+ {
+ if ((bits == 32) || (util::sext(src, 32) == src))
+ {
+ a.mov(srcreg, maskreg);
+ a.not_(maskreg);
+ a.and_(srcreg, src);
+ }
+ else
+ {
+ a.mov(srcreg, src);
+ a.and_(srcreg, maskreg);
+ a.not_(maskreg);
+ }
+ a.and_(dstreg, maskreg);
+ a.or_(dstreg, srcreg);
+ }
+ else
+ {
+ a.not_(maskreg);
+ a.and_(dstreg, maskreg);
+ }
+ }
}
else
{
- mov_reg_param(a, edx, maskp); // mov edx,maskp
- a.and_(eax, edx); // and eax,edx
- a.not_(edx); // not edx
- a.and_(dstreg, edx); // and dstreg,edx
+ // variables source, immediate mask
+ const uint64_t mask = maskp.immediate() & sizemask;
+
+ mov_reg_param(a, dstreg, dstp);
+
+ bool maskloaded = false;
+ if (!shift)
+ {
+ if (mask == 0x00000000'000000ff)
+ {
+ if (srcp.is_int_register())
+ a.movzx(srcreg, GpbLo(srcp.ireg()));
+ else if (srcp.is_memory())
+ a.movzx(srcreg, MABS(srcp.memory(), 1));
+ }
+ else if (mask == 0x00000000'0000ffff)
+ {
+ if (srcp.is_int_register())
+ a.movzx(srcreg, Gpw(srcp.ireg()));
+ else if (srcp.is_memory())
+ a.movzx(srcreg, MABS(srcp.memory(), 2));
+ }
+ else if (mask == 0x00000000'ffffffff)
+ {
+ mov_reg_param(a, srcreg.r32(), srcp);
+ }
+ else
+ {
+ mov_reg_param(a, srcreg, srcp);
+ a.and_(srcreg, mask);
+ }
+ }
+ else if (mask == (util::make_bitmask<uint64_t>(shift) & sizemask))
+ {
+ mov_reg_param(a, srcreg, srcp);
+ a.shr(srcreg, bits - shift);
+ }
+ else if (mask == (~util::make_bitmask<uint64_t>(shift) & sizemask))
+ {
+ mov_reg_param(a, srcreg, srcp);
+ a.shl(srcreg, shift);
+ }
+ else
+ {
+ mov_reg_param(a, srcreg, srcp);
+ a.rol(srcreg, shift);
+ if (mask == 0x00000000'000000ff)
+ {
+ a.movzx(srcreg, srcreg.r8());
+ }
+ else if (mask == 0x00000000'0000ffff)
+ {
+ a.movzx(srcreg, srcreg.r16());
+ }
+ else if (mask == 0x00000000'ffffffff)
+ {
+ a.mov(srcreg.r32(), srcreg.r32());
+ }
+ else if ((bits == 32) || (util::sext(mask, 32) == mask) || (uint32_t(mask) == mask))
+ {
+ a.and_(srcreg, mask);
+ }
+ else
+ {
+ a.mov(maskreg, mask);
+ a.and_(srcreg, maskreg);
+ maskloaded = true;
+ }
+ }
+
+ if (mask == 0xffffffff'00000000)
+ {
+ a.mov(dstreg.r32(), dstreg.r32());
+ }
+ else if (mask == (0xffffffff'ffff0000 & sizemask))
+ {
+ a.movzx(dstreg, dstreg.r16());
+ }
+ else if (mask == (0xffffffff'ffffff00 & sizemask))
+ {
+ a.movzx(dstreg, dstreg.r8());
+ }
+ else if ((bits == 32) || (util::sext(~mask, 32) == ~mask) || (uint32_t(~mask) == ~mask))
+ {
+ a.and_(dstreg, ~mask & sizemask);
+ }
+ else
+ {
+ if (maskloaded)
+ a.not_(maskreg);
+ else
+ a.mov(maskreg, ~mask);
+ a.and_(dstreg, maskreg);
+ }
+
+ a.or_(dstreg, srcreg);
}
- a.or_(dstreg, eax); // or dstreg,eax
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- }
- // 64-bit form
- else if (inst.size() == 8)
+ mov_param_reg(a, dstp, dstreg);
+ }
+ else
{
- // pick a target register
- Gp dstreg = dstp.select_register(rcx, shiftp, maskp);
-
- mov_reg_param(a, rax, srcp); // mov rax,srcp
- mov_reg_param(a, rdx, maskp); // mov rdx,maskp
- if (!shiftp.is_immediate_value(0))
- shift_op_param(a, Inst::kIdRol, rax, shiftp); // rol rax,shiftp
- mov_reg_param(a, dstreg, dstp); // mov dstreg,dstp
- a.and_(rax, rdx); // and eax,rdx
- a.not_(rdx); // not rdx
- a.and_(dstreg, rdx); // and dstreg,rdx
- a.or_(dstreg, rax); // or dstreg,rax
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ // generic case
+
+ bool maskimm = maskp.is_immediate();
+ uint64_t mask = 0;
+ if (maskimm)
+ {
+ mask = maskp.immediate() & sizemask;
+ if (bits != 32)
+ {
+ maskimm =
+ ((util::sext(mask, 32) == mask) && (uint32_t(~mask) == ~mask)) ||
+ ((util::sext(~mask, 32) == ~mask) && (uint32_t(mask) == mask));
+ }
+ }
+
+ mov_reg_param(a, srcreg, srcp);
+ if (!maskimm)
+ mov_reg_param(a, maskreg, maskp);
+
+ if (!shiftp.is_immediate())
+ mov_reg_param(a, ecx, shiftp);
+ shift_op_param(a, Inst::kIdRol, inst.size(), srcreg, shiftp, 0);
+ mov_reg_param(a, dstreg, dstp);
+
+ if (!maskimm)
+ {
+ a.and_(srcreg, maskreg);
+ a.not_(maskreg);
+ a.and_(dstreg, maskreg);
+ }
+ else
+ {
+ a.and_(srcreg, mask);
+ a.and_(dstreg, ~mask & sizemask);
+ }
+
+ a.or_(dstreg, srcreg);
+
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -2960,57 +4130,48 @@ void drcbe_x64::op_add(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- normalize_commutative(src1p, src2p);
+ normalize_commutative(dstp, src1p, src2p);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
alu_op_param(a, Inst::kIdAdd, MABS(dstp.memory(), inst.size()), src2p, // add [dstp],src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
- {
- // optimize zero case
- return (!inst.flags() && !src.immediate());
- });
-
- // dstp == src2p in memory
- else if (dstp.is_memory() && dstp == src2p)
- alu_op_param(a, Inst::kIdAdd, MABS(dstp.memory(), inst.size()), src1p, // add [dstp],src1p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
});
-
- // reg = reg + imm
+ }
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && !inst.flags())
{
+ // reg = reg + imm
Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
Gp const src1 = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src1p.ireg());
a.lea(dst, ptr(src1, src2p.immediate())); // lea dstp,[src1p+src2p]
}
-
- // reg = reg + reg
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_int_register() && !inst.flags())
{
+ // reg = reg + reg
Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
Gp const src1 = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src1p.ireg());
Gp const src2 = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src2p.ireg());
a.lea(dst, ptr(src1, src2)); // lea dstp,[src1p+src2p]
}
-
- // general case
else
{
+ // general case
+
// pick a target register for the general case
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
+ Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax), src2p);
mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
alu_op_param(a, Inst::kIdAdd, dstreg, src2p, // add dstreg,src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
- return (!inst.flags() && !src.immediate());
+ return (!inst.flags() && !src.immediate() && (inst.size() != 4));
});
mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
}
@@ -3032,15 +4193,17 @@ void drcbe_x64::op_addc(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- normalize_commutative(src1p, src2p);
+ normalize_commutative(dstp, src1p, src2p);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
alu_op_param(a, Inst::kIdAdc, MABS(dstp.memory(), inst.size()), src2p); // adc [dstp],src2p
-
- // general case
+ }
else
{
+ // general case
+
// pick a target register for the general case
Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
@@ -3067,38 +4230,54 @@ void drcbe_x64::op_sub(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
- alu_op_param(a, Inst::kIdSub, MABS(dstp.memory(), inst.size()), src2p, // sub [dstp],src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ if (src1p.is_immediate_value(0))
+ {
+ if (dstp.is_memory() && (dstp == src2p) && ((inst.size() == 8) || !dstp.is_cold_register()))
+ {
+ a.neg(MABS(dstp.memory(), inst.size()));
+ }
+ else
+ {
+ Gp const dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
+
+ mov_reg_param(a, dstreg, src2p);
+ a.neg(dstreg);
+ mov_param_reg(a, dstp, dstreg);
+ }
+ }
+ else if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
+ alu_op_param(a, Inst::kIdSub, MABS(dstp.memory(), inst.size()), src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
});
-
- // reg = reg - imm
+ }
else if (dstp.is_int_register() && src1p.is_int_register() && src2p.is_immediate() && short_immediate(src2p.immediate()) && !inst.flags())
{
+ // reg = reg - imm
Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
Gp const src1 = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src1p.ireg());
- a.lea(dst, ptr(src1, -src2p.immediate())); // lea dstp,[src1p-src2p]
+ a.lea(dst, ptr(src1, -src2p.immediate()));
}
-
- // general case
else
{
+ // general case
+
// pick a target register for the general case
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
+ Gp const dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax), src2p);
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- alu_op_param(a, Inst::kIdSub, dstreg, src2p, // sub dstreg,src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ mov_reg_param(a, dstreg, src1p);
+ alu_op_param(a, Inst::kIdSub, dstreg, src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
- return (!inst.flags() && !src.immediate());
+ return (!inst.flags() && !src.immediate() && (inst.size() != 4));
});
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -3119,13 +4298,15 @@ void drcbe_x64::op_subc(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
alu_op_param(a, Inst::kIdSbb, MABS(dstp.memory(), inst.size()), src2p); // sbb [dstp],src2p
-
- // general case
+ }
else
{
+ // general case
+
// pick a target register for the general case
Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
@@ -3151,37 +4332,44 @@ void drcbe_x64::op_cmp(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(0), PTYPE_MRI);
be_parameter src2p(*this, inst.param(1), PTYPE_MRI);
- // memory versus anything
- if (src1p.is_memory())
- alu_op_param(a, Inst::kIdCmp, MABS(src1p.memory(), inst.size()), src2p); // cmp [dstp],src2p
+ if (src1p == src2p)
+ {
+ // doesn't matter what we compare if it's always equal
+ const Gp srcreg = (inst.size() == 4) ? Gp(eax) : Gp(rax); // TODO: consider false dependencies
- // general case
+ a.cmp(srcreg, srcreg);
+ }
+ else if (src1p.is_memory())
+ {
+ // memory versus anything
+ alu_op_param(a, Inst::kIdCmp, MABS(src1p.memory(), inst.size()), src2p);
+ }
else
{
+ // general case
+
// pick a target register for the general case
- Gp src1reg = (inst.size() == 4) ? src1p.select_register(eax) : src1p.select_register(rax);
+ const Gp src1reg = src1p.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
if (src1p.is_immediate())
{
if (inst.size() == 4)
- a.mov(src1reg, src1p.immediate()); // mov src1reg,imm
+ a.mov(src1reg, src1p.immediate());
else
- mov_r64_imm(a, src1reg, src1p.immediate()); // mov src1reg,imm
+ mov_r64_imm(a, src1reg, src1p.immediate());
}
- alu_op_param(a, Inst::kIdCmp, src1reg, src2p); // cmp src1reg,src2p
+ alu_op_param(a, Inst::kIdCmp, src1reg, src2p);
}
}
//-------------------------------------------------
-// op_mulu - process a MULU opcode
+// op_mul - process a MULU or MULS opcode
//-------------------------------------------------
-void drcbe_x64::op_mulu(Assembler &a, const instruction &inst)
+template <Inst::Id Opcode>
+void drcbe_x64::op_mul(Assembler &a, const instruction &inst)
{
- uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- uint8_t vflag = inst.flags() & FLAG_V;
-
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_no_condition(inst);
@@ -3193,129 +4381,43 @@ void drcbe_x64::op_mulu(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
normalize_commutative(src1p, src2p);
- bool compute_hi = (dstp != edstp);
-
- // 32-bit form
- if (inst.size() == 4)
- {
- // general case
- mov_reg_param(a, eax, src1p); // mov eax,src1p
- if (src2p.is_memory())
- a.mul(MABS(src2p.memory(), 4)); // mul [src2p]
- else if (src2p.is_int_register())
- a.mul(Gpd(src2p.ireg())); // mul src2p
- else if (src2p.is_immediate())
- {
- a.mov(edx, src2p.immediate()); // mov edx,src2p
- a.mul(edx); // mul edx
- }
- mov_param_reg(a, dstp, eax); // mov dstp,eax
- if (compute_hi)
- mov_param_reg(a, edstp, edx); // mov edstp,edx
+ const bool compute_hi = (dstp != edstp);
- // compute flags
- if (inst.flags() != 0)
- {
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfq(); // pushf
- if (compute_hi)
- {
- if (zsflags == FLAG_Z)
- a.or_(edx, eax); // or edx,eax
- else if (zsflags == FLAG_S)
- a.test(edx, edx); // test edx,edx
- else
- {
- a.movzx(ecx, ax); // movzx ecx,ax
- a.shr(eax, 16); // shr eax,16
- a.or_(edx, ecx); // or edx,ecx
- a.or_(edx, eax); // or edx,eax
- }
- }
- else
- a.test(eax, eax); // test eax,eax
+ const Gp dstreg = (inst.size() == 4) ? Gp(eax) : Gp(rax);
+ const Gp edstreg = (inst.size() == 4) ? Gp(edx) : Gp(rdx);
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfq(); // pushf
- a.pop(rax); // pop rax
- a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84
- a.or_(ptr(rsp), rax); // or [rsp],rax
- a.popfq(); // popf
- }
- }
- }
+ // general case
+ mov_reg_param(a, dstreg, src1p);
+ if (src2p.is_memory())
+ {
+ a.emit(Opcode, MABS(src2p.memory(), inst.size()));
}
-
- // 64-bit form
- else if (inst.size() == 8)
+ else if (src2p.is_int_register())
{
- // general case
- mov_reg_param(a, rax, src1p); // mov rax,src1p
- if (src2p.is_memory())
- a.mul(MABS(src2p.memory(), 8)); // mul [src2p]
- else if (src2p.is_int_register())
- a.mul(Gpq(src2p.ireg())); // mul src2p
- else if (src2p.is_immediate())
- {
- mov_r64_imm(a, rdx, src2p.immediate()); // mov rdx,src2p
- a.mul(rdx); // mul rdx
- }
- mov_param_reg(a, dstp, rax); // mov dstp,rax
- if (compute_hi)
- mov_param_reg(a, edstp, rdx); // mov edstp,rdx
-
- // compute flags
- if (inst.flags() != 0)
- {
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfq(); // pushf
- if (compute_hi)
- {
- if (zsflags == FLAG_Z)
- a.or_(rdx, rax); // or rdx,rax
- else if (zsflags == FLAG_S)
- a.test(rdx, rdx); // test rdx,rdx
- else
- {
- a.mov(ecx, eax); // mov ecx,eax
- a.shr(rax, 32); // shr rax,32
- a.or_(rdx, rcx); // or rdx,rcx
- a.or_(rdx, rax); // or rdx,rax
- }
- }
- else
- a.test(rax, rax); // test rax,rax
-
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfq(); // pushf
- a.pop(rax); // pop rax
- a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84
- a.or_(ptr(rsp), rax); // or [rsp],rax
- a.popfq(); // popf
- }
- }
- }
+ a.emit(Opcode, Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src2p.ireg()));
+ }
+ else if (src2p.is_immediate())
+ {
+ a.mov(edstreg, src2p.immediate());
+ a.emit(Opcode, edstreg);
}
+ mov_param_reg(a, dstp, dstreg);
+ if (compute_hi)
+ mov_param_reg(a, edstp, edstreg);
+
+ if (inst.flags())
+ calculate_status_flags_mul(a, inst.size(), rax, rdx);
}
//-------------------------------------------------
-// op_muls - process a MULS opcode
+// op_mullw - process a MULULW or MULSLW
+// (32x32=32) opcode
//-------------------------------------------------
-void drcbe_x64::op_muls(Assembler &a, const instruction &inst)
+template <Inst::Id Opcode>
+void drcbe_x64::op_mullw(Assembler &a, const instruction &inst)
{
- uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- uint8_t vflag = inst.flags() & FLAG_V;
-
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_no_condition(inst);
@@ -3323,171 +4425,32 @@ void drcbe_x64::op_muls(Assembler &a, const instruction &inst)
// normalize parameters
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
- be_parameter edstp(*this, inst.param(1), PTYPE_MR);
- be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
- be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
normalize_commutative(src1p, src2p);
- bool compute_hi = (dstp != edstp);
-
- // 32-bit form
- if (inst.size() == 4)
- {
- // 32-bit destination with memory/immediate or register/immediate
- if (!compute_hi && !src1p.is_immediate() && src2p.is_immediate())
- {
- Gp dstreg = dstp.is_int_register() ? Gpd(dstp.ireg()) : eax;
- if (src1p.is_memory())
- a.imul(dstreg, MABS(src1p.memory()), src2p.immediate()); // imul dstreg,[src1p],src2p
- else if (src1p.is_int_register())
- a.imul(dstreg, Gpd(src1p.ireg()), src2p.immediate()); // imul dstreg,src1p,src2p
- mov_param_reg(a, dstp, dstreg); // mov dstp,eax
- }
- // 32-bit destination, general case
- else if (!compute_hi)
- {
- Gp dstreg = dstp.is_int_register() ? Gpd(dstp.ireg()) : eax;
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- if (src2p.is_memory())
- a.imul(dstreg, MABS(src2p.memory())); // imul dstreg,[src2p]
- else if (src2p.is_int_register())
- a.imul(dstreg, Gpd(src2p.ireg())); // imul dstreg,src2p
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- }
-
- // 64-bit destination, general case
- else
- {
- mov_reg_param(a, eax, src1p); // mov eax,src1p
- if (src2p.is_memory())
- a.imul(MABS(src2p.memory(), 4)); // imul [src2p]
- else if (src2p.is_int_register())
- a.imul(Gpd(src2p.ireg())); // imul src2p
- else if (src2p.is_immediate())
- {
- a.mov(edx, src2p.immediate()); // mov edx,src2p
- a.imul(edx); // imul edx
- }
- mov_param_reg(a, dstp, eax); // mov dstp,eax
- mov_param_reg(a, edstp, edx); // mov edstp,edx
- }
-
- // compute flags
- if (inst.flags() != 0)
- {
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfq(); // pushf
- if (compute_hi)
- {
- if (zsflags == FLAG_Z)
- a.or_(edx, eax); // or edx,eax
- else if (zsflags == FLAG_S)
- a.test(edx, edx); // test edx,edx
- else
- {
- a.movzx(ecx, ax); // movzx ecx,ax
- a.shr(eax, 16); // shr eax,16
- a.or_(edx, ecx); // or edx,ecx
- a.or_(edx, eax); // or edx,eax
- }
- }
- else
- a.test(eax, eax); // test eax,eax
+ const Gp dstreg = (inst.size() == 4) ? Gp(eax) : Gp(rax);
+ const Gp hireg = (inst.size() == 4) ? Gp(edx) : Gp(rdx);
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfq(); // pushf
- a.pop(rax); // pop rax
- a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84
- a.or_(ptr(rsp), rax); // or [rsp],rax
- a.popfq(); // popf
- }
- }
- }
+ // general case
+ mov_reg_param(a, dstreg, src1p);
+ if (src2p.is_memory())
+ {
+ a.emit(Opcode, MABS(src2p.memory(), inst.size()));
}
-
- // 64-bit form
- else if (inst.size() == 8)
+ else if (src2p.is_int_register())
{
- // 64-bit destination with memory/immediate or register/immediate
- if (!compute_hi && !src1p.is_immediate() && src2p.is_immediate() && short_immediate(src2p.immediate()))
- {
- Gp dstreg = dstp.is_int_register() ? Gpq(dstp.ireg()) : rax;
- if (src1p.is_memory())
- a.imul(dstreg, MABS(src1p.memory()), src2p.immediate()); // imul dstreg,[src1p],src2p
- else if (src1p.is_int_register())
- a.imul(dstreg, Gpq(src1p.ireg()), src2p.immediate()); // imul rax,src1p,src2p
- mov_param_reg(a, dstp, dstreg); // mov dstp,rax
- }
-
- // 64-bit destination, general case
- else if (!compute_hi)
- {
- Gp dstreg = dstp.is_int_register() ? Gpq(dstp.ireg()) : rax;
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- if (src2p.is_memory())
- a.imul(dstreg, MABS(src2p.memory())); // imul dstreg,[src2p]
- else if (src2p.is_int_register())
- a.imul(dstreg, Gpq(src2p.ireg())); // imul dstreg,src2p
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- }
-
- // 128-bit destination, general case
- else
- {
- mov_reg_param(a, rax, src1p); // mov rax,src1p
- if (src2p.is_memory())
- a.imul(MABS(src2p.memory(), 8)); // imul [src2p]
- else if (src2p.is_int_register())
- a.imul(Gpq(src2p.ireg())); // imul src2p
- else if (src2p.is_immediate())
- {
- mov_r64_imm(a, rdx, src2p.immediate()); // mov rdx,src2p
- a.imul(rdx); // imul rdx
- }
- mov_param_reg(a, dstp, rax); // mov dstp,rax
- mov_param_reg(a, edstp, rdx); // mov edstp,rdx
- }
-
- // compute flags
- if (inst.flags() != 0)
- {
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfq(); // pushf
- if (compute_hi)
- {
- if (zsflags == FLAG_Z)
- a.or_(rdx, rax); // or rdx,rax
- else if (zsflags == FLAG_S)
- a.test(rdx, rdx); // test rdx,rdx
- else
- {
- a.mov(ecx, eax); // mov ecx,eax
- a.shr(rax, 32); // shr rax,32
- a.or_(rdx, rcx); // or rdx,rcx
- a.or_(rdx, rax); // or rdx,rax
- }
- }
- else
- a.test(rax, rax); // test rax,rax
-
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfq(); // pushf
- a.pop(rax); // pop rax
- a.and_(qword_ptr(rsp), ~0x84); // and [rsp],~0x84
- a.or_(ptr(rsp), rax); // or [rsp],rax
- a.popfq(); // popf
- }
- }
- }
+ a.emit(Opcode, Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, src2p.ireg()));
+ }
+ else if (src2p.is_immediate())
+ {
+ a.mov(hireg, src2p.immediate());
+ a.emit(Opcode, hireg);
}
+ mov_param_reg(a, dstp, dstreg);
+
+ if (inst.flags())
+ calculate_status_flags_mul_low(a, inst.size(), rax);
}
@@ -3638,96 +4601,74 @@ void drcbe_x64::op_and(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- normalize_commutative(src1p, src2p);
+ normalize_commutative(dstp, src1p, src2p);
// pick a target register
Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
- alu_op_param(a, Inst::kIdAnd, MABS(dstp.memory(), inst.size()), src2p, // and [dstp],src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
- {
- // optimize all-zero and all-one cases
- if (!inst.flags() && !src.immediate())
- {
- a.mov(dst.as<Mem>(), imm(0));
- return true;
- }
- else if (!inst.flags() && ones(src.immediate(), inst.size()))
- return true;
-
- return false;
- });
-
- // dstp == src2p in memory
- else if (dstp.is_memory() && dstp == src2p)
- alu_op_param(a, Inst::kIdAnd, MABS(dstp.memory(), inst.size()), src1p, // and [dstp],src1p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
- {
- // optimize all-zero and all-one cases
- if (!inst.flags() && !src.immediate())
- {
- a.mov(dst.as<Mem>(), imm(0));
- return true;
- }
- else if (!inst.flags() && ones(src.immediate(), inst.size()))
- return true;
-
- return false;
- });
-
- // immediate 0xff
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
+ alu_op_param(a, Inst::kIdAnd, MABS(dstp.memory(), inst.size()), src2p);
+ }
else if (src2p.is_immediate_value(0xff) && !inst.flags())
{
+ // immediate 0xff
if (src1p.is_int_register())
- a.movzx(dstreg, GpbLo(src1p.ireg())); // movzx dstreg,src1p
+ a.movzx(dstreg, GpbLo(src1p.ireg()));
else if (src1p.is_memory())
- a.movzx(dstreg, MABS(src1p.memory(), 1)); // movzx dstreg,[src1p]
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ a.movzx(dstreg, MABS(src1p.memory(), 1));
+ mov_param_reg(a, dstp, dstreg);
}
-
- // immediate 0xffff
else if (src2p.is_immediate_value(0xffff) && !inst.flags())
{
+ // immediate 0xffff
if (src1p.is_int_register())
- a.movzx(dstreg, Gpw(src1p.ireg())); // movzx dstreg,src1p
+ a.movzx(dstreg, Gpw(src1p.ireg()));
else if (src1p.is_memory())
- a.movzx(dstreg, MABS(src1p.memory(), 2)); // movzx dstreg,[src1p]
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ a.movzx(dstreg, MABS(src1p.memory(), 2));
+ mov_param_reg(a, dstp, dstreg);
}
-
- // immediate 0xffffffff
- else if (src2p.is_immediate_value(0xffffffff) && !inst.flags() && inst.size() == 8)
+ else if (src2p.is_immediate_value(0xffffffff) && !inst.flags())
{
+ // immediate 0xffffffff
if (dstp.is_int_register() && src1p == dstp)
- a.mov(dstreg.r32(), dstreg.r32()); // mov dstreg,dstreg
+ {
+ a.mov(dstreg.r32(), dstreg.r32());
+ }
else
{
- mov_reg_param(a, dstreg.r32(), src1p); // mov dstreg,src1p
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg.r32(), src1p);
+ mov_param_reg(a, dstp, dstreg);
}
}
-
- // general case
else
{
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- alu_op_param(a, Inst::kIdAnd, dstreg, src2p, // and dstreg,src2p
+ // general case
+ mov_reg_param(a, dstreg, src1p);
+ alu_op_param(a, Inst::kIdAnd, dstreg, src2p,
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize all-zero and all-one cases
- if (!inst.flags() && !src.immediate())
+ if (!src.immediate())
{
- a.xor_(dst.as<Gpd>(), dst.as<Gpd>());
+ a.xor_(dst.as<Gp>(), dst.as<Gp>());
return true;
}
- else if (!inst.flags() && ones(src.immediate(), inst.size()))
+ else if (ones(src.immediate(), inst.size()))
+ {
+ if (inst.size() == 4)
+ a.and_(dst.as<Gp>(), dst.as<Gp>());
+ else
+ a.test(dst.as<Gp>(), dst.as<Gp>());
+
return true;
+ }
return false;
});
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -3748,18 +4689,31 @@ void drcbe_x64::op_test(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(1), PTYPE_MRI);
normalize_commutative(src1p, src2p);
- // src1p in memory
if (src1p.is_memory())
- alu_op_param(a, Inst::kIdTest, MABS(src1p.memory(), inst.size()), src2p); // test [src1p],src2p
-
- // general case
+ {
+ // src1p in memory
+ alu_op_param(a, Inst::kIdTest, MABS(src1p.memory(), inst.size()), src2p);
+ }
else
{
+ // general case
+
// pick a target register for the general case
- Gp src1reg = (inst.size() == 4) ? src1p.select_register(eax) : src1p.select_register(rax);
+ const Gp src1reg = src1p.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
+
+ mov_reg_param(a, src1reg, src1p);
+ alu_op_param(a, Inst::kIdTest, src1reg, src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
+ {
+ // optimize all-one cases
+ if (ones(src.immediate(), inst.size()))
+ {
+ a.test(dst.as<Gp>(), dst.as<Gp>());
+ return true;
+ }
- mov_reg_param(a, src1reg, src1p); // mov src1reg,src1p
- alu_op_param(a, Inst::kIdTest, src1reg, src2p); // test src1reg,src2p
+ return false;
+ });
}
}
@@ -3779,29 +4733,13 @@ void drcbe_x64::op_or(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- normalize_commutative(src1p, src2p);
+ normalize_commutative(dstp, src1p, src2p);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
alu_op_param(a, Inst::kIdOr, MABS(dstp.memory(), inst.size()), src2p, // or [dstp],src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
- {
- // optimize all-zero and all-one cases
- if (!inst.flags() && ones(src.immediate(), inst.size()))
- {
- a.mov(dst.as<Mem>(), imm(-1));
- return true;
- }
- else if (!inst.flags() && !src.immediate())
- return true;
-
- return false;
- });
-
- // dstp == src2p in memory
- else if (dstp.is_memory() && dstp == src2p)
- alu_op_param(a, Inst::kIdOr, MABS(dstp.memory(), inst.size()), src1p, // or [dstp],src1p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize all-zero and all-one cases
if (!inst.flags() && ones(src.immediate(), inst.size()))
@@ -3809,21 +4747,19 @@ void drcbe_x64::op_or(Assembler &a, const instruction &inst)
a.mov(dst.as<Mem>(), imm(-1));
return true;
}
- else if (!inst.flags() && !src.immediate())
- return true;
-
return false;
});
-
- // general case
+ }
else
{
+ // general case
+
// pick a target register for the general case
Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- alu_op_param(a, Inst::kIdOr, dstreg, src2p, // or dstreg,src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ mov_reg_param(a, dstreg, src1p);
+ alu_op_param(a, Inst::kIdOr, dstreg, src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize all-zero and all-one cases
if (!inst.flags() && ones(src.immediate(), inst.size()))
@@ -3831,12 +4767,10 @@ void drcbe_x64::op_or(Assembler &a, const instruction &inst)
a.mov(dst.as<Gp>(), imm(-1));
return true;
}
- else if (!inst.flags() && !src.immediate())
- return true;
-
return false;
});
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -3856,84 +4790,60 @@ void drcbe_x64::op_xor(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- normalize_commutative(src1p, src2p);
+ normalize_commutative(dstp, src1p, src2p);
- // dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
- alu_op_param(a, Inst::kIdXor, MABS(dstp.memory(), inst.size()), src2p, // xor [dstp],src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
- {
- // optimize all-zero and all-one cases
- if (!inst.flags() && ones(src.immediate(), inst.size()))
- {
- a.not_(dst.as<Mem>());
- return true;
- }
- else if (!inst.flags() && !src.immediate())
- return true;
-
- return false;
- });
-
- // dstp == src2p in memory
- else if (dstp.is_memory() && dstp == src2p)
- alu_op_param(a, Inst::kIdXor, MABS(dstp.memory(), inst.size()), src1p, // xor [dstp],src1p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
+ {
+ // dstp == src1p in memory
+ alu_op_param(a, Inst::kIdXor, MABS(dstp.memory(), inst.size()), src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
- // optimize all-zero and all-one cases
+ // optimize all-one cases
if (!inst.flags() && ones(src.immediate(), inst.size()))
{
a.not_(dst.as<Mem>());
return true;
}
- else if (!inst.flags() && !src.immediate())
- return true;
return false;
});
-
- // dstp == src1p register
- else if (dstp.is_int_register() && dstp == src1p)
+ }
+ else if (dstp.is_int_register() && (dstp == src1p))
{
+ // dstp == src1p register
Gp const dst = Gp::fromTypeAndId((inst.size() == 4) ? RegType::kX86_Gpd : RegType::kX86_Gpq, dstp.ireg());
- alu_op_param(a, Inst::kIdXor, dst, src2p, // xor dstp,src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ alu_op_param(a, Inst::kIdXor, dst, src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
- // optimize all-zero and all-one cases
+ // optimize all-one cases
if (!inst.flags() && ones(src.immediate(), inst.size()))
{
a.not_(dst.as<Gp>());
return true;
}
- else if (!inst.flags() && !src.immediate())
- return true;
-
return false;
});
}
- // general case
else
{
- // pick a target register for the general case
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
+ // general case
+ Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax), src2p);
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- alu_op_param(a, Inst::kIdXor, dstreg, src2p, // xor dstreg,src2p
- [inst](Assembler &a, Operand const &dst, be_parameter const &src)
+ mov_reg_param(a, dstreg, src1p);
+ alu_op_param(a, Inst::kIdXor, dstreg, src2p,
+ [inst] (Assembler &a, Operand const &dst, be_parameter const &src)
{
- // optimize all-zero and all-one cases
+ // optimize all-one cases
if (!inst.flags() && ones(src.immediate(), inst.size()))
{
a.not_(dst.as<Gp>());
return true;
}
- else if (!inst.flags() && !src.immediate())
- return true;
-
return false;
});
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -3953,18 +4863,27 @@ void drcbe_x64::op_lzcnt(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ if (inst.flags())
+ {
+ a.xor_(eax, eax); // reset status flags
+ a.test(eax, eax);
+ }
+
// 32-bit form
if (inst.size() == 4)
{
// pick a target register
Gp dstreg = dstp.select_register(eax);
- mov_reg_param(a, dstreg, srcp); // mov dstreg,src1p
- a.mov(ecx, 32 ^ 31); // mov ecx,32 ^ 31
- a.bsr(dstreg, dstreg); // bsr dstreg,dstreg
- a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
- a.xor_(dstreg, 31); // xor dstreg,31
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg, srcp);
+ a.mov(ecx, 32 ^ 31);
+ a.bsr(dstreg, dstreg);
+ a.cmovz(dstreg, ecx);
+ a.xor_(dstreg, 31);
+ mov_param_reg(a, dstp, dstreg);
+
+ if (inst.flags())
+ a.test(dstreg, dstreg);
}
// 64-bit form
@@ -3973,12 +4892,15 @@ void drcbe_x64::op_lzcnt(Assembler &a, const instruction &inst)
// pick a target register
Gp dstreg = dstp.select_register(rax);
- mov_reg_param(a, dstreg, srcp); // mov dstreg,src1p
- a.mov(ecx, 64 ^ 63); // mov ecx,64 ^ 63
- a.bsr(dstreg, dstreg); // bsr dstreg,dstreg
- a.cmovz(dstreg, rcx); // cmovz dstreg,rcx
- a.xor_(dstreg, 63); // xor dstreg,63
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg, srcp);
+ a.mov(ecx, 64 ^ 63);
+ a.bsr(dstreg, dstreg);
+ a.cmovz(dstreg, rcx);
+ a.xor_(dstreg, 63);
+ mov_param_reg(a, dstp, dstreg);
+
+ if (inst.flags())
+ a.test(dstreg, dstreg);
}
}
@@ -3998,16 +4920,22 @@ void drcbe_x64::op_tzcnt(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter srcp(*this, inst.param(1), PTYPE_MRI);
+ if (inst.flags())
+ {
+ a.xor_(eax, eax); // reset status flags
+ a.test(eax, eax);
+ }
+
// 32-bit form
if (inst.size() == 4)
{
Gp dstreg = dstp.select_register(eax);
- mov_reg_param(a, dstreg, srcp); // mov dstreg,srcp
- a.mov(ecx, 32); // mov ecx,32
- a.bsf(dstreg, dstreg); // bsf dstreg,dstreg
- a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg, srcp);
+ a.mov(ecx, 32);
+ a.bsf(dstreg, dstreg);
+ a.cmovz(dstreg, ecx);
+ mov_param_reg(a, dstp, dstreg);
}
// 64-bit form
@@ -4015,11 +4943,11 @@ void drcbe_x64::op_tzcnt(Assembler &a, const instruction &inst)
{
Gp dstreg = dstp.select_register(rax);
- mov_reg_param(a, dstreg, srcp); // mov dstreg,srcp
- a.mov(ecx, 64); // mov ecx,64
- a.bsf(dstreg, dstreg); // bsf dstreg,dstreg
- a.cmovz(dstreg, rcx); // cmovz dstreg,rcx
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ mov_reg_param(a, dstreg, srcp);
+ a.mov(rcx, 64);
+ a.bsf(dstreg, dstreg);
+ a.cmovz(dstreg, rcx);
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -4049,7 +4977,8 @@ void drcbe_x64::op_bswap(Assembler &a, const instruction &inst)
mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
}
-template <Inst::Id Opcode> void drcbe_x64::op_shift(Assembler &a, const uml::instruction &inst)
+template <Inst::Id Opcode>
+void drcbe_x64::op_shift(Assembler &a, const uml::instruction &inst)
{
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
@@ -4061,28 +4990,28 @@ template <Inst::Id Opcode> void drcbe_x64::op_shift(Assembler &a, const uml::ins
be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
- const bool carry = (Opcode == Inst::kIdRcl) || (Opcode == Inst::kIdRcr);
+ const bool carryin = (Opcode == Inst::kIdRcl) || (Opcode == Inst::kIdRcr);
- // optimize immediate zero case
- if (carry || inst.flags() || !src2p.is_immediate_value(0))
+ if (dstp.is_memory() && ((inst.size() == 8) || !dstp.is_cold_register()) && (dstp == src1p))
{
// dstp == src1p in memory
- if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Opcode, MABS(dstp.memory(), inst.size()), src2p); // op [dstp],src2p
-
+ if (!src2p.is_immediate())
+ mov_reg_param(a, ecx, src2p, carryin);
+ shift_op_param(a, Opcode, inst.size(), MABS(dstp.memory(), inst.size()), src2p, inst.flags());
+ }
+ else
+ {
// general case
- else
- {
- // pick a target register
- Gp dstreg = (inst.size() == 4) ? dstp.select_register(eax, src2p) : dstp.select_register(rax, src2p);
- if (carry)
- mov_reg_param(a, dstreg, src1p, true); // mov dstreg,src1p
- else
- mov_reg_param(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Opcode, dstreg, src2p); // op dstreg,src2p
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
- }
+ if (!src2p.is_immediate())
+ mov_reg_param(a, ecx, src2p, carryin); // do this first as shift and dst may be the same register
+
+ // pick a target register
+ const Gp dstreg = dstp.select_register((inst.size() == 4) ? Gp(eax) : Gp(rax));
+ mov_reg_param(a, dstreg, src1p, carryin);
+
+ shift_op_param(a, Opcode, inst.size(), dstreg, src2p, inst.flags());
+ mov_param_reg(a, dstp, dstreg);
}
}
@@ -4106,41 +5035,32 @@ void drcbe_x64::op_fload(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MF);
be_parameter basep(*this, inst.param(1), PTYPE_M);
be_parameter indp(*this, inst.param(2), PTYPE_MRI);
+ Inst::Id const opcode = (inst.size() == 4) ? Inst::kIdMovss : Inst::kIdMovsd;
+ int const scale = (inst.size() == 4) ? 2 : 3;
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
// determine the pointer base
int32_t baseoffs;
- Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
+ Gp const basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
- // 32-bit form
- if (inst.size() == 4)
+ if (indp.is_immediate())
{
- if (indp.is_immediate())
- a.movss(dstreg, ptr(basereg, baseoffs + 4*indp.immediate())); // movss dstreg,[basep + 4*indp]
- else
- {
- Gp indreg = indp.select_register(ecx);
- mov_reg_param(a, indreg, indp); // mov indreg,indp
- a.movss(dstreg, ptr(basereg, indreg, 2, baseoffs)); // movss dstreg,[basep + 4*indp]
- }
- movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
+ ptrdiff_t const offset = ptrdiff_t(s32(u32(indp.immediate()))) << scale;
+ a.emit(opcode, dstreg, ptr(basereg, baseoffs + offset)); // movss dstreg,[basep + 4*indp]
}
-
- // 64-bit form
- else if (inst.size() == 8)
+ else
{
- if (indp.is_immediate())
- a.movsd(dstreg, ptr(basereg, baseoffs + 8*indp.immediate())); // movsd dstreg,[basep + 8*indp]
- else
- {
- Gp indreg = indp.select_register(ecx);
- mov_reg_param(a, indreg, indp); // mov indreg,indp
- a.movsd(dstreg, ptr(basereg, indreg, 3, baseoffs)); // movsd dstreg,[basep + 8*indp]
- }
- movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
+ const Gp indreg = rcx;
+ movsx_r64_p32(a, indreg, indp); // mov indreg,indp
+ a.emit(opcode, dstreg, ptr(basereg, indreg, scale, baseoffs)); // movss dstreg,[basep + 4*indp]
}
+
+ if (inst.size() == 4)
+ movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
+ else
+ movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
}
@@ -4159,40 +5079,32 @@ void drcbe_x64::op_fstore(Assembler &a, const instruction &inst)
be_parameter basep(*this, inst.param(0), PTYPE_M);
be_parameter indp(*this, inst.param(1), PTYPE_MRI);
be_parameter srcp(*this, inst.param(2), PTYPE_MF);
+ Inst::Id const opcode = (inst.size() == 4) ? Inst::kIdMovss : Inst::kIdMovsd;
+ int const scale = (inst.size() == 4) ? 2 : 3;
// pick a target register for the general case
- Xmm srcreg = srcp.select_register(xmm0);
+ Xmm const srcreg = srcp.select_register(REG_FSCRATCH1);
// determine the pointer base
int32_t baseoffs;
- Gp basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
+ Gp const basereg = get_base_register_and_offset(a, basep.memory(), rdx, baseoffs);
// 32-bit form
if (inst.size() == 4)
- {
movss_r128_p32(a, srcreg, srcp); // movss srcreg,srcp
- if (indp.is_immediate())
- a.movss(ptr(basereg, baseoffs + 4*indp.immediate()), srcreg); // movss [basep + 4*indp],srcreg
- else
- {
- Gp indreg = indp.select_register(ecx);
- mov_reg_param(a, indreg, indp); // mov indreg,indp
- a.movss(ptr(basereg, indreg, 2, baseoffs), srcreg); // movss [basep + 4*indp],srcreg
- }
- }
+ else
+ movsd_r128_p64(a, srcreg, srcp); // movsd srcreg,srcp
- // 64-bit form
- else if (inst.size() == 8)
+ if (indp.is_immediate())
{
- movsd_r128_p64(a, srcreg, srcp); // movsd srcreg,srcp
- if (indp.is_immediate())
- a.movsd(ptr(basereg, baseoffs + 8*indp.immediate()), srcreg); // movsd [basep + 8*indp],srcreg
- else
- {
- Gp indreg = indp.select_register(ecx);
- mov_reg_param(a, indreg, indp); // mov indreg,indp
- a.movsd(ptr(basereg, indreg, 3, baseoffs), srcreg); // movsd [basep + 8*indp],srcreg
- }
+ ptrdiff_t const offset = ptrdiff_t(s32(u32(indp.immediate()))) << scale;
+ a.emit(opcode, ptr(basereg, baseoffs + offset), srcreg); // movss [basep + 4*indp],srcreg
+ }
+ else
+ {
+ const Gp indreg = rcx;
+ movsx_r64_p32(a, indreg, indp); // mov indreg,indp
+ a.emit(opcode, ptr(basereg, indreg, scale, baseoffs), srcreg); // movss [basep + 4*indp],srcreg
}
}
@@ -4216,27 +5128,26 @@ void drcbe_x64::op_fread(Assembler &a, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// set up a call to the read dword/qword handler
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacep.space()]); // mov param1,space
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param2,addrp
- if (inst.size() == 4)
- smart_call_m64(a, (x86code **)&m_accessors[spacep.space()].read_dword); // call read_dword
- else if (inst.size() == 8)
- smart_call_m64(a, (x86code **)&m_accessors[spacep.space()].read_qword); // call read_qword
+ auto const &accessors = m_memory_accessors[spacep.space()];
+ auto const &accessor = (inst.size() == 4) ? accessors.resolved.read_dword : accessors.resolved.read_qword;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessor.obj);
+ smart_call_r64(a, accessor.func, rax);
// store result
if (inst.size() == 4)
{
if (dstp.is_memory())
- a.mov(MABS(dstp.memory()), eax); // mov [dstp],eax
+ a.mov(MABS(dstp.memory()), eax);
else if (dstp.is_float_register())
- a.movd(Xmm(dstp.freg()), eax); // movd dstp,eax
+ a.movd(Xmm(dstp.freg()), eax);
}
else if (inst.size() == 8)
{
if (dstp.is_memory())
- a.mov(MABS(dstp.memory()), rax); // mov [dstp],rax
+ a.mov(MABS(dstp.memory()), rax);
else if (dstp.is_float_register())
- a.movq(Xmm(dstp.freg()), rax); // movq dstp,rax
+ a.movq(Xmm(dstp.freg()), rax);
}
}
@@ -4260,28 +5171,28 @@ void drcbe_x64::op_fwrite(Assembler &a, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// general case
- mov_r64_imm(a, Gpq(REG_PARAM1), (uintptr_t)m_space[spacep.space()]); // mov param1,space
- mov_reg_param(a, Gpd(REG_PARAM2), addrp); // mov param21,addrp
+ auto const &accessors = m_memory_accessors[spacep.space()];
+ auto const &accessor = (inst.size() == 4) ? accessors.resolved.write_dword : accessors.resolved.write_qword;
+ mov_reg_param(a, Gpd(REG_PARAM2), addrp);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_memory())
- a.mov(Gpd(REG_PARAM3), MABS(srcp.memory())); // mov param3,[srcp]
+ a.mov(Gpd(REG_PARAM3), MABS(srcp.memory()));
else if (srcp.is_float_register())
- a.movd(Gpd(REG_PARAM3), Xmm(srcp.freg())); // movd param3,srcp
- smart_call_m64(a, (x86code **)&m_accessors[spacep.space()].write_dword); // call write_dword
+ a.movd(Gpd(REG_PARAM3), Xmm(srcp.freg()));
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_memory())
- a.mov(Gpq(REG_PARAM3), MABS(srcp.memory())); // mov param3,[srcp]
+ a.mov(Gpq(REG_PARAM3), MABS(srcp.memory()));
else if (srcp.is_float_register())
- a.movq(Gpq(REG_PARAM3), Xmm(srcp.freg())); // movq param3,srcp
- smart_call_m64(a, (x86code **)&m_accessors[spacep.space()].write_qword); // call write_qword
+ a.movq(Gpq(REG_PARAM3), Xmm(srcp.freg()));
}
+ mov_r64_imm(a, Gpq(REG_PARAM1), accessor.obj);
+ smart_call_r64(a, accessor.func, rax);
}
@@ -4301,16 +5212,19 @@ void drcbe_x64::op_fmov(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
// always start with a jmp
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_float_register())
{
movss_p32_r128(a, dstp, Xmm(srcp.freg())); // movss dstp,srcp
@@ -4321,10 +5235,9 @@ void drcbe_x64::op_fmov(Assembler &a, const instruction &inst)
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_float_register())
{
movsd_p64_r128(a, dstp, Xmm(srcp.freg())); // movsd dstp,srcp
@@ -4371,9 +5284,9 @@ void drcbe_x64::op_ftoint(Assembler &a, const instruction &inst)
a.ldmxcsr(MABS(&m_near.ssecontrol[roundp.rounding()])); // ldmxcsr fpcontrol[mode]
}
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
@@ -4389,10 +5302,9 @@ void drcbe_x64::op_ftoint(Assembler &a, const instruction &inst)
a.cvttss2si(dstreg, Xmm(srcp.freg())); // cvttss2si dstreg,srcp
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_memory())
{
if (roundp.rounding() != ROUND_TRUNC)
@@ -4435,14 +5347,14 @@ void drcbe_x64::op_ffrint(Assembler &a, const instruction &inst)
assert(sizep.is_size());
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
- // 32-bit integer source
+ // 32-bit form
if (sizep.size() == SIZE_DWORD)
{
+ // 32-bit integer source
if (srcp.is_memory())
a.cvtsi2ss(dstreg, MABS(srcp.memory(), 4)); // cvtsi2ss dstreg,[srcp]
else
@@ -4452,10 +5364,9 @@ void drcbe_x64::op_ffrint(Assembler &a, const instruction &inst)
a.cvtsi2ss(dstreg, srcreg); // cvtsi2ss dstreg,srcreg
}
}
-
- // 64-bit integer source
else
{
+ // 64-bit integer source
if (srcp.is_memory())
a.cvtsi2ss(dstreg, MABS(srcp.memory(), 8)); // cvtsi2ss dstreg,[srcp]
else
@@ -4467,13 +5378,12 @@ void drcbe_x64::op_ffrint(Assembler &a, const instruction &inst)
}
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- // 32-bit integer source
+ // 64-bit form
if (sizep.size() == SIZE_DWORD)
{
+ // 32-bit integer source
if (srcp.is_memory())
a.cvtsi2sd(dstreg, MABS(srcp.memory(), 4)); // cvtsi2sd dstreg,[srcp]
else
@@ -4483,10 +5393,9 @@ void drcbe_x64::op_ffrint(Assembler &a, const instruction &inst)
a.cvtsi2sd(dstreg, srcreg); // cvtsi2sd dstreg,srcreg
}
}
-
- // 64-bit integer source
else
{
+ // 64-bit integer source
if (srcp.is_memory())
a.cvtsi2sd(dstreg, MABS(srcp.memory(), 8)); // cvtsi2sd dstreg,[srcp]
else
@@ -4519,21 +5428,20 @@ void drcbe_x64::op_ffrflt(Assembler &a, const instruction &inst)
assert(sizep.is_size());
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // single-to-double
if (inst.size() == 8 && sizep.size() == SIZE_DWORD)
{
+ // single-to-double
if (srcp.is_memory())
a.cvtss2sd(dstreg, MABS(srcp.memory())); // cvtss2sd dstreg,[srcp]
else if (srcp.is_float_register())
a.cvtss2sd(dstreg, Xmm(srcp.freg())); // cvtss2sd dstreg,srcp
movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
}
-
- // double-to-single
else if (inst.size() == 4 && sizep.size() == SIZE_QWORD)
{
+ // double-to-single
if (srcp.is_memory())
a.cvtsd2ss(dstreg, MABS(srcp.memory())); // cvtsd2ss dstreg,[srcp]
else if (srcp.is_float_register())
@@ -4559,7 +5467,7 @@ void drcbe_x64::op_frnds(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
// 64-bit form
if (srcp.is_memory())
@@ -4586,14 +5494,13 @@ void drcbe_x64::op_fadd(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MF);
be_parameter src1p(*this, inst.param(1), PTYPE_MF);
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
- normalize_commutative(src1p, src2p);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, src2p);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, src2p);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
a.addss(dstreg, MABS(src2p.memory())); // addss dstreg,[src2p]
@@ -4601,10 +5508,9 @@ void drcbe_x64::op_fadd(Assembler &a, const instruction &inst)
a.addss(dstreg, Xmm(src2p.freg())); // addss dstreg,src2p
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
a.addsd(dstreg, MABS(src2p.memory())); // addsd dstreg,[src2p]
@@ -4632,11 +5538,11 @@ void drcbe_x64::op_fsub(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, src2p);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, src2p);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
a.subss(dstreg, MABS(src2p.memory())); // subss dstreg,[src2p]
@@ -4644,10 +5550,9 @@ void drcbe_x64::op_fsub(Assembler &a, const instruction &inst)
a.subss(dstreg, Xmm(src2p.freg())); // subss dstreg,src2p
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
a.subsd(dstreg, MABS(src2p.memory())); // subsd dstreg,[src2p]
@@ -4674,21 +5579,20 @@ void drcbe_x64::op_fcmp(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm src1reg = src1p.select_register(xmm0);
+ Xmm const src1reg = src1p.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, src1reg, src1p); // movss src1reg,src1p
if (src2p.is_memory())
a.comiss(src1reg, MABS(src2p.memory())); // comiss src1reg,[src2p]
else if (src2p.is_float_register())
a.comiss(src1reg, Xmm(src2p.freg())); // comiss src1reg,src2p
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, src1reg, src1p); // movsd src1reg,src1p
if (src2p.is_memory())
a.comisd(src1reg, MABS(src2p.memory())); // comisd src1reg,[src2p]
@@ -4713,14 +5617,13 @@ void drcbe_x64::op_fmul(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MF);
be_parameter src1p(*this, inst.param(1), PTYPE_MF);
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
- normalize_commutative(src1p, src2p);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, src2p);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, src2p);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
a.mulss(dstreg, MABS(src2p.memory())); // mulss dstreg,[src2p]
@@ -4728,10 +5631,9 @@ void drcbe_x64::op_fmul(Assembler &a, const instruction &inst)
a.mulss(dstreg, Xmm(src2p.freg())); // mulss dstreg,src2p
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
a.mulsd(dstreg, MABS(src2p.memory())); // mulsd dstreg,[src2p]
@@ -4759,11 +5661,11 @@ void drcbe_x64::op_fdiv(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(2), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, src2p);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, src2p);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, dstreg, src1p); // movss dstreg,src1p
if (src2p.is_memory())
a.divss(dstreg, MABS(src2p.memory())); // divss dstreg,[src2p]
@@ -4771,10 +5673,9 @@ void drcbe_x64::op_fdiv(Assembler &a, const instruction &inst)
a.divss(dstreg, Xmm(src2p.freg())); // divss dstreg,src2p
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, dstreg, src1p); // movsd dstreg,src1p
if (src2p.is_memory())
a.divsd(dstreg, MABS(src2p.memory())); // divsd dstreg,[src2p]
@@ -4800,29 +5701,44 @@ void drcbe_x64::op_fneg(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MF);
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
- // pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, srcp);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, srcp);
+ Xmm const tempreg = REG_FSCRATCH2;
+
+ // note: using memory addrs with xorpd is dangerous because MAME does not guarantee
+ // the memory address will be 16 byte aligned so there's a good chance it'll crash
+ if (srcp.is_memory())
+ {
+ if (inst.size() == 4)
+ {
+ a.mov(eax, MABS(srcp.memory()));
+ a.movd(tempreg, eax);
+ }
+ else if (inst.size() == 8)
+ {
+ a.mov(rax, MABS(srcp.memory()));
+ a.movq(tempreg, rax);
+ }
+ }
- // 32-bit form
if (inst.size() == 4)
{
- a.xorps(dstreg, dstreg); // xorps dstreg,dstreg
+ a.mov(eax, 0x80000000);
+ a.movd(dstreg, eax);
if (srcp.is_memory())
- a.subss(dstreg, MABS(srcp.memory())); // subss dstreg,[srcp]
+ a.xorpd(dstreg, tempreg);
else if (srcp.is_float_register())
- a.subss(dstreg, Xmm(srcp.freg())); // subss dstreg,srcp
- movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
+ a.xorpd(dstreg, Xmm(srcp.freg()));
+ movss_p32_r128(a, dstp, dstreg);
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- a.xorpd(dstreg, dstreg); // xorpd dstreg,dstreg
+ a.mov(rax, 0x8000000000000000);
+ a.movq(dstreg, rax);
if (srcp.is_memory())
- a.subsd(dstreg, MABS(srcp.memory())); // subsd dstreg,[srcp]
+ a.xorpd(dstreg, tempreg);
else if (srcp.is_float_register())
- a.subsd(dstreg, Xmm(srcp.freg())); // subsd dstreg,srcp
- movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
+ a.xorpd(dstreg, Xmm(srcp.freg()));
+ movsd_p64_r128(a, dstp, dstreg);
}
}
@@ -4843,19 +5759,18 @@ void drcbe_x64::op_fabs(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0, srcp);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1, srcp);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
movss_r128_p32(a, dstreg, srcp); // movss dstreg,srcp
a.andps(dstreg, MABS(m_absmask32)); // andps dstreg,[absmask32]
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
movsd_r128_p64(a, dstreg, srcp); // movsd dstreg,srcp
a.andpd(dstreg, MABS(m_absmask64)); // andpd dstreg,[absmask64]
movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
@@ -4879,21 +5794,20 @@ void drcbe_x64::op_fsqrt(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_memory())
a.sqrtss(dstreg, MABS(srcp.memory())); // sqrtss dstreg,[srcp]
else if (srcp.is_float_register())
a.sqrtss(dstreg, Xmm(srcp.freg())); // sqrtss dstreg,srcp
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_memory())
a.sqrtsd(dstreg, MABS(srcp.memory())); // sqrtsd dstreg,[srcp]
else if (srcp.is_float_register())
@@ -4919,11 +5833,11 @@ void drcbe_x64::op_frecip(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (USE_RCPSS_FOR_SINGLES)
{
if (srcp.is_memory())
@@ -4934,18 +5848,17 @@ void drcbe_x64::op_frecip(Assembler &a, const instruction &inst)
}
else
{
- a.movss(xmm1, MABS(&m_near.single1)); // movss xmm1,1.0
+ a.movss(REG_FSCRATCH2, MABS(&m_near.single1)); // movss xmm1,1.0
if (srcp.is_memory())
- a.divss(xmm1, MABS(srcp.memory())); // divss xmm1,[srcp]
+ a.divss(REG_FSCRATCH2, MABS(srcp.memory())); // divss xmm1,[srcp]
else if (srcp.is_float_register())
- a.divss(xmm1, Xmm(srcp.freg())); // divss xmm1,srcp
- movss_p32_r128(a, dstp, xmm1); // movss dstp,xmm1
+ a.divss(REG_FSCRATCH2, Xmm(srcp.freg())); // divss xmm1,srcp
+ movss_p32_r128(a, dstp, REG_FSCRATCH2); // movss dstp,xmm1
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (USE_RCPSS_FOR_DOUBLES)
{
if (srcp.is_memory())
@@ -4958,12 +5871,12 @@ void drcbe_x64::op_frecip(Assembler &a, const instruction &inst)
}
else
{
- a.movsd(xmm1, MABS(&m_near.double1)); // movsd xmm1,1.0
+ a.movsd(REG_FSCRATCH2, MABS(&m_near.double1)); // movsd xmm1,1.0
if (srcp.is_memory())
- a.divsd(xmm1, MABS(srcp.memory())); // divsd xmm1,[srcp]
+ a.divsd(REG_FSCRATCH2, MABS(srcp.memory())); // divsd xmm1,[srcp]
else if (srcp.is_float_register())
- a.divsd(xmm1, Xmm(srcp.freg())); // divsd xmm1,srcp
- movsd_p64_r128(a, dstp, xmm1); // movsd dstp,xmm1
+ a.divsd(REG_FSCRATCH2, Xmm(srcp.freg())); // divsd xmm1,srcp
+ movsd_p64_r128(a, dstp, REG_FSCRATCH2); // movsd dstp,xmm1
}
}
}
@@ -4985,11 +5898,11 @@ void drcbe_x64::op_frsqrt(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (USE_RSQRTSS_FOR_SINGLES)
{
if (srcp.is_memory())
@@ -5000,18 +5913,17 @@ void drcbe_x64::op_frsqrt(Assembler &a, const instruction &inst)
else
{
if (srcp.is_memory())
- a.sqrtss(xmm1, MABS(srcp.memory())); // sqrtss xmm1,[srcp]
+ a.sqrtss(REG_FSCRATCH2, MABS(srcp.memory())); // sqrtss xmm1,[srcp]
else if (srcp.is_float_register())
- a.sqrtss(xmm1, Xmm(srcp.freg())); // sqrtss xmm1,srcp
+ a.sqrtss(REG_FSCRATCH2, Xmm(srcp.freg())); // sqrtss xmm1,srcp
a.movss(dstreg, MABS(&m_near.single1)); // movss dstreg,1.0
- a.divss(dstreg, xmm1); // divss dstreg,xmm1
+ a.divss(dstreg, REG_FSCRATCH2); // divss dstreg,xmm1
}
movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (USE_RSQRTSS_FOR_DOUBLES)
{
if (srcp.is_memory())
@@ -5024,11 +5936,11 @@ void drcbe_x64::op_frsqrt(Assembler &a, const instruction &inst)
else
{
if (srcp.is_memory())
- a.sqrtsd(xmm1, MABS(srcp.memory())); // sqrtsd xmm1,[srcp]
+ a.sqrtsd(REG_FSCRATCH2, MABS(srcp.memory())); // sqrtsd xmm1,[srcp]
else if (srcp.is_float_register())
- a.sqrtsd(xmm1, Xmm(srcp.freg())); // sqrtsd xmm1,srcp
+ a.sqrtsd(REG_FSCRATCH2, Xmm(srcp.freg())); // sqrtsd xmm1,srcp
a.movsd(dstreg, MABS(&m_near.double1)); // movsd dstreg,1.0
- a.divsd(dstreg, xmm1); // divsd dstreg,xmm1
+ a.divsd(dstreg, REG_FSCRATCH2); // divsd dstreg,xmm1
}
movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
}
@@ -5051,52 +5963,44 @@ void drcbe_x64::op_fcopyi(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MR);
// pick a target register for the general case
- Xmm dstreg = dstp.select_register(xmm0);
+ Xmm const dstreg = dstp.select_register(REG_FSCRATCH1);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_memory())
{
- a.movd(dstreg, MABS(srcp.memory())); // movd dstreg,[srcp]
- movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
+ a.movd(dstreg, MABS(srcp.memory()));
+ movss_p32_r128(a, dstp, dstreg);
+ }
+ else if (dstp.is_memory())
+ {
+ mov_param_reg(a, dstp, Gpd(srcp.ireg()));
}
else
{
- if (dstp.is_memory())
- {
- mov_param_reg(a, dstp, Gpd(srcp.ireg())); // mov dstp,srcp
- }
- else
- {
- a.movd(dstreg, Gpd(srcp.ireg())); // movd dstreg,srcp
- movss_p32_r128(a, dstp, dstreg); // movss dstp,dstreg
- }
+ a.movd(dstreg, Gpd(srcp.ireg()));
+ movss_p32_r128(a, dstp, dstreg);
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_memory())
{
- a.movq(dstreg, MABS(srcp.memory())); // movq dstreg,[srcp]
- movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
+ a.movq(dstreg, MABS(srcp.memory()));
+ movsd_p64_r128(a, dstp, dstreg);
+ }
+ else if (dstp.is_memory())
+ {
+ mov_param_reg(a, dstp, Gpq(srcp.ireg()));
}
else
{
- if (dstp.is_memory())
- {
- mov_param_reg(a, dstp, Gpq(srcp.ireg())); // mov dstp,srcp
- }
- else
- {
- a.movq(dstreg, Gpq(srcp.ireg())); // movq dstreg,srcp
- movsd_p64_r128(a, dstp, dstreg); // movsd dstp,dstreg
- }
+ a.movq(dstreg, Gpq(srcp.ireg()));
+ movsd_p64_r128(a, dstp, dstreg);
}
-
}
}
@@ -5116,49 +6020,57 @@ void drcbe_x64::op_icopyf(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
if (srcp.is_memory())
{
- Gp dstreg = dstp.select_register(eax);
- a.mov(dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ Gp const dstreg = dstp.select_register(eax);
+ a.mov(dstreg, MABS(srcp.memory()));
+ mov_param_reg(a, dstp, dstreg);
+ }
+ else if (dstp.is_memory())
+ {
+ a.movd(MABS(dstp.memory()), Xmm(srcp.freg()));
}
else
{
- if (dstp.is_memory())
- {
- a.movd(MABS(dstp.memory()), Xmm(srcp.freg())); // movd dstp,srcp
- }
- else
- {
- a.movd(Gpd(dstp.ireg()), Xmm(srcp.freg())); // movd dstp,srcp
- }
+ a.movd(Gpd(dstp.ireg()), Xmm(srcp.freg()));
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
+ // 64-bit form
if (srcp.is_memory())
{
- Gp dstreg = dstp.select_register(rax);
- a.mov(dstreg, MABS(srcp.memory())); // mov dstreg,[srcp]
- mov_param_reg(a, dstp, dstreg); // mov dstp,dstreg
+ Gp const dstreg = dstp.select_register(rax);
+ a.mov(dstreg, MABS(srcp.memory()));
+ mov_param_reg(a, dstp, dstreg);
+ }
+ else if (dstp.is_memory())
+ {
+ a.movq(MABS(dstp.memory()), Xmm(srcp.freg()));
}
else
{
- if (dstp.is_memory())
- {
- a.movq(MABS(dstp.memory()), Xmm(srcp.freg())); // movq dstp,srcp
- }
- else
- {
- a.movq(Gpq(dstp.ireg()), Xmm(srcp.freg())); // movq dstp,srcp
- }
+ a.movq(Gpq(dstp.ireg()), Xmm(srcp.freg()));
}
}
}
+} // anonymous namespace
+
+
+std::unique_ptr<drcbe_interface> make_drcbe_x64(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits)
+{
+ return std::unique_ptr<drcbe_interface>(new drcbe_x64(drcuml, device, cache, flags, modes, addrbits, ignorebits));
+}
+
} // namespace drc
diff --git a/src/devices/cpu/drcbex64.h b/src/devices/cpu/drcbex64.h
index 51e0c94fed3..116b4939730 100644
--- a/src/devices/cpu/drcbex64.h
+++ b/src/devices/cpu/drcbex64.h
@@ -13,293 +13,21 @@
#pragma once
#include "drcuml.h"
-#include "drcbeut.h"
-#include "x86log.h"
-#include "asmjit/src/asmjit/asmjit.h"
-
-#include <vector>
+#include <memory>
namespace drc {
-//**************************************************************************
-// TYPE DEFINITIONS
-//**************************************************************************
-
-class drcbe_x64 : public drcbe_interface
-{
- typedef uint32_t (*x86_entry_point_func)(uint8_t *rbpvalue, x86code *entry);
-
-public:
- // construction/destruction
- drcbe_x64(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
- virtual ~drcbe_x64();
-
- // required overrides
- virtual void reset() override;
- virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
- virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
- virtual void get_info(drcbe_info &info) override;
- virtual bool logging() const override { return m_log != nullptr; }
-
-private:
- // a be_parameter is similar to a uml::parameter but maps to native registers/memory
- class be_parameter
- {
- public:
- // HACK: leftover from x86emit
- static int const REG_MAX = 16;
-
- // parameter types
- enum be_parameter_type
- {
- PTYPE_NONE = 0, // invalid
- PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
- PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
- PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
- PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
- PTYPE_MEMORY, // memory; value = pointer to memory
- PTYPE_MAX
- };
-
- // represents the value of a parameter
- typedef uint64_t be_parameter_value;
-
- // construction
- be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
- be_parameter(be_parameter const &param) : m_type(param.m_type), m_value(param.m_value) { }
- be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
- be_parameter(drcbe_x64 &drcbe, const uml::parameter &param, uint32_t allowed);
-
- // creators for types that don't safely default
- static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
- static inline be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
- static inline be_parameter make_memory(void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(base)); }
- static inline be_parameter make_memory(const void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(const_cast<void *>(base))); }
-
- // operators
- bool operator==(be_parameter const &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
- bool operator!=(be_parameter const &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
-
- // getters
- be_parameter_type type() const { return m_type; }
- uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
- uint32_t ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < REG_MAX); return m_value; }
- uint32_t freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < REG_MAX); return m_value; }
- void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
-
- // type queries
- bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
- bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
- bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
- bool is_memory() const { return (m_type == PTYPE_MEMORY); }
-
- // other queries
- bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
-
- // helpers
- asmjit::x86::Gp select_register(asmjit::x86::Gp defreg) const;
- asmjit::x86::Xmm select_register(asmjit::x86::Xmm defreg) const;
- asmjit::x86::Gp select_register(asmjit::x86::Gp defreg, be_parameter const &checkparam) const;
- asmjit::x86::Gp select_register(asmjit::x86::Gp defreg, be_parameter const &checkparam, be_parameter const &checkparam2) const;
- asmjit::x86::Xmm select_register(asmjit::x86::Xmm defreg, be_parameter const &checkparam) const;
-
- private:
- // private constructor
- be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
-
- // internals
- be_parameter_type m_type; // parameter type
- be_parameter_value m_value; // parameter value
- };
-
- // helpers
- asmjit::x86::Mem MABS(const void *ptr, const uint32_t size = 0) const { return asmjit::x86::Mem(asmjit::x86::rbp, offset_from_rbp(ptr), size); }
- bool short_immediate(int64_t immediate) const { return (int32_t)immediate == immediate; }
- void normalize_commutative(be_parameter &inner, be_parameter &outer);
- int32_t offset_from_rbp(const void *ptr) const;
- asmjit::x86::Gp get_base_register_and_offset(asmjit::x86::Assembler &a, void *target, asmjit::x86::Gp const &reg, int32_t &offset);
- void smart_call_r64(asmjit::x86::Assembler &a, x86code *target, asmjit::x86::Gp const &reg);
- void smart_call_m64(asmjit::x86::Assembler &a, x86code **target);
-
- static void debug_log_hashjmp(offs_t pc, int mode);
- static void debug_log_hashjmp_fail();
-
- // code generators
- void op_handle(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_hash(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_label(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_comment(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mapvar(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_nop(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_debug(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_exit(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_hashjmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_jmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_exh(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_callh(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ret(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_callc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_recover(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_setfmod(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getfmod(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getexp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getflgs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_save(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_restore(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_load(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_loads(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_store(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_read(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_readm(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_write(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_writem(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_carry(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_set(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mov(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_sext(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_roland(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_rolins(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_add(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_addc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_sub(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_subc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_cmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mulu(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_muls(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_divu(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_divs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_and(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_test(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_or(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_xor(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_lzcnt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_tzcnt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_bswap(asmjit::x86::Assembler &a, const uml::instruction &inst);
- template <asmjit::x86::Inst::Id Opcode> void op_shift(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_fload(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fstore(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fread(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fwrite(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fmov(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ftoint(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ffrint(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ffrflt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frnds(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fadd(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fsub(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fcmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fmul(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fdiv(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fneg(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fabs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fsqrt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frecip(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frsqrt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fcopyi(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_icopyf(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- // alu and shift operation helpers
- static bool ones(u64 const value, unsigned const size) noexcept { return (size == 4) ? u32(value) == 0xffffffffU : value == 0xffffffff'ffffffffULL; }
- void alu_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param, std::function<bool(asmjit::x86::Assembler &a, asmjit::Operand const &dst, be_parameter const &src)> optimize = [](asmjit::x86::Assembler &a, asmjit::Operand dst, be_parameter const &src) { return false; });
- void shift_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param);
-
- // parameter helpers
- void mov_reg_param(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reg, be_parameter const &param, bool const keepflags = false);
- void mov_param_reg(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Gp const &reg);
- void mov_mem_param(asmjit::x86::Assembler &a, asmjit::x86::Mem const &memref, be_parameter const &param);
-
- // special-case move helpers
- void movsx_r64_p32(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reg, be_parameter const &param);
- void mov_r64_imm(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reg, uint64_t const imm);
-
- // floating-point helpers
- void movss_r128_p32(asmjit::x86::Assembler &a, asmjit::x86::Xmm const &reg, be_parameter const &param);
- void movss_p32_r128(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Xmm const &reg);
- void movsd_r128_p64(asmjit::x86::Assembler &a, asmjit::x86::Xmm const &reg, be_parameter const &param);
- void movsd_p64_r128(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Xmm const &reg);
-
- size_t emit(asmjit::CodeHolder &ch);
-
- // internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- x86log_context * m_log; // logging
- FILE * m_log_asmjit;
-
- uint32_t * m_absmask32; // absolute value mask (32-bit)
- uint64_t * m_absmask64; // absolute value mask (32-bit)
- uint8_t * m_rbpvalue; // value of RBP
-
- x86_entry_point_func m_entry; // entry point
- x86code * m_exit; // exit point
- x86code * m_nocode; // nocode handler
-
- // state to live in the near cache
- struct near_state
- {
- x86code * debug_cpu_instruction_hook;// debugger callback
- x86code * debug_log_hashjmp; // hashjmp debugging
- x86code * debug_log_hashjmp_fail; // hashjmp debugging
- x86code * drcmap_get_value; // map lookup helper
-
- uint32_t ssemode; // saved SSE mode
- uint32_t ssemodesave; // temporary location for saving
- uint32_t ssecontrol[4]; // copy of the sse_control array
- float single1; // 1.0 is single-precision
- double double1; // 1.0 in double-precision
-
- void * stacksave; // saved stack pointer
- void * hashstacksave; // saved stack pointer for hashjmp
-
- uint8_t flagsmap[0x1000]; // flags map
- uint64_t flagsunmap[0x20]; // flags unmapper
- };
- near_state & m_near;
-
- // resolved memory handler functions
- struct resolved_handler { uintptr_t obj = 0; x86code *func = nullptr; };
- struct resolved_accessors
- {
-
- resolved_handler read_byte;
- resolved_handler read_word;
- resolved_handler read_word_masked;
- resolved_handler read_dword;
- resolved_handler read_dword_masked;
- resolved_handler read_qword;
- resolved_handler read_qword_masked;
-
- resolved_handler write_byte;
- resolved_handler write_word;
- resolved_handler write_word_masked;
- resolved_handler write_dword;
- resolved_handler write_dword_masked;
- resolved_handler write_qword;
- resolved_handler write_qword_masked;
- };
- using resolved_accessors_vector = std::vector<resolved_accessors>;
- resolved_accessors_vector m_resolved_accessors;
-
- // globals
- using opcode_generate_func = void (drcbe_x64::*)(asmjit::x86::Assembler &, const uml::instruction &);
- struct opcode_table_entry
- {
- uml::opcode_t opcode; // opcode in question
- opcode_generate_func func; // function pointer to the work
- };
- static const opcode_table_entry s_opcode_table_source[];
- static opcode_generate_func s_opcode_table[uml::OP_MAX];
-};
+std::unique_ptr<drcbe_interface> make_drcbe_x64(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits);
} // namespace drc
-using drc::drcbe_x64;
-
#endif // MAME_CPU_DRCBEX64_H
diff --git a/src/devices/cpu/drcbex86.cpp b/src/devices/cpu/drcbex86.cpp
index 3f5e4346dea..e06f92350b2 100644
--- a/src/devices/cpu/drcbex86.cpp
+++ b/src/devices/cpu/drcbex86.cpp
@@ -85,22 +85,31 @@
#include "emu.h"
#include "drcbex86.h"
+#include "drcbeut.h"
+#include "x86log.h"
+
#include "debug/debugcpu.h"
#include "emuopts.h"
-#include "drcuml.h"
+
+#include "mfpresolve.h"
+
+#include "asmjit/src/asmjit/asmjit.h"
#include <cstddef>
+#include <cstdio>
+#include <cstdlib>
namespace drc {
+namespace {
+
using namespace uml;
using namespace asmjit;
using namespace asmjit::x86;
-
//**************************************************************************
// DEBUGGING
//**************************************************************************
@@ -113,6 +122,12 @@ using namespace asmjit::x86;
// CONSTANTS
//**************************************************************************
+#ifdef _WIN32
+constexpr bool USE_THISCALL = true;
+#else
+constexpr bool USE_THISCALL = false;
+#endif
+
const uint32_t PTYPE_M = 1 << parameter::PTYPE_MEMORY;
const uint32_t PTYPE_I = 1 << parameter::PTYPE_IMMEDIATE;
const uint32_t PTYPE_R = 1 << parameter::PTYPE_INT_REGISTER;
@@ -124,42 +139,21 @@ const uint32_t PTYPE_MRI = PTYPE_M | PTYPE_R | PTYPE_I;
const uint32_t PTYPE_MF = PTYPE_M | PTYPE_F;
-
-//**************************************************************************
-// MACROS
-//**************************************************************************
-
-#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
-#define X86_NOT_CONDITION(condition) negateCond(condition_map[condition - uml::COND_Z])
-
-#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
-#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
-#define assert_no_flags(inst) assert((inst).flags() == 0)
-#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
-
-
-
-//**************************************************************************
-// GLOBAL VARIABLES
-//**************************************************************************
-
-drcbe_x86::opcode_generate_func drcbe_x86::s_opcode_table[OP_MAX];
-
// size-to-mask table
-//static const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
+//const uint64_t size_to_mask[] = { 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
// register mapping tables
-static const Gp::Id int_register_map[REG_I_COUNT] =
+const Gp::Id int_register_map[REG_I_COUNT] =
{
Gp::kIdBx, Gp::kIdSi, Gp::kIdDi, Gp::kIdBp
};
// flags mapping tables
-static uint8_t flags_map[0x1000];
-static uint32_t flags_unmap[0x20];
+uint8_t flags_map[0x1000];
+uint32_t flags_unmap[0x20];
// condition mapping table
-static const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
+const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
{
CondCode::kZ, // COND_Z = 0x80, requires Z
CondCode::kNZ, // COND_NZ, requires Z
@@ -180,7 +174,7 @@ static const CondCode condition_map[uml::COND_MAX - uml::COND_Z] =
};
// FPU control register mapping
-static const uint16_t fp_control[4] =
+const uint16_t fp_control[4] =
{
0x0e3f, // ROUND_TRUNC
0x023f, // ROUND_ROUND
@@ -191,99 +185,214 @@ static const uint16_t fp_control[4] =
//**************************************************************************
-// TABLES
+// MACROS
//**************************************************************************
-const drcbe_x86::opcode_table_entry drcbe_x86::s_opcode_table_source[] =
+#define X86_CONDITION(condition) (condition_map[condition - uml::COND_Z])
+#define X86_NOT_CONDITION(condition) negateCond(condition_map[condition - uml::COND_Z])
+
+#define assert_no_condition(inst) assert((inst).condition() == uml::COND_ALWAYS)
+#define assert_any_condition(inst) assert((inst).condition() == uml::COND_ALWAYS || ((inst).condition() >= uml::COND_Z && (inst).condition() < uml::COND_MAX))
+#define assert_no_flags(inst) assert((inst).flags() == 0)
+#define assert_flags(inst, valid) assert(((inst).flags() & ~(valid)) == 0)
+
+
+
+//**************************************************************************
+// MISCELLAENOUS FUNCTIONS
+//**************************************************************************
+
+void calculate_status_flags(Assembler &a, Operand const &dst, u8 flags)
{
- // Compile-time opcodes
- { uml::OP_HANDLE, &drcbe_x86::op_handle }, // HANDLE handle
- { uml::OP_HASH, &drcbe_x86::op_hash }, // HASH mode,pc
- { uml::OP_LABEL, &drcbe_x86::op_label }, // LABEL imm
- { uml::OP_COMMENT, &drcbe_x86::op_comment }, // COMMENT string
- { uml::OP_MAPVAR, &drcbe_x86::op_mapvar }, // MAPVAR mapvar,value
+ // calculate status flags in a way that does not modify any other status flags
+ uint32_t flagmask = 0;
- // Control Flow Operations
- { uml::OP_NOP, &drcbe_x86::op_nop }, // NOP
- { uml::OP_DEBUG, &drcbe_x86::op_debug }, // DEBUG pc
- { uml::OP_EXIT, &drcbe_x86::op_exit }, // EXIT src1[,c]
- { uml::OP_HASHJMP, &drcbe_x86::op_hashjmp }, // HASHJMP mode,pc,handle
- { uml::OP_JMP, &drcbe_x86::op_jmp }, // JMP imm[,c]
- { uml::OP_EXH, &drcbe_x86::op_exh }, // EXH handle,param[,c]
- { uml::OP_CALLH, &drcbe_x86::op_callh }, // CALLH handle[,c]
- { uml::OP_RET, &drcbe_x86::op_ret }, // RET [c]
- { uml::OP_CALLC, &drcbe_x86::op_callc }, // CALLC func,ptr[,c]
- { uml::OP_RECOVER, &drcbe_x86::op_recover }, // RECOVER dst,mapvar
+ if (flags & FLAG_C) flagmask |= 0x001;
+ if (flags & FLAG_V) flagmask |= 0x800;
+ if (flags & FLAG_Z) flagmask |= 0x040;
+ if (flags & FLAG_S) flagmask |= 0x080;
+ if (flags & FLAG_U) flagmask |= 0x004;
- // Internal Register Operations
- { uml::OP_SETFMOD, &drcbe_x86::op_setfmod }, // SETFMOD src
- { uml::OP_GETFMOD, &drcbe_x86::op_getfmod }, // GETFMOD dst
- { uml::OP_GETEXP, &drcbe_x86::op_getexp }, // GETEXP dst
- { uml::OP_GETFLGS, &drcbe_x86::op_getflgs }, // GETFLGS dst[,f]
- { uml::OP_SAVE, &drcbe_x86::op_save }, // SAVE dst
- { uml::OP_RESTORE, &drcbe_x86::op_restore }, // RESTORE dst
+ if ((flags & (FLAG_Z | FLAG_S)) == flags)
+ {
+ Gp tempreg = dst.isMem() ? eax : dst.as<Gpd>().id() == ebx.id() ? eax : ebx;
+ Gp tempreg2 = dst.isMem() ? edx : dst.as<Gpd>().id() == ecx.id() ? edx : ecx;
- // Integer Operations
- { uml::OP_LOAD, &drcbe_x86::op_load }, // LOAD dst,base,index,size
- { uml::OP_LOADS, &drcbe_x86::op_loads }, // LOADS dst,base,index,size
- { uml::OP_STORE, &drcbe_x86::op_store }, // STORE base,index,src,size
- { uml::OP_READ, &drcbe_x86::op_read }, // READ dst,src1,spacesize
- { uml::OP_READM, &drcbe_x86::op_readm }, // READM dst,src1,mask,spacesize
- { uml::OP_WRITE, &drcbe_x86::op_write }, // WRITE dst,src1,spacesize
- { uml::OP_WRITEM, &drcbe_x86::op_writem }, // WRITEM dst,src1,spacesize
- { uml::OP_CARRY, &drcbe_x86::op_carry }, // CARRY src,bitnum
- { uml::OP_SET, &drcbe_x86::op_set }, // SET dst,c
- { uml::OP_MOV, &drcbe_x86::op_mov }, // MOV dst,src[,c]
- { uml::OP_SEXT, &drcbe_x86::op_sext }, // SEXT dst,src
- { uml::OP_ROLAND, &drcbe_x86::op_roland }, // ROLAND dst,src1,src2,src3
- { uml::OP_ROLINS, &drcbe_x86::op_rolins }, // ROLINS dst,src1,src2,src3
- { uml::OP_ADD, &drcbe_x86::op_add }, // ADD dst,src1,src2[,f]
- { uml::OP_ADDC, &drcbe_x86::op_addc }, // ADDC dst,src1,src2[,f]
- { uml::OP_SUB, &drcbe_x86::op_sub }, // SUB dst,src1,src2[,f]
- { uml::OP_SUBB, &drcbe_x86::op_subc }, // SUBB dst,src1,src2[,f]
- { uml::OP_CMP, &drcbe_x86::op_cmp }, // CMP src1,src2[,f]
- { uml::OP_MULU, &drcbe_x86::op_mulu }, // MULU dst,edst,src1,src2[,f]
- { uml::OP_MULS, &drcbe_x86::op_muls }, // MULS dst,edst,src1,src2[,f]
- { uml::OP_DIVU, &drcbe_x86::op_divu }, // DIVU dst,edst,src1,src2[,f]
- { uml::OP_DIVS, &drcbe_x86::op_divs }, // DIVS dst,edst,src1,src2[,f]
- { uml::OP_AND, &drcbe_x86::op_and }, // AND dst,src1,src2[,f]
- { uml::OP_TEST, &drcbe_x86::op_test }, // TEST src1,src2[,f]
- { uml::OP_OR, &drcbe_x86::op_or }, // OR dst,src1,src2[,f]
- { uml::OP_XOR, &drcbe_x86::op_xor }, // XOR dst,src1,src2[,f]
- { uml::OP_LZCNT, &drcbe_x86::op_lzcnt }, // LZCNT dst,src[,f]
- { uml::OP_TZCNT, &drcbe_x86::op_tzcnt }, // TZCNT dst,src[,f]
- { uml::OP_BSWAP, &drcbe_x86::op_bswap }, // BSWAP dst,src
- { uml::OP_SHL, &drcbe_x86::op_shl }, // SHL dst,src,count[,f]
- { uml::OP_SHR, &drcbe_x86::op_shr }, // SHR dst,src,count[,f]
- { uml::OP_SAR, &drcbe_x86::op_sar }, // SAR dst,src,count[,f]
- { uml::OP_ROL, &drcbe_x86::op_rol }, // ROL dst,src,count[,f]
- { uml::OP_ROLC, &drcbe_x86::op_rolc }, // ROLC dst,src,count[,f]
- { uml::OP_ROR, &drcbe_x86::op_ror }, // ROR dst,src,count[,f]
- { uml::OP_RORC, &drcbe_x86::op_rorc }, // RORC dst,src,count[,f]
+ if (dst.isMem())
+ {
+ a.push(tempreg2);
+ a.mov(tempreg2, dst.as<Mem>());
+ }
- // Floating Point Operations
- { uml::OP_FLOAD, &drcbe_x86::op_fload }, // FLOAD dst,base,index
- { uml::OP_FSTORE, &drcbe_x86::op_fstore }, // FSTORE base,index,src
- { uml::OP_FREAD, &drcbe_x86::op_fread }, // FREAD dst,space,src1
- { uml::OP_FWRITE, &drcbe_x86::op_fwrite }, // FWRITE space,dst,src1
- { uml::OP_FMOV, &drcbe_x86::op_fmov }, // FMOV dst,src1[,c]
- { uml::OP_FTOINT, &drcbe_x86::op_ftoint }, // FTOINT dst,src1,size,round
- { uml::OP_FFRINT, &drcbe_x86::op_ffrint }, // FFRINT dst,src1,size
- { uml::OP_FFRFLT, &drcbe_x86::op_ffrflt }, // FFRFLT dst,src1,size
- { uml::OP_FRNDS, &drcbe_x86::op_frnds }, // FRNDS dst,src1
- { uml::OP_FADD, &drcbe_x86::op_fadd }, // FADD dst,src1,src2
- { uml::OP_FSUB, &drcbe_x86::op_fsub }, // FSUB dst,src1,src2
- { uml::OP_FCMP, &drcbe_x86::op_fcmp }, // FCMP src1,src2
- { uml::OP_FMUL, &drcbe_x86::op_fmul }, // FMUL dst,src1,src2
- { uml::OP_FDIV, &drcbe_x86::op_fdiv }, // FDIV dst,src1,src2
- { uml::OP_FNEG, &drcbe_x86::op_fneg }, // FNEG dst,src1
- { uml::OP_FABS, &drcbe_x86::op_fabs }, // FABS dst,src1
- { uml::OP_FSQRT, &drcbe_x86::op_fsqrt }, // FSQRT dst,src1
- { uml::OP_FRECIP, &drcbe_x86::op_frecip }, // FRECIP dst,src1
- { uml::OP_FRSQRT, &drcbe_x86::op_frsqrt }, // FRSQRT dst,src1
- { uml::OP_FCOPYI, &drcbe_x86::op_fcopyi }, // FCOPYI dst,src
- { uml::OP_ICOPYF, &drcbe_x86::op_icopyf }, // ICOPYF dst,src
-};
+ a.push(tempreg);
+
+ a.pushfd();
+ a.pop(tempreg);
+ a.and_(tempreg, ~flagmask);
+
+ a.add(dst.isMem() ? tempreg2.as<Gpd>() : dst.as<Gpd>(), 0);
+
+ a.pushfd();
+ a.and_(dword_ptr(esp), flagmask);
+ a.or_(dword_ptr(esp), tempreg);
+ a.popfd();
+
+ a.pop(tempreg);
+
+ if (dst.isMem())
+ a.pop(tempreg2);
+ }
+ else
+ {
+ fatalerror("drcbe_x86::calculate_status_flags: unknown flag combination requested: %02x\n", flags);
+ }
+}
+
+
+//-------------------------------------------------
+// dmulu - perform a double-wide unsigned multiply
+//-------------------------------------------------
+
+template <bool HalfmulFlags>
+int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags)
+{
+ // shortcut if we don't care about the high bits or the flags
+ if (&dstlo == &dsthi && !flags)
+ {
+ dstlo = src1 * src2;
+ return 0;
+ }
+
+ if (!src1 || !src2)
+ {
+ dsthi = dstlo = 0;
+ return FLAG_Z;
+ }
+
+ // compute high and low parts first
+ uint64_t lo = uint64_t(uint32_t(src1 >> 0)) * uint64_t(uint32_t(src2 >> 0));
+ uint64_t hi = uint64_t(uint32_t(src1 >> 32)) * uint64_t(uint32_t(src2 >> 32));
+
+ // compute middle parts
+ uint64_t prevlo = lo;
+ uint64_t temp = uint64_t(uint32_t(src1 >> 32)) * uint64_t(uint32_t(src2 >> 0));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ prevlo = lo;
+ temp = uint64_t(uint32_t(src1 >> 0)) * uint64_t(uint32_t(src2 >> 32));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ // store the results
+ dsthi = hi;
+ dstlo = lo;
+
+ if (HalfmulFlags)
+ return ((lo >> 60) & FLAG_S) | (hi ? FLAG_V : 0) | (!lo ? FLAG_Z : 0);
+ else
+ return ((hi >> 60) & FLAG_S) | (hi ? FLAG_V : 0) | ((!hi && !lo) ? FLAG_Z : 0);
+}
+
+
+//-------------------------------------------------
+// dmuls - perform a double-wide signed multiply
+//-------------------------------------------------
+
+template <bool HalfmulFlags>
+int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags)
+{
+ uint64_t lo, hi, prevlo;
+ uint64_t a, b, temp;
+
+ // shortcut if we don't care about the high bits or the flags
+ if (&dstlo == &dsthi && !flags)
+ {
+ dstlo = src1 * src2;
+ return 0;
+ }
+
+ if (!src1 || !src2)
+ {
+ dsthi = dstlo = 0;
+ return FLAG_Z;
+ }
+
+ // fetch absolute source values
+ a = src1; if (int64_t(a) < 0) a = -a;
+ b = src2; if (int64_t(b) < 0) b = -b;
+
+ // compute high and low parts first
+ lo = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 0));
+ hi = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 32));
+
+ // compute middle parts
+ prevlo = lo;
+ temp = uint64_t(uint32_t(a >> 32)) * uint64_t(uint32_t(b >> 0));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ prevlo = lo;
+ temp = uint64_t(uint32_t(a >> 0)) * uint64_t(uint32_t(b >> 32));
+ lo += temp << 32;
+ hi += (temp >> 32) + (lo < prevlo);
+
+ // adjust for signage
+ if (int64_t(src1 ^ src2) < 0)
+ {
+ hi = ~hi + (lo == 0);
+ lo = ~lo + 1;
+ }
+
+ // store the results
+ dsthi = hi;
+ dstlo = lo;
+
+ if (HalfmulFlags)
+ return ((lo >> 60) & FLAG_S) | ((hi != (int64_t(lo) >> 63)) ? FLAG_V : 0) | (!lo ? FLAG_Z : 0);
+ else
+ return ((hi >> 60) & FLAG_S) | ((hi != (int64_t(lo) >> 63)) ? FLAG_V : 0) | ((!hi && !lo) ? FLAG_Z : 0);
+}
+
+
+//-------------------------------------------------
+// ddivu - perform a double-wide unsigned divide
+//-------------------------------------------------
+
+int ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2)
+{
+ // do nothing if src2 == 0
+ if (src2 == 0)
+ return FLAG_V;
+
+ dstlo = src1 / src2;
+ if (&dstlo != &dsthi)
+ dsthi = src1 % src2;
+ return ((dstlo == 0) << 2) | ((dstlo >> 60) & FLAG_S);
+}
+
+
+//-------------------------------------------------
+// ddivs - perform a double-wide signed divide
+//-------------------------------------------------
+
+int ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2)
+{
+ // do nothing if src2 == 0
+ if (src2 == 0)
+ return FLAG_V;
+
+ dstlo = src1 / src2;
+ if (&dstlo != &dsthi)
+ dsthi = src1 % src2;
+ return ((dstlo == 0) << 2) | ((dstlo >> 60) & FLAG_S);
+}
+
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
class ThrowableErrorHandler : public ErrorHandler
{
@@ -295,6 +404,381 @@ public:
};
+class drcbe_x86 : public drcbe_interface
+{
+ using x86_entry_point_func = uint32_t (*)(x86code *entry);
+
+public:
+ // construction/destruction
+ drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
+ virtual ~drcbe_x86();
+
+ // required overrides
+ virtual void reset() override;
+ virtual int execute(uml::code_handle &entry) override;
+ virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
+ virtual bool hash_exists(uint32_t mode, uint32_t pc) const noexcept override;
+ virtual void get_info(drcbe_info &info) const noexcept override;
+ virtual bool logging() const noexcept override { return m_log != nullptr; }
+
+private:
+ // HACK: leftover from x86emit
+ static inline constexpr int REG_MAX = 16;
+
+ // a be_parameter is similar to a uml::parameter but maps to native registers/memory
+ class be_parameter
+ {
+ public:
+ // parameter types
+ enum be_parameter_type
+ {
+ PTYPE_NONE = 0, // invalid
+ PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
+ PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
+ PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
+ PTYPE_MEMORY, // memory; value = pointer to memory
+ PTYPE_MAX
+ };
+
+ // represents the value of a parameter
+ typedef uint64_t be_parameter_value;
+
+ // construction
+ be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
+ be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
+ be_parameter(drcbe_x86 &drcbe, const uml::parameter &param, uint32_t allowed);
+ be_parameter(const be_parameter &param) = default;
+
+ // creators for types that don't safely default
+ static be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
+ static be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
+ static be_parameter make_memory(void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(base)); }
+ static be_parameter make_memory(const void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(const_cast<void *>(base))); }
+
+ // operators
+ bool operator==(be_parameter const &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
+ bool operator!=(be_parameter const &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
+
+ // getters
+ be_parameter_type type() const { return m_type; }
+ uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
+ uint32_t ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ uint32_t freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < REG_MAX); return m_value; }
+ void *memory(uint32_t offset = 0) const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value + offset); }
+
+ // type queries
+ bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
+ bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
+ bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
+ bool is_memory() const { return (m_type == PTYPE_MEMORY); }
+
+ // other queries
+ bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
+
+ // helpers
+ Gpd select_register(Gpd const &defreg) const;
+ Xmm select_register(Xmm defreg) const;
+ template <typename T> T select_register(T defreg, be_parameter const &checkparam) const;
+ template <typename T> T select_register(T defreg, be_parameter const &checkparam, be_parameter const &checkparam2) const;
+
+ private:
+ // private constructor
+ be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
+
+ // internals
+ be_parameter_type m_type; // parameter type
+ be_parameter_value m_value; // parameter value
+ };
+
+ // helpers
+ Mem MABS(void const *base, u32 const size = 0) const { return Mem(uintptr_t(base), size); }
+ void normalize_commutative(be_parameter &inner, be_parameter &outer);
+ void emit_combine_z_flags(Assembler &a);
+ void emit_combine_zs_flags(Assembler &a);
+ void emit_combine_z_shl_flags(Assembler &a);
+ void reset_last_upper_lower_reg();
+ void set_last_lower_reg(Assembler &a, be_parameter const &param, Gp const &reglo);
+ void set_last_upper_reg(Assembler &a, be_parameter const &param, Gp const &reghi);
+ bool can_skip_lower_load(Assembler &a, uint32_t *memref, Gp const &reglo);
+ bool can_skip_upper_load(Assembler &a, uint32_t *memref, Gp const &reghi);
+
+ [[noreturn]] void end_of_block() const;
+ static void debug_log_hashjmp(int mode, offs_t pc);
+
+ void generate_one(Assembler &a, const uml::instruction &inst);
+
+ // code generators
+ void op_handle(Assembler &a, const uml::instruction &inst);
+ void op_hash(Assembler &a, const uml::instruction &inst);
+ void op_label(Assembler &a, const uml::instruction &inst);
+ void op_comment(Assembler &a, const uml::instruction &inst);
+ void op_mapvar(Assembler &a, const uml::instruction &inst);
+
+ void op_nop(Assembler &a, const uml::instruction &inst);
+ void op_break(Assembler &a, const uml::instruction &inst);
+ void op_debug(Assembler &a, const uml::instruction &inst);
+ void op_exit(Assembler &a, const uml::instruction &inst);
+ void op_hashjmp(Assembler &a, const uml::instruction &inst);
+ void op_jmp(Assembler &a, const uml::instruction &inst);
+ void op_exh(Assembler &a, const uml::instruction &inst);
+ void op_callh(Assembler &a, const uml::instruction &inst);
+ void op_ret(Assembler &a, const uml::instruction &inst);
+ void op_callc(Assembler &a, const uml::instruction &inst);
+ void op_recover(Assembler &a, const uml::instruction &inst);
+
+ void op_setfmod(Assembler &a, const uml::instruction &inst);
+ void op_getfmod(Assembler &a, const uml::instruction &inst);
+ void op_getexp(Assembler &a, const uml::instruction &inst);
+ void op_getflgs(Assembler &a, const uml::instruction &inst);
+ void op_setflgs(Assembler &a, const uml::instruction &inst);
+ void op_save(Assembler &a, const uml::instruction &inst);
+ void op_restore(Assembler &a, const uml::instruction &inst);
+
+ void op_load(Assembler &a, const uml::instruction &inst);
+ void op_loads(Assembler &a, const uml::instruction &inst);
+ void op_store(Assembler &a, const uml::instruction &inst);
+ void op_read(Assembler &a, const uml::instruction &inst);
+ void op_readm(Assembler &a, const uml::instruction &inst);
+ void op_write(Assembler &a, const uml::instruction &inst);
+ void op_writem(Assembler &a, const uml::instruction &inst);
+ void op_carry(Assembler &a, const uml::instruction &inst);
+ void op_set(Assembler &a, const uml::instruction &inst);
+ void op_mov(Assembler &a, const uml::instruction &inst);
+ void op_sext(Assembler &a, const uml::instruction &inst);
+ void op_roland(Assembler &a, const uml::instruction &inst);
+ void op_rolins(Assembler &a, const uml::instruction &inst);
+ void op_add(Assembler &a, const uml::instruction &inst);
+ void op_addc(Assembler &a, const uml::instruction &inst);
+ void op_sub(Assembler &a, const uml::instruction &inst);
+ void op_subc(Assembler &a, const uml::instruction &inst);
+ void op_cmp(Assembler &a, const uml::instruction &inst);
+ void op_mulu(Assembler &a, const uml::instruction &inst);
+ void op_mululw(Assembler &a, const uml::instruction &inst);
+ void op_muls(Assembler &a, const uml::instruction &inst);
+ void op_mulslw(Assembler &a, const uml::instruction &inst);
+ void op_divu(Assembler &a, const uml::instruction &inst);
+ void op_divs(Assembler &a, const uml::instruction &inst);
+ void op_and(Assembler &a, const uml::instruction &inst);
+ void op_test(Assembler &a, const uml::instruction &inst);
+ void op_or(Assembler &a, const uml::instruction &inst);
+ void op_xor(Assembler &a, const uml::instruction &inst);
+ void op_lzcnt(Assembler &a, const uml::instruction &inst);
+ void op_tzcnt(Assembler &a, const uml::instruction &inst);
+ void op_bswap(Assembler &a, const uml::instruction &inst);
+ void op_shl(Assembler &a, const uml::instruction &inst);
+ void op_shr(Assembler &a, const uml::instruction &inst);
+ void op_sar(Assembler &a, const uml::instruction &inst);
+ void op_ror(Assembler &a, const uml::instruction &inst);
+ void op_rol(Assembler &a, const uml::instruction &inst);
+ void op_rorc(Assembler &a, const uml::instruction &inst);
+ void op_rolc(Assembler &a, const uml::instruction &inst);
+
+ void op_fload(Assembler &a, const uml::instruction &inst);
+ void op_fstore(Assembler &a, const uml::instruction &inst);
+ void op_fread(Assembler &a, const uml::instruction &inst);
+ void op_fwrite(Assembler &a, const uml::instruction &inst);
+ void op_fmov(Assembler &a, const uml::instruction &inst);
+ void op_ftoint(Assembler &a, const uml::instruction &inst);
+ void op_ffrint(Assembler &a, const uml::instruction &inst);
+ void op_ffrflt(Assembler &a, const uml::instruction &inst);
+ void op_frnds(Assembler &a, const uml::instruction &inst);
+ void op_fadd(Assembler &a, const uml::instruction &inst);
+ void op_fsub(Assembler &a, const uml::instruction &inst);
+ void op_fcmp(Assembler &a, const uml::instruction &inst);
+ void op_fmul(Assembler &a, const uml::instruction &inst);
+ void op_fdiv(Assembler &a, const uml::instruction &inst);
+ void op_fneg(Assembler &a, const uml::instruction &inst);
+ void op_fabs(Assembler &a, const uml::instruction &inst);
+ void op_fsqrt(Assembler &a, const uml::instruction &inst);
+ void op_frecip(Assembler &a, const uml::instruction &inst);
+ void op_frsqrt(Assembler &a, const uml::instruction &inst);
+ void op_fcopyi(Assembler &a, const uml::instruction &inst);
+ void op_icopyf(Assembler &a, const uml::instruction &inst);
+
+ // 32-bit code emission helpers
+ void emit_mov_r32_p32(Assembler &a, Gp const &reg, be_parameter const &param);
+ void emit_mov_r32_p32_keepflags(Assembler &a, Gp const &reg, be_parameter const &param);
+ void emit_mov_m32_p32(Assembler &a, Mem memref, be_parameter const &param);
+ void emit_mov_p32_r32(Assembler &a, be_parameter const &param, Gp const &reg);
+
+ template <typename T> void alu_op_param(Assembler &a, Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param, T &&optimize);
+ void alu_op_param(Assembler &a, Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param) { alu_op_param(a, opcode, dst, param, [](Assembler &a, asmjit::Operand dst, be_parameter const &src) { return false; }); }
+ template <typename T> void shift_op_param(Assembler &a, Inst::Id const opcode, size_t opsize, asmjit::Operand const &dst, be_parameter const &param, T &&optimize, bool update_flags);
+
+ // 64-bit code emission helpers
+ void emit_mov_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param);
+ void emit_mov_r64_p64_keepflags(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param);
+ void emit_mov_m64_p64(Assembler &a, Mem const &memref, be_parameter const &param);
+ void emit_mov_p64_r64(Assembler &a, be_parameter const &param, Gp const &reglo, Gp const &reghi);
+ void emit_and_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_and_m64_p64(Assembler &a, Mem const &memref_lo, Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
+ void emit_or_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_or_m64_p64(Assembler &a, Mem const &memref_lo, Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
+ void emit_xor_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_xor_m64_p64(Assembler &a, Mem const &memref_lo, Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
+ void emit_shl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_shr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_sar_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_rol_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_ror_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_rcl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+ void emit_rcr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
+
+ void alu_op_param(Assembler &a, Inst::Id const opcode_lo, Inst::Id const opcode_hi, Gp const &lo, Gp const &hi, be_parameter const &param, bool const saveflags);
+ void alu_op_param(Assembler &a, Inst::Id const opcode_lo, Inst::Id const opcode_hi, Mem const &lo, Mem const &hi, be_parameter const &param, bool const saveflags);
+
+ // floating-point code emission helpers
+ void emit_fld_p(Assembler &a, int size, be_parameter const &param);
+ void emit_fstp_p(Assembler &a, int size, be_parameter const &param);
+
+ size_t emit(asmjit::CodeHolder &ch);
+
+ // internal state
+ drc_hash_table m_hash; // hash table state
+ drc_map_variables m_map; // code map
+ x86log_context * m_log; // logging
+ FILE * m_log_asmjit;
+ bool m_logged_common; // logged common code already?
+ bool const m_sse3; // do we have SSE3 support?
+
+ x86_entry_point_func m_entry; // entry point
+ x86code * m_exit; // exit point
+ x86code * m_nocode; // nocode handler
+ x86code * m_endofblock; // end of block handler
+ x86code * m_save; // save handler
+ x86code * m_restore; // restore handler
+
+ uint32_t * m_reglo[REG_MAX]; // pointer to low part of data for each register
+ uint32_t * m_reghi[REG_MAX]; // pointer to high part of data for each register
+ Gp m_last_lower_reg; // last register we stored a lower from
+ x86code * m_last_lower_pc; // PC after instruction where we last stored a lower register
+ uint32_t * m_last_lower_addr; // address where we last stored an lower register
+ Gp m_last_upper_reg; // last register we stored an upper from
+ x86code * m_last_upper_pc; // PC after instruction where we last stored an upper register
+ uint32_t * m_last_upper_addr; // address where we last stored an upper register
+ double m_fptemp; // temporary storage for floating point
+
+ uint16_t m_fpumode; // saved FPU mode
+ uint16_t m_fmodesave; // temporary location for saving
+
+ void * m_stacksave; // saved stack pointer
+ void * m_hashstacksave; // saved stack pointer for hashjmp
+ uint64_t m_reslo; // extended low result
+ uint64_t m_reshi; // extended high result
+
+ // resolved memory handler functions
+ resolved_member_function m_debug_cpu_instruction_hook;
+ resolved_member_function m_drcmap_get_value;
+ resolved_memory_accessors_vector m_memory_accessors;
+};
+
+
+
+//**************************************************************************
+// TABLES
+//**************************************************************************
+
+inline void drcbe_x86::generate_one(Assembler &a, const uml::instruction &inst)
+{
+ switch (inst.opcode())
+ {
+ // Compile-time opcodes
+ case uml::OP_HANDLE: op_handle(a, inst); break; // HANDLE handle
+ case uml::OP_HASH: op_hash(a, inst); break; // HASH mode,pc
+ case uml::OP_LABEL: op_label(a, inst); break; // LABEL imm
+ case uml::OP_COMMENT: op_comment(a, inst); break; // COMMENT string
+ case uml::OP_MAPVAR: op_mapvar(a, inst); break; // MAPVAR mapvar,value
+
+ // Control Flow Operations
+ case uml::OP_NOP: op_nop(a, inst); break; // NOP
+ case uml::OP_BREAK: op_break(a, inst); break; // BREAK
+ case uml::OP_DEBUG: op_debug(a, inst); break; // DEBUG pc
+ case uml::OP_EXIT: op_exit(a, inst); break; // EXIT src1[,c]
+ case uml::OP_HASHJMP: op_hashjmp(a, inst); break; // HASHJMP mode,pc,handle
+ case uml::OP_JMP: op_jmp(a, inst); break; // JMP imm[,c]
+ case uml::OP_EXH: op_exh(a, inst); break; // EXH handle,param[,c]
+ case uml::OP_CALLH: op_callh(a, inst); break; // CALLH handle[,c]
+ case uml::OP_RET: op_ret(a, inst); break; // RET [c]
+ case uml::OP_CALLC: op_callc(a, inst); break; // CALLC func,ptr[,c]
+ case uml::OP_RECOVER: op_recover(a, inst); break; // RECOVER dst,mapvar
+
+ // Internal Register Operations
+ case uml::OP_SETFMOD: op_setfmod(a, inst); break; // SETFMOD src
+ case uml::OP_GETFMOD: op_getfmod(a, inst); break; // GETFMOD dst
+ case uml::OP_GETEXP: op_getexp(a, inst); break; // GETEXP dst
+ case uml::OP_GETFLGS: op_getflgs(a, inst); break; // GETFLGS dst[,f]
+ case uml::OP_SETFLGS: op_setflgs(a, inst); break; // GETFLGS src
+ case uml::OP_SAVE: op_save(a, inst); break; // SAVE dst
+ case uml::OP_RESTORE: op_restore(a, inst); break; // RESTORE dst
+
+ // Integer Operations
+ case uml::OP_LOAD: op_load(a, inst); break; // LOAD dst,base,index,size
+ case uml::OP_LOADS: op_loads(a, inst); break; // LOADS dst,base,index,size
+ case uml::OP_STORE: op_store(a, inst); break; // STORE base,index,src,size
+ case uml::OP_READ: op_read(a, inst); break; // READ dst,src1,spacesize
+ case uml::OP_READM: op_readm(a, inst); break; // READM dst,src1,mask,spacesize
+ case uml::OP_WRITE: op_write(a, inst); break; // WRITE dst,src1,spacesize
+ case uml::OP_WRITEM: op_writem(a, inst); break; // WRITEM dst,src1,spacesize
+ case uml::OP_CARRY: op_carry(a, inst); break; // CARRY src,bitnum
+ case uml::OP_SET: op_set(a, inst); break; // SET dst,c
+ case uml::OP_MOV: op_mov(a, inst); break; // MOV dst,src[,c]
+ case uml::OP_SEXT: op_sext(a, inst); break; // SEXT dst,src
+ case uml::OP_ROLAND: op_roland(a, inst); break; // ROLAND dst,src1,src2,src3
+ case uml::OP_ROLINS: op_rolins(a, inst); break; // ROLINS dst,src1,src2,src3
+ case uml::OP_ADD: op_add(a, inst); break; // ADD dst,src1,src2[,f]
+ case uml::OP_ADDC: op_addc(a, inst); break; // ADDC dst,src1,src2[,f]
+ case uml::OP_SUB: op_sub(a, inst); break; // SUB dst,src1,src2[,f]
+ case uml::OP_SUBB: op_subc(a, inst); break; // SUBB dst,src1,src2[,f]
+ case uml::OP_CMP: op_cmp(a, inst); break; // CMP src1,src2[,f]
+ case uml::OP_MULU: op_mulu(a, inst); break; // MULU dst,edst,src1,src2[,f]
+ case uml::OP_MULULW: op_mululw(a, inst); break; // MULULW dst,src1,src2[,f]
+ case uml::OP_MULS: op_muls(a, inst); break; // MULS dst,edst,src1,src2[,f]
+ case uml::OP_MULSLW: op_mulslw(a, inst); break; // MULSLW dst,src1,src2[,f]
+ case uml::OP_DIVU: op_divu(a, inst); break; // DIVU dst,edst,src1,src2[,f]
+ case uml::OP_DIVS: op_divs(a, inst); break; // DIVS dst,edst,src1,src2[,f]
+ case uml::OP_AND: op_and(a, inst); break; // AND dst,src1,src2[,f]
+ case uml::OP_TEST: op_test(a, inst); break; // TEST src1,src2[,f]
+ case uml::OP_OR: op_or(a, inst); break; // OR dst,src1,src2[,f]
+ case uml::OP_XOR: op_xor(a, inst); break; // XOR dst,src1,src2[,f]
+ case uml::OP_LZCNT: op_lzcnt(a, inst); break; // LZCNT dst,src[,f]
+ case uml::OP_TZCNT: op_tzcnt(a, inst); break; // TZCNT dst,src[,f]
+ case uml::OP_BSWAP: op_bswap(a, inst); break; // BSWAP dst,src
+ case uml::OP_SHL: op_shl(a, inst); break; // SHL dst,src,count[,f]
+ case uml::OP_SHR: op_shr(a, inst); break; // SHR dst,src,count[,f]
+ case uml::OP_SAR: op_sar(a, inst); break; // SAR dst,src,count[,f]
+ case uml::OP_ROL: op_rol(a, inst); break; // ROL dst,src,count[,f]
+ case uml::OP_ROLC: op_rolc(a, inst); break; // ROLC dst,src,count[,f]
+ case uml::OP_ROR: op_ror(a, inst); break; // ROR dst,src,count[,f]
+ case uml::OP_RORC: op_rorc(a, inst); break; // RORC dst,src,count[,f]
+
+ // Floating Point Operations
+ case uml::OP_FLOAD: op_fload(a, inst); break; // FLOAD dst,base,index
+ case uml::OP_FSTORE: op_fstore(a, inst); break; // FSTORE base,index,src
+ case uml::OP_FREAD: op_fread(a, inst); break; // FREAD dst,space,src1
+ case uml::OP_FWRITE: op_fwrite(a, inst); break; // FWRITE space,dst,src1
+ case uml::OP_FMOV: op_fmov(a, inst); break; // FMOV dst,src1[,c]
+ case uml::OP_FTOINT: op_ftoint(a, inst); break; // FTOINT dst,src1,size,round
+ case uml::OP_FFRINT: op_ffrint(a, inst); break; // FFRINT dst,src1,size
+ case uml::OP_FFRFLT: op_ffrflt(a, inst); break; // FFRFLT dst,src1,size
+ case uml::OP_FRNDS: op_frnds(a, inst); break; // FRNDS dst,src1
+ case uml::OP_FADD: op_fadd(a, inst); break; // FADD dst,src1,src2
+ case uml::OP_FSUB: op_fsub(a, inst); break; // FSUB dst,src1,src2
+ case uml::OP_FCMP: op_fcmp(a, inst); break; // FCMP src1,src2
+ case uml::OP_FMUL: op_fmul(a, inst); break; // FMUL dst,src1,src2
+ case uml::OP_FDIV: op_fdiv(a, inst); break; // FDIV dst,src1,src2
+ case uml::OP_FNEG: op_fneg(a, inst); break; // FNEG dst,src1
+ case uml::OP_FABS: op_fabs(a, inst); break; // FABS dst,src1
+ case uml::OP_FSQRT: op_fsqrt(a, inst); break; // FSQRT dst,src1
+ case uml::OP_FRECIP: op_frecip(a, inst); break; // FRECIP dst,src1
+ case uml::OP_FRSQRT: op_frsqrt(a, inst); break; // FRSQRT dst,src1
+ case uml::OP_FCOPYI: op_fcopyi(a, inst); break; // FCOPYI dst,src
+ case uml::OP_ICOPYF: op_icopyf(a, inst); break; // ICOPYF dst,src
+
+ default: throw emu_fatalerror("drcbe_x86(%s): unhandled opcode %u\n", m_device.tag(), inst.opcode());
+ }
+};
+
+
//**************************************************************************
// INLINE FUNCTIONS
//**************************************************************************
@@ -417,12 +901,30 @@ inline void drcbe_x86::emit_combine_z_flags(Assembler &a)
{
// this assumes that the flags from the low 32-bit op are on the stack
// and the flags from the high 32-bit op are live
- a.pushfd(); // pushf
- a.mov(ecx, ptr(esp, 4)); // mov ecx,[esp+4]
- a.or_(ecx, ~0x40); // or ecx,~0x40
- a.and_(ptr(esp, 0), ecx); // and [esp],ecx
- a.popfd(); // popf
- a.lea(esp, ptr(esp, 4)); // lea esp,[esp+4]
+ a.pushfd();
+
+ a.mov(ecx, dword_ptr(esp, 4)); // zero flag
+ a.or_(ecx, ~0x40);
+ a.and_(dword_ptr(esp, 0), ecx);
+
+ a.popfd();
+ a.lea(esp, ptr(esp, 4));
+}
+
+inline void drcbe_x86::emit_combine_zs_flags(Assembler &a)
+{
+ // this assumes that the flags from the low 32-bit op are on the stack
+ // and the flags from the high 32-bit op are live
+ a.pushfd();
+
+ a.mov(ecx, dword_ptr(esp, 4)); // zero flag
+ a.or_(ecx, ~(0x40 | 0x80));
+ a.and_(dword_ptr(esp, 0), ecx);
+ a.and_(ecx, 0x80); // sign flag
+ a.or_(dword_ptr(esp, 0), ecx);
+
+ a.popfd();
+ a.lea(esp, ptr(esp, 4));
}
@@ -435,11 +937,11 @@ inline void drcbe_x86::emit_combine_z_shl_flags(Assembler &a)
{
// this assumes that the flags from the high 32-bit op are on the stack
// and the flags from the low 32-bit op are live
- a.pushfd(); // pushf
- a.pop(ecx); // pop ecx
- a.or_(ecx, ~0x40); // or ecx,~0x40
- a.and_(ptr(esp, 0), ecx); // and [esp],ecx
- a.popfd(); // popf
+ a.pushfd();
+ a.pop(ecx);
+ a.or_(ecx, ~0x40);
+ a.and_(ptr(esp, 0), ecx);
+ a.popfd();
}
@@ -510,32 +1012,33 @@ inline bool drcbe_x86::can_skip_upper_load(Assembler &a, uint32_t *memref, Gp co
// drcbe_x86 - constructor
//-------------------------------------------------
-drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits)
- : drcbe_interface(drcuml, cache, device),
- m_hash(cache, modes, addrbits, ignorebits),
- m_map(cache, 0),
- m_log(nullptr),
- m_log_asmjit(nullptr),
- m_logged_common(false),
- m_sse3(CpuInfo::host().features().x86().hasSSE3()),
- m_entry(nullptr),
- m_exit(nullptr),
- m_nocode(nullptr),
- m_save(nullptr),
- m_restore(nullptr),
- m_last_lower_reg(Gp()),
- m_last_lower_pc(nullptr),
- m_last_lower_addr(nullptr),
- m_last_upper_reg(Gp()),
- m_last_upper_pc(nullptr),
- m_last_upper_addr(nullptr),
- m_fptemp(0),
- m_fpumode(0),
- m_fmodesave(0),
- m_stacksave(nullptr),
- m_hashstacksave(nullptr),
- m_reslo(0),
- m_reshi(0)
+drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits) :
+ drcbe_interface(drcuml, cache, device)
+ , m_hash(cache, modes, addrbits, ignorebits)
+ , m_map(cache, 0)
+ , m_log(nullptr)
+ , m_log_asmjit(nullptr)
+ , m_logged_common(false)
+ , m_sse3(CpuInfo::host().features().x86().hasSSE3())
+ , m_entry(nullptr)
+ , m_exit(nullptr)
+ , m_nocode(nullptr)
+ , m_endofblock(nullptr)
+ , m_save(nullptr)
+ , m_restore(nullptr)
+ , m_last_lower_reg(Gp())
+ , m_last_lower_pc(nullptr)
+ , m_last_lower_addr(nullptr)
+ , m_last_upper_reg(Gp())
+ , m_last_upper_pc(nullptr)
+ , m_last_upper_addr(nullptr)
+ , m_fptemp(0)
+ , m_fpumode(0)
+ , m_fmodesave(0)
+ , m_stacksave(nullptr)
+ , m_hashstacksave(nullptr)
+ , m_reslo(0)
+ , m_reshi(0)
{
// compute hi pointers for each register
for (int regnum = 0; regnum < std::size(int_register_map); regnum++)
@@ -567,9 +1070,16 @@ drcbe_x86::drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, u
flags_unmap[entry] = flags;
}
- // build the opcode table (static but it doesn't hurt to regenerate it)
- for (auto & elem : s_opcode_table_source)
- s_opcode_table[elem.opcode] = elem.func;
+ // resolve the actual addresses of member functions we need to call
+ m_drcmap_get_value.set(m_map, &drc_map_variables::get_value);
+ if (!m_drcmap_get_value)
+ throw emu_fatalerror("Error resolving map variable get value function!\n");
+ m_memory_accessors.resize(m_space.size());
+ for (int space = 0; m_space.size() > space; ++space)
+ {
+ if (m_space[space])
+ m_memory_accessors[space].set(*m_space[space]);
+ }
// create the log
if (device.machine().options().drc_log_native())
@@ -668,7 +1178,7 @@ void drcbe_x86::reset()
a.bind(a.newNamedLabel("entry_point"));
FuncDetail entry_point;
- entry_point.init(FuncSignatureT<uint32_t, x86code *>(CallConvId::kHost), Environment::host());
+ entry_point.init(FuncSignature::build<uint32_t, x86code *>(CallConvId::kHost), Environment::host());
FuncFrame frame;
frame.init(entry_point);
@@ -700,13 +1210,25 @@ void drcbe_x86::reset()
a.bind(a.newNamedLabel("nocode_point"));
a.ret(); // ret
+ // generate an end-of-block handler point
+ m_endofblock = dst + a.offset();
+ a.bind(a.newNamedLabel("end_of_block_point"));
+ auto const [entrypoint, adjusted] = util::resolve_member_function(&drcbe_x86::end_of_block, *this);
+ if (USE_THISCALL)
+ a.mov(ecx, imm(adjusted));
+ else
+ a.mov(dword_ptr(esp, 0), imm(adjusted));
+ a.call(imm(entrypoint));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
+
// generate a save subroutine
m_save = dst + a.offset();
a.bind(a.newNamedLabel("save"));
a.pushfd(); // pushf
a.pop(eax); // pop eax
a.and_(eax, 0x8c5); // and eax,0x8c5
- a.mov(al, ptr(u64(flags_map), eax)); // mov al,[flags_map]
+ a.mov(al, ptr(uintptr_t(flags_map), eax)); // mov al,[flags_map]
a.mov(ptr(ecx, offsetof(drcuml_machine_state, flags)), al); // mov state->flags,al
a.mov(al, MABS(&m_state.fmod)); // mov al,[fmod]
a.mov(ptr(ecx, offsetof(drcuml_machine_state, fmod)), al); // mov state->fmod,al
@@ -766,11 +1288,11 @@ void drcbe_x86::reset()
a.movzx(eax, byte_ptr(ecx, offsetof(drcuml_machine_state, fmod))); // movzx eax,state->fmod
a.and_(eax, 3); // and eax,3
a.mov(MABS(&m_state.fmod), al); // mov [fmod],al
- a.fldcw(word_ptr(u64(&fp_control[0]), eax, 1)); // fldcw fp_control[eax*2]
+ a.fldcw(word_ptr(uintptr_t(&fp_control[0]), eax, 1)); // fldcw fp_control[eax*2]
a.mov(eax, ptr(ecx, offsetof(drcuml_machine_state, exp))); // mov eax,state->exp
a.mov(MABS(&m_state.exp), eax); // mov [exp],eax
a.movzx(eax, byte_ptr(ecx, offsetof(drcuml_machine_state, flags))); // movzx eax,state->flags
- a.push(dword_ptr(u64(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
a.popfd(); // popf
a.ret(); // ret
@@ -782,7 +1304,8 @@ void drcbe_x86::reset()
{
x86log_disasm_code_range(m_log, "entry_point", dst, m_exit);
x86log_disasm_code_range(m_log, "exit_point", m_exit, m_nocode);
- x86log_disasm_code_range(m_log, "nocode_point", m_nocode, m_save);
+ x86log_disasm_code_range(m_log, "nocode_point", m_nocode, m_endofblock);
+ x86log_disasm_code_range(m_log, "end_of_block", m_endofblock, m_save);
x86log_disasm_code_range(m_log, "save", m_save, m_restore);
x86log_disasm_code_range(m_log, "restore", m_restore, dst + bytes);
@@ -814,12 +1337,33 @@ int drcbe_x86::execute(code_handle &entry)
void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint32_t numinst)
{
+ // do this here because device.debug() isn't initialised at construction time
+ if (!m_debug_cpu_instruction_hook && (m_device.machine().debug_flags & DEBUG_FLAG_ENABLED))
+ {
+ m_debug_cpu_instruction_hook.set(*m_device.debug(), &device_debug::instruction_hook);
+ if (!m_debug_cpu_instruction_hook)
+ throw emu_fatalerror("Error resolving debugger instruction hook member function!\n");
+ }
+
// tell all of our utility objects that a block is beginning
m_hash.block_begin(block, instlist, numinst);
m_map.block_begin(block);
- // compute the base by aligning the cache top to a cache line (assumed to be 64 bytes)
- x86code *dst = (x86code *)(uint64_t(m_cache.top() + 63) & ~63);
+ // compute the base by aligning the cache top to a cache line
+ auto [err, linesize] = osd_get_cache_line_size();
+ uintptr_t linemask = 63;
+ if (err)
+ {
+ osd_printf_verbose("Error getting cache line size (%s:%d %s), assuming 64 bytes\n", err.category().name(), err.value(), err.message());
+ }
+ else
+ {
+ assert(linesize);
+ linemask = linesize - 1;
+ for (unsigned shift = 1; linemask & (linemask + 1); ++shift)
+ linemask |= linemask >> shift;
+ }
+ x86code *dst = (x86code *)(uintptr_t(m_cache.top() + linemask) & ~linemask);
CodeHolder ch;
ch.init(Environment::host(), uint64_t(dst));
@@ -843,13 +1387,12 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint3
for (int inum = 0; inum < numinst; inum++)
{
const instruction &inst = instlist[inum];
- assert(inst.opcode() < std::size(s_opcode_table));
// must remain in scope until output
std::string dasm;
// add a comment
- if (m_log != nullptr)
+ if (m_log)
{
dasm = inst.disasm(&m_drcuml);
x86log_add_comment(m_log, dst + a.offset(), "%s", dasm.c_str());
@@ -866,16 +1409,24 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint3
}
// generate code
- (this->*s_opcode_table[inst.opcode()])(a, inst);
+ generate_one(a, inst);
}
+ // catch falling off the end of a block
+ if (m_log)
+ {
+ x86log_add_comment(m_log, dst + a.offset(), "%s", "end of block");
+ a.setInlineComment("end of block");
+ }
+ a.jmp(imm(m_endofblock));
+
// emit the generated code
size_t const bytes = emit(ch);
if (!bytes)
block.abort();
// log it
- if (m_log != nullptr)
+ if (m_log)
x86log_disasm_code_range(m_log, (blockname.empty()) ? "Unknown block" : blockname.c_str(), dst, dst + bytes);
// tell all of our utility objects that the block is finished
@@ -889,7 +1440,7 @@ void drcbe_x86::generate(drcuml_block &block, const instruction *instlist, uint3
// given mode/pc exists in the hash table
//-------------------------------------------------
-bool drcbe_x86::hash_exists(uint32_t mode, uint32_t pc)
+bool drcbe_x86::hash_exists(uint32_t mode, uint32_t pc) const noexcept
{
return m_hash.code_exists(mode, pc);
}
@@ -900,7 +1451,7 @@ bool drcbe_x86::hash_exists(uint32_t mode, uint32_t pc)
// the back-end implementation
//-------------------------------------------------
-void drcbe_x86::get_info(drcbe_info &info)
+void drcbe_x86::get_info(drcbe_info &info) const noexcept
{
for (info.direct_iregs = 0; info.direct_iregs < REG_I_COUNT; info.direct_iregs++)
if (int_register_map[info.direct_iregs] == 0)
@@ -929,7 +1480,9 @@ void drcbe_x86::emit_mov_r32_p32(Assembler &a, Gp const &reg, be_parameter const
a.mov(reg, param.immediate()); // mov reg,param
}
else if (param.is_memory())
+ {
a.mov(reg, MABS(param.memory())); // mov reg,[param]
+ }
else if (param.is_int_register())
{
if (reg.id() != param.ireg())
@@ -998,11 +1551,13 @@ void drcbe_x86::emit_mov_p32_r32(Assembler &a, be_parameter const &param, Gp con
{
if (reg.id() != param.ireg())
a.mov(Gpd(param.ireg()), reg); // mov param,reg
+ a.mov(MABS(m_reghi[param.ireg()], 4), 0);
}
}
-void drcbe_x86::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, std::function<bool(Assembler &a, Operand const &dst, be_parameter const &src)> optimize)
+template <typename T>
+void drcbe_x86::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, T &&optimize)
{
if (param.is_immediate())
{
@@ -1030,21 +1585,58 @@ void drcbe_x86::alu_op_param(Assembler &a, Inst::Id const opcode, Operand const
a.emit(opcode, dst, Gpd(param.ireg())); // op dst,param
}
-
-void drcbe_x86::shift_op_param(Assembler &a, Inst::Id const opcode, Operand const &dst, be_parameter const &param, std::function<bool(Assembler &a, Operand const &dst, be_parameter const &src)> optimize)
+template <typename T>
+void drcbe_x86::shift_op_param(Assembler &a, Inst::Id const opcode, size_t opsize, Operand const &dst, be_parameter const &param, T &&optimize, bool update_flags)
{
- Operand shift = cl;
if (param.is_immediate())
{
- if (optimize(a, dst, param))
- return;
+ const uint32_t bitshift = param.immediate() & (opsize * 8 - 1);
+
+ if (!optimize(a, dst, param) && bitshift != 0)
+ a.emit(opcode, dst, imm(bitshift));
+
+ if (update_flags)
+ {
+ if ((bitshift == 0) && (opcode != Inst::kIdRcl) && (opcode != Inst::kIdRcr))
+ a.clc(); // throw away carry since it'll never be used
- shift = imm(param.immediate());
+ calculate_status_flags(a, dst, FLAG_S | FLAG_Z); // calculate status flags but preserve carry
+ }
}
else
- emit_mov_r32_p32(a, ecx, param);
+ {
+ Label calc = a.newLabel();
+ Label end = a.newLabel();
+
+ Gp shift = dst.as<Gpd>().id() == ecx.id() ? ebx : ecx;
+
+ a.pushfd(); // preserve flags for carry
+
+ emit_mov_r32_p32(a, shift, param);
+
+ a.and_(shift, opsize * 8 - 1);
+ a.test(shift, shift);
- a.emit(opcode, dst, shift);
+ a.short_().jnz(calc);
+
+ a.popfd(); // preserved flags not needed so throw it away
+
+ if (update_flags && (opcode != Inst::kIdRcl) && (opcode != Inst::kIdRcr))
+ a.clc(); // throw away carry since it'll never be used
+
+ a.short_().jmp(end);
+
+ a.bind(calc);
+
+ a.popfd(); // restore flags to keep carry for rolc/rorc
+
+ a.emit(opcode, dst, shift);
+
+ a.bind(end);
+
+ if (update_flags)
+ calculate_status_flags(a, dst, FLAG_S | FLAG_Z); // calculate status flags but preserve carry
+ }
}
@@ -1428,7 +2020,7 @@ void drcbe_x86::emit_xor_m64_p64(Assembler &a, Mem const &memref_lo, Mem const &
void drcbe_x86::emit_shl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = (inst.flags() != 0);
+ int saveflags = inst.flags() != 0;
if (param.is_immediate())
{
int count = param.immediate() & 63;
@@ -1454,16 +2046,39 @@ void drcbe_x86::emit_shl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
if (inst.flags() != 0 || count > 0)
{
a.shld(reghi, reglo, count); // shld reghi,reglo,count
- if (saveflags) a.pushfd(); // pushf
+ if (saveflags && count != 0) a.pushfd(); // pushf
a.shl(reglo, count); // shl reglo,count
}
}
+
+ if (saveflags)
+ {
+ if (count == 0)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+ else
+ {
+ emit_combine_z_shl_flags(a);
+ }
+ }
}
else
{
+ Label skipall = a.newLabel();
+ Label end = a.newLabel();
Label skip1 = a.newLabel();
Label skip2 = a.newLabel();
+
emit_mov_r32_p32(a, ecx, param); // mov ecx,param
+
+ a.and_(ecx, 63);
+ a.test(ecx, ecx);
+ a.short_().jz(skipall);
+
a.test(ecx, 0x20); // test ecx,0x20
a.short_().jz(skip1); // jz skip1
if (inst.flags() != 0)
@@ -1489,9 +2104,26 @@ void drcbe_x86::emit_shl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
a.shld(reghi, reglo, cl); // shld reghi,reglo,cl
if (saveflags) a.pushfd(); // pushf
a.shl(reglo, cl); // shl reglo,cl
+
+ if (saveflags)
+ {
+ emit_combine_z_shl_flags(a);
+
+ a.short_().jmp(end);
+ }
+
+ a.bind(skipall);
+
+ if (saveflags)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+
+ a.bind(end);
}
- if (saveflags)
- emit_combine_z_shl_flags(a);
}
@@ -1502,7 +2134,7 @@ void drcbe_x86::emit_shl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_shr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = ((inst.flags() & FLAG_Z) != 0);
+ int saveflags = inst.flags() != 0;
if (param.is_immediate())
{
int count = param.immediate() & 63;
@@ -1528,16 +2160,47 @@ void drcbe_x86::emit_shr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
if (inst.flags() != 0 || count > 0)
{
a.shrd(reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) a.pushfd(); // pushf
+ if (saveflags && count != 0) a.pushfd(); // pushf
a.shr(reghi, count); // shr reghi,count
}
}
+
+ if (saveflags)
+ {
+ if (count == 0)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+ else
+ {
+ // take carry from lower register's flags
+ a.pushfd();
+ a.mov(ecx, dword_ptr(esp, 4));
+ a.and_(ecx, 0x01); // carry flag
+ a.and_(dword_ptr(esp, 0), ~0x01);
+ a.or_(dword_ptr(esp, 0), ecx);
+ a.popfd();
+
+ emit_combine_z_flags(a);
+ }
+ }
}
else
{
+ Label skipall = a.newLabel();
+ Label end = a.newLabel();
Label skip1 = a.newLabel();
Label skip2 = a.newLabel();
+
emit_mov_r32_p32(a, ecx, param); // mov ecx,param
+
+ a.and_(ecx, 63);
+ a.test(ecx, ecx);
+ a.short_().jz(skipall);
+
a.test(ecx, 0x20); // test ecx,0x20
a.short_().jz(skip1); // jz skip1
if (inst.flags() != 0)
@@ -1563,9 +2226,34 @@ void drcbe_x86::emit_shr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
a.shrd(reglo, reghi, cl); // shrd reglo,reghi,cl
if (saveflags) a.pushfd(); // pushf
a.shr(reghi, cl); // shr reghi,cl
+
+ if (saveflags)
+ {
+ // take carry from lower register's flags
+ a.pushfd();
+ a.mov(ecx, dword_ptr(esp, 4));
+ a.and_(ecx, 0x01); // carry flag
+ a.and_(dword_ptr(esp, 0), ~0x01);
+ a.or_(dword_ptr(esp, 0), ecx);
+ a.popfd();
+
+ emit_combine_z_flags(a);
+
+ a.short_().jmp(end);
+ }
+
+ a.bind(skipall);
+
+ if (saveflags)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+
+ a.bind(end);
}
- if (saveflags)
- emit_combine_z_flags(a);
}
@@ -1576,7 +2264,7 @@ void drcbe_x86::emit_shr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_sar_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = ((inst.flags() & FLAG_Z) != 0);
+ int saveflags = inst.flags() != 0;
if (param.is_immediate())
{
int count = param.immediate() & 63;
@@ -1602,16 +2290,47 @@ void drcbe_x86::emit_sar_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
if (inst.flags() != 0 || count > 0)
{
a.shrd(reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) a.pushfd(); // pushf
+ if (saveflags && count != 0) a.pushfd(); // pushf
a.sar(reghi, count); // sar reghi,count
}
}
+
+ if (saveflags)
+ {
+ if (count == 0)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+ else
+ {
+ // take carry from lower register's flags
+ a.pushfd();
+ a.mov(ecx, dword_ptr(esp, 4));
+ a.and_(ecx, 0x01); // carry flag
+ a.and_(dword_ptr(esp, 0), ~0x01);
+ a.or_(dword_ptr(esp, 0), ecx);
+ a.popfd();
+
+ emit_combine_z_flags(a);
+ }
+ }
}
else
{
Label skip1 = a.newLabel();
Label skip2 = a.newLabel();
+ Label skipall = a.newLabel();
+ Label end = a.newLabel();
+
emit_mov_r32_p32(a, ecx, param); // mov ecx,param
+
+ a.and_(ecx, 63);
+ a.test(ecx, ecx);
+ a.short_().jz(skipall);
+
a.test(ecx, 0x20); // test ecx,0x20
a.short_().jz(skip1); // jz skip1
if (inst.flags() != 0)
@@ -1637,9 +2356,34 @@ void drcbe_x86::emit_sar_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
a.shrd(reglo, reghi, cl); // shrd reglo,reghi,cl
if (saveflags) a.pushfd(); // pushf
a.sar(reghi, cl); // sar reghi,cl
+
+ if (saveflags)
+ {
+ // take carry from lower register's flags
+ a.pushfd();
+ a.mov(ecx, dword_ptr(esp, 4));
+ a.and_(ecx, 0x01); // carry flag
+ a.and_(dword_ptr(esp, 0), ~0x01);
+ a.or_(dword_ptr(esp, 0), ecx);
+ a.popfd();
+
+ emit_combine_z_flags(a);
+
+ a.short_().jmp(end);
+ }
+
+ a.bind(skipall);
+
+ if (saveflags)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+
+ a.bind(end);
}
- if (saveflags)
- emit_combine_z_flags(a);
}
@@ -1650,7 +2394,11 @@ void drcbe_x86::emit_sar_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_rol_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = ((inst.flags() & FLAG_Z) != 0);
+ int saveflags = inst.flags() != 0;
+
+ Gp tempreg = esi; // TODO: try to avoid collision with reglo and reghi?
+ a.push(tempreg);
+
if (param.is_immediate())
{
int count = param.immediate() & 63;
@@ -1662,61 +2410,98 @@ void drcbe_x86::emit_rol_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
{
if (inst.flags() != 0)
{
- a.mov(ecx, reglo); // mov ecx,reglo
- a.shld(reglo, reghi, 31); // shld reglo,reghi,31
- a.shld(reghi, ecx, 31); // shld reghi,ecx,31
+ a.mov(ecx, reglo);
+ a.shld(reglo, reghi, 31);
+ a.shld(reghi, ecx, 31);
count -= 31;
}
else
{
- a.xchg(reghi, reglo); // xchg reghi,reglo
+ a.xchg(reghi, reglo);
count -= 32;
}
}
- if (inst.flags() != 0 || count > 0)
+
+ a.mov(ecx, reglo);
+ a.shld(reglo, reghi, count);
+ if (saveflags && count != 0) a.pushfd();
+ a.shld(reghi, ecx, count);
+ }
+
+ if (saveflags)
+ {
+ if (count == 0)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+ else
{
- a.mov(ecx, reglo); // mov ecx,reglo
- a.shld(reglo, reghi, count); // shld reglo,reghi,count
- if (saveflags) a.pushfd(); // pushf
- a.shld(reghi, ecx, count); // shld reghi,ecx,count
+ emit_combine_zs_flags(a);
}
}
}
else
{
+ Label skipall = a.newLabel();
+ Label end = a.newLabel();
Label skip1 = a.newLabel();
- Label skip2 = a.newLabel();
- a.mov(ptr(esp, -8), ebx); // mov [esp-8],ebx
- emit_mov_r32_p32(a, ecx, param); // mov ecx,param
- a.test(ecx, 0x20); // test ecx,0x20
- a.short_().jz(skip1); // jz skip1
+ Label shift_loop = a.newLabel();
+
+ emit_mov_r32_p32(a, ecx, param);
+
+ a.and_(ecx, 63);
+ a.test(ecx, ecx);
+ a.short_().jz(skipall);
+
+ a.cmp(ecx, 32);
+ a.short_().jl(skip1);
+
+ a.bind(shift_loop);
if (inst.flags() != 0)
{
- a.sub(ecx, 31); // sub ecx,31
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shld(reglo, reghi, 31); // shld reglo,reghi,31
- a.shld(reghi, ebx, 31); // shld reghi,ebx,31
- a.test(ecx, 0x20); // test ecx,0x20
- a.short_().jz(skip2); // jz skip2
- a.sub(ecx, 31); // sub ecx,31
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shld(reglo, reghi, 31); // shld reglo,reghi,31
- a.shld(reghi, ebx, 31); // shld reghi,ebx,31
- a.bind(skip2); // skip2:
- reset_last_upper_lower_reg();
+ a.sub(ecx, 31);
+ a.mov(tempreg, reglo);
+ a.shld(reglo, reghi, 31);
+ a.shld(reghi, tempreg, 31);
}
else
- a.xchg(reghi, reglo); // xchg reghi,reglo
- a.bind(skip1); // skip1:
+ {
+ a.xchg(reghi, reglo);
+ a.sub(ecx, 32);
+ }
+ a.cmp(ecx, 32);
+ a.short_().jge(shift_loop);
+
+ a.bind(skip1);
reset_last_upper_lower_reg();
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shld(reglo, reghi, cl); // shld reglo,reghi,cl
- if (saveflags) a.pushfd(); // pushf
- a.shld(reghi, ebx, cl); // shld reghi,ebx,cl
- a.mov(ebx, ptr(esp, saveflags ? -4 : -8)); // mov ebx,[esp-8]
+ a.mov(tempreg, reglo);
+ a.shld(reglo, reghi, cl);
+ if (saveflags) a.pushfd();
+ a.shld(reghi, tempreg, cl);
+
+ if (saveflags)
+ {
+ emit_combine_zs_flags(a);
+ a.short_().jmp(end);
+ }
+
+ a.bind(skipall);
+
+ if (saveflags)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+
+ a.bind(end);
}
- if (saveflags)
- emit_combine_z_flags(a);
+
+ a.pop(tempreg);
}
@@ -1727,7 +2512,11 @@ void drcbe_x86::emit_rol_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_ror_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = ((inst.flags() & FLAG_Z) != 0);
+ int saveflags = inst.flags() != 0;
+
+ Gp tempreg = esi; // TODO: try to avoid collision with reglo and reghi?
+ a.push(tempreg);
+
if (param.is_immediate())
{
int count = param.immediate() & 63;
@@ -1739,61 +2528,98 @@ void drcbe_x86::emit_ror_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
{
if (inst.flags() != 0)
{
- a.mov(ecx, reglo); // mov ecx,reglo
- a.shrd(reglo, reghi, 31); // shrd reglo,reghi,31
- a.shrd(reghi, ecx, 31); // shrd reghi,ecx,31
+ a.mov(tempreg, reglo);
+ a.shrd(reglo, reghi, 31);
+ a.shrd(reghi, tempreg, 31);
count -= 31;
}
else
{
- a.xchg(reghi, reglo); // xchg reghi,reglo
+ a.xchg(reghi, reglo);
count -= 32;
}
}
- if (inst.flags() != 0 || count > 0)
+
+ a.mov(tempreg, reghi);
+ a.shrd(reghi, reglo, count);
+ if (saveflags && count != 0) a.pushfd();
+ a.shrd(reglo, tempreg, count);
+
+ if (saveflags)
{
- a.mov(ecx, reglo); // mov ecx,reglo
- a.shrd(reglo, reghi, count); // shrd reglo,reghi,count
- if (saveflags) a.pushfd(); // pushf
- a.shrd(reghi, ecx, count); // shrd reghi,ecx,count
+ if (count == 0)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+ else
+ {
+ emit_combine_zs_flags(a);
+ }
}
}
}
else
{
+ Label skipall = a.newLabel();
+ Label end = a.newLabel();
Label skip1 = a.newLabel();
- Label skip2 = a.newLabel();
- a.mov(ptr(esp, -8), ebx); // mov [esp-8],ebx
- emit_mov_r32_p32(a, ecx, param); // mov ecx,param
- a.test(ecx, 0x20); // test ecx,0x20
- a.short_().jz(skip1); // jz skip1
+ Label shift_loop = a.newLabel();
+
+ emit_mov_r32_p32(a, ecx, param);
+
+ a.and_(ecx, 63);
+ a.test(ecx, ecx);
+ a.short_().jz(skipall);
+
+ a.cmp(ecx, 32);
+ a.short_().jl(skip1);
+
+ a.bind(shift_loop);
if (inst.flags() != 0)
{
- a.sub(ecx, 31); // sub ecx,31
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shrd(reglo, reghi, 31); // shrd reglo,reghi,31
- a.shrd(reghi, ebx, 31); // shrd reghi,ebx,31
- a.test(ecx, 0x20); // test ecx,0x20
- a.short_().jz(skip2); // jz skip2
- a.sub(ecx, 31); // sub ecx,31
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shrd(reglo, reghi, 31); // shrd reglo,reghi,31
- a.shrd(reghi, ebx, 31); // shrd reghi,ebx,31
- a.bind(skip2); // skip2:
- reset_last_upper_lower_reg();
+ a.sub(ecx, 31);
+ a.mov(tempreg, reglo);
+ a.shrd(reglo, reghi, 31);
+ a.shrd(reghi, tempreg, 31);
}
else
- a.xchg(reghi, reglo); // xchg reghi,reglo
- a.bind(skip1); // skip1:
+ {
+ a.xchg(reghi, reglo);
+ a.sub(ecx, 32);
+ }
+ a.cmp(ecx, 32);
+ a.short_().jge(shift_loop);
+
+ a.bind(skip1);
reset_last_upper_lower_reg();
- a.mov(ebx, reglo); // mov ebx,reglo
- a.shrd(reglo, reghi, cl); // shrd reglo,reghi,cl
- if (saveflags) a.pushfd(); // pushf
- a.shrd(reghi, ebx, cl); // shrd reghi,ebx,cl
- a.mov(ebx, ptr(esp, saveflags ? -4 : -8)); // mov ebx,[esp-8]
+ a.mov(tempreg, reghi);
+ a.shrd(reghi, reglo, cl);
+ if (saveflags) a.pushfd();
+ a.shrd(reglo, tempreg, cl);
+
+ if (saveflags)
+ {
+ emit_combine_zs_flags(a);
+ a.short_().jmp(end);
+ }
+
+ a.bind(skipall);
+
+ if (saveflags)
+ {
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
+ }
+
+ a.bind(end);
}
- if (saveflags)
- emit_combine_z_flags(a);
+
+ a.pop(tempreg);
}
@@ -1804,42 +2630,44 @@ void drcbe_x86::emit_ror_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_rcl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = ((inst.flags() & FLAG_Z) != 0);
Label loop = a.newLabel();
Label skipall = a.newLabel();
Label skiploop = a.newLabel();
- emit_mov_r32_p32_keepflags(a, ecx, param); // mov ecx,param
- if (!saveflags)
- {
- a.bind(loop); // loop:
- a.jecxz(skipall); // jecxz skipall
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.rcl(reglo, 1); // rcl reglo,1
- a.rcl(reghi, 1); // rcl reghi,1
- a.jmp(loop); // jmp loop
- a.bind(skipall); // skipall:
- reset_last_upper_lower_reg();
- }
- else
+ a.pushfd(); // keep carry flag after and
+ emit_mov_r32_p32(a, ecx, param);
+
+ a.and_(ecx, 63);
+ a.popfd();
+
+ a.short_().jecxz(skipall);
+ a.lea(ecx, ptr(ecx, -1));
+
+ a.bind(loop);
+ a.short_().jecxz(skiploop);
+ a.lea(ecx, ptr(ecx, -1));
+ a.rcl(reglo, 1);
+ a.rcl(reghi, 1);
+ a.short_().jmp(loop);
+
+ a.bind(skiploop);
+ reset_last_upper_lower_reg();
+ a.rcl(reglo, 1);
+ a.rcl(reghi, 1);
+
+ a.bind(skipall);
+ if (inst.flags())
{
- a.jecxz(skipall); // jecxz skipall
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.bind(loop); // loop:
- a.jecxz(skiploop); // jecxz skiploop
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.rcl(reglo, 1); // rcl reglo,1
- a.rcl(reghi, 1); // rcl reghi,1
- a.jmp(loop); // jmp loop
- a.bind(skiploop); // skiploop:
- reset_last_upper_lower_reg();
- a.rcl(reglo, 1); // rcl reglo,1
- a.pushfd(); // pushf
- a.rcl(reghi, 1); // rcl reghi,1
- a.bind(skipall); // skipall:
- reset_last_upper_lower_reg();
+ if (inst.flags() & FLAG_C)
+ calculate_status_flags(a, reglo, FLAG_Z);
+ else
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
emit_combine_z_flags(a);
}
+
+ reset_last_upper_lower_reg();
}
@@ -1850,42 +2678,44 @@ void drcbe_x86::emit_rcl_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi,
void drcbe_x86::emit_rcr_r64_p64(Assembler &a, Gp const &reglo, Gp const &reghi, be_parameter const &param, const instruction &inst)
{
- int saveflags = (inst.flags() != 0);
Label loop = a.newLabel();
Label skipall = a.newLabel();
Label skiploop = a.newLabel();
- emit_mov_r32_p32_keepflags(a, ecx, param); // mov ecx,param
- if (!saveflags)
- {
- a.bind(loop); // loop:
- a.jecxz(skipall); // jecxz skipall
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.rcr(reghi, 1); // rcr reghi,1
- a.rcr(reglo, 1); // rcr reglo,1
- a.jmp(loop); // jmp loop
- a.bind(skipall); // skipall:
- reset_last_upper_lower_reg();
- }
- else
+ a.pushfd(); // keep carry flag after and
+ emit_mov_r32_p32(a, ecx, param);
+
+ a.and_(ecx, 63);
+ a.popfd();
+
+ a.short_().jecxz(skipall);
+ a.lea(ecx, ptr(ecx, -1));
+
+ a.bind(loop);
+ a.short_().jecxz(skiploop);
+ a.lea(ecx, ptr(ecx, -1));
+ a.rcr(reghi, 1);
+ a.rcr(reglo, 1);
+ a.short_().jmp(loop);
+
+ a.bind(skiploop);
+ reset_last_upper_lower_reg();
+ a.rcr(reghi, 1);
+ a.rcr(reglo, 1);
+
+ a.bind(skipall);
+ if (inst.flags())
{
- a.jecxz(skipall); // jecxz skipall
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.bind(loop); // loop:
- a.jecxz(skiploop); // jecxz skiploop
- a.lea(ecx, ptr(ecx, -1)); // lea ecx,[ecx-1]
- a.rcr(reghi, 1); // rcr reghi,1
- a.rcr(reglo, 1); // rcr reglo,1
- a.jmp(loop); // jmp loop
- a.bind(skiploop); // skiploop:
- reset_last_upper_lower_reg();
- a.rcr(reghi, 1); // rcr reghi,1
- a.pushfd(); // pushf
- a.rcr(reglo, 1); // rcr reglo,1
- a.bind(skipall); // skipall:
- reset_last_upper_lower_reg();
- emit_combine_z_shl_flags(a);
+ if (inst.flags() & FLAG_C)
+ calculate_status_flags(a, reglo, FLAG_Z);
+ else
+ a.test(reglo, reglo);
+ a.pushfd();
+ calculate_status_flags(a, reghi, FLAG_S | FLAG_Z);
+ emit_combine_z_flags(a);
}
+
+ reset_last_upper_lower_reg();
}
@@ -1893,9 +2723,15 @@ void drcbe_x86::alu_op_param(Assembler &a, Inst::Id const opcode_lo, Inst::Id co
{
if (param.is_memory())
{
- a.emit(opcode_lo, lo, MABS(param.memory(0))); // opl reglo,[param]
+ if (opcode_lo == Inst::kIdTest) // can't use memory on right of test
+ a.emit(opcode_lo, MABS(param.memory(0)), lo); // opl [param],reglo
+ else
+ a.emit(opcode_lo, lo, MABS(param.memory(0))); // opl reglo,[param]
if (saveflags) a.pushfd(); // pushf
- a.emit(opcode_hi, hi, MABS(param.memory(4))); // oph reghi,[param]
+ if (opcode_hi == Inst::kIdTest) // can't use memory on right of test
+ a.emit(opcode_hi, MABS(param.memory(4)), hi); // oph [param],reghi
+ else
+ a.emit(opcode_hi, hi, MABS(param.memory(4))); // oph reghi,[param]
}
else if (param.is_immediate())
{
@@ -1907,7 +2743,11 @@ void drcbe_x86::alu_op_param(Assembler &a, Inst::Id const opcode_lo, Inst::Id co
{
a.emit(opcode_lo, lo, Gpd(param.ireg())); // opl reglo,param
if (saveflags) a.pushfd(); // pushf
- a.emit(opcode_hi, hi, MABS(m_reghi[param.ireg()])); // oph reghi,reghi[param]
+
+ if (opcode_hi == Inst::kIdTest) // can't use memory on right of test
+ a.emit(opcode_hi, MABS(m_reghi[param.ireg()]), hi); // oph reghi[param],reghi
+ else
+ a.emit(opcode_hi, hi, MABS(m_reghi[param.ireg()])); // oph reghi,reghi[param]
}
if (saveflags)
@@ -1951,7 +2791,7 @@ void drcbe_x86::emit_fld_p(Assembler &a, int size, be_parameter const &param)
{
assert(param.is_memory());
assert(size == 4 || size == 8);
- a.fld(ptr(u64(param.memory()), size));
+ a.fld(ptr(uintptr_t(param.memory()), size));
}
@@ -1965,7 +2805,7 @@ void drcbe_x86::emit_fstp_p(Assembler &a, int size, be_parameter const &param)
assert(param.is_memory());
assert(size == 4 || size == 8);
- a.fstp(ptr(u64(param.memory()), size));
+ a.fstp(ptr(uintptr_t(param.memory()), size));
}
@@ -1975,13 +2815,27 @@ void drcbe_x86::emit_fstp_p(Assembler &a, int size, be_parameter const &param)
//**************************************************************************
//-------------------------------------------------
+// end_of_block - function to catch falling off
+// the end of a generated code block
+//-------------------------------------------------
+
+[[noreturn]] void drcbe_x86::end_of_block() const
+{
+ osd_printf_error("drcbe_x86(%s): fell off the end of a generated code block!\n", m_device.tag());
+ std::fflush(stdout);
+ std::fflush(stderr);
+ std::abort();
+}
+
+
+//-------------------------------------------------
// debug_log_hashjmp - callback to handle
// logging of hashjmps
//-------------------------------------------------
void drcbe_x86::debug_log_hashjmp(int mode, offs_t pc)
{
- printf("mode=%d PC=%08X\n", mode, pc);
+ std::printf("mode=%d PC=%08X\n", mode, pc);
}
@@ -2108,6 +2962,16 @@ void drcbe_x86::op_nop(Assembler &a, const instruction &inst)
// nothing
}
+//-------------------------------------------------
+// op_break - process a BREAK opcode
+//-------------------------------------------------
+
+void drcbe_x86::op_break(Assembler &a, const instruction &inst)
+{
+ static const char *const message = "break from drc";
+ a.mov(dword_ptr(esp, 0), imm(message));
+ a.call(imm(&osd_break_into_debugger));
+}
//-------------------------------------------------
// op_debug - process a DEBUG opcode
@@ -2120,25 +2984,27 @@ void drcbe_x86::op_debug(Assembler &a, const instruction &inst)
assert_no_condition(inst);
assert_no_flags(inst);
- using debugger_hook_func = void (*)(device_debug *, offs_t);
- static const debugger_hook_func debugger_inst_hook = [] (device_debug *dbg, offs_t pc) { dbg->instruction_hook(pc); }; // TODO: kill trampoline if possible
-
if ((m_device.machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
{
// normalize parameters
be_parameter const pcp(*this, inst.param(0), PTYPE_MRI);
// test and branch
- a.test(MABS(&m_device.machine().debug_flags, 4), DEBUG_FLAG_CALL_HOOK); // test [debug_flags],DEBUG_FLAG_CALL_HOOK
+ a.test(MABS(&m_device.machine().debug_flags, 4), DEBUG_FLAG_CALL_HOOK);
Label skip = a.newLabel();
- a.short_().jz(skip); // jz skip
+ a.short_().jz(skip);
// push the parameter
- emit_mov_m32_p32(a, dword_ptr(esp, 4), pcp); // mov [esp+4],pcp
- a.mov(dword_ptr(esp, 0), imm(m_device.debug())); // mov [esp],device.debug
- a.call(imm(debugger_inst_hook)); // call debugger_inst_hook
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), pcp);
+ if (USE_THISCALL)
+ a.mov(ecx, imm(m_debug_cpu_instruction_hook.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(m_debug_cpu_instruction_hook.obj));
+ a.call(imm(m_debug_cpu_instruction_hook.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
- a.bind(skip); // skip:
+ a.bind(skip);
reset_last_upper_lower_reg();
}
}
@@ -2194,26 +3060,24 @@ void drcbe_x86::op_hashjmp(Assembler &a, const instruction &inst)
// load the stack base one word early so we end up at the right spot after our call below
a.mov(esp, MABS(&m_hashstacksave)); // mov esp,[hashstacksave]
- // fixed mode cases
if (modep.is_immediate() && m_hash.is_mode_populated(modep.immediate()))
{
- // a straight immediate jump is direct, though we need the PC in EAX in case of failure
+ // fixed mode cases
if (pcp.is_immediate())
{
+ // a straight immediate jump is direct, though we need the PC in EAX in case of failure
uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
a.call(MABS(&m_hash.base()[modep.immediate()][l1val][l2val])); // call hash[modep][l1val][l2val]
}
-
- // a fixed mode but variable PC
else
{
+ // a fixed mode but variable PC
emit_mov_r32_p32(a, eax, pcp); // mov eax,pcp
a.mov(edx, eax); // mov edx,eax
a.shr(edx, m_hash.l1shift()); // shr edx,l1shift
a.and_(eax, m_hash.l2mask() << m_hash.l2shift()); // and eax,l2mask << l2shift
- a.mov(edx, ptr(u64(&m_hash.base()[modep.immediate()][0]), edx, 2));
- // mov edx,hash[modep+edx*4]
+ a.mov(edx, ptr(uintptr_t(&m_hash.base()[modep.immediate()][0]), edx, 2)); // mov edx,hash[modep+edx*4]
a.call(ptr(edx, eax, 2 - m_hash.l2shift())); // call [edx+eax*shift]
}
}
@@ -2222,20 +3086,19 @@ void drcbe_x86::op_hashjmp(Assembler &a, const instruction &inst)
// variable mode
Gp const modereg = modep.select_register(ecx);
emit_mov_r32_p32(a, modereg, modep); // mov modereg,modep
- a.mov(ecx, ptr(u64(m_hash.base()), modereg, 2)); // mov ecx,hash[modereg*4]
+ a.mov(ecx, ptr(uintptr_t(m_hash.base()), modereg, 2)); // mov ecx,hash[modereg*4]
- // fixed PC
if (pcp.is_immediate())
{
+ // fixed PC
uint32_t l1val = (pcp.immediate() >> m_hash.l1shift()) & m_hash.l1mask();
uint32_t l2val = (pcp.immediate() >> m_hash.l2shift()) & m_hash.l2mask();
a.mov(edx, ptr(ecx, l1val*4)); // mov edx,[ecx+l1val*4]
a.call(ptr(edx, l2val*4)); // call [l2val*4]
}
-
- // variable PC
else
{
+ // variable PC
emit_mov_r32_p32(a, eax, pcp); // mov eax,pcp
a.mov(edx, eax); // mov edx,eax
a.shr(edx, m_hash.l1shift()); // shr edx,l1shift
@@ -2273,9 +3136,9 @@ void drcbe_x86::op_jmp(Assembler &a, const instruction &inst)
jmptarget = a.newNamedLabel(labelName.c_str());
if (inst.condition() == uml::COND_ALWAYS)
- a.jmp(jmptarget); // jmp target
+ a.jmp(jmptarget);
else
- a.j(X86_CONDITION(inst.condition()), jmptarget); // jcc target
+ a.j(X86_CONDITION(inst.condition()), jmptarget);
}
@@ -2299,9 +3162,12 @@ void drcbe_x86::op_exh(Assembler &a, const instruction &inst)
drccodeptr *targetptr = handp.handle().codeptr_addr();
// perform the exception processing
- Label no_exception = a.newLabel();
+ Label no_exception;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ no_exception = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), no_exception); // jcc no_exception
+ }
emit_mov_m32_p32(a, MABS(&m_state.exp, 4), exp); // mov [exp],exp
if (*targetptr != nullptr)
a.call(imm(*targetptr)); // call *targetptr
@@ -2331,9 +3197,12 @@ void drcbe_x86::op_callh(Assembler &a, const instruction &inst)
drccodeptr *targetptr = handp.handle().codeptr_addr();
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
// jump through the handle; directly if a normal jump
if (*targetptr != nullptr)
@@ -2363,9 +3232,12 @@ void drcbe_x86::op_ret(Assembler &a, const instruction &inst)
assert(inst.numparams() == 0);
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
- a.j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ {
+ skip = a.newLabel();
+ a.short_().j(X86_NOT_CONDITION(inst.condition()), skip);
+ }
// return
a.lea(esp, ptr(esp, 28)); // lea rsp,[rsp+28]
@@ -2397,18 +3269,21 @@ void drcbe_x86::op_callc(Assembler &a, const instruction &inst)
be_parameter paramp(*this, inst.param(1), PTYPE_M);
// skip if conditional
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
- a.j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ {
+ skip = a.newLabel();
+ a.short_().j(X86_NOT_CONDITION(inst.condition()), skip);
+ }
// perform the call
- a.mov(dword_ptr(esp, 0), imm(paramp.memory())); // mov [esp],paramp
- a.call(imm(funcp.cfunc())); // call funcp
+ a.mov(dword_ptr(esp, 0), imm(paramp.memory()));
+ a.call(imm(funcp.cfunc()));
// resolve the conditional link
if (inst.condition() != uml::COND_ALWAYS)
{
- a.bind(skip); // skip:
+ a.bind(skip);
reset_last_upper_lower_reg();
}
}
@@ -2429,14 +3304,19 @@ void drcbe_x86::op_recover(Assembler &a, const instruction &inst)
be_parameter dstp(*this, inst.param(0), PTYPE_MR);
// call the recovery code
- a.mov(eax, MABS(&m_stacksave)); // mov eax,stacksave
- a.mov(eax, ptr(eax, -4)); // mov eax,[eax-4]
- a.sub(eax, 1); // sub eax,1
- a.mov(dword_ptr(esp, 8), inst.param(1).mapvar()); // mov [esp+8],param1
- a.mov(ptr(esp, 4), eax); // mov [esp+4],eax
- a.mov(dword_ptr(esp, 0), imm(&m_map)); // mov [esp],m_map
- a.call(imm(&drc_map_variables::static_get_value)); // call drcmap_get_value
- emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+ a.mov(eax, MABS(&m_stacksave));
+ a.mov(eax, ptr(eax, -4));
+ a.sub(eax, 1);
+ a.mov(dword_ptr(esp, USE_THISCALL ? 4 : 8), inst.param(1).mapvar());
+ a.mov(ptr(esp, USE_THISCALL ? 0 : 4), eax);
+ if (USE_THISCALL)
+ a.mov(ecx, imm(m_drcmap_get_value.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(m_drcmap_get_value.obj));
+ a.call(imm(m_drcmap_get_value.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ emit_mov_p32_r32(a, dstp, eax);
}
@@ -2473,7 +3353,7 @@ void drcbe_x86::op_setfmod(Assembler &a, const instruction &inst)
emit_mov_r32_p32(a, eax, srcp); // mov eax,srcp
a.and_(eax, 3); // and eax,3
a.mov(MABS(&m_state.fmod), al); // mov [fmod],al
- a.fldcw(ptr(u64(&fp_control[0]), eax, 1, 2)); // fldcw fp_control[eax]
+ a.fldcw(ptr(uintptr_t(&fp_control[0]), eax, 1, 2)); // fldcw fp_control[eax]
}
}
@@ -2546,6 +3426,8 @@ void drcbe_x86::op_getflgs(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(eax);
+ a.pushfd();
+
// compute mask for flags
uint32_t flagmask = 0;
if (maskp.immediate() & FLAG_C) flagmask |= 0x001;
@@ -2645,7 +3527,7 @@ void drcbe_x86::op_getflgs(Assembler &a, const instruction &inst)
a.pushfd(); // pushf
a.pop(eax); // pop eax
a.and_(eax, flagmask); // and eax,flagmask
- a.movzx(dstreg, byte_ptr(u64(flags_map), eax)); // movzx dstreg,[flags_map]
+ a.movzx(dstreg, byte_ptr(uintptr_t(flags_map), eax)); // movzx dstreg,[flags_map]
break;
}
@@ -2661,6 +3543,32 @@ void drcbe_x86::op_getflgs(Assembler &a, const instruction &inst)
else if (dstp.is_int_register())
a.mov(MABS(m_reghi[dstp.ireg()], 4), 0); // mov [reghi],0
}
+
+ a.popfd();
+}
+
+
+//-------------------------------------------------
+// op_setflgs - process a SETFLGS opcode
+//-------------------------------------------------
+
+void drcbe_x86::op_setflgs(Assembler &a, const instruction &inst)
+{
+ assert(inst.size() == 4);
+ assert_no_condition(inst);
+ assert_no_flags(inst);
+
+ be_parameter srcp(*this, inst.param(0), PTYPE_MRI);
+
+ a.pushfd();
+
+ emit_mov_r32_p32(a, eax, srcp);
+
+ a.mov(eax, ptr(uintptr_t(flags_unmap), eax, 2));
+ a.and_(dword_ptr(esp), ~0x8c5);
+ a.or_(dword_ptr(esp), eax);
+
+ a.popfd();
}
@@ -2730,9 +3638,9 @@ void drcbe_x86::op_load(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(eax);
- // immediate index
if (indp.is_immediate())
{
+ // immediate index
int const scale = 1 << scalesizep.scale();
if (size == SIZE_BYTE)
@@ -2747,22 +3655,21 @@ void drcbe_x86::op_load(Assembler &a, const instruction &inst)
a.mov(dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
}
}
-
- // other index
else
{
+ // other index
Gp const indreg = indp.select_register(ecx);
- emit_mov_r32_p32(a, indreg, indp);
+ emit_mov_r32_p32_keepflags(a, indreg, indp);
if (size == SIZE_BYTE)
- a.movzx(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale(), 1)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 1)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- a.movzx(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale(), 2)); // movzx dstreg,[basep + scale*indp]
+ a.movzx(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 2)); // movzx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- a.mov(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- a.mov(edx, ptr(u64(basep.memory(4)), indreg, scalesizep.scale())); // mov edx,[basep + scale*indp + 4]
- a.mov(dstreg, ptr(u64(basep.memory(0)), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
+ a.mov(edx, ptr(uintptr_t(basep.memory(4)), indreg, scalesizep.scale())); // mov edx,[basep + scale*indp + 4]
+ a.mov(dstreg, ptr(uintptr_t(basep.memory(0)), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
}
}
@@ -2772,18 +3679,17 @@ void drcbe_x86::op_load(Assembler &a, const instruction &inst)
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
- // 1, 2, or 4-byte case
if (size != SIZE_QWORD)
{
+ // 1, 2, or 4-byte case
if (dstp.is_memory())
a.mov(MABS(dstp.memory(4), 4), 0); // mov [dstp+4],0
else if (dstp.is_int_register())
a.mov(MABS(m_reghi[dstp.ireg()], 4), 0); // mov [reghi],0
}
-
- // 8-byte case
else
{
+ // 8-byte case
if (dstp.is_memory())
a.mov(MABS(dstp.memory(4)), edx); // mov [dstp+4],edx
else if (dstp.is_int_register())
@@ -2817,9 +3723,9 @@ void drcbe_x86::op_loads(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(eax);
- // immediate index
if (indp.is_immediate())
{
+ // immediate index
int const scale = 1 << scalesizep.scale();
if (size == SIZE_BYTE)
@@ -2834,22 +3740,21 @@ void drcbe_x86::op_loads(Assembler &a, const instruction &inst)
a.mov(dstreg, MABS(basep.memory(scale*indp.immediate()))); // mov dstreg,[basep + scale*indp]
}
}
-
- // other index
else
{
+ // other index
Gp const indreg = indp.select_register(ecx);
- emit_mov_r32_p32(a, indreg, indp);
+ emit_mov_r32_p32_keepflags(a, indreg, indp);
if (size == SIZE_BYTE)
- a.movsx(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale(), 1)); // movsx dstreg,[basep + scale*indp]
+ a.movsx(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 1)); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_WORD)
- a.movsx(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale(), 2)); // movsx dstreg,[basep + scale*indp]
+ a.movsx(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 2)); // movsx dstreg,[basep + scale*indp]
else if (size == SIZE_DWORD)
- a.mov(dstreg, ptr(u64(basep.memory()), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
+ a.mov(dstreg, ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
else if (size == SIZE_QWORD)
{
- a.mov(edx, ptr(u64(basep.memory(4)), indreg, scalesizep.scale())); // mov edx,[basep + scale*indp + 4]
- a.mov(dstreg, ptr(u64(basep.memory(0)), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
+ a.mov(edx, ptr(uintptr_t(basep.memory(4)), indreg, scalesizep.scale())); // mov edx,[basep + scale*indp + 4]
+ a.mov(dstreg, ptr(uintptr_t(basep.memory(0)), indreg, scalesizep.scale())); // mov dstreg,[basep + scale*indp]
}
}
@@ -2859,7 +3764,12 @@ void drcbe_x86::op_loads(Assembler &a, const instruction &inst)
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
- a.cdq(); // cdq
+ if (size != SIZE_QWORD)
+ {
+ if (dstreg.id() != eax.id())
+ a.mov(eax, dstreg);
+ a.cdq(); // cdq
+ }
if (dstp.is_memory())
a.mov(MABS(dstp.memory(4)), edx); // mov [dstp+4],edx
else if (dstp.is_int_register())
@@ -2893,14 +3803,14 @@ void drcbe_x86::op_store(Assembler &a, const instruction &inst)
if (size == SIZE_BYTE && (srcreg.id() & 4)) // FIXME: &4?
srcreg = eax;
- // degenerate case: constant index
if (indp.is_immediate())
{
+ // degenerate case: constant index
int const scale = 1 << (scalesizep.scale());
- // immediate source
if (srcp.is_immediate())
{
+ // immediate source
if (size == SIZE_BYTE)
a.mov(MABS(basep.memory(scale*indp.immediate()), 1), srcp.immediate()); // mov [basep + scale*indp],srcp
else if (size == SIZE_WORD)
@@ -2914,14 +3824,14 @@ void drcbe_x86::op_store(Assembler &a, const instruction &inst)
// mov [basep + scale*indp + 4],srcp >> 32
}
}
-
- // variable source
else
{
+ // variable source
if (size != SIZE_QWORD)
- emit_mov_r32_p32(a, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32_keepflags(a, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(a, srcreg, edx, srcp); // mov edx:srcreg,srcp
+ emit_mov_r64_p64_keepflags(a, srcreg, edx, srcp); // mov edx:srcreg,srcp
+
if (size == SIZE_BYTE)
a.mov(MABS(basep.memory(scale*indp.immediate())), srcreg.r8()); // mov [basep + scale*indp],srcreg
else if (size == SIZE_WORD)
@@ -2935,47 +3845,45 @@ void drcbe_x86::op_store(Assembler &a, const instruction &inst)
}
}
}
-
- // normal case: variable index
else
{
+ // normal case: variable index
Gp const indreg = indp.select_register(ecx);
- emit_mov_r32_p32(a, indreg, indp); // mov indreg,indp
+ emit_mov_r32_p32_keepflags(a, indreg, indp); // mov indreg,indp
- // immediate source
if (srcp.is_immediate())
{
+ // immediate source
if (size == SIZE_BYTE)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale(), 1), srcp.immediate()); // mov [basep + 1*ecx],srcp
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 1), srcp.immediate()); // mov [basep + 1*ecx],srcp
else if (size == SIZE_WORD)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale(), 2), srcp.immediate()); // mov [basep + 2*ecx],srcp
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 2), srcp.immediate()); // mov [basep + 2*ecx],srcp
else if (size == SIZE_DWORD)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale(), 4), srcp.immediate()); // mov [basep + 4*ecx],srcp
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale(), 4), srcp.immediate()); // mov [basep + 4*ecx],srcp
else if (size == SIZE_QWORD)
{
- a.mov(ptr(u64(basep.memory(0)), indreg, scalesizep.scale(), 4), srcp.immediate()); // mov [basep + 8*ecx],srcp
- a.mov(ptr(u64(basep.memory(4)), indreg, scalesizep.scale(), 4), srcp.immediate() >> 32);
+ a.mov(ptr(uintptr_t(basep.memory(0)), indreg, scalesizep.scale(), 4), srcp.immediate()); // mov [basep + 8*ecx],srcp
+ a.mov(ptr(uintptr_t(basep.memory(4)), indreg, scalesizep.scale(), 4), srcp.immediate() >> 32);
// mov [basep + 8*ecx + 4],srcp >> 32
}
}
-
- // variable source
else
{
+ // variable source
if (size != SIZE_QWORD)
- emit_mov_r32_p32(a, srcreg, srcp); // mov srcreg,srcp
+ emit_mov_r32_p32_keepflags(a, srcreg, srcp); // mov srcreg,srcp
else
- emit_mov_r64_p64(a, srcreg, edx, srcp); // mov edx:srcreg,srcp
+ emit_mov_r64_p64_keepflags(a, srcreg, edx, srcp); // mov edx:srcreg,srcp
if (size == SIZE_BYTE)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale()), srcreg.r8()); // mov [basep + 1*ecx],srcreg
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale()), srcreg.r8()); // mov [basep + 1*ecx],srcreg
else if (size == SIZE_WORD)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale()), srcreg.r16()); // mov [basep + 2*ecx],srcreg
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale()), srcreg.r16()); // mov [basep + 2*ecx],srcreg
else if (size == SIZE_DWORD)
- a.mov(ptr(u64(basep.memory()), indreg, scalesizep.scale()), srcreg); // mov [basep + 4*ecx],srcreg
+ a.mov(ptr(uintptr_t(basep.memory()), indreg, scalesizep.scale()), srcreg); // mov [basep + 4*ecx],srcreg
else if (size == SIZE_QWORD)
{
- a.mov(ptr(u64(basep.memory(0)), indreg, scalesizep.scale()), srcreg); // mov [basep + 8*ecx],srcreg
- a.mov(ptr(u64(basep.memory(4)), indreg, scalesizep.scale()), edx); // mov [basep + 8*ecx],edx
+ a.mov(ptr(uintptr_t(basep.memory(0)), indreg, scalesizep.scale()), srcreg); // mov [basep + 8*ecx],srcreg
+ a.mov(ptr(uintptr_t(basep.memory(4)), indreg, scalesizep.scale()), edx); // mov [basep + 8*ecx],edx
}
}
}
@@ -3002,52 +3910,75 @@ void drcbe_x86::op_read(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(eax);
- // set up a call to the read byte handler
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacesizep.space()])); // mov [esp],space
+ // set up a call to the read handler
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
if (spacesizep.size() == SIZE_BYTE)
{
- a.call(imm(m_accessors[spacesizep.space()].read_byte)); // call read_byte
- a.movzx(dstreg, al); // movzx dstreg,al
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_byte.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_byte.obj));
+ a.call(imm(accessors.read_byte.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
+ a.movzx(dstreg, al);
}
else if (spacesizep.size() == SIZE_WORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_word)); // call read_word
- a.movzx(dstreg, ax); // movzx dstreg,ax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_word.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_word.obj));
+ a.call(imm(accessors.read_word.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
+ a.movzx(dstreg, ax);
}
else if (spacesizep.size() == SIZE_DWORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_dword)); // call read_dword
- a.mov(dstreg, eax); // mov dstreg,eax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_dword.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_dword.obj));
+ a.call(imm(accessors.read_dword.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
+ a.mov(dstreg, eax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_qword)); // call read_qword
- a.mov(dstreg, eax); // mov dstreg,eax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_qword.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_qword.obj));
+ a.call(imm(accessors.read_qword.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
+ a.mov(dstreg, eax);
}
// store low 32 bits
- emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(a, dstp, dstreg);
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
- // 1, 2, or 4-byte case
if (spacesizep.size() != SIZE_QWORD)
{
+ // 1, 2, or 4-byte case
if (dstp.is_memory())
- a.mov(MABS(dstp.memory(4), 4), 0); // mov [dstp+4],0
+ a.mov(MABS(dstp.memory(4), 4), 0);
else if (dstp.is_int_register())
- a.mov(MABS(m_reghi[dstp.ireg()], 4), 0); // mov [reghi],0
+ a.mov(MABS(m_reghi[dstp.ireg()], 4), 0);
}
-
- // 8-byte case
else
{
+ // 8-byte case
if (dstp.is_memory())
- a.mov(MABS(dstp.memory(4)), edx); // mov [dstp+4],edx
+ a.mov(MABS(dstp.memory(4)), edx);
else if (dstp.is_int_register())
- a.mov(MABS(m_reghi[dstp.ireg()]), edx); // mov [reghi],edx
+ a.mov(MABS(m_reghi[dstp.ireg()]), edx);
}
}
}
@@ -3075,50 +4006,78 @@ void drcbe_x86::op_readm(Assembler &a, const instruction &inst)
Gp const dstreg = dstp.select_register(eax);
// set up a call to the read byte handler
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_m32_p32(a, dword_ptr(esp, 8), maskp); // mov [esp+8],maskp
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 4 : 8), maskp);
else
- emit_mov_m64_p64(a, qword_ptr(esp, 8), maskp); // mov [esp+8],maskp
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacesizep.space()])); // mov [esp],space
- if (spacesizep.size() == SIZE_WORD)
+ emit_mov_m64_p64(a, qword_ptr(esp, USE_THISCALL ? 4 : 8), maskp);
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_byte_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_byte_masked.obj));
+ a.call(imm(accessors.read_byte_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ a.movzx(dstreg, al);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_word_masked)); // call read_word_masked
- a.movzx(dstreg, ax); // movzx dstreg,ax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_word_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_word_masked.obj));
+ a.call(imm(accessors.read_word_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ a.movzx(dstreg, ax);
}
else if (spacesizep.size() == SIZE_DWORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_dword_masked)); // call read_dword_masked
- a.mov(dstreg, eax); // mov dstreg,eax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_dword_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_dword_masked.obj));
+ a.call(imm(accessors.read_dword_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ a.mov(dstreg, eax);
}
else if (spacesizep.size() == SIZE_QWORD)
{
- a.call(imm(m_accessors[spacesizep.space()].read_qword_masked)); // call read_qword_masked
- a.mov(dstreg, eax); // mov dstreg,eax
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.read_qword_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.read_qword_masked.obj));
+ a.call(imm(accessors.read_qword_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 12);
+ a.mov(dstreg, eax);
}
// store low 32 bits
- emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
+ emit_mov_p32_r32(a, dstp, dstreg);
// 64-bit form stores upper 32 bits
if (inst.size() == 8)
{
- // 1, 2, or 4-byte case
if (spacesizep.size() != SIZE_QWORD)
{
+ // 1, 2, or 4-byte case
if (dstp.is_memory())
- a.mov(MABS(dstp.memory(4), 4), 0); // mov [dstp+4],0
+ a.mov(MABS(dstp.memory(4), 4), 0);
else if (dstp.is_int_register())
- a.mov(MABS(m_reghi[dstp.ireg()], 4), 0); // mov [reghi],0
+ a.mov(MABS(m_reghi[dstp.ireg()], 4), 0);
}
-
- // 8-byte case
else
{
+ // 8-byte case
if (dstp.is_memory())
- a.mov(MABS(dstp.memory(4)), edx); // mov [dstp+4],edx
+ a.mov(MABS(dstp.memory(4)), edx);
else if (dstp.is_int_register())
- a.mov(MABS(m_reghi[dstp.ireg()]), edx); // mov [reghi],edx
+ a.mov(MABS(m_reghi[dstp.ireg()]), edx);
}
}
}
@@ -3142,20 +4101,52 @@ void drcbe_x86::op_write(Assembler &a, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write byte handler
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
if (spacesizep.size() != SIZE_QWORD)
- emit_mov_m32_p32(a, dword_ptr(esp, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
else
- emit_mov_m64_p64(a, qword_ptr(esp, 8), srcp); // mov [esp+8],srcp
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacesizep.space()])); // mov [esp],space
+ emit_mov_m64_p64(a, qword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
if (spacesizep.size() == SIZE_BYTE)
- a.call(imm(m_accessors[spacesizep.space()].write_byte)); // call write_byte
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_byte.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_byte.obj));
+ a.call(imm(accessors.write_byte.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ }
else if (spacesizep.size() == SIZE_WORD)
- a.call(imm(m_accessors[spacesizep.space()].write_word)); // call write_word
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_word.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_word.obj));
+ a.call(imm(accessors.write_word.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ }
else if (spacesizep.size() == SIZE_DWORD)
- a.call(imm(m_accessors[spacesizep.space()].write_dword)); // call write_dword
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_dword.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_dword.obj));
+ a.call(imm(accessors.write_dword.func));
+ if (USE_THISCALL)
+ a.sub(esp, 8);
+ }
else if (spacesizep.size() == SIZE_QWORD)
- a.call(imm(m_accessors[spacesizep.space()].write_qword)); // call write_qword
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_qword.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_qword.obj));
+ a.call(imm(accessors.write_qword.func));
+ if (USE_THISCALL)
+ a.sub(esp, 12);
+ }
}
@@ -3178,24 +4169,58 @@ void drcbe_x86::op_writem(Assembler &a, const instruction &inst)
assert(spacesizep.is_size_space());
// set up a call to the write byte handler
+ auto const &accessors = m_memory_accessors[spacesizep.space()];
if (spacesizep.size() != SIZE_QWORD)
{
- emit_mov_m32_p32(a, dword_ptr(esp, 12), maskp); // mov [esp+12],maskp
- emit_mov_m32_p32(a, dword_ptr(esp, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 8 : 12), maskp);
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
}
else
{
- emit_mov_m64_p64(a, qword_ptr(esp, 16), maskp); // mov [esp+16],maskp
- emit_mov_m64_p64(a, qword_ptr(esp, 8), srcp); // mov [esp+8],srcp
+ emit_mov_m64_p64(a, qword_ptr(esp, USE_THISCALL ? 12 : 16), maskp);
+ emit_mov_m64_p64(a, qword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
+ }
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
+ if (spacesizep.size() == SIZE_BYTE)
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_byte_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_byte_masked.obj));
+ a.call(imm(accessors.write_byte_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 12);
+ }
+ else if (spacesizep.size() == SIZE_WORD)
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_word_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_word_masked.obj));
+ a.call(imm(accessors.write_word_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 12);
}
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacesizep.space()])); // mov [esp],space
- if (spacesizep.size() == SIZE_WORD)
- a.call(imm(m_accessors[spacesizep.space()].write_word_masked)); // call write_word_masked
else if (spacesizep.size() == SIZE_DWORD)
- a.call(imm(m_accessors[spacesizep.space()].write_dword_masked)); // call write_dword_masked
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_dword_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_dword_masked.obj));
+ a.call(imm(accessors.write_dword_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 12);
+ }
else if (spacesizep.size() == SIZE_QWORD)
- a.call(imm(m_accessors[spacesizep.space()].write_qword_masked)); // call write_qword_masked
+ {
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessors.write_qword_masked.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessors.write_qword_masked.obj));
+ a.call(imm(accessors.write_qword_masked.func));
+ if (USE_THISCALL)
+ a.sub(esp, 20);
+ }
}
@@ -3217,11 +4242,13 @@ void drcbe_x86::op_carry(Assembler &a, const instruction &inst)
// degenerate case: source is immediate
if (srcp.is_immediate() && bitp.is_immediate())
{
- if (srcp.immediate() & ((uint64_t)1 << bitp.immediate()))
+ if (srcp.immediate() & ((uint64_t)1 << (bitp.immediate() & (inst.size() * 8 - 1))))
a.stc();
else
a.clc();
- }
+
+ return;
+ }
// load non-immediate bit numbers into a register
if (!bitp.is_immediate())
@@ -3233,43 +4260,98 @@ void drcbe_x86::op_carry(Assembler &a, const instruction &inst)
// 32-bit form
if (inst.size() == 4)
{
+ if (srcp.is_immediate())
+ emit_mov_r32_p32(a, edx, srcp);
+
if (bitp.is_immediate())
{
if (srcp.is_memory())
- a.bt(MABS(srcp.memory(), 4), bitp.immediate()); // bt [srcp],bitp
+ a.bt(MABS(srcp.memory(), 4), (bitp.immediate() & (inst.size() * 8 - 1)));
else if (srcp.is_int_register())
- a.bt(Gpd(srcp.ireg()), bitp.immediate()); // bt srcp,bitp
+ a.bt(Gpd(srcp.ireg()), (bitp.immediate() & (inst.size() * 8 - 1)));
+ else if (srcp.is_immediate())
+ a.bt(edx, (bitp.immediate() & (inst.size() * 8 - 1)));
}
else
{
if (srcp.is_memory())
- a.bt(MABS(srcp.memory()), ecx); // bt [srcp],ecx
+ a.bt(MABS(srcp.memory()), ecx);
else if (srcp.is_int_register())
- a.bt(Gpd(srcp.ireg()), ecx); // bt [srcp],ecx
+ a.bt(Gpd(srcp.ireg()), ecx);
+ else if (srcp.is_immediate())
+ a.bt(edx, ecx);
}
}
// 64-bit form
else
{
+ if (srcp.is_immediate())
+ emit_mov_r64_p64(a, ebx, edx, srcp);
+
if (bitp.is_immediate())
{
- if (srcp.is_memory())
- a.bt(MABS(srcp.memory(), 4), bitp.immediate()); // bt [srcp],bitp
- else if (srcp.is_int_register() && bitp.immediate() < 32)
- a.bt(Gpd(srcp.ireg()), bitp.immediate()); // bt srcp,bitp
- else if (srcp.is_int_register() && bitp.immediate() >= 32)
- a.bt(MABS(m_reghi[srcp.ireg()], 4), bitp.immediate() - 32); // bt [srcp.hi],bitp
+ const uint32_t bitshift = bitp.immediate() & (inst.size() * 8 - 1);
+ if (bitshift < 32)
+ {
+ if (srcp.is_memory())
+ a.bt(MABS(srcp.memory(), 4), bitshift);
+ else if (srcp.is_int_register())
+ a.bt(Gpd(srcp.ireg()), bitshift);
+ else if (srcp.is_immediate())
+ a.bt(ebx, bitshift);
+ }
+ else if (bitshift >= 32)
+ {
+ if (srcp.is_memory())
+ a.bt(MABS((uint8_t*)srcp.memory() + 4, 4), bitshift - 32);
+ else if (srcp.is_int_register())
+ a.bt(MABS(m_reghi[srcp.ireg()], 4), bitshift - 32);
+ else if (srcp.is_immediate())
+ a.bt(edx, bitshift);
+ }
}
else
{
+ Label end = a.newLabel();
+ Label higher = a.newLabel();
+
+ a.cmp(ecx, 32);
+ a.short_().jge(higher);
+
if (srcp.is_memory())
- a.bt(MABS(srcp.memory()), ecx); // bt [srcp],ecx
+ {
+ a.bt(MABS(srcp.memory(), 4), ecx);
+ }
else if (srcp.is_int_register())
{
- a.mov(MABS(m_reglo[srcp.ireg()]), Gpd(srcp.ireg())); // mov [srcp.lo],srcp
- a.bt(MABS(m_reglo[srcp.ireg()]), ecx); // bt [srcp],ecx
+ a.mov(MABS(m_reglo[srcp.ireg()], 4), Gpd(srcp.ireg())); // mov [srcp.lo],srcp
+ a.bt(MABS(m_reglo[srcp.ireg()], 4), ecx); // bt [srcp],ecx
+ }
+ else if (srcp.is_immediate())
+ {
+ a.bt(ebx, ecx);
}
+
+ a.short_().jmp(end);
+
+ a.bind(higher);
+ a.sub(ecx, 32);
+
+ if (srcp.is_memory())
+ {
+ a.bt(MABS((uint8_t*)srcp.memory() + 4, 4), ecx);
+ }
+ else if (srcp.is_int_register())
+ {
+ a.bt(MABS(m_reghi[srcp.ireg()], 4), ecx);
+ }
+ else if (srcp.is_immediate())
+ {
+ a.bt(edx, ecx);
+ }
+
+ a.bind(end);
}
}
}
@@ -3330,9 +4412,12 @@ void drcbe_x86::op_mov(Assembler &a, const instruction &inst)
Gp const dstreg = dstp.select_register(eax);
// add a conditional branch unless a conditional move is possible
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS && ((inst.size() == 8) || !(dstp.is_int_register() && !srcp.is_immediate())))
+ {
+ skip = a.newLabel();
a.short_().j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ }
// 32-bit form
if (inst.size() == 4)
@@ -3384,7 +4469,7 @@ void drcbe_x86::op_mov(Assembler &a, const instruction &inst)
// general case
else
{
- emit_mov_r64_p64(a, dstreg, edx, srcp); // mov edx:dstreg,srcp
+ emit_mov_r64_p64_keepflags(a, dstreg, edx, srcp); // mov edx:dstreg,srcp
emit_mov_p64_r64(a, dstp, dstreg, edx); // mov dstp,edx:dstreg
}
}
@@ -3416,7 +4501,7 @@ void drcbe_x86::op_sext(Assembler &a, const instruction &inst)
assert(sizep.is_size());
// pick a target register for the general case
- Gp const dstreg = dstp.select_register(eax);
+ Gp const dstreg = eax;
// convert 8-bit source registers to EAX
if (sizep.size() == SIZE_BYTE && srcp.is_int_register() && (srcp.ireg() & 4))
@@ -3444,6 +4529,16 @@ void drcbe_x86::op_sext(Assembler &a, const instruction &inst)
else if (sizep.size() == SIZE_DWORD && dstreg.id() != srcp.ireg())
a.mov(dstreg, Gpd(srcp.ireg())); // mov dstreg,srcp
}
+ else if (srcp.is_immediate())
+ {
+ if (sizep.size() == SIZE_BYTE)
+ a.mov(dstreg, (int8_t)srcp.immediate());
+ else if (sizep.size() == SIZE_WORD)
+ a.mov(dstreg, (int16_t)srcp.immediate());
+ else if (sizep.size() == SIZE_DWORD)
+ a.mov(dstreg, (int32_t)srcp.immediate());
+ }
+
if (inst.flags() != 0)
a.test(dstreg, dstreg); // test dstreg,dstreg
@@ -3455,7 +4550,7 @@ void drcbe_x86::op_sext(Assembler &a, const instruction &inst)
else if (inst.size() == 8)
{
a.cdq(); // cdq
- emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
+ emit_mov_p64_r64(a, dstp, dstreg, edx); // mov dstp,edx:eax
}
}
@@ -3484,12 +4579,12 @@ void drcbe_x86::op_roland(Assembler &a, const instruction &inst)
if (inst.size() == 4)
{
emit_mov_r32_p32(a, dstreg, srcp); // mov dstreg,srcp
- shift_op_param(a, Inst::kIdRol, dstreg, shiftp, // rol dstreg,shiftp
+ shift_op_param(a, Inst::kIdRol, inst.size(), dstreg, shiftp, // rol dstreg,shiftp
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, false);
alu_op_param(a, Inst::kIdAnd, dstreg, maskp, // and dstreg,maskp
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
@@ -3538,16 +4633,16 @@ void drcbe_x86::op_rolins(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(ecx, shiftp, maskp);
- // 32-bit form
if (inst.size() == 4)
{
+ // 32-bit form
emit_mov_r32_p32(a, eax, srcp); // mov eax,srcp
- shift_op_param(a, Inst::kIdRol, eax, shiftp, // rol eax,shiftp
+ shift_op_param(a, Inst::kIdRol, inst.size(), eax, shiftp, // rol eax,shiftp
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, false);
emit_mov_r32_p32(a, dstreg, dstp); // mov dstreg,dstp
if (maskp.is_immediate())
{
@@ -3563,11 +4658,13 @@ void drcbe_x86::op_rolins(Assembler &a, const instruction &inst)
}
a.or_(dstreg, eax); // or dstreg,eax
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
- }
- // 64-bit form
+ if (inst.flags())
+ a.test(dstreg, dstreg);
+ }
else if (inst.size() == 8)
{
+ // 64-bit form
emit_mov_r64_p64(a, eax, edx, srcp); // mov edx:eax,srcp
emit_rol_r64_p64(a, eax, edx, shiftp, inst); // rol edx:eax,shiftp
if (maskp.is_immediate())
@@ -3599,9 +4696,15 @@ void drcbe_x86::op_rolins(Assembler &a, const instruction &inst)
a.not_(ecx); // not ecx
if (dstp.is_int_register())
{
- a.and_(Gpd(dstp.ireg()), ebx); // and dstp.lo,ebx
+ if (dstp.ireg() == Gp::kIdBx)
+ a.and_(ptr(esp, -8), ebx); // and dstp.lo,ebx
+ else
+ a.and_(Gpd(dstp.ireg()), ebx); // and dstp.lo,ebx
a.and_(MABS(m_reghi[dstp.ireg()]), ecx); // and dstp.hi,ecx
- a.or_(Gpd(dstp.ireg()), eax); // or dstp.lo,eax
+ if (dstp.ireg() == Gp::kIdBx)
+ a.or_(ptr(esp, -8), eax); // or dstp.lo,eax
+ else
+ a.or_(Gpd(dstp.ireg()), eax); // or dstp.lo,eax
a.or_(MABS(m_reghi[dstp.ireg()]), edx); // or dstp.hi,edx
}
else
@@ -3611,18 +4714,25 @@ void drcbe_x86::op_rolins(Assembler &a, const instruction &inst)
a.or_(MABS(dstp.memory(0)), eax); // or dstp.lo,eax
a.or_(MABS(dstp.memory(4)), edx); // or dstp.hi,edx
}
+
a.mov(ebx, ptr(esp, -8)); // mov ebx,[esp-8]
- }
- if (inst.flags() == FLAG_Z)
- a.or_(eax, edx); // or eax,edx
- else if (inst.flags() == FLAG_S)
- ;// do nothing -- final OR will have the right result
- else if (inst.flags() == (FLAG_Z | FLAG_S))
- {
- a.movzx(ecx, ax); // movzx ecx,ax
- a.shr(eax, 16); // shr eax,16
- a.or_(edx, ecx); // or edx,ecx
- a.or_(edx, eax); // or edx,eax
+
+ if (inst.flags())
+ {
+ if (dstp.is_int_register())
+ calculate_status_flags(a, Gpd(dstp.ireg()), FLAG_Z);
+ else
+ calculate_status_flags(a, MABS(dstp.memory(0)), FLAG_Z);
+
+ a.pushfd();
+
+ if (dstp.is_int_register())
+ calculate_status_flags(a, MABS(m_reghi[dstp.ireg()]), FLAG_S | FLAG_Z);
+ else
+ calculate_status_flags(a, MABS(dstp.memory(4)), FLAG_S | FLAG_Z);
+
+ emit_combine_z_flags(a);
+ }
}
}
}
@@ -3935,9 +5045,6 @@ void drcbe_x86::op_cmp(Assembler &a, const instruction &inst)
void drcbe_x86::op_mulu(Assembler &a, const instruction &inst)
{
- uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- uint8_t vflag = inst.flags() & FLAG_V;
-
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_no_condition(inst);
@@ -3949,68 +5056,48 @@ void drcbe_x86::op_mulu(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
normalize_commutative(src1p, src2p);
- bool compute_hi = (dstp != edstp);
+ const bool compute_hi = (dstp != edstp);
- // 32-bit form
if (inst.size() == 4)
{
- // general case
+ // 32-bit form
emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
- if (src2p.is_memory())
- a.mul(MABS(src2p.memory(), 4)); // mul [src2p]
- else if (src2p.is_int_register())
- a.mul(Gpd(src2p.ireg())); // mul src2p
- else if (src2p.is_immediate())
- {
- a.mov(edx, src2p.immediate()); // mov edx,src2p
- a.mul(edx); // mul edx
- }
+ emit_mov_r32_p32(a, edx, src2p); // mov edx,src2p
+ a.mul(edx); // mul edx
+
emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
if (compute_hi)
emit_mov_p32_r32(a, edstp, edx); // mov edstp,edx
- // compute flags
- if (inst.flags() != 0)
+ if (inst.flags())
{
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfd(); // pushf
- if (compute_hi)
- {
- if (zsflags == FLAG_Z)
- a.or_(edx, eax); // or edx,eax
- else if (zsflags == FLAG_S)
- a.test(edx, edx); // test edx,edx
- else
- {
- a.movzx(ecx, ax); // movzx ecx,ax
- a.shr(eax, 16); // shr eax,16
- a.or_(edx, ecx); // or edx,ecx
- a.or_(edx, eax); // or edx,eax
- }
- }
- else
- a.test(eax, eax); // test eax,eax
+ a.pushfd();
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfd(); // pushf
- a.pop(eax); // pop eax
- a.and_(dword_ptr(esp, 0), ~0x84); // and [esp],~0x84
- a.or_(ptr(esp, 0), eax); // or [esp],eax
- a.popfd(); // popf
- }
- }
+ a.test(edx, edx);
+ a.pushfd(); // will have the sign flag + upper half zero
+ a.pop(edx);
+
+ a.test(eax, eax);
+ a.pushfd(); // lower half zero
+ a.pop(eax);
+
+ a.and_(dword_ptr(esp, 0), ~(0x40 | 0x80));
+ a.mov(ecx, edx);
+ a.and_(ecx, 0x80); // sign
+
+ a.and_(eax, edx);
+ a.and_(eax, 0x40); // zero
+
+ a.or_(eax, ecx);
+ a.or_(dword_ptr(esp, 0), eax);
+
+ a.popfd();
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- // general case
- a.mov(dword_ptr(esp, 24), inst.flags()); // mov [esp+24],flags
+ // 64-bit form
+ a.mov(dword_ptr(esp, 24), inst.flags() ? 1 : 0); // mov [esp+24],flags
emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
if (!compute_hi)
@@ -4018,9 +5105,9 @@ void drcbe_x86::op_mulu(Assembler &a, const instruction &inst)
else
a.mov(dword_ptr(esp, 4), imm(&m_reshi)); // mov [esp+4],&reshi
a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
- a.call(imm(dmulu)); // call dmulu
+ a.call(imm(dmulu<false>)); // call dmulu (calculate ZS flags as 64*64->128)
if (inst.flags() != 0)
- a.push(ptr(u64(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
@@ -4037,14 +5124,75 @@ void drcbe_x86::op_mulu(Assembler &a, const instruction &inst)
//-------------------------------------------------
+// op_mululw - process a MULULW (32x32=32) opcode
+//-------------------------------------------------
+
+void drcbe_x86::op_mululw(Assembler &a, const instruction &inst)
+{
+ // validate instruction
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ // normalize parameters
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+ normalize_commutative(src1p, src2p);
+
+ if (inst.size() == 4)
+ {
+ // 32-bit form
+ emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
+ emit_mov_r32_p32(a, edx, src2p); // mov edx,src2p
+ a.mul(edx); // mul edx
+
+ emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+
+ if (inst.flags())
+ {
+ a.test(eax, eax);
+ a.pushfd(); // sign + zero
+
+ // if edx is not zero then it overflowed
+ a.test(edx, edx);
+ a.pushfd();
+ a.pop(edx);
+ a.and_(edx, 0x40); // zero
+ a.xor_(edx, 0x40);
+ a.shl(edx, 5); // turn into overflow flag
+ a.or_(dword_ptr(esp, 0), edx);
+
+ a.popfd();
+ }
+ }
+ else if (inst.size() == 8)
+ {
+ // 64-bit form
+ a.mov(dword_ptr(esp, 24), inst.flags() ? 1 : 0); // mov [esp+24],flags
+ emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
+ a.mov(dword_ptr(esp, 4), imm(&m_reslo)); // mov [esp+4],&reslo
+ a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
+ a.call(imm(dmulu<true>)); // call dmulu (calculate ZS flags as 64*64->64)
+ if (inst.flags() != 0)
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
+ if (inst.flags() != 0)
+ a.popfd(); // popf
+ }
+
+}
+
+
+//-------------------------------------------------
// op_muls - process a MULS opcode
//-------------------------------------------------
void drcbe_x86::op_muls(Assembler &a, const instruction &inst)
{
- uint8_t zsflags = inst.flags() & (FLAG_Z | FLAG_S);
- uint8_t vflag = inst.flags() & FLAG_V;
-
// validate instruction
assert(inst.size() == 4 || inst.size() == 8);
assert_no_condition(inst);
@@ -4056,91 +5204,48 @@ void drcbe_x86::op_muls(Assembler &a, const instruction &inst)
be_parameter src1p(*this, inst.param(2), PTYPE_MRI);
be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
normalize_commutative(src1p, src2p);
- bool compute_hi = (dstp != edstp);
+ const bool compute_hi = (dstp != edstp);
- // 32-bit form
if (inst.size() == 4)
{
- // 32-bit destination with memory/immediate or register/immediate
- if (!compute_hi && !src1p.is_immediate() && src2p.is_immediate())
- {
- if (src1p.is_memory())
- a.imul(eax, MABS(src1p.memory(), 4), src2p.immediate()); // imul eax,[src1p],src2p
- else if (src1p.is_int_register())
- a.imul(eax, Gpd(src1p.ireg()), src2p.immediate()); // imul eax,src1p,src2p
- emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
- }
-
- // 32-bit destination, general case
- else if (!compute_hi)
- {
- emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
- if (src2p.is_memory())
- a.imul(eax, MABS(src2p.memory(), 4)); // imul eax,[src2p]
- else if (src2p.is_int_register())
- a.imul(eax, Gpd(src2p.ireg())); // imul eax,src2p
- emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
- }
+ // 32-bit form
+ emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
+ emit_mov_r32_p32(a, edx, src2p); // mov edx,src2p
+ a.imul(edx); // imul edx
- // 64-bit destination, general case
- else
- {
- emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
- if (src2p.is_memory())
- a.imul(MABS(src2p.memory(), 4)); // imul [src2p]
- else if (src2p.is_int_register())
- a.imul(Gpd(src2p.ireg())); // imul src2p
- else if (src2p.is_immediate())
- {
- a.mov(edx, src2p.immediate()); // mov edx,src2p
- a.imul(edx); // imul edx
- }
- emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+ emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+ if (compute_hi)
emit_mov_p32_r32(a, edstp, edx); // mov edstp,edx
- }
- // compute flags
- if (inst.flags() != 0)
+ if (inst.flags())
{
- if (zsflags != 0)
- {
- if (vflag)
- a.pushfd(); // pushf
- if (compute_hi)
- {
- if (inst.flags() == FLAG_Z)
- a.or_(edx, eax); // or edx,eax
- else if (inst.flags() == FLAG_S)
- a.test(edx, edx); // test edx,edx
- else
- {
- a.movzx(ecx, ax); // movzx ecx,ax
- a.shr(eax, 16); // shr eax,16
- a.or_(edx, ecx); // or edx,ecx
- a.or_(edx, eax); // or edx,eax
- }
- }
- else
- a.test(eax, eax); // test eax,eax
+ a.pushfd();
- // we rely on the fact that OF is cleared by all logical operations above
- if (vflag)
- {
- a.pushfd(); // pushf
- a.pop(eax); // pop eax
- a.and_(dword_ptr(esp, 0), ~0x84); // and [esp],~0x84
- a.or_(ptr(esp, 0), eax); // or [esp],eax
- a.popfd(); // popf
- }
- }
+ a.test(edx, edx);
+ a.pushfd(); // will have the sign flag + upper half zero
+ a.pop(edx);
+
+ a.test(eax, eax);
+ a.pushfd(); // lower half zero
+ a.pop(eax);
+
+ a.and_(dword_ptr(esp, 0), ~(0x40 | 0x80));
+ a.mov(ecx, edx);
+ a.and_(ecx, 0x80); // sign
+
+ a.and_(eax, edx);
+ a.and_(eax, 0x40); // zero
+
+ a.or_(eax, ecx);
+ a.or_(dword_ptr(esp, 0), eax);
+
+ a.popfd();
}
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- // general case
- a.mov(dword_ptr(esp, 24), inst.flags()); // mov [esp+24],flags
+ // 64-bit form
+ a.mov(dword_ptr(esp, 24), inst.flags() ? 1 : 0); // mov [esp+24],flags
emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
if (!compute_hi)
@@ -4148,9 +5253,9 @@ void drcbe_x86::op_muls(Assembler &a, const instruction &inst)
else
a.mov(dword_ptr(esp, 4), imm(&m_reshi)); // push [esp+4],&reshi
a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
- a.call(imm(dmuls)); // call dmuls
+ a.call(imm(dmuls<false>)); // call dmuls (calculate ZS flags as 64*64->128)
if (inst.flags() != 0)
- a.push(ptr(u64(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
@@ -4167,6 +5272,71 @@ void drcbe_x86::op_muls(Assembler &a, const instruction &inst)
//-------------------------------------------------
+// op_mulslw - process a MULSLW (32x32=32) opcode
+//-------------------------------------------------
+
+void drcbe_x86::op_mulslw(Assembler &a, const instruction &inst)
+{
+ // validate instruction
+ assert(inst.size() == 4 || inst.size() == 8);
+ assert_no_condition(inst);
+ assert_flags(inst, FLAG_V | FLAG_Z | FLAG_S);
+
+ // normalize parameters
+ be_parameter dstp(*this, inst.param(0), PTYPE_MR);
+ be_parameter src1p(*this, inst.param(1), PTYPE_MRI);
+ be_parameter src2p(*this, inst.param(2), PTYPE_MRI);
+ normalize_commutative(src1p, src2p);
+
+ if (inst.size() == 4)
+ {
+ // 32-bit form
+ emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
+ emit_mov_r32_p32(a, edx, src2p); // mov edx,src2p
+ a.imul(edx); // imul edx
+
+ emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+
+ if (inst.flags())
+ {
+ a.test(eax, eax);
+ a.pushfd(); // sign + zero
+
+ a.mov(ecx, edx);
+ a.cdq();
+
+ a.cmp(ecx, edx);
+ a.pushfd();
+ a.pop(edx);
+ a.and_(edx, 0x40); // zero
+ a.xor_(edx, 0x40);
+ a.shl(edx, 5); // turn into overflow flag
+ a.or_(dword_ptr(esp, 0), edx);
+
+ a.popfd();
+ }
+ }
+ else if (inst.size() == 8)
+ {
+ // 64-bit form
+ a.mov(dword_ptr(esp, 24), inst.flags() ? 1 : 0); // mov [esp+24],flags
+ emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
+ emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
+ a.mov(dword_ptr(esp, 4), imm(&m_reslo)); // mov [esp+4],&reslo
+ a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
+ a.call(imm(dmuls<true>)); // call dmuls (calculate ZS flags as 64*64->64)
+ if (inst.flags() != 0)
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
+ a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
+ emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
+ if (inst.flags() != 0)
+ a.popfd(); // popf
+ }
+}
+
+
+//-------------------------------------------------
// op_divu - process a DIVU opcode
//-------------------------------------------------
@@ -4184,10 +5354,9 @@ void drcbe_x86::op_divu(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
bool compute_rem = (dstp != edstp);
- // 32-bit form
if (inst.size() == 4)
{
- // general case
+ // 32-bit form
emit_mov_r32_p32(a, ecx, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
@@ -4195,7 +5364,7 @@ void drcbe_x86::op_divu(Assembler &a, const instruction &inst)
a.add(eax, eax); // add eax,eax
}
Label skip = a.newLabel();
- a.jecxz(skip); // jecxz skip
+ a.short_().jecxz(skip); // jecxz skip
emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
a.xor_(edx, edx); // xor edx,edx
a.div(ecx); // div ecx
@@ -4207,11 +5376,9 @@ void drcbe_x86::op_divu(Assembler &a, const instruction &inst)
a.bind(skip); // skip:
reset_last_upper_lower_reg();
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- // general case
+ // 64-bit form
emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
if (!compute_rem)
@@ -4221,7 +5388,7 @@ void drcbe_x86::op_divu(Assembler &a, const instruction &inst)
a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
a.call(imm(ddivu)); // call ddivu
if (inst.flags() != 0)
- a.push(ptr(u64(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
@@ -4255,10 +5422,9 @@ void drcbe_x86::op_divs(Assembler &a, const instruction &inst)
be_parameter src2p(*this, inst.param(3), PTYPE_MRI);
bool compute_rem = (dstp != edstp);
- // 32-bit form
if (inst.size() == 4)
{
- // general case
+ // 32-bit form
emit_mov_r32_p32(a, ecx, src2p); // mov ecx,src2p
if (inst.flags() != 0)
{
@@ -4266,7 +5432,7 @@ void drcbe_x86::op_divs(Assembler &a, const instruction &inst)
a.add(eax, eax); // add eax,eax
}
Label skip = a.newLabel();
- a.jecxz(skip); // jecxz skip
+ a.short_().jecxz(skip); // jecxz skip
emit_mov_r32_p32(a, eax, src1p); // mov eax,src1p
a.cdq(); // cdq
a.idiv(ecx); // idiv ecx
@@ -4278,11 +5444,9 @@ void drcbe_x86::op_divs(Assembler &a, const instruction &inst)
a.bind(skip); // skip:
reset_last_upper_lower_reg();
}
-
- // 64-bit form
else if (inst.size() == 8)
{
- // general case
+ // 64-bit form
emit_mov_m64_p64(a, qword_ptr(esp, 16), src2p); // mov [esp+16],src2p
emit_mov_m64_p64(a, qword_ptr(esp, 8), src1p); // mov [esp+8],src1p
if (!compute_rem)
@@ -4292,7 +5456,7 @@ void drcbe_x86::op_divs(Assembler &a, const instruction &inst)
a.mov(dword_ptr(esp, 0), imm(&m_reslo)); // mov [esp],&reslo
a.call(imm(ddivs)); // call ddivs
if (inst.flags() != 0)
- a.push(ptr(u64(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
+ a.push(dword_ptr(uintptr_t(flags_unmap), eax, 2)); // push flags_unmap[eax*4]
a.mov(eax, MABS((uint32_t *)&m_reslo + 0)); // mov eax,reslo.lo
a.mov(edx, MABS((uint32_t *)&m_reslo + 1)); // mov edx,reslo.hi
emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
@@ -4802,6 +5966,12 @@ void drcbe_x86::op_lzcnt(Assembler &a, const instruction &inst)
// pick a target register for the general case
Gp const dstreg = dstp.select_register(eax);
+ if (inst.flags())
+ {
+ a.xor_(eax, eax); // reset status flags
+ a.test(eax, eax);
+ }
+
// 32-bit form
if (inst.size() == 4)
{
@@ -4811,24 +5981,37 @@ void drcbe_x86::op_lzcnt(Assembler &a, const instruction &inst)
a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
a.xor_(dstreg, 31); // xor dstreg,31
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
+
+ a.test(dstreg, dstreg);
}
// 64-bit form
else if (inst.size() == 8)
{
- emit_mov_r64_p64(a, edx, dstreg, srcp); // mov dstreg:edx,srcp
- a.bsr(dstreg, dstreg); // bsr dstreg,dstreg
+ emit_mov_r64_p64(a, dstreg, edx, srcp); // mov dstreg:edx,srcp
+
Label skip = a.newLabel();
- a.jnz(skip); // jnz skip
- a.mov(ecx, 32 ^ 31); // mov ecx,32 ^ 31
- a.bsr(dstreg, edx); // bsr dstreg,edx
- a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
- a.add(ecx, 32); // add ecx,32
- a.bind(skip); // skip:
- reset_last_upper_lower_reg();
- a.xor_(edx, edx); // xor edx,edx
- a.xor_(dstreg, 31); // xor dstreg,31
+ Label end = a.newLabel();
+
+ a.bsr(edx, edx);
+ a.short_().jz(skip);
+ a.xor_(edx, 31 ^ 63);
+ a.mov(dstreg, edx);
+ a.short_().jmp(end);
+
+ a.bind(skip);
+ a.mov(edx, 64 ^ 63);
+ a.bsr(dstreg, dstreg);
+ a.cmovz(dstreg, edx);
+
+ a.bind(end);
+
+ a.xor_(dstreg, 63);
+ a.mov(edx, 0);
+
emit_mov_p64_r64(a, dstp, dstreg, edx); // mov dstp,edx:dstreg
+
+ a.test(dstreg, dstreg);
}
}
@@ -4850,6 +6033,12 @@ void drcbe_x86::op_tzcnt(Assembler &a, const instruction &inst)
Gp const dstreg = dstp.select_register(eax);
+ if (inst.flags())
+ {
+ a.xor_(eax, eax); // reset status flags
+ a.test(eax, eax);
+ }
+
// 32-bit form
if (inst.size() == 4)
{
@@ -4858,15 +6047,18 @@ void drcbe_x86::op_tzcnt(Assembler &a, const instruction &inst)
a.bsf(dstreg, dstreg); // bsf dstreg,dstreg
a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
+
+ a.mov(ecx, dstreg);
+ a.xor_(ecx, 32);
}
// 64-bit form
else if (inst.size() == 8)
{
Label skip = a.newLabel();
- emit_mov_r64_p64(a, edx, dstreg, srcp); // mov dstreg:edx,srcp
+ emit_mov_r64_p64(a, dstreg, edx, srcp); // mov dstreg:edx,srcp
a.bsf(dstreg, dstreg); // bsf dstreg,dstreg
- a.jz(skip); // jnz skip
+ a.short_().jnz(skip); // jnz skip
a.mov(ecx, 32); // mov ecx,32
a.bsf(dstreg, edx); // bsf dstreg,edx
a.cmovz(dstreg, ecx); // cmovz dstreg,ecx
@@ -4875,6 +6067,9 @@ void drcbe_x86::op_tzcnt(Assembler &a, const instruction &inst)
reset_last_upper_lower_reg();
a.xor_(edx, edx); // xor edx,edx
emit_mov_p64_r64(a, dstp, dstreg, edx); // mov dstp,edx:dstreg
+
+ a.mov(ecx, dstreg);
+ a.xor_(ecx, 64);
}
}
@@ -4954,23 +6149,23 @@ void drcbe_x86::op_shl(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdShl, MABS(dstp.memory(), 4), src2p, // shl [dstp],src2p
+ shift_op_param(a, Inst::kIdShl, inst.size(), MABS(dstp.memory(), 4), src2p, // shl [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdShl, dstreg, src2p, // shl dstreg,src2p
+ shift_op_param(a, Inst::kIdShl, inst.size(), dstreg, src2p, // shl dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5010,23 +6205,23 @@ void drcbe_x86::op_shr(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdShr, MABS(dstp.memory(), 4), src2p, // shr [dstp],src2p
+ shift_op_param(a, Inst::kIdShr, inst.size(), MABS(dstp.memory(), 4), src2p, // shr [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdShr, dstreg, src2p, // shr dstreg,src2p
+ shift_op_param(a, Inst::kIdShr, inst.size(), dstreg, src2p, // shr dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5066,23 +6261,23 @@ void drcbe_x86::op_sar(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdSar, MABS(dstp.memory(), 4), src2p, // sar [dstp],src2p
+ shift_op_param(a, Inst::kIdSar, inst.size(), MABS(dstp.memory(), 4), src2p, // sar [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdSar, dstreg, src2p, // sar dstreg,src2p
+ shift_op_param(a, Inst::kIdSar, inst.size(), dstreg, src2p, // sar dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5122,23 +6317,23 @@ void drcbe_x86::op_rol(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdRol, MABS(dstp.memory(), 4), src2p, // rol [dstp],src2p
+ shift_op_param(a, Inst::kIdRol, inst.size(), MABS(dstp.memory(), 4), src2p, // rol [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdRol, dstreg, src2p, // rol dstreg,src2p
+ shift_op_param(a, Inst::kIdRol, inst.size(), dstreg, src2p, // rol dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5178,23 +6373,23 @@ void drcbe_x86::op_ror(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdRor, MABS(dstp.memory(), 4), src2p, // ror [dstp],src2p
+ shift_op_param(a, Inst::kIdRor, inst.size(), MABS(dstp.memory(), 4), src2p, // ror [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdRor, dstreg, src2p, // rol dstreg,src2p
+ shift_op_param(a, Inst::kIdRor, inst.size(), dstreg, src2p, // rol dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5234,23 +6429,23 @@ void drcbe_x86::op_rolc(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdRcl, MABS(dstp.memory(), 4), src2p, // rcl [dstp],src2p
+ shift_op_param(a, Inst::kIdRcl, inst.size(), MABS(dstp.memory(), 4), src2p, // rcl [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32_keepflags(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdRcl, dstreg, src2p, // rcl dstreg,src2p
+ shift_op_param(a, Inst::kIdRcl, inst.size(), dstreg, src2p, // rcl dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5290,23 +6485,23 @@ void drcbe_x86::op_rorc(Assembler &a, const instruction &inst)
{
// dstp == src1p in memory
if (dstp.is_memory() && dstp == src1p)
- shift_op_param(a, Inst::kIdRcr, MABS(dstp.memory(), 4), src2p, // rcr [dstp],src2p
+ shift_op_param(a, Inst::kIdRcr, inst.size(), MABS(dstp.memory(), 4), src2p, // rcr [dstp],src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
// general case
else
{
emit_mov_r32_p32_keepflags(a, dstreg, src1p); // mov dstreg,src1p
- shift_op_param(a, Inst::kIdRcr, dstreg, src2p, // rcr dstreg,src2p
+ shift_op_param(a, Inst::kIdRcr, inst.size(), dstreg, src2p, // rcr dstreg,src2p
[inst](Assembler &a, Operand const &dst, be_parameter const &src)
{
// optimize zero case
return (!inst.flags() && !src.immediate());
- });
+ }, true);
emit_mov_p32_r32(a, dstp, dstreg); // mov dstp,dstreg
}
}
@@ -5343,28 +6538,27 @@ void drcbe_x86::op_fload(Assembler &a, const instruction &inst)
be_parameter basep(*this, inst.param(1), PTYPE_M);
be_parameter indp(*this, inst.param(2), PTYPE_MRI);
- // immediate index
if (indp.is_immediate())
{
- a.mov(eax, MABS(basep.memory(4*indp.immediate()))); // mov eax,[basep + 4*indp]
+ // immediate index
+ a.mov(eax, MABS(basep.memory(inst.size()*indp.immediate())));
if (inst.size() == 8)
- a.mov(edx, MABS(basep.memory(4 + 4*indp.immediate()))); // mov edx,[basep + 4*indp + 4]
+ a.mov(edx, MABS(basep.memory(4 + inst.size()*indp.immediate())));
}
-
- // other index
else
{
+ // other index
Gp const indreg = indp.select_register(ecx);
- emit_mov_r32_p32(a, indreg, indp);
- a.mov(eax, ptr(u64(basep.memory(0)), indreg, 2)); // mov eax,[basep + 4*indp]
+ emit_mov_r32_p32_keepflags(a, indreg, indp);
+ a.mov(eax, ptr(uintptr_t(basep.memory(0)), indreg, (inst.size() == 8) ? 3 : 2));
if (inst.size() == 8)
- a.mov(edx, ptr(u64(basep.memory(4)), indreg, 2)); // mov edx,[basep + 4*indp + 4]
+ a.mov(edx, ptr(uintptr_t(basep.memory(4)), indreg, (inst.size() == 8) ? 3 : 2));
}
// general case
- a.mov(MABS(dstp.memory(0)), eax); // mov [dstp],eax
+ a.mov(MABS(dstp.memory(0)), eax);
if (inst.size() == 8)
- a.mov(MABS(dstp.memory(4)), edx); // mov [dstp + 4],edx
+ a.mov(MABS(dstp.memory(4)), edx);
}
@@ -5384,27 +6578,25 @@ void drcbe_x86::op_fstore(Assembler &a, const instruction &inst)
be_parameter indp(*this, inst.param(1), PTYPE_MRI);
be_parameter srcp(*this, inst.param(2), PTYPE_MF);
- // general case
- a.mov(eax, MABS(srcp.memory(0))); // mov eax,[srcp]
+ a.mov(eax, MABS(srcp.memory(0)));
if (inst.size() == 8)
- a.mov(edx, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
+ a.mov(edx, MABS(srcp.memory(4)));
- // immediate index
if (indp.is_immediate())
{
- a.mov(MABS(basep.memory(4*indp.immediate())), eax); // mov [basep + 4*indp],eax
+ // immediate index
+ a.mov(MABS(basep.memory(inst.size()*indp.immediate())), eax);
if (inst.size() == 8)
- a.mov(MABS(basep.memory(4 + 4*indp.immediate())), edx); // mov [basep + 4*indp + 4],edx
+ a.mov(MABS(basep.memory(4 + inst.size()*indp.immediate())), edx);
}
-
- // other index
else
{
+ // other index
Gp const indreg = indp.select_register(ecx);
- emit_mov_r32_p32(a, indreg, indp);
- a.mov(ptr(u64(basep.memory(0)), indreg, 2), eax); // mov [basep + 4*indp],eax
+ emit_mov_r32_p32_keepflags(a, indreg, indp);
+ a.mov(ptr(uintptr_t(basep.memory(0)), indreg, (inst.size() == 8) ? 3 : 2), eax);
if (inst.size() == 8)
- a.mov(ptr(u64(basep.memory(4)), indreg, 2), edx); // mov [basep + 4*indp + 4],edx
+ a.mov(ptr(uintptr_t(basep.memory(4)), indreg, (inst.size() == 8) ? 3 : 2), edx);
}
}
@@ -5428,18 +6620,22 @@ void drcbe_x86::op_fread(Assembler &a, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// set up a call to the read dword/qword handler
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacep.space()])); // mov [esp],space
- if (inst.size() == 4)
- a.call(imm(m_accessors[spacep.space()].read_dword)); // call read_dword
- else if (inst.size() == 8)
- a.call(imm(m_accessors[spacep.space()].read_qword)); // call read_qword
+ auto const &accessors = m_memory_accessors[spacep.space()];
+ auto const &accessor = (inst.size() == 4) ? accessors.read_dword : accessors.read_qword;
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessor.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessor.obj));
+ a.call(imm(accessor.func));
+ if (USE_THISCALL)
+ a.sub(esp, 4);
// store result
if (inst.size() == 4)
- emit_mov_p32_r32(a, dstp, eax); // mov dstp,eax
+ emit_mov_p32_r32(a, dstp, eax);
else if (inst.size() == 8)
- emit_mov_p64_r64(a, dstp, eax, edx); // mov dstp,edx:eax
+ emit_mov_p64_r64(a, dstp, eax, edx);
}
@@ -5462,16 +6658,20 @@ void drcbe_x86::op_fwrite(Assembler &a, const instruction &inst)
assert((1 << spacep.size()) == inst.size());
// set up a call to the write dword/qword handler
+ auto const &accessors = m_memory_accessors[spacep.space()];
+ auto const &accessor = (inst.size() == 4) ? accessors.write_dword : accessors.write_qword;
if (inst.size() == 4)
- emit_mov_m32_p32(a, dword_ptr(esp, 8), srcp); // mov [esp+8],srcp
- else if (inst.size() == 8)
- emit_mov_m64_p64(a, qword_ptr(esp, 8), srcp); // mov [esp+8],srcp
- emit_mov_m32_p32(a, dword_ptr(esp, 4), addrp); // mov [esp+4],addrp
- a.mov(dword_ptr(esp, 0), imm(m_space[spacep.space()])); // mov [esp],space
- if (inst.size() == 4)
- a.call(imm(m_accessors[spacep.space()].write_dword)); // call write_dword
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
else if (inst.size() == 8)
- a.call(imm(m_accessors[spacep.space()].write_qword)); // call write_qword
+ emit_mov_m64_p64(a, qword_ptr(esp, USE_THISCALL ? 4 : 8), srcp);
+ emit_mov_m32_p32(a, dword_ptr(esp, USE_THISCALL ? 0 : 4), addrp);
+ if (USE_THISCALL)
+ a.mov(ecx, imm(accessor.obj));
+ else
+ a.mov(dword_ptr(esp, 0), imm(accessor.obj));
+ a.call(imm(accessor.func));
+ if (USE_THISCALL)
+ a.sub(esp, (inst.size() == 4) ? 8 : 12);
}
@@ -5491,22 +6691,25 @@ void drcbe_x86::op_fmov(Assembler &a, const instruction &inst)
be_parameter srcp(*this, inst.param(1), PTYPE_MF);
// always start with a jmp
- Label skip = a.newLabel();
+ Label skip;
if (inst.condition() != uml::COND_ALWAYS)
- a.j(X86_NOT_CONDITION(inst.condition()), skip); // jcc skip
+ {
+ skip = a.newLabel();
+ a.short_().j(X86_NOT_CONDITION(inst.condition()), skip);
+ }
// general case
- a.mov(eax, MABS(srcp.memory(0))); // mov eax,[srcp]
+ a.mov(eax, MABS(srcp.memory(0)));
if (inst.size() == 8)
- a.mov(edx, MABS(srcp.memory(4))); // mov edx,[srcp + 4]
- a.mov(MABS(dstp.memory(0)), eax); // mov [dstp],eax
+ a.mov(edx, MABS(srcp.memory(4)));
+ a.mov(MABS(dstp.memory(0)), eax);
if (inst.size() == 8)
- a.mov(MABS(dstp.memory(4)), edx); // mov [dstp + 4],edx
+ a.mov(MABS(dstp.memory(4)), edx);
// resolve the jump
if (inst.condition() != uml::COND_ALWAYS)
{
- a.bind(skip); // skip:
+ a.bind(skip);
reset_last_upper_lower_reg();
}
}
@@ -6026,141 +7229,19 @@ void drcbe_x86::op_icopyf(Assembler &a, const instruction &inst)
}
}
+} // anonymous namespace
-//**************************************************************************
-// MISCELLAENOUS FUNCTIONS
-//**************************************************************************
-
-//-------------------------------------------------
-// dmulu - perform a double-wide unsigned multiply
-//-------------------------------------------------
-
-int drcbe_x86::dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags)
+std::unique_ptr<drcbe_interface> make_drcbe_x86(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits)
{
- // shortcut if we don't care about the high bits or the flags
- if (&dstlo == &dsthi && flags == false)
- {
- dstlo = src1 * src2;
- return 0;
- }
-
- // fetch source values
- uint64_t a = src1;
- uint64_t b = src2;
- if (a == 0 || b == 0)
- {
- dsthi = dstlo = 0;
- return FLAG_Z;
- }
-
- // compute high and low parts first
- uint64_t lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
- uint64_t hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
-
- // compute middle parts
- uint64_t prevlo = lo;
- uint64_t temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- prevlo = lo;
- temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- // store the results
- dsthi = hi;
- dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != 0) << 1);
-}
-
-
-//-------------------------------------------------
-// dmuls - perform a double-wide signed multiply
-//-------------------------------------------------
-
-int drcbe_x86::dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags)
-{
- uint64_t lo, hi, prevlo;
- uint64_t a, b, temp;
-
- // shortcut if we don't care about the high bits or the flags
- if (&dstlo == &dsthi && flags == false)
- {
- dstlo = src1 * src2;
- return 0;
- }
-
- // fetch absolute source values
- a = src1; if ((int64_t)a < 0) a = -a;
- b = src2; if ((int64_t)b < 0) b = -b;
- if (a == 0 || b == 0)
- {
- dsthi = dstlo = 0;
- return FLAG_Z;
- }
-
- // compute high and low parts first
- lo = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 0);
- hi = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 32);
-
- // compute middle parts
- prevlo = lo;
- temp = (uint64_t)(uint32_t)(a >> 32) * (uint64_t)(uint32_t)(b >> 0);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- prevlo = lo;
- temp = (uint64_t)(uint32_t)(a >> 0) * (uint64_t)(uint32_t)(b >> 32);
- lo += temp << 32;
- hi += (temp >> 32) + (lo < prevlo);
-
- // adjust for signage
- if ((int64_t)(src1 ^ src2) < 0)
- {
- hi = ~hi + (lo == 0);
- lo = ~lo + 1;
- }
-
- // store the results
- dsthi = hi;
- dstlo = lo;
- return ((hi >> 60) & FLAG_S) | ((dsthi != ((int64_t)lo >> 63)) << 1);
-}
-
-
-//-------------------------------------------------
-// ddivu - perform a double-wide unsigned divide
-//-------------------------------------------------
-
-int drcbe_x86::ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2)
-{
- // do nothing if src2 == 0
- if (src2 == 0)
- return FLAG_V;
-
- dstlo = src1 / src2;
- if (&dstlo != &dsthi)
- dsthi = src1 % src2;
- return ((dstlo == 0) << 2) | ((dstlo >> 60) & FLAG_S);
-}
-
-
-//-------------------------------------------------
-// ddivs - perform a double-wide signed divide
-//-------------------------------------------------
-
-int drcbe_x86::ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2)
-{
- // do nothing if src2 == 0
- if (src2 == 0)
- return FLAG_V;
-
- dstlo = src1 / src2;
- if (&dstlo != &dsthi)
- dsthi = src1 % src2;
- return ((dstlo == 0) << 2) | ((dstlo >> 60) & FLAG_S);
+ return std::unique_ptr<drcbe_interface>(new drcbe_x86(drcuml, device, cache, flags, modes, addrbits, ignorebits));
}
} // namespace drc
diff --git a/src/devices/cpu/drcbex86.h b/src/devices/cpu/drcbex86.h
index 9feb21f379b..3d873677fed 100644
--- a/src/devices/cpu/drcbex86.h
+++ b/src/devices/cpu/drcbex86.h
@@ -14,290 +14,21 @@
#pragma once
#include "drcuml.h"
-#include "drcbeut.h"
-#include "x86log.h"
-#include "asmjit/src/asmjit/asmjit.h"
+#include <memory>
namespace drc {
-//**************************************************************************
-// TYPE DEFINITIONS
-//**************************************************************************
-
-class drcbe_x86 : public drcbe_interface
-{
- typedef uint32_t (*x86_entry_point_func)(x86code *entry);
-
-public:
- // construction/destruction
- drcbe_x86(drcuml_state &drcuml, device_t &device, drc_cache &cache, uint32_t flags, int modes, int addrbits, int ignorebits);
- virtual ~drcbe_x86();
-
- // required overrides
- virtual void reset() override;
- virtual int execute(uml::code_handle &entry) override;
- virtual void generate(drcuml_block &block, const uml::instruction *instlist, uint32_t numinst) override;
- virtual bool hash_exists(uint32_t mode, uint32_t pc) override;
- virtual void get_info(drcbe_info &info) override;
- virtual bool logging() const override { return m_log != nullptr; }
-
-private:
- // HACK: leftover from x86emit
- static int const REG_MAX = 16;
-
- // a be_parameter is similar to a uml::parameter but maps to native registers/memory
- class be_parameter
- {
- public:
- // parameter types
- enum be_parameter_type
- {
- PTYPE_NONE = 0, // invalid
- PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
- PTYPE_INT_REGISTER, // integer register; value = 0-REG_MAX
- PTYPE_FLOAT_REGISTER, // floating point register; value = 0-REG_MAX
- PTYPE_VECTOR_REGISTER, // vector register; value = 0-REG_MAX
- PTYPE_MEMORY, // memory; value = pointer to memory
- PTYPE_MAX
- };
-
- // represents the value of a parameter
- typedef uint64_t be_parameter_value;
-
- // construction
- be_parameter() : m_type(PTYPE_NONE), m_value(0) { }
- be_parameter(be_parameter const &param) : m_type(param.m_type), m_value(param.m_value) { }
- be_parameter(uint64_t val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
- be_parameter(drcbe_x86 &drcbe, const uml::parameter &param, uint32_t allowed);
-
- // creators for types that don't safely default
- static inline be_parameter make_ireg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_INT_REGISTER, regnum); }
- static inline be_parameter make_freg(int regnum) { assert(regnum >= 0 && regnum < REG_MAX); return be_parameter(PTYPE_FLOAT_REGISTER, regnum); }
- static inline be_parameter make_memory(void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(base)); }
- static inline be_parameter make_memory(const void *base) { return be_parameter(PTYPE_MEMORY, reinterpret_cast<be_parameter_value>(const_cast<void *>(base))); }
-
- // operators
- bool operator==(be_parameter const &rhs) const { return (m_type == rhs.m_type && m_value == rhs.m_value); }
- bool operator!=(be_parameter const &rhs) const { return (m_type != rhs.m_type || m_value != rhs.m_value); }
-
- // getters
- be_parameter_type type() const { return m_type; }
- uint64_t immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
- uint32_t ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value < REG_MAX); return m_value; }
- uint32_t freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value < REG_MAX); return m_value; }
- void *memory(uint32_t offset = 0) const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value + offset); }
-
- // type queries
- bool is_immediate() const { return (m_type == PTYPE_IMMEDIATE); }
- bool is_int_register() const { return (m_type == PTYPE_INT_REGISTER); }
- bool is_float_register() const { return (m_type == PTYPE_FLOAT_REGISTER); }
- bool is_memory() const { return (m_type == PTYPE_MEMORY); }
-
- // other queries
- bool is_immediate_value(uint64_t value) const { return (m_type == PTYPE_IMMEDIATE && m_value == value); }
-
- // helpers
- asmjit::x86::Gpd select_register(asmjit::x86::Gpd const &defreg) const;
- asmjit::x86::Xmm select_register(asmjit::x86::Xmm defreg) const;
- template <typename T> T select_register(T defreg, be_parameter const &checkparam) const;
- template <typename T> T select_register(T defreg, be_parameter const &checkparam, be_parameter const &checkparam2) const;
-
- private:
- // private constructor
- be_parameter(be_parameter_type type, be_parameter_value value) : m_type(type), m_value(value) { }
-
- // internals
- be_parameter_type m_type; // parameter type
- be_parameter_value m_value; // parameter value
- };
-
- // helpers
- asmjit::x86::Mem MABS(void const *base, u32 const size = 0) const { return asmjit::x86::Mem(u64(base), size); }
- void normalize_commutative(be_parameter &inner, be_parameter &outer);
- void emit_combine_z_flags(asmjit::x86::Assembler &a);
- void emit_combine_z_shl_flags(asmjit::x86::Assembler &a);
- void reset_last_upper_lower_reg();
- void set_last_lower_reg(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Gp const &reglo);
- void set_last_upper_reg(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Gp const &reghi);
- bool can_skip_lower_load(asmjit::x86::Assembler &a, uint32_t *memref, asmjit::x86::Gp const &reglo);
- bool can_skip_upper_load(asmjit::x86::Assembler &a, uint32_t *memref, asmjit::x86::Gp const &reghi);
-
- static void debug_log_hashjmp(int mode, offs_t pc);
-
- // code generators
- void op_handle(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_hash(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_label(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_comment(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mapvar(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_nop(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_debug(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_exit(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_hashjmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_jmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_exh(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_callh(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ret(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_callc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_recover(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_setfmod(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getfmod(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getexp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_getflgs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_save(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_restore(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_load(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_loads(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_store(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_read(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_readm(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_write(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_writem(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_carry(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_set(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mov(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_sext(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_roland(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_rolins(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_add(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_addc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_sub(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_subc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_cmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_mulu(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_muls(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_divu(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_divs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_and(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_test(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_or(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_xor(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_lzcnt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_tzcnt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_bswap(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_shl(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_shr(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_sar(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ror(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_rol(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_rorc(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_rolc(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- void op_fload(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fstore(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fread(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fwrite(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fmov(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ftoint(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ffrint(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_ffrflt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frnds(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fadd(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fsub(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fcmp(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fmul(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fdiv(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fneg(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fabs(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fsqrt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frecip(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_frsqrt(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_fcopyi(asmjit::x86::Assembler &a, const uml::instruction &inst);
- void op_icopyf(asmjit::x86::Assembler &a, const uml::instruction &inst);
-
- // 32-bit code emission helpers
- void emit_mov_r32_p32(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reg, be_parameter const &param);
- void emit_mov_r32_p32_keepflags(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reg, be_parameter const &param);
- void emit_mov_m32_p32(asmjit::x86::Assembler &a, asmjit::x86::Mem memref, be_parameter const &param);
- void emit_mov_p32_r32(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Gp const &reg);
-
- void alu_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param, std::function<bool(asmjit::x86::Assembler &a, asmjit::Operand const &dst, be_parameter const &src)> optimize = [](asmjit::x86::Assembler &a, asmjit::Operand dst, be_parameter const &src) { return false; });
- void shift_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode, asmjit::Operand const &dst, be_parameter const &param, std::function<bool(asmjit::x86::Assembler &a, asmjit::Operand const &dst, be_parameter const &src)> optimize);
-
- // 64-bit code emission helpers
- void emit_mov_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param);
- void emit_mov_r64_p64_keepflags(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param);
- void emit_mov_m64_p64(asmjit::x86::Assembler &a, asmjit::x86::Mem const &memref, be_parameter const &param);
- void emit_mov_p64_r64(asmjit::x86::Assembler &a, be_parameter const &param, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi);
- void emit_and_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_and_m64_p64(asmjit::x86::Assembler &a, asmjit::x86::Mem const &memref_lo, asmjit::x86::Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
- void emit_or_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_or_m64_p64(asmjit::x86::Assembler &a, asmjit::x86::Mem const &memref_lo, asmjit::x86::Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
- void emit_xor_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_xor_m64_p64(asmjit::x86::Assembler &a, asmjit::x86::Mem const &memref_lo, asmjit::x86::Mem const &memref_hi, be_parameter const &param, const uml::instruction &inst);
- void emit_shl_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_shr_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_sar_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_rol_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_ror_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_rcl_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
- void emit_rcr_r64_p64(asmjit::x86::Assembler &a, asmjit::x86::Gp const &reglo, asmjit::x86::Gp const &reghi, be_parameter const &param, const uml::instruction &inst);
-
- void alu_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode_lo, asmjit::x86::Inst::Id const opcode_hi, asmjit::x86::Gp const &lo, asmjit::x86::Gp const &hi, be_parameter const &param, bool const saveflags);
- void alu_op_param(asmjit::x86::Assembler &a, asmjit::x86::Inst::Id const opcode_lo, asmjit::x86::Inst::Id const opcode_hi, asmjit::x86::Mem const &lo, asmjit::x86::Mem const &hi, be_parameter const &param, bool const saveflags);
-
- // floating-point code emission helpers
- void emit_fld_p(asmjit::x86::Assembler &a, int size, be_parameter const &param);
- void emit_fstp_p(asmjit::x86::Assembler &a, int size, be_parameter const &param);
-
- // callback helpers
- static int dmulu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2, bool flags);
- static int dmuls(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2, bool flags);
- static int ddivu(uint64_t &dstlo, uint64_t &dsthi, uint64_t src1, uint64_t src2);
- static int ddivs(uint64_t &dstlo, uint64_t &dsthi, int64_t src1, int64_t src2);
-
- size_t emit(asmjit::CodeHolder &ch);
-
- // internal state
- drc_hash_table m_hash; // hash table state
- drc_map_variables m_map; // code map
- x86log_context * m_log; // logging
- FILE * m_log_asmjit;
- bool m_logged_common; // logged common code already?
- bool const m_sse3; // do we have SSE3 support?
-
- x86_entry_point_func m_entry; // entry point
- x86code * m_exit; // exit point
- x86code * m_nocode; // nocode handler
- x86code * m_save; // save handler
- x86code * m_restore; // restore handler
-
- uint32_t * m_reglo[REG_MAX]; // pointer to low part of data for each register
- uint32_t * m_reghi[REG_MAX]; // pointer to high part of data for each register
- asmjit::x86::Gp m_last_lower_reg; // last register we stored a lower from
- x86code * m_last_lower_pc; // PC after instruction where we last stored a lower register
- uint32_t * m_last_lower_addr; // address where we last stored an lower register
- asmjit::x86::Gp m_last_upper_reg; // last register we stored an upper from
- x86code * m_last_upper_pc; // PC after instruction where we last stored an upper register
- uint32_t * m_last_upper_addr; // address where we last stored an upper register
- double m_fptemp; // temporary storage for floating point
-
- uint16_t m_fpumode; // saved FPU mode
- uint16_t m_fmodesave; // temporary location for saving
-
- void * m_stacksave; // saved stack pointer
- void * m_hashstacksave; // saved stack pointer for hashjmp
- uint64_t m_reslo; // extended low result
- uint64_t m_reshi; // extended high result
-
- // globals
- typedef void (drcbe_x86::*opcode_generate_func)(asmjit::x86::Assembler &a, const uml::instruction &inst);
- struct opcode_table_entry
- {
- uml::opcode_t opcode; // opcode in question
- opcode_generate_func func; // function pointer to the work
- };
- static const opcode_table_entry s_opcode_table_source[];
- static opcode_generate_func s_opcode_table[uml::OP_MAX];
-};
+std::unique_ptr<drcbe_interface> make_drcbe_x86(
+ drcuml_state &drcuml,
+ device_t &device,
+ drc_cache &cache,
+ uint32_t flags,
+ int modes,
+ int addrbits,
+ int ignorebits);
} // namespace drc
-using drc::drcbe_x86;
-
#endif // MAME_CPU_DRCBEX86_H
diff --git a/src/devices/cpu/drcuml.cpp b/src/devices/cpu/drcuml.cpp
index 897e0dc498c..a0ccfa7b349 100644
--- a/src/devices/cpu/drcuml.cpp
+++ b/src/devices/cpu/drcuml.cpp
@@ -34,12 +34,12 @@
#include "emu.h"
#include "drcuml.h"
-#include "emuopts.h"
+#include "drcbearm64.h"
#include "drcbec.h"
-#ifdef NATIVE_DRC
-#include "drcbex86.h"
#include "drcbex64.h"
-#endif
+#include "drcbex86.h"
+
+#include "emuopts.h"
#include <fstream>
@@ -49,32 +49,30 @@
// DEBUGGING
//**************************************************************************
-#define VALIDATE_BACKEND (0)
#define LOG_SIMPLIFICATIONS (0)
//**************************************************************************
-// TYPE DEFINITIONS
+// MACROS
//**************************************************************************
// determine the type of the native DRC, falling back to C
#ifndef NATIVE_DRC
-typedef drcbe_c drcbe_native;
+#if !defined(MAME_NOASM) && (defined(__x86_64__) || defined(_M_X64))
+#define NATIVE_DRC drcbe_x64
+#elif !defined(MAME_NOASM) && (defined(__i386__) || defined(_M_IX86))
+#define NATIVE_DRC drcbe_x86
+#elif !defined(MAME_NOASM) && (defined(__aarch64__) || defined(_M_ARM64))
+#define NATIVE_DRC drcbe_arm64
#else
-typedef NATIVE_DRC drcbe_native;
+#define NATIVE_DRC drcbe_c
+#endif
#endif
-
-// structure describing back-end validation test
-struct bevalidate_test
-{
- uml::opcode_t opcode;
- u8 size;
- u8 iflags;
- u8 flags;
- u64 param[4];
-};
+#define MAKE_DRCBE_IMPL(name) make_##name
+#define MAKE_DRCBE(name) MAKE_DRCBE_IMPL(name)
+#define make_drcbe_native MAKE_DRCBE(NATIVE_DRC)
@@ -92,7 +90,6 @@ drcbe_interface::drcbe_interface(drcuml_state &drcuml, drc_cache &cache, device_
, m_device(device)
, m_space()
, m_state(*reinterpret_cast<drcuml_machine_state *>(cache.alloc_near(sizeof(m_state))))
- , m_accessors(nullptr)
{
// reset the machine state
memset(&m_state, 0, sizeof(m_state));
@@ -102,17 +99,12 @@ drcbe_interface::drcbe_interface(drcuml_state &drcuml, drc_cache &cache, device_
if (device.interface(memory))
{
int const count = memory->max_space_count();
- m_accessors = reinterpret_cast<data_accessors *>(cache.alloc_near(sizeof(*m_accessors) * count));
- memset(m_accessors, 0, sizeof(*m_accessors) * count);
m_space.resize(count, nullptr);
for (int spacenum = 0; spacenum < count; ++spacenum)
{
if (memory->has_space(spacenum))
- {
m_space[spacenum] = &memory->space(spacenum);
- m_space[spacenum]->accessors(m_accessors[spacenum]);
- }
}
}
}
@@ -140,8 +132,8 @@ drcuml_state::drcuml_state(device_t &device, drc_cache &cache, u32 flags, int mo
: m_device(device)
, m_cache(cache)
, m_beintf(device.machine().options().drc_use_c()
- ? std::unique_ptr<drcbe_interface>{ new drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits) }
- : std::unique_ptr<drcbe_interface>{ new drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits) })
+ ? drc::make_drcbe_c(*this, device, cache, flags, modes, addrbits, ignorebits)
+ : drc::make_drcbe_native(*this, device, cache, flags, modes, addrbits, ignorebits))
, m_umllog(device.machine().options().drc_log_uml()
? new std::ofstream(util::string_format("drcuml_%s.asm", device.shortname()))
: nullptr)
@@ -180,19 +172,6 @@ void drcuml_state::reset()
// call the backend to reset
m_beintf->reset();
-
- // do a one-time validation if requested
-#if 0
- if (VALIDATE_BACKEND)
- {
- static bool validated = false;
- if (!validated)
- {
- validated = true;
- validate_backend(this);
- }
- }
-#endif
}
catch (drcuml_block::abort_compilation &)
{
@@ -418,18 +397,30 @@ void drcuml_block::optimize()
}
inst.set_flags(accumflags);
- // track mapvars
if (inst.opcode() == uml::OP_MAPVAR)
+ {
+ // track mapvars
mapvar[inst.param(0).mapvar() - uml::MAPVAR_M0] = inst.param(1).immediate();
-
- // convert all mapvar parameters to immediates
+ }
else if (inst.opcode() != uml::OP_RECOVER)
+ {
+ // convert all mapvar parameters to immediates
for (int pnum = 0; pnum < inst.numparams(); pnum++)
+ {
if (inst.param(pnum).is_mapvar())
inst.set_mapvar(pnum, mapvar[inst.param(pnum).mapvar() - uml::MAPVAR_M0]);
+ }
+ }
// now that flags are correct, simplify the instruction
+#if LOG_SIMPLIFICATIONS
+ uml::instruction const orig = inst;
+#endif
inst.simplify();
+#if LOG_SIMPLIFICATIONS
+ if (orig != inst)
+ osd_printf_debug("Simplified: %-50.50s -> %s\n", orig.disasm(&m_drcuml), inst.disasm(&m_drcuml));
+#endif
}
}
@@ -524,606 +515,3 @@ char const *drcuml_block::get_comment_text(uml::instruction const &inst, std::st
return nullptr;
}
}
-
-
-
-#if 0
-
-/***************************************************************************
- BACK-END VALIDATION
-***************************************************************************/
-
-//-------------------------------------------------
-// effective_test_psize - return the effective
-// parameter size based on the size and fixed
-// array of parameter values
-//-------------------------------------------------
-
-inline uint8_t effective_test_psize(const opcode_info &opinfo, int pnum, int instsize, const uint64_t *params)
-{
- switch (opinfo.param[pnum].size)
- {
- case PSIZE_4: return 4;
- case PSIZE_8: return 8;
- case PSIZE_OP: return instsize;
- case PSIZE_P1: return 1 << (params[0] & 3);
- case PSIZE_P2: return 1 << (params[1] & 3);
- case PSIZE_P3: return 1 << (params[2] & 3);
- case PSIZE_P4: return 1 << (params[3] & 3);
- }
- return instsize;
-}
-
-#define TEST_ENTRY_2(op, size, p1, p2, flags) { OP_##op, size, 0, flags, { u64(p1), u64(p2) } },
-#define TEST_ENTRY_2F(op, size, p1, p2, iflags, flags) { OP_##op, size, iflags, flags, { u64(p1), u64(p2) } },
-#define TEST_ENTRY_3(op, size, p1, p2, p3, flags) { OP_##op, size, 0, flags, { u64(p1), u64(p2), u64(p3) } },
-#define TEST_ENTRY_3F(op, size, p1, p2, p3, iflags, flags) { OP_##op, size, iflags, flags, { u64(p1), u64(p2), u64(p3) } },
-#define TEST_ENTRY_4(op, size, p1, p2, p3, p4, flags) { OP_##op, size, 0, flags, { u64(p1), u64(p2), u64(p3), u64(p4) } },
-#define TEST_ENTRY_4F(op, size, p1, p2, p3, p4, iflags, flags) { OP_##op, size, iflags, flags, { u64(p1), u64(p2), u64(p3), u64(p4) } },
-
-static const bevalidate_test bevalidate_test_list[] =
-{
- TEST_ENTRY_3(ADD, 4, 0x7fffffff, 0x12345678, 0x6dcba987, 0)
- TEST_ENTRY_3(ADD, 4, 0x80000000, 0x12345678, 0x6dcba988, FLAG_V | FLAG_S)
- TEST_ENTRY_3(ADD, 4, 0xffffffff, 0x92345678, 0x6dcba987, FLAG_S)
- TEST_ENTRY_3(ADD, 4, 0x00000000, 0x92345678, 0x6dcba988, FLAG_C | FLAG_Z)
-
- TEST_ENTRY_3(ADD, 8, 0x7fffffffffffffff, 0x0123456789abcdef, 0x7edcba9876543210, 0)
- TEST_ENTRY_3(ADD, 8, 0x8000000000000000, 0x0123456789abcdef, 0x7edcba9876543211, FLAG_V | FLAG_S)
- TEST_ENTRY_3(ADD, 8, 0xffffffffffffffff, 0x8123456789abcdef, 0x7edcba9876543210, FLAG_S)
- TEST_ENTRY_3(ADD, 8, 0x0000000000000000, 0x8123456789abcdef, 0x7edcba9876543211, FLAG_C | FLAG_Z)
-
- TEST_ENTRY_3F(ADDC, 4, 0x7fffffff, 0x12345678, 0x6dcba987, 0, 0)
- TEST_ENTRY_3F(ADDC, 4, 0x7fffffff, 0x12345678, 0x6dcba986, FLAG_C, 0)
- TEST_ENTRY_3F(ADDC, 4, 0x80000000, 0x12345678, 0x6dcba988, 0, FLAG_V | FLAG_S)
- TEST_ENTRY_3F(ADDC, 4, 0x80000000, 0x12345678, 0x6dcba987, FLAG_C, FLAG_V | FLAG_S)
- TEST_ENTRY_3F(ADDC, 4, 0xffffffff, 0x92345678, 0x6dcba987, 0, FLAG_S)
- TEST_ENTRY_3F(ADDC, 4, 0xffffffff, 0x92345678, 0x6dcba986, FLAG_C, FLAG_S)
- TEST_ENTRY_3F(ADDC, 4, 0x00000000, 0x92345678, 0x6dcba988, 0, FLAG_C | FLAG_Z)
- TEST_ENTRY_3F(ADDC, 4, 0x00000000, 0x92345678, 0x6dcba987, FLAG_C, FLAG_C | FLAG_Z)
- TEST_ENTRY_3F(ADDC, 4, 0x12345678, 0x12345678, 0xffffffff, FLAG_C, FLAG_C)
-
- TEST_ENTRY_3F(ADDC, 8, 0x7fffffffffffffff, 0x0123456789abcdef, 0x7edcba9876543210, 0, 0)
- TEST_ENTRY_3F(ADDC, 8, 0x7fffffffffffffff, 0x0123456789abcdef, 0x7edcba987654320f, FLAG_C, 0)
- TEST_ENTRY_3F(ADDC, 8, 0x8000000000000000, 0x0123456789abcdef, 0x7edcba9876543211, 0, FLAG_V | FLAG_S)
- TEST_ENTRY_3F(ADDC, 8, 0x8000000000000000, 0x0123456789abcdef, 0x7edcba9876543210, FLAG_C, FLAG_V | FLAG_S)
- TEST_ENTRY_3F(ADDC, 8, 0xffffffffffffffff, 0x8123456789abcdef, 0x7edcba9876543210, 0, FLAG_S)
- TEST_ENTRY_3F(ADDC, 8, 0xffffffffffffffff, 0x8123456789abcdef, 0x7edcba987654320f, FLAG_C, FLAG_S)
- TEST_ENTRY_3F(ADDC, 8, 0x0000000000000000, 0x8123456789abcdef, 0x7edcba9876543211, 0, FLAG_C | FLAG_Z)
- TEST_ENTRY_3F(ADDC, 8, 0x0000000000000000, 0x8123456789abcdef, 0x7edcba9876543210, FLAG_C, FLAG_C | FLAG_Z)
- TEST_ENTRY_3F(ADDC, 8, 0x123456789abcdef0, 0x123456789abcdef0, 0xffffffffffffffff, FLAG_C, FLAG_C)
-
- TEST_ENTRY_3(SUB, 4, 0x12345678, 0x7fffffff, 0x6dcba987, 0)
- TEST_ENTRY_3(SUB, 4, 0x12345678, 0x80000000, 0x6dcba988, FLAG_V)
- TEST_ENTRY_3(SUB, 4, 0x92345678, 0xffffffff, 0x6dcba987, FLAG_S)
- TEST_ENTRY_3(SUB, 4, 0x92345678, 0x00000000, 0x6dcba988, FLAG_C | FLAG_S)
- TEST_ENTRY_3(SUB, 4, 0x00000000, 0x12345678, 0x12345678, FLAG_Z)
-
- TEST_ENTRY_3(SUB, 8, 0x0123456789abcdef, 0x7fffffffffffffff, 0x7edcba9876543210, 0)
- TEST_ENTRY_3(SUB, 8, 0x0123456789abcdef, 0x8000000000000000, 0x7edcba9876543211, FLAG_V)
- TEST_ENTRY_3(SUB, 8, 0x8123456789abcdef, 0xffffffffffffffff, 0x7edcba9876543210, FLAG_S)
- TEST_ENTRY_3(SUB, 8, 0x8123456789abcdef, 0x0000000000000000, 0x7edcba9876543211, FLAG_C | FLAG_S)
- TEST_ENTRY_3(SUB, 8, 0x0000000000000000, 0x0123456789abcdef, 0x0123456789abcdef, FLAG_Z)
-
- TEST_ENTRY_3F(SUBB, 4, 0x12345678, 0x7fffffff, 0x6dcba987, 0, 0)
- TEST_ENTRY_3F(SUBB, 4, 0x12345678, 0x7fffffff, 0x6dcba986, FLAG_C, 0)
- TEST_ENTRY_3F(SUBB, 4, 0x12345678, 0x80000000, 0x6dcba988, 0, FLAG_V)
- TEST_ENTRY_3F(SUBB, 4, 0x12345678, 0x80000000, 0x6dcba987, FLAG_C, FLAG_V)
- TEST_ENTRY_3F(SUBB, 4, 0x92345678, 0xffffffff, 0x6dcba987, 0, FLAG_S)
- TEST_ENTRY_3F(SUBB, 4, 0x92345678, 0xffffffff, 0x6dcba986, FLAG_C, FLAG_S)
- TEST_ENTRY_3F(SUBB, 4, 0x92345678, 0x00000000, 0x6dcba988, 0, FLAG_C | FLAG_S)
- TEST_ENTRY_3F(SUBB, 4, 0x92345678, 0x00000000, 0x6dcba987, FLAG_C, FLAG_C | FLAG_S)
- TEST_ENTRY_3F(SUBB, 4, 0x12345678, 0x12345678, 0xffffffff, FLAG_C, FLAG_C)
- TEST_ENTRY_3F(SUBB, 4, 0x00000000, 0x12345678, 0x12345677, FLAG_C, FLAG_Z)
-
- TEST_ENTRY_3F(SUBB, 8, 0x0123456789abcdef, 0x7fffffffffffffff, 0x7edcba9876543210, 0, 0)
- TEST_ENTRY_3F(SUBB, 8, 0x0123456789abcdef, 0x7fffffffffffffff, 0x7edcba987654320f, FLAG_C, 0)
- TEST_ENTRY_3F(SUBB, 8, 0x0123456789abcdef, 0x8000000000000000, 0x7edcba9876543211, 0, FLAG_V)
- TEST_ENTRY_3F(SUBB, 8, 0x0123456789abcdef, 0x8000000000000000, 0x7edcba9876543210, FLAG_C, FLAG_V)
- TEST_ENTRY_3F(SUBB, 8, 0x8123456789abcdef, 0xffffffffffffffff, 0x7edcba9876543210, 0, FLAG_S)
- TEST_ENTRY_3F(SUBB, 8, 0x8123456789abcdef, 0xffffffffffffffff, 0x7edcba987654320f, FLAG_C, FLAG_S)
- TEST_ENTRY_3F(SUBB, 8, 0x8123456789abcdef, 0x0000000000000000, 0x7edcba9876543211, 0, FLAG_C | FLAG_S)
- TEST_ENTRY_3F(SUBB, 8, 0x8123456789abcdef, 0x0000000000000000, 0x7edcba9876543210, FLAG_C, FLAG_C | FLAG_S)
- TEST_ENTRY_3F(SUBB, 8, 0x123456789abcdef0, 0x123456789abcdef0, 0xffffffffffffffff, FLAG_C, FLAG_C)
- TEST_ENTRY_3F(SUBB, 8, 0x0000000000000000, 0x123456789abcdef0, 0x123456789abcdeef, FLAG_C, FLAG_Z)
-
- TEST_ENTRY_2(CMP, 4, 0x7fffffff, 0x6dcba987, 0)
- TEST_ENTRY_2(CMP, 4, 0x80000000, 0x6dcba988, FLAG_V)
- TEST_ENTRY_2(CMP, 4, 0xffffffff, 0x6dcba987, FLAG_S)
- TEST_ENTRY_2(CMP, 4, 0x00000000, 0x6dcba988, FLAG_C | FLAG_S)
- TEST_ENTRY_2(CMP, 4, 0x12345678, 0x12345678, FLAG_Z)
-
- TEST_ENTRY_2(CMP, 8, 0x7fffffffffffffff, 0x7edcba9876543210, 0)
- TEST_ENTRY_2(CMP, 8, 0x8000000000000000, 0x7edcba9876543211, FLAG_V)
- TEST_ENTRY_2(CMP, 8, 0xffffffffffffffff, 0x7edcba9876543210, FLAG_S)
- TEST_ENTRY_2(CMP, 8, 0x0000000000000000, 0x7edcba9876543211, FLAG_C | FLAG_S)
- TEST_ENTRY_2(CMP, 8, 0x0123456789abcdef, 0x0123456789abcdef, FLAG_Z)
-
- TEST_ENTRY_4(MULU, 4, 0x77777777, 0x00000000, 0x11111111, 0x00000007, 0)
- TEST_ENTRY_4(MULU, 4, 0xffffffff, 0x00000000, 0x11111111, 0x0000000f, 0)
- TEST_ENTRY_4(MULU, 4, 0x00000000, 0x00000000, 0x11111111, 0x00000000, FLAG_Z)
- TEST_ENTRY_4(MULU, 4, 0xea61d951, 0x37c048d0, 0x77777777, 0x77777777, FLAG_V)
- TEST_ENTRY_4(MULU, 4, 0x32323233, 0xcdcdcdcc, 0xcdcdcdcd, 0xffffffff, FLAG_V | FLAG_S)
-
- TEST_ENTRY_4(MULU, 8, 0x7777777777777777, 0x0000000000000000, 0x1111111111111111, 0x0000000000000007, 0)
- TEST_ENTRY_4(MULU, 8, 0xffffffffffffffff, 0x0000000000000000, 0x1111111111111111, 0x000000000000000f, 0)
- TEST_ENTRY_4(MULU, 8, 0x0000000000000000, 0x0000000000000000, 0x1111111111111111, 0x0000000000000000, FLAG_Z)
- TEST_ENTRY_4(MULU, 8, 0x0c83fb72ea61d951, 0x37c048d159e26af3, 0x7777777777777777, 0x7777777777777777, FLAG_V)
- TEST_ENTRY_4(MULU, 8, 0x3232323232323233, 0xcdcdcdcdcdcdcdcc, 0xcdcdcdcdcdcdcdcd, 0xffffffffffffffff, FLAG_V | FLAG_S)
-
- TEST_ENTRY_4(MULS, 4, 0x77777777, 0x00000000, 0x11111111, 0x00000007, 0)
- TEST_ENTRY_4(MULS, 4, 0xffffffff, 0x00000000, 0x11111111, 0x0000000f, FLAG_V)
- TEST_ENTRY_4(MULS, 4, 0x00000000, 0x00000000, 0x11111111, 0x00000000, FLAG_Z)
- TEST_ENTRY_4(MULS, 4, 0x9e26af38, 0xc83fb72e, 0x77777777, 0x88888888, FLAG_V | FLAG_S)
- TEST_ENTRY_4(MULS, 4, 0x32323233, 0x00000000, 0xcdcdcdcd, 0xffffffff, 0)
-
- TEST_ENTRY_4(MULS, 8, 0x7777777777777777, 0x0000000000000000, 0x1111111111111111, 0x0000000000000007, 0)
- TEST_ENTRY_4(MULS, 8, 0xffffffffffffffff, 0x0000000000000000, 0x1111111111111111, 0x000000000000000f, FLAG_V)
- TEST_ENTRY_4(MULS, 8, 0x0000000000000000, 0x0000000000000000, 0x1111111111111111, 0x0000000000000000, FLAG_Z)
- TEST_ENTRY_4(MULS, 8, 0x7c048d159e26af38, 0xc83fb72ea61d950c, 0x7777777777777777, 0x8888888888888888, FLAG_V | FLAG_S)
- TEST_ENTRY_4(MULS, 8, 0x3232323232323233, 0x0000000000000000, 0xcdcdcdcdcdcdcdcd, 0xffffffffffffffff, 0)
-
- TEST_ENTRY_4(DIVU, 4, 0x02702702, 0x00000003, 0x11111111, 0x00000007, 0)
- TEST_ENTRY_4(DIVU, 4, 0x00000000, 0x11111111, 0x11111111, 0x11111112, FLAG_Z)
- TEST_ENTRY_4(DIVU, 4, 0x7fffffff, 0x00000000, 0xfffffffe, 0x00000002, 0)
- TEST_ENTRY_4(DIVU, 4, 0xfffffffe, 0x00000000, 0xfffffffe, 0x00000001, FLAG_S)
- TEST_ENTRY_4(DIVU, 4, UNDEFINED, UNDEFINED, 0xffffffff, 0x00000000, FLAG_V)
-
- TEST_ENTRY_4(DIVU, 8, 0x0270270270270270, 0x0000000000000001, 0x1111111111111111, 0x0000000000000007, 0)
- TEST_ENTRY_4(DIVU, 8, 0x0000000000000000, 0x1111111111111111, 0x1111111111111111, 0x1111111111111112, FLAG_Z)
- TEST_ENTRY_4(DIVU, 8, 0x7fffffffffffffff, 0x0000000000000000, 0xfffffffffffffffe, 0x0000000000000002, 0)
- TEST_ENTRY_4(DIVU, 8, 0xfffffffffffffffe, 0x0000000000000000, 0xfffffffffffffffe, 0x0000000000000001, FLAG_S)
- TEST_ENTRY_4(DIVU, 8, UNDEFINED, UNDEFINED, 0xffffffffffffffff, 0x0000000000000000, FLAG_V)
-
- TEST_ENTRY_4(DIVS, 4, 0x02702702, 0x00000003, 0x11111111, 0x00000007, 0)
- TEST_ENTRY_4(DIVS, 4, 0x00000000, 0x11111111, 0x11111111, 0x11111112, FLAG_Z)
- TEST_ENTRY_4(DIVS, 4, 0xffffffff, 0x00000000, 0xfffffffe, 0x00000002, FLAG_S)
- TEST_ENTRY_4(DIVS, 4, UNDEFINED, UNDEFINED, 0xffffffff, 0x00000000, FLAG_V)
-
- TEST_ENTRY_4(DIVS, 8, 0x0270270270270270, 0x0000000000000001, 0x1111111111111111, 0x0000000000000007, 0)
- TEST_ENTRY_4(DIVS, 8, 0x0000000000000000, 0x1111111111111111, 0x1111111111111111, 0x1111111111111112, FLAG_Z)
- TEST_ENTRY_4(DIVS, 8, 0xffffffffffffffff, 0x0000000000000000, 0xfffffffffffffffe, 0x0000000000000002, FLAG_S)
- TEST_ENTRY_4(DIVS, 8, UNDEFINED, UNDEFINED, 0xffffffffffffffff, 0x0000000000000000, FLAG_V)
-};
-
-
-/*-------------------------------------------------
- validate_backend - execute a number of
- generic tests on the backend code generator
--------------------------------------------------*/
-
-static void validate_backend(drcuml_state *drcuml)
-{
- uml::code_handle *handles[3];
- int tnum;
-
- // allocate handles for the code
- handles[0] = drcuml->handle_alloc("test_entry");
- handles[1] = drcuml->handle_alloc("code_start");
- handles[2] = drcuml->handle_alloc("code_end");
-
- // iterate over test entries
- printf("Backend validation....\n");
- for (tnum = 31; tnum < std::size(bevalidate_test_list); tnum++)
- {
- const bevalidate_test *test = &bevalidate_test_list[tnum];
- parameter param[std::size(test->param)];
- char mnemonic[20], *dst;
- const char *src;
-
- // progress
- dst = mnemonic;
- for (src = opcode_info_table[test->opcode()]->mnemonic; *src != 0; src++)
- {
- if (*src == '!')
- {
- if (test->size == 8)
- *dst++ = 'd';
- }
- else if (*src == '#')
- *dst++ = (test->size == 8) ? 'd' : 's';
- else
- *dst++ = *src;
- }
- *dst = 0;
- printf("Executing test %d/%d (%s)", tnum + 1, (int)std::size(bevalidate_test_list), mnemonic);
-
- // reset parameter list and iterate
- memset(param, 0, sizeof(param));
- bevalidate_iterate_over_params(drcuml, handles, test, param, 0);
- printf("\n");
- }
- fatalerror("All tests passed!\n");
-}
-
-
-/*-------------------------------------------------
- bevalidate_iterate_over_params - iterate over
- all supported types and values of a parameter
- and recursively hand off to the next parameter,
- or else move on to iterate over the flags
--------------------------------------------------*/
-
-static void bevalidate_iterate_over_params(drcuml_state *drcuml, uml::code_handle **handles, const bevalidate_test *test, parameter *paramlist, int pnum)
-{
- const opcode_info *opinfo = opcode_info_table[test->opcode()];
- drcuml_ptype ptype;
-
- // if no parameters, execute now
- if (pnum >= std::size(opinfo->param) || opinfo->param[pnum].typemask == PTYPES_NONE)
- {
- bevalidate_iterate_over_flags(drcuml, handles, test, paramlist);
- return;
- }
-
- // iterate over valid parameter types
- for (ptype = parameter::PTYPE_IMMEDIATE; ptype < parameter::PTYPE_MAX; ptype++)
- if (opinfo->param[pnum].typemask & (1 << ptype))
- {
- int pindex, pcount;
-
- // mapvars can only do 32-bit tests
- if (ptype == parameter::PTYPE_MAPVAR && effective_test_psize(opinfo, pnum, test->size, test->param) == 8)
- continue;
-
- // for some parameter types, we wish to iterate over all possibilities
- switch (ptype)
- {
- case parameter::PTYPE_INT_REGISTER: pcount = REG_I_END - REG_I0; break;
- case parameter::PTYPE_FLOAT_REGISTER: pcount = REG_F_END - REG_F0; break;
- default: pcount = 1; break;
- }
-
- // iterate over possibilities
- for (pindex = 0; pindex < pcount; pindex++)
- {
- bool skip = false;
- int pscannum;
-
- // for param 0, print a dot
- if (pnum == 0)
- printf(".");
-
- // can't duplicate multiple source parameters unless they are immediates
- if (ptype != parameter::PTYPE_IMMEDIATE && (opinfo->param[pnum].output & PIO_IN))
-
- // loop over all parameters we've done before; if the parameter is a source and matches us, skip this case
- for (pscannum = 0; pscannum < pnum; pscannum++)
- if ((opinfo->param[pscannum].output & PIO_IN) && ptype == paramlist[pscannum].type && pindex == paramlist[pscannum].value)
- skip = true;
-
- // can't duplicate multiple dest parameters
- if (opinfo->param[pnum].output & PIO_OUT)
-
- // loop over all parameters we've done before; if the parameter is a source and matches us, skip this case
- for (pscannum = 0; pscannum < pnum; pscannum++)
- if ((opinfo->param[pscannum].output & PIO_OUT) && ptype == paramlist[pscannum].type && pindex == paramlist[pscannum].value)
- skip = true;
-
- // iterate over the next parameter in line
- if (!skip)
- {
- paramlist[pnum].type = ptype;
- paramlist[pnum].value = pindex;
- bevalidate_iterate_over_params(drcuml, handles, test, paramlist, pnum + 1);
- }
- }
- }
-}
-
-
-/*-------------------------------------------------
- bevalidate_iterate_over_flags - iterate over
- all supported flag masks
--------------------------------------------------*/
-
-static void bevalidate_iterate_over_flags(drcuml_state *drcuml, uml::code_handle **handles, const bevalidate_test *test, parameter *paramlist)
-{
- const opcode_info *opinfo = opcode_info_table[test->opcode()];
- uint8_t flagmask = opinfo->outflags;
- uint8_t curmask;
-
- // iterate over all possible flag combinations
- for (curmask = 0; curmask <= flagmask; curmask++)
- if ((curmask & flagmask) == curmask)
- bevalidate_execute(drcuml, handles, test, paramlist, curmask);
-}
-
-
-/*-------------------------------------------------
- bevalidate_execute - execute a single instance
- of a test, generating code and verifying the
- results
--------------------------------------------------*/
-
-static void bevalidate_execute(drcuml_state *drcuml, uml::code_handle **handles, const bevalidate_test *test, const parameter *paramlist, uint8_t flagmask)
-{
- parameter params[std::size(test->param)];
- drcuml_machine_state istate, fstate;
- instruction testinst;
- drcuml_block *block;
- uint64_t *parammem;
- int numparams;
-
- // allocate memory for parameters
- parammem = (uint64_t *)drcuml->cache->alloc_near(sizeof(uint64_t) * (std::size(test->param) + 1));
-
- // flush the cache
- drcuml->reset();
-
- // start a new block
- block = drcuml->block_begin(30);
- UML_HANDLE(block, handles[0]);
-
- // set up a random initial state
- bevalidate_initialize_random_state(drcuml, block, &istate);
-
- // then populate the state with the parameters
- numparams = bevalidate_populate_state(block, &istate, test, paramlist, params, parammem);
-
- // generate the code
- UML_RESTORE(block, &istate);
- UML_HANDLE(block, handles[1]);
- switch (numparams)
- {
- case 0:
- block->append(test->opcode(), test->size);
- break;
-
- case 1:
- block->append(test->opcode(), test->size, params[0]);
- break;
-
- case 2:
- block->append(test->opcode(), test->size, params[0], params[1]);
- break;
-
- case 3:
- block->append(test->opcode(), test->size, params[0], params[1], params[2]);
- break;
-
- case 4:
- block->append(test->opcode(), test->size, params[0], params[1], params[2], params[3]);
- break;
- }
- testinst = block->inst[block->nextinst - 1];
- UML_HANDLE(block, handles[2]);
- UML_GETFLGS(block, MEM(&parammem[std::size(test->param)]), flagmask);
- UML_SAVE(block, &fstate);
- UML_EXIT(block, IMM(0));
-
- // end the block
- block->end();
-
- // execute
- drcuml->execute(*handles[0]);
-
- // verify the results
- bevalidate_verify_state(drcuml, &istate, &fstate, test, *(uint32_t *)&parammem[std::size(test->param)], params, &testinst, handles[1]->code, handles[2]->code, flagmask);
-
- // free memory
- drcuml->cache->dealloc(parammem, sizeof(uint64_t) * (std::size(test->param) + 1));
-}
-
-
-/*-------------------------------------------------
- bevalidate_initialize_random_state -
- initialize the machine state to randomness
--------------------------------------------------*/
-
-static void bevalidate_initialize_random_state(drcuml_state *drcuml, drcuml_block *block, drcuml_machine_state *state)
-{
- running_machine &machine = drcuml->device->machine();
- int regnum;
-
- // initialize core state to random values
- state->fmod = machine.rand() & 0x03;
- state->flags = machine.rand() & 0x1f;
- state->exp = machine.rand();
-
- // initialize integer registers to random values
- for (regnum = 0; regnum < std::size(state->r); regnum++)
- {
- state->r[regnum].w.h = machine.rand();
- state->r[regnum].w.l = machine.rand();
- }
-
- // initialize float registers to random values
- for (regnum = 0; regnum < std::size(state->f); regnum++)
- {
- *(uint32_t *)&state->f[regnum].s.h = machine.rand();
- *(uint32_t *)&state->f[regnum].s.l = machine.rand();
- }
-
- // initialize map variables to random values
- for (regnum = 0; regnum < MAPVAR_COUNT; regnum++)
- UML_MAPVAR(block, MVAR(regnum), machine.rand());
-}
-
-
-/*-------------------------------------------------
- bevalidate_populate_state - populate the
- machine state with the proper values prior
- to executing a test
--------------------------------------------------*/
-
-static int bevalidate_populate_state(drcuml_block *block, drcuml_machine_state *state, const bevalidate_test *test, const parameter *paramlist, parameter *params, uint64_t *parammem)
-{
- const opcode_info *opinfo = opcode_info_table[test->opcode()];
- int numparams = std::size(test->param);
- int pnum;
-
- // copy flags as-is
- state->flags = test->iflags;
-
- // iterate over parameters
- for (pnum = 0; pnum < std::size(test->param); pnum++)
- {
- int psize = effective_test_psize(opinfo, pnum, test->size, test->param);
- parameter *curparam = &params[pnum];
-
- // start with a copy of the parameter from the list
- *curparam = paramlist[pnum];
-
- // switch off the type
- switch (curparam->type)
- {
- // immediate parameters: take the value from the test entry
- case parameter::PTYPE_IMMEDIATE:
- curparam->value = test->param[pnum];
- break;
-
- // register parameters: set the register value in the state and set the parameter value to the register index
- case parameter::PTYPE_INT_REGISTER:
- state->r[curparam->value].d = test->param[pnum];
- curparam->value += REG_I0;
- break;
-
- // register parameters: set the register value in the state and set the parameter value to the register index
- case parameter::PTYPE_FLOAT_REGISTER:
- state->f[curparam->value].d = test->param[pnum];
- curparam->value += REG_F0;
- break;
-
- // memory parameters: set the memory value in the parameter space and set the parameter value to point to it
- case parameter::PTYPE_MEMORY:
- curparam->value = (uintptr_t)&parammem[pnum];
- if (psize == 4)
- *(uint32_t *)(uintptr_t)curparam->value = test->param[pnum];
- else
- *(uint64_t *)(uintptr_t)curparam->value = test->param[pnum];
- break;
-
- // map variables: issue a MAPVAR instruction to set the value and set the parameter value to the mapvar index
- case parameter::PTYPE_MAPVAR:
- UML_MAPVAR(block, MVAR(curparam->value), test->param[pnum]);
- curparam->value += MAPVAR_M0;
- break;
-
- // use anything else to count the number of parameters
- default:
- numparams = MIN(numparams, pnum);
- break;
- }
- }
-
- // return the total number of parameters
- return numparams;
-}
-
-
-/*-------------------------------------------------
- bevalidate_verify_state - verify the final
- state after executing a test, and report any
- discrepancies
--------------------------------------------------*/
-
-static int bevalidate_verify_state(drcuml_state *drcuml, const drcuml_machine_state *istate, drcuml_machine_state *state, const bevalidate_test *test, uint32_t flags, const parameter *params, const instruction *testinst, drccodeptr codestart, drccodeptr codeend, uint8_t flagmask)
-{
- const opcode_info *opinfo = opcode_info_table[test->opcode()];
- uint8_t ireg[REG_I_END - REG_I0] = { 0 };
- uint8_t freg[REG_F_END - REG_F0] = { 0 };
- char errorbuf[1024];
- char *errend = errorbuf;
- int pnum, regnum;
-
- *errend = 0;
-
- // check flags
- if (flags != (test->flags & flagmask))
- {
- errend += sprintf(errend, " Flags ... result:%c%c%c%c%c expected:%c%c%c%c%c\n",
- (flagmask & FLAG_U) ? ((flags & FLAG_U) ? 'U' : '.') : '-',
- (flagmask & FLAG_S) ? ((flags & FLAG_S) ? 'S' : '.') : '-',
- (flagmask & FLAG_Z) ? ((flags & FLAG_Z) ? 'Z' : '.') : '-',
- (flagmask & FLAG_V) ? ((flags & FLAG_V) ? 'V' : '.') : '-',
- (flagmask & FLAG_C) ? ((flags & FLAG_C) ? 'C' : '.') : '-',
- (flagmask & FLAG_U) ? ((test->flags & FLAG_U) ? 'U' : '.') : '-',
- (flagmask & FLAG_S) ? ((test->flags & FLAG_S) ? 'S' : '.') : '-',
- (flagmask & FLAG_Z) ? ((test->flags & FLAG_Z) ? 'Z' : '.') : '-',
- (flagmask & FLAG_V) ? ((test->flags & FLAG_V) ? 'V' : '.') : '-',
- (flagmask & FLAG_C) ? ((test->flags & FLAG_C) ? 'C' : '.') : '-');
- }
-
- // check destination parameters
- for (pnum = 0; pnum < std::size(test->param); pnum++)
- if (opinfo->param[pnum].output & PIO_OUT)
- {
- int psize = effective_test_psize(opinfo, pnum, test->size, test->param);
- uint64_t mask = u64(0xffffffffffffffff) >> (64 - 8 * psize);
- uint64_t result = 0;
-
- // fetch the result from the parameters
- switch (params[pnum].type)
- {
- // integer registers fetch from the state
- case parameter::PTYPE_INT_REGISTER:
- ireg[params[pnum].value - REG_I0] = 1;
- result = state->r[params[pnum].value - REG_I0].d;
- break;
-
- // float registers fetch from the state
- case parameter::PTYPE_FLOAT_REGISTER:
- freg[params[pnum].value - REG_I0] = 1;
- result = state->f[params[pnum].value - REG_F0].d;
- break;
-
- // memory registers fetch from the memory address
- case parameter::PTYPE_MEMORY:
- if (psize == 4)
- result = *(uint32_t *)(uintptr_t)params[pnum].value;
- else
- result = *(uint64_t *)(uintptr_t)params[pnum].value;
- break;
-
- default:
- break;
- }
-
- // check against the mask
- if (test->param[pnum] != UNDEFINED_U64 && (result & mask) != (test->param[pnum] & mask))
- {
- if ((uint32_t)mask == mask)
- errend += sprintf(errend, " Parameter %d ... result:%08X expected:%08X\n", pnum,
- (uint32_t)(result & mask), (uint32_t)(test->param[pnum] & mask));
- else
- errend += sprintf(errend, " Parameter %d ... result:%08X%08X expected:%08X%08X\n", pnum,
- (uint32_t)((result & mask) >> 32), (uint32_t)(result & mask),
- (uint32_t)((test->param[pnum] & mask) >> 32), (uint32_t)(test->param[pnum] & mask));
- }
- }
-
- // check source integer parameters for unexpected alterations
- for (regnum = 0; regnum < std::size(state->r); regnum++)
- if (ireg[regnum] == 0 && istate->r[regnum].d != state->r[regnum].d)
- errend += sprintf(errend, " Register i%d ... result:%08X%08X originally:%08X%08X\n", regnum,
- (uint32_t)(state->r[regnum].d >> 32), (uint32_t)state->r[regnum].d,
- (uint32_t)(istate->r[regnum].d >> 32), (uint32_t)istate->r[regnum].d);
-
- // check source float parameters for unexpected alterations
- for (regnum = 0; regnum < std::size(state->f); regnum++)
- if (freg[regnum] == 0 && *(uint64_t *)&istate->f[regnum].d != *(uint64_t *)&state->f[regnum].d)
- errend += sprintf(errend, " Register f%d ... result:%08X%08X originally:%08X%08X\n", regnum,
- (uint32_t)(*(uint64_t *)&state->f[regnum].d >> 32), (uint32_t)*(uint64_t *)&state->f[regnum].d,
- (uint32_t)(*(uint64_t *)&istate->f[regnum].d >> 32), (uint32_t)*(uint64_t *)&istate->f[regnum].d);
-
- // output the error if we have one
- if (errend != errorbuf)
- {
- // disassemble the test instruction
- std::string disasm = testinst->disasm(drcuml);
-
- // output a description of what went wrong
- printf("\n");
- printf("----------------------------------------------\n");
- printf("Backend validation error:\n");
- printf(" %s\n", disasm.c_str());
- printf("\n");
- printf("Errors:\n");
- printf("%s\n", errorbuf);
- fatalerror("Error during validation\n");
- }
- return errend != errorbuf;
-}
-
-#endif
diff --git a/src/devices/cpu/drcuml.h b/src/devices/cpu/drcuml.h
index 81ef59d0f4d..acc864a5201 100644
--- a/src/devices/cpu/drcuml.h
+++ b/src/devices/cpu/drcuml.h
@@ -136,9 +136,9 @@ public:
virtual void reset() = 0;
virtual int execute(uml::code_handle &entry) = 0;
virtual void generate(drcuml_block &block, uml::instruction const *instlist, u32 numinst) = 0;
- virtual bool hash_exists(u32 mode, u32 pc) = 0;
- virtual void get_info(drcbe_info &info) = 0;
- virtual bool logging() const { return false; }
+ virtual bool hash_exists(u32 mode, u32 pc) const noexcept = 0;
+ virtual void get_info(drcbe_info &info) const noexcept = 0;
+ virtual bool logging() const noexcept { return false; }
protected:
// base constructor
@@ -150,7 +150,6 @@ protected:
device_t & m_device; // CPU device we are associated with
std::vector<address_space *> m_space; // pointers to CPU's address space
drcuml_machine_state & m_state; // state of the machine (in near cache)
- data_accessors * m_accessors; // memory accessors (in near cache)
};
@@ -174,8 +173,8 @@ public:
drcuml_block &begin_block(u32 maxinst);
// back-end interface
- void get_backend_info(drcbe_info &info) { m_beintf->get_info(info); }
- bool hash_exists(u32 mode, u32 pc) { return m_beintf->hash_exists(mode, pc); }
+ void get_backend_info(drcbe_info &info) const { m_beintf->get_info(info); }
+ bool hash_exists(u32 mode, u32 pc) const { return m_beintf->hash_exists(mode, pc); }
void generate(drcuml_block &block, uml::instruction *instructions, u32 count) { m_beintf->generate(block, instructions, count); }
// handle management
diff --git a/src/devices/cpu/drcumlsh.h b/src/devices/cpu/drcumlsh.h
index 5dec2d02dba..6d6edf5921d 100644
--- a/src/devices/cpu/drcumlsh.h
+++ b/src/devices/cpu/drcumlsh.h
@@ -29,6 +29,7 @@
/* ----- Control Flow Operations ----- */
#define UML_NOP(block) do { using namespace uml; block.append().nop(); } while (0)
+#define UML_BREAK(block) do { using namespace uml; block.append().break_(); } while (0)
#define UML_DEBUG(block, pc) do { using namespace uml; block.append().debug(pc); } while (0)
#define UML_EXIT(block, param) do { using namespace uml; block.append().exit(param); } while (0)
#define UML_EXITc(block, cond, param) do { using namespace uml; block.append().exit(param, cond); } while (0)
@@ -53,6 +54,7 @@
#define UML_GETFMOD(block, dst) do { using namespace uml; block.append().getfmod(dst); } while (0)
#define UML_GETEXP(block, dst) do { using namespace uml; block.append().getexp(dst); } while (0)
#define UML_GETFLGS(block, dst, flags) do { using namespace uml; block.append().getflgs(dst, flags); } while (0)
+#define UML_SETFLGS(block, flags) do { using namespace uml; block.append().setflgs(flags); } while (0)
#define UML_SAVE(block, dst) do { using namespace uml; block.append().save(dst); } while (0)
#define UML_RESTORE(block, src) do { using namespace uml; block.append().restore(src); } while (0)
@@ -61,10 +63,10 @@
#define UML_LOAD(block, dst, base, index, size, scale) do { using namespace uml; block.append().load(dst, base, index, size, scale); } while (0)
#define UML_LOADS(block, dst, base, index, size, scale) do { using namespace uml; block.append().loads(dst, base, index, size, scale); } while (0)
#define UML_STORE(block, base, index, src1, size, scale) do { using namespace uml; block.append().store(base, index, src1, size, scale); } while (0)
-#define UML_READ(block, dst, src1, size, space) do { using namespace uml; block.append().read(dst, src1, size, space); } while (0)
-#define UML_READM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().readm(dst, src1, mask, size, space); } while (0)
-#define UML_WRITE(block, dst, src1, size, space) do { using namespace uml; block.append().write(dst, src1, size, space); } while (0)
-#define UML_WRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().writem(dst, src1, mask, size, space); } while (0)
+#define UML_READ(block, dst, addr, size, space) do { using namespace uml; block.append().read(dst, addr, size, space); } while (0)
+#define UML_READM(block, dst, addr, mask, size, space) do { using namespace uml; block.append().readm(dst, addr, mask, size, space); } while (0)
+#define UML_WRITE(block, addr, src1, size, space) do { using namespace uml; block.append().write(addr, src1, size, space); } while (0)
+#define UML_WRITEM(block, addr, src1, mask, size, space) do { using namespace uml; block.append().writem(addr, src1, mask, size, space); } while (0)
#define UML_CARRY(block, src, bitnum) do { using namespace uml; block.append().carry(src, bitnum); } while (0)
#define UML_SETc(block, cond, dst) do { using namespace uml; block.append().set(cond, dst); } while (0)
#define UML_MOV(block, dst, src1) do { using namespace uml; block.append().mov(dst, src1); } while (0)
@@ -78,7 +80,9 @@
#define UML_SUBB(block, dst, src1, src2) do { using namespace uml; block.append().subb(dst, src1, src2); } while (0)
#define UML_CMP(block, src1, src2) do { using namespace uml; block.append().cmp(src1, src2); } while (0)
#define UML_MULU(block, dst, edst, src1, src2) do { using namespace uml; block.append().mulu(dst, edst, src1, src2); } while (0)
+#define UML_MULULW(block, dst, src1, src2) do { using namespace uml; block.append().mululw(dst, src1, src2); } while (0)
#define UML_MULS(block, dst, edst, src1, src2) do { using namespace uml; block.append().muls(dst, edst, src1, src2); } while (0)
+#define UML_MULSLW(block, dst, src1, src2) do { using namespace uml; block.append().mulslw(dst, src1, src2); } while (0)
#define UML_DIVU(block, dst, edst, src1, src2) do { using namespace uml; block.append().divu(dst, edst, src1, src2); } while (0)
#define UML_DIVS(block, dst, edst, src1, src2) do { using namespace uml; block.append().divs(dst, edst, src1, src2); } while (0)
#define UML_AND(block, dst, src1, src2) do { using namespace uml; block.append()._and(dst, src1, src2); } while (0)
@@ -101,10 +105,10 @@
#define UML_DLOAD(block, dst, base, index, size, scale) do { using namespace uml; block.append().dload(dst, base, index, size, scale); } while (0)
#define UML_DLOADS(block, dst, base, index, size, scale) do { using namespace uml; block.append().dloads(dst, base, index, size, scale); } while (0)
#define UML_DSTORE(block, base, index, src1, size, scale) do { using namespace uml; block.append().dstore(base, index, src1, size, scale); } while (0)
-#define UML_DREAD(block, dst, src1, size, space) do { using namespace uml; block.append().dread(dst, src1, size, space); } while (0)
-#define UML_DREADM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().dreadm(dst, src1, mask, size, space); } while (0)
-#define UML_DWRITE(block, dst, src1, size, space) do { using namespace uml; block.append().dwrite(dst, src1, size, space); } while (0)
-#define UML_DWRITEM(block, dst, src1, mask, size, space) do { using namespace uml; block.append().dwritem(dst, src1, mask, size, space); } while (0)
+#define UML_DREAD(block, dst, addr, size, space) do { using namespace uml; block.append().dread(dst, addr, size, space); } while (0)
+#define UML_DREADM(block, dst, addr, mask, size, space) do { using namespace uml; block.append().dreadm(dst, addr, mask, size, space); } while (0)
+#define UML_DWRITE(block, addr, src1, size, space) do { using namespace uml; block.append().dwrite(addr, src1, size, space); } while (0)
+#define UML_DWRITEM(block, addr, src1, mask, size, space) do { using namespace uml; block.append().dwritem(addr, src1, mask, size, space); } while (0)
#define UML_DCARRY(block, src, bitnum) do { using namespace uml; block.append().dcarry(src, bitnum); } while (0)
#define UML_DSETc(block, cond, dst) do { using namespace uml; block.append().dset(cond, dst); } while (0)
#define UML_DMOV(block, dst, src1) do { using namespace uml; block.append().dmov(dst, src1); } while (0)
@@ -118,7 +122,9 @@
#define UML_DSUBB(block, dst, src1, src2) do { using namespace uml; block.append().dsubb(dst, src1, src2); } while (0)
#define UML_DCMP(block, src1, src2) do { using namespace uml; block.append().dcmp(src1, src2); } while (0)
#define UML_DMULU(block, dst, edst, src1, src2) do { using namespace uml; block.append().dmulu(dst, edst, src1, src2); } while (0)
+#define UML_DMULULW(block, dst, src1, src2) do { using namespace uml; block.append().dmululw(dst, src1, src2); } while (0)
#define UML_DMULS(block, dst, edst, src1, src2) do { using namespace uml; block.append().dmuls(dst, edst, src1, src2); } while (0)
+#define UML_DMULSLW(block, dst, src1, src2) do { using namespace uml; block.append().dmulslw(dst, src1, src2); } while (0)
#define UML_DDIVU(block, dst, edst, src1, src2) do { using namespace uml; block.append().ddivu(dst, edst, src1, src2); } while (0)
#define UML_DDIVS(block, dst, edst, src1, src2) do { using namespace uml; block.append().ddivs(dst, edst, src1, src2); } while (0)
#define UML_DAND(block, dst, src1, src2) do { using namespace uml; block.append().dand(dst, src1, src2); } while (0)
@@ -140,8 +146,8 @@
/* ----- 32-bit Floating Point Arithmetic Operations ----- */
#define UML_FSLOAD(block, dst, base, index) do { using namespace uml; block.append().fsload(dst, base, index); } while (0)
#define UML_FSSTORE(block, base, index, src1) do { using namespace uml; block.append().fsstore(base, index, src1); } while (0)
-#define UML_FSREAD(block, dst, src1, space) do { using namespace uml; block.append().fsread(dst, src1, AS_##space); } while (0)
-#define UML_FSWRITE(block, dst, src1, space) do { using namespace uml; block.append().fswrite(dst, src1, AS_##space); } while (0)
+#define UML_FSREAD(block, dst, addr, space) do { using namespace uml; block.append().fsread(dst, addr, space); } while (0)
+#define UML_FSWRITE(block, addr, src1, space) do { using namespace uml; block.append().fswrite(addr, src1, space); } while (0)
#define UML_FSMOV(block, dst, src1) do { using namespace uml; block.append().fsmov(dst, src1); } while (0)
#define UML_FSMOVc(block, cond, dst, src1) do { using namespace uml; block.append().fsmov(cond, dst, src1); } while (0)
#define UML_FSTOINT(block, dst, src1, size, round) do { using namespace uml; block.append().fstoint(dst, src1, size, round); } while (0)
@@ -164,8 +170,8 @@
/* ----- 64-bit Floating Point Arithmetic Operations ----- */
#define UML_FDLOAD(block, dst, base, index) do { using namespace uml; block.append().fdload(dst, base, index); } while (0)
#define UML_FDSTORE(block, base, index, src1) do { using namespace uml; block.append().fdstore(base, index, src1); } while (0)
-#define UML_FDREAD(block, dst, src1, space) do { using namespace uml; block.append().fdread(dst, src1, AS_##space); } while (0)
-#define UML_FDWRITE(block, dst, src1, space) do { using namespace uml; block.append().fdwrite(dst, src1, AS_##space); } while (0)
+#define UML_FDREAD(block, dst, addr, space) do { using namespace uml; block.append().fdread(dst, addr, space); } while (0)
+#define UML_FDWRITE(block, addr, src1, space) do { using namespace uml; block.append().fdwrite(addr, src1, space); } while (0)
#define UML_FDMOV(block, dst, src1) do { using namespace uml; block.append().fdmov(dst, src1); } while (0)
#define UML_FDMOVc(block, cond, dst, src1) do { using namespace uml; block.append().fdmov(cond, dst, src1); } while (0)
#define UML_FDTOINT(block, dst, src1, size, round) do { using namespace uml; block.append().fdtoint(dst, src1, size, round); } while (0)
diff --git a/src/devices/cpu/dsp16/dsp16.cpp b/src/devices/cpu/dsp16/dsp16.cpp
index dadd93d07cb..288c52d1fe8 100644
--- a/src/devices/cpu/dsp16/dsp16.cpp
+++ b/src/devices/cpu/dsp16/dsp16.cpp
@@ -638,7 +638,7 @@ void dsp16_device_base::program_map(address_map &map)
template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_some_rom()
{
- assert(bool(machine().debug_flags & DEBUG_FLAG_ENABLED) == Debugger);
+ assert(debugger_enabled() == Debugger);
for (bool mode_change = false; !mode_change && m_core->icount_remaining(); m_core->decrement_icount())
{
assert((cache::LOAD == m_cache_mode) == Caching);
@@ -1127,7 +1127,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so
template <bool Debugger> inline void dsp16_device_base::execute_some_cache()
{
- assert(bool(machine().debug_flags & DEBUG_FLAG_ENABLED) == Debugger);
+ assert(debugger_enabled() == Debugger);
for (bool mode_change = false; !mode_change && m_core->icount_remaining(); m_core->decrement_icount())
{
u16 const op(m_cache[m_cache_ptr]);
diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h
index f23477ed10b..f513e3fdceb 100644
--- a/src/devices/cpu/dsp16/dsp16.h
+++ b/src/devices/cpu/dsp16/dsp16.h
@@ -75,14 +75,13 @@ protected:
address_map_constructor &&data_map);
// device_t implementation
- virtual void device_start() override;
- virtual void device_stop() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) >> 1; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles << 1; }
- virtual u32 execute_input_lines() const noexcept override { return 5U; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -180,7 +179,7 @@ private:
using recompiler_ptr = std::unique_ptr<recompiler>;
// internal address maps
- void program_map(address_map &map);
+ void program_map(address_map &map) ATTR_COLD;
// instruction execution
template <bool Debugger, bool Caching> void execute_some_rom();
@@ -348,7 +347,7 @@ protected:
virtual void external_memory_enable(address_space &space, bool enable) override;
// internal address maps
- void data_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
private:
required_region_ptr<u16> m_rom;
@@ -366,7 +365,7 @@ protected:
virtual void external_memory_enable(address_space &space, bool enable) override;
// internal address maps
- void data_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
private:
required_region_ptr<u16> m_rom;
diff --git a/src/devices/cpu/dsp32/dsp32.cpp b/src/devices/cpu/dsp32/dsp32.cpp
index 2341cdf4f0c..d75b62e5acd 100644
--- a/src/devices/cpu/dsp32/dsp32.cpp
+++ b/src/devices/cpu/dsp32/dsp32.cpp
@@ -553,17 +553,6 @@ uint32_t dsp32c_device::execute_max_cycles() const noexcept
}
-//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t dsp32c_device::execute_input_lines() const noexcept
-{
- return 2;
-}
-
-
void dsp32c_device::execute_set_input(int inputnum, int state)
{
}
@@ -574,6 +563,7 @@ void dsp32c_device::execute_run()
// skip if halted
if ((m_pcr & PCR_RESET) == 0)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/dsp32/dsp32.h b/src/devices/cpu/dsp32/dsp32.h
index 90ede0181fa..4f9f3f9bdf9 100644
--- a/src/devices/cpu/dsp32/dsp32.h
+++ b/src/devices/cpu/dsp32/dsp32.h
@@ -103,13 +103,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/dsp56000/dsp56000.h b/src/devices/cpu/dsp56000/dsp56000.h
index 0a47b2fe078..5f991419af9 100644
--- a/src/devices/cpu/dsp56000/dsp56000.h
+++ b/src/devices/cpu/dsp56000/dsp56000.h
@@ -12,15 +12,14 @@ protected:
dsp56000_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock);
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 2); }
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 16; }
- virtual u32 execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/dsp56156/dsp56156.cpp b/src/devices/cpu/dsp56156/dsp56156.cpp
index 1ead0838621..42b5e3c0a69 100644
--- a/src/devices/cpu/dsp56156/dsp56156.cpp
+++ b/src/devices/cpu/dsp56156/dsp56156.cpp
@@ -250,8 +250,6 @@ void dsp56156_device::alu_init()
void dsp56156_device::device_start()
{
- memset(&m_core, 0, sizeof(m_core));
-
m_core.device = this;
m_core.program_ram = m_program_ram;
@@ -263,7 +261,7 @@ void dsp56156_device::device_start()
/* HACK - You're not in bootstrap mode upon bootup */
m_core.bootstrap_mode = BOOTSTRAP_OFF;
- /* Clear the irq states */
+ /* Clear the IRQ states */
m_core.modA_state = false;
m_core.modB_state = false;
m_core.modC_state = false;
@@ -465,6 +463,7 @@ void dsp56156_device::execute_run()
/* If reset line is asserted, do nothing */
if (m_core.reset_state)
{
+ debugger_wait_hook();
m_core.icount = 0;
return;
}
@@ -472,6 +471,7 @@ void dsp56156_device::execute_run()
/* HACK - if you're in bootstrap mode, simply pretend you ate up all your cycles waiting for data. */
if (m_core.bootstrap_mode != BOOTSTRAP_OFF)
{
+ debugger_wait_hook();
m_core.icount = 0;
return;
}
diff --git a/src/devices/cpu/dsp56156/dsp56156.h b/src/devices/cpu/dsp56156/dsp56156.h
index 4317fa249f5..d85d019bd48 100644
--- a/src/devices/cpu/dsp56156/dsp56156.h
+++ b/src/devices/cpu/dsp56156/dsp56156.h
@@ -14,6 +14,7 @@
#pragma once
+#include <algorithm>
// IRQ Lines
@@ -33,15 +34,22 @@ class dsp56156_device;
// 5-4 Host Interface
struct dsp56156_host_interface
{
+ dsp56156_host_interface()
+ : hcr(nullptr), hsr(nullptr), htrx(nullptr)
+ , icr(0), cvr(0), isr(0), ivr(0), trxh(0), trxl(0)
+ , bootstrap_offset(0)
+ {
+ }
+
// **** DSP56156 side **** //
// Host Control Register
- uint16_t* hcr;
+ uint16_t *hcr;
// Host Status Register
- uint16_t* hsr;
+ uint16_t *hsr;
// Host Transmit/Receive Data
- uint16_t* htrx;
+ uint16_t *htrx;
// **** Host CPU side **** //
// Interrupt Control Register
@@ -62,12 +70,19 @@ struct dsp56156_host_interface
// HACK - Host interface bootstrap write offset
uint16_t bootstrap_offset;
-
};
// 1-9 ALU
struct dsp56156_data_alu
{
+ dsp56156_data_alu()
+ {
+ x.d = 0;
+ y.d = 0;
+ a.q = 0;
+ b.q = 0;
+ }
+
// Four 16-bit input registers (can be accessed as 2 32-bit registers)
PAIR x;
PAIR y;
@@ -85,6 +100,14 @@ struct dsp56156_data_alu
// 1-10 Address Generation Unit (AGU)
struct dsp56156_agu
{
+ dsp56156_agu()
+ : r0(0), r1(0), r2(0), r3(0)
+ , n0(0), n1(0), n2(0), n3(0)
+ , m0(0), m1(0), m2(0), m3(0)
+ , temp(0)
+ {
+ }
+
// Four address registers
uint16_t r0;
uint16_t r1;
@@ -115,26 +138,24 @@ struct dsp56156_agu
// 1-11 Program Control Unit (PCU)
struct dsp56156_pcu
{
- // Program Counter
- uint16_t pc;
-
- // Loop Address
- uint16_t la;
-
- // Loop Counter
- uint16_t lc;
-
- // Status Register
- uint16_t sr;
-
- // Operating Mode Register
- uint16_t omr;
-
- // Stack Pointer
- uint16_t sp;
-
- // Stack (TODO: 15-level?)
- PAIR ss[16];
+ dsp56156_pcu()
+ : pc(0), la(0), lc(0), sr(0), omr(0), sp(0)
+ , service_interrupts(nullptr)
+ , reset_vector(0)
+ , ipc(0)
+ {
+ for (auto &s : ss)
+ s.d = 0;
+ std::fill(std::begin(pending_interrupts), std::end(pending_interrupts), 0);
+ }
+
+ uint16_t pc; // Program Counter
+ uint16_t la; // Loop Address
+ uint16_t lc; // Loop Counter
+ uint16_t sr; // Status Register
+ uint16_t omr; // Operating Mode Register
+ uint16_t sp; // Stack Pointer
+ PAIR ss[16]; // Stack (TODO: 15-level?)
// Controls IRQ processing
void (*service_interrupts)(void);
@@ -152,6 +173,21 @@ struct dsp56156_pcu
// 1-8 The dsp56156 CORE
struct dsp56156_core
{
+ dsp56156_core()
+ : modA_state(false), modB_state(false), modC_state(false), reset_state(false)
+ , bootstrap_mode(0)
+ , repFlag(0), repAddr(0)
+ , icount(0)
+ , ppc(0)
+ , op(0)
+ , interrupt_cycles(0)
+ , output_pins_changed(nullptr)
+ , device(nullptr)
+ , program_ram(nullptr)
+ {
+ std::fill(std::begin(peripheral_ram), std::end(peripheral_ram), 0);
+ }
+
// PROGRAM CONTROLLER
dsp56156_pcu PCU;
@@ -211,8 +247,8 @@ public:
void host_interface_write(uint8_t offset, uint8_t data);
uint8_t host_interface_read(uint8_t offset);
- void dsp56156_program_map(address_map &map);
- void dsp56156_x_data_map(address_map &map);
+ void dsp56156_program_map(address_map &map) ATTR_COLD;
+ void dsp56156_x_data_map(address_map &map) ATTR_COLD;
auto portc_cb() { return portC_cb.bind(); }
@@ -220,15 +256,14 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return clocks; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles; }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 8; }
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == DSP56156_IRQ_RESET; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/dsp56156/dsp56def.h b/src/devices/cpu/dsp56156/dsp56def.h
index 3ae4dd414ec..a49d07c3899 100644
--- a/src/devices/cpu/dsp56156/dsp56def.h
+++ b/src/devices/cpu/dsp56156/dsp56def.h
@@ -4,13 +4,15 @@
// All the macros that are fit to print. //
///////////////////////////////////////////
-#ifndef __DSP56_DEF_H__
-#define __DSP56_DEF_H__
+#ifndef MAME_CPU_DSP56156_DSP56DEF_H
+#define MAME_CPU_DSP56156_DSP56DEF_H
+
+#pragma once
#include "dsp56156.h"
-namespace DSP_56156
-{
+namespace DSP_56156 {
+
/***************************************************************************
ALU
***************************************************************************/
@@ -53,4 +55,4 @@ namespace DSP_56156
} // namespace DSP_56156
-#endif
+#endif // MAME_CPU_DSP56156_DSP56DEF_H
diff --git a/src/devices/cpu/dsp56156/dsp56dsm.h b/src/devices/cpu/dsp56156/dsp56dsm.h
index c750bebfdb1..4a5afb15bd1 100644
--- a/src/devices/cpu/dsp56156/dsp56dsm.h
+++ b/src/devices/cpu/dsp56156/dsp56dsm.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_DSP56156_DSP56156DSM_H
-#define MAME_CPU_DSP56156_DSP56156DSM_H
+#ifndef MAME_CPU_DSP56156_DSP56DSM_H
+#define MAME_CPU_DSP56156_DSP56DSM_H
#pragma once
@@ -23,4 +23,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_DSP56156_DSP56DSM_H
diff --git a/src/devices/cpu/dsp56156/dsp56ops.hxx b/src/devices/cpu/dsp56156/dsp56ops.hxx
index 1072a163c7a..0a3c33a8f96 100644
--- a/src/devices/cpu/dsp56156/dsp56ops.hxx
+++ b/src/devices/cpu/dsp56156/dsp56ops.hxx
@@ -4946,9 +4946,9 @@ static int decode_cccc_table(dsp56156_core* cpustate, uint16_t cccc)
case 0x9: if((N() ^ V()) == 1) retVal = 1; break; /* lt */
case 0xb: if( N() == 1) retVal = 1; break; /* mi */
case 0x2: if( Z() == 0) retVal = 1; break; /* ne */
- case 0xc: if((Z() | ((!U()) & (!E()))) == 1) retVal = 1; break; /* nr */
+ case 0xc: if((Z() || ((!U()) && (!E())))) retVal = 1; break; /* nr */
case 0x3: if( N() == 0) retVal = 1; break; /* pl */
- case 0x4: if((Z() | ((!U()) & (!E()))) == 0) retVal = 1; break; /* nn */
+ case 0x4: if(!(Z() || ((!U()) && (!E())))) retVal = 1; break; /* nn */
}
return retVal;
diff --git a/src/devices/cpu/dsp56156/dsp56pcu.cpp b/src/devices/cpu/dsp56156/dsp56pcu.cpp
index fed41a5d267..7617cf8d56e 100644
--- a/src/devices/cpu/dsp56156/dsp56pcu.cpp
+++ b/src/devices/cpu/dsp56156/dsp56pcu.cpp
@@ -100,7 +100,7 @@ uint8_t SE_bit(const dsp56156_core* cpustate) { return ((SP & 0x0010) != 0); }
***************************************************************************/
void pcu_init(dsp56156_core* cpustate, device_t *device)
{
- /* Init the irq table */
+ /* Init the IRQ table */
dsp56156_irq_table_init();
/* save states - dsp56156_pcu members */
@@ -322,7 +322,7 @@ void dsp56156_set_irq_source(uint8_t irq_num, uint16_t iv, const char* source)
}
/* Construct a table containing pertient IRQ information */
-void dsp56156_irq_table_init(void)
+void dsp56156_irq_table_init()
{
/* 1-14 + 1-18 */
/* TODO: Cull host command stuff appropriately */
diff --git a/src/devices/cpu/dsp56156/dsp56pcu.h b/src/devices/cpu/dsp56156/dsp56pcu.h
index 5f82cc21877..06d57689eb6 100644
--- a/src/devices/cpu/dsp56156/dsp56pcu.h
+++ b/src/devices/cpu/dsp56156/dsp56pcu.h
@@ -1,12 +1,14 @@
// license:BSD-3-Clause
// copyright-holders:Andrew Gardner
-#ifndef DSP56156_PCU_H
-#define DSP56156_PCU_H
+#ifndef MAME_CPU_DSP56156_DSP56PCU_H
+#define MAME_CPU_DSP56156_DSP56PCU_H
+
+#pragma once
#include "dsp56156.h"
-namespace DSP_56156
-{
+namespace DSP_56156 {
+
/***************************************************************************
PCU
***************************************************************************/
@@ -148,4 +150,4 @@ int8_t dsp56156_get_irq_priority(dsp56156_core* cpustate, int index);
} // namespace DSP_56156
-#endif
+#endif // MAME_CPU_DSP56156_DSP56PCU_H
diff --git a/src/devices/cpu/dsp56156/inst.cpp b/src/devices/cpu/dsp56156/inst.cpp
index 339156aa35e..c091659ba67 100644
--- a/src/devices/cpu/dsp56156/inst.cpp
+++ b/src/devices/cpu/dsp56156/inst.cpp
@@ -2,10 +2,9 @@
// copyright-holders:Andrew Gardner
#include "emu.h"
#include "inst.h"
-#include "emu.h"
-namespace DSP_56156
-{
+namespace DSP_56156 {
+
// Factory
std::unique_ptr<Instruction> Instruction::decodeInstruction(const Opcode* opc,
const uint16_t word0,
@@ -783,4 +782,4 @@ std::unique_ptr<Instruction> Instruction::decodeInstruction(const Opcode* opc,
return nullptr;
}
-}
+} // namespace DSP_56156
diff --git a/src/devices/cpu/dsp56156/inst.h b/src/devices/cpu/dsp56156/inst.h
index 9ae926900ee..4fcf7f66bdb 100644
--- a/src/devices/cpu/dsp56156/inst.h
+++ b/src/devices/cpu/dsp56156/inst.h
@@ -1,7 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Andrew Gardner
-#ifndef DSP56156_INSTRUCTION_H
-#define DSP56156_INSTRUCTION_H
+#ifndef MAME_CPU_DSP56156_INST_H
+#define MAME_CPU_DSP56156_INST_H
+
+#pragma once
#include "opcode.h"
#include "tables.h"
@@ -13,8 +15,8 @@
//
// An Instruction is the base class all regular ops inherit from.
//
-namespace DSP_56156
-{
+namespace DSP_56156 {
+
#define UNIMPLEMENTED_OPCODE() osd_printf_error("Unimplemented opcode: PC=%04x | %s;\n", PC, __PRETTY_FUNCTION__);
class Opcode;
@@ -3482,5 +3484,6 @@ private:
reg_id m_source2;
};
-}
-#endif
+} // namespace DSP_56156
+
+#endif // MAME_CPU_DSP56156_INST_H
diff --git a/src/devices/cpu/dsp56156/opcode.h b/src/devices/cpu/dsp56156/opcode.h
index 304017caf61..41154bfc29d 100644
--- a/src/devices/cpu/dsp56156/opcode.h
+++ b/src/devices/cpu/dsp56156/opcode.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Andrew Gardner
-#ifndef DSP56156_OPCODE_H
-#define DSP56156_OPCODE_H
+#ifndef MAME_CPU_DSP56156_OPCODE_H
+#define MAME_CPU_DSP56156_OPCODE_H
#include "inst.h"
#include "pmove.h"
@@ -42,4 +42,4 @@ private:
} // namespace DSP_56156
-#endif
+#endif // MAME_CPU_DSP56156_OPCODE_H
diff --git a/src/devices/cpu/dsp56156/pmove.h b/src/devices/cpu/dsp56156/pmove.h
index 2f75eff0b8b..55732661a97 100644
--- a/src/devices/cpu/dsp56156/pmove.h
+++ b/src/devices/cpu/dsp56156/pmove.h
@@ -1,7 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Andrew Gardner
-#ifndef DSP56156_PMOVE_H
-#define DSP56156_PMOVE_H
+#ifndef MAME_CPU_DSP56156_PMOVE_H
+#define MAME_CPU_DSP56156_PMOVE_H
+
+#pragma once
#include "opcode.h"
#include "tables.h"
@@ -9,8 +11,8 @@
//
// A ParallelMove Object is what all parallel move classes inherit from.
//
-namespace DSP_56156
-{
+namespace DSP_56156 {
+
class Opcode;
class ParallelMove
@@ -316,5 +318,6 @@ private:
std::string m_destination;
};
-}
-#endif
+} // namespace DSP_56156
+
+#endif // MAME_CPU_DSP56156_PMOVE_H
diff --git a/src/devices/cpu/dsp56156/tables.h b/src/devices/cpu/dsp56156/tables.h
index b6fe4fbe815..221dbd45df5 100644
--- a/src/devices/cpu/dsp56156/tables.h
+++ b/src/devices/cpu/dsp56156/tables.h
@@ -1,16 +1,16 @@
// license:BSD-3-Clause
// copyright-holders:Andrew Gardner
-#ifndef DSP56156_TABLES_H
-#define DSP56156_TABLES_H
+#ifndef MAME_CPU_DSP56156_TABLES_H
+#define MAME_CPU_DSP56156_TABLES_H
-#include <cstdio>
-#include <cstdlib>
+#pragma once
#include "dsp56156.h"
-namespace DSP_56156
-{
-#define BITSn(CUR,MASK) (dsp56156_op_maskn(CUR,MASK))
+#include <cstdio>
+#include <cstdlib>
+
+namespace DSP_56156 {
enum bitsModified {BM_NONE = 0x0, BM_LOW = 0x1, BM_MIDDLE = 0x2, BM_HIGH = 0x4};
@@ -77,6 +77,7 @@ int8_t get_6_bit_signed_value(uint16_t bits);
// Helpers
uint16_t dsp56156_op_maskn(uint16_t cur, uint16_t mask);
+inline uint16_t BITSn(uint16_t cur, uint16_t mask) { return dsp56156_op_maskn(cur, mask); }
bool registerOverlap(const reg_id& r0, const size_t bmd, const reg_id& r1);
@@ -88,6 +89,6 @@ std::string opMnemonicAsString(const op_mnem& mnem);
reg_id stringAsRegID(const std::string& str);
uint8_t regIDAsNum(const reg_id& regId);
+} // namespace DSP_56156
-}
-#endif
+#endif // MAME_CPU_DSP56156_TABLES_H
diff --git a/src/devices/cpu/dspp/dspp.cpp b/src/devices/cpu/dspp/dspp.cpp
index 9679de25b96..0a82905bec1 100644
--- a/src/devices/cpu/dspp/dspp.cpp
+++ b/src/devices/cpu/dspp/dspp.cpp
@@ -679,7 +679,7 @@ void dspp_device::execute_run()
return;
}
- bool check_debugger = ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) != 0);
+ const bool check_debugger = debugger_enabled();
do
{
diff --git a/src/devices/cpu/dspp/dspp.h b/src/devices/cpu/dspp/dspp.h
index 68492fb7f40..13dc682b01f 100644
--- a/src/devices/cpu/dspp/dspp.h
+++ b/src/devices/cpu/dspp/dspp.h
@@ -74,8 +74,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
@@ -93,8 +93,8 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void code_map(address_map &map);
- void data_map(address_map &map);
+ void code_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
enum
{
diff --git a/src/devices/cpu/dspp/dsppdrc.cpp b/src/devices/cpu/dspp/dsppdrc.cpp
index 8134417748d..a010133cce9 100644
--- a/src/devices/cpu/dspp/dsppdrc.cpp
+++ b/src/devices/cpu/dspp/dsppdrc.cpp
@@ -409,7 +409,7 @@ void dspp_device::generate_sequence_instruction(drcuml_block &block, compiler_st
UML_MAPVAR(block, MAPVAR_CYCLES, compiler->cycles); // mapvar CYCLES,compiler->cycles
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_core->m_pc), desc->pc); // mov [pc],desc->pc
//save_fast_iregs(block); // <save fastregs>
diff --git a/src/devices/cpu/dspp/dsppfe.h b/src/devices/cpu/dspp/dsppfe.h
index b3eb5cb0d4d..5c0023e313a 100644
--- a/src/devices/cpu/dspp/dsppfe.h
+++ b/src/devices/cpu/dspp/dsppfe.h
@@ -8,8 +8,10 @@
***************************************************************************/
-#ifndef DEVICES_CPU_DSPP_DSPPFE_H
-#define DEVICES_CPU_DSPP_DSPPFE_H
+#ifndef MAME_CPU_DSPP_DSPPFE_H
+#define MAME_CPU_DSPP_DSPPFE_H
+
+#pragma once
#include "dspp.h"
#include "cpu/drcfe.h"
@@ -69,5 +71,4 @@ private:
dspp_device *m_dspp;
};
-
-#endif /* DEVICES_CPU_DSPP_DSPPFE_H */
+#endif // MAME_CPU_DSPP_DSPPFE_H
diff --git a/src/devices/cpu/e0c6200/e0c6200.cpp b/src/devices/cpu/e0c6200/e0c6200.cpp
index 3e0aef10214..83c3eec704b 100644
--- a/src/devices/cpu/e0c6200/e0c6200.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200.cpp
@@ -4,17 +4,17 @@
Seiko Epson E0C6200 CPU core and E0C62 MCU family
- References:
- - 1998 MF297-06a E0C6200/E0C6200A Core CPU Manual
- - 1998 MF1049-01a E0C6S46 Technical Manual
+References:
+- 1998 MF297-06a E0C6200/E0C6200A Core CPU Manual
+- 1998 MF1049-01a E0C6S46 Technical Manual
- E0C6200 is a CPU core used as the basis of many chips, it is not standalone.
- Seiko Epson often changed prefixes of their device names. Depending on when,
- the E0C6200 is known as SMC6200, E0C6200, S1C6200.
+E0C6200 is a CPU core used as the basis of many chips, it is not standalone.
+Seiko Epson often changed prefixes of their device names. Depending on when,
+the E0C6200 is known as SMC6200, E0C6200, S1C6200.
- TODO:
- - RLC is part of the r,q opcodes and requires that r == q, what happens otherwise?
- - documentation is conflicting on whether or not the zero flag is set on RLC/RRC
+TODO:
+- RLC is part of the r,q opcodes and requires that r == q, what happens otherwise?
+- documentation is conflicting on whether or not the zero flag is set on RLC/RRC
*/
@@ -199,6 +199,7 @@ void e0c6200_cpu_device::execute_run()
// core cpu not running (peripherals still work)
if (m_halt || m_sleep)
{
+ debugger_wait_hook();
m_icount = 0;
break;
}
@@ -838,7 +839,7 @@ void e0c6200_cpu_device::execute_one()
// illegal opcode
default:
- logerror("unknown opcode $%03X at $%04X\n", m_op, m_prev_pc);
+ op_illegal();
break;
} // 0xff0
diff --git a/src/devices/cpu/e0c6200/e0c6200.h b/src/devices/cpu/e0c6200/e0c6200.h
index 5222983e09b..58c4769d55c 100644
--- a/src/devices/cpu/e0c6200/e0c6200.h
+++ b/src/devices/cpu/e0c6200/e0c6200.h
@@ -18,13 +18,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 5; }
virtual u32 execute_max_cycles() const noexcept override { return 14; } // longest opcode is 12 cycles, but interrupt service takes up to 14
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_one();
virtual bool check_interrupt() { return false; } // nothing to do by default
@@ -92,6 +91,7 @@ protected:
void inc_x();
void inc_y();
void do_branch(int condition = 1);
+ void op_illegal();
// opcode handlers
u8 op_inc(u8 x);
diff --git a/src/devices/cpu/e0c6200/e0c6200d.cpp b/src/devices/cpu/e0c6200/e0c6200d.cpp
index 22497b8839f..adb324a1a79 100644
--- a/src/devices/cpu/e0c6200/e0c6200d.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200d.cpp
@@ -9,6 +9,27 @@
#include "emu.h"
#include "e0c6200d.h"
+
+// common lookup tables
+
+enum e0c6200_disassembler::e_mnemonics : unsigned
+{
+ em_JP, em_RETD, em_CALL, em_CALZ,
+ em_LD, em_LBPX, em_ADC, em_CP, em_ADD, em_SUB, em_SBC, em_AND, em_OR, em_XOR,
+ em_RLC, em_FAN, em_PSET, em_LDPX, em_LDPY, em_SET, em_RST, em_INC, em_DEC,
+ em_RRC, em_ACPX, em_ACPY, em_SCPX, em_SCPY, em_PUSH, em_POP,
+ em_RETS, em_RET, em_JPBA, em_HALT, em_SLP, em_NOP5, em_NOP7,
+ em_NOT, em_SCF, em_SZF, em_SDF, em_EI, em_DI, em_RDF, em_RZF, em_RCF, em_ILL
+};
+
+enum e0c6200_disassembler::e_params : unsigned
+{
+ ep_S, ep_E, ep_I, ep_R0, ep_R2, ep_R4, ep_Q,
+ ep_cC, ep_cNC, ep_cZ, ep_cNZ,
+ ep_A, ep_B, ep_X, ep_Y, ep_MX, ep_MY, ep_XP, ep_XH, ep_XL, ep_YP, ep_YH, ep_YL,
+ ep_P, ep_F, ep_MN, ep_SP, ep_SPH, ep_SPL
+};
+
const char *const e0c6200_disassembler::em_name[] =
{
"JP", "RETD", "CALL", "CALZ",
@@ -53,6 +74,8 @@ const char *const e0c6200_disassembler::ep_name[] =
};
+// disasm
+
std::string e0c6200_disassembler::decode_param(u16 opcode, int param)
{
int bits = ep_bits[param] & 0xf;
@@ -671,23 +694,3 @@ offs_t e0c6200_disassembler::disassemble(std::ostream &stream, offs_t pc, const
return 1 | ((op & 0xf00) == 0 ? 0 : em_flags[m]) | SUPPORTED;
}
-
-u32 e0c6200_disassembler::opcode_alignment() const
-{
- return 1;
-}
-
-u32 e0c6200_disassembler::interface_flags() const
-{
- return PAGED2LEVEL;
-}
-
-u32 e0c6200_disassembler::page_address_bits() const
-{
- return 8;
-}
-
-u32 e0c6200_disassembler::page2_address_bits() const
-{
- return 4;
-}
diff --git a/src/devices/cpu/e0c6200/e0c6200d.h b/src/devices/cpu/e0c6200/e0c6200d.h
index d2555c4ead8..95ec78b4458 100644
--- a/src/devices/cpu/e0c6200/e0c6200d.h
+++ b/src/devices/cpu/e0c6200/e0c6200d.h
@@ -17,32 +17,16 @@ public:
e0c6200_disassembler() = default;
virtual ~e0c6200_disassembler() = default;
- virtual u32 opcode_alignment() const override;
- virtual u32 interface_flags() const override;
- virtual u32 page_address_bits() const override;
- virtual u32 page2_address_bits() const override;
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual u32 interface_flags() const override { return PAGED2LEVEL; }
+ virtual u32 page_address_bits() const override { return 8; }
+ virtual u32 page2_address_bits() const override { return 4; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum e_mnemonics
- {
- em_JP, em_RETD, em_CALL, em_CALZ,
- em_LD, em_LBPX, em_ADC, em_CP, em_ADD, em_SUB, em_SBC, em_AND, em_OR, em_XOR,
- em_RLC, em_FAN, em_PSET, em_LDPX, em_LDPY, em_SET, em_RST, em_INC, em_DEC,
- em_RRC, em_ACPX, em_ACPY, em_SCPX, em_SCPY, em_PUSH, em_POP,
- em_RETS, em_RET, em_JPBA, em_HALT, em_SLP, em_NOP5, em_NOP7,
- em_NOT, em_SCF, em_SZF, em_SDF, em_EI, em_DI, em_RDF, em_RZF, em_RCF, em_ILL
- };
-
- enum e_params
- {
- ep_S, ep_E, ep_I, ep_R0, ep_R2, ep_R4, ep_Q,
- ep_cC, ep_cNC, ep_cZ, ep_cNZ,
- ep_A, ep_B, ep_X, ep_Y, ep_MX, ep_MY, ep_XP, ep_XH, ep_XL, ep_YP, ep_YH, ep_YL,
- ep_P, ep_F, ep_MN, ep_SP, ep_SPH, ep_SPL
- };
-
+ enum e_mnemonics : unsigned;
+ enum e_params : unsigned;
static const char *const em_name[];
static const u32 em_flags[];
static const u16 ep_bits[];
diff --git a/src/devices/cpu/e0c6200/e0c6200op.cpp b/src/devices/cpu/e0c6200/e0c6200op.cpp
index 93ab8011f7d..d637c3cb312 100644
--- a/src/devices/cpu/e0c6200/e0c6200op.cpp
+++ b/src/devices/cpu/e0c6200/e0c6200op.cpp
@@ -116,6 +116,11 @@ void e0c6200_cpu_device::do_branch(int condition)
m_pc = m_jpc | (m_op & 0xff);
}
+void e0c6200_cpu_device::op_illegal()
+{
+ logerror("unknown opcode $%03X at $%04X\n", m_op, m_prev_pc);
+}
+
// common opcodes (simpler ones are handled directly)
// note: it is implied that all opcodes below except RRC take 7 clock cycles (5 already deducted)
diff --git a/src/devices/cpu/e0c6200/e0c6s46.cpp b/src/devices/cpu/e0c6200/e0c6s46.cpp
index fcc9ac6c5cf..23d110887e9 100644
--- a/src/devices/cpu/e0c6200/e0c6s46.cpp
+++ b/src/devices/cpu/e0c6200/e0c6s46.cpp
@@ -2,16 +2,16 @@
// copyright-holders:hap
/*
- Seiko Epson E0C6S46 MCU
- QFP5-128pin, see manual for pinout
+ Seiko Epson E0C6S46 family
- TODO:
- - OSC3
- - K input interrupts
- - finish i/o ports
- - serial interface
- - buzzer envelope addition
- - add mask options for ports (eg. buzzer on output port R4x is optional)
+E0C6S46: 6144x12 ROM, 640x4 RAM, 2*80x4 VRAM, LCD has 16 commons and 40 segments
+E0C6S48: 8192x12 ROM, 768x4 RAM, 2*102x4 VRAM, LCD has 16 commons and 51 segments
+
+TODO:
+- finish i/o ports
+- serial interface
+- what happens if OSC3 is selected while OSCC (bit 2) is low?
+- add mask options for ports (eg. buzzer on output port R4x is optional)
*/
@@ -28,36 +28,59 @@ enum
IRQREG_INPUT1
};
+// device definitions
DEFINE_DEVICE_TYPE(E0C6S46, e0c6s46_device, "e0c6s46", "Seiko Epson E0C6S46")
+DEFINE_DEVICE_TYPE(E0C6S48, e0c6s48_device, "e0c6s48", "Seiko Epson E0C6S48")
// internal memory maps
-void e0c6s46_device::e0c6s46_program(address_map &map)
+void e0c6s46_device::program_map(address_map &map)
{
map(0x0000, 0x17ff).rom();
}
+void e0c6s48_device::program_map(address_map &map)
+{
+ map(0x0000, 0x1fff).rom();
+}
-void e0c6s46_device::e0c6s46_data(address_map &map)
+void e0c6s46_device::data_map(address_map &map)
{
map(0x0000, 0x027f).ram();
- map(0x0e00, 0x0e4f).ram().share("vram1");
- map(0x0e80, 0x0ecf).ram().share("vram2");
+ map(0x0e00, 0x0e4f).ram().share(m_vram[0]);
+ map(0x0e80, 0x0ecf).ram().share(m_vram[1]);
map(0x0f00, 0x0f7f).rw(FUNC(e0c6s46_device::io_r), FUNC(e0c6s46_device::io_w));
}
+void e0c6s48_device::data_map(address_map &map)
+{
+ map(0x0000, 0x02ff).ram();
+ map(0x0e00, 0x0e65).ram().share(m_vram[0]);
+ map(0x0e80, 0x0ee5).ram().share(m_vram[1]);
+ map(0x0f00, 0x0f7f).rw(FUNC(e0c6s48_device::io_r), FUNC(e0c6s48_device::io_w));
+}
-// device definitions
-e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- e0c6200_cpu_device(mconfig, E0C6S46, tag, owner, clock, address_map_constructor(FUNC(e0c6s46_device::e0c6s46_program), this), address_map_constructor(FUNC(e0c6s46_device::e0c6s46_data), this)),
- m_vram1(*this, "vram1"),
- m_vram2(*this, "vram2"),
- m_pixel_update_cb(*this),
+
+// constructor
+e0c6s46_device::e0c6s46_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor program, address_map_constructor data) :
+ e0c6200_cpu_device(mconfig, type, tag, owner, clock, program, data),
+ m_vram(*this, "vram%u", 1U),
+ m_write_segs(*this),
+ m_write_contrast(*this),
+ m_pixel_cb(*this),
m_write_r(*this),
m_read_p(*this, 0),
- m_write_p(*this)
+ m_write_p(*this),
+ m_osc3(0)
{ }
+e0c6s46_device::e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ e0c6s46_device(mconfig, E0C6S46, tag, owner, clock, address_map_constructor(FUNC(e0c6s46_device::program_map), this), address_map_constructor(FUNC(e0c6s46_device::data_map), this))
+{ }
+
+e0c6s48_device::e0c6s48_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ e0c6s46_device(mconfig, E0C6S48, tag, owner, clock, address_map_constructor(FUNC(e0c6s48_device::program_map), this), address_map_constructor(FUNC(e0c6s48_device::data_map), this))
+{ }
//-------------------------------------------------
@@ -68,15 +91,24 @@ void e0c6s46_device::device_start()
{
e0c6200_cpu_device::device_start();
- m_pixel_update_cb.resolve();
+ // misc init
+ m_osc1 = clock();
+ if (m_osc3 == 0)
+ m_osc3 = m_osc1;
- // create timers
m_core_256_handle = timer_alloc(FUNC(e0c6s46_device::core_256_cb), this);
- m_core_256_handle->adjust(attotime::from_ticks(64, unscaled_clock()));
+ m_core_256_handle->adjust(attotime::from_ticks(64, m_osc1));
m_prgtimer_handle = timer_alloc(FUNC(e0c6s46_device::prgtimer_cb), this);
- m_prgtimer_handle->adjust(attotime::never);
m_buzzer_handle = timer_alloc(FUNC(e0c6s46_device::buzzer_cb), this);
- m_buzzer_handle->adjust(attotime::never);
+ m_osc_change = timer_alloc(FUNC(e0c6s46_device::osc_change), this);
+ m_lcd_driver = timer_alloc(FUNC(e0c6s46_device::lcd_driver_cb), this);
+ m_lcd_driver->adjust(attotime::from_ticks(1024, m_osc1));
+
+ m_pixel_cb.resolve();
+
+ const u32 render_buf_size = m_vram[0].bytes() * 2 * 4;
+ m_render_buf = make_unique_clear<u8[]>(render_buf_size);
+ save_pointer(NAME(m_render_buf), render_buf_size);
// zerofill
memset(m_port_r, 0x0, sizeof(m_port_r));
@@ -114,6 +146,7 @@ void e0c6s46_device::device_start()
m_bz_43_on = 0;
m_bz_freq = 0;
m_bz_envelope = 0;
+ m_bz_envelope_count = 0;
m_bz_duty_ratio = 0;
m_bz_1shot_on = 0;
m_bz_1shot_running = false;
@@ -156,6 +189,7 @@ void e0c6s46_device::device_start()
save_item(NAME(m_bz_43_on));
save_item(NAME(m_bz_freq));
save_item(NAME(m_bz_envelope));
+ save_item(NAME(m_bz_envelope_count));
save_item(NAME(m_bz_duty_ratio));
save_item(NAME(m_bz_1shot_on));
save_item(NAME(m_bz_1shot_running));
@@ -177,12 +211,12 @@ void e0c6s46_device::device_reset()
memset(m_irqflag, 0, sizeof(m_irqflag));
memset(m_irqmask, 0, sizeof(m_irqmask));
- // reset other i/o
+ // reset other I/O
m_data->write_byte(0xf41, 0xf);
m_data->write_byte(0xf54, 0xf);
m_data->write_byte(0xf70, 0x0);
m_data->write_byte(0xf71, 0x8);
- m_data->write_byte(0xf73, m_svd & 0xc0);
+ m_data->write_byte(0xf73, m_svd & 3);
m_data->write_byte(0xf74, 0x0);
m_data->write_byte(0xf75, 0x4);
@@ -195,6 +229,8 @@ void e0c6s46_device::device_reset()
m_data->write_byte(0xf7d, 0x0);
m_data->write_byte(0xf7e, 0x0);
+ m_write_contrast(m_lcd_contrast);
+
// reset ports
for (int i = 0; i < 5; i++)
write_r(i, m_port_r[i]);
@@ -212,9 +248,9 @@ void e0c6s46_device::execute_one()
{
// E0C6S46 has no support for SLP opcode
if (m_op == 0xff9)
- return;
-
- e0c6200_cpu_device::execute_one();
+ op_illegal();
+ else
+ e0c6200_cpu_device::execute_one();
}
@@ -240,13 +276,19 @@ bool e0c6s46_device::check_interrupt()
for (int pri = 5; pri >= 0; pri--)
{
// hw glitch note, not emulated: if a new interrupt is requested in the
- // middle of handling this interrupt, irq vector may be an OR of 2 vectors
- m_irq_vector = 2*pri + 2;
+ // middle of handling this interrupt, IRQ vector may be an OR of 2 vectors
+ m_irq_vector = 2 * pri + 2;
int reg = priorder[pri];
m_irq_id = reg;
switch (reg)
{
+ // IK0/IK1 only have 1 flag bit
+ case IRQREG_INPUT0: case IRQREG_INPUT1:
+ if (m_irqflag[reg])
+ return true;
+ break;
+
// other: mask vs flag
default:
if (m_irqflag[reg] & m_irqmask[reg])
@@ -265,10 +307,24 @@ void e0c6s46_device::execute_set_input(int line, int state)
return;
state = (state) ? 1 : 0;
- int port = line >> 2 & 1;
+ u8 port = line >> 2 & 1;
u8 bit = 1 << (line & 3);
+ u8 prev = m_port_k[port];
m_port_k[port] = (m_port_k[port] & ~bit) | (state ? bit : 0);
+
+ // set IRQ flag on falling/rising edge of input
+ u8 dfk = (port == 0) ? m_dfk0 : 0xf;
+ u8 edge = ~(prev ^ dfk) & (m_port_k[port] ^ dfk) & bit;
+ if (m_irqmask[IRQREG_INPUT0 + port] & edge)
+ {
+ m_irqflag[IRQREG_INPUT0 + port] |= 1;
+ m_possible_irq = true;
+ }
+
+ // clock programmable timer on falling edge of K03
+ if ((prev & ~m_port_k[port] & bit) && m_prgtimer_on && (m_prgtimer_select & 7) < 2)
+ clock_prgtimer();
}
@@ -284,28 +340,22 @@ void e0c6s46_device::write_r(u8 port, u8 data)
data &= 0xf;
m_port_r[port] = data;
- // ports R0x-R3x can be high-impedance
- u8 out = data;
- if (port < 4 && !(m_r_dir >> port & 1))
- out = 0xf;
-
- switch (port)
+ if (port < 4)
{
- case 0: m_write_r[0](port, out, 0xff); break;
- case 1: m_write_r[1](port, out, 0xff); break;
- case 2: m_write_r[2](port, out, 0xff); break;
- case 3: m_write_r[3](port, out, 0xff); break; // TODO: R33 PTCLK/_SRDY
-
- // R4x: special output
- case 4:
- // d3: buzzer on: direct output or 1-shot output
- if ((data & 8) != m_bz_43_on)
- {
- m_bz_43_on = data & 8;
- reset_buzzer();
- }
- write_r4_out();
- break;
+ // ports R0-R3 can be high-impedance
+ u8 mask = BIT(m_r_dir, port) ? 0xf : 0;
+ m_write_r[port](port, data | (mask ^ 0xf), mask);
+ }
+ else
+ {
+ // R43: buzzer on: direct output or 1-shot output
+ if ((data & 8) != m_bz_43_on)
+ {
+ m_bz_43_on = data & 8;
+ reset_bz_envelope();
+ reset_buzzer();
+ }
+ write_r4_out();
}
}
@@ -314,8 +364,8 @@ void e0c6s46_device::write_r4_out()
// R40: _FOUT(clock inverted output)
// R42: FOUT or _BZ
// R43: BZ(buzzer)
- u8 out = (m_port_r[4] & 2) | (m_bz_pulse << 3) | (m_bz_pulse << 2 ^ 4);
- m_write_r[4](4, out, 0xff);
+ u8 data = (m_port_r[4] & 2) | (m_bz_pulse << 3) | (m_bz_pulse << 2 ^ 4);
+ m_write_r[4](4, data, 0xf);
}
@@ -326,20 +376,18 @@ void e0c6s46_device::write_p(u8 port, u8 data)
data &= 0xf;
m_port_p[port] = data;
- // don't output if port direction is set to input
- if (!(m_p_dir >> port & 1))
- return;
-
- m_write_p[port](port, data, 0xff);
+ // high-impedance if port is set to input
+ u8 mask = BIT(m_p_dir, port) ? 0xf : 0;
+ m_write_p[port](port, data | (mask ^ 0xf), mask);
}
u8 e0c6s46_device::read_p(u8 port)
{
// return written value if port direction is set to output
- if (m_p_dir >> port & 1)
+ if (BIT(m_p_dir, port))
return m_port_p[port];
- return m_read_p[port](port, 0xff);
+ return m_read_p[port](port);
}
@@ -353,7 +401,7 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::core_256_cb)
// clock-timer, stopwatch timer, and some features of the buzzer all run
// from the same internal 256hz timer (64 ticks high+low at default clock of 32768hz)
m_256_src_pulse ^= 1;
- m_core_256_handle->adjust(attotime::from_ticks(64, unscaled_clock()));
+ m_core_256_handle->adjust(attotime::from_ticks(64, m_osc1));
// clock stopwatch on falling edge of pulse+on
m_swl_cur_pulse = m_256_src_pulse | (m_stopwatch_on ^ 1);
@@ -364,12 +412,22 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::core_256_cb)
if (m_bz_1shot_on != 0 && m_256_src_pulse == 1)
clock_bz_1shot();
+ // clock buzzer envelope on rising edge if it's on
+ if (m_bz_envelope & 1 && m_256_src_pulse == 1)
+ clock_bz_envelope();
+
// clock-timer is always running, advance it on falling edge
// (handle clock_clktimer last in case of watchdog reset)
if (m_256_src_pulse == 0)
clock_clktimer();
}
+TIMER_CALLBACK_MEMBER(e0c6s46_device::osc_change)
+{
+ // set MCU instruction clock on CLKCHG change
+ set_clock((m_osc & 8) ? m_osc3 : m_osc1);
+}
+
// clock-timer
@@ -388,7 +446,7 @@ void e0c6s46_device::clock_clktimer()
{
m_clktimer_count++;
- // irq on falling edge of 32, 8, 2, 1hz
+ // IRQ on falling edge of 32, 8, 2, 1hz
u8 flag = 0;
if ((m_clktimer_count & 0x07) == 0)
flag |= 1;
@@ -426,7 +484,7 @@ void e0c6s46_device::clock_stopwatch()
{
m_swl_slice = 0;
- // bcd counter, irq on falling edge of 10 and 1hz
+ // bcd counter, IRQ on falling edge of 10 and 1hz
m_swl_count = (m_swl_count + 1) % 10;
if (m_swl_count == 0)
{
@@ -434,10 +492,10 @@ void e0c6s46_device::clock_stopwatch()
m_swh_count = (m_swh_count + 1) % 10;
if (m_swh_count == 0)
m_irqflag[IRQREG_STOPWATCH] |= 2;
- }
- if (m_irqflag[IRQREG_STOPWATCH] & m_irqmask[IRQREG_STOPWATCH])
- m_possible_irq = true;
+ if (m_irqflag[IRQREG_STOPWATCH] & m_irqmask[IRQREG_STOPWATCH])
+ m_possible_irq = true;
+ }
}
}
@@ -446,7 +504,7 @@ void e0c6s46_device::clock_stopwatch()
void e0c6s46_device::clock_prgtimer()
{
- // irq and reload when it reaches zero
+ // IRQ and reload when it reaches zero
if (--m_prgtimer_count == 0)
{
m_irqflag[IRQREG_PRGTIMER] |= 1;
@@ -463,7 +521,7 @@ bool e0c6s46_device::prgtimer_reset_prescaler()
// only 2 to 7 are clock dividers
u8 sel = m_prgtimer_select & 7;
if (sel >= 2)
- m_prgtimer_handle->adjust(attotime::from_ticks(2 << (sel ^ 7), unscaled_clock()));
+ m_prgtimer_handle->adjust(attotime::from_ticks(2 << (sel ^ 7), m_osc1));
return (sel >= 2);
}
@@ -488,7 +546,7 @@ TIMER_CALLBACK_MEMBER(e0c6s46_device::prgtimer_cb)
void e0c6s46_device::schedule_buzzer()
{
// only schedule next buzzer timeout if it's on
- if (m_bz_43_on != 0 && !m_bz_1shot_running)
+ if (m_bz_43_on && !m_bz_1shot_running)
return;
// pulse width differs per frequency selection
@@ -501,15 +559,18 @@ void e0c6s46_device::schedule_buzzer()
high -= m_bz_duty_ratio;
low -= high;
- m_buzzer_handle->adjust(attotime::from_ticks(m_bz_pulse ? high : low, mul * unscaled_clock()));
+ m_buzzer_handle->adjust(attotime::from_ticks(m_bz_pulse ? high : low, mul * m_osc1));
}
TIMER_CALLBACK_MEMBER(e0c6s46_device::buzzer_cb)
{
- // invert pulse wave and write to output
- m_bz_pulse ^= 1;
- write_r4_out();
+ // invert pulse wave if buzzer is on
+ if (m_bz_43_on && !m_bz_1shot_running)
+ m_bz_pulse = 0;
+ else
+ m_bz_pulse ^= 1;
+ write_r4_out();
schedule_buzzer();
}
@@ -527,8 +588,8 @@ void e0c6s46_device::clock_bz_1shot()
// reload counter the 1st time
if (m_bz_1shot_count == 0)
{
- reset_buzzer();
m_bz_1shot_count = (m_bz_freq & 8) ? 16 : 8;
+ reset_buzzer();
}
// stop ringing when counter reaches 0
@@ -539,19 +600,35 @@ void e0c6s46_device::clock_bz_1shot()
}
}
+void e0c6s46_device::clock_bz_envelope()
+{
+ if (--m_bz_envelope_count == 0)
+ {
+ m_bz_envelope_count = (m_bz_envelope & 2) ? 32 : 16;
+
+ // maximum duty addition is 7
+ if (m_bz_duty_ratio < 7)
+ m_bz_duty_ratio++;
+ }
+}
+
+void e0c6s46_device::reset_bz_envelope()
+{
+ m_bz_envelope_count = (m_bz_envelope & 2) ? 32 : 16;
+ m_bz_duty_ratio = 0;
+}
+
//-------------------------------------------------
// LCD Driver
//-------------------------------------------------
-u32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+TIMER_CALLBACK_MEMBER(e0c6s46_device::lcd_driver_cb)
{
- // call this 32 times per second (osc1/1024: 32hz at default clock of 32768hz)
+ // this gets called 32 times per second (osc1/1024: 32hz at default clock of 32768hz)
for (int bank = 0; bank < 2; bank++)
{
- const u8* vram = bank ? m_vram2 : m_vram1;
-
// determine operating mode
bool lcd_on = false;
int pixel = 0;
@@ -563,25 +640,47 @@ u32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, c
lcd_on = true;
// draw pixels
- for (int offset = 0; offset < 0x50; offset++)
+ for (int offset = 0; offset < m_vram[0].bytes(); offset++)
{
for (int c = 0; c < 4; c++)
{
if (lcd_on)
- pixel = vram[offset] >> c & 1;
+ pixel = m_vram[bank][offset] >> c & 1;
// 16 COM(common) pins, 40 SEG(segment) pins
int seg = offset / 2;
int com = bank * 8 + (offset & 1) * 4 + c;
- if (!m_pixel_update_cb.isnull())
- m_pixel_update_cb(bitmap, cliprect, m_lcd_contrast, seg, com, pixel);
- else if (cliprect.contains(seg, com))
- bitmap.pix(com, seg) = pixel;
+ const u8 width = m_vram[0].bytes() * 4 / 8;
+ m_render_buf[com * width + seg] = pixel;
+ m_write_segs(seg << 4 | com, pixel);
}
}
}
+ m_lcd_driver->adjust(attotime::from_ticks(1024, m_osc1));
+}
+
+u32 e0c6s46_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ const u8 *src = lcd_buffer();
+ const u8 width = m_vram[0].bytes() * 4 / 8;
+
+ for (int x = 0; x < width; x++)
+ {
+ for (int y = 0; y < 16; y++)
+ {
+ int dx = x;
+ int dy = y;
+
+ if (!m_pixel_cb.isnull())
+ m_pixel_cb(dx, dy);
+
+ if (cliprect.contains(dx, dy))
+ bitmap.pix(dy, dx) = src[y * width + x];
+ }
+ }
+
return 0;
}
@@ -595,17 +694,17 @@ u8 e0c6s46_device::io_r(offs_t offset)
{
switch (offset)
{
- // irq flags, masks
+ // IRQ flags, masks
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05:
{
- // irq flags are reset(acked) when read
+ // IRQ flags are reset(acked) when read
u8 flag = m_irqflag[offset];
if (!machine().side_effects_disabled())
m_irqflag[offset] = 0;
return flag;
}
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
- return m_irqmask[offset-0x10];
+ return m_irqmask[offset & 7];
// K input ports
case 0x40: case 0x42:
@@ -689,18 +788,34 @@ void e0c6s46_device::io_w(offs_t offset, u8 data)
{
switch (offset)
{
- // irq masks
+ // IRQ masks
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15:
{
static const u8 maskmask[6] = { 0xf, 3, 1, 1, 0xf, 0xf };
- m_irqmask[offset-0x10] = data & maskmask[offset-0x10];
- m_possible_irq = true;
+ u8 prev = m_irqmask[offset & 7];
+ m_irqmask[offset & 7] = data & maskmask[offset & 7];
+ u8 rise = ~prev & m_irqmask[offset & 7];
+
+ if (rise)
+ {
+ m_possible_irq = true;
+
+ if (offset >= 0x14)
+ {
+ u8 port = offset & 1;
+ u8 dfk = (port == 0) ? m_dfk0 : 0xf;
+
+ // IK flag gets set if input is active at rising edge of mask bit
+ if (rise & (m_port_k[port] ^ dfk))
+ m_irqflag[offset & 7] |= 1;
+ }
+ }
break;
}
// K input ports
case 0x41:
- // d0-d3: K0x irq on 0: rising edge, 1: falling edge
+ // d0-d3: K0x IRQ on 0: rising edge, 1: falling edge
m_dfk0 = data;
break;
@@ -745,8 +860,13 @@ void e0c6s46_device::io_w(offs_t offset, u8 data)
// d0,d1: CPU operating voltage
// d2: OSC3 on (high freq)
// d3: clock source OSC1 or OSC3
- if (data & 8)
- logerror("io_w selected OSC3! PC=$%04X\n", m_prev_pc);
+ if ((m_osc ^ data) & 8)
+ {
+ if (m_osc1 == m_osc3)
+ logerror("io_w unhandled OSC change, PC=$%04X\n", m_prev_pc);
+ else
+ m_osc_change->adjust(attotime::zero);
+ }
m_osc = data;
break;
@@ -760,6 +880,7 @@ void e0c6s46_device::io_w(offs_t offset, u8 data)
case 0x72:
// contrast adjustment (0=light, 15=dark)
m_lcd_contrast = data;
+ m_write_contrast(data);
break;
// SVD circuit (supply voltage detection)
@@ -848,8 +969,8 @@ void e0c6s46_device::io_w(offs_t offset, u8 data)
// d1: envelope cycle selection
// d2: reset envelope
// d3: trigger one-shot buzzer
- if (data & 1)
- logerror("io_w enabled envelope, PC=$%04X\n", m_prev_pc);
+ if (~m_bz_envelope & data & 1 || data & 4)
+ reset_bz_envelope();
m_bz_envelope = data & 3;
m_bz_1shot_on |= data & 8;
break;
diff --git a/src/devices/cpu/e0c6200/e0c6s46.h b/src/devices/cpu/e0c6200/e0c6s46.h
index 0fb7a67e44c..d70d0779d99 100644
--- a/src/devices/cpu/e0c6200/e0c6s46.h
+++ b/src/devices/cpu/e0c6200/e0c6s46.h
@@ -2,7 +2,7 @@
// copyright-holders:hap
/*
- Seiko Epson E0C6S46 MCU
+ Seiko Epson E0C6S46 family
*/
@@ -11,6 +11,19 @@
#include "e0c6200.h"
+// for the 2 K input ports, use set_input_line(line, state)
+enum
+{
+ E0C6S46_LINE_K00 = 0,
+ E0C6S46_LINE_K01,
+ E0C6S46_LINE_K02,
+ E0C6S46_LINE_K03,
+ E0C6S46_LINE_K10,
+ E0C6S46_LINE_K11,
+ E0C6S46_LINE_K12,
+ E0C6S46_LINE_K13
+};
+
enum
{
E0C6S46_PORT_R0X = 0,
@@ -28,28 +41,13 @@ enum
E0C6S46_PORT_P3X
};
-// for the 2 K input ports, use set_input_line(line, state)
-enum
-{
- E0C6S46_LINE_K00 = 0,
- E0C6S46_LINE_K01,
- E0C6S46_LINE_K02,
- E0C6S46_LINE_K03,
- E0C6S46_LINE_K10,
- E0C6S46_LINE_K11,
- E0C6S46_LINE_K12,
- E0C6S46_LINE_K13
-};
-
-
-// lcd driver
-#define E0C6S46_PIXEL_UPDATE(name) void name(bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int seg, int com, int state)
+// no pinout diagram here, refer to the manual
class e0c6s46_device : public e0c6200_cpu_device
{
public:
- typedef device_delegate<void (bitmap_ind16 &bitmap, const rectangle &cliprect, int contrast, int seg, int com, int state)> pixel_update_delegate;
+ using pixel_delegate = device_delegate<void (int &dx, int &dy)>;
e0c6s46_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
@@ -60,39 +58,58 @@ public:
template <std::size_t Port> auto read_p() { return m_read_p[Port].bind(); }
template <std::size_t Port> auto write_p() { return m_write_p[Port].bind(); }
- template <typename... T> void set_pixel_update_cb(T &&... args) { m_pixel_update_cb.set(std::forward<T>(args)...); }
+ // LCD segment outputs: COM0-COM15 as a0-a3, SEG0-SEGx as a4-a10
+ auto write_segs() { return m_write_segs.bind(); }
- u8 io_r(offs_t offset);
- void io_w(offs_t offset, u8 data);
+ // LCD contrast (adjusts VL pins overall voltage level)
+ auto write_contrast() { return m_write_contrast.bind(); }
+ // screen update (optional)
+ const u8 *lcd_buffer() { return &m_render_buf[0]; } // get intermediate LCD pixel buffer
u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+ template <typename... T> void set_pixel_callback(T &&... args) { m_pixel_cb.set(std::forward<T>(args)...); } // transform pixel x/y
+
+ // OSC3 (set fast oscillator, via resistor)
+ void set_osc3(u32 osc) { m_osc3 = osc; }
+
protected:
+ e0c6s46_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor program, address_map_constructor data);
+
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual u32 execute_input_lines() const noexcept override { return 8; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_one() override;
virtual bool check_interrupt() override;
- void e0c6s46_data(address_map &map);
- void e0c6s46_program(address_map &map);
+ u8 io_r(offs_t offset);
+ void io_w(offs_t offset, u8 data);
+
+ required_shared_ptr_array<u8, 2> m_vram;
private:
- required_shared_ptr<u8> m_vram1;
- required_shared_ptr<u8> m_vram2;
+ void program_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
u8 m_irqflag[6];
u8 m_irqmask[6];
u8 m_osc;
u8 m_svd;
+ // lcd driver
u8 m_lcd_control;
u8 m_lcd_contrast;
- pixel_update_delegate m_pixel_update_cb;
+ devcb_write8 m_write_segs;
+ devcb_write8 m_write_contrast;
+
+ emu_timer *m_lcd_driver;
+ TIMER_CALLBACK_MEMBER(lcd_driver_cb);
+
+ std::unique_ptr<u8[]> m_render_buf;
+ pixel_delegate m_pixel_cb;
// i/o ports
devcb_write8::array<5> m_write_r;
@@ -142,6 +159,7 @@ private:
u8 m_bz_43_on;
u8 m_bz_freq;
u8 m_bz_envelope;
+ u8 m_bz_envelope_count;
u8 m_bz_duty_ratio;
u8 m_bz_1shot_on;
bool m_bz_1shot_running;
@@ -152,9 +170,27 @@ private:
void schedule_buzzer();
void reset_buzzer();
void clock_bz_1shot();
+ void clock_bz_envelope();
+ void reset_bz_envelope();
+
+ u32 m_osc1;
+ u32 m_osc3;
+ emu_timer *m_osc_change;
+ TIMER_CALLBACK_MEMBER(osc_change);
+};
+
+class e0c6s48_device : public e0c6s46_device
+{
+public:
+ e0c6s48_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+private:
+ void program_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(E0C6S46, e0c6s46_device)
+DECLARE_DEVICE_TYPE(E0C6S48, e0c6s48_device)
#endif // MAME_CPU_E0C6200_E0C6S46_H
diff --git a/src/devices/cpu/e132xs/32xsdasm.cpp b/src/devices/cpu/e132xs/32xsdasm.cpp
index 6d3ececb34d..286ef747dde 100644
--- a/src/devices/cpu/e132xs/32xsdasm.cpp
+++ b/src/devices/cpu/e132xs/32xsdasm.cpp
@@ -12,104 +12,140 @@
#include "32xsdefs.h"
-const char *const hyperstone_disassembler::L_REG[] =
+namespace {
+
+const char *const L_REG[] =
{
- "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7", "L8", "L9",
- "L10", "L11", "L12", "L13", "L14", "L15", "L16", "L17", "L18", "L19",
- "L20", "L21", "L22", "L23", "L24", "L25", "L26", "L27", "L28", "L29",
- "L30", "L31", "L32", "L33", "L34", "L35", "L36", "L37", "L38", "L39",
- "L40", "L41", "L42", "L43", "L44", "L45", "L46", "L47", "L48", "L49",
- "L50", "L51", "L52", "L53", "L54", "L55", "L56", "L57", "L58", "L59",
- "L60", "L61", "L62", "L63"
+ "L0", "L1", "L2", "L3", "L4", "L5", "L6", "L7",
+ "L8", "L9", "L10", "L11", "L12", "L13", "L14", "L15"
};
-const char *const hyperstone_disassembler::G_REG[] =
+const char *const G_REG[] =
{
- "PC", "SR", "FER", "G03", "G04", "G05", "G06", "G07", "G08", "G09",
- "G10", "G11", "G12", "G13", "G14", "G15", "G16", "G17", "SP", "UB",
- "BCR", "TPR", "TCR", "TR", "WCR", "ISR", "FCR", "MCR", "G28", "G29",
- "G30", "G31"
+ "PC", "SR", "FER", "G03", "G04", "G05", "G06", "G07",
+ "G08", "G09", "G10", "G11", "G12", "G13", "G14", "G15",
+ "G16", "G17", "SP", "UB", "BCR", "TPR", "TCR", "TR",
+ "WCR", "ISR", "FCR", "MCR", "G28", "G29", "G30", "G31"
};
-const char *const hyperstone_disassembler::SETxx[] =
+const char *const SETxx[] =
{
- "SETADR", "Reserved", "SET1", "SET0", "SETLE", "SETGT", "SETLT", "SETGE",
+ "SETADR", nullptr, "SET1", "SET0", "SETLE", "SETGT", "SETLT", "SETGE",
"SETSE", "SETHT", "SETST", "SETHE", "SETE", "SETNE", "SETV", "SETNV",
- "Reserved", "Reserved", "SET1M", "Reserved", "SETLEM", "SETGTM", "SETLTM", "SETGEM",
+ nullptr, nullptr, "SET1M", nullptr, "SETLEM", "SETGTM", "SETLTM", "SETGEM",
"SETSEM", "SETTHM", "SETSTM", "SETHEM", "SETEM", "SETNEM", "SETVM", "SETNVM"
};
+const char *const Fxxx[] =
+{
+ "FADD", "FADDD", "FSUB", "FSUBD", "FMUL", "FMULD", "FDIV", "FDIVD",
+ "FCMP", "FCMPD", "FCMPU", "FCMPUD", "FCVT", "FCVTD"
+};
+
+const char *const Bxx[] =
+{
+ "BV", "BNV", "BE", "BNE", "BC", "BNC", "BSE", "BHT",
+ "BN", "BNN", "BLE", "BGT", "BR"
+};
+
+const char *const TRAPxx[] =
+{
+ nullptr, nullptr, nullptr, nullptr, "TRAPLE", "TRAPGT", "TRAPLT", "TRAPGE",
+ "TRAPSE", "TRAPHT", "TRAPST", "TRAPHE", "TRAPE", "TRAPNE", "TRAPV", "TRAP"
+};
+
#define DESTCODE(op) ((op & 0x00f0) >> 4)
#define SOURCECODE(op) (op & 0x000f)
#define SOURCEBIT(op) ((op & 0x100) >> 8)
#define DESTBIT(op) ((op & 0x200) >> 9)
-#define DASM_N_VALUE(op) ((((op & 0x100) >> 8) << 4 ) | (op & 0x0f))
+#define DASM_N_VALUE(op) ((((op & 0x100) >> 8) << 4 ) | (op & 0x0f))
-void hyperstone_disassembler::LL_format(char *source, char *dest, uint16_t op)
+
+void LL_format(std::string_view &source, std::string_view &dest, uint16_t op)
{
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
+ source = L_REG[SOURCECODE(op)];
+ dest = L_REG[DESTCODE(op)];
}
-void hyperstone_disassembler::LR_format(char *source, char *dest, uint16_t op)
+void LR_format(std::string_view &source, std::string_view &dest, uint16_t op)
{
- if( SOURCEBIT(op) )
- {
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- }
+ if (SOURCEBIT(op))
+ source = L_REG[SOURCECODE(op)];
else
- {
- strcpy(source, G_REG[SOURCECODE(op)]);
- }
+ source = G_REG[SOURCECODE(op)];
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
+ dest = L_REG[DESTCODE(op)];
}
-void hyperstone_disassembler::RR_format(char *source, char *dest, uint16_t op, unsigned h_flag)
+void RR_format(std::string_view &source, std::string_view &dest, uint16_t op, unsigned h_flag)
{
- if( SOURCEBIT(op) )
- {
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- }
+ if (SOURCEBIT(op))
+ source = L_REG[SOURCECODE(op)];
else
- {
- strcpy(source, G_REG[SOURCECODE(op) + h_flag * 16]);
- }
+ source = G_REG[SOURCECODE(op) + h_flag * 16];
- if( DESTBIT(op) )
- {
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
- }
+ if (DESTBIT(op))
+ dest = L_REG[DESTCODE(op)];
else
- {
- strcpy(dest, G_REG[DESTCODE(op) + h_flag * 16]);
- }
+ dest = G_REG[DESTCODE(op) + h_flag * 16];
+}
+
+uint8_t Ln_format(std::string_view &dest, uint16_t op)
+{
+ dest = L_REG[DESTCODE(op)];
+
+ return DASM_N_VALUE(op);
+}
+
+uint8_t Rn_format(std::string_view &dest, uint16_t op)
+{
+ if (DESTBIT(op))
+ dest = L_REG[DESTCODE(op)];
+ else
+ dest = G_REG[DESTCODE(op)];
+
+ return DASM_N_VALUE(op);
}
-uint32_t hyperstone_disassembler::LRconst_format(char *source, char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes)
+
+void format_addsub(
+ std::ostream &stream,
+ std::string_view inst,
+ std::string_view dest,
+ std::string_view source,
+ uint8_t source_bit,
+ uint8_t source_code)
+{
+ util::stream_format(stream, "%-7s %s, %s",
+ inst,
+ dest,
+ (!source_bit && (source_code == SR_REGISTER)) ? "C" : source);
+}
+
+} // anonymous namespace
+
+
+
+uint32_t hyperstone_disassembler::LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes)
{
uint16_t next_op;
uint32_t const_val;
- if( SOURCEBIT(op) )
- {
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- }
+ if (SOURCEBIT(op))
+ source = L_REG[SOURCECODE(op)];
else
- {
- strcpy(source, G_REG[SOURCECODE(op)]);
- }
+ source = G_REG[SOURCECODE(op)];
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
+ dest = L_REG[DESTCODE(op)];
size = 4;
pc += 2;
next_op = opcodes.r16(pc);
- if( E_BIT(next_op) )
+ if (E_BIT(next_op))
{
uint16_t next_op2;
@@ -120,53 +156,41 @@ uint32_t hyperstone_disassembler::LRconst_format(char *source, char *dest, uint1
const_val = next_op2;
const_val |= ((next_op & 0x3fff) << 16 );
- if( S_BIT_CONST(next_op) )
- {
+ if (S_BIT_CONST(next_op))
const_val |= 0xc0000000;
- }
}
else
{
const_val = next_op & 0x3fff;
- if( S_BIT_CONST(next_op) )
- {
+ if (S_BIT_CONST(next_op))
const_val |= 0xffffc000;
- }
}
return const_val;
}
-uint32_t hyperstone_disassembler::RRconst_format(char *source, char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes)
+uint32_t hyperstone_disassembler::RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes)
{
uint16_t next_op;
uint32_t const_val;
- if( SOURCEBIT(op) )
- {
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- }
+ if (SOURCEBIT(op))
+ source = L_REG[SOURCECODE(op)];
else
- {
- strcpy(source, G_REG[SOURCECODE(op)]);
- }
+ source = G_REG[SOURCECODE(op)];
- if( DESTBIT(op) )
- {
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
- }
+ if (DESTBIT(op))
+ dest = L_REG[DESTCODE(op)];
else
- {
- strcpy(dest, G_REG[DESTCODE(op)]);
- }
+ dest = G_REG[DESTCODE(op)];
size = 4;
pc += 2;
next_op = opcodes.r16(pc);
- if( E_BIT(next_op) )
+ if (E_BIT(next_op))
{
uint16_t next_op2;
@@ -177,7 +201,7 @@ uint32_t hyperstone_disassembler::RRconst_format(char *source, char *dest, uint1
const_val = next_op2;
const_val |= ((next_op & 0x3fff) << 16 );
- if( S_BIT_CONST(next_op) )
+ if (S_BIT_CONST(next_op))
{
const_val |= 0xc0000000;
}
@@ -186,32 +210,26 @@ uint32_t hyperstone_disassembler::RRconst_format(char *source, char *dest, uint1
{
const_val = next_op & 0x3fff;
- if( S_BIT_CONST(next_op) )
- {
+ if (S_BIT_CONST(next_op))
const_val |= 0xffffc000;
- }
}
return const_val;
}
-int32_t hyperstone_disassembler::Rimm_format(char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes, unsigned h_flag)
+int32_t hyperstone_disassembler::Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes, unsigned h_flag)
{
uint16_t imm1, imm2;
int32_t ret;
int n = DASM_N_VALUE(op);
- if( DESTBIT(op) )
- {
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
- }
+ if (DESTBIT(op))
+ dest = L_REG[DESTCODE(op)];
else
- {
- strcpy(dest, G_REG[DESTCODE(op) + h_flag * 16]);
- }
+ dest = G_REG[DESTCODE(op) + h_flag * 16];
- switch( n )
+ switch (n)
{
case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 8:
case 9: case 10: case 11: case 12: case 13: case 14: case 15: case 16:
@@ -283,27 +301,6 @@ int32_t hyperstone_disassembler::Rimm_format(char *dest, uint16_t op, offs_t &pc
}
}
-uint8_t hyperstone_disassembler::Ln_format(char *dest, uint16_t op)
-{
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
-
- return DASM_N_VALUE(op);
-}
-
-uint8_t hyperstone_disassembler::Rn_format(char *dest, uint16_t op)
-{
- if( DESTBIT(op) )
- {
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
- }
- else
- {
- strcpy(dest, G_REG[DESTCODE(op)]);
- }
-
- return DASM_N_VALUE(op);
-}
-
int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, const data_buffer &opcodes)
{
int32_t ret;
@@ -336,29 +333,21 @@ int32_t hyperstone_disassembler::PCrel_format(uint16_t op, offs_t pc, const data
return (pc + ret);
}
-uint32_t hyperstone_disassembler::RRdis_format(char *source, char *dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes)
+uint32_t hyperstone_disassembler::RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes)
{
uint32_t ret;
- if( SOURCEBIT(op) )
- {
- strcpy(source, L_REG[(SOURCECODE(op)+global_fp)%64]);
- }
+ if (SOURCEBIT(op))
+ source = L_REG[SOURCECODE(op)];
else
- {
- strcpy(source, G_REG[SOURCECODE(op)]);
- }
+ source = G_REG[SOURCECODE(op)];
- if( DESTBIT(op) )
- {
- strcpy(dest, L_REG[(DESTCODE(op)+global_fp)%64]);
- }
+ if (DESTBIT(op))
+ dest = L_REG[DESTCODE(op)];
else
- {
- strcpy(dest, G_REG[DESTCODE(op)]);
- }
+ dest = G_REG[DESTCODE(op)];
- if( E_BIT(next_op) )
+ if (E_BIT(next_op))
{
uint16_t next;
@@ -400,1748 +389,715 @@ hyperstone_disassembler::hyperstone_disassembler(config *conf) : m_config(conf)
/*****************************/
offs_t hyperstone_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
- char source[5] = "\0", dest[5] = "\0";
+ std::string_view source, dest;
uint32_t flags = 0;
- uint16_t op = opcodes.r16(pc);
+ const uint16_t op = opcodes.r16(pc);
size = 2;
- uint8_t source_code = SOURCECODE(op);
- uint8_t dest_code = DESTCODE(op);
- uint8_t source_bit = SOURCEBIT(op);
- uint8_t dest_bit = DESTBIT(op);
+ const uint8_t source_code = SOURCECODE(op);
+ const uint8_t dest_code = DESTCODE(op);
+ const uint8_t source_bit = SOURCEBIT(op);
+ const uint8_t dest_bit = DESTBIT(op);
- global_fp = m_config->get_fp();
- int h_flag = m_config->get_h();
+ const int h_flag = m_config->get_h();
- uint8_t op_num = (op & 0xff00) >> 8;
+ const uint8_t op_num = (op & 0xff00) >> 8;
- switch( op_num )
+ switch (op_num)
{
// CHK - CHKZ - NOP
case 0x00: case 0x01: case 0x02: case 0x03:
-
- if( source_bit && dest_bit && source_code == 0 && dest_code == 0 )
+ if (source_bit && dest_bit && !source_code && !dest_code)
{
util::stream_format(stream, "NOP");
}
else
{
RR_format(source, dest, op, 0);
-
- if( !source_bit && source_code == SR_REGISTER )
- {
- util::stream_format(stream, "CHKZ %s, 0", dest);
- }
+ if (!source_bit && (source_code == SR_REGISTER))
+ util::stream_format(stream, "CHKZ %s, 0", dest);
else
- {
- util::stream_format(stream, "CHK %s, %s", dest, source);
- }
+ util::stream_format(stream, "CHK %s, %s", dest, source);
}
-
break;
// MOVD - RET
case 0x04: case 0x05: case 0x06: case 0x07:
-
RR_format(source, dest, op, 0);
- if( dest_code == PC_REGISTER && !dest_bit )
+ if (!dest_bit && (dest_code == PC_REGISTER))
{
- global_fp = 0;
- RR_format(source, dest, op, 0);
- util::stream_format(stream, "RET PC, %s", source);
- flags = STEP_OUT;
+ if (!source_bit && ((source_code == PC_REGISTER) || (source_code == SR_REGISTER)))
+ {
+ // RET with PC or SR as source is reserved for future expansion
+ util::stream_format(stream, "D.HU $%04x", op);
+ }
+ else
+ {
+ RR_format(source, dest, op, 0);
+ util::stream_format(stream, "RET PC, %s", source);
+ flags = STEP_OUT;
+ }
}
- else if( source_code == SR_REGISTER && !source_bit )
+ else if (!source_bit && (source_code == SR_REGISTER))
{
- util::stream_format(stream, "MOVD %s, 0", dest);
+ util::stream_format(stream, "MOVD %s, 0", dest);
}
else
{
- util::stream_format(stream, "MOVD %s, %s", dest, source);
+ util::stream_format(stream, "MOVD %s, %s", dest, source);
}
-
- break;
-
- // DIVU
- case 0x08: case 0x09: case 0x0a: case 0x0b:
-
- RR_format(source, dest, op, 0);
- util::stream_format(stream, "DIVU %s, %s", dest, source);
-
break;
- // DIVS
- case 0x0c: case 0x0d: case 0x0e: case 0x0f:
-
+ case 0x08: case 0x09: case 0x0a: case 0x0b: // DIVU
+ case 0x0c: case 0x0d: case 0x0e: case 0x0f: // DIVS
RR_format(source, dest, op, 0);
- util::stream_format(stream, "DIVS %s, %s", dest, source);
-
+ util::stream_format(stream, "DIV%c %s, %s", (op_num & 0x4) ? 'S' : 'U', dest, source);
break;
// XMx - XXx
case 0x10: case 0x11: case 0x12: case 0x13:
- {
- int xcode;
-
- RR_format(source, dest, op, 0);
-
- size = 4;
+ {
+ RR_format(source, dest, op, 0);
- pc += 2;
- op = opcodes.r16(pc);
+ size = 4;
- xcode = X_CODE(op);
+ pc += 2;
+ const uint16_t ilm1 = opcodes.r16(pc);
- if( xcode < 4 )
- {
- uint16_t lim;
+ const int xcode = X_CODE(ilm1);
- if( E_BIT(op) )
+ if (xcode < 4)
{
- uint16_t next_op;
+ uint16_t lim;
- size = 6;
+ if (E_BIT(ilm1))
+ {
+ size = 6;
- pc += 2;
- next_op = opcodes.r16(pc);
+ pc += 2;
+ const uint16_t ilm2 = opcodes.r16(pc);
- lim = ((op & 0xfff) << 16) | next_op;
+ lim = ((ilm1 & 0xfff) << 16) | ilm2;
+ }
+ else
+ {
+ lim = ilm1 & 0xfff;
+ }
+
+ util::stream_format(stream, "XM%x %s, %s, $%x", 1 << xcode, dest, source, lim);
}
else
{
- lim = op & 0xfff;
+ util::stream_format(stream, "XX%x %s, %s, 0", 1 << (xcode & 0x3), dest, source);
}
-
- util::stream_format(stream, "XM%x %s, %s, $%x", (uint8_t)(float) pow(2.0, xcode), dest, source, lim);
-
}
- else
- {
- util::stream_format(stream, "XX%x %s, %s, 0", (uint8_t)(float) pow(2.0, (xcode - 4)), dest, source);
- }
-
break;
- }
// MASK
case 0x14: case 0x15: case 0x16: case 0x17:
- {
- uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes);
-
- util::stream_format(stream, "MASK %s, %s, $%x", dest, source, const_val);
-
- break;
- }
-
- // SUM
- case 0x18: case 0x19: case 0x1a: case 0x1b:
- {
- uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "SUM %s, C, $%x", dest, const_val);
- }
- else
{
- util::stream_format(stream, "SUM %s, %s, $%x", dest, source, const_val);
+ const uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes);
+ util::stream_format(stream, "MASK %s, %s, $%x", dest, source, const_val);
+ if (!source_bit && (source_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t((pc + size) & const_val));
}
-
break;
- }
-
- // SUMS
- case 0x1c: case 0x1d: case 0x1e: case 0x1f:
- {
- uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes);
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "SUMS %s, C, $%x", dest, const_val);
- }
- else
+ case 0x18: case 0x19: case 0x1a: case 0x1b: // SUM
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f: // SUMS
{
- util::stream_format(stream, "SUMS %s, %s, $%x", dest, source, const_val);
+ const uint32_t const_val = RRconst_format(source, dest, op, pc, opcodes);
+ util::stream_format(stream, "SUM%c %s, %s, $%x",
+ (op_num & 0x4) ? 'S' : ' ',
+ dest,
+ (!source_bit && (source_code == SR_REGISTER)) ? "C" : source,
+ const_val);
+ if (!source_bit && (source_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + const_val));
}
-
break;
- }
// CMP
case 0x20: case 0x21: case 0x22: case 0x23:
-
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "CMP %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "CMP %s, %s", dest, source);
- }
-
+ format_addsub(stream, "CMP", dest, source, source_bit, source_code);
break;
// MOV
case 0x24: case 0x25: case 0x26: case 0x27:
-
RR_format(source, dest, op, h_flag);
- util::stream_format(stream, "MOV %s, %s", dest, source);
-
- break;
-
- // ADD
- case 0x28: case 0x29: case 0x2a: case 0x2b:
-
- RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "ADD %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "ADD %s, %s", dest, source);
- }
-
+ util::stream_format(stream, "MOV %s, %s", dest, source);
break;
- // ADDS
- case 0x2c: case 0x2d: case 0x2e: case 0x2f:
-
+ case 0x28: case 0x29: case 0x2a: case 0x2b: // ADD
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f: // ADDS
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "ADDS %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "ADDS %s, %s", dest, source);
- }
-
+ format_addsub(stream, (op_num & 0x4) ? "ADDS" : "ADD", dest, source, source_bit, source_code);
break;
// CMPB
case 0x30: case 0x31: case 0x32: case 0x33:
-
RR_format(source, dest, op, 0);
- util::stream_format(stream, "CMPB %s, %s", dest, source);
-
+ util::stream_format(stream, "CMPB %s, %s", dest, source);
break;
// ANDN
case 0x34: case 0x35: case 0x36: case 0x37:
-
RR_format(source, dest, op, 0);
- util::stream_format(stream, "ANDN %s, %s", dest, source);
-
+ util::stream_format(stream, "ANDN %s, %s", dest, source);
break;
// OR
case 0x38: case 0x39: case 0x3a: case 0x3b:
-
RR_format(source, dest, op, 0);
- util::stream_format(stream, "OR %s, %s", dest, source);
-
+ util::stream_format(stream, "OR %s, %s", dest, source);
break;
// XOR
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
-
RR_format(source, dest, op, 0);
- util::stream_format(stream, "XOR %s, %s", dest, source);
-
+ util::stream_format(stream, "XOR %s, %s", dest, source);
break;
// SUBC
case 0x40: case 0x41: case 0x42: case 0x43:
-
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "SUBC %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "SUBC %s, %s", dest, source);
- }
-
+ format_addsub(stream, "SUBC", dest, source, source_bit, source_code);
break;
// NOT
case 0x44: case 0x45: case 0x46: case 0x47:
-
- RR_format(source, dest, op, 0);
-
- util::stream_format(stream, "NOT %s, %s", dest, source);
-
- break;
-
- // SUB
- case 0x48: case 0x49: case 0x4a: case 0x4b:
-
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "SUB %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "SUB %s, %s", dest, source);
- }
-
+ util::stream_format(stream, "NOT %s, %s", dest, source);
break;
- // SUBS
- case 0x4c: case 0x4d: case 0x4e: case 0x4f:
-
+ case 0x48: case 0x49: case 0x4a: case 0x4b: // SUB
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f: // SUBS
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "SUBS %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "SUBS %s, %s", dest, source);
- }
-
+ format_addsub(stream, (op_num & 0x4) ? "SUBS" : "SUB", dest, source, source_bit, source_code);
break;
// ADDC
case 0x50: case 0x51: case 0x52: case 0x53:
-
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "ADDC %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "ADDC %s, %s", dest, source);
- }
-
+ format_addsub(stream, "ADDC", dest, source, source_bit, source_code);
break;
// AND
case 0x54: case 0x55: case 0x56: case 0x57:
-
- RR_format(source, dest, op, 0);
- util::stream_format(stream, "AND %s, %s", dest, source);
-
- break;
-
- // NEG
- case 0x58: case 0x59: case 0x5a: case 0x5b:
-
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "NEG %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "NEG %s, %s", dest, source);
- }
-
+ util::stream_format(stream, "AND %s, %s", dest, source);
break;
- // NEGS
- case 0x5c: case 0x5d: case 0x5e: case 0x5f:
-
+ case 0x58: case 0x59: case 0x5a: case 0x5b: // NEG
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f: // NEGS
RR_format(source, dest, op, 0);
-
- if( source_code == SR_REGISTER && !source_bit )
- {
- util::stream_format(stream, "NEGS %s, C", dest);
- }
- else
- {
- util::stream_format(stream, "NEGS %s, %s", dest, source);
- }
-
+ format_addsub(stream, (op_num & 0x4) ? "NEGS" : "NEG", dest, source, source_bit, source_code);
break;
// CMPI
case 0x60: case 0x61: case 0x62: case 0x63:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- util::stream_format(stream, "CMPI %s, $%x", dest, imm);
-
+ {
+ const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ util::stream_format(stream, "CMPI %s, $%x", dest, imm);
+ }
break;
- }
// MOVI
case 0x64: case 0x65: case 0x66: case 0x67:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, h_flag);
-
- util::stream_format(stream, "MOVI %s, $%x", dest, imm);
-
- break;
- }
-
- // ADDI
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- if( !DASM_N_VALUE(op) )
{
- util::stream_format(stream, "ADDI %s, CZ", dest);
+ const uint32_t imm = Rimm_format(dest, op, pc, opcodes, h_flag);
+ util::stream_format(stream, "MOVI %s, $%x", dest, imm);
}
- else
- {
- util::stream_format(stream, "ADDI %s, $%x", dest, imm);
- }
-
break;
- }
-
- // ADDSI
- case 0x6c: case 0x6d: case 0x6e: case 0x6f:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
- if( !DASM_N_VALUE(op) )
+ case 0x68: case 0x69: case 0x6a: case 0x6b: // ADDI
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f: // ADDSI
+ if (!DASM_N_VALUE(op))
{
- util::stream_format(stream, "ADDSI %s, CZ", dest);
+ util::stream_format(stream, "%-7s %s, CZ", (op_num & 0x4) ? "ADDSI" : "ADDI", dest);
}
else
{
- util::stream_format(stream, "ADDSI %s, $%x", dest, imm);
+ const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ util::stream_format(stream, "%-7s %s, $%x", (op_num & 0x4) ? "ADDSI" : "ADDI", dest, imm);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + imm));
}
-
break;
- }
// CMPBI
case 0x70: case 0x71: case 0x72: case 0x73:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- if( !DASM_N_VALUE(op) )
+ if (!DASM_N_VALUE(op))
{
- util::stream_format(stream, "CMPBI %s, ANYBZ", dest);
+ util::stream_format(stream, "CMPBI %s, ANYBZ", dest);
}
else
{
- if( DASM_N_VALUE(op) == 31 )
+ uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ if (DASM_N_VALUE(op) == 31)
imm = 0x7fffffff; //bit 31 = 0, others = 1
- util::stream_format(stream, "CMPBI %s, $%x", dest, imm);
+ util::stream_format(stream, "CMPBI %s, $%x", dest, imm);
}
-
break;
- }
// ANDNI
case 0x74: case 0x75: case 0x76: case 0x77:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- if( DASM_N_VALUE(op) == 31 )
- imm = 0x7fffffff; //bit 31 = 0, others = 1
-
- util::stream_format(stream, "ANDNI %s, $%x", dest, imm);
+ {
+ uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ if (DASM_N_VALUE(op) == 31)
+ imm = 0x7fffffff; //bit 31 = 0, others = 1
+ util::stream_format(stream, "ANDNI %s, $%x", dest, imm);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t((pc + size) & ~imm));
+ }
break;
- }
// ORI
case 0x78: case 0x79: case 0x7a: case 0x7b:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- util::stream_format(stream, "ORI %s, $%x", dest, imm);
+ {
+ const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ util::stream_format(stream, "ORI %s, $%x", dest, imm);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t((pc + size) | imm));
+ }
break;
- }
// XORI
case 0x7c: case 0x7d: case 0x7e: case 0x7f:
- {
- uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
-
- util::stream_format(stream, "XORI %s, $%x", dest, imm);
-
- break;
- }
-
- // SHRDI
- case 0x80: case 0x81:
- {
- uint8_t n = Ln_format(dest, op);
-
- util::stream_format(stream, "SHRDI %s, $%x", dest, n);
-
- break;
- }
-
- // SHRD
- case 0x82:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "SHRD %s, %s", dest, source);
-
- break;
-
- // SHR
- case 0x83:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "SHR %s, %s", dest, source);
-
- break;
-
- // SARDI
- case 0x84: case 0x85:
- {
- uint8_t n = Ln_format(dest, op);
-
- util::stream_format(stream, "SARDI %s, $%x", dest, n);
+ {
+ const uint32_t imm = Rimm_format(dest, op, pc, opcodes, 0);
+ util::stream_format(stream, "XORI %s, $%x", dest, imm);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t((pc + size) ^ imm));
+ }
break;
- }
-
- // SARD
- case 0x86:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "SARD %s, %s", dest, source);
+ case 0x80: case 0x81: // SHRDI
+ case 0x84: case 0x85: // SARDI
+ {
+ const uint8_t n = Ln_format(dest, op);
+ util::stream_format(stream, "S%cRDI %s, $%x", (op_num & 0x4) ? 'A' : 'H', dest, n);
+ }
break;
- // SAR
- case 0x87:
-
+ case 0x82: // SHRD
+ case 0x83: // SHR
+ case 0x86: // SARD
+ case 0x87: // SAR
LL_format(source, dest, op);
-
- util::stream_format(stream, "SAR %s, %s", dest, source);
-
+ util::stream_format(stream, "S%cR%c %s, %s",
+ (op_num & 0x4) ? 'A' : 'H',
+ (op_num & 0x1) ? ' ' : 'D',
+ dest,
+ source);
break;
// SHLDI
case 0x88: case 0x89:
- {
- uint8_t n = Ln_format(dest, op);
-
- util::stream_format(stream, "SHLDI %s, $%x", dest, n);
-
- break;
- }
-
- // SHLD
- case 0x8a:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "SHLD %s, %s", dest, source);
-
+ {
+ const uint8_t n = Ln_format(dest, op);
+ util::stream_format(stream, "SHLDI %s, $%x", dest, n);
+ }
break;
- // SHL
- case 0x8b:
-
+ case 0x8a: // SHLD
+ case 0x8b: // SHL
LL_format(source, dest, op);
-
- util::stream_format(stream, "SHL %s, %s", dest, source);
-
+ util::stream_format(stream, "SHL%c %s, %s", (op_num & 0x1) ? ' ' : 'D', dest, source);
break;
// RESERVED
case 0x8c: case 0x8d:
case 0xac: case 0xad: case 0xae: case 0xaf:
-
- util::stream_format(stream, "Reserved");
-
+ util::stream_format(stream, "D.HU $%04x", op);
break;
// TESTLZ
case 0x8e:
-
LL_format(source, dest, op);
-
- util::stream_format(stream, "TESTLZ %s, %s", dest, source);
-
+ util::stream_format(stream, "TESTLZ %s, %s", dest, source);
break;
// ROL
case 0x8f:
-
LL_format(source, dest, op);
-
- util::stream_format(stream, "ROL %s, %s", dest, source);
-
+ util::stream_format(stream, "ROL %s, %s", dest, source);
break;
- // LDxx.D/A/IOD/IOA
- case 0x90: case 0x91: case 0x92: case 0x93:
- {
- uint16_t next_op = opcodes.r16(pc + 2);
- uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
-
- if( size == 2 )
- size = 4;
-
- if( dest_code == SR_REGISTER && !dest_bit )
+ case 0x90: case 0x91: case 0x92: case 0x93: // LDxx.D/A/IOD/IOA
+ case 0x98: case 0x99: case 0x9a: case 0x9b: // STxx.D/A/IOD/IOA
{
- switch( DD( next_op ) )
- {
- case 0:
- // LDBS.A
- util::stream_format(stream, "LDBS.A 0, %s, $%x", source, dis);
- break;
+ const uint16_t next_op = opcodes.r16(pc + 2);
+ const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
- case 1:
- // LDBU.A
- util::stream_format(stream, "LDBU.A 0, %s, $%x", source, dis);
- break;
+ if (size == 2)
+ size = 4;
- case 2:
- // LDHS.A
- if( dis & 1 )
- {
- util::stream_format(stream, "LDHS.A 0, %s, $%x", source, dis & ~1);
- }
- // LDHU.A
- else
- {
- util::stream_format(stream, "LDHU.A 0, %s, $%x", source, dis & ~1);
- }
+ if ((op_num & 0x8) && !source_bit && (source_code == SR_REGISTER))
+ source = "0";
- break;
+ if (!dest_bit && (dest_code == SR_REGISTER))
+ dest = "0";
- case 3:
- // LDD.IOA
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "LDD.IOA 0, %s, $%x", source, dis & ~3);
- }
- // LDW.IOA
- else if( (dis & 3) == 2 )
- {
- util::stream_format(stream, "LDW.IOA 0, %s, $%x", source, dis & ~3);
- }
- // LDD.A
- else if( (dis & 3) == 1 )
- {
- util::stream_format(stream, "LDD.A 0, %s, $%x", source, dis & ~1);
- }
- // LDW.A
- else
- {
- util::stream_format(stream, "LDW.A 0, %s, $%x", source, dis & ~1);
- }
+ const std::string_view inst = (op_num & 0x8) ? "ST" : "LD";
+ const char mode = (!dest_bit && (dest_code == SR_REGISTER)) ? 'A' : 'D';
- break;
- }
- }
- else
- {
- switch( DD( next_op ) )
+ switch (DD(next_op))
{
case 0:
- // LDBS.D
- util::stream_format(stream, "LDBS.D %s, %s, $%x", dest, source, dis);
+ // LD/STBS.D/A
+ util::stream_format(stream, "%sBS.%c %s, %s, $%x", inst, mode, dest, source, dis);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + dis));
break;
case 1:
- // LDBU.D
- util::stream_format(stream, "LDBU.D %s, %s, $%x", dest, source, dis);
+ // LD/STBU.D/A
+ util::stream_format(stream, "%sBU.%c %s, %s, $%x", inst, mode, dest, source, dis);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + dis));
break;
case 2:
- // LDHS.D
- if( dis & 1 )
- {
- util::stream_format(stream, "LDHS.D %s, %s, $%x", dest, source, dis & ~1);
- }
- // LDHU.D
- else
- {
- util::stream_format(stream, "LDHU.D %s, %s, $%x", dest, source, dis & ~1);
- }
+ // LD/STHU.D/A
+ // LD/STHS.D/A
+ util::stream_format(stream, "%sH%c.%c %s, %s, $%x", inst, (dis & 1) ? 'S' : 'U', mode, dest, source, dis & ~1);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + (dis & ~1)) & ~1);
break;
case 3:
- // LDD.IOD
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "LDD.IOD %s, %s, $%x", dest, source, dis & ~3);
- }
- // LDW.IOD
- else if( (dis & 3) == 2 )
+ if (dis & 2)
{
- util::stream_format(stream, "LDW.IOD %s, %s, $%x", dest, source, dis & ~3);
+ // LD/STW.IOD/A
+ // LD/STD.IOD/A
+ util::stream_format(stream, "%s%c.IO%c %s, %s, $%x", inst, (dis & 1) ? 'D' : 'W', mode, dest, source, dis & ~3);
}
- // LDD.D
- else if( (dis & 3) == 1 )
- {
- util::stream_format(stream, "LDD.D %s, %s, $%x", dest, source, dis & ~1);
- }
- // LDW.D
else
{
- util::stream_format(stream, "LDW.D %s, %s, $%x", dest, source, dis & ~1);
+ // LD/STW.D/A
+ // LD/STD.D/A
+ util::stream_format(stream, "%s%c.%c %s, %s, $%x", inst, (dis & 1) ? 'D' : 'W', mode, dest, source, dis & ~3);
}
-
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + (dis & ~3)) & ~3);
break;
}
}
-
break;
- }
-
- // LDxx.N/S
- case 0x94: case 0x95: case 0x96: case 0x97:
- {
- uint16_t next_op = opcodes.r16(pc + 2);
- uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
-
- if( size == 2 )
- size = 4;
-
- if( (dest_code == PC_REGISTER && !dest_bit) || (dest_code == SR_REGISTER && !dest_bit) )
- {
- util::stream_format(stream, "Reserved");
- break;
- }
- switch( DD( next_op ) )
+ case 0x94: case 0x95: case 0x96: case 0x97: // LDxx.N/S
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f: // STxx.N/S
{
- case 0:
- // LDBS.N
- util::stream_format(stream, "LDBS.N %s, %s, $%x", dest, source, dis);
- break;
-
- case 1:
- // LDBU.N
- util::stream_format(stream, "LDBU.N %s, %s, $%x", dest, source, dis);
- break;
-
- case 2:
- // LDHS.N
- if( dis & 1 )
- {
- util::stream_format(stream, "LDHS.N %s, %s, $%x", dest, source, dis & ~1);
- }
- // LDHU.N
- else
- {
- util::stream_format(stream, "LDHU.N %s, %s, $%x", dest, source, dis & ~1);
- }
+ const uint16_t next_op = opcodes.r16(pc + 2);
+ const uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
- break;
-
- case 3:
- // LDW.S
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "LDW.S %s, %s, $%x", dest, source, dis & ~3);
- }
- // Reserved
- else if( (dis & 3) == 2 )
- {
- util::stream_format(stream, "Reserved");
- }
- // LDD.N
- else if( (dis & 3) == 1 )
- {
- util::stream_format(stream, "LDD.N %s, %s, $%x", dest, source, dis & ~1);
- }
- // LDW.N
- else
- {
- util::stream_format(stream, "LDW.N %s, %s, $%x", dest, source, dis & ~1);
- }
+ if (size == 2)
+ size = 4;
+ if (!dest_bit && ((dest_code == PC_REGISTER) || (dest_code == SR_REGISTER)))
+ {
+ util::stream_format(stream, "Reserved");
break;
- }
-
- break;
- }
-
- // STxx.D/A/IOD/IOA
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- {
- uint16_t next_op = opcodes.r16(pc + 2);
- uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
+ }
- if( size == 2 )
- size = 4;
+ if ((op_num & 0x8) && !source_bit && (source_code == SR_REGISTER))
+ source = "0";
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
+ const std::string_view inst = (op_num & 0x8) ? "ST" : "LD";
- if( dest_code == SR_REGISTER && !dest_bit )
- {
- switch( DD( next_op ) )
+ switch (DD(next_op))
{
case 0:
- // STBS.A
- util::stream_format(stream, "STBS.A 0, %s, $%x", source, dis);
+ // LD/STBS.N
+ util::stream_format(stream, "%sBS.N %s, %s, $%x", inst, dest, source, dis);
break;
case 1:
- // STBU.A
- util::stream_format(stream, "STBU.A 0, %s, $%x", source, dis);
+ // LD/STBU.N
+ util::stream_format(stream, "%sBU.N %s, %s, $%x", inst, dest, source, dis);
break;
case 2:
- // STHS.A
- if( dis & 1 )
- {
- util::stream_format(stream, "STHS.A 0, %s, $%x", source, dis & ~1);
- }
- // STHU.A
- else
- {
- util::stream_format(stream, "STHU.A 0, %s, $%x", source, dis & ~1);
- }
-
+ // LD/STHU.N
+ // LD/STHS.N
+ util::stream_format(stream, "%sH%c.N %s, %s, $%x", inst, (dis & 1) ? 'S' : 'U', dest, source, dis & ~1);
break;
case 3:
- // STD.IOA
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "STD.IOA 0, %s, $%x", source, dis & ~3);
- }
- // STW.IOA
- else if( (dis & 3) == 2 )
+ if ((dis & 3) == 3)
{
- util::stream_format(stream, "STW.IOA 0, %s, $%x", source, dis & ~3);
+ // LD/STW.S
+ util::stream_format(stream, "%sW.S %s, %s, $%x", inst, dest, source, dis & ~3);
}
- // STD.A
- else if( (dis & 3) == 1 )
+ else if ((dis & 3) == 2)
{
- util::stream_format(stream, "STD.A 0, %s, $%x", source, dis & ~1);
+ // Reserved
+ util::stream_format(stream, "Reserved");
}
- // STW.A
else
{
- util::stream_format(stream, "STW.A 0, %s, $%x", source, dis & ~1);
+ // LD/STW.N
+ // LD/STD.N
+ util::stream_format(stream, "%s%c.N %s, %s, $%x", inst, (dis & 1) ? 'D' : 'W', dest, source, dis & ~3);
}
-
break;
}
}
- else
- {
- switch( DD( next_op ) )
- {
- case 0:
- // STBS.D
- util::stream_format(stream, "STBS.D %s, %s, $%x", dest, source, dis);
- break;
-
- case 1:
- // STBU.D
- util::stream_format(stream, "STBU.D %s, %s, $%x", dest, source, dis);
- break;
-
- case 2:
- // STHS.D
- if( dis & 1 )
- {
- util::stream_format(stream, "STHS.D %s, %s, $%x", dest, source, dis & ~1);
- }
- // STHU.D
- else
- {
- util::stream_format(stream, "STHU.D %s, %s, $%x", dest, source, dis & ~1);
- }
- break;
-
- case 3:
- // STD.IOD
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "STD.IOD %s, %s, $%x", dest, source, dis & ~3);
- }
- // STW.IOD
- else if( (dis & 3) == 2 )
- {
- util::stream_format(stream, "STW.IOD %s, %s, $%x", dest, source, dis & ~3);
- }
- // STD.D
- else if( (dis & 3) == 1 )
- {
- util::stream_format(stream, "STD.D %s, %s, $%x", dest, source, dis & ~1);
- }
- // STW.D
- else
- {
- util::stream_format(stream, "STW.D %s, %s, $%x", dest, source, dis & ~1);
- }
-
- break;
- }
- }
-
break;
- }
-
- // STxx.N/S
- case 0x9c: case 0x9d: case 0x9e: case 0x9f:
- {
- uint16_t next_op = opcodes.r16(pc + 2);
- uint32_t dis = RRdis_format(source, dest, op, next_op, pc, opcodes);
- if( size == 2 )
- size = 4;
-
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
-
- if( (dest_code == PC_REGISTER && !dest_bit) || (dest_code == SR_REGISTER && !dest_bit) )
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: // SHRI
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7: // SARI
{
- util::stream_format(stream, "Reserved");
- break;
- }
-
- switch( DD( next_op ) )
- {
- case 0:
- // STBS.N
- util::stream_format(stream, "STBS.N %s, %s, $%x", dest, source, dis);
- break;
-
- case 1:
- // STBU.N
- util::stream_format(stream, "STBU.N %s, %s, $%x", dest, source, dis);
- break;
-
- case 2:
- // STHS.N
- if( dis & 1 )
- {
- util::stream_format(stream, "STHS.N %s, %s, $%x", dest, source, dis & ~1);
- }
- // STHU.N
- else
- {
- util::stream_format(stream, "STHU.N %s, %s, $%x", dest, source, dis & ~1);
- }
-
- break;
-
- case 3:
- // STW.S
- if( (dis & 3) == 3 )
- {
- util::stream_format(stream, "STW.S %s, %s, $%x", dest, source, dis & ~3);
- }
- // Reserved
- else if( (dis & 3) == 2 )
- {
- util::stream_format(stream, "Reserved");
- }
- // STD.N
- else if( (dis & 3) == 1 )
- {
- util::stream_format(stream, "STD.N %s, %s, $%x", dest, source, dis & ~1);
- }
- // STW.N
- else
- {
- util::stream_format(stream, "STW.N %s, %s, $%x", dest, source, dis & ~1);
- }
-
- break;
+ const uint8_t n = Rn_format(dest, op);
+ util::stream_format(stream, "S%cRI %s, $%x", (op_num & 0x4) ? 'A' : 'H', dest, n);
}
-
break;
- }
-
- // SHRI
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- {
- uint8_t n = Rn_format(dest, op);
-
- util::stream_format(stream, "SHRI %s, $%x", dest, n);
-
- break;
- }
-
- // SARI
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- {
- uint8_t n = Rn_format(dest, op);
-
- util::stream_format(stream, "SARI %s, $%x", dest, n);
-
- break;
- }
// SHLI
case 0xa8: case 0xa9: case 0xaa: case 0xab:
- {
- uint8_t n = Rn_format(dest, op);
-
- util::stream_format(stream, "SHLI %s, $%x", dest, n);
-
- break;
- }
-
- // MULU
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
-
- RR_format(source, dest, op, 0);
-
- util::stream_format(stream, "MULU %s, %s", dest, source);
-
+ {
+ const uint8_t n = Rn_format(dest, op);
+ util::stream_format(stream, "SHLI %s, $%x", dest, n);
+ }
break;
- // MULS
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
-
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: // MULU
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7: // MULS
RR_format(source, dest, op, 0);
-
- util::stream_format(stream, "MULS %s, %s", dest, source);
-
+ util::stream_format(stream, "MUL%c %s, %s", (op_num & 0x4) ? 'S' : 'U', dest, source);
break;
// SETxx - SETADR - FETCH
case 0xb8: case 0xb9: case 0xba: case 0xbb:
- {
- uint8_t n = Rn_format(dest, op);
-
- if( dest_code == PC_REGISTER && !dest_bit )
- {
- util::stream_format(stream, "Illegal PC: $%x OP: $%x", pc, op);
- }
- else if( dest_code == SR_REGISTER && !dest_bit )
{
- util::stream_format(stream, "FETCH $%x", (n / 2) + 1);
- }
- else
- {
- util::stream_format(stream, "%s %s", SETxx[n], dest);
- }
+ const uint8_t n = Rn_format(dest, op);
+ if (!dest_bit && (dest_code == PC_REGISTER))
+ {
+ // SETxx with PC as destination is reserved for future use
+ util::stream_format(stream, "D.HU $%04x", op);
+ }
+ else if (!dest_bit && (dest_code == SR_REGISTER))
+ {
+ util::stream_format(stream, "FETCH $%x", (n / 2) + 1);
+ }
+ else
+ {
+ char const *const inst = SETxx[n];
+ if (inst)
+ util::stream_format(stream, "%-7s %s", inst, dest);
+ else
+ util::stream_format(stream, "D.HU $%04x", op);
+ }
+ }
break;
- }
// MUL
case 0xbc: case 0xbd: case 0xbe: case 0xbf:
-
RR_format(source, dest, op, 0);
-
- util::stream_format(stream, "MUL %s, %s", dest, source);
-
- break;
-
- // FADD
- case 0xc0:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FADD %s, %s", dest, source);
-
- break;
-
- // FADDD
- case 0xc1:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FADDD %s, %s", dest, source);
-
- break;
-
- // FSUB
- case 0xc2:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FSUB %s, %s", dest, source);
-
- break;
-
- // FSUBD
- case 0xc3:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FSUBD %s, %s", dest, source);
-
- break;
-
- // FMUL
- case 0xc4:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FMUL %s, %s", dest, source);
-
- break;
-
- // FMULD
- case 0xc5:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FMULD %s, %s", dest, source);
-
- break;
-
- // FDIV
- case 0xc6:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FDIV %s, %s", dest, source);
-
- break;
-
- // FDIVD
- case 0xc7:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FDIVD %s, %s", dest, source);
-
- break;
-
- // FCMP
- case 0xc8:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FCMP %s, %s", dest, source);
-
- break;
-
- // FCMPD
- case 0xc9:
-
+ util::stream_format(stream, "MUL %s, %s", dest, source);
+ break;
+
+ case 0xc0: // FADD
+ case 0xc1: // FADDD
+ case 0xc2: // FSUB
+ case 0xc3: // FSUBD
+ case 0xc4: // FMUL
+ case 0xc5: // FMULD
+ case 0xc6: // FDIV
+ case 0xc7: // FDIVD
+ case 0xc8: // FCMP
+ case 0xc9: // FCMPD
+ case 0xca: // FCMPU
+ case 0xcb: // FCMPUD
+ case 0xcc: // FCVT
+ case 0xcd: // FCVTD
LL_format(source, dest, op);
-
- util::stream_format(stream, "FCMPD %s, %s", dest, source);
-
+ util::stream_format(stream, "%-7s %s, %s", Fxxx[op_num & 0xf], dest, source);
break;
- // FCMPU
- case 0xca:
-
- LL_format(source, dest, op);
-
- util::stream_format(stream, "FCMPU %s, %s", dest, source);
-
- break;
+ // EXTEND
+ case 0xce:
+ {
+ LL_format(source, dest, op);
- // FCMPUD
- case 0xcb:
+ pc += 2;
+ const uint16_t extended_op = opcodes.r16(pc);
- LL_format(source, dest, op);
+ size = 4;
- util::stream_format(stream, "FCMPUD %s, %s", dest, source);
+ switch (extended_op)
+ {
+ case 0x100:
+ case EMUL:
+ util::stream_format(stream, "EMUL %s, %s", dest, source);
+ break;
- break;
+ case EMULU:
+ util::stream_format(stream, "EMULU %s, %s", dest, source);
+ break;
- // FCVT
- case 0xcc:
+ case EMULS:
+ util::stream_format(stream, "EMULS %s, %s", dest, source);
+ break;
- LL_format(source, dest, op);
+ case EMAC:
+ util::stream_format(stream, "EMAC %s, %s", dest, source);
+ break;
- util::stream_format(stream, "FCVT %s, %s", dest, source);
+ case EMACD:
+ util::stream_format(stream, "EMACD %s, %s", dest, source);
+ break;
- break;
+ case EMSUB:
+ util::stream_format(stream, "EMSUB %s, %s", dest, source);
+ break;
- // FCVTD
- case 0xcd:
+ case EMSUBD:
+ util::stream_format(stream, "EMSUBD %s, %s", dest, source);
+ break;
- LL_format(source, dest, op);
+ case EHMAC:
+ util::stream_format(stream, "EHMAC %s, %s", dest, source);
+ break;
- util::stream_format(stream, "FCVTD %s, %s", dest, source);
+ case EHMACD:
+ util::stream_format(stream, "EHMACD %s, %s", dest, source);
+ break;
- break;
+ case EHCMULD:
+ util::stream_format(stream, "EHCMULD %s, %s", dest, source);
+ break;
- // EXTEND
- case 0xce:
- {
- uint16_t extended_op;
+ case EHCMACD:
+ util::stream_format(stream, "EHCMACD %s, %s", dest, source);
+ break;
- LL_format(source, dest, op);
+ case EHCSUMD:
+ util::stream_format(stream, "EHCSUMD %s, %s", dest, source);
+ break;
- pc += 2;
- extended_op = opcodes.r16(pc);
+ case EHCFFTD:
+ util::stream_format(stream, "EHCFFTD %s, %s", dest, source);
+ break;
- size = 4;
+ case EHCFFTSD:
+ util::stream_format(stream, "EHCFFTSD %s, %s", dest, source);
+ break;
- switch( extended_op )
- {
- case 0x100:
- case EMUL:
- util::stream_format(stream, "EMUL %s, %s", dest, source);
- break;
-
- case EMULU:
- util::stream_format(stream, "EMULU %s, %s", dest, source);
- break;
-
- case EMULS:
- util::stream_format(stream, "EMULS %s, %s", dest, source);
- break;
-
- case EMAC:
- util::stream_format(stream, "EMAC %s, %s", dest, source);
- break;
-
- case EMACD:
- util::stream_format(stream, "EMACD %s, %s", dest, source);
- break;
-
- case EMSUB:
- util::stream_format(stream, "EMSUB %s, %s", dest, source);
- break;
-
- case EMSUBD:
- util::stream_format(stream, "EMSUBD %s, %s", dest, source);
- break;
-
- case EHMAC:
- util::stream_format(stream, "EHMAC %s, %s", dest, source);
- break;
-
- case EHMACD:
- util::stream_format(stream, "EHMACD %s, %s", dest, source);
- break;
-
- case EHCMULD:
- util::stream_format(stream, "EHCMULD %s, %s", dest, source);
- break;
-
- case EHCMACD:
- util::stream_format(stream, "EHCMACD %s, %s", dest, source);
- break;
-
- case EHCSUMD:
- util::stream_format(stream, "EHCSUMD %s, %s", dest, source);
- break;
-
- case EHCFFTD:
- util::stream_format(stream, "EHCFFTD %s, %s", dest, source);
- break;
-
- case EHCFFTSD:
- util::stream_format(stream, "EHCFFTSD %s, %s", dest, source);
- break;
-
- default:
- util::stream_format(stream, "Ext. OP $%X @ %X", extended_op, pc);
- osd_printf_verbose("Illegal Extended Opcode: %X @ %X\n", extended_op, pc);
- break;
+ default:
+ util::stream_format(stream, "Ext. OP $%X @ %X", extended_op, pc);
+ osd_printf_verbose("Illegal Extended Opcode: %X @ %X\n", extended_op, pc);
+ break;
+ }
}
-
break;
- }
// DO
case 0xcf:
-
LL_format(source, dest, op);
-
- util::stream_format(stream, "DO %s, %s", dest, source);
-
- break;
-
- // LDW.R
- case 0xd0: case 0xd1:
-
- LR_format(source, dest, op);
-
- util::stream_format(stream, "LDW.R %s, %s", dest, source);
-
- break;
-
- // LDD.R
- case 0xd2: case 0xd3:
-
- LR_format(source, dest, op);
-
- util::stream_format(stream, "LDD.R %s, %s", dest, source);
-
- break;
-
- // LDW.P
- case 0xd4: case 0xd5:
-
- LR_format(source, dest, op);
-
- util::stream_format(stream, "LDW.P %s, %s", dest, source);
-
+ util::stream_format(stream, "DO %s, %s", dest, source);
break;
- // LDD.P
- case 0xd6: case 0xd7:
-
- LR_format(source, dest, op);
-
- util::stream_format(stream, "LDD.P %s, %s", dest, source);
-
- break;
-
- // STW.R
- case 0xd8: case 0xd9:
-
- LR_format(source, dest, op);
-
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
-
- util::stream_format(stream, "STW.R %s, %s", dest, source);
-
- break;
-
- // STD.R
- case 0xda: case 0xdb:
-
- LR_format(source, dest, op);
-
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
-
- util::stream_format(stream, "STD.R %s, %s", dest, source);
-
- break;
-
- // STW.P
- case 0xdc: case 0xdd:
-
+ case 0xd0: case 0xd1: // LDW.R
+ case 0xd2: case 0xd3: // LDD.R
+ case 0xd4: case 0xd5: // LDW.P
+ case 0xd6: case 0xd7: // LDD.P
+ case 0xd8: case 0xd9: // STW.R
+ case 0xda: case 0xdb: // STD.R
+ case 0xdc: case 0xdd: // STW.P
+ case 0xde: case 0xdf: // STD.P
LR_format(source, dest, op);
-
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
-
- util::stream_format(stream, "STW.P %s, %s", dest, source);
-
- break;
-
- // STD.P
- case 0xde: case 0xdf:
-
- LR_format(source, dest, op);
-
- if( source_code == SR_REGISTER && !source_bit )
- strcpy(source,"0");
-
- util::stream_format(stream, "STD.P %s, %s", dest, source);
-
- break;
-
- // DBV
- case 0xe0:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBV $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBNV
- case 0xe1:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBNV $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBE
- case 0xe2:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBE $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBNE
- case 0xe3:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBNE $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBC
- case 0xe4:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBC $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBNC
- case 0xe5:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBNC $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBSE
- case 0xe6:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBSE $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBHT
- case 0xe7:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBHT $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBN
- case 0xe8:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBN $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBNN
- case 0xe9:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBNN $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBLE
- case 0xea:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBLE $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBGT
- case 0xeb:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBGT $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
- break;
- }
-
- // DBR
- case 0xec:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "DBR $%x", rel);
- flags = STEP_COND | step_over_extra(1);
-
+ util::stream_format(stream, "%s%c.%c %s, %s",
+ (op_num & 0x8) ? "ST" : "LD",
+ (op_num & 0x2) ? 'D' : 'W',
+ (op_num & 0x4) ? 'P' : 'R',
+ dest,
+ ((op_num & 0x8) && !source_bit && (source_code == SR_REGISTER)) ? "0" : source);
+ break;
+
+ case 0xe0: // DBV
+ case 0xe1: // DBNV
+ case 0xe2: // DBE
+ case 0xe3: // DBNE
+ case 0xe4: // DBC
+ case 0xe5: // DBNC
+ case 0xe6: // DBSE
+ case 0xe7: // DBHT
+ case 0xe8: // DBN
+ case 0xe9: // DBNN
+ case 0xea: // DBLE
+ case 0xeb: // DBGT
+ case 0xec: // DBR
+ {
+ const int32_t rel = PCrel_format(op, pc, opcodes) + 2;
+ util::stream_format(stream, "D%-6s $%x", Bxx[op_num & 0xf], rel);
+ if (op_num != 0xec)
+ flags = STEP_COND | step_over_extra(1);
+ }
break;
- }
// FRAME
case 0xed:
-
- global_fp = 0;
LL_format(source, dest, op);
-
- util::stream_format(stream, "FRAME %s, %s", dest, source);
-
+ util::stream_format(stream, "FRAME %s, %s", dest, source);
break;
// CALL
case 0xee: case 0xef:
- {
- uint32_t const_val = LRconst_format(source, dest, op, pc, opcodes);
-
- if( source_code == SR_REGISTER && !source_bit )
{
- util::stream_format(stream, "CALL %s, 0, $%x", dest, const_val);
- flags = STEP_OVER;
- }
- else
- {
- util::stream_format(stream, "CALL %s, %s, $%x", dest, source, const_val);
+ const uint32_t const_val = LRconst_format(source, dest, op, pc, opcodes);
+
+ util::stream_format(stream, "CALL %s, %s, $%x", dest, (!source_bit && (source_code == SR_REGISTER)) ? "0" : source, const_val);
+ if (!source_bit && (source_code == PC_REGISTER))
+ util::stream_format(stream, " ; $%x", uint32_t(pc + size + const_val));
flags = STEP_OVER;
}
-
break;
- }
-
- // BV
- case 0xf0:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BV $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BNV
- case 0xf1:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BNV $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BE
- case 0xf2:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BE $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BNE
- case 0xf3:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BNE $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BC
- case 0xf4:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BC $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BNC
- case 0xf5:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BNC $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BSE
- case 0xf6:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BSE $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BHT
- case 0xf7:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BHT $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BN
- case 0xf8:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BN $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BNN
- case 0xf9:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BNN $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BLE
- case 0xfa:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BLE $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BGT
- case 0xfb:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BGT $%x", rel);
- flags = STEP_COND;
-
- break;
- }
-
- // BR
- case 0xfc:
- {
- int32_t rel = PCrel_format(op, pc, opcodes) + 2;
-
- util::stream_format(stream, "BR $%x", rel);
+ case 0xf0: // BV
+ case 0xf1: // BNV
+ case 0xf2: // BE
+ case 0xf3: // BNE
+ case 0xf4: // BC
+ case 0xf5: // BNC
+ case 0xf6: // BSE
+ case 0xf7: // BHT
+ case 0xf8: // BN
+ case 0xf9: // BNN
+ case 0xfa: // BLE
+ case 0xfb: // BGT
+ case 0xfc: // BR
+ {
+ const int32_t rel = PCrel_format(op, pc, opcodes) + 2;
+ util::stream_format(stream, "%-7s $%x", Bxx[op_num & 0xf], rel);
+ if (op_num != 0xfc)
+ flags = STEP_COND;
+ }
break;
- }
// TRAPxx - TRAP
case 0xfd: case 0xfe: case 0xff:
- {
- uint8_t code = ((op & 0x300) >> 6) | (op & 0x03);
- uint8_t trapno = (op & 0xfc) >> 2;
-
- switch( code )
{
- case TRAPLE:
- util::stream_format(stream, "TRAPLE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPGT:
- util::stream_format(stream, "TRAPGT %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPLT:
- util::stream_format(stream, "TRAPLT %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPGE:
- util::stream_format(stream, "TRAPGE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPSE:
- util::stream_format(stream, "TRAPSE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPHT:
- util::stream_format(stream, "TRAPHT %d", trapno);
- flags = STEP_OVER | STEP_COND;
+ const uint8_t code = ((op & 0x300) >> 6) | (op & 0x03);
+ const uint8_t trapno = (op & 0xfc) >> 2;
- break;
-
- case TRAPST:
- util::stream_format(stream, "TRAPST %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPHE:
- util::stream_format(stream, "TRAPHE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPE:
- util::stream_format(stream, "TRAPE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPNE:
- util::stream_format(stream, "TRAPNE %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAPV:
- util::stream_format(stream, "TRAPV %d", trapno);
- flags = STEP_OVER | STEP_COND;
-
- break;
-
- case TRAP:
- util::stream_format(stream, "TRAP %d", trapno);
+ util::stream_format(stream, "%-7s %d", TRAPxx[code], trapno);
+ if (code == TRAP)
flags = STEP_OVER;
-
- break;
+ else
+ flags = STEP_OVER | STEP_COND;
}
-
break;
- }
}
return size | flags | SUPPORTED;
diff --git a/src/devices/cpu/e132xs/32xsdasm.h b/src/devices/cpu/e132xs/32xsdasm.h
index 6f84fa5321f..32f9c6df587 100644
--- a/src/devices/cpu/e132xs/32xsdasm.h
+++ b/src/devices/cpu/e132xs/32xsdasm.h
@@ -12,13 +12,16 @@
#pragma once
+#include <string_view>
+
+
class hyperstone_disassembler : public util::disasm_interface
{
public:
- struct config {
+ struct config
+ {
virtual ~config() = default;
- virtual u8 get_fp() const = 0;
virtual bool get_h() const = 0;
};
@@ -29,25 +32,15 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- static const char *const L_REG[];
- static const char *const G_REG[];
- static const char *const SETxx[];
-
config *m_config;
int size;
- u8 global_fp;
-
- void LL_format(char *source, char *dest, uint16_t op);
- void LR_format(char *source, char *dest, uint16_t op);
- void RR_format(char *source, char *dest, uint16_t op, unsigned h_flag);
- uint32_t LRconst_format(char *source, char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes);
- uint32_t RRconst_format(char *source, char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes);
- int32_t Rimm_format(char *dest, uint16_t op, offs_t &pc, const data_buffer &opcodes, unsigned h_flag);
- uint8_t Ln_format(char *dest, uint16_t op);
- uint8_t Rn_format(char *dest, uint16_t op);
+
+ uint32_t LRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes);
+ uint32_t RRconst_format(std::string_view &source, std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes);
+ int32_t Rimm_format(std::string_view &dest, uint16_t op, offs_t pc, const data_buffer &opcodes, unsigned h_flag);
int32_t PCrel_format(uint16_t op, offs_t pc, const data_buffer &opcodes);
- uint32_t RRdis_format(char *source, char *dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes);
+ uint32_t RRdis_format(std::string_view &source, std::string_view &dest, uint16_t op, uint16_t next_op, offs_t pc, const data_buffer &opcodes);
};
#endif
diff --git a/src/devices/cpu/e132xs/32xsdefs.h b/src/devices/cpu/e132xs/32xsdefs.h
index 78413ec5863..9dad4d780c5 100644
--- a/src/devices/cpu/e132xs/32xsdefs.h
+++ b/src/devices/cpu/e132xs/32xsdefs.h
@@ -1,24 +1,39 @@
// license:BSD-3-Clause
// copyright-holders:Pierpaolo Prazzoli
-#ifndef MAME_CPU_E132XS_XS32DEFS_H
-#define MAME_CPU_E132XS_XS32DEFS_H
+#ifndef MAME_CPU_E132XS_32XSDEFS_H
+#define MAME_CPU_E132XS_32XSDEFS_H
+
+#pragma once
/***************************************************************************
COMPILE-TIME DEFINITIONS
***************************************************************************/
-#define PC_REGISTER 0
-#define SR_REGISTER 1
-#define SP_REGISTER 18
-#define UB_REGISTER 19
-#define BCR_REGISTER 20
-#define TPR_REGISTER 21
-#define TCR_REGISTER 22
-#define TR_REGISTER 23
-#define WCR_REGISTER 24
-#define ISR_REGISTER 25
-#define FCR_REGISTER 26
-#define MCR_REGISTER 27
+// compilation boundaries -- how far back/forward does the analysis extend?
+enum : u32
+{
+ COMPILE_BACKWARDS_BYTES = 128,
+ COMPILE_FORWARDS_BYTES = 512,
+ COMPILE_MAX_INSTRUCTIONS = (COMPILE_BACKWARDS_BYTES / 2) + (COMPILE_FORWARDS_BYTES / 2),
+ COMPILE_MAX_SEQUENCE = 64
+};
+
+enum
+{
+ PC_REGISTER = 0,
+ SR_REGISTER = 1,
+ FER_REGISTER = 2,
+ SP_REGISTER = 18,
+ UB_REGISTER = 19,
+ BCR_REGISTER = 20,
+ TPR_REGISTER = 21,
+ TCR_REGISTER = 22,
+ TR_REGISTER = 23,
+ WCR_REGISTER = 24,
+ ISR_REGISTER = 25,
+ FCR_REGISTER = 26,
+ MCR_REGISTER = 27
+};
#define X_CODE(val) ((val & 0x7000) >> 12)
#define E_BIT(val) ((val & 0x8000) >> 15)
@@ -57,34 +72,41 @@
#define EMSUBD 0x11e
#define EHCFFTSD 0x296
-/* IRQ numbers */
-#define IRQ_INT1 0
-#define IRQ_INT2 1
-#define IRQ_INT3 2
-#define IRQ_INT4 3
-#define IRQ_IO1 4
-#define IRQ_IO2 5
-#define IRQ_IO3 6
-
-/* Trap numbers */
-#define TRAPNO_IO2 48
-#define TRAPNO_IO1 49
-#define TRAPNO_INT4 50
-#define TRAPNO_INT3 51
-#define TRAPNO_INT2 52
-#define TRAPNO_INT1 53
-#define TRAPNO_IO3 54
-#define TRAPNO_TIMER 55
-#define TRAPNO_RESERVED1 56
-#define TRAPNO_TRACE_EXCEPTION 57
-#define TRAPNO_PARITY_ERROR 58
-#define TRAPNO_EXTENDED_OVERFLOW 59
-#define TRAPNO_RANGE_ERROR 60
-#define TRAPNO_PRIVILEGE_ERROR TRAPNO_RANGE_ERROR
-#define TRAPNO_FRAME_ERROR TRAPNO_RANGE_ERROR
-#define TRAPNO_RESERVED2 61
-#define TRAPNO_RESET 62 // reserved if not mapped @ MEM3
-#define TRAPNO_ERROR_ENTRY 63 // for instruction code of all ones
+// IRQ numbers
+enum
+{
+ IRQ_INT1 = 0,
+ IRQ_INT2 = 1,
+ IRQ_INT3 = 2,
+ IRQ_INT4 = 3,
+ IRQ_IO1 = 4,
+ IRQ_IO2 = 5,
+ IRQ_IO3 = 6
+};
+
+// Trap numbers
+enum
+{
+ TRAPNO_IO2 = 48,
+ TRAPNO_IO1 = 49,
+ TRAPNO_INT4 = 50,
+ TRAPNO_INT3 = 51,
+ TRAPNO_INT2 = 52,
+ TRAPNO_INT1 = 53,
+ TRAPNO_IO3 = 54,
+ TRAPNO_TIMER = 55,
+ TRAPNO_RESERVED1 = 56,
+ TRAPNO_TRACE_EXCEPTION = 57,
+ TRAPNO_PARITY_ERROR = 58,
+ TRAPNO_EXTENDED_OVERFLOW = 59,
+ TRAPNO_RANGE_ERROR = 60,
+ TRAPNO_POINTER_ERROR = TRAPNO_RANGE_ERROR,
+ TRAPNO_PRIVILEGE_ERROR = TRAPNO_RANGE_ERROR,
+ TRAPNO_FRAME_ERROR = TRAPNO_RANGE_ERROR,
+ TRAPNO_RESERVED2 = 61,
+ TRAPNO_RESET = 62, // reserved if not mapped @ MEM3
+ TRAPNO_ERROR_ENTRY = 63 // for instruction code of all ones
+};
/* Trap codes */
#define TRAPLE 4
@@ -108,30 +130,21 @@
#define E132XS_ENTRY_MEM3 7
/* Memory access */
-/* read byte */
-#define READ_B(addr) m_program->read_byte((addr))
-/* read half-word */
-#define READ_HW(addr) m_program->read_word((addr) & ~1)
-/* read word */
-#define READ_W(addr) m_program->read_dword((addr) & ~3)
+#define READ_B(addr) m_read_byte(addr)
+#define READ_HW(addr) m_read_halfword(addr)
+#define READ_W(addr) m_read_word(addr)
-/* write byte */
-#define WRITE_B(addr, data) m_program->write_byte(addr, data)
-/* write half-word */
-#define WRITE_HW(addr, data) m_program->write_word((addr) & ~1, data)
-/* write word */
-#define WRITE_W(addr, data) m_program->write_dword((addr) & ~3, data)
+#define WRITE_B(addr, data) m_write_byte(addr, data)
+#define WRITE_HW(addr, data) m_write_halfword(addr, data)
+#define WRITE_W(addr, data) m_write_word(addr, data)
/* I/O access */
-/* read word */
-#define IO_READ_W(addr) m_io->read_dword(((addr) >> 11) & 0x7ffc)
-/* write word */
-#define IO_WRITE_W(addr, data) m_io->write_dword(((addr) >> 11) & 0x7ffc, data)
+#define IO_READ_W(addr) m_read_io(addr)
+#define IO_WRITE_W(addr, data) m_write_io(addr, data)
// set C in adds/addsi/subs/sums
#define SETCARRYS 0
-#define MISSIONCRAFT_FLAGS 1
/* Registers */
@@ -155,25 +168,31 @@
#define MCR m_core->global_regs[27] //Memory Control Register
// 28 - 31 Reserved
-#define C_MASK 0x00000001
-#define Z_MASK 0x00000002
-#define N_MASK 0x00000004
-#define V_MASK 0x00000008
-#define M_MASK 0x00000010
-#define H_MASK 0x00000020
-#define I_MASK 0x00000080
-#define L_MASK 0x00008000
-#define T_MASK 0x00010000
-#define P_MASK 0x00020000
-#define S_MASK 0x00040000
-#define ILC_MASK 0x00180000
-
-#define C_SHIFT 0
-#define Z_SHIFT 1
-#define N_SHIFT 2
-#define V_SHIFT 3
-#define S_SHIFT 18
-#define ILC_SHIFT 19
+constexpr uint32_t C_MASK = 0x00000001;
+constexpr uint32_t Z_MASK = 0x00000002;
+constexpr uint32_t N_MASK = 0x00000004;
+constexpr uint32_t V_MASK = 0x00000008;
+constexpr uint32_t M_MASK = 0x00000010;
+constexpr uint32_t H_MASK = 0x00000020;
+constexpr uint32_t I_MASK = 0x00000080;
+constexpr uint32_t L_MASK = 0x00008000;
+constexpr uint32_t T_MASK = 0x00010000;
+constexpr uint32_t P_MASK = 0x00020000;
+constexpr uint32_t S_MASK = 0x00040000;
+constexpr uint32_t ILC_MASK = 0x00180000;
+constexpr uint32_t FL_MASK = 0x01e00000;
+constexpr uint32_t FP_MASK = 0xfe000000;
+
+constexpr int C_SHIFT = 0;
+constexpr int Z_SHIFT = 1;
+constexpr int N_SHIFT = 2;
+constexpr int V_SHIFT = 3;
+constexpr int L_SHIFT = 15;
+constexpr int T_SHIFT = 16;
+constexpr int S_SHIFT = 18;
+constexpr int ILC_SHIFT = 19;
+constexpr int FL_SHIFT = 21;
+constexpr int FP_SHIFT = 25;
/* SR flags */
#define GET_C ( SR & C_MASK) // bit 0 //CARRY
@@ -225,6 +244,4 @@
//other bits are reversed, in particular 7 - 5 for the operating system.
//the user program can only change the above 2 flags
-
-#endif // MAME_CPU_E132XS_XS32DEFS_H
-
+#endif // MAME_CPU_E132XS_32XSDEFS_H
diff --git a/src/devices/cpu/e132xs/e132xs.cpp b/src/devices/cpu/e132xs/e132xs.cpp
index 137a45404f2..157a4fe1f9a 100644
--- a/src/devices/cpu/e132xs/e132xs.cpp
+++ b/src/devices/cpu/e132xs/e132xs.cpp
@@ -4,141 +4,88 @@
Hyperstone cpu emulator
written by Pierpaolo Prazzoli
- All the types are compatible, but they have different IRAM size and cycles
-
Hyperstone models:
- 16 bits
- - E1-16T
- - E1-16XT
- - E1-16XS
- - E1-16XSR
-
- 32bits
- - E1-32N or E1-32T
- - E1-32XN or E1-32XT
- - E1-32XS
- - E1-32XSR
+ Model Core Bus IRAM Maximum core frequency Process Package
+ E1-16T E1 16-bit 4 KiB DRAM 66 MHz @ 5.0 V 100-pin TQFP
+ E1-32T E1 32-bit 4 KiB DRAM 66 MHz @ 5.0 V 144-pin TQFP
+ E1-32N E1 32-bit 4 KiB DRAM 66 MHz @ 5.0 V 160-pin PQFP
+ E1-16XT E1-X 16-bit 8 KiB DRAM 80 MHz @ 5.0 V, 53 MHz @ 3.3V 0.5 µm 100-pin TQFP
+ E1-32XT E1-X 32-bit 8 KiB DRAM 80 MHz @ 5.0 V, 53 MHz @ 3.3V 0.5 µm 144-pin TQFP
+ E1-32XN E1-X 32-bit 8 KiB DRAM 80 MHz @ 5.0 V, 53 MHz @ 3.3V 0.5 µm 160-pin PQFP
+ E1-16XS E1-XS 16-bit 16 KiB SRAM 115 MHz 0.25 µm 100-pin LQFP
+ E1-16XSB E1-XS 16-bit 16 KiB SRAM 115 MHz 0.25 µm 100-pin TFBGA
+ E1-32XS E1-XS 32-bit 16 KiB SRAM 115 MHz 0.25 µm 144-pin LQFP
+ E1-16XSR E1-XSR 16-bit 16 KiB SRAM 128 MHz 0.25 µm 100-pin LQFP
+ E1-32XSR E1-XSR 32-bit 16 KiB SRAM 128 MHz 0.25 µm 144-pin LQFP
Hynix models:
- 16 bits
- - GMS30C2116
- - GMS30C2216
-
- 32bits
- - GMS30C2132
- - GMS30C2232
+ Model Core Bus IRAM Maximum core frequency Process Package
+ GMS30C2116 E1 16-bit 4 KiB DRAM 66 MHz @ 5.0 V, 40 MHz @ 3.3 V 0.6 µm 100-pin TQFP
+ GMS30C2132 E1 32-bit 4 KiB DRAM 66 MHz @ 5.0 V, 40 MHz @ 3.3 V 0.6 µm 144-pin TQFP, 160-pin MQFP
+ GMS30C2216 E1-X 16-bit 8 KiB DRAM 108 MHz 0.35 µm 100-pin TQFP
+ GMS30C2232 E1-X 32-bit 8 KiB DRAM 108 MHz 0.35 µm 144-pin TQFP, 160-pin MQFP
+
+ E1-X changes:
+ * Adds PLL with up to 4* multiplication
+ * Adds CLKOUT signal configuration
+ * Increases IRAM to 8 KiB
+ * Changes DRAM refresh interval configuration to prescaler units
+ * Adds MEM0 EDO DRAM support
+ * Adds MEM0/MEM1/MEM2 byte write strobe/byte enable selection
+ * Adds MEM2 and I/O wait support
+ * Changes memory timing options
+ * Changes to bus hold break always enabled for DRAM
+ * Moves power down from MCR to an I/O address
+
+ E-1XS changes:
+ * Changes to 3.3 V I/O voltage and 2.5 V core voltage
+ * Increases PLL options to up to 8* multiplication
+ * Increases IRAM to 16 KiB
+ * Changes IRAM to SRAM
+ * Adds MEM0 SDRAM support
+ * Removes bus output voltage and input threshold selection
+
+ E-1XS changes:
+ * Changes SDRAM timing options
+ * Adds more DRAM clock configuration options
+ * Removes MEM0/MEM1/MEM2 byte enable support
+
+ The Hynix models are generally similar to the Hyperstone models
+ based on the same core with minor differences:
+ * Hynix models are fabricated with smaller feature sizes
+ * The GMS30C2216 and GMS30C2232 support higher core frequencies
+ * The GMS30C2216 and GMS30C2232 only support a 3.3 V power supply
+ * The GMS30C2216 and GMS30C2232 lack bus output voltage and input
+ threshold selection (inputs are 5 V tolerant)
+ * Hynix offered a 160-pin MQFP package rather than LQFP
+
+ Backwards compatibility is fairly good across models.
+ Incompatibilities include:
+ * Power supply and bus voltages changed
+ * Additional memory types and features are supported on later models
+ * Only the E1-X and E1-XS support memory byte enable signals
+ * The E1-XSR changes the available DRAM timing options
+ * PLL control bits added to the TPR register
+ * The BCR, MCR and SDCR register formats change in incompatible ways
TODO:
- - some wrong cycle counts
- - verify register wrapping with sregf/dregf on hardware
-
- CHANGELOG:
-
- Pierpaolo Prazzoli
- - Fixed LDxx.N/P/S opcodes not to increment the destination register when
- it's the same as the source or "next source" one.
-
- Pierpaolo Prazzoli
- - Removed nested delays
- - Added better delay branch support
- - Fixed PC seen by a delay instruction, because a delay instruction
- should use the delayed PC (thus allowing the execution of software
- opcodes too)
-
- Tomasz Slanina
- - Fixed delayed branching for delay instructions longer than 2 bytes
-
- Pierpaolo Prazzoli
- - Added and fixed Timer without hack
-
- Tomasz Slanina
- - Fixed MULU/MULS
- - Fixed Carry in ADDC/SUBC
-
- Pierpaolo Prazzoli
- - Fixed software opcodes used as delay instructions
- - Added nested delays
-
- Tomasz Slanina
- - Added "undefined" C flag to shift left instructions
-
- Pierpaolo Prazzoli
- - Added interrupts-block for delay instructions
- - Fixed get_emu_code_addr
- - Added LDW.S and STW.S instructions
- - Fixed floating point opcodes
-
- Tomasz Slanina
- - interrputs after call and before frame are prohibited now
- - emulation of FCR register
- - Floating point opcodes (preliminary)
- - Fixed stack addressing in RET/FRAME opcodes
- - Fixed bug in SET_RS macro
- - Fixed bug in return opcode (S flag)
- - Added C/N flags calculation in add/adc/addi/adds/addsi and some shift opcodes
- - Added writeback to ROL
- - Fixed ROL/SAR/SARD/SHR/SHRD/SHL/SHLD opcode decoding (Local/Global regs)
- - Fixed I and T flag in RET opcode
- - Fixed XX/XM opcodes
- - Fixed MOV opcode, when RD = PC
- - Fixed execute_trap()
- - Fixed ST opcodes, when when RS = SR
- - Added interrupts
- - Fixed I/O addressing
-
- Pierpaolo Prazzoli
- - Fixed fetch
- - Fixed decode of hyperstone_xm opcode
- - Fixed 7 bits difference number in FRAME / RET instructions
- - Some debbugger fixes
- - Added generic registers decode function
- - Some other little fixes.
-
- Ryan Holtz 29/03/2004
- - Changed MOVI to use unsigned values instead of signed, correcting
- an ugly glitch when loading 32-bit immediates.
- Pierpaolo Prazzoli
- - Same fix in get_const
-
- Pierpaolo Prazzoli - 02/25/04
- - Fixed some wrong addresses to address local registers instead of memory
- - Fixed FRAME and RET instruction
- - Added preliminary I/O space
- - Fixed some load / store instructions
-
- Pierpaolo Prazzoli - 02/20/04
- - Added execute_exception function
- - Added FL == 0 always interpreted as 16
-
- Pierpaolo Prazzoli - 02/19/04
- - Changed the reset to use the execute_trap(reset) which should be right to set
- the initiale state of the cpu
- - Added Trace exception
- - Set of T flag in RET instruction
- - Set I flag in interrupts entries and resetted by a RET instruction
- - Added correct set instruction for SR
-
- Pierpaolo Prazzoli - 10/26/03
- - Changed get_lrconst to get_const and changed it to use the removed GET_CONST_RR
- macro.
- - Removed the High flag used in some opcodes, it should be used only in
- MOV and MOVI instruction.
- - Fixed MOV and MOVI instruction.
- - Set to 1 FP is SR register at reset.
- (From the doc: A Call, Trap or Software instruction increments the FP and sets FL
- to 6, thus creating a new stack frame with the length of 6 registers).
-
- Pierpaolo Prazzoli - 08/19/03
- - Added check for D_BIT and S_BIT where PC or SR must or must not be denoted.
- (movd, divu, divs, ldxx1, ldxx2, stxx1, stxx2, mulu, muls, set, mul
- call, chk)
-
- Pierpaolo Prazzoli - 08/17/03
- - Fixed get_pcrel() when OP & 0x80 is set.
- - Decremented PC by 2 also in MOV, ADD, ADDI, SUM, SUB and added the check if
- D_BIT is not set. (when pc is changed they are implicit branch)
+ - All instructions should clear the H flag (not just MOV/MOVI)
+ - Fix behaviour of branches in delay slots for recompiler
+ - Many wrong cycle counts
+ - Prevent reading write-only BCR, TPR, FCR and MCR
+ - IRAM selection should happen before EA calculation
+ - No emulation of memory access latency and pipleline
+ - Should a zero bit shift clear C or leave it unchanged?
+ - What actually happens on trying to load to PC, SR, G14 or G15?
+ - Verify register wrapping with sregf/dregf on hardware
+ - Tracing doesn't work properly for the recompiler
+ DRC does not generate trace exceptions on branch or return
+ - INT/IO polarity
+ - IO3 timing and timer interrupt modes
+ - Watchdog
+ - Sleep mode
*********************************************************************/
@@ -148,52 +95,49 @@
#include "32xsdefs.h"
+#include <algorithm>
+
//#define VERBOSE 1
#include "logmacro.h"
-/* size of the execution code cache */
-#define CACHE_SIZE (32 * 1024 * 1024)
+
+// size of the execution code cache
+constexpr size_t CACHE_SIZE = 32 * 1024 * 1024;
//**************************************************************************
// INTERNAL ADDRESS MAP
//**************************************************************************
-// 4Kb IRAM (On-Chip Memory)
-
-void hyperstone_device::e116_4k_iram_map(address_map &map)
-{
- map(0xc0000000, 0xc0000fff).ram().mirror(0x1ffff000);
-}
+// 4KiB IRAM (On-Chip Memory)
-void hyperstone_device::e132_4k_iram_map(address_map &map)
+void hyperstone_device::iram_4k_map(address_map &map)
{
map(0xc0000000, 0xc0000fff).ram().mirror(0x1ffff000);
}
-// 8Kb IRAM (On-Chip Memory)
+// 8KiB IRAM (On-Chip Memory)
-void hyperstone_device::e116_8k_iram_map(address_map &map)
+void hyperstone_x_device::iram_8k_map(address_map &map)
{
map(0xc0000000, 0xc0001fff).ram().mirror(0x1fffe000);
}
-void hyperstone_device::e132_8k_iram_map(address_map &map)
-{
- map(0xc0000000, 0xc0001fff).ram().mirror(0x1fffe000);
-}
+// 16KiB IRAM (On-Chip Memory)
-// 16Kb IRAM (On-Chip Memory)
-
-void hyperstone_device::e116_16k_iram_map(address_map &map)
+void hyperstone_xs_device::iram_16k_map(address_map &map)
{
map(0xc0000000, 0xc0003fff).ram().mirror(0x1fffc000);
}
-void hyperstone_device::e132_16k_iram_map(address_map &map)
+
+// Internal I/O
+
+void hyperstone_x_device::internal_io_map(address_map &map)
{
- map(0xc0000000, 0xc0003fff).ram().mirror(0x1fffc000);
+ map(0x1c00, 0x1dff).w(FUNC(hyperstone_x_device::power_down_w));
+ map(0x1e00, 0x1fff).w(FUNC(hyperstone_x_device::sleep_w));
}
@@ -201,20 +145,30 @@ void hyperstone_device::e132_16k_iram_map(address_map &map)
// hyperstone_device - constructor
//-------------------------------------------------
-hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
- const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map)
+hyperstone_device::hyperstone_device(
+ const machine_config &mconfig,
+ const device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ uint32_t prg_data_width,
+ uint32_t io_data_width,
+ uint32_t io_addr_bits,
+ address_map_constructor internal_map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, prg_data_width, 32, 0, internal_map)
- , m_io_config("io", ENDIANNESS_BIG, io_data_width, 15)
+ , m_io_config("io", ENDIANNESS_BIG, io_data_width, io_addr_bits, (io_data_width == 16) ? -1 : -2)
, m_cache(CACHE_SIZE + sizeof(hyperstone_device))
, m_drcuml(nullptr)
, m_drcfe(nullptr)
, m_drcoptions(0)
+ , m_single_instruction_mode(false)
, m_cache_dirty(0)
, m_entry(nullptr)
, m_nocode(nullptr)
, m_interrupt_checks(nullptr)
, m_out_of_cycles(nullptr)
+ , m_eat_all_cycles(nullptr)
, m_mem_read8(nullptr)
, m_mem_write8(nullptr)
, m_mem_read16(nullptr)
@@ -223,9 +177,10 @@ hyperstone_device::hyperstone_device(const machine_config &mconfig, const char *
, m_mem_write32(nullptr)
, m_io_read32(nullptr)
, m_io_write32(nullptr)
+ , m_exception(nullptr)
, m_enable_drc(false)
{
- std::fill(std::begin(m_exception), std::end(m_exception), nullptr);
+ std::fill(std::begin(m_delay_taken), std::end(m_delay_taken), nullptr);
}
hyperstone_device::~hyperstone_device()
@@ -234,81 +189,93 @@ hyperstone_device::~hyperstone_device()
//-------------------------------------------------
-// e116t_device - constructor
-//-------------------------------------------------
-
-e116t_device::e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E116T, 16, 16, address_map_constructor(FUNC(e116t_device::e116_4k_iram_map), this))
-{
-}
-
-
-//-------------------------------------------------
-// e116xt_device - constructor
+// hyperstone_x_device - constructor
//-------------------------------------------------
-e116xt_device::e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E116XT, 16, 16, address_map_constructor(FUNC(e116t_device::e116_8k_iram_map), this))
+hyperstone_x_device::hyperstone_x_device(
+ const machine_config &mconfig,
+ const device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ uint32_t prg_data_width,
+ uint32_t io_data_width,
+ uint32_t io_addr_bits,
+ address_map_constructor internal_map)
+ : hyperstone_device(mconfig, type, tag, owner, clock, prg_data_width, io_data_width, io_addr_bits, internal_map)
+ , m_internal_config("internal", ENDIANNESS_BIG, 32, 10 + 3, -2, address_map_constructor(FUNC(hyperstone_x_device::internal_io_map), this))
{
}
//-------------------------------------------------
-// e116xs_device - constructor
+// e116_device - constructor
//-------------------------------------------------
-e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E116XS, 16, 16, address_map_constructor(FUNC(e116xs_device::e116_16k_iram_map), this))
+e116_device::e116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_device(
+ mconfig, E116, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(e116_device::iram_4k_map), this))
{
}
//-------------------------------------------------
-// e116xsr_device - constructor
+// e116x_device - constructor
//-------------------------------------------------
-e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E116XSR, 16, 16, address_map_constructor(FUNC(e116xsr_device::e116_16k_iram_map), this))
+e116x_device::e116x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_x_device(
+ mconfig, E116X, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(e116x_device::iram_8k_map), this))
{
}
//-------------------------------------------------
-// e132n_device - constructor
+// e116xs_device - constructor
//-------------------------------------------------
-e132n_device::e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132N, 32, 32, address_map_constructor(FUNC(e132n_device::e132_4k_iram_map), this))
+e116xs_device::e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_xs_device(
+ mconfig, E116XS, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(e116xs_device::iram_16k_map), this))
{
}
//-------------------------------------------------
-// e132t_device - constructor
+// e116xsr_device - constructor
//-------------------------------------------------
-e132t_device::e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132T, 32, 32, address_map_constructor(FUNC(e132t_device::e132_4k_iram_map), this))
+e116xsr_device::e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_xsr_device(
+ mconfig, E116XSR, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(e116xsr_device::iram_16k_map), this))
{
}
//-------------------------------------------------
-// e132xn_device - constructor
+// e132_device - constructor
//-------------------------------------------------
-e132xn_device::e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132XN, 32, 32, address_map_constructor(FUNC(e132xn_device::e132_8k_iram_map), this))
+e132_device::e132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_device(
+ mconfig, E132, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(e132_device::iram_4k_map), this))
{
}
//-------------------------------------------------
-// e132xt_device - constructor
+// e132x_device - constructor
//-------------------------------------------------
-e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132XT, 32, 32, address_map_constructor(FUNC(e132xt_device::e132_8k_iram_map), this))
+e132x_device::e132x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : hyperstone_x_device(
+ mconfig, E132X, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(e132x_device::iram_8k_map), this))
{
}
@@ -318,7 +285,9 @@ e132xt_device::e132xt_device(const machine_config &mconfig, const char *tag, dev
//-------------------------------------------------
e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132XS, 32, 32, address_map_constructor(FUNC(e132xs_device::e132_16k_iram_map), this))
+ : hyperstone_xs_device(
+ mconfig, E132XS, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(e132xs_device::iram_16k_map), this))
{
}
@@ -328,7 +297,9 @@ e132xs_device::e132xs_device(const machine_config &mconfig, const char *tag, dev
//-------------------------------------------------
e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, E132XSR, 32, 32, address_map_constructor(FUNC(e132xsr_device::e132_16k_iram_map), this))
+ : hyperstone_xsr_device(
+ mconfig, E132XSR, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(e132xsr_device::iram_16k_map), this))
{
}
@@ -338,7 +309,9 @@ e132xsr_device::e132xsr_device(const machine_config &mconfig, const char *tag, d
//-------------------------------------------------
gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, GMS30C2116, 16, 16, address_map_constructor(FUNC(gms30c2116_device::e116_4k_iram_map), this))
+ : hyperstone_device(
+ mconfig, GMS30C2116, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(gms30c2116_device::iram_4k_map), this))
{
}
@@ -348,7 +321,9 @@ gms30c2116_device::gms30c2116_device(const machine_config &mconfig, const char *
//-------------------------------------------------
gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, GMS30C2132, 32, 32, address_map_constructor(FUNC(gms30c2132_device::e132_4k_iram_map), this))
+ : hyperstone_device(
+ mconfig, GMS30C2132, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(gms30c2132_device::iram_4k_map), this))
{
}
@@ -358,7 +333,9 @@ gms30c2132_device::gms30c2132_device(const machine_config &mconfig, const char *
//-------------------------------------------------
gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, GMS30C2216, 16, 16, address_map_constructor(FUNC(gms30c2216_device::e116_8k_iram_map), this))
+ : hyperstone_x_device(
+ mconfig, GMS30C2216, tag, owner, clock,
+ 16, 16, 6 + 3, address_map_constructor(FUNC(gms30c2216_device::iram_8k_map), this))
{
}
@@ -368,7 +345,9 @@ gms30c2216_device::gms30c2216_device(const machine_config &mconfig, const char *
//-------------------------------------------------
gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hyperstone_device(mconfig, tag, owner, clock, GMS30C2232, 32, 32, address_map_constructor(FUNC(gms30c2232_device::e132_8k_iram_map), this))
+ : hyperstone_x_device(
+ mconfig, GMS30C2232, tag, owner, clock,
+ 32, 32, 10 + 3, address_map_constructor(FUNC(gms30c2232_device::iram_8k_map), this))
{
}
@@ -376,7 +355,7 @@ gms30c2232_device::gms30c2232_device(const machine_config &mconfig, const char *
uint32_t hyperstone_device::get_trap_addr(uint8_t trapno)
{
uint32_t addr;
- if( m_core->trap_entry == 0xffffff00 ) /* @ MEM3 */
+ if (m_core->trap_entry == 0xffffff00) /* @ MEM3 */
{
addr = trapno * 4;
}
@@ -393,7 +372,7 @@ uint32_t hyperstone_device::get_trap_addr(uint8_t trapno)
uint32_t hyperstone_device::get_emu_code_addr(uint8_t num) /* num is OP */
{
uint32_t addr;
- if( m_core->trap_entry == 0xffffff00 ) /* @ MEM3 */
+ if (m_core->trap_entry == 0xffffff00) /* @ MEM3 */
{
addr = (m_core->trap_entry - 0x100) | ((num & 0xf) << 4);
}
@@ -460,17 +439,16 @@ void hyperstone_device::adjust_timer_interrupt()
if (cycles_until_next_clock == 0)
cycles_until_next_clock = (uint64_t)(1 << m_core->clck_scale);
- /* special case: if we have a change pending, set a timer to fire then */
if (TPR & 0x80000000)
{
+ // special case: if we have a change pending, set a timer to fire then
uint64_t clocks_until_int = m_core->tr_clocks_per_tick - (clocks_since_base % m_core->tr_clocks_per_tick);
uint64_t cycles_until_int = (clocks_until_int << m_core->clck_scale) + cycles_until_next_clock;
m_timer->adjust(cycles_to_attotime(cycles_until_int + 1), 1);
}
-
- /* else if the timer interrupt is enabled, configure it to fire at the appropriate time */
else if (!(FCR & 0x00800000))
{
+ // else if the timer interrupt is enabled, configure it to fire at the appropriate time
uint32_t curtr = m_core->tr_base_value + (clocks_since_base / m_core->tr_clocks_per_tick);
uint32_t delta = TCR - curtr;
if (delta > 0x80000000)
@@ -485,30 +463,489 @@ void hyperstone_device::adjust_timer_interrupt()
m_timer->adjust(cycles_to_attotime(cycles_until_int));
}
}
-
- /* otherwise, disable the timer */
else
+ {
+ // otherwise, disable the timer
m_timer->adjust(attotime::never);
+ }
+}
+
+void hyperstone_device::update_bus_control()
+{
+ const uint32_t val = m_core->global_regs[BCR_REGISTER];
+
+ const unsigned mem2hold = BIT(val, 0, 2);
+ const unsigned mem3hold = bitswap<3>(val, 23, 3, 2);
+ // 4..6 page size code
+ // 7 reserved, must be 1
+ const unsigned rastocas = BIT(val, 8, 2) + 1; // for MEM0 DRAM
+ const unsigned rasprecharge = BIT(val, 10, 2) + 1; // for MEM0 DRAM
+ const unsigned mem0hold = BIT(val, 10, 2); // for MEM0 non-DRAM
+ // 12..13 refresh select
+ const unsigned mem2setup = BIT(val, 14);
+ const unsigned mem1hold = BIT(val, 15);
+ const unsigned mem0access = BIT(val, 16, 2) + 1;
+ const unsigned mem1access = BIT(val, 18, 2) + 1;
+ const unsigned mem2access = BIT(val, 20, 3) + 1;
+ // 23 MEM3 hold (2)
+ const unsigned mem3access = BIT(val, 24, 4) + 1;
+
+ LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
+ if (BIT(m_core->global_regs[MCR_REGISTER], 21))
+ {
+ LOG("MEM0 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+ BIT(val, 28) ? "disabled" : "enabled", mem0access, mem0hold);
+ }
+ else
+ {
+ char const *const refresh[4] = {
+ "every 512 cycles",
+ "every 256 cycles",
+ "every 128 cycles",
+ "disabled" };
+ char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
+ LOG("MEM0 parity %s, RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+ BIT(val, 28) ? "disabled" : "enabled",
+ rasprecharge, rastocas, mem0access, page[BIT(val, 4, 3)], refresh[BIT(val, 12, 2)]);
+ }
+ LOG("MEM1 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+ BIT(val, 29) ? "disabled" : "enabled", mem1access, mem1hold);
+ LOG("MEM2 parity %s, access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ BIT(val, 30) ? "disabled" : "enabled", mem2access, mem2hold, mem2setup);
+ LOG("MEM3 parity %s, access time %d cycle(s), hold time %d cycle(s)\n",
+ BIT(val, 31) ? "disabled" : "enabled",
+ mem3access, mem3hold);
+}
+
+void hyperstone_x_device::update_bus_control()
+{
+ const uint32_t val = m_core->global_regs[BCR_REGISTER];
+
+ const unsigned mem2hold = BIT(val, 0, 3);
+ const unsigned mem2setup = BIT(val, 3);
+ // 4..6 page size code
+ const unsigned mem3setup = BIT(val, 7);
+ const unsigned mem3hold = BIT(val, 8, 3);
+ // 11..13 refresh select
+ const unsigned rastocas = BIT(val, 14, 2) + 1; // for MEM0 DRAM
+ const unsigned casaccess = BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+ const unsigned rasprecharge = BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+ const unsigned mem0hold = BIT(val, 11, 3); // for MEM0 non-DRAM
+ const unsigned mem0setup = BIT(val, 14, 2); // for MEM0 non-DRAM
+ const unsigned mem0access = BIT(val, 16, 4) + 1; // for MEM0 non-DRAM
+ const unsigned mem1access = BIT(val, 20, 3) + 1;
+ const unsigned mem1hold = BIT(val, 23) + BIT(val, 22);
+ const unsigned mem2access = BIT(val, 24, 4) + 1;
+ const unsigned mem3access = BIT(val, 28, 4) + 1;
+
+ LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
+ if (BIT(m_core->global_regs[MCR_REGISTER], 21))
+ {
+ LOG("MEM0 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem0access, mem0hold, mem0setup);
+ }
+ else
+ {
+ char const *const refresh[8] = {
+ "every 256 prescaler time units",
+ "every 128 prescaler time units",
+ "every 64 prescaler time units",
+ "every 32 prescaler time units",
+ "every 16 prescaler time units",
+ "every 8 prescaler time units",
+ "every 4 prescaler time units",
+ "disabled" };
+ char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
+ LOG("MEM0 RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+ rasprecharge, rastocas, casaccess, page[BIT(val, 4, 3)], refresh[BIT(val, 11, 3)]);
+ }
+ LOG("MEM1 access time %d cycle(s), hold time %d cycle(s)\n",
+ mem1access, mem1hold);
+ LOG("MEM2 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem2access, mem2hold, mem2setup);
+ LOG("MEM3 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem3access, mem3hold, mem3setup);
+}
+
+void hyperstone_xsr_device::update_bus_control()
+{
+ const uint32_t val = m_core->global_regs[BCR_REGISTER];
+
+ const unsigned mem2hold = BIT(val, 0, 3);
+ const unsigned mem2setup = BIT(val, 3);
+ // 4..6 page size code
+ const unsigned mem3setup = BIT(val, 7);
+ const unsigned mem3hold = BIT(val, 8, 3);
+ const unsigned mem0hold = BIT(val, 11, 3); // for MEM0 non-DRAM
+ const unsigned mem0setup = BIT(val, 14, 2); // for MEM0 non-DRAM
+ const unsigned mem0access = BIT(val, 16, 4) + 1; // for MEM0 non-DRAM
+ const unsigned mem1access = BIT(val, 20, 3) + 1;
+ const unsigned mem1hold = BIT(val, 23) + BIT(val, 22);
+ const unsigned mem2access = BIT(val, 24, 4) + 1;
+ const unsigned mem3access = BIT(val, 28, 4) + 1;
+
+ LOG("%s: Set BCR = 0x%08x\n", machine().describe_context(), val);
+ if (BIT(m_core->global_regs[MCR_REGISTER], 21))
+ {
+ LOG("MEM0 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem0access, mem0hold, mem0setup);
+ }
+ else
+ {
+ char const *const refresh[8] = {
+ "every 256 prescaler time units",
+ "every 128 prescaler time units",
+ "every 64 prescaler time units",
+ "every 32 prescaler time units",
+ "every 16 prescaler time units",
+ "every 8 prescaler time units",
+ "every 4 prescaler time units",
+ "disabled" };
+ char const *const page[8] = { "64K", "32K", "16K", "8K", "4K", "2K", "1K", "512" };
+ unsigned rastocas, casaccess, rasprecharge;
+ if (BIT(m_core->global_regs[MCR_REGISTER], 22))
+ {
+ rastocas = BIT(val, 14, 2) + 1;
+ casaccess = BIT(val, 16, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+ rasprecharge = BIT(val, 18, 2) + 1 + (BIT(m_core->global_regs[MCR_REGISTER], 8) * 2);
+ }
+ else
+ {
+ rastocas = (BIT(val, 14, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+ casaccess = (BIT(val, 16, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+ rasprecharge = (BIT(val, 18, 2) + 1) << BIT(m_core->global_regs[MCR_REGISTER], 8);
+ }
+ LOG("MEM0 RAS precharge time %d cycle(s), RAS to CAS delay time %d cycle(s), CAS access time %d cycle(s), %s byte rows, refresh %s\n",
+ rasprecharge, rastocas, casaccess, page[BIT(val, 4, 3)], refresh[BIT(val, 11, 3)]);
+ }
+ LOG("MEM1 access time %d cycle(s), hold time %d cycle(s)\n",
+ mem1access, mem1hold);
+ LOG("MEM2 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem2access, mem2hold, mem2setup);
+ LOG("MEM3 access time %d cycle(s), hold time %d cycle(s), setup time %d cycle(s)\n",
+ mem3access, mem3hold, mem3setup);
+}
+
+void hyperstone_device::update_memory_control()
+{
+ const uint32_t val = m_core->global_regs[MCR_REGISTER];
+
+ static char const *const entrymap[8] = { "MEM0", "MEM1", "MEM2", "IRAM", "reserved", "reserved", "reserved", "MEM3" };
+ LOG("%s: Set MCR = 0x%08x, entry map in %s, %s output voltage, input threshold for VDD=%sV\n",
+ machine().describe_context(),
+ val,
+ entrymap[BIT(val, 12, 3)],
+ BIT(val, 25) ? "rail-to-rail" : "reduced",
+ BIT(val, 24) ? "5.0" : "3.3");
+
+ static char const *const size[4] = { "32 bit", "reserved", "16 bit", "8 bit" };
+ char const *const refresh[8] = {
+ "every 128 cycles",
+ "every 64 cycles",
+ "every 32 cycles",
+ "every 16 cycles",
+ "every 8 cycles",
+ "every 4 cycles",
+ "every 2 cycles",
+ "disabled" };
+ LOG("IRAM %s mode, refresh %s\n",
+ BIT(val, 20) ? "normal" : "test", // IRAM refresh test
+ refresh[BIT(val, 16, 2)]); // IRAM refresh rate
+ LOG("MEM0 %s %sDRAM, bus hold break %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ BIT(val, 21) ? "non-" : "fast page ", // MEM0 memory type
+ BIT(val, 8) ? "disabled" : "enabled"); // MEM0 bus hold break
+ LOG("MEM1 %s, bus hold break %s\n",
+ size[BIT(val, 2, 2)], // MEM1 bus size
+ BIT(val, 9) ? "disabled" : "enabled"); // MEM1 bus hold break
+ LOG("MEM2 %s, bus hold break %s\n",
+ size[BIT(val, 4, 2)], // MEM2 bus size
+ BIT(val, 10) ? "disabled" : "enabled"); // MEM2 bus hold break
+ LOG("MEM3 %s, bus hold break %s\n",
+ size[BIT(val, 6, 2)], // MEM3 bus size
+ BIT(val, 11) ? "disabled" : "enabled"); // MEM3 bus hold break
+
+ // bits 14..12 EntryTableMap
+ const int which = (val & 0x7000) >> 12;
+ assert(which < 4 || which == 7);
+ m_core->trap_entry = s_trap_entries[which];
+
+ const uint8_t power_down_req = BIT(val, 22);
+ if (!power_down_req && m_power_down_req)
+ {
+ LOG("entering power down\n");
+ m_core->powerdown = 1;
+ }
+ m_power_down_req = power_down_req;
+}
+
+void hyperstone_x_device::update_memory_control()
+{
+ const uint32_t val = m_core->global_regs[MCR_REGISTER];
+
+ // GMS30C2216 and GMS30C2232 drop bus output voltage/input
+ // threshold selection as they only support 3.3V power supply
+ // and have 5V tolerant inputs.
+
+ static char const *const entrymap[8] = { "MEM0", "MEM1", "MEM2", "IRAM", "reserved", "reserved", "reserved", "MEM3" };
+ LOG("%s: Set MCR = 0x%08x, entry map in %s, %s output voltage, input threshold for VDD=%sV\n",
+ machine().describe_context(),
+ val,
+ entrymap[BIT(val, 12, 3)],
+ BIT(val, 25) ? "rail-to-rail" : "reduced",
+ BIT(val, 24) ? "5.0" : "3.3");
+
+ static char const *const size[4] = { "32 bit", "reserved", "16 bit", "8 bit" };
+ char const *const refresh[8] = {
+ "every 128 prescaler time units",
+ "every 64 prescaler time units",
+ "every 32 prescaler time units",
+ "every 16 prescaler time units",
+ "every 8 prescaler time units",
+ "every 4 prescaler time units",
+ "every 2 prescaler time units",
+ "disabled" };
+ LOG("IRAM %s mode, refresh %s\n",
+ BIT(val, 20) ? "normal" : "test", // IRAM refresh test
+ refresh[BIT(val, 16, 2)]); // IRAM refresh rate
+ if (BIT(val, 21))
+ {
+ LOG("MEM0 %s, bus hold break %s, parity %s, byte %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ BIT(val, 8) ? "disabled" : "enabled", // MEM0 bus hold break
+ BIT(val, 28) ? "disabled" : "enabled", // MEM0 parity
+ BIT(val, 15) ? "strobe" : "enable"); // MEM0 byte mode
+ }
+ else
+ {
+ LOG("MEM0 %s %s DRAM, hold time %s, parity %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ BIT(val, 15) ? "fast page" : "EDO", // MEM0 DRAM type
+ BIT(val, 8) ? "1 cycle" : "0 cycles", // MEM0 bus hold
+ BIT(val, 28) ? "disabled" : "enabled"); // MEM0 parity
+ }
+ LOG("MEM1 %s, bus hold break %s, parity %s, byte %s\n",
+ size[BIT(val, 2, 2)], // MEM1 bus size
+ BIT(val, 9) ? "disabled" : "enabled", // MEM1 bus hold break
+ BIT(val, 29) ? "disabled" : "enabled", // MEM1 parity
+ BIT(val, 19) ? "strobe" : "enable"); // MEM1 byte mode
+ LOG("MEM2 %s, bus hold break %s, parity %s, byte %s, wait %s\n",
+ size[BIT(val, 4, 2)], // MEM2 bus size
+ BIT(val, 10) ? "disabled" : "enabled", // MEM2 bus hold break
+ BIT(val, 30) ? "disabled" : "enabled", // MEM2 parity
+ BIT(val, 23) ? "strobe" : "enable", // MEM2 byte mode
+ BIT(val, 26) ? "disabled" : "enabled"); // MEM2 wait
+ LOG("MEM3 %s, bus hold break %s, parity %s\n",
+ size[BIT(val, 6, 2)], // MEM3 bus size
+ BIT(val, 11) ? "disabled" : "enabled", // MEM3 bus hold break
+ BIT(val, 31) ? "disabled" : "enabled"); // MEM3 parity
+
+ // bits 14..12 EntryTableMap
+ const int which = (val & 0x7000) >> 12;
+ assert(which < 4 || which == 7);
+ m_core->trap_entry = s_trap_entries[which];
+
+ // this was moved to an I/O address for the E1-X core
+ // apparently this method still works as the Limenko games use it
+ const uint8_t power_down_req = BIT(val, 22);
+ if (!power_down_req && m_power_down_req)
+ {
+ LOG("entering power down\n");
+ m_core->powerdown = 1;
+ }
+ m_power_down_req = power_down_req;
+}
+
+void hyperstone_xs_device::update_memory_control()
+{
+ const uint32_t val = m_core->global_regs[MCR_REGISTER];
+
+ static char const *const entrymap[8] = { "MEM0", "MEM1", "MEM2", "IRAM", "reserved", "reserved", "reserved", "MEM3" };
+ LOG("%s: Set MCR = 0x%08x, entry map in %s\n",
+ machine().describe_context(),
+ val,
+ entrymap[BIT(val, 12, 3)]);
+
+ static char const *const size[4] = { "32 bit", "reserved", "16 bit", "8 bit" };
+ if (BIT(val, 21))
+ {
+ LOG("MEM0 %s, bus hold break %s, parity %s, byte %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ BIT(val, 8) ? "disabled" : "enabled", // MEM0 bus hold break
+ BIT(val, 28) ? "disabled" : "enabled", // MEM0 parity
+ BIT(val, 15) ? "strobe" : "enable"); // MEM0 byte mode
+ }
+ else
+ {
+ static char const *const dramtype[4] = { "S", "S", "EDO ", "fast page " };
+ LOG("MEM0 %s %sDRAM, hold time %s, parity %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ dramtype[bitswap<2>(val, 22, 15)], // MEM0 DRAM type
+ BIT(val, 8) ? "1 cycle" : "0 cycles", // MEM0 bus hold
+ BIT(val, 28) ? "disabled" : "enabled"); // MEM0 parity
+ }
+ LOG("MEM1 %s, bus hold break %s, parity %s, byte %s\n",
+ size[BIT(val, 2, 2)], // MEM1 bus size
+ BIT(val, 9) ? "disabled" : "enabled", // MEM1 bus hold break
+ BIT(val, 29) ? "disabled" : "enabled", // MEM1 parity
+ BIT(val, 19) ? "strobe" : "enable"); // MEM1 byte mode
+ LOG("MEM2 %s, bus hold break %s, parity %s, byte %s, wait %s\n",
+ size[BIT(val, 4, 2)], // MEM2 bus size
+ BIT(val, 10) ? "disabled" : "enabled", // MEM2 bus hold break
+ BIT(val, 30) ? "disabled" : "enabled", // MEM2 parity
+ BIT(val, 23) ? "strobe" : "enable", // MEM2 byte mode
+ BIT(val, 26) ? "disabled" : "enabled"); // MEM2 wait
+ LOG("MEM3 %s, bus hold break %s, parity %s\n",
+ size[BIT(val, 6, 2)], // MEM3 bus size
+ BIT(val, 11) ? "disabled" : "enabled", // MEM3 bus hold break
+ BIT(val, 31) ? "disabled" : "enabled"); // MEM3 parity
+
+ // install SDRAM mode and control handlers if appropriate
+ if (!BIT(val, 21) && !BIT(val, 22))
+ install_sdram_mode_control();
+
+ // bits 14..12 EntryTableMap
+ const int which = (val & 0x7000) >> 12;
+ assert(which < 4 || which == 7);
+ m_core->trap_entry = s_trap_entries[which];
+}
+
+void hyperstone_xsr_device::update_memory_control()
+{
+ const uint32_t val = m_core->global_regs[MCR_REGISTER];
+
+ static char const *const entrymap[8] = { "MEM0", "MEM1", "MEM2", "IRAM", "reserved", "reserved", "reserved", "MEM3" };
+ LOG("%s: Set MCR = 0x%08x, entry map in %s\n",
+ machine().describe_context(),
+ val,
+ entrymap[BIT(val, 12, 3)]);
+
+ static char const *const size[4] = { "32 bit", "reserved", "16 bit", "8 bit" };
+ if (BIT(val, 21))
+ {
+ LOG("MEM0 %s, bus hold break %s, parity %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ BIT(val, 8) ? "disabled" : "enabled", // MEM0 bus hold break
+ BIT(val, 28) ? "disabled" : "enabled"); // MEM0 parity
+ }
+ else
+ {
+ static char const *const dramtype[4] = { "S", "S", "EDO ", "fast page " };
+ LOG("MEM0 %s %sDRAM, hold time %s, parity %s\n",
+ size[BIT(val, 0, 2)], // MEM0 bus size
+ dramtype[bitswap<2>(val, 22, 15)], // MEM0 DRAM type
+ BIT(val, 8) ? "1 cycle" : "0 cycles", // MEM0 bus hold
+ BIT(val, 28) ? "disabled" : "enabled"); // MEM0 parity
+ }
+ LOG("MEM1 %s, bus hold break %s, parity %s\n",
+ size[BIT(val, 2, 2)], // MEM1 bus size
+ BIT(val, 9) ? "disabled" : "enabled", // MEM1 bus hold break
+ BIT(val, 29) ? "disabled" : "enabled"); // MEM1 parity
+ LOG("MEM2 %s, bus hold break %s, parity %s, wait %s\n",
+ size[BIT(val, 4, 2)], // MEM2 bus size
+ BIT(val, 10) ? "disabled" : "enabled", // MEM2 bus hold break
+ BIT(val, 30) ? "disabled" : "enabled", // MEM2 parity
+ BIT(val, 26) ? "disabled" : "enabled"); // MEM2 wait
+ LOG("MEM3 %s, bus hold break %s, parity %s\n",
+ size[BIT(val, 6, 2)], // MEM3 bus size
+ BIT(val, 11) ? "disabled" : "enabled", // MEM3 bus hold break
+ BIT(val, 31) ? "disabled" : "enabled"); // MEM3 parity
+
+ // install SDRAM mode and control handlers if appropriate
+ if (!BIT(val, 21) && !BIT(val, 22))
+ install_sdram_mode_control();
+
+ // bits 14..12 EntryTableMap
+ const int which = (val & 0x7000) >> 12;
+ assert(which < 4 || which == 7);
+ m_core->trap_entry = s_trap_entries[which];
+}
+
+
+void hyperstone_x_device::power_down_w(uint32_t data)
+{
+ // actually has latency of a few clock cycles
+ LOG("%s: entering power down\n", machine().describe_context());
+ m_core->powerdown = 1;
+}
+
+void hyperstone_x_device::sleep_w(uint32_t data)
+{
+ logerror("%s: unimplemented sleep mode\n", machine().describe_context());
+}
+
+
+void hyperstone_xs_device::sdram_mode_w(offs_t offset, uint32_t data)
+{
+ // writes to mode register of the connected SDRAM
+ LOG("%s: set SDRAM mode = 0x%07x\n", machine().describe_context(), offset);
+}
+
+
+void hyperstone_xs_device::sdram_control_w(offs_t offset, uint32_t data)
+{
+ const uint32_t val = offset << 2;
+ LOG("%s: set SDCR = 0x%08x\n", machine().describe_context(), val);
+ LOG("MEM0 SDRAM bank bits 0x%08x, second SDRAM chip select CS#1 %s, A%u selects CS#0/CS#1, CAS latency %s, SDCLK CPU clock%s\n",
+ BIT(val, 12, 9) << 20,
+ BIT(val, 11) ? "disabled" : "enabled",
+ BIT(val, 8, 3) + 21,
+ BIT(val, 6) ? "2 clock cycles" : "1 clock cycle",
+ BIT(val, 3) ? " / 2" : "");
+}
+
+void hyperstone_xsr_device::sdram_control_w(offs_t offset, uint32_t data)
+{
+ const uint32_t val = offset << 2;
+ static char const *const sdclk[4] = { "CPU clock", "reserved", "CPU clock / 2", "CPU clock / 4" };
+ LOG("%s: set SDCR = 0x%08x\n", machine().describe_context(), val);
+ LOG("MEM0 SDRAM bank bits 0x%08x, second SDRAM chip select CS#1 %s, A%u selects CS#0/CS#1, CAS latency %s, SDCLK based on %s %s, %sdelayed synchronisation\n",
+ BIT(val, 12, 9) << 20,
+ BIT(val, 11) ? "disabled" : "enabled",
+ BIT(val, 8, 3) + 21,
+ BIT(val, 6) ? "2 clock cycles" : "1 clock cycle",
+ BIT(val, 5) ? "rising" : "falling",
+ sdclk[BIT(val, 2, 2)],
+ BIT(val, 4) ? "non-" : "");
+}
+
+void hyperstone_xs_device::install_sdram_mode_control()
+{
+ if (!m_sdram_installed)
+ {
+ m_program->unmap_read(0x20000000, 0x3fffffff);
+ m_program->install_write_handler(0x20000000, 0x2fffffff, emu::rw_delegate(*this, FUNC(hyperstone_xs_device::sdram_mode_w)));
+ m_program->install_write_handler(0x30000000, 0x3fffffff, emu::rw_delegate(*this, FUNC(hyperstone_xs_device::sdram_control_w)));
+
+ m_sdram_installed = true;
+ }
}
TIMER_CALLBACK_MEMBER( hyperstone_device::timer_callback )
{
int update = param;
- /* update the values if necessary */
+ // update the values if necessary
if (update)
- {
update_timer_prescale();
- }
- /* see if the timer is right for firing */
+ // see if the timer is right for firing
compute_tr();
if (!((m_core->tr_result - TCR) & 0x80000000))
+ {
m_core->timer_int_pending = 1;
-
- /* adjust ourselves for the next time */
+ if (!BIT(FCR, 23))
+ {
+ if (m_core->powerdown)
+ LOG("exiting power down for timer\n");
+ m_core->powerdown = 0;
+ }
+ }
else
+ {
+ // adjust ourselves for the next time
adjust_timer_interrupt();
+ }
}
@@ -550,7 +987,7 @@ uint32_t hyperstone_device::get_global_register(uint8_t code)
*/
if (code == TR_REGISTER)
{
- /* it is common to poll this in a loop */
+ // it is common to poll this in a loop
if (m_core->icount > m_core->tr_clocks_per_tick / 2)
m_core->icount -= m_core->tr_clocks_per_tick / 2;
compute_tr();
@@ -574,10 +1011,13 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
SET_PC(val);
return;
case SR_REGISTER:
- SET_LOW_SR(val); // only a RET instruction can change the full content of SR
- SR &= ~0x40; //reserved bit 6 always zero
- if (m_core->intblock < 1)
- m_core->intblock = 1;
+ {
+ const bool privilege_error = !GET_S && !GET_L && (val & L_MASK);
+ SET_LOW_SR(val); // only a RET instruction can change the full content of SR
+ SR &= ~0x40; // reserved bit 6 always zero
+ if (privilege_error)
+ execute_exception(TRAPNO_PRIVILEGE_ERROR);
+ }
return;
case 2:
case 3:
@@ -604,6 +1044,7 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
return;
case BCR_REGISTER:
m_core->global_regs[code] = val;
+ update_bus_control();
return;
case TPR_REGISTER:
m_core->global_regs[code] = val;
@@ -619,8 +1060,6 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
{
m_core->global_regs[code] = val;
adjust_timer_interrupt();
- if (m_core->intblock < 1)
- m_core->intblock = 1;
}
return;
case TR_REGISTER:
@@ -638,18 +1077,11 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
if ((m_core->global_regs[code] ^ val) & 0x00800000)
adjust_timer_interrupt();
m_core->global_regs[code] = val;
- if (m_core->intblock < 1)
- m_core->intblock = 1;
return;
case MCR_REGISTER:
- {
- // bits 14..12 EntryTableMap
- const int which = (val & 0x7000) >> 12;
- assert(which < 4 || which == 7);
- m_core->trap_entry = s_trap_entries[which];
m_core->global_regs[code] = val;
+ update_memory_control();
return;
- }
case 28:
case 29:
case 30:
@@ -667,20 +1099,27 @@ void hyperstone_device::set_global_register(uint8_t code, uint32_t val)
constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER);
-#define check_delay_PC() \
-do \
-{ \
- /* if PC is used in a delay instruction, the delayed PC should be used */ \
- if (m_core->delay_slot) \
- { \
- PC = m_core->delay_pc; \
- m_core->delay_slot = 0; \
- } \
-} while (0)
+inline ATTR_FORCE_INLINE void hyperstone_device::check_delay_pc()
+{
+ // if PC is used in a delay instruction, the delayed PC should be used
+ if (!m_core->delay_slot)
+ {
+ m_core->delay_slot_taken = 0;
+ }
+ else
+ {
+ using std::swap;
+ swap(PC, m_core->delay_pc);
+ m_core->delay_slot = 0;
+ m_core->delay_slot_taken = 1;
+ }
+}
void hyperstone_device::ignore_immediate_s()
{
- static const uint32_t lengths[16] = { 1<<19, 3<<19, 2<<19, 2<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19, 1<<19 };
+ static const uint32_t lengths[16] = {
+ 1 << ILC_SHIFT, 3 << ILC_SHIFT, 2 << ILC_SHIFT, 2 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT,
+ 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT, 1 << ILC_SHIFT };
static const uint32_t offsets[16] = { 0, 4, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
const uint8_t nybble = m_op & 0x0f;
m_instruction_length = lengths[nybble];
@@ -696,21 +1135,21 @@ uint32_t hyperstone_device::decode_immediate_s()
return 16;
case 1:
{
- m_instruction_length = (3<<19);
+ m_instruction_length = 3 << ILC_SHIFT;
uint32_t extra_u = (m_pr16(PC) << 16) | m_pr16(PC + 2);
PC += 4;
return extra_u;
}
case 2:
{
- m_instruction_length = (2<<19);
+ m_instruction_length = 2 << ILC_SHIFT;
uint32_t extra_u = m_pr16(PC);
PC += 2;
return extra_u;
}
case 3:
{
- m_instruction_length = (2<<19);
+ m_instruction_length = 2 << ILC_SHIFT;
uint32_t extra_u = 0xffff0000 | m_pr16(PC);
PC += 2;
return extra_u;
@@ -731,7 +1170,7 @@ uint32_t hyperstone_device::decode_const()
const uint16_t imm_2 = m_pr16(PC);
PC += 2;
- m_instruction_length = (3<<19);
+ m_instruction_length = 3 << ILC_SHIFT;
uint32_t imm = imm_2;
imm |= ((imm_1 & 0x3fff) << 16);
@@ -742,7 +1181,7 @@ uint32_t hyperstone_device::decode_const()
}
else
{
- m_instruction_length = (2<<19);
+ m_instruction_length = 2 << ILC_SHIFT;
uint32_t imm = imm_1 & 0x3fff;
@@ -759,7 +1198,7 @@ int32_t hyperstone_device::decode_pcrel()
uint16_t next = m_pr16(PC);
PC += 2;
- m_instruction_length = (2<<19);
+ m_instruction_length = 2 << ILC_SHIFT;
int32_t offset = (OP & 0x7f) << 16;
offset |= (next & 0xfffe);
@@ -780,28 +1219,20 @@ int32_t hyperstone_device::decode_pcrel()
}
}
-void hyperstone_device::ignore_pcrel()
+inline void hyperstone_device::ignore_pcrel()
{
if (m_op & 0x80)
{
PC += 2;
- m_instruction_length = (2<<19);
+ m_instruction_length = 2 << ILC_SHIFT;
}
}
-void hyperstone_device::hyperstone_br()
+void hyperstone_device::execute_trap(uint8_t trapno)
{
- const int32_t offset = decode_pcrel();
- check_delay_PC();
+ debugger_exception_hook(int(unsigned(trapno)));
- PC += offset;
- SR &= ~M_MASK;
-
- m_core->icount -= m_core->clock_cycles_2;
-}
-
-void hyperstone_device::execute_trap(uint32_t addr)
-{
+ const uint32_t addr = get_trap_addr(trapno);
const uint8_t reg = GET_FP + GET_FL;
SET_ILC(m_instruction_length);
const uint32_t oldSR = SR;
@@ -824,7 +1255,6 @@ void hyperstone_device::execute_trap(uint32_t addr)
void hyperstone_device::execute_int(uint32_t addr)
{
const uint8_t reg = GET_FP + GET_FL;
- SET_ILC(m_instruction_length);
const uint32_t oldSR = SR;
SET_FL(2);
@@ -842,10 +1272,22 @@ void hyperstone_device::execute_int(uint32_t addr)
}
/* TODO: mask Parity Error and Extended Overflow exceptions */
-void hyperstone_device::execute_exception(uint32_t addr)
+void hyperstone_device::execute_exception(uint8_t trapno)
{
+ debugger_exception_hook(int(unsigned(trapno)));
+
+ const uint32_t addr = get_trap_addr(trapno);
const uint8_t reg = GET_FP + GET_FL;
- SET_ILC(m_instruction_length);
+
+ if (!m_core->delay_slot_taken)
+ SET_ILC(m_instruction_length);
+ else
+ PC = m_core->delay_pc - (m_instruction_length >> ILC_SHIFT);
+
+ // RET does not automatically set P
+ if (((m_op & 0xfef0) != 0x0400) || !(m_op & 0x010e))
+ SET_P(1);
+
const uint32_t oldSR = SR;
SET_FL(2);
@@ -864,14 +1306,14 @@ void hyperstone_device::execute_exception(uint32_t addr)
void hyperstone_device::execute_software()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t src_code = SRC_CODE;
const uint32_t sreg = m_core->local_regs[(src_code + fp) & 0x3f];
const uint32_t sregf = m_core->local_regs[(src_code + 1 + fp) & 0x3f];
- SET_ILC(1<<19);
+ SET_ILC(1 << ILC_SHIFT);
const uint32_t addr = get_emu_code_addr((m_op & 0xff00) >> 8);
const uint8_t reg = fp + GET_FL;
@@ -919,184 +1361,113 @@ void hyperstone_device::execute_software()
#define IO2_LINE_STATE (ISR & 0x20)
#define IO3_LINE_STATE (ISR & 0x40)
-template <hyperstone_device::is_timer TIMER>
+template <hyperstone_device::is_timer Timer>
void hyperstone_device::check_interrupts()
{
- /* Interrupt-Lock flag isn't set */
- if (GET_L || m_core->intblock > 0)
+ // Interrupt-Lock flag isn't set
+ if (GET_L)
return;
- /* quick exit if nothing */
- if (TIMER == NO_TIMER && (ISR & 0x7f) == 0)
+ // quick exit if nothing
+ if (Timer == NO_TIMER && (ISR & 0x7f) == 0)
return;
- if (TIMER == NO_TIMER)
+ // IO3 is priority 5; state is in bit 6 of ISR; FCR bit 10 enables input and FCR bit 8 inhibits interrupt
+ if (IO3_LINE_STATE && (FCR & 0x00000500) == 0x00000400)
{
- /* IO3 is priority 5; state is in bit 6 of ISR; FCR bit 10 enables input and FCR bit 8 inhibits interrupt */
- if (IO3_LINE_STATE && (FCR & 0x00000500) == 0x00000400)
- {
- standard_irq_callback(IRQ_IO3, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO3));
- return;
- }
-
- /* INT1 is priority 7; state is in bit 0 of ISR; FCR bit 28 inhibits interrupt */
- if (INT1_LINE_STATE && (FCR & 0x10000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT1, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT1));
- return;
- }
-
- /* INT2 is priority 9; state is in bit 1 of ISR; FCR bit 29 inhibits interrupt */
- if (INT2_LINE_STATE && (FCR & 0x20000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT2, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT2));
- return;
- }
-
- /* INT3 is priority 11; state is in bit 2 of ISR; FCR bit 30 inhibits interrupt */
- if (INT3_LINE_STATE && (FCR & 0x40000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT3, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT3));
- return;
- }
-
- /* INT4 is priority 13; state is in bit 3 of ISR; FCR bit 31 inhibits interrupt */
- if (INT4_LINE_STATE && (FCR & 0x80000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT4, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT4));
- return;
- }
-
- /* IO1 is priority 14; state is in bit 4 of ISR; FCR bit 2 enables input and FCR bit 0 inhibits interrupt */
- if (IO1_LINE_STATE && (FCR & 0x00000005) == 0x00000004)
- {
- standard_irq_callback(IRQ_IO1, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO1));
- return;
- }
-
- /* IO2 is priority 15; state is in bit 5 of ISR; FCR bit 6 enables input and FCR bit 4 inhibits interrupt */
- if (IO2_LINE_STATE && (FCR & 0x00000050) == 0x00000040)
- {
- standard_irq_callback(IRQ_IO2, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO2));
- return;
- }
+ standard_irq_callback(IRQ_IO3, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_IO3));
+ return;
}
- else
- {
- /* IO3 is priority 5; state is in bit 6 of ISR; FCR bit 10 enables input and FCR bit 8 inhibits interrupt */
- if (IO3_LINE_STATE && (FCR & 0x00000500) == 0x00000400)
- {
- standard_irq_callback(IRQ_IO3, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO3));
- return;
- }
- /* timer int might be priority 6 if FCR bits 20-21 == 3; FCR bit 23 inhibits interrupt */
- if (TIMER && (FCR & 0x00b00000) == 0x00300000)
- {
- m_core->timer_int_pending = 0;
- execute_int(get_trap_addr(TRAPNO_TIMER));
- return;
- }
+ // timer int might be priority 6 if FCR bits 20-21 == 3; FCR bit 23 inhibits interrupt
+ if (Timer && (FCR & 0x00b00000) == 0x00300000)
+ {
+ m_core->timer_int_pending = 0;
+ execute_int(get_trap_addr(TRAPNO_TIMER));
+ return;
+ }
- /* INT1 is priority 7; state is in bit 0 of ISR; FCR bit 28 inhibits interrupt */
- if (INT1_LINE_STATE && (FCR & 0x10000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT1, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT1));
- return;
- }
+ // INT1 is priority 7; state is in bit 0 of ISR; FCR bit 28 inhibits interrupt
+ if (INT1_LINE_STATE && (FCR & 0x10000000) == 0x00000000)
+ {
+ standard_irq_callback(IRQ_INT1, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_INT1));
+ return;
+ }
- /* timer int might be priority 8 if FCR bits 20-21 == 2; FCR bit 23 inhibits interrupt */
- if (TIMER && (FCR & 0x00b00000) == 0x00200000)
- {
- m_core->timer_int_pending = 0;
- execute_int(get_trap_addr(TRAPNO_TIMER));
- return;
- }
+ // timer int might be priority 8 if FCR bits 20-21 == 2; FCR bit 23 inhibits interrupt
+ if (Timer && (FCR & 0x00b00000) == 0x00200000)
+ {
+ m_core->timer_int_pending = 0;
+ execute_int(get_trap_addr(TRAPNO_TIMER));
+ return;
+ }
- /* INT2 is priority 9; state is in bit 1 of ISR; FCR bit 29 inhibits interrupt */
- if (INT2_LINE_STATE && (FCR & 0x20000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT2, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT2));
- return;
- }
+ // INT2 is priority 9; state is in bit 1 of ISR; FCR bit 29 inhibits interrupt
+ if (INT2_LINE_STATE && (FCR & 0x20000000) == 0x00000000)
+ {
+ standard_irq_callback(IRQ_INT2, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_INT2));
+ return;
+ }
- /* timer int might be priority 10 if FCR bits 20-21 == 1; FCR bit 23 inhibits interrupt */
- if (TIMER && (FCR & 0x00b00000) == 0x00100000)
- {
- m_core->timer_int_pending = 0;
- execute_int(get_trap_addr(TRAPNO_TIMER));
- return;
- }
+ // timer int might be priority 10 if FCR bits 20-21 == 1; FCR bit 23 inhibits interrupt
+ if (Timer && (FCR & 0x00b00000) == 0x00100000)
+ {
+ m_core->timer_int_pending = 0;
+ execute_int(get_trap_addr(TRAPNO_TIMER));
+ return;
+ }
- /* INT3 is priority 11; state is in bit 2 of ISR; FCR bit 30 inhibits interrupt */
- if (INT3_LINE_STATE && (FCR & 0x40000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT3, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT3));
- return;
- }
+ // INT3 is priority 11; state is in bit 2 of ISR; FCR bit 30 inhibits interrupt
+ if (INT3_LINE_STATE && (FCR & 0x40000000) == 0x00000000)
+ {
+ standard_irq_callback(IRQ_INT3, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_INT3));
+ return;
+ }
- /* timer int might be priority 12 if FCR bits 20-21 == 0; FCR bit 23 inhibits interrupt */
- if (TIMER && (FCR & 0x00b00000) == 0x00000000)
- {
- m_core->timer_int_pending = 0;
- execute_int(get_trap_addr(TRAPNO_TIMER));
- return;
- }
+ // timer int might be priority 12 if FCR bits 20-21 == 0; FCR bit 23 inhibits interrupt
+ if (Timer && (FCR & 0x00b00000) == 0x00000000)
+ {
+ m_core->timer_int_pending = 0;
+ execute_int(get_trap_addr(TRAPNO_TIMER));
+ return;
+ }
- /* INT4 is priority 13; state is in bit 3 of ISR; FCR bit 31 inhibits interrupt */
- if (INT4_LINE_STATE && (FCR & 0x80000000) == 0x00000000)
- {
- standard_irq_callback(IRQ_INT4, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_INT4));
- return;
- }
+ // INT4 is priority 13; state is in bit 3 of ISR; FCR bit 31 inhibits interrupt
+ if (INT4_LINE_STATE && (FCR & 0x80000000) == 0x00000000)
+ {
+ standard_irq_callback(IRQ_INT4, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_INT4));
+ return;
+ }
- /* IO1 is priority 14; state is in bit 4 of ISR; FCR bit 2 enables input and FCR bit 0 inhibits interrupt */
- if (IO1_LINE_STATE && (FCR & 0x00000005) == 0x00000004)
- {
- standard_irq_callback(IRQ_IO1, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO1));
- return;
- }
+ // IO1 is priority 14; state is in bit 4 of ISR; FCR bit 2 enables input and FCR bit 0 inhibits interrupt
+ if (IO1_LINE_STATE && (FCR & 0x00000005) == 0x00000004)
+ {
+ standard_irq_callback(IRQ_IO1, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_IO1));
+ return;
+ }
- /* IO2 is priority 15; state is in bit 5 of ISR; FCR bit 6 enables input and FCR bit 4 inhibits interrupt */
- if (IO2_LINE_STATE && (FCR & 0x00000050) == 0x00000040)
- {
- standard_irq_callback(IRQ_IO2, m_core->global_regs[0]);
- execute_int(get_trap_addr(TRAPNO_IO2));
- return;
- }
+ // IO2 is priority 15; state is in bit 5 of ISR; FCR bit 6 enables input and FCR bit 4 inhibits interrupt
+ if (IO2_LINE_STATE && (FCR & 0x00000050) == 0x00000040)
+ {
+ standard_irq_callback(IRQ_IO2, m_core->global_regs[0]);
+ execute_int(get_trap_addr(TRAPNO_IO2));
+ return;
}
}
-void hyperstone_device::device_start()
-{
- // Handled entirely by init() and derived classes
-}
-void hyperstone_device::init(int scale_mask)
+void hyperstone_device::device_start()
{
- m_instruction_length_valid = false;
-
m_core = (internal_hyperstone_state *)m_cache.alloc_near(sizeof(internal_hyperstone_state));
memset(m_core, 0, sizeof(internal_hyperstone_state));
-#if ENABLE_E132XS_DRC
m_enable_drc = allow_drc();
-#else
- m_enable_drc = false;
-#endif
#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
if (m_enable_drc)
@@ -1106,66 +1477,131 @@ void hyperstone_device::init(int scale_mask)
#endif
memset(m_op_counts, 0, sizeof(uint32_t) * 256);
- memset(m_core->global_regs, 0, sizeof(uint32_t) * 32);
- memset(m_core->local_regs, 0, sizeof(uint32_t) * 64);
- m_op = 0;
+ std::fill(std::begin(m_core->global_regs), std::end(m_core->global_regs), 0);
+ std::fill(std::begin(m_core->local_regs), std::end(m_core->local_regs), 0);
+ m_core->intblock = 0;
+ m_core->powerdown = 0;
+
+ m_power_down_req = 1;
+ m_op = 0;
m_instruction_length = 0;
+ m_instruction_length_valid = false;
m_program = &space(AS_PROGRAM);
if (m_program->data_width() == 16)
{
m_program->cache(m_cache16);
- m_pr16 = [this](offs_t address) -> u16 { return m_cache16.read_word(address); };
- m_prptr = [this](offs_t address) -> const void * { return m_cache16.read_ptr(address); };
+ m_program->specific(m_specific16);
+ m_read_byte = b_r_delegate( [this] (offs_t address) { return m_specific16.read_byte(address); });
+ m_read_halfword = hw_r_delegate([this] (offs_t address) { return m_specific16.read_word(address & ~offs_t(1)); });
+ m_read_word = w_r_delegate( [this] (offs_t address) { return m_specific16.read_dword(address & ~offs_t(3)); });
+ m_write_byte = b_w_delegate( [this] (offs_t address, uint8_t data) { m_specific16.write_byte(address, data); });
+ m_write_halfword = hw_w_delegate([this] (offs_t address, uint16_t data) { m_specific16.write_word(address & ~offs_t(1), data); });
+ m_write_word = w_w_delegate( [this] (offs_t address, uint32_t data) { m_specific16.write_dword(address & ~offs_t(3), data); });
+
+ m_pr16 = [this] (offs_t address) -> u16 { return m_cache16.read_word(address); };
+ m_prptr = [this] (offs_t address) -> const void * { return m_cache16.read_ptr(address); };
}
else
{
m_program->cache(m_cache32);
+ m_program->specific(m_specific32);
+ m_read_byte = b_r_delegate( [this] (offs_t address) { return m_specific32.read_byte(address); });
+ m_read_halfword = hw_r_delegate([this] (offs_t address) { return m_specific32.read_word(address & ~offs_t(1)); });
+ m_read_word = w_r_delegate( [this] (offs_t address) { return m_specific32.read_dword(address & ~offs_t(3)); });
+ m_write_byte = b_w_delegate( [this] (offs_t address, uint8_t data) { m_specific32.write_byte(address, data); });
+ m_write_halfword = hw_w_delegate([this] (offs_t address, uint16_t data) { m_specific32.write_word(address & ~offs_t(1), data); });
+ m_write_word = w_w_delegate( [this] (offs_t address, uint32_t data) { m_specific32.write_dword(address & ~offs_t(3), data); });
+
m_pr16 = [this](offs_t address) -> u16 { return m_cache32.read_word(address); };
if (ENDIANNESS_NATIVE != ENDIANNESS_BIG)
- m_prptr = [this](offs_t address) -> const void * {
+ m_prptr = [this] (offs_t address) -> const void * {
const u16 *ptr = static_cast<u16 *>(m_cache32.read_ptr(address & ~3));
if(!(address & 2))
ptr++;
return ptr;
};
else
- m_prptr = [this](offs_t address) -> const void * {
+ m_prptr = [this] (offs_t address) -> const void * {
const u16 *ptr = static_cast<u16 *>(m_cache32.read_ptr(address & ~3));
if(address & 2)
ptr++;
return ptr;
};
}
- m_io = &space(AS_IO);
+
+ address_space &iospace = space(AS_IO);
+ if (iospace.data_width() == 16)
+ {
+ iospace.specific(m_io16);
+ m_read_io = w_r_delegate([this] (offs_t address) -> uint32_t { return m_io16.read_word(address >> 13); });
+ m_write_io = w_w_delegate([this] (offs_t address, uint32_t data) { m_io16.write_word(address >> 13, uint16_t(data)); });
+ }
+ else
+ {
+ iospace.specific(m_io32);
+ m_read_io = w_r_delegate([this] (offs_t address) -> uint32_t { return m_io32.read_dword(address >> 13); });
+ m_write_io = w_w_delegate([this] (offs_t address, uint32_t data) { m_io32.write_dword(address >> 13, data); });
+ }
m_timer = timer_alloc(FUNC(hyperstone_device::timer_callback), this);
- m_core->clock_scale_mask = scale_mask;
+ m_core->clock_scale_mask = 0;
for (uint8_t i = 0; i < 16; i++)
{
m_core->fl_lut[i] = (i ? i : 16);
}
- uint32_t umlflags = 0;
- m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, umlflags, 1, 32, 1);
-
- // add UML symbols-
- m_drcuml->symbol_add(&m_core->global_regs[0], sizeof(uint32_t), "pc");
- m_drcuml->symbol_add(&m_core->global_regs[1], sizeof(uint32_t), "sr");
- m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount");
+ const uint32_t umlflags = 0;
+ m_drcuml = std::make_unique<drcuml_state>(*this, m_cache, umlflags, 4, 32, 1);
+
+ // add UML symbols
+ m_drcuml->symbol_add(&m_core->global_regs[PC_REGISTER], sizeof(m_core->global_regs[PC_REGISTER]), "pc");
+ m_drcuml->symbol_add(&m_core->global_regs[SR_REGISTER], sizeof(m_core->global_regs[SR_REGISTER]), "sr");
+ m_drcuml->symbol_add(&m_core->global_regs[FER_REGISTER], sizeof(m_core->global_regs[FER_REGISTER]), "fer");
+ m_drcuml->symbol_add(&m_core->global_regs[SP_REGISTER], sizeof(m_core->global_regs[SP_REGISTER]), "sp");
+ m_drcuml->symbol_add(&m_core->global_regs[UB_REGISTER], sizeof(m_core->global_regs[UB_REGISTER]), "ub");
+ m_drcuml->symbol_add(&m_core->trap_entry, sizeof(m_core->trap_entry), "trap_entry");
+ m_drcuml->symbol_add(&m_core->delay_pc, sizeof(m_core->delay_pc), "delay_pc");
+ m_drcuml->symbol_add(&m_core->delay_slot, sizeof(m_core->delay_slot), "delay_slot");
+ m_drcuml->symbol_add(&m_core->delay_slot_taken, sizeof(m_core->delay_slot_taken), "delay_slot_taken");
+ m_drcuml->symbol_add(&m_core->intblock, sizeof(m_core->intblock), "intblock");
+ m_drcuml->symbol_add(&m_core->powerdown, sizeof(m_core->powerdown), "powerdown");
+ m_drcuml->symbol_add(&m_core->arg0, sizeof(m_core->arg0), "arg0");
+ m_drcuml->symbol_add(&m_core->arg1, sizeof(m_core->arg1), "arg1");
+ m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount");
char buf[4];
- for (int i=0; i < 32; i++)
+ buf[3] = '\0';
+ buf[0] = 'g';
+ for (int i = 0; i < 32; i++)
{
- sprintf(buf, "g%d", i);
+ if (9 < i)
+ {
+ buf[1] = '0' + (i / 10);
+ buf[2] = '0' + (i % 10);
+ }
+ else
+ {
+ buf[1] = '0' + i;
+ buf[2] = '\0';
+ }
m_drcuml->symbol_add(&m_core->global_regs[i], sizeof(uint32_t), buf);
}
-
- for (int i=0; i < 64; i++)
+ buf[0] = 'l';
+ for (int i = 0; i < 64; i++)
{
- sprintf(buf, "l%d", i);
+ if (9 < i)
+ {
+ buf[1] = '0' + (i / 10);
+ buf[2] = '0' + (i % 10);
+ }
+ else
+ {
+ buf[1] = '0' + i;
+ buf[2] = '\0';
+ }
m_drcuml->symbol_add(&m_core->local_regs[i], sizeof(uint32_t), buf);
}
@@ -1173,7 +1609,7 @@ void hyperstone_device::init(int scale_mask)
m_drcuml->symbol_add(&m_core->arg1, sizeof(uint32_t), "arg1");
/* initialize the front-end helper */
- m_drcfe = std::make_unique<e132xs_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
+ m_drcfe = std::make_unique<e132xs_frontend>(*this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, m_single_instruction_mode ? 1 : COMPILE_MAX_SEQUENCE);
/* mark the cache dirty so it is updated on next execute */
m_cache_dirty = true;
@@ -1214,93 +1650,17 @@ void hyperstone_device::init(int scale_mask)
state_add(E132XS_G29, "G29", m_core->global_regs[29]).mask(0xffffffff);
state_add(E132XS_G30, "G30", m_core->global_regs[30]).mask(0xffffffff);
state_add(E132XS_G31, "G31", m_core->global_regs[31]).mask(0xffffffff);
- state_add(E132XS_CL0, "CL0", m_core->local_regs[(0 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL1, "CL1", m_core->local_regs[(1 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL2, "CL2", m_core->local_regs[(2 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL3, "CL3", m_core->local_regs[(3 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL4, "CL4", m_core->local_regs[(4 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL5, "CL5", m_core->local_regs[(5 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL6, "CL6", m_core->local_regs[(6 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL7, "CL7", m_core->local_regs[(7 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL8, "CL8", m_core->local_regs[(8 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL9, "CL9", m_core->local_regs[(9 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL10, "CL10", m_core->local_regs[(10 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL11, "CL11", m_core->local_regs[(11 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL12, "CL12", m_core->local_regs[(12 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL13, "CL13", m_core->local_regs[(13 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL14, "CL14", m_core->local_regs[(14 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_CL15, "CL15", m_core->local_regs[(15 + GET_FP) % 64]).mask(0xffffffff);
- state_add(E132XS_L0, "L0", m_core->local_regs[0]).mask(0xffffffff);
- state_add(E132XS_L1, "L1", m_core->local_regs[1]).mask(0xffffffff);
- state_add(E132XS_L2, "L2", m_core->local_regs[2]).mask(0xffffffff);
- state_add(E132XS_L3, "L3", m_core->local_regs[3]).mask(0xffffffff);
- state_add(E132XS_L4, "L4", m_core->local_regs[4]).mask(0xffffffff);
- state_add(E132XS_L5, "L5", m_core->local_regs[5]).mask(0xffffffff);
- state_add(E132XS_L6, "L6", m_core->local_regs[6]).mask(0xffffffff);
- state_add(E132XS_L7, "L7", m_core->local_regs[7]).mask(0xffffffff);
- state_add(E132XS_L8, "L8", m_core->local_regs[8]).mask(0xffffffff);
- state_add(E132XS_L9, "L9", m_core->local_regs[9]).mask(0xffffffff);
- state_add(E132XS_L10, "L10", m_core->local_regs[10]).mask(0xffffffff);
- state_add(E132XS_L11, "L11", m_core->local_regs[11]).mask(0xffffffff);
- state_add(E132XS_L12, "L12", m_core->local_regs[12]).mask(0xffffffff);
- state_add(E132XS_L13, "L13", m_core->local_regs[13]).mask(0xffffffff);
- state_add(E132XS_L14, "L14", m_core->local_regs[14]).mask(0xffffffff);
- state_add(E132XS_L15, "L15", m_core->local_regs[15]).mask(0xffffffff);
- state_add(E132XS_L16, "L16", m_core->local_regs[16]).mask(0xffffffff);
- state_add(E132XS_L17, "L17", m_core->local_regs[17]).mask(0xffffffff);
- state_add(E132XS_L18, "L18", m_core->local_regs[18]).mask(0xffffffff);
- state_add(E132XS_L19, "L19", m_core->local_regs[19]).mask(0xffffffff);
- state_add(E132XS_L20, "L20", m_core->local_regs[20]).mask(0xffffffff);
- state_add(E132XS_L21, "L21", m_core->local_regs[21]).mask(0xffffffff);
- state_add(E132XS_L22, "L22", m_core->local_regs[22]).mask(0xffffffff);
- state_add(E132XS_L23, "L23", m_core->local_regs[23]).mask(0xffffffff);
- state_add(E132XS_L24, "L24", m_core->local_regs[24]).mask(0xffffffff);
- state_add(E132XS_L25, "L25", m_core->local_regs[25]).mask(0xffffffff);
- state_add(E132XS_L26, "L26", m_core->local_regs[26]).mask(0xffffffff);
- state_add(E132XS_L27, "L27", m_core->local_regs[27]).mask(0xffffffff);
- state_add(E132XS_L28, "L28", m_core->local_regs[28]).mask(0xffffffff);
- state_add(E132XS_L29, "L29", m_core->local_regs[29]).mask(0xffffffff);
- state_add(E132XS_L30, "L30", m_core->local_regs[30]).mask(0xffffffff);
- state_add(E132XS_L31, "L31", m_core->local_regs[31]).mask(0xffffffff);
- state_add(E132XS_L32, "L32", m_core->local_regs[32]).mask(0xffffffff);
- state_add(E132XS_L33, "L33", m_core->local_regs[33]).mask(0xffffffff);
- state_add(E132XS_L34, "L34", m_core->local_regs[34]).mask(0xffffffff);
- state_add(E132XS_L35, "L35", m_core->local_regs[35]).mask(0xffffffff);
- state_add(E132XS_L36, "L36", m_core->local_regs[36]).mask(0xffffffff);
- state_add(E132XS_L37, "L37", m_core->local_regs[37]).mask(0xffffffff);
- state_add(E132XS_L38, "L38", m_core->local_regs[38]).mask(0xffffffff);
- state_add(E132XS_L39, "L39", m_core->local_regs[39]).mask(0xffffffff);
- state_add(E132XS_L40, "L40", m_core->local_regs[40]).mask(0xffffffff);
- state_add(E132XS_L41, "L41", m_core->local_regs[41]).mask(0xffffffff);
- state_add(E132XS_L42, "L42", m_core->local_regs[42]).mask(0xffffffff);
- state_add(E132XS_L43, "L43", m_core->local_regs[43]).mask(0xffffffff);
- state_add(E132XS_L44, "L44", m_core->local_regs[44]).mask(0xffffffff);
- state_add(E132XS_L45, "L45", m_core->local_regs[45]).mask(0xffffffff);
- state_add(E132XS_L46, "L46", m_core->local_regs[46]).mask(0xffffffff);
- state_add(E132XS_L47, "L47", m_core->local_regs[47]).mask(0xffffffff);
- state_add(E132XS_L48, "L48", m_core->local_regs[48]).mask(0xffffffff);
- state_add(E132XS_L49, "L49", m_core->local_regs[49]).mask(0xffffffff);
- state_add(E132XS_L50, "L50", m_core->local_regs[50]).mask(0xffffffff);
- state_add(E132XS_L51, "L51", m_core->local_regs[51]).mask(0xffffffff);
- state_add(E132XS_L52, "L52", m_core->local_regs[52]).mask(0xffffffff);
- state_add(E132XS_L53, "L53", m_core->local_regs[53]).mask(0xffffffff);
- state_add(E132XS_L54, "L54", m_core->local_regs[54]).mask(0xffffffff);
- state_add(E132XS_L55, "L55", m_core->local_regs[55]).mask(0xffffffff);
- state_add(E132XS_L56, "L56", m_core->local_regs[56]).mask(0xffffffff);
- state_add(E132XS_L57, "L57", m_core->local_regs[57]).mask(0xffffffff);
- state_add(E132XS_L58, "L58", m_core->local_regs[58]).mask(0xffffffff);
- state_add(E132XS_L59, "L59", m_core->local_regs[59]).mask(0xffffffff);
- state_add(E132XS_L60, "L60", m_core->local_regs[60]).mask(0xffffffff);
- state_add(E132XS_L61, "L61", m_core->local_regs[61]).mask(0xffffffff);
- state_add(E132XS_L62, "L62", m_core->local_regs[62]).mask(0xffffffff);
- state_add(E132XS_L63, "L63", m_core->local_regs[63]).mask(0xffffffff);
+ for (int i = 0; i < 16; i++)
+ state_add(E132XS_CL0 + i, util::string_format("L%d", i).c_str(), m_debug_local_regs[i]).mask(0xffffffff).callimport().callexport();
+ for (int i = 0; i < 64; i++)
+ state_add(E132XS_L0 + i, util::string_format("S%d", i).c_str(), m_core->local_regs[i]).mask(0xffffffff);
save_item(NAME(m_core->global_regs));
save_item(NAME(m_core->local_regs));
save_item(NAME(m_core->trap_entry));
- save_item(NAME(m_core->delay_pc));
- save_item(NAME(m_instruction_length));
save_item(NAME(m_core->intblock));
+ save_item(NAME(m_core->powerdown));
+ save_item(NAME(m_core->delay_pc));
save_item(NAME(m_core->delay_slot));
save_item(NAME(m_core->delay_slot_taken));
save_item(NAME(m_core->tr_clocks_per_tick));
@@ -1308,86 +1668,105 @@ void hyperstone_device::init(int scale_mask)
save_item(NAME(m_core->tr_base_cycles));
save_item(NAME(m_core->timer_int_pending));
save_item(NAME(m_core->clck_scale));
- save_item(NAME(m_core->clock_scale_mask));
save_item(NAME(m_core->clock_cycles_1));
save_item(NAME(m_core->clock_cycles_2));
save_item(NAME(m_core->clock_cycles_3));
save_item(NAME(m_core->clock_cycles_4));
save_item(NAME(m_core->clock_cycles_6));
save_item(NAME(m_core->clock_cycles_36));
+ save_item(NAME(m_power_down_req));
+ save_item(NAME(m_instruction_length));
// set our instruction counter
set_icountptr(m_core->icount);
}
-void e116t_device::device_start()
+void hyperstone_x_device::device_start()
{
- init(0);
-}
-
-void e116xt_device::device_start()
-{
- init(3);
-}
+ hyperstone_device::device_start();
+ m_core->clock_scale_mask = 3;
-void e116xs_device::device_start()
-{
- init(7);
-}
-
-void e116xsr_device::device_start()
-{
- init(7);
-}
-
-void gms30c2116_device::device_start()
-{
- init(0);
+ address_space &internalspace = space(AS_INTERNAL);
+ internalspace.specific(m_internal_specific);
+ if (space(AS_IO).data_width() == 16)
+ {
+ m_read_io = w_r_delegate(
+ [this] (offs_t address) -> uint32_t
+ {
+ if (!BIT(address, 27))
+ return m_io16.read_word(address >> 13);
+ else
+ return m_internal_specific.read_dword(address >> 13);
+ });
+ m_write_io = w_w_delegate(
+ [this] (offs_t address, uint32_t data)
+ {
+ if (!BIT(address, 27))
+ m_io16.write_word(address >> 13, uint16_t(data));
+ else
+ m_internal_specific.write_dword(address >> 13, data);
+ });
+ }
+ else
+ {
+ m_read_io = w_r_delegate(
+ [this] (offs_t address) -> uint32_t
+ {
+ if (!BIT(address, 27))
+ return m_io32.read_dword(address >> 13);
+ else
+ return m_internal_specific.read_dword(address >> 13);
+ });
+ m_write_io = w_w_delegate(
+ [this] (offs_t address, uint32_t data)
+ {
+ if (!BIT(address, 27))
+ m_io32.write_dword(address >> 13, data);
+ else
+ m_internal_specific.write_dword(address >> 13, data);
+ });
+ }
}
-void gms30c2216_device::device_start()
+void hyperstone_xs_device::device_start()
{
- init(0);
-}
+ hyperstone_x_device::device_start();
-void e132n_device::device_start()
-{
- init(0);
+ m_core->clock_scale_mask = 7;
+ m_sdram_installed = false;
}
-void e132t_device::device_start()
+void hyperstone_xs_device::device_post_load()
{
- init(0);
-}
+ hyperstone_x_device::device_post_load();
-void e132xn_device::device_start()
-{
- init(3);
+ const uint32_t mcr = m_core->global_regs[MCR_REGISTER];
+ if (!BIT(mcr, 21) && !BIT(mcr, 22))
+ install_sdram_mode_control();
}
-void e132xt_device::device_start()
+void e116_device::device_start()
{
- init(3);
+ hyperstone_device::device_start();
+ m_core->clock_scale_mask = 0;
}
-void e132xs_device::device_start()
+void gms30c2116_device::device_start()
{
- init(7);
+ hyperstone_device::device_start();
+ m_core->clock_scale_mask = 0;
}
-void e132xsr_device::device_start()
+void e132_device::device_start()
{
- init(7);
+ hyperstone_device::device_start();
+ m_core->clock_scale_mask = 0;
}
void gms30c2132_device::device_start()
{
- init(0);
-}
-
-void gms30c2232_device::device_start()
-{
- init(0);
+ hyperstone_device::device_start();
+ m_core->clock_scale_mask = 0;
}
void hyperstone_device::device_reset()
@@ -1398,9 +1777,11 @@ void hyperstone_device::device_reset()
m_core->trap_entry = s_trap_entries[E132XS_ENTRY_MEM3]; // default entry point @ MEM3
- set_global_register(BCR_REGISTER, ~0);
- set_global_register(MCR_REGISTER, ~0);
- set_global_register(FCR_REGISTER, ~0);
+ m_core->global_regs[BCR_REGISTER] = ~uint32_t(0);
+ m_core->global_regs[MCR_REGISTER] = ~uint32_t(0);
+ update_bus_control();
+ update_memory_control();
+ set_global_register(FCR_REGISTER, ~uint32_t(0));
set_global_register(TPR_REGISTER, 0xc000000);
PC = get_trap_addr(TRAPNO_RESET);
@@ -1412,7 +1793,7 @@ void hyperstone_device::device_reset()
SET_T(0);
SET_L(1);
SET_S(1);
- SET_ILC(1<<19);
+ SET_ILC(1 << ILC_SHIFT);
set_local_register(0, (PC & 0xfffffffe) | GET_S);
set_local_register(1, SR);
@@ -1471,10 +1852,46 @@ void hyperstone_device::device_stop()
device_memory_interface::space_config_vector hyperstone_device::memory_space_config() const
{
- return space_config_vector {
- std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(AS_IO, &m_io_config)
- };
+ return space_config_vector{
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_IO, &m_io_config) };
+}
+
+
+device_memory_interface::space_config_vector hyperstone_x_device::memory_space_config() const
+{
+ return space_config_vector{
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_IO, &m_io_config),
+ std::make_pair(AS_INTERNAL, &m_internal_config), };
+}
+
+
+//-------------------------------------------------
+// state_import - import state for the debugger
+//-------------------------------------------------
+
+void hyperstone_device::state_import(const device_state_entry &entry)
+{
+ if ((entry.index() >= E132XS_CL0) && (entry.index() <= E132XS_CL15))
+ {
+ const auto index = entry.index() - E132XS_CL0;
+ m_core->local_regs[(index + GET_FP) & 0x3f] = m_debug_local_regs[index];
+ }
+}
+
+
+//-------------------------------------------------
+// state_export - export state for the debugger
+//-------------------------------------------------
+
+void hyperstone_device::state_export(const device_state_entry &entry)
+{
+ if ((entry.index() >= E132XS_CL0) && (entry.index() <= E132XS_CL15))
+ {
+ const auto index = entry.index() - E132XS_CL0;
+ m_debug_local_regs[index] = m_core->local_regs[(index + GET_FP) & 0x3f];
+ }
}
@@ -1521,11 +1938,6 @@ std::unique_ptr<util::disasm_interface> hyperstone_device::create_disassembler()
return std::make_unique<hyperstone_disassembler>(this);
}
-u8 hyperstone_device::get_fp() const
-{
- return GET_FP;
-}
-
bool hyperstone_device::get_h() const
{
return GET_H;
@@ -1544,21 +1956,20 @@ void hyperstone_device::hyperstone_trap()
false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false
};
- check_delay_PC();
+ check_delay_pc();
const uint8_t trapno = (m_op & 0xfc) >> 2;
- const uint32_t addr = get_trap_addr(trapno);
const uint8_t code = ((m_op & 0x300) >> 6) | (m_op & 0x03);
if (trap_if_set[code])
{
if (SR & conditions[code])
- execute_trap(addr);
+ execute_trap(trapno);
}
else
{
if (!(SR & conditions[code]))
- execute_trap(addr);
+ execute_trap(trapno);
}
}
@@ -1591,23 +2002,36 @@ uint32_t hyperstone_device::execute_max_cycles() const noexcept
}
-//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t hyperstone_device::execute_input_lines() const noexcept
-{
- return 8;
-}
-
-
void hyperstone_device::execute_set_input(int inputnum, int state)
{
- if (state)
- ISR |= 1 << inputnum;
- else
- ISR &= ~(1 << inputnum);
+ if (inputnum < 7)
+ {
+ if (state)
+ {
+ if (!BIT(ISR, inputnum))
+ {
+ ISR |= 1 << inputnum;
+
+ if ((inputnum < 4) && !BIT(FCR, 28 + inputnum))
+ {
+ if (m_core->powerdown)
+ LOG("exiting power down for INT%d\n", inputnum + 1);
+ m_core->powerdown = 0;
+ }
+
+ if ((inputnum == INPUT_IO3) && ((FCR & 0x00000500) == 0x00000400))
+ {
+ if (m_core->powerdown)
+ LOG("exiting power down for IO3\n", inputnum + 1);
+ m_core->powerdown = 0;
+ }
+ }
+ }
+ else
+ {
+ ISR &= ~(1 << inputnum);
+ }
+ }
}
void hyperstone_device::hyperstone_reserved()
@@ -1678,19 +2102,26 @@ void hyperstone_device::execute_run()
return;
}
- if (m_core->intblock < 0)
- m_core->intblock = 0;
-
if (!m_instruction_length_valid)
SET_ILC(get_instruction_length(m_pr16(PC)));
- if (m_core->timer_int_pending)
- check_interrupts<IS_TIMER>();
- else
- check_interrupts<NO_TIMER>();
-
while (m_core->icount > 0)
{
+ if (m_core->powerdown)
+ {
+ m_core->icount = 0;
+ break;
+ }
+
+ if (--m_core->intblock <= 0)
+ {
+ m_core->intblock = 0;
+ if (m_core->timer_int_pending)
+ check_interrupts<IS_TIMER>();
+ else
+ check_interrupts<NO_TIMER>();
+ }
+
#if E132XS_LOG_INTERPRETER_REGS
dump_registers();
#endif
@@ -1965,33 +2396,27 @@ void hyperstone_device::execute_run()
case 0xff: hyperstone_trap(); break;
}
- SET_ILC(m_instruction_length);
-
- if (GET_T && GET_P && !m_core->delay_slot) /* Not in a Delayed Branch instructions */
+ if (((m_op & 0xfef0) != 0x0400) || !(m_op & 0x010e))
{
- uint32_t addr = get_trap_addr(TRAPNO_TRACE_EXCEPTION);
- execute_exception(addr);
+ // anything other than RET updates ILC and sets P
+ SET_ILC(m_instruction_length);
+ SET_P(1);
}
- if (--m_core->intblock <= 0)
+ if (GET_T && GET_P && !m_core->delay_slot) /* Not in a Delayed Branch instructions */
{
- m_core->intblock = 0;
- if (m_core->timer_int_pending)
- check_interrupts<IS_TIMER>();
- else
- check_interrupts<NO_TIMER>();
+ m_core->delay_slot_taken = 0;
+ execute_exception(TRAPNO_TRACE_EXCEPTION);
}
}
}
-DEFINE_DEVICE_TYPE(E116T, e116t_device, "e116t", "hyperstone E1-16T")
-DEFINE_DEVICE_TYPE(E116XT, e116xt_device, "e116xt", "hyperstone E1-16XT")
+DEFINE_DEVICE_TYPE(E116, e116_device, "e116", "hyperstone E1-16")
+DEFINE_DEVICE_TYPE(E116X, e116x_device, "e116x", "hyperstone E1-16X")
DEFINE_DEVICE_TYPE(E116XS, e116xs_device, "e116xs", "hyperstone E1-16XS")
DEFINE_DEVICE_TYPE(E116XSR, e116xsr_device, "e116xsr", "hyperstone E1-16XSR")
-DEFINE_DEVICE_TYPE(E132N, e132n_device, "e132n", "hyperstone E1-32N")
-DEFINE_DEVICE_TYPE(E132T, e132t_device, "e132t", "hyperstone E1-32T")
-DEFINE_DEVICE_TYPE(E132XN, e132xn_device, "e132xn", "hyperstone E1-32XN")
-DEFINE_DEVICE_TYPE(E132XT, e132xt_device, "e132xt", "hyperstone E1-32XT")
+DEFINE_DEVICE_TYPE(E132, e132_device, "e132", "hyperstone E1-32")
+DEFINE_DEVICE_TYPE(E132X, e132x_device, "e132x", "hyperstone E1-32X")
DEFINE_DEVICE_TYPE(E132XS, e132xs_device, "e132xs", "hyperstone E1-32XS")
DEFINE_DEVICE_TYPE(E132XSR, e132xsr_device, "e132xsr", "hyperstone E1-32XSR")
DEFINE_DEVICE_TYPE(GMS30C2116, gms30c2116_device, "gms30c2116", "Hynix GMS30C2116")
diff --git a/src/devices/cpu/e132xs/e132xs.h b/src/devices/cpu/e132xs/e132xs.h
index 51f9c5cc3c1..dee3fb4b60e 100644
--- a/src/devices/cpu/e132xs/e132xs.h
+++ b/src/devices/cpu/e132xs/e132xs.h
@@ -6,10 +6,14 @@
#pragma once
#include "32xsdasm.h"
+
#include "cpu/drcfe.h"
#include "cpu/drcuml.h"
#include "cpu/drcumlsh.h"
+#include <utility>
+
+
/*
A note about clock multipliers and dividers:
@@ -30,16 +34,8 @@
CONSTANTS
***************************************************************************/
-/* map variables */
-#define MAPVAR_PC M0
-#define MAPVAR_CYCLES M1
-
#define E132XS_STRICT_VERIFY 0x0001 /* verify all instructions */
-#define SINGLE_INSTRUCTION_MODE (1)
-
-#define ENABLE_E132XS_DRC (1)
-
#define E132XS_LOG_DRC_REGS (0)
#define E132XS_LOG_INTERPRETER_REGS (0)
#define E132XS_COUNT_INSTRUCTIONS (0)
@@ -50,7 +46,6 @@
class e132xs_frontend;
-// ======================> hyperstone_device
enum
{
@@ -108,44 +103,34 @@ enum
E132XS_L60, E132XS_L61, E132XS_L62, E132XS_L63
};
+
// Used by core CPU interface
class hyperstone_device : public cpu_device, public hyperstone_disassembler::config
{
friend class e132xs_frontend;
public:
- virtual ~hyperstone_device() override;
-
- inline void ccfunc_unimplemented();
- inline void ccfunc_print();
- inline void ccfunc_total_cycles();
- inline void ccfunc_standard_irq_callback();
-
-#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
- void dump_registers();
-#endif
- void update_timer_prescale();
- void compute_tr();
- void adjust_timer_interrupt();
+ // input line numbers
+ static inline constexpr int INPUT_INT1 = 0;
+ static inline constexpr int INPUT_INT2 = 1;
+ static inline constexpr int INPUT_INT3 = 2;
+ static inline constexpr int INPUT_INT4 = 3;
+ static inline constexpr int INPUT_IO1 = 4;
+ static inline constexpr int INPUT_IO2 = 5;
+ static inline constexpr int INPUT_IO3 = 6;
+
+ // configuration
+ void set_single_instruction_mode(bool val) { m_single_instruction_mode = val; }
- void e116_16k_iram_map(address_map &map);
- void e116_4k_iram_map(address_map &map);
- void e116_8k_iram_map(address_map &map);
- void e132_16k_iram_map(address_map &map);
- void e132_4k_iram_map(address_map &map);
- void e132_8k_iram_map(address_map &map);
-
- static uint32_t imm_length(uint16_t op);
+ virtual ~hyperstone_device() override;
protected:
- // compilation boundaries -- how far back/forward does the analysis extend?
- enum : u32
- {
- COMPILE_BACKWARDS_BYTES = 128,
- COMPILE_FORWARDS_BYTES = 512,
- COMPILE_MAX_INSTRUCTIONS = (COMPILE_BACKWARDS_BYTES / 4) + (COMPILE_FORWARDS_BYTES / 4),
- COMPILE_MAX_SEQUENCE = 64
- };
+ using b_r_delegate = delegate<uint8_t (offs_t)>;
+ using hw_r_delegate = delegate<uint16_t (offs_t)>;
+ using w_r_delegate = delegate<uint32_t (offs_t)>;
+ using b_w_delegate = delegate<void (offs_t, uint8_t)>;
+ using hw_w_delegate = delegate<void (offs_t, uint16_t)>;
+ using w_w_delegate = delegate<void (offs_t, uint32_t)>;
// exit codes
enum : int
@@ -188,6 +173,7 @@ protected:
uint32_t delay_slot_taken;
int32_t intblock;
+ uint32_t powerdown;
uint32_t arg0;
uint32_t arg1;
@@ -249,74 +235,87 @@ protected:
IS_TIMER = 1
};
- enum
- {
- EXCEPTION_IO2 = 48,
- EXCEPTION_IO1 = 49,
- EXCEPTION_INT4 = 50,
- EXCEPTION_INT3 = 51,
- EXCEPTION_INT2 = 52,
- EXCEPTION_INT1 = 53,
- EXCEPTION_IO3 = 54,
- EXCEPTION_TIMER = 55,
- EXCEPTION_RESERVED1 = 56,
- EXCEPTION_TRACE = 57,
- EXCEPTION_PARITY_ERROR = 58,
- EXCEPTION_EXTENDED_OVERFLOW = 59,
- EXCEPTION_RANGE_ERROR = 60,
- EXCEPTION_PRIVILEGE_ERROR = EXCEPTION_RANGE_ERROR,
- EXCEPTION_FRAME_ERROR = EXCEPTION_RANGE_ERROR,
- EXCEPTION_RESERVED2 = 61,
- EXCEPTION_RESET = 62, // reserved if not mapped @ MEM3
- EXCEPTION_ERROR_ENTRY = 63, // for instruction code of all ones
- EXCEPTION_COUNT
- };
-
// construction/destruction
- hyperstone_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock,
- const device_type type, uint32_t prg_data_width, uint32_t io_data_width, address_map_constructor internal_map);
-
- void init(int scale_mask);
-
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
-
- // device_execute_interface overrides
+ hyperstone_device(
+ const machine_config &mconfig,
+ const device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ uint32_t prg_data_width,
+ uint32_t io_data_width,
+ uint32_t io_addr_bits,
+ address_map_constructor internal_map);
+
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
+
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual u8 get_fp() const override;
virtual bool get_h() const override;
- // device_state_interface overrides
+ // device_state_interface implementation
+ virtual void state_import(const device_state_entry &entry) override;
+ virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
+ void dump_registers();
+#endif
+ void update_timer_prescale();
+ void compute_tr();
+ void adjust_timer_interrupt();
+ virtual void update_bus_control();
+ virtual void update_memory_control();
+
+ void iram_4k_map(address_map &map) ATTR_COLD;
+
+ static uint32_t imm_length(uint16_t op);
+
// address spaces
const address_space_config m_program_config;
const address_space_config m_io_config;
address_space *m_program;
memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache16;
memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_cache32;
+ memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_specific16;
+ memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_specific32;
+
+ memory_access< 6 + 3, 1, -1, ENDIANNESS_BIG>::specific m_io16;
+ memory_access<10 + 3, 2, -2, ENDIANNESS_BIG>::specific m_io32;
+
+ b_r_delegate m_read_byte;
+ hw_r_delegate m_read_halfword;
+ w_r_delegate m_read_word;
+ b_w_delegate m_write_byte;
+ hw_w_delegate m_write_halfword;
+ w_w_delegate m_write_word;
+
+ w_r_delegate m_read_io;
+ w_w_delegate m_write_io;
std::function<u16 (offs_t)> m_pr16;
std::function<const void * (offs_t)> m_prptr;
- address_space *m_io;
- uint16_t m_op; // opcode
-
- /* core state */
+ // core state
internal_hyperstone_state *m_core;
+ // onboard peripheral state
+ uint8_t m_power_down_req;
+
+ // stuff used by the interpreter while handling one instruction
+ uint16_t m_op;
int32_t m_instruction_length;
bool m_instruction_length_valid;
@@ -330,7 +329,7 @@ protected:
private:
// internal functions
- template <hyperstone_device::is_timer TIMER> void check_interrupts();
+ template <hyperstone_device::is_timer Timer> void check_interrupts();
void set_global_register(uint8_t code, uint32_t val);
void set_local_register(uint8_t code, uint32_t val);
@@ -346,6 +345,7 @@ private:
TIMER_CALLBACK_MEMBER(timer_callback);
+ void check_delay_pc();
uint32_t decode_const();
uint32_t decode_immediate_s();
void ignore_immediate_s();
@@ -353,85 +353,85 @@ private:
void ignore_pcrel();
void hyperstone_br();
- void execute_trap(uint32_t addr);
+ void execute_trap(uint8_t trapno);
void execute_int(uint32_t addr);
- void execute_exception(uint32_t addr);
+ void execute_exception(uint8_t trapno);
void execute_software();
- template <reg_bank DST_GLOBAL> uint64_t get_double_word(uint8_t dst_code, uint8_t dstf_code) const;
- template <reg_bank DST_GLOBAL> void set_double_word(uint8_t dst_code, uint8_t dstf_code, uint64_t val);
-
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_chk();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_movd();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_divsu();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_xm();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mask();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sum();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sums();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_cmp();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mov();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_add();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_adds();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_cmpb();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_subc();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_sub();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_subs();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_addc();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_neg();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_negs();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_and();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_andn();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_or();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_xor();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_not();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_cmpi();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_movi();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_addi();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_addsi();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_cmpbi();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_andni();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_ori();
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void hyperstone_xori();
- template <shift_type HI_N> void hyperstone_shrdi();
+ template <reg_bank DstGlobal> uint64_t get_double_word(uint8_t dst_code, uint8_t dstf_code) const;
+ template <reg_bank DstGlobal> void set_double_word(uint8_t dst_code, uint8_t dstf_code, uint64_t val);
+
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_chk();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_movd();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void hyperstone_divsu();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_xm();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mask();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sum();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sums();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_cmp();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mov();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_add();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_adds();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_cmpb();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_subc();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_sub();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_subs();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_addc();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_neg();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_negs();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_and();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_andn();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_or();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_xor();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_not();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_cmpi();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_movi();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_addi();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_addsi();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_cmpbi();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_andni();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_ori();
+ template <reg_bank DstGlobal, imm_size ImmLong> void hyperstone_xori();
+ template <shift_type HiN> void hyperstone_shrdi();
void hyperstone_shrd();
void hyperstone_shr();
- template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_shri();
- template <shift_type HI_N> void hyperstone_sardi();
+ template <shift_type HiN, reg_bank DstGlobal> void hyperstone_shri();
+ template <shift_type HiN> void hyperstone_sardi();
void hyperstone_sard();
void hyperstone_sar();
- template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_sari();
- template <shift_type HI_N> void hyperstone_shldi();
+ template <shift_type HiN, reg_bank DstGlobal> void hyperstone_sari();
+ template <shift_type HiN> void hyperstone_shldi();
void hyperstone_shld();
void hyperstone_shl();
- template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_shli();
+ template <shift_type HiN, reg_bank DstGlobal> void hyperstone_shli();
void hyperstone_testlz();
void hyperstone_rol();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_ldxx1();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_ldxx2();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_stxx1();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_stxx2();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_ldxx1();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_ldxx2();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_stxx1();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_stxx2();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void hyperstone_mulsu();
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void hyperstone_mul();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void hyperstone_mulsu();
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void hyperstone_mul();
- template <shift_type HI_N, reg_bank DST_GLOBAL> void hyperstone_set();
+ template <shift_type HiN, reg_bank DstGlobal> void hyperstone_set();
- template <reg_bank SRC_GLOBAL> void hyperstone_ldwr();
- template <reg_bank SRC_GLOBAL> void hyperstone_lddr();
- template <reg_bank SRC_GLOBAL> void hyperstone_ldwp();
- template <reg_bank SRC_GLOBAL> void hyperstone_lddp();
+ template <reg_bank SrcGlobal> void hyperstone_ldwr();
+ template <reg_bank SrcGlobal> void hyperstone_lddr();
+ template <reg_bank SrcGlobal> void hyperstone_ldwp();
+ template <reg_bank SrcGlobal> void hyperstone_lddp();
- template <reg_bank SRC_GLOBAL> void hyperstone_stwr();
- template <reg_bank SRC_GLOBAL> void hyperstone_stdr();
- template <reg_bank SRC_GLOBAL> void hyperstone_stwp();
- template <reg_bank SRC_GLOBAL> void hyperstone_stdp();
+ template <reg_bank SrcGlobal> void hyperstone_stwr();
+ template <reg_bank SrcGlobal> void hyperstone_stdr();
+ template <reg_bank SrcGlobal> void hyperstone_stwp();
+ template <reg_bank SrcGlobal> void hyperstone_stdp();
- template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_b();
- template <branch_condition CONDITION, condition_set COND_SET> void hyperstone_db();
+ template <branch_condition Condition, condition_set CondSet> void hyperstone_b();
+ template <branch_condition Condition, condition_set CondSet> void hyperstone_db();
void hyperstone_dbr();
void hyperstone_frame();
- template <hyperstone_device::reg_bank SRC_GLOBAL> void hyperstone_call();
+ template <hyperstone_device::reg_bank SrcGlobal> void hyperstone_call();
void hyperstone_trap();
void hyperstone_extend();
@@ -447,12 +447,15 @@ private:
std::unique_ptr<drcuml_state> m_drcuml;
std::unique_ptr<e132xs_frontend> m_drcfe;
uint32_t m_drcoptions;
+ bool m_single_instruction_mode;
uint8_t m_cache_dirty;
uml::code_handle *m_entry;
uml::code_handle *m_nocode;
uml::code_handle *m_interrupt_checks;
uml::code_handle *m_out_of_cycles;
+ uml::code_handle *m_eat_all_cycles;
+ uml::code_handle *m_delay_taken[4];
uml::code_handle *m_mem_read8;
uml::code_handle *m_mem_write8;
@@ -462,130 +465,141 @@ private:
uml::code_handle *m_mem_write32;
uml::code_handle *m_io_read32;
uml::code_handle *m_io_write32;
- uml::code_handle *m_exception[EXCEPTION_COUNT];
+ uml::code_handle *m_exception;
+
+ uint32_t m_debug_local_regs[16];
bool m_enable_drc;
/* internal compiler state */
- struct compiler_state
- {
- compiler_state(compiler_state const &) = delete;
- compiler_state &operator=(compiler_state const &) = delete;
-
- uint32_t m_cycles; /* accumulated cycles */
- uint8_t m_checkints; /* need to check interrupts before next instruction */
- uml::code_label m_labelnum; /* index for local labels */
- };
+ struct compiler_state;
+ struct c_funcs;
void execute_run_drc();
void flush_drc_cache();
void code_flush_cache();
- void code_compile_block(offs_t pc);
+ void code_compile_block(uint8_t mode, offs_t pc);
//void load_fast_iregs(drcuml_block &block);
//void save_fast_iregs(drcuml_block &block);
- void static_generate_entry_point();
- void static_generate_nocode_handler();
- void static_generate_out_of_cycles();
- void static_generate_exception(uint32_t exception, const char *name);
- void static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr);
- void static_generate_interrupt_checks();
- void generate_interrupt_checks_no_timer(drcuml_block &block, uml::code_label &labelnum);
- void generate_interrupt_checks_with_timer(drcuml_block &block, uml::code_label &labelnum);
- void generate_branch(drcuml_block &block, uml::parameter targetpc, const opcode_desc *desc, bool update_cycles = true);
- void generate_update_cycles(drcuml_block &block, bool check_interrupts = true);
+ void static_generate_helpers(drcuml_block &block, uml::code_label &label);
+ void static_generate_memory_accessor(drcuml_block &block, uml::code_label &label, uml::operand_size size, bool iswrite, uml::code_handle *handleptr);
+ virtual void static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr);
+ void static_generate_exception(drcuml_block &block, uml::code_label &label);
+ void static_generate_interrupt_checks(drcuml_block &block, uml::code_label &label);
+ void generate_interrupt_checks(drcuml_block &block, uml::code_label &labelnum, bool with_timer, int take_int, int take_timer);
+ void generate_branch(drcuml_block &block, compiler_state &compiler, uml::parameter mode, uml::parameter targetpc, const opcode_desc *desc);
+ void generate_update_cycles(drcuml_block &block);
void generate_checksum_block(drcuml_block &block, compiler_state &compiler, const opcode_desc *seqhead, const opcode_desc *seqlast);
void generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void log_add_disasm_comment(drcuml_block &block, uint32_t pc, uint32_t op);
bool generate_opcode(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uint32_t trapno);
- void generate_check_delay_pc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_decode_const(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc);
- void generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc);
- void generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc);
-
- void generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- void generate_set_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
-
- template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block &block);
- void generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
- void generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr);
+ void generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uml::parameter trapno);
+ uint32_t generate_get_const(const opcode_desc *desc);
+ uint32_t generate_get_immediate_s(const opcode_desc *desc);
+ uint32_t generate_get_pcrel(const opcode_desc *desc);
+ std::pair<uint16_t, uint32_t> generate_get_d_code_dis(const opcode_desc *opcode);
+
+ void generate_get_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t code, uml::parameter dst);
+ void generate_set_global_register_low(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, uml::parameter src);
+ void generate_set_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t dst_code, uml::parameter src);
+
+ void generate_load_operand(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx);
+ void generate_load_src_addsub(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uml::parameter sr);
+ uml::parameter generate_load_address_ad(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx);
+ void generate_load_address_ns(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uint16_t d_code, uint32_t dis);
+ void generate_load_address_rp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t code, uml::parameter dst, uml::parameter localidx, uint32_t dis);
+ void generate_add_dis(drcuml_block &block, compiler_state &compiler, uml::parameter dst, uml::parameter base, uint32_t dis, unsigned alignment);
+ void generate_set_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx);
+ void generate_set_dst(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx);
+ void generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+ void generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+ void generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+ void generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+ void generate_update_nz(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+ void generate_update_nz_d(drcuml_block &block, compiler_state &compiler, uml::parameter sr);
+
+ template <trap_exception_or_int TYPE> void generate_trap_exception_or_int(drcuml_block &block, uml::code_label &label, uml::parameter trapno);
void generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, imm_size IMM_LONG> void generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ void generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno, uml::parameter sr);
+ void generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno);
+ void generate_exception_on_overflow(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal, typename T> void generate_logic_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, T &&body);
+ template <reg_bank DstGlobal, typename T> void generate_logic_op_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, T &&body);
+
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, imm_size ImmLong> void generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN> void generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_shrd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_shr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN, reg_bank DstGlobal> void generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN> void generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_sard(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_sar(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N> void generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN, reg_bank DstGlobal> void generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN> void generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_shld(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_shl(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN, reg_bank DstGlobal> void generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_testlz(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_rol(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL, sign_mode SIGNED> void generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank DST_GLOBAL, reg_bank SRC_GLOBAL> void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal, sign_mode SIGNED> void generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank DstGlobal, reg_bank SrcGlobal> void generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <shift_type HI_N, reg_bank DST_GLOBAL> void generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <shift_type HiN, reg_bank DstGlobal> void generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <reg_bank SRC_GLOBAL> void generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <reg_bank SrcGlobal> void generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <branch_condition CONDITION, condition_set COND_SET> void generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <branch_condition Condition, condition_set CondSet> void generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_br(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <branch_condition CONDITION, condition_set COND_SET> void generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <branch_condition Condition, condition_set CondSet> void generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_dbr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_frame(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
- template <hyperstone_device::reg_bank SRC_GLOBAL> void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
+ template <hyperstone_device::reg_bank SrcGlobal> void generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_trap_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
void generate_extend(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
@@ -594,155 +608,152 @@ private:
void generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc);
};
-// device type definition
-DECLARE_DEVICE_TYPE(E116T, e116t_device)
-DECLARE_DEVICE_TYPE(E116XT, e116xt_device)
-DECLARE_DEVICE_TYPE(E116XS, e116xs_device)
-DECLARE_DEVICE_TYPE(E116XSR, e116xsr_device)
-DECLARE_DEVICE_TYPE(E132N, e132n_device)
-DECLARE_DEVICE_TYPE(E132T, e132t_device)
-DECLARE_DEVICE_TYPE(E132XN, e132xn_device)
-DECLARE_DEVICE_TYPE(E132XT, e132xt_device)
-DECLARE_DEVICE_TYPE(E132XS, e132xs_device)
-DECLARE_DEVICE_TYPE(E132XSR, e132xsr_device)
-DECLARE_DEVICE_TYPE(GMS30C2116, gms30c2116_device)
-DECLARE_DEVICE_TYPE(GMS30C2132, gms30c2132_device)
-DECLARE_DEVICE_TYPE(GMS30C2216, gms30c2216_device)
-DECLARE_DEVICE_TYPE(GMS30C2232, gms30c2232_device)
-
-// ======================> e116t_device
-
-class e116t_device : public hyperstone_device
+class hyperstone_x_device : public hyperstone_device
{
public:
- // construction/destruction
- e116t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ static inline constexpr int INPUT_WAIT = INPUT_INT3;
protected:
- virtual void device_start() override;
-};
+ static inline constexpr int AS_INTERNAL = AS_OPCODES + 1;
+ hyperstone_x_device(
+ const machine_config &mconfig,
+ const device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ uint32_t prg_data_width,
+ uint32_t io_data_width,
+ uint32_t io_addr_bits,
+ address_map_constructor internal_map);
-// ======================> e116xt_device
+ virtual void device_start() override ATTR_COLD;
-class e116xt_device : public hyperstone_device
-{
-public:
- // construction/destruction
- e116xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ virtual space_config_vector memory_space_config() const override;
+ virtual void update_bus_control() override;
+ virtual void update_memory_control() override;
+
+ void power_down_w(uint32_t data);
+ void sleep_w(uint32_t data);
+
+ void iram_8k_map(address_map &map) ATTR_COLD;
+ void internal_io_map(address_map &map) ATTR_COLD;
+
+ virtual void static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr) override;
+
+ const address_space_config m_internal_config;
+
+private:
+ memory_access<10 + 3, 2, -2, ENDIANNESS_BIG>::specific m_internal_specific;
+};
+
+
+class hyperstone_xs_device : public hyperstone_x_device
+{
protected:
- virtual void device_start() override;
+ using hyperstone_x_device::hyperstone_x_device;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_post_load() override ATTR_COLD;
+
+ virtual void update_memory_control() override;
+
+ void sdram_mode_w(offs_t offset, uint32_t data);
+ virtual void sdram_control_w(offs_t offset, uint32_t data);
+
+ void install_sdram_mode_control();
+
+ void iram_16k_map(address_map &map) ATTR_COLD;
+
+private:
+ bool m_sdram_installed;
};
-// ======================> e116xs_device
+class hyperstone_xsr_device : public hyperstone_xs_device
+{
+protected:
+ using hyperstone_xs_device::hyperstone_xs_device;
+
+ virtual void update_bus_control() override;
+ virtual void update_memory_control() override;
+
+ virtual void sdram_control_w(offs_t offset, uint32_t data) override;
+};
+
-class e116xs_device : public hyperstone_device
+class e116_device : public hyperstone_device
{
public:
// construction/destruction
- e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ e116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
-// ======================> e116xsr_device
-
-class e116xsr_device : public hyperstone_device
+class e116x_device : public hyperstone_x_device
{
public:
// construction/destruction
- e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
+ e116x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-// ======================> e132n_device
-
-class e132n_device : public hyperstone_device
+class e116xs_device : public hyperstone_xs_device
{
public:
// construction/destruction
- e132n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
+ e116xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-// ======================> e132t_device
-
-class e132t_device : public hyperstone_device
+class e116xsr_device : public hyperstone_xsr_device
{
public:
// construction/destruction
- e132t_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
+ e116xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-// ======================> e132xn_device
-
-class e132xn_device : public hyperstone_device
+class e132_device : public hyperstone_device
{
public:
// construction/destruction
- e132xn_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ e132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
-// ======================> e132xt_device
-
-class e132xt_device : public hyperstone_device
+class e132x_device : public hyperstone_x_device
{
public:
// construction/destruction
- e132xt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
+ e132x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-// ======================> e132xs_device
-
-class e132xs_device : public hyperstone_device
+class e132xs_device : public hyperstone_xs_device
{
public:
// construction/destruction
e132xs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
};
-// ======================> e132xsr_device
-
-class e132xsr_device : public hyperstone_device
+class e132xsr_device : public hyperstone_xsr_device
{
public:
// construction/destruction
e132xsr_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
};
-// ======================> gms30c2116_device
-
class gms30c2116_device : public hyperstone_device
{
public:
@@ -750,12 +761,10 @@ public:
gms30c2116_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
-// ======================> gms30c2132_device
-
class gms30c2132_device : public hyperstone_device
{
public:
@@ -763,34 +772,38 @@ public:
gms30c2132_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
-// ======================> gms30c2216_device
-
-class gms30c2216_device : public hyperstone_device
+class gms30c2216_device : public hyperstone_x_device
{
public:
// construction/destruction
gms30c2216_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
};
-// ======================> gms30c2232_device
-
-class gms30c2232_device : public hyperstone_device
+class gms30c2232_device : public hyperstone_x_device
{
public:
// construction/destruction
gms30c2232_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-protected:
- virtual void device_start() override;
};
+DECLARE_DEVICE_TYPE(E116, e116_device)
+DECLARE_DEVICE_TYPE(E116X, e116x_device)
+DECLARE_DEVICE_TYPE(E116XS, e116xs_device)
+DECLARE_DEVICE_TYPE(E116XSR, e116xsr_device)
+DECLARE_DEVICE_TYPE(E132, e132_device)
+DECLARE_DEVICE_TYPE(E132X, e132x_device)
+DECLARE_DEVICE_TYPE(E132XS, e132xs_device)
+DECLARE_DEVICE_TYPE(E132XSR, e132xsr_device)
+DECLARE_DEVICE_TYPE(GMS30C2116, gms30c2116_device)
+DECLARE_DEVICE_TYPE(GMS30C2132, gms30c2132_device)
+DECLARE_DEVICE_TYPE(GMS30C2216, gms30c2216_device)
+DECLARE_DEVICE_TYPE(GMS30C2232, gms30c2232_device)
+
+
#endif // MAME_CPU_E132XS_E132XS_H
diff --git a/src/devices/cpu/e132xs/e132xsdrc.cpp b/src/devices/cpu/e132xs/e132xsdrc.cpp
index a07b719b8fb..4af9fd00fb1 100644
--- a/src/devices/cpu/e132xs/e132xsdrc.cpp
+++ b/src/devices/cpu/e132xs/e132xsdrc.cpp
@@ -1,127 +1,178 @@
// license:BSD-3-Clause
-// copyright-holders:Ryan Holtz
+// copyright-holders:Ryan Holtz, Vas Crabb
#include "emu.h"
#include "e132xs.h"
#include "e132xsfe.h"
#include "32xsdefs.h"
-#define DRC_PC uml::mem(m_core->global_regs)
-#define DRC_SR uml::mem(&m_core->global_regs[1])
-void hyperstone_device::execute_run_drc()
-{
- int execute_result;
+/* map variables */
+#define MAPVAR_PC M0
+#define MAPVAR_CYCLES M1
- /* reset the cache if dirty */
- if (m_cache_dirty)
- {
- code_flush_cache();
- m_cache_dirty = false;
- }
- /* execute */
- do
- {
- /* run as much as we can */
- execute_result = m_drcuml->execute(*m_entry);
+/*-------------------------------------------------
+ epc - compute the exception PC from a
+ descriptor
+-------------------------------------------------*/
- /* if we need to recompile, do it */
- if (execute_result == EXECUTE_MISSING_CODE)
- {
- code_compile_block(m_core->global_regs[0]);
- }
- else if (execute_result == EXECUTE_UNMAPPED_CODE)
- {
- fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_core->global_regs[0]);
- }
- else if (execute_result == EXECUTE_RESET_CACHE)
- {
- code_flush_cache();
- }
- } while (execute_result != EXECUTE_OUT_OF_CYCLES);
+static inline uint32_t epc(const opcode_desc *desc)
+{
+ return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->branch->pc : desc->pc;
}
-/***************************************************************************
- C FUNCTION CALLBACKS
-***************************************************************************/
-
/*-------------------------------------------------
- cfunc_unimplemented - handler for
- unimplemented opcdes
+ alloc_handle - allocate a handle if not
+ already allocated
-------------------------------------------------*/
-inline void hyperstone_device::ccfunc_unimplemented()
+static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
{
- fatalerror("PC=%08X: Unimplemented op %08X\n", PC, m_core->arg0);
+ if (!handleptr)
+ handleptr = drcuml.handle_alloc(name);
}
-inline void hyperstone_device::ccfunc_print()
-{
- printf("%c: %08x\n", (char)m_core->arg0, m_core->arg1);
-}
-inline void hyperstone_device::ccfunc_standard_irq_callback()
+struct hyperstone_device::compiler_state
{
- standard_irq_callback(m_core->arg0, m_core->global_regs[0]);
-}
+private:
+ const uint8_t m_mode;
+ uint32_t m_pc = 0;
+public:
+ uml::code_label m_labelnum = 1;
+ uint8_t m_check_delay = 1;
-static void cfunc_unimplemented(void *param)
-{
- ((hyperstone_device *)param)->ccfunc_unimplemented();
-}
+ compiler_state(uint8_t mode) : m_mode(mode) { }
+ compiler_state(compiler_state const &) = delete;
+ compiler_state &operator=(compiler_state const &) = delete;
-static void cfunc_adjust_timer_interrupt(void *param)
-{
- ((hyperstone_device *)param)->adjust_timer_interrupt();
-}
+ uint8_t mode() const { return m_mode; }
+ bool user_mode() const { return !BIT(m_mode, 0); }
+ bool supervisor_mode() const { return BIT(m_mode, 0); }
+ bool trace_mode() const { return BIT(m_mode, 1); }
-static void cfunc_compute_tr(void *param)
-{
- ((hyperstone_device *)param)->compute_tr();
-}
+ auto next_label() { return m_labelnum++; }
-static void cfunc_update_timer_prescale(void *param)
-{
- ((hyperstone_device *)param)->update_timer_prescale();
-}
+ void set_delayed_branch() { m_check_delay = 2; }
+ bool check_delay() const { return m_check_delay == 1; }
-static void cfunc_standard_irq_callback(void *param)
-{
- ((hyperstone_device *)param)->ccfunc_standard_irq_callback();
-}
+ uint32_t set_pc(uint32_t val) { return m_pc = val; }
+ uint32_t pc() const { return m_pc; }
+};
-#if 0
-static void cfunc_print(void *param)
-{
- ((hyperstone_device *)param)->ccfunc_print();
-}
-#endif
-#if E132XS_LOG_DRC_REGS
-static void cfunc_dump_registers(void *param)
+/***************************************************************************
+ C FUNCTION CALLBACKS
+***************************************************************************/
+
+struct hyperstone_device::c_funcs
{
- ((hyperstone_device *)param)->dump_registers();
-}
+
+ static void unimplemented(void *param)
+ {
+ auto &that = *reinterpret_cast<hyperstone_device *>(param);
+ fatalerror("PC=%08X: Unimplemented op %08X\n", that.PC, that.m_core->arg0);
+ }
+
+ static void print(void *param)
+ {
+ auto &that = *reinterpret_cast<hyperstone_device *>(param);
+ printf("%c: %08x\n", (char)that.m_core->arg0, that.m_core->arg1);
+ }
+
+ static void standard_irq_callback(void *param)
+ {
+ auto &that = *reinterpret_cast<hyperstone_device *>(param);
+ that.standard_irq_callback(that.m_core->arg0, that.m_core->global_regs[0]);
+ }
+
+ static void debugger_exception_hook(void *param)
+ {
+ auto &that = *reinterpret_cast<hyperstone_device *>(param);
+ that.debugger_exception_hook(int32_t(that.m_core->arg0));
+ }
+
+ static void adjust_timer_interrupt(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->adjust_timer_interrupt();
+ }
+
+ static void compute_tr(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->compute_tr();
+ }
+
+ static void update_timer_prescale(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->update_timer_prescale();
+ }
+
+ static void update_bus_control(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->update_bus_control();
+ }
+
+ static void update_memory_control(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->update_memory_control();
+ }
+
+#if E132XS_LOG_DRC_REGS || E132XS_LOG_INTERPRETER_REGS
+ static void dump_registers(void *param)
+ {
+ reinterpret_cast<hyperstone_device *>(param)->dump_registers();
+ }
#endif
-/*-------------------------------------------------
- cfunc_total_cycles - compute the total number
- of cycles executed so far
--------------------------------------------------*/
+ static void total_cycles(void *param)
+ {
+ auto &that = *reinterpret_cast<hyperstone_device *>(param);
+ that.m_core->numcycles = that.total_cycles();
+ }
+};
-void hyperstone_device::ccfunc_total_cycles()
-{
- m_core->numcycles = total_cycles();
-}
-static void cfunc_total_cycles(void *param)
+#define DRC_PC uml::mem(&m_core->global_regs[0])
+#define DRC_SR uml::mem(&m_core->global_regs[1])
+
+void hyperstone_device::execute_run_drc()
{
- ((hyperstone_device *)param)->ccfunc_total_cycles();
+ if (m_core->powerdown)
+ {
+ if (m_core->icount > 0)
+ m_core->icount = 0;
+ return;
+ }
+
+ // reset the cache if dirty
+ if (m_cache_dirty)
+ {
+ code_flush_cache();
+ m_cache_dirty = false;
+ }
+
+ // execute
+ while (true)
+ {
+ // run as much as we can
+ const int execute_result = m_drcuml->execute(*m_entry);
+
+ // if we need to recompile, do it
+ if (execute_result == EXECUTE_MISSING_CODE)
+ code_compile_block(bitswap<2>(m_core->global_regs[1], T_SHIFT, S_SHIFT), m_core->global_regs[0]);
+ else if (execute_result == EXECUTE_UNMAPPED_CODE)
+ fatalerror("Attempted to execute unmapped code at PC=%08X\n", m_core->global_regs[0]);
+ else if (execute_result == EXECUTE_RESET_CACHE)
+ code_flush_cache();
+ else if (execute_result == EXECUTE_OUT_OF_CYCLES)
+ break;
+ }
}
+
/***************************************************************************
CACHE MANAGEMENT
***************************************************************************/
@@ -150,40 +201,35 @@ void hyperstone_device::code_flush_cache()
try
{
- /* generate the entry point and out-of-cycles handlers */
- static_generate_entry_point();
- static_generate_nocode_handler();
- static_generate_out_of_cycles();
- static_generate_interrupt_checks();
-
- static_generate_exception(EXCEPTION_IO2, "io2");
- static_generate_exception(EXCEPTION_IO1, "io1");
- static_generate_exception(EXCEPTION_INT4, "int4");
- static_generate_exception(EXCEPTION_INT3, "int3");
- static_generate_exception(EXCEPTION_INT2, "int2");
- static_generate_exception(EXCEPTION_INT1, "int1");
- static_generate_exception(EXCEPTION_IO3, "io3");
- static_generate_exception(EXCEPTION_TIMER, "timer");
- static_generate_exception(EXCEPTION_RESERVED1, "reserved1");
- static_generate_exception(EXCEPTION_TRACE, "trace");
- static_generate_exception(EXCEPTION_PARITY_ERROR, "parity_error");
- static_generate_exception(EXCEPTION_EXTENDED_OVERFLOW, "extended_overflow");
- static_generate_exception(EXCEPTION_RANGE_ERROR, "range_error");
- static_generate_exception(EXCEPTION_RESERVED2, "reserved2");
- static_generate_exception(EXCEPTION_RESET, "reset");
- static_generate_exception(EXCEPTION_ERROR_ENTRY, "error_entry");
-
- /* add subroutines for memory accesses */
- static_generate_memory_accessor(1, false, false, "read8", m_mem_read8);
- static_generate_memory_accessor(1, true, false, "write8", m_mem_write8);
- static_generate_memory_accessor(2, false, false, "read16", m_mem_read16);
- static_generate_memory_accessor(2, true, false, "write16", m_mem_write16);
- static_generate_memory_accessor(4, false, false, "read32", m_mem_read32);
- static_generate_memory_accessor(4, true, false, "write32", m_mem_write32);
- static_generate_memory_accessor(4, false, true, "ioread32", m_io_read32);
- static_generate_memory_accessor(4, true, true, "iowrite32", m_io_write32);
+ drcuml_block &block(m_drcuml->begin_block(640));
+ uml::code_label label = 1;
+
+ // generate the entry point and out-of-cycles handlers
+ static_generate_helpers(block, label);
+ static_generate_exception(block, label);
+
+ // add subroutines for memory accesses
+ alloc_handle(*m_drcuml, m_mem_read8, "read8");
+ alloc_handle(*m_drcuml, m_mem_write8, "write8");
+ alloc_handle(*m_drcuml, m_mem_read16, "read16");
+ alloc_handle(*m_drcuml, m_mem_write16, "write16");
+ alloc_handle(*m_drcuml, m_mem_read32, "read32");
+ alloc_handle(*m_drcuml, m_mem_write32, "write32");
+ static_generate_memory_accessor(block, label, uml::SIZE_BYTE, false, m_mem_read8);
+ static_generate_memory_accessor(block, label, uml::SIZE_BYTE, true, m_mem_write8);
+ static_generate_memory_accessor(block, label, uml::SIZE_WORD, false, m_mem_read16);
+ static_generate_memory_accessor(block, label, uml::SIZE_WORD, true, m_mem_write16);
+ static_generate_memory_accessor(block, label, uml::SIZE_DWORD, false, m_mem_read32);
+ static_generate_memory_accessor(block, label, uml::SIZE_DWORD, true, m_mem_write32);
+
+ // add subroutines for I/O accesses
+ alloc_handle(*m_drcuml, m_io_read32, "ioread32");
+ alloc_handle(*m_drcuml, m_io_write32, "iowrite32");
+ static_generate_io_accessor(block, label, false, m_io_read32);
+ static_generate_io_accessor(block, label, true, m_io_write32);
+
+ block.end();
}
-
catch (drcuml_block::abort_compilation &)
{
fatalerror("Unable to generate static E132XS code\n"); fflush(stdout);
@@ -191,17 +237,32 @@ void hyperstone_device::code_flush_cache()
}
/* Return the entry point for a determinated trap */
-void hyperstone_device::generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uint32_t trapno)
+void hyperstone_device::generate_get_trap_addr(drcuml_block &block, uml::code_label &label, uml::parameter trapno)
{
- int no_subtract;
- UML_MOV(block, I0, trapno);
- UML_CMP(block, mem(&m_core->trap_entry), 0xffffff00);
- UML_JMPc(block, uml::COND_E, no_subtract = label++);
- UML_SUB(block, I0, 63, I0);
-
- UML_LABEL(block, no_subtract);
- UML_SHL(block, I0, I0, 2);
- UML_OR(block, I0, I0, mem(&m_core->trap_entry));
+ // sets I0 to target address
+ // clobbers I1
+ // updates label
+
+ UML_MOV(block, I1, mem(&m_core->trap_entry));
+ UML_CMP(block, I1, 0xffffff00);
+
+ if (trapno.is_immediate())
+ {
+ UML_MOV(block, I0, trapno.immediate() * 4);
+ UML_MOVc(block, uml::COND_NE, I0, (63 - trapno.immediate()) * 4);
+ }
+ else
+ {
+ const int no_subtract = label++;
+ if (trapno != uml::I0)
+ UML_MOV(block, I0, trapno);
+ UML_JMPc(block, uml::COND_E, no_subtract);
+ UML_SUB(block, I0, 63, I0);
+ UML_LABEL(block, no_subtract);
+ UML_SHL(block, I0, I0, 2);
+ }
+
+ UML_OR(block, I0, I0, I1);
}
/*-------------------------------------------------
@@ -209,9 +270,9 @@ void hyperstone_device::generate_get_trap_addr(drcuml_block &block, uml::code_la
given mode at the specified pc
-------------------------------------------------*/
-void hyperstone_device::code_compile_block(offs_t pc)
+void hyperstone_device::code_compile_block(uint8_t mode, offs_t pc)
{
- compiler_state compiler = { 0 };
+ compiler_state compiler(mode);
const opcode_desc *seqhead, *seqlast;
bool override = false;
@@ -231,9 +292,6 @@ void hyperstone_device::code_compile_block(offs_t pc)
/* loop until we get through all instruction sequences */
for (seqhead = desclist; seqhead != nullptr; seqhead = seqlast->next())
{
- const opcode_desc *curdesc;
- uint32_t nextpc;
-
/* add a code log entry */
if (m_drcuml->logging())
block.append_comment("-------------------------");
@@ -244,44 +302,45 @@ void hyperstone_device::code_compile_block(offs_t pc)
break;
assert(seqlast != nullptr);
- /* if we don't have a hash for this mode/pc, or if we are overriding all, add one */
- if (override || !m_drcuml->hash_exists(0, seqhead->pc))
- UML_HASH(block, 0, seqhead->pc);
-
- /* if we already have a hash, and this is the first sequence, assume that we */
- /* are recompiling due to being out of sync and allow future overrides */
+ if (override || !m_drcuml->hash_exists(mode, seqhead->pc))
+ {
+ // if we don't have a hash for this mode/pc, or if we are overriding all, add one
+ UML_HASH(block, mode, seqhead->pc);
+ }
else if (seqhead == desclist)
{
+ // if we already have a hash, and this is the first sequence, assume that we
+ // are recompiling due to being out of sync and allow future overrides
override = true;
- UML_HASH(block, 0, seqhead->pc);
+ UML_HASH(block, mode, seqhead->pc);
}
-
- /* otherwise, redispatch to that fixed PC and skip the rest of the processing */
else
{
+ // otherwise, redispatch to that fixed PC and skip the rest of the processing
UML_LABEL(block, seqhead->pc | 0x80000000);
- UML_HASHJMP(block, 0, seqhead->pc, *m_nocode);
+ UML_HASHJMP(block, mode, seqhead->pc, *m_nocode);
continue;
}
- /* validate this code block if we're not pointing into ROM */
+ // validate this code block if we're not pointing into ROM
if (m_program->get_write_ptr(seqhead->physpc) != nullptr)
generate_checksum_block(block, compiler, seqhead, seqlast);
- /* label this instruction, if it may be jumped to locally */
+ // label this instruction, if it may be jumped to locally
if (seqhead->flags & OPFLAG_IS_BRANCH_TARGET)
UML_LABEL(block, seqhead->pc | 0x80000000);
UML_MOV(block, I7, 0);
- UML_CALLH(block, *m_interrupt_checks);
/* iterate over instructions in the sequence and compile them */
- for (curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
+ compiler.m_check_delay = 1;
+ for (const opcode_desc *curdesc = seqhead; curdesc != seqlast->next(); curdesc = curdesc->next())
{
generate_sequence_instruction(block, compiler, curdesc);
generate_update_cycles(block);
}
+ uint32_t nextpc;
if (seqlast->flags & OPFLAG_RETURN_TO_START) /* if we need to return to the start, do it */
nextpc = pc;
else /* otherwise we just go to the next instruction */
@@ -290,7 +349,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
/* if the last instruction can change modes, use a variable mode; otherwise, assume the same mode */
if (seqlast->next() == nullptr || seqlast->next()->pc != nextpc)
{
- UML_HASHJMP(block, 0, nextpc, *m_nocode); // hashjmp <mode>,nextpc,nocode
+ UML_HASHJMP(block, mode, nextpc, *m_nocode);
}
}
@@ -298,7 +357,7 @@ void hyperstone_device::code_compile_block(offs_t pc)
block.end();
succeeded = true;
}
- catch (drcuml_block::abort_compilation &)
+ catch (const drcuml_block::abort_compilation &)
{
code_flush_cache();
}
@@ -310,229 +369,196 @@ void hyperstone_device::code_compile_block(offs_t pc)
***************************************************************************/
/*-------------------------------------------------
- epc - compute the exception PC from a
- descriptor
--------------------------------------------------*/
-
-static inline uint32_t epc(const opcode_desc *desc)
-{
- return (desc->flags & OPFLAG_IN_DELAY_SLOT) ? (desc->pc - 3) : desc->pc;
-}
-
-
-/*-------------------------------------------------
- alloc_handle - allocate a handle if not
- already allocated
--------------------------------------------------*/
-
-static inline void alloc_handle(drcuml_state &drcuml, uml::code_handle *&handleptr, const char *name)
-{
- if (!handleptr)
- handleptr = drcuml.handle_alloc(name);
-}
-
-
-
-/*-------------------------------------------------
static_generate_exception - generate an
exception handler
-------------------------------------------------*/
-void hyperstone_device::static_generate_exception(uint32_t exception, const char *name)
+void hyperstone_device::static_generate_exception(drcuml_block &block, uml::code_label &label)
{
- uml::code_handle *&exception_handle = m_exception[exception];
- drcuml_block &block(m_drcuml->begin_block(1024));
+ // add a global entry for this
+ alloc_handle(*m_drcuml, m_exception, "exception");
+ UML_HANDLE(block, *m_exception);
- /* add a global entry for this */
- alloc_handle(*m_drcuml, exception_handle, name);
- UML_HANDLE(block, *exception_handle);
-
- uml::code_label label = 1;
- generate_get_trap_addr(block, label, exception);
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- UML_ROLAND(block, I2, DRC_SR, 11, 0xf);
- UML_TEST(block, I2, 0xf);
- UML_MOVc(block, uml::COND_Z, I2, 16);
- UML_ADD(block, I1, I1, I2);
-
- UML_MOV(block, I4, DRC_SR);
- UML_ROLINS(block, DRC_SR, 2, 21, 0x01e00000);
- UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000);
-
- UML_AND(block, I3, I1, 0x3f);
- UML_AND(block, I1, DRC_PC, ~1);
- UML_ROLAND(block, I2, DRC_SR, 14, 1);
- UML_OR(block, I1, I1, I2);
- UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I3, I3, 1);
- UML_AND(block, I3, I3, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I3, I4, SIZE_DWORD, SCALE_x4);
-
- UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK));
- UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK));
-
- UML_MOV(block, DRC_PC, I0);
- UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), 2);
- UML_EXHc(block, uml::COND_S, *m_out_of_cycles, 0);
-
- UML_HASHJMP(block, 0, I0, *m_nocode);// hashjmp <mode>,i0,nocode
-
- block.end();
+ UML_GETEXP(block, I0);
+ generate_trap_exception_or_int<IS_EXCEPTION>(block, label, uml::I0);
}
-void hyperstone_device::static_generate_interrupt_checks()
+void hyperstone_device::static_generate_interrupt_checks(drcuml_block &block, uml::code_label &label)
{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(512));
-
- alloc_handle(*m_drcuml, m_interrupt_checks, "int_checks");
UML_HANDLE(block, *m_interrupt_checks);
- uml::code_label labelnum = 1;
- int done_int = labelnum++;
- int int_pending = labelnum++;
- int timer_int_pending = labelnum++;
- UML_CMP(block, mem(&m_core->intblock), 0);
- UML_JMPc(block, uml::COND_G, done_int);
+ const int timer_int_pending = label++;
+ const int take_int = label++;
+ const int take_timer = label++;
+ const int dispatch_int = label++;
+ const int done_int = label++;
+
UML_TEST(block, DRC_SR, L_MASK);
UML_JMPc(block, uml::COND_NZ, done_int);
+
+ UML_MOV(block, I0, mem(&ISR));
+
UML_TEST(block, mem(&m_core->timer_int_pending), 1);
UML_JMPc(block, uml::COND_NZ, timer_int_pending);
- UML_TEST(block, mem(&ISR), 0x7f);
- UML_JMPc(block, uml::COND_NZ, int_pending);
- UML_JMP(block, done_int);
- UML_LABEL(block, int_pending);
- UML_MOV(block, I0, mem(&ISR));
- UML_MOV(block, I1, mem(&FCR));
- generate_interrupt_checks_no_timer(block, labelnum);
+ UML_TEST(block, I0, 0x7f);
+ UML_JMPc(block, uml::COND_Z, done_int);
+
+ generate_interrupt_checks(block, label, false, take_int, take_timer);
UML_JMP(block, done_int);
UML_LABEL(block, timer_int_pending);
- UML_MOV(block, I0, mem(&ISR));
- UML_MOV(block, I1, mem(&FCR));
- UML_ROLAND(block, I2, I1, 12, 0xb);
- generate_interrupt_checks_with_timer(block, labelnum);
+ generate_interrupt_checks(block, label, true, take_int, take_timer);
+ UML_JMP(block, done_int);
+
+ UML_LABEL(block, take_int);
+ UML_CALLC(block, &c_funcs::standard_irq_callback, this);
+ UML_JMP(block, dispatch_int);
+
+ UML_LABEL(block, take_timer);
+ UML_MOV(block, mem(&m_core->timer_int_pending), 0);
+ UML_MOV(block, I0, TRAPNO_TIMER);
+
+ UML_LABEL(block, dispatch_int);
+ generate_trap_exception_or_int<IS_INT>(block, label, uml::I0);
UML_LABEL(block, done_int);
UML_RET(block);
-
- block.end();
}
/*-------------------------------------------------
- generate_entry_point - generate a
- static entry point
+ generate_entry_helpers - generate helper
+ stubs and functions
-------------------------------------------------*/
-void hyperstone_device::static_generate_entry_point()
+void hyperstone_device::static_generate_helpers(drcuml_block &block, uml::code_label &label)
{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(20));
-
- /* forward references */
+ // forward references
+ alloc_handle(*m_drcuml, m_entry, "entry");
alloc_handle(*m_drcuml, m_nocode, "nocode");
+ alloc_handle(*m_drcuml, m_eat_all_cycles, "eat_all_cycles");
+ alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
+ alloc_handle(*m_drcuml, m_delay_taken[0], "delay_taken");
+ alloc_handle(*m_drcuml, m_delay_taken[1], "delay_taken_s");
+ alloc_handle(*m_drcuml, m_delay_taken[2], "delay_taken_t");
+ alloc_handle(*m_drcuml, m_delay_taken[3], "delay_taken_st");
+ alloc_handle(*m_drcuml, m_interrupt_checks, "int_checks");
- alloc_handle(*m_drcuml, m_entry, "entry");
+ // static entry point
UML_HANDLE(block, *m_entry);
-
- /* load fast integer registers */
//load_fast_iregs(block);
+ UML_MOV(block, I0, DRC_SR);
+ UML_ROLAND(block, I1, I0, 32 - T_SHIFT + 1, 0x2);
+ UML_ROLAND(block, I0, I0, 32 - S_SHIFT, 0x1);
+ UML_OR(block, I0, I0, I1);
+ UML_HASHJMP(block, I0, DRC_PC, *m_nocode);
- /* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, 0, mem(&m_core->global_regs[0]), *m_nocode);
- block.end();
-}
-
-
-/*-------------------------------------------------
- static_generate_nocode_handler - generate an
- exception handler for "out of code"
--------------------------------------------------*/
-
-void hyperstone_device::static_generate_nocode_handler()
-{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(10));
-
- /* generate a hash jump via the current mode and PC */
- alloc_handle(*m_drcuml, m_nocode, "nocode");
+ // exception handler for "out of code"
UML_HANDLE(block, *m_nocode);
UML_GETEXP(block, I0);
-
UML_MOV(block, mem(&PC), I0);
//save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE);
- block.end();
+ // out of cycles exception handler
+ UML_HANDLE(block, *m_eat_all_cycles);
+ UML_CMP(block, mem(&m_core->icount), 0);
+ UML_MOVc(block, uml::COND_G, mem(&m_core->icount), 0);
+ UML_HANDLE(block, *m_out_of_cycles);
+ //save_fast_iregs(block);
+ UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
+
+ // delayed branch taken
+ for (int mode = 0; 4 > mode; ++mode)
+ {
+ UML_HANDLE(block, *m_delay_taken[mode]);
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
+ generate_update_cycles(block);
+ UML_HASHJMP(block, mode, DRC_PC, *m_nocode);
+ }
+
+ static_generate_interrupt_checks(block, label);
}
-/*-------------------------------------------------
- static_generate_out_of_cycles - generate an
- out of cycles exception handler
--------------------------------------------------*/
+/*------------------------------------------------------------------
+ static_generate_memory_accessor
+------------------------------------------------------------------*/
-void hyperstone_device::static_generate_out_of_cycles()
+void hyperstone_device::static_generate_memory_accessor(drcuml_block &block, uml::code_label &label, uml::operand_size size, bool iswrite, uml::code_handle *handleptr)
{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(10));
+ // on entry, address is in I0; data for writes is in I1
+ // on exit, read result is in I1
- /* generate a hash jump via the current mode and PC */
- alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
- UML_HANDLE(block, *m_out_of_cycles);
- //save_fast_iregs(block);
- UML_EXIT(block, EXECUTE_OUT_OF_CYCLES);
+ /* add a global entry for this */
+ UML_HANDLE(block, *handleptr);
- block.end();
+ // write:
+ if (iswrite)
+ UML_WRITE(block, I0, I1, size, SPACE_PROGRAM);
+ else
+ UML_READ(block, I1, I0, size, SPACE_PROGRAM);
+ UML_RET(block);
}
+
/*------------------------------------------------------------------
- static_generate_memory_accessor
+ static_generate_io_accessor
------------------------------------------------------------------*/
-void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, bool isio, const char *name, uml::code_handle *&handleptr)
+void hyperstone_device::static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr)
{
- /* on entry, address is in I0; data for writes is in I1 */
- /* on exit, read result is in I1 */
- /* routine trashes I0-I1 */
+ // on entry, address is in I0; data for writes is in I1
+ // on exit, read result is in I1
+ // clobbers I4
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(1024));
+ /* add a global entry for this */
+ UML_HANDLE(block, *handleptr);
+
+ // write:
+ const uml::operand_size size = (space(AS_IO).data_width() == 16) ? uml::SIZE_WORD : uml::SIZE_DWORD;
+ UML_SHR(block, I4, I0, 13);
+ if (iswrite)
+ UML_WRITE(block, I4, I1, size, SPACE_IO);
+ else
+ UML_READ(block, I1, I4, size, SPACE_IO);
+ UML_RET(block);
+}
+
+void hyperstone_x_device::static_generate_io_accessor(drcuml_block &block, uml::code_label &label, bool iswrite, uml::code_handle *handleptr)
+{
+ // on entry, address is in I0; data for writes is in I1
+ // on exit, read result is in I1
+ // clobbers I4
/* add a global entry for this */
- alloc_handle(*m_drcuml, handleptr, name);
UML_HANDLE(block, *handleptr);
// write:
- switch (size)
- {
- case 1:
- if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_BYTE, SPACE_PROGRAM);
- else
- UML_READ(block, I1, I0, SIZE_BYTE, SPACE_PROGRAM);
- break;
+ const uml::operand_size size = (space(AS_IO).data_width() == 16) ? uml::SIZE_WORD : uml::SIZE_DWORD;
+ const int internal = label++;
+ const int done = label++;
- case 2:
- if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_WORD, SPACE_PROGRAM);
- else
- UML_READ(block, I1, I0, SIZE_WORD, SPACE_PROGRAM);
- break;
+ UML_SHR(block, I4, I0, 13);
+ UML_TEST(block, I0, 1 << 27);
+ UML_JMPc(block, uml::COND_NZ, internal);
- case 4:
- if (iswrite)
- UML_WRITE(block, I0, I1, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM);
- else
- UML_READ(block, I1, I0, SIZE_DWORD, isio ? SPACE_IO : SPACE_PROGRAM);
- break;
- }
- UML_RET(block);
+ if (iswrite)
+ UML_WRITE(block, I4, I1, size, SPACE_IO);
+ else
+ UML_READ(block, I1, I4, size, SPACE_IO);
+ UML_JMP(block, done);
- block.end();
+ UML_LABEL(block, internal);
+ if (iswrite)
+ UML_WRITE(block, I4, I1, SIZE_DWORD, uml::memory_space(AS_INTERNAL));
+ else
+ UML_READ(block, I1, I4, SIZE_DWORD, uml::memory_space(AS_INTERNAL));
+
+ UML_LABEL(block, done);
+ UML_RET(block);
}
@@ -541,201 +567,106 @@ void hyperstone_device::static_generate_memory_accessor(int size, int iswrite, b
CODE GENERATION
***************************************************************************/
-void hyperstone_device::generate_interrupt_checks_no_timer(drcuml_block &block, uml::code_label &labelnum)
+void hyperstone_device::generate_interrupt_checks(drcuml_block &block, uml::code_label &labelnum, bool with_timer, int take_int, int take_timer)
{
- int skip_io3 = labelnum++;
- UML_TEST(block, I0, 0x40);
- UML_JMPc(block, uml::COND_Z, skip_io3);
- UML_AND(block, I3, I1, 0x500);
- UML_CMP(block, I3, 0x400);
- UML_JMPc(block, uml::COND_NE, skip_io3);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO3);
- UML_MOV(block, mem(&m_core->arg0), IRQ_IO3);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_io3);
-
- int skip_int1 = labelnum++;
- UML_TEST(block, I0, 0x01);
- UML_JMPc(block, uml::COND_Z, skip_int1);
- UML_TEST(block, I1, 0x10000000);
- UML_JMPc(block, uml::COND_NZ, skip_int1);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT1);
- UML_MOV(block, mem(&m_core->arg0), IRQ_INT1);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_int1);
-
- int skip_int2 = labelnum++;
- UML_TEST(block, I0, 0x02);
- UML_JMPc(block, uml::COND_Z, skip_int2);
- UML_TEST(block, I1, 0x20000000);
- UML_JMPc(block, uml::COND_NZ, skip_int2);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT2);
- UML_MOV(block, mem(&m_core->arg0), IRQ_INT2);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_int2);
-
- int skip_int3 = labelnum++;
- UML_TEST(block, I0, 0x04);
- UML_JMPc(block, uml::COND_Z, skip_int3);
- UML_TEST(block, I1, 0x40000000);
- UML_JMPc(block, uml::COND_NZ, skip_int3);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT3);
- UML_MOV(block, mem(&m_core->arg0), IRQ_INT3);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_int3);
-
- int skip_int4 = labelnum++;
- UML_TEST(block, I0, 0x08);
- UML_JMPc(block, uml::COND_Z, skip_int4);
- UML_TEST(block, I1, 0x80000000);
- UML_JMPc(block, uml::COND_NZ, skip_int4);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT4);
- UML_MOV(block, mem(&m_core->arg0), IRQ_INT4);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_int4);
-
- int skip_io1 = labelnum++;
- UML_TEST(block, I0, 0x10);
- UML_JMPc(block, uml::COND_Z, skip_io1);
- UML_AND(block, I2, I1, 0x5);
- UML_CMP(block, I2, 0x4);
- UML_JMPc(block, uml::COND_NE, skip_io1);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO1);
- UML_MOV(block, mem(&m_core->arg0), IRQ_IO1);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_io1);
+ UML_MOV(block, I1, mem(&FCR));
- int skip_io2 = labelnum++;
- UML_TEST(block, I0, 0x10);
- UML_JMPc(block, uml::COND_Z, skip_io2);
- UML_AND(block, I2, I1, 0x50);
- UML_CMP(block, I2, 0x40);
- UML_JMPc(block, uml::COND_NE, skip_io2);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO2);
- UML_MOV(block, mem(&m_core->arg0), IRQ_IO2);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_io2);
-}
+ // combine I/O mask and direction in I4 bits 0/4/8
+ UML_SHR(block, I2, I1, 2);
+ UML_XOR(block, I4, I1, 0xffffffff);
+ UML_AND(block, I4, I4, I2);
-void hyperstone_device::generate_interrupt_checks_with_timer(drcuml_block &block, uml::code_label &labelnum)
-{
- int skip_io3 = labelnum++;
+ const int skip_io3 = labelnum++;
UML_TEST(block, I0, 0x40);
UML_JMPc(block, uml::COND_Z, skip_io3);
- UML_AND(block, I3, I1, 0x500);
- UML_CMP(block, I3, 0x400);
- UML_JMPc(block, uml::COND_NE, skip_io3);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO3);
+ UML_TEST(block, I4, 0x100);
+ UML_JMPc(block, uml::COND_Z, skip_io3);
UML_MOV(block, mem(&m_core->arg0), IRQ_IO3);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_IO3);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_io3);
- int skip_timer_pri6 = labelnum++;
- UML_CMP(block, I2, 0x3);
- UML_JMPc(block, uml::COND_NE, skip_timer_pri6);
- UML_MOV(block, mem(&m_core->timer_int_pending), 0);
- generate_get_trap_addr(block, labelnum, TRAPNO_TIMER);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_timer_pri6);
+ if (with_timer)
+ {
+ UML_ROLAND(block, I2, I1, 12, 0xb);
- int skip_int1 = labelnum++;
- UML_TEST(block, I0, 0x01);
+ UML_CMP(block, I2, 0x3);
+ UML_JMPc(block, uml::COND_E, take_timer);
+ }
+
+ // get masked INT state in I3 bits 0-3
+ UML_SHR(block, I3, I1, 28);
+ UML_XOR(block, I3, I3, 0xffffffff);
+ UML_AND(block, I3, I3, I0);
+
+ const int skip_int1 = labelnum++;
+ UML_TEST(block, I3, 0x01);
UML_JMPc(block, uml::COND_Z, skip_int1);
- UML_TEST(block, I1, 0x10000000);
- UML_JMPc(block, uml::COND_NZ, skip_int1);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT1);
UML_MOV(block, mem(&m_core->arg0), IRQ_INT1);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_INT1);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_int1);
- int skip_timer_pri8 = labelnum++;
- UML_CMP(block, I2, 0x2);
- UML_JMPc(block, uml::COND_NE, skip_timer_pri8);
- UML_MOV(block, mem(&m_core->timer_int_pending), 0);
- generate_get_trap_addr(block, labelnum, TRAPNO_TIMER);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_timer_pri8);
+ if (with_timer)
+ {
+ UML_CMP(block, I2, 0x2);
+ UML_JMPc(block, uml::COND_E, take_timer);
+ }
- int skip_int2 = labelnum++;
- UML_TEST(block, I0, 0x02);
+ const int skip_int2 = labelnum++;
+ UML_TEST(block, I3, 0x02);
UML_JMPc(block, uml::COND_Z, skip_int2);
- UML_TEST(block, I1, 0x20000000);
- UML_JMPc(block, uml::COND_NZ, skip_int2);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT2);
UML_MOV(block, mem(&m_core->arg0), IRQ_INT2);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_INT2);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_int2);
- int skip_timer_pri10 = labelnum++;
- UML_CMP(block, I2, 0x1);
- UML_JMPc(block, uml::COND_NE, skip_timer_pri10);
- UML_MOV(block, mem(&m_core->timer_int_pending), 0);
- generate_get_trap_addr(block, labelnum, TRAPNO_TIMER);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_timer_pri10);
+ if (with_timer)
+ {
+ UML_CMP(block, I2, 0x1);
+ UML_JMPc(block, uml::COND_E, take_timer);
+ }
- int skip_int3 = labelnum++;
- UML_TEST(block, I0, 0x04);
+ const int skip_int3 = labelnum++;
+ UML_TEST(block, I3, 0x04);
UML_JMPc(block, uml::COND_Z, skip_int3);
- UML_TEST(block, I1, 0x40000000);
- UML_JMPc(block, uml::COND_NZ, skip_int3);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT3);
UML_MOV(block, mem(&m_core->arg0), IRQ_INT3);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_INT3);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_int3);
- int skip_timer_pri12 = labelnum++;
- UML_CMP(block, I2, 0x0);
- UML_JMPc(block, uml::COND_NE, skip_timer_pri12);
- UML_MOV(block, mem(&m_core->timer_int_pending), 0);
- generate_get_trap_addr(block, labelnum, TRAPNO_TIMER);
- generate_trap_exception_or_int<IS_INT>(block);
- UML_LABEL(block, skip_timer_pri12);
+ if (with_timer)
+ {
+ UML_CMP(block, I2, 0x0);
+ UML_JMPc(block, uml::COND_E, take_timer);
+ }
- int skip_int4 = labelnum++;
- UML_TEST(block, I0, 0x08);
+ const int skip_int4 = labelnum++;
+ UML_TEST(block, I3, 0x08);
UML_JMPc(block, uml::COND_Z, skip_int4);
- UML_TEST(block, I1, 0x80000000);
- UML_JMPc(block, uml::COND_NZ, skip_int4);
- generate_get_trap_addr(block, labelnum, TRAPNO_INT4);
UML_MOV(block, mem(&m_core->arg0), IRQ_INT4);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_INT4);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_int4);
- int skip_io1 = labelnum++;
+ const int skip_io1 = labelnum++;
UML_TEST(block, I0, 0x10);
UML_JMPc(block, uml::COND_Z, skip_io1);
- UML_AND(block, I2, I1, 0x5);
- UML_CMP(block, I2, 0x4);
- UML_JMPc(block, uml::COND_NE, skip_io1);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO1);
+ UML_TEST(block, I4, 0x1);
+ UML_JMPc(block, uml::COND_Z, skip_io1);
UML_MOV(block, mem(&m_core->arg0), IRQ_IO1);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_IO1);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_io1);
- int skip_io2 = labelnum++;
- UML_TEST(block, I0, 0x10);
+ const int skip_io2 = labelnum++;
+ UML_TEST(block, I0, 0x20);
UML_JMPc(block, uml::COND_Z, skip_io2);
- UML_AND(block, I2, I1, 0x50);
- UML_CMP(block, I2, 0x40);
- UML_JMPc(block, uml::COND_NE, skip_io2);
- generate_get_trap_addr(block, labelnum, TRAPNO_IO2);
+ UML_TEST(block, I4, 0x10);
+ UML_JMPc(block, uml::COND_Z, skip_io1);
UML_MOV(block, mem(&m_core->arg0), IRQ_IO2);
- UML_CALLC(block, cfunc_standard_irq_callback, this);
- generate_trap_exception_or_int<IS_INT>(block);
+ UML_MOV(block, I0, TRAPNO_IO2);
+ UML_JMP(block, take_int);
UML_LABEL(block, skip_io2);
}
@@ -745,25 +676,11 @@ void hyperstone_device::generate_interrupt_checks_with_timer(drcuml_block &block
an exception if out
-------------------------------------------------*/
-void hyperstone_device::generate_update_cycles(drcuml_block &block, bool check_interrupts)
+void hyperstone_device::generate_update_cycles(drcuml_block &block)
{
- if (check_interrupts)
- {
- UML_SUB(block, mem(&m_core->intblock), mem(&m_core->intblock), 1);
- UML_MOVc(block, uml::COND_S, mem(&m_core->intblock), 0);
-
- UML_CALLH(block, *m_interrupt_checks);
- }
- else
- {
- UML_SUB(block, mem(&m_core->intblock), mem(&m_core->intblock), 1);
- UML_MOVc(block, uml::COND_S, mem(&m_core->intblock), 0);
- }
-
UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I7);
- UML_EXHc(block, uml::COND_S, *m_out_of_cycles, DRC_PC);
- UML_EXHc(block, uml::COND_Z, *m_out_of_cycles, DRC_PC);
UML_MOV(block, I7, 0);
+ UML_CALLHc(block, uml::COND_LE, *m_out_of_cycles);
}
/*-------------------------------------------------
@@ -778,30 +695,40 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st
{
block.append_comment("[Validation for %08X]", seqhead->pc);
}
+
/* loose verify or single instruction: just compare and fail */
- if (!(m_drcoptions & E132XS_STRICT_VERIFY) || seqhead->next() == nullptr)
+ if (!(m_drcoptions & E132XS_STRICT_VERIFY) || !seqhead->next())
{
if (!(seqhead->flags & OPFLAG_VIRTUAL_NOOP))
{
uint32_t sum = seqhead->opptr.w[0];
uint32_t addr = seqhead->physpc;
const void *base = m_prptr(addr);
- if (base == nullptr)
+ if (!base)
{
- printf("cache read_ptr returned nullptr for address %08x\n", addr);
+ osd_printf_info("%s: cache read_ptr returned nullptr for address %08x\n", tag(), addr);
return;
}
+
+ auto const *delayslot = seqhead->delay.first();
+ const void *delaybase = nullptr;
+ if (delayslot && (seqhead->physpc != delayslot->physpc))
+ {
+ delaybase = m_prptr(delayslot->physpc);
+ if (!delaybase)
+ {
+ osd_printf_info("%s: cache read_ptr returned nullptr for address %08x\n", tag(), delayslot->physpc);
+ }
+ }
+
UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x1);
- if (seqhead->delay.first() != nullptr && seqhead->physpc != seqhead->delay.first()->physpc)
+ if (delayslot && (seqhead->physpc != delayslot->physpc))
{
- addr = seqhead->delay.first()->physpc;
- base = m_prptr(addr);
- assert(base != nullptr);
- UML_LOAD(block, I1, base, 0, SIZE_WORD, SCALE_x1);
+ UML_LOAD(block, I1, delaybase, 0, SIZE_WORD, SCALE_x1);
UML_ADD(block, I0, I0, I1);
- sum += seqhead->delay.first()->opptr.w[0];
+ sum += delayslot->opptr.w[0];
}
UML_CMP(block, I0, sum);
@@ -812,14 +739,17 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st
{
uint32_t addr = seqhead->physpc;
const void *base = m_prptr(addr);
- if (base == nullptr)
+ if (!base)
{
- printf("cache read_ptr returned nullptr for address %08x\n", addr);
+ osd_printf_info("%s: cache read_ptr returned nullptr for address %08x\n", tag(), addr);
return;
}
+
UML_LOAD(block, I0, base, 0, SIZE_WORD, SCALE_x1);
+
uint32_t sum = seqhead->opptr.w[0];
for (curdesc = seqhead->next(); curdesc != seqlast->next(); curdesc = curdesc->next())
+ {
if (!(curdesc->flags & OPFLAG_VIRTUAL_NOOP))
{
addr = curdesc->physpc;
@@ -840,6 +770,7 @@ void hyperstone_device::generate_checksum_block(drcuml_block &block, compiler_st
sum += curdesc->delay.first()->opptr.w[0];
}
}
+ }
UML_CMP(block, I0, sum);
UML_EXHc(block, COND_NE, *m_nocode, epc(seqhead));
}
@@ -864,22 +795,34 @@ void hyperstone_device::log_add_disasm_comment(drcuml_block &block, uint32_t pc,
generate_branch
------------------------------------------------------------------*/
-void hyperstone_device::generate_branch(drcuml_block &block, uml::parameter targetpc, const opcode_desc *desc, bool update_cycles)
+void hyperstone_device::generate_branch(drcuml_block &block, compiler_state &compiler, uml::parameter mode, uml::parameter targetpc, const opcode_desc *desc)
{
+ // clobbers I0 and I1 if mode is BRANCH_TARGET_DYNAMIC
+
if (desc)
- UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
+ UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
- if (update_cycles)
- generate_update_cycles(block);
+ generate_update_cycles(block);
- /* update the cycles and jump through the hash table to the target */
- if (targetpc != BRANCH_TARGET_DYNAMIC)
+ if (desc && (mode == compiler.mode()) && (desc->flags & OPFLAG_INTRABLOCK_BRANCH))
{
- UML_HASHJMP(block, 0, targetpc, *m_nocode);
+ assert(desc->targetpc != BRANCH_TARGET_DYNAMIC);
+
+ UML_JMP(block, desc->targetpc | 0x80000000);
}
else
{
- UML_HASHJMP(block, 0, DRC_PC, *m_nocode);
+ // jump through the hash table to the target
+ const uml::parameter pc = (targetpc != BRANCH_TARGET_DYNAMIC) ? targetpc : DRC_PC;
+ const uml::parameter m = (mode != BRANCH_TARGET_DYNAMIC) ? mode : uml::I0;
+ if (mode == BRANCH_TARGET_DYNAMIC)
+ {
+ UML_MOV(block, I0, DRC_SR);
+ UML_ROLAND(block, I1, I0, 32 - T_SHIFT + 1, 0x2);
+ UML_ROLAND(block, I0, I0, 32 - S_SHIFT, 0x1);
+ UML_OR(block, I0, I0, I1);
+ }
+ UML_HASHJMP(block, m, pc, *m_nocode);
}
}
@@ -891,22 +834,22 @@ void hyperstone_device::generate_branch(drcuml_block &block, uml::parameter targ
void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- offs_t expc;
-
- /* add an entry for the log */
+ // add an entry for the log
if (m_drcuml->logging() && !(desc->flags & OPFLAG_VIRTUAL_NOOP))
log_add_disasm_comment(block, desc->pc, desc->opptr.w[0]);
- /* set the PC map variable */
- expc = (desc->flags & OPFLAG_IN_DELAY_SLOT) ? desc->pc - 3 : desc->pc;
- UML_MAPVAR(block, MAPVAR_PC, expc);
+ // check for pending interrupts
+ UML_SUB(block, I0, mem(&m_core->intblock), 1);
+ UML_MOVc(block, uml::COND_S, I0, 0);
+ UML_MOV(block, mem(&m_core->intblock), I0);
+ UML_CALLHc(block, uml::COND_LE, *m_interrupt_checks);
#if E132XS_LOG_DRC_REGS
- UML_CALLC(block, cfunc_dump_registers, this);
+ UML_CALLC(block, &c_funcs::dump_registers, this);
#endif
- /* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ // if we are debugging, call the debugger
+ if (debugger_enabled())
{
//save_fast_iregs(block);
UML_DEBUG(block, desc->pc);
@@ -914,12 +857,53 @@ void hyperstone_device::generate_sequence_instruction(drcuml_block &block, compi
if (!(desc->flags & OPFLAG_VIRTUAL_NOOP))
{
- /* compile the instruction */
- if (!generate_opcode(block, compiler, desc))
+ // set the PC map variable
+ UML_MAPVAR(block, MAPVAR_PC, compiler.set_pc(desc->pc + desc->length));
+
+ if (compiler.check_delay())
+ {
+ // if PC is used in a delay instruction, the delayed PC should be used
+ const int set_delay_pc = compiler.next_label();
+ const int done = compiler.next_label();
+ UML_TEST(block, mem(&m_core->delay_slot), ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, set_delay_pc);
+
+ UML_ADD(block, DRC_PC, DRC_PC, desc->length);
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
+ UML_JMP(block, done);
+
+ UML_LABEL(block, set_delay_pc);
+ UML_MOV(block, DRC_PC, mem(&m_core->delay_pc));
+ UML_MOV(block, mem(&m_core->delay_slot), 0);
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 1);
+ UML_LABEL(block, done);
+ }
+ else
+ {
+ UML_ADD(block, DRC_PC, DRC_PC, desc->length);
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
+ }
+
+ // compile the instruction
+ if (generate_opcode(block, compiler, desc))
+ {
+ if (compiler.m_check_delay)
+ {
+ if (compiler.check_delay())
+ {
+ UML_TEST(block, mem(&m_core->delay_slot_taken), ~uint32_t(0));
+ UML_CALLHc(block, uml::COND_NZ, *m_delay_taken[compiler.mode()]);
+ }
+ --compiler.m_check_delay;
+ }
+
+ if (compiler.trace_mode() && !desc->delayslots)
+ UML_EXHc(block, uml::COND_Z, *m_exception, TRAPNO_TRACE_EXCEPTION);
+ }
+ else
{
- UML_MOV(block, DRC_PC, desc->pc);
UML_MOV(block, mem(&m_core->arg0), desc->opptr.w[0]);
- UML_CALLC(block, cfunc_unimplemented, this);
+ UML_CALLC(block, &c_funcs::unimplemented, this);
}
}
}
@@ -930,8 +914,6 @@ bool hyperstone_device::generate_opcode(drcuml_block &block, compiler_state &com
{
uint32_t op = (uint32_t)desc->opptr.w[0];
- UML_ADD(block, DRC_PC, DRC_PC, 2);
-
switch (op >> 8)
{
case 0x00: generate_chk<GLOBAL, GLOBAL>(block, compiler, desc); break;
@@ -1192,23 +1174,7 @@ bool hyperstone_device::generate_opcode(drcuml_block &block, compiler_state &com
case 0xff: generate_trap_op(block, compiler, desc); break;
}
- UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
-
- int no_delay_taken = compiler.m_labelnum++;
- UML_TEST(block, mem(&m_core->delay_slot_taken), ~0);
- UML_JMPc(block, uml::COND_Z, no_delay_taken);
- UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
- generate_update_cycles(block);
- UML_HASHJMP(block, 0, DRC_PC, *m_nocode);
- UML_LABEL(block, no_delay_taken);
+ UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
- int done;
- UML_AND(block, I0, DRC_SR, (T_MASK | P_MASK));
- UML_CMP(block, I0, (T_MASK | P_MASK));
- UML_JMPc(block, uml::COND_NE, done = compiler.m_labelnum++);
- UML_TEST(block, mem(&m_core->delay_slot), 1);
- UML_EXHc(block, uml::COND_E, *m_exception[EXCEPTION_TRACE], 0);
-
- UML_LABEL(block, done);
return true;
}
diff --git a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
index 9679faf8364..4b9745e6973 100644
--- a/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
+++ b/src/devices/cpu/e132xs/e132xsdrc_ops.hxx
@@ -1,20 +1,15 @@
// license:BSD-3-Clause
-// copyright-holders:Ryan Holtz
+// copyright-holders:Ryan Holtz, Vas Crabb
+#ifndef MAME_CPU_E132XS_E132XSDRC_OPS_HXX
+#define MAME_CPU_E132XS_E132XSDRC_OPS_HXX
+
+#pragma once
#include "e132xs.h"
constexpr uint32_t WRITE_ONLY_REGMASK = (1 << BCR_REGISTER) | (1 << TPR_REGISTER) | (1 << FCR_REGISTER) | (1 << MCR_REGISTER);
-void hyperstone_device::generate_check_delay_pc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
- /* if PC is used in a delay instruction, the delayed PC should be used */
- UML_TEST(block, mem(&m_core->delay_slot), 1);
- UML_MOVc(block, uml::COND_NZ, DRC_PC, mem(&m_core->delay_pc));
- UML_MOVc(block, uml::COND_NZ, mem(&m_core->delay_slot), 0);
- UML_SETc(block, uml::COND_NZ, mem(&m_core->delay_slot_taken));
-}
-
-void hyperstone_device::generate_decode_const(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+uint32_t hyperstone_device::generate_get_const(const opcode_desc *desc)
{
const uint16_t imm_1 = m_pr16(desc->pc + 2);
@@ -22,14 +17,12 @@ void hyperstone_device::generate_decode_const(drcuml_block &block, compiler_stat
{
const uint16_t imm_2 = m_pr16(desc->pc + 4);
- uint32_t imm = imm_2;
- imm |= ((imm_1 & 0x3fff) << 16);
+ uint32_t imm = imm_2 | (uint32_t(imm_1 & 0x3fff) << 16);
if (imm_1 & 0x4000)
imm |= 0xc0000000;
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- UML_MOV(block, I1, imm);
+ return imm;
}
else
{
@@ -38,293 +31,749 @@ void hyperstone_device::generate_decode_const(drcuml_block &block, compiler_stat
if (imm_1 & 0x4000)
imm |= 0xffffc000;
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- UML_MOV(block, I1, imm);
+ return imm;
}
}
-void hyperstone_device::generate_decode_immediate_s(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+uint32_t hyperstone_device::generate_get_immediate_s(const opcode_desc *desc)
{
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
switch (op & 0xf)
{
case 0:
- UML_MOV(block, I1, 16);
- return;
+ return 16;
case 1:
- {
- uint32_t extra_u = (m_pr16(desc->pc + 2) << 16) | m_pr16(desc->pc + 4);
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- UML_MOV(block, I1, extra_u);
- return;
- }
+ return (uint32_t(m_pr16(desc->pc + 2)) << 16) | m_pr16(desc->pc + 4);
case 2:
- {
- uint32_t extra_u = m_pr16(desc->pc + 2);
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- UML_MOV(block, I1, extra_u);
- return;
- }
+ return m_pr16(desc->pc + 2);
case 3:
- {
- uint32_t extra_u = 0xffff0000 | m_pr16(desc->pc + 2);
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- UML_MOV(block, I1, extra_u);
- return;
- }
+ return 0xffff0000 | m_pr16(desc->pc + 2);
default:
- UML_MOV(block, I1, s_immediate_values[op & 0xf]);
- return;
+ return s_immediate_values[op & 0xf];
}
}
-void hyperstone_device::generate_ignore_immediate_s(drcuml_block &block, const opcode_desc *desc)
+uint32_t hyperstone_device::generate_get_pcrel(const opcode_desc *desc)
{
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
+
+ if (op & 0x80)
+ {
+ const uint16_t next = m_pr16(desc->pc + 2);
+ uint32_t offset = (uint32_t(op & 0x7f) << 16) | (next & 0xfffe);
+ if (next & 1)
+ offset |= 0xff800000;
- static const uint32_t offsets[16] = { 0, 4, 2, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
- const uint8_t nybble = op & 0x0f;
+ return offset;
+ }
+ else
+ {
+ uint32_t offset = op & 0x7e;
+ if (op & 1)
+ offset |= 0xffffff80;
- UML_ADD(block, DRC_PC, DRC_PC, offsets[nybble]);
+ return offset;
+ }
}
-void hyperstone_device::generate_decode_pcrel(drcuml_block &block, const opcode_desc *desc)
+std::pair<uint16_t, uint32_t> hyperstone_device::generate_get_d_code_dis(const opcode_desc *desc)
{
- uint16_t op = desc->opptr.w[0];
+ const uint16_t next_1 = m_pr16(desc->pc + 2);
+ const uint16_t d_code = (next_1 & 0x3000) >> 12;
- int32_t offset;
- if (op & 0x80)
+ uint32_t dis;
+ if (next_1 & 0x8000)
{
- uint16_t next = m_pr16(desc->pc + 2);
+ const uint16_t next_2 = m_pr16(desc->pc + 4);
- offset = (op & 0x7f) << 16;
- offset |= (next & 0xfffe);
+ dis = next_2 | (uint32_t(next_1 & 0x0fff) << 16);
- if (next & 1)
- offset |= 0xff800000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
+ if (next_1 & 0x4000)
+ dis |= 0xf0000000;
}
else
{
- offset = op & 0x7e;
+ dis = next_1 & 0xfff;
- if (op & 1)
- offset |= 0xffffff80;
+ if (next_1 & 0x4000)
+ dis |= 0xfffff000;
}
- UML_MOV(block, I1, offset);
+ return std::make_pair(d_code, dis);
+}
+
+inline void hyperstone_device::generate_add_dis(drcuml_block &block, compiler_state &compiler, uml::parameter dst, uml::parameter base, uint32_t dis, unsigned alignment)
+{
+ const uint32_t mask = ~uint32_t(alignment - 1);
+ if (base.is_immediate())
+ {
+ UML_MOV(block, dst, (base.immediate() + (dis & mask)) & mask);
+ }
+ else if (dis)
+ {
+ UML_ADD(block, dst, base, dis & mask);
+ if (alignment > 1)
+ UML_AND(block, dst, dst, mask);
+ }
+ else if (alignment > 1)
+ {
+ UML_AND(block, dst, base, mask);
+ }
+ else if (dst != base)
+ {
+ UML_MOV(block, dst, base);
+ }
}
-void hyperstone_device::generate_ignore_pcrel(drcuml_block &block, const opcode_desc *desc)
+
+void hyperstone_device::generate_get_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t code, uml::parameter dst)
{
- uint16_t op = desc->opptr.w[0];
+ // Expects cycles in I7 (cleared after use)
+ code |= 0x10;
+ if (code == TR_REGISTER)
+ {
+ UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I7);
+ UML_MOV(block, I7, 0);
- if (op & 0x80)
+ UML_SHR(block, dst, mem(&m_core->tr_clocks_per_tick), 1);
+ UML_CMP(block, mem(&m_core->icount), dst);
+ UML_MOVc(block, uml::COND_BE, dst, 0);
+ UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), dst);
+
+ UML_CALLC(block, &c_funcs::compute_tr, this);
+ UML_MOV(block, dst, mem(&m_core->tr_result));
+ }
+ else
{
- UML_ADD(block, DRC_PC, DRC_PC, 2);
+ UML_MOV(block, dst, mem(&m_core->global_regs[code]));
}
}
-void hyperstone_device::generate_set_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+void hyperstone_device::generate_set_global_register_low(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, uml::parameter src)
{
- // Expects register index in I4, value in I5, clobbers I6
- int extended;
- UML_CMP(block, I4, 16);
- UML_JMPc(block, uml::COND_AE, extended = compiler.m_labelnum++);
-
- int generic_store, set_sr, done;
- UML_CMP(block, I4, 1);
- UML_JMPc(block, uml::COND_A, generic_store = compiler.m_labelnum++);
- UML_JMPc(block, uml::COND_E, set_sr = compiler.m_labelnum++);
- UML_AND(block, DRC_PC, I5, ~1);
- UML_JMP(block, done = compiler.m_labelnum++);
-
- UML_LABEL(block, set_sr);
- UML_ROLINS(block, DRC_SR, I5, 0, 0x0000ffff);
- UML_AND(block, DRC_SR, DRC_SR, ~0x40);
- UML_TEST(block, mem(&m_core->intblock), ~0);
- UML_MOVc(block, uml::COND_Z, mem(&m_core->intblock), 1);
- UML_JMP(block, done);
+ // clobbers I4 when setting SR
+ if (dst_code == PC_REGISTER)
+ {
+ UML_AND(block, DRC_PC, src, ~uint32_t(1));
+ }
+ else if (dst_code == SR_REGISTER)
+ {
+ UML_MOV(block, I4, DRC_SR);
+ if (compiler.supervisor_mode() || (src.is_immediate() && !(src.immediate() & L_MASK)))
+ {
+ UML_ROLINS(block, I4, src, 0, 0x0000ffff);
+ UML_AND(block, I4, I4, ~0x40); // keep reserved bit clear
+ }
+ else
+ {
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I4, L_MASK);
+ UML_JMPc(block, uml::COND_NZ, no_exception);
+ if (src.is_immediate())
+ {
+ UML_ROLINS(block, I4, src.immediate() & ~0x40, 0, 0x0000ffff); // keep reserved bit clear
+ }
+ else
+ {
+ UML_TEST(block, src, L_MASK);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ UML_ROLINS(block, I4, src, 0, 0x0000ffff);
+ UML_AND(block, I4, I4, ~0x40); // keep reserved bit clear
+ }
+ generate_raise_exception(block, compiler, desc, TRAPNO_PRIVILEGE_ERROR, uml::I4);
+ UML_LABEL(block, no_exception);
+ if (src.is_immediate())
+ {
+ UML_ROLINS(block, I4, src.immediate() & ~0x40, 0, 0x0000ffff); // keep reserved bit clear
+ }
+ else
+ {
+ UML_ROLINS(block, I4, src, 0, 0x0000ffff);
+ UML_AND(block, I4, I4, ~0x40); // keep reserved bit clear
+ }
+ }
+ UML_MOV(block, DRC_SR, I4);
+ }
+ else
+ {
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ }
+}
- UML_LABEL(block, generic_store);
- UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- UML_JMP(block, done);
+void hyperstone_device::generate_set_global_register_high(drcuml_block &block, compiler_state &compiler, uint32_t dst_code, uml::parameter src)
+{
+ // Expects cycles in I7 (cleared after use), clobbers I6
+ dst_code |= 0x10;
- int above_bcr;
- UML_LABEL(block, extended);
UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I7);
UML_MOV(block, I7, 0);
- UML_CMP(block, I4, 17);
- UML_JMPc(block, uml::COND_BE, generic_store);
- UML_CMP(block, I4, BCR_REGISTER);
- UML_JMPc(block, uml::COND_A, above_bcr = compiler.m_labelnum++);
- UML_JMPc(block, uml::COND_E, generic_store);
-
- // SP or UB
- UML_AND(block, I5, I5, ~3);
- UML_JMP(block, generic_store);
-
- int set_tpr, set_tcr, set_tr, set_fcr;
- UML_LABEL(block, above_bcr);
- UML_CMP(block, I4, TCR_REGISTER);
- UML_JMPc(block, uml::COND_B, set_tpr = compiler.m_labelnum++);
- UML_JMPc(block, uml::COND_E, set_tcr = compiler.m_labelnum++);
- // Above TCR
- UML_CMP(block, I4, WCR_REGISTER);
- UML_JMPc(block, uml::COND_B, set_tr = compiler.m_labelnum++);
- UML_JMPc(block, uml::COND_E, generic_store); // WCR
- // Above WCR
- UML_CMP(block, I4, FCR_REGISTER);
- UML_JMPc(block, uml::COND_B, done); // ISR - read only
- UML_JMPc(block, uml::COND_E, set_fcr = compiler.m_labelnum++);
- UML_CMP(block, I4, MCR_REGISTER);
- UML_JMPc(block, uml::COND_A, generic_store); // regs 28..31
- // Set MCR
- UML_ROLAND(block, I6, I5, 20, 0x7);
- UML_LOAD(block, I6, (void *)s_trap_entries, I6, SIZE_DWORD, SCALE_x4);
- UML_MOV(block, mem(&m_core->trap_entry), I6);
- UML_JMP(block, generic_store);
-
- int skip_compute_tr;
- UML_LABEL(block, set_tpr);
- UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- UML_TEST(block, I5, 0x80000000);
- UML_JMPc(block, uml::COND_NZ, skip_compute_tr = compiler.m_labelnum++);
- UML_CALLC(block, cfunc_compute_tr, this);
- UML_CALLC(block, cfunc_update_timer_prescale, this);
- UML_LABEL(block, skip_compute_tr);
- UML_CALLC(block, cfunc_adjust_timer_interrupt, this);
- UML_JMP(block, done);
+ switch (dst_code)
+ {
+ case 16: // G16 reserved
+ case 17: // G17 reserved
+ case WCR_REGISTER: // G24 Watchdog Compare Register
+ case 28: // G28 reserved
+ case 29: // G29 reserved
+ case 30: // G30 reserved
+ case 31: // G31 reserved
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ break;
+ case SP_REGISTER: // G18 Stack Pointer
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ break;
+ case UB_REGISTER: // G19 Upper Stack Bound
+ UML_AND(block, mem(&m_core->global_regs[dst_code]), src, ~uint32_t(3));
+ break;
+ case BCR_REGISTER: // G20 Bus Control Register
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ UML_CALLC(block, &c_funcs::update_bus_control, this);
+ break;
+ case TPR_REGISTER: // G21 Timer Prescaler Register
+ {
+ const int skip_compute_tr = compiler.next_label();
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ UML_TEST(block, src, 0x80000000);
+ UML_JMPc(block, uml::COND_NZ, skip_compute_tr);
+ UML_CALLC(block, &c_funcs::compute_tr, this);
+ UML_CALLC(block, &c_funcs::update_timer_prescale, this);
+ UML_LABEL(block, skip_compute_tr);
+ UML_CALLC(block, &c_funcs::adjust_timer_interrupt, this);
+ }
+ break;
+ case TCR_REGISTER: // G22 Timer Compare Register
+ {
+ const int done = compiler.next_label();
+ UML_MOV(block, I6, mem(&m_core->global_regs[dst_code]));
+ UML_CMP(block, I6, src);
+ UML_JMPc(block, uml::COND_E, done);
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ UML_CALLC(block, &c_funcs::adjust_timer_interrupt, this);
+ UML_LABEL(block, done);
+ }
+ break;
+ case TR_REGISTER: // G23 Timer Register
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ UML_MOV(block, mem(&m_core->tr_base_value), src);
+ UML_CALLC(block, &c_funcs::total_cycles, this);
+ UML_DMOV(block, mem(&m_core->tr_base_cycles), mem(&m_core->numcycles));
+ UML_CALLC(block, &c_funcs::adjust_timer_interrupt, this);
+ break;
+ case ISR_REGISTER: // G25 Input Status Register (read-only)
+ break;
+ case FCR_REGISTER: // G26 Function Control Register
+ {
+ const int skip_adjust_timer = compiler.next_label();
+ UML_MOV(block, I6, mem(&m_core->global_regs[dst_code]));
+ UML_XOR(block, I6, I6, src);
+ UML_TEST(block, I6, 0x80000000);
+ UML_JMPc(block, uml::COND_Z, skip_adjust_timer);
+ UML_CALLC(block, &c_funcs::adjust_timer_interrupt, this);
+ UML_LABEL(block, skip_adjust_timer);
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ }
+ break;
+ case MCR_REGISTER: // G27 Memory Control Register
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), src);
+ UML_CALLC(block, &c_funcs::update_memory_control, this);
+ UML_TEST(block, mem(&m_core->powerdown), ~uint32_t(0));
+ UML_CALLHc(block, uml::COND_NZ, *m_eat_all_cycles);
+ break;
+ default:
+ throw emu_fatalerror("%s: invalid high global register G%u\n", dst_code);
+ }
+}
- UML_LABEL(block, set_tcr);
- UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_CMP(block, I6, I5);
- UML_JMPc(block, uml::COND_E, done);
- UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- UML_CALLC(block, cfunc_adjust_timer_interrupt, this);
- UML_CMP(block, mem(&m_core->intblock), 1);
- UML_MOVc(block, uml::COND_L, mem(&m_core->intblock), 1);
- UML_JMP(block, done);
- UML_LABEL(block, set_tr);
- UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- UML_MOV(block, mem(&m_core->tr_base_value), I5);
- UML_CALLC(block, cfunc_total_cycles, this);
- UML_DMOV(block, mem(&m_core->tr_base_cycles), mem(&m_core->numcycles));
- UML_CALLC(block, cfunc_adjust_timer_interrupt, this);
- UML_JMP(block, done);
+void hyperstone_device::generate_load_operand(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx)
+{
+ // expects frame pointer in I3 if local
+ // sets localidx if local before setting dst
+ if (global)
+ {
+ UML_MOV(block, dst, mem(&m_core->global_regs[code]));
+ }
+ else
+ {
+ UML_ADD(block, localidx, I3, code);
+ UML_AND(block, localidx, localidx, 0x3f);
+ UML_LOAD(block, dst, (void *)m_core->local_regs, localidx, SIZE_DWORD, SCALE_x4);
+ }
+}
+
+void hyperstone_device::generate_load_src_addsub(drcuml_block &block, compiler_state &compiler, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uml::parameter sr)
+{
+ // expects frame pointer in I3 if local
+ // sets localidx if local before setting dst
+ if (global)
+ {
+ if (code == SR_REGISTER)
+ UML_AND(block, dst, sr, C_MASK);
+ else
+ UML_MOV(block, dst, mem(&m_core->global_regs[code]));
+ }
+ else
+ {
+ UML_ADD(block, localidx, I3, code);
+ UML_AND(block, localidx, localidx, 0x3f);
+ UML_LOAD(block, dst, (void *)m_core->local_regs, localidx, SIZE_DWORD, SCALE_x4);
+ }
+}
- int skip_adjust_timer;
- UML_LABEL(block, set_fcr);
- UML_LOAD(block, I6, (void *)m_core->global_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_XOR(block, I6, I6, I5);
- UML_TEST(block, I6, 0x80000000);
- UML_JMPc(block, uml::COND_Z, skip_adjust_timer = compiler.m_labelnum++);
- UML_CALLC(block, cfunc_adjust_timer_interrupt, this);
- UML_LABEL(block, skip_adjust_timer);
- UML_STORE(block, (void *)m_core->global_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- UML_CMP(block, mem(&m_core->intblock), 1);
- UML_MOVc(block, uml::COND_L, mem(&m_core->intblock), 1);
- // Fall through to done
+uml::parameter hyperstone_device::generate_load_address_ad(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx)
+{
+ // expects frame pointer in I3 if local
+ // sets localidx if local before setting dst
+ // returns an immediate for SR or constant PC, otherwise returns dst
- UML_LABEL(block, done);
+ if (global)
+ {
+ if (code == SR_REGISTER)
+ {
+ return 0;
+ }
+ else if ((code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay()))
+ {
+ if (!compiler.pc())
+ generate_raise_exception(block, compiler, desc, TRAPNO_POINTER_ERROR);
+ return compiler.pc();
+ }
+ else
+ {
+ UML_MOV(block, dst, mem(&m_core->global_regs[code]));
+ }
+ }
+ else
+ {
+ UML_ADD(block, localidx, I3, code);
+ UML_AND(block, localidx, localidx, 0x3f);
+ UML_LOAD(block, dst, (void *)m_core->local_regs, localidx, SIZE_DWORD, SCALE_x4);
+ }
+
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, dst, ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_POINTER_ERROR);
+ UML_LABEL(block, no_exception);
+
+ return dst;
}
-template <hyperstone_device::trap_exception_or_int TYPE>
-void hyperstone_device::generate_trap_exception_or_int(drcuml_block &block)
+void hyperstone_device::generate_load_address_ns(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter dst, uml::parameter localidx, uint16_t d_code, uint32_t dis)
{
- UML_ADD(block, I7, I7, mem(&m_core->clock_cycles_2));
+ // expects frame pointer in I3 if local
+ // sets localidx if local before setting dst
- UML_MOV(block, I4, DRC_SR);
+ generate_load_operand(block, compiler, global, code, dst, localidx);
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- UML_ROLAND(block, I2, DRC_SR, 11, 0xf);
- UML_TEST(block, I2, 0xf);
- UML_MOVc(block, uml::COND_Z, I2, 16);
- UML_ADD(block, I3, I1, I2);
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, dst, ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, no_exception);
- if (TYPE != IS_TRAP)
- UML_ROLINS(block, DRC_SR, 2, 21, 0x01e00000);
+ switch (d_code)
+ {
+ case 0: // LDBS.N
+ case 1: // LDBU.N
+ UML_ADD(block, dst, dst, dis);
+ break;
+ case 2: // LDHS.N, LDHU.N
+ UML_ADD(block, dst, dst, dis & ~uint32_t(1));
+ break;
+ case 3: // LDW.N, LDD.N, LDW.S
+ UML_ADD(block, dst, dst, dis & ~uint32_t(3));
+ break;
+ }
+ if (global)
+ UML_MOV(block, mem(&m_core->global_regs[code]), dst);
else
- UML_ROLINS(block, DRC_SR, 6, 21, 0x01e00000);
- UML_ROLINS(block, DRC_SR, I3, 25, 0xfe000000);
-
- UML_AND(block, I1, I3, 0x3f);
- UML_AND(block, I2, DRC_PC, ~1);
- UML_ROLINS(block, I2, DRC_SR, 32-S_SHIFT, 1);
- UML_STORE(block, (void *)m_core->local_regs, I1, I2, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I2, I1, 1);
- UML_AND(block, I3, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I3, I4, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, localidx, dst, SIZE_DWORD, SCALE_x4);
+ generate_raise_exception(block, compiler, desc, TRAPNO_POINTER_ERROR);
- UML_AND(block, DRC_SR, DRC_SR, ~(M_MASK | T_MASK));
- if (TYPE == IS_INT)
- UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK | I_MASK));
+ UML_LABEL(block, no_exception);
+}
+
+void hyperstone_device::generate_load_address_rp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t code, uml::parameter dst, uml::parameter localidx, uint32_t dis)
+{
+ // expects frame pointer in I3 if local
+ // sets I0 to masked address
+ // sets localidx if local before setting dst
+ // localidx must not conflict with dst if dis is non-zero
+
+ generate_load_operand(block, compiler, LOCAL, code, dst, localidx);
+
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, dst, ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, no_exception);
+ if (dis)
+ {
+ UML_ADD(block, dst, dst, dis);
+ UML_STORE(block, (void *)m_core->local_regs, localidx, dst, SIZE_DWORD, SCALE_x4);
+ }
+ generate_raise_exception(block, compiler, desc, TRAPNO_POINTER_ERROR);
+ UML_LABEL(block, no_exception);
+
+ UML_AND(block, I0, dst, ~uint32_t(3));
+}
+
+
+void hyperstone_device::generate_set_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx)
+{
+ // expects frame pointer in I3 if local and calcidx is true
+ // sets localidx if local and calcidx is true before storing src
+ // localidx is input if local and calcidx is false
+ // clobbers I4 when setting SR
+ if (global)
+ {
+ generate_set_global_register_low(block, compiler, desc, code, src);
+ }
else
- UML_OR(block, DRC_SR, DRC_SR, (L_MASK | S_MASK));
+ {
+ if (calcidx)
+ {
+ UML_ADD(block, localidx, I3, code);
+ UML_AND(block, localidx, localidx, 0x3f);
+ }
+ UML_STORE(block, (void *)m_core->local_regs, localidx, src, SIZE_DWORD, SCALE_x4);
+ }
+}
- UML_MOV(block, DRC_PC, I0);
- generate_branch(block, DRC_PC, nullptr, true);
+void hyperstone_device::generate_set_dst(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, reg_bank global, uint32_t code, uml::parameter src, uml::parameter localidx, bool calcidx)
+{
+ // expects frame pointer in I3 if local and calcidx is true
+ // sets localidx if local and calcidx is true before storing src
+ // localidx is input if local and calcidx is false
+ // clobbers I4 when setting SR
+ if (global)
+ {
+ generate_set_global_register_low(block, compiler, desc, code, src);
+ if (code == PC_REGISTER)
+ {
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ if (src.is_int_register() && (desc->targetpc == BRANCH_TARGET_DYNAMIC))
+ {
+ UML_AND(block, src, src, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), src, desc);
+ }
+ else if (src.is_immediate() && (desc->targetpc == BRANCH_TARGET_DYNAMIC))
+ {
+ generate_branch(block, compiler, compiler.mode(), src.immediate() & ~uint32_t(1), desc);
+ }
+ else
+ {
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
+ }
+ }
+ }
+ else
+ {
+ if (calcidx)
+ {
+ UML_ADD(block, localidx, I3, code);
+ UML_AND(block, localidx, localidx, 0x3f);
+ }
+ UML_STORE(block, (void *)m_core->local_regs, localidx, src, SIZE_DWORD, SCALE_x4);
+ }
}
-void hyperstone_device::generate_int(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
+
+void hyperstone_device::generate_update_flags_addsub(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
{
- printf("Unimplemented: generate_int (%08x)\n", desc->pc);
- fflush(stdout);
- fatalerror(" ");
+ // expects result in I0 and UML flags set by ADD/SUB
+ // clobbers I1, I4 and I5
+
+ UML_SETc(block, uml::COND_V, I4); // I4 = ...V
+ UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z
+ UML_SETc(block, uml::COND_C, I1); // I1 = ...C
+ UML_SHL(block, I4, I4, V_SHIFT); // I4 = V...
+ UML_OR(block, I1, I1, I4); // I1 = V..C
+ UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z.
+ UML_OR(block, I1, I1, I4); // I1 = V.ZC
+ UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N..
+ UML_OR(block, I1, I1, I4); // I1 = VNZC
+
+ UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
}
-void hyperstone_device::generate_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t addr)
+void hyperstone_device::generate_update_flags_addsubc(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
{
- printf("Unimplemented: generate_exception (%08x)\n", desc->pc);
- fflush(stdout);
- fatalerror(" ");
+ // expects result in I0 and UML flags set by ADD/SUB
+ // clobbers I1, I4 and I5
+
+ UML_SETc(block, uml::COND_V, I4); // I4 = ...V
+ UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z
+ UML_SETc(block, uml::COND_C, I1); // I1 = ...C
+ UML_SHL(block, I4, I4, V_SHIFT); // I4 = V...
+ UML_OR(block, I1, I1, I4); // I1 = V..C
+ UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z.
+ UML_OR(block, I1, I1, I4); // I1 = V.ZC
+ UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK); // I4 = .N..
+ UML_OR(block, I1, I1, I4); // I1 = VNZC
+ UML_OR(block, I4, I2, ~Z_MASK); // combine with old Z flag
+ UML_AND(block, I1, I1, I4);
+
+ UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
+}
+
+void hyperstone_device::generate_update_flags_addsubs(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
+{
+ // expects UML flags set by ADD/SUB
+ // clobbers I1, I4 and I5
+
+ UML_SETc(block, uml::COND_V, I4); // I4 = ...V
+ UML_SETc(block, uml::COND_S, I1); // I1 = ...S
+ UML_SETc(block, uml::COND_Z, I5); // I5 = ...Z
+ UML_SHL(block, I4, I4, V_SHIFT); // I4 = V...
+ UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N..
+ UML_OR(block, I1, I1, I4); // I1 = VN..
+ UML_SHL(block, I4, I5, Z_SHIFT); // I4 = ..Z.
+ UML_OR(block, I1, I1, I4); // I1 = VNZ.
+
+ UML_ROLINS(block, sr, I1, 0, (V_MASK | N_MASK | Z_MASK));
+}
+
+void hyperstone_device::generate_update_flags_cmp(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
+{
+ // expects UML flags set by ADD/SUB
+ // clobbers I0, I1, I3 and I4
+
+ UML_SETc(block, uml::COND_V, I0); // I0 = ...V
+ UML_SETc(block, uml::COND_L, I1); // I1 = ...N
+ UML_SETc(block, uml::COND_Z, I3); // I3 = ...Z
+ UML_SETc(block, uml::COND_C, I4); // I4 = ...C
+ UML_AND(block, sr, sr, ~(V_MASK | N_MASK | Z_MASK | C_MASK));
+ UML_SHL(block, I0, I0, V_SHIFT); // I0 = V...
+ UML_SHL(block, I1, I1, N_SHIFT); // I1 = .N..
+ UML_SHL(block, I3, I3, Z_SHIFT); // I3 = ..Z.
+ UML_SHL(block, I4, I4, C_SHIFT); // I4 = ...C
+ UML_OR(block, I0, I0, I1); // I0 = VN..
+ UML_OR(block, I3, I3, I4); // I1 = ..ZC
+ UML_OR(block, sr, sr, I0);
+ UML_OR(block, sr, sr, I3);
+}
+
+void hyperstone_device::generate_update_nz(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
+{
+ // expects result in I0 and UML Z flag to be set
+ // clobbers I1
+
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_SHL(block, I1, I1, Z_SHIFT);
+ UML_ROLINS(block, I1, I0, N_SHIFT + 1, N_MASK);
+ UML_OR(block, sr, sr, I1);
+}
+
+void hyperstone_device::generate_update_nz_d(drcuml_block &block, compiler_state &compiler, uml::parameter sr)
+{
+ // expects result in I0 and UML Z flag to be set
+ // assumes Z and N bits in sr have already been cleared
+ // clobbers I1
+
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_SHL(block, I1, I1, Z_SHIFT);
+ UML_OR(block, sr, sr, I1);
+ UML_DROLAND(block, I1, I0, N_SHIFT + 1, N_MASK);
+ UML_OR(block, sr, sr, I1);
+}
+
+
+void hyperstone_device::generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno, uml::parameter sr)
+{
+ if (desc->flags & OPFLAG_IN_DELAY_SLOT)
+ {
+ // definitely in delay slot - saved PC/ILC reflect delayed branch
+ UML_OR(block, sr, sr, P_MASK);
+ UML_MOV(block, DRC_PC, desc->pc);
+ }
+ else if (!compiler.check_delay())
+ {
+ // not in delay slot - saved PC/ILC reflect current instruction
+ UML_ROLINS(block, sr, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
+ }
+ else
+ {
+ // possibly in delay slot
+ const int set_delay_pc = compiler.next_label();
+ const int done = compiler.next_label();
+ UML_TEST(block, mem(&m_core->delay_slot_taken), ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, set_delay_pc);
+
+ UML_ROLINS(block, sr, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
+ UML_JMP(block, done);
+
+ UML_LABEL(block, set_delay_pc);
+ UML_OR(block, sr, sr, P_MASK);
+ UML_MOV(block, DRC_PC, desc->pc);
+ UML_LABEL(block, done);
+ }
+ UML_MOV(block, DRC_SR, sr);
+ UML_EXH(block, *m_exception, trapno);
+}
+
+void hyperstone_device::generate_raise_exception(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint8_t trapno)
+{
+ UML_MOV(block, I2, DRC_SR);
+ generate_raise_exception(block, compiler, desc, trapno, uml::I2);
+}
+
+void hyperstone_device::generate_exception_on_overflow(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uml::parameter sr)
+{
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, sr, V_MASK);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR, sr);
+ UML_LABEL(block, no_exception);
}
+
+template <hyperstone_device::trap_exception_or_int TYPE>
+void hyperstone_device::generate_trap_exception_or_int(drcuml_block &block, uml::code_label &label, uml::parameter trapno)
+{
+ // expects cycles in I7 (updated)
+ // clobbers I0, I1, I2, I3 and I4 after using trapno
+
+ const uint32_t set_flags = (TYPE == IS_INT) ? (S_MASK | L_MASK | I_MASK) : (S_MASK | L_MASK);
+ const uint32_t clear_flags = T_MASK | M_MASK;
+ const uint32_t update_sr = FP_MASK | FL_MASK | set_flags | clear_flags;
+
+ if ((TYPE != IS_INT) && debugger_enabled())
+ {
+ if (!trapno.is_int_register())
+ {
+ UML_MOV(block, I0, trapno);
+ trapno = uml::I0;
+ }
+
+ UML_MOV(block, mem(&m_core->arg0), trapno); // let the debugger know
+ UML_CALLC(block, &c_funcs::debugger_exception_hook, this);
+ }
+ generate_get_trap_addr(block, label, trapno); // I0 = target PC
+
+ UML_MOV(block, I4, DRC_SR); // I4 = old SR
+
+ UML_MOV(block, I1, I4); // I1 = SR to be updated
+ UML_ROLAND(block, I3, I4, 32 - FP_SHIFT, 0x7f); // I3 = old FP
+ UML_ROLAND(block, I2, I4, 32 - FL_SHIFT, 0xf); // I2 = old FL
+ UML_MOVc(block, uml::COND_Z, I2, 16); // convert FL == 0 to 16
+ UML_ADD(block, I3, I3, I2); // I3 = updated FP
+
+ UML_SHL(block, I2, I3, FP_SHIFT); // I2 = updated FP:...
+ UML_OR(block, I2, I2, (((TYPE != IS_TRAP) ? 2 : 6) << FL_SHIFT) | set_flags);
+ UML_ROLINS(block, I1, I2, 0, update_sr); // update SR value
+ UML_MOV(block, DRC_SR, I1); // store updated SR
+
+ UML_AND(block, I3, I3, 0x3f); // save old PC at updated (FP)^
+ UML_AND(block, I2, DRC_PC, ~uint32_t(1));
+ UML_ROLINS(block, I2, I4, 32 - S_SHIFT, 1);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I2, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, 1); // save old SR at updated (FP + 1)^
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I4, SIZE_DWORD, SCALE_x4);
+
+ UML_ADD(block, I7, I7, mem(&m_core->clock_cycles_2)); // assume exception dispatch takes two cycles
+ UML_MOV(block, DRC_PC, I0); // branch to exception handler
+ generate_update_cycles(block);
+ UML_HASHJMP(block, 1, I0, *m_nocode); // T cleared and S set - mode will always be 1
+}
+
+
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal, typename T>
+inline void hyperstone_device::generate_logic_op(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, T &&body)
+{
+ // body takes operands in dst and src and should update dst and set Z flag
+ // body must not clobber I2 or I3
+
+ UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
+
+ const uint16_t op = desc->opptr.w[0];
+
+ const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t src_code = op & 0xf;
+
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
+
+ uml::parameter src = uml::I1;
+ if (!SrcGlobal)
+ generate_load_operand(block, compiler, SrcGlobal, src_code, src, src);
+ else
+ src = uml::mem(&m_core->global_regs[src_code]);
+
+ uml::parameter dst = uml::I0;
+ if (!DstGlobal || (dst_code <= SR_REGISTER))
+ generate_load_operand(block, compiler, DstGlobal, dst_code, dst, uml::I3);
+ else
+ dst = uml::mem(&m_core->global_regs[dst_code]);
+
+ body(dst, src);
+
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ if (!DstGlobal || (dst_code <= SR_REGISTER))
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, dst, uml::I3, false);
+}
+
+template <hyperstone_device::reg_bank DstGlobal, typename T>
+inline void hyperstone_device::generate_logic_op_imm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc, uint32_t dst_code, T &&body)
+{
+ // clobbers I0, I1 and I3
+ // body should update dst and set Z flag
+ // body must not clobber I2 or I3
+
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
+
+ if (!DstGlobal || (dst_code <= SR_REGISTER))
+ {
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
+
+ body(uml::I0);
+ }
+ else
+ {
+ body(uml::mem(&m_core->global_regs[dst_code]));
+ }
+
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ if (!DstGlobal || (dst_code <= SR_REGISTER))
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
+}
+
+
+
void hyperstone_device::generate_software(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_6));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
+ const uint32_t num = op >> 8;
const uint32_t src_code = op & 0xf;
- const uint32_t srcf_code = src_code + 1;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
-
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f); // I3 = FP
-
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I0 = sreg
- UML_ADD(block, I2, I3, srcf_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I1 = sregf
-
- UML_ROLINS(block, DRC_SR, 1, 19, 0x00180000);
-
- uint32_t num = op >> 8;
- int mem3 = compiler.m_labelnum++;
- int have_code_addr = compiler.m_labelnum++;
- UML_MOV(block, I4, mem(&m_core->trap_entry));
- UML_CMP(block, I4, 0xffffff00);
- UML_JMPc(block, uml::COND_E, mem3);
- UML_OR(block, I5, I4, (0x10c | ((0xcf - num) << 4)));
- UML_JMP(block, have_code_addr);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f); // I3 = FP
- UML_LABEL(block, mem3);
- UML_SUB(block, I5, I4, 0x100);
- UML_OR(block, I5, I5, ((num & 0xf) << 4)); // I5 = addr
+ UML_ADD(block, I1, I3, src_code);
+ UML_AND(block, I1, I1, 0x3f);
+ UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4); // I0 = sreg
+ UML_ADD(block, I1, I1, 1);
+ UML_AND(block, I1, I1, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4); // I1 = sregf
- UML_LABEL(block, have_code_addr);
+ UML_AND(block, I2, I2, ~ILC_MASK);
+ UML_OR(block, I2, I2, 1 << ILC_SHIFT);
+ UML_MOV(block, DRC_SR, I2);
- UML_ROLAND(block, I2, DRC_SR, 11, 0xf);
- UML_TEST(block, I2, 0xf);
- UML_MOVc(block, uml::COND_Z, I2, 16);
- UML_ADD(block, I4, I2, I3); // I4 = reg
+ UML_ROLAND(block, I4, I2, 32 - FL_SHIFT, 0xf);
+ UML_MOVc(block, uml::COND_Z, I4, 16);
+ UML_ADD(block, I4, I4, I3); // I4 = reg
UML_AND(block, I2, mem(&SP), 0xffffff00);
UML_ADD(block, I6, I2, 0x100); // I6 = (SP & ~0xff) + 0x100
@@ -335,204 +784,209 @@ void hyperstone_device::generate_software(drcuml_block &block, compiler_state &c
UML_AND(block, I2, I4, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I2, I6, SIZE_DWORD, SCALE_x4); // m_core->local_regs[(reg + 0) & 0x3f] = stack_of_dst;
- UML_ADD(block, I6, I2, 1);
- UML_AND(block, I2, I6, 0x3f);
+ UML_ADD(block, I2, I2, 1);
+ UML_AND(block, I2, I2, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4); // m_core->local_regs[(reg + 1) & 0x3f] = sreg;
- UML_ADD(block, I6, I2, 1);
- UML_AND(block, I2, I6, 0x3f);
+ UML_ADD(block, I2, I2, 1);
+ UML_AND(block, I2, I2, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4); // m_core->local_regs[(reg + 2) & 0x3f] = sregf;
- UML_AND(block, I0, DRC_PC, ~1);
- UML_ROLINS(block, I0, DRC_SR, 32-S_SHIFT, 1);
- UML_ADD(block, I6, I2, 1);
- UML_AND(block, I2, I6, 0x3f);
+ UML_AND(block, I0, DRC_PC, ~uint32_t(1));
+ UML_ROLINS(block, I0, DRC_SR, 32 - S_SHIFT, 1);
+ UML_ADD(block, I2, I2, 1);
+ UML_AND(block, I2, I2, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4); // m_core->local_regs[(reg + 3) & 0x3f] = (PC & ~1) | GET_S;
- UML_ADD(block, I6, I2, 1);
- UML_AND(block, I2, I6, 0x3f);
+ UML_ADD(block, I2, I2, 1);
+ UML_AND(block, I2, I2, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I2, DRC_SR, SIZE_DWORD, SCALE_x4); // m_core->local_regs[(reg + 4) & 0x3f] = oldSR;
- UML_MOV(block, DRC_PC, I5); // PC = addr
+ const int mem3 = compiler.next_label();
+ const int have_code_addr = compiler.next_label();
+ UML_MOV(block, I1, mem(&m_core->trap_entry));
+ UML_CMP(block, I1, 0xffffff00);
+ UML_JMPc(block, uml::COND_E, mem3);
+ UML_OR(block, I1, I1, (0x10c | ((0xcf - num) << 4)));
+ UML_JMP(block, have_code_addr);
+
+ UML_LABEL(block, mem3);
+ UML_SUB(block, I1, I1, 0x100);
+ UML_OR(block, I1, I1, ((num & 0xf) << 4));
+
+ UML_LABEL(block, have_code_addr);
+ UML_MOV(block, DRC_PC, I1); // PC = addr
UML_MOV(block, I0, DRC_SR);
- UML_ROLINS(block, I0, 0x00c08000, 0, 0x01e08000); // SET_FL(6), SR |= L_MASK
- UML_ROLINS(block, I0, I4, 25, 0xfe000000); // SET_FP(reg)
- UML_AND(block, DRC_SR, I0, ~(M_MASK | T_MASK));
+ UML_ROLINS(block, I0, (6 << FL_SHIFT) | L_MASK, 0, FL_MASK | T_MASK | L_MASK | M_MASK); // FL = 6, T = 0, L = 1, M = 0
+ UML_ROLINS(block, I0, I4, FP_SHIFT, FP_MASK); // SET_FP(reg)
+ UML_MOV(block, DRC_SR, I0);
- generate_branch(block, desc->targetpc, desc);
+ generate_branch(block, compiler, compiler.mode() & 0x1, uml::I1, desc); // T cleared - only keep S in bit zero of mode
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_chk(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
+ const uint32_t src_code = op & 0xf;
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ // checking a register other than PC against itself is a NOP
+ if ((DstGlobal == SrcGlobal) && (src_code == dst_code) && (!DstGlobal || (src_code > SR_REGISTER)))
+ return;
- if (!DST_GLOBAL || !SRC_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ // checking PC against itself will always trap
+ const bool unconditional = DstGlobal && SrcGlobal && (src_code == PC_REGISTER) && (dst_code == PC_REGISTER);
- const uint32_t src_code = op & 0xf;
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal || !SrcGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I0);
- if (SRC_GLOBAL)
+ int done;
+ if (!unconditional)
{
- if (src_code == SR_REGISTER)
+ done = compiler.next_label();
+ if (SrcGlobal)
{
- UML_TEST(block, I1, ~0);
- UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_RANGE_ERROR], 0);
+ if (src_code == SR_REGISTER)
+ {
+ UML_TEST(block, I0, ~uint32_t(0));
+ UML_JMPc(block, uml::COND_NZ, done);
+ }
+ else
+ {
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
+ UML_CMP(block, I0, I1);
+ if (src_code == PC_REGISTER)
+ UML_JMPc(block, uml::COND_B, done);
+ else
+ UML_JMPc(block, uml::COND_BE, done);
+ }
}
else
{
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- UML_CMP(block, I1, I0);
- if (src_code == PC_REGISTER)
- UML_EXHc(block, uml::COND_AE, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- else
- UML_EXHc(block, uml::COND_A, *m_exception[EXCEPTION_RANGE_ERROR], 0);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
+
+ UML_CMP(block, I0, I1);
+ UML_JMPc(block, uml::COND_BE, done);
}
}
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_CMP(block, I1, I0);
- UML_EXHc(block, uml::COND_A, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- }
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR, uml::I2);
+
+ if (!unconditional)
+ UML_LABEL(block, done);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t srcf_code = src_code + 1;
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t dstf_code = dst_code + 1;
- if (DST_GLOBAL && (dst_code == PC_REGISTER))
+ if (DstGlobal && (dst_code == PC_REGISTER))
{
- if (SRC_GLOBAL && src_code < 2)
+ if (SrcGlobal && (src_code < 2))
{
- printf("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted PC or SR in RET instruction. PC = %08X\n", desc->pc);
return;
}
- UML_AND(block, I1, DRC_SR, (S_MASK | L_MASK));
- if (SRC_GLOBAL)
+ UML_MOV(block, I3, DRC_SR);
+ if (SrcGlobal)
{
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- UML_LOAD(block, I3, (void *)m_core->global_regs, srcf_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I0, mem(&m_core->global_regs[src_code]));
+ UML_MOV(block, I2, mem(&m_core->global_regs[srcf_code]));
}
else
{
- UML_ROLAND(block, I5, DRC_SR, 7, 0x7f);
- UML_ADD(block, I3, I5, src_code);
- UML_AND(block, I4, I3, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
-
- UML_ADD(block, I6, I5, srcf_code);
- UML_AND(block, I5, I6, 0x3f);
- UML_LOAD(block, I3, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- }
-
- UML_AND(block, DRC_PC, I2, ~1);
-
- UML_AND(block, DRC_SR, I3, 0xffe3ffff);
- UML_ROLINS(block, DRC_SR, I2, S_SHIFT, S_MASK);
+ UML_ROLAND(block, I2, I3, 32 - FP_SHIFT, 0x7f);
+ UML_ADD(block, I0, I2, src_code);
+ UML_AND(block, I0, I0, 0x3f);
+ UML_LOAD(block, I0, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4);
- UML_TEST(block, mem(&m_core->intblock), ~0);
- UML_MOVc(block, uml::COND_Z, mem(&m_core->intblock), 1);
+ UML_ADD(block, I2, I2, srcf_code);
+ UML_AND(block, I2, I2, 0x3f);
+ UML_LOAD(block, I2, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ }
- int no_exception;
- UML_AND(block, I2, DRC_SR, (S_MASK | L_MASK));
- UML_AND(block, I3, I1, I2);
- UML_TEST(block, I3, S_MASK);
- UML_JMPc(block, uml::COND_NZ, no_exception = compiler.m_labelnum++); // If S is set and unchanged, there won't be an exception.
+ UML_AND(block, I2, I2, ~(ILC_MASK | S_MASK)); // clear ILC, restore S from bit zero of Rs
+ UML_ROLINS(block, I2, I0, S_SHIFT, S_MASK);
+ UML_MOV(block, DRC_SR, I2);
- UML_XOR(block, I3, I1, I2);
- UML_AND(block, I4, I3, I2);
- UML_TEST(block, I4, S_MASK);
- UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If S is newly set, it's a privilege error.
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ UML_MOV(block, DRC_PC, I0);
- UML_TEST(block, I3, L_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception); // If L is unchanged, there won't be an exception.
- UML_TEST(block, I1, L_MASK);
- UML_JMPc(block, uml::COND_NZ, no_exception); // If L was previously set, there won't be an exception.
- UML_TEST(block, I2, S_MASK);
- UML_EXHc(block, uml::COND_Z, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0); // If L is newly set and we are not in Supervisor mode, it's a privilege error.
+ if (compiler.user_mode())
+ {
+ // privilege exception on setting S or L
+ UML_XOR(block, I3, I3, ~uint32_t(0));
+ UML_AND(block, I3, I3, S_MASK | L_MASK);
+ UML_TEST(block, I3, I2);
+ UML_EXHc(block, uml::COND_NZ, *m_exception, TRAPNO_PRIVILEGE_ERROR);
+ }
+ else
+ {
+ // privilege exception on setting L while clearing S
+ UML_XOR(block, I3, I3, ~uint32_t(0)); // I3(15) = !L
+ UML_AND(block, I3, I3, I2); // I3(15) = !L && L'
+ UML_XOR(block, I3, I3, ~uint32_t(0)); // I3(15) = !(!L && L') = L || !L'
+ UML_SHL(block, I3, I3, S_SHIFT - L_SHIFT); // I3(18) = L || !L'
+ UML_OR(block, I3, I3, I2); // I3(18) = L || !L' || S'
+ UML_TEST(block, I3, S_MASK);
+ UML_EXHc(block, uml::COND_Z, *m_exception, TRAPNO_PRIVILEGE_ERROR);
+ }
- int diff_in_range, done_ret;
- UML_LABEL(block, no_exception);
- UML_MOV(block, I0, mem(&SP));
- UML_ROLAND(block, I1, I0, 30, 0x7f);
- UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
- UML_SUB(block, I3, I2, I1);
- UML_CMP(block, I3, -64);
- UML_JMPc(block, uml::COND_L, done_ret = compiler.m_labelnum++);
- UML_CMP(block, I3, 64);
- UML_JMPc(block, uml::COND_L, diff_in_range = compiler.m_labelnum++);
- UML_OR(block, I3, I3, 0x80);
- UML_SEXT(block, I3, I3, SIZE_BYTE);
- UML_LABEL(block, diff_in_range);
-
- int pop_next;
- UML_LABEL(block, pop_next = compiler.m_labelnum++);
- UML_CMP(block, I3, 0);
- UML_JMPc(block, uml::COND_GE, done_ret);
- UML_SUB(block, I0, I0, 4);
+ const int pop_next = compiler.next_label();
+ const int done_ret = compiler.next_label();
+ UML_MOV(block, I0, mem(&SP)); // I0 = SP
+ UML_ROLAND(block, I1, I0, 30, 0x7f); // I3 = FP - SP(8..2)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
+ UML_SUB(block, I3, I3, I1);
+ UML_SHL(block, I3, I3, 32 - 7); // sign-extend 7-bit number
+ UML_SAR(block, I3, I3, 32 - 7);
+ UML_JMPc(block, uml::COND_NS, done_ret); // nothing to pull if not negative
+ UML_LABEL(block, pop_next);
+ UML_SUB(block, I0, I0, 4); // pull a word
UML_CALLH(block, *m_mem_read32);
- UML_ROLAND(block, I2, I0, 30, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I3, I3, 1);
- UML_TEST(block, I3, ~0);
- UML_JMP(block, pop_next);
-
+ UML_AND(block, I4, I0, 0x3f << 2);
+ UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x1);
+ UML_ADD(block, I3, I3, 1); // increment counter
+ UML_JMPc(block, uml::COND_S, pop_next); // done if not negative
+ UML_MOV(block, mem(&SP), I0); // SP = I0
UML_LABEL(block, done_ret);
- UML_MOV(block, mem(&SP), I0);
- generate_branch(block, desc->targetpc, desc);
+
+ generate_branch(block, compiler, BRANCH_TARGET_DYNAMIC, desc->targetpc, nullptr); // don't pass desc - must not update ILC and P
return;
}
- else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR
+ else if (SrcGlobal && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR
{
- UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
- UML_AND(block, DRC_SR, DRC_SR, ~N_MASK);
- if (DST_GLOBAL)
+ UML_MOV(block, I2, DRC_SR);
+ UML_OR(block, I2, I2, Z_MASK);
+ UML_AND(block, I2, I2, ~N_MASK);
+ UML_MOV(block, DRC_SR, I2);
+ if (DstGlobal)
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, 0);
- generate_set_global_register(block, compiler, desc);
- UML_MOV(block, I4, dstf_code);
- UML_MOV(block, I5, 0);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER || dstf_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ generate_set_global_register_low(block, compiler, desc, dst_code, 0);
+ generate_set_global_register_low(block, compiler, desc, dstf_code, 0);
}
else
{
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I0, I2, 32 - FP_SHIFT, 0x7f);
UML_ADD(block, I0, I0, dst_code);
UML_AND(block, I0, I0, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I0, 0, SIZE_DWORD, SCALE_x4);
@@ -543,98 +997,79 @@ void hyperstone_device::generate_movd(drcuml_block &block, compiler_state &compi
}
else // Rd doesn't denote PC and Rs doesn't denote SR
{
- if (!SRC_GLOBAL || !DST_GLOBAL)
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- UML_LOAD(block, I1, (void *)m_core->global_regs, srcf_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I0, mem(&m_core->global_regs[src_code]));
+ UML_MOV(block, I1, mem(&m_core->global_regs[srcf_code]));
}
else
{
- UML_ADD(block, I0, I3, src_code);
- UML_AND(block, I0, I0, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I1, I3, srcf_code);
+ UML_ADD(block, I1, I3, src_code);
+ UML_AND(block, I1, I1, 0x3f);
+ UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
+
+ UML_ADD(block, I1, I1, 1);
UML_AND(block, I1, I1, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
}
- UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK));
+ UML_AND(block, I2, I2, ~(Z_MASK | N_MASK));
+ UML_OR(block, I4, I0, I1);
+ UML_SETc(block, uml::COND_Z, I4);
+ UML_ROLINS(block, I2, I4, Z_SHIFT, Z_MASK);
+ UML_ROLAND(block, I4, I0, N_SHIFT + 1, N_MASK);
+ UML_OR(block, I2, I2, I4);
+ UML_MOV(block, DRC_SR, I2);
- UML_OR(block, I2, I0, I1);
- UML_TEST(block, I2, ~0);
- UML_SETc(block, uml::COND_Z, I2);
- UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK);
-
- UML_TEST(block, I0, 0x80000000);
- UML_SETc(block, uml::COND_NZ, I2);
- UML_ROLINS(block, DRC_SR, I2, N_SHIFT, N_MASK);
-
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I0);
- generate_set_global_register(block, compiler, desc);
- UML_MOV(block, I4, dstf_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER || dstf_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ generate_set_global_register_low(block, compiler, desc, dst_code, uml::I0);
+ generate_set_global_register_low(block, compiler, desc, dstf_code, uml::I1);
}
else
{
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I2, I3, dstf_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, dst_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
+
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal, hyperstone_device::sign_mode SIGNED>
void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t dstf_code = dst_code + 1;
const uint32_t src_code = op & 0xf;
- if ((SRC_GLOBAL == DST_GLOBAL && (src_code == dst_code || src_code == dstf_code)) || (SRC_GLOBAL && src_code < 2))
+ if ((SrcGlobal == DstGlobal && (src_code == dst_code || src_code == dstf_code)) || (SrcGlobal && src_code < 2))
{
- printf("Denoted the same register code or PC/SR as source in generate_divsu. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted the same register code or PC/SR as source in generate_divsu. PC = %08X\n", desc->pc);
return;
}
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
-#endif
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- UML_LOAD(block, I2, (void *)m_core->global_regs, dstf_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[dst_code]));
+ UML_MOV(block, I2, mem(&m_core->global_regs[dstf_code]));
}
else
{
@@ -646,21 +1081,18 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
}
-#ifndef PTR64
- UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
-#endif
-
UML_DSHL(block, I1, I1, 32);
UML_DOR(block, I1, I1, I2);
- int no_result = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
+ int no_result = compiler.next_label();
+ int done = compiler.next_label();
UML_TEST(block, I0, ~0);
UML_JMPc(block, uml::COND_Z, no_result);
if (SIGNED)
{
UML_DTEST(block, I1, 0x8000000000000000LL);
UML_JMPc(block, uml::COND_NZ, no_result);
+ UML_DSEXT(block, I0, I0, SIZE_DWORD);
}
if (SIGNED)
@@ -669,16 +1101,16 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
UML_DDIVU(block, I2, I4, I1, I0);
UML_AND(block, I3, DRC_SR, ~(V_MASK | Z_MASK | N_MASK));
- UML_TEST(block, I2, ~0);
- UML_MOVc(block, uml::COND_Z, I0, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I0, 0);
- UML_ROLINS(block, I0, I2, 3, N_MASK);
+ UML_TEST(block, I2, ~uint32_t(0));
+ UML_SETc(block, uml::COND_Z, I0);
+ UML_SHL(block, I0, I0, Z_SHIFT);
+ UML_ROLINS(block, I0, I2, N_SHIFT + 1, N_MASK);
UML_OR(block, DRC_SR, I3, I0);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I4, SIZE_DWORD, SCALE_x4);
- UML_STORE(block, (void *)m_core->global_regs, dstf_code, I2, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I4);
+ UML_MOV(block, mem(&m_core->global_regs[dstf_code]), I2);
}
else
{
@@ -689,19 +1121,18 @@ void hyperstone_device::generate_divsu(drcuml_block &block, compiler_state &comp
UML_JMP(block, done);
UML_LABEL(block, no_result);
- UML_OR(block, DRC_SR, DRC_SR, V_MASK);
- UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR);
UML_LABEL(block, done);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_xm(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
@@ -710,1829 +1141,1054 @@ void hyperstone_device::generate_xm(drcuml_block &block, compiler_state &compile
uint32_t extra_u = next & 0xfff;
if (next & 0x8000)
- {
extra_u = ((extra_u & 0xfff) << 16) | m_pr16(desc->pc + 4);
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- }
- else
+
+ if ((SrcGlobal && (src_code == SR_REGISTER)) || (DstGlobal && (dst_code <= SR_REGISTER)))
{
- UML_ADD(block, DRC_PC, DRC_PC, 2);
+ // reserved for future expansion
+ osd_printf_error("Denoted PC or SR in hyperstone_xm. PC = %08X\n", desc->pc);
+ return;
}
- UML_MOV(block, I1, extra_u);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- generate_check_delay_pc(block, compiler, desc);
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_SHL(block, I0, I1, sub_type & 3);
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- UML_AND(block, I0, DRC_SR, C_MASK);
- else
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
- if ((SRC_GLOBAL && (src_code == SR_REGISTER)) || (DST_GLOBAL && (dst_code < 2)))
- {
- return;
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
if (sub_type < 4)
{
- UML_CMP(block, I0, extra_u);
- int skip, done;
- if (SRC_GLOBAL && (src_code == PC_REGISTER))
- {
- UML_JMPc(block, uml::COND_B, skip = compiler.m_labelnum++);
- UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- UML_JMP(block, done = compiler.m_labelnum++);
- }
+ const int no_exception = compiler.next_label();
+ UML_CMP(block, I1, extra_u);
+ if (SrcGlobal && (src_code == PC_REGISTER))
+ UML_JMPc(block, uml::COND_B, no_exception);
else
- {
- UML_JMPc(block, uml::COND_BE, skip = compiler.m_labelnum++);
- UML_EXH(block, *m_exception[EXCEPTION_RANGE_ERROR], 0);
- UML_JMP(block, done = compiler.m_labelnum++);
- }
-
- UML_LABEL(block, skip);
- UML_SHL(block, I5, I0, sub_type);
-
- UML_LABEL(block, done);
- }
- else
- {
- UML_SHL(block, I5, I0, sub_type - 4);
- }
+ UML_JMPc(block, uml::COND_BE, no_exception);
- if (DST_GLOBAL)
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I6, I3, dst_code);
- UML_AND(block, I4, I6, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR, uml::I2);
+ UML_LABEL(block, no_exception);
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_mask(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_decode_const(block, compiler, desc);
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t src = generate_get_const(desc);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
-
- UML_AND(block, I1, I1, I2);
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0);
- int skip_mask;
- UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
- UML_TEST(block, I1, ~0);
- UML_JMPc(block, uml::COND_NZ, skip_mask = compiler.m_labelnum++);
- UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
- UML_LABEL(block, skip_mask);
+ UML_AND(block, I0, I0, src);
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK);
+ UML_MOV(block, DRC_SR, I2);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I1, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_ADD(block, I0, I3, dst_code);
- UML_AND(block, I0, I0, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I0, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_sum(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_decode_const(block, compiler, desc);
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t src = generate_get_const(desc);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal && (src_code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay()))
{
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ const uint64_t result = uint64_t(compiler.pc()) + src;
+ const uint32_t flags =
+ (BIT(result, 32) << C_SHIFT) |
+ (!uint32_t(result) ? Z_MASK : 0) |
+ (BIT(result, 31) << N_SHIFT) |
+ (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT);
+
+ UML_ROLINS(block, I2, flags, 0, V_MASK | N_MASK | Z_MASK | C_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uint32_t(result), uml::I3, true);
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
-
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
- UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
-#endif
-
- UML_DADD(block, I5, I1, I2);
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0);
- UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK));
- UML_DTEST(block, I5, 0x100000000ULL);
- UML_SETc(block, uml::COND_NZ, I6);
- UML_ROLINS(block, DRC_SR, I6, C_SHIFT, C_MASK);
+ UML_ADD(block, I0, I0, src);
- UML_XOR(block, I6, I5, I1);
- UML_XOR(block, I1, I5, I2);
- UML_AND(block, I1, I1, I6);
- UML_AND(block, I1, I1, 0x80000000);
- UML_ROLINS(block, DRC_SR, I1, 4, V_MASK);
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_TEST(block, I5, ~0);
- UML_SETc(block, uml::COND_Z, I6);
- UML_ROLINS(block, DRC_SR, I6, Z_SHIFT, Z_MASK);
-
- UML_ROLINS(block, DRC_SR, I5, 3, N_MASK);
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_ADD(block, I0, I3, dst_code);
- UML_AND(block, I0, I0, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I0, I5, SIZE_DWORD, SCALE_x4);
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_sums(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- printf("Unimplemented: generate_sums (%08x)\n", desc->pc);
- fflush(stdout);
- fatalerror(" ");
-}
-
-
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t src = generate_get_const(desc);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- UML_AND(block, I0, DRC_SR, C_MASK);
- else
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I1, I2, src_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I2, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
-
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
-
- UML_DSUB(block, I2, I1, I0); // tmp
+ UML_ADD(block, I0, I0, src);
- UML_XOR(block, I2, I2, I1);
- UML_XOR(block, I3, I1, I0);
- UML_AND(block, I3, I3, I2);
- UML_ROLINS(block, I3, I3, 4, V_MASK);
+ generate_update_flags_addsubs(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_CMP(block, I1, I0);
- UML_SETc(block, uml::COND_B, I2);
- UML_ROLINS(block, I3, I2, C_SHIFT, C_MASK);
+ generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
+ generate_exception_on_overflow(block, compiler, desc, uml::I2);
- UML_CMP(block, I1, I0);
- UML_SETc(block, uml::COND_E, I2);
- UML_ROLINS(block, I3, I2, Z_SHIFT, Z_MASK);
-
- UML_CMP(block, I1, I0);
- UML_SETc(block, uml::COND_L, I2);
- UML_ROLINS(block, I3, I2, N_SHIFT, N_MASK);
-
- UML_ROLINS(block, DRC_SR, I3, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
+ if (DstGlobal && (dst_code == PC_REGISTER))
+ {
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
+ {
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
+ }
+ else
+ {
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
+ }
+ }
}
-void hyperstone_device::generate_get_global_register(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_cmp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- uint16_t op = desc->opptr.w[0];
+ UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
+
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- int regular_load = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
- UML_TEST(block, DRC_SR, H_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 16 + src_code);
- UML_MOVc(block, uml::COND_Z, I1, src_code);
- UML_CMP(block, I1, TR_REGISTER);
- UML_JMPc(block, uml::COND_NE, regular_load);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_SHR(block, I2, mem(&m_core->tr_clocks_per_tick), 1);
- UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I7);
- UML_MOV(block, I7, 0);
- UML_CMP(block, mem(&m_core->icount), I2);
- UML_MOVc(block, uml::COND_BE, I2, 0);
- UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I2);
- UML_CALLC(block, cfunc_compute_tr, this);
- UML_MOV(block, I5, mem(&m_core->tr_result));
- UML_JMP(block, done);
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- UML_LABEL(block, regular_load);
- UML_LOAD(block, I5, (void *)m_core->global_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_SHL(block, I2, 1, I1);
- UML_TEST(block, I2, WRITE_ONLY_REGMASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
+ UML_CMP(block, I0, I1);
- UML_LABEL(block, done);
+ generate_update_flags_cmp(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_mov(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
+ if (DstGlobal && compiler.user_mode())
{
- int no_exception;
- UML_TEST(block, DRC_SR, H_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception = compiler.m_labelnum++);
- UML_TEST(block, DRC_SR, S_MASK);
- UML_JMPc(block, uml::COND_NZ, no_exception);
- UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0);
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I2, H_MASK);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_PRIVILEGE_ERROR, uml::I2);
UML_LABEL(block, no_exception);
}
- if (SRC_GLOBAL)
- {
- generate_get_global_register(block, compiler, desc);
- if (!DST_GLOBAL)
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- }
- else
- {
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I1, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I5, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
+ UML_AND(block, I2, I2, ~(Z_MASK | N_MASK));
- UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK));
- UML_TEST(block, I5, ~0);
- UML_SETc(block, uml::COND_Z, I2);
- UML_ROLINS(block, DRC_SR, I2, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, DRC_SR, I5, 3, N_MASK);
-
- int done = compiler.m_labelnum++;
- if (DST_GLOBAL)
- {
- UML_TEST(block, DRC_SR, H_MASK);
- UML_MOVc(block, uml::COND_NZ, I4, 16 + dst_code);
- UML_MOVc(block, uml::COND_Z, I4, dst_code);
- UML_AND(block, DRC_SR, DRC_SR, ~H_MASK);
- UML_MOV(block, I3, I4);
- generate_set_global_register(block, compiler, desc);
- UML_CMP(block, I3, 0);
- UML_JMPc(block, uml::COND_NE, done);
- generate_branch(block, desc->targetpc, desc);
- }
- else
+ if (SrcGlobal)
{
- UML_AND(block, DRC_SR, DRC_SR, ~H_MASK);
- UML_ADD(block, I2, I1, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I5, SIZE_DWORD, SCALE_x4);
- }
-
- UML_LABEL(block, done);
-}
-
-
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
- UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
+ if (!DstGlobal || compiler.supervisor_mode())
+ {
+ const int highglobal = compiler.next_label();
+ const int done = compiler.next_label();
- uint16_t op = desc->opptr.w[0];
- const uint32_t src_code = op & 0xf;
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ UML_TEST(block, I2, H_MASK);
+ UML_JMPc(block, uml::COND_NZ, highglobal);
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I0, mem(&m_core->global_regs[src_code]));
+ UML_JMP(block, done);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_LABEL(block, highglobal);
+ generate_get_global_register_high(block, compiler, src_code, uml::I0);
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- UML_AND(block, I0, DRC_SR, 1);
+ UML_LABEL(block, done);
+ }
else
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ {
+ UML_MOV(block, I0, mem(&m_core->global_regs[src_code]));
+ }
}
-
- if (DST_GLOBAL)
+ else if (DstGlobal || (src_code == dst_code))
{
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I0, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
else
{
- UML_ADD(block, I3, I3, dst_code);
- UML_AND(block, I3, I3, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I0, I3, src_code);
+ UML_AND(block, I0, I0, 0x3f);
+ UML_LOAD(block, I0, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4);
}
- UML_ADD(block, I2, I0, I1);
-
- UML_SETc(block, uml::COND_C, I6);
-
- UML_XOR(block, I4, I0, I2);
- UML_XOR(block, I5, I1, I2);
- UML_AND(block, I4, I4, I5);
- UML_ROLINS(block, I6, I4, 4, V_MASK);
+ UML_TEST(block, I0, ~uint32_t(0));
+ generate_update_nz(block, compiler, uml::I2);
- UML_TEST(block, I2, ~0);
- UML_SETc(block, uml::COND_Z, I4);
- UML_ROLINS(block, I6, I4, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, I6, I2, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I6, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
-
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- if (dst_code < 2)
+ if (compiler.supervisor_mode())
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I2);
- generate_set_global_register(block, compiler, desc);
+ const int highglobal = compiler.next_label();
+ const int done = compiler.next_label();
+
+ UML_TEST(block, I2, H_MASK);
+ UML_JMPc(block, uml::COND_NZ, highglobal);
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_low(block, compiler, desc, dst_code, uml::I0);
if (dst_code == PC_REGISTER)
{
UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- generate_branch(block, desc->targetpc, desc);
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
+ }
+ else
+ {
+ UML_JMP(block, done);
}
+
+ UML_LABEL(block, highglobal);
+ UML_AND(block, I2, I2, ~H_MASK);
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_high(block, compiler, dst_code, uml::I0);
+
+ UML_LABEL(block, done);
}
else
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I2, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_low(block, compiler, desc, dst_code, uml::I0);
+ if (dst_code == PC_REGISTER)
+ {
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
+ }
}
}
else
{
- UML_STORE(block, (void *)m_core->local_regs, I3, I2, SIZE_DWORD, SCALE_x4);
- }
-}
-
+ UML_AND(block, I2, I2, ~H_MASK);
+ UML_MOV(block, DRC_SR, I2);
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
- printf("Unimplemented: generate_adds (%08x)\n", desc->pc);
- fflush(stdout);
- fatalerror(" ");
+ if (SrcGlobal || (src_code != dst_code))
+ {
+ UML_ADD(block, I3, I3, dst_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
+ }
+ }
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_add(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
-
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
-
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I1, I2, src_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
+ if ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay())
{
- UML_ADD(block, I2, I2, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
-
- UML_TEST(block, I1, I0);
- UML_SETc(block, uml::COND_Z, I0);
- UML_ROLINS(block, DRC_SR, I0, Z_SHIFT, Z_MASK);
-}
+ const bool srcpc = SrcGlobal && (src_code == PC_REGISTER);
+ const bool dstpc = DstGlobal && (dst_code == PC_REGISTER);
+ if (srcpc && dstpc)
+ {
+ // degenerate case - effectively left-shift PC
+ const uint32_t result = compiler.pc() << 1;
+ const uint32_t flags =
+ (BIT(compiler.pc(), 31) << C_SHIFT) |
+ (!result ? Z_MASK : 0) |
+ (BIT(result, 31) << N_SHIFT) |
+ (BIT((compiler.pc() ^ result), 31) << V_SHIFT);
+
+ UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ UML_MOV(block, DRC_PC, result);
+ generate_branch(block, compiler, compiler.mode(), result, desc);
+ return;
+ }
+ else if (srcpc)
+ {
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
- UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
+ UML_ADD(block, I0, I0, compiler.pc());
- uint16_t op = desc->opptr.w[0];
- const uint32_t src_code = op & 0xf;
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- generate_check_delay_pc(block, compiler, desc);
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
+ return;
+ }
+ else if (dstpc)
+ {
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I0, uml::I3, uml::I2);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_ADD(block, I0, I0, compiler.pc());
- UML_AND(block, I0, DRC_SR, C_MASK);
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
-#endif
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_AND(block, I2, I2, ~M_MASK);
+ UML_MOV(block, DRC_SR, I2);
- if (SRC_GLOBAL)
- {
- if (src_code != SR_REGISTER)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
-#ifndef PTR64
- UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
-#endif
- UML_DADD(block, I0, I2, I0);
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ UML_MOV(block, DRC_PC, I0);
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
+ return;
}
}
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
-#ifndef PTR64
- UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
-#endif
- UML_DADD(block, I0, I2, I0);
- }
-
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
- UML_AND(block, I6, DRC_SR, Z_MASK);
- UML_AND(block, I5, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK));
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- UML_DSUB(block, I2, I1, I0);
- UML_DROLINS(block, I5, I2, 32, C_MASK);
- UML_XOR(block, I2, I2, I1); // tmp ^ dreg
- UML_XOR(block, I3, I1, I0); // dreg ^ sreg_c
- UML_AND(block, I3, I2, I3); // (tmp ^ dreg) ^ (dreg ^ sreg_c)
- UML_ROLINS(block, I5, I3, 4, V_MASK);
-
- UML_SUB(block, I1, I1, I0);
- UML_TEST(block, I1, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_AND(block, I2, I2, I6); // old_z && dreg == 0
- UML_OR(block, I5, I5, I2);
- UML_ROLINS(block, I5, I1, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I5, 0, (C_MASK | V_MASK | Z_MASK | N_MASK));
+ UML_ADD(block, I0, I0, I1);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- if (dst_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I1, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_adds(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- UML_AND(block, I0, DRC_SR, 1);
- else
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
-
- UML_DSUB(block, I2, I1, I0);
-
- UML_AND(block, DRC_SR, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK));
-
- UML_DTEST(block, I2, 0x100000000ULL);
- UML_SETc(block, uml::COND_NZ, I4);
- UML_ROLINS(block, DRC_SR, I4, 0, C_MASK);
-
- UML_XOR(block, I4, I1, I2);
- UML_XOR(block, I5, I0, I1);
- UML_AND(block, I6, I4, I5);
- UML_ROLINS(block, DRC_SR, I6, 4, V_MASK);
+ UML_ADD(block, I0, I0, I1);
- UML_SUB(block, I2, I1, I0);
+ generate_update_flags_addsubs(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_TEST(block, I2, ~0);
- UML_SETc(block, uml::COND_Z, I4);
- UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, DRC_SR, I2, 3, N_MASK);
+ generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
+ generate_exception_on_overflow(block, compiler, desc, uml::I2);
- if (DST_GLOBAL)
+ if (DstGlobal && (dst_code == PC_REGISTER))
{
- if (dst_code < 2)
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I2);
- generate_set_global_register(block, compiler, desc);
-
- if (dst_code == PC_REGISTER)
- {
- UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- generate_branch(block, desc->targetpc, desc);
- }
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
}
else
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I2, SIZE_DWORD, SCALE_x4);
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
}
}
- else
- {
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I2, SIZE_DWORD, SCALE_x4);
- }
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_cmpb(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- UML_AND(block, I0, DRC_SR, 1);
- else
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
+ UML_TEST(block, I0, I1);
+ UML_SETc(block, uml::COND_Z, I0);
+ UML_ROLINS(block, DRC_SR, I0, Z_SHIFT, Z_MASK);
+}
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
- UML_DSEXT(block, I0, I0, SIZE_DWORD);
- UML_DSEXT(block, I1, I1, SIZE_DWORD);
- UML_DSUB(block, I2, I1, I0);
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_subc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+{
+ UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK));
+ const uint16_t op = desc->opptr.w[0];
+ const uint32_t src_code = op & 0xf;
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_XOR(block, I4, I1, I2);
- UML_XOR(block, I5, I0, I1);
- UML_AND(block, I4, I4, I5);
- UML_ROLINS(block, DRC_SR, I4, 4, V_MASK);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_TEST(block, I2, ~0);
- UML_SETc(block, uml::COND_Z, I4);
- UML_ROLINS(block, DRC_SR, I4, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, DRC_SR, I2, 3, N_MASK);
+ generate_load_src_addsub(block, compiler, SrcGlobal,src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (DST_GLOBAL)
+ if (!SrcGlobal || (src_code != SR_REGISTER))
{
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I2);
- generate_set_global_register(block, compiler, desc);
-
- if (dst_code == PC_REGISTER)
- {
- generate_branch(block, desc->targetpc, desc);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I2, SIZE_DWORD, SCALE_x4);
- }
+ UML_CARRY(block, I2, C_SHIFT);
+ UML_SUBB(block, I0, I0, I1);
}
else
{
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I2, SIZE_DWORD, SCALE_x4);
+ UML_SUB(block, I0, I0, I1);
}
- int no_exception = compiler.m_labelnum++;
- UML_TEST(block, DRC_SR, V_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception);
- UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
- generate_trap_exception_or_int<IS_EXCEPTION>(block);
- UML_LABEL(block, no_exception);
+ generate_update_flags_addsubc(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
+
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_sub(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (SRC_GLOBAL)
- {
- if (src_code == SR_REGISTER)
- {
- UML_AND(block, I0, DRC_SR, 1);
- }
- else
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I1, DRC_SR, 1);
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
- UML_DADD(block, I0, I0, I1);
- }
- }
- else
- {
- UML_ADD(block, I1, I3, src_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I1, DRC_SR, 1);
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
- UML_DADD(block, I0, I0, I1);
- }
+ UML_SUB(block, I0, I0, I1);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I3, I3, dst_code);
- UML_AND(block, I3, I3, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
- }
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
-
- UML_DADD(block, I2, I0, I1);
-
- UML_XOR(block, I4, I0, I2);
- UML_XOR(block, I5, I1, I2);
- UML_AND(block, I4, I4, I5);
- UML_AND(block, I4, I4, I2);
- UML_ROLAND(block, I4, I4, 4, V_MASK);
- UML_DROLINS(block, I4, I2, 32, C_MASK);
-
- UML_ADD(block, I0, I0, I1);
- UML_SHR(block, I1, DRC_SR, Z_SHIFT);
- UML_AND(block, I1, I1, 1);
- UML_TEST(block, I0, ~0);
- UML_SETc(block, uml::COND_Z, I2);
- UML_AND(block, I1, I1, I2);
- UML_ROLINS(block, I4, I1, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, I4, I0, 3, N_MASK);
-
- UML_ROLINS(block, DRC_SR, I4, 0, (C_MASK | V_MASK | Z_MASK | N_MASK));
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I0);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I0, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_subs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
-#endif
+ UML_SUB(block, I0, I0, I1);
- UML_DSUB(block, I4, 0, I0);
- UML_SUB(block, I2, 0, I0);
+ generate_update_flags_addsubs(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_TEST(block, I2, ~0);
- UML_MOVc(block, uml::COND_Z, I6, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I6, 0);
+ generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
+ generate_exception_on_overflow(block, compiler, desc, uml::I2);
- UML_AND(block, I5, DRC_SR, ~(C_MASK | V_MASK | Z_MASK | N_MASK));
- UML_DROLINS(block, I6, I4, 32, C_MASK);
- UML_AND(block, I1, I4, I0);
- UML_ROLINS(block, I6, I1, 4, V_MASK);
- UML_ROLINS(block, I6, I2, 3, N_MASK);
- UML_OR(block, DRC_SR, I5, I6);
-
- if (DST_GLOBAL)
+ if (DstGlobal && (dst_code == PC_REGISTER))
{
- if (dst_code < 2)
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I2);
- generate_set_global_register(block, compiler, desc);
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
}
else
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I2, SIZE_DWORD, SCALE_x4);
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
}
}
- else
- {
- UML_ADD(block, I1, I3, dst_code);
- UML_AND(block, I4, I1, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I2, SIZE_DWORD, SCALE_x4);
- }
-}
-
-
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
-{
- printf("Unimplemented: generate_negs (%08x)\n", desc->pc);
- fflush(stdout);
- fatalerror(" ");
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_addc(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_src_addsub(block, compiler, SrcGlobal,src_code, uml::I1, uml::I1, uml::I2);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (DST_GLOBAL)
+ if (!SrcGlobal || (src_code != SR_REGISTER))
{
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
+ UML_CARRY(block, I2, C_SHIFT);
+ UML_ADDC(block, I0, I0, I1);
}
else
{
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I0, I0, I1);
}
- UML_AND(block, I5, I1, I0);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_ROLINS(block, DRC_SR, I1, 0, Z_MASK);
+ generate_update_flags_addsubc(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_neg(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0, uml::I2);
- UML_XOR(block, I2, I0, ~0);
- UML_AND(block, I5, I1, I2);
+ UML_SUB(block, I0, 0, I0);
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_ROLINS(block, DRC_SR, I1, 0, Z_MASK);
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_negs(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_src_addsub(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0, uml::I2);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ UML_SUB(block, I0, 0, I0);
+
+ generate_update_flags_addsubs(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_OR(block, I5, I1, I0);
+ generate_set_register(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_ROLINS(block, DRC_SR, I1, 0, Z_MASK);
+ if (!SrcGlobal || (src_code != SR_REGISTER)) // negating carry cannot result in overflow
+ generate_exception_on_overflow(block, compiler, desc, uml::I2);
- if (DST_GLOBAL)
+ if (DstGlobal && (dst_code == PC_REGISTER))
{
- if (dst_code < 2)
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ if (desc->targetpc == BRANCH_TARGET_DYNAMIC)
{
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
+ UML_AND(block, I0, I0, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I0, desc);
}
else
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
}
}
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
-void hyperstone_device::generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_and(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
-
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
- const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t src_code = op & 0xf;
+ generate_logic_op<DstGlobal, SrcGlobal>(
+ block,
+ compiler,
+ desc,
+ [&block] (uml::parameter dst, uml::parameter src)
+ {
+ UML_AND(block, dst, dst, src);
+ });
+}
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_andn(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+{
+ generate_logic_op<DstGlobal, SrcGlobal>(
+ block,
+ compiler,
+ desc,
+ [&block] (uml::parameter dst, uml::parameter src)
+ {
+ UML_XOR(block, I1, src, ~uint32_t(0));
+ UML_AND(block, dst, dst, I1);
+ });
+}
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
- UML_XOR(block, I5, I1, I0);
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_or(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+{
+ generate_logic_op<DstGlobal, SrcGlobal>(
+ block,
+ compiler,
+ desc,
+ [&block] (uml::parameter dst, uml::parameter src)
+ {
+ UML_OR(block, dst, dst, src);
+ });
+}
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_ROLINS(block, DRC_SR, I1, 0, Z_MASK);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
+void hyperstone_device::generate_xor(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
+{
+ generate_logic_op<DstGlobal, SrcGlobal>(
+ block,
+ compiler,
+ desc,
+ [&block] (uml::parameter dst, uml::parameter src)
+ {
+ UML_XOR(block, dst, dst, src);
+ });
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_not(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- if (SRC_GLOBAL)
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_XOR(block, I5, I0, ~0);
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I0);
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_ROLINS(block, DRC_SR, I1, 0, Z_MASK);
+ UML_XOR(block, I0, I0, ~uint32_t(0));
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK);
+ UML_MOV(block, DRC_SR, I2);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, true);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_cmpi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
- if (IMM_LONG)
- {
- generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32
- }
+ uint32_t src;
+ if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- UML_MOV(block, I1, op & 0xf);
- }
-
- generate_check_delay_pc(block, compiler, desc);
+ src = op & 0x0f;
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_AND(block, DRC_SR, DRC_SR, ~(V_MASK | Z_MASK | N_MASK | C_MASK));
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I0);
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
- UML_DAND(block, I2, I2, 0x00000000ffffffffULL);
-#endif
+ UML_CMP(block, I0, src);
- UML_DSUB(block, I0, I2, I1);
-
- int no_v;
- UML_XOR(block, I0, I0, I2);
- UML_XOR(block, I3, I1, I2);
- UML_AND(block, I0, I0, I3);
- UML_TEST(block, I0, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_v = compiler.m_labelnum++);
- UML_OR(block, DRC_SR, DRC_SR, V_MASK);
- UML_LABEL(block, no_v);
-
- int no_n;
- UML_MOV(block, I3, 0);
- UML_CMP(block, I2, I1);
- UML_MOVc(block, uml::COND_E, I3, Z_MASK);
- UML_MOVc(block, uml::COND_B, I3, C_MASK);
- UML_JMPc(block, uml::COND_GE, no_n = compiler.m_labelnum++);
- UML_OR(block, I3, I3, N_MASK);
- UML_LABEL(block, no_n);
-
- UML_OR(block, DRC_SR, DRC_SR, I3);
+ generate_update_flags_cmp(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_movi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t src_code = op & 0xf;
- if (IMM_LONG)
- generate_decode_immediate_s(block, compiler, desc);
+ uint32_t src;
+ if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- UML_MOV(block, I1, src_code);
+ src = op & 0x0f;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
- int done, no_exception;
- if (DST_GLOBAL)
+ if (DstGlobal && compiler.user_mode())
{
- UML_TEST(block, DRC_SR, H_MASK);
- UML_JMPc(block, uml::COND_Z, no_exception = compiler.m_labelnum++);
- UML_TEST(block, DRC_SR, S_MASK);
- UML_JMPc(block, uml::COND_NZ, no_exception);
- UML_EXH(block, *m_exception[EXCEPTION_PRIVILEGE_ERROR], 0);
- UML_JMP(block, done = compiler.m_labelnum++);
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I2, H_MASK);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_PRIVILEGE_ERROR, uml::I2);
UML_LABEL(block, no_exception);
}
- UML_AND(block, DRC_SR, DRC_SR, ~(Z_MASK | N_MASK));
+ UML_AND(block, I2, I2, ~(Z_MASK | N_MASK | V_MASK));
+ if (!src)
+ UML_OR(block, I2, I2, Z_MASK);
+ else if (src & 0x80000000)
+ UML_OR(block, I2, I2, N_MASK);
- int no_z;
- UML_TEST(block, I1, ~0);
- UML_JMPc(block, uml::COND_NZ, no_z = compiler.m_labelnum++);
- UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
- UML_LABEL(block, no_z);
-
- int no_n;
- UML_TEST(block, I1, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_n = compiler.m_labelnum++);
- UML_OR(block, DRC_SR, DRC_SR, N_MASK);
- UML_LABEL(block, no_n);
+ if (DstGlobal)
+ {
+ if (compiler.supervisor_mode())
+ {
+ const int highglobal = compiler.next_label();
+ const int done = compiler.next_label();
-#if MISSIONCRAFT_FLAGS
- UML_AND(block, DRC_SR, DRC_SR, ~V_MASK);
-#endif
+ UML_TEST(block, I2, H_MASK);
+ UML_JMPc(block, uml::COND_NZ, highglobal);
- if (DST_GLOBAL)
- {
- UML_TEST(block, DRC_SR, H_MASK);
- UML_MOVc(block, uml::COND_NZ, I4, dst_code + 16);
- UML_MOVc(block, uml::COND_Z, I4, dst_code);
- UML_AND(block, DRC_SR, DRC_SR, ~H_MASK);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_low(block, compiler, desc, dst_code, src);
+ if (dst_code == PC_REGISTER)
+ {
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ generate_branch(block, compiler, compiler.mode(), src & ~uint32_t(1), desc);
+ }
+ else
+ {
+ UML_JMP(block, done);
+ }
- UML_TEST(block, op, 0xf0);
- UML_JMPc(block, uml::COND_NZ, done);
- UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- generate_branch(block, desc->targetpc, desc);
+ UML_LABEL(block, highglobal);
+ UML_AND(block, I2, I2, ~H_MASK);
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_high(block, compiler, dst_code, src);
- UML_LABEL(block, done);
+ UML_LABEL(block, done);
+ }
+ else
+ {
+ UML_MOV(block, DRC_SR, I2);
+ generate_set_global_register_low(block, compiler, desc, dst_code, src);
+ if (dst_code == PC_REGISTER)
+ {
+ UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
+ generate_branch(block, compiler, compiler.mode(), src & ~uint32_t(1), desc);
+ }
+ }
}
else
{
- UML_AND(block, DRC_SR, DRC_SR, ~H_MASK);
- UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
- UML_ADD(block, I0, I2, dst_code);
- UML_AND(block, I0, I0, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I0, I1, SIZE_DWORD, SCALE_x4);
+ UML_AND(block, I2, I2, ~H_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ UML_ROLAND(block, I2, I2, 32 - FP_SHIFT, 0x7f);
+ UML_ADD(block, I2, I2, dst_code);
+ UML_AND(block, I2, I2, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I2, src, SIZE_DWORD, SCALE_x4);
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_addi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t src_code = op & 0xf;
+ const bool roundeven = !(op & 0x10f);
- if (IMM_LONG)
- {
- generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32
- }
+ uint32_t src;
+ if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- UML_MOV(block, I1, src_code);
- }
+ src = op & 0x0f;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
+ if (DstGlobal && (dst_code == PC_REGISTER) && ((desc->flags & OPFLAG_IN_DELAY_SLOT) || !compiler.check_delay()))
{
- UML_LOAD(block, I0, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I2, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I2, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
- }
-
- if (!(op & 0x10f))
- {
- UML_ROLAND(block, I3, DRC_SR, 32-Z_SHIFT, 1);
- UML_XOR(block, I3, I3, 1);
- UML_AND(block, I4, I0, 1);
- UML_OR(block, I3, I3, I4);
- UML_AND(block, I1, DRC_SR, I3);
- }
-
-#ifndef PTR64
- UML_DAND(block, I0, I0, 0x00000000ffffffffULL);
- UML_DAND(block, I1, I1, 0x00000000ffffffffULL);
-#endif
-
- UML_DADD(block, I3, I0, I1);
-
- UML_DROLAND(block, I6, I3, 32, C_MASK);
-
- UML_XOR(block, I4, I0, I3);
- UML_XOR(block, I5, I1, I3);
- UML_AND(block, I4, I4, I5);
- UML_ROLINS(block, I6, I4, 4, V_MASK);
-
- UML_TEST(block, I3, ~0);
- UML_SETc(block, uml::COND_Z, I4);
- UML_ROLINS(block, I6, I4, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, I6, I3, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I6, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
+ uint64_t result;
+ uint32_t flags;
+ if (roundeven)
{
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I3);
- generate_set_global_register(block, compiler, desc);
-
- if (dst_code == PC_REGISTER)
- {
- UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- generate_branch(block, desc->targetpc, desc);
- }
+ // PC is always even so rounding to even can't cause carry or overflow
+ result = compiler.pc();
+ flags = (!uint32_t(result) ? Z_MASK : 0) | (BIT(result, 31) << N_SHIFT);
}
else
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I3, SIZE_DWORD, SCALE_x4);
+ result = uint64_t(compiler.pc()) + src;
+ flags =
+ (BIT(result, 32) << C_SHIFT) |
+ (!uint32_t(result) ? Z_MASK : 0) |
+ (BIT(result, 31) << N_SHIFT) |
+ (BIT((compiler.pc() ^ result) & (src ^ result), 31) << V_SHIFT);
}
+
+ UML_ROLINS(block, I2, flags, 0, M_MASK | V_MASK | N_MASK | Z_MASK | C_MASK);
+ UML_MOV(block, DRC_SR, I2);
+
+ result = uint32_t(result) & uint32_t(1);
+ UML_MOV(block, DRC_PC, result);
+ generate_branch(block, compiler, compiler.mode(), result, desc);
}
else
{
- UML_STORE(block, (void *)m_core->local_regs, I2, I3, SIZE_DWORD, SCALE_x4);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
+
+ uml::parameter srcp = roundeven ? uml::I1 : src;
+ if (roundeven)
+ {
+ UML_AND(block, I1, I0, 1); // Rd(0)
+ UML_AND(block, I1, I1, I2); // & C
+ UML_TEST(block, I2, Z_MASK);
+ UML_MOVc(block, uml::COND_NZ, I1, 0); // & ~Z
+ }
+
+ UML_ADD(block, I0, I0, srcp);
+
+ generate_update_flags_addsub(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
+
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_addsi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- printf("Unimplemented: generate_addsi (%08x)\n", desc->pc);
+ osd_printf_error("Unimplemented: generate_addsi (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_cmpbi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f);
- if (!IMM_LONG)
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- }
+ if (!DstGlobal || !n)
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- const uint32_t n = ((op & 0x100) >> 4) | (op & 0x0f);
if (n)
{
+ uint32_t src;
if (n == 31)
- {
- if (IMM_LONG)
- {
- generate_ignore_immediate_s(block, desc);
- generate_check_delay_pc(block, compiler, desc);
- }
- UML_MOV(block, I1, 0x7fffffff);
- }
+ src = 0x7fffffff;
+ else if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- if (IMM_LONG)
- {
- generate_decode_immediate_s(block, compiler, desc);
- generate_check_delay_pc(block, compiler, desc);
- }
- else
- {
- UML_MOV(block, I1, op & 0xf);
- }
- }
+ src = op & 0xf;
- UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
- UML_TEST(block, I2, I1);
- UML_SETc(block, uml::COND_Z, I3);
- UML_ROLINS(block, DRC_SR, I3, Z_SHIFT, Z_MASK);
+ if (DstGlobal)
+ UML_TEST(block, mem(&m_core->global_regs[dst_code]), src);
+ else
+ UML_TEST(block, I0, src);
+ UML_SETc(block, uml::COND_Z, I1);
+ UML_ROLINS(block, I2, I1, Z_SHIFT, Z_MASK);
}
else
{
- if (IMM_LONG)
- {
- generate_ignore_immediate_s(block, desc);
- generate_check_delay_pc(block, compiler, desc);
- }
-
- int or_mask, done;
- UML_TEST(block, I2, 0xff000000);
- UML_JMPc(block, uml::COND_Z, or_mask = compiler.m_labelnum++);
- UML_TEST(block, I2, 0x00ff0000);
+ const int or_mask = compiler.next_label();
+ const int done = compiler.next_label();
+ UML_TEST(block, I0, 0xff000000);
UML_JMPc(block, uml::COND_Z, or_mask);
- UML_TEST(block, I2, 0x0000ff00);
+ UML_TEST(block, I0, 0x00ff0000);
UML_JMPc(block, uml::COND_Z, or_mask);
- UML_TEST(block, I2, 0x000000ff);
+ UML_TEST(block, I0, 0x0000ff00);
UML_JMPc(block, uml::COND_Z, or_mask);
- UML_AND(block, DRC_SR, DRC_SR, ~Z_MASK);
- UML_JMP(block, done = compiler.m_labelnum++);
+ UML_TEST(block, I0, 0x000000ff);
+ UML_JMPc(block, uml::COND_Z, or_mask);
+ UML_AND(block, I2, I2, ~Z_MASK);
+ UML_JMP(block, done);
UML_LABEL(block, or_mask);
- UML_OR(block, DRC_SR, DRC_SR, Z_MASK);
+ UML_OR(block, I2, I2, Z_MASK);
UML_LABEL(block, done);
}
+
+ UML_MOV(block, DRC_SR, I2);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_andni(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
- const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint16_t op = desc->opptr.w[0];
+ uint32_t src;
if (DRC_N_OP_MASK == 0x10f)
- UML_MOV(block, I1, 0x7fffffff);
- else if (IMM_LONG)
- generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32
- else
- UML_MOV(block, I1, op & 0xf);
-
- generate_check_delay_pc(block, compiler, desc);
-
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
- UML_XOR(block, I1, I1, ~0);
- UML_AND(block, I5, I2, I1);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK);
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER)
- {
- generate_branch(block, desc->targetpc, desc);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
+ src = 0x7fffffff;
+ else if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I4, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ src = op & 0x0f;
+ src = ~src;
+
+ generate_logic_op_imm<DstGlobal>(
+ block,
+ compiler,
+ desc,
+ (op & 0xf0) >> 4,
+ [&block, src] (uml::parameter dst) { UML_AND(block, dst, dst, src); });
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_ori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
- const uint32_t dst_code = (op & 0xf0) >> 4;
-
- if (IMM_LONG)
- {
- generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32
- }
- else
- {
- UML_MOV(block, I1, op & 0xf);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
- UML_OR(block, I5, I2, I1);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK);
+ const uint16_t op = desc->opptr.w[0];
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER)
- {
- generate_branch(block, desc->targetpc, desc);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
+ uint32_t src;
+ if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I4, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ src = op & 0x0f;
+
+ generate_logic_op_imm<DstGlobal>(
+ block,
+ compiler,
+ desc,
+ (op & 0xf0) >> 4,
+ [&block, src] (uml::parameter dst) { UML_OR(block, dst, dst, src); });
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::generate_xori(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
- const uint32_t dst_code = (op & 0xf0) >> 4;
-
- if (IMM_LONG)
- {
- generate_decode_immediate_s(block, compiler, desc); // I1 <-- imm32
- }
- else
- {
- UML_MOV(block, I1, op & 0xf);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I2, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
-
- UML_XOR(block, I5, I2, I1);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_ROLINS(block, DRC_SR, I2, 0, Z_MASK);
+ const uint16_t op = desc->opptr.w[0];
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- if (dst_code == PC_REGISTER)
- {
- generate_branch(block, desc->targetpc, desc);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
+ uint32_t src;
+ if (ImmLong)
+ src = generate_get_immediate_s(desc);
else
- {
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I4, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ src = op & 0x0f;
+
+ generate_logic_op_imm<DstGlobal>(
+ block,
+ compiler,
+ desc,
+ (op & 0xf0) >> 4,
+ [&block, src] (uml::parameter dst) { UML_XOR(block, dst, dst, src); });
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::generate_shrdi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
- generate_check_delay_pc(block, compiler, desc);
-
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4); // I0 = sreg
-
- UML_ADD(block, I2, I3, dst_code + 1);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4); // I1 = sregf
-
-#ifndef PTR64
- UML_DAND(block, I2, I2, 0x00000000ffffffff);
-#endif
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_DSHL(block, I0, I0, 32);
- UML_DOR(block, I2, I2, I0);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I3);
- UML_AND(block, I4, DRC_SR, ~(C_MASK | Z_MASK | N_MASK));
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- const uint32_t n = HI_N ? (0x10 | (op & 0xf)) : (op & 0xf);
- if (HI_N || n)
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ if (n)
{
- int no_carry = compiler.m_labelnum++;
- UML_DTEST(block, I2, (1 << (n - 1)));
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_OR(block, I4, I4, 1);
- UML_LABEL(block, no_carry);
-
- UML_DSHR(block, I2, I2, n);
+ UML_DROLAND(block, I1, I0, 64 - C_SHIFT + 1 - n, C_MASK);
+ UML_OR(block, I2, I2, I1);
}
- UML_DTEST(block, I2, ~0ULL);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_DROLINS(block, I5, I2, 3, N_MASK);
- UML_OR(block, DRC_SR, I4, I5);
+ UML_DSHR(block, I0, I0, n);
+ generate_update_nz_d(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_STORE(block, (void *)m_core->local_regs, I6, I2, SIZE_DWORD, SCALE_x4);
- UML_DSHR(block, I0, I2, 32);
- UML_STORE(block, (void *)m_core->local_regs, I1, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSHR(block, I1, I0, 32);
+ UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
@@ -2540,61 +2196,42 @@ void hyperstone_device::generate_shrd(drcuml_block &block, compiler_state &compi
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t dstf_code = dst_code + 1;
-
- generate_check_delay_pc(block, compiler, desc);
- if (src_code == dst_code || src_code == dstf_code)
+ if ((src_code == dst_code) || (src_code == (dst_code + 1)))
{
- return;
+ return; // undefined if Ls overlaps Ld or Ldf
}
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
-
- UML_ADD(block, I2, I3, dstf_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
-
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffff);
-#endif
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I5);
- UML_DSHL(block, I2, I0, 32);
- UML_DOR(block, I0, I1, I2);
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I6, I2, 0x1f);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3);
- int no_shift = compiler.m_labelnum++;
- UML_TEST(block, I6, ~0);
+ const int no_shift = compiler.next_label();
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ UML_AND(block, I1, I1, 0x1f);
UML_JMPc(block, uml::COND_Z, no_shift);
-
- UML_SUB(block, I2, I6, 1);
- UML_DSHR(block, I3, I0, I2);
- UML_AND(block, I2, I3, 1);
- UML_DSHR(block, I0, I0, I6);
-
+ UML_SUB(block, I3, 64 - C_SHIFT + 1, I1);
+ UML_DROLAND(block, I3, I0, I3, C_MASK);
+ UML_OR(block, I2, I2, I3);
UML_LABEL(block, no_shift);
- UML_DCMP(block, I0, 0ULL);
- UML_MOVc(block, uml::COND_E, I3, Z_MASK);
- UML_MOVc(block, uml::COND_NE, I3, 0);
- UML_OR(block, I1, I2, I3);
- UML_DROLINS(block, I1, I0, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I1, 0, (C_MASK | Z_MASK | N_MASK));
- UML_STORE(block, (void *)m_core->local_regs, I5, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSHR(block, I0, I0, I1);
+ generate_update_nz_d(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
+
UML_DSHR(block, I1, I0, 32);
UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I5, I0, SIZE_DWORD, SCALE_x4);
}
@@ -2602,157 +2239,95 @@ void hyperstone_device::generate_shr(drcuml_block &block, compiler_state &compil
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I0 = dreg
+ const int no_shift = compiler.next_label();
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ UML_AND(block, I1, I1, 0x1f);
+ UML_JMPc(block, uml::COND_Z, no_shift);
+ UML_SUB(block, I4, 32 - C_SHIFT + 1, I1);
+ UML_ROLAND(block, I4, I0, I4, C_MASK);
+ UML_OR(block, I2, I2, I4);
+ UML_LABEL(block, no_shift);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I5, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I1, I5, 0x1f); // I1 = sreg & 0x1f
-
- UML_AND(block, I6, DRC_SR, ~(C_MASK | Z_MASK | N_MASK));
-
- int no_shift = compiler.m_labelnum++;
- int no_carry = compiler.m_labelnum++;
- UML_CMP(block, I1, 0);
- UML_JMPc(block, uml::COND_E, no_shift);
- UML_SUB(block, I2, I1, 1);
- UML_SHL(block, I2, 1, I2);
- UML_TEST(block, I0, I2);
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_OR(block, I6, I6, C_MASK);
-
- UML_LABEL(block, no_carry);
UML_SHR(block, I0, I0, I1);
+ generate_update_nz(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_LABEL(block, no_shift);
- UML_TEST(block, I0, ~0);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_ROLINS(block, I5, I0, 3, N_MASK);
-
- UML_OR(block, DRC_SR, I5, I6);
- UML_STORE(block, (void *)m_core->local_regs, I4, I0, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::generate_shri(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I4, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
+
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ if (n)
{
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I4, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
+ UML_ROLAND(block, I4, I0, 32 - C_SHIFT + 1 - n, C_MASK);
+ UML_OR(block, I2, I2, I4);
}
- UML_AND(block, I1, DRC_SR, ~(C_MASK | Z_MASK | N_MASK));
- const uint32_t n = HI_N ? (0x10 | (op & 0xf)) : (op & 0xf);
- if (HI_N || n)
- UML_ROLINS(block, I1, I4, 32 - (n - 1), 1);
+ UML_SHR(block, I0, I0, n);
+ generate_update_nz(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_SHR(block, I5, I4, n);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_ROLINS(block, I2, I5, 3, N_MASK);
- UML_OR(block, DRC_SR, I1, I2);
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::generate_sardi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t dstf_code = dst_code + 1;
-
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I3);
- UML_ADD(block, I2, I3, dstf_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
-
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffff);
-#endif
-
- UML_DSHL(block, I2, I0, 32);
- UML_DOR(block, I0, I1, I2);
-
- UML_AND(block, I4, DRC_SR, ~(C_MASK | Z_MASK | N_MASK));
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- const uint32_t n = HI_N ? (0x10 | (op & 0xf)) : (op & 0xf);
- if (HI_N || n)
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ if (n)
{
- int no_carry = compiler.m_labelnum++;
- UML_DTEST(block, I2, (1 << (n - 1)));
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_OR(block, I4, I4, 1);
- UML_LABEL(block, no_carry);
-
- UML_DSAR(block, I2, I2, n);
+ UML_DROLAND(block, I1, I0, 64 - C_SHIFT + 1 - n, C_MASK);
+ UML_OR(block, I2, I2, I1);
}
- UML_DTEST(block, I2, ~0ULL);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_DROLINS(block, I5, I2, 3, N_MASK);
- UML_OR(block, DRC_SR, I4, I5);
+ UML_DSAR(block, I0, I0, n);
+ generate_update_nz_d(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_STORE(block, (void *)m_core->local_regs, I6, I2, SIZE_DWORD, SCALE_x4);
- UML_DSHR(block, I0, I2, 32);
- UML_STORE(block, (void *)m_core->local_regs, I1, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSHR(block, I1, I0, 32);
+ UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
@@ -2760,61 +2335,42 @@ void hyperstone_device::generate_sard(drcuml_block &block, compiler_state &compi
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t dstf_code = dst_code + 1;
-
- generate_check_delay_pc(block, compiler, desc);
- if (src_code == dst_code || src_code == dstf_code)
+ if ((src_code == dst_code) || (src_code == (dst_code + 1)))
{
- return;
+ return; // undefined if Ls overlaps Ld or Ldf
}
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ADD(block, I2, I3, dstf_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I5);
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffff);
-#endif
-
- UML_DSHL(block, I2, I0, 32);
- UML_DOR(block, I0, I1, I2);
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I6, I2, 0x1f);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3);
- int no_shift = compiler.m_labelnum++;
- UML_TEST(block, I6, ~0);
+ const int no_shift = compiler.next_label();
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ UML_AND(block, I1, I1, 0x1f);
UML_JMPc(block, uml::COND_Z, no_shift);
-
- UML_SUB(block, I2, I6, 1);
- UML_DSAR(block, I3, I0, I2);
- UML_AND(block, I2, I3, 1);
- UML_DSAR(block, I0, I0, I6);
-
+ UML_SUB(block, I3, 64 - C_SHIFT + 1, I1);
+ UML_DROLAND(block, I3, I0, I3, C_MASK);
+ UML_OR(block, I2, I2, I3);
UML_LABEL(block, no_shift);
- UML_DCMP(block, I0, 0);
- UML_MOVc(block, uml::COND_E, I3, Z_MASK);
- UML_MOVc(block, uml::COND_NE, I3, 0);
- UML_OR(block, I1, I2, I3);
- UML_DROLINS(block, I1, I0, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I1, 0, (C_MASK | Z_MASK | N_MASK));
- UML_STORE(block, (void *)m_core->local_regs, I5, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSAR(block, I0, I0, I1);
+ generate_update_nz_d(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
+
UML_DSHR(block, I1, I0, 32);
UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I5, I0, SIZE_DWORD, SCALE_x4);
}
@@ -2822,169 +2378,110 @@ void hyperstone_device::generate_sar(drcuml_block &block, compiler_state &compil
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I1, dst_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
- UML_ADD(block, I1, I1, src_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
+ const int no_shift = compiler.next_label();
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
UML_AND(block, I1, I1, 0x1f);
-
- int no_shift = compiler.m_labelnum++;
- UML_MOV(block, I3, 0);
- UML_CMP(block, I1, 0);
- UML_JMPc(block, uml::COND_E, no_shift);
- UML_SUB(block, I4, I1, 1);
- UML_SHR(block, I4, I0, I4);
- UML_AND(block, I3, I4, 1);
- UML_SAR(block, I0, I0, I1);
+ UML_JMPc(block, uml::COND_Z, no_shift);
+ UML_SUB(block, I4, 32 - C_SHIFT + 1, I1);
+ UML_ROLAND(block, I4, I0, I4, C_MASK);
+ UML_OR(block, I2, I2, I4);
UML_LABEL(block, no_shift);
- UML_TEST(block, I0, ~0);
- UML_SETc(block, uml::COND_Z, I1);
- UML_ROLINS(block, I3, I1, Z_SHIFT, Z_MASK);
- UML_ROLINS(block, I3, I0, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I3, 0, (N_MASK | Z_MASK | C_MASK));
+ UML_SAR(block, I0, I0, I1);
+ generate_update_nz(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::generate_sari(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
- UML_ADD(block, I1, I1, dst_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
-
- const uint32_t n = HI_N ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- UML_MOV(block, I2, 0);
- if (HI_N || n)
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK));
+ if (n)
{
-
- UML_ROLINS(block, I2, I0, 32 - (n - 1), 1);
- UML_SAR(block, I0, I0, n);
+ UML_ROLAND(block, I4, I0, 32 - C_SHIFT + 1 - n, C_MASK);
+ UML_OR(block, I2, I2, I4);
}
- UML_TEST(block, I0, ~0);
- UML_MOVc(block, uml::COND_Z, I3, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I3, 0);
- UML_OR(block, I2, I2, I3);
- UML_ROLINS(block, I2, I0, 3, N_MASK);
- UML_ROLINS(block, DRC_SR, I2, 0, (C_MASK | Z_MASK | N_MASK));
+ UML_SAR(block, I0, I0, n);
+ generate_update_nz(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- UML_MOV(block, I5, I0);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I0, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I1, I0, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::generate_shldi(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t dstf_code = dst_code + 1;
-
- generate_check_delay_pc(block, compiler, desc);
-
- UML_ROLAND(block, I4, DRC_SR, 7, 0x7f); // I4: FP
-
- UML_ADD(block, I2, I4, dst_code);
- UML_AND(block, I2, I2, 0x3f); // I2: dst_code
- UML_LOAD(block, I6, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4); // I0: high_order
-
- UML_ADD(block, I3, I4, dstf_code);
- UML_AND(block, I3, I3, 0x3f); // I3: dstf_code
- UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4); // I1: low_order
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffff);
-#endif
-
- UML_DSHL(block, I0, I6, 32);
- UML_DOR(block, I0, I0, I1); // I0: val, I1 free after this point
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_MOV(block, I4, HI_N ? (0x10 | (op & 0xf)) : (op & 0xf));
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I4);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I5);
- UML_DSHR(block, I1, 0xffffffff00000000ULL, I4); // I1: mask
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
+ if (n)
+ UML_SHR(block, I3, I1, 32 - n);
- UML_AND(block, DRC_SR, DRC_SR, ~C_MASK);
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- int no_carry = compiler.m_labelnum++;
- UML_TEST(block, I4, 0x1f);
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_DROLINS(block, DRC_SR, I0, I4, 1); // Insert carry flag
- UML_LABEL(block, no_carry);
+ if (n)
+ {
+ UML_ROLAND(block, I1, I3, C_SHIFT, C_MASK);
+ UML_OR(block, I2, I2, I1);
+ }
- int no_hi_bit = compiler.m_labelnum++;
- int no_overflow = compiler.m_labelnum++;
- UML_AND(block, I5, I6, I1); // I5: high_order & mask
- UML_DSHL(block, I0, I0, I4); // I0: val << n
+ UML_DSHL(block, I0, I0, n);
+ generate_update_nz_d(block, compiler, uml::I2);
- UML_MOV(block, I4, 0);
- UML_DTEST(block, I0, 0x8000000000000000ULL);
- UML_JMPc(block, uml::COND_Z, no_hi_bit);
- UML_XOR(block, I5, I5, I1); // I5: (high_order & mask) ^ mask
- UML_LABEL(block, no_hi_bit);
- UML_TEST(block, I5, ~0);
- UML_JMPc(block, uml::COND_Z, no_overflow);
- UML_OR(block, I4, I4, V_MASK);
- UML_LABEL(block, no_overflow);
+ if (n)
+ {
+ UML_DTEST(block, I0, ~uint64_t(0));
+ UML_MOV(block, I1, util::make_bitmask<uint32_t>(n));
+ UML_MOVc(block, uml::COND_NS, I1, 0);
+ UML_CMP(block, I3, I1);
+ UML_MOV(block, I1, V_MASK);
+ UML_MOVc(block, uml::COND_E, I1, 0);
+ UML_OR(block, I2, I2, I1);
+ }
- UML_DTEST(block, I0, ~0ULL);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_DROLINS(block, I1, I0, 3, N_MASK);
- UML_OR(block, I1, I1, I4);
- UML_ROLINS(block, DRC_SR, I1, 0, (N_MASK | Z_MASK | V_MASK));
+ UML_MOV(block, DRC_SR, I2);
- UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
- UML_DSHR(block, I0, I0, 32);
- UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSHR(block, I1, I0, 32);
+ UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I5, I0, SIZE_DWORD, SCALE_x4);
}
@@ -2992,76 +2489,55 @@ void hyperstone_device::generate_shld(drcuml_block &block, compiler_state &compi
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- const uint32_t dstf_code = dst_code + 1;
-
- generate_check_delay_pc(block, compiler, desc);
- if (src_code == dst_code || src_code == dstf_code)
+ if ((src_code == dst_code) || (src_code == (dst_code + 1)))
{
- return;
+ return; // undefined if Ls overlaps Ld or Ldf
}
- UML_ROLAND(block, I4, DRC_SR, 7, 0x7f); // I4: FP
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ADD(block, I2, I4, dst_code);
- UML_AND(block, I2, I2, 0x3f); // I2: dst_code
- UML_LOAD(block, I6, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4); // I0: high_order
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I1, uml::I5);
+ generate_load_operand(block, compiler, LOCAL, dst_code + 1, uml::I0, uml::I6);
- UML_ADD(block, I3, I4, dstf_code);
- UML_AND(block, I3, I3, 0x3f); // I3: dstf_code
- UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4); // I1: low_order
-
-#ifndef PTR64
- UML_DAND(block, I1, I1, 0x00000000ffffffff);
-#endif
-
- UML_DSHL(block, I0, I6, 32);
- UML_DOR(block, I0, I0, I1); // I0: val, I1 free after this point
-
- UML_ADD(block, I4, I4, src_code);
- UML_AND(block, I4, I4, 0x3f);
- UML_LOAD(block, I4, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I4, I4, 0x1f); // I4: n
-
- UML_DSHR(block, I1, 0xffffffff00000000ULL, I4); // I1: mask
+ UML_DSHL(block, I1, I1, 32);
+ UML_DOR(block, I0, I0, I1);
- UML_AND(block, DRC_SR, DRC_SR, ~C_MASK);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I3);
- int no_carry = compiler.m_labelnum++;
- UML_TEST(block, I4, 0x1f);
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_DROLINS(block, DRC_SR, I0, I4, 1); // Insert carry flag
- UML_LABEL(block, no_carry);
+ const int no_shift = compiler.next_label();
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
+ UML_AND(block, I1, I1, 0x1f);
+ UML_JMPc(block, uml::COND_Z, no_shift);
+ UML_SUB(block, I3, 64, I1);
+ UML_DSHR(block, I4, I0, I3);
+ UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK);
+ UML_LABEL(block, no_shift);
- int no_hi_bit = compiler.m_labelnum++;
- int no_overflow = compiler.m_labelnum++;
- UML_AND(block, I5, I6, I1); // I5: high_order & mask
- UML_DSHL(block, I0, I0, I4); // I0: val << n
+ UML_DSHL(block, I0, I0, I1);
- UML_MOV(block, I4, 0);
- UML_DTEST(block, I0, 0x8000000000000000ULL);
- UML_JMPc(block, uml::COND_Z, no_hi_bit);
- UML_XOR(block, I5, I5, I1); // I5: (high_order & mask) ^ mask
- UML_LABEL(block, no_hi_bit);
- UML_TEST(block, I5, ~0);
+ const int no_overflow = compiler.next_label();
+ UML_TEST(block, I1, ~uint32_t(0));
UML_JMPc(block, uml::COND_Z, no_overflow);
- UML_OR(block, I4, I4, V_MASK);
+ UML_SHR(block, I1, ~uint32_t(0), I3);
+ UML_DTEST(block, I0, ~uint64_t(0));
+ UML_MOVc(block, uml::COND_NS, I1, 0);
+ UML_CMP(block, I4, I1);
+ UML_JMPc(block, uml::COND_E, no_overflow);
+ UML_OR(block, I2, I2, V_MASK);
UML_LABEL(block, no_overflow);
- UML_DTEST(block, I0, ~0ULL);
- UML_MOVc(block, uml::COND_Z, I1, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I1, 0);
- UML_DROLINS(block, I1, I0, 3, N_MASK);
- UML_OR(block, I1, I1, I4);
- UML_ROLINS(block, DRC_SR, I1, 0, (N_MASK | Z_MASK | V_MASK));
+ UML_DTEST(block, I0, I0);
+ generate_update_nz_d(block, compiler, uml::I2);
+ UML_MOV(block, DRC_SR, I2);
- UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
- UML_DSHR(block, I0, I0, 32);
- UML_STORE(block, (void *)m_core->local_regs, I2, I0, SIZE_DWORD, SCALE_x4);
+ UML_DSHR(block, I1, I0, 32);
+ UML_STORE(block, (void *)m_core->local_regs, I5, I1, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I6, I0, SIZE_DWORD, SCALE_x4);
}
@@ -3069,143 +2545,94 @@ void hyperstone_device::generate_shl(drcuml_block &block, compiler_state &compil
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- generate_check_delay_pc(block, compiler, desc);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I0 = dreg
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I5, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I1, I5, 0x1f); // I1 = sreg & 0x1f
-
- UML_AND(block, I6, DRC_SR, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
-
- int done_shift = compiler.m_labelnum++;
- int no_carry = compiler.m_labelnum++;
- UML_CMP(block, I1, 0);
- UML_JMPc(block, uml::COND_E, done_shift);
- UML_SUB(block, I2, I1, 1);
- UML_SHL(block, I2, I0, I2);
- UML_TEST(block, I2, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_carry);
- UML_OR(block, I6, I6, C_MASK);
-
- UML_LABEL(block, no_carry);
- UML_DSHR(block, I5, 0xffffffff00000000ULL, I1);
- UML_AND(block, I3, I0, I5);
+ if (dst_code != src_code)
+ {
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
+ UML_AND(block, I1, I1, 0x1f);
+ }
+ else
+ {
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
+ UML_AND(block, I1, I0, 0x1f);
+ }
- UML_SHL(block, I0, I0, I1);
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
- int no_hi_bit = compiler.m_labelnum++;
- UML_TEST(block, I0, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_hi_bit);
+ UML_SUB(block, I4, 32, I1);
+ UML_SHR(block, I5, ~uint32_t(0), I4);
+ UML_SHR(block, I4, I0, I4);
+ UML_TEST(block, I1, 0xffffffff);
+ UML_MOVc(block, uml::COND_Z, I4, 0);
+ UML_MOVc(block, uml::COND_Z, I5, 0);
+ UML_ROLINS(block, I2, I4, C_SHIFT, C_MASK);
- UML_XOR(block, I3, I3, I5);
+ UML_SHL(block, I0, I0, I1);
+ UML_MOVc(block, uml::COND_NS, I5, 0);
+ generate_update_nz(block, compiler, uml::I2);
- UML_LABEL(block, no_hi_bit);
- UML_TEST(block, I3, ~0);
- UML_JMPc(block, uml::COND_Z, done_shift);
- UML_OR(block, I6, I6, V_MASK);
+ UML_CMP(block, I4, I5);
+ UML_MOV(block, I1, V_MASK);
+ UML_MOVc(block, uml::COND_E, I1, 0);
+ UML_OR(block, I2, I2, I1);
- UML_LABEL(block, done_shift);
- UML_TEST(block, I0, ~0);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_ROLINS(block, I5, I0, 3, N_MASK);
+ UML_MOV(block, DRC_SR, I2);
- UML_OR(block, DRC_SR, I5, I6);
- UML_STORE(block, (void *)m_core->local_regs, I4, I0, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::generate_shli(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
+ const uint32_t n = HiN ? DRC_HI_N_VALUE : DRC_LO_N_VALUE;
+
+ UML_MOV(block, I2, DRC_SR);
+ if (!DstGlobal)
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- generate_check_delay_pc(block, compiler, desc);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I0, uml::I3);
- if (DST_GLOBAL)
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
+ if (n)
{
- UML_LOAD(block, I4, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
+ UML_SHR(block, I4, I0, 32 - n);
+ UML_MOV(block, I5, util::make_bitmask<uint32_t>(n));
+ UML_ROLAND(block, I1, I4, C_SHIFT, C_MASK);
+ UML_OR(block, I2, I2, I1);
}
- else
+
+ UML_SHL(block, I0, I0, n);
+ if (n)
{
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I4, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
+ UML_MOVc(block, uml::COND_NS, I5, 0);
}
+ generate_update_nz(block, compiler, uml::I2);
- UML_AND(block, I1, DRC_SR, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
- const uint32_t n = HI_N ? (0x10 | (op & 0xf)) : (op & 0xf);
-
- if (HI_N || n)
+ if (n)
{
- int skip_c = compiler.m_labelnum++;
- UML_TEST(block, I4, (0x80000000 >> (n - 1)));
- UML_JMPc(block, uml::COND_Z, skip_c);
- UML_OR(block, I1, I1, 1);
- UML_LABEL(block, skip_c);
+ UML_CMP(block, I4, I5);
+ UML_MOV(block, I1, V_MASK);
+ UML_MOVc(block, uml::COND_E, I1, 0);
+ UML_OR(block, I2, I2, I1);
}
- UML_SHL(block, I5, I4, n);
-
- int done_v = compiler.m_labelnum++;
- uint32_t mask = (uint32_t)(0xffffffff00000000ULL >> n);
-
- int no_high_bit = compiler.m_labelnum++;
- UML_TEST(block, I5, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_high_bit);
-
- UML_AND(block, I4, I4, mask);
- UML_XOR(block, I4, I4, mask);
- UML_TEST(block, I4, ~0);
- UML_JMPc(block, uml::COND_Z, done_v);
- UML_OR(block, I1, I1, V_MASK);
- UML_JMP(block, done_v);
+ UML_MOV(block, DRC_SR, I2);
- UML_LABEL(block, no_high_bit);
- UML_TEST(block, I4, mask);
- UML_JMPc(block, uml::COND_Z, done_v);
- UML_OR(block, I1, I1, V_MASK);
- UML_LABEL(block, done_v);
-
- UML_TEST(block, I5, ~0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_ROLINS(block, I2, I5, 3, N_MASK);
- UML_OR(block, DRC_SR, I1, I2);
-
- if (DST_GLOBAL)
- {
- if (dst_code < 2)
- {
- UML_MOV(block, I4, dst_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I3, false);
}
@@ -3213,23 +2640,17 @@ void hyperstone_device::generate_testlz(drcuml_block &block, compiler_state &com
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- generate_check_delay_pc(block, compiler, desc);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I0, uml::I0);
- UML_LZCNT(block, I4, I0);
+ UML_LZCNT(block, I0, I0);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I1, I4, SIZE_DWORD, SCALE_x4);
+ generate_set_dst(block, compiler, desc, LOCAL, dst_code, uml::I0, uml::I3, true);
}
@@ -3237,538 +2658,317 @@ void hyperstone_device::generate_rol(drcuml_block &block, compiler_state &compil
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t src_code = op & 0xf;
- generate_check_delay_pc(block, compiler, desc);
+ UML_MOV(block, I2, DRC_SR);
+ UML_ROLAND(block, I3, I2, 32 - FP_SHIFT, 0x7f);
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I0 = dreg
-
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I5, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I1, I5, 0x1f); // I1 = sreg & 0x1f
-
- int no_shift = compiler.m_labelnum++;
- UML_CMP(block, I1, 0);
- UML_JMPc(block, uml::COND_E, no_shift);
- UML_ROL(block, I2, I0, I1);
- UML_LABEL(block, no_shift);
-
- UML_DSHR(block, I5, 0xffffffff00000000ULL, I1);
- UML_AND(block, I3, I0, I5);
+ if (dst_code != src_code)
+ {
+ generate_load_operand(block, compiler, LOCAL, src_code, uml::I1, uml::I1);
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
+ UML_AND(block, I1, I1, 0x1f);
+ }
+ else
+ {
+ generate_load_operand(block, compiler, LOCAL, dst_code, uml::I0, uml::I3);
+ UML_AND(block, I1, I0, 0x1f);
+ }
- UML_MOV(block, I6, 0);
+ UML_AND(block, I2, I2, ~(C_MASK | Z_MASK | N_MASK | V_MASK));
- int no_hi_bit = compiler.m_labelnum++;
- UML_TEST(block, I0, 0x80000000);
- UML_JMPc(block, uml::COND_Z, no_hi_bit);
+ UML_SUB(block, I4, 32, I1);
+ UML_SHR(block, I4, ~uint32_t(0), I4);
+ UML_TEST(block, I1, 0xffffffff);
+ UML_MOVc(block, uml::COND_Z, I4, 0);
+ UML_MOV(block, I5, I4);
- UML_XOR(block, I3, I3, I5);
+ UML_ROL(block, I0, I0, I1);
+ UML_MOVc(block, uml::COND_NS, I4, 0);
+ generate_update_nz(block, compiler, uml::I2);
- int done_shift = compiler.m_labelnum++;
- UML_LABEL(block, no_hi_bit);
- UML_TEST(block, I3, ~0);
- UML_JMPc(block, uml::COND_Z, done_shift);
- UML_OR(block, I6, I6, V_MASK);
+ UML_AND(block, I1, I5, I0);
+ UML_ROLINS(block, I2, I1, C_SHIFT, C_MASK);
+ UML_CMP(block, I4, I1);
+ UML_MOV(block, I1, V_MASK);
+ UML_MOVc(block, uml::COND_E, I1, 0);
+ UML_OR(block, I2, I2, I1);
- UML_LABEL(block, done_shift);
- UML_TEST(block, I2, ~0);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_ROLINS(block, I5, I2, 3, N_MASK);
+ UML_MOV(block, DRC_SR, I2);
- UML_OR(block, I5, I5, I6);
- UML_ROLINS(block, DRC_SR, I5, 0, (V_MASK | N_MASK | Z_MASK | C_MASK));
- UML_STORE(block, (void *)m_core->local_regs, I4, I2, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_ldxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
- uint16_t next_1 = m_pr16(desc->pc + 2);
- const uint16_t sub_type = (next_1 & 0x3000) >> 12;
-
- uint32_t extra_s;
- if (next_1 & 0x8000)
- {
- const uint16_t next_2 = m_pr16(desc->pc + 4);
-
- extra_s = next_2;
- extra_s |= ((next_1 & 0xfff) << 16);
-
- if (next_1 & 0x4000)
- extra_s |= 0xf0000000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- }
- else
- {
- extra_s = next_1 & 0xfff;
-
- if (next_1 & 0x4000)
- extra_s |= 0xfffff000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t srcf_code = src_code + 1;
const uint32_t dst_code = (op & 0xf0) >> 4;
- if (!DST_GLOBAL || !SRC_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ const auto [sub_type, extra_s] = generate_get_d_code_dis(desc);
- if (DST_GLOBAL)
- {
- if (dst_code == SR_REGISTER)
- UML_MOV(block, I4, 0);
- else
- UML_LOAD(block, I4, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I4, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- }
+ if (!DstGlobal || !SrcGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ const uml::parameter dstp = generate_load_address_ad(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I0);
switch (sub_type)
{
- case 0: // LDBS.A
- UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I4, extra_s);
- UML_CALLH(block, *m_mem_read8);
- UML_SEXT(block, I5, I1, SIZE_BYTE);
-
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
- if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I5, SIZE_DWORD, SCALE_x4);
- }
- break;
-
- case 1: // LDBU.A
+ case 0: // LDBS.D/A
+ case 1: // LDBU.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I4, extra_s);
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 1);
UML_CALLH(block, *m_mem_read8);
+ if (sub_type == 0) // LDBS.D/A
+ UML_SEXT(block, I1, I1, SIZE_BYTE);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ {
+ UML_AND(block, I1, I1, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I1, desc);
+ }
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
break;
case 2:
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I4, extra_s & ~1);
- UML_AND(block, I0, I0, ~1);
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 2);
UML_CALLH(block, *m_mem_read16);
+ if (extra_s & 1) // LDHS.A/D
+ UML_SEXT(block, I1, I1, SIZE_WORD);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I4, src_code);
- if (extra_s & 1) // LDHS.A
- UML_SEXT(block, I5, I1, SIZE_WORD);
- else // LDHU.A
- UML_MOV(block, I5, I1);
-
- generate_set_global_register(block, compiler, desc);
-
- if (src_code == 0)
- generate_branch(block, desc->targetpc, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
+ if (src_code == PC_REGISTER)
+ {
+ UML_AND(block, I1, I1, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I1, desc);
+ }
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- if (extra_s & 1)
- {
- UML_SEXT(block, I5, I1, SIZE_WORD);
- UML_STORE(block, (void *)m_core->local_regs, I2, I5, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- }
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
break;
case 3:
- {
- uint32_t switch_val = extra_s & 3;
- extra_s &= ~3;
- UML_ADD(block, I0, I4, extra_s);
- UML_AND(block, I0, I0, ~3);
- switch (switch_val)
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 4);
+ switch (extra_s & 3)
{
- case 0: // LDW.A/D
+ case 0: // LDW.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ {
+ UML_AND(block, I1, I1, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I1, desc);
+ }
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
break;
- case 1: // LDD.A
+
+ case 1: // LDD.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
UML_CALLH(block, *m_mem_read32);
-
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
- if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_register(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I2, true);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_read32);
+ generate_set_register(block, compiler, desc, SrcGlobal, srcf_code, uml::I1, uml::I3, true);
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, srcf_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, srcf_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- }
+ if (src_code == PC_REGISTER)
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
break;
- case 2: // LDW.IOD
+
+ case 2: // LDW.IOD/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ROLAND(block, I0, I0, 21, 0x7ffc);
UML_CALLH(block, *m_io_read32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
- if (src_code == 0)
- generate_branch(block, desc->targetpc, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
+ if (src_code == PC_REGISTER)
+ {
+ UML_AND(block, I1, I1, ~uint32_t(1));
+ generate_branch(block, compiler, compiler.mode(), uml::I1, desc);
+ }
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
break;
- case 3: // LDD.IODs
+ case 3: // LDD.IOD/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- UML_ROLAND(block, I0, I0, 21, 0x7ffc);
UML_CALLH(block, *m_io_read32);
+ generate_set_register(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I2, true);
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
- if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- }
-
- UML_ADD(block, I0, I0, 4);
+ UML_ADD(block, I0, I0, 1 << 13);
UML_CALLH(block, *m_io_read32);
+ generate_set_register(block, compiler, desc, SrcGlobal, srcf_code, uml::I1, uml::I3, true);
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I5, I1);
- UML_MOV(block, I4, srcf_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, srcf_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I1, SIZE_DWORD, SCALE_x4);
- }
+ if (src_code == PC_REGISTER)
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
break;
}
break;
- }
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
- uint16_t next_1 = m_pr16(desc->pc + 2);
- const uint16_t sub_type = (next_1 & 0x3000) >> 12;
-
- uint32_t extra_s;
- if (next_1 & 0x8000)
- {
- const uint16_t next_2 = m_pr16(desc->pc + 4);
-
- extra_s = next_2;
- extra_s |= ((next_1 & 0xfff) << 16);
-
- if (next_1 & 0x4000)
- extra_s |= 0xf0000000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- }
- else
- {
- extra_s = next_1 & 0xfff;
-
- if (next_1 & 0x4000)
- extra_s |= 0xfffff000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t srcf_code = src_code + 1;
const uint32_t dst_code = (op & 0xf0) >> 4;
- if (DST_GLOBAL && dst_code < 2)
+ const auto [sub_type, extra_s] = generate_get_d_code_dis(desc);
+
+ if (DstGlobal && (dst_code <= SR_REGISTER))
{
- printf("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
return;
}
- if (!DST_GLOBAL || !SRC_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ if (!DstGlobal || !SrcGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I6, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I6, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_address_ns(block, compiler, desc, DstGlobal, dst_code, uml::I6, uml::I2, sub_type, extra_s);
switch (sub_type)
{
case 0: // LDBS.N
case 1: // LDBU.N
case 2: // LDHS.N, LDHU.N
- {
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- if (sub_type == 0)
- {
- UML_MOV(block, I0, I6);
- UML_CALLH(block, *m_mem_read8);
- UML_SEXT(block, I5, I1, SIZE_BYTE);
- }
- else if (sub_type == 2)
+ if (sub_type == 2)
{
UML_AND(block, I0, I6, ~1);
UML_CALLH(block, *m_mem_read16);
if (extra_s & 1)
- UML_SEXT(block, I5, I1, SIZE_WORD);
- else
- UML_MOV(block, I5, I1);
+ UML_SEXT(block, I1, I1, SIZE_WORD);
}
else
{
UML_MOV(block, I0, I6);
UML_CALLH(block, *m_mem_read8);
- UML_MOV(block, I5, I1);
+ if (sub_type == 0)
+ UML_SEXT(block, I1, I1, SIZE_BYTE);
}
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I4, src_code);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I5, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I3, true);
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
+ if ((DstGlobal != SrcGlobal) || (src_code != dst_code))
{
if (sub_type == 2)
UML_ADD(block, I4, I6, extra_s & ~1);
else
UML_ADD(block, I4, I6, extra_s);
- if (DST_GLOBAL)
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I4, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I4, uml::I2, false);
}
break;
- }
+
case 3:
switch (extra_s & 3)
{
case 0: // LDW.N
- {
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
UML_AND(block, I0, I6, ~3);
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I3, true);
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
+ if ((DstGlobal != SrcGlobal) || (src_code != dst_code))
{
- UML_ADD(block, I4, I6, extra_s);
+ UML_ADD(block, I4, I6, extra_s & ~3);
- if (DST_GLOBAL)
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I4, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I4, uml::I2, false);
}
break;
- }
+
case 1: // LDD.N
- {
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
UML_AND(block, I0, I6, ~3);
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_read32);
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, srcf_code, uml::I1);
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_read32);
- UML_ADD(block, I2, I3, srcf_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
+ if ((DstGlobal != SrcGlobal) || (src_code != dst_code))
{
- UML_ADD(block, I4, I6, extra_s & ~1);
+ UML_ADD(block, I4, I6, extra_s & ~3);
- if (DST_GLOBAL)
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I4, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I4, uml::I2, false);
}
break;
- }
+
case 2: // Reserved
- printf("Reserved instruction in generate_ldxx2. PC = %08X\n", desc->pc);
+ osd_printf_error("Reserved instruction in generate_ldxx2. PC = %08X\n", desc->pc);
break;
+
case 3: // LDW.S
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int below_sp = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
+ const int below_sp = compiler.next_label();
+ const int done = compiler.next_label();
- UML_MOV(block, I2, mem(&m_core->global_regs[SP_REGISTER]));
- UML_CMP(block, I6, I2);
+ UML_CMP(block, I6, mem(&m_core->global_regs[SP_REGISTER]));
UML_JMPc(block, uml::COND_B, below_sp);
- UML_ROLAND(block, I0, I6, 30, 0x3f);
+ UML_ROLAND(block, I0, I6, 32 - 2, 0x3f);
UML_LOAD(block, I1, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4);
UML_JMP(block, done);
@@ -3778,33 +2978,13 @@ void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &comp
UML_LABEL(block, done);
- if (SRC_GLOBAL)
- {
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I3, true);
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
+ if ((DstGlobal != SrcGlobal) || (src_code != dst_code))
{
UML_ADD(block, I4, I6, extra_s & ~3);
- if (DST_GLOBAL)
- {
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I4, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_set_dst(block, compiler, desc, DstGlobal, dst_code, uml::I4, uml::I2, false);
}
break;
}
@@ -3814,64 +2994,26 @@ void hyperstone_device::generate_ldxx2(drcuml_block &block, compiler_state &comp
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
-
- uint16_t next_1 = m_pr16(desc->pc + 2);
- const uint16_t sub_type = (next_1 & 0x3000) >> 12;
-
- uint32_t extra_s;
- if (next_1 & 0x8000)
- {
- const uint16_t next_2 = m_pr16(desc->pc + 4);
-
- extra_s = next_2;
- extra_s |= ((next_1 & 0xfff) << 16);
-
- if (next_1 & 0x4000)
- extra_s |= 0xf0000000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- }
- else
- {
- extra_s = next_1 & 0xfff;
-
- if (next_1 & 0x4000)
- extra_s |= 0xfffff000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ const auto [sub_type, extra_s] = generate_get_d_code_dis(desc);
- if (DST_GLOBAL)
- {
- if (dst_code == SR_REGISTER)
- UML_MOV(block, I0, 0);
- else
- UML_LOAD(block, I0, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I1, I3, dst_code);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ if (!DstGlobal || !SrcGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ const uml::parameter dstp = generate_load_address_ad(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I0);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
}
else
{
@@ -3882,191 +3024,189 @@ void hyperstone_device::generate_stxx1(drcuml_block &block, compiler_state &comp
switch (sub_type)
{
- case 0: // STBS.D
- case 1: // STBU.D
- // TODO: missing trap on range error for STBS.D
+ case 0: // STBS.D/A
+ case 1: // STBU.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I0, extra_s);
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 1);
UML_CALLH(block, *m_mem_write8);
+
+ if (sub_type == 0)
+ {
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I1, 0xffffff00);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ UML_SEXT(block, I0, I1, SIZE_BYTE);
+ UML_CMP(block, I0, I1);
+ UML_JMPc(block, uml::COND_E, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR);
+ UML_LABEL(block, no_exception);
+ }
break;
- case 2: // STHS.D, STHU.D
- // TODO: missing trap on range error with STHS.D
+ case 2: // STHS.D/A, STHU.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I0, extra_s);
- UML_AND(block, I0, I0, ~1);
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 2);
UML_CALLH(block, *m_mem_write16);
+
+ if (extra_s & 1)
+ {
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I1, 0xffff0000);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ UML_SEXT(block, I0, I1, SIZE_WORD);
+ UML_CMP(block, I0, I1);
+ UML_JMPc(block, uml::COND_E, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR);
+ UML_LABEL(block, no_exception);
+ }
break;
case 3:
+ generate_add_dis(block, compiler, uml::I0, dstp, extra_s, 4);
switch (extra_s & 3)
{
- case 0: // STW.D
+ case 0: // STW.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I0, extra_s & ~1);
- UML_AND(block, I0, I0, ~3);
UML_CALLH(block, *m_mem_write32);
break;
- case 1: // STD.D
- {
+ case 1: // STD.D/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- UML_ADD(block, I0, I0, extra_s & ~1);
- UML_AND(block, I0, I0, ~3);
UML_CALLH(block, *m_mem_write32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code + 1, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code + 1]));
}
else
{
- UML_ADD(block, I1, I3, src_code + 1);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code + 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_write32);
break;
- }
- case 2: // STW.IOD
+ case 2: // STW.IOD/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ADD(block, I0, I0, extra_s & ~3);
- UML_ROLAND(block, I0, I0, 21, 0x7ffc);
UML_CALLH(block, *m_io_write32);
break;
- case 3: // STD.IOD
- {
+ case 3: // STD.IOD/A
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- UML_ADD(block, I0, I0, extra_s & ~1); // Is this correct?
- UML_ROLAND(block, I0, I0, 21, 0x7ffc);
UML_CALLH(block, *m_io_write32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code + 1, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code + 1]));
}
else
{
- UML_ADD(block, I1, I3, src_code + 1);
- UML_AND(block, I1, I1, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code + 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
- UML_ADD(block, I0, I0, 4);
+ UML_ADD(block, I0, I0, 1 << 13);
UML_CALLH(block, *m_io_write32);
break;
- }
}
break;
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
-
- uint16_t next_1 = m_pr16(desc->pc + 2);
- const uint16_t sub_type = (next_1 & 0x3000) >> 12;
-
- uint32_t extra_s;
- if (next_1 & 0x8000)
- {
- const uint16_t next_2 = m_pr16(desc->pc + 4);
-
- extra_s = next_2;
- extra_s |= ((next_1 & 0xfff) << 16);
-
- if (next_1 & 0x4000)
- extra_s |= 0xf0000000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 4);
- }
- else
- {
- extra_s = next_1 & 0xfff;
-
- if (next_1 & 0x4000)
- extra_s |= 0xfffff000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
- }
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- if (DST_GLOBAL && dst_code < 2)
+ const auto [sub_type, extra_s] = generate_get_d_code_dis(desc);
+
+ if (DstGlobal && (dst_code <= SR_REGISTER))
{
- printf("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted PC or SR in hyperstone_stxx2. PC = %08X\n", desc->pc);
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
return;
}
- if (!DST_GLOBAL || !SRC_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ if (!DstGlobal || !SrcGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I0, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_address_ns(block, compiler, desc, DstGlobal, dst_code, uml::I0, uml::I6, sub_type, extra_s);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I1, I3, src_code);
+ UML_AND(block, I1, I1, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
}
switch (sub_type)
{
case 0: // STBS.N
case 1: // STBU.N
- // TODO: missing trap on range error with STBS.N
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
UML_CALLH(block, *m_mem_write8);
- UML_ADD(block, I0, I0, extra_s);
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I0, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I0, I0, extra_s);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I0);
else
UML_STORE(block, (void *)m_core->local_regs, I6, I0, SIZE_DWORD, SCALE_x4);
+
+ if (sub_type == 0)
+ {
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I1, 0xffffff00);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ UML_SEXT(block, I0, I1, SIZE_BYTE);
+ UML_CMP(block, I0, I1);
+ UML_JMPc(block, uml::COND_E, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR);
+ UML_LABEL(block, no_exception);
+ }
break;
+
case 2: // STHS.N, STHU.N
- // TODO: missing trap on range error with STHS.N
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_MOV(block, I5, I0);
+ UML_MOV(block, I4, I0);
UML_AND(block, I0, I0, ~1);
UML_CALLH(block, *m_mem_write16);
- UML_ADD(block, I5, I5, extra_s & ~1);
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I4, I4, extra_s & ~1);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I4);
else
- UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
+ UML_STORE(block, (void *)m_core->local_regs, I6, I4, SIZE_DWORD, SCALE_x4);
+
+ if (extra_s & 1)
+ {
+ const int no_exception = compiler.next_label();
+ UML_TEST(block, I1, 0xffff0000);
+ UML_JMPc(block, uml::COND_Z, no_exception);
+ UML_SEXT(block, I0, I1, SIZE_WORD);
+ UML_CMP(block, I0, I1);
+ UML_JMPc(block, uml::COND_E, no_exception);
+ generate_raise_exception(block, compiler, desc, TRAPNO_RANGE_ERROR);
+ UML_LABEL(block, no_exception);
+ }
break;
+
case 3:
switch (extra_s & 3)
{
@@ -4077,11 +3217,12 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
UML_CALLH(block, *m_mem_write32);
UML_ADD(block, I5, I5, extra_s);
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I5);
else
UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
break;
+
case 1: // STD.N
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
UML_MOV(block, I5, I0);
@@ -4089,34 +3230,27 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
UML_CALLH(block, *m_mem_write32);
UML_ADD(block, I5, I5, extra_s & ~1);
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I5);
else
UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
- if (SRC_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code + 1, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, src_code + 1);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_operand(block, compiler, SrcGlobal, src_code + 1, uml::I1, uml::I4);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_write32);
break;
+
case 2: // Reserved
- printf("Executed Reserved instruction in hyperstone_stxx2. PC = %08X\n", desc->pc);
+ osd_printf_error("Executed Reserved instruction in hyperstone_stxx2. PC = %08X\n", desc->pc);
break;
+
case 3: // STW.S
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int less_than_sp = compiler.m_labelnum++;
- int store_done = compiler.m_labelnum++;
+ int less_than_sp = compiler.next_label();
+ int store_done = compiler.next_label();
UML_MOV(block, I5, I0);
UML_CMP(block, I5, mem(&SP));
@@ -4132,8 +3266,8 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
UML_LABEL(block, store_done);
UML_ADD(block, I5, I5, extra_s & ~3);
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I5);
else
UML_STORE(block, (void *)m_core->local_regs, I6, I5, SIZE_DWORD, SCALE_x4);
break;
@@ -4144,45 +3278,27 @@ void hyperstone_device::generate_stxx2(drcuml_block &block, compiler_state &comp
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal, hyperstone_device::sign_mode SIGNED>
void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_36));
- uint16_t op = desc->opptr.w[0];
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t dstf_code = dst_code + 1;
const uint32_t src_code = op & 0xf;
- if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
+ if ((SrcGlobal && src_code < 2) || (DstGlobal && dst_code < 2))
{
- printf("Denoted PC or SR in hyperstone_muls/u instruction. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted PC or SR in hyperstone_muls/u instruction. PC = %08X\n", desc->pc);
return;
}
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
-
- if (SRC_GLOBAL)
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- }
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (DST_GLOBAL)
- {
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- }
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I4);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I1, uml::I6);
if (SIGNED == IS_SIGNED)
UML_MULS(block, I4, I5, I0, I1);
@@ -4190,16 +3306,16 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp
UML_MULU(block, I4, I5, I0, I1);
UML_OR(block, I2, I4, I5);
- UML_TEST(block, I2, ~0);
- UML_MOVc(block, uml::COND_NZ, I2, 0);
- UML_MOVc(block, uml::COND_Z, I2, Z_MASK);
- UML_ROLINS(block, I2, I5, 3, N_MASK);
+ UML_TEST(block, I2, ~uint32_t(0));
+ UML_SETc(block, uml::COND_Z, I2);
+ UML_SHL(block, I2, I2, Z_SHIFT);
+ UML_ROLINS(block, I2, I5, N_SHIFT + 1, N_MASK);
UML_ROLINS(block, DRC_SR, I2, 0, (N_MASK | Z_MASK));
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I5, SIZE_DWORD, SCALE_x4);
- UML_STORE(block, (void *)m_core->global_regs, dstf_code, I4, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I5);
+ UML_MOV(block, mem(&m_core->global_regs[dstf_code]), I4);
}
else
{
@@ -4209,7 +3325,7 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp
UML_STORE(block, (void *)m_core->local_regs, I5, I4, SIZE_DWORD, SCALE_x4);
}
- int done = compiler.m_labelnum++;
+ int done = compiler.next_label();
UML_MOV(block, I7, mem(&m_core->clock_cycles_6));
if (SIGNED == IS_SIGNED)
{
@@ -4235,96 +3351,71 @@ void hyperstone_device::generate_mulsu(drcuml_block &block, compiler_state &comp
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_mul(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
+ if ((SrcGlobal && src_code < 2) || (DstGlobal && dst_code < 2))
{
- printf("Denoted PC or SR in hyperstone_mul instruction. PC = %08X\n", desc->pc);
+ osd_printf_error("Denoted PC or SR in hyperstone_mul instruction. PC = %08X\n", desc->pc);
return;
}
- if (!SRC_GLOBAL || !DST_GLOBAL)
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ if (!SrcGlobal || !DstGlobal)
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
- UML_LOAD(block, I0, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
- else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- }
+ generate_load_operand(block, compiler, SrcGlobal, src_code, uml::I0, uml::I1);
+ generate_load_operand(block, compiler, DstGlobal, dst_code, uml::I1, uml::I6);
- if (DST_GLOBAL)
- UML_LOAD(block, I1, (void *)m_core->global_regs, dst_code, SIZE_DWORD, SCALE_x4);
- else
- {
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I6, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I6, SIZE_DWORD, SCALE_x4);
- }
+ UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
+ const int add_cycles = compiler.next_label();
+ const int set_cycles = compiler.next_label();
+ UML_CMP(block, I0, 0xffff8000);
+ UML_JMPc(block, uml::COND_L, add_cycles);
+ UML_CMP(block, I0, 0x00008000);
+ UML_JMPc(block, uml::COND_GE, add_cycles);
+ UML_CMP(block, I1, 0xffff8000);
+ UML_JMPc(block, uml::COND_L, add_cycles);
+ UML_CMP(block, I1, 0x00008000);
+ UML_JMPc(block, uml::COND_L, set_cycles);
+ UML_LABEL(block, add_cycles);
+ UML_ADD(block, I7, I7, mem(&m_core->clock_cycles_2));
+ UML_LABEL(block, set_cycles);
UML_MULU(block, I2, I3, I0, I1);
UML_AND(block, I4, DRC_SR, ~(Z_MASK | N_MASK));
- UML_TEST(block, I2, ~0);
- UML_MOVc(block, uml::COND_Z, I5, Z_MASK);
- UML_MOVc(block, uml::COND_NZ, I5, 0);
- UML_ROLINS(block, I5, I2, 3, N_MASK);
+ UML_TEST(block, I2, ~uint32_t(0));
+ UML_SETc(block, uml::COND_Z, I5);
+ UML_SHL(block, I5, I5, Z_SHIFT);
+ UML_ROLINS(block, I5, I2, N_SHIFT + 1, N_MASK);
UML_ROLINS(block, DRC_SR, I5, 0, (Z_MASK | N_MASK));
- if (DST_GLOBAL)
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I2, SIZE_DWORD, SCALE_x4);
+ if (DstGlobal)
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I2);
else
UML_STORE(block, (void *)m_core->local_regs, I6, I2, SIZE_DWORD, SCALE_x4);
-
- UML_MOV(block, I7, mem(&m_core->clock_cycles_3));
- int add_cycles = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
- UML_CMP(block, I0, 0xffff8000);
- UML_JMPc(block, uml::COND_B, add_cycles);
- UML_CMP(block, I0, 0x8000);
- UML_JMPc(block, uml::COND_AE, add_cycles);
- UML_CMP(block, I1, 0xffff8000);
- UML_JMPc(block, uml::COND_B, add_cycles);
- UML_CMP(block, I1, 0x8000);
- UML_JMPc(block, uml::COND_AE, add_cycles);
- UML_JMP(block, done);
-
- UML_LABEL(block, add_cycles);
- UML_ADD(block, I7, I7, mem(&m_core->clock_cycles_2));
-
- UML_LABEL(block, done);
- // TODO: proper cycle counts
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t dst_code = (op & 0xf0) >> 4;
const uint32_t n = op & 0xf;
- if (DST_GLOBAL && dst_code < 2)
+ if (DstGlobal && dst_code < 2)
{
return;
}
- if (HI_N)
+ if (HiN)
{
if (n >= 4 || n == 2)
{
@@ -4339,7 +3430,7 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
}
else
{
- printf("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
+ osd_printf_error("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
return;
}
}
@@ -4347,10 +3438,10 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
{
if (n == 0)
{
- int no_low_bit = compiler.m_labelnum++;
+ int no_low_bit = compiler.next_label();
UML_MOV(block, I1, mem(&m_core->global_regs[SP_REGISTER]));
UML_AND(block, I0, I1, 0xfffffe00);
- UML_ROLINS(block, I0, DRC_SR, 9, 0x000001fc);
+ UML_ROLINS(block, I0, DRC_SR, 32 - FP_SHIFT + 2, 0x000001fc);
UML_TEST(block, I1, 0x100);
UML_JMPc(block, uml::COND_Z, no_low_bit);
UML_TEST(block, DRC_SR, 0x80000000);
@@ -4371,18 +3462,18 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
}
else
{
- printf("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
+ osd_printf_error("Used reserved N value (%d) in hyperstone_set. PC = %08X\n", n, desc->pc);
return;
}
}
- if (DST_GLOBAL)
+ if (DstGlobal)
{
- UML_STORE(block, (void *)m_core->global_regs, dst_code, I0, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[dst_code]), I0);
}
else
{
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I1, DRC_SR, 32 - FP_SHIFT, 0x7f);
UML_ADD(block, I2, I1, dst_code);
UML_AND(block, I3, I2, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I3, I0, SIZE_DWORD, SCALE_x4);
@@ -4390,424 +3481,375 @@ void hyperstone_device::generate_set(drcuml_block &block, compiler_state &compil
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_ldwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I0, I0, ~3);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I2, 0);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I3, 0);
+
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
- {
- if (src_code < 2)
- {
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
- if (src_code == PC_REGISTER)
- {
- generate_branch(block, desc->targetpc, desc);
- }
- }
- else
- {
- UML_STORE(block, (void *)m_core->global_regs, src_code, I1, SIZE_DWORD, SCALE_x4);
- }
- }
+ if (SrcGlobal || (src_code != dst_code))
+ generate_set_dst(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I3, true);
else
- {
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
- }
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_lddr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I1, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I1, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I0, I0, ~3);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ if (!SrcGlobal && (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I2, 0);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I3, 0);
+
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_read32);
- UML_MOV(block, I4, src_code + 1);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ generate_set_global_register_low(block, compiler, desc, src_code + 1, uml::I1);
}
else
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ if (src_code != dst_code)
+ {
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ }
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
UML_ADD(block, I0, I0, 4);
UML_CALLH(block, *m_mem_read32);
- UML_ADD(block, I2, I3, src_code + 1);
- UML_AND(block, I4, I2, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_ldwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I1, I0, dst_code);
- UML_AND(block, I2, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I2, 4);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I3, 4);
- UML_ADD(block, I3, I0, 4);
- UML_AND(block, I0, I0, ~3);
UML_CALLH(block, *m_mem_read32);
- if (SRC_GLOBAL)
+ if (SrcGlobal || (src_code != dst_code))
{
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
-
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I1, I0, dst_code);
- UML_AND(block, I2, I1, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I3, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I4, I4, 4);
+ UML_STORE(block, (void *)m_core->local_regs, I2, I4, SIZE_DWORD, SCALE_x4);
- if (src_code == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ generate_set_dst(block, compiler, desc, SrcGlobal, src_code, uml::I1, uml::I3, true);
}
else
{
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I4, I0, src_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I1, SIZE_DWORD, SCALE_x4);
-
- if (src_code != dst_code)
- {
- UML_ADD(block, I4, I0, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I3, SIZE_DWORD, SCALE_x4);
- }
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_lddp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I1, I0, dst_code);
- UML_AND(block, I2, I1, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I2, 8);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I3, 8);
- UML_ADD(block, I3, I0, 8);
- UML_AND(block, I0, I0, ~3);
UML_CALLH(block, *m_mem_read32);
- UML_MOV(block, I2, I1); // I2: dreg[0]
- UML_ADD(block, I0, I0, 4);
- UML_CALLH(block, *m_mem_read32); // I1: dreg[4]
- if (SRC_GLOBAL)
+ if (SrcGlobal || ((src_code != dst_code) && ((src_code + 1) != dst_code)))
{
- UML_MOV(block, I4, src_code);
- UML_MOV(block, I5, I2);
- generate_set_global_register(block, compiler, desc);
- UML_MOV(block, I4, src_code + 1);
- UML_MOV(block, I5, I1);
- generate_set_global_register(block, compiler, desc);
+ UML_ADD(block, I4, I4, 8);
+ UML_STORE(block, (void *)m_core->local_regs, I2, I4, SIZE_DWORD, SCALE_x4);
+ }
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I1, I0, dst_code);
- UML_AND(block, I2, I1, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I2, I3, SIZE_DWORD, SCALE_x4);
+ if (SrcGlobal)
+ {
+ generate_set_global_register_low(block, compiler, desc, src_code, uml::I1);
- if (src_code == PC_REGISTER || (src_code + 1) == PC_REGISTER)
- generate_branch(block, desc->targetpc, desc);
+ UML_ADD(block, I0, I0, 4);
+ UML_CALLH(block, *m_mem_read32);
+
+ generate_set_global_register_low(block, compiler, desc, src_code + 1, uml::I1);
}
else
{
- UML_ROLAND(block, I0, DRC_SR, 7, 0x7f);
- UML_ADD(block, I4, I0, src_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I2, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I4, I0, src_code + 1);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I1, SIZE_DWORD, SCALE_x4);
-
- if (src_code != dst_code && (src_code + 1) != dst_code)
+ if (src_code != dst_code)
{
- UML_ADD(block, I4, I0, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_STORE(block, (void *)m_core->local_regs, I5, I3, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
}
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
+
+ UML_ADD(block, I0, I0, 4);
+ UML_CALLH(block, *m_mem_read32);
+
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
}
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stwr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I2, 0);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I1, uml::I3, 0);
+
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
}
- else
+ else if (src_code != dst_code)
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I2, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I0, I0, ~3);
UML_CALLH(block, *m_mem_write32);
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stdr(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
+
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I0, uml::I2, 0);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I1, uml::I3, 0);
- if (SRC_GLOBAL)
+ uml::parameter srcfp = uml::I2;
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
+ {
UML_MOV(block, I1, 0);
+ srcfp = uml::I1;
+ }
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
-
- if ((src_code + 1) == SR_REGISTER)
- UML_MOV(block, I2, 0);
- else
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code + 1, SIZE_DWORD, SCALE_x4);
+ {
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
+ UML_MOV(block, srcfp, mem(&m_core->global_regs[src_code + 1]));
+ }
}
else
{
- UML_ADD(block, I4, I3, src_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I4, I3, src_code + 1);
- UML_AND(block, I5, I4, 0x3f);
- UML_LOAD(block, I2, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
+ if (src_code != dst_code)
+ {
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
+ }
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, srcfp, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
- UML_ADD(block, I4, I3, dst_code);
- UML_AND(block, I5, I4, 0x3f);
- UML_LOAD(block, I0, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I0, I0, ~3);
-
UML_CALLH(block, *m_mem_write32);
UML_ADD(block, I0, I0, 4);
- UML_MOV(block, I1, I2);
+ if (srcfp != uml::I1)
+ UML_MOV(block, I1, srcfp);
UML_CALLH(block, *m_mem_write32);
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stwp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I2, 4);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I1, uml::I3, 4);
+
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
}
- else
+ else if (src_code != dst_code)
{
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I0, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I0, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
}
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f);
- UML_LOAD(block, I5, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4);
- UML_AND(block, I0, I5, ~3);
UML_CALLH(block, *m_mem_write32);
- UML_ADD(block, I2, I5, 4);
- UML_STORE(block, (void *)m_core->local_regs, I4, I2, SIZE_DWORD, SCALE_x4);
+
+ if (SrcGlobal || (src_code != dst_code))
+ {
+ UML_ADD(block, I4, I4, 4);
+ UML_STORE(block, (void *)m_core->local_regs, I2, I4, SIZE_DWORD, SCALE_x4);
+ }
+ else
+ {
+ UML_ADD(block, I1, I1, 4);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
+ }
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_stdp(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
const uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
- UML_ADD(block, I2, I3, dst_code);
- UML_AND(block, I4, I2, 0x3f); // I4 = dst_code
- UML_LOAD(block, I0, (void *)m_core->local_regs, I4, SIZE_DWORD, SCALE_x4); // I0 = dreg
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal || (src_code != dst_code))
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I4, uml::I2, 8);
+ else
+ generate_load_address_rp(block, compiler, desc, dst_code, uml::I1, uml::I3, 8);
+
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I1, 0);
else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code]));
UML_CALLH(block, *m_mem_write32);
- if ((src_code + 1) == SR_REGISTER)
- UML_MOV(block, I1, 0);
- else
- UML_LOAD(block, I1, (void *)m_core->global_regs, src_code + 1, SIZE_DWORD, SCALE_x4);
+ UML_ADD(block, I4, I4, 8);
+ UML_STORE(block, (void *)m_core->local_regs, I2, I4, SIZE_DWORD, SCALE_x4);
- UML_ADD(block, I2, I0, 4);
- UML_AND(block, I0, I2, ~3);
- UML_CALLH(block, *m_mem_write32);
- UML_ADD(block, I2, I2, 4);
- UML_STORE(block, (void *)m_core->local_regs, I4, I2, SIZE_DWORD, SCALE_x4);
+ if (src_code != SR_REGISTER)
+ UML_MOV(block, I1, mem(&m_core->global_regs[src_code + 1]));
}
else
{
- int srcf_dst_equal = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
+ if (src_code != dst_code)
+ {
+ UML_ADD(block, I3, I3, src_code);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
+ }
- UML_MOV(block, I6, I0);
- UML_AND(block, I0, I0, ~3);
- UML_ADD(block, I2, I3, src_code);
- UML_AND(block, I5, I2, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
UML_CALLH(block, *m_mem_write32);
- UML_ADD(block, I2, I5, 1);
- UML_AND(block, I5, I2, 0x3f);
- UML_ADD(block, I1, I6, 8);
- UML_CMP(block, I4, I5);
- UML_JMPc(block, uml::COND_E, srcf_dst_equal);
-
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I5, SIZE_DWORD, SCALE_x4);
- UML_JMP(block, done);
-
- UML_LABEL(block, srcf_dst_equal);
- UML_STORE(block, (void *)m_core->local_regs, I4, I1, SIZE_DWORD, SCALE_x4);
+ if (src_code == dst_code)
+ {
+ UML_ADD(block, I1, I1, 8);
+ UML_STORE(block, (void *)m_core->local_regs, I3, I1, SIZE_DWORD, SCALE_x4);
+ }
+ else
+ {
+ UML_ADD(block, I4, I4, 8);
+ UML_STORE(block, (void *)m_core->local_regs, I2, I4, SIZE_DWORD, SCALE_x4);
+ }
- UML_LABEL(block, done);
- UML_ADD(block, I0, I0, 4);
- UML_CALLH(block, *m_mem_write32);
+ if ((src_code + 1) == dst_code)
+ {
+ UML_MOV(block, I1, I4);
+ }
+ else
+ {
+ UML_ADD(block, I3, I3, 1);
+ UML_AND(block, I3, I3, 0x3f);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I3, SIZE_DWORD, SCALE_x4);
+ }
}
+
+ UML_ADD(block, I0, I0, 4);
+ UML_CALLH(block, *m_mem_write32);
}
-template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+template <hyperstone_device::branch_condition Condition, hyperstone_device::condition_set CondSet>
void hyperstone_device::generate_b(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- int done = compiler.m_labelnum++;
- uml::condition_t condition = COND_SET ? uml::COND_Z : uml::COND_NZ;
+ uml::condition_t condition = CondSet ? uml::COND_Z : uml::COND_NZ;
- int skip;
- UML_TEST(block, DRC_SR, condition_masks[CONDITION]);
- UML_JMPc(block, condition, skip = compiler.m_labelnum++);
+ const int skip = compiler.next_label();
+ UML_TEST(block, DRC_SR, condition_masks[Condition]);
+ UML_JMPc(block, condition, skip);
generate_br(block, compiler, desc);
- UML_JMP(block, done);
-
UML_LABEL(block, skip);
- generate_ignore_pcrel(block, desc);
- generate_check_delay_pc(block, compiler, desc);
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
-
- UML_LABEL(block, done);
}
@@ -4815,26 +3857,25 @@ void hyperstone_device::generate_br(drcuml_block &block, compiler_state &compile
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- generate_decode_pcrel(block, desc);
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t target = generate_get_pcrel(desc);
- UML_ADD(block, DRC_PC, DRC_PC, I1);
+ UML_ADD(block, DRC_PC, DRC_PC, target);
UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- generate_branch(block, desc->targetpc, desc);
+ generate_branch(block, compiler, compiler.mode(), desc->targetpc, desc);
// TODO: correct cycle count
}
-template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+template <hyperstone_device::branch_condition Condition, hyperstone_device::condition_set CondSet>
void hyperstone_device::generate_db(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- int skip_jump = compiler.m_labelnum++;
- int done = compiler.m_labelnum++;
+ const int skip_jump = compiler.next_label();
+ const int done = compiler.next_label();
- UML_TEST(block, DRC_SR, condition_masks[CONDITION]);
- if (COND_SET)
+ UML_TEST(block, DRC_SR, condition_masks[Condition]);
+ if (CondSet)
UML_JMPc(block, uml::COND_Z, skip_jump);
else
UML_JMPc(block, uml::COND_NZ, skip_jump);
@@ -4844,8 +3885,6 @@ void hyperstone_device::generate_db(drcuml_block &block, compiler_state &compile
UML_LABEL(block, skip_jump);
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- generate_ignore_pcrel(block, desc);
- generate_check_delay_pc(block, compiler, desc);
UML_LABEL(block, done);
}
@@ -4855,12 +3894,60 @@ void hyperstone_device::generate_dbr(drcuml_block &block, compiler_state &compil
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_2));
- generate_decode_pcrel(block, desc);
- generate_check_delay_pc(block, compiler, desc);
+ const uint32_t target = generate_get_pcrel(desc);
+ UML_ADD(block, I0, DRC_PC, target);
UML_MOV(block, mem(&m_core->delay_slot), 1);
- UML_ADD(block, mem(&m_core->delay_pc), DRC_PC, I1);
- UML_MOV(block, mem(&m_core->intblock), 3);
+ UML_MOV(block, mem(&m_core->delay_pc), I0);
+ UML_MOV(block, mem(&m_core->intblock), 2);
+
+ auto const *delayslot = desc->delay.first();
+ if (delayslot)
+ {
+ assert(desc->targetpc != BRANCH_TARGET_DYNAMIC);
+ assert(!delayslot->next());
+
+ UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
+
+ generate_update_cycles(block);
+
+ UML_MOV(block, mem(&m_core->intblock), 1);
+
+#if E132XS_LOG_DRC_REGS
+ UML_CALLC(block, &c_funcs::dump_registers, this);
+#endif
+
+ // if we are debugging, call the debugger
+ if (debugger_enabled())
+ {
+ //save_fast_iregs(block);
+ UML_DEBUG(block, delayslot->pc);
+ }
+
+ // set the PC map variable
+ UML_MAPVAR(block, MAPVAR_PC, compiler.set_pc(desc->targetpc));
+
+ UML_MOV(block, DRC_PC, I0);
+ UML_MOV(block, mem(&m_core->delay_slot), 0);
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 1);
+
+ if (generate_opcode(block, compiler, delayslot))
+ {
+ UML_MOV(block, mem(&m_core->delay_slot_taken), 0);
+ generate_update_cycles(block);
+ if (desc->flags & OPFLAG_INTRABLOCK_BRANCH)
+ UML_JMP(block, desc->targetpc | 0x80000000);
+ else
+ UML_HASHJMP(block, compiler.mode(), desc->targetpc, *m_nocode);
+ }
+ else
+ {
+ UML_MOV(block, mem(&m_core->arg0), delayslot->opptr.w[0]);
+ UML_CALLC(block, &c_funcs::unimplemented, this);
+ }
+ }
+
+ compiler.m_check_delay = 2;
}
@@ -4869,65 +3956,54 @@ void hyperstone_device::generate_frame(drcuml_block &block, compiler_state &comp
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
const uint16_t op = desc->opptr.w[0];
+ const uint32_t dst_code = (op & 0xf0) >> 4;
- generate_check_delay_pc(block, compiler, desc);
-
- UML_ROLAND(block, I1, DRC_SR, 7, 0x7f);
+ UML_MOV(block, I2, DRC_SR); // I2 = SR
+ UML_ROLAND(block, I1, I2, 32 - FP_SHIFT, 0x7f); // I1 = FP -= Ls
UML_SUB(block, I1, I1, op & 0xf);
- UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000); // SET_FP(GET_FP - SRC_CODE)
- UML_ROLINS(block, DRC_SR, op, 17, 0x01e00000); // SET_FL(DST_CODE)
- UML_AND(block, DRC_SR, DRC_SR, ~M_MASK); // SET_M(0)
-
- UML_MOV(block, I0, mem(&SP));
- UML_MOV(block, I6, I0);
- UML_AND(block, I0, I0, ~3);
- const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ADD(block, I1, I1, dst_code ? dst_code : 16);
- UML_ROLAND(block, I2, I0, 30, 0x7f);
- UML_ADD(block, I2, I2, (64 - 10));
- UML_SUB(block, I3, I2, I1);
- UML_SEXT(block, I3, I3, SIZE_BYTE); // difference = ((SP & 0x1fc) >> 2) + (64 - 10) - ((GET_FP - SRC_CODE) + GET_FL)
-
- int diff_in_range, done;
- UML_CMP(block, I3, -64);
- UML_JMPc(block, uml::COND_L, done = compiler.m_labelnum++);
- UML_CMP(block, I3, 64);
- UML_JMPc(block, uml::COND_L, diff_in_range = compiler.m_labelnum++);
- UML_OR(block, I3, I3, 0xffffff80);
- UML_LABEL(block, diff_in_range);
-
- UML_CMP(block, I0, mem(&UB));
+ UML_ROLAND(block, I0, I1, FP_SHIFT, FP_MASK);
+ UML_OR(block, I0, I0, dst_code << FL_SHIFT); // FL = Ld
+ UML_ROLINS(block, I2, I0, 0, FP_MASK | FL_MASK | M_MASK); // clear M as well
+ UML_MOV(block, DRC_SR, I2); // update SR
+
+ const int done = compiler.next_label();
+ UML_AND(block, I0, mem(&SP), ~uint32_t(3));
+ UML_ADD(block, I1, I1, dst_code ? dst_code : 16); // difference = ((SP & 0x1fc) >> 2) + (64 - 10) - ((GET_FP - SRC_CODE) + GET_FL)
+ UML_ROLAND(block, I3, I0, 30, 0x7f);
+ UML_ADD(block, I3, I3, (64 - 10));
+ UML_SUB(block, I3, I3, I1);
+ UML_SHL(block, I3, I3, 32 - 7); // sign-extend 7-bit value
+ UML_SAR(block, I3, I3, 32 - 7);
+ UML_JMPc(block, uml::COND_NS, done);
+
+ UML_CMP(block, I0, mem(&UB)); // check stack pointer against upper bound
UML_SETc(block, uml::COND_AE, I4);
- UML_CMP(block, I3, 0);
- UML_JMPc(block, uml::COND_GE, done);
- int push_next;
- UML_LABEL(block, push_next = compiler.m_labelnum++);
- UML_ROLAND(block, I2, I0, 30, 0x3f);
- UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x4);
+ const int push_next = compiler.next_label();
+ UML_LABEL(block, push_next);
+ UML_AND(block, I2, I0, 0x3f << 2);
+ UML_LOAD(block, I1, (void *)m_core->local_regs, I2, SIZE_DWORD, SCALE_x1);
UML_CALLH(block, *m_mem_write32);
UML_ADD(block, I0, I0, 4);
- UML_ADD(block, I6, I6, 4);
UML_ADD(block, I3, I3, 1);
+ UML_JMPc(block, uml::COND_S, push_next);
- UML_TEST(block, I3, ~0);
- UML_JMPc(block, uml::COND_NZ, push_next);
+ UML_MOV(block, mem(&SP), I0);
- UML_MOV(block, mem(&SP), I6);
-
- UML_TEST(block, I4, ~0);
- UML_EXHc(block, uml::COND_NZ, *m_exception[EXCEPTION_FRAME_ERROR], 0);
+ UML_TEST(block, I4, ~uint32_t(0));
+ UML_JMPc(block, uml::COND_Z, done);
+ generate_raise_exception(block, compiler, desc, TRAPNO_FRAME_ERROR);
UML_LABEL(block, done);
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
+ UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
- uint16_t op = desc->opptr.w[0];
+ const uint16_t op = desc->opptr.w[0];
uint16_t imm_1 = m_pr16(desc->pc + 2);
int32_t extra_s = 0;
@@ -4941,8 +4017,6 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi
if (imm_1 & 0x4000)
extra_s |= 0xc0000000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 4);
}
else
{
@@ -4950,28 +4024,24 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi
if (imm_1 & 0x4000)
extra_s |= 0xffffc000;
-
- UML_ADD(block, DRC_PC, DRC_PC, 2);
}
UML_MOV(block, I1, extra_s);
- generate_check_delay_pc(block, compiler, desc);
-
const uint32_t src_code = op & 0xf;
uint32_t dst_code = (op & 0xf0) >> 4;
if (!dst_code)
dst_code = 16;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (src_code == SR_REGISTER)
UML_MOV(block, I2, 0);
else
- UML_LOAD(block, I2, (void *)m_core->global_regs, src_code, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I2, mem(&m_core->global_regs[src_code]));
}
else
{
@@ -4981,7 +4051,7 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi
}
UML_AND(block, I4, DRC_PC, ~1);
- UML_ROLINS(block, I4, DRC_SR, 32-S_SHIFT, 1);
+ UML_ROLINS(block, I4, DRC_SR, 32 - S_SHIFT, 1);
UML_ADD(block, I1, I3, dst_code);
UML_AND(block, I6, I1, 0x3f);
@@ -4991,15 +4061,16 @@ void hyperstone_device::generate_call(drcuml_block &block, compiler_state &compi
UML_AND(block, I5, I4, 0x3f);
UML_STORE(block, (void *)m_core->local_regs, I5, DRC_SR, SIZE_DWORD, SCALE_x4);
- UML_ROLINS(block, DRC_SR, I1, 25, 0xfe000000);
- UML_ROLINS(block, DRC_SR, 6, 21, 0x01e00000);
+ UML_ROLINS(block, DRC_SR, I1, FP_SHIFT, FP_MASK);
+ UML_ROLINS(block, DRC_SR, 6, FL_SHIFT, FL_MASK);
UML_AND(block, DRC_SR, DRC_SR, ~M_MASK);
- UML_ADD(block, DRC_PC, I2, extra_s & ~1);
+ UML_ADD(block, I2, I2, extra_s & ~uint32_t(1));
+ UML_MOV(block, DRC_PC, I2);
UML_MOV(block, mem(&m_core->intblock), 2);
- generate_branch(block, desc->targetpc, nullptr);
+ generate_branch(block, compiler, compiler.mode(), uml::I2, nullptr);
//TODO: add interrupt locks, errors, ....
}
@@ -5016,24 +4087,20 @@ void hyperstone_device::generate_trap_op(drcuml_block &block, compiler_state &co
false, false, false, false, true, false, true, false, true, false, true, false, true, false, true, false
};
- uint16_t op = desc->opptr.w[0];
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint8_t trapno = (op & 0xfc) >> 2;
const uint8_t code = ((op & 0x300) >> 6) | (op & 0x03);
UML_TEST(block, DRC_SR, conditions[code]);
- int skip_trap = compiler.m_labelnum++;
+ const int skip_trap = compiler.next_label();
if (trap_if_set[code])
UML_JMPc(block, uml::COND_Z, skip_trap);
else
UML_JMPc(block, uml::COND_NZ, skip_trap);
- UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT), 0, ILC_MASK);
- generate_get_trap_addr(block, compiler.m_labelnum, trapno);
- generate_trap_exception_or_int<IS_TRAP>(block);
+ UML_ROLINS(block, DRC_SR, ((desc->length >> 1) << ILC_SHIFT) | P_MASK, 0, ILC_MASK | P_MASK);
+ generate_trap_exception_or_int<IS_TRAP>(block, compiler.m_labelnum, trapno);
UML_LABEL(block, skip_trap);
}
@@ -5042,17 +4109,13 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
{
UML_MOV(block, I7, mem(&m_core->clock_cycles_1));
- uint16_t op = desc->opptr.w[0];
-
- uint16_t func = m_pr16(desc->pc + 2);
- UML_ADD(block, DRC_PC, DRC_PC, 2);
-
- generate_check_delay_pc(block, compiler, desc);
-
+ const uint16_t op = desc->opptr.w[0];
const uint32_t src_code = op & 0xf;
const uint32_t dst_code = (op & 0xf0) >> 4;
- UML_ROLAND(block, I3, DRC_SR, 7, 0x7f);
+ const uint16_t func = m_pr16(desc->pc + 2);
+
+ UML_ROLAND(block, I3, DRC_SR, 32 - FP_SHIFT, 0x7f);
UML_ADD(block, I2, I3, src_code);
UML_AND(block, I2, I2, 0x3f);
@@ -5067,60 +4130,51 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
// signed or unsigned multiplication, single word product
case EMUL:
case EMUL_N: // used in "N" type cpu
- {
UML_MULU(block, I2, I3, I0, I1);
- UML_STORE(block, (void *)m_core->global_regs, 15, I2, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[15]), I2);
break;
- }
case EMULU: // unsigned multiplication, double word product
case EMULS: // signed multiplication, double word product
- {
if (func == EMULU)
UML_MULU(block, I2, I3, I0, I1);
else
UML_MULS(block, I2, I3, I0, I1);
- UML_STORE(block, (void *)m_core->global_regs, 14, I3, SIZE_DWORD, SCALE_x4);
- UML_STORE(block, (void *)m_core->global_regs, 15, I2, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[14]), I3);
+ UML_MOV(block, mem(&m_core->global_regs[15]), I2);
break;
- }
case EMAC: // signed multiply/add, single word product sum
case EMSUB: // signed multiply/substract, single word product difference
- {
UML_MULS(block, I2, I3, I0, I1);
- UML_LOAD(block, I3, (void *)m_core->global_regs, 15, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I3, mem(&m_core->global_regs[15]));
if (func == EMAC)
UML_ADD(block, I3, I3, I2);
else
UML_SUB(block, I3, I3, I2);
- UML_STORE(block, (void *)m_core->global_regs, 15, I3, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[15]), I3);
break;
- }
case EMACD: // signed multiply/add, double word product sum
case EMSUBD: // signed multiply/substract, double word product difference
- {
UML_DSEXT(block, I0, I0, SIZE_DWORD);
UML_DSEXT(block, I1, I1, SIZE_DWORD);
UML_DMULS(block, I2, I3, I0, I1);
- UML_LOAD(block, I3, (void *)m_core->global_regs, 14, SIZE_DWORD, SCALE_x4);
- UML_LOAD(block, I4, (void *)m_core->global_regs, 15, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I3, mem(&m_core->global_regs[14]));
+ UML_MOV(block, I4, mem(&m_core->global_regs[15]));
UML_DSHL(block, I3, I3, 32);
UML_DOR(block, I3, I3, I4);
if (func == EMACD)
UML_DADD(block, I3, I3, I2);
else
UML_DSUB(block, I3, I3, I2);
- UML_STORE(block, (void *)m_core->global_regs, 15, I3, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[15]), I3);
UML_DSHR(block, I3, I3, 32);
- UML_STORE(block, (void *)m_core->global_regs, 14, I3, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[14]), I3);
break;
- }
// signed half-word multiply/add, single word product sum
case EHMAC:
- {
UML_AND(block, I2, I0, 0x0000ffff);
UML_AND(block, I3, I1, 0x0000ffff);
UML_MULS(block, I2, I3, I2, I3);
@@ -5128,65 +4182,52 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
UML_SHR(block, I1, I1, 16);
UML_MULS(block, I0, I1, I0, I1);
UML_ADD(block, I0, I0, I2);
- UML_LOAD(block, I1, (void *)m_core->global_regs, 15, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, I1, mem(&m_core->global_regs[15]));
UML_ADD(block, I0, I0, I1);
- UML_STORE(block, (void *)m_core->global_regs, 15, I0, SIZE_DWORD, SCALE_x4);
+ UML_MOV(block, mem(&m_core->global_regs[15]), I0);
break;
- }
// signed half-word multiply/add, double word product sum
case EHMACD:
- {
- printf("Unimplemented extended opcode, EHMACD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHMACD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
// half-word complex multiply
case EHCMULD:
- {
- printf("Unimplemented extended opcode, EHCMULD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHCMULD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
// half-word complex multiply/add
case EHCMACD:
- {
- printf("Unimplemented extended opcode, EHCMACD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHCMACD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
- // half-word (complex) add/substract
+ // half-word (complex) add/subtract
// Ls is not used and should denote the same register as Ld
case EHCSUMD:
- {
- printf("Unimplemented extended opcode, EHCSUMD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHCSUMD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
- // half-word (complex) add/substract with fixed point adjustment
+ // half-word (complex) add/subtract with fixed point adjustment
// Ls is not used and should denote the same register as Ld
case EHCFFTD:
- {
- printf("Unimplemented extended opcode, EHCFFTD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHCFFTD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
- // half-word (complex) add/substract with fixed point adjustment and shift
+ // half-word (complex) add/subtract with fixed point adjustment and shift
// Ls is not used and should denote the same register as Ld
case EHCFFTSD:
- {
- printf("Unimplemented extended opcode, EHCFFTSD, PC = %08x\n", desc->pc);
+ osd_printf_error("Unimplemented extended opcode, EHCFFTSD, PC = %08x\n", desc->pc);
fatalerror(" ");
break;
- }
default:
- printf("Unknown extended opcode (%04x), PC = %08x\n", func, desc->pc);
+ osd_printf_error("Unknown extended opcode (%04x), PC = %08x\n", func, desc->pc);
fatalerror(" ");
break;
}
@@ -5195,15 +4236,16 @@ void hyperstone_device::generate_extend(drcuml_block &block, compiler_state &com
void hyperstone_device::generate_reserved(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- printf("Unimplemented: generate_reserved (%08x)\n", desc->pc);
+ osd_printf_error("Unimplemented: generate_reserved (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
void hyperstone_device::generate_do(drcuml_block &block, compiler_state &compiler, const opcode_desc *desc)
{
- printf("Unimplemented: generate_do (%08x)\n", desc->pc);
+ osd_printf_error("Unimplemented: generate_do (%08x)\n", desc->pc);
fflush(stdout);
fatalerror(" ");
}
+#endif // MAME_CPU_E132XS_E132XSDRC_OPS_HXX
diff --git a/src/devices/cpu/e132xs/e132xsfe.cpp b/src/devices/cpu/e132xs/e132xsfe.cpp
index 602f724269f..729bdad1a9f 100644
--- a/src/devices/cpu/e132xs/e132xsfe.cpp
+++ b/src/devices/cpu/e132xs/e132xsfe.cpp
@@ -12,8 +12,6 @@
#include "e132xsfe.h"
#include "32xsdefs.h"
-#define FE_FP ((m_cpu->m_core->global_regs[1] & 0xfe000000) >> 25)
-#define FE_FL (m_cpu->m_core->fl_lut[((m_cpu->m_core->global_regs[1] >> 21) & 0xf)])
#define FE_DST_CODE ((op & 0xf0) >> 4)
#define FE_SRC_CODE (op & 0x0f)
#define SR_CODE (1 << 1)
@@ -22,25 +20,25 @@
INSTRUCTION PARSERS
***************************************************************************/
-e132xs_frontend::e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
- : drc_frontend(*e132xs, window_start, window_end, max_sequence)
- , m_cpu(e132xs)
+e132xs_frontend::e132xs_frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence)
+ : drc_frontend(cpu, window_start, window_end, max_sequence)
+ , m_cpu(cpu)
{
}
inline uint16_t e132xs_frontend::read_word(opcode_desc &desc)
{
- return m_cpu->m_pr16(desc.physpc);
+ return m_cpu.m_pr16(desc.physpc);
}
inline uint16_t e132xs_frontend::read_imm1(opcode_desc &desc)
{
- return m_cpu->m_pr16(desc.physpc + 2);
+ return m_cpu.m_pr16(desc.physpc + 2);
}
inline uint16_t e132xs_frontend::read_imm2(opcode_desc &desc)
{
- return m_cpu->m_pr16(desc.physpc + 4);
+ return m_cpu.m_pr16(desc.physpc + 4);
}
inline uint32_t e132xs_frontend::read_ldstxx_imm(opcode_desc &desc)
@@ -69,15 +67,13 @@ inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op)
{
static const int32_t immediate_values[16] =
{
- 16, 0, 0, 0, 32, 64, 128, int32_t(0x80000000),
+ 16, 0, 0, 0, 32, 64, 128, int32_t(uint32_t(0x80000000)),
-8, -7, -6, -5, -4, -3, -2, -1
};
- uint8_t nybble = op & 0xf;
+ const uint8_t nybble = op & 0xf;
switch (nybble)
{
- case 0:
- return 16;
case 1:
desc.length = 6;
return (read_imm1(desc) << 16) | read_imm2(desc);
@@ -88,7 +84,7 @@ inline uint32_t e132xs_frontend::read_limm(opcode_desc &desc, uint16_t op)
desc.length = 4;
return 0xffff0000 | read_imm1(desc);
default:
- return immediate_values[nybble];
+ return uint32_t(immediate_values[nybble]);
}
}
@@ -96,13 +92,10 @@ inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op)
{
if (op & 0x80)
{
- uint16_t next = read_imm1(desc);
-
desc.length = 4;
- int32_t offset = (op & 0x7f) << 16;
- offset |= (next & 0xfffe);
-
+ const uint16_t next = read_imm1(desc);
+ int32_t offset = ((op & 0x7f) << 16) | (next & 0xfffe);
if (next & 1)
offset |= 0xff800000;
@@ -113,6 +106,7 @@ inline int32_t e132xs_frontend::decode_pcrel(opcode_desc &desc, uint16_t op)
int32_t offset = op & 0x7e;
if (op & 1)
offset |= 0xffffff80;
+
return offset;
}
}
@@ -154,19 +148,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.length = 2;
desc.delayslots = 0;
- const uint32_t fp = FE_FP;
const uint32_t gdst_code = FE_DST_CODE;
const uint32_t gdstf_code = gdst_code + 1;
const uint32_t gsrc_code = FE_SRC_CODE;
const uint32_t gsrcf_code = gsrc_code + 1;
- const uint32_t ldst_code = (gdst_code + fp) & 0x1f;
- const uint32_t ldstf_code = (gdstf_code + fp) & 0x1f;
- const uint32_t lsrc_code = (gsrc_code + fp) & 0x1f;
- const uint32_t lsrcf_code = (gsrcf_code + fp) & 0x1f;
- const uint32_t ldst_group = BIT(FE_DST_CODE + fp, 5) + 1;
- const uint32_t ldstf_group = BIT(FE_DST_CODE + fp + 1, 5) + 1;
- const uint32_t lsrc_group = BIT(FE_SRC_CODE + fp, 5) + 1;
- const uint32_t lsrcf_group = BIT(FE_SRC_CODE + fp + 1, 5) + 1;
switch (op >> 8)
{
@@ -178,19 +163,15 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x01: // chk global,local
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
break;
case 0x02: // chk local,global
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regin[0] |= 1 << gsrc_code;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
break;
case 0x03: // chk local,local
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
break;
case 0x04: // movd global,global
@@ -198,27 +179,21 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regin[0] |= 1 << gsrcf_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdstf_code;
- if (gdst_code == 0)
+ if (gdst_code == PC_REGISTER)
{
- desc.regout[1] = 0xffffffff;
- desc.regout[2] = 0xffffffff;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
- desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
+ desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_CAN_CHANGE_MODES;
}
desc.regout[0] |= SR_CODE;
break;
case 0x05: // movd global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[lsrcf_group] |= 1 << lsrcf_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdstf_code;
if (gdst_code == 0)
{
- desc.regout[1] = 0xffffffff;
- desc.regout[2] = 0xffffffff;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
- desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
+ desc.flags |= OPFLAG_READS_MEMORY | OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
}
desc.regout[0] |= SR_CODE;
break;
@@ -226,16 +201,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
desc.regin[0] |= 1 << gsrcf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x07: // movd local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[lsrcf_group] |= 1 << lsrcf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x08: // divu global,global
@@ -252,7 +221,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x0d: // divs global,local
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regin[0] |= 1 << gdstf_code;
desc.regout[0] |= 1 << gdst_code;
@@ -264,21 +232,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[ldstf_group] |= 1 << ldstf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x0b: // divu local,local
case 0x0f: // divs local,local
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[ldstf_group] |= 1 << ldstf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x10: // xm global,global
@@ -290,7 +249,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x11: // xm global,local
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
break;
@@ -298,14 +256,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
break;
case 0x13: // xm local,local
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
break;
case 0x14: // mask global,global
@@ -316,7 +271,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
case 0x15: // mask global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
@@ -324,14 +278,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x16: // mask local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
break;
case 0x17: // mask local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
break;
@@ -346,7 +297,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x19: // sum global,local
case 0x1d: // sums global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
@@ -356,7 +306,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x1e: // sums local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
if (op & 0x4 && gsrc_code != SR_REGISTER) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -364,8 +313,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x1b: // sum local,local
case 0x1f: // sums local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
if (op & 0x4) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -379,7 +326,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x21: // cmp global,local
case 0x31: // cmpb global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
break;
@@ -387,14 +333,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x32: // cmpb local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x23: // cmp local,local
case 0x33: // cmpb local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x24: // mov global,global
@@ -406,7 +349,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ if (gsrc_code != PC_REGISTER)
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ else
+ desc.targetpc = desc.physpc + desc.length;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
else if (gdst_code == 5) // TPR_REGISTER & 0xf
@@ -416,7 +362,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
case 0x25: // mov global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -434,13 +379,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
desc.regin[0] |= 1 << (gsrc_code + 16);
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x27: // mov local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x28: // add global,global
@@ -454,7 +396,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ if (gsrc_code != PC_REGISTER)
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ else if (((op >> 8) == 0x28) || ((op >> 8) == 0x2c))
+ desc.targetpc = (desc.physpc + desc.length) << 1;
+ else
+ desc.targetpc = 0;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
@@ -463,7 +410,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x49: // sub global,local
case 0x4d: // subs global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
@@ -480,8 +426,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x4e: // subs local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs
break;
@@ -490,9 +434,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x4b: // sub local,local
case 0x4f: // subs local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // adds, subs
break;
@@ -506,7 +447,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regout[0] |= SR_CODE;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ if (gsrc_code != PC_REGISTER)
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ else if (((op >> 8) == 0x34) || ((op >> 8) == 0x3c))
+ desc.targetpc = 0;
+ else
+ desc.targetpc = desc.physpc + desc.length;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
@@ -515,7 +461,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x3d: // xor global,local
case 0x55: // and global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
@@ -531,8 +476,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x56: // and local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x37: // andn local,local
@@ -540,9 +483,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x3f: // xor local,local
case 0x57: // and local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x40: // subc global,global
@@ -561,7 +501,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x41: // subc global,local
case 0x51: // addc global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
@@ -575,16 +514,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x52: // addc local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x43: // subc local,local
case 0x53: // addc local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x44: // not global,global
@@ -594,14 +528,18 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regout[0] |= SR_CODE;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ if (gsrc_code != PC_REGISTER)
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ else if ((op >> 8) == 0x44)
+ desc.targetpc = ~uint32_t(desc.physpc + desc.length) & ~uint32_t(1);
+ else
+ desc.targetpc = uint32_t(-int32_t(desc.physpc + desc.length)) & ~uint32_t(1);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
case 0x45: // not global,local
case 0x59: // neg global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
if (gdst_code == PC_REGISTER)
@@ -614,14 +552,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x5a: // neg local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x47: // not local,local
case 0x5b: // neg local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x5c: // negs global,global
@@ -631,13 +566,15 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ if (gsrc_code != PC_REGISTER)
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ else
+ desc.targetpc = uint32_t(-int32_t(desc.physpc + desc.length)) & ~uint32_t(1);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
case 0x5d: // negs global,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
@@ -650,14 +587,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x5e: // negs local,global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
break;
case 0x5f: // negs local,local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
break;
@@ -675,13 +609,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x62: // cmpi local,simm
case 0x72: // cmpbi local,simm
desc.regin[0] |= SR_CODE;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x63: // cmpi local,limm
case 0x73: // cmpbi local,limm
desc.regin[0] |= SR_CODE;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = hyperstone_device::imm_length(op) << 1;
break;
@@ -693,7 +625,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = op & 0xf;
+ desc.targetpc = op & 0xe;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
else if (gdst_code == 5) // TPR_REGISTER & 0xf
@@ -710,7 +642,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = read_limm(desc, op);
+ desc.targetpc = read_limm(desc, op) & ~uint32_t(1);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
else if (gdst_code == 5) // TPR_REGISTER & 0xf
@@ -720,12 +652,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
case 0x66: // movi local,simm
desc.regin[0] |= SR_CODE;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x67: // movi local,limm
desc.regin[0] |= SR_CODE;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = hyperstone_device::imm_length(op) << 1;
break;
@@ -738,7 +668,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ desc.targetpc = desc.physpc + desc.length + (op & 0xe);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
@@ -752,29 +682,45 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = desc.pc + desc.length + read_limm(desc, op);
+ desc.targetpc = desc.pc + desc.length + (read_limm(desc, op) & ~uint32_t(1));
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
case 0x6a: // addi local,simm
case 0x6e: // addsi local,simm
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi
break;
case 0x6b: // addi local,limm
case 0x6f: // addsi local,limm
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = hyperstone_device::imm_length(op) << 1;
if (op & 0x04) desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION; // addsi
break;
case 0x74: // andni global,simm
+ desc.regin[0] |= SR_CODE;
+ desc.regin[0] |= 1 << gdst_code;
+ desc.regout[0] |= 1 << gdst_code;
+ desc.regout[0] |= SR_CODE;
+ if (gdst_code == PC_REGISTER)
+ {
+ desc.targetpc = (desc.physpc + desc.length) & ~uint32_t(op & 0xf);
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ }
+ break;
case 0x78: // ori global,simm
+ desc.regin[0] |= SR_CODE;
+ desc.regin[0] |= 1 << gdst_code;
+ desc.regout[0] |= 1 << gdst_code;
+ desc.regout[0] |= SR_CODE;
+ if (gdst_code == PC_REGISTER)
+ {
+ desc.targetpc = (desc.physpc + desc.length) | (op & 0xe);
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ }
+ break;
case 0x7c: // xori global,simm
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
@@ -782,12 +728,34 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regout[0] |= SR_CODE;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ desc.targetpc = (desc.physpc + desc.length) ^ (op & 0xe);
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
case 0x75: // andni global,limm
+ desc.regin[0] |= SR_CODE;
+ desc.regin[0] |= 1 << gdst_code;
+ desc.regout[0] |= 1 << gdst_code;
+ desc.regout[0] |= SR_CODE;
+ desc.length = hyperstone_device::imm_length(op) << 1;
+ if (gdst_code == PC_REGISTER)
+ {
+ desc.targetpc = (desc.physpc + desc.length) & ~read_limm(desc, op);
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ }
+ break;
case 0x79: // ori global,limm
+ desc.regin[0] |= SR_CODE;
+ desc.regin[0] |= 1 << gdst_code;
+ desc.regout[0] |= 1 << gdst_code;
+ desc.regout[0] |= SR_CODE;
+ desc.length = hyperstone_device::imm_length(op) << 1;
+ if (gdst_code == PC_REGISTER)
+ {
+ desc.targetpc = (desc.physpc + desc.length) | (read_limm(desc, op) & ~uint32_t(1));
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ }
+ break;
case 0x7d: // xori global,limm
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
@@ -796,7 +764,7 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.length = hyperstone_device::imm_length(op) << 1;
if (gdst_code == PC_REGISTER)
{
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
+ desc.targetpc = (desc.physpc + desc.length) ^ (read_limm(desc, op) & ~uint32_t(1));
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
}
break;
@@ -804,16 +772,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x7a: // ori local,simm
case 0x7e: // xori local,simm
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x77: // andni local,limm
case 0x7b: // ori local,limm
case 0x7f: // xori local,limm
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
desc.length = hyperstone_device::imm_length(op) << 1;
break;
@@ -821,17 +785,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x84: case 0x85: // sardi
case 0x88: case 0x89: // shldi
desc.regin[0] |= SR_CODE;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x82: // shrd
case 0x86: // sard
case 0x8a: // shld
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0x83: // shr
@@ -839,16 +798,12 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x8b: // shl
case 0x8f: // rol
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0x8c: case 0x8d: // reserved
return false;
case 0x8e: // testlz
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
break;
case 0x90: // ldxx1 global,global
{
@@ -871,12 +826,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x91: // ldxx1 global,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_READS_MEMORY;
@@ -893,7 +846,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= 1 << gsrc_code;
if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code;
@@ -904,12 +856,9 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x93: // ldxx1 local,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_READS_MEMORY;
@@ -937,13 +886,11 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x95: // ldxx2 global,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_READS_MEMORY;
@@ -960,8 +907,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= 1 << gsrc_code;
if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[0] |= 1 << gsrcf_code;
@@ -972,13 +917,9 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x97: // ldxx2 local,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regout[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_READS_MEMORY;
@@ -1000,12 +941,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x99: // stxx1 global,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_WRITES_MEMORY;
@@ -1017,7 +956,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regin[0] |= 1 << gsrc_code;
if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code;
@@ -1028,12 +966,9 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x9b: // stxx1 local,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_WRITES_MEMORY;
@@ -1056,12 +991,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x9d: // stxx2 global,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gdst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code;
desc.regout[0] |= 1 << gdst_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
@@ -1074,10 +1007,8 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regin[0] |= 1 << gsrc_code;
if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[0] |= 1 << gsrcf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_WRITES_MEMORY;
@@ -1086,13 +1017,9 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0x9f: // stxx2 local,local
{
const uint16_t imm1 = read_imm1(desc);
- const uint32_t extra_s = read_ldstxx_imm(desc);
+ [[maybe_unused]] const uint32_t extra_s = read_ldstxx_imm(desc);
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- if ((imm1 & 0x3000) == 0x3000 && (extra_s & 2)) desc.regin[lsrcf_group] |= 1 << lsrcf_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.length = (imm1 & 0x8000) ? 6 : 4;
desc.flags |= OPFLAG_WRITES_MEMORY;
@@ -1115,8 +1042,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0xaa: // shli local (lo n)
case 0xab: // shli local (hi n)
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0xac: case 0xad: case 0xae: case 0xaf: // reserved
@@ -1131,7 +1056,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
case 0xb1: // mulu global,local
case 0xb5: // muls global,local
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdstf_code;
@@ -1140,17 +1064,10 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0xb2: // mulu local,global
case 0xb6: // muls local,global
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0xb3: // mulu local,local
case 0xb7: // muls local,local
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.regout[0] |= SR_CODE;
break;
case 0xb8: // set global (lo n)
@@ -1160,7 +1077,6 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
break;
case 0xba: // set local (lo n)
case 0xbb: // set local (hi n)
- desc.regout[ldst_group] |= 1 << ldst_code;
break;
case 0xbc: // mul global,global
desc.regin[0] |= 1 << gsrc_code;
@@ -1169,50 +1085,30 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.regout[0] |= SR_CODE;
break;
case 0xbd: // muls global,local
- desc.regin[lsrc_group] |= 1 << lsrc_code;
desc.regin[0] |= 1 << gdst_code;
desc.regout[0] |= 1 << gdst_code;
desc.regout[0] |= SR_CODE;
break;
case 0xbe: // muls local,global
desc.regin[0] |= 1 << gsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0xbf: // mulu local,local
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= SR_CODE;
break;
case 0xc0: case 0xc1: case 0xc2: case 0xc3: // software
case 0xc4: case 0xc5: case 0xc6: case 0xc7: // software
case 0xc8: case 0xc9: case 0xca: case 0xcb: // software
case 0xcc: case 0xcd: // software
- {
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[lsrcf_group] |= 1 << lsrcf_code;
-
- const uint32_t reg = FE_FP + FE_FL;
- desc.regout[1 + (((reg + 0) & 0x20) >> 5)] |= 1 << ((reg + 0) & 0x1f);
- desc.regout[1 + (((reg + 1) & 0x20) >> 5)] |= 1 << ((reg + 1) & 0x1f);
- desc.regout[1 + (((reg + 2) & 0x20) >> 5)] |= 1 << ((reg + 2) & 0x1f);
- desc.regout[1 + (((reg + 3) & 0x20) >> 5)] |= 1 << ((reg + 3) & 0x1f);
- desc.regout[1 + (((reg + 4) & 0x20) >> 5)] |= 1 << ((reg + 4) & 0x1f);
-
desc.regout[0] |= SR_CODE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
- desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CHANGE_MODES;
break;
- }
case 0xce: // extend - 4 bytes
desc.regin[0] |= SR_CODE;
desc.regin[0] |= (3 << 14); // global regs 14, 15
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= (3 << 14); // global regs 14, 15
desc.length = 4;
break;
@@ -1221,109 +1117,83 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0xd0: // ldwr global
case 0xd4: // ldwp global
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= 1 << gsrc_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_READS_MEMORY;
break;
case 0xd1: // ldwr local
case 0xd5: // ldwp local
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_READS_MEMORY;
break;
case 0xd2: // lddr global
case 0xd6: // lddp global
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regout[0] |= 1 << gsrc_code;
desc.regout[0] |= 1 << gsrcf_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_READS_MEMORY;
break;
case 0xd3: // lddr local
case 0xd7: // lddp local
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regout[lsrc_group] |= 1 << lsrc_code;
- desc.regout[lsrcf_group] |= 1 << lsrcf_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_READS_MEMORY;
break;
case 0xd8: // stwr global
case 0xdc: // stwp global
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regin[0] |= 1 << gsrc_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_WRITES_MEMORY;
break;
case 0xd9: // stwr local
case 0xdd: // stwp local
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_WRITES_MEMORY;
break;
case 0xda: // stdr global
case 0xde: // stdp global
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
desc.regin[0] |= 1 << gsrc_code;
desc.regin[0] |= 1 << gsrcf_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_WRITES_MEMORY;
break;
case 0xdb: // stdr local
case 0xdf: // stdp local
desc.regin[0] |= SR_CODE;
- desc.regin[ldst_group] |= 1 << ldst_code;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regin[lsrcf_group] |= 1 << lsrcf_code;
- if (op & 0x04) desc.regout[ldst_group] |= 1 << ldst_code;
desc.flags |= OPFLAG_WRITES_MEMORY;
break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3: // dbv, dbnv, dbe, dbne - could be 4 bytes (pcrel)
case 0xe4: case 0xe5: case 0xe6: case 0xe7: // dbc, dbnc, dbse, dbht - could be 4 bytes (pcrel)
case 0xe8: case 0xe9: case 0xea: case 0xeb: // dbn, dbnn, dblt, dbgt - could be 4 bytes (pcrel)
- decode_pcrel(desc, op);
desc.regin[0] |= SR_CODE;
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
- desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
+ desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.delayslots = 1;
desc.length = (op & 0x80) ? 4 : 2;
+ desc.targetpc = desc.physpc + desc.length + decode_pcrel(desc, op);
break;
case 0xec: // dbr
- decode_pcrel(desc, op);
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.delayslots = 1;
desc.length = (op & 0x80) ? 4 : 2;
+ desc.targetpc = desc.physpc + desc.length + decode_pcrel(desc, op);
break;
case 0xed: // frame
desc.regin[0] |= SR_CODE;
- desc.regin[1] = 0xffffffff;
- desc.regin[2] = 0xffffffff;
desc.regout[0] |= SR_CODE;
- desc.flags |= OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE;
+ desc.flags |= OPFLAG_WRITES_MEMORY | OPFLAG_CAN_CAUSE_EXCEPTION;
break;
case 0xee: // call global
desc.regin[0] |= SR_CODE;
desc.regin[0] |= 1 << gsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
+ if (gsrc_code == PC_REGISTER)
+ desc.targetpc = desc.physpc + desc.length + (decode_call(desc) & ~uint32_t(1));
+ else if (gsrc_code == SR_REGISTER)
+ desc.targetpc = decode_call(desc) & ~uint32_t(1);
+ else
+ desc.targetpc = BRANCH_TARGET_DYNAMIC;
break;
case 0xef: // call local
desc.regin[0] |= SR_CODE;
- desc.regin[lsrc_group] |= 1 << lsrc_code;
- desc.regout[ldst_group] |= 1 << ldst_code;
- desc.regout[ldstf_group] |= 1 << ldstf_code;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.length = (read_imm1(desc) & 0x8000) ? 6 : 4;
@@ -1331,24 +1201,23 @@ bool e132xs_frontend::describe(opcode_desc &desc, const opcode_desc *prev)
case 0xf0: case 0xf1: case 0xf2: case 0xf3: // bv, bnv, be, bne
case 0xf4: case 0xf5: case 0xf6: case 0xf7: // bc, bnc, bse, bht
case 0xf8: case 0xf9: case 0xfa: case 0xfb: // bn, bnn, blt, bgt
- decode_pcrel(desc, op);
desc.regin[0] |= SR_CODE;
- desc.targetpc = BRANCH_TARGET_DYNAMIC;
desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH;
desc.length = (op & 0x80) ? 4 : 2;
+ desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op);
break;
case 0xfc: // br
- {
- int32_t offset = decode_pcrel(desc, op);
- desc.targetpc = (desc.pc + desc.length) + offset;
desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE;
desc.length = (op & 0x80) ? 4 : 2;
+ desc.targetpc = desc.pc + desc.length + decode_pcrel(desc, op);
break;
- }
case 0xfd: case 0xfe: case 0xff: // trap
desc.regin[0] |= SR_CODE;
desc.targetpc = BRANCH_TARGET_DYNAMIC;
- desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
+ if ((((op & 0x300) >> 6) | (op & 0x03)) == 15)
+ desc.flags |= OPFLAG_IS_UNCONDITIONAL_BRANCH | OPFLAG_END_SEQUENCE | OPFLAG_CAN_CAUSE_EXCEPTION;
+ else
+ desc.flags |= OPFLAG_IS_CONDITIONAL_BRANCH | OPFLAG_CAN_CAUSE_EXCEPTION;
break;
}
return true;
diff --git a/src/devices/cpu/e132xs/e132xsfe.h b/src/devices/cpu/e132xs/e132xsfe.h
index 1cac61a08cd..c71849228e8 100644
--- a/src/devices/cpu/e132xs/e132xsfe.h
+++ b/src/devices/cpu/e132xs/e132xsfe.h
@@ -11,7 +11,7 @@
class e132xs_frontend : public drc_frontend
{
public:
- e132xs_frontend(hyperstone_device *e132xs, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
+ e132xs_frontend(hyperstone_device &cpu, uint32_t window_start, uint32_t window_end, uint32_t max_sequence);
void flush();
protected:
@@ -19,15 +19,15 @@ protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
private:
- inline uint16_t read_word(opcode_desc &desc);
- inline uint16_t read_imm1(opcode_desc &desc);
- inline uint16_t read_imm2(opcode_desc &desc);
- inline uint32_t read_ldstxx_imm(opcode_desc &desc);
- inline uint32_t read_limm(opcode_desc &desc, uint16_t op);
- inline int32_t decode_pcrel(opcode_desc &desc, uint16_t op);
- inline int32_t decode_call(opcode_desc &desc);
+ uint16_t read_word(opcode_desc &desc);
+ uint16_t read_imm1(opcode_desc &desc);
+ uint16_t read_imm2(opcode_desc &desc);
+ uint32_t read_ldstxx_imm(opcode_desc &desc);
+ uint32_t read_limm(opcode_desc &desc, uint16_t op);
+ int32_t decode_pcrel(opcode_desc &desc, uint16_t op);
+ int32_t decode_call(opcode_desc &desc);
- hyperstone_device *m_cpu;
+ hyperstone_device &m_cpu;
};
-#endif /* MAME_CPU_E132XS_E132XSFE_H */
+#endif // MAME_CPU_E132XS_E132XSFE_H
diff --git a/src/devices/cpu/e132xs/e132xsop.hxx b/src/devices/cpu/e132xs/e132xsop.hxx
index 03a35898a9d..c570f9f5c6c 100644
--- a/src/devices/cpu/e132xs/e132xsop.hxx
+++ b/src/devices/cpu/e132xs/e132xsop.hxx
@@ -1,19 +1,19 @@
// license:BSD-3-Clause
// copyright-holders:Pierpaolo Prazzoli
-template <hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal>
uint64_t hyperstone_device::get_double_word(uint8_t dst_code, uint8_t dstf_code) const
{
- if(DST_GLOBAL)
+ if (DstGlobal)
return (uint64_t)m_core->global_regs[dst_code] << 32 | m_core->global_regs[dstf_code];
else
return (uint64_t)m_core->local_regs[dst_code] << 32 | m_core->local_regs[dstf_code];
}
-template <hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::set_double_word(uint8_t dst_code, uint8_t dstf_code, uint64_t val)
{
- if(DST_GLOBAL)
+ if (DstGlobal)
{
m_core->global_regs[dst_code] = (uint32_t)(val >> 32);
m_core->global_regs[dstf_code] = (uint32_t)val;
@@ -25,48 +25,48 @@ void hyperstone_device::set_double_word(uint8_t dst_code, uint8_t dstf_code, uin
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_chk()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dreg = DST_GLOBAL ? m_core->global_regs[DST_CODE] : m_core->local_regs[(DST_CODE + fp) & 0x3f];
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dreg = DstGlobal ? m_core->global_regs[DST_CODE] : m_core->local_regs[(DST_CODE + fp) & 0x3f];
- if (SRC_GLOBAL && (src_code == SR_REGISTER))
+ if (SrcGlobal && (src_code == SR_REGISTER))
{
if (dreg == 0)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
else
{
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- if ((SRC_GLOBAL && (src_code == PC_REGISTER)) ? (dreg >= sreg) : (dreg > sreg))
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ if ((SrcGlobal && (src_code == PC_REGISTER)) ? (dreg >= sreg) : (dreg > sreg))
+ execute_exception(TRAPNO_RANGE_ERROR);
}
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_movd()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dstf_code = DST_GLOBAL ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dstf_code = DstGlobal ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- const uint32_t sregf = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code];
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t sregf = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code];
- if (DST_GLOBAL && (dst_code == PC_REGISTER))
+ if (DstGlobal && (dst_code == PC_REGISTER))
{
// RET instruction
- if (SRC_GLOBAL && src_code < 2)
+ if (SrcGlobal && src_code < 2)
{
LOG("Denoted PC or SR in RET instruction. PC = %08X\n", PC);
m_core->icount -= m_core->clock_cycles_1;
@@ -76,24 +76,14 @@ void hyperstone_device::hyperstone_movd()
const uint32_t old_s = SR & S_MASK;
const uint32_t old_l = SR & L_MASK;
PC = sreg & ~1;
- SR = (sregf & 0xffe3ffff) | ((sreg & 0x01) << 18);
- if (m_core->intblock < 1)
- m_core->intblock = 1;
+ SR = (sregf & ~(ILC_MASK | S_MASK)) | ((sreg & 0x01) << S_SHIFT);
const uint32_t new_s = SR & S_MASK;
const uint32_t new_l = SR & L_MASK;
- if( (!old_s && new_s) || (!new_s && !old_l && new_l))
- execute_exception(get_trap_addr(TRAPNO_PRIVILEGE_ERROR));
+ if ((!old_s && new_s) || (!new_s && !old_l && new_l))
+ execute_exception(TRAPNO_PRIVILEGE_ERROR);
- int8_t difference = GET_FP - ((SP & 0x1fc) >> 2);
-
- /* convert to 8 bits */
- if(difference > 63)
- difference = (int8_t)(difference|0x80);
- else if( difference < -64 )
- difference = difference & 0x7f;
-
- for (; difference < 0; difference++)
+ for (int difference = util::sext(GET_FP - ((SP & 0x1fc) >> 2), 7); difference < 0; difference++)
{
SP -= 4;
m_core->local_regs[(SP & 0xfc) >> 2] = READ_W(SP);
@@ -102,11 +92,11 @@ void hyperstone_device::hyperstone_movd()
//TODO: not 2!
m_core->icount -= m_core->clock_cycles_2;
}
- else if (SRC_GLOBAL && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR
+ else if (SrcGlobal && (src_code == SR_REGISTER)) // Rd doesn't denote PC and Rs denotes SR
{
SR |= Z_MASK;
SR &= ~N_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
{
set_global_register(dst_code, 0);
set_global_register(dstf_code, 0);
@@ -126,7 +116,7 @@ void hyperstone_device::hyperstone_movd()
SR |= Z_MASK;
SR |= SIGN_TO_N(sreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
set_global_register(dst_code, sreg);
set_global_register(dstf_code, sregf);
@@ -141,25 +131,25 @@ void hyperstone_device::hyperstone_movd()
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal, hyperstone_device::sign_mode SIGNED>
void hyperstone_device::hyperstone_divsu()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dstf_code = DST_GLOBAL ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dstf_code = DstGlobal ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- if ((SRC_GLOBAL == DST_GLOBAL && (src_code == dst_code || src_code == dstf_code)) || (SRC_GLOBAL && src_code < 2))
+ if ((SrcGlobal == DstGlobal && (src_code == dst_code || src_code == dstf_code)) || (SrcGlobal && src_code < 2))
{
LOG("Denoted the same register code or PC/SR as source in hyperstone_divu instruction. PC = %08X\n", PC);
m_core->icount -= 36 << m_core->clck_scale;
return;
}
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- const uint64_t dividend = get_double_word<DST_GLOBAL>(dst_code, dstf_code);
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint64_t dividend = get_double_word<DstGlobal>(dst_code, dstf_code);
if (sreg == 0 || (SIGNED && (dividend & 0x8000000000000000U)))
{
@@ -167,7 +157,7 @@ void hyperstone_device::hyperstone_divsu()
//Z -> undefined
//N -> undefined
SR |= V_MASK;
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
else
{
@@ -177,14 +167,14 @@ void hyperstone_device::hyperstone_divsu()
if (quotient == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(quotient);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dstf_code] = (uint32_t)quotient;
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = SIGNED ? (uint32_t)((int64_t)dividend % (int32_t)sreg) : (dividend % sreg);
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dstf_code] = (uint32_t)quotient;
}
m_core->icount -= m_core->clock_cycles_36;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_xm()
{
const uint32_t next = m_pr16(PC);
@@ -204,51 +194,45 @@ void hyperstone_device::hyperstone_xm()
m_instruction_length = (2<<19);
}
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- if ((SRC_GLOBAL && (src_code == SR_REGISTER)) || (DST_GLOBAL && (dst_code < 2)))
+ if ((SrcGlobal && (src_code == SR_REGISTER)) || (DstGlobal && (dst_code < 2)))
{
LOG("Denoted PC or SR in hyperstone_xm. PC = %08X\n", PC);
m_core->icount -= m_core->clock_cycles_1;
return;
}
- uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
+ uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = sreg << (sub_type & 3);
if (sub_type < 4)
{
- if ((SRC_GLOBAL && (src_code == PC_REGISTER)) ? (sreg >= extra_u) : (sreg > extra_u))
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
- else
- sreg <<= sub_type;
- }
- else
- {
- sreg <<= (sub_type - 4);
+ if ((SrcGlobal && ((src_code == PC_REGISTER)) ? (sreg >= extra_u) : (sreg > extra_u)))
+ execute_exception(TRAPNO_RANGE_ERROR);
}
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = sreg;
-
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_mask()
{
const uint32_t extra_u = decode_const();
- check_delay_PC();
- const uint32_t dreg = (SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f]) & extra_u;
+ check_delay_pc();
+ const uint32_t dreg = (SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f]) & extra_u;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, dreg);
else
m_core->local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
@@ -256,14 +240,14 @@ void hyperstone_device::hyperstone_mask()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_sum()
{
const uint32_t extra_u = decode_const();
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
const uint64_t tmp = uint64_t(sreg) + uint64_t(extra_u);
@@ -271,13 +255,13 @@ void hyperstone_device::hyperstone_sum()
SR |= (tmp & 0x100000000) >> 32;
SR |= ((sreg ^ tmp) & (extra_u ^ tmp) & 0x80000000) >> 28;
- const uint32_t dreg = sreg + extra_u;
+ const uint32_t dreg = uint32_t(tmp);
if (dreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, dreg);
else
m_core->local_regs[(DST_CODE + fp) & 0x3f] = dreg;
@@ -286,16 +270,16 @@ void hyperstone_device::hyperstone_sum()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_sums()
{
const int32_t extra_s = decode_const();
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const int32_t sreg = int32_t(SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
const int64_t tmp = int64_t(sreg) + int64_t(extra_s);
@@ -312,7 +296,7 @@ void hyperstone_device::hyperstone_sums()
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, res);
else
m_core->local_regs[(DST_CODE + fp) & 0x3f] = res;
@@ -320,21 +304,21 @@ void hyperstone_device::hyperstone_sums()
m_core->icount -= m_core->clock_cycles_1;
if ((SR & V_MASK) && src_code != SR_REGISTER)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_cmp()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg);
@@ -352,31 +336,31 @@ void hyperstone_device::hyperstone_cmp()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_mov()
{
m_core->icount -= m_core->clock_cycles_1;
- check_delay_PC();
+ check_delay_pc();
const bool h = (SR & H_MASK) != 0;
SR &= ~H_MASK;
- if (DST_GLOBAL && h && !(SR & S_MASK))
+ if (DstGlobal && h && !(SR & S_MASK))
{
- execute_exception(get_trap_addr(TRAPNO_PRIVILEGE_ERROR));
+ execute_exception(TRAPNO_PRIVILEGE_ERROR);
}
else
{
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_core->local_regs[src_code];
+ const uint32_t src_code = SrcGlobal ? (SRC_CODE + (h ? 16 : 0)) : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? ((WRITE_ONLY_REGMASK & (1 << src_code)) ? 0 : get_global_register(src_code)) : m_core->local_regs[src_code];
SR &= ~(Z_MASK | N_MASK);
if (sreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(sreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
const uint32_t dst_code = DST_CODE + (h ? 16 : 0);
set_global_register(dst_code, sreg);
@@ -391,32 +375,31 @@ void hyperstone_device::hyperstone_mov()
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_add()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
const uint64_t tmp = uint64_t(sreg) + uint64_t(dreg);
-
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
SR |= (tmp & 0x100000000) >> 32;
SR |= ((sreg ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
- dreg += sreg;
+ dreg = uint32_t(tmp);
if (dreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
set_global_register(dst_code, dreg);
@@ -431,17 +414,17 @@ void hyperstone_device::hyperstone_add()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_adds()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
- int32_t dreg = int32_t((DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code]);
+ const int32_t sreg = int32_t(SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
+ int32_t dreg = int32_t((DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code]);
const int64_t tmp = int64_t(sreg) + int64_t(dreg);
SR &= ~(V_MASK | Z_MASK | N_MASK);
@@ -457,7 +440,7 @@ void hyperstone_device::hyperstone_adds()
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, res);
else
m_core->local_regs[dst_code] = res;
@@ -465,22 +448,22 @@ void hyperstone_device::hyperstone_adds()
m_core->icount -= m_core->clock_cycles_1;
if (SR & V_MASK)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_cmpb()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
if (dreg & sreg)
SR &= ~Z_MASK;
@@ -490,21 +473,21 @@ void hyperstone_device::hyperstone_cmpb()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_andn()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] & ~sreg;
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] & ~sreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -512,21 +495,21 @@ void hyperstone_device::hyperstone_andn()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_or()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] | sreg;
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] | sreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -534,21 +517,21 @@ void hyperstone_device::hyperstone_or()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_xor()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] ^ sreg;
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] ^ sreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -558,17 +541,17 @@ void hyperstone_device::hyperstone_xor()
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_subc()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? 0 : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? 0 : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
const uint32_t c = GET_C;
const uint64_t tmp = uint64_t(dreg) - (uint64_t(sreg) + uint64_t(c));
@@ -585,7 +568,7 @@ void hyperstone_device::hyperstone_subc()
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -593,19 +576,19 @@ void hyperstone_device::hyperstone_subc()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_not()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dreg = ~(SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f]);
+ const uint32_t dreg = ~(SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f]);
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, dreg);
else
m_core->local_regs[(DST_CODE + GET_FP) & 0x3f] = dreg;
@@ -613,17 +596,17 @@ void hyperstone_device::hyperstone_not()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_sub()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
const uint64_t tmp = uint64_t(dreg) - uint64_t(sreg);
@@ -637,7 +620,7 @@ void hyperstone_device::hyperstone_sub()
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
set_global_register(dst_code, dreg);
@@ -652,17 +635,17 @@ void hyperstone_device::hyperstone_sub()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_subs()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
- int32_t dreg = int32_t((DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code]);
+ const int32_t sreg = int32_t(SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
+ int32_t dreg = int32_t((DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code]);
const int64_t tmp = int64_t(dreg) - int64_t(sreg);
SR &= ~(V_MASK | Z_MASK | N_MASK);
@@ -675,7 +658,7 @@ void hyperstone_device::hyperstone_subs()
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -683,22 +666,22 @@ void hyperstone_device::hyperstone_subs()
m_core->icount -= m_core->clock_cycles_1;
if (SR & V_MASK)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_addc()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
const bool old_z = (SR & Z_MASK) != 0;
const uint32_t c = GET_C;
@@ -706,7 +689,7 @@ void hyperstone_device::hyperstone_addc()
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
uint64_t tmp;
- if (SRC_GLOBAL && (src_code == SR_REGISTER))
+ if (SrcGlobal && (src_code == SR_REGISTER))
{
tmp = uint64_t(dreg) + uint64_t(c);
SR |= ((dreg ^ tmp) & tmp & 0x80000000) >> 28;
@@ -725,7 +708,7 @@ void hyperstone_device::hyperstone_addc()
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -733,21 +716,21 @@ void hyperstone_device::hyperstone_addc()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_and()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] & sreg;
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t sreg = SrcGlobal ? m_core->global_regs[SRC_CODE] : m_core->local_regs[(SRC_CODE + GET_FP) & 0x3f];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] & sreg;
if (dreg == 0)
SR |= Z_MASK;
else
SR &= ~Z_MASK;
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, dreg);
else
m_core->local_regs[dst_code] = dreg;
@@ -755,15 +738,15 @@ void hyperstone_device::hyperstone_and()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_neg()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
+ const uint32_t sreg = SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code];
const uint64_t tmp = -uint64_t(sreg);
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
@@ -776,7 +759,7 @@ void hyperstone_device::hyperstone_neg()
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, dreg);
else
m_core->local_regs[(DST_CODE + fp) & 0x3f] = dreg;
@@ -784,15 +767,15 @@ void hyperstone_device::hyperstone_neg()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_negs()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const int32_t sreg = int32_t(SRC_GLOBAL ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
+ const int32_t sreg = int32_t(SrcGlobal ? ((src_code == SR_REGISTER) ? GET_C : m_core->global_regs[src_code]) : m_core->local_regs[src_code]);
const int64_t tmp = -int64_t(sreg);
SR &= ~(V_MASK | Z_MASK | N_MASK);
@@ -810,7 +793,7 @@ void hyperstone_device::hyperstone_negs()
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(DST_CODE, res);
else
m_core->local_regs[(DST_CODE + fp) & 0x3f] = res;
@@ -818,24 +801,24 @@ void hyperstone_device::hyperstone_negs()
m_core->icount -= m_core->clock_cycles_1;
if (GET_V)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_cmpi()
{
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
- if (!IMM_LONG)
+ if (!ImmLong)
imm = m_op & 0x0f;
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
SR &= ~(V_MASK | Z_MASK | N_MASK | C_MASK);
@@ -853,37 +836,35 @@ void hyperstone_device::hyperstone_cmpi()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_movi()
{
m_core->icount -= m_core->clock_cycles_1;
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
- if (!IMM_LONG)
+ if (!ImmLong)
imm = m_op & 0x0f;
const bool h = (SR & H_MASK) != 0;
SR &= ~H_MASK;
- if (DST_GLOBAL && h && !(SR & S_MASK))
+ if (DstGlobal && h && !(SR & S_MASK))
{
- execute_exception(get_trap_addr(TRAPNO_PRIVILEGE_ERROR));
+ execute_exception(TRAPNO_PRIVILEGE_ERROR);
}
else
{
- SR &= ~(Z_MASK | N_MASK);
+ // manual says V and C are undefined - assume V is cleared
+ // Mission Craft seems to expect this behaviour
+ SR &= ~(Z_MASK | N_MASK | V_MASK);
if (imm == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(imm);
-#if MISSIONCRAFT_FLAGS
- SR &= ~V_MASK; // or V undefined ?
-#endif
-
- if (DST_GLOBAL)
+ if (DstGlobal)
{
const uint32_t dst_code = DST_CODE + (h ? 16 : 0);
set_global_register(dst_code, imm);
@@ -898,20 +879,20 @@ void hyperstone_device::hyperstone_movi()
}
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_addi()
{
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
if (!N_OP_MASK)
imm = GET_C & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01));
- else if (!IMM_LONG)
+ else if (!ImmLong)
imm = m_op & 0x0f;
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
@@ -921,13 +902,13 @@ void hyperstone_device::hyperstone_addi()
SR |= (tmp & 0x100000000) >> 32;
SR |= ((imm ^ tmp) & (dreg ^ tmp) & 0x80000000) >> 28;
- dreg += imm;
+ dreg = uint32_t(tmp);
if (dreg == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(dreg);
- if (DST_GLOBAL)
+ if (DstGlobal)
{
set_global_register(dst_code, dreg);
@@ -942,22 +923,22 @@ void hyperstone_device::hyperstone_addi()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_addsi()
{
- if (!IMM_LONG)
- check_delay_PC();
+ if (!ImmLong)
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const int32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const int32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
int32_t imm;
if (N_OP_MASK)
{
- if (IMM_LONG)
+ if (ImmLong)
{
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
}
else
{
@@ -966,10 +947,10 @@ void hyperstone_device::hyperstone_addsi()
}
else
{
- if (IMM_LONG)
+ if (ImmLong)
{
ignore_immediate_s();
- check_delay_PC();
+ check_delay_pc();
}
imm = SR & (((SR & Z_MASK) ? 0 : 1) | (dreg & 0x01));
}
@@ -989,7 +970,7 @@ void hyperstone_device::hyperstone_addsi()
SR |= Z_MASK;
SR |= SIGN_TO_N(res);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, res);
else
m_core->local_regs[dst_code] = res;
@@ -997,18 +978,18 @@ void hyperstone_device::hyperstone_addsi()
m_core->icount -= m_core->clock_cycles_1;
if (SR & V_MASK)
- execute_exception(get_trap_addr(TRAPNO_RANGE_ERROR));
+ execute_exception(TRAPNO_RANGE_ERROR);
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_cmpbi()
{
- if (!IMM_LONG)
- check_delay_PC();
+ if (!ImmLong)
+ check_delay_pc();
- const uint32_t dreg = DST_GLOBAL ? m_core->global_regs[DST_CODE] : m_core->local_regs[(DST_CODE + GET_FP) & 0x3f];
+ const uint32_t dreg = DstGlobal ? m_core->global_regs[DST_CODE] : m_core->local_regs[(DST_CODE + GET_FP) & 0x3f];
const uint32_t n = N_VALUE;
if (n)
@@ -1016,19 +997,19 @@ void hyperstone_device::hyperstone_cmpbi()
uint32_t imm;
if (n == 31)
{
- if (IMM_LONG)
+ if (ImmLong)
{
ignore_immediate_s();
- check_delay_PC();
+ check_delay_pc();
}
imm = 0x7fffffff; // bit 31 = 0, others = 1
}
else
{
- if (IMM_LONG)
+ if (ImmLong)
{
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
}
else
{
@@ -1043,10 +1024,10 @@ void hyperstone_device::hyperstone_cmpbi()
}
else
{
- if (IMM_LONG)
+ if (ImmLong)
{
ignore_immediate_s();
- check_delay_PC();
+ check_delay_pc();
}
if ((dreg & 0xff000000) == 0 || (dreg & 0x00ff0000) == 0 || (dreg & 0x0000ff00) == 0 || (dreg & 0x000000ff) == 0)
SR |= Z_MASK;
@@ -1057,22 +1038,22 @@ void hyperstone_device::hyperstone_cmpbi()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_andni()
{
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
if (N_OP_MASK == 0x10f)
imm = 0x7fffffff; // bit 31 = 0, others = 1
- else if (!IMM_LONG)
+ else if (!ImmLong)
imm = m_op & 0x0f;
uint32_t dreg;
- if (DST_GLOBAL)
+ if (DstGlobal)
{
const uint32_t dst_code = DST_CODE;
dreg = m_core->global_regs[dst_code] & ~imm;
@@ -1099,19 +1080,19 @@ void hyperstone_device::hyperstone_andni()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_ori()
{
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
- if (!IMM_LONG)
+ if (!ImmLong)
imm = m_op & 0x0f;
- if (DST_GLOBAL)
+ if (DstGlobal)
{
const uint32_t dst_code = DST_CODE;
const uint32_t dreg = m_core->global_regs[dst_code] | imm;
@@ -1137,19 +1118,19 @@ void hyperstone_device::hyperstone_ori()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::imm_size IMM_LONG>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::imm_size ImmLong>
void hyperstone_device::hyperstone_xori()
{
uint32_t imm;
- if (IMM_LONG)
+ if (ImmLong)
imm = decode_immediate_s();
- check_delay_PC();
+ check_delay_pc();
- if (!IMM_LONG)
+ if (!ImmLong)
imm = m_op & 0x0f;
uint32_t dreg;
- if (DST_GLOBAL)
+ if (DstGlobal)
{
const uint32_t dst_code = DST_CODE;
dreg = m_core->global_regs[dst_code] ^ imm;
@@ -1176,10 +1157,10 @@ void hyperstone_device::hyperstone_xori()
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::hyperstone_shrdi()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f;
const uint32_t dstf_code = (dst_code + 1) & 0x3f;
@@ -1188,8 +1169,8 @@ void hyperstone_device::hyperstone_shrdi()
SR &= ~(C_MASK | Z_MASK | N_MASK);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
- if (HI_N || n)
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
+ if (HiN || n)
{
SR |= (val >> (n - 1)) & 1;
@@ -1208,7 +1189,7 @@ void hyperstone_device::hyperstone_shrdi()
void hyperstone_device::hyperstone_shrd()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t src_code = (SRC_CODE + fp) & 0x3f;
@@ -1244,7 +1225,7 @@ void hyperstone_device::hyperstone_shrd()
void hyperstone_device::hyperstone_shr()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
@@ -1267,10 +1248,10 @@ void hyperstone_device::hyperstone_shr()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::hyperstone_sardi()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t dst_code = (DST_CODE + GET_FP) & 0x3f;
const uint32_t dstf_code = (dst_code + 1) & 0x3f;
@@ -1279,8 +1260,8 @@ void hyperstone_device::hyperstone_sardi()
SR &= ~(C_MASK | Z_MASK | N_MASK);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
- if (HI_N || n)
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
+ if (HiN || n)
{
SR |= (val >> (n - 1)) & 1;
@@ -1302,7 +1283,7 @@ void hyperstone_device::hyperstone_sardi()
void hyperstone_device::hyperstone_sard()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t src_code = (SRC_CODE + fp) & 0x3f;
@@ -1344,7 +1325,7 @@ void hyperstone_device::hyperstone_sard()
void hyperstone_device::hyperstone_sar()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
@@ -1375,10 +1356,10 @@ void hyperstone_device::hyperstone_sar()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::shift_type HI_N>
+template <hyperstone_device::shift_type HiN>
void hyperstone_device::hyperstone_shldi()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t code = DST_CODE;
@@ -1391,7 +1372,7 @@ void hyperstone_device::hyperstone_shldi()
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
SR |= (n)?(((val<<(n-1))&0x8000000000000000ULL)?1:0):0;
const uint32_t tmp = high_order << n;
@@ -1413,7 +1394,7 @@ void hyperstone_device::hyperstone_shldi()
void hyperstone_device::hyperstone_shld()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t d_code = DST_CODE;
@@ -1458,22 +1439,22 @@ void hyperstone_device::hyperstone_shld()
void hyperstone_device::hyperstone_shl()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
uint32_t src_code = SRC_CODE + fp;
uint32_t dst_code = DST_CODE + fp;
- uint32_t n = m_core->local_regs[src_code & 0x3f] & 0x1f;
- uint32_t base = m_core->local_regs[dst_code & 0x3f]; /* registers offset by frame pointer */
- uint32_t mask = n ? 0xffffffff << (32 - n) : 0;
+ const uint32_t n = m_core->local_regs[src_code & 0x3f] & 0x1f;
+ const uint32_t base = m_core->local_regs[dst_code & 0x3f];
+ const uint32_t mask = n ? (0xffffffff << (32 - n)) : 0;
SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
- SR |= (n)?(((base<<(n-1))&0x80000000)?1:0):0;
- uint32_t ret = base << n;
+ SR |= (n && ((base << (n - 1)) & 0x80000000)) ? C_MASK : 0;
+ const uint32_t ret = base << n;
- if (((base & mask) && (!(ret & 0x80000000))) || (((base & mask) ^ mask) && (ret & 0x80000000)))
+ if (!(ret & 0x80000000) ? (base & mask) : ((base & mask) ^ mask))
SR |= V_MASK;
if (ret == 0)
@@ -1487,7 +1468,7 @@ void hyperstone_device::hyperstone_shl()
void hyperstone_device::hyperstone_testlz()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t sreg = m_core->local_regs[(SRC_CODE + fp) & 0x3f];
@@ -1500,39 +1481,35 @@ void hyperstone_device::hyperstone_testlz()
void hyperstone_device::hyperstone_rol()
{
- check_delay_PC();
+ // manual says V and C are undefined - assume they work like SHL
+ // Mission Craft seems to at least expect the V flag to work like this
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
- uint32_t n = m_core->local_regs[(SRC_CODE + fp) & 0x3f] & 0x1f;
- uint32_t val = m_core->local_regs[dst_code];
+ const uint32_t n = m_core->local_regs[(SRC_CODE + fp) & 0x3f] & 0x1f;
+ const uint32_t mask = n ? (~uint32_t(0) >> (32 - n)) : 0;
-#ifdef MISSIONCRAFT_FLAGS
- const uint32_t base = val;
- const uint32_t mask = (uint32_t)(0xffffffff00000000ULL >> n);
-#endif
+ uint32_t val = m_core->local_regs[dst_code];
val = rotl_32(val, n);
-#ifdef MISSIONCRAFT_FLAGS
SR &= ~(V_MASK | Z_MASK | C_MASK | N_MASK);
- if (((base & mask) && (!(val & 0x80000000))) || (((base & mask) ^ mask) && (val & 0x80000000)))
+ if (!(val & 0x80000000) ? (val & mask) : ((val & mask) ^ mask))
SR |= V_MASK;
-#else
- SR &= ~(Z_MASK | C_MASK | N_MASK);
-#endif
-
if (val == 0)
SR |= Z_MASK;
SR |= SIGN_TO_N(val);
+ if (n && (val & 1))
+ SR |= C_MASK;
m_core->local_regs[dst_code] = val;
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_ldxx1()
{
uint16_t next_1 = m_pr16(PC);
@@ -1562,32 +1539,38 @@ void hyperstone_device::hyperstone_ldxx1()
extra_s |= 0xfffff000;
}
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code]);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dreg = ((DstGlobal && dst_code == SR_REGISTER) ? 0 : (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code]);
+
+ if ((!DstGlobal || (dst_code != SR_REGISTER)) && !dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
switch (sub_type)
{
case 0: // LDBS.D
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg + extra_s));
else
m_core->local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg + extra_s);
break;
case 1: // LDBU.D
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, READ_B(dreg + extra_s));
else
m_core->local_regs[src_code] = READ_B(dreg + extra_s);
break;
case 2:
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (extra_s & 1)
set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg + (extra_s & ~1)));
@@ -1607,13 +1590,13 @@ void hyperstone_device::hyperstone_ldxx1()
switch (extra_s & 3)
{
case 0: // LDW.D
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, READ_W(dreg + extra_s));
else
m_core->local_regs[src_code] = READ_W(dreg + extra_s);
break;
case 1: // LDD.D
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
set_global_register(src_code, READ_W(dreg + (extra_s & ~1)));
set_global_register(srcf_code, READ_W(dreg + (extra_s & ~1) + 4));
@@ -1626,21 +1609,21 @@ void hyperstone_device::hyperstone_ldxx1()
m_core->icount -= m_core->clock_cycles_1; // extra cycle
break;
case 2: // LDW.IOD
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
else
m_core->local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
break;
case 3: // LDD.IOD
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
set_global_register(src_code, IO_READ_W(dreg + (extra_s & ~3)));
- set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + 4));
+ set_global_register(srcf_code, IO_READ_W(dreg + (extra_s & ~3) + (1 << 13)));
}
else
{
m_core->local_regs[src_code] = IO_READ_W(dreg + (extra_s & ~3));
- m_core->local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + 4);
+ m_core->local_regs[srcf_code] = IO_READ_W(dreg + (extra_s & ~3) + (1 << 13));
}
m_core->icount -= m_core->clock_cycles_1; // extra cycle
break;
@@ -1651,7 +1634,7 @@ void hyperstone_device::hyperstone_ldxx1()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_ldxx2()
{
uint16_t next_1 = m_pr16(PC);
@@ -1681,44 +1664,62 @@ void hyperstone_device::hyperstone_ldxx2()
extra_s |= 0xfffff000;
}
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : (DST_CODE + fp) & 0x3f;
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : (SRC_CODE + fp) & 0x3f;
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : (DST_CODE + fp) & 0x3f;
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
- if (DST_GLOBAL && dst_code < 2)
+ if (DstGlobal && (dst_code <= SR_REGISTER))
{
m_core->icount -= m_core->clock_cycles_1;
LOG("Denoted PC or SR in hyperstone_ldxx2. PC = %08X\n", PC);
return;
}
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : (SRC_CODE + fp) & 0x3f;
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ if (!dreg)
+ {
+ switch (sub_type)
+ {
+ case 0: // LDBS.N
+ case 1: // LDBU.N
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ break;
+ case 2: // LDHS.N, LDHU.N
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
+ break;
+ case 3: // LDW.N, LDD.N, LDW.S
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~3;
+ break;
+ }
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
switch (sub_type)
{
case 0: // LDBS.N
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, (int32_t)(int8_t)READ_B(dreg));
else
m_core->local_regs[src_code] = (int32_t)(int8_t)READ_B(dreg);
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ if (DstGlobal != SrcGlobal || src_code != dst_code)
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
break;
case 1: // LDBU.N
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, READ_B(dreg));
else
m_core->local_regs[src_code] = READ_B(dreg);
- if(DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ if(DstGlobal != SrcGlobal || src_code != dst_code)
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
break;
case 2:
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (extra_s & 1) // LDHS.N
set_global_register(src_code, (int32_t)(int16_t)READ_HW(dreg));
@@ -1733,23 +1734,23 @@ void hyperstone_device::hyperstone_ldxx2()
m_core->local_regs[src_code] = READ_HW(dreg);
}
- if(DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += (extra_s & ~1);
+ if (DstGlobal != SrcGlobal || src_code != dst_code)
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += (extra_s & ~1);
break;
case 3:
switch (extra_s & 3)
{
case 0: // LDW.N
- if (SRC_GLOBAL)
+ if (SrcGlobal)
set_global_register(src_code, READ_W(dreg));
else
m_core->local_regs[src_code] = READ_W(dreg);
- if(DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ if(DstGlobal != SrcGlobal || src_code != dst_code)
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
break;
case 1: // LDD.N
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
set_global_register(src_code, READ_W(dreg));
set_global_register(srcf_code, READ_W(dreg + 4));
@@ -1760,8 +1761,8 @@ void hyperstone_device::hyperstone_ldxx2()
m_core->local_regs[srcf_code] = READ_W(dreg + 4);
}
- if (DST_GLOBAL != SRC_GLOBAL || (src_code != dst_code && srcf_code != dst_code))
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
+ if (DstGlobal != SrcGlobal || (src_code != dst_code && srcf_code != dst_code))
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
m_core->icount -= m_core->clock_cycles_1; // extra cycle
break;
@@ -1769,7 +1770,7 @@ void hyperstone_device::hyperstone_ldxx2()
LOG("Executed Reserved instruction in hyperstone_ldxx2. PC = %08X\n", PC);
break;
case 3: // LDW.S
- if (SRC_GLOBAL)
+ if (SrcGlobal)
{
if (dreg < SP)
set_global_register(src_code, READ_W(dreg));
@@ -1784,8 +1785,8 @@ void hyperstone_device::hyperstone_ldxx2()
m_core->local_regs[src_code] = m_core->local_regs[(dreg & 0xfc) >> 2];
}
- if (DST_GLOBAL != SRC_GLOBAL || src_code != dst_code)
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~3;
+ if (DstGlobal != SrcGlobal || src_code != dst_code)
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~3;
m_core->icount -= m_core->clock_cycles_2; // extra cycles
break;
@@ -1796,7 +1797,7 @@ void hyperstone_device::hyperstone_ldxx2()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stxx1()
{
uint16_t next_1 = m_pr16(PC);
@@ -1826,19 +1827,26 @@ void hyperstone_device::hyperstone_stxx1()
extra_s |= 0xfffff000;
}
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dreg = ((DST_GLOBAL && dst_code == SR_REGISTER) ? 0 : (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code]);
- const uint32_t sreg = ((SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code]);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dreg = ((DstGlobal && dst_code == SR_REGISTER) ? 0 : (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code]);
+ const uint32_t sreg = ((SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code]);
+
+ if ((!DstGlobal || (dst_code != SR_REGISTER)) && !dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
switch (sub_type)
{
case 0: // STBS.D
- // TODO: missing trap on range error
- WRITE_B(dreg + extra_s, (uint8_t)sreg);
+ WRITE_B(dreg + extra_s, uint8_t(sreg));
+ if ((uint8_t(sreg) != sreg) && (int8_t(uint8_t(sreg)) != int32_t(sreg)))
+ execute_exception(TRAPNO_RANGE_ERROR);
break;
case 1: // STBU.D
@@ -1846,8 +1854,9 @@ void hyperstone_device::hyperstone_stxx1()
break;
case 2: // STHS.D, STHU.D
- WRITE_HW(dreg + (extra_s & ~1), (uint16_t)sreg);
- // TODO: missing trap on range error with STHS.D
+ WRITE_HW(dreg + (extra_s & ~1), uint16_t(sreg));
+ if ((extra_s & 1) && (uint16_t(sreg) != sreg) && (int16_t(uint16_t(sreg)) != int32_t(sreg)))
+ execute_exception(TRAPNO_RANGE_ERROR);
break;
case 3:
@@ -1858,8 +1867,8 @@ void hyperstone_device::hyperstone_stxx1()
break;
case 1: // STD.D
{
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && srcf_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code]);
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sregf = ((SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code]);
extra_s &= ~1;
WRITE_W(dreg + extra_s, sreg);
WRITE_W(dreg + extra_s + 4, sregf);
@@ -1871,11 +1880,11 @@ void hyperstone_device::hyperstone_stxx1()
break;
case 3: // STD.IOD
{
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = ((SRC_GLOBAL && srcf_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code]);
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sregf = ((SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code]);
extra_s &= ~3;
IO_WRITE_W(dreg + extra_s, sreg);
- IO_WRITE_W(dreg + extra_s + 4, sregf);
+ IO_WRITE_W(dreg + extra_s + (1 << 13), sregf);
m_core->icount -= m_core->clock_cycles_1; // extra cycle
break;
}
@@ -1886,7 +1895,7 @@ void hyperstone_device::hyperstone_stxx1()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stxx2()
{
uint16_t next_1 = m_pr16(PC);
@@ -1916,37 +1925,61 @@ void hyperstone_device::hyperstone_stxx2()
extra_s |= 0xfffff000;
}
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
- if (DST_GLOBAL && dst_code < 2)
+ if (DstGlobal && (dst_code <= SR_REGISTER))
{
m_core->icount -= m_core->clock_cycles_1;
return;
}
+ if (!dreg)
+ {
+ switch (sub_type)
+ {
+ case 0: // LDBS.N
+ case 1: // LDBU.N
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ break;
+ case 2: // LDHS.N, LDHU.N
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
+ break;
+ case 3: // LDW.N, LDD.N, LDW.S
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~3;
+ break;
+ }
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ bool range_error;
switch (sub_type)
{
case 0: // STBS.N
- // TODO: missing trap on range error
WRITE_B(dreg, (uint8_t)sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ range_error = (uint8_t(sreg) != sreg) && (int8_t(uint8_t(sreg)) != int32_t(sreg));
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ if (range_error)
+ execute_exception(TRAPNO_RANGE_ERROR);
break;
case 1: // STBU.N
WRITE_B(dreg, (uint8_t)sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
break;
case 2: // STHS.N, STHU.N
WRITE_HW(dreg, (uint16_t)sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
- // TODO: missing trap on range error with STHS.N
+ range_error = (extra_s & 1) && (uint16_t(sreg) != sreg) && (int16_t(uint16_t(sreg)) != int32_t(sreg));
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
+ if (range_error)
+ execute_exception(TRAPNO_RANGE_ERROR);
break;
case 3:
@@ -1954,15 +1987,15 @@ void hyperstone_device::hyperstone_stxx2()
{
case 0: // STW.N
WRITE_W(dreg, sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s;
break;
case 1: // STD.N
{
WRITE_W(dreg, sreg);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += extra_s & ~1;
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sregf = (SRC_GLOBAL && srcf_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code];
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sregf = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code];
WRITE_W(dreg + 4, sregf);
m_core->icount -= m_core->clock_cycles_1; // extra cycle
@@ -1977,7 +2010,7 @@ void hyperstone_device::hyperstone_stxx2()
else
m_core->local_regs[(dreg & 0xfc) >> 2] = sreg;
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] += (extra_s & ~3);
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] += (extra_s & ~3);
m_core->icount -= m_core->clock_cycles_2; // extra cycles
break;
@@ -1988,18 +2021,18 @@ void hyperstone_device::hyperstone_stxx2()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::hyperstone_shri()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- uint32_t val = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ uint32_t val = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
SR &= ~(C_MASK | Z_MASK | N_MASK);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
- if (HI_N || n)
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
+ if (HiN || n)
SR |= (val >> (n - 1)) & 1;
val >>= n;
@@ -2008,7 +2041,7 @@ void hyperstone_device::hyperstone_shri()
SR |= Z_MASK;
SR |= SIGN_TO_N(val);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, val);
else
m_core->local_regs[dst_code] = val;
@@ -2016,19 +2049,19 @@ void hyperstone_device::hyperstone_shri()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::hyperstone_sari()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
- uint32_t val = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
+ uint32_t val = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
SR &= ~(C_MASK | Z_MASK | N_MASK);
- if (HI_N || n)
+ if (HiN || n)
{
const uint32_t sign_bit = val & 0x80000000;
@@ -2044,7 +2077,7 @@ void hyperstone_device::hyperstone_sari()
SR |= Z_MASK;
SR |= SIGN_TO_N(val);
- if (DST_GLOBAL)
+ if (DstGlobal)
set_global_register(dst_code, val);
else
m_core->local_regs[dst_code] = val;
@@ -2052,58 +2085,55 @@ void hyperstone_device::hyperstone_sari()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::hyperstone_shli()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- uint32_t val = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
- const uint32_t n = HI_N ? HI_N_VALUE : LO_N_VALUE;
- SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
+ const uint32_t n = HiN ? HI_N_VALUE : LO_N_VALUE;
+ const uint32_t base = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t mask = n ? (0xffffffff << (32 - n)) : 0;
- if (HI_N || n)
- {
- SR |= (val & (0x80000000 >> (n - 1))) ? 1 : 0;
- }
+ SR &= ~(C_MASK | V_MASK | Z_MASK | N_MASK);
- uint32_t mask = n ? 0xffffffff << (32 - n) : 0;
- uint32_t val2 = val << n;
+ SR |= (n && ((base << (n - 1)) & 0x80000000)) ? C_MASK : 0;
+ const uint32_t ret = base << n;
- if (((val & mask) && (!(val2 & 0x80000000))) || (((val & mask) ^ mask) && (val2 & 0x80000000)))
+ if (!(ret & 0x80000000) ? (base & mask) : ((base & mask) ^ mask))
SR |= V_MASK;
- if (val2 == 0)
+ if (ret == 0)
SR |= Z_MASK;
- SR |= SIGN_TO_N(val2);
+ SR |= SIGN_TO_N(ret);
- if (DST_GLOBAL)
- set_global_register(dst_code, val2);
+ if (DstGlobal)
+ set_global_register(dst_code, ret);
else
- m_core->local_regs[dst_code] = val2;
+ m_core->local_regs[dst_code] = ret;
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL, hyperstone_device::sign_mode SIGNED>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal, hyperstone_device::sign_mode SIGNED>
void hyperstone_device::hyperstone_mulsu()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- const uint32_t dstf_code = DST_GLOBAL ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t dstf_code = DstGlobal ? (dst_code + 1) : ((dst_code + 1) & 0x3f);
- if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
+ if ((SrcGlobal && src_code < 2) || (DstGlobal && dst_code < 2))
{
LOG("Denoted PC or SR in hyperstone_muls/u instruction. PC = %08X\n", PC);
return;
}
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
const uint64_t double_word = SIGNED ? (uint64_t)mul_32x32(sreg, dreg) : mulu_32x32(sreg, dreg);
SR &= ~(Z_MASK | N_MASK);
@@ -2111,7 +2141,7 @@ void hyperstone_device::hyperstone_mulsu()
SR |= Z_MASK;
SR |= SIGN64_TO_N(double_word);
- set_double_word<DST_GLOBAL>(dst_code, dstf_code, double_word);
+ set_double_word<DstGlobal>(dst_code, dstf_code, double_word);
m_core->icount -= m_core->clock_cycles_6;
if(SIGNED == IS_SIGNED && ((int32_t) sreg >= -0x8000 && (int32_t) sreg <= 0x7fff) && ((int32_t) dreg >= -0x8000 && (int32_t) dreg <= 0x7fff))
@@ -2120,21 +2150,21 @@ void hyperstone_device::hyperstone_mulsu()
m_core->icount += m_core->clock_cycles_2;
}
-template <hyperstone_device::shift_type HI_N, hyperstone_device::reg_bank DST_GLOBAL>
+template <hyperstone_device::shift_type HiN, hyperstone_device::reg_bank DstGlobal>
void hyperstone_device::hyperstone_set()
{
- check_delay_PC();
+ check_delay_pc();
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + GET_FP) & 0x3f);
const uint32_t n = LO_N_VALUE;
- if (DST_GLOBAL && dst_code < 2)
+ if (DstGlobal && dst_code < 2)
{
m_core->icount -= m_core->clock_cycles_1;
return;
}
- if (HI_N)
+ if (HiN)
{
if (n >= 4 || n == 2)
{
@@ -2144,9 +2174,9 @@ void hyperstone_device::hyperstone_set()
(C_MASK | Z_MASK), (C_MASK | Z_MASK), C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, V_MASK };
if (SR & mask[n])
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = set_result[n];
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = set_result[n];
else
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = unset_result[n];
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = unset_result[n];
}
else
{
@@ -2157,7 +2187,7 @@ void hyperstone_device::hyperstone_set()
{
if (n == 0)
{
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = (SP & 0xfffffe00) | (GET_FP << 2) | (((SP & 0x100) && (SIGN_BIT(SR) == 0)) ? 1 : 0);
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = (SP & 0xfffffe00) | (GET_FP << 2) | (((SP & 0x100) && (SIGN_BIT(SR) == 0)) ? 1 : 0);
}
else if (n >= 2)
{
@@ -2167,9 +2197,9 @@ void hyperstone_device::hyperstone_set()
(C_MASK | Z_MASK), (C_MASK | Z_MASK), C_MASK, C_MASK, Z_MASK, Z_MASK, V_MASK, V_MASK };
if (SR & mask[n])
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = set_result[n];
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = set_result[n];
else
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = unset_result[n];
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = unset_result[n];
}
else
{
@@ -2180,23 +2210,23 @@ void hyperstone_device::hyperstone_set()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank DST_GLOBAL, hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank DstGlobal, hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_mul()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t dst_code = DST_GLOBAL ? DST_CODE : ((DST_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t dst_code = DstGlobal ? DST_CODE : ((DST_CODE + fp) & 0x3f);
- if ((SRC_GLOBAL && src_code < 2) || (DST_GLOBAL && dst_code < 2))
+ if ((SrcGlobal && src_code < 2) || (DstGlobal && dst_code < 2))
{
LOG("Denoted PC or SR in hyperstone_mul instruction. PC = %08X\n", PC);
return;
}
- const uint32_t dreg = (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code];
- const uint32_t sreg = (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t dreg = (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code];
+ const uint32_t sreg = (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
const uint32_t result = sreg * dreg;
SR &= ~(Z_MASK | N_MASK);
@@ -2204,9 +2234,9 @@ void hyperstone_device::hyperstone_mul()
SR |= Z_MASK;
SR |= SIGN_TO_N(result);
- (DST_GLOBAL ? m_core->global_regs : m_core->local_regs)[dst_code] = result;
+ (DstGlobal ? m_core->global_regs : m_core->local_regs)[dst_code] = result;
- if ((int32_t)sreg < -0x8000 || (int32_t) sreg > 0x7fff || (int32_t) dreg < -0x8000 || (int32_t) dreg > 0x7fff)
+ if ((int32_t(sreg) < -0x8000) || (int32_t(sreg) > 0x7fff) || (int32_t(dreg) < -0x8000) || (int32_t(dreg) > 0x7fff))
m_core->icount -= 5 << m_core->clck_scale;
else
m_core->icount -= 3 << m_core->clck_scale;
@@ -2217,7 +2247,7 @@ void hyperstone_device::hyperstone_extend()
m_instruction_length = (2<<19);
const uint32_t func = m_pr16(PC);
PC += 2;
- check_delay_PC();
+ check_delay_pc();
//TODO: add locks, overflow error and other things
const uint32_t fp = GET_FP;
@@ -2329,28 +2359,43 @@ void hyperstone_device::hyperstone_extend()
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_ldwr()
{
- check_delay_PC();
+ check_delay_pc();
+
const uint32_t fp = GET_FP;
- if (SRC_GLOBAL)
- set_global_register(SRC_CODE, READ_W(m_core->local_regs[(DST_CODE + fp) & 0x3f]));
+ const uint32_t dreg = m_core->local_regs[(DST_CODE + fp) & 0x3f];
+
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ if (SrcGlobal)
+ set_global_register(SRC_CODE, READ_W(dreg));
else
- m_core->local_regs[(SRC_CODE + fp) & 0x3f] = READ_W(m_core->local_regs[(DST_CODE + fp) & 0x3f]);
+ m_core->local_regs[(SRC_CODE + fp) & 0x3f] = READ_W(dreg);
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_lddr()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
const uint32_t dreg = m_core->local_regs[(DST_CODE + fp) & 0x3f];
- if (SRC_GLOBAL)
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ if (SrcGlobal)
{
set_global_register(src_code, READ_W(dreg));
set_global_register(src_code + 1, READ_W(dreg + 4));
@@ -2364,47 +2409,62 @@ void hyperstone_device::hyperstone_lddr()
m_core->icount -= m_core->clock_cycles_2;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_ldwp()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
+ const uint32_t dreg = m_core->local_regs[dst_code];
- if (SRC_GLOBAL)
+ if (!dreg)
{
- set_global_register(SRC_CODE, READ_W(m_core->local_regs[dst_code]));
- m_core->local_regs[dst_code] += 4;
+ m_core->local_regs[dst_code] = dreg + 4;
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ if (SrcGlobal)
+ {
+ set_global_register(SRC_CODE, READ_W(dreg));
+ m_core->local_regs[dst_code] = dreg + 4;
}
else
{
const uint32_t src_code = (SRC_CODE + fp) & 0x3f;
- m_core->local_regs[src_code] = READ_W(m_core->local_regs[dst_code]);
+ m_core->local_regs[src_code] = READ_W(dreg);
// post increment the destination register if it's different from the source one
// (needed by Hidden Catch)
if (src_code != dst_code)
- m_core->local_regs[dst_code] += 4;
+ m_core->local_regs[dst_code] = dreg + 4;
}
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_lddp()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
const uint32_t dreg = m_core->local_regs[dst_code];
- if (SRC_GLOBAL)
+ if (!dreg)
+ {
+ m_core->local_regs[dst_code] = dreg + 8;
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ if (SrcGlobal)
{
set_global_register(src_code, READ_W(dreg));
set_global_register(src_code + 1, READ_W(dreg + 4));
- m_core->local_regs[dst_code] += 8;
+ m_core->local_regs[dst_code] = dreg + 8;
}
else
{
@@ -2415,124 +2475,152 @@ void hyperstone_device::hyperstone_lddp()
// post increment the destination register if it's different from the source one
// and from the "next source" one
if (src_code != dst_code && srcf_code != dst_code)
- m_core->local_regs[dst_code] += 8;
+ m_core->local_regs[dst_code] = dreg + 8;
}
m_core->icount -= m_core->clock_cycles_2;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stwr()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- WRITE_W(m_core->local_regs[(DST_CODE + fp) & 0x3f], sreg);
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t dreg = m_core->local_regs[(DST_CODE + fp) & 0x3f];
+
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ WRITE_W(dreg, sreg);
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stdr()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t srcf_code = SRC_GLOBAL ? (SRC_CODE + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
- const uint32_t sregf = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code];
-
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t srcf_code = SrcGlobal ? (SRC_CODE + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
+ const uint32_t sregf = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code];
const uint32_t dreg = m_core->local_regs[(DST_CODE + GET_FP) & 0x3f];
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
WRITE_W(dreg, sreg);
WRITE_W(dreg + 4, sregf);
m_core->icount -= m_core->clock_cycles_2;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stwp()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
-
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
const uint32_t dreg = m_core->local_regs[dst_code];
+ m_core->local_regs[dst_code] = dreg + 4;
+
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
WRITE_W(dreg, sreg);
- m_core->local_regs[dst_code] += 4;
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_stdp()
{
- check_delay_PC();
+ check_delay_pc();
const uint32_t fp = GET_FP;
- const uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
- const uint32_t srcf_code = SRC_GLOBAL ? (src_code + 1) : ((src_code + 1) & 0x3f);
- const uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
-
+ const uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ const uint32_t srcf_code = SrcGlobal ? (src_code + 1) : ((src_code + 1) & 0x3f);
+ const uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
const uint32_t dst_code = (DST_CODE + fp) & 0x3f;
const uint32_t dreg = m_core->local_regs[dst_code];
- WRITE_W(dreg, sreg);
+ m_core->local_regs[dst_code] = dreg + 8;
- m_core->local_regs[dst_code] += 8;
+ if (!dreg)
+ {
+ execute_exception(TRAPNO_POINTER_ERROR);
+ return;
+ }
+
+ WRITE_W(dreg, sreg);
- const uint32_t sregf = (SRC_GLOBAL && srcf_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[srcf_code];
+ const uint32_t sregf = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[srcf_code];
WRITE_W(dreg + 4, sregf);
m_core->icount -= m_core->clock_cycles_2;
}
-template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+template <hyperstone_device::branch_condition Condition, hyperstone_device::condition_set CondSet>
void hyperstone_device::hyperstone_db()
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- if (COND_SET)
+ const bool taken = CondSet ? (SR & condition_masks[Condition]) : !(SR & condition_masks[Condition]);
+ if (!m_core->delay_slot)
{
- if (SR & condition_masks[CONDITION])
+ m_core->delay_slot_taken = 0;
+ if (taken)
{
const int32_t offset = decode_pcrel();
- check_delay_PC();
m_core->delay_slot = 1;
m_core->delay_pc = PC + offset;
- m_core->intblock = 3;
+ m_core->intblock = 2;
+
m_core->icount -= m_core->clock_cycles_2;
}
else
{
ignore_pcrel();
- check_delay_PC();
+
m_core->icount -= m_core->clock_cycles_1;
}
}
else
{
- if (SR & condition_masks[CONDITION])
+ m_core->delay_slot = 0;
+ m_core->delay_slot_taken = 1;
+ if (taken)
{
- ignore_pcrel();
- check_delay_PC();
- m_core->icount -= m_core->clock_cycles_1;
+ const int32_t offset = decode_pcrel();
+ PC = m_core->delay_pc + offset;
+ SR &= ~M_MASK;
+
+ m_core->icount -= m_core->clock_cycles_2;
}
else
{
- const int32_t offset = decode_pcrel();
- check_delay_PC();
- m_core->delay_slot = 1;
- m_core->delay_pc = PC + offset;
- m_core->intblock = 3;
- m_core->icount -= m_core->clock_cycles_2;
+ ignore_pcrel();
+ PC = m_core->delay_pc;
+
+ m_core->icount -= m_core->clock_cycles_1;
}
}
}
@@ -2540,55 +2628,61 @@ void hyperstone_device::hyperstone_db()
void hyperstone_device::hyperstone_dbr()
{
const int32_t offset = decode_pcrel();
- check_delay_PC();
+ if (!m_core->delay_slot)
+ {
+ m_core->delay_pc = PC + offset;
+ m_core->delay_slot = 1;
+ m_core->delay_slot_taken = 0;
+ m_core->intblock = 2;
- m_core->delay_slot = 1;
- m_core->delay_pc = PC + offset;
- m_core->intblock = 3;
+ m_core->icount -= m_core->clock_cycles_2;
+ }
+ else
+ {
+ m_core->delay_slot = 0;
+ m_core->delay_slot_taken = 1;
- m_core->icount -= m_core->clock_cycles_2;
+ PC = m_core->delay_pc + offset;
+ SR &= ~M_MASK;
+
+ m_core->icount -= m_core->clock_cycles_2;
+ }
}
void hyperstone_device::hyperstone_frame()
{
- check_delay_PC();
+ check_delay_pc();
- uint8_t realfp = GET_FP - SRC_CODE;
- uint8_t dst_code = DST_CODE;
+ const uint8_t realfp = GET_FP - SRC_CODE;
+ const uint8_t dst_code = DST_CODE;
SET_FP(realfp);
SET_FL(dst_code);
SR &= ~M_MASK;
- int8_t difference = ((SP & 0x1fc) >> 2) + (64 - 10) - (realfp + GET_FL); // really it's 7 bits
-
- /* convert to 8 bits */
- if(difference > 63)
- difference = (int8_t)(difference|0x80);
- else if( difference < -64 )
- difference = difference & 0x7f;
+ int difference = util::sext(((SP & 0x1fc) >> 2) + (64 - 10) - (realfp + GET_FL), 7);
if (difference < 0) // else it's finished
{
- bool tmp_flag = SP >= UB;
+ const bool tmp_flag = SP >= UB;
- for (; difference < 0; difference++)
+ do
{
WRITE_W(SP, m_core->local_regs[(SP & 0xfc) >> 2]);
SP += 4;
+ difference++;
}
+ while (difference < 0);
if (tmp_flag)
- {
- execute_exception(get_trap_addr(TRAPNO_FRAME_ERROR));
- }
+ execute_exception(TRAPNO_FRAME_ERROR);
}
// TODO: More than 1 cycle!
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::reg_bank SRC_GLOBAL>
+template <hyperstone_device::reg_bank SrcGlobal>
void hyperstone_device::hyperstone_call()
{
uint16_t imm_1 = m_pr16(PC);
@@ -2621,13 +2715,13 @@ void hyperstone_device::hyperstone_call()
extra_s |= 0xffffc000;
}
- check_delay_PC();
+ check_delay_pc();
uint32_t fp = GET_FP;
- uint32_t src_code = SRC_GLOBAL ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
+ uint32_t src_code = SrcGlobal ? SRC_CODE : ((SRC_CODE + fp) & 0x3f);
uint32_t dst_code = DST_CODE;
- uint32_t sreg = (SRC_GLOBAL && src_code == SR_REGISTER) ? 0 : (SRC_GLOBAL ? m_core->global_regs : m_core->local_regs)[src_code];
+ uint32_t sreg = (SrcGlobal && src_code == SR_REGISTER) ? 0 : (SrcGlobal ? m_core->global_regs : m_core->local_regs)[src_code];
if (!DST_CODE)
dst_code = 16;
@@ -2650,29 +2744,29 @@ void hyperstone_device::hyperstone_call()
m_core->icount -= m_core->clock_cycles_1;
}
-template <hyperstone_device::branch_condition CONDITION, hyperstone_device::condition_set COND_SET>
+template <hyperstone_device::branch_condition Condition, hyperstone_device::condition_set CondSet>
void hyperstone_device::hyperstone_b()
{
static const uint32_t condition_masks[6] = { V_MASK, Z_MASK, C_MASK, C_MASK | Z_MASK, N_MASK, N_MASK | Z_MASK };
- if (COND_SET)
+ if (CondSet)
{
- if (SR & condition_masks[CONDITION])
+ if (SR & condition_masks[Condition])
{
hyperstone_br();
}
else
{
ignore_pcrel();
- check_delay_PC();
+ check_delay_pc();
m_core->icount -= m_core->clock_cycles_1;
}
}
else
{
- if (SR & condition_masks[CONDITION])
+ if (SR & condition_masks[Condition])
{
ignore_pcrel();
- check_delay_PC();
+ check_delay_pc();
m_core->icount -= m_core->clock_cycles_1;
}
else
@@ -2681,3 +2775,14 @@ void hyperstone_device::hyperstone_b()
}
}
}
+
+void hyperstone_device::hyperstone_br()
+{
+ const int32_t offset = decode_pcrel();
+ check_delay_pc();
+
+ PC += offset;
+ SR &= ~M_MASK;
+
+ m_core->icount -= m_core->clock_cycles_2;
+}
diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp
index ac2d6e070de..03cea0595a7 100644
--- a/src/devices/cpu/es5510/es5510.cpp
+++ b/src/devices/cpu/es5510/es5510.cpp
@@ -2,10 +2,10 @@
// copyright-holders:Christian Brunschen
/***************************************************************************************
*
- * es5510.c - Ensoniq ES5510 (ESP) emulation
+ * es5510.cpp - Ensoniq ES5510 (ESP) emulation
* by Christian Brunschen
*
- * TODO
+ * TODO:
* gunlock and clones: Glitch sound after game over once (MT #07861)
* DRAM Size isn't verified, differs per machines?
*
@@ -340,16 +340,6 @@ static inline char * DESCRIBE_INSTR(char *s, uint64_t instr, uint32_t gpr, const
uint8_t es5510_device::host_r(address_space &space, offs_t offset)
{
// printf("%06x: DSP read offset %04x (data is %04x)\n",pc(),offset,dsp_ram[offset]);
-
- // VFX hack (FIXME: this is disgusting)
- if (core_stricmp(machine().system().name, "vfx") == 0)
- {
- if (pc == 0xc091f0)
- {
- return downcast<m68000_base_device &>(space.device()).state_int(M68K_D2);
- }
- }
-
switch(offset)
{
case 0x00: LOG("ES5510: Host Read GPR latch[2]: %02x\n", (gpr_latch >> 16) & 0xff); return (gpr_latch >> 16) & 0xff;
@@ -670,10 +660,6 @@ uint32_t es5510_device::execute_max_cycles() const noexcept {
return 1;
}
-uint32_t es5510_device::execute_input_lines() const noexcept {
- return 1;
-}
-
void es5510_device::execute_set_input(int linenum, int state) {
if (linenum == ES5510_HALT) {
halt_asserted = (state == ASSERT_LINE);
diff --git a/src/devices/cpu/es5510/es5510.h b/src/devices/cpu/es5510/es5510.h
index 9f8d10035ca..f64c810906a 100644
--- a/src/devices/cpu/es5510/es5510.h
+++ b/src/devices/cpu/es5510/es5510.h
@@ -126,14 +126,13 @@ public:
void write_to_dol(int32_t value);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual space_config_vector memory_space_config() const override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override;
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override;
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int linenum, int state) override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/es5510/es5510d.h b/src/devices/cpu/es5510/es5510d.h
index e80b4a3fe36..7814a8ee17f 100644
--- a/src/devices/cpu/es5510/es5510d.h
+++ b/src/devices/cpu/es5510/es5510d.h
@@ -7,8 +7,8 @@
*
***************************************************************************/
-#ifndef MAME_CPU_ES5510_ES5510DASM_H
-#define MAME_CPU_ES5510_ES5510DASM_H
+#ifndef MAME_CPU_ES5510_ES5510D_H
+#define MAME_CPU_ES5510_ES5510D_H
#pragma once
@@ -22,4 +22,4 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_ES5510_ES5510D_H
diff --git a/src/devices/cpu/esrip/esrip.cpp b/src/devices/cpu/esrip/esrip.cpp
index ac99aec9290..7a50020d05d 100644
--- a/src/devices/cpu/esrip/esrip.cpp
+++ b/src/devices/cpu/esrip/esrip.cpp
@@ -1739,17 +1739,6 @@ uint32_t esrip_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t esrip_device::execute_input_lines() const noexcept
-{
- return 0;
-}
-
-
-//-------------------------------------------------
// execute_set_input - act on a changed input/
// interrupt line
//-------------------------------------------------
@@ -1761,7 +1750,7 @@ void esrip_device::execute_set_input(int inputnum, int state)
void esrip_device::execute_run()
{
- int calldebugger = (machine().debug_flags & DEBUG_FLAG_ENABLED) != 0;
+ const bool calldebugger = debugger_enabled();
uint8_t status;
/* I think we can get away with placing this outside of the loop */
diff --git a/src/devices/cpu/esrip/esrip.h b/src/devices/cpu/esrip/esrip.h
index f58b2d41a97..7b1f2153a0f 100644
--- a/src/devices/cpu/esrip/esrip.h
+++ b/src/devices/cpu/esrip/esrip.h
@@ -103,16 +103,15 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
void make_ops();
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/evolution/evo.h b/src/devices/cpu/evolution/evo.h
index 992e302e835..ce5884d2dab 100644
--- a/src/devices/cpu/evolution/evo.h
+++ b/src/devices/cpu/evolution/evo.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:David Haywood
-#ifndef MAME_CPU_EVO_EVO_H
-#define MAME_CPU_EVO_EVO_H
+#ifndef MAME_CPU_EVOLUTION_EVO_H
+#define MAME_CPU_EVOLUTION_EVO_H
#pragma once
@@ -13,12 +13,11 @@ public:
evo_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -37,4 +36,4 @@ private:
DECLARE_DEVICE_TYPE(EVOLUTION_CPU, evo_cpu_device)
-#endif // MAME_CPU_EVO_EVO_H
+#endif // MAME_CPU_EVOLUTION_EVO_H
diff --git a/src/devices/cpu/f2mc16/f2mc16.cpp b/src/devices/cpu/f2mc16/f2mc16.cpp
index 7d85bff282a..546d240f543 100644
--- a/src/devices/cpu/f2mc16/f2mc16.cpp
+++ b/src/devices/cpu/f2mc16/f2mc16.cpp
@@ -12,6 +12,8 @@
There are two main branches: F and L. They appear to be compatible with
each other as far as their extentions to the base ISA not conflicting.
+ TODO: Correction values applied to instruction cycles.
+
***************************************************************************/
#include "emu.h"
@@ -35,6 +37,7 @@ f2mc16_device::f2mc16_device(const machine_config &mconfig, device_type type, co
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0)
, m_program(nullptr)
+ , m_irq_level((7 << 13) | 0x1fff)
{
m_tmp8 = 0;
m_tmp16 = 0;
@@ -59,10 +62,10 @@ void f2mc16_device::device_start()
set_icountptr(m_icount);
- state_add(F2MC16_PCB, "PCB", m_pcb);
- state_add(F2MC16_PC, "PC", m_pc).formatstr("%04X");
+ state_add(F2MC16_PCB, "PCB", m_pcb).callimport();
+ state_add(F2MC16_PC, "PC", m_pc).callimport().formatstr("%04X");
state_add(STATE_GENPC, "GENPC", m_temp).callimport().callexport().noshow();
- state_add(STATE_GENPCBASE, "CURPC", m_temp).callimport().callexport().noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_pcbase).callimport().noshow();
state_add(F2MC16_PS, "PS", m_ps).formatstr("%04X");
state_add(STATE_GENFLAGS, "GENFLAGS", m_ps).callimport().formatstr("%7s").noshow();
state_add(F2MC16_DTB, "DTB", m_dtb).formatstr("%02X");
@@ -108,11 +111,14 @@ void f2mc16_device::device_start()
save_item(NAME(m_dpr));
save_item(NAME(m_tmp8));
save_item(NAME(m_prefix));
+ save_item(NAME(m_pcbase));
save_item(NAME(m_acc));
save_item(NAME(m_temp));
save_item(NAME(m_tmp32));
save_item(NAME(m_tmpea));
save_item(NAME(m_prefix_valid));
+ save_item(NAME(m_irq_level));
+ save_item(NAME(m_rmw));
}
void f2mc16_device::device_reset()
@@ -125,16 +131,11 @@ void f2mc16_device::device_reset()
m_dpr = 0x01;
m_dtb = 0;
- for (int &entry : m_vector_level)
- {
- entry = 7;
- }
- m_outstanding_irqs = 0;
-
m_pc = read_16_vector(0xffffdc);
m_pcb = read_8_vector(0xffffde);
m_prefix_valid = false;
+ m_rmw = false;
}
void f2mc16_device::state_import(const device_state_entry &entry)
@@ -142,9 +143,19 @@ void f2mc16_device::state_import(const device_state_entry &entry)
switch (entry.index())
{
case STATE_GENPC:
+ m_pcbase = m_temp;
+ m_pc = (m_pcbase & 0xffff);
+ m_pcb = (m_pcbase >> 16) & 0xff;
+ break;
+
case STATE_GENPCBASE:
- m_pc = (m_temp & 0xffff);
- m_pcb = (m_temp >> 16) & 0xff;
+ m_pc = (m_pcbase & 0xffff);
+ m_pcb = (m_pcbase >> 16) & 0xff;
+ break;
+
+ case F2MC16_PCB:
+ case F2MC16_PC:
+ m_pcbase = ((m_pcb & 0xff) << 16) | m_pc;
break;
case F2MC16_RW0: write_rwX(0, m_temp); break;
@@ -203,7 +214,6 @@ void f2mc16_device::state_export(const device_state_entry &entry)
case F2MC16_R7: m_temp = read_rX(7); break;
case STATE_GENPC:
- case STATE_GENPCBASE:
m_temp = m_pc;
m_temp |= (m_pcb << 16);
break;
@@ -231,35 +241,53 @@ void f2mc16_device::execute_run()
{
while (m_icount > 0)
{
- if (m_outstanding_irqs && !m_prefix_valid)
+ if (!m_prefix_valid && m_irq_level < m_ps && (m_ps & F_I))
{
- int cpulevel = m_ps >> 13;
-
- for (int irq = 0; irq < 256; irq++)
+ uint8_t irq_level = m_irq_level;
+ uint8_t irq_vector = standard_irq_callback(irq_level, m_pc);
+ if (irq_vector)
{
- if (m_vector_level[irq] < cpulevel)
- {
- take_irq(irq, m_vector_level[irq]);
- break;
- }
+ take_irq_vector(irq_vector);
+ m_ps = (m_ps | (7 << 13)) & irq_level;
}
}
//m_icount--;
if (!m_prefix_valid)
- debugger_instruction_hook((m_pcb<<16) | m_pc);
- u8 opcode = read_8((m_pcb<<16) | m_pc);
+ {
+ m_pcbase = (m_pcb << 16) | m_pc;
+ debugger_instruction_hook((m_pcb << 16) | m_pc);
+ }
+ u8 opcode = read_8((m_pcb << 16) | m_pc);
switch (opcode)
{
- case 0x00: // NOP
+ // NOP
+ case 0x00:
m_icount--;
m_pc++;
break;
+ // INT9
+ case 0x01:
+ m_pc++;
+ take_irq_vector(9);
+ m_ps &= ~F_I;
+ break;
+
+ // NEG A
case 0x03:
- // util::stream_format(stream, "NEG A");
+ m_tmp8 = doSUB_8(0, m_acc & 0xff);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_tmp8);
+ m_pc++;
+ m_icount -= 2;
break;
// PCB prefix
@@ -299,7 +327,7 @@ void f2mc16_device::execute_run()
// LINK #imm8
case 0x08:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
if (m_ps & F_S)
{
m_ssp-=2;
@@ -335,7 +363,7 @@ void f2mc16_device::execute_run()
// MOV RP, #imm8
case 0x0a:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1)) & 0x1f;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1)) & 0x1f;
m_ps &= 0xe0ff;
m_ps |= (m_tmp8<<8);
m_pc += 2;
@@ -344,7 +372,7 @@ void f2mc16_device::execute_run()
// NEGW A
case 0x0b:
- m_tmp16 = doSUB_16(0, m_acc&0xffff);
+ m_tmp16 = doSUB_16(0, m_acc & 0xffff);
m_acc &= 0xffff0000;
m_acc |= m_tmp16;
setNZ_16(m_tmp16);
@@ -428,15 +456,15 @@ void f2mc16_device::execute_run()
break;
case 0x10:
- // stream << "CMR ";
+ logerror("%s: Unimplemented F2MC instruction CMR\n", machine().describe_context());
break;
case 0x11:
- // stream << "NCC ";
+ logerror("%s: Unimplemented F2MC instruction NCC\n", machine().describe_context());
break;
case 0x12:
- // stream << "SUBDC A";
+ logerror("%s: Unimplemented F2MC instruction SUBDC A\n", machine().describe_context());
break;
// EXT
@@ -451,7 +479,7 @@ void f2mc16_device::execute_run()
{
m_acc &= 0xffff00ff;
if ((m_acc & 0xff) == 0)
- m_pc |= F_Z;
+ m_ps |= F_Z;
}
m_pc++;
m_icount--;
@@ -478,14 +506,14 @@ void f2mc16_device::execute_run()
// ADDSP #imm8
case 0x17:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
if (m_ps & F_S)
{
- m_ssp += m_tmp8;
+ m_ssp += s8(m_tmp8);
}
else
{
- m_usp += m_tmp8;
+ m_usp += s8(m_tmp8);
}
m_pc += 2;
m_icount -= 3;
@@ -493,7 +521,7 @@ void f2mc16_device::execute_run()
// ADDL A, #imm32
case 0x18:
- m_tmp32 = read_32((m_pcb << 16) | (m_pc+1));
+ m_tmp32 = read_32((m_pcb << 16) | (m_pc + 1));
m_acc = doADD_32(m_acc, m_tmp32);
m_pc += 5;
m_icount -= 4;
@@ -501,7 +529,7 @@ void f2mc16_device::execute_run()
// SUBL A, #imm32
case 0x19:
- m_tmp32 = read_32((m_pcb << 16) | (m_pc+1));
+ m_tmp32 = read_32((m_pcb << 16) | (m_pc + 1));
m_acc = doSUB_32(m_acc, m_tmp32);
m_pc += 5;
m_icount -= 4;
@@ -509,13 +537,21 @@ void f2mc16_device::execute_run()
// MOV ILM, #imm8
case 0x1a:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1)) & 7;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1)) & 7;
m_ps &= 0x1fff;
m_ps |= (m_tmp8<<13);
m_pc += 2;
m_icount -= 2;
break;
+ // CMPL A, #imm32
+ case 0x1b:
+ m_tmp32 = read_32((m_pcb << 16) | (m_pc + 1));
+ doCMP_32(m_acc, m_tmp32);
+ m_pc += 5;
+ m_icount -= 3;
+ break;
+
// EXTW
case 0x1c:
m_acc &= 0xffff;
@@ -550,28 +586,43 @@ void f2mc16_device::execute_run()
m_icount -= 2;
break;
+ // ADDSP #imm16
+ case 0x1f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ if (m_ps & F_S)
+ {
+ m_ssp += m_tmp16;
+ }
+ else
+ {
+ m_usp += m_tmp16;
+ }
+ m_pc += 3;
+ m_icount -= 3;
+ break;
+
case 0x20:
- // util::stream_format(stream, "ADD A, $%02x", operand);
+ logerror("%s: Unimplemented F2MC instruction ADD A, dir\n", machine().describe_context());
break;
case 0x21:
- // util::stream_format(stream, "SUB A, $%02x", operand);
+ logerror("%s: Unimplemented F2MC instruction SUB A, dir\n", machine().describe_context());
break;
case 0x22:
- // stream << "ADDC A";
+ logerror("%s: Unimplemented F2MC instruction ADDC A\n", machine().describe_context());
break;
// CMP A
case 0x23:
- doCMP_16(m_acc>>16, m_acc&0xffff);
+ doCMP_16(m_acc>>16, m_acc & 0xffff);
m_pc++;
m_icount--;
break;
// AND CCR, #imm8
case 0x24:
- m_tmp16 = read_8((m_pcb<<16) | (m_pc+1)) | 0xff80;
+ m_tmp16 = read_8((m_pcb << 16) | (m_pc + 1)) | 0xff80;
m_ps &= m_tmp16;
m_pc += 2;
m_icount -= 3;
@@ -579,18 +630,18 @@ void f2mc16_device::execute_run()
// OR CCR, #imm8
case 0x25:
- m_tmp16 = read_8((m_pcb<<16) | (m_pc+1)) & 0x7f;
+ m_tmp16 = read_8((m_pcb << 16) | (m_pc + 1)) & 0x7f;
m_ps |= m_tmp16;
m_pc += 2;
m_icount -= 3;
break;
case 0x26:
- // stream << "DIVU A";
+ logerror("%s: Unimplemented F2MC instruction DIVU A\n", machine().describe_context());
break;
case 0x27:
- // stream << "MULU A";
+ logerror("%s: Unimplemented F2MC instruction MULU A\n", machine().describe_context());
break;
// ADDW A
@@ -613,7 +664,7 @@ void f2mc16_device::execute_run()
// CBNE A, #imm8
case 0x2a:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
doCMP_8(m_acc & 0xff, m_tmp8);
if (m_ps & F_Z) // they're equal
{
@@ -684,9 +735,9 @@ void f2mc16_device::execute_run()
// ADD A, #imm8
case 0x30:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_tmp8 = doADD_8(m_acc & 0xff, m_tmp8);
- m_acc &= ~0xff;
+ m_acc &= 0xffff0000;
m_acc |= m_tmp8;
m_pc += 2;
m_icount -= 2;
@@ -694,21 +745,21 @@ void f2mc16_device::execute_run()
// SUB A, #imm8
case 0x31:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_tmp8 = doSUB_8(m_acc & 0xff, m_tmp8);
- m_acc &= ~0xff;
+ m_acc &= 0xffff0000;
m_acc |= m_tmp8;
m_pc += 2;
m_icount -= 2;
break;
case 0x32:
- // stream << "SUBC A";
+ logerror("%s: Unimplemented F2MC instruction SUBC A\n", machine().describe_context());
break;
// CMP A, #imm8
case 0x33:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
doCMP_8(m_acc & 0xff, m_tmp8);
m_pc += 2;
m_icount -= 2;
@@ -716,7 +767,7 @@ void f2mc16_device::execute_run()
// AND A, #imm8
case 0x34:
- m_tmp32 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp32 = read_8((m_pcb << 16) | (m_pc + 1));
m_tmp32 |= 0xffffff00;
m_acc &= m_tmp32;
setNZ_8(m_acc & 0xff);
@@ -727,7 +778,7 @@ void f2mc16_device::execute_run()
// OR A, #imm8
case 0x35:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_acc |= m_tmp8;
setNZ_8(m_acc & 0xff);
m_ps &= ~F_V;
@@ -737,7 +788,7 @@ void f2mc16_device::execute_run()
// XOR A, #imm8
case 0x36:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_acc ^= m_tmp8;
setNZ_8(m_acc & 0xff);
m_ps &= ~F_V;
@@ -756,7 +807,7 @@ void f2mc16_device::execute_run()
// ADDW A, #imm16
case 0x38:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_tmp16 = doADD_16(m_acc & 0xffff, m_tmp16);
m_acc &= 0xffff0000;
m_acc |= m_tmp16;
@@ -766,7 +817,7 @@ void f2mc16_device::execute_run()
// SUBW A, #imm16
case 0x39:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_tmp16 = doSUB_16(m_acc & 0xffff, m_tmp16);
m_acc &= 0xffff0000;
m_acc |= m_tmp16;
@@ -776,8 +827,8 @@ void f2mc16_device::execute_run()
// CWBNE A, #imm16, disp8
case 0x3a:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+3));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
doCMP_16(m_acc & 0xffff, m_tmp16);
if (m_ps & F_Z)
{
@@ -786,14 +837,14 @@ void f2mc16_device::execute_run()
}
else
{
- m_pc = m_pc + 4 + (s8)m_tmp8;
+ m_pc = m_pc + 4 + s8(m_tmp8);
m_icount -= 5;
}
break;
// CMPW A, #imm16
case 0x3b:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
doCMP_16(m_acc & 0xffff, m_tmp16);
m_pc += 3;
m_icount -= 2;
@@ -801,7 +852,7 @@ void f2mc16_device::execute_run()
// ANDW A, #imm16
case 0x3c:
- m_tmp32 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp32 = read_16((m_pcb << 16) | (m_pc + 1));
m_tmp32 |= 0xffff0000;
m_acc &= m_tmp32;
setNZ_16(m_acc & 0xffff);
@@ -812,7 +863,7 @@ void f2mc16_device::execute_run()
// ORW A, #imm16
case 0x3d:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_acc |= m_tmp16;
setNZ_16(m_acc & 0xffff);
m_ps &= ~F_V;
@@ -822,7 +873,7 @@ void f2mc16_device::execute_run()
// XORW A, #imm16
case 0x3e:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_acc ^= m_tmp16;
setNZ_16(m_acc & 0xffff);
m_ps &= ~F_V;
@@ -841,7 +892,7 @@ void f2mc16_device::execute_run()
// MOV A, dir
case 0x40:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+1)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 1)));
m_tmp8 = read_8(m_tmpea);
m_acc <<= 16;
m_acc |= m_tmp8;
@@ -852,7 +903,7 @@ void f2mc16_device::execute_run()
// MOV dir, A
case 0x41:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+1)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 1)));
write_8(m_tmpea, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
m_pc += 2;
@@ -861,7 +912,7 @@ void f2mc16_device::execute_run()
// MOV A, #imm8
case 0x42:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
m_acc |= m_tmp8;
setNZ_8(m_tmp8);
@@ -871,7 +922,7 @@ void f2mc16_device::execute_run()
// MOVX A, #imm8
case 0x43:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
m_acc |= m_tmp8;
if (m_acc & 0x80)
@@ -885,8 +936,8 @@ void f2mc16_device::execute_run()
// MOV dir, #imm8
case 0x44:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+1)));
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 1)));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
write_8(m_tmpea, m_tmp8);
m_pc += 3;
m_icount -= 5;
@@ -923,7 +974,7 @@ void f2mc16_device::execute_run()
// MOVW A, dir
case 0x48:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+1)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 1)));
m_tmp16 = read_16(m_tmpea);
m_acc <<= 16;
m_acc |= m_tmp16;
@@ -934,7 +985,7 @@ void f2mc16_device::execute_run()
// MOVW dir, A
case 0x49:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+1)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 1)));
write_16(m_tmpea, m_acc & 0xffff);
setNZ_16(m_acc & 0xffff);
m_pc += 2;
@@ -943,7 +994,7 @@ void f2mc16_device::execute_run()
// MOVW A, #imm16
case 0x4a:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
m_acc |= m_tmp16;
setNZ_16(m_tmp16);
@@ -951,9 +1002,9 @@ void f2mc16_device::execute_run()
m_pc += 3;
break;
- // MOVL A, #imm16
+ // MOVL A, #imm32
case 0x4b:
- m_acc = read_32((m_pcb<<16) | (m_pc + 1));
+ m_acc = read_32((m_pcb << 16) | (m_pc + 1));
setNZ_32(m_acc);
m_icount -= 3;
m_pc += 5;
@@ -982,7 +1033,7 @@ void f2mc16_device::execute_run()
// PUSHW (register bitmap)
case 0x4f:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
for (int i = 0; i < 8; i++)
{
if (m_tmp8 & (1<<i))
@@ -1004,7 +1055,7 @@ void f2mc16_device::execute_run()
// MOV A, io
case 0x50:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
m_acc |= read_8(m_tmpea);
setNZ_8(m_acc & 0xff);
@@ -1014,7 +1065,7 @@ void f2mc16_device::execute_run()
// MOV io, A
case 0x51:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
write_8(m_tmpea, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
m_pc += 2;
@@ -1023,12 +1074,12 @@ void f2mc16_device::execute_run()
// MOV A, addr16
case 0x52:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_acc |= read_8((m_prefix<<16) | m_tmp16);
+ m_acc |= read_8((m_prefix << 16) | m_tmp16);
}
else
{
@@ -1041,11 +1092,11 @@ void f2mc16_device::execute_run()
// MOV addr16, A
case 0x53:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
if (m_prefix_valid)
{
m_prefix_valid = false;
- write_8((m_prefix<<16) | m_tmp16, m_acc & 0xff);
+ write_8((m_prefix << 16) | m_tmp16, m_acc & 0xff);
}
else
{
@@ -1058,8 +1109,8 @@ void f2mc16_device::execute_run()
// MOV io, #imm8
case 0x54:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
write_8(m_tmpea, m_tmp8);
m_pc += 3;
m_icount -= 5;
@@ -1067,20 +1118,36 @@ void f2mc16_device::execute_run()
// MOVW io, #imm16
case 0x56:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
write_16(m_tmpea, m_tmp16);
m_pc += 4;
m_icount -= 5;
break;
+ // MOVX A, addr16
case 0x57:
- // util::stream_format(stream, "MOVX A, $%04x", opcodes.r16(pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ m_acc <<= 16;
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
+ }
+ m_tmp16 = (m_tmp8 & 0x80) ? (m_tmp8 | 0xff00) : m_tmp8;
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 3;
+ m_icount -= 4;
break;
// MOVW A, io
case 0x58:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
m_acc |= read_16(m_tmpea);
setNZ_16(m_acc & 0xffff);
@@ -1090,7 +1157,7 @@ void f2mc16_device::execute_run()
// MOVW io, A
case 0x59:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 1));
write_16(m_tmpea, m_acc & 0xffff);
setNZ_16(m_acc & 0xffff);
m_pc += 2;
@@ -1099,12 +1166,12 @@ void f2mc16_device::execute_run()
// MOVW A, addr16
case 0x5a:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_acc <<= 16;
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_acc |= read_16((m_prefix<<16) | m_tmp16);
+ m_acc |= read_16((m_prefix << 16) | m_tmp16);
}
else
{
@@ -1117,11 +1184,11 @@ void f2mc16_device::execute_run()
// MOVW addr16, A
case 0x5b:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
if (m_prefix_valid)
{
m_prefix_valid = false;
- write_16((m_prefix<<16) | m_tmp16, m_acc & 0xffff);
+ write_16((m_prefix << 16) | m_tmp16, m_acc & 0xffff);
}
else
{
@@ -1157,7 +1224,7 @@ void f2mc16_device::execute_run()
// POPW register list
case 0x5f:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
for (int i = 7; i >= 0; i--)
{
if (m_tmp8 & (1<<i))
@@ -1178,24 +1245,31 @@ void f2mc16_device::execute_run()
take_branch();
break;
+ // JMP @A
case 0x61:
-// stream << "JMP @A";
+ m_pc = (m_pcb << 16) | (m_acc & 0xffff);
+ m_icount -= 2;
break;
// JMP addr16
case 0x62:
- m_pc = read_16((m_pcb<<16) | (m_pc+1));
+ m_pc = read_16((m_pcb << 16) | (m_pc + 1));
m_icount -= 3;
break;
+ // JMPP addr24
case 0x63:
- // util::stream_format(stream, "JMPP #$%06x", opcodes.r8(pc+3)<<16|opcodes.r8(pc+2)<<8|opcodes.r8(pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
+ m_pcb = m_tmp8;
+ m_pc = m_tmp16;
+ m_icount -= 4;
break;
// CALL addr16
case 0x64:
m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
- push_16(m_pc+3);
+ push_16(m_pc + 3);
m_pc = m_tmp16;
m_icount -= 6;
break;
@@ -1205,7 +1279,7 @@ void f2mc16_device::execute_run()
m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
push_16(m_pcb);
- push_16(m_pc+4);
+ push_16(m_pc + 4);
m_pcb = m_tmp8;
m_pc = m_tmp16;
m_icount -= 10;
@@ -1224,107 +1298,120 @@ void f2mc16_device::execute_run()
m_icount -= 4;
break;
- // RETI
- case 0x6b:
- {
- bool bFoundVec = false;
+ // INT #vct8
+ case 0x68:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
+ m_pc += 2;
+ take_irq_vector(m_tmp8);
+ m_ps &= ~F_I;
+ break;
- // there's an IRQ chaining facility, let's do it
- if (m_outstanding_irqs)
- {
- int cpulevel = peek_stack_16() >> 13;
- for (int irq = 0; irq < 256; irq++)
- {
- if (m_vector_level[irq] < cpulevel)
- {
- m_ps = read_16((m_ssb << 16) | m_ssp);
- m_ps |= F_S;
- m_ps &= ~0x7000;
- m_ps |= (m_vector_level[irq] & 7) << 13;
-
- u32 uVecAddr = 0xfffffc - (irq * 4);
- m_pc = read_16(uVecAddr);
- m_pcb = read_8(uVecAddr + 2);
- bFoundVec = true;
- printf("RETI vector chain to %02x%04x\n", m_pcb, m_pc);
+ // INT addr16
+ case 0x69:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ m_pc += 3;
+ take_irq();
+ m_pc = m_tmp16;
+ m_ps &= ~F_I;
+ break;
+
+ // INTP addr24
+ case 0x6a:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
+ m_pc += 4;
+ take_irq();
+ m_pcb = m_tmp8;
+ m_pc = m_tmp16;
+ m_ps &= ~F_I;
break;
- }
- }
- }
- // if no new IRQ was found or could be dispatched by the level
- if (!bFoundVec)
- {
- m_ps = pull_16_ssp();
- m_pc = pull_16_ssp();
- m_tmp16 = pull_16_ssp();
- m_pcb = m_tmp16 & 0xff;
- m_dtb = m_tmp16 >> 8;
- m_tmp16 = pull_16_ssp();
- m_adb = m_tmp16 & 0xff;
- m_dpr = m_tmp16 >> 8;
- m_acc = 0;
- m_acc = pull_16_ssp();
- m_acc |= (pull_16_ssp() << 16);
- m_icount -= 17;
- }
- }
+ // RETI
+ case 0x6b:
+ m_ps = pull_16_ssp();
+ m_pc = pull_16_ssp();
+ m_tmp16 = pull_16_ssp();
+ m_pcb = m_tmp16 & 0xff;
+ m_dtb = m_tmp16 >> 8;
+ m_tmp16 = pull_16_ssp();
+ m_adb = m_tmp16 & 0xff;
+ m_dpr = m_tmp16 >> 8;
+ m_acc = 0;
+ m_acc = pull_16_ssp();
+ m_acc |= (pull_16_ssp() << 16);
+ m_icount -= 17;
break;
case 0x6c: // bit operation instructions
- opcodes_bo6c(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_bo6c(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x6e: // string instructions
- opcodes_str6e(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_str6e(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x6f: // 2-byte instructions
- opcodes_2b6f(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_2b6f(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x70: // ea-type instructions
- opcodes_ea70(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea70(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x71: // ea-type instructions
- opcodes_ea71(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea71(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x72: // ea-type instructions
- opcodes_ea72(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea72(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x73: // ea-type instructions
- opcodes_ea73(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea73(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x74: // ea-type instructions
- opcodes_ea74(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea74(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x75: // ea-type instructions
- opcodes_ea75(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea75(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x76: // ea-type instructions
- opcodes_ea76(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea76(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x77: // ea-type instructions
- opcodes_ea77(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea77(read_8((m_pcb << 16) | (m_pc + 1)));
break;
case 0x78: // ea-type instructions
- opcodes_ea78(read_8((m_pcb<<16) | (m_pc+1)));
+ opcodes_ea78(read_8((m_pcb << 16) | (m_pc + 1)));
+ break;
+
+ case 0x79: // RWi,ea-type instructions
+ opcodes_rwiea79(read_8((m_pcb << 16) | (m_pc + 1)));
+ break;
+
+ case 0x7a: // Ri,ea-type instructions
+ opcodes_riea7a(read_8((m_pcb << 16) | (m_pc + 1)));
+ break;
+
+ case 0x7b: // RWi,ea-type instructions
+ opcodes_rwiea7b(read_8((m_pcb << 16) | (m_pc + 1)));
break;
- case 0x7a: // ea RWi-type instructions
- opcodes_rwi7a(read_8((m_pcb<<16) | (m_pc+1)));
+ case 0x7c: // ea,Ri-type instructions
+ opcodes_eari7c(read_8((m_pcb << 16) | (m_pc + 1)));
break;
- case 0x7b: // ea RWi-type instructions
- opcodes_rwi7b(read_8((m_pcb<<16) | (m_pc+1)));
+ case 0x7d: // ea,RWi-type instructions
+ opcodes_earwi7d(read_8((m_pcb << 16) | (m_pc + 1)));
+ break;
+
+ case 0x7f: // RWi,ea-type instructions
+ opcodes_rwiea7f(read_8((m_pcb << 16) | (m_pc + 1)));
break;
// MOV A, Rx
@@ -1340,7 +1427,7 @@ void f2mc16_device::execute_run()
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
m_acc <<= 16;
m_acc |= read_rwX(opcode & 7);
- setNZ_16(m_acc & 0xff);
+ setNZ_16(m_acc & 0xffff);
m_pc++;
m_icount -= 2;
break;
@@ -1363,7 +1450,7 @@ void f2mc16_device::execute_run()
// MOV Rx, #imm8
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
write_rX(opcode & 7, m_tmp8);
setNZ_8(m_tmp8);
m_icount -= 2;
@@ -1372,7 +1459,7 @@ void f2mc16_device::execute_run()
// MOVW RWx, #imm16
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+1));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 1));
write_rwX(opcode & 7, m_tmp16);
setNZ_16(m_tmp16);
m_icount -= 2;
@@ -1381,13 +1468,21 @@ void f2mc16_device::execute_run()
// MOVX A, Rx
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- // util::stream_format(stream, "MOVX A, R%d", (opcode & 0x7));
+ m_acc <<= 16;
+ m_acc |= read_rX(opcode & 7);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc++;
+ m_icount -= 2;
break;
// MOVW A, @RWx + disp8
case 0xb8: case 0xb9: case 0xba: case 0xbb: case 0xbc: case 0xbd: case 0xbe: case 0xbf:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
- m_tmp16 = read_rwX(opcode & 0x7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
+ m_tmp16 = read_rwX(opcode & 0x7) + s8(m_tmp8);
m_tmpea = getRWbank(opcode & 0x7, m_tmp16);
m_acc <<= 16;
m_acc |= read_16(m_tmpea);
@@ -1396,23 +1491,24 @@ void f2mc16_device::execute_run()
m_icount -= 10;
break;
- // MOVX A, @Rx + disp8
+ // MOVX A, @RWx + disp8
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
- m_tmp16 = read_rwX(opcode & 0x7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
+ m_tmp16 = read_rwX(opcode & 0x7) + s8(m_tmp8);
m_tmpea = getRWbank(opcode & 7, m_tmp16);
m_tmp8 = read_8(m_tmpea);
- m_tmp16 = (m_tmp8 & 0x80) ? (m_tmp8 | 0xff00) : m_tmp8;
+ m_tmp16 = u16(s16(s8(m_tmp8)));
m_acc <<= 16;
m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
m_pc += 2;
m_icount -= 3;
break;
// MOVW @RWx + disp8, A
case 0xc8: case 0xc9: case 0xca: case 0xcb: case 0xcc: case 0xcd: case 0xce: case 0xcf:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+1));
- m_tmp16 = read_rwX(opcode & 0x7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 1));
+ m_tmp16 = read_rwX(opcode & 0x7) + s8(m_tmp8);
m_tmpea = getRWbank(opcode & 0x7, m_tmp16);
write_16(m_tmpea, m_acc & 0xffff);
setNZ_16(m_acc & 0xffff);
@@ -1436,7 +1532,7 @@ void f2mc16_device::execute_run()
case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
- // util::stream_format(stream, "CALLV #$%01x", (opcode & 0xf));
+ logerror("%s: Unimplemented F2MC instruction CALLV #imm4\n", machine().describe_context());
break;
// BEQ
@@ -1491,7 +1587,7 @@ void f2mc16_device::execute_run()
}
break;
- //
+ // BN
case 0xf4:
if (m_ps & F_N)
{
@@ -1544,7 +1640,7 @@ void f2mc16_device::execute_run()
break;
// BT
- case 0xf8:;
+ case 0xf8:
if (m_ps & F_T)
{
take_branch();
@@ -1572,9 +1668,9 @@ void f2mc16_device::execute_run()
// BLT
case 0xfa:
{
- u8 n = (m_ps & F_N) ? 1 : 0;
- u8 v = (m_ps & F_V) ? 1 : 0;
- if ((v ^ n) == 1)
+ const u8 n = (m_ps & F_N) ? 1 : 0;
+ const u8 v = (m_ps & F_V) ? 1 : 0;
+ if (v ^ n)
{
take_branch();
}
@@ -1589,9 +1685,9 @@ void f2mc16_device::execute_run()
// BGE
case 0xfb:
{
- u8 n = (m_ps & F_N) ? 1 : 0;
- u8 v = (m_ps & F_V) ? 1 : 0;
- if ((v ^ n) == 0)
+ const u8 n = (m_ps & F_N) ? 1 : 0;
+ const u8 v = (m_ps & F_V) ? 1 : 0;
+ if (!(v ^ n))
{
take_branch();
}
@@ -1606,9 +1702,9 @@ void f2mc16_device::execute_run()
// BLE
case 0xfc:
{
- u8 n = (m_ps & F_N) ? 1 : 0;
- u8 v = (m_ps & F_V) ? 1 : 0;
- if (((v ^ n) == 1) || (m_ps & F_Z))
+ const u8 n = (m_ps & F_N) ? 1 : 0;
+ const u8 v = (m_ps & F_V) ? 1 : 0;
+ if ((v ^ n) || (m_ps & F_Z))
{
take_branch();
}
@@ -1623,9 +1719,9 @@ void f2mc16_device::execute_run()
// BGT
case 0xfd:
{
- u8 n = (m_ps & F_N) ? 1 : 0;
- u8 v = (m_ps & F_V) ? 1 : 0;
- if (((v ^ n) == 1) || !(m_ps & F_Z))
+ const u8 n = (m_ps & F_N) ? 1 : 0;
+ const u8 v = (m_ps & F_V) ? 1 : 0;
+ if (!(v ^ n) && !(m_ps & F_Z))
{
take_branch();
}
@@ -1652,7 +1748,7 @@ void f2mc16_device::execute_run()
// BHI
case 0xff:
- if (!(m_ps & F_C) || !(m_ps & F_Z))
+ if (!(m_ps & F_C) && !(m_ps & F_Z))
{
take_branch();
}
@@ -1673,50 +1769,62 @@ void f2mc16_device::execute_run()
void f2mc16_device::opcodes_str6e(u8 operand)
{
+ const u8 spb = (m_ps & F_S) ? m_ssb : m_usb;
+
+ // TODO: If an interrupt occurs during the transfer, the transfer is suspended to
+ // handle the interrupt. The transfer is resumed after the interrupt has been handled.
switch (operand)
{
- // MOVSI ADB, DTB
- case 0x09:
- if (read_rwX(0) > 0)
- {
- u16 al = (m_acc & 0xffff);
- u16 ah = (m_acc >> 16) & 0xffff;
- m_tmp8 = read_8((m_dtb<<16) | al);
- write_8((m_adb<<16) | ah, m_tmp8);
- al++;
- ah++;
- m_acc = (ah<<16) | al;
- write_rwX(0, read_rwX(0) - 1);
- m_icount -= 8;
- }
- else
- {
- m_pc += 2;
- m_icount -= 5;
- }
- break;
-
- // FILSI ADB
- case 0xc2:
- if (read_rwX(0) > 0)
- {
- u16 al = (m_acc & 0xffff);
- u16 ah = (m_acc >> 16) & 0xffff;
- write_8((m_adb<<16) | ah, al & 0xff);
- ah++;
- m_acc = (ah<<16) | al;
- write_rwX(0, read_rwX(0) - 1);
- m_icount -= 6;
- }
- else
- {
- m_pc += 2;
- m_icount -= 6;
- }
- break;
+ // MOVSI destination_bank, source_bank
+ case 0x00: movsi(m_pcb, m_pcb); break;
+ case 0x01: movsi(m_pcb, m_dtb); break;
+ case 0x02: movsi(m_pcb, m_adb); break;
+ case 0x03: movsi(m_pcb, spb); break;
+ case 0x04: movsi(m_dtb, m_pcb); break;
+ case 0x05: movsi(m_dtb, m_dtb); break;
+ case 0x06: movsi(m_dtb, m_adb); break;
+ case 0x07: movsi(m_dtb, spb); break;
+ case 0x08: movsi(m_adb, m_pcb); break;
+ case 0x09: movsi(m_adb, m_dtb); break;
+ case 0x0a: movsi(m_adb, m_adb); break;
+ case 0x0b: movsi(m_adb, spb); break;
+ case 0x0c: movsi(spb, m_pcb); break;
+ case 0x0d: movsi(spb, m_dtb); break;
+ case 0x0e: movsi(spb, m_adb); break;
+ case 0x0f: movsi(spb, spb); break;
+
+ // MOVSWI destination_bank, source_bank
+ case 0x20: movswi(m_pcb, m_pcb); break;
+ case 0x21: movswi(m_pcb, m_dtb); break;
+ case 0x22: movswi(m_pcb, m_adb); break;
+ case 0x23: movswi(m_pcb, spb); break;
+ case 0x24: movswi(m_dtb, m_pcb); break;
+ case 0x25: movswi(m_dtb, m_dtb); break;
+ case 0x26: movswi(m_dtb, m_adb); break;
+ case 0x27: movswi(m_dtb, spb); break;
+ case 0x28: movswi(m_adb, m_pcb); break;
+ case 0x29: movswi(m_adb, m_dtb); break;
+ case 0x2a: movswi(m_adb, m_adb); break;
+ case 0x2b: movswi(m_adb, spb); break;
+ case 0x2c: movswi(spb, m_pcb); break;
+ case 0x2d: movswi(spb, m_dtb); break;
+ case 0x2e: movswi(spb, m_adb); break;
+ case 0x2f: movswi(spb, spb); break;
+
+ // FILSI destination_bank
+ case 0xc0: filsi(m_pcb); break;
+ case 0xc1: filsi(m_dtb); break;
+ case 0xc2: filsi(m_adb); break;
+ case 0xc3: filsi( spb); break;
+
+ // FILSWI destination_bank
+ case 0xe0: filswi(m_pcb); break;
+ case 0xe1: filswi(m_dtb); break;
+ case 0xe2: filswi(m_adb); break;
+ case 0xe3: filswi( spb); break;
default:
- fatalerror("Unknown F2MC STR6E opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC STR6E opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -1727,7 +1835,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
{
// MOVB A, io:bp
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8(m_tmpea);
m_acc &= 0xffff0000;
if (m_tmp8 & (1 << (operand & 7)))
@@ -1739,7 +1847,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// MOVB A, dir:bp
case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmp8 = read_8(m_tmpea);
m_acc &= 0xffff0000;
if (m_tmp8 & (1 << (operand & 7)))
@@ -1751,7 +1859,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// MOVB io:bp, A
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8(m_tmpea);
if (m_acc & 0xff)
m_tmp8 |= (1 << (operand & 7));
@@ -1765,7 +1873,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// MOVB dir:bp, A
case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmp8 = read_8(m_tmpea);
if (m_acc & 0xff)
m_tmp8 |= (1 << (operand & 7));
@@ -1780,19 +1888,23 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// CLRB io:bp
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
+ m_rmw = true;
m_tmp8 = read_8(m_tmpea);
m_tmp8 &= ~(1 << (operand & 7));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 3;
m_icount -= 7;
break;
// CLRB dir:bp
case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
+ m_rmw = true;
m_tmp8 = read_8(m_tmpea);
m_tmp8 &= ~(1 << (operand & 7));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 3;
m_icount -= 7;
break;
@@ -1803,13 +1915,15 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmpea |= (m_prefix<<16);
+ m_tmpea |= (m_prefix << 16);
}
else
m_tmpea |= (m_dtb<<16);
+ m_rmw = true;
m_tmp8 = read_8(m_tmpea);
m_tmp8 &= ~(1 << (operand & 7));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 4;
m_icount -= 7;
break;
@@ -1817,19 +1931,23 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// SETB io:bp
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
+ m_rmw = true;
m_tmp8 = read_8(m_tmpea);
m_tmp8 |= (1 << (operand & 7));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 3;
m_icount -= 7;
break;
// SETB dir:bp
case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
+ m_rmw = true;
m_tmp8 = read_8(m_tmpea);
m_tmp8 |= (1 << (operand & 7));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 3;
m_icount -= 7;
break;
@@ -1837,12 +1955,13 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// SETB addr16:bp
case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_rmw = true;
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmp8 = read_8((m_prefix<<16) | m_tmp16);
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
m_tmp8 |= (1 << (operand & 7));
- write_8((m_prefix<<16) | m_tmp16, m_tmp8);
+ write_8((m_prefix << 16) | m_tmp16, m_tmp8);
}
else
{
@@ -1850,20 +1969,21 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
m_tmp8 |= (1 << (operand & 7));
write_8((m_dtb<<16) | m_tmp16, m_tmp8);
}
+ m_rmw = false;
m_pc += 4;
m_icount -= 7;
break;
// BBC io:bp, disp8
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
m_ps &= ~F_Z;
m_pc += 4;
if (!(read_8(m_tmpea) & (1 << (operand & 7))))
{
m_ps |= F_Z;
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
m_icount -= 6;
@@ -1871,14 +1991,14 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// BBC dir:bp, disp8
case 0x88: case 0x89: case 0x8a: case 0x8b: case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
m_ps &= ~F_Z;
m_pc += 4;
if (!(read_8(m_tmpea) & (1 << (operand & 7))))
{
m_ps |= F_Z;
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
m_icount -= 7;
@@ -1893,7 +2013,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmpea = (m_prefix<<16) | m_tmp16;
+ m_tmpea = (m_prefix << 16) | m_tmp16;
}
else
{
@@ -1903,7 +2023,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
if (!(read_8(m_tmpea) & (1 << (operand & 7))))
{
m_ps |= F_Z;
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
m_icount -= 7;
@@ -1911,13 +2031,13 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// BBS io:bp, disp8
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
m_ps &= ~F_Z;
m_pc += 4;
if (read_8(m_tmpea) & (1 << (operand & 7)))
{
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
else
@@ -1929,13 +2049,13 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
// BBS dir:bp, disp8
case 0xa8: case 0xa9: case 0xaa: case 0xab: case 0xac: case 0xad: case 0xae: case 0xaf:
- m_tmpea = getdirbank(read_8((m_pcb<<16) | (m_pc+2)));
+ m_tmpea = getdirbank(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
m_ps &= ~F_Z;
m_pc += 4;
if (read_8(m_tmpea) & (1 << (operand & 7)))
{
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
else
@@ -1954,16 +2074,16 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmpea = (m_prefix<<16) | m_tmp16;
+ m_tmpea = (m_prefix << 16) | m_tmp16;
}
else
{
- m_tmpea = (m_dtb<<16) | m_tmp16;
+ m_tmpea = (m_dtb << 16) | m_tmp16;
}
if (read_8(m_tmpea) & (1 << (operand & 7)))
{
- m_pc += (s8)m_tmp8;
+ m_pc += s8(m_tmp8);
m_icount--;
}
else
@@ -1973,18 +2093,18 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
m_icount -= 7;
break;
- // WTBS io:bp
+ // WBTS io:bp
case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8(m_tmpea);
if (m_tmp8 & (1 << (operand & 7)))
m_pc += 3;
m_icount -= 4;
break;
- // WTBC io:bp
+ // WBTC io:bp
case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
- m_tmpea = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp8 = read_8(m_tmpea);
if (!(m_tmp8 & (1 << (operand & 7))))
m_pc += 3;
@@ -1992,7 +2112,7 @@ void f2mc16_device::opcodes_bo6c(u8 operand)
break;
default:
- fatalerror("Unknown F2MC 6C bit-op opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC 6C bit-op opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2041,6 +2161,24 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_icount -= 2;
break;
+ // MOV A, @A
+ case 0x05:
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | (m_acc & 0xffff));
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb << 16) | (m_acc & 0xffff));
+ }
+ setNZ_8(m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
// MOV A, PCB
case 0x06:
m_acc <<= 16;
@@ -2049,6 +2187,24 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_icount -= 1;
break;
+ // ROLC A
+ case 0x07:
+ m_shifted_carry = (m_ps & F_C) ? 1 : 0;
+ m_tmp8 = m_acc & 0xff;
+ m_ps &= ~F_C;
+ if (m_tmp8 & 0x80)
+ {
+ m_ps |= F_C;
+ }
+ m_tmp8 <<= 1;
+ m_tmp8 |= m_shifted_carry;
+ m_acc &= 0xffffff00;
+ m_acc |= m_tmp8;
+ setNZ_8(m_tmp8);
+ m_pc += 2;
+ m_icount -= 2;
+ break;
+
// LSLW A, R0
case 0x0c:
m_tmp8 = read_rX(0);
@@ -2073,6 +2229,24 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_pc += 2;
break;
+ // MOVW A, @A
+ case 0x0d:
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp16 = read_16((m_prefix << 16) | (m_acc & 0xffff));
+ }
+ else
+ {
+ m_tmp16 = read_16((m_dtb << 16) | (m_acc & 0xffff));
+ }
+ setNZ_16(m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
// ASRW A, R0
case 0x0e:
m_tmp8 = read_rX(0);
@@ -2086,6 +2260,7 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
}
else
{
+ m_icount -= 5;
m_tmp16 = m_acc & 0xffff;
for (u8 count = 0; count < m_tmp8; count++)
{
@@ -2112,7 +2287,7 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_tmp16 &= ~0x8000;
}
setNZ_16(m_tmp16);
- m_icount -= 5;
+ m_icount--; // 1 additional cycle per iteration
}
m_acc &= 0xffff0000;
@@ -2122,18 +2297,19 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
break;
// LSRW A, R0
- case 0xf:
+ case 0x0f:
m_tmp8 = read_rX(0);
if (m_tmp8 == 0)
{
// docs don't say if N is cleared in this case or not
- m_ps &= ~(F_C|F_T);
+ m_ps &= ~(F_C | F_T);
m_ps |= F_Z;
m_pc += 2;
m_icount -= 6;
}
else
{
+ m_icount -= 5;
m_tmp16 = m_acc & 0xffff;
for (u8 count = 0; count < m_tmp8; count++)
{
@@ -2151,7 +2327,7 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
m_tmp16 >>= 1;
setNZ_16(m_tmp16);
- m_icount -= 5;
+ m_icount--; // 1 additional cycle per iteration
}
m_acc &= 0xffff0000;
@@ -2200,11 +2376,33 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
if (m_prefix_valid)
{
m_prefix_valid = false;
- write_8((m_prefix<<16) | (m_acc & 0xffff), (m_acc>>16) & 0xff);
+ write_8((m_prefix << 16) | (m_acc & 0xffff), (m_acc >> 16) & 0xff);
+ }
+ else
+ {
+ write_8((m_dtb << 16) | (m_acc & 0xffff), (m_acc >> 16) & 0xff);
+ }
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // MOVX A, @A
+ case 0x16:
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | (m_acc & 0xffff));
}
else
{
- write_8((m_dtb<<16) | (m_acc & 0xffff), (m_acc>>16) & 0xff);
+ m_tmp8 = read_8((m_dtb << 16) | (m_acc & 0xffff));
+ }
+ setNZ_8(m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
}
m_pc += 2;
m_icount -= 3;
@@ -2220,19 +2418,149 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
}
else
{
- m_icount -= 6;
for (u8 count = 0; count < m_tmp8; count++)
{
m_ps &= ~F_C;
m_ps |= (m_acc & 0x80000000) ? F_C : 0;
m_acc <<= 1;
- m_icount --; // 1 additional cycle per iteration
+ m_icount--; // 1 additional cycle per iteration
}
setNZ_32(m_acc);
}
m_pc += 2;
break;
+ // ASRL A, R0
+ case 0x1e:
+ m_tmp8 = read_rX(0);
+ m_icount -= 6; // 6 cycles base
+ if (m_tmp8 == 0)
+ {
+ m_ps &= ~(F_C | F_T);
+ m_ps |= F_Z;
+ }
+ else
+ {
+ for (u8 count = 0; count < m_tmp8; count++)
+ {
+ // T is set if either carry or T are set beforehand
+ if ((m_ps & F_C) || (m_ps & F_T))
+ {
+ m_ps |= F_T;
+ }
+ // C becomes the previous LSB
+ m_ps &= ~F_C;
+ m_ps |= (m_acc & 1) ? F_C : 0;
+
+ if (m_acc & 0x80000000)
+ {
+ m_acc >>= 1;
+ m_acc |= 0x80000000;
+ }
+ else
+ {
+ m_acc >>= 1;
+ m_acc &= ~0x80000000;
+ }
+ setNZ_32(m_acc);
+ m_icount--; // 1 additional cycle per iteration
+ }
+ }
+ m_pc += 2;
+ break;
+
+ // LSRL A, R0
+ case 0x1f:
+ m_tmp8 = read_rX(0);
+ m_icount -= 6; // 6 cycles base
+ if (m_tmp8 == 0)
+ {
+ m_ps &= ~(F_C | F_T);
+ m_ps |= F_Z;
+ }
+ else
+ {
+ for (u8 count = 0; count < m_tmp8; count++)
+ {
+ // T is set if either carry or T are set beforehand
+ if ((m_ps & F_C) || (m_ps & F_T))
+ {
+ m_ps |= F_T;
+ }
+ // C becomes the previous LSB
+ m_ps &= ~F_C;
+ m_ps |= (m_acc & 1) ? F_C : 0;
+
+ m_acc >>= 1;
+ setNZ_32(m_acc);
+ m_icount--; // 1 additional cycle per iteration
+ }
+ }
+ m_pc += 2;
+ break;
+
+ // MOVX A, @RLx + disp8
+ case 0x20: case 0x22: case 0x24: case 0x26:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmpea = read_rlX((operand >> 1) & 0x3) + s8(m_tmp8);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 3;
+ m_icount -= 10;
+ break;
+
+ // LSL A, R0
+ case 0x2c:
+ m_tmp8 = read_rX(0);
+ if (m_tmp8 == 0)
+ {
+ m_icount -= 6;
+ }
+ else
+ {
+ m_tmp8aux = m_acc & 0xff;
+ for (u8 count = 0; count < m_tmp8; count++)
+ {
+ m_ps &= ~F_C;
+ m_ps |= (m_tmp8aux & 0x80) ? F_C : 0;
+ m_tmp8aux <<= 1;
+ m_icount -= 5;
+ }
+ setNZ_8(m_tmp8aux);
+ m_acc &= 0xffffff00;
+ m_acc |= m_tmp8aux;
+ }
+ m_pc += 2;
+ break;
+
+ // NRML A, R0
+ case 0x2d:
+ m_tmp8 = 0;
+ if (m_acc != 0)
+ {
+ while (!(m_acc & 0x80000000))
+ {
+ m_acc <<= 1;
+ m_tmp8++;
+ m_icount--; // 1 additional cycle per iteration
+ }
+ m_ps &= ~(F_Z);
+ m_icount -= 6;
+ }
+ else
+ {
+ m_ps |= F_Z;
+ m_icount -= 4;
+ }
+ write_rX(0, m_tmp8);
+ m_pc += 2;
+ break;
+
// LSR A, R0
case 0x2f:
m_tmp8 = read_rX(0);
@@ -2246,7 +2574,8 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
}
else
{
- m_tmp16 = m_acc & 0xff;
+ m_icount -= 5;
+ m_tmp8aux = m_acc & 0xff;
for (u8 count = 0; count < m_tmp8; count++)
{
// T is set if either carry or T are set beforehand
@@ -2256,26 +2585,26 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
}
// C becomes the previous LSB
m_ps &= ~F_C;
- if (m_tmp16 & 1)
+ if (m_tmp8aux & 1)
{
m_ps |= F_C;
}
- m_tmp16 >>= 1;
- setNZ_8(m_tmp16);
- m_icount -= 5;
+ m_tmp8aux >>= 1;
+ setNZ_8(m_tmp8aux);
+ m_icount--; // 1 additional cycle per iteration
}
m_acc &= 0xffffff00;
- m_acc |= m_tmp16;
+ m_acc |= m_tmp8aux;
m_pc += 2;
}
break;
// MOV @RLx + disp8, A
case 0x30: case 0x32: case 0x34: case 0x36:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmpea = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmpea = read_rlX((operand >> 1) & 0x3) + s8(m_tmp8);
write_8(m_tmpea, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
m_pc += 3;
@@ -2284,8 +2613,8 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
// MOVW @RLx + disp8, A
case 0x38: case 0x3a: case 0x3c: case 0x3e:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmpea = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmpea = read_rlX((operand >> 1) & 0x3) + s8(m_tmp8);
write_16(m_tmpea, m_acc & 0xffff);
setNZ_16(m_acc & 0xffff);
m_pc += 3;
@@ -2294,8 +2623,8 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
// MOV A, @RLx + disp8
case 0x40: case 0x42: case 0x44: case 0x46:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmpea = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmpea = read_rlX((operand >> 1) & 0x3) + s8(m_tmp8);
m_acc <<= 16;
m_acc |= read_8(m_tmpea);
setNZ_8(m_acc & 0xff);
@@ -2305,8 +2634,8 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
// MOVW A, @RLx + disp8
case 0x48: case 0x4a: case 0x4c: case 0x4e:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmpea = read_rlX((operand>>1) & 0x3) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmpea = read_rlX((operand >> 1) & 0x3) + s8(m_tmp8);
m_acc <<= 16;
m_acc |= read_16(m_tmpea);
setNZ_16(m_acc & 0xffff);
@@ -2315,7 +2644,7 @@ void f2mc16_device::opcodes_2b6f(u8 operand)
break;
default:
- fatalerror("Unknown F2MC 2B6F opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC 2B6F opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2326,83 +2655,247 @@ void f2mc16_device::opcodes_ea70(u8 operand)
{
// ADDL A, RLx
case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
- m_acc = doADD_32(m_acc, read_rlX((operand>>1) & 3));
+ m_acc = doADD_32(m_acc, read_rlX((operand >> 1) & 3));
m_pc += 2;
- m_icount -= 7;
+ m_icount -= 6;
break;
// ADDL A, @RWx + disp8
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- m_tmp8 = read_32((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp32 = read_32(m_tmpea);
m_acc = doADD_32(m_acc, m_tmp32);
m_pc += 3;
- m_icount -= 7;
+ m_icount -= 9;
+ break;
+
+ // ADDL A, @RWx + disp16
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_32(m_tmpea);
+ m_acc = doADD_32(m_acc, m_tmp32);
+ m_pc += 4;
+ m_icount -= 9;
+ break;
+
+ // ADDL A, addr16
+ case 0x1f:
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmpea |= (m_prefix << 16);
+ }
+ else
+ {
+ m_tmpea |= (m_dtb << 16);
+ }
+ m_acc = doADD_32(m_acc, read_32(m_tmpea));
+ m_pc += 4;
+ m_icount -= 8;
break;
// SUBL A, RLx
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
- m_acc = doSUB_32(m_acc, read_rlX((operand>>1) & 3));
+ m_acc = doSUB_32(m_acc, read_rlX((operand >> 1) & 3));
m_pc += 2;
- m_icount -= 7;
+ m_icount -= 6;
break;
// SUBL A, @RWx + disp8
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- m_tmp8 = read_32((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp32 = read_32(m_tmpea);
m_acc = doSUB_32(m_acc, m_tmp32);
m_pc += 3;
- m_icount -= 7;
+ m_icount -= 9;
+ break;
+
+ // SUBL A, @RWx + disp16
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_32(m_tmpea);
+ m_acc = doSUB_32(m_acc, m_tmp32);
+ m_pc += 4;
+ m_icount -= 9;
+ break;
+
+ // SUBL A, addr16
+ case 0x3f:
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmpea |= (m_prefix << 16);
+ }
+ else
+ {
+ m_tmpea |= (m_dtb << 16);
+ }
+ m_acc = doSUB_32(m_acc, read_32(m_tmpea));
+ m_pc += 4;
+ m_icount -= 8;
+ break;
+
+ // CWBNE RWx, #imm16, disp8
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
+ doCMP_16(read_rwX(operand & 7), m_tmp16);
+ if (m_ps & F_Z)
+ {
+ m_pc += 5;
+ m_icount -= 7;
+ }
+ else
+ {
+ m_pc = m_pc + 5 + s8(m_tmp8);
+ m_icount -= 8;
+ }
break;
// CMPL A, RLx
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
- doCMP_32(m_acc, read_rlX((operand>>1) & 3));
+ doCMP_32(m_acc, read_rlX((operand >> 1) & 3));
m_pc += 2;
- m_icount -= 7;
+ m_icount -= 6;
break;
// CMPL A, @RWx + disp8
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
- m_tmp8 = read_32((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp32 = read_32(m_tmpea);
doCMP_32(m_acc, m_tmp32);
m_pc += 3;
- m_icount -= 7;
+ m_icount -= 9;
+ break;
+
+ // CMPL A, @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_32(m_tmpea);
+ doCMP_32(m_acc, m_tmp32);
+ m_pc += 4;
+ m_icount -= 9;
+ break;
+
+ // CMPL A, addr16
+ case 0x7f:
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmpea |= (m_prefix << 16);
+ }
+ else
+ {
+ m_tmpea |= (m_dtb << 16);
+ }
+ doCMP_32(m_acc, read_32(m_tmpea));
+ m_pc += 4;
+ m_icount -= 8;
break;
// ANDL A, RLx
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
- m_tmp32 = read_rlX((operand>>1) & 3);
+ m_tmp32 = read_rlX((operand >> 1) & 3);
m_acc &= m_tmp32;
setNZ_32(m_acc);
m_ps &= ~F_V;
m_pc += 2;
- m_icount -= 7;
+ m_icount -= 6;
break;
// ANDL A, @RWx + disp8
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
- m_tmp8 = read_32((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp32 = read_32(m_tmpea);
m_acc &= m_tmp32;
setNZ_32(m_acc);
m_ps &= ~F_V;
m_pc += 3;
- m_icount -= 7;
+ m_icount -= 9;
+ break;
+
+ // ORL A, RLx
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ m_tmp32 = read_rlX((operand >> 1) & 3);
+ m_acc |= m_tmp32;
+ setNZ_32(m_acc);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // ORL A, @RWx + disp8
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp32 = read_32(m_tmpea);
+ m_acc |= m_tmp32;
+ setNZ_32(m_acc);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 9;
+ break;
+
+ // XORL A, RLx
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ m_tmp32 = read_rlX((operand >> 1) & 3);
+ m_acc ^= m_tmp32;
+ setNZ_32(m_acc);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // XORL A, @RWx + disp8
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp32 = read_32(m_tmpea);
+ m_acc ^= m_tmp32;
+ setNZ_32(m_acc);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 9;
+ break;
+
+ // CBNE Rx, #imm8, disp8
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ m_tmp8aux = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 3));
+ doCMP_8(read_rX(operand & 7), m_tmp8aux);
+ if (m_ps & F_Z)
+ {
+ m_pc += 4;
+ m_icount -= 12;
+ }
+ else
+ {
+ m_pc = m_pc + 4 + s8(m_tmp8);
+ m_icount -= 13;
+ }
break;
default:
- fatalerror("Unknown F2MC EA70 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA70 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2414,9 +2907,9 @@ void f2mc16_device::opcodes_ea71(u8 operand)
// CALLP @RWx + disp8
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
push_16(m_pcb);
- push_16(m_pc+4);
+ push_16(m_pc + 4);
m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp32 = read_32(m_tmpea);
m_pc = m_tmp32 & 0xffff;
@@ -2426,42 +2919,135 @@ void f2mc16_device::opcodes_ea71(u8 operand)
// INCL RLx
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
- m_tmp32 = doINC_32(read_rlX((operand>>1) & 3));
- write_rlX((operand>>1) & 3, m_tmp32);
+ m_tmp32 = doINC_32(read_rlX((operand >> 1) & 3));
+ write_rlX((operand >> 1) & 3, m_tmp32);
m_pc += 2;
m_icount -= 7;
break;
// INCL @RWx + disp8
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
m_tmp32 = doINC_32(read_32(m_tmpea));
write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
m_pc += 3;
- m_icount -= 7;
+ m_icount -= 11;
+ break;
+
+ // INCL @RWx + disp16
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp32 = doINC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 11;
+ break;
+
+ // INCL @RWx + RW7
+ case 0x5c: case 0x5d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_rmw = true;
+ m_tmp32 = doINC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 13;
break;
// INCL addr16
case 0x5f:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmpea |= (m_prefix<<16);
+ m_tmpea |= (m_prefix << 16);
}
else
- m_tmpea |= (m_dtb<<16);
+ m_tmpea |= (m_dtb << 16);
+ m_rmw = true;
m_tmp32 = doINC_32(read_32(m_tmpea));
write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
m_pc += 4;
+ m_icount -= 10;
+ break;
+
+ // DECL RLx
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ m_tmp32 = doDEC_32(read_rlX((operand >> 1) & 3));
+ write_rlX((operand >> 1) & 3, m_tmp32);
+ m_pc += 2;
m_icount -= 7;
break;
+ // DECL @RWx + disp8
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp32 = doDEC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 3;
+ m_icount -= 11;
+ break;
+
+ // DECL @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp32 = doDEC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 11;
+ break;
+
+ // DECL @RWx + RW7
+ case 0x7c: case 0x7d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_rmw = true;
+ m_tmp32 = doDEC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 13;
+ break;
+
+ // DECL addr16
+ case 0x7f:
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmpea |= (m_prefix << 16);
+ }
+ else
+ m_tmpea |= (m_dtb << 16);
+ m_rmw = true;
+ m_tmp32 = doDEC_32(read_32(m_tmpea));
+ write_32(m_tmpea, m_tmp32);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 10;
+ break;
+
// MOVL A, RLx
case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
- m_acc = read_rlX((operand>>1) & 3);
+ m_acc = read_rlX((operand >> 1) & 3);
setNZ_32(m_acc);
m_pc += 2;
m_icount -= 4;
@@ -2469,29 +3055,39 @@ void f2mc16_device::opcodes_ea71(u8 operand)
// MOVL A, @RWx + disp8
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_acc = read_32(m_tmpea);
setNZ_32(m_acc);
m_pc += 3;
- m_icount -= 4;
+ m_icount -= 7;
break;
// MOVL A, @RWx + disp16
case 0x98: case 0x99: case 0x9a: case 0x9b:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 3) + (s16)m_tmp16;
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
m_tmpea = getRWbank(operand & 3, m_tmp16);
m_acc = read_32(m_tmpea);
setNZ_32(m_acc);
m_pc += 4;
- m_icount -= 4;
+ m_icount -= 7;
+ break;
+
+ // MOVL A, @RWx + RW7
+ case 0x9c: case 0x9d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_acc = read_32(m_tmpea);
+ setNZ_32(m_acc);
+ m_pc += 2;
+ m_icount -= 9;
break;
// MOVL A, addr16
case 0x9f:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
@@ -2517,26 +3113,47 @@ void f2mc16_device::opcodes_ea71(u8 operand)
// MOVL @RWx + disp8, A
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
write_32(m_tmpea, m_acc);
setNZ_32(m_acc);
m_pc += 3;
- m_icount -= 4;
+ m_icount -= 7;
+ break;
+
+ // MOVL @RWx + disp16, A
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ write_32(m_tmpea, m_acc);
+ setNZ_32(m_acc);
+ m_pc += 4;
+ m_icount -= 7;
+ break;
+
+ // MOVL @RWx + RW7, A
+ case 0xbc: case 0xbd:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ write_32(m_tmpea, m_acc);
+ setNZ_32(m_acc);
+ m_pc += 2;
+ m_icount -= 9;
break;
// MOVL addr16, A
case 0xbf:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
- write_32((m_prefix<<16) | m_tmp16, m_acc);
+ write_32((m_prefix << 16) | m_tmp16, m_acc);
}
else
{
- write_32((m_dtb<<16) | m_tmp16, m_acc);
+ write_32((m_dtb << 16) | m_tmp16, m_acc);
}
setNZ_32(m_acc);
m_pc += 4;
@@ -2545,62 +3162,112 @@ void f2mc16_device::opcodes_ea71(u8 operand)
// MOV @RWx, #imm8
case 0xc8: case 0xc9: case 0xca: case 0xcb:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp16 = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmp16);
write_8(m_tmpea, m_tmp8);
setNZ_8(m_tmp8);
m_pc += 3;
- m_icount -= 2;
+ m_icount -= 6;
break;
// MOV @RWx+, #imm8
case 0xcc: case 0xcd: case 0xce: case 0xcf:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp16 = read_rwX(operand & 3);
write_rwX(operand & 3, m_tmp16 + 1);
m_tmpea = getRWbank(operand & 3, m_tmp16);
write_8(m_tmpea, m_tmp8);
setNZ_8(m_tmp8);
m_pc += 3;
- m_icount -= 4;
+ m_icount -= 8;
break;
// MOV @RWx + disp8, #imm8
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_8((m_pcb<<16) | (m_pc+3));
- m_tmpea = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_8((m_pcb << 16) | (m_pc + 3));
+ m_tmpea = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmpea);
write_8(m_tmpea, m_tmp16 & 0xff);
setNZ_8(m_tmp16 & 0xff);
m_pc += 4;
- m_icount -= 2;
+ m_icount -= 6;
+ break;
+
+ // MOV @RWx + disp16, #imm8
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
+ write_8(m_tmpea, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 5;
+ m_icount -= 6;
break;
// MOV @RWx + RW7, #imm8
case 0xdc: case 0xdd:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
- m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
write_8(m_tmpea, m_tmp8);
setNZ_8(m_tmp8);
m_pc += 3;
- m_icount -= 2;
+ m_icount -= 8;
+ break;
+
+ // MOV addr16, #imm8
+ case 0xdf:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 4));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_8((m_prefix << 16) | m_tmp16, m_tmp8);
+ }
+ else
+ {
+ write_8((m_dtb << 16) | m_tmp16, m_tmp8);
+ }
+ setNZ_8(m_tmp8);
+ m_pc += 5;
+ m_icount -= 5;
break;
// MOVEA A, @RWx + disp8
case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_acc <<= 16;
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7);
- m_tmp16 += (s8)m_tmp8;
m_acc |= m_tmp16;
m_pc += 3;
- m_icount -= 1;
+ m_icount -= 3;
+ break;
+
+ // MOVEA A, @RWx + disp16
+ case 0xf8: case 0xf9: case 0xfa: case 0xfb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_acc <<= 16;
+ m_acc |= m_tmp16;
+ m_pc += 4;
+ m_icount -= 3;
+ break;
+
+ // MOVEA A, @RWx + RW7
+ case 0xfc: case 0xfd:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_acc <<= 16;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ m_icount -= 5;
break;
default:
- fatalerror("Unknown F2MC EA71 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA71 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2609,6 +3276,40 @@ void f2mc16_device::opcodes_ea72(u8 operand)
{
switch (operand)
{
+ // ROLC Rx
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ m_shifted_carry = (m_ps & F_C) ? 1 : 0;
+ m_tmp8 = read_rX(operand & 7);
+ m_ps &= ~F_C;
+ if (m_tmp8 & 0x80)
+ {
+ m_ps |= F_C;
+ }
+ m_tmp8 <<= 1;
+ m_tmp8 |= m_shifted_carry;
+ write_rX(operand & 7, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // RORC Rx
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ m_shifted_carry = (m_ps & F_C) ? 1 : 0;
+ m_tmp8 = read_rX(operand & 7);
+ m_ps &= ~F_C;
+ if (m_tmp8 & 1)
+ {
+ m_ps |= F_C;
+ }
+ m_tmp8 >>= 1;
+ m_tmp8 |= m_shifted_carry ? 0x80 : 0;
+ write_rX(operand & 7, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
// INC Rx
case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
m_tmp8 = doINC_8(read_rX(operand & 7));
@@ -2621,26 +3322,55 @@ void f2mc16_device::opcodes_ea72(u8 operand)
case 0x48: case 0x49: case 0x4a: case 0x4b:
m_tmp16 = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
m_tmp8 = doINC_8(read_8(m_tmpea));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 2;
- m_icount -= 5;
+ m_icount -= 7;
break;
// INC @RWx + disp8
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
m_tmp8 = doINC_8(read_8(m_tmpea));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 3;
- m_icount -= 5;
+ m_icount -= 7;
+ break;
+
+ // INC @RWx + disp16
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doINC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 7;
+ break;
+
+ // INC @RWx + RW7
+ case 0x5c: case 0x5d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doINC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 9;
break;
// INC addr16
case 0x5f:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
@@ -2650,8 +3380,10 @@ void f2mc16_device::opcodes_ea72(u8 operand)
{
m_tmpea |= (m_dtb << 16);
}
+ m_rmw = true;
m_tmp8 = doINC_8(read_8(m_tmpea));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 4;
m_icount -= 5;
break;
@@ -2668,10 +3400,70 @@ void f2mc16_device::opcodes_ea72(u8 operand)
case 0x68: case 0x69: case 0x6a: case 0x6b:
m_tmp16 = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
m_tmp8 = doDEC_8(read_8(m_tmpea));
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 2;
- m_icount -= 5;
+ m_icount -= 7;
+ break;
+
+ // DEC @RWx + disp8
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doDEC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 3;
+ m_icount -= 7;
+ break;
+
+ // DEC @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doDEC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 7;
+ break;
+
+ // DEC @RWx + RW7
+ case 0x7c: case 0x7d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doDEC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 9;
+ break;
+
+ // DEC addr16
+ case 0x7f:
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmpea |= (m_prefix << 16);
+ }
+ else
+ {
+ m_tmpea |= (m_dtb << 16);
+ }
+ m_rmw = true;
+ m_tmp8 = doDEC_8(read_8(m_tmpea));
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 6;
break;
// MOV A, @RWx
@@ -2718,10 +3510,10 @@ void f2mc16_device::opcodes_ea72(u8 operand)
m_icount -= 7;
break;
- // MOV A, @RWx + disp8
+ // MOV A, @RWx + disp8
case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_acc <<= 16;
m_acc |= read_8(m_tmpea);
@@ -2730,6 +3522,18 @@ void f2mc16_device::opcodes_ea72(u8 operand)
m_icount -= 5;
break;
+ // MOV A, @RWx + disp16
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ setNZ_8(m_acc & 0xff);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// MOV A, @RWx + RW7
case 0x9c: case 0x9d:
m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
@@ -2737,14 +3541,14 @@ void f2mc16_device::opcodes_ea72(u8 operand)
m_acc <<= 16;
m_acc |= read_8(m_tmpea);
setNZ_8(m_acc & 0xff);
- m_pc += 3;
+ m_pc += 2;
m_icount -= 7;
break;
// MOV @RWx + disp8, A
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
write_8(m_tmpea, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
@@ -2752,18 +3556,91 @@ void f2mc16_device::opcodes_ea72(u8 operand)
m_icount -= 5;
break;
+ // MOV @RWx + disp16, A
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ write_8(m_tmpea, m_acc & 0xff);
+ setNZ_8(m_acc & 0xff);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// MOV @RWx + RW7, A
case 0xbc: case 0xbd:
m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
m_tmpea = getRWbank(operand & 1, m_tmp16);
write_8(m_tmpea, m_acc & 0xff);
setNZ_8(m_acc & 0xff);
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
+ // MOVX A, @RWx
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 2;
+ m_icount -= 5;
+ break;
+
+ // MOVX A, @RWx + disp8
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // MOVX A, @RWx + disp16
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
+ // MOVX A, @RWx + RW7
+ case 0xdc: case 0xdd:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_8(m_tmpea);
+ if (m_acc & 0x80)
+ {
+ m_acc |= 0xff00;
+ }
+ setNZ_8(m_acc & 0xff);
+ m_pc += 2;
m_icount -= 7;
break;
default:
- fatalerror("Unknown F2MC EA72 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA72 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2784,26 +3661,43 @@ void f2mc16_device::opcodes_ea73(u8 operand)
case 0x48: case 0x49: case 0x4a: case 0x4b:
m_tmp16 = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
m_tmp16 = doINC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
- m_pc += 3;
+ m_rmw = false;
+ m_pc += 2;
m_icount -= 5;
break;
// INCW @RWx + disp8
case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
m_tmp16 = doINC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
m_pc += 3;
m_icount -= 5;
break;
+ // INCW @RWx + disp16
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = doINC_16(read_16(m_tmpea));
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// INCW addr16
case 0x5f:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
@@ -2813,8 +3707,10 @@ void f2mc16_device::opcodes_ea73(u8 operand)
{
m_tmpea |= (m_dtb << 16);
}
+ m_rmw = true;
m_tmp16 = doINC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
m_pc += 4;
m_icount -= 5;
break;
@@ -2831,26 +3727,43 @@ void f2mc16_device::opcodes_ea73(u8 operand)
case 0x68: case 0x69: case 0x6a: case 0x6b:
m_tmp16 = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
m_tmp16 = doDEC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
- m_pc += 3;
+ m_rmw = false;
+ m_pc += 2;
m_icount -= 5;
break;
// DECW @RWx + disp8
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
m_tmp16 = doDEC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
m_pc += 3;
m_icount -= 5;
break;
+ // DECW @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = doDEC_16(read_16(m_tmpea));
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// DECW addr16
case 0x7f:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
@@ -2860,8 +3773,10 @@ void f2mc16_device::opcodes_ea73(u8 operand)
{
m_tmpea |= (m_dtb << 16);
}
+ m_rmw = true;
m_tmp16 = doDEC_16(read_16(m_tmpea));
write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
m_pc += 4;
m_icount -= 5;
break;
@@ -2889,6 +3804,30 @@ void f2mc16_device::opcodes_ea73(u8 operand)
m_icount -= 7;
break;
+ // MOVW A, @RWx + disp8
+ case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 0x7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 0x7, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_16(m_tmpea);
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // MOVW A, @RWx + disp16
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_acc <<= 16;
+ m_acc |= read_16(m_tmpea);
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// MOVW @RWx, A
case 0xa8: case 0xa9: case 0xaa: case 0xab:
m_tmp16 = read_rwX(operand & 3);
@@ -2910,6 +3849,28 @@ void f2mc16_device::opcodes_ea73(u8 operand)
m_icount -= 7;
break;
+ // MOVW @RWx + disp8, A
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ write_16(m_tmpea, m_acc & 0xffff);
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // MOVW @RWx + disp16, A
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ write_16(m_tmpea, m_acc & 0xffff);
+ setNZ_16(m_acc & 0xffff);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
// MOVW @RWx + RW7, A
case 0xbc: case 0xbd:
m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
@@ -2922,66 +3883,101 @@ void f2mc16_device::opcodes_ea73(u8 operand)
// MOVW @RWx, #imm16
case 0xc8: case 0xc9: case 0xca: case 0xcb:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
m_tmpea = read_rwX(operand & 3);
m_tmpea = getRWbank(operand & 3, m_tmpea);
write_16(m_tmpea, m_tmp16);
m_pc += 4;
- m_icount -= 4;
+ m_icount -= 6;
break;
// MOVW @RWx+, #imm16
case 0xcc: case 0xcd: case 0xce: case 0xcf:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
m_tmpea = read_rwX(operand & 3);
write_rwX(operand & 3, (m_tmpea + 2) & 0xffff);
m_tmpea = getRWbank(operand & 3, m_tmpea);
write_16(m_tmpea, m_tmp16);
m_pc += 4;
- m_icount -= 6;
+ m_icount -= 8;
break;
// MOVW @RWx + disp8, #imm16
case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
- m_tmp8 = read_16((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+3));
- m_tmpea = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 3));
+ m_tmpea = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmpea);
write_16(m_tmpea, m_tmp16);
m_pc += 5;
- m_icount -= 4;
+ m_icount -= 6;
break;
// MOVW @RWx + disp16, #imm16
case 0xd8: case 0xd9: case 0xda: case 0xdb:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
- m_tmp32 = read_16((m_pcb<<16) | (m_pc+4));
- m_tmpea = read_rwX(operand & 7) + (s16)m_tmp16;
- m_tmpea = getRWbank(operand & 7, m_tmpea);
- write_16(m_tmpea, m_tmp32 & 0xffff);
+ m_tmp16aux = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 4));
+ m_tmpea = read_rwX(operand & 3) + s16(m_tmp16aux);
+ m_tmpea = getRWbank(operand & 3, m_tmpea);
+ write_16(m_tmpea, m_tmp16);
m_pc += 6;
- m_icount -= 4;
+ m_icount -= 6;
break;
// MOVW addr16, #imm16
case 0xdf:
- m_tmpea = read_16((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+4));
+ m_tmpea = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 4));
if (m_prefix_valid)
{
m_prefix_valid = false;
- write_16((m_prefix<<16) | m_tmpea, m_tmp16);
+ write_16((m_prefix << 16) | m_tmpea, m_tmp16);
}
else
{
write_16((m_dtb<<16) | m_tmpea, m_tmp16);
}
m_pc += 6;
+ m_icount -= 5;
+ break;
+
+ // XCHW A, RWx
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ m_tmp16 = read_rwX(operand & 7);
+ write_rwX(operand & 7, m_acc & 0xffff);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
m_icount -= 4;
break;
+ // XCHW A, @RWx
+ case 0xe8: case 0xe9: case 0xea: case 0xeb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ write_rwX(operand & 3, m_acc & 0xffff);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
+ // XCHW A, @RWx+
+ case 0xec: case 0xed: case 0xee: case 0xef:
+ m_tmp16 = read_rwX(operand & 3);
+ write_rwX(operand & 3, (m_tmpea + 2) & 0xffff);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ write_rwX(operand & 3, m_acc & 0xffff);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ m_icount -= 9;
+ break;
+
default:
- fatalerror("Unknown F2MC EA73 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA73 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -2990,6 +3986,75 @@ void f2mc16_device::opcodes_ea74(u8 operand)
{
switch (operand)
{
+ // ADD A, Rx
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 = doADD_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ADD A, @RWx + disp8
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 = doADD_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // SUB A, Rx
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 = doSUB_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // SUB A, @RWx + disp8
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 = doSUB_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // ADDC A, Rx
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 = doADDC_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ADDC A, @RWx + disp8
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 = doADDC_8(m_acc & 0xff, m_tmp8);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp8;
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
// CMP A, Rx
case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
doCMP_8(m_acc & 0xff, read_rX(operand & 7));
@@ -2997,15 +4062,97 @@ void f2mc16_device::opcodes_ea74(u8 operand)
m_icount -= 2;
break;
+ // CMP A, @RWx
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ doCMP_8(m_acc & 0xff, read_8(m_tmpea));
+ m_pc += 2;
+ m_icount -= 5;
+ break;
+
+ // CMP A, @RWx+
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ m_tmp16 = read_rwX(operand & 3);
+ write_rwX(operand & 3, m_tmp16 + 1);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ doCMP_8(m_acc & 0xff, read_8(m_tmpea));
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
// CMP A, @RWx + disp8
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp8 = read_8(m_tmpea);
doCMP_8(m_acc & 0xff, m_tmp8);
m_pc += 3;
- m_icount -= 10;
+ m_icount -= 5;
+ break;
+
+ // CMP A, @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ doCMP_8(m_acc & 0xff, m_tmp8);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
+ // CMP A, @RWx + RW7
+ case 0x7c: case 0x7d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ doCMP_8(m_acc & 0xff, m_tmp8);
+ m_pc += 2;
+ m_icount -= 7;
+ break;
+
+ // CMP A, addr16
+ case 0x7f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
+ }
+ doCMP_8(m_acc & 0xff, m_tmp8);
+ m_pc += 4;
+ m_icount -= 4;
+ break;
+
+ // AND A, Rx
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
+ m_tmp32 = read_rX(operand & 7);
+ m_tmp32 |= 0xffffff00;
+ m_acc &= m_tmp32;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // AND A, @RWx + disp8
+ case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp32 = read_8(m_tmpea);
+ m_tmp32 |= 0xffffff00;
+ m_acc &= m_tmp32;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 5;
break;
// OR A, Rx
@@ -3025,7 +4172,91 @@ void f2mc16_device::opcodes_ea74(u8 operand)
setNZ_8(m_acc & 0xff);
m_ps &= ~F_V;
m_pc += 2;
- m_icount -= 7;
+ m_icount -= 6;
+ break;
+
+ // OR A, @RWx + disp8
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ m_acc |= m_tmp8;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // OR A, addr16
+ case 0xbf:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
+ }
+ m_acc |= m_tmp8;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
+ // XOR A, Rx
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ m_acc ^= read_rX(operand & 7);
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // XOR A, @RWx
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_acc ^= read_8(m_tmpea);
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // XOR A, @RWx + disp8
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp8 = read_8(m_tmpea);
+ m_acc ^= m_tmp8;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 5;
+ break;
+
+ // XOR A, addr16
+ case 0xdf:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
+ }
+ m_acc ^= m_tmp8;
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 5;
break;
// DBNZ Rx, disp8
@@ -3034,8 +4265,8 @@ void f2mc16_device::opcodes_ea74(u8 operand)
write_rX(operand & 7, m_tmp8);
if (m_tmp8 != 0)
{
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_pc = (m_pc + 3) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_pc = (m_pc + 3) + s8(m_tmp8);
m_icount -= 7;
}
else
@@ -3046,7 +4277,7 @@ void f2mc16_device::opcodes_ea74(u8 operand)
break;
default:
- fatalerror("Unknown F2MC EA74 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA74 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -3065,16 +4296,241 @@ void f2mc16_device::opcodes_ea75(u8 operand)
// ADD @RWx, A
case 0x08: case 0x09: case 0x0a: case 0x0b:
- m_tmp16 = read_rwX(operand & 7);
- m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
m_tmp8 = doADD_8(read_8(m_tmpea), m_acc & 0xff);
write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
m_pc += 2;
m_icount -= 7;
break;
+ // ADD @RWx + disp8, A
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doADD_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // ADD @RWx + disp16, A
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doADD_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // SUB Rx, A
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ m_tmp8 = doSUB_8(read_rX(operand & 7), m_acc & 0xff);
+ write_rX(operand & 7, m_tmp8);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // SUB @RWx + disp8, A
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doSUB_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // SUB @RWx + disp16, A
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doSUB_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // SUBC Rx, A
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ m_tmp8 = doSUBC_8(read_rX(operand & 7), m_acc & 0xff);
+ write_rX(operand & 7, m_tmp8);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // SUBC @RWx + disp8, A
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doSUBC_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // SUBC @RWx + disp16, A
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = doSUBC_8(read_8(m_tmpea), m_acc & 0xff);
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // AND Rx, A
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 &= m_acc & 0xff;
+ write_rX(operand & 7, m_tmp8);
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // AND @RWx + disp8, A
+ case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 &= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // AND @RWx + disp16, A
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 &= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // OR Rx, A
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 |= m_acc & 0xff;
+ write_rX(operand & 7, m_tmp8);
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // OR @RWx + disp8, A
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 |= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // OR @RWx + disp16, A
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 |= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // XOR Rx, A
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ m_tmp8 = read_rX(operand & 7);
+ m_tmp8 ^= m_acc & 0xff;
+ write_rX(operand & 7, m_tmp8);
+ setNZ_8(m_acc & 0xff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // XOR @RWx + disp8, A
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 ^= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // XOR @RWx + disp16, A
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp8 = read_8(m_tmpea);
+ m_tmp8 ^= m_acc & 0xff;
+ write_8(m_tmpea, m_tmp8);
+ m_rmw = false;
+ setNZ_8(m_tmp8);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
default:
- fatalerror("Unknown F2MC EA75 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA75 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -3106,14 +4562,58 @@ void f2mc16_device::opcodes_ea76(u8 operand)
// ADDW A, @RWx + disp8
case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
m_tmp16aux = doADD_16(m_acc & 0xffff, m_tmp16);
m_acc &= 0xffff0000;
m_acc |= m_tmp16aux;
m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // ADDW A, @RWx + disp16
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16aux = doADD_16(m_acc & 0xffff, m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16aux;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // ADDW A, @RWx + RW7
+ case 0x1c: case 0x1d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16aux = doADD_16(m_acc & 0xffff, m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16aux;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
+ // ADDW A, addr16
+ case 0x1f:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp16aux = read_16((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp16aux = read_16((m_dtb<<16) | m_tmp16);
+ }
+ m_tmp16aux = doADD_16(m_acc & 0xffff, m_tmp16aux);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16aux;
+ m_pc += 4;
m_icount -= 5;
break;
@@ -3135,29 +4635,54 @@ void f2mc16_device::opcodes_ea76(u8 operand)
m_acc &= 0xffff0000;
m_acc |= m_tmp16aux;
m_pc += 2;
- m_icount -= 5;
+ m_icount -= 6;
break;
// SUBW A, @RWx + disp8
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
m_tmp16aux = doSUB_16(m_acc & 0xffff, m_tmp16);
m_acc &= 0xffff0000;
m_acc |= m_tmp16aux;
m_pc += 3;
- m_icount -= 5;
+ m_icount -= 6;
+ break;
+
+ // SUBW A, @RWx + disp16
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16aux = doSUB_16(m_acc & 0xffff, m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16aux;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // SUBW A, @RWx + RW7
+ case 0x3c: case 0x3d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16aux = doSUB_16(m_acc & 0xffff, m_tmp16);
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16aux;
+ m_pc += 2;
+ m_icount -= 8;
break;
// SUBW A, addr16
case 0x3f:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmp16aux = read_16((m_prefix<<16) | m_tmp16);
+ m_tmp16aux = read_16((m_prefix << 16) | m_tmp16);
}
else
{
@@ -3167,6 +4692,15 @@ void f2mc16_device::opcodes_ea76(u8 operand)
m_acc &= 0xffff0000;
m_acc |= m_tmp16aux;
m_pc += 4;
+ m_icount -= 5;
+ break;
+
+ // ADDCW A, RWx
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ m_tmp16 = doADDC_16(m_acc & 0xffff, read_rwX(operand & 7));
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
m_icount -= 3;
break;
@@ -3179,22 +4713,43 @@ void f2mc16_device::opcodes_ea76(u8 operand)
// CMPW A, @RWx + disp8
case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
doCMP_16(m_acc & 0xffff, m_tmp16);
m_pc += 3;
- m_icount -= 10;
+ m_icount -= 5;
+ break;
+
+ // CMPW A, @RWx + disp16
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ doCMP_16(m_acc & 0xffff, m_tmp16);
+ m_pc += 4;
+ m_icount -= 5;
+ break;
+
+ // CMPW A, @RWx + RW7
+ case 0x7c: case 0x7d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ doCMP_16(m_acc & 0xffff, m_tmp16);
+ m_pc += 2;
+ m_icount -= 7;
break;
// CMPW A, addr16
case 0x7f:
- m_tmp16 = read_16((m_pcb<<16) | (m_pc+2));
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
if (m_prefix_valid)
{
m_prefix_valid = false;
- m_tmp16aux = read_16((m_prefix<<16) | m_tmp16);
+ m_tmp16aux = read_16((m_prefix << 16) | m_tmp16);
}
else
{
@@ -3202,7 +4757,86 @@ void f2mc16_device::opcodes_ea76(u8 operand)
}
doCMP_16(m_acc & 0xffff, m_tmp16aux);
m_pc += 4;
- m_icount -= 10;
+ m_icount -= 4;
+ break;
+
+ // ANDW A, RWx
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
+ m_tmp32 = read_rwX(operand & 7);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ANDW A, @RWx
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_16(m_tmpea);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // ANDW A, @RWx+
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ m_tmp16 = read_rwX(operand & 3);
+ write_rwX(operand & 3, m_tmp16 + 2);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_16(m_tmpea);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
+ // ANDW A, @RWx + disp8
+ case 0x90: case 0x91: case 0x92: case 0x93: case 0x94: case 0x95: case 0x96: case 0x97:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp32 = read_16(m_tmpea);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // ANDW A, @RWx + disp16
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp32 = read_16(m_tmpea);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // ANDW A, @RWx + RW7
+ case 0x9c: case 0x9d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp32 = read_16(m_tmpea);
+ m_tmp32 |= 0xffff0000;
+ m_acc &= m_tmp32;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
break;
// ORW A, RWx
@@ -3212,13 +4846,13 @@ void f2mc16_device::opcodes_ea76(u8 operand)
setNZ_16(m_acc & 0xffff);
m_ps &= ~F_V;
m_pc += 2;
- m_icount -= 4;
+ m_icount -= 3;
break;
// ORW A, @RWx
case 0xa8: case 0xa9: case 0xaa: case 0xab:
- m_tmp16 = read_rwX(operand & 7);
- m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
m_tmp16 = read_16(m_tmpea);
m_acc |= m_tmp16;
setNZ_16(m_acc & 0xffff);
@@ -3227,10 +4861,23 @@ void f2mc16_device::opcodes_ea76(u8 operand)
m_icount -= 6;
break;
+ // ORW A, @RWx+
+ case 0xac: case 0xad: case 0xae: case 0xaf:
+ m_tmp16 = read_rwX(operand & 3);
+ write_rwX(operand & 3, m_tmp16 + 2);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
// ORW A, @RWx + disp8
case 0xb0: case 0xb1: case 0xb2: case 0xb3: case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
m_acc |= m_tmp16;
@@ -3240,8 +4887,123 @@ void f2mc16_device::opcodes_ea76(u8 operand)
m_icount -= 6;
break;
+ // ORW A, @RWx + disp16
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // ORW A, @RWx + RW7
+ case 0xbc: case 0xbd:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc |= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
+ // XORW A, RWx
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ m_tmp16 = read_rwX(operand & 7);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // XORW A, @RWx
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // XORW A, @RWx+
+ case 0xcc: case 0xcd: case 0xce: case 0xcf:
+ m_tmp16 = read_rwX(operand & 3);
+ write_rwX(operand & 3, m_tmp16 + 2);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
+ // XORW A, @RWx + disp8
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 3;
+ m_icount -= 6;
+ break;
+
+ // XORW A, @RWx + disp16
+ case 0xd8: case 0xd9: case 0xda: case 0xdb:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 4;
+ m_icount -= 6;
+ break;
+
+ // XORW A, @RWx + RW7
+ case 0xdc: case 0xdd:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ m_acc ^= m_tmp16;
+ setNZ_16(m_acc & 0xffff);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 8;
+ break;
+
+ // DWBNZ RWx, disp8
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ m_tmp16 = doDEC_16(read_rwX(operand & 7));
+ write_rwX(operand & 7, m_tmp16);
+ if (m_tmp16 != 0)
+ {
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_pc = (m_pc + 3) + s8(m_tmp8);
+ m_icount -= 7;
+ }
+ else
+ {
+ m_pc += 3;
+ m_icount -= 6;
+ }
+ break;
+
default:
- fatalerror("Unknown F2MC EA76 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA76 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -3250,8 +5012,179 @@ void f2mc16_device::opcodes_ea77(u8 operand)
{
switch (operand)
{
+ // ADDW RWx, A
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ m_tmp16 = doADD_16(read_rwX(operand & 7), m_acc & 0xffff);
+ write_rwX(operand & 0x7, m_tmp16);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ADDW @RWx, A
+ case 0x08: case 0x09: case 0x0a: case 0x0b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = doADD_16(read_16(m_tmpea), m_acc & 0xffff);
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // SUBW RWx, A
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ m_tmp16 = doSUB_16(read_rwX(operand & 7), m_acc & 0xffff);
+ write_rwX(operand & 0x7, m_tmp16);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // SUBW @RWx, A
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = doSUB_16(read_16(m_tmpea), m_acc & 0xffff);
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // SUBCW A, RWx
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ m_tmp16 = doSUBC_16(m_acc & 0xffff, read_rwX(operand & 7));
+ m_acc &= 0xffff0000;
+ m_acc |= m_tmp16;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // NEGW RWx
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ m_tmp16 = doSUB_16(0, read_rwX(operand & 7));
+ write_rwX(operand & 0x7, m_tmp16);
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // NEGW @RWx
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = doSUB_16(0, read_16(m_tmpea));
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // ANDW RWx, A
+ case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
+ m_tmp16 = read_rwX(operand & 7);
+ m_tmp16 &= (m_acc & 0xffff);
+ write_rwX(operand & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ANDW @RWx, A
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16 &= (m_acc & 0xffff);
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // ORW RWx, A
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ m_tmp16 = read_rwX(operand & 7);
+ m_tmp16 |= (m_acc & 0xffff);
+ write_rwX(operand & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // ORW @RWx, A
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16 |= (m_acc & 0xffff);
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // XORW RWx, A
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7:
+ m_tmp16 = read_rwX(operand & 7);
+ m_tmp16 ^= (m_acc & 0xffff);
+ write_rwX(operand & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // XORW @RWx, A
+ case 0xc8: case 0xc9: case 0xca: case 0xcb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = read_16(m_tmpea);
+ m_tmp16 ^= (m_acc & 0xffff);
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
+ // NOTW RWx
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ m_tmp16 = read_rwX(operand & 7) ^ 0xffff;
+ write_rwX(operand & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 3;
+ break;
+
+ // NOTW @RWx
+ case 0xe8: case 0xe9: case 0xea: case 0xeb:
+ m_tmp16 = read_rwX(operand & 3);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_rmw = true;
+ m_tmp16 = read_16(m_tmpea) ^ 0xffff;
+ write_16(m_tmpea, m_tmp16);
+ m_rmw = false;
+ setNZ_16(m_tmp16);
+ m_ps &= ~F_V;
+ m_pc += 2;
+ m_icount -= 6;
+ break;
+
default:
- fatalerror("Unknown F2MC EA77 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA77 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
@@ -3260,6 +5193,45 @@ void f2mc16_device::opcodes_ea78(u8 operand)
{
switch (operand)
{
+ // MULU A, Rx
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ m_tmp16 = read_rX(operand & 7);
+ if (m_tmp16 == 0)
+ {
+ m_icount -= 4;
+ m_acc &= 0xffff0000;
+ }
+ else
+ {
+ m_icount -= 8;
+ m_tmp8aux = m_acc & 0xff;
+ m_acc &= 0xffff0000;
+ m_acc |= (m_tmp16 * m_tmp8aux) & 0xffff;
+ }
+ m_pc += 2;
+ break;
+
+ // MULU A, @RWx + disp8
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ m_tmpea = getRWbank(operand & 7, m_tmp16);
+ m_tmp16 = read_8(m_tmpea);
+ if (m_tmp16 == 0)
+ {
+ m_icount -= 7;
+ m_acc &= 0xffff0000;
+ }
+ else
+ {
+ m_icount -= 11;
+ m_tmp8aux = m_acc & 0xff;
+ m_acc &= 0xffff0000;
+ m_acc |= (m_tmp16 * m_tmp8aux) & 0xffff;
+ }
+ m_pc += 3;
+ break;
+
// MULUW A, RWx
case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
m_tmp16 = read_rwX(operand & 7);
@@ -3278,23 +5250,60 @@ void f2mc16_device::opcodes_ea78(u8 operand)
// MULUW A, @RWx + disp8
case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
- m_tmp8 = read_8((m_pcb<<16) | (m_pc+2));
- m_tmp16 = read_rwX(operand & 7) + (s8)m_tmp8;
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
m_tmpea = getRWbank(operand & 7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
if (m_tmp16 == 0)
{
- m_icount -= 4;
+ m_icount -= 7;
m_acc = 0;
}
else
{
- m_icount -= 12;
+ m_icount -= 15;
m_acc = m_tmp16 * (m_acc & 0xffff);
}
m_pc += 3;
break;
+ // MULUW A, @RWx + disp16
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ m_tmpea = getRWbank(operand & 3, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ if (m_tmp16 == 0)
+ {
+ m_icount -= 7;
+ m_acc = 0;
+ }
+ else
+ {
+ m_icount -= 15;
+ m_acc = m_tmp16 * (m_acc & 0xffff);
+ }
+ m_pc += 4;
+ break;
+
+ // MULUW A, @RWx + RW7
+ case 0x3c: case 0x3d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ m_tmpea = getRWbank(operand & 1, m_tmp16);
+ m_tmp16 = read_16(m_tmpea);
+ if (m_tmp16 == 0)
+ {
+ m_icount -= 9;
+ m_acc = 0;
+ }
+ else
+ {
+ m_icount -= 17;
+ m_acc = m_tmp16 * (m_acc & 0xffff);
+ }
+ m_pc += 2;
+ break;
+
// DIVUW A, RWx
case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
m_ps &= ~(F_V|F_C);
@@ -3309,7 +5318,6 @@ void f2mc16_device::opcodes_ea78(u8 operand)
{
m_ps |= F_V;
m_icount -= 7;
- m_ps |= F_V;
}
else // normal operation
{
@@ -3321,91 +5329,277 @@ void f2mc16_device::opcodes_ea78(u8 operand)
}
else // divide by zero
{
+ m_ps |= (F_V|F_C);
m_icount -= 4;
- m_ps |= F_V;
}
m_pc += 2;
break;
default:
- fatalerror("Unknown F2MC EA78 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
+ fatalerror("Unknown F2MC EA78 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
+ break;
+ }
+}
+
+void f2mc16_device::opcodes_rwiea79(u8 operand)
+{
+ switch (operand & 0x1f)
+ {
+ // MOVEA RWx, @RWy + disp8
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ m_tmp8 = read_8((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 7) + s8(m_tmp8);
+ write_rwX((operand>>5) & 0x7, m_tmp16);
+ m_pc += 3;
+ m_icount -= 3;
+ break;
+
+ // MOVEA RWx, @RWy + disp16
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ m_tmp16 = read_rwX(operand & 3) + s16(m_tmp16);
+ write_rwX((operand>>5) & 0x7, m_tmp16);
+ m_pc += 4;
+ m_icount -= 3;
+ break;
+
+ // MOVEA RWx, @RWy + RW7
+ case 0x1c: case 0x1d:
+ m_tmp16 = read_rwX(operand & 1) + read_rwX(7);
+ write_rwX((operand>>5) & 0x7, m_tmp16);
+ m_pc += 2;
+ m_icount -= 5;
+ break;
+
+ default:
+ fatalerror("Unknown F2MC EA79 opcode %02x (PC=%x)\n", operand, (m_pcb << 16) | m_pc);
break;
}
}
-void f2mc16_device::opcodes_rwi7a(u8 operand)
+void f2mc16_device::opcodes_riea7a(u8 operand)
{
- if (operand & 0x10)
- { // MOV Rx, @RWy + disp8
- m_tmp16 = read_rwX(operand & 7) + (s8)read_8((m_pcb<<16) | (m_pc+2));
+ if ((operand & 0x1f) == 0x1f)
+ {
+ // MOV Rx, addr16
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp8 = read_8((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp8 = read_8((m_dtb<<16) | m_tmp16);
+ }
+ write_rX((operand>>5) & 0x7, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 4;
+ m_icount -= 5;
+ }
+ else if (operand & 0x08)
+ {
+ fatalerror("Unknown F2MC EA7A operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+ }
+ else if (operand & 0x10)
+ {
+ // MOV Rx, @RWy + disp8
+ m_tmp16 = read_rwX(operand & 7) + s8(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmpea = getRWbank(operand & 0x7, m_tmp16);
m_tmp8 = read_8(m_tmpea);
- write_rX((operand>>5) & 0x7, m_tmp8);
+ write_rX((operand >> 5) & 0x7, m_tmp8);
setNZ_8(m_tmp8);
m_pc += 3;
- m_icount -= 5;
+ m_icount -= 6;
}
else
- { // MOV Rx, Ry
+ {
+ // MOV Rx, Ry
m_tmp8 = read_rX(operand & 0x7);
- write_rX((operand>>5) & 0x7, m_tmp8);
+ write_rX((operand >> 5) & 0x7, m_tmp8);
setNZ_8(m_tmp8);
m_pc += 2;
- m_icount -= 4;
+ m_icount -= 3;
}
}
-void f2mc16_device::opcodes_rwi7b(u8 operand)
+void f2mc16_device::opcodes_rwiea7b(u8 operand)
{
- if (operand & 0x10)
- { // MOVW RWx, @RWy + disp8
- m_tmp16 = read_rwX(operand & 7) + (s8)read_8((m_pcb<<16) | (m_pc+2));
+ if ((operand & 0x1f) == 0x1f)
+ {
+ // MOVW RWx, addr16
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ m_tmp16 = read_16((m_prefix << 16) | m_tmp16);
+ }
+ else
+ {
+ m_tmp16 = read_16((m_dtb << 16) | m_tmp16);
+ }
+ write_rwX((operand >> 5) & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_pc += 4;
+ m_icount -= 6;
+ }
+ else if (operand & 0x08)
+ {
+ fatalerror("Unknown F2MC EA7B operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+ }
+ else if (operand & 0x10)
+ {
+ // MOVW RWx, @RWy + disp8
+ m_tmp16 = read_rwX(operand & 7) + s8(read_8((m_pcb << 16) | (m_pc + 2)));
m_tmpea = getRWbank(operand & 0x7, m_tmp16);
m_tmp16 = read_16(m_tmpea);
- write_rwX((operand>>5) & 0x7, m_tmp16);
+ write_rwX((operand >> 5) & 0x7, m_tmp16);
setNZ_16(m_tmp16);
m_pc += 3;
- m_icount -= 5;
+ m_icount -= 7;
}
else
- { // MOVW RWx, RWy
+ {
+ // MOVW RWx, RWy
m_tmp16 = read_rwX(operand & 0x7);
- write_rwX((operand>>5) & 0x7, m_tmp16);
+ write_rwX((operand >> 5) & 0x7, m_tmp16);
setNZ_16(m_tmp16);
m_pc += 2;
m_icount -= 4;
}
}
-void f2mc16_device::execute_set_input(int inputnum, int state)
+void f2mc16_device::opcodes_eari7c(u8 operand)
{
+ if ((operand & 0x1f) == 0x1f)
+ {
+ // MOV addr16, Rx
+ m_tmp8 = read_rX((operand >> 5) & 0x7);
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_8((m_prefix << 16) | m_tmp16, m_tmp8);
+ }
+ else
+ {
+ write_8((m_dtb << 16) | m_tmp16, m_tmp8);
+ }
+ setNZ_8(m_tmp8);
+ m_pc += 4;
+ m_icount -= 5;
+ }
+ else if (operand & 0x08)
+ {
+ fatalerror("Unknown F2MC EA7C operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+ }
+ else if (operand & 0x10)
+ {
+ // MOV @RWx + disp8, Ry
+ m_tmp8 = read_rX((operand >> 5) & 0x7);
+ m_tmp16 = read_rwX(operand & 0x7) + s8(read_8((m_pcb << 16) | (m_pc + 2)));
+ m_tmpea = getRWbank(operand & 0x7, m_tmp16);
+ write_8(m_tmpea, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 3;
+ m_icount -= 6;
+ }
+ else
+ {
+ // MOV Rx, Ry
+ m_tmp8 = read_rX((operand >> 5) & 0x7);
+ write_rX(operand & 0x7, m_tmp8);
+ setNZ_8(m_tmp8);
+ m_pc += 2;
+ m_icount -= 3;
+ }
}
-void f2mc16_device::set_irq(int vector, int level)
+void f2mc16_device::opcodes_earwi7d(u8 operand)
{
- if (m_vector_level[vector] != level)
+ if ((operand & 0x1f) == 0x1f)
+ {
+ // MOVW addr16, RWx
+ m_tmp16aux = read_rwX((operand >> 5) & 0x7);
+ m_tmp16 = read_16((m_pcb << 16) | (m_pc + 2));
+ if (m_prefix_valid)
+ {
+ m_prefix_valid = false;
+ write_16((m_prefix << 16) | m_tmp16, m_tmp16aux);
+ }
+ else
+ {
+ write_16((m_dtb << 16) | m_tmp16, m_tmp16aux);
+ }
+ setNZ_16(m_tmp16aux);
+ m_pc += 4;
+ m_icount -= 5;
+ }
+ else if (operand & 0x08)
+ {
+ fatalerror("Unknown F2MC EA7D operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+ }
+ else if (operand & 0x10)
+ {
+ // MOVW @RWx + disp8, RWy
+ m_tmp16aux = read_rwX((operand >> 5) & 0x7);
+ m_tmp16 = read_rwX(operand & 0x7) + s8(read_8((m_pcb << 16) | (m_pc + 2)));
+ m_tmpea = getRWbank(operand & 0x7, m_tmp16);
+ write_16(m_tmpea, m_tmp16aux);
+ setNZ_16(m_tmp16aux);
+ m_pc += 3;
+ m_icount -= 6;
+ }
+ else
{
- m_outstanding_irqs++;
- m_vector_level[vector] = level;
-// printf("set_irq: vec %d, level %d, %d outstanding\n", vector, level, m_outstanding_irqs);
+ // MOVW RWx, RWy
+ m_tmp16 = read_rwX((operand >> 5) & 0x7);
+ write_rwX(operand & 0x7, m_tmp16);
+ setNZ_16(m_tmp16);
+ m_pc += 2;
+ m_icount -= 3;
}
}
-void f2mc16_device::clear_irq(int vector)
+void f2mc16_device::opcodes_rwiea7f(u8 operand)
{
- if (m_vector_level[vector] < 7)
+ if (operand & 0x18)
+ {
+ fatalerror("Unknown F2MC EA7F operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+ }
+ else
{
- m_outstanding_irqs--;
- m_vector_level[vector] = 7;
- //printf("clear_irq: vec %d, %d outstanding\n", vector, m_outstanding_irqs);
+ // XCHW RWx, RWy
+ m_tmp16 = read_rwX(operand & 0x7);
+ m_tmp16aux = read_rwX((operand>>5) & 0x7);
+ write_rwX((operand>>5) & 0x7, m_tmp16);
+ write_rwX(operand & 0x7, m_tmp16aux);
+ m_pc += 2;
+ m_icount -= 7;
}
}
-// note: this function must not use m_tmp16 unless you change RETI
-void f2mc16_device::take_irq(int vector, int level)
+void f2mc16_device::execute_set_input(int inputnum, int state)
+{
+}
+
+void f2mc16_device::set_irq_level(int irq_level)
+{
+ m_irq_level = (irq_level << 13) | 0x1fff;
+}
+
+void f2mc16_device::take_irq_vector(uint8_t irq_vector)
+{
+ take_irq();
+
+ u32 uVecAddr = 0xfffffc - (irq_vector * 4);
+ m_pc = read_16(uVecAddr);
+ m_pcb = read_8(uVecAddr + 2);
+}
+
+// note: this function must not use m_tmp8/m_tmp16
+void f2mc16_device::take_irq()
{
- standard_irq_callback(vector, (m_pcb<<16) | m_pc);
-// printf("take_irq: vector %d, level %d, old PC = %02x%04x\n", vector, level, m_pcb, m_pc);
push_16_ssp(m_acc>>16);
push_16_ssp(m_acc & 0xffff);
push_16_ssp((m_dpr<<8) | m_adb);
@@ -3414,11 +5608,4 @@ void f2mc16_device::take_irq(int vector, int level)
push_16_ssp(m_ps);
m_ps |= F_S;
- m_ps &= ~0xe000;
- m_ps |= (level & 7) << 13;
-
- u32 uVecAddr = 0xfffffc - (vector * 4);
- m_pc = read_16(uVecAddr);
- m_pcb = read_8(uVecAddr + 2);
- //printf("New PC = %02x%04x, new level=%d\n", m_pcb, m_pc, m_ps>>13);
}
diff --git a/src/devices/cpu/f2mc16/f2mc16.h b/src/devices/cpu/f2mc16/f2mc16.h
index fc1ffc3aa55..495722272e1 100644
--- a/src/devices/cpu/f2mc16/f2mc16.h
+++ b/src/devices/cpu/f2mc16/f2mc16.h
@@ -14,8 +14,6 @@
class f2mc16_device : public cpu_device
{
public:
- friend class mb9061x_device;
-
enum
{
F2MC16_PC, F2MC16_PS, F2MC16_USP, F2MC16_SSP, F2MC16_ACC,
@@ -40,12 +38,15 @@ public:
// construction/destruction
f2mc16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ bool rmw() { return m_rmw; }
+ void set_irq_level(int level);
+
protected:
f2mc16_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
@@ -66,10 +67,12 @@ private:
address_space *m_program;
u16 m_pc, m_usp, m_ssp, m_ps, m_tmp16, m_tmp16aux;
- u8 m_pcb, m_dtb, m_usb, m_ssb, m_adb, m_dpr, m_tmp8, m_prefix;
- u32 m_acc, m_temp, m_tmp32, m_tmpea;
+ u8 m_pcb, m_dtb, m_usb, m_ssb, m_adb, m_dpr, m_tmp8, m_tmp8aux, m_shifted_carry, m_prefix;
+ u32 m_pcbase, m_acc, m_temp, m_tmp32, m_tmpea;
s32 m_icount;
bool m_prefix_valid;
+ u16 m_irq_level;
+ bool m_rmw;
inline u8 read_8(u32 addr)
{
@@ -348,7 +351,7 @@ private:
inline u8 doSUB_8(u8 lhs, u8 rhs)
{
- u16 tmp16 = lhs - rhs;
+ u16 tmp16 = u16(lhs) - u16(rhs);
setNZ_8(tmp16 & 0xff);
m_ps &= ~(F_C|F_V);
if (tmp16 & 0x100)
@@ -364,7 +367,7 @@ private:
}
inline u16 doSUB_16(u16 lhs, u16 rhs)
{
- u32 tmp32 = lhs - rhs;
+ u32 tmp32 = u32(lhs) - u32(rhs);
setNZ_16(tmp32 & 0xffff);
m_ps &= ~(F_C|F_V);
if (tmp32 & 0x10000)
@@ -380,7 +383,7 @@ private:
}
inline u32 doSUB_32(u32 lhs, u32 rhs)
{
- u64 tmp64 = lhs - rhs;
+ u64 tmp64 = u64(lhs) - u64(rhs);
setNZ_32(tmp64 & 0xffffffff);
m_ps &= ~(F_C|F_V);
if (tmp64 & 0x100000000)
@@ -394,6 +397,56 @@ private:
return tmp64 & 0xffffffff;
}
+
+ inline u8 doSUBC_8(u8 lhs, u8 rhs)
+ {
+ u16 tmp16 = u16(lhs) - u16(rhs) - u16((m_ps & F_C) ? 1 : 0);
+ setNZ_8(tmp16 & 0xff);
+ m_ps &= ~(F_C|F_V);
+ if (tmp16 & 0x100)
+ {
+ m_ps |= F_C;
+ }
+ if ((lhs ^ rhs) & (lhs ^ (tmp16 & 0xff)) & 0x80)
+ {
+ m_ps |= F_V;
+ }
+
+ return tmp16 & 0xff;
+ }
+ inline u16 doSUBC_16(u16 lhs, u16 rhs)
+ {
+ u32 tmp32 = u32(lhs) - u32(rhs) - u32((m_ps & F_C) ? 1 : 0);
+ setNZ_16(tmp32 & 0xffff);
+ m_ps &= ~(F_C|F_V);
+ if (tmp32 & 0x10000)
+ {
+ m_ps |= F_C;
+ }
+ if ((lhs ^ rhs) & (lhs ^ (tmp32 & 0xffff)) & 0x8000)
+ {
+ m_ps |= F_V;
+ }
+
+ return tmp32 & 0xffff;
+ }
+ inline u32 doSUBC_32(u32 lhs, u32 rhs)
+ {
+ u64 tmp64 = u64(lhs) - u64(rhs) - u64((m_ps & F_C) ? 1 : 0);
+ setNZ_32(tmp64 & 0xffffffff);
+ m_ps &= ~(F_C|F_V);
+ if (tmp64 & 0x100000000)
+ {
+ m_ps |= F_C;
+ }
+ if ((lhs ^ rhs) & (lhs ^ (tmp64 & 0xffffffff)) & 0x80000000)
+ {
+ m_ps |= F_V;
+ }
+
+ return tmp64 & 0xffffffff;
+ }
+
inline u8 doADD_8(u8 lhs, u8 rhs)
{
u16 tmp16 = lhs + rhs;
@@ -443,6 +496,55 @@ private:
return tmp64 & 0xffffffff;
}
+ inline u8 doADDC_8(u8 lhs, u8 rhs)
+ {
+ u16 tmp16 = lhs + rhs + ((m_ps & F_C) ? 1 : 0);
+ m_ps &= ~(F_C|F_V);
+ if ((tmp16 ^ lhs) & (tmp16 ^ rhs) & 0x80)
+ {
+ m_ps |= F_V;
+ }
+ if (tmp16 > 0xff)
+ {
+ m_ps |= F_C;
+ }
+ setNZ_8(tmp16 & 0xff);
+
+ return tmp16 & 0xff;
+ }
+ inline u16 doADDC_16(u16 lhs, u16 rhs)
+ {
+ u32 tmp32 = lhs + rhs + ((m_ps & F_C) ? 1 : 0);
+ m_ps &= ~(F_C|F_V);
+ if ((tmp32 ^ lhs) & (tmp32 ^ rhs) & 0x8000)
+ {
+ m_ps |= F_V;
+ }
+ if (tmp32 > 0xffff)
+ {
+ m_ps |= F_C;
+ }
+ setNZ_16(tmp32 & 0xffff);
+
+ return tmp32 & 0xffff;
+ }
+ inline u32 doADDC_32(u32 lhs, u32 rhs)
+ {
+ u64 tmp64 = lhs + rhs + ((m_ps & F_C) ? 1 : 0);
+ m_ps &= ~(F_C|F_V);
+ if ((tmp64 ^ lhs) & (tmp64 ^ rhs) & 0x80000000)
+ {
+ m_ps |= F_V;
+ }
+ if (tmp64 > 0xffffffff)
+ {
+ m_ps |= F_C;
+ }
+ setNZ_32(tmp64 & 0xffffffff);
+
+ return tmp64 & 0xffffffff;
+ }
+
inline u8 doINC_8(u8 val)
{
val++;
@@ -518,6 +620,90 @@ private:
m_icount -= 4;
}
+ inline void movsi(u8 dst, u8 src)
+ {
+ if (read_rwX(0) > 0)
+ {
+ m_icount -= 4;
+ while (uint16_t n = read_rwX(0))
+ {
+ u16 al = (m_acc & 0xffff);
+ u16 ah = (m_acc >> 16) & 0xffff;
+ m_tmp8 = read_8((src<<16) | al);
+ write_8((dst<<16) | ah, m_tmp8);
+ al++;
+ ah++;
+ m_acc = (ah<<16) | al;
+ write_rwX(0, n - 1);
+ m_icount -= 8;
+ }
+ }
+ else
+ {
+ m_icount -= 5;
+ }
+ m_pc += 2;
+ }
+
+ inline void movswi(u8 dst, u8 src)
+ {
+ if (read_rwX(0) > 0)
+ {
+ m_icount -= 4;
+ while (uint16_t n = read_rwX(0))
+ {
+ u16 al = (m_acc & 0xffff);
+ u16 ah = (m_acc >> 16) & 0xffff;
+ m_tmp16 = read_16((src<<16) | al);
+ write_16((dst<<16) | ah, m_tmp16);
+ al += 2;
+ ah += 2;
+ m_acc = (ah<<16) | al;
+ write_rwX(0, n - 1);
+ m_icount -= 8;
+ }
+ }
+ else
+ {
+ m_icount -= 5;
+ }
+ m_pc += 2;
+ }
+
+ inline void filsi(u8 dst)
+ {
+ m_icount -= 6;
+ while (uint16_t n = read_rwX(0))
+ {
+ u16 al = (m_acc & 0xffff);
+ u16 ah = (m_acc >> 16) & 0xffff;
+ write_8((dst<<16) | ah, al & 0xff);
+ ah++;
+ m_acc = (ah<<16) | al;
+ write_rwX(0, n - 1);
+ setNZ_8(m_acc & 0xff);
+ m_icount -= 6;
+ }
+ m_pc += 2;
+ }
+
+ inline void filswi(u8 dst)
+ {
+ m_icount -= 6;
+ while (uint16_t n = read_rwX(0))
+ {
+ u16 al = (m_acc & 0xffff);
+ u16 ah = (m_acc >> 16) & 0xffff;
+ write_16((dst<<16) | ah, al);
+ ah += 2;
+ m_acc = (ah<<16) | al;
+ write_rwX(0, n - 1);
+ setNZ_16(m_acc & 0xffff);
+ m_icount -= 6;
+ }
+ m_pc += 2;
+ }
+
void opcodes_bo6c(u8 operand);
void opcodes_str6e(u8 operand);
void opcodes_2b6f(u8 operand);
@@ -530,15 +716,15 @@ private:
void opcodes_ea76(u8 operand);
void opcodes_ea77(u8 operand);
void opcodes_ea78(u8 operand);
- void opcodes_rwi7a(u8 operand);
- void opcodes_rwi7b(u8 operand);
-
- void set_irq(int vector, int level);
- void clear_irq(int vector);
- void take_irq(int vector, int level);
-
- int m_vector_level[256];
- int m_outstanding_irqs;
+ void opcodes_rwiea79(u8 operand);
+ void opcodes_riea7a(u8 operand);
+ void opcodes_rwiea7b(u8 operand);
+ void opcodes_eari7c(u8 operand);
+ void opcodes_earwi7d(u8 operand);
+ void opcodes_rwiea7f(u8 operand);
+
+ void take_irq();
+ void take_irq_vector(uint8_t irq_vector);
};
DECLARE_DEVICE_TYPE(F2MC16, f2mc16_device)
diff --git a/src/devices/cpu/f2mc16/f2mc16_adc.cpp b/src/devices/cpu/f2mc16/f2mc16_adc.cpp
new file mode 100644
index 00000000000..5be1b30cd4d
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_adc.cpp
@@ -0,0 +1,304 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series ADC
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16_adc.h"
+
+namespace {
+
+struct ADCS { enum : uint16_t
+{
+ ANE = 7 << 0,
+ ANS = 7 << 3,
+ MD = 3 << 6,
+ MD_SINGLE_REACTIVATION = 0 << 6,
+ MD_SINGLE = 1 << 6,
+ MD_CONTINUOUS = 2 << 6,
+ MD_STOP = 3 << 6,
+ RESERVED = 1 << 8,
+ STRT = 1 << 9,
+ STS = 3 << 10,
+ STS_ATGX = 1 << 10,
+ STS_TIMER = 2 << 10,
+ PAUS = 1 << 12,
+ INTE = 1 << 13,
+ INT = 1 << 14,
+ BUSY = 1 << 15
+}; };
+
+struct ADCR { enum : uint16_t
+{
+ D07 = 0xff << 0,
+ S10 = 1 << 15,
+ D89 = 3 << 8
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_ADC, f2mc16_adc_device, "f2mc16_adc", "F2MC16 ADC")
+
+f2mc16_adc_device::f2mc16_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t vector) :
+ f2mc16_adc_device(mconfig, tag, owner, clock)
+{
+ m_intc.set_tag(intc);
+ m_vector = vector;
+}
+
+f2mc16_adc_device::f2mc16_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_ADC, tag, owner, clock),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_channel_cb(*this, 0x000),
+ m_peripheral_clock_changed(attotime::zero),
+ m_internal_timer_changed(attotime::zero),
+ m_internal_timer_expired(attotime::never),
+ m_conversion_start_time(attotime::never),
+ m_conversion_finished(attotime::never),
+ m_peripheral_clock_hz(0),
+ m_internal_timer_hz(0),
+ m_conversion_ticks(0),
+ m_channel(-1),
+ m_atgx(1),
+ m_i2osclr(0),
+ m_adcs(0),
+ m_adcr(0)
+{
+}
+
+void f2mc16_adc_device::device_start()
+{
+ m_timer = timer_alloc(FUNC(f2mc16_adc_device::timer_callback), this);
+
+ save_item(NAME(m_peripheral_clock_changed));
+ save_item(NAME(m_internal_timer_changed));
+ save_item(NAME(m_internal_timer_expired));
+ save_item(NAME(m_conversion_start_time));
+ save_item(NAME(m_conversion_finished));
+ save_item(NAME(m_peripheral_clock_hz));
+ save_item(NAME(m_internal_timer_hz));
+ save_item(NAME(m_conversion_ticks));
+ save_item(NAME(m_channel));
+ save_item(NAME(m_atgx));
+ save_item(NAME(m_i2osclr));
+ save_item(NAME(m_adcs));
+ save_item(NAME(m_adcr));
+}
+
+void f2mc16_adc_device::device_reset()
+{
+ m_adcs = 0;
+ m_adcr &= ~ADCR::S10;
+ update();
+}
+
+void f2mc16_adc_device::device_clock_changed()
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_adc_device::update_peripheral_clock), this), clock());
+ else
+ update_peripheral_clock(clock());
+}
+
+void f2mc16_adc_device::i2osclr(int state)
+{
+ if (state && !m_i2osclr)
+ {
+ m_adcs &= ~ADCS::INT;
+
+ update();
+ }
+
+ m_i2osclr = state;
+}
+
+void f2mc16_adc_device::internal_timer_hz(uint32_t hz)
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_adc_device::update_internal_timer), this), hz);
+ else
+ update_internal_timer(hz);
+}
+
+void f2mc16_adc_device::atgx(int state)
+{
+ if (!m_atgx && state && (m_adcs & ADCS::STS_ATGX))
+ {
+ trigger();
+ update();
+ }
+
+ m_atgx = state;
+}
+
+uint16_t f2mc16_adc_device::adcs_r()
+{
+ return m_adcs;
+}
+
+void f2mc16_adc_device::adcs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint16_t prev = m_adcs;
+ COMBINE_DATA(&m_adcs);
+
+ if (ACCESSING_BITS_8_15)
+ {
+ m_adcs = m_adcs & (prev | ~(ADCS::BUSY | ADCS::INT | ADCS::PAUS));
+ if (m_adcs != prev)
+ {
+ if (m_adcs & ADCS::STRT)
+ {
+ m_adcs &= ~ADCS::STRT;
+ trigger();
+ }
+
+ update();
+ }
+ }
+}
+
+uint16_t f2mc16_adc_device::adcr_r()
+{
+ if (!machine().side_effects_disabled())
+ {
+ m_adcs &= ~ADCS::PAUS;
+
+ if ((m_adcs & ADCS::BUSY) && (m_adcs & ADCS::MD) != ADCS::MD_STOP)
+ start_conversion();
+
+ update();
+ }
+
+ return m_adcr;
+}
+
+void f2mc16_adc_device::adcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ if (ACCESSING_BITS_8_15)
+ m_adcr = (m_adcr & ~ADCR::S10) | (data & ADCR::S10);
+}
+
+void f2mc16_adc_device::trigger()
+{
+ if (!(m_adcs & ADCS::BUSY) || (m_adcs & ADCS::MD) == ADCS::MD_SINGLE_REACTIVATION)
+ {
+ m_channel = (m_adcs & ADCS::ANS) >> 3;
+ m_adcs |= ADCS::BUSY;
+ start_conversion();
+ }
+ else if ((m_adcs & ADCS::MD) == ADCS::MD_STOP)
+ start_conversion();
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_adc_device::update_peripheral_clock)
+{
+ if (m_adcs & ADCS::BUSY)
+ update_conversion_ticks();
+
+ m_peripheral_clock_hz = param;
+ m_peripheral_clock_changed = machine().time();
+
+ if (m_adcs & ADCS::BUSY)
+ update();
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_adc_device::update_internal_timer)
+{
+ m_internal_timer_hz = param;
+ m_internal_timer_changed = machine().time();
+
+ if (m_adcs & ADCS::STS_TIMER)
+ update();
+}
+
+void f2mc16_adc_device::start_conversion()
+{
+ m_conversion_ticks = 98;
+}
+
+void f2mc16_adc_device::update_conversion_ticks()
+{
+ if (!m_conversion_start_time.is_never())
+ {
+ attotime now = machine().time();
+ if (m_peripheral_clock_hz)
+ m_conversion_ticks -= ((now - m_conversion_start_time) + attotime::zero).as_ticks(m_peripheral_clock_hz);
+ m_conversion_start_time = now;
+ }
+}
+
+void f2mc16_adc_device::update()
+{
+ attotime now = machine().time();
+
+ attotime event_time = attotime::never;
+
+ if (m_conversion_finished <= now)
+ {
+ uint16_t data = m_channel_cb[m_channel]();
+ if (m_channel_cb[m_channel].isunset())
+ logerror("unmapped read AN%d\n", m_channel);
+
+ if (m_adcr & ADCR::S10)
+ m_adcr = (ADCR::S10) | data >> 2;
+ else
+ m_adcr = data;
+
+ m_adcs |= ADCS::PAUS | ADCS::INT;
+
+ if (m_channel == (m_adcs & ADCS::ANE))
+ {
+ if ((m_adcs & ADCS::MD) == ADCS::MD_CONTINUOUS || (m_adcs & ADCS::MD) == ADCS::MD_STOP)
+ m_channel = (m_adcs & ADCS::ANS) >> 3;
+ else
+ m_adcs &= ~ADCS::BUSY;
+ }
+ else
+ m_channel = (m_channel + 1) & 7;
+
+ m_conversion_ticks = 0;
+ m_conversion_start_time = attotime::never;
+ }
+
+ if (!(m_adcs & ADCS::BUSY) && m_channel >= 0)
+ {
+ m_channel = -1;
+ m_conversion_ticks = 0;
+ m_conversion_start_time = attotime::never;
+ }
+
+ if (m_conversion_start_time.is_never() && m_conversion_ticks && m_peripheral_clock_hz)
+ {
+ m_conversion_start_time = m_peripheral_clock_changed + attotime::from_ticks((now - m_peripheral_clock_changed).as_ticks(m_peripheral_clock_hz) + 1, m_peripheral_clock_hz);
+ if (m_conversion_start_time <= now)
+ m_conversion_start_time += attotime::from_ticks(1, m_peripheral_clock_hz);
+ }
+
+ m_conversion_finished = m_conversion_start_time.is_never() || !m_peripheral_clock_hz ? attotime::never :
+ m_conversion_start_time + attotime::from_ticks(m_conversion_ticks, m_peripheral_clock_hz);
+
+ if (event_time > m_conversion_finished)
+ event_time = m_conversion_finished;
+
+ if (m_internal_timer_expired <= now)
+ trigger();
+
+ m_internal_timer_expired = !(m_adcs & ADCS::STS_TIMER) || !m_internal_timer_hz ? attotime::never :
+ m_internal_timer_changed + attotime::from_ticks((now - m_internal_timer_changed).as_ticks(m_internal_timer_hz) + 1, m_internal_timer_hz);
+ if (m_internal_timer_expired <= now)
+ m_internal_timer_expired += attotime::from_ticks(1, m_internal_timer_hz);
+
+ if (event_time > m_internal_timer_expired)
+ event_time = m_internal_timer_expired;
+
+ m_timer->adjust(event_time.is_never() ? event_time : event_time - now);
+ m_intc->set_irq(m_vector, (m_adcs & ADCS::INTE) && (m_adcs & ADCS::INT));
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_adc_device::timer_callback)
+{
+ update();
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_adc.h b/src/devices/cpu/f2mc16/f2mc16_adc.h
new file mode 100644
index 00000000000..5196904787b
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_adc.h
@@ -0,0 +1,72 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series I/O Port
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_ADC_H
+#define MAME_CPU_F2MC16_F2MC16_ADC_H
+
+#include "f2mc16_intc.h"
+
+#pragma once
+
+class f2mc16_adc_device :
+ public device_t
+{
+public:
+ f2mc16_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t vector);
+ f2mc16_adc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ template<unsigned N> auto channel() { return m_channel_cb[N].bind(); }
+
+ void i2osclr(int state);
+
+ void internal_timer_hz(uint32_t hz);
+ void atgx(int state);
+
+ uint16_t adcs_r();
+ void adcs_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t adcr_r();
+ void adcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_clock_changed() override;
+ virtual void device_reset() override ATTR_COLD;
+
+ TIMER_CALLBACK_MEMBER(update_peripheral_clock);
+ TIMER_CALLBACK_MEMBER(update_internal_timer);
+ TIMER_CALLBACK_MEMBER(timer_callback);
+
+ void trigger();
+ void update();
+ void start_conversion();
+ void update_conversion_ticks();
+
+ required_device<f2mc16_intc_device> m_intc;
+ devcb_read16::array<16> m_channel_cb;
+ uint8_t m_vector;
+
+ emu_timer *m_timer;
+ attotime m_peripheral_clock_changed;
+ attotime m_internal_timer_changed;
+ attotime m_internal_timer_expired;
+ attotime m_conversion_start_time;
+ attotime m_conversion_finished;
+ uint32_t m_peripheral_clock_hz;
+ uint32_t m_internal_timer_hz;
+ uint8_t m_conversion_ticks;
+ int8_t m_channel;
+ int8_t m_atgx;
+ int8_t m_i2osclr;
+ uint16_t m_adcs;
+ uint16_t m_adcr;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_ADC, f2mc16_adc_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16_clock.cpp b/src/devices/cpu/f2mc16/f2mc16_clock.cpp
new file mode 100644
index 00000000000..82111f60299
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_clock.cpp
@@ -0,0 +1,355 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Clock Generator
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16_clock.h"
+
+namespace {
+
+struct CKSCR { enum : uint8_t
+{
+ RESERVED1 = 1 << 7,
+ MCM = 1 << 6,
+ WS = 3 << 4,
+ RESERVED2 = 1 << 3,
+ MCS = 1 << 2,
+ CS = 3 << 0
+}; };
+
+struct LPMCR { enum : uint8_t
+{
+ RESERVED3 = (1 << 0),
+ CG = 3 << 1,
+ RESERVED4 = (1 << 3),
+ RST = 1 << 4,
+ SPL = 1 << 5,
+ SLP = 1 << 6,
+ STP = 1 << 7
+}; };
+
+struct TBTC { enum : uint8_t
+{
+ TEST = 1 << 7,
+ TBIE = 1 << 4,
+ TBOF = 1 << 3,
+ TBR = 1 << 2,
+ TBC = 3 << 0,
+ TBC_2_12 = 0 << 0,
+ TBC_2_14 = 1 << 0,
+ TBC_2_16 = 2 << 0,
+ TBC_2_19 = 3 << 0,
+}; };
+
+struct WDTC { enum : uint8_t
+{
+ WT = 3 << 0,
+ WTE = 1 << 2,
+ SRST = 1 << 3,
+ ERST = 1 << 4,
+ WRST = 1 << 5,
+ STBR = 1 << 6,
+ PONR = 1 << 7
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_CLOCK_GENERATOR, f2mc16_clock_generator_device, "f2mc16_clock_generator", "F2MC16 Clock Generator")
+
+f2mc16_clock_generator_device::f2mc16_clock_generator_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t tbtc_vector) :
+ f2mc16_clock_generator_device(mconfig, tag, owner, clock)
+{
+ m_cpu = downcast<f2mc16_device *>(owner);
+ m_intc.set_tag(intc);
+ m_tbtc_vector = tbtc_vector;
+}
+
+f2mc16_clock_generator_device::f2mc16_clock_generator_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_CLOCK_GENERATOR, tag, owner, clock),
+ m_cpu(nullptr),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_tbtc_vector(0),
+ m_timebase_hz_cb(*this),
+ m_timebase_start_time(attotime::zero),
+ m_tbtc_overflow_time(attotime::never),
+ m_watchdog_overflow_time(attotime::never),
+ m_mainclock_changed(attotime::zero),
+ m_timebase_counter(0),
+ m_tbtc_hz(0),
+ m_mainclock_hz(0),
+ m_reset_reason(WDTC::PONR),
+ m_watchdog_overflow_count(0),
+ m_wt(0),
+ m_ckscr(0),
+ m_lpmcr(0),
+ m_tbtc(0),
+ m_wdtc(WDTC::WTE | WDTC::WT)
+{
+}
+
+void f2mc16_clock_generator_device::device_start()
+{
+ m_timebase_timer = timer_alloc(FUNC(f2mc16_clock_generator_device::timebase_timer_callback), this);
+
+ save_item(NAME(m_timebase_start_time));
+ save_item(NAME(m_tbtc_overflow_time));
+ save_item(NAME(m_mainclock_changed));
+ save_item(NAME(m_timebase_counter));
+ save_item(NAME(m_tbtc_hz));
+ save_item(NAME(m_mainclock_hz));
+ save_item(NAME(m_reset_reason));
+ save_item(NAME(m_ckscr));
+ save_item(NAME(m_lpmcr));
+ save_item(NAME(m_tbtc));
+ save_item(NAME(m_wdtc));
+}
+
+void f2mc16_clock_generator_device::device_clock_changed()
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_clock_generator_device::update_mainclock_hz), this), m_cpu->unscaled_clock());
+ else
+ update_mainclock_hz(m_cpu->unscaled_clock());
+}
+
+void f2mc16_clock_generator_device::device_reset()
+{
+ if (!m_reset_reason)
+ m_reset_reason = WDTC::ERST;
+
+ m_ckscr = ~CKSCR::MCS;
+ m_lpmcr = LPMCR::RESERVED4 | LPMCR::RESERVED3 | LPMCR::RST;
+ m_wdtc |= m_reset_reason | WDTC::WTE | WDTC::WT;
+ m_tbtc = TBTC::TEST | TBTC::TBR;
+ m_reset_reason = 0;
+ m_watchdog_overflow_time = attotime::never;
+
+ timebase_reset();
+ timebase_update();
+}
+
+uint8_t f2mc16_clock_generator_device::ckscr_r()
+{
+ return m_ckscr;
+}
+
+void f2mc16_clock_generator_device::ckscr_w(uint8_t data)
+{
+ data = (m_ckscr & ~(CKSCR::WS | CKSCR::MCS | CKSCR::CS)) | (data & (CKSCR::WS | CKSCR::MCS | CKSCR::CS));
+
+ if (m_ckscr != data)
+ {
+ if (!(m_ckscr & CKSCR::MCS) && (data & CKSCR::MCS))
+ {
+ timebase_reset();
+ timebase_update();
+ }
+
+ m_ckscr = data;
+
+ m_cpu->set_clock_scale((m_ckscr & CKSCR::MCS) ? 1 : (m_ckscr & CKSCR::CS) + 1);
+ }
+}
+
+uint8_t f2mc16_clock_generator_device::lpmcr_r()
+{
+ return m_lpmcr & (LPMCR::SPL | LPMCR::CG);
+}
+
+void f2mc16_clock_generator_device::lpmcr_w(uint8_t data)
+{
+ data |= LPMCR::RESERVED4 | LPMCR::RESERVED3;
+
+ if (m_lpmcr != data)
+ {
+ m_lpmcr = data;
+
+ if (!(m_lpmcr & LPMCR::RST))
+ {
+ m_lpmcr |= LPMCR::RST;
+ m_reset_reason |= WDTC::SRST;
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_clock_generator_device::soft_reset), this));
+ }
+ }
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_clock_generator_device::soft_reset)
+{
+ m_cpu->reset();
+}
+
+uint8_t f2mc16_clock_generator_device::wdtc_r()
+{
+ uint8_t data = m_wdtc;
+
+ if (!machine().side_effects_disabled())
+ m_wdtc &= ~(WDTC::PONR | WDTC::STBR | WDTC::WRST | WDTC::SRST);
+
+ return data | WDTC::WTE | WDTC::WT;
+}
+
+void f2mc16_clock_generator_device::wdtc_w(uint8_t data)
+{
+ uint8_t prev = m_wdtc;
+ m_wdtc = data & (m_wdtc | ~WDTC::WTE);
+
+ if (!(data & WDTC::WTE))
+ {
+ m_watchdog_overflow_count = 0;
+
+ if (prev & WDTC::WTE)
+ {
+ m_wt = m_wdtc & WDTC::WT;
+
+ timebase_update_counter();
+ timebase_update();
+ }
+ }
+}
+
+uint8_t f2mc16_clock_generator_device::tbtc_r()
+{
+ if (!m_cpu->rmw() && m_tbtc_overflow_time > machine().time())
+ return m_tbtc & ~TBTC::TBOF;
+
+ return m_tbtc;
+}
+
+void f2mc16_clock_generator_device::tbtc_w(uint8_t data)
+{
+ if (m_tbtc != data)
+ {
+ timebase_update_counter();
+
+ m_tbtc = data;
+
+ if (!(data & TBTC::TBR))
+ {
+ timebase_reset();
+ m_tbtc |= TBTC::TBR;
+ }
+
+ if (!(data & TBTC::TBOF))
+ {
+ if (m_tbtc_overflow_time <= machine().time())
+ m_tbtc_overflow_time = attotime::never;
+
+ m_tbtc |= TBTC::TBOF;
+ }
+
+ timebase_update();
+ }
+}
+
+void f2mc16_clock_generator_device::timebase_reset()
+{
+ m_timebase_counter = 0;
+ m_timebase_start_time = attotime::never;
+ m_tbtc_overflow_time = attotime::never;
+ m_tbtc_hz = 0;
+}
+
+void f2mc16_clock_generator_device::timebase_update()
+{
+ static const int cycles[4] = { 1 << 12, 1 << 14, 1 << 16, 1 << 19 };
+ attotime now = machine().time();
+
+ if (m_timebase_start_time == attotime::never)
+ m_timebase_start_time = now;
+
+ uint32_t event_ticks = 0;
+ attotime event_time = attotime::never;
+
+ if (m_tbtc_overflow_time > now)
+ {
+ uint32_t tbtc_ticks = cycles[m_tbtc & TBTC::TBC] - (m_timebase_counter & (cycles[m_tbtc & TBTC::TBC] - 1));
+ m_tbtc_overflow_time = m_timebase_start_time.is_never() || !m_mainclock_hz ? attotime::never :
+ m_timebase_start_time + attotime::from_ticks(tbtc_ticks, m_mainclock_hz);
+
+ if ((m_tbtc & TBTC::TBIE) && event_time > m_tbtc_overflow_time)
+ {
+ event_time = m_tbtc_overflow_time;
+ event_ticks = tbtc_ticks;
+ }
+ }
+
+ if (!(m_wdtc & WDTC::WTE))
+ {
+ if (m_watchdog_overflow_time < now)
+ {
+ m_watchdog_overflow_count++;
+ if (m_watchdog_overflow_count == 4)
+ {
+ m_reset_reason |= WDTC::WRST;
+ m_cpu->reset();
+ }
+ }
+
+ uint32_t watchdog_ticks = cycles[m_wt] - (m_timebase_counter & (cycles[m_wt] - 1));
+ attotime wdof = m_timebase_start_time.is_never() || !m_mainclock_hz ? attotime::never :
+ m_timebase_start_time + attotime::from_ticks(watchdog_ticks, m_mainclock_hz);
+ m_watchdog_overflow_time = wdof;
+
+ if (event_time > wdof)
+ {
+ event_time = wdof;
+ event_ticks = watchdog_ticks;
+ }
+ }
+
+ if (m_tbtc_hz != m_mainclock_hz && !m_timebase_hz_cb.isunset())
+ {
+ if ((m_timebase_counter % 512) != 0 && m_mainclock_hz)
+ {
+ uint32_t sync_ticks = 512 - (m_timebase_counter & (512 - 1));
+ attotime sync_time = m_timebase_start_time.is_never() || !m_mainclock_hz ? attotime::never :
+ m_timebase_start_time + attotime::from_ticks(sync_ticks, m_mainclock_hz);
+
+ if (event_time > sync_time)
+ {
+ event_time = sync_time;
+ event_ticks = sync_ticks;
+ }
+ }
+ else
+ {
+ m_timebase_hz_cb(m_mainclock_hz / 512);
+ m_tbtc_hz = m_mainclock_hz;
+ }
+ }
+
+ m_timebase_timer->adjust(event_time.is_never() ? event_time : event_time - now, event_ticks);
+ m_intc->set_irq(m_tbtc_vector, ((m_tbtc & TBTC::TBIE) && m_tbtc_overflow_time <= now) ? 1 : 0);
+}
+
+void f2mc16_clock_generator_device::timebase_update_counter()
+{
+ attotime now = machine().time();
+ uint64_t ticks = ((now - m_timebase_start_time) + attotime::zero).as_ticks(m_mainclock_hz);
+ m_timebase_counter += ticks;
+ m_timebase_counter &= 0x3ffff;
+ m_timebase_start_time = now;
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_clock_generator_device::update_mainclock_hz)
+{
+ timebase_update_counter();
+
+ m_mainclock_hz = param;
+ m_mainclock_changed = machine().time();
+
+ timebase_update();
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_clock_generator_device::timebase_timer_callback)
+{
+ m_timebase_counter += param;
+ m_timebase_counter &= 0x3ffff;
+ m_timebase_start_time = machine().time();
+
+ timebase_update();
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_clock.h b/src/devices/cpu/f2mc16/f2mc16_clock.h
new file mode 100644
index 00000000000..c0774bb2a90
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_clock.h
@@ -0,0 +1,74 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Clock Generator
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_CLOCK_H
+#define MAME_CPU_F2MC16_F2MC16_CLOCK_H
+
+#pragma once
+
+#include "f2mc16.h"
+#include "f2mc16_intc.h"
+
+class f2mc16_clock_generator_device :
+ public device_t
+{
+public:
+ f2mc16_clock_generator_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t m_tbtc_vector);
+ f2mc16_clock_generator_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ auto timebase_hz() { return m_timebase_hz_cb.bind(); }
+
+ uint8_t lpmcr_r();
+ void lpmcr_w(uint8_t data);
+
+ uint8_t wdtc_r();
+ void wdtc_w(uint8_t data);
+
+ uint8_t tbtc_r();
+ void tbtc_w(uint8_t data);
+ uint8_t ckscr_r();
+ void ckscr_w(uint8_t data);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_clock_changed() override;
+ virtual void device_reset() override ATTR_COLD;
+
+ void timebase_reset();
+ void timebase_update();
+ void timebase_update_counter();
+ TIMER_CALLBACK_MEMBER(soft_reset);
+ TIMER_CALLBACK_MEMBER(update_mainclock_hz);
+ TIMER_CALLBACK_MEMBER(timebase_timer_callback);
+
+ f2mc16_device *m_cpu;
+ required_device<f2mc16_intc_device> m_intc;
+ uint8_t m_tbtc_vector;
+ devcb_write32 m_timebase_hz_cb;
+
+ emu_timer *m_timebase_timer;
+ attotime m_timebase_start_time;
+ attotime m_tbtc_overflow_time;
+ attotime m_watchdog_overflow_time;
+ attotime m_mainclock_changed;
+ uint32_t m_timebase_counter;
+ uint32_t m_tbtc_hz;
+ uint32_t m_mainclock_hz;
+ uint8_t m_reset_reason;
+ uint8_t m_watchdog_overflow_count;
+ uint8_t m_wt;
+ uint8_t m_ckscr;
+ uint8_t m_lpmcr;
+ uint8_t m_tbtc;
+ uint8_t m_wdtc;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_CLOCK_GENERATOR, f2mc16_clock_generator_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16_intc.cpp b/src/devices/cpu/f2mc16/f2mc16_intc.cpp
new file mode 100644
index 00000000000..b9ba1bf65e4
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_intc.cpp
@@ -0,0 +1,269 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Interrupt Controller/EI2OS
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16.h"
+#include "f2mc16_intc.h"
+
+namespace {
+
+struct ICR { enum : uint16_t
+{
+ IL = 7 << 0,
+ ISE = 1 << 3,
+ S = 3 << 4,
+ S_COUNT_COMPLETION = 1 << 4,
+ S_COMPLETION_REQUEST = 3 << 4,
+ ICS = 15 << 4,
+}; };
+
+struct ISCS { enum : uint8_t
+{
+ RESERVED = 7 << 5,
+ IF = 1 << 4,
+ BW = 1 << 3,
+ BF = 1 << 2,
+ DIR = 1 << 1,
+ SE = 1 << 0
+}; };
+
+struct DIRR { enum : uint16_t
+{
+ R0 = 1 << 0
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_INTC, f2mc16_intc_device, "f2mc16_intc", "F2MC16 INTC")
+
+f2mc16_intc_device::f2mc16_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_INTC, tag, owner, clock),
+ m_cpu(nullptr),
+ m_i2osclr_cb(*this),
+ m_digm_vector(0x2a),
+ m_irq_state(0),
+ m_completion_request_state(0),
+ m_active_irq(0)
+{
+}
+
+void f2mc16_intc_device::device_start()
+{
+ m_cpu = downcast<f2mc16_device *>(owner());
+ std::fill_n(m_icr, std::size(m_icr), ICR::IL);
+ std::fill_n(m_ics, std::size(m_ics), 0);
+ save_item(NAME(m_icr));
+ save_item(NAME(m_dirr));
+ save_item(NAME(m_enir));
+ save_item(NAME(m_eirr));
+ save_item(NAME(m_elvr));
+ save_item(NAME(m_irq_state));
+ save_item(NAME(m_completion_request_state));
+ save_item(NAME(m_active_irq));
+}
+
+void f2mc16_intc_device::device_reset()
+{
+ std::fill_n(m_icr, std::size(m_icr), ICR::IL);
+ m_enir = 0;
+ m_eirr = 0;
+ m_elvr = 0;
+ m_dirr = 0;
+}
+
+uint8_t f2mc16_intc_device::icr_r(offs_t offset)
+{
+ return m_icr[offset];
+}
+
+void f2mc16_intc_device::icr_w(offs_t offset, uint8_t data)
+{
+ m_ics[offset] = (data & ICR::ICS) >> 4;
+ m_icr[offset] = (m_icr[offset] & ICR::ICS) | (data & ~ICR::ICS);
+ update();
+}
+
+uint8_t f2mc16_intc_device::enir_r()
+{
+ return m_enir;
+}
+
+void f2mc16_intc_device::enir_w(uint8_t data)
+{
+ m_enir = data;
+}
+
+uint8_t f2mc16_intc_device::eirr_r()
+{
+ if (m_cpu->rmw())
+ return 0xff;
+ return m_eirr;
+}
+
+void f2mc16_intc_device::eirr_w(uint8_t data)
+{
+ m_eirr &= data;
+}
+
+uint8_t f2mc16_intc_device::elvr_r(offs_t offset)
+{
+ if (offset == 0)
+ return m_elvr >> 0;
+ else
+ return m_elvr >> 8;
+}
+
+void f2mc16_intc_device::elvr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_elvr);
+}
+
+uint8_t f2mc16_intc_device::dirr_r()
+{
+ return m_dirr;
+}
+
+void f2mc16_intc_device::dirr_w(uint8_t data)
+{
+ data &= DIRR::R0;
+
+ if (m_dirr != data)
+ {
+ m_dirr = data;
+
+ set_irq(m_digm_vector, m_dirr & DIRR::R0);
+ }
+}
+
+void f2mc16_intc_device::set_irq(uint8_t vector, int state)
+{
+ int irq = vector - m_external_interrupt_vector;
+
+ if (BIT(m_irq_state, irq) != state)
+ {
+ if (state)
+ m_irq_state |= 1 << irq;
+ else
+ m_irq_state &= ~(1 << irq);
+
+ update();
+ }
+}
+
+void f2mc16_intc_device::set_completion_request(uint8_t vector, int state)
+{
+ int irq = vector - m_external_interrupt_vector;
+
+ if (state)
+ m_completion_request_state |= 1 << irq;
+ else
+ m_completion_request_state &= ~(1 << irq);
+}
+
+void f2mc16_intc_device::update()
+{
+ int level = 7;
+
+ if (m_irq_state)
+ for (int i = 0; i < 32; i++)
+ {
+ if (BIT(m_irq_state, i))
+ {
+ int il = m_icr[i / 2] & ICR::IL;
+ if (level > il)
+ {
+ m_active_irq = i;
+ level = il;
+ }
+ }
+ }
+
+ m_cpu->set_irq_level(level);
+}
+
+IRQ_CALLBACK_MEMBER(f2mc16_intc_device::irq_acknowledge_callback)
+{
+ int irq = m_active_irq;
+ int icr = irq / 2;
+
+ if (m_icr[icr] & ICR::ISE)
+ {
+ offs_t isd = 0x100 + (m_ics[icr] * 8);
+ address_space &space = m_cpu->space(AS_PROGRAM);
+ uint8_t iscs = space.read_byte(isd + 3); m_cpu->adjust_icount(-1);
+
+ m_icr[icr] &= ~ICR::S;
+
+ if ((iscs & ISCS::SE) && BIT(m_completion_request_state, irq))
+ {
+ m_icr[icr] &= ~ICR::ISE;
+ m_icr[icr] |= ICR::S_COMPLETION_REQUEST;
+ }
+ else
+ {
+ uint32_t bap = space.read_word(isd + 0) | (space.read_byte(isd + 2) << 16); m_cpu->adjust_icount(-1);
+ uint16_t ioa = space.read_word(isd + 4); m_cpu->adjust_icount(-1);
+ uint16_t dc = space.read_word(isd + 6); m_cpu->adjust_icount(-1);
+
+ uint16_t data = (iscs & ISCS::DIR) ?
+ ((iscs & ISCS::BW) ?
+ space.read_word(bap) :
+ space.read_byte(bap)) :
+ ((iscs & ISCS::BW) ?
+ space.read_word(ioa) :
+ space.read_byte(ioa));
+ m_cpu->adjust_icount(-1);
+
+ if (iscs & ISCS::DIR)
+ {
+ if (iscs & ISCS::BW)
+ space.write_word(ioa, data);
+ else
+ space.write_byte(ioa, data);
+ }
+ else
+ {
+ if (iscs & ISCS::BW)
+ space.write_word(bap, data);
+ else
+ space.write_byte(bap, data);
+ }
+
+ m_cpu->adjust_icount(-1);
+
+ if (!(iscs & ISCS::BF))
+ {
+ space.write_word(isd + 0, bap + ((iscs & ISCS::BW) ? 2 : 1)); m_cpu->adjust_icount(-1);
+ }
+
+ if (!(iscs & ISCS::IF))
+ {
+ space.write_word(isd + 4, ioa + ((iscs & ISCS::BW) ? 2 : 1)); m_cpu->adjust_icount(-1);
+ }
+
+ dc--;
+ space.write_word(isd + 6, dc); m_cpu->adjust_icount(-1);
+
+ if (!m_i2osclr_cb[irq].isunset())
+ {
+ m_i2osclr_cb[irq](1);
+ m_i2osclr_cb[irq](0);
+ }
+
+ if (dc == 0)
+ {
+ m_icr[icr] &= ~ICR::ISE;
+ m_icr[icr] |= ICR::S_COUNT_COMPLETION;
+ }
+ else
+ return 0;
+ }
+ }
+
+ return irq + m_external_interrupt_vector;
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_intc.h b/src/devices/cpu/f2mc16/f2mc16_intc.h
new file mode 100644
index 00000000000..8389bce1efb
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_intc.h
@@ -0,0 +1,64 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series INTC
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_INTC_H
+#define MAME_CPU_F2MC16_F2MC16_INTC_H
+
+#pragma once
+
+#include "f2mc16.h"
+
+class f2mc16_intc_device :
+ public device_t
+{
+public:
+ f2mc16_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ template<unsigned N> auto i2osclr() { return m_i2osclr_cb[N - m_external_interrupt_vector].bind(); }
+
+ uint8_t icr_r(offs_t offset);
+ void icr_w(offs_t offset, uint8_t data);
+ uint8_t enir_r();
+ void enir_w(uint8_t data);
+ uint8_t eirr_r();
+ void eirr_w(uint8_t data);
+ uint8_t elvr_r(offs_t offset);
+ void elvr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t dirr_r();
+ void dirr_w(uint8_t data);
+
+ void set_irq(uint8_t vector, int state);
+ void set_completion_request(uint8_t vector, int state);
+ IRQ_CALLBACK_MEMBER(irq_acknowledge_callback);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update();
+
+ f2mc16_device *m_cpu;
+ devcb_write_line::array<0x20> m_i2osclr_cb;
+ static constexpr uint8_t m_external_interrupt_vector = 0x0b;
+ uint8_t m_digm_vector;
+
+ uint8_t m_icr[0x10];
+ uint8_t m_ics[0x10];
+ uint8_t m_dirr;
+ uint8_t m_enir;
+ uint8_t m_eirr;
+ uint16_t m_elvr;
+ uint32_t m_irq_state;
+ uint32_t m_completion_request_state;
+ uint8_t m_active_irq;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_INTC, f2mc16_intc_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16_port.cpp b/src/devices/cpu/f2mc16/f2mc16_port.cpp
new file mode 100644
index 00000000000..1d32afe5a37
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_port.cpp
@@ -0,0 +1,127 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series I/O Port
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16.h"
+#include "f2mc16_port.h"
+
+DEFINE_DEVICE_TYPE(F2MC16_PORT, f2mc16_port_device, "f2mc16_port", "F2MC16 Port")
+
+f2mc16_port_device::f2mc16_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_PORT, tag, owner, clock),
+ m_cpu(nullptr),
+ m_defval(0),
+ m_mask(0),
+ m_read_cb(*this, 0xff),
+ m_write_cb(*this),
+ m_pdr(0xff),
+ m_output(0)
+{
+}
+
+f2mc16_port_device::f2mc16_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint8_t defval, uint8_t mask) :
+ f2mc16_port_device(mconfig, tag, owner)
+{
+ m_cpu = downcast<f2mc16_device *>(owner);
+ m_defval = defval;
+ m_mask = mask;
+}
+
+void f2mc16_port_device::device_start()
+{
+ save_item(NAME(m_pdr));
+ save_item(NAME(m_ddr));
+ save_item(NAME(m_ader));
+ save_item(NAME(m_output));
+}
+
+void f2mc16_port_device::device_reset()
+{
+ if (m_defval)
+ m_pdr = m_defval;
+ m_ddr = m_defval;
+ m_ader = m_defval;
+
+ update_output(true);
+}
+
+uint8_t f2mc16_port_device::pdr_r()
+{
+ uint8_t mask = ~m_ddr & m_mask;
+
+ if (mask)
+ {
+ if (!m_read_cb.isunset())
+ return (m_read_cb(0, mask) & mask) | (m_pdr & m_ddr);
+ else if (!machine().side_effects_disabled())
+ logerror("%s unmapped read %02x\n", machine().describe_context(), mask);
+ return m_pdr | mask;
+ }
+
+ return m_pdr;
+}
+
+uint8_t f2mc16_port_device::pdr_adc_r()
+{
+ if (m_cpu->rmw())
+ return m_pdr;
+
+ uint8_t mask = ~m_ader & m_pdr & m_mask;
+
+ if (mask)
+ {
+ if (!m_read_cb.isunset())
+ return m_read_cb(0, mask) & mask;
+ else if (!machine().side_effects_disabled())
+ logerror("%s unmapped read (mask=0x%02x)\n", machine().describe_context(), mask);
+ }
+
+ return 0x00;
+}
+
+void f2mc16_port_device::pdr_w(uint8_t data)
+{
+ m_pdr = data & m_mask;
+ update_output();
+}
+
+uint8_t f2mc16_port_device::ddr_r()
+{
+ return m_ddr;
+}
+
+void f2mc16_port_device::ddr_w(uint8_t data)
+{
+ m_ddr = data & m_mask;
+ update_output();
+}
+
+uint8_t f2mc16_port_device::ader_r()
+{
+ return m_ader;
+}
+
+void f2mc16_port_device::ader_w(uint8_t data)
+{
+ m_ader = data;
+}
+
+void f2mc16_port_device::update_output(bool initial)
+{
+ uint8_t output = m_pdr | (~m_ddr & m_mask);
+
+ if (m_output != output || initial)
+ {
+ m_output = output;
+
+ if (!m_write_cb.isunset())
+ m_write_cb(0, m_output, m_ddr & m_mask);
+ else if (!initial)
+ logerror("%s unmapped write %02x (mask=0x%02x)\n", machine().describe_context(), m_pdr & m_ddr, m_ddr);
+ }
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_port.h b/src/devices/cpu/f2mc16/f2mc16_port.h
new file mode 100644
index 00000000000..30b487136e4
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_port.h
@@ -0,0 +1,57 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Port
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_PORT_H
+#define MAME_CPU_F2MC16_F2MC16_PORT_H
+
+#pragma once
+
+#include "f2mc16.h"
+
+class f2mc16_port_device :
+ public device_t
+{
+public:
+ f2mc16_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint8_t defval, uint8_t mask);
+ f2mc16_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ auto read() { return m_read_cb.bind(); }
+ auto write() { return m_write_cb.bind(); }
+
+ uint8_t pdr_r();
+ uint8_t pdr_adc_r();
+ void pdr_w(uint8_t data);
+
+ uint8_t ddr_r();
+ void ddr_w(uint8_t data);
+
+ uint8_t ader_r();
+ void ader_w(uint8_t data);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update_output(bool initial = false);
+
+ f2mc16_device *m_cpu;
+ uint8_t m_defval;
+ uint8_t m_mask;
+ devcb_read8 m_read_cb;
+ devcb_write8 m_write_cb;
+
+ uint8_t m_pdr;
+ uint8_t m_ddr;
+ uint8_t m_ader;
+ uint8_t m_output;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_PORT, f2mc16_port_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16_ppg.cpp b/src/devices/cpu/f2mc16/f2mc16_ppg.cpp
new file mode 100644
index 00000000000..547a993f420
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_ppg.cpp
@@ -0,0 +1,348 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Programmable Pulse Generator
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16_ppg.h"
+
+namespace {
+
+struct PPGC { enum : uint8_t
+{
+ PEN = 1 << 7,
+ PCS = 1 << 6, // channel 1
+ POE = 1 << 5,
+ PIE = 1 << 4,
+ PUF = 1 << 3,
+ PCM = 3 << 1, // channel 0
+ PCM_DIV1 = 0 << 1,
+ PCM_DIV4 = 1 << 1,
+ PCM_DIV16 = 2 << 1,
+ PCM_TIMEBASE = 3 << 1,
+ MD = 3 << 1, // channel 1
+ MD_2_CHANNEL = 0 << 1,
+ MD_SINGLE_CHANNEL_8BIT_PRESCALER = 1 << 1,
+ MD_SINGLE_CHANNEL_16BIT = 3 << 1,
+ RESERVED = 1 << 0
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_PPG, f2mc16_ppg_device, "f2mc16_ppg", "F2MC16 Programmable Pulse Generator")
+
+f2mc16_ppg_device::f2mc16_ppg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t ppg0_vector, uint8_t ppg1_vector) :
+ f2mc16_ppg_device(mconfig, tag, owner, clock)
+{
+ m_cpu = downcast<f2mc16_device *>(owner);
+ m_intc.set_tag(intc);
+ m_vector[0] = ppg0_vector;
+ m_vector[1] = ppg1_vector;
+}
+
+f2mc16_ppg_device::f2mc16_ppg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_PPG, tag, owner, clock),
+ m_cpu(nullptr),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_vector{ 0,0 },
+ m_output_cb(*this),
+ m_peripheral_clock_hz(0),
+ m_peripheral_clock_changed(attotime::zero),
+ m_timebase_hz(0),
+ m_timebase_changed(attotime::zero),
+ m_clocksel(),
+ m_hz(),
+ m_duty(),
+ m_pcnt(),
+ m_pcntrl(),
+ m_lh(),
+ m_ppgc(),
+ m_prll(),
+ m_prlh()
+{
+}
+
+void f2mc16_ppg_device::device_start()
+{
+ m_timer[0] = timer_alloc(FUNC(f2mc16_ppg_device::timer_callback<0>), this);
+ m_timer[1] = timer_alloc(FUNC(f2mc16_ppg_device::timer_callback<1>), this);
+ m_start_time[0] = attotime::never;
+ m_start_time[1] = attotime::never;
+
+ save_item(NAME(m_peripheral_clock_hz));
+ save_item(NAME(m_timebase_hz));
+ save_item(NAME(m_start_time));
+ save_item(NAME(m_underflow_time));
+ save_item(NAME(m_clocksel));
+ save_item(NAME(m_hz));
+ save_item(NAME(m_duty));
+ save_item(NAME(m_pcnt));
+ save_item(NAME(m_pcntrl));
+ save_item(NAME(m_lh));
+ save_item(NAME(m_ppgc));
+ save_item(NAME(m_prll));
+ save_item(NAME(m_prlh));
+}
+
+void f2mc16_ppg_device::device_clock_changed()
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_ppg_device::update_peripheral_clock), this), clock());
+ else
+ update_peripheral_clock(clock());
+}
+
+void f2mc16_ppg_device::device_reset()
+{
+ update_pcnt();
+
+ for (int i = 0; i < 2; i++)
+ m_ppgc[i] = PPGC::PUF | PPGC::RESERVED;
+
+ update();
+}
+
+void f2mc16_ppg_device::timebase_hz(uint32_t hz)
+{
+ if (started() && machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_ppg_device::update_timebase_hz), this), hz);
+ else
+ update_timebase_hz(hz);
+}
+
+uint8_t f2mc16_ppg_device::ppgc_r(offs_t offset)
+{
+ if (!m_cpu->rmw() && m_underflow_time[offset] >= machine().time())
+ return m_ppgc[offset] & ~PPGC::PUF;
+
+ return m_ppgc[offset];
+}
+
+void f2mc16_ppg_device::ppgc_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint16_t ppgc = (m_ppgc[1] << 8) | m_ppgc[0];
+ uint16_t prev = ppgc;
+ COMBINE_DATA(&ppgc);
+
+ if (ppgc != prev)
+ {
+ update_pcnt();
+
+ m_ppgc[0] = ppgc >> 0;
+ m_ppgc[1] = ppgc >> 8;
+
+ if (ACCESSING_BITS_0_7 && !(m_ppgc[0] & PPGC::PUF) && m_underflow_time[0] <= machine().time())
+ {
+ m_ppgc[0] |= PPGC::PUF;
+ m_underflow_time[0] = attotime::never;
+ }
+
+ if (ACCESSING_BITS_8_15 && !(m_ppgc[1] & PPGC::PUF) && m_underflow_time[1] <= machine().time())
+ {
+ m_ppgc[1] |= PPGC::PUF;
+ m_underflow_time[1] = attotime::never;
+ }
+
+ update();
+ }
+}
+
+template<unsigned N>
+uint16_t f2mc16_ppg_device::prl_r()
+{
+ return (m_prlh[N] << 8) | m_prll[N];
+}
+
+template<unsigned N>
+void f2mc16_ppg_device::prl_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint16_t prl = (m_prlh[N] << 8) | m_prll[N];
+ uint16_t prev = prl;
+ COMBINE_DATA(&prl);
+ if (prl != prev)
+ {
+ update_pcnt();
+
+ m_prll[N] = prl >> 0;
+ m_prlh[N] = prl >> 8;
+
+ update();
+ }
+}
+
+void f2mc16_ppg_device::update()
+{
+ attotime now = machine().time();
+
+ for (int i = 0; i < 2; i++)
+ {
+ bool start = false;
+
+ if (!(m_ppgc[i] & PPGC::PEN))
+ m_start_time[i] = attotime::never;
+ else if (m_start_time[i].is_never())
+ {
+ m_start_time[i] = now;
+ start = true;
+ }
+
+ uint8_t pcm = (i == 0 || (m_ppgc[1] & PPGC::MD) != PPGC::MD_2_CHANNEL) ?
+ (m_ppgc[0] & PPGC::PCM) :
+ (m_ppgc[1] & PPGC::PCS) ? PPGC::PCM_TIMEBASE : PPGC::PCM_DIV1;
+
+ m_clocksel[i] = m_start_time[i].is_never() ? 0 :
+ (pcm == PPGC::PCM_DIV1) ? m_peripheral_clock_hz :
+ (pcm == PPGC::PCM_DIV4) ? m_peripheral_clock_hz / 4 :
+ (pcm == PPGC::PCM_DIV16) ? m_peripheral_clock_hz / 16 :
+ (pcm == PPGC::PCM_TIMEBASE) ? m_timebase_hz :
+ 0;
+
+ if ((m_ppgc[1] & PPGC::MD) == PPGC::MD_2_CHANNEL)
+ {
+ m_pcntrl[i][0] = m_prll[i] + 1;
+ m_pcntrl[i][1] = m_prlh[i] + 1;
+ }
+ else if ((m_ppgc[1] & PPGC::MD) == PPGC::MD_SINGLE_CHANNEL_8BIT_PRESCALER)
+ {
+ if (i == 0)
+ {
+ m_pcntrl[i][0] = m_prll[i] + 1;
+ m_pcntrl[i][1] = m_prlh[i] + 1;
+ }
+ else
+ {
+ uint16_t prescale = (m_prll[0] + 1) + (m_prlh[0] + 1);
+ m_pcntrl[i][0] = (m_prll[i] + 1) * prescale;
+ m_pcntrl[i][1] = (m_prlh[i] + 1) * prescale;
+ }
+ }
+ else if ((m_ppgc[1] & PPGC::MD) == PPGC::MD_SINGLE_CHANNEL_16BIT)
+ {
+ m_pcntrl[i][0] = ((m_prll[1] << 8) | m_prll[0]) + 1;
+ m_pcntrl[i][1] = ((m_prlh[1] << 8) | m_prlh[0]) + 1;
+ }
+ else
+ {
+ m_pcntrl[i][0] = 0;
+ m_pcntrl[i][1] = 0;
+ }
+
+ if (start)
+ m_pcnt[i][m_lh[i]] = m_pcntrl[i][m_lh[i]];
+
+ m_pcnt[i][!m_lh[i]] = m_pcntrl[i][!m_lh[i]];
+
+ attotime event_time = attotime::never;
+
+ attotime puf = m_start_time[i].is_never() || !m_clocksel[i] ? attotime::never :
+ m_start_time[i] + attotime::from_ticks(m_pcnt[i][m_lh[i]], m_clocksel[i]);
+
+ if (m_underflow_time[i] > now)
+ {
+ m_underflow_time[i] = puf;
+
+ if ((m_ppgc[i] & PPGC::PIE) && event_time > puf)
+ event_time = puf;
+ }
+
+ uint32_t total = (m_ppgc[i] & PPGC::POE) ? m_pcntrl[i][0] + m_pcntrl[i][1] : 0;
+ uint32_t hz = total ? m_clocksel[i] / total : 0;
+ uint32_t duty = hz ? (0x100000000ULL * m_pcntrl[i][1]) / total : 0;
+
+ if (m_hz[i] != hz || m_duty[i] != duty)
+ {
+ if ((m_lh[i] || m_pcnt[i][0] != m_pcntrl[i][0] || m_pcnt[i][1] != m_pcntrl[i][1]) && hz)
+ {
+ if (event_time > puf)
+ event_time = puf;
+ }
+ else
+ {
+ if (!m_output_cb[i].isunset())
+ m_output_cb[i](0, hz, duty);
+ else if ((m_ppgc[1] & PPGC::MD) != PPGC::MD_SINGLE_CHANNEL_8BIT_PRESCALER || (m_output_cb[0].isunset() && m_output_cb[1].isunset()))
+ logerror("%s PPG%d unmapped write %d, %d, %08x\n", machine().describe_context(), i, 0, hz, duty);
+
+ m_hz[i] = hz;
+ m_duty[i] = duty;
+ }
+ }
+
+ m_timer[i]->adjust(event_time.is_never() ? event_time : event_time - now);
+ m_intc->set_irq(m_vector[i], ((m_ppgc[i] & PPGC::PIE) && m_underflow_time[i] <= now) ? 1 : 0);
+ }
+}
+
+void f2mc16_ppg_device::update_pcnt()
+{
+ for (int i = 0; i < 2; i++)
+ {
+ if (m_start_time[i] != attotime::never)
+ {
+ attotime now = machine().time();
+ int64_t ticks = (now - m_start_time[i]).as_ticks(m_clocksel[i]);
+
+ for (int p = 0; p < 4 && ticks; p++)
+ {
+ if (m_pcnt[i][m_lh[i]] > ticks)
+ {
+ m_pcnt[i][m_lh[i]] -= ticks;
+ ticks = 0;
+ }
+ else
+ {
+ ticks -= m_pcnt[i][m_lh[i]];
+ m_pcnt[i][m_lh[i]] = m_pcntrl[i][m_lh[i]];
+ m_lh[i] = !m_lh[i];
+ }
+
+ if (p == 1 && (m_pcntrl[i][0] + m_pcntrl[i][1]))
+ ticks %= (m_pcntrl[i][0] + m_pcntrl[i][1]);
+ }
+
+ m_start_time[i] = now;
+ }
+ }
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_ppg_device::update_timebase_hz)
+{
+ update_pcnt();
+
+ m_timebase_hz = param;
+
+ if (started())
+ {
+ m_timebase_changed = machine().time();
+
+ update();
+ }
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_ppg_device::update_peripheral_clock)
+{
+ update_pcnt();
+
+ m_peripheral_clock_hz = param;
+ m_peripheral_clock_changed = machine().time();
+
+ update();
+}
+
+template <unsigned N>
+TIMER_CALLBACK_MEMBER(f2mc16_ppg_device::timer_callback)
+{
+ m_lh[N] = !m_lh[N];
+ m_pcnt[N][m_lh[N]] = m_pcntrl[N][m_lh[N]];
+ m_start_time[N] = machine().time();
+
+ update();
+}
+
+template uint16_t f2mc16_ppg_device::prl_r<0>();
+template uint16_t f2mc16_ppg_device::prl_r<1>();
+template void f2mc16_ppg_device::prl_w<0>(offs_t offset, uint16_t data, uint16_t mem_mask);
+template void f2mc16_ppg_device::prl_w<1>(offs_t offset, uint16_t data, uint16_t mem_mask);
diff --git a/src/devices/cpu/f2mc16/f2mc16_ppg.h b/src/devices/cpu/f2mc16/f2mc16_ppg.h
new file mode 100644
index 00000000000..3022e8593e5
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_ppg.h
@@ -0,0 +1,70 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series Programmable Pulse Generator
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_PPG_H
+#define MAME_CPU_F2MC16_F2MC16_PPG_H
+
+#pragma once
+
+#include "f2mc16.h"
+#include "f2mc16_intc.h"
+
+class f2mc16_ppg_device :
+ public device_t
+{
+public:
+ f2mc16_ppg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t vector0, uint8_t vector1);
+ f2mc16_ppg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ template<unsigned N> auto output() { return m_output_cb[N].bind(); }
+
+ void timebase_hz(uint32_t hz);
+
+ uint8_t ppgc_r(offs_t offset);
+ void ppgc_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ template<unsigned N> uint16_t prl_r();
+ template<unsigned N> void prl_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_clock_changed() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update();
+ void update_pcnt();
+ TIMER_CALLBACK_MEMBER(update_timebase_hz);
+ TIMER_CALLBACK_MEMBER(update_peripheral_clock);
+ template <unsigned N> TIMER_CALLBACK_MEMBER(timer_callback);
+
+ f2mc16_device *m_cpu;
+ required_device<f2mc16_intc_device> m_intc;
+ uint8_t m_vector[2];
+ devcb_write32::array<2> m_output_cb;
+ uint32_t m_peripheral_clock_hz;
+ attotime m_peripheral_clock_changed;
+ uint32_t m_timebase_hz;
+ attotime m_timebase_changed;
+
+ emu_timer *m_timer[2];
+ attotime m_start_time[2];
+ attotime m_underflow_time[2];
+ uint32_t m_clocksel[2];
+ uint32_t m_hz[2];
+ uint32_t m_duty[2];
+ uint16_t m_pcnt[2][2];
+ uint16_t m_pcntrl[2][2];
+ uint8_t m_lh[2];
+ uint8_t m_ppgc[2];
+ uint8_t m_prll[2];
+ uint8_t m_prlh[2];
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_PPG, f2mc16_ppg_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16_reload.cpp b/src/devices/cpu/f2mc16/f2mc16_reload.cpp
new file mode 100644
index 00000000000..33ff2aa53b5
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_reload.cpp
@@ -0,0 +1,381 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series 16-bit timer
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16_reload.h"
+
+namespace {
+
+struct TMCSR { enum : uint16_t
+{
+ CSL = 3 << 10,
+ CSL_DIV2 = 0 << 10,
+ CSL_DIV8 = 1 << 10,
+ CSL_DIV32 = 2 << 10,
+ CSL_EXTERNAL = 3 << 10,
+ MOD2 = 1 << 9,
+ MOD1 = 1 << 8,
+ MOD0 = 1 << 7,
+ MOD_INT = 7 << 7,
+ MOD_EXT = 3 << 7,
+ MOD_DISABLE = 0 << 7,
+ MOD_RISING = 1 << 7,
+ MOD_FALLING = 2 << 7,
+ MOD_BOTH = 3 << 7,
+ MOD_GATE = 5 << 7,
+ MOD_GATE_LOW = 4 << 7,
+ MOD_GATE_HIGH = 5 << 7,
+ OUTE = 1 << 6,
+ OUTL = 1 << 5,
+ RELD = 1 << 4,
+ INTE = 1 << 3,
+ UF = 1 << 2,
+ CNTE = 1 << 1,
+ TRG = 1 << 0
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_RELOAD_TIMER, f2mc16_reload_timer_device, "f2mc16_reload_timer", "F2MC16 16-bit reload timer")
+
+f2mc16_reload_timer_device::f2mc16_reload_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t vector) :
+ f2mc16_reload_timer_device(mconfig, tag, owner, clock)
+{
+ m_cpu = downcast<f2mc16_device *>(owner);
+ m_intc.set_tag(intc);
+ m_vector = vector;
+}
+
+f2mc16_reload_timer_device::f2mc16_reload_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_RELOAD_TIMER, tag, owner, clock),
+ m_cpu(nullptr),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_vector(0),
+ m_internal_hz_cb(*this),
+ m_tot_hz_cb(*this),
+ m_peripheral_clock_changed(attotime::zero),
+ m_tin_changed(attotime::zero),
+ m_start_time(attotime::never),
+ m_underflow_time(attotime::never),
+ m_clocksel(0),
+ m_peripheral_clock_hz(0),
+ m_tin_hz(0),
+ m_internal_hz(0),
+ m_tot_hz(0),
+ m_tin(1),
+ m_i2osclr(0),
+ m_tmcsr(TMCSR::UF),
+ m_tmr(0),
+ m_tmrlr(0)
+{
+}
+
+void f2mc16_reload_timer_device::device_start()
+{
+ m_timer = timer_alloc(FUNC(f2mc16_reload_timer_device::timer_callback), this);
+
+ save_item(NAME(m_peripheral_clock_changed));
+ save_item(NAME(m_tin_changed));
+ save_item(NAME(m_start_time));
+ save_item(NAME(m_underflow_time));
+ save_item(NAME(m_clocksel));
+ save_item(NAME(m_peripheral_clock_hz));
+ save_item(NAME(m_tin_hz));
+ save_item(NAME(m_internal_hz));
+ save_item(NAME(m_tot_hz));
+ save_item(NAME(m_tin));
+ save_item(NAME(m_i2osclr));
+ save_item(NAME(m_tmcsr));
+ save_item(NAME(m_tmr));
+ save_item(NAME(m_tmrlr));
+}
+
+void f2mc16_reload_timer_device::device_clock_changed()
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_reload_timer_device::update_peripheral_clock), this), clock());
+ else
+ update_peripheral_clock(clock());
+}
+
+void f2mc16_reload_timer_device::device_reset()
+{
+ update_tmr();
+ m_tmcsr = TMCSR::UF;
+ update();
+}
+
+void f2mc16_reload_timer_device::tin_hz(uint32_t hz)
+{
+ if (started() && machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_reload_timer_device::update_tin_hz), this), hz);
+ else
+ update_tin_hz(hz);
+}
+
+void f2mc16_reload_timer_device::tin(int state)
+{
+ bool rising_edge = (state && !m_tin);
+ bool falling_edge = (!state && m_tin);
+
+ if (m_tin_hz == 0 && (m_tmcsr & TMCSR::CNTE) && (rising_edge || falling_edge))
+ {
+ if ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_EXTERNAL)
+ {
+ if ((((m_tmcsr & TMCSR::MOD_EXT) == TMCSR::MOD_RISING) && rising_edge) ||
+ (((m_tmcsr & TMCSR::MOD_EXT) == TMCSR::MOD_RISING) && falling_edge) ||
+ ((m_tmcsr & TMCSR::MOD_EXT) == TMCSR::MOD_BOTH))
+ {
+ m_tmr--;
+
+ if (m_tmr == 0xffff)
+ {
+ if (m_tmcsr & TMCSR::RELD)
+ m_tmr = m_tmrlr;
+ else
+ m_start_time = attotime::never;
+
+ m_underflow_time = machine().time();
+ update();
+ }
+ }
+ }
+ else
+ {
+ if ((((m_tmcsr & TMCSR::MOD_INT) == TMCSR::MOD_RISING) && rising_edge) ||
+ (((m_tmcsr & TMCSR::MOD_INT) == TMCSR::MOD_RISING) && falling_edge) ||
+ ((m_tmcsr & TMCSR::MOD_INT) == TMCSR::MOD_BOTH))
+ {
+ trigger();
+ update();
+ }
+ else if ((m_tmcsr & TMCSR::MOD_GATE) == TMCSR::MOD_GATE_LOW ||
+ (m_tmcsr & TMCSR::MOD_GATE) == TMCSR::MOD_GATE_HIGH)
+ {
+ update_tmr();
+ update();
+ }
+ }
+ }
+
+ m_tin = state;
+}
+
+void f2mc16_reload_timer_device::i2osclr(int state)
+{
+ if (state && !m_i2osclr)
+ {
+ update_tmr();
+
+ m_underflow_time = attotime::never;
+
+ update();
+ }
+
+ m_i2osclr = state;
+}
+
+uint16_t f2mc16_reload_timer_device::tmcsr_r(offs_t offset, uint16_t mem_mask)
+{
+ if (ACCESSING_BITS_0_7 && !m_cpu->rmw() && m_underflow_time > machine().time())
+ return m_tmcsr & ~TMCSR::UF;
+
+ return m_tmcsr;
+}
+
+void f2mc16_reload_timer_device::tmcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint16_t tmcsr = m_tmcsr;
+ COMBINE_DATA(&tmcsr);
+ tmcsr &= TMCSR::CSL | TMCSR::MOD_INT | TMCSR::OUTE | TMCSR::OUTL | TMCSR::RELD | TMCSR::INTE | TMCSR::UF | TMCSR::CNTE | TMCSR::TRG;
+
+ if (m_tmcsr != tmcsr)
+ {
+ update_tmr();
+
+ m_tmcsr = tmcsr;
+
+ if (ACCESSING_BITS_0_7)
+ {
+ if (m_tmcsr & TMCSR::TRG)
+ {
+ if (m_tmcsr & TMCSR::CNTE)
+ trigger();
+
+ m_tmcsr &= ~TMCSR::TRG;
+ }
+
+ if (!(m_tmcsr & TMCSR::UF))
+ {
+ if (m_underflow_time <= machine().time())
+ m_underflow_time = attotime::never;
+
+ m_tmcsr |= TMCSR::UF;
+ }
+ }
+
+ update();
+ }
+}
+
+uint16_t f2mc16_reload_timer_device::tmr_r()
+{
+ return calculate_tmr();
+}
+
+void f2mc16_reload_timer_device::tmrlr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint32_t tmrlr = m_tmrlr;
+ COMBINE_DATA(&tmrlr);
+
+ if (m_tmrlr != tmrlr)
+ {
+ if (m_tmcsr & TMCSR::RELD)
+ update_tmr();
+
+ m_tmrlr = tmrlr;
+
+ if (m_tmcsr & TMCSR::RELD)
+ update();
+ }
+}
+
+void f2mc16_reload_timer_device::update()
+{
+ attotime now = machine().time();
+
+ if (!(m_tmcsr & TMCSR::CNTE))
+ m_start_time = attotime::never;
+
+ m_clocksel = m_start_time.is_never() ? 0 :
+ ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_EXTERNAL) ?
+ (((m_tmcsr & TMCSR::MOD_EXT) == TMCSR::MOD_DISABLE) ? 0 :
+ ((m_tmcsr & TMCSR::MOD_EXT) == TMCSR::MOD_BOTH) ? m_tin_hz * 2 :
+ m_tin_hz) :
+ (((m_tmcsr & TMCSR::MOD_GATE) == TMCSR::MOD_GATE_LOW && m_tin) ? 0 :
+ ((m_tmcsr & TMCSR::MOD_GATE) == TMCSR::MOD_GATE_HIGH && !m_tin) ? 0 :
+ ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_DIV2) ? clock() / 2 :
+ ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_DIV8) ? clock() / 8 :
+ ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_DIV32) ? clock() / 32 :
+ 0);
+
+ attotime event_time = attotime::never;
+
+ attotime uf = (m_start_time.is_never() || !m_clocksel) ? attotime::never :
+ m_start_time + attotime::from_ticks(m_tmr + 1, m_clocksel);
+
+ if (m_underflow_time > now)
+ {
+ m_underflow_time = uf;
+
+ if ((m_tmcsr & TMCSR::INTE) && event_time > uf)
+ event_time = uf;
+ }
+
+ uint32_t internal_hz = (m_tmcsr & TMCSR::RELD) ? m_clocksel / (m_tmrlr + 1) / 2: 0;
+ uint32_t tot_hz = (m_tmcsr & TMCSR::OUTE) ? internal_hz : 0;
+
+ if ((m_internal_hz != internal_hz && !m_internal_hz_cb.isunset()) ||
+ (m_tot_hz != tot_hz && !m_tot_hz_cb.isunset()))
+ {
+ if (m_tmr != m_tmrlr && (m_tmcsr & TMCSR::RELD) && internal_hz)
+ {
+ if (event_time > uf)
+ event_time = uf;
+ }
+ else
+ {
+ if (m_internal_hz != internal_hz && !m_internal_hz_cb.isunset())
+ {
+ m_internal_hz_cb(internal_hz);
+ m_internal_hz = internal_hz;
+ }
+
+ if (m_tot_hz != tot_hz && !m_tot_hz_cb.isunset())
+ {
+ m_tot_hz_cb(tot_hz);
+ m_tot_hz = tot_hz;
+ }
+ }
+ }
+
+ m_timer->adjust(event_time.is_never() ? event_time : event_time - now);
+ m_intc->set_irq(m_vector, ((m_tmcsr & TMCSR::INTE) && m_underflow_time <= now) ? 1 : 0);
+}
+
+void f2mc16_reload_timer_device::trigger()
+{
+ m_tmr = m_tmrlr;
+ m_start_time = machine().time();
+}
+
+void f2mc16_reload_timer_device::update_tmr()
+{
+ m_tmr = calculate_tmr();
+ if (m_start_time != attotime::never)
+ m_start_time = machine().time();
+}
+
+uint16_t f2mc16_reload_timer_device::calculate_tmr()
+{
+ if (m_start_time.is_never() || m_clocksel == 0)
+ return m_tmr;
+
+ uint64_t ticks = (machine().time() - m_start_time).as_ticks(m_clocksel);
+ if (m_tmr >= ticks)
+ return m_tmr - ticks;
+
+ if (m_tmcsr & TMCSR::RELD)
+ return m_tmrlr - ((ticks - m_tmr - 1) % (m_tmrlr + 1));
+
+ return 0xffff;
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_reload_timer_device::update_tin_hz)
+{
+ if ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_EXTERNAL)
+ update_tmr();
+
+ m_tin_hz = param;
+
+ if (started())
+ {
+ m_tin_changed = machine().time();
+
+ if ((m_tmcsr & TMCSR::CSL) == TMCSR::CSL_EXTERNAL)
+ update();
+ }
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_reload_timer_device::update_peripheral_clock)
+{
+ if ((m_tmcsr & TMCSR::CSL) != TMCSR::CSL_EXTERNAL)
+ update_tmr();
+
+ m_peripheral_clock_hz = param;
+ m_peripheral_clock_changed = machine().time();
+
+ if ((m_tmcsr & TMCSR::CSL) != TMCSR::CSL_EXTERNAL)
+ update();
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_reload_timer_device::timer_callback)
+{
+ if (m_tmcsr & TMCSR::RELD)
+ {
+ m_tmr = m_tmrlr;
+ m_start_time = machine().time();
+ }
+ else
+ {
+ m_tmr = 0xffff;
+ m_start_time = attotime::never;
+ }
+
+ update();
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_reload.h b/src/devices/cpu/f2mc16/f2mc16_reload.h
new file mode 100644
index 00000000000..2543290a81c
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_reload.h
@@ -0,0 +1,75 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series 16-bit reload timer
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_RELOAD_H
+#define MAME_CPU_F2MC16_F2MC16_RELOAD_H
+
+#pragma once
+
+#include "f2mc16_intc.h"
+
+class f2mc16_reload_timer_device :
+ public device_t
+{
+public:
+ f2mc16_reload_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t vector);
+ f2mc16_reload_timer_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+ auto internal_hz() { return m_internal_hz_cb.bind(); }
+ auto tot_hz() { return m_tot_hz_cb.bind(); }
+
+ void tin_hz(const XTAL xtal) { tin_hz(xtal.value()); }
+ void tin_hz(uint32_t hz);
+ void tin(int state);
+ void i2osclr(int state);
+
+ uint16_t tmcsr_r(offs_t offset, uint16_t mem_mask);
+ void tmcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t tmr_r();
+ void tmrlr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_clock_changed() override;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update();
+ void trigger();
+ void update_tmr();
+ uint16_t calculate_tmr();
+ TIMER_CALLBACK_MEMBER(update_tin_hz);
+ TIMER_CALLBACK_MEMBER(update_peripheral_clock);
+ TIMER_CALLBACK_MEMBER(timer_callback);
+
+ f2mc16_device *m_cpu;
+ required_device<f2mc16_intc_device> m_intc;
+ uint8_t m_vector;
+ devcb_write32 m_internal_hz_cb;
+ devcb_write32 m_tot_hz_cb;
+
+ emu_timer *m_timer;
+ attotime m_peripheral_clock_changed;
+ attotime m_tin_changed;
+ attotime m_start_time;
+ attotime m_underflow_time;
+ uint32_t m_clocksel;
+ uint32_t m_peripheral_clock_hz;
+ uint32_t m_tin_hz;
+ uint32_t m_internal_hz;
+ uint32_t m_tot_hz;
+ int8_t m_tin;
+ int8_t m_i2osclr;
+ uint16_t m_tmcsr;
+ uint16_t m_tmr;
+ uint16_t m_tmrlr;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_RELOAD_TIMER, f2mc16_reload_timer_device)
+
+#endif // MAME_CPU_F2MC16_F2MC16_RELOAD_H
diff --git a/src/devices/cpu/f2mc16/f2mc16_uart.cpp b/src/devices/cpu/f2mc16/f2mc16_uart.cpp
new file mode 100644
index 00000000000..80dbb75fe93
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_uart.cpp
@@ -0,0 +1,456 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series UART
+
+***************************************************************************/
+
+#include "emu.h"
+#include "f2mc16_uart.h"
+
+#define LOG_READ (1U << 1)
+#define LOG_WRITE (1U << 2)
+
+//#define VERBOSE (LOG_GENERAL | LOG_READ | LOG_WRITE)
+//#define LOG_OUTPUT_FUNC osd_printf_info
+#include "logmacro.h"
+
+#define LOGREAD(...) LOGMASKED(LOG_READ, __VA_ARGS__)
+#define LOGWRITE(...) LOGMASKED(LOG_WRITE, __VA_ARGS__)
+
+namespace {
+
+struct SMR { enum : uint8_t
+{
+ SOE = 1 << 0,
+ SCKE = 1 << 1,
+ CS = 7 << 3,
+ CS_RESERVED = 5 << 3,
+ CS_INTERNAL_TIMER = 6 << 3,
+ CS_EXTERNAL_CLOCK = 7 << 3,
+ MD = 3 << 6,
+ MD_ASYNC_NORMAL = 0 << 6,
+ MD_ASYNC_MULTIPROCESSOR = 1 << 6,
+ MD_SYNC = 2 << 6,
+ MD_PROHIBITED = 3 << 6
+}; };
+
+struct SCR { enum : uint8_t
+{
+ PEN = 1 << 7,
+ P = 1 << 6,
+ SBL = 1 << 5,
+ CL = 1 << 4,
+ AD = 1 << 3,
+ REC = 1 << 2,
+ RXE = 1 << 1,
+ TXE = 1 << 0
+}; };
+
+struct SSR { enum : uint8_t
+{
+ PE = 1 << 7,
+ ORE = 1 << 6,
+ FRE = 1 << 5,
+ RDRF = 1 << 4,
+ TDRE = 1 << 3,
+ RIE = 1 << 1,
+ TIE = 1 << 0
+}; };
+
+struct CDCR { enum : uint8_t
+{
+ DIV = 15 << 0
+}; };
+
+} // anonymous namespace
+
+DEFINE_DEVICE_TYPE(F2MC16_UART, f2mc16_uart_device, "f2mc16_uart", "F2MC16 UART")
+
+f2mc16_uart_device::f2mc16_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t rx_vector, uint8_t tx_vector) :
+ f2mc16_uart_device(mconfig, tag, owner, clock)
+{
+ m_intc.set_tag(intc);
+ m_rx_vector = rx_vector;
+ m_tx_vector = tx_vector;
+}
+
+f2mc16_uart_device::f2mc16_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, F2MC16_UART, tag, owner, clock),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_sck_cb(*this),
+ m_sck_hz_cb(*this),
+ m_sot_cb(*this),
+ m_internal_timer_changed(attotime::zero),
+ m_internal_timer_hz(0),
+ m_peripheral_clock_hz(0),
+ m_sck_in_hz(0),
+ m_sck_in(1),
+ m_sck_out(1),
+ m_sck_out_hz(0),
+ m_sin(1),
+ m_sin_prev(0),
+ m_sot(1),
+ m_hz(0),
+ m_clock_count(0),
+ m_tx_bit(-1),
+ m_tx_bits(0),
+ m_tx_shift(0),
+ m_rx_bit(-1),
+ m_rx_shift(0),
+ m_smr(0),
+ m_sidr(0),
+ m_sodr(0)
+{
+}
+
+void f2mc16_uart_device::device_start()
+{
+ m_rx_timer = timer_alloc(FUNC(f2mc16_uart_device::rx_timer_callback), this);
+ m_tx_timer = timer_alloc(FUNC(f2mc16_uart_device::tx_timer_callback), this);
+
+ save_item(NAME(m_internal_timer_changed));
+ save_item(NAME(m_rx_start_time));
+ save_item(NAME(m_tx_start_time));
+ save_item(NAME(m_rx_ticks));
+ save_item(NAME(m_tx_ticks));
+ save_item(NAME(m_sck_in));
+ save_item(NAME(m_sck_in_hz));
+ save_item(NAME(m_sck_out));
+ save_item(NAME(m_sck_out_hz));
+ save_item(NAME(m_sin));
+ save_item(NAME(m_sin_prev));
+ save_item(NAME(m_sot));
+ save_item(NAME(m_internal_timer_hz));
+ save_item(NAME(m_hz));
+ save_item(NAME(m_clock_count));
+ save_item(NAME(m_tx_bit));
+ save_item(NAME(m_tx_bits));
+ save_item(NAME(m_tx_shift));
+ save_item(NAME(m_rx_bit));
+ save_item(NAME(m_rx_shift));
+ save_item(NAME(m_smr));
+ save_item(NAME(m_scr));
+ save_item(NAME(m_sidr));
+ save_item(NAME(m_sodr));
+ save_item(NAME(m_ssr));
+ save_item(NAME(m_cdcr));
+
+ m_sck_cb(m_sck_out);
+ m_sck_hz_cb(m_sck_out_hz);
+ m_sot_cb(m_sot);
+
+ update_serial();
+}
+
+void f2mc16_uart_device::device_reset()
+{
+ m_smr = 0;
+ m_scr = SCR::REC;
+ m_ssr = SSR::TDRE;
+ m_cdcr = CDCR::DIV;
+
+ update_serial();
+}
+
+void f2mc16_uart_device::device_clock_changed()
+{
+ m_peripheral_clock_hz = clock();
+ update_serial();
+}
+
+void f2mc16_uart_device::internal_timer_hz(uint32_t hz)
+{
+ if (machine().scheduler().currently_executing())
+ machine().scheduler().synchronize(timer_expired_delegate(FUNC(f2mc16_uart_device::update_internal_timer), this), hz);
+ else
+ update_internal_timer(hz);
+}
+
+void f2mc16_uart_device::internal_timer(int state)
+{
+ // TODO:
+}
+
+void f2mc16_uart_device::sck_hz(uint32_t hz)
+{
+ // TODO: track when hz changes.
+ m_sck_in_hz = hz;
+
+ update_serial();
+}
+
+void f2mc16_uart_device::sck(int state)
+{
+ if (m_sck_in != state)
+ {
+ m_sck_in = state;
+
+ update_serial();
+ }
+}
+
+void f2mc16_uart_device::sin(int state)
+{
+ if (m_sin != state)
+ {
+ m_sin = state;
+
+ update_serial();
+ }
+}
+
+uint8_t f2mc16_uart_device::smr_r()
+{
+ return m_smr;
+}
+
+void f2mc16_uart_device::smr_w(uint8_t data)
+{
+ m_smr = data & (SMR::MD | SMR::CS | SMR::SCKE | SMR::SOE);
+
+ update_serial();
+}
+
+uint8_t f2mc16_uart_device::scr_r()
+{
+ return m_scr | SMR::CS;
+}
+
+void f2mc16_uart_device::scr_w(uint8_t data)
+{
+ if (!(data & SCR::REC))
+ {
+ m_ssr &= ~(SSR::PE | SSR::ORE | SSR::FRE);
+ data |= SCR::REC;
+ }
+
+ m_scr = data & (SCR::PEN | SCR::P | SCR::SBL | SCR::CL | SCR::AD | SCR::REC | SCR::RXE | SCR::TXE);
+
+ update_serial();
+}
+
+uint8_t f2mc16_uart_device::sidr_r()
+{
+ if (!machine().side_effects_disabled())
+ {
+ LOGREAD("%s read data %02x\n",machine().describe_context(), tag(), m_sidr);
+
+ if (m_ssr & SSR::RDRF)
+ {
+ m_ssr &= ~SSR::RDRF;
+ update_serial();
+ }
+ }
+
+ return m_sidr;
+}
+
+void f2mc16_uart_device::sodr_w(uint8_t data)
+{
+ LOGWRITE("%s write data %02x\n", machine().describe_context(), data);
+
+ m_sodr = data;
+ m_ssr &= ~SSR::TDRE;
+
+ update_serial();
+}
+
+uint8_t f2mc16_uart_device::ssr_r()
+{
+ return m_ssr;
+}
+
+void f2mc16_uart_device::ssr_w(uint8_t data)
+{
+ m_ssr = (m_ssr & ~(SSR::TIE | SSR::RIE)) | (data & (SSR::TIE | SSR::RIE));
+
+ update_serial();
+}
+
+void f2mc16_uart_device::cdcr_w(uint8_t data)
+{
+ m_cdcr = data & CDCR::DIV;
+
+ update_serial();
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_uart_device::update_internal_timer)
+{
+ m_internal_timer_hz = param;
+ m_internal_timer_changed = machine().time();
+
+ update_serial();
+}
+
+void f2mc16_uart_device::update_serial()
+{
+ const int clock_counts[] = { 16, 16, 1, 0 };
+ const int baud_rate_generator[][5] =
+ {
+ { 13, 4, 26, 52, 104 },
+ { 0, 0, 2, 4, 8 }
+ };
+
+ uint8_t clock_count = clock_counts[(m_smr & SMR::MD) >> 6];
+ uint32_t hz;
+
+ if ((m_smr & SMR::CS) == SMR::CS_RESERVED)
+ hz = 0;
+ else if ((m_smr & SMR::CS) == SMR::CS_INTERNAL_TIMER)
+ hz = m_internal_timer_hz;
+ else if ((m_smr & SMR::CS) == SMR::CS_EXTERNAL_CLOCK)
+ hz = (m_smr & SMR::SCKE) ? 0 : m_sck_in_hz;
+ else if (baud_rate_generator[(m_smr & SMR::MD) == SMR::MD_SYNC][(m_smr & SMR::CS) >> 3])
+ hz = m_peripheral_clock_hz / (0x10 - m_cdcr) / baud_rate_generator[(m_smr & SMR::MD) == SMR::MD_SYNC][(m_smr & SMR::CS) >> 3];
+ else
+ hz = 0;
+
+ //if (m_hz != hz || m_clock_count != clock_count)
+ //printf("%s baud %d\n", tag(), clock_count ? (hz / clock_count) : 0);
+
+ m_clock_count = clock_count;
+ m_hz = hz;
+
+ uint32_t sck_out_clock = (m_smr & SMR::SCKE) ? m_hz : 0;
+ if (m_sck_out_hz != sck_out_clock)
+ {
+ m_sck_out_hz = sck_out_clock;
+ m_sck_hz_cb(m_sck_out_hz);
+ }
+
+ if (!m_sin && m_sin_prev && m_rx_bit < 0 &&
+ ((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL || (m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR))
+ m_rx_timer->adjust(attotime::from_hz((m_hz / m_clock_count) * 2));
+
+ m_sin_prev = m_sin;
+
+ if (m_tx_bit < 0 && !(m_ssr & SSR::TDRE))
+ m_tx_timer->adjust(attotime::zero);
+
+ m_intc->set_irq(m_tx_vector, (m_ssr & SSR::TIE) && (m_ssr & SSR::TDRE));
+ m_intc->set_irq(m_rx_vector, (m_ssr & SSR::RIE) && (m_ssr & SSR::RDRF));
+ m_intc->set_completion_request(m_rx_vector, (SSR::PE | SSR::ORE | SSR::FRE) != 0);
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_uart_device::rx_timer_callback)
+{
+ int data_bits = ((m_smr & SMR::MD) != SMR::MD_ASYNC_NORMAL || (m_scr & SCR::CL)) ? 8 : 7;
+ int parity_bits = ((m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR ||
+ ((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL && (m_scr & SCR::P))) ? 1 : 0;
+ int start_stop_bits = (((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL ||
+ (m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR)) ? 2 : 0;
+ int length = data_bits + parity_bits + start_stop_bits;
+
+ if (m_rx_bit < 0)
+ {
+ if (start_stop_bits && m_sin)
+ return;
+
+ m_rx_bit = 0;
+ m_rx_shift = 0;
+ }
+
+ if (m_sin)
+ m_rx_shift |= 1 << m_rx_bit;
+ m_rx_bit++;
+
+ if (m_rx_bit >= length)
+ {
+ if ((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL ||
+ (m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR)
+ {
+ m_rx_shift >>= 1;
+
+ if (!m_sin)
+ m_ssr |= SSR::FRE;
+
+ if ((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL && (m_scr & SCR::PEN))
+ {
+ int parity = (m_scr & SCR::P) ? 1 : 0;
+ for (int i = 0; i < data_bits; i++)
+ parity ^= BIT(m_rx_shift, i);
+
+ if (parity)
+ m_ssr |= SSR::PE;
+ }
+
+ if (!(m_rx_shift & (1 << data_bits)))
+ m_ssr |= SSR::FRE;
+ }
+
+ m_rx_bit = -1;
+
+ if (m_ssr & SSR::RDRF)
+ m_ssr |= SSR::ORE;
+ else
+ {
+ m_ssr |= SSR::RDRF;
+ m_sidr = BIT(m_rx_shift, 0, data_bits);
+ }
+
+ update_serial();
+ return;
+ }
+
+ m_rx_timer->adjust(attotime::from_hz(m_hz / m_clock_count));
+}
+
+TIMER_CALLBACK_MEMBER(f2mc16_uart_device::tx_timer_callback)
+{
+ if (m_tx_bit == m_tx_bits)
+ m_tx_bit = -1;
+
+ if (m_tx_bit < 0)
+ {
+ if (!(m_ssr & SSR::TDRE))
+ {
+ m_tx_bit = 0;
+ m_tx_bits = ((m_smr & SMR::MD) != SMR::MD_ASYNC_NORMAL || (m_scr & SCR::CL)) ? 8 : 7;
+ m_tx_shift = BIT(m_sodr, 0, m_tx_bits);
+
+ if ((m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR)
+ {
+ if (m_scr & SCR::AD)
+ m_tx_shift |= 1 << m_tx_bits;
+ m_tx_bits++;
+ }
+ else if ((m_scr & SCR::PEN) && (m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL)
+ {
+ int parity = (m_scr & SCR::P) ? 1 : 0;
+ for (int i = 0; i < m_tx_bits; i++)
+ parity ^= BIT(m_tx_shift, i);
+
+ if (parity)
+ m_tx_shift |= 1 << m_tx_bits;
+ m_tx_bits++;
+ }
+
+ if ((m_smr & SMR::MD) == SMR::MD_ASYNC_NORMAL ||
+ (m_smr & SMR::MD) == SMR::MD_ASYNC_MULTIPROCESSOR)
+ {
+ int stop_bits = (m_scr & SCR::SBL) ? 2 : 1;
+ for (int i = 0; i < stop_bits; i++)
+ {
+ m_tx_shift |= 1 << m_tx_bits;
+ m_tx_bits++;
+ }
+
+ m_tx_shift <<= 1;
+ m_tx_bits++;
+ }
+ else if (m_rx_bit < 0 && (m_scr & SCR::RXE) && (m_smr & SMR::MD) == SMR::MD_SYNC)
+ m_rx_timer->adjust(attotime::from_hz((m_hz / m_clock_count) * 2));
+
+ m_ssr |= SSR::TDRE;
+ update_serial();
+ }
+ else
+ return;
+ }
+
+ m_sot_cb(BIT(m_tx_shift, m_tx_bit));
+ m_tx_bit++;
+ m_tx_timer->adjust(attotime::from_hz(m_hz / m_clock_count));
+}
diff --git a/src/devices/cpu/f2mc16/f2mc16_uart.h b/src/devices/cpu/f2mc16/f2mc16_uart.h
new file mode 100644
index 00000000000..c24c1d4e243
--- /dev/null
+++ b/src/devices/cpu/f2mc16/f2mc16_uart.h
@@ -0,0 +1,98 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+/***************************************************************************
+
+ Fujitsu Micro F2MC-16 series UART
+
+***************************************************************************/
+
+#ifndef MAME_CPU_F2MC16_F2MC16_UART_H
+#define MAME_CPU_F2MC16_F2MC16_UART_H
+
+#include "f2mc16_intc.h"
+
+#pragma once
+
+class f2mc16_uart_device :
+ public device_t
+{
+public:
+ f2mc16_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ f2mc16_uart_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, required_device<f2mc16_intc_device> &intc, uint8_t rx_vector, uint8_t tx_vector);
+
+ auto sck() { return m_sck_cb.bind(); }
+ auto sck_hz() { return m_sck_hz_cb.bind(); }
+ auto sot() { return m_sot_cb.bind(); }
+
+ void internal_timer_hz(uint32_t hz);
+ void internal_timer(int state);
+ void sck_hz(uint32_t hz);
+ void sck(int state);
+ void sin(int state);
+
+ uint8_t smr_r();
+ void smr_w(uint8_t data);
+ uint8_t scr_r();
+ void scr_w(uint8_t data);
+ uint8_t sidr_r();
+ void sodr_w(uint8_t data);
+ uint8_t ssr_r();
+ void ssr_w(uint8_t data);
+ void cdcr_w(uint8_t data);
+
+protected:
+ // device_t
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_clock_changed() override;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update_serial();
+ TIMER_CALLBACK_MEMBER(update_internal_timer);
+ TIMER_CALLBACK_MEMBER(rx_timer_callback);
+ TIMER_CALLBACK_MEMBER(tx_timer_callback);
+
+ required_device<f2mc16_intc_device> m_intc;
+ uint8_t m_rx_vector;
+ uint8_t m_tx_vector;
+ devcb_write_line m_sck_cb;
+ devcb_write32 m_sck_hz_cb;
+ devcb_write_line m_sot_cb;
+
+ emu_timer *m_tx_timer;
+ emu_timer *m_rx_timer;
+
+ attotime m_sck_in_changed;
+ attotime m_peripheral_clock_changed;
+ attotime m_internal_timer_changed;
+ attotime m_rx_start_time;
+ attotime m_tx_start_time;
+ uint32_t m_internal_timer_hz;
+ uint32_t m_peripheral_clock_hz;
+ uint32_t m_sck_in_hz;
+
+ uint8_t m_rx_ticks;
+ uint8_t m_tx_ticks;
+ int8_t m_sck_in;
+ int8_t m_sck_out;
+ uint32_t m_sck_out_hz;
+ int8_t m_sin;
+ int8_t m_sin_prev;
+ int8_t m_sot;
+ uint32_t m_hz;
+ uint8_t m_clock_count;
+ int8_t m_tx_bit;
+ int8_t m_tx_bits;
+ uint16_t m_tx_shift;
+ int8_t m_rx_bit;
+ uint16_t m_rx_shift;
+ uint8_t m_smr;
+ uint8_t m_scr;
+ uint8_t m_sidr;
+ uint8_t m_sodr;
+ uint8_t m_ssr;
+ uint8_t m_cdcr;
+};
+
+DECLARE_DEVICE_TYPE(F2MC16_UART, f2mc16_uart_device)
+
+#endif
diff --git a/src/devices/cpu/f2mc16/f2mc16d.cpp b/src/devices/cpu/f2mc16/f2mc16d.cpp
index 5d238f37aca..90aaf712ca5 100644
--- a/src/devices/cpu/f2mc16/f2mc16d.cpp
+++ b/src/devices/cpu/f2mc16/f2mc16d.cpp
@@ -416,7 +416,7 @@ offs_t f2mc16_disassembler::dasm_cstrop(std::ostream &stream, offs_t pc, u32 byt
}
else if ((op2 & 0xcc) == 0x80)
util::stream_format(stream, "%-8s%s", s_sceq_ops[BIT(op2, 4, 2)], s_segment_prefixes[BIT(op2, 0, 2)]);
- else if ((op2 & 0xec) == 0xc0)
+ else if ((op2 & 0xdc) == 0xc0)
util::stream_format(stream, "%-8s%s", op2 >= 0xe0 ? "FILSWI" : "FILSI", s_segment_prefixes[BIT(op2, 0, 2)]);
else
{
@@ -1322,17 +1322,9 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
break;
case 0x30: case 0x31:
- {
- u8 operand = opcodes.r8(pc + bytes++);
- if (operand == 0x01)
- util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DEC" : "INC");
- else
- {
- util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD");
- format_imm_signed(stream, s32(s8(operand)));
- }
+ util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD");
+ format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++))));
break;
- }
case 0x32:
util::stream_format(stream, "%-8sA", "SUBC");
diff --git a/src/devices/cpu/f2mc16/mb90570.cpp b/src/devices/cpu/f2mc16/mb90570.cpp
new file mode 100644
index 00000000000..ebc4e88a614
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90570.cpp
@@ -0,0 +1,169 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+
+#include "emu.h"
+#include "mb90570.h"
+
+DEFINE_DEVICE_TYPE(MB90F574, mb90f574_device, "mb90f574", "Fujitsu MB90F574")
+
+mb90f574_device::mb90f574_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ mb90570_device(mconfig, MB90F574, tag, owner, clock, 0x28ff)
+{
+}
+
+mb90570_device::mb90570_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_end) :
+ f2mc16_device(mconfig, type, tag, owner, clock),
+ m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor(FUNC(mb90570_device::internal_map), this)),
+ m_internal_ram_end(internal_ram_end),
+ m_adc(*this, "adc"),
+ m_clock_generator(*this, "clock_generator"),
+ m_intc(*this, "intc"),
+ m_port(*this, "port%x", 1U),
+ m_ppg(*this, "ppg"),
+ m_uart(*this, "uart%u", 0U)
+{
+}
+
+device_memory_interface::space_config_vector mb90570_device::memory_space_config() const
+{
+ return space_config_vector{
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+void mb90570_device::device_add_mconfig(machine_config &mconfig)
+{
+ F2MC16_PORT(mconfig, m_port[0x0], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x2], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x3], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x4], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x5], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x6], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x7], 0x00, 0x1f);
+ F2MC16_PORT(mconfig, m_port[0x8], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x9], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0xa], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0xb], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0xc], 0x00, 0xff);
+
+ F2MC16_INTC(mconfig, m_intc);
+ set_irq_acknowledge_callback(m_intc, FUNC(f2mc16_intc_device::irq_acknowledge_callback));
+ F2MC16_CLOCK_GENERATOR(mconfig, m_clock_generator, DERIVED_CLOCK(1, 1), m_intc, 34);
+ F2MC16_ADC(mconfig, m_adc, DERIVED_CLOCK(1, 1), m_intc, 11);
+ m_intc->i2osclr<0x1f>().set(m_adc, FUNC(f2mc16_adc_device::i2osclr));
+ F2MC16_UART(mconfig, m_uart[0], DERIVED_CLOCK(1, 1), m_intc, 39, 40);
+ F2MC16_UART(mconfig, m_uart[1], DERIVED_CLOCK(1, 1), m_intc, 37, 38);
+ F2MC16_PPG(mconfig, m_ppg, DERIVED_CLOCK(1, 1), m_intc, 26, 28);
+ m_clock_generator->timebase_hz().set(m_ppg, FUNC(f2mc16_ppg_device::timebase_hz));
+}
+
+void mb90570_device::internal_map(address_map &map)
+{
+ //*7: This register is only available when the address/data bus is in multiplex mode. Access to the register is prohibited in non-multiplex mode.
+ //*8: This register is only available when the external data bus is in 8-bit mode. Access to the register is prohibited in 16-bit mode.
+ map(0x0000, 0x0000).rw(m_port[0x0], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 0 data register
+ map(0x0001, 0x0001).rw(m_port[0x1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 1 data register
+ map(0x0002, 0x0002).rw(m_port[0x2], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 2 data register
+ map(0x0003, 0x0003).rw(m_port[0x3], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 3 data register
+ map(0x0004, 0x0004).rw(m_port[0x4], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 4 data register
+ map(0x0005, 0x0005).rw(m_port[0x5], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 5 data register
+ map(0x0006, 0x0006).rw(m_port[0x6], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 6 data register
+ map(0x0007, 0x0007).rw(m_port[0x7], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 7 data register
+ map(0x0008, 0x0008).rw(m_port[0x8], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 8 data register
+ map(0x0009, 0x0009).rw(m_port[0x9], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 9 data register
+ map(0x000a, 0x000a).rw(m_port[0xa], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port a data register
+ map(0x000b, 0x000b).rw(m_port[0xa], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port b data register
+ map(0x000c, 0x000c).rw(m_port[0xa], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port c data register
+ map(0x0010, 0x0010).rw(m_port[0x0], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 1 direction register
+ map(0x0011, 0x0011).rw(m_port[0x1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 1 direction register
+ map(0x0012, 0x0012).rw(m_port[0x2], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 2 direction register
+ map(0x0013, 0x0013).rw(m_port[0x3], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 3 direction register
+ map(0x0014, 0x0014).rw(m_port[0x4], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 4 direction register
+ map(0x0015, 0x0015).rw(m_port[0x5], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 5 direction register
+ map(0x0016, 0x0016).rw(m_port[0x6], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 6 direction register
+ map(0x0017, 0x0017).rw(m_port[0x7], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 7 direction register
+ map(0x0018, 0x0018).rw(m_port[0x8], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 8 direction register
+ map(0x0019, 0x0019).rw(m_port[0x9], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 9 direction register
+ map(0x001a, 0x001a).rw(m_port[0xa], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port a direction register
+ map(0x001b, 0x001b).rw(m_port[0xb], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port b direction register
+ map(0x001c, 0x001c).rw(m_port[0xc], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port c direction register
+ // 0x1d odr4 Port 4 output register
+ // 0x1e ader Analog input enable register
+ map(0x0020, 0x0020).rw(m_uart[0], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 0
+ map(0x0021, 0x0021).rw(m_uart[0], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 0
+ map(0x0022, 0x0022).rw(m_uart[0], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 0/Serial output data register 0
+ map(0x0023, 0x0023).rw(m_uart[0], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 0
+ map(0x0024, 0x0024).rw(m_uart[1], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 1
+ map(0x0025, 0x0025).rw(m_uart[1], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 1
+ map(0x0026, 0x0026).rw(m_uart[1], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 1/Serial output data register 1
+ map(0x0027, 0x0027).rw(m_uart[1], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 1
+ map(0x0028, 0x0028).w(m_uart[0], FUNC(f2mc16_uart_device::cdcr_w)); // UART0 (uart) machine clock division control register
+ map(0x002a, 0x002a).w(m_uart[1], FUNC(f2mc16_uart_device::cdcr_w)); // UART1 (uart) machine clock division control register
+ map(0x0030, 0x0030).rw(m_intc, FUNC(f2mc16_intc_device::enir_r), FUNC(f2mc16_intc_device::enir_w)); // Interrupt/DTP enable register
+ map(0x0031, 0x0031).rw(m_intc, FUNC(f2mc16_intc_device::eirr_r), FUNC(f2mc16_intc_device::eirr_w)); // Interrupt/DTP source register
+ map(0x0032, 0x0033).rw(m_intc, FUNC(f2mc16_intc_device::elvr_r), FUNC(f2mc16_intc_device::elvr_w)); // Interrupt level setting register
+ map(0x0036, 0x0037).rw(m_adc, FUNC(f2mc16_adc_device::adcs_r), FUNC(f2mc16_adc_device::adcs_w)); // AD control status register
+ map(0x0038, 0x0039).rw(m_adc, FUNC(f2mc16_adc_device::adcr_r), FUNC(f2mc16_adc_device::adcr_w)); // AD data register
+ // 0x3a dadr0 d/a converter data register ch.0
+ // 0x3b dadr1 d/a converter data register ch.1
+ // 0x3c dacr0 d/a control register ch.0
+ // 0x3d dacr1 d/a control register ch.1
+ // 0x3e clkr Clock output enable register
+ map(0x0040, 0x0041).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<0>), FUNC(f2mc16_ppg_device::prl_w<0>)); // reload register
+ map(0x0042, 0x0043).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<1>), FUNC(f2mc16_ppg_device::prl_w<1>)); // reload register
+ map(0x0044, 0x0045).rw(m_ppg, FUNC(f2mc16_ppg_device::ppgc_r), FUNC(f2mc16_ppg_device::ppgc_w)); // operation mode control register
+ // 0x46 ppgoe PPG0 and 1 output control registers ch.0 and ch.1
+ // 0x48 smcsl0 Serial mode control lower status register 0
+ // 0x49 smcsh0 Serial mode control upper status register 0
+ // 0x4a sdr0 Serial data register 0
+ // 0x4c smcsl1 Serial mode control lower status register 1
+ // 0x4d smcsh1 Serial mode control upper status register 1
+ // 0x4e sdr1 Serial data register 1
+ // 0x50, 0x51 ipcp0 ICU data register ch.0
+ // 0x52, 0x53 ipcp1 ICU data register ch.1
+ // 0x54 ics01 ICU control status register
+ // 0x56, 0x57 tcdt Free run timer data register
+ // 0x58 tccs Free run timer control status register
+ // 0x5a, 0x5b occp0 OCU compare register ch.0
+ // 0x5c, 0x5d occp1 OCU compare register ch.1
+ // 0x5e, 0x5f occp2 OCU compare register ch.2
+ // 0x60, 0x61 occp3 OCU compare register ch.3
+ // 0x62 ocs0 OCU control status register ch.0
+ // 0x63 ocs1 OCU control status register ch.1
+ // 0x64 ocs2 OCU control status register ch.2
+ // 0x65 ocs3 OCU control status register ch.3
+ // 0x68 ibsr I2C bus status register
+ // 0x69 ibcr I2C bus control register
+ // 0x6a iccr I2C bus clock control register
+ // 0x6b iadr I2C bus address register
+ // 0x6c idar I2C bus data register
+ // 0x6f romm ROM mirroring function selection register
+ // 0x70 udcr0 Up/down count register 0
+ // 0x71 udcr1 Up/down count register 1
+ // 0x72 rcr0 Reload compare register 0
+ // 0x73 rcr1 Reload compare register 1
+ // 0x74 csr0 Counter status register 0
+ // 0x76, 0x77 ccr0/ccr0 Counter control register 0
+ // 0x78 csr1 Counter status register 1
+ // 0x7a, 0x7b ccr1/ccr1 Counter control register 1
+ // 0x7c smcsl2 Serial mode control lower status register 2
+ // 0x7d smcsh2 Serial mode control higher status register 2
+ // 0x7e Serial data register 2
+ map(0x0080, 0x0087).ram(); // CSCR0-CSCR6
+ // 0x9e pacsr Program address detection control status register
+ map(0x009f, 0x009f).rw(m_intc, FUNC(f2mc16_intc_device::dirr_r), FUNC(f2mc16_intc_device::dirr_w)); // Delay interrupt generate/release register
+ map(0x00a0, 0x00a0).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::lpmcr_r), FUNC(f2mc16_clock_generator_device::lpmcr_w)); // Low power mode control register
+ map(0x00a1, 0x00a1).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::ckscr_r), FUNC(f2mc16_clock_generator_device::ckscr_w)); // Clock selection register
+ // 0x00a5 arsr Auto-ready function selection register
+ // 0x00a6 hacr External address output control register
+ // 0x00a7 ecsr Bus control signal selection register
+ map(0x00a8, 0x00a8).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::wdtc_r), FUNC(f2mc16_clock_generator_device::wdtc_w)); // Watchdog timer control register
+ map(0x00a9, 0x00a9).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::tbtc_r), FUNC(f2mc16_clock_generator_device::tbtc_w));
+ // 0xaa wtc Clock timer control register
+ // 0xae fmcs Flash control register
+ map(0x00b0, 0x00bf).rw(m_intc, FUNC(f2mc16_intc_device::icr_r), FUNC(f2mc16_intc_device::icr_w));
+ map(0x0100, m_internal_ram_end).ram();
+ // 0x1ff0, 0x1ff2 padr0
+ // 0x1ff3, 0x1ff5 padr1
+}
diff --git a/src/devices/cpu/f2mc16/mb90570.h b/src/devices/cpu/f2mc16/mb90570.h
new file mode 100644
index 00000000000..455094f8f39
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90570.h
@@ -0,0 +1,55 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+#ifndef MAME_CPU_F2MC16_MB90570_H
+#define MAME_CPU_F2MC16_MB90570_H
+
+#pragma once
+
+#include "f2mc16.h"
+#include "f2mc16_adc.h"
+#include "f2mc16_clock.h"
+#include "f2mc16_intc.h"
+#include "f2mc16_port.h"
+#include "f2mc16_ppg.h"
+#include "f2mc16_uart.h"
+
+class mb90570_device :
+ public f2mc16_device
+{
+public:
+ mb90570_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto &adc() const { if (m_adc) return *m_adc; return *subdevice<f2mc16_adc_device>(m_adc.finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 13, f2mc16_port_device>::type &port() const { if (m_port[N]) return *m_port[N]; return *subdevice<f2mc16_port_device>(m_port[N].finder_tag()); }
+ auto &ppg() const { if (m_ppg) return *m_ppg; return *subdevice<f2mc16_ppg_device>(m_ppg.finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 2, f2mc16_uart_device>::type &uart() const { if (m_uart[N]) return *m_uart[N]; return *subdevice<f2mc16_uart_device>(m_uart[N].finder_tag()); }
+
+protected:
+ mb90570_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_end);
+
+ // device_t
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override ATTR_COLD;
+
+ void internal_map(address_map &map) ATTR_COLD;
+
+ const address_space_config m_program_config;
+ const uint16_t m_internal_ram_end;
+
+ required_device<f2mc16_adc_device> m_adc;
+ required_device<f2mc16_clock_generator_device> m_clock_generator;
+ required_device<f2mc16_intc_device> m_intc;
+ required_device_array<f2mc16_port_device, 13> m_port;
+ required_device<f2mc16_ppg_device> m_ppg;
+ required_device_array<f2mc16_uart_device, 2> m_uart;
+};
+
+class mb90f574_device : public mb90570_device
+{
+public:
+ mb90f574_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+DECLARE_DEVICE_TYPE(MB90F574, mb90f574_device)
+
+#endif // MAME_CPU_F2MC16_MB90570_H
diff --git a/src/devices/cpu/f2mc16/mb90610a.cpp b/src/devices/cpu/f2mc16/mb90610a.cpp
new file mode 100644
index 00000000000..31a4dc1390a
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90610a.cpp
@@ -0,0 +1,138 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+
+#include "emu.h"
+#include "mb90610a.h"
+
+DEFINE_DEVICE_TYPE(MB90610A, mb90610a_device, "mb90610a", "Fujitsu MB90610A") // "Evaluation device" with extra RAM
+
+mb90610a_device::mb90610a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ mb90610a_device(mconfig, MB90610A, tag, owner, clock, 0x10ff)
+{
+}
+
+DEFINE_DEVICE_TYPE(MB90611A, mb90611a_device, "mb90611a", "Fujitsu MB90611A") // Production version
+
+mb90611a_device::mb90611a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ mb90610a_device(mconfig, MB90611A, tag, owner, clock, 0x04ff)
+{
+}
+
+mb90610a_device::mb90610a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_end) :
+ f2mc16_device(mconfig, type, tag, owner, clock),
+ m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor(FUNC(mb90610a_device::internal_map), this)),
+ m_internal_ram_end(internal_ram_end),
+ m_adc(*this, "adc"),
+ m_clock_generator(*this, "clock_generator"),
+ m_intc(*this, "intc"),
+ m_port(*this, "port%x", 1U),
+ m_ppg(*this, "ppg"),
+ m_reload_timer(*this, "reload_timer%u", 0U),
+ m_uart(*this, "uart%u", 0U)
+{
+}
+
+device_memory_interface::space_config_vector mb90610a_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+void mb90610a_device::device_add_mconfig(machine_config &mconfig)
+{
+ F2MC16_PORT(mconfig, m_port[0x1 - 1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x2 - 1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x3 - 1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x4 - 1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x5 - 1], 0x00, 0x3f);
+ F2MC16_PORT(mconfig, m_port[0x6 - 1], 0xff, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x7 - 1], 0x00, 0x7f);
+ F2MC16_PORT(mconfig, m_port[0x8 - 1], 0x00, 0x7f);
+ F2MC16_PORT(mconfig, m_port[0x9 - 1], 0x00, 0x3f);
+ F2MC16_PORT(mconfig, m_port[0xa - 1], 0x00, 0xfe);
+
+ F2MC16_INTC(mconfig, m_intc);
+ set_irq_acknowledge_callback(m_intc, FUNC(f2mc16_intc_device::irq_acknowledge_callback));
+ F2MC16_CLOCK_GENERATOR(mconfig, m_clock_generator, DERIVED_CLOCK(1, 1), m_intc, 0x22);
+ F2MC16_ADC(mconfig, m_adc, DERIVED_CLOCK(1, 1), m_intc, 0x1f);
+ m_intc->i2osclr<0x1f>().set(m_adc, FUNC(f2mc16_adc_device::i2osclr));
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[0], DERIVED_CLOCK(1, 1), m_intc, 0x1d);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[1], DERIVED_CLOCK(1, 1), m_intc, 0x1e);
+ m_intc->i2osclr<0x1d>().set(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::i2osclr));
+ m_intc->i2osclr<0x1e>().set(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::i2osclr));
+ F2MC16_UART(mconfig, m_uart[0], DERIVED_CLOCK(1, 1), m_intc, 0x27, 0x18);
+ F2MC16_UART(mconfig, m_uart[1], DERIVED_CLOCK(1, 1), m_intc, 0x25, 0x1a);
+ F2MC16_UART(mconfig, m_uart[2], DERIVED_CLOCK(1, 1), m_intc, 0x23, 0x21);
+ m_reload_timer[0]->internal_hz().set(m_uart[0], FUNC(f2mc16_uart_device::internal_timer_hz));
+ m_reload_timer[0]->internal_hz().append(m_uart[1], FUNC(f2mc16_uart_device::internal_timer_hz));
+ m_reload_timer[0]->internal_hz().append(m_uart[2], FUNC(f2mc16_uart_device::internal_timer_hz));
+ m_reload_timer[1]->internal_hz().set(m_adc, FUNC(f2mc16_adc_device::internal_timer_hz));
+ F2MC16_PPG(mconfig, m_ppg, DERIVED_CLOCK(1, 1), m_intc, 0x1b, 0x1c);
+ m_clock_generator->timebase_hz().set(m_ppg, FUNC(f2mc16_ppg_device::timebase_hz));
+}
+
+void mb90610a_device::internal_map(address_map &map)
+{
+//*7: This register is only available when the address/data bus is in multiplex mode. Access to the register is prohibited in non-multiplex mode.
+//*8: This register is only available when the external data bus is in 8-bit mode. Access to the register is prohibited in 16-bit mode.
+ map(0x0001, 0x0001).rw(m_port[0x1 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 1 data register *8
+ map(0x0002, 0x0002).rw(m_port[0x2 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 2 data register *7
+ map(0x0003, 0x0003).rw(m_port[0x3 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 3 data register
+ map(0x0004, 0x0004).rw(m_port[0x4 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 4 data register
+ map(0x0005, 0x0005).rw(m_port[0x5 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 5 data register
+ map(0x0006, 0x0006).rw(m_port[0x6 - 1], FUNC(f2mc16_port_device::pdr_adc_r), FUNC(f2mc16_port_device::pdr_w)); // Port 6 data register
+ map(0x0007, 0x0007).rw(m_port[0x7 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 7 data register
+ map(0x0008, 0x0008).rw(m_port[0x8 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 8 data register
+ map(0x0009, 0x0009).rw(m_port[0x9 - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 9 data register
+ map(0x000a, 0x000a).rw(m_port[0xa - 1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port a data register
+ map(0x0011, 0x0011).rw(m_port[0x1 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 1 direction register *8
+ map(0x0012, 0x0012).rw(m_port[0x2 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 2 direction register *7
+ map(0x0013, 0x0013).rw(m_port[0x3 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 3 direction register
+ map(0x0014, 0x0014).rw(m_port[0x4 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 4 direction register
+ map(0x0015, 0x0015).rw(m_port[0x5 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 5 direction register
+ map(0x0016, 0x0016).rw(m_port[0x6 - 1], FUNC(f2mc16_port_device::ader_r), FUNC(f2mc16_port_device::ader_w)); // Analog input enable register
+ map(0x0017, 0x0017).rw(m_port[0x7 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 7 direction register
+ map(0x0018, 0x0018).rw(m_port[0x8 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 8 direction register
+ map(0x0019, 0x0019).rw(m_port[0x9 - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 9 direction register
+ map(0x001a, 0x001a).rw(m_port[0xa - 1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port a direction register
+ map(0x0020, 0x0020).rw(m_uart[0], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 0
+ map(0x0021, 0x0021).rw(m_uart[0], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 0
+ map(0x0022, 0x0022).rw(m_uart[0], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 0/Serial output data register 0
+ map(0x0023, 0x0023).rw(m_uart[0], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 0
+ map(0x0024, 0x0024).rw(m_uart[1], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 1
+ map(0x0025, 0x0025).rw(m_uart[1], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 1
+ map(0x0026, 0x0026).rw(m_uart[1], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 1/Serial output data register 1
+ map(0x0027, 0x0027).rw(m_uart[1], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 1
+ map(0x0028, 0x0028).rw(m_intc, FUNC(f2mc16_intc_device::enir_r), FUNC(f2mc16_intc_device::enir_w)); // Interrupt/DTP enable register
+ map(0x0029, 0x0029).rw(m_intc, FUNC(f2mc16_intc_device::eirr_r), FUNC(f2mc16_intc_device::eirr_w)); // Interrupt/DTP source register
+ map(0x002a, 0x002b).rw(m_intc, FUNC(f2mc16_intc_device::elvr_r), FUNC(f2mc16_intc_device::elvr_w)); // Interrupt level setting register
+ map(0x002c, 0x002d).rw(m_adc, FUNC(f2mc16_adc_device::adcs_r), FUNC(f2mc16_adc_device::adcs_w)); // AD control status register
+ map(0x002e, 0x002f).rw(m_adc, FUNC(f2mc16_adc_device::adcr_r), FUNC(f2mc16_adc_device::adcr_w)); // AD data register
+ map(0x0030, 0x0031).rw(m_ppg, FUNC(f2mc16_ppg_device::ppgc_r), FUNC(f2mc16_ppg_device::ppgc_w)); // operation mode control register
+ map(0x0034, 0x0035).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<0>), FUNC(f2mc16_ppg_device::prl_w<0>)); // reload register
+ map(0x0036, 0x0037).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<1>), FUNC(f2mc16_ppg_device::prl_w<1>)); // reload register
+ map(0x0038, 0x0039).rw(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x003a, 0x003b).rw(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x003c, 0x003d).rw(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x003e, 0x003f).rw(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x0044, 0x0044).rw(m_uart[2], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 2
+ map(0x0045, 0x0045).rw(m_uart[2], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 2
+ map(0x0046, 0x0046).rw(m_uart[2], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 2/Serial output data register 2
+ map(0x0047, 0x0047).rw(m_uart[2], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 2
+ map(0x0048, 0x004f).ram(); // CSCR0-CSCR7
+ map(0x0051, 0x0051).w(m_uart[0], FUNC(f2mc16_uart_device::cdcr_w)); // UART0 (uart) machine clock division control register
+ map(0x0053, 0x0053).w(m_uart[1], FUNC(f2mc16_uart_device::cdcr_w)); // UART1 (uart) machine clock division control register
+ map(0x0055, 0x0055).w(m_uart[2], FUNC(f2mc16_uart_device::cdcr_w)); // UART2 (uart) machine clock division control register
+ map(0x009f, 0x009f).rw(m_intc, FUNC(f2mc16_intc_device::dirr_r), FUNC(f2mc16_intc_device::dirr_w)); // Delay interrupt generate/release register
+ map(0x00a0, 0x00a0).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::lpmcr_r), FUNC(f2mc16_clock_generator_device::lpmcr_w)); // Low power mode control register
+ map(0x00a1, 0x00a1).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::ckscr_r), FUNC(f2mc16_clock_generator_device::ckscr_w)); // Clock selection register
+ map(0x00a4, 0x00a7).nopw(); // HACK
+ //map(0x00a5, 0x00a5).nopw(); // ARSR Auto-ready function selection register
+ //map(0x00a6, 0x00a6).nopw(); // HACR External address output control register
+ //map(0x00a7, 0x00a7).nopw(); // ECSR Bus control signal selection register
+ map(0x00a8, 0x00a8).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::wdtc_r), FUNC(f2mc16_clock_generator_device::wdtc_w)); // Watchdog timer control register
+ map(0x00a9, 0x00a9).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::tbtc_r), FUNC(f2mc16_clock_generator_device::tbtc_w));
+ map(0x00b0, 0x00bf).rw(m_intc, FUNC(f2mc16_intc_device::icr_r), FUNC(f2mc16_intc_device::icr_w));
+ map(0x0100, m_internal_ram_end).ram();
+}
diff --git a/src/devices/cpu/f2mc16/mb90610a.h b/src/devices/cpu/f2mc16/mb90610a.h
new file mode 100644
index 00000000000..08976e9d32f
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90610a.h
@@ -0,0 +1,59 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+#ifndef MAME_CPU_F2MC16_MB90610A_H
+#define MAME_CPU_F2MC16_MB90610A_H
+
+#pragma once
+
+#include "f2mc16.h"
+#include "f2mc16_adc.h"
+#include "f2mc16_clock.h"
+#include "f2mc16_intc.h"
+#include "f2mc16_port.h"
+#include "f2mc16_ppg.h"
+#include "f2mc16_reload.h"
+#include "f2mc16_uart.h"
+
+class mb90610a_device :
+ public f2mc16_device
+{
+public:
+ mb90610a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto &adc() const { if (m_adc) return *m_adc; return *subdevice<f2mc16_adc_device>(m_adc.finder_tag()); }
+ template<unsigned N> typename std::enable_if<N >= 1 && N <= 10, f2mc16_port_device>::type &port() const { if (m_port[N - 1]) return *m_port[N - 1]; return *subdevice<f2mc16_port_device>(m_port[N - 1].finder_tag()); }
+ auto &ppg() const { if (m_ppg) return *m_ppg; return *subdevice<f2mc16_ppg_device>(m_ppg.finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 2, f2mc16_reload_timer_device>::type &reload_timer() const { if (m_reload_timer[N]) return *m_reload_timer[N]; return *subdevice<f2mc16_reload_timer_device>(m_reload_timer[N].finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 3, f2mc16_uart_device>::type &uart() const { if (m_uart[N]) return *m_uart[N]; return *subdevice<f2mc16_uart_device>(m_uart[N].finder_tag()); }
+
+protected:
+ mb90610a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t internal_ram_end);
+
+ // device_t
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override ATTR_COLD;
+
+ void internal_map(address_map &map) ATTR_COLD;
+
+ const address_space_config m_program_config;
+ const uint16_t m_internal_ram_end;
+
+ required_device<f2mc16_adc_device> m_adc;
+ required_device<f2mc16_clock_generator_device> m_clock_generator;
+ required_device<f2mc16_intc_device> m_intc;
+ required_device_array<f2mc16_port_device, 10> m_port;
+ required_device<f2mc16_ppg_device> m_ppg;
+ required_device_array<f2mc16_reload_timer_device, 2> m_reload_timer;
+ required_device_array<f2mc16_uart_device, 3> m_uart;
+};
+
+class mb90611a_device : public mb90610a_device
+{
+public:
+ mb90611a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+DECLARE_DEVICE_TYPE(MB90610A, mb90610a_device)
+DECLARE_DEVICE_TYPE(MB90611A, mb90611a_device)
+
+#endif // MAME_CPU_F2MC16_MB90610A_H
diff --git a/src/devices/cpu/f2mc16/mb9061x.cpp b/src/devices/cpu/f2mc16/mb9061x.cpp
deleted file mode 100644
index d53a519fcb1..00000000000
--- a/src/devices/cpu/f2mc16/mb9061x.cpp
+++ /dev/null
@@ -1,442 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:R. Belmont
-/*
- Fujitsu Micro MB9061x Microcontroller Family
- Emulation by R. Belmont
-*/
-
-#include "emu.h"
-#include "mb9061x.h"
-
-//**************************************************************************
-// MACROS / CONSTANTS
-//**************************************************************************
-
-//**************************************************************************
-// DEVICE DEFINITIONS
-//**************************************************************************
-
-DEFINE_DEVICE_TYPE(MB90610A, mb90610_device, "mb90610a", "Fujitsu MB90610A")
-DEFINE_DEVICE_TYPE(MB90611A, mb90611_device, "mb90611a", "Fujitsu MB90611A")
-DEFINE_DEVICE_TYPE(MB90641A, mb90641_device, "mb90641a", "Fujitsu MB90641A")
-
-//**************************************************************************
-// LIVE DEVICE
-//**************************************************************************
-
-//-------------------------------------------------
-// mb9061x_device - constructor
-//-------------------------------------------------
-mb9061x_device::mb9061x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map) :
- f2mc16_device(mconfig, type, tag, owner, clock),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 24, 0, internal_map)
-{
-}
-
-//-------------------------------------------------
-// device_start - device-specific startup
-//-------------------------------------------------
-
-void mb9061x_device::device_start()
-{
- f2mc16_device::device_start();
-
- m_tbtc_timer = timer_alloc(FUNC(mb9061x_device::tbtc_tick), this);
- m_tbtc_timer->adjust(attotime::never);
- m_timer[0] = timer_alloc(FUNC(mb9061x_device::timer0_tick), this);
- m_timer[0]->adjust(attotime::never);
- m_timer[1] = timer_alloc(FUNC(mb9061x_device::timer1_tick), this);
- m_timer[1]->adjust(attotime::never);
-}
-
-
-device_memory_interface::space_config_vector mb9061x_device::memory_space_config() const
-{
- return space_config_vector {
- std::make_pair(AS_PROGRAM, &m_program_config)
- };
-}
-
-//-------------------------------------------------
-// device_reset - device-specific reset
-//-------------------------------------------------
-
-void mb9061x_device::device_reset()
-{
- f2mc16_device::device_reset();
- m_tbtc = 0;
- memset(m_timer_regs, 0, sizeof(m_timer_regs));
- memset(m_event_count, 0, sizeof(m_event_count));
- m_event_state[0] = m_event_state[1] = CLEAR_LINE;
-}
-
-void mb9061x_device::execute_set_input(int inputnum, int state)
-{
-}
-
-/* MB90610 - "Evaluation device" with extra RAM */
-void mb90610_device::mb90610_map(address_map &map)
-{
- map(0x00a9, 0x00a9).rw(FUNC(mb9061x_device::tbtc_r), FUNC(mb9061x_device::tbtc_w));
- map(0x00b0, 0x00bf).rw(FUNC(mb9061x_device::intc_r), FUNC(mb9061x_device::intc_w));
- map(0x0100, 0x10ff).ram(); // 4K of internal RAM from 0x100 to 0x1100
-}
-
-mb90610_device::mb90610_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- mb90610_device(mconfig, MB90610A, tag, owner, clock)
-{
-}
-
-mb90610_device::mb90610_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- mb9061x_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(mb90610_device::mb90610_map), this))
-{
-}
-
-/* 16-bit preload timers with event count function */
-enum
-{
- TCTH_CSL1 = 0x08, // clock source select bit 1
- TCTH_CSL0 = 0x04, // clock source select bit 0
- TCTH_MOD2 = 0x02, // mode bit 2
- TCTH_MOD1 = 0x01, // mode bit 1
-
- TCTL_MOD0 = 0x80, // mode bit 0
- TCTL_OUTE = 0x40, // output enable
- TCTL_OUTL = 0x20, // output level
- TCTL_RELD = 0x10, // reload
- TCTL_INTE = 0x08, // IRQ enable
- TCTL_UF = 0x04, // expire flag
- TCTL_CNTE = 0x02, // enable counting
- TCTL_TRG = 0x01 // force a reload and start counting
-};
-
-TIMER_CALLBACK_MEMBER(mb9061x_device::timer0_tick)
-{
- u8 ctl = m_timer_regs[0];
- m_timer_regs[0] |= TCTL_UF;
- if (ctl & TCTL_INTE)
- {
-// printf("timer 0 IRQ\n");
- intc_trigger_irq(9, 0x1d);
- }
-
- if (ctl & TCTL_RELD)
- {
- recalc_timer(0);
- m_timer[0]->adjust(attotime::from_hz(m_timer_hz[0]));
- }
-}
-
-TIMER_CALLBACK_MEMBER(mb9061x_device::timer1_tick)
-{
- u8 ctl = m_timer_regs[4];
- m_timer_regs[4] |= TCTL_UF;
- if (ctl & TCTL_INTE)
- {
- // printf("timer 1 IRQ\n");
- intc_trigger_irq(9, 0x1e);
- }
-
- if (ctl & TCTL_RELD)
- {
- recalc_timer(0);
- m_timer[1]->adjust(attotime::from_hz(m_timer_hz[1]));
- }
-}
-
-u8 mb9061x_device::timer_r(offs_t offset)
-{
- //printf("timer_r: offset %d = %02x\n", offset, m_timer_regs[offset]);
- return m_timer_regs[offset];
-}
-
-void mb9061x_device::timer_w(offs_t offset, u8 data)
-{
- int timer = offset / 4;
- int reg = offset % 4;
-
- //printf("timer_w: %x to %d\n", data, offset);
-#if 0
- switch (reg)
- {
- case 0: // control/status, lower
- printf("%02x to timer %d lower control\n", data, timer);
- break;
-
- case 1: // control/status, upper
- printf("%02x to timer %d upper control\n", data, timer);
- break;
-
- case 2: // timer/reload, lower
- printf("%02x to timer %d lower reload\n", data, timer);
- break;
-
- case 3: // timer/reload, upper
- printf("%02x to timer %d upper reload\n", data, timer);
- break;
- }
-#endif
- if (reg == 0)
- {
- m_timer_regs[offset] &= (TCTL_TRG|TCTL_UF);
- m_timer_regs[offset] |= data;
- }
- else
- {
- m_timer_regs[offset] = data;
- }
-
- int rbase = timer << 2;
- u8 csl = (m_timer_regs[rbase+1] >> 2) & 3;
- if (reg == 0)
- {
- if (data & TCTL_TRG)
- {
- //printf("Got TRG\n");
- recalc_timer(timer);
- if ((m_timer_regs[rbase] & TCTL_CNTE) && (csl != 3))
- {
- m_timer[timer]->adjust(attotime::from_hz(m_timer_hz[timer]));
- }
- }
-
- if ((data & TCTL_CNTE) && (csl != 3))
- {
- //printf("CNTE set, starting timer at %d Hz\n", m_timer_hz[timer]);
- m_timer[timer]->adjust(attotime::from_hz(m_timer_hz[timer]));
- }
-
- if ((data & TCTL_CNTE) && (csl == 3))
- {
- m_event_count[timer] = m_timer_regs[2] | (m_timer_regs[3]<<8);
- //printf("CNTE set in event counter mode, reseeding count to %04x\n", m_event_count[timer]);
- }
-
- if (!(data & TCTL_UF))
- {
- intc_clear_irq(9, 0x1d + timer);
- }
- }
-}
-
-void mb9061x_device::tin0_w(int state)
-{
- tin_common(0, 0, state);
-}
-
-void mb9061x_device::tin1_w(int state)
-{
- tin_common(1, 4, state);
-}
-
-void mb9061x_device::tin_common(int timer, int base, int state)
-{
- // emsure event counter mode
- if ((m_timer_regs[base + 1] & (TCTH_CSL0|TCTH_CSL1)) == (TCTH_CSL0|TCTH_CSL1) &&
- (m_timer_regs[base] & TCTL_CNTE))
- {
- bool bTickIt = false;
-
- // rising edge
- if ((state && !m_event_state[base/4]) && (m_timer_regs[base] & TCTL_MOD0) && !(m_timer_regs[base+1] & TCTH_MOD1))
- {
- bTickIt = true;
- }
-
- // falling edge
- if ((!state && m_event_state[base/4]) && !(m_timer_regs[base] & TCTL_MOD0) && (m_timer_regs[base+1] & TCTH_MOD1))
- {
- bTickIt = true;
- }
-
- // any edge
- if ((state != m_event_state[base/4]) && !(m_timer_regs[base] & TCTL_MOD0) && (m_timer_regs[base+1] & TCTH_MOD1))
- {
- bTickIt = true;
- }
-
- if (bTickIt)
- {
- m_event_count[timer]--;
- //printf("Tick timer %d, new value %04x\n", timer, m_event_count[timer]);
-
- if (m_event_count[timer] == 0xffff)
- {
- u8 ctl = m_timer_regs[base];
- m_timer_regs[base] |= TCTL_UF;
- //printf("Timer %d exp, CL %02x\n", timer, m_timer_regs[base]);
- if (ctl & TCTL_INTE)
- {
- //printf("timer %d IRQ\n", timer);
- intc_trigger_irq(9, 0x1d + timer);
- }
-
- if (m_timer_regs[timer * 4] & TCTL_RELD)
- {
- m_event_count[timer] = m_timer_regs[2] | (m_timer_regs[3]<<8);
- //printf("timer %d reload to %04x\n", timer, m_event_count[timer]);
- }
- }
- }
-
- m_event_state[timer] = state;
- }
-}
-
-void mb9061x_device::recalc_timer(int tnum)
-{
- int rbase = tnum << 2;
- u32 divider = 1;
- u8 csl = (m_timer_regs[rbase+1] >> 2) & 3;
-
- // check clock select
- switch (csl)
- {
- case 0: divider = 2; break;
- case 1: divider = 16; break;
- case 2: divider = 64; break;
-
- case 3: // event counter mode
- return;
- }
-
- u32 tclk = clock() / divider;
- u32 tval = m_timer_regs[rbase+2] | (m_timer_regs[rbase+3]<<8);
- //printf("CSL %d, tclk %d, tval %d\n", csl, tclk, tval);
- //printf("Timer is %d Hz\n", tclk / tval);
- m_timer_hz[tnum] = tclk / tval;
-}
-
-/* TBTC: timebase counter */
-enum
-{
- TBTC_TEST = 0x80, // test, must always write 1
- TBTC_TBIE = 0x10, // interrupt enable
- TBTC_TBOF = 0x08, // expire flag
- TBTC_TBR = 0x04, // write 0 to restart
- TBTC_TBC1 = 0x02, // rate select bit 1
- TBTC_TBC0 = 0x01 // rate select bit 0
-};
-
-u8 mb9061x_device::tbtc_r()
-{
- return m_tbtc;
-}
-
-void mb9061x_device::tbtc_w(u8 data)
-{
- static const float periods[4] = { 1.024f, 4.096f, 16.384f, 131.072f };
-
- //printf("%02x to TBTC\n", data);
-// if ((!(data & TBTC_TBR)) || ((data & (TBTC_TBC1|TBTC_TBC0)) != (m_tbtc & (TBTC_TBC1|TBTC_TBC0))))
- {
- m_tbtc_timer->adjust(attotime(0, ATTOSECONDS_IN_MSEC(periods[data & (TBTC_TBC1|TBTC_TBC0)])));
-
- if (!(data & TBTC_TBR))
- {
- intc_clear_irq(11, 0x22);
- }
- }
-
- if (!(data & TBTC_TBOF) && (m_tbtc & TBTC_TBOF))
- {
- intc_clear_irq(11, 0x22);
- }
-
- m_tbtc = data;
-}
-
-/* INTC: Interrupt controller */
-TIMER_CALLBACK_MEMBER(mb9061x_device::tbtc_tick)
-{
- //printf("TBTC tick\n");
- m_tbtc_timer->adjust(attotime::never);
- m_tbtc |= TBTC_TBOF;
- if (m_tbtc & TBTC_TBIE)
- {
- intc_trigger_irq(11, 0x22);
- }
-}
-
-u8 mb9061x_device::intc_r(offs_t offset)
-{
- return m_intc[offset];
-}
-
-void mb9061x_device::intc_w(offs_t offset, u8 data)
-{
- //printf("INTC ICR %d to %02x\n", offset, data);
- m_intc[offset] = data;
-}
-
-void mb9061x_device::intc_trigger_irq(int icr, int vector)
-{
- int level = m_intc[icr] & 7;
-
- //printf("trigger_irq: ICR %d, level %d\n", icr, level);
-
- // Extended Intelligent I/O Service?
- if (m_intc[icr] & 8)
- {
- fatalerror("MB9061X: ICR %d (vector %x) calls for EI2OS, not implemented\n", icr, vector);
- }
- else
- {
- if (level != 7)
- {
- set_irq(vector, level);
- }
- }
-}
-
-void mb9061x_device::intc_clear_irq(int icr, int vector)
-{
- int level = m_intc[icr] & 7;
-
- // Make sure this isn't the Extended Intelligent I/O Service
- if (!(m_intc[icr] & 8))
- {
- if (level != 7)
- {
- clear_irq(vector);
- }
- }
-}
-
-/* MB90611 - Production version of this series */
-void mb90611_device::mb90611_map(address_map &map)
-{
- map(0x0038, 0x003f).rw(FUNC(mb9061x_device::timer_r), FUNC(mb9061x_device::timer_w));
- map(0x00a9, 0x00a9).rw(FUNC(mb9061x_device::tbtc_r), FUNC(mb9061x_device::tbtc_w));
- map(0x00b0, 0x00bf).rw(FUNC(mb9061x_device::intc_r), FUNC(mb9061x_device::intc_w));
- map(0x0100, 0x04ff).ram(); // 1K of internal RAM from 0x100 to 0x500
-}
-
-mb90611_device::mb90611_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- mb90611_device(mconfig, MB90611A, tag, owner, clock)
-{
-}
-
-mb90611_device::mb90611_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- mb9061x_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(mb90611_device::mb90611_map), this))
-{
-}
-
-/* MB90641 - no A/D, extra UART and timers, optional internal ROM */
-void mb90641_device::mb90641_map(address_map &map)
-{
- map(0x0038, 0x003f).rw(FUNC(mb9061x_device::timer_r), FUNC(mb9061x_device::timer_w));
- map(0x00a9, 0x00a9).rw(FUNC(mb9061x_device::tbtc_r), FUNC(mb9061x_device::tbtc_w));
- map(0x00b0, 0x00bf).rw(FUNC(mb9061x_device::intc_r), FUNC(mb9061x_device::intc_w));
- map(0x0100, 0x08ff).ram(); // 2K of internal RAM
-}
-
-mb90641_device::mb90641_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- mb90641_device(mconfig, MB90641A, tag, owner, clock)
-{
-}
-
-mb90641_device::mb90641_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- mb9061x_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(mb90641_device::mb90641_map), this))
-{
-}
diff --git a/src/devices/cpu/f2mc16/mb9061x.h b/src/devices/cpu/f2mc16/mb9061x.h
deleted file mode 100644
index 4fd55db4205..00000000000
--- a/src/devices/cpu/f2mc16/mb9061x.h
+++ /dev/null
@@ -1,115 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:R. Belmont
-#ifndef MAME_CPU_F2MC16_MB9061X_H
-#define MAME_CPU_F2MC16_MB9061X_H
-
-#pragma once
-
-#include "f2mc16.h"
-
-//**************************************************************************
-// CONSTANTS
-//**************************************************************************
-
-//**************************************************************************
-// TYPE DEFINITIONS
-//**************************************************************************
-
-// ======================> mb9061x_device
-
-class mb9061x_device : public f2mc16_device
-{
- friend class mb90610_device;
- friend class mb90611_device;
- friend class mb90641_device;
-
-public:
- const address_space_config m_program_config;
-
- // interrupts handled by the interrupt controller
- enum
- {
- ICR0 = 0, ICR1, ICR2, ICR3, ICR4, ICR5, ICR6, ICR7, ICR8, ICR9, ICR10, ICR11, ICR12, ICR13, ICR14, ICR15
- };
-
- // timer external counter tick functions
- void tin0_w(int state);
- void tin1_w(int state);
-
-protected:
- // construction/destruction
- mb9061x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map);
-
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void execute_set_input(int inputnum, int state) override;
- virtual space_config_vector memory_space_config() const override;
-
-private:
- // TBC
- TIMER_CALLBACK_MEMBER(tbtc_tick);
- u8 tbtc_r();
- void tbtc_w(u8 data);
-
- // INTC
- u8 intc_r(offs_t offset);
- void intc_w(offs_t offset, u8 data);
- void intc_trigger_irq(int icr, int vector);
- void intc_clear_irq(int icr, int vector);
-
- // TIMERS
- TIMER_CALLBACK_MEMBER(timer0_tick);
- TIMER_CALLBACK_MEMBER(timer1_tick);
- u8 timer_r(offs_t offset);
- void timer_w(offs_t offset, u8 data);
- void recalc_timer(int tnum);
- void tin_common(int timer, int base, int state);
-
- u8 m_timer_regs[8];
- u32 m_timer_hz[2];
- emu_timer *m_timer[2];
- int m_event_state[2];
- u16 m_event_count[2];
-
- u8 m_tbtc;
- emu_timer *m_tbtc_timer;
-
- u8 m_intc[0x10];
-};
-
-class mb90610_device : public mb9061x_device
-{
-public:
- mb90610_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- void mb90610_map(address_map &map);
-protected:
- mb90610_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class mb90611_device : public mb9061x_device
-{
-public:
- mb90611_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- void mb90611_map(address_map &map);
-protected:
- mb90611_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class mb90641_device : public mb9061x_device
-{
-public:
- mb90641_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- void mb90641_map(address_map &map);
-protected:
- mb90641_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-};
-
-DECLARE_DEVICE_TYPE(MB90610A, mb90610_device)
-DECLARE_DEVICE_TYPE(MB90611A, mb90611_device)
-DECLARE_DEVICE_TYPE(MB90641A, mb90641_device)
-
-#endif // MAME_CPU_F2MC16_MB9061X_H
diff --git a/src/devices/cpu/f2mc16/mb90640a.cpp b/src/devices/cpu/f2mc16/mb90640a.cpp
new file mode 100644
index 00000000000..bddb45805d6
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90640a.cpp
@@ -0,0 +1,134 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+
+#include "emu.h"
+#include "mb90640a.h"
+
+DEFINE_DEVICE_TYPE(MB90641A, mb90641a_device, "mb90641a", "Fujitsu MB90641A")
+
+mb90640a_device::mb90640a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ f2mc16_device(mconfig, type, tag, owner, clock),
+ m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor(FUNC(mb90640a_device::internal_map), this)),
+ m_clock_generator(*this, "clock_generator"),
+ m_intc(*this, "intc"),
+ m_port(*this, "port%x", 1U),
+ m_ppg(*this, "ppg"),
+ m_reload_timer(*this, "reload_timer%u", 0U),
+ m_uart(*this, "uart%u", 0U)
+{
+}
+
+mb90641a_device::mb90641a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ mb90640a_device(mconfig, MB90641A, tag, owner, clock)
+{
+}
+
+device_memory_interface::space_config_vector mb90640a_device::memory_space_config() const
+{
+ return space_config_vector{
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+void mb90640a_device::device_add_mconfig(machine_config &mconfig)
+{
+ F2MC16_PORT(mconfig, m_port[0x0], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x1], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x2], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x3], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x4], 0x00, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x5], 0x00, 0x3f);
+ F2MC16_PORT(mconfig, m_port[0x6], 0xff, 0xff);
+ F2MC16_PORT(mconfig, m_port[0x7], 0x00, 0x7f);
+ F2MC16_PORT(mconfig, m_port[0x8], 0x00, 0x7f);
+ F2MC16_PORT(mconfig, m_port[0x9], 0x00, 0x3f);
+ F2MC16_PORT(mconfig, m_port[0xa], 0x00, 0xfe);
+
+ F2MC16_INTC(mconfig, m_intc);
+ set_irq_acknowledge_callback(m_intc, FUNC(f2mc16_intc_device::irq_acknowledge_callback));
+ F2MC16_CLOCK_GENERATOR(mconfig, m_clock_generator, DERIVED_CLOCK(1, 1), m_intc, 0x22);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[0], DERIVED_CLOCK(1, 1), m_intc, 0x1d);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[1], DERIVED_CLOCK(1, 1), m_intc, 0x1e);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[2], DERIVED_CLOCK(1, 1), m_intc, 0x12);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[3], DERIVED_CLOCK(1, 1), m_intc, 0x14);
+ F2MC16_RELOAD_TIMER(mconfig, m_reload_timer[4], DERIVED_CLOCK(1, 1), m_intc, 0x16);
+ m_intc->i2osclr<0x1d>().set(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::i2osclr));
+ m_intc->i2osclr<0x1e>().set(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::i2osclr));
+ m_intc->i2osclr<0x12>().set(m_reload_timer[2], FUNC(f2mc16_reload_timer_device::i2osclr));
+ m_intc->i2osclr<0x14>().set(m_reload_timer[3], FUNC(f2mc16_reload_timer_device::i2osclr));
+ m_intc->i2osclr<0x16>().set(m_reload_timer[4], FUNC(f2mc16_reload_timer_device::i2osclr));
+ F2MC16_UART(mconfig, m_uart[0], DERIVED_CLOCK(1, 1), m_intc, 0x27, 0x18);
+ F2MC16_UART(mconfig, m_uart[1], DERIVED_CLOCK(1, 1), m_intc, 0x25, 0x1a);
+ m_reload_timer[0]->internal_hz().set(m_uart[0], FUNC(f2mc16_uart_device::internal_timer_hz));
+ m_reload_timer[0]->internal_hz().append(m_uart[1], FUNC(f2mc16_uart_device::internal_timer_hz));
+ F2MC16_PPG(mconfig, m_ppg, DERIVED_CLOCK(1, 1), m_intc, 0x1b, 0x1c);
+ m_clock_generator->timebase_hz().set(m_ppg, FUNC(f2mc16_ppg_device::timebase_hz));
+}
+
+void mb90640a_device::internal_map(address_map &map)
+{
+ map(0x0000, 0x0000).rw(m_port[0x0], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 0 data register *8
+ map(0x0001, 0x0001).rw(m_port[0x1], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 1 data register *7
+ map(0x0002, 0x0002).rw(m_port[0x2], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 2 data register *6
+ map(0x0003, 0x0003).rw(m_port[0x3], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 3 data register *6
+ map(0x0004, 0x0004).rw(m_port[0x4], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 4 data register
+ map(0x0005, 0x0005).rw(m_port[0x5], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 5 data register *8
+ map(0x0006, 0x0006).rw(m_port[0x6], FUNC(f2mc16_port_device::pdr_adc_r), FUNC(f2mc16_port_device::pdr_w)); // Port 6 data register
+ map(0x0007, 0x0007).rw(m_port[0x7], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 7 data register
+ map(0x0008, 0x0008).rw(m_port[0x8], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 8 data register
+ map(0x0009, 0x0009).rw(m_port[0x9], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port 9 data register
+ map(0x000a, 0x000a).rw(m_port[0xa], FUNC(f2mc16_port_device::pdr_r), FUNC(f2mc16_port_device::pdr_w)); // Port a data register *8
+ map(0x0010, 0x0010).rw(m_port[0x0], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 0 direction register *8
+ map(0x0011, 0x0011).rw(m_port[0x1], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 1 direction register *7
+ map(0x0012, 0x0012).rw(m_port[0x2], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 2 direction register *6
+ map(0x0013, 0x0013).rw(m_port[0x3], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 3 direction register *6
+ map(0x0014, 0x0014).rw(m_port[0x4], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 4 direction register
+ map(0x0015, 0x0015).rw(m_port[0x5], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 5 direction register *8
+ map(0x0016, 0x0016).rw(m_port[0x6], FUNC(f2mc16_port_device::ader_r), FUNC(f2mc16_port_device::ader_w)); // Analog input enable register
+ map(0x0017, 0x0017).rw(m_port[0x7], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 7 direction register
+ map(0x0018, 0x0018).rw(m_port[0x8], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 8 direction register
+ map(0x0019, 0x0019).rw(m_port[0x9], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port 9 direction register
+ map(0x001a, 0x001a).rw(m_port[0xa], FUNC(f2mc16_port_device::ddr_r), FUNC(f2mc16_port_device::ddr_w)); // Port a direction register
+ map(0x0020, 0x0020).rw(m_uart[0], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 0
+ map(0x0021, 0x0021).rw(m_uart[0], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 0
+ map(0x0022, 0x0022).rw(m_uart[0], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 0/Serial output data register 0
+ map(0x0023, 0x0023).rw(m_uart[0], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 0
+ map(0x0024, 0x0024).rw(m_uart[1], FUNC(f2mc16_uart_device::smr_r), FUNC(f2mc16_uart_device::smr_w)); // Serial mode register 1
+ map(0x0025, 0x0025).rw(m_uart[1], FUNC(f2mc16_uart_device::scr_r), FUNC(f2mc16_uart_device::scr_w)); // Serial control register 1
+ map(0x0026, 0x0026).rw(m_uart[1], FUNC(f2mc16_uart_device::sidr_r), FUNC(f2mc16_uart_device::sodr_w)); // Serial input data register 1/Serial output data register 1
+ map(0x0027, 0x0027).rw(m_uart[1], FUNC(f2mc16_uart_device::ssr_r), FUNC(f2mc16_uart_device::ssr_w)); // Serial control register 1
+ map(0x0028, 0x0028).rw(m_intc, FUNC(f2mc16_intc_device::enir_r), FUNC(f2mc16_intc_device::enir_w)); // Interrupt/DTP enable register
+ map(0x0029, 0x0029).rw(m_intc, FUNC(f2mc16_intc_device::eirr_r), FUNC(f2mc16_intc_device::eirr_w)); // Interrupt/DTP source register
+ map(0x002a, 0x002b).rw(m_intc, FUNC(f2mc16_intc_device::elvr_r), FUNC(f2mc16_intc_device::elvr_w)); // Interrupt level setting register
+ map(0x0030, 0x0031).rw(m_ppg, FUNC(f2mc16_ppg_device::ppgc_r), FUNC(f2mc16_ppg_device::ppgc_w)); // operation mode control register
+ map(0x0034, 0x0035).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<0>), FUNC(f2mc16_ppg_device::prl_w<0>)); // reload register
+ map(0x0036, 0x0037).rw(m_ppg, FUNC(f2mc16_ppg_device::prl_r<1>), FUNC(f2mc16_ppg_device::prl_w<1>)); // reload register
+ map(0x0038, 0x0039).rw(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x003a, 0x003b).rw(m_reload_timer[0], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x003c, 0x003d).rw(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x003e, 0x003f).rw(m_reload_timer[1], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x0048, 0x004f).ram(); // CSCR0-CSCR7
+ map(0x0051, 0x0051).w(m_uart[0], FUNC(f2mc16_uart_device::cdcr_w)); // UART0 (uart) machine clock division control register
+ map(0x0053, 0x0053).w(m_uart[1], FUNC(f2mc16_uart_device::cdcr_w)); // UART1 (uart) machine clock division control register
+ map(0x0058, 0x0059).rw(m_reload_timer[2], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x005a, 0x005b).rw(m_reload_timer[2], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x005c, 0x005d).rw(m_reload_timer[3], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x005e, 0x005f).rw(m_reload_timer[3], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x0060, 0x0061).rw(m_reload_timer[4], FUNC(f2mc16_reload_timer_device::tmcsr_r), FUNC(f2mc16_reload_timer_device::tmcsr_w));
+ map(0x0062, 0x0063).rw(m_reload_timer[4], FUNC(f2mc16_reload_timer_device::tmr_r), FUNC(f2mc16_reload_timer_device::tmrlr_w));
+ map(0x0064, 0x0067).ram(); // HACK
+ //map(0x0064, 0x0066).ram(); // TPCR Timer pin control register
+ map(0x006e, 0x006f).ram(); // HACK
+ //map(0x006f, 0x006f).ram(); // ROMM ROM mirror function
+ map(0x009f, 0x009f).rw(m_intc, FUNC(f2mc16_intc_device::dirr_r), FUNC(f2mc16_intc_device::dirr_w)); // Delay interrupt generate/release register
+ map(0x00a0, 0x00a0).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::lpmcr_r), FUNC(f2mc16_clock_generator_device::lpmcr_w)); // Low power mode control register
+ map(0x00a1, 0x00a1).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::ckscr_r), FUNC(f2mc16_clock_generator_device::ckscr_w)); // Clock selection register
+ map(0x00a4, 0x00a7).nopw(); // HACK
+ //map(0x00a5, 0x00a5).nopw(); // ARSR Auto-ready function selection register
+ //map(0x00a6, 0x00a6).nopw(); // HACR External address output control register
+ //map(0x00a7, 0x00a7).nopw(); // ECSR Bus control signal selection register
+ map(0x00a8, 0x00a8).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::wdtc_r), FUNC(f2mc16_clock_generator_device::wdtc_w)); // Watchdog timer control register
+ map(0x00a9, 0x00a9).rw(m_clock_generator, FUNC(f2mc16_clock_generator_device::tbtc_r), FUNC(f2mc16_clock_generator_device::tbtc_w));
+ map(0x00b0, 0x00bf).rw(m_intc, FUNC(f2mc16_intc_device::icr_r), FUNC(f2mc16_intc_device::icr_w));
+ map(0x0100, 0x08ff).ram();
+}
diff --git a/src/devices/cpu/f2mc16/mb90640a.h b/src/devices/cpu/f2mc16/mb90640a.h
new file mode 100644
index 00000000000..c4bcff49a46
--- /dev/null
+++ b/src/devices/cpu/f2mc16/mb90640a.h
@@ -0,0 +1,52 @@
+// license:BSD-3-Clause
+// copyright-holders:smf
+#ifndef MAME_CPU_F2MC16_MB90640A_H
+#define MAME_CPU_F2MC16_MB90640A_H
+
+#pragma once
+
+#include "f2mc16.h"
+#include "f2mc16_clock.h"
+#include "f2mc16_intc.h"
+#include "f2mc16_port.h"
+#include "f2mc16_ppg.h"
+#include "f2mc16_reload.h"
+#include "f2mc16_uart.h"
+
+class mb90640a_device :
+ public f2mc16_device
+{
+public:
+ template<unsigned N> typename std::enable_if<N < 11, f2mc16_port_device>::type &port() const { if (m_port[N]) return *m_port[N]; return *subdevice<f2mc16_port_device>(m_port[N].finder_tag()); }
+ auto &ppg() const { if (m_ppg) return *m_ppg; return *subdevice<f2mc16_ppg_device>(m_ppg.finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 5, f2mc16_reload_timer_device>::type &reload_timer() const { if (m_reload_timer[N]) return *m_reload_timer[N]; return *subdevice<f2mc16_reload_timer_device>(m_reload_timer[N].finder_tag()); }
+ template<unsigned N> typename std::enable_if<N < 2, f2mc16_uart_device>::type &uart() const { if (m_uart[N]) return *m_uart[N]; return *subdevice<f2mc16_uart_device>(m_uart[N].finder_tag()); }
+
+protected:
+ mb90640a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ // device_t
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override ATTR_COLD;
+
+ void internal_map(address_map &map) ATTR_COLD;
+
+ const address_space_config m_program_config;
+
+ required_device<f2mc16_clock_generator_device> m_clock_generator;
+ required_device<f2mc16_intc_device> m_intc;
+ required_device_array<f2mc16_port_device, 11> m_port;
+ required_device<f2mc16_ppg_device> m_ppg;
+ required_device_array<f2mc16_reload_timer_device, 5> m_reload_timer;
+ required_device_array<f2mc16_uart_device, 2> m_uart;
+};
+
+class mb90641a_device : public mb90640a_device
+{
+public:
+ mb90641a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+DECLARE_DEVICE_TYPE(MB90641A, mb90641a_device)
+
+#endif // MAME_CPU_F2MC16_MB90640A_H
diff --git a/src/devices/cpu/f8/f8.h b/src/devices/cpu/f8/f8.h
index da621d3a306..8477b1bf031 100644
--- a/src/devices/cpu/f8/f8.h
+++ b/src/devices/cpu/f8/f8.h
@@ -33,13 +33,12 @@ protected:
};
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u32 execute_min_cycles() const noexcept override { return 4; }
virtual u32 execute_max_cycles() const noexcept override { return 26; }
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -53,7 +52,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void regs_map(address_map &map);
+ void regs_map(address_map &map) ATTR_COLD;
address_space_config m_program_config;
address_space_config m_regs_config;
diff --git a/src/devices/cpu/fr/fr.h b/src/devices/cpu/fr/fr.h
index 60e6eb8469f..6d68391a2c0 100644
--- a/src/devices/cpu/fr/fr.h
+++ b/src/devices/cpu/fr/fr.h
@@ -24,8 +24,8 @@ protected:
fr_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -63,7 +63,7 @@ public:
mb91f155a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/g65816/g65816.cpp b/src/devices/cpu/g65816/g65816.cpp
index b44c99c561e..e6031da603d 100644
--- a/src/devices/cpu/g65816/g65816.cpp
+++ b/src/devices/cpu/g65816/g65816.cpp
@@ -8,7 +8,6 @@
G65C816 CPU Emulator V1.00
Copyright Karl Stenerud
-All rights reserved.
*/
/* ======================================================================== */
@@ -100,6 +99,8 @@ TODO general:
#include "emu.h"
#include "g65816.h"
+#include "g65816cm.h"
+
DEFINE_DEVICE_TYPE(G65816, g65816_device, "w65c816", "WDC W65C816")
DEFINE_DEVICE_TYPE(G65802, g65802_device, "w65c802", "WDC W65C802")
@@ -258,10 +259,10 @@ unsigned g65816_device::g65816i_read_8_opcode(unsigned address)
unsigned g65816_device::g65816i_read_8_direct(unsigned address)
{
- if (FLAG_E)
+ if (FLAG_E && !MAKE_UINT_8(REGISTER_D))
{
/* force address into zero page */
- address = REGISTER_D + MAKE_UINT_8(address - REGISTER_D);
+ address = REGISTER_D | MAKE_UINT_8(address);
CLOCKS -= (bus_5A22_cycle_burst(address));
}
else
@@ -290,10 +291,10 @@ void g65816_device::g65816i_write_8_normal(unsigned address, unsigned value)
void g65816_device::g65816i_write_8_direct(unsigned address, unsigned value)
{
- if (FLAG_E)
+ if (FLAG_E && !MAKE_UINT_8(REGISTER_D))
{
/* force address into zero page */
- address = REGISTER_D + MAKE_UINT_8(address - REGISTER_D);
+ address = REGISTER_D | MAKE_UINT_8(address);
CLOCKS -= (bus_5A22_cycle_burst(address));
}
else
@@ -307,58 +308,68 @@ void g65816_device::g65816i_write_8_direct(unsigned address, unsigned value)
unsigned g65816_device::g65816i_read_16_normal(unsigned address)
{
return g65816i_read_8_normal(address) |
- (g65816i_read_8_normal(address+1)<<8);
+ (g65816i_read_8_normal(address + 1) << 8);
}
unsigned g65816_device::g65816i_read_16_immediate(unsigned address)
{
return g65816i_read_8_immediate(address) |
- (g65816i_read_8_immediate(address+1)<<8);
+ (g65816i_read_8_immediate(address + 1) << 8);
}
unsigned g65816_device::g65816i_read_16_direct(unsigned address)
{
return g65816i_read_8_direct(address) |
- (g65816i_read_8_direct(address+1)<<8);
+ (g65816i_read_8_direct(address + 1) << 8);
+}
+
+unsigned g65816_device::g65816i_read_16_direct_x(unsigned address)
+{
+ if (FLAG_E && MAKE_UINT_8(REGISTER_D))
+ {
+ // The (direct,X) addressing mode has a bug in which the high byte is
+ // wrapped within the page if E = 1 and D&0xFF != 0.
+ uint8_t lo = g65816i_read_8_direct(address);
+ uint8_t hi = g65816i_read_8_direct((address & 0xffff00) |
+ MAKE_UINT_8(address + 1));
+ return lo | (hi<<8);
+ }
+ else
+ {
+ return g65816i_read_16_direct(address);
+ }
}
unsigned g65816_device::g65816i_read_16_vector(unsigned address)
{
return g65816i_read_8_vector(address) |
- (g65816i_read_8_vector(address+1)<<8);
+ (g65816i_read_8_vector(address + 1) << 8);
}
void g65816_device::g65816i_write_16_normal(unsigned address, unsigned value)
{
- g65816i_write_8_normal(address, value&0xff);
- g65816i_write_8_normal(address+1, value>>8);
+ g65816i_write_8_normal(address, value & 0xff);
+ g65816i_write_8_normal(address + 1, value >> 8);
}
void g65816_device::g65816i_write_16_direct(unsigned address, unsigned value)
{
- g65816i_write_8_direct(address, value&0xff);
- g65816i_write_8_direct(address+1, value>>8);
+ g65816i_write_8_direct(address, value & 0xff);
+ g65816i_write_8_direct(address + 1, value >> 8);
}
unsigned g65816_device::g65816i_read_24_normal(unsigned address)
{
return g65816i_read_8_normal(address) |
- (g65816i_read_8_normal(address+1)<<8) |
- (g65816i_read_8_normal(address+2)<<16);
+ (g65816i_read_8_normal(address + 1) << 8) |
+ (g65816i_read_8_normal(address + 2) << 16);
}
unsigned g65816_device::g65816i_read_24_immediate(unsigned address)
{
return g65816i_read_8_immediate(address) |
- (g65816i_read_8_immediate(address+1)<<8) |
- (g65816i_read_8_immediate(address+2)<<16);
-}
-
-unsigned g65816_device::g65816i_read_24_direct(unsigned address)
-{
- return g65816i_read_8_direct(address) |
- (g65816i_read_8_direct(address+1)<<8) |
- (g65816i_read_8_direct(address+2)<<16);
+ (g65816i_read_8_immediate(address + 1) << 8) |
+ (g65816i_read_8_immediate(address + 2) << 16);
}
@@ -371,11 +382,11 @@ void g65816_device::g65816i_push_8(unsigned value)
g65816i_write_8_normal(REGISTER_S, value);
if (FLAG_E)
{
- REGISTER_S = MAKE_UINT_8(REGISTER_S-1) | 0x100;
+ REGISTER_S = MAKE_UINT_8(REGISTER_S - 1) | 0x100;
}
else
{
- REGISTER_S = MAKE_UINT_16(REGISTER_S-1);
+ REGISTER_S = MAKE_UINT_16(REGISTER_S - 1);
}
}
@@ -383,19 +394,19 @@ unsigned g65816_device::g65816i_pull_8()
{
if (FLAG_E)
{
- REGISTER_S = MAKE_UINT_8(REGISTER_S+1) | 0x100;
+ REGISTER_S = MAKE_UINT_8(REGISTER_S + 1) | 0x100;
}
else
{
- REGISTER_S = MAKE_UINT_16(REGISTER_S+1);
+ REGISTER_S = MAKE_UINT_16(REGISTER_S + 1);
}
return g65816i_read_8_normal(REGISTER_S);
}
void g65816_device::g65816i_push_16(unsigned value)
{
- g65816i_push_8(value>>8);
- g65816i_push_8(value&0xff);
+ g65816i_push_8(value >> 8);
+ g65816i_push_8(value & 0xff);
}
unsigned g65816_device::g65816i_pull_16()
@@ -406,9 +417,9 @@ unsigned g65816_device::g65816i_pull_16()
void g65816_device::g65816i_push_24(unsigned value)
{
- g65816i_push_8(value>>16);
- g65816i_push_8((value>>8)&0xff);
- g65816i_push_8(value&0xff);
+ g65816i_push_8(value >> 16);
+ g65816i_push_8((value >> 8) & 0xff);
+ g65816i_push_8(value & 0xff);
}
unsigned g65816_device::g65816i_pull_24()
@@ -418,6 +429,51 @@ unsigned g65816_device::g65816i_pull_24()
return ((res + 1) & 0xffff) | (g65816i_pull_8() << 16);
}
+void g65816_device::g65816i_push_8_native(unsigned value)
+{
+ g65816i_write_8_normal(REGISTER_S, value);
+ REGISTER_S = MAKE_UINT_16(REGISTER_S - 1);
+}
+
+unsigned g65816_device::g65816i_pull_8_native()
+{
+ REGISTER_S = MAKE_UINT_16(REGISTER_S + 1);
+ return g65816i_read_8_normal(REGISTER_S);
+}
+
+void g65816_device::g65816i_push_16_native(unsigned value)
+{
+ g65816i_push_8_native(value >> 8);
+ g65816i_push_8_native(value & 0xff);
+}
+
+unsigned g65816_device::g65816i_pull_16_native()
+{
+ unsigned res = g65816i_pull_8_native();
+ return res | (g65816i_pull_8_native() << 8);
+}
+
+void g65816_device::g65816i_push_24_native(unsigned value)
+{
+ g65816i_push_8_native(value >> 16);
+ g65816i_push_8_native((value >> 8) & 0xff);
+ g65816i_push_8_native(value & 0xff);
+}
+
+unsigned g65816_device::g65816i_pull_24_native()
+{
+ unsigned res = g65816i_pull_8_native();
+ res |= g65816i_pull_8_native() << 8;
+ return ((res + 1) & 0xffff) | (g65816i_pull_8_native() << 16);
+}
+
+void g65816_device::g65816i_update_reg_s()
+{
+ if (FLAG_E)
+ {
+ REGISTER_S = MAKE_UINT_8(REGISTER_S) | 0x100;
+ }
+}
/* ======================================================================== */
/* ============================ PROGRAM COUNTER =========================== */
@@ -431,7 +487,7 @@ void g65816_device::g65816i_jump_16(unsigned address)
void g65816_device::g65816i_jump_24(unsigned address)
{
- REGISTER_PB = address&0xff0000;
+ REGISTER_PB = address & 0xff0000;
REGISTER_PC = MAKE_UINT_16(address);
g65816i_jumping(REGISTER_PC);
}
@@ -442,7 +498,7 @@ void g65816_device::g65816i_branch_8(unsigned offset)
{
unsigned old_pc = REGISTER_PC;
REGISTER_PC = MAKE_UINT_16(REGISTER_PC + MAKE_INT_8(offset));
- if((REGISTER_PC^old_pc)&0xff00)
+ if ((REGISTER_PC ^ old_pc) & 0xff00)
CLK(1);
}
else
@@ -467,7 +523,7 @@ void g65816_device::g65816i_set_flag_mx(unsigned value)
{
if (FLAG_M)
{
- if(!(value & FLAGPOS_M))
+ if (!(value & FLAGPOS_M))
{
REGISTER_A |= REGISTER_B;
REGISTER_B = 0;
@@ -476,7 +532,7 @@ void g65816_device::g65816i_set_flag_mx(unsigned value)
}
else
{
- if(value & FLAGPOS_M)
+ if (value & FLAGPOS_M)
{
REGISTER_B = REGISTER_A & 0xff00;
REGISTER_A = MAKE_UINT_8(REGISTER_A);
@@ -485,28 +541,28 @@ void g65816_device::g65816i_set_flag_mx(unsigned value)
}
if (FLAG_X)
{
- if(!(value & FLAGPOS_X))
+ if (!(value & FLAGPOS_X))
{
FLAG_X = XFLAG_CLEAR;
}
}
else
{
- if(value & FLAGPOS_X)
+ if (value & FLAGPOS_X)
{
REGISTER_X = MAKE_UINT_8(REGISTER_X);
REGISTER_Y = MAKE_UINT_8(REGISTER_Y);
FLAG_X = XFLAG_SET;
}
}
- g65816i_set_execution_mode((FLAG_M>>4) | (FLAG_X>>4));
+ g65816i_set_execution_mode((FLAG_M >> 4) | (FLAG_X >> 4));
}
void g65816_device::g65816i_set_flag_e(unsigned value)
{
if (FLAG_E)
{
- if(!value)
+ if (!value)
{
FLAG_E = EFLAG_CLEAR;
g65816i_set_execution_mode(EXECUTION_MODE_M1X1);
@@ -549,7 +605,7 @@ void g65816_device::g65816i_set_flag_i(unsigned value)
/* Get the Processor Status Register */
unsigned g65816_device::g65816i_get_reg_p()
{
- return (FLAG_N&0x80) |
+ return (FLAG_N & 0x80) |
((FLAG_V>>1)&0x40) |
FLAG_M |
FLAG_X |
@@ -628,7 +684,7 @@ void g65816_device::g65816i_interrupt_software(unsigned vector)
else
{
CLK(8);
- g65816i_push_8(REGISTER_PB>>16);
+ g65816i_push_8(REGISTER_PB >> 16);
g65816i_push_16(REGISTER_PC);
g65816i_push_8(g65816i_get_reg_p());
FLAG_D = DFLAG_CLEAR;
@@ -653,7 +709,7 @@ void g65816_device::g65816i_interrupt_nmi()
else
{
CLK(8);
- g65816i_push_8(REGISTER_PB>>16);
+ g65816i_push_8(REGISTER_PB >> 16);
g65816i_push_16(REGISTER_PC);
g65816i_push_8(g65816i_get_reg_p());
FLAG_D = DFLAG_CLEAR;
@@ -686,15 +742,15 @@ unsigned g65816_device::EA_AX() {unsigned tmp = EA_A(); if((tmp^(tmp+REGISTER
unsigned g65816_device::EA_ALX() {return EA_AL() + REGISTER_X;}
unsigned g65816_device::EA_AY() {unsigned tmp = EA_A(); if((tmp^(tmp+REGISTER_Y))&0xff00) CLK(1); return tmp + REGISTER_Y;}
unsigned g65816_device::EA_DI() {return REGISTER_DB | g65816i_read_16_direct(EA_D());}
-unsigned g65816_device::EA_DLI() {return g65816i_read_24_direct(EA_D());}
+unsigned g65816_device::EA_DLI() {return g65816i_read_24_normal(EA_D());}
unsigned g65816_device::EA_AI() {return g65816i_read_16_normal(g65816i_read_16_immediate(EA_IMM16()));}
unsigned g65816_device::EA_ALI() {return g65816i_read_24_normal(EA_A());}
-unsigned g65816_device::EA_DXI() {return REGISTER_DB | g65816i_read_16_direct(EA_DX());}
+unsigned g65816_device::EA_DXI() {return REGISTER_DB | g65816i_read_16_direct_x(EA_DX());}
unsigned g65816_device::EA_DIY() {unsigned tmp = REGISTER_DB | g65816i_read_16_direct(EA_D()); if((tmp^(tmp+REGISTER_Y))&0xff00) CLK(1); return tmp + REGISTER_Y;}
-unsigned g65816_device::EA_DLIY() {return g65816i_read_24_direct(EA_D()) + REGISTER_Y;}
+unsigned g65816_device::EA_DLIY() {return g65816i_read_24_normal(EA_D()) + REGISTER_Y;}
unsigned g65816_device::EA_AXI() {return g65816i_read_16_normal(MAKE_UINT_16(g65816i_read_16_immediate(EA_IMM16()) + REGISTER_X));}
unsigned g65816_device::EA_S() {return MAKE_UINT_16(REGISTER_S + g65816i_read_8_immediate(EA_IMM8()));}
-unsigned g65816_device::EA_SIY() {return MAKE_UINT_16(g65816i_read_16_normal(REGISTER_S + g65816i_read_8_immediate(EA_IMM8())) + REGISTER_Y) | REGISTER_DB;}
+unsigned g65816_device::EA_SIY() {return (g65816i_read_16_normal(REGISTER_S + g65816i_read_8_immediate(EA_IMM8())) | REGISTER_DB) + REGISTER_Y;}
@@ -767,7 +823,7 @@ unsigned g65816_device::g65816_get_pc()
void g65816_device::g65816_set_pc(unsigned val)
{
REGISTER_PC = MAKE_UINT_16(val);
- REGISTER_PB = (val >> 16) & 0xFF;
+ REGISTER_PB = (val >> 16) & 0xff;
g65816_jumping(REGISTER_PB | REGISTER_PC);
}
@@ -787,7 +843,7 @@ void g65816_device::g65816_set_sp(unsigned val)
unsigned g65816_device::g65816_get_reg(int regnum)
{
/* Set the function tables to emulation mode if the FTABLE is nullptr */
- if( FTABLE_GET_REG == nullptr )
+ if (FTABLE_GET_REG == nullptr)
g65816i_set_execution_mode(EXECUTION_MODE_E);
return (this->*FTABLE_GET_REG)(regnum);
@@ -823,7 +879,7 @@ bool g65816_device::get_x_flag() const
void g65816_device::g65816_restore_state()
{
// restore proper function pointers
- g65816i_set_execution_mode((FLAG_M>>4) | (FLAG_X>>4));
+ g65816i_set_execution_mode((FLAG_M >> 4) | (FLAG_X >> 4));
// make sure the memory system can keep up
g65816i_jumping(REGISTER_PB | REGISTER_PC);
@@ -984,14 +1040,14 @@ void g65816_device::state_export(const device_state_entry &entry)
m_debugger_temp = m_db>>16;
break;
case G65816_P:
- m_debugger_temp = (m_flag_n&0x80) |
- ((m_flag_v>>1)&0x40) |
+ m_debugger_temp = (m_flag_n & 0x80) |
+ ((m_flag_v >> 1)&0x40) |
m_flag_m |
m_flag_x |
m_flag_d |
m_flag_i |
- ((!m_flag_z)<<1) |
- ((m_flag_c>>8)&1);
+ ((!m_flag_z) << 1) |
+ ((m_flag_c >> 8) & 1);
break;
case G65816_A:
m_debugger_temp = m_a | m_b;
diff --git a/src/devices/cpu/g65816/g65816.h b/src/devices/cpu/g65816/g65816.h
index d918eba4f29..89924d76751 100644
--- a/src/devices/cpu/g65816/g65816.h
+++ b/src/devices/cpu/g65816/g65816.h
@@ -6,7 +6,6 @@
#pragma once
#include "g65816ds.h"
-#include "g65816cm.h"
/* ======================================================================== */
/* =============================== COPYRIGHT ============================== */
@@ -16,7 +15,6 @@
G65C816 CPU Emulator V0.92
Copyright Karl Stenerud
-All rights reserved.
*/
/* ======================================================================== */
@@ -71,13 +69,12 @@ protected:
g65816_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int cpu_type, address_map_constructor internal);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -157,18 +154,25 @@ protected:
unsigned g65816i_read_16_normal(unsigned address);
unsigned g65816i_read_16_immediate(unsigned address);
unsigned g65816i_read_16_direct(unsigned address);
+ unsigned g65816i_read_16_direct_x(unsigned address);
unsigned g65816i_read_16_vector(unsigned address);
void g65816i_write_16_normal(unsigned address, unsigned value);
void g65816i_write_16_direct(unsigned address, unsigned value);
unsigned g65816i_read_24_normal(unsigned address);
unsigned g65816i_read_24_immediate(unsigned address);
- unsigned g65816i_read_24_direct(unsigned address);
void g65816i_push_8(unsigned value);
unsigned g65816i_pull_8();
void g65816i_push_16(unsigned value);
unsigned g65816i_pull_16();
void g65816i_push_24(unsigned value);
unsigned g65816i_pull_24();
+ void g65816i_push_8_native(unsigned value);
+ unsigned g65816i_pull_8_native();
+ void g65816i_push_16_native(unsigned value);
+ unsigned g65816i_pull_16_native();
+ void g65816i_push_24_native(unsigned value);
+ unsigned g65816i_pull_24_native();
+ void g65816i_update_reg_s();
void g65816i_jump_16(unsigned address);
void g65816i_jump_24(unsigned address);
void g65816i_branch_8(unsigned offset);
@@ -1565,11 +1569,11 @@ public:
void set_5a22_map();
- void _5a22_map(address_map &map);
+ void _5a22_map(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
diff --git a/src/devices/cpu/g65816/g65816cm.h b/src/devices/cpu/g65816/g65816cm.h
index e8ae404ddf3..0d059d32e02 100644
--- a/src/devices/cpu/g65816/g65816cm.h
+++ b/src/devices/cpu/g65816/g65816cm.h
@@ -1,16 +1,22 @@
// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
+#ifndef MAME_CPU_G65816_G65816CM_H
+#define MAME_CPU_G65816_G65816CM_H
+
#pragma once
-#ifndef __G65816CM_H__
-#define __G65816CM_H__
+
+/* ======================================================================== */
+/* ================================ INCLUDES ============================== */
+/* ======================================================================== */
+
+#include <climits>
#define g65816i_branching(A)
#define g65816i_jumping(A)
-#undef G65816_CALL_DEBUGGER
#define G65816_CALL_DEBUGGER(x) debugger_instruction_hook(x)
#define g65816_read_8(addr) m_data.read_byte(addr)
@@ -22,13 +28,6 @@
/* ======================================================================== */
-/* ================================ INCLUDES ============================== */
-/* ======================================================================== */
-
-#include <climits>
-
-
-/* ======================================================================== */
/* ================================ GENERAL =============================== */
/* ======================================================================== */
@@ -242,4 +241,4 @@
/* ======================================================================== */
/* ================================== CPU ================================= */
/* ======================================================================== */
-#endif /* __G65816CM_H__ */
+#endif // MAME_CPU_G65816_G65816CM_H
diff --git a/src/devices/cpu/g65816/g65816ds.cpp b/src/devices/cpu/g65816/g65816ds.cpp
index 4d4f5695b5c..a3d350b9730 100644
--- a/src/devices/cpu/g65816/g65816ds.cpp
+++ b/src/devices/cpu/g65816/g65816ds.cpp
@@ -8,14 +8,39 @@
G65C816 CPU Emulator V0.90
Copyright Karl Stenerud
-All rights reserved.
*/
#include "emu.h"
#include "g65816ds.h"
-g65816_disassembler::g65816_disassembler(config *conf) : m_config(conf)
+enum class g65816_disassembler::op : unsigned
+{
+ ADC, AND, ASL, BCC, BCS, BEQ, BIT, BMI, BNE, BPL, BRA,
+ BRK, BRL, BVC, BVS, CLC, CLD, CLI, CLV, CMP, COP, CPX,
+ CPY, DEA, DEC, DEX, DEY, EOR, INA, INC, INX, INY, JML,
+ JMP, JSL, JSR, LDA, LDX, LDY, LSR, MVN, MVP, NOP, ORA,
+ PEA, PEI, PER, PHA, PHB, PHD, PHK, PHP, PHX, PHY, PLA,
+ PLB, PLD, PLP, PLX, PLY, REP, ROL, ROR, RTI, RTL, RTS,
+ SBC, SEC, SED, SEI, SEP, STA, STP, STX, STY, STZ, TAX,
+ TAY, TCS, TCD, TDC, TRB, TSB, TSC, TSX, TXA, TXS, TXY,
+ TYA, TYX, WAI, WDM, XBA, XCE
+};
+
+class g65816_disassembler::opcode_struct {
+ public:
+ op m_name;
+ u8 flag;
+ u8 ea;
+
+ opcode_struct(op n, u8 f, u8 e);
+ const char *name() const;
+ bool is_call() const;
+ bool is_return() const;
+ bool is_cond() const;
+ };
+
+g65816_disassembler::g65816_disassembler(const config *conf) : m_config(conf)
{
}
diff --git a/src/devices/cpu/g65816/g65816ds.h b/src/devices/cpu/g65816/g65816ds.h
index fae05d12d86..11ba4b04b2a 100644
--- a/src/devices/cpu/g65816/g65816ds.h
+++ b/src/devices/cpu/g65816/g65816ds.h
@@ -1,9 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
+#ifndef MAME_CPU_G65816_G65816DS_H
+#define MAME_CPU_G65816_G65816DS_H
+
#pragma once
-#ifndef __G65816DS_H__
-#define __G65816DS_H__
/* ======================================================================== */
/* =============================== COPYRIGHT ============================== */
/* ======================================================================== */
@@ -12,7 +13,6 @@
G65C816 CPU Emulator V0.92
Copyright Karl Stenerud
-All rights reserved.
*/
@@ -25,13 +25,14 @@ class g65816_disassembler : public util::disasm_interface
{
public:
class config {
+ protected:
+ ~config() = default;
public:
- virtual ~config() = default;
virtual bool get_m_flag() const = 0;
virtual bool get_x_flag() const = 0;
};
- g65816_disassembler(config *conf);
+ g65816_disassembler(const config *conf);
virtual u32 opcode_alignment() const override;
virtual u32 interface_flags() const override;
@@ -39,18 +40,7 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum class op : unsigned
- {
- ADC , AND , ASL , BCC , BCS , BEQ , BIT , BMI , BNE , BPL , BRA ,
- BRK , BRL , BVC , BVS , CLC , CLD , CLI , CLV , CMP , COP , CPX ,
- CPY , DEA , DEC , DEX , DEY , EOR , INA , INC , INX , INY , JML ,
- JMP , JSL , JSR , LDA , LDX , LDY , LSR , MVN , MVP , NOP , ORA ,
- PEA , PEI , PER , PHA , PHB , PHD , PHK , PHP , PHX , PHY , PLA ,
- PLB , PLD , PLP , PLX , PLY , REP , ROL , ROR , RTI , RTL , RTS ,
- SBC , SEC , SED , SEI , SEP , STA , STP , STX , STY , STZ , TAX ,
- TAY , TCS , TCD , TDC , TRB , TSB , TSC , TSX , TXA , TXS , TXY ,
- TYA , TYX , WAI , WDM , XBA , XCE
- };
+ enum class op : unsigned;
enum
{
@@ -66,26 +56,15 @@ private:
X /* check x bit */
};
- class opcode_struct {
- public:
- op m_name;
- u8 flag;
- u8 ea;
-
- opcode_struct(op n, u8 f, u8 e);
- const char *name() const;
- bool is_call() const;
- bool is_return() const;
- bool is_cond() const;
- };
+ class opcode_struct;
static const char *const s_opnames[];
static const opcode_struct s_opcodes[256];
- config *m_config;
+ const config *m_config;
std::string int_8_str(u8 val);
std::string int_16_str(u16 val);
};
-#endif /* __G65816DS_H__ */
+#endif // MAME_CPU_G65816_G65816DS_H
diff --git a/src/devices/cpu/g65816/g65816o0.cpp b/src/devices/cpu/g65816/g65816o0.cpp
index 82f2cd5a479..8e3c9b350a7 100644
--- a/src/devices/cpu/g65816/g65816o0.cpp
+++ b/src/devices/cpu/g65816/g65816o0.cpp
@@ -4,4 +4,4 @@
#include "g65816.h"
#include "g65816cm.h"
#define EXECUTION_MODE EXECUTION_MODE_M0X0
-#include "g65816op.h"
+#include "g65816op.ipp"
diff --git a/src/devices/cpu/g65816/g65816o1.cpp b/src/devices/cpu/g65816/g65816o1.cpp
index f919432de40..d227f8995ef 100644
--- a/src/devices/cpu/g65816/g65816o1.cpp
+++ b/src/devices/cpu/g65816/g65816o1.cpp
@@ -4,4 +4,4 @@
#include "g65816.h"
#include "g65816cm.h"
#define EXECUTION_MODE EXECUTION_MODE_M0X1
-#include "g65816op.h"
+#include "g65816op.ipp"
diff --git a/src/devices/cpu/g65816/g65816o2.cpp b/src/devices/cpu/g65816/g65816o2.cpp
index 1ad417a90f9..62e21d32cf2 100644
--- a/src/devices/cpu/g65816/g65816o2.cpp
+++ b/src/devices/cpu/g65816/g65816o2.cpp
@@ -4,4 +4,4 @@
#include "g65816.h"
#include "g65816cm.h"
#define EXECUTION_MODE EXECUTION_MODE_M1X0
-#include "g65816op.h"
+#include "g65816op.ipp"
diff --git a/src/devices/cpu/g65816/g65816o3.cpp b/src/devices/cpu/g65816/g65816o3.cpp
index 7b015646eb4..466e841a9ca 100644
--- a/src/devices/cpu/g65816/g65816o3.cpp
+++ b/src/devices/cpu/g65816/g65816o3.cpp
@@ -4,4 +4,4 @@
#include "g65816.h"
#include "g65816cm.h"
#define EXECUTION_MODE EXECUTION_MODE_M1X1
-#include "g65816op.h"
+#include "g65816op.ipp"
diff --git a/src/devices/cpu/g65816/g65816o4.cpp b/src/devices/cpu/g65816/g65816o4.cpp
index 9f244be53ca..d1a12c967c0 100644
--- a/src/devices/cpu/g65816/g65816o4.cpp
+++ b/src/devices/cpu/g65816/g65816o4.cpp
@@ -4,4 +4,4 @@
#include "g65816.h"
#include "g65816cm.h"
#define EXECUTION_MODE EXECUTION_MODE_E
-#include "g65816op.h"
+#include "g65816op.ipp"
diff --git a/src/devices/cpu/g65816/g65816op.h b/src/devices/cpu/g65816/g65816op.ipp
index 79de3ae4950..c4bbc4629bc 100644
--- a/src/devices/cpu/g65816/g65816op.h
+++ b/src/devices/cpu/g65816/g65816op.ipp
@@ -101,11 +101,11 @@
#define read_24_NORM(A) g65816i_read_24_normal(A)
#define read_24_IMM(A) g65816i_read_24_immediate(A)
-#define read_24_D(A) g65816i_read_24_direct(A)
+#define read_24_D(A) g65816i_read_24_normal(A)
#define read_24_A(A) g65816i_read_24_normal(A)
#define read_24_AL(A) g65816i_read_24_normal(A)
-#define read_24_DX(A) g65816i_read_24_direct(A)
-#define read_24_DY(A) g65816i_read_24_direct(A)
+#define read_24_DX(A) g65816i_read_24_normal(A)
+#define read_24_DY(A) g65816i_read_24_normal(A)
#define read_24_AX(A) g65816i_read_24_normal(A)
#define read_24_ALX(A) g65816i_read_24_normal(A)
#define read_24_AY(A) g65816i_read_24_normal(A)
@@ -588,8 +588,9 @@
#define OP_JSL(MODE) \
CLK(CLK_OP + CLK_W24 + CLK_##MODE + 1); \
DST = EA_##MODE(); \
- g65816i_push_8(REGISTER_PB>>16); \
- g65816i_push_16(REGISTER_PC-1); \
+ g65816i_push_8_native(REGISTER_PB>>16); \
+ g65816i_push_16_native(REGISTER_PC-1); \
+ g65816i_update_reg_s(); \
g65816i_jump_24(DST)
/* M6502 Jump to Subroutine */
@@ -601,13 +602,14 @@
g65816i_push_16(REGISTER_PC-1); \
g65816i_jump_16(DST)
-/* M6502 Jump to Subroutine */
+/* G65816 Jump to Subroutine */
/* Unusual behavior: stacks PC-1 */
#undef OP_JSRAXI
#define OP_JSRAXI() \
CLK(8); \
DST = read_16_AXI(REGISTER_PB | (MAKE_UINT_16(OPER_16_IMM() + REGISTER_X))); \
- g65816i_push_16(REGISTER_PC-1); \
+ g65816i_push_16_native(REGISTER_PC-1); \
+ g65816i_update_reg_s(); \
g65816i_jump_16(DST)
/* M6502 Load accumulator with operand */
@@ -868,20 +870,23 @@
#undef OP_PEA
#define OP_PEA() \
CLK(CLK_OP + CLK_R16 + CLK_W16); \
- g65816i_push_16(OPER_16_IMM())
+ g65816i_push_16_native(OPER_16_IMM()); \
+ g65816i_update_reg_s()
/* G65816 Push Effective Indirect Address */
#undef OP_PEI
#define OP_PEI() \
CLK(CLK_OP + CLK_R16 + CLK_W16 + CLK_D); \
- g65816i_push_16(EA_DI())
+ g65816i_push_16_native(REGISTER_DB | g65816i_read_16_normal(EA_D())); \
+ g65816i_update_reg_s()
/* G65816 Push Effective PC-Relative Address */
#undef OP_PER
#define OP_PER() \
CLK(CLK_OP + CLK_R16 + CLK_W16 + 1); \
SRC = OPER_16_IMM(); \
- g65816i_push_16(REGISTER_PC + SRC)
+ g65816i_push_16_native(REGISTER_PC + SRC); \
+ g65816i_update_reg_s()
/* M6502 Push accumulator to the stack */
#undef OP_PHA
@@ -917,7 +922,8 @@
#undef OP_PHD
#define OP_PHD() \
CLK(CLK_OP + CLK_W16 + 1); \
- g65816i_push_16(REGISTER_D)
+ g65816i_push_16_native(REGISTER_D); \
+ g65816i_update_reg_s()
/* G65816 Push program bank register */
#undef OP_PHK
@@ -961,14 +967,16 @@
#undef OP_PLB
#define OP_PLB() \
CLK(CLK_OP + CLK_R8 + 2); \
- FLAG_N = FLAG_Z = g65816i_pull_8(); \
+ FLAG_N = FLAG_Z = g65816i_pull_8_native(); \
+ g65816i_update_reg_s(); \
REGISTER_DB = FLAG_Z << 16
/* G65816 Pull direct register */
#undef OP_PLD
#define OP_PLD() \
CLK(CLK_OP + CLK_R16 + 2); \
- FLAG_Z = REGISTER_D = g65816i_pull_16(); \
+ FLAG_Z = REGISTER_D = g65816i_pull_16_native(); \
+ g65816i_update_reg_s(); \
FLAG_N = NFLAG_16(FLAG_Z)
/* M6502 Pull the Processor Status Register from the stack */
@@ -1077,7 +1085,8 @@
#undef OP_RTL
#define OP_RTL() \
CLK(6); \
- g65816i_jump_24(g65816i_pull_24())
+ g65816i_jump_24(g65816i_pull_24_native()); \
+ g65816i_update_reg_s()
/* M6502 Return from Subroutine */
/* Unusual behavior: Gets PC and increments */
@@ -1931,7 +1940,9 @@ TABLE_FUNCTION(int, execute, (int clocks))
// do a check here also in case we're in STOP_WAI mode - this'll clear it when the IRQ happens
g65816i_check_maskable_interrupt();
- if (!CPU_STOPPED)
+ if (CPU_STOPPED)
+ debugger_wait_hook();
+ else
{
CLOCKS = clocks;
do
diff --git a/src/devices/cpu/gigatron/gigatron.h b/src/devices/cpu/gigatron/gigatron.h
index b224b4ab280..af516640240 100644
--- a/src/devices/cpu/gigatron/gigatron.h
+++ b/src/devices/cpu/gigatron/gigatron.h
@@ -11,8 +11,8 @@
*
*****************************************************************************/
-#ifndef MAME_CPU_GTRON_H
-#define MAME_CPU_GTRON_H
+#ifndef MAME_CPU_GIGATRON_GIGATRON_H
+#define MAME_CPU_GIGATRON_GIGATRON_H
#pragma once
@@ -34,24 +34,23 @@ public:
auto ir_cb() { return m_ir_cb.bind(); }
protected:
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
void reset_cpu();
@@ -93,7 +92,4 @@ private:
DECLARE_DEVICE_TYPE(GTRON, gigatron_cpu_device)
-
-
-#endif // MAME_CPU_GTRON_H
-
+#endif // MAME_CPU_GIGATRON_GIGATRON_H
diff --git a/src/devices/cpu/h16/hd641016.h b/src/devices/cpu/h16/hd641016.h
index 1c93f5a2ff3..bc73b3f68f7 100644
--- a/src/devices/cpu/h16/hd641016.h
+++ b/src/devices/cpu/h16/hd641016.h
@@ -89,8 +89,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
@@ -110,8 +110,8 @@ private:
u8 global_bank_mask() const { return BIT(m_bmr, 4) ? 7 : (2 << (m_bmr & 3)) - 1; }
// internal maps
- void ram_map(address_map &map);
- void io_map(address_map &map);
+ void ram_map(address_map &map) ATTR_COLD;
+ void io_map(address_map &map) ATTR_COLD;
// address spaces
address_space_config m_program_config;
diff --git a/src/devices/cpu/h6280/h6280.cpp b/src/devices/cpu/h6280/h6280.cpp
index 7bb01c3f6d5..1261de78a78 100644
--- a/src/devices/cpu/h6280/h6280.cpp
+++ b/src/devices/cpu/h6280/h6280.cpp
@@ -169,7 +169,7 @@ DEFINE_DEVICE_TYPE(H6280, h6280_device, "h6280", "Hudson Soft HuC6280")
h6280_device::h6280_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, H6280, tag, owner, clock)
- , device_mixer_interface(mconfig, *this, 2)
+ , device_mixer_interface(mconfig, *this)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 21, 0, 16, 0, address_map_constructor(FUNC(h6280_device::internal_map), this))
, m_io_config("io", ENDIANNESS_LITTLE, 8, 2)
, m_port_in_cb(*this, 0)
@@ -232,8 +232,8 @@ const h6280_device::ophandler h6280_device::s_opcodetable[256] =
void h6280_device::device_add_mconfig(machine_config &config)
{
C6280(config, m_psg, DERIVED_CLOCK(1,2));
- m_psg->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0);
- m_psg->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1);
+ m_psg->add_route(0, *this, 1.0, 0);
+ m_psg->add_route(1, *this, 1.0, 1);
}
void h6280_device::device_start()
@@ -2270,17 +2270,6 @@ uint32_t h6280_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t h6280_device::execute_input_lines() const noexcept
-{
- return 4;
-}
-
-
-//-------------------------------------------------
// execute_input_edge_triggered - return true if
// the input line has an asynchronous edge trigger
//-------------------------------------------------
diff --git a/src/devices/cpu/h6280/h6280.h b/src/devices/cpu/h6280/h6280.h
index fb46ec5e4c6..f1b327b47b8 100644
--- a/src/devices/cpu/h6280/h6280.h
+++ b/src/devices/cpu/h6280/h6280.h
@@ -75,15 +75,14 @@ protected:
};
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -356,7 +355,7 @@ protected:
uint8_t m_io_buffer; /* last value written to the PSG, timer, and interrupt pages */
// internal registers
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
uint8_t irq_status_r(offs_t offset);
void irq_status_w(offs_t offset, uint8_t data);
diff --git a/src/devices/cpu/h8/c77.cpp b/src/devices/cpu/h8/c77.cpp
new file mode 100644
index 00000000000..2acf360ca73
--- /dev/null
+++ b/src/devices/cpu/h8/c77.cpp
@@ -0,0 +1,216 @@
+// license:BSD-3-Clause
+// copyright-holders:smf, Olivier Galibert
+/***************************************************************************
+
+ Namco C77
+
+ Similar to H8337, but some onboard peripherals and vectors were moved.
+
+ Only the peripherals used in Cyber Lead I/O boards have been mapped.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "c77.h"
+
+DEFINE_DEVICE_TYPE(NAMCO_C77, namco_c77_device, "namco_c77", "Namco C77")
+
+namco_c77_device::namco_c77_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+ h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(namco_c77_device::map), this)),
+ m_intc(*this, "intc"),
+ m_port1(*this, "port1"),
+ m_port2(*this, "port2"),
+ m_port3(*this, "port3"),
+ m_port4(*this, "port4"),
+ m_port5(*this, "port5"),
+ m_port6(*this, "port6"),
+ m_port7(*this, "port7"),
+ m_port8(*this, "port8"),
+ m_port9(*this, "port9"),
+ m_timer8_0(*this, "timer8_0"),
+ //m_timer8_1(*this, "timer8_1"),
+ m_syscr(0),
+ m_ram_start(start)
+{
+}
+
+namco_c77_device::namco_c77_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ namco_c77_device(mconfig, NAMCO_C77, tag, owner, clock, 0xf780)
+{
+}
+
+void namco_c77_device::device_add_mconfig(machine_config &config)
+{
+ H8_INTC(config, m_intc, *this);
+ //H8_ADC_3337(config, m_adc, *this, m_intc, 35);
+ H8_PORT(config, m_port1, *this, h8_device::PORT_1, 0x00, 0x00);
+ H8_PORT(config, m_port2, *this, h8_device::PORT_2, 0x00, 0x00);
+ H8_PORT(config, m_port3, *this, h8_device::PORT_3, 0x00, 0x00);
+ H8_PORT(config, m_port4, *this, h8_device::PORT_4, 0x00, 0x00);
+ H8_PORT(config, m_port5, *this, h8_device::PORT_5, 0xf8, 0xf8);
+ H8_PORT(config, m_port6, *this, h8_device::PORT_6, 0x00, 0x00);
+ H8_PORT(config, m_port7, *this, h8_device::PORT_7, 0x00, 0x00);
+ H8_PORT(config, m_port8, *this, h8_device::PORT_8, 0x80, 0x80);
+ H8_PORT(config, m_port9, *this, h8_device::PORT_9, 0x00, 0x00);
+ H8_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 23, 24, 25, 8, 2, 64, 32, 1024, 256);
+ //H8_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 26, 27, 28, 8, 2, 64, 128, 1024, 2048);
+ H8_SCI(config, m_sci[0], 0, *this, m_intc, 29, 30, 31, 32);
+ H8_SCI(config, m_sci[1], 1, *this, m_intc, 33, 34, 35, 36);
+}
+
+void namco_c77_device::device_start()
+{
+ h8_device::device_start();
+
+ save_item(NAME(m_syscr));
+}
+
+void namco_c77_device::device_reset()
+{
+ h8_device::device_reset();
+
+ m_syscr = 0x09;
+}
+
+void namco_c77_device::execute_set_input(int inputnum, int state)
+{
+ m_intc->set_input(inputnum, state);
+}
+
+void namco_c77_device::irq_setup()
+{
+ m_CCR |= F_I;
+}
+
+void namco_c77_device::update_irq_filter()
+{
+ if(m_CCR & F_I)
+ m_intc->set_filter(2, -1);
+ else
+ m_intc->set_filter(0, -1);
+}
+
+void namco_c77_device::interrupt_taken()
+{
+ standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
+}
+
+void namco_c77_device::internal_update(uint64_t current_time)
+{
+ uint64_t event_time = 0;
+
+ add_event(event_time, m_sci[0]->internal_update(current_time));
+ add_event(event_time, m_sci[1]->internal_update(current_time));
+ add_event(event_time, m_timer8_0->internal_update(current_time));
+ //add_event(event_time, m_timer8_1->internal_update(current_time));
+
+ recompute_bcount(event_time);
+}
+
+void namco_c77_device::notify_standby(int state)
+{
+ //m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ //m_timer8_1->notify_standby(state);
+}
+
+void namco_c77_device::map(address_map &map)
+{
+ map(m_ram_start, 0xff7f).ram();
+
+ //map(0xffac, 0xffac).rw(m_port1, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ //map(0xffad, 0xffad).rw(m_port2, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ //map(0xffae, 0xffae).rw(m_port3, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffb0, 0xffb0).w(m_port1, FUNC(h8_port_device::ddr_w));
+ map(0xffb1, 0xffb1).w(m_port2, FUNC(h8_port_device::ddr_w));
+ map(0xffb2, 0xffb2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb3, 0xffb3).rw(m_port2, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb4, 0xffb4).w(m_port3, FUNC(h8_port_device::ddr_w));
+ map(0xffb5, 0xffb5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(0xffb6, 0xffb6).rw(m_port3, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb7, 0xffb7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb8, 0xffb8).w(m_port5, FUNC(h8_port_device::ddr_w));
+ map(0xffb9, 0xffb9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(0xffba, 0xffba).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbb, 0xffbb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbc, 0xffbc).w(m_port7, FUNC(h8_port_device::ddr_w));
+ map(0xffbd, 0xffbd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(0xffbe, 0xffbe).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbf, 0xffbf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffc0, 0xffc0).w(m_port9, FUNC(h8_port_device::ddr_w));
+ map(0xffc1, 0xffc1).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffc2, 0xffc2).rw(FUNC(namco_c77_device::wscr_r), FUNC(namco_c77_device::wscr_w));
+ map(0xffc3, 0xffc3).rw(FUNC(namco_c77_device::stcr_r), FUNC(namco_c77_device::stcr_w));
+ map(0xffc4, 0xffc4).rw(FUNC(namco_c77_device::syscr_r), FUNC(namco_c77_device::syscr_w));
+ map(0xffc5, 0xffc5).rw(FUNC(namco_c77_device::mdcr_r), FUNC(namco_c77_device::mdcr_w));
+ map(0xffc6, 0xffc6).rw(m_intc, FUNC(h8_intc_device::iscr_r), FUNC(h8_intc_device::iscr_w));
+ map(0xffc7, 0xffc7).rw(m_intc, FUNC(h8_intc_device::ier_r), FUNC(h8_intc_device::ier_w));
+ map(0xffc8, 0xffc8).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffc9, 0xffc9).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffca, 0xffcb).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xffcc, 0xffcc).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ //map(0xffd0, 0xffd0).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ //map(0xffd1, 0xffd1).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ //map(0xffd2, 0xffd3).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ //map(0xffd4, 0xffd4).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ map(0xffd8, 0xffd8).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffd9, 0xffd9).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffda, 0xffda).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffdb, 0xffdb).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffdc, 0xffdc).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffdd, 0xffdd).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
+ map(0xffe0, 0xffe0).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffe1, 0xffe1).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffe2, 0xffe2).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffe3, 0xffe3).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffe4, 0xffe4).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffe5, 0xffe5).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
+
+ //map(0xfff1, 0xfff1) // kmimr? Cyber Lead LED board writes 0xbf here
+ //map(0xfff2, 0xfff2).rw(m_port6, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+}
+
+uint8_t namco_c77_device::wscr_r()
+{
+ return 0x00;
+}
+
+void namco_c77_device::wscr_w(uint8_t data)
+{
+ logerror("wscr = %02x\n", data);
+}
+
+uint8_t namco_c77_device::stcr_r()
+{
+ return 0x00;
+}
+
+void namco_c77_device::stcr_w(uint8_t data)
+{
+ logerror("stcr = %02x\n", data);
+ m_timer8_0->set_extra_clock_bit(data & 0x01);
+ //m_timer8_1->set_extra_clock_bit(data & 0x02);
+}
+
+uint8_t namco_c77_device::syscr_r()
+{
+ return m_syscr;
+}
+
+void namco_c77_device::syscr_w(uint8_t data)
+{
+ m_syscr = data;
+ logerror("syscr = %02x\n", data);
+}
+
+uint8_t namco_c77_device::mdcr_r()
+{
+ return 0x00;
+}
+
+void namco_c77_device::mdcr_w(uint8_t data)
+{
+ logerror("mdcr = %02x\n", data);
+}
diff --git a/src/devices/cpu/h8/c77.h b/src/devices/cpu/h8/c77.h
new file mode 100644
index 00000000000..6c23c5b5c59
--- /dev/null
+++ b/src/devices/cpu/h8/c77.h
@@ -0,0 +1,95 @@
+// license:BSD-3-Clause
+// copyright-holders:smf, Olivier Galibert
+/***************************************************************************
+
+ Namco C77
+
+ Custom H8 used on Cyberlead cabinet I/O boards
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_C77_H
+#define MAME_CPU_H8_C77_H
+
+#pragma once
+
+#include "h8.h"
+#include "h8_intc.h"
+//#include "h8_adc.h"
+#include "h8_port.h"
+#include "h8_timer8.h"
+#include "h8_sci.h"
+
+class namco_c77_device :
+ public h8_device
+{
+public:
+ namco_c77_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto read_port1() { return m_read_port [PORT_1].bind(); }
+ auto write_port1() { return m_write_port[PORT_1].bind(); }
+ auto read_port2() { return m_read_port [PORT_2].bind(); }
+ auto write_port2() { return m_write_port[PORT_2].bind(); }
+ auto read_port3() { return m_read_port [PORT_3].bind(); }
+ auto write_port3() { return m_write_port[PORT_3].bind(); }
+ auto read_port4() { return m_read_port [PORT_4].bind(); }
+ auto write_port4() { return m_write_port[PORT_4].bind(); }
+ auto read_port5() { return m_read_port [PORT_5].bind(); }
+ auto write_port5() { return m_write_port[PORT_5].bind(); }
+ auto read_port6() { return m_read_port [PORT_6].bind(); }
+ auto write_port6() { return m_write_port[PORT_6].bind(); }
+ auto read_port7() { return m_read_port [PORT_7].bind(); }
+ auto read_port8() { return m_read_port [PORT_8].bind(); }
+ auto write_port8() { return m_write_port[PORT_8].bind(); }
+ auto read_port9() { return m_read_port [PORT_9].bind(); }
+ auto write_port9() { return m_write_port[PORT_9].bind(); }
+
+ uint8_t wscr_r();
+ void wscr_w(uint8_t data);
+ uint8_t stcr_r();
+ void stcr_w(uint8_t data);
+ uint8_t syscr_r();
+ void syscr_w(uint8_t data);
+ uint8_t mdcr_r();
+ void mdcr_w(uint8_t data);
+
+protected:
+ namco_c77_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+
+ // device_t
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override;
+
+ // device_execute_interface
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ // h8_device
+ virtual void irq_setup() override;
+ virtual void update_irq_filter() override;
+ virtual void interrupt_taken() override;
+ virtual void internal_update(uint64_t current_time) override;
+ virtual void notify_standby(int state) override;
+
+ void map(address_map &map) ATTR_COLD;
+
+ required_device<h8_intc_device> m_intc;
+ required_device<h8_port_device> m_port1;
+ required_device<h8_port_device> m_port2;
+ required_device<h8_port_device> m_port3;
+ required_device<h8_port_device> m_port4;
+ required_device<h8_port_device> m_port5;
+ required_device<h8_port_device> m_port6;
+ required_device<h8_port_device> m_port7;
+ required_device<h8_port_device> m_port8;
+ required_device<h8_port_device> m_port9;
+ required_device<h8_timer8_channel_device> m_timer8_0;
+ //required_device<h8_timer8_channel_device> m_timer8_1;
+
+ uint8_t m_syscr;
+ uint32_t m_ram_start;
+};
+
+DECLARE_DEVICE_TYPE(NAMCO_C77, namco_c77_device)
+
+#endif // MAME_CPU_H8_C77_H
diff --git a/src/devices/cpu/h8/gt913.cpp b/src/devices/cpu/h8/gt913.cpp
index dd7cf15df8d..620f82173a4 100644
--- a/src/devices/cpu/h8/gt913.cpp
+++ b/src/devices/cpu/h8/gt913.cpp
@@ -1,6 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Devin Acker
/***************************************************************************
+
Casio GT913 (uPD913)
This chip powers several late-90s/early-2000s Casio keyboards.
@@ -25,11 +26,12 @@
DEFINE_DEVICE_TYPE(GT913, gt913_device, "gt913", "Casio GT913F")
-gt913_device::gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+gt913_device::gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_device(mconfig, GT913, tag, owner, clock, address_map_constructor(FUNC(gt913_device::map), this)),
- device_mixer_interface(mconfig, *this, 2),
+ device_mixer_interface(mconfig, *this),
m_rom(*this, DEVICE_SELF),
m_data_config("data", ENDIANNESS_BIG, 16, 22, 0),
+ m_write_ple(*this),
m_intc(*this, "intc"),
m_sound(*this, "gt_sound"),
m_kbd(*this, "kbd"),
@@ -53,7 +55,7 @@ void gt913_device::map(address_map &map)
/* ctk530 writes here to latch LED matrix data, which generates an active high strobe on pin 99 (PLE/P16)
there's otherwise no external address decoding (or the usual read/write strobes) used for the LED latches.
just treat as a 16-bit write-only port for now */
- map(0xe000, 0xe001).lw16(NAME([this](uint16_t data) { do_write_port(h8_device::PORT_4, data); }));
+ map(0xe000, 0xe001).lw16(NAME([this](u16 data) { m_write_ple(data); }));
map(0xfac0, 0xffbf).ram();
@@ -87,7 +89,7 @@ void gt913_device::map(address_map &map)
map(0xfff0, 0xfff0).rw(m_port[0], FUNC(h8_port_device::ddr_r), FUNC(h8_port_device::ddr_w));
// port 2 DDR - ctk601 and gz70sp both seem to use only bit 0 to indicate either all inputs or all outputs
// map(0xfff1, 0xfff1).rw(m_port[1], FUNC(h8_port_device::ddr_r), FUNC(h8_port_device::ddr_w));
- map(0xfff1, 0xfff1).lw8(NAME([this](uint8_t data) { m_port[1]->ddr_w(BIT(data, 0) ? 0xff : 0x00); }));
+ map(0xfff1, 0xfff1).lw8(NAME([this](u8 data) { m_port[1]->ddr_w(BIT(data, 0) ? 0xff : 0x00); }));
map(0xfff2, 0xfff2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xfff3, 0xfff3).rw(m_port[1], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xfff4, 0xfff4).rw(m_port[2], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
@@ -100,8 +102,8 @@ void gt913_device::device_add_mconfig(machine_config &config)
GT913_SOUND(config, m_sound, DERIVED_CLOCK(1, 1));
m_sound->set_device_rom_tag(m_rom);
- m_sound->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0);
- m_sound->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1);
+ m_sound->add_route(0, *this, 1.0, 0);
+ m_sound->add_route(1, *this, 1.0, 1);
GT913_KBD_HLE(config, m_kbd, 0);
m_kbd->irq_cb().set([this] (int val) {
@@ -120,7 +122,7 @@ void gt913_device::device_add_mconfig(machine_config &config)
}
-void gt913_device::uart_rate_w(uint8_t data)
+void gt913_device::uart_rate_w(u8 data)
{
// TODO: how is SCI1 baud rate actually selected?
// gz70sp writes 0x7e to ffe4 to select 31250 baud for MIDI, which doesn't seem right
@@ -128,7 +130,7 @@ void gt913_device::uart_rate_w(uint8_t data)
m_sci[1]->brr_w(data >> 2);
}
-void gt913_device::uart_control_w(offs_t offset, uint8_t data)
+void gt913_device::uart_control_w(offs_t offset, u8 data)
{
const unsigned num = BIT(offset, 2);
/*
@@ -139,37 +141,36 @@ void gt913_device::uart_control_w(offs_t offset, uint8_t data)
m_sci[num]->scr_w((data & 0x0f) << 4);
}
-uint8_t gt913_device::uart_control_r(offs_t offset)
+u8 gt913_device::uart_control_r(offs_t offset)
{
const unsigned num = BIT(offset, 2);
return (m_sci[num]->ssr_r() & 0xf0) | (m_sci[num]->scr_r() >> 4);
}
-void gt913_device::syscr_w(uint8_t data)
+void gt913_device::syscr_w(u8 data)
{
- if(BIT(m_syscr ^ data, 2))
- // NMI active edge has changed
- m_intc->set_input(INPUT_LINE_NMI, CLEAR_LINE);
+ // NMI active edge
+ m_intc->set_nmi_edge(BIT(data, 2));
m_syscr = data;
}
-uint8_t gt913_device::syscr_r()
+u8 gt913_device::syscr_r()
{
return m_syscr;
}
-void gt913_device::data_w(offs_t offset, uint8_t data)
+void gt913_device::data_w(offs_t offset, u8 data)
{
m_data.write_byte(offset | (m_banknum & 0xff) << 14, data);
}
-uint8_t gt913_device::data_r(offs_t offset)
+u8 gt913_device::data_r(offs_t offset)
{
return m_data.read_byte(offset | (m_banknum & 0xff) << 14);
}
-uint8_t gt913_device::read8ib(uint32_t adr)
+u8 gt913_device::read8ib(u32 adr)
{
if(BIT(m_syscr, 0))
// indirect bank disabled
@@ -182,7 +183,7 @@ uint8_t gt913_device::read8ib(uint32_t adr)
return m_data.read_byte(adr | ((m_banknum & 0x3f) << 16));
}
-void gt913_device::write8ib(uint32_t adr, uint8_t data)
+void gt913_device::write8ib(u32 adr, u8 data)
{
if(BIT(m_syscr, 0))
// indirect bank disabled
@@ -195,7 +196,7 @@ void gt913_device::write8ib(uint32_t adr, uint8_t data)
m_data.write_byte(adr | ((m_banknum & 0x3f) << 16), data);
}
-uint16_t gt913_device::read16ib(uint32_t adr)
+u16 gt913_device::read16ib(u32 adr)
{
adr &= ~1;
@@ -210,7 +211,7 @@ uint16_t gt913_device::read16ib(uint32_t adr)
return m_data.read_word(adr | ((m_banknum & 0x3f) << 16));
}
-void gt913_device::write16ib(uint32_t adr, uint16_t data)
+void gt913_device::write16ib(u32 adr, u16 data)
{
adr &= ~1;
@@ -243,9 +244,9 @@ void gt913_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void gt913_device::internal_update(uint64_t current_time)
+void gt913_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
@@ -253,13 +254,14 @@ void gt913_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
-void gt913_device::execute_set_input(int inputnum, int state)
+void gt913_device::notify_standby(int state)
{
- if(inputnum == INPUT_LINE_NMI) {
- if(BIT(m_syscr, 2))
- state ^= ASSERT_LINE;
- }
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+}
+void gt913_device::execute_set_input(int inputnum, int state)
+{
m_intc->set_input(inputnum, state);
}
diff --git a/src/devices/cpu/h8/gt913.h b/src/devices/cpu/h8/gt913.h
index 30151a785c4..35fba6e4901 100644
--- a/src/devices/cpu/h8/gt913.h
+++ b/src/devices/cpu/h8/gt913.h
@@ -23,7 +23,7 @@
class gt913_device : public h8_device, public device_mixer_interface {
public:
- gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ gt913_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -33,39 +33,39 @@ public:
auto write_port2() { return m_write_port[PORT_2].bind(); }
auto read_port3() { return m_read_port [PORT_3].bind(); }
auto write_port3() { return m_write_port[PORT_3].bind(); }
- auto read_port4() { return m_read_port [PORT_4].bind(); }
- auto write_port4() { return m_write_port[PORT_4].bind(); }
+ auto write_ple() { return m_write_ple.bind(); }
- void uart_rate_w(uint8_t data);
- void uart_control_w(offs_t offset, uint8_t data);
- uint8_t uart_control_r(offs_t offset);
+ void uart_rate_w(u8 data);
+ void uart_control_w(offs_t offset, u8 data);
+ u8 uart_control_r(offs_t offset);
- void data_w(offs_t offset, uint8_t data);
- uint8_t data_r(offs_t offset);
+ void data_w(offs_t offset, u8 data);
+ u8 data_r(offs_t offset);
- void syscr_w(uint8_t data);
- uint8_t syscr_r();
+ void syscr_w(u8 data);
+ u8 syscr_r();
protected:
/* indirect reads/writes with banking support */
- uint8_t read8ib(uint32_t adr);
- void write8ib(uint32_t adr, uint8_t data);
- uint16_t read16ib(uint32_t adr);
- void write16ib(uint32_t adr, uint16_t data);
+ u8 read8ib(u32 adr);
+ void write8ib(u32 adr, u8 data);
+ u16 read16ib(u32 adr);
+ void write16ib(u32 adr, u16 data);
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
- virtual void internal_update(uint64_t current_time) override;
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
virtual void irq_setup() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual space_config_vector memory_space_config() const override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
@@ -90,8 +90,9 @@ protected:
address_space_config m_data_config;
memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_data;
- uint16_t m_banknum;
- uint8_t m_syscr;
+ devcb_write16 m_write_ple;
+ u16 m_banknum;
+ u8 m_syscr;
required_device<gt913_intc_device> m_intc;
diff --git a/src/devices/cpu/h8/gt913.lst b/src/devices/cpu/h8/gt913.lst
index 6587d86babc..12d26888462 100644
--- a/src/devices/cpu/h8/gt913.lst
+++ b/src/devices/cpu/h8/gt913.lst
@@ -186,7 +186,7 @@ macro prefetch_noirq
6e00 ff80 0 mov.b r16d16h r8l g
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]);
internal(1);
m_TMP2 = read8ib(m_TMP1);
set_nzv8(m_TMP2);
@@ -195,7 +195,7 @@ macro prefetch_noirq
6f00 ff80 0 mov.w r16d16h r16l g
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]);
internal(1);
m_TMP2 = read16ib(m_TMP1);
set_nzv16(m_TMP2);
@@ -256,7 +256,7 @@ macro prefetch_noirq
7e00 ff80 0 mov.b r8l r16d16h g
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]);
m_TMP2 = r8_r(m_IR[0]);
set_nzv8(m_TMP2);
internal(1);
@@ -265,7 +265,7 @@ macro prefetch_noirq
7f00 ff80 0 mov.w r16l r16d16h g
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + m_IR[1]);
m_TMP2 = r16_r(m_IR[0]);
set_nzv16(m_TMP2);
internal(1);
diff --git a/src/devices/cpu/h8/h8.cpp b/src/devices/cpu/h8/h8.cpp
index 338023eab12..6e0991a991d 100644
--- a/src/devices/cpu/h8/h8.cpp
+++ b/src/devices/cpu/h8/h8.cpp
@@ -2,10 +2,20 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- h8.h
+ h8.cpp
H8-300 base cpu emulation
+ TODO:
+ - use logmacro and be quiet by default, same for H8 peripherals that
+ currently have "static constexpr int V"
+ - Verify H8H opcode map, some opcodes currently for H8H are H8S-only.
+ Base H8/300 (eg. H8/325) opcode map is correct.
+ - NVRAM won't work properly when it goes into SSBY (software standby
+ mode) and the power button triggers an IRQ to wake up instead of RES.
+ Obviously, MAME always starts at reset-phase at power-on, so it's more
+ like a 'known issue' instead of a TODO since it can't really be fixed.
+ - add STBY pin (hardware standby mode, can only wake up with reset)
***************************************************************************/
@@ -13,28 +23,34 @@
#include "h8.h"
#include "h8_dma.h"
#include "h8_dtc.h"
+#include "h8_port.h"
#include "h8d.h"
-h8_device::h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) :
+h8_device::h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) :
cpu_device(mconfig, type, tag, owner, clock),
+ device_nvram_interface(mconfig, *this),
m_program_config("program", ENDIANNESS_BIG, 16, 16, 0, map_delegate),
+ m_internal_ram(*this, "internal_ram"),
m_read_adc(*this, 0),
- m_read_port(*this, 0),
+ m_read_port(*this, 0xff),
m_write_port(*this),
m_sci(*this, "sci%u", 0),
m_sci_tx(*this),
m_sci_clk(*this),
+ m_standby_cb(*this),
m_PPC(0), m_NPC(0), m_PC(0), m_PIR(0), m_EXR(0), m_CCR(0), m_MAC(0), m_MACF(0),
- m_TMP1(0), m_TMP2(0), m_TMPR(0), m_inst_state(0), m_inst_substate(0), m_icount(0), m_bcount(0), m_irq_vector(0), m_taken_irq_vector(0), m_irq_level(0), m_taken_irq_level(0), m_irq_required(false), m_irq_nmi(false)
+ m_TMP1(0), m_TMP2(0), m_TMPR(0), m_inst_state(0), m_inst_substate(0), m_icount(0), m_bcount(0),
+ m_irq_vector(0), m_taken_irq_vector(0), m_irq_level(0), m_taken_irq_level(0), m_irq_nmi(false),
+ m_standby_pending(false), m_standby_time(0), m_nvram_defval(0), m_nvram_battery(true)
{
m_supports_advanced = false;
m_mode_advanced = false;
m_mode_a20 = false;
m_has_exr = false;
m_has_mac = false;
- m_mac_saturating = false;
m_has_trace = false;
m_has_hc = true;
+ nvram_enable_backup(false); // disable nvram by default
for(unsigned int i=0; i != m_read_adc.size(); i++)
m_read_adc[i].bind().set([this, i]() { return adc_default(i); });
@@ -46,7 +62,8 @@ h8_device::h8_device(const machine_config &mconfig, device_type type, const char
u16 h8_device::adc_default(int adc)
{
- logerror("read of un-hooked adc %d\n", adc);
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked adc %d\n", adc);
return 0;
}
@@ -54,8 +71,9 @@ const char h8_device::port_names[] = "123456789abcdefg";
u8 h8_device::port_default_r(int port)
{
- logerror("read of un-hooked port %c (PC=%X)\n", port_names[port], m_PPC);
- return 0;
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked port %c (PC=%X)\n", port_names[port], m_PPC);
+ return 0xff;
}
void h8_device::port_default_w(int port, u8 data)
@@ -65,7 +83,7 @@ void h8_device::port_default_w(int port, u8 data)
void h8_device::device_config_complete()
{
- uint8_t addrbits = m_mode_advanced ? (m_mode_a20 ? 20 : 24) : 16;
+ u8 addrbits = m_mode_advanced ? (m_mode_a20 ? 20 : 24) : 16;
m_program_config.m_addr_width = m_program_config.m_logaddr_width = addrbits;
}
@@ -74,14 +92,14 @@ void h8_device::device_start()
space(AS_PROGRAM).cache(m_cache);
space(AS_PROGRAM).specific(m_program);
- uint32_t pcmask = m_mode_advanced ? 0xffffff : 0xffff;
- state_add<uint32_t>(H8_PC, "PC",
+ u32 pcmask = m_mode_advanced ? 0xffffff : 0xffff;
+ state_add<u32>(H8_PC, "PC",
[this]() { return m_NPC; },
- [this](uint32_t pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); }
+ [this](u32 pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); }
).mask(pcmask);
- state_add<uint32_t>(STATE_GENPC, "GENPC",
+ state_add<u32>(STATE_GENPC, "GENPC",
[this]() { return m_NPC; },
- [this](uint32_t pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); }
+ [this](u32 pc) { m_PC = m_PPC = m_NPC = pc; m_PIR = read16i(m_PC); m_PC += 2; prefetch_done_noirq_notrace(); }
).mask(pcmask).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_PPC).mask(pcmask).noshow();
state_add(H8_CCR, "CCR", m_CCR);
@@ -128,6 +146,9 @@ void h8_device::device_start()
state_add(H8_R7, "ER7", m_TMPR).callimport().callexport().formatstr("%9s");
}
+ save_item(NAME(m_current_dma));
+ save_item(NAME(m_cycles_base));
+
save_item(NAME(m_PPC));
save_item(NAME(m_NPC));
save_item(NAME(m_PC));
@@ -136,16 +157,25 @@ void h8_device::device_start()
save_item(NAME(m_R));
save_item(NAME(m_EXR));
save_item(NAME(m_CCR));
+ save_item(NAME(m_MAC));
+ save_item(NAME(m_MACF));
save_item(NAME(m_TMP1));
save_item(NAME(m_TMP2));
+ save_item(NAME(m_TMPR));
+
save_item(NAME(m_inst_state));
save_item(NAME(m_inst_substate));
+ save_item(NAME(m_requested_state));
+ save_item(NAME(m_bcount));
+ save_item(NAME(m_count_before_instruction_step));
save_item(NAME(m_irq_vector));
save_item(NAME(m_taken_irq_vector));
save_item(NAME(m_irq_level));
save_item(NAME(m_taken_irq_level));
save_item(NAME(m_irq_nmi));
- save_item(NAME(m_current_dma));
+ save_item(NAME(m_standby_pending));
+ save_item(NAME(m_standby_time));
+ save_item(NAME(m_nvram_battery));
set_icountptr(m_icount);
@@ -170,6 +200,7 @@ void h8_device::device_start()
void h8_device::device_reset()
{
+ m_cycles_base = machine().time().as_ticks(clock());
m_inst_state = STATE_RESET;
m_inst_substate = 0;
m_count_before_instruction_step = 0;
@@ -182,8 +213,72 @@ void h8_device::device_reset()
m_taken_irq_level = -1;
m_current_dma = -1;
m_current_dtc = nullptr;
+
+ m_standby_pending = false;
+ m_standby_cb(0);
+}
+
+
+// nvram handling
+
+bool h8_device::nvram_write(util::write_stream &file)
+{
+ // if it's currently not battery-backed, don't save at all
+ if(!m_nvram_battery)
+ return true;
+
+ // internal RAM
+ if(m_internal_ram) {
+ auto const [err, actual] = write(file, &m_internal_ram[0], m_internal_ram.bytes());
+ if(err)
+ return false;
+ }
+
+ // I/O ports
+ for(h8_port_device &port : h8_port_device_enumerator(*this)) {
+ if(!port.nvram_write(file))
+ return false;
+ }
+
+ return true;
+}
+
+bool h8_device::nvram_read(util::read_stream &file)
+{
+ // internal RAM
+ if(m_internal_ram) {
+ auto const [err, actual] = read(file, &m_internal_ram[0], m_internal_ram.bytes());
+ if (err || (m_internal_ram.bytes() != actual))
+ return false;
+ }
+
+ // I/O ports
+ for(h8_port_device &port : h8_port_device_enumerator(*this)) {
+ if(!port.nvram_read(file))
+ return false;
+ }
+
+ return true;
+}
+
+void h8_device::nvram_default()
+{
+ if(!nvram_backup_enabled() || !m_internal_ram)
+ return;
+
+ // default nvram from mytag:nvram region if it exists (only the internal RAM for now)
+ memory_region *region = memregion("nvram");
+ if(region != nullptr) {
+ if(region->bytes() != m_internal_ram.bytes())
+ fatalerror("%s: Wrong region size (expected 0x%x, found 0x%x)", region->name(), m_internal_ram.bytes(), region->bytes());
+
+ std::copy_n(&region->as_u16(), m_internal_ram.length(), &m_internal_ram[0]);
+ }
+ else
+ std::fill_n(&m_internal_ram[0], m_internal_ram.length(), m_nvram_defval);
}
+
bool h8_device::trigger_dma(int vector)
{
bool dma_triggered = false;
@@ -232,27 +327,7 @@ void h8_device::request_state(int state)
m_requested_state = state;
}
-uint32_t h8_device::execute_min_cycles() const noexcept
-{
- return 1;
-}
-
-uint32_t h8_device::execute_max_cycles() const noexcept
-{
- return 1;
-}
-
-uint32_t h8_device::execute_input_lines() const noexcept
-{
- return 0;
-}
-
-bool h8_device::execute_input_edge_triggered(int inputnum) const noexcept
-{
- return inputnum == INPUT_LINE_NMI;
-}
-
-void h8_device::recompute_bcount(uint64_t event_time)
+void h8_device::recompute_bcount(u64 event_time)
{
if(!event_time || event_time >= total_cycles() + m_icount) {
m_bcount = 0;
@@ -282,7 +357,7 @@ void h8_device::execute_run()
while(m_icount > m_bcount) {
if(m_inst_state < 0x10000) {
m_PPC = m_NPC;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(m_NPC);
}
do_exec_full();
@@ -299,7 +374,7 @@ void h8_device::execute_run()
}
}
-void h8_device::add_event(uint64_t &event_time, uint64_t new_event)
+void h8_device::add_event(u64 &event_time, u64 new_event)
{
if(!new_event)
return;
@@ -412,33 +487,48 @@ void h8_device::state_string_export(const device_state_entry &entry, std::string
// FIXME: one-state bus cycles are only provided for on-chip ROM & RAM in H8S/2000 and H8S/2600.
// All other accesses take *at least* two states each, and additional wait states are often programmed for external memory!
-uint16_t h8_device::read16i(uint32_t adr)
+u16 h8_device::read16i(u32 adr)
{
- m_icount--;
+ if(m_has_exr)
+ m_icount--;
+ else
+ m_icount -= 2;
return m_cache.read_word(adr & ~1);
}
-uint8_t h8_device::read8(uint32_t adr)
+u8 h8_device::read8(u32 adr)
{
- m_icount--;
+ if(m_has_exr)
+ m_icount--;
+ else
+ m_icount -= 2;
return m_program.read_byte(adr);
}
-void h8_device::write8(uint32_t adr, uint8_t data)
+void h8_device::write8(u32 adr, u8 data)
{
- m_icount--;
+ if(m_has_exr)
+ m_icount--;
+ else
+ m_icount -= 2;
m_program.write_byte(adr, data);
}
-uint16_t h8_device::read16(uint32_t adr)
+u16 h8_device::read16(u32 adr)
{
- m_icount--;
+ if(m_has_exr)
+ m_icount--;
+ else
+ m_icount -= 2;
return m_program.read_word(adr & ~1);
}
-void h8_device::write16(uint32_t adr, uint16_t data)
+void h8_device::write16(u32 adr, u16 data)
{
- m_icount--;
+ if(m_has_exr)
+ m_icount--;
+ else
+ m_icount -= 2;
m_program.write_word(adr & ~1, data);
}
@@ -447,6 +537,13 @@ bool h8_device::exr_in_stack() const
return false;
}
+void h8_device::take_interrupt()
+{
+ m_inst_state = STATE_IRQ;
+ m_taken_irq_vector = m_irq_vector;
+ m_taken_irq_level = m_irq_level;
+}
+
void h8_device::prefetch_done()
{
if(m_requested_state != -1) {
@@ -456,11 +553,9 @@ void h8_device::prefetch_done()
m_inst_state = STATE_DMA;
else if(m_current_dtc)
m_inst_state = STATE_DTC;
- else if(m_irq_vector) {
- m_inst_state = STATE_IRQ;
- m_taken_irq_vector = m_irq_vector;
- m_taken_irq_level = m_irq_level;
- } else if(m_has_trace && (m_EXR & EXR_T) && exr_in_stack())
+ else if(m_irq_vector)
+ take_interrupt();
+ else if(m_has_trace && (m_EXR & EXR_T) && exr_in_stack())
m_inst_state = STATE_TRACE;
else
m_inst_state = m_IR[0] = m_PIR;
@@ -474,6 +569,13 @@ void h8_device::prefetch_done_noirq()
m_inst_state = m_IR[0] = m_PIR;
}
+void h8_device::prefetch_done_notrace()
+{
+ prefetch_done();
+ if(m_inst_state == STATE_TRACE)
+ m_inst_state = m_IR[0] = m_PIR;
+}
+
void h8_device::prefetch_done_noirq_notrace()
{
m_inst_state = m_IR[0] = m_PIR;
@@ -484,15 +586,23 @@ void h8_device::set_irq(int irq_vector, int irq_level, bool irq_nmi)
m_irq_vector = irq_vector;
m_irq_level = irq_level;
m_irq_nmi = irq_nmi;
+
+ // wake up from software standby with an external interrupt
+ if(standby() && m_irq_vector) {
+ notify_standby(0);
+ resume(SUSPEND_REASON_CLOCK);
+ m_standby_cb(0);
+ take_interrupt();
+ }
}
void h8_device::internal(int cycles)
{
- m_icount -= cycles;
-
- // All internal operations take an even number of states (at least 2 each) on H8/300L and H8/300H
+ // on H8/300, H8/300L, H8/300H (not H8S), all internal operations take an even number of states (at least 2 each)
if(!m_has_exr)
- m_icount--;
+ m_icount -= cycles + 1;
+ else
+ m_icount -= cycles;
}
void h8_device::illegal()
@@ -511,259 +621,255 @@ int h8_device::trapa_setup()
throw emu_fatalerror("%s: Trapa setup called but unimplemented.\n", tag());
}
-uint8_t h8_device::do_addx8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_addx8(u8 v1, u8 v2)
{
- uint16_t res = v1 + v2 + (m_CCR & F_C ? 1 : 0);
- m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
- if(((v1 & 0xf) + (v2 & 0xf) + (m_CCR & F_C ? 1 : 0)) & 0x10)
+ u8 c = m_CCR & F_C ? 1 : 0;
+ u16 res = v1 + v2 + c;
+ m_CCR &= ~(F_N|F_V|F_C);
+ if(m_has_hc) {
+ if(((v1 & 0xf) + (v2 & 0xf) + c) & 0x10)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint8_t(res))
- m_CCR |= F_Z;
- else if(int8_t(res) < 0)
+ if(u8(res))
+ m_CCR &= ~F_Z;
+ if(s8(res) < 0)
m_CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
if(res & 0x100)
m_CCR |= F_C;
return res;
-
}
-uint8_t h8_device::do_subx8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_subx8(u8 v1, u8 v2)
{
- uint16_t res = v1 - v2 - (m_CCR & F_C ? 1 : 0);
+ u8 c = m_CCR & F_C ? 1 : 0;
+ u16 res = v1 - v2 - c;
m_CCR &= ~(F_N|F_V|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
- if(((v1 & 0xf) - (v2 & 0xf) - (m_CCR & F_C ? 1 : 0)) & 0x10)
+ if(m_has_hc) {
+ if(((v1 & 0xf) - (v2 & 0xf) - c) & 0x10)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(uint8_t(res))
+ if(u8(res))
m_CCR &= ~F_Z;
- if(int8_t(res) < 0)
+ if(s8(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
if(res & 0x100)
m_CCR |= F_C;
return res;
-
}
-uint8_t h8_device::do_inc8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_inc8(u8 v1, u8 v2)
{
- uint8_t res = v1 + v2;
+ u8 res = v1 + v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int8_t(res) < 0)
+ else if(s8(res) < 0)
m_CCR |= F_N;
- if((v1^v2) & (v1^res) & 0x80)
+ if(~(v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
return res;
}
-uint16_t h8_device::do_inc16(uint16_t v1, uint16_t v2)
+u16 h8_device::do_inc16(u16 v1, u16 v2)
{
- uint16_t res = v1 + v2;
+ u16 res = v1 + v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int16_t(res) < 0)
+ else if(s16(res) < 0)
m_CCR |= F_N;
- if((v1^v2) & (v1^res) & 0x8000)
+ if(~(v1^v2) & (v1^res) & 0x8000)
m_CCR |= F_V;
return res;
}
-uint32_t h8_device::do_inc32(uint32_t v1, uint32_t v2)
+u32 h8_device::do_inc32(u32 v1, u32 v2)
{
- uint32_t res = v1 + v2;
+ u32 res = v1 + v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int32_t(res) < 0)
+ else if(s32(res) < 0)
m_CCR |= F_N;
- if((v1^v2) & (v1^res) & 0x80000000)
+ if(~(v1^v2) & (v1^res) & 0x80000000)
m_CCR |= F_V;
return res;
}
-uint8_t h8_device::do_add8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_add8(u8 v1, u8 v2)
{
- uint16_t res = v1 + v2;
+ u16 res = v1 + v2;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
+ if(m_has_hc) {
if(((v1 & 0xf) + (v2 & 0xf)) & 0x10)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint8_t(res))
+ if(!u8(res))
m_CCR |= F_Z;
- else if(int8_t(res) < 0)
+ else if(s8(res) < 0)
m_CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
if(res & 0x100)
m_CCR |= F_C;
return res;
-
}
-uint16_t h8_device::do_add16(uint16_t v1, uint16_t v2)
+u16 h8_device::do_add16(u16 v1, u16 v2)
{
- uint32_t res = v1 + v2;
+ u32 res = v1 + v2;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
- if(((v1 & 0xfff) + (v2 & 0xffff)) & 0x1000)
+ if(m_has_hc) {
+ if(((v1 & 0xfff) + (v2 & 0xfff)) & 0x1000)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint16_t(res))
+ if(!u16(res))
m_CCR |= F_Z;
- else if(int16_t(res) < 0)
+ else if(s16(res) < 0)
m_CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x8000)
m_CCR |= F_V;
if(res & 0x10000)
m_CCR |= F_C;
return res;
-
}
-uint32_t h8_device::do_add32(uint32_t v1, uint32_t v2)
+u32 h8_device::do_add32(u32 v1, u32 v2)
{
- uint64_t res = uint64_t(v1) + uint64_t(v2);
+ u64 res = u64(v1) + u64(v2);
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
+ if(m_has_hc) {
if(((v1 & 0xfffffff) + (v2 & 0xfffffff)) & 0x10000000)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint32_t(res))
+ if(!u32(res))
m_CCR |= F_Z;
- else if(int32_t(res) < 0)
+ else if(s32(res) < 0)
m_CCR |= F_N;
if(~(v1^v2) & (v1^res) & 0x80000000)
m_CCR |= F_V;
- if(res & 0x100000000U)
+ if(res & 0x100000000ULL)
m_CCR |= F_C;
return res;
}
-uint8_t h8_device::do_dec8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_dec8(u8 v1, u8 v2)
{
- uint8_t res = v1 - v2;
+ u8 res = v1 - v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int8_t(res) < 0)
+ else if(s8(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
return res;
}
-uint16_t h8_device::do_dec16(uint16_t v1, uint16_t v2)
+u16 h8_device::do_dec16(u16 v1, u16 v2)
{
- uint16_t res = v1 - v2;
+ u16 res = v1 - v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int16_t(res) < 0)
+ else if(s16(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x8000)
m_CCR |= F_V;
return res;
}
-uint32_t h8_device::do_dec32(uint32_t v1, uint32_t v2)
+u32 h8_device::do_dec32(u32 v1, u32 v2)
{
- uint32_t res = v1 - v2;
+ u32 res = v1 - v2;
m_CCR &= ~(F_N|F_V|F_Z);
if(!res)
m_CCR |= F_Z;
- else if(int32_t(res) < 0)
+ else if(s32(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80000000)
m_CCR |= F_V;
return res;
}
-uint8_t h8_device::do_sub8(uint8_t v1, uint8_t v2)
+u8 h8_device::do_sub8(u8 v1, u8 v2)
{
- uint16_t res = v1 - v2;
+ u16 res = v1 - v2;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
+ if(m_has_hc) {
if(((v1 & 0xf) - (v2 & 0xf)) & 0x10)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint8_t(res))
+ if(!u8(res))
m_CCR |= F_Z;
- else if(int8_t(res) < 0)
+ else if(s8(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80)
m_CCR |= F_V;
if(res & 0x100)
m_CCR |= F_C;
return res;
-
}
-uint16_t h8_device::do_sub16(uint16_t v1, uint16_t v2)
+u16 h8_device::do_sub16(u16 v1, u16 v2)
{
- uint32_t res = v1 - v2;
+ u32 res = v1 - v2;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
- if(((v1 & 0xfff) - (v2 & 0xffff)) & 0x1000)
+ if(m_has_hc) {
+ if(((v1 & 0xfff) - (v2 & 0xfff)) & 0x1000)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint16_t(res))
+ if(!u16(res))
m_CCR |= F_Z;
- else if(int16_t(res) < 0)
+ else if(s16(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x8000)
m_CCR |= F_V;
if(res & 0x10000)
m_CCR |= F_C;
return res;
-
}
-uint32_t h8_device::do_sub32(uint32_t v1, uint32_t v2)
+u32 h8_device::do_sub32(u32 v1, u32 v2)
{
- uint64_t res = uint64_t(v1) - uint64_t(v2);
+ u64 res = u64(v1) - u64(v2);
m_CCR &= ~(F_N|F_V|F_Z|F_C);
- if(m_has_hc)
- {
- m_CCR &= ~F_H;
+ if(m_has_hc) {
if(((v1 & 0xfffffff) - (v2 & 0xfffffff)) & 0x10000000)
m_CCR |= F_H;
+ else
+ m_CCR &= ~F_H;
}
- if(!uint32_t(res))
+ if(!u32(res))
m_CCR |= F_Z;
- else if(int32_t(res) < 0)
+ else if(s32(res) < 0)
m_CCR |= F_N;
if((v1^v2) & (v1^res) & 0x80000000)
m_CCR |= F_V;
- if(res & 0x100000000U)
+ if(res & 0x100000000ULL)
m_CCR |= F_C;
return res;
}
-uint8_t h8_device::do_shal8(uint8_t v)
+u8 h8_device::do_shal8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -773,12 +879,12 @@ uint8_t h8_device::do_shal8(uint8_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_shal16(uint16_t v)
+u16 h8_device::do_shal16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -788,12 +894,12 @@ uint16_t h8_device::do_shal16(uint16_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_shal32(uint32_t v)
+u32 h8_device::do_shal32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -803,12 +909,12 @@ uint32_t h8_device::do_shal32(uint32_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_shar8(uint8_t v)
+u8 h8_device::do_shar8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -823,7 +929,7 @@ uint8_t h8_device::do_shar8(uint8_t v)
return v;
}
-uint16_t h8_device::do_shar16(uint16_t v)
+u16 h8_device::do_shar16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -838,7 +944,7 @@ uint16_t h8_device::do_shar16(uint16_t v)
return v;
}
-uint32_t h8_device::do_shar32(uint32_t v)
+u32 h8_device::do_shar32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -853,7 +959,7 @@ uint32_t h8_device::do_shar32(uint32_t v)
return v;
}
-uint8_t h8_device::do_shll8(uint8_t v)
+u8 h8_device::do_shll8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -861,12 +967,12 @@ uint8_t h8_device::do_shll8(uint8_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_shll16(uint16_t v)
+u16 h8_device::do_shll16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -874,12 +980,12 @@ uint16_t h8_device::do_shll16(uint16_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_shll32(uint32_t v)
+u32 h8_device::do_shll32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -887,12 +993,12 @@ uint32_t h8_device::do_shll32(uint32_t v)
v <<= 1;
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_shlr8(uint8_t v)
+u8 h8_device::do_shlr8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -903,7 +1009,7 @@ uint8_t h8_device::do_shlr8(uint8_t v)
return v;
}
-uint16_t h8_device::do_shlr16(uint16_t v)
+u16 h8_device::do_shlr16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -914,7 +1020,7 @@ uint16_t h8_device::do_shlr16(uint16_t v)
return v;
}
-uint32_t h8_device::do_shlr32(uint32_t v)
+u32 h8_device::do_shlr32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 1)
@@ -925,7 +1031,7 @@ uint32_t h8_device::do_shlr32(uint32_t v)
return v;
}
-uint8_t h8_device::do_shal2_8(uint8_t v)
+u8 h8_device::do_shal2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -936,12 +1042,12 @@ uint8_t h8_device::do_shal2_8(uint8_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_shal2_16(uint16_t v)
+u16 h8_device::do_shal2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -952,12 +1058,12 @@ uint16_t h8_device::do_shal2_16(uint16_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_shal2_32(uint32_t v)
+u32 h8_device::do_shal2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -968,12 +1074,12 @@ uint32_t h8_device::do_shal2_32(uint32_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_shar2_8(uint8_t v)
+u8 h8_device::do_shar2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -988,7 +1094,7 @@ uint8_t h8_device::do_shar2_8(uint8_t v)
return v;
}
-uint16_t h8_device::do_shar2_16(uint16_t v)
+u16 h8_device::do_shar2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1003,7 +1109,7 @@ uint16_t h8_device::do_shar2_16(uint16_t v)
return v;
}
-uint32_t h8_device::do_shar2_32(uint32_t v)
+u32 h8_device::do_shar2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1018,7 +1124,7 @@ uint32_t h8_device::do_shar2_32(uint32_t v)
return v;
}
-uint8_t h8_device::do_shll2_8(uint8_t v)
+u8 h8_device::do_shll2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -1026,12 +1132,12 @@ uint8_t h8_device::do_shll2_8(uint8_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_shll2_16(uint16_t v)
+u16 h8_device::do_shll2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -1039,12 +1145,12 @@ uint16_t h8_device::do_shll2_16(uint16_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_shll2_32(uint32_t v)
+u32 h8_device::do_shll2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -1052,12 +1158,12 @@ uint32_t h8_device::do_shll2_32(uint32_t v)
v <<= 2;
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_shlr2_8(uint8_t v)
+u8 h8_device::do_shlr2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1068,7 +1174,7 @@ uint8_t h8_device::do_shlr2_8(uint8_t v)
return v;
}
-uint16_t h8_device::do_shlr2_16(uint16_t v)
+u16 h8_device::do_shlr2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1079,7 +1185,7 @@ uint16_t h8_device::do_shlr2_16(uint16_t v)
return v;
}
-uint32_t h8_device::do_shlr2_32(uint32_t v)
+u32 h8_device::do_shlr2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 2)
@@ -1090,7 +1196,7 @@ uint32_t h8_device::do_shlr2_32(uint32_t v)
return v;
}
-uint8_t h8_device::do_rotl8(uint8_t v)
+u8 h8_device::do_rotl8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
@@ -1098,12 +1204,12 @@ uint8_t h8_device::do_rotl8(uint8_t v)
v = (v << 1) | (v >> 7);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotl16(uint16_t v)
+u16 h8_device::do_rotl16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
@@ -1111,12 +1217,12 @@ uint16_t h8_device::do_rotl16(uint16_t v)
v = (v << 1) | (v >> 15);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotl32(uint32_t v)
+u32 h8_device::do_rotl32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
@@ -1124,12 +1230,12 @@ uint32_t h8_device::do_rotl32(uint32_t v)
v = (v << 1) | (v >> 31);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotr8(uint8_t v)
+u8 h8_device::do_rotr8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x01)
@@ -1137,12 +1243,12 @@ uint8_t h8_device::do_rotr8(uint8_t v)
v = (v << 7) | (v >> 1);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotr16(uint16_t v)
+u16 h8_device::do_rotr16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0001)
@@ -1150,12 +1256,12 @@ uint16_t h8_device::do_rotr16(uint16_t v)
v = (v << 15) | (v >> 1);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotr32(uint32_t v)
+u32 h8_device::do_rotr32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000001)
@@ -1163,96 +1269,96 @@ uint32_t h8_device::do_rotr32(uint32_t v)
v = (v << 31) | (v >> 1);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotxl8(uint8_t v)
+u8 h8_device::do_rotxl8(u8 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80)
m_CCR |= F_C;
v = (v << 1) | c;
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotxl16(uint16_t v)
+u16 h8_device::do_rotxl16(u16 v)
{
- uint16_t c = m_CCR & F_C ? 1 : 0;
+ u16 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x8000)
m_CCR |= F_C;
v = (v << 1) | c;
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotxl32(uint32_t v)
+u32 h8_device::do_rotxl32(u32 v)
{
- uint32_t c = m_CCR & F_C ? 1 : 0;
+ u32 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x80000000)
m_CCR |= F_C;
v = (v << 1) | c;
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotxr8(uint8_t v)
+u8 h8_device::do_rotxr8(u8 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x01)
m_CCR |= F_C;
v = (v >> 1) | (c << 7);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotxr16(uint16_t v)
+u16 h8_device::do_rotxr16(u16 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0001)
m_CCR |= F_C;
v = (v >> 1) | (c << 15);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotxr32(uint32_t v)
+u32 h8_device::do_rotxr32(u32 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000001)
m_CCR |= F_C;
v = (v >> 1) | (c << 31);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotl2_8(uint8_t v)
+u8 h8_device::do_rotl2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
@@ -1260,12 +1366,12 @@ uint8_t h8_device::do_rotl2_8(uint8_t v)
v = (v << 2) | (v >> 6);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotl2_16(uint16_t v)
+u16 h8_device::do_rotl2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
@@ -1273,12 +1379,12 @@ uint16_t h8_device::do_rotl2_16(uint16_t v)
v = (v << 2) | (v >> 14);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotl2_32(uint32_t v)
+u32 h8_device::do_rotl2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
@@ -1286,12 +1392,12 @@ uint32_t h8_device::do_rotl2_32(uint32_t v)
v = (v << 2) | (v >> 30);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotr2_8(uint8_t v)
+u8 h8_device::do_rotr2_8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x02)
@@ -1299,12 +1405,12 @@ uint8_t h8_device::do_rotr2_8(uint8_t v)
v = (v << 6) | (v >> 2);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotr2_16(uint16_t v)
+u16 h8_device::do_rotr2_16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0002)
@@ -1312,12 +1418,12 @@ uint16_t h8_device::do_rotr2_16(uint16_t v)
v = (v << 14) | (v >> 2);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotr2_32(uint32_t v)
+u32 h8_device::do_rotr2_32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000002)
@@ -1325,137 +1431,137 @@ uint32_t h8_device::do_rotr2_32(uint32_t v)
v = (v << 30) | (v >> 2);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotxl2_8(uint8_t v)
+u8 h8_device::do_rotxl2_8(u8 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40)
m_CCR |= F_C;
- v = (v << 2) | (c << 1) | ((v >> 6) & 0x01);
+ v = (v << 2) | (c << 1) | (v >> 7);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotxl2_16(uint16_t v)
+u16 h8_device::do_rotxl2_16(u16 v)
{
- uint16_t c = m_CCR & F_C ? 1 : 0;
+ u16 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x4000)
m_CCR |= F_C;
- v = (v << 2) | (c << 1) | ((v >> 14) & 0x0001);
+ v = (v << 2) | (c << 1) | (v >> 15);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotxl2_32(uint32_t v)
+u32 h8_device::do_rotxl2_32(u32 v)
{
- uint32_t c = m_CCR & F_C ? 1 : 0;
+ u32 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x40000000)
m_CCR |= F_C;
- v = (v << 2) | (c << 1) | ((v >> 30) & 0x00000001);
+ v = (v << 2) | (c << 1) | (v >> 31);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-uint8_t h8_device::do_rotxr2_8(uint8_t v)
+u8 h8_device::do_rotxr2_8(u8 v)
{
- uint8_t c = m_CCR & F_C ? 1 : 0;
+ u8 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x02)
m_CCR |= F_C;
v = (v >> 2) | (c << 6) | (v << 7);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
return v;
}
-uint16_t h8_device::do_rotxr2_16(uint16_t v)
+u16 h8_device::do_rotxr2_16(u16 v)
{
- uint16_t c = m_CCR & F_C ? 1 : 0;
+ u16 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x0002)
m_CCR |= F_C;
v = (v >> 2) | (c << 14) | (v << 15);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
return v;
}
-uint32_t h8_device::do_rotxr2_32(uint32_t v)
+u32 h8_device::do_rotxr2_32(u32 v)
{
- uint32_t c = m_CCR & F_C ? 1 : 0;
+ u32 c = m_CCR & F_C ? 1 : 0;
m_CCR &= ~(F_N|F_V|F_Z|F_C);
if(v & 0x00000002)
m_CCR |= F_C;
v = (v >> 2) | (c << 30) | (v << 31);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
return v;
}
-void h8_device::set_nzv8(uint8_t v)
+void h8_device::set_nzv8(u8 v)
{
m_CCR &= ~(F_N|F_V|F_Z);
if(!v)
m_CCR |= F_Z;
- else if(int8_t(v) < 0)
+ else if(s8(v) < 0)
m_CCR |= F_N;
}
-void h8_device::set_nzv16(uint16_t v)
+void h8_device::set_nzv16(u16 v)
{
m_CCR &= ~(F_N|F_V|F_Z);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
}
-void h8_device::set_nzv32(uint32_t v)
+void h8_device::set_nzv32(u32 v)
{
m_CCR &= ~(F_N|F_V|F_Z);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
}
-void h8_device::set_nz16(uint16_t v)
+void h8_device::set_nz16(u16 v)
{
m_CCR &= ~(F_N|F_Z);
if(!v)
m_CCR |= F_Z;
- else if(int16_t(v) < 0)
+ else if(s16(v) < 0)
m_CCR |= F_N;
}
-void h8_device::set_nz32(uint32_t v)
+void h8_device::set_nz32(u32 v)
{
m_CCR &= ~(F_N|F_Z);
if(!v)
m_CCR |= F_Z;
- else if(int32_t(v) < 0)
+ else if(s32(v) < 0)
m_CCR |= F_N;
}
diff --git a/src/devices/cpu/h8/h8.h b/src/devices/cpu/h8/h8.h
index 060b34595ec..c1606e28217 100644
--- a/src/devices/cpu/h8/h8.h
+++ b/src/devices/cpu/h8/h8.h
@@ -6,7 +6,6 @@
H8-300 base cpu emulation
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_H
@@ -23,9 +22,31 @@ class h8_device;
#include "h8_sci.h"
-class h8_device : public cpu_device {
+class h8_device : public cpu_device, public device_nvram_interface {
public:
enum {
+ H8_PC = 1,
+ H8_R0,
+ H8_R1,
+ H8_R2,
+ H8_R3,
+ H8_R4,
+ H8_R5,
+ H8_R6,
+ H8_R7,
+ H8_E0,
+ H8_E1,
+ H8_E2,
+ H8_E3,
+ H8_E4,
+ H8_E5,
+ H8_E6,
+ H8_E7,
+ H8_CCR,
+ H8_EXR
+ };
+
+ enum {
STATE_RESET = 0x10000,
STATE_IRQ = 0x10001,
STATE_TRACE = 0x10002,
@@ -46,6 +67,12 @@ public:
template<int Sci> void sci_rx_w(int state) { m_sci[Sci]->do_rx_w(state); }
template<int Sci> void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); }
+ void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true)
+ void nvram_set_default_value(u16 val) { m_nvram_defval = val; } // default is 0
+ auto standby_cb() { return m_standby_cb.bind(); } // notifier (not an output pin)
+ int standby() { return suspended(SUSPEND_REASON_CLOCK) ? 1 : 0; }
+ u64 standby_time() { return m_standby_time; }
+
void internal_update();
void set_irq(int irq_vector, int irq_level, bool irq_nmi);
bool trigger_dma(int vector);
@@ -57,10 +84,13 @@ public:
u16 do_read_adc(int port) { return m_read_adc[port](); }
u8 do_read_port(int port) { return m_read_port[port](); }
- void do_write_port(int port, u8 data) { return m_write_port[port](data); }
+ void do_write_port(int port, u8 data, u8 ddr) { m_write_port[port](0, data, ddr); }
void do_sci_tx(int sci, int state) { m_sci_tx[sci](state); }
void do_sci_clk(int sci, int state) { m_sci_clk[sci](state); }
+ u64 system_clock() const { return execute_clocks_to_cycles(clock()); }
+ u64 now_as_cycles() const { return machine().time().as_ticks(system_clock()) - m_cycles_base; }
+
protected:
enum {
// digital I/O ports
@@ -102,59 +132,66 @@ protected:
EXR_I = 0x07
};
- h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
+ h8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate);
- // device-level overrides
+ // device_t implementation
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual bool cpu_is_interruptible() const override { return true; }
- virtual uint32_t execute_min_cycles() const noexcept override;
- virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
- virtual bool execute_input_edge_triggered(int inputnum) const noexcept override;
+ virtual u32 execute_min_cycles() const noexcept override { return 2; }
+ virtual u32 execute_max_cycles() const noexcept override { return 12; }
+ virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+ // device_nvram_interface implementation
+ virtual void nvram_default() override;
+ virtual bool nvram_read(util::read_stream &file) override;
+ virtual bool nvram_write(util::write_stream &file) override;
+
address_space_config m_program_config;
memory_access<32, 1, 0, ENDIANNESS_BIG>::cache m_cache;
memory_access<32, 1, 0, ENDIANNESS_BIG>::specific m_program;
+ optional_shared_ptr<u16> m_internal_ram; // for nvram
devcb_read16::array<8> m_read_adc;
devcb_read8::array<PORT_COUNT> m_read_port;
devcb_write8::array<PORT_COUNT> m_write_port;
optional_device_array<h8_sci_device, 3> m_sci;
devcb_write_line::array<3> m_sci_tx, m_sci_clk;
+ devcb_write_line m_standby_cb;
h8gen_dma_device *m_dma_device;
h8_dtc_device *m_dtc_device;
h8_dma_state *m_dma_channel[8];
int m_current_dma;
h8_dtc_state *m_current_dtc;
-
- uint32_t m_PPC; /* previous program counter */
- uint32_t m_NPC; /* next start-of-instruction program counter */
- uint32_t m_PC; /* program counter */
- uint16_t m_PIR; /* Prefetched word */
- uint16_t m_IR[5]; /* Fetched instruction */
- uint16_t m_R[16]; /* Rn (0-7), En (8-15, h8-300h+) */
- uint8_t m_EXR; /* Interrupt/trace register (h8s/2000+) */
- uint8_t m_CCR; /* Condition-code register */
- int64_t m_MAC; /* Multiply accumulator (h8s/2600+) */
- uint8_t m_MACF; /* MAC flags (h8s/2600+) */
- uint32_t m_TMP1, m_TMP2;
- uint32_t m_TMPR; /* For debugger ER register import */
+ u64 m_cycles_base;
+
+ u32 m_PPC; // previous program counter
+ u32 m_NPC; // next start-of-instruction program counter
+ u32 m_PC; // program counter
+ u16 m_PIR; // Prefetched word
+ u16 m_IR[5]; // Fetched instruction
+ u16 m_R[16]; // Rn (0-7), En (8-15, h8-300h+)
+ u8 m_EXR; // Interrupt/trace register (h8s/2000+)
+ u8 m_CCR; // Condition-code register
+ s64 m_MAC; // Multiply accumulator (h8s/2600+)
+ u8 m_MACF; // MAC flags (h8s/2600+)
+ u32 m_TMP1, m_TMP2;
+ u32 m_TMPR; // For debugger ER register import
bool m_has_exr, m_has_mac, m_has_trace, m_supports_advanced, m_mode_advanced, m_mode_a20, m_mac_saturating;
bool m_has_hc; // GT913's CCR bit 5 is I, not H
@@ -163,133 +200,139 @@ protected:
int m_icount, m_bcount, m_count_before_instruction_step;
int m_irq_vector, m_taken_irq_vector;
int m_irq_level, m_taken_irq_level;
- bool m_irq_required, m_irq_nmi;
+ bool m_irq_nmi, m_standby_pending;
+ u64 m_standby_time;
+ u16 m_nvram_defval;
+ bool m_nvram_battery;
virtual void do_exec_full();
virtual void do_exec_partial();
- static void add_event(uint64_t &event_time, uint64_t new_event);
+ static void add_event(u64 &event_time, u64 new_event);
virtual bool exr_in_stack() const;
virtual void update_irq_filter() = 0;
virtual void interrupt_taken() = 0;
- virtual void internal_update(uint64_t current_time) = 0;
- void recompute_bcount(uint64_t event_time);
+ virtual void internal_update(u64 current_time) = 0;
+ virtual void notify_standby(int state) = 0;
+ void recompute_bcount(u64 event_time);
virtual int trace_setup();
virtual int trapa_setup();
virtual void irq_setup() = 0;
- uint16_t read16i(uint32_t adr);
- uint8_t read8(uint32_t adr);
- void write8(uint32_t adr, uint8_t data);
- uint16_t read16(uint32_t adr);
- void write16(uint32_t adr, uint16_t data);
+ u16 read16i(u32 adr);
+ u8 read8(u32 adr);
+ void write8(u32 adr, u8 data);
+ u16 read16(u32 adr);
+ void write16(u32 adr, u16 data);
void internal(int cycles);
- void prefetch_switch(uint32_t pc, uint16_t ir) { m_NPC = pc & 0xffffff; m_PC = pc+2; m_PIR = ir; }
+ void prefetch_switch(u32 pc, u16 ir) { m_NPC = pc & 0xffffff; m_PC = pc+2; m_PIR = ir; }
void prefetch_done();
void prefetch_done_noirq();
+ void prefetch_done_notrace();
void prefetch_done_noirq_notrace();
+ void take_interrupt();
void illegal();
u16 adc_default(int adc);
u8 port_default_r(int port);
void port_default_w(int port, u8 data);
- uint8_t do_addx8(uint8_t a, uint8_t b);
- uint8_t do_subx8(uint8_t a, uint8_t b);
+ u8 do_addx8(u8 a, u8 b);
+ u8 do_subx8(u8 a, u8 b);
- uint8_t do_inc8(uint8_t a, uint8_t b);
- uint16_t do_inc16(uint16_t a, uint16_t b);
- uint32_t do_inc32(uint32_t a, uint32_t b);
+ u8 do_inc8(u8 a, u8 b);
+ u16 do_inc16(u16 a, u16 b);
+ u32 do_inc32(u32 a, u32 b);
- uint8_t do_add8(uint8_t a, uint8_t b);
- uint16_t do_add16(uint16_t a, uint16_t b);
- uint32_t do_add32(uint32_t a, uint32_t b);
+ u8 do_add8(u8 a, u8 b);
+ u16 do_add16(u16 a, u16 b);
+ u32 do_add32(u32 a, u32 b);
- uint8_t do_dec8(uint8_t a, uint8_t b);
- uint16_t do_dec16(uint16_t a, uint16_t b);
- uint32_t do_dec32(uint32_t a, uint32_t b);
+ u8 do_dec8(u8 a, u8 b);
+ u16 do_dec16(u16 a, u16 b);
+ u32 do_dec32(u32 a, u32 b);
- uint8_t do_sub8(uint8_t a, uint8_t b);
- uint16_t do_sub16(uint16_t a, uint16_t b);
- uint32_t do_sub32(uint32_t a, uint32_t b);
+ u8 do_sub8(u8 a, u8 b);
+ u16 do_sub16(u16 a, u16 b);
+ u32 do_sub32(u32 a, u32 b);
- uint8_t do_shal8(uint8_t v);
- uint16_t do_shal16(uint16_t v);
- uint32_t do_shal32(uint32_t v);
+ u8 do_shal8(u8 v);
+ u16 do_shal16(u16 v);
+ u32 do_shal32(u32 v);
- uint8_t do_shar8(uint8_t v);
- uint16_t do_shar16(uint16_t v);
- uint32_t do_shar32(uint32_t v);
+ u8 do_shar8(u8 v);
+ u16 do_shar16(u16 v);
+ u32 do_shar32(u32 v);
- uint8_t do_shll8(uint8_t v);
- uint16_t do_shll16(uint16_t v);
- uint32_t do_shll32(uint32_t v);
+ u8 do_shll8(u8 v);
+ u16 do_shll16(u16 v);
+ u32 do_shll32(u32 v);
- uint8_t do_shlr8(uint8_t v);
- uint16_t do_shlr16(uint16_t v);
- uint32_t do_shlr32(uint32_t v);
+ u8 do_shlr8(u8 v);
+ u16 do_shlr16(u16 v);
+ u32 do_shlr32(u32 v);
- uint8_t do_rotl8(uint8_t v);
- uint16_t do_rotl16(uint16_t v);
- uint32_t do_rotl32(uint32_t v);
+ u8 do_rotl8(u8 v);
+ u16 do_rotl16(u16 v);
+ u32 do_rotl32(u32 v);
- uint8_t do_rotr8(uint8_t v);
- uint16_t do_rotr16(uint16_t v);
- uint32_t do_rotr32(uint32_t v);
+ u8 do_rotr8(u8 v);
+ u16 do_rotr16(u16 v);
+ u32 do_rotr32(u32 v);
- uint8_t do_rotxl8(uint8_t v);
- uint16_t do_rotxl16(uint16_t v);
- uint32_t do_rotxl32(uint32_t v);
+ u8 do_rotxl8(u8 v);
+ u16 do_rotxl16(u16 v);
+ u32 do_rotxl32(u32 v);
- uint8_t do_rotxr8(uint8_t v);
- uint16_t do_rotxr16(uint16_t v);
- uint32_t do_rotxr32(uint32_t v);
+ u8 do_rotxr8(u8 v);
+ u16 do_rotxr16(u16 v);
+ u32 do_rotxr32(u32 v);
- uint8_t do_shal2_8(uint8_t v);
- uint16_t do_shal2_16(uint16_t v);
- uint32_t do_shal2_32(uint32_t v);
+ u8 do_shal2_8(u8 v);
+ u16 do_shal2_16(u16 v);
+ u32 do_shal2_32(u32 v);
- uint8_t do_shar2_8(uint8_t v);
- uint16_t do_shar2_16(uint16_t v);
- uint32_t do_shar2_32(uint32_t v);
+ u8 do_shar2_8(u8 v);
+ u16 do_shar2_16(u16 v);
+ u32 do_shar2_32(u32 v);
- uint8_t do_shll2_8(uint8_t v);
- uint16_t do_shll2_16(uint16_t v);
- uint32_t do_shll2_32(uint32_t v);
+ u8 do_shll2_8(u8 v);
+ u16 do_shll2_16(u16 v);
+ u32 do_shll2_32(u32 v);
- uint8_t do_shlr2_8(uint8_t v);
- uint16_t do_shlr2_16(uint16_t v);
- uint32_t do_shlr2_32(uint32_t v);
+ u8 do_shlr2_8(u8 v);
+ u16 do_shlr2_16(u16 v);
+ u32 do_shlr2_32(u32 v);
- uint8_t do_rotl2_8(uint8_t v);
- uint16_t do_rotl2_16(uint16_t v);
- uint32_t do_rotl2_32(uint32_t v);
+ u8 do_rotl2_8(u8 v);
+ u16 do_rotl2_16(u16 v);
+ u32 do_rotl2_32(u32 v);
- uint8_t do_rotr2_8(uint8_t v);
- uint16_t do_rotr2_16(uint16_t v);
- uint32_t do_rotr2_32(uint32_t v);
+ u8 do_rotr2_8(u8 v);
+ u16 do_rotr2_16(u16 v);
+ u32 do_rotr2_32(u32 v);
- uint8_t do_rotxl2_8(uint8_t v);
- uint16_t do_rotxl2_16(uint16_t v);
- uint32_t do_rotxl2_32(uint32_t v);
+ u8 do_rotxl2_8(u8 v);
+ u16 do_rotxl2_16(u16 v);
+ u32 do_rotxl2_32(u32 v);
- uint8_t do_rotxr2_8(uint8_t v);
- uint16_t do_rotxr2_16(uint16_t v);
- uint32_t do_rotxr2_32(uint32_t v);
+ u8 do_rotxr2_8(u8 v);
+ u16 do_rotxr2_16(u16 v);
+ u32 do_rotxr2_32(u32 v);
- void set_nzv8(uint8_t v);
- void set_nzv16(uint16_t v);
- void set_nzv32(uint32_t v);
+ void set_nzv8(u8 v);
+ void set_nzv16(u16 v);
+ void set_nzv32(u32 v);
- void set_nz16(uint16_t v);
- void set_nz32(uint32_t v);
+ void set_nz16(u16 v);
+ void set_nz32(u32 v);
- inline void r8_w(int reg, uint8_t val) {
+ inline void r8_w(int reg, u8 val) {
if(reg & 8)
m_R[reg & 7] = (m_R[reg & 7] & 0xff00) | val;
else
m_R[reg & 7] = (m_R[reg & 7] & 0xff) | (val << 8);
}
- inline uint8_t r8_r(int reg) {
+ inline u8 r8_r(int reg) {
if(reg & 8)
return m_R[reg & 7];
else
@@ -304,53 +347,50 @@ protected:
// and the h8-300h is r32 of course, we have to be careful to mask
// in h8.lst there if the top bit is 1.
- inline void r16_w(int reg, uint16_t val) { m_R[reg & 0xf] = val; }
- inline uint16_t r16_r(int reg) { return m_R[reg & 0xf]; }
+ inline void r16_w(int reg, u16 val) { m_R[reg & 0xf] = val; }
+ inline u16 r16_r(int reg) { return m_R[reg & 0xf]; }
#define O(o) void o ## _full(); void o ## _partial()
- O(add_b_imm8_r8u); O(add_b_r8h_r8l); O(add_w_imm16_r16l); O(add_w_r16h_r16l);
- O(adds_l_one_r16l); O(adds_l_two_r16l); O(adds_l_four_r16l);
+ O(add_b_imm8_r8u); O(add_b_r8h_r8l); O(add_w_r16h_r16l);
+ O(adds_l_one_r16l); O(adds_l_two_r16l);
O(addx_b_imm8_r8u); O(addx_b_r8h_r8l);
- O(and_b_imm8_r8u); O(and_w_imm16_r16l); O(and_b_r8h_r8l);
+ O(and_b_imm8_r8u); O(and_b_r8h_r8l);
O(andc_imm8_ccr);
- O(band_imm3_abs16); O(band_imm3_abs8); O(band_imm3_r8l); O(band_imm3_r16ihh);
+ O(band_imm3_abs8); O(band_imm3_r8l); O(band_imm3_r16ihh);
O(bcc_rel8);
- O(bclr_imm3_abs16); O(bclr_imm3_abs8); O(bclr_imm3_r8l); O(bclr_imm3_r16ihh); O(bclr_r8h_abs16); O(bclr_r8h_abs8); O(bclr_r8h_r8l); O(bclr_r8h_r16ihh);
+ O(bclr_imm3_abs8); O(bclr_imm3_r8l); O(bclr_imm3_r16ihh); O(bclr_r8h_abs8); O(bclr_r8h_r8l); O(bclr_r8h_r16ihh);
O(bcs_rel8);
O(beq_rel8);
O(bf_rel8);
O(bge_rel8);
O(bgt_rel8);
O(bhi_rel8);
- O(biand_imm3_abs16); O(biand_imm3_abs8); O(biand_imm3_r8l); O(biand_imm3_r16ihh);
- O(bild_imm3_abs16); O(bild_imm3_abs8); O(bild_imm3_r8l); O(bild_imm3_r16ihh);
- O(bior_imm3_abs16); O(bior_imm3_abs8); O(bior_imm3_r8l); O(bior_imm3_r16ihh);
- O(bist_imm3_abs16); O(bist_imm3_abs8); O(bist_imm3_r8l); O(bist_imm3_r16ihh);
- O(bixor_imm3_abs16); O(bixor_imm3_abs8); O(bixor_imm3_r8l); O(bixor_imm3_r16ihh);
- O(bld_imm3_abs16); O(bld_imm3_abs8); O(bld_imm3_r8l); O(bld_imm3_r16ihh);
+ O(biand_imm3_abs8); O(biand_imm3_r8l); O(biand_imm3_r16ihh);
+ O(bild_imm3_abs8); O(bild_imm3_r8l); O(bild_imm3_r16ihh);
+ O(bior_imm3_abs8); O(bior_imm3_r8l); O(bior_imm3_r16ihh);
+ O(bist_imm3_abs8); O(bist_imm3_r8l); O(bist_imm3_r16ihh);
+ O(bixor_imm3_abs8); O(bixor_imm3_r8l); O(bixor_imm3_r16ihh);
+ O(bld_imm3_abs8); O(bld_imm3_r8l); O(bld_imm3_r16ihh);
O(ble_rel8);
O(bls_rel8);
O(blt_rel8);
O(bmi_rel8);
O(bne_rel8);
- O(bnot_imm3_abs16); O(bnot_imm3_abs8); O(bnot_imm3_r8l); O(bnot_imm3_r16ihh);
- O(bnot_r8h_abs16); O(bnot_r8h_abs8); O(bnot_r8h_r8l); O(bnot_r8h_r16ihh);
- O(bor_imm3_abs16); O(bor_imm3_abs8); O(bor_imm3_r8l); O(bor_imm3_r16ihh);
+ O(bnot_imm3_abs8); O(bnot_imm3_r8l); O(bnot_imm3_r16ihh); O(bnot_r8h_abs8); O(bnot_r8h_r8l); O(bnot_r8h_r16ihh);
+ O(bor_imm3_abs8); O(bor_imm3_r8l); O(bor_imm3_r16ihh);
O(bpl_rel8);
- O(bset_imm3_abs16); O(bset_imm3_abs8); O(bset_imm3_r8l); O(bset_imm3_r16ihh);
- O(bset_r8h_abs16); O(bset_r8h_abs8); O(bset_r8h_r8l); O(bset_r8h_r16ihh);
+ O(bset_imm3_abs8); O(bset_imm3_r8l); O(bset_imm3_r16ihh); O(bset_r8h_abs8); O(bset_r8h_r8l); O(bset_r8h_r16ihh);
O(bsr_rel8);
- O(bst_imm3_abs16); O(bst_imm3_abs8); O(bst_imm3_r8l); O(bst_imm3_r16ihh);
+ O(bst_imm3_abs8); O(bst_imm3_r8l); O(bst_imm3_r16ihh);
O(bt_rel8);
- O(btst_imm3_abs16); O(btst_imm3_abs8); O(btst_imm3_r8l); O(btst_imm3_r16ihh);
- O(btst_r8h_abs16); O(btst_r8h_abs8); O(btst_r8h_r8l); O(btst_r8h_r16ihh);
+ O(btst_imm3_abs8); O(btst_imm3_r8l); O(btst_imm3_r16ihh); O(btst_r8h_abs8); O(btst_r8h_r8l); O(btst_r8h_r16ihh);
O(bvc_rel8);
O(bvs_rel8);
- O(bxor_imm3_abs16); O(bxor_imm3_abs8); O(bxor_imm3_r8l); O(bxor_imm3_r16ihh);
- O(cmp_b_imm8_r8u); O(cmp_b_r8h_r8l); O(cmp_w_imm16_r16l); O(cmp_w_r16h_r16l);
+ O(bxor_imm3_abs8); O(bxor_imm3_r8l); O(bxor_imm3_r16ihh);
+ O(cmp_b_imm8_r8u); O(cmp_b_r8h_r8l); O(cmp_w_r16h_r16l);
O(daa_b_r8l);
O(das_b_r8l);
- O(dec_b_one_r8l); O(dec_w_one_r16l); O(dec_w_two_r16l);
+ O(dec_b_one_r8l);
O(divxu_b_r8h_r16l);
O(eepmov_b);
O(inc_b_one_r8l);
@@ -365,7 +405,7 @@ protected:
O(neg_b_r8l);
O(nop);
O(not_b_r8l);
- O(or_b_imm8_r8u); O(or_b_r8h_r8l); O(or_w_imm16_r16l);
+ O(or_b_imm8_r8u); O(or_b_r8h_r8l);
O(orc_imm8_ccr);
O(rotl_b_r8l);
O(rotr_b_r8l);
@@ -379,10 +419,10 @@ protected:
O(shlr_b_r8l);
O(sleep);
O(stc_ccr_r8l); O(stc_exr_r8l);
- O(sub_b_r8h_r8l); O(sub_w_imm16_r16l); O(sub_w_r16h_r16l);
- O(subs_l_one_r16l); O(subs_l_two_r16l); O(subs_l_four_r16l);
+ O(sub_b_r8h_r8l); O(sub_w_r16h_r16l);
+ O(subs_l_one_r16l); O(subs_l_two_r16l);
O(subx_b_imm8_r8u); O(subx_b_r8h_r8l);
- O(xor_b_imm8_r8u); O(xor_b_r8h_r8l); O(xor_w_imm16_r16l);
+ O(xor_b_imm8_r8u); O(xor_b_r8h_r8l);
O(xorc_imm8_ccr);
O(dispatch_0100);
@@ -419,26 +459,4 @@ protected:
#undef O
};
-enum {
- H8_PC = 1,
- H8_R0,
- H8_R1,
- H8_R2,
- H8_R3,
- H8_R4,
- H8_R5,
- H8_R6,
- H8_R7,
- H8_E0,
- H8_E1,
- H8_E2,
- H8_E3,
- H8_E4,
- H8_E5,
- H8_E6,
- H8_E7,
- H8_CCR,
- H8_EXR
-};
-
#endif // MAME_CPU_H8_H8_H
diff --git a/src/devices/cpu/h8/h8.lst b/src/devices/cpu/h8/h8.lst
index 24a5c877c7f..57ab028aa7e 100644
--- a/src/devices/cpu/h8/h8.lst
+++ b/src/devices/cpu/h8/h8.lst
@@ -1,6 +1,9 @@
# license:BSD-3-Clause
# copyright-holders:Olivier Galibert
+macro fetch_noinc
+ m_PIR = read16i(m_PC);
+
macro fetch
m_PIR = read16i(m_PC);
m_PC += 2;
@@ -17,9 +20,9 @@ macro prefetch_noirq
prefetch_start
prefetch_done_noirq();
-macro prefetch_noirq_notrace
+macro prefetch_notrace
prefetch_start
- prefetch_done_noirq_notrace();
+ prefetch_done_notrace();
macro bxx_any %cond
prefetch_start
@@ -29,11 +32,11 @@ macro bxx_any %cond
prefetch_done();
macro bxx_8 %cond
- m_TMP1 = m_PC + int8_t(m_IR[0]);
+ m_TMP1 = m_PC + s8(m_IR[0]);
bxx_any %cond
macro bxx_16 %cond
- m_TMP1 = m_PC + int16_t(m_IR[1]);
+ m_TMP1 = m_PC + s16(m_IR[1]);
bxx_any %cond
macro bset %bit
@@ -235,7 +238,7 @@ macro jsr32 %opc %spreg
m_current_dtc->m_dar = (m_current_dtc->m_dar & 0xff000000) | ((m_current_dtc->m_dar + m_current_dtc->m_incd) & 0x00ffffff);
m_current_dtc->m_count--;
if(!m_current_dtc->m_count) {
- uint8_t id = m_current_dtc->m_id;
+ u8 id = m_current_dtc->m_id;
m_current_dtc = nullptr;
m_dtc_device->count_done(id);
}
@@ -297,7 +300,7 @@ macro jsr32 %opc %spreg
01006b00 fffffff8 0 mov.l abs16 r32l h
prefetch_start
- m_TMP2 = int16_t(m_IR[2]);
+ m_TMP2 = s16(m_IR[2]);
m_TMP1 = read16(m_TMP2) << 16;
m_TMP1 |= read16(m_TMP2+2);
set_nzv32(m_TMP1);
@@ -316,7 +319,7 @@ macro jsr32 %opc %spreg
01006b80 fffffff8 0 mov.l r32l abs16 h
prefetch_start
m_TMP1 = r32_r(m_IR[1]);
- m_TMP2 = int16_t(m_IR[2]);
+ m_TMP2 = s16(m_IR[2]);
set_nzv32(m_TMP1);
write16(m_TMP2, m_TMP1 >> 16);
write16(m_TMP2+2, m_TMP1);
@@ -350,14 +353,14 @@ macro jsr32 %opc %spreg
m_TMP2 = r32_r(m_IR[1] >> 4);
m_TMP2 -= 4;
r32_w(m_IR[1] >> 4, m_TMP2);
+ set_nzv32(m_TMP1);
write16(m_TMP2, m_TMP1 >> 16);
write16(m_TMP2+2, m_TMP1);
- set_nzv32(m_TMP1);
prefetch_done();
01006f00 ffffff88 0 mov.l r32d16h r32l h
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
m_TMP2 = read16(m_TMP1) << 16;
m_TMP2 |= read16(m_TMP1+2);
set_nzv32(m_TMP2);
@@ -366,7 +369,7 @@ macro jsr32 %opc %spreg
01006f80 ffffff88 0 mov.l r32l r32d16h h
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
m_TMP2 = r32_r(m_IR[1]);
set_nzv32(m_TMP2);
write16(m_TMP1, m_TMP2 >> 16);
@@ -536,7 +539,7 @@ macro jsr32 %opc %spreg
01406b00 ffffffff 0 ldc.w abs16 ccr h
prefetch_start
- m_TMP1 = int16_t(m_IR[2]);
+ m_TMP1 = s16(m_IR[2]);
m_CCR = read16(m_TMP1) >> 8;
update_irq_filter();
prefetch_done_noirq();
@@ -550,7 +553,7 @@ macro jsr32 %opc %spreg
01406b80 ffffffff 0 stc.w ccr abs16 h
prefetch_start
- m_TMP1 = int16_t(m_IR[2]);
+ m_TMP1 = s16(m_IR[2]);
write16(m_TMP1, (m_CCR << 8) | m_CCR);
prefetch_done();
@@ -579,14 +582,14 @@ macro jsr32 %opc %spreg
01406f00 ffffff8f 0 ldc.w r32d16h ccr h
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
m_CCR = read16(m_TMP1) >> 8;
update_irq_filter();
prefetch_done_noirq();
01406f80 ffffff8f 0 stc.w ccr r32d16h h
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
write16(m_TMP1, (m_CCR << 8) | m_CCR);
prefetch_done();
@@ -638,7 +641,7 @@ macro jsr32 %opc %spreg
01416b00 ffffffff 0 ldc.w abs16 exr s20
prefetch_start
- m_TMP1 = int16_t(m_IR[2]);
+ m_TMP1 = s16(m_IR[2]);
m_EXR = (read16(m_TMP1) >> 8) | EXR_NC;
update_irq_filter();
prefetch_done_noirq();
@@ -652,7 +655,7 @@ macro jsr32 %opc %spreg
01416b80 ffffffff 0 stc.w exr abs16 s20
prefetch_start
- m_TMP1 = int16_t(m_IR[2]);
+ m_TMP1 = s16(m_IR[2]);
write16(m_TMP1, (m_EXR << 8) | m_EXR);
prefetch_done();
@@ -681,14 +684,14 @@ macro jsr32 %opc %spreg
01416f00 ffffff8f 0 ldc.w r32d16h exr s20
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
m_EXR = (read16(m_TMP1) >> 8) | EXR_NC;
update_irq_filter();
prefetch_done_noirq();
01416f80 ffffff8f 0 stc.w exr r32d16h s20
prefetch_start
- m_TMP1 = r32_r(m_IR[1] >> 4) + int16_t(m_IR[2]);
+ m_TMP1 = r32_r(m_IR[1] >> 4) + s16(m_IR[2]);
write16(m_TMP1, (m_EXR << 8) | m_EXR);
prefetch_done();
@@ -711,7 +714,7 @@ macro jsr32 %opc %spreg
r32_w(m_IR[1], r32_r(m_IR[1]) + 2);
m_TMP2 = read16(r32_r(m_IR[1] >> 4));
r32_w(m_IR[1] >> 4, r32_r(m_IR[1] >> 4) + 2);
- m_MAC += int16_t(m_TMP1)*int16_t(m_TMP2);
+ m_MAC += s16(m_TMP1)*s16(m_TMP2);
m_MACF &= ~(F_Z|F_N);
if(m_MAC)
m_MACF |= F_Z;
@@ -738,10 +741,17 @@ macro jsr32 %opc %spreg
0180 ffff 0 sleep - -
prefetch_start
- while(!m_irq_vector) {
- eat-all-cycles;
+ if(m_standby_pending) {
+ m_standby_time = total_cycles();
+ notify_standby(1);
+ suspend(SUSPEND_REASON_CLOCK, true);
+ m_standby_cb(1);
+ } else {
+ while(!m_irq_vector) {
+ eat-all-cycles;
+ }
+ prefetch_done();
}
- prefetch_done();
01a0 ffff 0 clrmac - - s26
prefetch_start
@@ -752,7 +762,7 @@ macro jsr32 %opc %spreg
01c05000 ffffff00 0 mulxs.b r8h r16l h
prefetch_start
- m_TMP1 = int8_t(r16_r(m_IR[1])) * int8_t(r8_r(m_IR[1] >> 4));
+ m_TMP1 = s8(r16_r(m_IR[1])) * s8(r8_r(m_IR[1] >> 4));
set_nz16(m_TMP1);
r16_w(m_IR[1], m_TMP1);
internal(m_has_mac ? 2 : 11);
@@ -760,7 +770,7 @@ macro jsr32 %opc %spreg
01c05200 ffffff08 0 mulxs.w r16h r32l h
prefetch_start
- m_TMP1 = int16_t(r32_r(m_IR[1])) * int16_t(r16_r(m_IR[1] >> 4));
+ m_TMP1 = s16(r32_r(m_IR[1])) * s16(r16_r(m_IR[1] >> 4));
set_nz32(m_TMP1);
r32_w(m_IR[1], m_TMP1);
internal(m_has_mac ? 3 : 19);
@@ -769,8 +779,8 @@ macro jsr32 %opc %spreg
01d05100 ffffff00 0 divxs.b r8h r16l h
prefetch_start
internal(11);
- m_TMP1 = int16_t(r16_r(m_IR[1]));
- m_TMP2 = int8_t(r8_r(m_IR[1] >> 4));
+ m_TMP1 = s16(r16_r(m_IR[1]));
+ m_TMP2 = s8(r8_r(m_IR[1] >> 4));
m_CCR &= ~(F_Z|F_N);
if(!m_TMP2) {
m_CCR |= F_Z;
@@ -778,39 +788,31 @@ macro jsr32 %opc %spreg
// Conditions:
// p = q*d + r
// abs(r) < abs(d)
- // d and r are same sign or r=0
+ // p and r are same sign or r=0
// p = +20, d = +3 -> q = 6, r = 2
- // p = +20, d = -3 -> q = -6, r = -2
- // p = -20, d = +3 -> q = -7, r = 1
+ // p = +20, d = -3 -> q = -7, r = 1
+ // p = -20, d = +3 -> q = -6, r = -2
// p = -20, d = -3 -> q = 7, r = -1
int q, r;
if(m_TMP2 & 0x80000000) {
if(m_TMP1 & 0x80000000) { // - -
q = (-m_TMP1) / (-m_TMP2);
- r = (-m_TMP1) % (-m_TMP2);
- if(r) {
- r = r + m_TMP2;
- q++;
- }
+ r = -((-m_TMP1) % (-m_TMP2));
} else { // + -
- m_CCR |= F_N;
q = -(m_TMP1 / (-m_TMP2));
- r = -(m_TMP1 % (-m_TMP2));
+ r = m_TMP1 % (-m_TMP2);
}
} else {
if(m_TMP1 & 0x80000000) { // - +
- m_CCR |= F_N;
q = -((-m_TMP1) / m_TMP2);
- r = (-m_TMP1) % m_TMP2;
- if(r) {
- r = m_TMP2 - r;
- q--;
- }
+ r = -((-m_TMP1) % m_TMP2);
} else { // + +
q = m_TMP1 / m_TMP2;
r = m_TMP1 % m_TMP2;
}
}
+ if(q < 0)
+ m_CCR |= F_N;
r16_w(m_IR[1], (q & 0xff) | ((r & 0xff) << 8));
}
prefetch_done();
@@ -819,7 +821,7 @@ macro jsr32 %opc %spreg
prefetch_start
internal(19);
m_TMP1 = r32_r(m_IR[1]);
- m_TMP2 = int16_t(r16_r(m_IR[1] >> 4));
+ m_TMP2 = s16(r16_r(m_IR[1] >> 4));
m_CCR &= ~(F_Z|F_N);
if(!m_TMP2) {
m_CCR |= F_Z;
@@ -827,39 +829,31 @@ macro jsr32 %opc %spreg
// Conditions:
// p = q*d + r
// abs(r) < abs(d)
- // d and r are same sign or r=0
+ // p and r are same sign or r=0
// p = +20, d = +3 -> q = 6, r = 2
- // p = +20, d = -3 -> q = -6, r = -2
- // p = -20, d = +3 -> q = -7, r = 1
+ // p = +20, d = -3 -> q = -7, r = 1
+ // p = -20, d = +3 -> q = -6, r = -2
// p = -20, d = -3 -> q = 7, r = -1
int q, r;
if(m_TMP2 & 0x80000000) {
if(m_TMP1 & 0x80000000) { // - -
q = (-m_TMP1) / (-m_TMP2);
- r = (-m_TMP1) % (-m_TMP2);
- if(r) {
- r = r + m_TMP2;
- q++;
- }
+ r = -((-m_TMP1) % (-m_TMP2));
} else { // + -
- m_CCR |= F_N;
q = -(m_TMP1 / (-m_TMP2));
- r = -(m_TMP1 % (-m_TMP2));
+ r = m_TMP1 % (-m_TMP2);
}
} else {
if(m_TMP1 & 0x80000000) { // - +
- m_CCR |= F_N;
q = -((-m_TMP1) / m_TMP2);
- r = (-m_TMP1) % m_TMP2;
- if(r) {
- r = m_TMP2 - r;
- q--;
- }
+ r = -((-m_TMP1) % m_TMP2);
} else { // + +
q = m_TMP1 / m_TMP2;
r = m_TMP1 % m_TMP2;
}
}
+ if(q < 0)
+ m_CCR |= F_N;
r32_w(m_IR[1], (q & 0xffff) | ((r & 0xffff) << 16));
}
prefetch_done();
@@ -926,7 +920,7 @@ macro jsr32 %opc %spreg
m_TMP1 |= 0xfffffc00;
else
m_TMP1 &= ~0xfffffc00;
- m_MAC = (m_MAC & 0x00000000ffffffffULL) | (uint64_t(m_TMP1) << 32);
+ m_MAC = (m_MAC & 0x00000000ffffffffULL) | (u64(m_TMP1) << 32);
m_MACF &= ~F_V;
prefetch_done();
@@ -997,10 +991,6 @@ macro jsr32 %opc %spreg
r32_w(m_IR[0], r32_r(m_IR[0])+2);
prefetch
-0b90 fff8 0 adds.l four r16l o
- r16_w(m_IR[0], r16_r(m_IR[0])+4);
- prefetch
-
0b90 fff8 0 adds.l four r32l h
r32_w(m_IR[0], r32_r(m_IR[0])+4);
prefetch
@@ -1289,18 +1279,14 @@ macro jsr32 %opc %spreg
prefetch
1750 fff0 0 extu.w r16l - h
- m_CCR &= ~(F_N|F_Z|F_V);
- m_TMP1 = uint8_t(r16_r(m_IR[0]));
- if(!m_TMP1)
- m_CCR |= F_Z;
+ m_TMP1 = u8(r16_r(m_IR[0]));
+ set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
prefetch
1770 fff8 0 extu.l r32l - h
- m_CCR &= ~(F_N|F_Z|F_V);
- m_TMP1 = uint16_t(r32_r(m_IR[0]));
- if(!m_TMP1)
- m_CCR |= F_Z;
+ m_TMP1 = u16(r32_r(m_IR[0]));
+ set_nzv32(m_TMP1);
r32_w(m_IR[0], m_TMP1);
prefetch
@@ -1317,18 +1303,14 @@ macro jsr32 %opc %spreg
prefetch
17d0 fff0 0 exts.w r16l - h
- m_CCR &= ~(F_N|F_Z|F_V);
- m_TMP1 = int8_t(r16_r(m_IR[0]));
- if(!m_TMP1)
- m_CCR |= F_Z;
+ m_TMP1 = s8(r16_r(m_IR[0]));
+ set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
prefetch
17f0 fff8 0 exts.l r32l - h
- m_CCR &= ~(F_N|F_Z|F_V);
- m_TMP1 = int16_t(r32_r(m_IR[0]));
- if(!m_TMP1)
- m_CCR |= F_Z;
+ m_TMP1 = s16(r32_r(m_IR[0]));
+ set_nzv32(m_TMP1);
r32_w(m_IR[0], m_TMP1);
prefetch
@@ -1356,7 +1338,7 @@ macro jsr32 %opc %spreg
r32_w(m_IR[0], r32_r(m_IR[0])-1);
prefetch
-1b50 fff0 0 dec.w one r16l
+1b50 fff0 0 dec.w one r16l h
r16_w(m_IR[0], do_dec16(r16_r(m_IR[0]), 1));
prefetch
@@ -1372,15 +1354,11 @@ macro jsr32 %opc %spreg
r32_w(m_IR[0], r32_r(m_IR[0])-2);
prefetch
-1b90 fff8 0 subs.l four r16l o
- r16_w(m_IR[0], r16_r(m_IR[0])-4);
- prefetch
-
1b90 fff8 0 subs.l four r32l h
r32_w(m_IR[0], r32_r(m_IR[0])-4);
prefetch
-1bd0 fff0 0 dec.w two r16l
+1bd0 fff0 0 dec.w two r16l h
r16_w(m_IR[0], do_dec16(r16_r(m_IR[0]), 2));
prefetch
@@ -1488,7 +1466,7 @@ macro jsr32 %opc %spreg
5000 ff00 0 mulxu.b r8h r16l
prefetch_start
- r16_w(m_IR[0], uint8_t(r16_r(m_IR[0])) * r8_r(m_IR[0] >> 4));
+ r16_w(m_IR[0], u8(r16_r(m_IR[0])) * r8_r(m_IR[0] >> 4));
internal(m_has_mac ? 2 : 11);
prefetch_done();
@@ -1511,7 +1489,7 @@ macro jsr32 %opc %spreg
5200 ff08 0 mulxu.w r16h r32l h
prefetch_start
- r32_w(m_IR[0], uint16_t(r32_r(m_IR[0])) * r16_r(m_IR[0] >> 4));
+ r32_w(m_IR[0], u16(r32_r(m_IR[0])) * r16_r(m_IR[0] >> 4));
internal(m_has_mac ? 3 : 19);
prefetch_done();
@@ -1557,48 +1535,48 @@ macro jsr32 %opc %spreg
prefetch
5500 ff00 0 bsr rel8 - o
+ fetch_noinc
m_TMP2 = m_PC;
- m_PC += int8_t(m_IR[0]);
+ m_PC += s8(m_IR[0]);
jsr16 m_TMP2 m_TMP1
5500 ff00 0 bsr rel8 - h
+ fetch_noinc
m_TMP2 = m_PC;
- m_PC += int8_t(m_IR[0]);
+ m_PC += s8(m_IR[0]);
jsr32 m_TMP2 m_TMP1
5670 ffff 0 rte - - o
fetch
m_TMP1 = r16_r(7);
m_CCR = read16(m_TMP1) >> 8;
- m_TMP1 = r16_r(7);
m_TMP2 = read16(m_TMP1+2);
r16_w(7, m_TMP1+4);
internal(1);
m_PC = m_TMP2;
update_irq_filter();
- prefetch_noirq_notrace
+ prefetch_notrace
5670 ffff 0 rte - - h
fetch
m_TMP1 = r32_r(7);
+ if(exr_in_stack()) {
+ m_EXR = (read16(m_TMP1) >> 8) | EXR_NC;
+ m_TMP1 += 2;
+ }
+ m_TMP2 = read16(m_TMP1);
+ m_CCR = m_TMP2 >> 8;
if(m_mode_advanced) {
- if(exr_in_stack()) {
- m_EXR = (read16(m_TMP1) >> 8) | EXR_NC;
- m_TMP1 += 2;
- }
- m_TMP2 = read16(m_TMP1);
- m_CCR = m_TMP2 >> 8;
m_TMP2 = (m_TMP2 & 0xff) << 16;
m_TMP2 |= read16(m_TMP1+2);
- r32_w(7, m_TMP1+4);
} else {
- m_TMP2 = read16(m_TMP1);
- r32_w(7, m_TMP1+2);
+ m_TMP2 = read16(m_TMP1+2);
}
+ r32_w(7, m_TMP1+4);
internal(1);
m_PC = m_TMP2;
update_irq_filter();
- prefetch_noirq_notrace
+ prefetch_notrace
5700 ffcf 0 trapa imm2 - h
internal(1);
@@ -1715,15 +1693,17 @@ macro jsr32 %opc %spreg
5c00 ffff 0 bsr rel16 - h
internal(1);
m_TMP2 = m_PC;
- m_PC += int16_t(m_IR[1]);
+ m_PC += s16(m_IR[1]);
jsr32 m_TMP2 m_TMP1
5d00 ff8f 0 jsr r16h - o
+ fetch_noinc
m_TMP2 = m_PC;
m_PC = r16_r(m_IR[0] >> 4);
jsr16 m_TMP2 m_TMP1
5d00 ff8f 0 jsr r32h - h
+ fetch_noinc
m_TMP2 = m_PC;
m_PC = r32_r(m_IR[0] >> 4);
jsr32 m_TMP2 m_TMP1
@@ -1741,13 +1721,13 @@ macro jsr32 %opc %spreg
jsr32 m_TMP2 m_TMP1
5f00 ff00 0 jsr abs8i - o
- fetch
+ fetch_noinc
m_TMP2 = m_PC;
m_PC = read16(m_IR[0] & 0xff);
jsr16 m_TMP2 m_TMP1
5f00 ff00 0 jsr abs8i - h
- fetch
+ fetch_noinc
m_TMP2 = m_PC;
if(m_mode_advanced) {
m_TMP1 = read16(m_IR[0] & 0xff) << 16;
@@ -1869,129 +1849,129 @@ macro jsr32 %opc %spreg
6a00 fff0 0 mov.b abs16 r8l
prefetch_start
- m_TMP1 = read8(int16_t(m_IR[1]));
+ m_TMP1 = read8(s16(m_IR[1]));
set_nzv8(m_TMP1);
r8_w(m_IR[0], m_TMP1);
prefetch_done();
-6a106300 ffffff0f 1 btst r8h abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a106300 ffffff0f 1 btst r8h abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
btst r8_r(m_IR[2] >> 4)
prefetch
-6a107300 ffffff8f 1 btst imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107300 ffffff8f 1 btst imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
btst m_IR[2] >> 4
prefetch
-6a107400 ffffff8f 1 bor imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107400 ffffff8f 1 bor imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bor m_IR[2] >> 4
prefetch
-6a107480 ffffff8f 1 bior imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107480 ffffff8f 1 bior imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bior m_IR[2] >> 4
prefetch
-6a107500 ffffff8f 1 bxor imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107500 ffffff8f 1 bxor imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bxor m_IR[2] >> 4
prefetch
-6a107580 ffffff8f 1 bixor imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107580 ffffff8f 1 bixor imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bixor m_IR[2] >> 4
prefetch
-6a107600 ffffff8f 1 band imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107600 ffffff8f 1 band imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
band m_IR[2] >> 4
prefetch
-6a107680 ffffff8f 1 biand imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107680 ffffff8f 1 biand imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
biand m_IR[2] >> 4
prefetch
-6a107700 ffffff8f 1 bld imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107700 ffffff8f 1 bld imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bld m_IR[2] >> 4
prefetch
-6a107780 ffffff8f 1 bild imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a107780 ffffff8f 1 bild imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
bild m_IR[2] >> 4
prefetch
-6a186000 ffffff0f 1 bset r8h abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a186000 ffffff0f 1 bset r8h abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bset r8_r(m_IR[2] >> 4)
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a186100 ffffff0f 1 bnot r8h abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a186100 ffffff0f 1 bnot r8h abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bnot r8_r(m_IR[2] >> 4)
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a186200 ffffff0f 1 bclr r8h abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a186200 ffffff0f 1 bclr r8h abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bclr r8_r(m_IR[2] >> 4)
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a186700 ffffff8f 1 bst imm3 abs16
- m_TMP2 = int16_t(m_IR[2]);
+6a186700 ffffff8f 1 bst imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bst m_IR[2] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a186780 ffffff8f 1 bist imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a186780 ffffff8f 1 bist imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bist m_IR[2] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a187000 ffffff8f 1 bset imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a187000 ffffff8f 1 bset imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bset m_IR[2] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a187100 ffffff8f 1 bnot imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a187100 ffffff8f 1 bnot imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bnot m_IR[2] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a187200 ffffff8f 1 bclr imm3 abs16
- m_TMP2 = int16_t(m_IR[1]);
+6a187200 ffffff8f 1 bclr imm3 abs16 s20
+ m_TMP2 = s16(m_IR[1]);
m_TMP1 = read8(m_TMP2);
prefetch_start
bclr m_IR[2] >> 4
@@ -2005,67 +1985,67 @@ macro jsr32 %opc %spreg
r8_w(m_IR[0], m_TMP1);
prefetch_done();
-6a306300 ffffff0f 2 btst r8h abs32 h
+6a306300 ffffff0f 2 btst r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
btst r8_r(m_IR[3] >> 4)
prefetch
-6a307300 ffffff8f 2 btst imm3 abs32 h
+6a307300 ffffff8f 2 btst imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
btst m_IR[3] >> 4
prefetch
-6a307400 ffffff8f 2 bor imm3 abs32 h
+6a307400 ffffff8f 2 bor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bor m_IR[3] >> 4
prefetch
-6a307480 ffffff8f 2 bior imm3 abs32 h
+6a307480 ffffff8f 2 bior imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bior m_IR[3] >> 4
prefetch
-6a307500 ffffff8f 2 bxor imm3 abs32 h
+6a307500 ffffff8f 2 bxor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bxor m_IR[3] >> 4
prefetch
-6a307580 ffffff8f 2 bixor imm3 abs32 h
+6a307580 ffffff8f 2 bixor imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bixor m_IR[3] >> 4
prefetch
-6a307600 ffffff8f 2 band imm3 abs32 h
+6a307600 ffffff8f 2 band imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
band m_IR[3] >> 4
prefetch
-6a307680 ffffff8f 2 biand imm3 abs32 h
+6a307680 ffffff8f 2 biand imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
biand m_IR[3] >> 4
prefetch
-6a307700 ffffff8f 2 bld imm3 abs32 h
+6a307700 ffffff8f 2 bld imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bld m_IR[3] >> 4
prefetch
-6a307780 ffffff8f 2 bild imm3 abs32 h
+6a307780 ffffff8f 2 bild imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
bild m_IR[3] >> 4
prefetch
-6a386000 ffffff0f 2 bset r8h abs32 h
+6a386000 ffffff0f 2 bset r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2073,7 +2053,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a386100 ffffff0f 2 bnot r8h abs32 h
+6a386100 ffffff0f 2 bnot r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2081,7 +2061,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a386200 ffffff0f 2 bclr r8h abs32 h
+6a386200 ffffff0f 2 bclr r8h abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2089,7 +2069,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a386700 ffffff8f 2 bst imm3 abs32 h
+6a386700 ffffff8f 2 bst imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2097,7 +2077,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a386780 ffffff8f 2 bist imm3 abs32 h
+6a386780 ffffff8f 2 bist imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2105,7 +2085,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a387000 ffffff8f 2 bset imm3 abs32 h
+6a387000 ffffff8f 2 bset imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2113,7 +2093,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a387100 ffffff8f 2 bnot imm3 abs32 h
+6a387100 ffffff8f 2 bnot imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2121,7 +2101,7 @@ macro jsr32 %opc %spreg
write8(m_TMP2, m_TMP1);
prefetch_done();
-6a387200 ffffff8f 2 bclr imm3 abs32 h
+6a387200 ffffff8f 2 bclr imm3 abs32 s20
m_TMP2 = (m_IR[1] << 16) | m_IR[2];
m_TMP1 = read8(m_TMP2);
prefetch_start
@@ -2130,11 +2110,18 @@ macro jsr32 %opc %spreg
prefetch_done();
6a40 fff0 0 movfpe abs16 r8l
+ // TODO: timing
+ prefetch_start
+ m_TMP1 = read8(s16(m_IR[1]));
+ set_nzv8(m_TMP1);
+ r8_w(m_IR[0], m_TMP1);
+ prefetch_done();
+
6a80 fff0 0 mov.b r8l abs16
prefetch_start
m_TMP1 = r8_r(m_IR[0]);
set_nzv8(m_TMP1);
- write8(int16_t(m_IR[1]), m_TMP1);
+ write8(s16(m_IR[1]), m_TMP1);
prefetch_done();
6aa0 fff0 0 mov.b r8l abs32 h
@@ -2145,9 +2132,16 @@ macro jsr32 %opc %spreg
prefetch_done();
6ac0 fff0 0 movtpe r8l abs16
+ // TODO: timing
+ prefetch_start
+ m_TMP1 = r8_r(m_IR[0]);
+ set_nzv8(m_TMP1);
+ write8(s16(m_IR[1]), m_TMP1);
+ prefetch_done();
+
6b00 fff0 0 mov.w abs16 r16l
prefetch_start
- m_TMP1 = read16(int16_t(m_IR[1]));
+ m_TMP1 = read16(s16(m_IR[1]));
set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
prefetch_done();
@@ -2163,7 +2157,7 @@ macro jsr32 %opc %spreg
prefetch_start
m_TMP1 = r16_r(m_IR[0]);
set_nzv16(m_TMP1);
- write16(int16_t(m_IR[1]), m_TMP1);
+ write16(s16(m_IR[1]), m_TMP1);
prefetch_done();
6ba0 fff0 0 mov.w r16l abs32 h
@@ -2263,7 +2257,7 @@ macro jsr32 %opc %spreg
6e00 ff80 0 mov.b r16d16h r8l o
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + s16(m_IR[1]));
m_TMP2 = read8(m_TMP1);
set_nzv8(m_TMP2);
r8_w(m_IR[0], m_TMP2);
@@ -2271,7 +2265,7 @@ macro jsr32 %opc %spreg
6e00 ff80 0 mov.b r32d16h r8l h
prefetch_start
- m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]);
+ m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]);
m_TMP2 = read8(m_TMP1);
set_nzv8(m_TMP2);
r8_w(m_IR[0], m_TMP2);
@@ -2279,7 +2273,7 @@ macro jsr32 %opc %spreg
6e80 ff80 0 mov.b r8l r16d16h o
prefetch_start
- m_TMP1 = uint16_t(r16_r((m_IR[0] >> 4) & 7) + m_IR[1]);
+ m_TMP1 = u16(r16_r((m_IR[0] >> 4) & 7) + s16(m_IR[1]));
m_TMP2 = r8_r(m_IR[0]);
set_nzv8(m_TMP2);
write8(m_TMP1, m_TMP2);
@@ -2287,7 +2281,7 @@ macro jsr32 %opc %spreg
6e80 ff80 0 mov.b r8l r32d16h h
prefetch_start
- m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]);
+ m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]);
m_TMP2 = r8_r(m_IR[0]);
set_nzv8(m_TMP2);
write8(m_TMP1, m_TMP2);
@@ -2295,7 +2289,7 @@ macro jsr32 %opc %spreg
6f00 ff80 0 mov.w r16d16h r16l o
prefetch_start
- m_TMP1 = uint16_t(r16_r(m_IR[0] >> 4) + m_IR[1]);
+ m_TMP1 = u16(r16_r(m_IR[0] >> 4) + s16(m_IR[1]));
m_TMP2 = read16(m_TMP1);
set_nzv16(m_TMP2);
r16_w(m_IR[0], m_TMP2);
@@ -2303,7 +2297,7 @@ macro jsr32 %opc %spreg
6f00 ff80 0 mov.w r32d16h r16l h
prefetch_start
- m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]);
+ m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]);
m_TMP2 = read16(m_TMP1);
set_nzv16(m_TMP2);
r16_w(m_IR[0], m_TMP2);
@@ -2311,7 +2305,7 @@ macro jsr32 %opc %spreg
6f80 ff80 0 mov.w r16l r16d16h o
prefetch_start
- m_TMP1 = uint16_t(r16_r((m_IR[0] >> 4) & 7) + m_IR[1]);
+ m_TMP1 = u16(r16_r((m_IR[0] >> 4) & 7) + s16(m_IR[1]));
m_TMP2 = r16_r(m_IR[0]);
set_nzv16(m_TMP2);
write16(m_TMP1, m_TMP2);
@@ -2319,7 +2313,7 @@ macro jsr32 %opc %spreg
6f80 ff80 0 mov.w r16l r32d16h h
prefetch_start
- m_TMP1 = r32_r(m_IR[0] >> 4) + int16_t(m_IR[1]);
+ m_TMP1 = r32_r(m_IR[0] >> 4) + s16(m_IR[1]);
m_TMP2 = r16_r(m_IR[0]);
set_nzv16(m_TMP2);
write16(m_TMP1, m_TMP2);
@@ -2425,31 +2419,31 @@ macro jsr32 %opc %spreg
r16_w(m_IR[0], m_IR[1]);
prefetch
-7910 fff0 0 add.w imm16 r16l
+7910 fff0 0 add.w imm16 r16l h
r16_w(m_IR[0], do_add16(r16_r(m_IR[0]), m_IR[1]));
prefetch
-7920 fff0 0 cmp.w imm16 r16l
+7920 fff0 0 cmp.w imm16 r16l h
do_sub16(r16_r(m_IR[0]), m_IR[1]);
prefetch
-7930 fff0 0 sub.w imm16 r16l
+7930 fff0 0 sub.w imm16 r16l h
r16_w(m_IR[0], do_sub16(r16_r(m_IR[0]), m_IR[1]));
prefetch
-7940 fff0 0 or.w imm16 r16l
+7940 fff0 0 or.w imm16 r16l h
m_TMP1 = m_IR[1] | r16_r(m_IR[0]);
set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
prefetch
-7950 fff0 0 xor.w imm16 r16l
+7950 fff0 0 xor.w imm16 r16l h
m_TMP1 = m_IR[1] ^ r16_r(m_IR[0]);
set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
prefetch
-7960 fff0 0 and.w imm16 r16l
+7960 fff0 0 and.w imm16 r16l h
m_TMP1 = m_IR[1] & r16_r(m_IR[0]);
set_nzv16(m_TMP1);
r16_w(m_IR[0], m_TMP1);
@@ -2857,7 +2851,7 @@ macro jsr32 %opc %spreg
m_TMP2 = 0xffffff00 | m_IR[0];
m_TMP1 = read8(m_TMP2);
prefetch_start
- bst m_IR[0] >> 4
+ bst m_IR[1] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
@@ -2865,7 +2859,7 @@ macro jsr32 %opc %spreg
m_TMP2 = 0xffffff00 | m_IR[0];
m_TMP1 = read8(m_TMP2);
prefetch_start
- bist m_IR[0] >> 4
+ bist m_IR[1] >> 4
write8(m_TMP2, m_TMP1);
prefetch_done();
@@ -2902,7 +2896,7 @@ macro jsr32 %opc %spreg
prefetch
a000 f000 0 cmp.b imm8 r8u
- do_sub8(r8_r(m_IR[0]>>8), m_IR[0]);
+ do_sub8(r8_r(m_IR[0] >> 8), m_IR[0]);
prefetch
b000 f000 0 subx.b imm8 r8u
diff --git a/src/devices/cpu/h8/h83002.cpp b/src/devices/cpu/h8/h83002.cpp
index 3501a466bd3..320d7ea9012 100644
--- a/src/devices/cpu/h8/h83002.cpp
+++ b/src/devices/cpu/h8/h83002.cpp
@@ -5,7 +5,7 @@
DEFINE_DEVICE_TYPE(H83002, h83002_device, "h83002", "Hitachi H8/3002")
-h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83002_device::h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8h_device(mconfig, H83002, tag, owner, clock, address_map_constructor(FUNC(h83002_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -26,9 +26,9 @@ h83002_device::h83002_device(const machine_config &mconfig, const char *tag, dev
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_watchdog(*this, "watchdog"),
- m_tend_cb(*this)
+ m_tend_cb(*this),
+ m_syscr(0)
{
- m_syscr = 0;
}
void h83002_device::map(address_map &map)
@@ -113,18 +113,18 @@ void h83002_device::map(address_map &map)
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
- map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc5, base | 0xffc5).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc9, base | 0xffc9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffcb, base | 0xffcb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffcd, base | 0xffcd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffcd, base | 0xffcd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffce, base | 0xffce).r(m_port7, FUNC(h8_port_device::port_r));
map(base | 0xffcf, base | 0xffcf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd0, base | 0xffd0).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd1, base | 0xffd1).w(m_porta, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd0, base | 0xffd0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd1, base | 0xffd1).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd2, base | 0xffd2).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd3, base | 0xffd3).rw(m_porta, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd4, base | 0xffd4).w(m_portb, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd4, base | 0xffd4).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd6, base | 0xffd6).rw(m_portb, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffda, base | 0xffda).rw(m_port4, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
@@ -216,9 +216,9 @@ void h83002_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83002_device::internal_update(uint64_t current_time)
+void h83002_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -233,37 +233,54 @@ void h83002_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83002_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83002_device::device_start()
{
h8h_device::device_start();
m_dma_device = m_dma;
+
+ save_item(NAME(m_syscr));
+ save_item(NAME(m_rtmcsr));
}
void h83002_device::device_reset()
{
h8h_device::device_reset();
m_syscr = 0x09;
+ m_rtmcsr = 0x00;
}
-uint8_t h83002_device::syscr_r()
+u8 h83002_device::syscr_r()
{
return m_syscr;
}
-void h83002_device::syscr_w(uint8_t data)
+void h83002_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
logerror("syscr = %02x\n", data);
}
-uint8_t h83002_device::rtmcsr_r()
+u8 h83002_device::rtmcsr_r()
{
// set bit 7 -- Compare Match Flag (CMF): This status flag indicates that the RTCNT and RTCOR values have matched.
return m_rtmcsr | 0x80;
}
-void h83002_device::rtmcsr_w(uint8_t data)
+void h83002_device::rtmcsr_w(u8 data)
{
m_rtmcsr = data;
logerror("rtmcsr = %02x\n", data);
diff --git a/src/devices/cpu/h8/h83002.h b/src/devices/cpu/h8/h83002.h
index ff42585b7ae..c0d0dc53f19 100644
--- a/src/devices/cpu/h8/h83002.h
+++ b/src/devices/cpu/h8/h83002.h
@@ -27,7 +27,7 @@
class h83002_device : public h8h_device {
public:
- h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto tend0() { return m_tend_cb[0].bind(); }
auto tend1() { return m_tend_cb[1].bind(); }
@@ -49,11 +49,11 @@ public:
void set_mode_a20() { m_mode_a20 = true; }
void set_mode_a24() { m_mode_a20 = false; }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
- uint8_t rtmcsr_r();
- void rtmcsr_w(uint8_t data);
+ u8 rtmcsr_r();
+ void rtmcsr_w(u8 data);
protected:
required_device<h8h_intc_device> m_intc;
@@ -76,21 +76,22 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
- uint8_t m_rtmcsr;
-
devcb_write_line::array<2> m_tend_cb;
+ u8 m_syscr;
+ u8 m_rtmcsr;
+
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
diff --git a/src/devices/cpu/h8/h83003.cpp b/src/devices/cpu/h8/h83003.cpp
index 9a90b646b8f..caf282680b2 100644
--- a/src/devices/cpu/h8/h83003.cpp
+++ b/src/devices/cpu/h8/h83003.cpp
@@ -5,7 +5,7 @@
DEFINE_DEVICE_TYPE(H83003, h83003_device, "h83003", "Hitachi H8/3003")
-h83003_device::h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83003_device::h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8h_device(mconfig, H83003, tag, owner, clock, address_map_constructor(FUNC(h83003_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -30,9 +30,9 @@ h83003_device::h83003_device(const machine_config &mconfig, const char *tag, dev
m_timer16_3(*this, "timer16:3"),
m_timer16_4(*this, "timer16:4"),
m_watchdog(*this, "watchdog"),
- m_tend_cb(*this)
+ m_tend_cb(*this),
+ m_syscr(0)
{
- m_syscr = 0;
}
void h83003_device::map(address_map &map)
@@ -132,21 +132,21 @@ void h83003_device::map(address_map &map)
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
- map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc5, base | 0xffc5).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc8, base | 0xffc8).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc8, base | 0xffc8).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc9, base | 0xffc9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffca, base | 0xffca).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcb, base | 0xffcb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffcd, base | 0xffcd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffcd, base | 0xffcd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffce, base | 0xffce).r(m_port7, FUNC(h8_port_device::port_r));
map(base | 0xffcf, base | 0xffcf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd0, base | 0xffd0).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd1, base | 0xffd1).w(m_porta, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd0, base | 0xffd0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd1, base | 0xffd1).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd2, base | 0xffd2).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd3, base | 0xffd3).rw(m_porta, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd4, base | 0xffd4).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd5, base | 0xffd5).w(m_portc, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd4, base | 0xffd4).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd5, base | 0xffd5).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd6, base | 0xffd6).rw(m_portb, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd7, base | 0xffd7).rw(m_portc, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffda, base | 0xffda).rw(m_port4, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
@@ -243,9 +243,9 @@ void h83003_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83003_device::internal_update(uint64_t current_time)
+void h83003_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -260,37 +260,54 @@ void h83003_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83003_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83003_device::device_start()
{
h8h_device::device_start();
m_dma_device = m_dma;
+
+ save_item(NAME(m_syscr));
+ save_item(NAME(m_rtmcsr));
}
void h83003_device::device_reset()
{
h8h_device::device_reset();
m_syscr = 0x09;
+ m_rtmcsr = 0x00;
}
-uint8_t h83003_device::syscr_r()
+u8 h83003_device::syscr_r()
{
return m_syscr;
}
-void h83003_device::syscr_w(uint8_t data)
+void h83003_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
logerror("syscr = %02x\n", data);
}
-uint8_t h83003_device::rtmcsr_r()
+u8 h83003_device::rtmcsr_r()
{
// set bit 7 -- Compare Match Flag (CMF): This status flag indicates that the RTCNT and RTCOR values have matched.
return m_rtmcsr | 0x80;
}
-void h83003_device::rtmcsr_w(uint8_t data)
+void h83003_device::rtmcsr_w(u8 data)
{
m_rtmcsr = data;
logerror("rtmcsr = %02x\n", data);
diff --git a/src/devices/cpu/h8/h83003.h b/src/devices/cpu/h8/h83003.h
index e66f21ba2d8..9953da73aab 100644
--- a/src/devices/cpu/h8/h83003.h
+++ b/src/devices/cpu/h8/h83003.h
@@ -27,7 +27,7 @@
class h83003_device : public h8h_device {
public:
- h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83003_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto tend0() { return m_tend_cb[0].bind(); }
auto tend1() { return m_tend_cb[1].bind(); }
@@ -55,11 +55,11 @@ public:
void set_mode_a20() { m_mode_a20 = true; }
void set_mode_a24() { m_mode_a20 = false; }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
- uint8_t rtmcsr_r();
- void rtmcsr_w(uint8_t data);
+ u8 rtmcsr_r();
+ void rtmcsr_w(u8 data);
protected:
required_device<h8h_intc_device> m_intc;
@@ -86,21 +86,22 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
- uint8_t m_rtmcsr;
-
devcb_write_line::array<4> m_tend_cb;
+ u8 m_syscr;
+ u8 m_rtmcsr;
+
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
diff --git a/src/devices/cpu/h8/h83006.cpp b/src/devices/cpu/h8/h83006.cpp
index 8c38995a44f..e6be9b30bd4 100644
--- a/src/devices/cpu/h8/h83006.cpp
+++ b/src/devices/cpu/h8/h83006.cpp
@@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83006, h83006_device, "h83006", "Hitachi H8/3006")
DEFINE_DEVICE_TYPE(H83007, h83007_device, "h83007", "Hitachi H8/3007")
-h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h83006_device::h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83006_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -32,13 +32,13 @@ h83006_device::h83006_device(const machine_config &mconfig, device_type type, co
{
}
-h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83006_device::h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83006_device(mconfig, H83006, tag, owner, clock, 0xff720)
{
}
-h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83007_device::h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83006_device(mconfig, H83007, tag, owner, clock, 0xfef20)
{
}
@@ -47,12 +47,12 @@ void h83006_device::map(address_map &map)
{
const offs_t base = m_mode_a20 ? 0 : 0xf00000;
- map(base | 0xee003, base | 0xee003).w(m_port4, FUNC(h8_port_device::ddr_w));
- map(base | 0xee005, base | 0xee005).w(m_port6, FUNC(h8_port_device::ddr_w));
- map(base | 0xee007, base | 0xee007).w(m_port8, FUNC(h8_port_device::ddr_w));
- map(base | 0xee008, base | 0xee008).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xee009, base | 0xee009).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(base | 0xee00a, base | 0xee00a).w(m_portb, FUNC(h8_port_device::ddr_w));
+ map(base | 0xee003, base | 0xee003).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee005, base | 0xee005).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee007, base | 0xee007).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee008, base | 0xee008).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee009, base | 0xee009).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee00a, base | 0xee00a).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xee012, base | 0xee012).rw(FUNC(h83006_device::syscr_r), FUNC(h83006_device::syscr_w));
map(base | 0xee014, base | 0xee014).rw(m_intc, FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
@@ -207,9 +207,9 @@ void h83006_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83006_device::internal_update(uint64_t current_time)
+void h83006_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -227,9 +227,26 @@ void h83006_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83006_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_sci[2]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer8_2->notify_standby(state);
+ m_timer8_3->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83006_device::device_start()
{
h8h_device::device_start();
+ save_item(NAME(m_syscr));
}
void h83006_device::device_reset()
@@ -238,13 +255,12 @@ void h83006_device::device_reset()
m_syscr = 0x09;
}
-
-uint8_t h83006_device::syscr_r()
+u8 h83006_device::syscr_r()
{
return m_syscr;
}
-void h83006_device::syscr_w(uint8_t data)
+void h83006_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
diff --git a/src/devices/cpu/h8/h83006.h b/src/devices/cpu/h8/h83006.h
index 157cb0f37d9..70075658da0 100644
--- a/src/devices/cpu/h8/h83006.h
+++ b/src/devices/cpu/h8/h83006.h
@@ -27,7 +27,7 @@
class h83006_device : public h8h_device {
public:
- h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port4() { return m_read_port [PORT_4].bind(); }
auto write_port4() { return m_write_port[PORT_4].bind(); }
@@ -46,11 +46,11 @@ public:
void set_mode_a20() { m_mode_a20 = true; }
void set_mode_a24() { m_mode_a20 = false; }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
- h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h83006_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
required_device<h8h_intc_device> m_intc;
required_device<h8_adc_device> m_adc;
@@ -71,26 +71,27 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
- uint32_t m_ram_start;
+ u8 m_syscr;
+ u32 m_ram_start;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h83007_device : public h83006_device {
public:
- h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83007_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H83006, h83006_device)
diff --git a/src/devices/cpu/h8/h83008.cpp b/src/devices/cpu/h8/h83008.cpp
index f4161cc2b8f..035a7da9460 100644
--- a/src/devices/cpu/h8/h83008.cpp
+++ b/src/devices/cpu/h8/h83008.cpp
@@ -5,7 +5,7 @@
DEFINE_DEVICE_TYPE(H83008, h83008_device, "h83008", "Hitachi H8/3008")
-h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83008_device::h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8h_device(mconfig, H83008, tag, owner, clock, address_map_constructor(FUNC(h83008_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -33,12 +33,12 @@ void h83008_device::map(address_map &map)
{
const offs_t base = m_mode_a20 ? 0 : 0xf00000;
- map(base | 0xee003, base | 0xee003).w(m_port4, FUNC(h8_port_device::ddr_w));
- map(base | 0xee005, base | 0xee005).w(m_port6, FUNC(h8_port_device::ddr_w));
- map(base | 0xee007, base | 0xee007).w(m_port8, FUNC(h8_port_device::ddr_w));
- map(base | 0xee008, base | 0xee008).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xee009, base | 0xee009).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(base | 0xee00a, base | 0xee00a).w(m_portb, FUNC(h8_port_device::ddr_w));
+ map(base | 0xee003, base | 0xee003).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee005, base | 0xee005).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee007, base | 0xee007).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee008, base | 0xee008).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee009, base | 0xee009).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xee00a, base | 0xee00a).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xee012, base | 0xee012).rw(FUNC(h83008_device::syscr_r), FUNC(h83008_device::syscr_w));
map(base | 0xee014, base | 0xee014).rw(m_intc, FUNC(h8h_intc_device::iscr_r), FUNC(h8h_intc_device::iscr_w));
@@ -185,9 +185,9 @@ void h83008_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83008_device::internal_update(uint64_t current_time)
+void h83008_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -204,9 +204,25 @@ void h83008_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83008_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer8_2->notify_standby(state);
+ m_timer8_3->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83008_device::device_start()
{
h8h_device::device_start();
+ save_item(NAME(m_syscr));
}
void h83008_device::device_reset()
@@ -215,13 +231,12 @@ void h83008_device::device_reset()
m_syscr = 0x09;
}
-
-uint8_t h83008_device::syscr_r()
+u8 h83008_device::syscr_r()
{
return m_syscr;
}
-void h83008_device::syscr_w(uint8_t data)
+void h83008_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
diff --git a/src/devices/cpu/h8/h83008.h b/src/devices/cpu/h8/h83008.h
index 751e5f833d2..bd859e134f3 100644
--- a/src/devices/cpu/h8/h83008.h
+++ b/src/devices/cpu/h8/h83008.h
@@ -27,7 +27,7 @@
class h83008_device : public h8h_device {
public:
- h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port4() { return m_read_port [PORT_4].bind(); }
auto write_port4() { return m_write_port[PORT_4].bind(); }
@@ -46,8 +46,8 @@ public:
void set_mode_a20() { m_mode_a20 = true; }
void set_mode_a24() { m_mode_a20 = false; }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
required_device<h8h_intc_device> m_intc;
@@ -69,18 +69,19 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_2;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
+ u8 m_syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
diff --git a/src/devices/cpu/h8/h83032.cpp b/src/devices/cpu/h8/h83032.cpp
index 8a560c1882f..a4f23f27f43 100644
--- a/src/devices/cpu/h8/h83032.cpp
+++ b/src/devices/cpu/h8/h83032.cpp
@@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83032, h83032_device, "h83032", "Hitachi H8/3032")
DEFINE_DEVICE_TYPE(H83031, h83031_device, "h83031", "Hitachi H8/3031")
DEFINE_DEVICE_TYPE(H83030, h83030_device, "h83030", "Hitachi H8/3030")
-h83032_device::h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h83032_device::h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83032_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -35,17 +35,17 @@ h83032_device::h83032_device(const machine_config &mconfig, device_type type, co
m_mode_a20 = true;
}
-h83032_device::h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83032_device::h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83032_device(mconfig, H83032, tag, owner, clock, 0xf710)
{
}
-h83031_device::h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83031_device::h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83032_device(mconfig, H83031, tag, owner, clock, 0xfb10)
{
}
-h83030_device::h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83030_device::h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83032_device(mconfig, H83030, tag, owner, clock, 0xfd10)
{
}
@@ -104,25 +104,25 @@ void h83032_device::map(address_map &map)
map(base | 0xffb3, base | 0xffb3).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffb4, base | 0xffb4).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffb5, base | 0xffb5).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
- map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc0, base | 0xffc0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc1, base | 0xffc1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc3, base | 0xffc3).rw(m_port2, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc4, base | 0xffc4).w(m_port3, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc4, base | 0xffc4).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc6, base | 0xffc6).rw(m_port3, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc8, base | 0xffc8).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc8, base | 0xffc8).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc9, base | 0xffc9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffca, base | 0xffca).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcb, base | 0xffcb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffcd, base | 0xffcd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffcd, base | 0xffcd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffce, base | 0xffce).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcf, base | 0xffcf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd0, base | 0xffd0).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd1, base | 0xffd1).w(m_porta, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd0, base | 0xffd0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd1, base | 0xffd1).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd2, base | 0xffd2).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd3, base | 0xffd3).rw(m_porta, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd4, base | 0xffd4).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd5, base | 0xffd5).w(m_portc, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd4, base | 0xffd4).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd5, base | 0xffd5).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd6, base | 0xffd6).rw(m_portb, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd7, base | 0xffd7).rw(m_portc, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd8, base | 0xffd8).rw(m_port2, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
@@ -212,9 +212,9 @@ void h83032_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83032_device::internal_update(uint64_t current_time)
+void h83032_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -228,9 +228,22 @@ void h83032_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83032_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83032_device::device_start()
{
h8h_device::device_start();
+ save_item(NAME(m_syscr));
}
void h83032_device::device_reset()
@@ -239,12 +252,12 @@ void h83032_device::device_reset()
m_syscr = 0x0b;
}
-uint8_t h83032_device::syscr_r()
+u8 h83032_device::syscr_r()
{
return m_syscr;
}
-void h83032_device::syscr_w(uint8_t data)
+void h83032_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
diff --git a/src/devices/cpu/h8/h83032.h b/src/devices/cpu/h8/h83032.h
index e979c42510a..f920205c047 100644
--- a/src/devices/cpu/h8/h83032.h
+++ b/src/devices/cpu/h8/h83032.h
@@ -29,7 +29,7 @@
class h83032_device : public h8h_device {
public:
- h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83032_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -51,11 +51,11 @@ public:
auto read_portb() { return m_read_port [PORT_B].bind(); }
auto write_portb() { return m_write_port[PORT_B].bind(); }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
- h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h83032_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
required_device<h8h_intc_device> m_intc;
required_device<h8_adc_device> m_adc;
@@ -78,30 +78,31 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_watchdog_device> m_watchdog;
- uint32_t m_ram_start;
- uint8_t m_syscr;
+ u32 m_ram_start;
+ u8 m_syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h83031_device : public h83032_device {
public:
- h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83031_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h83030_device : public h83032_device {
public:
- h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H83032, h83032_device)
diff --git a/src/devices/cpu/h8/h83042.cpp b/src/devices/cpu/h8/h83042.cpp
index 10073903ad1..6ff5ded581a 100644
--- a/src/devices/cpu/h8/h83042.cpp
+++ b/src/devices/cpu/h8/h83042.cpp
@@ -7,7 +7,7 @@ DEFINE_DEVICE_TYPE(H83040, h83040_device, "h83040", "Hitachi H8/3040")
DEFINE_DEVICE_TYPE(H83041, h83041_device, "h83041", "Hitachi H8/3041")
DEFINE_DEVICE_TYPE(H83042, h83042_device, "h83042", "Hitachi H8/3042")
-h83042_device::h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h83042_device::h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83042_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -37,17 +37,17 @@ h83042_device::h83042_device(const machine_config &mconfig, device_type type, co
m_mode_a20 = true;
}
-h83040_device::h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83040_device::h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83042_device(mconfig, H83040, tag, owner, clock)
{
}
-h83041_device::h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83041_device::h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83042_device(mconfig, H83041, tag, owner, clock)
{
}
-h83042_device::h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83042_device::h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83042_device(mconfig, H83042, tag, owner, clock)
{
}
@@ -133,26 +133,26 @@ void h83042_device::map(address_map &map)
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
- map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc0, base | 0xffc0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc1, base | 0xffc1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc3, base | 0xffc3).rw(m_port2, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc4, base | 0xffc4).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc4, base | 0xffc4).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc5, base | 0xffc5).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc6, base | 0xffc6).rw(m_port3, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc8, base | 0xffc8).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc8, base | 0xffc8).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc9, base | 0xffc9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffca, base | 0xffca).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcb, base | 0xffcb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffcd, base | 0xffcd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffcd, base | 0xffcd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffce, base | 0xffce).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcf, base | 0xffcf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd0, base | 0xffd0).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd1, base | 0xffd1).w(m_porta, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd0, base | 0xffd0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd1, base | 0xffd1).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd2, base | 0xffd2).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd3, base | 0xffd3).rw(m_porta, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd4, base | 0xffd4).w(m_portb, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd4, base | 0xffd4).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd6, base | 0xffd6).rw(m_portb, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd8, base | 0xffd8).rw(m_port2, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(base | 0xffda, base | 0xffda).rw(m_port4, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
@@ -246,9 +246,9 @@ void h83042_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83042_device::internal_update(uint64_t current_time)
+void h83042_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -263,9 +263,23 @@ void h83042_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83042_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83042_device::device_start()
{
h8h_device::device_start();
+ save_item(NAME(m_syscr));
}
void h83042_device::device_reset()
@@ -274,12 +288,12 @@ void h83042_device::device_reset()
m_syscr = 0x0b;
}
-uint8_t h83042_device::syscr_r()
+u8 h83042_device::syscr_r()
{
return m_syscr;
}
-void h83042_device::syscr_w(uint8_t data)
+void h83042_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
diff --git a/src/devices/cpu/h8/h83042.h b/src/devices/cpu/h8/h83042.h
index 1b0f8b1c3ff..78db0b10568 100644
--- a/src/devices/cpu/h8/h83042.h
+++ b/src/devices/cpu/h8/h83042.h
@@ -33,7 +33,7 @@
class h83042_device : public h8h_device {
public:
- h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -57,11 +57,11 @@ public:
auto read_portb() { return m_read_port [PORT_B].bind(); }
auto write_portb() { return m_write_port[PORT_B].bind(); }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
- h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h83042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
required_device<h8h_intc_device> m_intc;
required_device<h8_adc_device> m_adc;
@@ -87,29 +87,30 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
+ u8 m_syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h83040_device : public h83042_device {
public:
- h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h83041_device : public h83042_device {
public:
- h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83041_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H83040, h83040_device)
diff --git a/src/devices/cpu/h8/h83048.cpp b/src/devices/cpu/h8/h83048.cpp
index 7ecd36a4d5d..545acb7f425 100644
--- a/src/devices/cpu/h8/h83048.cpp
+++ b/src/devices/cpu/h8/h83048.cpp
@@ -8,7 +8,7 @@ DEFINE_DEVICE_TYPE(H83045, h83045_device, "h83045", "Hitachi H8/3045")
DEFINE_DEVICE_TYPE(H83047, h83047_device, "h83047", "Hitachi H8/3047")
DEFINE_DEVICE_TYPE(H83048, h83048_device, "h83048", "Hitachi H8/3048")
-h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h83048_device::h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8h_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83048_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -38,22 +38,22 @@ h83048_device::h83048_device(const machine_config &mconfig, device_type type, co
{
}
-h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83048_device::h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83048_device(mconfig, H83048, tag, owner, clock, 0xef10)
{
}
-h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83044_device::h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83048_device(mconfig, H83044, tag, owner, clock, 0xf710)
{
}
-h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83045_device::h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83048_device(mconfig, H83045, tag, owner, clock, 0xf710)
{
}
-h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83047_device::h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83048_device(mconfig, H83047, tag, owner, clock, 0xef10)
{
}
@@ -138,26 +138,26 @@ void h83048_device::map(address_map &map)
map(base | 0xffbb, base | 0xffbb).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(base | 0xffbc, base | 0xffbc).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(base | 0xffbd, base | 0xffbd).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
- map(base | 0xffc0, base | 0xffc0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc1, base | 0xffc1).w(m_port2, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc0, base | 0xffc0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc1, base | 0xffc1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc2, base | 0xffc2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc3, base | 0xffc3).rw(m_port2, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc4, base | 0xffc4).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc5, base | 0xffc5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc4, base | 0xffc4).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc5, base | 0xffc5).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffc6, base | 0xffc6).rw(m_port3, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffc7, base | 0xffc7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffc8, base | 0xffc8).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(base | 0xffc9, base | 0xffc9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc8, base | 0xffc8).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffc9, base | 0xffc9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffca, base | 0xffca).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcb, base | 0xffcb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffcd, base | 0xffcd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffcd, base | 0xffcd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffce, base | 0xffce).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffcf, base | 0xffcf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd0, base | 0xffd0).w(m_port9, FUNC(h8_port_device::ddr_w));
- map(base | 0xffd1, base | 0xffd1).w(m_porta, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd0, base | 0xffd0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd1, base | 0xffd1).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd2, base | 0xffd2).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd3, base | 0xffd3).rw(m_porta, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(base | 0xffd4, base | 0xffd4).w(m_portb, FUNC(h8_port_device::ddr_w));
+ map(base | 0xffd4, base | 0xffd4).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(base | 0xffd6, base | 0xffd6).rw(m_portb, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(base | 0xffd8, base | 0xffd8).rw(m_port2, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(base | 0xffda, base | 0xffda).rw(m_port4, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
@@ -251,9 +251,9 @@ void h83048_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83048_device::internal_update(uint64_t current_time)
+void h83048_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -268,9 +268,23 @@ void h83048_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83048_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83048_device::device_start()
{
h8h_device::device_start();
+ save_item(NAME(m_syscr));
}
void h83048_device::device_reset()
@@ -279,14 +293,15 @@ void h83048_device::device_reset()
m_syscr = 0x0b;
}
-uint8_t h83048_device::syscr_r()
+u8 h83048_device::syscr_r()
{
return m_syscr;
}
-void h83048_device::syscr_w(uint8_t data)
+void h83048_device::syscr_w(u8 data)
{
m_syscr = data;
+ m_intc->set_nmi_edge(BIT(data, 2));
update_irq_filter();
logerror("syscr = %02x\n", data);
}
diff --git a/src/devices/cpu/h8/h83048.h b/src/devices/cpu/h8/h83048.h
index 1611876c3e0..abf3cf97d47 100644
--- a/src/devices/cpu/h8/h83048.h
+++ b/src/devices/cpu/h8/h83048.h
@@ -12,7 +12,7 @@
H8/3044 32K 2K
H8/3045 64K 2K
H8/3047 96K 4K
- H8/3048 192K 4K
+ H8/3048 128K 4K
The 3394, 3396, and 3997 variants are the mask-rom versions.
@@ -33,7 +33,7 @@
class h83048_device : public h8h_device {
public:
- h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -60,11 +60,11 @@ public:
void set_mode_a20() { m_mode_a20 = true; }
void set_mode_a24() { m_mode_a20 = false; }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
- h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h83048_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
required_device<h8h_intc_device> m_intc;
required_device<h8_adc_device> m_adc;
@@ -90,35 +90,36 @@ protected:
required_device<h8h_timer16_channel_device> m_timer16_4;
required_device<h8_watchdog_device> m_watchdog;
- uint32_t m_ram_start;
- uint8_t m_syscr;
+ u32 m_ram_start;
+ u8 m_syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h83044_device : public h83048_device {
public:
- h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83044_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h83045_device : public h83048_device {
public:
- h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h83047_device : public h83048_device {
public:
- h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83047_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H83044, h83044_device)
diff --git a/src/devices/cpu/h8/h83217.cpp b/src/devices/cpu/h8/h83217.cpp
new file mode 100644
index 00000000000..30b5a9e4a20
--- /dev/null
+++ b/src/devices/cpu/h8/h83217.cpp
@@ -0,0 +1,282 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h83217.cpp
+
+ H8/3217 family emulation
+
+ TODO:
+ - H8/3212 and H8/3202 have less internal modules
+ - PWM timer module
+ - Host Interface module
+ - optional I2C bus module
+ - keyboard matrix interrupt
+ - TCONR @ 0xff9f (timer connection)
+ - SEDGR @ 0xffa8 (edge sense)
+ - WSCR @ 0xffc2 (waitstate control)
+ - finish STCR emulation
+ - finish SYSCR emulation
+
+***************************************************************************/
+
+#include "emu.h"
+#include "h83217.h"
+
+DEFINE_DEVICE_TYPE(H83217, h83217_device, "h83217", "Hitachi H8/3217")
+DEFINE_DEVICE_TYPE(H83216, h83216_device, "h83216", "Hitachi H8/3216")
+DEFINE_DEVICE_TYPE(H83214, h83214_device, "h83214", "Hitachi H8/3214")
+DEFINE_DEVICE_TYPE(H83212, h83212_device, "h83212", "Hitachi H8/3212")
+DEFINE_DEVICE_TYPE(H83202, h83202_device, "h83202", "Hitachi H8/3202")
+
+
+h83217_device::h83217_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83217_device::map), this)),
+ m_intc(*this, "intc"),
+ m_port(*this, "port%u", 1),
+ m_timer8(*this, "timer8_%u", 0),
+ m_timer16(*this, "timer16"),
+ m_timer16_0(*this, "timer16:0"),
+ m_watchdog(*this, "watchdog"),
+ m_ram_view(*this, "ram_view"),
+ m_rom_size(rom_size),
+ m_ram_size(ram_size),
+ m_md(3)
+{
+}
+
+h83217_device::h83217_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h83217_device(mconfig, H83217, tag, owner, clock, 0xf000, 0x800)
+{
+}
+
+h83216_device::h83216_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h83217_device(mconfig, H83216, tag, owner, clock, 0xc000, 0x800)
+{
+}
+
+h83214_device::h83214_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h83217_device(mconfig, H83214, tag, owner, clock, 0x8000, 0x400)
+{
+}
+
+h83212_device::h83212_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h83217_device(mconfig, H83212, tag, owner, clock, 0x4000, 0x200)
+{
+}
+
+h83202_device::h83202_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h83217_device(mconfig, H83202, tag, owner, clock, 0x4000, 0x200)
+{
+}
+
+void h83217_device::map(address_map &map)
+{
+ if(m_md >= 2)
+ map(0x0000, m_rom_size - 1).rom();
+
+ map(0xff80 - m_ram_size, 0xff7f).view(m_ram_view);
+ m_ram_view[0](0xff80 - m_ram_size, 0xff7f).ram().share(m_internal_ram);
+
+ map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcr_r), FUNC(h8325_timer16_channel_device::tcr_w));
+ map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tsr_r), FUNC(h8325_timer16_channel_device::tsr_w));
+ map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcnt_r), FUNC(h8325_timer16_channel_device::tcnt_w));
+ map(0xff94, 0xff95).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::ocra_r), FUNC(h8325_timer16_channel_device::ocra_w));
+ map(0xff96, 0xff97).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::ocrb_r), FUNC(h8325_timer16_channel_device::ocrb_w));
+ map(0xff98, 0xff99).r(m_timer16_0, FUNC(h8325_timer16_channel_device::icr_r));
+
+ map(0xff9a, 0xff9a).rw(m_timer8[2], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xff9b, 0xff9b).rw(m_timer8[2], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xff9c, 0xff9d).rw(m_timer8[2], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xff9e, 0xff9e).rw(m_timer8[2], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ map(0xff9f, 0xff9f).lw8(NAME([this](u8 data) { logerror("tconr = %02x\n", data); }));
+
+ map(0xffaa, 0xffab).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
+
+ map(0xffac, 0xffac).rw(m_port[0], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffad, 0xffad).rw(m_port[1], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffae, 0xffae).rw(m_port[2], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffb0, 0xffb0).rw(m_port[0], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb1, 0xffb1).rw(m_port[1], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb2, 0xffb2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb3, 0xffb3).rw(m_port[1], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb4, 0xffb4).rw(m_port[2], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb5, 0xffb5).rw(m_port[3], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb6, 0xffb6).rw(m_port[2], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb7, 0xffb7).rw(m_port[3], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb8, 0xffb8).rw(m_port[4], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb9, 0xffb9).rw(m_port[5], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffba, 0xffba).rw(m_port[4], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbb, 0xffbb).rw(m_port[5], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbc, 0xffbc).rw(m_port[6], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffbe, 0xffbe).rw(m_port[6], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+
+ map(0xffc2, 0xffc2).lw8(NAME([this](u8 data) { logerror("wscr = %02x\n", data); }));
+ map(0xffc3, 0xffc3).rw(FUNC(h83217_device::stcr_r), FUNC(h83217_device::stcr_w));
+ map(0xffc4, 0xffc4).rw(FUNC(h83217_device::syscr_r), FUNC(h83217_device::syscr_w));
+ map(0xffc5, 0xffc5).r(FUNC(h83217_device::mdcr_r));
+ map(0xffc6, 0xffc6).lr8(NAME([this]() { return m_intc->iscr_r() | ~0x47; }));
+ map(0xffc6, 0xffc6).lw8(NAME([this](u8 data) { m_intc->iscr_w(data & 0x47); }));
+ map(0xffc7, 0xffc7).lr8(NAME([this]() { return m_intc->ier_r() | ~0x47; }));
+ map(0xffc7, 0xffc7).lw8(NAME([this](u8 data) { m_intc->ier_w(data & 0x47); }));
+
+ map(0xffc8, 0xffc8).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffc9, 0xffc9).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffca, 0xffcb).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xffcc, 0xffcc).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ map(0xffd0, 0xffd0).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffd1, 0xffd1).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffd2, 0xffd3).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xffd4, 0xffd4).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+
+ map(0xffd8, 0xffd8).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffd9, 0xffd9).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffda, 0xffda).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffdb, 0xffdb).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffdc, 0xffdc).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffdd, 0xffdd).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
+ map(0xffe0, 0xffe0).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffe1, 0xffe1).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffe2, 0xffe2).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffe3, 0xffe3).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffe4, 0xffe4).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffe5, 0xffe5).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
+}
+
+void h83217_device::device_add_mconfig(machine_config &config)
+{
+ H8_INTC(config, m_intc, *this);
+ H8_PORT(config, m_port[0], *this, h8_device::PORT_1, 0x00, 0x00);
+ H8_PORT(config, m_port[1], *this, h8_device::PORT_2, 0x00, 0x00);
+ H8_PORT(config, m_port[2], *this, h8_device::PORT_3, 0x00, 0x00);
+ H8_PORT(config, m_port[3], *this, h8_device::PORT_4, 0x00, 0x00);
+ H8_PORT(config, m_port[4], *this, h8_device::PORT_5, 0x00, 0xc0);
+ H8_PORT(config, m_port[5], *this, h8_device::PORT_6, 0x00, 0x80);
+ H8_PORT(config, m_port[6], *this, h8_device::PORT_7, 0x00, 0x00);
+ H8_TIMER8_CHANNEL(config, m_timer8[0], *this, m_intc, 23, 24, 25, 8, 2, 64, 32, 1024, 256);
+ H8_TIMER8_CHANNEL(config, m_timer8[1], *this, m_intc, 26, 27, 28, 8, 2, 64, 128, 1024, 2048);
+ H8_TIMER8_CHANNEL(config, m_timer8[2], *this, m_intc, 47, 48, 49, 1, 1, 2, 2, 512, 512);
+ H8_TIMER16(config, m_timer16, *this, 1, 0xff);
+ H8325_TIMER16_CHANNEL(config, m_timer16_0, *this, m_intc, 19);
+ H8_SCI(config, m_sci[0], 0, *this, m_intc, 29, 30, 31, 32);
+ H8_SCI(config, m_sci[1], 1, *this, m_intc, 33, 34, 35, 36);
+ H8_WATCHDOG(config, m_watchdog, *this, m_intc, 44, h8_watchdog_device::B);
+}
+
+void h83217_device::execute_set_input(int inputnum, int state)
+{
+ m_intc->set_input(inputnum, state);
+}
+
+void h83217_device::irq_setup()
+{
+ m_CCR |= F_I;
+}
+
+void h83217_device::update_irq_filter()
+{
+ if(m_CCR & F_I)
+ m_intc->set_filter(2, -1);
+ else
+ m_intc->set_filter(0, -1);
+}
+
+void h83217_device::interrupt_taken()
+{
+ standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
+}
+
+void h83217_device::internal_update(u64 current_time)
+{
+ u64 event_time = 0;
+
+ add_event(event_time, m_sci[0]->internal_update(current_time));
+ add_event(event_time, m_sci[1]->internal_update(current_time));
+ add_event(event_time, m_timer8[0]->internal_update(current_time));
+ add_event(event_time, m_timer8[1]->internal_update(current_time));
+ add_event(event_time, m_timer8[2]->internal_update(current_time));
+ add_event(event_time, m_timer16_0->internal_update(current_time));
+ add_event(event_time, m_watchdog->internal_update(current_time));
+
+ recompute_bcount(event_time);
+}
+
+void h83217_device::notify_standby(int state)
+{
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+
+ for (auto & timer8 : m_timer8)
+ timer8->notify_standby(state);
+
+ m_timer16_0->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
+void h83217_device::device_start()
+{
+ h8_device::device_start();
+
+ m_stcr = 0;
+ m_syscr = 0;
+
+ save_item(NAME(m_md));
+ save_item(NAME(m_stcr));
+ save_item(NAME(m_syscr));
+}
+
+void h83217_device::device_reset()
+{
+ h8_device::device_reset();
+
+ m_stcr = 0x00;
+ m_syscr = 0x09;
+ m_ram_view.select(0);
+}
+
+u8 h83217_device::stcr_r()
+{
+ return m_stcr;
+}
+
+void h83217_device::stcr_w(u8 data)
+{
+ logerror("stcr = %02x\n", data);
+
+ // ICKS0/1
+ m_timer8[0]->set_extra_clock_bit(BIT(data, 0));
+ m_timer8[1]->set_extra_clock_bit(BIT(data, 1));
+
+ m_stcr = data;
+}
+
+u8 h83217_device::syscr_r()
+{
+ return m_syscr;
+}
+
+void h83217_device::syscr_w(u8 data)
+{
+ logerror("syscr = %02x\n", data);
+
+ // RAME
+ if(data & 1)
+ m_ram_view.select(0);
+ else
+ m_ram_view.disable();
+
+ // NMIEG
+ m_intc->set_nmi_edge(BIT(data, 2));
+
+ // SSBY
+ m_standby_pending = bool(data & 0x80);
+
+ m_syscr = (m_syscr & 0x08) | (data & 0xf7);
+}
+
+u8 h83217_device::mdcr_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("mdcr_r\n");
+ return (m_md & 0x03) | 0xe4;
+}
diff --git a/src/devices/cpu/h8/h83217.h b/src/devices/cpu/h8/h83217.h
new file mode 100644
index 00000000000..99f3e9c76d1
--- /dev/null
+++ b/src/devices/cpu/h8/h83217.h
@@ -0,0 +1,120 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h83217.h
+
+ H8/3217 family emulation
+
+ H8-300-based mcus.
+
+ Variant ROM RAM
+ H8/3217 60K 2K
+ H8/3216 48K 2K
+ H8/3214 32K 1K
+ H8/3212 16K 512B
+ H8/3202 16K 512B
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_H83217_H
+#define MAME_CPU_H8_H83217_H
+
+#pragma once
+
+#include "h8.h"
+
+#include "h8_intc.h"
+#include "h8_port.h"
+#include "h8_timer8.h"
+#include "h8_timer16.h"
+#include "h8_sci.h"
+#include "h8_watchdog.h"
+
+class h83217_device : public h8_device {
+public:
+ h83217_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // I/O ports
+ auto read_port1() { return m_read_port [PORT_1].bind(); }
+ auto write_port1() { return m_write_port[PORT_1].bind(); }
+ auto read_port2() { return m_read_port [PORT_2].bind(); }
+ auto write_port2() { return m_write_port[PORT_2].bind(); }
+ auto read_port3() { return m_read_port [PORT_3].bind(); }
+ auto write_port3() { return m_write_port[PORT_3].bind(); }
+ auto read_port4() { return m_read_port [PORT_4].bind(); }
+ auto write_port4() { return m_write_port[PORT_4].bind(); }
+ auto read_port5() { return m_read_port [PORT_5].bind(); }
+ auto write_port5() { return m_write_port[PORT_5].bind(); }
+ auto read_port6() { return m_read_port [PORT_6].bind(); }
+ auto write_port6() { return m_write_port[PORT_6].bind(); }
+ auto read_port7() { return m_read_port [PORT_7].bind(); }
+ auto write_port7() { return m_write_port[PORT_7].bind(); }
+
+ // MD pins, default mode 3 (single chip)
+ void set_mode(u8 mode) { m_md = mode & 3; }
+
+ u8 stcr_r();
+ void stcr_w(u8 data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
+ u8 mdcr_r();
+
+protected:
+ h83217_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ required_device<h8_intc_device> m_intc;
+ required_device_array<h8_port_device, 7> m_port;
+ required_device_array<h8_timer8_channel_device, 3> m_timer8;
+ required_device<h8_timer16_device> m_timer16;
+ required_device<h8325_timer16_channel_device> m_timer16_0;
+ required_device<h8_watchdog_device> m_watchdog;
+
+ memory_view m_ram_view;
+
+ u32 m_rom_size;
+ u32 m_ram_size;
+ u8 m_md;
+ u8 m_stcr;
+ u8 m_syscr;
+
+ virtual void update_irq_filter() override;
+ virtual void interrupt_taken() override;
+ virtual void irq_setup() override;
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+};
+
+class h83216_device : public h83217_device {
+public:
+ h83216_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h83214_device : public h83217_device {
+public:
+ h83214_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h83212_device : public h83217_device {
+public:
+ h83212_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h83202_device : public h83217_device {
+public:
+ h83202_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+DECLARE_DEVICE_TYPE(H83217, h83217_device)
+DECLARE_DEVICE_TYPE(H83216, h83216_device)
+DECLARE_DEVICE_TYPE(H83214, h83214_device)
+DECLARE_DEVICE_TYPE(H83212, h83212_device)
+DECLARE_DEVICE_TYPE(H83202, h83202_device)
+
+#endif // MAME_CPU_H8_H83217_H
diff --git a/src/devices/cpu/h8/h8325.cpp b/src/devices/cpu/h8/h8325.cpp
new file mode 100644
index 00000000000..eb81ee9caa0
--- /dev/null
+++ b/src/devices/cpu/h8/h8325.cpp
@@ -0,0 +1,252 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h8325.cpp
+
+ H8/325 family emulation
+
+ TODO:
+ - HCSR @ 0xfffe (port 3 handshake)
+ - FNCR @ 0xffff (16-bit timer noise canceler)
+
+***************************************************************************/
+
+#include "emu.h"
+#include "h8325.h"
+
+DEFINE_DEVICE_TYPE(H83257, h83257_device, "h83257", "Hitachi H8/3257")
+DEFINE_DEVICE_TYPE(H83256, h83256_device, "h83256", "Hitachi H8/3256")
+DEFINE_DEVICE_TYPE(H8325, h8325_device, "h8325", "Hitachi H8/325")
+DEFINE_DEVICE_TYPE(H8324, h8324_device, "h8324", "Hitachi H8/324")
+DEFINE_DEVICE_TYPE(H8323, h8323_device, "h8323", "Hitachi H8/323")
+DEFINE_DEVICE_TYPE(H8322, h8322_device, "h8322", "Hitachi H8/322")
+
+
+h8325_device::h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8325_device::map), this)),
+ m_intc(*this, "intc"),
+ m_port(*this, "port%u", 1),
+ m_timer8(*this, "timer8_%u", 0),
+ m_timer16(*this, "timer16"),
+ m_timer16_0(*this, "timer16:0"),
+ m_ram_view(*this, "ram_view"),
+ m_rom_size(rom_size),
+ m_ram_size(ram_size),
+ m_md(3)
+{
+}
+
+h83257_device::h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H83257, tag, owner, clock, 0xf000, 0x800)
+{
+}
+
+h83256_device::h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H83256, tag, owner, clock, 0xc000, 0x800)
+{
+}
+
+h8325_device::h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H8325, tag, owner, clock, 0x8000, 0x400)
+{
+}
+
+h8324_device::h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H8324, tag, owner, clock, 0x6000, 0x400)
+{
+}
+
+h8323_device::h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H8323, tag, owner, clock, 0x4000, 0x200)
+{
+}
+
+h8322_device::h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8325_device(mconfig, H8322, tag, owner, clock, 0x2000, 0x100)
+{
+}
+
+void h8325_device::map(address_map &map)
+{
+ if(m_md >= 2)
+ map(0x0000, m_rom_size - 1).rom();
+
+ map(0xff80 - m_ram_size, 0xff7f).view(m_ram_view);
+ m_ram_view[0](0xff80 - m_ram_size, 0xff7f).ram().share(m_internal_ram);
+
+ map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcr_r), FUNC(h8325_timer16_channel_device::tcr_w));
+ map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tsr_r), FUNC(h8325_timer16_channel_device::tsr_w));
+ map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::tcnt_r), FUNC(h8325_timer16_channel_device::tcnt_w));
+ map(0xff94, 0xff95).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::ocra_r), FUNC(h8325_timer16_channel_device::ocra_w));
+ map(0xff96, 0xff97).rw(m_timer16_0, FUNC(h8325_timer16_channel_device::ocrb_r), FUNC(h8325_timer16_channel_device::ocrb_w));
+ map(0xff98, 0xff99).r(m_timer16_0, FUNC(h8325_timer16_channel_device::icr_r));
+
+ map(0xffb0, 0xffb0).rw(m_port[0], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb1, 0xffb1).rw(m_port[1], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb2, 0xffb2).rw(m_port[0], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb3, 0xffb3).rw(m_port[1], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb4, 0xffb4).rw(m_port[2], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb5, 0xffb5).rw(m_port[3], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb6, 0xffb6).rw(m_port[2], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb7, 0xffb7).rw(m_port[3], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffb8, 0xffb8).rw(m_port[4], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb9, 0xffb9).rw(m_port[5], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffba, 0xffba).rw(m_port[4], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbb, 0xffbb).rw(m_port[5], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+ map(0xffbc, 0xffbc).rw(m_port[6], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffbe, 0xffbe).rw(m_port[6], FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+
+ map(0xffc4, 0xffc4).rw(FUNC(h8325_device::syscr_r), FUNC(h8325_device::syscr_w));
+ map(0xffc5, 0xffc5).r(FUNC(h8325_device::mdcr_r));
+ map(0xffc6, 0xffc6).lr8(NAME([this]() { return m_intc->iscr_r() | ~0x77; }));
+ map(0xffc6, 0xffc6).lw8(NAME([this](u8 data) { m_intc->iscr_w(data & 0x77); }));
+ map(0xffc7, 0xffc7).lr8(NAME([this]() { return m_intc->ier_r() | ~0x07; }));
+ map(0xffc7, 0xffc7).lw8(NAME([this](u8 data) { m_intc->ier_w(data & 0x07); }));
+
+ map(0xffc8, 0xffc8).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffc9, 0xffc9).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffca, 0xffcb).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xffcc, 0xffcc).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ map(0xffd0, 0xffd0).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffd1, 0xffd1).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffd2, 0xffd3).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
+ map(0xffd4, 0xffd4).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+
+ map(0xffd8, 0xffd8).lr8(NAME([this]() { return m_sci[0]->smr_r() | 0x04; }));
+ map(0xffd8, 0xffd8).lw8(NAME([this](u8 data) { m_sci[0]->smr_w(data & ~0x04); }));
+ map(0xffd9, 0xffd9).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffda, 0xffda).lr8(NAME([this]() { return m_sci[0]->scr_r() | 0x0c; }));
+ map(0xffda, 0xffda).lw8(NAME([this](u8 data) { m_sci[0]->scr_w(data & ~0x0c); }));
+ map(0xffdb, 0xffdb).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffdc, 0xffdc).lr8(NAME([this]() { return m_sci[0]->ssr_r() | 0x07; }));
+ map(0xffdc, 0xffdc).lw8(NAME([this](u8 data) { m_sci[0]->ssr_w(data & ~0x07); }));
+ map(0xffdd, 0xffdd).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
+
+ map(0xffe0, 0xffe0).lr8(NAME([this]() { return m_sci[1]->smr_r() | 0x04; }));
+ map(0xffe0, 0xffe0).lw8(NAME([this](u8 data) { m_sci[1]->smr_w(data & ~0x04); }));
+ map(0xffe1, 0xffe1).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffe2, 0xffe2).lr8(NAME([this]() { return m_sci[1]->scr_r() | 0x0c; }));
+ map(0xffe2, 0xffe2).lw8(NAME([this](u8 data) { m_sci[1]->scr_w(data & ~0x0c); }));
+ map(0xffe3, 0xffe3).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffe4, 0xffe4).lr8(NAME([this]() { return m_sci[1]->ssr_r() | 0x07; }));
+ map(0xffe4, 0xffe4).lw8(NAME([this](u8 data) { m_sci[1]->ssr_w(data & ~0x07); }));
+ map(0xffe5, 0xffe5).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
+}
+
+void h8325_device::device_add_mconfig(machine_config &config)
+{
+ H8325_INTC(config, m_intc, *this);
+ H8_PORT(config, m_port[0], *this, h8_device::PORT_1, 0x00, 0x00);
+ H8_PORT(config, m_port[1], *this, h8_device::PORT_2, 0x00, 0x00);
+ H8_PORT(config, m_port[2], *this, h8_device::PORT_3, 0x00, 0x00);
+ H8_PORT(config, m_port[3], *this, h8_device::PORT_4, 0x00, 0x00);
+ H8_PORT(config, m_port[4], *this, h8_device::PORT_5, 0x00, 0xc0);
+ H8_PORT(config, m_port[5], *this, h8_device::PORT_6, 0x00, 0x80);
+ H8_PORT(config, m_port[6], *this, h8_device::PORT_7, 0x00, 0x00);
+ H8_TIMER8_CHANNEL(config, m_timer8[0], *this, m_intc, 12, 13, 14, 8, 8, 64, 64, 1024, 1024);
+ H8_TIMER8_CHANNEL(config, m_timer8[1], *this, m_intc, 15, 16, 17, 8, 8, 64, 64, 1024, 1024);
+ H8_TIMER16(config, m_timer16, *this, 1, 0xff);
+ H8325_TIMER16_CHANNEL(config, m_timer16_0, *this, m_intc, 8);
+ H8_SCI(config, m_sci[0], 0, *this, m_intc, 18, 19, 20, 20);
+ H8_SCI(config, m_sci[1], 1, *this, m_intc, 21, 22, 23, 23);
+}
+
+void h8325_device::execute_set_input(int inputnum, int state)
+{
+ m_intc->set_input(inputnum, state);
+}
+
+void h8325_device::irq_setup()
+{
+ m_CCR |= F_I;
+}
+
+void h8325_device::update_irq_filter()
+{
+ if(m_CCR & F_I)
+ m_intc->set_filter(2, -1);
+ else
+ m_intc->set_filter(0, -1);
+}
+
+void h8325_device::interrupt_taken()
+{
+ standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
+}
+
+void h8325_device::internal_update(u64 current_time)
+{
+ u64 event_time = 0;
+
+ add_event(event_time, m_sci[0]->internal_update(current_time));
+ add_event(event_time, m_sci[1]->internal_update(current_time));
+ add_event(event_time, m_timer8[0]->internal_update(current_time));
+ add_event(event_time, m_timer8[1]->internal_update(current_time));
+ add_event(event_time, m_timer16_0->internal_update(current_time));
+
+ recompute_bcount(event_time);
+}
+
+void h8325_device::notify_standby(int state)
+{
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer8[0]->notify_standby(state);
+ m_timer8[1]->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+}
+
+void h8325_device::device_start()
+{
+ h8_device::device_start();
+
+ m_mds = 0;
+ m_syscr = 0;
+
+ save_item(NAME(m_md));
+ save_item(NAME(m_mds));
+ save_item(NAME(m_syscr));
+}
+
+void h8325_device::device_reset()
+{
+ h8_device::device_reset();
+
+ m_syscr = 0x01;
+ m_ram_view.select(0);
+
+ // MD pins are latched at reset
+ m_mds = m_md;
+}
+
+u8 h8325_device::syscr_r()
+{
+ return m_syscr | 0x0a;
+}
+
+void h8325_device::syscr_w(u8 data)
+{
+ logerror("syscr = %02x\n", data);
+
+ // RAME
+ if(data & 1)
+ m_ram_view.select(0);
+ else
+ m_ram_view.disable();
+
+ // NMIEG
+ m_intc->set_nmi_edge(BIT(data, 2));
+
+ // SSBY
+ m_standby_pending = bool(data & 0x80);
+
+ m_syscr = data;
+}
+
+u8 h8325_device::mdcr_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("mdcr_r\n");
+ return (m_mds & 0x03) | 0xe4;
+}
diff --git a/src/devices/cpu/h8/h8325.h b/src/devices/cpu/h8/h8325.h
new file mode 100644
index 00000000000..7673cdd20f4
--- /dev/null
+++ b/src/devices/cpu/h8/h8325.h
@@ -0,0 +1,126 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h8325.h
+
+ H8/325 family emulation
+
+ H8-300-based mcus.
+
+ Variant ROM RAM
+ H8/3257 60K 2K
+ H8/3256 48K 2K
+ H8/325 32K 1K
+ H8/324 24K 1K
+ H8/323 16K 512B
+ H8/322 8K 256B
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_H8325_H
+#define MAME_CPU_H8_H8325_H
+
+#pragma once
+
+#include "h8.h"
+
+#include "h8_intc.h"
+#include "h8_port.h"
+#include "h8_timer8.h"
+#include "h8_timer16.h"
+#include "h8_sci.h"
+
+class h8325_device : public h8_device {
+public:
+ h8325_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // I/O ports
+ auto read_port1() { return m_read_port [PORT_1].bind(); }
+ auto write_port1() { return m_write_port[PORT_1].bind(); }
+ auto read_port2() { return m_read_port [PORT_2].bind(); }
+ auto write_port2() { return m_write_port[PORT_2].bind(); }
+ auto read_port3() { return m_read_port [PORT_3].bind(); }
+ auto write_port3() { return m_write_port[PORT_3].bind(); }
+ auto read_port4() { return m_read_port [PORT_4].bind(); }
+ auto write_port4() { return m_write_port[PORT_4].bind(); }
+ auto read_port5() { return m_read_port [PORT_5].bind(); }
+ auto write_port5() { return m_write_port[PORT_5].bind(); }
+ auto read_port6() { return m_read_port [PORT_6].bind(); }
+ auto write_port6() { return m_write_port[PORT_6].bind(); }
+ auto read_port7() { return m_read_port [PORT_7].bind(); }
+ auto write_port7() { return m_write_port[PORT_7].bind(); }
+
+ // MD pins, default mode 3 (single chip)
+ void set_mode(u8 mode) { m_md = mode & 3; }
+
+ u8 syscr_r();
+ void syscr_w(u8 data);
+ u8 mdcr_r();
+
+protected:
+ h8325_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 2); }
+
+ required_device<h8325_intc_device> m_intc;
+ required_device_array<h8_port_device, 7> m_port;
+ required_device_array<h8_timer8_channel_device, 2> m_timer8;
+ required_device<h8_timer16_device> m_timer16;
+ required_device<h8325_timer16_channel_device> m_timer16_0;
+
+ memory_view m_ram_view;
+
+ u32 m_rom_size;
+ u32 m_ram_size;
+ u8 m_md;
+ u8 m_mds;
+ u8 m_syscr;
+
+ virtual void update_irq_filter() override;
+ virtual void interrupt_taken() override;
+ virtual void irq_setup() override;
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+};
+
+class h83256_device : public h8325_device {
+public:
+ h83256_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h83257_device : public h8325_device {
+public:
+ h83257_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8324_device : public h8325_device {
+public:
+ h8324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8323_device : public h8325_device {
+public:
+ h8323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8322_device : public h8325_device {
+public:
+ h8322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+DECLARE_DEVICE_TYPE(H83257, h83257_device)
+DECLARE_DEVICE_TYPE(H83256, h83256_device)
+DECLARE_DEVICE_TYPE(H8325, h8325_device)
+DECLARE_DEVICE_TYPE(H8324, h8324_device)
+DECLARE_DEVICE_TYPE(H8323, h8323_device)
+DECLARE_DEVICE_TYPE(H8322, h8322_device)
+
+#endif // MAME_CPU_H8_H8325_H
diff --git a/src/devices/cpu/h8/h83337.cpp b/src/devices/cpu/h8/h83337.cpp
index 4ddd832dcba..7214a4f9c1c 100644
--- a/src/devices/cpu/h8/h83337.cpp
+++ b/src/devices/cpu/h8/h83337.cpp
@@ -1,5 +1,21 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h83337.cpp
+
+ H8-3337 family emulation
+
+ TODO:
+ - 16-bit timer module is different from how it's implemented in h8_timer16.cpp
+ - PWM timer module
+ - Host Interface module
+ - finish WSCR emulation, CKDBL flag would need support in peripherals
+ - finish STCR emulation
+ - finish SYSCR emulation
+
+***************************************************************************/
+
#include "emu.h"
#include "h83337.h"
@@ -8,7 +24,7 @@ DEFINE_DEVICE_TYPE(H83336, h83336_device, "h83336", "Hitachi H8/3336")
DEFINE_DEVICE_TYPE(H83337, h83337_device, "h83337", "Hitachi H8/3337")
-h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h83337_device::h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h83337_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -26,22 +42,21 @@ h83337_device::h83337_device(const machine_config &mconfig, device_type type, co
m_timer16(*this, "timer16"),
m_timer16_0(*this, "timer16:0"),
m_watchdog(*this, "watchdog"),
- m_syscr(0),
m_ram_start(start)
{
}
-h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83337_device::h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83337_device(mconfig, H83337, tag, owner, clock, 0xf780)
{
}
-h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83334_device::h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83337_device(mconfig, H83334, tag, owner, clock, 0xfb80)
{
}
-h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h83336_device::h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h83337_device(mconfig, H83336, tag, owner, clock, 0xf780)
{
}
@@ -56,6 +71,7 @@ void h83337_device::map(address_map &map)
map(0xff8b, 0xff8b).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
map(0xff8c, 0xff8c).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
map(0xff8d, 0xff8d).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
+
map(0xff90, 0xff90).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
map(0xff91, 0xff91).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
map(0xff92, 0xff93).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
@@ -65,32 +81,35 @@ void h83337_device::map(address_map &map)
map(0xff98, 0xff9f).r(m_timer16_0, FUNC(h8_timer16_channel_device::tgr_r));
map(0xffa8, 0xffa9).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
+
map(0xffac, 0xffac).rw(m_port1, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffad, 0xffad).rw(m_port2, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
map(0xffae, 0xffae).rw(m_port3, FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
- map(0xffb0, 0xffb0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(0xffb1, 0xffb1).w(m_port2, FUNC(h8_port_device::ddr_w));
+ map(0xffb0, 0xffb0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb1, 0xffb1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(0xffb2, 0xffb2).rw(m_port1, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xffb3, 0xffb3).rw(m_port2, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(0xffb4, 0xffb4).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(0xffb5, 0xffb5).w(m_port4, FUNC(h8_port_device::ddr_w));
+ map(0xffb4, 0xffb4).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb5, 0xffb5).rw(m_port4, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(0xffb6, 0xffb6).rw(m_port3, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xffb7, 0xffb7).rw(m_port4, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(0xffb8, 0xffb8).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(0xffb9, 0xffb9).w(m_port6, FUNC(h8_port_device::ddr_w));
+ map(0xffb8, 0xffb8).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xffb9, 0xffb9).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(0xffba, 0xffba).rw(m_port5, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xffbb, 0xffbb).rw(m_port6, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(0xffbd, 0xffbd).w(m_port8, FUNC(h8_port_device::ddr_w));
+ map(0xffbd, 0xffbd).rw(m_port8, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(0xffbe, 0xffbe).rw(m_port7, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
map(0xffbf, 0xffbf).rw(m_port8, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
- map(0xffc0, 0xffc0).w(m_port9, FUNC(h8_port_device::ddr_w));
+ map(0xffc0, 0xffc0).rw(m_port9, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
map(0xffc1, 0xffc1).rw(m_port9, FUNC(h8_port_device::port_r), FUNC(h8_port_device::dr_w));
+
map(0xffc2, 0xffc2).rw(FUNC(h83337_device::wscr_r), FUNC(h83337_device::wscr_w));
map(0xffc3, 0xffc3).rw(FUNC(h83337_device::stcr_r), FUNC(h83337_device::stcr_w));
map(0xffc4, 0xffc4).rw(FUNC(h83337_device::syscr_r), FUNC(h83337_device::syscr_w));
map(0xffc5, 0xffc5).rw(FUNC(h83337_device::mdcr_r), FUNC(h83337_device::mdcr_w));
map(0xffc6, 0xffc6).rw(m_intc, FUNC(h8_intc_device::iscr_r), FUNC(h8_intc_device::iscr_w));
map(0xffc7, 0xffc7).rw(m_intc, FUNC(h8_intc_device::ier_r), FUNC(h8_intc_device::ier_w));
+
map(0xffc8, 0xffc8).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
map(0xffc9, 0xffc9).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
map(0xffca, 0xffcb).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
@@ -99,6 +118,7 @@ void h83337_device::map(address_map &map)
map(0xffd1, 0xffd1).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
map(0xffd2, 0xffd3).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w));
map(0xffd4, 0xffd4).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+
map(0xffd8, 0xffd8).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
map(0xffd9, 0xffd9).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
map(0xffda, 0xffda).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
@@ -158,9 +178,9 @@ void h83337_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h83337_device::internal_update(uint64_t current_time)
+void h83337_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -173,56 +193,83 @@ void h83337_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h83337_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h83337_device::device_start()
{
h8_device::device_start();
+
+ m_wscr = 0;
+ m_stcr = 0;
+ m_syscr = 0;
+
+ save_item(NAME(m_wscr));
+ save_item(NAME(m_stcr));
+ save_item(NAME(m_syscr));
}
void h83337_device::device_reset()
{
h8_device::device_reset();
+
+ m_wscr = 0x08;
+ m_stcr = 0x00;
m_syscr = 0x09;
}
-uint8_t h83337_device::syscr_r()
+u8 h83337_device::syscr_r()
{
return m_syscr;
}
-void h83337_device::syscr_w(uint8_t data)
+void h83337_device::syscr_w(u8 data)
{
- m_syscr = data;
logerror("syscr = %02x\n", data);
+ m_syscr = (m_syscr & 0x08) | (data & 0xf7);
}
-uint8_t h83337_device::wscr_r()
+u8 h83337_device::wscr_r()
{
- return 0x00;
+ return m_wscr;
}
-void h83337_device::wscr_w(uint8_t data)
+void h83337_device::wscr_w(u8 data)
{
logerror("wscr = %02x\n", data);
+ m_wscr = data;
}
-uint8_t h83337_device::stcr_r()
+u8 h83337_device::stcr_r()
{
- return 0x00;
+ return m_stcr;
}
-void h83337_device::stcr_w(uint8_t data)
+void h83337_device::stcr_w(u8 data)
{
logerror("stcr = %02x\n", data);
- m_timer8_0->set_extra_clock_bit(data & 0x01);
- m_timer8_1->set_extra_clock_bit(data & 0x02);
+
+ // ICKS0/1
+ m_timer8_0->set_extra_clock_bit(BIT(data, 0));
+ m_timer8_1->set_extra_clock_bit(BIT(data, 1));
+
+ m_stcr = data;
}
-uint8_t h83337_device::mdcr_r()
+u8 h83337_device::mdcr_r()
{
return 0x00;
}
-void h83337_device::mdcr_w(uint8_t data)
+void h83337_device::mdcr_w(u8 data)
{
logerror("mdcr = %02x\n", data);
}
diff --git a/src/devices/cpu/h8/h83337.h b/src/devices/cpu/h8/h83337.h
index 3575baa7fd2..60463f22c9a 100644
--- a/src/devices/cpu/h8/h83337.h
+++ b/src/devices/cpu/h8/h83337.h
@@ -15,7 +15,6 @@
The 3394, 3396, and 3397 variants are the mask-rom versions.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H83337_H
@@ -24,6 +23,7 @@
#pragma once
#include "h8.h"
+
#include "h8_intc.h"
#include "h8_adc.h"
#include "h8_port.h"
@@ -34,7 +34,7 @@
class h83337_device : public h8_device {
public:
- h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -54,17 +54,17 @@ public:
auto read_port9() { return m_read_port [PORT_9].bind(); }
auto write_port9() { return m_write_port[PORT_9].bind(); }
- uint8_t wscr_r();
- void wscr_w(uint8_t data);
- uint8_t stcr_r();
- void stcr_w(uint8_t data);
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
- uint8_t mdcr_r();
- void mdcr_w(uint8_t data);
+ u8 wscr_r();
+ void wscr_w(u8 data);
+ u8 stcr_r();
+ void stcr_w(u8 data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
+ u8 mdcr_r();
+ void mdcr_w(u8 data);
protected:
- h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h83337_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
required_device<h8_intc_device> m_intc;
required_device<h8_adc_device> m_adc;
@@ -83,29 +83,32 @@ protected:
required_device<h8_timer16_channel_device> m_timer16_0;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
- uint32_t m_ram_start;
+ u32 m_ram_start;
+ u8 m_wscr;
+ u8 m_stcr;
+ u8 m_syscr;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h83334_device : public h83337_device {
public:
- h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83334_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h83336_device : public h83337_device {
public:
- h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h83336_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H83334, h83334_device)
diff --git a/src/devices/cpu/h8/h8_adc.cpp b/src/devices/cpu/h8/h8_adc.cpp
index ffd89220158..6daaaeae890 100644
--- a/src/devices/cpu/h8/h8_adc.cpp
+++ b/src/devices/cpu/h8/h8_adc.cpp
@@ -11,11 +11,11 @@ static constexpr int V = 0;
DEFINE_DEVICE_TYPE(H8_ADC_3337, h8_adc_3337_device, "h8_adc_3337", "H8/3337 ADC")
DEFINE_DEVICE_TYPE(H8_ADC_3006, h8_adc_3006_device, "h8_adc_3006", "H8/3006 ADC")
DEFINE_DEVICE_TYPE(H8_ADC_2245, h8_adc_2245_device, "h8_adc_2245", "H8/2245 ADC")
-DEFINE_DEVICE_TYPE(H8_ADC_2320, h8_adc_2320_device, "h8_adc_2320", "H8/2320 ADC")
+DEFINE_DEVICE_TYPE(H8_ADC_2319, h8_adc_2319_device, "h8_adc_2319", "H8/2319 ADC")
DEFINE_DEVICE_TYPE(H8_ADC_2357, h8_adc_2357_device, "h8_adc_2357", "H8/2357 ADC")
DEFINE_DEVICE_TYPE(H8_ADC_2655, h8_adc_2655_device, "h8_adc_2655", "H8/2655 ADC")
-h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG),
@@ -26,34 +26,34 @@ h8_adc_device::h8_adc_device(const machine_config &mconfig, device_type type, co
m_analog_power_control = false;
}
-uint8_t h8_adc_device::addr8_r(offs_t offset)
+u8 h8_adc_device::addr8_r(offs_t offset)
{
if(V>=1) logerror("addr8_r %d %03x\n", offset, m_addr[offset >> 1]);
return offset & 1 ? m_addr[offset >> 1] << 6 : m_addr[offset >> 1] >> 2;
}
-uint16_t h8_adc_device::addr16_r(offs_t offset)
+u16 h8_adc_device::addr16_r(offs_t offset)
{
if(V>=1) logerror("addr16_r %d %03x\n", offset, m_addr[offset]);
return m_addr[offset];
}
-uint8_t h8_adc_device::adcsr_r()
+u8 h8_adc_device::adcsr_r()
{
if(V>=1) logerror("adcsr_r %02x\n", m_adcsr);
return m_adcsr;
}
-uint8_t h8_adc_device::adcr_r()
+u8 h8_adc_device::adcr_r()
{
if(V>=1) logerror("adcr_r %02x\n", m_adcr);
return m_adcr;
}
-void h8_adc_device::adcsr_w(uint8_t data)
+void h8_adc_device::adcsr_w(u8 data)
{
if(V>=1) logerror("adcsr_w %02x\n", data);
- uint8_t prev = m_adcsr;
+ u8 prev = m_adcsr;
m_adcsr = (data & 0x7f) | (m_adcsr & data & F_ADF);
mode_update();
if((prev & F_ADF) && !(m_adcsr & F_ADF)) {
@@ -71,7 +71,7 @@ void h8_adc_device::adcsr_w(uint8_t data)
start_conversion();
}
-void h8_adc_device::adcr_w(uint8_t data)
+void h8_adc_device::adcr_w(u8 data)
{
if(V>=1) logerror("adcr_w %02x\n", data);
m_adcr = data;
@@ -110,8 +110,8 @@ void h8_adc_device::device_start()
save_item(NAME(m_channel));
save_item(NAME(m_count));
save_item(NAME(m_analog_powered));
- save_item(NAME(m_next_event));
save_item(NAME(m_adtrg));
+ save_item(NAME(m_next_event));
}
void h8_adc_device::device_reset()
@@ -140,7 +140,7 @@ void h8_adc_device::done()
m_analog_powered = false;
}
-uint64_t h8_adc_device::internal_update(uint64_t current_time)
+u64 h8_adc_device::internal_update(u64 current_time)
{
if(m_next_event && m_next_event <= current_time) {
m_next_event = 0;
@@ -149,11 +149,17 @@ uint64_t h8_adc_device::internal_update(uint64_t current_time)
return m_next_event;
}
-void h8_adc_device::conversion_wait(bool first, bool poweron, uint64_t current_time)
+void h8_adc_device::notify_standby(int state)
+{
+ if(!state && m_next_event)
+ m_next_event += m_cpu->total_cycles() - m_cpu->standby_time();
+}
+
+void h8_adc_device::conversion_wait(bool first, bool poweron, u64 current_time)
{
- if(current_time)
+ if(current_time) {
m_next_event = current_time + conversion_time(first, poweron);
- else {
+ } else {
m_next_event = m_cpu->total_cycles() + conversion_time(first, poweron);
m_cpu->internal_update();
}
@@ -179,8 +185,9 @@ void h8_adc_device::sampling()
if(m_mode & DUAL) {
buffer_value(m_channel, 0);
buffer_value(m_channel+1, 1);
- } else
+ } else {
buffer_value(m_channel);
+ }
}
void h8_adc_device::start_conversion()
@@ -193,7 +200,7 @@ void h8_adc_device::start_conversion()
m_analog_powered = true;
}
-void h8_adc_device::timeout(uint64_t current_time)
+void h8_adc_device::timeout(u64 current_time)
{
if(m_mode & BUFFER) {
do_buffering((m_mode & DUAL) && (m_channel & 1));
@@ -218,7 +225,7 @@ void h8_adc_device::timeout(uint64_t current_time)
if(m_mode & ROTATE) {
if(m_channel != m_end_channel) {
- m_channel++;
+ m_channel = (m_channel + 1) & 7;
sampling();
conversion_wait(false, false, current_time);
return;
@@ -265,7 +272,7 @@ int h8_adc_device::get_channel_index(int count)
}
-h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_3337_device::h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_adc_device(mconfig, H8_ADC_3337, tag, owner, clock)
{
m_register_mask = 3;
@@ -286,7 +293,7 @@ void h8_adc_3337_device::mode_update()
m_trigger = m_adcr & 0x80 ? T_EXT : T_SOFT;
if(m_adcsr & 0x10) {
- m_start_mode = ACTIVE | ROTATE;
+ m_start_mode = ACTIVE | REPEAT | ROTATE;
m_start_channel = m_adcsr & 4;
m_end_channel = m_adcsr & 7;
} else {
@@ -296,7 +303,7 @@ void h8_adc_3337_device::mode_update()
}
-h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_3006_device::h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_adc_device(mconfig, H8_ADC_3006, tag, owner, clock)
{
m_register_mask = 3;
@@ -327,7 +334,7 @@ void h8_adc_3006_device::mode_update()
}
-h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_2245_device::h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_adc_device(mconfig, H8_ADC_2245, tag, owner, clock)
{
m_register_mask = 3;
@@ -358,29 +365,29 @@ void h8_adc_2245_device::mode_update()
}
-h8_adc_2320_device::h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8_adc_device(mconfig, H8_ADC_2320, tag, owner, clock)
+h8_adc_2319_device::h8_adc_2319_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8_adc_device(mconfig, H8_ADC_2319, tag, owner, clock)
{
m_register_mask = 3;
}
-int h8_adc_2320_device::conversion_time(bool first, bool poweron)
+int h8_adc_2319_device::conversion_time(bool first, bool poweron)
{
int tm;
if(first)
- if(m_adcr & 0x04)
+ if(m_adcr & 0x08)
tm = m_adcsr & 0x08 ? 134 : 266;
else
- tm = m_adcsr & 0x08 ? 68 : 580;
+ tm = m_adcsr & 0x08 ? 68 : 530;
else
- if(m_adcr & 0x04)
+ if(m_adcr & 0x08)
tm = m_adcsr & 0x08 ? 128 : 256;
else
tm = m_adcsr & 0x08 ? 64 : 512;
return tm;
}
-void h8_adc_2320_device::mode_update()
+void h8_adc_2319_device::mode_update()
{
m_trigger = 1 << ((m_adcr >> 6) & 3);
@@ -395,7 +402,7 @@ void h8_adc_2320_device::mode_update()
}
-h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_2357_device::h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_adc_device(mconfig, H8_ADC_2357, tag, owner, clock)
{
m_register_mask = 3;
@@ -426,7 +433,7 @@ void h8_adc_2357_device::mode_update()
}
-h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_adc_2655_device::h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_adc_device(mconfig, H8_ADC_2655, tag, owner, clock)
{
m_suspend_on_interrupt = true;
@@ -450,7 +457,7 @@ void h8_adc_2655_device::mode_update()
m_mode = ACTIVE | (m_adcr & 0x08 ? REPEAT : 0);
- if(m_adcsr & 0x03) {
+ if(m_adcr & 0x03) {
m_mode |= BUFFER;
}
@@ -461,11 +468,12 @@ void h8_adc_2655_device::mode_update()
if(m_adcr & 0x04) {
m_mode |= DUAL;
m_end_channel = (m_adcsr & 6)+1;
- } else
+ } else {
m_end_channel = m_adcsr & 7;
- } else
+ }
+ } else {
m_start_channel = m_end_channel = m_adcsr & 7;
-
+ }
}
void h8_adc_2655_device::do_buffering(int buffer)
diff --git a/src/devices/cpu/h8/h8_adc.h b/src/devices/cpu/h8/h8_adc.h
index 3c4cd7d3406..66f9da51d58 100644
--- a/src/devices/cpu/h8/h8_adc.h
+++ b/src/devices/cpu/h8/h8_adc.h
@@ -19,21 +19,26 @@
class h8_adc_device : public device_t {
public:
- template<typename T, typename U> void set_info(T &&cpu, U &&intc, int vect) { m_cpu.set_tag(std::forward<T>(cpu)), m_intc.set_tag(std::forward<U>(intc)); m_intc_vector = vect; }
-
- uint8_t addr8_r(offs_t offset);
- uint16_t addr16_r(offs_t offset);
- uint8_t adcsr_r();
- uint8_t adcr_r();
- void adcsr_w(uint8_t data);
- void adcr_w(uint8_t data);
+ template<typename T, typename U> void set_info(T &&cpu, U &&intc, int vect) {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_intc_vector = vect;
+ }
+
+ u8 addr8_r(offs_t offset);
+ u16 addr16_r(offs_t offset);
+ u8 adcsr_r();
+ u8 adcr_r();
+ void adcsr_w(u8 data);
+ void adcr_w(u8 data);
void adtrg_w(int state);
void set_suspend(bool suspend);
- uint64_t internal_update(uint64_t current_time);
+ u64 internal_update(u64 current_time);
+ void notify_standby(int state);
protected:
- h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
required_device<h8_device> m_cpu;
required_device<h8_intc_device> m_intc;
@@ -63,24 +68,24 @@ protected:
COUNTED = 64
};
- uint16_t m_addr[8], m_buf[2];
- uint8_t m_adcsr, m_adcr;
+ u16 m_addr[8], m_buf[2];
+ u8 m_adcsr, m_adcr;
int m_register_mask;
int m_trigger, m_start_mode, m_start_channel, m_end_channel, m_start_count;
bool m_suspend_on_interrupt, m_analog_power_control;
int m_mode, m_channel, m_count;
bool m_analog_powered, m_adtrg;
- uint64_t m_next_event;
+ u64 m_next_event;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
void sampling();
void start_conversion();
- void conversion_wait(bool first, bool poweron, uint64_t current_time = 0);
+ void conversion_wait(bool first, bool poweron, u64 current_time = 0);
void buffer_value(int port, int buffer = 0);
void commit_value(int reg, int buffer = 0);
- void timeout(uint64_t current_time);
+ void timeout(u64 current_time);
void done();
virtual int conversion_time(bool first, bool poweron) = 0;
@@ -91,7 +96,7 @@ protected:
class h8_adc_3337_device : public h8_adc_device {
public:
- h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template <typename T, typename U> h8_adc_3337_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
: h8_adc_3337_device(mconfig, tag, owner, 0)
{
@@ -105,7 +110,7 @@ protected:
class h8_adc_3006_device : public h8_adc_device {
public:
- h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template <typename T, typename U> h8_adc_3006_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
: h8_adc_3006_device(mconfig, tag, owner, 0)
{
@@ -119,7 +124,7 @@ protected:
class h8_adc_2245_device : public h8_adc_device {
public:
- h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template <typename T, typename U> h8_adc_2245_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
: h8_adc_2245_device(mconfig, tag, owner, 0)
{
@@ -131,11 +136,11 @@ protected:
virtual void mode_update() override;
};
-class h8_adc_2320_device : public h8_adc_device {
+class h8_adc_2319_device : public h8_adc_device {
public:
- h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <typename T, typename U> h8_adc_2320_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
- : h8_adc_2320_device(mconfig, tag, owner, 0)
+ h8_adc_2319_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template <typename T, typename U> h8_adc_2319_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
+ : h8_adc_2319_device(mconfig, tag, owner, 0)
{
set_info(cpu, intc, vect);
}
@@ -147,7 +152,7 @@ protected:
class h8_adc_2357_device : public h8_adc_device {
public:
- h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template <typename T, typename U> h8_adc_2357_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
: h8_adc_2357_device(mconfig, tag, owner, 0)
{
@@ -161,7 +166,7 @@ protected:
class h8_adc_2655_device : public h8_adc_device {
public:
- h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template <typename T, typename U> h8_adc_2655_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int vect)
: h8_adc_2655_device(mconfig, tag, owner, 0)
{
@@ -178,7 +183,7 @@ protected:
DECLARE_DEVICE_TYPE(H8_ADC_3337, h8_adc_3337_device)
DECLARE_DEVICE_TYPE(H8_ADC_3006, h8_adc_3006_device)
DECLARE_DEVICE_TYPE(H8_ADC_2245, h8_adc_2245_device)
-DECLARE_DEVICE_TYPE(H8_ADC_2320, h8_adc_2320_device)
+DECLARE_DEVICE_TYPE(H8_ADC_2319, h8_adc_2319_device)
DECLARE_DEVICE_TYPE(H8_ADC_2357, h8_adc_2357_device)
DECLARE_DEVICE_TYPE(H8_ADC_2655, h8_adc_2655_device)
diff --git a/src/devices/cpu/h8/h8_dma.cpp b/src/devices/cpu/h8/h8_dma.cpp
index 33b277c38e4..9ba510fff06 100644
--- a/src/devices/cpu/h8/h8_dma.cpp
+++ b/src/devices/cpu/h8/h8_dma.cpp
@@ -1,3 +1,6 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
#include "emu.h"
#include "h8_dma.h"
@@ -76,7 +79,7 @@ void h8gen_dma_device::start_stop_test()
} else {
if(m_dmach[i >> 1] && (m_dmach[i >> 1]->m_state[i & 1].m_flags & h8_dma_state::ACTIVE)) {
logerror("forced abort %d\n", i);
- exit(0);
+ m_dmach[i >> 1]->abort(i & 1);
}
}
}
@@ -84,10 +87,8 @@ void h8gen_dma_device::start_stop_test()
-
// DMA channel, common code
-
h8gen_dma_channel_device::h8gen_dma_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
@@ -102,9 +103,11 @@ void h8gen_dma_channel_device::device_start()
save_item(STRUCT_MEMBER(m_state, m_incs));
save_item(STRUCT_MEMBER(m_state, m_incd));
save_item(STRUCT_MEMBER(m_state, m_count));
+ save_item(STRUCT_MEMBER(m_state, m_bcount));
save_item(STRUCT_MEMBER(m_state, m_flags));
save_item(STRUCT_MEMBER(m_state, m_id));
save_item(STRUCT_MEMBER(m_state, m_trigger_vector));
+
save_item(NAME(m_mar));
save_item(NAME(m_ioar));
save_item(NAME(m_etcr));
@@ -140,7 +143,6 @@ void h8gen_dma_channel_device::set_dreq(int state)
m_dreq = state;
// Only subchannel B/1 can react to dreq.
-
if(m_dreq) {
if(((m_state[1].m_flags & (h8_dma_state::ACTIVE|h8_dma_state::SUSPENDED)) == (h8_dma_state::ACTIVE|h8_dma_state::SUSPENDED)) && (m_state[1].m_trigger_vector == DREQ_LEVEL || m_state[1].m_trigger_vector == DREQ_EDGE)) {
m_state[1].m_flags &= ~h8_dma_state::SUSPENDED;
@@ -356,7 +358,7 @@ void h8gen_dma_channel_device::count_done(int submodule)
m_state[submodule].m_source = m_mar[0];
m_state[submodule].m_count = m_etcr[0] & 0xff00 ? m_etcr[0] >> 8 : 0x100;
- m_state[submodule].m_bcount --;
+ m_state[submodule].m_bcount--;
if(m_state[submodule].m_bcount == 1)
m_state[submodule].m_flags &= ~h8_dma_state::BLOCK;
diff --git a/src/devices/cpu/h8/h8_dma.h b/src/devices/cpu/h8/h8_dma.h
index 3ad1d731b2a..6a6dc246cb6 100644
--- a/src/devices/cpu/h8/h8_dma.h
+++ b/src/devices/cpu/h8/h8_dma.h
@@ -76,8 +76,8 @@ protected:
required_device<h8_device> m_cpu;
optional_device_array<h8gen_dma_channel_device, 4> m_dmach;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual u8 active_channels() const = 0;
@@ -125,15 +125,14 @@ protected:
u8 m_dmawer, m_dmatcr;
u16 m_dmabcr;
- void device_start() override;
- void device_reset() override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
u8 active_channels() const override;
};
-
class h8gen_dma_channel_device : public device_t {
public:
enum {
@@ -182,6 +181,7 @@ public:
bool transfer_test_interrupt(int vector);
void set_dreq(int state);
void start(int submodule);
+ void abort(int submodule) { dma_done(submodule); }
protected:
required_device<h8_device> m_cpu;
@@ -193,8 +193,8 @@ protected:
u16 m_ioar[2], m_etcr[2];
bool m_dreq;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void dma_done(int subchannel);
virtual int channel_mode() const = 0;
@@ -231,8 +231,8 @@ protected:
bool m_has_adc;
bool m_targets_sci1;
- void device_start() override;
- void device_reset() override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
void dma_done(int subchannel) override;
int channel_mode() const override;
@@ -261,8 +261,8 @@ protected:
u16 m_dmacr;
required_device<h8s_dma_device> m_dma;
- void device_start() override;
- void device_reset() override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
void dma_done(int subchannel) override;
int channel_mode() const override;
diff --git a/src/devices/cpu/h8/h8_dtc.cpp b/src/devices/cpu/h8/h8_dtc.cpp
index 8d51c067843..3dd276fca11 100644
--- a/src/devices/cpu/h8/h8_dtc.cpp
+++ b/src/devices/cpu/h8/h8_dtc.cpp
@@ -1,3 +1,6 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
#include "emu.h"
#include "h8_dtc.h"
@@ -26,7 +29,7 @@ const int h8_dtc_device::vector_to_enable[92] = {
-1, 40, 41, -1 // ERI2, RXI2, TXI2, TEI2
};
-h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, H8_DTC, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG)
@@ -36,37 +39,50 @@ h8_dtc_device::h8_dtc_device(const machine_config &mconfig, const char *tag, dev
void h8_dtc_device::device_start()
{
// TODO, probably need to kill the vectors
+ save_item(STRUCT_MEMBER(m_states, m_base));
+ save_item(STRUCT_MEMBER(m_states, m_sra));
+ save_item(STRUCT_MEMBER(m_states, m_dar));
+ save_item(STRUCT_MEMBER(m_states, m_cr));
+ save_item(STRUCT_MEMBER(m_states, m_incs));
+ save_item(STRUCT_MEMBER(m_states, m_incd));
+ save_item(STRUCT_MEMBER(m_states, m_count));
+ save_item(STRUCT_MEMBER(m_states, m_id));
+ save_item(STRUCT_MEMBER(m_states, m_next));
+
+ save_item(NAME(m_dtcer));
+ save_item(NAME(m_dtvecr));
+ save_item(NAME(m_cur_active_vector));
}
void h8_dtc_device::device_reset()
{
memset(m_dtcer, 0x00, sizeof(m_dtcer));
memset(m_states, 0, sizeof(m_states));
- for(uint8_t i=0; i<sizeof(m_states)/sizeof(m_states[0]); i++)
+ for(u8 i=0; i<sizeof(m_states)/sizeof(m_states[0]); i++)
m_states[i].m_id = i;
m_dtvecr = 0x00;
m_cur_active_vector = -1;
}
-uint8_t h8_dtc_device::dtcer_r(offs_t offset)
+u8 h8_dtc_device::dtcer_r(offs_t offset)
{
if(V>=2) logerror("dtcer_r %x, %02x\n", offset, m_dtcer[offset]);
return m_dtcer[offset];
}
-void h8_dtc_device::dtcer_w(offs_t offset, uint8_t data)
+void h8_dtc_device::dtcer_w(offs_t offset, u8 data)
{
m_dtcer[offset] = data;
if(V>=2) logerror("dtcer_w %x, %02x\n", offset, data);
}
-uint8_t h8_dtc_device::dtvecr_r()
+u8 h8_dtc_device::dtvecr_r()
{
if(V>=2) logerror("dtvecr_r %02x\n", m_dtvecr);
return m_dtvecr;
}
-void h8_dtc_device::dtvecr_w(uint8_t data)
+void h8_dtc_device::dtvecr_w(u8 data)
{
m_dtvecr = data;
if(V>=2) logerror("dtvecr_w %02x\n", data);
@@ -122,11 +138,11 @@ void h8_dtc_device::vector_done(int vector)
m_waiting_vector.erase(wi);
h8_dtc_state *state = m_states + vector;
- uint32_t sra = state->m_sra;
- uint32_t dar = state->m_dar;
- uint32_t cr = state->m_cr;
+ u32 sra = state->m_sra;
+ u32 dar = state->m_dar;
+ u32 cr = state->m_cr;
- uint32_t mode = sra & 0x0c000000;
+ u32 mode = sra & 0x0c000000;
if(V>=1) logerror("regs at %08x sra=%08x dar=%08x cr=%08x %s mode\n", state->m_base, sra, dar, cr,
mode == 0x00000000 || mode == 0x0c000000 ? "normal" : mode == 0x04000000 ? "repeat" : "block");
state->m_incs = sra & 0x80000000 ?
@@ -198,7 +214,6 @@ void h8_dtc_device::writeback_done(int vector)
m_intc->internal_interrupt(vector);
} else {
logerror("Software dtc done\n");
- exit(0);
}
}
diff --git a/src/devices/cpu/h8/h8_dtc.h b/src/devices/cpu/h8/h8_dtc.h
index 7f272c810c1..0d5d1e70dcf 100644
--- a/src/devices/cpu/h8/h8_dtc.h
+++ b/src/devices/cpu/h8/h8_dtc.h
@@ -18,9 +18,9 @@
#include <list>
struct h8_dtc_state {
- uint32_t m_base, m_sra, m_dar, m_cr;
- int32_t m_incs, m_incd;
- uint32_t m_count;
+ u32 m_base, m_sra, m_dar, m_cr;
+ s32 m_incs, m_incd;
+ u32 m_count;
int m_id;
int m_next;
};
@@ -29,7 +29,7 @@ class h8_dtc_device : public device_t {
public:
enum { DTC_CHAINED = 1000 };
- h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
template<typename T, typename U> h8_dtc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq)
: h8_dtc_device(mconfig, tag, owner)
{
@@ -38,16 +38,16 @@ public:
m_irq = irq;
}
- uint8_t dtcer_r(offs_t offset);
- void dtcer_w(offs_t offset, uint8_t data);
- uint8_t dtvecr_r();
- void dtvecr_w(uint8_t data);
+ u8 dtcer_r(offs_t offset);
+ void dtcer_w(offs_t offset, u8 data);
+ u8 dtvecr_r();
+ void dtvecr_w(u8 data);
bool trigger_dtc(int vector);
void count_done(int id);
inline h8_dtc_state *get_object(int vector) { return m_states + vector; }
- inline uint32_t get_vector_address(int vector) { return 0x400 | ((vector ? vector : m_dtvecr & 0x7f) << 1); }
+ inline u32 get_vector_address(int vector) { return 0x400 | ((vector ? vector : m_dtvecr & 0x7f) << 1); }
int get_waiting_vector();
int get_waiting_writeback();
void vector_done(int vector);
@@ -61,10 +61,10 @@ protected:
int m_irq;
h8_dtc_state m_states[92];
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- uint8_t m_dtcer[6], m_dtvecr;
+ u8 m_dtcer[6], m_dtvecr;
int m_cur_active_vector;
std::vector<int> m_waiting_vector, m_waiting_writeback;
diff --git a/src/devices/cpu/h8/h8_intc.cpp b/src/devices/cpu/h8/h8_intc.cpp
index a2fdcdd7cfc..4598327bb72 100644
--- a/src/devices/cpu/h8/h8_intc.cpp
+++ b/src/devices/cpu/h8/h8_intc.cpp
@@ -1,5 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8_intc.cpp
+
+ H8 interrupt controllers family
+
+***************************************************************************/
#include "emu.h"
#include "h8_intc.h"
@@ -8,11 +15,12 @@
DEFINE_DEVICE_TYPE(H8_INTC, h8_intc_device, "h8_intc", "H8 interrupt controller")
+DEFINE_DEVICE_TYPE(H8325_INTC, h8325_intc_device, "h8325_intc", "H8/325 interrupt controller")
DEFINE_DEVICE_TYPE(H8H_INTC, h8h_intc_device, "h8h_intc", "H8H interrupt controller")
DEFINE_DEVICE_TYPE(H8S_INTC, h8s_intc_device, "h8s_intc", "H8S interrupt controller")
DEFINE_DEVICE_TYPE(GT913_INTC, gt913_intc_device, "gt913_intc", "Casio GT913F interrupt controller")
-h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_intc_device(mconfig, H8_INTC, tag, owner, clock)
{
m_irq_vector_base = 4;
@@ -20,9 +28,9 @@ h8_intc_device::h8_intc_device(const machine_config &mconfig, const char *tag, d
m_irq_vector_nmi = 3;
}
-h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- device_t(mconfig, type, tag, owner, clock), m_irq_vector_base(0), m_irq_vector_count(0), m_irq_vector_nmi(0),
- m_cpu(*this, finder_base::DUMMY_TAG), m_nmi_input(false), m_irq_input(0), m_ier(0), m_isr(0), m_iscr(0), m_icr_filter(0), m_ipr_filter(0)
+h8_intc_device::h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, type, tag, owner, clock), m_irq_vector_base(0), m_irq_vector_count(0), m_irq_vector_nmi(0), m_has_isr(false),
+ m_cpu(*this, finder_base::DUMMY_TAG), m_nmi_type(EDGE_FALL), m_nmi_input(false), m_irq_input(0), m_ier(0), m_isr(0), m_iscr(0), m_icr_filter(0), m_ipr_filter(0)
{
}
@@ -31,6 +39,7 @@ void h8_intc_device::device_start()
memset(m_pending_irqs, 0, sizeof(m_pending_irqs));
save_item(NAME(m_pending_irqs));
save_item(NAME(m_irq_type));
+ save_item(NAME(m_nmi_type));
save_item(NAME(m_nmi_input));
save_item(NAME(m_irq_input));
save_item(NAME(m_ier));
@@ -42,10 +51,12 @@ void h8_intc_device::device_start()
void h8_intc_device::device_reset()
{
- memset(m_irq_type, 0, sizeof(m_irq_type));
+ memset(m_irq_type, 0, sizeof(m_irq_type)); // LEVEL_LOW
+ m_nmi_type = EDGE_FALL;
memset(m_pending_irqs, 0, sizeof(m_pending_irqs));
- m_ier = m_isr = m_irq_input = 0x00;
m_iscr = 0x0000;
+ m_ier = m_isr = 0x00;
+ check_level_irqs(false);
}
int h8_intc_device::interrupt_taken(int vector)
@@ -55,8 +66,9 @@ int h8_intc_device::interrupt_taken(int vector)
m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31));
if(vector >= m_irq_vector_base && vector < m_irq_vector_base + m_irq_vector_count) {
int irq = vector - m_irq_vector_base;
- if(m_irq_type[irq] != IRQ_LEVEL || !(m_irq_input & (1 << irq)))
- m_isr &= ~(1 << irq);
+ u8 mask = 1 << irq;
+ if(m_irq_type[irq] != LEVEL_LOW || !(m_irq_input & mask))
+ m_isr &= ~mask;
update_irq_state();
return irq;
}
@@ -79,24 +91,38 @@ void h8_intc_device::internal_interrupt(int vector)
void h8_intc_device::set_input(int inputnum, int state)
{
if(inputnum == INPUT_LINE_NMI) {
- if(state == ASSERT_LINE && !m_nmi_input)
- m_pending_irqs[0] |= 1 << m_irq_vector_nmi;
+ bool set = false;
+ switch(m_nmi_type) {
+ case EDGE_FALL: set = state == ASSERT_LINE && !m_nmi_input; break;
+ case EDGE_RISE: set = state == CLEAR_LINE && m_nmi_input; break;
+ default: assert(0); break;
+ }
m_nmi_input = state == ASSERT_LINE;
- update_irq_state();
+ if(set && machine().time() > attotime::zero) {
+ m_pending_irqs[0] |= 1 << m_irq_vector_nmi;
+ update_irq_state();
+ }
} else {
bool set = false;
- bool cur = m_irq_input & (1 << inputnum);
+ u8 mask = 1 << inputnum;
+ u8 cur = m_irq_input & mask;
switch(m_irq_type[inputnum]) {
- case IRQ_LEVEL: set = state == ASSERT_LINE; break;
- case IRQ_EDGE: set = state == ASSERT_LINE && !cur; break;
- case IRQ_DUAL_EDGE: set = (state == ASSERT_LINE && !cur) || (state == CLEAR_LINE && cur); break;
+ case LEVEL_LOW:
+ set = state == ASSERT_LINE;
+ // on base H8, level-triggered IRQ is not latched
+ if(!set && !m_has_isr)
+ m_isr &= ~mask;
+ break;
+ case EDGE_FALL: set = state == ASSERT_LINE && !cur; break;
+ case EDGE_RISE: set = state == CLEAR_LINE && cur; break;
+ case EDGE_DUAL: set = bool(state) != bool(cur); break;
}
if(state == ASSERT_LINE)
- m_irq_input |= 1 << inputnum;
+ m_irq_input |= mask;
else
- m_irq_input &= ~(1 << inputnum);
+ m_irq_input &= ~mask;
if(set) {
- m_isr |= 1 << inputnum;
+ m_isr |= mask;
update_irq_state();
}
}
@@ -109,40 +135,39 @@ void h8_intc_device::set_filter(int icr_filter, int ipr_filter)
update_irq_state();
}
-uint8_t h8_intc_device::ier_r()
+u8 h8_intc_device::ier_r()
{
return m_ier;
}
-void h8_intc_device::ier_w(uint8_t data)
+void h8_intc_device::ier_w(u8 data)
{
m_ier = data;
// logerror("ier = %02x\n", data);
update_irq_state();
}
-void h8_intc_device::check_level_irqs(bool force_update)
+void h8_intc_device::check_level_irqs(bool update)
{
- logerror("irq_input=%02x\n", m_irq_input);
- bool update = force_update;
- for(int i=0; i<8; i++) {
- unsigned char mask = 1 << i;
- if(m_irq_type[i] == IRQ_LEVEL && (m_irq_input & mask) && !(m_isr & mask)) {
+ bool set = false;
+ for(int i = 0; i < m_irq_vector_count; i++) {
+ u8 mask = 1 << i;
+ if(m_irq_type[i] == LEVEL_LOW && (m_irq_input & mask) && !(m_isr & mask)) {
m_isr |= mask;
- update = true;
+ set = true;
}
}
- if(update)
+ if(set && update)
update_irq_state();
}
-uint8_t h8_intc_device::iscr_r()
+u8 h8_intc_device::iscr_r()
{
return m_iscr;
}
-void h8_intc_device::iscr_w(uint8_t data)
+void h8_intc_device::iscr_w(u8 data)
{
m_iscr = data;
logerror("iscr = %02x\n", m_iscr);
@@ -151,22 +176,24 @@ void h8_intc_device::iscr_w(uint8_t data)
void h8_intc_device::update_irq_types()
{
- for(int i=0; i<8; i++)
- switch((m_iscr >> (i)) & 1) {
+ for(int i = 0; i < m_irq_vector_count; i++)
+ switch((m_iscr >> i) & 1) {
case 0:
- m_irq_type[i] = IRQ_LEVEL;
+ m_irq_type[i] = LEVEL_LOW;
break;
case 1:
- m_irq_type[i] = IRQ_EDGE;
+ if(!m_has_isr && m_irq_type[i] == LEVEL_LOW)
+ m_isr &= ~(1 << i);
+ m_irq_type[i] = EDGE_FALL;
break;
}
- check_level_irqs();
+ check_level_irqs(true);
}
void h8_intc_device::update_irq_state()
{
if(m_irq_vector_count > 0) {
- const unsigned mask = (1 << m_irq_vector_count) - 1;
+ const u32 mask = (1 << m_irq_vector_count) - 1;
m_pending_irqs[0] &= ~(mask << m_irq_vector_base);
m_pending_irqs[0] |= (m_isr & m_ier & mask) << m_irq_vector_base;
@@ -175,10 +202,10 @@ void h8_intc_device::update_irq_state()
int cur_vector = 0;
int cur_level = -1;
- for(int i=0; i<MAX_VECTORS/32; i++) {
- unsigned int pending = m_pending_irqs[i];
+ for(int i = 0; i < MAX_VECTORS/32; i++) {
+ u32 pending = m_pending_irqs[i];
if(pending)
- for(int j=0; j<32; j++)
+ for(int j = 0; j < 32; j++)
if(pending & (1 << j)) {
int vect = i*32+j;
int icr_pri, ipr_pri;
@@ -202,29 +229,41 @@ void h8_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const
}
-gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8_intc_device(mconfig, GT913_INTC, tag, owner, clock)
+// H8/325
+
+h8325_intc_device::h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8_intc_device(mconfig, H8325_INTC, tag, owner, clock)
{
m_irq_vector_base = 4;
- m_irq_vector_count = 1;
+ m_irq_vector_count = 3;
m_irq_vector_nmi = 3;
}
-void gt913_intc_device::device_reset()
+void h8325_intc_device::update_irq_types()
{
- h8_intc_device::device_reset();
-
- m_ier = 0x01;
+ for(int i = 0; i < m_irq_vector_count; i++) {
+ u8 type = m_irq_type[i];
+ switch(bitswap<2>(m_iscr >> i,0,4)) {
+ case 0: case 1:
+ m_irq_type[i] = LEVEL_LOW;
+ break;
+ case 2:
+ m_irq_type[i] = EDGE_FALL;
+ break;
+ case 3:
+ m_irq_type[i] = EDGE_RISE;
+ break;
+ }
+ if(type == LEVEL_LOW && m_irq_type[i] != LEVEL_LOW)
+ m_isr &= ~(1 << i);
+ }
+ check_level_irqs(true);
}
-void gt913_intc_device::clear_interrupt(int vector)
-{
- m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31));
- update_irq_state();
-}
+// H8H
-h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8h_intc_device(mconfig, H8H_INTC, tag, owner, clock)
{
m_irq_vector_base = 12;
@@ -232,7 +271,7 @@ h8h_intc_device::h8h_intc_device(const machine_config &mconfig, const char *tag,
m_irq_vector_nmi = 7;
}
-h8h_intc_device::h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h8h_intc_device::h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
h8_intc_device(mconfig, type, tag, owner, clock)
{
}
@@ -241,6 +280,7 @@ void h8h_intc_device::device_start()
{
h8_intc_device::device_start();
save_item(NAME(m_icr));
+ m_has_isr = true;
}
void h8h_intc_device::device_reset()
@@ -249,80 +289,30 @@ void h8h_intc_device::device_reset()
m_icr = 0x000000;
}
-uint8_t h8h_intc_device::isr_r()
+u8 h8h_intc_device::isr_r()
{
return m_isr;
}
-void h8h_intc_device::isr_w(uint8_t data)
+void h8h_intc_device::isr_w(u8 data)
{
m_isr &= data; // edge/level
- logerror("isr = %02x / %02x\n", data, m_isr);
- check_level_irqs(true);
+ //logerror("isr = %02x / %02x\n", data, m_isr);
+ check_level_irqs(false);
+ update_irq_state();
}
-uint8_t h8h_intc_device::icr_r(offs_t offset)
+u8 h8h_intc_device::icr_r(offs_t offset)
{
return m_icr >> (8*offset);
}
-void h8h_intc_device::icr_w(offs_t offset, uint8_t data)
+void h8h_intc_device::icr_w(offs_t offset, u8 data)
{
m_icr = (m_icr & (0xff << (8*offset))) | (data << (8*offset));
logerror("icr %d = %02x\n", offset, data);
}
-uint8_t h8h_intc_device::icrc_r()
-{
- return icr_r(2);
-}
-
-void h8h_intc_device::icrc_w(uint8_t data)
-{
- icr_w(2, data);
-}
-
-uint8_t h8h_intc_device::iscrh_r()
-{
- return m_iscr >> 8;
-}
-
-void h8h_intc_device::iscrh_w(uint8_t data)
-{
- m_iscr = (m_iscr & 0x00ff) | (data << 8);
- logerror("iscr = %04x\n", m_iscr);
- update_irq_types();
-}
-
-uint8_t h8h_intc_device::iscrl_r()
-{
- return m_iscr;
-}
-
-void h8h_intc_device::iscrl_w(uint8_t data)
-{
- m_iscr = (m_iscr & 0xff00) | data;
- logerror("iscr = %04x\n", m_iscr);
- update_irq_types();
-}
-
-void h8h_intc_device::update_irq_types()
-{
- for(int i=0; i<8; i++)
- switch((m_iscr >> (2*i)) & 3) {
- case 0:
- m_irq_type[i] = IRQ_LEVEL;
- break;
- case 1: case 2:
- m_irq_type[i] = IRQ_EDGE;
- break;
- case 3:
- m_irq_type[i] = IRQ_DUAL_EDGE;
- break;
- }
- check_level_irqs();
-}
-
const int h8h_intc_device::vector_to_slot[64] = {
-1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7
-1, -1, -1, -1, 0, 1, 2, 2, // IRQ 0-3
@@ -351,7 +341,10 @@ void h8h_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const
icr_pri = (m_icr >> (slot ^ 7)) & 1;
}
-h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+
+// H8S
+
+h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8h_intc_device(mconfig, H8S_INTC, tag, owner, clock)
{
m_irq_vector_base = 16;
@@ -359,38 +352,78 @@ h8s_intc_device::h8s_intc_device(const machine_config &mconfig, const char *tag,
m_irq_vector_nmi = 7;
}
+void h8s_intc_device::device_start()
+{
+ h8h_intc_device::device_start();
+ save_item(NAME(m_ipr));
+}
+
void h8s_intc_device::device_reset()
{
h8h_intc_device::device_reset();
memset(m_ipr, 0x77, sizeof(m_ipr));
}
-uint8_t h8s_intc_device::ipr_r(offs_t offset)
+u8 h8s_intc_device::ipr_r(offs_t offset)
{
return m_ipr[offset];
}
-void h8s_intc_device::ipr_w(offs_t offset, uint8_t data)
+void h8s_intc_device::ipr_w(offs_t offset, u8 data)
{
m_ipr[offset] = data;
logerror("ipr %d = %02x\n", offset, data);
}
-uint8_t h8s_intc_device::iprk_r()
+u8 h8s_intc_device::iscrh_r()
{
- return ipr_r(10);
+ return m_iscr >> 8;
}
-void h8s_intc_device::iprk_w(uint8_t data)
+void h8s_intc_device::iscrh_w(u8 data)
{
- ipr_w(10, data);
+ m_iscr = (m_iscr & 0x00ff) | (data << 8);
+ logerror("iscr = %04x\n", m_iscr);
+ update_irq_types();
+}
+
+u8 h8s_intc_device::iscrl_r()
+{
+ return m_iscr;
+}
+
+void h8s_intc_device::iscrl_w(u8 data)
+{
+ m_iscr = (m_iscr & 0xff00) | data;
+ logerror("iscr = %04x\n", m_iscr);
+ update_irq_types();
+}
+
+void h8s_intc_device::update_irq_types()
+{
+ for(int i = 0; i < m_irq_vector_count; i++)
+ switch((m_iscr >> (2*i)) & 3) {
+ case 0:
+ m_irq_type[i] = LEVEL_LOW;
+ break;
+ case 1:
+ m_irq_type[i] = EDGE_FALL;
+ break;
+ case 2:
+ m_irq_type[i] = EDGE_RISE;
+ break;
+ case 3:
+ m_irq_type[i] = EDGE_DUAL;
+ break;
+ }
+ check_level_irqs(true);
}
const int h8s_intc_device::vector_to_slot[92] = {
-1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7
-1, -1, -1, -1, -1, -1, -1, -1,
- 0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7
- 5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI
+ 0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7
+ 5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI
10, 10, 10, 10, 10, 10, 10, 10, // TGI0A, TGI0B, TGI0C, TGI0D, TGI0V
11, 11, 11, 11, 12, 12, 12, 12, // TGI1A, TGI1B, TGI1V, TGI1U, TGI2A, TGI2B, TGI2V, TGI2U
13, 13, 13, 13, 13, 13, 13, 13, // TGI3A, TGI3B, TGI3C, TGI3D, TGI3V
@@ -418,3 +451,27 @@ void h8s_intc_device::get_priority(int vect, int &icr_pri, int &ipr_pri) const
icr_pri = (m_icr >> (slot ^ 7)) & 1;
ipr_pri = (m_ipr[slot >> 1] >> (slot & 1 ? 0 : 4)) & 7;
}
+
+
+// GT913
+
+gt913_intc_device::gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8_intc_device(mconfig, GT913_INTC, tag, owner, clock)
+{
+ m_irq_vector_base = 4;
+ m_irq_vector_count = 1;
+ m_irq_vector_nmi = 3;
+}
+
+void gt913_intc_device::device_reset()
+{
+ h8_intc_device::device_reset();
+
+ m_ier = 0x01;
+}
+
+void gt913_intc_device::clear_interrupt(int vector)
+{
+ m_pending_irqs[vector >> 5] &= ~(1 << (vector & 31));
+ update_irq_state();
+}
diff --git a/src/devices/cpu/h8/h8_intc.h b/src/devices/cpu/h8/h8_intc.h
index b1571fc64c9..7b39e1953a3 100644
--- a/src/devices/cpu/h8/h8_intc.h
+++ b/src/devices/cpu/h8/h8_intc.h
@@ -6,7 +6,6 @@
H8 interrupt controllers family
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_INTC_H
@@ -18,7 +17,7 @@ class h8_device;
class h8_intc_device : public device_t {
public:
- h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
template<typename T> h8_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
h8_intc_device(mconfig, tag, owner)
{
@@ -29,113 +28,134 @@ public:
void internal_interrupt(int vector);
void set_input(int inputnum, int state);
void set_filter(int icr_filter, int ipr_filter);
+ void set_nmi_edge(int state) { m_nmi_type = state ? EDGE_RISE : EDGE_FALL; }
- uint8_t ier_r();
- void ier_w(uint8_t data);
- uint8_t iscr_r();
- void iscr_w(uint8_t data);
+ u8 ier_r();
+ void ier_w(u8 data);
+ u8 iscr_r();
+ void iscr_w(u8 data);
protected:
- enum { IRQ_LEVEL, IRQ_EDGE, IRQ_DUAL_EDGE };
+ enum {
+ LEVEL_LOW, // ASSERT
+ EDGE_FALL, // CLEAR->ASSERT
+ EDGE_RISE, // ASSERT->CLEAR
+ EDGE_DUAL
+ };
enum { MAX_VECTORS = 256 };
int m_irq_vector_base;
int m_irq_vector_count;
int m_irq_vector_nmi;
+ bool m_has_isr;
required_device<h8_device> m_cpu;
- uint32_t m_pending_irqs[MAX_VECTORS/32];
- int m_irq_type[8];
+ u32 m_pending_irqs[MAX_VECTORS/32];
+ u8 m_irq_type[8];
+ u8 m_nmi_type;
bool m_nmi_input;
- uint8_t m_irq_input;
- uint8_t m_ier;
- uint8_t m_isr;
- uint16_t m_iscr;
+ u8 m_irq_input;
+ u8 m_ier;
+ u8 m_isr;
+ u16 m_iscr;
int m_icr_filter, m_ipr_filter;
- h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void get_priority(int vect, int &icr_pri, int &ipr_pri) const;
void update_irq_state();
- void update_irq_types();
- void check_level_irqs(bool force_update = false);
+ virtual void update_irq_types();
+ void check_level_irqs(bool update);
};
-class gt913_intc_device : public h8_intc_device {
+class h8325_intc_device : public h8_intc_device {
public:
- gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- template<typename T> gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
- gt913_intc_device(mconfig, tag, owner)
+ h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ template<typename T> h8325_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
+ h8325_intc_device(mconfig, tag, owner)
{
m_cpu.set_tag(std::forward<T>(cpu));
}
- void clear_interrupt(int vector);
-
protected:
- virtual void device_reset() override;
+ virtual void update_irq_types() override;
};
class h8h_intc_device : public h8_intc_device {
public:
- h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
template<typename T> h8h_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
h8h_intc_device(mconfig, tag, owner)
{
m_cpu.set_tag(std::forward<T>(cpu));
}
- uint8_t isr_r();
- void isr_w(uint8_t data);
- uint8_t icr_r(offs_t offset);
- void icr_w(offs_t offset, uint8_t data);
- uint8_t icrc_r();
- void icrc_w(uint8_t data);
- uint8_t iscrh_r();
- void iscrh_w(uint8_t data);
- uint8_t iscrl_r();
- void iscrl_w(uint8_t data);
+ u8 isr_r();
+ void isr_w(u8 data);
+ u8 icr_r(offs_t offset);
+ void icr_w(offs_t offset, u8 data);
protected:
static const int vector_to_slot[];
- uint32_t m_icr;
+ u32 m_icr;
- h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8h_intc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void get_priority(int vect, int &icr_pri, int &ipr_pri) const override;
- void update_irq_types();
};
class h8s_intc_device : public h8h_intc_device {
public:
- h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
template<typename T> h8s_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
h8s_intc_device(mconfig, tag, owner)
{
m_cpu.set_tag(std::forward<T>(cpu));
}
- uint8_t ipr_r(offs_t offset);
- void ipr_w(offs_t offset, uint8_t data);
- uint8_t iprk_r();
- void iprk_w(uint8_t data);
+ u8 ipr_r(offs_t offset);
+ void ipr_w(offs_t offset, u8 data);
+ u8 iscrh_r();
+ void iscrh_w(u8 data);
+ u8 iscrl_r();
+ void iscrl_w(u8 data);
+
private:
static const int vector_to_slot[];
- uint8_t m_ipr[11];
+ u8 m_ipr[11];
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void get_priority(int vect, int &icr_pri, int &ipr_pri) const override;
- virtual void device_reset() override;
+ virtual void update_irq_types() override;
+};
+
+class gt913_intc_device : public h8_intc_device {
+public:
+ gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ template<typename T> gt913_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
+ gt913_intc_device(mconfig, tag, owner)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ }
+
+ void clear_interrupt(int vector);
+
+protected:
+ virtual void device_reset() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(H8_INTC, h8_intc_device)
+DECLARE_DEVICE_TYPE(H8325_INTC, h8325_intc_device)
DECLARE_DEVICE_TYPE(H8H_INTC, h8h_intc_device)
DECLARE_DEVICE_TYPE(H8S_INTC, h8s_intc_device)
DECLARE_DEVICE_TYPE(GT913_INTC, gt913_intc_device)
diff --git a/src/devices/cpu/h8/h8_port.cpp b/src/devices/cpu/h8/h8_port.cpp
index 51a589c8146..782f5439646 100644
--- a/src/devices/cpu/h8/h8_port.cpp
+++ b/src/devices/cpu/h8/h8_port.cpp
@@ -1,70 +1,83 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8_port.cpp
+
+ H8 8 bits digital port
+
+ TODO:
+ - Many I/O port pins have a double function, eg. for IRQs or timer input
+ strobe. Ideally this device should know the input pin state, instead
+ of having to implement it in the MAME drivers.
+
+***************************************************************************/
+
#include "emu.h"
#include "h8_port.h"
DEFINE_DEVICE_TYPE(H8_PORT, h8_port_device, "h8_digital_port", "H8 digital port")
-h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_port_device::h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, H8_PORT, tag, owner, clock),
m_cpu(*this, DEVICE_SELF_OWNER), m_address(0), m_default_ddr(0), m_ddr(0), m_pcr(0), m_odr(0), m_mask(0), m_dr(0), m_last_output(0)
{
}
-void h8_port_device::ddr_w(uint8_t data)
+void h8_port_device::ddr_w(u8 data)
{
- // logerror("ddr_w %02x\n", data);
+ //logerror("ddr_w %02x\n", data);
m_ddr = data;
update_output();
}
-uint8_t h8_port_device::ddr_r()
+u8 h8_port_device::ddr_r()
{
return m_ddr;
}
-void h8_port_device::dr_w(uint8_t data)
+void h8_port_device::dr_w(u8 data)
{
- // logerror("dr_w %02x\n", data);
+ //logerror("dr_w %02x\n", data);
m_dr = data;
update_output();
}
-uint8_t h8_port_device::dr_r()
+u8 h8_port_device::dr_r()
{
- // logerror("dr_r %02x\n", (dr | mask) & 0xff);
+ //logerror("dr_r %02x\n", (dr | mask) & 0xff);
return m_dr | m_mask;
}
-uint8_t h8_port_device::port_r()
+u8 h8_port_device::port_r()
{
- uint8_t res = m_mask | (m_dr & m_ddr);
- if((m_ddr & ~m_mask) != uint8_t(~m_mask))
+ u8 res = m_mask | (m_dr & m_ddr);
+ if((m_ddr & ~m_mask) != u8(~m_mask))
res |= m_cpu->do_read_port(m_address) & ~m_ddr;
- // logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, uint8_t(~mask));
+ //logerror("port_r %02x (%02x %02x)\n", res, ddr & ~mask, u8(~mask));
return res;
}
-void h8_port_device::pcr_w(uint8_t data)
+void h8_port_device::pcr_w(u8 data)
{
logerror("pcr_w %02x\n", data);
m_pcr = data;
}
-uint8_t h8_port_device::pcr_r()
+u8 h8_port_device::pcr_r()
{
- logerror("dr_r %02x\n", (m_pcr | m_mask) & 0xff);
+ logerror("pcr_r %02x\n", (m_pcr | m_mask) & 0xff);
return m_pcr | m_mask;
}
-void h8_port_device::odr_w(uint8_t data)
+void h8_port_device::odr_w(u8 data)
{
logerror("odr_w %02x\n", data);
m_odr = data;
}
-uint8_t h8_port_device::odr_r()
+u8 h8_port_device::odr_r()
{
logerror("odr_r %02x\n", (m_odr | ~m_mask) & 0xff);
return m_odr | ~m_mask;
@@ -72,28 +85,56 @@ uint8_t h8_port_device::odr_r()
void h8_port_device::update_output()
{
- uint8_t res = m_dr & m_ddr & ~m_mask;
+ u8 data = (m_dr | ~m_ddr) & ~m_mask;
+ u8 ddr = m_ddr & ~m_mask; // 0-bits = hi-z
+ u16 res = ddr << 8 | data;
+
if(res != m_last_output) {
m_last_output = res;
- m_cpu->do_write_port(m_address, res);
+ m_cpu->do_write_port(m_address, data, ddr);
}
}
void h8_port_device::device_start()
{
save_item(NAME(m_ddr));
- save_item(NAME(m_dr));
save_item(NAME(m_pcr));
save_item(NAME(m_odr));
+ save_item(NAME(m_dr));
save_item(NAME(m_last_output));
- m_last_output = 0;
-}
-void h8_port_device::device_reset()
-{
+ m_last_output = -1;
m_dr = 0;
m_ddr = m_default_ddr;
m_pcr = 0;
m_odr = 0;
+}
+
+void h8_port_device::device_reset()
+{
update_output();
}
+
+bool h8_port_device::nvram_write(util::write_stream &file)
+{
+ u8 const buf[4]{ m_ddr, m_dr, m_pcr, m_odr };
+
+ auto const [err, actual] = write(file, buf, sizeof(buf));
+ return !err;
+}
+
+bool h8_port_device::nvram_read(util::read_stream &file)
+{
+ u8 buf[4];
+
+ auto const [err, actual] = read(file, buf, sizeof(buf));
+ if(err || (sizeof(buf) != actual))
+ return false;
+
+ m_ddr = buf[0];
+ m_dr = buf[1];
+ m_pcr = buf[2];
+ m_odr = buf[3];
+
+ return true;
+}
diff --git a/src/devices/cpu/h8/h8_port.h b/src/devices/cpu/h8/h8_port.h
index 19a8745cb5e..5f6b46368b2 100644
--- a/src/devices/cpu/h8/h8_port.h
+++ b/src/devices/cpu/h8/h8_port.h
@@ -6,7 +6,6 @@
H8 8 bits digital port
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_PORT_H
@@ -18,8 +17,8 @@
class h8_port_device : public device_t {
public:
- h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template<typename T> h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int address, uint8_t default_ddr, uint8_t mask)
+ h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template<typename T> h8_port_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int address, u8 default_ddr, u8 mask)
: h8_port_device(mconfig, tag, owner, 0)
{
m_cpu.set_tag(std::forward<T>(cpu));
@@ -28,30 +27,36 @@ public:
m_mask = mask;
}
- void ddr_w(uint8_t data);
- uint8_t ddr_r();
- void dr_w(uint8_t data);
- uint8_t dr_r();
- uint8_t port_r();
- void pcr_w(uint8_t data);
- uint8_t pcr_r();
- void odr_w(uint8_t data);
- uint8_t odr_r();
+ void ddr_w(u8 data);
+ u8 ddr_r();
+ u8 ff_r() { return 0xff; }
+ void dr_w(u8 data);
+ u8 dr_r();
+ u8 port_r();
+ void pcr_w(u8 data);
+ u8 pcr_r();
+ void odr_w(u8 data);
+ u8 odr_r();
+
+ bool nvram_read(util::read_stream &file);
+ bool nvram_write(util::write_stream &file);
protected:
required_device<h8_device> m_cpu;
int m_address;
- uint8_t m_default_ddr, m_ddr, m_pcr, m_odr;
- uint8_t m_mask;
- uint8_t m_dr;
- uint8_t m_last_output;
+ u8 m_default_ddr, m_ddr, m_pcr, m_odr;
+ u8 m_mask;
+ u8 m_dr;
+ s32 m_last_output;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
void update_output();
};
DECLARE_DEVICE_TYPE(H8_PORT, h8_port_device)
+typedef device_type_enumerator<h8_port_device> h8_port_device_enumerator;
+
#endif // MAME_CPU_H8_H8_PORT_H
diff --git a/src/devices/cpu/h8/h8_sci.cpp b/src/devices/cpu/h8/h8_sci.cpp
index d78eb04f83e..3ec8951a22d 100644
--- a/src/devices/cpu/h8/h8_sci.cpp
+++ b/src/devices/cpu/h8/h8_sci.cpp
@@ -5,27 +5,71 @@
#include "h8_sci.h"
#include "h8.h"
-#include "h8_intc.h"
-// Verbosity level
-// 0 = no messages
-// 1 = transmitted/recieved bytes, reception errors and clock setup
-// 2 = everything but status register reads
-// 3 = everything
-static constexpr int V = 1;
+#define LOG_REGS (1 << 1U) // Register writes
+#define LOG_RREGS (1 << 2U) // Register reads
+#define LOG_RATE (1 << 3U) // Bitrate setting, beware that gk2000 changes it all the time ending up in a massive slowdown, don't leave it active
+#define LOG_DATA (1 << 4U) // Bytes transmitted
+#define LOG_CLOCK (1 << 5U) // Clock and transmission start/stop
+#define LOG_STATE (1 << 6U) // State machine states
+#define LOG_TICK (1 << 7U) // Clock ticks
+//#define VERBOSE (LOG_DATA)
+//#define LOG_OUTPUT_FUNC osd_printf_info
+#include "logmacro.h"
DEFINE_DEVICE_TYPE(H8_SCI, h8_sci_device, "h8_sci", "H8 Serial Communications Interface")
+
+// Clocking:
+// Async mode:
+// The circuit wants 16 events per bit.
+// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
+// then by (brr+1) then by 2.
+// * External clocking: the external clock is supposed to be 16*bitrate.
+// Sync mode:
+// The circuit wants 2 events per bit, a positive and a negative edge.
+// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
+// then by (brr+1) then by 2. Events are then interpreted has been alternatively positive and
+// negative (e.g. another divide-by-two, sync-wise).
+// * External clocking: the external clock is supposed to be at bitrate, both edges are used.
+//
+// Synchronization:
+// Async mode:
+// Both modes use a 4-bits counter incremented on every event (16/bit).
+//
+// * Transmit sets the counter to 0 at transmit start. Output data line changes value
+// on counter == 0. If the clock output is required, clk=1 outside of transmit,
+// clk=0 on counter==0, clk=1 on counter==8.
+//
+// * Receive sets the counter to 0 when the data line initially goes down (start bit)
+// Output line is read on counter==8. It is unknown whether the counter is reset
+// on every data line level change.
+//
+// Sync mode:
+// * Transmit changes the data line on negative edges, the clock line, following positive and
+// negative edge definition, is output as long as transmit is active and is otherwise 1.
+//
+// * Receive reads the data line on positive edges.
+//
+// Framing:
+// Async mode: 1 bit of start at 0, 7 or 8 bits of data, nothing or 1 bit of parity or 1 bit of multiprocessing, 1 or 2 bits of stop at 1.
+// Sync mode: 8 bits of data.
+//
+// Multiprocessing bit is an extra bit which value can be set on transmit in bit zero of ssr.
+// On receive when zero the byte is dropped.
+
+
const char *const h8_sci_device::state_names[] = { "idle", "start", "bit", "parity", "stop", "last-tick" };
-h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_sci_device::h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, H8_SCI, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG),
m_external_to_internal_ratio(0), m_internal_to_external_ratio(0), m_sync_timer(nullptr), m_id(0), m_eri_int(0), m_rxi_int(0), m_txi_int(0), m_tei_int(0),
- m_tx_state(0), m_rx_state(0), m_tx_bit(0), m_rx_bit(0), m_clock_state(0), m_tx_parity(0), m_rx_parity(0), m_ext_clock_counter(0), m_clock_mode(clock_mode_t::INTERNAL_ASYNC), m_clock_value(false), m_ext_clock_value(false), m_rx_value(false),
- m_rdr(0), m_tdr(0), m_smr(0), m_scr(0), m_ssr(0), m_brr(0), m_rsr(0), m_tsr(0), m_clock_base(0), m_divider(0)
+ m_tx_state(0), m_rx_state(0), m_tx_bit(0), m_rx_bit(0), m_clock_state(0), m_tx_parity(0), m_rx_parity(0), m_tx_clock_counter(0), m_rx_clock_counter(0),
+ m_clock_mode(INTERNAL_ASYNC), m_ext_clock_value(false), m_rx_value(true),
+ m_rdr(0), m_tdr(0), m_smr(0), m_scr(0), m_ssr(0), m_ssr_read(0), m_brr(0), m_rsr(0), m_tsr(0), m_clock_event(0), m_divider(0)
{
m_external_clock_period = attotime::never;
}
@@ -35,42 +79,49 @@ void h8_sci_device::do_set_external_clock_period(const attotime &period)
m_external_clock_period = period;
}
-void h8_sci_device::smr_w(uint8_t data)
+void h8_sci_device::smr_w(u8 data)
{
m_smr = data;
- if(V>=2) logerror("smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
- data & SMR_CA ? "sync" : "async",
- data & SMR_CHR ? '7' : '8',
- data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
- data & SMR_STOP ? '2' : '1',
- data & SMR_MP ? " mp" : "",
- 1 << 2*(data & SMR_CKS),
- m_cpu->pc());
+
+ LOGMASKED(LOG_REGS, "smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
+ data & SMR_CA ? "sync" : "async",
+ data & SMR_CHR ? '7' : '8',
+ data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
+ data & SMR_STOP ? '2' : '1',
+ data & SMR_MP ? " mp" : "",
+ 1 << 2*(data & SMR_CKS),
+ m_cpu->pc());
+
clock_update();
+
+ sync_rx_start();
}
-uint8_t h8_sci_device::smr_r()
+u8 h8_sci_device::smr_r()
{
- if(V>=2) logerror("smr_r %02x (%06x)\n", m_smr, m_cpu->pc());
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "smr_r %02x (%06x)\n", m_smr, m_cpu->pc());
return m_smr;
}
-void h8_sci_device::brr_w(uint8_t data)
+void h8_sci_device::brr_w(u8 data)
{
m_brr = data;
- if(V>=2) logerror("brr_w %02x (%06x)\n", data, m_cpu->pc());
+ LOGMASKED(LOG_REGS, "brr_w %02x (%06x)\n", m_brr, m_cpu->pc());
clock_update();
}
-uint8_t h8_sci_device::brr_r()
+u8 h8_sci_device::brr_r()
{
- if(V>=2) logerror("brr_r %02x (%06x)\n", m_brr, m_cpu->pc());
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "brr_r %02x (%06x)\n", m_brr, m_cpu->pc());
return m_brr;
}
-bool h8_sci_device::is_sync_start() const
+void h8_sci_device::sync_rx_start()
{
- return (m_smr & SMR_CA) && ((m_scr & (SCR_TE|SCR_RE)) == (SCR_TE|SCR_RE));
+ if(m_rx_state == ST_IDLE && (m_smr & SMR_CA) && (m_scr & SCR_RE) && !(m_scr & SCR_TE) && !has_recv_error())
+ rx_start();
}
bool h8_sci_device::has_recv_error() const
@@ -78,19 +129,19 @@ bool h8_sci_device::has_recv_error() const
return m_ssr & (SSR_ORER|SSR_PER|SSR_FER);
}
-void h8_sci_device::scr_w(uint8_t data)
+void h8_sci_device::scr_w(u8 data)
{
- if(V>=2) logerror("scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
- data & SCR_TIE ? " txi" : "",
- data & SCR_RIE ? " rxi" : "",
- data & SCR_TE ? " tx" : "",
- data & SCR_RE ? " rx" : "",
- data & SCR_MPIE ? " mpi" : "",
- data & SCR_TEIE ? " tei" : "",
- data & SCR_CKE,
- m_cpu->pc());
+ LOGMASKED(LOG_REGS, "scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
+ data & SCR_TIE ? " txi" : "",
+ data & SCR_RIE ? " rxi" : "",
+ data & SCR_TE ? " tx" : "",
+ data & SCR_RE ? " rx" : "",
+ data & SCR_MPIE ? " mpi" : "",
+ data & SCR_TEIE ? " tei" : "",
+ data & SCR_CKE,
+ m_cpu->pc());
- uint8_t delta = m_scr ^ data;
+ u8 delta = m_scr ^ data;
m_scr = data;
clock_update();
@@ -99,8 +150,8 @@ void h8_sci_device::scr_w(uint8_t data)
clock_stop(CLK_RX);
}
- if((delta & SCR_RE) && (m_scr & SCR_RE) && m_rx_state == ST_IDLE && !has_recv_error() && !is_sync_start())
- rx_start();
+ if((delta & (SCR_RE | SCR_TE)))
+ sync_rx_start();
if((delta & SCR_TIE) && (m_scr & SCR_TIE) && (m_ssr & SSR_TDRE))
m_intc->internal_interrupt(m_txi_int);
if((delta & SCR_TEIE) && (m_scr & SCR_TEIE) && (m_ssr & SSR_TEND))
@@ -111,126 +162,126 @@ void h8_sci_device::scr_w(uint8_t data)
m_intc->internal_interrupt(m_eri_int);
}
-uint8_t h8_sci_device::scr_r()
+u8 h8_sci_device::scr_r()
{
- if(V>=2) logerror("scr_r %02x (%06x)\n", m_scr, m_cpu->pc());
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "scr_r %02x (%06x)\n", m_scr, m_cpu->pc());
return m_scr;
}
-void h8_sci_device::tdr_w(uint8_t data)
+void h8_sci_device::tdr_w(u8 data)
{
- if(V>=2) logerror("tdr_w %02x (%06x)\n", data, m_cpu->pc());
+ LOGMASKED(LOG_REGS, "tdr_w %02x (%06x)\n", data, m_cpu->pc());
m_tdr = data;
- if(m_cpu->access_is_dma()) {
- m_ssr &= ~SSR_TDRE;
+ if((m_cpu->access_is_dma()) && (m_scr & SCR_TE)) {
+ m_ssr &= ~(SSR_TDRE | SSR_TEND);
if(m_tx_state == ST_IDLE)
tx_start();
}
}
-uint8_t h8_sci_device::tdr_r()
+u8 h8_sci_device::tdr_r()
{
- if(V>=2) logerror("tdr_r %02x (%06x)\n", m_tdr, m_cpu->pc());
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "tdr_r %02x (%06x)\n", m_tdr, m_cpu->pc());
return m_tdr;
}
-void h8_sci_device::ssr_w(uint8_t data)
+void h8_sci_device::ssr_w(u8 data)
{
- if(!(m_scr & SCR_TE)) {
- data |= SSR_TDRE;
- m_ssr |= SSR_TDRE;
- }
- if((m_ssr & SSR_TDRE) && !(data & SSR_TDRE))
- m_ssr &= ~SSR_TEND;
- m_ssr = ((m_ssr & ~SSR_MPBT) | (data & SSR_MPBT)) & (data | (SSR_TEND|SSR_MPB|SSR_MPBT));
- if(V>=2) logerror("ssr_w %02x -> %02x (%06x)\n", data, m_ssr, m_cpu->pc());
+ if((m_scr & SCR_TE) && (m_ssr & m_ssr_read & SSR_TDRE) && !(data & SSR_TDRE))
+ m_ssr &= ~(SSR_TDRE | SSR_TEND);
+ m_ssr = (m_ssr & (~m_ssr_read | data | SSR_TDRE | SSR_TEND | SSR_MPB) & ~SSR_MPBT) | (data & SSR_MPBT);
+ LOGMASKED(LOG_REGS, "ssr_w %02x -> %02x (%06x)\n", data, m_ssr, m_cpu->pc());
if(m_tx_state == ST_IDLE && !(m_ssr & SSR_TDRE))
tx_start();
- if((m_scr & SCR_RE) && m_rx_state == ST_IDLE && !has_recv_error() && !is_sync_start())
- rx_start();
+ sync_rx_start();
}
-uint8_t h8_sci_device::ssr_r()
+u8 h8_sci_device::ssr_r()
{
- if(V>=3) logerror("ssr_r %02x (%06x)\n", m_ssr, m_cpu->pc());
+ if(!machine().side_effects_disabled()) {
+ LOGMASKED(LOG_RREGS, "ssr_r %02x (%06x)\n", m_ssr, m_cpu->pc());
+ m_ssr_read = m_ssr;
+ }
return m_ssr;
}
-uint8_t h8_sci_device::rdr_r()
+u8 h8_sci_device::rdr_r()
{
- if(V>=2) logerror("rdr_r %02x (%06x)\n", m_rdr, m_cpu->pc());
- if(m_cpu->access_is_dma())
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "rdr_r %02x (%06x)\n", m_rdr, m_cpu->pc());
+
+ if(!machine().side_effects_disabled() && m_cpu->access_is_dma())
m_ssr &= ~SSR_RDRF;
return m_rdr;
}
-void h8_sci_device::scmr_w(uint8_t data)
+void h8_sci_device::scmr_w(u8 data)
{
- if(V>=2) logerror("scmr_w %02x (%06x)\n", data, m_cpu->pc());
+ LOGMASKED(LOG_REGS, "scmr_w %02x (%06x)\n", data, m_cpu->pc());
}
-uint8_t h8_sci_device::scmr_r()
+u8 h8_sci_device::scmr_r()
{
- if(V>=2) logerror("scmr_r (%06x)\n", m_cpu->pc());
+ if(!machine().side_effects_disabled())
+ LOGMASKED(LOG_RREGS, "scmr_r (%06x)\n", m_cpu->pc());
return 0x00;
}
void h8_sci_device::clock_update()
{
- // Sync: Divider must be the time of a half-period (both edges are used, datarate*2)
- // Async: Divider must be the time of one period (only raising edge used, datarate*16)
-
m_divider = 2 << (2*(m_smr & SMR_CKS));
m_divider *= m_brr+1;
if(m_smr & SMR_CA) {
if(m_scr & SCR_CKE1)
- m_clock_mode = clock_mode_t::EXTERNAL_SYNC;
+ m_clock_mode = EXTERNAL_SYNC;
else
- m_clock_mode = clock_mode_t::INTERNAL_SYNC_OUT;
+ m_clock_mode = INTERNAL_SYNC_OUT;
} else {
if(m_scr & SCR_CKE1)
- m_clock_mode = clock_mode_t::EXTERNAL_ASYNC;
+ m_clock_mode = EXTERNAL_ASYNC;
else if(m_scr & SCR_CKE0)
- m_clock_mode = clock_mode_t::INTERNAL_ASYNC_OUT;
+ m_clock_mode = INTERNAL_ASYNC_OUT;
else
- m_clock_mode = clock_mode_t::INTERNAL_ASYNC;
+ m_clock_mode = INTERNAL_ASYNC;
}
- if(m_clock_mode == clock_mode_t::EXTERNAL_ASYNC && !m_external_clock_period.is_never())
- m_clock_mode = clock_mode_t::EXTERNAL_RATE_ASYNC;
- if(m_clock_mode == clock_mode_t::EXTERNAL_SYNC && !m_external_clock_period.is_never())
- m_clock_mode = clock_mode_t::EXTERNAL_RATE_SYNC;
+ if(m_clock_mode == EXTERNAL_ASYNC && !m_external_clock_period.is_never())
+ m_clock_mode = EXTERNAL_RATE_ASYNC;
+ if(m_clock_mode == EXTERNAL_SYNC && !m_external_clock_period.is_never())
+ m_clock_mode = EXTERNAL_RATE_SYNC;
- if(V>=1) {
+ if(VERBOSE & LOG_RATE) {
std::string new_message;
switch(m_clock_mode) {
- case clock_mode_t::INTERNAL_ASYNC:
- new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps\n", int(m_cpu->clock() / m_divider), int(m_cpu->clock() / (m_divider*16)));
+ case INTERNAL_ASYNC:
+ new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps\n", int(m_cpu->system_clock() / m_divider), int(m_cpu->system_clock() / (m_divider*16)));
break;
- case clock_mode_t::INTERNAL_ASYNC_OUT:
- new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps, output\n", int(m_cpu->clock() / m_divider), int(m_cpu->clock() / (m_divider*16)));
+ case INTERNAL_ASYNC_OUT:
+ new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps, output\n", int(m_cpu->system_clock() / m_divider), int(m_cpu->system_clock() / (m_divider*16)));
break;
- case clock_mode_t::EXTERNAL_ASYNC:
+ case EXTERNAL_ASYNC:
new_message = "clock external, async\n";
break;
- case clock_mode_t::EXTERNAL_RATE_ASYNC:
- new_message = util::string_format("clock external at %d Hz, async, bitrate %d bps\n", int(m_cpu->clock()*m_internal_to_external_ratio), int(m_cpu->clock()*m_internal_to_external_ratio/16));
+ case EXTERNAL_RATE_ASYNC:
+ new_message = util::string_format("clock external at %d Hz, async, bitrate %d bps\n", int(m_cpu->system_clock()*m_internal_to_external_ratio), int(m_cpu->system_clock()*m_internal_to_external_ratio/16));
break;
- case clock_mode_t::INTERNAL_SYNC_OUT:
- new_message = util::string_format("clock internal at %d Hz, sync, output\n", int(m_cpu->clock() / (m_divider*2)));
+ case INTERNAL_SYNC_OUT:
+ new_message = util::string_format("clock internal at %d Hz, sync, output\n", int(m_cpu->system_clock() / (m_divider*2)));
break;
- case clock_mode_t::EXTERNAL_SYNC:
+ case EXTERNAL_SYNC:
new_message = "clock external, sync\n";
break;
- case clock_mode_t::EXTERNAL_RATE_SYNC:
- new_message = util::string_format("clock external at %d Hz, sync\n", int(m_cpu->clock()*m_internal_to_external_ratio));
+ case EXTERNAL_RATE_SYNC:
+ new_message = util::string_format("clock external at %d Hz, sync\n", int(m_cpu->system_clock()*m_internal_to_external_ratio));
break;
}
if(new_message != m_last_clock_message) {
- logerror(new_message);
+ (LOG_OUTPUT_FUNC)(new_message);
m_last_clock_message = std::move(new_message);
}
}
@@ -244,31 +295,35 @@ void h8_sci_device::device_start()
m_internal_to_external_ratio = 0;
m_external_to_internal_ratio = 0;
} else {
- m_external_to_internal_ratio = (m_external_clock_period*m_cpu->clock()).as_double();
+ m_external_to_internal_ratio = (m_external_clock_period*m_cpu->system_clock()).as_double();
m_internal_to_external_ratio = 1/m_external_to_internal_ratio;
}
+ save_item(NAME(m_tx_state));
+ save_item(NAME(m_rx_state));
+ save_item(NAME(m_tx_bit));
+ save_item(NAME(m_rx_bit));
+ save_item(NAME(m_clock_state));
+ save_item(NAME(m_tx_parity));
+ save_item(NAME(m_rx_parity));
+ save_item(NAME(m_tx_clock_counter));
+ save_item(NAME(m_rx_clock_counter));
+ save_item(NAME(m_clock_mode));
+ save_item(NAME(m_ext_clock_value));
+ save_item(NAME(m_rx_value));
save_item(NAME(m_rdr));
save_item(NAME(m_tdr));
save_item(NAME(m_smr));
save_item(NAME(m_scr));
save_item(NAME(m_ssr));
+ save_item(NAME(m_ssr_read));
save_item(NAME(m_brr));
save_item(NAME(m_rsr));
save_item(NAME(m_tsr));
- save_item(NAME(m_rx_bit));
- save_item(NAME(m_tx_bit));
- save_item(NAME(m_rx_state));
- save_item(NAME(m_tx_state));
- save_item(NAME(m_tx_parity));
- save_item(NAME(m_clock_state));
- save_item(NAME(m_clock_value));
- save_item(NAME(m_clock_base));
+ save_item(NAME(m_clock_event));
+ save_item(NAME(m_clock_step));
save_item(NAME(m_divider));
- save_item(NAME(m_ext_clock_value));
- save_item(NAME(m_ext_clock_counter));
- save_item(NAME(m_cur_sync_time));
}
void h8_sci_device::device_reset()
@@ -286,22 +341,14 @@ void h8_sci_device::device_reset()
m_tx_state = ST_IDLE;
m_rx_state = ST_IDLE;
m_clock_state = 0;
- m_clock_mode = clock_mode_t::INTERNAL_ASYNC;
- m_clock_base = 0;
+ m_clock_mode = INTERNAL_ASYNC;
+ m_clock_event = 0;
clock_update();
- m_clock_value = true;
m_ext_clock_value = true;
- m_ext_clock_counter = 0;
- m_rx_value = true;
- m_cpu->do_sci_clk(m_id, m_clock_value);
+ m_tx_clock_counter = 0;
+ m_rx_clock_counter = 0;
+ m_cpu->do_sci_clk(m_id, 1);
m_cpu->do_sci_tx(m_id, 1);
- m_cur_sync_time = attotime::never;
-}
-
-void h8_sci_device::device_post_load()
-{
- // Set clock_mode correctly as it's not saved
- clock_update();
}
TIMER_CALLBACK_MEMBER(h8_sci_device::sync_tick)
@@ -311,169 +358,87 @@ TIMER_CALLBACK_MEMBER(h8_sci_device::sync_tick)
void h8_sci_device::do_rx_w(int state)
{
+ if(m_cpu->standby()) {
+ m_rx_value = state;
+ return;
+ }
+
+ if(state != m_rx_value && (m_clock_state & CLK_RX))
+ if(m_rx_clock_counter == 1 || m_rx_clock_counter == 15)
+ m_rx_clock_counter = 0;
+
+ if(m_rx_state == ST_IDLE && !(m_smr & SMR_CA) && (m_scr & SCR_RE) && m_rx_value && !state)
+ rx_start();
+
m_rx_value = state;
- if(V>=2) logerror("rx=%d\n", state);
- if(!m_rx_value && !(m_clock_state & CLK_RX) && m_rx_state != ST_IDLE)
- clock_start(CLK_RX);
}
void h8_sci_device::do_clk_w(int state)
{
- if(m_ext_clock_value != state) {
- m_ext_clock_value = state;
- if(m_clock_state) {
- switch(m_clock_mode) {
- case clock_mode_t::EXTERNAL_ASYNC:
- if(m_ext_clock_value) {
- m_ext_clock_counter = (m_ext_clock_counter+1) & 15;
-
- if((m_clock_state & CLK_TX) && m_ext_clock_counter == 0)
- tx_dropped_edge();
- if((m_clock_state & CLK_RX) && m_ext_clock_counter == 8)
- rx_raised_edge();
- }
- break;
-
- case clock_mode_t::EXTERNAL_SYNC:
- if((!m_ext_clock_value) && (m_clock_state & CLK_TX))
- tx_dropped_edge();
-
- else if(m_ext_clock_value && (m_clock_state & CLK_RX))
- rx_raised_edge();
- break;
- default:
- // Do nothing
- break;
- }
- }
+ if(m_ext_clock_value == state)
+ return;
+
+ m_ext_clock_value = state;
+ if(!m_clock_state || m_cpu->standby())
+ return;
+
+ if(m_clock_mode == EXTERNAL_ASYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_async_tick();
+ if(m_clock_state & CLK_RX)
+ rx_async_tick();
+ } else if(m_clock_mode == EXTERNAL_SYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_sync_tick();
+ if(m_clock_state & CLK_RX)
+ rx_sync_tick();
}
}
-uint64_t h8_sci_device::internal_update(uint64_t current_time)
+u64 h8_sci_device::internal_update(u64 current_time)
{
- uint64_t event = 0;
- switch(m_clock_mode) {
- case clock_mode_t::INTERNAL_SYNC_OUT:
- if(m_clock_state || !m_clock_value) {
- uint64_t fp = m_divider*2;
- if(current_time >= m_clock_base) {
- uint64_t delta = current_time - m_clock_base;
- if(delta >= fp) {
- delta -= fp;
- m_clock_base += fp;
- }
- assert(delta < fp);
-
- bool new_clock = delta >= m_divider;
- if(new_clock != m_clock_value) {
- machine().scheduler().synchronize();
- if((!new_clock) && (m_clock_state & CLK_TX))
- tx_dropped_edge();
-
- else if(new_clock && (m_clock_state & CLK_RX))
- rx_raised_edge();
-
- m_clock_value = new_clock;
- if(m_clock_state || m_clock_value)
- m_cpu->do_sci_clk(m_id, m_clock_value);
- }
- }
- event = m_clock_base + (m_clock_value ? fp : m_divider);
- }
- break;
-
- case clock_mode_t::INTERNAL_ASYNC:
- case clock_mode_t::INTERNAL_ASYNC_OUT:
- if(m_clock_state || !m_clock_value) {
- uint64_t fp = m_divider*16;
- if(current_time >= m_clock_base) {
- uint64_t delta = current_time - m_clock_base;
- if(delta >= fp) {
- delta -= fp;
- m_clock_base += fp;
- }
- assert(delta < fp);
- bool new_clock = delta >= m_divider*8;
- if(new_clock != m_clock_value) {
- machine().scheduler().synchronize();
- if((!new_clock) && (m_clock_state & CLK_TX))
- tx_dropped_edge();
-
- else if(new_clock && (m_clock_state & CLK_RX))
- rx_raised_edge();
-
- m_clock_value = new_clock;
- if(m_clock_mode == clock_mode_t::INTERNAL_ASYNC_OUT && (m_clock_state || !m_clock_value))
- m_cpu->do_sci_clk(m_id, m_clock_value);
- }
- }
-
- event = m_clock_base + (m_clock_value ? fp : m_divider*8);
- }
- break;
-
- case clock_mode_t::EXTERNAL_RATE_SYNC:
- if(m_clock_state || !m_clock_value) {
- uint64_t ctime = uint64_t(current_time*m_internal_to_external_ratio*2);
- if(ctime >= m_clock_base) {
- uint64_t delta = ctime - m_clock_base;
- m_clock_base += delta & ~1;
- delta &= 1;
- bool new_clock = delta >= 1;
- if(new_clock != m_clock_value) {
- machine().scheduler().synchronize();
- if((!new_clock) && (m_clock_state & CLK_TX))
- tx_dropped_edge();
-
- else if(new_clock && (m_clock_state & CLK_RX))
- rx_raised_edge();
-
- m_clock_value = new_clock;
- }
- }
+ if(!m_clock_event || current_time < m_clock_event)
+ return m_clock_event;
- event = uint64_t((m_clock_base + (m_clock_value ? 2 : 1))*m_external_to_internal_ratio)+1;
- }
- break;
+ if(m_clock_mode == INTERNAL_ASYNC || m_clock_mode == INTERNAL_ASYNC_OUT || m_clock_mode == EXTERNAL_RATE_ASYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_async_tick();
+ if(m_clock_state & CLK_RX)
+ rx_async_tick();
+ } else if(m_clock_mode == INTERNAL_SYNC_OUT || m_clock_mode == EXTERNAL_RATE_SYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_sync_tick();
+ if(m_clock_state & CLK_RX)
+ rx_sync_tick();
+ }
- case clock_mode_t::EXTERNAL_RATE_ASYNC:
- if(m_clock_state || !m_clock_value) {
- uint64_t ctime = uint64_t(current_time*m_internal_to_external_ratio);
- if(ctime >= m_clock_base) {
- uint64_t delta = ctime - m_clock_base;
- m_clock_base += delta & ~15;
- delta &= 15;
- bool new_clock = delta >= 8;
- if(new_clock != m_clock_value) {
- machine().scheduler().synchronize();
- if((!new_clock) && (m_clock_state & CLK_TX))
- tx_dropped_edge();
-
- else if(new_clock && (m_clock_state & CLK_RX))
- rx_raised_edge();
-
- m_clock_value = new_clock;
- }
- }
+ if(m_clock_state) {
+ if(m_clock_step)
+ m_clock_event += m_clock_step;
+ else if(m_clock_mode == EXTERNAL_RATE_ASYNC || m_clock_mode == EXTERNAL_RATE_SYNC)
+ m_clock_event = u64(u64(m_clock_event * m_internal_to_external_ratio + 1) * m_external_to_internal_ratio + 1);
+ else
+ m_clock_event = 0;
- event = uint64_t((m_clock_base + (m_clock_value ? 16 : 8))*m_external_to_internal_ratio)+1;
+ if(m_clock_event) {
+ if(s64 ticks = m_clock_event - m_cpu->now_as_cycles(); ticks >= 0LL)
+ m_sync_timer->adjust(attotime::from_ticks(ticks, m_cpu->system_clock()));
+ m_cpu->internal_update();
}
- break;
- case clock_mode_t::EXTERNAL_ASYNC:
- case clock_mode_t::EXTERNAL_SYNC:
- break;
- }
- if(event) {
- attotime ctime = machine().time();
- attotime sync_time = attotime::from_ticks(event-10, m_cpu->clock());
- if(m_cur_sync_time != sync_time && sync_time > ctime) {
- m_sync_timer->adjust(sync_time - ctime);
- m_cur_sync_time = sync_time;
- }
+ } else if(!m_clock_state) {
+ m_clock_event = 0;
+ if(m_clock_mode == INTERNAL_ASYNC_OUT || m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
}
- return event;
+ return m_clock_event;
+}
+
+void h8_sci_device::notify_standby(int state)
+{
+ if(!state && m_clock_event)
+ m_clock_event += m_cpu->total_cycles() - m_cpu->standby_time();
}
void h8_sci_device::clock_start(int mode)
@@ -482,46 +447,55 @@ void h8_sci_device::clock_start(int mode)
if(m_clock_state & mode)
return;
- if(!m_clock_state) {
- machine().scheduler().synchronize();
- m_clock_state = mode;
- switch(m_clock_mode) {
- case clock_mode_t::INTERNAL_ASYNC:
- case clock_mode_t::INTERNAL_ASYNC_OUT:
- case clock_mode_t::INTERNAL_SYNC_OUT:
- if(V>=2) logerror("Starting internal clock\n");
- m_clock_base = m_cpu->total_cycles();
- m_cpu->internal_update();
- break;
+ if(mode == CLK_TX)
+ m_tx_clock_counter = 15;
+ else
+ m_rx_clock_counter = 15;
- case clock_mode_t::EXTERNAL_RATE_ASYNC:
- if(V>=2) logerror("Simulating external clock async\n");
- m_clock_base = uint64_t(m_cpu->total_cycles()*m_internal_to_external_ratio);
- m_cpu->internal_update();
- break;
+ m_clock_state |= mode;
+ if(m_clock_state != mode)
+ return;
- case clock_mode_t::EXTERNAL_RATE_SYNC:
- if(V>=2) logerror("Simulating external clock sync\n");
- m_clock_base = uint64_t(m_cpu->total_cycles()*2*m_internal_to_external_ratio);
- m_cpu->internal_update();
- break;
+ m_clock_step = 0;
- case clock_mode_t::EXTERNAL_ASYNC:
- if(V>=2) logerror("Waiting for external clock async\n");
- m_ext_clock_counter = 15;
- break;
+ switch(m_clock_mode) {
+ case INTERNAL_ASYNC:
+ case INTERNAL_ASYNC_OUT:
+ case INTERNAL_SYNC_OUT: {
+ LOGMASKED(LOG_CLOCK, "Starting internal clock\n");
+ m_clock_step = m_divider;
+ u64 now = mode == CLK_TX ? m_cpu->total_cycles() : m_cpu->now_as_cycles();
+ m_clock_event = (now / m_clock_step + 1) * m_clock_step;
+ m_sync_timer->adjust(attotime::from_ticks(m_clock_event - now, m_cpu->system_clock()));
+ m_cpu->internal_update();
+ break;
+ }
- case clock_mode_t::EXTERNAL_SYNC:
- if(V>=2) logerror("Waiting for external clock sync\n");
- break;
- }
- } else
- m_clock_state |= mode;
+ case EXTERNAL_RATE_ASYNC:
+ case EXTERNAL_RATE_SYNC: {
+ LOGMASKED(LOG_CLOCK, "Simulating external clock\n", m_clock_mode == EXTERNAL_RATE_ASYNC ? "async" : "sync");
+ u64 now = mode == CLK_TX ? m_cpu->total_cycles() : m_cpu->now_as_cycles();
+ m_clock_event = u64(u64(now * m_internal_to_external_ratio + 1) * m_external_to_internal_ratio + 1);
+ m_sync_timer->adjust(attotime::from_ticks(m_clock_event - now, m_cpu->system_clock()));
+ m_cpu->internal_update();
+ break;
+ }
+
+ case EXTERNAL_ASYNC:
+ case EXTERNAL_SYNC:
+ LOGMASKED(LOG_CLOCK, "Waiting for external clock\n");
+ break;
+ }
}
void h8_sci_device::clock_stop(int mode)
{
m_clock_state &= ~mode;
+ if(!m_clock_state) {
+ m_clock_event = 0;
+ m_clock_step = 0;
+ LOGMASKED(LOG_CLOCK, "Stopping clocks\n");
+ }
m_cpu->internal_update();
}
@@ -530,7 +504,7 @@ void h8_sci_device::tx_start()
m_ssr |= SSR_TDRE;
m_tsr = m_tdr;
m_tx_parity = m_smr & SMR_OE ? 0 : 1;
- if(V>=1) logerror("start transmit %02x '%c'\n", m_tsr, m_tsr >= 32 && m_tsr < 127 ? m_tsr : '.');
+ LOGMASKED(LOG_DATA, "start transmit %02x '%c'\n", m_tsr, m_tsr >= 32 && m_tsr < 127 ? m_tsr : '.');
if(m_scr & SCR_TIE)
m_intc->internal_interrupt(m_txi_int);
if(m_smr & SMR_CA) {
@@ -541,13 +515,27 @@ void h8_sci_device::tx_start()
m_tx_bit = 1;
}
clock_start(CLK_TX);
- if(m_rx_state == ST_IDLE && !has_recv_error() && is_sync_start())
+ if(m_rx_state == ST_IDLE && (m_smr & SMR_CA) && (m_scr & SCR_TE) && (m_scr & SCR_RE) && !has_recv_error())
rx_start();
}
-void h8_sci_device::tx_dropped_edge()
+void h8_sci_device::tx_async_tick()
+{
+ m_tx_clock_counter = (m_tx_clock_counter + 1) & 15;
+ LOGMASKED(LOG_TICK, "tx_async_tick %x\n", m_tx_clock_counter);
+ if(m_tx_clock_counter == 0) {
+ tx_async_step();
+
+ if(m_clock_mode == INTERNAL_ASYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ } else if(m_tx_clock_counter == 8 && m_clock_mode == INTERNAL_ASYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+}
+
+void h8_sci_device::tx_async_step()
{
- if(V>=2) logerror("tx_dropped_edge state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
+ LOGMASKED(LOG_STATE, "tx_async_step state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
switch(m_tx_state) {
case ST_START:
m_cpu->do_sci_tx(m_id, false);
@@ -591,7 +579,7 @@ void h8_sci_device::tx_dropped_edge()
m_tx_bit--;
if(!m_tx_bit) {
if(!(m_ssr & SSR_TDRE))
- tx_start();
+ tx_start();
else {
m_tx_state = ST_LAST_TICK;
m_tx_bit = 0;
@@ -604,36 +592,71 @@ void h8_sci_device::tx_dropped_edge()
m_tx_bit = 0;
clock_stop(CLK_TX);
m_cpu->do_sci_tx(m_id, 1);
- m_ssr |= SSR_TEND;
if(m_scr & SCR_TEIE)
m_intc->internal_interrupt(m_tei_int);
// if there's more to send, start the transmitter
if((m_scr & SCR_TE) && !(m_ssr & SSR_TDRE))
tx_start();
+ else
+ m_ssr |= SSR_TEND;
break;
default:
abort();
}
- if(V>=2) logerror(" -> state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
+ LOGMASKED(LOG_STATE, " -> state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
+}
+
+void h8_sci_device::tx_sync_tick()
+{
+ m_tx_clock_counter = (m_tx_clock_counter + 1) & 1;
+ LOGMASKED(LOG_TICK, "tx_sync_tick %x\n", m_tx_clock_counter);
+ if(m_tx_clock_counter == 0) {
+ tx_sync_step();
+
+ if(m_clock_mode == INTERNAL_SYNC_OUT && m_tx_state != ST_IDLE)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ } else if(m_tx_clock_counter == 1 && m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+}
+
+void h8_sci_device::tx_sync_step()
+{
+ LOGMASKED(LOG_STATE, "tx_sync_step bit=%d\n", m_tx_bit);
+ if(!m_tx_bit) {
+ m_tx_state = ST_IDLE;
+ clock_stop(CLK_TX);
+ m_cpu->do_sci_tx(m_id, 1);
+ if(m_scr & SCR_TEIE)
+ m_intc->internal_interrupt(m_tei_int);
+
+ // if there's more to send, start the transmitter
+ if((m_scr & SCR_TE) && !(m_ssr & SSR_TDRE))
+ tx_start();
+ else
+ m_ssr |= SSR_TEND;
+ } else {
+ m_cpu->do_sci_tx(m_id, m_tsr & 1);
+ m_tsr >>= 1;
+ m_tx_bit--;
+ }
}
void h8_sci_device::rx_start()
{
m_rx_parity = m_smr & SMR_OE ? 0 : 1;
m_rsr = 0x00;
- if(V>=2) logerror("start receive\n");
+ LOGMASKED(LOG_STATE, "start receive\n");
if(m_smr & SMR_CA) {
m_rx_state = ST_BIT;
m_rx_bit = 8;
- clock_start(CLK_RX);
} else {
m_rx_state = ST_START;
m_rx_bit = 1;
- if(!m_rx_value)
- clock_start(CLK_RX);
}
+ clock_start(CLK_RX);
}
void h8_sci_device::rx_done()
@@ -641,13 +664,13 @@ void h8_sci_device::rx_done()
if(!(m_ssr & SSR_FER)) {
if((m_smr & SMR_PE) && m_rx_parity) {
m_ssr |= SSR_PER;
- if(V>=1) logerror("Receive parity error\n");
+ LOGMASKED(LOG_DATA, "Receive parity error\n");
} else if(m_ssr & SSR_RDRF) {
m_ssr |= SSR_ORER;
- if(V>=1) logerror("Receive overrun\n");
+ LOGMASKED(LOG_DATA, "Receive overrun\n");
} else {
m_ssr |= SSR_RDRF;
- if(V>=1) logerror("Received %02x '%c'\n", m_rsr, m_rsr >= 32 && m_rsr < 127 ? m_rsr : '.');
+ LOGMASKED(LOG_DATA, "Received %02x '%c'\n", m_rsr, m_rsr >= 32 && m_rsr < 127 ? m_rsr : '.');
m_rdr = m_rsr;
}
}
@@ -657,20 +680,28 @@ void h8_sci_device::rx_done()
else
m_intc->internal_interrupt(m_rxi_int);
}
- if((m_scr & SCR_RE) && !has_recv_error() && !is_sync_start())
- rx_start();
- else {
- clock_stop(CLK_RX);
- m_rx_state = ST_IDLE;
- }
+
+ m_rx_state = ST_IDLE;
+ clock_stop(CLK_RX);
+
+ sync_rx_start();
+}
+
+void h8_sci_device::rx_async_tick()
+{
+ m_rx_clock_counter = (m_rx_clock_counter + 1) & 15;
+ LOGMASKED(LOG_TICK, "rx_async_tick %x\n", m_rx_clock_counter);
+ if(m_rx_clock_counter == 8)
+ rx_async_step();
}
-void h8_sci_device::rx_raised_edge()
+void h8_sci_device::rx_async_step()
{
- if(V>=2) logerror("rx_raised_edge state=%s bit=%d\n", state_names[m_rx_state], m_rx_bit);
+ LOGMASKED(LOG_STATE, "rx_async_step state=%s bit=%d\n", state_names[m_rx_state], m_rx_bit);
switch(m_rx_state) {
case ST_START:
if(m_rx_value) {
+ m_rx_state = ST_IDLE;
clock_stop(CLK_RX);
break;
}
@@ -679,7 +710,6 @@ void h8_sci_device::rx_raised_edge()
break;
case ST_BIT:
- m_rx_parity ^= m_rx_value;
m_rsr >>= 1;
if(m_rx_value) {
m_rx_parity = !m_rx_parity;
@@ -687,9 +717,7 @@ void h8_sci_device::rx_raised_edge()
}
m_rx_bit--;
if(!m_rx_bit) {
- if(m_smr & SMR_CA)
- rx_done();
- else if(m_smr & SMR_PE) {
+ if(m_smr & SMR_PE) {
m_rx_state = ST_PARITY;
m_rx_bit = 1;
} else {
@@ -718,5 +746,33 @@ void h8_sci_device::rx_raised_edge()
default:
abort();
}
- if(V>=2) logerror(" -> state=%s, bit=%d\n", state_names[m_rx_state], m_rx_bit);
+ LOGMASKED(LOG_STATE, " -> state=%s, bit=%d\n", state_names[m_rx_state], m_rx_bit);
+}
+
+void h8_sci_device::rx_sync_tick()
+{
+ m_rx_clock_counter = (m_rx_clock_counter + 1) & 1;
+ LOGMASKED(LOG_TICK, "rx_sync_tick %x\n", m_rx_clock_counter);
+
+ if(m_rx_clock_counter == 0 && m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ else if(m_rx_clock_counter == 1) {
+ if(m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+
+ rx_sync_step();
+ }
+}
+
+void h8_sci_device::rx_sync_step()
+{
+ LOGMASKED(LOG_STATE, "rx_sync_step bit=%d\n", m_rx_value);
+ m_rsr >>= 1;
+ if(m_rx_value)
+ m_rsr |= 0x80;
+ m_rx_bit--;
+
+ if(!m_rx_bit)
+ rx_done();
}
diff --git a/src/devices/cpu/h8/h8_sci.h b/src/devices/cpu/h8/h8_sci.h
index e858a45d124..32fbfe0442e 100644
--- a/src/devices/cpu/h8/h8_sci.h
+++ b/src/devices/cpu/h8/h8_sci.h
@@ -14,12 +14,13 @@
#pragma once
+#include "h8_intc.h"
+
class h8_device;
-class h8_intc_device;
class h8_sci_device : public device_t {
public:
- h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, int id, T &&cpu, U &&intc, int eri, int rxi, int txi, int tei)
: h8_sci_device(mconfig, tag, owner, 0)
{
@@ -34,24 +35,25 @@ public:
void do_set_external_clock_period(const attotime &_period);
- void smr_w(uint8_t data);
- uint8_t smr_r();
- void brr_w(uint8_t data);
- uint8_t brr_r();
- void scr_w(uint8_t data);
- uint8_t scr_r();
- void tdr_w(uint8_t data);
- uint8_t tdr_r();
- void ssr_w(uint8_t data);
- uint8_t ssr_r();
- uint8_t rdr_r();
- void scmr_w(uint8_t data);
- uint8_t scmr_r();
+ void smr_w(u8 data);
+ u8 smr_r();
+ void brr_w(u8 data);
+ u8 brr_r();
+ void scr_w(u8 data);
+ u8 scr_r();
+ void tdr_w(u8 data);
+ u8 tdr_r();
+ void ssr_w(u8 data);
+ u8 ssr_r();
+ u8 rdr_r();
+ void scmr_w(u8 data);
+ u8 scmr_r();
void do_rx_w(int state);
void do_clk_w(int state);
- uint64_t internal_update(uint64_t current_time);
+ u64 internal_update(u64 current_time);
+ void notify_standby(int state);
protected:
enum {
@@ -65,7 +67,7 @@ protected:
CLK_RX = 2
};
- enum class clock_mode_t {
+ enum {
INTERNAL_ASYNC,
INTERNAL_ASYNC_OUT,
EXTERNAL_ASYNC,
@@ -106,37 +108,44 @@ protected:
required_device<h8_device> m_cpu;
required_device<h8_intc_device> m_intc;
- attotime m_external_clock_period, m_cur_sync_time;
+ attotime m_external_clock_period;
double m_external_to_internal_ratio, m_internal_to_external_ratio;
emu_timer *m_sync_timer;
int m_id, m_eri_int, m_rxi_int, m_txi_int, m_tei_int;
- int m_tx_state, m_rx_state, m_tx_bit, m_rx_bit, m_clock_state, m_tx_parity, m_rx_parity, m_ext_clock_counter;
- clock_mode_t m_clock_mode;
- bool m_clock_value, m_ext_clock_value, m_rx_value;
+ int m_tx_state, m_rx_state, m_tx_bit, m_rx_bit, m_clock_state, m_tx_parity, m_rx_parity, m_tx_clock_counter, m_rx_clock_counter;
+ u32 m_clock_mode;
+ bool m_ext_clock_value, m_rx_value;
- uint8_t m_rdr, m_tdr, m_smr, m_scr, m_ssr, m_brr, m_rsr, m_tsr;
- uint64_t m_clock_base, m_divider;
+ u8 m_rdr, m_tdr, m_smr, m_scr, m_ssr, m_ssr_read, m_brr, m_rsr, m_tsr;
+ u64 m_clock_event, m_clock_step, m_divider;
std::string m_last_clock_message;
- void device_start() override;
- void device_reset() override;
- void device_post_load() override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
TIMER_CALLBACK_MEMBER(sync_tick);
void clock_start(int mode);
void clock_stop(int mode);
void clock_update();
+
void tx_start();
- void tx_dropped_edge();
+ void tx_async_tick();
+ void tx_async_step();
+ void tx_sync_tick();
+ void tx_sync_step();
+
void rx_start();
void rx_done();
- void rx_raised_edge();
+ void rx_async_tick();
+ void rx_async_step();
+ void rx_sync_tick();
+ void rx_sync_step();
- bool is_sync_start() const;
+ void sync_rx_start();
bool has_recv_error() const;
};
diff --git a/src/devices/cpu/h8/h8_timer16.cpp b/src/devices/cpu/h8/h8_timer16.cpp
index 81bce7a49a6..263168909d6 100644
--- a/src/devices/cpu/h8/h8_timer16.cpp
+++ b/src/devices/cpu/h8/h8_timer16.cpp
@@ -1,5 +1,30 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8_timer16.cpp
+
+ H8 16 bits timer
+
+ TODO:
+ - IRQs are level triggered? eg. when an interrupt enable flag gets set
+ while an overflow or compare match flag is 1, will it trigger an IRQ?
+ Or if it's edge triggered, will it trigger an IRQ on rising edge of
+ (irq_enable & flag)? Note that mu100 will lock up at boot if it's
+ triggered at rising edge of (flag) or (irq_enable & flag).
+ - When writing 0 to the status register(s), the overflow/compare match
+ flags will only be cleared after a read access was done while they
+ were set? It's how the databook explains it, similar to HD6301.
+ - H8/325 16-bit timer is shoehorned in and may have a bug lurking?
+ It doesn't have TGR registers, but functionally equivalent OCR/ICR.
+ - Make the base class more generic, and derive the devices from that,
+ so they don't have to jumble so much with the IRQ/flag bits. The
+ overflow IRQ/flag being hardcoded on bit 4 is also problematic.
+ - Proper support for input capture registers.
+ - Add support for chained timers.
+
+***************************************************************************/
+
#include "emu.h"
#include "h8_timer16.h"
@@ -8,17 +33,18 @@
// 1 = everything
static constexpr int V = 0;
-DEFINE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device, "h8_timer16", "H8 16-bit timer")
-DEFINE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device, "h8_timer16_channel", "H8 16-bit timer channel")
-DEFINE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device, "h8h_timer16_channel", "H8H 16-bit timer channel")
-DEFINE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device, "h8s_timer16_channel", "H8S 16-bit timer channel")
+DEFINE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device, "h8_timer16", "H8 16-bit timer")
+DEFINE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device, "h8_timer16_channel", "H8 16-bit timer channel")
+DEFINE_DEVICE_TYPE(H8325_TIMER16_CHANNEL, h8325_timer16_channel_device, "h8325_timer16_channel", "H8/325 16-bit timer channel")
+DEFINE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device, "h8h_timer16_channel", "H8H 16-bit timer channel")
+DEFINE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device, "h8s_timer16_channel", "H8S 16-bit timer channel")
-h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_timer16_channel_device(mconfig, H8_TIMER16_CHANNEL, tag, owner, clock)
{
}
-h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG),
@@ -28,12 +54,12 @@ h8_timer16_channel_device::h8_timer16_channel_device(const machine_config &mconf
{
}
-uint8_t h8_timer16_channel_device::tcr_r()
+u8 h8_timer16_channel_device::tcr_r()
{
return m_tcr;
}
-void h8_timer16_channel_device::tcr_w(uint8_t data)
+void h8_timer16_channel_device::tcr_w(u8 data)
{
update_counter();
m_tcr = data;
@@ -42,27 +68,27 @@ void h8_timer16_channel_device::tcr_w(uint8_t data)
recalc_event();
}
-uint8_t h8_timer16_channel_device::tmdr_r()
+u8 h8_timer16_channel_device::tmdr_r()
{
return 0x00;
}
-void h8_timer16_channel_device::tmdr_w(uint8_t data)
+void h8_timer16_channel_device::tmdr_w(u8 data)
{
if(V>=1) logerror("tmdr_w %02x\n", data);
}
-uint8_t h8_timer16_channel_device::tior_r()
+u8 h8_timer16_channel_device::tior_r()
{
return 0x00;
}
-void h8_timer16_channel_device::tior_w(offs_t offset, uint8_t data)
+void h8_timer16_channel_device::tior_w(offs_t offset, u8 data)
{
if(V>=1) logerror("tior_w %d, %02x\n", offset, data);
}
-void h8_timer16_channel_device::set_ier(uint8_t value)
+void h8_timer16_channel_device::set_ier(u8 value)
{
update_counter();
m_ier = value;
@@ -76,12 +102,12 @@ void h8_timer16_channel_device::set_enable(bool enable)
recalc_event();
}
-uint8_t h8_timer16_channel_device::tier_r()
+u8 h8_timer16_channel_device::tier_r()
{
return m_tier;
}
-void h8_timer16_channel_device::tier_w(uint8_t data)
+void h8_timer16_channel_device::tier_w(u8 data)
{
update_counter();
if(V>=1) logerror("tier_w %02x\n", data);
@@ -98,24 +124,29 @@ void h8_timer16_channel_device::tier_w(uint8_t data)
recalc_event();
}
-uint8_t h8_timer16_channel_device::tsr_r()
+u8 h8_timer16_channel_device::tsr_r()
{
+ if(!machine().side_effects_disabled())
+ update_counter();
return isr_to_sr();
}
-void h8_timer16_channel_device::tsr_w(uint8_t data)
+void h8_timer16_channel_device::tsr_w(u8 data)
{
+ update_counter();
if(V>=1) logerror("tsr_w %02x\n", data);
isr_update(data);
+ recalc_event();
}
-uint16_t h8_timer16_channel_device::tcnt_r()
+u16 h8_timer16_channel_device::tcnt_r()
{
- update_counter();
+ if(!machine().side_effects_disabled())
+ update_counter();
return m_tcnt;
}
-void h8_timer16_channel_device::tcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+void h8_timer16_channel_device::tcnt_w(offs_t offset, u16 data, u16 mem_mask)
{
update_counter();
COMBINE_DATA(&m_tcnt);
@@ -123,12 +154,12 @@ void h8_timer16_channel_device::tcnt_w(offs_t offset, uint16_t data, uint16_t me
recalc_event();
}
-uint16_t h8_timer16_channel_device::tgr_r(offs_t offset)
+u16 h8_timer16_channel_device::tgr_r(offs_t offset)
{
return m_tgr[offset];
}
-void h8_timer16_channel_device::tgr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+void h8_timer16_channel_device::tgr_w(offs_t offset, u16 data, u16 mem_mask)
{
update_counter();
COMBINE_DATA(m_tgr + offset);
@@ -136,15 +167,15 @@ void h8_timer16_channel_device::tgr_w(offs_t offset, uint16_t data, uint16_t mem
recalc_event();
}
-uint16_t h8_timer16_channel_device::tbr_r(offs_t offset)
+u16 h8_timer16_channel_device::tbr_r(offs_t offset)
{
- return m_tgr[offset+m_tgr_count];
+ return m_tgr[offset + m_tgr_count];
}
-void h8_timer16_channel_device::tbr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+void h8_timer16_channel_device::tbr_w(offs_t offset, u16 data, u16 mem_mask)
{
COMBINE_DATA(m_tgr + offset + m_tgr_count);
- if(V>=1) logerror("tbr%c_w %04x\n", 'a'+offset, m_tgr[offset]);
+ if(V>=1) logerror("tbr%c_w %04x\n", 'a'+offset, m_tgr[offset + m_tgr_count]);
}
void h8_timer16_channel_device::device_start()
@@ -171,7 +202,7 @@ void h8_timer16_channel_device::device_start()
void h8_timer16_channel_device::device_reset()
{
- // Don't touch channel_active here, top level device handles it
+ // Don't touch channel_active here, top level device handles it.
m_tcr = 0;
m_tcnt = 0;
memset(m_tgr, 0xff, sizeof(m_tgr));
@@ -188,17 +219,26 @@ void h8_timer16_channel_device::device_reset()
m_counter_incrementing = true;
}
-uint64_t h8_timer16_channel_device::internal_update(uint64_t current_time)
+u64 h8_timer16_channel_device::internal_update(u64 current_time)
{
- if(m_event_time && current_time >= m_event_time) {
- update_counter(current_time);
- recalc_event(current_time);
+ while(m_event_time && current_time >= m_event_time) {
+ update_counter(m_event_time);
+ recalc_event(m_event_time);
}
return m_event_time;
}
-void h8_timer16_channel_device::update_counter(uint64_t cur_time)
+void h8_timer16_channel_device::notify_standby(int state)
+{
+ if(!state && m_event_time) {
+ u64 delta = m_cpu->total_cycles() - m_cpu->standby_time();
+ m_event_time += delta;
+ m_last_clock_update += delta;
+ }
+}
+
+void h8_timer16_channel_device::update_counter(u64 cur_time)
{
if(m_clock_type != DIV_1)
return;
@@ -211,31 +251,61 @@ void h8_timer16_channel_device::update_counter(uint64_t cur_time)
return;
}
- uint64_t base_time = m_last_clock_update;
- uint64_t new_time = cur_time;
+ u64 base_time = m_last_clock_update;
+ m_last_clock_update = cur_time;
+ u64 new_time = cur_time;
if(m_clock_divider) {
base_time = (base_time + m_phase) >> m_clock_divider;
new_time = (new_time + m_phase) >> m_clock_divider;
}
+ if(new_time == base_time)
+ return;
+
if(m_counter_incrementing) {
- int tt = m_tcnt + new_time - base_time;
- m_tcnt = tt % m_counter_cycle;
+ u16 prev = m_tcnt;
+ u64 delta = new_time - base_time;
+ u64 tt = m_tcnt + delta;
+
+ if(prev >= m_counter_cycle) {
+ if(tt >= 0x10000)
+ m_tcnt = (tt - 0x10000) % m_counter_cycle;
+ else
+ m_tcnt = tt;
+ } else
+ m_tcnt = tt % m_counter_cycle;
+
+ for(int i = 0; i < m_tgr_count; i++) {
+ u16 cmp = m_tgr[i] + 1;
+ bool match = m_tcnt == cmp || (tt == cmp && tt == m_counter_cycle);
+ if(!match) {
+ // Need to do additional checks here for software that polls the flags with interrupts disabled, since recalc_event only schedules IRQ events.
+ if(prev >= m_counter_cycle)
+ match = (cmp > prev && tt >= cmp) || (cmp <= m_counter_cycle && m_tcnt < m_counter_cycle && (delta - (0x10000 - prev)) >= cmp);
+ else if(cmp <= m_counter_cycle)
+ match = delta >= m_counter_cycle || (prev < cmp && tt >= cmp) || (m_tcnt <= prev && m_tcnt >= cmp);
+
+ if(match && BIT(m_ier, i) && m_interrupt[i] != -1)
+ logerror("update_counter unexpected TGR %d IRQ\n, i");
+ }
- for(int i=0; i<m_tgr_count; i++)
- if((m_ier & (1 << i)) && (tt == m_tgr[i] || m_tcnt == m_tgr[i]) && m_interrupt[i] != -1) {
+ if(match) {
m_isr |= 1 << i;
- m_intc->internal_interrupt(m_interrupt[i]);
+ if(BIT(m_ier, i) && m_interrupt[i] != -1)
+ m_intc->internal_interrupt(m_interrupt[i]);
}
- if(tt >= 0x10000 && (m_ier & IRQ_V) && m_interrupt[4] != -1) {
+ }
+ if(tt >= 0x10000 && (m_counter_cycle == 0x10000 || prev >= m_counter_cycle)) {
m_isr |= IRQ_V;
- m_intc->internal_interrupt(m_interrupt[4]);
+ if(m_ier & IRQ_V && m_interrupt[4] != -1)
+ m_intc->internal_interrupt(m_interrupt[4]);
}
- } else
- m_tcnt = (((m_tcnt ^ 0xffff) + new_time - base_time) % m_counter_cycle) ^ 0xffff;
- m_last_clock_update = cur_time;
+ } else {
+ logerror("decrementing counter\n");
+ exit(1);
+ }
}
-void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
+void h8_timer16_channel_device::recalc_event(u64 cur_time)
{
if(!m_channel_active) {
m_event_time = 0;
@@ -243,7 +313,7 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
}
bool update_cpu = cur_time == 0;
- uint64_t old_event_time = m_event_time;
+ u64 old_event_time = m_event_time;
if(m_clock_type != DIV_1) {
m_event_time = 0;
@@ -257,28 +327,26 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
cur_time = m_cpu->total_cycles();
if(m_counter_incrementing) {
- uint32_t event_delay = 0xffffffff;
- if(m_tgr_clearing >= 0 && m_tgr[m_tgr_clearing])
- m_counter_cycle = m_tgr[m_tgr_clearing];
- else {
+ u32 event_delay = 0xffffffff;
+ if(m_tgr_clearing >= 0)
+ m_counter_cycle = m_tgr[m_tgr_clearing] + 1;
+ else
m_counter_cycle = 0x10000;
- if(m_ier & IRQ_V) {
- event_delay = m_counter_cycle - m_tcnt;
- if(!event_delay)
- event_delay = m_counter_cycle;
- }
- }
- for(int i=0; i<m_tgr_count; i++)
- if(m_ier & (1 << i)) {
- uint32_t new_delay = 0xffffffff;
- if(m_tgr[i] > m_tcnt) {
- if(m_tcnt >= m_counter_cycle || m_tgr[i] <= m_counter_cycle)
- new_delay = m_tgr[i] - m_tcnt;
- } else if(m_tgr[i] <= m_counter_cycle) {
+ if((m_ier & IRQ_V && m_interrupt[4] != -1) && (m_counter_cycle == 0x10000 || m_tcnt >= m_counter_cycle))
+ event_delay = 0x10000 - m_tcnt;
+
+ for(int i = 0; i < m_tgr_count; i++)
+ if(BIT(m_ier, i) && m_interrupt[i] != -1) {
+ u32 new_delay = 0xffffffff;
+ u16 cmp = m_tgr[i] + 1;
+ if(cmp > m_tcnt) {
+ if(m_tcnt >= m_counter_cycle || cmp <= m_counter_cycle)
+ new_delay = cmp - m_tcnt;
+ } else if(cmp <= m_counter_cycle) {
if(m_tcnt < m_counter_cycle)
- new_delay = (m_counter_cycle - m_tcnt) + m_tgr[i];
+ new_delay = (m_counter_cycle - m_tcnt) + cmp;
else
- new_delay = (0x10000 - m_tcnt) + m_tgr[i];
+ new_delay = (0x10000 - m_tcnt) + cmp;
}
if(event_delay > new_delay)
@@ -289,7 +357,6 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
m_event_time = ((((cur_time + (1ULL << m_clock_divider) - m_phase) >> m_clock_divider) + event_delay - 1) << m_clock_divider) + m_phase;
else
m_event_time = 0;
-
} else {
logerror("decrementing counter\n");
exit(1);
@@ -299,7 +366,8 @@ void h8_timer16_channel_device::recalc_event(uint64_t cur_time)
m_cpu->internal_update();
}
-h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+
+h8_timer16_device::h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, H8_TIMER16, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_timer_channel(*this, "%u", 0)
@@ -311,83 +379,83 @@ void h8_timer16_device::device_start()
save_item(NAME(m_tstr));
}
-void h8_timer16_device::device_reset()
+void h8_timer16_device::device_reset_after_children()
{
m_tstr = m_default_tstr;
- for(int i=0; i<m_timer_count; i++)
+ for(int i = 0; i < m_timer_count; i++)
m_timer_channel[i]->set_enable((m_tstr >> i) & 1);
}
-uint8_t h8_timer16_device::tstr_r()
+u8 h8_timer16_device::tstr_r()
{
return m_tstr;
}
-void h8_timer16_device::tstr_w(uint8_t data)
+void h8_timer16_device::tstr_w(u8 data)
{
if(V>=1) logerror("tstr_w %02x\n", data);
m_tstr = data;
- for(int i=0; i<m_timer_count; i++)
+ for(int i = 0; i < m_timer_count; i++)
m_timer_channel[i]->set_enable((m_tstr >> i) & 1);
}
-uint8_t h8_timer16_device::tsyr_r()
+u8 h8_timer16_device::tsyr_r()
{
return 0x00;
}
-void h8_timer16_device::tsyr_w(uint8_t data)
+void h8_timer16_device::tsyr_w(u8 data)
{
if(V>=1) logerror("tsyr_w %02x\n", data);
}
-uint8_t h8_timer16_device::tmdr_r()
+u8 h8_timer16_device::tmdr_r()
{
return 0x00;
}
-void h8_timer16_device::tmdr_w(uint8_t data)
+void h8_timer16_device::tmdr_w(u8 data)
{
if(V>=1) logerror("tmdr_w %02x\n", data);
}
-uint8_t h8_timer16_device::tfcr_r()
+u8 h8_timer16_device::tfcr_r()
{
return 0x00;
}
-void h8_timer16_device::tfcr_w(uint8_t data)
+void h8_timer16_device::tfcr_w(u8 data)
{
if(V>=1) logerror("tfcr_w %02x\n", data);
}
-uint8_t h8_timer16_device::toer_r()
+u8 h8_timer16_device::toer_r()
{
return 0x00;
}
-void h8_timer16_device::toer_w(uint8_t data)
+void h8_timer16_device::toer_w(u8 data)
{
if(V>=1) logerror("toer_w %02x\n", data);
}
-uint8_t h8_timer16_device::tocr_r()
+u8 h8_timer16_device::tocr_r()
{
return 0x00;
}
-void h8_timer16_device::tocr_w(uint8_t data)
+void h8_timer16_device::tocr_w(u8 data)
{
if(V>=1) logerror("tocr_w %02x\n", data);
}
-uint8_t h8_timer16_device::tisr_r(offs_t offset)
+u8 h8_timer16_device::tisr_r(offs_t offset)
{
- uint8_t r = 0;
- for(int i=0; i<m_timer_count; i++)
+ u8 r = 0;
+ for(int i = 0; i < m_timer_count; i++)
r |= m_timer_channel[i]->tisr_r(offset) << i;
- for(int i=m_timer_count; i<4; i++)
+ for(int i = m_timer_count; i < 4; i++)
r |= 0x11 <<i;
if(V>=1) logerror("tisr%c_r %02x\n", 'a'+offset, r);
@@ -395,39 +463,38 @@ uint8_t h8_timer16_device::tisr_r(offs_t offset)
return r;
}
-void h8_timer16_device::tisr_w(offs_t offset, uint8_t data)
+void h8_timer16_device::tisr_w(offs_t offset, u8 data)
{
if(V>=1) logerror("tisr%c_w %02x\n", 'a'+offset, data);
- for(int i=0; i<m_timer_count; i++)
+ for(int i = 0; i < m_timer_count; i++)
m_timer_channel[i]->tisr_w(offset, data >> i);
}
-uint8_t h8_timer16_device::tisrc_r()
+u8 h8_timer16_device::tisrc_r()
{
return tisr_r(2);
}
-void h8_timer16_device::tisrc_w(uint8_t data)
+void h8_timer16_device::tisrc_w(u8 data)
{
tisr_w(2, data);
}
-void h8_timer16_device::tolr_w(uint8_t data)
+void h8_timer16_device::tolr_w(u8 data)
{
if(V>=1) logerror("tocr_w %02x\n", data);
}
-
void h8_timer16_channel_device::tier_update()
{
}
-void h8_timer16_channel_device::isr_update(uint8_t val)
+void h8_timer16_channel_device::isr_update(u8 val)
{
}
-uint8_t h8_timer16_channel_device::isr_to_sr() const
+u8 h8_timer16_channel_device::isr_to_sr() const
{
return 0x00;
}
@@ -436,7 +503,7 @@ void h8_timer16_channel_device::tcr_update()
{
}
-void h8_timer16_channel_device::tisr_w(int offset, uint8_t value)
+void h8_timer16_channel_device::tisr_w(int offset, u8 value)
{
update_counter();
if(!(value & 0x01)) {
@@ -480,7 +547,7 @@ void h8_timer16_channel_device::tisr_w(int offset, uint8_t value)
recalc_event();
}
-uint8_t h8_timer16_channel_device::tisr_r(int offset) const
+u8 h8_timer16_channel_device::tisr_r(int offset) const
{
switch(offset) {
case 0:
@@ -493,7 +560,93 @@ uint8_t h8_timer16_channel_device::tisr_r(int offset) const
return 0x00;
}
-h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+
+// H8/325
+
+h8325_timer16_channel_device::h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8_timer16_channel_device(mconfig, H8325_TIMER16_CHANNEL, tag, owner, clock),
+ m_tcsr(0)
+{
+}
+
+h8325_timer16_channel_device::~h8325_timer16_channel_device()
+{
+}
+
+void h8325_timer16_channel_device::device_start()
+{
+ h8_timer16_channel_device::device_start();
+
+ save_item(NAME(m_tcsr));
+}
+
+void h8325_timer16_channel_device::device_reset()
+{
+ h8_timer16_channel_device::device_reset();
+
+ m_tcsr = 0;
+ m_clock_divider = 1;
+}
+
+void h8325_timer16_channel_device::tcr_update()
+{
+ m_ier =
+ (m_tcr & 0x10 ? IRQ_V : 0) |
+ (m_tcr & 0x20 ? IRQ_A : 0) |
+ (m_tcr & 0x40 ? IRQ_B : 0) |
+ (m_tcr & 0x80 ? IRQ_C : 0);
+
+ m_clock_type = DIV_1;
+ m_clock_divider = 0;
+
+ switch (m_tcr & 3) {
+ case 0: // /2
+ m_clock_divider = 1;
+ break;
+ case 1: // /8
+ m_clock_divider = 3;
+ break;
+ case 2: // /32
+ m_clock_divider = 5;
+ break;
+ case 3: // TODO: external
+ m_clock_type = -1;
+ break;
+ }
+}
+
+void h8325_timer16_channel_device::isr_update(u8 val)
+{
+ m_tcsr = val;
+
+ if(val & 1)
+ m_tgr_clearing = 0;
+ else
+ m_tgr_clearing = TGR_CLEAR_NONE;
+
+ if(!(val & 0x10))
+ m_isr &= ~IRQ_V;
+ if(!(val & 0x20))
+ m_isr &= ~IRQ_A;
+ if(!(val & 0x40))
+ m_isr &= ~IRQ_B;
+ if(!(val & 0x80))
+ m_isr &= ~IRQ_C;
+}
+
+u8 h8325_timer16_channel_device::isr_to_sr() const
+{
+ return (m_tcsr & 0x0f) |
+ (m_isr & IRQ_V ? 0x10 : 0) |
+ (m_isr & IRQ_A ? 0x20 : 0) |
+ (m_isr & IRQ_B ? 0x40 : 0) |
+ (m_isr & IRQ_C ? 0x80 : 0);
+}
+
+
+// H8H
+
+h8h_timer16_channel_device::h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_timer16_channel_device(mconfig, H8H_TIMER16_CHANNEL, tag, owner, clock)
{
}
@@ -511,7 +664,7 @@ void h8h_timer16_channel_device::tier_update()
(m_tier & 0x04 ? IRQ_V : 0);
}
-void h8h_timer16_channel_device::isr_update(uint8_t val)
+void h8h_timer16_channel_device::isr_update(u8 val)
{
if(!(val & 1))
m_isr &= ~IRQ_A;
@@ -521,7 +674,7 @@ void h8h_timer16_channel_device::isr_update(uint8_t val)
m_isr &= ~IRQ_V;
}
-uint8_t h8h_timer16_channel_device::isr_to_sr() const
+u8 h8h_timer16_channel_device::isr_to_sr() const
{
return 0xf8 | (m_isr & IRQ_V ? 4 : 0) | (m_isr & IRQ_B ? 2 : 0) | (m_isr & IRQ_A ? 1 : 0);
}
@@ -577,7 +730,10 @@ void h8h_timer16_channel_device::tcr_update()
}
}
-h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+
+// H8S
+
+h8s_timer16_channel_device::h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_timer16_channel_device(mconfig, H8S_TIMER16_CHANNEL, tag, owner, clock)
{
}
@@ -599,12 +755,12 @@ void h8s_timer16_channel_device::tier_update()
(m_tier & 0x80 ? IRQ_TRIG : 0);
}
-void h8s_timer16_channel_device::isr_update(uint8_t val)
+void h8s_timer16_channel_device::isr_update(u8 val)
{
m_isr &= (val | m_tier_mask | 0xc0);
}
-uint8_t h8s_timer16_channel_device::isr_to_sr() const
+u8 h8s_timer16_channel_device::isr_to_sr() const
{
return 0xc0 | m_isr;
}
diff --git a/src/devices/cpu/h8/h8_timer16.h b/src/devices/cpu/h8/h8_timer16.h
index 6178fd000fd..aa807bd85e6 100644
--- a/src/devices/cpu/h8/h8_timer16.h
+++ b/src/devices/cpu/h8/h8_timer16.h
@@ -6,7 +6,6 @@
H8 16 bits timer
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_TIMER16_H
@@ -56,7 +55,7 @@ public:
};
- h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tbr_count, U &&intc, int irq_base)
: h8_timer16_channel_device(mconfig, tag, owner, 0)
{
@@ -74,62 +73,101 @@ public:
m_interrupt[5] = irq_base;
}
- uint8_t tcr_r();
- void tcr_w(uint8_t data);
- uint8_t tmdr_r();
- void tmdr_w(uint8_t data);
- uint8_t tior_r();
- void tior_w(offs_t offset, uint8_t data);
- uint8_t tier_r();
- void tier_w(uint8_t data);
- uint8_t tsr_r();
- void tsr_w(uint8_t data);
- uint16_t tcnt_r();
- void tcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- uint16_t tgr_r(offs_t offset);
- void tgr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- uint16_t tbr_r(offs_t offset);
- void tbr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
-
- uint64_t internal_update(uint64_t current_time);
- void set_ier(uint8_t value);
+ u8 tcr_r();
+ void tcr_w(u8 data);
+ u8 tmdr_r();
+ void tmdr_w(u8 data);
+ u8 tior_r();
+ void tior_w(offs_t offset, u8 data);
+ u8 tier_r();
+ void tier_w(u8 data);
+ u8 tsr_r();
+ void tsr_w(u8 data);
+ u16 tcnt_r();
+ void tcnt_w(offs_t offset, u16 data, u16 mem_mask = ~0);
+ u16 tgr_r(offs_t offset);
+ void tgr_w(offs_t offset, u16 data, u16 mem_mask = ~0);
+ u16 tbr_r(offs_t offset);
+ void tbr_w(offs_t offset, u16 data, u16 mem_mask = ~0);
+
+ u64 internal_update(u64 current_time);
+ void notify_standby(int state);
+ void set_ier(u8 value);
void set_enable(bool enable);
- void tisr_w(int offset, uint8_t data);
- uint8_t tisr_r(int offset) const;
+ void tisr_w(int offset, u8 data);
+ u8 tisr_r(int offset) const;
protected:
required_device<h8_device> m_cpu;
required_device<h8_intc_device> m_intc;
optional_device<h8_timer16_channel_device> m_chained_timer;
int m_interrupt[6];
- uint8_t m_tier_mask;
+ u8 m_tier_mask;
int m_tgr_count, m_tbr_count;
int m_tgr_clearing;
- uint8_t m_tcr, m_tier, m_ier, m_isr;
+ u8 m_tcr, m_tier, m_ier, m_isr;
int m_clock_type, m_clock_divider;
- uint16_t m_tcnt, m_tgr[6];
- uint64_t m_last_clock_update, m_event_time;
- uint32_t m_phase, m_counter_cycle;
+ u16 m_tcnt, m_tgr[6];
+ u64 m_last_clock_update, m_event_time;
+ u32 m_phase, m_counter_cycle;
bool m_counter_incrementing;
bool m_channel_active;
- h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer16_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- void update_counter(uint64_t cur_time = 0);
- void recalc_event(uint64_t cur_time = 0);
+ void update_counter(u64 cur_time = 0);
+ void recalc_event(u64 cur_time = 0);
virtual void tcr_update();
virtual void tier_update();
- virtual void isr_update(uint8_t value);
- virtual uint8_t isr_to_sr() const;
+ virtual void isr_update(u8 value);
+ virtual u8 isr_to_sr() const;
+};
+
+class h8325_timer16_channel_device : public h8_timer16_channel_device {
+public:
+ h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template<typename T, typename U> h8325_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_base)
+ : h8325_timer16_channel_device(mconfig, tag, owner, 0)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_tgr_count = 2; // OCRA/OCRB(/ICR)
+
+ m_interrupt[0] = irq_base + 1; // OCIA
+ m_interrupt[1] = irq_base + 2; // OCIB
+ m_interrupt[2] = irq_base; // ICI
+ m_interrupt[3] = -1;
+ m_interrupt[4] = irq_base + 3; // FOVI
+ m_interrupt[5] = -1;
+ }
+
+ virtual ~h8325_timer16_channel_device();
+
+ u16 ocra_r() { return tgr_r(0); }
+ void ocra_w(offs_t offset, u16 data, u16 mem_mask = ~0) { tgr_w(0, data, mem_mask); }
+ u16 ocrb_r() { return tgr_r(1); }
+ void ocrb_w(offs_t offset, u16 data, u16 mem_mask = ~0) { tgr_w(1, data, mem_mask); }
+ u16 icr_r() { return tgr_r(2); }
+
+protected:
+ virtual void tcr_update() override;
+ virtual void isr_update(u8 value) override;
+ virtual u8 isr_to_sr() const override;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+private:
+ u8 m_tcsr;
};
class h8h_timer16_channel_device : public h8_timer16_channel_device {
public:
- h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8h_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tbr_count, U &&intc, int irq_base)
: h8h_timer16_channel_device(mconfig, tag, owner, 0)
{
@@ -151,13 +189,13 @@ public:
protected:
virtual void tcr_update() override;
virtual void tier_update() override;
- virtual void isr_update(uint8_t value) override;
- virtual uint8_t isr_to_sr() const override;
+ virtual void isr_update(u8 value) override;
+ virtual u8 isr_to_sr() const override;
};
class h8s_timer16_channel_device : public h8_timer16_channel_device {
public:
- h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8s_timer16_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tier_mask, U &&intc, int irq_base,
int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7)
: h8s_timer16_channel_device(mconfig, tag, owner, 0)
@@ -193,14 +231,14 @@ protected:
virtual void tcr_update() override;
virtual void tier_update() override;
- virtual void isr_update(uint8_t value) override;
- virtual uint8_t isr_to_sr() const override;
+ virtual void isr_update(u8 value) override;
+ virtual u8 isr_to_sr() const override;
};
class h8_timer16_device : public device_t {
public:
- h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template<typename T> h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int timer_count, uint8_t default_tstr)
+ h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template<typename T> h8_timer16_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int timer_count, u8 default_tstr)
: h8_timer16_device(mconfig, tag, owner, 0)
{
m_cpu.set_tag(std::forward<T>(cpu));
@@ -208,38 +246,39 @@ public:
m_default_tstr = default_tstr;
}
- uint8_t tstr_r();
- void tstr_w(uint8_t data);
- uint8_t tsyr_r();
- void tsyr_w(uint8_t data);
- uint8_t tmdr_r();
- void tmdr_w(uint8_t data);
- uint8_t tfcr_r();
- void tfcr_w(uint8_t data);
- uint8_t toer_r();
- void toer_w(uint8_t data);
- uint8_t tocr_r();
- void tocr_w(uint8_t data);
- uint8_t tisr_r(offs_t offset);
- void tisr_w(offs_t offset, uint8_t data);
- uint8_t tisrc_r();
- void tisrc_w(uint8_t data);
- void tolr_w(uint8_t data);
+ u8 tstr_r();
+ void tstr_w(u8 data);
+ u8 tsyr_r();
+ void tsyr_w(u8 data);
+ u8 tmdr_r();
+ void tmdr_w(u8 data);
+ u8 tfcr_r();
+ void tfcr_w(u8 data);
+ u8 toer_r();
+ void toer_w(u8 data);
+ u8 tocr_r();
+ void tocr_w(u8 data);
+ u8 tisr_r(offs_t offset);
+ void tisr_w(offs_t offset, u8 data);
+ u8 tisrc_r();
+ void tisrc_w(u8 data);
+ void tolr_w(u8 data);
protected:
required_device<h8_device> m_cpu;
optional_device_array<h8_timer16_channel_device, 6> m_timer_channel;
int m_timer_count;
- uint8_t m_default_tstr;
- uint8_t m_tstr;
+ u8 m_default_tstr;
+ u8 m_tstr;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset_after_children() override;
};
-DECLARE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device)
-DECLARE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device)
-DECLARE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device)
-DECLARE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device)
+DECLARE_DEVICE_TYPE(H8_TIMER16, h8_timer16_device)
+DECLARE_DEVICE_TYPE(H8_TIMER16_CHANNEL, h8_timer16_channel_device)
+DECLARE_DEVICE_TYPE(H8325_TIMER16_CHANNEL, h8325_timer16_channel_device)
+DECLARE_DEVICE_TYPE(H8H_TIMER16_CHANNEL, h8h_timer16_channel_device)
+DECLARE_DEVICE_TYPE(H8S_TIMER16_CHANNEL, h8s_timer16_channel_device)
#endif // MAME_CPU_H8_H8_TIMER16_H
diff --git a/src/devices/cpu/h8/h8_timer8.cpp b/src/devices/cpu/h8/h8_timer8.cpp
index 6976adfbeca..c6ba496ea27 100644
--- a/src/devices/cpu/h8/h8_timer8.cpp
+++ b/src/devices/cpu/h8/h8_timer8.cpp
@@ -1,5 +1,22 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8_timer8.cpp
+
+ H8 8 bits timer
+
+ TODO:
+ - IRQs are level triggered? eg. when an interrupt enable flag gets set
+ while an overflow or compare match flag is 1, will it trigger an IRQ?
+ Or if it's edge triggered, will it trigger an IRQ on rising edge of
+ (irq_enable & flag)?
+ - When writing 0 to the status register(s), the overflow/compare match
+ flags will only be cleared after a read access was done while they
+ were set? It's how the databook explains it, similar to HD6301.
+
+***************************************************************************/
+
#include "emu.h"
#include "h8_timer8.h"
@@ -12,12 +29,12 @@ static constexpr int V = 1;
DEFINE_DEVICE_TYPE(H8_TIMER8_CHANNEL, h8_timer8_channel_device, "h8_timer8_channel", "H8 8-bit timer channel")
DEFINE_DEVICE_TYPE(H8H_TIMER8_CHANNEL, h8h_timer8_channel_device, "h8h_timer8_channel", "H8H 8-bit timer channel")
-h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_timer8_channel_device(mconfig, H8_TIMER8_CHANNEL, tag, owner, clock)
{
}
-h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG),
@@ -30,12 +47,12 @@ h8_timer8_channel_device::h8_timer8_channel_device(const machine_config &mconfig
m_has_ice = false;
}
-uint8_t h8_timer8_channel_device::tcr_r()
+u8 h8_timer8_channel_device::tcr_r()
{
return m_tcr;
}
-void h8_timer8_channel_device::tcr_w(uint8_t data)
+void h8_timer8_channel_device::tcr_w(u8 data)
{
update_counter();
m_tcr = data;
@@ -64,7 +81,7 @@ void h8_timer8_channel_device::update_tcr()
case 1: case 2: case 3:
m_clock_type = DIV;
m_clock_divider = m_div_tab[((m_tcr & TCR_CKS)-1)*2 + m_extra_clock_bit];
- if(V>=1) util::stream_format(message, "clock %dHz", m_cpu->clock()/m_clock_divider);
+ if(V>=1) util::stream_format(message, "clock %dHz", m_cpu->system_clock()/m_clock_divider);
break;
case 4:
@@ -114,24 +131,26 @@ void h8_timer8_channel_device::update_tcr()
break;
}
- if(V>=1) util::stream_format(message, ", irq=%c%c%c\n",
- m_tcr & TCR_CMIEB ? 'b' : '-',
- m_tcr & TCR_CMIEA ? 'a' : '-',
- m_tcr & TCR_OVIE ? 'o' : '-');
+ if(V>=1) {
+ util::stream_format(message, ", irq=%c%c%c\n",
+ m_tcr & TCR_CMIEB ? 'b' : '-',
+ m_tcr & TCR_CMIEA ? 'a' : '-',
+ m_tcr & TCR_OVIE ? 'o' : '-');
- logerror(std::move(message).str());
+ logerror(std::move(message).str());
+ }
}
-uint8_t h8_timer8_channel_device::tcsr_r()
+u8 h8_timer8_channel_device::tcsr_r()
{
return m_tcsr;
}
-void h8_timer8_channel_device::tcsr_w(uint8_t data)
+void h8_timer8_channel_device::tcsr_w(u8 data)
{
update_counter();
- uint8_t mask = m_has_adte || m_has_ice ? 0x1f : 0x0f;
+ u8 mask = m_has_adte || m_has_ice ? 0x1f : 0x0f;
m_tcsr = (m_tcsr & ~mask) | (data & mask);
m_tcsr &= data | 0x1f;
@@ -140,12 +159,12 @@ void h8_timer8_channel_device::tcsr_w(uint8_t data)
recalc_event();
}
-uint8_t h8_timer8_channel_device::tcor_r(offs_t offset)
+u8 h8_timer8_channel_device::tcor_r(offs_t offset)
{
return m_tcor[offset];
}
-void h8_timer8_channel_device::tcor_w(offs_t offset, uint8_t data)
+void h8_timer8_channel_device::tcor_w(offs_t offset, u8 data)
{
update_counter();
m_tcor[offset] = data;
@@ -153,14 +172,16 @@ void h8_timer8_channel_device::tcor_w(offs_t offset, uint8_t data)
recalc_event();
}
-uint8_t h8_timer8_channel_device::tcnt_r()
+u8 h8_timer8_channel_device::tcnt_r()
{
- update_counter();
- recalc_event();
+ if(!machine().side_effects_disabled()) {
+ update_counter();
+ recalc_event();
+ }
return m_tcnt;
}
-void h8_timer8_channel_device::tcnt_w(uint8_t data)
+void h8_timer8_channel_device::tcnt_w(u8 data)
{
update_counter();
m_tcnt = data;
@@ -170,6 +191,17 @@ void h8_timer8_channel_device::tcnt_w(uint8_t data)
void h8_timer8_channel_device::device_start()
{
+ save_item(NAME(m_tcor));
+ save_item(NAME(m_tcr));
+ save_item(NAME(m_tcsr));
+ save_item(NAME(m_tcnt));
+ save_item(NAME(m_extra_clock_bit));
+ save_item(NAME(m_clock_type));
+ save_item(NAME(m_clock_divider));
+ save_item(NAME(m_clear_type));
+ save_item(NAME(m_counter_cycle));
+ save_item(NAME(m_last_clock_update));
+ save_item(NAME(m_event_time));
}
void h8_timer8_channel_device::device_reset()
@@ -188,34 +220,54 @@ void h8_timer8_channel_device::device_reset()
m_extra_clock_bit = false;
}
-uint64_t h8_timer8_channel_device::internal_update(uint64_t current_time)
+u64 h8_timer8_channel_device::internal_update(u64 current_time)
{
- if(m_event_time && current_time >= m_event_time) {
- update_counter(current_time);
- recalc_event(current_time);
+ while(m_event_time && current_time >= m_event_time) {
+ update_counter(m_event_time);
+ recalc_event(m_event_time);
}
return m_event_time;
}
-void h8_timer8_channel_device::update_counter(uint64_t cur_time)
+void h8_timer8_channel_device::notify_standby(int state)
{
- if(m_clock_type != DIV)
- return;
+ if(!state && m_event_time) {
+ u64 delta = m_cpu->total_cycles() - m_cpu->standby_time();
+ m_event_time += delta;
+ m_last_clock_update += delta;
+ }
+}
- if(!cur_time)
- cur_time = m_cpu->total_cycles();
+void h8_timer8_channel_device::update_counter(u64 cur_time, u64 delta)
+{
+ if(m_clock_type == DIV) {
+ if(!cur_time)
+ cur_time = m_cpu->total_cycles();
+
+ u64 base_time = (m_last_clock_update + m_clock_divider/2) / m_clock_divider;
+ m_last_clock_update = cur_time;
+ u64 new_time = (cur_time + m_clock_divider/2) / m_clock_divider;
+ delta = new_time - base_time;
+ }
+
+ if(!delta)
+ return;
- uint64_t base_time = (m_last_clock_update + m_clock_divider/2) / m_clock_divider;
- uint64_t new_time = (cur_time + m_clock_divider/2) / m_clock_divider;
+ u8 prev = m_tcnt;
+ u64 tt = m_tcnt + delta;
- int tt = m_tcnt + new_time - base_time;
- m_tcnt = tt % m_counter_cycle;
+ if(prev >= m_counter_cycle) {
+ if(tt >= 0x100)
+ m_tcnt = (tt - 0x100) % m_counter_cycle;
+ else
+ m_tcnt = tt;
+ } else
+ m_tcnt = tt % m_counter_cycle;
- if(tt == m_tcor[0] || m_tcnt == m_tcor[0]) {
+ if(u8 cmp = m_tcor[0] + 1; m_tcnt == cmp || (tt == cmp && tt == m_counter_cycle)) {
if(m_chained_timer)
m_chained_timer->chained_timer_tcora();
-
if(!(m_tcsr & TCSR_CMFA)) {
m_tcsr |= TCSR_CMFA;
if(m_tcr & TCR_CMIEA)
@@ -223,13 +275,15 @@ void h8_timer8_channel_device::update_counter(uint64_t cur_time)
}
}
- if(!(m_tcsr & TCSR_CMFB) && (tt == m_tcor[1] || m_tcnt == m_tcor[1])) {
- m_tcsr |= TCSR_CMFB;
- if(m_tcr & TCR_CMIEB)
- m_intc->internal_interrupt(m_irq_cb);
+ if(u8 cmp = m_tcor[1] + 1; m_tcnt == cmp || (tt == cmp && tt == m_counter_cycle)) {
+ if(!(m_tcsr & TCSR_CMFB)) {
+ m_tcsr |= TCSR_CMFB;
+ if(m_tcr & TCR_CMIEB)
+ m_intc->internal_interrupt(m_irq_cb);
+ }
}
- if(tt >= 0x100) {
+ if(tt >= 0x100 && (m_counter_cycle == 0x100 || prev >= m_counter_cycle)) {
if(m_chained_timer)
m_chained_timer->chained_timer_overflow();
if(!(m_tcsr & TCSR_OVF)) {
@@ -238,13 +292,12 @@ void h8_timer8_channel_device::update_counter(uint64_t cur_time)
m_intc->internal_interrupt(m_irq_v);
}
}
- m_last_clock_update = cur_time;
}
-void h8_timer8_channel_device::recalc_event(uint64_t cur_time)
+void h8_timer8_channel_device::recalc_event(u64 cur_time)
{
bool update_cpu = cur_time == 0;
- uint64_t old_event_time = m_event_time;
+ u64 old_event_time = m_event_time;
if(m_clock_type != DIV) {
m_event_time = 0;
@@ -256,33 +309,32 @@ void h8_timer8_channel_device::recalc_event(uint64_t cur_time)
if(!cur_time)
cur_time = m_cpu->total_cycles();
- uint32_t event_delay = 0xffffffff;
+ u32 event_delay = 0xffffffff;
if(m_clear_type == CLEAR_A || m_clear_type == CLEAR_B)
- m_counter_cycle = m_tcor[m_clear_type - CLEAR_A];
- else {
+ m_counter_cycle = m_tcor[m_clear_type - CLEAR_A] + 1;
+ else
m_counter_cycle = 0x100;
- event_delay = m_counter_cycle - m_tcnt;
- if(!event_delay)
- event_delay = m_counter_cycle;
- }
-
- for(auto &elem : m_tcor) {
- uint32_t new_delay = 0xffffffff;
- if(elem > m_tcnt) {
- if(m_tcnt >= m_counter_cycle || elem <= m_counter_cycle)
- new_delay = elem - m_tcnt;
- } else if(elem <= m_counter_cycle) {
+ if(m_counter_cycle == 0x100 || m_tcnt >= m_counter_cycle)
+ event_delay = 0x100 - m_tcnt;
+
+ for(auto &tcor : m_tcor) {
+ u32 new_delay = 0xffffffff;
+ u8 cmp = tcor + 1;
+ if(cmp > m_tcnt) {
+ if(m_tcnt >= m_counter_cycle || cmp <= m_counter_cycle)
+ new_delay = cmp - m_tcnt;
+ } else if(cmp <= m_counter_cycle) {
if(m_tcnt < m_counter_cycle)
- new_delay = (m_counter_cycle - m_tcnt) + elem;
+ new_delay = (m_counter_cycle - m_tcnt) + cmp;
else
- new_delay = (0x100 - m_tcnt) + elem;
+ new_delay = (0x100 - m_tcnt) + cmp;
}
if(event_delay > new_delay)
event_delay = new_delay;
}
if(event_delay != 0xffffffff)
- m_event_time = ((((cur_time + m_clock_divider) / m_clock_divider) + event_delay - 1) * m_clock_divider) + m_clock_divider/2;
+ m_event_time = ((((cur_time + m_clock_divider/2) / m_clock_divider) + event_delay - 1) * m_clock_divider) + m_clock_divider/2;
else
m_event_time = 0;
@@ -293,48 +345,16 @@ void h8_timer8_channel_device::recalc_event(uint64_t cur_time)
void h8_timer8_channel_device::chained_timer_overflow()
{
if(m_clock_type == CHAIN_OVERFLOW)
- timer_tick();
+ update_counter(0, 1);
}
void h8_timer8_channel_device::chained_timer_tcora()
{
if(m_clock_type == CHAIN_A)
- timer_tick();
-}
-
-void h8_timer8_channel_device::timer_tick()
-{
- m_tcnt++;
-
- if(m_tcnt == m_tcor[0]) {
- if(m_chained_timer)
- m_chained_timer->chained_timer_tcora();
-
- if(!(m_tcsr & TCSR_CMFA)) {
- m_tcsr |= TCSR_CMFA;
- if(m_tcr & TCR_CMIEA)
- m_intc->internal_interrupt(m_irq_ca);
- }
- }
-
- if(!(m_tcsr & TCSR_CMFB) && m_tcnt == m_tcor[1]) {
- m_tcsr |= TCSR_CMFB;
- if(m_tcr & TCR_CMIEB)
- m_intc->internal_interrupt(m_irq_cb);
- }
-
- if(m_tcnt == 0x00) {
- if(m_chained_timer)
- m_chained_timer->chained_timer_overflow();
- if(!(m_tcsr & TCSR_OVF)) {
- m_tcsr |= TCSR_OVF;
- if(m_tcr & TCR_OVIE)
- m_intc->internal_interrupt(m_irq_v);
- }
- }
+ update_counter(0, 1);
}
-h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8h_timer8_channel_device::h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8_timer8_channel_device(mconfig, H8H_TIMER8_CHANNEL, tag, owner, clock)
{
// The extra clock bit is not used for h8h+
diff --git a/src/devices/cpu/h8/h8_timer8.h b/src/devices/cpu/h8/h8_timer8.h
index df0a1bbae1d..9ed4a06d6e4 100644
--- a/src/devices/cpu/h8/h8_timer8.h
+++ b/src/devices/cpu/h8/h8_timer8.h
@@ -6,7 +6,6 @@
H8 8 bits timer
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_TIMER8_H
@@ -29,7 +28,7 @@ public:
DIV
};
- h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_ca, int irq_cb, int irq_v,
int div1, int div2, int div3, int div4, int div5, int div6)
: h8_timer8_channel_device(mconfig, tag, owner, 0)
@@ -47,16 +46,17 @@ public:
m_div_tab[5] = div6;
}
- uint8_t tcr_r();
- void tcr_w(uint8_t data);
- uint8_t tcsr_r();
- void tcsr_w(uint8_t data);
- uint8_t tcor_r(offs_t offset);
- void tcor_w(offs_t offset, uint8_t data);
- uint8_t tcnt_r();
- void tcnt_w(uint8_t data);
-
- uint64_t internal_update(uint64_t current_time);
+ u8 tcr_r();
+ void tcr_w(u8 data);
+ u8 tcsr_r();
+ void tcsr_w(u8 data);
+ u8 tcor_r(offs_t offset);
+ void tcor_w(offs_t offset, u8 data);
+ u8 tcnt_r();
+ void tcnt_w(u8 data);
+
+ u64 internal_update(u64 current_time);
+ void notify_standby(int state);
void set_extra_clock_bit(bool bit);
void chained_timer_overflow();
@@ -90,27 +90,26 @@ protected:
int m_irq_ca, m_irq_cb, m_irq_v, m_chain_type;
int m_div_tab[6];
- uint8_t m_tcor[2];
- uint8_t m_tcr, m_tcsr, m_tcnt;
+ u8 m_tcor[2];
+ u8 m_tcr, m_tcsr, m_tcnt;
bool m_extra_clock_bit, m_has_adte, m_has_ice;
int m_clock_type, m_clock_divider, m_clear_type, m_counter_cycle;
- uint64_t m_last_clock_update, m_event_time;
+ u64 m_last_clock_update, m_event_time;
- h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8_timer8_channel_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- void update_counter(uint64_t cur_time = 0);
- void recalc_event(uint64_t cur_time = 0);
+ void update_counter(u64 cur_time = 0, u64 delta = 0);
+ void recalc_event(u64 cur_time = 0);
- void timer_tick();
void update_tcr();
};
class h8h_timer8_channel_device : public h8_timer8_channel_device {
public:
- h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U, typename V> h8h_timer8_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq_ca, int irq_cb, int irq_v,
V &&chain, int chain_type, bool has_adte, bool has_ice)
: h8h_timer8_channel_device(mconfig, tag, owner, 0)
diff --git a/src/devices/cpu/h8/h8_watchdog.cpp b/src/devices/cpu/h8/h8_watchdog.cpp
index 0bab0b3267b..a8af865f2ab 100644
--- a/src/devices/cpu/h8/h8_watchdog.cpp
+++ b/src/devices/cpu/h8/h8_watchdog.cpp
@@ -1,12 +1,27 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8_watchdog.cpp
+
+ H8 watchdog/timer
+
+ TODO:
+ - add RSTCSR for MCUs that have it (reset is only enabled when RSTI is 1)
+ - It will only clear the overflow flag when writing 0 after reading it
+ when it's set? It's how the databook explains it, similar to HD6301.
+
+***************************************************************************/
+
#include "emu.h"
#include "h8_watchdog.h"
DEFINE_DEVICE_TYPE(H8_WATCHDOG, h8_watchdog_device, "h8_watchdog", "H8 watchdog")
-const int h8_watchdog_device::div_bh[8] = { 1, 6, 7, 9, 11, 13, 15, 17 };
-const int h8_watchdog_device::div_s [8] = { 1, 5, 6, 7, 8, 9, 11, 12 };
+const int h8_watchdog_device::div_bh[8] = { 1, 5, 6, 7, 8, 9, 11, 12 };
+const int h8_watchdog_device::div_s [8] = { 1, 6, 7, 9, 11, 13, 15, 17 };
-h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, H8_WATCHDOG, tag, owner, clock),
m_cpu(*this, finder_base::DUMMY_TAG),
m_intc(*this, finder_base::DUMMY_TAG)
@@ -14,31 +29,38 @@ h8_watchdog_device::h8_watchdog_device(const machine_config &mconfig, const char
}
-uint64_t h8_watchdog_device::internal_update(uint64_t current_time)
+u64 h8_watchdog_device::internal_update(u64 current_time)
{
tcnt_update(current_time);
if(m_tcsr & TCSR_TME) {
int shift = (m_type == S ? div_s : div_bh)[m_tcsr & TCSR_CKS];
- uint64_t spos = m_tcnt_cycle_base >> shift;
+ u64 spos = m_tcnt_cycle_base >> shift;
return (spos + 0x100 - m_tcnt) << shift;
-
} else
return 0;
}
-void h8_watchdog_device::tcnt_update(uint64_t cur_time)
+void h8_watchdog_device::notify_standby(int state)
+{
+ if(state)
+ tcnt_update();
+ else
+ m_tcnt_cycle_base = m_cpu->total_cycles();
+}
+
+void h8_watchdog_device::tcnt_update(u64 cur_time)
{
if(m_tcsr & TCSR_TME) {
int shift = (m_type == S ? div_s : div_bh)[m_tcsr & TCSR_CKS];
if(!cur_time)
cur_time = m_cpu->total_cycles();
- uint64_t spos = m_tcnt_cycle_base >> shift;
- uint64_t epos = cur_time >> shift;
+ u64 spos = m_tcnt_cycle_base >> shift;
+ u64 epos = cur_time >> shift;
- int next_tcnt = m_tcnt + int(epos - spos);
+ u64 next_tcnt = m_tcnt + (epos - spos);
m_tcnt = next_tcnt;
m_tcnt_cycle_base = cur_time;
- // logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, m_tcnt, next_tcnt, shift);
+ //logerror("%10lld tcnt %02x -> %03x shift=%d\n", cur_time, m_tcnt, next_tcnt, shift);
if(next_tcnt >= 0x100) {
if(m_tcsr & TCSR_WT) {
@@ -56,17 +78,18 @@ void h8_watchdog_device::tcnt_update(uint64_t cur_time)
}
} else
m_tcnt = 0;
-
}
-uint16_t h8_watchdog_device::wd_r()
+u16 h8_watchdog_device::wd_r()
{
if(!machine().side_effects_disabled())
tcnt_update();
- return (m_tcsr << 8) | m_tcnt;
+
+ u8 tcsr_mask = m_type == B ? 0x10 : 0x18;
+ return ((m_tcsr | tcsr_mask) << 8) | m_tcnt;
}
-void h8_watchdog_device::wd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+void h8_watchdog_device::wd_w(offs_t offset, u16 data, u16 mem_mask)
{
if(mem_mask != 0xffff)
return;
@@ -75,8 +98,7 @@ void h8_watchdog_device::wd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
tcnt_update();
if(!(m_tcsr & TCSR_TME) && (data & TCSR_TME))
m_tcnt_cycle_base = m_cpu->total_cycles();
- m_tcsr = data & 0xff;
- m_tcsr |= m_type == B ? 0x10 : 0x18;
+ m_tcsr = (m_tcsr & data & TCSR_OVF) | (data & 0x7f);
m_cpu->internal_update();
}
@@ -84,21 +106,26 @@ void h8_watchdog_device::wd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
if(m_tcsr & TCSR_TME) {
m_tcnt = data & 0xff;
m_tcnt_cycle_base = m_cpu->total_cycles();
- // logerror("%10lld tcnt = %02x\n", m_tcnt_cycle_base, m_tcnt);
+ //logerror("%10lld tcnt = %02x\n", m_tcnt_cycle_base, m_tcnt);
}
m_cpu->internal_update();
}
}
-uint16_t h8_watchdog_device::rst_r()
+u16 h8_watchdog_device::rst_r()
{
if(!machine().side_effects_disabled())
logerror("rst_r\n");
- return 0;
+
+ u8 rst_mask = m_type == S ? 0x1f : 0x3f;
+ return m_rst | rst_mask;
}
-void h8_watchdog_device::rst_w(uint16_t data)
+void h8_watchdog_device::rst_w(offs_t offset, u16 data, u16 mem_mask)
{
+ if(mem_mask != 0xffff)
+ return;
+
if((data & 0xff00) == 0xa500)
logerror("wowf_w %02x\n", data & 0xff);
if((data & 0xff00) == 0x5a00)
@@ -108,15 +135,15 @@ void h8_watchdog_device::rst_w(uint16_t data)
void h8_watchdog_device::device_start()
{
save_item(NAME(m_tcnt));
- save_item(NAME(m_tcnt_cycle_base));
save_item(NAME(m_tcsr));
save_item(NAME(m_rst));
+ save_item(NAME(m_tcnt_cycle_base));
}
void h8_watchdog_device::device_reset()
{
- m_tcnt = 0x00;
m_tcnt_cycle_base = m_cpu->total_cycles();
- m_tcsr = m_type == B ? 0x10 : 0x18;
- m_rst = m_type == S ? 0x1f : 0x3f;
+ m_tcnt = 0x00;
+ m_tcsr = 0x00;
+ m_rst = 0x00;
}
diff --git a/src/devices/cpu/h8/h8_watchdog.h b/src/devices/cpu/h8/h8_watchdog.h
index d227e31be87..73fedbce1b1 100644
--- a/src/devices/cpu/h8/h8_watchdog.h
+++ b/src/devices/cpu/h8/h8_watchdog.h
@@ -1,40 +1,11 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
/***************************************************************************
h8_watchdog.h
H8 watchdog/timer
-****************************************************************************
-
- Copyright Olivier Galibert
- All rights reserved.
-
- Redistribution and use in source and binary forms, with or without
- modification, are permitted provided that the following conditions are
- met:
-
- * Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in
- the documentation and/or other materials provided with the
- distribution.
- * Neither the name 'MAME' nor the names of its contributors may be
- used to endorse or promote products derived from this software
- without specific prior written permission.
-
- THIS SOFTWARE IS PROVIDED BY OLIVIER GALIBERT ''AS IS'' AND ANY EXPRESS OR
- IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- DISCLAIMED. IN NO EVENT SHALL OLIVIER GALIBERT BE LIABLE FOR ANY DIRECT,
- INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
- STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
- IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- POSSIBILITY OF SUCH DAMAGE.
-
***************************************************************************/
#ifndef MAME_CPU_H8_H8_WATCHDOG_H
@@ -49,7 +20,7 @@ class h8_watchdog_device : public device_t {
public:
enum { B, H, S };
- h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
template<typename T, typename U> h8_watchdog_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc, int irq, int type)
: h8_watchdog_device(mconfig, tag, owner, 0)
{
@@ -59,16 +30,17 @@ public:
m_type = type;
}
- uint64_t internal_update(uint64_t current_time);
+ u64 internal_update(u64 current_time);
+ void notify_standby(int state);
- uint16_t wd_r();
- void wd_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- uint16_t rst_r();
- void rst_w(uint16_t data);
+ u16 wd_r();
+ void wd_w(offs_t offset, u16 data, u16 mem_mask = ~0);
+ u16 rst_r();
+ void rst_w(offs_t offset, u16 data, u16 mem_mask = ~0);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
enum {
@@ -91,10 +63,10 @@ private:
required_device<h8_intc_device> m_intc;
int m_irq;
int m_type;
- uint8_t m_tcnt, m_tcsr, m_rst;
- uint64_t m_tcnt_cycle_base;
+ u8 m_tcnt, m_tcsr, m_rst;
+ u64 m_tcnt_cycle_base;
- void tcnt_update(uint64_t current_time = 0);
+ void tcnt_update(u64 current_time = 0);
};
DECLARE_DEVICE_TYPE(H8_WATCHDOG, h8_watchdog_device)
diff --git a/src/devices/cpu/h8/h8d.cpp b/src/devices/cpu/h8/h8d.cpp
index a6d5bb503c0..93cda50aa30 100644
--- a/src/devices/cpu/h8/h8d.cpp
+++ b/src/devices/cpu/h8/h8d.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- h8d.h
+ h8d.cpp
H8-300 base cpu emulation, disassembler
@@ -148,7 +148,7 @@ void h8_disassembler::disassemble_am(std::ostream &stream, int am, offs_t pc, co
break;
case DASM_abs16:
- if(slot == 3)
+ if(slot == 2)
{
if(m_advanced)
util::stream_format(stream, "@h'%06x", s32(s16(opcodes.r16(epc-4))) & 0xffffff);
diff --git a/src/devices/cpu/h8/h8h.cpp b/src/devices/cpu/h8/h8h.cpp
index 80ddd60c824..83801facdf8 100644
--- a/src/devices/cpu/h8/h8h.cpp
+++ b/src/devices/cpu/h8/h8h.cpp
@@ -4,7 +4,7 @@
#include "h8h.h"
#include "h8hd.h"
-h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) :
+h8h_device::h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) :
h8_device(mconfig, type, tag, owner, clock, map_delegate)
{
m_supports_advanced = true;
diff --git a/src/devices/cpu/h8/h8h.h b/src/devices/cpu/h8/h8h.h
index eff0b712300..0c4d6e277ea 100644
--- a/src/devices/cpu/h8/h8h.h
+++ b/src/devices/cpu/h8/h8h.h
@@ -20,54 +20,57 @@
class h8h_device : public h8_device {
protected:
- h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
+ h8h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate);
+
+ virtual u32 execute_min_cycles() const noexcept override { return 2; }
+ virtual u32 execute_max_cycles() const noexcept override { return 20; }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- inline void r32_w(int reg, uint32_t val) { m_R[reg & 7] = val; m_R[(reg & 7) | 8] = val >> 16; }
- inline uint32_t r32_r(int reg) const { return m_R[reg & 7] | (m_R[(reg & 7) | 8] << 16); }
+ inline void r32_w(int reg, u32 val) { m_R[reg & 7] = val; m_R[(reg & 7) | 8] = val >> 16; }
+ inline u32 r32_r(int reg) const { return m_R[reg & 7] | (m_R[(reg & 7) | 8] << 16); }
#define O(o) void o ## _full(); void o ## _partial()
- O(add_l_r32h_r32l); O(add_l_imm32_r32l);
+ O(add_w_imm16_r16l); O(add_l_r32h_r32l); O(add_l_imm32_r32l);
O(adds_l_four_r32l); O(adds_l_one_r32l); O(adds_l_two_r32l);
- O(and_l_r32h_r32l); O(and_l_imm32_r32l); O(and_w_r16h_r16l);
- O(band_imm3_abs32); O(band_imm3_r32ihh);
+ O(and_w_imm16_r16l); O(and_l_r32h_r32l); O(and_l_imm32_r32l); O(and_w_r16h_r16l);
+ O(band_imm3_r32ihh);
O(bcc_rel16);
- O(bclr_imm3_abs32); O(bclr_imm3_r32ihh); O(bclr_r8h_abs32); O(bclr_r8h_r32ihh);
+ O(bclr_imm3_r32ihh); O(bclr_r8h_r32ihh);
O(bcs_rel16);
O(beq_rel16);
O(bf_rel16);
O(bge_rel16);
O(bgt_rel16);
O(bhi_rel16);
- O(biand_imm3_abs32); O(biand_imm3_r32ihh);
- O(bild_imm3_abs32); O(bild_imm3_r32ihh);
- O(bior_imm3_abs32); O(bior_imm3_r32ihh);
- O(bist_imm3_abs32); O(bist_imm3_r32ihh);
- O(bixor_imm3_abs32); O(bixor_imm3_r32ihh);
- O(bld_imm3_abs32); O(bld_imm3_r32ihh);
+ O(biand_imm3_r32ihh);
+ O(bild_imm3_r32ihh);
+ O(bior_imm3_r32ihh);
+ O(bist_imm3_r32ihh);
+ O(bixor_imm3_r32ihh);
+ O(bld_imm3_r32ihh);
O(ble_rel16);
O(bls_rel16);
O(blt_rel16);
O(bmi_rel16);
O(bne_rel16);
- O(bnot_imm3_abs32); O(bnot_imm3_r32ihh); O(bnot_r8h_abs32); O(bnot_r8h_r32ihh);
- O(bor_imm3_abs32); O(bor_imm3_r32ihh);
+ O(bnot_imm3_r32ihh); O(bnot_r8h_r32ihh);
+ O(bor_imm3_r32ihh);
O(bpl_rel16);
- O(bset_imm3_abs32); O(bset_imm3_r32ihh); O(bset_r8h_abs32); O(bset_r8h_r32ihh);
+ O(bset_imm3_r32ihh); O(bset_r8h_r32ihh);
O(bsr_rel16); O(bsr_rel8);
- O(bst_imm3_abs32); O(bst_imm3_r32ihh);
+ O(bst_imm3_r32ihh);
O(bt_rel16);
- O(btst_imm3_abs32); O(btst_imm3_r32ihh); O(btst_r8h_abs32); O(btst_r8h_r32ihh);
+ O(btst_imm3_r32ihh); O(btst_r8h_r32ihh);
O(bvc_rel16);
O(bvs_rel16);
- O(bxor_imm3_abs32); O(bxor_imm3_r32ihh);
- O(cmp_l_r32h_r32l); O(cmp_l_imm32_r32l);
- O(dec_l_one_r32l); O(dec_l_two_r32l);
+ O(bxor_imm3_r32ihh);
+ O(cmp_w_imm16_r16l); O(cmp_l_r32h_r32l); O(cmp_l_imm32_r32l);
+ O(dec_w_one_r16l); O(dec_w_two_r16l); O(dec_l_one_r32l); O(dec_l_two_r32l);
O(divxs_b_r8h_r16l); O(divxs_w_r16h_r32l);
O(divxu_w_r16h_r32l);
O(eepmov_b); O(eepmov_w);
@@ -84,7 +87,7 @@ protected:
O(mulxu_w_r16h_r32l);
O(neg_l_r32l); O(neg_w_r16l);
O(not_l_r32l); O(not_w_r16l);
- O(or_l_r32h_r32l); O(or_l_imm32_r32l); O(or_w_r16h_r16l);
+ O(or_w_imm16_r16l); O(or_l_r32h_r32l); O(or_l_imm32_r32l); O(or_w_r16h_r16l);
O(rotl_l_r32l); O(rotl_w_r16l);
O(rotr_l_r32l); O(rotr_w_r16l);
O(rotxl_l_r32l); O(rotxl_w_r16l);
@@ -96,10 +99,10 @@ protected:
O(shll_l_r32l); O(shll_w_r16l);
O(shlr_l_r32l); O(shlr_w_r16l);
O(stc_w_ccr_abs16); O(stc_w_ccr_abs32); O(stc_w_ccr_pr32h); O(stc_w_ccr_r32d16h); O(stc_w_ccr_r32d32hh); O(stc_w_ccr_r32ih);
- O(sub_l_r32h_r32l); O(sub_l_imm32_r32l);
+ O(sub_w_imm16_r16l); O(sub_l_r32h_r32l); O(sub_l_imm32_r32l);
O(subs_l_four_r32l); O(subs_l_one_r32l); O(subs_l_two_r32l);
O(trapa_imm2);
- O(xor_l_r32h_r32l); O(xor_l_imm32_r32l); O(xor_w_r16h_r16l);
+ O(xor_w_imm16_r16l); O(xor_l_r32h_r32l); O(xor_l_imm32_r32l); O(xor_w_r16h_r16l);
O(state_irq);
#undef O
diff --git a/src/devices/cpu/h8/h8hd.cpp b/src/devices/cpu/h8/h8hd.cpp
index ee3a1d4b4a2..acc0f307612 100644
--- a/src/devices/cpu/h8/h8hd.cpp
+++ b/src/devices/cpu/h8/h8hd.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- h8d.h
+ h8hd.cpp
H8-300H base cpu emulation, disassembler
diff --git a/src/devices/cpu/h8/h8s2000.cpp b/src/devices/cpu/h8/h8s2000.cpp
index e7b87d7963d..b8e8f18e8c6 100644
--- a/src/devices/cpu/h8/h8s2000.cpp
+++ b/src/devices/cpu/h8/h8s2000.cpp
@@ -4,7 +4,7 @@
#include "h8s2000.h"
#include "h8s2000d.h"
-h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) :
+h8s2000_device::h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) :
h8h_device(mconfig, type, tag, owner, clock, map_delegate)
{
m_has_exr = true;
diff --git a/src/devices/cpu/h8/h8s2000.h b/src/devices/cpu/h8/h8s2000.h
index 8f7721928c3..ac41b1db6e9 100644
--- a/src/devices/cpu/h8/h8s2000.h
+++ b/src/devices/cpu/h8/h8s2000.h
@@ -22,7 +22,10 @@
class h8s2000_device : public h8h_device {
protected:
- h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
+ h8s2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate);
+
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 19; }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -30,7 +33,22 @@ protected:
virtual void do_exec_partial() override;
#define O(o) void o ## _full(); void o ## _partial()
+
O(andc_imm8_exr);
+ O(band_imm3_abs16); O(band_imm3_abs32);
+ O(bclr_imm3_abs16); O(bclr_r8h_abs16); O(bclr_imm3_abs32); O(bclr_r8h_abs32);
+ O(biand_imm3_abs16); O(biand_imm3_abs32);
+ O(bild_imm3_abs16); O(bild_imm3_abs32);
+ O(bior_imm3_abs16); O(bior_imm3_abs32);
+ O(bist_imm3_abs16); O(bist_imm3_abs32);
+ O(bixor_imm3_abs16); O(bixor_imm3_abs32);
+ O(bld_imm3_abs16); O(bld_imm3_abs32);
+ O(bnot_imm3_abs16); O(bnot_r8h_abs16); O(bnot_imm3_abs32); O(bnot_r8h_abs32);
+ O(bor_imm3_abs16); O(bor_imm3_abs32);
+ O(bset_imm3_abs16); O(bset_r8h_abs16); O(bset_imm3_abs32); O(bset_r8h_abs32);
+ O(bst_imm3_abs16); O(bst_imm3_abs32);
+ O(btst_imm3_abs16); O(btst_r8h_abs16); O(btst_imm3_abs32); O(btst_r8h_abs32);
+ O(bxor_imm3_abs16); O(bxor_imm3_abs32);
O(ldc_imm8_exr); O(ldc_r8l_exr); O(ldc_w_abs16_exr); O(ldc_w_abs32_exr); O(ldc_w_r32d16h_exr); O(ldc_w_r32d32hh_exr); O(ldc_w_r32ih_exr); O(ldc_w_r32ph_exr);
O(ldm_l_spp_r32n2l); O(ldm_l_spp_r32n3l); O(ldm_l_spp_r32n4l);
O(orc_imm8_exr);
diff --git a/src/devices/cpu/h8/h8s2000d.cpp b/src/devices/cpu/h8/h8s2000d.cpp
index e85643b3cbe..62ddf49d8cc 100644
--- a/src/devices/cpu/h8/h8s2000d.cpp
+++ b/src/devices/cpu/h8/h8s2000d.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- h8d.h
+ h8s2000d.cpp
H8S-2000 base cpu emulation, disassembler
diff --git a/src/devices/cpu/h8/h8s2245.cpp b/src/devices/cpu/h8/h8s2245.cpp
index df6f84e56e2..12e22b5dc90 100644
--- a/src/devices/cpu/h8/h8s2245.cpp
+++ b/src/devices/cpu/h8/h8s2245.cpp
@@ -9,7 +9,7 @@ DEFINE_DEVICE_TYPE(H8S2245, h8s2245_device, "h8s2245", "Hitachi H8S/2245")
DEFINE_DEVICE_TYPE(H8S2246, h8s2246_device, "h8s2246", "Hitachi H8S/2246")
-h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2245_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -38,22 +38,22 @@ h8s2245_device::h8s2245_device(const machine_config &mconfig, device_type type,
{
}
-h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2245_device::h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2245_device(mconfig, H8S2245, tag, owner, clock, 0xffec00)
{
}
-h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2241_device::h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2245_device(mconfig, H8S2241, tag, owner, clock, 0xffec00)
{
}
-h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2242_device::h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2245_device(mconfig, H8S2242, tag, owner, clock, 0xffdc00)
{
}
-h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2246_device::h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2245_device(mconfig, H8S2246, tag, owner, clock, 0xffdc00)
{
}
@@ -62,19 +62,18 @@ void h8s2245_device::map(address_map &map)
{
map(m_ram_start, 0xfffbff).ram();
- map(0xfffeb0, 0xfffeb0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(0xfffeb1, 0xfffeb1).w(m_port2, FUNC(h8_port_device::ddr_w));
- map(0xfffeb2, 0xfffeb2).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(0xfffeb4, 0xfffeb4).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(0xfffeb9, 0xfffeb9).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(0xfffeba, 0xfffeba).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(0xfffebb, 0xfffebb).w(m_portc, FUNC(h8_port_device::ddr_w));
- map(0xfffebc, 0xfffebc).w(m_portd, FUNC(h8_port_device::ddr_w));
- map(0xfffebd, 0xfffebd).w(m_porte, FUNC(h8_port_device::ddr_w));
- map(0xfffebe, 0xfffebe).w(m_portf, FUNC(h8_port_device::ddr_w));
- map(0xfffebf, 0xfffebf).w(m_portg, FUNC(h8_port_device::ddr_w));
- map(0xfffec0, 0xfffec1).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
- map(0xfffec2, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
+ map(0xfffeb0, 0xfffeb0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb1, 0xfffeb1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb2, 0xfffeb2).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb4, 0xfffeb4).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb9, 0xfffeb9).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeba, 0xfffeba).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebb, 0xfffebb).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebc, 0xfffebc).rw(m_portd, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebd, 0xfffebd).rw(m_porte, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebe, 0xfffebe).rw(m_portf, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebf, 0xfffebf).rw(m_portg, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffec0, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
map(0xffff2c, 0xffff2c).rw(m_intc, FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
map(0xffff2d, 0xffff2d).rw(m_intc, FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
map(0xffff2e, 0xffff2e).rw(m_intc, FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
@@ -190,36 +189,36 @@ void h8s2245_device::device_add_mconfig(machine_config &config)
H8_PORT(config, m_porte, *this, h8_device::PORT_E, 0x00, 0x00);
H8_PORT(config, m_portf, *this, h8_device::PORT_F, 0x00, 0x00);
H8_PORT(config, m_portg, *this, h8_device::PORT_G, 0xe0, 0x00);
- H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
- H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
H8_TIMER16(config, m_timer16, *this, 3, 0x00);
H8S_TIMER16_CHANNEL(config, m_timer16_0, *this, 4, 0x60, m_intc, 32,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::INPUT_D);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::INPUT_D);
H8S_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 0x4c, m_intc, 40,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
H8S_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 0x4c, m_intc, 44,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_1024);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
@@ -282,9 +281,9 @@ void h8s2245_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h8s2245_device::internal_update(uint64_t current_time)
+void h8s2245_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -300,10 +299,27 @@ void h8s2245_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h8s2245_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_sci[2]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h8s2245_device::device_start()
{
h8s2000_device::device_start();
m_dtc_device = m_dtc;
+
+ save_item(NAME(m_syscr));
+ save_item(NAME(m_mstpcr));
}
void h8s2245_device::device_reset()
@@ -313,26 +329,26 @@ void h8s2245_device::device_reset()
m_mstpcr = 0x3fff;
}
-uint8_t h8s2245_device::syscr_r()
+u8 h8s2245_device::syscr_r()
{
return m_syscr;
}
-void h8s2245_device::syscr_w(uint8_t data)
+void h8s2245_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
logerror("syscr = %02x\n", data);
}
-uint16_t h8s2245_device::mstpcr_r()
+u16 h8s2245_device::mstpcr_r()
{
return m_mstpcr;
}
-void h8s2245_device::mstpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+void h8s2245_device::mstpcr_w(offs_t offset, u16 data, u16 mem_mask)
{
- uint16_t omstpcr = m_mstpcr;
+ u16 omstpcr = m_mstpcr;
COMBINE_DATA(&m_mstpcr);
if((omstpcr ^ m_mstpcr) & 0x72e0) {
std::ostringstream message;
diff --git a/src/devices/cpu/h8/h8s2245.h b/src/devices/cpu/h8/h8s2245.h
index 1214d022034..5f2d489a7b7 100644
--- a/src/devices/cpu/h8/h8s2245.h
+++ b/src/devices/cpu/h8/h8s2245.h
@@ -35,7 +35,7 @@
class h8s2245_device : public h8s2000_device {
public:
- h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -61,10 +61,10 @@ public:
auto read_portg() { return m_read_port [PORT_G].bind(); }
auto write_portg() { return m_write_port[PORT_G].bind(); }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
- uint16_t mstpcr_r();
- void mstpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
+ u8 syscr_r();
+ void syscr_w(u8 data);
+ u16 mstpcr_r();
+ void mstpcr_w(offs_t offset, u16 data, u16 mem_mask = ~0);
protected:
required_device<h8s_intc_device> m_intc;
@@ -90,39 +90,40 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_2;
required_device<h8_watchdog_device> m_watchdog;
- uint32_t m_ram_start;
- uint16_t m_mstpcr;
- uint8_t m_syscr;
+ u32 m_ram_start;
+ u16 m_mstpcr;
+ u8 m_syscr;
- h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h8s2245_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
virtual void interrupt_taken() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h8s2241_device : public h8s2245_device {
public:
- h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2242_device : public h8s2245_device {
public:
- h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2242_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2246_device : public h8s2245_device {
public:
- h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2246_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H8S2241, h8s2241_device)
diff --git a/src/devices/cpu/h8/h8s2319.cpp b/src/devices/cpu/h8/h8s2319.cpp
new file mode 100644
index 00000000000..7b650cdb895
--- /dev/null
+++ b/src/devices/cpu/h8/h8s2319.cpp
@@ -0,0 +1,473 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h8s2319.cpp
+
+ H8S-2319 family emulation
+
+***************************************************************************/
+
+#include "emu.h"
+#include "h8s2319.h"
+
+DEFINE_DEVICE_TYPE(H8S2310, h8s2310_device, "h8s2310", "Hitachi H8S/2310")
+DEFINE_DEVICE_TYPE(H8S2311, h8s2311_device, "h8s2311", "Hitachi H8S/2311")
+DEFINE_DEVICE_TYPE(H8S2312, h8s2312_device, "h8s2312", "Hitachi H8S/2312")
+DEFINE_DEVICE_TYPE(H8S2313, h8s2313_device, "h8s2313", "Hitachi H8S/2313")
+DEFINE_DEVICE_TYPE(H8S2315, h8s2315_device, "h8s2315", "Hitachi H8S/2315")
+DEFINE_DEVICE_TYPE(H8S2316, h8s2316_device, "h8s2316", "Hitachi H8S/2316")
+DEFINE_DEVICE_TYPE(H8S2317, h8s2317_device, "h8s2317", "Hitachi H8S/2317")
+DEFINE_DEVICE_TYPE(H8S2318, h8s2318_device, "h8s2318", "Hitachi H8S/2318")
+DEFINE_DEVICE_TYPE(H8S2319, h8s2319_device, "h8s2319", "Hitachi H8S/2319")
+
+
+h8s2319_device::h8s2319_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate, u32 rom_size, u32 ram_size) :
+ h8s2000_device(mconfig, type, tag, owner, clock, map_delegate),
+ m_intc(*this, "intc"),
+ m_adc(*this, "adc"),
+ m_dtc(*this, "dtc"),
+ m_portn(*this, "port%u", 1),
+ m_porta(*this, "port%c", 'a'),
+ m_timer8(*this, "timer8_%u", 0),
+ m_timer16(*this, "timer16"),
+ m_timer16c(*this, "timer16:%u", 0),
+ m_watchdog(*this, "watchdog"),
+ m_ram_view(*this, "ram_view"),
+ m_rom_size(rom_size),
+ m_ram_size(ram_size),
+ m_md(rom_size ? 7 : 4)
+{
+}
+
+h8s2319_device::h8s2319_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ h8s2319_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2319_device::map), this), rom_size, ram_size)
+{
+}
+
+h8s2319_device::h8s2319_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2319, tag, owner, clock, 0x80000, 0x2000)
+{
+}
+
+h8s2310_device::h8s2310_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2310, tag, owner, clock, 0, 0x800)
+{
+}
+
+h8s2311_device::h8s2311_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2311, tag, owner, clock, 0x8000, 0x800)
+{
+}
+
+h8s2312_device::h8s2312_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2312, tag, owner, clock, 0, 0x2000)
+{
+}
+
+h8s2313_device::h8s2313_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2313, tag, owner, clock, 0x10000, 0x800)
+{
+}
+
+h8s2315_device::h8s2315_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2315, tag, owner, clock, 0x60000, 0x2000)
+{
+}
+
+h8s2316_device::h8s2316_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2316, tag, owner, clock, 0x10000, 0x2000)
+{
+}
+
+h8s2317_device::h8s2317_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2317, tag, owner, clock, 0x20000, 0x2000)
+{
+}
+
+h8s2318_device::h8s2318_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2319_device(mconfig, H8S2318, tag, owner, clock, 0x40000, 0x2000)
+{
+}
+
+void h8s2319_device::map(address_map &map)
+{
+ if(m_rom_size && m_md >= 6)
+ map(0x000000, m_rom_size - 1).rom();
+
+ map(0xfffc00 - m_ram_size, 0xfffbff).view(m_ram_view);
+ m_ram_view[0](0xfffc00 - m_ram_size, 0xfffbff).ram().share(m_internal_ram);
+
+ map(0xfffe80, 0xfffe80).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xfffe81, 0xfffe81).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xfffe82, 0xfffe83).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xfffe84, 0xfffe84).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xfffe85, 0xfffe85).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xfffe86, 0xfffe87).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xfffe88, 0xfffe8f).rw(m_timer16c[3], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+ map(0xfffe90, 0xfffe90).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xfffe91, 0xfffe91).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xfffe92, 0xfffe92).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xfffe94, 0xfffe94).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xfffe95, 0xfffe95).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xfffe96, 0xfffe97).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xfffe98, 0xfffe9b).rw(m_timer16c[4], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+ map(0xfffea0, 0xfffea0).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xfffea1, 0xfffea1).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xfffea2, 0xfffea2).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xfffea4, 0xfffea4).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xfffea5, 0xfffea5).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xfffea6, 0xfffea7).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xfffea8, 0xfffeab).rw(m_timer16c[5], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+
+ map(0xfffeb0, 0xfffeb0).rw(m_portn[0], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb1, 0xfffeb1).rw(m_portn[1], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb2, 0xfffeb2).rw(m_portn[2], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb9, 0xfffeb9).rw(m_porta[0], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeba, 0xfffeba).rw(m_porta[1], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebb, 0xfffebb).rw(m_porta[2], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebc, 0xfffebc).rw(m_porta[3], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebd, 0xfffebd).rw(m_porta[4], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebe, 0xfffebe).rw(m_porta[5], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebf, 0xfffebf).rw(m_porta[6], FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+
+ map(0xfffec4, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
+ map(0xffff2c, 0xffff2c).rw(m_intc, FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
+ map(0xffff2d, 0xffff2d).rw(m_intc, FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
+ map(0xffff2e, 0xffff2e).rw(m_intc, FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
+ map(0xffff2f, 0xffff2f).rw(m_intc, FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
+ map(0xffff30, 0xffff34).rw(m_dtc, FUNC(h8_dtc_device::dtcer_r), FUNC(h8_dtc_device::dtcer_w));
+ map(0xffff37, 0xffff37).rw(m_dtc, FUNC(h8_dtc_device::dtvecr_r), FUNC(h8_dtc_device::dtvecr_w));
+ map(0xffff38, 0xffff38).rw(FUNC(h8s2319_device::sbycr_r), FUNC(h8s2319_device::sbycr_w));
+ map(0xffff39, 0xffff39).rw(FUNC(h8s2319_device::syscr_r), FUNC(h8s2319_device::syscr_w));
+ map(0xffff3b, 0xffff3b).r(FUNC(h8s2319_device::mdcr_r));
+
+ map(0xffff50, 0xffff50).r(m_portn[0], FUNC(h8_port_device::port_r));
+ map(0xffff51, 0xffff51).r(m_portn[1], FUNC(h8_port_device::port_r));
+ map(0xffff52, 0xffff52).r(m_portn[2], FUNC(h8_port_device::port_r));
+ map(0xffff53, 0xffff53).r(m_portn[3], FUNC(h8_port_device::port_r));
+ map(0xffff59, 0xffff59).r(m_porta[0], FUNC(h8_port_device::port_r));
+ map(0xffff5a, 0xffff5a).r(m_porta[1], FUNC(h8_port_device::port_r));
+ map(0xffff5b, 0xffff5b).r(m_porta[2], FUNC(h8_port_device::port_r));
+ map(0xffff5c, 0xffff5c).r(m_porta[3], FUNC(h8_port_device::port_r));
+ map(0xffff5d, 0xffff5d).r(m_porta[4], FUNC(h8_port_device::port_r));
+ map(0xffff5e, 0xffff5e).r(m_porta[5], FUNC(h8_port_device::port_r));
+ map(0xffff5f, 0xffff5f).r(m_porta[6], FUNC(h8_port_device::port_r));
+ map(0xffff60, 0xffff60).rw(m_portn[0], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff61, 0xffff61).rw(m_portn[1], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff62, 0xffff62).rw(m_portn[2], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff69, 0xffff69).rw(m_porta[0], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6a, 0xffff6a).rw(m_porta[1], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6b, 0xffff6b).rw(m_porta[2], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6c, 0xffff6c).rw(m_porta[3], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6d, 0xffff6d).rw(m_porta[4], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6e, 0xffff6e).rw(m_porta[5], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff6f, 0xffff6f).rw(m_porta[6], FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff70, 0xffff70).rw(m_porta[0], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffff71, 0xffff71).rw(m_porta[1], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffff72, 0xffff72).rw(m_porta[2], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffff73, 0xffff73).rw(m_porta[3], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffff74, 0xffff74).rw(m_porta[4], FUNC(h8_port_device::pcr_r), FUNC(h8_port_device::pcr_w));
+ map(0xffff76, 0xffff76).rw(m_portn[2], FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
+ map(0xffff77, 0xffff77).rw(m_porta[0], FUNC(h8_port_device::odr_r), FUNC(h8_port_device::odr_w));
+
+ map(0xffff78, 0xffff78).rw(m_sci[0], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffff79, 0xffff79).rw(m_sci[0], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffff7a, 0xffff7a).rw(m_sci[0], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffff7b, 0xffff7b).rw(m_sci[0], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffff7c, 0xffff7c).rw(m_sci[0], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffff7d, 0xffff7d).r(m_sci[0], FUNC(h8_sci_device::rdr_r));
+ map(0xffff7e, 0xffff7e).rw(m_sci[0], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
+ map(0xffff80, 0xffff80).rw(m_sci[1], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffff81, 0xffff81).rw(m_sci[1], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffff82, 0xffff82).rw(m_sci[1], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffff83, 0xffff83).rw(m_sci[1], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffff84, 0xffff84).rw(m_sci[1], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffff85, 0xffff85).r(m_sci[1], FUNC(h8_sci_device::rdr_r));
+ map(0xffff86, 0xffff86).rw(m_sci[1], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
+
+ map(0xffff90, 0xffff97).r(m_adc, FUNC(h8_adc_device::addr8_r));
+ map(0xffff98, 0xffff98).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
+ map(0xffff99, 0xffff99).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
+
+ map(0xffffb0, 0xffffb0).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffffb1, 0xffffb1).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
+ map(0xffffb2, 0xffffb2).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffffb3, 0xffffb3).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
+ map(0xffffb4, 0xffffb7).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0xff00);
+ map(0xffffb4, 0xffffb7).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcor_r), FUNC(h8_timer8_channel_device::tcor_w)).umask16(0x00ff);
+ map(0xffffb8, 0xffffb8).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+ map(0xffffb9, 0xffffb9).rw(m_timer8[1], FUNC(h8_timer8_channel_device::tcnt_r), FUNC(h8_timer8_channel_device::tcnt_w));
+
+ map(0xffffbc, 0xffffbd).rw(m_watchdog, FUNC(h8_watchdog_device::wd_r), FUNC(h8_watchdog_device::wd_w));
+ map(0xffffbe, 0xffffbf).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
+ map(0xffffc0, 0xffffc0).rw(m_timer16, FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
+ map(0xffffc1, 0xffffc1).rw(m_timer16, FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
+
+ map(0xffffd0, 0xffffd0).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xffffd1, 0xffffd1).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xffffd2, 0xffffd3).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xffffd4, 0xffffd4).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xffffd5, 0xffffd5).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xffffd6, 0xffffd7).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xffffd8, 0xffffdf).rw(m_timer16c[0], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+ map(0xffffe0, 0xffffe0).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xffffe1, 0xffffe1).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xffffe2, 0xffffe2).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xffffe4, 0xffffe4).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xffffe5, 0xffffe5).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xffffe6, 0xffffe7).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xffffe8, 0xffffeb).rw(m_timer16c[1], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+ map(0xfffff0, 0xfffff0).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
+ map(0xfffff1, 0xfffff1).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
+ map(0xfffff2, 0xfffff2).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
+ map(0xfffff4, 0xfffff4).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tier_r), FUNC(h8_timer16_channel_device::tier_w));
+ map(0xfffff5, 0xfffff5).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
+ map(0xfffff6, 0xfffff7).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
+ map(0xfffff8, 0xfffffb).rw(m_timer16c[2], FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
+}
+
+void h8s2319_device::device_add_mconfig(machine_config &config)
+{
+ H8S_INTC(config, m_intc, *this);
+ H8_ADC_2319(config, m_adc, *this, m_intc, 28);
+ H8_DTC(config, m_dtc, *this, m_intc, 24);
+ H8_PORT(config, m_portn[0], *this, h8_device::PORT_1, 0x00, 0x00);
+ H8_PORT(config, m_portn[1], *this, h8_device::PORT_2, 0x00, 0x00);
+ H8_PORT(config, m_portn[2], *this, h8_device::PORT_3, 0x00, 0xc0);
+ H8_PORT(config, m_portn[3], *this, h8_device::PORT_4, 0x00, 0x00);
+ H8_PORT(config, m_porta[0], *this, h8_device::PORT_A, 0x00, 0xf0);
+ H8_PORT(config, m_porta[1], *this, h8_device::PORT_B, 0x00, 0x00);
+ H8_PORT(config, m_porta[2], *this, h8_device::PORT_C, 0x00, 0x00);
+ H8_PORT(config, m_porta[3], *this, h8_device::PORT_D, 0x00, 0x00);
+ H8_PORT(config, m_porta[4], *this, h8_device::PORT_E, 0x00, 0x00);
+ H8_PORT(config, m_porta[5], *this, h8_device::PORT_F, 0x00, 0x00);
+ H8_PORT(config, m_porta[6], *this, h8_device::PORT_G, 0x00, 0xe0);
+ H8H_TIMER8_CHANNEL(config, m_timer8[0], *this, m_intc, 64, 65, 66, m_timer8[1], h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8[1], *this, m_intc, 68, 69, 70, m_timer8[0], h8_timer8_channel_device::CHAIN_A, false, false);
+ H8_TIMER16(config, m_timer16, *this, 6, 0x00);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[0], *this, 4, 0x60, m_intc, 32,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::INPUT_D);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[1], *this, 2, 0x4c, m_intc, 40,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16c[2]);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[2], *this, 2, 0x4c, m_intc, 44,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[3], *this, 4, 0x60, m_intc, 48,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::DIV_4096);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[4], *this, 2, 0x4c, m_intc, 56,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16c[5]);
+ H8S_TIMER16_CHANNEL(config, m_timer16c[5], *this, 2, 0x4c, m_intc, 60,
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::INPUT_D);
+ H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
+ H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
+ H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S);
+}
+
+void h8s2319_device::execute_set_input(int inputnum, int state)
+{
+ m_intc->set_input(inputnum, state);
+}
+
+bool h8s2319_device::exr_in_stack() const
+{
+ return m_syscr & 0x20;
+}
+
+int h8s2319_device::trace_setup()
+{
+ m_CCR |= F_I;
+ m_EXR &= ~EXR_T;
+ return 5;
+}
+
+int h8s2319_device::trapa_setup()
+{
+ m_CCR |= F_I;
+ if(m_syscr & 0x20)
+ m_EXR &= ~EXR_T;
+ return 8;
+}
+
+void h8s2319_device::irq_setup()
+{
+ switch(m_syscr & 0x30) {
+ case 0x00:
+ m_CCR |= F_I;
+ break;
+ case 0x20:
+ m_EXR = m_EXR & (EXR_NC);
+ if(m_taken_irq_level == 8)
+ m_EXR |= 7;
+ else
+ m_EXR |= m_taken_irq_level;
+ break;
+ }
+}
+
+void h8s2319_device::update_irq_filter()
+{
+ switch(m_syscr & 0x30) {
+ case 0x00:
+ if(m_CCR & F_I)
+ m_intc->set_filter(2, -1);
+ else
+ m_intc->set_filter(0, -1);
+ break;
+ case 0x20:
+ m_intc->set_filter(0, m_EXR & 7);
+ break;
+ }
+}
+
+void h8s2319_device::interrupt_taken()
+{
+ standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
+}
+
+void h8s2319_device::internal_update(u64 current_time)
+{
+ u64 event_time = 0;
+
+ add_event(event_time, m_adc->internal_update(current_time));
+ add_event(event_time, m_sci[0]->internal_update(current_time));
+ add_event(event_time, m_sci[1]->internal_update(current_time));
+
+ // SCI2 used by H8S-2329
+ if(m_sci[2])
+ add_event(event_time, m_sci[2]->internal_update(current_time));
+
+ add_event(event_time, m_timer8[0]->internal_update(current_time));
+ add_event(event_time, m_timer8[1]->internal_update(current_time));
+ add_event(event_time, m_timer16c[0]->internal_update(current_time));
+ add_event(event_time, m_timer16c[1]->internal_update(current_time));
+ add_event(event_time, m_timer16c[2]->internal_update(current_time));
+ add_event(event_time, m_timer16c[3]->internal_update(current_time));
+ add_event(event_time, m_timer16c[4]->internal_update(current_time));
+ add_event(event_time, m_timer16c[5]->internal_update(current_time));
+ add_event(event_time, m_watchdog->internal_update(current_time));
+
+ recompute_bcount(event_time);
+}
+
+void h8s2319_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_timer8[0]->notify_standby(state);
+ m_timer8[1]->notify_standby(state);
+
+ for (auto & timer16c : m_timer16c)
+ timer16c->notify_standby(state);
+
+ m_watchdog->notify_standby(state);
+}
+
+void h8s2319_device::device_start()
+{
+ h8s2000_device::device_start();
+ m_dtc_device = m_dtc;
+
+ m_sbycr = 0;
+ m_syscr = 0;
+
+ save_item(NAME(m_md));
+ save_item(NAME(m_sbycr));
+ save_item(NAME(m_syscr));
+}
+
+void h8s2319_device::device_reset()
+{
+ h8s2000_device::device_reset();
+
+ m_sbycr = 0x08;
+ m_syscr = 0x01;
+ m_ram_view.select(0);
+}
+
+u8 h8s2319_device::sbycr_r()
+{
+ return m_sbycr;
+}
+
+void h8s2319_device::sbycr_w(u8 data)
+{
+ logerror("sbycr = %02x\n", data);
+
+ // SSBY
+ m_standby_pending = bool(data & 0x80);
+
+ m_sbycr = data & 0xf9;
+}
+
+u8 h8s2319_device::syscr_r()
+{
+ return m_syscr;
+}
+
+void h8s2319_device::syscr_w(u8 data)
+{
+ logerror("syscr = %02x\n", data);
+
+ // RAME
+ if(data & 1)
+ m_ram_view.select(0);
+ else
+ m_ram_view.disable();
+
+ // NMIEG
+ m_intc->set_nmi_edge(BIT(data, 3));
+
+ // INTM0/1
+ m_syscr = data;
+ update_irq_filter();
+}
+
+u8 h8s2319_device::mdcr_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("mdcr_r\n");
+ return (m_md & 0x07) | 0x80;
+}
diff --git a/src/devices/cpu/h8/h8s2319.h b/src/devices/cpu/h8/h8s2319.h
new file mode 100644
index 00000000000..6b82f963afc
--- /dev/null
+++ b/src/devices/cpu/h8/h8s2319.h
@@ -0,0 +1,164 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert, hap
+/***************************************************************************
+
+ h8s2319.h
+
+ H8S-2319 family emulation
+
+ H8S/2000-based mcus.
+
+ Variant ROM RAM
+ H8S/2310 - 2K
+ H8S/2311 32K 2K
+ H8S/2312 - 8K
+ H8S/2313 64K 2K
+ H8S/2315 384K 8K
+ H8S/2316 64K 8K
+ H8S/2317 128K 8K
+ H8S/2318 256K 8K
+ H8S/2319 512K 8K
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_H8S2319_H
+#define MAME_CPU_H8_H8S2319_H
+
+#pragma once
+
+#include "h8s2000.h"
+#include "h8_intc.h"
+#include "h8_adc.h"
+#include "h8_dtc.h"
+#include "h8_port.h"
+#include "h8_timer8.h"
+#include "h8_timer16.h"
+#include "h8_sci.h"
+#include "h8_watchdog.h"
+
+class h8s2319_device : public h8s2000_device {
+public:
+ h8s2319_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // I/O ports
+ auto read_port1() { return m_read_port [PORT_1].bind(); }
+ auto write_port1() { return m_write_port[PORT_1].bind(); }
+ auto read_port2() { return m_read_port [PORT_2].bind(); }
+ auto write_port2() { return m_write_port[PORT_2].bind(); }
+ auto read_port3() { return m_read_port [PORT_3].bind(); }
+ auto write_port3() { return m_write_port[PORT_3].bind(); }
+ auto read_port4() { return m_read_port [PORT_4].bind(); }
+
+ auto read_porta() { return m_read_port [PORT_A].bind(); }
+ auto write_porta() { return m_write_port[PORT_A].bind(); }
+ auto read_portb() { return m_read_port [PORT_B].bind(); }
+ auto write_portb() { return m_write_port[PORT_B].bind(); }
+ auto read_portc() { return m_read_port [PORT_C].bind(); }
+ auto write_portc() { return m_write_port[PORT_C].bind(); }
+ auto read_portd() { return m_read_port [PORT_D].bind(); }
+ auto write_portd() { return m_write_port[PORT_D].bind(); }
+ auto read_porte() { return m_read_port [PORT_E].bind(); }
+ auto write_porte() { return m_write_port[PORT_E].bind(); }
+ auto read_portf() { return m_read_port [PORT_F].bind(); }
+ auto write_portf() { return m_write_port[PORT_F].bind(); }
+ auto read_portg() { return m_read_port [PORT_G].bind(); }
+ auto write_portg() { return m_write_port[PORT_G].bind(); }
+
+ // MD pins, default mode 7 (single chip), or mode 4 (ROMless)
+ void set_mode(u8 mode) { m_md = mode & 7; }
+
+ u8 sbycr_r();
+ void sbycr_w(u8 data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
+ u8 mdcr_r();
+
+protected:
+ required_device<h8s_intc_device> m_intc;
+ required_device<h8_adc_device> m_adc;
+ required_device<h8_dtc_device> m_dtc;
+ required_device_array<h8_port_device, 4> m_portn;
+ required_device_array<h8_port_device, 7> m_porta;
+ required_device_array<h8h_timer8_channel_device, 2> m_timer8;
+ required_device<h8_timer16_device> m_timer16;
+ required_device_array<h8s_timer16_channel_device, 6> m_timer16c;
+ required_device<h8_watchdog_device> m_watchdog;
+
+ memory_view m_ram_view;
+
+ u32 m_rom_size;
+ u32 m_ram_size;
+ u8 m_md;
+ u8 m_sbycr;
+ u8 m_syscr;
+
+ h8s2319_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate, u32 rom_size, u32 ram_size);
+ h8s2319_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ virtual bool exr_in_stack() const override;
+ virtual void update_irq_filter() override;
+ virtual void interrupt_taken() override;
+ virtual int trace_setup() override;
+ virtual int trapa_setup() override;
+ virtual void irq_setup() override;
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+};
+
+class h8s2310_device : public h8s2319_device {
+public:
+ h8s2310_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2311_device : public h8s2319_device {
+public:
+ h8s2311_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2312_device : public h8s2319_device {
+public:
+ h8s2312_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2313_device : public h8s2319_device {
+public:
+ h8s2313_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2315_device : public h8s2319_device {
+public:
+ h8s2315_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2316_device : public h8s2319_device {
+public:
+ h8s2316_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2317_device : public h8s2319_device {
+public:
+ h8s2317_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2318_device : public h8s2319_device {
+public:
+ h8s2318_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+DECLARE_DEVICE_TYPE(H8S2310, h8s2310_device)
+DECLARE_DEVICE_TYPE(H8S2311, h8s2311_device)
+DECLARE_DEVICE_TYPE(H8S2312, h8s2312_device)
+DECLARE_DEVICE_TYPE(H8S2313, h8s2313_device)
+DECLARE_DEVICE_TYPE(H8S2315, h8s2315_device)
+DECLARE_DEVICE_TYPE(H8S2316, h8s2316_device)
+DECLARE_DEVICE_TYPE(H8S2317, h8s2317_device)
+DECLARE_DEVICE_TYPE(H8S2318, h8s2318_device)
+DECLARE_DEVICE_TYPE(H8S2319, h8s2319_device)
+
+#endif // MAME_CPU_H8_H8S2319_H
diff --git a/src/devices/cpu/h8/h8s2320.h b/src/devices/cpu/h8/h8s2320.h
deleted file mode 100644
index 6bff8cfa28a..00000000000
--- a/src/devices/cpu/h8/h8s2320.h
+++ /dev/null
@@ -1,181 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-/***************************************************************************
-
- h8s2320.h
-
- H8S-2320 family emulation
-
- H8S/2600-based mcus.
-
- Variant ROM RAM
- H8S/2320 - 4K
- H8S/2321 - 4K
- H8S/2322 - 8K
- H8S/2323 32K 8K
- H8S/2324 - 32K
- H8S/2326 512K 8K
- H8S/2327 128K 8K
- H8S/2328 256K 8K
- H8S/2329 384K 32K
-
-
-
-***************************************************************************/
-
-#ifndef MAME_CPU_H8_H8S2320_H
-#define MAME_CPU_H8_H8S2320_H
-
-#pragma once
-
-#include "h8s2000.h"
-#include "h8_intc.h"
-#include "h8_adc.h"
-#include "h8_dma.h"
-#include "h8_dtc.h"
-#include "h8_port.h"
-#include "h8_timer8.h"
-#include "h8_timer16.h"
-#include "h8_sci.h"
-#include "h8_watchdog.h"
-
-class h8s2320_device : public h8s2000_device {
-public:
- h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
- auto read_port1() { return m_read_port [PORT_1].bind(); }
- auto write_port1() { return m_write_port[PORT_1].bind(); }
- auto read_port2() { return m_read_port [PORT_2].bind(); }
- auto write_port2() { return m_write_port[PORT_2].bind(); }
- auto read_port3() { return m_read_port [PORT_3].bind(); }
- auto write_port3() { return m_write_port[PORT_3].bind(); }
- auto read_port4() { return m_read_port [PORT_4].bind(); }
- auto read_port5() { return m_read_port [PORT_5].bind(); }
- auto write_port5() { return m_write_port[PORT_5].bind(); }
- auto read_port6() { return m_read_port [PORT_6].bind(); }
- auto write_port6() { return m_write_port[PORT_6].bind(); }
- auto read_porta() { return m_read_port [PORT_A].bind(); }
- auto write_porta() { return m_write_port[PORT_A].bind(); }
- auto read_portb() { return m_read_port [PORT_B].bind(); }
- auto write_portb() { return m_write_port[PORT_B].bind(); }
- auto read_portc() { return m_read_port [PORT_C].bind(); }
- auto write_portc() { return m_write_port[PORT_C].bind(); }
- auto read_portd() { return m_read_port [PORT_D].bind(); }
- auto write_portd() { return m_write_port[PORT_D].bind(); }
- auto read_porte() { return m_read_port [PORT_E].bind(); }
- auto write_porte() { return m_write_port[PORT_E].bind(); }
- auto read_portf() { return m_read_port [PORT_F].bind(); }
- auto write_portf() { return m_write_port[PORT_F].bind(); }
- auto read_portg() { return m_read_port [PORT_G].bind(); }
- auto write_portg() { return m_write_port[PORT_G].bind(); }
-
- auto tend0_cb() { return m_tend_cb[0].bind(); }
- auto tend1_cb() { return m_tend_cb[1].bind(); }
-
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
-
-protected:
- required_device<h8s_intc_device> m_intc;
- required_device<h8_adc_device> m_adc;
- optional_device<h8s_dma_device> m_dma;
- optional_device<h8s_dma_channel_device> m_dma0;
- optional_device<h8s_dma_channel_device> m_dma1;
- required_device<h8_dtc_device> m_dtc;
- required_device<h8_port_device> m_port1;
- required_device<h8_port_device> m_port2;
- required_device<h8_port_device> m_port3;
- required_device<h8_port_device> m_port4;
- required_device<h8_port_device> m_port5;
- required_device<h8_port_device> m_port6;
- required_device<h8_port_device> m_porta;
- required_device<h8_port_device> m_portb;
- required_device<h8_port_device> m_portc;
- required_device<h8_port_device> m_portd;
- required_device<h8_port_device> m_porte;
- required_device<h8_port_device> m_portf;
- required_device<h8_port_device> m_portg;
- required_device<h8h_timer8_channel_device> m_timer8_0;
- required_device<h8h_timer8_channel_device> m_timer8_1;
- required_device<h8_timer16_device> m_timer16;
- required_device<h8s_timer16_channel_device> m_timer16_0;
- required_device<h8s_timer16_channel_device> m_timer16_1;
- required_device<h8s_timer16_channel_device> m_timer16_2;
- required_device<h8s_timer16_channel_device> m_timer16_3;
- required_device<h8s_timer16_channel_device> m_timer16_4;
- required_device<h8s_timer16_channel_device> m_timer16_5;
- required_device<h8_watchdog_device> m_watchdog;
-
- devcb_write_line::array<2> m_tend_cb;
-
- uint32_t m_ram_start;
- uint8_t m_syscr;
-
- h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
-
- virtual bool exr_in_stack() const override;
- virtual void update_irq_filter() override;
- virtual void interrupt_taken() override;
- virtual int trace_setup() override;
- virtual int trapa_setup() override;
- virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
-
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void execute_set_input(int inputnum, int state) override;
-};
-
-class h8s2321_device : public h8s2320_device {
-public:
- h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2322_device : public h8s2320_device {
-public:
- h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2323_device : public h8s2320_device {
-public:
- h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2324_device : public h8s2320_device {
-public:
- h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2326_device : public h8s2320_device {
-public:
- h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2327_device : public h8s2320_device {
-public:
- h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2328_device : public h8s2320_device {
-public:
- h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class h8s2329_device : public h8s2320_device {
-public:
- h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-DECLARE_DEVICE_TYPE(H8S2320, h8s2320_device)
-DECLARE_DEVICE_TYPE(H8S2321, h8s2321_device)
-DECLARE_DEVICE_TYPE(H8S2322, h8s2322_device)
-DECLARE_DEVICE_TYPE(H8S2323, h8s2323_device)
-DECLARE_DEVICE_TYPE(H8S2324, h8s2324_device)
-DECLARE_DEVICE_TYPE(H8S2326, h8s2326_device)
-DECLARE_DEVICE_TYPE(H8S2327, h8s2327_device)
-DECLARE_DEVICE_TYPE(H8S2328, h8s2328_device)
-DECLARE_DEVICE_TYPE(H8S2329, h8s2329_device)
-
-#endif // MAME_CPU_H8_H8S2320_H
diff --git a/src/devices/cpu/h8/h8s2329.cpp b/src/devices/cpu/h8/h8s2329.cpp
new file mode 100644
index 00000000000..338d6733f40
--- /dev/null
+++ b/src/devices/cpu/h8/h8s2329.cpp
@@ -0,0 +1,179 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8s2329.cpp
+
+ H8S-2329 family emulation
+ Subdevice of h8s2319.cpp
+
+***************************************************************************/
+
+#include "emu.h"
+#include "h8s2329.h"
+
+DEFINE_DEVICE_TYPE(H8S2320, h8s2320_device, "h8s2320", "Hitachi H8S/2320")
+DEFINE_DEVICE_TYPE(H8S2321, h8s2321_device, "h8s2321", "Hitachi H8S/2321")
+DEFINE_DEVICE_TYPE(H8S2322, h8s2322_device, "h8s2322", "Hitachi H8S/2322")
+DEFINE_DEVICE_TYPE(H8S2323, h8s2323_device, "h8s2323", "Hitachi H8S/2323")
+DEFINE_DEVICE_TYPE(H8S2324, h8s2324_device, "h8s2324", "Hitachi H8S/2324")
+DEFINE_DEVICE_TYPE(H8S2326, h8s2326_device, "h8s2326", "Hitachi H8S/2326")
+DEFINE_DEVICE_TYPE(H8S2327, h8s2327_device, "h8s2327", "Hitachi H8S/2327")
+DEFINE_DEVICE_TYPE(H8S2328, h8s2328_device, "h8s2328", "Hitachi H8S/2328")
+DEFINE_DEVICE_TYPE(H8S2329, h8s2329_device, "h8s2329", "Hitachi H8S/2329")
+
+
+h8s2321_device::h8s2321_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate, u32 rom_size, u32 ram_size) :
+ h8s2319_device(mconfig, type, tag, owner, clock, map_delegate, rom_size, ram_size),
+ m_port5(*this, "port5"),
+ m_port6(*this, "port6")
+{
+}
+
+h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2321_device(mconfig, H8S2321, tag, owner, clock, address_map_constructor(FUNC(h8s2321_device::map_2321), this), 0, 0x1000)
+{
+}
+
+
+h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ h8s2321_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2320_device::map_2320), this), rom_size, ram_size),
+ m_dma(*this, "dma"),
+ m_dmac(*this, "dma:%u", 0),
+ m_tend_cb(*this)
+{
+}
+
+h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2320, tag, owner, clock, 0, 0x1000)
+{
+}
+
+
+h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2322, tag, owner, clock, 0, 0x2000)
+{
+}
+
+h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2323, tag, owner, clock, 0x8000, 0x2000)
+{
+}
+
+h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2324, tag, owner, clock, 0, 0x8000)
+{
+}
+
+h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2326, tag, owner, clock, 0x80000, 0x2000)
+{
+}
+
+h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2327, tag, owner, clock, 0x20000, 0x2000)
+{
+}
+
+h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2328, tag, owner, clock, 0x40000, 0x2000)
+{
+}
+
+h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ h8s2320_device(mconfig, H8S2329, tag, owner, clock, 0x60000, 0x8000)
+{
+}
+
+void h8s2321_device::map_2321(address_map &map)
+{
+ h8s2319_device::map(map);
+
+ map(0xfffeb4, 0xfffeb4).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb5, 0xfffeb5).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+
+ map(0xffff30, 0xffff35).rw(m_dtc, FUNC(h8_dtc_device::dtcer_r), FUNC(h8_dtc_device::dtcer_w));
+
+ map(0xffff54, 0xffff54).r(m_port5, FUNC(h8_port_device::port_r));
+ map(0xffff55, 0xffff55).r(m_port6, FUNC(h8_port_device::port_r));
+ map(0xffff64, 0xffff64).rw(m_port5, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+ map(0xffff65, 0xffff65).rw(m_port6, FUNC(h8_port_device::dr_r), FUNC(h8_port_device::dr_w));
+
+ map(0xffff88, 0xffff88).rw(m_sci[2], FUNC(h8_sci_device::smr_r), FUNC(h8_sci_device::smr_w));
+ map(0xffff89, 0xffff89).rw(m_sci[2], FUNC(h8_sci_device::brr_r), FUNC(h8_sci_device::brr_w));
+ map(0xffff8a, 0xffff8a).rw(m_sci[2], FUNC(h8_sci_device::scr_r), FUNC(h8_sci_device::scr_w));
+ map(0xffff8b, 0xffff8b).rw(m_sci[2], FUNC(h8_sci_device::tdr_r), FUNC(h8_sci_device::tdr_w));
+ map(0xffff8c, 0xffff8c).rw(m_sci[2], FUNC(h8_sci_device::ssr_r), FUNC(h8_sci_device::ssr_w));
+ map(0xffff8d, 0xffff8d).r(m_sci[2], FUNC(h8_sci_device::rdr_r));
+ map(0xffff8e, 0xffff8e).rw(m_sci[2], FUNC(h8_sci_device::scmr_r), FUNC(h8_sci_device::scmr_w));
+}
+
+void h8s2320_device::map_2320(address_map &map)
+{
+ map_2321(map);
+
+ map(0xfffee0, 0xfffee1).rw(m_dmac[0], FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
+ map(0xfffee2, 0xfffee3).rw(m_dmac[0], FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
+ map(0xfffee4, 0xfffee5).rw(m_dmac[0], FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
+ map(0xfffee6, 0xfffee7).rw(m_dmac[0], FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
+ map(0xfffee8, 0xfffee9).rw(m_dmac[0], FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
+ map(0xfffeea, 0xfffeeb).rw(m_dmac[0], FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
+ map(0xfffeec, 0xfffeed).rw(m_dmac[0], FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
+ map(0xfffeee, 0xfffeef).rw(m_dmac[0], FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
+ map(0xfffef0, 0xfffef1).rw(m_dmac[1], FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
+ map(0xfffef2, 0xfffef3).rw(m_dmac[1], FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
+ map(0xfffef4, 0xfffef5).rw(m_dmac[1], FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
+ map(0xfffef6, 0xfffef7).rw(m_dmac[1], FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
+ map(0xfffef8, 0xfffef9).rw(m_dmac[1], FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
+ map(0xfffefa, 0xfffefb).rw(m_dmac[1], FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
+ map(0xfffefc, 0xfffefd).rw(m_dmac[1], FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
+ map(0xfffefe, 0xfffeff).rw(m_dmac[1], FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
+ map(0xffff00, 0xffff00).rw(m_dma, FUNC(h8s_dma_device::dmawer_r), FUNC(h8s_dma_device::dmawer_w));
+ map(0xffff01, 0xffff01).rw(m_dma, FUNC(h8s_dma_device::dmatcr_r), FUNC(h8s_dma_device::dmatcr_w));
+ map(0xffff02, 0xffff03).rw(m_dmac[0], FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
+ map(0xffff04, 0xffff05).rw(m_dmac[1], FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
+ map(0xffff06, 0xffff07).rw(m_dma, FUNC(h8s_dma_device::dmabcr_r), FUNC(h8s_dma_device::dmabcr_w));
+}
+
+void h8s2321_device::notify_standby(int state)
+{
+ h8s2319_device::notify_standby(state);
+ m_sci[2]->notify_standby(state);
+}
+
+void h8s2321_device::device_add_mconfig(machine_config &config)
+{
+ h8s2319_device::device_add_mconfig(config);
+
+ H8_PORT(config, m_port5, *this, h8_device::PORT_5, 0x00, 0xf0);
+ H8_PORT(config, m_port6, *this, h8_device::PORT_6, 0x00, 0x00);
+ H8_PORT(config.replace(), m_porta[0], *this, h8_device::PORT_A, 0x00, 0x00);
+
+ H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
+}
+
+void h8s2320_device::device_add_mconfig(machine_config &config)
+{
+ h8s2321_device::device_add_mconfig(config);
+
+ H8S_DMA(config, m_dma, *this);
+ H8S_DMA_CHANNEL(config, m_dmac[0], *this, m_dma, m_intc);
+ H8S_DMA_CHANNEL(config, m_dmac[1], *this, m_dma, m_intc);
+}
+
+void h8s2320_device::execute_set_input(int inputnum, int state)
+{
+ // TEND and DREQ pins are not supported on H8S/2321
+ if(inputnum == H8_INPUT_LINE_TEND0 || inputnum == H8_INPUT_LINE_TEND1)
+ m_tend_cb[inputnum - H8_INPUT_LINE_TEND0](state);
+ else if(inputnum == H8_INPUT_LINE_DREQ0 || inputnum == H8_INPUT_LINE_DREQ1)
+ m_dma->set_input(inputnum, state);
+ else
+ h8s2319_device::execute_set_input(inputnum, state);
+}
+
+void h8s2320_device::device_start()
+{
+ h8s2321_device::device_start();
+ m_dma_device = m_dma;
+}
diff --git a/src/devices/cpu/h8/h8s2329.h b/src/devices/cpu/h8/h8s2329.h
new file mode 100644
index 00000000000..ac1940cfb62
--- /dev/null
+++ b/src/devices/cpu/h8/h8s2329.h
@@ -0,0 +1,121 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ h8s2329.h
+
+ H8S-2329 family emulation
+ (compared to H8S-2319 family: adds DMA, 1 more SCI)
+
+ H8S/2000-based mcus.
+
+ Variant ROM RAM note
+ H8S/2320 - 4K
+ H8S/2321 - 4K no DMA
+ H8S/2322 - 8K
+ H8S/2323 32K 8K
+ H8S/2324 - 32K
+ H8S/2326 512K 8K
+ H8S/2327 128K 8K
+ H8S/2328 256K 8K
+ H8S/2329 384K 32K
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_H8S2329_H
+#define MAME_CPU_H8_H8S2329_H
+
+#pragma once
+
+#include "h8s2319.h"
+#include "h8_dma.h"
+
+class h8s2321_device : public h8s2319_device {
+public:
+ h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // see h8s2319.h for more
+ auto read_port5() { return m_read_port [PORT_5].bind(); }
+ auto write_port5() { return m_write_port[PORT_5].bind(); }
+ auto read_port6() { return m_read_port [PORT_6].bind(); }
+ auto write_port6() { return m_write_port[PORT_6].bind(); }
+
+protected:
+ h8s2321_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate, u32 rom_size, u32 ram_size);
+
+ required_device<h8_port_device> m_port5;
+ required_device<h8_port_device> m_port6;
+
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map_2321(address_map &map) ATTR_COLD;
+};
+
+class h8s2320_device : public h8s2321_device {
+public:
+ h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ auto tend0_cb() { return m_tend_cb[0].bind(); }
+ auto tend1_cb() { return m_tend_cb[1].bind(); }
+
+protected:
+ required_device<h8s_dma_device> m_dma;
+ required_device_array<h8s_dma_channel_device, 2> m_dmac;
+
+ devcb_write_line::array<2> m_tend_cb;
+
+ h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map_2320(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+};
+
+class h8s2322_device : public h8s2320_device {
+public:
+ h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2323_device : public h8s2320_device {
+public:
+ h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2324_device : public h8s2320_device {
+public:
+ h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2326_device : public h8s2320_device {
+public:
+ h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2327_device : public h8s2320_device {
+public:
+ h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2328_device : public h8s2320_device {
+public:
+ h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class h8s2329_device : public h8s2320_device {
+public:
+ h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+DECLARE_DEVICE_TYPE(H8S2320, h8s2320_device)
+DECLARE_DEVICE_TYPE(H8S2321, h8s2321_device)
+DECLARE_DEVICE_TYPE(H8S2322, h8s2322_device)
+DECLARE_DEVICE_TYPE(H8S2323, h8s2323_device)
+DECLARE_DEVICE_TYPE(H8S2324, h8s2324_device)
+DECLARE_DEVICE_TYPE(H8S2326, h8s2326_device)
+DECLARE_DEVICE_TYPE(H8S2327, h8s2327_device)
+DECLARE_DEVICE_TYPE(H8S2328, h8s2328_device)
+DECLARE_DEVICE_TYPE(H8S2329, h8s2329_device)
+
+#endif // MAME_CPU_H8_H8S2329_H
diff --git a/src/devices/cpu/h8/h8s2357.cpp b/src/devices/cpu/h8/h8s2357.cpp
index 787b34d094f..9df7dda9ab7 100644
--- a/src/devices/cpu/h8/h8s2357.cpp
+++ b/src/devices/cpu/h8/h8s2357.cpp
@@ -10,7 +10,7 @@ DEFINE_DEVICE_TYPE(H8S2394, h8s2394_device, "h8s2394", "Hitachi H8S/2394")
DEFINE_DEVICE_TYPE(H8S2392, h8s2392_device, "h8s2392", "Hitachi H8S/2392")
DEFINE_DEVICE_TYPE(H8S2390, h8s2390_device, "h8s2390", "Hitachi H8S/2390")
-h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
+h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start) :
h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2357_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -45,32 +45,32 @@ h8s2357_device::h8s2357_device(const machine_config &mconfig, device_type type,
{
}
-h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2357_device::h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2357, tag, owner, clock, 0xffdc00)
{
}
-h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2352_device::h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2352, tag, owner, clock, 0xffdc00)
{
}
-h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2398_device::h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2398, tag, owner, clock, 0xffdc00)
{
}
-h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2394_device::h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2394, tag, owner, clock, 0xff7c00)
{
}
-h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2392_device::h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2392, tag, owner, clock, 0xffdc00)
{
}
-h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2390_device::h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2357_device(mconfig, H8S2390, tag, owner, clock, 0xffec00)
{
}
@@ -99,20 +99,19 @@ void h8s2357_device::map(address_map &map)
map(0xfffea5, 0xfffea5).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
map(0xfffea6, 0xfffea7).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
map(0xfffea8, 0xfffeab).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
- map(0xfffeb0, 0xfffeb0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(0xfffeb1, 0xfffeb1).w(m_port2, FUNC(h8_port_device::ddr_w));
- map(0xfffeb2, 0xfffeb2).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(0xfffeb4, 0xfffeb4).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(0xfffeb5, 0xfffeb5).w(m_port6, FUNC(h8_port_device::ddr_w));
- map(0xfffeb9, 0xfffeb9).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(0xfffeba, 0xfffeba).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(0xfffebb, 0xfffebb).w(m_portc, FUNC(h8_port_device::ddr_w));
- map(0xfffebc, 0xfffebc).w(m_portd, FUNC(h8_port_device::ddr_w));
- map(0xfffebd, 0xfffebd).w(m_porte, FUNC(h8_port_device::ddr_w));
- map(0xfffebe, 0xfffebe).w(m_portf, FUNC(h8_port_device::ddr_w));
- map(0xfffebf, 0xfffebf).w(m_portg, FUNC(h8_port_device::ddr_w));
- map(0xfffec4, 0xfffecd).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
- map(0xfffece, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
+ map(0xfffeb0, 0xfffeb0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb1, 0xfffeb1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb2, 0xfffeb2).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb4, 0xfffeb4).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb5, 0xfffeb5).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb9, 0xfffeb9).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeba, 0xfffeba).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebb, 0xfffebb).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebc, 0xfffebc).rw(m_portd, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebd, 0xfffebd).rw(m_porte, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebe, 0xfffebe).rw(m_portf, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebf, 0xfffebf).rw(m_portg, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffec4, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
map(0xfffee0, 0xfffee1).rw(m_dma0, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
map(0xfffee2, 0xfffee3).rw(m_dma0, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
map(0xfffee4, 0xfffee5).rw(m_dma0, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
@@ -250,63 +249,63 @@ void h8s2357_device::device_add_mconfig(machine_config &config)
H8_PORT(config, m_porte, *this, h8_device::PORT_E, 0x00, 0x00);
H8_PORT(config, m_portf, *this, h8_device::PORT_F, 0x00, 0x00);
H8_PORT(config, m_portg, *this, h8_device::PORT_G, 0xe0, 0xe0);
- H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
- H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
H8_TIMER16(config, m_timer16, *this, 6, 0x00);
H8S_TIMER16_CHANNEL(config, m_timer16_0, *this, 4, 0x60, m_intc, 32,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::INPUT_D);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::INPUT_D);
H8S_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 0x4c, m_intc, 40,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
H8S_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 0x4c, m_intc, 44,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_1024);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024);
H8S_TIMER16_CHANNEL(config, m_timer16_3, *this, 4, 0x60, m_intc, 48,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::DIV_1024,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::DIV_4096);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::DIV_4096);
H8S_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 0x4c, m_intc, 56,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_1024,
- h8_timer16_channel_device::CHAIN).set_chain(m_timer16_5);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16_5);
H8S_TIMER16_CHANNEL(config, m_timer16_5, *this, 2, 0x4c, m_intc, 60,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::INPUT_D);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::INPUT_D);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
@@ -374,9 +373,9 @@ void h8s2357_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h8s2357_device::internal_update(uint64_t current_time)
+void h8s2357_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -395,9 +394,27 @@ void h8s2357_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h8s2357_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_sci[2]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_timer16_5->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h8s2357_device::device_start()
{
h8s2000_device::device_start();
+ save_item(NAME(m_syscr));
}
void h8s2357_device::device_reset()
@@ -406,12 +423,12 @@ void h8s2357_device::device_reset()
m_syscr = 0x01;
}
-uint8_t h8s2357_device::syscr_r()
+u8 h8s2357_device::syscr_r()
{
return m_syscr;
}
-void h8s2357_device::syscr_w(uint8_t data)
+void h8s2357_device::syscr_w(u8 data)
{
m_syscr = data;
update_irq_filter();
diff --git a/src/devices/cpu/h8/h8s2357.h b/src/devices/cpu/h8/h8s2357.h
index cc664c22e0b..7d7fc415b72 100644
--- a/src/devices/cpu/h8/h8s2357.h
+++ b/src/devices/cpu/h8/h8s2357.h
@@ -37,7 +37,7 @@
class h8s2357_device : public h8s2000_device {
public:
- h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -65,8 +65,8 @@ public:
auto read_portg() { return m_read_port [PORT_G].bind(); }
auto write_portg() { return m_write_port[PORT_G].bind(); }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
required_device<h8s_intc_device> m_intc;
@@ -98,10 +98,10 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_5;
required_device<h8_watchdog_device> m_watchdog;
- uint32_t m_ram_start;
+ u32 m_ram_start;
unsigned char m_syscr;
- h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start);
+ h8s2357_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 start);
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
@@ -109,38 +109,39 @@ protected:
virtual int trace_setup() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h8s2352_device : public h8s2357_device {
public:
- h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2352_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2398_device : public h8s2357_device {
public:
- h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2398_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2394_device : public h8s2357_device {
public:
- h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2394_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2392_device : public h8s2357_device {
public:
- h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2392_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class h8s2390_device : public h8s2357_device {
public:
- h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2390_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H8S2357, h8s2357_device)
diff --git a/src/devices/cpu/h8/h8s2600.cpp b/src/devices/cpu/h8/h8s2600.cpp
index 86dd00f0606..07b187aa700 100644
--- a/src/devices/cpu/h8/h8s2600.cpp
+++ b/src/devices/cpu/h8/h8s2600.cpp
@@ -4,8 +4,9 @@
#include "h8s2600.h"
#include "h8s2600d.h"
-h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate) :
- h8s2000_device(mconfig, type, tag, owner, clock, map_delegate)
+h8s2600_device::h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate) :
+ h8s2000_device(mconfig, type, tag, owner, clock, map_delegate),
+ m_mac_saturating(false)
{
m_has_mac = true;
}
@@ -15,4 +16,16 @@ std::unique_ptr<util::disasm_interface> h8s2600_device::create_disassembler()
return std::make_unique<h8s2600_disassembler>();
}
+void h8s2600_device::device_start()
+{
+ h8s2000_device::device_start();
+ save_item(NAME(m_mac_saturating));
+}
+
+void h8s2600_device::device_reset()
+{
+ h8s2000_device::device_reset();
+ m_mac_saturating = false;
+}
+
#include "cpu/h8/h8s2600.hxx"
diff --git a/src/devices/cpu/h8/h8s2600.h b/src/devices/cpu/h8/h8s2600.h
index 84c611dd8f7..86b5089e628 100644
--- a/src/devices/cpu/h8/h8s2600.h
+++ b/src/devices/cpu/h8/h8s2600.h
@@ -20,13 +20,18 @@
class h8s2600_device : public h8s2000_device {
protected:
- h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
+ h8s2600_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map_delegate);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
+ bool m_mac_saturating;
+
#define O(o) void o ## _full(); void o ## _partial()
O(clrmac);
O(ldmac_r32l_mach); O(ldmac_r32l_macl);
diff --git a/src/devices/cpu/h8/h8s2600d.cpp b/src/devices/cpu/h8/h8s2600d.cpp
index 038d8525e3c..165f2c6e2e6 100644
--- a/src/devices/cpu/h8/h8s2600d.cpp
+++ b/src/devices/cpu/h8/h8s2600d.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- h8d.h
+ h8s2600d.h
H8S-2600 base cpu emulation, disassembler
diff --git a/src/devices/cpu/h8/h8s2655.cpp b/src/devices/cpu/h8/h8s2655.cpp
index f8527635118..e2432b2d4a9 100644
--- a/src/devices/cpu/h8/h8s2655.cpp
+++ b/src/devices/cpu/h8/h8s2655.cpp
@@ -6,7 +6,7 @@
DEFINE_DEVICE_TYPE(H8S2655, h8s2655_device, "h8s2655", "Hitachi H8S/2655")
DEFINE_DEVICE_TYPE(H8S2653, h8s2653_device, "h8s2653", "Hitachi H8S/2653")
-h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
h8s2600_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2655_device::map), this)),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
@@ -41,13 +41,13 @@ h8s2655_device::h8s2655_device(const machine_config &mconfig, device_type type,
m_has_trace = true;
}
-h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2655_device::h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2655_device(mconfig, H8S2655, tag, owner, clock)
{
}
-h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+h8s2653_device::h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
h8s2655_device(mconfig, H8S2653, tag, owner, clock)
{
}
@@ -76,22 +76,20 @@ void h8s2655_device::map(address_map &map)
map(0xfffea5, 0xfffea5).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
map(0xfffea6, 0xfffea7).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
map(0xfffea8, 0xfffeab).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
- map(0xfffeb0, 0xfffeb0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(0xfffeb1, 0xfffeb1).w(m_port2, FUNC(h8_port_device::ddr_w));
- map(0xfffeb2, 0xfffeb2).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(0xfffeb4, 0xfffeb4).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(0xfffeb5, 0xfffeb5).w(m_port6, FUNC(h8_port_device::ddr_w));
- map(0xfffeb9, 0xfffeb9).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(0xfffeba, 0xfffeba).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(0xfffebb, 0xfffebb).w(m_portc, FUNC(h8_port_device::ddr_w));
- map(0xfffebc, 0xfffebc).w(m_portd, FUNC(h8_port_device::ddr_w));
- map(0xfffebd, 0xfffebd).w(m_porte, FUNC(h8_port_device::ddr_w));
- map(0xfffebe, 0xfffebe).w(m_portf, FUNC(h8_port_device::ddr_w));
- map(0xfffebf, 0xfffebf).w(m_portg, FUNC(h8_port_device::ddr_w));
- map(0xfffec0, 0xfffec1).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
- map(0xfffec2, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
- map(0xfffec4, 0xfffecd).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
- map(0xfffece, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
+ map(0xfffeb0, 0xfffeb0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb1, 0xfffeb1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb2, 0xfffeb2).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb4, 0xfffeb4).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb5, 0xfffeb5).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb9, 0xfffeb9).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeba, 0xfffeba).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebb, 0xfffebb).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebc, 0xfffebc).rw(m_portd, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebd, 0xfffebd).rw(m_porte, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebe, 0xfffebe).rw(m_portf, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebf, 0xfffebf).rw(m_portg, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffec0, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
+ map(0xfffec4, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
map(0xfffee0, 0xfffee1).rw(m_dma0, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
map(0xfffee2, 0xfffee3).rw(m_dma0, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
@@ -230,63 +228,63 @@ void h8s2655_device::device_add_mconfig(machine_config &config)
H8_PORT(config, m_porte, *this, h8_device::PORT_E, 0x00, 0x00);
H8_PORT(config, m_portf, *this, h8_device::PORT_F, 0x00, 0x00);
H8_PORT(config, m_portg, *this, h8_device::PORT_G, 0xe0, 0xe0);
- H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
- H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_0, *this, m_intc, 64, 65, 66, m_timer8_1, h8_timer8_channel_device::CHAIN_OVERFLOW, true, false);
+ H8H_TIMER8_CHANNEL(config, m_timer8_1, *this, m_intc, 68, 69, 70, m_timer8_0, h8_timer8_channel_device::CHAIN_A, false, false);
H8_TIMER16(config, m_timer16, *this, 6, 0x00);
H8S_TIMER16_CHANNEL(config, m_timer16_0, *this, 4, 0x60, m_intc, 32,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::INPUT_D);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::INPUT_D);
H8S_TIMER16_CHANNEL(config, m_timer16_1, *this, 2, 0x4c, m_intc, 40,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16_2);
H8S_TIMER16_CHANNEL(config, m_timer16_2, *this, 2, 0x4c, m_intc, 44,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_B,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_1024);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_B,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024);
H8S_TIMER16_CHANNEL(config, m_timer16_3, *this, 4, 0x60, m_intc, 48,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::DIV_1024,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::DIV_4096);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::DIV_4096);
H8S_TIMER16_CHANNEL(config, m_timer16_4, *this, 2, 0x4c, m_intc, 56,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_1024,
- h8_timer16_channel_device::CHAIN).set_chain(m_timer16_5);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_1024,
+ h8_timer16_channel_device::CHAIN).set_chain(m_timer16_5);
H8S_TIMER16_CHANNEL(config, m_timer16_5, *this, 2, 0x4c, m_intc, 60,
- h8_timer16_channel_device::DIV_1,
- h8_timer16_channel_device::DIV_4,
- h8_timer16_channel_device::DIV_16,
- h8_timer16_channel_device::DIV_64,
- h8_timer16_channel_device::INPUT_A,
- h8_timer16_channel_device::INPUT_C,
- h8_timer16_channel_device::DIV_256,
- h8_timer16_channel_device::INPUT_D);
+ h8_timer16_channel_device::DIV_1,
+ h8_timer16_channel_device::DIV_4,
+ h8_timer16_channel_device::DIV_16,
+ h8_timer16_channel_device::DIV_64,
+ h8_timer16_channel_device::INPUT_A,
+ h8_timer16_channel_device::INPUT_C,
+ h8_timer16_channel_device::DIV_256,
+ h8_timer16_channel_device::INPUT_D);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
@@ -387,9 +385,9 @@ void h8s2655_device::interrupt_taken()
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h8s2655_device::internal_update(uint64_t current_time)
+void h8s2655_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
@@ -408,9 +406,27 @@ void h8s2655_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
+void h8s2655_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_sci[2]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_timer16_5->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
void h8s2655_device::device_start()
{
h8s2600_device::device_start();
+ save_item(NAME(m_syscr));
}
void h8s2655_device::device_reset()
@@ -419,14 +435,22 @@ void h8s2655_device::device_reset()
m_syscr = 0x01;
}
-uint8_t h8s2655_device::syscr_r()
+u8 h8s2655_device::syscr_r()
{
return m_syscr;
}
-void h8s2655_device::syscr_w(uint8_t data)
+void h8s2655_device::syscr_w(u8 data)
{
+ logerror("syscr = %02x\n", data);
+
+ // NMIEG
+ m_intc->set_nmi_edge(BIT(data, 3));
+
+ // MACS
+ m_mac_saturating = bool(data & 0x80);
+
+ // INTM0/1
m_syscr = data;
update_irq_filter();
- logerror("syscr = %02x\n", data);
}
diff --git a/src/devices/cpu/h8/h8s2655.h b/src/devices/cpu/h8/h8s2655.h
index 9b11e5ef4ac..80a55b2d234 100644
--- a/src/devices/cpu/h8/h8s2655.h
+++ b/src/devices/cpu/h8/h8s2655.h
@@ -29,7 +29,7 @@
class h8s2655_device : public h8s2600_device {
public:
- h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto read_port1() { return m_read_port [PORT_1].bind(); }
auto write_port1() { return m_write_port[PORT_1].bind(); }
@@ -57,8 +57,8 @@ public:
auto read_portg() { return m_read_port [PORT_G].bind(); }
auto write_portg() { return m_write_port[PORT_G].bind(); }
- uint8_t syscr_r();
- void syscr_w(uint8_t data);
+ u8 syscr_r();
+ void syscr_w(u8 data);
protected:
required_device<h8s_intc_device> m_intc;
@@ -90,9 +90,9 @@ protected:
required_device<h8s_timer16_channel_device> m_timer16_5;
required_device<h8_watchdog_device> m_watchdog;
- uint8_t m_syscr;
+ u8 m_syscr;
- h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ h8s2655_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
virtual bool exr_in_stack() const override;
virtual void update_irq_filter() override;
@@ -100,18 +100,19 @@ protected:
virtual int trace_setup() override;
virtual int trapa_setup() override;
virtual void irq_setup() override;
- virtual void internal_update(uint64_t current_time) override;
- virtual void device_add_mconfig(machine_config &config) override;
- void map(address_map &map);
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ void map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
};
class h8s2653_device : public h8s2655_device {
public:
- h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ h8s2653_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
DECLARE_DEVICE_TYPE(H8S2655, h8s2655_device)
diff --git a/src/devices/cpu/h8/h8s2320.cpp b/src/devices/cpu/h8/swx00.cpp
index 83db3490ed3..f626a8303ae 100644
--- a/src/devices/cpu/h8/h8s2320.cpp
+++ b/src/devices/cpu/h8/swx00.cpp
@@ -1,27 +1,18 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
#include "emu.h"
-#include "h8s2320.h"
+#include "swx00.h"
-DEFINE_DEVICE_TYPE(H8S2320, h8s2320_device, "h8s2320", "Hitachi H8S/2320")
-DEFINE_DEVICE_TYPE(H8S2321, h8s2321_device, "h8s2321", "Hitachi H8S/2321")
-DEFINE_DEVICE_TYPE(H8S2322, h8s2322_device, "h8s2322", "Hitachi H8S/2322")
-DEFINE_DEVICE_TYPE(H8S2323, h8s2323_device, "h8s2323", "Hitachi H8S/2323")
-DEFINE_DEVICE_TYPE(H8S2324, h8s2324_device, "h8s2324", "Hitachi H8S/2324")
-DEFINE_DEVICE_TYPE(H8S2326, h8s2326_device, "h8s2326", "Hitachi H8S/2326")
-DEFINE_DEVICE_TYPE(H8S2327, h8s2327_device, "h8s2327", "Hitachi H8S/2327")
-DEFINE_DEVICE_TYPE(H8S2328, h8s2328_device, "h8s2328", "Hitachi H8S/2328")
-DEFINE_DEVICE_TYPE(H8S2329, h8s2329_device, "h8s2329", "Hitachi H8S/2329")
+DEFINE_DEVICE_TYPE(SWX00, swx00_device, "swx00", "Yamaha SWX00")
-
-h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t start) :
- h8s2000_device(mconfig, type, tag, owner, clock, address_map_constructor(FUNC(h8s2320_device::map), this)),
+swx00_device::swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u8 mode) :
+ h8s2000_device(mconfig, SWX00, tag, owner, clock, address_map_constructor(FUNC(swx00_device::map), this)),
+ device_mixer_interface(mconfig, *this),
m_intc(*this, "intc"),
m_adc(*this, "adc"),
m_dma(*this, "dma"),
m_dma0(*this, "dma:0"),
m_dma1(*this, "dma:1"),
- m_dtc(*this, "dtc"),
m_port1(*this, "port1"),
m_port2(*this, "port2"),
m_port3(*this, "port3"),
@@ -45,61 +36,48 @@ h8s2320_device::h8s2320_device(const machine_config &mconfig, device_type type,
m_timer16_4(*this, "timer16:4"),
m_timer16_5(*this, "timer16:5"),
m_watchdog(*this, "watchdog"),
- m_tend_cb(*this),
- m_ram_start(start),
+ m_swx00(*this, "swx00"),
+ m_read_pdt(*this, 0xffff),
+ m_write_pdt(*this),
+ m_read_pad(*this, 0xff),
+ m_write_pad(*this),
+ m_write_cmah(*this),
+ m_write_txd(*this),
+ m_s_config("s", ENDIANNESS_BIG, 16, 24, -1),
+ m_mode(mode),
m_syscr(0)
{
+ m_has_trace = true;
+ m_program_config.m_name = "c";
+
+ m_read_pdt.bind().set(*this, FUNC(swx00_device::pdt_default_r));
+ m_write_pdt.bind().set(*this, FUNC(swx00_device::pdt_default_w));
+ m_read_pad.bind().set(*this, FUNC(swx00_device::pad_default_r));
+ m_write_pad.bind().set(*this, FUNC(swx00_device::pad_default_w));
+ m_write_cmah.bind().set(*this, FUNC(swx00_device::cmah_default_w));
+ m_write_txd.bind().set(*this, FUNC(swx00_device::txd_default_w));
}
-h8s2320_device::h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2320, tag, owner, clock, 0xffec00)
+u16 swx00_device::s_r(offs_t offset)
{
+ return m_s.read_word(offset);
}
-h8s2321_device::h8s2321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2321, tag, owner, clock, 0xffec00)
+void swx00_device::map(address_map &map)
{
-}
+ if(!(m_mode & MODE_DUAL))
+ map(0x000000, 0x1fffff).r(FUNC(swx00_device::s_r));
-h8s2322_device::h8s2322_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2322, tag, owner, clock, 0xffdc00)
-{
-}
+ map(0xffe000, 0xffefff).m(m_swx00, FUNC(swx00_sound_device::map));
-h8s2323_device::h8s2323_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2323, tag, owner, clock, 0xffdc00)
-{
-}
-
-h8s2324_device::h8s2324_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2324, tag, owner, clock, 0xff7c00)
-{
-}
-
-h8s2326_device::h8s2326_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2326, tag, owner, clock, 0xffdc00)
-{
-}
-
-h8s2327_device::h8s2327_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2327, tag, owner, clock, 0xffdc00)
-{
-}
-
-h8s2328_device::h8s2328_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2328, tag, owner, clock, 0xffdc00)
-{
-}
-
-h8s2329_device::h8s2329_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- h8s2320_device(mconfig, H8S2329, tag, owner, clock, 0xff7c00)
-{
-}
-
-void h8s2320_device::map(address_map &map)
-{
- map(m_ram_start, 0xfffbff).ram();
+ map(0xffe027, 0xffe027).r(FUNC(swx00_device::pad_r));
+ map(0xffe028, 0xffe029).w(FUNC(swx00_device::pdt_ddr_w));
+ map(0xffe02a, 0xffe02b).rw(FUNC(swx00_device::pdt_r), FUNC(swx00_device::pdt_w));
+ map(0xffe02d, 0xffe02d).w(FUNC(swx00_device::cmah_w));
+ map(0xffe02e, 0xffe02e).w(FUNC(swx00_device::txd_w));
+ map(0xffe02f, 0xffe02f).lr8(NAME([]() -> uint8_t { return 0xff; }));
+ map(0xfff000, 0xfffbff).ram();
map(0xfffe80, 0xfffe80).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
map(0xfffe81, 0xfffe81).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
map(0xfffe82, 0xfffe83).rw(m_timer16_3, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
@@ -121,54 +99,47 @@ void h8s2320_device::map(address_map &map)
map(0xfffea5, 0xfffea5).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tsr_r), FUNC(h8_timer16_channel_device::tsr_w));
map(0xfffea6, 0xfffea7).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tcnt_r), FUNC(h8_timer16_channel_device::tcnt_w));
map(0xfffea8, 0xfffeab).rw(m_timer16_5, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
- map(0xfffeb0, 0xfffeb0).w(m_port1, FUNC(h8_port_device::ddr_w));
- map(0xfffeb1, 0xfffeb1).w(m_port2, FUNC(h8_port_device::ddr_w));
- map(0xfffeb2, 0xfffeb2).w(m_port3, FUNC(h8_port_device::ddr_w));
- map(0xfffeb4, 0xfffeb4).w(m_port5, FUNC(h8_port_device::ddr_w));
- map(0xfffeb5, 0xfffeb5).w(m_port6, FUNC(h8_port_device::ddr_w));
- map(0xfffeb9, 0xfffeb9).w(m_porta, FUNC(h8_port_device::ddr_w));
- map(0xfffeba, 0xfffeba).w(m_portb, FUNC(h8_port_device::ddr_w));
- map(0xfffebb, 0xfffebb).w(m_portc, FUNC(h8_port_device::ddr_w));
- map(0xfffebc, 0xfffebc).w(m_portd, FUNC(h8_port_device::ddr_w));
- map(0xfffebd, 0xfffebd).w(m_porte, FUNC(h8_port_device::ddr_w));
- map(0xfffebe, 0xfffebe).w(m_portf, FUNC(h8_port_device::ddr_w));
- map(0xfffebf, 0xfffebf).w(m_portg, FUNC(h8_port_device::ddr_w));
- map(0xfffec0, 0xfffec1).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
- map(0xfffec2, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icrc_r), FUNC(h8s_intc_device::icrc_w));
- map(0xfffec4, 0xfffecd).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
- map(0xfffece, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::iprk_r), FUNC(h8s_intc_device::iprk_w));
-
- if(type() != H8S2321) {
- map(0xfffee0, 0xfffee1).rw(m_dma0, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
- map(0xfffee2, 0xfffee3).rw(m_dma0, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
- map(0xfffee4, 0xfffee5).rw(m_dma0, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
- map(0xfffee6, 0xfffee7).rw(m_dma0, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
- map(0xfffee8, 0xfffee9).rw(m_dma0, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
- map(0xfffeea, 0xfffeeb).rw(m_dma0, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
- map(0xfffeec, 0xfffeed).rw(m_dma0, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
- map(0xfffeee, 0xfffeef).rw(m_dma0, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
- map(0xfffef0, 0xfffef1).rw(m_dma1, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
- map(0xfffef2, 0xfffef3).rw(m_dma1, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
- map(0xfffef4, 0xfffef5).rw(m_dma1, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
- map(0xfffef6, 0xfffef7).rw(m_dma1, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
- map(0xfffef8, 0xfffef9).rw(m_dma1, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
- map(0xfffefa, 0xfffefb).rw(m_dma1, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
- map(0xfffefc, 0xfffefd).rw(m_dma1, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
- map(0xfffefe, 0xfffeff).rw(m_dma1, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
- map(0xffff00, 0xffff00).rw(m_dma, FUNC(h8s_dma_device::dmawer_r), FUNC(h8s_dma_device::dmawer_w));
- map(0xffff01, 0xffff01).rw(m_dma, FUNC(h8s_dma_device::dmatcr_r), FUNC(h8s_dma_device::dmatcr_w));
- map(0xffff02, 0xffff03).rw(m_dma0, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
- map(0xffff04, 0xffff05).rw(m_dma1, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
- map(0xffff06, 0xffff07).rw(m_dma, FUNC(h8s_dma_device::dmabcr_r), FUNC(h8s_dma_device::dmabcr_w));
- }
+ map(0xfffeb0, 0xfffeb0).rw(m_port1, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb1, 0xfffeb1).rw(m_port2, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb2, 0xfffeb2).rw(m_port3, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb4, 0xfffeb4).rw(m_port5, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb5, 0xfffeb5).rw(m_port6, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeb9, 0xfffeb9).rw(m_porta, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffeba, 0xfffeba).rw(m_portb, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebb, 0xfffebb).rw(m_portc, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebc, 0xfffebc).rw(m_portd, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebd, 0xfffebd).rw(m_porte, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebe, 0xfffebe).rw(m_portf, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffebf, 0xfffebf).rw(m_portg, FUNC(h8_port_device::ff_r), FUNC(h8_port_device::ddr_w));
+ map(0xfffec0, 0xfffec2).rw(m_intc, FUNC(h8s_intc_device::icr_r), FUNC(h8s_intc_device::icr_w));
+ map(0xfffec4, 0xfffece).rw(m_intc, FUNC(h8s_intc_device::ipr_r), FUNC(h8s_intc_device::ipr_w));
+
+ map(0xfffee0, 0xfffee1).rw(m_dma0, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
+ map(0xfffee2, 0xfffee3).rw(m_dma0, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
+ map(0xfffee4, 0xfffee5).rw(m_dma0, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
+ map(0xfffee6, 0xfffee7).rw(m_dma0, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
+ map(0xfffee8, 0xfffee9).rw(m_dma0, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
+ map(0xfffeea, 0xfffeeb).rw(m_dma0, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
+ map(0xfffeec, 0xfffeed).rw(m_dma0, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
+ map(0xfffeee, 0xfffeef).rw(m_dma0, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
+ map(0xfffef0, 0xfffef1).rw(m_dma1, FUNC(h8s_dma_channel_device::marah_r), FUNC(h8s_dma_channel_device::marah_w));
+ map(0xfffef2, 0xfffef3).rw(m_dma1, FUNC(h8s_dma_channel_device::maral_r), FUNC(h8s_dma_channel_device::maral_w));
+ map(0xfffef4, 0xfffef5).rw(m_dma1, FUNC(h8s_dma_channel_device::ioara_r), FUNC(h8s_dma_channel_device::ioara_w));
+ map(0xfffef6, 0xfffef7).rw(m_dma1, FUNC(h8s_dma_channel_device::etcra_r), FUNC(h8s_dma_channel_device::etcra_w));
+ map(0xfffef8, 0xfffef9).rw(m_dma1, FUNC(h8s_dma_channel_device::marbh_r), FUNC(h8s_dma_channel_device::marbh_w));
+ map(0xfffefa, 0xfffefb).rw(m_dma1, FUNC(h8s_dma_channel_device::marbl_r), FUNC(h8s_dma_channel_device::marbl_w));
+ map(0xfffefc, 0xfffefd).rw(m_dma1, FUNC(h8s_dma_channel_device::ioarb_r), FUNC(h8s_dma_channel_device::ioarb_w));
+ map(0xfffefe, 0xfffeff).rw(m_dma1, FUNC(h8s_dma_channel_device::etcrb_r), FUNC(h8s_dma_channel_device::etcrb_w));
+ map(0xffff00, 0xffff00).rw(m_dma, FUNC(h8s_dma_device::dmawer_r), FUNC(h8s_dma_device::dmawer_w));
+ map(0xffff01, 0xffff01).rw(m_dma, FUNC(h8s_dma_device::dmatcr_r), FUNC(h8s_dma_device::dmatcr_w));
+ map(0xffff02, 0xffff03).rw(m_dma0, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
+ map(0xffff04, 0xffff05).rw(m_dma1, FUNC(h8s_dma_channel_device::dmacr_r), FUNC(h8s_dma_channel_device::dmacr_w));
+ map(0xffff06, 0xffff07).rw(m_dma, FUNC(h8s_dma_device::dmabcr_r), FUNC(h8s_dma_device::dmabcr_w));
map(0xffff2c, 0xffff2c).rw(m_intc, FUNC(h8s_intc_device::iscrh_r), FUNC(h8s_intc_device::iscrh_w));
map(0xffff2d, 0xffff2d).rw(m_intc, FUNC(h8s_intc_device::iscrl_r), FUNC(h8s_intc_device::iscrl_w));
map(0xffff2e, 0xffff2e).rw(m_intc, FUNC(h8s_intc_device::ier_r), FUNC(h8s_intc_device::ier_w));
map(0xffff2f, 0xffff2f).rw(m_intc, FUNC(h8s_intc_device::isr_r), FUNC(h8s_intc_device::isr_w));
- map(0xffff30, 0xffff35).rw(m_dtc, FUNC(h8_dtc_device::dtcer_r), FUNC(h8_dtc_device::dtcer_w));
- map(0xffff37, 0xffff37).rw(m_dtc, FUNC(h8_dtc_device::dtvecr_r), FUNC(h8_dtc_device::dtvecr_w));
- map(0xffff39, 0xffff39).rw(FUNC(h8s2320_device::syscr_r), FUNC(h8s2320_device::syscr_w));
-
+ map(0xffff39, 0xffff39).rw(FUNC(swx00_device::syscr_r), FUNC(swx00_device::syscr_w));
map(0xffff50, 0xffff50).r(m_port1, FUNC(h8_port_device::port_r));
map(0xffff51, 0xffff51).r(m_port2, FUNC(h8_port_device::port_r));
map(0xffff52, 0xffff52).r(m_port3, FUNC(h8_port_device::port_r));
@@ -225,7 +196,6 @@ void h8s2320_device::map(address_map &map)
map(0xffff90, 0xffff97).r(m_adc, FUNC(h8_adc_device::addr8_r));
map(0xffff98, 0xffff98).rw(m_adc, FUNC(h8_adc_device::adcsr_r), FUNC(h8_adc_device::adcsr_w));
map(0xffff99, 0xffff99).rw(m_adc, FUNC(h8_adc_device::adcr_r), FUNC(h8_adc_device::adcr_w));
-
map(0xffffb0, 0xffffb0).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
map(0xffffb1, 0xffffb1).rw(m_timer8_1, FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
map(0xffffb2, 0xffffb2).rw(m_timer8_0, FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));
@@ -238,7 +208,6 @@ void h8s2320_device::map(address_map &map)
map(0xffffbe, 0xffffbf).rw(m_watchdog, FUNC(h8_watchdog_device::rst_r), FUNC(h8_watchdog_device::rst_w));
map(0xffffc0, 0xffffc0).rw(m_timer16, FUNC(h8_timer16_device::tstr_r), FUNC(h8_timer16_device::tstr_w));
map(0xffffc1, 0xffffc1).rw(m_timer16, FUNC(h8_timer16_device::tsyr_r), FUNC(h8_timer16_device::tsyr_w));
-
map(0xffffd0, 0xffffd0).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tcr_r), FUNC(h8_timer16_channel_device::tcr_w));
map(0xffffd1, 0xffffd1).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tmdr_r), FUNC(h8_timer16_channel_device::tmdr_w));
map(0xffffd2, 0xffffd3).rw(m_timer16_0, FUNC(h8_timer16_channel_device::tior_r), FUNC(h8_timer16_channel_device::tior_w));
@@ -262,16 +231,13 @@ void h8s2320_device::map(address_map &map)
map(0xfffff8, 0xfffffb).rw(m_timer16_2, FUNC(h8_timer16_channel_device::tgr_r), FUNC(h8_timer16_channel_device::tgr_w));
}
-void h8s2320_device::device_add_mconfig(machine_config &config)
+void swx00_device::device_add_mconfig(machine_config &config)
{
H8S_INTC(config, m_intc, *this);
- H8_ADC_2320(config, m_adc, *this, m_intc, 28);
- if(type() != H8S2321) {
- H8S_DMA(config, m_dma, *this);
- H8S_DMA_CHANNEL(config, m_dma0, *this, m_dma, m_intc);
- H8S_DMA_CHANNEL(config, m_dma1, *this, m_dma, m_intc);
- }
- H8_DTC(config, m_dtc, *this, m_intc, 24);
+ H8_ADC_2357(config, m_adc, *this, m_intc, 28);
+ H8S_DMA(config, m_dma, *this);
+ H8S_DMA_CHANNEL(config, m_dma0, *this, m_dma, m_intc);
+ H8S_DMA_CHANNEL(config, m_dma1, *this, m_dma, m_intc);
H8_PORT(config, m_port1, *this, h8_device::PORT_1, 0x00, 0x00);
H8_PORT(config, m_port2, *this, h8_device::PORT_2, 0x00, 0x00);
H8_PORT(config, m_port3, *this, h8_device::PORT_3, 0xc0, 0xc0);
@@ -342,48 +308,67 @@ void h8s2320_device::device_add_mconfig(machine_config &config)
h8_timer16_channel_device::INPUT_C,
h8_timer16_channel_device::DIV_256,
h8_timer16_channel_device::INPUT_D);
+
+ H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::S);
H8_SCI(config, m_sci[0], 0, *this, m_intc, 80, 81, 82, 83);
H8_SCI(config, m_sci[1], 1, *this, m_intc, 84, 85, 86, 87);
H8_SCI(config, m_sci[2], 2, *this, m_intc, 88, 89, 90, 91);
- H8_WATCHDOG(config, m_watchdog, *this, m_intc, 25, h8_watchdog_device::H);
+
+ SWX00_SOUND(config, m_swx00);
+ m_swx00->set_space(DEVICE_SELF, AS_S);
+ m_swx00->add_route(0, DEVICE_SELF, 1.0, 0);
+ m_swx00->add_route(1, DEVICE_SELF, 1.0, 1);
}
-void h8s2320_device::execute_set_input(int inputnum, int state)
+device_memory_interface::space_config_vector swx00_device::memory_space_config() const
{
- if(inputnum == H8_INPUT_LINE_TEND0 || inputnum == H8_INPUT_LINE_TEND1)
- m_tend_cb[inputnum - H8_INPUT_LINE_TEND0](state);
- else if(inputnum == H8_INPUT_LINE_DREQ0 || inputnum == H8_INPUT_LINE_DREQ1)
- m_dma->set_input(inputnum, state);
- else
- m_intc->set_input(inputnum, state);
+ return space_config_vector {
+ std::make_pair(AS_C, &m_program_config),
+ std::make_pair(AS_S, &m_s_config)
+ };
}
-bool h8s2320_device::exr_in_stack() const
+
+void swx00_device::execute_set_input(int inputnum, int state)
+{
+ m_intc->set_input(inputnum, state);
+}
+
+bool swx00_device::exr_in_stack() const
{
return m_syscr & 0x20;
}
-int h8s2320_device::trace_setup()
+int swx00_device::trace_setup()
{
- m_CCR |= F_I;
+ if(m_syscr & 0x10)
+ m_CCR |= F_I|F_UI;
+ else
+ m_CCR |= F_I;
m_EXR &= ~EXR_T;
return 5;
}
-int h8s2320_device::trapa_setup()
+int swx00_device::trapa_setup()
{
- m_CCR |= F_I;
+ if(m_syscr & 0x10)
+ m_CCR |= F_I|F_UI;
+ else
+ m_CCR |= F_I;
if(m_syscr & 0x20)
m_EXR &= ~EXR_T;
return 8;
}
-void h8s2320_device::irq_setup()
+void swx00_device::irq_setup()
{
switch(m_syscr & 0x30) {
case 0x00:
m_CCR |= F_I;
break;
+ case 0x10:
+ m_CCR |= F_I|F_UI;
+ break;
case 0x20:
m_EXR = m_EXR & (EXR_NC);
if(m_taken_irq_level == 8)
@@ -391,10 +376,18 @@ void h8s2320_device::irq_setup()
else
m_EXR |= m_taken_irq_level;
break;
+ case 0x30:
+ m_CCR |= F_I|F_UI;
+ m_EXR = m_EXR & (EXR_NC);
+ if(m_taken_irq_level == 8)
+ m_EXR |= 7;
+ else
+ m_EXR |= m_taken_irq_level;
+ break;
}
}
-void h8s2320_device::update_irq_filter()
+void swx00_device::update_irq_filter()
{
switch(m_syscr & 0x30) {
case 0x00:
@@ -403,21 +396,36 @@ void h8s2320_device::update_irq_filter()
else
m_intc->set_filter(0, -1);
break;
+ case 0x10:
+ if((m_CCR & (F_I|F_UI)) == (F_I|F_UI))
+ m_intc->set_filter(2, -1);
+ else if(m_CCR & F_I)
+ m_intc->set_filter(1, -1);
+ else
+ m_intc->set_filter(0, -1);
+ break;
case 0x20:
m_intc->set_filter(0, m_EXR & 7);
break;
+ case 0x30:
+ if((m_CCR & (F_I|F_UI)) == (F_I|F_UI))
+ m_intc->set_filter(2, m_EXR & 7);
+ else if(m_CCR & F_I)
+ m_intc->set_filter(1, m_EXR & 7);
+ else
+ m_intc->set_filter(0, m_EXR & 7);
+ break;
}
}
-void h8s2320_device::interrupt_taken()
+void swx00_device::interrupt_taken()
{
standard_irq_callback(m_intc->interrupt_taken(m_taken_irq_vector), m_NPC);
}
-void h8s2320_device::internal_update(uint64_t current_time)
+void swx00_device::internal_update(u64 current_time)
{
- uint64_t event_time = 0;
-
+ u64 event_time = 0;
add_event(event_time, m_adc->internal_update(current_time));
add_event(event_time, m_sci[0]->internal_update(current_time));
add_event(event_time, m_sci[1]->internal_update(current_time));
@@ -435,28 +443,123 @@ void h8s2320_device::internal_update(uint64_t current_time)
recompute_bcount(event_time);
}
-void h8s2320_device::device_start()
+void swx00_device::notify_standby(int state)
+{
+ m_adc->notify_standby(state);
+ m_sci[0]->notify_standby(state);
+ m_sci[1]->notify_standby(state);
+ m_sci[2]->notify_standby(state);
+ m_timer8_0->notify_standby(state);
+ m_timer8_1->notify_standby(state);
+ m_timer16_0->notify_standby(state);
+ m_timer16_1->notify_standby(state);
+ m_timer16_2->notify_standby(state);
+ m_timer16_3->notify_standby(state);
+ m_timer16_4->notify_standby(state);
+ m_timer16_5->notify_standby(state);
+ m_watchdog->notify_standby(state);
+}
+
+void swx00_device::device_start()
{
h8s2000_device::device_start();
- m_dma_device = m_dma;
- m_dtc_device = m_dtc;
+ save_item(NAME(m_syscr));
+ save_item(NAME(m_pdt));
+ save_item(NAME(m_pdt_ddr));
+ save_item(NAME(m_pad));
+
+ space(AS_S).specific(m_s);
+
}
-void h8s2320_device::device_reset()
+void swx00_device::device_reset()
{
h8s2000_device::device_reset();
m_syscr = 0x01;
+ m_pdt = 0xffff;
+ m_pdt_ddr = 0x0000;
+ m_pad = 0xff;
}
-uint8_t h8s2320_device::syscr_r()
+u8 swx00_device::syscr_r()
{
return m_syscr;
}
-void h8s2320_device::syscr_w(uint8_t data)
+void swx00_device::syscr_w(u8 data)
{
m_syscr = data;
- m_mac_saturating = m_syscr & 0x80;
update_irq_filter();
logerror("syscr = %02x\n", data);
}
+
+u16 swx00_device::pdt_default_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked port pad (PC=%X)\n", m_PPC);
+ return 0xffff;
+}
+
+void swx00_device::pdt_default_w(u16 data)
+{
+ logerror("write of un-hooked port pdt %04x\n", data);
+}
+
+u8 swx00_device::pad_default_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked port pad (PC=%X)\n", m_PPC);
+ return 0xff;
+}
+
+void swx00_device::pad_default_w(u8 data)
+{
+ logerror("write of un-hooked port pad %02x\n", data);
+}
+
+void swx00_device::cmah_default_w(u8 data)
+{
+ logerror("write of un-hooked port cmah %02x\n", data);
+}
+
+void swx00_device::txd_default_w(u8 data)
+{
+ logerror("write of un-hooked port txd %02x\n", data);
+}
+
+void swx00_device::pdt_ddr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pdt_ddr);
+}
+
+u16 swx00_device::pdt_r()
+{
+ return (m_pdt & m_pdt_ddr) | (m_read_pdt() & ~m_pdt_ddr);
+}
+
+void swx00_device::pdt_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pdt);
+ m_write_pdt(m_pdt | ~m_pdt_ddr);
+}
+
+u8 swx00_device::pad_r()
+{
+ return m_read_pad();
+}
+
+void swx00_device::pad_w(u8 data)
+{
+ m_write_pad(data);
+}
+
+void swx00_device::cmah_w(u8 data)
+{
+ m_write_cmah(data);
+}
+
+void swx00_device::txd_w(u8 data)
+{
+ m_write_txd(data);
+}
+
diff --git a/src/devices/cpu/h8/swx00.h b/src/devices/cpu/h8/swx00.h
new file mode 100644
index 00000000000..256dc497625
--- /dev/null
+++ b/src/devices/cpu/h8/swx00.h
@@ -0,0 +1,152 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sxw00.h
+
+ Yamaha sound generator including a h8s2000 core, an AWM2 sound generator,
+ a dsp and a bunch of more standard h8 peripherals.
+
+ It has two buses, "s" and "c". What is on which depends on the mode bits.
+ Bit 0 is called "Dual" and bit1 "separate". It's not sure yet but it may
+ be that the h8 core can be disabled, or an internal "pass the data to the
+ peripherals" internal program can be activated.
+
+ Mode H8 S C Example
+ 0 on program+wave roms effects ram MU15
+ 0 on program+wave roms effects ram QY100 sub
+ 1 on wave rom, effects ram program rom+ram PSR340
+ 1 on effects ram program rom+ram QY100 main
+ 3 off? wave rom effects ram PSR540
+
+
+
+***************************************************************************/
+
+#ifndef MAME_CPU_H8_SWX00_H
+#define MAME_CPU_H8_SWX00_H
+
+#pragma once
+
+#include "h8s2000.h"
+#include "h8_intc.h"
+#include "h8_adc.h"
+#include "h8_dma.h"
+#include "h8_port.h"
+#include "h8_timer8.h"
+#include "h8_timer16.h"
+#include "h8_sci.h"
+#include "h8_watchdog.h"
+#include "sound/swx00.h"
+
+class swx00_device : public h8s2000_device, public device_mixer_interface {
+public:
+ enum {
+ AS_C = AS_PROGRAM,
+ AS_S = AS_DATA
+ };
+
+ enum {
+ MODE_DUAL = 1,
+ MODE_SEPARATE = 2
+ };
+
+ swx00_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u8 mode = 0);
+
+ auto read_pdt() { return m_read_pdt.bind(); }
+ auto write_pdt() { return m_write_pdt.bind(); }
+ auto read_pad() { return m_read_pad.bind(); }
+ auto write_pad() { return m_write_pad.bind(); }
+ auto write_cmah() { return m_write_cmah.bind(); }
+ auto write_txd() { return m_write_txd.bind(); }
+
+ u8 syscr_r();
+ void syscr_w(u8 data);
+
+protected:
+ required_device<h8s_intc_device> m_intc;
+ required_device<h8_adc_device> m_adc;
+ required_device<h8s_dma_device> m_dma;
+ required_device<h8s_dma_channel_device> m_dma0;
+ required_device<h8s_dma_channel_device> m_dma1;
+ required_device<h8_port_device> m_port1;
+ required_device<h8_port_device> m_port2;
+ required_device<h8_port_device> m_port3;
+ required_device<h8_port_device> m_port4;
+ required_device<h8_port_device> m_port5;
+ required_device<h8_port_device> m_port6;
+ required_device<h8_port_device> m_porta;
+ required_device<h8_port_device> m_portb;
+ required_device<h8_port_device> m_portc;
+ required_device<h8_port_device> m_portd;
+ required_device<h8_port_device> m_porte;
+ required_device<h8_port_device> m_portf;
+ required_device<h8_port_device> m_portg;
+ required_device<h8h_timer8_channel_device> m_timer8_0;
+ required_device<h8h_timer8_channel_device> m_timer8_1;
+ required_device<h8_timer16_device> m_timer16;
+ required_device<h8s_timer16_channel_device> m_timer16_0;
+ required_device<h8s_timer16_channel_device> m_timer16_1;
+ required_device<h8s_timer16_channel_device> m_timer16_2;
+ required_device<h8s_timer16_channel_device> m_timer16_3;
+ required_device<h8s_timer16_channel_device> m_timer16_4;
+ required_device<h8s_timer16_channel_device> m_timer16_5;
+ required_device<h8_watchdog_device> m_watchdog;
+
+ required_device<swx00_sound_device> m_swx00;
+
+ devcb_read16 m_read_pdt;
+ devcb_write16 m_write_pdt;
+ devcb_read8 m_read_pad;
+ devcb_write8 m_write_pad;
+ devcb_write8 m_write_cmah;
+ devcb_write8 m_write_txd;
+
+ address_space_config m_s_config;
+
+ memory_access<24, 1, -1, ENDIANNESS_BIG>::specific m_s;
+
+ u16 m_pdt, m_pdt_ddr;
+ u8 m_pad;
+
+ u8 m_mode;
+ u8 m_syscr;
+
+ virtual bool exr_in_stack() const override;
+ virtual void update_irq_filter() override;
+ virtual void interrupt_taken() override;
+ virtual int trace_setup() override;
+ virtual int trapa_setup() override;
+ virtual void irq_setup() override;
+ virtual void internal_update(u64 current_time) override;
+ virtual void notify_standby(int state) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override;
+
+ u16 s_r(offs_t offset);
+
+ void pdt_ddr_w(offs_t, u16 data, u16 mem_mask);
+ u16 pdt_r();
+ void pdt_w(offs_t, u16 data, u16 mem_mask);
+ u8 pad_r();
+ void pad_w(u8 data);
+ void cmah_w(u8 data);
+ void txd_w(u8 data);
+
+ u16 pdt_default_r();
+ void pdt_default_w(u16 data);
+ u8 pad_default_r();
+ void pad_default_w(u8 data);
+ void cmah_default_w(u8 data);
+ void txd_default_w(u8 data);
+
+ void map(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+};
+
+DECLARE_DEVICE_TYPE(SWX00, swx00_device)
+
+#endif // MAME_CPU_H8_SWX00_H
diff --git a/src/devices/cpu/h8500/h8500.cpp b/src/devices/cpu/h8500/h8500.cpp
index b022749197c..8160da62fe2 100644
--- a/src/devices/cpu/h8500/h8500.cpp
+++ b/src/devices/cpu/h8500/h8500.cpp
@@ -15,8 +15,8 @@
h8500_device::h8500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, int buswidth, int ramsize, int defmode, address_map_constructor map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, buswidth, addrbits, 0, map)
- , m_ram_config("intram", ENDIANNESS_BIG, 16, ramsize, 0, address_map_constructor(FUNC(h8500_device::ram_map), this))
, m_mode_control(defmode)
+ , m_ram_size((1 << ramsize) - 1)
, m_pc(0)
, m_ppc(0)
, m_sr(0)
@@ -43,19 +43,11 @@ std::unique_ptr<util::disasm_interface> h8500_device::create_disassembler()
device_memory_interface::space_config_vector h8500_device::memory_space_config() const
{
- return m_ram_config.addr_width() == 0 ? space_config_vector {
+ return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config)
- } : space_config_vector {
- std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(AS_DATA, &m_ram_config)
};
}
-void h8500_device::ram_map(address_map &map)
-{
- map(0, (1 << m_ram_config.addr_width()) - 1).ram();
-}
-
void h8500_device::debug_set_pc(offs_t pc) noexcept
{
m_pc = m_ppc = pc & 0xffff;
@@ -66,8 +58,6 @@ void h8500_device::debug_set_pc(offs_t pc) noexcept
void h8500_device::device_start()
{
m_program = &space(AS_PROGRAM);
- if (has_space(AS_DATA))
- space(AS_DATA).cache(m_ram_cache);
set_icountptr(m_icount);
diff --git a/src/devices/cpu/h8500/h8500.h b/src/devices/cpu/h8500/h8500.h
index 3755ab7a4ab..ea71f0e70d3 100644
--- a/src/devices/cpu/h8500/h8500.h
+++ b/src/devices/cpu/h8500/h8500.h
@@ -25,8 +25,8 @@ protected:
// device-level overrides
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
@@ -46,17 +46,15 @@ protected:
virtual bool h8_maximum_mode() const noexcept { return m_mode_control == 3 || m_mode_control == 4; } // all except H8/570
private:
- void ram_map(address_map &map);
void debug_set_pc(offs_t pc) noexcept;
// address spaces
address_space_config m_program_config;
- address_space_config m_ram_config;
address_space *m_program;
- memory_access<11, 1, 0, ENDIANNESS_BIG>::cache m_ram_cache;
// misc. configuration
u8 m_mode_control;
+ [[maybe_unused]] u16 m_ram_size;
// internal registers
u16 m_pc;
diff --git a/src/devices/cpu/h8500/h8510.h b/src/devices/cpu/h8500/h8510.h
index 1cbefe87aa3..48db52b624f 100644
--- a/src/devices/cpu/h8500/h8510.h
+++ b/src/devices/cpu/h8500/h8510.h
@@ -14,7 +14,7 @@ protected:
h8510_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hd6415108_device : public h8510_device
diff --git a/src/devices/cpu/h8500/h8520.cpp b/src/devices/cpu/h8500/h8520.cpp
index 459a979da98..753608467f0 100644
--- a/src/devices/cpu/h8500/h8520.cpp
+++ b/src/devices/cpu/h8500/h8520.cpp
@@ -31,6 +31,7 @@ void h8520_device::internal_map(address_map &map)
{
if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
map(0x0000, 0x3fff).rom().region(DEVICE_SELF, 0);
+ map(0xfd80, 0xff7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
#if 0
map(0xff80, 0xff80).w(FUNC(h8520_device::p1ddr_w));
map(0xff81, 0xff81).w(FUNC(h8520_device::p2ddr_w));
diff --git a/src/devices/cpu/h8500/h8520.h b/src/devices/cpu/h8500/h8520.h
index 7f66327c796..749de392b69 100644
--- a/src/devices/cpu/h8500/h8520.h
+++ b/src/devices/cpu/h8500/h8520.h
@@ -14,7 +14,7 @@ protected:
h8520_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hd6435208_device : public h8520_device
diff --git a/src/devices/cpu/h8500/h8532.cpp b/src/devices/cpu/h8500/h8532.cpp
index 20c9869c4ee..0f4dbd18e05 100644
--- a/src/devices/cpu/h8500/h8532.cpp
+++ b/src/devices/cpu/h8500/h8532.cpp
@@ -31,6 +31,7 @@ void h8532_device::internal_map(address_map &map)
{
if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
map(0x0000, 0x7fff).rom().region(DEVICE_SELF, 0);
+ map(0xfb80, 0xff7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
#if 0
map(0xff80, 0xff80).w(FUNC(h8532_device::p1ddr_w));
map(0xff81, 0xff81).w(FUNC(h8532_device::p2ddr_w));
diff --git a/src/devices/cpu/h8500/h8532.h b/src/devices/cpu/h8500/h8532.h
index 71ec652a465..d508ea09092 100644
--- a/src/devices/cpu/h8500/h8532.h
+++ b/src/devices/cpu/h8500/h8532.h
@@ -14,7 +14,7 @@ protected:
h8532_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hd6435328_device : public h8532_device
diff --git a/src/devices/cpu/h8500/h8534.cpp b/src/devices/cpu/h8500/h8534.cpp
index 06c9b0dc24f..6d32e58df86 100644
--- a/src/devices/cpu/h8500/h8534.cpp
+++ b/src/devices/cpu/h8500/h8534.cpp
@@ -53,6 +53,7 @@ void h8534_device::internal_map(address_map &map)
{
if (mode_control() == 2 || mode_control() == 4 || mode_control() == 7)
map(0x0000, 0x7fff).rom().region(DEVICE_SELF, 0);
+ map(0xf680, 0xfe7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
register_field_map(map);
}
@@ -62,6 +63,7 @@ void h8536_device::internal_map(address_map &map)
map(0x0000, 0xee7f).rom().region(DEVICE_SELF, 0);
else if (mode_control() == 4 || mode_control() == 7)
map(0x0000, 0xf67f).rom().region(DEVICE_SELF, 0);
+ map(0xf680, 0xfe7f).ram(); // TODO: may be disabled by writing 0 to RAME bit in RAMCR
register_field_map(map);
}
diff --git a/src/devices/cpu/h8500/h8534.h b/src/devices/cpu/h8500/h8534.h
index 2fad7985a70..9c7deea594c 100644
--- a/src/devices/cpu/h8500/h8534.h
+++ b/src/devices/cpu/h8500/h8534.h
@@ -15,10 +15,10 @@ protected:
h8534_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
h8534_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
- void register_field_map(address_map &map);
+ void register_field_map(address_map &map) ATTR_COLD;
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hd6435348_device : public h8534_device
@@ -41,7 +41,7 @@ protected:
h8536_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hd6435368_device : public h8536_device
diff --git a/src/devices/cpu/hcd62121/hcd62121.cpp b/src/devices/cpu/hcd62121/hcd62121.cpp
index 00faac4f7a2..7c68349f6a9 100644
--- a/src/devices/cpu/hcd62121/hcd62121.cpp
+++ b/src/devices/cpu/hcd62121/hcd62121.cpp
@@ -21,8 +21,11 @@ TODO:
#include "emu.h"
#include "hcd62121.h"
+
#include "hcd62121d.h"
+#include "multibyte.h"
+
enum
{
@@ -39,7 +42,7 @@ enum
HCD62121_R70, HCD62121_R74, HCD62121_R78, HCD62121_R7C
};
-
+constexpr u8 FLAG_INPUT = 0x20;
constexpr u8 FLAG_CL = 0x10;
constexpr u8 FLAG_Z = 0x08;
constexpr u8 FLAG_C = 0x04;
@@ -61,6 +64,16 @@ hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const ch
, m_dseg(0)
, m_sseg(0)
, m_f(0)
+ , m_time(0)
+ , m_time_op(0)
+ , m_unk_f5(0)
+ , m_cycles_until_timeout(0)
+ , m_is_timer_started(false)
+ , m_is_timer_irq_enabled(false)
+ , m_is_timer_irq_asserted(false)
+ , m_is_timer_wait_elapsed(true)
+ , m_is_infinite_timeout(false)
+ , m_timer_cycles(0)
, m_lar(0)
, m_opt(0)
, m_port(0)
@@ -72,6 +85,7 @@ hcd62121_cpu_device::hcd62121_cpu_device(const machine_config &mconfig, const ch
, m_opt_cb(*this)
, m_ki_cb(*this, 0)
, m_in0_cb(*this, 0)
+ , m_input_flag_cb(*this, 0)
{
}
@@ -82,6 +96,15 @@ device_memory_interface::space_config_vector hcd62121_cpu_device::memory_space_c
};
}
+TIMER_CALLBACK_MEMBER(hcd62121_cpu_device::timer_tick)
+{
+ // TODO - Only stores seconds? How can it stop/reset?
+ if (m_is_timer_started)
+ {
+ m_time = (m_time + 1) % 60;
+ }
+}
+
u8 hcd62121_cpu_device::read_op()
{
u8 d = m_program->read_byte( ( m_cseg << 16 ) | m_ip );
@@ -127,15 +150,42 @@ void hcd62121_cpu_device::write_reg(int size, u8 op1)
if (op1 & 0x80)
{
for (int i = 0; i < size; i++)
- m_reg[(op1 - i) & 0x7f] = m_temp1[i];
+ set_reg((op1 - i) & 0x7f, m_temp1[i]);
}
else
{
for (int i = 0; i < size; i++)
- m_reg[(op1 + i) & 0x7f] = m_temp1[i];
+ set_reg((op1 + i) & 0x7f, m_temp1[i]);
+ }
+}
+
+
+void hcd62121_cpu_device::read_ireg(int size, u8 op1)
+{
+ u16 ad = m_reg[(0x40 | op1) & 0x7f ] | (m_reg[(0x40 | (op1 + 1)) & 0x7f] << 8);
+
+ for (int i = 0; i < size; i++)
+ {
+ m_temp1[i] = m_program->read_byte((m_dseg << 16) | ad);
+ ad += (op1 & 0x40) ? -1 : 1;
+ }
+ m_lar = ad;
+}
+
+
+void hcd62121_cpu_device::write_ireg(int size, u8 op1)
+{
+ u16 ad = m_reg[(0x40 | op1) & 0x7f] | (m_reg[(0x40 | (op1 + 1)) & 0x7f] << 8);
+
+ for (int i = 0; i < size; i++)
+ {
+ m_program->write_byte((m_dseg << 16) | ad, m_temp1[i]);
+ ad += (op1 & 0x40) ? -1 : 1;
}
+ m_lar = ad;
}
+
void hcd62121_cpu_device::read_regreg(int size, u8 op1, u8 op2, bool copy_extend_immediate)
{
for (int i = 0; i < size; i++)
@@ -174,13 +224,13 @@ void hcd62121_cpu_device::write_regreg(int size, u8 arg1, u8 arg2)
{
/* store in arg1 */
for (int i = 0; i < size; i++)
- m_reg[(arg1 + i) & 0x7f] = m_temp1[i];
+ set_reg((arg1 + i) & 0x7f, m_temp1[i]);
}
else
{
/* store in arg2 */
for (int i = 0; i < size; i++)
- m_reg[(arg2 + i) & 0x7f] = m_temp1[i];
+ set_reg((arg2 + i) & 0x7f, m_temp1[i]);
}
}
@@ -241,7 +291,7 @@ void hcd62121_cpu_device::write_iregreg(int size, u8 op1, u8 op2)
{
/* store in reg2 */
for (int i = 0; i < size; i++)
- m_reg[(op2 + i) & 0x7f] = m_temp1[i];
+ set_reg((op2 + i) & 0x7f, m_temp1[i]);
}
}
@@ -252,7 +302,7 @@ void hcd62121_cpu_device::write_iregreg2(int size, u8 op1, u8 op2)
{
/* store in reg2 */
for (int i = 0; i < size; i++)
- m_reg[(op2 + i) & 0x7f] = m_temp2[i];
+ set_reg((op2 + i) & 0x7f, m_temp2[i]);
}
else
{
@@ -306,6 +356,9 @@ void hcd62121_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
+ m_timer = timer_alloc(FUNC(hcd62121_cpu_device::timer_tick), this);
+ m_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1));
+
save_item(NAME(m_prev_pc));
save_item(NAME(m_sp));
save_item(NAME(m_ip));
@@ -314,13 +367,24 @@ void hcd62121_cpu_device::device_start()
save_item(NAME(m_dseg));
save_item(NAME(m_sseg));
save_item(NAME(m_f));
+ save_item(NAME(m_time));
+ save_item(NAME(m_time_op));
+ save_item(NAME(m_unk_f5));
+ save_item(NAME(m_cycles_until_timeout));
+ save_item(NAME(m_is_timer_started));
+ save_item(NAME(m_is_timer_irq_enabled));
+ save_item(NAME(m_is_timer_irq_asserted));
+ save_item(NAME(m_is_timer_wait_elapsed));
+ save_item(NAME(m_is_infinite_timeout));
+ save_item(NAME(m_timer_cycles));
save_item(NAME(m_lar));
save_item(NAME(m_reg));
- save_item(NAME(m_temp1));
- save_item(NAME(m_temp2));
save_item(NAME(m_opt));
save_item(NAME(m_port));
+ save_item(NAME(m_temp1));
+ save_item(NAME(m_temp2));
+
// Register state for debugger
state_add(STATE_GENPC, "GENPC", m_rtemp).callexport().formatstr("%8s");
state_add(STATE_GENPCBASE,"CURPC", m_rtemp).callexport().formatstr("%8s");
@@ -335,51 +399,67 @@ void hcd62121_cpu_device::device_start()
state_add(HCD62121_DSIZE, "DSIZE", m_dsize).callimport().callexport().formatstr("%02X");
state_add(HCD62121_F, "F", m_f ).callimport().callexport().formatstr("%02X");
- state_add(HCD62121_R00, "R00", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R04, "R04", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R08, "R08", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R0C, "R0C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R10, "R10", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R14, "R14", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R18, "R18", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R1C, "R1C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R20, "R20", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R24, "R24", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R28, "R28", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R2C, "R2C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R30, "R30", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R34, "R34", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R38, "R38", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R3C, "R3C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R40, "R40", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R44, "R44", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R48, "R48", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R4C, "R4C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R50, "R50", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R54, "R54", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R58, "R58", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R5C, "R5C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R60, "R60", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R64, "R64", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R68, "R68", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R6C, "R6C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R70, "R70", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R74, "R74", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R78, "R78", m_reg[0x00]).callimport().callexport().formatstr("%8s");
- state_add(HCD62121_R7C, "R7C", m_reg[0x00]).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R00, "R00", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R04, "R04", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R08, "R08", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R0C, "R0C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R10, "R10", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R14, "R14", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R18, "R18", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R1C, "R1C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R20, "R20", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R24, "R24", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R28, "R28", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R2C, "R2C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R30, "R30", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R34, "R34", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R38, "R38", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R3C, "R3C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R40, "R40", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R44, "R44", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R48, "R48", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R4C, "R4C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R50, "R50", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R54, "R54", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R58, "R58", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R5C, "R5C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R60, "R60", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R64, "R64", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R68, "R68", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R6C, "R6C", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R70, "R70", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R74, "R74", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R78, "R78", m_debugger_temp).callimport().callexport().formatstr("%8s");
+ state_add(HCD62121_R7C, "R7C", m_debugger_temp).callimport().callexport().formatstr("%8s");
set_icountptr(m_icount);
}
+void hcd62121_cpu_device::state_import(const device_state_entry &entry)
+{
+ if ((entry.index() >= HCD62121_R00) && (entry.index() <= HCD62121_R7C))
+ {
+ put_u32be(&m_reg[(entry.index() - HCD62121_R00) * 4], m_debugger_temp);
+ }
+}
+
+
void hcd62121_cpu_device::state_export(const device_state_entry &entry)
{
- switch (entry.index())
+ if ((entry.index() >= HCD62121_R00) && (entry.index() <= HCD62121_R7C))
{
- case STATE_GENPC:
- case STATE_GENPCBASE:
- m_rtemp = (m_cseg << 16) | m_ip;
- break;
+ m_debugger_temp = get_u32be(&m_reg[(entry.index() - HCD62121_R00) * 4]);
+ }
+ else
+ {
+ switch (entry.index())
+ {
+ case STATE_GENPC:
+ case STATE_GENPCBASE:
+ m_rtemp = (m_cseg << 16) | m_ip;
+ break;
+ }
}
}
@@ -399,9 +479,7 @@ void hcd62121_cpu_device::state_string_export(const device_state_entry &entry, s
m_f & FLAG_CL ? "CL":"__",
m_f & FLAG_ZL ? "ZL":"__",
m_f & FLAG_C ? 'C':'_',
- m_f & FLAG_Z ? 'Z':'_'
- );
-
+ m_f & FLAG_Z ? 'Z':'_');
break;
case HCD62121_R00:
@@ -508,12 +586,22 @@ void hcd62121_cpu_device::device_reset()
{
m_sp = 0x0000;
m_ip = 0x0000;
+ m_dsize = 0;
m_cseg = 0;
m_dseg = 0;
m_sseg = 0;
- m_lar = 0;
m_f = 0;
- m_dsize = 0;
+ m_time = 0;
+ m_time_op = 0;
+ m_unk_f5 = 0;
+ m_cycles_until_timeout = 0;
+ m_is_timer_started = false;
+ m_is_timer_irq_enabled = false;
+ m_is_timer_irq_asserted = false;
+ m_is_timer_wait_elapsed = true;
+ m_is_infinite_timeout = false;
+ m_timer_cycles = 0;
+ m_lar = 0;
m_opt = 0;
m_port = 0;
@@ -569,6 +657,15 @@ inline void hcd62121_cpu_device::set_cl_flag(bool is_cl)
}
+void hcd62121_cpu_device::set_input_flag(bool is_input_set)
+{
+ if (is_input_set)
+ m_f |= FLAG_INPUT;
+ else
+ m_f &= ~FLAG_INPUT;
+}
+
+
inline void hcd62121_cpu_device::op_msk(int size)
{
bool zero_high = true;
@@ -665,7 +762,8 @@ inline void hcd62121_cpu_device::op_add(int size)
for (int i = 0; i < size; i++)
{
- if (i == size - 1) {
+ if (i == size - 1)
+ {
set_cl_flag((m_temp1[i] & 0x0f) + (m_temp2[i] & 0x0f) + carry > 0x0f);
}
@@ -695,7 +793,8 @@ inline void hcd62121_cpu_device::op_addb(int size)
for (int i = 0; i < size; i++)
{
- if (i == size - 1) {
+ if (i == size - 1)
+ {
set_cl_flag((m_temp1[i] & 0x0f) + (m_temp2[i] & 0x0f) + carry > 9);
}
@@ -730,7 +829,8 @@ inline void hcd62121_cpu_device::op_subb(int size)
for (int i = 0; i < size; i++)
{
- if (i == size - 1) {
+ if (i == size - 1)
+ {
set_cl_flag((m_temp1[i] & 0x0f) - (m_temp2[i] & 0x0f) - carry < 0);
}
@@ -764,7 +864,8 @@ inline void hcd62121_cpu_device::op_sub(int size)
for (int i = 0; i < size; i++)
{
- if (i == size - 1) {
+ if (i == size - 1)
+ {
set_cl_flag((m_temp1[i] & 0x0f) - (m_temp2[i] & 0x0f) - carry < 0);
}
@@ -785,15 +886,29 @@ inline void hcd62121_cpu_device::op_sub(int size)
}
+inline void hcd62121_cpu_device::op_pushb(u8 source)
+{
+ m_program->write_byte((m_sseg << 16) | m_sp, source);
+ m_sp--;
+}
+
+
inline void hcd62121_cpu_device::op_pushw(u16 source)
{
- m_program->write_byte(( m_sseg << 16) | m_sp, source & 0xff);
+ m_program->write_byte((m_sseg << 16) | m_sp, source & 0xff);
m_sp--;
- m_program->write_byte(( m_sseg << 16) | m_sp, source >> 8);
+ m_program->write_byte((m_sseg << 16) | m_sp, source >> 8);
m_sp--;
}
+inline u8 hcd62121_cpu_device::op_popb()
+{
+ m_sp++;
+ return m_program->read_byte((m_sseg << 16) | m_sp);
+}
+
+
inline u16 hcd62121_cpu_device::op_popw()
{
m_sp++;
@@ -804,11 +919,63 @@ inline u16 hcd62121_cpu_device::op_popw()
return res;
}
+void hcd62121_cpu_device::timer_elapsed()
+{
+ m_is_timer_wait_elapsed = true;
+
+ if (m_is_timer_irq_enabled)
+ {
+ m_is_timer_irq_asserted = true;
+
+ // Call timer interrupt vector.
+ op_pushb(m_cseg);
+ op_pushw(m_ip);
+ m_cseg = 0x00;
+ m_ip = 0x0008;
+ }
+}
void hcd62121_cpu_device::execute_run()
{
do
{
+ if (m_ki_cb() != 0 && m_input_flag_cb() == 0)
+ {
+ m_is_timer_wait_elapsed = true;
+ m_is_infinite_timeout = false;
+ }
+
+ if (m_input_flag_cb() != 0)
+ {
+ set_input_flag(false);
+ }
+
+ if (m_is_infinite_timeout && !m_is_timer_wait_elapsed)
+ {
+ m_icount = 0;
+ }
+ else if (m_cycles_until_timeout > 0 && !m_is_timer_irq_asserted)
+ {
+ int cycles_to_consume = std::min(m_cycles_until_timeout, m_icount);
+ m_cycles_until_timeout -= cycles_to_consume;
+
+ if (!m_is_timer_wait_elapsed)
+ {
+ // It's a blocking wait, consume as much as possible in this quantum.
+ m_icount -= cycles_to_consume;
+ }
+
+ if (m_cycles_until_timeout <= 0)
+ {
+ m_cycles_until_timeout += m_timer_cycles;
+ timer_elapsed();
+ }
+ }
+ if (m_icount <= 0)
+ {
+ break;
+ }
+
offs_t pc = (m_cseg << 16) | m_ip;
debugger_instruction_hook(pc);
@@ -829,9 +996,11 @@ void hcd62121_cpu_device::execute_run()
u8 reg1 = read_op();
// TODO - read_reg should support reading this
- if (reg1 & 0x80) {
+ if (reg1 & 0x80)
+ {
read_reg(size, (reg1 & 0x7f) - size + 1);
- for (int i=0; i < size - 1; i++) {
+ for (int i=0; i < size - 1; i++)
+ {
m_temp1[i] = m_temp1[i + 1];
}
m_temp1[size-1] = 0;
@@ -840,7 +1009,8 @@ void hcd62121_cpu_device::execute_run()
else
{
read_reg(size, reg1);
- for (int i = size-1; i > 0; i--) {
+ for (int i = size-1; i > 0; i--)
+ {
m_temp1[i] = m_temp1[i - 1];
}
m_temp1[0] = 0;
@@ -1151,6 +1321,90 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0x40: /* shrb/shlb ir1,8 */
+ case 0x41: /* shrw/shlw ir1,8 */
+ case 0x42: /* shrq/shlq ir1,8 */
+ case 0x43: /* shrt/shlt ir1,8 */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+
+ // TODO - read_ireg should support reading this
+ if (reg1 & 0x80)
+ {
+ read_ireg(size, (reg1 & 0x7f) - size + 1);
+ for (int i=0; i < size - 1; i++)
+ {
+ m_temp1[i] = m_temp1[i + 1];
+ }
+ m_temp1[size-1] = 0;
+ write_ireg(size, (reg1 & 0x7f) - size + 1);
+ }
+ else
+ {
+ read_ireg(size, reg1);
+ for (int i = size-1; i > 0; i--)
+ {
+ m_temp1[i] = m_temp1[i - 1];
+ }
+ m_temp1[0] = 0;
+ write_ireg(size, reg1);
+ }
+ }
+ break;
+
+ case 0x44: /* mskb ir1,r2 */
+ case 0x45: /* mskw ir1,r2 */
+ case 0x46: /* mskq ir1,r2 */
+ case 0x47: /* mskt ir1,r2 */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+ u8 reg2 = read_op();
+
+ read_iregreg(size, reg1, reg2, true);
+
+ op_msk(size);
+ }
+ break;
+
+ case 0x48: /* shrb/shlb ir1,4 */
+ case 0x49: /* shrw/shlw ir1,4 */
+ case 0x4A: /* shrq/shlq ir1,4 */
+ case 0x4B: /* shrt/shlt ir1,4 */
+ /* Nibble shift */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+ u8 d1 = 0, d2 = 0;
+
+ read_ireg(size, reg1);
+
+ if (reg1 & 0x80)
+ {
+ // shift right
+ for (int i = 0; i < size; i++)
+ {
+ d1 = (m_temp1[i] & 0x0f) << 4;
+ m_temp1[i] = (m_temp1[i] >> 4) | d2;
+ d2 = d1;
+ }
+ }
+ else
+ {
+ // shift left
+ for (int i = 0; i < size; i++)
+ {
+ d1 = (m_temp1[i] & 0xf0) >> 4;
+ m_temp1[i] = (m_temp1[i] << 4) | d2;
+ d2 = d1;
+ }
+ }
+
+ write_ireg(size, reg1);
+ }
+ break;
+
case 0x4C: /* testb ir1,r2 */
case 0x4D: /* testw ir1,r2 */
case 0x4E: /* testq ir1,r2 */
@@ -1231,6 +1485,41 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0x60: /* shrb ir1,1 */
+ case 0x61: /* shrw ir1,1 */
+ case 0x62: /* shrq ir1,1 */
+ case 0x63: /* shrt ir1,1 */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+ u8 d1 = 0, d2 = 0;
+ bool zero_high = true;
+ bool zero_low = true;
+
+ read_ireg(size, reg1);
+
+ d2 = 0;
+ set_cl_flag ((m_temp1[0] & (1U<<4)) != 0U);
+ for (int i = 0; i < size; i++)
+ {
+ d1 = (m_temp1[i] & 0x01) << 7;
+ m_temp1[i] = (m_temp1[i] >> 1) | d2;
+ d2 = d1;
+ if (m_temp1[i] & 0xf0)
+ zero_high = false;
+ if (m_temp1[i] & 0x0f)
+ zero_low = false;
+ }
+
+ write_ireg(size, reg1);
+
+ set_zero_flag(zero_high && zero_low);
+ set_zh_flag(zero_high);
+ set_zl_flag(zero_low);
+ set_carry_flag (d2 != 0);
+ }
+ break;
+
case 0x64: /* orb ir1,r2 */
case 0x65: /* orb ir1,r2 */
case 0x66: /* orb ir1,r2 */
@@ -1248,6 +1537,40 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0x68: /* shlb ir1,1 */
+ case 0x69: /* shlw ir1,1 */
+ case 0x6A: /* shlq ir1,1 */
+ case 0x6B: /* shlt ir1,1 */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+ u8 d1 = 0, d2 = 0;
+ bool zero_high = true;
+ bool zero_low = true;
+
+ read_ireg(size, reg1);
+
+ set_cl_flag ((m_temp1[0] & (1U<<3)) != 0U);
+ for (int i = 0; i < size; i++)
+ {
+ d1 = (m_temp1[i] & 0x80) >> 7;
+ m_temp1[i] = (m_temp1[i] << 1) | d2;
+ d2 = d1;
+
+ if (m_temp1[i] & 0xf0)
+ zero_high = false;
+ if (m_temp1[i] & 0x0f)
+ zero_low = false;
+ }
+
+ write_ireg(size, reg1);
+ set_zero_flag(zero_high && zero_low);
+ set_zh_flag(zero_high);
+ set_zl_flag(zero_low);
+ set_carry_flag (d2 != 0);
+ }
+ break;
+
case 0x6C: /* andb ir1,r2 */
case 0x6D: /* andw ir1,r2 */
case 0x6E: /* andq ir1,r2 */
@@ -1265,6 +1588,23 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0x70: /* subbb ir1,r2 */
+ case 0x71: /* subbw ir1,r2 */
+ case 0x72: /* subbq ir1,r2 */
+ case 0x73: /* subbt ir1,r2 */
+ {
+ int size = datasize(op);
+ u8 reg1 = read_op();
+ u8 reg2 = read_op();
+
+ read_iregreg(size, reg1, reg2, false);
+
+ op_subb(size);
+
+ write_iregreg(size, reg1, reg2);
+ }
+ break;
+
case 0x74: /* subb ir1,r2 */
case 0x75: /* subw ir1,r2 */
case 0x76: /* subq ir1,r2 */
@@ -1349,7 +1689,8 @@ void hcd62121_cpu_device::execute_run()
case 0x8C: /* bstack_to_dmem */
{
int size = m_dsize + 1;
- for (int i=0; i < size; i++) {
+ for (int i=0; i < size; i++)
+ {
u8 byte = m_program->read_byte((m_sseg << 16) | m_sp);
m_program->write_byte((m_dseg << 16) | m_lar, byte);
m_sp--;
@@ -1361,7 +1702,8 @@ void hcd62121_cpu_device::execute_run()
case 0x8D: /* fstack_to_dmem */
{
int size = m_dsize + 1;
- for (int i=0; i < size; i++) {
+ for (int i=0; i < size; i++)
+ {
u8 byte = m_program->read_byte((m_sseg << 16) | m_sp);
m_program->write_byte((m_dseg << 16) | m_lar, byte);
m_sp++;
@@ -1371,7 +1713,22 @@ void hcd62121_cpu_device::execute_run()
break;
case 0x8E: /* unk_8E */
- logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
+ {
+ logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
+ if (m_unk_f5 == 0xd0)
+ {
+ /*
+ FIXME: Needs to be validated with hardware tests.
+
+ Instruction 0x8E is called before reading and testing inputs in some cases.
+ While the timer is also configured, there's no blocking wait for it to expire.
+ Instead, there's a busy wait on 2 bytes at register R76 that aren't updated directly by
+ program code. So far only seen when instruction 0xF5 is executed with operand 0xD0, but
+ maybe irrelevant, see JD-364 @ 21:b65f.
+ */
+ m_is_timer_irq_enabled = true;
+ }
+ }
break;
case 0x90: /* retzh */
@@ -1400,6 +1757,12 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0x9E: /* reti */
+ m_ip = op_popw();
+ m_cseg = op_popb();
+ m_is_timer_irq_asserted = false;
+ break;
+
case 0x9F: /* ret */
m_ip = op_popw();
break;
@@ -1442,12 +1805,87 @@ void hcd62121_cpu_device::execute_run()
}
break;
+ case 0xB0: /* unk_B0 reg/i8 */
case 0xB1: /* unk_B1 reg/i8 - PORTx control/direction? */
- case 0xB3: /* unk_B3 reg/i8 - timer/irq related? */
+ case 0xB2: /* unk_B2 reg/i8 */
logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
read_op();
break;
+ case 0xB3: /* timer_set i8 */
+ {
+ u8 arg = read_op();
+
+ /*
+ When timer control is set with operand 0xC0, the CPU periodically reads
+ from external RAM (address range 0x7c00..0x7fff) at an interval of
+ 832 clock cycles, with the reads themselves taking another 64 clock cycles.
+ This needs to be explicitly setup, involving writes to unknown segments
+ 0x11 and 0xE1 (see cfx9850.bin @ 00:00fe), otherwise there's only activity
+ on address lines without any reads.
+
+ The total sum of these state reads can be approximated to the closest
+ power of two to define timeout values. Multiple samples were averaged,
+ as the state read interval can start at a distinct point in time from
+ the timer wait execution.
+ */
+ const u64 TIMER_STATE_READ_CYCLES = 832 + 64;
+ m_is_infinite_timeout = false;
+ m_is_timer_wait_elapsed = true;
+ m_cycles_until_timeout = m_timer_cycles = 0;
+ m_time_op = arg;
+ switch (m_time_op)
+ {
+ case 0x01: case 0x03:
+ // Likely only timeouts on KO enabled input.
+ m_is_infinite_timeout = true;
+ break;
+ case 0x11: case 0x13: case 0x15: case 0x17: case 0x19: case 0x1b: case 0x1d: case 0x1f:
+ case 0x31: case 0x33: case 0x35: case 0x37: case 0x39: case 0x3b: case 0x3d: case 0x3f:
+ case 0x51: case 0x53: case 0x55: case 0x57: case 0x59: case 0x5b: case 0x5d: case 0x5f:
+ case 0x71: case 0x73: case 0x75: case 0x77: case 0x79: case 0x7b: case 0x7d: case 0x7f:
+ case 0x91: case 0x93: case 0x95: case 0x97: case 0x99: case 0x9b: case 0x9d: case 0x9f:
+ case 0xb1: case 0xb3: case 0xb5: case 0xb7: case 0xb9: case 0xbb: case 0xbd: case 0xbf:
+ case 0xd1: case 0xd3: case 0xd5: case 0xd7: case 0xd9: case 0xdb: case 0xdd: case 0xdf:
+ // Approximately 814.32us
+ m_timer_cycles = 0x4 * TIMER_STATE_READ_CYCLES;
+ break;
+ case 0x21: case 0x23: case 0x25: case 0x27: case 0x29: case 0x2b: case 0x2d: case 0x2f:
+ case 0x61: case 0x63: case 0x65: case 0x67: case 0x69: case 0x6b: case 0x6d: case 0x6f:
+ case 0xa1: case 0xa3: case 0xa5: case 0xa7: case 0xa9: case 0xab: case 0xad: case 0xaf:
+ // Approximately 1.63ms
+ m_timer_cycles = 0x8 * TIMER_STATE_READ_CYCLES;
+ break;
+ case 0x05: case 0x07: case 0x0d: case 0x0f:
+ case 0x45: case 0x47: case 0x4d: case 0x4f:
+ case 0xc5: case 0xc7: case 0xcd: case 0xcf:
+ // Approximately 209.34ms
+ m_timer_cycles = 0x400 * TIMER_STATE_READ_CYCLES;
+ break;
+ case 0x09: case 0x0b:
+ case 0x49: case 0x4b:
+ case 0xc9: case 0xcb:
+ // Approximately 837.61ms
+ m_timer_cycles = 0x1000 * TIMER_STATE_READ_CYCLES;
+ break;
+ case 0x41: case 0x43:
+ case 0xc1: case 0xc3:
+ // Approximately 1.68s
+ m_timer_cycles = 0x2000 * TIMER_STATE_READ_CYCLES;
+ break;
+ case 0x81: case 0x83:
+ // Approximately 100.58s
+ m_timer_cycles = 0x7a800 * TIMER_STATE_READ_CYCLES;
+ break;
+ default:
+ logerror("%02x:%04x: unimplemented timer value %02x encountered\n", m_cseg, m_ip-1, m_time_op);
+ break;
+ }
+ m_cycles_until_timeout = m_timer_cycles;
+ m_is_timer_started = true;
+ }
+ break;
+
case 0xB4: /* out koh,reg */
m_koh_cb(m_reg[read_op() & 0x7f]);
break;
@@ -1470,7 +1908,6 @@ void hcd62121_cpu_device::execute_run()
break;
case 0xBB: /* jmpcl a16 */
- logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
{
u8 a1 = read_op();
u8 a2 = read_op();
@@ -1481,7 +1918,6 @@ void hcd62121_cpu_device::execute_run()
break;
case 0xBF: /* jmpncl a16 */
- logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
{
u8 a1 = read_op();
u8 a2 = read_op();
@@ -1491,10 +1927,17 @@ void hcd62121_cpu_device::execute_run()
}
break;
- //case 0xC0: /* movb reg,i8 */ // TODO - test
+ /*
+ These instructions do not modify any general purpose registers or memory,
+ but might be implemented on other CPUs with the same instruction set.
+ */
+ case 0xC0: /* nop reg,i8 */
+ case 0xC2: /* nop reg,i8 */
+ case 0xC3: /* nop reg,i8 */
+ logerror("%02x:%04x: nop instruction %02x %02x,%02x\n", m_cseg, m_ip-1, op, read_op(), read_op());
+ break;
+
case 0xC1: /* movw reg,i16 */
- //case 0xC2: /* movw reg,i64 */ // TODO - test
- //case 0xC3: /* movw reg,i80 */ // TODO - test
{
int size = datasize(op);
u8 reg = read_op();
@@ -1504,7 +1947,7 @@ void hcd62121_cpu_device::execute_run()
for (int i = 0; i < size; i++)
{
- m_reg[(reg + i) & 0x7f] = read_op();
+ set_reg((reg + i) & 0x7f, read_op());
}
}
break;
@@ -1546,8 +1989,20 @@ void hcd62121_cpu_device::execute_run()
for (int i = 0; i < size; i++)
{
m_lar += pre_inc;
- if (arg1 & 0x80) {
+ if (arg1 & 0x80)
+ {
+ /*
+ FIXME: Needs to be validated with hardware tests.
+
+ JD-368 @ 20:047a must write value 0x7f @ 40:1819, despite 0x7f7f being
+ expected @ 20:3492. This routine is used to clear RAM, and will overflow
+ if 40:1818 = 0xff7f7f, since it will loop beyond the expected 0x8000 size
+ to clear.
+
+ Does this instruction zero-extend immediate values?
+ */
m_program->write_byte((m_dseg << 16) | m_lar, arg2);
+ arg2 = 0;
}
else
{
@@ -1562,7 +2017,7 @@ void hcd62121_cpu_device::execute_run()
for (int i = 0; i < size; i++)
{
m_lar += pre_inc;
- m_reg[(arg2 + i) & 0x7f] = m_program->read_byte((m_dseg << 16) | m_lar);
+ set_reg((arg2 + i) & 0x7f, m_program->read_byte((m_dseg << 16) | m_lar));
m_lar += post_inc;
}
}
@@ -1572,13 +2027,14 @@ void hcd62121_cpu_device::execute_run()
case 0xCC: /* swapb ir1,r2 */
case 0xCD: /* swapw ir1,r2 */
case 0xCE: /* swapq ir1,r2 */
- case 0xCF: /* swapt ir1,r2? */
+ case 0xCF: /* swapt ir1,r2 */
{
int size = datasize(op);
u8 reg1 = read_op();
u8 reg2 = read_op();
- if (reg1 & 0x80) {
+ if (reg1 & 0x80)
+ {
fatalerror("%02x:%04x: unimplemented swap with immediate encountered\n", m_cseg, m_ip-1);
}
@@ -1593,7 +2049,8 @@ void hcd62121_cpu_device::execute_run()
write_iregreg(size, reg1, reg2);
write_iregreg2(size, reg1, reg2);
- // TODO - are flags affected?
+
+ m_f = 0;
}
break;
@@ -1667,16 +2124,16 @@ void hcd62121_cpu_device::execute_run()
logerror("%06x: in0 read\n", (m_cseg << 16) | m_ip);
u8 reg1 = read_op();
- m_reg[reg1 & 0x7f] = m_in0_cb();
+ set_reg(reg1 & 0x7f, m_in0_cb());
}
break;
case 0xE1: /* movb reg,OPT */
- m_reg[read_op() & 0x7f] = m_opt;
+ set_reg(read_op() & 0x7f, m_opt);
break;
case 0xE2: /* in kb, reg */
- m_reg[read_op() & 0x7f] = m_ki_cb();
+ set_reg(read_op() & 0x7f, m_ki_cb());
break;
case 0xE3: /* movb reg,dsize */
@@ -1684,7 +2141,7 @@ void hcd62121_cpu_device::execute_run()
u8 reg = read_op();
if (reg & 0x80)
fatalerror("%02x:%04x: unimplemented instruction %02x encountered with (arg & 0x80) != 0\n", m_cseg, m_ip-1, op);
- m_reg[reg & 0x7f] = m_dsize;
+ set_reg(reg & 0x7f, m_dsize);
}
break;
@@ -1693,20 +2150,33 @@ void hcd62121_cpu_device::execute_run()
u8 reg = read_op();
if (reg & 0x80)
fatalerror("%02x:%04x: unimplemented instruction %02x encountered with (arg & 0x80) != 0\n", m_cseg, m_ip-1, op);
- m_reg[reg & 0x7f] = m_f;
+ set_reg(reg & 0x7f, m_f);
}
break;
+ case 0xE5: /* movb reg,TIME */
+ set_reg(read_op() & 0x7f, m_time);
+ break;
+
case 0xE6: /* movb reg,PORT */
- m_reg[read_op() & 0x7f] = m_port;
+ set_reg(read_op() & 0x7f, m_port);
break;
case 0xE8: /* movw r1,lar */
{
u8 reg1 = read_op();
- m_reg[reg1 & 0x7f] = m_lar & 0xff;
- m_reg[(reg1 + 1) & 0x7f] = m_lar >> 8;
+ set_reg(reg1 & 0x7f, m_lar & 0xff);
+ set_reg((reg1 + 1) & 0x7f, m_lar >> 8);
+ }
+ break;
+
+ case 0xEA: /* movw reg,pc */
+ {
+ u8 reg1 = read_op();
+
+ set_reg(reg1 & 0x7f, m_ip & 0xff);
+ set_reg((reg1 + 1) & 0x7f, m_ip >> 8);
}
break;
@@ -1714,13 +2184,21 @@ void hcd62121_cpu_device::execute_run()
{
u8 reg1 = read_op();
- m_reg[reg1 & 0x7f] = m_sp & 0xff;
- m_reg[(reg1 + 1) & 0x7f] = m_sp >> 8;
+ set_reg(reg1 & 0x7f, m_sp & 0xff);
+ set_reg((reg1 + 1) & 0x7f, m_sp >> 8);
}
break;
+ case 0xED: /* movb reg,ds */
+ set_reg(read_op() & 0x7f, m_dseg);
+ break;
+
+ case 0xEE: /* movb reg,cs */
+ set_reg(read_op() & 0x7f, m_cseg);
+ break;
+
case 0xEF: /* movb reg,ss */
- m_reg[read_op() & 0x7f] = m_sseg;
+ set_reg(read_op() & 0x7f, m_sseg);
break;
case 0xF0: /* movb OPT,reg */
@@ -1733,21 +2211,38 @@ void hcd62121_cpu_device::execute_run()
m_port_cb(m_port);
break;
+ case 0xF5: /* unk_F5 reg/i8 (out?) */
+ logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
+ m_unk_f5 = read_op();
+ break;
+
case 0xF1: /* unk_F1 reg/i8 (out?) */
case 0xF3: /* unk_F3 reg/i8 (out?) */
- case 0xF5: /* unk_F5 reg/i8 (out?) */
- case 0xF7: /* unk_F7 reg/i8 (out?) */
+ case 0xF6: /* unk_F6 reg/i8 (out?) */
+ case 0xF7: /* timer_ctrl i8 */
+ case 0xF8: /* unk_F8 reg/i8 (out?) */
logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
read_op();
break;
- case 0xFC: /* unk_FC - disable interrupts/stop timer?? */
- case 0xFD: /* unk_FD */
- case 0xFE: /* unk_FE - wait for/start timer */
- if (op == 0xFE)
- m_icount -= 75000; // TODO: temporary value that makes emulation speed acceptable
+ case 0xFC: /* timer_clear */
+ // FIXME: Needs to be validated with hardware tests.
+ m_cycles_until_timeout = m_timer_cycles = 0;
+ m_is_timer_irq_enabled = false;
+ m_is_timer_irq_asserted = false;
+ m_is_timer_wait_elapsed = true;
+ break;
- logerror("%02x:%04x: unimplemented instruction %02x encountered\n", m_cseg, m_ip-1, op);
+ case 0xFD: /* timer_wait_low (no X1 clock, address or data bus activity) */
+ case 0xFE: /* timer_wait */
+ if (BIT(m_time_op, 0))
+ {
+ m_is_timer_wait_elapsed = false;
+ }
+ else
+ {
+ logerror("%02x:%04x: wait for disabled timer? value %02x\n", m_cseg, m_ip-1, m_time_op);
+ }
break;
case 0xFF: /* nop */
diff --git a/src/devices/cpu/hcd62121/hcd62121.h b/src/devices/cpu/hcd62121/hcd62121.h
index d7d35a881dd..98d6e23ad7f 100644
--- a/src/devices/cpu/hcd62121/hcd62121.h
+++ b/src/devices/cpu/hcd62121/hcd62121.h
@@ -17,6 +17,7 @@ public:
auto opt_cb() { return m_opt_cb.bind(); }
auto ki_cb() { return m_ki_cb.bind(); }
auto in0_cb() { return m_in0_cb.bind(); }
+ auto input_flag_cb() { return m_input_flag_cb.bind(); }
protected:
enum
@@ -35,19 +36,19 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 4; }
virtual u32 execute_max_cycles() const noexcept override { return 48; }
- virtual u32 execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
// device_state_interface overrides
+ virtual void state_import(const device_state_entry &entry) override;
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -55,10 +56,13 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
+ TIMER_CALLBACK_MEMBER(timer_tick);
u8 read_op();
u8 datasize(u8 op);
void read_reg(int size, u8 op1);
void write_reg(int size, u8 op1);
+ void read_ireg(int size, u8 op1);
+ void write_ireg(int size, u8 op1);
void read_regreg(int size, u8 op1, u8 op2, bool copy_extend_immediate);
void write_regreg(int size, u8 op1, u8 op2);
void read_iregreg(int size, u8 op1, u8 op2, bool copy_extend_immediate);
@@ -70,6 +74,7 @@ private:
void set_zl_flag(bool is_zl);
void set_zh_flag(bool is_zh);
void set_cl_flag(bool is_cl);
+ void set_input_flag(bool is_input_set);
void op_msk(int size);
void op_and(int size);
void op_or(int size);
@@ -78,8 +83,12 @@ private:
void op_addb(int size);
void op_subb(int size);
void op_sub(int size);
+ void op_pushb(u8 source);
void op_pushw(u16 source);
+ u8 op_popb();
u16 op_popw();
+ void set_reg(u8 i, u8 val) { m_reg[i] = val; /*logerror("R%02X = %02x @ %06X\n", i, val, (m_cseg << 16) | m_ip);*/ }
+ void timer_elapsed();
address_space_config m_program_config;
@@ -91,6 +100,17 @@ private:
u8 m_dseg;
u8 m_sseg;
u8 m_f;
+ u8 m_time;
+ u8 m_time_op;
+ u8 m_unk_f5;
+ s32 m_cycles_until_timeout;
+ bool m_is_timer_started;
+ bool m_is_timer_irq_enabled;
+ bool m_is_timer_irq_asserted;
+ bool m_is_timer_wait_elapsed;
+ bool m_is_infinite_timeout;
+ s32 m_timer_cycles;
+ emu_timer *m_timer;
u16 m_lar;
u8 m_reg[0x80];
@@ -104,6 +124,8 @@ private:
u8 m_temp2[0x10];
u32 m_rtemp;
+ u32 m_debugger_temp;
+
address_space *m_program;
int m_icount;
@@ -114,6 +136,7 @@ private:
devcb_write8 m_opt_cb;
devcb_read8 m_ki_cb;
devcb_read8 m_in0_cb;
+ devcb_read8 m_input_flag_cb;
};
diff --git a/src/devices/cpu/hcd62121/hcd62121d.cpp b/src/devices/cpu/hcd62121/hcd62121d.cpp
index 2b7ea7b1150..86109e67287 100644
--- a/src/devices/cpu/hcd62121/hcd62121d.cpp
+++ b/src/devices/cpu/hcd62121/hcd62121d.cpp
@@ -117,18 +117,18 @@ const hcd62121_disassembler::dasm hcd62121_disassembler::ops[256] =
{ "callnc", ARG_A16, ARG_NONE }, { "callnz", ARG_A16, ARG_NONE },
/* 0xb0 */
- { "unB0?", ARG_NONE, ARG_NONE }, { "unB1?", ARG_I8, ARG_NONE },
- { "unB2?", ARG_NONE, ARG_NONE }, { "unB3?", ARG_I8, ARG_NONE },
- { "out", ARG_KHI, ARG_REG }, { "out", ARG_KHI, ARG_I8 },
- { "out", ARG_KLO, ARG_REG }, { "out", ARG_KLO, ARG_I8 },
- { "unB8?", ARG_NONE, ARG_NONE }, { "unB9?", ARG_I8, ARG_NONE },
- { "unBA?", ARG_NONE, ARG_NONE }, { "jmpcl", ARG_A16, ARG_NONE },
- { "unBC?", ARG_I8, ARG_NONE }, { "unBD?", ARG_NONE, ARG_NONE },
- { "unBE?", ARG_NONE, ARG_NONE }, { "jmpncl", ARG_A16, ARG_NONE },
+ { "unB0?", ARG_I8, ARG_NONE }, { "unB1?", ARG_I8, ARG_NONE },
+ { "unB2?", ARG_I8, ARG_NONE }, { "timer_set", ARG_I8, ARG_NONE },
+ { "out", ARG_KHI, ARG_REG }, { "out", ARG_KHI, ARG_I8 },
+ { "out", ARG_KLO, ARG_REG }, { "out", ARG_KLO, ARG_I8 },
+ { "unB8?", ARG_NONE, ARG_NONE }, { "unB9?", ARG_I8, ARG_NONE },
+ { "unBA?", ARG_NONE, ARG_NONE }, { "jmpcl", ARG_A16, ARG_NONE },
+ { "unBC?", ARG_I8, ARG_NONE }, { "unBD?", ARG_NONE, ARG_NONE },
+ { "unBE?", ARG_NONE, ARG_NONE }, { "jmpncl", ARG_A16, ARG_NONE },
/* 0xc0 */
{ "movb", ARG_REG, ARG_I8 }, { "movw", ARG_REG, ARG_I16 },
- { "movq", ARG_REG, ARG_I64 }, { "movt", ARG_REG, ARG_I80 },
+ { "movq", ARG_REG, ARG_I8 }, { "movt", ARG_REG, ARG_I8 },
{ "movb", ARG_ILR, ARG_ILR }, { "movw", ARG_ILR, ARG_ILR },
{ "movq", ARG_ILR, ARG_ILR }, { "movt", ARG_ILR, ARG_ILR },
{ "unC8?", ARG_NONE, ARG_NONE }, { "unC9?", ARG_NONE, ARG_NONE },
@@ -149,7 +149,7 @@ const hcd62121_disassembler::dasm hcd62121_disassembler::ops[256] =
/* 0xe0 */
{ "in0", ARG_REG, ARG_NONE }, { "movb", ARG_REG, ARG_OPT },
{ "in", ARG_REG, ARG_KI }, { "movb", ARG_REG, ARG_DSZ },
- { "movb", ARG_REG, ARG_F }, { "unE5?", ARG_I8, ARG_NONE },
+ { "movb", ARG_REG, ARG_F }, { "movb", ARG_REG, ARG_TIME },
{ "movb", ARG_REG, ARG_PORT }, { "unE7?", ARG_I8, ARG_NONE },
{ "movw", ARG_REG, ARG_LAR }, { "movw?", ARG_REG, ARG_LAR },
{ "movw", ARG_REG, ARG_PC }, { "movw", ARG_REG, ARG_SP },
@@ -157,14 +157,14 @@ const hcd62121_disassembler::dasm hcd62121_disassembler::ops[256] =
{ "movb", ARG_REG, ARG_CS }, { "movb", ARG_REG, ARG_SS },
/* 0xf0 */
- { "movb", ARG_OPT, ARG_REG }, { "unF1?", ARG_I8, ARG_NONE },
- { "movb", ARG_PORT, ARG_REG }, { "unF3?", ARG_I8, ARG_NONE },
- { "unF4?", ARG_I8, ARG_NONE }, { "unF5?", ARG_I8, ARG_NONE },
- { "unF6?", ARG_I8, ARG_NONE }, { "unF7?", ARG_I8, ARG_NONE },
- { "unF8?", ARG_NONE, ARG_NONE }, { "unF9?", ARG_NONE, ARG_NONE },
- { "unFA?", ARG_NONE, ARG_NONE }, { "unFb?", ARG_NONE, ARG_NONE },
- { "unFC?", ARG_NONE, ARG_NONE }, { "unFD?", ARG_NONE, ARG_NONE },
- { "unFE?", ARG_NONE, ARG_NONE }, { "nop", ARG_NONE, ARG_NONE }
+ { "movb", ARG_OPT, ARG_REG }, { "unF1?", ARG_I8, ARG_NONE },
+ { "movb", ARG_PORT, ARG_REG }, { "unF3?", ARG_I8, ARG_NONE },
+ { "unF4?", ARG_I8, ARG_NONE }, { "unF5?", ARG_I8, ARG_NONE },
+ { "unF6?", ARG_I8, ARG_NONE }, { "timer_ctrl", ARG_I8, ARG_NONE },
+ { "unF8?", ARG_I8, ARG_NONE }, { "unF9?", ARG_NONE, ARG_NONE },
+ { "unFA?", ARG_NONE, ARG_NONE }, { "unFb?", ARG_NONE, ARG_NONE },
+ { "timer_clear", ARG_NONE, ARG_NONE }, { "timer_wait_low", ARG_NONE, ARG_NONE },
+ { "timer_wait", ARG_NONE, ARG_NONE }, { "nop", ARG_NONE, ARG_NONE }
};
u32 hcd62121_disassembler::opcode_alignment() const
@@ -186,9 +186,9 @@ offs_t hcd62121_disassembler::disassemble(std::ostream &stream, offs_t pc, const
/* Special cases for shift and rotate instructions */
if (inst->arg2 == ARG_S4 || inst->arg2 == ARG_S8)
- util::stream_format(stream, "%c%c%c%c ", inst->str[0], inst->str[1], (opcodes.r8(pc) & 0x80) ? 'r' : 'l', inst->str[3]);
+ util::stream_format(stream, "%c%c%c%c ", inst->str[0], inst->str[1], (opcodes.r8(pc) & 0x80) ? 'r' : 'l', inst->str[3]);
else
- util::stream_format(stream, "%-8s", inst->str);
+ util::stream_format(stream, "%-12s", inst->str);
switch(inst->arg1)
{
@@ -318,8 +318,8 @@ offs_t hcd62121_disassembler::disassemble(std::ostream &stream, offs_t pc, const
case ARG_PORT:
util::stream_format(stream, "PORT");
break;
- case ARG_TIM:
- util::stream_format(stream, "TIM?");
+ case ARG_TIME:
+ util::stream_format(stream, "TIME");
break;
case ARG_KLO:
util::stream_format(stream, "KOL");
@@ -408,8 +408,8 @@ offs_t hcd62121_disassembler::disassemble(std::ostream &stream, offs_t pc, const
case ARG_PORT:
util::stream_format(stream, ",PORT");
break;
- case ARG_TIM:
- util::stream_format(stream, ",TIM?");
+ case ARG_TIME:
+ util::stream_format(stream, ",TIME");
break;
case ARG_KI:
util::stream_format(stream, ",KI");
diff --git a/src/devices/cpu/hcd62121/hcd62121d.h b/src/devices/cpu/hcd62121/hcd62121d.h
index c03d10dd410..531fc2849ac 100644
--- a/src/devices/cpu/hcd62121/hcd62121d.h
+++ b/src/devices/cpu/hcd62121/hcd62121d.h
@@ -47,7 +47,7 @@ private:
ARG_DSZ, /* dsize register? */
ARG_OPT, /* OPTx (output) pins */
ARG_PORT, /* PORTx (output) pins */
- ARG_TIM, /* timing related register? */
+ ARG_TIME, /* timing related register */
ARG_KLO, /* KO1 - KO8 output lines */
ARG_KHI, /* KO9 - KO14(?) output lines */
ARG_KI, /* K input lines */
diff --git a/src/devices/cpu/hd61700/hd61700.cpp b/src/devices/cpu/hd61700/hd61700.cpp
index 58efd62d668..38c700b9a79 100644
--- a/src/devices/cpu/hd61700/hd61700.cpp
+++ b/src/devices/cpu/hd61700/hd61700.cpp
@@ -296,6 +296,7 @@ bool hd61700_cpu_device::check_irqs()
{
if (BIT(REG_IB, i) && !BIT(m_irq_status, i))
{
+ standard_irq_callback(i, m_pc);
m_irq_status |= (1 << i);
push(REG_SS, (uint8_t)(m_pc >> 8));
push(REG_SS, (uint8_t)m_pc);
@@ -319,19 +320,19 @@ void hd61700_cpu_device::execute_run()
{
do
{
- m_ppc = m_curpc;
-
- debugger_instruction_hook(m_curpc);
-
// verify that CPU is not in sleep
if (m_state & CPU_SLP)
{
+ debugger_wait_hook();
m_icount -= 6;
}
else
{
check_irqs();
+ m_ppc = m_curpc;
+ debugger_instruction_hook(m_curpc);
+
// instruction fetch
uint8_t op = read_op();
diff --git a/src/devices/cpu/hd61700/hd61700.h b/src/devices/cpu/hd61700/hd61700.h
index 6f7ef9462ff..922817e7dd0 100644
--- a/src/devices/cpu/hd61700/hd61700.h
+++ b/src/devices/cpu/hd61700/hd61700.h
@@ -45,13 +45,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 52; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/hmcs40/hmcs40.cpp b/src/devices/cpu/hmcs40/hmcs40.cpp
index 61b50e73123..0e36b65b11b 100644
--- a/src/devices/cpu/hmcs40/hmcs40.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40.cpp
@@ -25,74 +25,54 @@ TODO:
#define IS_CMOS ~0
-// MCU types
+//-------------------------------------------------
+// device types
+//-------------------------------------------------
-// HMCS42/C/CL
-//DEFINE_DEVICE_TYPE(HD38702, hd38702_device, "hd38702", "Hitachi HD38702") // PMOS, 28 pins, 22 I/O lines, (512+32)x10 ROM, 32x4 RAM, no B or SPY register
-//DEFINE_DEVICE_TYPE(HD44700, hd44700_device, "hd44700", "Hitachi HD44700") // CMOS version
-//DEFINE_DEVICE_TYPE(HD44708, hd44708_device, "hd44708", "Hitachi HD44708") // CMOS version, low-power
+// HMCS42/C/CL, 28 pins, 22 I/O lines, (512+32)x10 ROM, 32x4 RAM, no B or SPY register
+//DEFINE_DEVICE_TYPE(HD38702, hd38702_device, "hd38702", "Hitachi HD38702") // PMOS
+//DEFINE_DEVICE_TYPE(HD44700, hd44700_device, "hd44700", "Hitachi HD44700") // CMOS
+//DEFINE_DEVICE_TYPE(HD44708, hd44708_device, "hd44708", "Hitachi HD44708") // CMOS, low-power
-// HMCS43/C/CL
-DEFINE_DEVICE_TYPE(HD38750, hd38750_device, "hd38750", "Hitachi HD38750") // PMOS, 42 pins, 32 I/O lines, (1024+64)x10 ROM, 80x4 RAM
+// HMCS43/C/CL, 42 pins, 32 I/O lines, (1024+64)x10 ROM, 80x4 RAM
+DEFINE_DEVICE_TYPE(HD38750, hd38750_device, "hd38750", "Hitachi HD38750") // PMOS
DEFINE_DEVICE_TYPE(HD38755, hd38755_device, "hd38755", "Hitachi HD38755") // ceramic filter oscillator type
-DEFINE_DEVICE_TYPE(HD44750, hd44750_device, "hd44750", "Hitachi HD44750") // CMOS version
-DEFINE_DEVICE_TYPE(HD44758, hd44758_device, "hd44758", "Hitachi HD44758") // CMOS version, low-power
+DEFINE_DEVICE_TYPE(HD44750, hd44750_device, "hd44750", "Hitachi HD44750") // CMOS
+DEFINE_DEVICE_TYPE(HD44758, hd44758_device, "hd44758", "Hitachi HD44758") // CMOS, low-power
-// HMCS44A/C/CL
-DEFINE_DEVICE_TYPE(HD38800, hd38800_device, "hd38800", "Hitachi HD38800") // PMOS, 42 pins, 32 I/O lines, (2048+128)x10 ROM, 160x4 RAM
+// HMCS44A/C/CL, 42 pins, 32 I/O lines, (2048+128)x10 ROM, 160x4 RAM
+DEFINE_DEVICE_TYPE(HD38800, hd38800_device, "hd38800", "Hitachi HD38800") // PMOS
DEFINE_DEVICE_TYPE(HD38805, hd38805_device, "hd38805", "Hitachi HD38805") // ceramic filter oscillator type
-DEFINE_DEVICE_TYPE(HD44801, hd44801_device, "hd44801", "Hitachi HD44801") // CMOS version
-DEFINE_DEVICE_TYPE(HD44808, hd44808_device, "hd44808", "Hitachi HD44808") // CMOS version, low-power
+DEFINE_DEVICE_TYPE(HD44801, hd44801_device, "hd44801", "Hitachi HD44801") // CMOS
+DEFINE_DEVICE_TYPE(HD44808, hd44808_device, "hd44808", "Hitachi HD44808") // CMOS, low-power
-// HMCS45A/C/CL
-DEFINE_DEVICE_TYPE(HD38820, hd38820_device, "hd38820", "Hitachi HD38820") // PMOS, 54 pins(QFP) or 64 pins(DIP), 44 I/O lines, (2048+128)x10 ROM, 160x4 RAM
+// HMCS45A/C/CL, 54 pins(QFP) or 64 pins(DIP), 44 I/O lines, (2048+128)x10 ROM, 160x4 RAM
+DEFINE_DEVICE_TYPE(HD38820, hd38820_device, "hd38820", "Hitachi HD38820") // PMOS
DEFINE_DEVICE_TYPE(HD38825, hd38825_device, "hd38825", "Hitachi HD38825") // ceramic filter oscillator type
-DEFINE_DEVICE_TYPE(HD44820, hd44820_device, "hd44820", "Hitachi HD44820") // CMOS version
-DEFINE_DEVICE_TYPE(HD44828, hd44828_device, "hd44828", "Hitachi HD44828") // CMOS version, low-power
-
-// HMCS46C/CL (no PMOS version exists)
-//DEFINE_DEVICE_TYPE(HD44840, hd44840_device, "hd44840", "Hitachi HD44840") // CMOS, 42 pins, 32 I/O lines, 4096x10 ROM, 256x4 RAM
-//DEFINE_DEVICE_TYPE(HD44848, hd44848_device, "hd44848", "Hitachi HD44848") // CMOS, low-power
-
-// HMCS47A/C/CL
-//DEFINE_DEVICE_TYPE(HD38870, hd38870_device, "hd38870", "Hitachi HD38870") // PMOS, 54 pins(QFP) or 64 pins(DIP), 44 I/O lines, 4096x10 ROM, 256x4 RAM
-//DEFINE_DEVICE_TYPE(HD44860, hd44860_device, "hd44860", "Hitachi HD44860") // CMOS version
-//DEFINE_DEVICE_TYPE(HD44868, hd44868_device, "hd44868", "Hitachi HD44868") // CMOS version, low-power
+DEFINE_DEVICE_TYPE(HD44820, hd44820_device, "hd44820", "Hitachi HD44820") // CMOS
+DEFINE_DEVICE_TYPE(HD44828, hd44828_device, "hd44828", "Hitachi HD44828") // CMOS, low-power
+// HMCS46C/CL, 42 pins, 32 I/O lines, 4096x10 ROM, 256x4 RAM (no PMOS version exists)
+DEFINE_DEVICE_TYPE(HD44840, hd44840_device, "hd44840", "Hitachi HD44840") // CMOS
+DEFINE_DEVICE_TYPE(HD44848, hd44848_device, "hd44848", "Hitachi HD44848") // CMOS, low-power
-// internal memory maps
-
-// On HMCS42/3/4/5, only half of the ROM address range contains user-executable code,
-// there is up to 128 bytes of pattern data in the 2nd half. The 2nd half also includes
-// a couple of pages with factory test code by Hitachi, only executable when MCU test
-// mode is enabled externally. This data can still be accessed with the P opcode.
-
-void hmcs40_cpu_device::program_1k(address_map &map)
-{
- map(0x0000, 0x07ff).rom();
-}
-
-void hmcs40_cpu_device::program_2k(address_map &map)
-{
- map(0x0000, 0x0fff).rom();
-}
+// HMCS47A/C/CL, 54 pins(QFP) or 64 pins(DIP), 44 I/O lines, 4096x10 ROM, 256x4 RAM
+DEFINE_DEVICE_TYPE(HD38870, hd38870_device, "hd38870", "Hitachi HD38870") // PMOS
+DEFINE_DEVICE_TYPE(HD44860, hd44860_device, "hd44860", "Hitachi HD44860") // CMOS
+DEFINE_DEVICE_TYPE(HD44868, hd44868_device, "hd44868", "Hitachi HD44868") // CMOS, low-power
+// LCD-III, 64 pins, HMCS44C core, LCDC with 4 commons and 32 segments
+//DEFINE_DEVICE_TYPE(HD44790, hd44790_device, "hd44790", "Hitachi HD44790") // CMOS
+//DEFINE_DEVICE_TYPE(HD44795, hd44795_device, "hd44795", "Hitachi HD44795") // CMOS, low-power
-void hmcs40_cpu_device::data_80x4(address_map &map)
-{
- map(0x00, 0x3f).ram();
- map(0x40, 0x4f).ram().mirror(0x30);
-}
+// LCD-IV, 64 pins, HMCS46C core, LCDC with 4 commons and 32 segments
+//DEFINE_DEVICE_TYPE(HD613901, hd613901_device, "hd613901", "Hitachi HD613901") // CMOS
-void hmcs40_cpu_device::data_160x4(address_map &map)
-{
- map(0x00, 0x7f).ram();
- map(0x80, 0x8f).ram().mirror(0x30);
- map(0xc0, 0xcf).ram().mirror(0x30);
-}
+//-------------------------------------------------
+// constructor
+//-------------------------------------------------
-// device definitions
hmcs40_cpu_device::hmcs40_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int family, u16 polarity, int stack_levels, int pcwidth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data) :
cpu_device(mconfig, type, tag, owner, clock),
m_program_config("program", ENDIANNESS_LITTLE, 16, prgwidth, -1, program),
@@ -109,8 +89,11 @@ hmcs40_cpu_device::hmcs40_cpu_device(const machine_config &mconfig, device_type
m_write_d(*this)
{ }
+hmcs40_cpu_device::~hmcs40_cpu_device() { }
+
+
hmcs43_cpu_device::hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity) :
- hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS40_FAMILY_HMCS43, polarity, 3 /* stack levels */, 10 /* pc width */, 11 /* prg width */, address_map_constructor(FUNC(hmcs43_cpu_device::program_1k), this), 7 /* data width */, address_map_constructor(FUNC(hmcs43_cpu_device::data_80x4), this))
+ hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS43_FAMILY, polarity, 3 /* stack levels */, 10 /* pc width */, 11 /* prg width */, address_map_constructor(FUNC(hmcs43_cpu_device::program_1k), this), 7 /* data width */, address_map_constructor(FUNC(hmcs43_cpu_device::data_80x4), this))
{ }
hd38750_device::hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@@ -128,7 +111,7 @@ hd44758_device::hd44758_device(const machine_config &mconfig, const char *tag, d
hmcs44_cpu_device::hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity) :
- hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS40_FAMILY_HMCS44, polarity, 4, 11, 12, address_map_constructor(FUNC(hmcs44_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs44_cpu_device::data_160x4), this))
+ hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS44_FAMILY, polarity, 4, 11, 12, address_map_constructor(FUNC(hmcs44_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs44_cpu_device::data_160x4), this))
{ }
hd38800_device::hd38800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@@ -146,7 +129,7 @@ hd44808_device::hd44808_device(const machine_config &mconfig, const char *tag, d
hmcs45_cpu_device::hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity) :
- hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS40_FAMILY_HMCS45, polarity, 4, 11, 12, address_map_constructor(FUNC(hmcs45_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs45_cpu_device::data_160x4), this))
+ hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS45_FAMILY, polarity, 4, 11, 12, address_map_constructor(FUNC(hmcs45_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs45_cpu_device::data_160x4), this))
{ }
hd38820_device::hd38820_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
@@ -162,38 +145,36 @@ hd44828_device::hd44828_device(const machine_config &mconfig, const char *tag, d
hmcs45_cpu_device(mconfig, HD44828, tag, owner, clock, IS_CMOS)
{ }
-device_memory_interface::space_config_vector hmcs40_cpu_device::memory_space_config() const
-{
- return space_config_vector {
- std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(AS_DATA, &m_data_config)
- };
-}
-// disasm
-void hmcs40_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
-{
- switch (entry.index())
- {
- case STATE_GENFLAGS:
- str = string_format("%c%c",
- m_c ? 'C':'c',
- m_s ? 'S':'s'
- );
- break;
+hmcs46_cpu_device::hmcs46_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity) :
+ hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS46_FAMILY, polarity, 4, 12, 12, address_map_constructor(FUNC(hmcs46_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs46_cpu_device::data_256x4), this))
+{ }
- default: break;
- }
-}
+hd44840_device::hd44840_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs46_cpu_device(mconfig, HD44840, tag, owner, clock, IS_CMOS)
+{ }
+hd44848_device::hd44848_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs46_cpu_device(mconfig, HD44848, tag, owner, clock, IS_CMOS)
+{ }
-std::unique_ptr<util::disasm_interface> hmcs40_cpu_device::create_disassembler()
-{
- return std::make_unique<hmcs40_disassembler>();
-}
+
+hmcs47_cpu_device::hmcs47_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity) :
+ hmcs40_cpu_device(mconfig, type, tag, owner, clock, HMCS47_FAMILY, polarity, 4, 12, 12, address_map_constructor(FUNC(hmcs47_cpu_device::program_2k), this), 8, address_map_constructor(FUNC(hmcs47_cpu_device::data_256x4), this))
+{ }
+
+hd38870_device::hd38870_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs47_cpu_device(mconfig, HD38870, tag, owner, clock, IS_PMOS)
+{ }
+hd44860_device::hd44860_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs47_cpu_device(mconfig, HD44860, tag, owner, clock, IS_CMOS)
+{ }
+hd44868_device::hd44868_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs47_cpu_device(mconfig, HD44868, tag, owner, clock, IS_CMOS)
+{ }
//-------------------------------------------------
-// device_start - device-specific startup
+// initialization
//-------------------------------------------------
void hmcs40_cpu_device::device_start()
@@ -212,9 +193,11 @@ void hmcs40_cpu_device::device_start()
m_eint_line = 0;
m_halt = 0;
m_prescaler = 0;
+ m_block_int = false;
+
m_pc = 0;
m_prev_pc = 0;
- m_page = 0;
+ m_pc_upper = 0;
m_a = 0;
m_b = 0;
m_x = 0;
@@ -223,6 +206,7 @@ void hmcs40_cpu_device::device_start()
m_spy = 0;
m_s = 1;
m_c = 0;
+
m_tc = 0;
m_cf = 0;
m_ie = 0;
@@ -230,7 +214,6 @@ void hmcs40_cpu_device::device_start()
memset(m_if, 0, sizeof(m_if));
m_tf = 0;
memset(m_int, 0, sizeof(m_int));
- m_block_int = false;
memset(m_r, 0, sizeof(m_r));
m_d = 0;
@@ -241,9 +224,12 @@ void hmcs40_cpu_device::device_start()
save_item(NAME(m_i));
save_item(NAME(m_eint_line));
save_item(NAME(m_halt));
+ save_item(NAME(m_prescaler));
+ save_item(NAME(m_block_int));
+
save_item(NAME(m_pc));
save_item(NAME(m_prev_pc));
- save_item(NAME(m_page));
+ save_item(NAME(m_pc_upper));
save_item(NAME(m_a));
save_item(NAME(m_b));
save_item(NAME(m_x));
@@ -252,8 +238,8 @@ void hmcs40_cpu_device::device_start()
save_item(NAME(m_spy));
save_item(NAME(m_s));
save_item(NAME(m_c));
+
save_item(NAME(m_tc));
- save_item(NAME(m_prescaler));
save_item(NAME(m_cf));
save_item(NAME(m_ie));
save_item(NAME(m_iri));
@@ -261,7 +247,6 @@ void hmcs40_cpu_device::device_start()
save_item(NAME(m_if));
save_item(NAME(m_tf));
save_item(NAME(m_int));
- save_item(NAME(m_block_int));
save_item(NAME(m_r));
save_item(NAME(m_d));
@@ -279,15 +264,12 @@ void hmcs40_cpu_device::device_start()
state_add(++m_state_count, "Y", m_y).formatstr("%01X"); // 6
state_add(++m_state_count, "SPY", m_spy).formatstr("%01X"); // 7
+ state_add(++m_state_count, "S", m_s).formatstr("%01X").noshow(); // 8
+ state_add(++m_state_count, "C", m_c).formatstr("%01X").noshow(); // 9
+
set_icountptr(m_icount);
}
-
-
-//-------------------------------------------------
-// device_reset - device-specific reset
-//-------------------------------------------------
-
void hmcs40_cpu_device::device_reset()
{
m_pc = m_pcmask;
@@ -299,25 +281,113 @@ void hmcs40_cpu_device::device_reset()
m_iri = m_irt = 0;
m_if[0] = m_if[1] = m_tf = 1;
- // clear i/o
- m_d = m_polarity;
- for (int i = 0; i < 16; i++)
- hmcs40_cpu_device::write_d(i, m_polarity);
+ // all I/O ports set to input
+ reset_io();
- for (int i = 0; i < 8; i++)
- hmcs40_cpu_device::write_r(i, m_polarity & 0xf);
+ // HMCS46/47 R70 set to 1 (already the default on CMOS devices)
+ if (m_family == HMCS46_FAMILY || m_family == HMCS47_FAMILY)
+ m_r[7] |= 1;
+}
+
+
+//-------------------------------------------------
+// disasm
+//-------------------------------------------------
+
+void hmcs40_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = string_format("%c%c",
+ m_c ? 'C':'c',
+ m_s ? 'S':'s'
+ );
+ break;
+
+ default: break;
+ }
+}
+
+std::unique_ptr<util::disasm_interface> hmcs40_cpu_device::create_disassembler()
+{
+ return std::make_unique<hmcs40_disassembler>();
+}
+
+
+//-------------------------------------------------
+// internal memory maps
+//-------------------------------------------------
+
+/*
+
+On HMCS42/43/44/45, only half of the ROM address range contains user-executable
+code, there is up to 128 bytes of pattern data in the 2nd half. The 2nd half
+also includes a couple of pages with factory test code by Hitachi, only executable
+when MCU test mode is enabled externally (TEST pin). This data can still be accessed
+with the P opcode.
+
+On HMCS46/47, the 2nd half can be jumped to with a bank bit from R70. These MCUs
+have 2 more banks with factory test code, but that part of the ROM is only accessible
+under MCU test mode.
+
+*/
+
+void hmcs40_cpu_device::program_1k(address_map &map)
+{
+ map(0x0000, 0x07ff).rom();
}
+void hmcs40_cpu_device::program_2k(address_map &map)
+{
+ map(0x0000, 0x0fff).rom();
+}
+
+
+void hmcs40_cpu_device::data_80x4(address_map &map)
+{
+ map(0x00, 0x3f).ram();
+ map(0x40, 0x4f).ram().mirror(0x30);
+}
+
+void hmcs40_cpu_device::data_160x4(address_map &map)
+{
+ map(0x00, 0x7f).ram();
+ map(0x80, 0x8f).ram().mirror(0x30);
+ map(0xc0, 0xcf).ram().mirror(0x30);
+}
+
+void hmcs40_cpu_device::data_256x4(address_map &map)
+{
+ map(0x00, 0xff).ram();
+}
+
+device_memory_interface::space_config_vector hmcs40_cpu_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config)
+ };
+}
//-------------------------------------------------
-// i/o handling
+// i/o ports
//-------------------------------------------------
-u8 hmcs40_cpu_device::read_r(int index)
+void hmcs40_cpu_device::reset_io()
+{
+ m_d = m_polarity;
+ m_write_d(m_polarity);
+
+ for (int i = 0; i < 8; i++)
+ hmcs40_cpu_device::write_r(i, m_polarity);
+}
+
+u8 hmcs40_cpu_device::read_r(u8 index)
{
index &= 7;
- u8 inp = m_read_r[index](index, 0xff);
+ u8 inp = m_read_r[index](index);
if (m_polarity)
return (inp & m_r[index]) & 0xf;
@@ -325,63 +395,64 @@ u8 hmcs40_cpu_device::read_r(int index)
return (inp | m_r[index]) & 0xf;
}
-void hmcs40_cpu_device::write_r(int index, u8 data)
+void hmcs40_cpu_device::write_r(u8 index, u8 data)
{
index &= 7;
data &= 0xf;
m_r[index] = data;
- m_write_r[index](index, data, 0xff);
+ m_write_r[index](index, data);
}
-int hmcs40_cpu_device::read_d(int index)
+int hmcs40_cpu_device::read_d(u8 index)
{
- index &= 15;
+ index &= 0xf;
+ u16 inp = m_read_d(0, 1 << index);
if (m_polarity)
- return (m_read_d(index, 0xffff) & m_d) >> index & 1;
+ return BIT(inp & m_d, index);
else
- return (m_read_d(index, 0xffff) | m_d) >> index & 1;
+ return BIT(inp | m_d, index);
}
-void hmcs40_cpu_device::write_d(int index, int state)
+void hmcs40_cpu_device::write_d(u8 index, int state)
{
- index &= 15;
- state = (state) ? 1 : 0;
+ index &= 0xf;
+ u16 mask = 1 << index;
- m_d = (m_d & ~(1 << index)) | state << index;
- m_write_d(index, m_d, 0xffff);
+ m_d = (m_d & ~mask) | (state ? mask : 0);
+ m_write_d(0, m_d, mask);
}
// HMCS43:
// R0 is input-only, R1 is i/o, R2,R3 are output-only, no R4-R7
// D0-D3 are i/o, D4-D15 are output-only
-u8 hmcs43_cpu_device::read_r(int index)
+u8 hmcs43_cpu_device::read_r(u8 index)
{
index &= 7;
if (index >= 2)
- logerror("read from %s port R%d at $%04X\n", (index >= 4) ? "unknown" : "output", index, m_prev_pc);
+ logerror("read from %s port R%d @ $%04X\n", (index >= 4) ? "unknown" : "output", index, m_prev_pc);
return hmcs40_cpu_device::read_r(index);
}
-void hmcs43_cpu_device::write_r(int index, u8 data)
+void hmcs43_cpu_device::write_r(u8 index, u8 data)
{
index &= 7;
if (index != 0 && index < 4)
hmcs40_cpu_device::write_r(index, data);
else
- logerror("ineffective write to port R%d = $%X at $%04X\n", index, data & 0xf, m_prev_pc);
+ logerror("ineffective write to port R%d = $%X @ $%04X\n", index, data & 0xf, m_prev_pc);
}
-int hmcs43_cpu_device::read_d(int index)
+int hmcs43_cpu_device::read_d(u8 index)
{
index &= 15;
if (index >= 4)
- logerror("read from output pin D%d at $%04X\n", index, m_prev_pc);
+ logerror("read from output pin D%d @ $%04X\n", index, m_prev_pc);
return hmcs40_cpu_device::read_d(index);
}
@@ -390,57 +461,94 @@ int hmcs43_cpu_device::read_d(int index)
// R0-R3 are i/o, R4,R5 are extra registers, no R6,R7
// D0-D15 are i/o
-u8 hmcs44_cpu_device::read_r(int index)
+u8 hmcs44_cpu_device::read_r(u8 index)
{
index &= 7;
if (index >= 6)
- logerror("read from unknown port R%d at $%04X\n", index, m_prev_pc);
+ logerror("read from unknown port R%d @ $%04X\n", index, m_prev_pc);
return hmcs40_cpu_device::read_r(index);
}
-void hmcs44_cpu_device::write_r(int index, u8 data)
+void hmcs44_cpu_device::write_r(u8 index, u8 data)
{
index &= 7;
if (index < 6)
hmcs40_cpu_device::write_r(index, data);
else
- logerror("ineffective write to port R%d = $%X at $%04X\n", index, data & 0xf, m_prev_pc);
+ logerror("ineffective write to port R%d = $%X @ $%04X\n", index, data & 0xf, m_prev_pc);
}
// HMCS45:
// R0-R5 are i/o, R6 is output-only, no R7
// D0-D15 are i/o
-u8 hmcs45_cpu_device::read_r(int index)
+u8 hmcs45_cpu_device::read_r(u8 index)
{
index &= 7;
if (index >= 6)
- logerror("read from %s port R%d at $%04X\n", (index == 7) ? "unknown" : "output", index, m_prev_pc);
+ logerror("read from %s port R%d @ $%04X\n", (index == 7) ? "unknown" : "output", index, m_prev_pc);
return hmcs40_cpu_device::read_r(index);
}
-void hmcs45_cpu_device::write_r(int index, u8 data)
+void hmcs45_cpu_device::write_r(u8 index, u8 data)
{
index &= 7;
if (index != 7)
hmcs40_cpu_device::write_r(index, data);
else
- logerror("ineffective write to port R%d = $%X at $%04X\n", index, data & 0xf, m_prev_pc);
+ logerror("ineffective write to port R%d = $%X @ $%04X\n", index, data & 0xf, m_prev_pc);
}
+// HMCS46:
+// R0-R3 are i/o, R4,R5,R7 are extra registers, no R6
+// D0-D15 are i/o
+
+u8 hmcs46_cpu_device::read_r(u8 index)
+{
+ index &= 7;
+
+ if (index == 6)
+ logerror("read from unknown port R%d @ $%04X\n", index, m_prev_pc);
+
+ return hmcs40_cpu_device::read_r(index);
+}
+
+void hmcs46_cpu_device::write_r(u8 index, u8 data)
+{
+ index &= 7;
+
+ if (index != 6)
+ hmcs40_cpu_device::write_r(index, data);
+ else
+ logerror("ineffective write to port R%d = $%X @ $%04X\n", index, data & 0xf, m_prev_pc);
+}
+
+// HMCS47:
+// R0-R5 are i/o, R6 is output-only, R7 is an extra register
+// D0-D15 are i/o
+
+u8 hmcs47_cpu_device::read_r(u8 index)
+{
+ index &= 7;
+
+ if (index == 6)
+ logerror("read from output port R%d @ $%04X\n", index, m_prev_pc);
+
+ return hmcs40_cpu_device::read_r(index);
+}
//-------------------------------------------------
-// interrupt/timer handling
+// interrupt/timer
//-------------------------------------------------
-void hmcs40_cpu_device::do_interrupt()
+void hmcs40_cpu_device::take_interrupt()
{
push_stack();
m_ie = 0;
@@ -464,7 +572,7 @@ void hmcs40_cpu_device::do_interrupt()
void hmcs40_cpu_device::execute_set_input(int line, int state)
{
- state = (state) ? 1 : 0;
+ state = state ? 1 : 0;
// halt/unhalt mcu
if (line == HMCS40_INPUT_LINE_HLT && state != m_halt)
@@ -488,23 +596,13 @@ void hmcs40_cpu_device::execute_set_input(int line, int state)
// clock tc if it is in counter mode
if (m_cf && line == 1)
- increment_tc();
+ clock_timer();
}
m_int[line] = state;
}
-void hmcs40_cpu_device::cycle()
-{
- m_icount--;
- m_prescaler = (m_prescaler + 1) & 0x3f;
-
- // timer prescaler overflow
- if (m_prescaler == 0 && !m_cf)
- increment_tc();
-}
-
-void hmcs40_cpu_device::increment_tc()
+void hmcs40_cpu_device::clock_timer()
{
// increment timer/counter
m_tc = (m_tc + 1) & 0xf;
@@ -517,6 +615,14 @@ void hmcs40_cpu_device::increment_tc()
}
}
+void hmcs40_cpu_device::clock_prescaler()
+{
+ m_prescaler = (m_prescaler + 1) & 0x3f;
+
+ // timer prescaler overflow
+ if (m_prescaler == 0 && !m_cf)
+ clock_timer();
+}
//-------------------------------------------------
@@ -538,11 +644,18 @@ inline void hmcs40_cpu_device::increment_pc()
m_pc = (m_pc & ~mask) | ((m_pc << 1 | fb) & mask);
}
+void hmcs40_cpu_device::cycle()
+{
+ m_icount--;
+ clock_prescaler();
+}
+
void hmcs40_cpu_device::execute_run()
{
// in HLT state, the internal clock is not running
if (m_halt)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -551,7 +664,7 @@ void hmcs40_cpu_device::execute_run()
{
// LPU is handled 1 cycle later
if ((m_prev_op & 0x7e0) == 0x340)
- m_pc = ((m_page << 6) | (m_pc & 0x3f)) & m_pcmask;
+ m_pc = ((m_pc_upper << 6) | (m_pc & 0x3f)) & m_pcmask;
// remember previous state
m_prev_op = m_op;
@@ -559,7 +672,7 @@ void hmcs40_cpu_device::execute_run()
// check/handle interrupt
if (m_ie && (m_iri || m_irt) && !m_block_int)
- do_interrupt();
+ take_interrupt();
m_block_int = false;
// fetch next opcode
@@ -570,233 +683,113 @@ void hmcs40_cpu_device::execute_run()
cycle();
// handle opcode
- switch (m_op)
+ switch (m_op & 0x3f0)
{
- /* 0x000 */
-
- case 0x000: case 0x001: case 0x002: case 0x003:
- op_xsp(); break;
- case 0x004: case 0x005: case 0x006: case 0x007:
- op_sem(); break;
- case 0x008: case 0x009: case 0x00a: case 0x00b:
- op_lam(); break;
- case 0x010: case 0x011: case 0x012: case 0x013: case 0x014: case 0x015: case 0x016: case 0x017:
- case 0x018: case 0x019: case 0x01a: case 0x01b: case 0x01c: case 0x01d: case 0x01e: case 0x01f:
- op_lmiiy(); break;
- case 0x020: case 0x021: case 0x022: case 0x023:
- op_lbm(); break;
- case 0x024:
- op_blem(); break;
- case 0x030:
- op_amc(); break;
- case 0x034:
- op_am(); break;
- case 0x03c:
- op_lta(); break;
-
- case 0x040:
- op_lxa(); break;
- case 0x045:
- op_das(); break;
- case 0x046:
- op_daa(); break;
- case 0x04c:
- op_rec(); break;
- case 0x04f:
- op_sec(); break;
- case 0x050:
- op_lya(); break;
- case 0x054:
- op_iy(); break;
- case 0x058:
- op_ayy(); break;
- case 0x060:
- op_lba(); break;
- case 0x064:
- op_ib(); break;
- case 0x070: case 0x071: case 0x072: case 0x073: case 0x074: case 0x075: case 0x076: case 0x077:
- case 0x078: case 0x079: case 0x07a: case 0x07b: case 0x07c: case 0x07d: case 0x07e: case 0x07f:
- op_lai(); break;
-
- case 0x080: case 0x081: case 0x082: case 0x083: case 0x084: case 0x085: case 0x086: case 0x087:
- case 0x088: case 0x089: case 0x08a: case 0x08b: case 0x08c: case 0x08d: case 0x08e: case 0x08f:
- op_ai(); break;
- case 0x090:
- op_sed(); break;
- case 0x094:
- op_td(); break;
- case 0x0a0:
- op_seif1(); break;
- case 0x0a1:
- op_secf(); break;
- case 0x0a2:
- op_seif0(); break;
- case 0x0a4:
- op_seie(); break;
- case 0x0a5:
- op_setf(); break;
-
- case 0x0c0: case 0x0c1: case 0x0c2: case 0x0c3: case 0x0c4: case 0x0c5: case 0x0c6: case 0x0c7:
- op_lar(); break;
- case 0x0d0: case 0x0d1: case 0x0d2: case 0x0d3:
- op_sedd(); break;
- case 0x0e0: case 0x0e1: case 0x0e2: case 0x0e3: case 0x0e4: case 0x0e5: case 0x0e6: case 0x0e7:
- op_lbr(); break;
- case 0x0f0: case 0x0f1: case 0x0f2: case 0x0f3: case 0x0f4: case 0x0f5: case 0x0f6: case 0x0f7:
- case 0x0f8: case 0x0f9: case 0x0fa: case 0x0fb: case 0x0fc: case 0x0fd: case 0x0fe: case 0x0ff:
- op_xamr(); break;
-
-
- /* 0x100 */
-
- case 0x110: case 0x111:
- op_lmaiy(); break;
- case 0x114: case 0x115:
- op_lmady(); break;
- case 0x118:
- op_lay(); break;
- case 0x120:
- op_or(); break;
- case 0x124:
- op_anem(); break;
-
- case 0x140: case 0x141: case 0x142: case 0x143: case 0x144: case 0x145: case 0x146: case 0x147:
- case 0x148: case 0x149: case 0x14a: case 0x14b: case 0x14c: case 0x14d: case 0x14e: case 0x14f:
- op_lxi(); break;
- case 0x150: case 0x151: case 0x152: case 0x153: case 0x154: case 0x155: case 0x156: case 0x157:
- case 0x158: case 0x159: case 0x15a: case 0x15b: case 0x15c: case 0x15d: case 0x15e: case 0x15f:
- op_lyi(); break;
- case 0x160: case 0x161: case 0x162: case 0x163: case 0x164: case 0x165: case 0x166: case 0x167:
- case 0x168: case 0x169: case 0x16a: case 0x16b: case 0x16c: case 0x16d: case 0x16e: case 0x16f:
- op_lbi(); break;
- case 0x170: case 0x171: case 0x172: case 0x173: case 0x174: case 0x175: case 0x176: case 0x177:
- case 0x178: case 0x179: case 0x17a: case 0x17b: case 0x17c: case 0x17d: case 0x17e: case 0x17f:
- op_lti(); break;
-
- case 0x1a0:
- op_tif1(); break;
- case 0x1a1:
- op_ti1(); break;
- case 0x1a2:
- op_tif0(); break;
- case 0x1a3:
- op_ti0(); break;
- case 0x1a5:
- op_ttf(); break;
-
- case 0x1c0: case 0x1c1: case 0x1c2: case 0x1c3: case 0x1c4: case 0x1c5: case 0x1c6: case 0x1c7:
- case 0x1c8: case 0x1c9: case 0x1ca: case 0x1cb: case 0x1cc: case 0x1cd: case 0x1ce: case 0x1cf:
- case 0x1d0: case 0x1d1: case 0x1d2: case 0x1d3: case 0x1d4: case 0x1d5: case 0x1d6: case 0x1d7:
- case 0x1d8: case 0x1d9: case 0x1da: case 0x1db: case 0x1dc: case 0x1dd: case 0x1de: case 0x1df:
- case 0x1e0: case 0x1e1: case 0x1e2: case 0x1e3: case 0x1e4: case 0x1e5: case 0x1e6: case 0x1e7:
- case 0x1e8: case 0x1e9: case 0x1ea: case 0x1eb: case 0x1ec: case 0x1ed: case 0x1ee: case 0x1ef:
- case 0x1f0: case 0x1f1: case 0x1f2: case 0x1f3: case 0x1f4: case 0x1f5: case 0x1f6: case 0x1f7:
- case 0x1f8: case 0x1f9: case 0x1fa: case 0x1fb: case 0x1fc: case 0x1fd: case 0x1fe: case 0x1ff:
- op_br(); break;
-
-
- /* 0x200 */
-
- case 0x200: case 0x201: case 0x202: case 0x203:
- op_tm(); break;
- case 0x204: case 0x205: case 0x206: case 0x207:
- op_rem(); break;
- case 0x208: case 0x209: case 0x20a: case 0x20b:
- op_xma(); break;
- case 0x210: case 0x211: case 0x212: case 0x213: case 0x214: case 0x215: case 0x216: case 0x217:
- case 0x218: case 0x219: case 0x21a: case 0x21b: case 0x21c: case 0x21d: case 0x21e: case 0x21f:
- op_mnei(); break;
- case 0x220: case 0x221: case 0x222: case 0x223:
- op_xmb(); break;
- case 0x224:
- op_rotr(); break;
- case 0x225:
- op_rotl(); break;
- case 0x230:
- op_smc(); break;
- case 0x234:
- op_alem(); break;
- case 0x23c:
- op_lat(); break;
-
- case 0x240:
- op_laspx(); break;
- case 0x244:
- op_nega(); break;
- case 0x24f:
- op_tc(); break;
- case 0x250:
- op_laspy(); break;
- case 0x254:
- op_dy(); break;
- case 0x258:
- op_syy(); break;
- case 0x260:
- op_lab(); break;
- case 0x267:
- op_db(); break;
- case 0x270: case 0x271: case 0x272: case 0x273: case 0x274: case 0x275: case 0x276: case 0x277:
- case 0x278: case 0x279: case 0x27a: case 0x27b: case 0x27c: case 0x27d: case 0x27e: case 0x27f:
- op_alei(); break;
-
- case 0x280: case 0x281: case 0x282: case 0x283: case 0x284: case 0x285: case 0x286: case 0x287:
- case 0x288: case 0x289: case 0x28a: case 0x28b: case 0x28c: case 0x28d: case 0x28e: case 0x28f:
- op_ynei(); break;
- case 0x290:
- op_red(); break;
- case 0x2a0:
- op_reif1(); break;
- case 0x2a1:
- op_recf(); break;
- case 0x2a2:
- op_reif0(); break;
- case 0x2a4:
- op_reie(); break;
- case 0x2a5:
- op_retf(); break;
-
- case 0x2c0: case 0x2c1: case 0x2c2: case 0x2c3: case 0x2c4: case 0x2c5: case 0x2c6: case 0x2c7:
- op_lra(); break;
- case 0x2d0: case 0x2d1: case 0x2d2: case 0x2d3:
- op_redd(); break;
- case 0x2e0: case 0x2e1: case 0x2e2: case 0x2e3: case 0x2e4: case 0x2e5: case 0x2e6: case 0x2e7:
- op_lrb(); break;
-
-
- /* 0x300 */
- case 0x320:
- op_comb(); break;
- case 0x324:
- op_bnem(); break;
-
- case 0x340: case 0x341: case 0x342: case 0x343: case 0x344: case 0x345: case 0x346: case 0x347:
- case 0x348: case 0x349: case 0x34a: case 0x34b: case 0x34c: case 0x34d: case 0x34e: case 0x34f:
- case 0x350: case 0x351: case 0x352: case 0x353: case 0x354: case 0x355: case 0x356: case 0x357:
- case 0x358: case 0x359: case 0x35a: case 0x35b: case 0x35c: case 0x35d: case 0x35e: case 0x35f:
- op_lpu(); break;
- case 0x360: case 0x361: case 0x362: case 0x363: case 0x364: case 0x365: case 0x366: case 0x367:
- op_tbr(); break;
- case 0x368: case 0x369: case 0x36a: case 0x36b: case 0x36c: case 0x36d: case 0x36e: case 0x36f:
- op_p(); break;
-
- case 0x3a4:
- op_rtni(); break;
- case 0x3a7:
- op_rtn(); break;
-
- case 0x3c0: case 0x3c1: case 0x3c2: case 0x3c3: case 0x3c4: case 0x3c5: case 0x3c6: case 0x3c7:
- case 0x3c8: case 0x3c9: case 0x3ca: case 0x3cb: case 0x3cc: case 0x3cd: case 0x3ce: case 0x3cf:
- case 0x3d0: case 0x3d1: case 0x3d2: case 0x3d3: case 0x3d4: case 0x3d5: case 0x3d6: case 0x3d7:
- case 0x3d8: case 0x3d9: case 0x3da: case 0x3db: case 0x3dc: case 0x3dd: case 0x3de: case 0x3df:
- case 0x3e0: case 0x3e1: case 0x3e2: case 0x3e3: case 0x3e4: case 0x3e5: case 0x3e6: case 0x3e7:
- case 0x3e8: case 0x3e9: case 0x3ea: case 0x3eb: case 0x3ec: case 0x3ed: case 0x3ee: case 0x3ef:
- case 0x3f0: case 0x3f1: case 0x3f2: case 0x3f3: case 0x3f4: case 0x3f5: case 0x3f6: case 0x3f7:
- case 0x3f8: case 0x3f9: case 0x3fa: case 0x3fb: case 0x3fc: case 0x3fd: case 0x3fe: case 0x3ff:
- op_cal(); break;
+ case 0x1c0: case 0x1d0: case 0x1e0: case 0x1f0: op_br(); break;
+ case 0x3c0: case 0x3d0: case 0x3e0: case 0x3f0: op_cal(); break;
+ case 0x340: case 0x350: op_lpu(); break;
+
+ case 0x010: op_lmiiy(); break;
+ case 0x070: op_lai(); break;
+ case 0x080: op_ai(); break;
+ case 0x0f0: op_xamr(); break;
+ case 0x140: op_lxi(); break;
+ case 0x150: op_lyi(); break;
+ case 0x160: op_lbi(); break;
+ case 0x170: op_lti(); break;
+ case 0x210: op_mnei(); break;
+ case 0x270: op_alei(); break;
+ case 0x280: op_ynei(); break;
+ default:
+ switch (m_op & 0x3fc)
+ {
+ case 0x0c0: case 0x0c4: op_lar(); break;
+ case 0x0e0: case 0x0e4: op_lbr(); break;
+ case 0x2c0: case 0x2c4: op_lra(); break;
+ case 0x2e0: case 0x2e4: op_lrb(); break;
+ case 0x360: case 0x364: op_tbr(); break;
+ case 0x368: case 0x36c: op_p(); break;
+
+ case 0x000: op_xsp(); break;
+ case 0x004: op_sem(); break;
+ case 0x008: op_lam(); break;
+ case 0x020: op_lbm(); break;
+ case 0x0d0: op_sedd(); break;
+ case 0x200: op_tm(); break;
+ case 0x204: op_rem(); break;
+ case 0x208: op_xma(); break;
+ case 0x220: op_xmb(); break;
+ case 0x2d0: op_redd(); break;
default:
- op_illegal(); break;
- } /* big switch */
+ switch (m_op)
+ {
+ case 0x024: op_blem(); break;
+ case 0x030: op_amc(); break;
+ case 0x034: op_am(); break;
+ case 0x03c: op_lta(); break;
+ case 0x040: op_lxa(); break;
+ case 0x045: op_das(); break;
+ case 0x046: op_daa(); break;
+ case 0x04c: op_rec(); break;
+ case 0x04f: op_sec(); break;
+ case 0x050: op_lya(); break;
+ case 0x054: op_iy(); break;
+ case 0x058: op_ayy(); break;
+ case 0x060: op_lba(); break;
+ case 0x064: op_ib(); break;
+ case 0x090: op_sed(); break;
+ case 0x094: op_td(); break;
+ case 0x0a0: op_seif1(); break;
+ case 0x0a1: op_secf(); break;
+ case 0x0a2: op_seif0(); break;
+ case 0x0a4: op_seie(); break;
+ case 0x0a5: op_setf(); break;
+
+ case 0x110: case 0x111: op_lmaiy(); break;
+ case 0x114: case 0x115: op_lmady(); break;
+ case 0x118: op_lay(); break;
+ case 0x120: op_or(); break;
+ case 0x124: op_anem(); break;
+ case 0x1a0: op_tif1(); break;
+ case 0x1a1: op_ti1(); break;
+ case 0x1a2: op_tif0(); break;
+ case 0x1a3: op_ti0(); break;
+ case 0x1a5: op_ttf(); break;
+
+ case 0x224: op_rotr(); break;
+ case 0x225: op_rotl(); break;
+ case 0x230: op_smc(); break;
+ case 0x234: op_alem(); break;
+ case 0x23c: op_lat(); break;
+ case 0x240: op_laspx(); break;
+ case 0x244: op_nega(); break;
+ case 0x24f: op_tc(); break;
+ case 0x250: op_laspy(); break;
+ case 0x254: op_dy(); break;
+ case 0x258: op_syy(); break;
+ case 0x260: op_lab(); break;
+ case 0x267: op_db(); break;
+ case 0x290: op_red(); break;
+ case 0x2a0: op_reif1(); break;
+ case 0x2a1: op_recf(); break;
+ case 0x2a2: op_reif0(); break;
+ case 0x2a4: op_reie(); break;
+ case 0x2a5: op_retf(); break;
+
+ case 0x320: op_comb(); break;
+ case 0x324: op_bnem(); break;
+ case 0x3a4: op_rtni(); break;
+ case 0x3a7: op_rtn(); break;
+
+ default: op_illegal(); break;
+ }
+ break; // 0x3ff
+
+ }
+ break; // 0x3fc
+
+ } // 0x3f0
}
}
diff --git a/src/devices/cpu/hmcs40/hmcs40.h b/src/devices/cpu/hmcs40/hmcs40.h
index eb4592653db..c81ac756829 100644
--- a/src/devices/cpu/hmcs40/hmcs40.h
+++ b/src/devices/cpu/hmcs40/hmcs40.h
@@ -12,7 +12,7 @@
#pragma once
-// I/O ports setup
+// input lines
enum
{
@@ -81,6 +81,8 @@ enum
class hmcs40_cpu_device : public cpu_device
{
public:
+ virtual ~hmcs40_cpu_device();
+
// max 8 4-bit R ports
template <std::size_t N> auto read_r() { return m_read_r[N].bind(); }
template <std::size_t N> auto write_r() { return m_write_r[N].bind(); }
@@ -92,42 +94,42 @@ public:
protected:
enum
{
- HMCS40_FAMILY_HMCS42 = 0,
- HMCS40_FAMILY_HMCS43,
- HMCS40_FAMILY_HMCS44,
- HMCS40_FAMILY_HMCS45,
- HMCS40_FAMILY_HMCS46,
- HMCS40_FAMILY_HMCS47
+ HMCS42_FAMILY = 0,
+ HMCS43_FAMILY,
+ HMCS44_FAMILY,
+ HMCS45_FAMILY,
+ HMCS46_FAMILY,
+ HMCS47_FAMILY
};
- // construction/destruction
+ // construction
hmcs40_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int family, u16 polarity, int stack_levels, int pcwidth, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } // "
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2+1; } // max 2 + interrupt
- virtual u32 execute_input_lines() const noexcept override { return 2+1; } // 3rd one is internal
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // memorymaps
- void program_1k(address_map &map);
- void program_2k(address_map &map);
- void data_160x4(address_map &map);
- void data_80x4(address_map &map);
+ // memory maps
+ void program_1k(address_map &map) ATTR_COLD;
+ void program_2k(address_map &map) ATTR_COLD;
+ void data_80x4(address_map &map) ATTR_COLD;
+ void data_160x4(address_map &map) ATTR_COLD;
+ void data_256x4(address_map &map) ATTR_COLD;
address_space_config m_program_config;
address_space_config m_data_config;
@@ -137,45 +139,47 @@ protected:
int m_icount;
int m_state_count;
- int const m_pcwidth; // Program Counter bit-width
- int const m_prgwidth;
- int const m_datawidth;
- int const m_family; // MCU family (42-47)
- u16 const m_polarity; // i/o polarity (pmos vs cmos)
- int const m_stack_levels; // number of callstack levels
+ const int m_pcwidth; // program counter bit-width
+ const int m_prgwidth;
+ const int m_datawidth;
+ const int m_family; // MCU family (42-47)
+ const u16 m_polarity; // i/o polarity (pmos vs cmos)
+ const int m_stack_levels; // number of callstack levels
int m_pcmask;
int m_prgmask;
int m_datamask;
- u16 m_stack[4]; // max 4
- u16 m_op; // current opcode
+
+ u16 m_stack[4]; // max 4
+ u16 m_op; // current opcode
u16 m_prev_op;
- u8 m_i; // 4-bit immediate opcode param
- int m_eint_line; // which input_line caused an interrupt
- int m_halt; // internal HLT state
- u8 m_prescaler; // internal timer prescaler
- bool m_block_int; // block interrupt on next cycle
+ u8 m_i; // 4-bit immediate opcode param
+ int m_eint_line; // which input_line caused an interrupt
+ int m_halt; // internal HLT state
+ u8 m_prescaler; // internal timer prescaler
+ bool m_block_int; // block interrupt on next cycle
- u16 m_pc; // Program Counter
+ u16 m_pc; // program counter
u16 m_prev_pc;
- u8 m_page; // LPU prepared page
- u8 m_a; // 4-bit Accumulator
- u8 m_b; // 4-bit B register
- u8 m_x; // 1/3/4-bit X register
- u8 m_spx; // 1/3/4-bit SPX register
- u8 m_y; // 4-bit Y register
- u8 m_spy; // 4-bit SPY register
- u8 m_s; // Status F/F (F/F = flip-flop)
- u8 m_c; // Carry F/F
- u8 m_tc; // Timer/Counter
- u8 m_cf; // CF F/F (timer mode or counter mode)
- u8 m_ie; // I/E(Interrupt Enable) F/F
- u8 m_iri; // external interrupt pending I/RI F/F
- u8 m_irt; // timer interrupt pending I/RT F/F
- u8 m_if[2]; // external interrupt mask IF0,1 F/F
- u8 m_tf; // timer interrupt mask TF F/F
- u8 m_int[2]; // INT0/1 pins state
- u8 m_r[8]; // R outputs state
- u16 m_d; // D pins state
+ u8 m_pc_upper; // LPU prepared upper bits of PC
+ u8 m_a; // 4-bit accumulator
+ u8 m_b; // 4-bit B register
+ u8 m_x; // 1/3/4-bit X register
+ u8 m_spx; // 1/3/4-bit SPX register
+ u8 m_y; // 4-bit Y register
+ u8 m_spy; // 4-bit SPY register
+ u8 m_s; // status F/F (F/F = flip-flop)
+ u8 m_c; // carry F/F
+
+ u8 m_tc; // timer/counter
+ u8 m_cf; // CF F/F (timer mode or counter mode)
+ u8 m_ie; // I/E (interrupt enable) F/F
+ u8 m_iri; // external interrupt pending I/RI F/F
+ u8 m_irt; // timer interrupt pending I/RT F/F
+ u8 m_if[2]; // external interrupt mask IF0,1 F/F
+ u8 m_tf; // timer interrupt mask TF F/F
+ u8 m_int[2]; // INT0/1 pins state
+ u8 m_r[8]; // R outputs state
+ u16 m_d; // D pins state
// I/O handlers
devcb_read8::array<8> m_read_r;
@@ -185,20 +189,22 @@ protected:
// misc internal helpers
void increment_pc();
+ void cycle();
u8 ram_r();
void ram_w(u8 data);
void pop_stack();
void push_stack();
- virtual u8 read_r(int index);
- virtual void write_r(int index, u8 data);
- virtual int read_d(int index);
- virtual void write_d(int index, int state);
+ virtual void reset_io();
+ virtual u8 read_r(u8 index);
+ virtual void write_r(u8 index, u8 data);
+ virtual int read_d(u8 index);
+ virtual void write_d(u8 index, int state);
- void cycle();
- void increment_tc();
- void do_interrupt();
+ void take_interrupt();
+ void clock_timer();
+ void clock_prescaler();
// opcode handlers
void op_illegal();
@@ -305,9 +311,9 @@ protected:
hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity);
// overrides
- virtual u8 read_r(int index) override;
- virtual void write_r(int index, u8 data) override;
- virtual int read_d(int index) override;
+ virtual u8 read_r(u8 index) override;
+ virtual void write_r(u8 index, u8 data) override;
+ virtual int read_d(u8 index) override;
};
class hd38750_device : public hmcs43_cpu_device
@@ -341,8 +347,8 @@ protected:
hmcs44_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity);
// overrides
- virtual u8 read_r(int index) override;
- virtual void write_r(int index, u8 data) override;
+ virtual u8 read_r(u8 index) override;
+ virtual void write_r(u8 index, u8 data) override;
};
class hd38800_device : public hmcs44_cpu_device
@@ -376,8 +382,8 @@ protected:
hmcs45_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity);
// overrides
- virtual u8 read_r(int index) override;
- virtual void write_r(int index, u8 data) override;
+ virtual u8 read_r(u8 index) override;
+ virtual void write_r(u8 index, u8 data) override;
};
class hd38820_device : public hmcs45_cpu_device
@@ -405,6 +411,56 @@ public:
};
+class hmcs46_cpu_device : public hmcs40_cpu_device
+{
+protected:
+ hmcs46_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity);
+
+ // overrides
+ virtual u8 read_r(u8 index) override;
+ virtual void write_r(u8 index, u8 data) override;
+};
+
+class hd44840_device : public hmcs46_cpu_device
+{
+public:
+ hd44840_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd44848_device : public hmcs46_cpu_device
+{
+public:
+ hd44848_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs47_cpu_device : public hmcs40_cpu_device
+{
+protected:
+ hmcs47_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 polarity);
+
+ // overrides
+ virtual u8 read_r(u8 index) override;
+};
+
+class hd38870_device : public hmcs47_cpu_device
+{
+public:
+ hd38870_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd44860_device : public hmcs47_cpu_device
+{
+public:
+ hd44860_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd44868_device : public hmcs47_cpu_device
+{
+public:
+ hd44868_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
DECLARE_DEVICE_TYPE(HD38750, hd38750_device)
DECLARE_DEVICE_TYPE(HD38755, hd38755_device)
@@ -421,4 +477,12 @@ DECLARE_DEVICE_TYPE(HD38825, hd38825_device)
DECLARE_DEVICE_TYPE(HD44820, hd44820_device)
DECLARE_DEVICE_TYPE(HD44828, hd44828_device)
+DECLARE_DEVICE_TYPE(HD44840, hd44840_device)
+DECLARE_DEVICE_TYPE(HD44848, hd44848_device)
+
+DECLARE_DEVICE_TYPE(HD38870, hd38870_device)
+DECLARE_DEVICE_TYPE(HD44860, hd44860_device)
+DECLARE_DEVICE_TYPE(HD44868, hd44868_device)
+
+
#endif // MAME_CPU_HMCS40_HMCS40_H
diff --git a/src/devices/cpu/hmcs40/hmcs40d.cpp b/src/devices/cpu/hmcs40/hmcs40d.cpp
index c0918df2977..251a31cdfa5 100644
--- a/src/devices/cpu/hmcs40/hmcs40d.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40d.cpp
@@ -4,7 +4,8 @@
Hitachi HMCS40 MCU family disassembler
- NOTE: start offset(basepc) is $3F, not 0
+ NOTE: start offset(basepc) is $3F, not 0. In other words, if you want a full
+ disasm from MAME's debugger: dasm x.asm,3f,1000
*/
@@ -16,7 +17,7 @@
hmcs40_disassembler::hmcs40_disassembler()
{
// init lfsr pc lut
- for (u32 i = 0, pc = 0; i < 0x40; i++)
+ for (u32 i = 0, pc = 0x3f; i < 0x40; i++)
{
m_l2r[i] = pc;
m_r2l[pc] = i;
@@ -35,9 +36,29 @@ hmcs40_disassembler::hmcs40_disassembler()
}
}
+hmcs40_disassembler::~hmcs40_disassembler()
+{
+}
+
// common lookup tables
+enum hmcs40_disassembler::e_mnemonics : unsigned
+{
+ mILL,
+ mLAB, mLBA, mLAY, mLASPX, mLASPY, mXAMR,
+ mLXA, mLYA, mLXI, mLYI, mIY, mDY, mAYY, mSYY, mXSP,
+ mLAM, mLBM, mXMA, mXMB, mLMAIY, mLMADY,
+ mLMIIY, mLAI, mLBI,
+ mAI, mIB, mDB, mAMC, mSMC, mAM, mDAA, mDAS, mNEGA, mCOMB, mSEC, mREC, mTC, mROTL, mROTR, mOR,
+ mMNEI, mYNEI, mANEM, mBNEM, mALEI, mALEM, mBLEM,
+ mSEM, mREM, mTM,
+ mBR, mCAL, mLPU, mTBR, mRTN,
+ mSEIE, mSEIF0, mSEIF1, mSETF, mSECF, mREIE, mREIF0, mREIF1, mRETF, mRECF, mTI0, mTI1, mTIF0, mTIF1, mTTF, mLTI, mLTA, mLAT, mRTNI,
+ mSED, mRED, mTD, mSEDD, mREDD, mLAR, mLBR, mLRA, mLRB, mP,
+ mNOP
+};
+
const char *const hmcs40_disassembler::s_mnemonics[] =
{
"?",
@@ -215,11 +236,7 @@ offs_t hmcs40_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
}
param &= ((1 << bits) - 1);
-
- if (bits > 5)
- util::stream_format(stream, "$%02X", param);
- else
- util::stream_format(stream, "%d", param);
+ util::stream_format(stream, (bits > 4) ? "$%02X" : (param < 10) ? "%d" : "$%X", param);
}
}
diff --git a/src/devices/cpu/hmcs40/hmcs40d.h b/src/devices/cpu/hmcs40/hmcs40d.h
index fdd00fd32f1..f67ba8f3b9f 100644
--- a/src/devices/cpu/hmcs40/hmcs40d.h
+++ b/src/devices/cpu/hmcs40/hmcs40d.h
@@ -15,32 +15,18 @@ class hmcs40_disassembler : public util::disasm_interface
{
public:
hmcs40_disassembler();
- virtual ~hmcs40_disassembler() = default;
+ virtual ~hmcs40_disassembler();
virtual u32 opcode_alignment() const override { return 1; }
- virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED; }
+ virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED2LEVEL; }
virtual u32 page_address_bits() const override { return 6; }
+ virtual u32 page2_address_bits() const override { return 5; }
virtual offs_t pc_linear_to_real(offs_t pc) const override { return (pc & ~0x3f) | m_l2r[pc & 0x3f]; }
virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x3f) | m_r2l[pc & 0x3f]; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum e_mnemonics
- {
- mILL,
- mLAB, mLBA, mLAY, mLASPX, mLASPY, mXAMR,
- mLXA, mLYA, mLXI, mLYI, mIY, mDY, mAYY, mSYY, mXSP,
- mLAM, mLBM, mXMA, mXMB, mLMAIY, mLMADY,
- mLMIIY, mLAI, mLBI,
- mAI, mIB, mDB, mAMC, mSMC, mAM, mDAA, mDAS, mNEGA, mCOMB, mSEC, mREC, mTC, mROTL, mROTR, mOR,
- mMNEI, mYNEI, mANEM, mBNEM, mALEI, mALEM, mBLEM,
- mSEM, mREM, mTM,
- mBR, mCAL, mLPU, mTBR, mRTN,
- mSEIE, mSEIF0, mSEIF1, mSETF, mSECF, mREIE, mREIF0, mREIF1, mRETF, mRECF, mTI0, mTI1, mTIF0, mTIF1, mTTF, mLTI, mLTA, mLAT, mRTNI,
- mSED, mRED, mTD, mSEDD, mREDD, mLAR, mLBR, mLRA, mLRB, mP,
- mNOP
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonics[];
static const s8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/hmcs40/hmcs40op.cpp b/src/devices/cpu/hmcs40/hmcs40op.cpp
index 3469ce495ba..713dd111777 100644
--- a/src/devices/cpu/hmcs40/hmcs40op.cpp
+++ b/src/devices/cpu/hmcs40/hmcs40op.cpp
@@ -36,16 +36,15 @@ void hmcs40_cpu_device::push_stack()
}
-
// instruction set
void hmcs40_cpu_device::op_illegal()
{
- logerror("unknown opcode $%03X at $%04X\n", m_op, m_prev_pc);
+ logerror("unknown opcode $%03X @ $%04X\n", m_op, m_prev_pc);
}
-// Register-to-Register Instruction
+// register-to-register instructions
void hmcs40_cpu_device::op_lab()
{
@@ -86,7 +85,7 @@ void hmcs40_cpu_device::op_xamr()
// HMCS42: MR0 on file 0, MR4-MR15 on file 4 (there is no file 1-3)
// HMCS43: MR0-MR3 on file 0-3, MR4-MR15 on file 4
- if (m_family == HMCS40_FAMILY_HMCS42 || m_family == HMCS40_FAMILY_HMCS43)
+ if (m_family == HMCS42_FAMILY || m_family == HMCS43_FAMILY)
address |= (address < 4) ? (address << 4) : 0x40;
// HMCS44/45/46/47: all on last file
@@ -100,7 +99,7 @@ void hmcs40_cpu_device::op_xamr()
}
-// RAM Address Instruction
+// RAM address instructions
void hmcs40_cpu_device::op_lxa()
{
@@ -144,7 +143,7 @@ void hmcs40_cpu_device::op_ayy()
{
// AYY: Add A to Y
m_y += m_a;
- m_s = m_y >> 4 & 1;
+ m_s = BIT(m_y, 4);
m_y &= 0xf;
}
@@ -152,13 +151,13 @@ void hmcs40_cpu_device::op_syy()
{
// SYY: Subtract A from Y
m_y -= m_a;
- m_s = ~m_y >> 4 & 1;
+ m_s = BIT(~m_y, 4);
m_y &= 0xf;
}
void hmcs40_cpu_device::op_xsp()
{
- // XSP (XY): Exchange X and SPX, Y and SPY, or NOP if 0
+ // XSP(XY): Exchange X and SPX, Y and SPY, or NOP if 0
if (m_op & 1)
{
u8 old_x = m_x;
@@ -174,25 +173,25 @@ void hmcs40_cpu_device::op_xsp()
}
-// RAM Register Instruction
+// RAM register instructions
void hmcs40_cpu_device::op_lam()
{
- // LAM (XY): Load A from Memory
+ // LAM(XY): Load A from Memory
m_a = ram_r();
op_xsp();
}
void hmcs40_cpu_device::op_lbm()
{
- // LBM (XY): Load B from Memory
+ // LBM(XY): Load B from Memory
m_b = ram_r();
op_xsp();
}
void hmcs40_cpu_device::op_xma()
{
- // XMA (XY): Exchange Memory and A
+ // XMA(XY): Exchange Memory and A
u8 old_a = m_a;
m_a = ram_r();
ram_w(old_a);
@@ -201,7 +200,7 @@ void hmcs40_cpu_device::op_xma()
void hmcs40_cpu_device::op_xmb()
{
- // XMB (XY): Exchange Memory and B
+ // XMB(XY): Exchange Memory and B
u8 old_b = m_b;
m_b = ram_r();
ram_w(old_b);
@@ -210,7 +209,7 @@ void hmcs40_cpu_device::op_xmb()
void hmcs40_cpu_device::op_lmaiy()
{
- // LMAIY (X): Load Memory from A, Increment Y
+ // LMAIY(X): Load Memory from A, Increment Y
ram_w(m_a);
op_iy();
op_xsp();
@@ -218,14 +217,14 @@ void hmcs40_cpu_device::op_lmaiy()
void hmcs40_cpu_device::op_lmady()
{
- // LMADY (X): Load Memory from A, Decrement Y
+ // LMADY(X): Load Memory from A, Decrement Y
ram_w(m_a);
op_dy();
op_xsp();
}
-// Immediate Instruction
+// immediate instructions
void hmcs40_cpu_device::op_lmiiy()
{
@@ -247,13 +246,13 @@ void hmcs40_cpu_device::op_lbi()
}
-// Arithmetic Instruction
+// arithmetic instructions
void hmcs40_cpu_device::op_ai()
{
// AI i: Add Immediate to A
m_a += m_i;
- m_s = m_a >> 4 & 1;
+ m_s = BIT(m_a, 4);
m_a &= 0xf;
}
@@ -275,7 +274,7 @@ void hmcs40_cpu_device::op_amc()
{
// AMC: Add A to Memory with Carry
m_a += ram_r() + m_c;
- m_c = m_a >> 4 & 1;
+ m_c = BIT(m_a, 4);
m_s = m_c;
m_a &= 0xf;
}
@@ -284,7 +283,7 @@ void hmcs40_cpu_device::op_smc()
{
// SMC: Subtract A from Memory with Carry
m_a = ram_r() - m_a - (m_c ^ 1);
- m_c = ~m_a >> 4 & 1;
+ m_c = BIT(~m_a, 4);
m_s = m_c;
m_a &= 0xf;
}
@@ -293,7 +292,7 @@ void hmcs40_cpu_device::op_am()
{
// AM: Add A to Memory
m_a += ram_r();
- m_s = m_a >> 4 & 1;
+ m_s = BIT(m_a, 4);
m_a &= 0xf;
}
@@ -351,7 +350,7 @@ void hmcs40_cpu_device::op_rotl()
{
// ROTL: Rotate Left A with Carry
m_a = m_a << 1 | m_c;
- m_c = m_a >> 4 & 1;
+ m_c = BIT(m_a, 4);
m_a &= 0xf;
}
@@ -365,17 +364,17 @@ void hmcs40_cpu_device::op_rotr()
void hmcs40_cpu_device::op_or()
{
- // OR: OR A with B
+ // OR: Or A with B
m_a |= m_b;
}
-// Compare Instruction
+// compare instructions
void hmcs40_cpu_device::op_mnei()
{
// MNEI i: Memory Not Equal to Immediate
- m_s = (ram_r() != m_i);
+ m_s = (m_i != ram_r());
}
void hmcs40_cpu_device::op_ynei()
@@ -415,7 +414,7 @@ void hmcs40_cpu_device::op_blem()
}
-// RAM Bit Manipulation Instruction
+// RAM bit manipulation instructions
void hmcs40_cpu_device::op_sem()
{
@@ -432,11 +431,11 @@ void hmcs40_cpu_device::op_rem()
void hmcs40_cpu_device::op_tm()
{
// TM n: Test Memory Bit
- m_s = ram_r() >> (m_op & 3) & 1;
+ m_s = BIT(ram_r(), m_op & 3);
}
-// ROM Address Instruction
+// ROM address instructions
void hmcs40_cpu_device::op_br()
{
@@ -466,7 +465,11 @@ void hmcs40_cpu_device::op_lpu()
if (m_s)
{
m_block_int = true;
- m_page = m_op & 0x1f;
+ m_pc_upper = m_op & 0x1f;
+
+ // on HMCS46/47, also latches bank from R70
+ if (m_family == HMCS46_FAMILY || m_family == HMCS47_FAMILY)
+ m_pc_upper |= ~m_r[7] << 5 & 0x20;
}
else
m_op |= 0x400; // indicate unhandled LPU
@@ -486,7 +489,7 @@ void hmcs40_cpu_device::op_rtn()
}
-// Interrupt Instruction
+// interrupt instructions
void hmcs40_cpu_device::op_seie()
{
@@ -606,7 +609,7 @@ void hmcs40_cpu_device::op_rtni()
}
-// Input/Output Instruction
+// input/output instructions
void hmcs40_cpu_device::op_sed()
{
@@ -664,24 +667,24 @@ void hmcs40_cpu_device::op_lrb()
void hmcs40_cpu_device::op_p()
{
+ // P p: Pattern Generation
cycle();
- // P p: Pattern Generation
u16 address = m_a | m_b << 4 | m_c << 8 | (m_op & 7) << 9 | (m_pc & ~0x3f);
- u16 o = m_program->read_word(address & m_prgmask);
+ u16 data = m_program->read_word(address & m_prgmask);
// destination is determined by the 2 highest bits
- if (o & 0x100)
+ if (data & 0x100)
{
// B3 B2 B1 B0 A0 A1 A2 A3
- m_a = bitswap<4>(o,0,1,2,3);
- m_b = o >> 4 & 0xf;
+ m_a = bitswap<4>(data,0,1,2,3);
+ m_b = data >> 4 & 0xf;
}
- if (o & 0x200)
+ if (data & 0x200)
{
// R20 R21 R22 R23 R30 R31 R32 R33
- o = bitswap<8>(o,0,1,2,3,4,5,6,7);
- write_r(2, o & 0xf);
- write_r(3, o >> 4 & 0xf);
+ data = bitswap<8>(data,0,1,2,3,4,5,6,7);
+ write_r(2, data & 0xf);
+ write_r(3, data >> 4 & 0xf);
}
}
diff --git a/src/devices/cpu/hmcs400/hmcs400.cpp b/src/devices/cpu/hmcs400/hmcs400.cpp
new file mode 100644
index 00000000000..3d41bd1f00e
--- /dev/null
+++ b/src/devices/cpu/hmcs400/hmcs400.cpp
@@ -0,0 +1,1024 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/*
+
+Hitachi HMCS400 MCU family cores
+
+It's the successor to HMCS40, it was mainly used in consumer electronics, not
+much in games.
+
+Compared to HMCS40, it accepts a higher clock speed, and it has more versatile
+peripherals, like a serial interface. The opcodes were mostly kept the same.
+They added an extra RAM addressing mode, and interrupt-related opcodes were
+removed (interrupt flags are via memory-mapped I/O).
+
+TODO:
+- add serial interface
+- do the LAW/LWA opcodes not work on early revisions of HMCS400? the 1988 user
+ manual warns that the W register is write-only, and that there is no efficient
+ way to save this register when using interrupts
+- what happens when accessing ROM/RAM out of address range? Hitachi documentation
+ says 'unused', but maybe it's mirrored?
+
+*/
+
+#include "emu.h"
+#include "hmcs400.h"
+#include "hmcs400d.h"
+
+
+//-------------------------------------------------
+// device types
+//-------------------------------------------------
+
+// C = standard
+// CL = low-power
+// AC = high-speed
+
+// HMCS408, HMCS41x, HMCS42x have a mask option for the system clock divider
+// HMCS41x don't have timer A or serial interface, HMCS41x and HMCS42x have less I/O pins
+// rev 2 apparently added LAW/LWA opcodes?
+
+// HMCS402C/CL/AC, DP-64S or FP-64, 2Kx10 ROM, 160x4 RAM
+DEFINE_DEVICE_TYPE(HD614022, hd614022_device, "hd614022", "Hitachi HD614022") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614023, hd614023_device, "hd614023", "Hitachi HD614023") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614025, hd614025_device, "hd614025", "Hitachi HD614025") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614026, hd614026_device, "hd614026", "Hitachi HD614026") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614028, hd614028_device, "hd614028", "Hitachi HD614028") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614029, hd614029_device, "hd614029", "Hitachi HD614029") // AC, rev 1
+
+// HMCS404C/CL/AC, DP-64S or FP-64, 4Kx10 ROM, 256x4 RAM
+DEFINE_DEVICE_TYPE(HD614042, hd614042_device, "hd614042", "Hitachi HD614042") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614043, hd614043_device, "hd614043", "Hitachi HD614043") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614045, hd614045_device, "hd614045", "Hitachi HD614045") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614046, hd614046_device, "hd614046", "Hitachi HD614046") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614048, hd614048_device, "hd614048", "Hitachi HD614048") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614049, hd614049_device, "hd614049", "Hitachi HD614049") // AC, rev 1
+
+// HMCS408C/CL/AC, DP-64S or FP-64, 8Kx10 ROM, 512x4 RAM
+DEFINE_DEVICE_TYPE(HD614080, hd614080_device, "hd614080", "Hitachi HD614080") // C, rev 2
+DEFINE_DEVICE_TYPE(HD614081, hd614081_device, "hd614081", "Hitachi HD614081") // C, rev 1
+DEFINE_DEVICE_TYPE(HD614085, hd614085_device, "hd614085", "Hitachi HD614085") // CL, rev 2
+DEFINE_DEVICE_TYPE(HD614086, hd614086_device, "hd614086", "Hitachi HD614086") // CL, rev 1
+DEFINE_DEVICE_TYPE(HD614088, hd614088_device, "hd614088", "Hitachi HD614088") // AC, rev 2
+DEFINE_DEVICE_TYPE(HD614089, hd614089_device, "hd614089", "Hitachi HD614089") // AC, rev 1
+
+// HMCS412C/CL/AC, DP-42/DP-42S or FP-44A, 2Kx10 ROM, 160x4 RAM
+DEFINE_DEVICE_TYPE(HD614120, hd614120_device, "hd614120", "Hitachi HD614120") // C
+DEFINE_DEVICE_TYPE(HD614125, hd614125_device, "hd614125", "Hitachi HD614125") // CL
+DEFINE_DEVICE_TYPE(HD614128, hd614128_device, "hd614128", "Hitachi HD614128") // AC
+
+// HMCS414C/CL/AC, DP-42/DP-42S or FP-44A, 4Kx10 ROM, 160x4 RAM
+DEFINE_DEVICE_TYPE(HD614140, hd614140_device, "hd614140", "Hitachi HD614140") // C
+DEFINE_DEVICE_TYPE(HD614145, hd614145_device, "hd614145", "Hitachi HD614145") // CL
+DEFINE_DEVICE_TYPE(HD614148, hd614148_device, "hd614148", "Hitachi HD614148") // AC
+
+// HMCS424C/CL/AC, DP-42/DP-42S or FP-44A, 4Kx10 ROM, 256x4 RAM
+DEFINE_DEVICE_TYPE(HD404240, hd404240_device, "hd404240", "Hitachi HD404240") // C
+DEFINE_DEVICE_TYPE(HD40L4240, hd40l4240_device, "hd40l4240", "Hitachi HD40L4240") // CL
+DEFINE_DEVICE_TYPE(HD40A4240, hd40a4240_device, "hd40a4240", "Hitachi HD40A4240") // AC
+
+
+//-------------------------------------------------
+// constructor
+//-------------------------------------------------
+
+hmcs400_cpu_device::hmcs400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ cpu_device(mconfig, type, tag, owner, clock),
+ device_nvram_interface(mconfig, *this),
+ m_program_config("program", ENDIANNESS_LITTLE, 16, 14, -1, address_map_constructor(FUNC(hmcs400_cpu_device::program_map), this)),
+ m_data_config("data", ENDIANNESS_LITTLE, 8, 10, 0, address_map_constructor(FUNC(hmcs400_cpu_device::data_map), this)),
+ m_ram(*this, "ram%u", 0U),
+ m_nvram_defval(0),
+ m_nvram_battery(true),
+ m_rom_size(rom_size),
+ m_ram_size(ram_size),
+ m_has_div(false),
+ m_divider(8),
+ m_read_r(*this, 0),
+ m_write_r(*this),
+ m_read_d(*this, 0),
+ m_write_d(*this),
+ m_stop_cb(*this)
+{
+ // disable nvram by default (set to true if MCU is battery-backed when in stop mode)
+ nvram_enable_backup(false);
+}
+
+hmcs400_cpu_device::~hmcs400_cpu_device() { }
+
+
+hmcs402_cpu_device::hmcs402_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs400_cpu_device(mconfig, type, tag, owner, clock, 0x800, 96)
+{ }
+
+hd614022_device::hd614022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614022, tag, owner, clock)
+{ }
+hd614023_device::hd614023_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614023, tag, owner, clock)
+{ }
+hd614025_device::hd614025_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614025, tag, owner, clock)
+{ }
+hd614026_device::hd614026_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614026, tag, owner, clock)
+{ }
+hd614028_device::hd614028_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614028, tag, owner, clock)
+{ }
+hd614029_device::hd614029_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs402_cpu_device(mconfig, HD614029, tag, owner, clock)
+{ }
+
+
+hmcs404_cpu_device::hmcs404_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs400_cpu_device(mconfig, type, tag, owner, clock, 0x1000, 192)
+{ }
+
+hd614042_device::hd614042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614042, tag, owner, clock)
+{ }
+hd614043_device::hd614043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614043, tag, owner, clock)
+{ }
+hd614045_device::hd614045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614045, tag, owner, clock)
+{ }
+hd614046_device::hd614046_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614046, tag, owner, clock)
+{ }
+hd614048_device::hd614048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614048, tag, owner, clock)
+{ }
+hd614049_device::hd614049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs404_cpu_device(mconfig, HD614049, tag, owner, clock)
+{ }
+
+
+hmcs408_cpu_device::hmcs408_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs400_cpu_device(mconfig, type, tag, owner, clock, 0x2000, 448)
+{
+ m_has_div = true;
+}
+
+hd614080_device::hd614080_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614080, tag, owner, clock)
+{ }
+hd614081_device::hd614081_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614081, tag, owner, clock)
+{ }
+hd614085_device::hd614085_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614085, tag, owner, clock)
+{ }
+hd614086_device::hd614086_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614086, tag, owner, clock)
+{ }
+hd614088_device::hd614088_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614088, tag, owner, clock)
+{ }
+hd614089_device::hd614089_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs408_cpu_device(mconfig, HD614089, tag, owner, clock)
+{ }
+
+
+hmcs41x_cpu_device::hmcs41x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size) :
+ hmcs400_cpu_device(mconfig, type, tag, owner, clock, rom_size, ram_size)
+{
+ m_has_div = true;
+}
+
+hmcs412_cpu_device::hmcs412_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs41x_cpu_device(mconfig, type, tag, owner, clock, 0x800, 96)
+{ }
+
+hd614120_device::hd614120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs412_cpu_device(mconfig, HD614120, tag, owner, clock)
+{ }
+hd614125_device::hd614125_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs412_cpu_device(mconfig, HD614125, tag, owner, clock)
+{ }
+hd614128_device::hd614128_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs412_cpu_device(mconfig, HD614128, tag, owner, clock)
+{ }
+
+
+hmcs414_cpu_device::hmcs414_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs41x_cpu_device(mconfig, type, tag, owner, clock, 0x1000, 96)
+{ }
+
+hd614140_device::hd614140_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs414_cpu_device(mconfig, HD614140, tag, owner, clock)
+{ }
+hd614145_device::hd614145_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs414_cpu_device(mconfig, HD614145, tag, owner, clock)
+{ }
+hd614148_device::hd614148_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs414_cpu_device(mconfig, HD614148, tag, owner, clock)
+{ }
+
+
+hmcs424_cpu_device::hmcs424_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ hmcs41x_cpu_device(mconfig, type, tag, owner, clock, 0x1000, 192)
+{ }
+
+hd404240_device::hd404240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs424_cpu_device(mconfig, HD404240, tag, owner, clock)
+{ }
+hd40l4240_device::hd40l4240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs424_cpu_device(mconfig, HD40L4240, tag, owner, clock)
+{ }
+hd40a4240_device::hd40a4240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ hmcs424_cpu_device(mconfig, HD40A4240, tag, owner, clock)
+{ }
+
+
+//-------------------------------------------------
+// initialization
+//-------------------------------------------------
+
+void hmcs400_cpu_device::device_start()
+{
+ m_program = &space(AS_PROGRAM);
+ m_data = &space(AS_DATA);
+
+ // zerofill
+ m_pc = 0;
+ m_prev_pc = 0;
+ m_sp = 0;
+ m_op = 0;
+ m_param = 0;
+ m_i = 0;
+
+ m_a = 0;
+ m_b = 0;
+ m_w = 0;
+ m_x = 0;
+ m_spx = 0;
+ m_y = 0;
+ m_spy = 0;
+ m_st = 0;
+ m_ca = 0;
+ m_standby = false;
+ m_stop = false;
+
+ memset(m_r, 0, sizeof(m_r));
+ memset(m_r_mask, 0, sizeof(m_r_mask));
+ m_r_dir = 0;
+ m_d = 0;
+ m_d_mask = 0;
+
+ m_int_line[0] = m_int_line[1] = 1;
+ m_irq_flags = 0;
+ m_irq_mask = 0x33ff;
+ m_pmr = 0;
+ m_prescaler = 0;
+ m_timer_mode[0] = m_timer_mode[1] = 0;
+ m_timer_div[0] = m_timer_div[1] = 0;
+ m_timer_count[0] = m_timer_count[1] = 0;
+ m_timer_load = 0;
+ m_timer_b_low = 0;
+
+ // register for savestates
+ save_item(NAME(m_nvram_battery));
+ save_item(NAME(m_pc));
+ save_item(NAME(m_prev_pc));
+ save_item(NAME(m_sp));
+ save_item(NAME(m_op));
+
+ save_item(NAME(m_a));
+ save_item(NAME(m_b));
+ save_item(NAME(m_w));
+ save_item(NAME(m_x));
+ save_item(NAME(m_spx));
+ save_item(NAME(m_y));
+ save_item(NAME(m_spy));
+ save_item(NAME(m_st));
+ save_item(NAME(m_ca));
+ save_item(NAME(m_standby));
+ save_item(NAME(m_stop));
+
+ save_item(NAME(m_r));
+ save_item(NAME(m_r_mask));
+ save_item(NAME(m_r_dir));
+ save_item(NAME(m_d));
+ save_item(NAME(m_d_mask));
+
+ save_item(NAME(m_int_line));
+ save_item(NAME(m_irq_flags));
+ save_item(NAME(m_pmr));
+ save_item(NAME(m_prescaler));
+ save_item(NAME(m_timer_mode));
+ save_item(NAME(m_timer_div));
+ save_item(NAME(m_timer_count));
+ save_item(NAME(m_timer_load));
+ save_item(NAME(m_timer_b_low));
+
+ // register state for debugger
+ state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%04X").noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_pc).formatstr("%04X").noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_st).formatstr("%2s").noshow();
+
+ m_state_count = 0;
+ state_add(++m_state_count, "PC", m_pc).formatstr("%04X"); // 1
+ state_add(++m_state_count, "SP", m_sp).formatstr("%03X"); // 2
+ state_add(++m_state_count, "A", m_a).formatstr("%01X"); // 3
+ state_add(++m_state_count, "B", m_b).formatstr("%01X"); // 4
+ state_add(++m_state_count, "W", m_w).formatstr("%01X"); // 5
+ state_add(++m_state_count, "X", m_x).formatstr("%01X"); // 6
+ state_add(++m_state_count, "SPX", m_spx).formatstr("%01X"); // 7
+ state_add(++m_state_count, "Y", m_y).formatstr("%01X"); // 8
+ state_add(++m_state_count, "SPY", m_spy).formatstr("%01X"); // 9
+
+ state_add(++m_state_count, "ST", m_st).formatstr("%01X").noshow(); // 10
+ state_add(++m_state_count, "CA", m_ca).formatstr("%01X").noshow(); // 11
+
+ set_icountptr(m_icount);
+}
+
+void hmcs41x_cpu_device::device_start()
+{
+ hmcs400_cpu_device::device_start();
+
+ // no timer A or serial interface
+ m_irq_mask = 0x033f;
+ m_data->unmap_readwrite(0x005, 0x008);
+}
+
+void hmcs400_cpu_device::device_reset()
+{
+ m_pc = 0;
+ m_sp = 0x3ff;
+ m_st = 1;
+ m_standby = false;
+ m_stop = false;
+ m_stop_cb(0);
+
+ // clear peripherals
+ m_irq_flags = 0xaaa8; // IM=1, IF=0, IE=0
+ m_pmr = 0;
+
+ m_prescaler = 0;
+ tm_w(0, 0, 0xf);
+ tm_w(1, 0, 0xf);
+ m_timer_count[0] = m_timer_count[1] = 0;
+ m_timer_load = 0;
+ m_timer_b_low = 0;
+
+ // all I/O ports set to input
+ reset_io();
+}
+
+
+//-------------------------------------------------
+// disasm
+//-------------------------------------------------
+
+void hmcs400_cpu_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = string_format("%c%c",
+ m_ca ? 'C':'c',
+ m_st ? 'S':'s'
+ );
+ break;
+
+ default: break;
+ }
+}
+
+std::unique_ptr<util::disasm_interface> hmcs400_cpu_device::create_disassembler()
+{
+ return std::make_unique<hmcs400_disassembler>();
+}
+
+
+//-------------------------------------------------
+// internal memory maps
+//-------------------------------------------------
+
+void hmcs400_cpu_device::program_map(address_map &map)
+{
+ map.unmap_value_high();
+ map(0, m_rom_size - 1).rom();
+}
+
+void hmcs400_cpu_device::data_map(address_map &map)
+{
+ map.unmap_value_high();
+ map(0x000, 0x003).rw(FUNC(hmcs400_cpu_device::irq_control_r), FUNC(hmcs400_cpu_device::irq_control_w));
+ map(0x004, 0x004).w(FUNC(hmcs400_cpu_device::pmr_w));
+ map(0x008, 0x009).w(FUNC(hmcs400_cpu_device::tm_w));
+ map(0x00a, 0x00a).rw(FUNC(hmcs400_cpu_device::tcbl_r), FUNC(hmcs400_cpu_device::tlrl_w));
+ map(0x00b, 0x00b).rw(FUNC(hmcs400_cpu_device::tcbu_r), FUNC(hmcs400_cpu_device::tlru_w));
+
+ map(0x020, 0x020 + m_ram_size - 1).ram().share(m_ram[0]);
+ map(0x3c0, 0x3ff).ram().share(m_ram[1]); // stack
+}
+
+device_memory_interface::space_config_vector hmcs400_cpu_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config)
+ };
+}
+
+
+//-------------------------------------------------
+// nvram
+//-------------------------------------------------
+
+bool hmcs400_cpu_device::nvram_write(util::write_stream &file)
+{
+ // if it's currently not battery-backed, don't save at all
+ if (!m_nvram_battery)
+ return true;
+
+ std::error_condition err;
+ size_t actual;
+
+ // main RAM and stack area
+ for (auto & ram : m_ram)
+ {
+ std::tie(err, actual) = write(file, &ram[0], ram.bytes());
+ if (err)
+ return false;
+ }
+
+ return true;
+}
+
+bool hmcs400_cpu_device::nvram_read(util::read_stream &file)
+{
+ std::error_condition err;
+ size_t actual;
+
+ // main RAM and stack area
+ for (auto & ram : m_ram)
+ {
+ std::tie(err, actual) = read(file, &ram[0], ram.bytes());
+ if (err || (ram.bytes() != actual))
+ return false;
+ }
+
+ return true;
+}
+
+void hmcs400_cpu_device::nvram_default()
+{
+ if (!nvram_backup_enabled())
+ return;
+
+ // default nvram from mytag:nvram region if it exists
+ memory_region *region = memregion("nvram");
+ if (region != nullptr)
+ {
+ const u32 total = m_ram[0].bytes() + m_ram[1].bytes();
+ if (region->bytes() != total)
+ fatalerror("%s: Wrong region size (expected 0x%x, found 0x%x)", region->name(), total, region->bytes());
+
+ u32 offset = 0;
+ for (auto & ram : m_ram)
+ {
+ std::copy_n(&region->as_u8(offset), ram.bytes(), &ram[0]);
+ offset += ram.bytes();
+ }
+ }
+ else
+ {
+ for (auto & ram : m_ram)
+ std::fill_n(&ram[0], ram.bytes(), m_nvram_defval);
+ }
+}
+
+
+//-------------------------------------------------
+// i/o ports
+//-------------------------------------------------
+
+void hmcs400_cpu_device::reset_io()
+{
+ // D4-D15 are high-voltage
+ m_d_mask = m_d = 0x000f;
+ m_write_d(m_d_mask);
+
+ // R0 and R6-R8 are write-only, R9 and RA are read-only
+ m_r_dir = 0x16affe;
+
+ for (int i = 0; i < 11; i++)
+ {
+ // R0-R2 and RA are high-voltage
+ u8 mask = (i >= 3 && i <= 9) ? 0xf : 0;
+
+ m_r_mask[i] = m_r[i] = mask;
+ m_write_r[i](i, mask, 0xf);
+ }
+}
+
+void hmcs41x_cpu_device::reset_io()
+{
+ // does not have R5-R9
+ hmcs400_cpu_device::reset_io();
+ m_r_dir &= ~0xffc00;
+}
+
+u8 hmcs400_cpu_device::read_r(u8 index)
+{
+ // reads from write-only or non-existent ports are invalid
+ const u8 dir = m_r_dir >> (index * 2) & 3;
+ if (~dir & 1)
+ {
+ logerror("read from %s port R%X @ $%04X\n", (dir & 2) ? "output" : "unknown", index, m_prev_pc);
+ return 0xf;
+ }
+
+ u8 mask = (index == 10) ? 3 : 0xf; // port A is 2-bit
+ u8 inp = m_read_r[index](index, mask);
+
+ if (m_read_r[index].isunset())
+ {
+ inp = m_r_mask[index];
+ logerror("read from unmapped port R%X @ $%04X\n", index, m_prev_pc);
+ }
+
+ u8 out = m_r[index];
+
+ // R32/R33 are multiplexed with ext interrupts
+ if (index == 3)
+ {
+ u8 pmr_mask = m_pmr & 0xc;
+ u8 ext_int = m_int_line[1] << 3 | m_int_line[0] << 2;
+ inp = (inp & ~pmr_mask) | (ext_int & pmr_mask);
+ out = (out & ~pmr_mask) | (m_r_mask[index] & pmr_mask);
+ }
+
+ if (m_r_mask[index])
+ return (inp & out) & mask;
+ else
+ return (inp | out) & mask;
+}
+
+void hmcs400_cpu_device::write_r(u8 index, u8 data)
+{
+ data &= 0xf;
+
+ // ignore writes to read-only or non-existent ports
+ if (~m_r_dir >> (index * 2) & 2)
+ return;
+
+ if (m_write_r[index].isunset())
+ logerror("write $%X to unmapped port R%d @ $%04X\n", data, index, m_prev_pc);
+
+ m_r[index] = data;
+ u8 out = data;
+
+ // R32/R33 are multiplexed with ext interrupts
+ if (index == 3)
+ {
+ u8 pmr_mask = m_pmr & 0xc;
+ out = (out & ~pmr_mask) | (m_r_mask[index] & pmr_mask);
+ }
+
+ m_write_r[index](index, out, 0xf);
+}
+
+int hmcs400_cpu_device::read_d(u8 index)
+{
+ index &= 0xf;
+ u16 mask = 1 << index;
+ u16 inp = m_read_d(0, mask);
+
+ if (m_read_d.isunset())
+ {
+ inp = m_d_mask;
+ logerror("read from unmapped port D%d @ $%04X\n", index, m_prev_pc);
+ }
+
+ if (m_d_mask & mask)
+ return BIT(inp & m_d, index);
+ else
+ return BIT(inp | m_d, index);
+}
+
+void hmcs400_cpu_device::write_d(u8 index, int state)
+{
+ index &= 0xf;
+ u16 mask = 1 << index;
+
+ if (m_write_d.isunset())
+ logerror("write %d to unmapped port D%d @ $%04X\n", state, index, m_prev_pc);
+
+ m_d = (m_d & ~mask) | (state ? mask : 0);
+ m_write_d(0, m_d, mask);
+}
+
+
+//-------------------------------------------------
+// interrupts
+//-------------------------------------------------
+
+bool hmcs400_cpu_device::access_mode(u8 mem_mask, bool bit_mode)
+{
+ mem_mask &= 0xf;
+ bool err = true;
+
+ if (bit_mode)
+ {
+ if (population_count_32(mem_mask) == 1)
+ return true;
+ err = mem_mask == 0xf;
+ }
+ else
+ {
+ if (mem_mask == 0xf)
+ return true;
+ }
+
+ if (err || mem_mask == 0)
+ logerror("invalid access to I/O register @ $%04X\n", m_prev_pc);
+
+ return false;
+}
+
+u8 hmcs400_cpu_device::irq_control_r(offs_t offset, u8 mem_mask)
+{
+ // mask out unused bits (RSP is write-only)
+ const u16 unused = ~m_irq_mask | 2;
+ u16 data = m_irq_flags | unused;
+
+ if (!machine().side_effects_disabled())
+ {
+ // can only read one bit at a time
+ if (!access_mode(mem_mask, true))
+ return 0xf;
+
+ if (mem_mask << (offset * 4) & unused)
+ logerror("read from unused IRQ control bit @ $%04X\n", m_prev_pc);
+ }
+
+ return data >> (offset * 4) & 0xf;
+}
+
+void hmcs400_cpu_device::irq_control_w(offs_t offset, u8 data, u8 mem_mask)
+{
+ // can only write one bit at a time
+ if (!access_mode(mem_mask, true))
+ return;
+
+ data &= mem_mask;
+ u16 mask = mem_mask << (offset * 4);
+
+ // ignore writes to unused bits
+ if (mask & ~m_irq_mask)
+ return;
+
+ // ignore writing 1 to flags that can only be cleared
+ if (mask & 0x5556 && data)
+ return;
+
+ // bit 1: RSP (reset SP)
+ if (mask & 0x0002)
+ m_sp = 0x3ff;
+
+ m_irq_flags = (m_irq_flags & ~mask) | (data ? mask : 0);
+}
+
+void hmcs400_cpu_device::pmr_w(offs_t offset, u8 data, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return;
+
+ u8 prev = m_pmr;
+ m_pmr = data;
+
+ // trigger irq on rising edge if ext int line was low
+ for (int i = 0; i < 2; i++)
+ if (BIT(data & ~prev, i + 2))
+ ext_int_edge(i);
+
+ // refresh R32/R33
+ if ((data ^ prev) & 0xc)
+ write_r(3, m_r[3]);
+}
+
+void hmcs400_cpu_device::take_interrupt(int irq)
+{
+ cycle();
+ cycle();
+ push_stack();
+ m_irq_flags &= ~1;
+
+ standard_irq_callback(irq, m_pc);
+
+ u8 vector = irq * 2 + 2;
+ m_prev_pc = m_pc = vector;
+}
+
+void hmcs400_cpu_device::check_interrupts()
+{
+ // irq priority is in the same order as the irq control flags
+ u16 irq = (m_irq_flags & m_irq_mask) >> 2;
+
+ for (int i = 0; i < 7; i++)
+ {
+ // pending irq when IF=1 and IM=0
+ if ((irq & 3) == 1)
+ {
+ if (m_irq_flags & 1)
+ take_interrupt(i);
+
+ m_standby = false;
+ return;
+ }
+
+ irq >>= 2;
+ }
+}
+
+void hmcs400_cpu_device::ext_int_edge(int line)
+{
+ // ext interrupts are masked with PMR2/3
+ if (!m_int_line[line] && BIT(m_pmr, line + 2))
+ {
+ m_irq_flags |= 1 << (line * 2 + 2);
+
+ // timer B event counter on INT1
+ if (line == 1 && !m_timer_div[1])
+ clock_timer(1);
+ }
+}
+
+void hmcs400_cpu_device::execute_set_input(int line, int state)
+{
+ state = state ? 1 : 0;
+
+ if (line != 0 && line != 1)
+ return;
+
+ // active-low, irq on falling edge
+ state ^= 1;
+ bool irq = (m_int_line[line] && !state);
+ m_int_line[line] = state;
+
+ if (irq && !m_stop)
+ ext_int_edge(line);
+}
+
+
+//-------------------------------------------------
+// timers
+//-------------------------------------------------
+
+void hmcs400_cpu_device::tm_w(offs_t offset, u8 data, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return;
+
+ // TMA/TMB prescaler divide ratio masks
+ static const u16 div[2][8] =
+ {
+ { 0x400, 0x200, 0x100, 0x40, 0x10, 4, 2, 1 },
+ { 0x400, 0x100, 0x40, 0x10, 4, 2, 1, 0 }
+ };
+
+ m_timer_mode[offset] = data & 0xf;
+ m_timer_div[offset] = div[offset][data & 7];
+}
+
+void hmcs400_cpu_device::tlrl_w(offs_t offset, u8 data, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return;
+
+ // TLRL: timer load register lower
+ m_timer_load = (m_timer_load & 0xf0) | (data & 0xf);
+}
+
+void hmcs400_cpu_device::tlru_w(offs_t offset, u8 data, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return;
+
+ // TLRU: timer load register upper
+ m_timer_load = (m_timer_load & 0x0f) | data << 4;
+ m_timer_count[1] = m_timer_load;
+}
+
+u8 hmcs400_cpu_device::tcbl_r(offs_t offset, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return 0xf;
+
+ // TCBL: timer counter B lower
+ return m_timer_b_low;
+}
+
+u8 hmcs400_cpu_device::tcbu_r(offs_t offset, u8 mem_mask)
+{
+ if (!access_mode(mem_mask))
+ return 0xf;
+
+ // TCBU: timer counter B upper (latches TCBL)
+ if (!machine().side_effects_disabled())
+ m_timer_b_low = m_timer_count[1] & 0xf;
+
+ return m_timer_count[1] >> 4;
+}
+
+void hmcs400_cpu_device::clock_timer(int timer)
+{
+ if (++m_timer_count[timer] == 0)
+ {
+ // set timer overflow irq flag
+ m_irq_flags |= 1 << (timer * 2 + 6);
+
+ // timer B reload function
+ if (timer == 1 && m_timer_mode[1] & 8)
+ m_timer_count[1] = m_timer_load;
+ }
+}
+
+void hmcs400_cpu_device::clock_prescaler()
+{
+ u16 prev = m_prescaler;
+ m_prescaler = (m_prescaler + 1) & 0x7ff;
+
+ // increment timers based on prescaler divide ratio
+ for (int i = 0; i < 2; i++)
+ if (m_prescaler & ~prev & m_timer_div[i])
+ clock_timer(i);
+}
+
+
+//-------------------------------------------------
+// execute
+//-------------------------------------------------
+
+void hmcs400_cpu_device::cycle()
+{
+ m_icount--;
+ clock_prescaler();
+}
+
+u16 hmcs400_cpu_device::fetch()
+{
+ u16 data = m_program->read_word(m_pc);
+ m_pc = (m_pc + 1) & 0x3fff;
+ cycle();
+
+ return data & 0x3ff;
+}
+
+void hmcs400_cpu_device::execute_run()
+{
+ // in stop mode, the internal clock is not running
+ if (m_stop)
+ {
+ debugger_wait_hook();
+ m_icount = 0;
+ return;
+ }
+
+ while (m_icount > 0)
+ {
+ m_prev_pc = m_pc;
+ check_interrupts();
+
+ // in standby mode, opcode execution is halted
+ if (m_standby)
+ {
+ cycle();
+ continue;
+ }
+
+ // fetch next opcode
+ debugger_instruction_hook(m_pc);
+ m_op = fetch();
+ m_i = m_op & 0xf;
+
+ // 2-byte opcodes / RAM address
+ if ((m_op >= 0x100 && m_op < 0x140) || (m_op >= 0x150 && m_op < 0x1b0))
+ m_param = fetch();
+ else
+ m_param = (m_w << 8 | m_x << 4 | m_y) & 0x3ff;
+
+ // handle opcode
+ switch (m_op & 0x3f0)
+ {
+ case 0x1c0: case 0x1d0: case 0x1e0: case 0x1f0: op_cal(); break;
+
+ case 0x020: case 0x120: op_inem(); break;
+ case 0x030: case 0x130: op_ilem(); break;
+ case 0x070: op_ynei(); break;
+ case 0x0b0: op_tbr(); break;
+ case 0x150: op_jmpl(); break;
+ case 0x160: op_call(); break;
+ case 0x170: op_brl(); break;
+ case 0x1a0: op_lmi(); break;
+ case 0x1b0: op_p(); break;
+
+ case 0x200: op_lbi(); break;
+ case 0x210: op_lyi(); break;
+ case 0x220: op_lxi(); break;
+ case 0x230: op_lai(); break;
+ case 0x240: op_lbr(); break;
+ case 0x250: op_lar(); break;
+ case 0x260: op_redd(); break;
+ case 0x270: op_lamr(); break;
+ case 0x280: op_ai(); break;
+ case 0x290: op_lmiiy(); break;
+ case 0x2a0: op_tdd(); break;
+ case 0x2b0: op_alei(); break;
+ case 0x2c0: op_lrb(); break;
+ case 0x2d0: op_lra(); break;
+ case 0x2e0: op_sedd(); break;
+ case 0x2f0: op_xmra(); break;
+
+ default:
+ if ((m_op & 0x300) == 0x300)
+ {
+ op_br(); break;
+ }
+
+ switch (m_op & 0x3fc)
+ {
+ case 0x084: case 0x184: op_sem(); break;
+ case 0x088: case 0x188: op_rem(); break;
+ case 0x08c: case 0x18c: op_tm(); break;
+
+ case 0x000: op_xsp(); break;
+ case 0x040: op_lbm(); break;
+ case 0x080: op_xma(); break;
+ case 0x090: op_lam(); break;
+ case 0x094: op_lma(); break;
+ case 0x0c0: op_xmb(); break;
+ case 0x0f0: op_lwi(); break;
+
+ default:
+ switch (m_op)
+ {
+ case 0x004: case 0x104: op_anem(); break;
+ case 0x008: case 0x108: op_am(); break;
+ case 0x00c: case 0x10c: op_orm(); break;
+ case 0x014: case 0x114: op_alem(); break;
+ case 0x018: case 0x118: op_amc(); break;
+ case 0x01c: case 0x11c: op_eorm(); break;
+ case 0x098: case 0x198: op_smc(); break;
+ case 0x09c: case 0x19c: op_anm(); break;
+
+ case 0x010: op_rtn(); break;
+ case 0x011: op_rtni(); break;
+ case 0x044: op_bnem(); break;
+ case 0x048: op_lab(); break;
+ case 0x04c: op_ib(); break;
+ case 0x050: case 0x051: op_lmaiy(); break;
+ case 0x054: op_ayy(); break;
+ case 0x058: op_laspy(); break;
+ case 0x05c: op_iy(); break;
+ case 0x060: op_nega(); break;
+ case 0x064: op_red(); break;
+ case 0x068: op_laspx(); break;
+ case 0x06f: op_tc(); break;
+
+ case 0x0a0: op_rotr(); break;
+ case 0x0a1: op_rotl(); break;
+ case 0x0a6: op_daa(); break;
+ case 0x0aa: op_das(); break;
+ case 0x0af: op_lay(); break;
+ case 0x0c4: op_blem(); break;
+ case 0x0c8: op_lba(); break;
+ case 0x0cf: op_db(); break;
+ case 0x0d0: case 0x0d1: op_lmady(); break;
+ case 0x0d4: op_syy(); break;
+ case 0x0d8: op_lya(); break;
+ case 0x0df: op_dy(); break;
+ case 0x0e0: op_td(); break;
+ case 0x0e4: op_sed(); break;
+ case 0x0e8: op_lxa(); break;
+ case 0x0ec: op_rec(); break;
+ case 0x0ef: op_sec(); break;
+
+ case 0x100: op_law(); break;
+ case 0x110: op_lwa(); break;
+ case 0x140: op_comb(); break;
+ case 0x144: op_or(); break;
+ case 0x148: op_sts(); break;
+ case 0x14c: op_sby(); break;
+ case 0x14d: op_stop(); break;
+ case 0x180: op_xma(); break;
+ case 0x190: op_lam(); break;
+ case 0x194: op_lma(); break;
+
+ default: op_illegal(); break;
+ }
+ break; // 0x3ff
+
+ }
+ break; // 0x3fc
+
+ } // 0x3f0
+ }
+}
diff --git a/src/devices/cpu/hmcs400/hmcs400.h b/src/devices/cpu/hmcs400/hmcs400.h
new file mode 100644
index 00000000000..4f97c082539
--- /dev/null
+++ b/src/devices/cpu/hmcs400/hmcs400.h
@@ -0,0 +1,557 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/*
+
+ Hitachi HMCS400 MCU family cores
+
+*/
+
+#ifndef MAME_CPU_HMCS400_HMCS400_H
+#define MAME_CPU_HMCS400_HMCS400_H
+
+#pragma once
+
+
+// input lines
+
+enum
+{
+ HMCS400_INPUT_LINE_INT0 = 0,
+ HMCS400_INPUT_LINE_INT1
+};
+
+
+// pinout reference (see datasheets for other pinouts)
+
+/*
+ _________________ _________________
+ D11 1 |* | 64 D10 D12 1 |* | 64 D11
+ D12 2 | | 63 D9 D13 2 | | 63 D10
+ D13 3 | | 62 D8 D14 3 | | 62 D9
+ D14 4 | | 61 D7 RA1/Vdisp 4 | | 61 D8
+ D15 5 | | 60 D6 R00 5 | | 60 D7
+ R00 6 | | 59 D5 R01 6 | | 59 D6
+ R01 7 | | 58 D4 R02 7 | | 58 D5
+ R02 8 | | 57 D3 R03 8 | HD61412x | 57 D4
+ R03 9 | | 56 D2 R10 9 | HD61414x | 56 D3
+ R10 10 | | 55 D1 R11 10 | HD40x4240 | 55 D2
+ R11 11 | | 54 D0 R12 11 | | 54 D1
+ R12 12 | | 53 GND R13 12 | DP-42 | 53 D0
+ R13 13 | | 52 OSC2 R20 13 | DP-42S | 52 GND
+ R20 14 | HD61402x | 51 OSC1 R21 14 | | 51 OSC2
+ R21 15 | HD61404x | 50 _TEST R22 15 | | 50 OSC1
+ R22 16 | HD61408x | 49 RESET R23 16 | | 49 _TEST
+ R23 17 | | 48 R93 R30 17 | | 48 RESET
+ RA0 18 | DP-64S | 47 R92 R31 18 | | 47 R43
+ RA1/Vdisp 19 | DC-64S | 46 R91 R32/_INT0 19 | | 46 R42/SO
+ R30 20 | | 45 R90 R33/_INT1 20 | | 45 R41/SI
+ R31 21 | | 44 R83 Vcc 21 |_________________| 44 R40/_SCK
+ R32/_INT0 22 | | 43 R82
+ R33/_INT1 23 | | 42 R81
+ R50 24 | | 41 R80
+ R51 25 | | 40 R73
+ R52 26 | | 39 R72
+ R53 27 | | 38 R71
+ R60 28 | | 37 R70
+ R61 29 | | 36 R43
+ R62 30 | | 35 R42/SO
+ R63 31 | | 34 R41/SI
+ Vcc 32 |_________________| 33 R40/_SCK
+
+*/
+
+
+class hmcs400_cpu_device : public cpu_device, public device_nvram_interface
+{
+public:
+ virtual ~hmcs400_cpu_device();
+
+ // configuration helpers
+
+ // 10 4-bit R ports (port A is 2-bit)
+ template <std::size_t N> auto read_r() { return m_read_r[N].bind(); }
+ template <std::size_t N> auto write_r() { return m_write_r[N].bind(); }
+
+ // 16-bit discrete
+ auto read_d() { return m_read_d.bind(); }
+ auto write_d() { return m_write_d.bind(); }
+
+ // system clock divider mask option (only for HMCS408, HMCS41x, HMCS42x)
+ // valid options: 4, 8, 16, default to 8
+ auto &set_divider(u8 div) { assert(m_has_div); m_divider = div; return *this; }
+
+ // nvram
+ void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true)
+ void nvram_set_default_value(u8 val) { m_nvram_defval = val & 0xf; } // default is 0
+ auto stop_cb() { return m_stop_cb.bind(); } // notifier (not an output pin)
+ int stop_mode() { return m_stop ? 1 : 0; }
+
+protected:
+ // construction
+ hmcs400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_nvram_interface implementation
+ virtual void nvram_default() override;
+ virtual bool nvram_read(util::read_stream &file) override;
+ virtual bool nvram_write(util::write_stream &file) override;
+
+ // device_execute_interface implementation
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + m_divider - 1) / m_divider; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * m_divider); }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 3+2; } // max 3 + interrupt
+ virtual void execute_set_input(int line, int state) override;
+ virtual void execute_run() override;
+
+ // device_memory_interface implementation
+ virtual space_config_vector memory_space_config() const override;
+
+ // device_disasm_interface implementation
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ // memory maps
+ void program_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
+
+ address_space_config m_program_config;
+ address_space_config m_data_config;
+ address_space *m_program;
+ address_space *m_data;
+
+ required_shared_ptr_array<u8, 2> m_ram;
+ u8 m_nvram_defval;
+ bool m_nvram_battery; // keeps internal RAM intact after soft power-off
+
+ int m_icount;
+ int m_state_count;
+
+ const u32 m_rom_size; // ROM size in 16-bit words
+ const u32 m_ram_size; // RAM size minus the 64-byte stack
+ bool m_has_div; // MCU supports divider mask option
+ u8 m_divider; // system clock divider
+
+ u16 m_pc; // program counter
+ u16 m_prev_pc;
+ u16 m_sp; // stack pointer
+ u16 m_op; // current opcode
+ u16 m_param; // 2-byte opcode param or RAM address
+ u8 m_i; // 4-bit immediate opcode param
+
+ u8 m_a; // 4-bit accumulator
+ u8 m_b; // 4-bit B register
+ u8 m_w; // 2-bit W register
+ u8 m_x; // 4-bit X register
+ u8 m_spx; // 4-bit SPX register
+ u8 m_y; // 4-bit Y register
+ u8 m_spy; // 4-bit SPY register
+ u8 m_st; // status flag
+ u8 m_ca; // carry flag
+ bool m_standby; // standby mode (SBY opcode)
+ bool m_stop; // stop mode (STOP opcode)
+
+ u8 m_r[11]; // R pins output state
+ u8 m_r_mask[11]; // R pins voltage mask
+ u32 m_r_dir; // R pins I/O direction (bit 0=R, bit 1=W)
+ u16 m_d; // D pins state
+ u16 m_d_mask; // D pins voltage mask
+
+ u8 m_int_line[2]; // INT0/INT1 pin state
+ u16 m_irq_flags; // interrupt control bits
+ u16 m_irq_mask; // valid irq flags bits
+ u8 m_pmr; // port mode register
+ u16 m_prescaler; // 11-bit clock prescaler
+ u8 m_timer_mode[2]; // TMA/TMB: timer mode registers
+ u16 m_timer_div[2]; // timer prescaler divide ratio masks from TMA/TMB
+ u8 m_timer_count[2]; // TCA/TCA: timer counters
+ u8 m_timer_load; // timer B reload register
+ u8 m_timer_b_low; // timer B counter low latch
+
+ // I/O handlers
+ devcb_read8::array<11> m_read_r;
+ devcb_write8::array<11> m_write_r;
+ devcb_read16 m_read_d;
+ devcb_write16 m_write_d;
+ devcb_write_line m_stop_cb;
+
+ // misc internal helpers
+ u8 ram_r(u8 mem_mask = 0xf);
+ void ram_w(u8 data, u8 mem_mask = 0xf);
+ void pop_stack();
+ void push_stack();
+
+ virtual void reset_io();
+ u8 read_r(u8 index);
+ void write_r(u8 index, u8 data);
+ int read_d(u8 index);
+ void write_d(u8 index, int state);
+
+ bool access_mode(u8 mem_mask, bool bit_mode = false);
+ u8 irq_control_r(offs_t offset, u8 mem_mask);
+ void irq_control_w(offs_t offset, u8 data, u8 mem_mask);
+ void pmr_w(offs_t offset, u8 data, u8 mem_mask);
+ void tm_w(offs_t offset, u8 data, u8 mem_mask);
+ void tlrl_w(offs_t offset, u8 data, u8 mem_mask);
+ void tlru_w(offs_t offset, u8 data, u8 mem_mask);
+ u8 tcbl_r(offs_t offset, u8 mem_mask);
+ u8 tcbu_r(offs_t offset, u8 mem_mask);
+
+ void ext_int_edge(int line);
+ void take_interrupt(int irq);
+ void check_interrupts();
+ void clock_timer(int timer);
+ void clock_prescaler();
+ void cycle();
+ u16 fetch();
+
+ // opcode handlers
+ void op_illegal();
+ void op_todo();
+
+ void op_lai();
+ void op_lbi();
+ void op_lmi();
+ void op_lmiiy();
+
+ void op_lab();
+ void op_lba();
+ void op_law();
+ void op_lay();
+ void op_laspx();
+ void op_laspy();
+ void op_lamr();
+ void op_xmra();
+
+ void op_lwi();
+ void op_lxi();
+ void op_lyi();
+ void op_lwa();
+ void op_lxa();
+ void op_lya();
+ void op_iy();
+ void op_dy();
+ void op_ayy();
+ void op_syy();
+ void op_xsp();
+
+ void op_lam();
+ void op_lbm();
+ void op_lma();
+ void op_lmaiy();
+ void op_lmady();
+ void op_xma();
+ void op_xmb();
+
+ void op_ai();
+ void op_ib();
+ void op_db();
+ void op_daa();
+ void op_das();
+ void op_nega();
+ void op_comb();
+ void op_rotr();
+ void op_rotl();
+ void op_sec();
+ void op_rec();
+ void op_tc();
+ void op_am();
+ void op_amc();
+ void op_smc();
+ void op_or();
+ void op_anm();
+ void op_orm();
+ void op_eorm();
+
+ void op_inem();
+ void op_anem();
+ void op_bnem();
+ void op_ynei();
+ void op_ilem();
+ void op_alem();
+ void op_blem();
+ void op_alei();
+
+ void op_sem();
+ void op_rem();
+ void op_tm();
+
+ void op_br();
+ void op_brl();
+ void op_jmpl();
+ void op_cal();
+ void op_call();
+ void op_tbr();
+ void op_rtn();
+ void op_rtni();
+
+ void op_sed();
+ void op_sedd();
+ void op_red();
+ void op_redd();
+ void op_td();
+ void op_tdd();
+ void op_lar();
+ void op_lbr();
+ void op_lra();
+ void op_lrb();
+ void op_p();
+
+ void op_sts();
+ void op_sby();
+ void op_stop();
+};
+
+
+class hmcs402_cpu_device : public hmcs400_cpu_device
+{
+protected:
+ hmcs402_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614022_device : public hmcs402_cpu_device
+{
+public:
+ hd614022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614023_device : public hmcs402_cpu_device
+{
+public:
+ hd614023_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614025_device : public hmcs402_cpu_device
+{
+public:
+ hd614025_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614026_device : public hmcs402_cpu_device
+{
+public:
+ hd614026_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614028_device : public hmcs402_cpu_device
+{
+public:
+ hd614028_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614029_device : public hmcs402_cpu_device
+{
+public:
+ hd614029_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs404_cpu_device : public hmcs400_cpu_device
+{
+protected:
+ hmcs404_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614042_device : public hmcs404_cpu_device
+{
+public:
+ hd614042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614043_device : public hmcs404_cpu_device
+{
+public:
+ hd614043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614045_device : public hmcs404_cpu_device
+{
+public:
+ hd614045_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614046_device : public hmcs404_cpu_device
+{
+public:
+ hd614046_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614048_device : public hmcs404_cpu_device
+{
+public:
+ hd614048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614049_device : public hmcs404_cpu_device
+{
+public:
+ hd614049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs408_cpu_device : public hmcs400_cpu_device
+{
+protected:
+ hmcs408_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614080_device : public hmcs408_cpu_device
+{
+public:
+ hd614080_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614081_device : public hmcs408_cpu_device
+{
+public:
+ hd614081_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614085_device : public hmcs408_cpu_device
+{
+public:
+ hd614085_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614086_device : public hmcs408_cpu_device
+{
+public:
+ hd614086_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614088_device : public hmcs408_cpu_device
+{
+public:
+ hd614088_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614089_device : public hmcs408_cpu_device
+{
+public:
+ hd614089_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs41x_cpu_device : public hmcs400_cpu_device
+{
+protected:
+ hmcs41x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u32 rom_size, u32 ram_size);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void reset_io() override;
+};
+
+class hmcs412_cpu_device : public hmcs41x_cpu_device
+{
+protected:
+ hmcs412_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614120_device : public hmcs412_cpu_device
+{
+public:
+ hd614120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614125_device : public hmcs412_cpu_device
+{
+public:
+ hd614125_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614128_device : public hmcs412_cpu_device
+{
+public:
+ hd614128_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs414_cpu_device : public hmcs41x_cpu_device
+{
+protected:
+ hmcs414_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614140_device : public hmcs414_cpu_device
+{
+public:
+ hd614140_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614145_device : public hmcs414_cpu_device
+{
+public:
+ hd614145_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd614148_device : public hmcs414_cpu_device
+{
+public:
+ hd614148_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class hmcs424_cpu_device : public hmcs41x_cpu_device
+{
+protected:
+ hmcs424_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
+ virtual void device_start() override ATTR_COLD { hmcs400_cpu_device::device_start(); }
+};
+
+class hd404240_device : public hmcs424_cpu_device
+{
+public:
+ hd404240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd40l4240_device : public hmcs424_cpu_device
+{
+public:
+ hd40l4240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class hd40a4240_device : public hmcs424_cpu_device
+{
+public:
+ hd40a4240_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+DECLARE_DEVICE_TYPE(HD614022, hd614022_device)
+DECLARE_DEVICE_TYPE(HD614023, hd614023_device)
+DECLARE_DEVICE_TYPE(HD614025, hd614025_device)
+DECLARE_DEVICE_TYPE(HD614026, hd614026_device)
+DECLARE_DEVICE_TYPE(HD614028, hd614028_device)
+DECLARE_DEVICE_TYPE(HD614029, hd614029_device)
+
+DECLARE_DEVICE_TYPE(HD614042, hd614042_device)
+DECLARE_DEVICE_TYPE(HD614043, hd614043_device)
+DECLARE_DEVICE_TYPE(HD614045, hd614045_device)
+DECLARE_DEVICE_TYPE(HD614046, hd614046_device)
+DECLARE_DEVICE_TYPE(HD614048, hd614048_device)
+DECLARE_DEVICE_TYPE(HD614049, hd614049_device)
+
+DECLARE_DEVICE_TYPE(HD614080, hd614080_device)
+DECLARE_DEVICE_TYPE(HD614081, hd614081_device)
+DECLARE_DEVICE_TYPE(HD614085, hd614085_device)
+DECLARE_DEVICE_TYPE(HD614086, hd614086_device)
+DECLARE_DEVICE_TYPE(HD614088, hd614088_device)
+DECLARE_DEVICE_TYPE(HD614089, hd614089_device)
+
+DECLARE_DEVICE_TYPE(HD614120, hd614120_device)
+DECLARE_DEVICE_TYPE(HD614125, hd614125_device)
+DECLARE_DEVICE_TYPE(HD614128, hd614128_device)
+
+DECLARE_DEVICE_TYPE(HD614140, hd614140_device)
+DECLARE_DEVICE_TYPE(HD614145, hd614145_device)
+DECLARE_DEVICE_TYPE(HD614148, hd614148_device)
+
+DECLARE_DEVICE_TYPE(HD404240, hd404240_device)
+DECLARE_DEVICE_TYPE(HD40A4240, hd40a4240_device)
+DECLARE_DEVICE_TYPE(HD40L4240, hd40l4240_device)
+
+#endif // MAME_CPU_HMCS400_HMCS400_H
diff --git a/src/devices/cpu/hmcs400/hmcs400d.cpp b/src/devices/cpu/hmcs400/hmcs400d.cpp
new file mode 100644
index 00000000000..526053f9169
--- /dev/null
+++ b/src/devices/cpu/hmcs400/hmcs400d.cpp
@@ -0,0 +1,237 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/*
+
+ Hitachi HMCS400 MCU family disassembler
+
+*/
+
+#include "emu.h"
+#include "hmcs400d.h"
+
+// constructor
+
+hmcs400_disassembler::hmcs400_disassembler()
+{
+}
+
+hmcs400_disassembler::~hmcs400_disassembler()
+{
+}
+
+
+// common lookup tables
+
+enum hmcs400_disassembler::e_mnemonics : unsigned
+{
+ mILL1, mILL2,
+ mLAI, mLBI, mLMID, mLMIIY,
+ mLAB, mLBA, mLAW, mLAY, mLASPX, mLASPY, mLAMR, mXMRA,
+ mLWI, mLXI, mLYI, mLWA, mLXA, mLYA, mIY, mDY, mAYY, mSYY, mXSP,
+ mLAM, mLAMD, mLBM, mLMA, mLMAD, mLMAIY, mLMADY, mXMA, mXMAD, mXMB,
+ mAI, mIB, mDB, mDAA, mDAS, mNEGA, mCOMB, mROTR, mROTL, mSEC, mREC, mTC,
+ mAM, mAMD, mAMC, mAMCD, mSMC, mSMCD, mOR, mANM, mANMD, mORM, mORMD, mEORM, mEORMD,
+ mINEM, mINEMD, mANEM, mANEMD, mBNEM, mYNEI, mILEM, mILEMD, mALEM, mALEMD, mBLEM, mALEI,
+ mSEM, mSEMD, mREM, mREMD, mTM, mTMD,
+ mBR, mBRL, mJMPL, mCAL, mCALL, mTBR, mRTN, mRTNI,
+ mSED, mSEDD, mRED, mREDD, mTD, mTDD, mLAR, mLBR, mLRA, mLRB, mP,
+ mNOP, mSTS, mSBY, mSTOP
+};
+
+const char *const hmcs400_disassembler::s_mnemonics[] =
+{
+ "?", "?",
+ "LAI", "LBI", "LMID", "LMIIY",
+ "LAB", "LBA", "LAW", "LAY", "LASPX", "LASPY", "LAMR", "XMRA",
+ "LWI", "LXI", "LYI", "LWA", "LXA", "LYA", "IY", "DY", "AYY", "SYY", "XSP",
+ "LAM", "LAMD", "LBM", "LMA", "LMAD", "LMAIY", "LMADY", "XMA", "XMAD", "XMB",
+ "AI", "IB", "DB", "DAA", "DAS", "NEGA", "COMB", "ROTR", "ROTL", "SEC", "REC", "TC",
+ "AM", "AMD", "AMC", "AMCD", "SMC", "SMCD", "OR", "ANM", "ANMD", "ORM", "ORMD", "EORM", "EORMD",
+ "INEM", "INEMD", "ANEM", "ANEMD", "BNEM", "YNEI", "ILEM", "ILEMD", "ALEM", "ALEMD", "BLEM", "ALEI",
+ "SEM", "SEMD", "REM", "REMD", "TM", "TMD",
+ "BR", "BRL", "JMPL", "CAL", "CALL", "TBR", "RTN", "RTNI",
+ "SED", "SEDD", "RED", "REDD", "TD", "TDD", "LAR", "LBR", "LRA", "LRB", "P",
+ "NOP", "STS", "SBY", "STOP"
+};
+
+// number of bits per opcode parameter, 99 means (XY) parameter
+const s8 hmcs400_disassembler::s_bits[] =
+{
+ 0, 10,
+ 4, 4, 14, 4,
+ 0, 0, 10, 0, 0, 0, 4, 4,
+ 2, 4, 4, 10, 0, 0, 0, 0, 0, 0, 99,
+ 99, 10, 99, 99, 10, 99, 99, 99, 10, 99,
+ 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 10, 0, 10, 0, 10, 0, 0, 10, 0, 10, 0, 10,
+ 4, 14, 0, 10, 0, 4, 4, 14, 0, 10, 0, 4,
+ 2, 12, 2, 12, 2, 12,
+ 8, 14, 14, 6, 14, 4, 0, 0,
+ 0, 4, 0, 4, 0, 4, 4, 4, 4, 4, 4,
+ 0, 0, 0, 0
+};
+
+const u32 hmcs400_disassembler::s_flags[] =
+{
+ 0, 0,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0,
+ STEP_COND, STEP_COND, 0, STEP_OVER | STEP_COND, STEP_OVER | STEP_COND, 0, STEP_OUT, STEP_OUT,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0
+};
+
+const u8 hmcs400_disassembler::hmcs400_mnemonic[0x400] =
+{
+// 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // 0x000
+ mNOP, mXSP, mXSP, mXSP, mANEM, 0, 0, 0, mAM, 0, 0, 0, mORM, 0, 0, 0,
+ mRTN, mRTNI, 0, 0, mALEM, 0, 0, 0, mAMC, 0, 0, 0, mEORM, 0, 0, 0,
+ mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM, mINEM,
+ mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM, mILEM,
+ // 0x040
+ mLBM, mLBM, mLBM, mLBM, mBNEM, 0, 0, 0, mLAB, 0, 0, 0, mIB, 0, 0, 0,
+ mLMAIY,mLMAIY,0, 0, mAYY, 0, 0, 0, mLASPY,0, 0, 0, mIY, 0, 0, 0,
+ mNEGA, 0, 0, 0, mRED, 0, 0, 0, mLASPX,0, 0, 0, 0, 0, 0, mTC,
+ mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI, mYNEI,
+ // 0x080
+ mXMA, mXMA, mXMA, mXMA, mSEM, mSEM, mSEM, mSEM, mREM, mREM, mREM, mREM, mTM, mTM, mTM, mTM,
+ mLAM, mLAM, mLAM, mLAM, mLMA, mLMA, mLMA, mLMA, mSMC, 0, 0, 0, mANM, 0, 0, 0,
+ mROTR, mROTL, 0, 0, 0, 0, mDAA, 0, 0, 0, mDAS, 0, 0, 0, 0, mLAY,
+ mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR, mTBR,
+ // 0x0c0
+ mXMB, mXMB, mXMB, mXMB, mBLEM, 0, 0, 0, mLBA, 0, 0, 0, 0, 0, 0, mDB,
+ mLMADY,mLMADY,0, 0, mSYY, 0, 0, 0, mLYA, 0, 0, 0, 0, 0, 0, mDY,
+ mTD, 0, 0, 0, mSED, 0, 0, 0, mLXA, 0, 0, 0, mREC, 0, 0, mSEC,
+ mLWI, mLWI, mLWI, mLWI, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+
+// 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // 0x100
+ mLAW, 1, 1, 1, mANEMD,1, 1, 1, mAMD, 1, 1, 1, mORMD, 1, 1, 1,
+ mLWA, 1, 1, 1, mALEMD,1, 1, 1, mAMCD, 1, 1, 1, mEORMD,1, 1, 1,
+ mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,mINEMD,
+ mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,mILEMD,
+ // 0x140
+ mCOMB, 0, 0, 0, mOR, 0, 0, 0, mSTS, 0, 0, 0, mSBY, mSTOP, 0, 0,
+ mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL, mJMPL,
+ mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL, mCALL,
+ mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL, mBRL,
+ // 0x180
+ mXMAD, 1, 1, 1, mSEMD, mSEMD, mSEMD, mSEMD, mREMD, mREMD, mREMD, mREMD, mTMD, mTMD, mTMD, mTMD,
+ mLAMD, 1, 1, 1, mLMAD, 1, 1, 1, mSMCD, 1, 1, 1, mANMD, 1, 1, 1,
+ mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID, mLMID,
+ mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP, mP,
+ // 0x1c0
+ mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
+ mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
+ mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
+ mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL, mCAL,
+
+// 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // 0x200
+ mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI, mLBI,
+ mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI, mLYI,
+ mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI, mLXI,
+ mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI, mLAI,
+ // 0x240
+ mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR, mLBR,
+ mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR, mLAR,
+ mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD, mREDD,
+ mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR, mLAMR,
+ // 0x280
+ mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI, mAI,
+ mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,mLMIIY,
+ mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD, mTDD,
+ mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI, mALEI,
+ // 0x2c0
+ mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB, mLRB,
+ mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA, mLRA,
+ mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD, mSEDD,
+ mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA, mXMRA,
+
+// 0 1 2 3 4 5 6 7 8 9 A B C D E F
+ // 0x300
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ // 0x340
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ // 0x380
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ // 0x3c0
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR,
+ mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR, mBR
+};
+
+
+// disasm
+
+offs_t hmcs400_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+ u16 op = opcodes.r16(pc++) & 0x3ff;
+ u8 instr = hmcs400_mnemonic[op];
+ u8 bits = s_bits[instr];
+ int len = 1;
+
+ // special case for (XY) opcode
+ if (bits == 99)
+ {
+ util::stream_format(stream, "%s", s_mnemonics[instr]);
+
+ if (op & 1)
+ stream << "X";
+ if (op & 2)
+ stream << "Y";
+ }
+ else
+ {
+ util::stream_format(stream, "%-8s", s_mnemonics[instr]);
+
+ // opcode parameter
+ if (bits != 0)
+ {
+ u16 param1 = op & ((1 << (bits % 10)) - 1);
+ u16 param2 = 0;
+ if (bits >= 10)
+ {
+ len++;
+ param2 = params.r16(pc++) & 0x3ff;
+ }
+
+ if (instr >= mBR && instr <= mCALL)
+ {
+ if (instr == mBR)
+ param1 |= pc & 0x3f00;
+ else if (instr != mCAL)
+ param1 = param1 << 10 | param2;
+ util::stream_format(stream, "$%04X", param1); // ROM address
+ }
+ else if (instr != mILL2 && instr != mLAW && instr != mLWA)
+ {
+ if (bits != 10)
+ util::stream_format(stream, (param1 < 10) ? "%d" : "$%X", param1);
+ if (bits > 10)
+ stream << ",";
+ if (bits >= 10)
+ util::stream_format(stream, "$%03X", param2); // RAM address
+ }
+ }
+ }
+
+ return len | s_flags[instr] | SUPPORTED;
+}
diff --git a/src/devices/cpu/hmcs400/hmcs400d.h b/src/devices/cpu/hmcs400/hmcs400d.h
new file mode 100644
index 00000000000..f9395cb9d14
--- /dev/null
+++ b/src/devices/cpu/hmcs400/hmcs400d.h
@@ -0,0 +1,31 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+/*
+
+ Hitachi HMCS400 MCU family disassembler
+
+*/
+
+#ifndef MAME_CPU_HMCS400_HMCS400D_H
+#define MAME_CPU_HMCS400_HMCS400D_H
+
+#pragma once
+
+class hmcs400_disassembler : public util::disasm_interface
+{
+public:
+ hmcs400_disassembler();
+ virtual ~hmcs400_disassembler();
+
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ enum e_mnemonics : unsigned;
+ static const char *const s_mnemonics[];
+ static const s8 s_bits[];
+ static const u32 s_flags[];
+ static const u8 hmcs400_mnemonic[0x400];
+};
+
+#endif // MAME_CPU_HMCS400_HMCS400D_H
diff --git a/src/devices/cpu/hmcs400/hmcs400op.cpp b/src/devices/cpu/hmcs400/hmcs400op.cpp
new file mode 100644
index 00000000000..045261fb534
--- /dev/null
+++ b/src/devices/cpu/hmcs400/hmcs400op.cpp
@@ -0,0 +1,692 @@
+// license:BSD-3-Clause
+// copyright-holders:hap
+
+// HMCS400 opcode handlers
+
+#include "emu.h"
+#include "hmcs400.h"
+
+
+// internal helpers
+
+inline u8 hmcs400_cpu_device::ram_r(u8 mem_mask)
+{
+ return m_data->read_byte(m_param & 0x3ff, mem_mask & 0xf) & 0xf;
+}
+
+inline void hmcs400_cpu_device::ram_w(u8 data, u8 mem_mask)
+{
+ m_data->write_byte(m_param & 0x3ff, data & 0xf, mem_mask & 0xf);
+}
+
+void hmcs400_cpu_device::pop_stack()
+{
+ u16 data = 0;
+ for (int i = 0; i < 4; i++)
+ {
+ m_sp = ((m_sp + 1) | 0x3c0) & 0x3ff;
+ data = data << 4 | (m_data->read_byte(m_sp) & 0xf);
+ }
+
+ if (m_op & 1)
+ {
+ // RTNI restores CA and ST
+ m_ca = BIT(data, 7);
+ m_st = BIT(data, 15);
+ }
+ m_pc = (~data & 0x7f00) >> 1 | (~data & 0x7f);
+}
+
+void hmcs400_cpu_device::push_stack()
+{
+ u16 data = (~m_pc << 1 & 0x7f00) | (~m_pc & 0x7f) | m_ca << 7 | m_st << 15;
+ m_sp = (m_sp | 0x3c0) & 0x3ff;
+
+ for (int i = 0; i < 4; i++)
+ {
+ m_data->write_byte(m_sp, data & 0xf);
+ data >>= 4;
+ m_sp = ((m_sp - 1) | 0x3c0) & 0x3ff;
+ }
+}
+
+
+// instruction set
+
+void hmcs400_cpu_device::op_illegal()
+{
+ logerror("unknown opcode $%03X @ $%04X\n", m_op, m_prev_pc);
+}
+
+void hmcs400_cpu_device::op_todo()
+{
+ logerror("unimplemented opcode $%03X @ $%04X\n", m_op, m_prev_pc);
+}
+
+
+// immediate instructions
+
+void hmcs400_cpu_device::op_lai()
+{
+ // LAI i: Load A from Immediate
+ m_a = m_i;
+}
+
+void hmcs400_cpu_device::op_lbi()
+{
+ // LBI i: Load B from Immediate
+ m_b = m_i;
+}
+
+void hmcs400_cpu_device::op_lmi()
+{
+ // LMID i,d: Load Memory from Immediate
+ ram_w(m_i);
+}
+
+void hmcs400_cpu_device::op_lmiiy()
+{
+ // LMIIY i: Load Memory from Immediate, Increment Y
+ op_lmi();
+ op_iy();
+}
+
+
+// register-to-register instructions
+
+void hmcs400_cpu_device::op_lab()
+{
+ // LAB: Load A from B
+ m_a = m_b;
+}
+
+void hmcs400_cpu_device::op_lba()
+{
+ // LBA: Load B from A
+ m_b = m_a;
+}
+
+void hmcs400_cpu_device::op_law()
+{
+ // LAW: Load A from W
+ m_a = m_w;
+}
+
+void hmcs400_cpu_device::op_lay()
+{
+ // LAY: Load A from Y
+ m_a = m_y;
+}
+
+void hmcs400_cpu_device::op_laspx()
+{
+ // LASPX: Load A from SPX
+ m_a = m_spx;
+}
+
+void hmcs400_cpu_device::op_laspy()
+{
+ // LASPY: Load A from SPY
+ m_a = m_spy;
+}
+
+void hmcs400_cpu_device::op_lamr()
+{
+ // LAMR m: Load A from MR
+ m_param = 0x20 | m_i;
+ m_a = ram_r();
+}
+
+void hmcs400_cpu_device::op_xmra()
+{
+ // XMRA m: Exchange MR and A
+ m_param = 0x20 | m_i;
+ u8 old_a = m_a;
+ m_a = ram_r();
+ ram_w(old_a);
+}
+
+
+// RAM address instructions
+
+void hmcs400_cpu_device::op_lwi()
+{
+ // LWI i: Load W from Immediate
+ m_w = m_i;
+}
+
+void hmcs400_cpu_device::op_lxi()
+{
+ // LXI i: Load X from Immediate
+ m_x = m_i;
+}
+
+void hmcs400_cpu_device::op_lyi()
+{
+ // LYI i: Load Y from Immediate
+ m_y = m_i;
+}
+
+void hmcs400_cpu_device::op_lwa()
+{
+ // LWA: Load W from A
+ m_w = m_a & 3;
+}
+
+void hmcs400_cpu_device::op_lxa()
+{
+ // LXA: Load X from A
+ m_x = m_a;
+}
+
+void hmcs400_cpu_device::op_lya()
+{
+ // LYA: Load Y from A
+ m_y = m_a;
+}
+
+void hmcs400_cpu_device::op_iy()
+{
+ // IY: Increment Y
+ m_y = (m_y + 1) & 0xf;
+ m_st = (m_y != 0);
+}
+
+void hmcs400_cpu_device::op_dy()
+{
+ // DY: Decrement Y
+ m_y = (m_y - 1) & 0xf;
+ m_st = (m_y != 0xf);
+}
+
+void hmcs400_cpu_device::op_ayy()
+{
+ // AYY: Add A to Y
+ m_y += m_a;
+ m_st = BIT(m_y, 4);
+ m_y &= 0xf;
+}
+
+void hmcs400_cpu_device::op_syy()
+{
+ // SYY: Subtract A from Y
+ m_y -= m_a;
+ m_st = BIT(~m_y, 4);
+ m_y &= 0xf;
+}
+
+void hmcs400_cpu_device::op_xsp()
+{
+ // XSP(XY): Exchange X and SPX, Y and SPY, or NOP if 0
+ if (m_op & 1)
+ {
+ u8 old_x = m_x;
+ m_x = m_spx;
+ m_spx = old_x;
+ }
+ if (m_op & 2)
+ {
+ u8 old_y = m_y;
+ m_y = m_spy;
+ m_spy = old_y;
+ }
+}
+
+
+// RAM register instructions
+
+void hmcs400_cpu_device::op_lam()
+{
+ // LAM(XY) / LAMD d: Load A from Memory
+ m_a = ram_r();
+ op_xsp();
+}
+
+void hmcs400_cpu_device::op_lbm()
+{
+ // LBM(XY): Load B from Memory
+ m_b = ram_r();
+ op_xsp();
+}
+
+void hmcs400_cpu_device::op_lma()
+{
+ // LMA(XY) / LMAD d: Load Memory from A
+ ram_w(m_a);
+ op_xsp();
+}
+
+void hmcs400_cpu_device::op_lmaiy()
+{
+ // LMAIY(X): Load Memory from A, Increment Y
+ op_lma();
+ op_iy();
+}
+
+void hmcs400_cpu_device::op_lmady()
+{
+ // LMADY(X): Load Memory from A, Decrement Y
+ op_lma();
+ op_dy();
+}
+
+void hmcs400_cpu_device::op_xma()
+{
+ // XMA(XY) / XMAD d: Exchange Memory and A
+ u8 old_a = m_a;
+ m_a = ram_r();
+ ram_w(old_a);
+ op_xsp();
+}
+
+void hmcs400_cpu_device::op_xmb()
+{
+ // XMB(XY): Exchange Memory and B
+ u8 old_b = m_b;
+ m_b = ram_r();
+ ram_w(old_b);
+ op_xsp();
+}
+
+
+// arithmetic instructions
+
+void hmcs400_cpu_device::op_ai()
+{
+ // AI i: Add Immediate to A
+ m_a += m_i;
+ m_st = BIT(m_a, 4);
+ m_a &= 0xf;
+}
+
+void hmcs400_cpu_device::op_ib()
+{
+ // IB: Increment B
+ m_b = (m_b + 1) & 0xf;
+ m_st = (m_b != 0);
+}
+
+void hmcs400_cpu_device::op_db()
+{
+ // DB: Decrement B
+ m_b = (m_b - 1) & 0xf;
+ m_st = (m_b != 0xf);
+}
+
+void hmcs400_cpu_device::op_daa()
+{
+ // DAA: Decimal Adjust for Addition
+ if (m_ca || m_a > 9)
+ {
+ m_a = (m_a + 6) & 0xf;
+ m_ca = 1;
+ }
+}
+
+void hmcs400_cpu_device::op_das()
+{
+ // DAS: Decimal Adjust for Subtraction
+ if (!m_ca || m_a > 9)
+ {
+ m_a = (m_a + 10) & 0xf;
+ m_ca = 0;
+ }
+}
+
+void hmcs400_cpu_device::op_nega()
+{
+ // NEGA: Negate A
+ m_a = (0 - m_a) & 0xf;
+}
+
+void hmcs400_cpu_device::op_comb()
+{
+ // COMB: Complement B
+ m_b ^= 0xf;
+}
+
+void hmcs400_cpu_device::op_rotr()
+{
+ // ROTR: Rotate Right with Carry
+ u8 ca = m_a & 1;
+ m_a = m_a >> 1 | m_ca << 3;
+ m_ca = ca;
+}
+
+void hmcs400_cpu_device::op_rotl()
+{
+ // ROTL: Rotate Left with Carry
+ m_a = m_a << 1 | m_ca;
+ m_ca = BIT(m_a, 4);
+ m_a &= 0xf;
+}
+
+void hmcs400_cpu_device::op_sec()
+{
+ // SEC: Set Carry
+ m_ca = 1;
+}
+
+void hmcs400_cpu_device::op_rec()
+{
+ // REC: Reset Carry
+ m_ca = 0;
+}
+
+void hmcs400_cpu_device::op_tc()
+{
+ // TC: Test Carry
+ m_st = m_ca;
+}
+
+void hmcs400_cpu_device::op_am()
+{
+ // AM / AMD d: Add A to Memory
+ m_a += ram_r();
+ m_st = BIT(m_a, 4);
+ m_a &= 0xf;
+}
+
+void hmcs400_cpu_device::op_amc()
+{
+ // AMC / AMCD d: Add A to Memory with Carry
+ m_a += ram_r() + m_ca;
+ m_ca = BIT(m_a, 4);
+ m_st = m_ca;
+ m_a &= 0xf;
+}
+
+void hmcs400_cpu_device::op_smc()
+{
+ // SMC / SMCD d: Subtract A from Memory with Carry
+ m_a = ram_r() - m_a - (m_ca ^ 1);
+ m_ca = BIT(~m_a, 4);
+ m_st = m_ca;
+ m_a &= 0xf;
+}
+
+void hmcs400_cpu_device::op_or()
+{
+ // OR: Or A with B
+ m_a |= m_b;
+}
+
+void hmcs400_cpu_device::op_anm()
+{
+ // ANM / ANMD d: And Memory with A
+ m_a &= ram_r();
+ m_st = (m_a != 0);
+}
+
+void hmcs400_cpu_device::op_orm()
+{
+ // ORM / ORMD d: Or Memory with A
+ m_a |= ram_r();
+ m_st = (m_a != 0);
+}
+
+void hmcs400_cpu_device::op_eorm()
+{
+ // EORM / EORMD d: Exclusive Or Memory with A
+ m_a ^= ram_r();
+ m_st = (m_a != 0);
+}
+
+
+// compare instructions
+
+void hmcs400_cpu_device::op_inem()
+{
+ // INEM i / INEMD i,d: Immediate Not Equal to Memory
+ m_st = (m_i != ram_r());
+}
+
+void hmcs400_cpu_device::op_anem()
+{
+ // ANEM / ANEMD d: A Not Equal to Memory
+ m_st = (m_a != ram_r());
+}
+
+void hmcs400_cpu_device::op_bnem()
+{
+ // BNEM: B Not Equal to Memory
+ m_st = (m_b != ram_r());
+}
+
+void hmcs400_cpu_device::op_ynei()
+{
+ // YNEI i: Y Not Equal to Immediate
+ m_st = (m_y != m_i);
+}
+
+void hmcs400_cpu_device::op_ilem()
+{
+ // ILEM i / ILEMD i,d: Immediate Less or Equal to Memory
+ m_st = (m_i <= ram_r());
+}
+
+void hmcs400_cpu_device::op_alem()
+{
+ // ALEM / ALEMD d: A Less or Equal to Memory
+ m_st = (m_a <= ram_r());
+}
+
+void hmcs400_cpu_device::op_blem()
+{
+ // BLEM: B Less or Equal to Memory
+ m_st = (m_b <= ram_r());
+}
+
+void hmcs400_cpu_device::op_alei()
+{
+ // ALEI i: A Less or Equal to Immediate
+ m_st = (m_a <= m_i);
+}
+
+
+// RAM bit manipulation instructions
+
+void hmcs400_cpu_device::op_sem()
+{
+ // SEM n / SEMD n,d: Set Memory Bit
+ u8 mask = 1 << (m_op & 3);
+ ram_w(ram_r(~mask) | mask, mask);
+}
+
+void hmcs400_cpu_device::op_rem()
+{
+ // REM n / REMD n,d: Reset Memory Bit
+ u8 mask = 1 << (m_op & 3);
+ ram_w(ram_r(~mask) & ~mask, mask);
+}
+
+void hmcs400_cpu_device::op_tm()
+{
+ // TM n / TMD n,d: Test Memory Bit
+ u8 mask = 1 << (m_op & 3);
+ m_st = (ram_r(mask) & mask) ? 1 : 0;
+}
+
+
+// ROM address instructions
+
+void hmcs400_cpu_device::op_br()
+{
+ // BR b: Branch on Status 1
+ if (m_st)
+ m_pc = (m_pc & ~0xff) | (m_op & 0xff);
+ else
+ m_st = 1;
+}
+
+void hmcs400_cpu_device::op_brl()
+{
+ // BRL u: Long Branch on Status 1
+ if (m_st)
+ op_jmpl();
+ else
+ m_st = 1;
+}
+
+void hmcs400_cpu_device::op_jmpl()
+{
+ // JMPL u: Long Jump Unconditionally
+ m_pc = m_i << 10 | m_param;
+}
+
+void hmcs400_cpu_device::op_cal()
+{
+ // CAL a: Subroutine Jump on Status 1
+ if (m_st)
+ {
+ cycle();
+ push_stack();
+ m_pc = m_op & 0x3f;
+ }
+ else
+ m_st = 1;
+}
+
+void hmcs400_cpu_device::op_call()
+{
+ // CALL u: Long Subroutine Jump on Status 1
+ if (m_st)
+ {
+ push_stack();
+ op_jmpl();
+ }
+ else
+ m_st = 1;
+}
+
+void hmcs400_cpu_device::op_tbr()
+{
+ // TBR p: Table Branch
+ m_pc = m_i << 8 | m_b << 4 | m_a;
+}
+
+void hmcs400_cpu_device::op_rtn()
+{
+ // RTN: Return from Subroutine
+ cycle();
+ cycle();
+ pop_stack();
+}
+
+void hmcs400_cpu_device::op_rtni()
+{
+ // RTNI: Return from Interrupt
+ op_rtn();
+ m_irq_flags |= 1;
+}
+
+
+// input/output instructions
+
+void hmcs400_cpu_device::op_sed()
+{
+ // SED: Set Discrete I/O Latch
+ write_d(m_y, 1);
+}
+
+void hmcs400_cpu_device::op_sedd()
+{
+ // SEDD m: Set Discrete I/O Latch Direct
+ write_d(m_i, 1);
+}
+
+void hmcs400_cpu_device::op_red()
+{
+ // RED: Reset Discrete I/O Latch
+ write_d(m_y, 0);
+}
+
+void hmcs400_cpu_device::op_redd()
+{
+ // REDD m: Reset Discrete I/O Latch Direct
+ write_d(m_i, 0);
+}
+
+void hmcs400_cpu_device::op_td()
+{
+ // TD: Test Discrete I/O Latch
+ m_st = read_d(m_y);
+}
+
+void hmcs400_cpu_device::op_tdd()
+{
+ // TDD m: Test Discrete I/O Latch Direct
+ m_st = read_d(m_i);
+}
+
+void hmcs400_cpu_device::op_lar()
+{
+ // LAR m: Load A from R Port Register
+ m_a = read_r(m_i);
+}
+
+void hmcs400_cpu_device::op_lbr()
+{
+ // LBR m: Load B from R Port Register
+ m_b = read_r(m_i);
+}
+
+void hmcs400_cpu_device::op_lra()
+{
+ // LRA m: Load R Port Register from A
+ write_r(m_i, m_a);
+}
+
+void hmcs400_cpu_device::op_lrb()
+{
+ // LRB m: Load R Port Register from B
+ write_r(m_i, m_b);
+}
+
+void hmcs400_cpu_device::op_p()
+{
+ // P p: Pattern Generation
+ cycle();
+ u16 data = m_program->read_word(m_i << 8 | m_b << 4 | m_a);
+
+ // destination is determined by the 2 highest bits
+ if (data & 0x100)
+ {
+ // to A/B registers
+ m_a = data & 0xf;
+ m_b = data >> 4 & 0xf;
+ }
+ if (data & 0x200)
+ {
+ // to R1/R2 ports
+ write_r(1, data & 0xf);
+ write_r(2, data >> 4 & 0xf);
+ }
+}
+
+
+// control instructions
+
+void hmcs400_cpu_device::op_sts()
+{
+ // STS: Start Serial
+ op_todo();
+}
+
+void hmcs400_cpu_device::op_sby()
+{
+ // SBY: Standby Mode
+ m_standby = true;
+}
+
+void hmcs400_cpu_device::op_stop()
+{
+ // STOP: Stop Mode
+ m_stop = true;
+
+ if (m_icount > 0)
+ m_icount = 0;
+
+ // all I/O pins go high-impedance
+ m_stop_cb(1);
+}
diff --git a/src/devices/cpu/hpc/hpc.h b/src/devices/cpu/hpc/hpc.h
index 5f73a0ee2e6..5bacbbe8211 100644
--- a/src/devices/cpu/hpc/hpc.h
+++ b/src/devices/cpu/hpc/hpc.h
@@ -25,8 +25,8 @@ protected:
hpc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -63,7 +63,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
class hpc46104_device : public hpc_device
@@ -77,7 +77,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/hphybrid/hphybrid.h b/src/devices/cpu/hphybrid/hphybrid.h
index 48b8e37b59c..89ea5d93561 100644
--- a/src/devices/cpu/hphybrid/hphybrid.h
+++ b/src/devices/cpu/hphybrid/hphybrid.h
@@ -98,12 +98,11 @@ protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint8_t addrwidth);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return m_r_cycles; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -254,8 +253,8 @@ public:
void set_9845_boot_mode(bool mode) { m_boot_mode = mode; }
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// TODO: fix
virtual uint32_t execute_max_cycles() const noexcept override { return 237; } // FMP 15
@@ -279,7 +278,7 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
// device_execute_interface overrides
// TODO: fix
diff --git a/src/devices/cpu/ht1130/ht1130.cpp b/src/devices/cpu/ht1130/ht1130.cpp
index 0f2aaefa836..eaf68eed077 100644
--- a/src/devices/cpu/ht1130/ht1130.cpp
+++ b/src/devices/cpu/ht1130/ht1130.cpp
@@ -1093,6 +1093,7 @@ void ht1130_device::execute_run()
{
if (m_inhalt)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/ht1130/ht1130.h b/src/devices/cpu/ht1130/ht1130.h
index f500ef7553a..befb3ef07a3 100644
--- a/src/devices/cpu/ht1130/ht1130.h
+++ b/src/devices/cpu/ht1130/ht1130.h
@@ -41,11 +41,10 @@ public:
protected:
ht1130_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor data);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_run() override;
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == HT1130_EXT_WAKEUP_LINE; }
virtual void execute_set_input(int inputnum, int state) override;
virtual u32 execute_max_cycles() const noexcept override { return 2; }
@@ -54,8 +53,8 @@ protected:
virtual space_config_vector memory_space_config() const override;
- void internal_map(address_map &map);
- void internal_data_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
+ void internal_data_map(address_map &map) ATTR_COLD;
void tempram_w(offs_t offset, u8 data);
void displayram_w(offs_t offset, u8 data);
@@ -131,11 +130,11 @@ public:
ht1190_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual u64 get_segs(u8 coms) override;
private:
- void internal_data_map_ht1190(address_map &map);
+ void internal_data_map_ht1190(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/i386/athlon.h b/src/devices/cpu/i386/athlon.h
index 9d7acbbe6da..fe1f84026de 100644
--- a/src/devices/cpu/i386/athlon.h
+++ b/src/devices/cpu/i386/athlon.h
@@ -22,8 +22,8 @@ protected:
virtual void cache_writeback() override;
virtual void cache_invalidate() override;
virtual void cache_clean() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void enter_smm() override;
virtual void leave_smm() override;
diff --git a/src/devices/cpu/i386/cycles.h b/src/devices/cpu/i386/cycles.h
index 2ca28aff180..f6721a39549 100644
--- a/src/devices/cpu/i386/cycles.h
+++ b/src/devices/cpu/i386/cycles.h
@@ -1,10 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Barry Rodewald, Carl, Philip Bennett
-#pragma once
+#ifndef MAME_CPU_I386_CYCLES_H
+#define MAME_CPU_I386_CYCLES_H
-#ifndef __CYCLES_H__
-#define __CYCLES_H__
+#pragma once
struct X86_CYCLE_TABLE
{
@@ -340,4 +340,4 @@ static const X86_CYCLE_TABLE x86_cycle_table[] =
{ CYCLES_CMPXCHG_REG_MEM_F, { { 0, 0 }, { 10, 10 }, { 10, 10 }, { 10, 10 } } },
};
-#endif /* __CYCLES_H__ */
+#endif // MAME_CPU_I386_CYCLES_H
diff --git a/src/devices/cpu/i386/i386.cpp b/src/devices/cpu/i386/i386.cpp
index 62d3e17dabb..bd99c7f456b 100644
--- a/src/devices/cpu/i386/i386.cpp
+++ b/src/devices/cpu/i386/i386.cpp
@@ -165,14 +165,14 @@ MODRM_TABLE i386_MODRM_table[256];
/*************************************************************************/
-uint32_t i386_device::i386_translate(int segment, uint32_t ip, int rwn)
+uint32_t i386_device::i386_translate(int segment, uint32_t ip, int rwn, int size)
{
// TODO: segment limit access size, execution permission, handle exception thrown from exception handler
if (PROTECTED_MODE && !V8086_MODE && (rwn != -1))
{
if (!(m_sreg[segment].valid))
FAULT_THROW((segment == SS) ? FAULT_SS : FAULT_GP, 0);
- if (i386_limit_check(segment, ip))
+ if (i386_limit_check(segment, ip, size))
FAULT_THROW((segment == SS) ? FAULT_SS : FAULT_GP, 0);
if ((rwn == 0) && ((m_sreg[segment].flags & 8) && !(m_sreg[segment].flags & 2)))
FAULT_THROW(FAULT_GP, 0);
@@ -2778,6 +2778,7 @@ void i386_device::execute_run()
if (m_halted)
{
+ debugger_wait_hook();
m_tsc += cycles;
m_cycles = 0;
return;
diff --git a/src/devices/cpu/i386/i386.h b/src/devices/cpu/i386/i386.h
index 7889ce5f0a8..6a230365ff0 100644
--- a/src/devices/cpu/i386/i386.h
+++ b/src/devices/cpu/i386/i386.h
@@ -45,14 +45,13 @@ protected:
i386_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_data_width, int program_addr_width, int io_data_width);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_debug_setup() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 40; }
- virtual uint32_t execute_input_lines() const noexcept override { return 32; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -435,7 +434,7 @@ protected:
void register_state_i386();
void register_state_i386_x87();
void register_state_i386_x87_xmm();
- uint32_t i386_translate(int segment, uint32_t ip, int rwn);
+ uint32_t i386_translate(int segment, uint32_t ip, int rwn, int size = 1);
inline vtlb_entry get_permissions(uint32_t pte, int wp);
bool i386_translate_address(int intention, bool debug, offs_t *address, vtlb_entry *entry);
bool translate_address(int pl, int type, uint32_t *address, uint32_t *error);
@@ -512,7 +511,7 @@ protected:
uint32_t GetEA(uint8_t modrm, int rwn);
uint32_t Getx87EA(uint8_t modrm, int rwn);
void i386_check_sreg_validity(int reg);
- int i386_limit_check(int seg, uint32_t offset);
+ int i386_limit_check(int seg, uint32_t offset, int size = 1);
void i386_sreg_load(uint16_t selector, uint8_t reg, bool *fault);
void i386_trap(int irq, int irq_gate, int trap_level);
void i386_trap_with_error(int irq, int irq_gate, int trap_level, uint32_t error);
@@ -1062,7 +1061,8 @@ protected:
void i486_bswap_esi();
void i486_bswap_edi();
void i486_mov_cr_r32();
- inline void MMXPROLOG();
+ inline bool MMXPROLOG();
+ inline bool SSEPROLOG();
inline void READMMX(uint32_t ea,MMX_REG &r);
inline void WRITEMMX(uint32_t ea,MMX_REG &r);
inline void READXMM(uint32_t ea,XMM_REG &r);
@@ -1597,8 +1597,8 @@ public:
protected:
i486_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
class i486dx4_device : public i486_device
@@ -1608,7 +1608,7 @@ public:
i486dx4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1625,8 +1625,8 @@ protected:
virtual void execute_set_input(int inputnum, int state) override;
virtual uint64_t opcode_rdmsr(bool &valid_msr) override;
virtual void opcode_wrmsr(uint64_t data, bool &valid_msr) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1637,8 +1637,8 @@ public:
pentium_mmx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1649,8 +1649,8 @@ public:
mediagx_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1665,8 +1665,8 @@ protected:
virtual uint64_t opcode_rdmsr(bool &valid_msr) override;
virtual void opcode_wrmsr(uint64_t data, bool &valid_msr) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1677,8 +1677,8 @@ public:
pentium2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -1689,8 +1689,8 @@ public:
pentium3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void opcode_cpuid() override;
};
@@ -1705,8 +1705,8 @@ public:
protected:
virtual uint64_t opcode_rdmsr(bool &valid_msr) override;
virtual void opcode_wrmsr(uint64_t data, bool &valid_msr) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
diff --git a/src/devices/cpu/i386/i386op16.hxx b/src/devices/cpu/i386/i386op16.hxx
index 4950a7ed73e..8f206a31157 100644
--- a/src/devices/cpu/i386/i386op16.hxx
+++ b/src/devices/cpu/i386/i386op16.hxx
@@ -1225,9 +1225,9 @@ void i386_device::i386_lodsw() // Opcode 0xad
{
uint32_t eas;
if( m_segment_prefix ) {
- eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0, 2);
} else {
- eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0, 2);
}
REG16(AX) = READ16(eas);
BUMP_SI(2);
@@ -1424,11 +1424,11 @@ void i386_device::i386_movsw() // Opcode 0xa5
uint32_t eas, ead;
uint16_t v;
if( m_segment_prefix ) {
- eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0, 2);
} else {
- eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0, 2);
}
- ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
+ ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1, 2);
v = READ16(eas);
WRITE16(ead, v);
BUMP_SI(2);
diff --git a/src/devices/cpu/i386/i386op32.hxx b/src/devices/cpu/i386/i386op32.hxx
index 72a4c0c2eb7..8166b14e02d 100644
--- a/src/devices/cpu/i386/i386op32.hxx
+++ b/src/devices/cpu/i386/i386op32.hxx
@@ -1068,9 +1068,9 @@ void i386_device::i386_lodsd() // Opcode 0xad
{
uint32_t eas;
if( m_segment_prefix ) {
- eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0, 4 );
} else {
- eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0, 4 );
}
REG32(EAX) = READ32(eas);
BUMP_SI(4);
@@ -1243,11 +1243,11 @@ void i386_device::i386_movsd() // Opcode 0xa5
{
uint32_t eas, ead, v;
if( m_segment_prefix ) {
- eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(m_segment_override, m_address_size ? REG32(ESI) : REG16(SI), 0, 4 );
} else {
- eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0 );
+ eas = i386_translate(DS, m_address_size ? REG32(ESI) : REG16(SI), 0, 4 );
}
- ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1 );
+ ead = i386_translate(ES, m_address_size ? REG32(EDI) : REG16(DI), 1, 4 );
v = READ32(eas);
WRITE32(ead, v);
BUMP_SI(4);
diff --git a/src/devices/cpu/i386/i386ops.hxx b/src/devices/cpu/i386/i386ops.hxx
index a063fa65d9f..ae0fcfff43a 100644
--- a/src/devices/cpu/i386/i386ops.hxx
+++ b/src/devices/cpu/i386/i386ops.hxx
@@ -1278,7 +1278,7 @@ void i386_device::i386_repeat(int invert_flag)
count = --REG32(ECX);
else
count = --REG16(CX);
- if (m_cycles <= 0)
+ if (count && (m_cycles <= 0))
goto outofcycles;
}
while( count && (!flag || (invert_flag ? !*flag : *flag)) );
diff --git a/src/devices/cpu/i386/i386priv.h b/src/devices/cpu/i386/i386priv.h
index 87f095807f1..3e5ea5b70f8 100644
--- a/src/devices/cpu/i386/i386priv.h
+++ b/src/devices/cpu/i386/i386priv.h
@@ -1,9 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Ville Linde, Barry Rodewald, Carl, Philip Bennett
-#pragma once
+#ifndef MAME_CPU_I386_I386PRIV_H
+#define MAME_CPU_I386_I386PRIV_H
-#ifndef __I386_H__
-#define __I386_H__
+#pragma once
#include "i386dasm.h"
@@ -327,7 +327,7 @@ extern int i386_parity_table[256];
#define MMX(n) (*((MMX_REG *)(&m_x87_reg[(n)].low)))
#define XMM(n) m_sse_reg[(n)]
-#define FLAG_DIRTY 0x100 // VTLB flag
+#define FLAG_DIRTY 0x100 // VTLB flag
#define CYCLES_NUM(x) (m_cycles -= (x))
#define FAULT(fault,error) {m_ext = 1; i386_trap_with_error(fault,0,0,error); return;}
@@ -724,4 +724,4 @@ enum X86_CYCLES
#define OP_4BYTE3AF2 0x00400000
#define OP_4BYTE38F3 0x00200000
-#endif /* __I386_H__ */
+#endif // MAME_CPU_I386_I386PRIV_H
diff --git a/src/devices/cpu/i386/i386segs.hxx b/src/devices/cpu/i386/i386segs.hxx
index de7efe755f2..6771f2bef5f 100644
--- a/src/devices/cpu/i386/i386segs.hxx
+++ b/src/devices/cpu/i386/i386segs.hxx
@@ -216,7 +216,7 @@ void i386_device::i386_check_sreg_validity(int reg)
}
}
-int i386_device::i386_limit_check(int seg, uint32_t offset)
+int i386_device::i386_limit_check(int seg, uint32_t offset, int size)
{
if(PROTECTED_MODE && !V8086_MODE)
{
@@ -231,7 +231,7 @@ int i386_device::i386_limit_check(int seg, uint32_t offset)
}
else
{
- if(offset > m_sreg[seg].limit)
+ if((offset + size - 1) > m_sreg[seg].limit)
{
LOGMASKED(LOG_LIMIT_CHECK, "Limit check at 0x%08x failed. Segment %04x, limit %08x, offset %08x\n",m_pc,m_sreg[seg].selector,m_sreg[seg].limit,offset);
//machine().debug_break();
@@ -436,18 +436,6 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
type = (v2>>8) & 0x1F;
flags = (v2>>8) & 0xf0ff;
- if(trap_level == 2)
- {
- LOGMASKED(LOG_PM_FAULT_DF, "IRQ: Double fault.\n");
- FAULT_EXP(FAULT_DF,0);
- }
- if(trap_level >= 3)
- {
- LOGMASKED(LOG_PM_EVENTS, "IRQ: Triple fault. CPU reset.\n");
- pulse_input_line(INPUT_LINE_RESET, attotime::zero);
- return;
- }
-
/* segment privilege checks */
if(entry >= m_idtr.limit)
{
@@ -778,30 +766,50 @@ void i386_device::i386_trap(int irq, int irq_gate, int trap_level)
void i386_device::i386_trap_with_error(int irq, int irq_gate, int trap_level, uint32_t error)
{
- i386_trap(irq,irq_gate,trap_level);
- if(irq == 8 || irq == 10 || irq == 11 || irq == 12 || irq == 13 || irq == 14)
+ try
{
- // for these exceptions, an error code is pushed onto the stack by the processor.
- // no error code is pushed for software interrupts, either.
- if(PROTECTED_MODE)
- {
- uint32_t entry = irq * 8;
- uint32_t v2,type;
- v2 = READ32PL(m_idtr.base + entry + 4, 0);
- type = (v2>>8) & 0x1F;
- if(type == 5)
+ i386_trap(irq,irq_gate,trap_level);
+ if(irq == 8 || irq == 10 || irq == 11 || irq == 12 || irq == 13 || irq == 14)
+ {
+ // for these exceptions, an error code is pushed onto the stack by the processor.
+ // no error code is pushed for software interrupts, either.
+ if(PROTECTED_MODE)
{
- v2 = READ32PL(m_idtr.base + entry, 0);
- v2 = READ32PL(m_gdtr.base + ((v2 >> 16) & 0xfff8) + 4, 0);
+ uint32_t entry = irq * 8;
+ uint32_t v2,type;
+ v2 = READ32PL(m_idtr.base + entry + 4, 0);
type = (v2>>8) & 0x1F;
+ if(type == 5)
+ {
+ v2 = READ32PL(m_idtr.base + entry, 0);
+ v2 = READ32PL(m_gdtr.base + ((v2 >> 16) & 0xfff8) + 4, 0);
+ type = (v2>>8) & 0x1F;
+ }
+ if(type >= 9)
+ PUSH32(error);
+ else
+ PUSH16(error);
}
- if(type >= 9)
- PUSH32(error);
else
PUSH16(error);
}
- else
- PUSH16(error);
+ }
+ catch([[maybe_unused]] uint64_t e)
+ {
+ trap_level++;
+ if(trap_level == 1)
+ {
+ m_ext = 1;
+ LOGMASKED(LOG_PM_FAULT_DF, "IRQ: Double fault.\n");
+ i386_trap_with_error(FAULT_DF,0,trap_level,0);
+ return;
+ }
+ if(trap_level >= 2)
+ {
+ LOGMASKED(LOG_PM_EVENTS, "IRQ: Triple fault. CPU reset.\n");
+ pulse_input_line(INPUT_LINE_RESET, attotime::zero);
+ return;
+ }
}
}
diff --git a/src/devices/cpu/i386/pentops.hxx b/src/devices/cpu/i386/pentops.hxx
index 13a253b7619..5cb212633f2 100644
--- a/src/devices/cpu/i386/pentops.hxx
+++ b/src/devices/cpu/i386/pentops.hxx
@@ -5,15 +5,26 @@
extern flag float32_is_nan( float32 a ); // since its not defined in softfloat.h
extern flag float64_is_nan( float64 a ); // since its not defined in softfloat.h
-void i386_device::MMXPROLOG()
+bool i386_device::MMXPROLOG()
{
- if (m_cr[0] & (CR0_TS | CR0_EM))
+ if (m_cr[0] & CR0_TS)
{
i386_trap(FAULT_NM, 0, 0);
- return;
+ return true;
}
- //m_x87_sw &= ~(X87_SW_TOP_MASK << X87_SW_TOP_SHIFT); // top = 0
+ x87_set_stack_top(0);
m_x87_tw = 0; // tag word = 0
+ return false;
+}
+
+bool i386_device::SSEPROLOG()
+{
+ if (m_cr[0] & CR0_TS)
+ {
+ i386_trap(FAULT_NM, 0, 0);
+ return true;
+ }
+ return false;
}
void i386_device::READMMX(uint32_t ea,MMX_REG &r)
@@ -997,25 +1008,6 @@ void i386_device::pentium_movnti_m32_r32() // Opcode 0f c3
}
}
-void i386_device::i386_cyrix_special() // Opcode 0x0f 3a-3d
-{
-/*
-0f 3a BB0_RESET (set BB0 pointer = base)
-0f 3b BB1_RESET (set BB1 pointer = base)
-0f 3c CPU_WRITE (write special CPU memory-mapped register, [ebx] = eax)
-0f 3d CPU_READ (read special CPU memory-mapped register, eax, = [ebx])
-*/
-
- CYCLES(1);
-}
-
-void i386_device::i386_cyrix_unknown() // Opcode 0x0f 74
-{
- LOGMASKED(LOG_UNEMULATED, "Unemulated 0x0f 0x74 opcode called\n");
-
- CYCLES(1);
-}
-
void i386_device::pentium_cmpxchg8b_m64() // Opcode 0x0f c7
{
uint8_t modm = FETCH();
@@ -1042,7 +1034,7 @@ void i386_device::pentium_cmpxchg8b_m64() // Opcode 0x0f c7
void i386_device::pentium_movntq_m64_r64() // Opcode 0f e7
{
- //MMXPROLOG(); // TODO: check if needed
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
@@ -1059,7 +1051,7 @@ void i386_device::pentium_maskmovq_r64_r64() // Opcode 0f f7
int s,m,n;
uint8_t modm = FETCH();
uint32_t ea = GetEA(7, 0); // ds:di/edi/rdi register
- MMXPROLOG();
+ if(MMXPROLOG()) return;
s=(modm >> 3) & 7;
m=modm & 7;
for (n=0;n <= 7;n++)
@@ -1071,6 +1063,7 @@ void i386_device::sse_maskmovdqu_r128_r128() // Opcode 66 0f f7
{
int s,m,n;
uint8_t modm = FETCH();
+ if(SSEPROLOG()) return;
uint32_t ea = GetEA(7, 0); // ds:di/edi/rdi register
s=(modm >> 3) & 7;
m=modm & 7;
@@ -1175,7 +1168,7 @@ void i386_device::mmx_group_0f71() // Opcode 0f 71
{
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
{
@@ -1207,6 +1200,7 @@ void i386_device::sse_group_660f71() // Opcode 66 0f 71
{
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
+ if(SSEPROLOG()) return;
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1232,7 +1226,7 @@ void i386_device::mmx_group_0f72() // Opcode 0f 72
{
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
{
@@ -1258,6 +1252,7 @@ void i386_device::sse_group_660f72() // Opcode 66 0f 72
{
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
+ if(SSEPROLOG()) return;
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1283,7 +1278,7 @@ void i386_device::mmx_group_0f73() // Opcode 0f 73
{
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modm >= 0xc0 ) {
switch ( (modm & 0x38) >> 3 )
{
@@ -1304,6 +1299,7 @@ void i386_device::sse_group_660f73() // Opcode 66 0f 73
uint64_t t0;
uint8_t modm = FETCH();
uint8_t imm8 = FETCH();
+ if(SSEPROLOG()) return;
if (modm >= 0xc0) {
switch ((modm & 0x38) >> 3)
{
@@ -1362,7 +1358,7 @@ void i386_device::sse_group_660f73() // Opcode 66 0f 73
void i386_device::mmx_psrlw_r64_rm64() // Opcode 0f d1
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1385,7 +1381,7 @@ void i386_device::mmx_psrlw_r64_rm64() // Opcode 0f d1
void i386_device::mmx_psrld_r64_rm64() // Opcode 0f d2
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1404,7 +1400,7 @@ void i386_device::mmx_psrld_r64_rm64() // Opcode 0f d2
void i386_device::mmx_psrlq_r64_rm64() // Opcode 0f d3
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1421,7 +1417,7 @@ void i386_device::mmx_psrlq_r64_rm64() // Opcode 0f d3
void i386_device::mmx_paddq_r64_rm64() // Opcode 0f d4
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q+MMX(modrm & 7).q;
@@ -1436,7 +1432,7 @@ void i386_device::mmx_paddq_r64_rm64() // Opcode 0f d4
void i386_device::mmx_pmullw_r64_rm64() // Opcode 0f d5
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]) & 0xffff;
@@ -1458,7 +1454,7 @@ void i386_device::mmx_pmullw_r64_rm64() // Opcode 0f d5
void i386_device::mmx_psubusb_r64_rm64() // Opcode 0f d8
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1476,7 +1472,7 @@ void i386_device::mmx_psubusb_r64_rm64() // Opcode 0f d8
void i386_device::mmx_psubusw_r64_rm64() // Opcode 0f d9
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1493,7 +1489,7 @@ void i386_device::mmx_psubusw_r64_rm64() // Opcode 0f d9
void i386_device::mmx_pand_r64_rm64() // Opcode 0f db
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q & MMX(modrm & 7).q;
@@ -1509,7 +1505,7 @@ void i386_device::mmx_pand_r64_rm64() // Opcode 0f db
void i386_device::mmx_paddusb_r64_rm64() // Opcode 0f dc
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1527,7 +1523,7 @@ void i386_device::mmx_paddusb_r64_rm64() // Opcode 0f dc
void i386_device::mmx_paddusw_r64_rm64() // Opcode 0f dd
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1544,7 +1540,7 @@ void i386_device::mmx_paddusw_r64_rm64() // Opcode 0f dd
void i386_device::mmx_pandn_r64_rm64() // Opcode 0f df
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=(~MMX((modrm >> 3) & 0x7).q) & MMX(modrm & 7).q;
@@ -1559,7 +1555,7 @@ void i386_device::mmx_pandn_r64_rm64() // Opcode 0f df
void i386_device::mmx_psraw_r64_rm64() // Opcode 0f e1
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1582,7 +1578,7 @@ void i386_device::mmx_psraw_r64_rm64() // Opcode 0f e1
void i386_device::mmx_psrad_r64_rm64() // Opcode 0f e2
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1601,7 +1597,7 @@ void i386_device::mmx_psrad_r64_rm64() // Opcode 0f e2
void i386_device::mmx_pmulhw_r64_rm64() // Opcode 0f e5
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).w[0]=(uint32_t)((int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]) >> 16;
@@ -1623,7 +1619,7 @@ void i386_device::mmx_pmulhw_r64_rm64() // Opcode 0f e5
void i386_device::mmx_psubsb_r64_rm64() // Opcode 0f e8
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1641,7 +1637,7 @@ void i386_device::mmx_psubsb_r64_rm64() // Opcode 0f e8
void i386_device::mmx_psubsw_r64_rm64() // Opcode 0f e9
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1658,7 +1654,7 @@ void i386_device::mmx_psubsw_r64_rm64() // Opcode 0f e9
void i386_device::mmx_por_r64_rm64() // Opcode 0f eb
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q | MMX(modrm & 7).q;
@@ -1674,7 +1670,7 @@ void i386_device::mmx_por_r64_rm64() // Opcode 0f eb
void i386_device::mmx_paddsb_r64_rm64() // Opcode 0f ec
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1692,7 +1688,7 @@ void i386_device::mmx_paddsb_r64_rm64() // Opcode 0f ec
void i386_device::mmx_paddsw_r64_rm64() // Opcode 0f ed
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1709,7 +1705,7 @@ void i386_device::mmx_paddsw_r64_rm64() // Opcode 0f ed
void i386_device::mmx_pxor_r64_rm64() // Opcode 0f ef
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q ^ MMX(modrm & 7).q;
@@ -1724,7 +1720,7 @@ void i386_device::mmx_pxor_r64_rm64() // Opcode 0f ef
void i386_device::mmx_psllw_r64_rm64() // Opcode 0f f1
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1747,7 +1743,7 @@ void i386_device::mmx_psllw_r64_rm64() // Opcode 0f f1
void i386_device::mmx_pslld_r64_rm64() // Opcode 0f f2
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1766,7 +1762,7 @@ void i386_device::mmx_pslld_r64_rm64() // Opcode 0f f2
void i386_device::mmx_psllq_r64_rm64() // Opcode 0f f3
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int count=(int)MMX(modrm & 7).q;
@@ -1783,7 +1779,7 @@ void i386_device::mmx_psllq_r64_rm64() // Opcode 0f f3
void i386_device::mmx_pmaddwd_r64_rm64() // Opcode 0f f5
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0]=(int32_t)MMX((modrm >> 3) & 0x7).s[0]*(int32_t)MMX(modrm & 7).s[0]+
@@ -1805,7 +1801,7 @@ void i386_device::mmx_pmaddwd_r64_rm64() // Opcode 0f f5
void i386_device::mmx_psubb_r64_rm64() // Opcode 0f f8
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1823,7 +1819,7 @@ void i386_device::mmx_psubb_r64_rm64() // Opcode 0f f8
void i386_device::mmx_psubw_r64_rm64() // Opcode 0f f9
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1841,7 +1837,7 @@ void i386_device::mmx_psubw_r64_rm64() // Opcode 0f f9
void i386_device::mmx_psubd_r64_rm64() // Opcode 0f fa
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 2;n++)
@@ -1859,7 +1855,7 @@ void i386_device::mmx_psubd_r64_rm64() // Opcode 0f fa
void i386_device::mmx_paddb_r64_rm64() // Opcode 0f fc
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -1877,7 +1873,7 @@ void i386_device::mmx_paddb_r64_rm64() // Opcode 0f fc
void i386_device::mmx_paddw_r64_rm64() // Opcode 0f fd
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -1895,7 +1891,7 @@ void i386_device::mmx_paddw_r64_rm64() // Opcode 0f fd
void i386_device::mmx_paddd_r64_rm64() // Opcode 0f fe
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 2;n++)
@@ -1912,16 +1908,39 @@ void i386_device::mmx_paddd_r64_rm64() // Opcode 0f fe
void i386_device::mmx_emms() // Opcode 0f 77
{
- if (m_cr[0] & (CR0_TS | CR0_EM))
+ if (m_cr[0] & CR0_TS)
{
i386_trap(FAULT_NM, 0, 0);
return;
}
+ if (m_cr[0] & CR0_EM)
+ {
+ i386_trap(FAULT_UD, 0, 0);
+ return;
+ }
m_x87_tw = 0xffff; // tag word = 0xffff
- // TODO
CYCLES(1); // TODO: correct cycle count
}
+void i386_device::i386_cyrix_special() // Opcode 0x0f 3a-3d
+{
+ /*
+ 0f 3a BB0_RESET (set BB0 pointer = base)
+ 0f 3b BB1_RESET (set BB1 pointer = base)
+ 0f 3c CPU_WRITE (write special CPU memory-mapped register, [ebx] = eax)
+ 0f 3d CPU_READ (read special CPU memory-mapped register, eax, = [ebx])
+ */
+
+ CYCLES(1);
+}
+
+void i386_device::i386_cyrix_unknown() // Opcode 0x0f 74
+{
+ LOGMASKED(LOG_UNEMULATED, "Unemulated 0x0f 0x74 opcode called\n");
+
+ CYCLES(1);
+}
+
void i386_device::i386_cyrix_svdc() // Opcode 0f 78
{
uint8_t modrm = FETCH();
@@ -2180,7 +2199,7 @@ void i386_device::i386_cyrix_rsts() // Opcode 0f 7d
void i386_device::mmx_movd_r64_rm32() // Opcode 0f 6e
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).d[0]=LOAD_RM32(modrm);
@@ -2194,7 +2213,7 @@ void i386_device::mmx_movd_r64_rm32() // Opcode 0f 6e
void i386_device::mmx_movq_r64_rm64() // Opcode 0f 6f
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).l=MMX(modrm & 0x7).l;
@@ -2207,7 +2226,7 @@ void i386_device::mmx_movq_r64_rm64() // Opcode 0f 6f
void i386_device::mmx_movd_rm32_r64() // Opcode 0f 7e
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
STORE_RM32(modrm, MMX((modrm >> 3) & 0x7).d[0]);
@@ -2220,7 +2239,7 @@ void i386_device::mmx_movd_rm32_r64() // Opcode 0f 7e
void i386_device::mmx_movq_rm64_r64() // Opcode 0f 7f
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX(modrm & 0x7)=MMX((modrm >> 3) & 0x7);
@@ -2234,7 +2253,7 @@ void i386_device::mmx_movq_rm64_r64() // Opcode 0f 7f
void i386_device::mmx_pcmpeqb_r64_rm64() // Opcode 0f 74
{
int c;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2255,7 +2274,7 @@ void i386_device::mmx_pcmpeqb_r64_rm64() // Opcode 0f 74
void i386_device::mmx_pcmpeqw_r64_rm64() // Opcode 0f 75
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2280,7 +2299,7 @@ void i386_device::mmx_pcmpeqw_r64_rm64() // Opcode 0f 75
void i386_device::mmx_pcmpeqd_r64_rm64() // Opcode 0f 76
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2301,7 +2320,7 @@ void i386_device::mmx_pcmpeqd_r64_rm64() // Opcode 0f 76
void i386_device::mmx_pshufw_r64_rm64_i8() // Opcode 0f 70
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX_REG t;
@@ -2331,6 +2350,7 @@ void i386_device::mmx_pshufw_r64_rm64_i8() // Opcode 0f 70
void i386_device::sse_punpcklbw_r128_rm128() // Opcode 66 0f 60
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG xd,xs;
int s, d;
@@ -2372,6 +2392,7 @@ void i386_device::sse_punpcklbw_r128_rm128() // Opcode 66 0f 60
void i386_device::sse_punpcklwd_r128_rm128()
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2401,6 +2422,7 @@ void i386_device::sse_punpcklwd_r128_rm128()
void i386_device::sse_punpckldq_r128_rm128()
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2430,6 +2452,7 @@ void i386_device::sse_punpckldq_r128_rm128()
void i386_device::sse_punpcklqdq_r128_rm128()
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG xd, xs;
int s, d;
@@ -2454,119 +2477,116 @@ void i386_device::sse_punpcklqdq_r128_rm128()
void i386_device::mmx_punpcklbw_r64_r64m32() // Opcode 0f 60
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- uint32_t t;
- int s,d;
- s=modrm & 0x7;
- d=(modrm >> 3) & 0x7;
- t=MMX(d).d[0];
- MMX(d).b[0]=t & 0xff;
- MMX(d).b[1]=MMX(s).b[0];
- MMX(d).b[2]=(t >> 8) & 0xff;
- MMX(d).b[3]=MMX(s).b[1];
- MMX(d).b[4]=(t >> 16) & 0xff;
- MMX(d).b[5]=MMX(s).b[2];
- MMX(d).b[6]=(t >> 24) & 0xff;
- MMX(d).b[7]=MMX(s).b[3];
- } else {
- uint32_t s,t;
- int d=(modrm >> 3) & 0x7;
+ int s, d;
+ s = modrm & 0x7;
+ d = (modrm >> 3) & 0x7;
+ MMX(d).b[7] = MMX(s).b[3];
+ MMX(d).b[6] = MMX(d).b[3];
+ MMX(d).b[5] = MMX(s).b[2];
+ MMX(d).b[4] = MMX(d).b[2];
+ MMX(d).b[3] = MMX(s).b[1];
+ MMX(d).b[2] = MMX(d).b[1];
+ MMX(d).b[1] = MMX(s).b[0];
+ MMX(d).b[0] = MMX(d).b[0];
+ } else {
+ uint32_t s;
+ int d = (modrm >> 3) & 0x7;
uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
- t=MMX(d).d[0];
- MMX(d).b[0]=t & 0xff;
- MMX(d).b[1]=s & 0xff;
- MMX(d).b[2]=(t >> 8) & 0xff;
- MMX(d).b[3]=(s >> 8) & 0xff;
- MMX(d).b[4]=(t >> 16) & 0xff;
- MMX(d).b[5]=(s >> 16) & 0xff;
- MMX(d).b[6]=(t >> 24) & 0xff;
- MMX(d).b[7]=(s >> 24) & 0xff;
+ MMX(d).b[7] = (s >> 24) & 0xff;
+ MMX(d).b[6] = MMX(d).b[3];
+ MMX(d).b[5] = (s >> 16) & 0xff;
+ MMX(d).b[4] = MMX(d).b[2];
+ MMX(d).b[3] = (s >> 8) & 0xff;
+ MMX(d).b[2] = MMX(d).b[1];
+ MMX(d).b[1] = s & 0xff;
+ MMX(d).b[0] = MMX(d).b[0];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::mmx_punpcklwd_r64_r64m32() // Opcode 0f 61
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- uint16_t t;
- int s,d;
- s=modrm & 0x7;
- d=(modrm >> 3) & 0x7;
- t=MMX(d).w[1];
- MMX(d).w[0]=MMX(d).w[0];
- MMX(d).w[1]=MMX(s).w[0];
- MMX(d).w[2]=t;
- MMX(d).w[3]=MMX(s).w[1];
+ int s, d;
+ s = modrm & 0x7;
+ d = (modrm >> 3) & 0x7;
+ MMX(d).w[3] = MMX(s).w[1];
+ MMX(d).w[2] = MMX(d).w[1];
+ MMX(d).w[1] = MMX(s).w[0];
+ MMX(d).w[0] = MMX(d).w[0];
} else {
uint32_t s;
- uint16_t t;
- int d=(modrm >> 3) & 0x7;
+ int d = (modrm >> 3) & 0x7;
uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
- t=MMX(d).w[1];
- MMX(d).w[0]=MMX(d).w[0];
- MMX(d).w[1]=s & 0xffff;
- MMX(d).w[2]=t;
- MMX(d).w[3]=(s >> 16) & 0xffff;
+ MMX(d).w[3] = (s >> 16) & 0xffff;
+ MMX(d).w[2] = MMX(d).w[1];
+ MMX(d).w[1] = s & 0xffff;
+ MMX(d).w[0] = MMX(d).w[0];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::mmx_punpckldq_r64_r64m32() // Opcode 0f 62
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- int s,d;
- s=modrm & 0x7;
- d=(modrm >> 3) & 0x7;
- MMX(d).d[0]=MMX(d).d[0];
- MMX(d).d[1]=MMX(s).d[0];
+ int s, d;
+ s = modrm & 0x7;
+ d = (modrm >> 3) & 0x7;
+ MMX(d).d[1] = MMX(s).d[0];
+ MMX(d).d[0] = MMX(d).d[0];
} else {
uint32_t s;
- int d=(modrm >> 3) & 0x7;
+ int d = (modrm >> 3) & 0x7;
uint32_t ea = GetEA(modrm, 0);
s = READ32(ea);
- MMX(d).d[0]=MMX(d).d[0];
- MMX(d).d[1]=s;
+ MMX(d).d[1] = s;
+ MMX(d).d[0] = MMX(d).d[0];
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::mmx_packsswb_r64_rm64() // Opcode 0f 63
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- int s,d;
- s=modrm & 0x7;
- d=(modrm >> 3) & 0x7;
- MMX(d).c[0]=SaturatedSignedWordToSignedByte(MMX(d).s[0]);
- MMX(d).c[1]=SaturatedSignedWordToSignedByte(MMX(d).s[1]);
- MMX(d).c[2]=SaturatedSignedWordToSignedByte(MMX(d).s[2]);
- MMX(d).c[3]=SaturatedSignedWordToSignedByte(MMX(d).s[3]);
- MMX(d).c[4]=SaturatedSignedWordToSignedByte(MMX(s).s[0]);
- MMX(d).c[5]=SaturatedSignedWordToSignedByte(MMX(s).s[1]);
- MMX(d).c[6]=SaturatedSignedWordToSignedByte(MMX(s).s[2]);
- MMX(d).c[7]=SaturatedSignedWordToSignedByte(MMX(s).s[3]);
- } else {
- MMX_REG s;
- int d=(modrm >> 3) & 0x7;
+ MMX_REG ds, sd;
+ int s, d;
+ s = modrm & 0x7;
+ d = (modrm >> 3) & 0x7;
+ ds.q = MMX(d).q;
+ sd.q = MMX(s).q;
+ MMX(d).c[0] = SaturatedSignedWordToSignedByte(ds.s[0]);
+ MMX(d).c[1] = SaturatedSignedWordToSignedByte(ds.s[1]);
+ MMX(d).c[2] = SaturatedSignedWordToSignedByte(ds.s[2]);
+ MMX(d).c[3] = SaturatedSignedWordToSignedByte(ds.s[3]);
+ MMX(d).c[4] = SaturatedSignedWordToSignedByte(sd.s[0]);
+ MMX(d).c[5] = SaturatedSignedWordToSignedByte(sd.s[1]);
+ MMX(d).c[6] = SaturatedSignedWordToSignedByte(sd.s[2]);
+ MMX(d).c[7] = SaturatedSignedWordToSignedByte(sd.s[3]);
+ } else {
+ MMX_REG s, t;
+ int d = (modrm >> 3) & 0x7;
uint32_t ea = GetEA(modrm, 0);
READMMX(ea, s);
- MMX(d).c[0]=SaturatedSignedWordToSignedByte(MMX(d).s[0]);
- MMX(d).c[1]=SaturatedSignedWordToSignedByte(MMX(d).s[1]);
- MMX(d).c[2]=SaturatedSignedWordToSignedByte(MMX(d).s[2]);
- MMX(d).c[3]=SaturatedSignedWordToSignedByte(MMX(d).s[3]);
- MMX(d).c[4]=SaturatedSignedWordToSignedByte(s.s[0]);
- MMX(d).c[5]=SaturatedSignedWordToSignedByte(s.s[1]);
- MMX(d).c[6]=SaturatedSignedWordToSignedByte(s.s[2]);
- MMX(d).c[7]=SaturatedSignedWordToSignedByte(s.s[3]);
+ t.q = MMX(d).q;
+ MMX(d).c[0] = SaturatedSignedWordToSignedByte(t.s[0]);
+ MMX(d).c[1] = SaturatedSignedWordToSignedByte(t.s[1]);
+ MMX(d).c[2] = SaturatedSignedWordToSignedByte(t.s[2]);
+ MMX(d).c[3] = SaturatedSignedWordToSignedByte(t.s[3]);
+ MMX(d).c[4] = SaturatedSignedWordToSignedByte(s.s[0]);
+ MMX(d).c[5] = SaturatedSignedWordToSignedByte(s.s[1]);
+ MMX(d).c[6] = SaturatedSignedWordToSignedByte(s.s[2]);
+ MMX(d).c[7] = SaturatedSignedWordToSignedByte(s.s[3]);
}
CYCLES(1); // TODO: correct cycle count
}
@@ -2574,7 +2594,7 @@ void i386_device::mmx_packsswb_r64_rm64() // Opcode 0f 63
void i386_device::mmx_pcmpgtb_r64_rm64() // Opcode 0f 64
{
int c;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2596,7 +2616,7 @@ void i386_device::mmx_pcmpgtb_r64_rm64() // Opcode 0f 64
void i386_device::mmx_pcmpgtw_r64_rm64() // Opcode 0f 65
{
int c;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2618,7 +2638,7 @@ void i386_device::mmx_pcmpgtw_r64_rm64() // Opcode 0f 65
void i386_device::mmx_pcmpgtd_r64_rm64() // Opcode 0f 66
{
int c;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2639,7 +2659,7 @@ void i386_device::mmx_pcmpgtd_r64_rm64() // Opcode 0f 66
void i386_device::mmx_packuswb_r64_rm64() // Opcode 0f 67
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX_REG ds, sd;
@@ -2676,7 +2696,7 @@ void i386_device::mmx_packuswb_r64_rm64() // Opcode 0f 67
void i386_device::mmx_punpckhbw_r64_rm64() // Opcode 0f 68
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2709,7 +2729,7 @@ void i386_device::mmx_punpckhbw_r64_rm64() // Opcode 0f 68
void i386_device::mmx_punpckhwd_r64_rm64() // Opcode 0f 69
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2734,7 +2754,7 @@ void i386_device::mmx_punpckhwd_r64_rm64() // Opcode 0f 69
void i386_device::mmx_punpckhdq_r64_rm64() // Opcode 0f 6a
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2755,7 +2775,7 @@ void i386_device::mmx_punpckhdq_r64_rm64() // Opcode 0f 6a
void i386_device::mmx_packssdw_r64_rm64() // Opcode 0f 6b
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int s,d;
@@ -2808,7 +2828,7 @@ void i386_device::sse_group_0fae() // Opcode 0f ae
WRITE16(ea + 0, m_x87_cw);
WRITE16(ea + 2, m_x87_sw);
for(int i = 0; i < 8; i++)
- if((m_x87_tw & (3 << i)) != 3) atag |= 1 << i;
+ if (((m_x87_tw >> (i * 2)) & 3) != X87_TW_EMPTY) atag |= 1 << i;
WRITE16(ea + 4, atag);
WRITE16(ea + 6, m_x87_opcode);
WRITE32(ea + 8, m_x87_inst_ptr);
@@ -2850,7 +2870,7 @@ void i386_device::sse_group_0fae() // Opcode 0f ae
m_x87_reg[i].high = READ16(ea + i*16 + 40);
if(!(atag & (1 << i)))
tag = X87_TW_EMPTY;
- if(floatx80_is_zero(m_x87_reg[i]))
+ else if(floatx80_is_zero(m_x87_reg[i]))
tag = X87_TW_ZERO;
else if(floatx80_is_inf(m_x87_reg[i]) || floatx80_is_nan(m_x87_reg[i]))
tag = X87_TW_SPECIAL;
@@ -2887,6 +2907,7 @@ void i386_device::sse_group_0fae() // Opcode 0f ae
void i386_device::sse_cvttps2dq_r128_rm128() // Opcode f3 0f 5b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM(modrm & 0x7).f[1];
@@ -2907,6 +2928,7 @@ void i386_device::sse_cvttps2dq_r128_rm128() // Opcode f3 0f 5b
void i386_device::sse_cvtss2sd_r128_r128m32() // Opcode f3 0f 5a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM(modrm & 0x7).f[0];
} else {
@@ -2922,6 +2944,7 @@ void i386_device::sse_cvttss2si_r32_r128m32() // Opcode f3 0f 2c
{
int32_t src;
uint8_t modrm = FETCH(); // get mordm byte
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) { // if bits 7-6 are 11 the source is a xmm register (low doubleword)
src = (int32_t)XMM(modrm & 0x7).f[0^NATIVE_ENDIAN_VALUE_LE_BE(0,1)];
} else { // otherwise is a memory address
@@ -2938,6 +2961,7 @@ void i386_device::sse_cvtss2si_r32_r128m32() // Opcode f3 0f 2d
{
int32_t src;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
src = (int32_t)XMM(modrm & 0x7).f[0];
} else {
@@ -2953,6 +2977,7 @@ void i386_device::sse_cvtss2si_r32_r128m32() // Opcode f3 0f 2d
void i386_device::sse_cvtsi2ss_r128_rm32() // Opcode f3 0f 2a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (int32_t)LOAD_RM32(modrm);
} else {
@@ -2965,7 +2990,7 @@ void i386_device::sse_cvtsi2ss_r128_rm32() // Opcode f3 0f 2a
void i386_device::sse_cvtpi2ps_r128_rm64() // Opcode 0f 2a
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)MMX(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)MMX(modrm & 0x7).i[1];
@@ -2982,7 +3007,7 @@ void i386_device::sse_cvtpi2ps_r128_rm64() // Opcode 0f 2a
void i386_device::sse_cvttps2pi_r64_r128m64() // Opcode 0f 2c
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
@@ -2999,7 +3024,7 @@ void i386_device::sse_cvttps2pi_r64_r128m64() // Opcode 0f 2c
void i386_device::sse_cvtps2pi_r64_r128m64() // Opcode 0f 2d
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
@@ -3016,6 +3041,7 @@ void i386_device::sse_cvtps2pi_r64_r128m64() // Opcode 0f 2d
void i386_device::sse_cvtps2pd_r128_r128m64() // Opcode 0f 5a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = (double)XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)XMM(modrm & 0x7).f[1];
@@ -3032,6 +3058,7 @@ void i386_device::sse_cvtps2pd_r128_r128m64() // Opcode 0f 5a
void i386_device::sse_cvtdq2ps_r128_rm128() // Opcode 0f 5b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)XMM(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)XMM(modrm & 0x7).i[1];
@@ -3052,6 +3079,7 @@ void i386_device::sse_cvtdq2ps_r128_rm128() // Opcode 0f 5b
void i386_device::sse_cvtdq2pd_r128_r128m64() // Opcode f3 0f e6
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = (double)XMM(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)XMM(modrm & 0x7).i[1];
@@ -3068,6 +3096,7 @@ void i386_device::sse_cvtdq2pd_r128_r128m64() // Opcode f3 0f e6
void i386_device::sse_movss_r128_rm128() // Opcode f3 0f 10
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[0];
} else {
@@ -3080,6 +3109,7 @@ void i386_device::sse_movss_r128_rm128() // Opcode f3 0f 10
void i386_device::sse_movss_rm128_r128() // Opcode f3 0f 11
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).d[0] = XMM((modrm >> 3) & 0x7).d[0];
} else {
@@ -3092,6 +3122,7 @@ void i386_device::sse_movss_rm128_r128() // Opcode f3 0f 11
void i386_device::sse_movsldup_r128_rm128() // Opcode f3 0f 12
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[0];
XMM((modrm >> 3) & 0x7).d[1] = XMM(modrm & 0x7).d[0];
@@ -3112,6 +3143,7 @@ void i386_device::sse_movsldup_r128_rm128() // Opcode f3 0f 12
void i386_device::sse_movshdup_r128_rm128() // Opcode f3 0f 16
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM(modrm & 0x7).d[1];
XMM((modrm >> 3) & 0x7).d[1] = XMM(modrm & 0x7).d[1];
@@ -3132,6 +3164,7 @@ void i386_device::sse_movshdup_r128_rm128() // Opcode f3 0f 16
void i386_device::sse_movaps_r128_rm128() // Opcode 0f 28
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
@@ -3144,6 +3177,7 @@ void i386_device::sse_movaps_r128_rm128() // Opcode 0f 28
void i386_device::sse_movaps_rm128_r128() // Opcode 0f 29
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
@@ -3156,6 +3190,7 @@ void i386_device::sse_movaps_rm128_r128() // Opcode 0f 29
void i386_device::sse_movups_r128_rm128() // Opcode 0f 10
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
@@ -3168,6 +3203,7 @@ void i386_device::sse_movups_r128_rm128() // Opcode 0f 10
void i386_device::sse_movupd_r128_rm128() // Opcode 66 0f 10
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
@@ -3180,6 +3216,7 @@ void i386_device::sse_movupd_r128_rm128() // Opcode 66 0f 10
void i386_device::sse_movups_rm128_r128() // Opcode 0f 11
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
@@ -3192,6 +3229,7 @@ void i386_device::sse_movups_rm128_r128() // Opcode 0f 11
void i386_device::sse_movupd_rm128_r128() // Opcode 66 0f 11
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
@@ -3204,6 +3242,7 @@ void i386_device::sse_movupd_rm128_r128() // Opcode 66 0f 11
void i386_device::sse_movlps_r128_m64() // Opcode 0f 12
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// MOVHLPS opcode
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[1];
@@ -3219,6 +3258,7 @@ void i386_device::sse_movlps_r128_m64() // Opcode 0f 12
void i386_device::sse_movlpd_r128_m64() // Opcode 66 0f 12
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
CYCLES(1); // TODO: correct cycle count
} else {
@@ -3232,6 +3272,7 @@ void i386_device::sse_movlpd_r128_m64() // Opcode 66 0f 12
void i386_device::sse_movlps_m64_r128() // Opcode 0f 13
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3245,6 +3286,7 @@ void i386_device::sse_movlps_m64_r128() // Opcode 0f 13
void i386_device::sse_movlpd_m64_r128() // Opcode 66 0f 13
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3258,6 +3300,7 @@ void i386_device::sse_movlpd_m64_r128() // Opcode 66 0f 13
void i386_device::sse_movhps_r128_m64() // Opcode 0f 16
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// MOVLHPS opcode
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[0];
@@ -3273,6 +3316,7 @@ void i386_device::sse_movhps_r128_m64() // Opcode 0f 16
void i386_device::sse_movhpd_r128_m64() // Opcode 66 0f 16
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3287,6 +3331,7 @@ void i386_device::sse_movhpd_r128_m64() // Opcode 66 0f 16
void i386_device::sse_movhps_m64_r128() // Opcode 0f 17
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3300,6 +3345,7 @@ void i386_device::sse_movhps_m64_r128() // Opcode 0f 17
void i386_device::sse_movhpd_m64_r128() // Opcode 66 0f 17
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3313,6 +3359,7 @@ void i386_device::sse_movhpd_m64_r128() // Opcode 66 0f 17
void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -3327,6 +3374,7 @@ void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
void i386_device::sse_movmskps_r16_r128() // Opcode 0f 50
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).d[0] >> 31) & 1;
@@ -3341,6 +3389,7 @@ void i386_device::sse_movmskps_r16_r128() // Opcode 0f 50
void i386_device::sse_movmskps_r32_r128() // Opcode 0f 50
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).d[0] >> 31) & 1;
@@ -3355,6 +3404,7 @@ void i386_device::sse_movmskps_r32_r128() // Opcode 0f 50
void i386_device::sse_movmskpd_r32_r128() // Opcode 66 0f 50
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int b;
b=(XMM(modrm & 0x7).q[0] >> 63) & 1;
@@ -3366,8 +3416,8 @@ void i386_device::sse_movmskpd_r32_r128() // Opcode 66 0f 50
void i386_device::sse_movq2dq_r128_r64() // Opcode f3 0f d6
{
- MMXPROLOG();
uint8_t modrm = FETCH();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = MMX(modrm & 7).q;
XMM((modrm >> 3) & 0x7).q[1] = 0;
@@ -3377,8 +3427,8 @@ void i386_device::sse_movq2dq_r128_r64() // Opcode f3 0f d6
void i386_device::sse_movdqu_r128_rm128() // Opcode f3 0f 6f
{
- MMXPROLOG();
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[1];
@@ -3391,8 +3441,8 @@ void i386_device::sse_movdqu_r128_rm128() // Opcode f3 0f 6f
void i386_device::sse_movdqu_rm128_r128() // Opcode f3 0f 7f
{
- MMXPROLOG();
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1];
@@ -3406,6 +3456,7 @@ void i386_device::sse_movdqu_rm128_r128() // Opcode f3 0f 7f
void i386_device::sse_movd_m128_rm32() // Opcode 66 0f 6e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM((modrm >> 3) & 0x7).d[0] = LOAD_RM32(modrm);
}
@@ -3421,6 +3472,7 @@ void i386_device::sse_movd_m128_rm32() // Opcode 66 0f 6e
void i386_device::sse_movdqa_m128_rm128() // Opcode 66 0f 6f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM(modrm & 0x7).q[1];
@@ -3434,8 +3486,8 @@ void i386_device::sse_movdqa_m128_rm128() // Opcode 66 0f 6f
void i386_device::sse_movq_r128_r128m64() // Opcode f3 0f 7e
{
- MMXPROLOG();
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = 0;
@@ -3450,6 +3502,7 @@ void i386_device::sse_movq_r128_r128m64() // Opcode f3 0f 7e
void i386_device::sse_movd_rm32_r128() // Opcode 66 0f 7e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
STORE_RM32(modrm, XMM((modrm >> 3) & 0x7).d[0]);
}
@@ -3463,6 +3516,7 @@ void i386_device::sse_movd_rm32_r128() // Opcode 66 0f 7e
void i386_device::sse_movdqa_rm128_r128() // Opcode 66 0f 7f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1];
@@ -3476,7 +3530,7 @@ void i386_device::sse_movdqa_rm128_r128() // Opcode 66 0f 7f
void i386_device::sse_pmovmskb_r16_r64() // Opcode 0f d7
{
- //MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
int b;
@@ -3495,8 +3549,8 @@ void i386_device::sse_pmovmskb_r16_r64() // Opcode 0f d7
void i386_device::sse_pmovmskb_r32_r64() // Opcode 0f d7
{
- //MMXPROLOG();
uint8_t modrm = FETCH();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
int b;
b=(MMX(modrm & 0x7).b[0] >> 7) & 1;
@@ -3515,6 +3569,7 @@ void i386_device::sse_pmovmskb_r32_r64() // Opcode 0f d7
void i386_device::sse_pmovmskb_r32_r128() // Opcode 66 0f d7
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
uint32_t b;
b=(XMM(modrm & 0x7).b[0] >> 7) & 1;
@@ -3541,6 +3596,7 @@ void i386_device::sse_pmovmskb_r32_r128() // Opcode 66 0f d7
void i386_device::sse_xorps() // Opcode 0f 57
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).d[0] = XMM((modrm >> 3) & 0x7).d[0] ^ XMM(modrm & 0x7).d[0];
XMM((modrm >> 3) & 0x7).d[1] = XMM((modrm >> 3) & 0x7).d[1] ^ XMM(modrm & 0x7).d[1];
@@ -3561,6 +3617,7 @@ void i386_device::sse_xorps() // Opcode 0f 57
void i386_device::sse_xorpd_r128_rm128() // Opcode 66 0f 57
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 0x7).q[1];
@@ -3577,6 +3634,7 @@ void i386_device::sse_xorpd_r128_rm128() // Opcode 66 0f 57
void i386_device::sse_addps() // Opcode 0f 58
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] + XMM(modrm & 0x7).f[1];
@@ -3597,6 +3655,7 @@ void i386_device::sse_addps() // Opcode 0f 58
void i386_device::sse_sqrtps_r128_rm128() // Opcode 0f 51
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sqrt(XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sqrt(XMM(modrm & 0x7).f[1]);
@@ -3617,6 +3676,7 @@ void i386_device::sse_sqrtps_r128_rm128() // Opcode 0f 51
void i386_device::sse_rsqrtps_r128_rm128() // Opcode 0f 52
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = 1.0 / sqrt(XMM(modrm & 0x7).f[1]);
@@ -3637,6 +3697,7 @@ void i386_device::sse_rsqrtps_r128_rm128() // Opcode 0f 52
void i386_device::sse_rcpps_r128_rm128() // Opcode 0f 53
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = 1.0f / XMM(modrm & 0x7).f[1];
@@ -3657,6 +3718,7 @@ void i386_device::sse_rcpps_r128_rm128() // Opcode 0f 53
void i386_device::sse_andps_r128_rm128() // Opcode 0f 54
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 0x7).q[1];
@@ -3673,6 +3735,7 @@ void i386_device::sse_andps_r128_rm128() // Opcode 0f 54
void i386_device::sse_andpd_r128_rm128() // Opcode 66 0f 54
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 0x7).q[1];
@@ -3689,6 +3752,7 @@ void i386_device::sse_andpd_r128_rm128() // Opcode 66 0f 54
void i386_device::sse_andnps_r128_rm128() // Opcode 0f 55
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 0x7).q[1];
@@ -3705,6 +3769,7 @@ void i386_device::sse_andnps_r128_rm128() // Opcode 0f 55
void i386_device::sse_andnpd_r128_rm128() // Opcode 66 0f 55
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = ~(XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = ~(XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 0x7).q[1];
@@ -3721,6 +3786,7 @@ void i386_device::sse_andnpd_r128_rm128() // Opcode 66 0f 55
void i386_device::sse_orps_r128_rm128() // Opcode 0f 56
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 0x7).q[1];
@@ -3737,6 +3803,7 @@ void i386_device::sse_orps_r128_rm128() // Opcode 0f 56
void i386_device::sse_orpd_r128_rm128() // Opcode 66 0f 56
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 0x7).q[1];
@@ -3753,6 +3820,7 @@ void i386_device::sse_orpd_r128_rm128() // Opcode 66 0f 56
void i386_device::sse_mulps() // Opcode 0f 59 ????
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] * XMM(modrm & 0x7).f[1];
@@ -3773,6 +3841,7 @@ void i386_device::sse_mulps() // Opcode 0f 59 ????
void i386_device::sse_subps() // Opcode 0f 5c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] - XMM(modrm & 0x7).f[1];
@@ -3819,6 +3888,7 @@ static inline double sse_min_double(double src1, double src2)
void i386_device::sse_minps() // Opcode 0f 5d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_min_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_min_single(XMM((modrm >> 3) & 0x7).f[1], XMM(modrm & 0x7).f[1]);
@@ -3839,6 +3909,7 @@ void i386_device::sse_minps() // Opcode 0f 5d
void i386_device::sse_divps() // Opcode 0f 5e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1] = XMM((modrm >> 3) & 0x7).f[1] / XMM(modrm & 0x7).f[1];
@@ -3885,6 +3956,7 @@ static inline double sse_max_double(double src1, double src2)
void i386_device::sse_maxps() // Opcode 0f 5f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
XMM((modrm >> 3) & 0x7).f[1] = sse_max_single(XMM((modrm >> 3) & 0x7).f[1], XMM(modrm & 0x7).f[1]);
@@ -3905,6 +3977,7 @@ void i386_device::sse_maxps() // Opcode 0f 5f
void i386_device::sse_maxss_r128_r128m32() // Opcode f3 0f 5f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sse_max_single(XMM((modrm >> 3) & 0x7).f[0], XMM(modrm & 0x7).f[0]);
} else {
@@ -3919,6 +3992,7 @@ void i386_device::sse_maxss_r128_r128m32() // Opcode f3 0f 5f
void i386_device::sse_addss() // Opcode f3 0f 58
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] + XMM(modrm & 0x7).f[0];
} else {
@@ -3933,6 +4007,7 @@ void i386_device::sse_addss() // Opcode f3 0f 58
void i386_device::sse_subss() // Opcode f3 0f 5c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
} else {
@@ -3947,6 +4022,7 @@ void i386_device::sse_subss() // Opcode f3 0f 5c
void i386_device::sse_mulss() // Opcode f3 0f 5e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] * XMM(modrm & 0x7).f[0];
} else {
@@ -3961,6 +4037,7 @@ void i386_device::sse_mulss() // Opcode f3 0f 5e
void i386_device::sse_divss() // Opcode 0f 59
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] / XMM(modrm & 0x7).f[0];
} else {
@@ -3975,6 +4052,7 @@ void i386_device::sse_divss() // Opcode 0f 59
void i386_device::sse_rcpss_r128_r128m32() // Opcode f3 0f 53
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0f / XMM(modrm & 0x7).f[0];
} else {
@@ -3989,6 +4067,7 @@ void i386_device::sse_rcpss_r128_r128m32() // Opcode f3 0f 53
void i386_device::sse_sqrtss_r128_r128m32() // Opcode f3 0f 51
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = sqrt(XMM(modrm & 0x7).f[0]);
} else {
@@ -4003,6 +4082,7 @@ void i386_device::sse_sqrtss_r128_r128m32() // Opcode f3 0f 51
void i386_device::sse_rsqrtss_r128_r128m32() // Opcode f3 0f 52
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = 1.0 / sqrt(XMM(modrm & 0x7).f[0]);
} else {
@@ -4017,6 +4097,7 @@ void i386_device::sse_rsqrtss_r128_r128m32() // Opcode f3 0f 52
void i386_device::sse_minss_r128_r128m32() // Opcode f3 0f 5d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM((modrm >> 3) & 0x7).f[0] < XMM(modrm & 0x7).f[0] ? XMM((modrm >> 3) & 0x7).f[0] : XMM(modrm & 0x7).f[0];
} else {
@@ -4032,6 +4113,7 @@ void i386_device::sse_comiss_r128_r128m32() // Opcode 0f 2f
{
float32 a,b;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).d[0];
b = XMM(modrm & 0x7).d[0];
@@ -4069,6 +4151,7 @@ void i386_device::sse_comisd_r128_r128m64() // Opcode 66 0f 2f
{
float64 a,b;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).q[0];
b = XMM(modrm & 0x7).q[0];
@@ -4106,6 +4189,7 @@ void i386_device::sse_ucomiss_r128_r128m32() // Opcode 0f 2e
{
float32 a,b;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).d[0];
b = XMM(modrm & 0x7).d[0];
@@ -4143,6 +4227,7 @@ void i386_device::sse_ucomisd_r128_r128m64() // Opcode 66 0f 2e
{
float64 a,b;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
a = XMM((modrm >> 3) & 0x7).q[0];
b = XMM(modrm & 0x7).q[0];
@@ -4180,6 +4265,7 @@ void i386_device::sse_shufps() // Opcode 0f c6
{
uint8_t modrm = FETCH();
uint8_t sel = FETCH();
+ if(SSEPROLOG()) return;
int m1,m2,m3,m4;
int s,d;
m1=sel & 3;
@@ -4217,6 +4303,7 @@ void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
{
uint8_t modrm = FETCH();
uint8_t sel = FETCH();
+ if(SSEPROLOG()) return;
int m1,m2;
int s,d;
m1=sel & 1;
@@ -4244,6 +4331,7 @@ void i386_device::sse_shufpd_r128_rm128_i8() // Opcode 66 0f c6
void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
int s,d;
uint32_t t1, t2, t3, t4;
s=modrm & 0x7;
@@ -4272,6 +4360,7 @@ void i386_device::sse_unpcklps_r128_rm128() // Opcode 0f 14
void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -4291,6 +4380,7 @@ void i386_device::sse_unpcklpd_r128_rm128() // Opcode 66 0f 14
void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
int s,d;
uint32_t t1, t2, t3, t4;
s=modrm & 0x7;
@@ -4321,6 +4411,7 @@ void i386_device::sse_unpckhps_r128_rm128() // Opcode 0f 15
void i386_device::sse_unpckhpd_r128_rm128() // Opcode 66 0f 15
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
int s,d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
@@ -4520,6 +4611,7 @@ void i386_device::sse_predicate_compare_double_scalar(uint8_t imm8, XMM_REG d, X
void i386_device::sse_cmpps_r128_rm128_i8() // Opcode 0f c2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
uint8_t imm8 = FETCH();
@@ -4541,6 +4633,7 @@ void i386_device::sse_cmpps_r128_rm128_i8() // Opcode 0f c2
void i386_device::sse_cmppd_r128_rm128_i8() // Opcode 66 0f c2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
uint8_t imm8 = FETCH();
@@ -4562,6 +4655,7 @@ void i386_device::sse_cmppd_r128_rm128_i8() // Opcode 66 0f c2
void i386_device::sse_cmpss_r128_r128m32_i8() // Opcode f3 0f c2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
uint8_t imm8 = FETCH();
@@ -4582,30 +4676,37 @@ void i386_device::sse_cmpss_r128_r128m32_i8() // Opcode f3 0f c2
void i386_device::sse_pinsrw_r64_r16m16_i8() // Opcode 0f c4, 16bit register
{
- MMXPROLOG();
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
uint8_t imm8 = FETCH();
uint16_t v = LOAD_RM16(modrm);
- if (m_xmm_operand_size)
+ if (m_xmm_operand_size) {
+ if(SSEPROLOG()) return;
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
- else
+ }
+ else {
+ if(MMXPROLOG()) return;
MMX((modrm >> 3) & 0x7).w[imm8 & 3] = v;
+ }
} else {
uint32_t ea = GetEA(modrm, 0);
uint8_t imm8 = FETCH();
uint16_t v = READ16(ea);
- if (m_xmm_operand_size)
+ if (m_xmm_operand_size) {
+ if(SSEPROLOG()) return;
XMM((modrm >> 3) & 0x7).w[imm8 & 7] = v;
- else
+ }
+ else {
+ if(MMXPROLOG()) return;
MMX((modrm >> 3) & 0x7).w[imm8 & 3] = v;
+ }
}
CYCLES(1); // TODO: correct cycle count
}
void i386_device::sse_pinsrw_r64_r32m16_i8() // Opcode 0f c4, 32bit register
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
uint8_t imm8 = FETCH();
@@ -4623,6 +4724,7 @@ void i386_device::sse_pinsrw_r64_r32m16_i8() // Opcode 0f c4, 32bit register
void i386_device::sse_pinsrw_r128_r32m16_i8() // Opcode 66 0f c4
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
uint8_t imm8 = FETCH();
uint16_t v = (uint16_t)LOAD_RM32(modrm);
@@ -4639,16 +4741,18 @@ void i386_device::sse_pinsrw_r128_r32m16_i8() // Opcode 66 0f c4
void i386_device::sse_pextrw_r16_r64_i8() // Opcode 0f c5
{
- //MMXPROLOG();
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
uint8_t imm8 = FETCH();
- if (m_xmm_operand_size)
+ if (m_xmm_operand_size) {
+ if(SSEPROLOG()) return;
STORE_REG16(modrm, XMM(modrm & 0x7).w[imm8 & 7]);
- else
+ }
+ else {
+ if(MMXPROLOG()) return;
STORE_REG16(modrm, MMX(modrm & 0x7).w[imm8 & 3]);
+ }
} else {
- //uint8_t imm8 = FETCH();
report_invalid_modrm("pextrw_r16_r64_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4656,13 +4760,12 @@ void i386_device::sse_pextrw_r16_r64_i8() // Opcode 0f c5
void i386_device::sse_pextrw_r32_r64_i8() // Opcode 0f c5
{
- //MMXPROLOG();
uint8_t modrm = FETCH();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
uint8_t imm8 = FETCH();
STORE_REG32(modrm, MMX(modrm & 0x7).w[imm8 & 3]);
} else {
- //uint8_t imm8 = FETCH();
report_invalid_modrm("pextrw_r32_r64_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4671,12 +4774,12 @@ void i386_device::sse_pextrw_r32_r64_i8() // Opcode 0f c5
void i386_device::sse_pextrw_reg_r128_i8() // Opcode 66 0f c5
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
uint8_t imm8 = FETCH();
STORE_REG32(modrm, XMM(modrm & 0x7).w[imm8 & 7]);
}
else {
- //uint8_t imm8 = FETCH();
report_invalid_modrm("sse_pextrw_reg_r128_i8", modrm);
}
CYCLES(1); // TODO: correct cycle count
@@ -4685,7 +4788,7 @@ void i386_device::sse_pextrw_reg_r128_i8() // Opcode 66 0f c5
void i386_device::sse_pminub_r64_rm64() // Opcode 0f da
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -4703,6 +4806,7 @@ void i386_device::sse_pminub_r64_rm64() // Opcode 0f da
void i386_device::sse_pminub_r128_rm128() // Opcode 66 0f da
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
@@ -4719,7 +4823,7 @@ void i386_device::sse_pminub_r128_rm128() // Opcode 66 0f da
void i386_device::sse_pmaxub_r64_rm64() // Opcode 0f de
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -4737,7 +4841,7 @@ void i386_device::sse_pmaxub_r64_rm64() // Opcode 0f de
void i386_device::sse_pavgb_r64_rm64() // Opcode 0f e0
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 8;n++)
@@ -4755,7 +4859,7 @@ void i386_device::sse_pavgb_r64_rm64() // Opcode 0f e0
void i386_device::sse_pavgw_r64_rm64() // Opcode 0f e3
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -4772,7 +4876,7 @@ void i386_device::sse_pavgw_r64_rm64() // Opcode 0f e3
void i386_device::sse_pmulhuw_r64_rm64() // Opcode 0f e4
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).w[0]=((uint32_t)MMX((modrm >> 3) & 0x7).w[0]*(uint32_t)MMX(modrm & 7).w[0]) >> 16;
@@ -4794,7 +4898,7 @@ void i386_device::sse_pmulhuw_r64_rm64() // Opcode 0f e4
void i386_device::sse_pminsw_r64_rm64() // Opcode 0f ea
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -4812,7 +4916,7 @@ void i386_device::sse_pminsw_r64_rm64() // Opcode 0f ea
void i386_device::sse_pmaxsw_r64_rm64() // Opcode 0f ee
{
int n;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
for (n=0;n < 4;n++)
@@ -4829,7 +4933,7 @@ void i386_device::sse_pmaxsw_r64_rm64() // Opcode 0f ee
void i386_device::sse_pmuludq_r64_rm64() // Opcode 0f f4
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q = (uint64_t)MMX((modrm >> 3) & 0x7).d[0] * (uint64_t)MMX(modrm & 0x7).d[0];
@@ -4845,6 +4949,7 @@ void i386_device::sse_pmuludq_r64_rm64() // Opcode 0f f4
void i386_device::sse_pmuludq_r128_rm128() // Opcode 66 0f f4
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = (uint64_t)XMM((modrm >> 3) & 0x7).d[0] * (uint64_t)XMM(modrm & 0x7).d[0];
XMM((modrm >> 3) & 0x7).q[1] = (uint64_t)XMM((modrm >> 3) & 0x7).d[2] * (uint64_t)XMM(modrm & 0x7).d[2];
@@ -4862,7 +4967,7 @@ void i386_device::sse_psadbw_r64_rm64() // Opcode 0f f6
{
int n;
int32_t temp;
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
temp=0;
@@ -4883,7 +4988,7 @@ void i386_device::sse_psadbw_r64_rm64() // Opcode 0f f6
void i386_device::sse_psubq_r64_rm64() // Opcode 0f fb
{
- MMXPROLOG();
+ if(MMXPROLOG()) return;
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q=MMX((modrm >> 3) & 0x7).q - MMX(modrm & 7).q;
@@ -4899,6 +5004,7 @@ void i386_device::sse_psubq_r64_rm64() // Opcode 0f fb
void i386_device::sse_psubq_r128_rm128() // Opcode 66 0f fb
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] - XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] - XMM(modrm & 7).q[1];
@@ -4915,6 +5021,7 @@ void i386_device::sse_psubq_r128_rm128() // Opcode 66 0f fb
void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -4944,6 +5051,7 @@ void i386_device::sse_pshufd_r128_rm128_i8() // Opcode 66 0f 70
void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -4974,6 +5082,7 @@ void i386_device::sse_pshuflw_r128_rm128_i8() // Opcode f2 0f 70
void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5004,6 +5113,7 @@ void i386_device::sse_pshufhw_r128_rm128_i8() // Opcode f3 0f 70
void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG t;
int s, d;
@@ -5032,6 +5142,7 @@ void i386_device::sse_packsswb_r128_rm128() // Opcode 66 0f 63
void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if (modrm >= 0xc0) {
XMM_REG t;
int s, d;
@@ -5068,6 +5179,7 @@ void i386_device::sse_packssdw_r128_rm128() // Opcode 66 0f 6b
void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5088,6 +5200,7 @@ void i386_device::sse_pcmpgtb_r128_rm128() // Opcode 66 0f 64
void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5108,6 +5221,7 @@ void i386_device::sse_pcmpgtw_r128_rm128() // Opcode 66 0f 65
void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5128,6 +5242,7 @@ void i386_device::sse_pcmpgtd_r128_rm128() // Opcode 66 0f 66
void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5155,6 +5270,7 @@ void i386_device::sse_packuswb_r128_rm128() // Opcode 66 0f 67
void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5181,6 +5297,7 @@ void i386_device::sse_punpckhbw_r128_rm128() // Opcode 66 0f 68
void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5207,6 +5324,7 @@ void i386_device::sse_punpckhwd_r128_rm128() // Opcode 66 0f 69
void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5233,6 +5351,7 @@ void i386_device::sse_unpckhdq_r128_rm128() // Opcode 66 0f 6a
void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM_REG t;
int s,d;
@@ -5255,6 +5374,7 @@ void i386_device::sse_punpckhqdq_r128_rm128() // Opcode 66 0f 6d
void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5275,6 +5395,7 @@ void i386_device::sse_pcmpeqb_r128_rm128() // Opcode 66 0f 74
void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5295,6 +5416,7 @@ void i386_device::sse_pcmpeqw_r128_rm128() // Opcode 66 0f 75
void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5315,6 +5437,7 @@ void i386_device::sse_pcmpeqd_r128_rm128() // Opcode 66 0f 76
void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5335,6 +5458,7 @@ void i386_device::sse_paddq_r128_rm128() // Opcode 66 0f d4
void i386_device::sse_pmullw_r128_rm128() // Opcode 66 0f d5
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
s=modrm & 0x7;
@@ -5356,6 +5480,7 @@ void i386_device::sse_pmullw_r128_rm128() // Opcode 66 0f d5
void i386_device::sse_paddb_r128_rm128() // Opcode 66 0f fc
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] + XMM(modrm & 7).b[n];
@@ -5372,6 +5497,7 @@ void i386_device::sse_paddb_r128_rm128() // Opcode 66 0f fc
void i386_device::sse_paddw_r128_rm128() // Opcode 66 0f fd
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] + XMM(modrm & 7).w[n];
@@ -5388,6 +5514,7 @@ void i386_device::sse_paddw_r128_rm128() // Opcode 66 0f fd
void i386_device::sse_paddd_r128_rm128() // Opcode 66 0f fe
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] + XMM(modrm & 7).d[n];
@@ -5404,6 +5531,7 @@ void i386_device::sse_paddd_r128_rm128() // Opcode 66 0f fe
void i386_device::sse_psubusb_r128_rm128() // Opcode 66 0f d8
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] < XMM(modrm & 7).b[n] ? 0 : XMM((modrm >> 3) & 0x7).b[n]-XMM(modrm & 7).b[n];
@@ -5420,6 +5548,7 @@ void i386_device::sse_psubusb_r128_rm128() // Opcode 66 0f d8
void i386_device::sse_psubusw_r128_rm128() // Opcode 66 0f d9
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] < XMM(modrm & 7).w[n] ? 0 : XMM((modrm >> 3) & 0x7).w[n]-XMM(modrm & 7).w[n];
@@ -5436,6 +5565,7 @@ void i386_device::sse_psubusw_r128_rm128() // Opcode 66 0f d9
void i386_device::sse_pand_r128_rm128() // Opcode 66 0f db
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] & XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] & XMM(modrm & 7).q[1];
@@ -5452,6 +5582,7 @@ void i386_device::sse_pand_r128_rm128() // Opcode 66 0f db
void i386_device::sse_pandn_r128_rm128() // Opcode 66 0f df
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=(~XMM((modrm >> 3) & 0x7).q[0]) & XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=(~XMM((modrm >> 3) & 0x7).q[1]) & XMM(modrm & 7).q[1];
@@ -5468,6 +5599,7 @@ void i386_device::sse_pandn_r128_rm128() // Opcode 66 0f df
void i386_device::sse_paddusb_r128_rm128() // Opcode 66 0f dc
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] > (0xff-XMM(modrm & 7).b[n]) ? 0xff : XMM((modrm >> 3) & 0x7).b[n]+XMM(modrm & 7).b[n];
@@ -5484,6 +5616,7 @@ void i386_device::sse_paddusb_r128_rm128() // Opcode 66 0f dc
void i386_device::sse_paddusw_r128_rm128() // Opcode 66 0f dd
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] > (0xffff-XMM(modrm & 7).w[n]) ? 0xffff : XMM((modrm >> 3) & 0x7).w[n]+XMM(modrm & 7).w[n];
@@ -5500,6 +5633,7 @@ void i386_device::sse_paddusw_r128_rm128() // Opcode 66 0f dd
void i386_device::sse_pmaxub_r128_rm128() // Opcode 66 0f de
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = XMM((modrm >> 3) & 0x7).b[n] > XMM(modrm & 0x7).b[n] ? XMM((modrm >> 3) & 0x7).b[n] : XMM(modrm & 0x7).b[n];
@@ -5516,6 +5650,7 @@ void i386_device::sse_pmaxub_r128_rm128() // Opcode 66 0f de
void i386_device::sse_pmulhuw_r128_rm128() // Opcode 66 0f e4
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=((uint32_t)XMM((modrm >> 3) & 0x7).w[n]*(uint32_t)XMM(modrm & 7).w[n]) >> 16;
@@ -5532,6 +5667,7 @@ void i386_device::sse_pmulhuw_r128_rm128() // Opcode 66 0f e4
void i386_device::sse_pmulhw_r128_rm128() // Opcode 66 0f e5
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=(uint32_t)((int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n]) >> 16;
@@ -5548,6 +5684,7 @@ void i386_device::sse_pmulhw_r128_rm128() // Opcode 66 0f e5
void i386_device::sse_psubsb_r128_rm128() // Opcode 66 0f e8
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] - (int16_t)XMM(modrm & 7).c[n]);
@@ -5564,6 +5701,7 @@ void i386_device::sse_psubsb_r128_rm128() // Opcode 66 0f e8
void i386_device::sse_psubsw_r128_rm128() // Opcode 66 0f e9
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] - (int32_t)XMM(modrm & 7).s[n]);
@@ -5580,6 +5718,7 @@ void i386_device::sse_psubsw_r128_rm128() // Opcode 66 0f e9
void i386_device::sse_pminsw_r128_rm128() // Opcode 66 0f ea
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] < XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
@@ -5596,6 +5735,7 @@ void i386_device::sse_pminsw_r128_rm128() // Opcode 66 0f ea
void i386_device::sse_pmaxsw_r128_rm128() // Opcode 66 0f ee
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n] = XMM((modrm >> 3) & 0x7).s[n] > XMM(modrm & 0x7).s[n] ? XMM((modrm >> 3) & 0x7).s[n] : XMM(modrm & 0x7).s[n];
@@ -5612,6 +5752,7 @@ void i386_device::sse_pmaxsw_r128_rm128() // Opcode 66 0f ee
void i386_device::sse_paddsb_r128_rm128() // Opcode 66 0f ec
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).c[n]=SaturatedSignedWordToSignedByte((int16_t)XMM((modrm >> 3) & 0x7).c[n] + (int16_t)XMM(modrm & 7).c[n]);
@@ -5628,6 +5769,7 @@ void i386_device::sse_paddsb_r128_rm128() // Opcode 66 0f ec
void i386_device::sse_paddsw_r128_rm128() // Opcode 66 0f ed
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).s[n]=SaturatedSignedDwordToSignedWord((int32_t)XMM((modrm >> 3) & 0x7).s[n] + (int32_t)XMM(modrm & 7).s[n]);
@@ -5644,6 +5786,7 @@ void i386_device::sse_paddsw_r128_rm128() // Opcode 66 0f ed
void i386_device::sse_por_r128_rm128() // Opcode 66 0f eb
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] | XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] | XMM(modrm & 7).q[1];
@@ -5660,6 +5803,7 @@ void i386_device::sse_por_r128_rm128() // Opcode 66 0f eb
void i386_device::sse_pxor_r128_rm128() // Opcode 66 0f ef
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] ^ XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[1]=XMM((modrm >> 3) & 0x7).q[1] ^ XMM(modrm & 7).q[1];
@@ -5676,17 +5820,20 @@ void i386_device::sse_pxor_r128_rm128() // Opcode 66 0f ef
void i386_device::sse_pmaddwd_r128_rm128() // Opcode 66 0f f5
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
+ int s, d;
+ s=modrm & 0x7;
+ d=(modrm >> 3) & 0x7;
for (int n=0;n < 4;n++)
- XMM((modrm >> 3) & 0x7).i[n]=(int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n]+
- (int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)XMM(modrm & 7).s[n];
+ XMM(d).i[n]=(int32_t)XMM(d).s[n << 1]*(int32_t)XMM(s).s[n << 1]+(int32_t)XMM(d).s[(n << 1) + 1]*(int32_t)XMM(s).s[(n << 1) + 1];
} else {
+ int d = (modrm >> 3) & 0x7;
XMM_REG s;
uint32_t ea = GetEA(modrm, 0);
READXMM(ea, s);
for (int n=0;n < 4;n++)
- XMM((modrm >> 3) & 0x7).i[n]=(int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)s.s[n]+
- (int32_t)XMM((modrm >> 3) & 0x7).s[n]*(int32_t)s.s[n];
+ XMM(d).i[n]=(int32_t)XMM(d).s[n << 1]*(int32_t)s.s[n << 1]+(int32_t)XMM(d).s[(n << 1) + 1]*(int32_t)s.s[(n << 1) + 1];
}
CYCLES(1); // TODO: correct cycle count
}
@@ -5694,6 +5841,7 @@ void i386_device::sse_pmaddwd_r128_rm128() // Opcode 66 0f f5
void i386_device::sse_psubb_r128_rm128() // Opcode 66 0f f8
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n]=XMM((modrm >> 3) & 0x7).b[n] - XMM(modrm & 7).b[n];
@@ -5710,6 +5858,7 @@ void i386_device::sse_psubb_r128_rm128() // Opcode 66 0f f8
void i386_device::sse_psubw_r128_rm128() // Opcode 66 0f f9
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n]=XMM((modrm >> 3) & 0x7).w[n] - XMM(modrm & 7).w[n];
@@ -5726,6 +5875,7 @@ void i386_device::sse_psubw_r128_rm128() // Opcode 66 0f f9
void i386_device::sse_psubd_r128_rm128() // Opcode 66 0f fa
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 4;n++)
XMM((modrm >> 3) & 0x7).d[n]=XMM((modrm >> 3) & 0x7).d[n] - XMM(modrm & 7).d[n];
@@ -5743,6 +5893,7 @@ void i386_device::sse_psadbw_r128_rm128() // Opcode 66 0f f6
{
int32_t temp;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
temp=0;
for (int n=0;n < 8;n++)
@@ -5771,6 +5922,7 @@ void i386_device::sse_psadbw_r128_rm128() // Opcode 66 0f f6
void i386_device::sse_pavgb_r128_rm128() // Opcode 66 0f e0
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 16;n++)
XMM((modrm >> 3) & 0x7).b[n] = ((uint16_t)XMM((modrm >> 3) & 0x7).b[n] + (uint16_t)XMM(modrm & 0x7).b[n] + 1) >> 1;
@@ -5787,6 +5939,7 @@ void i386_device::sse_pavgb_r128_rm128() // Opcode 66 0f e0
void i386_device::sse_pavgw_r128_rm128() // Opcode 66 0f e3
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
for (int n=0;n < 8;n++)
XMM((modrm >> 3) & 0x7).w[n] = ((uint32_t)XMM((modrm >> 3) & 0x7).w[n] + (uint32_t)XMM(modrm & 0x7).w[n] + 1) >> 1;
@@ -5803,6 +5956,7 @@ void i386_device::sse_pavgw_r128_rm128() // Opcode 66 0f e3
void i386_device::sse_psrlw_r128_rm128() // Opcode 66 0f d1
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
@@ -5821,6 +5975,7 @@ void i386_device::sse_psrlw_r128_rm128() // Opcode 66 0f d1
void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] >> count;
@@ -5843,6 +5998,7 @@ void i386_device::sse_psrld_r128_rm128() // Opcode 66 0f d2
void i386_device::sse_psrlq_r128_rm128() // Opcode 66 0f d3
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] >> count;
@@ -5861,6 +6017,7 @@ void i386_device::sse_psrlq_r128_rm128() // Opcode 66 0f d3
void i386_device::sse_psllw_r128_rm128() // Opcode 66 0f f1
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
@@ -5879,6 +6036,7 @@ void i386_device::sse_psllw_r128_rm128() // Opcode 66 0f f1
void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).d[0]=XMM((modrm >> 3) & 0x7).d[0] << count;
@@ -5901,6 +6059,7 @@ void i386_device::sse_pslld_r128_rm128() // Opcode 66 0f f2
void i386_device::sse_psllq_r128_rm128() // Opcode 66 0f f3
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0] << count;
@@ -5919,6 +6078,7 @@ void i386_device::sse_psllq_r128_rm128() // Opcode 66 0f f3
void i386_device::sse_psraw_r128_rm128() // Opcode 66 0f e1
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
for (int n=0; n < 8;n++)
@@ -5937,6 +6097,7 @@ void i386_device::sse_psraw_r128_rm128() // Opcode 66 0f e1
void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int count=(int)XMM(modrm & 7).q[0];
XMM((modrm >> 3) & 0x7).i[0]=XMM((modrm >> 3) & 0x7).i[0] >> count;
@@ -5959,6 +6120,7 @@ void i386_device::sse_psrad_r128_rm128() // Opcode 66 0f e2
void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
} else {
@@ -5972,6 +6134,7 @@ void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
void i386_device::sse_cvttpd2dq_r128_rm128() // Opcode 66 0f e6
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM((modrm >> 3) & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM((modrm >> 3) & 0x7).f64[1];
@@ -5990,6 +6153,7 @@ void i386_device::sse_cvttpd2dq_r128_rm128() // Opcode 66 0f e6
void i386_device::sse_movq_r128m64_r128() // Opcode 66 0f d6
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0]=XMM((modrm >> 3) & 0x7).q[0];
XMM(modrm & 0x7).q[1] = 0;
@@ -6003,6 +6167,7 @@ void i386_device::sse_movq_r128m64_r128() // Opcode 66 0f d6
void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6024,12 +6189,16 @@ void i386_device::sse_addsubpd_r128_rm128() // Opcode 66 0f d0
void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
+ XMM_REG t;
int s, d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
- XMM(d).f64[0]=XMM(d).f64[0]+XMM(d).f64[1];
- XMM(d).f64[1]=XMM(s).f64[0]+XMM(s).f64[1];
+ t.f64[0]=XMM(d).f64[0]+XMM(d).f64[1];
+ t.f64[1]=XMM(s).f64[0]+XMM(s).f64[1];
+ XMM(d).f64[0]=t.f64[0];
+ XMM(d).f64[1]=t.f64[1];
} else {
XMM_REG src;
int d;
@@ -6045,12 +6214,16 @@ void i386_device::sse_haddpd_r128_rm128() // Opcode 66 0f 7c
void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
+ XMM_REG t;
int s, d;
s=modrm & 0x7;
d=(modrm >> 3) & 0x7;
- XMM(d).f64[0]=XMM(d).f64[0]-XMM(d).f64[1];
- XMM(d).f64[1]=XMM(s).f64[0]-XMM(s).f64[1];
+ t.f64[0]=XMM(d).f64[0]-XMM(d).f64[1];
+ t.f64[1]=XMM(s).f64[0]-XMM(s).f64[1];
+ XMM(d).f64[0]=t.f64[0];
+ XMM(d).f64[1]=t.f64[1];
} else {
XMM_REG src;
int d;
@@ -6066,6 +6239,7 @@ void i386_device::sse_hsubpd_r128_rm128() // Opcode 66 0f 7d
void i386_device::sse_sqrtpd_r128_rm128() // Opcode 66 0f 51
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6088,11 +6262,12 @@ void i386_device::sse_cvtpi2pd_r128_rm64() // Opcode 66 0f 2a
{
uint8_t modrm = FETCH();
if( modrm >= 0xc0 ) {
- MMXPROLOG();
+ if(MMXPROLOG()) return; // only when using mmx register operands
XMM((modrm >> 3) & 0x7).f64[0] = (double)MMX(modrm & 0x7).i[0];
XMM((modrm >> 3) & 0x7).f64[1] = (double)MMX(modrm & 0x7).i[1];
} else {
MMX_REG r;
+ if(SSEPROLOG()) return;
uint32_t ea = GetEA(modrm, 0);
READMMX(ea, r);
XMM((modrm >> 3) & 0x7).f64[0] = (double)r.i[0];
@@ -6104,7 +6279,8 @@ void i386_device::sse_cvtpi2pd_r128_rm64() // Opcode 66 0f 2a
void i386_device::sse_cvttpd2pi_r64_rm128() // Opcode 66 0f 2c
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
+ // TODO: manage inexact conversion to integer
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
@@ -6121,7 +6297,8 @@ void i386_device::sse_cvttpd2pi_r64_rm128() // Opcode 66 0f 2c
void i386_device::sse_cvtpd2pi_r64_rm128() // Opcode 66 0f 2d
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
+ // TODO: manage inexact conversion to integer
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f64[0];
MMX((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f64[1];
@@ -6138,6 +6315,7 @@ void i386_device::sse_cvtpd2pi_r64_rm128() // Opcode 66 0f 2d
void i386_device::sse_cvtpd2ps_r128_rm128() // Opcode 66 0f 5a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = (float)XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f[1] = (float)XMM(modrm & 0x7).f64[1];
@@ -6156,6 +6334,7 @@ void i386_device::sse_cvtpd2ps_r128_rm128() // Opcode 66 0f 5a
void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).i[0] = XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).i[1] = XMM(modrm & 0x7).f[1];
@@ -6176,6 +6355,7 @@ void i386_device::sse_cvtps2dq_r128_rm128() // Opcode 66 0f 5b
void i386_device::sse_addpd_r128_rm128() // Opcode 66 0f 58
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] + XMM(modrm & 0x7).f64[1];
@@ -6192,6 +6372,7 @@ void i386_device::sse_addpd_r128_rm128() // Opcode 66 0f 58
void i386_device::sse_mulpd_r128_rm128() // Opcode 66 0f 59
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] * XMM(modrm & 0x7).f64[1];
@@ -6208,6 +6389,7 @@ void i386_device::sse_mulpd_r128_rm128() // Opcode 66 0f 59
void i386_device::sse_subpd_r128_rm128() // Opcode 66 0f 5c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] - XMM(modrm & 0x7).f64[1];
@@ -6224,6 +6406,7 @@ void i386_device::sse_subpd_r128_rm128() // Opcode 66 0f 5c
void i386_device::sse_minpd_r128_rm128() // Opcode 66 0f 5d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
@@ -6240,6 +6423,7 @@ void i386_device::sse_minpd_r128_rm128() // Opcode 66 0f 5d
void i386_device::sse_divpd_r128_rm128() // Opcode 66 0f 5e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).f64[1] = XMM((modrm >> 3) & 0x7).f64[1] / XMM(modrm & 0x7).f64[1];
@@ -6256,6 +6440,7 @@ void i386_device::sse_divpd_r128_rm128() // Opcode 66 0f 5e
void i386_device::sse_maxpd_r128_rm128() // Opcode 66 0f 5f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
XMM((modrm >> 3) & 0x7).f64[1] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[1], XMM(modrm & 0x7).f64[1]);
@@ -6272,6 +6457,7 @@ void i386_device::sse_maxpd_r128_rm128() // Opcode 66 0f 5f
void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
@@ -6286,6 +6472,7 @@ void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
void i386_device::sse_movapd_r128_rm128() // Opcode 66 0f 28
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7) = XMM(modrm & 0x7);
} else {
@@ -6298,6 +6485,7 @@ void i386_device::sse_movapd_r128_rm128() // Opcode 66 0f 28
void i386_device::sse_movapd_rm128_r128() // Opcode 66 0f 29
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7) = XMM((modrm >> 3) & 0x7);
} else {
@@ -6310,6 +6498,7 @@ void i386_device::sse_movapd_rm128_r128() // Opcode 66 0f 29
void i386_device::sse_movsd_r128_r128m64() // Opcode f2 0f 10
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
} else {
@@ -6323,6 +6512,7 @@ void i386_device::sse_movsd_r128_r128m64() // Opcode f2 0f 10
void i386_device::sse_movsd_r128m64_r128() // Opcode f2 0f 11
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM(modrm & 0x7).q[0] = XMM((modrm >> 3) & 0x7).q[0];
} else {
@@ -6335,6 +6525,7 @@ void i386_device::sse_movsd_r128m64_r128() // Opcode f2 0f 11
void i386_device::sse_movddup_r128_r128m64() // Opcode f2 0f 12
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).q[0] = XMM(modrm & 0x7).q[0];
XMM((modrm >> 3) & 0x7).q[1] = XMM((modrm >> 3) & 0x7).q[0];
@@ -6349,6 +6540,7 @@ void i386_device::sse_movddup_r128_r128m64() // Opcode f2 0f 12
void i386_device::sse_cvtsi2sd_r128_rm32() // Opcode f2 0f 2a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = (int32_t)LOAD_RM32(modrm);
} else {
@@ -6362,6 +6554,7 @@ void i386_device::sse_cvttsd2si_r32_r128m64() // Opcode f2 0f 2c
{
int32_t src;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
src = (int32_t)XMM(modrm & 0x7).f64[0];
} else { // otherwise is a memory address
@@ -6378,6 +6571,7 @@ void i386_device::sse_cvtsd2si_r32_r128m64() // Opcode f2 0f 2d
{
int32_t src;
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
src = (int32_t)XMM(modrm & 0x7).f64[0];
} else { // otherwise is a memory address
@@ -6393,6 +6587,7 @@ void i386_device::sse_cvtsd2si_r32_r128m64() // Opcode f2 0f 2d
void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s, d;
s=modrm & 0x7;
@@ -6412,6 +6607,7 @@ void i386_device::sse_sqrtsd_r128_r128m64() // Opcode f2 0f 51
void i386_device::sse_addsd_r128_r128m64() // Opcode f2 0f 58
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] + XMM(modrm & 0x7).f64[0];
} else {
@@ -6426,6 +6622,7 @@ void i386_device::sse_addsd_r128_r128m64() // Opcode f2 0f 58
void i386_device::sse_mulsd_r128_r128m64() // Opcode f2 0f 59
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] * XMM(modrm & 0x7).f64[0];
} else {
@@ -6440,6 +6637,7 @@ void i386_device::sse_mulsd_r128_r128m64() // Opcode f2 0f 59
void i386_device::sse_cvtsd2ss_r128_r128m64() // Opcode f2 0f 5a
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0] = XMM(modrm & 0x7).f64[0];
} else {
@@ -6454,6 +6652,7 @@ void i386_device::sse_cvtsd2ss_r128_r128m64() // Opcode f2 0f 5a
void i386_device::sse_subsd_r128_r128m64() // Opcode f2 0f 5c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] - XMM(modrm & 0x7).f64[0];
} else {
@@ -6468,6 +6667,7 @@ void i386_device::sse_subsd_r128_r128m64() // Opcode f2 0f 5c
void i386_device::sse_minsd_r128_r128m64() // Opcode f2 0f 5d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_min_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
} else {
@@ -6482,6 +6682,7 @@ void i386_device::sse_minsd_r128_r128m64() // Opcode f2 0f 5d
void i386_device::sse_divsd_r128_r128m64() // Opcode f2 0f 5e
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = XMM((modrm >> 3) & 0x7).f64[0] / XMM(modrm & 0x7).f64[0];
} else {
@@ -6496,6 +6697,7 @@ void i386_device::sse_divsd_r128_r128m64() // Opcode f2 0f 5e
void i386_device::sse_maxsd_r128_r128m64() // Opcode f2 0f 5f
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f64[0] = sse_max_double(XMM((modrm >> 3) & 0x7).f64[0], XMM(modrm & 0x7).f64[0]);
} else {
@@ -6510,6 +6712,7 @@ void i386_device::sse_maxsd_r128_r128m64() // Opcode f2 0f 5f
void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s, d;
float f1, f2, f3, f4;
@@ -6543,6 +6746,7 @@ void i386_device::sse_haddps_r128_rm128() // Opcode f2 0f 7c
void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s, d;
float f1, f2, f3, f4;
@@ -6576,6 +6780,7 @@ void i386_device::sse_hsubps_r128_rm128() // Opcode f2 0f 7d
void i386_device::sse_cmpsd_r128_r128m64_i8() // Opcode f2 0f c2
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
int s,d;
uint8_t imm8 = FETCH();
@@ -6597,6 +6802,7 @@ void i386_device::sse_cmpsd_r128_r128m64_i8() // Opcode f2 0f c2
void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).f[0]=XMM((modrm >> 3) & 0x7).f[0] - XMM(modrm & 0x7).f[0];
XMM((modrm >> 3) & 0x7).f[1]=XMM((modrm >> 3) & 0x7).f[1] + XMM(modrm & 0x7).f[1];
@@ -6617,7 +6823,7 @@ void i386_device::sse_addsubps_r128_rm128() // Opcode f2 0f d0
void i386_device::sse_movdq2q_r64_r128() // Opcode f2 0f d6
{
uint8_t modrm = FETCH();
- MMXPROLOG();
+ if(MMXPROLOG()) return;
if( modrm >= 0xc0 ) {
MMX((modrm >> 3) & 0x7).q = XMM(modrm & 0x7).q[0];
CYCLES(1); // TODO: correct cycle count
@@ -6630,6 +6836,7 @@ void i386_device::sse_movdq2q_r64_r128() // Opcode f2 0f d6
void i386_device::sse_cvtpd2dq_r128_rm128() // Opcode f2 0f e6
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
XMM((modrm >> 3) & 0x7).i[0]=(int32_t)XMM((modrm >> 3) & 0x7).f64[0];
XMM((modrm >> 3) & 0x7).i[1]=(int32_t)XMM((modrm >> 3) & 0x7).f64[1];
@@ -6648,6 +6855,7 @@ void i386_device::sse_cvtpd2dq_r128_rm128() // Opcode f2 0f e6
void i386_device::sse_lddqu_r128_m128() // Opcode f2 0f f0
{
uint8_t modrm = FETCH();
+ if(SSEPROLOG()) return;
if( modrm >= 0xc0 ) {
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
diff --git a/src/devices/cpu/i386/x87priv.h b/src/devices/cpu/i386/x87priv.h
index 1d2c227b292..379a929f954 100644
--- a/src/devices/cpu/i386/x87priv.h
+++ b/src/devices/cpu/i386/x87priv.h
@@ -1,9 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:Philip Bennett
-#pragma once
+#ifndef MAME_CPU_I386_X87PRIV_H
+#define MAME_CPU_I386_X87PRIV_H
-#ifndef __X87PRIV_H__
-#define __X87PRIV_H__
+#pragma once
#include <cmath>
@@ -165,4 +165,4 @@ void i386_device::WRITE80(uint32_t ea, floatx80 t)
WRITE16(ea + 8, t.high);
}
-#endif /* __X87PRIV_H__ */
+#endif // MAME_CPU_I386_X87PRIV_H
diff --git a/src/devices/cpu/i8008/i8008.cpp b/src/devices/cpu/i8008/i8008.cpp
index 2c997f30c4f..9e6e92d6863 100644
--- a/src/devices/cpu/i8008/i8008.cpp
+++ b/src/devices/cpu/i8008/i8008.cpp
@@ -261,7 +261,7 @@ void i8008_device::execute_run()
inline void i8008_device::illegal(uint8_t opcode)
{
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
logerror("I8008 illegal instruction %04X $%02X\n", m_PC.w.l, opcode);
}
diff --git a/src/devices/cpu/i8008/i8008.h b/src/devices/cpu/i8008/i8008.h
index 5b7882f7958..2e6701306a4 100644
--- a/src/devices/cpu/i8008/i8008.h
+++ b/src/devices/cpu/i8008/i8008.h
@@ -25,8 +25,8 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
diff --git a/src/devices/cpu/i8085/i8085.cpp b/src/devices/cpu/i8085/i8085.cpp
index e3af6ad8a4d..46920c5870b 100644
--- a/src/devices/cpu/i8085/i8085.cpp
+++ b/src/devices/cpu/i8085/i8085.cpp
@@ -1,11 +1,11 @@
// license:BSD-3-Clause
-// copyright-holders:Juergen Buchmueller, hap
+// copyright-holders:Juergen Buchmueller, Roberto Fresca, Grull Osgo
// thanks-to:Marcel De Kogel
/*****************************************************************************
*
* Portable I8085A emulator V1.3
*
- * Copyright Juergen Buchmueller, all rights reserved.
+ * Copyright Juergen Buchmueller
* Partially based on information out of Z80Em by Marcel De Kogel
*
* TODO:
@@ -105,6 +105,11 @@
* - it passes on 8080/8085 CPU Exerciser (ref: http://www.idb.me.uk/sunhillow/8080.html
* tests only 8080 opcodes, link is dead so go via archive.org)
*
+ * April 2025, Roberto Fresca
+ * - Reworked the DSUB (Double Subtraction) undocumented instruction.
+ * - Reworked the RDEL (Rotate D and E Left with Carry) undocumented instruction.
+ * (ref: https://robertofresca.com/files/New_8085_instruction.pdf)
+ *
*****************************************************************************/
#include "emu.h"
@@ -269,26 +274,18 @@ void i8085a_cpu_device::init_tables()
{
for (int i = 0; i < 256; i++)
{
- /* cycles */
+ // cycles
lut_cycles[i] = is_8085() ? lut_cycles_8085[i] : lut_cycles_8080[i];
- /* flags */
+ // flags
u8 zs = 0;
- if (i==0) zs |= ZF;
- if (i&128) zs |= SF;
-
- u8 p = 0;
- if (i&1) ++p;
- if (i&2) ++p;
- if (i&4) ++p;
- if (i&8) ++p;
- if (i&16) ++p;
- if (i&32) ++p;
- if (i&64) ++p;
- if (i&128) ++p;
+ if (i == 0) zs |= ZF;
+ if (i & 0x80) zs |= SF;
+
+ u8 p = (population_count_32(i) & 1) ? 0 : PF;
lut_zs[i] = zs;
- lut_zsp[i] = zs | ((p&1) ? 0 : PF);
+ lut_zsp[i] = zs | p;
}
}
@@ -307,15 +304,15 @@ void i8085a_cpu_device::device_start()
m_after_ei = 0;
m_nmi_state = 0;
m_irq_state[3] = m_irq_state[2] = m_irq_state[1] = m_irq_state[0] = 0;
- m_trap_pending = 0;
+ m_trap_pending = false;
m_trap_im_copy = 0;
- m_sod_state = true; // SOD will go low at reset
+ m_sod_state = 1; // SOD will go low at reset
m_in_acknowledge = false;
- m_ietemp = false;
+ m_ietemp = 0;
init_tables();
- /* set up the state table */
+ // set up the state table
state_add(I8085_PC, "PC", m_PC.w.l);
state_add(STATE_GENPC, "GENPC", m_PC.w.l).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_PC.w.l).noshow();
@@ -350,7 +347,7 @@ void i8085a_cpu_device::device_start()
space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(m_copcodes);
space(AS_IO).specific(m_io);
- /* register for state saving */
+ // register for state saving
save_item(NAME(m_PC.w.l));
save_item(NAME(m_SP.w.l));
save_item(NAME(m_AF.w.l));
@@ -382,7 +379,7 @@ void i8085a_cpu_device::device_reset()
m_halt = 0;
m_im &= ~IM_I75;
m_im |= IM_M55 | IM_M65 | IM_M75;
- m_after_ei = false;
+ m_after_ei = 0;
m_trap_pending = false;
m_trap_im_copy = 0;
set_inte(0);
@@ -430,11 +427,11 @@ void i8085a_cpu_device::state_export(const device_state_entry &entry)
switch (entry.index())
{
case I8085_SID:
- m_ietemp = ((m_im & IM_SID) != 0) && m_in_sid_func() != 0;
+ m_ietemp = ((m_im & IM_SID) && m_in_sid_func()) ? 1 : 0;
break;
case I8085_INTE:
- m_ietemp = ((m_im & IM_IE) != 0);
+ m_ietemp = (m_im & IM_IE) ? 1 : 0;
break;
default:
@@ -488,7 +485,7 @@ void i8085a_cpu_device::execute_set_input(int irqline, int state)
{
int newstate = (state != CLEAR_LINE);
- /* TRAP is level and edge-triggered NMI */
+ // TRAP is level and edge-triggered NMI
if (irqline == I8085_TRAP_LINE)
{
if (!m_nmi_state && newstate)
@@ -498,7 +495,7 @@ void i8085a_cpu_device::execute_set_input(int irqline, int state)
m_nmi_state = newstate;
}
- /* RST7.5 is edge-triggered */
+ // RST7.5 is edge-triggered
else if (irqline == I8085_RST75_LINE)
{
if (!m_irq_state[I8085_RST75_LINE] && newstate)
@@ -506,105 +503,105 @@ void i8085a_cpu_device::execute_set_input(int irqline, int state)
m_irq_state[I8085_RST75_LINE] = newstate;
}
- /* remaining sources are level triggered */
+ // remaining sources are level triggered
else if (irqline < std::size(m_irq_state))
m_irq_state[irqline] = state;
}
void i8085a_cpu_device::break_halt_for_interrupt()
{
- /* de-halt if necessary */
+ // de-halt if necessary
if (m_halt)
{
m_PC.w.l++;
m_halt = 0;
- set_status(0x26); /* int ack while halt */
+ set_status(0x26); // int ack while halt
}
else
- set_status(0x23); /* int ack */
+ set_status(0x23); // int ack
m_in_acknowledge = true;
}
void i8085a_cpu_device::check_for_interrupts()
{
- /* TRAP is the highest priority */
+ // TRAP is the highest priority
if (m_trap_pending)
{
- /* the first RIM after a TRAP reflects the original IE state; remember it here,
- setting the high bit to indicate it is valid */
+ // the first RIM after a TRAP reflects the original IE state; remember it here,
+ // setting the high bit to indicate it is valid
m_trap_im_copy = m_im | 0x80;
- /* reset the pending state */
+ // reset the pending state
m_trap_pending = false;
- /* break out of HALT state and call the IRQ ack callback */
+ // break out of HALT state and call the IRQ ack callback
break_halt_for_interrupt();
standard_irq_callback(I8085_TRAP_LINE, m_PC.w.l);
- /* push the PC and jump to $0024 */
+ // push the PC and jump to $0024
op_push(m_PC);
set_inte(0);
m_PC.w.l = ADDR_TRAP;
m_icount -= 11;
}
- /* followed by RST7.5 */
+ // followed by RST7.5
else if ((m_im & IM_I75) && !(m_im & IM_M75) && (m_im & IM_IE))
{
- /* reset the pending state (which is CPU-visible via the RIM instruction) */
+ // reset the pending state (which is CPU-visible via the RIM instruction)
m_im &= ~IM_I75;
- /* break out of HALT state and call the IRQ ack callback */
+ // break out of HALT state and call the IRQ ack callback
break_halt_for_interrupt();
standard_irq_callback(I8085_RST75_LINE, m_PC.w.l);
- /* push the PC and jump to $003C */
+ // push the PC and jump to $003C
op_push(m_PC);
set_inte(0);
m_PC.w.l = ADDR_RST75;
m_icount -= 11;
}
- /* followed by RST6.5 */
+ // followed by RST6.5
else if (m_irq_state[I8085_RST65_LINE] && !(m_im & IM_M65) && (m_im & IM_IE))
{
- /* break out of HALT state and call the IRQ ack callback */
+ // break out of HALT state and call the IRQ ack callback
break_halt_for_interrupt();
standard_irq_callback(I8085_RST65_LINE, m_PC.w.l);
- /* push the PC and jump to $0034 */
+ // push the PC and jump to $0034
op_push(m_PC);
set_inte(0);
m_PC.w.l = ADDR_RST65;
m_icount -= 11;
}
- /* followed by RST5.5 */
+ // followed by RST5.5
else if (m_irq_state[I8085_RST55_LINE] && !(m_im & IM_M55) && (m_im & IM_IE))
{
- /* break out of HALT state and call the IRQ ack callback */
+ // break out of HALT state and call the IRQ ack callback
break_halt_for_interrupt();
standard_irq_callback(I8085_RST55_LINE, m_PC.w.l);
- /* push the PC and jump to $002C */
+ // push the PC and jump to $002C
op_push(m_PC);
set_inte(0);
m_PC.w.l = ADDR_RST55;
m_icount -= 11;
}
- /* followed by classic INTR */
+ // followed by classic INTR
else if (m_irq_state[I8085_INTR_LINE] && (m_im & IM_IE))
{
- /* break out of HALT state and call the IRQ ack callback */
+ // break out of HALT state and call the IRQ ack callback
if (!m_in_inta_func.isunset())
standard_irq_callback(I8085_INTR_LINE, m_PC.w.l);
break_halt_for_interrupt();
u8 vector = read_inta();
- /* use the resulting vector as an opcode to execute */
+ // use the resulting vector as an opcode to execute
set_inte(0);
LOG("i8085 take int $%02x\n", vector);
execute_one(vector);
@@ -646,7 +643,7 @@ void i8085a_cpu_device::set_inte(int state)
void i8085a_cpu_device::set_status(u8 status)
{
- if (status != m_status)
+ if (!m_out_status_func.isunset() && status != m_status)
m_out_status_func(status);
m_status = status;
@@ -657,12 +654,12 @@ u8 i8085a_cpu_device::get_rim_value()
u8 result = m_im;
int sid = m_in_sid_func();
- /* copy live RST5.5 and RST6.5 states */
+ // copy live RST5.5 and RST6.5 states
result &= ~(IM_I65 | IM_I55);
if (m_irq_state[I8085_RST65_LINE]) result |= IM_I65;
if (m_irq_state[I8085_RST55_LINE]) result |= IM_I55;
- /* fetch the SID bit if we have a callback */
+ // fetch the SID bit if we have a callback
result = (result & ~IM_SID) | (sid ? IM_SID : 0);
return result;
@@ -870,21 +867,21 @@ void i8085a_cpu_device::op_rst(u8 v)
void i8085a_cpu_device::execute_run()
{
- /* check for TRAPs before diving in (can't do others because of after_ei) */
+ // check for TRAPs before diving in (can't do others because of after_ei)
if (m_trap_pending || m_after_ei == 0)
check_for_interrupts();
do
{
- /* the instruction after an EI does not take an interrupt, so
- we cannot check immediately; handle post-EI behavior here */
+ // the instruction after an EI does not take an interrupt, so
+ // we cannot check immediately; handle post-EI behavior here
if (m_after_ei != 0 && --m_after_ei == 0)
check_for_interrupts();
m_in_acknowledge = false;
debugger_instruction_hook(m_PC.d);
- /* here we go... */
+ // here we go...
execute_one(read_op());
} while (m_icount > 0);
@@ -928,16 +925,31 @@ void i8085a_cpu_device::execute_one(int opcode)
m_AF.b.l = (m_AF.b.l & 0xfe) | (m_AF.b.h & CF);
break;
- case 0x08: // 8085: undocumented DSUB, otherwise undocumented NOP
+ case 0x08: // 8085: undocumented DSUB (Double Subtraction, HL - BC)
if (is_8085())
{
- int q = m_HL.b.l - m_BC.b.l;
- m_AF.b.l = lut_zs[q & 0xff] | ((q >> 8) & CF) | VF | ((m_HL.b.l ^ q ^ m_BC.b.l) & HF) | (((m_BC.b.l ^ m_HL.b.l) & (m_HL.b.l ^ q) & SF) >> 5);
- m_HL.b.l = q;
- q = m_HL.b.h - m_BC.b.h - (m_AF.b.l & CF);
- m_AF.b.l = lut_zs[q & 0xff] | ((q >> 8) & CF) | VF | ((m_HL.b.h ^ q ^ m_BC.b.h) & HF) | (((m_BC.b.h ^ m_HL.b.h) & (m_HL.b.h ^ q) & SF) >> 5);
- if (m_HL.b.l != 0)
- m_AF.b.l &= ~ZF;
+ // Low byte subtraction: L = L - C
+ int q_low = m_HL.b.l - m_BC.b.l;
+ u8 res_low = q_low & 0xff;
+ // Calculate flags for low byte
+ m_AF.b.l = lut_zs[res_low]
+ | ((q_low >> 8) & CF) // Carry
+ | ((m_HL.b.l ^ res_low ^ m_BC.b.l) & HF) // Half Carry
+ | (((m_BC.b.l ^ m_HL.b.l) & (m_HL.b.l ^ res_low) & SF)) >> 5; // Overflow
+ m_HL.b.l = res_low;
+
+ // High byte subtraction: H = H - B - carry_from_low
+ int q_high = m_HL.b.h - m_BC.b.h - (m_AF.b.l & CF);
+ u8 res_high = q_high & 0xff;
+ // Calculate flags for high byte
+ m_AF.b.l = lut_zs[res_high]
+ | ((q_high >> 8) & CF) // Carry
+ | ((m_HL.b.h ^ res_high ^ m_BC.b.h) & HF) // Half Carry
+ | (((m_BC.b.h ^ m_HL.b.h) & (m_HL.b.h ^ res_high) & SF)) >> 5; // Overflow
+ m_HL.b.h = res_high;
+
+ // Set Zero flag based on 16-bit result
+ m_AF.b.l = (m_AF.b.l & ~ZF) | (((m_HL.b.l | m_HL.b.h) == 0) ? ZF : 0);
}
break;
case 0x09: // DAD B
@@ -1010,11 +1022,12 @@ void i8085a_cpu_device::execute_one(int opcode)
break;
}
- case 0x18: // 8085: undocumented RDEL, otherwise undocumented NOP
+ case 0x18: // 8085: undocumented RDEL (Rotate D and E Left through Carry), otherwise undocumented NOP
if (is_8085())
{
- m_AF.b.l = (m_AF.b.l & ~(CF | VF)) | (m_DE.b.h >> 7);
- m_DE.w.l = (m_DE.w.l << 1) | (m_DE.w.l >> 15);
+ int c = m_AF.b.l & CF; // save old carry state
+ m_AF.b.l = (m_AF.b.l & ~(CF | VF)) | (m_DE.b.h >> 7); // set new carry state
+ m_DE.w.l = (m_DE.w.l << 1) | c; // rotate with carry
if ((((m_DE.w.l >> 15) ^ m_AF.b.l) & CF) != 0)
m_AF.b.l |= VF;
}
diff --git a/src/devices/cpu/i8085/i8085.h b/src/devices/cpu/i8085/i8085.h
index 711f6add7ff..1f2a39a0199 100644
--- a/src/devices/cpu/i8085/i8085.h
+++ b/src/devices/cpu/i8085/i8085.h
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Juergen Buchmueller, hap
+// copyright-holders:Juergen Buchmueller
#ifndef MAME_CPU_I8085_I8085_H
#define MAME_CPU_I8085_I8085_H
@@ -66,13 +66,12 @@ protected:
// device-level overrides
virtual void device_config_complete() override;
virtual void device_clock_changed() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 4; }
virtual u32 execute_max_cycles() const noexcept override { return 16; }
- virtual u32 execute_input_lines() const noexcept override { return 4; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == I8085_RST75_LINE; }
virtual void execute_run() override;
@@ -104,29 +103,30 @@ protected:
PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
u8 m_halt;
- u8 m_im; /* interrupt mask (8085A only) */
- u8 m_status; /* status word */
-
- u8 m_after_ei; /* post-EI processing; starts at 2, check for ints at 0 */
- u8 m_nmi_state; /* raw NMI line state */
- u8 m_irq_state[4]; /* raw IRQ line states */
- u8 m_trap_pending; /* TRAP interrupt latched? */
- u8 m_trap_im_copy; /* copy of IM register when TRAP was taken */
- u8 m_sod_state; /* state of the SOD line */
+ u8 m_im; // interrupt mask (8085A only)
+ u8 m_status; // status word
+
+ u8 m_after_ei; // post-EI processing; starts at 2, check for ints at 0
+ u8 m_nmi_state; // raw NMI line state
+ u8 m_irq_state[4]; // raw IRQ line states
+ bool m_trap_pending; // TRAP interrupt latched?
+ u8 m_trap_im_copy; // copy of IM register when TRAP was taken
+ u8 m_sod_state; // state of the SOD line
bool m_in_acknowledge;
- bool m_ietemp; /* import/export temp space */
+ u8 m_ietemp; // import/export temp space
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_cprogram, m_copcodes;
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_program;
memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
int m_icount;
- /* cycles lookup */
+ // cycles lookup
static const u8 lut_cycles_8080[256];
static const u8 lut_cycles_8085[256];
u8 lut_cycles[256];
- /* flags lookup */
+
+ // flags lookup
u8 lut_zs[256];
u8 lut_zsp[256];
@@ -177,7 +177,6 @@ public:
protected:
i8080_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return clocks; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles; }
diff --git a/src/devices/cpu/i8089/i8089.h b/src/devices/cpu/i8089/i8089.h
index abb278625b8..3ebb3bc61af 100644
--- a/src/devices/cpu/i8089/i8089.h
+++ b/src/devices/cpu/i8089/i8089.h
@@ -52,9 +52,9 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual void device_config_complete() override;
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -74,7 +74,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// optional information overrides
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
private:
bool sysbus_width() const { return BIT(m_sysbus, 0); }
diff --git a/src/devices/cpu/i8089/i8089_channel.h b/src/devices/cpu/i8089/i8089_channel.h
index 8d002598b7b..97a1ac36c4f 100644
--- a/src/devices/cpu/i8089/i8089_channel.h
+++ b/src/devices/cpu/i8089/i8089_channel.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_I8080_I8089_CHANNEL_H
-#define MAME_CPU_I8080_I8089_CHANNEL_H
+#ifndef MAME_CPU_I8089_I8089_CHANNEL_H
+#define MAME_CPU_I8089_I8089_CHANNEL_H
#pragma once
@@ -76,8 +76,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
@@ -206,4 +206,4 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(I8089_CHANNEL, i8089_channel_device)
-#endif // MAME_CPU_I8080_I8089_CHANNEL_H
+#endif // MAME_CPU_I8089_I8089_CHANNEL_H
diff --git a/src/devices/cpu/i8089/i8089_dasm.h b/src/devices/cpu/i8089/i8089_dasm.h
index de699f7fb5d..f2626725081 100644
--- a/src/devices/cpu/i8089/i8089_dasm.h
+++ b/src/devices/cpu/i8089/i8089_dasm.h
@@ -8,8 +8,8 @@
***************************************************************************/
-#ifndef MAME_CPU_I8089_I8089DASM_H
-#define MAME_CPU_I8089_I8089DASM_H
+#ifndef MAME_CPU_I8089_I8089_DASM_H
+#define MAME_CPU_I8089_I8089_DASM_H
#pragma once
@@ -68,4 +68,4 @@ private:
void load_instruction();
};
-#endif
+#endif // MAME_CPU_I8089_I8089_DASM_H
diff --git a/src/devices/cpu/i86/i186.cpp b/src/devices/cpu/i86/i186.cpp
index 7f64274ce6e..ac6ce5e6788 100644
--- a/src/devices/cpu/i86/i186.cpp
+++ b/src/devices/cpu/i86/i186.cpp
@@ -242,6 +242,7 @@ void i80186_cpu_device::execute_run()
if (m_halt)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -845,7 +846,7 @@ void i80186_cpu_device::write_port_word(uint16_t port, uint16_t data)
uint8_t i80186_cpu_device::read_byte(uint32_t addr)
{
- if ((m_reloc & 0x1000) && (addr >> 8) == (m_reloc & 0xfff))
+ if ((m_reloc & 0x1000) && ((addr >> 8) & 0xfff) == (m_reloc & 0xfff))
{
uint16_t ret = internal_port_r((addr >> 1) & 0x7f, (addr & 1) ? 0xff00 : 0x00ff);
return (addr & 1) ? (ret >> 8) : (ret & 0xff);
@@ -855,7 +856,7 @@ uint8_t i80186_cpu_device::read_byte(uint32_t addr)
uint16_t i80186_cpu_device::read_word(uint32_t addr)
{
- if ((m_reloc & 0x1000) && (addr >> 8) == (m_reloc & 0xfff))
+ if ((m_reloc & 0x1000) && ((addr >> 8) & 0xfff) == (m_reloc & 0xfff))
{
// Unaligned reads from the internal bus are swapped rather than split
if (addr & 1)
@@ -868,7 +869,7 @@ uint16_t i80186_cpu_device::read_word(uint32_t addr)
void i80186_cpu_device::write_byte(uint32_t addr, uint8_t data)
{
- if ((m_reloc & 0x1000) && (addr >> 8) == (m_reloc & 0xfff))
+ if ((m_reloc & 0x1000) && ((addr >> 8) & 0xfff) == (m_reloc & 0xfff))
internal_port_w((addr >> 1) & 0x7f, (addr & 1) ? (data << 8) : data);
else
m_program->write_byte(addr, data);
@@ -876,7 +877,7 @@ void i80186_cpu_device::write_byte(uint32_t addr, uint8_t data)
void i80186_cpu_device::write_word(uint32_t addr, uint16_t data)
{
- if ((m_reloc & 0x1000) && (addr >> 8) == (m_reloc & 0xfff))
+ if ((m_reloc & 0x1000) && ((addr >> 8) & 0xfff) == (m_reloc & 0xfff))
{
// Unaligned writes from the internal bus are swapped rather than split
if (addr & 1)
@@ -1243,7 +1244,7 @@ TIMER_CALLBACK_MEMBER(i80186_cpu_device::timer_elapsed)
int which = param;
timer_state *t = &m_timer[which];
- LOGMASKED(LOG_TIMER, "Hit interrupt callback for timer %d", which);
+ LOGMASKED(LOG_TIMER, "Hit interrupt callback for timer %d\n", which);
/* set the max count bit */
t->control |= 0x0020;
@@ -1253,14 +1254,14 @@ TIMER_CALLBACK_MEMBER(i80186_cpu_device::timer_elapsed)
{
m_intr.status |= 0x01 << which;
update_interrupt_state();
- LOGMASKED(LOG_TIMER, " Generating timer interrupt");
+ LOGMASKED(LOG_TIMER, " Generating timer interrupt\n");
}
if (which == 2)
{
- if ((m_dma[0].control & (TIMER_DRQ | ST_STOP)) == TIMER_DRQ)
+ if ((m_dma[0].control & (TIMER_DRQ | ST_STOP)) == (TIMER_DRQ | ST_STOP))
drq_callback(0);
- if ((m_dma[1].control & (TIMER_DRQ | ST_STOP)) == TIMER_DRQ)
+ if ((m_dma[1].control & (TIMER_DRQ | ST_STOP)) == (TIMER_DRQ | ST_STOP))
drq_callback(1);
if ((m_timer[0].control & 0x800c) == 0x8008)
inc_timer(0);
@@ -1294,7 +1295,7 @@ TIMER_CALLBACK_MEMBER(i80186_cpu_device::timer_elapsed)
t->control &= ~0x1000;
restart_timer(which);
- LOGMASKED(LOG_TIMER, " Repriming interrupt");
+ LOGMASKED(LOG_TIMER, " Repriming interrupt\n");
}
else
{
@@ -1308,9 +1309,13 @@ TIMER_CALLBACK_MEMBER(i80186_cpu_device::timer_elapsed)
void i80186_cpu_device::restart_timer(int which)
{
timer_state *t = &m_timer[which];
+ /* Only run timer 0,1 when not incremented via timer 2 pre-scaler */
+ if (which != 2 && (t->control & 0x800c) == 0x8008)
+ return;
+
int count = (t->control & 0x1000) ? t->maxB : t->maxA;
if (!(t->control & 4))
- t->int_timer->adjust((attotime::from_hz(clock() / 8) * (count ? count : 0x10000)), which);
+ t->int_timer->adjust(cycles_to_attotime(4 * (count ? count : 0x10000)), which);
}
void i80186_cpu_device::internal_timer_sync(int which)
@@ -1319,7 +1324,7 @@ void i80186_cpu_device::internal_timer_sync(int which)
/* if we have a timing timer running, adjust the count */
if ((t->control & 0x8000) && !(t->control & 0x0c) && t->int_timer->enabled())
- t->count = ((t->control & 0x1000) ? t->maxB : t->maxA) - t->int_timer->remaining().as_ticks(clock() / 8);
+ t->count = ((t->control & 0x1000) ? t->maxB : t->maxA) - attotime_to_cycles(t->int_timer->remaining()) / 4;
}
void i80186_cpu_device::inc_timer(int which)
@@ -1341,7 +1346,7 @@ void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_
timer_state *t = &m_timer[which];
bool update_int_timer = false;
- LOGMASKED(LOG_TIMER, "internal_timer_update: %d, new_count=%d, new_maxA=%d, new_maxB=%d, new_control=%d", which, new_count, new_maxA, new_maxB, new_control);
+ LOGMASKED(LOG_TIMER, "internal_timer_update: %d, new_count=%d, new_maxA=%d, new_maxB=%d, new_control=%d\n", which, new_count, new_maxA, new_maxB, new_control);
/* if we have a new count and we're on, update things */
if (new_count != -1)
@@ -1443,7 +1448,7 @@ void i80186_cpu_device::internal_timer_update(int which, int new_count, int new_
int diff = ((t->control & 0x1000) ? t->maxB : t->maxA) - t->count;
if (diff <= 0)
diff += 0x10000;
- t->int_timer->adjust(attotime::from_hz(clock()/8) * diff, which);
+ t->int_timer->adjust(cycles_to_attotime(4 * diff), which);
LOGMASKED(LOG_TIMER, "Set interrupt timer for %d\n", which);
}
else
@@ -1486,11 +1491,6 @@ void i80186_cpu_device::update_dma_control(int which, int new_control)
new_control = (new_control & ~ST_STOP) | (d->control & ST_STOP);
new_control &= ~CHG_NOCHG;
- /* check for control bits we don't handle */
- int diff = new_control ^ d->control;
- if (diff & 0x6811)
- LOGMASKED(LOG_DMA, "%05X:ERROR! - unsupported DMA mode %04X\n", m_pc, new_control);
-
LOGMASKED(LOG_DMA, "Initiated DMA %d - count = %04X, source = %04X, dest = %04X\n", which, d->count, d->source, d->dest);
/* set the new control register */
diff --git a/src/devices/cpu/i86/i186.h b/src/devices/cpu/i86/i186.h
index b3159454138..34a95ef1309 100644
--- a/src/devices/cpu/i86/i186.h
+++ b/src/devices/cpu/i86/i186.h
@@ -37,6 +37,9 @@ public:
void int2_w(int state) { external_int(2, state); }
void int3_w(int state) { external_int(3, state); }
+ // This a hack, only use if there are sync problems with another cpu
+ void dma_sync_req(int which) { drq_callback(which); }
+
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -66,16 +69,15 @@ protected:
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks / 2); }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
virtual void execute_run() override;
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint8_t fetch() override;
uint32_t update_pc() { return m_pc = (m_sregs[CS] << 4) + m_ip; }
virtual uint8_t read_port_byte(uint16_t port) override;
virtual uint16_t read_port_word(uint16_t port) override;
virtual void write_port_byte(uint16_t port, uint8_t data) override;
- void write_port_byte_al(uint16_t port);
+ virtual void write_port_byte_al(uint16_t port) override;
virtual void write_port_word(uint16_t port, uint16_t data) override;
virtual uint8_t read_byte(uint32_t addr) override;
virtual uint16_t read_word(uint32_t addr) override;
diff --git a/src/devices/cpu/i86/i286.cpp b/src/devices/cpu/i86/i286.cpp
index 6c65ab5c39d..bfe4dc7c728 100644
--- a/src/devices/cpu/i86/i286.cpp
+++ b/src/devices/cpu/i86/i286.cpp
@@ -384,21 +384,16 @@ void i80286_cpu_device::execute_set_input(int inptnum, int state)
{
if(inptnum == INPUT_LINE_NMI)
{
- if(m_nmi_state == state)
- {
- return;
- }
- m_nmi_state = state;
- if(state != CLEAR_LINE)
+ if(!m_nmi_state && state)
{
m_pending_irq |= NMI_IRQ;
}
+ m_nmi_state = state;
}
else if(inptnum == INPUT_LINE_A20)
m_amask = m_a20_callback(state);
else
{
- m_irq_state = state;
if(state == CLEAR_LINE)
{
m_pending_irq &= ~INT_IRQ;
@@ -760,7 +755,7 @@ void i80286_cpu_device::code_descriptor(uint16_t selector, uint16_t offset, int
throw TRAP(FAULT_GP, IDXTBL(selector));
if(!PRES(r))
- throw TRAP(FAULT_NP, IDXTBL(selector)); // this order is important
+ throw TRAP(FAULT_NP, IDXTBL(selector)); // this order is important
if(offset > LIMIT(desc))
throw TRAP(FAULT_GP, 0);
@@ -774,7 +769,8 @@ void i80286_cpu_device::code_descriptor(uint16_t selector, uint16_t offset, int
m_prev_ip = m_ip = offset;
}
else
- { // systemdescriptor
+ {
+ // systemdescriptor
uint16_t gatesel = GATESEL(desc);
if(!gate)
@@ -1078,6 +1074,7 @@ void i80286_cpu_device::execute_run()
if(m_halt || m_shutdown)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/i86/i286.h b/src/devices/cpu/i86/i286.h
index 78b1f1d6b03..cceb66fc931 100644
--- a/src/devices/cpu/i86/i286.h
+++ b/src/devices/cpu/i86/i286.h
@@ -90,14 +90,13 @@ protected:
typedef device_delegate<uint32_t (bool)> a20_cb;
virtual void execute_run() override;
- virtual void device_reset() override;
- virtual void device_start() override;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_set_input(int inputnum, int state) override;
bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
diff --git a/src/devices/cpu/i86/i86.cpp b/src/devices/cpu/i86/i86.cpp
index 0df4308ae79..9d6ca4cf384 100644
--- a/src/devices/cpu/i86/i86.cpp
+++ b/src/devices/cpu/i86/i86.cpp
@@ -211,6 +211,7 @@ void i8086_cpu_device::execute_run()
if(m_halt)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -366,7 +367,6 @@ i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig,
, m_int_vector(0)
, m_pending_irq(0)
, m_nmi_state(0)
- , m_irq_state(0)
, m_test_state(1)
, m_pc(0)
, m_lock(false)
@@ -488,7 +488,6 @@ void i8086_common_cpu_device::device_start()
save_item(NAME(m_int_vector));
save_item(NAME(m_pending_irq));
save_item(NAME(m_nmi_state));
- save_item(NAME(m_irq_state));
save_item(NAME(m_AuxVal));
save_item(NAME(m_OverVal));
save_item(NAME(m_ZeroVal));
@@ -554,9 +553,7 @@ void i8086_common_cpu_device::device_reset()
m_NT = 1; // 8086 NT always 1
m_MF = 1; // 8086 MF always 1, 80286 always 0
m_int_vector = 0;
- m_pending_irq = 0;
- m_nmi_state = 0;
- m_irq_state = 0;
+ m_pending_irq &= INT_IRQ;
m_no_interrupt = 0;
m_fire_trap = 0;
m_prefix_seg = 0;
@@ -576,7 +573,7 @@ void i8086_common_cpu_device::device_reset()
void i8086_common_cpu_device::interrupt(int int_num, int trap)
{
- PUSH( CompressFlags() );
+ PUSH(CompressFlags());
m_TF = m_IF = 0;
if (int_num == -1)
@@ -598,15 +595,11 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state )
{
if (inptnum == INPUT_LINE_NMI)
{
- if ( m_nmi_state == state )
- {
- return;
- }
- m_nmi_state = state;
- if (state != CLEAR_LINE)
+ if (!m_nmi_state && state)
{
m_pending_irq |= NMI_IRQ;
}
+ m_nmi_state = state;
}
else if (inptnum == INPUT_LINE_TEST)
{
@@ -614,7 +607,6 @@ void i8086_common_cpu_device::execute_set_input( int inptnum, int state )
}
else
{
- m_irq_state = state;
if (state == CLEAR_LINE)
{
m_pending_irq &= ~INT_IRQ;
@@ -671,6 +663,14 @@ void i8086_common_cpu_device::write_port_byte(uint16_t port, uint8_t data)
m_io->write_byte(port, data);
}
+void i8086_common_cpu_device::write_port_byte_al(uint16_t port)
+{
+ if (port & 1)
+ m_io->write_word(port-1, swapendian_int16(m_regs.w[AX]), 0xff00);
+ else
+ m_io->write_word(port, m_regs.w[AX], 0x00ff);
+}
+
void i8086_common_cpu_device::write_port_word(uint16_t port, uint16_t data)
{
m_io->write_word_unaligned(port, data);
@@ -2068,7 +2068,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
break;
case 0xe6: // i_outal
- write_port_byte( fetch(), m_regs.b[AL]);
+ write_port_byte_al(fetch());
CLK(OUT_IMM8);
break;
@@ -2139,7 +2139,7 @@ bool i8086_common_cpu_device::common_op(uint8_t op)
break;
case 0xee: // i_outdxal
- write_port_byte(m_regs.w[DX], m_regs.b[AL]);
+ write_port_byte_al(m_regs.w[DX]);
CLK(OUT_DX8);
break;
diff --git a/src/devices/cpu/i86/i86.h b/src/devices/cpu/i86/i86.h
index f08a8e0c2ba..3ceb94f672d 100644
--- a/src/devices/cpu/i86/i86.h
+++ b/src/devices/cpu/i86/i86.h
@@ -111,8 +111,8 @@ protected:
i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
@@ -139,6 +139,7 @@ protected:
virtual uint8_t read_port_byte(uint16_t port);
virtual uint16_t read_port_word(uint16_t port);
virtual void write_port_byte(uint16_t port, uint8_t data);
+ virtual void write_port_byte_al(uint16_t port);
virtual void write_port_word(uint16_t port, uint16_t data);
// Executing instructions
@@ -289,7 +290,6 @@ protected:
uint32_t m_int_vector;
uint32_t m_pending_irq;
uint32_t m_nmi_state;
- uint32_t m_irq_state;
uint8_t m_no_interrupt;
uint8_t m_fire_trap;
uint8_t m_test_state;
@@ -357,8 +357,7 @@ protected:
i8086_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_bus_size);
virtual void execute_run() override;
- virtual void device_start() override;
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
+ virtual void device_start() override ATTR_COLD;
virtual uint8_t fetch() override;
inline address_space *sreg_to_space(int sreg) const;
virtual uint8_t read_byte(uint32_t addr) override;
diff --git a/src/devices/cpu/i860/i860.h b/src/devices/cpu/i860/i860.h
index 3f37dda5b87..fcfa1ff875f 100644
--- a/src/devices/cpu/i860/i860.h
+++ b/src/devices/cpu/i860/i860.h
@@ -58,18 +58,16 @@ protected:
I860_F10, I860_F11, I860_F12, I860_F13, I860_F14, I860_F15, I860_F16, I860_F17, I860_F18, I860_F19,
I860_F20, I860_F21, I860_F22, I860_F23, I860_F24, I860_F25, I860_F26, I860_F27, I860_F28, I860_F29,
I860_F30, I860_F31
-
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 8; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/i860/i860dec.hxx b/src/devices/cpu/i860/i860dec.hxx
index af286b04c4b..39723bbe43a 100644
--- a/src/devices/cpu/i860/i860dec.hxx
+++ b/src/devices/cpu/i860/i860dec.hxx
@@ -35,6 +35,11 @@
* today also use IEEE FP.
*
*/
+#ifndef MAME_CPU_I860_I860DEC_HXX
+#define MAME_CPU_I860_I860DEC_HXX
+
+#pragma once
+
#include "i860.h"
#include <cmath>
@@ -4670,3 +4675,5 @@ void debugger (i860s *cpustate)
}
#endif
+
+#endif // MAME_CPU_I860_I860DEC_HXX
diff --git a/src/devices/cpu/i960/i960.cpp b/src/devices/cpu/i960/i960.cpp
index 9d9e5293a67..738037e60b5 100644
--- a/src/devices/cpu/i960/i960.cpp
+++ b/src/devices/cpu/i960/i960.cpp
@@ -469,7 +469,7 @@ void i960_cpu_device::take_interrupt(int vector, int lvl)
}
SP = (SP + 63) & ~63;
- SP += 128; // emulate ElSemi's core, this fixes the crash in sonic the fighters
+ SP += 64; // add padding to prevent buffer underflow when saving processor state
do_call(IRQV, 7, SP);
@@ -1538,7 +1538,7 @@ void i960_cpu_device::execute_op(uint32_t opcode)
t1 = get_1_ri(opcode);
t2 = get_2_ri(opcode);
- set_ri64(opcode, (int64_t)t1 * (int64_t)t2);
+ set_ri64(opcode, mulu_32x32(t1, t2));
break;
case 0x1: // ediv
diff --git a/src/devices/cpu/i960/i960.h b/src/devices/cpu/i960/i960.h
index 1efab1d328a..12d71531d74 100644
--- a/src/devices/cpu/i960/i960.h
+++ b/src/devices/cpu/i960/i960.h
@@ -81,13 +81,12 @@ protected:
enum { I960_RCACHE_SIZE = 4 };
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; } /* ???? TODO: Exact timing unknown */
virtual uint32_t execute_max_cycles() const noexcept override { return 1; } /* ???? TODO: Exact timing unknown */
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/i960/i960dis.cpp b/src/devices/cpu/i960/i960dis.cpp
index 7d9d26b32ad..c61a1e61a64 100644
--- a/src/devices/cpu/i960/i960dis.cpp
+++ b/src/devices/cpu/i960/i960dis.cpp
@@ -37,13 +37,13 @@ const i960_disassembler::mnemonic_t i960_disassembler::mnemonic[256] = {
{ "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 },
{ "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, // 50
- { "58", 4, 0 }, { "59", 4, 0 }, { "5A", 4, 0 }, { "5B", 4, 0 }, { "5C", 4, 0 }, { "5D", 4, 0 }, { "?", 0, 0 }, { "5F", 4, 0 },
+ { "58", 4, 0 }, { "59", 4, 0 }, { "5A", 4, 0 }, { "5B", 4, 0 }, { "5C", 4, 0 }, { "5D", 4, 0 }, { "5E", 4, 0 }, { "5F", 4, 0 },
- { "60", 4, 0 }, { "61", 4, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "64", 4, 0 }, { "65", 4, 0 }, { "66", 4, 0 }, { "67", 4, 0 }, // 60
+ { "60", 4, 0 }, { "61", 4, 0 }, { "?", 0, 0 }, { "63", 4, 0 }, { "64", 4, 0 }, { "65", 4, 0 }, { "66", 4, 0 }, { "67", 4, 0 }, // 60
{ "68", 4, 0 }, { "69", 4, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "6C", 4, 0 }, { "6D", 4, 0 }, { "6E", 4, 0 }, { "?", 0, 0 },
{ "70", 4, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "74", 4, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, // 70
- { "78", 4, 0 }, { "79", 4, 0 }, { "7A", 4, 0 }, { "7B", 4, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 },
+ { "78", 4, 0 }, { "79", 4, 0 }, { "7A", 4, 0 }, { "7B", 4, 0 }, { "7C", 4, 0 }, { "7D", 4, 0 }, { "7E", 4, 0 }, { "7F", 4, 0 },
{ "ldob", 3, 2 }, { "?", 0, 0 }, { "stob", 3, -2 }, { "?", 0, 0 }, { "bx", 3, 1 }, { "balx", 3, 2 }, { "callx", 3, 1 }, { "?", 0, 0 }, // 80
{ "ldos", 3, 2 }, { "?", 0, 0 }, { "stos", 3, -2 }, { "?", 0, 0 }, { "lda", 3, 2 }, { "?", 0, 0 }, { "?", 0, 0 }, { "?", 0, 0 },
@@ -216,7 +216,7 @@ offs_t i960_disassembler::dis_decode_ctrl(std::ostream &stream, u32 iCode, u32 i
util::stream_format(stream, "%s", mnemonic[op].mnem);
break;
case 1: // 1 operand
- util::stream_format(stream, "%-8s%08lx", mnemonic[op].mnem, util::sext(disp, 24) + (ip));
+ util::stream_format(stream, "%-8s0x%08x", mnemonic[op].mnem, util::sext(disp, 24) + ip);
break;
default:
return dis_decode_invalid(stream, iCode);
diff --git a/src/devices/cpu/ie15/ie15.cpp b/src/devices/cpu/ie15/ie15.cpp
index d3db6f0ef1b..d3f512c9711 100644
--- a/src/devices/cpu/ie15/ie15.cpp
+++ b/src/devices/cpu/ie15/ie15.cpp
@@ -186,7 +186,7 @@ uint32_t ie15_cpu_device::execute_max_cycles() const noexcept
void ie15_cpu_device::execute_run()
{
// Removing the hook entirely is considerably faster than calling it for every instruction if the debugger is disabled entirely
- if (machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
{
do
{
@@ -205,7 +205,7 @@ void ie15_cpu_device::execute_run()
inline void ie15_cpu_device::illegal(uint8_t opcode)
{
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
logerror("IE15 illegal instruction %04X $%02X\n", m_PC.w.l, opcode);
}
diff --git a/src/devices/cpu/ie15/ie15.h b/src/devices/cpu/ie15/ie15.h
index a0885ce55f1..771e2c0b326 100644
--- a/src/devices/cpu/ie15/ie15.h
+++ b/src/devices/cpu/ie15/ie15.h
@@ -27,8 +27,8 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
diff --git a/src/devices/cpu/jaguar/jaguar.cpp b/src/devices/cpu/jaguar/jaguar.cpp
index 8db47937d55..62fb7f1ab41 100644
--- a/src/devices/cpu/jaguar/jaguar.cpp
+++ b/src/devices/cpu/jaguar/jaguar.cpp
@@ -486,6 +486,7 @@ void jaguargpu_cpu_device::execute_run()
if (m_go == false)
{
//device->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -521,6 +522,7 @@ void jaguardsp_cpu_device::execute_run()
if (m_go == false)
{
//device->execute().set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/jaguar/jaguar.h b/src/devices/cpu/jaguar/jaguar.h
index 90533c3bc7c..245304f0774 100644
--- a/src/devices/cpu/jaguar/jaguar.h
+++ b/src/devices/cpu/jaguar/jaguar.h
@@ -67,14 +67,13 @@ protected:
jaguar_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 version, bool isdsp, address_map_constructor io_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1; }
- virtual u32 execute_input_lines() const noexcept override { return 5; }
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
@@ -235,7 +234,7 @@ protected:
void init_tables();
// I/O internal regs
- void io_common_map(address_map &map);
+ void io_common_map(address_map &map) ATTR_COLD;
// TODO: the m_io* stubs are conventionally given for allowing a correct register setup from vanilla 68k.
// This is yet another reason about needing a bus device dispatcher for this system.
u32 m_io_end;
@@ -272,7 +271,7 @@ public:
// construction/destruction
jaguargpu_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
- void io_map(address_map &map);
+ void io_map(address_map &map) ATTR_COLD;
protected:
virtual void execute_run() override;
@@ -289,10 +288,9 @@ public:
// construction/destruction
jaguardsp_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
- void io_map(address_map &map);
+ void io_map(address_map &map) ATTR_COLD;
protected:
- virtual u32 execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/ks0164/ks0164.cpp b/src/devices/cpu/ks0164/ks0164.cpp
index 436415f1b34..1dce547896e 100644
--- a/src/devices/cpu/ks0164/ks0164.cpp
+++ b/src/devices/cpu/ks0164/ks0164.cpp
@@ -58,11 +58,6 @@ uint32_t ks0164_cpu_device::execute_max_cycles() const noexcept
return 5;
}
-uint32_t ks0164_cpu_device::execute_input_lines() const noexcept
-{
- return 16;
-}
-
void ks0164_cpu_device::execute_set_input(int inputnum, int state)
{
if(state)
diff --git a/src/devices/cpu/ks0164/ks0164.h b/src/devices/cpu/ks0164/ks0164.h
index 1df7e6f5e4b..083f4bdad97 100644
--- a/src/devices/cpu/ks0164/ks0164.h
+++ b/src/devices/cpu/ks0164/ks0164.h
@@ -38,11 +38,10 @@ protected:
u16 m_r[8];
u32 m_irq;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/lc8670/lc8670.cpp b/src/devices/cpu/lc8670/lc8670.cpp
index eee3aea5e94..a6c852733b3 100644
--- a/src/devices/cpu/lc8670/lc8670.cpp
+++ b/src/devices/cpu/lc8670/lc8670.cpp
@@ -420,18 +420,20 @@ void lc8670_cpu_device::execute_run()
{
check_irqs();
- m_ppc = m_pc;
- debugger_instruction_hook(m_pc);
-
int cycles;
if (REG_PCON & HALT_MODE)
{
+ debugger_wait_hook();
+
// in HALT state the timers are still updated
cycles = 1;
}
else
{
+ m_ppc = m_pc;
+ debugger_instruction_hook(m_pc);
+
// instruction fetch
m_op = fetch();
int op_idx = decode_op(m_op);
diff --git a/src/devices/cpu/lc8670/lc8670.h b/src/devices/cpu/lc8670/lc8670.h
index a00658a7d4d..2f92c6c6e6c 100644
--- a/src/devices/cpu/lc8670/lc8670.h
+++ b/src/devices/cpu/lc8670/lc8670.h
@@ -82,7 +82,7 @@ public:
template <typename... T> void set_lcd_update_cb(T &&... args) { m_lcd_update_func.set(std::forward<T>(args)...); }
- void lc8670_internal_map(address_map &map);
+ void lc8670_internal_map(address_map &map) ATTR_COLD;
protected:
enum
{
@@ -91,13 +91,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/lh5801/5801dasm.cpp b/src/devices/cpu/lh5801/5801dasm.cpp
index 540074dec1c..1e1390f9056 100644
--- a/src/devices/cpu/lh5801/5801dasm.cpp
+++ b/src/devices/cpu/lh5801/5801dasm.cpp
@@ -623,10 +623,10 @@ offs_t lh5801_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format(stream, "%s %04x", entry->ins_name(),absolut);break;
case RelP:
temp=opcodes.r8(pos++);
- util::stream_format(stream, "%s %04x", entry->ins_name(),pc+pos+temp);break;
+ util::stream_format(stream, "%s %04x", entry->ins_name(),pos+temp);break;
case RelM:
temp=opcodes.r8(pos++);
- util::stream_format(stream, "%s %04x", entry->ins_name(),pc+pos-temp);break;
+ util::stream_format(stream, "%s %04x", entry->ins_name(),pos-temp);break;
case Abs:
absolut=opcodes.r8(pos++)<<8;
absolut|=opcodes.r8(pos++);
diff --git a/src/devices/cpu/lh5801/lh5801.cpp b/src/devices/cpu/lh5801/lh5801.cpp
index d7eed38700b..c3f40a77821 100644
--- a/src/devices/cpu/lh5801/lh5801.cpp
+++ b/src/devices/cpu/lh5801/lh5801.cpp
@@ -216,7 +216,10 @@ void lh5801_cpu_device::execute_run()
check_irq();
if (m_idle)
+ {
+ debugger_wait_hook();
m_icount = 0;
+ }
else
{
m_oldpc = P;
diff --git a/src/devices/cpu/lh5801/lh5801.h b/src/devices/cpu/lh5801/lh5801.h
index 68c028289af..841708d26f3 100644
--- a/src/devices/cpu/lh5801/lh5801.h
+++ b/src/devices/cpu/lh5801/lh5801.h
@@ -71,15 +71,14 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 19; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == LH5801_LINE_MI || inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/lr35902/lr35902.cpp b/src/devices/cpu/lr35902/lr35902.cpp
index c575eea4157..cf936e47105 100644
--- a/src/devices/cpu/lr35902/lr35902.cpp
+++ b/src/devices/cpu/lr35902/lr35902.cpp
@@ -357,12 +357,13 @@ void lr35902_cpu_device::execute_run()
/* Fetch and count cycles */
bool was_halted = (m_enable & HALTED);
check_interrupts();
- debugger_instruction_hook(m_PC);
if ( m_enable & HALTED ) {
+ debugger_wait_hook();
cycles_passed(m_has_halt_bug ? 2 : 4);
m_execution_state = 1;
m_entering_halt = false;
} else {
+ debugger_instruction_hook(m_PC);
if (was_halted) {
m_PC++;
} else {
diff --git a/src/devices/cpu/lr35902/lr35902.h b/src/devices/cpu/lr35902/lr35902.h
index f723213137c..d4fcd3a706f 100644
--- a/src/devices/cpu/lr35902/lr35902.h
+++ b/src/devices/cpu/lr35902/lr35902.h
@@ -64,13 +64,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 16; }
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/lr35902/lr35902d.h b/src/devices/cpu/lr35902/lr35902d.h
index 550a8bdaef8..55216605f14 100644
--- a/src/devices/cpu/lr35902/lr35902d.h
+++ b/src/devices/cpu/lr35902/lr35902d.h
@@ -7,8 +7,8 @@
*
*****************************************************************************/
-#ifndef MAME_CPU_LR35902_LR35902DASM_H
-#define MAME_CPU_LR35902_LR35902DASM_H
+#ifndef MAME_CPU_LR35902_LR35902D_H
+#define MAME_CPU_LR35902_LR35902D_H
#pragma once
@@ -45,4 +45,4 @@ private:
static const lr35902dasm mnemonic_main[256];
};
-#endif
+#endif // MAME_CPU_LR35902_LR35902D_H
diff --git a/src/devices/cpu/m16c/m16cdasm.cpp b/src/devices/cpu/m16c/m16cdasm.cpp
index 00972ca24fc..6af0d0abf80 100644
--- a/src/devices/cpu/m16c/m16cdasm.cpp
+++ b/src/devices/cpu/m16c/m16cdasm.cpp
@@ -1189,6 +1189,7 @@ offs_t m16c_disassembler::disassemble(std::ostream &stream, offs_t pc, const m16
else
util::stream_format(stream, "%-8s#%d, ", BIT(op1, 0) ? "sbjnz.w" : "sbjnz.b", op2 & 0x07);
dasm_ea(stream, pc, opcodes, op2 & 0x0f, BIT(op1, 0));
+ stream << ", ";
format_label(stream, pc0 + 2 + s8(opcodes.r8(pc)));
++pc;
flags |= STEP_COND;
diff --git a/src/devices/cpu/m37710/m37710.h b/src/devices/cpu/m37710/m37710.h
index 6d09957b38a..9b634daf6b2 100644
--- a/src/devices/cpu/m37710/m37710.h
+++ b/src/devices/cpu/m37710/m37710.h
@@ -130,12 +130,12 @@ public:
auto an7_cb() { return m_analog_cb[7].bind(); }
protected:
- void ad_register_map(address_map &map);
- void uart0_register_map(address_map &map);
- void uart1_register_map(address_map &map);
- void timer_register_map(address_map &map);
- void timer_6channel_register_map(address_map &map);
- void irq_register_map(address_map &map);
+ void ad_register_map(address_map &map) ATTR_COLD;
+ void uart0_register_map(address_map &map) ATTR_COLD;
+ void uart1_register_map(address_map &map) ATTR_COLD;
+ void timer_register_map(address_map &map) ATTR_COLD;
+ void timer_6channel_register_map(address_map &map) ATTR_COLD;
+ void irq_register_map(address_map &map) ATTR_COLD;
// internal registers
template <int Base> uint8_t port_r(offs_t offset);
@@ -202,15 +202,14 @@ protected:
m37710_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor map_delegate);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 20; /* rough guess */ }
- virtual uint32_t execute_input_lines() const noexcept override { return M37710_LINE_MAX; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -2148,7 +2147,7 @@ public:
// construction/destruction
m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
class m37702m2_device : public m37710_cpu_device
@@ -2158,7 +2157,7 @@ public:
m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
m37702m2_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
class m37710s4_device : public m37710_cpu_device
@@ -2167,7 +2166,7 @@ public:
// construction/destruction
m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
class m37720s1_device : public m37710_cpu_device
@@ -2176,7 +2175,7 @@ public:
// construction/destruction
m37720s1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
class m37730s2_device : public m37710_cpu_device
@@ -2185,7 +2184,7 @@ public:
// construction/destruction
m37730s2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
class m37732s4_device : public m37710_cpu_device
@@ -2194,7 +2193,7 @@ public:
// construction/destruction
m37732s4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M37702M2, m37702m2_device)
diff --git a/src/devices/cpu/m37710/m37710op.h b/src/devices/cpu/m37710/m37710op.h
index 0f26a517242..2330425f4ca 100644
--- a/src/devices/cpu/m37710/m37710op.h
+++ b/src/devices/cpu/m37710/m37710op.h
@@ -2534,7 +2534,9 @@ TABLE_FUNCTION(void, set_reg, (int regnum, uint32_t val))
TABLE_FUNCTION(int, execute, (int clocks))
{
- if(!CPU_STOPPED)
+ if(CPU_STOPPED)
+ debugger_wait_hook();
+ else
{
CLOCKS = clocks;
do
diff --git a/src/devices/cpu/m37710/m7700ds.h b/src/devices/cpu/m37710/m7700ds.h
index f2c628212f3..5495a508323 100644
--- a/src/devices/cpu/m37710/m7700ds.h
+++ b/src/devices/cpu/m37710/m7700ds.h
@@ -18,7 +18,6 @@ Based on:
G65C816 CPU Emulator V0.92
Copyright Karl Stenerud
-All rights reserved.
*/
diff --git a/src/devices/cpu/m6502/deco16.h b/src/devices/cpu/m6502/deco16.h
index 63494f6b1d4..60c0e2a4eaf 100644
--- a/src/devices/cpu/m6502/deco16.h
+++ b/src/devices/cpu/m6502/deco16.h
@@ -28,7 +28,7 @@ protected:
address_space_config io_config;
virtual space_config_vector memory_space_config() const override;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
#define O(o) void o ## _full(); void o ## _partial()
diff --git a/src/devices/cpu/m6502/dm65c02.lst b/src/devices/cpu/m6502/dw65c02.lst
index cb76456593b..d253cfa2774 100644
--- a/src/devices/cpu/m6502/dm65c02.lst
+++ b/src/devices/cpu/m6502/dw65c02.lst
@@ -1,6 +1,6 @@
# license:BSD-3-Clause
# copyright-holders:Olivier Galibert
-# m65c02
+# w65c02
brk_c_imp ora_idx nop_imm nop_c_imp tsb_zpg ora_zpg asl_c_zpg nop_c_imp php_imp ora_imm asl_acc nop_c_imp tsb_aba ora_aba asl_c_aba nop_c_imp
bpl_rel ora_idy ora_zpi nop_c_imp trb_zpg ora_zpx asl_c_zpx nop_c_imp clc_imp ora_aby inc_acc nop_c_imp trb_aba ora_abx asl_c_abx nop_c_imp
jsr_adr and_idx nop_imm nop_c_imp bit_zpg and_zpg rol_c_zpg nop_c_imp plp_imp and_imm rol_acc nop_c_imp bit_aba and_aba rol_c_aba nop_c_imp
diff --git a/src/devices/cpu/m6502/g65sc02.cpp b/src/devices/cpu/m6502/g65sc02.cpp
new file mode 100644
index 00000000000..e9e62cd4880
--- /dev/null
+++ b/src/devices/cpu/m6502/g65sc02.cpp
@@ -0,0 +1,46 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ g65sc02.cpp
+
+ 65c02 with internal static registers, making clock stoppable?
+
+ TODO:
+ - none of the CPU type differences are currently emulated (eg. BE pin, ML pin),
+ are any of them meaningful to MAME?
+
+***************************************************************************/
+
+#include "emu.h"
+#include "g65sc02.h"
+
+DEFINE_DEVICE_TYPE(G65SC02, g65sc02_device, "g65sc02", "GTE G65SC02")
+DEFINE_DEVICE_TYPE(G65SC12, g65sc12_device, "g65sc12", "GTE G65SC12")
+DEFINE_DEVICE_TYPE(G65SC102, g65sc102_device, "g65sc102", "GTE G65SC102")
+DEFINE_DEVICE_TYPE(G65SC112, g65sc112_device, "g65sc112", "GTE G65SC112")
+
+g65sc02_device::g65sc02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ w65c02_device(mconfig, type, tag, owner, clock)
+{
+}
+
+g65sc02_device::g65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ g65sc02_device(mconfig, G65SC02, tag, owner, clock)
+{
+}
+
+g65sc12_device::g65sc12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ g65sc02_device(mconfig, G65SC12, tag, owner, clock)
+{
+}
+
+g65sc102_device::g65sc102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ g65sc02_device(mconfig, G65SC102, tag, owner, clock)
+{
+}
+
+g65sc112_device::g65sc112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ g65sc02_device(mconfig, G65SC112, tag, owner, clock)
+{
+}
diff --git a/src/devices/cpu/m6502/g65sc02.h b/src/devices/cpu/m6502/g65sc02.h
new file mode 100644
index 00000000000..e98f068b60d
--- /dev/null
+++ b/src/devices/cpu/m6502/g65sc02.h
@@ -0,0 +1,54 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ g65sc02.h
+
+ 65c02 with internal static registers, making clock stoppable?
+
+***************************************************************************/
+
+#ifndef MAME_CPU_M6502_G65SC02_H
+#define MAME_CPU_M6502_G65SC02_H
+
+#include "w65c02.h"
+
+class g65sc02_device : public w65c02_device {
+public:
+ g65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ g65sc02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+};
+
+class g65sc12_device : public g65sc02_device {
+public:
+ g65sc12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+class g65sc102_device : public g65sc02_device {
+public:
+ g65sc102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
+};
+
+class g65sc112_device : public g65sc02_device {
+public:
+ g65sc112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+enum {
+ G65SC02_IRQ_LINE = m6502_device::IRQ_LINE,
+ G65SC02_NMI_LINE = m6502_device::NMI_LINE,
+ G65SC02_SET_OVERFLOW = m6502_device::V_LINE
+};
+
+DECLARE_DEVICE_TYPE(G65SC02, g65sc02_device)
+DECLARE_DEVICE_TYPE(G65SC12, g65sc12_device)
+DECLARE_DEVICE_TYPE(G65SC102, g65sc102_device)
+DECLARE_DEVICE_TYPE(G65SC112, g65sc112_device)
+
+#endif // MAME_CPU_M6502_G65SC02_H
diff --git a/src/devices/cpu/m6502/gew12.cpp b/src/devices/cpu/m6502/gew12.cpp
index b087b18f43d..4d77abc7771 100644
--- a/src/devices/cpu/m6502/gew12.cpp
+++ b/src/devices/cpu/m6502/gew12.cpp
@@ -19,8 +19,8 @@
DEFINE_DEVICE_TYPE(GEW12, gew12_device, "gew12", "Yamaha YMW728-F (GEW12)")
gew12_device::gew12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : m6502_mcu_device_base<m65c02_device>(mconfig, GEW12, tag, owner, clock)
- , device_mixer_interface(mconfig, *this, 2)
+ : m6502_mcu_device_base<w65c02_device>(mconfig, GEW12, tag, owner, clock)
+ , device_mixer_interface(mconfig, *this)
, m_in_cb(*this, 0xff), m_out_cb(*this)
, m_rom(*this, DEVICE_SELF)
, m_bank(*this, "bank%u", 0U)
@@ -36,7 +36,7 @@ void gew12_device::device_add_mconfig(machine_config &config)
void gew12_device::device_start()
{
- m65c02_device::device_start();
+ w65c02_device::device_start();
m_bank_mask = device_generic_cart_interface::map_non_power_of_two(
unsigned(m_rom->bytes() >> 14),
@@ -61,7 +61,7 @@ void gew12_device::device_start()
void gew12_device::device_reset()
{
- m6502_mcu_device_base<m65c02_device>::device_reset();
+ m6502_mcu_device_base<w65c02_device>::device_reset();
internal_update();
m_irq_pending = 0;
@@ -142,9 +142,9 @@ void gew12_device::internal_irq(int num, int state)
void gew12_device::irq_update()
{
if (m_irq_pending & m_irq_enable)
- set_input_line(M65C02_IRQ_LINE, ASSERT_LINE);
+ set_input_line(W65C02_IRQ_LINE, ASSERT_LINE);
else
- set_input_line(M65C02_IRQ_LINE, CLEAR_LINE);
+ set_input_line(W65C02_IRQ_LINE, CLEAR_LINE);
}
diff --git a/src/devices/cpu/m6502/gew12.h b/src/devices/cpu/m6502/gew12.h
index aeb4db9c040..101116c6903 100644
--- a/src/devices/cpu/m6502/gew12.h
+++ b/src/devices/cpu/m6502/gew12.h
@@ -11,9 +11,9 @@
#define MAME_CPU_M6502_GEW12_H
#include "m6502mcu.h"
-#include "m65c02.h"
+#include "w65c02.h"
-class gew12_device : public m6502_mcu_device_base<m65c02_device>, public device_mixer_interface {
+class gew12_device : public m6502_mcu_device_base<w65c02_device>, public device_mixer_interface {
public:
gew12_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -21,13 +21,13 @@ public:
template<offs_t Num> auto port_out_cb() { return m_out_cb[Num].bind(); }
protected:
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void internal_update(u64 current_time) override;
- using m6502_mcu_device_base<m65c02_device>::internal_update;
+ using m6502_mcu_device_base<w65c02_device>::internal_update;
enum
{
@@ -56,7 +56,7 @@ protected:
void irq_update();
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
u8 m_irq_pending, m_irq_enable;
diff --git a/src/devices/cpu/m6502/gew7.cpp b/src/devices/cpu/m6502/gew7.cpp
index 7fd85ad2538..76e1378d9e8 100644
--- a/src/devices/cpu/m6502/gew7.cpp
+++ b/src/devices/cpu/m6502/gew7.cpp
@@ -19,8 +19,8 @@
DEFINE_DEVICE_TYPE(GEW7, gew7_device, "gew7", "Yamaha YMW270-F (GEW7)")
gew7_device::gew7_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : m6502_mcu_device_base<m65c02_device>(mconfig, GEW7, tag, owner, clock)
- , device_mixer_interface(mconfig, *this, 2)
+ : m6502_mcu_device_base<w65c02_device>(mconfig, GEW7, tag, owner, clock)
+ , device_mixer_interface(mconfig, *this)
, m_in_cb(*this, 0xff), m_out_cb(*this)
, m_rom(*this, DEVICE_SELF)
, m_bank(*this, "bank%u", 0U)
@@ -37,13 +37,13 @@ void gew7_device::device_add_mconfig(machine_config &config)
{
GEW7_PCM(config, m_pcm, DERIVED_CLOCK(1, 1));
m_pcm->set_device_rom_tag(m_rom);
- m_pcm->add_route(0, *this, 1.0, AUTO_ALLOC_INPUT, 0);
- m_pcm->add_route(1, *this, 1.0, AUTO_ALLOC_INPUT, 1);
+ m_pcm->add_route(0, *this, 1.0, 0);
+ m_pcm->add_route(1, *this, 1.0, 1);
}
void gew7_device::device_start()
{
- m6502_mcu_device_base<m65c02_device>::device_start();
+ m6502_mcu_device_base<w65c02_device>::device_start();
m_bank_mask = device_generic_cart_interface::map_non_power_of_two(
unsigned(m_rom->bytes() >> 14),
@@ -68,7 +68,7 @@ void gew7_device::device_start()
void gew7_device::device_reset()
{
- m6502_mcu_device_base<m65c02_device>::device_reset();
+ m6502_mcu_device_base<w65c02_device>::device_reset();
internal_update();
m_timer_stat = m_timer_en = 0;
@@ -117,7 +117,7 @@ void gew7_device::timer_stat_w(u8 data)
m_timer_stat &= ~data;
if (!(m_timer_stat & 3))
- set_input_line(M65C02_IRQ_LINE, CLEAR_LINE);
+ set_input_line(W65C02_IRQ_LINE, CLEAR_LINE);
internal_update();
}
@@ -165,7 +165,7 @@ u64 gew7_device::timer_update(int num, u64 current_time)
if (elapsed > m_timer_count[num])
{
m_timer_stat |= (1 << num);
- set_input_line(M65C02_IRQ_LINE, ASSERT_LINE);
+ set_input_line(W65C02_IRQ_LINE, ASSERT_LINE);
}
m_timer_count[num] -= elapsed;
diff --git a/src/devices/cpu/m6502/gew7.h b/src/devices/cpu/m6502/gew7.h
index fd29e7402c8..5c9a891559e 100644
--- a/src/devices/cpu/m6502/gew7.h
+++ b/src/devices/cpu/m6502/gew7.h
@@ -11,10 +11,10 @@
#define MAME_CPU_M6502_GEW7_H
#include "m6502mcu.h"
-#include "m65c02.h"
+#include "w65c02.h"
#include "sound/gew7.h"
-class gew7_device : public m6502_mcu_device_base<m65c02_device>, public device_mixer_interface
+class gew7_device : public m6502_mcu_device_base<w65c02_device>, public device_mixer_interface
{
public:
gew7_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock);
@@ -26,13 +26,13 @@ public:
protected:
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void internal_update(u64 current_time) override;
- using m6502_mcu_device_base<m65c02_device>::internal_update;
+ using m6502_mcu_device_base<w65c02_device>::internal_update;
u8 timer_stat_r();
void timer_stat_w(u8 data);
@@ -49,7 +49,7 @@ protected:
u8 port_ddr_r(offs_t offset);
void port_ddr_w(offs_t offset, u8 data);
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
u8 m_timer_stat, m_timer_en;
u16 m_timer_count[2];
diff --git a/src/devices/cpu/m6502/m3745x.h b/src/devices/cpu/m6502/m3745x.h
index bab3558e0a2..9f7bc5acc93 100644
--- a/src/devices/cpu/m6502/m3745x.h
+++ b/src/devices/cpu/m6502/m3745x.h
@@ -56,8 +56,8 @@ protected:
m3745x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual space_config_vector memory_space_config() const override;
// device_execute_interface overrides
@@ -90,7 +90,7 @@ class m37450_device : public m3745x_device
public:
m37450_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void m37450_map(address_map &map);
+ void m37450_map(address_map &map) ATTR_COLD;
protected:
m37450_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
diff --git a/src/devices/cpu/m6502/m37640.cpp b/src/devices/cpu/m6502/m37640.cpp
new file mode 100644
index 00000000000..7341e283178
--- /dev/null
+++ b/src/devices/cpu/m6502/m37640.cpp
@@ -0,0 +1,31 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
+// Mitsubishi M37640 8-bit microcontroller with usb support
+
+#include "emu.h"
+#include "m37640.h"
+
+DEFINE_DEVICE_TYPE(M37640, m37640_device, "m37640", "Mitsubishi M37640")
+
+m37640_device::m37640_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u32 mode) :
+ m740_device(mconfig, M37640, tag, owner, clock),
+ m_mode(mode)
+{
+ program_config.m_internal_map = address_map_constructor(FUNC(m37640_device::map), this);
+}
+
+void m37640_device::device_start()
+{
+ m740_device::device_start();
+}
+
+void m37640_device::device_reset()
+{
+ m740_device::device_start();
+}
+
+void m37640_device::map(address_map &map)
+{
+ (void)m_mode;
+}
diff --git a/src/devices/cpu/m6502/m37640.h b/src/devices/cpu/m6502/m37640.h
new file mode 100644
index 00000000000..efd7077a426
--- /dev/null
+++ b/src/devices/cpu/m6502/m37640.h
@@ -0,0 +1,38 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+#ifndef MAME_CPU_M6502_M37640_H
+#define MAME_CPU_M6502_M37640_H
+
+#pragma once
+
+#include "m740.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> m37640_device
+
+class m37640_device : public m740_device
+{
+public:
+ enum {
+ INT1_LINE = INPUT_LINE_IRQ0,
+ INT2_LINE,
+ };
+
+ m37640_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, u32 mode = 2);
+
+protected:
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+private:
+ u32 m_mode;
+
+ void map(address_map &map) ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(M37640, m37640_device)
+
+#endif // MAME_CPU_M6502_M37640_H
diff --git a/src/devices/cpu/m6502/m4510.cpp b/src/devices/cpu/m6502/m4510.cpp
index 46e8994319a..4e6f97b56e4 100644
--- a/src/devices/cpu/m6502/m4510.cpp
+++ b/src/devices/cpu/m6502/m4510.cpp
@@ -20,7 +20,10 @@ DEFINE_DEVICE_TYPE(M4510, m4510_device, "m4510", "CSG 4510")
m4510_device::m4510_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m65ce02_device(mconfig, M4510, tag, owner, clock),
map_enable(0),
- nomap(false)
+ nomap(false),
+ read_port(*this, 0),
+ write_port(*this),
+ dir(0), port(0), drive(0)
{
program_config.m_addr_width = 20;
program_config.m_logaddr_width = 16;
@@ -28,6 +31,14 @@ m4510_device::m4510_device(const machine_config &mconfig, const char *tag, devic
sprogram_config.m_addr_width = 20;
sprogram_config.m_logaddr_width = 16;
sprogram_config.m_page_shift = 13;
+ pullup = 0x00;
+ floating = 0x00;
+}
+
+void m4510_device::set_pulls(uint8_t _pullup, uint8_t _floating)
+{
+ pullup = _pullup;
+ floating = _floating;
}
std::unique_ptr<util::disasm_interface> m4510_device::create_disassembler()
@@ -35,11 +46,21 @@ std::unique_ptr<util::disasm_interface> m4510_device::create_disassembler()
return std::make_unique<m4510_disassembler>();
}
+void m4510_device::init_port()
+{
+ save_item(NAME(pullup));
+ save_item(NAME(floating));
+ save_item(NAME(dir));
+ save_item(NAME(port));
+ save_item(NAME(drive));
+}
+
void m4510_device::device_start()
{
mintf = std::make_unique<mi_4510>(this);
m65ce02_device::init();
+ init_port();
save_item(NAME(map_offset));
save_item(NAME(map_enable));
@@ -51,10 +72,44 @@ void m4510_device::device_reset()
map_enable = 0;
nomap = true;
- // Wild guess, this setting makes the cpu start executing some code in the c65 driver
- //map_offset[1] = 0x2e000;
- //map_enable = 0x80;
m65ce02_device::device_reset();
+ dir = 0xff;
+ port = 0xff;
+ drive = 0xff;
+ update_port();
+}
+
+void m4510_device::update_port()
+{
+ drive = (port & dir) | (drive & ~dir);
+ write_port((port & dir) | (pullup & ~dir));
+}
+
+uint8_t m4510_device::get_port()
+{
+ return (port & dir) | (pullup & ~dir);
+}
+
+uint8_t m4510_device::dir_r()
+{
+ return dir;
+}
+
+uint8_t m4510_device::port_r()
+{
+ return ((read_port() | (floating & drive)) & ~dir) | (port & dir);
+}
+
+void m4510_device::dir_w(uint8_t data)
+{
+ dir = data;
+ update_port();
+}
+
+void m4510_device::port_w(uint8_t data)
+{
+ port = data;
+ update_port();
}
bool m4510_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
@@ -75,22 +130,41 @@ m4510_device::mi_4510::mi_4510(m4510_device *_base)
uint8_t m4510_device::mi_4510::read(uint16_t adr)
{
- return program.read_byte(base->map(adr));
+ uint8_t res = program.read_byte(base->map(adr));
+ if(adr == 0x0000)
+ res = base->dir_r();
+ else if(adr == 0x0001)
+ res = base->port_r();
+ return res;
}
uint8_t m4510_device::mi_4510::read_sync(uint16_t adr)
{
- return csprogram.read_byte(base->map(adr));
+ uint8_t res = csprogram.read_byte(base->map(adr));
+ if(adr == 0x0000)
+ res = base->dir_r();
+ else if(adr == 0x0001)
+ res = base->port_r();
+ return res;
}
uint8_t m4510_device::mi_4510::read_arg(uint16_t adr)
{
- return cprogram.read_byte(base->map(adr));
+ uint8_t res = cprogram.read_byte(base->map(adr));
+ if(adr == 0x0000)
+ res = base->dir_r();
+ else if(adr == 0x0001)
+ res = base->port_r();
+ return res;
}
void m4510_device::mi_4510::write(uint16_t adr, uint8_t val)
{
program.write_byte(base->map(adr), val);
+ if(adr == 0x0000)
+ base->dir_w(val);
+ else if(adr == 0x0001)
+ base->port_w(val);
}
#include "cpu/m6502/m4510.hxx"
diff --git a/src/devices/cpu/m6502/m4510.h b/src/devices/cpu/m6502/m4510.h
index 6f5692fb3df..c0e21977c2b 100644
--- a/src/devices/cpu/m6502/m4510.h
+++ b/src/devices/cpu/m6502/m4510.h
@@ -26,6 +26,12 @@ public:
bool get_nomap() const { return nomap; }
+ uint8_t get_port();
+ void set_pulls(uint8_t pullup, uint8_t pulldown);
+
+ auto read_callback() { return read_port.bind(); }
+ auto write_callback() { return write_port.bind(); }
+
protected:
uint32_t map_offset[2];
uint8_t map_enable;
@@ -43,8 +49,13 @@ protected:
virtual void write(uint16_t adr, uint8_t val) override;
};
- virtual void device_start() override;
- virtual void device_reset() override;
+ devcb_read8 read_port;
+ devcb_write8 write_port;
+
+ uint8_t pullup, floating, dir, port, drive;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
inline uint32_t map(uint16_t adr) {
@@ -56,6 +67,14 @@ protected:
return adr;
}
+ uint8_t dir_r();
+ void dir_w(uint8_t data);
+ uint8_t port_r();
+ void port_w(uint8_t data);
+
+ void init_port();
+ void update_port();
+
#define O(o) void o ## _full(); void o ## _partial()
// 4510 opcodes
diff --git a/src/devices/cpu/m6502/m50734.h b/src/devices/cpu/m6502/m50734.h
index 94ade4ad585..a8c8a9a093c 100644
--- a/src/devices/cpu/m6502/m50734.h
+++ b/src/devices/cpu/m6502/m50734.h
@@ -77,8 +77,8 @@ public:
protected:
// device_t implementation
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
@@ -125,7 +125,7 @@ private:
u8 timer_x_r(offs_t offset);
void timer_x_w(offs_t offset, u8 data);
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
const address_space_config m_data_config;
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
diff --git a/src/devices/cpu/m6502/m5074x.cpp b/src/devices/cpu/m6502/m5074x.cpp
index eb24e461e1f..3295f2d28a9 100644
--- a/src/devices/cpu/m6502/m5074x.cpp
+++ b/src/devices/cpu/m6502/m5074x.cpp
@@ -7,6 +7,13 @@
#include "emu.h"
#include "m5074x.h"
+#define LOG_ADC (1U << 1)
+#define LOG_PORTS (1U << 2)
+#define LOG_TIMER (1U << 3)
+
+#define VERBOSE (0)
+#include "logmacro.h"
+
//**************************************************************************
// MACROS / CONSTANTS
//**************************************************************************
@@ -147,7 +154,7 @@ TIMER_CALLBACK_MEMBER(m5074x_device::timerx_tick)
{
m_tmrx--;
- if (m_tmrx <= 0)
+ if (m_tmrx == 0)
{
m_tmrctrl |= TMRC_TMRXREQ;
m_tmrx = m_tmrxlatch;
@@ -230,12 +237,14 @@ void m5074x_device::recalc_timer(int timer)
case 0:
hz = clock() / 16;
hz /= (m_tmr12pre + 2);
+ LOGMASKED(LOG_TIMER, "%s: timer 1, prescale %02x, fire at %d Hz\n", machine().describe_context(), m_tmr12pre, hz);
m_timers[TIMER_1]->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz));
break;
case 1:
hz = clock() / 16;
hz /= (m_tmr12pre + 2);
+ LOGMASKED(LOG_TIMER, "%s: timer 2, prescale %02x, fire at %d Hz\n", machine().describe_context(), m_tmr12pre, hz);
m_timers[TIMER_2]->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz));
break;
@@ -247,12 +256,14 @@ void m5074x_device::recalc_timer(int timer)
// stop bit?
if (m_tmrctrl & TMRC_TMRXHLT)
{
+ LOGMASKED(LOG_TIMER, "%s: timer X halted\n", machine().describe_context());
m_timers[TIMER_X]->adjust(attotime::never, 0, attotime::never);
}
else
{
hz = clock() / 16;
hz /= (m_tmrxpre + 2);
+ LOGMASKED(LOG_TIMER, "%s: timer X, prescale %02x, fire at %d Hz\n", machine().describe_context(), m_tmrxpre, hz);
m_timers[TIMER_X]->adjust(attotime::from_hz(hz), 0, attotime::from_hz(hz));
}
}
@@ -266,6 +277,9 @@ void m5074x_device::recalc_timer(int timer)
void m5074x_device::send_port(uint8_t offset, uint8_t data)
{
+ LOGMASKED(LOG_PORTS, "%s: Write port %d, data %02x DDR %02x pull-ups %02x\n", machine().describe_context(), offset,
+ data, m_ddrs[offset], m_pullups[offset]);
+
m_write_p[offset](data);
}
@@ -278,6 +292,9 @@ uint8_t m5074x_device::read_port(uint8_t offset)
// OR in ddr-masked version of port writes
incoming |= (m_ports[offset] & m_ddrs[offset]);
+ LOGMASKED(LOG_PORTS, "%s: Read port %d, incoming %02x DDR %02x output latch %02x\n", machine().describe_context(), offset,
+ m_read_p[offset](), m_ddrs[offset], m_ports[offset]);
+
return incoming;
}
@@ -406,31 +423,34 @@ uint8_t m5074x_device::tmrirq_r(offs_t offset)
void m5074x_device::tmrirq_w(offs_t offset, uint8_t data)
{
-// printf("%02x to tmrirq @ %d\n", data, offset);
-
switch (offset)
{
case 0:
m_tmr12pre = data;
+ LOGMASKED(LOG_TIMER, "%s: timer 1/2 prescale %02x\n", machine().describe_context(), data);
recalc_timer(0);
recalc_timer(1);
break;
case 1:
m_tmr1 = m_tmr1latch = data;
+ LOGMASKED(LOG_TIMER, "%s: timer 1 latch %02x\n", machine().describe_context(), data);
break;
case 2:
m_tmr2 = m_tmr2latch = data;
+ LOGMASKED(LOG_TIMER, "%s: timer 2 latch %02x\n", machine().describe_context(), data);
break;
case 3:
- m_tmrxpre = m_tmrxlatch = data;
+ m_tmrxpre = data;
+ LOGMASKED(LOG_TIMER, "%s: timer X prescale %02x\n", machine().describe_context(), data);
recalc_timer(2);
break;
case 4:
- m_tmrx = data;
+ m_tmrx = m_tmrxlatch = data;
+ LOGMASKED(LOG_TIMER, "%s: timer X latch %02x\n", machine().describe_context(), data);
break;
case 5:
@@ -548,7 +568,7 @@ uint8_t m50753_device::ad_r()
void m50753_device::ad_start_w(uint8_t data)
{
- logerror("%s: A-D start (IN%d)\n", machine().describe_context(), m_ad_control & 0x07);
+ LOGMASKED(LOG_ADC, "%s: A-D start (IN%d)\n", machine().describe_context(), m_ad_control & 0x07);
// starting a conversion. M50753 documentation says conversion time is 72 microseconds.
m_timers[TIMER_ADC]->adjust(attotime::from_usec(72));
@@ -561,6 +581,7 @@ uint8_t m50753_device::ad_control_r()
void m50753_device::ad_control_w(uint8_t data)
{
+ LOGMASKED(LOG_ADC, "%s: %02x to A-D control\n", machine().describe_context(), data);
m_ad_control = data & 0x0f;
}
diff --git a/src/devices/cpu/m6502/m5074x.h b/src/devices/cpu/m6502/m5074x.h
index 2b860a56e83..f466f212573 100644
--- a/src/devices/cpu/m6502/m5074x.h
+++ b/src/devices/cpu/m6502/m5074x.h
@@ -54,8 +54,8 @@ protected:
m5074x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, address_map_constructor internal_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual space_config_vector memory_space_config() const override;
// device_execute_interface overrides (TODO: /8 in M50740A/41/52/57/58 SLW mode)
@@ -96,7 +96,7 @@ protected:
m50740_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
private:
- void m50740_map(address_map &map);
+ void m50740_map(address_map &map) ATTR_COLD;
};
class m50741_device : public m5074x_device
@@ -108,7 +108,7 @@ protected:
m50741_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
private:
- void m50741_map(address_map &map);
+ void m50741_map(address_map &map) ATTR_COLD;
};
class m50753_device : public m5074x_device
@@ -130,15 +130,15 @@ protected:
m50753_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual TIMER_CALLBACK_MEMBER(adc_complete) override;
private:
- void m50753_map(address_map &map);
+ void m50753_map(address_map &map) ATTR_COLD;
uint8_t ad_r();
uint8_t in_r();
diff --git a/src/devices/cpu/m6502/m6500_1.cpp b/src/devices/cpu/m6502/m6500_1.cpp
index 6ba2f9c3919..8aa30f08c89 100644
--- a/src/devices/cpu/m6502/m6500_1.cpp
+++ b/src/devices/cpu/m6502/m6500_1.cpp
@@ -12,10 +12,10 @@
* Sixteen-bit programmable counter/latch
The onboad clock generator has mask options for an external crystal
- (2MHz to 6MHz) an external TTL-compatible clock with a 300Ω pull-up
+ (2MHz to 6MHz), an external TTL-compatible clock with a 300Ω pull-up
resistor (2MHz to 6MHz), or an RC oscillator with an external 47kΩ
resistor and internal capacitor (nominally 2MHz). The clock is
- divided by two to generate the two-phase CPU code clock.
+ divided by two to generate the two-phase CPU core clock.
There is no on-board power-on reset generator. The /RES pin must be
held low (asserted) for at least eight phase 2 clock cycles after
@@ -45,7 +45,7 @@
on the CNTR pin in event counter mode is half the phase 2 clock
rate. This suggests that an internal flag is set when a rasing edge
is detected on CNTR and reset when the counter is synchronously
- decremented. This is not emulated - for simplicity the counter is
+ decremented. This is not emulated - for simplicity, the counter is
asynchronously decremented on detecting a rising edge on CNTR.
The CNTR pin has an active low driver and internal passive pull-up.
@@ -59,14 +59,14 @@
is unknown what other differences these devices have.
TODO:
- - For some reason most if not all Amiga MCU programs accesses arbitrary
- zero page 0x90-0xff with a back-to-back cmp($00, x) opcode at
- PC=c06-c08 with the actual result discarded. X can be any value in
- the 0x90-0xff range, depending on the last user keypress row source
- e.g. 0xdf-0xe0 for 'A', 0xef-0xf0 for 'Q', 0xfb-0xfc for function
- keys.
- This can be extremely verbose in the logging facility so we currently
- nop it out for the time being.
+ - For some reason most if not all Amiga MCU programs access
+ arbitrary zero page 0x90-0xff with a back-to-back cmp($00, x)
+ opcode at PC=c06-c08 with the actual result discarded. X can be
+ any value in the 0x90-0xff range, depending on the last user
+ keypress row source e.g. 0xdf-0xe0 for 'A', 0xef-0xf0 for 'Q',
+ 0xfb-0xfc for function keys.
+ This can be extremely verbose in the logging facility so we nop it
+ out for the time being.
***************************************************************************/
diff --git a/src/devices/cpu/m6502/m6500_1.h b/src/devices/cpu/m6502/m6500_1.h
index 15af85ff417..0736e927ae5 100644
--- a/src/devices/cpu/m6502/m6500_1.h
+++ b/src/devices/cpu/m6502/m6500_1.h
@@ -77,8 +77,8 @@ protected:
M6500_1_LC
};
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override;
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override;
@@ -109,7 +109,7 @@ protected:
TIMER_CALLBACK_MEMBER(set_cntr_in);
void toggle_cntr();
- void memory_map(address_map &map);
+ void memory_map(address_map &map) ATTR_COLD;
private:
devcb_read8::array<4> m_port_in_cb;
diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp
index c704a114e5e..e72fd74459a 100644
--- a/src/devices/cpu/m6502/m6502.cpp
+++ b/src/devices/cpu/m6502/m6502.cpp
@@ -140,11 +140,6 @@ uint32_t m6502_device::execute_max_cycles() const noexcept
return 10;
}
-uint32_t m6502_device::execute_input_lines() const noexcept
-{
- return NMI_LINE+1;
-}
-
bool m6502_device::execute_input_edge_triggered(int inputnum) const noexcept
{
return inputnum == NMI_LINE || inputnum == V_LINE;
@@ -399,7 +394,7 @@ void m6502_device::execute_run()
if(inst_state < 0xff00) {
PPC = NPC;
inst_state = IR | inst_state_base;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(pc_to_external(NPC));
}
do_exec_full();
@@ -485,14 +480,16 @@ void m6502_device::state_string_export(const device_state_entry &entry, std::str
void m6502_device::prefetch_start()
{
sync = true;
- sync_w(ASSERT_LINE);
+ if(!sync_w.isunset())
+ sync_w(ASSERT_LINE);
NPC = PC;
}
void m6502_device::prefetch_end()
{
sync = false;
- sync_w(CLEAR_LINE);
+ if(!sync_w.isunset())
+ sync_w(CLEAR_LINE);
if((nmi_pending || ((irq_state || apu_irq_state) && !(P & F_I))) && !inhibit_interrupts) {
irq_taken = true;
@@ -504,7 +501,8 @@ void m6502_device::prefetch_end()
void m6502_device::prefetch_end_noirq()
{
sync = false;
- sync_w(CLEAR_LINE);
+ if(!sync_w.isunset())
+ sync_w(CLEAR_LINE);
PC++;
}
diff --git a/src/devices/cpu/m6502/m6502.h b/src/devices/cpu/m6502/m6502.h
index 0e0864f8881..112630dfd50 100644
--- a/src/devices/cpu/m6502/m6502.h
+++ b/src/devices/cpu/m6502/m6502.h
@@ -94,14 +94,13 @@ protected:
virtual void init();
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual bool cpu_is_interruptible() const override { return true; }
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override;
diff --git a/src/devices/cpu/m6502/m6502.txt b/src/devices/cpu/m6502/m6502.txt
index 788ab6fad3d..2d4564ee0be 100644
--- a/src/devices/cpu/m6502/m6502.txt
+++ b/src/devices/cpu/m6502/m6502.txt
@@ -86,11 +86,11 @@ several other CMOS variants
additional commands
atari lynx bastian schicks bll
-integrated m65sc02 cpu core
-no bbr bbs instructions, else m65c02 compatible
+integrated g65sc02 cpu core
+no bbr bbs instructions, else w65c02 compatible
watara supervision
-integrated m65c02 cpu core (or m65sc02 or m65ce02?)
+integrated w65c02 cpu core (or g65sc02 or m65ce02?)
gte65816 (nintendo snes)
diff --git a/src/devices/cpu/m6502/m6502make.py b/src/devices/cpu/m6502/m6502make.py
index 3be6a3f6f3c..99b4320cc11 100755
--- a/src/devices/cpu/m6502/m6502make.py
+++ b/src/devices/cpu/m6502/m6502make.py
@@ -85,6 +85,7 @@ def save_opcodes(f, device, opcodes):
for ins in instructions:
line_type = identify_line_type(ins)
if line_type == "EAT":
+ emit(f, "\tdebugger_wait_hook();")
emit(f, "\ticount = 0;")
emit(f, "\tinst_substate = %d;" % substate)
emit(f, "\treturn;")
@@ -114,6 +115,7 @@ def save_opcodes(f, device, opcodes):
for ins in instructions:
line_type = identify_line_type(ins)
if line_type == "EAT":
+ emit(f, "\tdebugger_wait_hook();")
emit(f, "\ticount = 0;")
emit(f, "\tinst_substate = %d;" % substate)
emit(f, "\treturn;")
diff --git a/src/devices/cpu/m6502/m6502mcu.ipp b/src/devices/cpu/m6502/m6502mcu.ipp
index 36039f0b693..d4fd6833f54 100644
--- a/src/devices/cpu/m6502/m6502mcu.ipp
+++ b/src/devices/cpu/m6502/m6502mcu.ipp
@@ -55,7 +55,7 @@ void m6502_mcu_device_base<Base>::execute_run()
if(this->inst_state < 0xff00) {
this->PPC = this->NPC;
this->inst_state = this->IR | this->inst_state_base;
- if(this->machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(this->debugger_enabled())
this->debugger_instruction_hook(this->NPC);
}
this->do_exec_full();
diff --git a/src/devices/cpu/m6502/m6509.h b/src/devices/cpu/m6502/m6509.h
index 4359c691c0e..383bfcc178a 100644
--- a/src/devices/cpu/m6502/m6509.h
+++ b/src/devices/cpu/m6502/m6509.h
@@ -36,8 +36,8 @@ protected:
virtual void write_9(uint16_t adr, uint8_t val) override;
};
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual offs_t pc_to_external(u16 pc) override;
uint8_t bank_i, bank_y;
diff --git a/src/devices/cpu/m6502/m6510.cpp b/src/devices/cpu/m6502/m6510.cpp
index fa9d36731c5..c54965a2f04 100644
--- a/src/devices/cpu/m6502/m6510.cpp
+++ b/src/devices/cpu/m6502/m6510.cpp
@@ -64,9 +64,9 @@ void m6510_device::device_start()
void m6510_device::device_reset()
{
m6502_device::device_reset();
- dir = 0x00;
- port = 0x00;
- drive = 0x00;
+ dir = 0xff;
+ port = 0xff;
+ drive = 0xff;
update_port();
}
diff --git a/src/devices/cpu/m6502/m6510.h b/src/devices/cpu/m6502/m6510.h
index 6f9bac1fff8..b7d4e585b86 100644
--- a/src/devices/cpu/m6502/m6510.h
+++ b/src/devices/cpu/m6502/m6510.h
@@ -49,8 +49,8 @@ protected:
uint8_t pullup, floating, dir, port, drive;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
uint8_t dir_r();
void dir_w(uint8_t data);
@@ -79,7 +79,7 @@ public:
m6508_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
class mi_6508 : public memory_interface {
public:
diff --git a/src/devices/cpu/m6502/m65ce02.cpp b/src/devices/cpu/m6502/m65ce02.cpp
index a787eb9dcef..22e6bd5f3c5 100644
--- a/src/devices/cpu/m6502/m65ce02.cpp
+++ b/src/devices/cpu/m6502/m65ce02.cpp
@@ -20,7 +20,7 @@ m65ce02_device::m65ce02_device(const machine_config &mconfig, const char *tag, d
}
m65ce02_device::m65ce02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- m65c02_device(mconfig, type, tag, owner, clock), TMP3(0), Z(0), B(0)
+ w65c02_device(mconfig, type, tag, owner, clock), TMP3(0), Z(0), B(0)
{
}
@@ -31,7 +31,7 @@ std::unique_ptr<util::disasm_interface> m65ce02_device::create_disassembler()
void m65ce02_device::init()
{
- m65c02_device::init();
+ w65c02_device::init();
state_add(M65CE02_Z, "Z", Z);
state_add(M65CE02_B, "B", B).callimport().formatstr("%2s");
save_item(NAME(B));
@@ -51,7 +51,7 @@ void m65ce02_device::device_start()
void m65ce02_device::device_reset()
{
- m65c02_device::device_reset();
+ w65c02_device::device_reset();
Z = 0x00;
B = 0x0000;
}
diff --git a/src/devices/cpu/m6502/m65ce02.h b/src/devices/cpu/m6502/m65ce02.h
index 6e27c66e010..cf0a48e9a5b 100644
--- a/src/devices/cpu/m6502/m65ce02.h
+++ b/src/devices/cpu/m6502/m65ce02.h
@@ -12,9 +12,9 @@
#pragma once
-#include "m65c02.h"
+#include "w65c02.h"
-class m65ce02_device : public m65c02_device {
+class m65ce02_device : public w65c02_device {
public:
m65ce02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -30,8 +30,8 @@ protected:
uint16_t B; /* Zero page base address (always xx00) */
virtual void init() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/m6502/m65sc02.cpp b/src/devices/cpu/m6502/m65sc02.cpp
deleted file mode 100644
index b9245b5fe13..00000000000
--- a/src/devices/cpu/m6502/m65sc02.cpp
+++ /dev/null
@@ -1,19 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-/***************************************************************************
-
- m65sc02.cpp
-
- Rockwell-class 65c02 with internal static registers, making clock stoppable?
-
-***************************************************************************/
-
-#include "emu.h"
-#include "m65sc02.h"
-
-DEFINE_DEVICE_TYPE(M65SC02, m65sc02_device, "m65sc02", "GTE G65SC02")
-
-m65sc02_device::m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- r65c02_device(mconfig, M65SC02, tag, owner, clock)
-{
-}
diff --git a/src/devices/cpu/m6502/m65sc02.h b/src/devices/cpu/m6502/m65sc02.h
deleted file mode 100644
index 686411c0b22..00000000000
--- a/src/devices/cpu/m6502/m65sc02.h
+++ /dev/null
@@ -1,29 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Olivier Galibert
-/***************************************************************************
-
- m65sc02.h
-
- Rockwell-class 65c02 with internal static registers, making clock stoppable?
-
-***************************************************************************/
-
-#ifndef MAME_CPU_M6502_M65SC02_H
-#define MAME_CPU_M6502_M65SC02_H
-
-#include "r65c02.h"
-
-class m65sc02_device : public r65c02_device {
-public:
- m65sc02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-enum {
- M65SC02_IRQ_LINE = m6502_device::IRQ_LINE,
- M65SC02_NMI_LINE = m6502_device::NMI_LINE,
- M65SC02_SET_OVERFLOW = m6502_device::V_LINE
-};
-
-DECLARE_DEVICE_TYPE(M65SC02, m65sc02_device)
-
-#endif // MAME_CPU_M6502_M65SC02_H
diff --git a/src/devices/cpu/m6502/m740.h b/src/devices/cpu/m6502/m740.h
index de483675f81..6c64c0af79c 100644
--- a/src/devices/cpu/m6502/m740.h
+++ b/src/devices/cpu/m6502/m740.h
@@ -37,8 +37,8 @@ public:
};
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/m6502/m7501.cpp b/src/devices/cpu/m6502/m7501.cpp
index 59f62ed8046..30921d1664f 100644
--- a/src/devices/cpu/m6502/m7501.cpp
+++ b/src/devices/cpu/m6502/m7501.cpp
@@ -11,7 +11,7 @@
#include "emu.h"
#include "m7501.h"
-DEFINE_DEVICE_TYPE(M7501, m7501_device, "m7501", "M7501")
+DEFINE_DEVICE_TYPE(M7501, m7501_device, "m7501", "MOS Technology 7501")
m7501_device::m7501_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
m6510_device(mconfig, M7501, tag, owner, clock)
diff --git a/src/devices/cpu/m6502/om65ce02.lst b/src/devices/cpu/m6502/om65ce02.lst
index 6c005b321f4..800ce84488d 100644
--- a/src/devices/cpu/m6502/om65ce02.lst
+++ b/src/devices/cpu/m6502/om65ce02.lst
@@ -672,12 +672,12 @@ dew_zpg
TMP2++;
TMP = set_h(TMP, read(B|TMP2));
P &= ~(F_N|F_Z);
- TMP++;
+ TMP--;
if(!TMP)
P |= F_Z;
else if(TMP & 0x8000)
P |= F_N;
- TMP2++;
+ TMP2--;
write(B|TMP2, TMP);
TMP2++;
write(B|TMP2, TMP >> 8);
@@ -1198,10 +1198,10 @@ phw_aba
PC++;
TMP3 = read(TMP);
TMP3 = set_h(TMP3, read(TMP+1));
- dec_SP_ce();
write(SP, TMP3);
dec_SP_ce();
write(SP, TMP3 >> 8);
+ dec_SP_ce();
prefetch();
phw_iw2
@@ -1209,10 +1209,10 @@ phw_iw2
PC++;
TMP = set_h(TMP, read_pc());
PC++;
- dec_SP_ce();
write(SP, TMP);
dec_SP_ce();
write(SP, TMP >> 8);
+ dec_SP_ce();
prefetch();
phx_ce_imp
@@ -1657,7 +1657,7 @@ stz_ce_aba
PC++;
TMP = set_h(TMP, read_pc());
PC++;
- write(TMP, A);
+ write(TMP, Z);
prefetch();
stz_ce_abx
@@ -1665,7 +1665,7 @@ stz_ce_abx
PC++;
TMP = set_h(TMP, read_pc());
PC++;
- write(TMP+X, A);
+ write(TMP+X, Z);
prefetch();
stz_ce_zpg
diff --git a/src/devices/cpu/m6502/om65c02.lst b/src/devices/cpu/m6502/ow65c02.lst
index a3a0d1e6cde..d4debf9f1fc 100644
--- a/src/devices/cpu/m6502/om65c02.lst
+++ b/src/devices/cpu/m6502/ow65c02.lst
@@ -1,6 +1,6 @@
# license:BSD-3-Clause
# copyright-holders:Olivier Galibert
-# m65c02 opcodes
+# w65c02 opcodes
adc_c_aba
TMP = read_pc();
diff --git a/src/devices/cpu/m6502/oxavix.lst b/src/devices/cpu/m6502/oxavix.lst
index 9d3c0dcfe95..84caf0a2277 100644
--- a/src/devices/cpu/m6502/oxavix.lst
+++ b/src/devices/cpu/m6502/oxavix.lst
@@ -4,7 +4,7 @@
callf_xa3
read_stack(SP);
- write_special_stack(get_codebank());
+ write_special_stack(SP, get_codebank());
dec_special_stack();
TMP2 = read_pc();
PC++;
@@ -40,7 +40,7 @@ retf_imp
inc_SP();
PC = set_h(PC, read_stack(SP));
inc_special_stack();
- TMP2 = read_special_stack();
+ TMP2 = read_special_stack(SP);
set_codebank(TMP2);
read_pc();
PC++;
@@ -55,7 +55,7 @@ brk_xav_imp
read_pc();
PC++;
}
- write_special_stack(get_codebank());
+ write_special_stack(SP, get_codebank());
set_codebank(0x00); // epo_efdx, rad_ping and rad_mtrk strongly suggest that interrupts must force bank 0 as code jumps to a ROM pointer stored earlier / a fixed pointer to a rom address in bank 0
dec_special_stack();
write_stack(SP, PC >> 8);
@@ -123,7 +123,7 @@ rti_xav_imp
inc_SP();
PC = set_h(PC, read_stack(SP));
inc_special_stack();
- TMP2 = read_special_stack();
+ TMP2 = read_special_stack(SP);
set_codebank(TMP2);
prefetch();
diff --git a/src/devices/cpu/m6502/oxavix2000.lst b/src/devices/cpu/m6502/oxavix2000.lst
index 536a1414bcf..ec61ee4067a 100644
--- a/src/devices/cpu/m6502/oxavix2000.lst
+++ b/src/devices/cpu/m6502/oxavix2000.lst
@@ -332,8 +332,10 @@ orapa_imp
prefetch();
andpa_imp
- fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc();
+ TMP = read_full_data(m_pa);
+ A &= TMP;
+ set_nz(A);
prefetch();
eorpa_imp
@@ -436,17 +438,19 @@ bit_xav_zpx
prefetch();
bit_abx
- fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
- read_pc();
+ TMP = read_pc();
+ PC++;
+ TMP = set_h(TMP, read_pc());
+ PC++;
+ TMP += X;
+ TMP2 = read(TMP);
+ do_bit(TMP2);
prefetch();
bit_imm
TMP = read_pc();
PC++;
- if(A & TMP)
- P &= ~F_Z;
- else
- P |= F_Z;
+ do_bit(TMP);
prefetch();
asr_xav_zpg
@@ -454,6 +458,7 @@ asr_xav_zpg
PC++;
TMP2 = read_zeropage(TMP);
do_asr(TMP2);
+ write_zeropage(TMP,TMP2);
prefetch();
asr_aba
@@ -468,8 +473,14 @@ asr_aba
prefetch();
asr_xav_zpx
- fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
+ TMP = read_pc();
read_pc();
+ PC++;
+ TMP = uint8_t(TMP+X);
+ TMP2 = read_zeropage(TMP);
+ read_zeropage((TMP+1) & 0xff);
+ TMP2 = do_asr(TMP2);
+ write_zeropage(TMP, TMP2);
prefetch();
asr_acc
@@ -477,13 +488,24 @@ asr_acc
prefetch();
asr_abx
- fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
- read_pc();
+ TMP = read_pc();
+ PC++;
+ TMP = set_h(TMP, read_pc());
+ PC++;
+ read(set_l(TMP, TMP+X));
+ TMP += X;
+ TMP2 = read(TMP);
+ read(TMP);
+ TMP2 = do_asr(TMP2);
+ write(TMP, TMP2);
prefetch();
cmc_imp
- fatalerror("unhandled opcode %02x%04x: %02x\n", m_codebank, PPC, inst_state);
read_pc();
+ TMP = P & F_C;
+ P &= ~F_C;
+ TMP = ~TMP;
+ P |= TMP & F_C;
prefetch();
sev_imp
diff --git a/src/devices/cpu/m6502/r65c02.cpp b/src/devices/cpu/m6502/r65c02.cpp
index 80187c5fb83..9dc65010c8c 100644
--- a/src/devices/cpu/m6502/r65c02.cpp
+++ b/src/devices/cpu/m6502/r65c02.cpp
@@ -5,6 +5,10 @@
r65c02.cpp
Rockwell 65c02, CMOS variant with bitwise instructions
+ Also licensed to Ricoh, who sold it as RP65C02.
+
+ TODO:
+ - are any of the CPU subtype differences meaningful to MAME?
***************************************************************************/
@@ -13,14 +17,26 @@
#include "r65c02d.h"
DEFINE_DEVICE_TYPE(R65C02, r65c02_device, "r65c02", "Rockwell R65C02")
+DEFINE_DEVICE_TYPE(R65C102, r65c102_device, "r65c102", "Rockwell R65C102")
+DEFINE_DEVICE_TYPE(R65C112, r65c112_device, "r65c112", "Rockwell R65C112")
+
+r65c02_device::r65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ w65c02_device(mconfig, type, tag, owner, clock)
+{
+}
r65c02_device::r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
r65c02_device(mconfig, R65C02, tag, owner, clock)
{
}
-r65c02_device::r65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- m65c02_device(mconfig, type, tag, owner, clock)
+r65c102_device::r65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ r65c02_device(mconfig, R65C102, tag, owner, clock)
+{
+}
+
+r65c112_device::r65c112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ r65c02_device(mconfig, R65C112, tag, owner, clock)
{
}
diff --git a/src/devices/cpu/m6502/r65c02.h b/src/devices/cpu/m6502/r65c02.h
index a28ccd9d932..d9be47465ee 100644
--- a/src/devices/cpu/m6502/r65c02.h
+++ b/src/devices/cpu/m6502/r65c02.h
@@ -11,9 +11,9 @@
#ifndef MAME_CPU_M6502_R65C02_H
#define MAME_CPU_M6502_R65C02_H
-#include "m65c02.h"
+#include "w65c02.h"
-class r65c02_device : public m65c02_device {
+class r65c02_device : public w65c02_device {
public:
r65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@@ -25,6 +25,20 @@ protected:
r65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
};
+class r65c102_device : public r65c02_device {
+public:
+ r65c102_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
+};
+
+class r65c112_device : public r65c02_device {
+public:
+ r65c112_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
enum {
R65C02_IRQ_LINE = m6502_device::IRQ_LINE,
R65C02_NMI_LINE = m6502_device::NMI_LINE,
@@ -32,5 +46,7 @@ enum {
};
DECLARE_DEVICE_TYPE(R65C02, r65c02_device)
+DECLARE_DEVICE_TYPE(R65C102, r65c102_device)
+DECLARE_DEVICE_TYPE(R65C112, r65c112_device)
#endif // MAME_CPU_M6502_R65C02_H
diff --git a/src/devices/cpu/m6502/r65c19.h b/src/devices/cpu/m6502/r65c19.h
index 6f018fb661b..7c53a74ecc4 100644
--- a/src/devices/cpu/m6502/r65c19.h
+++ b/src/devices/cpu/m6502/r65c19.h
@@ -23,8 +23,8 @@ public:
protected:
r65c19_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
@@ -114,8 +114,8 @@ protected:
virtual space_config_vector memory_space_config() const override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
u8 pbs_r();
void pbs_w(u8 data);
@@ -156,7 +156,7 @@ public:
l2800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(R65C19, r65c19_device)
diff --git a/src/devices/cpu/m6502/rp2a03.cpp b/src/devices/cpu/m6502/rp2a03.cpp
index 0d9153b42f7..4132e780d5a 100644
--- a/src/devices/cpu/m6502/rp2a03.cpp
+++ b/src/devices/cpu/m6502/rp2a03.cpp
@@ -45,7 +45,7 @@ rp2a03_core_device::rp2a03_core_device(const machine_config &mconfig, const char
rp2a03_device::rp2a03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: rp2a03_core_device(mconfig, type, tag, owner, clock)
- , device_mixer_interface(mconfig, *this, 1)
+ , device_mixer_interface(mconfig, *this)
, m_apu(*this, "nesapu")
{
program_config.m_internal_map = address_map_constructor(FUNC(rp2a03_device::rp2a03_map), this);
@@ -84,7 +84,7 @@ void rp2a03_device::device_add_mconfig(machine_config &config)
APU_2A03(config, m_apu, DERIVED_CLOCK(1,1));
m_apu->irq().set(FUNC(rp2a03_device::apu_irq));
m_apu->mem_read().set(FUNC(rp2a03_device::apu_read_mem));
- m_apu->add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0);
+ m_apu->add_route(ALL_OUTPUTS, *this, 1.0, 0);
}
void rp2a03g_device::device_add_mconfig(machine_config &config)
@@ -92,7 +92,7 @@ void rp2a03g_device::device_add_mconfig(machine_config &config)
NES_APU(config, m_apu, DERIVED_CLOCK(1,1));
m_apu->irq().set(FUNC(rp2a03g_device::apu_irq));
m_apu->mem_read().set(FUNC(rp2a03g_device::apu_read_mem));
- m_apu->add_route(ALL_OUTPUTS, *this, 1.0, AUTO_ALLOC_INPUT, 0);
+ m_apu->add_route(ALL_OUTPUTS, *this, 1.0, 0);
}
diff --git a/src/devices/cpu/m6502/rp2a03.h b/src/devices/cpu/m6502/rp2a03.h
index 3f5d952065a..4112bbbe152 100644
--- a/src/devices/cpu/m6502/rp2a03.h
+++ b/src/devices/cpu/m6502/rp2a03.h
@@ -45,14 +45,14 @@ class rp2a03_device : public rp2a03_core_device, public device_mixer_interface {
public:
rp2a03_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void rp2a03_map(address_map &map);
+ void rp2a03_map(address_map &map) ATTR_COLD;
protected:
rp2a03_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
required_device<nesapu_device> m_apu;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
void apu_irq(int state);
uint8_t apu_read_mem(offs_t offset);
@@ -64,7 +64,7 @@ public:
rp2a03g_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
};
/* These are the official XTAL values and clock rates used by Nintendo for
diff --git a/src/devices/cpu/m6502/st2204.h b/src/devices/cpu/m6502/st2204.h
index 63e537309f2..ba4ed6e9ee4 100644
--- a/src/devices/cpu/m6502/st2204.h
+++ b/src/devices/cpu/m6502/st2204.h
@@ -37,8 +37,8 @@ public:
protected:
st2204_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor int_map);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual u16 st2xxx_ireq_mask() const override { return 0x0f7f; }
virtual const char *st2xxx_irq_name(int i) const override;
@@ -59,7 +59,7 @@ protected:
virtual u8 st2xxx_uctr_mask() const override { return 0x0f; }
virtual u8 st2xxx_bctr_mask() const override { return 0x87; }
- void common_map(address_map &map);
+ void common_map(address_map &map) ATTR_COLD;
private:
class mi_st2204 : public mi_st2xxx {
@@ -126,7 +126,7 @@ private:
u8 dmem_r(offs_t offset);
void dmem_w(offs_t offset, u8 data);
- void int_map(address_map &map);
+ void int_map(address_map &map) ATTR_COLD;
devcb_write8 m_dac_callback;
@@ -154,7 +154,7 @@ protected:
virtual u8 st2xxx_lctr_mask() const override { return 0xe0; }
private:
- void int_map(address_map &map);
+ void int_map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(ST2202, st2202_device)
diff --git a/src/devices/cpu/m6502/st2205u.cpp b/src/devices/cpu/m6502/st2205u.cpp
index 8e63a20fab4..cf7639b9aca 100644
--- a/src/devices/cpu/m6502/st2205u.cpp
+++ b/src/devices/cpu/m6502/st2205u.cpp
@@ -101,25 +101,19 @@ st2302u_device::st2302u_device(const machine_config &mconfig, const char *tag, d
{
}
-void st2205u_base_device::sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs)
+void st2205u_base_device::sound_stream_update(sound_stream &stream)
{
- // reset the output stream
- outputs[0].fill(0);
- outputs[1].fill(0);
- outputs[2].fill(0);
- outputs[3].fill(0);
-
- int samples = outputs[0].samples();
+ int samples = stream.samples();
int outpos = 0;
while (samples-- != 0)
{
for (int channel = 0; channel < 4; channel++)
{
s16 adpcm_contribution = m_adpcm_level[channel];
- outputs[channel].add_int(outpos, adpcm_contribution * 0x10, 32768);
+ stream.add_int(channel, outpos, adpcm_contribution * 0x10, 32768);
auto psg_contribution = std::sin((double)m_psg_freqcntr[channel]/4096.0f);
- outputs[channel].add_int(outpos, psg_contribution * m_psg_amplitude[channel]*0x80,32768);
+ stream.add_int(channel, outpos, psg_contribution * m_psg_amplitude[channel]*0x80,32768);
}
outpos++;
diff --git a/src/devices/cpu/m6502/st2205u.h b/src/devices/cpu/m6502/st2205u.h
index bd73e481822..cad10f08b3b 100644
--- a/src/devices/cpu/m6502/st2205u.h
+++ b/src/devices/cpu/m6502/st2205u.h
@@ -61,10 +61,10 @@ public:
protected:
st2205u_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map, int data_bits, bool has_banked_ram);
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
// sound stream update overrides
- virtual void sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs) override;
+ virtual void sound_stream_update(sound_stream &stream) override;
virtual unsigned st2xxx_bt_divider(int n) const override;
virtual u8 st2xxx_prs_mask() const override { return 0xc0; }
@@ -138,7 +138,7 @@ protected:
u8 mulh_r();
void mulh_w(u8 data);
- void base_map(address_map &map);
+ void base_map(address_map &map) ATTR_COLD;
sound_stream *m_stream;
@@ -183,8 +183,8 @@ public:
st2205u_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual u16 st2xxx_ireq_mask() const override { return 0xdfff; }
virtual const char *st2xxx_irq_name(int i) const override;
@@ -244,7 +244,7 @@ private:
u8 bmem_r(offs_t offset);
void bmem_w(offs_t offset, u8 data);
- void int_map(address_map &map);
+ void int_map(address_map &map) ATTR_COLD;
u8 m_lbuf;
u8 m_lpal_index;
@@ -257,7 +257,7 @@ public:
st2302u_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual u16 st2xxx_ireq_mask() const override { return 0xd37f; } // ???
virtual const char *st2xxx_irq_name(int i) const override;
@@ -309,7 +309,7 @@ private:
u8 dmem_r(offs_t offset);
void dmem_w(offs_t offset, u8 data);
- void int_map(address_map &map);
+ void int_map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(ST2205U, st2205u_device)
diff --git a/src/devices/cpu/m6502/st2xxx.h b/src/devices/cpu/m6502/st2xxx.h
index 6f63866f2de..5189cb24a5d 100644
--- a/src/devices/cpu/m6502/st2xxx.h
+++ b/src/devices/cpu/m6502/st2xxx.h
@@ -88,7 +88,7 @@ protected:
st2xxx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map, int data_bits, bool has_banked_ram);
virtual space_config_vector memory_space_config() const override;
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual u16 st2xxx_ireq_mask() const = 0;
virtual const char *st2xxx_irq_name(int i) const = 0;
diff --git a/src/devices/cpu/m6502/m65c02.cpp b/src/devices/cpu/m6502/w65c02.cpp
index e79380fe83d..c482b31d449 100644
--- a/src/devices/cpu/m6502/m65c02.cpp
+++ b/src/devices/cpu/m6502/w65c02.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- m65c02.cpp
+ w65c02.cpp
WDC W65C02, CMOS variant with some additional instructions
(but not the bitwise ones)
@@ -10,24 +10,24 @@
***************************************************************************/
#include "emu.h"
-#include "m65c02.h"
-#include "m65c02d.h"
+#include "w65c02.h"
+#include "w65c02d.h"
-DEFINE_DEVICE_TYPE(M65C02, m65c02_device, "m65c02", "WDC W65C02")
+DEFINE_DEVICE_TYPE(W65C02, w65c02_device, "w65c02", "WDC W65C02")
-m65c02_device::m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- m6502_device(mconfig, M65C02, tag, owner, clock)
+w65c02_device::w65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ m6502_device(mconfig, W65C02, tag, owner, clock)
{
}
-m65c02_device::m65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+w65c02_device::w65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
m6502_device(mconfig, type, tag, owner, clock)
{
}
-std::unique_ptr<util::disasm_interface> m65c02_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> w65c02_device::create_disassembler()
{
- return std::make_unique<m65c02_disassembler>();
+ return std::make_unique<w65c02_disassembler>();
}
-#include "cpu/m6502/m65c02.hxx"
+#include "cpu/m6502/w65c02.hxx"
diff --git a/src/devices/cpu/m6502/m65c02.h b/src/devices/cpu/m6502/w65c02.h
index 5a89f301236..552565d4203 100644
--- a/src/devices/cpu/m6502/m65c02.h
+++ b/src/devices/cpu/m6502/w65c02.h
@@ -2,29 +2,29 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- m65c02.h
+ w65c02.h
WDC W65C02, CMOS variant with some additional instructions
(but not the bitwise ones)
***************************************************************************/
-#ifndef MAME_CPU_M6502_M65C02_H
-#define MAME_CPU_M6502_M65C02_H
+#ifndef MAME_CPU_M6502_W65C02_H
+#define MAME_CPU_M6502_W65C02_H
#pragma once
#include "m6502.h"
-class m65c02_device : public m6502_device {
+class w65c02_device : public m6502_device {
public:
- m65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ w65c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
protected:
- m65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ w65c02_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
#define O(o) void o ## _full(); void o ## _partial()
@@ -67,11 +67,11 @@ protected:
};
enum {
- M65C02_IRQ_LINE = m6502_device::IRQ_LINE,
- M65C02_NMI_LINE = m6502_device::NMI_LINE,
- M65C02_SET_OVERFLOW = m6502_device::V_LINE
+ W65C02_IRQ_LINE = m6502_device::IRQ_LINE,
+ W65C02_NMI_LINE = m6502_device::NMI_LINE,
+ W65C02_SET_OVERFLOW = m6502_device::V_LINE
};
-DECLARE_DEVICE_TYPE(M65C02, m65c02_device)
+DECLARE_DEVICE_TYPE(W65C02, w65c02_device)
-#endif // MAME_CPU_M6502_M65C02_H
+#endif // MAME_CPU_M6502_W65C02_H
diff --git a/src/devices/cpu/m6502/m65c02d.cpp b/src/devices/cpu/m6502/w65c02d.cpp
index 2c7b3b81fc3..919d2ddf6f5 100644
--- a/src/devices/cpu/m6502/m65c02d.cpp
+++ b/src/devices/cpu/m6502/w65c02d.cpp
@@ -2,17 +2,17 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- m65c02d.cpp
+ w65c02d.cpp
- MOS Technology 6502, CMOS variant with some additional instructions
+ WDC W65C02, CMOS variant with some additional instructions
(but not the bitwise ones), disassembler
***************************************************************************/
#include "emu.h"
-#include "m65c02d.h"
-#include "cpu/m6502/m65c02d.hxx"
+#include "w65c02d.h"
+#include "cpu/m6502/w65c02d.hxx"
-m65c02_disassembler::m65c02_disassembler() : m6502_base_disassembler(disasm_entries)
+w65c02_disassembler::w65c02_disassembler() : m6502_base_disassembler(disasm_entries)
{
}
diff --git a/src/devices/cpu/m6502/m65c02d.h b/src/devices/cpu/m6502/w65c02d.h
index 77b134c4b95..1e9edec6a14 100644
--- a/src/devices/cpu/m6502/m65c02d.h
+++ b/src/devices/cpu/m6502/w65c02d.h
@@ -2,25 +2,25 @@
// copyright-holders:Olivier Galibert
/***************************************************************************
- m65c02d.h
+ w65c02d.h
- MOS Technology 6502, CMOS variant with some additional instructions
+ WDC W65C02, CMOS variant with some additional instructions
(but not the bitwise ones), disassembler
***************************************************************************/
-#ifndef MAME_CPU_M6502_M65C02D_H
-#define MAME_CPU_M6502_M65C02D_H
+#ifndef MAME_CPU_M6502_W65C02D_H
+#define MAME_CPU_M6502_W65C02D_H
#pragma once
#include "m6502d.h"
-class m65c02_disassembler : public m6502_base_disassembler
+class w65c02_disassembler : public m6502_base_disassembler
{
public:
- m65c02_disassembler();
- virtual ~m65c02_disassembler() = default;
+ w65c02_disassembler();
+ virtual ~w65c02_disassembler() = default;
private:
static const disasm_entry disasm_entries[0x100];
diff --git a/src/devices/cpu/m6502/w65c02s.cpp b/src/devices/cpu/m6502/w65c02s.cpp
index 171db777dc2..17c61bafc4e 100644
--- a/src/devices/cpu/m6502/w65c02s.cpp
+++ b/src/devices/cpu/m6502/w65c02s.cpp
@@ -21,7 +21,7 @@ w65c02s_device::w65c02s_device(const machine_config &mconfig, const char *tag, d
}
w65c02s_device::w65c02s_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- m65c02_device(mconfig, type, tag, owner, clock)
+ w65c02_device(mconfig, type, tag, owner, clock)
{
}
diff --git a/src/devices/cpu/m6502/w65c02s.h b/src/devices/cpu/m6502/w65c02s.h
index a5848f86e68..7a3da04bcd5 100644
--- a/src/devices/cpu/m6502/w65c02s.h
+++ b/src/devices/cpu/m6502/w65c02s.h
@@ -12,9 +12,9 @@
#ifndef MAME_CPU_M6502_W65C02S_H
#define MAME_CPU_M6502_W65C02S_H
-#include "m65c02.h"
+#include "w65c02.h"
-class w65c02s_device : public m65c02_device {
+class w65c02s_device : public w65c02_device {
public:
w65c02s_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/cpu/m6502/xavix.cpp b/src/devices/cpu/m6502/xavix.cpp
index c8f98a0e8f7..bf5eb25b925 100644
--- a/src/devices/cpu/m6502/xavix.cpp
+++ b/src/devices/cpu/m6502/xavix.cpp
@@ -106,24 +106,52 @@ xavix_device::mi_xavix::mi_xavix(xavix_device *_base)
base = _base;
}
-void xavix_device::write_special_stack(uint8_t data)
+void xavix_device::write_special_stack(uint32_t addr, uint8_t data)
{
- m_special_stack[m_special_stackpos&0xff] = data;
+ if (m_use_private_stack_for_extra_callf_byte)
+ {
+ m_special_stack[m_special_stackpos & 0xff] = data;
+ }
+ else
+ {
+ write_stack(addr, data);
+ }
}
void xavix_device::dec_special_stack()
{
- m_special_stackpos--;
+ if (m_use_private_stack_for_extra_callf_byte)
+ {
+ m_special_stackpos--;
+ }
+ else
+ {
+ dec_SP();
+ }
}
void xavix_device::inc_special_stack()
{
- m_special_stackpos++;
+ if (m_use_private_stack_for_extra_callf_byte)
+ {
+ m_special_stackpos++;
+ }
+ else
+ {
+ inc_SP();
+ }
}
-uint8_t xavix_device::read_special_stack()
+uint8_t xavix_device::read_special_stack(uint32_t addr)
{
- return m_special_stack[m_special_stackpos&0xff];
+ if (m_use_private_stack_for_extra_callf_byte)
+ {
+ return m_special_stack[m_special_stackpos & 0xff];
+ }
+ else
+ {
+ return read_stack(addr);
+ }
}
@@ -152,12 +180,12 @@ inline uint8_t xavix_device::read_full_data(uint8_t databank, uint16_t adr)
}
else
{
- return m_extbus_space->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte(((databank << 16) | adr) & 0x7fffff );
}
}
else
{
- return m_extbus_space->read_byte((databank << 16) | adr);
+ return m_extbus_space->read_byte(((databank << 16) | adr) & 0x7fffff );
}
}
@@ -257,12 +285,12 @@ inline void xavix_device::write_full_data(uint8_t databank, uint16_t adr, uint8_
}
else
{
- m_extbus_space->write_byte((databank << 16) | adr, val);
+ m_extbus_space->write_byte(((databank << 16) | adr) & 0x7fffff, val);
}
}
else
{
- m_extbus_space->write_byte((databank << 16) | adr, val);
+ m_extbus_space->write_byte(((databank << 16) | adr) & 0x7fffff, val);
}
}
@@ -345,5 +373,4 @@ void xavix_device::state_string_export(const device_state_entry &entry, std::str
-
#include "cpu/m6502/xavix.hxx"
diff --git a/src/devices/cpu/m6502/xavix.h b/src/devices/cpu/m6502/xavix.h
index ccab73f75d4..5363bb77d36 100644
--- a/src/devices/cpu/m6502/xavix.h
+++ b/src/devices/cpu/m6502/xavix.h
@@ -168,8 +168,8 @@ protected:
uint32_t adr_with_codebank(uint16_t adr) { return adr | (get_codebank() << 16); }
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual offs_t pc_to_external(u16 pc) override;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -192,10 +192,10 @@ protected:
void set_databank(uint8_t bank);
uint8_t get_databank();
- void write_special_stack(uint8_t data);
+ void write_special_stack(uint32_t addr, uint8_t data);
void dec_special_stack();
void inc_special_stack();
- uint8_t read_special_stack();
+ uint8_t read_special_stack(uint32_t addr);
/* we store the additional 'codebank' used for far calls in a different, private stack
this seems to be neccessary for 'rad_hnt2' not to crash when bringing up the calibration / score table screens
@@ -211,6 +211,16 @@ protected:
uint8_t read_zeropage(uint32_t addr);
void write_zeropage(uint32_t addr, uint8_t val);
+ // Some original XaviX games seemed to suggest that the extra byte of the far calls went to a different
+ // stack, but dblmouse on suprtvpc does direct stack manipulation which challenges this assumption.
+ // It could be a SuperXaviX vs XaviX differences however, so currently leaving this as a toggle for testing.
+ //
+ // pausing in rad_hnt2 (press shift when on the map) is broken without this logic as the stack becomes too
+ // big with the extra bytes
+ //
+ // we currently use the private stack for regular XaviX but not for the later CPUs, however the root cause
+ // of needing it for regular XaviX could be somewhere else
+ bool m_use_private_stack_for_extra_callf_byte = true;
};
enum {
diff --git a/src/devices/cpu/m6502/xavix2000.cpp b/src/devices/cpu/m6502/xavix2000.cpp
index a33218423e4..328a357e23e 100644
--- a/src/devices/cpu/m6502/xavix2000.cpp
+++ b/src/devices/cpu/m6502/xavix2000.cpp
@@ -38,6 +38,7 @@ DEFINE_DEVICE_TYPE(XAVIX2002, xavix2002_device, "xavix2002", "XaviX (SSD 2002) (
xavix2000_device::xavix2000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
xavix_device(mconfig, type, tag, owner, clock)
{
+ m_use_private_stack_for_extra_callf_byte = false;
}
xavix2000_device::xavix2000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
diff --git a/src/devices/cpu/m6502/xavix2000.h b/src/devices/cpu/m6502/xavix2000.h
index c5e3113e840..1416d919328 100644
--- a/src/devices/cpu/m6502/xavix2000.h
+++ b/src/devices/cpu/m6502/xavix2000.h
@@ -23,7 +23,7 @@ protected:
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
diff --git a/src/devices/cpu/m6800/6800dasm.cpp b/src/devices/cpu/m6800/6800dasm.cpp
index 37b1ff4793c..f8e59b3f4c2 100644
--- a/src/devices/cpu/m6800/6800dasm.cpp
+++ b/src/devices/cpu/m6800/6800dasm.cpp
@@ -40,7 +40,7 @@ const char *const m680x_disassembler::op_name_str[] = {
* 2 invalid opcode for 1:6800/6802/6808, 2:6801/6803, 4:HD63701
*/
-const uint8_t m680x_disassembler::table[0x104][3] = {
+const u8 m680x_disassembler::table[0x104][3] = {
{ill, inh,7},{nop, inh,0},{ill, inh,7},{ill, inh,7},/* 00 */
{lsrd,inh,1},{asld,inh,1},{tap, inh,0},{tpa, inh,0},
{inx, inh,0},{dex, inh,0},{clv, inh,0},{sev, inh,0},
@@ -130,7 +130,7 @@ offs_t m680x_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
offs_t flags = 0;
int invalid_mask;
int code = opcodes.r8(pc);
- uint8_t opcode, args, invalid;
+ u8 opcode, args, invalid;
switch( m_subtype )
{
@@ -179,7 +179,7 @@ offs_t m680x_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
switch( args )
{
case rel: /* relative */
- util::stream_format(stream, "$%04X", pc + (int8_t)params.r8(pc+1) + 2);
+ util::stream_format(stream, "$%04X", pc + (s8)params.r8(pc+1) + 2);
return 2 | flags | SUPPORTED;
case imb: /* immediate (byte) */
util::stream_format(stream, "#$%02X", params.r8(pc+1));
diff --git a/src/devices/cpu/m6800/6800dasm.h b/src/devices/cpu/m6800/6800dasm.h
index 9caf9b1b7ff..0b9daa8476b 100644
--- a/src/devices/cpu/m6800/6800dasm.h
+++ b/src/devices/cpu/m6800/6800dasm.h
@@ -58,7 +58,7 @@ private:
};
static const char *const op_name_str[];
- static const uint8_t table[0x104][3];
+ static const u8 table[0x104][3];
int m_subtype;
};
diff --git a/src/devices/cpu/m6800/6800ops.hxx b/src/devices/cpu/m6800/6800ops.hxx
index 4872049f888..98e45de37d1 100644
--- a/src/devices/cpu/m6800/6800ops.hxx
+++ b/src/devices/cpu/m6800/6800ops.hxx
@@ -59,7 +59,7 @@ OP_HANDLER( nop )
/* $04 LSRD inherent -0*-* */
OP_HANDLER( lsrd )
{
- uint16_t t;
+ u16 t;
CLR_NZVC; t = D; CC|=(t&0x0001);
t>>=1; SET_Z16(t);
if (NXORC) SEV;
@@ -70,7 +70,7 @@ OP_HANDLER( lsrd )
OP_HANDLER( asld )
{
int r;
- uint16_t t;
+ u16 t;
t = D; r=t<<1;
CLR_NZVC; SET_FLAGS16(t,t,r);
D=r;
@@ -80,7 +80,10 @@ OP_HANDLER( asld )
OP_HANDLER( tap )
{
CC=A;
- ONE_MORE_INSN();
+
+ // TAP temporarily sets the I flag and blocks IRQ until the next opcode
+ // (if the next opcode is TAP, IRQ is blocked again)
+ execute_one();
check_irq_lines();
}
@@ -131,8 +134,11 @@ OP_HANDLER( sec )
/* $0e CLI */
OP_HANDLER( cli )
{
+ u8 i = CC & 0x10;
CLI;
- ONE_MORE_INSN();
+
+ // pending IRQ won't be triggered until next machine cycle
+ if (i) execute_one();
check_irq_lines();
}
@@ -140,14 +146,12 @@ OP_HANDLER( cli )
OP_HANDLER( sei )
{
SEI;
- ONE_MORE_INSN();
- check_irq_lines();
}
/* $10 SBA inherent -**** */
OP_HANDLER( sba )
{
- uint16_t t;
+ u16 t;
t=A-B;
CLR_NZVC; SET_FLAGS8(A,B,t);
A=t;
@@ -156,7 +160,7 @@ OP_HANDLER( sba )
/* $11 CBA inherent -**** */
OP_HANDLER( cba )
{
- uint16_t t;
+ u16 t;
t=A-B;
CLR_NZVC; SET_FLAGS8(A,B,t);
}
@@ -195,7 +199,7 @@ OP_HANDLER( tba )
/* $18 XGDX inherent ----- */ /* HD63701Y0 only */
OP_HANDLER( xgdx )
{
- uint16_t t = X;
+ u16 t = X;
X = D;
D=t;
}
@@ -203,15 +207,15 @@ OP_HANDLER( xgdx )
/* $19 DAA inherent (A) -**0* */
OP_HANDLER( daa )
{
- uint8_t msn, lsn;
- uint16_t t, cf = 0;
+ u8 msn, lsn;
+ u16 t, cf = 0;
msn=A & 0xf0; lsn=A & 0x0f;
if (lsn>0x09 || CC&0x20) cf |= 0x06;
if (msn>0x80 && lsn>0x09) cf |= 0x60;
if (msn>0x90 || CC&0x01) cf |= 0x60;
t = cf + A;
- CLR_NZV; /* keep carry from previous operation */
- SET_NZ8((uint8_t)t); SET_C8(t);
+ CLR_NZV; // keep carry from previous operation
+ SET_NZ8((u8)t); SET_C8(t);
A = t;
}
@@ -220,15 +224,18 @@ OP_HANDLER( daa )
/* $1a SLP */ /* HD63701Y0 only */
OP_HANDLER( slp )
{
- /* wait for next IRQ (same as waiting of wai) */
+ // wait for next IRQ (same as waiting of WAI)
m_wai_state |= M6800_SLP;
- eat_cycles();
+
+ check_irq_lines();
+ if (m_wai_state & M6800_SLP)
+ eat_cycles();
}
/* $1b ABA inherent ***** */
OP_HANDLER( aba )
{
- uint16_t t;
+ u16 t;
t=A+B;
CLR_HNZVC; SET_FLAGS8(A,B,t); SET_H(A,B,t);
A=t;
@@ -245,112 +252,112 @@ OP_HANDLER( aba )
/* $20 BRA relative ----- */
OP_HANDLER( bra )
{
- uint8_t t;
+ u8 t;
BRANCH(1);
}
/* $21 BRN relative ----- */
OP_HANDLER( brn )
{
- uint8_t t;
+ u8 t;
BRANCH(0);
}
/* $22 BHI relative ----- */
OP_HANDLER( bhi )
{
- uint8_t t;
+ u8 t;
BRANCH(!(CC&0x05));
}
/* $23 BLS relative ----- */
OP_HANDLER( bls )
{
- uint8_t t;
+ u8 t;
BRANCH(CC&0x05);
}
/* $24 BCC relative ----- */
OP_HANDLER( bcc )
{
- uint8_t t;
+ u8 t;
BRANCH(!(CC&0x01));
}
/* $25 BCS relative ----- */
OP_HANDLER( bcs )
{
- uint8_t t;
+ u8 t;
BRANCH(CC&0x01);
}
/* $26 BNE relative ----- */
OP_HANDLER( bne )
{
- uint8_t t;
+ u8 t;
BRANCH(!(CC&0x04));
}
/* $27 BEQ relative ----- */
OP_HANDLER( beq )
{
- uint8_t t;
+ u8 t;
BRANCH(CC&0x04);
}
/* $28 BVC relative ----- */
OP_HANDLER( bvc )
{
- uint8_t t;
+ u8 t;
BRANCH(!(CC&0x02));
}
/* $29 BVS relative ----- */
OP_HANDLER( bvs )
{
- uint8_t t;
+ u8 t;
BRANCH(CC&0x02);
}
/* $2a BPL relative ----- */
OP_HANDLER( bpl )
{
- uint8_t t;
+ u8 t;
BRANCH(!(CC&0x08));
}
/* $2b BMI relative ----- */
OP_HANDLER( bmi )
{
- uint8_t t;
+ u8 t;
BRANCH(CC&0x08);
}
/* $2c BGE relative ----- */
OP_HANDLER( bge )
{
- uint8_t t;
+ u8 t;
BRANCH(!NXORV);
}
/* $2d BLT relative ----- */
OP_HANDLER( blt )
{
- uint8_t t;
+ u8 t;
BRANCH(NXORV);
}
/* $2e BGT relative ----- */
OP_HANDLER( bgt )
{
- uint8_t t;
+ u8 t;
BRANCH(!(NXORV||CC&0x04));
}
/* $2f BLE relative ----- */
OP_HANDLER( ble )
{
- uint8_t t;
+ u8 t;
BRANCH(NXORV||CC&0x04);
}
@@ -428,6 +435,7 @@ OP_HANDLER( rti )
PULLBYTE(A);
PULLWORD(pX);
PULLWORD(pPC);
+
check_irq_lines();
}
@@ -440,7 +448,7 @@ OP_HANDLER( pshx )
/* $3d MUL inherent --*-@ */
OP_HANDLER( mul )
{
- uint16_t t;
+ u16 t;
t=A*B;
CLR_C;
if (t & 0x80) SEC;
@@ -450,18 +458,19 @@ OP_HANDLER( mul )
/* $3e WAI inherent ----- */
OP_HANDLER( wai )
{
- /*
- * WAI stacks the entire machine state on the
- * hardware stack, then waits for an interrupt.
- */
+ // WAI stacks the entire machine state on the hardware stack,
+ // then waits for an interrupt.
m_wai_state |= M6800_WAI;
+
PUSHWORD(pPC);
PUSHWORD(pX);
PUSHBYTE(A);
PUSHBYTE(B);
PUSHBYTE(CC);
+
check_irq_lines();
- if (m_wai_state & M6800_WAI) eat_cycles();
+ if (m_wai_state & M6800_WAI)
+ eat_cycles();
}
/* $3f SWI absolute indirect ----- */
@@ -472,6 +481,7 @@ OP_HANDLER( swi )
PUSHBYTE(A);
PUSHBYTE(B);
PUSHBYTE(CC);
+
SEI;
PCD = RM16(0xfffa);
}
@@ -479,7 +489,7 @@ OP_HANDLER( swi )
/* $40 NEGA inherent ?**** */
OP_HANDLER( nega )
{
- uint16_t r;
+ u16 r;
r=-A;
CLR_NZVC; SET_FLAGS8(0,A,r);
A=r;
@@ -509,7 +519,7 @@ OP_HANDLER( lsra )
/* $46 RORA inherent -**-* */
OP_HANDLER( rora )
{
- uint8_t r;
+ u8 r;
r=(CC&0x01)<<7;
CLR_NZVC; CC|=(A&0x01);
r |= A>>1; SET_NZ8(r);
@@ -529,7 +539,7 @@ OP_HANDLER( asra )
/* $48 ASLA inherent ?**** */
OP_HANDLER( asla )
{
- uint16_t r;
+ u16 r;
r=A<<1;
CLR_NZVC; SET_FLAGS8(A,A,r);
A=r;
@@ -538,7 +548,7 @@ OP_HANDLER( asla )
/* $49 ROLA inherent -**** */
OP_HANDLER( rola )
{
- uint16_t t,r;
+ u16 t,r;
t = A; r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
A=r;
@@ -578,7 +588,7 @@ OP_HANDLER( clra )
/* $50 NEGB inherent ?**** */
OP_HANDLER( negb )
{
- uint16_t r;
+ u16 r;
r=-B;
CLR_NZVC; SET_FLAGS8(0,B,r);
B=r;
@@ -608,7 +618,7 @@ OP_HANDLER( lsrb )
/* $56 RORB inherent -**-* */
OP_HANDLER( rorb )
{
- uint8_t r;
+ u8 r;
r=(CC&0x01)<<7;
CLR_NZVC; CC|=(B&0x01);
r |= B>>1; SET_NZ8(r);
@@ -628,7 +638,7 @@ OP_HANDLER( asrb )
/* $58 ASLB inherent ?**** */
OP_HANDLER( aslb )
{
- uint16_t r;
+ u16 r;
r=B<<1;
CLR_NZVC; SET_FLAGS8(B,B,r);
B=r;
@@ -637,7 +647,7 @@ OP_HANDLER( aslb )
/* $59 ROLB inherent -**** */
OP_HANDLER( rolb )
{
- uint16_t t,r;
+ u16 t,r;
t = B; r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
B=r;
@@ -677,7 +687,7 @@ OP_HANDLER( clrb )
/* $60 NEG indexed ?**** */
OP_HANDLER( neg_ix )
{
- uint16_t r,t;
+ u16 r,t;
IDXBYTE(t); r=-t;
CLR_NZVC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -686,7 +696,7 @@ OP_HANDLER( neg_ix )
/* $61 AIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( aim_ix )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
IDXBYTE(r);
r &= t;
@@ -697,7 +707,7 @@ OP_HANDLER( aim_ix )
/* $62 OIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( oim_ix )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
IDXBYTE(r);
r |= t;
@@ -708,7 +718,7 @@ OP_HANDLER( oim_ix )
/* $63 COM indexed -**01 */
OP_HANDLER( com_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); t = ~t;
CLR_NZV; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -717,7 +727,7 @@ OP_HANDLER( com_ix )
/* $64 LSR indexed -0*-* */
OP_HANDLER( lsr_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); CLR_NZVC; CC|=(t&0x01);
t>>=1; SET_Z8(t);
if (NXORC) SEV;
@@ -727,7 +737,7 @@ OP_HANDLER( lsr_ix )
/* $65 EIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( eim_ix )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
IDXBYTE(r);
r ^= t;
@@ -738,7 +748,7 @@ OP_HANDLER( eim_ix )
/* $66 ROR indexed -**-* */
OP_HANDLER( ror_ix )
{
- uint8_t t,r;
+ u8 t,r;
IDXBYTE(t); r=(CC&0x01)<<7;
CLR_NZVC; CC|=(t&0x01);
r |= t>>1; SET_NZ8(r);
@@ -749,7 +759,7 @@ OP_HANDLER( ror_ix )
/* $67 ASR indexed ?**-* */
OP_HANDLER( asr_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); CLR_NZVC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
SET_NZ8(t);
@@ -760,7 +770,7 @@ OP_HANDLER( asr_ix )
/* $68 ASL indexed ?**** */
OP_HANDLER( asl_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t); r=t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -769,7 +779,7 @@ OP_HANDLER( asl_ix )
/* $69 ROL indexed -**** */
OP_HANDLER( rol_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t); r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -778,7 +788,7 @@ OP_HANDLER( rol_ix )
/* $6a DEC indexed -***- */
OP_HANDLER( dec_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); --t;
CLR_NZV; SET_FLAGS8D(t);
WM(EAD,t);
@@ -787,7 +797,7 @@ OP_HANDLER( dec_ix )
/* $6b TIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( tim_ix )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
IDXBYTE(r);
r &= t;
@@ -797,7 +807,7 @@ OP_HANDLER( tim_ix )
/* $6c INC indexed -***- */
OP_HANDLER( inc_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); ++t;
CLR_NZV; SET_FLAGS8I(t);
WM(EAD,t);
@@ -806,7 +816,7 @@ OP_HANDLER( inc_ix )
/* $6d TST indexed -**0- */
OP_HANDLER( tst_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); CLR_NZVC; SET_NZ8(t);
}
@@ -819,14 +829,14 @@ OP_HANDLER( jmp_ix )
/* $6f CLR indexed -0100 */
OP_HANDLER( clr_ix )
{
- INDEXED; WM(EAD,0);
+ INDEXED; RM(EAD); WM(EAD,0);
CLR_NZVC; SEZ;
}
/* $70 NEG extended ?**** */
OP_HANDLER( neg_ex )
{
- uint16_t r,t;
+ u16 r,t;
EXTBYTE(t); r=-t;
CLR_NZVC; SET_FLAGS8(0,t,r);
WM(EAD,r);
@@ -835,7 +845,7 @@ OP_HANDLER( neg_ex )
/* $71 AIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( aim_di )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
DIRBYTE(r);
r &= t;
@@ -846,7 +856,7 @@ OP_HANDLER( aim_di )
/* $72 OIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( oim_di )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
DIRBYTE(r);
r |= t;
@@ -857,7 +867,7 @@ OP_HANDLER( oim_di )
/* $73 COM extended -**01 */
OP_HANDLER( com_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t); t = ~t;
CLR_NZV; SET_NZ8(t); SEC;
WM(EAD,t);
@@ -866,7 +876,7 @@ OP_HANDLER( com_ex )
/* $74 LSR extended -0*-* */
OP_HANDLER( lsr_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
CLR_NZVC;
CC|=(t&0x01);
@@ -879,7 +889,7 @@ OP_HANDLER( lsr_ex )
/* $75 EIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( eim_di )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
DIRBYTE(r);
r ^= t;
@@ -890,7 +900,7 @@ OP_HANDLER( eim_di )
/* $76 ROR extended -**-* */
OP_HANDLER( ror_ex )
{
- uint8_t t,r;
+ u8 t,r;
EXTBYTE(t); r=(CC&0x01)<<7;
CLR_NZVC; CC|=(t&0x01);
r |= t>>1; SET_NZ8(r);
@@ -901,7 +911,7 @@ OP_HANDLER( ror_ex )
/* $77 ASR extended ?**-* */
OP_HANDLER( asr_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t); CLR_NZVC; CC|=(t&0x01);
t>>=1; t|=((t&0x40)<<1);
SET_NZ8(t);
@@ -912,7 +922,7 @@ OP_HANDLER( asr_ex )
/* $78 ASL extended ?**** */
OP_HANDLER( asl_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t); r=t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -921,7 +931,7 @@ OP_HANDLER( asl_ex )
/* $79 ROL extended -**** */
OP_HANDLER( rol_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t); r = CC&0x01; r |= t<<1;
CLR_NZVC; SET_FLAGS8(t,t,r);
WM(EAD,r);
@@ -930,7 +940,7 @@ OP_HANDLER( rol_ex )
/* $7a DEC extended -***- */
OP_HANDLER( dec_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t); --t;
CLR_NZV; SET_FLAGS8D(t);
WM(EAD,t);
@@ -939,7 +949,7 @@ OP_HANDLER( dec_ex )
/* $7b TIM --**0- */ /* HD63701Y0 only */
OP_HANDLER( tim_di )
{
- uint8_t t, r;
+ u8 t, r;
IMMBYTE(t);
DIRBYTE(r);
r &= t;
@@ -949,7 +959,7 @@ OP_HANDLER( tim_di )
/* $7c INC extended -***- */
OP_HANDLER( inc_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t); ++t;
CLR_NZV; SET_FLAGS8I(t);
WM(EAD,t);
@@ -958,7 +968,7 @@ OP_HANDLER( inc_ex )
/* $7d TST extended -**0- */
OP_HANDLER( tst_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t); CLR_NZVC; SET_NZ8(t);
}
@@ -971,14 +981,14 @@ OP_HANDLER( jmp_ex )
/* $7f CLR extended -0100 */
OP_HANDLER( clr_ex )
{
- EXTENDED; WM(EAD,0);
+ EXTENDED; RM(EAD); WM(EAD,0);
CLR_NZVC; SEZ;
}
/* $80 SUBA immediate ?**** */
OP_HANDLER( suba_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -987,7 +997,7 @@ OP_HANDLER( suba_im )
/* $81 CMPA immediate ?**** */
OP_HANDLER( cmpa_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -995,7 +1005,7 @@ OP_HANDLER( cmpa_im )
/* $82 SBCA immediate ?**** */
OP_HANDLER( sbca_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1004,7 +1014,7 @@ OP_HANDLER( sbca_im )
/* $83 SUBD immediate -**** */
OP_HANDLER( subd_im )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IMMWORD(b);
d = D;
@@ -1017,7 +1027,7 @@ OP_HANDLER( subd_im )
/* $84 ANDA immediate -**0- */
OP_HANDLER( anda_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t); A &= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1025,7 +1035,7 @@ OP_HANDLER( anda_im )
/* $85 BITA immediate -**0- */
OP_HANDLER( bita_im )
{
- uint8_t t,r;
+ u8 t,r;
IMMBYTE(t); r = A&t;
CLR_NZV; SET_NZ8(r);
}
@@ -1048,7 +1058,7 @@ OP_HANDLER( sta_im )
/* $88 EORA immediate -**0- */
OP_HANDLER( eora_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t); A ^= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1056,7 +1066,7 @@ OP_HANDLER( eora_im )
/* $89 ADCA immediate ***** */
OP_HANDLER( adca_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t); r = A+t+(CC&0x01);
CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r);
A = r;
@@ -1065,7 +1075,7 @@ OP_HANDLER( adca_im )
/* $8a ORA immediate -**0- */
OP_HANDLER( ora_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t); A |= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1073,7 +1083,7 @@ OP_HANDLER( ora_im )
/* $8b ADDA immediate ***** */
OP_HANDLER( adda_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t); r = A+t;
CLR_HNZVC; SET_FLAGS8(A,t,r); SET_H(A,t,r);
A = r;
@@ -1096,7 +1106,7 @@ OP_HANDLER( cmpx_im )
/* $8c CPX immediate -**** (6803) */
OP_HANDLER( cpx_im )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IMMWORD(b);
d = X;
@@ -1108,7 +1118,7 @@ OP_HANDLER( cpx_im )
/* $8d BSR ----- */
OP_HANDLER( bsr )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t);
PUSHWORD(pPC);
PC += SIGNED(t);
@@ -1134,7 +1144,7 @@ OP_HANDLER( sts_im )
/* $90 SUBA direct ?**** */
OP_HANDLER( suba_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1143,7 +1153,7 @@ OP_HANDLER( suba_di )
/* $91 CMPA direct ?**** */
OP_HANDLER( cmpa_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t); r = A-t;
CLR_NZVC; SET_FLAGS8(A,t,r);
}
@@ -1151,7 +1161,7 @@ OP_HANDLER( cmpa_di )
/* $92 SBCA direct ?**** */
OP_HANDLER( sbca_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t); r = A-t-(CC&0x01);
CLR_NZVC; SET_FLAGS8(A,t,r);
A = r;
@@ -1160,7 +1170,7 @@ OP_HANDLER( sbca_di )
/* $93 SUBD direct -**** */
OP_HANDLER( subd_di )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
DIRWORD(b);
d = D;
@@ -1173,7 +1183,7 @@ OP_HANDLER( subd_di )
/* $94 ANDA direct -**0- */
OP_HANDLER( anda_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t); A &= t;
CLR_NZV; SET_NZ8(A);
}
@@ -1181,7 +1191,7 @@ OP_HANDLER( anda_di )
/* $95 BITA direct -**0- */
OP_HANDLER( bita_di )
{
- uint8_t t,r;
+ u8 t,r;
DIRBYTE(t); r = A&t;
CLR_NZV; SET_NZ8(r);
}
@@ -1206,7 +1216,7 @@ OP_HANDLER( sta_di )
/* $98 EORA direct -**0- */
OP_HANDLER( eora_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t);
A ^= t;
CLR_NZV;
@@ -1216,7 +1226,7 @@ OP_HANDLER( eora_di )
/* $99 ADCA direct ***** */
OP_HANDLER( adca_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = A+t+(CC&0x01);
CLR_HNZVC;
@@ -1228,7 +1238,7 @@ OP_HANDLER( adca_di )
/* $9a ORA direct -**0- */
OP_HANDLER( ora_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t);
A |= t;
CLR_NZV;
@@ -1238,7 +1248,7 @@ OP_HANDLER( ora_di )
/* $9b ADDA direct ***** */
OP_HANDLER( adda_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = A + t;
CLR_HNZVC;
@@ -1264,7 +1274,7 @@ OP_HANDLER( cmpx_di )
/* $9c CPX direct -**** (6803) */
OP_HANDLER( cpx_di )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
DIRWORD(b);
d = X;
@@ -1301,7 +1311,7 @@ OP_HANDLER( sts_di )
/* $a0 SUBA indexed ?**** */
OP_HANDLER( suba_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1312,7 +1322,7 @@ OP_HANDLER( suba_ix )
/* $a1 CMPA indexed ?**** */
OP_HANDLER( cmpa_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1322,7 +1332,7 @@ OP_HANDLER( cmpa_ix )
/* $a2 SBCA indexed ?**** */
OP_HANDLER( sbca_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = A - t - (CC&0x01);
CLR_NZVC;
@@ -1333,7 +1343,7 @@ OP_HANDLER( sbca_ix )
/* $a3 SUBD indexed -**** */
OP_HANDLER( subd_ix )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IDXWORD(b);
d = D;
@@ -1346,7 +1356,7 @@ OP_HANDLER( subd_ix )
/* $a4 ANDA indexed -**0- */
OP_HANDLER( anda_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t); A &= t;
CLR_NZV;
SET_NZ8(A);
@@ -1355,7 +1365,7 @@ OP_HANDLER( anda_ix )
/* $a5 BITA indexed -**0- */
OP_HANDLER( bita_ix )
{
- uint8_t t,r;
+ u8 t,r;
IDXBYTE(t); r = A&t;
CLR_NZV;
SET_NZ8(r);
@@ -1381,7 +1391,7 @@ OP_HANDLER( sta_ix )
/* $a8 EORA indexed -**0- */
OP_HANDLER( eora_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t);
A ^= t;
CLR_NZV;
@@ -1391,7 +1401,7 @@ OP_HANDLER( eora_ix )
/* $a9 ADCA indexed ***** */
OP_HANDLER( adca_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = A + t + (CC&0x01);
CLR_HNZVC;
@@ -1403,7 +1413,7 @@ OP_HANDLER( adca_ix )
/* $aa ORA indexed -**0- */
OP_HANDLER( ora_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t);
A |= t;
CLR_NZV;
@@ -1413,7 +1423,7 @@ OP_HANDLER( ora_ix )
/* $ab ADDA indexed ***** */
OP_HANDLER( adda_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = A+t;
CLR_HNZVC;
@@ -1439,7 +1449,7 @@ OP_HANDLER( cmpx_ix )
/* $ac CPX indexed -**** (6803)*/
OP_HANDLER( cpx_ix )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IDXWORD(b);
d = X;
@@ -1476,7 +1486,7 @@ OP_HANDLER( sts_ix )
/* $b0 SUBA extended ?**** */
OP_HANDLER( suba_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = A - t;
CLR_NZVC;
@@ -1487,7 +1497,7 @@ OP_HANDLER( suba_ex )
/* $b1 CMPA extended ?**** */
OP_HANDLER( cmpa_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = A-t;
CLR_NZVC;
@@ -1497,7 +1507,7 @@ OP_HANDLER( cmpa_ex )
/* $b2 SBCA extended ?**** */
OP_HANDLER( sbca_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = A-t-(CC&0x01);
CLR_NZVC;
@@ -1508,7 +1518,7 @@ OP_HANDLER( sbca_ex )
/* $b3 SUBD extended -**** */
OP_HANDLER( subd_ex )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
EXTWORD(b);
d = D;
@@ -1521,7 +1531,7 @@ OP_HANDLER( subd_ex )
/* $b4 ANDA extended -**0- */
OP_HANDLER( anda_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
A &= t;
CLR_NZV;
@@ -1531,7 +1541,7 @@ OP_HANDLER( anda_ex )
/* $b5 BITA extended -**0- */
OP_HANDLER( bita_ex )
{
- uint8_t t,r;
+ u8 t,r;
EXTBYTE(t);
r = A&t;
CLR_NZV;
@@ -1558,7 +1568,7 @@ OP_HANDLER( sta_ex )
/* $b8 EORA extended -**0- */
OP_HANDLER( eora_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
A ^= t;
CLR_NZV;
@@ -1568,7 +1578,7 @@ OP_HANDLER( eora_ex )
/* $b9 ADCA extended ***** */
OP_HANDLER( adca_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = A+t+(CC&0x01);
CLR_HNZVC;
@@ -1580,7 +1590,7 @@ OP_HANDLER( adca_ex )
/* $ba ORA extended -**0- */
OP_HANDLER( ora_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
A |= t;
CLR_NZV;
@@ -1590,7 +1600,7 @@ OP_HANDLER( ora_ex )
/* $bb ADDA extended ***** */
OP_HANDLER( adda_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = A+t;
CLR_HNZVC;
@@ -1616,7 +1626,7 @@ OP_HANDLER( cmpx_ex )
/* $bc CPX extended -**** (6803) */
OP_HANDLER( cpx_ex )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
EXTWORD(b);
d = X;
@@ -1653,7 +1663,7 @@ OP_HANDLER( sts_ex )
/* $c0 SUBB immediate ?**** */
OP_HANDLER( subb_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1664,7 +1674,7 @@ OP_HANDLER( subb_im )
/* $c1 CMPB immediate ?**** */
OP_HANDLER( cmpb_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1674,7 +1684,7 @@ OP_HANDLER( cmpb_im )
/* $c2 SBCB immediate ?**** */
OP_HANDLER( sbcb_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1685,7 +1695,7 @@ OP_HANDLER( sbcb_im )
/* $c3 ADDD immediate -**** */
OP_HANDLER( addd_im )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IMMWORD(b);
d = D;
@@ -1698,7 +1708,7 @@ OP_HANDLER( addd_im )
/* $c4 ANDB immediate -**0- */
OP_HANDLER( andb_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t);
B &= t;
CLR_NZV;
@@ -1708,7 +1718,7 @@ OP_HANDLER( andb_im )
/* $c5 BITB immediate -**0- */
OP_HANDLER( bitb_im )
{
- uint8_t t,r;
+ u8 t,r;
IMMBYTE(t);
r = B&t;
CLR_NZV;
@@ -1736,7 +1746,7 @@ OP_HANDLER( stb_im )
/* $c8 EORB immediate -**0- */
OP_HANDLER( eorb_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t);
B ^= t;
CLR_NZV;
@@ -1746,7 +1756,7 @@ OP_HANDLER( eorb_im )
/* $c9 ADCB immediate ***** */
OP_HANDLER( adcb_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -1758,7 +1768,7 @@ OP_HANDLER( adcb_im )
/* $ca ORB immediate -**0- */
OP_HANDLER( orb_im )
{
- uint8_t t;
+ u8 t;
IMMBYTE(t);
B |= t;
CLR_NZV;
@@ -1768,7 +1778,7 @@ OP_HANDLER( orb_im )
/* $cb ADDB immediate ***** */
OP_HANDLER( addb_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -1815,7 +1825,7 @@ OP_HANDLER( stx_im )
/* $d0 SUBB direct ?**** */
OP_HANDLER( subb_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1826,7 +1836,7 @@ OP_HANDLER( subb_di )
/* $d1 CMPB direct ?**** */
OP_HANDLER( cmpb_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1836,7 +1846,7 @@ OP_HANDLER( cmpb_di )
/* $d2 SBCB direct ?**** */
OP_HANDLER( sbcb_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -1847,7 +1857,7 @@ OP_HANDLER( sbcb_di )
/* $d3 ADDD direct -**** */
OP_HANDLER( addd_di )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
DIRWORD(b);
d = D;
@@ -1860,7 +1870,7 @@ OP_HANDLER( addd_di )
/* $d4 ANDB direct -**0- */
OP_HANDLER( andb_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t);
B &= t;
CLR_NZV;
@@ -1870,7 +1880,7 @@ OP_HANDLER( andb_di )
/* $d5 BITB direct -**0- */
OP_HANDLER( bitb_di )
{
- uint8_t t,r;
+ u8 t,r;
DIRBYTE(t);
r = B&t;
CLR_NZV;
@@ -1897,7 +1907,7 @@ OP_HANDLER( stb_di )
/* $d8 EORB direct -**0- */
OP_HANDLER( eorb_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t);
B ^= t;
CLR_NZV;
@@ -1907,7 +1917,7 @@ OP_HANDLER( eorb_di )
/* $d9 ADCB direct ***** */
OP_HANDLER( adcb_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -1919,7 +1929,7 @@ OP_HANDLER( adcb_di )
/* $da ORB direct -**0- */
OP_HANDLER( orb_di )
{
- uint8_t t;
+ u8 t;
DIRBYTE(t);
B |= t;
CLR_NZV;
@@ -1929,7 +1939,7 @@ OP_HANDLER( orb_di )
/* $db ADDB direct ***** */
OP_HANDLER( addb_di )
{
- uint16_t t,r;
+ u16 t,r;
DIRBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -1975,7 +1985,7 @@ OP_HANDLER( stx_di )
/* $e0 SUBB indexed ?**** */
OP_HANDLER( subb_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1986,7 +1996,7 @@ OP_HANDLER( subb_ix )
/* $e1 CMPB indexed ?**** */
OP_HANDLER( cmpb_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = B-t;
CLR_NZVC;
@@ -1996,7 +2006,7 @@ OP_HANDLER( cmpb_ix )
/* $e2 SBCB indexed ?**** */
OP_HANDLER( sbcb_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -2007,7 +2017,7 @@ OP_HANDLER( sbcb_ix )
/* $e3 ADDD indexed -**** */
OP_HANDLER( addd_ix )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
IDXWORD(b);
d = D;
@@ -2020,7 +2030,7 @@ OP_HANDLER( addd_ix )
/* $e4 ANDB indexed -**0- */
OP_HANDLER( andb_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t);
B &= t;
CLR_NZV;
@@ -2030,7 +2040,7 @@ OP_HANDLER( andb_ix )
/* $e5 BITB indexed -**0- */
OP_HANDLER( bitb_ix )
{
- uint8_t t,r;
+ u8 t,r;
IDXBYTE(t);
r = B&t;
CLR_NZV;
@@ -2057,7 +2067,7 @@ OP_HANDLER( stb_ix )
/* $e8 EORB indexed -**0- */
OP_HANDLER( eorb_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t);
B ^= t;
CLR_NZV;
@@ -2067,7 +2077,7 @@ OP_HANDLER( eorb_ix )
/* $e9 ADCB indexed ***** */
OP_HANDLER( adcb_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -2079,7 +2089,7 @@ OP_HANDLER( adcb_ix )
/* $ea ORB indexed -**0- */
OP_HANDLER( orb_ix )
{
- uint8_t t;
+ u8 t;
IDXBYTE(t);
B |= t;
CLR_NZV;
@@ -2089,7 +2099,7 @@ OP_HANDLER( orb_ix )
/* $eb ADDB indexed ***** */
OP_HANDLER( addb_ix )
{
- uint16_t t,r;
+ u16 t,r;
IDXBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -2110,7 +2120,7 @@ OP_HANDLER( ldd_ix )
// actually this is ADDX, causes garbage in nightgal.cpp otherwise
OP_HANDLER( adcx_im )
{
- uint16_t t,r;
+ u16 t,r;
IMMBYTE(t);
r = X+t;
CLR_HNZVC;
@@ -2148,7 +2158,7 @@ OP_HANDLER( stx_ix )
/* $f0 SUBB extended ?**** */
OP_HANDLER( subb_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2159,7 +2169,7 @@ OP_HANDLER( subb_ex )
/* $f1 CMPB extended ?**** */
OP_HANDLER( cmpb_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = B-t;
CLR_NZVC;
@@ -2169,7 +2179,7 @@ OP_HANDLER( cmpb_ex )
/* $f2 SBCB extended ?**** */
OP_HANDLER( sbcb_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = B-t-(CC&0x01);
CLR_NZVC;
@@ -2180,7 +2190,7 @@ OP_HANDLER( sbcb_ex )
/* $f3 ADDD extended -**** */
OP_HANDLER( addd_ex )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
EXTWORD(b);
d = D;
@@ -2193,7 +2203,7 @@ OP_HANDLER( addd_ex )
/* $f4 ANDB extended -**0- */
OP_HANDLER( andb_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
B &= t;
CLR_NZV;
@@ -2203,7 +2213,7 @@ OP_HANDLER( andb_ex )
/* $f5 BITB extended -**0- */
OP_HANDLER( bitb_ex )
{
- uint8_t t,r;
+ u8 t,r;
EXTBYTE(t);
r = B & t;
CLR_NZV;
@@ -2230,7 +2240,7 @@ OP_HANDLER( stb_ex )
/* $f8 EORB extended -**0- */
OP_HANDLER( eorb_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
B ^= t;
CLR_NZV;
@@ -2240,7 +2250,7 @@ OP_HANDLER( eorb_ex )
/* $f9 ADCB extended ***** */
OP_HANDLER( adcb_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = B+t+(CC&0x01);
CLR_HNZVC;
@@ -2252,7 +2262,7 @@ OP_HANDLER( adcb_ex )
/* $fa ORB extended -**0- */
OP_HANDLER( orb_ex )
{
- uint8_t t;
+ u8 t;
EXTBYTE(t);
B |= t;
CLR_NZV;
@@ -2262,7 +2272,7 @@ OP_HANDLER( orb_ex )
/* $fb ADDB extended ***** */
OP_HANDLER( addb_ex )
{
- uint16_t t,r;
+ u16 t,r;
EXTBYTE(t);
r = B+t;
CLR_HNZVC;
@@ -2282,7 +2292,7 @@ OP_HANDLER( ldd_ex )
/* $fc ADDX extended -**** NSC8105 only. Flags are a guess */
OP_HANDLER( addx_ex )
{
- uint32_t r,d;
+ u32 r,d;
PAIR b;
EXTWORD(b);
d = X;
@@ -2322,8 +2332,8 @@ OP_HANDLER( stx_ex )
// $bb - $mask & [X + $disp8]
OP_HANDLER( btst_ix )
{
- uint8_t val;
- uint8_t mask = M_RDOP_ARG(PCD);
+ u8 val;
+ u8 mask = M_RDOP_ARG(PCD);
{EA=X+(M_RDOP_ARG(PCD+1));PC+=2;}
val = RM(EAD) & mask;
CLR_NZVC; SET_NZ8(val);
@@ -2333,7 +2343,7 @@ OP_HANDLER( btst_ix )
OP_HANDLER( stx_nsc )
{
IMM8;
- uint8_t val = RM(EAD);
+ u8 val = RM(EAD);
IMM8;
EA = X + RM(EAD);
CLR_NZV;
diff --git a/src/devices/cpu/m6800/m6800.cpp b/src/devices/cpu/m6800/m6800.cpp
index db2a532435b..580a9798ea4 100644
--- a/src/devices/cpu/m6800/m6800.cpp
+++ b/src/devices/cpu/m6800/m6800.cpp
@@ -14,9 +14,9 @@ References:
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
-System dependencies: uint16_t must be 16 bit unsigned int
- uint8_t must be 8 bit unsigned int
- uint32_t must be more than 16 bits
+System dependencies: u16 must be 16 bit unsigned int
+ u8 must be 8 bit unsigned int
+ u32 must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
@@ -67,9 +67,12 @@ TODO:
#include "m6800.h"
#include "6800dasm.h"
-#define VERBOSE 0
+#define LOG_IRQ (1U << 1)
-#define LOG(x) do { if (VERBOSE) logerror x; } while (0)
+//#define VERBOSE (LOG_IRQ)
+#include "logmacro.h"
+
+#define LOGIRQ(...) LOGMASKED(LOG_IRQ, __VA_ARGS__)
#define pPPC m_ppc
@@ -126,17 +129,6 @@ TODO:
#define PULLBYTE(b) S++; b = RM(SD)
#define PULLWORD(w) S++; w.d = RM(SD)<<8; S++; w.d |= RM(SD)
-/* operate one instruction for */
-#define ONE_MORE_INSN() { \
- uint8_t ireg; \
- pPPC = pPC; \
- debugger_instruction_hook(PCD); \
- ireg=M_RDOP(PCD); \
- PC++; \
- (this->*m_insn[ireg])(); \
- increment_counter(m_cycles[ireg]); \
-}
-
/* CC masks HI NZVC
7654 3210 */
#define CLR_HNZVC CC&=0xd0
@@ -149,8 +141,8 @@ TODO:
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!(a))SEZ
-#define SET_Z8(a) SET_Z((uint8_t)(a))
-#define SET_Z16(a) SET_Z((uint16_t)(a))
+#define SET_Z8(a) SET_Z(u8(a))
+#define SET_Z16(a) SET_Z(u16(a))
#define SET_N8(a) CC|=(((a)&0x80)>>4)
#define SET_N16(a) CC|=(((a)&0x8000)>>12)
#define SET_H(a,b,r) CC|=((((a)^(b)^(r))&0x10)<<1)
@@ -159,7 +151,7 @@ TODO:
#define SET_V8(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x80)>>6)
#define SET_V16(a,b,r) CC|=((((a)^(b)^(r)^((r)>>1))&0x8000)>>14)
-const uint8_t m6800_cpu_device::flags8i[256]= /* increment */
+const u8 m6800_cpu_device::flags8i[256]= /* increment */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -180,7 +172,7 @@ const uint8_t m6800_cpu_device::flags8i[256]= /* increment */
};
-const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */
+const u8 m6800_cpu_device::flags8d[256]= /* decrement */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
@@ -209,15 +201,15 @@ const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */
#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
-/* for treating an uint8_t as a signed int16_t */
-#define SIGNED(b) ((int16_t)(b&0x80?b|0xff00:b))
+/* for treating an u8 as a signed s16 */
+#define SIGNED(b) (s16(b&0x80?b|0xff00:b))
/* Macros for addressing modes */
#define DIRECT IMMBYTE(EAD)
#define IMM8 EA=PC++
#define IMM16 {EA=PC;PC+=2;}
#define EXTENDED IMMWORD(m_ea)
-#define INDEXED {EA=X+(uint8_t)M_RDOP_ARG(PCD);PC++;}
+#define INDEXED {EA=X+(u8)M_RDOP_ARG(PCD);PC++;}
/* macros to set status flags */
#if defined(SEC)
@@ -253,10 +245,10 @@ const uint8_t m6800_cpu_device::flags8d[256]= /* decrement */
/* include the opcode functions */
#include "6800ops.hxx"
-/* Note: don't use 0 cycles here for invalid opcodes so that we don't */
-/* hang in an infinite loop if we hit one */
-#define XX 5 // invalid opcode unknown cc
-const uint8_t m6800_cpu_device::cycles_6800[256] =
+// to prevent the possibility of MAME locking up, don't use 0 cycles here
+#define XX 4 // illegal opcode unknown cycle count
+
+const u8 m6800_cpu_device::cycles_6800[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 2,XX,XX,XX,XX, 2, 2, 4, 4, 2, 2, 2, 2, 2, 2,
@@ -277,10 +269,10 @@ const uint8_t m6800_cpu_device::cycles_6800[256] =
/*F*/ 4, 4, 4,XX, 4, 4, 4, 5, 4, 4, 4, 4,XX,XX, 5, 6
};
-const uint8_t m6800_cpu_device::cycles_nsc8105[256] =
+const u8 m6800_cpu_device::cycles_nsc8105[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
- /*0*/ 5,XX, 2,XX,XX, 2,XX, 2, 4, 2, 4, 2, 2, 2, 2, 2,
+ /*0*/ XX,XX, 2,XX,XX, 2,XX, 2, 4, 2, 4, 2, 2, 2, 2, 2,
/*1*/ 2,XX, 2,XX,XX, 2,XX, 2,XX,XX, 2, 2,XX,XX,XX,XX,
/*2*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
/*3*/ 4, 4, 4, 4, 4, 4, 4, 4,XX,XX, 5,10,XX, 9,XX,12,
@@ -291,13 +283,14 @@ const uint8_t m6800_cpu_device::cycles_nsc8105[256] =
/*8*/ 2,XX,XX, 2, 2, 2,XX, 2, 2, 2, 2,XX, 2,XX, 2, 2,
/*9*/ 2,XX,XX, 2, 2, 2,XX, 2, 2, 2, 2,XX, 2,XX, 2, 2,
/*A*/ 7,XX,XX, 7, 7, 7,XX, 7, 7, 7, 7,XX, 7, 4, 7, 7,
- /*B*/ 6,XX,XX, 6, 6, 6,XX, 6, 6, 6, 6, 5, 6, 3, 6, 6,
+ /*B*/ 6,XX, 6, 6, 6, 6,XX, 6, 6, 6, 6, 6, 6, 3, 6, 6,
/*C*/ 2, 2, 2,XX, 2, 2, 2, 3, 2, 2, 2, 2,XX, 3,XX, 4,
/*D*/ 3, 3, 3,XX, 3, 3, 3, 4, 3, 3, 3, 3,XX, 4,XX, 5,
/*E*/ 5, 5, 5,XX, 5, 5, 5, 6, 5, 5, 5, 5, 5, 6,XX, 7,
/*F*/ 4, 4, 4,XX, 4, 4, 4, 5, 4, 4, 4, 4, 4, 5,XX, 6
};
-#undef XX // /invalid opcode unknown cc
+
+#undef XX // /illegal opcode unknown cc
const m6800_cpu_device::op_func m6800_cpu_device::m6800_insn[0x100] = {
@@ -379,12 +372,12 @@ DEFINE_DEVICE_TYPE(M6808, m6808_cpu_device, "m6808", "Motorola MC6808")
DEFINE_DEVICE_TYPE(NSC8105, nsc8105_cpu_device, "nsc8105", "NSC8105")
-m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6800_cpu_device(mconfig, M6800, tag, owner, clock, m6800_insn, cycles_6800, address_map_constructor())
{
}
-m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal)
+m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles, address_map_constructor internal)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0, internal)
, m_decrypted_opcodes_config("program", ENDIANNESS_BIG, 8, 16, 0)
@@ -393,12 +386,12 @@ m6800_cpu_device::m6800_cpu_device(const machine_config &mconfig, device_type ty
{
}
-m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6802_cpu_device(mconfig, M6802, tag, owner, clock, m6800_insn, cycles_6800)
{
}
-m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles)
+m6802_cpu_device::m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles)
: m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, address_map_constructor(FUNC(m6802_cpu_device::ram_map), this))
, m_ram_enable(true)
{
@@ -410,7 +403,7 @@ void m6802_cpu_device::ram_map(address_map &map)
map(0x0000, 0x007f).ram();
}
-m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6808_cpu_device::m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6802_cpu_device(mconfig, M6808, tag, owner, clock, m6800_insn, cycles_6800)
{
set_ram_enable(false);
@@ -422,7 +415,7 @@ void m6808_cpu_device::device_validity_check(validity_checker &valid) const
osd_printf_error("MC6808 should not have internal RAM enabled\n");
}
-nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+nsc8105_cpu_device::nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6802_cpu_device(mconfig, NSC8105, tag, owner, clock, nsc8105_insn, cycles_nsc8105)
{
}
@@ -440,29 +433,29 @@ device_memory_interface::space_config_vector m6800_cpu_device::memory_space_conf
};
}
-uint32_t m6800_cpu_device::RM16(uint32_t Addr )
+u32 m6800_cpu_device::RM16(u32 Addr)
{
- uint32_t result = RM(Addr) << 8;
+ u32 result = RM(Addr) << 8;
return result | RM((Addr+1) & 0xffff);
}
-void m6800_cpu_device::WM16(uint32_t Addr, PAIR *p )
+void m6800_cpu_device::WM16(u32 Addr, PAIR *p)
{
WM(Addr, p->b.h);
WM((Addr+1) & 0xffff, p->b.l);
}
/* IRQ enter */
-void m6800_cpu_device::enter_interrupt(const char *message,uint16_t irq_vector)
+void m6800_cpu_device::enter_interrupt(const char *message, u16 irq_vector)
{
int cycles_to_eat = 0;
- LOG((message));
- if (m_wai_state & (M6800_WAI | M6800_SLP))
+ LOGIRQ("Take %s interrupt\n", message);
+
+ if (m_wai_state & M6800_WAI)
{
- if (m_wai_state & M6800_WAI)
- cycles_to_eat = 4;
- m_wai_state &= ~(M6800_WAI | M6800_SLP);
+ cycles_to_eat = 4;
+ m_wai_state &= ~M6800_WAI;
}
else
{
@@ -476,8 +469,7 @@ void m6800_cpu_device::enter_interrupt(const char *message,uint16_t irq_vector)
SEI;
PCD = RM16(irq_vector);
- if (cycles_to_eat > 0)
- increment_counter(cycles_to_eat);
+ increment_counter(cycles_to_eat);
}
/* check the IRQ lines for pending interrupts */
@@ -485,30 +477,28 @@ void m6800_cpu_device::check_irq_lines()
{
if (m_nmi_pending)
{
- if (m_wai_state & M6800_SLP)
- m_wai_state &= ~M6800_SLP;
-
+ m_wai_state &= ~M6800_SLP;
m_nmi_pending = false;
- enter_interrupt("take NMI\n", 0xfffc);
+ enter_interrupt("NMI", 0xfffc);
}
- else
+ else if (check_irq1_enabled())
{
- if (m_irq_state[M6800_IRQ_LINE] != CLEAR_LINE)
+ /* standard IRQ */
+ m_wai_state &= ~M6800_SLP;
+
+ if (!(CC & 0x10))
{
- /* standard IRQ */
- if (m_wai_state & M6800_SLP)
- m_wai_state &= ~M6800_SLP;
-
- if (!(CC & 0x10))
- {
- standard_irq_callback(M6800_IRQ_LINE, m_pc.w.l);
- enter_interrupt("take IRQ1\n", 0xfff8);
- }
+ standard_irq_callback(M6800_IRQ_LINE, m_pc.w.l);
+ enter_interrupt("IRQ1", 0xfff8);
}
- else
- if (!(CC & 0x10))
- m6800_check_irq2();
}
+ else
+ check_irq2();
+}
+
+bool m6800_cpu_device::check_irq1_enabled()
+{
+ return m_irq_state[M6800_IRQ_LINE] != CLEAR_LINE;
}
void m6800_cpu_device::increment_counter(int amount)
@@ -593,7 +583,6 @@ void m6800_cpu_device::device_reset()
m_wai_state = 0;
m_nmi_state = 0;
m_nmi_pending = 0;
- m_irq_state[M6800_IRQ_LINE] = 0;
}
@@ -608,15 +597,12 @@ void m6800_cpu_device::execute_set_input(int irqline, int state)
break;
default:
- LOG(("set_irq_line %d,%d\n", irqline, state));
m_irq_state[irqline] = state;
break;
}
}
-/****************************************************************************
- * Execute cycles CPU cycles. Return number of cycles really executed
- ****************************************************************************/
+
void m6800_cpu_device::execute_run()
{
check_irq_lines();
@@ -627,20 +613,26 @@ void m6800_cpu_device::execute_run()
{
if (m_wai_state & (M6800_WAI | M6800_SLP))
{
+ debugger_wait_hook();
eat_cycles();
}
else
{
- pPPC = pPC;
- debugger_instruction_hook(PCD);
- uint8_t ireg=M_RDOP(PCD);
- PC++;
- (this->*m_insn[ireg])();
- increment_counter(m_cycles[ireg]);
+ execute_one();
}
} while (m_icount > 0);
}
+void m6800_cpu_device::execute_one()
+{
+ pPPC = pPC;
+ debugger_instruction_hook(PCD);
+ u8 ireg = M_RDOP(PCD);
+ PC++;
+ (this->*m_insn[ireg])();
+ increment_counter(m_cycles[ireg]);
+}
+
std::unique_ptr<util::disasm_interface> m6800_cpu_device::create_disassembler()
{
return std::make_unique<m680x_disassembler>(6800);
diff --git a/src/devices/cpu/m6800/m6800.h b/src/devices/cpu/m6800/m6800.h
index fd1815d6aa8..d7db49864e8 100644
--- a/src/devices/cpu/m6800/m6800.h
+++ b/src/devices/cpu/m6800/m6800.h
@@ -15,18 +15,14 @@ enum
enum
{
- M6800_IRQ_LINE = 0 /* IRQ line number */
-};
+ M6800_IRQ_LINE = 0, // IRQ line number
-enum
-{
- M6802_IRQ_LINE = M6800_IRQ_LINE
+ M6800_LINE_MAX
};
-enum
-{
- M6808_IRQ_LINE = M6800_IRQ_LINE
-};
+#define M6802_IRQ_LINE M6800_IRQ_LINE
+#define M6808_IRQ_LINE M6800_IRQ_LINE
+
class m6800_cpu_device : public cpu_device
{
@@ -34,27 +30,27 @@ public:
typedef void (m6800_cpu_device::*op_func)();
// construction/destruction
- m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6800_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
enum
{
- M6800_WAI = 8, /* set when WAI is waiting for an interrupt */
- M6800_SLP = 0x10 /* HD63701 only */
+ M6800_WAI = 8, // set when WAI is waiting for an interrupt
+ M6800_SLP = 0x10 // HD63701 only
};
- m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal);
+ m6800_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_max_cycles() const noexcept override { return 12; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 12; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
+ virtual void execute_one();
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface overrides
@@ -70,39 +66,41 @@ protected:
address_space_config m_decrypted_opcodes_config;
address_space_config m_io_config;
- PAIR m_ppc; /* Previous program counter */
- PAIR m_pc; /* Program counter */
- PAIR m_s; /* Stack pointer */
- PAIR m_x; /* Index register */
- PAIR m_d; /* Accumulators */
- PAIR m_ea; /* effective address (temporary variable) */
- uint8_t m_cc; /* Condition codes */
- uint8_t m_wai_state; /* WAI opcode state (or sleep opcode state) */
- uint8_t m_nmi_state; /* NMI line state */
- uint8_t m_nmi_pending; /* NMI pending */
- uint8_t m_irq_state[3]; /* IRQ line state [IRQ1,TIN,IS3] */
-
- /* Memory spaces */
+ PAIR m_ppc; // Previous program counter
+ PAIR m_pc; // Program counter
+ PAIR m_s; // Stack pointer
+ PAIR m_x; // Index register
+ PAIR m_d; // Accumulators
+ PAIR m_ea; // effective address (temporary variable)
+ u8 m_cc; // Condition codes
+ u8 m_wai_state; // WAI opcode state (or sleep opcode state)
+ u8 m_nmi_state; // NMI line state
+ u8 m_nmi_pending; // NMI pending
+ u8 m_irq_state[5]; // IRQ line state [IRQ1,TIN,IS3,..]
+
+ // memory spaces
memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cprogram, m_copcodes;
memory_access<16, 0, 0, ENDIANNESS_BIG>::specific m_program;
const op_func *m_insn;
- const uint8_t *m_cycles; /* clock cycle of instruction table */
+ const u8 *m_cycles; // clock cycle of instruction table
int m_icount;
- static const uint8_t flags8i[256];
- static const uint8_t flags8d[256];
- static const uint8_t cycles_6800[256];
- static const uint8_t cycles_nsc8105[256];
+ static const u8 flags8i[256];
+ static const u8 flags8d[256];
+ static const u8 cycles_6800[256];
+ static const u8 cycles_nsc8105[256];
static const op_func m6800_insn[256];
static const op_func nsc8105_insn[256];
- uint32_t RM16(uint32_t Addr );
- void WM16(uint32_t Addr, PAIR *p );
- void enter_interrupt(const char *message,uint16_t irq_vector);
- virtual void m6800_check_irq2() { }
- void check_irq_lines();
+ u32 RM16(u32 Addr);
+ void WM16(u32 Addr, PAIR *p);
+ void enter_interrupt(const char *message, u16 irq_vector);
+ virtual bool check_irq1_enabled();
+ virtual void check_irq2() { }
+ virtual void check_irq_lines();
+
virtual void increment_counter(int amount);
virtual void eat_cycles();
virtual void cleanup_counters() { }
@@ -363,28 +361,28 @@ protected:
class m6802_cpu_device : public m6800_cpu_device
{
public:
- m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6802_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
void set_ram_enable(bool re) { assert(!configured()); m_ram_enable = re; }
protected:
- m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles);
+ m6802_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles);
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
bool m_ram_enable;
private:
- void ram_map(address_map &map);
+ void ram_map(address_map &map) ATTR_COLD;
};
class m6808_cpu_device : public m6802_cpu_device
{
public:
- m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6808_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -395,7 +393,7 @@ protected:
class nsc8105_cpu_device : public m6802_cpu_device
{
public:
- nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ nsc8105_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/m6800/m6801.cpp b/src/devices/cpu/m6800/m6801.cpp
index a2e1193e14b..e289a5544ba 100644
--- a/src/devices/cpu/m6800/m6801.cpp
+++ b/src/devices/cpu/m6800/m6801.cpp
@@ -5,6 +5,8 @@
6801 and derivatives
TODO:
+- improve serial emulation: receiver listens to start bit at 8*data rate,
+ and will start reading 1.5 'bits' after the start bit
- improve RAM control register
- improve STBY pin? RES pin (reset) should be ineffective while STBY is low
- IS3 interrupt for 6801 port 3 handshake (already implemented for 6301Y)
@@ -24,6 +26,8 @@ TODO:
#include "m6801.h"
#include "6800dasm.h"
+#include <tuple>
+
#define LOG_TX (1U << 1)
#define LOG_TXTICK (1U << 2)
#define LOG_RX (1U << 3)
@@ -33,8 +37,6 @@ TODO:
#define LOG_TIMER (1U << 7)
//#define VERBOSE (LOG_PORT)
-//#define LOG_OUTPUT_STREAM std::cout
-//#define LOG_OUTPUT_STREAM std::cerr
#include "logmacro.h"
#define LOGTX(...) LOGMASKED(LOG_TX, __VA_ARGS__)
@@ -98,14 +100,6 @@ enum
M6801_TX_STATE_READY
};
-/* take interrupt */
-#define TAKE_ISI enter_interrupt("take ISI\n",0xfff8)
-#define TAKE_ICI enter_interrupt("take ICI\n",0xfff6)
-#define TAKE_OCI enter_interrupt("take OCI\n",0xfff4)
-#define TAKE_TOI enter_interrupt("take TOI\n",0xfff2)
-#define TAKE_SCI enter_interrupt("take SCI\n",0xfff0)
-#define TAKE_CMI enter_interrupt("take CMI\n",0xffec)
-
/* mnemonics for the Timer Control and Status Register bits */
#define TCSR_OLVL 0x01
#define TCSR_IEDG 0x02
@@ -136,10 +130,10 @@ enum
#define TSR_ICF1 0x40
#define TSR_ICF2 0x80
-/* Note: don't use 0 cycles here for invalid opcodes so that we don't */
-/* hang in an infinite loop if we hit one */
-#define XX 5 // invalid opcode unknown cc
-const uint8_t m6801_cpu_device::cycles_6803[256] =
+// to prevent the possibility of MAME locking up, don't use 0 cycles here
+#define XX 4 // illegal opcode unknown cycle count
+
+const u8 m6801_cpu_device::cycles_6803[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 2,XX,XX, 3, 3, 2, 2, 3, 3, 2, 2, 2, 2, 2, 2,
@@ -160,7 +154,7 @@ const uint8_t m6801_cpu_device::cycles_6803[256] =
/*F*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5
};
-const uint8_t m6801_cpu_device::cycles_63701[256] =
+const u8 m6801_cpu_device::cycles_63701[256] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ XX, 1,XX,XX, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
@@ -180,7 +174,8 @@ const uint8_t m6801_cpu_device::cycles_63701[256] =
/*E*/ 4, 4, 4, 5, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
/*F*/ 4, 4, 4, 5, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5
};
-#undef XX // /invalid opcode unknown cc
+
+#undef XX // /illegal opcode unknown cc
const m6800_cpu_device::op_func m6801_cpu_device::m6803_insn[0x100] = {
@@ -284,7 +279,7 @@ void m6801_cpu_device::m6801_io(address_map &map)
void m6801_cpu_device::m6803_mem(address_map &map)
{
m6801_io(map);
- map(0x0080, 0x00ff).ram().share("internal");
+ map(0x0080, 0x00ff).ram().share(m_internal_ram);
}
void m6801_cpu_device::m6801_mem(address_map &map)
@@ -310,7 +305,7 @@ void m6801u4_cpu_device::m6801u4_io(address_map &map)
void m6801u4_cpu_device::m6801u4_mem(address_map &map)
{
m6801u4_io(map);
- map(0x0040, 0x00ff).ram().share("internal");
+ map(0x0040, 0x00ff).ram().share(m_internal_ram);
map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0);
}
@@ -361,13 +356,13 @@ void hd6301x_cpu_device::hd6301x_io(address_map &map)
void hd6301x_cpu_device::hd6303x_mem(address_map &map)
{
hd6303x_io(map);
- map(0x0040, 0x00ff).ram().share("internal");
+ map(0x0040, 0x00ff).ram().share(m_internal_ram);
}
void hd6301x_cpu_device::hd6301x_mem(address_map &map)
{
hd6301x_io(map);
- map(0x0040, 0x00ff).ram().share("internal");
+ map(0x0040, 0x00ff).ram().share(m_internal_ram);
map(0xf000, 0xffff).rom().region(DEVICE_SELF, 0);
}
@@ -397,13 +392,13 @@ void hd6301y_cpu_device::hd6301y_io(address_map &map)
void hd6301y_cpu_device::hd6303y_mem(address_map &map)
{
hd6303y_io(map);
- map(0x0040, 0x013f).ram().share("internal");
+ map(0x0040, 0x013f).ram().share(m_internal_ram);
}
void hd6301y_cpu_device::hd6301y_mem(address_map &map)
{
hd6301y_io(map);
- map(0x0040, 0x013f).ram().share("internal");
+ map(0x0040, 0x013f).ram().share(m_internal_ram);
map(0xc000, 0xffff).rom().region(DEVICE_SELF, 0);
}
@@ -425,12 +420,12 @@ DEFINE_DEVICE_TYPE(HD6303R, hd6303r_cpu_device, "hd6303r", "Hitachi HD6303R")
DEFINE_DEVICE_TYPE(HD6303X, hd6303x_cpu_device, "hd6303x", "Hitachi HD6303X")
DEFINE_DEVICE_TYPE(HD6303Y, hd6303y_cpu_device, "hd6303y", "Hitachi HD6303Y")
-m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6801_cpu_device(mconfig, M6801, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6801_mem), this), 64)
{
}
-m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes)
+m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes)
: m6800_cpu_device(mconfig, type, tag, owner, clock, insn, cycles, internal)
, device_nvram_interface(mconfig, *this)
, m_in_port_func(*this, 0xff)
@@ -438,228 +433,247 @@ m6801_cpu_device::m6801_cpu_device(const machine_config &mconfig, device_type ty
, m_out_sc2_func(*this)
, m_out_sertx_func(*this)
, m_standby_func(*this)
- , m_internal_ram(*this, "internal")
+ , m_internal_ram(*this, "internal_ram")
, m_nvram_bytes(nvram_bytes)
, m_nvram_defval(0)
, m_nvram_battery(true)
, m_sclk_divider(8)
{
+ std::fill(std::begin(m_port_ddr_override), std::end(m_port_ddr_override), 0);
+
// disable nvram by default (set to true if MCU is battery-backed when in standby mode)
nvram_enable_backup(false);
}
-m6801u4_cpu_device::m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6801u4_cpu_device::m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6801_cpu_device(mconfig, M6801U4, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6801u4_cpu_device::m6801u4_mem), this), 32)
{
}
-hd6801v0_cpu_device::hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6801v0_cpu_device::hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6801_cpu_device(mconfig, HD6801V0, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6801v0_cpu_device::hd6801_mem), this), 64)
{
}
-m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6803_cpu_device::m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6801_cpu_device(mconfig, M6803, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803_cpu_device::m6803_mem), this), 64)
{
}
-m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m6803e_cpu_device::m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m6801_cpu_device(mconfig, M6803E, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(m6803e_cpu_device::m6803_mem), this), 64)
{
}
-mc68120_device::mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal)
+mc68120_device::mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal)
: m6801_cpu_device(mconfig, type, tag, owner, clock, m6803_insn, cycles_6803, internal, 0)
{
}
-mc68120_device::mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mc68120_device::mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mc68120_device(mconfig, MC68120, tag, owner, clock, address_map_constructor(FUNC(mc68120_device::m6801_mem), this))
{
}
-mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mc68121_device::mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mc68120_device(mconfig, MC68121, tag, owner, clock, address_map_constructor(FUNC(mc68121_device::m6803_mem), this))
{
}
-hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes)
+hd6301_cpu_device::hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes)
: m6801_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes)
{
}
-hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6301v1_cpu_device::hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301_cpu_device(mconfig, HD6301V1, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd6301v1_cpu_device::hd6801_mem), this), 128)
{
}
-hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd63701v0_cpu_device::hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301_cpu_device(mconfig, HD63701V0, tag, owner, clock, hd63701_insn, cycles_63701, address_map_constructor(FUNC(hd63701v0_cpu_device::hd6801_mem), this), 128)
{
}
-hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6303r_cpu_device::hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301_cpu_device(mconfig, HD6303R, tag, owner, clock, m6803_insn, cycles_6803, address_map_constructor(FUNC(hd6303r_cpu_device::m6803_mem), this), 128)
{
}
-hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes)
+hd6301x_cpu_device::hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes)
: hd6301_cpu_device(mconfig, type, tag, owner, clock, hd63701_insn, cycles_63701, internal, nvram_bytes)
, m_in_portx_func(*this, 0xff)
, m_out_portx_func(*this)
{
+ std::fill(std::begin(m_portx_ddr_override), std::end(m_portx_ddr_override), 0);
+
m_sclk_divider = 16;
}
-hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes)
+hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes)
: hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, nvram_bytes)
{
}
-hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6301x0_cpu_device::hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301x0_cpu_device(mconfig, HD6301X0, tag, owner, clock, address_map_constructor(FUNC(hd6301x0_cpu_device::hd6301x_mem), this), 192)
{
}
-hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd63701x0_cpu_device::hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301x0_cpu_device(mconfig, HD63701X0, tag, owner, clock, address_map_constructor(FUNC(hd63701x0_cpu_device::hd6301x_mem), this), 192)
{
}
-hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6303x_cpu_device::hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301x_cpu_device(mconfig, HD6303X, tag, owner, clock, address_map_constructor(FUNC(hd6303x_cpu_device::hd6303x_mem), this), 192)
{
}
-hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes)
+hd6301y_cpu_device::hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes)
: hd6301x_cpu_device(mconfig, type, tag, owner, clock, internal, nvram_bytes)
{
}
-hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6301y0_cpu_device::hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301y_cpu_device(mconfig, HD6301Y0, tag, owner, clock, address_map_constructor(FUNC(hd6301y0_cpu_device::hd6301y_mem), this), 256)
{
}
-hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd63701y0_cpu_device::hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301y_cpu_device(mconfig, HD63701Y0, tag, owner, clock, address_map_constructor(FUNC(hd63701y0_cpu_device::hd6301y_mem), this), 256)
{
}
-hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hd6303y_cpu_device::hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: hd6301y_cpu_device(mconfig, HD6303Y, tag, owner, clock, address_map_constructor(FUNC(hd6303y_cpu_device::hd6303y_mem), this), 256)
{
}
-void m6801_cpu_device::m6800_check_irq2()
+
+bool m6801_cpu_device::check_irq2_ici()
+{
+ return (m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF);
+}
+
+bool m6801_cpu_device::check_irq2_oci()
+{
+ return (m_tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF);
+}
+
+bool m6801_cpu_device::check_irq2_toi()
+{
+ return (m_tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF);
+}
+
+bool m6801_cpu_device::check_irq2_sci()
+{
+ return (((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) == (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) ||
+ ((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) == (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) ||
+ ((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)));
+}
+
+void m6801_cpu_device::take_irq2(const char *message, u16 irq_vector)
{
- if ((m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF))
+ m_wai_state &= ~M6800_SLP;
+
+ if (!(m_cc & 0x10))
+ enter_interrupt(message, irq_vector);
+}
+
+void m6801_cpu_device::check_irq2()
+{
+ if (check_irq2_ici())
{
- standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
- TAKE_ICI;
+ if (!(m_cc & 0x10))
+ standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
+ take_irq2("ICI", 0xfff6);
}
- else if ((m_tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF))
+ else if (check_irq2_oci())
{
- TAKE_OCI;
+ take_irq2("OCI", 0xfff4);
}
- else if ((m_tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF))
+ else if (check_irq2_toi())
{
- TAKE_TOI;
+ take_irq2("TOI", 0xfff2);
}
- else if (((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) == (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) ||
- ((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) == (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) ||
- ((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)))
+ else if (check_irq2_sci())
{
- TAKE_SCI;
+ take_irq2("SCI", 0xfff0);
}
}
-void m6801u4_cpu_device::m6800_check_irq2()
+void m6801u4_cpu_device::check_irq2()
{
- if (((m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF)) ||
- (m_tcr[1] & m_tsr & TSR_ICF2))
+ if (check_irq2_ici() || (m_tcr[1] & m_tsr & TSR_ICF2))
{
- standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
- TAKE_ICI;
+ if (!(m_cc & 0x10))
+ standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
+ take_irq2("ICI", 0xfff6);
}
- else if (((m_tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF)) ||
- (m_tcr[1] & m_tsr & (TSR_OCF2 | TSR_OCF3)))
+ else if (check_irq2_oci() || (m_tcr[1] & m_tsr & (TSR_OCF2 | TSR_OCF3)))
{
- TAKE_OCI;
+ take_irq2("OCI", 0xfff4);
}
- else if ((m_tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF))
+ else if (check_irq2_toi())
{
- TAKE_TOI;
+ take_irq2("TOI", 0xfff2);
}
- else if (((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) == (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) ||
- ((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) == (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) ||
- ((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)))
+ else if (check_irq2_sci())
{
- TAKE_SCI;
+ take_irq2("SCI", 0xfff0);
}
}
-void hd6301x_cpu_device::m6800_check_irq2()
+void hd6301x_cpu_device::check_irq2()
{
- if ((m_tcsr & (TCSR_EICI|TCSR_ICF)) == (TCSR_EICI|TCSR_ICF))
+ if (check_irq2_ici())
{
- standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
- TAKE_ICI;
+ if (!(m_cc & 0x10))
+ standard_irq_callback(M6801_TIN_LINE, m_pc.w.l);
+ take_irq2("ICI", 0xfff6);
}
- else if ((m_tcsr & (TCSR_EOCI|TCSR_OCF)) == (TCSR_EOCI|TCSR_OCF) ||
- (m_tcsr2 & (TCSR2_EOCI2|TCSR2_OCF2)) == (TCSR2_EOCI2|TCSR2_OCF2))
+ else if (check_irq2_oci() || (m_tcsr2 & (TCSR2_EOCI2|TCSR2_OCF2)) == (TCSR2_EOCI2|TCSR2_OCF2))
{
- TAKE_OCI;
+ take_irq2("OCI", 0xfff4);
}
- else if ((m_tcsr & (TCSR_ETOI|TCSR_TOF)) == (TCSR_ETOI|TCSR_TOF))
+ else if (check_irq2_toi())
{
- TAKE_TOI;
+ take_irq2("TOI", 0xfff2);
}
else if ((m_tcsr3 & 0xc0) == 0xc0)
{
- TAKE_CMI;
+ take_irq2("CMI", 0xffec);
}
- else if (((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) == (M6801_TRCSR_RIE|M6801_TRCSR_RDRF)) ||
- ((m_trcsr & (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) == (M6801_TRCSR_RIE|M6801_TRCSR_ORFE)) ||
- ((m_trcsr & (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)) == (M6801_TRCSR_TIE|M6801_TRCSR_TDRE)))
+ else if (m_irq_state[HD6301_IRQ2_LINE] != CLEAR_LINE && m_ram_ctrl & 2)
+ {
+ if (!(m_cc & 0x10))
+ standard_irq_callback(HD6301_IRQ2_LINE, m_pc.w.l);
+ take_irq2("IRQ2", 0xffea);
+ }
+ else if (check_irq2_sci())
{
- TAKE_SCI;
+ take_irq2("SCI", 0xfff0);
}
}
-void hd6301y_cpu_device::m6800_check_irq2()
+void hd6301y_cpu_device::check_irq2()
{
if ((m_p6csr & 0xc0) == 0xc0)
{
- standard_irq_callback(M6801_IS3_LINE, m_pc.w.l);
- TAKE_ISI;
+ if (!(m_cc & 0x10))
+ standard_irq_callback(M6801_IS3_LINE, m_pc.w.l);
+ take_irq2("ISI", 0xfff8);
}
else
- hd6301x_cpu_device::m6800_check_irq2();
+ hd6301x_cpu_device::check_irq2();
}
-void m6801_cpu_device::modified_tcsr()
+bool hd6301x_cpu_device::check_irq1_enabled()
{
- m_irq2 = (m_tcsr & (m_tcsr << 3)) & (TCSR_ICF | TCSR_OCF | TCSR_TOF);
+ return hd6301_cpu_device::check_irq1_enabled() && (m_ram_ctrl & 1);
}
-void m6801u4_cpu_device::modified_tcsr()
-{
- m6801_cpu_device::modified_tcsr();
-
- if (m_tcr[1] & m_tsr & TSR_ICF2)
- m_irq2 |= TCSR_ICF;
- if (m_tcr[1] & m_tsr & (TSR_OCF2 | TSR_OCF3))
- m_irq2 |= TCSR_OCF;
-}
-
-void hd6301x_cpu_device::modified_tcsr()
-{
- m6801_cpu_device::modified_tcsr();
-
- if ((m_tcsr2 & TCSR2_EOCI2) && (m_tcsr2 & TCSR2_OCF2))
- m_irq2 |= TCSR_OCF;
-}
void m6801_cpu_device::set_timer_event()
{
@@ -715,7 +729,6 @@ void m6801_cpu_device::check_timer_event()
OCH++; // next IRQ point
m_tcsr |= TCSR_OCF;
m_pending_tcsr |= TCSR_OCF;
- modified_tcsr();
// if output on P21 is enabled, let's do it
if (m_port_ddr[1] & 2)
@@ -736,16 +749,9 @@ void m6801_cpu_device::check_timer_event()
#endif
m_tcsr |= TCSR_TOF;
m_pending_tcsr |= TCSR_TOF;
- modified_tcsr();
}
- if (m_irq2 & (TCSR_OCF | TCSR_TOF))
- {
- if (m_wai_state & M6800_SLP)
- m_wai_state &= ~M6800_SLP;
- if (!(m_cc & 0x10))
- m6800_check_irq2();
- }
+ check_irq2();
// set next event
set_timer_event();
@@ -759,7 +765,6 @@ void m6801u4_cpu_device::check_timer_event()
OCH++; // next IRQ point
m_tcsr |= TCSR_OCF;
m_pending_tcsr |= TCSR_OCF;
- modified_tcsr();
// TODO: output to P21
}
@@ -768,7 +773,6 @@ void m6801u4_cpu_device::check_timer_event()
OC2H++; // next IRQ point
m_tsr |= TSR_OCF2;
m_pending_tsr |= TSR_OCF2;
- modified_tcsr();
// TODO: output to P11
}
@@ -777,7 +781,6 @@ void m6801u4_cpu_device::check_timer_event()
OC3H++; // next IRQ point
m_tsr |= TSR_OCF3;
m_pending_tsr |= TSR_OCF3;
- modified_tcsr();
// TODO: output to P12
}
@@ -791,16 +794,9 @@ void m6801u4_cpu_device::check_timer_event()
#endif
m_tcsr |= TCSR_TOF;
m_pending_tcsr |= TCSR_TOF;
- modified_tcsr();
}
- if (m_irq2 & (TCSR_OCF | TCSR_TOF))
- {
- if (m_wai_state & M6800_SLP)
- m_wai_state &= ~M6800_SLP;
- if (!(m_cc & 0x10))
- m6800_check_irq2();
- }
+ check_irq2();
// set next event
set_timer_event();
@@ -814,7 +810,6 @@ void hd6301x_cpu_device::check_timer_event()
OCH++; // next IRQ point
m_tcsr |= TCSR_OCF;
m_pending_tcsr |= TCSR_OCF;
- modified_tcsr();
// if output on P21 is enabled, let's do it
if (m_tcsr2 & TCSR2_OE1)
@@ -830,7 +825,6 @@ void hd6301x_cpu_device::check_timer_event()
OC2H++; // next IRQ point
m_tcsr2 |= TCSR2_OCF2;
m_pending_tcsr2 |= TCSR2_OCF2;
- modified_tcsr();
// if output on P25 is enabled, let's do it
if (m_tcsr2 & TCSR2_OE2)
@@ -853,16 +847,9 @@ void hd6301x_cpu_device::check_timer_event()
#endif
m_tcsr |= TCSR_TOF;
m_pending_tcsr |= TCSR_TOF;
- modified_tcsr();
}
- if ((m_irq2 & (TCSR_OCF | TCSR_TOF)) || (m_tcsr3 & 0xc0) == 0xc0)
- {
- if (m_wai_state & M6800_SLP)
- m_wai_state &= ~M6800_SLP;
- if (!(m_cc & 0x10))
- m6800_check_irq2();
- }
+ check_irq2();
// set next event
set_timer_event();
@@ -917,6 +904,17 @@ void m6801_cpu_device::eat_cycles()
increment_counter(cycles_to_eat);
}
+void hd6301x_cpu_device::eat_cycles()
+{
+ if (BIT(m_tcsr3, 4))
+ {
+ while (m_icount > 0 && m_wai_state & (M6800_WAI | M6800_SLP))
+ increment_counter(1);
+ }
+ else
+ m6801_cpu_device::eat_cycles();
+}
+
/* cleanup high-word of counters */
void m6801_cpu_device::cleanup_counters()
{
@@ -941,7 +939,7 @@ void hd6301x_cpu_device::cleanup_counters()
m6801_cpu_device::cleanup_counters();
}
-void m6801_cpu_device::set_rmcr(uint8_t data)
+void m6801_cpu_device::set_rmcr(u8 data)
{
if (m_rmcr == data) return;
@@ -951,14 +949,14 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
{
case 0:
LOGSER("SCI: Using external serial clock: false\n");
- m_sci_timer->adjust(attotime::never);
+ reset_sci_timer();
m_use_ext_serclock = false;
break;
case 3: // external clock
LOGSER("SCI: Using external serial clock: true\n");
+ reset_sci_timer();
m_use_ext_serclock = true;
- m_sci_timer->adjust(attotime::never);
break;
case 1:
@@ -974,7 +972,7 @@ void m6801_cpu_device::set_rmcr(uint8_t data)
}
}
-void hd6301x_cpu_device::set_rmcr(uint8_t data)
+void hd6301x_cpu_device::set_rmcr(u8 data)
{
if (m_rmcr == data) return;
@@ -986,8 +984,8 @@ void hd6301x_cpu_device::set_rmcr(uint8_t data)
case 3:
case 7: // external clock
LOGSER("SCI: Using external serial clock: true\n");
+ reset_sci_timer();
m_use_ext_serclock = true;
- m_sci_timer->adjust(attotime::never);
break;
case 1:
@@ -998,7 +996,7 @@ void hd6301x_cpu_device::set_rmcr(uint8_t data)
if (BIT(m_rmcr, 5))
{
LOGSER("SCI: Using Timer 2 clock\n");
- m_sci_timer->adjust(attotime::never);
+ reset_sci_timer();
}
else
{
@@ -1012,7 +1010,7 @@ void hd6301x_cpu_device::set_rmcr(uint8_t data)
}
}
-int m6801_cpu_device::m6800_rx()
+int m6801_cpu_device::m6801_rx()
{
return (m_in_port_func[1]() & M6801_PORT2_IO3) >> 3;
}
@@ -1113,7 +1111,7 @@ void m6801_cpu_device::serial_receive()
if (m_trcsr & M6801_TRCSR_WU)
{
// wait for 10 bits of '1'
- if (m6800_rx() == 1)
+ if (m6801_rx() == 1)
{
m_rxbits++;
@@ -1140,7 +1138,7 @@ void m6801_cpu_device::serial_receive()
switch (m_rxbits)
{
case M6801_SERIAL_START:
- if (m6800_rx() == 0)
+ if (m6801_rx() == 0)
{
// start bit found
m_rxbits++;
@@ -1150,7 +1148,7 @@ void m6801_cpu_device::serial_receive()
break;
case M6801_SERIAL_STOP:
- if (m6800_rx() == 1)
+ if (m6801_rx() == 1)
{
LOGRX("SCI Received STOP bit\n");
@@ -1204,7 +1202,7 @@ void m6801_cpu_device::serial_receive()
m_rsr >>= 1;
// receive bit into register
- m_rsr |= (m6800_rx() << 7);
+ m_rsr |= (m6801_rx() << 7);
LOGRX("SCI RX sampled DATA bit %u: %u\n", m_rxbits, BIT(m_rsr, 7));
@@ -1221,6 +1219,29 @@ TIMER_CALLBACK_MEMBER(m6801_cpu_device::sci_tick)
serial_receive();
}
+void m6801_cpu_device::sci_clock_internal(u8 divider)
+{
+ m_sci_clocks++;
+
+ if (m_sci_clocks >= divider)
+ {
+ m_sci_clocks = 0;
+ sci_tick(0);
+ }
+}
+
+void m6801_cpu_device::clock_serial()
+{
+ if (m_use_ext_serclock)
+ sci_clock_internal(m_sclk_divider);
+}
+
+void m6801_cpu_device::reset_sci_timer()
+{
+ m_sci_clocks = 0;
+ m_sci_timer->adjust(attotime::never);
+}
+
void m6801_cpu_device::execute_set_input(int irqline, int state)
{
@@ -1243,7 +1264,8 @@ void m6801_cpu_device::execute_set_input(int irqline, int state)
if (!m_port3_latched && (m_p3csr & M6801_P3CSR_LE))
{
// latch input data to port 3
- m_port_data[2] = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff)) | (m_port_data[2] & m_port_ddr[2]);
+ u8 ddr = m_port_ddr[2] & ~m_port_ddr_override[2];
+ m_port_data[2] = (m_in_port_func[2]() & ~ddr) | (m_port_data[2] & ddr);
m_port3_latched = 1;
LOGPORT("Latched Port 3 Data: %02x\n", m_port_data[2]);
@@ -1262,16 +1284,13 @@ void m6801_cpu_device::execute_set_input(int irqline, int state)
if (state != m_irq_state[M6801_TIN_LINE])
{
m_irq_state[M6801_TIN_LINE] = state;
- //edge = (state == CLEAR_LINE ) ? 2 : 0;
+ //edge = (state == CLEAR_LINE) ? 2 : 0;
if (((m_tcsr & TCSR_IEDG) ^ (state == CLEAR_LINE ? TCSR_IEDG : 0)) == 0)
return;
/* active edge in */
m_tcsr |= TCSR_ICF;
m_pending_tcsr |= TCSR_ICF;
m_input_capture = CT;
- modified_tcsr();
- if ((m_tcsr & TCSR_EICI) && (m_wai_state & M6800_SLP))
- m_wai_state &= ~M6800_SLP;
}
break;
@@ -1315,7 +1334,6 @@ void m6801_cpu_device::device_start()
m_p3csr = 0;
m_tcsr = 0;
m_pending_tcsr = 0;
- m_irq2 = 0;
m_ram_ctrl = 0;
m_counter.d = 0;
m_output_compare[0].d = 0;
@@ -1337,7 +1355,7 @@ void m6801_cpu_device::device_start()
m_trcsr_read_orfe = 0;
m_trcsr_read_rdrf = 0;
m_tx = 0;
- m_ext_serclock = 0;
+ m_sci_clocks = 0;
m_use_ext_serclock = false;
m_latch09 = 0;
@@ -1348,10 +1366,10 @@ void m6801_cpu_device::device_start()
save_item(NAME(m_nvram_battery));
save_item(NAME(m_port_ddr));
save_item(NAME(m_port_data));
+ save_item(NAME(m_port_ddr_override));
save_item(NAME(m_p3csr));
save_item(NAME(m_tcsr));
save_item(NAME(m_pending_tcsr));
- save_item(NAME(m_irq2));
save_item(NAME(m_ram_ctrl));
save_item(NAME(m_counter.d));
@@ -1374,7 +1392,7 @@ void m6801_cpu_device::device_start()
save_item(NAME(m_trcsr_read_orfe));
save_item(NAME(m_trcsr_read_rdrf));
save_item(NAME(m_tx));
- save_item(NAME(m_ext_serclock));
+ save_item(NAME(m_sci_clocks));
save_item(NAME(m_use_ext_serclock));
save_item(NAME(m_latch09));
@@ -1419,6 +1437,7 @@ void hd6301x_cpu_device::device_start()
save_item(NAME(m_portx_ddr));
save_item(NAME(m_portx_data));
+ save_item(NAME(m_portx_ddr_override));
save_item(NAME(m_tcsr2));
save_item(NAME(m_pending_tcsr2));
save_item(NAME(m_output_compare[1].d));
@@ -1443,7 +1462,6 @@ void m6801_cpu_device::device_reset()
m6800_cpu_device::device_reset();
m_standby_func(0);
- m_irq_state[M6801_TIN_LINE] = 0;
m_is3_state = 0;
std::fill(std::begin(m_port_ddr), std::end(m_port_ddr), 0);
@@ -1454,7 +1472,6 @@ void m6801_cpu_device::device_reset()
/* TODO: on reset port 2 should be read to determine the operating mode (bits 0-2) */
m_tcsr = 0x00;
m_pending_tcsr = 0x00;
- m_irq2 = 0;
CTD = 0x0000;
OCD = 0xffff;
TOD = 0xffff;
@@ -1470,7 +1487,6 @@ void m6801_cpu_device::device_reset()
m_trcsr_read_tdre = 0;
m_trcsr_read_orfe = 0;
m_trcsr_read_rdrf = 0;
- m_ext_serclock = 0;
m_use_ext_serclock = false;
set_rmcr(0);
@@ -1522,12 +1538,12 @@ void hd6301y_cpu_device::device_reset()
m_p6csr = 7;
}
-uint8_t mc68120_device::dpram_r(offs_t offset)
+u8 mc68120_device::dpram_r(offs_t offset)
{
return m_internal_ram[offset & 0x7f];
}
-void mc68120_device::dpram_w(offs_t offset, uint8_t data)
+void mc68120_device::dpram_w(offs_t offset, u8 data)
{
m_internal_ram[offset & 0x7f] = data;
}
@@ -1537,19 +1553,21 @@ void mc68120_device::dpram_w(offs_t offset, uint8_t data)
bool m6801_cpu_device::nvram_write(util::write_stream &file)
{
- // if it's currently not battery-backed, reinitialize nvram
- // so it won't load the previous nvram file on the next boot
+ // if it's currently not battery-backed, don't save at all
if (!m_nvram_battery)
- nvram_default();
+ return true;
+ std::error_condition err;
size_t actual;
- if (file.write(&m_internal_ram[0], m_nvram_bytes, actual) || m_nvram_bytes != actual)
+ std::tie(err, actual) = write(file, &m_internal_ram[0], m_nvram_bytes);
+ if (err)
return false;
// upper bits of RAM control register
- uint8_t ram_ctrl = m_ram_ctrl & 0xc0;
- if (file.write(&ram_ctrl, 1, actual) || actual != 1)
+ u8 ram_ctrl = m_ram_ctrl & 0xc0;
+ std::tie(err, actual) = write(file, &ram_ctrl, 1);
+ if (err)
return false;
return true;
@@ -1557,14 +1575,17 @@ bool m6801_cpu_device::nvram_write(util::write_stream &file)
bool m6801_cpu_device::nvram_read(util::read_stream &file)
{
+ std::error_condition err;
size_t actual;
- if (file.read(&m_internal_ram[0], m_nvram_bytes, actual) || m_nvram_bytes != actual)
+ std::tie(err, actual) = read(file, &m_internal_ram[0], m_nvram_bytes);
+ if (err || (m_nvram_bytes != actual))
return false;
// upper bits of RAM control register
- uint8_t ram_ctrl = 0;
- if (file.read(&ram_ctrl, 1, actual) || actual != 1)
+ u8 ram_ctrl = 0;
+ std::tie(err, actual) = read(file, &ram_ctrl, 1);
+ if (err || (1 != actual))
return false;
m_ram_ctrl |= ram_ctrl & 0xc0;
@@ -1597,11 +1618,14 @@ void m6801_cpu_device::nvram_default()
bool hd6301_cpu_device::nvram_write(util::write_stream &file)
{
+ // if it's currently not battery-backed, don't save at all
+ if (!m_nvram_battery)
+ return true;
+
if (!m6801_cpu_device::nvram_write(file))
return false;
- size_t actual;
- uint8_t buf[7];
+ std::vector<u8> buf(7);
// misc registers
buf[0] = m_s.b.h;
@@ -1612,28 +1636,29 @@ bool hd6301_cpu_device::nvram_write(util::write_stream &file)
buf[5] = m_d.b.l;
buf[6] = m_tdr;
- if (file.write(&buf, sizeof(buf), actual) || (sizeof(buf) != actual))
- return false;
-
// port output latches
- if (file.write(&m_port_data[0], sizeof(m_port_data), actual) || sizeof(m_port_data) != actual)
- return false;
+ buf.insert(buf.end(), m_port_data, m_port_data + sizeof(m_port_data));
- return true;
+ auto const [err, actual] = write(file, buf.data(), buf.size());
+ return !err;
}
bool hd6301x_cpu_device::nvram_write(util::write_stream &file)
{
+ // if it's currently not battery-backed, don't save at all
+ if (!m_nvram_battery)
+ return true;
+
if (!hd6301_cpu_device::nvram_write(file))
return false;
- size_t actual;
+ std::vector<u8> buf;
// port output latches
- if (file.write(&m_portx_data[0], sizeof(m_portx_data), actual) || sizeof(m_portx_data) != actual)
- return false;
+ buf.insert(buf.begin(), m_portx_data, m_portx_data + sizeof(m_portx_data));
- return true;
+ auto const [err, actual] = write(file, buf.data(), buf.size());
+ return !err;
}
bool hd6301_cpu_device::nvram_read(util::read_stream &file)
@@ -1641,11 +1666,13 @@ bool hd6301_cpu_device::nvram_read(util::read_stream &file)
if (!m6801_cpu_device::nvram_read(file))
return false;
+ std::error_condition err;
size_t actual;
- uint8_t buf[7];
+ u8 buf[7];
// misc registers
- if (file.read(&buf, sizeof(buf), actual) || (sizeof(buf) != actual))
+ std::tie(err, actual) = read(file, &buf, sizeof(buf));
+ if (err || (sizeof(buf) != actual))
return false;
m_s.b.h = buf[0];
@@ -1657,7 +1684,8 @@ bool hd6301_cpu_device::nvram_read(util::read_stream &file)
m_tdr = buf[6];
// port output latches
- if (file.read(&m_port_data[0], sizeof(m_port_data), actual) || sizeof(m_port_data) != actual)
+ std::tie(err, actual) = read(file, &m_port_data[0], sizeof(m_port_data));
+ if (err || (sizeof(m_port_data) != actual))
return false;
return true;
@@ -1668,20 +1696,16 @@ bool hd6301x_cpu_device::nvram_read(util::read_stream &file)
if (!hd6301_cpu_device::nvram_read(file))
return false;
- size_t actual;
-
// port output latches
- if (file.read(&m_portx_data[0], sizeof(m_portx_data), actual) || sizeof(m_portx_data) != actual)
- return false;
-
- return true;
+ auto const [err, actual] = read(file, &m_portx_data[0], sizeof(m_portx_data));
+ return !err && (sizeof(m_portx_data) == actual);
}
// internal registers
-void m6801_cpu_device::p1_ddr_w(uint8_t data)
+void m6801_cpu_device::p1_ddr_w(u8 data)
{
LOGPORT("Port 1 Data Direction Register: %02x\n", data);
@@ -1692,21 +1716,23 @@ void m6801_cpu_device::p1_ddr_w(uint8_t data)
}
}
-void hd6301y_cpu_device::p1_ddr_1bit_w(uint8_t data)
+void hd6301y_cpu_device::p1_ddr_1bit_w(u8 data)
{
// HD6301Y DDR1 is 1-bit (HD6301X does not have DDR1)
hd6301_cpu_device::p1_ddr_w(BIT(data, 0) ? 0xff : 0x00);
}
-uint8_t m6801_cpu_device::p1_data_r()
+u8 m6801_cpu_device::p1_data_r()
{
- if (m_port_ddr[0] == 0xff)
+ u8 ddr = m_port_ddr[0] & ~m_port_ddr_override[0];
+
+ if (ddr == 0xff)
return m_port_data[0];
else
- return (m_in_port_func[0]() & (m_port_ddr[0] ^ 0xff)) | (m_port_data[0] & m_port_ddr[0]);
+ return (m_in_port_func[0]() & ~ddr) | (m_port_data[0] & ddr);
}
-void m6801_cpu_device::p1_data_w(uint8_t data)
+void m6801_cpu_device::p1_data_w(u8 data)
{
LOGPORT("Port 1 Data Register: %02x\n", data);
@@ -1719,8 +1745,8 @@ void m6801_cpu_device::write_port2()
{
if (!m_port2_written) return;
- uint8_t data = m_port_data[1];
- uint8_t ddr = m_port_ddr[1] & 0x1f;
+ u8 data = m_port_data[1];
+ u8 ddr = m_port_ddr[1] & 0x1f;
if ((ddr != 0x1f) && ddr)
{
@@ -1742,13 +1768,13 @@ void hd6301x_cpu_device::write_port2()
{
if (!m_port2_written) return;
- uint8_t ddr = m_port_ddr[1];
+ u8 ddr = m_port_ddr[1];
if (m_tcsr2 & TCSR2_OE1)
ddr |= 0x02;
if (m_tcsr2 & TCSR2_OE2)
ddr |= 0x20;
- uint8_t data = (m_port_data[1] & ddr) | (ddr ^ 0xff);
+ u8 data = (m_port_data[1] & ddr) | (ddr ^ 0xff);
if (m_trcsr & M6801_TRCSR_TE)
{
@@ -1764,7 +1790,7 @@ void hd6301x_cpu_device::write_port2()
m_out_port_func[1](0, data, ddr);
}
-void m6801_cpu_device::p2_ddr_w(uint8_t data)
+void m6801_cpu_device::p2_ddr_w(u8 data)
{
LOGPORT("Port 2 Data Direction Register: %02x\n", data);
@@ -1775,21 +1801,23 @@ void m6801_cpu_device::p2_ddr_w(uint8_t data)
}
}
-void hd6301x_cpu_device::p2_ddr_2bit_w(uint8_t data)
+void hd6301x_cpu_device::p2_ddr_2bit_w(u8 data)
{
// HD6301X DDR2 is 2-bit (it is 8-bit again on HD6301Y)
hd6301_cpu_device::p2_ddr_w((BIT(data, 1) ? 0xfe : 0x00) | (data & 0x01));
}
-uint8_t m6801_cpu_device::p2_data_r()
+u8 m6801_cpu_device::p2_data_r()
{
- if (m_port_ddr[1] == 0xff)
+ u8 ddr = m_port_ddr[1] & ~m_port_ddr_override[1];
+
+ if (ddr == 0xff)
return m_port_data[1];
else
- return (m_in_port_func[1]() & (m_port_ddr[1] ^ 0xff)) | (m_port_data[1] & m_port_ddr[1]);
+ return (m_in_port_func[1]() & ~ddr) | (m_port_data[1] & ddr);
}
-void m6801_cpu_device::p2_data_w(uint8_t data)
+void m6801_cpu_device::p2_data_w(u8 data)
{
LOGPORT("Port 2 Data Register: %02x\n", data);
@@ -1806,7 +1834,7 @@ void m6801_cpu_device::set_os3(int state)
m_out_sc2_func(state);
}
-void m6801_cpu_device::p3_ddr_w(uint8_t data)
+void m6801_cpu_device::p3_ddr_w(u8 data)
{
LOGPORT("Port 3 Data Direction Register: %02x\n", data);
@@ -1817,16 +1845,14 @@ void m6801_cpu_device::p3_ddr_w(uint8_t data)
}
}
-void hd6301x_cpu_device::p3_ddr_1bit_w(uint8_t data)
+void hd6301x_cpu_device::p3_ddr_1bit_w(u8 data)
{
// HD6301X/Y DDR3 is 1-bit
hd6301_cpu_device::p3_ddr_w(BIT(data, 0) ? 0xff : 0x00);
}
-uint8_t m6801_cpu_device::p3_data_r()
+u8 m6801_cpu_device::p3_data_r()
{
- uint8_t data;
-
if (!machine().side_effects_disabled())
{
if (m_pending_isf_clear)
@@ -1842,10 +1868,12 @@ uint8_t m6801_cpu_device::p3_data_r()
}
}
- if ((m_p3csr & M6801_P3CSR_LE) || (m_port_ddr[2] == 0xff))
+ u8 data, ddr = m_port_ddr[2] & ~m_port_ddr_override[2];
+
+ if ((m_p3csr & M6801_P3CSR_LE) || (ddr == 0xff))
data = m_port_data[2];
else
- data = (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff)) | (m_port_data[2] & m_port_ddr[2]);
+ data = (m_in_port_func[2]() & ~ddr) | (m_port_data[2] & ddr);
if (!machine().side_effects_disabled())
{
@@ -1856,10 +1884,11 @@ uint8_t m6801_cpu_device::p3_data_r()
set_os3(CLEAR_LINE);
}
}
+
return data;
}
-void m6801_cpu_device::p3_data_w(uint8_t data)
+void m6801_cpu_device::p3_data_w(u8 data)
{
LOGPORT("Port 3 Data Register: %02x\n", data);
@@ -1884,16 +1913,18 @@ void m6801_cpu_device::p3_data_w(uint8_t data)
}
}
-uint8_t hd6301x_cpu_device::p3_data_r()
+u8 hd6301x_cpu_device::p3_data_r()
{
// no handshaking protocol
- if (m_port_ddr[2] == 0xff)
+ u8 ddr = m_port_ddr[2] & ~m_port_ddr_override[2];
+
+ if (ddr == 0xff)
return m_port_data[2];
else
- return (m_in_port_func[2]() & (m_port_ddr[2] ^ 0xff)) | (m_port_data[2] & m_port_ddr[2]);
+ return (m_in_port_func[2]() & ~ddr) | (m_port_data[2] & ddr);
}
-void hd6301x_cpu_device::p3_data_w(uint8_t data)
+void hd6301x_cpu_device::p3_data_w(u8 data)
{
// no handshaking protocol
LOGPORT("Port 3 Data Register: %02x\n", data);
@@ -1902,7 +1933,7 @@ void hd6301x_cpu_device::p3_data_w(uint8_t data)
m_out_port_func[2](0, (m_port_data[2] & m_port_ddr[2]) | (m_port_ddr[2] ^ 0xff), m_port_ddr[2]);
}
-uint8_t m6801_cpu_device::p3_csr_r()
+u8 m6801_cpu_device::p3_csr_r()
{
if ((m_p3csr & M6801_P3CSR_IS3_FLAG) && !machine().side_effects_disabled())
{
@@ -1912,7 +1943,7 @@ uint8_t m6801_cpu_device::p3_csr_r()
return m_p3csr;
}
-void m6801_cpu_device::p3_csr_w(uint8_t data)
+void m6801_cpu_device::p3_csr_w(u8 data)
{
LOGPORT("Port 3 Control and Status Register: %02x\n", data);
@@ -1920,7 +1951,7 @@ void m6801_cpu_device::p3_csr_w(uint8_t data)
}
-void m6801_cpu_device::p4_ddr_w(uint8_t data)
+void m6801_cpu_device::p4_ddr_w(u8 data)
{
LOGPORT("Port 4 Data Direction Register: %02x\n", data);
@@ -1931,15 +1962,17 @@ void m6801_cpu_device::p4_ddr_w(uint8_t data)
}
}
-uint8_t m6801_cpu_device::p4_data_r()
+u8 m6801_cpu_device::p4_data_r()
{
- if (m_port_ddr[3] == 0xff)
+ u8 ddr = m_port_ddr[3] & ~m_port_ddr_override[3];
+
+ if (ddr == 0xff)
return m_port_data[3];
else
- return (m_in_port_func[3]() & (m_port_ddr[3] ^ 0xff)) | (m_port_data[3] & m_port_ddr[3]);
+ return (m_in_port_func[3]() & ~ddr) | (m_port_data[3] & ddr);
}
-void m6801_cpu_device::p4_data_w(uint8_t data)
+void m6801_cpu_device::p4_data_w(u8 data)
{
LOGPORT("Port 4 Data Register: %02x\n", data);
@@ -1947,7 +1980,7 @@ void m6801_cpu_device::p4_data_w(uint8_t data)
m_out_port_func[3](0, (m_port_data[3] & m_port_ddr[3]) | (m_port_ddr[3] ^ 0xff), m_port_ddr[3]);
}
-void hd6301y_cpu_device::p5_ddr_w(uint8_t data)
+void hd6301y_cpu_device::p5_ddr_w(u8 data)
{
LOGPORT("Port 5 Data Direction Register: %02x\n", data);
@@ -1959,21 +1992,37 @@ void hd6301y_cpu_device::p5_ddr_w(uint8_t data)
}
-uint8_t hd6301x_cpu_device::p5_data_r()
+u8 hd6301x_cpu_device::p5_data_r()
{
- // read-only
- return m_in_portx_func[0]();
+ u8 data = m_in_portx_func[0]();
+
+ if (m_irq_state[HD6301_IRQ1_LINE])
+ data &= 0xfe;
+ if (m_irq_state[HD6301_IRQ2_LINE])
+ data &= 0xfd;
+
+ // no DDR, read-only
+ return data;
}
-uint8_t hd6301y_cpu_device::p5_data_r()
+u8 hd6301y_cpu_device::p5_data_r()
{
- if (m_portx_ddr[0] == 0xff)
+ u8 ddr = m_portx_ddr[0] & ~m_portx_ddr_override[0];
+
+ if (ddr == 0xff)
return m_portx_data[0];
else
- return ((m_in_portx_func[0]() | ((m_irq_state[M6801_IS3_LINE]) ? 0x10 : 0)) & (m_portx_ddr[0] ^ 0xff)) | (m_portx_data[0] & m_portx_ddr[0]);
+ {
+ u8 data = hd6301x_cpu_device::p5_data_r();
+
+ if (m_irq_state[M6801_IS3_LINE])
+ data |= 0x10;
+
+ return (data & ~ddr) | (m_portx_data[0] & ddr);
+ }
}
-void hd6301y_cpu_device::p5_data_w(uint8_t data)
+void hd6301y_cpu_device::p5_data_w(u8 data)
{
LOGPORT("Port 5 Data Register: %02x\n", data);
@@ -1982,7 +2031,7 @@ void hd6301y_cpu_device::p5_data_w(uint8_t data)
}
-void hd6301x_cpu_device::p6_ddr_w(uint8_t data)
+void hd6301x_cpu_device::p6_ddr_w(u8 data)
{
LOGPORT("Port 6 Data Direction Register: %02x\n", data);
@@ -1993,15 +2042,17 @@ void hd6301x_cpu_device::p6_ddr_w(uint8_t data)
}
}
-uint8_t hd6301x_cpu_device::p6_data_r()
+u8 hd6301x_cpu_device::p6_data_r()
{
- if (m_portx_ddr[1] == 0xff)
+ u8 ddr = m_portx_ddr[1] & ~m_portx_ddr_override[1];
+
+ if (ddr == 0xff)
return m_portx_data[1];
else
- return (m_in_portx_func[1]() & (m_portx_ddr[1] ^ 0xff)) | (m_portx_data[1] & m_portx_ddr[1]);
+ return (m_in_portx_func[1]() & ~ddr) | (m_portx_data[1] & ddr);
}
-void hd6301x_cpu_device::p6_data_w(uint8_t data)
+void hd6301x_cpu_device::p6_data_w(u8 data)
{
LOGPORT("Port 6 Data Register: %02x\n", data);
@@ -2009,7 +2060,7 @@ void hd6301x_cpu_device::p6_data_w(uint8_t data)
m_out_portx_func[1](0, (m_portx_data[1] & m_portx_ddr[1]) | (m_portx_ddr[1] ^ 0xff), m_portx_ddr[1]);
}
-uint8_t hd6301y_cpu_device::p6_data_r()
+u8 hd6301y_cpu_device::p6_data_r()
{
if (!machine().side_effects_disabled())
clear_pending_isf();
@@ -2017,7 +2068,7 @@ uint8_t hd6301y_cpu_device::p6_data_r()
return hd6301x_cpu_device::p6_data_r();
}
-void hd6301y_cpu_device::p6_data_w(uint8_t data)
+void hd6301y_cpu_device::p6_data_w(u8 data)
{
clear_pending_isf();
@@ -2034,7 +2085,7 @@ void hd6301y_cpu_device::clear_pending_isf()
}
}
-uint8_t hd6301y_cpu_device::p6_csr_r()
+u8 hd6301y_cpu_device::p6_csr_r()
{
if (!machine().side_effects_disabled())
m_pending_isf_clear = true;
@@ -2042,22 +2093,21 @@ uint8_t hd6301y_cpu_device::p6_csr_r()
return m_p6csr | 7;
}
-void hd6301y_cpu_device::p6_csr_w(uint8_t data)
+void hd6301y_cpu_device::p6_csr_w(u8 data)
{
LOGPORT("Port 6 Control/Status Register: %02x\n", data);
m_p6csr = (m_p6csr & 0x80) | (data & 0x7f);
- if (!(m_cc & 0x10) && data & 0x40)
- m6800_check_irq2();
+ check_irq2();
}
-uint8_t hd6301x_cpu_device::p7_data_r()
+u8 hd6301x_cpu_device::p7_data_r()
{
return 0xe0 | m_portx_data[2];
}
-void hd6301x_cpu_device::p7_data_w(uint8_t data)
+void hd6301x_cpu_device::p7_data_w(u8 data)
{
data &= 0x1f;
@@ -2068,14 +2118,14 @@ void hd6301x_cpu_device::p7_data_w(uint8_t data)
}
-uint8_t m6801_cpu_device::tcsr_r()
+u8 m6801_cpu_device::tcsr_r()
{
if (!machine().side_effects_disabled())
m_pending_tcsr = 0;
return m_tcsr;
}
-void m6801_cpu_device::tcsr_w(uint8_t data)
+void m6801_cpu_device::tcsr_w(u8 data)
{
data &= 0x1f;
@@ -2083,27 +2133,24 @@ void m6801_cpu_device::tcsr_w(uint8_t data)
m_tcsr = data | (m_tcsr & 0xe0);
m_pending_tcsr &= m_tcsr;
- modified_tcsr();
- if (!(m_cc & 0x10))
- m6800_check_irq2();
+ check_irq2();
}
-uint8_t m6801_cpu_device::ch_r()
+u8 m6801_cpu_device::ch_r()
{
if (!(m_pending_tcsr & TCSR_TOF) && !machine().side_effects_disabled())
{
m_tcsr &= ~TCSR_TOF;
- modified_tcsr();
}
return m_counter.b.h;
}
-uint8_t m6801_cpu_device::cl_r()
+u8 m6801_cpu_device::cl_r()
{
return m_counter.b.l;
}
-void m6801_cpu_device::ch_w(uint8_t data)
+void m6801_cpu_device::ch_w(u8 data)
{
LOGTIMER("Counter High Register: %02x\n", data);
@@ -2113,7 +2160,7 @@ void m6801_cpu_device::ch_w(uint8_t data)
modified_counters();
}
-void m6801_cpu_device::cl_w(uint8_t data)
+void m6801_cpu_device::cl_w(u8 data)
{
LOGTIMER("Counter Low Register: %02x\n", data);
@@ -2122,24 +2169,23 @@ void m6801_cpu_device::cl_w(uint8_t data)
modified_counters();
}
-uint8_t m6801_cpu_device::ocrh_r()
+u8 m6801_cpu_device::ocrh_r()
{
return m_output_compare[0].b.h;
}
-uint8_t m6801_cpu_device::ocrl_r()
+u8 m6801_cpu_device::ocrl_r()
{
return m_output_compare[0].b.l;
}
-void m6801_cpu_device::ocrh_w(uint8_t data)
+void m6801_cpu_device::ocrh_w(u8 data)
{
LOGTIMER("Output Compare High Register: %02x\n", data);
if (!(m_pending_tcsr & TCSR_OCF))
{
m_tcsr &= ~TCSR_OCF;
- modified_tcsr();
}
if (m_output_compare[0].b.h != data)
@@ -2149,14 +2195,13 @@ void m6801_cpu_device::ocrh_w(uint8_t data)
}
}
-void m6801_cpu_device::ocrl_w(uint8_t data)
+void m6801_cpu_device::ocrl_w(u8 data)
{
LOGTIMER("Output Compare Low Register: %02x\n", data);
if (!(m_pending_tcsr & TCSR_OCF))
{
m_tcsr &= ~TCSR_OCF;
- modified_tcsr();
}
if (m_output_compare[0].b.l != data)
@@ -2166,38 +2211,35 @@ void m6801_cpu_device::ocrl_w(uint8_t data)
}
}
-uint8_t m6801_cpu_device::icrh_r()
+u8 m6801_cpu_device::icrh_r()
{
if (!(m_pending_tcsr & TCSR_ICF) && !machine().side_effects_disabled())
{
m_tcsr &= ~TCSR_ICF;
- modified_tcsr();
}
return (m_input_capture >> 0) & 0xff;
}
-uint8_t m6801_cpu_device::icrl_r()
+u8 m6801_cpu_device::icrl_r()
{
return (m_input_capture >> 8) & 0xff;
}
-uint8_t m6801u4_cpu_device::tcr2_r()
+u8 m6801u4_cpu_device::tcr2_r()
{
return m_tcr[1] | 0x03;
}
-void m6801u4_cpu_device::tcr2_w(uint8_t data)
+void m6801u4_cpu_device::tcr2_w(u8 data)
{
LOGTIMER("Timer Control Register 2: %02x\n", data);
m_tcr[1] = data & 0xfc;
- modified_tcsr();
- if (!(m_cc & 0x10))
- m6800_check_irq2();
+ check_irq2();
}
-uint8_t m6801u4_cpu_device::tsr_r()
+u8 m6801u4_cpu_device::tsr_r()
{
if (!machine().side_effects_disabled())
{
@@ -2212,26 +2254,25 @@ uint8_t m6801u4_cpu_device::tsr_r()
}
template<int N>
-uint8_t m6801u4_cpu_device::ocr2h_r()
+u8 m6801u4_cpu_device::ocr2h_r()
{
return m_output_compare[N].b.h;
}
template<int N>
-uint8_t m6801u4_cpu_device::ocr2l_r()
+u8 m6801u4_cpu_device::ocr2l_r()
{
return m_output_compare[N].b.l;
}
template<int N>
-void m6801u4_cpu_device::ocr2h_w(uint8_t data)
+void m6801u4_cpu_device::ocr2h_w(u8 data)
{
LOGTIMER("Output Compare High Register %d: %02x\n", N + 1, data);
if (!(m_pending_tsr & (TSR_OCF2 * N)))
{
m_tsr &= ~(TSR_OCF2 * N);
- modified_tcsr();
}
if (m_output_compare[N].b.h != data)
@@ -2242,14 +2283,13 @@ void m6801u4_cpu_device::ocr2h_w(uint8_t data)
}
template<int N>
-void m6801u4_cpu_device::ocr2l_w(uint8_t data)
+void m6801u4_cpu_device::ocr2l_w(u8 data)
{
LOGTIMER("Output Compare Low Register %d: %02x\n", N + 1, data);
if (!(m_pending_tsr & (TSR_OCF2 * N)))
{
m_tsr &= ~(TSR_OCF2 * N);
- modified_tcsr();
}
if (m_output_compare[N].b.l != data)
@@ -2260,7 +2300,7 @@ void m6801u4_cpu_device::ocr2l_w(uint8_t data)
}
-uint8_t hd6301x_cpu_device::tcsr2_r()
+u8 hd6301x_cpu_device::tcsr2_r()
{
if (!machine().side_effects_disabled())
{
@@ -2270,36 +2310,33 @@ uint8_t hd6301x_cpu_device::tcsr2_r()
return m_tcsr2 | (m_tcsr & (TCSR_ICF | TCSR_OCF)) | 0x10;
}
-void hd6301x_cpu_device::tcsr2_w(uint8_t data)
+void hd6301x_cpu_device::tcsr2_w(u8 data)
{
LOGTIMER("Timer Control and Status Register 2: %02x\n", data);
data &= TCSR2_OE1 | TCSR2_OE2 | TCSR2_OLVL2 | TCSR2_EOCI2;
m_tcsr2 = data | (m_tcsr2 & TCSR2_OCF2);
m_pending_tcsr2 &= m_tcsr2;
- modified_tcsr();
- if (!(m_cc & 0x10))
- m6800_check_irq2();
+ check_irq2();
}
-uint8_t hd6301x_cpu_device::ocr2h_r()
+u8 hd6301x_cpu_device::ocr2h_r()
{
return m_output_compare[1].b.h;
}
-uint8_t hd6301x_cpu_device::ocr2l_r()
+u8 hd6301x_cpu_device::ocr2l_r()
{
return m_output_compare[1].b.l;
}
-void hd6301x_cpu_device::ocr2h_w(uint8_t data)
+void hd6301x_cpu_device::ocr2h_w(u8 data)
{
LOGTIMER("Output Compare High Register 2: %02x\n", data);
if (!(m_pending_tcsr2 & TCSR2_OCF2))
{
m_tcsr2 &= ~TCSR2_OCF2;
- modified_tcsr();
}
if (m_output_compare[1].b.h != data)
@@ -2309,14 +2346,13 @@ void hd6301x_cpu_device::ocr2h_w(uint8_t data)
}
}
-void hd6301x_cpu_device::ocr2l_w(uint8_t data)
+void hd6301x_cpu_device::ocr2l_w(u8 data)
{
LOGTIMER("Output Compare Low Register 2: %02x\n", data);
if (!(m_pending_tcsr2 & TCSR2_OCF2))
{
m_tcsr2 &= ~TCSR2_OCF2;
- modified_tcsr();
}
if (m_output_compare[1].b.l != data)
@@ -2329,72 +2365,61 @@ void hd6301x_cpu_device::ocr2l_w(uint8_t data)
void hd6301x_cpu_device::increment_t2cnt(int amount)
{
- if (amount > uint8_t(m_tconr - m_t2cnt))
+ while (amount--)
{
- if (m_t2cnt > m_tconr)
+ if (++m_t2cnt == ((m_tconr + 1) & 0xff))
{
- amount -= 256 - m_t2cnt;
m_t2cnt = 0;
- }
- m_t2cnt = (m_t2cnt + amount) % (m_tconr + 1);
- if (BIT(m_tcsr3, 3))
- {
- if (m_tout3 != BIT(m_tcsr3, 2))
+ if (BIT(m_tcsr3, 3))
{
- m_tout3 = BIT(m_tcsr3, 2);
+ if (m_tout3 != BIT(m_tcsr3, 2))
+ {
+ m_tout3 = BIT(m_tcsr3, 2);
+ m_port2_written = true;
+ write_port2();
+ }
+ }
+ else if (BIT(m_tcsr3, 2))
+ {
+ m_tout3 = !m_tout3;
m_port2_written = true;
write_port2();
}
- }
- else if (BIT(m_tcsr3, 2))
- {
- m_tout3 = !m_tout3;
- m_port2_written = true;
- write_port2();
- }
- if (BIT(m_rmcr, 5) && !m_use_ext_serclock)
- {
- m_ext_serclock++;
- if (m_ext_serclock >= 32)
- {
- m_ext_serclock = 0;
- machine().scheduler().synchronize(timer_expired_delegate(FUNC(hd6301x_cpu_device::sci_tick), this));
- }
- }
+ if (BIT(m_rmcr, 5) && !m_use_ext_serclock)
+ sci_clock_internal(32);
- m_tcsr3 |= 0x80;
- m_timer_next = 0; // HACK
+ m_tcsr3 |= 0x80;
+ m_timer_next = 0; // HACK
+ }
}
- else
- m_t2cnt += amount;
}
-uint8_t hd6301x_cpu_device::t2cnt_r()
+u8 hd6301x_cpu_device::t2cnt_r()
{
return m_t2cnt;
}
-void hd6301x_cpu_device::t2cnt_w(uint8_t data)
+void hd6301x_cpu_device::t2cnt_w(u8 data)
{
m_t2cnt = data;
m_t2cnt_written = true;
}
-void hd6301x_cpu_device::tconr_w(uint8_t data)
+void hd6301x_cpu_device::tconr_w(u8 data)
{
m_tconr = data;
}
-uint8_t hd6301x_cpu_device::tcsr3_r()
+u8 hd6301x_cpu_device::tcsr3_r()
{
return m_tcsr3;
}
-void hd6301x_cpu_device::tcsr3_w(uint8_t data)
+void hd6301x_cpu_device::tcsr3_w(u8 data)
{
- uint8_t tout3_last_enable = (m_tcsr3 & 0x0c) != 0;
+ u8 tout3_last_enable = (m_tcsr3 & 0x0c) != 0;
// Bit 5 does not exist and Bit 7 can only be written with 0
m_tcsr3 = data & (0x5f | (m_tcsr3 & 0x80));
@@ -2409,22 +2434,24 @@ void hd6301x_cpu_device::tcsr3_w(uint8_t data)
m_port2_written = true;
write_port2();
}
+
+ check_irq2();
}
-uint8_t m6801_cpu_device::sci_rmcr_r()
+u8 m6801_cpu_device::sci_rmcr_r()
{
return m_rmcr;
}
-void m6801_cpu_device::sci_rmcr_w(uint8_t data)
+void m6801_cpu_device::sci_rmcr_w(u8 data)
{
LOGSER("SCI Rate and Mode Control Register: %02x\n", data);
set_rmcr(data);
}
-uint8_t m6801_cpu_device::sci_trcsr_r()
+u8 m6801_cpu_device::sci_trcsr_r()
{
if (!machine().side_effects_disabled())
{
@@ -2447,7 +2474,7 @@ uint8_t m6801_cpu_device::sci_trcsr_r()
return m_trcsr;
}
-void m6801_cpu_device::sci_trcsr_w(uint8_t data)
+void m6801_cpu_device::sci_trcsr_w(u8 data)
{
LOGSER("SCI Transmit/Receive Control and Status Register: %02x\n", data);
@@ -2466,7 +2493,7 @@ void m6801_cpu_device::sci_trcsr_w(uint8_t data)
m_trcsr = (m_trcsr & 0xe0) | (data & 0x1f);
}
-uint8_t m6801_cpu_device::sci_rdr_r()
+u8 m6801_cpu_device::sci_rdr_r()
{
if (!machine().side_effects_disabled())
{
@@ -2488,7 +2515,7 @@ uint8_t m6801_cpu_device::sci_rdr_r()
return m_rdr;
}
-void m6801_cpu_device::sci_tdr_w(uint8_t data)
+void m6801_cpu_device::sci_tdr_w(u8 data)
{
LOGSER("SCI Transmit Data Register: $%02x/%d\n", data, data);
@@ -2501,59 +2528,50 @@ void m6801_cpu_device::sci_tdr_w(uint8_t data)
}
-uint8_t m6801_cpu_device::rcr_r()
+u8 m6801_cpu_device::rcr_r()
{
return m_ram_ctrl | 0x3f;
}
-uint8_t hd6301x_cpu_device::rcr_r()
+u8 hd6301x_cpu_device::rcr_r()
{
return m_ram_ctrl | 0x30;
}
-uint8_t hd6301y_cpu_device::rcr_r()
+u8 hd6301y_cpu_device::rcr_r()
{
// no unused bits
return m_ram_ctrl;
}
-void m6801_cpu_device::rcr_w(uint8_t data)
+void m6801_cpu_device::rcr_w(u8 data)
{
LOG("RAM Control Register: %02x\n", data);
m_ram_ctrl = data;
}
-void hd6301y_cpu_device::rcr_w(uint8_t data)
+void hd6301x_cpu_device::rcr_w(u8 data)
{
m6801_cpu_device::rcr_w(data);
+ check_irq_lines();
+}
+
+void hd6301y_cpu_device::rcr_w(u8 data)
+{
+ hd6301x_cpu_device::rcr_w(data);
// software standby mode
if (~data & 0x20)
execute_set_input(M6801_STBY_LINE, ASSERT_LINE);
}
-uint8_t m6801_cpu_device::ff_r()
+u8 m6801_cpu_device::ff_r()
{
return 0xff;
}
-void m6801_cpu_device::m6801_clock_serial()
-{
- if (m_use_ext_serclock)
- {
- m_ext_serclock++;
-
- if (m_ext_serclock >= m_sclk_divider)
- {
- m_ext_serclock = 0;
- serial_transmit();
- serial_receive();
- }
- }
-}
-
std::unique_ptr<util::disasm_interface> m6801_cpu_device::create_disassembler()
{
return std::make_unique<m680x_disassembler>(6801);
@@ -2576,5 +2594,5 @@ std::unique_ptr<util::disasm_interface> hd6301_cpu_device::create_disassembler()
void hd6301_cpu_device::take_trap()
{
- enter_interrupt("take TRAP\n",0xffee);
+ enter_interrupt("TRAP", 0xffee);
}
diff --git a/src/devices/cpu/m6800/m6801.h b/src/devices/cpu/m6800/m6801.h
index f4abcea948c..98f8e5c081a 100644
--- a/src/devices/cpu/m6800/m6801.h
+++ b/src/devices/cpu/m6800/m6801.h
@@ -11,21 +11,18 @@
enum
{
- M6801_IRQ_LINE = M6800_IRQ_LINE,
- M6801_TIN_LINE, // P20/TIN Input Capture line (edge sense). Active edge is selectable by internal reg.
+ M6801_TIN_LINE = M6800_LINE_MAX, // P20/TIN Input Capture line (edge sense). Active edge is selectable by internal reg.
M6801_IS3_LINE, // SC1/IOS/IS3 (P54/IS on HD6301Y)
- M6801_STBY_LINE // STBY pin, or internal standby
-};
+ M6801_STBY_LINE, // STBY pin, or internal standby
-enum
-{
- M6803_IRQ_LINE = M6800_IRQ_LINE
+ M6801_LINE_MAX
};
-enum
-{
- HD6301_IRQ_LINE = M6800_IRQ_LINE
-};
+#define M6801_IRQ1_LINE M6800_IRQ_LINE
+#define M6803_IRQ1_LINE M6800_IRQ_LINE
+#define HD6301_IRQ1_LINE M6800_IRQ_LINE
+
+#define HD6301_IRQ2_LINE M6801_LINE_MAX // HD6301X/Y
enum
{
@@ -43,7 +40,7 @@ enum
class m6801_cpu_device : public m6800_cpu_device, public device_nvram_interface
{
public:
- m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6801_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// port 1-4 I/O, DDR is passed through mem_mask
auto in_p1_cb() { return m_in_port_func[0].bind(); }
@@ -55,22 +52,28 @@ public:
auto in_p4_cb() { return m_in_port_func[3].bind(); }
auto out_p4_cb() { return m_out_port_func[3].bind(); }
+ // a connected device can pull the voltage enough to force pin(s) to input, overriding DDR
+ void in_p1_override_mask(u8 mask) { m_port_ddr_override[0] = mask; }
+ void in_p2_override_mask(u8 mask) { m_port_ddr_override[1] = mask; }
+ void in_p3_override_mask(u8 mask) { m_port_ddr_override[2] = mask; }
+ void in_p4_override_mask(u8 mask) { m_port_ddr_override[3] = mask; }
+
auto out_sc2_cb() { return m_out_sc2_func.bind(); }
auto out_ser_tx_cb() { return m_out_sertx_func.bind(); }
void nvram_set_battery(int state) { m_nvram_battery = bool(state); } // default is 1 (nvram_enable_backup needs to be true)
- void nvram_set_default_value(uint8_t val) { m_nvram_defval = val; } // default is 0
+ void nvram_set_default_value(u8 val) { m_nvram_defval = val; } // default is 0
auto standby_cb() { return m_standby_func.bind(); } // notifier (not an output pin)
int standby() { return suspended(SUSPEND_REASON_CLOCK) ? 1 : 0; }
- void m6801_clock_serial();
+ void clock_serial();
protected:
- m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes);
+ m6801_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_nvram_interface implementation
virtual void nvram_default() override;
@@ -78,58 +81,57 @@ protected:
virtual bool nvram_write(util::write_stream &file) override;
// device_execute_interface implementation
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return m6800_cpu_device::execute_input_edge_triggered(inputnum) || inputnum == M6801_STBY_LINE; }
virtual void execute_set_input(int inputnum, int state) override;
// device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void p1_ddr_w(uint8_t data);
- uint8_t p1_data_r();
- void p1_data_w(uint8_t data);
- void p2_ddr_w(uint8_t data);
- uint8_t p2_data_r();
- void p2_data_w(uint8_t data);
- void p3_ddr_w(uint8_t data);
- virtual uint8_t p3_data_r();
- virtual void p3_data_w(uint8_t data);
- uint8_t p3_csr_r();
- void p3_csr_w(uint8_t data);
- void p4_ddr_w(uint8_t data);
- uint8_t p4_data_r();
- void p4_data_w(uint8_t data);
-
- uint8_t tcsr_r();
- void tcsr_w(uint8_t data);
- uint8_t ch_r();
- uint8_t cl_r();
- void ch_w(uint8_t data);
- void cl_w(uint8_t data);
- uint8_t ocrh_r();
- uint8_t ocrl_r();
- void ocrh_w(uint8_t data);
- void ocrl_w(uint8_t data);
- uint8_t icrh_r();
- uint8_t icrl_r();
-
- uint8_t sci_rmcr_r();
- void sci_rmcr_w(uint8_t data);
- uint8_t sci_trcsr_r();
- void sci_trcsr_w(uint8_t data);
- uint8_t sci_rdr_r();
- void sci_tdr_w(uint8_t data);
-
- virtual uint8_t rcr_r();
- virtual void rcr_w(uint8_t data);
- uint8_t ff_r();
-
- void m6801_io(address_map &map);
- void m6801_mem(address_map &map);
- void hd6801_mem(address_map &map);
- void m6803_mem(address_map &map);
+ void p1_ddr_w(u8 data);
+ u8 p1_data_r();
+ void p1_data_w(u8 data);
+ void p2_ddr_w(u8 data);
+ u8 p2_data_r();
+ void p2_data_w(u8 data);
+ void p3_ddr_w(u8 data);
+ virtual u8 p3_data_r();
+ virtual void p3_data_w(u8 data);
+ u8 p3_csr_r();
+ void p3_csr_w(u8 data);
+ void p4_ddr_w(u8 data);
+ u8 p4_data_r();
+ void p4_data_w(u8 data);
+
+ u8 tcsr_r();
+ void tcsr_w(u8 data);
+ u8 ch_r();
+ u8 cl_r();
+ void ch_w(u8 data);
+ void cl_w(u8 data);
+ u8 ocrh_r();
+ u8 ocrl_r();
+ void ocrh_w(u8 data);
+ void ocrl_w(u8 data);
+ u8 icrh_r();
+ u8 icrl_r();
+
+ u8 sci_rmcr_r();
+ void sci_rmcr_w(u8 data);
+ u8 sci_trcsr_r();
+ void sci_trcsr_w(u8 data);
+ u8 sci_rdr_r();
+ void sci_tdr_w(u8 data);
+
+ virtual u8 rcr_r();
+ virtual void rcr_w(u8 data);
+ u8 ff_r();
+
+ void m6801_io(address_map &map) ATTR_COLD;
+ void m6801_mem(address_map &map) ATTR_COLD;
+ void hd6801_mem(address_map &map) ATTR_COLD;
+ void m6803_mem(address_map &map) ATTR_COLD;
devcb_read8::array<4> m_in_port_func;
devcb_write8::array<4> m_out_port_func;
@@ -138,58 +140,65 @@ protected:
devcb_write_line m_out_sertx_func;
devcb_write_line m_standby_func;
- required_shared_ptr<uint8_t> m_internal_ram;
+ required_shared_ptr<u8> m_internal_ram;
const int m_nvram_bytes;
- uint8_t m_nvram_defval;
+ u8 m_nvram_defval;
bool m_nvram_battery;
int m_sclk_divider;
// internal registers
- uint8_t m_port_ddr[4];
- uint8_t m_port_data[4];
- uint8_t m_p3csr; // Port 3 Control/Status Register
- uint8_t m_tcsr; // Timer Control and Status Register
- uint8_t m_pending_tcsr; // pending IRQ flag for clear IRQflag process
- uint8_t m_irq2; // IRQ2 flags
- uint8_t m_ram_ctrl;
- PAIR m_counter; // free running counter
- PAIR m_output_compare[3]; // output compare (MC6801U4 and HD6301X have more than one)
- uint16_t m_input_capture; // input capture
- bool m_pending_isf_clear;
- int m_port3_latched;
- bool m_port2_written;
-
- uint8_t m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tshr;
- int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_ext_serclock;
- bool m_use_ext_serclock;
-
- uint8_t m_latch09;
- int m_is3_state;
-
- PAIR m_timer_over;
+ u8 m_port_ddr[4];
+ u8 m_port_data[4];
+ u8 m_port_ddr_override[4];
+ u8 m_p3csr; // Port 3 Control/Status Register
+ u8 m_tcsr; // Timer Control and Status Register
+ u8 m_pending_tcsr; // pending IRQ flag for clear IRQflag process
+ u8 m_ram_ctrl;
+ PAIR m_counter; // free running counter
+ PAIR m_output_compare[3]; // output compare (MC6801U4 and HD6301X have more than one)
+ u16 m_input_capture; // input capture
+ bool m_pending_isf_clear;
+ int m_port3_latched;
+ bool m_port2_written;
+
+ u8 m_trcsr, m_rmcr, m_rdr, m_tdr, m_rsr, m_tshr;
+ int m_rxbits, m_txbits, m_txstate, m_trcsr_read_tdre, m_trcsr_read_orfe, m_trcsr_read_rdrf, m_tx, m_sci_clocks;
+ bool m_use_ext_serclock;
+
+ u8 m_latch09;
+ int m_is3_state;
+
+ PAIR m_timer_over;
emu_timer *m_sci_timer;
- uint32_t m_timer_next; // point of next timer event
+ u32 m_timer_next; // point of next timer event
- static const uint8_t cycles_6803[256];
- static const uint8_t cycles_63701[256];
+ static const u8 cycles_6803[256];
+ static const u8 cycles_63701[256];
static const op_func m6803_insn[256];
static const op_func hd63701_insn[256];
- virtual void m6800_check_irq2() override;
+ bool check_irq2_ici();
+ bool check_irq2_oci();
+ bool check_irq2_toi();
+ bool check_irq2_sci();
+ virtual void check_irq2() override;
+ void take_irq2(const char *message, u16 irq_vector);
+
virtual void increment_counter(int amount) override;
virtual void eat_cycles() override;
virtual void cleanup_counters() override;
- virtual void modified_tcsr();
virtual void set_timer_event();
virtual void modified_counters();
virtual void check_timer_event();
- virtual void set_rmcr(uint8_t data);
+ virtual void set_rmcr(u8 data);
virtual void write_port2();
- int m6800_rx();
+ int m6801_rx();
void serial_transmit();
void serial_receive();
TIMER_CALLBACK_MEMBER(sci_tick);
+ void sci_clock_internal(u8 divider);
+ void reset_sci_timer();
void set_os3(int state);
};
@@ -197,50 +206,49 @@ protected:
class m6801u4_cpu_device : public m6801_cpu_device
{
public:
- m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6801u4_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
- void m6801u4_io(address_map &map);
- void m6801u4_mem(address_map &map);
+ void m6801u4_io(address_map &map) ATTR_COLD;
+ void m6801u4_mem(address_map &map) ATTR_COLD;
- virtual void m6800_check_irq2() override;
- virtual void modified_tcsr() override;
+ virtual void check_irq2() override;
virtual void set_timer_event() override;
virtual void modified_counters() override;
virtual void check_timer_event() override;
virtual void cleanup_counters() override;
- uint8_t tcr2_r();
- void tcr2_w(uint8_t data);
- uint8_t tsr_r();
+ u8 tcr2_r();
+ void tcr2_w(u8 data);
+ u8 tsr_r();
- template<int N> uint8_t ocr2h_r();
- template<int N> void ocr2h_w(uint8_t data);
- template<int N> uint8_t ocr2l_r();
- template<int N> void ocr2l_w(uint8_t data);
+ template<int N> u8 ocr2h_r();
+ template<int N> void ocr2h_w(u8 data);
+ template<int N> u8 ocr2l_r();
+ template<int N> void ocr2l_w(u8 data);
- uint8_t m_tcr[2];
- uint8_t m_tsr;
- uint8_t m_pending_tsr;
+ u8 m_tcr[2];
+ u8 m_tsr;
+ u8 m_pending_tsr;
};
class hd6801v0_cpu_device : public m6801_cpu_device
{
public:
- hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6801v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class m6803_cpu_device : public m6801_cpu_device
{
public:
- m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6803_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -250,11 +258,11 @@ protected:
class m6803e_cpu_device : public m6801_cpu_device
{
public:
- m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m6803e_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return clocks; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles; }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return clocks; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles; }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -263,28 +271,28 @@ protected:
class mc68120_device : public m6801_cpu_device
{
public:
- mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mc68120_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
// dual-ported RAM access
- uint8_t dpram_r(offs_t offset);
- void dpram_w(offs_t offset, uint8_t data);
+ u8 dpram_r(offs_t offset);
+ void dpram_w(offs_t offset, u8 data);
protected:
- mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal);
+ mc68120_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal);
};
class mc68121_device : public mc68120_device
{
public:
- mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mc68121_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class hd6301_cpu_device : public m6801_cpu_device
{
protected:
- hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const m6800_cpu_device::op_func *insn, const uint8_t *cycles, address_map_constructor internal, int nvram_bytes);
+ hd6301_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, const m6800_cpu_device::op_func *insn, const u8 *cycles, address_map_constructor internal, int nvram_bytes);
// device_nvram_interface implementation
virtual bool nvram_read(util::read_stream &file) override;
@@ -305,7 +313,7 @@ protected:
class hd6301v1_cpu_device : public hd6301_cpu_device
{
public:
- hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6301v1_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -314,7 +322,7 @@ public:
class hd63701v0_cpu_device : public hd6301_cpu_device
{
public:
- hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd63701v0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -325,7 +333,7 @@ public:
class hd6303r_cpu_device : public hd6301_cpu_device
{
public:
- hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6303r_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -339,71 +347,77 @@ public:
auto out_p6_cb() { return m_out_portx_func[1].bind(); }
auto out_p7_cb() { return m_out_portx_func[2].bind(); }
+ void in_p5_override_mask(u8 mask) { m_portx_ddr_override[0] = mask; }
+ void in_p6_override_mask(u8 mask) { m_portx_ddr_override[1] = mask; }
+
protected:
- hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes);
+ hd6301x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes);
// device_nvram_interface implementation
virtual bool nvram_read(util::read_stream &file) override;
virtual bool nvram_write(util::write_stream &file) override;
- void hd6301x_io(address_map &map);
- void hd6303x_io(address_map &map);
- void hd6301x_mem(address_map &map);
- void hd6303x_mem(address_map &map);
+ void hd6301x_io(address_map &map) ATTR_COLD;
+ void hd6303x_io(address_map &map) ATTR_COLD;
+ void hd6301x_mem(address_map &map) ATTR_COLD;
+ void hd6303x_mem(address_map &map) ATTR_COLD;
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void write_port2() override;
- void p2_ddr_2bit_w(uint8_t data);
- void p3_ddr_1bit_w(uint8_t data);
- virtual uint8_t p3_data_r() override;
- virtual void p3_data_w(uint8_t data) override;
- virtual uint8_t p5_data_r();
- void p6_ddr_w(uint8_t data);
- virtual uint8_t p6_data_r();
- virtual void p6_data_w(uint8_t data);
- uint8_t p7_data_r();
- void p7_data_w(uint8_t data);
- virtual uint8_t rcr_r() override;
-
- uint8_t tcsr2_r();
- void tcsr2_w(uint8_t data);
- uint8_t ocr2h_r();
- void ocr2h_w(uint8_t data);
- uint8_t ocr2l_r();
- void ocr2l_w(uint8_t data);
+ void p2_ddr_2bit_w(u8 data);
+ void p3_ddr_1bit_w(u8 data);
+ virtual u8 p3_data_r() override;
+ virtual void p3_data_w(u8 data) override;
+ virtual u8 p5_data_r();
+ void p6_ddr_w(u8 data);
+ virtual u8 p6_data_r();
+ virtual void p6_data_w(u8 data);
+ u8 p7_data_r();
+ void p7_data_w(u8 data);
+ virtual u8 rcr_r() override;
+ virtual void rcr_w(u8 data) override;
+
+ u8 tcsr2_r();
+ void tcsr2_w(u8 data);
+ u8 ocr2h_r();
+ void ocr2h_w(u8 data);
+ u8 ocr2l_r();
+ void ocr2l_w(u8 data);
void increment_t2cnt(int amount);
- uint8_t t2cnt_r();
- void t2cnt_w(uint8_t data);
- void tconr_w(uint8_t data);
- uint8_t tcsr3_r();
- void tcsr3_w(uint8_t data);
-
- virtual void m6800_check_irq2() override;
- virtual void modified_tcsr() override;
+ u8 t2cnt_r();
+ void t2cnt_w(u8 data);
+ void tconr_w(u8 data);
+ u8 tcsr3_r();
+ void tcsr3_w(u8 data);
+
+ virtual bool check_irq1_enabled() override;
+ virtual void check_irq2() override;
virtual void set_timer_event() override;
virtual void modified_counters() override;
+ virtual void eat_cycles() override;
virtual void increment_counter(int amount) override;
virtual void check_timer_event() override;
virtual void cleanup_counters() override;
- virtual void set_rmcr(uint8_t data) override;
+ virtual void set_rmcr(u8 data) override;
devcb_read8::array<2> m_in_portx_func;
devcb_write8::array<3> m_out_portx_func;
- uint8_t m_portx_ddr[2];
- uint8_t m_portx_data[3];
+ u8 m_portx_ddr[2];
+ u8 m_portx_data[3];
+ u8 m_portx_ddr_override[2];
- uint8_t m_tcsr2;
- uint8_t m_pending_tcsr2;
+ u8 m_tcsr2;
+ u8 m_pending_tcsr2;
- uint8_t m_t2cnt;
- uint8_t m_tconr;
- uint8_t m_tcsr3;
+ u8 m_t2cnt;
+ u8 m_tconr;
+ u8 m_tcsr3;
bool m_tout3;
bool m_t2cnt_written;
};
@@ -416,12 +430,12 @@ protected:
class hd6301x0_cpu_device : public hd6301x_cpu_device
{
public:
- hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6301x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes);
+ hd6301x0_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes);
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
@@ -430,7 +444,7 @@ protected:
class hd63701x0_cpu_device : public hd6301x0_cpu_device
{
public:
- hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd63701x0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -441,42 +455,42 @@ public:
class hd6303x_cpu_device : public hd6301x_cpu_device
{
public:
- hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6303x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class hd6301y_cpu_device : public hd6301x_cpu_device
{
protected:
- hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, int nvram_bytes);
+ hd6301y_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor internal, int nvram_bytes);
- void hd6301y_io(address_map &map);
- void hd6303y_io(address_map &map);
- void hd6301y_mem(address_map &map);
- void hd6303y_mem(address_map &map);
+ void hd6301y_io(address_map &map) ATTR_COLD;
+ void hd6303y_io(address_map &map) ATTR_COLD;
+ void hd6301y_mem(address_map &map) ATTR_COLD;
+ void hd6303y_mem(address_map &map) ATTR_COLD;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_set_input(int inputnum, int state) override;
- void p1_ddr_1bit_w(uint8_t data);
- void p5_ddr_w(uint8_t data);
- virtual uint8_t p5_data_r() override;
- void p5_data_w(uint8_t data);
- virtual uint8_t p6_data_r() override;
- virtual void p6_data_w(uint8_t data) override;
- uint8_t p6_csr_r();
- void p6_csr_w(uint8_t data);
- virtual uint8_t rcr_r() override;
- virtual void rcr_w(uint8_t data) override;
-
- virtual void m6800_check_irq2() override;
+ void p1_ddr_1bit_w(u8 data);
+ void p5_ddr_w(u8 data);
+ virtual u8 p5_data_r() override;
+ void p5_data_w(u8 data);
+ virtual u8 p6_data_r() override;
+ virtual void p6_data_w(u8 data) override;
+ u8 p6_csr_r();
+ void p6_csr_w(u8 data);
+ virtual u8 rcr_r() override;
+ virtual void rcr_w(u8 data) override;
+
+ virtual void check_irq2() override;
void clear_pending_isf();
- uint8_t m_p6csr;
+ u8 m_p6csr;
};
@@ -488,7 +502,7 @@ protected:
class hd6301y0_cpu_device : public hd6301y_cpu_device
{
public:
- hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6301y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -497,7 +511,7 @@ public:
class hd63701y0_cpu_device : public hd6301y_cpu_device
{
public:
- hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd63701y0_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -509,7 +523,7 @@ public:
class hd6303y_cpu_device : public hd6301y_cpu_device
{
public:
- hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ hd6303y_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
diff --git a/src/devices/cpu/m68000/fscpu32.h b/src/devices/cpu/m68000/fscpu32.h
index b4e26a122eb..52045e7964f 100644
--- a/src/devices/cpu/m68000/fscpu32.h
+++ b/src/devices/cpu/m68000/fscpu32.h
@@ -16,7 +16,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
protected:
fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
diff --git a/src/devices/cpu/m68000/m68000-sdf.cpp b/src/devices/cpu/m68000/m68000-sdf.cpp
index d1f146ee345..b6138e6536d 100644
--- a/src/devices/cpu/m68000/m68000-sdf.cpp
+++ b/src/devices/cpu/m68000/m68000-sdf.cpp
@@ -185,7 +185,7 @@ void m68000_device::state_bus_error_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195,7 +195,7 @@ void m68000_device::state_bus_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -218,7 +218,7 @@ void m68000_device::state_bus_error_df()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -240,7 +240,7 @@ void m68000_device::state_bus_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -266,7 +266,7 @@ void m68000_device::state_bus_error_df()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -288,7 +288,7 @@ void m68000_device::state_bus_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -313,7 +313,7 @@ void m68000_device::state_bus_error_df()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -336,7 +336,7 @@ void m68000_device::state_bus_error_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -464,7 +464,7 @@ void m68000_device::state_address_error_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -474,7 +474,7 @@ void m68000_device::state_address_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -497,7 +497,7 @@ void m68000_device::state_address_error_df()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -519,7 +519,7 @@ void m68000_device::state_address_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -545,7 +545,7 @@ void m68000_device::state_address_error_df()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -567,7 +567,7 @@ void m68000_device::state_address_error_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -592,7 +592,7 @@ void m68000_device::state_address_error_df()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -615,7 +615,7 @@ void m68000_device::state_address_error_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -750,7 +750,7 @@ void m68000_device::state_interrupt_df()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -762,7 +762,7 @@ void m68000_device::state_interrupt_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -818,7 +818,7 @@ void m68000_device::state_interrupt_df()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -841,7 +841,7 @@ void m68000_device::state_interrupt_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -967,7 +967,7 @@ void m68000_device::state_trace_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -977,7 +977,7 @@ void m68000_device::state_trace_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1002,7 +1002,7 @@ void m68000_device::state_trace_df()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1025,7 +1025,7 @@ void m68000_device::state_trace_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1151,7 +1151,7 @@ void m68000_device::state_illegal_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1161,7 +1161,7 @@ void m68000_device::state_illegal_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1186,7 +1186,7 @@ void m68000_device::state_illegal_df()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1209,7 +1209,7 @@ void m68000_device::state_illegal_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1335,7 +1335,7 @@ void m68000_device::state_priviledge_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1345,7 +1345,7 @@ void m68000_device::state_priviledge_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1370,7 +1370,7 @@ void m68000_device::state_priviledge_df()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1393,7 +1393,7 @@ void m68000_device::state_priviledge_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1519,7 +1519,7 @@ void m68000_device::state_linea_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1529,7 +1529,7 @@ void m68000_device::state_linea_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1554,7 +1554,7 @@ void m68000_device::state_linea_df()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1577,7 +1577,7 @@ void m68000_device::state_linea_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1703,7 +1703,7 @@ void m68000_device::state_linef_df()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1713,7 +1713,7 @@ void m68000_device::state_linef_df()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1738,7 +1738,7 @@ void m68000_device::state_linef_df()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1761,7 +1761,7 @@ void m68000_device::state_linef_df()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1884,7 +1884,7 @@ void m68000_device::ori_b_imm8_ds_df() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1907,7 +1907,7 @@ void m68000_device::ori_b_imm8_ds_df() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -1915,7 +1915,7 @@ void m68000_device::ori_b_imm8_ds_df() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1949,7 +1949,7 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1971,11 +1971,11 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -1995,7 +1995,7 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2022,7 +2022,7 @@ void m68000_device::ori_b_imm8_ais_df() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2049,7 +2049,7 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2074,12 +2074,12 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2100,7 +2100,7 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2127,7 +2127,7 @@ void m68000_device::ori_b_imm8_aips_df() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2154,7 +2154,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2178,7 +2178,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2186,7 +2186,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2207,7 +2207,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2234,7 +2234,7 @@ void m68000_device::ori_b_imm8_pais_df() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2261,7 +2261,7 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2283,7 +2283,7 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2306,11 +2306,11 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2330,7 +2330,7 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2357,7 +2357,7 @@ void m68000_device::ori_b_imm8_das_df() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2384,7 +2384,7 @@ void m68000_device::ori_b_imm8_dais_df() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2404,14 +2404,14 @@ void m68000_device::ori_b_imm8_dais_df() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2419,7 +2419,7 @@ void m68000_device::ori_b_imm8_dais_df() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2443,7 +2443,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2469,11 +2469,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2493,7 +2493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2520,7 +2520,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2546,7 +2546,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2571,7 +2571,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2594,7 +2594,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2615,7 +2615,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2642,7 +2642,7 @@ void m68000_device::ori_b_imm8_adr16_df() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2668,7 +2668,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2691,7 +2691,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2715,7 +2715,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2738,7 +2738,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2759,7 +2759,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2786,7 +2786,7 @@ void m68000_device::ori_b_imm8_adr32_df() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2812,7 +2812,7 @@ void m68000_device::ori_imm8_ccr_df() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2834,21 +2834,21 @@ void m68000_device::ori_imm8_ccr_df() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -2856,7 +2856,7 @@ void m68000_device::ori_imm8_ccr_df() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2880,11 +2880,11 @@ void m68000_device::ori_imm8_ccr_df() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2918,7 +2918,7 @@ void m68000_device::ori_w_imm16_ds_df() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2941,7 +2941,7 @@ void m68000_device::ori_w_imm16_ds_df() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2949,7 +2949,7 @@ void m68000_device::ori_w_imm16_ds_df() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2983,7 +2983,7 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3005,11 +3005,11 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3032,7 +3032,7 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3059,7 +3059,7 @@ void m68000_device::ori_w_imm16_ais_df() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3091,7 +3091,7 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3116,12 +3116,12 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3145,7 +3145,7 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3172,7 +3172,7 @@ void m68000_device::ori_w_imm16_aips_df() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3204,7 +3204,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3228,7 +3228,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3236,7 +3236,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3260,7 +3260,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3287,7 +3287,7 @@ void m68000_device::ori_w_imm16_pais_df() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3319,7 +3319,7 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3341,7 +3341,7 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3364,11 +3364,11 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3391,7 +3391,7 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3418,7 +3418,7 @@ void m68000_device::ori_w_imm16_das_df() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3450,7 +3450,7 @@ void m68000_device::ori_w_imm16_dais_df() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3470,14 +3470,14 @@ void m68000_device::ori_w_imm16_dais_df() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3485,7 +3485,7 @@ void m68000_device::ori_w_imm16_dais_df() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3509,7 +3509,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3535,11 +3535,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3562,7 +3562,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3589,7 +3589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3620,7 +3620,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3645,7 +3645,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3668,7 +3668,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3692,7 +3692,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3719,7 +3719,7 @@ void m68000_device::ori_w_imm16_adr16_df() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3750,7 +3750,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3773,7 +3773,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3797,7 +3797,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3820,7 +3820,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3844,7 +3844,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3871,7 +3871,7 @@ void m68000_device::ori_w_imm16_adr32_df() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3906,7 +3906,7 @@ void m68000_device::ori_i16u_sr_df() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3928,23 +3928,23 @@ void m68000_device::ori_i16u_sr_df() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3952,7 +3952,7 @@ void m68000_device::ori_i16u_sr_df() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3976,11 +3976,11 @@ void m68000_device::ori_i16u_sr_df() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4013,7 +4013,7 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4036,7 +4036,7 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4059,12 +4059,12 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4084,7 +4084,7 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4093,7 +4093,7 @@ void m68000_device::ori_l_imm32_ds_df() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4109,7 +4109,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4132,7 +4132,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4154,7 +4154,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4179,7 +4179,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4202,7 +4202,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4227,7 +4227,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4252,7 +4252,7 @@ void m68000_device::ori_l_imm32_ais_df() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4283,7 +4283,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4306,7 +4306,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4328,7 +4328,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4353,11 +4353,11 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4380,7 +4380,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4405,7 +4405,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4430,7 +4430,7 @@ void m68000_device::ori_l_imm32_aips_df() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4461,7 +4461,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4484,7 +4484,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4505,14 +4505,14 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4536,7 +4536,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4559,7 +4559,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4584,7 +4584,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4609,7 +4609,7 @@ void m68000_device::ori_l_imm32_pais_df() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4640,7 +4640,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4663,7 +4663,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4685,7 +4685,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4707,7 +4707,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4732,7 +4732,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4755,7 +4755,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4780,7 +4780,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4805,7 +4805,7 @@ void m68000_device::ori_l_imm32_das_df() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68000_device::ori_l_imm32_dais_df() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4859,7 +4859,7 @@ void m68000_device::ori_l_imm32_dais_df() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4879,14 +4879,14 @@ void m68000_device::ori_l_imm32_dais_df() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -4894,7 +4894,7 @@ void m68000_device::ori_l_imm32_dais_df() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4918,7 +4918,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4943,7 +4943,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4968,7 +4968,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4991,7 +4991,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5016,7 +5016,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5041,7 +5041,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5071,7 +5071,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5094,7 +5094,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5119,7 +5119,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5142,7 +5142,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5167,7 +5167,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5190,7 +5190,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5215,7 +5215,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5240,7 +5240,7 @@ void m68000_device::ori_l_imm32_adr16_df() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5270,7 +5270,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5293,7 +5293,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5316,7 +5316,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5340,7 +5340,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5363,7 +5363,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5388,7 +5388,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5411,7 +5411,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5436,7 +5436,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5461,7 +5461,7 @@ void m68000_device::ori_l_imm32_adr32_df() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5496,13 +5496,13 @@ void m68000_device::btst_dd_ds_df() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5531,7 +5531,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5544,7 +5544,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5562,7 +5562,7 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5584,7 +5584,7 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5603,7 +5603,7 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5625,7 +5625,7 @@ void m68000_device::movep_w_das_dd_df() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5658,11 +5658,11 @@ void m68000_device::btst_dd_ais_df() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5682,13 +5682,13 @@ void m68000_device::btst_dd_ais_df() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5724,12 +5724,12 @@ void m68000_device::btst_dd_aips_df() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5750,13 +5750,13 @@ void m68000_device::btst_dd_aips_df() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5791,7 +5791,7 @@ void m68000_device::btst_dd_pais_df() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -5799,7 +5799,7 @@ void m68000_device::btst_dd_pais_df() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5820,13 +5820,13 @@ void m68000_device::btst_dd_pais_df() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5859,7 +5859,7 @@ void m68000_device::btst_dd_das_df() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5882,11 +5882,11 @@ void m68000_device::btst_dd_das_df() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5906,13 +5906,13 @@ void m68000_device::btst_dd_das_df() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5943,14 +5943,14 @@ void m68000_device::btst_dd_dais_df() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5958,7 +5958,7 @@ void m68000_device::btst_dd_dais_df() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5982,7 +5982,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6008,11 +6008,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6032,13 +6032,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6073,7 +6073,7 @@ void m68000_device::btst_dd_adr16_df() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6096,7 +6096,7 @@ void m68000_device::btst_dd_adr16_df() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6117,13 +6117,13 @@ void m68000_device::btst_dd_adr16_df() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6156,7 +6156,7 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6180,7 +6180,7 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6203,7 +6203,7 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6224,13 +6224,13 @@ void m68000_device::btst_dd_adr32_df() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6262,7 +6262,7 @@ void m68000_device::btst_dd_dpc_df() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6285,11 +6285,11 @@ void m68000_device::btst_dd_dpc_df() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6309,13 +6309,13 @@ void m68000_device::btst_dd_dpc_df() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6345,14 +6345,14 @@ void m68000_device::btst_dd_dpci_df() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6360,7 +6360,7 @@ void m68000_device::btst_dd_dpci_df() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6384,7 +6384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6410,11 +6410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6434,13 +6434,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6475,7 +6475,7 @@ void m68000_device::btst_dd_imm_df() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6500,12 +6500,12 @@ void m68000_device::btst_dd_imm_df() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6534,7 +6534,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6547,7 +6547,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6569,13 +6569,13 @@ void m68000_device::bchg_dd_ds_df() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6604,7 +6604,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6616,14 +6616,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6641,7 +6641,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6663,7 +6663,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6681,7 +6681,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6700,7 +6700,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6719,7 +6719,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6741,7 +6741,7 @@ void m68000_device::movep_l_das_dd_df() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6774,11 +6774,11 @@ void m68000_device::bchg_dd_ais_df() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6799,7 +6799,7 @@ void m68000_device::bchg_dd_ais_df() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6824,7 +6824,7 @@ void m68000_device::bchg_dd_ais_df() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6855,12 +6855,12 @@ void m68000_device::bchg_dd_aips_df() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6882,7 +6882,7 @@ void m68000_device::bchg_dd_aips_df() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6907,7 +6907,7 @@ void m68000_device::bchg_dd_aips_df() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6937,7 +6937,7 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6945,7 +6945,7 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6967,7 +6967,7 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6992,7 +6992,7 @@ void m68000_device::bchg_dd_pais_df() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7020,7 +7020,7 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7043,11 +7043,11 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7068,7 +7068,7 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7093,7 +7093,7 @@ void m68000_device::bchg_dd_das_df() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7119,14 +7119,14 @@ void m68000_device::bchg_dd_dais_df() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7134,7 +7134,7 @@ void m68000_device::bchg_dd_dais_df() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7158,7 +7158,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7184,11 +7184,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7209,7 +7209,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7234,7 +7234,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7264,7 +7264,7 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7287,7 +7287,7 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,7 +7309,7 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7334,7 +7334,7 @@ void m68000_device::bchg_dd_adr16_df() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7362,7 +7362,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7386,7 +7386,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7409,7 +7409,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7431,7 +7431,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7456,7 +7456,7 @@ void m68000_device::bchg_dd_adr32_df() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7488,13 +7488,13 @@ void m68000_device::bclr_dd_ds_df() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7520,14 +7520,14 @@ void m68000_device::bclr_dd_ds_df() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7539,18 +7539,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7568,7 +7568,7 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7592,7 +7592,7 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7608,7 +7608,7 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7625,11 +7625,11 @@ void m68000_device::movep_w_dd_das_df() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7662,11 +7662,11 @@ void m68000_device::bclr_dd_ais_df() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7686,12 +7686,12 @@ void m68000_device::bclr_dd_ais_df() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7716,7 +7716,7 @@ void m68000_device::bclr_dd_ais_df() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7747,12 +7747,12 @@ void m68000_device::bclr_dd_aips_df() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7773,12 +7773,12 @@ void m68000_device::bclr_dd_aips_df() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7803,7 +7803,7 @@ void m68000_device::bclr_dd_aips_df() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7833,7 +7833,7 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7841,7 +7841,7 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7862,12 +7862,12 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7892,7 +7892,7 @@ void m68000_device::bclr_dd_pais_df() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7920,7 +7920,7 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7943,11 +7943,11 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7967,12 +7967,12 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7997,7 +7997,7 @@ void m68000_device::bclr_dd_das_df() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8023,14 +8023,14 @@ void m68000_device::bclr_dd_dais_df() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8038,7 +8038,7 @@ void m68000_device::bclr_dd_dais_df() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8062,7 +8062,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8088,11 +8088,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8112,12 +8112,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8142,7 +8142,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8172,7 +8172,7 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8195,7 +8195,7 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8216,12 +8216,12 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8246,7 +8246,7 @@ void m68000_device::bclr_dd_adr16_df() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8274,7 +8274,7 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8298,7 +8298,7 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8321,7 +8321,7 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8342,12 +8342,12 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8372,7 +8372,7 @@ void m68000_device::bclr_dd_adr32_df() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8404,13 +8404,13 @@ void m68000_device::bset_dd_ds_df() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8439,7 +8439,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8451,14 +8451,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8476,7 +8476,7 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8499,7 +8499,7 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8515,7 +8515,7 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8532,7 +8532,7 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8548,7 +8548,7 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8565,11 +8565,11 @@ void m68000_device::movep_l_dd_das_df() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8602,11 +8602,11 @@ void m68000_device::bset_dd_ais_df() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8627,7 +8627,7 @@ void m68000_device::bset_dd_ais_df() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8652,7 +8652,7 @@ void m68000_device::bset_dd_ais_df() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8683,12 +8683,12 @@ void m68000_device::bset_dd_aips_df() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8710,7 +8710,7 @@ void m68000_device::bset_dd_aips_df() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8735,7 +8735,7 @@ void m68000_device::bset_dd_aips_df() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8765,7 +8765,7 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8773,7 +8773,7 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8795,7 +8795,7 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8820,7 +8820,7 @@ void m68000_device::bset_dd_pais_df() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8848,7 +8848,7 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8871,11 +8871,11 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8896,7 +8896,7 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8921,7 +8921,7 @@ void m68000_device::bset_dd_das_df() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8947,14 +8947,14 @@ void m68000_device::bset_dd_dais_df() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8962,7 +8962,7 @@ void m68000_device::bset_dd_dais_df() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8986,7 +8986,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9012,11 +9012,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9037,7 +9037,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9062,7 +9062,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9092,7 +9092,7 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9115,7 +9115,7 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9137,7 +9137,7 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9162,7 +9162,7 @@ void m68000_device::bset_dd_adr16_df() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9190,7 +9190,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9214,7 +9214,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9237,7 +9237,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9259,7 +9259,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9284,7 +9284,7 @@ void m68000_device::bset_dd_adr32_df() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9313,7 +9313,7 @@ void m68000_device::andi_b_imm8_ds_df() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9336,7 +9336,7 @@ void m68000_device::andi_b_imm8_ds_df() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -9344,7 +9344,7 @@ void m68000_device::andi_b_imm8_ds_df() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9378,7 +9378,7 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9400,11 +9400,11 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9424,7 +9424,7 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9451,7 +9451,7 @@ void m68000_device::andi_b_imm8_ais_df() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9478,7 +9478,7 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9503,12 +9503,12 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9529,7 +9529,7 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9556,7 +9556,7 @@ void m68000_device::andi_b_imm8_aips_df() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9583,7 +9583,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9607,7 +9607,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9615,7 +9615,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9636,7 +9636,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9663,7 +9663,7 @@ void m68000_device::andi_b_imm8_pais_df() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9690,7 +9690,7 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9712,7 +9712,7 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9735,11 +9735,11 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9759,7 +9759,7 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9786,7 +9786,7 @@ void m68000_device::andi_b_imm8_das_df() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9813,7 +9813,7 @@ void m68000_device::andi_b_imm8_dais_df() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9833,14 +9833,14 @@ void m68000_device::andi_b_imm8_dais_df() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9848,7 +9848,7 @@ void m68000_device::andi_b_imm8_dais_df() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9872,7 +9872,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9898,11 +9898,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9922,7 +9922,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9949,7 +9949,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9975,7 +9975,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10000,7 +10000,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10023,7 +10023,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10044,7 +10044,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10071,7 +10071,7 @@ void m68000_device::andi_b_imm8_adr16_df() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10097,7 +10097,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10120,7 +10120,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10144,7 +10144,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10167,7 +10167,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10188,7 +10188,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10215,7 +10215,7 @@ void m68000_device::andi_b_imm8_adr32_df() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10241,7 +10241,7 @@ void m68000_device::andi_imm8_ccr_df() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10263,21 +10263,21 @@ void m68000_device::andi_imm8_ccr_df() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -10285,7 +10285,7 @@ void m68000_device::andi_imm8_ccr_df() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10309,11 +10309,11 @@ void m68000_device::andi_imm8_ccr_df() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10347,7 +10347,7 @@ void m68000_device::andi_w_imm16_ds_df() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10370,7 +10370,7 @@ void m68000_device::andi_w_imm16_ds_df() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10378,7 +10378,7 @@ void m68000_device::andi_w_imm16_ds_df() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10412,7 +10412,7 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10434,11 +10434,11 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10461,7 +10461,7 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10488,7 +10488,7 @@ void m68000_device::andi_w_imm16_ais_df() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10520,7 +10520,7 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10545,12 +10545,12 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -10574,7 +10574,7 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10601,7 +10601,7 @@ void m68000_device::andi_w_imm16_aips_df() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10633,7 +10633,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10657,7 +10657,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10665,7 +10665,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -10689,7 +10689,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10716,7 +10716,7 @@ void m68000_device::andi_w_imm16_pais_df() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10748,7 +10748,7 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10770,7 +10770,7 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10793,11 +10793,11 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10820,7 +10820,7 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10847,7 +10847,7 @@ void m68000_device::andi_w_imm16_das_df() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10879,7 +10879,7 @@ void m68000_device::andi_w_imm16_dais_df() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10899,14 +10899,14 @@ void m68000_device::andi_w_imm16_dais_df() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10914,7 +10914,7 @@ void m68000_device::andi_w_imm16_dais_df() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10938,7 +10938,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10964,11 +10964,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10991,7 +10991,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11018,7 +11018,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11049,7 +11049,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11074,7 +11074,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11097,7 +11097,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11121,7 +11121,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11148,7 +11148,7 @@ void m68000_device::andi_w_imm16_adr16_df() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11179,7 +11179,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11202,7 +11202,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11226,7 +11226,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11249,7 +11249,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11273,7 +11273,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11300,7 +11300,7 @@ void m68000_device::andi_w_imm16_adr32_df() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11335,7 +11335,7 @@ void m68000_device::andi_i16u_sr_df() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11357,23 +11357,23 @@ void m68000_device::andi_i16u_sr_df() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11381,7 +11381,7 @@ void m68000_device::andi_i16u_sr_df() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11405,11 +11405,11 @@ void m68000_device::andi_i16u_sr_df() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11442,7 +11442,7 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11465,7 +11465,7 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11488,12 +11488,12 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11513,7 +11513,7 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -11522,7 +11522,7 @@ void m68000_device::andi_l_imm32_ds_df() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -11538,7 +11538,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11561,7 +11561,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11583,7 +11583,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11608,7 +11608,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11631,7 +11631,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11656,7 +11656,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11681,7 +11681,7 @@ void m68000_device::andi_l_imm32_ais_df() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11712,7 +11712,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11757,7 +11757,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11782,11 +11782,11 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11809,7 +11809,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11834,7 +11834,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11859,7 +11859,7 @@ void m68000_device::andi_l_imm32_aips_df() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11890,7 +11890,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11913,7 +11913,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11934,14 +11934,14 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11965,7 +11965,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11988,7 +11988,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12013,7 +12013,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12038,7 +12038,7 @@ void m68000_device::andi_l_imm32_pais_df() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12069,7 +12069,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12092,7 +12092,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12114,7 +12114,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12136,7 +12136,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12161,7 +12161,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12184,7 +12184,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12209,7 +12209,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12234,7 +12234,7 @@ void m68000_device::andi_l_imm32_das_df() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12265,7 +12265,7 @@ void m68000_device::andi_l_imm32_dais_df() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12288,7 +12288,7 @@ void m68000_device::andi_l_imm32_dais_df() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12308,14 +12308,14 @@ void m68000_device::andi_l_imm32_dais_df() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -12323,7 +12323,7 @@ void m68000_device::andi_l_imm32_dais_df() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12347,7 +12347,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12372,7 +12372,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12397,7 +12397,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12420,7 +12420,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12445,7 +12445,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12470,7 +12470,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12500,7 +12500,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12523,7 +12523,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12548,7 +12548,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12571,7 +12571,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12596,7 +12596,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12619,7 +12619,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12644,7 +12644,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12669,7 +12669,7 @@ void m68000_device::andi_l_imm32_adr16_df() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12699,7 +12699,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12722,7 +12722,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12745,7 +12745,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12769,7 +12769,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12792,7 +12792,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12817,7 +12817,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12840,7 +12840,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12865,7 +12865,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12890,7 +12890,7 @@ void m68000_device::andi_l_imm32_adr32_df() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12944,7 +12944,7 @@ void m68000_device::subi_b_imm8_ds_df() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13006,7 +13006,7 @@ void m68000_device::subi_b_imm8_ais_df() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13029,7 +13029,7 @@ void m68000_device::subi_b_imm8_ais_df() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13109,7 +13109,7 @@ void m68000_device::subi_b_imm8_aips_df() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13130,7 +13130,7 @@ void m68000_device::subi_b_imm8_aips_df() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13212,7 +13212,7 @@ void m68000_device::subi_b_imm8_pais_df() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13233,7 +13233,7 @@ void m68000_device::subi_b_imm8_pais_df() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13329,7 +13329,7 @@ void m68000_device::subi_b_imm8_das_df() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13352,7 +13352,7 @@ void m68000_device::subi_b_imm8_das_df() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13424,7 +13424,7 @@ void m68000_device::subi_b_imm8_dais_df() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -13486,7 +13486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13509,7 +13509,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13606,7 +13606,7 @@ void m68000_device::subi_b_imm8_adr16_df() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13627,7 +13627,7 @@ void m68000_device::subi_b_imm8_adr16_df() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13745,7 +13745,7 @@ void m68000_device::subi_b_imm8_adr32_df() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13766,7 +13766,7 @@ void m68000_device::subi_b_imm8_adr32_df() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13841,7 +13841,7 @@ void m68000_device::subi_w_imm16_ds_df() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13903,7 +13903,7 @@ void m68000_device::subi_w_imm16_ais_df() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13929,7 +13929,7 @@ void m68000_device::subi_w_imm16_ais_df() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14014,7 +14014,7 @@ void m68000_device::subi_w_imm16_aips_df() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14038,7 +14038,7 @@ void m68000_device::subi_w_imm16_aips_df() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14125,7 +14125,7 @@ void m68000_device::subi_w_imm16_pais_df() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14149,7 +14149,7 @@ void m68000_device::subi_w_imm16_pais_df() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14250,7 +14250,7 @@ void m68000_device::subi_w_imm16_das_df() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14276,7 +14276,7 @@ void m68000_device::subi_w_imm16_das_df() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_device::subi_w_imm16_dais_df() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -14415,7 +14415,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14441,7 +14441,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14543,7 +14543,7 @@ void m68000_device::subi_w_imm16_adr16_df() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14567,7 +14567,7 @@ void m68000_device::subi_w_imm16_adr16_df() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14690,7 +14690,7 @@ void m68000_device::subi_w_imm16_adr32_df() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14714,7 +14714,7 @@ void m68000_device::subi_w_imm16_adr32_df() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14815,7 +14815,7 @@ void m68000_device::subi_l_imm32_ds_df() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -14839,7 +14839,7 @@ void m68000_device::subi_l_imm32_ds_df() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -14906,7 +14906,7 @@ void m68000_device::subi_l_imm32_ais_df() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14953,7 +14953,7 @@ void m68000_device::subi_l_imm32_ais_df() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14978,7 +14978,7 @@ void m68000_device::subi_l_imm32_ais_df() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15076,7 +15076,7 @@ void m68000_device::subi_l_imm32_aips_df() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15126,7 +15126,7 @@ void m68000_device::subi_l_imm32_aips_df() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15151,7 +15151,7 @@ void m68000_device::subi_l_imm32_aips_df() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15248,7 +15248,7 @@ void m68000_device::subi_l_imm32_pais_df() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -15300,7 +15300,7 @@ void m68000_device::subi_l_imm32_pais_df() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15325,7 +15325,7 @@ void m68000_device::subi_l_imm32_pais_df() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15444,7 +15444,7 @@ void m68000_device::subi_l_imm32_das_df() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15491,7 +15491,7 @@ void m68000_device::subi_l_imm32_das_df() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15516,7 +15516,7 @@ void m68000_device::subi_l_imm32_das_df() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15612,7 +15612,7 @@ void m68000_device::subi_l_imm32_dais_df() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -15673,7 +15673,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15720,7 +15720,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15745,7 +15745,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15866,7 +15866,7 @@ void m68000_device::subi_l_imm32_adr16_df() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15913,7 +15913,7 @@ void m68000_device::subi_l_imm32_adr16_df() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15938,7 +15938,7 @@ void m68000_device::subi_l_imm32_adr16_df() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16080,7 +16080,7 @@ void m68000_device::subi_l_imm32_adr32_df() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -16127,7 +16127,7 @@ void m68000_device::subi_l_imm32_adr32_df() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16152,7 +16152,7 @@ void m68000_device::subi_l_imm32_adr32_df() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16230,7 +16230,7 @@ void m68000_device::addi_b_imm8_ds_df() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16292,7 +16292,7 @@ void m68000_device::addi_b_imm8_ais_df() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16315,7 +16315,7 @@ void m68000_device::addi_b_imm8_ais_df() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16395,7 +16395,7 @@ void m68000_device::addi_b_imm8_aips_df() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16416,7 +16416,7 @@ void m68000_device::addi_b_imm8_aips_df() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16498,7 +16498,7 @@ void m68000_device::addi_b_imm8_pais_df() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16519,7 +16519,7 @@ void m68000_device::addi_b_imm8_pais_df() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16615,7 +16615,7 @@ void m68000_device::addi_b_imm8_das_df() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16638,7 +16638,7 @@ void m68000_device::addi_b_imm8_das_df() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16710,7 +16710,7 @@ void m68000_device::addi_b_imm8_dais_df() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16772,7 +16772,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16795,7 +16795,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16892,7 +16892,7 @@ void m68000_device::addi_b_imm8_adr16_df() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16913,7 +16913,7 @@ void m68000_device::addi_b_imm8_adr16_df() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17031,7 +17031,7 @@ void m68000_device::addi_b_imm8_adr32_df() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -17052,7 +17052,7 @@ void m68000_device::addi_b_imm8_adr32_df() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17127,7 +17127,7 @@ void m68000_device::addi_w_imm16_ds_df() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17189,7 +17189,7 @@ void m68000_device::addi_w_imm16_ais_df() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17215,7 +17215,7 @@ void m68000_device::addi_w_imm16_ais_df() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17300,7 +17300,7 @@ void m68000_device::addi_w_imm16_aips_df() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17324,7 +17324,7 @@ void m68000_device::addi_w_imm16_aips_df() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17411,7 +17411,7 @@ void m68000_device::addi_w_imm16_pais_df() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17435,7 +17435,7 @@ void m68000_device::addi_w_imm16_pais_df() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17536,7 +17536,7 @@ void m68000_device::addi_w_imm16_das_df() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17562,7 +17562,7 @@ void m68000_device::addi_w_imm16_das_df() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17639,7 +17639,7 @@ void m68000_device::addi_w_imm16_dais_df() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17701,7 +17701,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17727,7 +17727,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17829,7 +17829,7 @@ void m68000_device::addi_w_imm16_adr16_df() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17853,7 +17853,7 @@ void m68000_device::addi_w_imm16_adr16_df() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17976,7 +17976,7 @@ void m68000_device::addi_w_imm16_adr32_df() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18000,7 +18000,7 @@ void m68000_device::addi_w_imm16_adr32_df() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18101,7 +18101,7 @@ void m68000_device::addi_l_imm32_ds_df() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -18125,7 +18125,7 @@ void m68000_device::addi_l_imm32_ds_df() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -18192,7 +18192,7 @@ void m68000_device::addi_l_imm32_ais_df() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18239,7 +18239,7 @@ void m68000_device::addi_l_imm32_ais_df() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18264,7 +18264,7 @@ void m68000_device::addi_l_imm32_ais_df() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18362,7 +18362,7 @@ void m68000_device::addi_l_imm32_aips_df() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18412,7 +18412,7 @@ void m68000_device::addi_l_imm32_aips_df() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18437,7 +18437,7 @@ void m68000_device::addi_l_imm32_aips_df() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18534,7 +18534,7 @@ void m68000_device::addi_l_imm32_pais_df() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -18586,7 +18586,7 @@ void m68000_device::addi_l_imm32_pais_df() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18611,7 +18611,7 @@ void m68000_device::addi_l_imm32_pais_df() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18730,7 +18730,7 @@ void m68000_device::addi_l_imm32_das_df() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18777,7 +18777,7 @@ void m68000_device::addi_l_imm32_das_df() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18802,7 +18802,7 @@ void m68000_device::addi_l_imm32_das_df() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18898,7 +18898,7 @@ void m68000_device::addi_l_imm32_dais_df() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -18959,7 +18959,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19006,7 +19006,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19031,7 +19031,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19152,7 +19152,7 @@ void m68000_device::addi_l_imm32_adr16_df() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19199,7 +19199,7 @@ void m68000_device::addi_l_imm32_adr16_df() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19224,7 +19224,7 @@ void m68000_device::addi_l_imm32_adr16_df() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19366,7 +19366,7 @@ void m68000_device::addi_l_imm32_adr32_df() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19413,7 +19413,7 @@ void m68000_device::addi_l_imm32_adr32_df() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19438,7 +19438,7 @@ void m68000_device::addi_l_imm32_adr32_df() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19494,7 +19494,7 @@ void m68000_device::btst_imm8_ds_df() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19520,13 +19520,13 @@ void m68000_device::btst_imm8_ds_df() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -19555,7 +19555,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19568,7 +19568,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19587,7 +19587,7 @@ void m68000_device::btst_imm8_ais_df() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19609,11 +19609,11 @@ void m68000_device::btst_imm8_ais_df() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19633,13 +19633,13 @@ void m68000_device::btst_imm8_ais_df() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19673,7 +19673,7 @@ void m68000_device::btst_imm8_aips_df() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19698,12 +19698,12 @@ void m68000_device::btst_imm8_aips_df() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19724,13 +19724,13 @@ void m68000_device::btst_imm8_aips_df() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19764,7 +19764,7 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19788,7 +19788,7 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -19796,7 +19796,7 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19817,13 +19817,13 @@ void m68000_device::btst_imm8_pais_df() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19857,7 +19857,7 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19879,7 +19879,7 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19902,11 +19902,11 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19926,13 +19926,13 @@ void m68000_device::btst_imm8_das_df() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19966,7 +19966,7 @@ void m68000_device::btst_imm8_dais_df() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19986,14 +19986,14 @@ void m68000_device::btst_imm8_dais_df() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20001,7 +20001,7 @@ void m68000_device::btst_imm8_dais_df() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20025,7 +20025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20051,11 +20051,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20075,13 +20075,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20114,7 +20114,7 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20139,7 +20139,7 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20162,7 +20162,7 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20183,13 +20183,13 @@ void m68000_device::btst_imm8_adr16_df() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20222,7 +20222,7 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20245,7 +20245,7 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20269,7 +20269,7 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20292,7 +20292,7 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20313,13 +20313,13 @@ void m68000_device::btst_imm8_adr32_df() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20352,7 +20352,7 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20374,7 +20374,7 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20397,11 +20397,11 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20421,13 +20421,13 @@ void m68000_device::btst_imm8_dpc_df() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20460,7 +20460,7 @@ void m68000_device::btst_imm8_dpci_df() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20480,14 +20480,14 @@ void m68000_device::btst_imm8_dpci_df() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20495,7 +20495,7 @@ void m68000_device::btst_imm8_dpci_df() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20519,7 +20519,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20545,11 +20545,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20569,13 +20569,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20609,7 +20609,7 @@ void m68000_device::bchg_imm8_ds_df() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20635,13 +20635,13 @@ void m68000_device::bchg_imm8_ds_df() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20670,7 +20670,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20682,14 +20682,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20708,7 +20708,7 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20730,11 +20730,11 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20755,7 +20755,7 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20780,7 +20780,7 @@ void m68000_device::bchg_imm8_ais_df() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20809,7 +20809,7 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20834,12 +20834,12 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20861,7 +20861,7 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20886,7 +20886,7 @@ void m68000_device::bchg_imm8_aips_df() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20915,7 +20915,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20939,7 +20939,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -20947,7 +20947,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20969,7 +20969,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20994,7 +20994,7 @@ void m68000_device::bchg_imm8_pais_df() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21023,7 +21023,7 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21045,7 +21045,7 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21068,11 +21068,11 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21093,7 +21093,7 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21118,7 +21118,7 @@ void m68000_device::bchg_imm8_das_df() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21147,7 +21147,7 @@ void m68000_device::bchg_imm8_dais_df() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21167,14 +21167,14 @@ void m68000_device::bchg_imm8_dais_df() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -21182,7 +21182,7 @@ void m68000_device::bchg_imm8_dais_df() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21206,7 +21206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21232,11 +21232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21257,7 +21257,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21282,7 +21282,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21310,7 +21310,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21335,7 +21335,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21358,7 +21358,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21380,7 +21380,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21405,7 +21405,7 @@ void m68000_device::bchg_imm8_adr16_df() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21433,7 +21433,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21456,7 +21456,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21480,7 +21480,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21503,7 +21503,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21525,7 +21525,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21550,7 +21550,7 @@ void m68000_device::bchg_imm8_adr32_df() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21579,7 +21579,7 @@ void m68000_device::bclr_imm8_ds_df() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21605,13 +21605,13 @@ void m68000_device::bclr_imm8_ds_df() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21637,14 +21637,14 @@ void m68000_device::bclr_imm8_ds_df() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21656,18 +21656,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21686,7 +21686,7 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21708,11 +21708,11 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21732,12 +21732,12 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21762,7 +21762,7 @@ void m68000_device::bclr_imm8_ais_df() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21791,7 +21791,7 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21816,12 +21816,12 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21842,12 +21842,12 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21872,7 +21872,7 @@ void m68000_device::bclr_imm8_aips_df() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21901,7 +21901,7 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21925,7 +21925,7 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -21933,7 +21933,7 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21954,12 +21954,12 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21984,7 +21984,7 @@ void m68000_device::bclr_imm8_pais_df() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22013,7 +22013,7 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22035,7 +22035,7 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22058,11 +22058,11 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22082,12 +22082,12 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22112,7 +22112,7 @@ void m68000_device::bclr_imm8_das_df() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22141,7 +22141,7 @@ void m68000_device::bclr_imm8_dais_df() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22161,14 +22161,14 @@ void m68000_device::bclr_imm8_dais_df() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22176,7 +22176,7 @@ void m68000_device::bclr_imm8_dais_df() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22200,7 +22200,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22226,11 +22226,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22250,12 +22250,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22280,7 +22280,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22308,7 +22308,7 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22333,7 +22333,7 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22356,7 +22356,7 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22377,12 +22377,12 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22407,7 +22407,7 @@ void m68000_device::bclr_imm8_adr16_df() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22435,7 +22435,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22458,7 +22458,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22482,7 +22482,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22505,7 +22505,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22526,12 +22526,12 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22556,7 +22556,7 @@ void m68000_device::bclr_imm8_adr32_df() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22585,7 +22585,7 @@ void m68000_device::bset_imm8_ds_df() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22611,13 +22611,13 @@ void m68000_device::bset_imm8_ds_df() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22646,7 +22646,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22658,14 +22658,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22684,7 +22684,7 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22706,11 +22706,11 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22731,7 +22731,7 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22756,7 +22756,7 @@ void m68000_device::bset_imm8_ais_df() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22785,7 +22785,7 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22810,12 +22810,12 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22837,7 +22837,7 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22862,7 +22862,7 @@ void m68000_device::bset_imm8_aips_df() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22891,7 +22891,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22915,7 +22915,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22923,7 +22923,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22945,7 +22945,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22970,7 +22970,7 @@ void m68000_device::bset_imm8_pais_df() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22999,7 +22999,7 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23021,7 +23021,7 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23044,11 +23044,11 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23069,7 +23069,7 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23094,7 +23094,7 @@ void m68000_device::bset_imm8_das_df() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23123,7 +23123,7 @@ void m68000_device::bset_imm8_dais_df() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23143,14 +23143,14 @@ void m68000_device::bset_imm8_dais_df() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23158,7 +23158,7 @@ void m68000_device::bset_imm8_dais_df() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23182,7 +23182,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23208,11 +23208,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23233,7 +23233,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23258,7 +23258,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23286,7 +23286,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23311,7 +23311,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23334,7 +23334,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23356,7 +23356,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23381,7 +23381,7 @@ void m68000_device::bset_imm8_adr16_df() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23409,7 +23409,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23432,7 +23432,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23456,7 +23456,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23479,7 +23479,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23501,7 +23501,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23526,7 +23526,7 @@ void m68000_device::bset_imm8_adr32_df() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23555,7 +23555,7 @@ void m68000_device::eori_b_imm8_ds_df() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23578,7 +23578,7 @@ void m68000_device::eori_b_imm8_ds_df() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -23586,7 +23586,7 @@ void m68000_device::eori_b_imm8_ds_df() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23620,7 +23620,7 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23642,11 +23642,11 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23666,7 +23666,7 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23693,7 +23693,7 @@ void m68000_device::eori_b_imm8_ais_df() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23720,7 +23720,7 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23745,12 +23745,12 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23771,7 +23771,7 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23798,7 +23798,7 @@ void m68000_device::eori_b_imm8_aips_df() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23825,7 +23825,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23849,7 +23849,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23857,7 +23857,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23878,7 +23878,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23905,7 +23905,7 @@ void m68000_device::eori_b_imm8_pais_df() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23932,7 +23932,7 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23954,7 +23954,7 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23977,11 +23977,11 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24001,7 +24001,7 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24028,7 +24028,7 @@ void m68000_device::eori_b_imm8_das_df() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24055,7 +24055,7 @@ void m68000_device::eori_b_imm8_dais_df() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24075,14 +24075,14 @@ void m68000_device::eori_b_imm8_dais_df() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24090,7 +24090,7 @@ void m68000_device::eori_b_imm8_dais_df() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24114,7 +24114,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24140,11 +24140,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24164,7 +24164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24191,7 +24191,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24217,7 +24217,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24242,7 +24242,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24265,7 +24265,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24286,7 +24286,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24313,7 +24313,7 @@ void m68000_device::eori_b_imm8_adr16_df() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24339,7 +24339,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24362,7 +24362,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24386,7 +24386,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24409,7 +24409,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24430,7 +24430,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24457,7 +24457,7 @@ void m68000_device::eori_b_imm8_adr32_df() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24483,7 +24483,7 @@ void m68000_device::eori_imm8_ccr_df() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24505,21 +24505,21 @@ void m68000_device::eori_imm8_ccr_df() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -24527,7 +24527,7 @@ void m68000_device::eori_imm8_ccr_df() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24551,11 +24551,11 @@ void m68000_device::eori_imm8_ccr_df() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24589,7 +24589,7 @@ void m68000_device::eori_w_imm16_ds_df() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24612,7 +24612,7 @@ void m68000_device::eori_w_imm16_ds_df() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -24620,7 +24620,7 @@ void m68000_device::eori_w_imm16_ds_df() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24654,7 +24654,7 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24676,11 +24676,11 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24703,7 +24703,7 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24730,7 +24730,7 @@ void m68000_device::eori_w_imm16_ais_df() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24762,7 +24762,7 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24787,12 +24787,12 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -24816,7 +24816,7 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24843,7 +24843,7 @@ void m68000_device::eori_w_imm16_aips_df() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24875,7 +24875,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24899,7 +24899,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24907,7 +24907,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -24931,7 +24931,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24958,7 +24958,7 @@ void m68000_device::eori_w_imm16_pais_df() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24990,7 +24990,7 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25012,7 +25012,7 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25035,11 +25035,11 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25062,7 +25062,7 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25089,7 +25089,7 @@ void m68000_device::eori_w_imm16_das_df() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25121,7 +25121,7 @@ void m68000_device::eori_w_imm16_dais_df() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25141,14 +25141,14 @@ void m68000_device::eori_w_imm16_dais_df() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25156,7 +25156,7 @@ void m68000_device::eori_w_imm16_dais_df() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25180,7 +25180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25206,11 +25206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25233,7 +25233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25260,7 +25260,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25291,7 +25291,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25316,7 +25316,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25339,7 +25339,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25363,7 +25363,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25390,7 +25390,7 @@ void m68000_device::eori_w_imm16_adr16_df() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25421,7 +25421,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25444,7 +25444,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25468,7 +25468,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25491,7 +25491,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25515,7 +25515,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25542,7 +25542,7 @@ void m68000_device::eori_w_imm16_adr32_df() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25577,7 +25577,7 @@ void m68000_device::eori_i16u_sr_df() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25599,23 +25599,23 @@ void m68000_device::eori_i16u_sr_df() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -25623,7 +25623,7 @@ void m68000_device::eori_i16u_sr_df() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25647,11 +25647,11 @@ void m68000_device::eori_i16u_sr_df() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25684,7 +25684,7 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25707,7 +25707,7 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25730,12 +25730,12 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25755,7 +25755,7 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -25764,7 +25764,7 @@ void m68000_device::eori_l_imm32_ds_df() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -25780,7 +25780,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25803,7 +25803,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25825,7 +25825,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25850,7 +25850,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25873,7 +25873,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25898,7 +25898,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -25923,7 +25923,7 @@ void m68000_device::eori_l_imm32_ais_df() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25954,7 +25954,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25977,7 +25977,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25999,7 +25999,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26024,11 +26024,11 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26051,7 +26051,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26076,7 +26076,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26101,7 +26101,7 @@ void m68000_device::eori_l_imm32_aips_df() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26132,7 +26132,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26155,7 +26155,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26176,14 +26176,14 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26207,7 +26207,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26230,7 +26230,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26255,7 +26255,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26280,7 +26280,7 @@ void m68000_device::eori_l_imm32_pais_df() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26311,7 +26311,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26334,7 +26334,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26356,7 +26356,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26378,7 +26378,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26403,7 +26403,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26426,7 +26426,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26451,7 +26451,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26476,7 +26476,7 @@ void m68000_device::eori_l_imm32_das_df() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26507,7 +26507,7 @@ void m68000_device::eori_l_imm32_dais_df() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26530,7 +26530,7 @@ void m68000_device::eori_l_imm32_dais_df() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26550,14 +26550,14 @@ void m68000_device::eori_l_imm32_dais_df() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -26565,7 +26565,7 @@ void m68000_device::eori_l_imm32_dais_df() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26589,7 +26589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26614,7 +26614,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26639,7 +26639,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26662,7 +26662,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26687,7 +26687,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26712,7 +26712,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26742,7 +26742,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26765,7 +26765,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26790,7 +26790,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26813,7 +26813,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26838,7 +26838,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26861,7 +26861,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26886,7 +26886,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26911,7 +26911,7 @@ void m68000_device::eori_l_imm32_adr16_df() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26941,7 +26941,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26964,7 +26964,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26987,7 +26987,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -27011,7 +27011,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27034,7 +27034,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -27059,7 +27059,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -27082,7 +27082,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27107,7 +27107,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -27132,7 +27132,7 @@ void m68000_device::eori_l_imm32_adr32_df() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -27186,7 +27186,7 @@ void m68000_device::cmpi_b_imm8_ds_df() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -27247,7 +27247,7 @@ void m68000_device::cmpi_b_imm8_ais_df() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27270,7 +27270,7 @@ void m68000_device::cmpi_b_imm8_ais_df() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27336,7 +27336,7 @@ void m68000_device::cmpi_b_imm8_aips_df() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27357,7 +27357,7 @@ void m68000_device::cmpi_b_imm8_aips_df() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27425,7 +27425,7 @@ void m68000_device::cmpi_b_imm8_pais_df() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27446,7 +27446,7 @@ void m68000_device::cmpi_b_imm8_pais_df() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27528,7 +27528,7 @@ void m68000_device::cmpi_b_imm8_das_df() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27551,7 +27551,7 @@ void m68000_device::cmpi_b_imm8_das_df() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27609,7 +27609,7 @@ void m68000_device::cmpi_b_imm8_dais_df() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -27671,7 +27671,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27694,7 +27694,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27777,7 +27777,7 @@ void m68000_device::cmpi_b_imm8_adr16_df() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27798,7 +27798,7 @@ void m68000_device::cmpi_b_imm8_adr16_df() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27902,7 +27902,7 @@ void m68000_device::cmpi_b_imm8_adr32_df() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27923,7 +27923,7 @@ void m68000_device::cmpi_b_imm8_adr32_df() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27984,7 +27984,7 @@ void m68000_device::cmpi_w_imm16_ds_df() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -28045,7 +28045,7 @@ void m68000_device::cmpi_w_imm16_ais_df() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28071,7 +28071,7 @@ void m68000_device::cmpi_w_imm16_ais_df() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28137,7 +28137,7 @@ void m68000_device::cmpi_w_imm16_aips_df() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28161,7 +28161,7 @@ void m68000_device::cmpi_w_imm16_aips_df() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28229,7 +28229,7 @@ void m68000_device::cmpi_w_imm16_pais_df() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28253,7 +28253,7 @@ void m68000_device::cmpi_w_imm16_pais_df() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28335,7 +28335,7 @@ void m68000_device::cmpi_w_imm16_das_df() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28361,7 +28361,7 @@ void m68000_device::cmpi_w_imm16_das_df() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28419,7 +28419,7 @@ void m68000_device::cmpi_w_imm16_dais_df() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -28481,7 +28481,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28507,7 +28507,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28590,7 +28590,7 @@ void m68000_device::cmpi_w_imm16_adr16_df() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28614,7 +28614,7 @@ void m68000_device::cmpi_w_imm16_adr16_df() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28718,7 +28718,7 @@ void m68000_device::cmpi_w_imm16_adr32_df() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28742,7 +28742,7 @@ void m68000_device::cmpi_w_imm16_adr32_df() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28825,11 +28825,11 @@ void m68000_device::cmpi_l_imm32_ds_df() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28912,7 +28912,7 @@ void m68000_device::cmpi_l_imm32_ais_df() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28959,13 +28959,13 @@ void m68000_device::cmpi_l_imm32_ais_df() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29043,7 +29043,7 @@ void m68000_device::cmpi_l_imm32_aips_df() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29093,13 +29093,13 @@ void m68000_device::cmpi_l_imm32_aips_df() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29176,7 +29176,7 @@ void m68000_device::cmpi_l_imm32_pais_df() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -29228,13 +29228,13 @@ void m68000_device::cmpi_l_imm32_pais_df() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29333,7 +29333,7 @@ void m68000_device::cmpi_l_imm32_das_df() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29380,13 +29380,13 @@ void m68000_device::cmpi_l_imm32_das_df() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29462,7 +29462,7 @@ void m68000_device::cmpi_l_imm32_dais_df() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -29523,7 +29523,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29570,13 +29570,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29677,7 +29677,7 @@ void m68000_device::cmpi_l_imm32_adr16_df() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29724,13 +29724,13 @@ void m68000_device::cmpi_l_imm32_adr16_df() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29852,7 +29852,7 @@ void m68000_device::cmpi_l_imm32_adr32_df() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29899,13 +29899,13 @@ void m68000_device::cmpi_l_imm32_adr32_df() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29943,7 +29943,7 @@ void m68000_device::move_b_ds_dd_df() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -29983,7 +29983,7 @@ void m68000_device::move_b_ais_dd_df() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30007,7 +30007,7 @@ void m68000_device::move_b_ais_dd_df() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30051,7 +30051,7 @@ void m68000_device::move_b_aips_dd_df() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30073,7 +30073,7 @@ void m68000_device::move_b_aips_dd_df() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30119,7 +30119,7 @@ void m68000_device::move_b_pais_dd_df() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30141,7 +30141,7 @@ void m68000_device::move_b_pais_dd_df() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30201,7 +30201,7 @@ void m68000_device::move_b_das_dd_df() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30225,7 +30225,7 @@ void m68000_device::move_b_das_dd_df() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30261,7 +30261,7 @@ void m68000_device::move_b_dais_dd_df() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30323,7 +30323,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30347,7 +30347,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30408,7 +30408,7 @@ void m68000_device::move_b_adr16_dd_df() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30430,7 +30430,7 @@ void m68000_device::move_b_adr16_dd_df() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30512,7 +30512,7 @@ void m68000_device::move_b_adr32_dd_df() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30534,7 +30534,7 @@ void m68000_device::move_b_adr32_dd_df() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30593,7 +30593,7 @@ void m68000_device::move_b_dpc_dd_df() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30617,7 +30617,7 @@ void m68000_device::move_b_dpc_dd_df() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30652,7 +30652,7 @@ void m68000_device::move_b_dpci_dd_df() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30714,7 +30714,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30738,7 +30738,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30802,7 +30802,7 @@ void m68000_device::move_b_imm8_dd_df() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -30845,7 +30845,7 @@ void m68000_device::move_b_ds_aid_df() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30898,7 +30898,7 @@ void m68000_device::move_b_ais_aid_df() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -30921,7 +30921,7 @@ void m68000_device::move_b_ais_aid_df() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30980,7 +30980,7 @@ void m68000_device::move_b_aips_aid_df() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31001,7 +31001,7 @@ void m68000_device::move_b_aips_aid_df() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31062,7 +31062,7 @@ void m68000_device::move_b_pais_aid_df() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31083,7 +31083,7 @@ void m68000_device::move_b_pais_aid_df() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31158,7 +31158,7 @@ void m68000_device::move_b_das_aid_df() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31181,7 +31181,7 @@ void m68000_device::move_b_das_aid_df() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31232,7 +31232,7 @@ void m68000_device::move_b_dais_aid_df() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31294,7 +31294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31317,7 +31317,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31393,7 +31393,7 @@ void m68000_device::move_b_adr16_aid_df() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31414,7 +31414,7 @@ void m68000_device::move_b_adr16_aid_df() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31511,7 +31511,7 @@ void m68000_device::move_b_adr32_aid_df() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31532,7 +31532,7 @@ void m68000_device::move_b_adr32_aid_df() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68000_device::move_b_dpc_aid_df() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31629,7 +31629,7 @@ void m68000_device::move_b_dpc_aid_df() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31679,7 +31679,7 @@ void m68000_device::move_b_dpci_aid_df() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31741,7 +31741,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31764,7 +31764,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31843,7 +31843,7 @@ void m68000_device::move_b_imm8_aid_df() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31899,7 +31899,7 @@ void m68000_device::move_b_ds_aipd_df() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31951,7 +31951,7 @@ void m68000_device::move_b_ais_aipd_df() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31975,7 +31975,7 @@ void m68000_device::move_b_ais_aipd_df() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32033,7 +32033,7 @@ void m68000_device::move_b_aips_aipd_df() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32055,7 +32055,7 @@ void m68000_device::move_b_aips_aipd_df() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32115,7 +32115,7 @@ void m68000_device::move_b_pais_aipd_df() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32137,7 +32137,7 @@ void m68000_device::move_b_pais_aipd_df() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32211,7 +32211,7 @@ void m68000_device::move_b_das_aipd_df() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32235,7 +32235,7 @@ void m68000_device::move_b_das_aipd_df() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32285,7 +32285,7 @@ void m68000_device::move_b_dais_aipd_df() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32347,7 +32347,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32371,7 +32371,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32446,7 +32446,7 @@ void m68000_device::move_b_adr16_aipd_df() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32468,7 +32468,7 @@ void m68000_device::move_b_adr16_aipd_df() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32564,7 +32564,7 @@ void m68000_device::move_b_adr32_aipd_df() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32586,7 +32586,7 @@ void m68000_device::move_b_adr32_aipd_df() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32659,7 +32659,7 @@ void m68000_device::move_b_dpc_aipd_df() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32683,7 +32683,7 @@ void m68000_device::move_b_dpc_aipd_df() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32732,7 +32732,7 @@ void m68000_device::move_b_dpci_aipd_df() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32794,7 +32794,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32818,7 +32818,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32896,7 +32896,7 @@ void m68000_device::move_b_imm8_aipd_df() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32950,7 +32950,7 @@ void m68000_device::move_b_ds_paid_df() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33003,7 +33003,7 @@ void m68000_device::move_b_ais_paid_df() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33026,7 +33026,7 @@ void m68000_device::move_b_ais_paid_df() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33085,7 +33085,7 @@ void m68000_device::move_b_aips_paid_df() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33106,7 +33106,7 @@ void m68000_device::move_b_aips_paid_df() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33167,7 +33167,7 @@ void m68000_device::move_b_pais_paid_df() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33188,7 +33188,7 @@ void m68000_device::move_b_pais_paid_df() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33263,7 +33263,7 @@ void m68000_device::move_b_das_paid_df() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33286,7 +33286,7 @@ void m68000_device::move_b_das_paid_df() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33337,7 +33337,7 @@ void m68000_device::move_b_dais_paid_df() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33399,7 +33399,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33422,7 +33422,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33498,7 +33498,7 @@ void m68000_device::move_b_adr16_paid_df() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33519,7 +33519,7 @@ void m68000_device::move_b_adr16_paid_df() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33616,7 +33616,7 @@ void m68000_device::move_b_adr32_paid_df() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33637,7 +33637,7 @@ void m68000_device::move_b_adr32_paid_df() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33711,7 +33711,7 @@ void m68000_device::move_b_dpc_paid_df() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33734,7 +33734,7 @@ void m68000_device::move_b_dpc_paid_df() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33784,7 +33784,7 @@ void m68000_device::move_b_dpci_paid_df() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33846,7 +33846,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33869,7 +33869,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33947,7 +33947,7 @@ void m68000_device::move_b_imm8_paid_df() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34023,7 +34023,7 @@ void m68000_device::move_b_ds_dad_df() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -34077,7 +34077,7 @@ void m68000_device::move_b_ais_dad_df() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34099,7 +34099,7 @@ void m68000_device::move_b_ais_dad_df() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34185,7 +34185,7 @@ void m68000_device::move_b_aips_dad_df() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34205,7 +34205,7 @@ void m68000_device::move_b_aips_dad_df() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34293,7 +34293,7 @@ void m68000_device::move_b_pais_dad_df() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34313,7 +34313,7 @@ void m68000_device::move_b_pais_dad_df() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34415,7 +34415,7 @@ void m68000_device::move_b_das_dad_df() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34437,7 +34437,7 @@ void m68000_device::move_b_das_dad_df() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34515,7 +34515,7 @@ void m68000_device::move_b_dais_dad_df() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34577,7 +34577,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34599,7 +34599,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34702,7 +34702,7 @@ void m68000_device::move_b_adr16_dad_df() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34722,7 +34722,7 @@ void m68000_device::move_b_adr16_dad_df() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34846,7 +34846,7 @@ void m68000_device::move_b_adr32_dad_df() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34866,7 +34866,7 @@ void m68000_device::move_b_adr32_dad_df() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34967,7 +34967,7 @@ void m68000_device::move_b_dpc_dad_df() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34989,7 +34989,7 @@ void m68000_device::move_b_dpc_dad_df() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35066,7 +35066,7 @@ void m68000_device::move_b_dpci_dad_df() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35128,7 +35128,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35150,7 +35150,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35276,7 +35276,7 @@ void m68000_device::move_b_imm8_dad_df() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35328,7 +35328,7 @@ void m68000_device::move_b_ds_daid_df() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -35392,7 +35392,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35446,7 +35446,7 @@ void m68000_device::move_b_ais_daid_df() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35465,7 +35465,7 @@ void m68000_device::move_b_ais_daid_df() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35480,7 +35480,7 @@ void m68000_device::move_b_ais_daid_df() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35504,7 +35504,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35592,7 +35592,7 @@ void m68000_device::move_b_aips_daid_df() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35609,7 +35609,7 @@ void m68000_device::move_b_aips_daid_df() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35624,7 +35624,7 @@ void m68000_device::move_b_aips_daid_df() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35648,7 +35648,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35738,7 +35738,7 @@ void m68000_device::move_b_pais_daid_df() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35755,7 +35755,7 @@ void m68000_device::move_b_pais_daid_df() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35770,7 +35770,7 @@ void m68000_device::move_b_pais_daid_df() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35794,7 +35794,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35898,7 +35898,7 @@ void m68000_device::move_b_das_daid_df() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35917,7 +35917,7 @@ void m68000_device::move_b_das_daid_df() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35932,7 +35932,7 @@ void m68000_device::move_b_das_daid_df() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35956,7 +35956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36036,7 +36036,7 @@ void m68000_device::move_b_dais_daid_df() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36098,7 +36098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36117,7 +36117,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36132,7 +36132,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36156,7 +36156,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36261,7 +36261,7 @@ void m68000_device::move_b_adr16_daid_df() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36278,7 +36278,7 @@ void m68000_device::move_b_adr16_daid_df() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36293,7 +36293,7 @@ void m68000_device::move_b_adr16_daid_df() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36317,7 +36317,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36443,7 +36443,7 @@ void m68000_device::move_b_adr32_daid_df() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36460,7 +36460,7 @@ void m68000_device::move_b_adr32_daid_df() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36475,7 +36475,7 @@ void m68000_device::move_b_adr32_daid_df() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36499,7 +36499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36602,7 +36602,7 @@ void m68000_device::move_b_dpc_daid_df() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36621,7 +36621,7 @@ void m68000_device::move_b_dpc_daid_df() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36636,7 +36636,7 @@ void m68000_device::move_b_dpc_daid_df() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36660,7 +36660,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36739,7 +36739,7 @@ void m68000_device::move_b_dpci_daid_df() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36801,7 +36801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36820,7 +36820,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36835,7 +36835,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36859,7 +36859,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36962,7 +36962,7 @@ void m68000_device::move_b_imm8_daid_df() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -37026,7 +37026,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37081,7 +37081,7 @@ void m68000_device::move_b_ds_adr16_df() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37160,7 +37160,7 @@ void m68000_device::move_b_ais_adr16_df() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37182,7 +37182,7 @@ void m68000_device::move_b_ais_adr16_df() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37267,7 +37267,7 @@ void m68000_device::move_b_aips_adr16_df() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37287,7 +37287,7 @@ void m68000_device::move_b_aips_adr16_df() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37374,7 +37374,7 @@ void m68000_device::move_b_pais_adr16_df() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37394,7 +37394,7 @@ void m68000_device::move_b_pais_adr16_df() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37495,7 +37495,7 @@ void m68000_device::move_b_das_adr16_df() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37517,7 +37517,7 @@ void m68000_device::move_b_das_adr16_df() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37594,7 +37594,7 @@ void m68000_device::move_b_dais_adr16_df() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37656,7 +37656,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37678,7 +37678,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37780,7 +37780,7 @@ void m68000_device::move_b_adr16_adr16_df() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37800,7 +37800,7 @@ void m68000_device::move_b_adr16_adr16_df() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37923,7 +37923,7 @@ void m68000_device::move_b_adr32_adr16_df() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37943,7 +37943,7 @@ void m68000_device::move_b_adr32_adr16_df() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38043,7 +38043,7 @@ void m68000_device::move_b_dpc_adr16_df() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38065,7 +38065,7 @@ void m68000_device::move_b_dpc_adr16_df() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38141,7 +38141,7 @@ void m68000_device::move_b_dpc_adr16_df() // 11fa ffff
void m68000_device::move_b_dpci_adr16_df() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38203,7 +38203,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38225,7 +38225,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38329,7 +38329,7 @@ void m68000_device::move_b_imm8_adr16_df() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38431,7 +38431,7 @@ void m68000_device::move_b_ds_adr32_df() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38510,7 +38510,7 @@ void m68000_device::move_b_ais_adr32_df() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38532,7 +38532,7 @@ void m68000_device::move_b_ais_adr32_df() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38637,7 +38637,7 @@ void m68000_device::move_b_aips_adr32_df() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38657,7 +38657,7 @@ void m68000_device::move_b_aips_adr32_df() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38764,7 +38764,7 @@ void m68000_device::move_b_pais_adr32_df() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38784,7 +38784,7 @@ void m68000_device::move_b_pais_adr32_df() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38905,7 +38905,7 @@ void m68000_device::move_b_das_adr32_df() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38927,7 +38927,7 @@ void m68000_device::move_b_das_adr32_df() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39024,7 +39024,7 @@ void m68000_device::move_b_dais_adr32_df() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39086,7 +39086,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39108,7 +39108,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39230,7 +39230,7 @@ void m68000_device::move_b_adr16_adr32_df() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39250,7 +39250,7 @@ void m68000_device::move_b_adr16_adr32_df() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39393,7 +39393,7 @@ void m68000_device::move_b_adr32_adr32_df() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39413,7 +39413,7 @@ void m68000_device::move_b_adr32_adr32_df() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39533,7 +39533,7 @@ void m68000_device::move_b_dpc_adr32_df() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39555,7 +39555,7 @@ void m68000_device::move_b_dpc_adr32_df() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39651,7 +39651,7 @@ void m68000_device::move_b_dpc_adr32_df() // 13fa ffff
void m68000_device::move_b_dpci_adr32_df() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39713,7 +39713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39735,7 +39735,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39880,7 +39880,7 @@ void m68000_device::move_b_imm8_adr32_df() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39963,13 +39963,13 @@ void m68000_device::move_l_ds_dd_df() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -40008,14 +40008,14 @@ void m68000_device::move_l_as_dd_df() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40050,7 +40050,7 @@ void m68000_device::move_l_ais_dd_df() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40098,14 +40098,14 @@ void m68000_device::move_l_ais_dd_df() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40140,7 +40140,7 @@ void m68000_device::move_l_aips_dd_df() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40191,14 +40191,14 @@ void m68000_device::move_l_aips_dd_df() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68000_device::move_l_pais_dd_df() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -40285,14 +40285,14 @@ void m68000_device::move_l_pais_dd_df() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40348,7 +40348,7 @@ void m68000_device::move_l_das_dd_df() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40396,14 +40396,14 @@ void m68000_device::move_l_das_dd_df() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40436,7 +40436,7 @@ void m68000_device::move_l_dais_dd_df() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -40497,7 +40497,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40545,14 +40545,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40610,7 +40610,7 @@ void m68000_device::move_l_adr16_dd_df() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40658,14 +40658,14 @@ void m68000_device::move_l_adr16_dd_df() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40744,7 +40744,7 @@ void m68000_device::move_l_adr32_dd_df() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40792,14 +40792,14 @@ void m68000_device::move_l_adr32_dd_df() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40854,7 +40854,7 @@ void m68000_device::move_l_dpc_dd_df() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -40902,14 +40902,14 @@ void m68000_device::move_l_dpc_dd_df() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40941,7 +40941,7 @@ void m68000_device::move_l_dpci_dd_df() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41002,7 +41002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41050,14 +41050,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41139,14 +41139,14 @@ void m68000_device::move_l_imm32_dd_df() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41184,13 +41184,13 @@ void m68000_device::movea_l_ds_ad_df() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41227,12 +41227,12 @@ void m68000_device::movea_l_as_ad_df() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41267,7 +41267,7 @@ void m68000_device::movea_l_ais_ad_df() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41315,13 +41315,13 @@ void m68000_device::movea_l_ais_ad_df() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41355,7 +41355,7 @@ void m68000_device::movea_l_aips_ad_df() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41406,13 +41406,13 @@ void m68000_device::movea_l_aips_ad_df() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41445,7 +41445,7 @@ void m68000_device::movea_l_pais_ad_df() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -41498,13 +41498,13 @@ void m68000_device::movea_l_pais_ad_df() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41559,7 +41559,7 @@ void m68000_device::movea_l_das_ad_df() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41607,13 +41607,13 @@ void m68000_device::movea_l_das_ad_df() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41645,7 +41645,7 @@ void m68000_device::movea_l_dais_ad_df() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41706,7 +41706,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41754,13 +41754,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41817,7 +41817,7 @@ void m68000_device::movea_l_adr16_ad_df() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41865,13 +41865,13 @@ void m68000_device::movea_l_adr16_ad_df() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41949,7 +41949,7 @@ void m68000_device::movea_l_adr32_ad_df() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41997,13 +41997,13 @@ void m68000_device::movea_l_adr32_ad_df() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42057,7 +42057,7 @@ void m68000_device::movea_l_dpc_ad_df() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42105,13 +42105,13 @@ void m68000_device::movea_l_dpc_ad_df() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42142,7 +42142,7 @@ void m68000_device::movea_l_dpci_ad_df() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -42203,7 +42203,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42251,13 +42251,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42338,13 +42338,13 @@ void m68000_device::movea_l_imm32_ad_df() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42402,7 +42402,7 @@ void m68000_device::move_l_ds_aid_df() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42427,7 +42427,7 @@ void m68000_device::move_l_ds_aid_df() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42486,7 +42486,7 @@ void m68000_device::move_l_as_aid_df() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42511,7 +42511,7 @@ void m68000_device::move_l_as_aid_df() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42546,7 +42546,7 @@ void m68000_device::move_l_ais_aid_df() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -42593,7 +42593,7 @@ void m68000_device::move_l_ais_aid_df() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42617,7 +42617,7 @@ void m68000_device::move_l_ais_aid_df() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42675,7 +42675,7 @@ void m68000_device::move_l_aips_aid_df() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -42725,7 +42725,7 @@ void m68000_device::move_l_aips_aid_df() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42749,7 +42749,7 @@ void m68000_device::move_l_aips_aid_df() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42806,7 +42806,7 @@ void m68000_device::move_l_pais_aid_df() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -42858,7 +42858,7 @@ void m68000_device::move_l_pais_aid_df() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42882,7 +42882,7 @@ void m68000_device::move_l_pais_aid_df() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42961,7 +42961,7 @@ void m68000_device::move_l_das_aid_df() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43008,7 +43008,7 @@ void m68000_device::move_l_das_aid_df() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43032,7 +43032,7 @@ void m68000_device::move_l_das_aid_df() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43088,7 +43088,7 @@ void m68000_device::move_l_dais_aid_df() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43149,7 +43149,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43196,7 +43196,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43220,7 +43220,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43301,7 +43301,7 @@ void m68000_device::move_l_adr16_aid_df() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43348,7 +43348,7 @@ void m68000_device::move_l_adr16_aid_df() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43372,7 +43372,7 @@ void m68000_device::move_l_adr16_aid_df() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43474,7 +43474,7 @@ void m68000_device::move_l_adr32_aid_df() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43521,7 +43521,7 @@ void m68000_device::move_l_adr32_aid_df() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43545,7 +43545,7 @@ void m68000_device::move_l_adr32_aid_df() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43623,7 +43623,7 @@ void m68000_device::move_l_dpc_aid_df() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -43670,7 +43670,7 @@ void m68000_device::move_l_dpc_aid_df() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43694,7 +43694,7 @@ void m68000_device::move_l_dpc_aid_df() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43749,7 +43749,7 @@ void m68000_device::move_l_dpci_aid_df() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43810,7 +43810,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -43857,7 +43857,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43881,7 +43881,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44007,7 +44007,7 @@ void m68000_device::move_l_imm32_aid_df() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44032,7 +44032,7 @@ void m68000_device::move_l_imm32_aid_df() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44091,7 +44091,7 @@ void m68000_device::move_l_ds_aipd_df() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44116,7 +44116,7 @@ void m68000_device::move_l_ds_aipd_df() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44175,7 +44175,7 @@ void m68000_device::move_l_as_aipd_df() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44200,7 +44200,7 @@ void m68000_device::move_l_as_aipd_df() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44235,7 +44235,7 @@ void m68000_device::move_l_ais_aipd_df() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44282,7 +44282,7 @@ void m68000_device::move_l_ais_aipd_df() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44306,7 +44306,7 @@ void m68000_device::move_l_ais_aipd_df() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44363,7 +44363,7 @@ void m68000_device::move_l_aips_aipd_df() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44413,7 +44413,7 @@ void m68000_device::move_l_aips_aipd_df() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44437,7 +44437,7 @@ void m68000_device::move_l_aips_aipd_df() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44493,7 +44493,7 @@ void m68000_device::move_l_pais_aipd_df() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -44545,7 +44545,7 @@ void m68000_device::move_l_pais_aipd_df() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44569,7 +44569,7 @@ void m68000_device::move_l_pais_aipd_df() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44647,7 +44647,7 @@ void m68000_device::move_l_das_aipd_df() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44694,7 +44694,7 @@ void m68000_device::move_l_das_aipd_df() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44718,7 +44718,7 @@ void m68000_device::move_l_das_aipd_df() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44773,7 +44773,7 @@ void m68000_device::move_l_dais_aipd_df() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44834,7 +44834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44881,7 +44881,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44905,7 +44905,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44985,7 +44985,7 @@ void m68000_device::move_l_adr16_aipd_df() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45032,7 +45032,7 @@ void m68000_device::move_l_adr16_aipd_df() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45056,7 +45056,7 @@ void m68000_device::move_l_adr16_aipd_df() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45157,7 +45157,7 @@ void m68000_device::move_l_adr32_aipd_df() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45204,7 +45204,7 @@ void m68000_device::move_l_adr32_aipd_df() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45228,7 +45228,7 @@ void m68000_device::move_l_adr32_aipd_df() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45305,7 +45305,7 @@ void m68000_device::move_l_dpc_aipd_df() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -45352,7 +45352,7 @@ void m68000_device::move_l_dpc_aipd_df() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45376,7 +45376,7 @@ void m68000_device::move_l_dpc_aipd_df() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45430,7 +45430,7 @@ void m68000_device::move_l_dpci_aipd_df() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -45491,7 +45491,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -45538,7 +45538,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45562,7 +45562,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45687,7 +45687,7 @@ void m68000_device::move_l_imm32_aipd_df() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45712,7 +45712,7 @@ void m68000_device::move_l_imm32_aipd_df() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45749,7 +45749,7 @@ void m68000_device::move_l_ds_paid_df() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45774,7 +45774,7 @@ void m68000_device::move_l_ds_paid_df() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45832,7 +45832,7 @@ void m68000_device::move_l_as_paid_df() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45857,7 +45857,7 @@ void m68000_device::move_l_as_paid_df() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45913,7 +45913,7 @@ void m68000_device::move_l_ais_paid_df() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45960,7 +45960,7 @@ void m68000_device::move_l_ais_paid_df() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45985,7 +45985,7 @@ void m68000_device::move_l_ais_paid_df() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46041,7 +46041,7 @@ void m68000_device::move_l_aips_paid_df() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46091,7 +46091,7 @@ void m68000_device::move_l_aips_paid_df() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46116,7 +46116,7 @@ void m68000_device::move_l_aips_paid_df() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46171,7 +46171,7 @@ void m68000_device::move_l_pais_paid_df() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -46223,7 +46223,7 @@ void m68000_device::move_l_pais_paid_df() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46248,7 +46248,7 @@ void m68000_device::move_l_pais_paid_df() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46325,7 +46325,7 @@ void m68000_device::move_l_das_paid_df() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46372,7 +46372,7 @@ void m68000_device::move_l_das_paid_df() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46397,7 +46397,7 @@ void m68000_device::move_l_das_paid_df() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46451,7 +46451,7 @@ void m68000_device::move_l_dais_paid_df() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46512,7 +46512,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46559,7 +46559,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46584,7 +46584,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46663,7 +46663,7 @@ void m68000_device::move_l_adr16_paid_df() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46710,7 +46710,7 @@ void m68000_device::move_l_adr16_paid_df() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46735,7 +46735,7 @@ void m68000_device::move_l_adr16_paid_df() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46835,7 +46835,7 @@ void m68000_device::move_l_adr32_paid_df() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46882,7 +46882,7 @@ void m68000_device::move_l_adr32_paid_df() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46907,7 +46907,7 @@ void m68000_device::move_l_adr32_paid_df() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46983,7 +46983,7 @@ void m68000_device::move_l_dpc_paid_df() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -47030,7 +47030,7 @@ void m68000_device::move_l_dpc_paid_df() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47055,7 +47055,7 @@ void m68000_device::move_l_dpc_paid_df() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47108,7 +47108,7 @@ void m68000_device::move_l_dpci_paid_df() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47169,7 +47169,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -47216,7 +47216,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47241,7 +47241,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47343,7 +47343,7 @@ void m68000_device::move_l_imm32_paid_df() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47368,7 +47368,7 @@ void m68000_device::move_l_imm32_paid_df() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47447,7 +47447,7 @@ void m68000_device::move_l_ds_dad_df() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47471,7 +47471,7 @@ void m68000_device::move_l_ds_dad_df() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47496,7 +47496,7 @@ void m68000_device::move_l_ds_dad_df() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47554,7 +47554,7 @@ void m68000_device::move_l_as_dad_df() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47578,7 +47578,7 @@ void m68000_device::move_l_as_dad_df() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47603,7 +47603,7 @@ void m68000_device::move_l_as_dad_df() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47638,7 +47638,7 @@ void m68000_device::move_l_ais_dad_df() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -47684,7 +47684,7 @@ void m68000_device::move_l_ais_dad_df() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47709,7 +47709,7 @@ void m68000_device::move_l_ais_dad_df() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47793,7 +47793,7 @@ void m68000_device::move_l_aips_dad_df() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -47842,7 +47842,7 @@ void m68000_device::move_l_aips_dad_df() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47867,7 +47867,7 @@ void m68000_device::move_l_aips_dad_df() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47950,7 +47950,7 @@ void m68000_device::move_l_pais_dad_df() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48001,7 +48001,7 @@ void m68000_device::move_l_pais_dad_df() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48026,7 +48026,7 @@ void m68000_device::move_l_pais_dad_df() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48131,7 +48131,7 @@ void m68000_device::move_l_das_dad_df() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48177,7 +48177,7 @@ void m68000_device::move_l_das_dad_df() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48202,7 +48202,7 @@ void m68000_device::move_l_das_dad_df() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48284,7 +48284,7 @@ void m68000_device::move_l_dais_dad_df() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -48345,7 +48345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48391,7 +48391,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48416,7 +48416,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48523,7 +48523,7 @@ void m68000_device::move_l_adr16_dad_df() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48569,7 +48569,7 @@ void m68000_device::move_l_adr16_dad_df() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48594,7 +48594,7 @@ void m68000_device::move_l_adr16_dad_df() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48722,7 +48722,7 @@ void m68000_device::move_l_adr32_dad_df() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48768,7 +48768,7 @@ void m68000_device::move_l_adr32_dad_df() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48793,7 +48793,7 @@ void m68000_device::move_l_adr32_dad_df() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48897,7 +48897,7 @@ void m68000_device::move_l_dpc_dad_df() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -48943,7 +48943,7 @@ void m68000_device::move_l_dpc_dad_df() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48968,7 +48968,7 @@ void m68000_device::move_l_dpc_dad_df() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49049,7 +49049,7 @@ void m68000_device::move_l_dpci_dad_df() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49110,7 +49110,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -49156,7 +49156,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49181,7 +49181,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49332,7 +49332,7 @@ void m68000_device::move_l_imm32_dad_df() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49356,7 +49356,7 @@ void m68000_device::move_l_imm32_dad_df() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49381,7 +49381,7 @@ void m68000_device::move_l_imm32_dad_df() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49414,7 +49414,7 @@ void m68000_device::move_l_ds_daid_df() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49478,7 +49478,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49502,7 +49502,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49527,7 +49527,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49560,7 +49560,7 @@ void m68000_device::move_l_as_daid_df() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49624,7 +49624,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49648,7 +49648,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49673,7 +49673,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49708,7 +49708,7 @@ void m68000_device::move_l_ais_daid_df() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -49751,7 +49751,7 @@ void m68000_device::move_l_ais_daid_df() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49766,7 +49766,7 @@ void m68000_device::move_l_ais_daid_df() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49790,7 +49790,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49817,7 +49817,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49901,7 +49901,7 @@ void m68000_device::move_l_aips_daid_df() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -49947,7 +49947,7 @@ void m68000_device::move_l_aips_daid_df() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49962,7 +49962,7 @@ void m68000_device::move_l_aips_daid_df() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49986,7 +49986,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50013,7 +50013,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50096,7 +50096,7 @@ void m68000_device::move_l_pais_daid_df() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50144,7 +50144,7 @@ void m68000_device::move_l_pais_daid_df() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50159,7 +50159,7 @@ void m68000_device::move_l_pais_daid_df() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50183,7 +50183,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50210,7 +50210,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50315,7 +50315,7 @@ void m68000_device::move_l_das_daid_df() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50358,7 +50358,7 @@ void m68000_device::move_l_das_daid_df() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50373,7 +50373,7 @@ void m68000_device::move_l_das_daid_df() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50397,7 +50397,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50424,7 +50424,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50506,7 +50506,7 @@ void m68000_device::move_l_dais_daid_df() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50567,7 +50567,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50610,7 +50610,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50625,7 +50625,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50649,7 +50649,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50676,7 +50676,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50783,7 +50783,7 @@ void m68000_device::move_l_adr16_daid_df() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50826,7 +50826,7 @@ void m68000_device::move_l_adr16_daid_df() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50841,7 +50841,7 @@ void m68000_device::move_l_adr16_daid_df() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50865,7 +50865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50892,7 +50892,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51020,7 +51020,7 @@ void m68000_device::move_l_adr32_daid_df() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -51063,7 +51063,7 @@ void m68000_device::move_l_adr32_daid_df() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51078,7 +51078,7 @@ void m68000_device::move_l_adr32_daid_df() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51102,7 +51102,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51129,7 +51129,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51233,7 +51233,7 @@ void m68000_device::move_l_dpc_daid_df() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -51276,7 +51276,7 @@ void m68000_device::move_l_dpc_daid_df() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51291,7 +51291,7 @@ void m68000_device::move_l_dpc_daid_df() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51315,7 +51315,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51342,7 +51342,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51423,7 +51423,7 @@ void m68000_device::move_l_dpci_daid_df() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51484,7 +51484,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -51527,7 +51527,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51542,7 +51542,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51566,7 +51566,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51593,7 +51593,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51719,7 +51719,7 @@ void m68000_device::move_l_imm32_daid_df() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -51783,7 +51783,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51807,7 +51807,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51832,7 +51832,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51868,7 +51868,7 @@ void m68000_device::move_l_ds_adr16_df() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51893,7 +51893,7 @@ void m68000_device::move_l_ds_adr16_df() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51978,7 +51978,7 @@ void m68000_device::move_l_as_adr16_df() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52003,7 +52003,7 @@ void m68000_device::move_l_as_adr16_df() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52086,7 +52086,7 @@ void m68000_device::move_l_ais_adr16_df() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52132,7 +52132,7 @@ void m68000_device::move_l_ais_adr16_df() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52157,7 +52157,7 @@ void m68000_device::move_l_ais_adr16_df() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52240,7 +52240,7 @@ void m68000_device::move_l_aips_adr16_df() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52289,7 +52289,7 @@ void m68000_device::move_l_aips_adr16_df() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_device::move_l_aips_adr16_df() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52396,7 +52396,7 @@ void m68000_device::move_l_pais_adr16_df() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52447,7 +52447,7 @@ void m68000_device::move_l_pais_adr16_df() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52472,7 +52472,7 @@ void m68000_device::move_l_pais_adr16_df() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52576,7 +52576,7 @@ void m68000_device::move_l_das_adr16_df() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52622,7 +52622,7 @@ void m68000_device::move_l_das_adr16_df() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52647,7 +52647,7 @@ void m68000_device::move_l_das_adr16_df() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52728,7 +52728,7 @@ void m68000_device::move_l_dais_adr16_df() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52789,7 +52789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52835,7 +52835,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52860,7 +52860,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52966,7 +52966,7 @@ void m68000_device::move_l_adr16_adr16_df() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -53012,7 +53012,7 @@ void m68000_device::move_l_adr16_adr16_df() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53037,7 +53037,7 @@ void m68000_device::move_l_adr16_adr16_df() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53164,7 +53164,7 @@ void m68000_device::move_l_adr32_adr16_df() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -53210,7 +53210,7 @@ void m68000_device::move_l_adr32_adr16_df() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53235,7 +53235,7 @@ void m68000_device::move_l_adr32_adr16_df() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53338,7 +53338,7 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -53384,7 +53384,7 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53409,7 +53409,7 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53489,7 +53489,7 @@ void m68000_device::move_l_dpc_adr16_df() // 21fa ffff
void m68000_device::move_l_dpci_adr16_df() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53550,7 +53550,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -53596,7 +53596,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53621,7 +53621,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53750,7 +53750,7 @@ void m68000_device::move_l_imm32_adr16_df() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53775,7 +53775,7 @@ void m68000_device::move_l_imm32_adr16_df() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53881,7 +53881,7 @@ void m68000_device::move_l_ds_adr32_df() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53906,7 +53906,7 @@ void m68000_device::move_l_ds_adr32_df() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54012,7 +54012,7 @@ void m68000_device::move_l_as_adr32_df() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54037,7 +54037,7 @@ void m68000_device::move_l_as_adr32_df() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54120,7 +54120,7 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54167,7 +54167,7 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54190,7 +54190,7 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54214,7 +54214,7 @@ void m68000_device::move_l_ais_adr32_df() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54296,7 +54296,7 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54346,7 +54346,7 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54369,7 +54369,7 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54393,7 +54393,7 @@ void m68000_device::move_l_aips_adr32_df() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54474,7 +54474,7 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54526,7 +54526,7 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54549,7 +54549,7 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54573,7 +54573,7 @@ void m68000_device::move_l_pais_adr32_df() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54676,7 +54676,7 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54723,7 +54723,7 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54746,7 +54746,7 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54770,7 +54770,7 @@ void m68000_device::move_l_das_adr32_df() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54850,7 +54850,7 @@ void m68000_device::move_l_dais_adr32_df() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54911,7 +54911,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54958,7 +54958,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54981,7 +54981,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55005,7 +55005,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55110,7 +55110,7 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -55157,7 +55157,7 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55180,7 +55180,7 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55204,7 +55204,7 @@ void m68000_device::move_l_adr16_adr32_df() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55330,7 +55330,7 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -55377,7 +55377,7 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55400,7 +55400,7 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55424,7 +55424,7 @@ void m68000_device::move_l_adr32_adr32_df() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55526,7 +55526,7 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55573,7 +55573,7 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55596,7 +55596,7 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55620,7 +55620,7 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55699,7 +55699,7 @@ void m68000_device::move_l_dpc_adr32_df() // 23fa ffff
void m68000_device::move_l_dpci_adr32_df() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55760,7 +55760,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55807,7 +55807,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55830,7 +55830,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55854,7 +55854,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56003,7 +56003,7 @@ void m68000_device::move_l_imm32_adr32_df() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56028,7 +56028,7 @@ void m68000_device::move_l_imm32_adr32_df() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56115,7 +56115,7 @@ void m68000_device::move_w_ds_dd_df() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56158,7 +56158,7 @@ void m68000_device::move_w_as_dd_df() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56198,7 +56198,7 @@ void m68000_device::move_w_ais_dd_df() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56225,7 +56225,7 @@ void m68000_device::move_w_ais_dd_df() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56269,7 +56269,7 @@ void m68000_device::move_w_aips_dd_df() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56294,7 +56294,7 @@ void m68000_device::move_w_aips_dd_df() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56340,7 +56340,7 @@ void m68000_device::move_w_pais_dd_df() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56365,7 +56365,7 @@ void m68000_device::move_w_pais_dd_df() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56425,7 +56425,7 @@ void m68000_device::move_w_das_dd_df() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56452,7 +56452,7 @@ void m68000_device::move_w_das_dd_df() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56488,7 +56488,7 @@ void m68000_device::move_w_dais_dd_df() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56550,7 +56550,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56577,7 +56577,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56638,7 +56638,7 @@ void m68000_device::move_w_adr16_dd_df() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56663,7 +56663,7 @@ void m68000_device::move_w_adr16_dd_df() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56745,7 +56745,7 @@ void m68000_device::move_w_adr32_dd_df() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56770,7 +56770,7 @@ void m68000_device::move_w_adr32_dd_df() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56829,7 +56829,7 @@ void m68000_device::move_w_dpc_dd_df() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56856,7 +56856,7 @@ void m68000_device::move_w_dpc_dd_df() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56891,7 +56891,7 @@ void m68000_device::move_w_dpci_dd_df() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56953,7 +56953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56980,7 +56980,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -57044,7 +57044,7 @@ void m68000_device::move_w_imm16_dd_df() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -57091,7 +57091,7 @@ void m68000_device::movea_w_ds_ad_df() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -57131,7 +57131,7 @@ void m68000_device::movea_w_as_ad_df() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57166,7 +57166,7 @@ void m68000_device::movea_w_ais_ad_df() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57234,7 +57234,7 @@ void m68000_device::movea_w_aips_ad_df() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57302,7 +57302,7 @@ void m68000_device::movea_w_pais_ad_df() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57384,7 +57384,7 @@ void m68000_device::movea_w_das_ad_df() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57444,7 +57444,7 @@ void m68000_device::movea_w_dais_ad_df() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57506,7 +57506,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57591,7 +57591,7 @@ void m68000_device::movea_w_adr16_ad_df() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57695,7 +57695,7 @@ void m68000_device::movea_w_adr32_ad_df() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57776,7 +57776,7 @@ void m68000_device::movea_w_dpc_ad_df() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57835,7 +57835,7 @@ void m68000_device::movea_w_dpci_ad_df() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57897,7 +57897,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57989,7 +57989,7 @@ void m68000_device::movea_w_imm16_ad_df() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -58026,7 +58026,7 @@ void m68000_device::move_w_ds_aid_df() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58087,7 +58087,7 @@ void m68000_device::move_w_as_aid_df() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58145,7 +58145,7 @@ void m68000_device::move_w_ais_aid_df() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58171,7 +58171,7 @@ void m68000_device::move_w_ais_aid_df() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58235,7 +58235,7 @@ void m68000_device::move_w_aips_aid_df() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58259,7 +58259,7 @@ void m68000_device::move_w_aips_aid_df() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58325,7 +58325,7 @@ void m68000_device::move_w_pais_aid_df() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58349,7 +58349,7 @@ void m68000_device::move_w_pais_aid_df() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58429,7 +58429,7 @@ void m68000_device::move_w_das_aid_df() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58455,7 +58455,7 @@ void m68000_device::move_w_das_aid_df() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58511,7 +58511,7 @@ void m68000_device::move_w_dais_aid_df() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58573,7 +58573,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58599,7 +58599,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58680,7 +58680,7 @@ void m68000_device::move_w_adr16_aid_df() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58704,7 +58704,7 @@ void m68000_device::move_w_adr16_aid_df() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58806,7 +58806,7 @@ void m68000_device::move_w_adr32_aid_df() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58830,7 +58830,7 @@ void m68000_device::move_w_adr32_aid_df() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58909,7 +58909,7 @@ void m68000_device::move_w_dpc_aid_df() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58935,7 +58935,7 @@ void m68000_device::move_w_dpc_aid_df() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58990,7 +58990,7 @@ void m68000_device::move_w_dpci_aid_df() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59052,7 +59052,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59078,7 +59078,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59162,7 +59162,7 @@ void m68000_device::move_w_imm16_aid_df() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59223,7 +59223,7 @@ void m68000_device::move_w_ds_aipd_df() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59283,7 +59283,7 @@ void m68000_device::move_w_as_aipd_df() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59340,7 +59340,7 @@ void m68000_device::move_w_ais_aipd_df() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59367,7 +59367,7 @@ void m68000_device::move_w_ais_aipd_df() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59430,7 +59430,7 @@ void m68000_device::move_w_aips_aipd_df() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59455,7 +59455,7 @@ void m68000_device::move_w_aips_aipd_df() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59520,7 +59520,7 @@ void m68000_device::move_w_pais_aipd_df() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59545,7 +59545,7 @@ void m68000_device::move_w_pais_aipd_df() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59624,7 +59624,7 @@ void m68000_device::move_w_das_aipd_df() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59651,7 +59651,7 @@ void m68000_device::move_w_das_aipd_df() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59706,7 +59706,7 @@ void m68000_device::move_w_dais_aipd_df() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59768,7 +59768,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59795,7 +59795,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59875,7 +59875,7 @@ void m68000_device::move_w_adr16_aipd_df() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59900,7 +59900,7 @@ void m68000_device::move_w_adr16_aipd_df() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60001,7 +60001,7 @@ void m68000_device::move_w_adr32_aipd_df() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60026,7 +60026,7 @@ void m68000_device::move_w_adr32_aipd_df() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60104,7 +60104,7 @@ void m68000_device::move_w_dpc_aipd_df() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60131,7 +60131,7 @@ void m68000_device::move_w_dpc_aipd_df() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60185,7 +60185,7 @@ void m68000_device::move_w_dpci_aipd_df() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60247,7 +60247,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60274,7 +60274,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60357,7 +60357,7 @@ void m68000_device::move_w_imm16_aipd_df() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60416,7 +60416,7 @@ void m68000_device::move_w_ds_paid_df() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60476,7 +60476,7 @@ void m68000_device::move_w_as_paid_df() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60534,7 +60534,7 @@ void m68000_device::move_w_ais_paid_df() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60560,7 +60560,7 @@ void m68000_device::move_w_ais_paid_df() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60624,7 +60624,7 @@ void m68000_device::move_w_aips_paid_df() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60648,7 +60648,7 @@ void m68000_device::move_w_aips_paid_df() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60714,7 +60714,7 @@ void m68000_device::move_w_pais_paid_df() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60738,7 +60738,7 @@ void m68000_device::move_w_pais_paid_df() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60818,7 +60818,7 @@ void m68000_device::move_w_das_paid_df() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60844,7 +60844,7 @@ void m68000_device::move_w_das_paid_df() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60900,7 +60900,7 @@ void m68000_device::move_w_dais_paid_df() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60962,7 +60962,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60988,7 +60988,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61069,7 +61069,7 @@ void m68000_device::move_w_adr16_paid_df() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61093,7 +61093,7 @@ void m68000_device::move_w_adr16_paid_df() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61195,7 +61195,7 @@ void m68000_device::move_w_adr32_paid_df() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61219,7 +61219,7 @@ void m68000_device::move_w_adr32_paid_df() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61298,7 +61298,7 @@ void m68000_device::move_w_dpc_paid_df() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61324,7 +61324,7 @@ void m68000_device::move_w_dpc_paid_df() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61379,7 +61379,7 @@ void m68000_device::move_w_dpci_paid_df() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -61441,7 +61441,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61467,7 +61467,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61550,7 +61550,7 @@ void m68000_device::move_w_imm16_paid_df() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61631,7 +61631,7 @@ void m68000_device::move_w_ds_dad_df() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61713,7 +61713,7 @@ void m68000_device::move_w_as_dad_df() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61772,7 +61772,7 @@ void m68000_device::move_w_ais_dad_df() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61797,7 +61797,7 @@ void m68000_device::move_w_ais_dad_df() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61888,7 +61888,7 @@ void m68000_device::move_w_aips_dad_df() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61911,7 +61911,7 @@ void m68000_device::move_w_aips_dad_df() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62004,7 +62004,7 @@ void m68000_device::move_w_pais_dad_df() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62027,7 +62027,7 @@ void m68000_device::move_w_pais_dad_df() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62134,7 +62134,7 @@ void m68000_device::move_w_das_dad_df() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62159,7 +62159,7 @@ void m68000_device::move_w_das_dad_df() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62242,7 +62242,7 @@ void m68000_device::move_w_dais_dad_df() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62304,7 +62304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62329,7 +62329,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62437,7 +62437,7 @@ void m68000_device::move_w_adr16_dad_df() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62460,7 +62460,7 @@ void m68000_device::move_w_adr16_dad_df() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62589,7 +62589,7 @@ void m68000_device::move_w_adr32_dad_df() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62612,7 +62612,7 @@ void m68000_device::move_w_adr32_dad_df() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62718,7 +62718,7 @@ void m68000_device::move_w_dpc_dad_df() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62743,7 +62743,7 @@ void m68000_device::move_w_dpc_dad_df() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62825,7 +62825,7 @@ void m68000_device::move_w_dpci_dad_df() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62887,7 +62887,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62912,7 +62912,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63043,7 +63043,7 @@ void m68000_device::move_w_imm16_dad_df() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63100,7 +63100,7 @@ void m68000_device::move_w_ds_daid_df() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63164,7 +63164,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63221,7 +63221,7 @@ void m68000_device::move_w_as_daid_df() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63285,7 +63285,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63344,7 +63344,7 @@ void m68000_device::move_w_ais_daid_df() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63366,7 +63366,7 @@ void m68000_device::move_w_ais_daid_df() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63381,7 +63381,7 @@ void m68000_device::move_w_ais_daid_df() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63405,7 +63405,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63498,7 +63498,7 @@ void m68000_device::move_w_aips_daid_df() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -63518,7 +63518,7 @@ void m68000_device::move_w_aips_daid_df() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63533,7 +63533,7 @@ void m68000_device::move_w_aips_daid_df() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63557,7 +63557,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63652,7 +63652,7 @@ void m68000_device::move_w_pais_daid_df() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -63672,7 +63672,7 @@ void m68000_device::move_w_pais_daid_df() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63687,7 +63687,7 @@ void m68000_device::move_w_pais_daid_df() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63711,7 +63711,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63820,7 +63820,7 @@ void m68000_device::move_w_das_daid_df() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63842,7 +63842,7 @@ void m68000_device::move_w_das_daid_df() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63857,7 +63857,7 @@ void m68000_device::move_w_das_daid_df() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63881,7 +63881,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63966,7 +63966,7 @@ void m68000_device::move_w_dais_daid_df() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64028,7 +64028,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64050,7 +64050,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64065,7 +64065,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64089,7 +64089,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64199,7 +64199,7 @@ void m68000_device::move_w_adr16_daid_df() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -64219,7 +64219,7 @@ void m68000_device::move_w_adr16_daid_df() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64234,7 +64234,7 @@ void m68000_device::move_w_adr16_daid_df() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64258,7 +64258,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64389,7 +64389,7 @@ void m68000_device::move_w_adr32_daid_df() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -64409,7 +64409,7 @@ void m68000_device::move_w_adr32_daid_df() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64424,7 +64424,7 @@ void m68000_device::move_w_adr32_daid_df() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64448,7 +64448,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64556,7 +64556,7 @@ void m68000_device::move_w_dpc_daid_df() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64578,7 +64578,7 @@ void m68000_device::move_w_dpc_daid_df() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64593,7 +64593,7 @@ void m68000_device::move_w_dpc_daid_df() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64617,7 +64617,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64701,7 +64701,7 @@ void m68000_device::move_w_dpci_daid_df() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64763,7 +64763,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64785,7 +64785,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64800,7 +64800,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64824,7 +64824,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64932,7 +64932,7 @@ void m68000_device::move_w_imm16_daid_df() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -64996,7 +64996,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65056,7 +65056,7 @@ void m68000_device::move_w_ds_adr16_df() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65142,7 +65142,7 @@ void m68000_device::move_w_as_adr16_df() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65226,7 +65226,7 @@ void m68000_device::move_w_ais_adr16_df() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65251,7 +65251,7 @@ void m68000_device::move_w_ais_adr16_df() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65341,7 +65341,7 @@ void m68000_device::move_w_aips_adr16_df() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65364,7 +65364,7 @@ void m68000_device::move_w_aips_adr16_df() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65456,7 +65456,7 @@ void m68000_device::move_w_pais_adr16_df() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65479,7 +65479,7 @@ void m68000_device::move_w_pais_adr16_df() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65585,7 +65585,7 @@ void m68000_device::move_w_das_adr16_df() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65610,7 +65610,7 @@ void m68000_device::move_w_das_adr16_df() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65692,7 +65692,7 @@ void m68000_device::move_w_dais_adr16_df() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65754,7 +65754,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65779,7 +65779,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65886,7 +65886,7 @@ void m68000_device::move_w_adr16_adr16_df() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65909,7 +65909,7 @@ void m68000_device::move_w_adr16_adr16_df() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66037,7 +66037,7 @@ void m68000_device::move_w_adr32_adr16_df() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -66060,7 +66060,7 @@ void m68000_device::move_w_adr32_adr16_df() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66165,7 +66165,7 @@ void m68000_device::move_w_dpc_adr16_df() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66190,7 +66190,7 @@ void m68000_device::move_w_dpc_adr16_df() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66271,7 +66271,7 @@ void m68000_device::move_w_dpc_adr16_df() // 31fa ffff
void m68000_device::move_w_dpci_adr16_df() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66333,7 +66333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66358,7 +66358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66467,7 +66467,7 @@ void m68000_device::move_w_imm16_adr16_df() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66574,7 +66574,7 @@ void m68000_device::move_w_ds_adr32_df() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66681,7 +66681,7 @@ void m68000_device::move_w_as_adr32_df() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66765,7 +66765,7 @@ void m68000_device::move_w_ais_adr32_df() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66790,7 +66790,7 @@ void m68000_device::move_w_ais_adr32_df() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66900,7 +66900,7 @@ void m68000_device::move_w_aips_adr32_df() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -66923,7 +66923,7 @@ void m68000_device::move_w_aips_adr32_df() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67035,7 +67035,7 @@ void m68000_device::move_w_pais_adr32_df() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67058,7 +67058,7 @@ void m68000_device::move_w_pais_adr32_df() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67184,7 +67184,7 @@ void m68000_device::move_w_das_adr32_df() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67209,7 +67209,7 @@ void m68000_device::move_w_das_adr32_df() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67311,7 +67311,7 @@ void m68000_device::move_w_dais_adr32_df() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67373,7 +67373,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67398,7 +67398,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67525,7 +67525,7 @@ void m68000_device::move_w_adr16_adr32_df() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67548,7 +67548,7 @@ void m68000_device::move_w_adr16_adr32_df() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67696,7 +67696,7 @@ void m68000_device::move_w_adr32_adr32_df() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67719,7 +67719,7 @@ void m68000_device::move_w_adr32_adr32_df() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67844,7 +67844,7 @@ void m68000_device::move_w_dpc_adr32_df() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67869,7 +67869,7 @@ void m68000_device::move_w_dpc_adr32_df() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67970,7 +67970,7 @@ void m68000_device::move_w_dpc_adr32_df() // 33fa ffff
void m68000_device::move_w_dpci_adr32_df() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68032,7 +68032,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68057,7 +68057,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68207,7 +68207,7 @@ void m68000_device::move_w_imm16_adr32_df() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68293,7 +68293,7 @@ void m68000_device::negx_b_ds_df() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -68332,7 +68332,7 @@ void m68000_device::negx_b_ais_df() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68355,7 +68355,7 @@ void m68000_device::negx_b_ais_df() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68412,7 +68412,7 @@ void m68000_device::negx_b_aips_df() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68433,7 +68433,7 @@ void m68000_device::negx_b_aips_df() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68492,7 +68492,7 @@ void m68000_device::negx_b_pais_df() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68513,7 +68513,7 @@ void m68000_device::negx_b_pais_df() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68586,7 +68586,7 @@ void m68000_device::negx_b_das_df() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68609,7 +68609,7 @@ void m68000_device::negx_b_das_df() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68658,7 +68658,7 @@ void m68000_device::negx_b_dais_df() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68720,7 +68720,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68743,7 +68743,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68817,7 +68817,7 @@ void m68000_device::negx_b_adr16_df() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68838,7 +68838,7 @@ void m68000_device::negx_b_adr16_df() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68933,7 +68933,7 @@ void m68000_device::negx_b_adr32_df() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68954,7 +68954,7 @@ void m68000_device::negx_b_adr32_df() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69007,7 +69007,7 @@ void m68000_device::negx_w_ds_df() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -69046,7 +69046,7 @@ void m68000_device::negx_w_ais_df() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69072,7 +69072,7 @@ void m68000_device::negx_w_ais_df() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69134,7 +69134,7 @@ void m68000_device::negx_w_aips_df() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69158,7 +69158,7 @@ void m68000_device::negx_w_aips_df() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69222,7 +69222,7 @@ void m68000_device::negx_w_pais_df() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69246,7 +69246,7 @@ void m68000_device::negx_w_pais_df() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69324,7 +69324,7 @@ void m68000_device::negx_w_das_df() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69350,7 +69350,7 @@ void m68000_device::negx_w_das_df() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69404,7 +69404,7 @@ void m68000_device::negx_w_dais_df() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69466,7 +69466,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69492,7 +69492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69571,7 +69571,7 @@ void m68000_device::negx_w_adr16_df() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69595,7 +69595,7 @@ void m68000_device::negx_w_adr16_df() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69695,7 +69695,7 @@ void m68000_device::negx_w_adr32_df() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69719,7 +69719,7 @@ void m68000_device::negx_w_adr32_df() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69777,12 +69777,12 @@ void m68000_device::negx_l_ds_df() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69822,7 +69822,7 @@ void m68000_device::negx_l_ais_df() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69869,7 +69869,7 @@ void m68000_device::negx_l_ais_df() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69894,7 +69894,7 @@ void m68000_device::negx_l_ais_df() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -69948,7 +69948,7 @@ void m68000_device::negx_l_aips_df() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69998,7 +69998,7 @@ void m68000_device::negx_l_aips_df() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70023,7 +70023,7 @@ void m68000_device::negx_l_aips_df() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70076,7 +70076,7 @@ void m68000_device::negx_l_pais_df() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -70128,7 +70128,7 @@ void m68000_device::negx_l_pais_df() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70153,7 +70153,7 @@ void m68000_device::negx_l_pais_df() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70228,7 +70228,7 @@ void m68000_device::negx_l_das_df() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70275,7 +70275,7 @@ void m68000_device::negx_l_das_df() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70300,7 +70300,7 @@ void m68000_device::negx_l_das_df() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70352,7 +70352,7 @@ void m68000_device::negx_l_dais_df() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70413,7 +70413,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70460,7 +70460,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70485,7 +70485,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70562,7 +70562,7 @@ void m68000_device::negx_l_adr16_df() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70609,7 +70609,7 @@ void m68000_device::negx_l_adr16_df() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70634,7 +70634,7 @@ void m68000_device::negx_l_adr16_df() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70732,7 +70732,7 @@ void m68000_device::negx_l_adr32_df() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70779,7 +70779,7 @@ void m68000_device::negx_l_adr32_df() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70804,7 +70804,7 @@ void m68000_device::negx_l_adr32_df() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70898,7 +70898,7 @@ void m68000_device::move_sr_ais_df() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -70926,7 +70926,7 @@ void m68000_device::move_sr_ais_df() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -70987,7 +70987,7 @@ void m68000_device::move_sr_aips_df() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71013,7 +71013,7 @@ void m68000_device::move_sr_aips_df() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71076,7 +71076,7 @@ void m68000_device::move_sr_pais_df() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71102,7 +71102,7 @@ void m68000_device::move_sr_pais_df() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71179,7 +71179,7 @@ void m68000_device::move_sr_das_df() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71207,7 +71207,7 @@ void m68000_device::move_sr_das_df() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71260,7 +71260,7 @@ void m68000_device::move_sr_dais_df() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71322,7 +71322,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71350,7 +71350,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71428,7 +71428,7 @@ void m68000_device::move_sr_adr16_df() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71454,7 +71454,7 @@ void m68000_device::move_sr_adr16_df() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71553,7 +71553,7 @@ void m68000_device::move_sr_adr32_df() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71579,7 +71579,7 @@ void m68000_device::move_sr_adr32_df() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71635,7 +71635,7 @@ void m68000_device::chk_w_ds_dd_df() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -71643,7 +71643,7 @@ void m68000_device::chk_w_ds_dd_df() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71661,14 +71661,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71693,7 +71693,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71716,7 +71716,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71855,7 +71855,7 @@ void m68000_device::chk_w_ais_dd_df() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -71879,7 +71879,7 @@ void m68000_device::chk_w_ais_dd_df() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -71887,7 +71887,7 @@ void m68000_device::chk_w_ais_dd_df() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71905,14 +71905,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71937,7 +71937,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71960,7 +71960,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72105,7 +72105,7 @@ void m68000_device::chk_w_aips_dd_df() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -72127,7 +72127,7 @@ void m68000_device::chk_w_aips_dd_df() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72135,7 +72135,7 @@ void m68000_device::chk_w_aips_dd_df() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72153,14 +72153,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72185,7 +72185,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72208,7 +72208,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72355,7 +72355,7 @@ void m68000_device::chk_w_pais_dd_df() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -72377,7 +72377,7 @@ void m68000_device::chk_w_pais_dd_df() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72385,7 +72385,7 @@ void m68000_device::chk_w_pais_dd_df() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72403,14 +72403,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72435,7 +72435,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72458,7 +72458,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72619,7 +72619,7 @@ void m68000_device::chk_w_das_dd_df() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72643,7 +72643,7 @@ void m68000_device::chk_w_das_dd_df() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72651,7 +72651,7 @@ void m68000_device::chk_w_das_dd_df() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72669,14 +72669,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72701,7 +72701,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72724,7 +72724,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72861,7 +72861,7 @@ void m68000_device::chk_w_dais_dd_df() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72923,7 +72923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72947,7 +72947,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72955,7 +72955,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72973,14 +72973,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73005,7 +73005,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73028,7 +73028,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73190,7 +73190,7 @@ void m68000_device::chk_w_adr16_dd_df() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -73212,7 +73212,7 @@ void m68000_device::chk_w_adr16_dd_df() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73220,7 +73220,7 @@ void m68000_device::chk_w_adr16_dd_df() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73238,14 +73238,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73270,7 +73270,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73293,7 +73293,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73476,7 +73476,7 @@ void m68000_device::chk_w_adr32_dd_df() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -73498,7 +73498,7 @@ void m68000_device::chk_w_adr32_dd_df() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73506,7 +73506,7 @@ void m68000_device::chk_w_adr32_dd_df() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73524,14 +73524,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73556,7 +73556,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73579,7 +73579,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73739,7 +73739,7 @@ void m68000_device::chk_w_dpc_dd_df() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73763,7 +73763,7 @@ void m68000_device::chk_w_dpc_dd_df() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73771,7 +73771,7 @@ void m68000_device::chk_w_dpc_dd_df() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73789,14 +73789,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73821,7 +73821,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73844,7 +73844,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73980,7 +73980,7 @@ void m68000_device::chk_w_dpci_dd_df() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74042,7 +74042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74066,7 +74066,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -74074,7 +74074,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74092,14 +74092,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74124,7 +74124,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74147,7 +74147,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74309,7 +74309,7 @@ void m68000_device::chk_w_imm16_dd_df() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -74317,7 +74317,7 @@ void m68000_device::chk_w_imm16_dd_df() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74335,14 +74335,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74367,7 +74367,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74390,7 +74390,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74628,7 +74628,7 @@ void m68000_device::lea_dais_ad_df() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -74923,7 +74923,7 @@ void m68000_device::lea_dpci_ad_df() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -75026,7 +75026,7 @@ void m68000_device::clr_b_ds_df() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75034,7 +75034,7 @@ void m68000_device::clr_b_ds_df() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75066,11 +75066,11 @@ void m68000_device::clr_b_ais_df() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75090,7 +75090,7 @@ void m68000_device::clr_b_ais_df() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75117,7 +75117,7 @@ void m68000_device::clr_b_ais_df() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75145,12 +75145,12 @@ void m68000_device::clr_b_aips_df() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75171,7 +75171,7 @@ void m68000_device::clr_b_aips_df() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75198,7 +75198,7 @@ void m68000_device::clr_b_aips_df() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75225,7 +75225,7 @@ void m68000_device::clr_b_pais_df() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75233,7 +75233,7 @@ void m68000_device::clr_b_pais_df() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75254,7 +75254,7 @@ void m68000_device::clr_b_pais_df() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75281,7 +75281,7 @@ void m68000_device::clr_b_pais_df() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75306,7 +75306,7 @@ void m68000_device::clr_b_das_df() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75329,11 +75329,11 @@ void m68000_device::clr_b_das_df() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75353,7 +75353,7 @@ void m68000_device::clr_b_das_df() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75380,7 +75380,7 @@ void m68000_device::clr_b_das_df() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75403,14 +75403,14 @@ void m68000_device::clr_b_dais_df() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -75418,7 +75418,7 @@ void m68000_device::clr_b_dais_df() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75442,7 +75442,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75468,11 +75468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75492,7 +75492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75519,7 +75519,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75546,7 +75546,7 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -75569,7 +75569,7 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75590,7 +75590,7 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75617,7 +75617,7 @@ void m68000_device::clr_b_adr16_df() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75642,7 +75642,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75666,7 +75666,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -75689,7 +75689,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75710,7 +75710,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75737,7 +75737,7 @@ void m68000_device::clr_b_adr32_df() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75764,7 +75764,7 @@ void m68000_device::clr_w_ds_df() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75772,7 +75772,7 @@ void m68000_device::clr_w_ds_df() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75804,11 +75804,11 @@ void m68000_device::clr_w_ais_df() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75831,7 +75831,7 @@ void m68000_device::clr_w_ais_df() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75858,7 +75858,7 @@ void m68000_device::clr_w_ais_df() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -75891,12 +75891,12 @@ void m68000_device::clr_w_aips_df() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -75920,7 +75920,7 @@ void m68000_device::clr_w_aips_df() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75947,7 +75947,7 @@ void m68000_device::clr_w_aips_df() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -75979,7 +75979,7 @@ void m68000_device::clr_w_pais_df() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75987,7 +75987,7 @@ void m68000_device::clr_w_pais_df() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76011,7 +76011,7 @@ void m68000_device::clr_w_pais_df() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76038,7 +76038,7 @@ void m68000_device::clr_w_pais_df() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76068,7 +76068,7 @@ void m68000_device::clr_w_das_df() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76091,11 +76091,11 @@ void m68000_device::clr_w_das_df() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76118,7 +76118,7 @@ void m68000_device::clr_w_das_df() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76145,7 +76145,7 @@ void m68000_device::clr_w_das_df() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76173,14 +76173,14 @@ void m68000_device::clr_w_dais_df() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -76188,7 +76188,7 @@ void m68000_device::clr_w_dais_df() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76212,7 +76212,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76238,11 +76238,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76265,7 +76265,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76292,7 +76292,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76324,7 +76324,7 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -76347,7 +76347,7 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76371,7 +76371,7 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76398,7 +76398,7 @@ void m68000_device::clr_w_adr16_df() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76428,7 +76428,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76452,7 +76452,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -76475,7 +76475,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76499,7 +76499,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76526,7 +76526,7 @@ void m68000_device::clr_w_adr32_df() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76558,12 +76558,12 @@ void m68000_device::clr_l_ds_df() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76589,7 +76589,7 @@ void m68000_device::clr_l_ds_df() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -76604,7 +76604,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76629,7 +76629,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76652,7 +76652,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76677,7 +76677,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76702,7 +76702,7 @@ void m68000_device::clr_l_ais_df() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76732,7 +76732,7 @@ void m68000_device::clr_l_aips_df() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76757,11 +76757,11 @@ void m68000_device::clr_l_aips_df() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76784,7 +76784,7 @@ void m68000_device::clr_l_aips_df() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76809,7 +76809,7 @@ void m68000_device::clr_l_aips_df() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76834,7 +76834,7 @@ void m68000_device::clr_l_aips_df() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76863,14 +76863,14 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76894,7 +76894,7 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76917,7 +76917,7 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76942,7 +76942,7 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76967,7 +76967,7 @@ void m68000_device::clr_l_pais_df() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76997,7 +76997,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77019,7 +77019,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77044,7 +77044,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77067,7 +77067,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77092,7 +77092,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77117,7 +77117,7 @@ void m68000_device::clr_l_das_df() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77145,14 +77145,14 @@ void m68000_device::clr_l_dais_df() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -77160,7 +77160,7 @@ void m68000_device::clr_l_dais_df() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77184,7 +77184,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77209,7 +77209,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77234,7 +77234,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77257,7 +77257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77282,7 +77282,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77307,7 +77307,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77339,7 +77339,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -77362,7 +77362,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77387,7 +77387,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77410,7 +77410,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77435,7 +77435,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77460,7 +77460,7 @@ void m68000_device::clr_l_adr16_df() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77490,7 +77490,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77514,7 +77514,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -77537,7 +77537,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77562,7 +77562,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77585,7 +77585,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77610,7 +77610,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77635,7 +77635,7 @@ void m68000_device::clr_l_adr32_df() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77667,7 +77667,7 @@ void m68000_device::neg_b_ds_df() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -77706,7 +77706,7 @@ void m68000_device::neg_b_ais_df() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77729,7 +77729,7 @@ void m68000_device::neg_b_ais_df() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77786,7 +77786,7 @@ void m68000_device::neg_b_aips_df() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77807,7 +77807,7 @@ void m68000_device::neg_b_aips_df() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77866,7 +77866,7 @@ void m68000_device::neg_b_pais_df() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77887,7 +77887,7 @@ void m68000_device::neg_b_pais_df() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77960,7 +77960,7 @@ void m68000_device::neg_b_das_df() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77983,7 +77983,7 @@ void m68000_device::neg_b_das_df() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78032,7 +78032,7 @@ void m68000_device::neg_b_dais_df() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78094,7 +78094,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78117,7 +78117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78191,7 +78191,7 @@ void m68000_device::neg_b_adr16_df() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78212,7 +78212,7 @@ void m68000_device::neg_b_adr16_df() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78307,7 +78307,7 @@ void m68000_device::neg_b_adr32_df() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78328,7 +78328,7 @@ void m68000_device::neg_b_adr32_df() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78381,7 +78381,7 @@ void m68000_device::neg_w_ds_df() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -78420,7 +78420,7 @@ void m68000_device::neg_w_ais_df() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78446,7 +78446,7 @@ void m68000_device::neg_w_ais_df() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78508,7 +78508,7 @@ void m68000_device::neg_w_aips_df() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78532,7 +78532,7 @@ void m68000_device::neg_w_aips_df() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78596,7 +78596,7 @@ void m68000_device::neg_w_pais_df() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78620,7 +78620,7 @@ void m68000_device::neg_w_pais_df() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78698,7 +78698,7 @@ void m68000_device::neg_w_das_df() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78724,7 +78724,7 @@ void m68000_device::neg_w_das_df() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78778,7 +78778,7 @@ void m68000_device::neg_w_dais_df() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78840,7 +78840,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78866,7 +78866,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78945,7 +78945,7 @@ void m68000_device::neg_w_adr16_df() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78969,7 +78969,7 @@ void m68000_device::neg_w_adr16_df() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79069,7 +79069,7 @@ void m68000_device::neg_w_adr32_df() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79093,7 +79093,7 @@ void m68000_device::neg_w_adr32_df() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79151,12 +79151,12 @@ void m68000_device::neg_l_ds_df() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79196,7 +79196,7 @@ void m68000_device::neg_l_ais_df() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79243,7 +79243,7 @@ void m68000_device::neg_l_ais_df() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79268,7 +79268,7 @@ void m68000_device::neg_l_ais_df() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79322,7 +79322,7 @@ void m68000_device::neg_l_aips_df() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79372,7 +79372,7 @@ void m68000_device::neg_l_aips_df() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79397,7 +79397,7 @@ void m68000_device::neg_l_aips_df() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79450,7 +79450,7 @@ void m68000_device::neg_l_pais_df() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79502,7 +79502,7 @@ void m68000_device::neg_l_pais_df() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79527,7 +79527,7 @@ void m68000_device::neg_l_pais_df() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79602,7 +79602,7 @@ void m68000_device::neg_l_das_df() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79649,7 +79649,7 @@ void m68000_device::neg_l_das_df() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79674,7 +79674,7 @@ void m68000_device::neg_l_das_df() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79726,7 +79726,7 @@ void m68000_device::neg_l_dais_df() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79787,7 +79787,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79834,7 +79834,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79859,7 +79859,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79936,7 +79936,7 @@ void m68000_device::neg_l_adr16_df() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79983,7 +79983,7 @@ void m68000_device::neg_l_adr16_df() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80008,7 +80008,7 @@ void m68000_device::neg_l_adr16_df() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80106,7 +80106,7 @@ void m68000_device::neg_l_adr32_df() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80153,7 +80153,7 @@ void m68000_device::neg_l_adr32_df() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80178,7 +80178,7 @@ void m68000_device::neg_l_adr32_df() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80300,7 +80300,7 @@ void m68000_device::move_ais_ccr_df() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80398,7 +80398,7 @@ void m68000_device::move_aips_ccr_df() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80496,7 +80496,7 @@ void m68000_device::move_pais_ccr_df() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80608,7 +80608,7 @@ void m68000_device::move_das_ccr_df() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80698,7 +80698,7 @@ void m68000_device::move_dais_ccr_df() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80760,7 +80760,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80875,7 +80875,7 @@ void m68000_device::move_adr16_ccr_df() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -81009,7 +81009,7 @@ void m68000_device::move_adr32_ccr_df() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -81120,7 +81120,7 @@ void m68000_device::move_dpc_ccr_df() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81209,7 +81209,7 @@ void m68000_device::move_dpc_ccr_df() // 44fa ffff
void m68000_device::move_dpci_ccr_df() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81271,7 +81271,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81456,7 +81456,7 @@ void m68000_device::not_b_ds_df() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -81495,7 +81495,7 @@ void m68000_device::not_b_ais_df() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81518,7 +81518,7 @@ void m68000_device::not_b_ais_df() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81575,7 +81575,7 @@ void m68000_device::not_b_aips_df() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81596,7 +81596,7 @@ void m68000_device::not_b_aips_df() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81655,7 +81655,7 @@ void m68000_device::not_b_pais_df() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81676,7 +81676,7 @@ void m68000_device::not_b_pais_df() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81749,7 +81749,7 @@ void m68000_device::not_b_das_df() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81772,7 +81772,7 @@ void m68000_device::not_b_das_df() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81821,7 +81821,7 @@ void m68000_device::not_b_dais_df() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81883,7 +81883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81906,7 +81906,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81980,7 +81980,7 @@ void m68000_device::not_b_adr16_df() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82001,7 +82001,7 @@ void m68000_device::not_b_adr16_df() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82096,7 +82096,7 @@ void m68000_device::not_b_adr32_df() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82117,7 +82117,7 @@ void m68000_device::not_b_adr32_df() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82170,7 +82170,7 @@ void m68000_device::not_w_ds_df() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -82209,7 +82209,7 @@ void m68000_device::not_w_ais_df() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82235,7 +82235,7 @@ void m68000_device::not_w_ais_df() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82297,7 +82297,7 @@ void m68000_device::not_w_aips_df() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82321,7 +82321,7 @@ void m68000_device::not_w_aips_df() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82385,7 +82385,7 @@ void m68000_device::not_w_pais_df() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82409,7 +82409,7 @@ void m68000_device::not_w_pais_df() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82487,7 +82487,7 @@ void m68000_device::not_w_das_df() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82513,7 +82513,7 @@ void m68000_device::not_w_das_df() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82567,7 +82567,7 @@ void m68000_device::not_w_dais_df() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82629,7 +82629,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82655,7 +82655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82734,7 +82734,7 @@ void m68000_device::not_w_adr16_df() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82758,7 +82758,7 @@ void m68000_device::not_w_adr16_df() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82858,7 +82858,7 @@ void m68000_device::not_w_adr32_df() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82882,7 +82882,7 @@ void m68000_device::not_w_adr32_df() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82940,12 +82940,12 @@ void m68000_device::not_l_ds_df() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82985,7 +82985,7 @@ void m68000_device::not_l_ais_df() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83032,7 +83032,7 @@ void m68000_device::not_l_ais_df() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83057,7 +83057,7 @@ void m68000_device::not_l_ais_df() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83111,7 +83111,7 @@ void m68000_device::not_l_aips_df() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83161,7 +83161,7 @@ void m68000_device::not_l_aips_df() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83186,7 +83186,7 @@ void m68000_device::not_l_aips_df() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68000_device::not_l_pais_df() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -83291,7 +83291,7 @@ void m68000_device::not_l_pais_df() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83316,7 +83316,7 @@ void m68000_device::not_l_pais_df() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83391,7 +83391,7 @@ void m68000_device::not_l_das_df() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83438,7 +83438,7 @@ void m68000_device::not_l_das_df() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83463,7 +83463,7 @@ void m68000_device::not_l_das_df() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83515,7 +83515,7 @@ void m68000_device::not_l_dais_df() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -83576,7 +83576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83623,7 +83623,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83648,7 +83648,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83725,7 +83725,7 @@ void m68000_device::not_l_adr16_df() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83772,7 +83772,7 @@ void m68000_device::not_l_adr16_df() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83797,7 +83797,7 @@ void m68000_device::not_l_adr16_df() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83895,7 +83895,7 @@ void m68000_device::not_l_adr32_df() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83942,7 +83942,7 @@ void m68000_device::not_l_adr32_df() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83967,7 +83967,7 @@ void m68000_device::not_l_adr32_df() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -84099,7 +84099,7 @@ void m68000_device::move_ais_sr_df() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84203,7 +84203,7 @@ void m68000_device::move_aips_sr_df() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84307,7 +84307,7 @@ void m68000_device::move_pais_sr_df() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84425,7 +84425,7 @@ void m68000_device::move_das_sr_df() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84521,7 +84521,7 @@ void m68000_device::move_dais_sr_df() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84583,7 +84583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84704,7 +84704,7 @@ void m68000_device::move_adr16_sr_df() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84844,7 +84844,7 @@ void m68000_device::move_adr32_sr_df() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84961,7 +84961,7 @@ void m68000_device::move_dpc_sr_df() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85056,7 +85056,7 @@ void m68000_device::move_dpci_sr_df() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85118,7 +85118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85311,12 +85311,12 @@ void m68000_device::nbcd_b_ds_df() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85354,7 +85354,7 @@ void m68000_device::nbcd_b_ais_df() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85376,12 +85376,12 @@ void m68000_device::nbcd_b_ais_df() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85436,7 +85436,7 @@ void m68000_device::nbcd_b_aips_df() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85456,12 +85456,12 @@ void m68000_device::nbcd_b_aips_df() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85518,7 +85518,7 @@ void m68000_device::nbcd_b_pais_df() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85538,12 +85538,12 @@ void m68000_device::nbcd_b_pais_df() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85614,7 +85614,7 @@ void m68000_device::nbcd_b_das_df() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85636,12 +85636,12 @@ void m68000_device::nbcd_b_das_df() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85688,7 +85688,7 @@ void m68000_device::nbcd_b_dais_df() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85750,7 +85750,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85772,12 +85772,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85849,7 +85849,7 @@ void m68000_device::nbcd_b_adr16_df() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85869,12 +85869,12 @@ void m68000_device::nbcd_b_adr16_df() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85967,7 +85967,7 @@ void m68000_device::nbcd_b_adr32_df() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85987,12 +85987,12 @@ void m68000_device::nbcd_b_adr32_df() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -86044,7 +86044,7 @@ void m68000_device::swap_ds_df() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -86052,7 +86052,7 @@ void m68000_device::swap_ds_df() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86089,7 +86089,7 @@ void m68000_device::pea_ais_df() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86166,7 +86166,7 @@ void m68000_device::pea_das_df() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86193,7 +86193,7 @@ void m68000_device::pea_das_df() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86268,7 +86268,7 @@ void m68000_device::pea_dais_df() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86329,7 +86329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86638,7 +86638,7 @@ void m68000_device::pea_dpc_df() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86665,7 +86665,7 @@ void m68000_device::pea_dpc_df() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86739,7 +86739,7 @@ void m68000_device::pea_dpc_df() // 487a ffff
void m68000_device::pea_dpci_df() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86800,7 +86800,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86884,7 +86884,7 @@ void m68000_device::ext_w_ds_df() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -87255,7 +87255,7 @@ void m68000_device::movem_w_list_dais_df() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -87643,7 +87643,7 @@ void m68000_device::ext_l_ds_df() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -88075,7 +88075,7 @@ void m68000_device::movem_l_list_dais_df() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -88524,13 +88524,13 @@ void m68000_device::tst_b_ds_df() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88562,11 +88562,11 @@ void m68000_device::tst_b_ais_df() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88586,13 +88586,13 @@ void m68000_device::tst_b_ais_df() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88627,12 +88627,12 @@ void m68000_device::tst_b_aips_df() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88653,13 +88653,13 @@ void m68000_device::tst_b_aips_df() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88693,7 +88693,7 @@ void m68000_device::tst_b_pais_df() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -88701,7 +88701,7 @@ void m68000_device::tst_b_pais_df() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88722,13 +88722,13 @@ void m68000_device::tst_b_pais_df() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88760,7 +88760,7 @@ void m68000_device::tst_b_das_df() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88783,11 +88783,11 @@ void m68000_device::tst_b_das_df() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88807,13 +88807,13 @@ void m68000_device::tst_b_das_df() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88843,14 +88843,14 @@ void m68000_device::tst_b_dais_df() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -88858,7 +88858,7 @@ void m68000_device::tst_b_dais_df() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88882,7 +88882,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88908,11 +88908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88932,13 +88932,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88972,7 +88972,7 @@ void m68000_device::tst_b_adr16_df() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -88995,7 +88995,7 @@ void m68000_device::tst_b_adr16_df() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89016,13 +89016,13 @@ void m68000_device::tst_b_adr16_df() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89054,7 +89054,7 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89078,7 +89078,7 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89101,7 +89101,7 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89122,13 +89122,13 @@ void m68000_device::tst_b_adr32_df() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89163,13 +89163,13 @@ void m68000_device::tst_w_ds_df() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89201,11 +89201,11 @@ void m68000_device::tst_w_ais_df() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89228,13 +89228,13 @@ void m68000_device::tst_w_ais_df() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89269,12 +89269,12 @@ void m68000_device::tst_w_aips_df() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89298,13 +89298,13 @@ void m68000_device::tst_w_aips_df() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89338,7 +89338,7 @@ void m68000_device::tst_w_pais_df() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -89346,7 +89346,7 @@ void m68000_device::tst_w_pais_df() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89370,13 +89370,13 @@ void m68000_device::tst_w_pais_df() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89408,7 +89408,7 @@ void m68000_device::tst_w_das_df() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89431,11 +89431,11 @@ void m68000_device::tst_w_das_df() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89458,13 +89458,13 @@ void m68000_device::tst_w_das_df() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89494,14 +89494,14 @@ void m68000_device::tst_w_dais_df() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -89509,7 +89509,7 @@ void m68000_device::tst_w_dais_df() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89533,7 +89533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89559,11 +89559,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89586,13 +89586,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89626,7 +89626,7 @@ void m68000_device::tst_w_adr16_df() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89649,7 +89649,7 @@ void m68000_device::tst_w_adr16_df() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89673,13 +89673,13 @@ void m68000_device::tst_w_adr16_df() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89711,7 +89711,7 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89735,7 +89735,7 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89758,7 +89758,7 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89782,13 +89782,13 @@ void m68000_device::tst_w_adr32_df() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89823,13 +89823,13 @@ void m68000_device::tst_l_ds_df() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89863,7 +89863,7 @@ void m68000_device::tst_l_ais_df() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89888,7 +89888,7 @@ void m68000_device::tst_l_ais_df() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89911,13 +89911,13 @@ void m68000_device::tst_l_ais_df() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89951,7 +89951,7 @@ void m68000_device::tst_l_aips_df() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89976,11 +89976,11 @@ void m68000_device::tst_l_aips_df() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90003,13 +90003,13 @@ void m68000_device::tst_l_aips_df() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90042,14 +90042,14 @@ void m68000_device::tst_l_pais_df() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90073,7 +90073,7 @@ void m68000_device::tst_l_pais_df() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90096,13 +90096,13 @@ void m68000_device::tst_l_pais_df() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90136,7 +90136,7 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90158,7 +90158,7 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90183,7 +90183,7 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90206,13 +90206,13 @@ void m68000_device::tst_l_das_df() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90244,14 +90244,14 @@ void m68000_device::tst_l_dais_df() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -90259,7 +90259,7 @@ void m68000_device::tst_l_dais_df() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90283,7 +90283,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90308,7 +90308,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90333,7 +90333,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90356,13 +90356,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90398,7 +90398,7 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -90421,7 +90421,7 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90446,7 +90446,7 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90469,13 +90469,13 @@ void m68000_device::tst_l_adr16_df() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90509,7 +90509,7 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90533,7 +90533,7 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -90556,7 +90556,7 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90581,7 +90581,7 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90604,13 +90604,13 @@ void m68000_device::tst_l_adr32_df() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90646,14 +90646,14 @@ void m68000_device::tas_ds_df() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90687,11 +90687,11 @@ void m68000_device::tas_ais_df() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90706,14 +90706,14 @@ void m68000_device::tas_ais_df() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90735,11 +90735,11 @@ void m68000_device::tas_ais_df() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90774,12 +90774,12 @@ void m68000_device::tas_aips_df() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90795,14 +90795,14 @@ void m68000_device::tas_aips_df() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90824,11 +90824,11 @@ void m68000_device::tas_aips_df() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90862,7 +90862,7 @@ void m68000_device::tas_pais_df() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -90870,7 +90870,7 @@ void m68000_device::tas_pais_df() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90886,14 +90886,14 @@ void m68000_device::tas_pais_df() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90915,11 +90915,11 @@ void m68000_device::tas_pais_df() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90951,7 +90951,7 @@ void m68000_device::tas_das_df() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90974,11 +90974,11 @@ void m68000_device::tas_das_df() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90993,14 +90993,14 @@ void m68000_device::tas_das_df() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91022,11 +91022,11 @@ void m68000_device::tas_das_df() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91056,14 +91056,14 @@ void m68000_device::tas_dais_df() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -91071,7 +91071,7 @@ void m68000_device::tas_dais_df() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91095,7 +91095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91121,11 +91121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -91140,14 +91140,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91169,11 +91169,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91207,7 +91207,7 @@ void m68000_device::tas_adr16_df() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -91230,7 +91230,7 @@ void m68000_device::tas_adr16_df() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91246,14 +91246,14 @@ void m68000_device::tas_adr16_df() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91275,11 +91275,11 @@ void m68000_device::tas_adr16_df() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91311,7 +91311,7 @@ void m68000_device::tas_adr32_df() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91335,7 +91335,7 @@ void m68000_device::tas_adr32_df() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -91358,7 +91358,7 @@ void m68000_device::tas_adr32_df() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91374,14 +91374,14 @@ void m68000_device::tas_adr32_df() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91403,11 +91403,11 @@ void m68000_device::tas_adr32_df() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91833,7 +91833,7 @@ void m68000_device::movem_w_dais_list_df() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -91891,7 +91891,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -92444,7 +92444,7 @@ void m68000_device::movem_w_dpci_list_df() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -92502,7 +92502,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93055,7 +93055,7 @@ void m68000_device::movem_l_dais_list_df() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93113,7 +93113,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93750,7 +93750,7 @@ void m68000_device::movem_l_dpci_list_df() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93808,7 +93808,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93930,14 +93930,14 @@ void m68000_device::trap_imm4_df() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -93962,7 +93962,7 @@ void m68000_device::trap_imm4_df() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -93985,7 +93985,7 @@ void m68000_device::trap_imm4_df() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94107,7 +94107,7 @@ void m68000_device::link_as_imm16_df() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -94384,7 +94384,7 @@ void m68000_device::reset_df() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -94484,7 +94484,7 @@ void m68000_device::stop_i16u_df() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -94497,6 +94497,7 @@ void m68000_device::stop_i16u_df() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -94510,7 +94511,7 @@ void m68000_device::rte_df() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -94638,7 +94639,7 @@ void m68000_device::rts_df() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -94779,7 +94780,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -94802,7 +94803,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94827,7 +94828,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94850,7 +94851,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94970,7 +94971,7 @@ void m68000_device::rtr_df() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -95298,7 +95299,7 @@ void m68000_device::jsr_dais_df() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95747,7 +95748,7 @@ void m68000_device::jsr_dpc_df() // 4eba ffff
void m68000_device::jsr_dpci_df() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95988,7 +95989,7 @@ void m68000_device::jmp_dais_df() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96260,7 +96261,7 @@ void m68000_device::jmp_dpc_df() // 4efa ffff
void m68000_device::jmp_dpci_df() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96344,7 +96345,7 @@ void m68000_device::addq_b_imm3_ds_df() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -96383,7 +96384,7 @@ void m68000_device::addq_b_imm3_ais_df() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96407,7 +96408,7 @@ void m68000_device::addq_b_imm3_ais_df() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96464,7 +96465,7 @@ void m68000_device::addq_b_imm3_aips_df() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96486,7 +96487,7 @@ void m68000_device::addq_b_imm3_aips_df() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96545,7 +96546,7 @@ void m68000_device::addq_b_imm3_pais_df() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96567,7 +96568,7 @@ void m68000_device::addq_b_imm3_pais_df() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96640,7 +96641,7 @@ void m68000_device::addq_b_imm3_das_df() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96664,7 +96665,7 @@ void m68000_device::addq_b_imm3_das_df() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96713,7 +96714,7 @@ void m68000_device::addq_b_imm3_dais_df() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96775,7 +96776,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96799,7 +96800,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96873,7 +96874,7 @@ void m68000_device::addq_b_imm3_adr16_df() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96895,7 +96896,7 @@ void m68000_device::addq_b_imm3_adr16_df() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96990,7 +96991,7 @@ void m68000_device::addq_b_imm3_adr32_df() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -97012,7 +97013,7 @@ void m68000_device::addq_b_imm3_adr32_df() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97065,7 +97066,7 @@ void m68000_device::addq_w_imm3_ds_df() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -97106,7 +97107,7 @@ void m68000_device::addq_w_imm3_as_df() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97129,7 +97130,7 @@ void m68000_device::addq_w_imm3_as_df() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97151,7 +97152,7 @@ void m68000_device::addq_w_imm3_ais_df() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97178,7 +97179,7 @@ void m68000_device::addq_w_imm3_ais_df() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97240,7 +97241,7 @@ void m68000_device::addq_w_imm3_aips_df() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97265,7 +97266,7 @@ void m68000_device::addq_w_imm3_aips_df() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97329,7 +97330,7 @@ void m68000_device::addq_w_imm3_pais_df() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97354,7 +97355,7 @@ void m68000_device::addq_w_imm3_pais_df() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97432,7 +97433,7 @@ void m68000_device::addq_w_imm3_das_df() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97459,7 +97460,7 @@ void m68000_device::addq_w_imm3_das_df() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97513,7 +97514,7 @@ void m68000_device::addq_w_imm3_dais_df() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97575,7 +97576,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97602,7 +97603,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97681,7 +97682,7 @@ void m68000_device::addq_w_imm3_adr16_df() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97706,7 +97707,7 @@ void m68000_device::addq_w_imm3_adr16_df() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97806,7 +97807,7 @@ void m68000_device::addq_w_imm3_adr32_df() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97831,7 +97832,7 @@ void m68000_device::addq_w_imm3_adr32_df() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97889,7 +97890,7 @@ void m68000_device::addq_l_imm3_ds_df() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -97913,7 +97914,7 @@ void m68000_device::addq_l_imm3_ds_df() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -97938,7 +97939,7 @@ void m68000_device::addq_l_imm3_as_df() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97961,7 +97962,7 @@ void m68000_device::addq_l_imm3_as_df() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97983,7 +97984,7 @@ void m68000_device::addq_l_imm3_ais_df() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98031,7 +98032,7 @@ void m68000_device::addq_l_imm3_ais_df() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98056,7 +98057,7 @@ void m68000_device::addq_l_imm3_ais_df() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98110,7 +98111,7 @@ void m68000_device::addq_l_imm3_aips_df() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98161,7 +98162,7 @@ void m68000_device::addq_l_imm3_aips_df() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98186,7 +98187,7 @@ void m68000_device::addq_l_imm3_aips_df() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98239,7 +98240,7 @@ void m68000_device::addq_l_imm3_pais_df() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -98292,7 +98293,7 @@ void m68000_device::addq_l_imm3_pais_df() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98317,7 +98318,7 @@ void m68000_device::addq_l_imm3_pais_df() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98392,7 +98393,7 @@ void m68000_device::addq_l_imm3_das_df() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98440,7 +98441,7 @@ void m68000_device::addq_l_imm3_das_df() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98465,7 +98466,7 @@ void m68000_device::addq_l_imm3_das_df() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98517,7 +98518,7 @@ void m68000_device::addq_l_imm3_dais_df() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -98578,7 +98579,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98626,7 +98627,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98651,7 +98652,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98728,7 +98729,7 @@ void m68000_device::addq_l_imm3_adr16_df() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98776,7 +98777,7 @@ void m68000_device::addq_l_imm3_adr16_df() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98801,7 +98802,7 @@ void m68000_device::addq_l_imm3_adr16_df() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98899,7 +98900,7 @@ void m68000_device::addq_l_imm3_adr32_df() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98947,7 +98948,7 @@ void m68000_device::addq_l_imm3_adr32_df() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98972,7 +98973,7 @@ void m68000_device::addq_l_imm3_adr32_df() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -99028,7 +99029,7 @@ void m68000_device::st_ds_df() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -99040,7 +99041,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99067,7 +99068,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99092,7 +99093,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -99107,7 +99108,7 @@ void m68000_device::dbt_ds_rel16_df() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -99119,13 +99120,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99153,7 +99154,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -99161,7 +99162,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99185,11 +99186,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99219,13 +99220,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99255,7 +99256,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99286,11 +99287,11 @@ void m68000_device::st_ais_df() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99310,7 +99311,7 @@ void m68000_device::st_ais_df() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99320,7 +99321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99344,7 +99345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99372,7 +99373,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99400,12 +99401,12 @@ void m68000_device::st_aips_df() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99426,7 +99427,7 @@ void m68000_device::st_aips_df() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99436,7 +99437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99460,7 +99461,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99488,7 +99489,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99515,7 +99516,7 @@ void m68000_device::st_pais_df() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99523,7 +99524,7 @@ void m68000_device::st_pais_df() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99544,7 +99545,7 @@ void m68000_device::st_pais_df() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99554,7 +99555,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99578,7 +99579,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99606,7 +99607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99631,7 +99632,7 @@ void m68000_device::st_das_df() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99654,11 +99655,11 @@ void m68000_device::st_das_df() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99678,7 +99679,7 @@ void m68000_device::st_das_df() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99688,7 +99689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99712,7 +99713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99740,7 +99741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99763,14 +99764,14 @@ void m68000_device::st_dais_df() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99778,7 +99779,7 @@ void m68000_device::st_dais_df() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99802,7 +99803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99828,11 +99829,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99852,7 +99853,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99862,7 +99863,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99886,7 +99887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99914,7 +99915,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99941,7 +99942,7 @@ void m68000_device::st_adr16_df() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99964,7 +99965,7 @@ void m68000_device::st_adr16_df() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99985,7 +99986,7 @@ void m68000_device::st_adr16_df() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99995,7 +99996,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100019,7 +100020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100047,7 +100048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100072,7 +100073,7 @@ void m68000_device::st_adr32_df() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100096,7 +100097,7 @@ void m68000_device::st_adr32_df() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100119,7 +100120,7 @@ void m68000_device::st_adr32_df() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100140,7 +100141,7 @@ void m68000_device::st_adr32_df() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -100150,7 +100151,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100174,7 +100175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100202,7 +100203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100229,7 +100230,7 @@ void m68000_device::subq_b_imm3_ds_df() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100268,7 +100269,7 @@ void m68000_device::subq_b_imm3_ais_df() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100292,7 +100293,7 @@ void m68000_device::subq_b_imm3_ais_df() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100349,7 +100350,7 @@ void m68000_device::subq_b_imm3_aips_df() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100371,7 +100372,7 @@ void m68000_device::subq_b_imm3_aips_df() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100430,7 +100431,7 @@ void m68000_device::subq_b_imm3_pais_df() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100452,7 +100453,7 @@ void m68000_device::subq_b_imm3_pais_df() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100525,7 +100526,7 @@ void m68000_device::subq_b_imm3_das_df() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100549,7 +100550,7 @@ void m68000_device::subq_b_imm3_das_df() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100598,7 +100599,7 @@ void m68000_device::subq_b_imm3_dais_df() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100660,7 +100661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100684,7 +100685,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100758,7 +100759,7 @@ void m68000_device::subq_b_imm3_adr16_df() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100780,7 +100781,7 @@ void m68000_device::subq_b_imm3_adr16_df() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100875,7 +100876,7 @@ void m68000_device::subq_b_imm3_adr32_df() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100897,7 +100898,7 @@ void m68000_device::subq_b_imm3_adr32_df() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100950,7 +100951,7 @@ void m68000_device::subq_w_imm3_ds_df() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100991,7 +100992,7 @@ void m68000_device::subq_w_imm3_as_df() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101014,7 +101015,7 @@ void m68000_device::subq_w_imm3_as_df() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101036,7 +101037,7 @@ void m68000_device::subq_w_imm3_ais_df() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101063,7 +101064,7 @@ void m68000_device::subq_w_imm3_ais_df() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101125,7 +101126,7 @@ void m68000_device::subq_w_imm3_aips_df() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101150,7 +101151,7 @@ void m68000_device::subq_w_imm3_aips_df() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101214,7 +101215,7 @@ void m68000_device::subq_w_imm3_pais_df() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101239,7 +101240,7 @@ void m68000_device::subq_w_imm3_pais_df() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101317,7 +101318,7 @@ void m68000_device::subq_w_imm3_das_df() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101344,7 +101345,7 @@ void m68000_device::subq_w_imm3_das_df() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101398,7 +101399,7 @@ void m68000_device::subq_w_imm3_dais_df() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -101460,7 +101461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101487,7 +101488,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101566,7 +101567,7 @@ void m68000_device::subq_w_imm3_adr16_df() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101591,7 +101592,7 @@ void m68000_device::subq_w_imm3_adr16_df() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101691,7 +101692,7 @@ void m68000_device::subq_w_imm3_adr32_df() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101716,7 +101717,7 @@ void m68000_device::subq_w_imm3_adr32_df() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101774,7 +101775,7 @@ void m68000_device::subq_l_imm3_ds_df() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -101798,7 +101799,7 @@ void m68000_device::subq_l_imm3_ds_df() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -101823,7 +101824,7 @@ void m68000_device::subq_l_imm3_as_df() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101846,7 +101847,7 @@ void m68000_device::subq_l_imm3_as_df() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101868,7 +101869,7 @@ void m68000_device::subq_l_imm3_ais_df() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101916,7 +101917,7 @@ void m68000_device::subq_l_imm3_ais_df() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101941,7 +101942,7 @@ void m68000_device::subq_l_imm3_ais_df() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -101995,7 +101996,7 @@ void m68000_device::subq_l_imm3_aips_df() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102046,7 +102047,7 @@ void m68000_device::subq_l_imm3_aips_df() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102071,7 +102072,7 @@ void m68000_device::subq_l_imm3_aips_df() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102124,7 +102125,7 @@ void m68000_device::subq_l_imm3_pais_df() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -102177,7 +102178,7 @@ void m68000_device::subq_l_imm3_pais_df() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102202,7 +102203,7 @@ void m68000_device::subq_l_imm3_pais_df() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102277,7 +102278,7 @@ void m68000_device::subq_l_imm3_das_df() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102325,7 +102326,7 @@ void m68000_device::subq_l_imm3_das_df() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102350,7 +102351,7 @@ void m68000_device::subq_l_imm3_das_df() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102402,7 +102403,7 @@ void m68000_device::subq_l_imm3_dais_df() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -102463,7 +102464,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102511,7 +102512,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102536,7 +102537,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102613,7 +102614,7 @@ void m68000_device::subq_l_imm3_adr16_df() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102661,7 +102662,7 @@ void m68000_device::subq_l_imm3_adr16_df() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102686,7 +102687,7 @@ void m68000_device::subq_l_imm3_adr16_df() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102784,7 +102785,7 @@ void m68000_device::subq_l_imm3_adr32_df() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102832,7 +102833,7 @@ void m68000_device::subq_l_imm3_adr32_df() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102857,7 +102858,7 @@ void m68000_device::subq_l_imm3_adr32_df() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102913,7 +102914,7 @@ void m68000_device::sf_ds_df() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -102925,7 +102926,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -102952,7 +102953,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102977,7 +102978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -102992,7 +102993,7 @@ void m68000_device::dbra_ds_rel16_df() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -103004,13 +103005,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103038,7 +103039,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -103046,7 +103047,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103070,11 +103071,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103104,13 +103105,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103140,7 +103141,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103171,11 +103172,11 @@ void m68000_device::sf_ais_df() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103195,7 +103196,7 @@ void m68000_device::sf_ais_df() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103205,7 +103206,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103229,7 +103230,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103257,7 +103258,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103285,12 +103286,12 @@ void m68000_device::sf_aips_df() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103311,7 +103312,7 @@ void m68000_device::sf_aips_df() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103321,7 +103322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103345,7 +103346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103373,7 +103374,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103400,7 +103401,7 @@ void m68000_device::sf_pais_df() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103408,7 +103409,7 @@ void m68000_device::sf_pais_df() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103429,7 +103430,7 @@ void m68000_device::sf_pais_df() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103439,7 +103440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103463,7 +103464,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103491,7 +103492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103516,7 +103517,7 @@ void m68000_device::sf_das_df() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103539,11 +103540,11 @@ void m68000_device::sf_das_df() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103563,7 +103564,7 @@ void m68000_device::sf_das_df() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103573,7 +103574,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103597,7 +103598,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103625,7 +103626,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103648,14 +103649,14 @@ void m68000_device::sf_dais_df() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103663,7 +103664,7 @@ void m68000_device::sf_dais_df() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103687,7 +103688,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103713,11 +103714,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103737,7 +103738,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103747,7 +103748,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103771,7 +103772,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103799,7 +103800,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103826,7 +103827,7 @@ void m68000_device::sf_adr16_df() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103849,7 +103850,7 @@ void m68000_device::sf_adr16_df() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103870,7 +103871,7 @@ void m68000_device::sf_adr16_df() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103880,7 +103881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103904,7 +103905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103932,7 +103933,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103957,7 +103958,7 @@ void m68000_device::sf_adr32_df() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103981,7 +103982,7 @@ void m68000_device::sf_adr32_df() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104004,7 +104005,7 @@ void m68000_device::sf_adr32_df() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104025,7 +104026,7 @@ void m68000_device::sf_adr32_df() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104035,7 +104036,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104059,7 +104060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104087,7 +104088,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104114,7 +104115,7 @@ void m68000_device::shi_ds_df() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -104126,7 +104127,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104153,7 +104154,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104178,7 +104179,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -104193,7 +104194,7 @@ void m68000_device::dbhi_ds_rel16_df() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -104205,13 +104206,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104239,7 +104240,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -104247,7 +104248,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104271,11 +104272,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104305,13 +104306,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104341,7 +104342,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104372,11 +104373,11 @@ void m68000_device::shi_ais_df() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104396,7 +104397,7 @@ void m68000_device::shi_ais_df() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104406,7 +104407,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104430,7 +104431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104458,7 +104459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104486,12 +104487,12 @@ void m68000_device::shi_aips_df() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104512,7 +104513,7 @@ void m68000_device::shi_aips_df() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104522,7 +104523,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104546,7 +104547,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104574,7 +104575,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104601,7 +104602,7 @@ void m68000_device::shi_pais_df() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -104609,7 +104610,7 @@ void m68000_device::shi_pais_df() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104630,7 +104631,7 @@ void m68000_device::shi_pais_df() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104640,7 +104641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104664,7 +104665,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104692,7 +104693,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104717,7 +104718,7 @@ void m68000_device::shi_das_df() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104740,11 +104741,11 @@ void m68000_device::shi_das_df() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104764,7 +104765,7 @@ void m68000_device::shi_das_df() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104774,7 +104775,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104798,7 +104799,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104826,7 +104827,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104849,14 +104850,14 @@ void m68000_device::shi_dais_df() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -104864,7 +104865,7 @@ void m68000_device::shi_dais_df() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104888,7 +104889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104914,11 +104915,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104938,7 +104939,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104948,7 +104949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104972,7 +104973,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105000,7 +105001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105027,7 +105028,7 @@ void m68000_device::shi_adr16_df() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105050,7 +105051,7 @@ void m68000_device::shi_adr16_df() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105071,7 +105072,7 @@ void m68000_device::shi_adr16_df() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105081,7 +105082,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105105,7 +105106,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105133,7 +105134,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105158,7 +105159,7 @@ void m68000_device::shi_adr32_df() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105182,7 +105183,7 @@ void m68000_device::shi_adr32_df() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105205,7 +105206,7 @@ void m68000_device::shi_adr32_df() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105226,7 +105227,7 @@ void m68000_device::shi_adr32_df() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105236,7 +105237,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105260,7 +105261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105288,7 +105289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105315,7 +105316,7 @@ void m68000_device::sls_ds_df() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -105327,7 +105328,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105354,7 +105355,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105379,7 +105380,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -105394,7 +105395,7 @@ void m68000_device::dbls_ds_rel16_df() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -105406,13 +105407,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105440,7 +105441,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -105448,7 +105449,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105472,11 +105473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105506,13 +105507,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105542,7 +105543,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105573,11 +105574,11 @@ void m68000_device::sls_ais_df() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105597,7 +105598,7 @@ void m68000_device::sls_ais_df() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105607,7 +105608,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105631,7 +105632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105659,7 +105660,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105687,12 +105688,12 @@ void m68000_device::sls_aips_df() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105713,7 +105714,7 @@ void m68000_device::sls_aips_df() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105723,7 +105724,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105747,7 +105748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105775,7 +105776,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105802,7 +105803,7 @@ void m68000_device::sls_pais_df() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -105810,7 +105811,7 @@ void m68000_device::sls_pais_df() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105831,7 +105832,7 @@ void m68000_device::sls_pais_df() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105841,7 +105842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105865,7 +105866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105893,7 +105894,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105918,7 +105919,7 @@ void m68000_device::sls_das_df() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105941,11 +105942,11 @@ void m68000_device::sls_das_df() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105965,7 +105966,7 @@ void m68000_device::sls_das_df() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105975,7 +105976,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105999,7 +106000,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106027,7 +106028,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106050,14 +106051,14 @@ void m68000_device::sls_dais_df() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -106065,7 +106066,7 @@ void m68000_device::sls_dais_df() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106089,7 +106090,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106115,11 +106116,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106139,7 +106140,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106149,7 +106150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106173,7 +106174,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106201,7 +106202,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106228,7 +106229,7 @@ void m68000_device::sls_adr16_df() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106251,7 +106252,7 @@ void m68000_device::sls_adr16_df() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106272,7 +106273,7 @@ void m68000_device::sls_adr16_df() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106282,7 +106283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106306,7 +106307,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106334,7 +106335,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106359,7 +106360,7 @@ void m68000_device::sls_adr32_df() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106383,7 +106384,7 @@ void m68000_device::sls_adr32_df() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106406,7 +106407,7 @@ void m68000_device::sls_adr32_df() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106427,7 +106428,7 @@ void m68000_device::sls_adr32_df() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106437,7 +106438,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106461,7 +106462,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106489,7 +106490,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106516,7 +106517,7 @@ void m68000_device::scc_ds_df() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -106528,7 +106529,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106555,7 +106556,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106580,7 +106581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -106595,7 +106596,7 @@ void m68000_device::dbcc_ds_rel16_df() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -106607,13 +106608,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106641,7 +106642,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -106649,7 +106650,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106673,11 +106674,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106707,13 +106708,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106743,7 +106744,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106774,11 +106775,11 @@ void m68000_device::scc_ais_df() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106798,7 +106799,7 @@ void m68000_device::scc_ais_df() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106808,7 +106809,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106832,7 +106833,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106860,7 +106861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106888,12 +106889,12 @@ void m68000_device::scc_aips_df() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106914,7 +106915,7 @@ void m68000_device::scc_aips_df() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106924,7 +106925,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106948,7 +106949,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106976,7 +106977,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107003,7 +107004,7 @@ void m68000_device::scc_pais_df() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -107011,7 +107012,7 @@ void m68000_device::scc_pais_df() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107032,7 +107033,7 @@ void m68000_device::scc_pais_df() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107042,7 +107043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107066,7 +107067,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107094,7 +107095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107119,7 +107120,7 @@ void m68000_device::scc_das_df() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107142,11 +107143,11 @@ void m68000_device::scc_das_df() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107166,7 +107167,7 @@ void m68000_device::scc_das_df() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107176,7 +107177,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107200,7 +107201,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107228,7 +107229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107251,14 +107252,14 @@ void m68000_device::scc_dais_df() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -107266,7 +107267,7 @@ void m68000_device::scc_dais_df() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107290,7 +107291,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107316,11 +107317,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107340,7 +107341,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107350,7 +107351,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107374,7 +107375,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107402,7 +107403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107429,7 +107430,7 @@ void m68000_device::scc_adr16_df() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107452,7 +107453,7 @@ void m68000_device::scc_adr16_df() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107473,7 +107474,7 @@ void m68000_device::scc_adr16_df() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107483,7 +107484,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107507,7 +107508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107535,7 +107536,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107560,7 +107561,7 @@ void m68000_device::scc_adr32_df() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107584,7 +107585,7 @@ void m68000_device::scc_adr32_df() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107607,7 +107608,7 @@ void m68000_device::scc_adr32_df() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107628,7 +107629,7 @@ void m68000_device::scc_adr32_df() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107638,7 +107639,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107662,7 +107663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107690,7 +107691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107717,7 +107718,7 @@ void m68000_device::scs_ds_df() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -107729,7 +107730,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107756,7 +107757,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107781,7 +107782,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -107796,7 +107797,7 @@ void m68000_device::dbcs_ds_rel16_df() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -107808,13 +107809,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107842,7 +107843,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -107850,7 +107851,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107874,11 +107875,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107908,13 +107909,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107944,7 +107945,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107975,11 +107976,11 @@ void m68000_device::scs_ais_df() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107999,7 +108000,7 @@ void m68000_device::scs_ais_df() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108009,7 +108010,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108033,7 +108034,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108061,7 +108062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108089,12 +108090,12 @@ void m68000_device::scs_aips_df() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108115,7 +108116,7 @@ void m68000_device::scs_aips_df() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108125,7 +108126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108149,7 +108150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108177,7 +108178,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108204,7 +108205,7 @@ void m68000_device::scs_pais_df() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -108212,7 +108213,7 @@ void m68000_device::scs_pais_df() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108233,7 +108234,7 @@ void m68000_device::scs_pais_df() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108243,7 +108244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108267,7 +108268,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108295,7 +108296,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108320,7 +108321,7 @@ void m68000_device::scs_das_df() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108343,11 +108344,11 @@ void m68000_device::scs_das_df() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108367,7 +108368,7 @@ void m68000_device::scs_das_df() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108377,7 +108378,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108401,7 +108402,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108429,7 +108430,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108452,14 +108453,14 @@ void m68000_device::scs_dais_df() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -108467,7 +108468,7 @@ void m68000_device::scs_dais_df() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108491,7 +108492,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108517,11 +108518,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108541,7 +108542,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108551,7 +108552,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108575,7 +108576,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108603,7 +108604,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108630,7 +108631,7 @@ void m68000_device::scs_adr16_df() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108653,7 +108654,7 @@ void m68000_device::scs_adr16_df() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108674,7 +108675,7 @@ void m68000_device::scs_adr16_df() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108684,7 +108685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108708,7 +108709,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108736,7 +108737,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108761,7 +108762,7 @@ void m68000_device::scs_adr32_df() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108785,7 +108786,7 @@ void m68000_device::scs_adr32_df() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108808,7 +108809,7 @@ void m68000_device::scs_adr32_df() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108829,7 +108830,7 @@ void m68000_device::scs_adr32_df() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108839,7 +108840,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108863,7 +108864,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108891,7 +108892,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108918,7 +108919,7 @@ void m68000_device::sne_ds_df() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -108930,7 +108931,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108957,7 +108958,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108982,7 +108983,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -108997,7 +108998,7 @@ void m68000_device::dbne_ds_rel16_df() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -109009,13 +109010,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109043,7 +109044,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -109051,7 +109052,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109075,11 +109076,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109109,13 +109110,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109145,7 +109146,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109176,11 +109177,11 @@ void m68000_device::sne_ais_df() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109200,7 +109201,7 @@ void m68000_device::sne_ais_df() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109210,7 +109211,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109234,7 +109235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109262,7 +109263,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109290,12 +109291,12 @@ void m68000_device::sne_aips_df() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109316,7 +109317,7 @@ void m68000_device::sne_aips_df() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109326,7 +109327,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109350,7 +109351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109378,7 +109379,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109405,7 +109406,7 @@ void m68000_device::sne_pais_df() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -109413,7 +109414,7 @@ void m68000_device::sne_pais_df() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109434,7 +109435,7 @@ void m68000_device::sne_pais_df() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109444,7 +109445,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109468,7 +109469,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109496,7 +109497,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109521,7 +109522,7 @@ void m68000_device::sne_das_df() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109544,11 +109545,11 @@ void m68000_device::sne_das_df() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109568,7 +109569,7 @@ void m68000_device::sne_das_df() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109578,7 +109579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109602,7 +109603,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109630,7 +109631,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109653,14 +109654,14 @@ void m68000_device::sne_dais_df() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -109668,7 +109669,7 @@ void m68000_device::sne_dais_df() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109692,7 +109693,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109718,11 +109719,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109742,7 +109743,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109752,7 +109753,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109776,7 +109777,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109804,7 +109805,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109831,7 +109832,7 @@ void m68000_device::sne_adr16_df() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109854,7 +109855,7 @@ void m68000_device::sne_adr16_df() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109875,7 +109876,7 @@ void m68000_device::sne_adr16_df() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109885,7 +109886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109909,7 +109910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109937,7 +109938,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109962,7 +109963,7 @@ void m68000_device::sne_adr32_df() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109986,7 +109987,7 @@ void m68000_device::sne_adr32_df() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110009,7 +110010,7 @@ void m68000_device::sne_adr32_df() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110030,7 +110031,7 @@ void m68000_device::sne_adr32_df() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110040,7 +110041,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110064,7 +110065,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110092,7 +110093,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110119,7 +110120,7 @@ void m68000_device::seq_ds_df() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -110131,7 +110132,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110158,7 +110159,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110183,7 +110184,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -110198,7 +110199,7 @@ void m68000_device::dbeq_ds_rel16_df() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -110210,13 +110211,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110244,7 +110245,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -110252,7 +110253,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110276,11 +110277,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110310,13 +110311,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110346,7 +110347,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110377,11 +110378,11 @@ void m68000_device::seq_ais_df() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110401,7 +110402,7 @@ void m68000_device::seq_ais_df() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110411,7 +110412,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110435,7 +110436,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110463,7 +110464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110491,12 +110492,12 @@ void m68000_device::seq_aips_df() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110517,7 +110518,7 @@ void m68000_device::seq_aips_df() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110527,7 +110528,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110551,7 +110552,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110579,7 +110580,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110606,7 +110607,7 @@ void m68000_device::seq_pais_df() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -110614,7 +110615,7 @@ void m68000_device::seq_pais_df() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110635,7 +110636,7 @@ void m68000_device::seq_pais_df() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110645,7 +110646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110669,7 +110670,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110697,7 +110698,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110722,7 +110723,7 @@ void m68000_device::seq_das_df() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110745,11 +110746,11 @@ void m68000_device::seq_das_df() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110769,7 +110770,7 @@ void m68000_device::seq_das_df() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110779,7 +110780,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110803,7 +110804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110831,7 +110832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110854,14 +110855,14 @@ void m68000_device::seq_dais_df() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -110869,7 +110870,7 @@ void m68000_device::seq_dais_df() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110893,7 +110894,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110919,11 +110920,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110943,7 +110944,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110953,7 +110954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110977,7 +110978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111005,7 +111006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111032,7 +111033,7 @@ void m68000_device::seq_adr16_df() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111055,7 +111056,7 @@ void m68000_device::seq_adr16_df() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111076,7 +111077,7 @@ void m68000_device::seq_adr16_df() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111086,7 +111087,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111110,7 +111111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111138,7 +111139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111163,7 +111164,7 @@ void m68000_device::seq_adr32_df() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111187,7 +111188,7 @@ void m68000_device::seq_adr32_df() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111210,7 +111211,7 @@ void m68000_device::seq_adr32_df() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111231,7 +111232,7 @@ void m68000_device::seq_adr32_df() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111241,7 +111242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111265,7 +111266,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111293,7 +111294,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111320,7 +111321,7 @@ void m68000_device::svc_ds_df() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -111332,7 +111333,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111359,7 +111360,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111384,7 +111385,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -111399,7 +111400,7 @@ void m68000_device::dbvc_ds_rel16_df() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -111411,13 +111412,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111445,7 +111446,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -111453,7 +111454,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111477,11 +111478,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111511,13 +111512,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111547,7 +111548,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111578,11 +111579,11 @@ void m68000_device::svc_ais_df() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111602,7 +111603,7 @@ void m68000_device::svc_ais_df() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111612,7 +111613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111636,7 +111637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111664,7 +111665,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111692,12 +111693,12 @@ void m68000_device::svc_aips_df() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111718,7 +111719,7 @@ void m68000_device::svc_aips_df() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111728,7 +111729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111752,7 +111753,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111780,7 +111781,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111807,7 +111808,7 @@ void m68000_device::svc_pais_df() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -111815,7 +111816,7 @@ void m68000_device::svc_pais_df() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111836,7 +111837,7 @@ void m68000_device::svc_pais_df() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111846,7 +111847,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111870,7 +111871,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111898,7 +111899,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111923,7 +111924,7 @@ void m68000_device::svc_das_df() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111946,11 +111947,11 @@ void m68000_device::svc_das_df() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111970,7 +111971,7 @@ void m68000_device::svc_das_df() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111980,7 +111981,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112004,7 +112005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112032,7 +112033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112055,14 +112056,14 @@ void m68000_device::svc_dais_df() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -112070,7 +112071,7 @@ void m68000_device::svc_dais_df() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112094,7 +112095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112120,11 +112121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112144,7 +112145,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112154,7 +112155,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112178,7 +112179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112206,7 +112207,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112233,7 +112234,7 @@ void m68000_device::svc_adr16_df() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112256,7 +112257,7 @@ void m68000_device::svc_adr16_df() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112277,7 +112278,7 @@ void m68000_device::svc_adr16_df() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112287,7 +112288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112311,7 +112312,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112339,7 +112340,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112364,7 +112365,7 @@ void m68000_device::svc_adr32_df() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112388,7 +112389,7 @@ void m68000_device::svc_adr32_df() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112411,7 +112412,7 @@ void m68000_device::svc_adr32_df() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112432,7 +112433,7 @@ void m68000_device::svc_adr32_df() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112442,7 +112443,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112466,7 +112467,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112494,7 +112495,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112521,7 +112522,7 @@ void m68000_device::svs_ds_df() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112533,7 +112534,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112560,7 +112561,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112585,7 +112586,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112600,7 +112601,7 @@ void m68000_device::dbvs_ds_rel16_df() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112612,13 +112613,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112646,7 +112647,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112654,7 +112655,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112678,11 +112679,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112712,13 +112713,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112748,7 +112749,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112779,11 +112780,11 @@ void m68000_device::svs_ais_df() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112803,7 +112804,7 @@ void m68000_device::svs_ais_df() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112813,7 +112814,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112837,7 +112838,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112865,7 +112866,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112893,12 +112894,12 @@ void m68000_device::svs_aips_df() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112919,7 +112920,7 @@ void m68000_device::svs_aips_df() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112929,7 +112930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112953,7 +112954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112981,7 +112982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113008,7 +113009,7 @@ void m68000_device::svs_pais_df() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113016,7 +113017,7 @@ void m68000_device::svs_pais_df() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113037,7 +113038,7 @@ void m68000_device::svs_pais_df() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113047,7 +113048,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113071,7 +113072,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113099,7 +113100,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113124,7 +113125,7 @@ void m68000_device::svs_das_df() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113147,11 +113148,11 @@ void m68000_device::svs_das_df() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113171,7 +113172,7 @@ void m68000_device::svs_das_df() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113181,7 +113182,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113205,7 +113206,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113233,7 +113234,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113256,14 +113257,14 @@ void m68000_device::svs_dais_df() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113271,7 +113272,7 @@ void m68000_device::svs_dais_df() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113295,7 +113296,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113321,11 +113322,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113345,7 +113346,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113355,7 +113356,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113379,7 +113380,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113407,7 +113408,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113434,7 +113435,7 @@ void m68000_device::svs_adr16_df() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113457,7 +113458,7 @@ void m68000_device::svs_adr16_df() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113478,7 +113479,7 @@ void m68000_device::svs_adr16_df() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113488,7 +113489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113512,7 +113513,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113540,7 +113541,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113565,7 +113566,7 @@ void m68000_device::svs_adr32_df() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113589,7 +113590,7 @@ void m68000_device::svs_adr32_df() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113612,7 +113613,7 @@ void m68000_device::svs_adr32_df() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113633,7 +113634,7 @@ void m68000_device::svs_adr32_df() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113643,7 +113644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113667,7 +113668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113695,7 +113696,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113722,7 +113723,7 @@ void m68000_device::spl_ds_df() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -113734,7 +113735,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113761,7 +113762,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113786,7 +113787,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -113801,7 +113802,7 @@ void m68000_device::dbpl_ds_rel16_df() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -113813,13 +113814,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113847,7 +113848,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -113855,7 +113856,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113879,11 +113880,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113913,13 +113914,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113949,7 +113950,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113980,11 +113981,11 @@ void m68000_device::spl_ais_df() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114004,7 +114005,7 @@ void m68000_device::spl_ais_df() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114014,7 +114015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114038,7 +114039,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114066,7 +114067,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114094,12 +114095,12 @@ void m68000_device::spl_aips_df() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114120,7 +114121,7 @@ void m68000_device::spl_aips_df() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114130,7 +114131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114154,7 +114155,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114182,7 +114183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114209,7 +114210,7 @@ void m68000_device::spl_pais_df() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114217,7 +114218,7 @@ void m68000_device::spl_pais_df() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114238,7 +114239,7 @@ void m68000_device::spl_pais_df() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114248,7 +114249,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114272,7 +114273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114300,7 +114301,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114325,7 +114326,7 @@ void m68000_device::spl_das_df() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114348,11 +114349,11 @@ void m68000_device::spl_das_df() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114372,7 +114373,7 @@ void m68000_device::spl_das_df() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114382,7 +114383,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114406,7 +114407,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114434,7 +114435,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114457,14 +114458,14 @@ void m68000_device::spl_dais_df() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114472,7 +114473,7 @@ void m68000_device::spl_dais_df() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114496,7 +114497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114522,11 +114523,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114546,7 +114547,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114556,7 +114557,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114580,7 +114581,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114608,7 +114609,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114635,7 +114636,7 @@ void m68000_device::spl_adr16_df() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114658,7 +114659,7 @@ void m68000_device::spl_adr16_df() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114679,7 +114680,7 @@ void m68000_device::spl_adr16_df() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114689,7 +114690,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114713,7 +114714,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114741,7 +114742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114766,7 +114767,7 @@ void m68000_device::spl_adr32_df() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114790,7 +114791,7 @@ void m68000_device::spl_adr32_df() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114813,7 +114814,7 @@ void m68000_device::spl_adr32_df() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114834,7 +114835,7 @@ void m68000_device::spl_adr32_df() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114844,7 +114845,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114868,7 +114869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114896,7 +114897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114923,7 +114924,7 @@ void m68000_device::smi_ds_df() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -114935,7 +114936,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114962,7 +114963,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114987,7 +114988,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -115002,7 +115003,7 @@ void m68000_device::dbmi_ds_rel16_df() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -115014,13 +115015,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115048,7 +115049,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -115056,7 +115057,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115080,11 +115081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115114,13 +115115,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115150,7 +115151,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115181,11 +115182,11 @@ void m68000_device::smi_ais_df() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115205,7 +115206,7 @@ void m68000_device::smi_ais_df() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115215,7 +115216,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115239,7 +115240,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115267,7 +115268,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115295,12 +115296,12 @@ void m68000_device::smi_aips_df() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115321,7 +115322,7 @@ void m68000_device::smi_aips_df() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115331,7 +115332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115355,7 +115356,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115383,7 +115384,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115410,7 +115411,7 @@ void m68000_device::smi_pais_df() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115418,7 +115419,7 @@ void m68000_device::smi_pais_df() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115439,7 +115440,7 @@ void m68000_device::smi_pais_df() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115449,7 +115450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115473,7 +115474,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115501,7 +115502,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115526,7 +115527,7 @@ void m68000_device::smi_das_df() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115549,11 +115550,11 @@ void m68000_device::smi_das_df() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115573,7 +115574,7 @@ void m68000_device::smi_das_df() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115583,7 +115584,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115607,7 +115608,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115635,7 +115636,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115658,14 +115659,14 @@ void m68000_device::smi_dais_df() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115673,7 +115674,7 @@ void m68000_device::smi_dais_df() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115697,7 +115698,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115723,11 +115724,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115747,7 +115748,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115757,7 +115758,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115781,7 +115782,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115809,7 +115810,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115836,7 +115837,7 @@ void m68000_device::smi_adr16_df() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115859,7 +115860,7 @@ void m68000_device::smi_adr16_df() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115880,7 +115881,7 @@ void m68000_device::smi_adr16_df() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115890,7 +115891,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115914,7 +115915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115942,7 +115943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115967,7 +115968,7 @@ void m68000_device::smi_adr32_df() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115991,7 +115992,7 @@ void m68000_device::smi_adr32_df() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116014,7 +116015,7 @@ void m68000_device::smi_adr32_df() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116035,7 +116036,7 @@ void m68000_device::smi_adr32_df() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116045,7 +116046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116069,7 +116070,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116097,7 +116098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116124,7 +116125,7 @@ void m68000_device::sge_ds_df() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -116136,7 +116137,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116163,7 +116164,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116188,7 +116189,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116203,7 +116204,7 @@ void m68000_device::dbge_ds_rel16_df() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -116215,13 +116216,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116249,7 +116250,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -116257,7 +116258,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116281,11 +116282,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116315,13 +116316,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116351,7 +116352,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116382,11 +116383,11 @@ void m68000_device::sge_ais_df() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116406,7 +116407,7 @@ void m68000_device::sge_ais_df() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116416,7 +116417,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116440,7 +116441,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116468,7 +116469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116496,12 +116497,12 @@ void m68000_device::sge_aips_df() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116522,7 +116523,7 @@ void m68000_device::sge_aips_df() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116532,7 +116533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116556,7 +116557,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116584,7 +116585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116611,7 +116612,7 @@ void m68000_device::sge_pais_df() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116619,7 +116620,7 @@ void m68000_device::sge_pais_df() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116640,7 +116641,7 @@ void m68000_device::sge_pais_df() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116650,7 +116651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116674,7 +116675,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116702,7 +116703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116727,7 +116728,7 @@ void m68000_device::sge_das_df() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116750,11 +116751,11 @@ void m68000_device::sge_das_df() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116774,7 +116775,7 @@ void m68000_device::sge_das_df() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116784,7 +116785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116808,7 +116809,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116836,7 +116837,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116859,14 +116860,14 @@ void m68000_device::sge_dais_df() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -116874,7 +116875,7 @@ void m68000_device::sge_dais_df() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116898,7 +116899,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116924,11 +116925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116948,7 +116949,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116958,7 +116959,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116982,7 +116983,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117010,7 +117011,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117037,7 +117038,7 @@ void m68000_device::sge_adr16_df() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117060,7 +117061,7 @@ void m68000_device::sge_adr16_df() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117081,7 +117082,7 @@ void m68000_device::sge_adr16_df() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117091,7 +117092,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117115,7 +117116,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117143,7 +117144,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117168,7 +117169,7 @@ void m68000_device::sge_adr32_df() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117192,7 +117193,7 @@ void m68000_device::sge_adr32_df() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117215,7 +117216,7 @@ void m68000_device::sge_adr32_df() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117236,7 +117237,7 @@ void m68000_device::sge_adr32_df() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117246,7 +117247,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117270,7 +117271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117298,7 +117299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117325,7 +117326,7 @@ void m68000_device::slt_ds_df() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117337,7 +117338,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117364,7 +117365,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117389,7 +117390,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117404,7 +117405,7 @@ void m68000_device::dblt_ds_rel16_df() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117416,13 +117417,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117450,7 +117451,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117458,7 +117459,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117482,11 +117483,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117516,13 +117517,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117552,7 +117553,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117583,11 +117584,11 @@ void m68000_device::slt_ais_df() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117607,7 +117608,7 @@ void m68000_device::slt_ais_df() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117617,7 +117618,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117641,7 +117642,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117669,7 +117670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117697,12 +117698,12 @@ void m68000_device::slt_aips_df() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117723,7 +117724,7 @@ void m68000_device::slt_aips_df() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117733,7 +117734,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117757,7 +117758,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117785,7 +117786,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117812,7 +117813,7 @@ void m68000_device::slt_pais_df() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117820,7 +117821,7 @@ void m68000_device::slt_pais_df() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117841,7 +117842,7 @@ void m68000_device::slt_pais_df() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117851,7 +117852,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117875,7 +117876,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117903,7 +117904,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117928,7 +117929,7 @@ void m68000_device::slt_das_df() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117951,11 +117952,11 @@ void m68000_device::slt_das_df() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117975,7 +117976,7 @@ void m68000_device::slt_das_df() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117985,7 +117986,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118009,7 +118010,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118037,7 +118038,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118060,14 +118061,14 @@ void m68000_device::slt_dais_df() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118075,7 +118076,7 @@ void m68000_device::slt_dais_df() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118099,7 +118100,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118125,11 +118126,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118149,7 +118150,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118159,7 +118160,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118183,7 +118184,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118211,7 +118212,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118238,7 +118239,7 @@ void m68000_device::slt_adr16_df() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118261,7 +118262,7 @@ void m68000_device::slt_adr16_df() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118282,7 +118283,7 @@ void m68000_device::slt_adr16_df() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118316,7 +118317,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118344,7 +118345,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118369,7 +118370,7 @@ void m68000_device::slt_adr32_df() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118393,7 +118394,7 @@ void m68000_device::slt_adr32_df() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118416,7 +118417,7 @@ void m68000_device::slt_adr32_df() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118437,7 +118438,7 @@ void m68000_device::slt_adr32_df() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118447,7 +118448,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118471,7 +118472,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118499,7 +118500,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118526,7 +118527,7 @@ void m68000_device::sgt_ds_df() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118538,7 +118539,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118565,7 +118566,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118590,7 +118591,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118605,7 +118606,7 @@ void m68000_device::dbgt_ds_rel16_df() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118617,13 +118618,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118651,7 +118652,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118659,7 +118660,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118683,11 +118684,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118717,13 +118718,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118753,7 +118754,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118784,11 +118785,11 @@ void m68000_device::sgt_ais_df() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118808,7 +118809,7 @@ void m68000_device::sgt_ais_df() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118818,7 +118819,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118842,7 +118843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118870,7 +118871,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118898,12 +118899,12 @@ void m68000_device::sgt_aips_df() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118924,7 +118925,7 @@ void m68000_device::sgt_aips_df() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118934,7 +118935,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118958,7 +118959,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118986,7 +118987,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119013,7 +119014,7 @@ void m68000_device::sgt_pais_df() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119021,7 +119022,7 @@ void m68000_device::sgt_pais_df() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119042,7 +119043,7 @@ void m68000_device::sgt_pais_df() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119052,7 +119053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119076,7 +119077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119104,7 +119105,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119129,7 +119130,7 @@ void m68000_device::sgt_das_df() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119152,11 +119153,11 @@ void m68000_device::sgt_das_df() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119176,7 +119177,7 @@ void m68000_device::sgt_das_df() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119186,7 +119187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119210,7 +119211,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119238,7 +119239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119261,14 +119262,14 @@ void m68000_device::sgt_dais_df() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119276,7 +119277,7 @@ void m68000_device::sgt_dais_df() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119300,7 +119301,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119326,11 +119327,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119350,7 +119351,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119360,7 +119361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119384,7 +119385,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119412,7 +119413,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119439,7 +119440,7 @@ void m68000_device::sgt_adr16_df() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119462,7 +119463,7 @@ void m68000_device::sgt_adr16_df() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119483,7 +119484,7 @@ void m68000_device::sgt_adr16_df() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119493,7 +119494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119545,7 +119546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119570,7 +119571,7 @@ void m68000_device::sgt_adr32_df() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119594,7 +119595,7 @@ void m68000_device::sgt_adr32_df() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119617,7 +119618,7 @@ void m68000_device::sgt_adr32_df() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119638,7 +119639,7 @@ void m68000_device::sgt_adr32_df() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119648,7 +119649,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119672,7 +119673,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119700,7 +119701,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119727,7 +119728,7 @@ void m68000_device::sle_ds_df() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119739,7 +119740,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119766,7 +119767,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119791,7 +119792,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119806,7 +119807,7 @@ void m68000_device::dble_ds_rel16_df() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -119818,13 +119819,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119852,7 +119853,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -119860,7 +119861,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119884,11 +119885,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119918,13 +119919,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119954,7 +119955,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119985,11 +119986,11 @@ void m68000_device::sle_ais_df() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120009,7 +120010,7 @@ void m68000_device::sle_ais_df() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120019,7 +120020,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120043,7 +120044,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120071,7 +120072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120099,12 +120100,12 @@ void m68000_device::sle_aips_df() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120125,7 +120126,7 @@ void m68000_device::sle_aips_df() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120135,7 +120136,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120159,7 +120160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120187,7 +120188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120214,7 +120215,7 @@ void m68000_device::sle_pais_df() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120222,7 +120223,7 @@ void m68000_device::sle_pais_df() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120243,7 +120244,7 @@ void m68000_device::sle_pais_df() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120253,7 +120254,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120277,7 +120278,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120305,7 +120306,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120330,7 +120331,7 @@ void m68000_device::sle_das_df() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120353,11 +120354,11 @@ void m68000_device::sle_das_df() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120377,7 +120378,7 @@ void m68000_device::sle_das_df() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120387,7 +120388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120411,7 +120412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120439,7 +120440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120462,14 +120463,14 @@ void m68000_device::sle_dais_df() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120477,7 +120478,7 @@ void m68000_device::sle_dais_df() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120501,7 +120502,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120527,11 +120528,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120551,7 +120552,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120561,7 +120562,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120585,7 +120586,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120613,7 +120614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120640,7 +120641,7 @@ void m68000_device::sle_adr16_df() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120663,7 +120664,7 @@ void m68000_device::sle_adr16_df() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120684,7 +120685,7 @@ void m68000_device::sle_adr16_df() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120694,7 +120695,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120718,7 +120719,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120746,7 +120747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120771,7 +120772,7 @@ void m68000_device::sle_adr32_df() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120795,7 +120796,7 @@ void m68000_device::sle_adr32_df() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120818,7 +120819,7 @@ void m68000_device::sle_adr32_df() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120839,7 +120840,7 @@ void m68000_device::sle_adr32_df() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120849,7 +120850,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120873,7 +120874,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120901,7 +120902,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -121102,7 +121103,7 @@ void m68000_device::bsr_rel16_df() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -121209,7 +121210,7 @@ void m68000_device::bsr_rel8_df() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -123811,7 +123812,7 @@ void m68000_device::moveq_imm8o_dd_df() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -123851,7 +123852,7 @@ void m68000_device::or_b_ds_dd_df() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123859,7 +123860,7 @@ void m68000_device::or_b_ds_dd_df() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -123892,11 +123893,11 @@ void m68000_device::or_b_ais_dd_df() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -123916,7 +123917,7 @@ void m68000_device::or_b_ais_dd_df() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123924,7 +123925,7 @@ void m68000_device::or_b_ais_dd_df() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -123960,12 +123961,12 @@ void m68000_device::or_b_aips_dd_df() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123986,7 +123987,7 @@ void m68000_device::or_b_aips_dd_df() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123994,7 +123995,7 @@ void m68000_device::or_b_aips_dd_df() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124029,7 +124030,7 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124037,7 +124038,7 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124058,7 +124059,7 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124066,7 +124067,7 @@ void m68000_device::or_b_pais_dd_df() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124099,7 +124100,7 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124122,11 +124123,11 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124146,7 +124147,7 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124154,7 +124155,7 @@ void m68000_device::or_b_das_dd_df() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124185,14 +124186,14 @@ void m68000_device::or_b_dais_dd_df() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124200,7 +124201,7 @@ void m68000_device::or_b_dais_dd_df() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124224,7 +124225,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124250,11 +124251,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124274,7 +124275,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124282,7 +124283,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124317,7 +124318,7 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124340,7 +124341,7 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124361,7 +124362,7 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124369,7 +124370,7 @@ void m68000_device::or_b_adr16_dd_df() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124402,7 +124403,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124426,7 +124427,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124449,7 +124450,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124470,7 +124471,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124478,7 +124479,7 @@ void m68000_device::or_b_adr32_dd_df() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124510,7 +124511,7 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124533,11 +124534,11 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124557,7 +124558,7 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124565,7 +124566,7 @@ void m68000_device::or_b_dpc_dd_df() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124595,14 +124596,14 @@ void m68000_device::or_b_dpci_dd_df() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124610,7 +124611,7 @@ void m68000_device::or_b_dpci_dd_df() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124634,7 +124635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124660,11 +124661,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124684,7 +124685,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124692,7 +124693,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124727,7 +124728,7 @@ void m68000_device::or_b_imm8_dd_df() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124751,7 +124752,7 @@ void m68000_device::or_b_imm8_dd_df() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124759,7 +124760,7 @@ void m68000_device::or_b_imm8_dd_df() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124794,7 +124795,7 @@ void m68000_device::or_w_ds_dd_df() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124802,7 +124803,7 @@ void m68000_device::or_w_ds_dd_df() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124835,11 +124836,11 @@ void m68000_device::or_w_ais_dd_df() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124862,7 +124863,7 @@ void m68000_device::or_w_ais_dd_df() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124870,7 +124871,7 @@ void m68000_device::or_w_ais_dd_df() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124906,12 +124907,12 @@ void m68000_device::or_w_aips_dd_df() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -124935,7 +124936,7 @@ void m68000_device::or_w_aips_dd_df() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124943,7 +124944,7 @@ void m68000_device::or_w_aips_dd_df() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124978,7 +124979,7 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124986,7 +124987,7 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125010,7 +125011,7 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125018,7 +125019,7 @@ void m68000_device::or_w_pais_dd_df() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125051,7 +125052,7 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125074,11 +125075,11 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125101,7 +125102,7 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125109,7 +125110,7 @@ void m68000_device::or_w_das_dd_df() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125140,14 +125141,14 @@ void m68000_device::or_w_dais_dd_df() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125155,7 +125156,7 @@ void m68000_device::or_w_dais_dd_df() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125179,7 +125180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125205,11 +125206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125232,7 +125233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125240,7 +125241,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125275,7 +125276,7 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125298,7 +125299,7 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125322,7 +125323,7 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125330,7 +125331,7 @@ void m68000_device::or_w_adr16_dd_df() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125363,7 +125364,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125387,7 +125388,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125410,7 +125411,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125434,7 +125435,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125442,7 +125443,7 @@ void m68000_device::or_w_adr32_dd_df() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125474,7 +125475,7 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125497,11 +125498,11 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125524,7 +125525,7 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125532,7 +125533,7 @@ void m68000_device::or_w_dpc_dd_df() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125562,14 +125563,14 @@ void m68000_device::or_w_dpci_dd_df() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125577,7 +125578,7 @@ void m68000_device::or_w_dpci_dd_df() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125601,7 +125602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125627,11 +125628,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125654,7 +125655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125662,7 +125663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125697,7 +125698,7 @@ void m68000_device::or_w_imm16_dd_df() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125721,7 +125722,7 @@ void m68000_device::or_w_imm16_dd_df() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125729,7 +125730,7 @@ void m68000_device::or_w_imm16_dd_df() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125764,12 +125765,12 @@ void m68000_device::or_l_ds_dd_df() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125789,7 +125790,7 @@ void m68000_device::or_l_ds_dd_df() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -125798,7 +125799,7 @@ void m68000_device::or_l_ds_dd_df() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125814,7 +125815,7 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125839,7 +125840,7 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125862,12 +125863,12 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125893,7 +125894,7 @@ void m68000_device::or_l_ais_dd_df() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125909,7 +125910,7 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125934,11 +125935,11 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125961,12 +125962,12 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125992,7 +125993,7 @@ void m68000_device::or_l_aips_dd_df() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126007,14 +126008,14 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126038,7 +126039,7 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126061,12 +126062,12 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126092,7 +126093,7 @@ void m68000_device::or_l_pais_dd_df() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126108,7 +126109,7 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126130,7 +126131,7 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126155,7 +126156,7 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126178,12 +126179,12 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126209,7 +126210,7 @@ void m68000_device::or_l_das_dd_df() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126223,14 +126224,14 @@ void m68000_device::or_l_dais_dd_df() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126238,7 +126239,7 @@ void m68000_device::or_l_dais_dd_df() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126262,7 +126263,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126287,7 +126288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126312,7 +126313,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126335,12 +126336,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126366,7 +126367,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126384,7 +126385,7 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126407,7 +126408,7 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126432,7 +126433,7 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126455,12 +126456,12 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126486,7 +126487,7 @@ void m68000_device::or_l_adr16_dd_df() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126502,7 +126503,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126526,7 +126527,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126549,7 +126550,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126574,7 +126575,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126597,12 +126598,12 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126628,7 +126629,7 @@ void m68000_device::or_l_adr32_dd_df() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126643,7 +126644,7 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126665,7 +126666,7 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126690,7 +126691,7 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126713,12 +126714,12 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126744,7 +126745,7 @@ void m68000_device::or_l_dpc_dd_df() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126757,14 +126758,14 @@ void m68000_device::or_l_dpci_dd_df() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126772,7 +126773,7 @@ void m68000_device::or_l_dpci_dd_df() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126796,7 +126797,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126821,7 +126822,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126846,7 +126847,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126869,12 +126870,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126900,7 +126901,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126916,7 +126917,7 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126940,7 +126941,7 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126964,12 +126965,12 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126989,7 +126990,7 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -126998,7 +126999,7 @@ void m68000_device::or_l_imm32_dd_df() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -127016,13 +127017,13 @@ void m68000_device::divu_w_ds_dd_df() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127035,7 +127036,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127053,7 +127054,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127061,7 +127062,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127086,7 +127087,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127109,7 +127110,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127230,7 +127231,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127260,7 +127261,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127271,7 +127272,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127283,7 +127284,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127303,7 +127304,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127314,7 +127315,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127324,13 +127325,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127341,7 +127342,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127351,7 +127352,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127359,7 +127360,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127394,7 +127395,7 @@ void m68000_device::divu_w_ais_dd_df() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -127420,13 +127421,13 @@ void m68000_device::divu_w_ais_dd_df() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127439,7 +127440,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127457,7 +127458,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127465,7 +127466,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127490,7 +127491,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127513,7 +127514,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127634,7 +127635,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127664,7 +127665,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127675,7 +127676,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127687,7 +127688,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127707,7 +127708,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127718,7 +127719,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127728,13 +127729,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127745,7 +127746,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127755,7 +127756,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127763,7 +127764,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127804,7 +127805,7 @@ void m68000_device::divu_w_aips_dd_df() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -127828,13 +127829,13 @@ void m68000_device::divu_w_aips_dd_df() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127847,7 +127848,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127865,7 +127866,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127873,7 +127874,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127898,7 +127899,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127921,7 +127922,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128042,7 +128043,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128072,7 +128073,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128083,7 +128084,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128095,7 +128096,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128115,7 +128116,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128126,7 +128127,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128136,13 +128137,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128153,7 +128154,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128163,7 +128164,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128171,7 +128172,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128214,7 +128215,7 @@ void m68000_device::divu_w_pais_dd_df() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -128238,13 +128239,13 @@ void m68000_device::divu_w_pais_dd_df() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128257,7 +128258,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128275,7 +128276,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128283,7 +128284,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128308,7 +128309,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128331,7 +128332,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128452,7 +128453,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128482,7 +128483,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128493,7 +128494,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128505,7 +128506,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128525,7 +128526,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128536,7 +128537,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128546,13 +128547,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128563,7 +128564,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128573,7 +128574,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128581,7 +128582,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128638,7 +128639,7 @@ void m68000_device::divu_w_das_dd_df() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -128664,13 +128665,13 @@ void m68000_device::divu_w_das_dd_df() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128683,7 +128684,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128701,7 +128702,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128709,7 +128710,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128734,7 +128735,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128757,7 +128758,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128878,7 +128879,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128908,7 +128909,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128919,7 +128920,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128931,7 +128932,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128951,7 +128952,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128962,7 +128963,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128972,13 +128973,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128989,7 +128990,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128999,7 +129000,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129007,7 +129008,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129040,7 +129041,7 @@ void m68000_device::divu_w_dais_dd_df() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129102,7 +129103,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -129128,13 +129129,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129147,7 +129148,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129165,7 +129166,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129173,7 +129174,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129198,7 +129199,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129221,7 +129222,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129342,7 +129343,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129372,7 +129373,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129383,7 +129384,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129395,7 +129396,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129415,7 +129416,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129426,7 +129427,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129436,13 +129437,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129453,7 +129454,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129463,7 +129464,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129471,7 +129472,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129529,7 +129530,7 @@ void m68000_device::divu_w_adr16_dd_df() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -129553,13 +129554,13 @@ void m68000_device::divu_w_adr16_dd_df() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129572,7 +129573,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129590,7 +129591,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129598,7 +129599,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129623,7 +129624,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129646,7 +129647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129767,7 +129768,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129797,7 +129798,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129808,7 +129809,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129820,7 +129821,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129840,7 +129841,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129851,7 +129852,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129861,13 +129862,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129878,7 +129879,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129888,7 +129889,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129896,7 +129897,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129975,7 +129976,7 @@ void m68000_device::divu_w_adr32_dd_df() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -129999,13 +130000,13 @@ void m68000_device::divu_w_adr32_dd_df() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130018,7 +130019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130036,7 +130037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130044,7 +130045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130069,7 +130070,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130092,7 +130093,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130213,7 +130214,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130243,7 +130244,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130254,7 +130255,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130266,7 +130267,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130286,7 +130287,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130297,7 +130298,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130307,13 +130308,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130324,7 +130325,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130334,7 +130335,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130342,7 +130343,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130398,7 +130399,7 @@ void m68000_device::divu_w_dpc_dd_df() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130424,13 +130425,13 @@ void m68000_device::divu_w_dpc_dd_df() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130443,7 +130444,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130461,7 +130462,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130469,7 +130470,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130494,7 +130495,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130517,7 +130518,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130638,7 +130639,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130668,7 +130669,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130679,7 +130680,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130691,7 +130692,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130711,7 +130712,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130722,7 +130723,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130732,13 +130733,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130749,7 +130750,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130759,7 +130760,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130767,7 +130768,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130799,7 +130800,7 @@ void m68000_device::divu_w_dpci_dd_df() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130861,7 +130862,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130887,13 +130888,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130906,7 +130907,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130924,7 +130925,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130932,7 +130933,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130957,7 +130958,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130980,7 +130981,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131101,7 +131102,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131131,7 +131132,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131142,7 +131143,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131154,7 +131155,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131174,7 +131175,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131185,7 +131186,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131195,13 +131196,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131212,7 +131213,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131222,7 +131223,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131230,7 +131231,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131290,13 +131291,13 @@ void m68000_device::divu_w_imm16_dd_df() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -131309,7 +131310,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131327,7 +131328,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -131335,7 +131336,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131360,7 +131361,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131383,7 +131384,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131504,7 +131505,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131534,7 +131535,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131545,7 +131546,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131557,7 +131558,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131577,7 +131578,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131588,7 +131589,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131598,13 +131599,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131615,7 +131616,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131625,7 +131626,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131633,7 +131634,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131670,12 +131671,12 @@ void m68000_device::sbcd_ds_dd_df() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -131720,7 +131721,7 @@ void m68000_device::sbcd_pais_paid_df() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -131760,12 +131761,12 @@ void m68000_device::sbcd_pais_paid_df() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -131815,11 +131816,11 @@ void m68000_device::or_b_dd_ais_df() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -131839,7 +131840,7 @@ void m68000_device::or_b_dd_ais_df() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131866,7 +131867,7 @@ void m68000_device::or_b_dd_ais_df() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131895,12 +131896,12 @@ void m68000_device::or_b_dd_aips_df() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131921,7 +131922,7 @@ void m68000_device::or_b_dd_aips_df() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131948,7 +131949,7 @@ void m68000_device::or_b_dd_aips_df() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131976,7 +131977,7 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131984,7 +131985,7 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132005,7 +132006,7 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132032,7 +132033,7 @@ void m68000_device::or_b_dd_pais_df() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132058,7 +132059,7 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132081,11 +132082,11 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132105,7 +132106,7 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132132,7 +132133,7 @@ void m68000_device::or_b_dd_das_df() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132156,14 +132157,14 @@ void m68000_device::or_b_dd_dais_df() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132171,7 +132172,7 @@ void m68000_device::or_b_dd_dais_df() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132195,7 +132196,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132221,11 +132222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132245,7 +132246,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132272,7 +132273,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132300,7 +132301,7 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132323,7 +132324,7 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132344,7 +132345,7 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132371,7 +132372,7 @@ void m68000_device::or_b_dd_adr16_df() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132397,7 +132398,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132421,7 +132422,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132444,7 +132445,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132465,7 +132466,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132492,7 +132493,7 @@ void m68000_device::or_b_dd_adr32_df() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132518,11 +132519,11 @@ void m68000_device::or_w_dd_ais_df() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132545,7 +132546,7 @@ void m68000_device::or_w_dd_ais_df() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132572,7 +132573,7 @@ void m68000_device::or_w_dd_ais_df() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132606,12 +132607,12 @@ void m68000_device::or_w_dd_aips_df() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -132635,7 +132636,7 @@ void m68000_device::or_w_dd_aips_df() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132662,7 +132663,7 @@ void m68000_device::or_w_dd_aips_df() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132695,7 +132696,7 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132703,7 +132704,7 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -132727,7 +132728,7 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132754,7 +132755,7 @@ void m68000_device::or_w_dd_pais_df() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132785,7 +132786,7 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132808,11 +132809,11 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132835,7 +132836,7 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132862,7 +132863,7 @@ void m68000_device::or_w_dd_das_df() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132891,14 +132892,14 @@ void m68000_device::or_w_dd_dais_df() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132906,7 +132907,7 @@ void m68000_device::or_w_dd_dais_df() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132930,7 +132931,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132956,11 +132957,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132983,7 +132984,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133010,7 +133011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133043,7 +133044,7 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133066,7 +133067,7 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133090,7 +133091,7 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133117,7 +133118,7 @@ void m68000_device::or_w_dd_adr16_df() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133148,7 +133149,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133172,7 +133173,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133195,7 +133196,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133219,7 +133220,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133246,7 +133247,7 @@ void m68000_device::or_w_dd_adr32_df() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133277,7 +133278,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133302,7 +133303,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133325,7 +133326,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133350,7 +133351,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133375,7 +133376,7 @@ void m68000_device::or_l_dd_ais_df() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133406,7 +133407,7 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133431,11 +133432,11 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133458,7 +133459,7 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133483,7 +133484,7 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133508,7 +133509,7 @@ void m68000_device::or_l_dd_aips_df() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133538,14 +133539,14 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133569,7 +133570,7 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133592,7 +133593,7 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133617,7 +133618,7 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133642,7 +133643,7 @@ void m68000_device::or_l_dd_pais_df() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133673,7 +133674,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133695,7 +133696,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133720,7 +133721,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133743,7 +133744,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133768,7 +133769,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133793,7 +133794,7 @@ void m68000_device::or_l_dd_das_df() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133822,14 +133823,14 @@ void m68000_device::or_l_dd_dais_df() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -133837,7 +133838,7 @@ void m68000_device::or_l_dd_dais_df() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133861,7 +133862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133886,7 +133887,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133911,7 +133912,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133934,7 +133935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133959,7 +133960,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133984,7 +133985,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134017,7 +134018,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134040,7 +134041,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -134065,7 +134066,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134088,7 +134089,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134113,7 +134114,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134138,7 +134139,7 @@ void m68000_device::or_l_dd_adr16_df() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134169,7 +134170,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134193,7 +134194,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134216,7 +134217,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -134241,7 +134242,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134264,7 +134265,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134289,7 +134290,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134314,7 +134315,7 @@ void m68000_device::or_l_dd_adr32_df() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134347,13 +134348,13 @@ void m68000_device::divs_w_ds_dd_df() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134367,7 +134368,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134377,7 +134378,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134392,7 +134393,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134400,7 +134401,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134425,7 +134426,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134448,7 +134449,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134564,7 +134565,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -134573,7 +134574,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -134581,12 +134582,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134594,7 +134595,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134611,7 +134612,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -134619,7 +134620,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134649,7 +134650,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134676,13 +134677,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134690,27 +134691,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134722,7 +134723,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134734,7 +134735,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134749,7 +134750,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134758,7 +134759,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134766,7 +134767,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134776,7 +134777,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134785,7 +134786,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134797,7 +134798,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134845,7 +134846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -134858,7 +134859,7 @@ void m68000_device::divs_w_ais_dd_df() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -134884,13 +134885,13 @@ void m68000_device::divs_w_ais_dd_df() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134904,7 +134905,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134914,7 +134915,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134929,7 +134930,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134937,7 +134938,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134962,7 +134963,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134985,7 +134986,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135101,7 +135102,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135110,7 +135111,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135118,12 +135119,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135131,7 +135132,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135148,7 +135149,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135156,7 +135157,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135186,7 +135187,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135213,13 +135214,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135227,27 +135228,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135259,7 +135260,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135271,7 +135272,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135286,7 +135287,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135295,7 +135296,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135303,7 +135304,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135313,7 +135314,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135322,7 +135323,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135334,7 +135335,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135382,7 +135383,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135401,7 +135402,7 @@ void m68000_device::divs_w_aips_dd_df() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -135425,13 +135426,13 @@ void m68000_device::divs_w_aips_dd_df() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135445,7 +135446,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135455,7 +135456,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135470,7 +135471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -135478,7 +135479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135503,7 +135504,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135526,7 +135527,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135642,7 +135643,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135651,7 +135652,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135659,12 +135660,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135672,7 +135673,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135689,7 +135690,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135697,7 +135698,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135727,7 +135728,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135754,13 +135755,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135768,27 +135769,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135800,7 +135801,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135812,7 +135813,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135827,7 +135828,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135836,7 +135837,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135844,7 +135845,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135854,7 +135855,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135863,7 +135864,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135875,7 +135876,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135923,7 +135924,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135944,7 +135945,7 @@ void m68000_device::divs_w_pais_dd_df() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -135968,13 +135969,13 @@ void m68000_device::divs_w_pais_dd_df() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135988,7 +135989,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135998,7 +135999,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136013,7 +136014,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136021,7 +136022,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136046,7 +136047,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136069,7 +136070,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136185,7 +136186,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136194,7 +136195,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136202,12 +136203,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136215,7 +136216,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136232,7 +136233,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136240,7 +136241,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136270,7 +136271,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136297,13 +136298,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136311,27 +136312,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136343,7 +136344,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136355,7 +136356,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136370,7 +136371,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136379,7 +136380,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136387,7 +136388,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136397,7 +136398,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136406,7 +136407,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136418,7 +136419,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136466,7 +136467,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -136501,7 +136502,7 @@ void m68000_device::divs_w_das_dd_df() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -136527,13 +136528,13 @@ void m68000_device::divs_w_das_dd_df() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136547,7 +136548,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136557,7 +136558,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136572,7 +136573,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136580,7 +136581,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136605,7 +136606,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136628,7 +136629,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136744,7 +136745,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136753,7 +136754,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136761,12 +136762,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136774,7 +136775,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136791,7 +136792,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136799,7 +136800,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136829,7 +136830,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136856,13 +136857,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136870,27 +136871,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136902,7 +136903,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136914,7 +136915,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136929,7 +136930,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136938,7 +136939,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136946,7 +136947,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136956,7 +136957,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136965,7 +136966,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136977,7 +136978,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137025,7 +137026,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137036,7 +137037,7 @@ void m68000_device::divs_w_dais_dd_df() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -137098,7 +137099,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -137124,13 +137125,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137144,7 +137145,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137154,7 +137155,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137169,7 +137170,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137177,7 +137178,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137202,7 +137203,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137225,7 +137226,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137341,7 +137342,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137350,7 +137351,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137358,12 +137359,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137371,7 +137372,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137388,7 +137389,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137396,7 +137397,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137426,7 +137427,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137453,13 +137454,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137467,27 +137468,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137499,7 +137500,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137511,7 +137512,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137526,7 +137527,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137535,7 +137536,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137543,7 +137544,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137553,7 +137554,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137562,7 +137563,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137574,7 +137575,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137622,7 +137623,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137658,7 +137659,7 @@ void m68000_device::divs_w_adr16_dd_df() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -137682,13 +137683,13 @@ void m68000_device::divs_w_adr16_dd_df() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137702,7 +137703,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137712,7 +137713,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137727,7 +137728,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137735,7 +137736,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137760,7 +137761,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137783,7 +137784,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137899,7 +137900,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137908,7 +137909,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137916,12 +137917,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137929,7 +137930,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137946,7 +137947,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137954,7 +137955,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137984,7 +137985,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138011,13 +138012,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138025,27 +138026,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138057,7 +138058,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138069,7 +138070,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138084,7 +138085,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138093,7 +138094,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138101,7 +138102,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138111,7 +138112,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138120,7 +138121,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138132,7 +138133,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138180,7 +138181,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138237,7 +138238,7 @@ void m68000_device::divs_w_adr32_dd_df() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -138261,13 +138262,13 @@ void m68000_device::divs_w_adr32_dd_df() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138281,7 +138282,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138291,7 +138292,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138306,7 +138307,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138314,7 +138315,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138339,7 +138340,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138362,7 +138363,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138478,7 +138479,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -138487,7 +138488,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -138495,12 +138496,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138508,7 +138509,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138525,7 +138526,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -138533,7 +138534,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -138563,7 +138564,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138590,13 +138591,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138604,27 +138605,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138636,7 +138637,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138648,7 +138649,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138663,7 +138664,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138672,7 +138673,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138680,7 +138681,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138690,7 +138691,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138699,7 +138700,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138711,7 +138712,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138759,7 +138760,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138793,7 +138794,7 @@ void m68000_device::divs_w_dpc_dd_df() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -138819,13 +138820,13 @@ void m68000_device::divs_w_dpc_dd_df() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138839,7 +138840,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138849,7 +138850,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138864,7 +138865,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138872,7 +138873,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138897,7 +138898,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138920,7 +138921,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139036,7 +139037,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139045,7 +139046,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139053,12 +139054,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139066,7 +139067,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139083,7 +139084,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139091,7 +139092,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139121,7 +139122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139148,13 +139149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139162,27 +139163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139194,7 +139195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139206,7 +139207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139221,7 +139222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139230,7 +139231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139238,7 +139239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139248,7 +139249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139257,7 +139258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139269,7 +139270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139317,7 +139318,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139327,7 +139328,7 @@ void m68000_device::divs_w_dpci_dd_df() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -139389,7 +139390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -139415,13 +139416,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139435,7 +139436,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139445,7 +139446,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139460,7 +139461,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -139468,7 +139469,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139493,7 +139494,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139516,7 +139517,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139632,7 +139633,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139641,7 +139642,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139649,12 +139650,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139662,7 +139663,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139679,7 +139680,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139687,7 +139688,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139717,7 +139718,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139744,13 +139745,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139758,27 +139759,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139790,7 +139791,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139802,7 +139803,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139817,7 +139818,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139826,7 +139827,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139834,7 +139835,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139844,7 +139845,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139853,7 +139854,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139865,7 +139866,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139913,7 +139914,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139951,13 +139952,13 @@ void m68000_device::divs_w_imm16_dd_df() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139971,7 +139972,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139981,7 +139982,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139996,7 +139997,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -140004,7 +140005,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140029,7 +140030,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140052,7 +140053,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140168,7 +140169,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -140177,7 +140178,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -140185,12 +140186,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140198,7 +140199,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140215,7 +140216,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -140223,7 +140224,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -140253,7 +140254,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140280,13 +140281,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140294,27 +140295,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140326,7 +140327,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140338,7 +140339,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140353,7 +140354,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140362,7 +140363,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140370,7 +140371,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140380,7 +140381,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140389,7 +140390,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140401,7 +140402,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140449,7 +140450,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -140464,7 +140465,7 @@ void m68000_device::sub_b_ds_dd_df() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140504,7 +140505,7 @@ void m68000_device::sub_b_ais_dd_df() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140527,7 +140528,7 @@ void m68000_device::sub_b_ais_dd_df() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140573,7 +140574,7 @@ void m68000_device::sub_b_aips_dd_df() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140594,7 +140595,7 @@ void m68000_device::sub_b_aips_dd_df() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140642,7 +140643,7 @@ void m68000_device::sub_b_pais_dd_df() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140663,7 +140664,7 @@ void m68000_device::sub_b_pais_dd_df() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140725,7 +140726,7 @@ void m68000_device::sub_b_das_dd_df() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140748,7 +140749,7 @@ void m68000_device::sub_b_das_dd_df() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140786,7 +140787,7 @@ void m68000_device::sub_b_dais_dd_df() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -140848,7 +140849,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140871,7 +140872,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140934,7 +140935,7 @@ void m68000_device::sub_b_adr16_dd_df() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140955,7 +140956,7 @@ void m68000_device::sub_b_adr16_dd_df() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141039,7 +141040,7 @@ void m68000_device::sub_b_adr32_dd_df() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141060,7 +141061,7 @@ void m68000_device::sub_b_adr32_dd_df() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141121,7 +141122,7 @@ void m68000_device::sub_b_dpc_dd_df() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141144,7 +141145,7 @@ void m68000_device::sub_b_dpc_dd_df() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141181,7 +141182,7 @@ void m68000_device::sub_b_dpci_dd_df() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141243,7 +141244,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141266,7 +141267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141331,7 +141332,7 @@ void m68000_device::sub_b_imm8_dd_df() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141373,7 +141374,7 @@ void m68000_device::sub_w_ds_dd_df() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141415,7 +141416,7 @@ void m68000_device::sub_w_as_dd_df() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141455,7 +141456,7 @@ void m68000_device::sub_w_ais_dd_df() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141481,7 +141482,7 @@ void m68000_device::sub_w_ais_dd_df() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141527,7 +141528,7 @@ void m68000_device::sub_w_aips_dd_df() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141551,7 +141552,7 @@ void m68000_device::sub_w_aips_dd_df() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141599,7 +141600,7 @@ void m68000_device::sub_w_pais_dd_df() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141623,7 +141624,7 @@ void m68000_device::sub_w_pais_dd_df() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141685,7 +141686,7 @@ void m68000_device::sub_w_das_dd_df() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141711,7 +141712,7 @@ void m68000_device::sub_w_das_dd_df() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141749,7 +141750,7 @@ void m68000_device::sub_w_dais_dd_df() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141811,7 +141812,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141837,7 +141838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141900,7 +141901,7 @@ void m68000_device::sub_w_adr16_dd_df() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141924,7 +141925,7 @@ void m68000_device::sub_w_adr16_dd_df() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142008,7 +142009,7 @@ void m68000_device::sub_w_adr32_dd_df() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142032,7 +142033,7 @@ void m68000_device::sub_w_adr32_dd_df() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142093,7 +142094,7 @@ void m68000_device::sub_w_dpc_dd_df() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142119,7 +142120,7 @@ void m68000_device::sub_w_dpc_dd_df() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142156,7 +142157,7 @@ void m68000_device::sub_w_dpci_dd_df() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -142218,7 +142219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142244,7 +142245,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142309,7 +142310,7 @@ void m68000_device::sub_w_imm16_dd_df() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142351,7 +142352,7 @@ void m68000_device::sub_l_ds_dd_df() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142375,7 +142376,7 @@ void m68000_device::sub_l_ds_dd_df() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142401,7 +142402,7 @@ void m68000_device::sub_l_as_dd_df() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142425,7 +142426,7 @@ void m68000_device::sub_l_as_dd_df() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142449,7 +142450,7 @@ void m68000_device::sub_l_ais_dd_df() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142496,12 +142497,12 @@ void m68000_device::sub_l_ais_dd_df() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142542,7 +142543,7 @@ void m68000_device::sub_l_aips_dd_df() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142592,12 +142593,12 @@ void m68000_device::sub_l_aips_dd_df() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142637,7 +142638,7 @@ void m68000_device::sub_l_pais_dd_df() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -142689,12 +142690,12 @@ void m68000_device::sub_l_pais_dd_df() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142756,7 +142757,7 @@ void m68000_device::sub_l_das_dd_df() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142803,12 +142804,12 @@ void m68000_device::sub_l_das_dd_df() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142847,7 +142848,7 @@ void m68000_device::sub_l_dais_dd_df() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -142908,7 +142909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142955,12 +142956,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143024,7 +143025,7 @@ void m68000_device::sub_l_adr16_dd_df() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143071,12 +143072,12 @@ void m68000_device::sub_l_adr16_dd_df() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143161,7 +143162,7 @@ void m68000_device::sub_l_adr32_dd_df() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143208,12 +143209,12 @@ void m68000_device::sub_l_adr32_dd_df() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143274,7 +143275,7 @@ void m68000_device::sub_l_dpc_dd_df() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143321,12 +143322,12 @@ void m68000_device::sub_l_dpc_dd_df() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143364,7 +143365,7 @@ void m68000_device::sub_l_dpci_dd_df() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -143425,7 +143426,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143472,12 +143473,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143564,7 +143565,7 @@ void m68000_device::sub_l_imm32_dd_df() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -143588,7 +143589,7 @@ void m68000_device::sub_l_imm32_dd_df() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -143614,7 +143615,7 @@ void m68000_device::suba_w_ds_ad_df() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143637,7 +143638,7 @@ void m68000_device::suba_w_ds_ad_df() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143662,7 +143663,7 @@ void m68000_device::suba_w_as_ad_df() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143685,7 +143686,7 @@ void m68000_device::suba_w_as_ad_df() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143708,7 +143709,7 @@ void m68000_device::suba_w_ais_ad_df() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143734,7 +143735,7 @@ void m68000_device::suba_w_ais_ad_df() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143757,7 +143758,7 @@ void m68000_device::suba_w_ais_ad_df() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143786,7 +143787,7 @@ void m68000_device::suba_w_aips_ad_df() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143810,7 +143811,7 @@ void m68000_device::suba_w_aips_ad_df() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143833,7 +143834,7 @@ void m68000_device::suba_w_aips_ad_df() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143864,7 +143865,7 @@ void m68000_device::suba_w_pais_ad_df() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143888,7 +143889,7 @@ void m68000_device::suba_w_pais_ad_df() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143911,7 +143912,7 @@ void m68000_device::suba_w_pais_ad_df() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143956,7 +143957,7 @@ void m68000_device::suba_w_das_ad_df() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143982,7 +143983,7 @@ void m68000_device::suba_w_das_ad_df() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144005,7 +144006,7 @@ void m68000_device::suba_w_das_ad_df() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144026,7 +144027,7 @@ void m68000_device::suba_w_dais_ad_df() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144088,7 +144089,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144114,7 +144115,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144137,7 +144138,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144183,7 +144184,7 @@ void m68000_device::suba_w_adr16_ad_df() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -144207,7 +144208,7 @@ void m68000_device::suba_w_adr16_ad_df() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144230,7 +144231,7 @@ void m68000_device::suba_w_adr16_ad_df() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144297,7 +144298,7 @@ void m68000_device::suba_w_adr32_ad_df() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -144321,7 +144322,7 @@ void m68000_device::suba_w_adr32_ad_df() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144344,7 +144345,7 @@ void m68000_device::suba_w_adr32_ad_df() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144388,7 +144389,7 @@ void m68000_device::suba_w_dpc_ad_df() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144414,7 +144415,7 @@ void m68000_device::suba_w_dpc_ad_df() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144437,7 +144438,7 @@ void m68000_device::suba_w_dpc_ad_df() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144457,7 +144458,7 @@ void m68000_device::suba_w_dpci_ad_df() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144519,7 +144520,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144545,7 +144546,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144568,7 +144569,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144616,7 +144617,7 @@ void m68000_device::suba_w_imm16_ad_df() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144639,7 +144640,7 @@ void m68000_device::suba_w_imm16_ad_df() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144664,7 +144665,7 @@ void m68000_device::subx_b_ds_dd_df() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -144710,7 +144711,7 @@ void m68000_device::subx_b_pais_paid_df() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -144751,7 +144752,7 @@ void m68000_device::subx_b_pais_paid_df() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144803,7 +144804,7 @@ void m68000_device::sub_b_dd_ais_df() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144826,7 +144827,7 @@ void m68000_device::sub_b_dd_ais_df() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144884,7 +144885,7 @@ void m68000_device::sub_b_dd_aips_df() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144905,7 +144906,7 @@ void m68000_device::sub_b_dd_aips_df() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144965,7 +144966,7 @@ void m68000_device::sub_b_dd_pais_df() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144986,7 +144987,7 @@ void m68000_device::sub_b_dd_pais_df() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145060,7 +145061,7 @@ void m68000_device::sub_b_dd_das_df() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145083,7 +145084,7 @@ void m68000_device::sub_b_dd_das_df() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145133,7 +145134,7 @@ void m68000_device::sub_b_dd_dais_df() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -145195,7 +145196,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145218,7 +145219,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145293,7 +145294,7 @@ void m68000_device::sub_b_dd_adr16_df() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145314,7 +145315,7 @@ void m68000_device::sub_b_dd_adr16_df() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145410,7 +145411,7 @@ void m68000_device::sub_b_dd_adr32_df() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145431,7 +145432,7 @@ void m68000_device::sub_b_dd_adr32_df() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145485,7 +145486,7 @@ void m68000_device::subx_w_ds_dd_df() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -145531,7 +145532,7 @@ void m68000_device::subx_w_pais_paid_df() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -145578,7 +145579,7 @@ void m68000_device::subx_w_pais_paid_df() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145635,7 +145636,7 @@ void m68000_device::sub_w_dd_ais_df() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145661,7 +145662,7 @@ void m68000_device::sub_w_dd_ais_df() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145724,7 +145725,7 @@ void m68000_device::sub_w_dd_aips_df() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -145748,7 +145749,7 @@ void m68000_device::sub_w_dd_aips_df() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145813,7 +145814,7 @@ void m68000_device::sub_w_dd_pais_df() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -145837,7 +145838,7 @@ void m68000_device::sub_w_dd_pais_df() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145916,7 +145917,7 @@ void m68000_device::sub_w_dd_das_df() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145942,7 +145943,7 @@ void m68000_device::sub_w_dd_das_df() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145997,7 +145998,7 @@ void m68000_device::sub_w_dd_dais_df() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146059,7 +146060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146085,7 +146086,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146165,7 +146166,7 @@ void m68000_device::sub_w_dd_adr16_df() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146189,7 +146190,7 @@ void m68000_device::sub_w_dd_adr16_df() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146290,7 +146291,7 @@ void m68000_device::sub_w_dd_adr32_df() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146314,7 +146315,7 @@ void m68000_device::sub_w_dd_adr32_df() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146373,7 +146374,7 @@ void m68000_device::subx_l_ds_dd_df() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -146397,7 +146398,7 @@ void m68000_device::subx_l_ds_dd_df() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -146448,7 +146449,7 @@ void m68000_device::subx_l_pais_paid_df() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -146495,7 +146496,7 @@ void m68000_device::subx_l_pais_paid_df() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -146539,7 +146540,7 @@ void m68000_device::subx_l_pais_paid_df() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146596,7 +146597,7 @@ void m68000_device::sub_l_dd_ais_df() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146643,7 +146644,7 @@ void m68000_device::sub_l_dd_ais_df() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146668,7 +146669,7 @@ void m68000_device::sub_l_dd_ais_df() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146723,7 +146724,7 @@ void m68000_device::sub_l_dd_aips_df() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146773,7 +146774,7 @@ void m68000_device::sub_l_dd_aips_df() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146798,7 +146799,7 @@ void m68000_device::sub_l_dd_aips_df() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146852,7 +146853,7 @@ void m68000_device::sub_l_dd_pais_df() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -146904,7 +146905,7 @@ void m68000_device::sub_l_dd_pais_df() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146929,7 +146930,7 @@ void m68000_device::sub_l_dd_pais_df() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147005,7 +147006,7 @@ void m68000_device::sub_l_dd_das_df() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147052,7 +147053,7 @@ void m68000_device::sub_l_dd_das_df() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147077,7 +147078,7 @@ void m68000_device::sub_l_dd_das_df() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147130,7 +147131,7 @@ void m68000_device::sub_l_dd_dais_df() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -147191,7 +147192,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147238,7 +147239,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147263,7 +147264,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147341,7 +147342,7 @@ void m68000_device::sub_l_dd_adr16_df() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147388,7 +147389,7 @@ void m68000_device::sub_l_dd_adr16_df() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147413,7 +147414,7 @@ void m68000_device::sub_l_dd_adr16_df() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147512,7 +147513,7 @@ void m68000_device::sub_l_dd_adr32_df() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147559,7 +147560,7 @@ void m68000_device::sub_l_dd_adr32_df() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147584,7 +147585,7 @@ void m68000_device::sub_l_dd_adr32_df() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147641,7 +147642,7 @@ void m68000_device::suba_l_ds_ad_df() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147664,7 +147665,7 @@ void m68000_device::suba_l_ds_ad_df() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147689,7 +147690,7 @@ void m68000_device::suba_l_as_ad_df() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147712,7 +147713,7 @@ void m68000_device::suba_l_as_ad_df() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147735,7 +147736,7 @@ void m68000_device::suba_l_ais_ad_df() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147782,11 +147783,11 @@ void m68000_device::suba_l_ais_ad_df() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -147826,7 +147827,7 @@ void m68000_device::suba_l_aips_ad_df() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147876,11 +147877,11 @@ void m68000_device::suba_l_aips_ad_df() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -147919,7 +147920,7 @@ void m68000_device::suba_l_pais_ad_df() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -147971,11 +147972,11 @@ void m68000_device::suba_l_pais_ad_df() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148036,7 +148037,7 @@ void m68000_device::suba_l_das_ad_df() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148083,11 +148084,11 @@ void m68000_device::suba_l_das_ad_df() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148125,7 +148126,7 @@ void m68000_device::suba_l_dais_ad_df() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148186,7 +148187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148233,11 +148234,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148300,7 +148301,7 @@ void m68000_device::suba_l_adr16_ad_df() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148347,11 +148348,11 @@ void m68000_device::suba_l_adr16_ad_df() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148435,7 +148436,7 @@ void m68000_device::suba_l_adr32_ad_df() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148482,11 +148483,11 @@ void m68000_device::suba_l_adr32_ad_df() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148546,7 +148547,7 @@ void m68000_device::suba_l_dpc_ad_df() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148593,11 +148594,11 @@ void m68000_device::suba_l_dpc_ad_df() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148634,7 +148635,7 @@ void m68000_device::suba_l_dpci_ad_df() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148695,7 +148696,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148742,11 +148743,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148832,7 +148833,7 @@ void m68000_device::suba_l_imm32_ad_df() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -148855,7 +148856,7 @@ void m68000_device::suba_l_imm32_ad_df() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -148880,7 +148881,7 @@ void m68000_device::cmp_b_ds_dd_df() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148919,7 +148920,7 @@ void m68000_device::cmp_b_ais_dd_df() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148942,7 +148943,7 @@ void m68000_device::cmp_b_ais_dd_df() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148987,7 +148988,7 @@ void m68000_device::cmp_b_aips_dd_df() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149008,7 +149009,7 @@ void m68000_device::cmp_b_aips_dd_df() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149055,7 +149056,7 @@ void m68000_device::cmp_b_pais_dd_df() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149076,7 +149077,7 @@ void m68000_device::cmp_b_pais_dd_df() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149137,7 +149138,7 @@ void m68000_device::cmp_b_das_dd_df() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149160,7 +149161,7 @@ void m68000_device::cmp_b_das_dd_df() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149197,7 +149198,7 @@ void m68000_device::cmp_b_dais_dd_df() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149259,7 +149260,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149282,7 +149283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149344,7 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_df() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149365,7 +149366,7 @@ void m68000_device::cmp_b_adr16_dd_df() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149448,7 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_df() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149469,7 +149470,7 @@ void m68000_device::cmp_b_adr32_dd_df() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149529,7 +149530,7 @@ void m68000_device::cmp_b_dpc_dd_df() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149552,7 +149553,7 @@ void m68000_device::cmp_b_dpc_dd_df() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149588,7 +149589,7 @@ void m68000_device::cmp_b_dpci_dd_df() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149650,7 +149651,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149673,7 +149674,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149737,7 +149738,7 @@ void m68000_device::cmp_b_imm8_dd_df() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149778,7 +149779,7 @@ void m68000_device::cmp_w_ds_dd_df() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149819,7 +149820,7 @@ void m68000_device::cmp_w_as_dd_df() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149858,7 +149859,7 @@ void m68000_device::cmp_w_ais_dd_df() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149884,7 +149885,7 @@ void m68000_device::cmp_w_ais_dd_df() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149929,7 +149930,7 @@ void m68000_device::cmp_w_aips_dd_df() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -149953,7 +149954,7 @@ void m68000_device::cmp_w_aips_dd_df() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150000,7 +150001,7 @@ void m68000_device::cmp_w_pais_dd_df() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150024,7 +150025,7 @@ void m68000_device::cmp_w_pais_dd_df() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150085,7 +150086,7 @@ void m68000_device::cmp_w_das_dd_df() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150111,7 +150112,7 @@ void m68000_device::cmp_w_das_dd_df() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150148,7 +150149,7 @@ void m68000_device::cmp_w_dais_dd_df() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150210,7 +150211,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150236,7 +150237,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150298,7 +150299,7 @@ void m68000_device::cmp_w_adr16_dd_df() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150322,7 +150323,7 @@ void m68000_device::cmp_w_adr16_dd_df() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150405,7 +150406,7 @@ void m68000_device::cmp_w_adr32_dd_df() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150429,7 +150430,7 @@ void m68000_device::cmp_w_adr32_dd_df() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150489,7 +150490,7 @@ void m68000_device::cmp_w_dpc_dd_df() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150515,7 +150516,7 @@ void m68000_device::cmp_w_dpc_dd_df() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150551,7 +150552,7 @@ void m68000_device::cmp_w_dpci_dd_df() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150613,7 +150614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150639,7 +150640,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150703,7 +150704,7 @@ void m68000_device::cmp_w_imm16_dd_df() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150744,11 +150745,11 @@ void m68000_device::cmp_l_ds_dd_df() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150790,11 +150791,11 @@ void m68000_device::cmp_l_as_dd_df() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150834,7 +150835,7 @@ void m68000_device::cmp_l_ais_dd_df() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150881,11 +150882,11 @@ void m68000_device::cmp_l_ais_dd_df() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150925,7 +150926,7 @@ void m68000_device::cmp_l_aips_dd_df() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150975,11 +150976,11 @@ void m68000_device::cmp_l_aips_dd_df() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151018,7 +151019,7 @@ void m68000_device::cmp_l_pais_dd_df() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -151070,11 +151071,11 @@ void m68000_device::cmp_l_pais_dd_df() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151135,7 +151136,7 @@ void m68000_device::cmp_l_das_dd_df() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151182,11 +151183,11 @@ void m68000_device::cmp_l_das_dd_df() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151224,7 +151225,7 @@ void m68000_device::cmp_l_dais_dd_df() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151285,7 +151286,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151332,11 +151333,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151399,7 +151400,7 @@ void m68000_device::cmp_l_adr16_dd_df() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151446,11 +151447,11 @@ void m68000_device::cmp_l_adr16_dd_df() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151534,7 +151535,7 @@ void m68000_device::cmp_l_adr32_dd_df() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151581,11 +151582,11 @@ void m68000_device::cmp_l_adr32_dd_df() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151645,7 +151646,7 @@ void m68000_device::cmp_l_dpc_dd_df() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151692,11 +151693,11 @@ void m68000_device::cmp_l_dpc_dd_df() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151733,7 +151734,7 @@ void m68000_device::cmp_l_dpci_dd_df() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151794,7 +151795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151841,11 +151842,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151931,11 +151932,11 @@ void m68000_device::cmp_l_imm32_dd_df() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151977,11 +151978,11 @@ void m68000_device::cmpa_w_ds_ad_df() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152023,11 +152024,11 @@ void m68000_device::cmpa_w_as_ad_df() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152067,7 +152068,7 @@ void m68000_device::cmpa_w_ais_ad_df() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152093,11 +152094,11 @@ void m68000_device::cmpa_w_ais_ad_df() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152143,7 +152144,7 @@ void m68000_device::cmpa_w_aips_ad_df() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152167,11 +152168,11 @@ void m68000_device::cmpa_w_aips_ad_df() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152219,7 +152220,7 @@ void m68000_device::cmpa_w_pais_ad_df() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152243,11 +152244,11 @@ void m68000_device::cmpa_w_pais_ad_df() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152309,7 +152310,7 @@ void m68000_device::cmpa_w_das_ad_df() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152335,11 +152336,11 @@ void m68000_device::cmpa_w_das_ad_df() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152377,7 +152378,7 @@ void m68000_device::cmpa_w_dais_ad_df() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152439,7 +152440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152465,11 +152466,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152532,7 +152533,7 @@ void m68000_device::cmpa_w_adr16_ad_df() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152556,11 +152557,11 @@ void m68000_device::cmpa_w_adr16_ad_df() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152644,7 +152645,7 @@ void m68000_device::cmpa_w_adr32_ad_df() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152668,11 +152669,11 @@ void m68000_device::cmpa_w_adr32_ad_df() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152733,7 +152734,7 @@ void m68000_device::cmpa_w_dpc_ad_df() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152759,11 +152760,11 @@ void m68000_device::cmpa_w_dpc_ad_df() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152800,7 +152801,7 @@ void m68000_device::cmpa_w_dpci_ad_df() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152862,7 +152863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152888,11 +152889,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152957,11 +152958,11 @@ void m68000_device::cmpa_w_imm16_ad_df() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153002,7 +153003,7 @@ void m68000_device::eor_b_dd_ds_df() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153010,7 +153011,7 @@ void m68000_device::eor_b_dd_ds_df() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153066,7 +153067,7 @@ void m68000_device::cmpm_b_aips_aipd_df() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153088,7 +153089,7 @@ void m68000_device::cmpm_b_aips_aipd_df() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153123,11 +153124,11 @@ void m68000_device::eor_b_dd_ais_df() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153147,7 +153148,7 @@ void m68000_device::eor_b_dd_ais_df() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153174,7 +153175,7 @@ void m68000_device::eor_b_dd_ais_df() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153203,12 +153204,12 @@ void m68000_device::eor_b_dd_aips_df() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153229,7 +153230,7 @@ void m68000_device::eor_b_dd_aips_df() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153256,7 +153257,7 @@ void m68000_device::eor_b_dd_aips_df() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153284,7 +153285,7 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153292,7 +153293,7 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153313,7 +153314,7 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153340,7 +153341,7 @@ void m68000_device::eor_b_dd_pais_df() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153366,7 +153367,7 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153389,11 +153390,11 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153413,7 +153414,7 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153440,7 +153441,7 @@ void m68000_device::eor_b_dd_das_df() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153464,14 +153465,14 @@ void m68000_device::eor_b_dd_dais_df() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153479,7 +153480,7 @@ void m68000_device::eor_b_dd_dais_df() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153503,7 +153504,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153529,11 +153530,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153553,7 +153554,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153580,7 +153581,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153608,7 +153609,7 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -153631,7 +153632,7 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153652,7 +153653,7 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153679,7 +153680,7 @@ void m68000_device::eor_b_dd_adr16_df() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153705,7 +153706,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153729,7 +153730,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -153752,7 +153753,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153773,7 +153774,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153800,7 +153801,7 @@ void m68000_device::eor_b_dd_adr32_df() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153827,7 +153828,7 @@ void m68000_device::eor_w_dd_ds_df() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153835,7 +153836,7 @@ void m68000_device::eor_w_dd_ds_df() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153894,7 +153895,7 @@ void m68000_device::cmpm_w_aips_aipd_df() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -153919,7 +153920,7 @@ void m68000_device::cmpm_w_aips_aipd_df() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153954,11 +153955,11 @@ void m68000_device::eor_w_dd_ais_df() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153981,7 +153982,7 @@ void m68000_device::eor_w_dd_ais_df() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154008,7 +154009,7 @@ void m68000_device::eor_w_dd_ais_df() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154042,12 +154043,12 @@ void m68000_device::eor_w_dd_aips_df() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154071,7 +154072,7 @@ void m68000_device::eor_w_dd_aips_df() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154098,7 +154099,7 @@ void m68000_device::eor_w_dd_aips_df() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154131,7 +154132,7 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -154139,7 +154140,7 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154163,7 +154164,7 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154190,7 +154191,7 @@ void m68000_device::eor_w_dd_pais_df() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154221,7 +154222,7 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154244,11 +154245,11 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154271,7 +154272,7 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154298,7 +154299,7 @@ void m68000_device::eor_w_dd_das_df() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154327,14 +154328,14 @@ void m68000_device::eor_w_dd_dais_df() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -154342,7 +154343,7 @@ void m68000_device::eor_w_dd_dais_df() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154366,7 +154367,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154392,11 +154393,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154419,7 +154420,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154446,7 +154447,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154479,7 +154480,7 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -154502,7 +154503,7 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154526,7 +154527,7 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154553,7 +154554,7 @@ void m68000_device::eor_w_dd_adr16_df() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154584,7 +154585,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154608,7 +154609,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -154631,7 +154632,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154655,7 +154656,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154682,7 +154683,7 @@ void m68000_device::eor_w_dd_adr32_df() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154714,12 +154715,12 @@ void m68000_device::eor_l_dd_ds_df() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154739,7 +154740,7 @@ void m68000_device::eor_l_dd_ds_df() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -154748,7 +154749,7 @@ void m68000_device::eor_l_dd_ds_df() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154811,7 +154812,7 @@ void m68000_device::cmpm_l_aips_aipd_df() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154855,13 +154856,13 @@ void m68000_device::cmpm_l_aips_aipd_df() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154896,7 +154897,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154921,7 +154922,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154944,7 +154945,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154969,7 +154970,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -154994,7 +154995,7 @@ void m68000_device::eor_l_dd_ais_df() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155025,7 +155026,7 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155050,11 +155051,11 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155077,7 +155078,7 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155102,7 +155103,7 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155127,7 +155128,7 @@ void m68000_device::eor_l_dd_aips_df() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155157,14 +155158,14 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155188,7 +155189,7 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155211,7 +155212,7 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155236,7 +155237,7 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155261,7 +155262,7 @@ void m68000_device::eor_l_dd_pais_df() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155292,7 +155293,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155314,7 +155315,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155339,7 +155340,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155362,7 +155363,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155387,7 +155388,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155412,7 +155413,7 @@ void m68000_device::eor_l_dd_das_df() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155441,14 +155442,14 @@ void m68000_device::eor_l_dd_dais_df() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -155456,7 +155457,7 @@ void m68000_device::eor_l_dd_dais_df() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155480,7 +155481,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155505,7 +155506,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155530,7 +155531,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155553,7 +155554,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155578,7 +155579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155603,7 +155604,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155636,7 +155637,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -155659,7 +155660,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155684,7 +155685,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155707,7 +155708,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155732,7 +155733,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155757,7 +155758,7 @@ void m68000_device::eor_l_dd_adr16_df() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155788,7 +155789,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155812,7 +155813,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -155835,7 +155836,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155860,7 +155861,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155883,7 +155884,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155908,7 +155909,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155933,7 +155934,7 @@ void m68000_device::eor_l_dd_adr32_df() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155966,11 +155967,11 @@ void m68000_device::cmpa_l_ds_ad_df() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156012,11 +156013,11 @@ void m68000_device::cmpa_l_as_ad_df() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156056,7 +156057,7 @@ void m68000_device::cmpa_l_ais_ad_df() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156103,11 +156104,11 @@ void m68000_device::cmpa_l_ais_ad_df() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156147,7 +156148,7 @@ void m68000_device::cmpa_l_aips_ad_df() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156197,11 +156198,11 @@ void m68000_device::cmpa_l_aips_ad_df() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156240,7 +156241,7 @@ void m68000_device::cmpa_l_pais_ad_df() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -156292,11 +156293,11 @@ void m68000_device::cmpa_l_pais_ad_df() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156357,7 +156358,7 @@ void m68000_device::cmpa_l_das_ad_df() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156404,11 +156405,11 @@ void m68000_device::cmpa_l_das_ad_df() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156446,7 +156447,7 @@ void m68000_device::cmpa_l_dais_ad_df() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -156507,7 +156508,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156554,11 +156555,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156621,7 +156622,7 @@ void m68000_device::cmpa_l_adr16_ad_df() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156668,11 +156669,11 @@ void m68000_device::cmpa_l_adr16_ad_df() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156756,7 +156757,7 @@ void m68000_device::cmpa_l_adr32_ad_df() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156803,11 +156804,11 @@ void m68000_device::cmpa_l_adr32_ad_df() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156867,7 +156868,7 @@ void m68000_device::cmpa_l_dpc_ad_df() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -156914,11 +156915,11 @@ void m68000_device::cmpa_l_dpc_ad_df() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156955,7 +156956,7 @@ void m68000_device::cmpa_l_dpci_ad_df() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -157016,7 +157017,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157063,11 +157064,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157153,11 +157154,11 @@ void m68000_device::cmpa_l_imm32_ad_df() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157199,7 +157200,7 @@ void m68000_device::and_b_ds_dd_df() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157207,7 +157208,7 @@ void m68000_device::and_b_ds_dd_df() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157240,11 +157241,11 @@ void m68000_device::and_b_ais_dd_df() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157264,7 +157265,7 @@ void m68000_device::and_b_ais_dd_df() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157272,7 +157273,7 @@ void m68000_device::and_b_ais_dd_df() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157308,12 +157309,12 @@ void m68000_device::and_b_aips_dd_df() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157334,7 +157335,7 @@ void m68000_device::and_b_aips_dd_df() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157342,7 +157343,7 @@ void m68000_device::and_b_aips_dd_df() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157377,7 +157378,7 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157385,7 +157386,7 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157406,7 +157407,7 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157414,7 +157415,7 @@ void m68000_device::and_b_pais_dd_df() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157447,7 +157448,7 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157470,11 +157471,11 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157494,7 +157495,7 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157502,7 +157503,7 @@ void m68000_device::and_b_das_dd_df() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157533,14 +157534,14 @@ void m68000_device::and_b_dais_dd_df() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157548,7 +157549,7 @@ void m68000_device::and_b_dais_dd_df() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157572,7 +157573,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157598,11 +157599,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157622,7 +157623,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157630,7 +157631,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157665,7 +157666,7 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157688,7 +157689,7 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157709,7 +157710,7 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157717,7 +157718,7 @@ void m68000_device::and_b_adr16_dd_df() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157750,7 +157751,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157774,7 +157775,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157797,7 +157798,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157818,7 +157819,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157826,7 +157827,7 @@ void m68000_device::and_b_adr32_dd_df() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157858,7 +157859,7 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157881,11 +157882,11 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157905,7 +157906,7 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157913,7 +157914,7 @@ void m68000_device::and_b_dpc_dd_df() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157943,14 +157944,14 @@ void m68000_device::and_b_dpci_dd_df() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157958,7 +157959,7 @@ void m68000_device::and_b_dpci_dd_df() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157982,7 +157983,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158008,11 +158009,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -158032,7 +158033,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158040,7 +158041,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158075,7 +158076,7 @@ void m68000_device::and_b_imm8_dd_df() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158099,7 +158100,7 @@ void m68000_device::and_b_imm8_dd_df() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158107,7 +158108,7 @@ void m68000_device::and_b_imm8_dd_df() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158142,7 +158143,7 @@ void m68000_device::and_w_ds_dd_df() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158150,7 +158151,7 @@ void m68000_device::and_w_ds_dd_df() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158183,11 +158184,11 @@ void m68000_device::and_w_ais_dd_df() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158210,7 +158211,7 @@ void m68000_device::and_w_ais_dd_df() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158218,7 +158219,7 @@ void m68000_device::and_w_ais_dd_df() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158254,12 +158255,12 @@ void m68000_device::and_w_aips_dd_df() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158283,7 +158284,7 @@ void m68000_device::and_w_aips_dd_df() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158291,7 +158292,7 @@ void m68000_device::and_w_aips_dd_df() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158326,7 +158327,7 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158334,7 +158335,7 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158358,7 +158359,7 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158366,7 +158367,7 @@ void m68000_device::and_w_pais_dd_df() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158399,7 +158400,7 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158422,11 +158423,11 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158449,7 +158450,7 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158457,7 +158458,7 @@ void m68000_device::and_w_das_dd_df() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158488,14 +158489,14 @@ void m68000_device::and_w_dais_dd_df() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158503,7 +158504,7 @@ void m68000_device::and_w_dais_dd_df() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158527,7 +158528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158553,11 +158554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158580,7 +158581,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158588,7 +158589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158623,7 +158624,7 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -158646,7 +158647,7 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158670,7 +158671,7 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158678,7 +158679,7 @@ void m68000_device::and_w_adr16_dd_df() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158711,7 +158712,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158735,7 +158736,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -158758,7 +158759,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158782,7 +158783,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158790,7 +158791,7 @@ void m68000_device::and_w_adr32_dd_df() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158822,7 +158823,7 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158845,11 +158846,11 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158872,7 +158873,7 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158880,7 +158881,7 @@ void m68000_device::and_w_dpc_dd_df() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158910,14 +158911,14 @@ void m68000_device::and_w_dpci_dd_df() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158925,7 +158926,7 @@ void m68000_device::and_w_dpci_dd_df() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158949,7 +158950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158975,11 +158976,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159002,7 +159003,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159010,7 +159011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159045,7 +159046,7 @@ void m68000_device::and_w_imm16_dd_df() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159069,7 +159070,7 @@ void m68000_device::and_w_imm16_dd_df() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159077,7 +159078,7 @@ void m68000_device::and_w_imm16_dd_df() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159112,12 +159113,12 @@ void m68000_device::and_l_ds_dd_df() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159137,7 +159138,7 @@ void m68000_device::and_l_ds_dd_df() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -159146,7 +159147,7 @@ void m68000_device::and_l_ds_dd_df() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159162,7 +159163,7 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159187,7 +159188,7 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159210,12 +159211,12 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159241,7 +159242,7 @@ void m68000_device::and_l_ais_dd_df() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159257,7 +159258,7 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159282,11 +159283,11 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159309,12 +159310,12 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159340,7 +159341,7 @@ void m68000_device::and_l_aips_dd_df() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159355,14 +159356,14 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159386,7 +159387,7 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159409,12 +159410,12 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159440,7 +159441,7 @@ void m68000_device::and_l_pais_dd_df() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159456,7 +159457,7 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159478,7 +159479,7 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159503,7 +159504,7 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159526,12 +159527,12 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159557,7 +159558,7 @@ void m68000_device::and_l_das_dd_df() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159571,14 +159572,14 @@ void m68000_device::and_l_dais_dd_df() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -159586,7 +159587,7 @@ void m68000_device::and_l_dais_dd_df() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159610,7 +159611,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159635,7 +159636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159660,7 +159661,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159683,12 +159684,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159714,7 +159715,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159732,7 +159733,7 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -159755,7 +159756,7 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159780,7 +159781,7 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159803,12 +159804,12 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159834,7 +159835,7 @@ void m68000_device::and_l_adr16_dd_df() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159850,7 +159851,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159874,7 +159875,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -159897,7 +159898,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159922,7 +159923,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159945,12 +159946,12 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159976,7 +159977,7 @@ void m68000_device::and_l_adr32_dd_df() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159991,7 +159992,7 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160013,7 +160014,7 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -160038,7 +160039,7 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160061,12 +160062,12 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160092,7 +160093,7 @@ void m68000_device::and_l_dpc_dd_df() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160105,14 +160106,14 @@ void m68000_device::and_l_dpci_dd_df() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -160120,7 +160121,7 @@ void m68000_device::and_l_dpci_dd_df() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160144,7 +160145,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160169,7 +160170,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -160194,7 +160195,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160217,12 +160218,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160248,7 +160249,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160264,7 +160265,7 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160288,7 +160289,7 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160312,12 +160313,12 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160337,7 +160338,7 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -160346,7 +160347,7 @@ void m68000_device::and_l_imm32_dd_df() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160366,7 +160367,7 @@ void m68000_device::mulu_w_ds_dd_df() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160399,7 +160400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160411,7 +160412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160423,7 +160424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160441,7 +160442,7 @@ void m68000_device::mulu_w_ais_dd_df() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160469,7 +160470,7 @@ void m68000_device::mulu_w_ais_dd_df() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160502,7 +160503,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160514,7 +160515,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160526,7 +160527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160550,7 +160551,7 @@ void m68000_device::mulu_w_aips_dd_df() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -160576,7 +160577,7 @@ void m68000_device::mulu_w_aips_dd_df() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160609,7 +160610,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160621,7 +160622,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160633,7 +160634,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160659,7 +160660,7 @@ void m68000_device::mulu_w_pais_dd_df() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -160685,7 +160686,7 @@ void m68000_device::mulu_w_pais_dd_df() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160718,7 +160719,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160730,7 +160731,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160742,7 +160743,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160782,7 +160783,7 @@ void m68000_device::mulu_w_das_dd_df() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160810,7 +160811,7 @@ void m68000_device::mulu_w_das_dd_df() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160843,7 +160844,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160855,7 +160856,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160867,7 +160868,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160883,7 +160884,7 @@ void m68000_device::mulu_w_dais_dd_df() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160945,7 +160946,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160973,7 +160974,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161006,7 +161007,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161018,7 +161019,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161030,7 +161031,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161071,7 +161072,7 @@ void m68000_device::mulu_w_adr16_dd_df() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -161097,7 +161098,7 @@ void m68000_device::mulu_w_adr16_dd_df() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161130,7 +161131,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161142,7 +161143,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161154,7 +161155,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161216,7 +161217,7 @@ void m68000_device::mulu_w_adr32_dd_df() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -161242,7 +161243,7 @@ void m68000_device::mulu_w_adr32_dd_df() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161275,7 +161276,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161287,7 +161288,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161299,7 +161300,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161338,7 +161339,7 @@ void m68000_device::mulu_w_dpc_dd_df() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161366,7 +161367,7 @@ void m68000_device::mulu_w_dpc_dd_df() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161399,7 +161400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161411,7 +161412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161423,7 +161424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161438,7 +161439,7 @@ void m68000_device::mulu_w_dpci_dd_df() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -161500,7 +161501,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161528,7 +161529,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161561,7 +161562,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161573,7 +161574,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161585,7 +161586,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161630,7 +161631,7 @@ void m68000_device::mulu_w_imm16_dd_df() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161663,7 +161664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161675,7 +161676,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161687,7 +161688,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161707,12 +161708,12 @@ void m68000_device::abcd_ds_dd_df() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -161757,7 +161758,7 @@ void m68000_device::abcd_pais_paid_df() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -161797,12 +161798,12 @@ void m68000_device::abcd_pais_paid_df() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -161852,11 +161853,11 @@ void m68000_device::and_b_dd_ais_df() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -161876,7 +161877,7 @@ void m68000_device::and_b_dd_ais_df() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161903,7 +161904,7 @@ void m68000_device::and_b_dd_ais_df() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -161932,12 +161933,12 @@ void m68000_device::and_b_dd_aips_df() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -161958,7 +161959,7 @@ void m68000_device::and_b_dd_aips_df() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161985,7 +161986,7 @@ void m68000_device::and_b_dd_aips_df() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162013,7 +162014,7 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162021,7 +162022,7 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162042,7 +162043,7 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162069,7 +162070,7 @@ void m68000_device::and_b_dd_pais_df() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162095,7 +162096,7 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162118,11 +162119,11 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162142,7 +162143,7 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162169,7 +162170,7 @@ void m68000_device::and_b_dd_das_df() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162193,14 +162194,14 @@ void m68000_device::and_b_dd_dais_df() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162208,7 +162209,7 @@ void m68000_device::and_b_dd_dais_df() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162232,7 +162233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162258,11 +162259,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162282,7 +162283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162309,7 +162310,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162337,7 +162338,7 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -162360,7 +162361,7 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162381,7 +162382,7 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162408,7 +162409,7 @@ void m68000_device::and_b_dd_adr16_df() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162434,7 +162435,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162458,7 +162459,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -162481,7 +162482,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162502,7 +162503,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162529,7 +162530,7 @@ void m68000_device::and_b_dd_adr32_df() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162643,11 +162644,11 @@ void m68000_device::and_w_dd_ais_df() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162670,7 +162671,7 @@ void m68000_device::and_w_dd_ais_df() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162697,7 +162698,7 @@ void m68000_device::and_w_dd_ais_df() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162731,12 +162732,12 @@ void m68000_device::and_w_dd_aips_df() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -162760,7 +162761,7 @@ void m68000_device::and_w_dd_aips_df() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162787,7 +162788,7 @@ void m68000_device::and_w_dd_aips_df() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162820,7 +162821,7 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162828,7 +162829,7 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -162852,7 +162853,7 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162879,7 +162880,7 @@ void m68000_device::and_w_dd_pais_df() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162910,7 +162911,7 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162933,11 +162934,11 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162960,7 +162961,7 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162987,7 +162988,7 @@ void m68000_device::and_w_dd_das_df() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163016,14 +163017,14 @@ void m68000_device::and_w_dd_dais_df() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163031,7 +163032,7 @@ void m68000_device::and_w_dd_dais_df() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163055,7 +163056,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163081,11 +163082,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163108,7 +163109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163135,7 +163136,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163168,7 +163169,7 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -163191,7 +163192,7 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163215,7 +163216,7 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163242,7 +163243,7 @@ void m68000_device::and_w_dd_adr16_df() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163273,7 +163274,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163297,7 +163298,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -163320,7 +163321,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163344,7 +163345,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163371,7 +163372,7 @@ void m68000_device::and_w_dd_adr32_df() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163446,7 +163447,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163471,7 +163472,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163494,7 +163495,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163519,7 +163520,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163544,7 +163545,7 @@ void m68000_device::and_l_dd_ais_df() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163575,7 +163576,7 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163600,11 +163601,11 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163627,7 +163628,7 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163652,7 +163653,7 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163677,7 +163678,7 @@ void m68000_device::and_l_dd_aips_df() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163707,14 +163708,14 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163738,7 +163739,7 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163761,7 +163762,7 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163786,7 +163787,7 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163811,7 +163812,7 @@ void m68000_device::and_l_dd_pais_df() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163842,7 +163843,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163864,7 +163865,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163889,7 +163890,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163912,7 +163913,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163937,7 +163938,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163962,7 +163963,7 @@ void m68000_device::and_l_dd_das_df() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163991,14 +163992,14 @@ void m68000_device::and_l_dd_dais_df() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164006,7 +164007,7 @@ void m68000_device::and_l_dd_dais_df() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164030,7 +164031,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164055,7 +164056,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164080,7 +164081,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164103,7 +164104,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164128,7 +164129,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164153,7 +164154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164186,7 +164187,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -164209,7 +164210,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164234,7 +164235,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164257,7 +164258,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164282,7 +164283,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164307,7 +164308,7 @@ void m68000_device::and_l_dd_adr16_df() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164338,7 +164339,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164362,7 +164363,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -164385,7 +164386,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164410,7 +164411,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164433,7 +164434,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164458,7 +164459,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164483,7 +164484,7 @@ void m68000_device::and_l_dd_adr32_df() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164518,7 +164519,7 @@ void m68000_device::muls_w_ds_dd_df() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164551,7 +164552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164565,7 +164566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164577,7 +164578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164588,7 +164589,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164602,7 +164603,7 @@ void m68000_device::muls_w_ais_dd_df() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164630,7 +164631,7 @@ void m68000_device::muls_w_ais_dd_df() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164663,7 +164664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164677,7 +164678,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164689,7 +164690,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164700,7 +164701,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164720,7 +164721,7 @@ void m68000_device::muls_w_aips_dd_df() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164746,7 +164747,7 @@ void m68000_device::muls_w_aips_dd_df() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164779,7 +164780,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164793,7 +164794,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164805,7 +164806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164816,7 +164817,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164838,7 +164839,7 @@ void m68000_device::muls_w_pais_dd_df() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164864,7 +164865,7 @@ void m68000_device::muls_w_pais_dd_df() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164897,7 +164898,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164911,7 +164912,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164923,7 +164924,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164934,7 +164935,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164970,7 +164971,7 @@ void m68000_device::muls_w_das_dd_df() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164998,7 +164999,7 @@ void m68000_device::muls_w_das_dd_df() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165031,7 +165032,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165045,7 +165046,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165057,7 +165058,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165068,7 +165069,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165080,7 +165081,7 @@ void m68000_device::muls_w_dais_dd_df() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165142,7 +165143,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165170,7 +165171,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165203,7 +165204,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165217,7 +165218,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165229,7 +165230,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165240,7 +165241,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165277,7 +165278,7 @@ void m68000_device::muls_w_adr16_dd_df() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -165303,7 +165304,7 @@ void m68000_device::muls_w_adr16_dd_df() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165336,7 +165337,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165350,7 +165351,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165362,7 +165363,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165373,7 +165374,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165431,7 +165432,7 @@ void m68000_device::muls_w_adr32_dd_df() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -165457,7 +165458,7 @@ void m68000_device::muls_w_adr32_dd_df() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165490,7 +165491,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165504,7 +165505,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165516,7 +165517,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165527,7 +165528,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165562,7 +165563,7 @@ void m68000_device::muls_w_dpc_dd_df() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165590,7 +165591,7 @@ void m68000_device::muls_w_dpc_dd_df() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165623,7 +165624,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165637,7 +165638,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165649,7 +165650,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165660,7 +165661,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165671,7 +165672,7 @@ void m68000_device::muls_w_dpci_dd_df() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165733,7 +165734,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165761,7 +165762,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165794,7 +165795,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165808,7 +165809,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165820,7 +165821,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165831,7 +165832,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165872,7 +165873,7 @@ void m68000_device::muls_w_imm16_dd_df() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165905,7 +165906,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165919,7 +165920,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165931,7 +165932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165942,7 +165943,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165958,7 +165959,7 @@ void m68000_device::add_b_ds_dd_df() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -165998,7 +165999,7 @@ void m68000_device::add_b_ais_dd_df() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166021,7 +166022,7 @@ void m68000_device::add_b_ais_dd_df() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166067,7 +166068,7 @@ void m68000_device::add_b_aips_dd_df() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166088,7 +166089,7 @@ void m68000_device::add_b_aips_dd_df() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166136,7 +166137,7 @@ void m68000_device::add_b_pais_dd_df() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166157,7 +166158,7 @@ void m68000_device::add_b_pais_dd_df() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166219,7 +166220,7 @@ void m68000_device::add_b_das_dd_df() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166242,7 +166243,7 @@ void m68000_device::add_b_das_dd_df() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166280,7 +166281,7 @@ void m68000_device::add_b_dais_dd_df() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166342,7 +166343,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166365,7 +166366,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166428,7 +166429,7 @@ void m68000_device::add_b_adr16_dd_df() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166449,7 +166450,7 @@ void m68000_device::add_b_adr16_dd_df() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166533,7 +166534,7 @@ void m68000_device::add_b_adr32_dd_df() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166554,7 +166555,7 @@ void m68000_device::add_b_adr32_dd_df() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166615,7 +166616,7 @@ void m68000_device::add_b_dpc_dd_df() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166638,7 +166639,7 @@ void m68000_device::add_b_dpc_dd_df() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166675,7 +166676,7 @@ void m68000_device::add_b_dpci_dd_df() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166737,7 +166738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166760,7 +166761,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166825,7 +166826,7 @@ void m68000_device::add_b_imm8_dd_df() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166867,7 +166868,7 @@ void m68000_device::add_w_ds_dd_df() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166909,7 +166910,7 @@ void m68000_device::add_w_as_dd_df() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166949,7 +166950,7 @@ void m68000_device::add_w_ais_dd_df() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166975,7 +166976,7 @@ void m68000_device::add_w_ais_dd_df() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167021,7 +167022,7 @@ void m68000_device::add_w_aips_dd_df() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167045,7 +167046,7 @@ void m68000_device::add_w_aips_dd_df() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167093,7 +167094,7 @@ void m68000_device::add_w_pais_dd_df() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167117,7 +167118,7 @@ void m68000_device::add_w_pais_dd_df() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167179,7 +167180,7 @@ void m68000_device::add_w_das_dd_df() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167205,7 +167206,7 @@ void m68000_device::add_w_das_dd_df() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167243,7 +167244,7 @@ void m68000_device::add_w_dais_dd_df() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167305,7 +167306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167331,7 +167332,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167394,7 +167395,7 @@ void m68000_device::add_w_adr16_dd_df() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167418,7 +167419,7 @@ void m68000_device::add_w_adr16_dd_df() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167502,7 +167503,7 @@ void m68000_device::add_w_adr32_dd_df() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167526,7 +167527,7 @@ void m68000_device::add_w_adr32_dd_df() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167587,7 +167588,7 @@ void m68000_device::add_w_dpc_dd_df() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167613,7 +167614,7 @@ void m68000_device::add_w_dpc_dd_df() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167650,7 +167651,7 @@ void m68000_device::add_w_dpci_dd_df() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167712,7 +167713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167738,7 +167739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167803,7 +167804,7 @@ void m68000_device::add_w_imm16_dd_df() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167845,7 +167846,7 @@ void m68000_device::add_l_ds_dd_df() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167869,7 +167870,7 @@ void m68000_device::add_l_ds_dd_df() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167895,7 +167896,7 @@ void m68000_device::add_l_as_dd_df() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167919,7 +167920,7 @@ void m68000_device::add_l_as_dd_df() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167943,7 +167944,7 @@ void m68000_device::add_l_ais_dd_df() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167990,12 +167991,12 @@ void m68000_device::add_l_ais_dd_df() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168036,7 +168037,7 @@ void m68000_device::add_l_aips_dd_df() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168086,12 +168087,12 @@ void m68000_device::add_l_aips_dd_df() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168131,7 +168132,7 @@ void m68000_device::add_l_pais_dd_df() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -168183,12 +168184,12 @@ void m68000_device::add_l_pais_dd_df() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168250,7 +168251,7 @@ void m68000_device::add_l_das_dd_df() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168297,12 +168298,12 @@ void m68000_device::add_l_das_dd_df() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168341,7 +168342,7 @@ void m68000_device::add_l_dais_dd_df() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168402,7 +168403,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168449,12 +168450,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168518,7 +168519,7 @@ void m68000_device::add_l_adr16_dd_df() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168565,12 +168566,12 @@ void m68000_device::add_l_adr16_dd_df() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168655,7 +168656,7 @@ void m68000_device::add_l_adr32_dd_df() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168702,12 +168703,12 @@ void m68000_device::add_l_adr32_dd_df() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168768,7 +168769,7 @@ void m68000_device::add_l_dpc_dd_df() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -168815,12 +168816,12 @@ void m68000_device::add_l_dpc_dd_df() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168858,7 +168859,7 @@ void m68000_device::add_l_dpci_dd_df() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168919,7 +168920,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -168966,12 +168967,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169058,7 +169059,7 @@ void m68000_device::add_l_imm32_dd_df() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -169082,7 +169083,7 @@ void m68000_device::add_l_imm32_dd_df() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -169108,7 +169109,7 @@ void m68000_device::adda_w_ds_ad_df() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169131,7 +169132,7 @@ void m68000_device::adda_w_ds_ad_df() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169156,7 +169157,7 @@ void m68000_device::adda_w_as_ad_df() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169179,7 +169180,7 @@ void m68000_device::adda_w_as_ad_df() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169202,7 +169203,7 @@ void m68000_device::adda_w_ais_ad_df() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169228,7 +169229,7 @@ void m68000_device::adda_w_ais_ad_df() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169251,7 +169252,7 @@ void m68000_device::adda_w_ais_ad_df() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169280,7 +169281,7 @@ void m68000_device::adda_w_aips_ad_df() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169304,7 +169305,7 @@ void m68000_device::adda_w_aips_ad_df() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169327,7 +169328,7 @@ void m68000_device::adda_w_aips_ad_df() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169358,7 +169359,7 @@ void m68000_device::adda_w_pais_ad_df() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169382,7 +169383,7 @@ void m68000_device::adda_w_pais_ad_df() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169405,7 +169406,7 @@ void m68000_device::adda_w_pais_ad_df() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169450,7 +169451,7 @@ void m68000_device::adda_w_das_ad_df() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169476,7 +169477,7 @@ void m68000_device::adda_w_das_ad_df() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169499,7 +169500,7 @@ void m68000_device::adda_w_das_ad_df() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169520,7 +169521,7 @@ void m68000_device::adda_w_dais_ad_df() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169582,7 +169583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169608,7 +169609,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169631,7 +169632,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169677,7 +169678,7 @@ void m68000_device::adda_w_adr16_ad_df() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169701,7 +169702,7 @@ void m68000_device::adda_w_adr16_ad_df() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169724,7 +169725,7 @@ void m68000_device::adda_w_adr16_ad_df() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169791,7 +169792,7 @@ void m68000_device::adda_w_adr32_ad_df() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169815,7 +169816,7 @@ void m68000_device::adda_w_adr32_ad_df() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169838,7 +169839,7 @@ void m68000_device::adda_w_adr32_ad_df() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169882,7 +169883,7 @@ void m68000_device::adda_w_dpc_ad_df() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169908,7 +169909,7 @@ void m68000_device::adda_w_dpc_ad_df() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169931,7 +169932,7 @@ void m68000_device::adda_w_dpc_ad_df() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169951,7 +169952,7 @@ void m68000_device::adda_w_dpci_ad_df() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170013,7 +170014,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -170039,7 +170040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170062,7 +170063,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170110,7 +170111,7 @@ void m68000_device::adda_w_imm16_ad_df() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170133,7 +170134,7 @@ void m68000_device::adda_w_imm16_ad_df() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170158,7 +170159,7 @@ void m68000_device::addx_b_ds_dd_df() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170166,7 +170167,7 @@ void m68000_device::addx_b_ds_dd_df() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -170201,16 +170202,16 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170231,7 +170232,7 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170249,7 +170250,7 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170276,7 +170277,7 @@ void m68000_device::addx_b_pais_paid_df() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -170302,7 +170303,7 @@ void m68000_device::add_b_dd_ais_df() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170325,7 +170326,7 @@ void m68000_device::add_b_dd_ais_df() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170383,7 +170384,7 @@ void m68000_device::add_b_dd_aips_df() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170404,7 +170405,7 @@ void m68000_device::add_b_dd_aips_df() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170464,7 +170465,7 @@ void m68000_device::add_b_dd_pais_df() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170485,7 +170486,7 @@ void m68000_device::add_b_dd_pais_df() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170559,7 +170560,7 @@ void m68000_device::add_b_dd_das_df() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170582,7 +170583,7 @@ void m68000_device::add_b_dd_das_df() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170632,7 +170633,7 @@ void m68000_device::add_b_dd_dais_df() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170694,7 +170695,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170717,7 +170718,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170792,7 +170793,7 @@ void m68000_device::add_b_dd_adr16_df() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170813,7 +170814,7 @@ void m68000_device::add_b_dd_adr16_df() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170909,7 +170910,7 @@ void m68000_device::add_b_dd_adr32_df() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170930,7 +170931,7 @@ void m68000_device::add_b_dd_adr32_df() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170984,7 +170985,7 @@ void m68000_device::addx_w_ds_dd_df() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170992,7 +170993,7 @@ void m68000_device::addx_w_ds_dd_df() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171027,16 +171028,16 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171060,7 +171061,7 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171081,7 +171082,7 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171108,7 +171109,7 @@ void m68000_device::addx_w_pais_paid_df() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -171139,7 +171140,7 @@ void m68000_device::add_w_dd_ais_df() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171165,7 +171166,7 @@ void m68000_device::add_w_dd_ais_df() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171228,7 +171229,7 @@ void m68000_device::add_w_dd_aips_df() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171252,7 +171253,7 @@ void m68000_device::add_w_dd_aips_df() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171317,7 +171318,7 @@ void m68000_device::add_w_dd_pais_df() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171341,7 +171342,7 @@ void m68000_device::add_w_dd_pais_df() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171420,7 +171421,7 @@ void m68000_device::add_w_dd_das_df() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171446,7 +171447,7 @@ void m68000_device::add_w_dd_das_df() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171501,7 +171502,7 @@ void m68000_device::add_w_dd_dais_df() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -171563,7 +171564,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171589,7 +171590,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171669,7 +171670,7 @@ void m68000_device::add_w_dd_adr16_df() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171693,7 +171694,7 @@ void m68000_device::add_w_dd_adr16_df() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171794,7 +171795,7 @@ void m68000_device::add_w_dd_adr32_df() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171818,7 +171819,7 @@ void m68000_device::add_w_dd_adr32_df() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171877,12 +171878,12 @@ void m68000_device::addx_l_ds_dd_df() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171902,7 +171903,7 @@ void m68000_device::addx_l_ds_dd_df() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -171911,7 +171912,7 @@ void m68000_device::addx_l_ds_dd_df() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171929,13 +171930,13 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171956,11 +171957,11 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171982,7 +171983,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -172005,7 +172006,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -172030,7 +172031,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -172050,7 +172051,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172077,7 +172078,7 @@ void m68000_device::addx_l_pais_paid_df() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -172108,7 +172109,7 @@ void m68000_device::add_l_dd_ais_df() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172155,7 +172156,7 @@ void m68000_device::add_l_dd_ais_df() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172180,7 +172181,7 @@ void m68000_device::add_l_dd_ais_df() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172235,7 +172236,7 @@ void m68000_device::add_l_dd_aips_df() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172285,7 +172286,7 @@ void m68000_device::add_l_dd_aips_df() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172310,7 +172311,7 @@ void m68000_device::add_l_dd_aips_df() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172364,7 +172365,7 @@ void m68000_device::add_l_dd_pais_df() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -172416,7 +172417,7 @@ void m68000_device::add_l_dd_pais_df() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172441,7 +172442,7 @@ void m68000_device::add_l_dd_pais_df() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172517,7 +172518,7 @@ void m68000_device::add_l_dd_das_df() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172564,7 +172565,7 @@ void m68000_device::add_l_dd_das_df() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172589,7 +172590,7 @@ void m68000_device::add_l_dd_das_df() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172642,7 +172643,7 @@ void m68000_device::add_l_dd_dais_df() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -172703,7 +172704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172750,7 +172751,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172775,7 +172776,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172853,7 +172854,7 @@ void m68000_device::add_l_dd_adr16_df() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172900,7 +172901,7 @@ void m68000_device::add_l_dd_adr16_df() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172925,7 +172926,7 @@ void m68000_device::add_l_dd_adr16_df() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173024,7 +173025,7 @@ void m68000_device::add_l_dd_adr32_df() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173071,7 +173072,7 @@ void m68000_device::add_l_dd_adr32_df() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173096,7 +173097,7 @@ void m68000_device::add_l_dd_adr32_df() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173153,7 +173154,7 @@ void m68000_device::adda_l_ds_ad_df() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173176,7 +173177,7 @@ void m68000_device::adda_l_ds_ad_df() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173201,7 +173202,7 @@ void m68000_device::adda_l_as_ad_df() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173224,7 +173225,7 @@ void m68000_device::adda_l_as_ad_df() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173247,7 +173248,7 @@ void m68000_device::adda_l_ais_ad_df() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173294,11 +173295,11 @@ void m68000_device::adda_l_ais_ad_df() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173338,7 +173339,7 @@ void m68000_device::adda_l_aips_ad_df() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173388,11 +173389,11 @@ void m68000_device::adda_l_aips_ad_df() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173431,7 +173432,7 @@ void m68000_device::adda_l_pais_ad_df() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -173483,11 +173484,11 @@ void m68000_device::adda_l_pais_ad_df() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173548,7 +173549,7 @@ void m68000_device::adda_l_das_ad_df() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173595,11 +173596,11 @@ void m68000_device::adda_l_das_ad_df() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173637,7 +173638,7 @@ void m68000_device::adda_l_dais_ad_df() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -173698,7 +173699,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173745,11 +173746,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173812,7 +173813,7 @@ void m68000_device::adda_l_adr16_ad_df() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173859,11 +173860,11 @@ void m68000_device::adda_l_adr16_ad_df() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173947,7 +173948,7 @@ void m68000_device::adda_l_adr32_ad_df() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173994,11 +173995,11 @@ void m68000_device::adda_l_adr32_ad_df() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174058,7 +174059,7 @@ void m68000_device::adda_l_dpc_ad_df() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174105,11 +174106,11 @@ void m68000_device::adda_l_dpc_ad_df() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174146,7 +174147,7 @@ void m68000_device::adda_l_dpci_ad_df() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -174207,7 +174208,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174254,11 +174255,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174344,7 +174345,7 @@ void m68000_device::adda_l_imm32_ad_df() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -174367,7 +174368,7 @@ void m68000_device::adda_l_imm32_ad_df() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -174391,13 +174392,13 @@ void m68000_device::asr_b_imm3_ds_df() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174426,7 +174427,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174456,13 +174457,13 @@ void m68000_device::lsr_b_imm3_ds_df() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174491,7 +174492,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174521,13 +174522,13 @@ void m68000_device::roxr_b_imm3_ds_df() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174556,7 +174557,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174586,13 +174587,13 @@ void m68000_device::ror_b_imm3_ds_df() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174621,7 +174622,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174652,13 +174653,13 @@ void m68000_device::asr_b_dd_ds_df() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174687,7 +174688,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174718,13 +174719,13 @@ void m68000_device::lsr_b_dd_ds_df() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174753,7 +174754,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174784,13 +174785,13 @@ void m68000_device::roxr_b_dd_ds_df() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174819,7 +174820,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174850,13 +174851,13 @@ void m68000_device::ror_b_dd_ds_df() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174885,7 +174886,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174915,13 +174916,13 @@ void m68000_device::asr_w_imm3_ds_df() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174950,7 +174951,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174980,13 +174981,13 @@ void m68000_device::lsr_w_imm3_ds_df() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175015,7 +175016,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175045,13 +175046,13 @@ void m68000_device::roxr_w_imm3_ds_df() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175080,7 +175081,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175110,13 +175111,13 @@ void m68000_device::ror_w_imm3_ds_df() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175145,7 +175146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175176,13 +175177,13 @@ void m68000_device::asr_w_dd_ds_df() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175211,7 +175212,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175242,13 +175243,13 @@ void m68000_device::lsr_w_dd_ds_df() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175277,7 +175278,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175308,13 +175309,13 @@ void m68000_device::roxr_w_dd_ds_df() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175343,7 +175344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175374,13 +175375,13 @@ void m68000_device::ror_w_dd_ds_df() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175409,7 +175410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175439,13 +175440,13 @@ void m68000_device::asr_l_imm3_ds_df() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175474,7 +175475,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175491,7 +175492,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175510,13 +175511,13 @@ void m68000_device::lsr_l_imm3_ds_df() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175545,7 +175546,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175562,7 +175563,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175581,13 +175582,13 @@ void m68000_device::roxr_l_imm3_ds_df() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175616,7 +175617,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175633,7 +175634,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175652,13 +175653,13 @@ void m68000_device::ror_l_imm3_ds_df() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175687,7 +175688,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175704,7 +175705,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175724,13 +175725,13 @@ void m68000_device::asr_l_dd_ds_df() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175759,7 +175760,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175776,7 +175777,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175796,13 +175797,13 @@ void m68000_device::lsr_l_dd_ds_df() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175831,7 +175832,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175848,7 +175849,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175868,13 +175869,13 @@ void m68000_device::roxr_l_dd_ds_df() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175903,7 +175904,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175920,7 +175921,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175940,13 +175941,13 @@ void m68000_device::ror_l_dd_ds_df() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175975,7 +175976,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175992,7 +175993,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -176010,7 +176011,7 @@ void m68000_device::asr_ais_df() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176036,12 +176037,12 @@ void m68000_device::asr_ais_df() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176104,7 +176105,7 @@ void m68000_device::asr_aips_df() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176128,12 +176129,12 @@ void m68000_device::asr_aips_df() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176198,7 +176199,7 @@ void m68000_device::asr_pais_df() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176222,12 +176223,12 @@ void m68000_device::asr_pais_df() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176306,7 +176307,7 @@ void m68000_device::asr_das_df() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176332,12 +176333,12 @@ void m68000_device::asr_das_df() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176392,7 +176393,7 @@ void m68000_device::asr_dais_df() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -176454,7 +176455,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176480,12 +176481,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176565,7 +176566,7 @@ void m68000_device::asr_adr16_df() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176589,12 +176590,12 @@ void m68000_device::asr_adr16_df() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176695,7 +176696,7 @@ void m68000_device::asr_adr32_df() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176719,12 +176720,12 @@ void m68000_device::asr_adr32_df() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176782,13 +176783,13 @@ void m68000_device::asl_b_imm3_ds_df() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176817,7 +176818,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176847,13 +176848,13 @@ void m68000_device::lsl_b_imm3_ds_df() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176896,7 +176897,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176913,13 +176914,13 @@ void m68000_device::roxl_b_imm3_ds_df() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176948,7 +176949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176978,13 +176979,13 @@ void m68000_device::rol_b_imm3_ds_df() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177013,7 +177014,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177044,13 +177045,13 @@ void m68000_device::asl_b_dd_ds_df() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177079,7 +177080,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177110,13 +177111,13 @@ void m68000_device::lsl_b_dd_ds_df() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177145,7 +177146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177159,7 +177160,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177177,13 +177178,13 @@ void m68000_device::roxl_b_dd_ds_df() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177212,7 +177213,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177243,13 +177244,13 @@ void m68000_device::rol_b_dd_ds_df() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177278,7 +177279,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177308,13 +177309,13 @@ void m68000_device::asl_w_imm3_ds_df() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177343,7 +177344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177373,13 +177374,13 @@ void m68000_device::lsl_w_imm3_ds_df() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177408,7 +177409,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177422,7 +177423,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177439,13 +177440,13 @@ void m68000_device::roxl_w_imm3_ds_df() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177474,7 +177475,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177504,13 +177505,13 @@ void m68000_device::rol_w_imm3_ds_df() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177539,7 +177540,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177570,13 +177571,13 @@ void m68000_device::asl_w_dd_ds_df() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177605,7 +177606,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177636,13 +177637,13 @@ void m68000_device::lsl_w_dd_ds_df() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177671,7 +177672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177685,7 +177686,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177703,13 +177704,13 @@ void m68000_device::roxl_w_dd_ds_df() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177738,7 +177739,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177769,13 +177770,13 @@ void m68000_device::rol_w_dd_ds_df() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177804,7 +177805,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177834,13 +177835,13 @@ void m68000_device::asl_l_imm3_ds_df() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177869,7 +177870,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177886,7 +177887,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177905,13 +177906,13 @@ void m68000_device::lsl_l_imm3_ds_df() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177940,7 +177941,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177952,14 +177953,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177978,13 +177979,13 @@ void m68000_device::roxl_l_imm3_ds_df() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178013,7 +178014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178030,7 +178031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178049,13 +178050,13 @@ void m68000_device::rol_l_imm3_ds_df() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178084,7 +178085,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178101,7 +178102,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178121,13 +178122,13 @@ void m68000_device::asl_l_dd_ds_df() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178156,7 +178157,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178173,7 +178174,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178193,13 +178194,13 @@ void m68000_device::lsl_l_dd_ds_df() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178228,7 +178229,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178240,14 +178241,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178267,13 +178268,13 @@ void m68000_device::roxl_l_dd_ds_df() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178302,7 +178303,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178319,7 +178320,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178339,13 +178340,13 @@ void m68000_device::rol_l_dd_ds_df() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178374,7 +178375,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178391,7 +178392,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178409,7 +178410,7 @@ void m68000_device::asl_ais_df() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178435,12 +178436,12 @@ void m68000_device::asl_ais_df() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178503,7 +178504,7 @@ void m68000_device::asl_aips_df() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178527,12 +178528,12 @@ void m68000_device::asl_aips_df() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178597,7 +178598,7 @@ void m68000_device::asl_pais_df() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178621,12 +178622,12 @@ void m68000_device::asl_pais_df() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178705,7 +178706,7 @@ void m68000_device::asl_das_df() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178731,12 +178732,12 @@ void m68000_device::asl_das_df() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178791,7 +178792,7 @@ void m68000_device::asl_dais_df() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -178853,7 +178854,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178879,12 +178880,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178964,7 +178965,7 @@ void m68000_device::asl_adr16_df() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178988,12 +178989,12 @@ void m68000_device::asl_adr16_df() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179094,7 +179095,7 @@ void m68000_device::asl_adr32_df() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179118,12 +179119,12 @@ void m68000_device::asl_adr32_df() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179180,7 +179181,7 @@ void m68000_device::lsr_ais_df() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179206,12 +179207,12 @@ void m68000_device::lsr_ais_df() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179274,7 +179275,7 @@ void m68000_device::lsr_aips_df() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179298,12 +179299,12 @@ void m68000_device::lsr_aips_df() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179368,7 +179369,7 @@ void m68000_device::lsr_pais_df() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179392,12 +179393,12 @@ void m68000_device::lsr_pais_df() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179476,7 +179477,7 @@ void m68000_device::lsr_das_df() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179502,12 +179503,12 @@ void m68000_device::lsr_das_df() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179562,7 +179563,7 @@ void m68000_device::lsr_dais_df() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -179624,7 +179625,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179650,12 +179651,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179735,7 +179736,7 @@ void m68000_device::lsr_adr16_df() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179759,12 +179760,12 @@ void m68000_device::lsr_adr16_df() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179865,7 +179866,7 @@ void m68000_device::lsr_adr32_df() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179889,12 +179890,12 @@ void m68000_device::lsr_adr32_df() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179951,11 +179952,11 @@ void m68000_device::lsl_ais_df() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -179978,12 +179979,12 @@ void m68000_device::lsl_ais_df() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180010,7 +180011,7 @@ void m68000_device::lsl_ais_df() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180044,12 +180045,12 @@ void m68000_device::lsl_aips_df() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180073,12 +180074,12 @@ void m68000_device::lsl_aips_df() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180105,7 +180106,7 @@ void m68000_device::lsl_aips_df() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180138,7 +180139,7 @@ void m68000_device::lsl_pais_df() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180146,7 +180147,7 @@ void m68000_device::lsl_pais_df() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180170,12 +180171,12 @@ void m68000_device::lsl_pais_df() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180202,7 +180203,7 @@ void m68000_device::lsl_pais_df() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180233,7 +180234,7 @@ void m68000_device::lsl_das_df() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180256,11 +180257,11 @@ void m68000_device::lsl_das_df() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180283,12 +180284,12 @@ void m68000_device::lsl_das_df() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180315,7 +180316,7 @@ void m68000_device::lsl_das_df() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180344,14 +180345,14 @@ void m68000_device::lsl_dais_df() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180359,7 +180360,7 @@ void m68000_device::lsl_dais_df() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180383,7 +180384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180409,11 +180410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180436,12 +180437,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180468,7 +180469,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180501,7 +180502,7 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180524,7 +180525,7 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180548,12 +180549,12 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180580,7 +180581,7 @@ void m68000_device::lsl_adr16_df() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180611,7 +180612,7 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180635,7 +180636,7 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180658,7 +180659,7 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180682,12 +180683,12 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180714,7 +180715,7 @@ void m68000_device::lsl_adr32_df() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180745,7 +180746,7 @@ void m68000_device::roxr_ais_df() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180771,12 +180772,12 @@ void m68000_device::roxr_ais_df() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180839,7 +180840,7 @@ void m68000_device::roxr_aips_df() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180863,12 +180864,12 @@ void m68000_device::roxr_aips_df() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180933,7 +180934,7 @@ void m68000_device::roxr_pais_df() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180957,12 +180958,12 @@ void m68000_device::roxr_pais_df() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181041,7 +181042,7 @@ void m68000_device::roxr_das_df() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181067,12 +181068,12 @@ void m68000_device::roxr_das_df() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181127,7 +181128,7 @@ void m68000_device::roxr_dais_df() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181189,7 +181190,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181215,12 +181216,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181300,7 +181301,7 @@ void m68000_device::roxr_adr16_df() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181324,12 +181325,12 @@ void m68000_device::roxr_adr16_df() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181430,7 +181431,7 @@ void m68000_device::roxr_adr32_df() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181454,12 +181455,12 @@ void m68000_device::roxr_adr32_df() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181516,7 +181517,7 @@ void m68000_device::roxl_ais_df() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181542,12 +181543,12 @@ void m68000_device::roxl_ais_df() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181610,7 +181611,7 @@ void m68000_device::roxl_aips_df() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181634,12 +181635,12 @@ void m68000_device::roxl_aips_df() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181704,7 +181705,7 @@ void m68000_device::roxl_pais_df() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181728,12 +181729,12 @@ void m68000_device::roxl_pais_df() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181812,7 +181813,7 @@ void m68000_device::roxl_das_df() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181838,12 +181839,12 @@ void m68000_device::roxl_das_df() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181898,7 +181899,7 @@ void m68000_device::roxl_dais_df() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181960,7 +181961,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181986,12 +181987,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182071,7 +182072,7 @@ void m68000_device::roxl_adr16_df() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182095,12 +182096,12 @@ void m68000_device::roxl_adr16_df() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182201,7 +182202,7 @@ void m68000_device::roxl_adr32_df() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182225,12 +182226,12 @@ void m68000_device::roxl_adr32_df() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182287,7 +182288,7 @@ void m68000_device::ror_ais_df() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182313,12 +182314,12 @@ void m68000_device::ror_ais_df() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182381,7 +182382,7 @@ void m68000_device::ror_aips_df() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182405,12 +182406,12 @@ void m68000_device::ror_aips_df() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182475,7 +182476,7 @@ void m68000_device::ror_pais_df() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182499,12 +182500,12 @@ void m68000_device::ror_pais_df() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182583,7 +182584,7 @@ void m68000_device::ror_das_df() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182609,12 +182610,12 @@ void m68000_device::ror_das_df() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182669,7 +182670,7 @@ void m68000_device::ror_dais_df() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182731,7 +182732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182757,12 +182758,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182842,7 +182843,7 @@ void m68000_device::ror_adr16_df() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182866,12 +182867,12 @@ void m68000_device::ror_adr16_df() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182972,7 +182973,7 @@ void m68000_device::ror_adr32_df() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182996,12 +182997,12 @@ void m68000_device::ror_adr32_df() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183058,7 +183059,7 @@ void m68000_device::rol_ais_df() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183084,12 +183085,12 @@ void m68000_device::rol_ais_df() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183152,7 +183153,7 @@ void m68000_device::rol_aips_df() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183176,12 +183177,12 @@ void m68000_device::rol_aips_df() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183246,7 +183247,7 @@ void m68000_device::rol_pais_df() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183270,12 +183271,12 @@ void m68000_device::rol_pais_df() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183354,7 +183355,7 @@ void m68000_device::rol_das_df() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183380,12 +183381,12 @@ void m68000_device::rol_das_df() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183440,7 +183441,7 @@ void m68000_device::rol_dais_df() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183502,7 +183503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183528,12 +183529,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183613,7 +183614,7 @@ void m68000_device::rol_adr16_df() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183637,12 +183638,12 @@ void m68000_device::rol_adr16_df() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183743,7 +183744,7 @@ void m68000_device::rol_adr32_df() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183767,12 +183768,12 @@ void m68000_device::rol_adr32_df() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000-sdp.cpp b/src/devices/cpu/m68000/m68000-sdp.cpp
index 998ffc46cc4..1ce86ea2e52 100644
--- a/src/devices/cpu/m68000/m68000-sdp.cpp
+++ b/src/devices/cpu/m68000/m68000-sdp.cpp
@@ -209,7 +209,7 @@ void m68000_device::state_bus_error_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -219,7 +219,7 @@ void m68000_device::state_bus_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -245,7 +245,7 @@ void m68000_device::state_bus_error_dp()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -270,7 +270,7 @@ void m68000_device::state_bus_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -299,7 +299,7 @@ void m68000_device::state_bus_error_dp()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -324,7 +324,7 @@ void m68000_device::state_bus_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -352,7 +352,7 @@ void m68000_device::state_bus_error_dp()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -378,7 +378,7 @@ void m68000_device::state_bus_error_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -525,7 +525,7 @@ void m68000_device::state_address_error_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -535,7 +535,7 @@ void m68000_device::state_address_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -561,7 +561,7 @@ void m68000_device::state_address_error_dp()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -586,7 +586,7 @@ void m68000_device::state_address_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -615,7 +615,7 @@ void m68000_device::state_address_error_dp()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -640,7 +640,7 @@ void m68000_device::state_address_error_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -668,7 +668,7 @@ void m68000_device::state_address_error_dp()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -694,7 +694,7 @@ void m68000_device::state_address_error_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -851,7 +851,7 @@ void m68000_device::state_interrupt_dp()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -863,7 +863,7 @@ void m68000_device::state_interrupt_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -925,7 +925,7 @@ void m68000_device::state_interrupt_dp()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -951,7 +951,7 @@ void m68000_device::state_interrupt_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1096,7 +1096,7 @@ void m68000_device::state_trace_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1106,7 +1106,7 @@ void m68000_device::state_trace_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1134,7 +1134,7 @@ void m68000_device::state_trace_dp()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1160,7 +1160,7 @@ void m68000_device::state_trace_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1305,7 +1305,7 @@ void m68000_device::state_illegal_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1315,7 +1315,7 @@ void m68000_device::state_illegal_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1343,7 +1343,7 @@ void m68000_device::state_illegal_dp()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1369,7 +1369,7 @@ void m68000_device::state_illegal_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1514,7 +1514,7 @@ void m68000_device::state_priviledge_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1524,7 +1524,7 @@ void m68000_device::state_priviledge_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1552,7 +1552,7 @@ void m68000_device::state_priviledge_dp()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1578,7 +1578,7 @@ void m68000_device::state_priviledge_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1723,7 +1723,7 @@ void m68000_device::state_linea_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1733,7 +1733,7 @@ void m68000_device::state_linea_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1761,7 +1761,7 @@ void m68000_device::state_linea_dp()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1787,7 +1787,7 @@ void m68000_device::state_linea_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1932,7 +1932,7 @@ void m68000_device::state_linef_dp()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1942,7 +1942,7 @@ void m68000_device::state_linef_dp()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1970,7 +1970,7 @@ void m68000_device::state_linef_dp()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1996,7 +1996,7 @@ void m68000_device::state_linef_dp()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2138,7 +2138,7 @@ void m68000_device::ori_b_imm8_ds_dp() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2164,7 +2164,7 @@ void m68000_device::ori_b_imm8_ds_dp() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2172,7 +2172,7 @@ void m68000_device::ori_b_imm8_ds_dp() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2213,7 +2213,7 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2238,11 +2238,11 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2264,7 +2264,7 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2294,7 +2294,7 @@ void m68000_device::ori_b_imm8_ais_dp() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2327,7 +2327,7 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2355,12 +2355,12 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2383,7 +2383,7 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2413,7 +2413,7 @@ void m68000_device::ori_b_imm8_aips_dp() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2446,7 +2446,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2473,7 +2473,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2481,7 +2481,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2504,7 +2504,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2534,7 +2534,7 @@ void m68000_device::ori_b_imm8_pais_dp() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2567,7 +2567,7 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2592,7 +2592,7 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2618,11 +2618,11 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2644,7 +2644,7 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2674,7 +2674,7 @@ void m68000_device::ori_b_imm8_das_dp() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2707,7 +2707,7 @@ void m68000_device::ori_b_imm8_dais_dp() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2730,14 +2730,14 @@ void m68000_device::ori_b_imm8_dais_dp() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2745,7 +2745,7 @@ void m68000_device::ori_b_imm8_dais_dp() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2772,7 +2772,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2801,11 +2801,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2827,7 +2827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2857,7 +2857,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2889,7 +2889,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2917,7 +2917,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -2943,7 +2943,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -2966,7 +2966,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2996,7 +2996,7 @@ void m68000_device::ori_b_imm8_adr16_dp() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3028,7 +3028,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3054,7 +3054,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3081,7 +3081,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3107,7 +3107,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -3130,7 +3130,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3160,7 +3160,7 @@ void m68000_device::ori_b_imm8_adr32_dp() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3192,7 +3192,7 @@ void m68000_device::ori_imm8_ccr_dp() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3217,21 +3217,21 @@ void m68000_device::ori_imm8_ccr_dp() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3239,7 +3239,7 @@ void m68000_device::ori_imm8_ccr_dp() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3266,11 +3266,11 @@ void m68000_device::ori_imm8_ccr_dp() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3311,7 +3311,7 @@ void m68000_device::ori_w_imm16_ds_dp() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3337,7 +3337,7 @@ void m68000_device::ori_w_imm16_ds_dp() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3345,7 +3345,7 @@ void m68000_device::ori_w_imm16_ds_dp() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3386,7 +3386,7 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3411,11 +3411,11 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3441,7 +3441,7 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3471,7 +3471,7 @@ void m68000_device::ori_w_imm16_ais_dp() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3510,7 +3510,7 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3538,12 +3538,12 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3570,7 +3570,7 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3600,7 +3600,7 @@ void m68000_device::ori_w_imm16_aips_dp() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3639,7 +3639,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3666,7 +3666,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3674,7 +3674,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3701,7 +3701,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3731,7 +3731,7 @@ void m68000_device::ori_w_imm16_pais_dp() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3770,7 +3770,7 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3795,7 +3795,7 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3821,11 +3821,11 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3851,7 +3851,7 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3881,7 +3881,7 @@ void m68000_device::ori_w_imm16_das_dp() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3920,7 +3920,7 @@ void m68000_device::ori_w_imm16_dais_dp() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3943,14 +3943,14 @@ void m68000_device::ori_w_imm16_dais_dp() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3958,7 +3958,7 @@ void m68000_device::ori_w_imm16_dais_dp() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3985,7 +3985,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4014,11 +4014,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4044,7 +4044,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4074,7 +4074,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4112,7 +4112,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4140,7 +4140,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -4166,7 +4166,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4193,7 +4193,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4223,7 +4223,7 @@ void m68000_device::ori_w_imm16_adr16_dp() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4261,7 +4261,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4287,7 +4287,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4314,7 +4314,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -4340,7 +4340,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -4367,7 +4367,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4397,7 +4397,7 @@ void m68000_device::ori_w_imm16_adr32_dp() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4439,7 +4439,7 @@ void m68000_device::ori_i16u_sr_dp() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4464,23 +4464,23 @@ void m68000_device::ori_i16u_sr_dp() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4488,7 +4488,7 @@ void m68000_device::ori_i16u_sr_dp() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4515,11 +4515,11 @@ void m68000_device::ori_i16u_sr_dp() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4559,7 +4559,7 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4585,7 +4585,7 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4611,12 +4611,12 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4639,7 +4639,7 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4648,7 +4648,7 @@ void m68000_device::ori_l_imm32_ds_dp() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4668,7 +4668,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4694,7 +4694,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4719,7 +4719,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4747,7 +4747,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4773,7 +4773,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4801,7 +4801,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4829,7 +4829,7 @@ void m68000_device::ori_l_imm32_ais_dp() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4867,7 +4867,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4893,7 +4893,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4918,7 +4918,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4946,11 +4946,11 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4976,7 +4976,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5004,7 +5004,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5032,7 +5032,7 @@ void m68000_device::ori_l_imm32_aips_dp() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5070,7 +5070,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5096,7 +5096,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5120,14 +5120,14 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5154,7 +5154,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5180,7 +5180,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5208,7 +5208,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5236,7 +5236,7 @@ void m68000_device::ori_l_imm32_pais_dp() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5274,7 +5274,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5300,7 +5300,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5325,7 +5325,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5350,7 +5350,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5378,7 +5378,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5404,7 +5404,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5432,7 +5432,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5460,7 +5460,7 @@ void m68000_device::ori_l_imm32_das_dp() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5498,7 +5498,7 @@ void m68000_device::ori_l_imm32_dais_dp() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5524,7 +5524,7 @@ void m68000_device::ori_l_imm32_dais_dp() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5547,14 +5547,14 @@ void m68000_device::ori_l_imm32_dais_dp() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -5562,7 +5562,7 @@ void m68000_device::ori_l_imm32_dais_dp() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5589,7 +5589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5617,7 +5617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5645,7 +5645,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5671,7 +5671,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5699,7 +5699,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5727,7 +5727,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5764,7 +5764,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5790,7 +5790,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5818,7 +5818,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5844,7 +5844,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5872,7 +5872,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5898,7 +5898,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5926,7 +5926,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5954,7 +5954,7 @@ void m68000_device::ori_l_imm32_adr16_dp() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5991,7 +5991,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6017,7 +6017,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6043,7 +6043,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6070,7 +6070,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -6096,7 +6096,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6124,7 +6124,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -6150,7 +6150,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6178,7 +6178,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6206,7 +6206,7 @@ void m68000_device::ori_l_imm32_adr32_dp() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -6248,13 +6248,13 @@ void m68000_device::btst_dd_ds_dp() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6286,7 +6286,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6300,7 +6300,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6322,7 +6322,7 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6347,7 +6347,7 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6368,7 +6368,7 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6392,7 +6392,7 @@ void m68000_device::movep_w_das_dd_dp() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6432,11 +6432,11 @@ void m68000_device::btst_dd_ais_dp() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6458,13 +6458,13 @@ void m68000_device::btst_dd_ais_dp() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6507,12 +6507,12 @@ void m68000_device::btst_dd_aips_dp() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6535,13 +6535,13 @@ void m68000_device::btst_dd_aips_dp() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6583,7 +6583,7 @@ void m68000_device::btst_dd_pais_dp() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6591,7 +6591,7 @@ void m68000_device::btst_dd_pais_dp() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6614,13 +6614,13 @@ void m68000_device::btst_dd_pais_dp() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6660,7 +6660,7 @@ void m68000_device::btst_dd_das_dp() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6686,11 +6686,11 @@ void m68000_device::btst_dd_das_dp() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6712,13 +6712,13 @@ void m68000_device::btst_dd_das_dp() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6756,14 +6756,14 @@ void m68000_device::btst_dd_dais_dp() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6771,7 +6771,7 @@ void m68000_device::btst_dd_dais_dp() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6798,7 +6798,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6827,11 +6827,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6853,13 +6853,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6901,7 +6901,7 @@ void m68000_device::btst_dd_adr16_dp() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6927,7 +6927,7 @@ void m68000_device::btst_dd_adr16_dp() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -6950,13 +6950,13 @@ void m68000_device::btst_dd_adr16_dp() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6996,7 +6996,7 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7023,7 +7023,7 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7049,7 +7049,7 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -7072,13 +7072,13 @@ void m68000_device::btst_dd_adr32_dp() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7117,7 +7117,7 @@ void m68000_device::btst_dd_dpc_dp() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7143,11 +7143,11 @@ void m68000_device::btst_dd_dpc_dp() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7169,13 +7169,13 @@ void m68000_device::btst_dd_dpc_dp() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7212,14 +7212,14 @@ void m68000_device::btst_dd_dpci_dp() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7227,7 +7227,7 @@ void m68000_device::btst_dd_dpci_dp() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7254,7 +7254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7283,11 +7283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,13 +7309,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7357,7 +7357,7 @@ void m68000_device::btst_dd_imm_dp() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7385,12 +7385,12 @@ void m68000_device::btst_dd_imm_dp() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7422,7 +7422,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7436,7 +7436,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7462,13 +7462,13 @@ void m68000_device::bchg_dd_ds_dp() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -7500,7 +7500,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7513,14 +7513,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7542,7 +7542,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7567,7 +7567,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7587,7 +7587,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7608,7 +7608,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7629,7 +7629,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7653,7 +7653,7 @@ void m68000_device::movep_l_das_dd_dp() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7693,11 +7693,11 @@ void m68000_device::bchg_dd_ais_dp() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7720,7 +7720,7 @@ void m68000_device::bchg_dd_ais_dp() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7748,7 +7748,7 @@ void m68000_device::bchg_dd_ais_dp() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7785,12 +7785,12 @@ void m68000_device::bchg_dd_aips_dp() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7814,7 +7814,7 @@ void m68000_device::bchg_dd_aips_dp() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7842,7 +7842,7 @@ void m68000_device::bchg_dd_aips_dp() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7878,7 +7878,7 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7886,7 +7886,7 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7910,7 +7910,7 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7938,7 +7938,7 @@ void m68000_device::bchg_dd_pais_dp() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7972,7 +7972,7 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7998,11 +7998,11 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8025,7 +8025,7 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8053,7 +8053,7 @@ void m68000_device::bchg_dd_das_dp() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8085,14 +8085,14 @@ void m68000_device::bchg_dd_dais_dp() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8100,7 +8100,7 @@ void m68000_device::bchg_dd_dais_dp() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8127,7 +8127,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8156,11 +8156,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8183,7 +8183,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8211,7 +8211,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8247,7 +8247,7 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8273,7 +8273,7 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -8297,7 +8297,7 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8325,7 +8325,7 @@ void m68000_device::bchg_dd_adr16_dp() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8359,7 +8359,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8386,7 +8386,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8412,7 +8412,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -8436,7 +8436,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -8464,7 +8464,7 @@ void m68000_device::bchg_dd_adr32_dp() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8502,13 +8502,13 @@ void m68000_device::bclr_dd_ds_dp() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8537,14 +8537,14 @@ void m68000_device::bclr_dd_ds_dp() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8557,18 +8557,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8590,7 +8590,7 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8617,7 +8617,7 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8635,7 +8635,7 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8654,11 +8654,11 @@ void m68000_device::movep_w_dd_das_dp() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8698,11 +8698,11 @@ void m68000_device::bclr_dd_ais_dp() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8724,12 +8724,12 @@ void m68000_device::bclr_dd_ais_dp() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8757,7 +8757,7 @@ void m68000_device::bclr_dd_ais_dp() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8794,12 +8794,12 @@ void m68000_device::bclr_dd_aips_dp() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8822,12 +8822,12 @@ void m68000_device::bclr_dd_aips_dp() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8855,7 +8855,7 @@ void m68000_device::bclr_dd_aips_dp() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8891,7 +8891,7 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8899,7 +8899,7 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8922,12 +8922,12 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8955,7 +8955,7 @@ void m68000_device::bclr_dd_pais_dp() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8989,7 +8989,7 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9015,11 +9015,11 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9041,12 +9041,12 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9074,7 +9074,7 @@ void m68000_device::bclr_dd_das_dp() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9106,14 +9106,14 @@ void m68000_device::bclr_dd_dais_dp() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9121,7 +9121,7 @@ void m68000_device::bclr_dd_dais_dp() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9148,7 +9148,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9177,11 +9177,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9203,12 +9203,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9236,7 +9236,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9272,7 +9272,7 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9298,7 +9298,7 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -9321,12 +9321,12 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9354,7 +9354,7 @@ void m68000_device::bclr_dd_adr16_dp() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9388,7 +9388,7 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9415,7 +9415,7 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9441,7 +9441,7 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9464,12 +9464,12 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -9497,7 +9497,7 @@ void m68000_device::bclr_dd_adr32_dp() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9535,13 +9535,13 @@ void m68000_device::bset_dd_ds_dp() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9573,7 +9573,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9586,14 +9586,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9615,7 +9615,7 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9641,7 +9641,7 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9659,7 +9659,7 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9678,7 +9678,7 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9696,7 +9696,7 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9715,11 +9715,11 @@ void m68000_device::movep_l_dd_das_dp() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9759,11 +9759,11 @@ void m68000_device::bset_dd_ais_dp() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9786,7 +9786,7 @@ void m68000_device::bset_dd_ais_dp() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9814,7 +9814,7 @@ void m68000_device::bset_dd_ais_dp() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9851,12 +9851,12 @@ void m68000_device::bset_dd_aips_dp() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9880,7 +9880,7 @@ void m68000_device::bset_dd_aips_dp() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9908,7 +9908,7 @@ void m68000_device::bset_dd_aips_dp() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9944,7 +9944,7 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9952,7 +9952,7 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9976,7 +9976,7 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10004,7 +10004,7 @@ void m68000_device::bset_dd_pais_dp() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10038,7 +10038,7 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10064,11 +10064,11 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10091,7 +10091,7 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10119,7 +10119,7 @@ void m68000_device::bset_dd_das_dp() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10151,14 +10151,14 @@ void m68000_device::bset_dd_dais_dp() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10166,7 +10166,7 @@ void m68000_device::bset_dd_dais_dp() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10193,7 +10193,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10222,11 +10222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10249,7 +10249,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10277,7 +10277,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10313,7 +10313,7 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10339,7 +10339,7 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10363,7 +10363,7 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10391,7 +10391,7 @@ void m68000_device::bset_dd_adr16_dp() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10425,7 +10425,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10452,7 +10452,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10478,7 +10478,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10502,7 +10502,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10530,7 +10530,7 @@ void m68000_device::bset_dd_adr32_dp() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10565,7 +10565,7 @@ void m68000_device::andi_b_imm8_ds_dp() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10591,7 +10591,7 @@ void m68000_device::andi_b_imm8_ds_dp() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10599,7 +10599,7 @@ void m68000_device::andi_b_imm8_ds_dp() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10640,7 +10640,7 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10665,11 +10665,11 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10691,7 +10691,7 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10721,7 +10721,7 @@ void m68000_device::andi_b_imm8_ais_dp() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10754,7 +10754,7 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10782,12 +10782,12 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10810,7 +10810,7 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10840,7 +10840,7 @@ void m68000_device::andi_b_imm8_aips_dp() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10873,7 +10873,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10900,7 +10900,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10908,7 +10908,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10931,7 +10931,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10961,7 +10961,7 @@ void m68000_device::andi_b_imm8_pais_dp() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10994,7 +10994,7 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11019,7 +11019,7 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11045,11 +11045,11 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11071,7 +11071,7 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11101,7 +11101,7 @@ void m68000_device::andi_b_imm8_das_dp() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11134,7 +11134,7 @@ void m68000_device::andi_b_imm8_dais_dp() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11157,14 +11157,14 @@ void m68000_device::andi_b_imm8_dais_dp() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11172,7 +11172,7 @@ void m68000_device::andi_b_imm8_dais_dp() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11199,7 +11199,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11228,11 +11228,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11254,7 +11254,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11284,7 +11284,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11316,7 +11316,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11344,7 +11344,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11370,7 +11370,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -11393,7 +11393,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11423,7 +11423,7 @@ void m68000_device::andi_b_imm8_adr16_dp() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11455,7 +11455,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11481,7 +11481,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11508,7 +11508,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11534,7 +11534,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -11557,7 +11557,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11587,7 +11587,7 @@ void m68000_device::andi_b_imm8_adr32_dp() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11619,7 +11619,7 @@ void m68000_device::andi_imm8_ccr_dp() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11644,21 +11644,21 @@ void m68000_device::andi_imm8_ccr_dp() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11666,7 +11666,7 @@ void m68000_device::andi_imm8_ccr_dp() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11693,11 +11693,11 @@ void m68000_device::andi_imm8_ccr_dp() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11738,7 +11738,7 @@ void m68000_device::andi_w_imm16_ds_dp() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11764,7 +11764,7 @@ void m68000_device::andi_w_imm16_ds_dp() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11772,7 +11772,7 @@ void m68000_device::andi_w_imm16_ds_dp() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11813,7 +11813,7 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11838,11 +11838,11 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11868,7 +11868,7 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11898,7 +11898,7 @@ void m68000_device::andi_w_imm16_ais_dp() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -11937,7 +11937,7 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11965,12 +11965,12 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -11997,7 +11997,7 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12027,7 +12027,7 @@ void m68000_device::andi_w_imm16_aips_dp() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12066,7 +12066,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12093,7 +12093,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12101,7 +12101,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -12128,7 +12128,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12158,7 +12158,7 @@ void m68000_device::andi_w_imm16_pais_dp() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12197,7 +12197,7 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12222,7 +12222,7 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12248,11 +12248,11 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12278,7 +12278,7 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12308,7 +12308,7 @@ void m68000_device::andi_w_imm16_das_dp() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12347,7 +12347,7 @@ void m68000_device::andi_w_imm16_dais_dp() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12370,14 +12370,14 @@ void m68000_device::andi_w_imm16_dais_dp() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12385,7 +12385,7 @@ void m68000_device::andi_w_imm16_dais_dp() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12412,7 +12412,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12441,11 +12441,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12471,7 +12471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12501,7 +12501,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12539,7 +12539,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12567,7 +12567,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12593,7 +12593,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12620,7 +12620,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12650,7 +12650,7 @@ void m68000_device::andi_w_imm16_adr16_dp() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12688,7 +12688,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12714,7 +12714,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12741,7 +12741,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12767,7 +12767,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -12794,7 +12794,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12824,7 +12824,7 @@ void m68000_device::andi_w_imm16_adr32_dp() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12866,7 +12866,7 @@ void m68000_device::andi_i16u_sr_dp() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12891,23 +12891,23 @@ void m68000_device::andi_i16u_sr_dp() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -12915,7 +12915,7 @@ void m68000_device::andi_i16u_sr_dp() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12942,11 +12942,11 @@ void m68000_device::andi_i16u_sr_dp() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12986,7 +12986,7 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13012,7 +13012,7 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13038,12 +13038,12 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13066,7 +13066,7 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -13075,7 +13075,7 @@ void m68000_device::andi_l_imm32_ds_dp() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -13095,7 +13095,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13121,7 +13121,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13146,7 +13146,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13174,7 +13174,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13200,7 +13200,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13228,7 +13228,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13256,7 +13256,7 @@ void m68000_device::andi_l_imm32_ais_dp() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13294,7 +13294,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13320,7 +13320,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13345,7 +13345,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13373,11 +13373,11 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13403,7 +13403,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13431,7 +13431,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13459,7 +13459,7 @@ void m68000_device::andi_l_imm32_aips_dp() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13497,7 +13497,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13523,7 +13523,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13547,14 +13547,14 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13581,7 +13581,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13607,7 +13607,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13635,7 +13635,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13663,7 +13663,7 @@ void m68000_device::andi_l_imm32_pais_dp() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13701,7 +13701,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13727,7 +13727,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13752,7 +13752,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13777,7 +13777,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -13805,7 +13805,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13831,7 +13831,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13859,7 +13859,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13887,7 +13887,7 @@ void m68000_device::andi_l_imm32_das_dp() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13925,7 +13925,7 @@ void m68000_device::andi_l_imm32_dais_dp() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13951,7 +13951,7 @@ void m68000_device::andi_l_imm32_dais_dp() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13974,14 +13974,14 @@ void m68000_device::andi_l_imm32_dais_dp() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -13989,7 +13989,7 @@ void m68000_device::andi_l_imm32_dais_dp() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14016,7 +14016,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14044,7 +14044,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14072,7 +14072,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14098,7 +14098,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14126,7 +14126,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14154,7 +14154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14191,7 +14191,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14217,7 +14217,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14245,7 +14245,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14271,7 +14271,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14299,7 +14299,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14325,7 +14325,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14381,7 +14381,7 @@ void m68000_device::andi_l_imm32_adr16_dp() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14418,7 +14418,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14444,7 +14444,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14470,7 +14470,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14497,7 +14497,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -14523,7 +14523,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14551,7 +14551,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14577,7 +14577,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14605,7 +14605,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14633,7 +14633,7 @@ void m68000_device::andi_l_imm32_adr32_dp() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14697,7 +14697,7 @@ void m68000_device::subi_b_imm8_ds_dp() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -14769,7 +14769,7 @@ void m68000_device::subi_b_imm8_ais_dp() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14794,7 +14794,7 @@ void m68000_device::subi_b_imm8_ais_dp() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14886,7 +14886,7 @@ void m68000_device::subi_b_imm8_aips_dp() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -14909,7 +14909,7 @@ void m68000_device::subi_b_imm8_aips_dp() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15003,7 +15003,7 @@ void m68000_device::subi_b_imm8_pais_dp() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15026,7 +15026,7 @@ void m68000_device::subi_b_imm8_pais_dp() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15137,7 +15137,7 @@ void m68000_device::subi_b_imm8_das_dp() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15162,7 +15162,7 @@ void m68000_device::subi_b_imm8_das_dp() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15246,7 +15246,7 @@ void m68000_device::subi_b_imm8_dais_dp() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -15314,7 +15314,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15339,7 +15339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15451,7 +15451,7 @@ void m68000_device::subi_b_imm8_adr16_dp() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15474,7 +15474,7 @@ void m68000_device::subi_b_imm8_adr16_dp() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15610,7 +15610,7 @@ void m68000_device::subi_b_imm8_adr32_dp() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -15633,7 +15633,7 @@ void m68000_device::subi_b_imm8_adr32_dp() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15720,7 +15720,7 @@ void m68000_device::subi_w_imm16_ds_dp() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -15792,7 +15792,7 @@ void m68000_device::subi_w_imm16_ais_dp() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15821,7 +15821,7 @@ void m68000_device::subi_w_imm16_ais_dp() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15919,7 +15919,7 @@ void m68000_device::subi_w_imm16_aips_dp() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15946,7 +15946,7 @@ void m68000_device::subi_w_imm16_aips_dp() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16046,7 +16046,7 @@ void m68000_device::subi_w_imm16_pais_dp() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -16073,7 +16073,7 @@ void m68000_device::subi_w_imm16_pais_dp() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16190,7 +16190,7 @@ void m68000_device::subi_w_imm16_das_dp() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16219,7 +16219,7 @@ void m68000_device::subi_w_imm16_das_dp() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16309,7 +16309,7 @@ void m68000_device::subi_w_imm16_dais_dp() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16377,7 +16377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16406,7 +16406,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16524,7 +16524,7 @@ void m68000_device::subi_w_imm16_adr16_dp() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16551,7 +16551,7 @@ void m68000_device::subi_w_imm16_adr16_dp() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16693,7 +16693,7 @@ void m68000_device::subi_w_imm16_adr32_dp() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -16720,7 +16720,7 @@ void m68000_device::subi_w_imm16_adr32_dp() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16837,7 +16837,7 @@ void m68000_device::subi_l_imm32_ds_dp() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -16864,7 +16864,7 @@ void m68000_device::subi_l_imm32_ds_dp() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -16941,7 +16941,7 @@ void m68000_device::subi_l_imm32_ais_dp() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16994,7 +16994,7 @@ void m68000_device::subi_l_imm32_ais_dp() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17022,7 +17022,7 @@ void m68000_device::subi_l_imm32_ais_dp() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17136,7 +17136,7 @@ void m68000_device::subi_l_imm32_aips_dp() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -17192,7 +17192,7 @@ void m68000_device::subi_l_imm32_aips_dp() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17220,7 +17220,7 @@ void m68000_device::subi_l_imm32_aips_dp() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17333,7 +17333,7 @@ void m68000_device::subi_l_imm32_pais_dp() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -17391,7 +17391,7 @@ void m68000_device::subi_l_imm32_pais_dp() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17419,7 +17419,7 @@ void m68000_device::subi_l_imm32_pais_dp() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17557,7 +17557,7 @@ void m68000_device::subi_l_imm32_das_dp() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17610,7 +17610,7 @@ void m68000_device::subi_l_imm32_das_dp() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17638,7 +17638,7 @@ void m68000_device::subi_l_imm32_das_dp() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17750,7 +17750,7 @@ void m68000_device::subi_l_imm32_dais_dp() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -17817,7 +17817,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17870,7 +17870,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17898,7 +17898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18038,7 +18038,7 @@ void m68000_device::subi_l_imm32_adr16_dp() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -18091,7 +18091,7 @@ void m68000_device::subi_l_imm32_adr16_dp() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18119,7 +18119,7 @@ void m68000_device::subi_l_imm32_adr16_dp() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18283,7 +18283,7 @@ void m68000_device::subi_l_imm32_adr32_dp() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -18336,7 +18336,7 @@ void m68000_device::subi_l_imm32_adr32_dp() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18364,7 +18364,7 @@ void m68000_device::subi_l_imm32_adr32_dp() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18455,7 +18455,7 @@ void m68000_device::addi_b_imm8_ds_dp() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -18527,7 +18527,7 @@ void m68000_device::addi_b_imm8_ais_dp() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18552,7 +18552,7 @@ void m68000_device::addi_b_imm8_ais_dp() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18644,7 +18644,7 @@ void m68000_device::addi_b_imm8_aips_dp() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18667,7 +18667,7 @@ void m68000_device::addi_b_imm8_aips_dp() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18761,7 +18761,7 @@ void m68000_device::addi_b_imm8_pais_dp() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18784,7 +18784,7 @@ void m68000_device::addi_b_imm8_pais_dp() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18895,7 +18895,7 @@ void m68000_device::addi_b_imm8_das_dp() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18920,7 +18920,7 @@ void m68000_device::addi_b_imm8_das_dp() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19004,7 +19004,7 @@ void m68000_device::addi_b_imm8_dais_dp() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19072,7 +19072,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19097,7 +19097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19209,7 +19209,7 @@ void m68000_device::addi_b_imm8_adr16_dp() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19232,7 +19232,7 @@ void m68000_device::addi_b_imm8_adr16_dp() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19368,7 +19368,7 @@ void m68000_device::addi_b_imm8_adr32_dp() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -19391,7 +19391,7 @@ void m68000_device::addi_b_imm8_adr32_dp() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19478,7 +19478,7 @@ void m68000_device::addi_w_imm16_ds_dp() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19550,7 +19550,7 @@ void m68000_device::addi_w_imm16_ais_dp() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19579,7 +19579,7 @@ void m68000_device::addi_w_imm16_ais_dp() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19677,7 +19677,7 @@ void m68000_device::addi_w_imm16_aips_dp() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19704,7 +19704,7 @@ void m68000_device::addi_w_imm16_aips_dp() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19804,7 +19804,7 @@ void m68000_device::addi_w_imm16_pais_dp() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19831,7 +19831,7 @@ void m68000_device::addi_w_imm16_pais_dp() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19948,7 +19948,7 @@ void m68000_device::addi_w_imm16_das_dp() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19977,7 +19977,7 @@ void m68000_device::addi_w_imm16_das_dp() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20067,7 +20067,7 @@ void m68000_device::addi_w_imm16_dais_dp() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -20135,7 +20135,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20164,7 +20164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20282,7 +20282,7 @@ void m68000_device::addi_w_imm16_adr16_dp() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20309,7 +20309,7 @@ void m68000_device::addi_w_imm16_adr16_dp() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20451,7 +20451,7 @@ void m68000_device::addi_w_imm16_adr32_dp() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -20478,7 +20478,7 @@ void m68000_device::addi_w_imm16_adr32_dp() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20595,7 +20595,7 @@ void m68000_device::addi_l_imm32_ds_dp() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -20622,7 +20622,7 @@ void m68000_device::addi_l_imm32_ds_dp() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -20699,7 +20699,7 @@ void m68000_device::addi_l_imm32_ais_dp() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20752,7 +20752,7 @@ void m68000_device::addi_l_imm32_ais_dp() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20780,7 +20780,7 @@ void m68000_device::addi_l_imm32_ais_dp() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20894,7 +20894,7 @@ void m68000_device::addi_l_imm32_aips_dp() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20950,7 +20950,7 @@ void m68000_device::addi_l_imm32_aips_dp() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20978,7 +20978,7 @@ void m68000_device::addi_l_imm32_aips_dp() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21091,7 +21091,7 @@ void m68000_device::addi_l_imm32_pais_dp() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -21149,7 +21149,7 @@ void m68000_device::addi_l_imm32_pais_dp() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21177,7 +21177,7 @@ void m68000_device::addi_l_imm32_pais_dp() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21315,7 +21315,7 @@ void m68000_device::addi_l_imm32_das_dp() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21368,7 +21368,7 @@ void m68000_device::addi_l_imm32_das_dp() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21396,7 +21396,7 @@ void m68000_device::addi_l_imm32_das_dp() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21508,7 +21508,7 @@ void m68000_device::addi_l_imm32_dais_dp() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -21575,7 +21575,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21628,7 +21628,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21656,7 +21656,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21796,7 +21796,7 @@ void m68000_device::addi_l_imm32_adr16_dp() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21849,7 +21849,7 @@ void m68000_device::addi_l_imm32_adr16_dp() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21877,7 +21877,7 @@ void m68000_device::addi_l_imm32_adr16_dp() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22041,7 +22041,7 @@ void m68000_device::addi_l_imm32_adr32_dp() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22094,7 +22094,7 @@ void m68000_device::addi_l_imm32_adr32_dp() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22122,7 +22122,7 @@ void m68000_device::addi_l_imm32_adr32_dp() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22188,7 +22188,7 @@ void m68000_device::btst_imm8_ds_dp() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22217,13 +22217,13 @@ void m68000_device::btst_imm8_ds_dp() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22255,7 +22255,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22269,7 +22269,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22292,7 +22292,7 @@ void m68000_device::btst_imm8_ais_dp() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22317,11 +22317,11 @@ void m68000_device::btst_imm8_ais_dp() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22343,13 +22343,13 @@ void m68000_device::btst_imm8_ais_dp() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22390,7 +22390,7 @@ void m68000_device::btst_imm8_aips_dp() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22418,12 +22418,12 @@ void m68000_device::btst_imm8_aips_dp() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22446,13 +22446,13 @@ void m68000_device::btst_imm8_aips_dp() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22493,7 +22493,7 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22520,7 +22520,7 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22528,7 +22528,7 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22551,13 +22551,13 @@ void m68000_device::btst_imm8_pais_dp() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22598,7 +22598,7 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22623,7 +22623,7 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22649,11 +22649,11 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22675,13 +22675,13 @@ void m68000_device::btst_imm8_das_dp() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22722,7 +22722,7 @@ void m68000_device::btst_imm8_dais_dp() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22745,14 +22745,14 @@ void m68000_device::btst_imm8_dais_dp() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22760,7 +22760,7 @@ void m68000_device::btst_imm8_dais_dp() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22787,7 +22787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22816,11 +22816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22842,13 +22842,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22888,7 +22888,7 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22916,7 +22916,7 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22942,7 +22942,7 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -22965,13 +22965,13 @@ void m68000_device::btst_imm8_adr16_dp() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23011,7 +23011,7 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23037,7 +23037,7 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23064,7 +23064,7 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23090,7 +23090,7 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -23113,13 +23113,13 @@ void m68000_device::btst_imm8_adr32_dp() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23159,7 +23159,7 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23184,7 +23184,7 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23210,11 +23210,11 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23236,13 +23236,13 @@ void m68000_device::btst_imm8_dpc_dp() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23282,7 +23282,7 @@ void m68000_device::btst_imm8_dpci_dp() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23305,14 +23305,14 @@ void m68000_device::btst_imm8_dpci_dp() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23320,7 +23320,7 @@ void m68000_device::btst_imm8_dpci_dp() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23347,7 +23347,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23376,11 +23376,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23402,13 +23402,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23449,7 +23449,7 @@ void m68000_device::bchg_imm8_ds_dp() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23478,13 +23478,13 @@ void m68000_device::bchg_imm8_ds_dp() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -23516,7 +23516,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23529,14 +23529,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23559,7 +23559,7 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23584,11 +23584,11 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23611,7 +23611,7 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23639,7 +23639,7 @@ void m68000_device::bchg_imm8_ais_dp() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23674,7 +23674,7 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23702,12 +23702,12 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23731,7 +23731,7 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23759,7 +23759,7 @@ void m68000_device::bchg_imm8_aips_dp() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23794,7 +23794,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23821,7 +23821,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23829,7 +23829,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23853,7 +23853,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23881,7 +23881,7 @@ void m68000_device::bchg_imm8_pais_dp() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23916,7 +23916,7 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23941,7 +23941,7 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23967,11 +23967,11 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23994,7 +23994,7 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24022,7 +24022,7 @@ void m68000_device::bchg_imm8_das_dp() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24057,7 +24057,7 @@ void m68000_device::bchg_imm8_dais_dp() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24080,14 +24080,14 @@ void m68000_device::bchg_imm8_dais_dp() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24095,7 +24095,7 @@ void m68000_device::bchg_imm8_dais_dp() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24122,7 +24122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24151,11 +24151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24178,7 +24178,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24206,7 +24206,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24240,7 +24240,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24268,7 +24268,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24294,7 +24294,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24318,7 +24318,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24346,7 +24346,7 @@ void m68000_device::bchg_imm8_adr16_dp() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24380,7 +24380,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24406,7 +24406,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24433,7 +24433,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24459,7 +24459,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -24483,7 +24483,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -24511,7 +24511,7 @@ void m68000_device::bchg_imm8_adr32_dp() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24546,7 +24546,7 @@ void m68000_device::bclr_imm8_ds_dp() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24575,13 +24575,13 @@ void m68000_device::bclr_imm8_ds_dp() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24610,14 +24610,14 @@ void m68000_device::bclr_imm8_ds_dp() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24630,18 +24630,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24664,7 +24664,7 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24689,11 +24689,11 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24715,12 +24715,12 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24748,7 +24748,7 @@ void m68000_device::bclr_imm8_ais_dp() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24783,7 +24783,7 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24811,12 +24811,12 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24839,12 +24839,12 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24872,7 +24872,7 @@ void m68000_device::bclr_imm8_aips_dp() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24907,7 +24907,7 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24934,7 +24934,7 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24942,7 +24942,7 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24965,12 +24965,12 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24998,7 +24998,7 @@ void m68000_device::bclr_imm8_pais_dp() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25033,7 +25033,7 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25058,7 +25058,7 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25084,11 +25084,11 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25110,12 +25110,12 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25143,7 +25143,7 @@ void m68000_device::bclr_imm8_das_dp() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25178,7 +25178,7 @@ void m68000_device::bclr_imm8_dais_dp() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25201,14 +25201,14 @@ void m68000_device::bclr_imm8_dais_dp() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25216,7 +25216,7 @@ void m68000_device::bclr_imm8_dais_dp() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25243,7 +25243,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25272,11 +25272,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25298,12 +25298,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25331,7 +25331,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25365,7 +25365,7 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25393,7 +25393,7 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25419,7 +25419,7 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25442,12 +25442,12 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25475,7 +25475,7 @@ void m68000_device::bclr_imm8_adr16_dp() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25509,7 +25509,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25535,7 +25535,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25562,7 +25562,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25588,7 +25588,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -25611,12 +25611,12 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -25644,7 +25644,7 @@ void m68000_device::bclr_imm8_adr32_dp() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25679,7 +25679,7 @@ void m68000_device::bset_imm8_ds_dp() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25708,13 +25708,13 @@ void m68000_device::bset_imm8_ds_dp() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25746,7 +25746,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25759,14 +25759,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25789,7 +25789,7 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25814,11 +25814,11 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25841,7 +25841,7 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25869,7 +25869,7 @@ void m68000_device::bset_imm8_ais_dp() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25904,7 +25904,7 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25932,12 +25932,12 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -25961,7 +25961,7 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25989,7 +25989,7 @@ void m68000_device::bset_imm8_aips_dp() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26024,7 +26024,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26051,7 +26051,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -26059,7 +26059,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -26083,7 +26083,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26111,7 +26111,7 @@ void m68000_device::bset_imm8_pais_dp() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26146,7 +26146,7 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26171,7 +26171,7 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26197,11 +26197,11 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26224,7 +26224,7 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26252,7 +26252,7 @@ void m68000_device::bset_imm8_das_dp() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26287,7 +26287,7 @@ void m68000_device::bset_imm8_dais_dp() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26310,14 +26310,14 @@ void m68000_device::bset_imm8_dais_dp() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26325,7 +26325,7 @@ void m68000_device::bset_imm8_dais_dp() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26352,7 +26352,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26381,11 +26381,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26408,7 +26408,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26436,7 +26436,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26470,7 +26470,7 @@ void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26498,7 +26498,7 @@ void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -26524,7 +26524,7 @@ void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26548,7 +26548,7 @@ void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26576,7 +26576,7 @@ void m68000_device::bset_imm8_adr16_dp() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26610,7 +26610,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26636,7 +26636,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26663,7 +26663,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26689,7 +26689,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -26713,7 +26713,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -26741,7 +26741,7 @@ void m68000_device::bset_imm8_adr32_dp() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26776,7 +26776,7 @@ void m68000_device::eori_b_imm8_ds_dp() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26802,7 +26802,7 @@ void m68000_device::eori_b_imm8_ds_dp() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -26810,7 +26810,7 @@ void m68000_device::eori_b_imm8_ds_dp() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26851,7 +26851,7 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26876,11 +26876,11 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26902,7 +26902,7 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26932,7 +26932,7 @@ void m68000_device::eori_b_imm8_ais_dp() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -26965,7 +26965,7 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26993,12 +26993,12 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27021,7 +27021,7 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27051,7 +27051,7 @@ void m68000_device::eori_b_imm8_aips_dp() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27084,7 +27084,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27111,7 +27111,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27119,7 +27119,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27142,7 +27142,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27172,7 +27172,7 @@ void m68000_device::eori_b_imm8_pais_dp() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27205,7 +27205,7 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27230,7 +27230,7 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27256,11 +27256,11 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27282,7 +27282,7 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27312,7 +27312,7 @@ void m68000_device::eori_b_imm8_das_dp() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27345,7 +27345,7 @@ void m68000_device::eori_b_imm8_dais_dp() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27368,14 +27368,14 @@ void m68000_device::eori_b_imm8_dais_dp() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27383,7 +27383,7 @@ void m68000_device::eori_b_imm8_dais_dp() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27410,7 +27410,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27439,11 +27439,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27465,7 +27465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27495,7 +27495,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27527,7 +27527,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27555,7 +27555,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -27581,7 +27581,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -27604,7 +27604,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27634,7 +27634,7 @@ void m68000_device::eori_b_imm8_adr16_dp() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27666,7 +27666,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27692,7 +27692,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27719,7 +27719,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -27745,7 +27745,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -27768,7 +27768,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27798,7 +27798,7 @@ void m68000_device::eori_b_imm8_adr32_dp() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27830,7 +27830,7 @@ void m68000_device::eori_imm8_ccr_dp() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27855,21 +27855,21 @@ void m68000_device::eori_imm8_ccr_dp() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -27877,7 +27877,7 @@ void m68000_device::eori_imm8_ccr_dp() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27904,11 +27904,11 @@ void m68000_device::eori_imm8_ccr_dp() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27949,7 +27949,7 @@ void m68000_device::eori_w_imm16_ds_dp() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27975,7 +27975,7 @@ void m68000_device::eori_w_imm16_ds_dp() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -27983,7 +27983,7 @@ void m68000_device::eori_w_imm16_ds_dp() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28024,7 +28024,7 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28049,11 +28049,11 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28079,7 +28079,7 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28109,7 +28109,7 @@ void m68000_device::eori_w_imm16_ais_dp() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28148,7 +28148,7 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28176,12 +28176,12 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28208,7 +28208,7 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28238,7 +28238,7 @@ void m68000_device::eori_w_imm16_aips_dp() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28277,7 +28277,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28304,7 +28304,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28312,7 +28312,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28339,7 +28339,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28369,7 +28369,7 @@ void m68000_device::eori_w_imm16_pais_dp() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28408,7 +28408,7 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28433,7 +28433,7 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28459,11 +28459,11 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28489,7 +28489,7 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28519,7 +28519,7 @@ void m68000_device::eori_w_imm16_das_dp() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28558,7 +28558,7 @@ void m68000_device::eori_w_imm16_dais_dp() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28581,14 +28581,14 @@ void m68000_device::eori_w_imm16_dais_dp() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28596,7 +28596,7 @@ void m68000_device::eori_w_imm16_dais_dp() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28623,7 +28623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28652,11 +28652,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28682,7 +28682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28712,7 +28712,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28750,7 +28750,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28778,7 +28778,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -28804,7 +28804,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -28831,7 +28831,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28861,7 +28861,7 @@ void m68000_device::eori_w_imm16_adr16_dp() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28899,7 +28899,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28925,7 +28925,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28952,7 +28952,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -28978,7 +28978,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -29005,7 +29005,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29035,7 +29035,7 @@ void m68000_device::eori_w_imm16_adr32_dp() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29077,7 +29077,7 @@ void m68000_device::eori_i16u_sr_dp() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29102,23 +29102,23 @@ void m68000_device::eori_i16u_sr_dp() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -29126,7 +29126,7 @@ void m68000_device::eori_i16u_sr_dp() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29153,11 +29153,11 @@ void m68000_device::eori_i16u_sr_dp() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29197,7 +29197,7 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29223,7 +29223,7 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29249,12 +29249,12 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29277,7 +29277,7 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -29286,7 +29286,7 @@ void m68000_device::eori_l_imm32_ds_dp() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -29306,7 +29306,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29332,7 +29332,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29357,7 +29357,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29385,7 +29385,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29411,7 +29411,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29439,7 +29439,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29467,7 +29467,7 @@ void m68000_device::eori_l_imm32_ais_dp() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29505,7 +29505,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29531,7 +29531,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29556,7 +29556,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29584,11 +29584,11 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29614,7 +29614,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29642,7 +29642,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29670,7 +29670,7 @@ void m68000_device::eori_l_imm32_aips_dp() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29708,7 +29708,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29734,7 +29734,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29758,14 +29758,14 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29792,7 +29792,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29818,7 +29818,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29846,7 +29846,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29874,7 +29874,7 @@ void m68000_device::eori_l_imm32_pais_dp() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29912,7 +29912,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29938,7 +29938,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29963,7 +29963,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29988,7 +29988,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30016,7 +30016,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30042,7 +30042,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30070,7 +30070,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30098,7 +30098,7 @@ void m68000_device::eori_l_imm32_das_dp() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30136,7 +30136,7 @@ void m68000_device::eori_l_imm32_dais_dp() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30162,7 +30162,7 @@ void m68000_device::eori_l_imm32_dais_dp() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30185,14 +30185,14 @@ void m68000_device::eori_l_imm32_dais_dp() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -30200,7 +30200,7 @@ void m68000_device::eori_l_imm32_dais_dp() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30227,7 +30227,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30255,7 +30255,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30283,7 +30283,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30309,7 +30309,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30337,7 +30337,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30365,7 +30365,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30402,7 +30402,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30428,7 +30428,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30456,7 +30456,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30482,7 +30482,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30510,7 +30510,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30536,7 +30536,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30564,7 +30564,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30592,7 +30592,7 @@ void m68000_device::eori_l_imm32_adr16_dp() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30629,7 +30629,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30655,7 +30655,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30681,7 +30681,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30708,7 +30708,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -30734,7 +30734,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30762,7 +30762,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30788,7 +30788,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30816,7 +30816,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30844,7 +30844,7 @@ void m68000_device::eori_l_imm32_adr32_dp() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30908,7 +30908,7 @@ void m68000_device::cmpi_b_imm8_ds_dp() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -30979,7 +30979,7 @@ void m68000_device::cmpi_b_imm8_ais_dp() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31004,7 +31004,7 @@ void m68000_device::cmpi_b_imm8_ais_dp() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31080,7 +31080,7 @@ void m68000_device::cmpi_b_imm8_aips_dp() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31103,7 +31103,7 @@ void m68000_device::cmpi_b_imm8_aips_dp() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31181,7 +31181,7 @@ void m68000_device::cmpi_b_imm8_pais_dp() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31204,7 +31204,7 @@ void m68000_device::cmpi_b_imm8_pais_dp() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31299,7 +31299,7 @@ void m68000_device::cmpi_b_imm8_das_dp() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31324,7 +31324,7 @@ void m68000_device::cmpi_b_imm8_das_dp() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31392,7 +31392,7 @@ void m68000_device::cmpi_b_imm8_dais_dp() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31460,7 +31460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31485,7 +31485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31581,7 +31581,7 @@ void m68000_device::cmpi_b_imm8_adr16_dp() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31604,7 +31604,7 @@ void m68000_device::cmpi_b_imm8_adr16_dp() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31724,7 +31724,7 @@ void m68000_device::cmpi_b_imm8_adr32_dp() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -31747,7 +31747,7 @@ void m68000_device::cmpi_b_imm8_adr32_dp() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31818,7 +31818,7 @@ void m68000_device::cmpi_w_imm16_ds_dp() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -31889,7 +31889,7 @@ void m68000_device::cmpi_w_imm16_ais_dp() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31918,7 +31918,7 @@ void m68000_device::cmpi_w_imm16_ais_dp() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31994,7 +31994,7 @@ void m68000_device::cmpi_w_imm16_aips_dp() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32021,7 +32021,7 @@ void m68000_device::cmpi_w_imm16_aips_dp() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32099,7 +32099,7 @@ void m68000_device::cmpi_w_imm16_pais_dp() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32126,7 +32126,7 @@ void m68000_device::cmpi_w_imm16_pais_dp() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32221,7 +32221,7 @@ void m68000_device::cmpi_w_imm16_das_dp() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32250,7 +32250,7 @@ void m68000_device::cmpi_w_imm16_das_dp() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32318,7 +32318,7 @@ void m68000_device::cmpi_w_imm16_dais_dp() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32386,7 +32386,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32415,7 +32415,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32511,7 +32511,7 @@ void m68000_device::cmpi_w_imm16_adr16_dp() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32538,7 +32538,7 @@ void m68000_device::cmpi_w_imm16_adr16_dp() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32658,7 +32658,7 @@ void m68000_device::cmpi_w_imm16_adr32_dp() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -32685,7 +32685,7 @@ void m68000_device::cmpi_w_imm16_adr32_dp() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32781,11 +32781,11 @@ void m68000_device::cmpi_l_imm32_ds_dp() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32881,7 +32881,7 @@ void m68000_device::cmpi_l_imm32_ais_dp() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32934,13 +32934,13 @@ void m68000_device::cmpi_l_imm32_ais_dp() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33031,7 +33031,7 @@ void m68000_device::cmpi_l_imm32_aips_dp() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -33087,13 +33087,13 @@ void m68000_device::cmpi_l_imm32_aips_dp() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33183,7 +33183,7 @@ void m68000_device::cmpi_l_imm32_pais_dp() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -33241,13 +33241,13 @@ void m68000_device::cmpi_l_imm32_pais_dp() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33362,7 +33362,7 @@ void m68000_device::cmpi_l_imm32_das_dp() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33415,13 +33415,13 @@ void m68000_device::cmpi_l_imm32_das_dp() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33510,7 +33510,7 @@ void m68000_device::cmpi_l_imm32_dais_dp() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -33577,7 +33577,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33630,13 +33630,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33753,7 +33753,7 @@ void m68000_device::cmpi_l_imm32_adr16_dp() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33806,13 +33806,13 @@ void m68000_device::cmpi_l_imm32_adr16_dp() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33953,7 +33953,7 @@ void m68000_device::cmpi_l_imm32_adr32_dp() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34006,13 +34006,13 @@ void m68000_device::cmpi_l_imm32_adr32_dp() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34057,7 +34057,7 @@ void m68000_device::move_b_ds_dd_dp() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -34104,7 +34104,7 @@ void m68000_device::move_b_ais_dd_dp() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34130,7 +34130,7 @@ void m68000_device::move_b_ais_dd_dp() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34181,7 +34181,7 @@ void m68000_device::move_b_aips_dd_dp() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34205,7 +34205,7 @@ void m68000_device::move_b_aips_dd_dp() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34258,7 +34258,7 @@ void m68000_device::move_b_pais_dd_dp() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34282,7 +34282,7 @@ void m68000_device::move_b_pais_dd_dp() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34352,7 +34352,7 @@ void m68000_device::move_b_das_dd_dp() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34378,7 +34378,7 @@ void m68000_device::move_b_das_dd_dp() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34421,7 +34421,7 @@ void m68000_device::move_b_dais_dd_dp() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34489,7 +34489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34515,7 +34515,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34586,7 +34586,7 @@ void m68000_device::move_b_adr16_dd_dp() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -34610,7 +34610,7 @@ void m68000_device::move_b_adr16_dd_dp() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34705,7 +34705,7 @@ void m68000_device::move_b_adr32_dd_dp() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34729,7 +34729,7 @@ void m68000_device::move_b_adr32_dd_dp() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34798,7 +34798,7 @@ void m68000_device::move_b_dpc_dd_dp() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34824,7 +34824,7 @@ void m68000_device::move_b_dpc_dd_dp() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34866,7 +34866,7 @@ void m68000_device::move_b_dpci_dd_dp() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34934,7 +34934,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34960,7 +34960,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -35034,7 +35034,7 @@ void m68000_device::move_b_imm8_dd_dp() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -35084,7 +35084,7 @@ void m68000_device::move_b_ds_aid_dp() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35146,7 +35146,7 @@ void m68000_device::move_b_ais_aid_dp() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35171,7 +35171,7 @@ void m68000_device::move_b_ais_aid_dp() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35239,7 +35239,7 @@ void m68000_device::move_b_aips_aid_dp() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35262,7 +35262,7 @@ void m68000_device::move_b_aips_aid_dp() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35332,7 +35332,7 @@ void m68000_device::move_b_pais_aid_dp() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35355,7 +35355,7 @@ void m68000_device::move_b_pais_aid_dp() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35442,7 +35442,7 @@ void m68000_device::move_b_das_aid_dp() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35467,7 +35467,7 @@ void m68000_device::move_b_das_aid_dp() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35527,7 +35527,7 @@ void m68000_device::move_b_dais_aid_dp() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35595,7 +35595,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35620,7 +35620,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35708,7 +35708,7 @@ void m68000_device::move_b_adr16_aid_dp() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -35731,7 +35731,7 @@ void m68000_device::move_b_adr16_aid_dp() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35843,7 +35843,7 @@ void m68000_device::move_b_adr32_aid_dp() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35866,7 +35866,7 @@ void m68000_device::move_b_adr32_aid_dp() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35952,7 +35952,7 @@ void m68000_device::move_b_dpc_aid_dp() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35977,7 +35977,7 @@ void m68000_device::move_b_dpc_aid_dp() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36036,7 +36036,7 @@ void m68000_device::move_b_dpci_aid_dp() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36104,7 +36104,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36129,7 +36129,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36220,7 +36220,7 @@ void m68000_device::move_b_imm8_aid_dp() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36285,7 +36285,7 @@ void m68000_device::move_b_ds_aipd_dp() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36346,7 +36346,7 @@ void m68000_device::move_b_ais_aipd_dp() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36372,7 +36372,7 @@ void m68000_device::move_b_ais_aipd_dp() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36439,7 +36439,7 @@ void m68000_device::move_b_aips_aipd_dp() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36463,7 +36463,7 @@ void m68000_device::move_b_aips_aipd_dp() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36532,7 +36532,7 @@ void m68000_device::move_b_pais_aipd_dp() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36556,7 +36556,7 @@ void m68000_device::move_b_pais_aipd_dp() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36642,7 +36642,7 @@ void m68000_device::move_b_das_aipd_dp() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36668,7 +36668,7 @@ void m68000_device::move_b_das_aipd_dp() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36727,7 +36727,7 @@ void m68000_device::move_b_dais_aipd_dp() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36795,7 +36795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36821,7 +36821,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36908,7 +36908,7 @@ void m68000_device::move_b_adr16_aipd_dp() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -36932,7 +36932,7 @@ void m68000_device::move_b_adr16_aipd_dp() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37043,7 +37043,7 @@ void m68000_device::move_b_adr32_aipd_dp() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37067,7 +37067,7 @@ void m68000_device::move_b_adr32_aipd_dp() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37152,7 +37152,7 @@ void m68000_device::move_b_dpc_aipd_dp() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37178,7 +37178,7 @@ void m68000_device::move_b_dpc_aipd_dp() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37236,7 +37236,7 @@ void m68000_device::move_b_dpci_aipd_dp() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37304,7 +37304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37330,7 +37330,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37420,7 +37420,7 @@ void m68000_device::move_b_imm8_aipd_dp() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37483,7 +37483,7 @@ void m68000_device::move_b_ds_paid_dp() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37545,7 +37545,7 @@ void m68000_device::move_b_ais_paid_dp() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37570,7 +37570,7 @@ void m68000_device::move_b_ais_paid_dp() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37638,7 +37638,7 @@ void m68000_device::move_b_aips_paid_dp() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37661,7 +37661,7 @@ void m68000_device::move_b_aips_paid_dp() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37731,7 +37731,7 @@ void m68000_device::move_b_pais_paid_dp() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37754,7 +37754,7 @@ void m68000_device::move_b_pais_paid_dp() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37841,7 +37841,7 @@ void m68000_device::move_b_das_paid_dp() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37866,7 +37866,7 @@ void m68000_device::move_b_das_paid_dp() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37926,7 +37926,7 @@ void m68000_device::move_b_dais_paid_dp() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37994,7 +37994,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38019,7 +38019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38107,7 +38107,7 @@ void m68000_device::move_b_adr16_paid_dp() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -38130,7 +38130,7 @@ void m68000_device::move_b_adr16_paid_dp() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38242,7 +38242,7 @@ void m68000_device::move_b_adr32_paid_dp() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -38265,7 +38265,7 @@ void m68000_device::move_b_adr32_paid_dp() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68000_device::move_b_dpc_paid_dp() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38376,7 +38376,7 @@ void m68000_device::move_b_dpc_paid_dp() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38435,7 +38435,7 @@ void m68000_device::move_b_dpci_paid_dp() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38503,7 +38503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38528,7 +38528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38618,7 +38618,7 @@ void m68000_device::move_b_imm8_paid_dp() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38706,7 +38706,7 @@ void m68000_device::move_b_ds_dad_dp() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -38769,7 +38769,7 @@ void m68000_device::move_b_ais_dad_dp() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38793,7 +38793,7 @@ void m68000_device::move_b_ais_dad_dp() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68000_device::move_b_aips_dad_dp() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -38913,7 +38913,7 @@ void m68000_device::move_b_aips_dad_dp() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39013,7 +39013,7 @@ void m68000_device::move_b_pais_dad_dp() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -39035,7 +39035,7 @@ void m68000_device::move_b_pais_dad_dp() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39152,7 +39152,7 @@ void m68000_device::move_b_das_dad_dp() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39176,7 +39176,7 @@ void m68000_device::move_b_das_dad_dp() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39266,7 +39266,7 @@ void m68000_device::move_b_dais_dad_dp() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39334,7 +39334,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39358,7 +39358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39476,7 +39476,7 @@ void m68000_device::move_b_adr16_dad_dp() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -39498,7 +39498,7 @@ void m68000_device::move_b_adr16_dad_dp() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39640,7 +39640,7 @@ void m68000_device::move_b_adr32_dad_dp() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -39662,7 +39662,7 @@ void m68000_device::move_b_adr32_dad_dp() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39778,7 +39778,7 @@ void m68000_device::move_b_dpc_dad_dp() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39802,7 +39802,7 @@ void m68000_device::move_b_dpc_dad_dp() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39891,7 +39891,7 @@ void m68000_device::move_b_dpci_dad_dp() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39959,7 +39959,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39983,7 +39983,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40127,7 +40127,7 @@ void m68000_device::move_b_imm8_dad_dp() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40188,7 +40188,7 @@ void m68000_device::move_b_ds_daid_dp() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -40258,7 +40258,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40321,7 +40321,7 @@ void m68000_device::move_b_ais_daid_dp() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40342,7 +40342,7 @@ void m68000_device::move_b_ais_daid_dp() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40357,7 +40357,7 @@ void m68000_device::move_b_ais_daid_dp() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40384,7 +40384,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40484,7 +40484,7 @@ void m68000_device::move_b_aips_daid_dp() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40503,7 +40503,7 @@ void m68000_device::move_b_aips_daid_dp() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40518,7 +40518,7 @@ void m68000_device::move_b_aips_daid_dp() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40545,7 +40545,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40647,7 +40647,7 @@ void m68000_device::move_b_pais_daid_dp() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40666,7 +40666,7 @@ void m68000_device::move_b_pais_daid_dp() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40681,7 +40681,7 @@ void m68000_device::move_b_pais_daid_dp() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40708,7 +40708,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40827,7 +40827,7 @@ void m68000_device::move_b_das_daid_dp() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40848,7 +40848,7 @@ void m68000_device::move_b_das_daid_dp() // 11a8 f1f8
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40863,7 +40863,7 @@ void m68000_device::move_b_das_daid_dp() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40890,7 +40890,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40982,7 +40982,7 @@ void m68000_device::move_b_dais_daid_dp() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41050,7 +41050,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41071,7 +41071,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41086,7 +41086,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41113,7 +41113,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41233,7 +41233,7 @@ void m68000_device::move_b_adr16_daid_dp() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -41252,7 +41252,7 @@ void m68000_device::move_b_adr16_daid_dp() // 11b8 f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41267,7 +41267,7 @@ void m68000_device::move_b_adr16_daid_dp() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41294,7 +41294,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41438,7 +41438,7 @@ void m68000_device::move_b_adr32_daid_dp() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41457,7 +41457,7 @@ void m68000_device::move_b_adr32_daid_dp() // 11b9 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41472,7 +41472,7 @@ void m68000_device::move_b_adr32_daid_dp() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41499,7 +41499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41617,7 +41617,7 @@ void m68000_device::move_b_dpc_daid_dp() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41638,7 +41638,7 @@ void m68000_device::move_b_dpc_daid_dp() // 11ba f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41653,7 +41653,7 @@ void m68000_device::move_b_dpc_daid_dp() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41680,7 +41680,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41771,7 +41771,7 @@ void m68000_device::move_b_dpci_daid_dp() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41839,7 +41839,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41860,7 +41860,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41875,7 +41875,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41902,7 +41902,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42020,7 +42020,7 @@ void m68000_device::move_b_imm8_daid_dp() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -42090,7 +42090,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42154,7 +42154,7 @@ void m68000_device::move_b_ds_adr16_dp() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42245,7 +42245,7 @@ void m68000_device::move_b_ais_adr16_dp() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42269,7 +42269,7 @@ void m68000_device::move_b_ais_adr16_dp() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42366,7 +42366,7 @@ void m68000_device::move_b_aips_adr16_dp() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42388,7 +42388,7 @@ void m68000_device::move_b_aips_adr16_dp() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42487,7 +42487,7 @@ void m68000_device::move_b_pais_adr16_dp() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42509,7 +42509,7 @@ void m68000_device::move_b_pais_adr16_dp() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42625,7 +42625,7 @@ void m68000_device::move_b_das_adr16_dp() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42649,7 +42649,7 @@ void m68000_device::move_b_das_adr16_dp() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42738,7 +42738,7 @@ void m68000_device::move_b_dais_adr16_dp() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42806,7 +42806,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42830,7 +42830,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42947,7 +42947,7 @@ void m68000_device::move_b_adr16_adr16_dp() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -42969,7 +42969,7 @@ void m68000_device::move_b_adr16_adr16_dp() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43110,7 +43110,7 @@ void m68000_device::move_b_adr32_adr16_dp() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -43132,7 +43132,7 @@ void m68000_device::move_b_adr32_adr16_dp() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43247,7 +43247,7 @@ void m68000_device::move_b_dpc_adr16_dp() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43271,7 +43271,7 @@ void m68000_device::move_b_dpc_adr16_dp() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43359,7 +43359,7 @@ void m68000_device::move_b_dpci_adr16_dp() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43427,7 +43427,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43451,7 +43451,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43570,7 +43570,7 @@ void m68000_device::move_b_imm8_adr16_dp() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43687,7 +43687,7 @@ void m68000_device::move_b_ds_adr32_dp() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43778,7 +43778,7 @@ void m68000_device::move_b_ais_adr32_dp() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43802,7 +43802,7 @@ void m68000_device::move_b_ais_adr32_dp() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43922,7 +43922,7 @@ void m68000_device::move_b_aips_adr32_dp() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -43944,7 +43944,7 @@ void m68000_device::move_b_aips_adr32_dp() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44066,7 +44066,7 @@ void m68000_device::move_b_pais_adr32_dp() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -44088,7 +44088,7 @@ void m68000_device::move_b_pais_adr32_dp() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44227,7 +44227,7 @@ void m68000_device::move_b_das_adr32_dp() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44251,7 +44251,7 @@ void m68000_device::move_b_das_adr32_dp() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44363,7 +44363,7 @@ void m68000_device::move_b_dais_adr32_dp() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44431,7 +44431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44455,7 +44455,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44595,7 +44595,7 @@ void m68000_device::move_b_adr16_adr32_dp() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -44617,7 +44617,7 @@ void m68000_device::move_b_adr16_adr32_dp() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44781,7 +44781,7 @@ void m68000_device::move_b_adr32_adr32_dp() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -44803,7 +44803,7 @@ void m68000_device::move_b_adr32_adr32_dp() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44941,7 +44941,7 @@ void m68000_device::move_b_dpc_adr32_dp() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44965,7 +44965,7 @@ void m68000_device::move_b_dpc_adr32_dp() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45076,7 +45076,7 @@ void m68000_device::move_b_dpci_adr32_dp() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45144,7 +45144,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45168,7 +45168,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45334,7 +45334,7 @@ void m68000_device::move_b_imm8_adr32_dp() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45429,13 +45429,13 @@ void m68000_device::move_l_ds_dd_dp() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -45481,14 +45481,14 @@ void m68000_device::move_l_as_dd_dp() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45530,7 +45530,7 @@ void m68000_device::move_l_ais_dd_dp() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45584,14 +45584,14 @@ void m68000_device::move_l_ais_dd_dp() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45633,7 +45633,7 @@ void m68000_device::move_l_aips_dd_dp() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45690,14 +45690,14 @@ void m68000_device::move_l_aips_dd_dp() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45738,7 +45738,7 @@ void m68000_device::move_l_pais_dd_dp() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -45797,14 +45797,14 @@ void m68000_device::move_l_pais_dd_dp() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45870,7 +45870,7 @@ void m68000_device::move_l_das_dd_dp() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -45924,14 +45924,14 @@ void m68000_device::move_l_das_dd_dp() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45971,7 +45971,7 @@ void m68000_device::move_l_dais_dd_dp() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46038,7 +46038,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46092,14 +46092,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46167,7 +46167,7 @@ void m68000_device::move_l_adr16_dd_dp() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46221,14 +46221,14 @@ void m68000_device::move_l_adr16_dd_dp() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46320,7 +46320,7 @@ void m68000_device::move_l_adr32_dd_dp() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46374,14 +46374,14 @@ void m68000_device::move_l_adr32_dd_dp() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46446,7 +46446,7 @@ void m68000_device::move_l_dpc_dd_dp() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46500,14 +46500,14 @@ void m68000_device::move_l_dpc_dd_dp() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46546,7 +46546,7 @@ void m68000_device::move_l_dpci_dd_dp() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46613,7 +46613,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46667,14 +46667,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46769,14 +46769,14 @@ void m68000_device::move_l_imm32_dd_dp() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46821,13 +46821,13 @@ void m68000_device::movea_l_ds_ad_dp() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -46871,12 +46871,12 @@ void m68000_device::movea_l_as_ad_dp() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46918,7 +46918,7 @@ void m68000_device::movea_l_ais_ad_dp() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46972,13 +46972,13 @@ void m68000_device::movea_l_ais_ad_dp() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47019,7 +47019,7 @@ void m68000_device::movea_l_aips_ad_dp() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47076,13 +47076,13 @@ void m68000_device::movea_l_aips_ad_dp() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47122,7 +47122,7 @@ void m68000_device::movea_l_pais_ad_dp() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -47181,13 +47181,13 @@ void m68000_device::movea_l_pais_ad_dp() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47252,7 +47252,7 @@ void m68000_device::movea_l_das_ad_dp() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47306,13 +47306,13 @@ void m68000_device::movea_l_das_ad_dp() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47351,7 +47351,7 @@ void m68000_device::movea_l_dais_ad_dp() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47418,7 +47418,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47472,13 +47472,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47545,7 +47545,7 @@ void m68000_device::movea_l_adr16_ad_dp() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47599,13 +47599,13 @@ void m68000_device::movea_l_adr16_ad_dp() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47696,7 +47696,7 @@ void m68000_device::movea_l_adr32_ad_dp() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -47750,13 +47750,13 @@ void m68000_device::movea_l_adr32_ad_dp() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -47820,7 +47820,7 @@ void m68000_device::movea_l_dpc_ad_dp() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -47874,13 +47874,13 @@ void m68000_device::movea_l_dpc_ad_dp() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47918,7 +47918,7 @@ void m68000_device::movea_l_dpci_ad_dp() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47985,7 +47985,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -48039,13 +48039,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -48139,13 +48139,13 @@ void m68000_device::movea_l_imm32_ad_dp() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -48213,7 +48213,7 @@ void m68000_device::move_l_ds_aid_dp() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48241,7 +48241,7 @@ void m68000_device::move_l_ds_aid_dp() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48310,7 +48310,7 @@ void m68000_device::move_l_as_aid_dp() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48338,7 +48338,7 @@ void m68000_device::move_l_as_aid_dp() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48380,7 +48380,7 @@ void m68000_device::move_l_ais_aid_dp() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48433,7 +48433,7 @@ void m68000_device::move_l_ais_aid_dp() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48460,7 +48460,7 @@ void m68000_device::move_l_ais_aid_dp() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48528,7 +48528,7 @@ void m68000_device::move_l_aips_aid_dp() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48584,7 +48584,7 @@ void m68000_device::move_l_aips_aid_dp() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48611,7 +48611,7 @@ void m68000_device::move_l_aips_aid_dp() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48678,7 +48678,7 @@ void m68000_device::move_l_pais_aid_dp() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48736,7 +48736,7 @@ void m68000_device::move_l_pais_aid_dp() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48763,7 +48763,7 @@ void m68000_device::move_l_pais_aid_dp() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48855,7 +48855,7 @@ void m68000_device::move_l_das_aid_dp() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -48908,7 +48908,7 @@ void m68000_device::move_l_das_aid_dp() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48935,7 +48935,7 @@ void m68000_device::move_l_das_aid_dp() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49001,7 +49001,7 @@ void m68000_device::move_l_dais_aid_dp() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49068,7 +49068,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49121,7 +49121,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49148,7 +49148,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49242,7 +49242,7 @@ void m68000_device::move_l_adr16_aid_dp() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49295,7 +49295,7 @@ void m68000_device::move_l_adr16_aid_dp() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49322,7 +49322,7 @@ void m68000_device::move_l_adr16_aid_dp() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49440,7 +49440,7 @@ void m68000_device::move_l_adr32_aid_dp() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49493,7 +49493,7 @@ void m68000_device::move_l_adr32_aid_dp() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49520,7 +49520,7 @@ void m68000_device::move_l_adr32_aid_dp() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49611,7 +49611,7 @@ void m68000_device::move_l_dpc_aid_dp() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49664,7 +49664,7 @@ void m68000_device::move_l_dpc_aid_dp() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49691,7 +49691,7 @@ void m68000_device::move_l_dpc_aid_dp() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49756,7 +49756,7 @@ void m68000_device::move_l_dpci_aid_dp() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49823,7 +49823,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49876,7 +49876,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49903,7 +49903,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50048,7 +50048,7 @@ void m68000_device::move_l_imm32_aid_dp() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50076,7 +50076,7 @@ void m68000_device::move_l_imm32_aid_dp() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68000_device::move_l_ds_aipd_dp() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50173,7 +50173,7 @@ void m68000_device::move_l_ds_aipd_dp() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50242,7 +50242,7 @@ void m68000_device::move_l_as_aipd_dp() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50270,7 +50270,7 @@ void m68000_device::move_l_as_aipd_dp() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50312,7 +50312,7 @@ void m68000_device::move_l_ais_aipd_dp() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50365,7 +50365,7 @@ void m68000_device::move_l_ais_aipd_dp() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50392,7 +50392,7 @@ void m68000_device::move_l_ais_aipd_dp() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50459,7 +50459,7 @@ void m68000_device::move_l_aips_aipd_dp() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50515,7 +50515,7 @@ void m68000_device::move_l_aips_aipd_dp() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50542,7 +50542,7 @@ void m68000_device::move_l_aips_aipd_dp() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50608,7 +50608,7 @@ void m68000_device::move_l_pais_aipd_dp() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50666,7 +50666,7 @@ void m68000_device::move_l_pais_aipd_dp() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50693,7 +50693,7 @@ void m68000_device::move_l_pais_aipd_dp() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50784,7 +50784,7 @@ void m68000_device::move_l_das_aipd_dp() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -50837,7 +50837,7 @@ void m68000_device::move_l_das_aipd_dp() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50864,7 +50864,7 @@ void m68000_device::move_l_das_aipd_dp() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50929,7 +50929,7 @@ void m68000_device::move_l_dais_aipd_dp() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50996,7 +50996,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51049,7 +51049,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51076,7 +51076,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51169,7 +51169,7 @@ void m68000_device::move_l_adr16_aipd_dp() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51222,7 +51222,7 @@ void m68000_device::move_l_adr16_aipd_dp() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51249,7 +51249,7 @@ void m68000_device::move_l_adr16_aipd_dp() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51366,7 +51366,7 @@ void m68000_device::move_l_adr32_aipd_dp() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51419,7 +51419,7 @@ void m68000_device::move_l_adr32_aipd_dp() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51446,7 +51446,7 @@ void m68000_device::move_l_adr32_aipd_dp() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51536,7 +51536,7 @@ void m68000_device::move_l_dpc_aipd_dp() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51589,7 +51589,7 @@ void m68000_device::move_l_dpc_aipd_dp() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51616,7 +51616,7 @@ void m68000_device::move_l_dpc_aipd_dp() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51680,7 +51680,7 @@ void m68000_device::move_l_dpci_aipd_dp() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51747,7 +51747,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51800,7 +51800,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51827,7 +51827,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51971,7 +51971,7 @@ void m68000_device::move_l_imm32_aipd_dp() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51999,7 +51999,7 @@ void m68000_device::move_l_imm32_aipd_dp() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52043,7 +52043,7 @@ void m68000_device::move_l_ds_paid_dp() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52071,7 +52071,7 @@ void m68000_device::move_l_ds_paid_dp() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52139,7 +52139,7 @@ void m68000_device::move_l_as_paid_dp() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52167,7 +52167,7 @@ void m68000_device::move_l_as_paid_dp() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52233,7 +52233,7 @@ void m68000_device::move_l_ais_paid_dp() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52286,7 +52286,7 @@ void m68000_device::move_l_ais_paid_dp() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_device::move_l_ais_paid_dp() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52380,7 +52380,7 @@ void m68000_device::move_l_aips_paid_dp() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52436,7 +52436,7 @@ void m68000_device::move_l_aips_paid_dp() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52464,7 +52464,7 @@ void m68000_device::move_l_aips_paid_dp() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52529,7 +52529,7 @@ void m68000_device::move_l_pais_paid_dp() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52587,7 +52587,7 @@ void m68000_device::move_l_pais_paid_dp() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52615,7 +52615,7 @@ void m68000_device::move_l_pais_paid_dp() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52705,7 +52705,7 @@ void m68000_device::move_l_das_paid_dp() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52758,7 +52758,7 @@ void m68000_device::move_l_das_paid_dp() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52786,7 +52786,7 @@ void m68000_device::move_l_das_paid_dp() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52850,7 +52850,7 @@ void m68000_device::move_l_dais_paid_dp() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52917,7 +52917,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52970,7 +52970,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52998,7 +52998,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53090,7 +53090,7 @@ void m68000_device::move_l_adr16_paid_dp() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -53143,7 +53143,7 @@ void m68000_device::move_l_adr16_paid_dp() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53171,7 +53171,7 @@ void m68000_device::move_l_adr16_paid_dp() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53287,7 +53287,7 @@ void m68000_device::move_l_adr32_paid_dp() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53340,7 +53340,7 @@ void m68000_device::move_l_adr32_paid_dp() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53368,7 +53368,7 @@ void m68000_device::move_l_adr32_paid_dp() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53457,7 +53457,7 @@ void m68000_device::move_l_dpc_paid_dp() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53510,7 +53510,7 @@ void m68000_device::move_l_dpc_paid_dp() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53538,7 +53538,7 @@ void m68000_device::move_l_dpc_paid_dp() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53601,7 +53601,7 @@ void m68000_device::move_l_dpci_paid_dp() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53668,7 +53668,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53721,7 +53721,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53749,7 +53749,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53867,7 +53867,7 @@ void m68000_device::move_l_imm32_paid_dp() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53895,7 +53895,7 @@ void m68000_device::move_l_imm32_paid_dp() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53987,7 +53987,7 @@ void m68000_device::move_l_ds_dad_dp() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54014,7 +54014,7 @@ void m68000_device::move_l_ds_dad_dp() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54042,7 +54042,7 @@ void m68000_device::move_l_ds_dad_dp() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54110,7 +54110,7 @@ void m68000_device::move_l_as_dad_dp() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54137,7 +54137,7 @@ void m68000_device::move_l_as_dad_dp() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54165,7 +54165,7 @@ void m68000_device::move_l_as_dad_dp() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54207,7 +54207,7 @@ void m68000_device::move_l_ais_dad_dp() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54259,7 +54259,7 @@ void m68000_device::move_l_ais_dad_dp() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54287,7 +54287,7 @@ void m68000_device::move_l_ais_dad_dp() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54384,7 +54384,7 @@ void m68000_device::move_l_aips_dad_dp() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54439,7 +54439,7 @@ void m68000_device::move_l_aips_dad_dp() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54467,7 +54467,7 @@ void m68000_device::move_l_aips_dad_dp() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54563,7 +54563,7 @@ void m68000_device::move_l_pais_dad_dp() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54620,7 +54620,7 @@ void m68000_device::move_l_pais_dad_dp() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54648,7 +54648,7 @@ void m68000_device::move_l_pais_dad_dp() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54769,7 +54769,7 @@ void m68000_device::move_l_das_dad_dp() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -54821,7 +54821,7 @@ void m68000_device::move_l_das_dad_dp() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54849,7 +54849,7 @@ void m68000_device::move_l_das_dad_dp() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54944,7 +54944,7 @@ void m68000_device::move_l_dais_dad_dp() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55011,7 +55011,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55063,7 +55063,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55091,7 +55091,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55214,7 +55214,7 @@ void m68000_device::move_l_adr16_dad_dp() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55266,7 +55266,7 @@ void m68000_device::move_l_adr16_dad_dp() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55294,7 +55294,7 @@ void m68000_device::move_l_adr16_dad_dp() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55441,7 +55441,7 @@ void m68000_device::move_l_adr32_dad_dp() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55493,7 +55493,7 @@ void m68000_device::move_l_adr32_dad_dp() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55521,7 +55521,7 @@ void m68000_device::move_l_adr32_dad_dp() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55641,7 +55641,7 @@ void m68000_device::move_l_dpc_dad_dp() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55693,7 +55693,7 @@ void m68000_device::move_l_dpc_dad_dp() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55721,7 +55721,7 @@ void m68000_device::move_l_dpc_dad_dp() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55815,7 +55815,7 @@ void m68000_device::move_l_dpci_dad_dp() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55882,7 +55882,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55934,7 +55934,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55962,7 +55962,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56135,7 +56135,7 @@ void m68000_device::move_l_imm32_dad_dp() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56162,7 +56162,7 @@ void m68000_device::move_l_imm32_dad_dp() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56190,7 +56190,7 @@ void m68000_device::move_l_imm32_dad_dp() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56230,7 +56230,7 @@ void m68000_device::move_l_ds_daid_dp() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56300,7 +56300,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56327,7 +56327,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56355,7 +56355,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56395,7 +56395,7 @@ void m68000_device::move_l_as_daid_dp() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56465,7 +56465,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56492,7 +56492,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56520,7 +56520,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56562,7 +56562,7 @@ void m68000_device::move_l_ais_daid_dp() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56611,7 +56611,7 @@ void m68000_device::move_l_ais_daid_dp() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56626,7 +56626,7 @@ void m68000_device::move_l_ais_daid_dp() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56653,7 +56653,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56683,7 +56683,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56780,7 +56780,7 @@ void m68000_device::move_l_aips_daid_dp() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56832,7 +56832,7 @@ void m68000_device::move_l_aips_daid_dp() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56847,7 +56847,7 @@ void m68000_device::move_l_aips_daid_dp() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56874,7 +56874,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56904,7 +56904,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57000,7 +57000,7 @@ void m68000_device::move_l_pais_daid_dp() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57054,7 +57054,7 @@ void m68000_device::move_l_pais_daid_dp() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57069,7 +57069,7 @@ void m68000_device::move_l_pais_daid_dp() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57096,7 +57096,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57126,7 +57126,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57247,7 +57247,7 @@ void m68000_device::move_l_das_daid_dp() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57296,7 +57296,7 @@ void m68000_device::move_l_das_daid_dp() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57311,7 +57311,7 @@ void m68000_device::move_l_das_daid_dp() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57338,7 +57338,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57368,7 +57368,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57463,7 +57463,7 @@ void m68000_device::move_l_dais_daid_dp() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57530,7 +57530,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57579,7 +57579,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57594,7 +57594,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57621,7 +57621,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57651,7 +57651,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57774,7 +57774,7 @@ void m68000_device::move_l_adr16_daid_dp() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57823,7 +57823,7 @@ void m68000_device::move_l_adr16_daid_dp() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57838,7 +57838,7 @@ void m68000_device::move_l_adr16_daid_dp() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57865,7 +57865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57895,7 +57895,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58042,7 +58042,7 @@ void m68000_device::move_l_adr32_daid_dp() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -58091,7 +58091,7 @@ void m68000_device::move_l_adr32_daid_dp() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58106,7 +58106,7 @@ void m68000_device::move_l_adr32_daid_dp() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58133,7 +58133,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58163,7 +58163,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58283,7 +58283,7 @@ void m68000_device::move_l_dpc_daid_dp() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58332,7 +58332,7 @@ void m68000_device::move_l_dpc_daid_dp() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58347,7 +58347,7 @@ void m68000_device::move_l_dpc_daid_dp() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58374,7 +58374,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58404,7 +58404,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58498,7 +58498,7 @@ void m68000_device::move_l_dpci_daid_dp() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58565,7 +58565,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58614,7 +58614,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58629,7 +58629,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58656,7 +58656,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58686,7 +58686,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58831,7 +58831,7 @@ void m68000_device::move_l_imm32_daid_dp() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -58901,7 +58901,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58928,7 +58928,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58956,7 +58956,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58999,7 +58999,7 @@ void m68000_device::move_l_ds_adr16_dp() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59027,7 +59027,7 @@ void m68000_device::move_l_ds_adr16_dp() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59125,7 +59125,7 @@ void m68000_device::move_l_as_adr16_dp() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59153,7 +59153,7 @@ void m68000_device::move_l_as_adr16_dp() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59249,7 +59249,7 @@ void m68000_device::move_l_ais_adr16_dp() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59301,7 +59301,7 @@ void m68000_device::move_l_ais_adr16_dp() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59329,7 +59329,7 @@ void m68000_device::move_l_ais_adr16_dp() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59425,7 +59425,7 @@ void m68000_device::move_l_aips_adr16_dp() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59480,7 +59480,7 @@ void m68000_device::move_l_aips_adr16_dp() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59508,7 +59508,7 @@ void m68000_device::move_l_aips_adr16_dp() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59603,7 +59603,7 @@ void m68000_device::move_l_pais_adr16_dp() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59660,7 +59660,7 @@ void m68000_device::move_l_pais_adr16_dp() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59688,7 +59688,7 @@ void m68000_device::move_l_pais_adr16_dp() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59808,7 +59808,7 @@ void m68000_device::move_l_das_adr16_dp() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -59860,7 +59860,7 @@ void m68000_device::move_l_das_adr16_dp() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59888,7 +59888,7 @@ void m68000_device::move_l_das_adr16_dp() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59982,7 +59982,7 @@ void m68000_device::move_l_dais_adr16_dp() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60049,7 +60049,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60101,7 +60101,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60129,7 +60129,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60251,7 +60251,7 @@ void m68000_device::move_l_adr16_adr16_dp() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60303,7 +60303,7 @@ void m68000_device::move_l_adr16_adr16_dp() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60331,7 +60331,7 @@ void m68000_device::move_l_adr16_adr16_dp() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60477,7 +60477,7 @@ void m68000_device::move_l_adr32_adr16_dp() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60529,7 +60529,7 @@ void m68000_device::move_l_adr32_adr16_dp() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60557,7 +60557,7 @@ void m68000_device::move_l_adr32_adr16_dp() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60676,7 +60676,7 @@ void m68000_device::move_l_dpc_adr16_dp() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60728,7 +60728,7 @@ void m68000_device::move_l_dpc_adr16_dp() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60756,7 +60756,7 @@ void m68000_device::move_l_dpc_adr16_dp() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60849,7 +60849,7 @@ void m68000_device::move_l_dpci_adr16_dp() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60916,7 +60916,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60968,7 +60968,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60996,7 +60996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61144,7 +61144,7 @@ void m68000_device::move_l_imm32_adr16_dp() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61172,7 +61172,7 @@ void m68000_device::move_l_imm32_adr16_dp() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61294,7 +61294,7 @@ void m68000_device::move_l_ds_adr32_dp() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61322,7 +61322,7 @@ void m68000_device::move_l_ds_adr32_dp() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61444,7 +61444,7 @@ void m68000_device::move_l_as_adr32_dp() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61472,7 +61472,7 @@ void m68000_device::move_l_as_adr32_dp() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61568,7 +61568,7 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61621,7 +61621,7 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61647,7 +61647,7 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61674,7 +61674,7 @@ void m68000_device::move_l_ais_adr32_dp() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61769,7 +61769,7 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61825,7 +61825,7 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61851,7 +61851,7 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61878,7 +61878,7 @@ void m68000_device::move_l_aips_adr32_dp() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61972,7 +61972,7 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62030,7 +62030,7 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62056,7 +62056,7 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62083,7 +62083,7 @@ void m68000_device::move_l_pais_adr32_dp() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62202,7 +62202,7 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62255,7 +62255,7 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62281,7 +62281,7 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62308,7 +62308,7 @@ void m68000_device::move_l_das_adr32_dp() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62401,7 +62401,7 @@ void m68000_device::move_l_dais_adr32_dp() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62468,7 +62468,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62521,7 +62521,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62547,7 +62547,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62574,7 +62574,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62695,7 +62695,7 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62748,7 +62748,7 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62774,7 +62774,7 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62801,7 +62801,7 @@ void m68000_device::move_l_adr16_adr32_dp() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62946,7 +62946,7 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -62999,7 +62999,7 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -63025,7 +63025,7 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63052,7 +63052,7 @@ void m68000_device::move_l_adr32_adr32_dp() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63170,7 +63170,7 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63223,7 +63223,7 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63249,7 +63249,7 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63276,7 +63276,7 @@ void m68000_device::move_l_dpc_adr32_dp() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63368,7 +63368,7 @@ void m68000_device::move_l_dpci_adr32_dp() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63435,7 +63435,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63488,7 +63488,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63514,7 +63514,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63541,7 +63541,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63712,7 +63712,7 @@ void m68000_device::move_l_imm32_adr32_dp() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63740,7 +63740,7 @@ void m68000_device::move_l_imm32_adr32_dp() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63840,7 +63840,7 @@ void m68000_device::move_w_ds_dd_dp() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63890,7 +63890,7 @@ void m68000_device::move_w_as_dd_dp() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63937,7 +63937,7 @@ void m68000_device::move_w_ais_dd_dp() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -63967,7 +63967,7 @@ void m68000_device::move_w_ais_dd_dp() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64018,7 +64018,7 @@ void m68000_device::move_w_aips_dd_dp() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64046,7 +64046,7 @@ void m68000_device::move_w_aips_dd_dp() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64099,7 +64099,7 @@ void m68000_device::move_w_pais_dd_dp() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64127,7 +64127,7 @@ void m68000_device::move_w_pais_dd_dp() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64197,7 +64197,7 @@ void m68000_device::move_w_das_dd_dp() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64227,7 +64227,7 @@ void m68000_device::move_w_das_dd_dp() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64270,7 +64270,7 @@ void m68000_device::move_w_dais_dd_dp() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64338,7 +64338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64368,7 +64368,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64439,7 +64439,7 @@ void m68000_device::move_w_adr16_dd_dp() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -64467,7 +64467,7 @@ void m68000_device::move_w_adr16_dd_dp() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64562,7 +64562,7 @@ void m68000_device::move_w_adr32_dd_dp() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64590,7 +64590,7 @@ void m68000_device::move_w_adr32_dd_dp() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64659,7 +64659,7 @@ void m68000_device::move_w_dpc_dd_dp() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64689,7 +64689,7 @@ void m68000_device::move_w_dpc_dd_dp() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64731,7 +64731,7 @@ void m68000_device::move_w_dpci_dd_dp() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64799,7 +64799,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64829,7 +64829,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64903,7 +64903,7 @@ void m68000_device::move_w_imm16_dd_dp() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -64957,7 +64957,7 @@ void m68000_device::movea_w_ds_ad_dp() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -65004,7 +65004,7 @@ void m68000_device::movea_w_as_ad_dp() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65046,7 +65046,7 @@ void m68000_device::movea_w_ais_ad_dp() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65124,7 +65124,7 @@ void m68000_device::movea_w_aips_ad_dp() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65202,7 +65202,7 @@ void m68000_device::movea_w_pais_ad_dp() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65297,7 +65297,7 @@ void m68000_device::movea_w_das_ad_dp() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65367,7 +65367,7 @@ void m68000_device::movea_w_dais_ad_dp() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65435,7 +65435,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65533,7 +65533,7 @@ void m68000_device::movea_w_adr16_ad_dp() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -65653,7 +65653,7 @@ void m68000_device::movea_w_adr32_ad_dp() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -65747,7 +65747,7 @@ void m68000_device::movea_w_dpc_ad_dp() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65816,7 +65816,7 @@ void m68000_device::movea_w_dpci_ad_dp() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65884,7 +65884,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65989,7 +65989,7 @@ void m68000_device::movea_w_imm16_ad_dp() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -66033,7 +66033,7 @@ void m68000_device::move_w_ds_aid_dp() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66104,7 +66104,7 @@ void m68000_device::move_w_as_aid_dp() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66172,7 +66172,7 @@ void m68000_device::move_w_ais_aid_dp() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66201,7 +66201,7 @@ void m68000_device::move_w_ais_aid_dp() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68000_device::move_w_aips_aid_dp() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66302,7 +66302,7 @@ void m68000_device::move_w_aips_aid_dp() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66378,7 +66378,7 @@ void m68000_device::move_w_pais_aid_dp() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66405,7 +66405,7 @@ void m68000_device::move_w_pais_aid_dp() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66498,7 +66498,7 @@ void m68000_device::move_w_das_aid_dp() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66527,7 +66527,7 @@ void m68000_device::move_w_das_aid_dp() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66593,7 +66593,7 @@ void m68000_device::move_w_dais_aid_dp() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66661,7 +66661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66690,7 +66690,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66784,7 +66784,7 @@ void m68000_device::move_w_adr16_aid_dp() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -66811,7 +66811,7 @@ void m68000_device::move_w_adr16_aid_dp() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66929,7 +66929,7 @@ void m68000_device::move_w_adr32_aid_dp() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66956,7 +66956,7 @@ void m68000_device::move_w_adr32_aid_dp() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67048,7 +67048,7 @@ void m68000_device::move_w_dpc_aid_dp() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67077,7 +67077,7 @@ void m68000_device::move_w_dpc_aid_dp() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67142,7 +67142,7 @@ void m68000_device::move_w_dpci_aid_dp() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67210,7 +67210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67239,7 +67239,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67336,7 +67336,7 @@ void m68000_device::move_w_imm16_aid_dp() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67407,7 +67407,7 @@ void m68000_device::move_w_ds_aipd_dp() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67477,7 +67477,7 @@ void m68000_device::move_w_as_aipd_dp() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67544,7 +67544,7 @@ void m68000_device::move_w_ais_aipd_dp() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67574,7 +67574,7 @@ void m68000_device::move_w_ais_aipd_dp() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67647,7 +67647,7 @@ void m68000_device::move_w_aips_aipd_dp() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67675,7 +67675,7 @@ void m68000_device::move_w_aips_aipd_dp() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67750,7 +67750,7 @@ void m68000_device::move_w_pais_aipd_dp() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67778,7 +67778,7 @@ void m68000_device::move_w_pais_aipd_dp() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67870,7 +67870,7 @@ void m68000_device::move_w_das_aipd_dp() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67900,7 +67900,7 @@ void m68000_device::move_w_das_aipd_dp() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67965,7 +67965,7 @@ void m68000_device::move_w_dais_aipd_dp() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68033,7 +68033,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68063,7 +68063,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68156,7 +68156,7 @@ void m68000_device::move_w_adr16_aipd_dp() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -68184,7 +68184,7 @@ void m68000_device::move_w_adr16_aipd_dp() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68301,7 +68301,7 @@ void m68000_device::move_w_adr32_aipd_dp() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -68329,7 +68329,7 @@ void m68000_device::move_w_adr32_aipd_dp() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68420,7 +68420,7 @@ void m68000_device::move_w_dpc_aipd_dp() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68450,7 +68450,7 @@ void m68000_device::move_w_dpc_aipd_dp() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68514,7 +68514,7 @@ void m68000_device::move_w_dpci_aipd_dp() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68582,7 +68582,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68612,7 +68612,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68708,7 +68708,7 @@ void m68000_device::move_w_imm16_aipd_dp() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68777,7 +68777,7 @@ void m68000_device::move_w_ds_paid_dp() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68847,7 +68847,7 @@ void m68000_device::move_w_as_paid_dp() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68915,7 +68915,7 @@ void m68000_device::move_w_ais_paid_dp() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68944,7 +68944,7 @@ void m68000_device::move_w_ais_paid_dp() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69018,7 +69018,7 @@ void m68000_device::move_w_aips_paid_dp() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69045,7 +69045,7 @@ void m68000_device::move_w_aips_paid_dp() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69121,7 +69121,7 @@ void m68000_device::move_w_pais_paid_dp() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69148,7 +69148,7 @@ void m68000_device::move_w_pais_paid_dp() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69241,7 +69241,7 @@ void m68000_device::move_w_das_paid_dp() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69270,7 +69270,7 @@ void m68000_device::move_w_das_paid_dp() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69336,7 +69336,7 @@ void m68000_device::move_w_dais_paid_dp() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69404,7 +69404,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69433,7 +69433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69527,7 +69527,7 @@ void m68000_device::move_w_adr16_paid_dp() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -69554,7 +69554,7 @@ void m68000_device::move_w_adr16_paid_dp() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69672,7 +69672,7 @@ void m68000_device::move_w_adr32_paid_dp() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69699,7 +69699,7 @@ void m68000_device::move_w_adr32_paid_dp() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69791,7 +69791,7 @@ void m68000_device::move_w_dpc_paid_dp() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69820,7 +69820,7 @@ void m68000_device::move_w_dpc_paid_dp() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69885,7 +69885,7 @@ void m68000_device::move_w_dpci_paid_dp() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69953,7 +69953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69982,7 +69982,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70078,7 +70078,7 @@ void m68000_device::move_w_imm16_paid_dp() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70172,7 +70172,7 @@ void m68000_device::move_w_ds_dad_dp() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70267,7 +70267,7 @@ void m68000_device::move_w_as_dad_dp() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70336,7 +70336,7 @@ void m68000_device::move_w_ais_dad_dp() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70364,7 +70364,7 @@ void m68000_device::move_w_ais_dad_dp() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70468,7 +70468,7 @@ void m68000_device::move_w_aips_dad_dp() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70494,7 +70494,7 @@ void m68000_device::move_w_aips_dad_dp() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70600,7 +70600,7 @@ void m68000_device::move_w_pais_dad_dp() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70626,7 +70626,7 @@ void m68000_device::move_w_pais_dad_dp() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70749,7 +70749,7 @@ void m68000_device::move_w_das_dad_dp() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70777,7 +70777,7 @@ void m68000_device::move_w_das_dad_dp() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70873,7 +70873,7 @@ void m68000_device::move_w_dais_dad_dp() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -70941,7 +70941,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70969,7 +70969,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71093,7 +71093,7 @@ void m68000_device::move_w_adr16_dad_dp() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -71119,7 +71119,7 @@ void m68000_device::move_w_adr16_dad_dp() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71267,7 +71267,7 @@ void m68000_device::move_w_adr32_dad_dp() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -71293,7 +71293,7 @@ void m68000_device::move_w_adr32_dad_dp() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71415,7 +71415,7 @@ void m68000_device::move_w_dpc_dad_dp() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71443,7 +71443,7 @@ void m68000_device::move_w_dpc_dad_dp() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71538,7 +71538,7 @@ void m68000_device::move_w_dpci_dad_dp() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71606,7 +71606,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71634,7 +71634,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71784,7 +71784,7 @@ void m68000_device::move_w_imm16_dad_dp() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71851,7 +71851,7 @@ void m68000_device::move_w_ds_daid_dp() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -71921,7 +71921,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71988,7 +71988,7 @@ void m68000_device::move_w_as_daid_dp() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -72058,7 +72058,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72127,7 +72127,7 @@ void m68000_device::move_w_ais_daid_dp() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72152,7 +72152,7 @@ void m68000_device::move_w_ais_daid_dp() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72167,7 +72167,7 @@ void m68000_device::move_w_ais_daid_dp() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72194,7 +72194,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72300,7 +72300,7 @@ void m68000_device::move_w_aips_daid_dp() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72323,7 +72323,7 @@ void m68000_device::move_w_aips_daid_dp() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72338,7 +72338,7 @@ void m68000_device::move_w_aips_daid_dp() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72365,7 +72365,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72473,7 +72473,7 @@ void m68000_device::move_w_pais_daid_dp() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72496,7 +72496,7 @@ void m68000_device::move_w_pais_daid_dp() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72511,7 +72511,7 @@ void m68000_device::move_w_pais_daid_dp() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72538,7 +72538,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72663,7 +72663,7 @@ void m68000_device::move_w_das_daid_dp() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72688,7 +72688,7 @@ void m68000_device::move_w_das_daid_dp() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72703,7 +72703,7 @@ void m68000_device::move_w_das_daid_dp() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72730,7 +72730,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72828,7 +72828,7 @@ void m68000_device::move_w_dais_daid_dp() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72896,7 +72896,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72921,7 +72921,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72936,7 +72936,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72963,7 +72963,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73089,7 +73089,7 @@ void m68000_device::move_w_adr16_daid_dp() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -73112,7 +73112,7 @@ void m68000_device::move_w_adr16_daid_dp() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73127,7 +73127,7 @@ void m68000_device::move_w_adr16_daid_dp() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73154,7 +73154,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73304,7 +73304,7 @@ void m68000_device::move_w_adr32_daid_dp() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -73327,7 +73327,7 @@ void m68000_device::move_w_adr32_daid_dp() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73342,7 +73342,7 @@ void m68000_device::move_w_adr32_daid_dp() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73369,7 +73369,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73493,7 +73493,7 @@ void m68000_device::move_w_dpc_daid_dp() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73518,7 +73518,7 @@ void m68000_device::move_w_dpc_daid_dp() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73533,7 +73533,7 @@ void m68000_device::move_w_dpc_daid_dp() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73560,7 +73560,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73657,7 +73657,7 @@ void m68000_device::move_w_dpci_daid_dp() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -73725,7 +73725,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73750,7 +73750,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73765,7 +73765,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73792,7 +73792,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73916,7 +73916,7 @@ void m68000_device::move_w_imm16_daid_dp() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -73986,7 +73986,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74056,7 +74056,7 @@ void m68000_device::move_w_ds_adr16_dp() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74155,7 +74155,7 @@ void m68000_device::move_w_as_adr16_dp() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74252,7 +74252,7 @@ void m68000_device::move_w_ais_adr16_dp() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74280,7 +74280,7 @@ void m68000_device::move_w_ais_adr16_dp() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74383,7 +74383,7 @@ void m68000_device::move_w_aips_adr16_dp() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74409,7 +74409,7 @@ void m68000_device::move_w_aips_adr16_dp() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74514,7 +74514,7 @@ void m68000_device::move_w_pais_adr16_dp() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74540,7 +74540,7 @@ void m68000_device::move_w_pais_adr16_dp() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74662,7 +74662,7 @@ void m68000_device::move_w_das_adr16_dp() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74690,7 +74690,7 @@ void m68000_device::move_w_das_adr16_dp() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74785,7 +74785,7 @@ void m68000_device::move_w_dais_adr16_dp() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74853,7 +74853,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74881,7 +74881,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75004,7 +75004,7 @@ void m68000_device::move_w_adr16_adr16_dp() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -75030,7 +75030,7 @@ void m68000_device::move_w_adr16_adr16_dp() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75177,7 +75177,7 @@ void m68000_device::move_w_adr32_adr16_dp() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75203,7 +75203,7 @@ void m68000_device::move_w_adr32_adr16_dp() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75324,7 +75324,7 @@ void m68000_device::move_w_dpc_adr16_dp() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75352,7 +75352,7 @@ void m68000_device::move_w_dpc_adr16_dp() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75446,7 +75446,7 @@ void m68000_device::move_w_dpci_adr16_dp() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75514,7 +75514,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75542,7 +75542,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75667,7 +75667,7 @@ void m68000_device::move_w_imm16_adr16_dp() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75790,7 +75790,7 @@ void m68000_device::move_w_ds_adr32_dp() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75913,7 +75913,7 @@ void m68000_device::move_w_as_adr32_dp() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76010,7 +76010,7 @@ void m68000_device::move_w_ais_adr32_dp() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76038,7 +76038,7 @@ void m68000_device::move_w_ais_adr32_dp() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76164,7 +76164,7 @@ void m68000_device::move_w_aips_adr32_dp() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76190,7 +76190,7 @@ void m68000_device::move_w_aips_adr32_dp() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76318,7 +76318,7 @@ void m68000_device::move_w_pais_adr32_dp() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76344,7 +76344,7 @@ void m68000_device::move_w_pais_adr32_dp() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76489,7 +76489,7 @@ void m68000_device::move_w_das_adr32_dp() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76517,7 +76517,7 @@ void m68000_device::move_w_das_adr32_dp() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76635,7 +76635,7 @@ void m68000_device::move_w_dais_adr32_dp() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76703,7 +76703,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76731,7 +76731,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76877,7 +76877,7 @@ void m68000_device::move_w_adr16_adr32_dp() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -76903,7 +76903,7 @@ void m68000_device::move_w_adr16_adr32_dp() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77073,7 +77073,7 @@ void m68000_device::move_w_adr32_adr32_dp() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -77099,7 +77099,7 @@ void m68000_device::move_w_adr32_adr32_dp() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77243,7 +77243,7 @@ void m68000_device::move_w_dpc_adr32_dp() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77271,7 +77271,7 @@ void m68000_device::move_w_dpc_adr32_dp() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77388,7 +77388,7 @@ void m68000_device::move_w_dpci_adr32_dp() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77456,7 +77456,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77484,7 +77484,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77656,7 +77656,7 @@ void m68000_device::move_w_imm16_adr32_dp() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77755,7 +77755,7 @@ void m68000_device::negx_b_ds_dp() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -77801,7 +77801,7 @@ void m68000_device::negx_b_ais_dp() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77826,7 +77826,7 @@ void m68000_device::negx_b_ais_dp() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77892,7 +77892,7 @@ void m68000_device::negx_b_aips_dp() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -77915,7 +77915,7 @@ void m68000_device::negx_b_aips_dp() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77983,7 +77983,7 @@ void m68000_device::negx_b_pais_dp() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78006,7 +78006,7 @@ void m68000_device::negx_b_pais_dp() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78091,7 +78091,7 @@ void m68000_device::negx_b_das_dp() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78116,7 +78116,7 @@ void m68000_device::negx_b_das_dp() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78174,7 +78174,7 @@ void m68000_device::negx_b_dais_dp() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78242,7 +78242,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78267,7 +78267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78353,7 +78353,7 @@ void m68000_device::negx_b_adr16_dp() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -78376,7 +78376,7 @@ void m68000_device::negx_b_adr16_dp() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78486,7 +78486,7 @@ void m68000_device::negx_b_adr32_dp() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -78509,7 +78509,7 @@ void m68000_device::negx_b_adr32_dp() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78571,7 +78571,7 @@ void m68000_device::negx_w_ds_dp() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -78617,7 +78617,7 @@ void m68000_device::negx_w_ais_dp() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78646,7 +78646,7 @@ void m68000_device::negx_w_ais_dp() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78718,7 +78718,7 @@ void m68000_device::negx_w_aips_dp() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78745,7 +78745,7 @@ void m68000_device::negx_w_aips_dp() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78819,7 +78819,7 @@ void m68000_device::negx_w_pais_dp() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78846,7 +78846,7 @@ void m68000_device::negx_w_pais_dp() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78937,7 +78937,7 @@ void m68000_device::negx_w_das_dp() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78966,7 +78966,7 @@ void m68000_device::negx_w_das_dp() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79030,7 +79030,7 @@ void m68000_device::negx_w_dais_dp() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79098,7 +79098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -79127,7 +79127,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79219,7 +79219,7 @@ void m68000_device::negx_w_adr16_dp() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -79246,7 +79246,7 @@ void m68000_device::negx_w_adr16_dp() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79362,7 +79362,7 @@ void m68000_device::negx_w_adr32_dp() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79389,7 +79389,7 @@ void m68000_device::negx_w_adr32_dp() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79457,12 +79457,12 @@ void m68000_device::negx_l_ds_dp() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79509,7 +79509,7 @@ void m68000_device::negx_l_ais_dp() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79562,7 +79562,7 @@ void m68000_device::negx_l_ais_dp() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79590,7 +79590,7 @@ void m68000_device::negx_l_ais_dp() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79654,7 +79654,7 @@ void m68000_device::negx_l_aips_dp() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79710,7 +79710,7 @@ void m68000_device::negx_l_aips_dp() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79738,7 +79738,7 @@ void m68000_device::negx_l_aips_dp() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79801,7 +79801,7 @@ void m68000_device::negx_l_pais_dp() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79859,7 +79859,7 @@ void m68000_device::negx_l_pais_dp() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79887,7 +79887,7 @@ void m68000_device::negx_l_pais_dp() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79975,7 +79975,7 @@ void m68000_device::negx_l_das_dp() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80028,7 +80028,7 @@ void m68000_device::negx_l_das_dp() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80056,7 +80056,7 @@ void m68000_device::negx_l_das_dp() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80118,7 +80118,7 @@ void m68000_device::negx_l_dais_dp() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80185,7 +80185,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80238,7 +80238,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80266,7 +80266,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80356,7 +80356,7 @@ void m68000_device::negx_l_adr16_dp() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80409,7 +80409,7 @@ void m68000_device::negx_l_adr16_dp() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80437,7 +80437,7 @@ void m68000_device::negx_l_adr16_dp() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80551,7 +80551,7 @@ void m68000_device::negx_l_adr32_dp() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -80604,7 +80604,7 @@ void m68000_device::negx_l_adr32_dp() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80632,7 +80632,7 @@ void m68000_device::negx_l_adr32_dp() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80743,7 +80743,7 @@ void m68000_device::move_sr_ais_dp() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80774,7 +80774,7 @@ void m68000_device::move_sr_ais_dp() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80845,7 +80845,7 @@ void m68000_device::move_sr_aips_dp() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80874,7 +80874,7 @@ void m68000_device::move_sr_aips_dp() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80947,7 +80947,7 @@ void m68000_device::move_sr_pais_dp() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80976,7 +80976,7 @@ void m68000_device::move_sr_pais_dp() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -81066,7 +81066,7 @@ void m68000_device::move_sr_das_dp() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81097,7 +81097,7 @@ void m68000_device::move_sr_das_dp() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81160,7 +81160,7 @@ void m68000_device::move_sr_dais_dp() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81228,7 +81228,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81259,7 +81259,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81350,7 +81350,7 @@ void m68000_device::move_sr_adr16_dp() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -81379,7 +81379,7 @@ void m68000_device::move_sr_adr16_dp() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81494,7 +81494,7 @@ void m68000_device::move_sr_adr32_dp() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -81523,7 +81523,7 @@ void m68000_device::move_sr_adr32_dp() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -81589,7 +81589,7 @@ void m68000_device::chk_w_ds_dd_dp() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -81597,7 +81597,7 @@ void m68000_device::chk_w_ds_dd_dp() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81615,14 +81615,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -81650,7 +81650,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81676,7 +81676,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81834,7 +81834,7 @@ void m68000_device::chk_w_ais_dd_dp() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -81861,7 +81861,7 @@ void m68000_device::chk_w_ais_dd_dp() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -81869,7 +81869,7 @@ void m68000_device::chk_w_ais_dd_dp() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81887,14 +81887,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81922,7 +81922,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81948,7 +81948,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82112,7 +82112,7 @@ void m68000_device::chk_w_aips_dd_dp() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82137,7 +82137,7 @@ void m68000_device::chk_w_aips_dd_dp() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82145,7 +82145,7 @@ void m68000_device::chk_w_aips_dd_dp() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82163,14 +82163,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82198,7 +82198,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82224,7 +82224,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82390,7 +82390,7 @@ void m68000_device::chk_w_pais_dd_dp() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82415,7 +82415,7 @@ void m68000_device::chk_w_pais_dd_dp() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82423,7 +82423,7 @@ void m68000_device::chk_w_pais_dd_dp() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82441,14 +82441,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82476,7 +82476,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82502,7 +82502,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82685,7 +82685,7 @@ void m68000_device::chk_w_das_dd_dp() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -82712,7 +82712,7 @@ void m68000_device::chk_w_das_dd_dp() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82720,7 +82720,7 @@ void m68000_device::chk_w_das_dd_dp() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82738,14 +82738,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82773,7 +82773,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82799,7 +82799,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -82955,7 +82955,7 @@ void m68000_device::chk_w_dais_dd_dp() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -83023,7 +83023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83050,7 +83050,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83058,7 +83058,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83076,14 +83076,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83111,7 +83111,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83137,7 +83137,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83321,7 +83321,7 @@ void m68000_device::chk_w_adr16_dd_dp() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -83346,7 +83346,7 @@ void m68000_device::chk_w_adr16_dd_dp() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83354,7 +83354,7 @@ void m68000_device::chk_w_adr16_dd_dp() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83372,14 +83372,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83407,7 +83407,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83433,7 +83433,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83641,7 +83641,7 @@ void m68000_device::chk_w_adr32_dd_dp() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83666,7 +83666,7 @@ void m68000_device::chk_w_adr32_dd_dp() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83674,7 +83674,7 @@ void m68000_device::chk_w_adr32_dd_dp() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83692,14 +83692,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83727,7 +83727,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83753,7 +83753,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -83935,7 +83935,7 @@ void m68000_device::chk_w_dpc_dd_dp() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83962,7 +83962,7 @@ void m68000_device::chk_w_dpc_dd_dp() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83970,7 +83970,7 @@ void m68000_device::chk_w_dpc_dd_dp() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83988,14 +83988,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84023,7 +84023,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84049,7 +84049,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84204,7 +84204,7 @@ void m68000_device::chk_w_dpci_dd_dp() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84272,7 +84272,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84299,7 +84299,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -84307,7 +84307,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84325,14 +84325,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84360,7 +84360,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84386,7 +84386,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84570,7 +84570,7 @@ void m68000_device::chk_w_imm16_dd_dp() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -84578,7 +84578,7 @@ void m68000_device::chk_w_imm16_dd_dp() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84596,14 +84596,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -84631,7 +84631,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84657,7 +84657,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84931,7 +84931,7 @@ void m68000_device::lea_dais_ad_dp() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85272,7 +85272,7 @@ void m68000_device::lea_dpci_ad_dp() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85388,7 +85388,7 @@ void m68000_device::clr_b_ds_dp() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -85396,7 +85396,7 @@ void m68000_device::clr_b_ds_dp() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85435,11 +85435,11 @@ void m68000_device::clr_b_ais_dp() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85461,7 +85461,7 @@ void m68000_device::clr_b_ais_dp() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85491,7 +85491,7 @@ void m68000_device::clr_b_ais_dp() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85525,12 +85525,12 @@ void m68000_device::clr_b_aips_dp() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85553,7 +85553,7 @@ void m68000_device::clr_b_aips_dp() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85583,7 +85583,7 @@ void m68000_device::clr_b_aips_dp() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85616,7 +85616,7 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -85624,7 +85624,7 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85647,7 +85647,7 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85677,7 +85677,7 @@ void m68000_device::clr_b_pais_dp() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85708,7 +85708,7 @@ void m68000_device::clr_b_das_dp() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85734,11 +85734,11 @@ void m68000_device::clr_b_das_dp() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85760,7 +85760,7 @@ void m68000_device::clr_b_das_dp() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85790,7 +85790,7 @@ void m68000_device::clr_b_das_dp() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85819,14 +85819,14 @@ void m68000_device::clr_b_dais_dp() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -85834,7 +85834,7 @@ void m68000_device::clr_b_dais_dp() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85861,7 +85861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85890,11 +85890,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85916,7 +85916,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85946,7 +85946,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85979,7 +85979,7 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86005,7 +86005,7 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86028,7 +86028,7 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86058,7 +86058,7 @@ void m68000_device::clr_b_adr16_dp() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86089,7 +86089,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86116,7 +86116,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -86142,7 +86142,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -86165,7 +86165,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86195,7 +86195,7 @@ void m68000_device::clr_b_adr32_dp() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86228,7 +86228,7 @@ void m68000_device::clr_w_ds_dp() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -86236,7 +86236,7 @@ void m68000_device::clr_w_ds_dp() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86275,11 +86275,11 @@ void m68000_device::clr_w_ais_dp() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86305,7 +86305,7 @@ void m68000_device::clr_w_ais_dp() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86335,7 +86335,7 @@ void m68000_device::clr_w_ais_dp() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86375,12 +86375,12 @@ void m68000_device::clr_w_aips_dp() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86407,7 +86407,7 @@ void m68000_device::clr_w_aips_dp() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86437,7 +86437,7 @@ void m68000_device::clr_w_aips_dp() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86476,7 +86476,7 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -86484,7 +86484,7 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86511,7 +86511,7 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86541,7 +86541,7 @@ void m68000_device::clr_w_pais_dp() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86578,7 +86578,7 @@ void m68000_device::clr_w_das_dp() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86604,11 +86604,11 @@ void m68000_device::clr_w_das_dp() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86634,7 +86634,7 @@ void m68000_device::clr_w_das_dp() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86664,7 +86664,7 @@ void m68000_device::clr_w_das_dp() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86699,14 +86699,14 @@ void m68000_device::clr_w_dais_dp() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -86714,7 +86714,7 @@ void m68000_device::clr_w_dais_dp() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86741,7 +86741,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86770,11 +86770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86800,7 +86800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86830,7 +86830,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86869,7 +86869,7 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86895,7 +86895,7 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86922,7 +86922,7 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86952,7 +86952,7 @@ void m68000_device::clr_w_adr16_dp() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86989,7 +86989,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87016,7 +87016,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -87042,7 +87042,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87069,7 +87069,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87099,7 +87099,7 @@ void m68000_device::clr_w_adr32_dp() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87138,12 +87138,12 @@ void m68000_device::clr_l_ds_dp() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87172,7 +87172,7 @@ void m68000_device::clr_l_ds_dp() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -87191,7 +87191,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87219,7 +87219,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87245,7 +87245,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87273,7 +87273,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87301,7 +87301,7 @@ void m68000_device::clr_l_ais_dp() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87338,7 +87338,7 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87366,11 +87366,11 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87396,7 +87396,7 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87424,7 +87424,7 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87452,7 +87452,7 @@ void m68000_device::clr_l_aips_dp() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87488,14 +87488,14 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87522,7 +87522,7 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87548,7 +87548,7 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87576,7 +87576,7 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87604,7 +87604,7 @@ void m68000_device::clr_l_pais_dp() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87641,7 +87641,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87666,7 +87666,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87694,7 +87694,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87720,7 +87720,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87748,7 +87748,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87776,7 +87776,7 @@ void m68000_device::clr_l_das_dp() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87811,14 +87811,14 @@ void m68000_device::clr_l_dais_dp() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -87826,7 +87826,7 @@ void m68000_device::clr_l_dais_dp() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87853,7 +87853,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87881,7 +87881,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87909,7 +87909,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87935,7 +87935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87963,7 +87963,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87991,7 +87991,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88030,7 +88030,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -88056,7 +88056,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -88084,7 +88084,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -88110,7 +88110,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88138,7 +88138,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88166,7 +88166,7 @@ void m68000_device::clr_l_adr16_dp() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88203,7 +88203,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -88230,7 +88230,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -88256,7 +88256,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88284,7 +88284,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -88310,7 +88310,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88338,7 +88338,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88366,7 +88366,7 @@ void m68000_device::clr_l_adr32_dp() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88405,7 +88405,7 @@ void m68000_device::neg_b_ds_dp() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -88451,7 +88451,7 @@ void m68000_device::neg_b_ais_dp() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88476,7 +88476,7 @@ void m68000_device::neg_b_ais_dp() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88542,7 +88542,7 @@ void m68000_device::neg_b_aips_dp() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88565,7 +88565,7 @@ void m68000_device::neg_b_aips_dp() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88633,7 +88633,7 @@ void m68000_device::neg_b_pais_dp() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88656,7 +88656,7 @@ void m68000_device::neg_b_pais_dp() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88741,7 +88741,7 @@ void m68000_device::neg_b_das_dp() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88766,7 +88766,7 @@ void m68000_device::neg_b_das_dp() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88824,7 +88824,7 @@ void m68000_device::neg_b_dais_dp() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88892,7 +88892,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88917,7 +88917,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89003,7 +89003,7 @@ void m68000_device::neg_b_adr16_dp() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89026,7 +89026,7 @@ void m68000_device::neg_b_adr16_dp() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89136,7 +89136,7 @@ void m68000_device::neg_b_adr32_dp() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -89159,7 +89159,7 @@ void m68000_device::neg_b_adr32_dp() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89221,7 +89221,7 @@ void m68000_device::neg_w_ds_dp() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -89267,7 +89267,7 @@ void m68000_device::neg_w_ais_dp() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89296,7 +89296,7 @@ void m68000_device::neg_w_ais_dp() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89368,7 +89368,7 @@ void m68000_device::neg_w_aips_dp() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89395,7 +89395,7 @@ void m68000_device::neg_w_aips_dp() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89469,7 +89469,7 @@ void m68000_device::neg_w_pais_dp() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89496,7 +89496,7 @@ void m68000_device::neg_w_pais_dp() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89587,7 +89587,7 @@ void m68000_device::neg_w_das_dp() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89616,7 +89616,7 @@ void m68000_device::neg_w_das_dp() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89680,7 +89680,7 @@ void m68000_device::neg_w_dais_dp() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89748,7 +89748,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89777,7 +89777,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89869,7 +89869,7 @@ void m68000_device::neg_w_adr16_dp() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89896,7 +89896,7 @@ void m68000_device::neg_w_adr16_dp() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90012,7 +90012,7 @@ void m68000_device::neg_w_adr32_dp() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90039,7 +90039,7 @@ void m68000_device::neg_w_adr32_dp() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90107,12 +90107,12 @@ void m68000_device::neg_l_ds_dp() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90159,7 +90159,7 @@ void m68000_device::neg_l_ais_dp() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90212,7 +90212,7 @@ void m68000_device::neg_l_ais_dp() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90240,7 +90240,7 @@ void m68000_device::neg_l_ais_dp() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90304,7 +90304,7 @@ void m68000_device::neg_l_aips_dp() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90360,7 +90360,7 @@ void m68000_device::neg_l_aips_dp() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90388,7 +90388,7 @@ void m68000_device::neg_l_aips_dp() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90451,7 +90451,7 @@ void m68000_device::neg_l_pais_dp() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -90509,7 +90509,7 @@ void m68000_device::neg_l_pais_dp() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90537,7 +90537,7 @@ void m68000_device::neg_l_pais_dp() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90625,7 +90625,7 @@ void m68000_device::neg_l_das_dp() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90678,7 +90678,7 @@ void m68000_device::neg_l_das_dp() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90706,7 +90706,7 @@ void m68000_device::neg_l_das_dp() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90768,7 +90768,7 @@ void m68000_device::neg_l_dais_dp() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -90835,7 +90835,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90888,7 +90888,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90916,7 +90916,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91006,7 +91006,7 @@ void m68000_device::neg_l_adr16_dp() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -91059,7 +91059,7 @@ void m68000_device::neg_l_adr16_dp() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91087,7 +91087,7 @@ void m68000_device::neg_l_adr16_dp() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91201,7 +91201,7 @@ void m68000_device::neg_l_adr32_dp() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -91254,7 +91254,7 @@ void m68000_device::neg_l_adr32_dp() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91282,7 +91282,7 @@ void m68000_device::neg_l_adr32_dp() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91424,7 +91424,7 @@ void m68000_device::move_ais_ccr_dp() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91535,7 +91535,7 @@ void m68000_device::move_aips_ccr_dp() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91646,7 +91646,7 @@ void m68000_device::move_pais_ccr_dp() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91774,7 +91774,7 @@ void m68000_device::move_das_ccr_dp() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91877,7 +91877,7 @@ void m68000_device::move_dais_ccr_dp() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91945,7 +91945,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92076,7 +92076,7 @@ void m68000_device::move_adr16_ccr_dp() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -92229,7 +92229,7 @@ void m68000_device::move_adr32_ccr_dp() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92356,7 +92356,7 @@ void m68000_device::move_dpc_ccr_dp() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92458,7 +92458,7 @@ void m68000_device::move_dpci_ccr_dp() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92526,7 +92526,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92737,7 +92737,7 @@ void m68000_device::not_b_ds_dp() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -92783,7 +92783,7 @@ void m68000_device::not_b_ais_dp() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92808,7 +92808,7 @@ void m68000_device::not_b_ais_dp() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92874,7 +92874,7 @@ void m68000_device::not_b_aips_dp() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92897,7 +92897,7 @@ void m68000_device::not_b_aips_dp() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92965,7 +92965,7 @@ void m68000_device::not_b_pais_dp() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92988,7 +92988,7 @@ void m68000_device::not_b_pais_dp() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93073,7 +93073,7 @@ void m68000_device::not_b_das_dp() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93098,7 +93098,7 @@ void m68000_device::not_b_das_dp() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93156,7 +93156,7 @@ void m68000_device::not_b_dais_dp() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93224,7 +93224,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93249,7 +93249,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93335,7 +93335,7 @@ void m68000_device::not_b_adr16_dp() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -93358,7 +93358,7 @@ void m68000_device::not_b_adr16_dp() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93468,7 +93468,7 @@ void m68000_device::not_b_adr32_dp() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -93491,7 +93491,7 @@ void m68000_device::not_b_adr32_dp() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93553,7 +93553,7 @@ void m68000_device::not_w_ds_dp() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -93599,7 +93599,7 @@ void m68000_device::not_w_ais_dp() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93628,7 +93628,7 @@ void m68000_device::not_w_ais_dp() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93700,7 +93700,7 @@ void m68000_device::not_w_aips_dp() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93727,7 +93727,7 @@ void m68000_device::not_w_aips_dp() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93801,7 +93801,7 @@ void m68000_device::not_w_pais_dp() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93828,7 +93828,7 @@ void m68000_device::not_w_pais_dp() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93919,7 +93919,7 @@ void m68000_device::not_w_das_dp() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93948,7 +93948,7 @@ void m68000_device::not_w_das_dp() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94012,7 +94012,7 @@ void m68000_device::not_w_dais_dp() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94080,7 +94080,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94109,7 +94109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94201,7 +94201,7 @@ void m68000_device::not_w_adr16_dp() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -94228,7 +94228,7 @@ void m68000_device::not_w_adr16_dp() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94344,7 +94344,7 @@ void m68000_device::not_w_adr32_dp() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94371,7 +94371,7 @@ void m68000_device::not_w_adr32_dp() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94439,12 +94439,12 @@ void m68000_device::not_l_ds_dp() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94491,7 +94491,7 @@ void m68000_device::not_l_ais_dp() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94544,7 +94544,7 @@ void m68000_device::not_l_ais_dp() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94572,7 +94572,7 @@ void m68000_device::not_l_ais_dp() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94636,7 +94636,7 @@ void m68000_device::not_l_aips_dp() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94692,7 +94692,7 @@ void m68000_device::not_l_aips_dp() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94720,7 +94720,7 @@ void m68000_device::not_l_aips_dp() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94783,7 +94783,7 @@ void m68000_device::not_l_pais_dp() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -94841,7 +94841,7 @@ void m68000_device::not_l_pais_dp() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94869,7 +94869,7 @@ void m68000_device::not_l_pais_dp() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94957,7 +94957,7 @@ void m68000_device::not_l_das_dp() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95010,7 +95010,7 @@ void m68000_device::not_l_das_dp() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95038,7 +95038,7 @@ void m68000_device::not_l_das_dp() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95100,7 +95100,7 @@ void m68000_device::not_l_dais_dp() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -95167,7 +95167,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95220,7 +95220,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95248,7 +95248,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95338,7 +95338,7 @@ void m68000_device::not_l_adr16_dp() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95391,7 +95391,7 @@ void m68000_device::not_l_adr16_dp() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95419,7 +95419,7 @@ void m68000_device::not_l_adr16_dp() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95533,7 +95533,7 @@ void m68000_device::not_l_adr32_dp() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -95586,7 +95586,7 @@ void m68000_device::not_l_adr32_dp() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95614,7 +95614,7 @@ void m68000_device::not_l_adr32_dp() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95766,7 +95766,7 @@ void m68000_device::move_ais_sr_dp() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -95883,7 +95883,7 @@ void m68000_device::move_aips_sr_dp() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96000,7 +96000,7 @@ void m68000_device::move_pais_sr_dp() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96134,7 +96134,7 @@ void m68000_device::move_das_sr_dp() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96243,7 +96243,7 @@ void m68000_device::move_dais_sr_dp() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96311,7 +96311,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96448,7 +96448,7 @@ void m68000_device::move_adr16_sr_dp() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -96607,7 +96607,7 @@ void m68000_device::move_adr32_sr_dp() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -96740,7 +96740,7 @@ void m68000_device::move_dpc_sr_dp() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96848,7 +96848,7 @@ void m68000_device::move_dpci_sr_dp() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96916,7 +96916,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97135,12 +97135,12 @@ void m68000_device::nbcd_b_ds_dp() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97185,7 +97185,7 @@ void m68000_device::nbcd_b_ais_dp() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97209,12 +97209,12 @@ void m68000_device::nbcd_b_ais_dp() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97278,7 +97278,7 @@ void m68000_device::nbcd_b_aips_dp() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97300,12 +97300,12 @@ void m68000_device::nbcd_b_aips_dp() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97371,7 +97371,7 @@ void m68000_device::nbcd_b_pais_dp() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97393,12 +97393,12 @@ void m68000_device::nbcd_b_pais_dp() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97481,7 +97481,7 @@ void m68000_device::nbcd_b_das_dp() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97505,12 +97505,12 @@ void m68000_device::nbcd_b_das_dp() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97566,7 +97566,7 @@ void m68000_device::nbcd_b_dais_dp() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97634,7 +97634,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97658,12 +97658,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97747,7 +97747,7 @@ void m68000_device::nbcd_b_adr16_dp() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -97769,12 +97769,12 @@ void m68000_device::nbcd_b_adr16_dp() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97882,7 +97882,7 @@ void m68000_device::nbcd_b_adr32_dp() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97904,12 +97904,12 @@ void m68000_device::nbcd_b_adr32_dp() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97970,7 +97970,7 @@ void m68000_device::swap_ds_dp() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -97978,7 +97978,7 @@ void m68000_device::swap_ds_dp() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98022,7 +98022,7 @@ void m68000_device::pea_ais_dp() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98112,7 +98112,7 @@ void m68000_device::pea_das_dp() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98142,7 +98142,7 @@ void m68000_device::pea_das_dp() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98230,7 +98230,7 @@ void m68000_device::pea_dais_dp() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98297,7 +98297,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98654,7 +98654,7 @@ void m68000_device::pea_dpc_dp() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98684,7 +98684,7 @@ void m68000_device::pea_dpc_dp() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98771,7 +98771,7 @@ void m68000_device::pea_dpci_dp() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98838,7 +98838,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98935,7 +98935,7 @@ void m68000_device::ext_w_ds_dp() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -99358,7 +99358,7 @@ void m68000_device::movem_w_list_dais_dp() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -99797,7 +99797,7 @@ void m68000_device::ext_l_ds_dp() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -100290,7 +100290,7 @@ void m68000_device::movem_l_list_dais_dp() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -100799,13 +100799,13 @@ void m68000_device::tst_b_ds_dp() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100844,11 +100844,11 @@ void m68000_device::tst_b_ais_dp() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100870,13 +100870,13 @@ void m68000_device::tst_b_ais_dp() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100918,12 +100918,12 @@ void m68000_device::tst_b_aips_dp() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -100946,13 +100946,13 @@ void m68000_device::tst_b_aips_dp() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100993,7 +100993,7 @@ void m68000_device::tst_b_pais_dp() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101001,7 +101001,7 @@ void m68000_device::tst_b_pais_dp() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101024,13 +101024,13 @@ void m68000_device::tst_b_pais_dp() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101069,7 +101069,7 @@ void m68000_device::tst_b_das_dp() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101095,11 +101095,11 @@ void m68000_device::tst_b_das_dp() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101121,13 +101121,13 @@ void m68000_device::tst_b_das_dp() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101164,14 +101164,14 @@ void m68000_device::tst_b_dais_dp() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101179,7 +101179,7 @@ void m68000_device::tst_b_dais_dp() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101206,7 +101206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101235,11 +101235,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101261,13 +101261,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101308,7 +101308,7 @@ void m68000_device::tst_b_adr16_dp() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -101334,7 +101334,7 @@ void m68000_device::tst_b_adr16_dp() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -101357,13 +101357,13 @@ void m68000_device::tst_b_adr16_dp() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101402,7 +101402,7 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101429,7 +101429,7 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -101455,7 +101455,7 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -101478,13 +101478,13 @@ void m68000_device::tst_b_adr32_dp() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101526,13 +101526,13 @@ void m68000_device::tst_w_ds_dp() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101571,11 +101571,11 @@ void m68000_device::tst_w_ais_dp() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101601,13 +101601,13 @@ void m68000_device::tst_w_ais_dp() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101649,12 +101649,12 @@ void m68000_device::tst_w_aips_dp() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101681,13 +101681,13 @@ void m68000_device::tst_w_aips_dp() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101728,7 +101728,7 @@ void m68000_device::tst_w_pais_dp() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101736,7 +101736,7 @@ void m68000_device::tst_w_pais_dp() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101763,13 +101763,13 @@ void m68000_device::tst_w_pais_dp() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101808,7 +101808,7 @@ void m68000_device::tst_w_das_dp() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101834,11 +101834,11 @@ void m68000_device::tst_w_das_dp() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101864,13 +101864,13 @@ void m68000_device::tst_w_das_dp() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101907,14 +101907,14 @@ void m68000_device::tst_w_dais_dp() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101922,7 +101922,7 @@ void m68000_device::tst_w_dais_dp() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101949,7 +101949,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101978,11 +101978,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102008,13 +102008,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102055,7 +102055,7 @@ void m68000_device::tst_w_adr16_dp() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102081,7 +102081,7 @@ void m68000_device::tst_w_adr16_dp() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102108,13 +102108,13 @@ void m68000_device::tst_w_adr16_dp() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102153,7 +102153,7 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102180,7 +102180,7 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -102206,7 +102206,7 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102233,13 +102233,13 @@ void m68000_device::tst_w_adr32_dp() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102281,13 +102281,13 @@ void m68000_device::tst_l_ds_dp() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102328,7 +102328,7 @@ void m68000_device::tst_l_ais_dp() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102356,7 +102356,7 @@ void m68000_device::tst_l_ais_dp() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102382,13 +102382,13 @@ void m68000_device::tst_l_ais_dp() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102429,7 +102429,7 @@ void m68000_device::tst_l_aips_dp() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102457,11 +102457,11 @@ void m68000_device::tst_l_aips_dp() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102487,13 +102487,13 @@ void m68000_device::tst_l_aips_dp() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102533,14 +102533,14 @@ void m68000_device::tst_l_pais_dp() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102567,7 +102567,7 @@ void m68000_device::tst_l_pais_dp() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102593,13 +102593,13 @@ void m68000_device::tst_l_pais_dp() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102640,7 +102640,7 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102665,7 +102665,7 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102693,7 +102693,7 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102719,13 +102719,13 @@ void m68000_device::tst_l_das_dp() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102764,14 +102764,14 @@ void m68000_device::tst_l_dais_dp() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -102779,7 +102779,7 @@ void m68000_device::tst_l_dais_dp() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102806,7 +102806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102834,7 +102834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102862,7 +102862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102888,13 +102888,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102937,7 +102937,7 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102963,7 +102963,7 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102991,7 +102991,7 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -103017,13 +103017,13 @@ void m68000_device::tst_l_adr16_dp() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103064,7 +103064,7 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103091,7 +103091,7 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -103117,7 +103117,7 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -103145,7 +103145,7 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -103171,13 +103171,13 @@ void m68000_device::tst_l_adr32_dp() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103220,14 +103220,14 @@ void m68000_device::tas_ds_dp() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103268,11 +103268,11 @@ void m68000_device::tas_ais_dp() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103289,14 +103289,14 @@ void m68000_device::tas_ais_dp() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103320,11 +103320,11 @@ void m68000_device::tas_ais_dp() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103366,12 +103366,12 @@ void m68000_device::tas_aips_dp() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103389,14 +103389,14 @@ void m68000_device::tas_aips_dp() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103420,11 +103420,11 @@ void m68000_device::tas_aips_dp() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103465,7 +103465,7 @@ void m68000_device::tas_pais_dp() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103473,7 +103473,7 @@ void m68000_device::tas_pais_dp() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103491,14 +103491,14 @@ void m68000_device::tas_pais_dp() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103522,11 +103522,11 @@ void m68000_device::tas_pais_dp() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103565,7 +103565,7 @@ void m68000_device::tas_das_dp() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103591,11 +103591,11 @@ void m68000_device::tas_das_dp() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103612,14 +103612,14 @@ void m68000_device::tas_das_dp() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103643,11 +103643,11 @@ void m68000_device::tas_das_dp() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103684,14 +103684,14 @@ void m68000_device::tas_dais_dp() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103699,7 +103699,7 @@ void m68000_device::tas_dais_dp() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103726,7 +103726,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103755,11 +103755,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103776,14 +103776,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103807,11 +103807,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103852,7 +103852,7 @@ void m68000_device::tas_adr16_dp() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -103878,7 +103878,7 @@ void m68000_device::tas_adr16_dp() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -103896,14 +103896,14 @@ void m68000_device::tas_adr16_dp() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103927,11 +103927,11 @@ void m68000_device::tas_adr16_dp() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103970,7 +103970,7 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103997,7 +103997,7 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -104023,7 +104023,7 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104041,14 +104041,14 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -104072,11 +104072,11 @@ void m68000_device::tas_adr32_dp() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104563,7 +104563,7 @@ void m68000_device::movem_w_dais_list_dp() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -104627,7 +104627,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105256,7 +105256,7 @@ void m68000_device::movem_w_dpci_list_dp() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -105320,7 +105320,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105949,7 +105949,7 @@ void m68000_device::movem_l_dais_list_dp() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106013,7 +106013,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106738,7 +106738,7 @@ void m68000_device::movem_l_dpci_list_dp() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106802,7 +106802,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106940,14 +106940,14 @@ void m68000_device::trap_imm4_dp() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -106975,7 +106975,7 @@ void m68000_device::trap_imm4_dp() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -107001,7 +107001,7 @@ void m68000_device::trap_imm4_dp() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107142,7 +107142,7 @@ void m68000_device::link_as_imm16_dp() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -107462,7 +107462,7 @@ void m68000_device::reset_dp() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -107576,7 +107576,7 @@ void m68000_device::stop_i16u_dp() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -107590,6 +107590,7 @@ void m68000_device::stop_i16u_dp() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -107606,7 +107607,7 @@ void m68000_device::rte_dp() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107753,7 +107754,7 @@ void m68000_device::rts_dp() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107914,7 +107915,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -107940,7 +107941,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107968,7 +107969,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -107994,7 +107995,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -108133,7 +108134,7 @@ void m68000_device::rtr_dp() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108512,7 +108513,7 @@ void m68000_device::jsr_dais_dp() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109028,7 +109029,7 @@ void m68000_device::jsr_dpci_dp() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109305,7 +109306,7 @@ void m68000_device::jmp_dais_dp() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109620,7 +109621,7 @@ void m68000_device::jmp_dpci_dp() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109714,7 +109715,7 @@ void m68000_device::addq_b_imm3_ds_dp() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -109760,7 +109761,7 @@ void m68000_device::addq_b_imm3_ais_dp() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -109786,7 +109787,7 @@ void m68000_device::addq_b_imm3_ais_dp() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109852,7 +109853,7 @@ void m68000_device::addq_b_imm3_aips_dp() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109876,7 +109877,7 @@ void m68000_device::addq_b_imm3_aips_dp() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109944,7 +109945,7 @@ void m68000_device::addq_b_imm3_pais_dp() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109968,7 +109969,7 @@ void m68000_device::addq_b_imm3_pais_dp() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110053,7 +110054,7 @@ void m68000_device::addq_b_imm3_das_dp() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110079,7 +110080,7 @@ void m68000_device::addq_b_imm3_das_dp() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110137,7 +110138,7 @@ void m68000_device::addq_b_imm3_dais_dp() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110205,7 +110206,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110231,7 +110232,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110318,7 @@ void m68000_device::addq_b_imm3_adr16_dp() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -110341,7 +110342,7 @@ void m68000_device::addq_b_imm3_adr16_dp() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110451,7 +110452,7 @@ void m68000_device::addq_b_imm3_adr32_dp() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -110475,7 +110476,7 @@ void m68000_device::addq_b_imm3_adr32_dp() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110537,7 +110538,7 @@ void m68000_device::addq_w_imm3_ds_dp() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -110585,7 +110586,7 @@ void m68000_device::addq_w_imm3_as_dp() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -110611,7 +110612,7 @@ void m68000_device::addq_w_imm3_as_dp() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -110637,7 +110638,7 @@ void m68000_device::addq_w_imm3_ais_dp() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110667,7 +110668,7 @@ void m68000_device::addq_w_imm3_ais_dp() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110739,7 +110740,7 @@ void m68000_device::addq_w_imm3_aips_dp() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110767,7 +110768,7 @@ void m68000_device::addq_w_imm3_aips_dp() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110841,7 +110842,7 @@ void m68000_device::addq_w_imm3_pais_dp() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110869,7 +110870,7 @@ void m68000_device::addq_w_imm3_pais_dp() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110960,7 +110961,7 @@ void m68000_device::addq_w_imm3_das_dp() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110990,7 +110991,7 @@ void m68000_device::addq_w_imm3_das_dp() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111054,7 +111055,7 @@ void m68000_device::addq_w_imm3_dais_dp() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111122,7 +111123,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -111152,7 +111153,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111244,7 +111245,7 @@ void m68000_device::addq_w_imm3_adr16_dp() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -111272,7 +111273,7 @@ void m68000_device::addq_w_imm3_adr16_dp() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111388,7 +111389,7 @@ void m68000_device::addq_w_imm3_adr32_dp() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111416,7 +111417,7 @@ void m68000_device::addq_w_imm3_adr32_dp() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111484,7 +111485,7 @@ void m68000_device::addq_l_imm3_ds_dp() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -111511,7 +111512,7 @@ void m68000_device::addq_l_imm3_ds_dp() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -111540,7 +111541,7 @@ void m68000_device::addq_l_imm3_as_dp() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -111566,7 +111567,7 @@ void m68000_device::addq_l_imm3_as_dp() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -111592,7 +111593,7 @@ void m68000_device::addq_l_imm3_ais_dp() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111646,7 +111647,7 @@ void m68000_device::addq_l_imm3_ais_dp() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111674,7 +111675,7 @@ void m68000_device::addq_l_imm3_ais_dp() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111738,7 +111739,7 @@ void m68000_device::addq_l_imm3_aips_dp() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111795,7 +111796,7 @@ void m68000_device::addq_l_imm3_aips_dp() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111823,7 +111824,7 @@ void m68000_device::addq_l_imm3_aips_dp() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111886,7 +111887,7 @@ void m68000_device::addq_l_imm3_pais_dp() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -111945,7 +111946,7 @@ void m68000_device::addq_l_imm3_pais_dp() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111973,7 +111974,7 @@ void m68000_device::addq_l_imm3_pais_dp() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112061,7 +112062,7 @@ void m68000_device::addq_l_imm3_das_dp() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112115,7 +112116,7 @@ void m68000_device::addq_l_imm3_das_dp() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112143,7 +112144,7 @@ void m68000_device::addq_l_imm3_das_dp() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112205,7 +112206,7 @@ void m68000_device::addq_l_imm3_dais_dp() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -112272,7 +112273,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112326,7 +112327,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112354,7 +112355,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112444,7 +112445,7 @@ void m68000_device::addq_l_imm3_adr16_dp() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112498,7 +112499,7 @@ void m68000_device::addq_l_imm3_adr16_dp() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112526,7 +112527,7 @@ void m68000_device::addq_l_imm3_adr16_dp() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112640,7 +112641,7 @@ void m68000_device::addq_l_imm3_adr32_dp() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -112694,7 +112695,7 @@ void m68000_device::addq_l_imm3_adr32_dp() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112722,7 +112723,7 @@ void m68000_device::addq_l_imm3_adr32_dp() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112788,7 +112789,7 @@ void m68000_device::st_ds_dp() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112800,7 +112801,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112831,7 +112832,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -112859,7 +112860,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112878,7 +112879,7 @@ void m68000_device::dbt_ds_rel16_dp() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112890,13 +112891,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -112927,7 +112928,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112935,7 +112936,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112962,11 +112963,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113000,13 +113001,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113040,7 +113041,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113077,11 +113078,11 @@ void m68000_device::st_ais_dp() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113103,7 +113104,7 @@ void m68000_device::st_ais_dp() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113113,7 +113114,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113140,7 +113141,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113171,7 +113172,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113205,12 +113206,12 @@ void m68000_device::st_aips_dp() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113233,7 +113234,7 @@ void m68000_device::st_aips_dp() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113243,7 +113244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113270,7 +113271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113301,7 +113302,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113334,7 +113335,7 @@ void m68000_device::st_pais_dp() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113342,7 +113343,7 @@ void m68000_device::st_pais_dp() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113365,7 +113366,7 @@ void m68000_device::st_pais_dp() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113375,7 +113376,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113402,7 +113403,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113433,7 +113434,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113464,7 +113465,7 @@ void m68000_device::st_das_dp() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113490,11 +113491,11 @@ void m68000_device::st_das_dp() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113516,7 +113517,7 @@ void m68000_device::st_das_dp() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113526,7 +113527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113553,7 +113554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113584,7 +113585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113613,14 +113614,14 @@ void m68000_device::st_dais_dp() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113628,7 +113629,7 @@ void m68000_device::st_dais_dp() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113655,7 +113656,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113684,11 +113685,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113710,7 +113711,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113720,7 +113721,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113747,7 +113748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113778,7 +113779,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113811,7 +113812,7 @@ void m68000_device::st_adr16_dp() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -113837,7 +113838,7 @@ void m68000_device::st_adr16_dp() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -113860,7 +113861,7 @@ void m68000_device::st_adr16_dp() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113870,7 +113871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113897,7 +113898,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113928,7 +113929,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113959,7 +113960,7 @@ void m68000_device::st_adr32_dp() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113986,7 +113987,7 @@ void m68000_device::st_adr32_dp() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -114012,7 +114013,7 @@ void m68000_device::st_adr32_dp() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114035,7 +114036,7 @@ void m68000_device::st_adr32_dp() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114045,7 +114046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114072,7 +114073,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -114103,7 +114104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -114136,7 +114137,7 @@ void m68000_device::subq_b_imm3_ds_dp() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -114182,7 +114183,7 @@ void m68000_device::subq_b_imm3_ais_dp() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114208,7 +114209,7 @@ void m68000_device::subq_b_imm3_ais_dp() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114274,7 +114275,7 @@ void m68000_device::subq_b_imm3_aips_dp() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114298,7 +114299,7 @@ void m68000_device::subq_b_imm3_aips_dp() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114366,7 +114367,7 @@ void m68000_device::subq_b_imm3_pais_dp() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114390,7 +114391,7 @@ void m68000_device::subq_b_imm3_pais_dp() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114475,7 +114476,7 @@ void m68000_device::subq_b_imm3_das_dp() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114501,7 +114502,7 @@ void m68000_device::subq_b_imm3_das_dp() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114559,7 +114560,7 @@ void m68000_device::subq_b_imm3_dais_dp() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -114627,7 +114628,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114653,7 +114654,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114739,7 +114740,7 @@ void m68000_device::subq_b_imm3_adr16_dp() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -114763,7 +114764,7 @@ void m68000_device::subq_b_imm3_adr16_dp() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114873,7 +114874,7 @@ void m68000_device::subq_b_imm3_adr32_dp() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114897,7 +114898,7 @@ void m68000_device::subq_b_imm3_adr32_dp() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114959,7 +114960,7 @@ void m68000_device::subq_w_imm3_ds_dp() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -115007,7 +115008,7 @@ void m68000_device::subq_w_imm3_as_dp() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115033,7 +115034,7 @@ void m68000_device::subq_w_imm3_as_dp() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -115059,7 +115060,7 @@ void m68000_device::subq_w_imm3_ais_dp() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115089,7 +115090,7 @@ void m68000_device::subq_w_imm3_ais_dp() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115161,7 +115162,7 @@ void m68000_device::subq_w_imm3_aips_dp() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115189,7 +115190,7 @@ void m68000_device::subq_w_imm3_aips_dp() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115263,7 +115264,7 @@ void m68000_device::subq_w_imm3_pais_dp() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115291,7 +115292,7 @@ void m68000_device::subq_w_imm3_pais_dp() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115382,7 +115383,7 @@ void m68000_device::subq_w_imm3_das_dp() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115412,7 +115413,7 @@ void m68000_device::subq_w_imm3_das_dp() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115476,7 +115477,7 @@ void m68000_device::subq_w_imm3_dais_dp() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -115544,7 +115545,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115574,7 +115575,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115666,7 +115667,7 @@ void m68000_device::subq_w_imm3_adr16_dp() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -115694,7 +115695,7 @@ void m68000_device::subq_w_imm3_adr16_dp() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115810,7 +115811,7 @@ void m68000_device::subq_w_imm3_adr32_dp() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -115838,7 +115839,7 @@ void m68000_device::subq_w_imm3_adr32_dp() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115906,7 +115907,7 @@ void m68000_device::subq_l_imm3_ds_dp() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -115933,7 +115934,7 @@ void m68000_device::subq_l_imm3_ds_dp() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -115962,7 +115963,7 @@ void m68000_device::subq_l_imm3_as_dp() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115988,7 +115989,7 @@ void m68000_device::subq_l_imm3_as_dp() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -116014,7 +116015,7 @@ void m68000_device::subq_l_imm3_ais_dp() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116068,7 +116069,7 @@ void m68000_device::subq_l_imm3_ais_dp() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116096,7 +116097,7 @@ void m68000_device::subq_l_imm3_ais_dp() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116160,7 +116161,7 @@ void m68000_device::subq_l_imm3_aips_dp() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116217,7 +116218,7 @@ void m68000_device::subq_l_imm3_aips_dp() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116245,7 +116246,7 @@ void m68000_device::subq_l_imm3_aips_dp() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116308,7 +116309,7 @@ void m68000_device::subq_l_imm3_pais_dp() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -116367,7 +116368,7 @@ void m68000_device::subq_l_imm3_pais_dp() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116395,7 +116396,7 @@ void m68000_device::subq_l_imm3_pais_dp() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116483,7 +116484,7 @@ void m68000_device::subq_l_imm3_das_dp() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116537,7 +116538,7 @@ void m68000_device::subq_l_imm3_das_dp() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116565,7 +116566,7 @@ void m68000_device::subq_l_imm3_das_dp() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116627,7 +116628,7 @@ void m68000_device::subq_l_imm3_dais_dp() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -116694,7 +116695,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116748,7 +116749,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116776,7 +116777,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116866,7 +116867,7 @@ void m68000_device::subq_l_imm3_adr16_dp() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116920,7 +116921,7 @@ void m68000_device::subq_l_imm3_adr16_dp() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116948,7 +116949,7 @@ void m68000_device::subq_l_imm3_adr16_dp() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117062,7 +117063,7 @@ void m68000_device::subq_l_imm3_adr32_dp() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117116,7 +117117,7 @@ void m68000_device::subq_l_imm3_adr32_dp() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117144,7 +117145,7 @@ void m68000_device::subq_l_imm3_adr32_dp() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117210,7 +117211,7 @@ void m68000_device::sf_ds_dp() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117222,7 +117223,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117253,7 +117254,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -117281,7 +117282,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117300,7 +117301,7 @@ void m68000_device::dbra_ds_rel16_dp() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117312,13 +117313,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117349,7 +117350,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117357,7 +117358,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117384,11 +117385,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117422,13 +117423,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117462,7 +117463,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117499,11 +117500,11 @@ void m68000_device::sf_ais_dp() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117525,7 +117526,7 @@ void m68000_device::sf_ais_dp() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117535,7 +117536,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117562,7 +117563,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117593,7 +117594,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117627,12 +117628,12 @@ void m68000_device::sf_aips_dp() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117655,7 +117656,7 @@ void m68000_device::sf_aips_dp() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117665,7 +117666,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117692,7 +117693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117723,7 +117724,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117756,7 +117757,7 @@ void m68000_device::sf_pais_dp() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117764,7 +117765,7 @@ void m68000_device::sf_pais_dp() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117787,7 +117788,7 @@ void m68000_device::sf_pais_dp() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117797,7 +117798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117824,7 +117825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117855,7 +117856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117886,7 +117887,7 @@ void m68000_device::sf_das_dp() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117912,11 +117913,11 @@ void m68000_device::sf_das_dp() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117938,7 +117939,7 @@ void m68000_device::sf_das_dp() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117948,7 +117949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117975,7 +117976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118006,7 +118007,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118035,14 +118036,14 @@ void m68000_device::sf_dais_dp() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118050,7 +118051,7 @@ void m68000_device::sf_dais_dp() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118077,7 +118078,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118106,11 +118107,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118132,7 +118133,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118142,7 +118143,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118169,7 +118170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118200,7 +118201,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118233,7 +118234,7 @@ void m68000_device::sf_adr16_dp() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118259,7 +118260,7 @@ void m68000_device::sf_adr16_dp() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -118282,7 +118283,7 @@ void m68000_device::sf_adr16_dp() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118319,7 +118320,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118350,7 +118351,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118381,7 +118382,7 @@ void m68000_device::sf_adr32_dp() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118408,7 +118409,7 @@ void m68000_device::sf_adr32_dp() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118434,7 +118435,7 @@ void m68000_device::sf_adr32_dp() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118457,7 +118458,7 @@ void m68000_device::sf_adr32_dp() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118467,7 +118468,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118494,7 +118495,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -118525,7 +118526,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118558,7 +118559,7 @@ void m68000_device::shi_ds_dp() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118570,7 +118571,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118601,7 +118602,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118629,7 +118630,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118648,7 +118649,7 @@ void m68000_device::dbhi_ds_rel16_dp() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118660,13 +118661,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118697,7 +118698,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118705,7 +118706,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118732,11 +118733,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118770,13 +118771,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118810,7 +118811,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118847,11 +118848,11 @@ void m68000_device::shi_ais_dp() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118873,7 +118874,7 @@ void m68000_device::shi_ais_dp() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118883,7 +118884,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118910,7 +118911,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -118941,7 +118942,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118975,12 +118976,12 @@ void m68000_device::shi_aips_dp() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119003,7 +119004,7 @@ void m68000_device::shi_aips_dp() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119013,7 +119014,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119040,7 +119041,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119071,7 +119072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119104,7 +119105,7 @@ void m68000_device::shi_pais_dp() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119112,7 +119113,7 @@ void m68000_device::shi_pais_dp() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119135,7 +119136,7 @@ void m68000_device::shi_pais_dp() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119145,7 +119146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119172,7 +119173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119203,7 +119204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119234,7 +119235,7 @@ void m68000_device::shi_das_dp() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119260,11 +119261,11 @@ void m68000_device::shi_das_dp() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119286,7 +119287,7 @@ void m68000_device::shi_das_dp() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119296,7 +119297,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119323,7 +119324,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119354,7 +119355,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119383,14 +119384,14 @@ void m68000_device::shi_dais_dp() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119398,7 +119399,7 @@ void m68000_device::shi_dais_dp() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119425,7 +119426,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119454,11 +119455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119480,7 +119481,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119490,7 +119491,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119548,7 +119549,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119581,7 +119582,7 @@ void m68000_device::shi_adr16_dp() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -119607,7 +119608,7 @@ void m68000_device::shi_adr16_dp() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -119630,7 +119631,7 @@ void m68000_device::shi_adr16_dp() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119640,7 +119641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119667,7 +119668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119698,7 +119699,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119729,7 +119730,7 @@ void m68000_device::shi_adr32_dp() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119756,7 +119757,7 @@ void m68000_device::shi_adr32_dp() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119782,7 +119783,7 @@ void m68000_device::shi_adr32_dp() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -119805,7 +119806,7 @@ void m68000_device::shi_adr32_dp() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119815,7 +119816,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119842,7 +119843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -119873,7 +119874,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119906,7 +119907,7 @@ void m68000_device::sls_ds_dp() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119918,7 +119919,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119949,7 +119950,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119977,7 +119978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119996,7 +119997,7 @@ void m68000_device::dbls_ds_rel16_dp() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -120008,13 +120009,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120045,7 +120046,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -120053,7 +120054,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120080,11 +120081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120118,13 +120119,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120158,7 +120159,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120195,11 +120196,11 @@ void m68000_device::sls_ais_dp() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120221,7 +120222,7 @@ void m68000_device::sls_ais_dp() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120231,7 +120232,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120258,7 +120259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120289,7 +120290,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120323,12 +120324,12 @@ void m68000_device::sls_aips_dp() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120351,7 +120352,7 @@ void m68000_device::sls_aips_dp() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120361,7 +120362,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120388,7 +120389,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120419,7 +120420,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120452,7 +120453,7 @@ void m68000_device::sls_pais_dp() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120460,7 +120461,7 @@ void m68000_device::sls_pais_dp() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120483,7 +120484,7 @@ void m68000_device::sls_pais_dp() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120493,7 +120494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120520,7 +120521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120551,7 +120552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120582,7 +120583,7 @@ void m68000_device::sls_das_dp() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120608,11 +120609,11 @@ void m68000_device::sls_das_dp() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120634,7 +120635,7 @@ void m68000_device::sls_das_dp() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120644,7 +120645,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120671,7 +120672,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120702,7 +120703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120731,14 +120732,14 @@ void m68000_device::sls_dais_dp() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120746,7 +120747,7 @@ void m68000_device::sls_dais_dp() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120773,7 +120774,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120802,11 +120803,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120828,7 +120829,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120838,7 +120839,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120865,7 +120866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120896,7 +120897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120929,7 +120930,7 @@ void m68000_device::sls_adr16_dp() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120955,7 +120956,7 @@ void m68000_device::sls_adr16_dp() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -120978,7 +120979,7 @@ void m68000_device::sls_adr16_dp() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120988,7 +120989,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121015,7 +121016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -121046,7 +121047,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121077,7 +121078,7 @@ void m68000_device::sls_adr32_dp() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121104,7 +121105,7 @@ void m68000_device::sls_adr32_dp() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121130,7 +121131,7 @@ void m68000_device::sls_adr32_dp() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121153,7 +121154,7 @@ void m68000_device::sls_adr32_dp() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121163,7 +121164,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121190,7 +121191,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -121221,7 +121222,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121254,7 +121255,7 @@ void m68000_device::scc_ds_dp() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -121266,7 +121267,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121297,7 +121298,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121325,7 +121326,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -121344,7 +121345,7 @@ void m68000_device::dbcc_ds_rel16_dp() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -121356,13 +121357,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -121393,7 +121394,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -121401,7 +121402,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121428,11 +121429,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121466,13 +121467,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121506,7 +121507,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121543,11 +121544,11 @@ void m68000_device::scc_ais_dp() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121569,7 +121570,7 @@ void m68000_device::scc_ais_dp() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121579,7 +121580,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121606,7 +121607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121637,7 +121638,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121671,12 +121672,12 @@ void m68000_device::scc_aips_dp() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121699,7 +121700,7 @@ void m68000_device::scc_aips_dp() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121709,7 +121710,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121736,7 +121737,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121767,7 +121768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121800,7 +121801,7 @@ void m68000_device::scc_pais_dp() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -121808,7 +121809,7 @@ void m68000_device::scc_pais_dp() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121831,7 +121832,7 @@ void m68000_device::scc_pais_dp() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121841,7 +121842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121868,7 +121869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121899,7 +121900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121930,7 +121931,7 @@ void m68000_device::scc_das_dp() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121956,11 +121957,11 @@ void m68000_device::scc_das_dp() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121982,7 +121983,7 @@ void m68000_device::scc_das_dp() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121992,7 +121993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122019,7 +122020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122050,7 +122051,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122079,14 +122080,14 @@ void m68000_device::scc_dais_dp() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -122094,7 +122095,7 @@ void m68000_device::scc_dais_dp() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122121,7 +122122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122150,11 +122151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122176,7 +122177,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122186,7 +122187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122213,7 +122214,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122244,7 +122245,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122277,7 +122278,7 @@ void m68000_device::scc_adr16_dp() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122303,7 +122304,7 @@ void m68000_device::scc_adr16_dp() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -122326,7 +122327,7 @@ void m68000_device::scc_adr16_dp() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122336,7 +122337,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122363,7 +122364,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122394,7 +122395,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122425,7 +122426,7 @@ void m68000_device::scc_adr32_dp() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122452,7 +122453,7 @@ void m68000_device::scc_adr32_dp() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122478,7 +122479,7 @@ void m68000_device::scc_adr32_dp() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -122501,7 +122502,7 @@ void m68000_device::scc_adr32_dp() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122511,7 +122512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122538,7 +122539,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -122569,7 +122570,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122602,7 +122603,7 @@ void m68000_device::scs_ds_dp() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -122614,7 +122615,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122645,7 +122646,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122673,7 +122674,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -122692,7 +122693,7 @@ void m68000_device::dbcs_ds_rel16_dp() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -122704,13 +122705,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122741,7 +122742,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -122749,7 +122750,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122776,11 +122777,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122814,13 +122815,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122854,7 +122855,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122891,11 +122892,11 @@ void m68000_device::scs_ais_dp() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122917,7 +122918,7 @@ void m68000_device::scs_ais_dp() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122927,7 +122928,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122954,7 +122955,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -122985,7 +122986,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123019,12 +123020,12 @@ void m68000_device::scs_aips_dp() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123047,7 +123048,7 @@ void m68000_device::scs_aips_dp() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123057,7 +123058,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123084,7 +123085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123115,7 +123116,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123148,7 +123149,7 @@ void m68000_device::scs_pais_dp() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -123156,7 +123157,7 @@ void m68000_device::scs_pais_dp() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123179,7 +123180,7 @@ void m68000_device::scs_pais_dp() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123189,7 +123190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123216,7 +123217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123247,7 +123248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123278,7 +123279,7 @@ void m68000_device::scs_das_dp() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123304,11 +123305,11 @@ void m68000_device::scs_das_dp() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123330,7 +123331,7 @@ void m68000_device::scs_das_dp() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123340,7 +123341,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123367,7 +123368,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123398,7 +123399,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123427,14 +123428,14 @@ void m68000_device::scs_dais_dp() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -123442,7 +123443,7 @@ void m68000_device::scs_dais_dp() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123469,7 +123470,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123498,11 +123499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123524,7 +123525,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123534,7 +123535,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123561,7 +123562,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123592,7 +123593,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123625,7 +123626,7 @@ void m68000_device::scs_adr16_dp() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -123651,7 +123652,7 @@ void m68000_device::scs_adr16_dp() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -123674,7 +123675,7 @@ void m68000_device::scs_adr16_dp() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123684,7 +123685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123711,7 +123712,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123742,7 +123743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123773,7 +123774,7 @@ void m68000_device::scs_adr32_dp() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123800,7 +123801,7 @@ void m68000_device::scs_adr32_dp() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -123826,7 +123827,7 @@ void m68000_device::scs_adr32_dp() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123849,7 +123850,7 @@ void m68000_device::scs_adr32_dp() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123859,7 +123860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123886,7 +123887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -123917,7 +123918,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123950,7 +123951,7 @@ void m68000_device::sne_ds_dp() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -123962,7 +123963,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123993,7 +123994,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -124021,7 +124022,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -124040,7 +124041,7 @@ void m68000_device::dbne_ds_rel16_dp() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -124052,13 +124053,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124089,7 +124090,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -124097,7 +124098,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124124,11 +124125,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124162,13 +124163,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124202,7 +124203,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124239,11 +124240,11 @@ void m68000_device::sne_ais_dp() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124265,7 +124266,7 @@ void m68000_device::sne_ais_dp() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124275,7 +124276,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124302,7 +124303,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124333,7 +124334,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124367,12 +124368,12 @@ void m68000_device::sne_aips_dp() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124395,7 +124396,7 @@ void m68000_device::sne_aips_dp() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124405,7 +124406,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124432,7 +124433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124463,7 +124464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124496,7 +124497,7 @@ void m68000_device::sne_pais_dp() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124504,7 +124505,7 @@ void m68000_device::sne_pais_dp() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124527,7 +124528,7 @@ void m68000_device::sne_pais_dp() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124537,7 +124538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124564,7 +124565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124595,7 +124596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124626,7 +124627,7 @@ void m68000_device::sne_das_dp() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124652,11 +124653,11 @@ void m68000_device::sne_das_dp() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124678,7 +124679,7 @@ void m68000_device::sne_das_dp() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124688,7 +124689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124715,7 +124716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124746,7 +124747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124775,14 +124776,14 @@ void m68000_device::sne_dais_dp() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124790,7 +124791,7 @@ void m68000_device::sne_dais_dp() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124817,7 +124818,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124846,11 +124847,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124872,7 +124873,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124882,7 +124883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124909,7 +124910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124940,7 +124941,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124973,7 +124974,7 @@ void m68000_device::sne_adr16_dp() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124999,7 +125000,7 @@ void m68000_device::sne_adr16_dp() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -125022,7 +125023,7 @@ void m68000_device::sne_adr16_dp() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125032,7 +125033,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125059,7 +125060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -125090,7 +125091,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125121,7 +125122,7 @@ void m68000_device::sne_adr32_dp() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125148,7 +125149,7 @@ void m68000_device::sne_adr32_dp() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125174,7 +125175,7 @@ void m68000_device::sne_adr32_dp() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125197,7 +125198,7 @@ void m68000_device::sne_adr32_dp() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125207,7 +125208,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125234,7 +125235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -125265,7 +125266,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125298,7 +125299,7 @@ void m68000_device::seq_ds_dp() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -125310,7 +125311,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125341,7 +125342,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125369,7 +125370,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125388,7 +125389,7 @@ void m68000_device::dbeq_ds_rel16_dp() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -125400,13 +125401,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -125437,7 +125438,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -125445,7 +125446,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125472,11 +125473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125510,13 +125511,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125550,7 +125551,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125587,11 +125588,11 @@ void m68000_device::seq_ais_dp() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -125613,7 +125614,7 @@ void m68000_device::seq_ais_dp() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125623,7 +125624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125650,7 +125651,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125681,7 +125682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125715,12 +125716,12 @@ void m68000_device::seq_aips_dp() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125743,7 +125744,7 @@ void m68000_device::seq_aips_dp() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125753,7 +125754,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125780,7 +125781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125811,7 +125812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125844,7 +125845,7 @@ void m68000_device::seq_pais_dp() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -125852,7 +125853,7 @@ void m68000_device::seq_pais_dp() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125875,7 +125876,7 @@ void m68000_device::seq_pais_dp() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125885,7 +125886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125912,7 +125913,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125943,7 +125944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125974,7 +125975,7 @@ void m68000_device::seq_das_dp() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126000,11 +126001,11 @@ void m68000_device::seq_das_dp() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126026,7 +126027,7 @@ void m68000_device::seq_das_dp() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126036,7 +126037,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126063,7 +126064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126094,7 +126095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126123,14 +126124,14 @@ void m68000_device::seq_dais_dp() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -126138,7 +126139,7 @@ void m68000_device::seq_dais_dp() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126165,7 +126166,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126194,11 +126195,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126220,7 +126221,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126230,7 +126231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126257,7 +126258,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126288,7 +126289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126321,7 +126322,7 @@ void m68000_device::seq_adr16_dp() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126347,7 +126348,7 @@ void m68000_device::seq_adr16_dp() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -126370,7 +126371,7 @@ void m68000_device::seq_adr16_dp() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126380,7 +126381,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126407,7 +126408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126438,7 +126439,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126469,7 +126470,7 @@ void m68000_device::seq_adr32_dp() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126496,7 +126497,7 @@ void m68000_device::seq_adr32_dp() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126522,7 +126523,7 @@ void m68000_device::seq_adr32_dp() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -126545,7 +126546,7 @@ void m68000_device::seq_adr32_dp() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126555,7 +126556,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126582,7 +126583,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -126613,7 +126614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126646,7 +126647,7 @@ void m68000_device::svc_ds_dp() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -126658,7 +126659,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126689,7 +126690,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126717,7 +126718,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126736,7 +126737,7 @@ void m68000_device::dbvc_ds_rel16_dp() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -126748,13 +126749,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126785,7 +126786,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -126793,7 +126794,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126820,11 +126821,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126858,13 +126859,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126898,7 +126899,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126935,11 +126936,11 @@ void m68000_device::svc_ais_dp() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126961,7 +126962,7 @@ void m68000_device::svc_ais_dp() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126971,7 +126972,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126998,7 +126999,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127029,7 +127030,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127063,12 +127064,12 @@ void m68000_device::svc_aips_dp() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127091,7 +127092,7 @@ void m68000_device::svc_aips_dp() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127101,7 +127102,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127128,7 +127129,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127159,7 +127160,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127192,7 +127193,7 @@ void m68000_device::svc_pais_dp() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -127200,7 +127201,7 @@ void m68000_device::svc_pais_dp() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127223,7 +127224,7 @@ void m68000_device::svc_pais_dp() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127233,7 +127234,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127260,7 +127261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127291,7 +127292,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127322,7 +127323,7 @@ void m68000_device::svc_das_dp() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127348,11 +127349,11 @@ void m68000_device::svc_das_dp() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127374,7 +127375,7 @@ void m68000_device::svc_das_dp() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127384,7 +127385,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127411,7 +127412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127442,7 +127443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127471,14 +127472,14 @@ void m68000_device::svc_dais_dp() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -127486,7 +127487,7 @@ void m68000_device::svc_dais_dp() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127513,7 +127514,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127542,11 +127543,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127568,7 +127569,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127578,7 +127579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127605,7 +127606,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127636,7 +127637,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127669,7 +127670,7 @@ void m68000_device::svc_adr16_dp() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -127695,7 +127696,7 @@ void m68000_device::svc_adr16_dp() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -127718,7 +127719,7 @@ void m68000_device::svc_adr16_dp() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127728,7 +127729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127755,7 +127756,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127786,7 +127787,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127817,7 +127818,7 @@ void m68000_device::svc_adr32_dp() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127844,7 +127845,7 @@ void m68000_device::svc_adr32_dp() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -127870,7 +127871,7 @@ void m68000_device::svc_adr32_dp() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127893,7 +127894,7 @@ void m68000_device::svc_adr32_dp() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127903,7 +127904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127930,7 +127931,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -127961,7 +127962,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127994,7 +127995,7 @@ void m68000_device::svs_ds_dp() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -128006,7 +128007,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128037,7 +128038,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -128065,7 +128066,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -128084,7 +128085,7 @@ void m68000_device::dbvs_ds_rel16_dp() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -128096,13 +128097,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -128133,7 +128134,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -128141,7 +128142,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128168,11 +128169,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128206,13 +128207,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128246,7 +128247,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128283,11 +128284,11 @@ void m68000_device::svs_ais_dp() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128309,7 +128310,7 @@ void m68000_device::svs_ais_dp() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128319,7 +128320,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128346,7 +128347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128377,7 +128378,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128411,12 +128412,12 @@ void m68000_device::svs_aips_dp() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128439,7 +128440,7 @@ void m68000_device::svs_aips_dp() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128449,7 +128450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128476,7 +128477,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128507,7 +128508,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128540,7 +128541,7 @@ void m68000_device::svs_pais_dp() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -128548,7 +128549,7 @@ void m68000_device::svs_pais_dp() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128571,7 +128572,7 @@ void m68000_device::svs_pais_dp() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128581,7 +128582,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128608,7 +128609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128639,7 +128640,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128670,7 +128671,7 @@ void m68000_device::svs_das_dp() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128696,11 +128697,11 @@ void m68000_device::svs_das_dp() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128722,7 +128723,7 @@ void m68000_device::svs_das_dp() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128732,7 +128733,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128759,7 +128760,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128790,7 +128791,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128819,14 +128820,14 @@ void m68000_device::svs_dais_dp() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -128834,7 +128835,7 @@ void m68000_device::svs_dais_dp() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128861,7 +128862,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128890,11 +128891,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128916,7 +128917,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128926,7 +128927,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128953,7 +128954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128984,7 +128985,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129017,7 +129018,7 @@ void m68000_device::svs_adr16_dp() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129043,7 +129044,7 @@ void m68000_device::svs_adr16_dp() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -129066,7 +129067,7 @@ void m68000_device::svs_adr16_dp() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129076,7 +129077,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129103,7 +129104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -129134,7 +129135,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129165,7 +129166,7 @@ void m68000_device::svs_adr32_dp() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129192,7 +129193,7 @@ void m68000_device::svs_adr32_dp() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129218,7 +129219,7 @@ void m68000_device::svs_adr32_dp() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129241,7 +129242,7 @@ void m68000_device::svs_adr32_dp() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129251,7 +129252,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129278,7 +129279,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -129309,7 +129310,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129342,7 +129343,7 @@ void m68000_device::spl_ds_dp() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -129354,7 +129355,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129385,7 +129386,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129413,7 +129414,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -129432,7 +129433,7 @@ void m68000_device::dbpl_ds_rel16_dp() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -129444,13 +129445,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129481,7 +129482,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -129489,7 +129490,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129516,11 +129517,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129554,13 +129555,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129594,7 +129595,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129631,11 +129632,11 @@ void m68000_device::spl_ais_dp() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -129657,7 +129658,7 @@ void m68000_device::spl_ais_dp() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129667,7 +129668,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129694,7 +129695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129725,7 +129726,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129759,12 +129760,12 @@ void m68000_device::spl_aips_dp() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129787,7 +129788,7 @@ void m68000_device::spl_aips_dp() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129797,7 +129798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129824,7 +129825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129855,7 +129856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129888,7 +129889,7 @@ void m68000_device::spl_pais_dp() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -129896,7 +129897,7 @@ void m68000_device::spl_pais_dp() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129919,7 +129920,7 @@ void m68000_device::spl_pais_dp() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129929,7 +129930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129956,7 +129957,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129987,7 +129988,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130018,7 +130019,7 @@ void m68000_device::spl_das_dp() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130044,11 +130045,11 @@ void m68000_device::spl_das_dp() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130070,7 +130071,7 @@ void m68000_device::spl_das_dp() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130080,7 +130081,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130107,7 +130108,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130138,7 +130139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130167,14 +130168,14 @@ void m68000_device::spl_dais_dp() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -130182,7 +130183,7 @@ void m68000_device::spl_dais_dp() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130209,7 +130210,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130238,11 +130239,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130264,7 +130265,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130274,7 +130275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130301,7 +130302,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130332,7 +130333,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130365,7 +130366,7 @@ void m68000_device::spl_adr16_dp() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130391,7 +130392,7 @@ void m68000_device::spl_adr16_dp() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -130414,7 +130415,7 @@ void m68000_device::spl_adr16_dp() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130424,7 +130425,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130451,7 +130452,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130482,7 +130483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130513,7 +130514,7 @@ void m68000_device::spl_adr32_dp() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130540,7 +130541,7 @@ void m68000_device::spl_adr32_dp() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130566,7 +130567,7 @@ void m68000_device::spl_adr32_dp() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130589,7 +130590,7 @@ void m68000_device::spl_adr32_dp() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130599,7 +130600,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130626,7 +130627,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -130657,7 +130658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130690,7 +130691,7 @@ void m68000_device::smi_ds_dp() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130702,7 +130703,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130733,7 +130734,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130761,7 +130762,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130780,7 +130781,7 @@ void m68000_device::dbmi_ds_rel16_dp() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130792,13 +130793,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130829,7 +130830,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130837,7 +130838,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130864,11 +130865,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130902,13 +130903,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130942,7 +130943,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130979,11 +130980,11 @@ void m68000_device::smi_ais_dp() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131005,7 +131006,7 @@ void m68000_device::smi_ais_dp() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131015,7 +131016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131042,7 +131043,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131073,7 +131074,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131107,12 +131108,12 @@ void m68000_device::smi_aips_dp() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131135,7 +131136,7 @@ void m68000_device::smi_aips_dp() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131145,7 +131146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131172,7 +131173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131203,7 +131204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131236,7 +131237,7 @@ void m68000_device::smi_pais_dp() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131244,7 +131245,7 @@ void m68000_device::smi_pais_dp() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131267,7 +131268,7 @@ void m68000_device::smi_pais_dp() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131277,7 +131278,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131304,7 +131305,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131335,7 +131336,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131366,7 +131367,7 @@ void m68000_device::smi_das_dp() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131392,11 +131393,11 @@ void m68000_device::smi_das_dp() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131418,7 +131419,7 @@ void m68000_device::smi_das_dp() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131428,7 +131429,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131455,7 +131456,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131486,7 +131487,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131515,14 +131516,14 @@ void m68000_device::smi_dais_dp() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131530,7 +131531,7 @@ void m68000_device::smi_dais_dp() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131557,7 +131558,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131586,11 +131587,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131612,7 +131613,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131622,7 +131623,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131649,7 +131650,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131680,7 +131681,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131713,7 +131714,7 @@ void m68000_device::smi_adr16_dp() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131739,7 +131740,7 @@ void m68000_device::smi_adr16_dp() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -131762,7 +131763,7 @@ void m68000_device::smi_adr16_dp() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131772,7 +131773,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131799,7 +131800,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131830,7 +131831,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131861,7 +131862,7 @@ void m68000_device::smi_adr32_dp() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131888,7 +131889,7 @@ void m68000_device::smi_adr32_dp() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -131914,7 +131915,7 @@ void m68000_device::smi_adr32_dp() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -131937,7 +131938,7 @@ void m68000_device::smi_adr32_dp() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131947,7 +131948,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131974,7 +131975,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -132005,7 +132006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132038,7 +132039,7 @@ void m68000_device::sge_ds_dp() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -132050,7 +132051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132081,7 +132082,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -132109,7 +132110,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -132128,7 +132129,7 @@ void m68000_device::dbge_ds_rel16_dp() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -132140,13 +132141,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -132177,7 +132178,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -132185,7 +132186,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132212,11 +132213,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132250,13 +132251,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132290,7 +132291,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132327,11 +132328,11 @@ void m68000_device::sge_ais_dp() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132353,7 +132354,7 @@ void m68000_device::sge_ais_dp() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132363,7 +132364,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132390,7 +132391,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132421,7 +132422,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132455,12 +132456,12 @@ void m68000_device::sge_aips_dp() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132483,7 +132484,7 @@ void m68000_device::sge_aips_dp() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132493,7 +132494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132520,7 +132521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132551,7 +132552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132584,7 +132585,7 @@ void m68000_device::sge_pais_dp() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132592,7 +132593,7 @@ void m68000_device::sge_pais_dp() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132615,7 +132616,7 @@ void m68000_device::sge_pais_dp() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132625,7 +132626,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132652,7 +132653,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132683,7 +132684,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132714,7 +132715,7 @@ void m68000_device::sge_das_dp() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132740,11 +132741,11 @@ void m68000_device::sge_das_dp() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132766,7 +132767,7 @@ void m68000_device::sge_das_dp() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132776,7 +132777,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132803,7 +132804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -132834,7 +132835,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132863,14 +132864,14 @@ void m68000_device::sge_dais_dp() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132878,7 +132879,7 @@ void m68000_device::sge_dais_dp() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132905,7 +132906,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132934,11 +132935,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132960,7 +132961,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132970,7 +132971,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132997,7 +132998,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133028,7 +133029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133061,7 +133062,7 @@ void m68000_device::sge_adr16_dp() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133087,7 +133088,7 @@ void m68000_device::sge_adr16_dp() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -133110,7 +133111,7 @@ void m68000_device::sge_adr16_dp() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133120,7 +133121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133147,7 +133148,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133178,7 +133179,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133209,7 +133210,7 @@ void m68000_device::sge_adr32_dp() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133236,7 +133237,7 @@ void m68000_device::sge_adr32_dp() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133262,7 +133263,7 @@ void m68000_device::sge_adr32_dp() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -133285,7 +133286,7 @@ void m68000_device::sge_adr32_dp() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133295,7 +133296,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133322,7 +133323,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -133353,7 +133354,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133386,7 +133387,7 @@ void m68000_device::slt_ds_dp() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -133398,7 +133399,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133429,7 +133430,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133457,7 +133458,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -133476,7 +133477,7 @@ void m68000_device::dblt_ds_rel16_dp() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -133488,13 +133489,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133525,7 +133526,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -133533,7 +133534,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133560,11 +133561,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133598,13 +133599,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133638,7 +133639,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133675,11 +133676,11 @@ void m68000_device::slt_ais_dp() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -133701,7 +133702,7 @@ void m68000_device::slt_ais_dp() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133711,7 +133712,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133738,7 +133739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133769,7 +133770,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133803,12 +133804,12 @@ void m68000_device::slt_aips_dp() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133831,7 +133832,7 @@ void m68000_device::slt_aips_dp() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133841,7 +133842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133868,7 +133869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133899,7 +133900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133932,7 +133933,7 @@ void m68000_device::slt_pais_dp() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -133940,7 +133941,7 @@ void m68000_device::slt_pais_dp() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133963,7 +133964,7 @@ void m68000_device::slt_pais_dp() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133973,7 +133974,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134000,7 +134001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -134031,7 +134032,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134062,7 +134063,7 @@ void m68000_device::slt_das_dp() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134088,11 +134089,11 @@ void m68000_device::slt_das_dp() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134114,7 +134115,7 @@ void m68000_device::slt_das_dp() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134124,7 +134125,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134151,7 +134152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134182,7 +134183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134211,14 +134212,14 @@ void m68000_device::slt_dais_dp() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -134226,7 +134227,7 @@ void m68000_device::slt_dais_dp() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134253,7 +134254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134282,11 +134283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134308,7 +134309,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134318,7 +134319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134345,7 +134346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134376,7 +134377,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134409,7 +134410,7 @@ void m68000_device::slt_adr16_dp() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134435,7 +134436,7 @@ void m68000_device::slt_adr16_dp() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -134458,7 +134459,7 @@ void m68000_device::slt_adr16_dp() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134468,7 +134469,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134495,7 +134496,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134526,7 +134527,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134557,7 +134558,7 @@ void m68000_device::slt_adr32_dp() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134584,7 +134585,7 @@ void m68000_device::slt_adr32_dp() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134610,7 +134611,7 @@ void m68000_device::slt_adr32_dp() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -134633,7 +134634,7 @@ void m68000_device::slt_adr32_dp() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134643,7 +134644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134670,7 +134671,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -134701,7 +134702,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134734,7 +134735,7 @@ void m68000_device::sgt_ds_dp() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -134746,7 +134747,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134777,7 +134778,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134805,7 +134806,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -134824,7 +134825,7 @@ void m68000_device::dbgt_ds_rel16_dp() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -134836,13 +134837,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134873,7 +134874,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -134881,7 +134882,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134908,11 +134909,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134946,13 +134947,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134986,7 +134987,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135023,11 +135024,11 @@ void m68000_device::sgt_ais_dp() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135049,7 +135050,7 @@ void m68000_device::sgt_ais_dp() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135059,7 +135060,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135086,7 +135087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135117,7 +135118,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135151,12 +135152,12 @@ void m68000_device::sgt_aips_dp() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135179,7 +135180,7 @@ void m68000_device::sgt_aips_dp() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135189,7 +135190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135216,7 +135217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135247,7 +135248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135280,7 +135281,7 @@ void m68000_device::sgt_pais_dp() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135288,7 +135289,7 @@ void m68000_device::sgt_pais_dp() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135311,7 +135312,7 @@ void m68000_device::sgt_pais_dp() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135321,7 +135322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135348,7 +135349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135379,7 +135380,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135410,7 +135411,7 @@ void m68000_device::sgt_das_dp() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135436,11 +135437,11 @@ void m68000_device::sgt_das_dp() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135462,7 +135463,7 @@ void m68000_device::sgt_das_dp() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135472,7 +135473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135499,7 +135500,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135530,7 +135531,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135559,14 +135560,14 @@ void m68000_device::sgt_dais_dp() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135574,7 +135575,7 @@ void m68000_device::sgt_dais_dp() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135601,7 +135602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135630,11 +135631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135656,7 +135657,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135666,7 +135667,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135693,7 +135694,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135724,7 +135725,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135757,7 +135758,7 @@ void m68000_device::sgt_adr16_dp() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135783,7 +135784,7 @@ void m68000_device::sgt_adr16_dp() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -135806,7 +135807,7 @@ void m68000_device::sgt_adr16_dp() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135816,7 +135817,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135843,7 +135844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135874,7 +135875,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135905,7 +135906,7 @@ void m68000_device::sgt_adr32_dp() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135932,7 +135933,7 @@ void m68000_device::sgt_adr32_dp() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -135958,7 +135959,7 @@ void m68000_device::sgt_adr32_dp() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135981,7 +135982,7 @@ void m68000_device::sgt_adr32_dp() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135991,7 +135992,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136018,7 +136019,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -136049,7 +136050,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136082,7 +136083,7 @@ void m68000_device::sle_ds_dp() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -136094,7 +136095,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136125,7 +136126,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -136153,7 +136154,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -136172,7 +136173,7 @@ void m68000_device::dble_ds_rel16_dp() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -136184,13 +136185,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136221,7 +136222,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -136229,7 +136230,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136256,11 +136257,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136294,13 +136295,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136334,7 +136335,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136371,11 +136372,11 @@ void m68000_device::sle_ais_dp() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136397,7 +136398,7 @@ void m68000_device::sle_ais_dp() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136407,7 +136408,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136434,7 +136435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136465,7 +136466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136499,12 +136500,12 @@ void m68000_device::sle_aips_dp() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136527,7 +136528,7 @@ void m68000_device::sle_aips_dp() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136537,7 +136538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136564,7 +136565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136595,7 +136596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136628,7 +136629,7 @@ void m68000_device::sle_pais_dp() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136636,7 +136637,7 @@ void m68000_device::sle_pais_dp() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136659,7 +136660,7 @@ void m68000_device::sle_pais_dp() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136669,7 +136670,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136696,7 +136697,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136727,7 +136728,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136758,7 +136759,7 @@ void m68000_device::sle_das_dp() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136784,11 +136785,11 @@ void m68000_device::sle_das_dp() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136810,7 +136811,7 @@ void m68000_device::sle_das_dp() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136820,7 +136821,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136847,7 +136848,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -136878,7 +136879,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136907,14 +136908,14 @@ void m68000_device::sle_dais_dp() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136922,7 +136923,7 @@ void m68000_device::sle_dais_dp() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136949,7 +136950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136978,11 +136979,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -137004,7 +137005,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137014,7 +137015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137041,7 +137042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137072,7 +137073,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137105,7 +137106,7 @@ void m68000_device::sle_adr16_dp() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137131,7 +137132,7 @@ void m68000_device::sle_adr16_dp() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -137154,7 +137155,7 @@ void m68000_device::sle_adr16_dp() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137164,7 +137165,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137191,7 +137192,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137222,7 +137223,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137253,7 +137254,7 @@ void m68000_device::sle_adr32_dp() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137280,7 +137281,7 @@ void m68000_device::sle_adr32_dp() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -137306,7 +137307,7 @@ void m68000_device::sle_adr32_dp() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137329,7 +137330,7 @@ void m68000_device::sle_adr32_dp() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137339,7 +137340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137366,7 +137367,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -137397,7 +137398,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137627,7 +137628,7 @@ void m68000_device::bsr_rel16_dp() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -137750,7 +137751,7 @@ void m68000_device::bsr_rel8_dp() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -140690,7 +140691,7 @@ void m68000_device::moveq_imm8o_dd_dp() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -140737,7 +140738,7 @@ void m68000_device::or_b_ds_dd_dp() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140745,7 +140746,7 @@ void m68000_device::or_b_ds_dd_dp() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140785,11 +140786,11 @@ void m68000_device::or_b_ais_dd_dp() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140811,7 +140812,7 @@ void m68000_device::or_b_ais_dd_dp() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140819,7 +140820,7 @@ void m68000_device::or_b_ais_dd_dp() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140862,12 +140863,12 @@ void m68000_device::or_b_aips_dd_dp() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140890,7 +140891,7 @@ void m68000_device::or_b_aips_dd_dp() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140898,7 +140899,7 @@ void m68000_device::or_b_aips_dd_dp() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140940,7 +140941,7 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140948,7 +140949,7 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140971,7 +140972,7 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140979,7 +140980,7 @@ void m68000_device::or_b_pais_dd_dp() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141019,7 +141020,7 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141045,11 +141046,11 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141071,7 +141072,7 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141079,7 +141080,7 @@ void m68000_device::or_b_das_dd_dp() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141117,14 +141118,14 @@ void m68000_device::or_b_dais_dd_dp() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141132,7 +141133,7 @@ void m68000_device::or_b_dais_dd_dp() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141159,7 +141160,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141188,11 +141189,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141214,7 +141215,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141222,7 +141223,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141264,7 +141265,7 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -141290,7 +141291,7 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -141313,7 +141314,7 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141321,7 +141322,7 @@ void m68000_device::or_b_adr16_dd_dp() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141361,7 +141362,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141388,7 +141389,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -141414,7 +141415,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -141437,7 +141438,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141445,7 +141446,7 @@ void m68000_device::or_b_adr32_dd_dp() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141484,7 +141485,7 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141510,11 +141511,11 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141536,7 +141537,7 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141544,7 +141545,7 @@ void m68000_device::or_b_dpc_dd_dp() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141581,14 +141582,14 @@ void m68000_device::or_b_dpci_dd_dp() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141596,7 +141597,7 @@ void m68000_device::or_b_dpci_dd_dp() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141623,7 +141624,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141652,11 +141653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141678,7 +141679,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141686,7 +141687,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141728,7 +141729,7 @@ void m68000_device::or_b_imm8_dd_dp() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141755,7 +141756,7 @@ void m68000_device::or_b_imm8_dd_dp() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141763,7 +141764,7 @@ void m68000_device::or_b_imm8_dd_dp() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141805,7 +141806,7 @@ void m68000_device::or_w_ds_dd_dp() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141813,7 +141814,7 @@ void m68000_device::or_w_ds_dd_dp() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141853,11 +141854,11 @@ void m68000_device::or_w_ais_dd_dp() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141883,7 +141884,7 @@ void m68000_device::or_w_ais_dd_dp() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141891,7 +141892,7 @@ void m68000_device::or_w_ais_dd_dp() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141934,12 +141935,12 @@ void m68000_device::or_w_aips_dd_dp() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -141966,7 +141967,7 @@ void m68000_device::or_w_aips_dd_dp() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141974,7 +141975,7 @@ void m68000_device::or_w_aips_dd_dp() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142016,7 +142017,7 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142024,7 +142025,7 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142051,7 +142052,7 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142059,7 +142060,7 @@ void m68000_device::or_w_pais_dd_dp() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142099,7 +142100,7 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142125,11 +142126,11 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142155,7 +142156,7 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142163,7 +142164,7 @@ void m68000_device::or_w_das_dd_dp() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142201,14 +142202,14 @@ void m68000_device::or_w_dais_dd_dp() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142216,7 +142217,7 @@ void m68000_device::or_w_dais_dd_dp() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142243,7 +142244,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142272,11 +142273,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142302,7 +142303,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142310,7 +142311,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142352,7 +142353,7 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -142378,7 +142379,7 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -142405,7 +142406,7 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142413,7 +142414,7 @@ void m68000_device::or_w_adr16_dd_dp() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142453,7 +142454,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142480,7 +142481,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -142506,7 +142507,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -142533,7 +142534,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142541,7 +142542,7 @@ void m68000_device::or_w_adr32_dd_dp() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142580,7 +142581,7 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142606,11 +142607,11 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142636,7 +142637,7 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142644,7 +142645,7 @@ void m68000_device::or_w_dpc_dd_dp() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142681,14 +142682,14 @@ void m68000_device::or_w_dpci_dd_dp() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142696,7 +142697,7 @@ void m68000_device::or_w_dpci_dd_dp() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142723,7 +142724,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142752,11 +142753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142782,7 +142783,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142790,7 +142791,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142832,7 +142833,7 @@ void m68000_device::or_w_imm16_dd_dp() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142859,7 +142860,7 @@ void m68000_device::or_w_imm16_dd_dp() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142867,7 +142868,7 @@ void m68000_device::or_w_imm16_dd_dp() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142909,12 +142910,12 @@ void m68000_device::or_l_ds_dd_dp() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142937,7 +142938,7 @@ void m68000_device::or_l_ds_dd_dp() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -142946,7 +142947,7 @@ void m68000_device::or_l_ds_dd_dp() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142966,7 +142967,7 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142994,7 +142995,7 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143020,12 +143021,12 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143054,7 +143055,7 @@ void m68000_device::or_l_ais_dd_dp() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143074,7 +143075,7 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143102,11 +143103,11 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143132,12 +143133,12 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143166,7 +143167,7 @@ void m68000_device::or_l_aips_dd_dp() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143185,14 +143186,14 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143219,7 +143220,7 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143245,12 +143246,12 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143279,7 +143280,7 @@ void m68000_device::or_l_pais_dd_dp() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143299,7 +143300,7 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143324,7 +143325,7 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143352,7 +143353,7 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143378,12 +143379,12 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143412,7 +143413,7 @@ void m68000_device::or_l_das_dd_dp() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143430,14 +143431,14 @@ void m68000_device::or_l_dais_dd_dp() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -143445,7 +143446,7 @@ void m68000_device::or_l_dais_dd_dp() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143472,7 +143473,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143500,7 +143501,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143528,7 +143529,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143554,12 +143555,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143588,7 +143589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143610,7 +143611,7 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -143636,7 +143637,7 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143664,7 +143665,7 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143690,12 +143691,12 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143724,7 +143725,7 @@ void m68000_device::or_l_adr16_dd_dp() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143744,7 +143745,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143771,7 +143772,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143797,7 +143798,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -143825,7 +143826,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143851,12 +143852,12 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143885,7 +143886,7 @@ void m68000_device::or_l_adr32_dd_dp() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143904,7 +143905,7 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143929,7 +143930,7 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143957,7 +143958,7 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143983,12 +143984,12 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144017,7 +144018,7 @@ void m68000_device::or_l_dpc_dd_dp() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144034,14 +144035,14 @@ void m68000_device::or_l_dpci_dd_dp() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -144049,7 +144050,7 @@ void m68000_device::or_l_dpci_dd_dp() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144076,7 +144077,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144104,7 +144105,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -144132,7 +144133,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144158,12 +144159,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144192,7 +144193,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144212,7 +144213,7 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144239,7 +144240,7 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144266,12 +144267,12 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144294,7 +144295,7 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -144303,7 +144304,7 @@ void m68000_device::or_l_imm32_dd_dp() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144325,13 +144326,13 @@ void m68000_device::divu_w_ds_dd_dp() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144344,7 +144345,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144362,7 +144363,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144370,7 +144371,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -144398,7 +144399,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144424,7 +144425,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144561,7 +144562,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144595,7 +144596,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144606,7 +144607,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144618,7 +144619,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144638,7 +144639,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -144649,7 +144650,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144659,13 +144660,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144676,7 +144677,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -144686,7 +144687,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -144694,7 +144695,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144736,7 +144737,7 @@ void m68000_device::divu_w_ais_dd_dp() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144765,13 +144766,13 @@ void m68000_device::divu_w_ais_dd_dp() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144784,7 +144785,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144802,7 +144803,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144810,7 +144811,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144838,7 +144839,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144864,7 +144865,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145001,7 +145002,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145035,7 +145036,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145046,7 +145047,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145058,7 +145059,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145078,7 +145079,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145089,7 +145090,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145099,13 +145100,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145116,7 +145117,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145126,7 +145127,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145134,7 +145135,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145182,7 +145183,7 @@ void m68000_device::divu_w_aips_dd_dp() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145209,13 +145210,13 @@ void m68000_device::divu_w_aips_dd_dp() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145228,7 +145229,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145246,7 +145247,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145254,7 +145255,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145282,7 +145283,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145308,7 +145309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145445,7 +145446,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145479,7 +145480,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145490,7 +145491,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145502,7 +145503,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145522,7 +145523,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145533,7 +145534,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145543,13 +145544,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145560,7 +145561,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145570,7 +145571,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145578,7 +145579,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145628,7 +145629,7 @@ void m68000_device::divu_w_pais_dd_dp() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145655,13 +145656,13 @@ void m68000_device::divu_w_pais_dd_dp() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145674,7 +145675,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145692,7 +145693,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145700,7 +145701,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145728,7 +145729,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145754,7 +145755,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145891,7 +145892,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145925,7 +145926,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145936,7 +145937,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145948,7 +145949,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145968,7 +145969,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145979,7 +145980,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145989,13 +145990,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146006,7 +146007,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146016,7 +146017,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146024,7 +146025,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146091,7 +146092,7 @@ void m68000_device::divu_w_das_dd_dp() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146120,13 +146121,13 @@ void m68000_device::divu_w_das_dd_dp() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146139,7 +146140,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146157,7 +146158,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146165,7 +146166,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146193,7 +146194,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146219,7 +146220,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146356,7 +146357,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146390,7 +146391,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146401,7 +146402,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146413,7 +146414,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146433,7 +146434,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146444,7 +146445,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146454,13 +146455,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146471,7 +146472,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146481,7 +146482,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146489,7 +146490,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146529,7 +146530,7 @@ void m68000_device::divu_w_dais_dd_dp() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146597,7 +146598,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146626,13 +146627,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146645,7 +146646,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146663,7 +146664,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146671,7 +146672,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146699,7 +146700,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146725,7 +146726,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146862,7 +146863,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146896,7 +146897,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146907,7 +146908,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146919,7 +146920,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146939,7 +146940,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146950,7 +146951,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146960,13 +146961,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146977,7 +146978,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146987,7 +146988,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146995,7 +146996,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147063,7 +147064,7 @@ void m68000_device::divu_w_adr16_dd_dp() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -147090,13 +147091,13 @@ void m68000_device::divu_w_adr16_dd_dp() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147109,7 +147110,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147127,7 +147128,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147135,7 +147136,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -147163,7 +147164,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147189,7 +147190,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147326,7 +147327,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147360,7 +147361,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147371,7 +147372,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147383,7 +147384,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147403,7 +147404,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147414,7 +147415,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147424,13 +147425,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147441,7 +147442,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147451,7 +147452,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147459,7 +147460,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147551,7 +147552,7 @@ void m68000_device::divu_w_adr32_dd_dp() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147578,13 +147579,13 @@ void m68000_device::divu_w_adr32_dd_dp() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147597,7 +147598,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147615,7 +147616,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147623,7 +147624,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147651,7 +147652,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147677,7 +147678,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -147814,7 +147815,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147848,7 +147849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147859,7 +147860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147871,7 +147872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147891,7 +147892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147902,7 +147903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147912,13 +147913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147929,7 +147930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147939,7 +147940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147947,7 +147948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148013,7 +148014,7 @@ void m68000_device::divu_w_dpc_dd_dp() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148042,13 +148043,13 @@ void m68000_device::divu_w_dpc_dd_dp() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148061,7 +148062,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148079,7 +148080,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148087,7 +148088,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148115,7 +148116,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148141,7 +148142,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148278,7 +148279,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148312,7 +148313,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148323,7 +148324,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148335,7 +148336,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148355,7 +148356,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148366,7 +148367,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148376,13 +148377,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148393,7 +148394,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148403,7 +148404,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148411,7 +148412,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148450,7 +148451,7 @@ void m68000_device::divu_w_dpci_dd_dp() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148518,7 +148519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148547,13 +148548,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148566,7 +148567,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148584,7 +148585,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148592,7 +148593,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148620,7 +148621,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148646,7 +148647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148783,7 +148784,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148817,7 +148818,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148828,7 +148829,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148840,7 +148841,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148860,7 +148861,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148871,7 +148872,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148881,13 +148882,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148898,7 +148899,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148908,7 +148909,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148916,7 +148917,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148986,13 +148987,13 @@ void m68000_device::divu_w_imm16_dd_dp() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -149005,7 +149006,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149023,7 +149024,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -149031,7 +149032,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -149059,7 +149060,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -149085,7 +149086,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -149222,7 +149223,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149256,7 +149257,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149267,7 +149268,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149279,7 +149280,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149299,7 +149300,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -149310,7 +149311,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149320,13 +149321,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149337,7 +149338,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -149347,7 +149348,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -149355,7 +149356,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149399,12 +149400,12 @@ void m68000_device::sbcd_ds_dd_dp() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149456,7 +149457,7 @@ void m68000_device::sbcd_pais_paid_dp() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -149500,12 +149501,12 @@ void m68000_device::sbcd_pais_paid_dp() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149564,11 +149565,11 @@ void m68000_device::or_b_dd_ais_dp() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149590,7 +149591,7 @@ void m68000_device::or_b_dd_ais_dp() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149620,7 +149621,7 @@ void m68000_device::or_b_dd_ais_dp() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149655,12 +149656,12 @@ void m68000_device::or_b_dd_aips_dp() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149683,7 +149684,7 @@ void m68000_device::or_b_dd_aips_dp() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149713,7 +149714,7 @@ void m68000_device::or_b_dd_aips_dp() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149747,7 +149748,7 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149755,7 +149756,7 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149778,7 +149779,7 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149808,7 +149809,7 @@ void m68000_device::or_b_dd_pais_dp() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149840,7 +149841,7 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149866,11 +149867,11 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149892,7 +149893,7 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149922,7 +149923,7 @@ void m68000_device::or_b_dd_das_dp() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149952,14 +149953,14 @@ void m68000_device::or_b_dd_dais_dp() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149967,7 +149968,7 @@ void m68000_device::or_b_dd_dais_dp() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149994,7 +149995,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150023,11 +150024,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -150049,7 +150050,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150079,7 +150080,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150113,7 +150114,7 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150139,7 +150140,7 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -150162,7 +150163,7 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150192,7 +150193,7 @@ void m68000_device::or_b_dd_adr16_dp() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150224,7 +150225,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150251,7 +150252,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -150277,7 +150278,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150300,7 +150301,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150330,7 +150331,7 @@ void m68000_device::or_b_dd_adr32_dp() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150362,11 +150363,11 @@ void m68000_device::or_w_dd_ais_dp() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150392,7 +150393,7 @@ void m68000_device::or_w_dd_ais_dp() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150422,7 +150423,7 @@ void m68000_device::or_w_dd_ais_dp() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150463,12 +150464,12 @@ void m68000_device::or_w_dd_aips_dp() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150495,7 +150496,7 @@ void m68000_device::or_w_dd_aips_dp() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150525,7 +150526,7 @@ void m68000_device::or_w_dd_aips_dp() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150565,7 +150566,7 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150573,7 +150574,7 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150600,7 +150601,7 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150630,7 +150631,7 @@ void m68000_device::or_w_dd_pais_dp() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150668,7 +150669,7 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150694,11 +150695,11 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150724,7 +150725,7 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150754,7 +150755,7 @@ void m68000_device::or_w_dd_das_dp() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150790,14 +150791,14 @@ void m68000_device::or_w_dd_dais_dp() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -150805,7 +150806,7 @@ void m68000_device::or_w_dd_dais_dp() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150832,7 +150833,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150861,11 +150862,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150891,7 +150892,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150921,7 +150922,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150961,7 +150962,7 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150987,7 +150988,7 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151014,7 +151015,7 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151044,7 +151045,7 @@ void m68000_device::or_w_dd_adr16_dp() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151082,7 +151083,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151109,7 +151110,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -151135,7 +151136,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -151162,7 +151163,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151192,7 +151193,7 @@ void m68000_device::or_w_dd_adr32_dp() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151230,7 +151231,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151258,7 +151259,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151284,7 +151285,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151312,7 +151313,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151340,7 +151341,7 @@ void m68000_device::or_l_dd_ais_dp() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151378,7 +151379,7 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151406,11 +151407,11 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151436,7 +151437,7 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151464,7 +151465,7 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151492,7 +151493,7 @@ void m68000_device::or_l_dd_aips_dp() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151529,14 +151530,14 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151563,7 +151564,7 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151589,7 +151590,7 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151617,7 +151618,7 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151645,7 +151646,7 @@ void m68000_device::or_l_dd_pais_dp() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151683,7 +151684,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151708,7 +151709,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151736,7 +151737,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151762,7 +151763,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151790,7 +151791,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151818,7 +151819,7 @@ void m68000_device::or_l_dd_das_dp() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151854,14 +151855,14 @@ void m68000_device::or_l_dd_dais_dp() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -151869,7 +151870,7 @@ void m68000_device::or_l_dd_dais_dp() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151896,7 +151897,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151924,7 +151925,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151952,7 +151953,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151978,7 +151979,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152006,7 +152007,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152034,7 +152035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152074,7 +152075,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152100,7 +152101,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -152128,7 +152129,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152154,7 +152155,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152182,7 +152183,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152210,7 +152211,7 @@ void m68000_device::or_l_dd_adr16_dp() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152248,7 +152249,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -152275,7 +152276,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -152301,7 +152302,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152329,7 +152330,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152355,7 +152356,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152383,7 +152384,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152411,7 +152412,7 @@ void m68000_device::or_l_dd_adr32_dp() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152451,13 +152452,13 @@ void m68000_device::divs_w_ds_dd_dp() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152471,7 +152472,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152481,7 +152482,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152496,7 +152497,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -152504,7 +152505,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -152532,7 +152533,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -152558,7 +152559,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -152690,7 +152691,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -152699,7 +152700,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -152707,12 +152708,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152720,7 +152721,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152737,7 +152738,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -152745,7 +152746,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152779,7 +152780,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152806,13 +152807,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152820,27 +152821,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152852,7 +152853,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152864,7 +152865,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152879,7 +152880,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152888,7 +152889,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152896,7 +152897,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152906,7 +152907,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152915,7 +152916,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152927,7 +152928,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152979,7 +152980,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -152995,7 +152996,7 @@ void m68000_device::divs_w_ais_dd_dp() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -153024,13 +153025,13 @@ void m68000_device::divs_w_ais_dd_dp() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153044,7 +153045,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153054,7 +153055,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153069,7 +153070,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153077,7 +153078,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153105,7 +153106,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153131,7 +153132,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153263,7 +153264,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153272,7 +153273,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153280,12 +153281,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153293,7 +153294,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153310,7 +153311,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153318,7 +153319,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153352,7 +153353,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153379,13 +153380,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153393,27 +153394,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153425,7 +153426,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153437,7 +153438,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153452,7 +153453,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153461,7 +153462,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153469,7 +153470,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153479,7 +153480,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153488,7 +153489,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153500,7 +153501,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153552,7 +153553,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -153574,7 +153575,7 @@ void m68000_device::divs_w_aips_dd_dp() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153601,13 +153602,13 @@ void m68000_device::divs_w_aips_dd_dp() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153621,7 +153622,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153631,7 +153632,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153646,7 +153647,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153654,7 +153655,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153682,7 +153683,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153708,7 +153709,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153840,7 +153841,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153849,7 +153850,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153857,12 +153858,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153870,7 +153871,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153887,7 +153888,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153895,7 +153896,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153929,7 +153930,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153956,13 +153957,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153970,27 +153971,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154002,7 +154003,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154014,7 +154015,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154029,7 +154030,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154038,7 +154039,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154046,7 +154047,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154056,7 +154057,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154065,7 +154066,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154077,7 +154078,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154129,7 +154130,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154153,7 +154154,7 @@ void m68000_device::divs_w_pais_dd_dp() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154180,13 +154181,13 @@ void m68000_device::divs_w_pais_dd_dp() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154200,7 +154201,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154210,7 +154211,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154225,7 +154226,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154233,7 +154234,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -154261,7 +154262,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154287,7 +154288,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154419,7 +154420,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -154428,7 +154429,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -154436,12 +154437,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154449,7 +154450,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154466,7 +154467,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -154474,7 +154475,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154508,7 +154509,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154535,13 +154536,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154549,27 +154550,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154581,7 +154582,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154593,7 +154594,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154608,7 +154609,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154617,7 +154618,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154625,7 +154626,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154635,7 +154636,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154644,7 +154645,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154656,7 +154657,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154708,7 +154709,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154749,7 +154750,7 @@ void m68000_device::divs_w_das_dd_dp() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -154778,13 +154779,13 @@ void m68000_device::divs_w_das_dd_dp() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154798,7 +154799,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154808,7 +154809,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154823,7 +154824,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154831,7 +154832,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154859,7 +154860,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154885,7 +154886,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155017,7 +155018,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155026,7 +155027,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155034,12 +155035,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155047,7 +155048,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155064,7 +155065,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155072,7 +155073,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155106,7 +155107,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155133,13 +155134,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155147,27 +155148,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155179,7 +155180,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155191,7 +155192,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155206,7 +155207,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155215,7 +155216,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155223,7 +155224,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155233,7 +155234,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155242,7 +155243,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155254,7 +155255,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155306,7 +155307,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155320,7 +155321,7 @@ void m68000_device::divs_w_dais_dd_dp() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -155388,7 +155389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -155417,13 +155418,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155437,7 +155438,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155447,7 +155448,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155462,7 +155463,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -155470,7 +155471,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -155498,7 +155499,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -155524,7 +155525,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155656,7 +155657,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155665,7 +155666,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155673,12 +155674,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155686,7 +155687,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155703,7 +155704,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155711,7 +155712,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155745,7 +155746,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155772,13 +155773,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155786,27 +155787,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155818,7 +155819,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155830,7 +155831,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155845,7 +155846,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155854,7 +155855,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155862,7 +155863,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155872,7 +155873,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155881,7 +155882,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155893,7 +155894,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155945,7 +155946,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155987,7 +155988,7 @@ void m68000_device::divs_w_adr16_dd_dp() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -156014,13 +156015,13 @@ void m68000_device::divs_w_adr16_dd_dp() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156034,7 +156035,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156044,7 +156045,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156059,7 +156060,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156067,7 +156068,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -156095,7 +156096,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156121,7 +156122,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156253,7 +156254,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156262,7 +156263,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156270,12 +156271,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156283,7 +156284,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156300,7 +156301,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156308,7 +156309,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156342,7 +156343,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156369,13 +156370,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156383,27 +156384,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156415,7 +156416,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156427,7 +156428,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156442,7 +156443,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156451,7 +156452,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156459,7 +156460,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156469,7 +156470,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156478,7 +156479,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156490,7 +156491,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156542,7 +156543,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -156608,7 +156609,7 @@ void m68000_device::divs_w_adr32_dd_dp() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156635,13 +156636,13 @@ void m68000_device::divs_w_adr32_dd_dp() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156655,7 +156656,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156665,7 +156666,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156680,7 +156681,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156688,7 +156689,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156716,7 +156717,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156742,7 +156743,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -156874,7 +156875,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156883,7 +156884,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156891,12 +156892,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156904,7 +156905,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156921,7 +156922,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156929,7 +156930,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156963,7 +156964,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156990,13 +156991,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157004,27 +157005,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157036,7 +157037,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157048,7 +157049,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157063,7 +157064,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157072,7 +157073,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157080,7 +157081,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157090,7 +157091,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157099,7 +157100,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157111,7 +157112,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157163,7 +157164,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157203,7 +157204,7 @@ void m68000_device::divs_w_dpc_dd_dp() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157232,13 +157233,13 @@ void m68000_device::divs_w_dpc_dd_dp() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157252,7 +157253,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157262,7 +157263,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157277,7 +157278,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157285,7 +157286,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157313,7 +157314,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157339,7 +157340,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -157471,7 +157472,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -157480,7 +157481,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -157488,12 +157489,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157501,7 +157502,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157518,7 +157519,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -157526,7 +157527,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157560,7 +157561,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157587,13 +157588,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157601,27 +157602,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157633,7 +157634,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157645,7 +157646,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157660,7 +157661,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157669,7 +157670,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157677,7 +157678,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157687,7 +157688,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157696,7 +157697,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157708,7 +157709,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157760,7 +157761,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157773,7 +157774,7 @@ void m68000_device::divs_w_dpci_dd_dp() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -157841,7 +157842,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157870,13 +157871,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157890,7 +157891,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157900,7 +157901,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157915,7 +157916,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157923,7 +157924,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157951,7 +157952,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157977,7 +157978,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -158109,7 +158110,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158118,7 +158119,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158126,12 +158127,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158139,7 +158140,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158156,7 +158157,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158164,7 +158165,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158198,7 +158199,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158225,13 +158226,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158239,27 +158240,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158271,7 +158272,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158283,7 +158284,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158298,7 +158299,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158307,7 +158308,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158315,7 +158316,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158325,7 +158326,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158334,7 +158335,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158346,7 +158347,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158398,7 +158399,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158442,13 +158443,13 @@ void m68000_device::divs_w_imm16_dd_dp() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158462,7 +158463,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158472,7 +158473,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158487,7 +158488,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -158495,7 +158496,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -158523,7 +158524,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -158549,7 +158550,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -158681,7 +158682,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158690,7 +158691,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158698,12 +158699,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158711,7 +158712,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158728,7 +158729,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158736,7 +158737,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158770,7 +158771,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158797,13 +158798,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158811,27 +158812,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158843,7 +158844,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158855,7 +158856,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158870,7 +158871,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158879,7 +158880,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158887,7 +158888,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158897,7 +158898,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158906,7 +158907,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158918,7 +158919,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158970,7 +158971,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158988,7 +158989,7 @@ void m68000_device::sub_b_ds_dd_dp() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159035,7 +159036,7 @@ void m68000_device::sub_b_ais_dd_dp() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159060,7 +159061,7 @@ void m68000_device::sub_b_ais_dd_dp() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159113,7 +159114,7 @@ void m68000_device::sub_b_aips_dd_dp() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159136,7 +159137,7 @@ void m68000_device::sub_b_aips_dd_dp() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159191,7 +159192,7 @@ void m68000_device::sub_b_pais_dd_dp() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159214,7 +159215,7 @@ void m68000_device::sub_b_pais_dd_dp() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159286,7 +159287,7 @@ void m68000_device::sub_b_das_dd_dp() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159311,7 +159312,7 @@ void m68000_device::sub_b_das_dd_dp() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159356,7 +159357,7 @@ void m68000_device::sub_b_dais_dd_dp() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159424,7 +159425,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159449,7 +159450,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159522,7 +159523,7 @@ void m68000_device::sub_b_adr16_dd_dp() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -159545,7 +159546,7 @@ void m68000_device::sub_b_adr16_dd_dp() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159642,7 +159643,7 @@ void m68000_device::sub_b_adr32_dd_dp() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159665,7 +159666,7 @@ void m68000_device::sub_b_adr32_dd_dp() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159736,7 +159737,7 @@ void m68000_device::sub_b_dpc_dd_dp() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159761,7 +159762,7 @@ void m68000_device::sub_b_dpc_dd_dp() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159805,7 +159806,7 @@ void m68000_device::sub_b_dpci_dd_dp() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159873,7 +159874,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159898,7 +159899,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159973,7 +159974,7 @@ void m68000_device::sub_b_imm8_dd_dp() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160022,7 +160023,7 @@ void m68000_device::sub_w_ds_dd_dp() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160071,7 +160072,7 @@ void m68000_device::sub_w_as_dd_dp() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160118,7 +160119,7 @@ void m68000_device::sub_w_ais_dd_dp() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160147,7 +160148,7 @@ void m68000_device::sub_w_ais_dd_dp() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160200,7 +160201,7 @@ void m68000_device::sub_w_aips_dd_dp() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160227,7 +160228,7 @@ void m68000_device::sub_w_aips_dd_dp() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160282,7 +160283,7 @@ void m68000_device::sub_w_pais_dd_dp() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160309,7 +160310,7 @@ void m68000_device::sub_w_pais_dd_dp() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160381,7 +160382,7 @@ void m68000_device::sub_w_das_dd_dp() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160410,7 +160411,7 @@ void m68000_device::sub_w_das_dd_dp() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160455,7 +160456,7 @@ void m68000_device::sub_w_dais_dd_dp() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160523,7 +160524,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160552,7 +160553,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160625,7 +160626,7 @@ void m68000_device::sub_w_adr16_dd_dp() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -160652,7 +160653,7 @@ void m68000_device::sub_w_adr16_dd_dp() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160749,7 +160750,7 @@ void m68000_device::sub_w_adr32_dd_dp() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -160776,7 +160777,7 @@ void m68000_device::sub_w_adr32_dd_dp() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160847,7 +160848,7 @@ void m68000_device::sub_w_dpc_dd_dp() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160876,7 +160877,7 @@ void m68000_device::sub_w_dpc_dd_dp() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160920,7 +160921,7 @@ void m68000_device::sub_w_dpci_dd_dp() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160988,7 +160989,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161017,7 +161018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161092,7 +161093,7 @@ void m68000_device::sub_w_imm16_dd_dp() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161141,7 +161142,7 @@ void m68000_device::sub_l_ds_dd_dp() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161168,7 +161169,7 @@ void m68000_device::sub_l_ds_dd_dp() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161198,7 +161199,7 @@ void m68000_device::sub_l_as_dd_dp() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161225,7 +161226,7 @@ void m68000_device::sub_l_as_dd_dp() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161253,7 +161254,7 @@ void m68000_device::sub_l_ais_dd_dp() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161306,12 +161307,12 @@ void m68000_device::sub_l_ais_dd_dp() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161359,7 +161360,7 @@ void m68000_device::sub_l_aips_dd_dp() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161415,12 +161416,12 @@ void m68000_device::sub_l_aips_dd_dp() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161467,7 +161468,7 @@ void m68000_device::sub_l_pais_dd_dp() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -161525,12 +161526,12 @@ void m68000_device::sub_l_pais_dd_dp() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161602,7 +161603,7 @@ void m68000_device::sub_l_das_dd_dp() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161655,12 +161656,12 @@ void m68000_device::sub_l_das_dd_dp() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161706,7 +161707,7 @@ void m68000_device::sub_l_dais_dd_dp() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -161773,7 +161774,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161826,12 +161827,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161905,7 +161906,7 @@ void m68000_device::sub_l_adr16_dd_dp() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161958,12 +161959,12 @@ void m68000_device::sub_l_adr16_dd_dp() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162061,7 +162062,7 @@ void m68000_device::sub_l_adr32_dd_dp() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162114,12 +162115,12 @@ void m68000_device::sub_l_adr32_dd_dp() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162190,7 +162191,7 @@ void m68000_device::sub_l_dpc_dd_dp() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162243,12 +162244,12 @@ void m68000_device::sub_l_dpc_dd_dp() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162293,7 +162294,7 @@ void m68000_device::sub_l_dpci_dd_dp() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -162360,7 +162361,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162413,12 +162414,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162518,7 +162519,7 @@ void m68000_device::sub_l_imm32_dd_dp() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -162545,7 +162546,7 @@ void m68000_device::sub_l_imm32_dd_dp() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -162575,7 +162576,7 @@ void m68000_device::suba_w_ds_ad_dp() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162601,7 +162602,7 @@ void m68000_device::suba_w_ds_ad_dp() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162630,7 +162631,7 @@ void m68000_device::suba_w_as_ad_dp() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162656,7 +162657,7 @@ void m68000_device::suba_w_as_ad_dp() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162683,7 +162684,7 @@ void m68000_device::suba_w_ais_ad_dp() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162712,7 +162713,7 @@ void m68000_device::suba_w_ais_ad_dp() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162738,7 +162739,7 @@ void m68000_device::suba_w_ais_ad_dp() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162771,7 +162772,7 @@ void m68000_device::suba_w_aips_ad_dp() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162798,7 +162799,7 @@ void m68000_device::suba_w_aips_ad_dp() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162824,7 +162825,7 @@ void m68000_device::suba_w_aips_ad_dp() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162859,7 +162860,7 @@ void m68000_device::suba_w_pais_ad_dp() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162886,7 +162887,7 @@ void m68000_device::suba_w_pais_ad_dp() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162912,7 +162913,7 @@ void m68000_device::suba_w_pais_ad_dp() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162964,7 +162965,7 @@ void m68000_device::suba_w_das_ad_dp() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162993,7 +162994,7 @@ void m68000_device::suba_w_das_ad_dp() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163019,7 +163020,7 @@ void m68000_device::suba_w_das_ad_dp() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163044,7 +163045,7 @@ void m68000_device::suba_w_dais_ad_dp() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163112,7 +163113,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163141,7 +163142,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163167,7 +163168,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163220,7 +163221,7 @@ void m68000_device::suba_w_adr16_ad_dp() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -163247,7 +163248,7 @@ void m68000_device::suba_w_adr16_ad_dp() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163273,7 +163274,7 @@ void m68000_device::suba_w_adr16_ad_dp() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163350,7 +163351,7 @@ void m68000_device::suba_w_adr32_ad_dp() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -163377,7 +163378,7 @@ void m68000_device::suba_w_adr32_ad_dp() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163403,7 +163404,7 @@ void m68000_device::suba_w_adr32_ad_dp() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163454,7 +163455,7 @@ void m68000_device::suba_w_dpc_ad_dp() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163483,7 +163484,7 @@ void m68000_device::suba_w_dpc_ad_dp() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163509,7 +163510,7 @@ void m68000_device::suba_w_dpc_ad_dp() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163533,7 +163534,7 @@ void m68000_device::suba_w_dpci_ad_dp() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163601,7 +163602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163630,7 +163631,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163656,7 +163657,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163711,7 +163712,7 @@ void m68000_device::suba_w_imm16_ad_dp() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163737,7 +163738,7 @@ void m68000_device::suba_w_imm16_ad_dp() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163766,7 +163767,7 @@ void m68000_device::subx_b_ds_dd_dp() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -163819,7 +163820,7 @@ void m68000_device::subx_b_pais_paid_dp() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -163864,7 +163865,7 @@ void m68000_device::subx_b_pais_paid_dp() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163925,7 +163926,7 @@ void m68000_device::sub_b_dd_ais_dp() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -163950,7 +163951,7 @@ void m68000_device::sub_b_dd_ais_dp() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164017,7 +164018,7 @@ void m68000_device::sub_b_dd_aips_dp() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164040,7 +164041,7 @@ void m68000_device::sub_b_dd_aips_dp() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164109,7 +164110,7 @@ void m68000_device::sub_b_dd_pais_dp() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164132,7 +164133,7 @@ void m68000_device::sub_b_dd_pais_dp() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164218,7 +164219,7 @@ void m68000_device::sub_b_dd_das_dp() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164243,7 +164244,7 @@ void m68000_device::sub_b_dd_das_dp() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164302,7 +164303,7 @@ void m68000_device::sub_b_dd_dais_dp() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -164370,7 +164371,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164395,7 +164396,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164482,7 +164483,7 @@ void m68000_device::sub_b_dd_adr16_dp() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -164505,7 +164506,7 @@ void m68000_device::sub_b_dd_adr16_dp() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164616,7 +164617,7 @@ void m68000_device::sub_b_dd_adr32_dp() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164639,7 +164640,7 @@ void m68000_device::sub_b_dd_adr32_dp() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164702,7 +164703,7 @@ void m68000_device::subx_w_ds_dd_dp() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -164755,7 +164756,7 @@ void m68000_device::subx_w_pais_paid_dp() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -164808,7 +164809,7 @@ void m68000_device::subx_w_pais_paid_dp() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164875,7 +164876,7 @@ void m68000_device::sub_w_dd_ais_dp() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164904,7 +164905,7 @@ void m68000_device::sub_w_dd_ais_dp() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164977,7 +164978,7 @@ void m68000_device::sub_w_dd_aips_dp() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165004,7 +165005,7 @@ void m68000_device::sub_w_dd_aips_dp() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165079,7 +165080,7 @@ void m68000_device::sub_w_dd_pais_dp() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165106,7 +165107,7 @@ void m68000_device::sub_w_dd_pais_dp() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165198,7 +165199,7 @@ void m68000_device::sub_w_dd_das_dp() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165227,7 +165228,7 @@ void m68000_device::sub_w_dd_das_dp() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165292,7 +165293,7 @@ void m68000_device::sub_w_dd_dais_dp() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165360,7 +165361,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165389,7 +165390,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165482,7 +165483,7 @@ void m68000_device::sub_w_dd_adr16_dp() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -165509,7 +165510,7 @@ void m68000_device::sub_w_dd_adr16_dp() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165626,7 +165627,7 @@ void m68000_device::sub_w_dd_adr32_dp() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -165653,7 +165654,7 @@ void m68000_device::sub_w_dd_adr32_dp() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165722,7 +165723,7 @@ void m68000_device::subx_l_ds_dd_dp() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -165749,7 +165750,7 @@ void m68000_device::subx_l_ds_dd_dp() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -165807,7 +165808,7 @@ void m68000_device::subx_l_pais_paid_dp() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -165860,7 +165861,7 @@ void m68000_device::subx_l_pais_paid_dp() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -165910,7 +165911,7 @@ void m68000_device::subx_l_pais_paid_dp() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165977,7 +165978,7 @@ void m68000_device::sub_l_dd_ais_dp() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166030,7 +166031,7 @@ void m68000_device::sub_l_dd_ais_dp() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166058,7 +166059,7 @@ void m68000_device::sub_l_dd_ais_dp() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166123,7 +166124,7 @@ void m68000_device::sub_l_dd_aips_dp() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166179,7 +166180,7 @@ void m68000_device::sub_l_dd_aips_dp() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166207,7 +166208,7 @@ void m68000_device::sub_l_dd_aips_dp() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166271,7 +166272,7 @@ void m68000_device::sub_l_dd_pais_dp() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -166329,7 +166330,7 @@ void m68000_device::sub_l_dd_pais_dp() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166357,7 +166358,7 @@ void m68000_device::sub_l_dd_pais_dp() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166446,7 +166447,7 @@ void m68000_device::sub_l_dd_das_dp() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166499,7 +166500,7 @@ void m68000_device::sub_l_dd_das_dp() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166527,7 +166528,7 @@ void m68000_device::sub_l_dd_das_dp() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166590,7 +166591,7 @@ void m68000_device::sub_l_dd_dais_dp() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -166657,7 +166658,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166710,7 +166711,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166738,7 +166739,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166829,7 +166830,7 @@ void m68000_device::sub_l_dd_adr16_dp() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166882,7 +166883,7 @@ void m68000_device::sub_l_dd_adr16_dp() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166910,7 +166911,7 @@ void m68000_device::sub_l_dd_adr16_dp() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167025,7 +167026,7 @@ void m68000_device::sub_l_dd_adr32_dp() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167078,7 +167079,7 @@ void m68000_device::sub_l_dd_adr32_dp() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167106,7 +167107,7 @@ void m68000_device::sub_l_dd_adr32_dp() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167173,7 +167174,7 @@ void m68000_device::suba_l_ds_ad_dp() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167199,7 +167200,7 @@ void m68000_device::suba_l_ds_ad_dp() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167228,7 +167229,7 @@ void m68000_device::suba_l_as_ad_dp() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167254,7 +167255,7 @@ void m68000_device::suba_l_as_ad_dp() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167281,7 +167282,7 @@ void m68000_device::suba_l_ais_ad_dp() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167334,11 +167335,11 @@ void m68000_device::suba_l_ais_ad_dp() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167385,7 +167386,7 @@ void m68000_device::suba_l_aips_ad_dp() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167441,11 +167442,11 @@ void m68000_device::suba_l_aips_ad_dp() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167491,7 +167492,7 @@ void m68000_device::suba_l_pais_ad_dp() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -167549,11 +167550,11 @@ void m68000_device::suba_l_pais_ad_dp() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167624,7 +167625,7 @@ void m68000_device::suba_l_das_ad_dp() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167677,11 +167678,11 @@ void m68000_device::suba_l_das_ad_dp() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167726,7 +167727,7 @@ void m68000_device::suba_l_dais_ad_dp() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -167793,7 +167794,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167846,11 +167847,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167923,7 +167924,7 @@ void m68000_device::suba_l_adr16_ad_dp() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167976,11 +167977,11 @@ void m68000_device::suba_l_adr16_ad_dp() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168077,7 +168078,7 @@ void m68000_device::suba_l_adr32_ad_dp() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -168130,11 +168131,11 @@ void m68000_device::suba_l_adr32_ad_dp() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168204,7 +168205,7 @@ void m68000_device::suba_l_dpc_ad_dp() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168257,11 +168258,11 @@ void m68000_device::suba_l_dpc_ad_dp() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168305,7 +168306,7 @@ void m68000_device::suba_l_dpci_ad_dp() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168372,7 +168373,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168425,11 +168426,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168528,7 +168529,7 @@ void m68000_device::suba_l_imm32_ad_dp() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -168554,7 +168555,7 @@ void m68000_device::suba_l_imm32_ad_dp() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -168583,7 +168584,7 @@ void m68000_device::cmp_b_ds_dd_dp() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168629,7 +168630,7 @@ void m68000_device::cmp_b_ais_dd_dp() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168654,7 +168655,7 @@ void m68000_device::cmp_b_ais_dd_dp() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168706,7 +168707,7 @@ void m68000_device::cmp_b_aips_dd_dp() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168729,7 +168730,7 @@ void m68000_device::cmp_b_aips_dd_dp() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168783,7 +168784,7 @@ void m68000_device::cmp_b_pais_dd_dp() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168806,7 +168807,7 @@ void m68000_device::cmp_b_pais_dd_dp() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168877,7 +168878,7 @@ void m68000_device::cmp_b_das_dd_dp() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168902,7 +168903,7 @@ void m68000_device::cmp_b_das_dd_dp() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168946,7 +168947,7 @@ void m68000_device::cmp_b_dais_dd_dp() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169014,7 +169015,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169039,7 +169040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169111,7 +169112,7 @@ void m68000_device::cmp_b_adr16_dd_dp() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -169134,7 +169135,7 @@ void m68000_device::cmp_b_adr16_dd_dp() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169230,7 +169231,7 @@ void m68000_device::cmp_b_adr32_dd_dp() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169253,7 +169254,7 @@ void m68000_device::cmp_b_adr32_dd_dp() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169323,7 +169324,7 @@ void m68000_device::cmp_b_dpc_dd_dp() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169348,7 +169349,7 @@ void m68000_device::cmp_b_dpc_dd_dp() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169391,7 +169392,7 @@ void m68000_device::cmp_b_dpci_dd_dp() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169459,7 +169460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169484,7 +169485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169558,7 +169559,7 @@ void m68000_device::cmp_b_imm8_dd_dp() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169606,7 +169607,7 @@ void m68000_device::cmp_w_ds_dd_dp() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169654,7 +169655,7 @@ void m68000_device::cmp_w_as_dd_dp() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169700,7 +169701,7 @@ void m68000_device::cmp_w_ais_dd_dp() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169729,7 +169730,7 @@ void m68000_device::cmp_w_ais_dd_dp() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169781,7 +169782,7 @@ void m68000_device::cmp_w_aips_dd_dp() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169808,7 +169809,7 @@ void m68000_device::cmp_w_aips_dd_dp() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169862,7 +169863,7 @@ void m68000_device::cmp_w_pais_dd_dp() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169889,7 +169890,7 @@ void m68000_device::cmp_w_pais_dd_dp() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169960,7 +169961,7 @@ void m68000_device::cmp_w_das_dd_dp() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169989,7 +169990,7 @@ void m68000_device::cmp_w_das_dd_dp() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170033,7 +170034,7 @@ void m68000_device::cmp_w_dais_dd_dp() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170101,7 +170102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170130,7 +170131,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170202,7 +170203,7 @@ void m68000_device::cmp_w_adr16_dd_dp() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -170229,7 +170230,7 @@ void m68000_device::cmp_w_adr16_dd_dp() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170325,7 +170326,7 @@ void m68000_device::cmp_w_adr32_dd_dp() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -170352,7 +170353,7 @@ void m68000_device::cmp_w_adr32_dd_dp() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170422,7 +170423,7 @@ void m68000_device::cmp_w_dpc_dd_dp() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170451,7 +170452,7 @@ void m68000_device::cmp_w_dpc_dd_dp() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170494,7 +170495,7 @@ void m68000_device::cmp_w_dpci_dd_dp() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170562,7 +170563,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170591,7 +170592,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170665,7 +170666,7 @@ void m68000_device::cmp_w_imm16_dd_dp() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170713,11 +170714,11 @@ void m68000_device::cmp_l_ds_dd_dp() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170766,11 +170767,11 @@ void m68000_device::cmp_l_as_dd_dp() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170817,7 +170818,7 @@ void m68000_device::cmp_l_ais_dd_dp() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170870,11 +170871,11 @@ void m68000_device::cmp_l_ais_dd_dp() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170921,7 +170922,7 @@ void m68000_device::cmp_l_aips_dd_dp() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170977,11 +170978,11 @@ void m68000_device::cmp_l_aips_dd_dp() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171027,7 +171028,7 @@ void m68000_device::cmp_l_pais_dd_dp() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -171085,11 +171086,11 @@ void m68000_device::cmp_l_pais_dd_dp() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171160,7 +171161,7 @@ void m68000_device::cmp_l_das_dd_dp() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171213,11 +171214,11 @@ void m68000_device::cmp_l_das_dd_dp() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171262,7 +171263,7 @@ void m68000_device::cmp_l_dais_dd_dp() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171329,7 +171330,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171382,11 +171383,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171459,7 +171460,7 @@ void m68000_device::cmp_l_adr16_dd_dp() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171512,11 +171513,11 @@ void m68000_device::cmp_l_adr16_dd_dp() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171613,7 +171614,7 @@ void m68000_device::cmp_l_adr32_dd_dp() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171666,11 +171667,11 @@ void m68000_device::cmp_l_adr32_dd_dp() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171740,7 +171741,7 @@ void m68000_device::cmp_l_dpc_dd_dp() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171793,11 +171794,11 @@ void m68000_device::cmp_l_dpc_dd_dp() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171841,7 +171842,7 @@ void m68000_device::cmp_l_dpci_dd_dp() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171908,7 +171909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171961,11 +171962,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172064,11 +172065,11 @@ void m68000_device::cmp_l_imm32_dd_dp() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172117,11 +172118,11 @@ void m68000_device::cmpa_w_ds_ad_dp() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172170,11 +172171,11 @@ void m68000_device::cmpa_w_as_ad_dp() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172221,7 +172222,7 @@ void m68000_device::cmpa_w_ais_ad_dp() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172250,11 +172251,11 @@ void m68000_device::cmpa_w_ais_ad_dp() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172307,7 +172308,7 @@ void m68000_device::cmpa_w_aips_ad_dp() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172334,11 +172335,11 @@ void m68000_device::cmpa_w_aips_ad_dp() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172393,7 +172394,7 @@ void m68000_device::cmpa_w_pais_ad_dp() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172420,11 +172421,11 @@ void m68000_device::cmpa_w_pais_ad_dp() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172496,7 +172497,7 @@ void m68000_device::cmpa_w_das_ad_dp() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172525,11 +172526,11 @@ void m68000_device::cmpa_w_das_ad_dp() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172574,7 +172575,7 @@ void m68000_device::cmpa_w_dais_ad_dp() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -172642,7 +172643,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172671,11 +172672,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172748,7 +172749,7 @@ void m68000_device::cmpa_w_adr16_ad_dp() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -172775,11 +172776,11 @@ void m68000_device::cmpa_w_adr16_ad_dp() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172876,7 +172877,7 @@ void m68000_device::cmpa_w_adr32_ad_dp() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172903,11 +172904,11 @@ void m68000_device::cmpa_w_adr32_ad_dp() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172978,7 +172979,7 @@ void m68000_device::cmpa_w_dpc_ad_dp() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173007,11 +173008,11 @@ void m68000_device::cmpa_w_dpc_ad_dp() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173055,7 +173056,7 @@ void m68000_device::cmpa_w_dpci_ad_dp() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -173123,7 +173124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173152,11 +173153,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173231,11 +173232,11 @@ void m68000_device::cmpa_w_imm16_ad_dp() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173283,7 +173284,7 @@ void m68000_device::eor_b_dd_ds_dp() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -173291,7 +173292,7 @@ void m68000_device::eor_b_dd_ds_dp() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173356,7 +173357,7 @@ void m68000_device::cmpm_b_aips_aipd_dp() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -173380,7 +173381,7 @@ void m68000_device::cmpm_b_aips_aipd_dp() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173422,11 +173423,11 @@ void m68000_device::eor_b_dd_ais_dp() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173448,7 +173449,7 @@ void m68000_device::eor_b_dd_ais_dp() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173478,7 +173479,7 @@ void m68000_device::eor_b_dd_ais_dp() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173513,12 +173514,12 @@ void m68000_device::eor_b_dd_aips_dp() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173541,7 +173542,7 @@ void m68000_device::eor_b_dd_aips_dp() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173571,7 +173572,7 @@ void m68000_device::eor_b_dd_aips_dp() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173605,7 +173606,7 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173613,7 +173614,7 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173636,7 +173637,7 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173666,7 +173667,7 @@ void m68000_device::eor_b_dd_pais_dp() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173698,7 +173699,7 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173724,11 +173725,11 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173750,7 +173751,7 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68000_device::eor_b_dd_das_dp() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173810,14 +173811,14 @@ void m68000_device::eor_b_dd_dais_dp() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -173825,7 +173826,7 @@ void m68000_device::eor_b_dd_dais_dp() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173852,7 +173853,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173881,11 +173882,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173907,7 +173908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173937,7 +173938,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173971,7 +173972,7 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173997,7 +173998,7 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174020,7 +174021,7 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174050,7 +174051,7 @@ void m68000_device::eor_b_dd_adr16_dp() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174082,7 +174083,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174109,7 +174110,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -174135,7 +174136,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174158,7 +174159,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174188,7 +174189,7 @@ void m68000_device::eor_b_dd_adr32_dp() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174221,7 +174222,7 @@ void m68000_device::eor_w_dd_ds_dp() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -174229,7 +174230,7 @@ void m68000_device::eor_w_dd_ds_dp() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174298,7 +174299,7 @@ void m68000_device::cmpm_w_aips_aipd_dp() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174326,7 +174327,7 @@ void m68000_device::cmpm_w_aips_aipd_dp() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174368,11 +174369,11 @@ void m68000_device::eor_w_dd_ais_dp() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174398,7 +174399,7 @@ void m68000_device::eor_w_dd_ais_dp() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174428,7 +174429,7 @@ void m68000_device::eor_w_dd_ais_dp() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174469,12 +174470,12 @@ void m68000_device::eor_w_dd_aips_dp() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174501,7 +174502,7 @@ void m68000_device::eor_w_dd_aips_dp() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174531,7 +174532,7 @@ void m68000_device::eor_w_dd_aips_dp() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174571,7 +174572,7 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -174579,7 +174580,7 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174606,7 +174607,7 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174636,7 +174637,7 @@ void m68000_device::eor_w_dd_pais_dp() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174674,7 +174675,7 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174700,11 +174701,11 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174730,7 +174731,7 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174760,7 +174761,7 @@ void m68000_device::eor_w_dd_das_dp() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174796,14 +174797,14 @@ void m68000_device::eor_w_dd_dais_dp() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174811,7 +174812,7 @@ void m68000_device::eor_w_dd_dais_dp() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174838,7 +174839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174867,11 +174868,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174897,7 +174898,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174927,7 +174928,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174967,7 +174968,7 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174993,7 +174994,7 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175020,7 +175021,7 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175050,7 +175051,7 @@ void m68000_device::eor_w_dd_adr16_dp() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175088,7 +175089,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175115,7 +175116,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -175141,7 +175142,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175168,7 +175169,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175198,7 +175199,7 @@ void m68000_device::eor_w_dd_adr32_dp() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175237,12 +175238,12 @@ void m68000_device::eor_l_dd_ds_dp() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175265,7 +175266,7 @@ void m68000_device::eor_l_dd_ds_dp() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -175274,7 +175275,7 @@ void m68000_device::eor_l_dd_ds_dp() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -175347,7 +175348,7 @@ void m68000_device::cmpm_l_aips_aipd_dp() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175397,13 +175398,13 @@ void m68000_device::cmpm_l_aips_aipd_dp() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175445,7 +175446,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175473,7 +175474,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175499,7 +175500,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175527,7 +175528,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175555,7 +175556,7 @@ void m68000_device::eor_l_dd_ais_dp() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175593,7 +175594,7 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175621,11 +175622,11 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175651,7 +175652,7 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175679,7 +175680,7 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175707,7 +175708,7 @@ void m68000_device::eor_l_dd_aips_dp() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175744,14 +175745,14 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175778,7 +175779,7 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175804,7 +175805,7 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175832,7 +175833,7 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175860,7 +175861,7 @@ void m68000_device::eor_l_dd_pais_dp() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175898,7 +175899,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175923,7 +175924,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175951,7 +175952,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175977,7 +175978,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176005,7 +176006,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176033,7 +176034,7 @@ void m68000_device::eor_l_dd_das_dp() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176069,14 +176070,14 @@ void m68000_device::eor_l_dd_dais_dp() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -176084,7 +176085,7 @@ void m68000_device::eor_l_dd_dais_dp() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176111,7 +176112,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176139,7 +176140,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176167,7 +176168,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176193,7 +176194,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176221,7 +176222,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176249,7 +176250,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176289,7 +176290,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176315,7 +176316,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176343,7 +176344,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176369,7 +176370,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176397,7 +176398,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176425,7 +176426,7 @@ void m68000_device::eor_l_dd_adr16_dp() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176463,7 +176464,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176490,7 +176491,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -176516,7 +176517,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176544,7 +176545,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176570,7 +176571,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176598,7 +176599,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176626,7 +176627,7 @@ void m68000_device::eor_l_dd_adr32_dp() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176666,11 +176667,11 @@ void m68000_device::cmpa_l_ds_ad_dp() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176719,11 +176720,11 @@ void m68000_device::cmpa_l_as_ad_dp() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176770,7 +176771,7 @@ void m68000_device::cmpa_l_ais_ad_dp() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176823,11 +176824,11 @@ void m68000_device::cmpa_l_ais_ad_dp() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176874,7 +176875,7 @@ void m68000_device::cmpa_l_aips_ad_dp() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176930,11 +176931,11 @@ void m68000_device::cmpa_l_aips_ad_dp() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176980,7 +176981,7 @@ void m68000_device::cmpa_l_pais_ad_dp() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -177038,11 +177039,11 @@ void m68000_device::cmpa_l_pais_ad_dp() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177113,7 +177114,7 @@ void m68000_device::cmpa_l_das_ad_dp() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177166,11 +177167,11 @@ void m68000_device::cmpa_l_das_ad_dp() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177215,7 +177216,7 @@ void m68000_device::cmpa_l_dais_ad_dp() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177282,7 +177283,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177335,11 +177336,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177412,7 +177413,7 @@ void m68000_device::cmpa_l_adr16_ad_dp() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177465,11 +177466,11 @@ void m68000_device::cmpa_l_adr16_ad_dp() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177566,7 +177567,7 @@ void m68000_device::cmpa_l_adr32_ad_dp() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177619,11 +177620,11 @@ void m68000_device::cmpa_l_adr32_ad_dp() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177693,7 +177694,7 @@ void m68000_device::cmpa_l_dpc_ad_dp() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177746,11 +177747,11 @@ void m68000_device::cmpa_l_dpc_ad_dp() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177794,7 +177795,7 @@ void m68000_device::cmpa_l_dpci_ad_dp() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177861,7 +177862,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177914,11 +177915,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178017,11 +178018,11 @@ void m68000_device::cmpa_l_imm32_ad_dp() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178070,7 +178071,7 @@ void m68000_device::and_b_ds_dd_dp() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178078,7 +178079,7 @@ void m68000_device::and_b_ds_dd_dp() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178118,11 +178119,11 @@ void m68000_device::and_b_ais_dd_dp() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178144,7 +178145,7 @@ void m68000_device::and_b_ais_dd_dp() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178152,7 +178153,7 @@ void m68000_device::and_b_ais_dd_dp() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178195,12 +178196,12 @@ void m68000_device::and_b_aips_dd_dp() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178223,7 +178224,7 @@ void m68000_device::and_b_aips_dd_dp() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178231,7 +178232,7 @@ void m68000_device::and_b_aips_dd_dp() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178273,7 +178274,7 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178281,7 +178282,7 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178304,7 +178305,7 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178312,7 +178313,7 @@ void m68000_device::and_b_pais_dd_dp() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178352,7 +178353,7 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178378,11 +178379,11 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178404,7 +178405,7 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178412,7 +178413,7 @@ void m68000_device::and_b_das_dd_dp() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178450,14 +178451,14 @@ void m68000_device::and_b_dais_dd_dp() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178465,7 +178466,7 @@ void m68000_device::and_b_dais_dd_dp() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178492,7 +178493,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178521,11 +178522,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178547,7 +178548,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178555,7 +178556,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178597,7 +178598,7 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178623,7 +178624,7 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -178646,7 +178647,7 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178654,7 +178655,7 @@ void m68000_device::and_b_adr16_dd_dp() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178694,7 +178695,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178721,7 +178722,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -178747,7 +178748,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -178770,7 +178771,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178778,7 +178779,7 @@ void m68000_device::and_b_adr32_dd_dp() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178817,7 +178818,7 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178843,11 +178844,11 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178869,7 +178870,7 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178877,7 +178878,7 @@ void m68000_device::and_b_dpc_dd_dp() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178914,14 +178915,14 @@ void m68000_device::and_b_dpci_dd_dp() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178929,7 +178930,7 @@ void m68000_device::and_b_dpci_dd_dp() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178956,7 +178957,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178985,11 +178986,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -179011,7 +179012,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179019,7 +179020,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179061,7 +179062,7 @@ void m68000_device::and_b_imm8_dd_dp() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179088,7 +179089,7 @@ void m68000_device::and_b_imm8_dd_dp() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179096,7 +179097,7 @@ void m68000_device::and_b_imm8_dd_dp() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179138,7 +179139,7 @@ void m68000_device::and_w_ds_dd_dp() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179146,7 +179147,7 @@ void m68000_device::and_w_ds_dd_dp() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179186,11 +179187,11 @@ void m68000_device::and_w_ais_dd_dp() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179216,7 +179217,7 @@ void m68000_device::and_w_ais_dd_dp() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179224,7 +179225,7 @@ void m68000_device::and_w_ais_dd_dp() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179267,12 +179268,12 @@ void m68000_device::and_w_aips_dd_dp() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179299,7 +179300,7 @@ void m68000_device::and_w_aips_dd_dp() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179307,7 +179308,7 @@ void m68000_device::and_w_aips_dd_dp() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179349,7 +179350,7 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -179357,7 +179358,7 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179384,7 +179385,7 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179392,7 +179393,7 @@ void m68000_device::and_w_pais_dd_dp() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179432,7 +179433,7 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179458,11 +179459,11 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179488,7 +179489,7 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179496,7 +179497,7 @@ void m68000_device::and_w_das_dd_dp() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179534,14 +179535,14 @@ void m68000_device::and_w_dais_dd_dp() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179549,7 +179550,7 @@ void m68000_device::and_w_dais_dd_dp() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179576,7 +179577,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179605,11 +179606,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179635,7 +179636,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179643,7 +179644,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179685,7 +179686,7 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179711,7 +179712,7 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -179738,7 +179739,7 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179746,7 +179747,7 @@ void m68000_device::and_w_adr16_dd_dp() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179786,7 +179787,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179813,7 +179814,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -179839,7 +179840,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179866,7 +179867,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179874,7 +179875,7 @@ void m68000_device::and_w_adr32_dd_dp() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179913,7 +179914,7 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179939,11 +179940,11 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179969,7 +179970,7 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179977,7 +179978,7 @@ void m68000_device::and_w_dpc_dd_dp() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180014,14 +180015,14 @@ void m68000_device::and_w_dpci_dd_dp() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180029,7 +180030,7 @@ void m68000_device::and_w_dpci_dd_dp() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180056,7 +180057,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180085,11 +180086,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180115,7 +180116,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180123,7 +180124,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180165,7 +180166,7 @@ void m68000_device::and_w_imm16_dd_dp() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180192,7 +180193,7 @@ void m68000_device::and_w_imm16_dd_dp() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180200,7 +180201,7 @@ void m68000_device::and_w_imm16_dd_dp() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180242,12 +180243,12 @@ void m68000_device::and_l_ds_dd_dp() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180270,7 +180271,7 @@ void m68000_device::and_l_ds_dd_dp() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -180279,7 +180280,7 @@ void m68000_device::and_l_ds_dd_dp() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180299,7 +180300,7 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180327,7 +180328,7 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180353,12 +180354,12 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180387,7 +180388,7 @@ void m68000_device::and_l_ais_dd_dp() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180407,7 +180408,7 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180435,11 +180436,11 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180465,12 +180466,12 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180499,7 +180500,7 @@ void m68000_device::and_l_aips_dd_dp() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180518,14 +180519,14 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180552,7 +180553,7 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180578,12 +180579,12 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180612,7 +180613,7 @@ void m68000_device::and_l_pais_dd_dp() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180632,7 +180633,7 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180657,7 +180658,7 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180685,7 +180686,7 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180711,12 +180712,12 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180745,7 +180746,7 @@ void m68000_device::and_l_das_dd_dp() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180763,14 +180764,14 @@ void m68000_device::and_l_dais_dd_dp() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -180778,7 +180779,7 @@ void m68000_device::and_l_dais_dd_dp() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180805,7 +180806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180833,7 +180834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180861,7 +180862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180887,12 +180888,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180921,7 +180922,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180943,7 +180944,7 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -180969,7 +180970,7 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180997,7 +180998,7 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181023,12 +181024,12 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181057,7 +181058,7 @@ void m68000_device::and_l_adr16_dd_dp() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181077,7 +181078,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181104,7 +181105,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181130,7 +181131,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181158,7 +181159,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181184,12 +181185,12 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181218,7 +181219,7 @@ void m68000_device::and_l_adr32_dd_dp() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181237,7 +181238,7 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181262,7 +181263,7 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181290,7 +181291,7 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181316,12 +181317,12 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181350,7 +181351,7 @@ void m68000_device::and_l_dpc_dd_dp() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181367,14 +181368,14 @@ void m68000_device::and_l_dpci_dd_dp() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -181382,7 +181383,7 @@ void m68000_device::and_l_dpci_dd_dp() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181409,7 +181410,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181437,7 +181438,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181465,7 +181466,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181491,12 +181492,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181525,7 +181526,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181545,7 +181546,7 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181572,7 +181573,7 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181599,12 +181600,12 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181627,7 +181628,7 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -181636,7 +181637,7 @@ void m68000_device::and_l_imm32_dd_dp() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181660,7 +181661,7 @@ void m68000_device::mulu_w_ds_dd_dp() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181696,7 +181697,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181708,7 +181709,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181720,7 +181721,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181742,7 +181743,7 @@ void m68000_device::mulu_w_ais_dd_dp() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181773,7 +181774,7 @@ void m68000_device::mulu_w_ais_dd_dp() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181809,7 +181810,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181821,7 +181822,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181833,7 +181834,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181861,7 +181862,7 @@ void m68000_device::mulu_w_aips_dd_dp() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -181890,7 +181891,7 @@ void m68000_device::mulu_w_aips_dd_dp() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181926,7 +181927,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181938,7 +181939,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181950,7 +181951,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181980,7 +181981,7 @@ void m68000_device::mulu_w_pais_dd_dp() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -182009,7 +182010,7 @@ void m68000_device::mulu_w_pais_dd_dp() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182045,7 +182046,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182057,7 +182058,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182069,7 +182070,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182116,7 +182117,7 @@ void m68000_device::mulu_w_das_dd_dp() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182147,7 +182148,7 @@ void m68000_device::mulu_w_das_dd_dp() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182183,7 +182184,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182195,7 +182196,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182207,7 +182208,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182227,7 +182228,7 @@ void m68000_device::mulu_w_dais_dd_dp() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182295,7 +182296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182326,7 +182327,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182362,7 +182363,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182374,7 +182375,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182386,7 +182387,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182434,7 +182435,7 @@ void m68000_device::mulu_w_adr16_dd_dp() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -182463,7 +182464,7 @@ void m68000_device::mulu_w_adr16_dd_dp() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182499,7 +182500,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182511,7 +182512,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182523,7 +182524,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182595,7 +182596,7 @@ void m68000_device::mulu_w_adr32_dd_dp() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -182624,7 +182625,7 @@ void m68000_device::mulu_w_adr32_dd_dp() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182660,7 +182661,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182672,7 +182673,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182684,7 +182685,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182730,7 +182731,7 @@ void m68000_device::mulu_w_dpc_dd_dp() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182761,7 +182762,7 @@ void m68000_device::mulu_w_dpc_dd_dp() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182797,7 +182798,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182809,7 +182810,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182821,7 +182822,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182840,7 +182841,7 @@ void m68000_device::mulu_w_dpci_dd_dp() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182908,7 +182909,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182939,7 +182940,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182975,7 +182976,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182987,7 +182988,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182999,7 +183000,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183051,7 +183052,7 @@ void m68000_device::mulu_w_imm16_dd_dp() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -183087,7 +183088,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183099,7 +183100,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183111,7 +183112,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183135,12 +183136,12 @@ void m68000_device::abcd_ds_dd_dp() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183192,7 +183193,7 @@ void m68000_device::abcd_pais_paid_dp() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -183236,12 +183237,12 @@ void m68000_device::abcd_pais_paid_dp() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183300,11 +183301,11 @@ void m68000_device::and_b_dd_ais_dp() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183326,7 +183327,7 @@ void m68000_device::and_b_dd_ais_dp() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183356,7 +183357,7 @@ void m68000_device::and_b_dd_ais_dp() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183391,12 +183392,12 @@ void m68000_device::and_b_dd_aips_dp() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183419,7 +183420,7 @@ void m68000_device::and_b_dd_aips_dp() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183449,7 +183450,7 @@ void m68000_device::and_b_dd_aips_dp() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183483,7 +183484,7 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -183491,7 +183492,7 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183514,7 +183515,7 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183544,7 +183545,7 @@ void m68000_device::and_b_dd_pais_dp() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183576,7 +183577,7 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183602,11 +183603,11 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183628,7 +183629,7 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183658,7 +183659,7 @@ void m68000_device::and_b_dd_das_dp() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183688,14 +183689,14 @@ void m68000_device::and_b_dd_dais_dp() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -183703,7 +183704,7 @@ void m68000_device::and_b_dd_dais_dp() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183730,7 +183731,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183759,11 +183760,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183785,7 +183786,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183815,7 +183816,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183849,7 +183850,7 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -183875,7 +183876,7 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -183898,7 +183899,7 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183928,7 +183929,7 @@ void m68000_device::and_b_dd_adr16_dp() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183960,7 +183961,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183987,7 +183988,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184013,7 +184014,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -184036,7 +184037,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184066,7 +184067,7 @@ void m68000_device::and_b_dd_adr32_dp() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -184200,11 +184201,11 @@ void m68000_device::and_w_dd_ais_dp() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184230,7 +184231,7 @@ void m68000_device::and_w_dd_ais_dp() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184260,7 +184261,7 @@ void m68000_device::and_w_dd_ais_dp() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184301,12 +184302,12 @@ void m68000_device::and_w_dd_aips_dp() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184333,7 +184334,7 @@ void m68000_device::and_w_dd_aips_dp() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184363,7 +184364,7 @@ void m68000_device::and_w_dd_aips_dp() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184403,7 +184404,7 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -184411,7 +184412,7 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184438,7 +184439,7 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184468,7 +184469,7 @@ void m68000_device::and_w_dd_pais_dp() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184506,7 +184507,7 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184532,11 +184533,11 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184562,7 +184563,7 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184592,7 +184593,7 @@ void m68000_device::and_w_dd_das_dp() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184628,14 +184629,14 @@ void m68000_device::and_w_dd_dais_dp() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -184643,7 +184644,7 @@ void m68000_device::and_w_dd_dais_dp() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184670,7 +184671,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184699,11 +184700,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184729,7 +184730,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184759,7 +184760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184799,7 +184800,7 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -184825,7 +184826,7 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -184852,7 +184853,7 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184882,7 +184883,7 @@ void m68000_device::and_w_dd_adr16_dp() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184920,7 +184921,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184947,7 +184948,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184973,7 +184974,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -185000,7 +185001,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185030,7 +185031,7 @@ void m68000_device::and_w_dd_adr32_dp() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185119,7 +185120,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185147,7 +185148,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185173,7 +185174,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185201,7 +185202,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185229,7 +185230,7 @@ void m68000_device::and_l_dd_ais_dp() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185267,7 +185268,7 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185295,11 +185296,11 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185325,7 +185326,7 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185353,7 +185354,7 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185381,7 +185382,7 @@ void m68000_device::and_l_dd_aips_dp() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185418,14 +185419,14 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185452,7 +185453,7 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185478,7 +185479,7 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185506,7 +185507,7 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185534,7 +185535,7 @@ void m68000_device::and_l_dd_pais_dp() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185572,7 +185573,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185597,7 +185598,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185625,7 +185626,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185651,7 +185652,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185679,7 +185680,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185707,7 +185708,7 @@ void m68000_device::and_l_dd_das_dp() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185743,14 +185744,14 @@ void m68000_device::and_l_dd_dais_dp() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -185758,7 +185759,7 @@ void m68000_device::and_l_dd_dais_dp() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185785,7 +185786,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185813,7 +185814,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185841,7 +185842,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185867,7 +185868,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185895,7 +185896,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185923,7 +185924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185963,7 +185964,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -185989,7 +185990,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -186017,7 +186018,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -186043,7 +186044,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186071,7 +186072,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186099,7 +186100,7 @@ void m68000_device::and_l_dd_adr16_dp() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -186137,7 +186138,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -186164,7 +186165,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -186190,7 +186191,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186218,7 +186219,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -186244,7 +186245,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186272,7 +186273,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186300,7 +186301,7 @@ void m68000_device::and_l_dd_adr32_dp() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -186342,7 +186343,7 @@ void m68000_device::muls_w_ds_dd_dp() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186378,7 +186379,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186392,7 +186393,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186404,7 +186405,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186416,7 +186417,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186433,7 +186434,7 @@ void m68000_device::muls_w_ais_dd_dp() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186464,7 +186465,7 @@ void m68000_device::muls_w_ais_dd_dp() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186500,7 +186501,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186514,7 +186515,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186526,7 +186527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186538,7 +186539,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186561,7 +186562,7 @@ void m68000_device::muls_w_aips_dd_dp() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186590,7 +186591,7 @@ void m68000_device::muls_w_aips_dd_dp() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186626,7 +186627,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186640,7 +186641,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186652,7 +186653,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186664,7 +186665,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186689,7 +186690,7 @@ void m68000_device::muls_w_pais_dd_dp() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186718,7 +186719,7 @@ void m68000_device::muls_w_pais_dd_dp() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186754,7 +186755,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186768,7 +186769,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186780,7 +186781,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186792,7 +186793,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186834,7 +186835,7 @@ void m68000_device::muls_w_das_dd_dp() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186865,7 +186866,7 @@ void m68000_device::muls_w_das_dd_dp() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186901,7 +186902,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186915,7 +186916,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186927,7 +186928,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186939,7 +186940,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186954,7 +186955,7 @@ void m68000_device::muls_w_dais_dd_dp() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187022,7 +187023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187053,7 +187054,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187089,7 +187090,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187103,7 +187104,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187115,7 +187116,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187127,7 +187128,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187170,7 +187171,7 @@ void m68000_device::muls_w_adr16_dd_dp() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -187199,7 +187200,7 @@ void m68000_device::muls_w_adr16_dd_dp() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187235,7 +187236,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187249,7 +187250,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187261,7 +187262,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187273,7 +187274,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187340,7 +187341,7 @@ void m68000_device::muls_w_adr32_dd_dp() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187369,7 +187370,7 @@ void m68000_device::muls_w_adr32_dd_dp() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187405,7 +187406,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187419,7 +187420,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187431,7 +187432,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187443,7 +187444,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187484,7 +187485,7 @@ void m68000_device::muls_w_dpc_dd_dp() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187515,7 +187516,7 @@ void m68000_device::muls_w_dpc_dd_dp() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187551,7 +187552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187565,7 +187566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187577,7 +187578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187589,7 +187590,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187603,7 +187604,7 @@ void m68000_device::muls_w_dpci_dd_dp() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187671,7 +187672,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187702,7 +187703,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187738,7 +187739,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187752,7 +187753,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187764,7 +187765,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187776,7 +187777,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187823,7 +187824,7 @@ void m68000_device::muls_w_imm16_dd_dp() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187859,7 +187860,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187873,7 +187874,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187885,7 +187886,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187897,7 +187898,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187916,7 +187917,7 @@ void m68000_device::add_b_ds_dd_dp() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -187963,7 +187964,7 @@ void m68000_device::add_b_ais_dd_dp() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187988,7 +187989,7 @@ void m68000_device::add_b_ais_dd_dp() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188041,7 +188042,7 @@ void m68000_device::add_b_aips_dd_dp() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188064,7 +188065,7 @@ void m68000_device::add_b_aips_dd_dp() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188119,7 +188120,7 @@ void m68000_device::add_b_pais_dd_dp() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188142,7 +188143,7 @@ void m68000_device::add_b_pais_dd_dp() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188214,7 +188215,7 @@ void m68000_device::add_b_das_dd_dp() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188239,7 +188240,7 @@ void m68000_device::add_b_das_dd_dp() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188284,7 +188285,7 @@ void m68000_device::add_b_dais_dd_dp() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188352,7 +188353,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188377,7 +188378,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188450,7 +188451,7 @@ void m68000_device::add_b_adr16_dd_dp() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -188473,7 +188474,7 @@ void m68000_device::add_b_adr16_dd_dp() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188570,7 +188571,7 @@ void m68000_device::add_b_adr32_dd_dp() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -188593,7 +188594,7 @@ void m68000_device::add_b_adr32_dd_dp() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188664,7 +188665,7 @@ void m68000_device::add_b_dpc_dd_dp() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188689,7 +188690,7 @@ void m68000_device::add_b_dpc_dd_dp() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188733,7 +188734,7 @@ void m68000_device::add_b_dpci_dd_dp() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188801,7 +188802,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188826,7 +188827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188901,7 +188902,7 @@ void m68000_device::add_b_imm8_dd_dp() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188950,7 +188951,7 @@ void m68000_device::add_w_ds_dd_dp() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188999,7 +189000,7 @@ void m68000_device::add_w_as_dd_dp() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189046,7 +189047,7 @@ void m68000_device::add_w_ais_dd_dp() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189075,7 +189076,7 @@ void m68000_device::add_w_ais_dd_dp() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189128,7 +189129,7 @@ void m68000_device::add_w_aips_dd_dp() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189155,7 +189156,7 @@ void m68000_device::add_w_aips_dd_dp() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189210,7 +189211,7 @@ void m68000_device::add_w_pais_dd_dp() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189237,7 +189238,7 @@ void m68000_device::add_w_pais_dd_dp() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189309,7 +189310,7 @@ void m68000_device::add_w_das_dd_dp() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189338,7 +189339,7 @@ void m68000_device::add_w_das_dd_dp() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189383,7 +189384,7 @@ void m68000_device::add_w_dais_dd_dp() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189451,7 +189452,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189480,7 +189481,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189553,7 +189554,7 @@ void m68000_device::add_w_adr16_dd_dp() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -189580,7 +189581,7 @@ void m68000_device::add_w_adr16_dd_dp() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189677,7 +189678,7 @@ void m68000_device::add_w_adr32_dd_dp() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189704,7 +189705,7 @@ void m68000_device::add_w_adr32_dd_dp() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189775,7 +189776,7 @@ void m68000_device::add_w_dpc_dd_dp() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189804,7 +189805,7 @@ void m68000_device::add_w_dpc_dd_dp() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189848,7 +189849,7 @@ void m68000_device::add_w_dpci_dd_dp() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189916,7 +189917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189945,7 +189946,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190020,7 +190021,7 @@ void m68000_device::add_w_imm16_dd_dp() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190069,7 +190070,7 @@ void m68000_device::add_l_ds_dd_dp() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190096,7 +190097,7 @@ void m68000_device::add_l_ds_dd_dp() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190126,7 +190127,7 @@ void m68000_device::add_l_as_dd_dp() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190153,7 +190154,7 @@ void m68000_device::add_l_as_dd_dp() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190181,7 +190182,7 @@ void m68000_device::add_l_ais_dd_dp() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190234,12 +190235,12 @@ void m68000_device::add_l_ais_dd_dp() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190287,7 +190288,7 @@ void m68000_device::add_l_aips_dd_dp() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190343,12 +190344,12 @@ void m68000_device::add_l_aips_dd_dp() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190395,7 +190396,7 @@ void m68000_device::add_l_pais_dd_dp() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190453,12 +190454,12 @@ void m68000_device::add_l_pais_dd_dp() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190530,7 +190531,7 @@ void m68000_device::add_l_das_dd_dp() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190583,12 +190584,12 @@ void m68000_device::add_l_das_dd_dp() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190634,7 +190635,7 @@ void m68000_device::add_l_dais_dd_dp() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190701,7 +190702,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190754,12 +190755,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190833,7 +190834,7 @@ void m68000_device::add_l_adr16_dd_dp() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190886,12 +190887,12 @@ void m68000_device::add_l_adr16_dd_dp() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190989,7 +190990,7 @@ void m68000_device::add_l_adr32_dd_dp() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -191042,12 +191043,12 @@ void m68000_device::add_l_adr32_dd_dp() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191118,7 +191119,7 @@ void m68000_device::add_l_dpc_dd_dp() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191171,12 +191172,12 @@ void m68000_device::add_l_dpc_dd_dp() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191221,7 +191222,7 @@ void m68000_device::add_l_dpci_dd_dp() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191288,7 +191289,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191341,12 +191342,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191446,7 +191447,7 @@ void m68000_device::add_l_imm32_dd_dp() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -191473,7 +191474,7 @@ void m68000_device::add_l_imm32_dd_dp() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -191503,7 +191504,7 @@ void m68000_device::adda_w_ds_ad_dp() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191529,7 +191530,7 @@ void m68000_device::adda_w_ds_ad_dp() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191558,7 +191559,7 @@ void m68000_device::adda_w_as_ad_dp() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191584,7 +191585,7 @@ void m68000_device::adda_w_as_ad_dp() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191611,7 +191612,7 @@ void m68000_device::adda_w_ais_ad_dp() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191640,7 +191641,7 @@ void m68000_device::adda_w_ais_ad_dp() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191666,7 +191667,7 @@ void m68000_device::adda_w_ais_ad_dp() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191699,7 +191700,7 @@ void m68000_device::adda_w_aips_ad_dp() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191726,7 +191727,7 @@ void m68000_device::adda_w_aips_ad_dp() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191752,7 +191753,7 @@ void m68000_device::adda_w_aips_ad_dp() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191787,7 +191788,7 @@ void m68000_device::adda_w_pais_ad_dp() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191814,7 +191815,7 @@ void m68000_device::adda_w_pais_ad_dp() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191840,7 +191841,7 @@ void m68000_device::adda_w_pais_ad_dp() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191892,7 +191893,7 @@ void m68000_device::adda_w_das_ad_dp() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191921,7 +191922,7 @@ void m68000_device::adda_w_das_ad_dp() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191947,7 +191948,7 @@ void m68000_device::adda_w_das_ad_dp() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191972,7 +191973,7 @@ void m68000_device::adda_w_dais_ad_dp() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192040,7 +192041,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192069,7 +192070,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192095,7 +192096,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192148,7 +192149,7 @@ void m68000_device::adda_w_adr16_ad_dp() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -192175,7 +192176,7 @@ void m68000_device::adda_w_adr16_ad_dp() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192201,7 +192202,7 @@ void m68000_device::adda_w_adr16_ad_dp() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192278,7 +192279,7 @@ void m68000_device::adda_w_adr32_ad_dp() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -192305,7 +192306,7 @@ void m68000_device::adda_w_adr32_ad_dp() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192331,7 +192332,7 @@ void m68000_device::adda_w_adr32_ad_dp() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192382,7 +192383,7 @@ void m68000_device::adda_w_dpc_ad_dp() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192411,7 +192412,7 @@ void m68000_device::adda_w_dpc_ad_dp() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192437,7 +192438,7 @@ void m68000_device::adda_w_dpc_ad_dp() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192461,7 +192462,7 @@ void m68000_device::adda_w_dpci_ad_dp() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192529,7 +192530,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192558,7 +192559,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192584,7 +192585,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192639,7 +192640,7 @@ void m68000_device::adda_w_imm16_ad_dp() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192665,7 +192666,7 @@ void m68000_device::adda_w_imm16_ad_dp() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192694,7 +192695,7 @@ void m68000_device::addx_b_ds_dd_dp() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -192702,7 +192703,7 @@ void m68000_device::addx_b_ds_dd_dp() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -192744,16 +192745,16 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192776,7 +192777,7 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192796,7 +192797,7 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192826,7 +192827,7 @@ void m68000_device::addx_b_pais_paid_dp() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -192858,7 +192859,7 @@ void m68000_device::add_b_dd_ais_dp() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192883,7 +192884,7 @@ void m68000_device::add_b_dd_ais_dp() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192950,7 +192951,7 @@ void m68000_device::add_b_dd_aips_dp() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192973,7 +192974,7 @@ void m68000_device::add_b_dd_aips_dp() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193042,7 +193043,7 @@ void m68000_device::add_b_dd_pais_dp() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193065,7 +193066,7 @@ void m68000_device::add_b_dd_pais_dp() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193151,7 +193152,7 @@ void m68000_device::add_b_dd_das_dp() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193176,7 +193177,7 @@ void m68000_device::add_b_dd_das_dp() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193235,7 +193236,7 @@ void m68000_device::add_b_dd_dais_dp() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193303,7 +193304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193328,7 +193329,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193415,7 +193416,7 @@ void m68000_device::add_b_dd_adr16_dp() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -193438,7 +193439,7 @@ void m68000_device::add_b_dd_adr16_dp() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193549,7 +193550,7 @@ void m68000_device::add_b_dd_adr32_dp() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193572,7 +193573,7 @@ void m68000_device::add_b_dd_adr32_dp() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193635,7 +193636,7 @@ void m68000_device::addx_w_ds_dd_dp() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -193643,7 +193644,7 @@ void m68000_device::addx_w_ds_dd_dp() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -193685,16 +193686,16 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -193721,7 +193722,7 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -193745,7 +193746,7 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193775,7 +193776,7 @@ void m68000_device::addx_w_pais_paid_dp() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -193813,7 +193814,7 @@ void m68000_device::add_w_dd_ais_dp() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193842,7 +193843,7 @@ void m68000_device::add_w_dd_ais_dp() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193915,7 +193916,7 @@ void m68000_device::add_w_dd_aips_dp() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193942,7 +193943,7 @@ void m68000_device::add_w_dd_aips_dp() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194017,7 +194018,7 @@ void m68000_device::add_w_dd_pais_dp() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194044,7 +194045,7 @@ void m68000_device::add_w_dd_pais_dp() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194136,7 +194137,7 @@ void m68000_device::add_w_dd_das_dp() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194165,7 +194166,7 @@ void m68000_device::add_w_dd_das_dp() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194230,7 +194231,7 @@ void m68000_device::add_w_dd_dais_dp() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194298,7 +194299,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194327,7 +194328,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194420,7 +194421,7 @@ void m68000_device::add_w_dd_adr16_dp() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -194447,7 +194448,7 @@ void m68000_device::add_w_dd_adr16_dp() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194564,7 +194565,7 @@ void m68000_device::add_w_dd_adr32_dp() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -194591,7 +194592,7 @@ void m68000_device::add_w_dd_adr32_dp() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194660,12 +194661,12 @@ void m68000_device::addx_l_ds_dd_dp() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -194688,7 +194689,7 @@ void m68000_device::addx_l_ds_dd_dp() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -194697,7 +194698,7 @@ void m68000_device::addx_l_ds_dd_dp() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -194719,13 +194720,13 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194749,11 +194750,11 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194778,7 +194779,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194804,7 +194805,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -194832,7 +194833,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -194855,7 +194856,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194885,7 +194886,7 @@ void m68000_device::addx_l_pais_paid_dp() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -194923,7 +194924,7 @@ void m68000_device::add_l_dd_ais_dp() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194976,7 +194977,7 @@ void m68000_device::add_l_dd_ais_dp() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195004,7 +195005,7 @@ void m68000_device::add_l_dd_ais_dp() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195069,7 +195070,7 @@ void m68000_device::add_l_dd_aips_dp() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -195125,7 +195126,7 @@ void m68000_device::add_l_dd_aips_dp() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195153,7 +195154,7 @@ void m68000_device::add_l_dd_aips_dp() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195217,7 +195218,7 @@ void m68000_device::add_l_dd_pais_dp() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195275,7 +195276,7 @@ void m68000_device::add_l_dd_pais_dp() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195303,7 +195304,7 @@ void m68000_device::add_l_dd_pais_dp() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195392,7 +195393,7 @@ void m68000_device::add_l_dd_das_dp() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195445,7 +195446,7 @@ void m68000_device::add_l_dd_das_dp() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195473,7 +195474,7 @@ void m68000_device::add_l_dd_das_dp() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195536,7 +195537,7 @@ void m68000_device::add_l_dd_dais_dp() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195603,7 +195604,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195656,7 +195657,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195684,7 +195685,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195775,7 +195776,7 @@ void m68000_device::add_l_dd_adr16_dp() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195828,7 +195829,7 @@ void m68000_device::add_l_dd_adr16_dp() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195856,7 +195857,7 @@ void m68000_device::add_l_dd_adr16_dp() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195971,7 +195972,7 @@ void m68000_device::add_l_dd_adr32_dp() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -196024,7 +196025,7 @@ void m68000_device::add_l_dd_adr32_dp() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196052,7 +196053,7 @@ void m68000_device::add_l_dd_adr32_dp() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -196119,7 +196120,7 @@ void m68000_device::adda_l_ds_ad_dp() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196145,7 +196146,7 @@ void m68000_device::adda_l_ds_ad_dp() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196174,7 +196175,7 @@ void m68000_device::adda_l_as_ad_dp() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196200,7 +196201,7 @@ void m68000_device::adda_l_as_ad_dp() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196227,7 +196228,7 @@ void m68000_device::adda_l_ais_ad_dp() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196280,11 +196281,11 @@ void m68000_device::adda_l_ais_ad_dp() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196331,7 +196332,7 @@ void m68000_device::adda_l_aips_ad_dp() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196387,11 +196388,11 @@ void m68000_device::adda_l_aips_ad_dp() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196437,7 +196438,7 @@ void m68000_device::adda_l_pais_ad_dp() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -196495,11 +196496,11 @@ void m68000_device::adda_l_pais_ad_dp() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196570,7 +196571,7 @@ void m68000_device::adda_l_das_ad_dp() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196623,11 +196624,11 @@ void m68000_device::adda_l_das_ad_dp() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196672,7 +196673,7 @@ void m68000_device::adda_l_dais_ad_dp() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196739,7 +196740,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196792,11 +196793,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196869,7 +196870,7 @@ void m68000_device::adda_l_adr16_ad_dp() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196922,11 +196923,11 @@ void m68000_device::adda_l_adr16_ad_dp() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197023,7 +197024,7 @@ void m68000_device::adda_l_adr32_ad_dp() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197076,11 +197077,11 @@ void m68000_device::adda_l_adr32_ad_dp() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -197150,7 +197151,7 @@ void m68000_device::adda_l_dpc_ad_dp() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197203,11 +197204,11 @@ void m68000_device::adda_l_dpc_ad_dp() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197251,7 +197252,7 @@ void m68000_device::adda_l_dpci_ad_dp() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -197318,7 +197319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197371,11 +197372,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197474,7 +197475,7 @@ void m68000_device::adda_l_imm32_ad_dp() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -197500,7 +197501,7 @@ void m68000_device::adda_l_imm32_ad_dp() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -197528,13 +197529,13 @@ void m68000_device::asr_b_imm3_ds_dp() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197566,7 +197567,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197600,13 +197601,13 @@ void m68000_device::lsr_b_imm3_ds_dp() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197638,7 +197639,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197672,13 +197673,13 @@ void m68000_device::roxr_b_imm3_ds_dp() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197710,7 +197711,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197744,13 +197745,13 @@ void m68000_device::ror_b_imm3_ds_dp() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197782,7 +197783,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -197817,13 +197818,13 @@ void m68000_device::asr_b_dd_ds_dp() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197855,7 +197856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197890,13 +197891,13 @@ void m68000_device::lsr_b_dd_ds_dp() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197928,7 +197929,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197963,13 +197964,13 @@ void m68000_device::roxr_b_dd_ds_dp() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198001,7 +198002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198036,13 +198037,13 @@ void m68000_device::ror_b_dd_ds_dp() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198074,7 +198075,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198108,13 +198109,13 @@ void m68000_device::asr_w_imm3_ds_dp() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198146,7 +198147,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198180,13 +198181,13 @@ void m68000_device::lsr_w_imm3_ds_dp() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198218,7 +198219,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198252,13 +198253,13 @@ void m68000_device::roxr_w_imm3_ds_dp() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198290,7 +198291,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198324,13 +198325,13 @@ void m68000_device::ror_w_imm3_ds_dp() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198362,7 +198363,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198397,13 +198398,13 @@ void m68000_device::asr_w_dd_ds_dp() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198435,7 +198436,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198470,13 +198471,13 @@ void m68000_device::lsr_w_dd_ds_dp() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198508,7 +198509,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198543,13 +198544,13 @@ void m68000_device::roxr_w_dd_ds_dp() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198581,7 +198582,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198616,13 +198617,13 @@ void m68000_device::ror_w_dd_ds_dp() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198654,7 +198655,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198688,13 +198689,13 @@ void m68000_device::asr_l_imm3_ds_dp() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198726,7 +198727,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198743,7 +198744,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198766,13 +198767,13 @@ void m68000_device::lsr_l_imm3_ds_dp() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198804,7 +198805,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198821,7 +198822,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198844,13 +198845,13 @@ void m68000_device::roxr_l_imm3_ds_dp() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198882,7 +198883,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198899,7 +198900,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198922,13 +198923,13 @@ void m68000_device::ror_l_imm3_ds_dp() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198960,7 +198961,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198977,7 +198978,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199001,13 +199002,13 @@ void m68000_device::asr_l_dd_ds_dp() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199039,7 +199040,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199056,7 +199057,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199080,13 +199081,13 @@ void m68000_device::lsr_l_dd_ds_dp() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199118,7 +199119,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199135,7 +199136,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199159,13 +199160,13 @@ void m68000_device::roxr_l_dd_ds_dp() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199197,7 +199198,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199214,7 +199215,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199238,13 +199239,13 @@ void m68000_device::ror_l_dd_ds_dp() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199276,7 +199277,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -199293,7 +199294,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199315,7 +199316,7 @@ void m68000_device::asr_ais_dp() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199344,12 +199345,12 @@ void m68000_device::asr_ais_dp() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199422,7 +199423,7 @@ void m68000_device::asr_aips_dp() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199449,12 +199450,12 @@ void m68000_device::asr_aips_dp() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199529,7 +199530,7 @@ void m68000_device::asr_pais_dp() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199556,12 +199557,12 @@ void m68000_device::asr_pais_dp() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199653,7 +199654,7 @@ void m68000_device::asr_das_dp() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199682,12 +199683,12 @@ void m68000_device::asr_das_dp() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199752,7 +199753,7 @@ void m68000_device::asr_dais_dp() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -199820,7 +199821,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199849,12 +199850,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199947,7 +199948,7 @@ void m68000_device::asr_adr16_dp() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -199974,12 +199975,12 @@ void m68000_device::asr_adr16_dp() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200096,7 +200097,7 @@ void m68000_device::asr_adr32_dp() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200123,12 +200124,12 @@ void m68000_device::asr_adr32_dp() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200196,13 +200197,13 @@ void m68000_device::asl_b_imm3_ds_dp() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200234,7 +200235,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200268,13 +200269,13 @@ void m68000_device::lsl_b_imm3_ds_dp() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200306,7 +200307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200320,7 +200321,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200341,13 +200342,13 @@ void m68000_device::roxl_b_imm3_ds_dp() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200379,7 +200380,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200413,13 +200414,13 @@ void m68000_device::rol_b_imm3_ds_dp() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200451,7 +200452,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200486,13 +200487,13 @@ void m68000_device::asl_b_dd_ds_dp() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200524,7 +200525,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200559,13 +200560,13 @@ void m68000_device::lsl_b_dd_ds_dp() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200597,7 +200598,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200611,7 +200612,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200633,13 +200634,13 @@ void m68000_device::roxl_b_dd_ds_dp() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200671,7 +200672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200706,13 +200707,13 @@ void m68000_device::rol_b_dd_ds_dp() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200744,7 +200745,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200778,13 +200779,13 @@ void m68000_device::asl_w_imm3_ds_dp() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200816,7 +200817,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200850,13 +200851,13 @@ void m68000_device::lsl_w_imm3_ds_dp() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200888,7 +200889,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200902,7 +200903,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200923,13 +200924,13 @@ void m68000_device::roxl_w_imm3_ds_dp() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200961,7 +200962,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200995,13 +200996,13 @@ void m68000_device::rol_w_imm3_ds_dp() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201033,7 +201034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201068,13 +201069,13 @@ void m68000_device::asl_w_dd_ds_dp() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201106,7 +201107,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201141,13 +201142,13 @@ void m68000_device::lsl_w_dd_ds_dp() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201179,7 +201180,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201193,7 +201194,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -201215,13 +201216,13 @@ void m68000_device::roxl_w_dd_ds_dp() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201253,7 +201254,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201288,13 +201289,13 @@ void m68000_device::rol_w_dd_ds_dp() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201326,7 +201327,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201360,13 +201361,13 @@ void m68000_device::asl_l_imm3_ds_dp() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201398,7 +201399,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201415,7 +201416,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201438,13 +201439,13 @@ void m68000_device::lsl_l_imm3_ds_dp() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201476,7 +201477,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201488,14 +201489,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201518,13 +201519,13 @@ void m68000_device::roxl_l_imm3_ds_dp() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201556,7 +201557,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201573,7 +201574,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201596,13 +201597,13 @@ void m68000_device::rol_l_imm3_ds_dp() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201634,7 +201635,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201651,7 +201652,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201675,13 +201676,13 @@ void m68000_device::asl_l_dd_ds_dp() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201713,7 +201714,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201730,7 +201731,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201754,13 +201755,13 @@ void m68000_device::lsl_l_dd_ds_dp() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201792,7 +201793,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201804,14 +201805,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201835,13 +201836,13 @@ void m68000_device::roxl_l_dd_ds_dp() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201873,7 +201874,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201890,7 +201891,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201914,13 +201915,13 @@ void m68000_device::rol_l_dd_ds_dp() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201952,7 +201953,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201969,7 +201970,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201991,7 +201992,7 @@ void m68000_device::asl_ais_dp() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202020,12 +202021,12 @@ void m68000_device::asl_ais_dp() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202098,7 +202099,7 @@ void m68000_device::asl_aips_dp() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202125,12 +202126,12 @@ void m68000_device::asl_aips_dp() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202205,7 +202206,7 @@ void m68000_device::asl_pais_dp() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202232,12 +202233,12 @@ void m68000_device::asl_pais_dp() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202329,7 +202330,7 @@ void m68000_device::asl_das_dp() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202358,12 +202359,12 @@ void m68000_device::asl_das_dp() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202428,7 +202429,7 @@ void m68000_device::asl_dais_dp() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -202496,7 +202497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202525,12 +202526,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202623,7 +202624,7 @@ void m68000_device::asl_adr16_dp() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -202650,12 +202651,12 @@ void m68000_device::asl_adr16_dp() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202772,7 +202773,7 @@ void m68000_device::asl_adr32_dp() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -202799,12 +202800,12 @@ void m68000_device::asl_adr32_dp() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202871,7 +202872,7 @@ void m68000_device::lsr_ais_dp() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202900,12 +202901,12 @@ void m68000_device::lsr_ais_dp() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202978,7 +202979,7 @@ void m68000_device::lsr_aips_dp() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203005,12 +203006,12 @@ void m68000_device::lsr_aips_dp() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203085,7 +203086,7 @@ void m68000_device::lsr_pais_dp() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203112,12 +203113,12 @@ void m68000_device::lsr_pais_dp() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203209,7 +203210,7 @@ void m68000_device::lsr_das_dp() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203238,12 +203239,12 @@ void m68000_device::lsr_das_dp() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203308,7 +203309,7 @@ void m68000_device::lsr_dais_dp() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -203376,7 +203377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203405,12 +203406,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203503,7 +203504,7 @@ void m68000_device::lsr_adr16_dp() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -203530,12 +203531,12 @@ void m68000_device::lsr_adr16_dp() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203652,7 +203653,7 @@ void m68000_device::lsr_adr32_dp() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -203679,12 +203680,12 @@ void m68000_device::lsr_adr32_dp() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203751,11 +203752,11 @@ void m68000_device::lsl_ais_dp() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -203781,12 +203782,12 @@ void m68000_device::lsl_ais_dp() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203816,7 +203817,7 @@ void m68000_device::lsl_ais_dp() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -203857,12 +203858,12 @@ void m68000_device::lsl_aips_dp() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203889,12 +203890,12 @@ void m68000_device::lsl_aips_dp() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203924,7 +203925,7 @@ void m68000_device::lsl_aips_dp() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -203964,7 +203965,7 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203972,7 +203973,7 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203999,12 +204000,12 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204034,7 +204035,7 @@ void m68000_device::lsl_pais_dp() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204072,7 +204073,7 @@ void m68000_device::lsl_das_dp() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204098,11 +204099,11 @@ void m68000_device::lsl_das_dp() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -204128,12 +204129,12 @@ void m68000_device::lsl_das_dp() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204163,7 +204164,7 @@ void m68000_device::lsl_das_dp() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204199,14 +204200,14 @@ void m68000_device::lsl_dais_dp() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204214,7 +204215,7 @@ void m68000_device::lsl_dais_dp() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204241,7 +204242,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204270,11 +204271,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -204300,12 +204301,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204335,7 +204336,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204375,7 +204376,7 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -204401,7 +204402,7 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -204428,12 +204429,12 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204463,7 +204464,7 @@ void m68000_device::lsl_adr16_dp() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204501,7 +204502,7 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204528,7 +204529,7 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -204554,7 +204555,7 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -204581,12 +204582,12 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204616,7 +204617,7 @@ void m68000_device::lsl_adr32_dp() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204654,7 +204655,7 @@ void m68000_device::roxr_ais_dp() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204683,12 +204684,12 @@ void m68000_device::roxr_ais_dp() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204761,7 +204762,7 @@ void m68000_device::roxr_aips_dp() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204788,12 +204789,12 @@ void m68000_device::roxr_aips_dp() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204868,7 +204869,7 @@ void m68000_device::roxr_pais_dp() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204895,12 +204896,12 @@ void m68000_device::roxr_pais_dp() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204992,7 +204993,7 @@ void m68000_device::roxr_das_dp() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205021,12 +205022,12 @@ void m68000_device::roxr_das_dp() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205091,7 +205092,7 @@ void m68000_device::roxr_dais_dp() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -205159,7 +205160,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205188,12 +205189,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205286,7 +205287,7 @@ void m68000_device::roxr_adr16_dp() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -205313,12 +205314,12 @@ void m68000_device::roxr_adr16_dp() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205435,7 +205436,7 @@ void m68000_device::roxr_adr32_dp() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205462,12 +205463,12 @@ void m68000_device::roxr_adr32_dp() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205534,7 +205535,7 @@ void m68000_device::roxl_ais_dp() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205563,12 +205564,12 @@ void m68000_device::roxl_ais_dp() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205641,7 +205642,7 @@ void m68000_device::roxl_aips_dp() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205668,12 +205669,12 @@ void m68000_device::roxl_aips_dp() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205748,7 +205749,7 @@ void m68000_device::roxl_pais_dp() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205775,12 +205776,12 @@ void m68000_device::roxl_pais_dp() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205872,7 +205873,7 @@ void m68000_device::roxl_das_dp() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205901,12 +205902,12 @@ void m68000_device::roxl_das_dp() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205971,7 +205972,7 @@ void m68000_device::roxl_dais_dp() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206039,7 +206040,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206068,12 +206069,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206166,7 +206167,7 @@ void m68000_device::roxl_adr16_dp() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -206193,12 +206194,12 @@ void m68000_device::roxl_adr16_dp() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206315,7 +206316,7 @@ void m68000_device::roxl_adr32_dp() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -206342,12 +206343,12 @@ void m68000_device::roxl_adr32_dp() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206414,7 +206415,7 @@ void m68000_device::ror_ais_dp() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206443,12 +206444,12 @@ void m68000_device::ror_ais_dp() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206521,7 +206522,7 @@ void m68000_device::ror_aips_dp() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206548,12 +206549,12 @@ void m68000_device::ror_aips_dp() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206628,7 +206629,7 @@ void m68000_device::ror_pais_dp() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206655,12 +206656,12 @@ void m68000_device::ror_pais_dp() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206752,7 +206753,7 @@ void m68000_device::ror_das_dp() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206781,12 +206782,12 @@ void m68000_device::ror_das_dp() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206851,7 +206852,7 @@ void m68000_device::ror_dais_dp() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206919,7 +206920,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206948,12 +206949,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207046,7 +207047,7 @@ void m68000_device::ror_adr16_dp() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207073,12 +207074,12 @@ void m68000_device::ror_adr16_dp() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207195,7 +207196,7 @@ void m68000_device::ror_adr32_dp() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -207222,12 +207223,12 @@ void m68000_device::ror_adr32_dp() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207294,7 +207295,7 @@ void m68000_device::rol_ais_dp() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207323,12 +207324,12 @@ void m68000_device::rol_ais_dp() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207401,7 +207402,7 @@ void m68000_device::rol_aips_dp() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207428,12 +207429,12 @@ void m68000_device::rol_aips_dp() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207508,7 +207509,7 @@ void m68000_device::rol_pais_dp() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207535,12 +207536,12 @@ void m68000_device::rol_pais_dp() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207632,7 +207633,7 @@ void m68000_device::rol_das_dp() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207661,12 +207662,12 @@ void m68000_device::rol_das_dp() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207731,7 +207732,7 @@ void m68000_device::rol_dais_dp() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207799,7 +207800,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207828,12 +207829,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207926,7 +207927,7 @@ void m68000_device::rol_adr16_dp() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207953,12 +207954,12 @@ void m68000_device::rol_adr16_dp() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208075,7 +208076,7 @@ void m68000_device::rol_adr32_dp() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -208102,12 +208103,12 @@ void m68000_device::rol_adr32_dp() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000-sif.cpp b/src/devices/cpu/m68000/m68000-sif.cpp
index f45c4802fb5..ea52261497a 100644
--- a/src/devices/cpu/m68000/m68000-sif.cpp
+++ b/src/devices/cpu/m68000/m68000-sif.cpp
@@ -185,7 +185,7 @@ void m68000_device::state_bus_error_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195,7 +195,7 @@ void m68000_device::state_bus_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -218,7 +218,7 @@ void m68000_device::state_bus_error_if()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -240,7 +240,7 @@ void m68000_device::state_bus_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -266,7 +266,7 @@ void m68000_device::state_bus_error_if()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -288,7 +288,7 @@ void m68000_device::state_bus_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -313,7 +313,7 @@ void m68000_device::state_bus_error_if()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -336,7 +336,7 @@ void m68000_device::state_bus_error_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -464,7 +464,7 @@ void m68000_device::state_address_error_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -474,7 +474,7 @@ void m68000_device::state_address_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -497,7 +497,7 @@ void m68000_device::state_address_error_if()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -519,7 +519,7 @@ void m68000_device::state_address_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -545,7 +545,7 @@ void m68000_device::state_address_error_if()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -567,7 +567,7 @@ void m68000_device::state_address_error_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -592,7 +592,7 @@ void m68000_device::state_address_error_if()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -615,7 +615,7 @@ void m68000_device::state_address_error_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -750,7 +750,7 @@ void m68000_device::state_interrupt_if()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -762,7 +762,7 @@ void m68000_device::state_interrupt_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -818,7 +818,7 @@ void m68000_device::state_interrupt_if()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -841,7 +841,7 @@ void m68000_device::state_interrupt_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -967,7 +967,7 @@ void m68000_device::state_trace_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -977,7 +977,7 @@ void m68000_device::state_trace_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1002,7 +1002,7 @@ void m68000_device::state_trace_if()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1025,7 +1025,7 @@ void m68000_device::state_trace_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1151,7 +1151,7 @@ void m68000_device::state_illegal_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1161,7 +1161,7 @@ void m68000_device::state_illegal_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1186,7 +1186,7 @@ void m68000_device::state_illegal_if()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1209,7 +1209,7 @@ void m68000_device::state_illegal_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1335,7 +1335,7 @@ void m68000_device::state_priviledge_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1345,7 +1345,7 @@ void m68000_device::state_priviledge_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1370,7 +1370,7 @@ void m68000_device::state_priviledge_if()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1393,7 +1393,7 @@ void m68000_device::state_priviledge_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1519,7 +1519,7 @@ void m68000_device::state_linea_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1529,7 +1529,7 @@ void m68000_device::state_linea_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1554,7 +1554,7 @@ void m68000_device::state_linea_if()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1577,7 +1577,7 @@ void m68000_device::state_linea_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1703,7 +1703,7 @@ void m68000_device::state_linef_if()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1713,7 +1713,7 @@ void m68000_device::state_linef_if()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1738,7 +1738,7 @@ void m68000_device::state_linef_if()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1761,7 +1761,7 @@ void m68000_device::state_linef_if()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1884,7 +1884,7 @@ void m68000_device::ori_b_imm8_ds_if() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1907,7 +1907,7 @@ void m68000_device::ori_b_imm8_ds_if() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -1915,7 +1915,7 @@ void m68000_device::ori_b_imm8_ds_if() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1949,7 +1949,7 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1971,11 +1971,11 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -1995,7 +1995,7 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2022,7 +2022,7 @@ void m68000_device::ori_b_imm8_ais_if() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2049,7 +2049,7 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2074,12 +2074,12 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2100,7 +2100,7 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2127,7 +2127,7 @@ void m68000_device::ori_b_imm8_aips_if() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2154,7 +2154,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2178,7 +2178,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2186,7 +2186,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2207,7 +2207,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2234,7 +2234,7 @@ void m68000_device::ori_b_imm8_pais_if() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2261,7 +2261,7 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2283,7 +2283,7 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2306,11 +2306,11 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2330,7 +2330,7 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2357,7 +2357,7 @@ void m68000_device::ori_b_imm8_das_if() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2384,7 +2384,7 @@ void m68000_device::ori_b_imm8_dais_if() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2404,14 +2404,14 @@ void m68000_device::ori_b_imm8_dais_if() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2419,7 +2419,7 @@ void m68000_device::ori_b_imm8_dais_if() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2443,7 +2443,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2469,11 +2469,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2493,7 +2493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2520,7 +2520,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2546,7 +2546,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2571,7 +2571,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2594,7 +2594,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2615,7 +2615,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2642,7 +2642,7 @@ void m68000_device::ori_b_imm8_adr16_if() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2668,7 +2668,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2691,7 +2691,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2715,7 +2715,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2738,7 +2738,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2759,7 +2759,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2786,7 +2786,7 @@ void m68000_device::ori_b_imm8_adr32_if() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2812,7 +2812,7 @@ void m68000_device::ori_imm8_ccr_if() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2834,21 +2834,21 @@ void m68000_device::ori_imm8_ccr_if() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -2856,7 +2856,7 @@ void m68000_device::ori_imm8_ccr_if() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2880,11 +2880,11 @@ void m68000_device::ori_imm8_ccr_if() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2918,7 +2918,7 @@ void m68000_device::ori_w_imm16_ds_if() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2941,7 +2941,7 @@ void m68000_device::ori_w_imm16_ds_if() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2949,7 +2949,7 @@ void m68000_device::ori_w_imm16_ds_if() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2983,7 +2983,7 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3005,11 +3005,11 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3032,7 +3032,7 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3059,7 +3059,7 @@ void m68000_device::ori_w_imm16_ais_if() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3091,7 +3091,7 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3116,12 +3116,12 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3145,7 +3145,7 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3172,7 +3172,7 @@ void m68000_device::ori_w_imm16_aips_if() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3204,7 +3204,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3228,7 +3228,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3236,7 +3236,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3260,7 +3260,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3287,7 +3287,7 @@ void m68000_device::ori_w_imm16_pais_if() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3319,7 +3319,7 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3341,7 +3341,7 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3364,11 +3364,11 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3391,7 +3391,7 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3418,7 +3418,7 @@ void m68000_device::ori_w_imm16_das_if() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3450,7 +3450,7 @@ void m68000_device::ori_w_imm16_dais_if() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3470,14 +3470,14 @@ void m68000_device::ori_w_imm16_dais_if() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3485,7 +3485,7 @@ void m68000_device::ori_w_imm16_dais_if() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3509,7 +3509,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3535,11 +3535,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3562,7 +3562,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3589,7 +3589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3620,7 +3620,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3645,7 +3645,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3668,7 +3668,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3692,7 +3692,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3719,7 +3719,7 @@ void m68000_device::ori_w_imm16_adr16_if() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3750,7 +3750,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3773,7 +3773,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3797,7 +3797,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3820,7 +3820,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3844,7 +3844,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3871,7 +3871,7 @@ void m68000_device::ori_w_imm16_adr32_if() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3906,7 +3906,7 @@ void m68000_device::ori_i16u_sr_if() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3928,23 +3928,23 @@ void m68000_device::ori_i16u_sr_if() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3952,7 +3952,7 @@ void m68000_device::ori_i16u_sr_if() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3976,11 +3976,11 @@ void m68000_device::ori_i16u_sr_if() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4013,7 +4013,7 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4036,7 +4036,7 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4059,12 +4059,12 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4084,7 +4084,7 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4093,7 +4093,7 @@ void m68000_device::ori_l_imm32_ds_if() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4109,7 +4109,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4132,7 +4132,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4154,7 +4154,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4179,7 +4179,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4202,7 +4202,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4227,7 +4227,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4252,7 +4252,7 @@ void m68000_device::ori_l_imm32_ais_if() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4283,7 +4283,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4306,7 +4306,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4328,7 +4328,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4353,11 +4353,11 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4380,7 +4380,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4405,7 +4405,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4430,7 +4430,7 @@ void m68000_device::ori_l_imm32_aips_if() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4461,7 +4461,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4484,7 +4484,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4505,14 +4505,14 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4536,7 +4536,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4559,7 +4559,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4584,7 +4584,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4609,7 +4609,7 @@ void m68000_device::ori_l_imm32_pais_if() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4640,7 +4640,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4663,7 +4663,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4685,7 +4685,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4707,7 +4707,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4732,7 +4732,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4755,7 +4755,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4780,7 +4780,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4805,7 +4805,7 @@ void m68000_device::ori_l_imm32_das_if() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68000_device::ori_l_imm32_dais_if() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4859,7 +4859,7 @@ void m68000_device::ori_l_imm32_dais_if() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4879,14 +4879,14 @@ void m68000_device::ori_l_imm32_dais_if() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -4894,7 +4894,7 @@ void m68000_device::ori_l_imm32_dais_if() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4918,7 +4918,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4943,7 +4943,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4968,7 +4968,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4991,7 +4991,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5016,7 +5016,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5041,7 +5041,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5071,7 +5071,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5094,7 +5094,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5119,7 +5119,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5142,7 +5142,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5167,7 +5167,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5190,7 +5190,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5215,7 +5215,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5240,7 +5240,7 @@ void m68000_device::ori_l_imm32_adr16_if() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5270,7 +5270,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5293,7 +5293,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5316,7 +5316,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5340,7 +5340,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5363,7 +5363,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5388,7 +5388,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5411,7 +5411,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5436,7 +5436,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5461,7 +5461,7 @@ void m68000_device::ori_l_imm32_adr32_if() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5496,13 +5496,13 @@ void m68000_device::btst_dd_ds_if() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5531,7 +5531,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5544,7 +5544,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5562,7 +5562,7 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5584,7 +5584,7 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5603,7 +5603,7 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5625,7 +5625,7 @@ void m68000_device::movep_w_das_dd_if() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5658,11 +5658,11 @@ void m68000_device::btst_dd_ais_if() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5682,13 +5682,13 @@ void m68000_device::btst_dd_ais_if() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5724,12 +5724,12 @@ void m68000_device::btst_dd_aips_if() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5750,13 +5750,13 @@ void m68000_device::btst_dd_aips_if() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5791,7 +5791,7 @@ void m68000_device::btst_dd_pais_if() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -5799,7 +5799,7 @@ void m68000_device::btst_dd_pais_if() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5820,13 +5820,13 @@ void m68000_device::btst_dd_pais_if() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5859,7 +5859,7 @@ void m68000_device::btst_dd_das_if() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5882,11 +5882,11 @@ void m68000_device::btst_dd_das_if() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5906,13 +5906,13 @@ void m68000_device::btst_dd_das_if() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5943,14 +5943,14 @@ void m68000_device::btst_dd_dais_if() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5958,7 +5958,7 @@ void m68000_device::btst_dd_dais_if() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5982,7 +5982,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6008,11 +6008,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6032,13 +6032,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6073,7 +6073,7 @@ void m68000_device::btst_dd_adr16_if() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6096,7 +6096,7 @@ void m68000_device::btst_dd_adr16_if() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6117,13 +6117,13 @@ void m68000_device::btst_dd_adr16_if() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6156,7 +6156,7 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6180,7 +6180,7 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6203,7 +6203,7 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6224,13 +6224,13 @@ void m68000_device::btst_dd_adr32_if() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6262,7 +6262,7 @@ void m68000_device::btst_dd_dpc_if() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6285,11 +6285,11 @@ void m68000_device::btst_dd_dpc_if() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6309,13 +6309,13 @@ void m68000_device::btst_dd_dpc_if() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6345,14 +6345,14 @@ void m68000_device::btst_dd_dpci_if() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6360,7 +6360,7 @@ void m68000_device::btst_dd_dpci_if() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6384,7 +6384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6410,11 +6410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6434,13 +6434,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6475,7 +6475,7 @@ void m68000_device::btst_dd_imm_if() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6500,12 +6500,12 @@ void m68000_device::btst_dd_imm_if() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6534,7 +6534,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6547,7 +6547,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6569,13 +6569,13 @@ void m68000_device::bchg_dd_ds_if() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6604,7 +6604,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6616,14 +6616,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6641,7 +6641,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6663,7 +6663,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6681,7 +6681,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6700,7 +6700,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6719,7 +6719,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6741,7 +6741,7 @@ void m68000_device::movep_l_das_dd_if() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6774,11 +6774,11 @@ void m68000_device::bchg_dd_ais_if() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6799,7 +6799,7 @@ void m68000_device::bchg_dd_ais_if() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6824,7 +6824,7 @@ void m68000_device::bchg_dd_ais_if() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6855,12 +6855,12 @@ void m68000_device::bchg_dd_aips_if() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6882,7 +6882,7 @@ void m68000_device::bchg_dd_aips_if() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6907,7 +6907,7 @@ void m68000_device::bchg_dd_aips_if() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6937,7 +6937,7 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6945,7 +6945,7 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6967,7 +6967,7 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6992,7 +6992,7 @@ void m68000_device::bchg_dd_pais_if() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7020,7 +7020,7 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7043,11 +7043,11 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7068,7 +7068,7 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7093,7 +7093,7 @@ void m68000_device::bchg_dd_das_if() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7119,14 +7119,14 @@ void m68000_device::bchg_dd_dais_if() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7134,7 +7134,7 @@ void m68000_device::bchg_dd_dais_if() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7158,7 +7158,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7184,11 +7184,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7209,7 +7209,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7234,7 +7234,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7264,7 +7264,7 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7287,7 +7287,7 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,7 +7309,7 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7334,7 +7334,7 @@ void m68000_device::bchg_dd_adr16_if() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7362,7 +7362,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7386,7 +7386,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7409,7 +7409,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7431,7 +7431,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7456,7 +7456,7 @@ void m68000_device::bchg_dd_adr32_if() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7488,13 +7488,13 @@ void m68000_device::bclr_dd_ds_if() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7520,14 +7520,14 @@ void m68000_device::bclr_dd_ds_if() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7539,18 +7539,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7568,7 +7568,7 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7592,7 +7592,7 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7608,7 +7608,7 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7625,11 +7625,11 @@ void m68000_device::movep_w_dd_das_if() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7662,11 +7662,11 @@ void m68000_device::bclr_dd_ais_if() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7686,12 +7686,12 @@ void m68000_device::bclr_dd_ais_if() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7716,7 +7716,7 @@ void m68000_device::bclr_dd_ais_if() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7747,12 +7747,12 @@ void m68000_device::bclr_dd_aips_if() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7773,12 +7773,12 @@ void m68000_device::bclr_dd_aips_if() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7803,7 +7803,7 @@ void m68000_device::bclr_dd_aips_if() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7833,7 +7833,7 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7841,7 +7841,7 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7862,12 +7862,12 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7892,7 +7892,7 @@ void m68000_device::bclr_dd_pais_if() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7920,7 +7920,7 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7943,11 +7943,11 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7967,12 +7967,12 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7997,7 +7997,7 @@ void m68000_device::bclr_dd_das_if() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8023,14 +8023,14 @@ void m68000_device::bclr_dd_dais_if() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8038,7 +8038,7 @@ void m68000_device::bclr_dd_dais_if() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8062,7 +8062,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8088,11 +8088,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8112,12 +8112,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8142,7 +8142,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8172,7 +8172,7 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8195,7 +8195,7 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8216,12 +8216,12 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8246,7 +8246,7 @@ void m68000_device::bclr_dd_adr16_if() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8274,7 +8274,7 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8298,7 +8298,7 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8321,7 +8321,7 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8342,12 +8342,12 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8372,7 +8372,7 @@ void m68000_device::bclr_dd_adr32_if() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8404,13 +8404,13 @@ void m68000_device::bset_dd_ds_if() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8439,7 +8439,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8451,14 +8451,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8476,7 +8476,7 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8499,7 +8499,7 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8515,7 +8515,7 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8532,7 +8532,7 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8548,7 +8548,7 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8565,11 +8565,11 @@ void m68000_device::movep_l_dd_das_if() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8602,11 +8602,11 @@ void m68000_device::bset_dd_ais_if() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8627,7 +8627,7 @@ void m68000_device::bset_dd_ais_if() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8652,7 +8652,7 @@ void m68000_device::bset_dd_ais_if() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8683,12 +8683,12 @@ void m68000_device::bset_dd_aips_if() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8710,7 +8710,7 @@ void m68000_device::bset_dd_aips_if() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8735,7 +8735,7 @@ void m68000_device::bset_dd_aips_if() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8765,7 +8765,7 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8773,7 +8773,7 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8795,7 +8795,7 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8820,7 +8820,7 @@ void m68000_device::bset_dd_pais_if() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8848,7 +8848,7 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8871,11 +8871,11 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8896,7 +8896,7 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8921,7 +8921,7 @@ void m68000_device::bset_dd_das_if() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8947,14 +8947,14 @@ void m68000_device::bset_dd_dais_if() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8962,7 +8962,7 @@ void m68000_device::bset_dd_dais_if() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8986,7 +8986,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9012,11 +9012,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9037,7 +9037,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9062,7 +9062,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9092,7 +9092,7 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9115,7 +9115,7 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9137,7 +9137,7 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9162,7 +9162,7 @@ void m68000_device::bset_dd_adr16_if() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9190,7 +9190,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9214,7 +9214,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9237,7 +9237,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9259,7 +9259,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9284,7 +9284,7 @@ void m68000_device::bset_dd_adr32_if() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9313,7 +9313,7 @@ void m68000_device::andi_b_imm8_ds_if() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9336,7 +9336,7 @@ void m68000_device::andi_b_imm8_ds_if() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -9344,7 +9344,7 @@ void m68000_device::andi_b_imm8_ds_if() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9378,7 +9378,7 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9400,11 +9400,11 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9424,7 +9424,7 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9451,7 +9451,7 @@ void m68000_device::andi_b_imm8_ais_if() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9478,7 +9478,7 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9503,12 +9503,12 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9529,7 +9529,7 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9556,7 +9556,7 @@ void m68000_device::andi_b_imm8_aips_if() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9583,7 +9583,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9607,7 +9607,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9615,7 +9615,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9636,7 +9636,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9663,7 +9663,7 @@ void m68000_device::andi_b_imm8_pais_if() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9690,7 +9690,7 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9712,7 +9712,7 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9735,11 +9735,11 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9759,7 +9759,7 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9786,7 +9786,7 @@ void m68000_device::andi_b_imm8_das_if() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9813,7 +9813,7 @@ void m68000_device::andi_b_imm8_dais_if() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9833,14 +9833,14 @@ void m68000_device::andi_b_imm8_dais_if() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9848,7 +9848,7 @@ void m68000_device::andi_b_imm8_dais_if() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9872,7 +9872,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9898,11 +9898,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9922,7 +9922,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9949,7 +9949,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9975,7 +9975,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10000,7 +10000,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10023,7 +10023,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10044,7 +10044,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10071,7 +10071,7 @@ void m68000_device::andi_b_imm8_adr16_if() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10097,7 +10097,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10120,7 +10120,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10144,7 +10144,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10167,7 +10167,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10188,7 +10188,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10215,7 +10215,7 @@ void m68000_device::andi_b_imm8_adr32_if() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10241,7 +10241,7 @@ void m68000_device::andi_imm8_ccr_if() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10263,21 +10263,21 @@ void m68000_device::andi_imm8_ccr_if() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -10285,7 +10285,7 @@ void m68000_device::andi_imm8_ccr_if() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10309,11 +10309,11 @@ void m68000_device::andi_imm8_ccr_if() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10347,7 +10347,7 @@ void m68000_device::andi_w_imm16_ds_if() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10370,7 +10370,7 @@ void m68000_device::andi_w_imm16_ds_if() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10378,7 +10378,7 @@ void m68000_device::andi_w_imm16_ds_if() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10412,7 +10412,7 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10434,11 +10434,11 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10461,7 +10461,7 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10488,7 +10488,7 @@ void m68000_device::andi_w_imm16_ais_if() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10520,7 +10520,7 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10545,12 +10545,12 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -10574,7 +10574,7 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10601,7 +10601,7 @@ void m68000_device::andi_w_imm16_aips_if() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10633,7 +10633,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10657,7 +10657,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10665,7 +10665,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -10689,7 +10689,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10716,7 +10716,7 @@ void m68000_device::andi_w_imm16_pais_if() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10748,7 +10748,7 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10770,7 +10770,7 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10793,11 +10793,11 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10820,7 +10820,7 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10847,7 +10847,7 @@ void m68000_device::andi_w_imm16_das_if() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10879,7 +10879,7 @@ void m68000_device::andi_w_imm16_dais_if() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10899,14 +10899,14 @@ void m68000_device::andi_w_imm16_dais_if() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10914,7 +10914,7 @@ void m68000_device::andi_w_imm16_dais_if() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10938,7 +10938,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10964,11 +10964,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10991,7 +10991,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11018,7 +11018,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11049,7 +11049,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11074,7 +11074,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11097,7 +11097,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11121,7 +11121,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11148,7 +11148,7 @@ void m68000_device::andi_w_imm16_adr16_if() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11179,7 +11179,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11202,7 +11202,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11226,7 +11226,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11249,7 +11249,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11273,7 +11273,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11300,7 +11300,7 @@ void m68000_device::andi_w_imm16_adr32_if() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11335,7 +11335,7 @@ void m68000_device::andi_i16u_sr_if() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11357,23 +11357,23 @@ void m68000_device::andi_i16u_sr_if() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11381,7 +11381,7 @@ void m68000_device::andi_i16u_sr_if() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11405,11 +11405,11 @@ void m68000_device::andi_i16u_sr_if() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11442,7 +11442,7 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11465,7 +11465,7 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11488,12 +11488,12 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11513,7 +11513,7 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -11522,7 +11522,7 @@ void m68000_device::andi_l_imm32_ds_if() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -11538,7 +11538,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11561,7 +11561,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11583,7 +11583,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11608,7 +11608,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11631,7 +11631,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11656,7 +11656,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11681,7 +11681,7 @@ void m68000_device::andi_l_imm32_ais_if() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11712,7 +11712,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11757,7 +11757,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11782,11 +11782,11 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11809,7 +11809,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11834,7 +11834,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11859,7 +11859,7 @@ void m68000_device::andi_l_imm32_aips_if() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11890,7 +11890,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11913,7 +11913,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11934,14 +11934,14 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11965,7 +11965,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11988,7 +11988,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12013,7 +12013,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12038,7 +12038,7 @@ void m68000_device::andi_l_imm32_pais_if() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12069,7 +12069,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12092,7 +12092,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12114,7 +12114,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12136,7 +12136,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12161,7 +12161,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12184,7 +12184,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12209,7 +12209,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12234,7 +12234,7 @@ void m68000_device::andi_l_imm32_das_if() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12265,7 +12265,7 @@ void m68000_device::andi_l_imm32_dais_if() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12288,7 +12288,7 @@ void m68000_device::andi_l_imm32_dais_if() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12308,14 +12308,14 @@ void m68000_device::andi_l_imm32_dais_if() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -12323,7 +12323,7 @@ void m68000_device::andi_l_imm32_dais_if() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12347,7 +12347,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12372,7 +12372,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12397,7 +12397,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12420,7 +12420,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12445,7 +12445,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12470,7 +12470,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12500,7 +12500,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12523,7 +12523,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12548,7 +12548,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12571,7 +12571,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12596,7 +12596,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12619,7 +12619,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12644,7 +12644,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12669,7 +12669,7 @@ void m68000_device::andi_l_imm32_adr16_if() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12699,7 +12699,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12722,7 +12722,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12745,7 +12745,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12769,7 +12769,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12792,7 +12792,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12817,7 +12817,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12840,7 +12840,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12865,7 +12865,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12890,7 +12890,7 @@ void m68000_device::andi_l_imm32_adr32_if() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12944,7 +12944,7 @@ void m68000_device::subi_b_imm8_ds_if() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13006,7 +13006,7 @@ void m68000_device::subi_b_imm8_ais_if() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13029,7 +13029,7 @@ void m68000_device::subi_b_imm8_ais_if() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13109,7 +13109,7 @@ void m68000_device::subi_b_imm8_aips_if() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13130,7 +13130,7 @@ void m68000_device::subi_b_imm8_aips_if() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13212,7 +13212,7 @@ void m68000_device::subi_b_imm8_pais_if() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13233,7 +13233,7 @@ void m68000_device::subi_b_imm8_pais_if() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13329,7 +13329,7 @@ void m68000_device::subi_b_imm8_das_if() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13352,7 +13352,7 @@ void m68000_device::subi_b_imm8_das_if() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13424,7 +13424,7 @@ void m68000_device::subi_b_imm8_dais_if() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -13486,7 +13486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13509,7 +13509,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13606,7 +13606,7 @@ void m68000_device::subi_b_imm8_adr16_if() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13627,7 +13627,7 @@ void m68000_device::subi_b_imm8_adr16_if() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13745,7 +13745,7 @@ void m68000_device::subi_b_imm8_adr32_if() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13766,7 +13766,7 @@ void m68000_device::subi_b_imm8_adr32_if() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13841,7 +13841,7 @@ void m68000_device::subi_w_imm16_ds_if() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13903,7 +13903,7 @@ void m68000_device::subi_w_imm16_ais_if() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13929,7 +13929,7 @@ void m68000_device::subi_w_imm16_ais_if() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14014,7 +14014,7 @@ void m68000_device::subi_w_imm16_aips_if() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14038,7 +14038,7 @@ void m68000_device::subi_w_imm16_aips_if() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14125,7 +14125,7 @@ void m68000_device::subi_w_imm16_pais_if() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14149,7 +14149,7 @@ void m68000_device::subi_w_imm16_pais_if() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14250,7 +14250,7 @@ void m68000_device::subi_w_imm16_das_if() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14276,7 +14276,7 @@ void m68000_device::subi_w_imm16_das_if() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_device::subi_w_imm16_dais_if() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -14415,7 +14415,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14441,7 +14441,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14543,7 +14543,7 @@ void m68000_device::subi_w_imm16_adr16_if() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14567,7 +14567,7 @@ void m68000_device::subi_w_imm16_adr16_if() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14690,7 +14690,7 @@ void m68000_device::subi_w_imm16_adr32_if() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14714,7 +14714,7 @@ void m68000_device::subi_w_imm16_adr32_if() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14815,7 +14815,7 @@ void m68000_device::subi_l_imm32_ds_if() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -14839,7 +14839,7 @@ void m68000_device::subi_l_imm32_ds_if() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -14906,7 +14906,7 @@ void m68000_device::subi_l_imm32_ais_if() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14953,7 +14953,7 @@ void m68000_device::subi_l_imm32_ais_if() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14978,7 +14978,7 @@ void m68000_device::subi_l_imm32_ais_if() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15076,7 +15076,7 @@ void m68000_device::subi_l_imm32_aips_if() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15126,7 +15126,7 @@ void m68000_device::subi_l_imm32_aips_if() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15151,7 +15151,7 @@ void m68000_device::subi_l_imm32_aips_if() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15248,7 +15248,7 @@ void m68000_device::subi_l_imm32_pais_if() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -15300,7 +15300,7 @@ void m68000_device::subi_l_imm32_pais_if() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15325,7 +15325,7 @@ void m68000_device::subi_l_imm32_pais_if() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15444,7 +15444,7 @@ void m68000_device::subi_l_imm32_das_if() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15491,7 +15491,7 @@ void m68000_device::subi_l_imm32_das_if() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15516,7 +15516,7 @@ void m68000_device::subi_l_imm32_das_if() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15612,7 +15612,7 @@ void m68000_device::subi_l_imm32_dais_if() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -15673,7 +15673,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15720,7 +15720,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15745,7 +15745,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15866,7 +15866,7 @@ void m68000_device::subi_l_imm32_adr16_if() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15913,7 +15913,7 @@ void m68000_device::subi_l_imm32_adr16_if() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15938,7 +15938,7 @@ void m68000_device::subi_l_imm32_adr16_if() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16080,7 +16080,7 @@ void m68000_device::subi_l_imm32_adr32_if() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -16127,7 +16127,7 @@ void m68000_device::subi_l_imm32_adr32_if() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16152,7 +16152,7 @@ void m68000_device::subi_l_imm32_adr32_if() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16230,7 +16230,7 @@ void m68000_device::addi_b_imm8_ds_if() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16292,7 +16292,7 @@ void m68000_device::addi_b_imm8_ais_if() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16315,7 +16315,7 @@ void m68000_device::addi_b_imm8_ais_if() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16395,7 +16395,7 @@ void m68000_device::addi_b_imm8_aips_if() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16416,7 +16416,7 @@ void m68000_device::addi_b_imm8_aips_if() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16498,7 +16498,7 @@ void m68000_device::addi_b_imm8_pais_if() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16519,7 +16519,7 @@ void m68000_device::addi_b_imm8_pais_if() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16615,7 +16615,7 @@ void m68000_device::addi_b_imm8_das_if() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16638,7 +16638,7 @@ void m68000_device::addi_b_imm8_das_if() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16710,7 +16710,7 @@ void m68000_device::addi_b_imm8_dais_if() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16772,7 +16772,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16795,7 +16795,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16892,7 +16892,7 @@ void m68000_device::addi_b_imm8_adr16_if() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16913,7 +16913,7 @@ void m68000_device::addi_b_imm8_adr16_if() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17031,7 +17031,7 @@ void m68000_device::addi_b_imm8_adr32_if() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -17052,7 +17052,7 @@ void m68000_device::addi_b_imm8_adr32_if() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17127,7 +17127,7 @@ void m68000_device::addi_w_imm16_ds_if() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17189,7 +17189,7 @@ void m68000_device::addi_w_imm16_ais_if() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17215,7 +17215,7 @@ void m68000_device::addi_w_imm16_ais_if() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17300,7 +17300,7 @@ void m68000_device::addi_w_imm16_aips_if() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17324,7 +17324,7 @@ void m68000_device::addi_w_imm16_aips_if() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17411,7 +17411,7 @@ void m68000_device::addi_w_imm16_pais_if() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17435,7 +17435,7 @@ void m68000_device::addi_w_imm16_pais_if() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17536,7 +17536,7 @@ void m68000_device::addi_w_imm16_das_if() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17562,7 +17562,7 @@ void m68000_device::addi_w_imm16_das_if() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17639,7 +17639,7 @@ void m68000_device::addi_w_imm16_dais_if() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17701,7 +17701,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17727,7 +17727,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17829,7 +17829,7 @@ void m68000_device::addi_w_imm16_adr16_if() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17853,7 +17853,7 @@ void m68000_device::addi_w_imm16_adr16_if() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17976,7 +17976,7 @@ void m68000_device::addi_w_imm16_adr32_if() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18000,7 +18000,7 @@ void m68000_device::addi_w_imm16_adr32_if() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18101,7 +18101,7 @@ void m68000_device::addi_l_imm32_ds_if() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -18125,7 +18125,7 @@ void m68000_device::addi_l_imm32_ds_if() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -18192,7 +18192,7 @@ void m68000_device::addi_l_imm32_ais_if() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18239,7 +18239,7 @@ void m68000_device::addi_l_imm32_ais_if() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18264,7 +18264,7 @@ void m68000_device::addi_l_imm32_ais_if() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18362,7 +18362,7 @@ void m68000_device::addi_l_imm32_aips_if() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18412,7 +18412,7 @@ void m68000_device::addi_l_imm32_aips_if() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18437,7 +18437,7 @@ void m68000_device::addi_l_imm32_aips_if() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18534,7 +18534,7 @@ void m68000_device::addi_l_imm32_pais_if() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -18586,7 +18586,7 @@ void m68000_device::addi_l_imm32_pais_if() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18611,7 +18611,7 @@ void m68000_device::addi_l_imm32_pais_if() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18730,7 +18730,7 @@ void m68000_device::addi_l_imm32_das_if() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18777,7 +18777,7 @@ void m68000_device::addi_l_imm32_das_if() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18802,7 +18802,7 @@ void m68000_device::addi_l_imm32_das_if() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18898,7 +18898,7 @@ void m68000_device::addi_l_imm32_dais_if() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -18959,7 +18959,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19006,7 +19006,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19031,7 +19031,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19152,7 +19152,7 @@ void m68000_device::addi_l_imm32_adr16_if() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19199,7 +19199,7 @@ void m68000_device::addi_l_imm32_adr16_if() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19224,7 +19224,7 @@ void m68000_device::addi_l_imm32_adr16_if() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19366,7 +19366,7 @@ void m68000_device::addi_l_imm32_adr32_if() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19413,7 +19413,7 @@ void m68000_device::addi_l_imm32_adr32_if() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19438,7 +19438,7 @@ void m68000_device::addi_l_imm32_adr32_if() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19494,7 +19494,7 @@ void m68000_device::btst_imm8_ds_if() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19520,13 +19520,13 @@ void m68000_device::btst_imm8_ds_if() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -19555,7 +19555,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19568,7 +19568,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19587,7 +19587,7 @@ void m68000_device::btst_imm8_ais_if() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19609,11 +19609,11 @@ void m68000_device::btst_imm8_ais_if() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19633,13 +19633,13 @@ void m68000_device::btst_imm8_ais_if() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19673,7 +19673,7 @@ void m68000_device::btst_imm8_aips_if() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19698,12 +19698,12 @@ void m68000_device::btst_imm8_aips_if() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19724,13 +19724,13 @@ void m68000_device::btst_imm8_aips_if() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19764,7 +19764,7 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19788,7 +19788,7 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -19796,7 +19796,7 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19817,13 +19817,13 @@ void m68000_device::btst_imm8_pais_if() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19857,7 +19857,7 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19879,7 +19879,7 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19902,11 +19902,11 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19926,13 +19926,13 @@ void m68000_device::btst_imm8_das_if() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19966,7 +19966,7 @@ void m68000_device::btst_imm8_dais_if() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19986,14 +19986,14 @@ void m68000_device::btst_imm8_dais_if() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20001,7 +20001,7 @@ void m68000_device::btst_imm8_dais_if() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20025,7 +20025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20051,11 +20051,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20075,13 +20075,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20114,7 +20114,7 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20139,7 +20139,7 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20162,7 +20162,7 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20183,13 +20183,13 @@ void m68000_device::btst_imm8_adr16_if() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20222,7 +20222,7 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20245,7 +20245,7 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20269,7 +20269,7 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20292,7 +20292,7 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20313,13 +20313,13 @@ void m68000_device::btst_imm8_adr32_if() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20352,7 +20352,7 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20374,7 +20374,7 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20397,11 +20397,11 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20421,13 +20421,13 @@ void m68000_device::btst_imm8_dpc_if() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20460,7 +20460,7 @@ void m68000_device::btst_imm8_dpci_if() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20480,14 +20480,14 @@ void m68000_device::btst_imm8_dpci_if() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20495,7 +20495,7 @@ void m68000_device::btst_imm8_dpci_if() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20519,7 +20519,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20545,11 +20545,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20569,13 +20569,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20609,7 +20609,7 @@ void m68000_device::bchg_imm8_ds_if() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20635,13 +20635,13 @@ void m68000_device::bchg_imm8_ds_if() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20670,7 +20670,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20682,14 +20682,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20708,7 +20708,7 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20730,11 +20730,11 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20755,7 +20755,7 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20780,7 +20780,7 @@ void m68000_device::bchg_imm8_ais_if() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20809,7 +20809,7 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20834,12 +20834,12 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20861,7 +20861,7 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20886,7 +20886,7 @@ void m68000_device::bchg_imm8_aips_if() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20915,7 +20915,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20939,7 +20939,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -20947,7 +20947,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20969,7 +20969,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20994,7 +20994,7 @@ void m68000_device::bchg_imm8_pais_if() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21023,7 +21023,7 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21045,7 +21045,7 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21068,11 +21068,11 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21093,7 +21093,7 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21118,7 +21118,7 @@ void m68000_device::bchg_imm8_das_if() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21147,7 +21147,7 @@ void m68000_device::bchg_imm8_dais_if() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21167,14 +21167,14 @@ void m68000_device::bchg_imm8_dais_if() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -21182,7 +21182,7 @@ void m68000_device::bchg_imm8_dais_if() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21206,7 +21206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21232,11 +21232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21257,7 +21257,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21282,7 +21282,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21310,7 +21310,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21335,7 +21335,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21358,7 +21358,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21380,7 +21380,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21405,7 +21405,7 @@ void m68000_device::bchg_imm8_adr16_if() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21433,7 +21433,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21456,7 +21456,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21480,7 +21480,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21503,7 +21503,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21525,7 +21525,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21550,7 +21550,7 @@ void m68000_device::bchg_imm8_adr32_if() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21579,7 +21579,7 @@ void m68000_device::bclr_imm8_ds_if() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21605,13 +21605,13 @@ void m68000_device::bclr_imm8_ds_if() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21637,14 +21637,14 @@ void m68000_device::bclr_imm8_ds_if() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21656,18 +21656,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21686,7 +21686,7 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21708,11 +21708,11 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21732,12 +21732,12 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21762,7 +21762,7 @@ void m68000_device::bclr_imm8_ais_if() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21791,7 +21791,7 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21816,12 +21816,12 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21842,12 +21842,12 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21872,7 +21872,7 @@ void m68000_device::bclr_imm8_aips_if() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21901,7 +21901,7 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21925,7 +21925,7 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -21933,7 +21933,7 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21954,12 +21954,12 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21984,7 +21984,7 @@ void m68000_device::bclr_imm8_pais_if() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22013,7 +22013,7 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22035,7 +22035,7 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22058,11 +22058,11 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22082,12 +22082,12 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22112,7 +22112,7 @@ void m68000_device::bclr_imm8_das_if() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22141,7 +22141,7 @@ void m68000_device::bclr_imm8_dais_if() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22161,14 +22161,14 @@ void m68000_device::bclr_imm8_dais_if() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22176,7 +22176,7 @@ void m68000_device::bclr_imm8_dais_if() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22200,7 +22200,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22226,11 +22226,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22250,12 +22250,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22280,7 +22280,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22308,7 +22308,7 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22333,7 +22333,7 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22356,7 +22356,7 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22377,12 +22377,12 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22407,7 +22407,7 @@ void m68000_device::bclr_imm8_adr16_if() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22435,7 +22435,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22458,7 +22458,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22482,7 +22482,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22505,7 +22505,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22526,12 +22526,12 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22556,7 +22556,7 @@ void m68000_device::bclr_imm8_adr32_if() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22585,7 +22585,7 @@ void m68000_device::bset_imm8_ds_if() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22611,13 +22611,13 @@ void m68000_device::bset_imm8_ds_if() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22646,7 +22646,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22658,14 +22658,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22684,7 +22684,7 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22706,11 +22706,11 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22731,7 +22731,7 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22756,7 +22756,7 @@ void m68000_device::bset_imm8_ais_if() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22785,7 +22785,7 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22810,12 +22810,12 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22837,7 +22837,7 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22862,7 +22862,7 @@ void m68000_device::bset_imm8_aips_if() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22891,7 +22891,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22915,7 +22915,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22923,7 +22923,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22945,7 +22945,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22970,7 +22970,7 @@ void m68000_device::bset_imm8_pais_if() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22999,7 +22999,7 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23021,7 +23021,7 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23044,11 +23044,11 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23069,7 +23069,7 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23094,7 +23094,7 @@ void m68000_device::bset_imm8_das_if() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23123,7 +23123,7 @@ void m68000_device::bset_imm8_dais_if() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23143,14 +23143,14 @@ void m68000_device::bset_imm8_dais_if() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23158,7 +23158,7 @@ void m68000_device::bset_imm8_dais_if() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23182,7 +23182,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23208,11 +23208,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23233,7 +23233,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23258,7 +23258,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23286,7 +23286,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23311,7 +23311,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23334,7 +23334,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23356,7 +23356,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23381,7 +23381,7 @@ void m68000_device::bset_imm8_adr16_if() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23409,7 +23409,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23432,7 +23432,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23456,7 +23456,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23479,7 +23479,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23501,7 +23501,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23526,7 +23526,7 @@ void m68000_device::bset_imm8_adr32_if() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23555,7 +23555,7 @@ void m68000_device::eori_b_imm8_ds_if() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23578,7 +23578,7 @@ void m68000_device::eori_b_imm8_ds_if() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -23586,7 +23586,7 @@ void m68000_device::eori_b_imm8_ds_if() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23620,7 +23620,7 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23642,11 +23642,11 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23666,7 +23666,7 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23693,7 +23693,7 @@ void m68000_device::eori_b_imm8_ais_if() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23720,7 +23720,7 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23745,12 +23745,12 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23771,7 +23771,7 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23798,7 +23798,7 @@ void m68000_device::eori_b_imm8_aips_if() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23825,7 +23825,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23849,7 +23849,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23857,7 +23857,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23878,7 +23878,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23905,7 +23905,7 @@ void m68000_device::eori_b_imm8_pais_if() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23932,7 +23932,7 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23954,7 +23954,7 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23977,11 +23977,11 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24001,7 +24001,7 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24028,7 +24028,7 @@ void m68000_device::eori_b_imm8_das_if() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24055,7 +24055,7 @@ void m68000_device::eori_b_imm8_dais_if() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24075,14 +24075,14 @@ void m68000_device::eori_b_imm8_dais_if() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24090,7 +24090,7 @@ void m68000_device::eori_b_imm8_dais_if() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24114,7 +24114,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24140,11 +24140,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24164,7 +24164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24191,7 +24191,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24217,7 +24217,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24242,7 +24242,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24265,7 +24265,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24286,7 +24286,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24313,7 +24313,7 @@ void m68000_device::eori_b_imm8_adr16_if() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24339,7 +24339,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24362,7 +24362,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24386,7 +24386,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24409,7 +24409,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24430,7 +24430,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24457,7 +24457,7 @@ void m68000_device::eori_b_imm8_adr32_if() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24483,7 +24483,7 @@ void m68000_device::eori_imm8_ccr_if() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24505,21 +24505,21 @@ void m68000_device::eori_imm8_ccr_if() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -24527,7 +24527,7 @@ void m68000_device::eori_imm8_ccr_if() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24551,11 +24551,11 @@ void m68000_device::eori_imm8_ccr_if() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24589,7 +24589,7 @@ void m68000_device::eori_w_imm16_ds_if() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24612,7 +24612,7 @@ void m68000_device::eori_w_imm16_ds_if() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -24620,7 +24620,7 @@ void m68000_device::eori_w_imm16_ds_if() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24654,7 +24654,7 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24676,11 +24676,11 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24703,7 +24703,7 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24730,7 +24730,7 @@ void m68000_device::eori_w_imm16_ais_if() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24762,7 +24762,7 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24787,12 +24787,12 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -24816,7 +24816,7 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24843,7 +24843,7 @@ void m68000_device::eori_w_imm16_aips_if() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24875,7 +24875,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24899,7 +24899,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24907,7 +24907,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -24931,7 +24931,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24958,7 +24958,7 @@ void m68000_device::eori_w_imm16_pais_if() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24990,7 +24990,7 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25012,7 +25012,7 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25035,11 +25035,11 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25062,7 +25062,7 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25089,7 +25089,7 @@ void m68000_device::eori_w_imm16_das_if() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25121,7 +25121,7 @@ void m68000_device::eori_w_imm16_dais_if() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25141,14 +25141,14 @@ void m68000_device::eori_w_imm16_dais_if() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25156,7 +25156,7 @@ void m68000_device::eori_w_imm16_dais_if() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25180,7 +25180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25206,11 +25206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25233,7 +25233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25260,7 +25260,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25291,7 +25291,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25316,7 +25316,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25339,7 +25339,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25363,7 +25363,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25390,7 +25390,7 @@ void m68000_device::eori_w_imm16_adr16_if() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25421,7 +25421,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25444,7 +25444,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25468,7 +25468,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25491,7 +25491,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25515,7 +25515,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25542,7 +25542,7 @@ void m68000_device::eori_w_imm16_adr32_if() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25577,7 +25577,7 @@ void m68000_device::eori_i16u_sr_if() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25599,23 +25599,23 @@ void m68000_device::eori_i16u_sr_if() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -25623,7 +25623,7 @@ void m68000_device::eori_i16u_sr_if() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25647,11 +25647,11 @@ void m68000_device::eori_i16u_sr_if() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25684,7 +25684,7 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25707,7 +25707,7 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25730,12 +25730,12 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25755,7 +25755,7 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -25764,7 +25764,7 @@ void m68000_device::eori_l_imm32_ds_if() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -25780,7 +25780,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25803,7 +25803,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25825,7 +25825,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25850,7 +25850,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25873,7 +25873,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25898,7 +25898,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -25923,7 +25923,7 @@ void m68000_device::eori_l_imm32_ais_if() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25954,7 +25954,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25977,7 +25977,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25999,7 +25999,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26024,11 +26024,11 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26051,7 +26051,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26076,7 +26076,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26101,7 +26101,7 @@ void m68000_device::eori_l_imm32_aips_if() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26132,7 +26132,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26155,7 +26155,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26176,14 +26176,14 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26207,7 +26207,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26230,7 +26230,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26255,7 +26255,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26280,7 +26280,7 @@ void m68000_device::eori_l_imm32_pais_if() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26311,7 +26311,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26334,7 +26334,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26356,7 +26356,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26378,7 +26378,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26403,7 +26403,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26426,7 +26426,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26451,7 +26451,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26476,7 +26476,7 @@ void m68000_device::eori_l_imm32_das_if() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26507,7 +26507,7 @@ void m68000_device::eori_l_imm32_dais_if() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26530,7 +26530,7 @@ void m68000_device::eori_l_imm32_dais_if() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26550,14 +26550,14 @@ void m68000_device::eori_l_imm32_dais_if() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -26565,7 +26565,7 @@ void m68000_device::eori_l_imm32_dais_if() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26589,7 +26589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26614,7 +26614,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26639,7 +26639,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26662,7 +26662,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26687,7 +26687,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26712,7 +26712,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26742,7 +26742,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26765,7 +26765,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26790,7 +26790,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26813,7 +26813,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26838,7 +26838,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26861,7 +26861,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26886,7 +26886,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26911,7 +26911,7 @@ void m68000_device::eori_l_imm32_adr16_if() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26941,7 +26941,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26964,7 +26964,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26987,7 +26987,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -27011,7 +27011,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27034,7 +27034,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -27059,7 +27059,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -27082,7 +27082,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27107,7 +27107,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -27132,7 +27132,7 @@ void m68000_device::eori_l_imm32_adr32_if() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -27186,7 +27186,7 @@ void m68000_device::cmpi_b_imm8_ds_if() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -27247,7 +27247,7 @@ void m68000_device::cmpi_b_imm8_ais_if() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27270,7 +27270,7 @@ void m68000_device::cmpi_b_imm8_ais_if() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27336,7 +27336,7 @@ void m68000_device::cmpi_b_imm8_aips_if() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27357,7 +27357,7 @@ void m68000_device::cmpi_b_imm8_aips_if() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27425,7 +27425,7 @@ void m68000_device::cmpi_b_imm8_pais_if() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27446,7 +27446,7 @@ void m68000_device::cmpi_b_imm8_pais_if() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27528,7 +27528,7 @@ void m68000_device::cmpi_b_imm8_das_if() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27551,7 +27551,7 @@ void m68000_device::cmpi_b_imm8_das_if() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27609,7 +27609,7 @@ void m68000_device::cmpi_b_imm8_dais_if() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -27671,7 +27671,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27694,7 +27694,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27777,7 +27777,7 @@ void m68000_device::cmpi_b_imm8_adr16_if() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27798,7 +27798,7 @@ void m68000_device::cmpi_b_imm8_adr16_if() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27902,7 +27902,7 @@ void m68000_device::cmpi_b_imm8_adr32_if() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27923,7 +27923,7 @@ void m68000_device::cmpi_b_imm8_adr32_if() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27984,7 +27984,7 @@ void m68000_device::cmpi_w_imm16_ds_if() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -28045,7 +28045,7 @@ void m68000_device::cmpi_w_imm16_ais_if() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28071,7 +28071,7 @@ void m68000_device::cmpi_w_imm16_ais_if() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28137,7 +28137,7 @@ void m68000_device::cmpi_w_imm16_aips_if() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28161,7 +28161,7 @@ void m68000_device::cmpi_w_imm16_aips_if() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28229,7 +28229,7 @@ void m68000_device::cmpi_w_imm16_pais_if() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28253,7 +28253,7 @@ void m68000_device::cmpi_w_imm16_pais_if() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28335,7 +28335,7 @@ void m68000_device::cmpi_w_imm16_das_if() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28361,7 +28361,7 @@ void m68000_device::cmpi_w_imm16_das_if() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28419,7 +28419,7 @@ void m68000_device::cmpi_w_imm16_dais_if() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -28481,7 +28481,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28507,7 +28507,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28590,7 +28590,7 @@ void m68000_device::cmpi_w_imm16_adr16_if() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28614,7 +28614,7 @@ void m68000_device::cmpi_w_imm16_adr16_if() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28718,7 +28718,7 @@ void m68000_device::cmpi_w_imm16_adr32_if() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28742,7 +28742,7 @@ void m68000_device::cmpi_w_imm16_adr32_if() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28825,11 +28825,11 @@ void m68000_device::cmpi_l_imm32_ds_if() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28912,7 +28912,7 @@ void m68000_device::cmpi_l_imm32_ais_if() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28959,13 +28959,13 @@ void m68000_device::cmpi_l_imm32_ais_if() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29043,7 +29043,7 @@ void m68000_device::cmpi_l_imm32_aips_if() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29093,13 +29093,13 @@ void m68000_device::cmpi_l_imm32_aips_if() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29176,7 +29176,7 @@ void m68000_device::cmpi_l_imm32_pais_if() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -29228,13 +29228,13 @@ void m68000_device::cmpi_l_imm32_pais_if() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29333,7 +29333,7 @@ void m68000_device::cmpi_l_imm32_das_if() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29380,13 +29380,13 @@ void m68000_device::cmpi_l_imm32_das_if() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29462,7 +29462,7 @@ void m68000_device::cmpi_l_imm32_dais_if() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -29523,7 +29523,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29570,13 +29570,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29677,7 +29677,7 @@ void m68000_device::cmpi_l_imm32_adr16_if() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29724,13 +29724,13 @@ void m68000_device::cmpi_l_imm32_adr16_if() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29852,7 +29852,7 @@ void m68000_device::cmpi_l_imm32_adr32_if() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29899,13 +29899,13 @@ void m68000_device::cmpi_l_imm32_adr32_if() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29943,7 +29943,7 @@ void m68000_device::move_b_ds_dd_if() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -29983,7 +29983,7 @@ void m68000_device::move_b_ais_dd_if() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30007,7 +30007,7 @@ void m68000_device::move_b_ais_dd_if() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30051,7 +30051,7 @@ void m68000_device::move_b_aips_dd_if() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30073,7 +30073,7 @@ void m68000_device::move_b_aips_dd_if() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30119,7 +30119,7 @@ void m68000_device::move_b_pais_dd_if() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30141,7 +30141,7 @@ void m68000_device::move_b_pais_dd_if() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30201,7 +30201,7 @@ void m68000_device::move_b_das_dd_if() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30225,7 +30225,7 @@ void m68000_device::move_b_das_dd_if() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30261,7 +30261,7 @@ void m68000_device::move_b_dais_dd_if() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30323,7 +30323,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30347,7 +30347,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30408,7 +30408,7 @@ void m68000_device::move_b_adr16_dd_if() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30430,7 +30430,7 @@ void m68000_device::move_b_adr16_dd_if() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30512,7 +30512,7 @@ void m68000_device::move_b_adr32_dd_if() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30534,7 +30534,7 @@ void m68000_device::move_b_adr32_dd_if() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30593,7 +30593,7 @@ void m68000_device::move_b_dpc_dd_if() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30617,7 +30617,7 @@ void m68000_device::move_b_dpc_dd_if() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30652,7 +30652,7 @@ void m68000_device::move_b_dpci_dd_if() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30714,7 +30714,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30738,7 +30738,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30802,7 +30802,7 @@ void m68000_device::move_b_imm8_dd_if() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -30845,7 +30845,7 @@ void m68000_device::move_b_ds_aid_if() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30898,7 +30898,7 @@ void m68000_device::move_b_ais_aid_if() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -30921,7 +30921,7 @@ void m68000_device::move_b_ais_aid_if() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30980,7 +30980,7 @@ void m68000_device::move_b_aips_aid_if() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31001,7 +31001,7 @@ void m68000_device::move_b_aips_aid_if() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31062,7 +31062,7 @@ void m68000_device::move_b_pais_aid_if() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31083,7 +31083,7 @@ void m68000_device::move_b_pais_aid_if() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31158,7 +31158,7 @@ void m68000_device::move_b_das_aid_if() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31181,7 +31181,7 @@ void m68000_device::move_b_das_aid_if() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31232,7 +31232,7 @@ void m68000_device::move_b_dais_aid_if() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31294,7 +31294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31317,7 +31317,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31393,7 +31393,7 @@ void m68000_device::move_b_adr16_aid_if() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31414,7 +31414,7 @@ void m68000_device::move_b_adr16_aid_if() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31511,7 +31511,7 @@ void m68000_device::move_b_adr32_aid_if() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31532,7 +31532,7 @@ void m68000_device::move_b_adr32_aid_if() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68000_device::move_b_dpc_aid_if() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31629,7 +31629,7 @@ void m68000_device::move_b_dpc_aid_if() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31679,7 +31679,7 @@ void m68000_device::move_b_dpci_aid_if() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31741,7 +31741,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31764,7 +31764,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31843,7 +31843,7 @@ void m68000_device::move_b_imm8_aid_if() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31899,7 +31899,7 @@ void m68000_device::move_b_ds_aipd_if() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31951,7 +31951,7 @@ void m68000_device::move_b_ais_aipd_if() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31975,7 +31975,7 @@ void m68000_device::move_b_ais_aipd_if() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32033,7 +32033,7 @@ void m68000_device::move_b_aips_aipd_if() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32055,7 +32055,7 @@ void m68000_device::move_b_aips_aipd_if() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32115,7 +32115,7 @@ void m68000_device::move_b_pais_aipd_if() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32137,7 +32137,7 @@ void m68000_device::move_b_pais_aipd_if() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32211,7 +32211,7 @@ void m68000_device::move_b_das_aipd_if() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32235,7 +32235,7 @@ void m68000_device::move_b_das_aipd_if() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32285,7 +32285,7 @@ void m68000_device::move_b_dais_aipd_if() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32347,7 +32347,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32371,7 +32371,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32446,7 +32446,7 @@ void m68000_device::move_b_adr16_aipd_if() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32468,7 +32468,7 @@ void m68000_device::move_b_adr16_aipd_if() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32564,7 +32564,7 @@ void m68000_device::move_b_adr32_aipd_if() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32586,7 +32586,7 @@ void m68000_device::move_b_adr32_aipd_if() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32659,7 +32659,7 @@ void m68000_device::move_b_dpc_aipd_if() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32683,7 +32683,7 @@ void m68000_device::move_b_dpc_aipd_if() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32732,7 +32732,7 @@ void m68000_device::move_b_dpci_aipd_if() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32794,7 +32794,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32818,7 +32818,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32896,7 +32896,7 @@ void m68000_device::move_b_imm8_aipd_if() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32950,7 +32950,7 @@ void m68000_device::move_b_ds_paid_if() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33003,7 +33003,7 @@ void m68000_device::move_b_ais_paid_if() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33026,7 +33026,7 @@ void m68000_device::move_b_ais_paid_if() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33085,7 +33085,7 @@ void m68000_device::move_b_aips_paid_if() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33106,7 +33106,7 @@ void m68000_device::move_b_aips_paid_if() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33167,7 +33167,7 @@ void m68000_device::move_b_pais_paid_if() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33188,7 +33188,7 @@ void m68000_device::move_b_pais_paid_if() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33263,7 +33263,7 @@ void m68000_device::move_b_das_paid_if() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33286,7 +33286,7 @@ void m68000_device::move_b_das_paid_if() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33337,7 +33337,7 @@ void m68000_device::move_b_dais_paid_if() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33399,7 +33399,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33422,7 +33422,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33498,7 +33498,7 @@ void m68000_device::move_b_adr16_paid_if() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33519,7 +33519,7 @@ void m68000_device::move_b_adr16_paid_if() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33616,7 +33616,7 @@ void m68000_device::move_b_adr32_paid_if() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33637,7 +33637,7 @@ void m68000_device::move_b_adr32_paid_if() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33711,7 +33711,7 @@ void m68000_device::move_b_dpc_paid_if() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33734,7 +33734,7 @@ void m68000_device::move_b_dpc_paid_if() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33784,7 +33784,7 @@ void m68000_device::move_b_dpci_paid_if() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33846,7 +33846,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33869,7 +33869,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33947,7 +33947,7 @@ void m68000_device::move_b_imm8_paid_if() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34023,7 +34023,7 @@ void m68000_device::move_b_ds_dad_if() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -34077,7 +34077,7 @@ void m68000_device::move_b_ais_dad_if() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34099,7 +34099,7 @@ void m68000_device::move_b_ais_dad_if() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34185,7 +34185,7 @@ void m68000_device::move_b_aips_dad_if() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34205,7 +34205,7 @@ void m68000_device::move_b_aips_dad_if() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34293,7 +34293,7 @@ void m68000_device::move_b_pais_dad_if() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34313,7 +34313,7 @@ void m68000_device::move_b_pais_dad_if() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34415,7 +34415,7 @@ void m68000_device::move_b_das_dad_if() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34437,7 +34437,7 @@ void m68000_device::move_b_das_dad_if() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34515,7 +34515,7 @@ void m68000_device::move_b_dais_dad_if() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34577,7 +34577,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34599,7 +34599,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34702,7 +34702,7 @@ void m68000_device::move_b_adr16_dad_if() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34722,7 +34722,7 @@ void m68000_device::move_b_adr16_dad_if() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34846,7 +34846,7 @@ void m68000_device::move_b_adr32_dad_if() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34866,7 +34866,7 @@ void m68000_device::move_b_adr32_dad_if() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34967,7 +34967,7 @@ void m68000_device::move_b_dpc_dad_if() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34989,7 +34989,7 @@ void m68000_device::move_b_dpc_dad_if() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35066,7 +35066,7 @@ void m68000_device::move_b_dpci_dad_if() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35128,7 +35128,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35150,7 +35150,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35276,7 +35276,7 @@ void m68000_device::move_b_imm8_dad_if() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35328,7 +35328,7 @@ void m68000_device::move_b_ds_daid_if() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -35392,7 +35392,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35446,7 +35446,7 @@ void m68000_device::move_b_ais_daid_if() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35465,7 +35465,7 @@ void m68000_device::move_b_ais_daid_if() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35480,7 +35480,7 @@ void m68000_device::move_b_ais_daid_if() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35504,7 +35504,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35592,7 +35592,7 @@ void m68000_device::move_b_aips_daid_if() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35609,7 +35609,7 @@ void m68000_device::move_b_aips_daid_if() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35624,7 +35624,7 @@ void m68000_device::move_b_aips_daid_if() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35648,7 +35648,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35738,7 +35738,7 @@ void m68000_device::move_b_pais_daid_if() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35755,7 +35755,7 @@ void m68000_device::move_b_pais_daid_if() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35770,7 +35770,7 @@ void m68000_device::move_b_pais_daid_if() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35794,7 +35794,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35898,7 +35898,7 @@ void m68000_device::move_b_das_daid_if() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35917,7 +35917,7 @@ void m68000_device::move_b_das_daid_if() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35932,7 +35932,7 @@ void m68000_device::move_b_das_daid_if() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35956,7 +35956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36036,7 +36036,7 @@ void m68000_device::move_b_dais_daid_if() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36098,7 +36098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36117,7 +36117,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36132,7 +36132,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36156,7 +36156,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36261,7 +36261,7 @@ void m68000_device::move_b_adr16_daid_if() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36278,7 +36278,7 @@ void m68000_device::move_b_adr16_daid_if() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36293,7 +36293,7 @@ void m68000_device::move_b_adr16_daid_if() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36317,7 +36317,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36443,7 +36443,7 @@ void m68000_device::move_b_adr32_daid_if() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36460,7 +36460,7 @@ void m68000_device::move_b_adr32_daid_if() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36475,7 +36475,7 @@ void m68000_device::move_b_adr32_daid_if() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36499,7 +36499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36602,7 +36602,7 @@ void m68000_device::move_b_dpc_daid_if() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36621,7 +36621,7 @@ void m68000_device::move_b_dpc_daid_if() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36636,7 +36636,7 @@ void m68000_device::move_b_dpc_daid_if() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36660,7 +36660,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36739,7 +36739,7 @@ void m68000_device::move_b_dpci_daid_if() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36801,7 +36801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36820,7 +36820,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36835,7 +36835,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36859,7 +36859,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36962,7 +36962,7 @@ void m68000_device::move_b_imm8_daid_if() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -37026,7 +37026,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37081,7 +37081,7 @@ void m68000_device::move_b_ds_adr16_if() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37160,7 +37160,7 @@ void m68000_device::move_b_ais_adr16_if() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37182,7 +37182,7 @@ void m68000_device::move_b_ais_adr16_if() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37267,7 +37267,7 @@ void m68000_device::move_b_aips_adr16_if() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37287,7 +37287,7 @@ void m68000_device::move_b_aips_adr16_if() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37374,7 +37374,7 @@ void m68000_device::move_b_pais_adr16_if() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37394,7 +37394,7 @@ void m68000_device::move_b_pais_adr16_if() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37495,7 +37495,7 @@ void m68000_device::move_b_das_adr16_if() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37517,7 +37517,7 @@ void m68000_device::move_b_das_adr16_if() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37594,7 +37594,7 @@ void m68000_device::move_b_dais_adr16_if() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37656,7 +37656,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37678,7 +37678,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37780,7 +37780,7 @@ void m68000_device::move_b_adr16_adr16_if() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37800,7 +37800,7 @@ void m68000_device::move_b_adr16_adr16_if() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37923,7 +37923,7 @@ void m68000_device::move_b_adr32_adr16_if() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37943,7 +37943,7 @@ void m68000_device::move_b_adr32_adr16_if() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38043,7 +38043,7 @@ void m68000_device::move_b_dpc_adr16_if() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38065,7 +38065,7 @@ void m68000_device::move_b_dpc_adr16_if() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38141,7 +38141,7 @@ void m68000_device::move_b_dpc_adr16_if() // 11fa ffff
void m68000_device::move_b_dpci_adr16_if() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38203,7 +38203,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38225,7 +38225,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38329,7 +38329,7 @@ void m68000_device::move_b_imm8_adr16_if() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38431,7 +38431,7 @@ void m68000_device::move_b_ds_adr32_if() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38510,7 +38510,7 @@ void m68000_device::move_b_ais_adr32_if() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38532,7 +38532,7 @@ void m68000_device::move_b_ais_adr32_if() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38637,7 +38637,7 @@ void m68000_device::move_b_aips_adr32_if() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38657,7 +38657,7 @@ void m68000_device::move_b_aips_adr32_if() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38764,7 +38764,7 @@ void m68000_device::move_b_pais_adr32_if() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38784,7 +38784,7 @@ void m68000_device::move_b_pais_adr32_if() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38905,7 +38905,7 @@ void m68000_device::move_b_das_adr32_if() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38927,7 +38927,7 @@ void m68000_device::move_b_das_adr32_if() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39024,7 +39024,7 @@ void m68000_device::move_b_dais_adr32_if() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39086,7 +39086,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39108,7 +39108,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39230,7 +39230,7 @@ void m68000_device::move_b_adr16_adr32_if() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39250,7 +39250,7 @@ void m68000_device::move_b_adr16_adr32_if() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39393,7 +39393,7 @@ void m68000_device::move_b_adr32_adr32_if() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39413,7 +39413,7 @@ void m68000_device::move_b_adr32_adr32_if() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39533,7 +39533,7 @@ void m68000_device::move_b_dpc_adr32_if() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39555,7 +39555,7 @@ void m68000_device::move_b_dpc_adr32_if() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39651,7 +39651,7 @@ void m68000_device::move_b_dpc_adr32_if() // 13fa ffff
void m68000_device::move_b_dpci_adr32_if() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39713,7 +39713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39735,7 +39735,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39880,7 +39880,7 @@ void m68000_device::move_b_imm8_adr32_if() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39963,13 +39963,13 @@ void m68000_device::move_l_ds_dd_if() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -40008,14 +40008,14 @@ void m68000_device::move_l_as_dd_if() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40050,7 +40050,7 @@ void m68000_device::move_l_ais_dd_if() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40098,14 +40098,14 @@ void m68000_device::move_l_ais_dd_if() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40140,7 +40140,7 @@ void m68000_device::move_l_aips_dd_if() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40191,14 +40191,14 @@ void m68000_device::move_l_aips_dd_if() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68000_device::move_l_pais_dd_if() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -40285,14 +40285,14 @@ void m68000_device::move_l_pais_dd_if() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40348,7 +40348,7 @@ void m68000_device::move_l_das_dd_if() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40396,14 +40396,14 @@ void m68000_device::move_l_das_dd_if() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40436,7 +40436,7 @@ void m68000_device::move_l_dais_dd_if() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -40497,7 +40497,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40545,14 +40545,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40610,7 +40610,7 @@ void m68000_device::move_l_adr16_dd_if() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40658,14 +40658,14 @@ void m68000_device::move_l_adr16_dd_if() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40744,7 +40744,7 @@ void m68000_device::move_l_adr32_dd_if() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40792,14 +40792,14 @@ void m68000_device::move_l_adr32_dd_if() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40854,7 +40854,7 @@ void m68000_device::move_l_dpc_dd_if() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -40902,14 +40902,14 @@ void m68000_device::move_l_dpc_dd_if() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40941,7 +40941,7 @@ void m68000_device::move_l_dpci_dd_if() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41002,7 +41002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41050,14 +41050,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41139,14 +41139,14 @@ void m68000_device::move_l_imm32_dd_if() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41184,13 +41184,13 @@ void m68000_device::movea_l_ds_ad_if() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41227,12 +41227,12 @@ void m68000_device::movea_l_as_ad_if() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41267,7 +41267,7 @@ void m68000_device::movea_l_ais_ad_if() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41315,13 +41315,13 @@ void m68000_device::movea_l_ais_ad_if() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41355,7 +41355,7 @@ void m68000_device::movea_l_aips_ad_if() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41406,13 +41406,13 @@ void m68000_device::movea_l_aips_ad_if() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41445,7 +41445,7 @@ void m68000_device::movea_l_pais_ad_if() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -41498,13 +41498,13 @@ void m68000_device::movea_l_pais_ad_if() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41559,7 +41559,7 @@ void m68000_device::movea_l_das_ad_if() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41607,13 +41607,13 @@ void m68000_device::movea_l_das_ad_if() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41645,7 +41645,7 @@ void m68000_device::movea_l_dais_ad_if() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41706,7 +41706,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41754,13 +41754,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41817,7 +41817,7 @@ void m68000_device::movea_l_adr16_ad_if() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41865,13 +41865,13 @@ void m68000_device::movea_l_adr16_ad_if() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41949,7 +41949,7 @@ void m68000_device::movea_l_adr32_ad_if() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41997,13 +41997,13 @@ void m68000_device::movea_l_adr32_ad_if() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42057,7 +42057,7 @@ void m68000_device::movea_l_dpc_ad_if() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42105,13 +42105,13 @@ void m68000_device::movea_l_dpc_ad_if() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42142,7 +42142,7 @@ void m68000_device::movea_l_dpci_ad_if() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -42203,7 +42203,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42251,13 +42251,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42338,13 +42338,13 @@ void m68000_device::movea_l_imm32_ad_if() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42402,7 +42402,7 @@ void m68000_device::move_l_ds_aid_if() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42427,7 +42427,7 @@ void m68000_device::move_l_ds_aid_if() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42486,7 +42486,7 @@ void m68000_device::move_l_as_aid_if() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42511,7 +42511,7 @@ void m68000_device::move_l_as_aid_if() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42546,7 +42546,7 @@ void m68000_device::move_l_ais_aid_if() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -42593,7 +42593,7 @@ void m68000_device::move_l_ais_aid_if() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42617,7 +42617,7 @@ void m68000_device::move_l_ais_aid_if() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42675,7 +42675,7 @@ void m68000_device::move_l_aips_aid_if() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -42725,7 +42725,7 @@ void m68000_device::move_l_aips_aid_if() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42749,7 +42749,7 @@ void m68000_device::move_l_aips_aid_if() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42806,7 +42806,7 @@ void m68000_device::move_l_pais_aid_if() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -42858,7 +42858,7 @@ void m68000_device::move_l_pais_aid_if() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42882,7 +42882,7 @@ void m68000_device::move_l_pais_aid_if() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42961,7 +42961,7 @@ void m68000_device::move_l_das_aid_if() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43008,7 +43008,7 @@ void m68000_device::move_l_das_aid_if() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43032,7 +43032,7 @@ void m68000_device::move_l_das_aid_if() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43088,7 +43088,7 @@ void m68000_device::move_l_dais_aid_if() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43149,7 +43149,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43196,7 +43196,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43220,7 +43220,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43301,7 +43301,7 @@ void m68000_device::move_l_adr16_aid_if() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43348,7 +43348,7 @@ void m68000_device::move_l_adr16_aid_if() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43372,7 +43372,7 @@ void m68000_device::move_l_adr16_aid_if() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43474,7 +43474,7 @@ void m68000_device::move_l_adr32_aid_if() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43521,7 +43521,7 @@ void m68000_device::move_l_adr32_aid_if() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43545,7 +43545,7 @@ void m68000_device::move_l_adr32_aid_if() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43623,7 +43623,7 @@ void m68000_device::move_l_dpc_aid_if() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -43670,7 +43670,7 @@ void m68000_device::move_l_dpc_aid_if() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43694,7 +43694,7 @@ void m68000_device::move_l_dpc_aid_if() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43749,7 +43749,7 @@ void m68000_device::move_l_dpci_aid_if() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43810,7 +43810,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -43857,7 +43857,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43881,7 +43881,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44007,7 +44007,7 @@ void m68000_device::move_l_imm32_aid_if() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44032,7 +44032,7 @@ void m68000_device::move_l_imm32_aid_if() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44091,7 +44091,7 @@ void m68000_device::move_l_ds_aipd_if() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44116,7 +44116,7 @@ void m68000_device::move_l_ds_aipd_if() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44175,7 +44175,7 @@ void m68000_device::move_l_as_aipd_if() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44200,7 +44200,7 @@ void m68000_device::move_l_as_aipd_if() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44235,7 +44235,7 @@ void m68000_device::move_l_ais_aipd_if() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44282,7 +44282,7 @@ void m68000_device::move_l_ais_aipd_if() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44306,7 +44306,7 @@ void m68000_device::move_l_ais_aipd_if() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44363,7 +44363,7 @@ void m68000_device::move_l_aips_aipd_if() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44413,7 +44413,7 @@ void m68000_device::move_l_aips_aipd_if() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44437,7 +44437,7 @@ void m68000_device::move_l_aips_aipd_if() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44493,7 +44493,7 @@ void m68000_device::move_l_pais_aipd_if() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -44545,7 +44545,7 @@ void m68000_device::move_l_pais_aipd_if() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44569,7 +44569,7 @@ void m68000_device::move_l_pais_aipd_if() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44647,7 +44647,7 @@ void m68000_device::move_l_das_aipd_if() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44694,7 +44694,7 @@ void m68000_device::move_l_das_aipd_if() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44718,7 +44718,7 @@ void m68000_device::move_l_das_aipd_if() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44773,7 +44773,7 @@ void m68000_device::move_l_dais_aipd_if() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44834,7 +44834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44881,7 +44881,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44905,7 +44905,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44985,7 +44985,7 @@ void m68000_device::move_l_adr16_aipd_if() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45032,7 +45032,7 @@ void m68000_device::move_l_adr16_aipd_if() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45056,7 +45056,7 @@ void m68000_device::move_l_adr16_aipd_if() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45157,7 +45157,7 @@ void m68000_device::move_l_adr32_aipd_if() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45204,7 +45204,7 @@ void m68000_device::move_l_adr32_aipd_if() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45228,7 +45228,7 @@ void m68000_device::move_l_adr32_aipd_if() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45305,7 +45305,7 @@ void m68000_device::move_l_dpc_aipd_if() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -45352,7 +45352,7 @@ void m68000_device::move_l_dpc_aipd_if() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45376,7 +45376,7 @@ void m68000_device::move_l_dpc_aipd_if() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45430,7 +45430,7 @@ void m68000_device::move_l_dpci_aipd_if() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -45491,7 +45491,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -45538,7 +45538,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45562,7 +45562,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45687,7 +45687,7 @@ void m68000_device::move_l_imm32_aipd_if() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45712,7 +45712,7 @@ void m68000_device::move_l_imm32_aipd_if() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45749,7 +45749,7 @@ void m68000_device::move_l_ds_paid_if() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45774,7 +45774,7 @@ void m68000_device::move_l_ds_paid_if() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45832,7 +45832,7 @@ void m68000_device::move_l_as_paid_if() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45857,7 +45857,7 @@ void m68000_device::move_l_as_paid_if() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45913,7 +45913,7 @@ void m68000_device::move_l_ais_paid_if() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45960,7 +45960,7 @@ void m68000_device::move_l_ais_paid_if() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45985,7 +45985,7 @@ void m68000_device::move_l_ais_paid_if() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46041,7 +46041,7 @@ void m68000_device::move_l_aips_paid_if() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46091,7 +46091,7 @@ void m68000_device::move_l_aips_paid_if() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46116,7 +46116,7 @@ void m68000_device::move_l_aips_paid_if() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46171,7 +46171,7 @@ void m68000_device::move_l_pais_paid_if() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -46223,7 +46223,7 @@ void m68000_device::move_l_pais_paid_if() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46248,7 +46248,7 @@ void m68000_device::move_l_pais_paid_if() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46325,7 +46325,7 @@ void m68000_device::move_l_das_paid_if() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46372,7 +46372,7 @@ void m68000_device::move_l_das_paid_if() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46397,7 +46397,7 @@ void m68000_device::move_l_das_paid_if() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46451,7 +46451,7 @@ void m68000_device::move_l_dais_paid_if() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46512,7 +46512,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46559,7 +46559,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46584,7 +46584,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46663,7 +46663,7 @@ void m68000_device::move_l_adr16_paid_if() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46710,7 +46710,7 @@ void m68000_device::move_l_adr16_paid_if() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46735,7 +46735,7 @@ void m68000_device::move_l_adr16_paid_if() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46835,7 +46835,7 @@ void m68000_device::move_l_adr32_paid_if() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46882,7 +46882,7 @@ void m68000_device::move_l_adr32_paid_if() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46907,7 +46907,7 @@ void m68000_device::move_l_adr32_paid_if() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46983,7 +46983,7 @@ void m68000_device::move_l_dpc_paid_if() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -47030,7 +47030,7 @@ void m68000_device::move_l_dpc_paid_if() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47055,7 +47055,7 @@ void m68000_device::move_l_dpc_paid_if() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47108,7 +47108,7 @@ void m68000_device::move_l_dpci_paid_if() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47169,7 +47169,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -47216,7 +47216,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47241,7 +47241,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47343,7 +47343,7 @@ void m68000_device::move_l_imm32_paid_if() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47368,7 +47368,7 @@ void m68000_device::move_l_imm32_paid_if() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47447,7 +47447,7 @@ void m68000_device::move_l_ds_dad_if() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47471,7 +47471,7 @@ void m68000_device::move_l_ds_dad_if() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47496,7 +47496,7 @@ void m68000_device::move_l_ds_dad_if() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47554,7 +47554,7 @@ void m68000_device::move_l_as_dad_if() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47578,7 +47578,7 @@ void m68000_device::move_l_as_dad_if() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47603,7 +47603,7 @@ void m68000_device::move_l_as_dad_if() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47638,7 +47638,7 @@ void m68000_device::move_l_ais_dad_if() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -47684,7 +47684,7 @@ void m68000_device::move_l_ais_dad_if() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47709,7 +47709,7 @@ void m68000_device::move_l_ais_dad_if() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47793,7 +47793,7 @@ void m68000_device::move_l_aips_dad_if() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -47842,7 +47842,7 @@ void m68000_device::move_l_aips_dad_if() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47867,7 +47867,7 @@ void m68000_device::move_l_aips_dad_if() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47950,7 +47950,7 @@ void m68000_device::move_l_pais_dad_if() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48001,7 +48001,7 @@ void m68000_device::move_l_pais_dad_if() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48026,7 +48026,7 @@ void m68000_device::move_l_pais_dad_if() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48131,7 +48131,7 @@ void m68000_device::move_l_das_dad_if() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48177,7 +48177,7 @@ void m68000_device::move_l_das_dad_if() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48202,7 +48202,7 @@ void m68000_device::move_l_das_dad_if() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48284,7 +48284,7 @@ void m68000_device::move_l_dais_dad_if() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -48345,7 +48345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48391,7 +48391,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48416,7 +48416,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48523,7 +48523,7 @@ void m68000_device::move_l_adr16_dad_if() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48569,7 +48569,7 @@ void m68000_device::move_l_adr16_dad_if() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48594,7 +48594,7 @@ void m68000_device::move_l_adr16_dad_if() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48722,7 +48722,7 @@ void m68000_device::move_l_adr32_dad_if() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48768,7 +48768,7 @@ void m68000_device::move_l_adr32_dad_if() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48793,7 +48793,7 @@ void m68000_device::move_l_adr32_dad_if() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48897,7 +48897,7 @@ void m68000_device::move_l_dpc_dad_if() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -48943,7 +48943,7 @@ void m68000_device::move_l_dpc_dad_if() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48968,7 +48968,7 @@ void m68000_device::move_l_dpc_dad_if() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49049,7 +49049,7 @@ void m68000_device::move_l_dpci_dad_if() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49110,7 +49110,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -49156,7 +49156,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49181,7 +49181,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49332,7 +49332,7 @@ void m68000_device::move_l_imm32_dad_if() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49356,7 +49356,7 @@ void m68000_device::move_l_imm32_dad_if() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49381,7 +49381,7 @@ void m68000_device::move_l_imm32_dad_if() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49414,7 +49414,7 @@ void m68000_device::move_l_ds_daid_if() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49478,7 +49478,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49502,7 +49502,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49527,7 +49527,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49560,7 +49560,7 @@ void m68000_device::move_l_as_daid_if() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49624,7 +49624,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49648,7 +49648,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49673,7 +49673,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49708,7 +49708,7 @@ void m68000_device::move_l_ais_daid_if() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -49751,7 +49751,7 @@ void m68000_device::move_l_ais_daid_if() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49766,7 +49766,7 @@ void m68000_device::move_l_ais_daid_if() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49790,7 +49790,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49817,7 +49817,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49901,7 +49901,7 @@ void m68000_device::move_l_aips_daid_if() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -49947,7 +49947,7 @@ void m68000_device::move_l_aips_daid_if() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49962,7 +49962,7 @@ void m68000_device::move_l_aips_daid_if() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49986,7 +49986,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50013,7 +50013,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50096,7 +50096,7 @@ void m68000_device::move_l_pais_daid_if() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50144,7 +50144,7 @@ void m68000_device::move_l_pais_daid_if() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50159,7 +50159,7 @@ void m68000_device::move_l_pais_daid_if() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50183,7 +50183,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50210,7 +50210,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50315,7 +50315,7 @@ void m68000_device::move_l_das_daid_if() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50358,7 +50358,7 @@ void m68000_device::move_l_das_daid_if() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50373,7 +50373,7 @@ void m68000_device::move_l_das_daid_if() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50397,7 +50397,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50424,7 +50424,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50506,7 +50506,7 @@ void m68000_device::move_l_dais_daid_if() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50567,7 +50567,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50610,7 +50610,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50625,7 +50625,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50649,7 +50649,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50676,7 +50676,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50783,7 +50783,7 @@ void m68000_device::move_l_adr16_daid_if() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50826,7 +50826,7 @@ void m68000_device::move_l_adr16_daid_if() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50841,7 +50841,7 @@ void m68000_device::move_l_adr16_daid_if() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50865,7 +50865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50892,7 +50892,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51020,7 +51020,7 @@ void m68000_device::move_l_adr32_daid_if() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -51063,7 +51063,7 @@ void m68000_device::move_l_adr32_daid_if() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51078,7 +51078,7 @@ void m68000_device::move_l_adr32_daid_if() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51102,7 +51102,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51129,7 +51129,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51233,7 +51233,7 @@ void m68000_device::move_l_dpc_daid_if() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -51276,7 +51276,7 @@ void m68000_device::move_l_dpc_daid_if() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51291,7 +51291,7 @@ void m68000_device::move_l_dpc_daid_if() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51315,7 +51315,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51342,7 +51342,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51423,7 +51423,7 @@ void m68000_device::move_l_dpci_daid_if() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51484,7 +51484,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -51527,7 +51527,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51542,7 +51542,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51566,7 +51566,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51593,7 +51593,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51719,7 +51719,7 @@ void m68000_device::move_l_imm32_daid_if() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -51783,7 +51783,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51807,7 +51807,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51832,7 +51832,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51868,7 +51868,7 @@ void m68000_device::move_l_ds_adr16_if() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51893,7 +51893,7 @@ void m68000_device::move_l_ds_adr16_if() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51978,7 +51978,7 @@ void m68000_device::move_l_as_adr16_if() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52003,7 +52003,7 @@ void m68000_device::move_l_as_adr16_if() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52086,7 +52086,7 @@ void m68000_device::move_l_ais_adr16_if() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52132,7 +52132,7 @@ void m68000_device::move_l_ais_adr16_if() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52157,7 +52157,7 @@ void m68000_device::move_l_ais_adr16_if() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52240,7 +52240,7 @@ void m68000_device::move_l_aips_adr16_if() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52289,7 +52289,7 @@ void m68000_device::move_l_aips_adr16_if() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_device::move_l_aips_adr16_if() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52396,7 +52396,7 @@ void m68000_device::move_l_pais_adr16_if() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52447,7 +52447,7 @@ void m68000_device::move_l_pais_adr16_if() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52472,7 +52472,7 @@ void m68000_device::move_l_pais_adr16_if() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52576,7 +52576,7 @@ void m68000_device::move_l_das_adr16_if() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52622,7 +52622,7 @@ void m68000_device::move_l_das_adr16_if() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52647,7 +52647,7 @@ void m68000_device::move_l_das_adr16_if() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52728,7 +52728,7 @@ void m68000_device::move_l_dais_adr16_if() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52789,7 +52789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52835,7 +52835,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52860,7 +52860,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52966,7 +52966,7 @@ void m68000_device::move_l_adr16_adr16_if() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -53012,7 +53012,7 @@ void m68000_device::move_l_adr16_adr16_if() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53037,7 +53037,7 @@ void m68000_device::move_l_adr16_adr16_if() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53164,7 +53164,7 @@ void m68000_device::move_l_adr32_adr16_if() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -53210,7 +53210,7 @@ void m68000_device::move_l_adr32_adr16_if() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53235,7 +53235,7 @@ void m68000_device::move_l_adr32_adr16_if() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53338,7 +53338,7 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -53384,7 +53384,7 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53409,7 +53409,7 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53489,7 +53489,7 @@ void m68000_device::move_l_dpc_adr16_if() // 21fa ffff
void m68000_device::move_l_dpci_adr16_if() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53550,7 +53550,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -53596,7 +53596,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53621,7 +53621,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53750,7 +53750,7 @@ void m68000_device::move_l_imm32_adr16_if() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53775,7 +53775,7 @@ void m68000_device::move_l_imm32_adr16_if() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53881,7 +53881,7 @@ void m68000_device::move_l_ds_adr32_if() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53906,7 +53906,7 @@ void m68000_device::move_l_ds_adr32_if() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54012,7 +54012,7 @@ void m68000_device::move_l_as_adr32_if() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54037,7 +54037,7 @@ void m68000_device::move_l_as_adr32_if() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54120,7 +54120,7 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54167,7 +54167,7 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54190,7 +54190,7 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54214,7 +54214,7 @@ void m68000_device::move_l_ais_adr32_if() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54296,7 +54296,7 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54346,7 +54346,7 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54369,7 +54369,7 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54393,7 +54393,7 @@ void m68000_device::move_l_aips_adr32_if() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54474,7 +54474,7 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54526,7 +54526,7 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54549,7 +54549,7 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54573,7 +54573,7 @@ void m68000_device::move_l_pais_adr32_if() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54676,7 +54676,7 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54723,7 +54723,7 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54746,7 +54746,7 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54770,7 +54770,7 @@ void m68000_device::move_l_das_adr32_if() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54850,7 +54850,7 @@ void m68000_device::move_l_dais_adr32_if() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54911,7 +54911,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54958,7 +54958,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54981,7 +54981,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55005,7 +55005,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55110,7 +55110,7 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -55157,7 +55157,7 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55180,7 +55180,7 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55204,7 +55204,7 @@ void m68000_device::move_l_adr16_adr32_if() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55330,7 +55330,7 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -55377,7 +55377,7 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55400,7 +55400,7 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55424,7 +55424,7 @@ void m68000_device::move_l_adr32_adr32_if() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55526,7 +55526,7 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55573,7 +55573,7 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55596,7 +55596,7 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55620,7 +55620,7 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55699,7 +55699,7 @@ void m68000_device::move_l_dpc_adr32_if() // 23fa ffff
void m68000_device::move_l_dpci_adr32_if() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55760,7 +55760,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55807,7 +55807,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55830,7 +55830,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55854,7 +55854,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56003,7 +56003,7 @@ void m68000_device::move_l_imm32_adr32_if() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56028,7 +56028,7 @@ void m68000_device::move_l_imm32_adr32_if() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56115,7 +56115,7 @@ void m68000_device::move_w_ds_dd_if() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56158,7 +56158,7 @@ void m68000_device::move_w_as_dd_if() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56198,7 +56198,7 @@ void m68000_device::move_w_ais_dd_if() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56225,7 +56225,7 @@ void m68000_device::move_w_ais_dd_if() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56269,7 +56269,7 @@ void m68000_device::move_w_aips_dd_if() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56294,7 +56294,7 @@ void m68000_device::move_w_aips_dd_if() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56340,7 +56340,7 @@ void m68000_device::move_w_pais_dd_if() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56365,7 +56365,7 @@ void m68000_device::move_w_pais_dd_if() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56425,7 +56425,7 @@ void m68000_device::move_w_das_dd_if() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56452,7 +56452,7 @@ void m68000_device::move_w_das_dd_if() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56488,7 +56488,7 @@ void m68000_device::move_w_dais_dd_if() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56550,7 +56550,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56577,7 +56577,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56638,7 +56638,7 @@ void m68000_device::move_w_adr16_dd_if() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56663,7 +56663,7 @@ void m68000_device::move_w_adr16_dd_if() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56745,7 +56745,7 @@ void m68000_device::move_w_adr32_dd_if() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56770,7 +56770,7 @@ void m68000_device::move_w_adr32_dd_if() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56829,7 +56829,7 @@ void m68000_device::move_w_dpc_dd_if() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56856,7 +56856,7 @@ void m68000_device::move_w_dpc_dd_if() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56891,7 +56891,7 @@ void m68000_device::move_w_dpci_dd_if() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56953,7 +56953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56980,7 +56980,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -57044,7 +57044,7 @@ void m68000_device::move_w_imm16_dd_if() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -57091,7 +57091,7 @@ void m68000_device::movea_w_ds_ad_if() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -57131,7 +57131,7 @@ void m68000_device::movea_w_as_ad_if() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57166,7 +57166,7 @@ void m68000_device::movea_w_ais_ad_if() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57234,7 +57234,7 @@ void m68000_device::movea_w_aips_ad_if() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57302,7 +57302,7 @@ void m68000_device::movea_w_pais_ad_if() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57384,7 +57384,7 @@ void m68000_device::movea_w_das_ad_if() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57444,7 +57444,7 @@ void m68000_device::movea_w_dais_ad_if() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57506,7 +57506,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57591,7 +57591,7 @@ void m68000_device::movea_w_adr16_ad_if() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57695,7 +57695,7 @@ void m68000_device::movea_w_adr32_ad_if() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57776,7 +57776,7 @@ void m68000_device::movea_w_dpc_ad_if() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57835,7 +57835,7 @@ void m68000_device::movea_w_dpci_ad_if() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57897,7 +57897,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57989,7 +57989,7 @@ void m68000_device::movea_w_imm16_ad_if() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -58026,7 +58026,7 @@ void m68000_device::move_w_ds_aid_if() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58087,7 +58087,7 @@ void m68000_device::move_w_as_aid_if() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58145,7 +58145,7 @@ void m68000_device::move_w_ais_aid_if() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58171,7 +58171,7 @@ void m68000_device::move_w_ais_aid_if() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58235,7 +58235,7 @@ void m68000_device::move_w_aips_aid_if() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58259,7 +58259,7 @@ void m68000_device::move_w_aips_aid_if() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58325,7 +58325,7 @@ void m68000_device::move_w_pais_aid_if() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58349,7 +58349,7 @@ void m68000_device::move_w_pais_aid_if() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58429,7 +58429,7 @@ void m68000_device::move_w_das_aid_if() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58455,7 +58455,7 @@ void m68000_device::move_w_das_aid_if() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58511,7 +58511,7 @@ void m68000_device::move_w_dais_aid_if() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58573,7 +58573,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58599,7 +58599,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58680,7 +58680,7 @@ void m68000_device::move_w_adr16_aid_if() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58704,7 +58704,7 @@ void m68000_device::move_w_adr16_aid_if() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58806,7 +58806,7 @@ void m68000_device::move_w_adr32_aid_if() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58830,7 +58830,7 @@ void m68000_device::move_w_adr32_aid_if() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58909,7 +58909,7 @@ void m68000_device::move_w_dpc_aid_if() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58935,7 +58935,7 @@ void m68000_device::move_w_dpc_aid_if() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58990,7 +58990,7 @@ void m68000_device::move_w_dpci_aid_if() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59052,7 +59052,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59078,7 +59078,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59162,7 +59162,7 @@ void m68000_device::move_w_imm16_aid_if() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59223,7 +59223,7 @@ void m68000_device::move_w_ds_aipd_if() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59283,7 +59283,7 @@ void m68000_device::move_w_as_aipd_if() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59340,7 +59340,7 @@ void m68000_device::move_w_ais_aipd_if() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59367,7 +59367,7 @@ void m68000_device::move_w_ais_aipd_if() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59430,7 +59430,7 @@ void m68000_device::move_w_aips_aipd_if() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59455,7 +59455,7 @@ void m68000_device::move_w_aips_aipd_if() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59520,7 +59520,7 @@ void m68000_device::move_w_pais_aipd_if() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59545,7 +59545,7 @@ void m68000_device::move_w_pais_aipd_if() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59624,7 +59624,7 @@ void m68000_device::move_w_das_aipd_if() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59651,7 +59651,7 @@ void m68000_device::move_w_das_aipd_if() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59706,7 +59706,7 @@ void m68000_device::move_w_dais_aipd_if() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59768,7 +59768,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59795,7 +59795,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59875,7 +59875,7 @@ void m68000_device::move_w_adr16_aipd_if() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59900,7 +59900,7 @@ void m68000_device::move_w_adr16_aipd_if() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60001,7 +60001,7 @@ void m68000_device::move_w_adr32_aipd_if() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60026,7 +60026,7 @@ void m68000_device::move_w_adr32_aipd_if() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60104,7 +60104,7 @@ void m68000_device::move_w_dpc_aipd_if() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60131,7 +60131,7 @@ void m68000_device::move_w_dpc_aipd_if() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60185,7 +60185,7 @@ void m68000_device::move_w_dpci_aipd_if() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60247,7 +60247,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60274,7 +60274,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60357,7 +60357,7 @@ void m68000_device::move_w_imm16_aipd_if() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60416,7 +60416,7 @@ void m68000_device::move_w_ds_paid_if() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60476,7 +60476,7 @@ void m68000_device::move_w_as_paid_if() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60534,7 +60534,7 @@ void m68000_device::move_w_ais_paid_if() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60560,7 +60560,7 @@ void m68000_device::move_w_ais_paid_if() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60624,7 +60624,7 @@ void m68000_device::move_w_aips_paid_if() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60648,7 +60648,7 @@ void m68000_device::move_w_aips_paid_if() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60714,7 +60714,7 @@ void m68000_device::move_w_pais_paid_if() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60738,7 +60738,7 @@ void m68000_device::move_w_pais_paid_if() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60818,7 +60818,7 @@ void m68000_device::move_w_das_paid_if() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60844,7 +60844,7 @@ void m68000_device::move_w_das_paid_if() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60900,7 +60900,7 @@ void m68000_device::move_w_dais_paid_if() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60962,7 +60962,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60988,7 +60988,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61069,7 +61069,7 @@ void m68000_device::move_w_adr16_paid_if() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61093,7 +61093,7 @@ void m68000_device::move_w_adr16_paid_if() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61195,7 +61195,7 @@ void m68000_device::move_w_adr32_paid_if() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61219,7 +61219,7 @@ void m68000_device::move_w_adr32_paid_if() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61298,7 +61298,7 @@ void m68000_device::move_w_dpc_paid_if() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61324,7 +61324,7 @@ void m68000_device::move_w_dpc_paid_if() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61379,7 +61379,7 @@ void m68000_device::move_w_dpci_paid_if() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -61441,7 +61441,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61467,7 +61467,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61550,7 +61550,7 @@ void m68000_device::move_w_imm16_paid_if() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61631,7 +61631,7 @@ void m68000_device::move_w_ds_dad_if() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61713,7 +61713,7 @@ void m68000_device::move_w_as_dad_if() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61772,7 +61772,7 @@ void m68000_device::move_w_ais_dad_if() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61797,7 +61797,7 @@ void m68000_device::move_w_ais_dad_if() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61888,7 +61888,7 @@ void m68000_device::move_w_aips_dad_if() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61911,7 +61911,7 @@ void m68000_device::move_w_aips_dad_if() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62004,7 +62004,7 @@ void m68000_device::move_w_pais_dad_if() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62027,7 +62027,7 @@ void m68000_device::move_w_pais_dad_if() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62134,7 +62134,7 @@ void m68000_device::move_w_das_dad_if() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62159,7 +62159,7 @@ void m68000_device::move_w_das_dad_if() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62242,7 +62242,7 @@ void m68000_device::move_w_dais_dad_if() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62304,7 +62304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62329,7 +62329,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62437,7 +62437,7 @@ void m68000_device::move_w_adr16_dad_if() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62460,7 +62460,7 @@ void m68000_device::move_w_adr16_dad_if() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62589,7 +62589,7 @@ void m68000_device::move_w_adr32_dad_if() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62612,7 +62612,7 @@ void m68000_device::move_w_adr32_dad_if() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62718,7 +62718,7 @@ void m68000_device::move_w_dpc_dad_if() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62743,7 +62743,7 @@ void m68000_device::move_w_dpc_dad_if() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62825,7 +62825,7 @@ void m68000_device::move_w_dpci_dad_if() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62887,7 +62887,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62912,7 +62912,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63043,7 +63043,7 @@ void m68000_device::move_w_imm16_dad_if() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63100,7 +63100,7 @@ void m68000_device::move_w_ds_daid_if() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63164,7 +63164,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63221,7 +63221,7 @@ void m68000_device::move_w_as_daid_if() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63285,7 +63285,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63344,7 +63344,7 @@ void m68000_device::move_w_ais_daid_if() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63366,7 +63366,7 @@ void m68000_device::move_w_ais_daid_if() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63381,7 +63381,7 @@ void m68000_device::move_w_ais_daid_if() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63405,7 +63405,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63498,7 +63498,7 @@ void m68000_device::move_w_aips_daid_if() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -63518,7 +63518,7 @@ void m68000_device::move_w_aips_daid_if() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63533,7 +63533,7 @@ void m68000_device::move_w_aips_daid_if() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63557,7 +63557,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63652,7 +63652,7 @@ void m68000_device::move_w_pais_daid_if() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -63672,7 +63672,7 @@ void m68000_device::move_w_pais_daid_if() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63687,7 +63687,7 @@ void m68000_device::move_w_pais_daid_if() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63711,7 +63711,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63820,7 +63820,7 @@ void m68000_device::move_w_das_daid_if() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63842,7 +63842,7 @@ void m68000_device::move_w_das_daid_if() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63857,7 +63857,7 @@ void m68000_device::move_w_das_daid_if() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63881,7 +63881,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63966,7 +63966,7 @@ void m68000_device::move_w_dais_daid_if() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64028,7 +64028,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64050,7 +64050,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64065,7 +64065,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64089,7 +64089,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64199,7 +64199,7 @@ void m68000_device::move_w_adr16_daid_if() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -64219,7 +64219,7 @@ void m68000_device::move_w_adr16_daid_if() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64234,7 +64234,7 @@ void m68000_device::move_w_adr16_daid_if() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64258,7 +64258,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64389,7 +64389,7 @@ void m68000_device::move_w_adr32_daid_if() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -64409,7 +64409,7 @@ void m68000_device::move_w_adr32_daid_if() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64424,7 +64424,7 @@ void m68000_device::move_w_adr32_daid_if() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64448,7 +64448,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64556,7 +64556,7 @@ void m68000_device::move_w_dpc_daid_if() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64578,7 +64578,7 @@ void m68000_device::move_w_dpc_daid_if() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64593,7 +64593,7 @@ void m68000_device::move_w_dpc_daid_if() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64617,7 +64617,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64701,7 +64701,7 @@ void m68000_device::move_w_dpci_daid_if() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64763,7 +64763,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64785,7 +64785,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64800,7 +64800,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64824,7 +64824,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64932,7 +64932,7 @@ void m68000_device::move_w_imm16_daid_if() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -64996,7 +64996,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65056,7 +65056,7 @@ void m68000_device::move_w_ds_adr16_if() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65142,7 +65142,7 @@ void m68000_device::move_w_as_adr16_if() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65226,7 +65226,7 @@ void m68000_device::move_w_ais_adr16_if() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65251,7 +65251,7 @@ void m68000_device::move_w_ais_adr16_if() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65341,7 +65341,7 @@ void m68000_device::move_w_aips_adr16_if() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65364,7 +65364,7 @@ void m68000_device::move_w_aips_adr16_if() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65456,7 +65456,7 @@ void m68000_device::move_w_pais_adr16_if() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65479,7 +65479,7 @@ void m68000_device::move_w_pais_adr16_if() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65585,7 +65585,7 @@ void m68000_device::move_w_das_adr16_if() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65610,7 +65610,7 @@ void m68000_device::move_w_das_adr16_if() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65692,7 +65692,7 @@ void m68000_device::move_w_dais_adr16_if() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65754,7 +65754,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65779,7 +65779,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65886,7 +65886,7 @@ void m68000_device::move_w_adr16_adr16_if() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65909,7 +65909,7 @@ void m68000_device::move_w_adr16_adr16_if() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66037,7 +66037,7 @@ void m68000_device::move_w_adr32_adr16_if() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -66060,7 +66060,7 @@ void m68000_device::move_w_adr32_adr16_if() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66165,7 +66165,7 @@ void m68000_device::move_w_dpc_adr16_if() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66190,7 +66190,7 @@ void m68000_device::move_w_dpc_adr16_if() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66271,7 +66271,7 @@ void m68000_device::move_w_dpc_adr16_if() // 31fa ffff
void m68000_device::move_w_dpci_adr16_if() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66333,7 +66333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66358,7 +66358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66467,7 +66467,7 @@ void m68000_device::move_w_imm16_adr16_if() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66574,7 +66574,7 @@ void m68000_device::move_w_ds_adr32_if() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66681,7 +66681,7 @@ void m68000_device::move_w_as_adr32_if() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66765,7 +66765,7 @@ void m68000_device::move_w_ais_adr32_if() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66790,7 +66790,7 @@ void m68000_device::move_w_ais_adr32_if() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66900,7 +66900,7 @@ void m68000_device::move_w_aips_adr32_if() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -66923,7 +66923,7 @@ void m68000_device::move_w_aips_adr32_if() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67035,7 +67035,7 @@ void m68000_device::move_w_pais_adr32_if() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67058,7 +67058,7 @@ void m68000_device::move_w_pais_adr32_if() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67184,7 +67184,7 @@ void m68000_device::move_w_das_adr32_if() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67209,7 +67209,7 @@ void m68000_device::move_w_das_adr32_if() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67311,7 +67311,7 @@ void m68000_device::move_w_dais_adr32_if() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67373,7 +67373,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67398,7 +67398,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67525,7 +67525,7 @@ void m68000_device::move_w_adr16_adr32_if() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67548,7 +67548,7 @@ void m68000_device::move_w_adr16_adr32_if() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67696,7 +67696,7 @@ void m68000_device::move_w_adr32_adr32_if() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67719,7 +67719,7 @@ void m68000_device::move_w_adr32_adr32_if() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67844,7 +67844,7 @@ void m68000_device::move_w_dpc_adr32_if() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67869,7 +67869,7 @@ void m68000_device::move_w_dpc_adr32_if() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67970,7 +67970,7 @@ void m68000_device::move_w_dpc_adr32_if() // 33fa ffff
void m68000_device::move_w_dpci_adr32_if() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68032,7 +68032,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68057,7 +68057,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68207,7 +68207,7 @@ void m68000_device::move_w_imm16_adr32_if() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68293,7 +68293,7 @@ void m68000_device::negx_b_ds_if() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -68332,7 +68332,7 @@ void m68000_device::negx_b_ais_if() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68355,7 +68355,7 @@ void m68000_device::negx_b_ais_if() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68412,7 +68412,7 @@ void m68000_device::negx_b_aips_if() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68433,7 +68433,7 @@ void m68000_device::negx_b_aips_if() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68492,7 +68492,7 @@ void m68000_device::negx_b_pais_if() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68513,7 +68513,7 @@ void m68000_device::negx_b_pais_if() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68586,7 +68586,7 @@ void m68000_device::negx_b_das_if() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68609,7 +68609,7 @@ void m68000_device::negx_b_das_if() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68658,7 +68658,7 @@ void m68000_device::negx_b_dais_if() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68720,7 +68720,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68743,7 +68743,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68817,7 +68817,7 @@ void m68000_device::negx_b_adr16_if() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68838,7 +68838,7 @@ void m68000_device::negx_b_adr16_if() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68933,7 +68933,7 @@ void m68000_device::negx_b_adr32_if() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68954,7 +68954,7 @@ void m68000_device::negx_b_adr32_if() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69007,7 +69007,7 @@ void m68000_device::negx_w_ds_if() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -69046,7 +69046,7 @@ void m68000_device::negx_w_ais_if() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69072,7 +69072,7 @@ void m68000_device::negx_w_ais_if() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69134,7 +69134,7 @@ void m68000_device::negx_w_aips_if() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69158,7 +69158,7 @@ void m68000_device::negx_w_aips_if() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69222,7 +69222,7 @@ void m68000_device::negx_w_pais_if() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69246,7 +69246,7 @@ void m68000_device::negx_w_pais_if() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69324,7 +69324,7 @@ void m68000_device::negx_w_das_if() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69350,7 +69350,7 @@ void m68000_device::negx_w_das_if() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69404,7 +69404,7 @@ void m68000_device::negx_w_dais_if() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69466,7 +69466,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69492,7 +69492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69571,7 +69571,7 @@ void m68000_device::negx_w_adr16_if() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69595,7 +69595,7 @@ void m68000_device::negx_w_adr16_if() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69695,7 +69695,7 @@ void m68000_device::negx_w_adr32_if() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69719,7 +69719,7 @@ void m68000_device::negx_w_adr32_if() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69777,12 +69777,12 @@ void m68000_device::negx_l_ds_if() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69822,7 +69822,7 @@ void m68000_device::negx_l_ais_if() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69869,7 +69869,7 @@ void m68000_device::negx_l_ais_if() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69894,7 +69894,7 @@ void m68000_device::negx_l_ais_if() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -69948,7 +69948,7 @@ void m68000_device::negx_l_aips_if() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69998,7 +69998,7 @@ void m68000_device::negx_l_aips_if() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70023,7 +70023,7 @@ void m68000_device::negx_l_aips_if() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70076,7 +70076,7 @@ void m68000_device::negx_l_pais_if() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -70128,7 +70128,7 @@ void m68000_device::negx_l_pais_if() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70153,7 +70153,7 @@ void m68000_device::negx_l_pais_if() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70228,7 +70228,7 @@ void m68000_device::negx_l_das_if() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70275,7 +70275,7 @@ void m68000_device::negx_l_das_if() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70300,7 +70300,7 @@ void m68000_device::negx_l_das_if() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70352,7 +70352,7 @@ void m68000_device::negx_l_dais_if() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70413,7 +70413,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70460,7 +70460,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70485,7 +70485,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70562,7 +70562,7 @@ void m68000_device::negx_l_adr16_if() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70609,7 +70609,7 @@ void m68000_device::negx_l_adr16_if() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70634,7 +70634,7 @@ void m68000_device::negx_l_adr16_if() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70732,7 +70732,7 @@ void m68000_device::negx_l_adr32_if() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70779,7 +70779,7 @@ void m68000_device::negx_l_adr32_if() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70804,7 +70804,7 @@ void m68000_device::negx_l_adr32_if() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70898,7 +70898,7 @@ void m68000_device::move_sr_ais_if() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -70926,7 +70926,7 @@ void m68000_device::move_sr_ais_if() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -70987,7 +70987,7 @@ void m68000_device::move_sr_aips_if() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71013,7 +71013,7 @@ void m68000_device::move_sr_aips_if() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71076,7 +71076,7 @@ void m68000_device::move_sr_pais_if() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71102,7 +71102,7 @@ void m68000_device::move_sr_pais_if() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71179,7 +71179,7 @@ void m68000_device::move_sr_das_if() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71207,7 +71207,7 @@ void m68000_device::move_sr_das_if() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71260,7 +71260,7 @@ void m68000_device::move_sr_dais_if() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71322,7 +71322,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71350,7 +71350,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71428,7 +71428,7 @@ void m68000_device::move_sr_adr16_if() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71454,7 +71454,7 @@ void m68000_device::move_sr_adr16_if() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71553,7 +71553,7 @@ void m68000_device::move_sr_adr32_if() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71579,7 +71579,7 @@ void m68000_device::move_sr_adr32_if() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71635,7 +71635,7 @@ void m68000_device::chk_w_ds_dd_if() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -71643,7 +71643,7 @@ void m68000_device::chk_w_ds_dd_if() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71661,14 +71661,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71693,7 +71693,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71716,7 +71716,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71855,7 +71855,7 @@ void m68000_device::chk_w_ais_dd_if() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -71879,7 +71879,7 @@ void m68000_device::chk_w_ais_dd_if() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -71887,7 +71887,7 @@ void m68000_device::chk_w_ais_dd_if() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71905,14 +71905,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71937,7 +71937,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71960,7 +71960,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72105,7 +72105,7 @@ void m68000_device::chk_w_aips_dd_if() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -72127,7 +72127,7 @@ void m68000_device::chk_w_aips_dd_if() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72135,7 +72135,7 @@ void m68000_device::chk_w_aips_dd_if() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72153,14 +72153,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72185,7 +72185,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72208,7 +72208,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72355,7 +72355,7 @@ void m68000_device::chk_w_pais_dd_if() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -72377,7 +72377,7 @@ void m68000_device::chk_w_pais_dd_if() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72385,7 +72385,7 @@ void m68000_device::chk_w_pais_dd_if() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72403,14 +72403,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72435,7 +72435,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72458,7 +72458,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72619,7 +72619,7 @@ void m68000_device::chk_w_das_dd_if() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72643,7 +72643,7 @@ void m68000_device::chk_w_das_dd_if() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72651,7 +72651,7 @@ void m68000_device::chk_w_das_dd_if() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72669,14 +72669,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72701,7 +72701,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72724,7 +72724,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72861,7 +72861,7 @@ void m68000_device::chk_w_dais_dd_if() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72923,7 +72923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72947,7 +72947,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72955,7 +72955,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72973,14 +72973,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73005,7 +73005,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73028,7 +73028,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73190,7 +73190,7 @@ void m68000_device::chk_w_adr16_dd_if() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -73212,7 +73212,7 @@ void m68000_device::chk_w_adr16_dd_if() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73220,7 +73220,7 @@ void m68000_device::chk_w_adr16_dd_if() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73238,14 +73238,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73270,7 +73270,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73293,7 +73293,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73476,7 +73476,7 @@ void m68000_device::chk_w_adr32_dd_if() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -73498,7 +73498,7 @@ void m68000_device::chk_w_adr32_dd_if() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73506,7 +73506,7 @@ void m68000_device::chk_w_adr32_dd_if() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73524,14 +73524,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73556,7 +73556,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73579,7 +73579,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73739,7 +73739,7 @@ void m68000_device::chk_w_dpc_dd_if() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73763,7 +73763,7 @@ void m68000_device::chk_w_dpc_dd_if() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73771,7 +73771,7 @@ void m68000_device::chk_w_dpc_dd_if() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73789,14 +73789,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73821,7 +73821,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73844,7 +73844,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73980,7 +73980,7 @@ void m68000_device::chk_w_dpci_dd_if() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74042,7 +74042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74066,7 +74066,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -74074,7 +74074,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74092,14 +74092,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74124,7 +74124,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74147,7 +74147,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74309,7 +74309,7 @@ void m68000_device::chk_w_imm16_dd_if() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -74317,7 +74317,7 @@ void m68000_device::chk_w_imm16_dd_if() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74335,14 +74335,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74367,7 +74367,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74390,7 +74390,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74628,7 +74628,7 @@ void m68000_device::lea_dais_ad_if() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -74923,7 +74923,7 @@ void m68000_device::lea_dpci_ad_if() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -75026,7 +75026,7 @@ void m68000_device::clr_b_ds_if() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75034,7 +75034,7 @@ void m68000_device::clr_b_ds_if() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75066,11 +75066,11 @@ void m68000_device::clr_b_ais_if() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75090,7 +75090,7 @@ void m68000_device::clr_b_ais_if() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75117,7 +75117,7 @@ void m68000_device::clr_b_ais_if() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75145,12 +75145,12 @@ void m68000_device::clr_b_aips_if() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75171,7 +75171,7 @@ void m68000_device::clr_b_aips_if() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75198,7 +75198,7 @@ void m68000_device::clr_b_aips_if() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75225,7 +75225,7 @@ void m68000_device::clr_b_pais_if() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75233,7 +75233,7 @@ void m68000_device::clr_b_pais_if() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75254,7 +75254,7 @@ void m68000_device::clr_b_pais_if() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75281,7 +75281,7 @@ void m68000_device::clr_b_pais_if() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75306,7 +75306,7 @@ void m68000_device::clr_b_das_if() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75329,11 +75329,11 @@ void m68000_device::clr_b_das_if() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75353,7 +75353,7 @@ void m68000_device::clr_b_das_if() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75380,7 +75380,7 @@ void m68000_device::clr_b_das_if() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75403,14 +75403,14 @@ void m68000_device::clr_b_dais_if() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -75418,7 +75418,7 @@ void m68000_device::clr_b_dais_if() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75442,7 +75442,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75468,11 +75468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75492,7 +75492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75519,7 +75519,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75546,7 +75546,7 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -75569,7 +75569,7 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75590,7 +75590,7 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75617,7 +75617,7 @@ void m68000_device::clr_b_adr16_if() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75642,7 +75642,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75666,7 +75666,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -75689,7 +75689,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75710,7 +75710,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75737,7 +75737,7 @@ void m68000_device::clr_b_adr32_if() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75764,7 +75764,7 @@ void m68000_device::clr_w_ds_if() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75772,7 +75772,7 @@ void m68000_device::clr_w_ds_if() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75804,11 +75804,11 @@ void m68000_device::clr_w_ais_if() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75831,7 +75831,7 @@ void m68000_device::clr_w_ais_if() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75858,7 +75858,7 @@ void m68000_device::clr_w_ais_if() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -75891,12 +75891,12 @@ void m68000_device::clr_w_aips_if() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -75920,7 +75920,7 @@ void m68000_device::clr_w_aips_if() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75947,7 +75947,7 @@ void m68000_device::clr_w_aips_if() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -75979,7 +75979,7 @@ void m68000_device::clr_w_pais_if() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75987,7 +75987,7 @@ void m68000_device::clr_w_pais_if() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76011,7 +76011,7 @@ void m68000_device::clr_w_pais_if() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76038,7 +76038,7 @@ void m68000_device::clr_w_pais_if() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76068,7 +76068,7 @@ void m68000_device::clr_w_das_if() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76091,11 +76091,11 @@ void m68000_device::clr_w_das_if() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76118,7 +76118,7 @@ void m68000_device::clr_w_das_if() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76145,7 +76145,7 @@ void m68000_device::clr_w_das_if() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76173,14 +76173,14 @@ void m68000_device::clr_w_dais_if() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -76188,7 +76188,7 @@ void m68000_device::clr_w_dais_if() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76212,7 +76212,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76238,11 +76238,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76265,7 +76265,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76292,7 +76292,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76324,7 +76324,7 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -76347,7 +76347,7 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76371,7 +76371,7 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76398,7 +76398,7 @@ void m68000_device::clr_w_adr16_if() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76428,7 +76428,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76452,7 +76452,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -76475,7 +76475,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76499,7 +76499,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76526,7 +76526,7 @@ void m68000_device::clr_w_adr32_if() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76558,12 +76558,12 @@ void m68000_device::clr_l_ds_if() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76589,7 +76589,7 @@ void m68000_device::clr_l_ds_if() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -76604,7 +76604,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76629,7 +76629,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76652,7 +76652,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76677,7 +76677,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76702,7 +76702,7 @@ void m68000_device::clr_l_ais_if() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76732,7 +76732,7 @@ void m68000_device::clr_l_aips_if() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76757,11 +76757,11 @@ void m68000_device::clr_l_aips_if() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76784,7 +76784,7 @@ void m68000_device::clr_l_aips_if() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76809,7 +76809,7 @@ void m68000_device::clr_l_aips_if() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76834,7 +76834,7 @@ void m68000_device::clr_l_aips_if() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76863,14 +76863,14 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76894,7 +76894,7 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76917,7 +76917,7 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76942,7 +76942,7 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76967,7 +76967,7 @@ void m68000_device::clr_l_pais_if() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76997,7 +76997,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77019,7 +77019,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77044,7 +77044,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77067,7 +77067,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77092,7 +77092,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77117,7 +77117,7 @@ void m68000_device::clr_l_das_if() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77145,14 +77145,14 @@ void m68000_device::clr_l_dais_if() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -77160,7 +77160,7 @@ void m68000_device::clr_l_dais_if() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77184,7 +77184,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77209,7 +77209,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77234,7 +77234,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77257,7 +77257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77282,7 +77282,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77307,7 +77307,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77339,7 +77339,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -77362,7 +77362,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77387,7 +77387,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77410,7 +77410,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77435,7 +77435,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77460,7 +77460,7 @@ void m68000_device::clr_l_adr16_if() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77490,7 +77490,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77514,7 +77514,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -77537,7 +77537,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77562,7 +77562,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77585,7 +77585,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77610,7 +77610,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77635,7 +77635,7 @@ void m68000_device::clr_l_adr32_if() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77667,7 +77667,7 @@ void m68000_device::neg_b_ds_if() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -77706,7 +77706,7 @@ void m68000_device::neg_b_ais_if() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77729,7 +77729,7 @@ void m68000_device::neg_b_ais_if() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77786,7 +77786,7 @@ void m68000_device::neg_b_aips_if() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77807,7 +77807,7 @@ void m68000_device::neg_b_aips_if() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77866,7 +77866,7 @@ void m68000_device::neg_b_pais_if() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77887,7 +77887,7 @@ void m68000_device::neg_b_pais_if() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77960,7 +77960,7 @@ void m68000_device::neg_b_das_if() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77983,7 +77983,7 @@ void m68000_device::neg_b_das_if() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78032,7 +78032,7 @@ void m68000_device::neg_b_dais_if() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78094,7 +78094,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78117,7 +78117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78191,7 +78191,7 @@ void m68000_device::neg_b_adr16_if() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78212,7 +78212,7 @@ void m68000_device::neg_b_adr16_if() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78307,7 +78307,7 @@ void m68000_device::neg_b_adr32_if() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78328,7 +78328,7 @@ void m68000_device::neg_b_adr32_if() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78381,7 +78381,7 @@ void m68000_device::neg_w_ds_if() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -78420,7 +78420,7 @@ void m68000_device::neg_w_ais_if() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78446,7 +78446,7 @@ void m68000_device::neg_w_ais_if() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78508,7 +78508,7 @@ void m68000_device::neg_w_aips_if() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78532,7 +78532,7 @@ void m68000_device::neg_w_aips_if() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78596,7 +78596,7 @@ void m68000_device::neg_w_pais_if() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78620,7 +78620,7 @@ void m68000_device::neg_w_pais_if() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78698,7 +78698,7 @@ void m68000_device::neg_w_das_if() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78724,7 +78724,7 @@ void m68000_device::neg_w_das_if() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78778,7 +78778,7 @@ void m68000_device::neg_w_dais_if() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78840,7 +78840,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78866,7 +78866,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78945,7 +78945,7 @@ void m68000_device::neg_w_adr16_if() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78969,7 +78969,7 @@ void m68000_device::neg_w_adr16_if() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79069,7 +79069,7 @@ void m68000_device::neg_w_adr32_if() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79093,7 +79093,7 @@ void m68000_device::neg_w_adr32_if() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79151,12 +79151,12 @@ void m68000_device::neg_l_ds_if() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79196,7 +79196,7 @@ void m68000_device::neg_l_ais_if() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79243,7 +79243,7 @@ void m68000_device::neg_l_ais_if() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79268,7 +79268,7 @@ void m68000_device::neg_l_ais_if() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79322,7 +79322,7 @@ void m68000_device::neg_l_aips_if() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79372,7 +79372,7 @@ void m68000_device::neg_l_aips_if() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79397,7 +79397,7 @@ void m68000_device::neg_l_aips_if() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79450,7 +79450,7 @@ void m68000_device::neg_l_pais_if() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79502,7 +79502,7 @@ void m68000_device::neg_l_pais_if() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79527,7 +79527,7 @@ void m68000_device::neg_l_pais_if() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79602,7 +79602,7 @@ void m68000_device::neg_l_das_if() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79649,7 +79649,7 @@ void m68000_device::neg_l_das_if() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79674,7 +79674,7 @@ void m68000_device::neg_l_das_if() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79726,7 +79726,7 @@ void m68000_device::neg_l_dais_if() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79787,7 +79787,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79834,7 +79834,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79859,7 +79859,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79936,7 +79936,7 @@ void m68000_device::neg_l_adr16_if() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79983,7 +79983,7 @@ void m68000_device::neg_l_adr16_if() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80008,7 +80008,7 @@ void m68000_device::neg_l_adr16_if() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80106,7 +80106,7 @@ void m68000_device::neg_l_adr32_if() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80153,7 +80153,7 @@ void m68000_device::neg_l_adr32_if() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80178,7 +80178,7 @@ void m68000_device::neg_l_adr32_if() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80300,7 +80300,7 @@ void m68000_device::move_ais_ccr_if() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80398,7 +80398,7 @@ void m68000_device::move_aips_ccr_if() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80496,7 +80496,7 @@ void m68000_device::move_pais_ccr_if() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80608,7 +80608,7 @@ void m68000_device::move_das_ccr_if() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80698,7 +80698,7 @@ void m68000_device::move_dais_ccr_if() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80760,7 +80760,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80875,7 +80875,7 @@ void m68000_device::move_adr16_ccr_if() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -81009,7 +81009,7 @@ void m68000_device::move_adr32_ccr_if() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -81120,7 +81120,7 @@ void m68000_device::move_dpc_ccr_if() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81209,7 +81209,7 @@ void m68000_device::move_dpc_ccr_if() // 44fa ffff
void m68000_device::move_dpci_ccr_if() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81271,7 +81271,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81456,7 +81456,7 @@ void m68000_device::not_b_ds_if() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -81495,7 +81495,7 @@ void m68000_device::not_b_ais_if() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81518,7 +81518,7 @@ void m68000_device::not_b_ais_if() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81575,7 +81575,7 @@ void m68000_device::not_b_aips_if() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81596,7 +81596,7 @@ void m68000_device::not_b_aips_if() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81655,7 +81655,7 @@ void m68000_device::not_b_pais_if() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81676,7 +81676,7 @@ void m68000_device::not_b_pais_if() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81749,7 +81749,7 @@ void m68000_device::not_b_das_if() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81772,7 +81772,7 @@ void m68000_device::not_b_das_if() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81821,7 +81821,7 @@ void m68000_device::not_b_dais_if() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81883,7 +81883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81906,7 +81906,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81980,7 +81980,7 @@ void m68000_device::not_b_adr16_if() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82001,7 +82001,7 @@ void m68000_device::not_b_adr16_if() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82096,7 +82096,7 @@ void m68000_device::not_b_adr32_if() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82117,7 +82117,7 @@ void m68000_device::not_b_adr32_if() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82170,7 +82170,7 @@ void m68000_device::not_w_ds_if() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -82209,7 +82209,7 @@ void m68000_device::not_w_ais_if() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82235,7 +82235,7 @@ void m68000_device::not_w_ais_if() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82297,7 +82297,7 @@ void m68000_device::not_w_aips_if() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82321,7 +82321,7 @@ void m68000_device::not_w_aips_if() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82385,7 +82385,7 @@ void m68000_device::not_w_pais_if() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82409,7 +82409,7 @@ void m68000_device::not_w_pais_if() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82487,7 +82487,7 @@ void m68000_device::not_w_das_if() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82513,7 +82513,7 @@ void m68000_device::not_w_das_if() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82567,7 +82567,7 @@ void m68000_device::not_w_dais_if() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82629,7 +82629,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82655,7 +82655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82734,7 +82734,7 @@ void m68000_device::not_w_adr16_if() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82758,7 +82758,7 @@ void m68000_device::not_w_adr16_if() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82858,7 +82858,7 @@ void m68000_device::not_w_adr32_if() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82882,7 +82882,7 @@ void m68000_device::not_w_adr32_if() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82940,12 +82940,12 @@ void m68000_device::not_l_ds_if() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82985,7 +82985,7 @@ void m68000_device::not_l_ais_if() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83032,7 +83032,7 @@ void m68000_device::not_l_ais_if() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83057,7 +83057,7 @@ void m68000_device::not_l_ais_if() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83111,7 +83111,7 @@ void m68000_device::not_l_aips_if() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83161,7 +83161,7 @@ void m68000_device::not_l_aips_if() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83186,7 +83186,7 @@ void m68000_device::not_l_aips_if() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68000_device::not_l_pais_if() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -83291,7 +83291,7 @@ void m68000_device::not_l_pais_if() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83316,7 +83316,7 @@ void m68000_device::not_l_pais_if() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83391,7 +83391,7 @@ void m68000_device::not_l_das_if() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83438,7 +83438,7 @@ void m68000_device::not_l_das_if() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83463,7 +83463,7 @@ void m68000_device::not_l_das_if() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83515,7 +83515,7 @@ void m68000_device::not_l_dais_if() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -83576,7 +83576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83623,7 +83623,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83648,7 +83648,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83725,7 +83725,7 @@ void m68000_device::not_l_adr16_if() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83772,7 +83772,7 @@ void m68000_device::not_l_adr16_if() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83797,7 +83797,7 @@ void m68000_device::not_l_adr16_if() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83895,7 +83895,7 @@ void m68000_device::not_l_adr32_if() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83942,7 +83942,7 @@ void m68000_device::not_l_adr32_if() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83967,7 +83967,7 @@ void m68000_device::not_l_adr32_if() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -84099,7 +84099,7 @@ void m68000_device::move_ais_sr_if() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84203,7 +84203,7 @@ void m68000_device::move_aips_sr_if() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84307,7 +84307,7 @@ void m68000_device::move_pais_sr_if() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84425,7 +84425,7 @@ void m68000_device::move_das_sr_if() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84521,7 +84521,7 @@ void m68000_device::move_dais_sr_if() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84583,7 +84583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84704,7 +84704,7 @@ void m68000_device::move_adr16_sr_if() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84844,7 +84844,7 @@ void m68000_device::move_adr32_sr_if() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84961,7 +84961,7 @@ void m68000_device::move_dpc_sr_if() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85056,7 +85056,7 @@ void m68000_device::move_dpci_sr_if() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85118,7 +85118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85311,12 +85311,12 @@ void m68000_device::nbcd_b_ds_if() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85354,7 +85354,7 @@ void m68000_device::nbcd_b_ais_if() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85376,12 +85376,12 @@ void m68000_device::nbcd_b_ais_if() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85436,7 +85436,7 @@ void m68000_device::nbcd_b_aips_if() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85456,12 +85456,12 @@ void m68000_device::nbcd_b_aips_if() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85518,7 +85518,7 @@ void m68000_device::nbcd_b_pais_if() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85538,12 +85538,12 @@ void m68000_device::nbcd_b_pais_if() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85614,7 +85614,7 @@ void m68000_device::nbcd_b_das_if() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85636,12 +85636,12 @@ void m68000_device::nbcd_b_das_if() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85688,7 +85688,7 @@ void m68000_device::nbcd_b_dais_if() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85750,7 +85750,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85772,12 +85772,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85849,7 +85849,7 @@ void m68000_device::nbcd_b_adr16_if() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85869,12 +85869,12 @@ void m68000_device::nbcd_b_adr16_if() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85967,7 +85967,7 @@ void m68000_device::nbcd_b_adr32_if() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85987,12 +85987,12 @@ void m68000_device::nbcd_b_adr32_if() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -86044,7 +86044,7 @@ void m68000_device::swap_ds_if() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -86052,7 +86052,7 @@ void m68000_device::swap_ds_if() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86089,7 +86089,7 @@ void m68000_device::pea_ais_if() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86166,7 +86166,7 @@ void m68000_device::pea_das_if() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86193,7 +86193,7 @@ void m68000_device::pea_das_if() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86268,7 +86268,7 @@ void m68000_device::pea_dais_if() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86329,7 +86329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86638,7 +86638,7 @@ void m68000_device::pea_dpc_if() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86665,7 +86665,7 @@ void m68000_device::pea_dpc_if() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86739,7 +86739,7 @@ void m68000_device::pea_dpc_if() // 487a ffff
void m68000_device::pea_dpci_if() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86800,7 +86800,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86884,7 +86884,7 @@ void m68000_device::ext_w_ds_if() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -87255,7 +87255,7 @@ void m68000_device::movem_w_list_dais_if() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -87643,7 +87643,7 @@ void m68000_device::ext_l_ds_if() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -88075,7 +88075,7 @@ void m68000_device::movem_l_list_dais_if() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -88524,13 +88524,13 @@ void m68000_device::tst_b_ds_if() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88562,11 +88562,11 @@ void m68000_device::tst_b_ais_if() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88586,13 +88586,13 @@ void m68000_device::tst_b_ais_if() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88627,12 +88627,12 @@ void m68000_device::tst_b_aips_if() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88653,13 +88653,13 @@ void m68000_device::tst_b_aips_if() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88693,7 +88693,7 @@ void m68000_device::tst_b_pais_if() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -88701,7 +88701,7 @@ void m68000_device::tst_b_pais_if() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88722,13 +88722,13 @@ void m68000_device::tst_b_pais_if() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88760,7 +88760,7 @@ void m68000_device::tst_b_das_if() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88783,11 +88783,11 @@ void m68000_device::tst_b_das_if() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88807,13 +88807,13 @@ void m68000_device::tst_b_das_if() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88843,14 +88843,14 @@ void m68000_device::tst_b_dais_if() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -88858,7 +88858,7 @@ void m68000_device::tst_b_dais_if() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88882,7 +88882,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88908,11 +88908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88932,13 +88932,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88972,7 +88972,7 @@ void m68000_device::tst_b_adr16_if() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -88995,7 +88995,7 @@ void m68000_device::tst_b_adr16_if() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89016,13 +89016,13 @@ void m68000_device::tst_b_adr16_if() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89054,7 +89054,7 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89078,7 +89078,7 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89101,7 +89101,7 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89122,13 +89122,13 @@ void m68000_device::tst_b_adr32_if() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89163,13 +89163,13 @@ void m68000_device::tst_w_ds_if() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89201,11 +89201,11 @@ void m68000_device::tst_w_ais_if() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89228,13 +89228,13 @@ void m68000_device::tst_w_ais_if() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89269,12 +89269,12 @@ void m68000_device::tst_w_aips_if() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89298,13 +89298,13 @@ void m68000_device::tst_w_aips_if() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89338,7 +89338,7 @@ void m68000_device::tst_w_pais_if() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -89346,7 +89346,7 @@ void m68000_device::tst_w_pais_if() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89370,13 +89370,13 @@ void m68000_device::tst_w_pais_if() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89408,7 +89408,7 @@ void m68000_device::tst_w_das_if() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89431,11 +89431,11 @@ void m68000_device::tst_w_das_if() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89458,13 +89458,13 @@ void m68000_device::tst_w_das_if() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89494,14 +89494,14 @@ void m68000_device::tst_w_dais_if() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -89509,7 +89509,7 @@ void m68000_device::tst_w_dais_if() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89533,7 +89533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89559,11 +89559,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89586,13 +89586,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89626,7 +89626,7 @@ void m68000_device::tst_w_adr16_if() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89649,7 +89649,7 @@ void m68000_device::tst_w_adr16_if() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89673,13 +89673,13 @@ void m68000_device::tst_w_adr16_if() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89711,7 +89711,7 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89735,7 +89735,7 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89758,7 +89758,7 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89782,13 +89782,13 @@ void m68000_device::tst_w_adr32_if() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89823,13 +89823,13 @@ void m68000_device::tst_l_ds_if() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89863,7 +89863,7 @@ void m68000_device::tst_l_ais_if() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89888,7 +89888,7 @@ void m68000_device::tst_l_ais_if() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89911,13 +89911,13 @@ void m68000_device::tst_l_ais_if() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89951,7 +89951,7 @@ void m68000_device::tst_l_aips_if() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89976,11 +89976,11 @@ void m68000_device::tst_l_aips_if() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90003,13 +90003,13 @@ void m68000_device::tst_l_aips_if() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90042,14 +90042,14 @@ void m68000_device::tst_l_pais_if() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90073,7 +90073,7 @@ void m68000_device::tst_l_pais_if() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90096,13 +90096,13 @@ void m68000_device::tst_l_pais_if() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90136,7 +90136,7 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90158,7 +90158,7 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90183,7 +90183,7 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90206,13 +90206,13 @@ void m68000_device::tst_l_das_if() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90244,14 +90244,14 @@ void m68000_device::tst_l_dais_if() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -90259,7 +90259,7 @@ void m68000_device::tst_l_dais_if() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90283,7 +90283,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90308,7 +90308,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90333,7 +90333,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90356,13 +90356,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90398,7 +90398,7 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -90421,7 +90421,7 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90446,7 +90446,7 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90469,13 +90469,13 @@ void m68000_device::tst_l_adr16_if() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90509,7 +90509,7 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90533,7 +90533,7 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -90556,7 +90556,7 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90581,7 +90581,7 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90604,13 +90604,13 @@ void m68000_device::tst_l_adr32_if() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90646,14 +90646,14 @@ void m68000_device::tas_ds_if() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90687,11 +90687,11 @@ void m68000_device::tas_ais_if() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90706,14 +90706,14 @@ void m68000_device::tas_ais_if() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90735,11 +90735,11 @@ void m68000_device::tas_ais_if() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90774,12 +90774,12 @@ void m68000_device::tas_aips_if() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90795,14 +90795,14 @@ void m68000_device::tas_aips_if() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90824,11 +90824,11 @@ void m68000_device::tas_aips_if() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90862,7 +90862,7 @@ void m68000_device::tas_pais_if() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -90870,7 +90870,7 @@ void m68000_device::tas_pais_if() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90886,14 +90886,14 @@ void m68000_device::tas_pais_if() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90915,11 +90915,11 @@ void m68000_device::tas_pais_if() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90951,7 +90951,7 @@ void m68000_device::tas_das_if() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90974,11 +90974,11 @@ void m68000_device::tas_das_if() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90993,14 +90993,14 @@ void m68000_device::tas_das_if() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91022,11 +91022,11 @@ void m68000_device::tas_das_if() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91056,14 +91056,14 @@ void m68000_device::tas_dais_if() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -91071,7 +91071,7 @@ void m68000_device::tas_dais_if() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91095,7 +91095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91121,11 +91121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -91140,14 +91140,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91169,11 +91169,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91207,7 +91207,7 @@ void m68000_device::tas_adr16_if() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -91230,7 +91230,7 @@ void m68000_device::tas_adr16_if() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91246,14 +91246,14 @@ void m68000_device::tas_adr16_if() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91275,11 +91275,11 @@ void m68000_device::tas_adr16_if() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91311,7 +91311,7 @@ void m68000_device::tas_adr32_if() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91335,7 +91335,7 @@ void m68000_device::tas_adr32_if() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -91358,7 +91358,7 @@ void m68000_device::tas_adr32_if() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91374,14 +91374,14 @@ void m68000_device::tas_adr32_if() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91403,11 +91403,11 @@ void m68000_device::tas_adr32_if() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91833,7 +91833,7 @@ void m68000_device::movem_w_dais_list_if() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -91891,7 +91891,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -92444,7 +92444,7 @@ void m68000_device::movem_w_dpci_list_if() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -92502,7 +92502,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93055,7 +93055,7 @@ void m68000_device::movem_l_dais_list_if() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93113,7 +93113,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93750,7 +93750,7 @@ void m68000_device::movem_l_dpci_list_if() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93808,7 +93808,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93930,14 +93930,14 @@ void m68000_device::trap_imm4_if() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -93962,7 +93962,7 @@ void m68000_device::trap_imm4_if() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -93985,7 +93985,7 @@ void m68000_device::trap_imm4_if() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94107,7 +94107,7 @@ void m68000_device::link_as_imm16_if() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -94384,7 +94384,7 @@ void m68000_device::reset_if() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -94484,7 +94484,7 @@ void m68000_device::stop_i16u_if() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -94497,6 +94497,7 @@ void m68000_device::stop_i16u_if() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -94510,7 +94511,7 @@ void m68000_device::rte_if() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -94638,7 +94639,7 @@ void m68000_device::rts_if() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -94779,7 +94780,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -94802,7 +94803,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94827,7 +94828,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94850,7 +94851,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94970,7 +94971,7 @@ void m68000_device::rtr_if() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -95298,7 +95299,7 @@ void m68000_device::jsr_dais_if() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95747,7 +95748,7 @@ void m68000_device::jsr_dpc_if() // 4eba ffff
void m68000_device::jsr_dpci_if() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95988,7 +95989,7 @@ void m68000_device::jmp_dais_if() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96260,7 +96261,7 @@ void m68000_device::jmp_dpc_if() // 4efa ffff
void m68000_device::jmp_dpci_if() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96344,7 +96345,7 @@ void m68000_device::addq_b_imm3_ds_if() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -96383,7 +96384,7 @@ void m68000_device::addq_b_imm3_ais_if() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96407,7 +96408,7 @@ void m68000_device::addq_b_imm3_ais_if() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96464,7 +96465,7 @@ void m68000_device::addq_b_imm3_aips_if() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96486,7 +96487,7 @@ void m68000_device::addq_b_imm3_aips_if() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96545,7 +96546,7 @@ void m68000_device::addq_b_imm3_pais_if() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96567,7 +96568,7 @@ void m68000_device::addq_b_imm3_pais_if() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96640,7 +96641,7 @@ void m68000_device::addq_b_imm3_das_if() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96664,7 +96665,7 @@ void m68000_device::addq_b_imm3_das_if() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96713,7 +96714,7 @@ void m68000_device::addq_b_imm3_dais_if() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96775,7 +96776,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96799,7 +96800,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96873,7 +96874,7 @@ void m68000_device::addq_b_imm3_adr16_if() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96895,7 +96896,7 @@ void m68000_device::addq_b_imm3_adr16_if() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96990,7 +96991,7 @@ void m68000_device::addq_b_imm3_adr32_if() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -97012,7 +97013,7 @@ void m68000_device::addq_b_imm3_adr32_if() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97065,7 +97066,7 @@ void m68000_device::addq_w_imm3_ds_if() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -97106,7 +97107,7 @@ void m68000_device::addq_w_imm3_as_if() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97129,7 +97130,7 @@ void m68000_device::addq_w_imm3_as_if() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97151,7 +97152,7 @@ void m68000_device::addq_w_imm3_ais_if() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97178,7 +97179,7 @@ void m68000_device::addq_w_imm3_ais_if() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97240,7 +97241,7 @@ void m68000_device::addq_w_imm3_aips_if() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97265,7 +97266,7 @@ void m68000_device::addq_w_imm3_aips_if() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97329,7 +97330,7 @@ void m68000_device::addq_w_imm3_pais_if() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97354,7 +97355,7 @@ void m68000_device::addq_w_imm3_pais_if() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97432,7 +97433,7 @@ void m68000_device::addq_w_imm3_das_if() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97459,7 +97460,7 @@ void m68000_device::addq_w_imm3_das_if() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97513,7 +97514,7 @@ void m68000_device::addq_w_imm3_dais_if() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97575,7 +97576,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97602,7 +97603,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97681,7 +97682,7 @@ void m68000_device::addq_w_imm3_adr16_if() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97706,7 +97707,7 @@ void m68000_device::addq_w_imm3_adr16_if() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97806,7 +97807,7 @@ void m68000_device::addq_w_imm3_adr32_if() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97831,7 +97832,7 @@ void m68000_device::addq_w_imm3_adr32_if() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97889,7 +97890,7 @@ void m68000_device::addq_l_imm3_ds_if() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -97913,7 +97914,7 @@ void m68000_device::addq_l_imm3_ds_if() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -97938,7 +97939,7 @@ void m68000_device::addq_l_imm3_as_if() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97961,7 +97962,7 @@ void m68000_device::addq_l_imm3_as_if() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97983,7 +97984,7 @@ void m68000_device::addq_l_imm3_ais_if() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98031,7 +98032,7 @@ void m68000_device::addq_l_imm3_ais_if() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98056,7 +98057,7 @@ void m68000_device::addq_l_imm3_ais_if() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98110,7 +98111,7 @@ void m68000_device::addq_l_imm3_aips_if() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98161,7 +98162,7 @@ void m68000_device::addq_l_imm3_aips_if() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98186,7 +98187,7 @@ void m68000_device::addq_l_imm3_aips_if() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98239,7 +98240,7 @@ void m68000_device::addq_l_imm3_pais_if() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -98292,7 +98293,7 @@ void m68000_device::addq_l_imm3_pais_if() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98317,7 +98318,7 @@ void m68000_device::addq_l_imm3_pais_if() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98392,7 +98393,7 @@ void m68000_device::addq_l_imm3_das_if() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98440,7 +98441,7 @@ void m68000_device::addq_l_imm3_das_if() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98465,7 +98466,7 @@ void m68000_device::addq_l_imm3_das_if() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98517,7 +98518,7 @@ void m68000_device::addq_l_imm3_dais_if() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -98578,7 +98579,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98626,7 +98627,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98651,7 +98652,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98728,7 +98729,7 @@ void m68000_device::addq_l_imm3_adr16_if() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98776,7 +98777,7 @@ void m68000_device::addq_l_imm3_adr16_if() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98801,7 +98802,7 @@ void m68000_device::addq_l_imm3_adr16_if() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98899,7 +98900,7 @@ void m68000_device::addq_l_imm3_adr32_if() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98947,7 +98948,7 @@ void m68000_device::addq_l_imm3_adr32_if() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98972,7 +98973,7 @@ void m68000_device::addq_l_imm3_adr32_if() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -99028,7 +99029,7 @@ void m68000_device::st_ds_if() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -99040,7 +99041,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99067,7 +99068,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99092,7 +99093,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -99107,7 +99108,7 @@ void m68000_device::dbt_ds_rel16_if() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -99119,13 +99120,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99153,7 +99154,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -99161,7 +99162,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99185,11 +99186,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99219,13 +99220,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99255,7 +99256,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99286,11 +99287,11 @@ void m68000_device::st_ais_if() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99310,7 +99311,7 @@ void m68000_device::st_ais_if() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99320,7 +99321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99344,7 +99345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99372,7 +99373,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99400,12 +99401,12 @@ void m68000_device::st_aips_if() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99426,7 +99427,7 @@ void m68000_device::st_aips_if() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99436,7 +99437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99460,7 +99461,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99488,7 +99489,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99515,7 +99516,7 @@ void m68000_device::st_pais_if() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99523,7 +99524,7 @@ void m68000_device::st_pais_if() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99544,7 +99545,7 @@ void m68000_device::st_pais_if() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99554,7 +99555,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99578,7 +99579,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99606,7 +99607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99631,7 +99632,7 @@ void m68000_device::st_das_if() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99654,11 +99655,11 @@ void m68000_device::st_das_if() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99678,7 +99679,7 @@ void m68000_device::st_das_if() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99688,7 +99689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99712,7 +99713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99740,7 +99741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99763,14 +99764,14 @@ void m68000_device::st_dais_if() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99778,7 +99779,7 @@ void m68000_device::st_dais_if() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99802,7 +99803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99828,11 +99829,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99852,7 +99853,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99862,7 +99863,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99886,7 +99887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99914,7 +99915,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99941,7 +99942,7 @@ void m68000_device::st_adr16_if() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99964,7 +99965,7 @@ void m68000_device::st_adr16_if() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99985,7 +99986,7 @@ void m68000_device::st_adr16_if() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99995,7 +99996,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100019,7 +100020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100047,7 +100048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100072,7 +100073,7 @@ void m68000_device::st_adr32_if() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100096,7 +100097,7 @@ void m68000_device::st_adr32_if() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100119,7 +100120,7 @@ void m68000_device::st_adr32_if() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100140,7 +100141,7 @@ void m68000_device::st_adr32_if() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -100150,7 +100151,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100174,7 +100175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100202,7 +100203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100229,7 +100230,7 @@ void m68000_device::subq_b_imm3_ds_if() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100268,7 +100269,7 @@ void m68000_device::subq_b_imm3_ais_if() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100292,7 +100293,7 @@ void m68000_device::subq_b_imm3_ais_if() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100349,7 +100350,7 @@ void m68000_device::subq_b_imm3_aips_if() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100371,7 +100372,7 @@ void m68000_device::subq_b_imm3_aips_if() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100430,7 +100431,7 @@ void m68000_device::subq_b_imm3_pais_if() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100452,7 +100453,7 @@ void m68000_device::subq_b_imm3_pais_if() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100525,7 +100526,7 @@ void m68000_device::subq_b_imm3_das_if() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100549,7 +100550,7 @@ void m68000_device::subq_b_imm3_das_if() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100598,7 +100599,7 @@ void m68000_device::subq_b_imm3_dais_if() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100660,7 +100661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100684,7 +100685,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100758,7 +100759,7 @@ void m68000_device::subq_b_imm3_adr16_if() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100780,7 +100781,7 @@ void m68000_device::subq_b_imm3_adr16_if() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100875,7 +100876,7 @@ void m68000_device::subq_b_imm3_adr32_if() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100897,7 +100898,7 @@ void m68000_device::subq_b_imm3_adr32_if() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100950,7 +100951,7 @@ void m68000_device::subq_w_imm3_ds_if() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100991,7 +100992,7 @@ void m68000_device::subq_w_imm3_as_if() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101014,7 +101015,7 @@ void m68000_device::subq_w_imm3_as_if() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101036,7 +101037,7 @@ void m68000_device::subq_w_imm3_ais_if() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101063,7 +101064,7 @@ void m68000_device::subq_w_imm3_ais_if() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101125,7 +101126,7 @@ void m68000_device::subq_w_imm3_aips_if() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101150,7 +101151,7 @@ void m68000_device::subq_w_imm3_aips_if() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101214,7 +101215,7 @@ void m68000_device::subq_w_imm3_pais_if() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101239,7 +101240,7 @@ void m68000_device::subq_w_imm3_pais_if() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101317,7 +101318,7 @@ void m68000_device::subq_w_imm3_das_if() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101344,7 +101345,7 @@ void m68000_device::subq_w_imm3_das_if() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101398,7 +101399,7 @@ void m68000_device::subq_w_imm3_dais_if() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -101460,7 +101461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101487,7 +101488,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101566,7 +101567,7 @@ void m68000_device::subq_w_imm3_adr16_if() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101591,7 +101592,7 @@ void m68000_device::subq_w_imm3_adr16_if() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101691,7 +101692,7 @@ void m68000_device::subq_w_imm3_adr32_if() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101716,7 +101717,7 @@ void m68000_device::subq_w_imm3_adr32_if() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101774,7 +101775,7 @@ void m68000_device::subq_l_imm3_ds_if() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -101798,7 +101799,7 @@ void m68000_device::subq_l_imm3_ds_if() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -101823,7 +101824,7 @@ void m68000_device::subq_l_imm3_as_if() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101846,7 +101847,7 @@ void m68000_device::subq_l_imm3_as_if() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101868,7 +101869,7 @@ void m68000_device::subq_l_imm3_ais_if() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101916,7 +101917,7 @@ void m68000_device::subq_l_imm3_ais_if() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101941,7 +101942,7 @@ void m68000_device::subq_l_imm3_ais_if() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -101995,7 +101996,7 @@ void m68000_device::subq_l_imm3_aips_if() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102046,7 +102047,7 @@ void m68000_device::subq_l_imm3_aips_if() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102071,7 +102072,7 @@ void m68000_device::subq_l_imm3_aips_if() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102124,7 +102125,7 @@ void m68000_device::subq_l_imm3_pais_if() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -102177,7 +102178,7 @@ void m68000_device::subq_l_imm3_pais_if() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102202,7 +102203,7 @@ void m68000_device::subq_l_imm3_pais_if() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102277,7 +102278,7 @@ void m68000_device::subq_l_imm3_das_if() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102325,7 +102326,7 @@ void m68000_device::subq_l_imm3_das_if() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102350,7 +102351,7 @@ void m68000_device::subq_l_imm3_das_if() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102402,7 +102403,7 @@ void m68000_device::subq_l_imm3_dais_if() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -102463,7 +102464,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102511,7 +102512,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102536,7 +102537,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102613,7 +102614,7 @@ void m68000_device::subq_l_imm3_adr16_if() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102661,7 +102662,7 @@ void m68000_device::subq_l_imm3_adr16_if() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102686,7 +102687,7 @@ void m68000_device::subq_l_imm3_adr16_if() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102784,7 +102785,7 @@ void m68000_device::subq_l_imm3_adr32_if() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102832,7 +102833,7 @@ void m68000_device::subq_l_imm3_adr32_if() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102857,7 +102858,7 @@ void m68000_device::subq_l_imm3_adr32_if() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102913,7 +102914,7 @@ void m68000_device::sf_ds_if() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -102925,7 +102926,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -102952,7 +102953,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102977,7 +102978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -102992,7 +102993,7 @@ void m68000_device::dbra_ds_rel16_if() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -103004,13 +103005,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103038,7 +103039,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -103046,7 +103047,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103070,11 +103071,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103104,13 +103105,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103140,7 +103141,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103171,11 +103172,11 @@ void m68000_device::sf_ais_if() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103195,7 +103196,7 @@ void m68000_device::sf_ais_if() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103205,7 +103206,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103229,7 +103230,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103257,7 +103258,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103285,12 +103286,12 @@ void m68000_device::sf_aips_if() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103311,7 +103312,7 @@ void m68000_device::sf_aips_if() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103321,7 +103322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103345,7 +103346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103373,7 +103374,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103400,7 +103401,7 @@ void m68000_device::sf_pais_if() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103408,7 +103409,7 @@ void m68000_device::sf_pais_if() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103429,7 +103430,7 @@ void m68000_device::sf_pais_if() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103439,7 +103440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103463,7 +103464,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103491,7 +103492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103516,7 +103517,7 @@ void m68000_device::sf_das_if() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103539,11 +103540,11 @@ void m68000_device::sf_das_if() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103563,7 +103564,7 @@ void m68000_device::sf_das_if() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103573,7 +103574,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103597,7 +103598,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103625,7 +103626,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103648,14 +103649,14 @@ void m68000_device::sf_dais_if() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103663,7 +103664,7 @@ void m68000_device::sf_dais_if() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103687,7 +103688,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103713,11 +103714,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103737,7 +103738,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103747,7 +103748,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103771,7 +103772,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103799,7 +103800,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103826,7 +103827,7 @@ void m68000_device::sf_adr16_if() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103849,7 +103850,7 @@ void m68000_device::sf_adr16_if() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103870,7 +103871,7 @@ void m68000_device::sf_adr16_if() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103880,7 +103881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103904,7 +103905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103932,7 +103933,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103957,7 +103958,7 @@ void m68000_device::sf_adr32_if() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103981,7 +103982,7 @@ void m68000_device::sf_adr32_if() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104004,7 +104005,7 @@ void m68000_device::sf_adr32_if() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104025,7 +104026,7 @@ void m68000_device::sf_adr32_if() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104035,7 +104036,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104059,7 +104060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104087,7 +104088,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104114,7 +104115,7 @@ void m68000_device::shi_ds_if() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -104126,7 +104127,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104153,7 +104154,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104178,7 +104179,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -104193,7 +104194,7 @@ void m68000_device::dbhi_ds_rel16_if() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -104205,13 +104206,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104239,7 +104240,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -104247,7 +104248,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104271,11 +104272,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104305,13 +104306,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104341,7 +104342,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104372,11 +104373,11 @@ void m68000_device::shi_ais_if() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104396,7 +104397,7 @@ void m68000_device::shi_ais_if() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104406,7 +104407,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104430,7 +104431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104458,7 +104459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104486,12 +104487,12 @@ void m68000_device::shi_aips_if() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104512,7 +104513,7 @@ void m68000_device::shi_aips_if() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104522,7 +104523,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104546,7 +104547,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104574,7 +104575,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104601,7 +104602,7 @@ void m68000_device::shi_pais_if() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -104609,7 +104610,7 @@ void m68000_device::shi_pais_if() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104630,7 +104631,7 @@ void m68000_device::shi_pais_if() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104640,7 +104641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104664,7 +104665,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104692,7 +104693,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104717,7 +104718,7 @@ void m68000_device::shi_das_if() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104740,11 +104741,11 @@ void m68000_device::shi_das_if() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104764,7 +104765,7 @@ void m68000_device::shi_das_if() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104774,7 +104775,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104798,7 +104799,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104826,7 +104827,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104849,14 +104850,14 @@ void m68000_device::shi_dais_if() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -104864,7 +104865,7 @@ void m68000_device::shi_dais_if() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104888,7 +104889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104914,11 +104915,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104938,7 +104939,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104948,7 +104949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104972,7 +104973,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105000,7 +105001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105027,7 +105028,7 @@ void m68000_device::shi_adr16_if() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105050,7 +105051,7 @@ void m68000_device::shi_adr16_if() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105071,7 +105072,7 @@ void m68000_device::shi_adr16_if() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105081,7 +105082,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105105,7 +105106,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105133,7 +105134,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105158,7 +105159,7 @@ void m68000_device::shi_adr32_if() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105182,7 +105183,7 @@ void m68000_device::shi_adr32_if() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105205,7 +105206,7 @@ void m68000_device::shi_adr32_if() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105226,7 +105227,7 @@ void m68000_device::shi_adr32_if() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105236,7 +105237,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105260,7 +105261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105288,7 +105289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105315,7 +105316,7 @@ void m68000_device::sls_ds_if() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -105327,7 +105328,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105354,7 +105355,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105379,7 +105380,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -105394,7 +105395,7 @@ void m68000_device::dbls_ds_rel16_if() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -105406,13 +105407,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105440,7 +105441,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -105448,7 +105449,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105472,11 +105473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105506,13 +105507,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105542,7 +105543,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105573,11 +105574,11 @@ void m68000_device::sls_ais_if() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105597,7 +105598,7 @@ void m68000_device::sls_ais_if() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105607,7 +105608,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105631,7 +105632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105659,7 +105660,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105687,12 +105688,12 @@ void m68000_device::sls_aips_if() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105713,7 +105714,7 @@ void m68000_device::sls_aips_if() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105723,7 +105724,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105747,7 +105748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105775,7 +105776,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105802,7 +105803,7 @@ void m68000_device::sls_pais_if() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -105810,7 +105811,7 @@ void m68000_device::sls_pais_if() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105831,7 +105832,7 @@ void m68000_device::sls_pais_if() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105841,7 +105842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105865,7 +105866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105893,7 +105894,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105918,7 +105919,7 @@ void m68000_device::sls_das_if() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105941,11 +105942,11 @@ void m68000_device::sls_das_if() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105965,7 +105966,7 @@ void m68000_device::sls_das_if() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105975,7 +105976,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105999,7 +106000,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106027,7 +106028,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106050,14 +106051,14 @@ void m68000_device::sls_dais_if() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -106065,7 +106066,7 @@ void m68000_device::sls_dais_if() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106089,7 +106090,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106115,11 +106116,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106139,7 +106140,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106149,7 +106150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106173,7 +106174,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106201,7 +106202,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106228,7 +106229,7 @@ void m68000_device::sls_adr16_if() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106251,7 +106252,7 @@ void m68000_device::sls_adr16_if() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106272,7 +106273,7 @@ void m68000_device::sls_adr16_if() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106282,7 +106283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106306,7 +106307,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106334,7 +106335,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106359,7 +106360,7 @@ void m68000_device::sls_adr32_if() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106383,7 +106384,7 @@ void m68000_device::sls_adr32_if() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106406,7 +106407,7 @@ void m68000_device::sls_adr32_if() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106427,7 +106428,7 @@ void m68000_device::sls_adr32_if() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106437,7 +106438,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106461,7 +106462,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106489,7 +106490,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106516,7 +106517,7 @@ void m68000_device::scc_ds_if() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -106528,7 +106529,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106555,7 +106556,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106580,7 +106581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -106595,7 +106596,7 @@ void m68000_device::dbcc_ds_rel16_if() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -106607,13 +106608,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106641,7 +106642,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -106649,7 +106650,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106673,11 +106674,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106707,13 +106708,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106743,7 +106744,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106774,11 +106775,11 @@ void m68000_device::scc_ais_if() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106798,7 +106799,7 @@ void m68000_device::scc_ais_if() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106808,7 +106809,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106832,7 +106833,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106860,7 +106861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106888,12 +106889,12 @@ void m68000_device::scc_aips_if() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106914,7 +106915,7 @@ void m68000_device::scc_aips_if() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106924,7 +106925,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106948,7 +106949,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106976,7 +106977,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107003,7 +107004,7 @@ void m68000_device::scc_pais_if() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -107011,7 +107012,7 @@ void m68000_device::scc_pais_if() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107032,7 +107033,7 @@ void m68000_device::scc_pais_if() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107042,7 +107043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107066,7 +107067,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107094,7 +107095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107119,7 +107120,7 @@ void m68000_device::scc_das_if() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107142,11 +107143,11 @@ void m68000_device::scc_das_if() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107166,7 +107167,7 @@ void m68000_device::scc_das_if() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107176,7 +107177,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107200,7 +107201,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107228,7 +107229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107251,14 +107252,14 @@ void m68000_device::scc_dais_if() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -107266,7 +107267,7 @@ void m68000_device::scc_dais_if() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107290,7 +107291,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107316,11 +107317,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107340,7 +107341,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107350,7 +107351,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107374,7 +107375,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107402,7 +107403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107429,7 +107430,7 @@ void m68000_device::scc_adr16_if() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107452,7 +107453,7 @@ void m68000_device::scc_adr16_if() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107473,7 +107474,7 @@ void m68000_device::scc_adr16_if() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107483,7 +107484,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107507,7 +107508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107535,7 +107536,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107560,7 +107561,7 @@ void m68000_device::scc_adr32_if() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107584,7 +107585,7 @@ void m68000_device::scc_adr32_if() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107607,7 +107608,7 @@ void m68000_device::scc_adr32_if() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107628,7 +107629,7 @@ void m68000_device::scc_adr32_if() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107638,7 +107639,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107662,7 +107663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107690,7 +107691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107717,7 +107718,7 @@ void m68000_device::scs_ds_if() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -107729,7 +107730,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107756,7 +107757,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107781,7 +107782,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -107796,7 +107797,7 @@ void m68000_device::dbcs_ds_rel16_if() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -107808,13 +107809,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107842,7 +107843,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -107850,7 +107851,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107874,11 +107875,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107908,13 +107909,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107944,7 +107945,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107975,11 +107976,11 @@ void m68000_device::scs_ais_if() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107999,7 +108000,7 @@ void m68000_device::scs_ais_if() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108009,7 +108010,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108033,7 +108034,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108061,7 +108062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108089,12 +108090,12 @@ void m68000_device::scs_aips_if() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108115,7 +108116,7 @@ void m68000_device::scs_aips_if() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108125,7 +108126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108149,7 +108150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108177,7 +108178,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108204,7 +108205,7 @@ void m68000_device::scs_pais_if() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -108212,7 +108213,7 @@ void m68000_device::scs_pais_if() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108233,7 +108234,7 @@ void m68000_device::scs_pais_if() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108243,7 +108244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108267,7 +108268,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108295,7 +108296,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108320,7 +108321,7 @@ void m68000_device::scs_das_if() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108343,11 +108344,11 @@ void m68000_device::scs_das_if() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108367,7 +108368,7 @@ void m68000_device::scs_das_if() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108377,7 +108378,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108401,7 +108402,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108429,7 +108430,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108452,14 +108453,14 @@ void m68000_device::scs_dais_if() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -108467,7 +108468,7 @@ void m68000_device::scs_dais_if() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108491,7 +108492,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108517,11 +108518,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108541,7 +108542,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108551,7 +108552,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108575,7 +108576,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108603,7 +108604,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108630,7 +108631,7 @@ void m68000_device::scs_adr16_if() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108653,7 +108654,7 @@ void m68000_device::scs_adr16_if() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108674,7 +108675,7 @@ void m68000_device::scs_adr16_if() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108684,7 +108685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108708,7 +108709,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108736,7 +108737,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108761,7 +108762,7 @@ void m68000_device::scs_adr32_if() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108785,7 +108786,7 @@ void m68000_device::scs_adr32_if() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108808,7 +108809,7 @@ void m68000_device::scs_adr32_if() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108829,7 +108830,7 @@ void m68000_device::scs_adr32_if() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108839,7 +108840,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108863,7 +108864,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108891,7 +108892,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108918,7 +108919,7 @@ void m68000_device::sne_ds_if() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -108930,7 +108931,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108957,7 +108958,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108982,7 +108983,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -108997,7 +108998,7 @@ void m68000_device::dbne_ds_rel16_if() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -109009,13 +109010,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109043,7 +109044,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -109051,7 +109052,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109075,11 +109076,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109109,13 +109110,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109145,7 +109146,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109176,11 +109177,11 @@ void m68000_device::sne_ais_if() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109200,7 +109201,7 @@ void m68000_device::sne_ais_if() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109210,7 +109211,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109234,7 +109235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109262,7 +109263,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109290,12 +109291,12 @@ void m68000_device::sne_aips_if() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109316,7 +109317,7 @@ void m68000_device::sne_aips_if() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109326,7 +109327,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109350,7 +109351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109378,7 +109379,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109405,7 +109406,7 @@ void m68000_device::sne_pais_if() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -109413,7 +109414,7 @@ void m68000_device::sne_pais_if() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109434,7 +109435,7 @@ void m68000_device::sne_pais_if() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109444,7 +109445,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109468,7 +109469,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109496,7 +109497,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109521,7 +109522,7 @@ void m68000_device::sne_das_if() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109544,11 +109545,11 @@ void m68000_device::sne_das_if() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109568,7 +109569,7 @@ void m68000_device::sne_das_if() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109578,7 +109579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109602,7 +109603,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109630,7 +109631,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109653,14 +109654,14 @@ void m68000_device::sne_dais_if() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -109668,7 +109669,7 @@ void m68000_device::sne_dais_if() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109692,7 +109693,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109718,11 +109719,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109742,7 +109743,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109752,7 +109753,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109776,7 +109777,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109804,7 +109805,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109831,7 +109832,7 @@ void m68000_device::sne_adr16_if() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109854,7 +109855,7 @@ void m68000_device::sne_adr16_if() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109875,7 +109876,7 @@ void m68000_device::sne_adr16_if() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109885,7 +109886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109909,7 +109910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109937,7 +109938,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109962,7 +109963,7 @@ void m68000_device::sne_adr32_if() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109986,7 +109987,7 @@ void m68000_device::sne_adr32_if() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110009,7 +110010,7 @@ void m68000_device::sne_adr32_if() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110030,7 +110031,7 @@ void m68000_device::sne_adr32_if() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110040,7 +110041,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110064,7 +110065,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110092,7 +110093,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110119,7 +110120,7 @@ void m68000_device::seq_ds_if() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -110131,7 +110132,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110158,7 +110159,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110183,7 +110184,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -110198,7 +110199,7 @@ void m68000_device::dbeq_ds_rel16_if() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -110210,13 +110211,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110244,7 +110245,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -110252,7 +110253,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110276,11 +110277,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110310,13 +110311,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110346,7 +110347,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110377,11 +110378,11 @@ void m68000_device::seq_ais_if() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110401,7 +110402,7 @@ void m68000_device::seq_ais_if() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110411,7 +110412,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110435,7 +110436,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110463,7 +110464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110491,12 +110492,12 @@ void m68000_device::seq_aips_if() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110517,7 +110518,7 @@ void m68000_device::seq_aips_if() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110527,7 +110528,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110551,7 +110552,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110579,7 +110580,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110606,7 +110607,7 @@ void m68000_device::seq_pais_if() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -110614,7 +110615,7 @@ void m68000_device::seq_pais_if() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110635,7 +110636,7 @@ void m68000_device::seq_pais_if() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110645,7 +110646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110669,7 +110670,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110697,7 +110698,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110722,7 +110723,7 @@ void m68000_device::seq_das_if() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110745,11 +110746,11 @@ void m68000_device::seq_das_if() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110769,7 +110770,7 @@ void m68000_device::seq_das_if() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110779,7 +110780,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110803,7 +110804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110831,7 +110832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110854,14 +110855,14 @@ void m68000_device::seq_dais_if() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -110869,7 +110870,7 @@ void m68000_device::seq_dais_if() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110893,7 +110894,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110919,11 +110920,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110943,7 +110944,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110953,7 +110954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110977,7 +110978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111005,7 +111006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111032,7 +111033,7 @@ void m68000_device::seq_adr16_if() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111055,7 +111056,7 @@ void m68000_device::seq_adr16_if() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111076,7 +111077,7 @@ void m68000_device::seq_adr16_if() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111086,7 +111087,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111110,7 +111111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111138,7 +111139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111163,7 +111164,7 @@ void m68000_device::seq_adr32_if() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111187,7 +111188,7 @@ void m68000_device::seq_adr32_if() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111210,7 +111211,7 @@ void m68000_device::seq_adr32_if() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111231,7 +111232,7 @@ void m68000_device::seq_adr32_if() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111241,7 +111242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111265,7 +111266,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111293,7 +111294,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111320,7 +111321,7 @@ void m68000_device::svc_ds_if() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -111332,7 +111333,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111359,7 +111360,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111384,7 +111385,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -111399,7 +111400,7 @@ void m68000_device::dbvc_ds_rel16_if() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -111411,13 +111412,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111445,7 +111446,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -111453,7 +111454,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111477,11 +111478,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111511,13 +111512,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111547,7 +111548,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111578,11 +111579,11 @@ void m68000_device::svc_ais_if() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111602,7 +111603,7 @@ void m68000_device::svc_ais_if() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111612,7 +111613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111636,7 +111637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111664,7 +111665,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111692,12 +111693,12 @@ void m68000_device::svc_aips_if() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111718,7 +111719,7 @@ void m68000_device::svc_aips_if() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111728,7 +111729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111752,7 +111753,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111780,7 +111781,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111807,7 +111808,7 @@ void m68000_device::svc_pais_if() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -111815,7 +111816,7 @@ void m68000_device::svc_pais_if() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111836,7 +111837,7 @@ void m68000_device::svc_pais_if() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111846,7 +111847,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111870,7 +111871,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111898,7 +111899,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111923,7 +111924,7 @@ void m68000_device::svc_das_if() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111946,11 +111947,11 @@ void m68000_device::svc_das_if() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111970,7 +111971,7 @@ void m68000_device::svc_das_if() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111980,7 +111981,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112004,7 +112005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112032,7 +112033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112055,14 +112056,14 @@ void m68000_device::svc_dais_if() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -112070,7 +112071,7 @@ void m68000_device::svc_dais_if() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112094,7 +112095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112120,11 +112121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112144,7 +112145,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112154,7 +112155,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112178,7 +112179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112206,7 +112207,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112233,7 +112234,7 @@ void m68000_device::svc_adr16_if() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112256,7 +112257,7 @@ void m68000_device::svc_adr16_if() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112277,7 +112278,7 @@ void m68000_device::svc_adr16_if() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112287,7 +112288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112311,7 +112312,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112339,7 +112340,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112364,7 +112365,7 @@ void m68000_device::svc_adr32_if() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112388,7 +112389,7 @@ void m68000_device::svc_adr32_if() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112411,7 +112412,7 @@ void m68000_device::svc_adr32_if() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112432,7 +112433,7 @@ void m68000_device::svc_adr32_if() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112442,7 +112443,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112466,7 +112467,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112494,7 +112495,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112521,7 +112522,7 @@ void m68000_device::svs_ds_if() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112533,7 +112534,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112560,7 +112561,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112585,7 +112586,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112600,7 +112601,7 @@ void m68000_device::dbvs_ds_rel16_if() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112612,13 +112613,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112646,7 +112647,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112654,7 +112655,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112678,11 +112679,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112712,13 +112713,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112748,7 +112749,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112779,11 +112780,11 @@ void m68000_device::svs_ais_if() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112803,7 +112804,7 @@ void m68000_device::svs_ais_if() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112813,7 +112814,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112837,7 +112838,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112865,7 +112866,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112893,12 +112894,12 @@ void m68000_device::svs_aips_if() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112919,7 +112920,7 @@ void m68000_device::svs_aips_if() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112929,7 +112930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112953,7 +112954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112981,7 +112982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113008,7 +113009,7 @@ void m68000_device::svs_pais_if() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113016,7 +113017,7 @@ void m68000_device::svs_pais_if() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113037,7 +113038,7 @@ void m68000_device::svs_pais_if() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113047,7 +113048,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113071,7 +113072,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113099,7 +113100,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113124,7 +113125,7 @@ void m68000_device::svs_das_if() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113147,11 +113148,11 @@ void m68000_device::svs_das_if() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113171,7 +113172,7 @@ void m68000_device::svs_das_if() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113181,7 +113182,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113205,7 +113206,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113233,7 +113234,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113256,14 +113257,14 @@ void m68000_device::svs_dais_if() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113271,7 +113272,7 @@ void m68000_device::svs_dais_if() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113295,7 +113296,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113321,11 +113322,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113345,7 +113346,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113355,7 +113356,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113379,7 +113380,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113407,7 +113408,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113434,7 +113435,7 @@ void m68000_device::svs_adr16_if() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113457,7 +113458,7 @@ void m68000_device::svs_adr16_if() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113478,7 +113479,7 @@ void m68000_device::svs_adr16_if() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113488,7 +113489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113512,7 +113513,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113540,7 +113541,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113565,7 +113566,7 @@ void m68000_device::svs_adr32_if() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113589,7 +113590,7 @@ void m68000_device::svs_adr32_if() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113612,7 +113613,7 @@ void m68000_device::svs_adr32_if() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113633,7 +113634,7 @@ void m68000_device::svs_adr32_if() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113643,7 +113644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113667,7 +113668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113695,7 +113696,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113722,7 +113723,7 @@ void m68000_device::spl_ds_if() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -113734,7 +113735,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113761,7 +113762,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113786,7 +113787,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -113801,7 +113802,7 @@ void m68000_device::dbpl_ds_rel16_if() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -113813,13 +113814,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113847,7 +113848,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -113855,7 +113856,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113879,11 +113880,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113913,13 +113914,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113949,7 +113950,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113980,11 +113981,11 @@ void m68000_device::spl_ais_if() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114004,7 +114005,7 @@ void m68000_device::spl_ais_if() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114014,7 +114015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114038,7 +114039,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114066,7 +114067,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114094,12 +114095,12 @@ void m68000_device::spl_aips_if() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114120,7 +114121,7 @@ void m68000_device::spl_aips_if() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114130,7 +114131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114154,7 +114155,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114182,7 +114183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114209,7 +114210,7 @@ void m68000_device::spl_pais_if() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114217,7 +114218,7 @@ void m68000_device::spl_pais_if() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114238,7 +114239,7 @@ void m68000_device::spl_pais_if() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114248,7 +114249,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114272,7 +114273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114300,7 +114301,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114325,7 +114326,7 @@ void m68000_device::spl_das_if() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114348,11 +114349,11 @@ void m68000_device::spl_das_if() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114372,7 +114373,7 @@ void m68000_device::spl_das_if() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114382,7 +114383,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114406,7 +114407,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114434,7 +114435,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114457,14 +114458,14 @@ void m68000_device::spl_dais_if() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114472,7 +114473,7 @@ void m68000_device::spl_dais_if() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114496,7 +114497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114522,11 +114523,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114546,7 +114547,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114556,7 +114557,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114580,7 +114581,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114608,7 +114609,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114635,7 +114636,7 @@ void m68000_device::spl_adr16_if() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114658,7 +114659,7 @@ void m68000_device::spl_adr16_if() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114679,7 +114680,7 @@ void m68000_device::spl_adr16_if() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114689,7 +114690,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114713,7 +114714,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114741,7 +114742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114766,7 +114767,7 @@ void m68000_device::spl_adr32_if() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114790,7 +114791,7 @@ void m68000_device::spl_adr32_if() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114813,7 +114814,7 @@ void m68000_device::spl_adr32_if() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114834,7 +114835,7 @@ void m68000_device::spl_adr32_if() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114844,7 +114845,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114868,7 +114869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114896,7 +114897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114923,7 +114924,7 @@ void m68000_device::smi_ds_if() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -114935,7 +114936,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114962,7 +114963,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114987,7 +114988,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -115002,7 +115003,7 @@ void m68000_device::dbmi_ds_rel16_if() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -115014,13 +115015,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115048,7 +115049,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -115056,7 +115057,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115080,11 +115081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115114,13 +115115,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115150,7 +115151,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115181,11 +115182,11 @@ void m68000_device::smi_ais_if() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115205,7 +115206,7 @@ void m68000_device::smi_ais_if() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115215,7 +115216,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115239,7 +115240,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115267,7 +115268,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115295,12 +115296,12 @@ void m68000_device::smi_aips_if() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115321,7 +115322,7 @@ void m68000_device::smi_aips_if() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115331,7 +115332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115355,7 +115356,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115383,7 +115384,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115410,7 +115411,7 @@ void m68000_device::smi_pais_if() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115418,7 +115419,7 @@ void m68000_device::smi_pais_if() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115439,7 +115440,7 @@ void m68000_device::smi_pais_if() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115449,7 +115450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115473,7 +115474,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115501,7 +115502,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115526,7 +115527,7 @@ void m68000_device::smi_das_if() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115549,11 +115550,11 @@ void m68000_device::smi_das_if() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115573,7 +115574,7 @@ void m68000_device::smi_das_if() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115583,7 +115584,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115607,7 +115608,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115635,7 +115636,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115658,14 +115659,14 @@ void m68000_device::smi_dais_if() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115673,7 +115674,7 @@ void m68000_device::smi_dais_if() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115697,7 +115698,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115723,11 +115724,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115747,7 +115748,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115757,7 +115758,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115781,7 +115782,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115809,7 +115810,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115836,7 +115837,7 @@ void m68000_device::smi_adr16_if() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115859,7 +115860,7 @@ void m68000_device::smi_adr16_if() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115880,7 +115881,7 @@ void m68000_device::smi_adr16_if() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115890,7 +115891,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115914,7 +115915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115942,7 +115943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115967,7 +115968,7 @@ void m68000_device::smi_adr32_if() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115991,7 +115992,7 @@ void m68000_device::smi_adr32_if() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116014,7 +116015,7 @@ void m68000_device::smi_adr32_if() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116035,7 +116036,7 @@ void m68000_device::smi_adr32_if() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116045,7 +116046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116069,7 +116070,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116097,7 +116098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116124,7 +116125,7 @@ void m68000_device::sge_ds_if() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -116136,7 +116137,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116163,7 +116164,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116188,7 +116189,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116203,7 +116204,7 @@ void m68000_device::dbge_ds_rel16_if() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -116215,13 +116216,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116249,7 +116250,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -116257,7 +116258,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116281,11 +116282,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116315,13 +116316,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116351,7 +116352,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116382,11 +116383,11 @@ void m68000_device::sge_ais_if() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116406,7 +116407,7 @@ void m68000_device::sge_ais_if() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116416,7 +116417,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116440,7 +116441,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116468,7 +116469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116496,12 +116497,12 @@ void m68000_device::sge_aips_if() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116522,7 +116523,7 @@ void m68000_device::sge_aips_if() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116532,7 +116533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116556,7 +116557,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116584,7 +116585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116611,7 +116612,7 @@ void m68000_device::sge_pais_if() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116619,7 +116620,7 @@ void m68000_device::sge_pais_if() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116640,7 +116641,7 @@ void m68000_device::sge_pais_if() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116650,7 +116651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116674,7 +116675,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116702,7 +116703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116727,7 +116728,7 @@ void m68000_device::sge_das_if() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116750,11 +116751,11 @@ void m68000_device::sge_das_if() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116774,7 +116775,7 @@ void m68000_device::sge_das_if() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116784,7 +116785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116808,7 +116809,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116836,7 +116837,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116859,14 +116860,14 @@ void m68000_device::sge_dais_if() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -116874,7 +116875,7 @@ void m68000_device::sge_dais_if() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116898,7 +116899,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116924,11 +116925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116948,7 +116949,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116958,7 +116959,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116982,7 +116983,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117010,7 +117011,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117037,7 +117038,7 @@ void m68000_device::sge_adr16_if() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117060,7 +117061,7 @@ void m68000_device::sge_adr16_if() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117081,7 +117082,7 @@ void m68000_device::sge_adr16_if() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117091,7 +117092,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117115,7 +117116,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117143,7 +117144,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117168,7 +117169,7 @@ void m68000_device::sge_adr32_if() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117192,7 +117193,7 @@ void m68000_device::sge_adr32_if() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117215,7 +117216,7 @@ void m68000_device::sge_adr32_if() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117236,7 +117237,7 @@ void m68000_device::sge_adr32_if() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117246,7 +117247,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117270,7 +117271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117298,7 +117299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117325,7 +117326,7 @@ void m68000_device::slt_ds_if() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117337,7 +117338,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117364,7 +117365,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117389,7 +117390,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117404,7 +117405,7 @@ void m68000_device::dblt_ds_rel16_if() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117416,13 +117417,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117450,7 +117451,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117458,7 +117459,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117482,11 +117483,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117516,13 +117517,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117552,7 +117553,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117583,11 +117584,11 @@ void m68000_device::slt_ais_if() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117607,7 +117608,7 @@ void m68000_device::slt_ais_if() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117617,7 +117618,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117641,7 +117642,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117669,7 +117670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117697,12 +117698,12 @@ void m68000_device::slt_aips_if() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117723,7 +117724,7 @@ void m68000_device::slt_aips_if() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117733,7 +117734,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117757,7 +117758,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117785,7 +117786,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117812,7 +117813,7 @@ void m68000_device::slt_pais_if() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117820,7 +117821,7 @@ void m68000_device::slt_pais_if() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117841,7 +117842,7 @@ void m68000_device::slt_pais_if() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117851,7 +117852,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117875,7 +117876,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117903,7 +117904,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117928,7 +117929,7 @@ void m68000_device::slt_das_if() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117951,11 +117952,11 @@ void m68000_device::slt_das_if() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117975,7 +117976,7 @@ void m68000_device::slt_das_if() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117985,7 +117986,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118009,7 +118010,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118037,7 +118038,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118060,14 +118061,14 @@ void m68000_device::slt_dais_if() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118075,7 +118076,7 @@ void m68000_device::slt_dais_if() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118099,7 +118100,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118125,11 +118126,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118149,7 +118150,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118159,7 +118160,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118183,7 +118184,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118211,7 +118212,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118238,7 +118239,7 @@ void m68000_device::slt_adr16_if() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118261,7 +118262,7 @@ void m68000_device::slt_adr16_if() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118282,7 +118283,7 @@ void m68000_device::slt_adr16_if() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118316,7 +118317,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118344,7 +118345,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118369,7 +118370,7 @@ void m68000_device::slt_adr32_if() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118393,7 +118394,7 @@ void m68000_device::slt_adr32_if() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118416,7 +118417,7 @@ void m68000_device::slt_adr32_if() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118437,7 +118438,7 @@ void m68000_device::slt_adr32_if() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118447,7 +118448,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118471,7 +118472,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118499,7 +118500,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118526,7 +118527,7 @@ void m68000_device::sgt_ds_if() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118538,7 +118539,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118565,7 +118566,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118590,7 +118591,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118605,7 +118606,7 @@ void m68000_device::dbgt_ds_rel16_if() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118617,13 +118618,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118651,7 +118652,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118659,7 +118660,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118683,11 +118684,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118717,13 +118718,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118753,7 +118754,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118784,11 +118785,11 @@ void m68000_device::sgt_ais_if() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118808,7 +118809,7 @@ void m68000_device::sgt_ais_if() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118818,7 +118819,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118842,7 +118843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118870,7 +118871,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118898,12 +118899,12 @@ void m68000_device::sgt_aips_if() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118924,7 +118925,7 @@ void m68000_device::sgt_aips_if() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118934,7 +118935,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118958,7 +118959,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118986,7 +118987,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119013,7 +119014,7 @@ void m68000_device::sgt_pais_if() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119021,7 +119022,7 @@ void m68000_device::sgt_pais_if() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119042,7 +119043,7 @@ void m68000_device::sgt_pais_if() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119052,7 +119053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119076,7 +119077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119104,7 +119105,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119129,7 +119130,7 @@ void m68000_device::sgt_das_if() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119152,11 +119153,11 @@ void m68000_device::sgt_das_if() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119176,7 +119177,7 @@ void m68000_device::sgt_das_if() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119186,7 +119187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119210,7 +119211,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119238,7 +119239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119261,14 +119262,14 @@ void m68000_device::sgt_dais_if() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119276,7 +119277,7 @@ void m68000_device::sgt_dais_if() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119300,7 +119301,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119326,11 +119327,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119350,7 +119351,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119360,7 +119361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119384,7 +119385,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119412,7 +119413,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119439,7 +119440,7 @@ void m68000_device::sgt_adr16_if() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119462,7 +119463,7 @@ void m68000_device::sgt_adr16_if() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119483,7 +119484,7 @@ void m68000_device::sgt_adr16_if() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119493,7 +119494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119545,7 +119546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119570,7 +119571,7 @@ void m68000_device::sgt_adr32_if() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119594,7 +119595,7 @@ void m68000_device::sgt_adr32_if() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119617,7 +119618,7 @@ void m68000_device::sgt_adr32_if() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119638,7 +119639,7 @@ void m68000_device::sgt_adr32_if() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119648,7 +119649,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119672,7 +119673,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119700,7 +119701,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119727,7 +119728,7 @@ void m68000_device::sle_ds_if() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119739,7 +119740,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119766,7 +119767,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119791,7 +119792,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119806,7 +119807,7 @@ void m68000_device::dble_ds_rel16_if() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -119818,13 +119819,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119852,7 +119853,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -119860,7 +119861,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119884,11 +119885,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119918,13 +119919,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119954,7 +119955,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119985,11 +119986,11 @@ void m68000_device::sle_ais_if() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120009,7 +120010,7 @@ void m68000_device::sle_ais_if() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120019,7 +120020,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120043,7 +120044,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120071,7 +120072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120099,12 +120100,12 @@ void m68000_device::sle_aips_if() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120125,7 +120126,7 @@ void m68000_device::sle_aips_if() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120135,7 +120136,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120159,7 +120160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120187,7 +120188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120214,7 +120215,7 @@ void m68000_device::sle_pais_if() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120222,7 +120223,7 @@ void m68000_device::sle_pais_if() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120243,7 +120244,7 @@ void m68000_device::sle_pais_if() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120253,7 +120254,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120277,7 +120278,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120305,7 +120306,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120330,7 +120331,7 @@ void m68000_device::sle_das_if() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120353,11 +120354,11 @@ void m68000_device::sle_das_if() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120377,7 +120378,7 @@ void m68000_device::sle_das_if() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120387,7 +120388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120411,7 +120412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120439,7 +120440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120462,14 +120463,14 @@ void m68000_device::sle_dais_if() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120477,7 +120478,7 @@ void m68000_device::sle_dais_if() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120501,7 +120502,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120527,11 +120528,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120551,7 +120552,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120561,7 +120562,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120585,7 +120586,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120613,7 +120614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120640,7 +120641,7 @@ void m68000_device::sle_adr16_if() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120663,7 +120664,7 @@ void m68000_device::sle_adr16_if() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120684,7 +120685,7 @@ void m68000_device::sle_adr16_if() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120694,7 +120695,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120718,7 +120719,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120746,7 +120747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120771,7 +120772,7 @@ void m68000_device::sle_adr32_if() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120795,7 +120796,7 @@ void m68000_device::sle_adr32_if() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120818,7 +120819,7 @@ void m68000_device::sle_adr32_if() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120839,7 +120840,7 @@ void m68000_device::sle_adr32_if() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120849,7 +120850,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120873,7 +120874,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120901,7 +120902,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -121102,7 +121103,7 @@ void m68000_device::bsr_rel16_if() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -121209,7 +121210,7 @@ void m68000_device::bsr_rel8_if() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -123811,7 +123812,7 @@ void m68000_device::moveq_imm8o_dd_if() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -123851,7 +123852,7 @@ void m68000_device::or_b_ds_dd_if() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123859,7 +123860,7 @@ void m68000_device::or_b_ds_dd_if() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -123892,11 +123893,11 @@ void m68000_device::or_b_ais_dd_if() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -123916,7 +123917,7 @@ void m68000_device::or_b_ais_dd_if() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123924,7 +123925,7 @@ void m68000_device::or_b_ais_dd_if() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -123960,12 +123961,12 @@ void m68000_device::or_b_aips_dd_if() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123986,7 +123987,7 @@ void m68000_device::or_b_aips_dd_if() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123994,7 +123995,7 @@ void m68000_device::or_b_aips_dd_if() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124029,7 +124030,7 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124037,7 +124038,7 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124058,7 +124059,7 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124066,7 +124067,7 @@ void m68000_device::or_b_pais_dd_if() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124099,7 +124100,7 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124122,11 +124123,11 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124146,7 +124147,7 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124154,7 +124155,7 @@ void m68000_device::or_b_das_dd_if() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124185,14 +124186,14 @@ void m68000_device::or_b_dais_dd_if() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124200,7 +124201,7 @@ void m68000_device::or_b_dais_dd_if() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124224,7 +124225,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124250,11 +124251,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124274,7 +124275,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124282,7 +124283,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124317,7 +124318,7 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124340,7 +124341,7 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124361,7 +124362,7 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124369,7 +124370,7 @@ void m68000_device::or_b_adr16_dd_if() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124402,7 +124403,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124426,7 +124427,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124449,7 +124450,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124470,7 +124471,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124478,7 +124479,7 @@ void m68000_device::or_b_adr32_dd_if() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124510,7 +124511,7 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124533,11 +124534,11 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124557,7 +124558,7 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124565,7 +124566,7 @@ void m68000_device::or_b_dpc_dd_if() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124595,14 +124596,14 @@ void m68000_device::or_b_dpci_dd_if() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124610,7 +124611,7 @@ void m68000_device::or_b_dpci_dd_if() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124634,7 +124635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124660,11 +124661,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124684,7 +124685,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124692,7 +124693,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124727,7 +124728,7 @@ void m68000_device::or_b_imm8_dd_if() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124751,7 +124752,7 @@ void m68000_device::or_b_imm8_dd_if() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124759,7 +124760,7 @@ void m68000_device::or_b_imm8_dd_if() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124794,7 +124795,7 @@ void m68000_device::or_w_ds_dd_if() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124802,7 +124803,7 @@ void m68000_device::or_w_ds_dd_if() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124835,11 +124836,11 @@ void m68000_device::or_w_ais_dd_if() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124862,7 +124863,7 @@ void m68000_device::or_w_ais_dd_if() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124870,7 +124871,7 @@ void m68000_device::or_w_ais_dd_if() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124906,12 +124907,12 @@ void m68000_device::or_w_aips_dd_if() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -124935,7 +124936,7 @@ void m68000_device::or_w_aips_dd_if() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124943,7 +124944,7 @@ void m68000_device::or_w_aips_dd_if() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124978,7 +124979,7 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124986,7 +124987,7 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125010,7 +125011,7 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125018,7 +125019,7 @@ void m68000_device::or_w_pais_dd_if() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125051,7 +125052,7 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125074,11 +125075,11 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125101,7 +125102,7 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125109,7 +125110,7 @@ void m68000_device::or_w_das_dd_if() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125140,14 +125141,14 @@ void m68000_device::or_w_dais_dd_if() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125155,7 +125156,7 @@ void m68000_device::or_w_dais_dd_if() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125179,7 +125180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125205,11 +125206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125232,7 +125233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125240,7 +125241,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125275,7 +125276,7 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125298,7 +125299,7 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125322,7 +125323,7 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125330,7 +125331,7 @@ void m68000_device::or_w_adr16_dd_if() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125363,7 +125364,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125387,7 +125388,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125410,7 +125411,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125434,7 +125435,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125442,7 +125443,7 @@ void m68000_device::or_w_adr32_dd_if() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125474,7 +125475,7 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125497,11 +125498,11 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125524,7 +125525,7 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125532,7 +125533,7 @@ void m68000_device::or_w_dpc_dd_if() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125562,14 +125563,14 @@ void m68000_device::or_w_dpci_dd_if() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125577,7 +125578,7 @@ void m68000_device::or_w_dpci_dd_if() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125601,7 +125602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125627,11 +125628,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125654,7 +125655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125662,7 +125663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125697,7 +125698,7 @@ void m68000_device::or_w_imm16_dd_if() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125721,7 +125722,7 @@ void m68000_device::or_w_imm16_dd_if() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125729,7 +125730,7 @@ void m68000_device::or_w_imm16_dd_if() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125764,12 +125765,12 @@ void m68000_device::or_l_ds_dd_if() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125789,7 +125790,7 @@ void m68000_device::or_l_ds_dd_if() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -125798,7 +125799,7 @@ void m68000_device::or_l_ds_dd_if() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125814,7 +125815,7 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125839,7 +125840,7 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125862,12 +125863,12 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125893,7 +125894,7 @@ void m68000_device::or_l_ais_dd_if() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125909,7 +125910,7 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125934,11 +125935,11 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125961,12 +125962,12 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125992,7 +125993,7 @@ void m68000_device::or_l_aips_dd_if() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126007,14 +126008,14 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126038,7 +126039,7 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126061,12 +126062,12 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126092,7 +126093,7 @@ void m68000_device::or_l_pais_dd_if() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126108,7 +126109,7 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126130,7 +126131,7 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126155,7 +126156,7 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126178,12 +126179,12 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126209,7 +126210,7 @@ void m68000_device::or_l_das_dd_if() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126223,14 +126224,14 @@ void m68000_device::or_l_dais_dd_if() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126238,7 +126239,7 @@ void m68000_device::or_l_dais_dd_if() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126262,7 +126263,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126287,7 +126288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126312,7 +126313,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126335,12 +126336,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126366,7 +126367,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126384,7 +126385,7 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126407,7 +126408,7 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126432,7 +126433,7 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126455,12 +126456,12 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126486,7 +126487,7 @@ void m68000_device::or_l_adr16_dd_if() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126502,7 +126503,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126526,7 +126527,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126549,7 +126550,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126574,7 +126575,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126597,12 +126598,12 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126628,7 +126629,7 @@ void m68000_device::or_l_adr32_dd_if() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126643,7 +126644,7 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126665,7 +126666,7 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126690,7 +126691,7 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126713,12 +126714,12 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126744,7 +126745,7 @@ void m68000_device::or_l_dpc_dd_if() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126757,14 +126758,14 @@ void m68000_device::or_l_dpci_dd_if() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126772,7 +126773,7 @@ void m68000_device::or_l_dpci_dd_if() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126796,7 +126797,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126821,7 +126822,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126846,7 +126847,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126869,12 +126870,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126900,7 +126901,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126916,7 +126917,7 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126940,7 +126941,7 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126964,12 +126965,12 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126989,7 +126990,7 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -126998,7 +126999,7 @@ void m68000_device::or_l_imm32_dd_if() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -127016,13 +127017,13 @@ void m68000_device::divu_w_ds_dd_if() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127035,7 +127036,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127053,7 +127054,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127061,7 +127062,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127086,7 +127087,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127109,7 +127110,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127230,7 +127231,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127260,7 +127261,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127271,7 +127272,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127283,7 +127284,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127303,7 +127304,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127314,7 +127315,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127324,13 +127325,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127341,7 +127342,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127351,7 +127352,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127359,7 +127360,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127394,7 +127395,7 @@ void m68000_device::divu_w_ais_dd_if() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -127420,13 +127421,13 @@ void m68000_device::divu_w_ais_dd_if() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127439,7 +127440,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127457,7 +127458,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127465,7 +127466,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127490,7 +127491,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127513,7 +127514,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127634,7 +127635,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127664,7 +127665,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127675,7 +127676,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127687,7 +127688,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127707,7 +127708,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127718,7 +127719,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127728,13 +127729,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127745,7 +127746,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127755,7 +127756,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127763,7 +127764,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127804,7 +127805,7 @@ void m68000_device::divu_w_aips_dd_if() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -127828,13 +127829,13 @@ void m68000_device::divu_w_aips_dd_if() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127847,7 +127848,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127865,7 +127866,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127873,7 +127874,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127898,7 +127899,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127921,7 +127922,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128042,7 +128043,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128072,7 +128073,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128083,7 +128084,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128095,7 +128096,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128115,7 +128116,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128126,7 +128127,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128136,13 +128137,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128153,7 +128154,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128163,7 +128164,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128171,7 +128172,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128214,7 +128215,7 @@ void m68000_device::divu_w_pais_dd_if() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -128238,13 +128239,13 @@ void m68000_device::divu_w_pais_dd_if() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128257,7 +128258,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128275,7 +128276,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128283,7 +128284,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128308,7 +128309,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128331,7 +128332,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128452,7 +128453,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128482,7 +128483,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128493,7 +128494,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128505,7 +128506,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128525,7 +128526,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128536,7 +128537,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128546,13 +128547,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128563,7 +128564,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128573,7 +128574,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128581,7 +128582,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128638,7 +128639,7 @@ void m68000_device::divu_w_das_dd_if() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -128664,13 +128665,13 @@ void m68000_device::divu_w_das_dd_if() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128683,7 +128684,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128701,7 +128702,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128709,7 +128710,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128734,7 +128735,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128757,7 +128758,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128878,7 +128879,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128908,7 +128909,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128919,7 +128920,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128931,7 +128932,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128951,7 +128952,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128962,7 +128963,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128972,13 +128973,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128989,7 +128990,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128999,7 +129000,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129007,7 +129008,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129040,7 +129041,7 @@ void m68000_device::divu_w_dais_dd_if() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129102,7 +129103,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -129128,13 +129129,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129147,7 +129148,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129165,7 +129166,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129173,7 +129174,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129198,7 +129199,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129221,7 +129222,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129342,7 +129343,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129372,7 +129373,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129383,7 +129384,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129395,7 +129396,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129415,7 +129416,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129426,7 +129427,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129436,13 +129437,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129453,7 +129454,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129463,7 +129464,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129471,7 +129472,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129529,7 +129530,7 @@ void m68000_device::divu_w_adr16_dd_if() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -129553,13 +129554,13 @@ void m68000_device::divu_w_adr16_dd_if() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129572,7 +129573,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129590,7 +129591,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129598,7 +129599,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129623,7 +129624,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129646,7 +129647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129767,7 +129768,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129797,7 +129798,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129808,7 +129809,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129820,7 +129821,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129840,7 +129841,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129851,7 +129852,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129861,13 +129862,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129878,7 +129879,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129888,7 +129889,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129896,7 +129897,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129975,7 +129976,7 @@ void m68000_device::divu_w_adr32_dd_if() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -129999,13 +130000,13 @@ void m68000_device::divu_w_adr32_dd_if() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130018,7 +130019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130036,7 +130037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130044,7 +130045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130069,7 +130070,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130092,7 +130093,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130213,7 +130214,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130243,7 +130244,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130254,7 +130255,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130266,7 +130267,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130286,7 +130287,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130297,7 +130298,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130307,13 +130308,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130324,7 +130325,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130334,7 +130335,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130342,7 +130343,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130398,7 +130399,7 @@ void m68000_device::divu_w_dpc_dd_if() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130424,13 +130425,13 @@ void m68000_device::divu_w_dpc_dd_if() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130443,7 +130444,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130461,7 +130462,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130469,7 +130470,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130494,7 +130495,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130517,7 +130518,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130638,7 +130639,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130668,7 +130669,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130679,7 +130680,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130691,7 +130692,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130711,7 +130712,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130722,7 +130723,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130732,13 +130733,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130749,7 +130750,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130759,7 +130760,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130767,7 +130768,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130799,7 +130800,7 @@ void m68000_device::divu_w_dpci_dd_if() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130861,7 +130862,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130887,13 +130888,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130906,7 +130907,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130924,7 +130925,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130932,7 +130933,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130957,7 +130958,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130980,7 +130981,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131101,7 +131102,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131131,7 +131132,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131142,7 +131143,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131154,7 +131155,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131174,7 +131175,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131185,7 +131186,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131195,13 +131196,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131212,7 +131213,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131222,7 +131223,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131230,7 +131231,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131290,13 +131291,13 @@ void m68000_device::divu_w_imm16_dd_if() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -131309,7 +131310,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131327,7 +131328,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -131335,7 +131336,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131360,7 +131361,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131383,7 +131384,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131504,7 +131505,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131534,7 +131535,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131545,7 +131546,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131557,7 +131558,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131577,7 +131578,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131588,7 +131589,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131598,13 +131599,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131615,7 +131616,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131625,7 +131626,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131633,7 +131634,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131670,12 +131671,12 @@ void m68000_device::sbcd_ds_dd_if() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -131720,7 +131721,7 @@ void m68000_device::sbcd_pais_paid_if() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -131760,12 +131761,12 @@ void m68000_device::sbcd_pais_paid_if() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -131815,11 +131816,11 @@ void m68000_device::or_b_dd_ais_if() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -131839,7 +131840,7 @@ void m68000_device::or_b_dd_ais_if() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131866,7 +131867,7 @@ void m68000_device::or_b_dd_ais_if() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131895,12 +131896,12 @@ void m68000_device::or_b_dd_aips_if() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131921,7 +131922,7 @@ void m68000_device::or_b_dd_aips_if() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131948,7 +131949,7 @@ void m68000_device::or_b_dd_aips_if() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131976,7 +131977,7 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131984,7 +131985,7 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132005,7 +132006,7 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132032,7 +132033,7 @@ void m68000_device::or_b_dd_pais_if() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132058,7 +132059,7 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132081,11 +132082,11 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132105,7 +132106,7 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132132,7 +132133,7 @@ void m68000_device::or_b_dd_das_if() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132156,14 +132157,14 @@ void m68000_device::or_b_dd_dais_if() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132171,7 +132172,7 @@ void m68000_device::or_b_dd_dais_if() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132195,7 +132196,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132221,11 +132222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132245,7 +132246,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132272,7 +132273,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132300,7 +132301,7 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132323,7 +132324,7 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132344,7 +132345,7 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132371,7 +132372,7 @@ void m68000_device::or_b_dd_adr16_if() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132397,7 +132398,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132421,7 +132422,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132444,7 +132445,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132465,7 +132466,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132492,7 +132493,7 @@ void m68000_device::or_b_dd_adr32_if() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132518,11 +132519,11 @@ void m68000_device::or_w_dd_ais_if() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132545,7 +132546,7 @@ void m68000_device::or_w_dd_ais_if() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132572,7 +132573,7 @@ void m68000_device::or_w_dd_ais_if() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132606,12 +132607,12 @@ void m68000_device::or_w_dd_aips_if() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -132635,7 +132636,7 @@ void m68000_device::or_w_dd_aips_if() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132662,7 +132663,7 @@ void m68000_device::or_w_dd_aips_if() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132695,7 +132696,7 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132703,7 +132704,7 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -132727,7 +132728,7 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132754,7 +132755,7 @@ void m68000_device::or_w_dd_pais_if() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132785,7 +132786,7 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132808,11 +132809,11 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132835,7 +132836,7 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132862,7 +132863,7 @@ void m68000_device::or_w_dd_das_if() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132891,14 +132892,14 @@ void m68000_device::or_w_dd_dais_if() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132906,7 +132907,7 @@ void m68000_device::or_w_dd_dais_if() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132930,7 +132931,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132956,11 +132957,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132983,7 +132984,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133010,7 +133011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133043,7 +133044,7 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133066,7 +133067,7 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133090,7 +133091,7 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133117,7 +133118,7 @@ void m68000_device::or_w_dd_adr16_if() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133148,7 +133149,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133172,7 +133173,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133195,7 +133196,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133219,7 +133220,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133246,7 +133247,7 @@ void m68000_device::or_w_dd_adr32_if() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133277,7 +133278,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133302,7 +133303,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133325,7 +133326,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133350,7 +133351,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133375,7 +133376,7 @@ void m68000_device::or_l_dd_ais_if() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133406,7 +133407,7 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133431,11 +133432,11 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133458,7 +133459,7 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133483,7 +133484,7 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133508,7 +133509,7 @@ void m68000_device::or_l_dd_aips_if() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133538,14 +133539,14 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133569,7 +133570,7 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133592,7 +133593,7 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133617,7 +133618,7 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133642,7 +133643,7 @@ void m68000_device::or_l_dd_pais_if() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133673,7 +133674,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133695,7 +133696,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133720,7 +133721,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133743,7 +133744,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133768,7 +133769,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133793,7 +133794,7 @@ void m68000_device::or_l_dd_das_if() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133822,14 +133823,14 @@ void m68000_device::or_l_dd_dais_if() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -133837,7 +133838,7 @@ void m68000_device::or_l_dd_dais_if() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133861,7 +133862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133886,7 +133887,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133911,7 +133912,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133934,7 +133935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133959,7 +133960,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133984,7 +133985,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134017,7 +134018,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134040,7 +134041,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -134065,7 +134066,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134088,7 +134089,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134113,7 +134114,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134138,7 +134139,7 @@ void m68000_device::or_l_dd_adr16_if() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134169,7 +134170,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134193,7 +134194,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134216,7 +134217,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -134241,7 +134242,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134264,7 +134265,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134289,7 +134290,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134314,7 +134315,7 @@ void m68000_device::or_l_dd_adr32_if() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134347,13 +134348,13 @@ void m68000_device::divs_w_ds_dd_if() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134367,7 +134368,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134377,7 +134378,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134392,7 +134393,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134400,7 +134401,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134425,7 +134426,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134448,7 +134449,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134564,7 +134565,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -134573,7 +134574,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -134581,12 +134582,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134594,7 +134595,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134611,7 +134612,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -134619,7 +134620,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134649,7 +134650,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134676,13 +134677,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134690,27 +134691,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134722,7 +134723,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134734,7 +134735,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134749,7 +134750,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134758,7 +134759,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134766,7 +134767,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134776,7 +134777,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134785,7 +134786,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134797,7 +134798,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134845,7 +134846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -134858,7 +134859,7 @@ void m68000_device::divs_w_ais_dd_if() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -134884,13 +134885,13 @@ void m68000_device::divs_w_ais_dd_if() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134904,7 +134905,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134914,7 +134915,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134929,7 +134930,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134937,7 +134938,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134962,7 +134963,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134985,7 +134986,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135101,7 +135102,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135110,7 +135111,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135118,12 +135119,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135131,7 +135132,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135148,7 +135149,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135156,7 +135157,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135186,7 +135187,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135213,13 +135214,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135227,27 +135228,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135259,7 +135260,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135271,7 +135272,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135286,7 +135287,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135295,7 +135296,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135303,7 +135304,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135313,7 +135314,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135322,7 +135323,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135334,7 +135335,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135382,7 +135383,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135401,7 +135402,7 @@ void m68000_device::divs_w_aips_dd_if() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -135425,13 +135426,13 @@ void m68000_device::divs_w_aips_dd_if() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135445,7 +135446,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135455,7 +135456,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135470,7 +135471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -135478,7 +135479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135503,7 +135504,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135526,7 +135527,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135642,7 +135643,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135651,7 +135652,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135659,12 +135660,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135672,7 +135673,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135689,7 +135690,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135697,7 +135698,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135727,7 +135728,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135754,13 +135755,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135768,27 +135769,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135800,7 +135801,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135812,7 +135813,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135827,7 +135828,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135836,7 +135837,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135844,7 +135845,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135854,7 +135855,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135863,7 +135864,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135875,7 +135876,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135923,7 +135924,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135944,7 +135945,7 @@ void m68000_device::divs_w_pais_dd_if() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -135968,13 +135969,13 @@ void m68000_device::divs_w_pais_dd_if() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135988,7 +135989,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135998,7 +135999,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136013,7 +136014,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136021,7 +136022,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136046,7 +136047,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136069,7 +136070,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136185,7 +136186,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136194,7 +136195,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136202,12 +136203,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136215,7 +136216,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136232,7 +136233,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136240,7 +136241,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136270,7 +136271,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136297,13 +136298,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136311,27 +136312,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136343,7 +136344,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136355,7 +136356,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136370,7 +136371,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136379,7 +136380,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136387,7 +136388,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136397,7 +136398,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136406,7 +136407,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136418,7 +136419,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136466,7 +136467,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -136501,7 +136502,7 @@ void m68000_device::divs_w_das_dd_if() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -136527,13 +136528,13 @@ void m68000_device::divs_w_das_dd_if() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136547,7 +136548,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136557,7 +136558,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136572,7 +136573,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136580,7 +136581,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136605,7 +136606,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136628,7 +136629,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136744,7 +136745,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136753,7 +136754,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136761,12 +136762,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136774,7 +136775,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136791,7 +136792,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136799,7 +136800,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136829,7 +136830,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136856,13 +136857,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136870,27 +136871,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136902,7 +136903,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136914,7 +136915,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136929,7 +136930,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136938,7 +136939,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136946,7 +136947,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136956,7 +136957,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136965,7 +136966,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136977,7 +136978,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137025,7 +137026,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137036,7 +137037,7 @@ void m68000_device::divs_w_dais_dd_if() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -137098,7 +137099,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -137124,13 +137125,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137144,7 +137145,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137154,7 +137155,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137169,7 +137170,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137177,7 +137178,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137202,7 +137203,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137225,7 +137226,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137341,7 +137342,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137350,7 +137351,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137358,12 +137359,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137371,7 +137372,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137388,7 +137389,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137396,7 +137397,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137426,7 +137427,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137453,13 +137454,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137467,27 +137468,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137499,7 +137500,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137511,7 +137512,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137526,7 +137527,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137535,7 +137536,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137543,7 +137544,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137553,7 +137554,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137562,7 +137563,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137574,7 +137575,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137622,7 +137623,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137658,7 +137659,7 @@ void m68000_device::divs_w_adr16_dd_if() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -137682,13 +137683,13 @@ void m68000_device::divs_w_adr16_dd_if() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137702,7 +137703,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137712,7 +137713,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137727,7 +137728,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137735,7 +137736,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137760,7 +137761,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137783,7 +137784,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137899,7 +137900,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137908,7 +137909,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137916,12 +137917,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137929,7 +137930,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137946,7 +137947,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137954,7 +137955,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137984,7 +137985,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138011,13 +138012,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138025,27 +138026,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138057,7 +138058,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138069,7 +138070,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138084,7 +138085,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138093,7 +138094,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138101,7 +138102,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138111,7 +138112,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138120,7 +138121,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138132,7 +138133,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138180,7 +138181,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138237,7 +138238,7 @@ void m68000_device::divs_w_adr32_dd_if() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -138261,13 +138262,13 @@ void m68000_device::divs_w_adr32_dd_if() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138281,7 +138282,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138291,7 +138292,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138306,7 +138307,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138314,7 +138315,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138339,7 +138340,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138362,7 +138363,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138478,7 +138479,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -138487,7 +138488,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -138495,12 +138496,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138508,7 +138509,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138525,7 +138526,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -138533,7 +138534,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -138563,7 +138564,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138590,13 +138591,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138604,27 +138605,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138636,7 +138637,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138648,7 +138649,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138663,7 +138664,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138672,7 +138673,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138680,7 +138681,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138690,7 +138691,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138699,7 +138700,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138711,7 +138712,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138759,7 +138760,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138793,7 +138794,7 @@ void m68000_device::divs_w_dpc_dd_if() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -138819,13 +138820,13 @@ void m68000_device::divs_w_dpc_dd_if() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138839,7 +138840,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138849,7 +138850,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138864,7 +138865,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138872,7 +138873,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138897,7 +138898,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138920,7 +138921,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139036,7 +139037,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139045,7 +139046,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139053,12 +139054,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139066,7 +139067,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139083,7 +139084,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139091,7 +139092,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139121,7 +139122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139148,13 +139149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139162,27 +139163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139194,7 +139195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139206,7 +139207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139221,7 +139222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139230,7 +139231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139238,7 +139239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139248,7 +139249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139257,7 +139258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139269,7 +139270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139317,7 +139318,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139327,7 +139328,7 @@ void m68000_device::divs_w_dpci_dd_if() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -139389,7 +139390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -139415,13 +139416,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139435,7 +139436,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139445,7 +139446,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139460,7 +139461,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -139468,7 +139469,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139493,7 +139494,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139516,7 +139517,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139632,7 +139633,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139641,7 +139642,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139649,12 +139650,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139662,7 +139663,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139679,7 +139680,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139687,7 +139688,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139717,7 +139718,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139744,13 +139745,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139758,27 +139759,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139790,7 +139791,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139802,7 +139803,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139817,7 +139818,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139826,7 +139827,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139834,7 +139835,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139844,7 +139845,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139853,7 +139854,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139865,7 +139866,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139913,7 +139914,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139951,13 +139952,13 @@ void m68000_device::divs_w_imm16_dd_if() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139971,7 +139972,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139981,7 +139982,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139996,7 +139997,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -140004,7 +140005,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140029,7 +140030,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140052,7 +140053,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140168,7 +140169,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -140177,7 +140178,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -140185,12 +140186,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140198,7 +140199,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140215,7 +140216,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -140223,7 +140224,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -140253,7 +140254,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140280,13 +140281,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140294,27 +140295,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140326,7 +140327,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140338,7 +140339,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140353,7 +140354,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140362,7 +140363,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140370,7 +140371,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140380,7 +140381,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140389,7 +140390,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140401,7 +140402,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140449,7 +140450,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -140464,7 +140465,7 @@ void m68000_device::sub_b_ds_dd_if() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140504,7 +140505,7 @@ void m68000_device::sub_b_ais_dd_if() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140527,7 +140528,7 @@ void m68000_device::sub_b_ais_dd_if() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140573,7 +140574,7 @@ void m68000_device::sub_b_aips_dd_if() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140594,7 +140595,7 @@ void m68000_device::sub_b_aips_dd_if() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140642,7 +140643,7 @@ void m68000_device::sub_b_pais_dd_if() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140663,7 +140664,7 @@ void m68000_device::sub_b_pais_dd_if() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140725,7 +140726,7 @@ void m68000_device::sub_b_das_dd_if() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140748,7 +140749,7 @@ void m68000_device::sub_b_das_dd_if() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140786,7 +140787,7 @@ void m68000_device::sub_b_dais_dd_if() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -140848,7 +140849,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140871,7 +140872,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140934,7 +140935,7 @@ void m68000_device::sub_b_adr16_dd_if() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140955,7 +140956,7 @@ void m68000_device::sub_b_adr16_dd_if() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141039,7 +141040,7 @@ void m68000_device::sub_b_adr32_dd_if() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141060,7 +141061,7 @@ void m68000_device::sub_b_adr32_dd_if() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141121,7 +141122,7 @@ void m68000_device::sub_b_dpc_dd_if() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141144,7 +141145,7 @@ void m68000_device::sub_b_dpc_dd_if() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141181,7 +141182,7 @@ void m68000_device::sub_b_dpci_dd_if() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141243,7 +141244,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141266,7 +141267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141331,7 +141332,7 @@ void m68000_device::sub_b_imm8_dd_if() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141373,7 +141374,7 @@ void m68000_device::sub_w_ds_dd_if() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141415,7 +141416,7 @@ void m68000_device::sub_w_as_dd_if() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141455,7 +141456,7 @@ void m68000_device::sub_w_ais_dd_if() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141481,7 +141482,7 @@ void m68000_device::sub_w_ais_dd_if() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141527,7 +141528,7 @@ void m68000_device::sub_w_aips_dd_if() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141551,7 +141552,7 @@ void m68000_device::sub_w_aips_dd_if() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141599,7 +141600,7 @@ void m68000_device::sub_w_pais_dd_if() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141623,7 +141624,7 @@ void m68000_device::sub_w_pais_dd_if() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141685,7 +141686,7 @@ void m68000_device::sub_w_das_dd_if() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141711,7 +141712,7 @@ void m68000_device::sub_w_das_dd_if() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141749,7 +141750,7 @@ void m68000_device::sub_w_dais_dd_if() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141811,7 +141812,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141837,7 +141838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141900,7 +141901,7 @@ void m68000_device::sub_w_adr16_dd_if() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141924,7 +141925,7 @@ void m68000_device::sub_w_adr16_dd_if() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142008,7 +142009,7 @@ void m68000_device::sub_w_adr32_dd_if() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142032,7 +142033,7 @@ void m68000_device::sub_w_adr32_dd_if() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142093,7 +142094,7 @@ void m68000_device::sub_w_dpc_dd_if() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142119,7 +142120,7 @@ void m68000_device::sub_w_dpc_dd_if() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142156,7 +142157,7 @@ void m68000_device::sub_w_dpci_dd_if() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -142218,7 +142219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142244,7 +142245,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142309,7 +142310,7 @@ void m68000_device::sub_w_imm16_dd_if() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142351,7 +142352,7 @@ void m68000_device::sub_l_ds_dd_if() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142375,7 +142376,7 @@ void m68000_device::sub_l_ds_dd_if() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142401,7 +142402,7 @@ void m68000_device::sub_l_as_dd_if() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142425,7 +142426,7 @@ void m68000_device::sub_l_as_dd_if() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142449,7 +142450,7 @@ void m68000_device::sub_l_ais_dd_if() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142496,12 +142497,12 @@ void m68000_device::sub_l_ais_dd_if() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142542,7 +142543,7 @@ void m68000_device::sub_l_aips_dd_if() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142592,12 +142593,12 @@ void m68000_device::sub_l_aips_dd_if() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142637,7 +142638,7 @@ void m68000_device::sub_l_pais_dd_if() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -142689,12 +142690,12 @@ void m68000_device::sub_l_pais_dd_if() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142756,7 +142757,7 @@ void m68000_device::sub_l_das_dd_if() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142803,12 +142804,12 @@ void m68000_device::sub_l_das_dd_if() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142847,7 +142848,7 @@ void m68000_device::sub_l_dais_dd_if() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -142908,7 +142909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142955,12 +142956,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143024,7 +143025,7 @@ void m68000_device::sub_l_adr16_dd_if() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143071,12 +143072,12 @@ void m68000_device::sub_l_adr16_dd_if() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143161,7 +143162,7 @@ void m68000_device::sub_l_adr32_dd_if() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143208,12 +143209,12 @@ void m68000_device::sub_l_adr32_dd_if() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143274,7 +143275,7 @@ void m68000_device::sub_l_dpc_dd_if() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143321,12 +143322,12 @@ void m68000_device::sub_l_dpc_dd_if() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143364,7 +143365,7 @@ void m68000_device::sub_l_dpci_dd_if() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -143425,7 +143426,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143472,12 +143473,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143564,7 +143565,7 @@ void m68000_device::sub_l_imm32_dd_if() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -143588,7 +143589,7 @@ void m68000_device::sub_l_imm32_dd_if() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -143614,7 +143615,7 @@ void m68000_device::suba_w_ds_ad_if() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143637,7 +143638,7 @@ void m68000_device::suba_w_ds_ad_if() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143662,7 +143663,7 @@ void m68000_device::suba_w_as_ad_if() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143685,7 +143686,7 @@ void m68000_device::suba_w_as_ad_if() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143708,7 +143709,7 @@ void m68000_device::suba_w_ais_ad_if() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143734,7 +143735,7 @@ void m68000_device::suba_w_ais_ad_if() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143757,7 +143758,7 @@ void m68000_device::suba_w_ais_ad_if() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143786,7 +143787,7 @@ void m68000_device::suba_w_aips_ad_if() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143810,7 +143811,7 @@ void m68000_device::suba_w_aips_ad_if() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143833,7 +143834,7 @@ void m68000_device::suba_w_aips_ad_if() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143864,7 +143865,7 @@ void m68000_device::suba_w_pais_ad_if() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143888,7 +143889,7 @@ void m68000_device::suba_w_pais_ad_if() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143911,7 +143912,7 @@ void m68000_device::suba_w_pais_ad_if() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143956,7 +143957,7 @@ void m68000_device::suba_w_das_ad_if() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143982,7 +143983,7 @@ void m68000_device::suba_w_das_ad_if() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144005,7 +144006,7 @@ void m68000_device::suba_w_das_ad_if() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144026,7 +144027,7 @@ void m68000_device::suba_w_dais_ad_if() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144088,7 +144089,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144114,7 +144115,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144137,7 +144138,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144183,7 +144184,7 @@ void m68000_device::suba_w_adr16_ad_if() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -144207,7 +144208,7 @@ void m68000_device::suba_w_adr16_ad_if() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144230,7 +144231,7 @@ void m68000_device::suba_w_adr16_ad_if() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144297,7 +144298,7 @@ void m68000_device::suba_w_adr32_ad_if() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -144321,7 +144322,7 @@ void m68000_device::suba_w_adr32_ad_if() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144344,7 +144345,7 @@ void m68000_device::suba_w_adr32_ad_if() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144388,7 +144389,7 @@ void m68000_device::suba_w_dpc_ad_if() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144414,7 +144415,7 @@ void m68000_device::suba_w_dpc_ad_if() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144437,7 +144438,7 @@ void m68000_device::suba_w_dpc_ad_if() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144457,7 +144458,7 @@ void m68000_device::suba_w_dpci_ad_if() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144519,7 +144520,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144545,7 +144546,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144568,7 +144569,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144616,7 +144617,7 @@ void m68000_device::suba_w_imm16_ad_if() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144639,7 +144640,7 @@ void m68000_device::suba_w_imm16_ad_if() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144664,7 +144665,7 @@ void m68000_device::subx_b_ds_dd_if() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -144710,7 +144711,7 @@ void m68000_device::subx_b_pais_paid_if() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -144751,7 +144752,7 @@ void m68000_device::subx_b_pais_paid_if() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144803,7 +144804,7 @@ void m68000_device::sub_b_dd_ais_if() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144826,7 +144827,7 @@ void m68000_device::sub_b_dd_ais_if() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144884,7 +144885,7 @@ void m68000_device::sub_b_dd_aips_if() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144905,7 +144906,7 @@ void m68000_device::sub_b_dd_aips_if() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144965,7 +144966,7 @@ void m68000_device::sub_b_dd_pais_if() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144986,7 +144987,7 @@ void m68000_device::sub_b_dd_pais_if() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145060,7 +145061,7 @@ void m68000_device::sub_b_dd_das_if() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145083,7 +145084,7 @@ void m68000_device::sub_b_dd_das_if() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145133,7 +145134,7 @@ void m68000_device::sub_b_dd_dais_if() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -145195,7 +145196,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145218,7 +145219,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145293,7 +145294,7 @@ void m68000_device::sub_b_dd_adr16_if() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145314,7 +145315,7 @@ void m68000_device::sub_b_dd_adr16_if() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145410,7 +145411,7 @@ void m68000_device::sub_b_dd_adr32_if() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145431,7 +145432,7 @@ void m68000_device::sub_b_dd_adr32_if() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145485,7 +145486,7 @@ void m68000_device::subx_w_ds_dd_if() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -145531,7 +145532,7 @@ void m68000_device::subx_w_pais_paid_if() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -145578,7 +145579,7 @@ void m68000_device::subx_w_pais_paid_if() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145635,7 +145636,7 @@ void m68000_device::sub_w_dd_ais_if() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145661,7 +145662,7 @@ void m68000_device::sub_w_dd_ais_if() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145724,7 +145725,7 @@ void m68000_device::sub_w_dd_aips_if() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -145748,7 +145749,7 @@ void m68000_device::sub_w_dd_aips_if() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145813,7 +145814,7 @@ void m68000_device::sub_w_dd_pais_if() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -145837,7 +145838,7 @@ void m68000_device::sub_w_dd_pais_if() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145916,7 +145917,7 @@ void m68000_device::sub_w_dd_das_if() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145942,7 +145943,7 @@ void m68000_device::sub_w_dd_das_if() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145997,7 +145998,7 @@ void m68000_device::sub_w_dd_dais_if() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146059,7 +146060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146085,7 +146086,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146165,7 +146166,7 @@ void m68000_device::sub_w_dd_adr16_if() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146189,7 +146190,7 @@ void m68000_device::sub_w_dd_adr16_if() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146290,7 +146291,7 @@ void m68000_device::sub_w_dd_adr32_if() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146314,7 +146315,7 @@ void m68000_device::sub_w_dd_adr32_if() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146373,7 +146374,7 @@ void m68000_device::subx_l_ds_dd_if() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -146397,7 +146398,7 @@ void m68000_device::subx_l_ds_dd_if() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -146448,7 +146449,7 @@ void m68000_device::subx_l_pais_paid_if() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -146495,7 +146496,7 @@ void m68000_device::subx_l_pais_paid_if() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -146539,7 +146540,7 @@ void m68000_device::subx_l_pais_paid_if() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146596,7 +146597,7 @@ void m68000_device::sub_l_dd_ais_if() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146643,7 +146644,7 @@ void m68000_device::sub_l_dd_ais_if() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146668,7 +146669,7 @@ void m68000_device::sub_l_dd_ais_if() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146723,7 +146724,7 @@ void m68000_device::sub_l_dd_aips_if() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146773,7 +146774,7 @@ void m68000_device::sub_l_dd_aips_if() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146798,7 +146799,7 @@ void m68000_device::sub_l_dd_aips_if() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146852,7 +146853,7 @@ void m68000_device::sub_l_dd_pais_if() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -146904,7 +146905,7 @@ void m68000_device::sub_l_dd_pais_if() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146929,7 +146930,7 @@ void m68000_device::sub_l_dd_pais_if() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147005,7 +147006,7 @@ void m68000_device::sub_l_dd_das_if() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147052,7 +147053,7 @@ void m68000_device::sub_l_dd_das_if() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147077,7 +147078,7 @@ void m68000_device::sub_l_dd_das_if() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147130,7 +147131,7 @@ void m68000_device::sub_l_dd_dais_if() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -147191,7 +147192,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147238,7 +147239,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147263,7 +147264,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147341,7 +147342,7 @@ void m68000_device::sub_l_dd_adr16_if() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147388,7 +147389,7 @@ void m68000_device::sub_l_dd_adr16_if() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147413,7 +147414,7 @@ void m68000_device::sub_l_dd_adr16_if() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147512,7 +147513,7 @@ void m68000_device::sub_l_dd_adr32_if() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147559,7 +147560,7 @@ void m68000_device::sub_l_dd_adr32_if() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147584,7 +147585,7 @@ void m68000_device::sub_l_dd_adr32_if() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147641,7 +147642,7 @@ void m68000_device::suba_l_ds_ad_if() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147664,7 +147665,7 @@ void m68000_device::suba_l_ds_ad_if() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147689,7 +147690,7 @@ void m68000_device::suba_l_as_ad_if() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147712,7 +147713,7 @@ void m68000_device::suba_l_as_ad_if() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147735,7 +147736,7 @@ void m68000_device::suba_l_ais_ad_if() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147782,11 +147783,11 @@ void m68000_device::suba_l_ais_ad_if() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -147826,7 +147827,7 @@ void m68000_device::suba_l_aips_ad_if() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147876,11 +147877,11 @@ void m68000_device::suba_l_aips_ad_if() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -147919,7 +147920,7 @@ void m68000_device::suba_l_pais_ad_if() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -147971,11 +147972,11 @@ void m68000_device::suba_l_pais_ad_if() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148036,7 +148037,7 @@ void m68000_device::suba_l_das_ad_if() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148083,11 +148084,11 @@ void m68000_device::suba_l_das_ad_if() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148125,7 +148126,7 @@ void m68000_device::suba_l_dais_ad_if() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148186,7 +148187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148233,11 +148234,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148300,7 +148301,7 @@ void m68000_device::suba_l_adr16_ad_if() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148347,11 +148348,11 @@ void m68000_device::suba_l_adr16_ad_if() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148435,7 +148436,7 @@ void m68000_device::suba_l_adr32_ad_if() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148482,11 +148483,11 @@ void m68000_device::suba_l_adr32_ad_if() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148546,7 +148547,7 @@ void m68000_device::suba_l_dpc_ad_if() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148593,11 +148594,11 @@ void m68000_device::suba_l_dpc_ad_if() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148634,7 +148635,7 @@ void m68000_device::suba_l_dpci_ad_if() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148695,7 +148696,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148742,11 +148743,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148832,7 +148833,7 @@ void m68000_device::suba_l_imm32_ad_if() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -148855,7 +148856,7 @@ void m68000_device::suba_l_imm32_ad_if() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -148880,7 +148881,7 @@ void m68000_device::cmp_b_ds_dd_if() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148919,7 +148920,7 @@ void m68000_device::cmp_b_ais_dd_if() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148942,7 +148943,7 @@ void m68000_device::cmp_b_ais_dd_if() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148987,7 +148988,7 @@ void m68000_device::cmp_b_aips_dd_if() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149008,7 +149009,7 @@ void m68000_device::cmp_b_aips_dd_if() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149055,7 +149056,7 @@ void m68000_device::cmp_b_pais_dd_if() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149076,7 +149077,7 @@ void m68000_device::cmp_b_pais_dd_if() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149137,7 +149138,7 @@ void m68000_device::cmp_b_das_dd_if() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149160,7 +149161,7 @@ void m68000_device::cmp_b_das_dd_if() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149197,7 +149198,7 @@ void m68000_device::cmp_b_dais_dd_if() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149259,7 +149260,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149282,7 +149283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149344,7 +149345,7 @@ void m68000_device::cmp_b_adr16_dd_if() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149365,7 +149366,7 @@ void m68000_device::cmp_b_adr16_dd_if() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149448,7 +149449,7 @@ void m68000_device::cmp_b_adr32_dd_if() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149469,7 +149470,7 @@ void m68000_device::cmp_b_adr32_dd_if() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149529,7 +149530,7 @@ void m68000_device::cmp_b_dpc_dd_if() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149552,7 +149553,7 @@ void m68000_device::cmp_b_dpc_dd_if() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149588,7 +149589,7 @@ void m68000_device::cmp_b_dpci_dd_if() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149650,7 +149651,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149673,7 +149674,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149737,7 +149738,7 @@ void m68000_device::cmp_b_imm8_dd_if() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149778,7 +149779,7 @@ void m68000_device::cmp_w_ds_dd_if() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149819,7 +149820,7 @@ void m68000_device::cmp_w_as_dd_if() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149858,7 +149859,7 @@ void m68000_device::cmp_w_ais_dd_if() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149884,7 +149885,7 @@ void m68000_device::cmp_w_ais_dd_if() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149929,7 +149930,7 @@ void m68000_device::cmp_w_aips_dd_if() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -149953,7 +149954,7 @@ void m68000_device::cmp_w_aips_dd_if() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150000,7 +150001,7 @@ void m68000_device::cmp_w_pais_dd_if() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150024,7 +150025,7 @@ void m68000_device::cmp_w_pais_dd_if() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150085,7 +150086,7 @@ void m68000_device::cmp_w_das_dd_if() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150111,7 +150112,7 @@ void m68000_device::cmp_w_das_dd_if() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150148,7 +150149,7 @@ void m68000_device::cmp_w_dais_dd_if() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150210,7 +150211,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150236,7 +150237,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150298,7 +150299,7 @@ void m68000_device::cmp_w_adr16_dd_if() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150322,7 +150323,7 @@ void m68000_device::cmp_w_adr16_dd_if() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150405,7 +150406,7 @@ void m68000_device::cmp_w_adr32_dd_if() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150429,7 +150430,7 @@ void m68000_device::cmp_w_adr32_dd_if() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150489,7 +150490,7 @@ void m68000_device::cmp_w_dpc_dd_if() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150515,7 +150516,7 @@ void m68000_device::cmp_w_dpc_dd_if() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150551,7 +150552,7 @@ void m68000_device::cmp_w_dpci_dd_if() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150613,7 +150614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150639,7 +150640,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150703,7 +150704,7 @@ void m68000_device::cmp_w_imm16_dd_if() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150744,11 +150745,11 @@ void m68000_device::cmp_l_ds_dd_if() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150790,11 +150791,11 @@ void m68000_device::cmp_l_as_dd_if() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150834,7 +150835,7 @@ void m68000_device::cmp_l_ais_dd_if() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150881,11 +150882,11 @@ void m68000_device::cmp_l_ais_dd_if() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150925,7 +150926,7 @@ void m68000_device::cmp_l_aips_dd_if() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150975,11 +150976,11 @@ void m68000_device::cmp_l_aips_dd_if() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151018,7 +151019,7 @@ void m68000_device::cmp_l_pais_dd_if() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -151070,11 +151071,11 @@ void m68000_device::cmp_l_pais_dd_if() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151135,7 +151136,7 @@ void m68000_device::cmp_l_das_dd_if() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151182,11 +151183,11 @@ void m68000_device::cmp_l_das_dd_if() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151224,7 +151225,7 @@ void m68000_device::cmp_l_dais_dd_if() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151285,7 +151286,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151332,11 +151333,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151399,7 +151400,7 @@ void m68000_device::cmp_l_adr16_dd_if() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151446,11 +151447,11 @@ void m68000_device::cmp_l_adr16_dd_if() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151534,7 +151535,7 @@ void m68000_device::cmp_l_adr32_dd_if() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151581,11 +151582,11 @@ void m68000_device::cmp_l_adr32_dd_if() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151645,7 +151646,7 @@ void m68000_device::cmp_l_dpc_dd_if() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151692,11 +151693,11 @@ void m68000_device::cmp_l_dpc_dd_if() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151733,7 +151734,7 @@ void m68000_device::cmp_l_dpci_dd_if() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151794,7 +151795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151841,11 +151842,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151931,11 +151932,11 @@ void m68000_device::cmp_l_imm32_dd_if() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151977,11 +151978,11 @@ void m68000_device::cmpa_w_ds_ad_if() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152023,11 +152024,11 @@ void m68000_device::cmpa_w_as_ad_if() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152067,7 +152068,7 @@ void m68000_device::cmpa_w_ais_ad_if() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152093,11 +152094,11 @@ void m68000_device::cmpa_w_ais_ad_if() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152143,7 +152144,7 @@ void m68000_device::cmpa_w_aips_ad_if() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152167,11 +152168,11 @@ void m68000_device::cmpa_w_aips_ad_if() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152219,7 +152220,7 @@ void m68000_device::cmpa_w_pais_ad_if() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152243,11 +152244,11 @@ void m68000_device::cmpa_w_pais_ad_if() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152309,7 +152310,7 @@ void m68000_device::cmpa_w_das_ad_if() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152335,11 +152336,11 @@ void m68000_device::cmpa_w_das_ad_if() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152377,7 +152378,7 @@ void m68000_device::cmpa_w_dais_ad_if() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152439,7 +152440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152465,11 +152466,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152532,7 +152533,7 @@ void m68000_device::cmpa_w_adr16_ad_if() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152556,11 +152557,11 @@ void m68000_device::cmpa_w_adr16_ad_if() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152644,7 +152645,7 @@ void m68000_device::cmpa_w_adr32_ad_if() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152668,11 +152669,11 @@ void m68000_device::cmpa_w_adr32_ad_if() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152733,7 +152734,7 @@ void m68000_device::cmpa_w_dpc_ad_if() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152759,11 +152760,11 @@ void m68000_device::cmpa_w_dpc_ad_if() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152800,7 +152801,7 @@ void m68000_device::cmpa_w_dpci_ad_if() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152862,7 +152863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152888,11 +152889,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152957,11 +152958,11 @@ void m68000_device::cmpa_w_imm16_ad_if() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153002,7 +153003,7 @@ void m68000_device::eor_b_dd_ds_if() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153010,7 +153011,7 @@ void m68000_device::eor_b_dd_ds_if() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153066,7 +153067,7 @@ void m68000_device::cmpm_b_aips_aipd_if() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153088,7 +153089,7 @@ void m68000_device::cmpm_b_aips_aipd_if() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153123,11 +153124,11 @@ void m68000_device::eor_b_dd_ais_if() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153147,7 +153148,7 @@ void m68000_device::eor_b_dd_ais_if() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153174,7 +153175,7 @@ void m68000_device::eor_b_dd_ais_if() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153203,12 +153204,12 @@ void m68000_device::eor_b_dd_aips_if() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153229,7 +153230,7 @@ void m68000_device::eor_b_dd_aips_if() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153256,7 +153257,7 @@ void m68000_device::eor_b_dd_aips_if() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153284,7 +153285,7 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153292,7 +153293,7 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153313,7 +153314,7 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153340,7 +153341,7 @@ void m68000_device::eor_b_dd_pais_if() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153366,7 +153367,7 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153389,11 +153390,11 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153413,7 +153414,7 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153440,7 +153441,7 @@ void m68000_device::eor_b_dd_das_if() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153464,14 +153465,14 @@ void m68000_device::eor_b_dd_dais_if() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153479,7 +153480,7 @@ void m68000_device::eor_b_dd_dais_if() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153503,7 +153504,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153529,11 +153530,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153553,7 +153554,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153580,7 +153581,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153608,7 +153609,7 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -153631,7 +153632,7 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153652,7 +153653,7 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153679,7 +153680,7 @@ void m68000_device::eor_b_dd_adr16_if() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153705,7 +153706,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153729,7 +153730,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -153752,7 +153753,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153773,7 +153774,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153800,7 +153801,7 @@ void m68000_device::eor_b_dd_adr32_if() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153827,7 +153828,7 @@ void m68000_device::eor_w_dd_ds_if() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153835,7 +153836,7 @@ void m68000_device::eor_w_dd_ds_if() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153894,7 +153895,7 @@ void m68000_device::cmpm_w_aips_aipd_if() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -153919,7 +153920,7 @@ void m68000_device::cmpm_w_aips_aipd_if() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153954,11 +153955,11 @@ void m68000_device::eor_w_dd_ais_if() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153981,7 +153982,7 @@ void m68000_device::eor_w_dd_ais_if() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154008,7 +154009,7 @@ void m68000_device::eor_w_dd_ais_if() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154042,12 +154043,12 @@ void m68000_device::eor_w_dd_aips_if() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154071,7 +154072,7 @@ void m68000_device::eor_w_dd_aips_if() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154098,7 +154099,7 @@ void m68000_device::eor_w_dd_aips_if() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154131,7 +154132,7 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -154139,7 +154140,7 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154163,7 +154164,7 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154190,7 +154191,7 @@ void m68000_device::eor_w_dd_pais_if() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154221,7 +154222,7 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154244,11 +154245,11 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154271,7 +154272,7 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154298,7 +154299,7 @@ void m68000_device::eor_w_dd_das_if() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154327,14 +154328,14 @@ void m68000_device::eor_w_dd_dais_if() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -154342,7 +154343,7 @@ void m68000_device::eor_w_dd_dais_if() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154366,7 +154367,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154392,11 +154393,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154419,7 +154420,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154446,7 +154447,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154479,7 +154480,7 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -154502,7 +154503,7 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154526,7 +154527,7 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154553,7 +154554,7 @@ void m68000_device::eor_w_dd_adr16_if() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154584,7 +154585,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154608,7 +154609,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -154631,7 +154632,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154655,7 +154656,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154682,7 +154683,7 @@ void m68000_device::eor_w_dd_adr32_if() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154714,12 +154715,12 @@ void m68000_device::eor_l_dd_ds_if() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154739,7 +154740,7 @@ void m68000_device::eor_l_dd_ds_if() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -154748,7 +154749,7 @@ void m68000_device::eor_l_dd_ds_if() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154811,7 +154812,7 @@ void m68000_device::cmpm_l_aips_aipd_if() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154855,13 +154856,13 @@ void m68000_device::cmpm_l_aips_aipd_if() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154896,7 +154897,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154921,7 +154922,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154944,7 +154945,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154969,7 +154970,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -154994,7 +154995,7 @@ void m68000_device::eor_l_dd_ais_if() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155025,7 +155026,7 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155050,11 +155051,11 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155077,7 +155078,7 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155102,7 +155103,7 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155127,7 +155128,7 @@ void m68000_device::eor_l_dd_aips_if() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155157,14 +155158,14 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155188,7 +155189,7 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155211,7 +155212,7 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155236,7 +155237,7 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155261,7 +155262,7 @@ void m68000_device::eor_l_dd_pais_if() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155292,7 +155293,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155314,7 +155315,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155339,7 +155340,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155362,7 +155363,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155387,7 +155388,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155412,7 +155413,7 @@ void m68000_device::eor_l_dd_das_if() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155441,14 +155442,14 @@ void m68000_device::eor_l_dd_dais_if() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -155456,7 +155457,7 @@ void m68000_device::eor_l_dd_dais_if() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155480,7 +155481,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155505,7 +155506,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155530,7 +155531,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155553,7 +155554,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155578,7 +155579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155603,7 +155604,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155636,7 +155637,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -155659,7 +155660,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155684,7 +155685,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155707,7 +155708,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155732,7 +155733,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155757,7 +155758,7 @@ void m68000_device::eor_l_dd_adr16_if() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155788,7 +155789,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155812,7 +155813,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -155835,7 +155836,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155860,7 +155861,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155883,7 +155884,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155908,7 +155909,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155933,7 +155934,7 @@ void m68000_device::eor_l_dd_adr32_if() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155966,11 +155967,11 @@ void m68000_device::cmpa_l_ds_ad_if() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156012,11 +156013,11 @@ void m68000_device::cmpa_l_as_ad_if() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156056,7 +156057,7 @@ void m68000_device::cmpa_l_ais_ad_if() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156103,11 +156104,11 @@ void m68000_device::cmpa_l_ais_ad_if() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156147,7 +156148,7 @@ void m68000_device::cmpa_l_aips_ad_if() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156197,11 +156198,11 @@ void m68000_device::cmpa_l_aips_ad_if() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156240,7 +156241,7 @@ void m68000_device::cmpa_l_pais_ad_if() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -156292,11 +156293,11 @@ void m68000_device::cmpa_l_pais_ad_if() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156357,7 +156358,7 @@ void m68000_device::cmpa_l_das_ad_if() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156404,11 +156405,11 @@ void m68000_device::cmpa_l_das_ad_if() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156446,7 +156447,7 @@ void m68000_device::cmpa_l_dais_ad_if() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -156507,7 +156508,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156554,11 +156555,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156621,7 +156622,7 @@ void m68000_device::cmpa_l_adr16_ad_if() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156668,11 +156669,11 @@ void m68000_device::cmpa_l_adr16_ad_if() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156756,7 +156757,7 @@ void m68000_device::cmpa_l_adr32_ad_if() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156803,11 +156804,11 @@ void m68000_device::cmpa_l_adr32_ad_if() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156867,7 +156868,7 @@ void m68000_device::cmpa_l_dpc_ad_if() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -156914,11 +156915,11 @@ void m68000_device::cmpa_l_dpc_ad_if() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156955,7 +156956,7 @@ void m68000_device::cmpa_l_dpci_ad_if() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -157016,7 +157017,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157063,11 +157064,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157153,11 +157154,11 @@ void m68000_device::cmpa_l_imm32_ad_if() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157199,7 +157200,7 @@ void m68000_device::and_b_ds_dd_if() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157207,7 +157208,7 @@ void m68000_device::and_b_ds_dd_if() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157240,11 +157241,11 @@ void m68000_device::and_b_ais_dd_if() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157264,7 +157265,7 @@ void m68000_device::and_b_ais_dd_if() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157272,7 +157273,7 @@ void m68000_device::and_b_ais_dd_if() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157308,12 +157309,12 @@ void m68000_device::and_b_aips_dd_if() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157334,7 +157335,7 @@ void m68000_device::and_b_aips_dd_if() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157342,7 +157343,7 @@ void m68000_device::and_b_aips_dd_if() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157377,7 +157378,7 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157385,7 +157386,7 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157406,7 +157407,7 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157414,7 +157415,7 @@ void m68000_device::and_b_pais_dd_if() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157447,7 +157448,7 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157470,11 +157471,11 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157494,7 +157495,7 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157502,7 +157503,7 @@ void m68000_device::and_b_das_dd_if() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157533,14 +157534,14 @@ void m68000_device::and_b_dais_dd_if() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157548,7 +157549,7 @@ void m68000_device::and_b_dais_dd_if() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157572,7 +157573,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157598,11 +157599,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157622,7 +157623,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157630,7 +157631,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157665,7 +157666,7 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157688,7 +157689,7 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157709,7 +157710,7 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157717,7 +157718,7 @@ void m68000_device::and_b_adr16_dd_if() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157750,7 +157751,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157774,7 +157775,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157797,7 +157798,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157818,7 +157819,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157826,7 +157827,7 @@ void m68000_device::and_b_adr32_dd_if() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157858,7 +157859,7 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157881,11 +157882,11 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157905,7 +157906,7 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157913,7 +157914,7 @@ void m68000_device::and_b_dpc_dd_if() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157943,14 +157944,14 @@ void m68000_device::and_b_dpci_dd_if() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157958,7 +157959,7 @@ void m68000_device::and_b_dpci_dd_if() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157982,7 +157983,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158008,11 +158009,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -158032,7 +158033,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158040,7 +158041,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158075,7 +158076,7 @@ void m68000_device::and_b_imm8_dd_if() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158099,7 +158100,7 @@ void m68000_device::and_b_imm8_dd_if() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158107,7 +158108,7 @@ void m68000_device::and_b_imm8_dd_if() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158142,7 +158143,7 @@ void m68000_device::and_w_ds_dd_if() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158150,7 +158151,7 @@ void m68000_device::and_w_ds_dd_if() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158183,11 +158184,11 @@ void m68000_device::and_w_ais_dd_if() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158210,7 +158211,7 @@ void m68000_device::and_w_ais_dd_if() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158218,7 +158219,7 @@ void m68000_device::and_w_ais_dd_if() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158254,12 +158255,12 @@ void m68000_device::and_w_aips_dd_if() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158283,7 +158284,7 @@ void m68000_device::and_w_aips_dd_if() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158291,7 +158292,7 @@ void m68000_device::and_w_aips_dd_if() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158326,7 +158327,7 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158334,7 +158335,7 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158358,7 +158359,7 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158366,7 +158367,7 @@ void m68000_device::and_w_pais_dd_if() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158399,7 +158400,7 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158422,11 +158423,11 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158449,7 +158450,7 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158457,7 +158458,7 @@ void m68000_device::and_w_das_dd_if() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158488,14 +158489,14 @@ void m68000_device::and_w_dais_dd_if() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158503,7 +158504,7 @@ void m68000_device::and_w_dais_dd_if() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158527,7 +158528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158553,11 +158554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158580,7 +158581,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158588,7 +158589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158623,7 +158624,7 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -158646,7 +158647,7 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158670,7 +158671,7 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158678,7 +158679,7 @@ void m68000_device::and_w_adr16_dd_if() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158711,7 +158712,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158735,7 +158736,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -158758,7 +158759,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158782,7 +158783,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158790,7 +158791,7 @@ void m68000_device::and_w_adr32_dd_if() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158822,7 +158823,7 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158845,11 +158846,11 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158872,7 +158873,7 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158880,7 +158881,7 @@ void m68000_device::and_w_dpc_dd_if() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158910,14 +158911,14 @@ void m68000_device::and_w_dpci_dd_if() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158925,7 +158926,7 @@ void m68000_device::and_w_dpci_dd_if() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158949,7 +158950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158975,11 +158976,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159002,7 +159003,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159010,7 +159011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159045,7 +159046,7 @@ void m68000_device::and_w_imm16_dd_if() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159069,7 +159070,7 @@ void m68000_device::and_w_imm16_dd_if() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159077,7 +159078,7 @@ void m68000_device::and_w_imm16_dd_if() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159112,12 +159113,12 @@ void m68000_device::and_l_ds_dd_if() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159137,7 +159138,7 @@ void m68000_device::and_l_ds_dd_if() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -159146,7 +159147,7 @@ void m68000_device::and_l_ds_dd_if() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159162,7 +159163,7 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159187,7 +159188,7 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159210,12 +159211,12 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159241,7 +159242,7 @@ void m68000_device::and_l_ais_dd_if() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159257,7 +159258,7 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159282,11 +159283,11 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159309,12 +159310,12 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159340,7 +159341,7 @@ void m68000_device::and_l_aips_dd_if() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159355,14 +159356,14 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159386,7 +159387,7 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159409,12 +159410,12 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159440,7 +159441,7 @@ void m68000_device::and_l_pais_dd_if() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159456,7 +159457,7 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159478,7 +159479,7 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159503,7 +159504,7 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159526,12 +159527,12 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159557,7 +159558,7 @@ void m68000_device::and_l_das_dd_if() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159571,14 +159572,14 @@ void m68000_device::and_l_dais_dd_if() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -159586,7 +159587,7 @@ void m68000_device::and_l_dais_dd_if() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159610,7 +159611,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159635,7 +159636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159660,7 +159661,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159683,12 +159684,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159714,7 +159715,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159732,7 +159733,7 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -159755,7 +159756,7 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159780,7 +159781,7 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159803,12 +159804,12 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159834,7 +159835,7 @@ void m68000_device::and_l_adr16_dd_if() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159850,7 +159851,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159874,7 +159875,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -159897,7 +159898,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159922,7 +159923,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159945,12 +159946,12 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159976,7 +159977,7 @@ void m68000_device::and_l_adr32_dd_if() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159991,7 +159992,7 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160013,7 +160014,7 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -160038,7 +160039,7 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160061,12 +160062,12 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160092,7 +160093,7 @@ void m68000_device::and_l_dpc_dd_if() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160105,14 +160106,14 @@ void m68000_device::and_l_dpci_dd_if() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -160120,7 +160121,7 @@ void m68000_device::and_l_dpci_dd_if() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160144,7 +160145,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160169,7 +160170,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -160194,7 +160195,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160217,12 +160218,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160248,7 +160249,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160264,7 +160265,7 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160288,7 +160289,7 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160312,12 +160313,12 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160337,7 +160338,7 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -160346,7 +160347,7 @@ void m68000_device::and_l_imm32_dd_if() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160366,7 +160367,7 @@ void m68000_device::mulu_w_ds_dd_if() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160399,7 +160400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160411,7 +160412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160423,7 +160424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160441,7 +160442,7 @@ void m68000_device::mulu_w_ais_dd_if() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160469,7 +160470,7 @@ void m68000_device::mulu_w_ais_dd_if() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160502,7 +160503,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160514,7 +160515,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160526,7 +160527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160550,7 +160551,7 @@ void m68000_device::mulu_w_aips_dd_if() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -160576,7 +160577,7 @@ void m68000_device::mulu_w_aips_dd_if() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160609,7 +160610,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160621,7 +160622,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160633,7 +160634,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160659,7 +160660,7 @@ void m68000_device::mulu_w_pais_dd_if() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -160685,7 +160686,7 @@ void m68000_device::mulu_w_pais_dd_if() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160718,7 +160719,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160730,7 +160731,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160742,7 +160743,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160782,7 +160783,7 @@ void m68000_device::mulu_w_das_dd_if() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160810,7 +160811,7 @@ void m68000_device::mulu_w_das_dd_if() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160843,7 +160844,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160855,7 +160856,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160867,7 +160868,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160883,7 +160884,7 @@ void m68000_device::mulu_w_dais_dd_if() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160945,7 +160946,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160973,7 +160974,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161006,7 +161007,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161018,7 +161019,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161030,7 +161031,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161071,7 +161072,7 @@ void m68000_device::mulu_w_adr16_dd_if() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -161097,7 +161098,7 @@ void m68000_device::mulu_w_adr16_dd_if() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161130,7 +161131,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161142,7 +161143,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161154,7 +161155,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161216,7 +161217,7 @@ void m68000_device::mulu_w_adr32_dd_if() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -161242,7 +161243,7 @@ void m68000_device::mulu_w_adr32_dd_if() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161275,7 +161276,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161287,7 +161288,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161299,7 +161300,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161338,7 +161339,7 @@ void m68000_device::mulu_w_dpc_dd_if() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161366,7 +161367,7 @@ void m68000_device::mulu_w_dpc_dd_if() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161399,7 +161400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161411,7 +161412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161423,7 +161424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161438,7 +161439,7 @@ void m68000_device::mulu_w_dpci_dd_if() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -161500,7 +161501,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161528,7 +161529,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161561,7 +161562,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161573,7 +161574,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161585,7 +161586,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161630,7 +161631,7 @@ void m68000_device::mulu_w_imm16_dd_if() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161663,7 +161664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161675,7 +161676,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161687,7 +161688,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161707,12 +161708,12 @@ void m68000_device::abcd_ds_dd_if() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -161757,7 +161758,7 @@ void m68000_device::abcd_pais_paid_if() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -161797,12 +161798,12 @@ void m68000_device::abcd_pais_paid_if() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -161852,11 +161853,11 @@ void m68000_device::and_b_dd_ais_if() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -161876,7 +161877,7 @@ void m68000_device::and_b_dd_ais_if() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161903,7 +161904,7 @@ void m68000_device::and_b_dd_ais_if() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -161932,12 +161933,12 @@ void m68000_device::and_b_dd_aips_if() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -161958,7 +161959,7 @@ void m68000_device::and_b_dd_aips_if() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161985,7 +161986,7 @@ void m68000_device::and_b_dd_aips_if() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162013,7 +162014,7 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162021,7 +162022,7 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162042,7 +162043,7 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162069,7 +162070,7 @@ void m68000_device::and_b_dd_pais_if() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162095,7 +162096,7 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162118,11 +162119,11 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162142,7 +162143,7 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162169,7 +162170,7 @@ void m68000_device::and_b_dd_das_if() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162193,14 +162194,14 @@ void m68000_device::and_b_dd_dais_if() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162208,7 +162209,7 @@ void m68000_device::and_b_dd_dais_if() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162232,7 +162233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162258,11 +162259,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162282,7 +162283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162309,7 +162310,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162337,7 +162338,7 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -162360,7 +162361,7 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162381,7 +162382,7 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162408,7 +162409,7 @@ void m68000_device::and_b_dd_adr16_if() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162434,7 +162435,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162458,7 +162459,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -162481,7 +162482,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162502,7 +162503,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162529,7 +162530,7 @@ void m68000_device::and_b_dd_adr32_if() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162643,11 +162644,11 @@ void m68000_device::and_w_dd_ais_if() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162670,7 +162671,7 @@ void m68000_device::and_w_dd_ais_if() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162697,7 +162698,7 @@ void m68000_device::and_w_dd_ais_if() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162731,12 +162732,12 @@ void m68000_device::and_w_dd_aips_if() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -162760,7 +162761,7 @@ void m68000_device::and_w_dd_aips_if() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162787,7 +162788,7 @@ void m68000_device::and_w_dd_aips_if() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162820,7 +162821,7 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162828,7 +162829,7 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -162852,7 +162853,7 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162879,7 +162880,7 @@ void m68000_device::and_w_dd_pais_if() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162910,7 +162911,7 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162933,11 +162934,11 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162960,7 +162961,7 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162987,7 +162988,7 @@ void m68000_device::and_w_dd_das_if() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163016,14 +163017,14 @@ void m68000_device::and_w_dd_dais_if() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163031,7 +163032,7 @@ void m68000_device::and_w_dd_dais_if() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163055,7 +163056,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163081,11 +163082,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163108,7 +163109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163135,7 +163136,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163168,7 +163169,7 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -163191,7 +163192,7 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163215,7 +163216,7 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163242,7 +163243,7 @@ void m68000_device::and_w_dd_adr16_if() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163273,7 +163274,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163297,7 +163298,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -163320,7 +163321,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163344,7 +163345,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163371,7 +163372,7 @@ void m68000_device::and_w_dd_adr32_if() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163446,7 +163447,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163471,7 +163472,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163494,7 +163495,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163519,7 +163520,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163544,7 +163545,7 @@ void m68000_device::and_l_dd_ais_if() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163575,7 +163576,7 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163600,11 +163601,11 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163627,7 +163628,7 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163652,7 +163653,7 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163677,7 +163678,7 @@ void m68000_device::and_l_dd_aips_if() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163707,14 +163708,14 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163738,7 +163739,7 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163761,7 +163762,7 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163786,7 +163787,7 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163811,7 +163812,7 @@ void m68000_device::and_l_dd_pais_if() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163842,7 +163843,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163864,7 +163865,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163889,7 +163890,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163912,7 +163913,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163937,7 +163938,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163962,7 +163963,7 @@ void m68000_device::and_l_dd_das_if() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163991,14 +163992,14 @@ void m68000_device::and_l_dd_dais_if() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164006,7 +164007,7 @@ void m68000_device::and_l_dd_dais_if() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164030,7 +164031,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164055,7 +164056,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164080,7 +164081,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164103,7 +164104,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164128,7 +164129,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164153,7 +164154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164186,7 +164187,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -164209,7 +164210,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164234,7 +164235,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164257,7 +164258,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164282,7 +164283,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164307,7 +164308,7 @@ void m68000_device::and_l_dd_adr16_if() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164338,7 +164339,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164362,7 +164363,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -164385,7 +164386,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164410,7 +164411,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164433,7 +164434,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164458,7 +164459,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164483,7 +164484,7 @@ void m68000_device::and_l_dd_adr32_if() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164518,7 +164519,7 @@ void m68000_device::muls_w_ds_dd_if() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164551,7 +164552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164565,7 +164566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164577,7 +164578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164588,7 +164589,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164602,7 +164603,7 @@ void m68000_device::muls_w_ais_dd_if() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164630,7 +164631,7 @@ void m68000_device::muls_w_ais_dd_if() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164663,7 +164664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164677,7 +164678,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164689,7 +164690,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164700,7 +164701,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164720,7 +164721,7 @@ void m68000_device::muls_w_aips_dd_if() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164746,7 +164747,7 @@ void m68000_device::muls_w_aips_dd_if() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164779,7 +164780,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164793,7 +164794,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164805,7 +164806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164816,7 +164817,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164838,7 +164839,7 @@ void m68000_device::muls_w_pais_dd_if() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164864,7 +164865,7 @@ void m68000_device::muls_w_pais_dd_if() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164897,7 +164898,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164911,7 +164912,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164923,7 +164924,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164934,7 +164935,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164970,7 +164971,7 @@ void m68000_device::muls_w_das_dd_if() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164998,7 +164999,7 @@ void m68000_device::muls_w_das_dd_if() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165031,7 +165032,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165045,7 +165046,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165057,7 +165058,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165068,7 +165069,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165080,7 +165081,7 @@ void m68000_device::muls_w_dais_dd_if() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165142,7 +165143,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165170,7 +165171,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165203,7 +165204,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165217,7 +165218,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165229,7 +165230,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165240,7 +165241,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165277,7 +165278,7 @@ void m68000_device::muls_w_adr16_dd_if() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -165303,7 +165304,7 @@ void m68000_device::muls_w_adr16_dd_if() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165336,7 +165337,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165350,7 +165351,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165362,7 +165363,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165373,7 +165374,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165431,7 +165432,7 @@ void m68000_device::muls_w_adr32_dd_if() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -165457,7 +165458,7 @@ void m68000_device::muls_w_adr32_dd_if() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165490,7 +165491,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165504,7 +165505,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165516,7 +165517,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165527,7 +165528,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165562,7 +165563,7 @@ void m68000_device::muls_w_dpc_dd_if() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165590,7 +165591,7 @@ void m68000_device::muls_w_dpc_dd_if() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165623,7 +165624,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165637,7 +165638,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165649,7 +165650,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165660,7 +165661,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165671,7 +165672,7 @@ void m68000_device::muls_w_dpci_dd_if() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165733,7 +165734,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165761,7 +165762,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165794,7 +165795,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165808,7 +165809,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165820,7 +165821,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165831,7 +165832,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165872,7 +165873,7 @@ void m68000_device::muls_w_imm16_dd_if() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165905,7 +165906,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165919,7 +165920,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165931,7 +165932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165942,7 +165943,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165958,7 +165959,7 @@ void m68000_device::add_b_ds_dd_if() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -165998,7 +165999,7 @@ void m68000_device::add_b_ais_dd_if() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166021,7 +166022,7 @@ void m68000_device::add_b_ais_dd_if() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166067,7 +166068,7 @@ void m68000_device::add_b_aips_dd_if() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166088,7 +166089,7 @@ void m68000_device::add_b_aips_dd_if() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166136,7 +166137,7 @@ void m68000_device::add_b_pais_dd_if() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166157,7 +166158,7 @@ void m68000_device::add_b_pais_dd_if() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166219,7 +166220,7 @@ void m68000_device::add_b_das_dd_if() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166242,7 +166243,7 @@ void m68000_device::add_b_das_dd_if() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166280,7 +166281,7 @@ void m68000_device::add_b_dais_dd_if() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166342,7 +166343,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166365,7 +166366,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166428,7 +166429,7 @@ void m68000_device::add_b_adr16_dd_if() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166449,7 +166450,7 @@ void m68000_device::add_b_adr16_dd_if() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166533,7 +166534,7 @@ void m68000_device::add_b_adr32_dd_if() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166554,7 +166555,7 @@ void m68000_device::add_b_adr32_dd_if() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166615,7 +166616,7 @@ void m68000_device::add_b_dpc_dd_if() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166638,7 +166639,7 @@ void m68000_device::add_b_dpc_dd_if() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166675,7 +166676,7 @@ void m68000_device::add_b_dpci_dd_if() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166737,7 +166738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166760,7 +166761,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166825,7 +166826,7 @@ void m68000_device::add_b_imm8_dd_if() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166867,7 +166868,7 @@ void m68000_device::add_w_ds_dd_if() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166909,7 +166910,7 @@ void m68000_device::add_w_as_dd_if() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166949,7 +166950,7 @@ void m68000_device::add_w_ais_dd_if() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166975,7 +166976,7 @@ void m68000_device::add_w_ais_dd_if() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167021,7 +167022,7 @@ void m68000_device::add_w_aips_dd_if() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167045,7 +167046,7 @@ void m68000_device::add_w_aips_dd_if() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167093,7 +167094,7 @@ void m68000_device::add_w_pais_dd_if() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167117,7 +167118,7 @@ void m68000_device::add_w_pais_dd_if() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167179,7 +167180,7 @@ void m68000_device::add_w_das_dd_if() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167205,7 +167206,7 @@ void m68000_device::add_w_das_dd_if() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167243,7 +167244,7 @@ void m68000_device::add_w_dais_dd_if() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167305,7 +167306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167331,7 +167332,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167394,7 +167395,7 @@ void m68000_device::add_w_adr16_dd_if() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167418,7 +167419,7 @@ void m68000_device::add_w_adr16_dd_if() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167502,7 +167503,7 @@ void m68000_device::add_w_adr32_dd_if() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167526,7 +167527,7 @@ void m68000_device::add_w_adr32_dd_if() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167587,7 +167588,7 @@ void m68000_device::add_w_dpc_dd_if() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167613,7 +167614,7 @@ void m68000_device::add_w_dpc_dd_if() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167650,7 +167651,7 @@ void m68000_device::add_w_dpci_dd_if() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167712,7 +167713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167738,7 +167739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167803,7 +167804,7 @@ void m68000_device::add_w_imm16_dd_if() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167845,7 +167846,7 @@ void m68000_device::add_l_ds_dd_if() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167869,7 +167870,7 @@ void m68000_device::add_l_ds_dd_if() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167895,7 +167896,7 @@ void m68000_device::add_l_as_dd_if() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167919,7 +167920,7 @@ void m68000_device::add_l_as_dd_if() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167943,7 +167944,7 @@ void m68000_device::add_l_ais_dd_if() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167990,12 +167991,12 @@ void m68000_device::add_l_ais_dd_if() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168036,7 +168037,7 @@ void m68000_device::add_l_aips_dd_if() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168086,12 +168087,12 @@ void m68000_device::add_l_aips_dd_if() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168131,7 +168132,7 @@ void m68000_device::add_l_pais_dd_if() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -168183,12 +168184,12 @@ void m68000_device::add_l_pais_dd_if() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168250,7 +168251,7 @@ void m68000_device::add_l_das_dd_if() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168297,12 +168298,12 @@ void m68000_device::add_l_das_dd_if() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168341,7 +168342,7 @@ void m68000_device::add_l_dais_dd_if() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168402,7 +168403,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168449,12 +168450,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168518,7 +168519,7 @@ void m68000_device::add_l_adr16_dd_if() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168565,12 +168566,12 @@ void m68000_device::add_l_adr16_dd_if() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168655,7 +168656,7 @@ void m68000_device::add_l_adr32_dd_if() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168702,12 +168703,12 @@ void m68000_device::add_l_adr32_dd_if() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168768,7 +168769,7 @@ void m68000_device::add_l_dpc_dd_if() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -168815,12 +168816,12 @@ void m68000_device::add_l_dpc_dd_if() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168858,7 +168859,7 @@ void m68000_device::add_l_dpci_dd_if() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168919,7 +168920,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -168966,12 +168967,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169058,7 +169059,7 @@ void m68000_device::add_l_imm32_dd_if() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -169082,7 +169083,7 @@ void m68000_device::add_l_imm32_dd_if() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -169108,7 +169109,7 @@ void m68000_device::adda_w_ds_ad_if() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169131,7 +169132,7 @@ void m68000_device::adda_w_ds_ad_if() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169156,7 +169157,7 @@ void m68000_device::adda_w_as_ad_if() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169179,7 +169180,7 @@ void m68000_device::adda_w_as_ad_if() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169202,7 +169203,7 @@ void m68000_device::adda_w_ais_ad_if() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169228,7 +169229,7 @@ void m68000_device::adda_w_ais_ad_if() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169251,7 +169252,7 @@ void m68000_device::adda_w_ais_ad_if() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169280,7 +169281,7 @@ void m68000_device::adda_w_aips_ad_if() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169304,7 +169305,7 @@ void m68000_device::adda_w_aips_ad_if() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169327,7 +169328,7 @@ void m68000_device::adda_w_aips_ad_if() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169358,7 +169359,7 @@ void m68000_device::adda_w_pais_ad_if() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169382,7 +169383,7 @@ void m68000_device::adda_w_pais_ad_if() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169405,7 +169406,7 @@ void m68000_device::adda_w_pais_ad_if() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169450,7 +169451,7 @@ void m68000_device::adda_w_das_ad_if() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169476,7 +169477,7 @@ void m68000_device::adda_w_das_ad_if() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169499,7 +169500,7 @@ void m68000_device::adda_w_das_ad_if() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169520,7 +169521,7 @@ void m68000_device::adda_w_dais_ad_if() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169582,7 +169583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169608,7 +169609,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169631,7 +169632,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169677,7 +169678,7 @@ void m68000_device::adda_w_adr16_ad_if() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169701,7 +169702,7 @@ void m68000_device::adda_w_adr16_ad_if() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169724,7 +169725,7 @@ void m68000_device::adda_w_adr16_ad_if() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169791,7 +169792,7 @@ void m68000_device::adda_w_adr32_ad_if() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169815,7 +169816,7 @@ void m68000_device::adda_w_adr32_ad_if() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169838,7 +169839,7 @@ void m68000_device::adda_w_adr32_ad_if() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169882,7 +169883,7 @@ void m68000_device::adda_w_dpc_ad_if() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169908,7 +169909,7 @@ void m68000_device::adda_w_dpc_ad_if() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169931,7 +169932,7 @@ void m68000_device::adda_w_dpc_ad_if() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169951,7 +169952,7 @@ void m68000_device::adda_w_dpci_ad_if() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170013,7 +170014,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -170039,7 +170040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170062,7 +170063,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170110,7 +170111,7 @@ void m68000_device::adda_w_imm16_ad_if() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170133,7 +170134,7 @@ void m68000_device::adda_w_imm16_ad_if() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170158,7 +170159,7 @@ void m68000_device::addx_b_ds_dd_if() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170166,7 +170167,7 @@ void m68000_device::addx_b_ds_dd_if() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -170201,16 +170202,16 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170231,7 +170232,7 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170249,7 +170250,7 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170276,7 +170277,7 @@ void m68000_device::addx_b_pais_paid_if() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -170302,7 +170303,7 @@ void m68000_device::add_b_dd_ais_if() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170325,7 +170326,7 @@ void m68000_device::add_b_dd_ais_if() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170383,7 +170384,7 @@ void m68000_device::add_b_dd_aips_if() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170404,7 +170405,7 @@ void m68000_device::add_b_dd_aips_if() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170464,7 +170465,7 @@ void m68000_device::add_b_dd_pais_if() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170485,7 +170486,7 @@ void m68000_device::add_b_dd_pais_if() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170559,7 +170560,7 @@ void m68000_device::add_b_dd_das_if() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170582,7 +170583,7 @@ void m68000_device::add_b_dd_das_if() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170632,7 +170633,7 @@ void m68000_device::add_b_dd_dais_if() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170694,7 +170695,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170717,7 +170718,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170792,7 +170793,7 @@ void m68000_device::add_b_dd_adr16_if() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170813,7 +170814,7 @@ void m68000_device::add_b_dd_adr16_if() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170909,7 +170910,7 @@ void m68000_device::add_b_dd_adr32_if() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170930,7 +170931,7 @@ void m68000_device::add_b_dd_adr32_if() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170984,7 +170985,7 @@ void m68000_device::addx_w_ds_dd_if() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170992,7 +170993,7 @@ void m68000_device::addx_w_ds_dd_if() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171027,16 +171028,16 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171060,7 +171061,7 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171081,7 +171082,7 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171108,7 +171109,7 @@ void m68000_device::addx_w_pais_paid_if() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -171139,7 +171140,7 @@ void m68000_device::add_w_dd_ais_if() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171165,7 +171166,7 @@ void m68000_device::add_w_dd_ais_if() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171228,7 +171229,7 @@ void m68000_device::add_w_dd_aips_if() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171252,7 +171253,7 @@ void m68000_device::add_w_dd_aips_if() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171317,7 +171318,7 @@ void m68000_device::add_w_dd_pais_if() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171341,7 +171342,7 @@ void m68000_device::add_w_dd_pais_if() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171420,7 +171421,7 @@ void m68000_device::add_w_dd_das_if() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171446,7 +171447,7 @@ void m68000_device::add_w_dd_das_if() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171501,7 +171502,7 @@ void m68000_device::add_w_dd_dais_if() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -171563,7 +171564,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171589,7 +171590,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171669,7 +171670,7 @@ void m68000_device::add_w_dd_adr16_if() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171693,7 +171694,7 @@ void m68000_device::add_w_dd_adr16_if() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171794,7 +171795,7 @@ void m68000_device::add_w_dd_adr32_if() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171818,7 +171819,7 @@ void m68000_device::add_w_dd_adr32_if() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171877,12 +171878,12 @@ void m68000_device::addx_l_ds_dd_if() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171902,7 +171903,7 @@ void m68000_device::addx_l_ds_dd_if() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -171911,7 +171912,7 @@ void m68000_device::addx_l_ds_dd_if() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171929,13 +171930,13 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171956,11 +171957,11 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171982,7 +171983,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -172005,7 +172006,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -172030,7 +172031,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -172050,7 +172051,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172077,7 +172078,7 @@ void m68000_device::addx_l_pais_paid_if() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -172108,7 +172109,7 @@ void m68000_device::add_l_dd_ais_if() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172155,7 +172156,7 @@ void m68000_device::add_l_dd_ais_if() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172180,7 +172181,7 @@ void m68000_device::add_l_dd_ais_if() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172235,7 +172236,7 @@ void m68000_device::add_l_dd_aips_if() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172285,7 +172286,7 @@ void m68000_device::add_l_dd_aips_if() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172310,7 +172311,7 @@ void m68000_device::add_l_dd_aips_if() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172364,7 +172365,7 @@ void m68000_device::add_l_dd_pais_if() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -172416,7 +172417,7 @@ void m68000_device::add_l_dd_pais_if() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172441,7 +172442,7 @@ void m68000_device::add_l_dd_pais_if() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172517,7 +172518,7 @@ void m68000_device::add_l_dd_das_if() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172564,7 +172565,7 @@ void m68000_device::add_l_dd_das_if() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172589,7 +172590,7 @@ void m68000_device::add_l_dd_das_if() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172642,7 +172643,7 @@ void m68000_device::add_l_dd_dais_if() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -172703,7 +172704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172750,7 +172751,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172775,7 +172776,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172853,7 +172854,7 @@ void m68000_device::add_l_dd_adr16_if() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172900,7 +172901,7 @@ void m68000_device::add_l_dd_adr16_if() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172925,7 +172926,7 @@ void m68000_device::add_l_dd_adr16_if() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173024,7 +173025,7 @@ void m68000_device::add_l_dd_adr32_if() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173071,7 +173072,7 @@ void m68000_device::add_l_dd_adr32_if() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173096,7 +173097,7 @@ void m68000_device::add_l_dd_adr32_if() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173153,7 +173154,7 @@ void m68000_device::adda_l_ds_ad_if() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173176,7 +173177,7 @@ void m68000_device::adda_l_ds_ad_if() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173201,7 +173202,7 @@ void m68000_device::adda_l_as_ad_if() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173224,7 +173225,7 @@ void m68000_device::adda_l_as_ad_if() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173247,7 +173248,7 @@ void m68000_device::adda_l_ais_ad_if() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173294,11 +173295,11 @@ void m68000_device::adda_l_ais_ad_if() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173338,7 +173339,7 @@ void m68000_device::adda_l_aips_ad_if() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173388,11 +173389,11 @@ void m68000_device::adda_l_aips_ad_if() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173431,7 +173432,7 @@ void m68000_device::adda_l_pais_ad_if() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -173483,11 +173484,11 @@ void m68000_device::adda_l_pais_ad_if() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173548,7 +173549,7 @@ void m68000_device::adda_l_das_ad_if() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173595,11 +173596,11 @@ void m68000_device::adda_l_das_ad_if() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173637,7 +173638,7 @@ void m68000_device::adda_l_dais_ad_if() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -173698,7 +173699,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173745,11 +173746,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173812,7 +173813,7 @@ void m68000_device::adda_l_adr16_ad_if() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173859,11 +173860,11 @@ void m68000_device::adda_l_adr16_ad_if() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173947,7 +173948,7 @@ void m68000_device::adda_l_adr32_ad_if() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173994,11 +173995,11 @@ void m68000_device::adda_l_adr32_ad_if() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174058,7 +174059,7 @@ void m68000_device::adda_l_dpc_ad_if() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174105,11 +174106,11 @@ void m68000_device::adda_l_dpc_ad_if() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174146,7 +174147,7 @@ void m68000_device::adda_l_dpci_ad_if() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -174207,7 +174208,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174254,11 +174255,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174344,7 +174345,7 @@ void m68000_device::adda_l_imm32_ad_if() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -174367,7 +174368,7 @@ void m68000_device::adda_l_imm32_ad_if() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -174391,13 +174392,13 @@ void m68000_device::asr_b_imm3_ds_if() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174426,7 +174427,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174456,13 +174457,13 @@ void m68000_device::lsr_b_imm3_ds_if() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174491,7 +174492,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174521,13 +174522,13 @@ void m68000_device::roxr_b_imm3_ds_if() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174556,7 +174557,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174586,13 +174587,13 @@ void m68000_device::ror_b_imm3_ds_if() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174621,7 +174622,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174652,13 +174653,13 @@ void m68000_device::asr_b_dd_ds_if() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174687,7 +174688,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174718,13 +174719,13 @@ void m68000_device::lsr_b_dd_ds_if() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174753,7 +174754,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174784,13 +174785,13 @@ void m68000_device::roxr_b_dd_ds_if() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174819,7 +174820,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174850,13 +174851,13 @@ void m68000_device::ror_b_dd_ds_if() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174885,7 +174886,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174915,13 +174916,13 @@ void m68000_device::asr_w_imm3_ds_if() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174950,7 +174951,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174980,13 +174981,13 @@ void m68000_device::lsr_w_imm3_ds_if() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175015,7 +175016,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175045,13 +175046,13 @@ void m68000_device::roxr_w_imm3_ds_if() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175080,7 +175081,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175110,13 +175111,13 @@ void m68000_device::ror_w_imm3_ds_if() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175145,7 +175146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175176,13 +175177,13 @@ void m68000_device::asr_w_dd_ds_if() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175211,7 +175212,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175242,13 +175243,13 @@ void m68000_device::lsr_w_dd_ds_if() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175277,7 +175278,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175308,13 +175309,13 @@ void m68000_device::roxr_w_dd_ds_if() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175343,7 +175344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175374,13 +175375,13 @@ void m68000_device::ror_w_dd_ds_if() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175409,7 +175410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175439,13 +175440,13 @@ void m68000_device::asr_l_imm3_ds_if() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175474,7 +175475,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175491,7 +175492,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175510,13 +175511,13 @@ void m68000_device::lsr_l_imm3_ds_if() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175545,7 +175546,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175562,7 +175563,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175581,13 +175582,13 @@ void m68000_device::roxr_l_imm3_ds_if() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175616,7 +175617,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175633,7 +175634,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175652,13 +175653,13 @@ void m68000_device::ror_l_imm3_ds_if() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175687,7 +175688,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175704,7 +175705,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175724,13 +175725,13 @@ void m68000_device::asr_l_dd_ds_if() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175759,7 +175760,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175776,7 +175777,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175796,13 +175797,13 @@ void m68000_device::lsr_l_dd_ds_if() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175831,7 +175832,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175848,7 +175849,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175868,13 +175869,13 @@ void m68000_device::roxr_l_dd_ds_if() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175903,7 +175904,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175920,7 +175921,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175940,13 +175941,13 @@ void m68000_device::ror_l_dd_ds_if() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175975,7 +175976,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175992,7 +175993,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -176010,7 +176011,7 @@ void m68000_device::asr_ais_if() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176036,12 +176037,12 @@ void m68000_device::asr_ais_if() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176104,7 +176105,7 @@ void m68000_device::asr_aips_if() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176128,12 +176129,12 @@ void m68000_device::asr_aips_if() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176198,7 +176199,7 @@ void m68000_device::asr_pais_if() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176222,12 +176223,12 @@ void m68000_device::asr_pais_if() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176306,7 +176307,7 @@ void m68000_device::asr_das_if() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176332,12 +176333,12 @@ void m68000_device::asr_das_if() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176392,7 +176393,7 @@ void m68000_device::asr_dais_if() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -176454,7 +176455,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176480,12 +176481,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176565,7 +176566,7 @@ void m68000_device::asr_adr16_if() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176589,12 +176590,12 @@ void m68000_device::asr_adr16_if() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176695,7 +176696,7 @@ void m68000_device::asr_adr32_if() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176719,12 +176720,12 @@ void m68000_device::asr_adr32_if() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176782,13 +176783,13 @@ void m68000_device::asl_b_imm3_ds_if() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176817,7 +176818,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176847,13 +176848,13 @@ void m68000_device::lsl_b_imm3_ds_if() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176896,7 +176897,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176913,13 +176914,13 @@ void m68000_device::roxl_b_imm3_ds_if() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176948,7 +176949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176978,13 +176979,13 @@ void m68000_device::rol_b_imm3_ds_if() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177013,7 +177014,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177044,13 +177045,13 @@ void m68000_device::asl_b_dd_ds_if() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177079,7 +177080,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177110,13 +177111,13 @@ void m68000_device::lsl_b_dd_ds_if() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177145,7 +177146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177159,7 +177160,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177177,13 +177178,13 @@ void m68000_device::roxl_b_dd_ds_if() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177212,7 +177213,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177243,13 +177244,13 @@ void m68000_device::rol_b_dd_ds_if() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177278,7 +177279,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177308,13 +177309,13 @@ void m68000_device::asl_w_imm3_ds_if() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177343,7 +177344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177373,13 +177374,13 @@ void m68000_device::lsl_w_imm3_ds_if() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177408,7 +177409,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177422,7 +177423,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177439,13 +177440,13 @@ void m68000_device::roxl_w_imm3_ds_if() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177474,7 +177475,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177504,13 +177505,13 @@ void m68000_device::rol_w_imm3_ds_if() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177539,7 +177540,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177570,13 +177571,13 @@ void m68000_device::asl_w_dd_ds_if() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177605,7 +177606,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177636,13 +177637,13 @@ void m68000_device::lsl_w_dd_ds_if() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177671,7 +177672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177685,7 +177686,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177703,13 +177704,13 @@ void m68000_device::roxl_w_dd_ds_if() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177738,7 +177739,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177769,13 +177770,13 @@ void m68000_device::rol_w_dd_ds_if() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177804,7 +177805,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177834,13 +177835,13 @@ void m68000_device::asl_l_imm3_ds_if() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177869,7 +177870,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177886,7 +177887,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177905,13 +177906,13 @@ void m68000_device::lsl_l_imm3_ds_if() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177940,7 +177941,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177952,14 +177953,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177978,13 +177979,13 @@ void m68000_device::roxl_l_imm3_ds_if() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178013,7 +178014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178030,7 +178031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178049,13 +178050,13 @@ void m68000_device::rol_l_imm3_ds_if() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178084,7 +178085,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178101,7 +178102,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178121,13 +178122,13 @@ void m68000_device::asl_l_dd_ds_if() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178156,7 +178157,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178173,7 +178174,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178193,13 +178194,13 @@ void m68000_device::lsl_l_dd_ds_if() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178228,7 +178229,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178240,14 +178241,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178267,13 +178268,13 @@ void m68000_device::roxl_l_dd_ds_if() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178302,7 +178303,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178319,7 +178320,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178339,13 +178340,13 @@ void m68000_device::rol_l_dd_ds_if() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178374,7 +178375,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178391,7 +178392,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178409,7 +178410,7 @@ void m68000_device::asl_ais_if() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178435,12 +178436,12 @@ void m68000_device::asl_ais_if() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178503,7 +178504,7 @@ void m68000_device::asl_aips_if() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178527,12 +178528,12 @@ void m68000_device::asl_aips_if() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178597,7 +178598,7 @@ void m68000_device::asl_pais_if() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178621,12 +178622,12 @@ void m68000_device::asl_pais_if() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178705,7 +178706,7 @@ void m68000_device::asl_das_if() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178731,12 +178732,12 @@ void m68000_device::asl_das_if() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178791,7 +178792,7 @@ void m68000_device::asl_dais_if() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -178853,7 +178854,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178879,12 +178880,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178964,7 +178965,7 @@ void m68000_device::asl_adr16_if() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178988,12 +178989,12 @@ void m68000_device::asl_adr16_if() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179094,7 +179095,7 @@ void m68000_device::asl_adr32_if() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179118,12 +179119,12 @@ void m68000_device::asl_adr32_if() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179180,7 +179181,7 @@ void m68000_device::lsr_ais_if() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179206,12 +179207,12 @@ void m68000_device::lsr_ais_if() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179274,7 +179275,7 @@ void m68000_device::lsr_aips_if() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179298,12 +179299,12 @@ void m68000_device::lsr_aips_if() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179368,7 +179369,7 @@ void m68000_device::lsr_pais_if() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179392,12 +179393,12 @@ void m68000_device::lsr_pais_if() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179476,7 +179477,7 @@ void m68000_device::lsr_das_if() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179502,12 +179503,12 @@ void m68000_device::lsr_das_if() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179562,7 +179563,7 @@ void m68000_device::lsr_dais_if() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -179624,7 +179625,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179650,12 +179651,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179735,7 +179736,7 @@ void m68000_device::lsr_adr16_if() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179759,12 +179760,12 @@ void m68000_device::lsr_adr16_if() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179865,7 +179866,7 @@ void m68000_device::lsr_adr32_if() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179889,12 +179890,12 @@ void m68000_device::lsr_adr32_if() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179951,11 +179952,11 @@ void m68000_device::lsl_ais_if() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -179978,12 +179979,12 @@ void m68000_device::lsl_ais_if() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180010,7 +180011,7 @@ void m68000_device::lsl_ais_if() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180044,12 +180045,12 @@ void m68000_device::lsl_aips_if() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180073,12 +180074,12 @@ void m68000_device::lsl_aips_if() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180105,7 +180106,7 @@ void m68000_device::lsl_aips_if() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180138,7 +180139,7 @@ void m68000_device::lsl_pais_if() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180146,7 +180147,7 @@ void m68000_device::lsl_pais_if() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180170,12 +180171,12 @@ void m68000_device::lsl_pais_if() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180202,7 +180203,7 @@ void m68000_device::lsl_pais_if() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180233,7 +180234,7 @@ void m68000_device::lsl_das_if() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180256,11 +180257,11 @@ void m68000_device::lsl_das_if() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180283,12 +180284,12 @@ void m68000_device::lsl_das_if() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180315,7 +180316,7 @@ void m68000_device::lsl_das_if() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180344,14 +180345,14 @@ void m68000_device::lsl_dais_if() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180359,7 +180360,7 @@ void m68000_device::lsl_dais_if() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180383,7 +180384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180409,11 +180410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180436,12 +180437,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180468,7 +180469,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180501,7 +180502,7 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180524,7 +180525,7 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180548,12 +180549,12 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180580,7 +180581,7 @@ void m68000_device::lsl_adr16_if() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180611,7 +180612,7 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180635,7 +180636,7 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180658,7 +180659,7 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180682,12 +180683,12 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180714,7 +180715,7 @@ void m68000_device::lsl_adr32_if() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180745,7 +180746,7 @@ void m68000_device::roxr_ais_if() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180771,12 +180772,12 @@ void m68000_device::roxr_ais_if() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180839,7 +180840,7 @@ void m68000_device::roxr_aips_if() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180863,12 +180864,12 @@ void m68000_device::roxr_aips_if() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180933,7 +180934,7 @@ void m68000_device::roxr_pais_if() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180957,12 +180958,12 @@ void m68000_device::roxr_pais_if() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181041,7 +181042,7 @@ void m68000_device::roxr_das_if() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181067,12 +181068,12 @@ void m68000_device::roxr_das_if() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181127,7 +181128,7 @@ void m68000_device::roxr_dais_if() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181189,7 +181190,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181215,12 +181216,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181300,7 +181301,7 @@ void m68000_device::roxr_adr16_if() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181324,12 +181325,12 @@ void m68000_device::roxr_adr16_if() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181430,7 +181431,7 @@ void m68000_device::roxr_adr32_if() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181454,12 +181455,12 @@ void m68000_device::roxr_adr32_if() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181516,7 +181517,7 @@ void m68000_device::roxl_ais_if() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181542,12 +181543,12 @@ void m68000_device::roxl_ais_if() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181610,7 +181611,7 @@ void m68000_device::roxl_aips_if() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181634,12 +181635,12 @@ void m68000_device::roxl_aips_if() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181704,7 +181705,7 @@ void m68000_device::roxl_pais_if() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181728,12 +181729,12 @@ void m68000_device::roxl_pais_if() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181812,7 +181813,7 @@ void m68000_device::roxl_das_if() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181838,12 +181839,12 @@ void m68000_device::roxl_das_if() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181898,7 +181899,7 @@ void m68000_device::roxl_dais_if() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181960,7 +181961,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181986,12 +181987,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182071,7 +182072,7 @@ void m68000_device::roxl_adr16_if() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182095,12 +182096,12 @@ void m68000_device::roxl_adr16_if() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182201,7 +182202,7 @@ void m68000_device::roxl_adr32_if() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182225,12 +182226,12 @@ void m68000_device::roxl_adr32_if() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182287,7 +182288,7 @@ void m68000_device::ror_ais_if() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182313,12 +182314,12 @@ void m68000_device::ror_ais_if() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182381,7 +182382,7 @@ void m68000_device::ror_aips_if() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182405,12 +182406,12 @@ void m68000_device::ror_aips_if() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182475,7 +182476,7 @@ void m68000_device::ror_pais_if() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182499,12 +182500,12 @@ void m68000_device::ror_pais_if() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182583,7 +182584,7 @@ void m68000_device::ror_das_if() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182609,12 +182610,12 @@ void m68000_device::ror_das_if() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182669,7 +182670,7 @@ void m68000_device::ror_dais_if() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182731,7 +182732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182757,12 +182758,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182842,7 +182843,7 @@ void m68000_device::ror_adr16_if() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182866,12 +182867,12 @@ void m68000_device::ror_adr16_if() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182972,7 +182973,7 @@ void m68000_device::ror_adr32_if() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182996,12 +182997,12 @@ void m68000_device::ror_adr32_if() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183058,7 +183059,7 @@ void m68000_device::rol_ais_if() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183084,12 +183085,12 @@ void m68000_device::rol_ais_if() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183152,7 +183153,7 @@ void m68000_device::rol_aips_if() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183176,12 +183177,12 @@ void m68000_device::rol_aips_if() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183246,7 +183247,7 @@ void m68000_device::rol_pais_if() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183270,12 +183271,12 @@ void m68000_device::rol_pais_if() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183354,7 +183355,7 @@ void m68000_device::rol_das_if() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183380,12 +183381,12 @@ void m68000_device::rol_das_if() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183440,7 +183441,7 @@ void m68000_device::rol_dais_if() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183502,7 +183503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183528,12 +183529,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183613,7 +183614,7 @@ void m68000_device::rol_adr16_if() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183637,12 +183638,12 @@ void m68000_device::rol_adr16_if() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183743,7 +183744,7 @@ void m68000_device::rol_adr32_if() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183767,12 +183768,12 @@ void m68000_device::rol_adr32_if() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000-sip.cpp b/src/devices/cpu/m68000/m68000-sip.cpp
index 8e806b13282..52a961fc870 100644
--- a/src/devices/cpu/m68000/m68000-sip.cpp
+++ b/src/devices/cpu/m68000/m68000-sip.cpp
@@ -209,7 +209,7 @@ void m68000_device::state_bus_error_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -219,7 +219,7 @@ void m68000_device::state_bus_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -245,7 +245,7 @@ void m68000_device::state_bus_error_ip()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -270,7 +270,7 @@ void m68000_device::state_bus_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -299,7 +299,7 @@ void m68000_device::state_bus_error_ip()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -324,7 +324,7 @@ void m68000_device::state_bus_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -352,7 +352,7 @@ void m68000_device::state_bus_error_ip()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -378,7 +378,7 @@ void m68000_device::state_bus_error_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -525,7 +525,7 @@ void m68000_device::state_address_error_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -535,7 +535,7 @@ void m68000_device::state_address_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -561,7 +561,7 @@ void m68000_device::state_address_error_ip()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -586,7 +586,7 @@ void m68000_device::state_address_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -615,7 +615,7 @@ void m68000_device::state_address_error_ip()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -640,7 +640,7 @@ void m68000_device::state_address_error_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -668,7 +668,7 @@ void m68000_device::state_address_error_ip()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -694,7 +694,7 @@ void m68000_device::state_address_error_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -851,7 +851,7 @@ void m68000_device::state_interrupt_ip()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -863,7 +863,7 @@ void m68000_device::state_interrupt_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -925,7 +925,7 @@ void m68000_device::state_interrupt_ip()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -951,7 +951,7 @@ void m68000_device::state_interrupt_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1096,7 +1096,7 @@ void m68000_device::state_trace_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1106,7 +1106,7 @@ void m68000_device::state_trace_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1134,7 +1134,7 @@ void m68000_device::state_trace_ip()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1160,7 +1160,7 @@ void m68000_device::state_trace_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1305,7 +1305,7 @@ void m68000_device::state_illegal_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1315,7 +1315,7 @@ void m68000_device::state_illegal_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1343,7 +1343,7 @@ void m68000_device::state_illegal_ip()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1369,7 +1369,7 @@ void m68000_device::state_illegal_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1514,7 +1514,7 @@ void m68000_device::state_priviledge_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1524,7 +1524,7 @@ void m68000_device::state_priviledge_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1552,7 +1552,7 @@ void m68000_device::state_priviledge_ip()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1578,7 +1578,7 @@ void m68000_device::state_priviledge_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1723,7 +1723,7 @@ void m68000_device::state_linea_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1733,7 +1733,7 @@ void m68000_device::state_linea_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1761,7 +1761,7 @@ void m68000_device::state_linea_ip()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1787,7 +1787,7 @@ void m68000_device::state_linea_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1932,7 +1932,7 @@ void m68000_device::state_linef_ip()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1942,7 +1942,7 @@ void m68000_device::state_linef_ip()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1970,7 +1970,7 @@ void m68000_device::state_linef_ip()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1996,7 +1996,7 @@ void m68000_device::state_linef_ip()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2138,7 +2138,7 @@ void m68000_device::ori_b_imm8_ds_ip() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2164,7 +2164,7 @@ void m68000_device::ori_b_imm8_ds_ip() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2172,7 +2172,7 @@ void m68000_device::ori_b_imm8_ds_ip() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2213,7 +2213,7 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2238,11 +2238,11 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2264,7 +2264,7 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2294,7 +2294,7 @@ void m68000_device::ori_b_imm8_ais_ip() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2327,7 +2327,7 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2355,12 +2355,12 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2383,7 +2383,7 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2413,7 +2413,7 @@ void m68000_device::ori_b_imm8_aips_ip() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2446,7 +2446,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2473,7 +2473,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2481,7 +2481,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2504,7 +2504,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2534,7 +2534,7 @@ void m68000_device::ori_b_imm8_pais_ip() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2567,7 +2567,7 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2592,7 +2592,7 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2618,11 +2618,11 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2644,7 +2644,7 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2674,7 +2674,7 @@ void m68000_device::ori_b_imm8_das_ip() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2707,7 +2707,7 @@ void m68000_device::ori_b_imm8_dais_ip() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2730,14 +2730,14 @@ void m68000_device::ori_b_imm8_dais_ip() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2745,7 +2745,7 @@ void m68000_device::ori_b_imm8_dais_ip() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2772,7 +2772,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2801,11 +2801,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2827,7 +2827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2857,7 +2857,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2889,7 +2889,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2917,7 +2917,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -2943,7 +2943,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -2966,7 +2966,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2996,7 +2996,7 @@ void m68000_device::ori_b_imm8_adr16_ip() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3028,7 +3028,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3054,7 +3054,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3081,7 +3081,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3107,7 +3107,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -3130,7 +3130,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3160,7 +3160,7 @@ void m68000_device::ori_b_imm8_adr32_ip() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3192,7 +3192,7 @@ void m68000_device::ori_imm8_ccr_ip() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3217,21 +3217,21 @@ void m68000_device::ori_imm8_ccr_ip() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3239,7 +3239,7 @@ void m68000_device::ori_imm8_ccr_ip() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3266,11 +3266,11 @@ void m68000_device::ori_imm8_ccr_ip() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3311,7 +3311,7 @@ void m68000_device::ori_w_imm16_ds_ip() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3337,7 +3337,7 @@ void m68000_device::ori_w_imm16_ds_ip() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3345,7 +3345,7 @@ void m68000_device::ori_w_imm16_ds_ip() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3386,7 +3386,7 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3411,11 +3411,11 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3441,7 +3441,7 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3471,7 +3471,7 @@ void m68000_device::ori_w_imm16_ais_ip() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3510,7 +3510,7 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3538,12 +3538,12 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3570,7 +3570,7 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3600,7 +3600,7 @@ void m68000_device::ori_w_imm16_aips_ip() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3639,7 +3639,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3666,7 +3666,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3674,7 +3674,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3701,7 +3701,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3731,7 +3731,7 @@ void m68000_device::ori_w_imm16_pais_ip() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3770,7 +3770,7 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3795,7 +3795,7 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3821,11 +3821,11 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3851,7 +3851,7 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3881,7 +3881,7 @@ void m68000_device::ori_w_imm16_das_ip() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3920,7 +3920,7 @@ void m68000_device::ori_w_imm16_dais_ip() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3943,14 +3943,14 @@ void m68000_device::ori_w_imm16_dais_ip() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3958,7 +3958,7 @@ void m68000_device::ori_w_imm16_dais_ip() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3985,7 +3985,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4014,11 +4014,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4044,7 +4044,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4074,7 +4074,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4112,7 +4112,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4140,7 +4140,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -4166,7 +4166,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4193,7 +4193,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4223,7 +4223,7 @@ void m68000_device::ori_w_imm16_adr16_ip() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4261,7 +4261,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4287,7 +4287,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4314,7 +4314,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -4340,7 +4340,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -4367,7 +4367,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4397,7 +4397,7 @@ void m68000_device::ori_w_imm16_adr32_ip() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4439,7 +4439,7 @@ void m68000_device::ori_i16u_sr_ip() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4464,23 +4464,23 @@ void m68000_device::ori_i16u_sr_ip() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4488,7 +4488,7 @@ void m68000_device::ori_i16u_sr_ip() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4515,11 +4515,11 @@ void m68000_device::ori_i16u_sr_ip() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4559,7 +4559,7 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4585,7 +4585,7 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4611,12 +4611,12 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4639,7 +4639,7 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4648,7 +4648,7 @@ void m68000_device::ori_l_imm32_ds_ip() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4668,7 +4668,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4694,7 +4694,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4719,7 +4719,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4747,7 +4747,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4773,7 +4773,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4801,7 +4801,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4829,7 +4829,7 @@ void m68000_device::ori_l_imm32_ais_ip() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4867,7 +4867,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4893,7 +4893,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4918,7 +4918,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4946,11 +4946,11 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4976,7 +4976,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5004,7 +5004,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5032,7 +5032,7 @@ void m68000_device::ori_l_imm32_aips_ip() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5070,7 +5070,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5096,7 +5096,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5120,14 +5120,14 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5154,7 +5154,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5180,7 +5180,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5208,7 +5208,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5236,7 +5236,7 @@ void m68000_device::ori_l_imm32_pais_ip() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5274,7 +5274,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5300,7 +5300,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5325,7 +5325,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5350,7 +5350,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5378,7 +5378,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5404,7 +5404,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5432,7 +5432,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5460,7 +5460,7 @@ void m68000_device::ori_l_imm32_das_ip() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5498,7 +5498,7 @@ void m68000_device::ori_l_imm32_dais_ip() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5524,7 +5524,7 @@ void m68000_device::ori_l_imm32_dais_ip() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5547,14 +5547,14 @@ void m68000_device::ori_l_imm32_dais_ip() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -5562,7 +5562,7 @@ void m68000_device::ori_l_imm32_dais_ip() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5589,7 +5589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5617,7 +5617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5645,7 +5645,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5671,7 +5671,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5699,7 +5699,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5727,7 +5727,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5764,7 +5764,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5790,7 +5790,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5818,7 +5818,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5844,7 +5844,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5872,7 +5872,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5898,7 +5898,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5926,7 +5926,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5954,7 +5954,7 @@ void m68000_device::ori_l_imm32_adr16_ip() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5991,7 +5991,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6017,7 +6017,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6043,7 +6043,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6070,7 +6070,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -6096,7 +6096,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6124,7 +6124,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -6150,7 +6150,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6178,7 +6178,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6206,7 +6206,7 @@ void m68000_device::ori_l_imm32_adr32_ip() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -6248,13 +6248,13 @@ void m68000_device::btst_dd_ds_ip() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6286,7 +6286,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6300,7 +6300,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6322,7 +6322,7 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6347,7 +6347,7 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6368,7 +6368,7 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6392,7 +6392,7 @@ void m68000_device::movep_w_das_dd_ip() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6432,11 +6432,11 @@ void m68000_device::btst_dd_ais_ip() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6458,13 +6458,13 @@ void m68000_device::btst_dd_ais_ip() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6507,12 +6507,12 @@ void m68000_device::btst_dd_aips_ip() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6535,13 +6535,13 @@ void m68000_device::btst_dd_aips_ip() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6583,7 +6583,7 @@ void m68000_device::btst_dd_pais_ip() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6591,7 +6591,7 @@ void m68000_device::btst_dd_pais_ip() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6614,13 +6614,13 @@ void m68000_device::btst_dd_pais_ip() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6660,7 +6660,7 @@ void m68000_device::btst_dd_das_ip() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6686,11 +6686,11 @@ void m68000_device::btst_dd_das_ip() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6712,13 +6712,13 @@ void m68000_device::btst_dd_das_ip() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6756,14 +6756,14 @@ void m68000_device::btst_dd_dais_ip() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6771,7 +6771,7 @@ void m68000_device::btst_dd_dais_ip() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6798,7 +6798,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6827,11 +6827,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6853,13 +6853,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6901,7 +6901,7 @@ void m68000_device::btst_dd_adr16_ip() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6927,7 +6927,7 @@ void m68000_device::btst_dd_adr16_ip() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -6950,13 +6950,13 @@ void m68000_device::btst_dd_adr16_ip() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6996,7 +6996,7 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7023,7 +7023,7 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7049,7 +7049,7 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -7072,13 +7072,13 @@ void m68000_device::btst_dd_adr32_ip() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7117,7 +7117,7 @@ void m68000_device::btst_dd_dpc_ip() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7143,11 +7143,11 @@ void m68000_device::btst_dd_dpc_ip() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7169,13 +7169,13 @@ void m68000_device::btst_dd_dpc_ip() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7212,14 +7212,14 @@ void m68000_device::btst_dd_dpci_ip() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7227,7 +7227,7 @@ void m68000_device::btst_dd_dpci_ip() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7254,7 +7254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7283,11 +7283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,13 +7309,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7357,7 +7357,7 @@ void m68000_device::btst_dd_imm_ip() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7385,12 +7385,12 @@ void m68000_device::btst_dd_imm_ip() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7422,7 +7422,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7436,7 +7436,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7462,13 +7462,13 @@ void m68000_device::bchg_dd_ds_ip() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -7500,7 +7500,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7513,14 +7513,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7542,7 +7542,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7567,7 +7567,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7587,7 +7587,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7608,7 +7608,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7629,7 +7629,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7653,7 +7653,7 @@ void m68000_device::movep_l_das_dd_ip() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7693,11 +7693,11 @@ void m68000_device::bchg_dd_ais_ip() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7720,7 +7720,7 @@ void m68000_device::bchg_dd_ais_ip() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7748,7 +7748,7 @@ void m68000_device::bchg_dd_ais_ip() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7785,12 +7785,12 @@ void m68000_device::bchg_dd_aips_ip() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7814,7 +7814,7 @@ void m68000_device::bchg_dd_aips_ip() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7842,7 +7842,7 @@ void m68000_device::bchg_dd_aips_ip() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7878,7 +7878,7 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7886,7 +7886,7 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7910,7 +7910,7 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7938,7 +7938,7 @@ void m68000_device::bchg_dd_pais_ip() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7972,7 +7972,7 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7998,11 +7998,11 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8025,7 +8025,7 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8053,7 +8053,7 @@ void m68000_device::bchg_dd_das_ip() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8085,14 +8085,14 @@ void m68000_device::bchg_dd_dais_ip() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8100,7 +8100,7 @@ void m68000_device::bchg_dd_dais_ip() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8127,7 +8127,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8156,11 +8156,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8183,7 +8183,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8211,7 +8211,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8247,7 +8247,7 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8273,7 +8273,7 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -8297,7 +8297,7 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8325,7 +8325,7 @@ void m68000_device::bchg_dd_adr16_ip() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8359,7 +8359,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8386,7 +8386,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8412,7 +8412,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -8436,7 +8436,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -8464,7 +8464,7 @@ void m68000_device::bchg_dd_adr32_ip() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8502,13 +8502,13 @@ void m68000_device::bclr_dd_ds_ip() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8537,14 +8537,14 @@ void m68000_device::bclr_dd_ds_ip() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8557,18 +8557,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8590,7 +8590,7 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8617,7 +8617,7 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8635,7 +8635,7 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8654,11 +8654,11 @@ void m68000_device::movep_w_dd_das_ip() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8698,11 +8698,11 @@ void m68000_device::bclr_dd_ais_ip() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8724,12 +8724,12 @@ void m68000_device::bclr_dd_ais_ip() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8757,7 +8757,7 @@ void m68000_device::bclr_dd_ais_ip() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8794,12 +8794,12 @@ void m68000_device::bclr_dd_aips_ip() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8822,12 +8822,12 @@ void m68000_device::bclr_dd_aips_ip() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8855,7 +8855,7 @@ void m68000_device::bclr_dd_aips_ip() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8891,7 +8891,7 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8899,7 +8899,7 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8922,12 +8922,12 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8955,7 +8955,7 @@ void m68000_device::bclr_dd_pais_ip() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8989,7 +8989,7 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9015,11 +9015,11 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9041,12 +9041,12 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9074,7 +9074,7 @@ void m68000_device::bclr_dd_das_ip() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9106,14 +9106,14 @@ void m68000_device::bclr_dd_dais_ip() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9121,7 +9121,7 @@ void m68000_device::bclr_dd_dais_ip() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9148,7 +9148,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9177,11 +9177,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9203,12 +9203,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9236,7 +9236,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9272,7 +9272,7 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9298,7 +9298,7 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -9321,12 +9321,12 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9354,7 +9354,7 @@ void m68000_device::bclr_dd_adr16_ip() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9388,7 +9388,7 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9415,7 +9415,7 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9441,7 +9441,7 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9464,12 +9464,12 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -9497,7 +9497,7 @@ void m68000_device::bclr_dd_adr32_ip() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9535,13 +9535,13 @@ void m68000_device::bset_dd_ds_ip() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9573,7 +9573,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9586,14 +9586,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9615,7 +9615,7 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9641,7 +9641,7 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9659,7 +9659,7 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9678,7 +9678,7 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9696,7 +9696,7 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9715,11 +9715,11 @@ void m68000_device::movep_l_dd_das_ip() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9759,11 +9759,11 @@ void m68000_device::bset_dd_ais_ip() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9786,7 +9786,7 @@ void m68000_device::bset_dd_ais_ip() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9814,7 +9814,7 @@ void m68000_device::bset_dd_ais_ip() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9851,12 +9851,12 @@ void m68000_device::bset_dd_aips_ip() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9880,7 +9880,7 @@ void m68000_device::bset_dd_aips_ip() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9908,7 +9908,7 @@ void m68000_device::bset_dd_aips_ip() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9944,7 +9944,7 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9952,7 +9952,7 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9976,7 +9976,7 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10004,7 +10004,7 @@ void m68000_device::bset_dd_pais_ip() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10038,7 +10038,7 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10064,11 +10064,11 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10091,7 +10091,7 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10119,7 +10119,7 @@ void m68000_device::bset_dd_das_ip() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10151,14 +10151,14 @@ void m68000_device::bset_dd_dais_ip() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10166,7 +10166,7 @@ void m68000_device::bset_dd_dais_ip() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10193,7 +10193,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10222,11 +10222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10249,7 +10249,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10277,7 +10277,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10313,7 +10313,7 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10339,7 +10339,7 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10363,7 +10363,7 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10391,7 +10391,7 @@ void m68000_device::bset_dd_adr16_ip() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10425,7 +10425,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10452,7 +10452,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10478,7 +10478,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10502,7 +10502,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10530,7 +10530,7 @@ void m68000_device::bset_dd_adr32_ip() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10565,7 +10565,7 @@ void m68000_device::andi_b_imm8_ds_ip() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10591,7 +10591,7 @@ void m68000_device::andi_b_imm8_ds_ip() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10599,7 +10599,7 @@ void m68000_device::andi_b_imm8_ds_ip() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10640,7 +10640,7 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10665,11 +10665,11 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10691,7 +10691,7 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10721,7 +10721,7 @@ void m68000_device::andi_b_imm8_ais_ip() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10754,7 +10754,7 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10782,12 +10782,12 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10810,7 +10810,7 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10840,7 +10840,7 @@ void m68000_device::andi_b_imm8_aips_ip() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10873,7 +10873,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10900,7 +10900,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10908,7 +10908,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10931,7 +10931,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10961,7 +10961,7 @@ void m68000_device::andi_b_imm8_pais_ip() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10994,7 +10994,7 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11019,7 +11019,7 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11045,11 +11045,11 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11071,7 +11071,7 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11101,7 +11101,7 @@ void m68000_device::andi_b_imm8_das_ip() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11134,7 +11134,7 @@ void m68000_device::andi_b_imm8_dais_ip() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11157,14 +11157,14 @@ void m68000_device::andi_b_imm8_dais_ip() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11172,7 +11172,7 @@ void m68000_device::andi_b_imm8_dais_ip() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11199,7 +11199,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11228,11 +11228,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11254,7 +11254,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11284,7 +11284,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11316,7 +11316,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11344,7 +11344,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11370,7 +11370,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -11393,7 +11393,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11423,7 +11423,7 @@ void m68000_device::andi_b_imm8_adr16_ip() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11455,7 +11455,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11481,7 +11481,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11508,7 +11508,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11534,7 +11534,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -11557,7 +11557,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11587,7 +11587,7 @@ void m68000_device::andi_b_imm8_adr32_ip() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11619,7 +11619,7 @@ void m68000_device::andi_imm8_ccr_ip() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11644,21 +11644,21 @@ void m68000_device::andi_imm8_ccr_ip() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11666,7 +11666,7 @@ void m68000_device::andi_imm8_ccr_ip() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11693,11 +11693,11 @@ void m68000_device::andi_imm8_ccr_ip() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11738,7 +11738,7 @@ void m68000_device::andi_w_imm16_ds_ip() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11764,7 +11764,7 @@ void m68000_device::andi_w_imm16_ds_ip() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11772,7 +11772,7 @@ void m68000_device::andi_w_imm16_ds_ip() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11813,7 +11813,7 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11838,11 +11838,11 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11868,7 +11868,7 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11898,7 +11898,7 @@ void m68000_device::andi_w_imm16_ais_ip() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -11937,7 +11937,7 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11965,12 +11965,12 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -11997,7 +11997,7 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12027,7 +12027,7 @@ void m68000_device::andi_w_imm16_aips_ip() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12066,7 +12066,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12093,7 +12093,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12101,7 +12101,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -12128,7 +12128,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12158,7 +12158,7 @@ void m68000_device::andi_w_imm16_pais_ip() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12197,7 +12197,7 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12222,7 +12222,7 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12248,11 +12248,11 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12278,7 +12278,7 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12308,7 +12308,7 @@ void m68000_device::andi_w_imm16_das_ip() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12347,7 +12347,7 @@ void m68000_device::andi_w_imm16_dais_ip() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12370,14 +12370,14 @@ void m68000_device::andi_w_imm16_dais_ip() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12385,7 +12385,7 @@ void m68000_device::andi_w_imm16_dais_ip() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12412,7 +12412,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12441,11 +12441,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12471,7 +12471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12501,7 +12501,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12539,7 +12539,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12567,7 +12567,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12593,7 +12593,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12620,7 +12620,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12650,7 +12650,7 @@ void m68000_device::andi_w_imm16_adr16_ip() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12688,7 +12688,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12714,7 +12714,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12741,7 +12741,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12767,7 +12767,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -12794,7 +12794,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12824,7 +12824,7 @@ void m68000_device::andi_w_imm16_adr32_ip() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12866,7 +12866,7 @@ void m68000_device::andi_i16u_sr_ip() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12891,23 +12891,23 @@ void m68000_device::andi_i16u_sr_ip() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -12915,7 +12915,7 @@ void m68000_device::andi_i16u_sr_ip() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12942,11 +12942,11 @@ void m68000_device::andi_i16u_sr_ip() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12986,7 +12986,7 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13012,7 +13012,7 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13038,12 +13038,12 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13066,7 +13066,7 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -13075,7 +13075,7 @@ void m68000_device::andi_l_imm32_ds_ip() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -13095,7 +13095,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13121,7 +13121,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13146,7 +13146,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13174,7 +13174,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13200,7 +13200,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13228,7 +13228,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13256,7 +13256,7 @@ void m68000_device::andi_l_imm32_ais_ip() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13294,7 +13294,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13320,7 +13320,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13345,7 +13345,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13373,11 +13373,11 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13403,7 +13403,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13431,7 +13431,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13459,7 +13459,7 @@ void m68000_device::andi_l_imm32_aips_ip() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13497,7 +13497,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13523,7 +13523,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13547,14 +13547,14 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13581,7 +13581,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13607,7 +13607,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13635,7 +13635,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13663,7 +13663,7 @@ void m68000_device::andi_l_imm32_pais_ip() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13701,7 +13701,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13727,7 +13727,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13752,7 +13752,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13777,7 +13777,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -13805,7 +13805,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13831,7 +13831,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13859,7 +13859,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13887,7 +13887,7 @@ void m68000_device::andi_l_imm32_das_ip() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13925,7 +13925,7 @@ void m68000_device::andi_l_imm32_dais_ip() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13951,7 +13951,7 @@ void m68000_device::andi_l_imm32_dais_ip() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13974,14 +13974,14 @@ void m68000_device::andi_l_imm32_dais_ip() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -13989,7 +13989,7 @@ void m68000_device::andi_l_imm32_dais_ip() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14016,7 +14016,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14044,7 +14044,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14072,7 +14072,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14098,7 +14098,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14126,7 +14126,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14154,7 +14154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14191,7 +14191,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14217,7 +14217,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14245,7 +14245,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14271,7 +14271,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14299,7 +14299,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14325,7 +14325,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14381,7 +14381,7 @@ void m68000_device::andi_l_imm32_adr16_ip() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14418,7 +14418,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14444,7 +14444,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14470,7 +14470,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14497,7 +14497,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -14523,7 +14523,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14551,7 +14551,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14577,7 +14577,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14605,7 +14605,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14633,7 +14633,7 @@ void m68000_device::andi_l_imm32_adr32_ip() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14697,7 +14697,7 @@ void m68000_device::subi_b_imm8_ds_ip() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -14769,7 +14769,7 @@ void m68000_device::subi_b_imm8_ais_ip() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14794,7 +14794,7 @@ void m68000_device::subi_b_imm8_ais_ip() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14886,7 +14886,7 @@ void m68000_device::subi_b_imm8_aips_ip() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -14909,7 +14909,7 @@ void m68000_device::subi_b_imm8_aips_ip() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15003,7 +15003,7 @@ void m68000_device::subi_b_imm8_pais_ip() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15026,7 +15026,7 @@ void m68000_device::subi_b_imm8_pais_ip() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15137,7 +15137,7 @@ void m68000_device::subi_b_imm8_das_ip() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15162,7 +15162,7 @@ void m68000_device::subi_b_imm8_das_ip() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15246,7 +15246,7 @@ void m68000_device::subi_b_imm8_dais_ip() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -15314,7 +15314,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15339,7 +15339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15451,7 +15451,7 @@ void m68000_device::subi_b_imm8_adr16_ip() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15474,7 +15474,7 @@ void m68000_device::subi_b_imm8_adr16_ip() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15610,7 +15610,7 @@ void m68000_device::subi_b_imm8_adr32_ip() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -15633,7 +15633,7 @@ void m68000_device::subi_b_imm8_adr32_ip() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15720,7 +15720,7 @@ void m68000_device::subi_w_imm16_ds_ip() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -15792,7 +15792,7 @@ void m68000_device::subi_w_imm16_ais_ip() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15821,7 +15821,7 @@ void m68000_device::subi_w_imm16_ais_ip() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15919,7 +15919,7 @@ void m68000_device::subi_w_imm16_aips_ip() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15946,7 +15946,7 @@ void m68000_device::subi_w_imm16_aips_ip() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16046,7 +16046,7 @@ void m68000_device::subi_w_imm16_pais_ip() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -16073,7 +16073,7 @@ void m68000_device::subi_w_imm16_pais_ip() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16190,7 +16190,7 @@ void m68000_device::subi_w_imm16_das_ip() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16219,7 +16219,7 @@ void m68000_device::subi_w_imm16_das_ip() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16309,7 +16309,7 @@ void m68000_device::subi_w_imm16_dais_ip() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16377,7 +16377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16406,7 +16406,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16524,7 +16524,7 @@ void m68000_device::subi_w_imm16_adr16_ip() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16551,7 +16551,7 @@ void m68000_device::subi_w_imm16_adr16_ip() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16693,7 +16693,7 @@ void m68000_device::subi_w_imm16_adr32_ip() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -16720,7 +16720,7 @@ void m68000_device::subi_w_imm16_adr32_ip() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16837,7 +16837,7 @@ void m68000_device::subi_l_imm32_ds_ip() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -16864,7 +16864,7 @@ void m68000_device::subi_l_imm32_ds_ip() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -16941,7 +16941,7 @@ void m68000_device::subi_l_imm32_ais_ip() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16994,7 +16994,7 @@ void m68000_device::subi_l_imm32_ais_ip() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17022,7 +17022,7 @@ void m68000_device::subi_l_imm32_ais_ip() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17136,7 +17136,7 @@ void m68000_device::subi_l_imm32_aips_ip() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -17192,7 +17192,7 @@ void m68000_device::subi_l_imm32_aips_ip() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17220,7 +17220,7 @@ void m68000_device::subi_l_imm32_aips_ip() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17333,7 +17333,7 @@ void m68000_device::subi_l_imm32_pais_ip() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -17391,7 +17391,7 @@ void m68000_device::subi_l_imm32_pais_ip() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17419,7 +17419,7 @@ void m68000_device::subi_l_imm32_pais_ip() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17557,7 +17557,7 @@ void m68000_device::subi_l_imm32_das_ip() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17610,7 +17610,7 @@ void m68000_device::subi_l_imm32_das_ip() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17638,7 +17638,7 @@ void m68000_device::subi_l_imm32_das_ip() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17750,7 +17750,7 @@ void m68000_device::subi_l_imm32_dais_ip() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -17817,7 +17817,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17870,7 +17870,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17898,7 +17898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18038,7 +18038,7 @@ void m68000_device::subi_l_imm32_adr16_ip() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -18091,7 +18091,7 @@ void m68000_device::subi_l_imm32_adr16_ip() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18119,7 +18119,7 @@ void m68000_device::subi_l_imm32_adr16_ip() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18283,7 +18283,7 @@ void m68000_device::subi_l_imm32_adr32_ip() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -18336,7 +18336,7 @@ void m68000_device::subi_l_imm32_adr32_ip() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18364,7 +18364,7 @@ void m68000_device::subi_l_imm32_adr32_ip() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18455,7 +18455,7 @@ void m68000_device::addi_b_imm8_ds_ip() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -18527,7 +18527,7 @@ void m68000_device::addi_b_imm8_ais_ip() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18552,7 +18552,7 @@ void m68000_device::addi_b_imm8_ais_ip() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18644,7 +18644,7 @@ void m68000_device::addi_b_imm8_aips_ip() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18667,7 +18667,7 @@ void m68000_device::addi_b_imm8_aips_ip() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18761,7 +18761,7 @@ void m68000_device::addi_b_imm8_pais_ip() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18784,7 +18784,7 @@ void m68000_device::addi_b_imm8_pais_ip() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18895,7 +18895,7 @@ void m68000_device::addi_b_imm8_das_ip() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18920,7 +18920,7 @@ void m68000_device::addi_b_imm8_das_ip() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19004,7 +19004,7 @@ void m68000_device::addi_b_imm8_dais_ip() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19072,7 +19072,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19097,7 +19097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19209,7 +19209,7 @@ void m68000_device::addi_b_imm8_adr16_ip() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19232,7 +19232,7 @@ void m68000_device::addi_b_imm8_adr16_ip() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19368,7 +19368,7 @@ void m68000_device::addi_b_imm8_adr32_ip() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -19391,7 +19391,7 @@ void m68000_device::addi_b_imm8_adr32_ip() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19478,7 +19478,7 @@ void m68000_device::addi_w_imm16_ds_ip() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19550,7 +19550,7 @@ void m68000_device::addi_w_imm16_ais_ip() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19579,7 +19579,7 @@ void m68000_device::addi_w_imm16_ais_ip() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19677,7 +19677,7 @@ void m68000_device::addi_w_imm16_aips_ip() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19704,7 +19704,7 @@ void m68000_device::addi_w_imm16_aips_ip() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19804,7 +19804,7 @@ void m68000_device::addi_w_imm16_pais_ip() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19831,7 +19831,7 @@ void m68000_device::addi_w_imm16_pais_ip() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19948,7 +19948,7 @@ void m68000_device::addi_w_imm16_das_ip() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19977,7 +19977,7 @@ void m68000_device::addi_w_imm16_das_ip() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20067,7 +20067,7 @@ void m68000_device::addi_w_imm16_dais_ip() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -20135,7 +20135,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20164,7 +20164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20282,7 +20282,7 @@ void m68000_device::addi_w_imm16_adr16_ip() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20309,7 +20309,7 @@ void m68000_device::addi_w_imm16_adr16_ip() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20451,7 +20451,7 @@ void m68000_device::addi_w_imm16_adr32_ip() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -20478,7 +20478,7 @@ void m68000_device::addi_w_imm16_adr32_ip() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20595,7 +20595,7 @@ void m68000_device::addi_l_imm32_ds_ip() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -20622,7 +20622,7 @@ void m68000_device::addi_l_imm32_ds_ip() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -20699,7 +20699,7 @@ void m68000_device::addi_l_imm32_ais_ip() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20752,7 +20752,7 @@ void m68000_device::addi_l_imm32_ais_ip() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20780,7 +20780,7 @@ void m68000_device::addi_l_imm32_ais_ip() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20894,7 +20894,7 @@ void m68000_device::addi_l_imm32_aips_ip() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20950,7 +20950,7 @@ void m68000_device::addi_l_imm32_aips_ip() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20978,7 +20978,7 @@ void m68000_device::addi_l_imm32_aips_ip() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21091,7 +21091,7 @@ void m68000_device::addi_l_imm32_pais_ip() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -21149,7 +21149,7 @@ void m68000_device::addi_l_imm32_pais_ip() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21177,7 +21177,7 @@ void m68000_device::addi_l_imm32_pais_ip() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21315,7 +21315,7 @@ void m68000_device::addi_l_imm32_das_ip() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21368,7 +21368,7 @@ void m68000_device::addi_l_imm32_das_ip() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21396,7 +21396,7 @@ void m68000_device::addi_l_imm32_das_ip() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21508,7 +21508,7 @@ void m68000_device::addi_l_imm32_dais_ip() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -21575,7 +21575,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21628,7 +21628,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21656,7 +21656,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21796,7 +21796,7 @@ void m68000_device::addi_l_imm32_adr16_ip() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21849,7 +21849,7 @@ void m68000_device::addi_l_imm32_adr16_ip() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21877,7 +21877,7 @@ void m68000_device::addi_l_imm32_adr16_ip() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22041,7 +22041,7 @@ void m68000_device::addi_l_imm32_adr32_ip() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22094,7 +22094,7 @@ void m68000_device::addi_l_imm32_adr32_ip() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22122,7 +22122,7 @@ void m68000_device::addi_l_imm32_adr32_ip() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22188,7 +22188,7 @@ void m68000_device::btst_imm8_ds_ip() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22217,13 +22217,13 @@ void m68000_device::btst_imm8_ds_ip() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22255,7 +22255,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22269,7 +22269,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22292,7 +22292,7 @@ void m68000_device::btst_imm8_ais_ip() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22317,11 +22317,11 @@ void m68000_device::btst_imm8_ais_ip() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22343,13 +22343,13 @@ void m68000_device::btst_imm8_ais_ip() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22390,7 +22390,7 @@ void m68000_device::btst_imm8_aips_ip() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22418,12 +22418,12 @@ void m68000_device::btst_imm8_aips_ip() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22446,13 +22446,13 @@ void m68000_device::btst_imm8_aips_ip() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22493,7 +22493,7 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22520,7 +22520,7 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22528,7 +22528,7 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22551,13 +22551,13 @@ void m68000_device::btst_imm8_pais_ip() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22598,7 +22598,7 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22623,7 +22623,7 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22649,11 +22649,11 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22675,13 +22675,13 @@ void m68000_device::btst_imm8_das_ip() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22722,7 +22722,7 @@ void m68000_device::btst_imm8_dais_ip() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22745,14 +22745,14 @@ void m68000_device::btst_imm8_dais_ip() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22760,7 +22760,7 @@ void m68000_device::btst_imm8_dais_ip() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22787,7 +22787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22816,11 +22816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22842,13 +22842,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22888,7 +22888,7 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22916,7 +22916,7 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22942,7 +22942,7 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -22965,13 +22965,13 @@ void m68000_device::btst_imm8_adr16_ip() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23011,7 +23011,7 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23037,7 +23037,7 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23064,7 +23064,7 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23090,7 +23090,7 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -23113,13 +23113,13 @@ void m68000_device::btst_imm8_adr32_ip() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23159,7 +23159,7 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23184,7 +23184,7 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23210,11 +23210,11 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23236,13 +23236,13 @@ void m68000_device::btst_imm8_dpc_ip() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23282,7 +23282,7 @@ void m68000_device::btst_imm8_dpci_ip() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23305,14 +23305,14 @@ void m68000_device::btst_imm8_dpci_ip() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23320,7 +23320,7 @@ void m68000_device::btst_imm8_dpci_ip() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23347,7 +23347,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23376,11 +23376,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23402,13 +23402,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23449,7 +23449,7 @@ void m68000_device::bchg_imm8_ds_ip() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23478,13 +23478,13 @@ void m68000_device::bchg_imm8_ds_ip() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -23516,7 +23516,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23529,14 +23529,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23559,7 +23559,7 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23584,11 +23584,11 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23611,7 +23611,7 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23639,7 +23639,7 @@ void m68000_device::bchg_imm8_ais_ip() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23674,7 +23674,7 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23702,12 +23702,12 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23731,7 +23731,7 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23759,7 +23759,7 @@ void m68000_device::bchg_imm8_aips_ip() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23794,7 +23794,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23821,7 +23821,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23829,7 +23829,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23853,7 +23853,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23881,7 +23881,7 @@ void m68000_device::bchg_imm8_pais_ip() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23916,7 +23916,7 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23941,7 +23941,7 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23967,11 +23967,11 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23994,7 +23994,7 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24022,7 +24022,7 @@ void m68000_device::bchg_imm8_das_ip() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24057,7 +24057,7 @@ void m68000_device::bchg_imm8_dais_ip() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24080,14 +24080,14 @@ void m68000_device::bchg_imm8_dais_ip() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24095,7 +24095,7 @@ void m68000_device::bchg_imm8_dais_ip() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24122,7 +24122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24151,11 +24151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24178,7 +24178,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24206,7 +24206,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24240,7 +24240,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24268,7 +24268,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24294,7 +24294,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24318,7 +24318,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24346,7 +24346,7 @@ void m68000_device::bchg_imm8_adr16_ip() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24380,7 +24380,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24406,7 +24406,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24433,7 +24433,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24459,7 +24459,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -24483,7 +24483,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -24511,7 +24511,7 @@ void m68000_device::bchg_imm8_adr32_ip() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24546,7 +24546,7 @@ void m68000_device::bclr_imm8_ds_ip() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24575,13 +24575,13 @@ void m68000_device::bclr_imm8_ds_ip() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24610,14 +24610,14 @@ void m68000_device::bclr_imm8_ds_ip() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24630,18 +24630,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24664,7 +24664,7 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24689,11 +24689,11 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24715,12 +24715,12 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24748,7 +24748,7 @@ void m68000_device::bclr_imm8_ais_ip() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24783,7 +24783,7 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24811,12 +24811,12 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24839,12 +24839,12 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24872,7 +24872,7 @@ void m68000_device::bclr_imm8_aips_ip() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24907,7 +24907,7 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24934,7 +24934,7 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24942,7 +24942,7 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24965,12 +24965,12 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24998,7 +24998,7 @@ void m68000_device::bclr_imm8_pais_ip() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25033,7 +25033,7 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25058,7 +25058,7 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25084,11 +25084,11 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25110,12 +25110,12 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25143,7 +25143,7 @@ void m68000_device::bclr_imm8_das_ip() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25178,7 +25178,7 @@ void m68000_device::bclr_imm8_dais_ip() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25201,14 +25201,14 @@ void m68000_device::bclr_imm8_dais_ip() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25216,7 +25216,7 @@ void m68000_device::bclr_imm8_dais_ip() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25243,7 +25243,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25272,11 +25272,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25298,12 +25298,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25331,7 +25331,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25365,7 +25365,7 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25393,7 +25393,7 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25419,7 +25419,7 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25442,12 +25442,12 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25475,7 +25475,7 @@ void m68000_device::bclr_imm8_adr16_ip() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25509,7 +25509,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25535,7 +25535,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25562,7 +25562,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25588,7 +25588,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -25611,12 +25611,12 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -25644,7 +25644,7 @@ void m68000_device::bclr_imm8_adr32_ip() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25679,7 +25679,7 @@ void m68000_device::bset_imm8_ds_ip() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25708,13 +25708,13 @@ void m68000_device::bset_imm8_ds_ip() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25746,7 +25746,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25759,14 +25759,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25789,7 +25789,7 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25814,11 +25814,11 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25841,7 +25841,7 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25869,7 +25869,7 @@ void m68000_device::bset_imm8_ais_ip() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25904,7 +25904,7 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25932,12 +25932,12 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -25961,7 +25961,7 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25989,7 +25989,7 @@ void m68000_device::bset_imm8_aips_ip() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26024,7 +26024,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26051,7 +26051,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -26059,7 +26059,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -26083,7 +26083,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26111,7 +26111,7 @@ void m68000_device::bset_imm8_pais_ip() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26146,7 +26146,7 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26171,7 +26171,7 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26197,11 +26197,11 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26224,7 +26224,7 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26252,7 +26252,7 @@ void m68000_device::bset_imm8_das_ip() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26287,7 +26287,7 @@ void m68000_device::bset_imm8_dais_ip() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26310,14 +26310,14 @@ void m68000_device::bset_imm8_dais_ip() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26325,7 +26325,7 @@ void m68000_device::bset_imm8_dais_ip() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26352,7 +26352,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26381,11 +26381,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26408,7 +26408,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26436,7 +26436,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26470,7 +26470,7 @@ void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26498,7 +26498,7 @@ void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -26524,7 +26524,7 @@ void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26548,7 +26548,7 @@ void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26576,7 +26576,7 @@ void m68000_device::bset_imm8_adr16_ip() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26610,7 +26610,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26636,7 +26636,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26663,7 +26663,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26689,7 +26689,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -26713,7 +26713,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -26741,7 +26741,7 @@ void m68000_device::bset_imm8_adr32_ip() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26776,7 +26776,7 @@ void m68000_device::eori_b_imm8_ds_ip() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26802,7 +26802,7 @@ void m68000_device::eori_b_imm8_ds_ip() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -26810,7 +26810,7 @@ void m68000_device::eori_b_imm8_ds_ip() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26851,7 +26851,7 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26876,11 +26876,11 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26902,7 +26902,7 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26932,7 +26932,7 @@ void m68000_device::eori_b_imm8_ais_ip() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -26965,7 +26965,7 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26993,12 +26993,12 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27021,7 +27021,7 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27051,7 +27051,7 @@ void m68000_device::eori_b_imm8_aips_ip() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27084,7 +27084,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27111,7 +27111,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27119,7 +27119,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27142,7 +27142,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27172,7 +27172,7 @@ void m68000_device::eori_b_imm8_pais_ip() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27205,7 +27205,7 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27230,7 +27230,7 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27256,11 +27256,11 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27282,7 +27282,7 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27312,7 +27312,7 @@ void m68000_device::eori_b_imm8_das_ip() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27345,7 +27345,7 @@ void m68000_device::eori_b_imm8_dais_ip() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27368,14 +27368,14 @@ void m68000_device::eori_b_imm8_dais_ip() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27383,7 +27383,7 @@ void m68000_device::eori_b_imm8_dais_ip() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27410,7 +27410,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27439,11 +27439,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27465,7 +27465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27495,7 +27495,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27527,7 +27527,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27555,7 +27555,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -27581,7 +27581,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -27604,7 +27604,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27634,7 +27634,7 @@ void m68000_device::eori_b_imm8_adr16_ip() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27666,7 +27666,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27692,7 +27692,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27719,7 +27719,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -27745,7 +27745,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -27768,7 +27768,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27798,7 +27798,7 @@ void m68000_device::eori_b_imm8_adr32_ip() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27830,7 +27830,7 @@ void m68000_device::eori_imm8_ccr_ip() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27855,21 +27855,21 @@ void m68000_device::eori_imm8_ccr_ip() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -27877,7 +27877,7 @@ void m68000_device::eori_imm8_ccr_ip() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27904,11 +27904,11 @@ void m68000_device::eori_imm8_ccr_ip() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27949,7 +27949,7 @@ void m68000_device::eori_w_imm16_ds_ip() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27975,7 +27975,7 @@ void m68000_device::eori_w_imm16_ds_ip() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -27983,7 +27983,7 @@ void m68000_device::eori_w_imm16_ds_ip() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28024,7 +28024,7 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28049,11 +28049,11 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28079,7 +28079,7 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28109,7 +28109,7 @@ void m68000_device::eori_w_imm16_ais_ip() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28148,7 +28148,7 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28176,12 +28176,12 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28208,7 +28208,7 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28238,7 +28238,7 @@ void m68000_device::eori_w_imm16_aips_ip() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28277,7 +28277,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28304,7 +28304,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28312,7 +28312,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28339,7 +28339,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28369,7 +28369,7 @@ void m68000_device::eori_w_imm16_pais_ip() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28408,7 +28408,7 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28433,7 +28433,7 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28459,11 +28459,11 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28489,7 +28489,7 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28519,7 +28519,7 @@ void m68000_device::eori_w_imm16_das_ip() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28558,7 +28558,7 @@ void m68000_device::eori_w_imm16_dais_ip() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28581,14 +28581,14 @@ void m68000_device::eori_w_imm16_dais_ip() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28596,7 +28596,7 @@ void m68000_device::eori_w_imm16_dais_ip() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28623,7 +28623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28652,11 +28652,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28682,7 +28682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28712,7 +28712,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28750,7 +28750,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28778,7 +28778,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -28804,7 +28804,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -28831,7 +28831,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28861,7 +28861,7 @@ void m68000_device::eori_w_imm16_adr16_ip() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28899,7 +28899,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28925,7 +28925,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28952,7 +28952,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -28978,7 +28978,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -29005,7 +29005,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29035,7 +29035,7 @@ void m68000_device::eori_w_imm16_adr32_ip() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29077,7 +29077,7 @@ void m68000_device::eori_i16u_sr_ip() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29102,23 +29102,23 @@ void m68000_device::eori_i16u_sr_ip() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -29126,7 +29126,7 @@ void m68000_device::eori_i16u_sr_ip() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29153,11 +29153,11 @@ void m68000_device::eori_i16u_sr_ip() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29197,7 +29197,7 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29223,7 +29223,7 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29249,12 +29249,12 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29277,7 +29277,7 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -29286,7 +29286,7 @@ void m68000_device::eori_l_imm32_ds_ip() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -29306,7 +29306,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29332,7 +29332,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29357,7 +29357,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29385,7 +29385,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29411,7 +29411,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29439,7 +29439,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29467,7 +29467,7 @@ void m68000_device::eori_l_imm32_ais_ip() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29505,7 +29505,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29531,7 +29531,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29556,7 +29556,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29584,11 +29584,11 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29614,7 +29614,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29642,7 +29642,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29670,7 +29670,7 @@ void m68000_device::eori_l_imm32_aips_ip() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29708,7 +29708,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29734,7 +29734,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29758,14 +29758,14 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29792,7 +29792,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29818,7 +29818,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29846,7 +29846,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29874,7 +29874,7 @@ void m68000_device::eori_l_imm32_pais_ip() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29912,7 +29912,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29938,7 +29938,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29963,7 +29963,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29988,7 +29988,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30016,7 +30016,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30042,7 +30042,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30070,7 +30070,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30098,7 +30098,7 @@ void m68000_device::eori_l_imm32_das_ip() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30136,7 +30136,7 @@ void m68000_device::eori_l_imm32_dais_ip() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30162,7 +30162,7 @@ void m68000_device::eori_l_imm32_dais_ip() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30185,14 +30185,14 @@ void m68000_device::eori_l_imm32_dais_ip() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -30200,7 +30200,7 @@ void m68000_device::eori_l_imm32_dais_ip() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30227,7 +30227,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30255,7 +30255,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30283,7 +30283,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30309,7 +30309,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30337,7 +30337,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30365,7 +30365,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30402,7 +30402,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30428,7 +30428,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30456,7 +30456,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30482,7 +30482,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30510,7 +30510,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30536,7 +30536,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30564,7 +30564,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30592,7 +30592,7 @@ void m68000_device::eori_l_imm32_adr16_ip() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30629,7 +30629,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30655,7 +30655,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30681,7 +30681,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30708,7 +30708,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -30734,7 +30734,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30762,7 +30762,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30788,7 +30788,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30816,7 +30816,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30844,7 +30844,7 @@ void m68000_device::eori_l_imm32_adr32_ip() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30908,7 +30908,7 @@ void m68000_device::cmpi_b_imm8_ds_ip() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -30979,7 +30979,7 @@ void m68000_device::cmpi_b_imm8_ais_ip() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31004,7 +31004,7 @@ void m68000_device::cmpi_b_imm8_ais_ip() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31080,7 +31080,7 @@ void m68000_device::cmpi_b_imm8_aips_ip() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31103,7 +31103,7 @@ void m68000_device::cmpi_b_imm8_aips_ip() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31181,7 +31181,7 @@ void m68000_device::cmpi_b_imm8_pais_ip() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31204,7 +31204,7 @@ void m68000_device::cmpi_b_imm8_pais_ip() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31299,7 +31299,7 @@ void m68000_device::cmpi_b_imm8_das_ip() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31324,7 +31324,7 @@ void m68000_device::cmpi_b_imm8_das_ip() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31392,7 +31392,7 @@ void m68000_device::cmpi_b_imm8_dais_ip() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31460,7 +31460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31485,7 +31485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31581,7 +31581,7 @@ void m68000_device::cmpi_b_imm8_adr16_ip() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31604,7 +31604,7 @@ void m68000_device::cmpi_b_imm8_adr16_ip() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31724,7 +31724,7 @@ void m68000_device::cmpi_b_imm8_adr32_ip() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -31747,7 +31747,7 @@ void m68000_device::cmpi_b_imm8_adr32_ip() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31818,7 +31818,7 @@ void m68000_device::cmpi_w_imm16_ds_ip() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -31889,7 +31889,7 @@ void m68000_device::cmpi_w_imm16_ais_ip() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31918,7 +31918,7 @@ void m68000_device::cmpi_w_imm16_ais_ip() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31994,7 +31994,7 @@ void m68000_device::cmpi_w_imm16_aips_ip() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32021,7 +32021,7 @@ void m68000_device::cmpi_w_imm16_aips_ip() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32099,7 +32099,7 @@ void m68000_device::cmpi_w_imm16_pais_ip() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32126,7 +32126,7 @@ void m68000_device::cmpi_w_imm16_pais_ip() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32221,7 +32221,7 @@ void m68000_device::cmpi_w_imm16_das_ip() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32250,7 +32250,7 @@ void m68000_device::cmpi_w_imm16_das_ip() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32318,7 +32318,7 @@ void m68000_device::cmpi_w_imm16_dais_ip() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32386,7 +32386,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32415,7 +32415,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32511,7 +32511,7 @@ void m68000_device::cmpi_w_imm16_adr16_ip() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32538,7 +32538,7 @@ void m68000_device::cmpi_w_imm16_adr16_ip() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32658,7 +32658,7 @@ void m68000_device::cmpi_w_imm16_adr32_ip() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -32685,7 +32685,7 @@ void m68000_device::cmpi_w_imm16_adr32_ip() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32781,11 +32781,11 @@ void m68000_device::cmpi_l_imm32_ds_ip() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32881,7 +32881,7 @@ void m68000_device::cmpi_l_imm32_ais_ip() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32934,13 +32934,13 @@ void m68000_device::cmpi_l_imm32_ais_ip() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33031,7 +33031,7 @@ void m68000_device::cmpi_l_imm32_aips_ip() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -33087,13 +33087,13 @@ void m68000_device::cmpi_l_imm32_aips_ip() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33183,7 +33183,7 @@ void m68000_device::cmpi_l_imm32_pais_ip() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -33241,13 +33241,13 @@ void m68000_device::cmpi_l_imm32_pais_ip() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33362,7 +33362,7 @@ void m68000_device::cmpi_l_imm32_das_ip() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33415,13 +33415,13 @@ void m68000_device::cmpi_l_imm32_das_ip() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33510,7 +33510,7 @@ void m68000_device::cmpi_l_imm32_dais_ip() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -33577,7 +33577,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33630,13 +33630,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33753,7 +33753,7 @@ void m68000_device::cmpi_l_imm32_adr16_ip() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33806,13 +33806,13 @@ void m68000_device::cmpi_l_imm32_adr16_ip() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33953,7 +33953,7 @@ void m68000_device::cmpi_l_imm32_adr32_ip() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34006,13 +34006,13 @@ void m68000_device::cmpi_l_imm32_adr32_ip() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34057,7 +34057,7 @@ void m68000_device::move_b_ds_dd_ip() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -34104,7 +34104,7 @@ void m68000_device::move_b_ais_dd_ip() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34130,7 +34130,7 @@ void m68000_device::move_b_ais_dd_ip() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34181,7 +34181,7 @@ void m68000_device::move_b_aips_dd_ip() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34205,7 +34205,7 @@ void m68000_device::move_b_aips_dd_ip() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34258,7 +34258,7 @@ void m68000_device::move_b_pais_dd_ip() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34282,7 +34282,7 @@ void m68000_device::move_b_pais_dd_ip() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34352,7 +34352,7 @@ void m68000_device::move_b_das_dd_ip() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34378,7 +34378,7 @@ void m68000_device::move_b_das_dd_ip() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34421,7 +34421,7 @@ void m68000_device::move_b_dais_dd_ip() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34489,7 +34489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34515,7 +34515,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34586,7 +34586,7 @@ void m68000_device::move_b_adr16_dd_ip() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -34610,7 +34610,7 @@ void m68000_device::move_b_adr16_dd_ip() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34705,7 +34705,7 @@ void m68000_device::move_b_adr32_dd_ip() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34729,7 +34729,7 @@ void m68000_device::move_b_adr32_dd_ip() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34798,7 +34798,7 @@ void m68000_device::move_b_dpc_dd_ip() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34824,7 +34824,7 @@ void m68000_device::move_b_dpc_dd_ip() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34866,7 +34866,7 @@ void m68000_device::move_b_dpci_dd_ip() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34934,7 +34934,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34960,7 +34960,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -35034,7 +35034,7 @@ void m68000_device::move_b_imm8_dd_ip() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -35084,7 +35084,7 @@ void m68000_device::move_b_ds_aid_ip() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35146,7 +35146,7 @@ void m68000_device::move_b_ais_aid_ip() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35171,7 +35171,7 @@ void m68000_device::move_b_ais_aid_ip() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35239,7 +35239,7 @@ void m68000_device::move_b_aips_aid_ip() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35262,7 +35262,7 @@ void m68000_device::move_b_aips_aid_ip() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35332,7 +35332,7 @@ void m68000_device::move_b_pais_aid_ip() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35355,7 +35355,7 @@ void m68000_device::move_b_pais_aid_ip() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35442,7 +35442,7 @@ void m68000_device::move_b_das_aid_ip() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35467,7 +35467,7 @@ void m68000_device::move_b_das_aid_ip() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35527,7 +35527,7 @@ void m68000_device::move_b_dais_aid_ip() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35595,7 +35595,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35620,7 +35620,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35708,7 +35708,7 @@ void m68000_device::move_b_adr16_aid_ip() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -35731,7 +35731,7 @@ void m68000_device::move_b_adr16_aid_ip() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35843,7 +35843,7 @@ void m68000_device::move_b_adr32_aid_ip() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35866,7 +35866,7 @@ void m68000_device::move_b_adr32_aid_ip() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35952,7 +35952,7 @@ void m68000_device::move_b_dpc_aid_ip() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35977,7 +35977,7 @@ void m68000_device::move_b_dpc_aid_ip() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36036,7 +36036,7 @@ void m68000_device::move_b_dpci_aid_ip() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36104,7 +36104,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36129,7 +36129,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36220,7 +36220,7 @@ void m68000_device::move_b_imm8_aid_ip() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36285,7 +36285,7 @@ void m68000_device::move_b_ds_aipd_ip() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36346,7 +36346,7 @@ void m68000_device::move_b_ais_aipd_ip() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36372,7 +36372,7 @@ void m68000_device::move_b_ais_aipd_ip() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36439,7 +36439,7 @@ void m68000_device::move_b_aips_aipd_ip() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36463,7 +36463,7 @@ void m68000_device::move_b_aips_aipd_ip() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36532,7 +36532,7 @@ void m68000_device::move_b_pais_aipd_ip() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36556,7 +36556,7 @@ void m68000_device::move_b_pais_aipd_ip() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36642,7 +36642,7 @@ void m68000_device::move_b_das_aipd_ip() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36668,7 +36668,7 @@ void m68000_device::move_b_das_aipd_ip() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36727,7 +36727,7 @@ void m68000_device::move_b_dais_aipd_ip() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36795,7 +36795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36821,7 +36821,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36908,7 +36908,7 @@ void m68000_device::move_b_adr16_aipd_ip() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -36932,7 +36932,7 @@ void m68000_device::move_b_adr16_aipd_ip() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37043,7 +37043,7 @@ void m68000_device::move_b_adr32_aipd_ip() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37067,7 +37067,7 @@ void m68000_device::move_b_adr32_aipd_ip() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37152,7 +37152,7 @@ void m68000_device::move_b_dpc_aipd_ip() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37178,7 +37178,7 @@ void m68000_device::move_b_dpc_aipd_ip() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37236,7 +37236,7 @@ void m68000_device::move_b_dpci_aipd_ip() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37304,7 +37304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37330,7 +37330,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37420,7 +37420,7 @@ void m68000_device::move_b_imm8_aipd_ip() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37483,7 +37483,7 @@ void m68000_device::move_b_ds_paid_ip() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37545,7 +37545,7 @@ void m68000_device::move_b_ais_paid_ip() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37570,7 +37570,7 @@ void m68000_device::move_b_ais_paid_ip() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37638,7 +37638,7 @@ void m68000_device::move_b_aips_paid_ip() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37661,7 +37661,7 @@ void m68000_device::move_b_aips_paid_ip() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37731,7 +37731,7 @@ void m68000_device::move_b_pais_paid_ip() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37754,7 +37754,7 @@ void m68000_device::move_b_pais_paid_ip() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37841,7 +37841,7 @@ void m68000_device::move_b_das_paid_ip() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37866,7 +37866,7 @@ void m68000_device::move_b_das_paid_ip() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37926,7 +37926,7 @@ void m68000_device::move_b_dais_paid_ip() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37994,7 +37994,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38019,7 +38019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38107,7 +38107,7 @@ void m68000_device::move_b_adr16_paid_ip() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -38130,7 +38130,7 @@ void m68000_device::move_b_adr16_paid_ip() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38242,7 +38242,7 @@ void m68000_device::move_b_adr32_paid_ip() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -38265,7 +38265,7 @@ void m68000_device::move_b_adr32_paid_ip() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68000_device::move_b_dpc_paid_ip() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38376,7 +38376,7 @@ void m68000_device::move_b_dpc_paid_ip() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38435,7 +38435,7 @@ void m68000_device::move_b_dpci_paid_ip() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38503,7 +38503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38528,7 +38528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38618,7 +38618,7 @@ void m68000_device::move_b_imm8_paid_ip() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38706,7 +38706,7 @@ void m68000_device::move_b_ds_dad_ip() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -38769,7 +38769,7 @@ void m68000_device::move_b_ais_dad_ip() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38793,7 +38793,7 @@ void m68000_device::move_b_ais_dad_ip() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68000_device::move_b_aips_dad_ip() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -38913,7 +38913,7 @@ void m68000_device::move_b_aips_dad_ip() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39013,7 +39013,7 @@ void m68000_device::move_b_pais_dad_ip() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -39035,7 +39035,7 @@ void m68000_device::move_b_pais_dad_ip() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39152,7 +39152,7 @@ void m68000_device::move_b_das_dad_ip() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39176,7 +39176,7 @@ void m68000_device::move_b_das_dad_ip() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39266,7 +39266,7 @@ void m68000_device::move_b_dais_dad_ip() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39334,7 +39334,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39358,7 +39358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39476,7 +39476,7 @@ void m68000_device::move_b_adr16_dad_ip() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -39498,7 +39498,7 @@ void m68000_device::move_b_adr16_dad_ip() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39640,7 +39640,7 @@ void m68000_device::move_b_adr32_dad_ip() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -39662,7 +39662,7 @@ void m68000_device::move_b_adr32_dad_ip() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39778,7 +39778,7 @@ void m68000_device::move_b_dpc_dad_ip() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39802,7 +39802,7 @@ void m68000_device::move_b_dpc_dad_ip() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39891,7 +39891,7 @@ void m68000_device::move_b_dpci_dad_ip() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39959,7 +39959,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39983,7 +39983,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40127,7 +40127,7 @@ void m68000_device::move_b_imm8_dad_ip() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40188,7 +40188,7 @@ void m68000_device::move_b_ds_daid_ip() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -40258,7 +40258,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40321,7 +40321,7 @@ void m68000_device::move_b_ais_daid_ip() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40342,7 +40342,7 @@ void m68000_device::move_b_ais_daid_ip() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40357,7 +40357,7 @@ void m68000_device::move_b_ais_daid_ip() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40384,7 +40384,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40484,7 +40484,7 @@ void m68000_device::move_b_aips_daid_ip() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40503,7 +40503,7 @@ void m68000_device::move_b_aips_daid_ip() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40518,7 +40518,7 @@ void m68000_device::move_b_aips_daid_ip() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40545,7 +40545,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40647,7 +40647,7 @@ void m68000_device::move_b_pais_daid_ip() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40666,7 +40666,7 @@ void m68000_device::move_b_pais_daid_ip() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40681,7 +40681,7 @@ void m68000_device::move_b_pais_daid_ip() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40708,7 +40708,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40827,7 +40827,7 @@ void m68000_device::move_b_das_daid_ip() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40848,7 +40848,7 @@ void m68000_device::move_b_das_daid_ip() // 11a8 f1f8
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40863,7 +40863,7 @@ void m68000_device::move_b_das_daid_ip() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40890,7 +40890,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40982,7 +40982,7 @@ void m68000_device::move_b_dais_daid_ip() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41050,7 +41050,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41071,7 +41071,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41086,7 +41086,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41113,7 +41113,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41233,7 +41233,7 @@ void m68000_device::move_b_adr16_daid_ip() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -41252,7 +41252,7 @@ void m68000_device::move_b_adr16_daid_ip() // 11b8 f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41267,7 +41267,7 @@ void m68000_device::move_b_adr16_daid_ip() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41294,7 +41294,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41438,7 +41438,7 @@ void m68000_device::move_b_adr32_daid_ip() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41457,7 +41457,7 @@ void m68000_device::move_b_adr32_daid_ip() // 11b9 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41472,7 +41472,7 @@ void m68000_device::move_b_adr32_daid_ip() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41499,7 +41499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41617,7 +41617,7 @@ void m68000_device::move_b_dpc_daid_ip() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41638,7 +41638,7 @@ void m68000_device::move_b_dpc_daid_ip() // 11ba f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41653,7 +41653,7 @@ void m68000_device::move_b_dpc_daid_ip() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41680,7 +41680,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41771,7 +41771,7 @@ void m68000_device::move_b_dpci_daid_ip() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41839,7 +41839,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41860,7 +41860,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41875,7 +41875,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41902,7 +41902,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42020,7 +42020,7 @@ void m68000_device::move_b_imm8_daid_ip() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -42090,7 +42090,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42154,7 +42154,7 @@ void m68000_device::move_b_ds_adr16_ip() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42245,7 +42245,7 @@ void m68000_device::move_b_ais_adr16_ip() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42269,7 +42269,7 @@ void m68000_device::move_b_ais_adr16_ip() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42366,7 +42366,7 @@ void m68000_device::move_b_aips_adr16_ip() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42388,7 +42388,7 @@ void m68000_device::move_b_aips_adr16_ip() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42487,7 +42487,7 @@ void m68000_device::move_b_pais_adr16_ip() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42509,7 +42509,7 @@ void m68000_device::move_b_pais_adr16_ip() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42625,7 +42625,7 @@ void m68000_device::move_b_das_adr16_ip() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42649,7 +42649,7 @@ void m68000_device::move_b_das_adr16_ip() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42738,7 +42738,7 @@ void m68000_device::move_b_dais_adr16_ip() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42806,7 +42806,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42830,7 +42830,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42947,7 +42947,7 @@ void m68000_device::move_b_adr16_adr16_ip() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -42969,7 +42969,7 @@ void m68000_device::move_b_adr16_adr16_ip() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43110,7 +43110,7 @@ void m68000_device::move_b_adr32_adr16_ip() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -43132,7 +43132,7 @@ void m68000_device::move_b_adr32_adr16_ip() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43247,7 +43247,7 @@ void m68000_device::move_b_dpc_adr16_ip() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43271,7 +43271,7 @@ void m68000_device::move_b_dpc_adr16_ip() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43359,7 +43359,7 @@ void m68000_device::move_b_dpci_adr16_ip() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43427,7 +43427,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43451,7 +43451,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43570,7 +43570,7 @@ void m68000_device::move_b_imm8_adr16_ip() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43687,7 +43687,7 @@ void m68000_device::move_b_ds_adr32_ip() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43778,7 +43778,7 @@ void m68000_device::move_b_ais_adr32_ip() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43802,7 +43802,7 @@ void m68000_device::move_b_ais_adr32_ip() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43922,7 +43922,7 @@ void m68000_device::move_b_aips_adr32_ip() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -43944,7 +43944,7 @@ void m68000_device::move_b_aips_adr32_ip() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44066,7 +44066,7 @@ void m68000_device::move_b_pais_adr32_ip() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -44088,7 +44088,7 @@ void m68000_device::move_b_pais_adr32_ip() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44227,7 +44227,7 @@ void m68000_device::move_b_das_adr32_ip() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44251,7 +44251,7 @@ void m68000_device::move_b_das_adr32_ip() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44363,7 +44363,7 @@ void m68000_device::move_b_dais_adr32_ip() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44431,7 +44431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44455,7 +44455,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44595,7 +44595,7 @@ void m68000_device::move_b_adr16_adr32_ip() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -44617,7 +44617,7 @@ void m68000_device::move_b_adr16_adr32_ip() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44781,7 +44781,7 @@ void m68000_device::move_b_adr32_adr32_ip() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -44803,7 +44803,7 @@ void m68000_device::move_b_adr32_adr32_ip() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44941,7 +44941,7 @@ void m68000_device::move_b_dpc_adr32_ip() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44965,7 +44965,7 @@ void m68000_device::move_b_dpc_adr32_ip() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45076,7 +45076,7 @@ void m68000_device::move_b_dpci_adr32_ip() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45144,7 +45144,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45168,7 +45168,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45334,7 +45334,7 @@ void m68000_device::move_b_imm8_adr32_ip() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45429,13 +45429,13 @@ void m68000_device::move_l_ds_dd_ip() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -45481,14 +45481,14 @@ void m68000_device::move_l_as_dd_ip() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45530,7 +45530,7 @@ void m68000_device::move_l_ais_dd_ip() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45584,14 +45584,14 @@ void m68000_device::move_l_ais_dd_ip() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45633,7 +45633,7 @@ void m68000_device::move_l_aips_dd_ip() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45690,14 +45690,14 @@ void m68000_device::move_l_aips_dd_ip() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45738,7 +45738,7 @@ void m68000_device::move_l_pais_dd_ip() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -45797,14 +45797,14 @@ void m68000_device::move_l_pais_dd_ip() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45870,7 +45870,7 @@ void m68000_device::move_l_das_dd_ip() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -45924,14 +45924,14 @@ void m68000_device::move_l_das_dd_ip() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45971,7 +45971,7 @@ void m68000_device::move_l_dais_dd_ip() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46038,7 +46038,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46092,14 +46092,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46167,7 +46167,7 @@ void m68000_device::move_l_adr16_dd_ip() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46221,14 +46221,14 @@ void m68000_device::move_l_adr16_dd_ip() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46320,7 +46320,7 @@ void m68000_device::move_l_adr32_dd_ip() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46374,14 +46374,14 @@ void m68000_device::move_l_adr32_dd_ip() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46446,7 +46446,7 @@ void m68000_device::move_l_dpc_dd_ip() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46500,14 +46500,14 @@ void m68000_device::move_l_dpc_dd_ip() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46546,7 +46546,7 @@ void m68000_device::move_l_dpci_dd_ip() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46613,7 +46613,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46667,14 +46667,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46769,14 +46769,14 @@ void m68000_device::move_l_imm32_dd_ip() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46821,13 +46821,13 @@ void m68000_device::movea_l_ds_ad_ip() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -46871,12 +46871,12 @@ void m68000_device::movea_l_as_ad_ip() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46918,7 +46918,7 @@ void m68000_device::movea_l_ais_ad_ip() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46972,13 +46972,13 @@ void m68000_device::movea_l_ais_ad_ip() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47019,7 +47019,7 @@ void m68000_device::movea_l_aips_ad_ip() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47076,13 +47076,13 @@ void m68000_device::movea_l_aips_ad_ip() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47122,7 +47122,7 @@ void m68000_device::movea_l_pais_ad_ip() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -47181,13 +47181,13 @@ void m68000_device::movea_l_pais_ad_ip() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47252,7 +47252,7 @@ void m68000_device::movea_l_das_ad_ip() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47306,13 +47306,13 @@ void m68000_device::movea_l_das_ad_ip() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47351,7 +47351,7 @@ void m68000_device::movea_l_dais_ad_ip() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47418,7 +47418,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47472,13 +47472,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47545,7 +47545,7 @@ void m68000_device::movea_l_adr16_ad_ip() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47599,13 +47599,13 @@ void m68000_device::movea_l_adr16_ad_ip() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47696,7 +47696,7 @@ void m68000_device::movea_l_adr32_ad_ip() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -47750,13 +47750,13 @@ void m68000_device::movea_l_adr32_ad_ip() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -47820,7 +47820,7 @@ void m68000_device::movea_l_dpc_ad_ip() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -47874,13 +47874,13 @@ void m68000_device::movea_l_dpc_ad_ip() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47918,7 +47918,7 @@ void m68000_device::movea_l_dpci_ad_ip() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47985,7 +47985,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -48039,13 +48039,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -48139,13 +48139,13 @@ void m68000_device::movea_l_imm32_ad_ip() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -48213,7 +48213,7 @@ void m68000_device::move_l_ds_aid_ip() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48241,7 +48241,7 @@ void m68000_device::move_l_ds_aid_ip() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48310,7 +48310,7 @@ void m68000_device::move_l_as_aid_ip() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48338,7 +48338,7 @@ void m68000_device::move_l_as_aid_ip() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48380,7 +48380,7 @@ void m68000_device::move_l_ais_aid_ip() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48433,7 +48433,7 @@ void m68000_device::move_l_ais_aid_ip() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48460,7 +48460,7 @@ void m68000_device::move_l_ais_aid_ip() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48528,7 +48528,7 @@ void m68000_device::move_l_aips_aid_ip() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48584,7 +48584,7 @@ void m68000_device::move_l_aips_aid_ip() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48611,7 +48611,7 @@ void m68000_device::move_l_aips_aid_ip() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48678,7 +48678,7 @@ void m68000_device::move_l_pais_aid_ip() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48736,7 +48736,7 @@ void m68000_device::move_l_pais_aid_ip() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48763,7 +48763,7 @@ void m68000_device::move_l_pais_aid_ip() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48855,7 +48855,7 @@ void m68000_device::move_l_das_aid_ip() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -48908,7 +48908,7 @@ void m68000_device::move_l_das_aid_ip() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48935,7 +48935,7 @@ void m68000_device::move_l_das_aid_ip() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49001,7 +49001,7 @@ void m68000_device::move_l_dais_aid_ip() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49068,7 +49068,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49121,7 +49121,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49148,7 +49148,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49242,7 +49242,7 @@ void m68000_device::move_l_adr16_aid_ip() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49295,7 +49295,7 @@ void m68000_device::move_l_adr16_aid_ip() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49322,7 +49322,7 @@ void m68000_device::move_l_adr16_aid_ip() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49440,7 +49440,7 @@ void m68000_device::move_l_adr32_aid_ip() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49493,7 +49493,7 @@ void m68000_device::move_l_adr32_aid_ip() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49520,7 +49520,7 @@ void m68000_device::move_l_adr32_aid_ip() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49611,7 +49611,7 @@ void m68000_device::move_l_dpc_aid_ip() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49664,7 +49664,7 @@ void m68000_device::move_l_dpc_aid_ip() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49691,7 +49691,7 @@ void m68000_device::move_l_dpc_aid_ip() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49756,7 +49756,7 @@ void m68000_device::move_l_dpci_aid_ip() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49823,7 +49823,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49876,7 +49876,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49903,7 +49903,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50048,7 +50048,7 @@ void m68000_device::move_l_imm32_aid_ip() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50076,7 +50076,7 @@ void m68000_device::move_l_imm32_aid_ip() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68000_device::move_l_ds_aipd_ip() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50173,7 +50173,7 @@ void m68000_device::move_l_ds_aipd_ip() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50242,7 +50242,7 @@ void m68000_device::move_l_as_aipd_ip() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50270,7 +50270,7 @@ void m68000_device::move_l_as_aipd_ip() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50312,7 +50312,7 @@ void m68000_device::move_l_ais_aipd_ip() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50365,7 +50365,7 @@ void m68000_device::move_l_ais_aipd_ip() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50392,7 +50392,7 @@ void m68000_device::move_l_ais_aipd_ip() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50459,7 +50459,7 @@ void m68000_device::move_l_aips_aipd_ip() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50515,7 +50515,7 @@ void m68000_device::move_l_aips_aipd_ip() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50542,7 +50542,7 @@ void m68000_device::move_l_aips_aipd_ip() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50608,7 +50608,7 @@ void m68000_device::move_l_pais_aipd_ip() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50666,7 +50666,7 @@ void m68000_device::move_l_pais_aipd_ip() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50693,7 +50693,7 @@ void m68000_device::move_l_pais_aipd_ip() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50784,7 +50784,7 @@ void m68000_device::move_l_das_aipd_ip() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -50837,7 +50837,7 @@ void m68000_device::move_l_das_aipd_ip() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50864,7 +50864,7 @@ void m68000_device::move_l_das_aipd_ip() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50929,7 +50929,7 @@ void m68000_device::move_l_dais_aipd_ip() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50996,7 +50996,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51049,7 +51049,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51076,7 +51076,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51169,7 +51169,7 @@ void m68000_device::move_l_adr16_aipd_ip() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51222,7 +51222,7 @@ void m68000_device::move_l_adr16_aipd_ip() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51249,7 +51249,7 @@ void m68000_device::move_l_adr16_aipd_ip() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51366,7 +51366,7 @@ void m68000_device::move_l_adr32_aipd_ip() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51419,7 +51419,7 @@ void m68000_device::move_l_adr32_aipd_ip() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51446,7 +51446,7 @@ void m68000_device::move_l_adr32_aipd_ip() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51536,7 +51536,7 @@ void m68000_device::move_l_dpc_aipd_ip() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51589,7 +51589,7 @@ void m68000_device::move_l_dpc_aipd_ip() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51616,7 +51616,7 @@ void m68000_device::move_l_dpc_aipd_ip() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51680,7 +51680,7 @@ void m68000_device::move_l_dpci_aipd_ip() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51747,7 +51747,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51800,7 +51800,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51827,7 +51827,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51971,7 +51971,7 @@ void m68000_device::move_l_imm32_aipd_ip() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51999,7 +51999,7 @@ void m68000_device::move_l_imm32_aipd_ip() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52043,7 +52043,7 @@ void m68000_device::move_l_ds_paid_ip() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52071,7 +52071,7 @@ void m68000_device::move_l_ds_paid_ip() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52139,7 +52139,7 @@ void m68000_device::move_l_as_paid_ip() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52167,7 +52167,7 @@ void m68000_device::move_l_as_paid_ip() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52233,7 +52233,7 @@ void m68000_device::move_l_ais_paid_ip() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52286,7 +52286,7 @@ void m68000_device::move_l_ais_paid_ip() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_device::move_l_ais_paid_ip() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52380,7 +52380,7 @@ void m68000_device::move_l_aips_paid_ip() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52436,7 +52436,7 @@ void m68000_device::move_l_aips_paid_ip() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52464,7 +52464,7 @@ void m68000_device::move_l_aips_paid_ip() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52529,7 +52529,7 @@ void m68000_device::move_l_pais_paid_ip() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52587,7 +52587,7 @@ void m68000_device::move_l_pais_paid_ip() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52615,7 +52615,7 @@ void m68000_device::move_l_pais_paid_ip() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52705,7 +52705,7 @@ void m68000_device::move_l_das_paid_ip() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52758,7 +52758,7 @@ void m68000_device::move_l_das_paid_ip() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52786,7 +52786,7 @@ void m68000_device::move_l_das_paid_ip() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52850,7 +52850,7 @@ void m68000_device::move_l_dais_paid_ip() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52917,7 +52917,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52970,7 +52970,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52998,7 +52998,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53090,7 +53090,7 @@ void m68000_device::move_l_adr16_paid_ip() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -53143,7 +53143,7 @@ void m68000_device::move_l_adr16_paid_ip() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53171,7 +53171,7 @@ void m68000_device::move_l_adr16_paid_ip() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53287,7 +53287,7 @@ void m68000_device::move_l_adr32_paid_ip() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53340,7 +53340,7 @@ void m68000_device::move_l_adr32_paid_ip() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53368,7 +53368,7 @@ void m68000_device::move_l_adr32_paid_ip() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53457,7 +53457,7 @@ void m68000_device::move_l_dpc_paid_ip() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53510,7 +53510,7 @@ void m68000_device::move_l_dpc_paid_ip() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53538,7 +53538,7 @@ void m68000_device::move_l_dpc_paid_ip() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53601,7 +53601,7 @@ void m68000_device::move_l_dpci_paid_ip() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53668,7 +53668,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53721,7 +53721,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53749,7 +53749,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53867,7 +53867,7 @@ void m68000_device::move_l_imm32_paid_ip() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53895,7 +53895,7 @@ void m68000_device::move_l_imm32_paid_ip() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53987,7 +53987,7 @@ void m68000_device::move_l_ds_dad_ip() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54014,7 +54014,7 @@ void m68000_device::move_l_ds_dad_ip() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54042,7 +54042,7 @@ void m68000_device::move_l_ds_dad_ip() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54110,7 +54110,7 @@ void m68000_device::move_l_as_dad_ip() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54137,7 +54137,7 @@ void m68000_device::move_l_as_dad_ip() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54165,7 +54165,7 @@ void m68000_device::move_l_as_dad_ip() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54207,7 +54207,7 @@ void m68000_device::move_l_ais_dad_ip() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54259,7 +54259,7 @@ void m68000_device::move_l_ais_dad_ip() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54287,7 +54287,7 @@ void m68000_device::move_l_ais_dad_ip() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54384,7 +54384,7 @@ void m68000_device::move_l_aips_dad_ip() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54439,7 +54439,7 @@ void m68000_device::move_l_aips_dad_ip() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54467,7 +54467,7 @@ void m68000_device::move_l_aips_dad_ip() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54563,7 +54563,7 @@ void m68000_device::move_l_pais_dad_ip() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54620,7 +54620,7 @@ void m68000_device::move_l_pais_dad_ip() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54648,7 +54648,7 @@ void m68000_device::move_l_pais_dad_ip() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54769,7 +54769,7 @@ void m68000_device::move_l_das_dad_ip() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -54821,7 +54821,7 @@ void m68000_device::move_l_das_dad_ip() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54849,7 +54849,7 @@ void m68000_device::move_l_das_dad_ip() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54944,7 +54944,7 @@ void m68000_device::move_l_dais_dad_ip() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55011,7 +55011,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55063,7 +55063,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55091,7 +55091,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55214,7 +55214,7 @@ void m68000_device::move_l_adr16_dad_ip() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55266,7 +55266,7 @@ void m68000_device::move_l_adr16_dad_ip() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55294,7 +55294,7 @@ void m68000_device::move_l_adr16_dad_ip() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55441,7 +55441,7 @@ void m68000_device::move_l_adr32_dad_ip() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55493,7 +55493,7 @@ void m68000_device::move_l_adr32_dad_ip() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55521,7 +55521,7 @@ void m68000_device::move_l_adr32_dad_ip() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55641,7 +55641,7 @@ void m68000_device::move_l_dpc_dad_ip() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55693,7 +55693,7 @@ void m68000_device::move_l_dpc_dad_ip() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55721,7 +55721,7 @@ void m68000_device::move_l_dpc_dad_ip() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55815,7 +55815,7 @@ void m68000_device::move_l_dpci_dad_ip() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55882,7 +55882,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55934,7 +55934,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55962,7 +55962,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56135,7 +56135,7 @@ void m68000_device::move_l_imm32_dad_ip() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56162,7 +56162,7 @@ void m68000_device::move_l_imm32_dad_ip() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56190,7 +56190,7 @@ void m68000_device::move_l_imm32_dad_ip() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56230,7 +56230,7 @@ void m68000_device::move_l_ds_daid_ip() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56300,7 +56300,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56327,7 +56327,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56355,7 +56355,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56395,7 +56395,7 @@ void m68000_device::move_l_as_daid_ip() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56465,7 +56465,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56492,7 +56492,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56520,7 +56520,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56562,7 +56562,7 @@ void m68000_device::move_l_ais_daid_ip() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56611,7 +56611,7 @@ void m68000_device::move_l_ais_daid_ip() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56626,7 +56626,7 @@ void m68000_device::move_l_ais_daid_ip() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56653,7 +56653,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56683,7 +56683,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56780,7 +56780,7 @@ void m68000_device::move_l_aips_daid_ip() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56832,7 +56832,7 @@ void m68000_device::move_l_aips_daid_ip() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56847,7 +56847,7 @@ void m68000_device::move_l_aips_daid_ip() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56874,7 +56874,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56904,7 +56904,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57000,7 +57000,7 @@ void m68000_device::move_l_pais_daid_ip() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57054,7 +57054,7 @@ void m68000_device::move_l_pais_daid_ip() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57069,7 +57069,7 @@ void m68000_device::move_l_pais_daid_ip() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57096,7 +57096,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57126,7 +57126,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57247,7 +57247,7 @@ void m68000_device::move_l_das_daid_ip() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57296,7 +57296,7 @@ void m68000_device::move_l_das_daid_ip() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57311,7 +57311,7 @@ void m68000_device::move_l_das_daid_ip() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57338,7 +57338,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57368,7 +57368,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57463,7 +57463,7 @@ void m68000_device::move_l_dais_daid_ip() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57530,7 +57530,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57579,7 +57579,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57594,7 +57594,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57621,7 +57621,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57651,7 +57651,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57774,7 +57774,7 @@ void m68000_device::move_l_adr16_daid_ip() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57823,7 +57823,7 @@ void m68000_device::move_l_adr16_daid_ip() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57838,7 +57838,7 @@ void m68000_device::move_l_adr16_daid_ip() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57865,7 +57865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57895,7 +57895,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58042,7 +58042,7 @@ void m68000_device::move_l_adr32_daid_ip() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -58091,7 +58091,7 @@ void m68000_device::move_l_adr32_daid_ip() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58106,7 +58106,7 @@ void m68000_device::move_l_adr32_daid_ip() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58133,7 +58133,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58163,7 +58163,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58283,7 +58283,7 @@ void m68000_device::move_l_dpc_daid_ip() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58332,7 +58332,7 @@ void m68000_device::move_l_dpc_daid_ip() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58347,7 +58347,7 @@ void m68000_device::move_l_dpc_daid_ip() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58374,7 +58374,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58404,7 +58404,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58498,7 +58498,7 @@ void m68000_device::move_l_dpci_daid_ip() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58565,7 +58565,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58614,7 +58614,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58629,7 +58629,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58656,7 +58656,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58686,7 +58686,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58831,7 +58831,7 @@ void m68000_device::move_l_imm32_daid_ip() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -58901,7 +58901,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58928,7 +58928,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58956,7 +58956,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58999,7 +58999,7 @@ void m68000_device::move_l_ds_adr16_ip() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59027,7 +59027,7 @@ void m68000_device::move_l_ds_adr16_ip() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59125,7 +59125,7 @@ void m68000_device::move_l_as_adr16_ip() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59153,7 +59153,7 @@ void m68000_device::move_l_as_adr16_ip() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59249,7 +59249,7 @@ void m68000_device::move_l_ais_adr16_ip() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59301,7 +59301,7 @@ void m68000_device::move_l_ais_adr16_ip() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59329,7 +59329,7 @@ void m68000_device::move_l_ais_adr16_ip() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59425,7 +59425,7 @@ void m68000_device::move_l_aips_adr16_ip() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59480,7 +59480,7 @@ void m68000_device::move_l_aips_adr16_ip() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59508,7 +59508,7 @@ void m68000_device::move_l_aips_adr16_ip() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59603,7 +59603,7 @@ void m68000_device::move_l_pais_adr16_ip() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59660,7 +59660,7 @@ void m68000_device::move_l_pais_adr16_ip() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59688,7 +59688,7 @@ void m68000_device::move_l_pais_adr16_ip() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59808,7 +59808,7 @@ void m68000_device::move_l_das_adr16_ip() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -59860,7 +59860,7 @@ void m68000_device::move_l_das_adr16_ip() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59888,7 +59888,7 @@ void m68000_device::move_l_das_adr16_ip() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59982,7 +59982,7 @@ void m68000_device::move_l_dais_adr16_ip() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60049,7 +60049,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60101,7 +60101,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60129,7 +60129,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60251,7 +60251,7 @@ void m68000_device::move_l_adr16_adr16_ip() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60303,7 +60303,7 @@ void m68000_device::move_l_adr16_adr16_ip() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60331,7 +60331,7 @@ void m68000_device::move_l_adr16_adr16_ip() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60477,7 +60477,7 @@ void m68000_device::move_l_adr32_adr16_ip() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60529,7 +60529,7 @@ void m68000_device::move_l_adr32_adr16_ip() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60557,7 +60557,7 @@ void m68000_device::move_l_adr32_adr16_ip() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60676,7 +60676,7 @@ void m68000_device::move_l_dpc_adr16_ip() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60728,7 +60728,7 @@ void m68000_device::move_l_dpc_adr16_ip() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60756,7 +60756,7 @@ void m68000_device::move_l_dpc_adr16_ip() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60849,7 +60849,7 @@ void m68000_device::move_l_dpci_adr16_ip() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60916,7 +60916,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60968,7 +60968,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60996,7 +60996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61144,7 +61144,7 @@ void m68000_device::move_l_imm32_adr16_ip() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61172,7 +61172,7 @@ void m68000_device::move_l_imm32_adr16_ip() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61294,7 +61294,7 @@ void m68000_device::move_l_ds_adr32_ip() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61322,7 +61322,7 @@ void m68000_device::move_l_ds_adr32_ip() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61444,7 +61444,7 @@ void m68000_device::move_l_as_adr32_ip() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61472,7 +61472,7 @@ void m68000_device::move_l_as_adr32_ip() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61568,7 +61568,7 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61621,7 +61621,7 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61647,7 +61647,7 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61674,7 +61674,7 @@ void m68000_device::move_l_ais_adr32_ip() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61769,7 +61769,7 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61825,7 +61825,7 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61851,7 +61851,7 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61878,7 +61878,7 @@ void m68000_device::move_l_aips_adr32_ip() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61972,7 +61972,7 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62030,7 +62030,7 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62056,7 +62056,7 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62083,7 +62083,7 @@ void m68000_device::move_l_pais_adr32_ip() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62202,7 +62202,7 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62255,7 +62255,7 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62281,7 +62281,7 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62308,7 +62308,7 @@ void m68000_device::move_l_das_adr32_ip() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62401,7 +62401,7 @@ void m68000_device::move_l_dais_adr32_ip() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62468,7 +62468,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62521,7 +62521,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62547,7 +62547,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62574,7 +62574,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62695,7 +62695,7 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62748,7 +62748,7 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62774,7 +62774,7 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62801,7 +62801,7 @@ void m68000_device::move_l_adr16_adr32_ip() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62946,7 +62946,7 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -62999,7 +62999,7 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -63025,7 +63025,7 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63052,7 +63052,7 @@ void m68000_device::move_l_adr32_adr32_ip() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63170,7 +63170,7 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63223,7 +63223,7 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63249,7 +63249,7 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63276,7 +63276,7 @@ void m68000_device::move_l_dpc_adr32_ip() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63368,7 +63368,7 @@ void m68000_device::move_l_dpci_adr32_ip() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63435,7 +63435,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63488,7 +63488,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63514,7 +63514,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63541,7 +63541,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63712,7 +63712,7 @@ void m68000_device::move_l_imm32_adr32_ip() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63740,7 +63740,7 @@ void m68000_device::move_l_imm32_adr32_ip() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63840,7 +63840,7 @@ void m68000_device::move_w_ds_dd_ip() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63890,7 +63890,7 @@ void m68000_device::move_w_as_dd_ip() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63937,7 +63937,7 @@ void m68000_device::move_w_ais_dd_ip() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -63967,7 +63967,7 @@ void m68000_device::move_w_ais_dd_ip() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64018,7 +64018,7 @@ void m68000_device::move_w_aips_dd_ip() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64046,7 +64046,7 @@ void m68000_device::move_w_aips_dd_ip() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64099,7 +64099,7 @@ void m68000_device::move_w_pais_dd_ip() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64127,7 +64127,7 @@ void m68000_device::move_w_pais_dd_ip() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64197,7 +64197,7 @@ void m68000_device::move_w_das_dd_ip() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64227,7 +64227,7 @@ void m68000_device::move_w_das_dd_ip() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64270,7 +64270,7 @@ void m68000_device::move_w_dais_dd_ip() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64338,7 +64338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64368,7 +64368,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64439,7 +64439,7 @@ void m68000_device::move_w_adr16_dd_ip() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -64467,7 +64467,7 @@ void m68000_device::move_w_adr16_dd_ip() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64562,7 +64562,7 @@ void m68000_device::move_w_adr32_dd_ip() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64590,7 +64590,7 @@ void m68000_device::move_w_adr32_dd_ip() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64659,7 +64659,7 @@ void m68000_device::move_w_dpc_dd_ip() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64689,7 +64689,7 @@ void m68000_device::move_w_dpc_dd_ip() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64731,7 +64731,7 @@ void m68000_device::move_w_dpci_dd_ip() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64799,7 +64799,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64829,7 +64829,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64903,7 +64903,7 @@ void m68000_device::move_w_imm16_dd_ip() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -64957,7 +64957,7 @@ void m68000_device::movea_w_ds_ad_ip() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -65004,7 +65004,7 @@ void m68000_device::movea_w_as_ad_ip() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65046,7 +65046,7 @@ void m68000_device::movea_w_ais_ad_ip() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65124,7 +65124,7 @@ void m68000_device::movea_w_aips_ad_ip() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65202,7 +65202,7 @@ void m68000_device::movea_w_pais_ad_ip() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65297,7 +65297,7 @@ void m68000_device::movea_w_das_ad_ip() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65367,7 +65367,7 @@ void m68000_device::movea_w_dais_ad_ip() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65435,7 +65435,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65533,7 +65533,7 @@ void m68000_device::movea_w_adr16_ad_ip() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -65653,7 +65653,7 @@ void m68000_device::movea_w_adr32_ad_ip() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -65747,7 +65747,7 @@ void m68000_device::movea_w_dpc_ad_ip() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65816,7 +65816,7 @@ void m68000_device::movea_w_dpci_ad_ip() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65884,7 +65884,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65989,7 +65989,7 @@ void m68000_device::movea_w_imm16_ad_ip() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -66033,7 +66033,7 @@ void m68000_device::move_w_ds_aid_ip() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66104,7 +66104,7 @@ void m68000_device::move_w_as_aid_ip() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66172,7 +66172,7 @@ void m68000_device::move_w_ais_aid_ip() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66201,7 +66201,7 @@ void m68000_device::move_w_ais_aid_ip() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68000_device::move_w_aips_aid_ip() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66302,7 +66302,7 @@ void m68000_device::move_w_aips_aid_ip() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66378,7 +66378,7 @@ void m68000_device::move_w_pais_aid_ip() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66405,7 +66405,7 @@ void m68000_device::move_w_pais_aid_ip() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66498,7 +66498,7 @@ void m68000_device::move_w_das_aid_ip() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66527,7 +66527,7 @@ void m68000_device::move_w_das_aid_ip() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66593,7 +66593,7 @@ void m68000_device::move_w_dais_aid_ip() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66661,7 +66661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66690,7 +66690,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66784,7 +66784,7 @@ void m68000_device::move_w_adr16_aid_ip() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -66811,7 +66811,7 @@ void m68000_device::move_w_adr16_aid_ip() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66929,7 +66929,7 @@ void m68000_device::move_w_adr32_aid_ip() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66956,7 +66956,7 @@ void m68000_device::move_w_adr32_aid_ip() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67048,7 +67048,7 @@ void m68000_device::move_w_dpc_aid_ip() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67077,7 +67077,7 @@ void m68000_device::move_w_dpc_aid_ip() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67142,7 +67142,7 @@ void m68000_device::move_w_dpci_aid_ip() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67210,7 +67210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67239,7 +67239,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67336,7 +67336,7 @@ void m68000_device::move_w_imm16_aid_ip() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67407,7 +67407,7 @@ void m68000_device::move_w_ds_aipd_ip() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67477,7 +67477,7 @@ void m68000_device::move_w_as_aipd_ip() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67544,7 +67544,7 @@ void m68000_device::move_w_ais_aipd_ip() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67574,7 +67574,7 @@ void m68000_device::move_w_ais_aipd_ip() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67647,7 +67647,7 @@ void m68000_device::move_w_aips_aipd_ip() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67675,7 +67675,7 @@ void m68000_device::move_w_aips_aipd_ip() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67750,7 +67750,7 @@ void m68000_device::move_w_pais_aipd_ip() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67778,7 +67778,7 @@ void m68000_device::move_w_pais_aipd_ip() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67870,7 +67870,7 @@ void m68000_device::move_w_das_aipd_ip() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67900,7 +67900,7 @@ void m68000_device::move_w_das_aipd_ip() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67965,7 +67965,7 @@ void m68000_device::move_w_dais_aipd_ip() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68033,7 +68033,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68063,7 +68063,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68156,7 +68156,7 @@ void m68000_device::move_w_adr16_aipd_ip() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -68184,7 +68184,7 @@ void m68000_device::move_w_adr16_aipd_ip() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68301,7 +68301,7 @@ void m68000_device::move_w_adr32_aipd_ip() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -68329,7 +68329,7 @@ void m68000_device::move_w_adr32_aipd_ip() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68420,7 +68420,7 @@ void m68000_device::move_w_dpc_aipd_ip() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68450,7 +68450,7 @@ void m68000_device::move_w_dpc_aipd_ip() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68514,7 +68514,7 @@ void m68000_device::move_w_dpci_aipd_ip() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68582,7 +68582,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68612,7 +68612,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68708,7 +68708,7 @@ void m68000_device::move_w_imm16_aipd_ip() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68777,7 +68777,7 @@ void m68000_device::move_w_ds_paid_ip() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68847,7 +68847,7 @@ void m68000_device::move_w_as_paid_ip() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68915,7 +68915,7 @@ void m68000_device::move_w_ais_paid_ip() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68944,7 +68944,7 @@ void m68000_device::move_w_ais_paid_ip() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69018,7 +69018,7 @@ void m68000_device::move_w_aips_paid_ip() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69045,7 +69045,7 @@ void m68000_device::move_w_aips_paid_ip() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69121,7 +69121,7 @@ void m68000_device::move_w_pais_paid_ip() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69148,7 +69148,7 @@ void m68000_device::move_w_pais_paid_ip() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69241,7 +69241,7 @@ void m68000_device::move_w_das_paid_ip() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69270,7 +69270,7 @@ void m68000_device::move_w_das_paid_ip() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69336,7 +69336,7 @@ void m68000_device::move_w_dais_paid_ip() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69404,7 +69404,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69433,7 +69433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69527,7 +69527,7 @@ void m68000_device::move_w_adr16_paid_ip() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -69554,7 +69554,7 @@ void m68000_device::move_w_adr16_paid_ip() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69672,7 +69672,7 @@ void m68000_device::move_w_adr32_paid_ip() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69699,7 +69699,7 @@ void m68000_device::move_w_adr32_paid_ip() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69791,7 +69791,7 @@ void m68000_device::move_w_dpc_paid_ip() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69820,7 +69820,7 @@ void m68000_device::move_w_dpc_paid_ip() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69885,7 +69885,7 @@ void m68000_device::move_w_dpci_paid_ip() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69953,7 +69953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69982,7 +69982,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70078,7 +70078,7 @@ void m68000_device::move_w_imm16_paid_ip() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70172,7 +70172,7 @@ void m68000_device::move_w_ds_dad_ip() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70267,7 +70267,7 @@ void m68000_device::move_w_as_dad_ip() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70336,7 +70336,7 @@ void m68000_device::move_w_ais_dad_ip() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70364,7 +70364,7 @@ void m68000_device::move_w_ais_dad_ip() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70468,7 +70468,7 @@ void m68000_device::move_w_aips_dad_ip() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70494,7 +70494,7 @@ void m68000_device::move_w_aips_dad_ip() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70600,7 +70600,7 @@ void m68000_device::move_w_pais_dad_ip() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70626,7 +70626,7 @@ void m68000_device::move_w_pais_dad_ip() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70749,7 +70749,7 @@ void m68000_device::move_w_das_dad_ip() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70777,7 +70777,7 @@ void m68000_device::move_w_das_dad_ip() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70873,7 +70873,7 @@ void m68000_device::move_w_dais_dad_ip() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -70941,7 +70941,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70969,7 +70969,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71093,7 +71093,7 @@ void m68000_device::move_w_adr16_dad_ip() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -71119,7 +71119,7 @@ void m68000_device::move_w_adr16_dad_ip() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71267,7 +71267,7 @@ void m68000_device::move_w_adr32_dad_ip() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -71293,7 +71293,7 @@ void m68000_device::move_w_adr32_dad_ip() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71415,7 +71415,7 @@ void m68000_device::move_w_dpc_dad_ip() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71443,7 +71443,7 @@ void m68000_device::move_w_dpc_dad_ip() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71538,7 +71538,7 @@ void m68000_device::move_w_dpci_dad_ip() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71606,7 +71606,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71634,7 +71634,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71784,7 +71784,7 @@ void m68000_device::move_w_imm16_dad_ip() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71851,7 +71851,7 @@ void m68000_device::move_w_ds_daid_ip() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -71921,7 +71921,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71988,7 +71988,7 @@ void m68000_device::move_w_as_daid_ip() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -72058,7 +72058,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72127,7 +72127,7 @@ void m68000_device::move_w_ais_daid_ip() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72152,7 +72152,7 @@ void m68000_device::move_w_ais_daid_ip() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72167,7 +72167,7 @@ void m68000_device::move_w_ais_daid_ip() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72194,7 +72194,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72300,7 +72300,7 @@ void m68000_device::move_w_aips_daid_ip() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72323,7 +72323,7 @@ void m68000_device::move_w_aips_daid_ip() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72338,7 +72338,7 @@ void m68000_device::move_w_aips_daid_ip() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72365,7 +72365,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72473,7 +72473,7 @@ void m68000_device::move_w_pais_daid_ip() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72496,7 +72496,7 @@ void m68000_device::move_w_pais_daid_ip() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72511,7 +72511,7 @@ void m68000_device::move_w_pais_daid_ip() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72538,7 +72538,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72663,7 +72663,7 @@ void m68000_device::move_w_das_daid_ip() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72688,7 +72688,7 @@ void m68000_device::move_w_das_daid_ip() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72703,7 +72703,7 @@ void m68000_device::move_w_das_daid_ip() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72730,7 +72730,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72828,7 +72828,7 @@ void m68000_device::move_w_dais_daid_ip() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72896,7 +72896,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72921,7 +72921,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72936,7 +72936,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72963,7 +72963,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73089,7 +73089,7 @@ void m68000_device::move_w_adr16_daid_ip() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -73112,7 +73112,7 @@ void m68000_device::move_w_adr16_daid_ip() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73127,7 +73127,7 @@ void m68000_device::move_w_adr16_daid_ip() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73154,7 +73154,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73304,7 +73304,7 @@ void m68000_device::move_w_adr32_daid_ip() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -73327,7 +73327,7 @@ void m68000_device::move_w_adr32_daid_ip() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73342,7 +73342,7 @@ void m68000_device::move_w_adr32_daid_ip() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73369,7 +73369,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73493,7 +73493,7 @@ void m68000_device::move_w_dpc_daid_ip() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73518,7 +73518,7 @@ void m68000_device::move_w_dpc_daid_ip() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73533,7 +73533,7 @@ void m68000_device::move_w_dpc_daid_ip() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73560,7 +73560,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73657,7 +73657,7 @@ void m68000_device::move_w_dpci_daid_ip() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -73725,7 +73725,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73750,7 +73750,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73765,7 +73765,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73792,7 +73792,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73916,7 +73916,7 @@ void m68000_device::move_w_imm16_daid_ip() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -73986,7 +73986,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74056,7 +74056,7 @@ void m68000_device::move_w_ds_adr16_ip() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74155,7 +74155,7 @@ void m68000_device::move_w_as_adr16_ip() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74252,7 +74252,7 @@ void m68000_device::move_w_ais_adr16_ip() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74280,7 +74280,7 @@ void m68000_device::move_w_ais_adr16_ip() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74383,7 +74383,7 @@ void m68000_device::move_w_aips_adr16_ip() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74409,7 +74409,7 @@ void m68000_device::move_w_aips_adr16_ip() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74514,7 +74514,7 @@ void m68000_device::move_w_pais_adr16_ip() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74540,7 +74540,7 @@ void m68000_device::move_w_pais_adr16_ip() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74662,7 +74662,7 @@ void m68000_device::move_w_das_adr16_ip() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74690,7 +74690,7 @@ void m68000_device::move_w_das_adr16_ip() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74785,7 +74785,7 @@ void m68000_device::move_w_dais_adr16_ip() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74853,7 +74853,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74881,7 +74881,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75004,7 +75004,7 @@ void m68000_device::move_w_adr16_adr16_ip() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -75030,7 +75030,7 @@ void m68000_device::move_w_adr16_adr16_ip() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75177,7 +75177,7 @@ void m68000_device::move_w_adr32_adr16_ip() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75203,7 +75203,7 @@ void m68000_device::move_w_adr32_adr16_ip() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75324,7 +75324,7 @@ void m68000_device::move_w_dpc_adr16_ip() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75352,7 +75352,7 @@ void m68000_device::move_w_dpc_adr16_ip() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75446,7 +75446,7 @@ void m68000_device::move_w_dpci_adr16_ip() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75514,7 +75514,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75542,7 +75542,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75667,7 +75667,7 @@ void m68000_device::move_w_imm16_adr16_ip() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75790,7 +75790,7 @@ void m68000_device::move_w_ds_adr32_ip() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75913,7 +75913,7 @@ void m68000_device::move_w_as_adr32_ip() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76010,7 +76010,7 @@ void m68000_device::move_w_ais_adr32_ip() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76038,7 +76038,7 @@ void m68000_device::move_w_ais_adr32_ip() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76164,7 +76164,7 @@ void m68000_device::move_w_aips_adr32_ip() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76190,7 +76190,7 @@ void m68000_device::move_w_aips_adr32_ip() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76318,7 +76318,7 @@ void m68000_device::move_w_pais_adr32_ip() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76344,7 +76344,7 @@ void m68000_device::move_w_pais_adr32_ip() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76489,7 +76489,7 @@ void m68000_device::move_w_das_adr32_ip() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76517,7 +76517,7 @@ void m68000_device::move_w_das_adr32_ip() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76635,7 +76635,7 @@ void m68000_device::move_w_dais_adr32_ip() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76703,7 +76703,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76731,7 +76731,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76877,7 +76877,7 @@ void m68000_device::move_w_adr16_adr32_ip() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -76903,7 +76903,7 @@ void m68000_device::move_w_adr16_adr32_ip() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77073,7 +77073,7 @@ void m68000_device::move_w_adr32_adr32_ip() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -77099,7 +77099,7 @@ void m68000_device::move_w_adr32_adr32_ip() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77243,7 +77243,7 @@ void m68000_device::move_w_dpc_adr32_ip() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77271,7 +77271,7 @@ void m68000_device::move_w_dpc_adr32_ip() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77388,7 +77388,7 @@ void m68000_device::move_w_dpci_adr32_ip() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77456,7 +77456,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77484,7 +77484,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77656,7 +77656,7 @@ void m68000_device::move_w_imm16_adr32_ip() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77755,7 +77755,7 @@ void m68000_device::negx_b_ds_ip() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -77801,7 +77801,7 @@ void m68000_device::negx_b_ais_ip() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77826,7 +77826,7 @@ void m68000_device::negx_b_ais_ip() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77892,7 +77892,7 @@ void m68000_device::negx_b_aips_ip() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -77915,7 +77915,7 @@ void m68000_device::negx_b_aips_ip() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77983,7 +77983,7 @@ void m68000_device::negx_b_pais_ip() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78006,7 +78006,7 @@ void m68000_device::negx_b_pais_ip() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78091,7 +78091,7 @@ void m68000_device::negx_b_das_ip() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78116,7 +78116,7 @@ void m68000_device::negx_b_das_ip() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78174,7 +78174,7 @@ void m68000_device::negx_b_dais_ip() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78242,7 +78242,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78267,7 +78267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78353,7 +78353,7 @@ void m68000_device::negx_b_adr16_ip() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -78376,7 +78376,7 @@ void m68000_device::negx_b_adr16_ip() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78486,7 +78486,7 @@ void m68000_device::negx_b_adr32_ip() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -78509,7 +78509,7 @@ void m68000_device::negx_b_adr32_ip() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78571,7 +78571,7 @@ void m68000_device::negx_w_ds_ip() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -78617,7 +78617,7 @@ void m68000_device::negx_w_ais_ip() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78646,7 +78646,7 @@ void m68000_device::negx_w_ais_ip() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78718,7 +78718,7 @@ void m68000_device::negx_w_aips_ip() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78745,7 +78745,7 @@ void m68000_device::negx_w_aips_ip() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78819,7 +78819,7 @@ void m68000_device::negx_w_pais_ip() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78846,7 +78846,7 @@ void m68000_device::negx_w_pais_ip() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78937,7 +78937,7 @@ void m68000_device::negx_w_das_ip() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78966,7 +78966,7 @@ void m68000_device::negx_w_das_ip() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79030,7 +79030,7 @@ void m68000_device::negx_w_dais_ip() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79098,7 +79098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -79127,7 +79127,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79219,7 +79219,7 @@ void m68000_device::negx_w_adr16_ip() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -79246,7 +79246,7 @@ void m68000_device::negx_w_adr16_ip() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79362,7 +79362,7 @@ void m68000_device::negx_w_adr32_ip() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79389,7 +79389,7 @@ void m68000_device::negx_w_adr32_ip() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79457,12 +79457,12 @@ void m68000_device::negx_l_ds_ip() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79509,7 +79509,7 @@ void m68000_device::negx_l_ais_ip() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79562,7 +79562,7 @@ void m68000_device::negx_l_ais_ip() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79590,7 +79590,7 @@ void m68000_device::negx_l_ais_ip() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79654,7 +79654,7 @@ void m68000_device::negx_l_aips_ip() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79710,7 +79710,7 @@ void m68000_device::negx_l_aips_ip() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79738,7 +79738,7 @@ void m68000_device::negx_l_aips_ip() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79801,7 +79801,7 @@ void m68000_device::negx_l_pais_ip() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79859,7 +79859,7 @@ void m68000_device::negx_l_pais_ip() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79887,7 +79887,7 @@ void m68000_device::negx_l_pais_ip() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79975,7 +79975,7 @@ void m68000_device::negx_l_das_ip() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80028,7 +80028,7 @@ void m68000_device::negx_l_das_ip() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80056,7 +80056,7 @@ void m68000_device::negx_l_das_ip() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80118,7 +80118,7 @@ void m68000_device::negx_l_dais_ip() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80185,7 +80185,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80238,7 +80238,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80266,7 +80266,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80356,7 +80356,7 @@ void m68000_device::negx_l_adr16_ip() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80409,7 +80409,7 @@ void m68000_device::negx_l_adr16_ip() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80437,7 +80437,7 @@ void m68000_device::negx_l_adr16_ip() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80551,7 +80551,7 @@ void m68000_device::negx_l_adr32_ip() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -80604,7 +80604,7 @@ void m68000_device::negx_l_adr32_ip() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80632,7 +80632,7 @@ void m68000_device::negx_l_adr32_ip() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80743,7 +80743,7 @@ void m68000_device::move_sr_ais_ip() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80774,7 +80774,7 @@ void m68000_device::move_sr_ais_ip() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80845,7 +80845,7 @@ void m68000_device::move_sr_aips_ip() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80874,7 +80874,7 @@ void m68000_device::move_sr_aips_ip() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80947,7 +80947,7 @@ void m68000_device::move_sr_pais_ip() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80976,7 +80976,7 @@ void m68000_device::move_sr_pais_ip() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -81066,7 +81066,7 @@ void m68000_device::move_sr_das_ip() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81097,7 +81097,7 @@ void m68000_device::move_sr_das_ip() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81160,7 +81160,7 @@ void m68000_device::move_sr_dais_ip() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81228,7 +81228,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81259,7 +81259,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81350,7 +81350,7 @@ void m68000_device::move_sr_adr16_ip() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -81379,7 +81379,7 @@ void m68000_device::move_sr_adr16_ip() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81494,7 +81494,7 @@ void m68000_device::move_sr_adr32_ip() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -81523,7 +81523,7 @@ void m68000_device::move_sr_adr32_ip() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -81589,7 +81589,7 @@ void m68000_device::chk_w_ds_dd_ip() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -81597,7 +81597,7 @@ void m68000_device::chk_w_ds_dd_ip() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81615,14 +81615,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -81650,7 +81650,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81676,7 +81676,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81834,7 +81834,7 @@ void m68000_device::chk_w_ais_dd_ip() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -81861,7 +81861,7 @@ void m68000_device::chk_w_ais_dd_ip() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -81869,7 +81869,7 @@ void m68000_device::chk_w_ais_dd_ip() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81887,14 +81887,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81922,7 +81922,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81948,7 +81948,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82112,7 +82112,7 @@ void m68000_device::chk_w_aips_dd_ip() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82137,7 +82137,7 @@ void m68000_device::chk_w_aips_dd_ip() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82145,7 +82145,7 @@ void m68000_device::chk_w_aips_dd_ip() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82163,14 +82163,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82198,7 +82198,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82224,7 +82224,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82390,7 +82390,7 @@ void m68000_device::chk_w_pais_dd_ip() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82415,7 +82415,7 @@ void m68000_device::chk_w_pais_dd_ip() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82423,7 +82423,7 @@ void m68000_device::chk_w_pais_dd_ip() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82441,14 +82441,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82476,7 +82476,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82502,7 +82502,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82685,7 +82685,7 @@ void m68000_device::chk_w_das_dd_ip() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -82712,7 +82712,7 @@ void m68000_device::chk_w_das_dd_ip() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82720,7 +82720,7 @@ void m68000_device::chk_w_das_dd_ip() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82738,14 +82738,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82773,7 +82773,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82799,7 +82799,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -82955,7 +82955,7 @@ void m68000_device::chk_w_dais_dd_ip() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -83023,7 +83023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83050,7 +83050,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83058,7 +83058,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83076,14 +83076,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83111,7 +83111,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83137,7 +83137,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83321,7 +83321,7 @@ void m68000_device::chk_w_adr16_dd_ip() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -83346,7 +83346,7 @@ void m68000_device::chk_w_adr16_dd_ip() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83354,7 +83354,7 @@ void m68000_device::chk_w_adr16_dd_ip() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83372,14 +83372,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83407,7 +83407,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83433,7 +83433,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83641,7 +83641,7 @@ void m68000_device::chk_w_adr32_dd_ip() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83666,7 +83666,7 @@ void m68000_device::chk_w_adr32_dd_ip() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83674,7 +83674,7 @@ void m68000_device::chk_w_adr32_dd_ip() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83692,14 +83692,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83727,7 +83727,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83753,7 +83753,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -83935,7 +83935,7 @@ void m68000_device::chk_w_dpc_dd_ip() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83962,7 +83962,7 @@ void m68000_device::chk_w_dpc_dd_ip() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83970,7 +83970,7 @@ void m68000_device::chk_w_dpc_dd_ip() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83988,14 +83988,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84023,7 +84023,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84049,7 +84049,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84204,7 +84204,7 @@ void m68000_device::chk_w_dpci_dd_ip() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84272,7 +84272,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84299,7 +84299,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -84307,7 +84307,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84325,14 +84325,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84360,7 +84360,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84386,7 +84386,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84570,7 +84570,7 @@ void m68000_device::chk_w_imm16_dd_ip() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -84578,7 +84578,7 @@ void m68000_device::chk_w_imm16_dd_ip() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84596,14 +84596,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -84631,7 +84631,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84657,7 +84657,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84931,7 +84931,7 @@ void m68000_device::lea_dais_ad_ip() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85272,7 +85272,7 @@ void m68000_device::lea_dpci_ad_ip() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85388,7 +85388,7 @@ void m68000_device::clr_b_ds_ip() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -85396,7 +85396,7 @@ void m68000_device::clr_b_ds_ip() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85435,11 +85435,11 @@ void m68000_device::clr_b_ais_ip() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85461,7 +85461,7 @@ void m68000_device::clr_b_ais_ip() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85491,7 +85491,7 @@ void m68000_device::clr_b_ais_ip() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85525,12 +85525,12 @@ void m68000_device::clr_b_aips_ip() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85553,7 +85553,7 @@ void m68000_device::clr_b_aips_ip() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85583,7 +85583,7 @@ void m68000_device::clr_b_aips_ip() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85616,7 +85616,7 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -85624,7 +85624,7 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85647,7 +85647,7 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85677,7 +85677,7 @@ void m68000_device::clr_b_pais_ip() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85708,7 +85708,7 @@ void m68000_device::clr_b_das_ip() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85734,11 +85734,11 @@ void m68000_device::clr_b_das_ip() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85760,7 +85760,7 @@ void m68000_device::clr_b_das_ip() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85790,7 +85790,7 @@ void m68000_device::clr_b_das_ip() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85819,14 +85819,14 @@ void m68000_device::clr_b_dais_ip() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -85834,7 +85834,7 @@ void m68000_device::clr_b_dais_ip() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85861,7 +85861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85890,11 +85890,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85916,7 +85916,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85946,7 +85946,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85979,7 +85979,7 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86005,7 +86005,7 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86028,7 +86028,7 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86058,7 +86058,7 @@ void m68000_device::clr_b_adr16_ip() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86089,7 +86089,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86116,7 +86116,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -86142,7 +86142,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -86165,7 +86165,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86195,7 +86195,7 @@ void m68000_device::clr_b_adr32_ip() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86228,7 +86228,7 @@ void m68000_device::clr_w_ds_ip() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -86236,7 +86236,7 @@ void m68000_device::clr_w_ds_ip() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86275,11 +86275,11 @@ void m68000_device::clr_w_ais_ip() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86305,7 +86305,7 @@ void m68000_device::clr_w_ais_ip() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86335,7 +86335,7 @@ void m68000_device::clr_w_ais_ip() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86375,12 +86375,12 @@ void m68000_device::clr_w_aips_ip() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86407,7 +86407,7 @@ void m68000_device::clr_w_aips_ip() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86437,7 +86437,7 @@ void m68000_device::clr_w_aips_ip() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86476,7 +86476,7 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -86484,7 +86484,7 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86511,7 +86511,7 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86541,7 +86541,7 @@ void m68000_device::clr_w_pais_ip() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86578,7 +86578,7 @@ void m68000_device::clr_w_das_ip() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86604,11 +86604,11 @@ void m68000_device::clr_w_das_ip() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86634,7 +86634,7 @@ void m68000_device::clr_w_das_ip() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86664,7 +86664,7 @@ void m68000_device::clr_w_das_ip() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86699,14 +86699,14 @@ void m68000_device::clr_w_dais_ip() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -86714,7 +86714,7 @@ void m68000_device::clr_w_dais_ip() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86741,7 +86741,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86770,11 +86770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86800,7 +86800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86830,7 +86830,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86869,7 +86869,7 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86895,7 +86895,7 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86922,7 +86922,7 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86952,7 +86952,7 @@ void m68000_device::clr_w_adr16_ip() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86989,7 +86989,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87016,7 +87016,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -87042,7 +87042,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87069,7 +87069,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87099,7 +87099,7 @@ void m68000_device::clr_w_adr32_ip() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87138,12 +87138,12 @@ void m68000_device::clr_l_ds_ip() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87172,7 +87172,7 @@ void m68000_device::clr_l_ds_ip() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -87191,7 +87191,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87219,7 +87219,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87245,7 +87245,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87273,7 +87273,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87301,7 +87301,7 @@ void m68000_device::clr_l_ais_ip() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87338,7 +87338,7 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87366,11 +87366,11 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87396,7 +87396,7 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87424,7 +87424,7 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87452,7 +87452,7 @@ void m68000_device::clr_l_aips_ip() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87488,14 +87488,14 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87522,7 +87522,7 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87548,7 +87548,7 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87576,7 +87576,7 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87604,7 +87604,7 @@ void m68000_device::clr_l_pais_ip() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87641,7 +87641,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87666,7 +87666,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87694,7 +87694,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87720,7 +87720,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87748,7 +87748,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87776,7 +87776,7 @@ void m68000_device::clr_l_das_ip() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87811,14 +87811,14 @@ void m68000_device::clr_l_dais_ip() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -87826,7 +87826,7 @@ void m68000_device::clr_l_dais_ip() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87853,7 +87853,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87881,7 +87881,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87909,7 +87909,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87935,7 +87935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87963,7 +87963,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87991,7 +87991,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88030,7 +88030,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -88056,7 +88056,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -88084,7 +88084,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -88110,7 +88110,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88138,7 +88138,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88166,7 +88166,7 @@ void m68000_device::clr_l_adr16_ip() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88203,7 +88203,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -88230,7 +88230,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -88256,7 +88256,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88284,7 +88284,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -88310,7 +88310,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88338,7 +88338,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88366,7 +88366,7 @@ void m68000_device::clr_l_adr32_ip() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88405,7 +88405,7 @@ void m68000_device::neg_b_ds_ip() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -88451,7 +88451,7 @@ void m68000_device::neg_b_ais_ip() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88476,7 +88476,7 @@ void m68000_device::neg_b_ais_ip() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88542,7 +88542,7 @@ void m68000_device::neg_b_aips_ip() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88565,7 +88565,7 @@ void m68000_device::neg_b_aips_ip() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88633,7 +88633,7 @@ void m68000_device::neg_b_pais_ip() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88656,7 +88656,7 @@ void m68000_device::neg_b_pais_ip() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88741,7 +88741,7 @@ void m68000_device::neg_b_das_ip() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88766,7 +88766,7 @@ void m68000_device::neg_b_das_ip() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88824,7 +88824,7 @@ void m68000_device::neg_b_dais_ip() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88892,7 +88892,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88917,7 +88917,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89003,7 +89003,7 @@ void m68000_device::neg_b_adr16_ip() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89026,7 +89026,7 @@ void m68000_device::neg_b_adr16_ip() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89136,7 +89136,7 @@ void m68000_device::neg_b_adr32_ip() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -89159,7 +89159,7 @@ void m68000_device::neg_b_adr32_ip() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89221,7 +89221,7 @@ void m68000_device::neg_w_ds_ip() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -89267,7 +89267,7 @@ void m68000_device::neg_w_ais_ip() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89296,7 +89296,7 @@ void m68000_device::neg_w_ais_ip() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89368,7 +89368,7 @@ void m68000_device::neg_w_aips_ip() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89395,7 +89395,7 @@ void m68000_device::neg_w_aips_ip() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89469,7 +89469,7 @@ void m68000_device::neg_w_pais_ip() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89496,7 +89496,7 @@ void m68000_device::neg_w_pais_ip() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89587,7 +89587,7 @@ void m68000_device::neg_w_das_ip() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89616,7 +89616,7 @@ void m68000_device::neg_w_das_ip() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89680,7 +89680,7 @@ void m68000_device::neg_w_dais_ip() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89748,7 +89748,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89777,7 +89777,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89869,7 +89869,7 @@ void m68000_device::neg_w_adr16_ip() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89896,7 +89896,7 @@ void m68000_device::neg_w_adr16_ip() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90012,7 +90012,7 @@ void m68000_device::neg_w_adr32_ip() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90039,7 +90039,7 @@ void m68000_device::neg_w_adr32_ip() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90107,12 +90107,12 @@ void m68000_device::neg_l_ds_ip() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90159,7 +90159,7 @@ void m68000_device::neg_l_ais_ip() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90212,7 +90212,7 @@ void m68000_device::neg_l_ais_ip() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90240,7 +90240,7 @@ void m68000_device::neg_l_ais_ip() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90304,7 +90304,7 @@ void m68000_device::neg_l_aips_ip() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90360,7 +90360,7 @@ void m68000_device::neg_l_aips_ip() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90388,7 +90388,7 @@ void m68000_device::neg_l_aips_ip() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90451,7 +90451,7 @@ void m68000_device::neg_l_pais_ip() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -90509,7 +90509,7 @@ void m68000_device::neg_l_pais_ip() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90537,7 +90537,7 @@ void m68000_device::neg_l_pais_ip() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90625,7 +90625,7 @@ void m68000_device::neg_l_das_ip() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90678,7 +90678,7 @@ void m68000_device::neg_l_das_ip() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90706,7 +90706,7 @@ void m68000_device::neg_l_das_ip() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90768,7 +90768,7 @@ void m68000_device::neg_l_dais_ip() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -90835,7 +90835,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90888,7 +90888,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90916,7 +90916,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91006,7 +91006,7 @@ void m68000_device::neg_l_adr16_ip() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -91059,7 +91059,7 @@ void m68000_device::neg_l_adr16_ip() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91087,7 +91087,7 @@ void m68000_device::neg_l_adr16_ip() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91201,7 +91201,7 @@ void m68000_device::neg_l_adr32_ip() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -91254,7 +91254,7 @@ void m68000_device::neg_l_adr32_ip() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91282,7 +91282,7 @@ void m68000_device::neg_l_adr32_ip() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91424,7 +91424,7 @@ void m68000_device::move_ais_ccr_ip() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91535,7 +91535,7 @@ void m68000_device::move_aips_ccr_ip() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91646,7 +91646,7 @@ void m68000_device::move_pais_ccr_ip() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91774,7 +91774,7 @@ void m68000_device::move_das_ccr_ip() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91877,7 +91877,7 @@ void m68000_device::move_dais_ccr_ip() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91945,7 +91945,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92076,7 +92076,7 @@ void m68000_device::move_adr16_ccr_ip() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -92229,7 +92229,7 @@ void m68000_device::move_adr32_ccr_ip() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92356,7 +92356,7 @@ void m68000_device::move_dpc_ccr_ip() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92458,7 +92458,7 @@ void m68000_device::move_dpci_ccr_ip() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92526,7 +92526,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92737,7 +92737,7 @@ void m68000_device::not_b_ds_ip() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -92783,7 +92783,7 @@ void m68000_device::not_b_ais_ip() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92808,7 +92808,7 @@ void m68000_device::not_b_ais_ip() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92874,7 +92874,7 @@ void m68000_device::not_b_aips_ip() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92897,7 +92897,7 @@ void m68000_device::not_b_aips_ip() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92965,7 +92965,7 @@ void m68000_device::not_b_pais_ip() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92988,7 +92988,7 @@ void m68000_device::not_b_pais_ip() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93073,7 +93073,7 @@ void m68000_device::not_b_das_ip() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93098,7 +93098,7 @@ void m68000_device::not_b_das_ip() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93156,7 +93156,7 @@ void m68000_device::not_b_dais_ip() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93224,7 +93224,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93249,7 +93249,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93335,7 +93335,7 @@ void m68000_device::not_b_adr16_ip() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -93358,7 +93358,7 @@ void m68000_device::not_b_adr16_ip() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93468,7 +93468,7 @@ void m68000_device::not_b_adr32_ip() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -93491,7 +93491,7 @@ void m68000_device::not_b_adr32_ip() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93553,7 +93553,7 @@ void m68000_device::not_w_ds_ip() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -93599,7 +93599,7 @@ void m68000_device::not_w_ais_ip() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93628,7 +93628,7 @@ void m68000_device::not_w_ais_ip() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93700,7 +93700,7 @@ void m68000_device::not_w_aips_ip() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93727,7 +93727,7 @@ void m68000_device::not_w_aips_ip() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93801,7 +93801,7 @@ void m68000_device::not_w_pais_ip() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93828,7 +93828,7 @@ void m68000_device::not_w_pais_ip() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93919,7 +93919,7 @@ void m68000_device::not_w_das_ip() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93948,7 +93948,7 @@ void m68000_device::not_w_das_ip() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94012,7 +94012,7 @@ void m68000_device::not_w_dais_ip() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94080,7 +94080,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94109,7 +94109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94201,7 +94201,7 @@ void m68000_device::not_w_adr16_ip() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -94228,7 +94228,7 @@ void m68000_device::not_w_adr16_ip() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94344,7 +94344,7 @@ void m68000_device::not_w_adr32_ip() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94371,7 +94371,7 @@ void m68000_device::not_w_adr32_ip() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94439,12 +94439,12 @@ void m68000_device::not_l_ds_ip() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94491,7 +94491,7 @@ void m68000_device::not_l_ais_ip() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94544,7 +94544,7 @@ void m68000_device::not_l_ais_ip() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94572,7 +94572,7 @@ void m68000_device::not_l_ais_ip() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94636,7 +94636,7 @@ void m68000_device::not_l_aips_ip() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94692,7 +94692,7 @@ void m68000_device::not_l_aips_ip() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94720,7 +94720,7 @@ void m68000_device::not_l_aips_ip() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94783,7 +94783,7 @@ void m68000_device::not_l_pais_ip() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -94841,7 +94841,7 @@ void m68000_device::not_l_pais_ip() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94869,7 +94869,7 @@ void m68000_device::not_l_pais_ip() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94957,7 +94957,7 @@ void m68000_device::not_l_das_ip() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95010,7 +95010,7 @@ void m68000_device::not_l_das_ip() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95038,7 +95038,7 @@ void m68000_device::not_l_das_ip() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95100,7 +95100,7 @@ void m68000_device::not_l_dais_ip() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -95167,7 +95167,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95220,7 +95220,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95248,7 +95248,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95338,7 +95338,7 @@ void m68000_device::not_l_adr16_ip() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95391,7 +95391,7 @@ void m68000_device::not_l_adr16_ip() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95419,7 +95419,7 @@ void m68000_device::not_l_adr16_ip() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95533,7 +95533,7 @@ void m68000_device::not_l_adr32_ip() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -95586,7 +95586,7 @@ void m68000_device::not_l_adr32_ip() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95614,7 +95614,7 @@ void m68000_device::not_l_adr32_ip() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95766,7 +95766,7 @@ void m68000_device::move_ais_sr_ip() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -95883,7 +95883,7 @@ void m68000_device::move_aips_sr_ip() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96000,7 +96000,7 @@ void m68000_device::move_pais_sr_ip() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96134,7 +96134,7 @@ void m68000_device::move_das_sr_ip() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96243,7 +96243,7 @@ void m68000_device::move_dais_sr_ip() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96311,7 +96311,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96448,7 +96448,7 @@ void m68000_device::move_adr16_sr_ip() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -96607,7 +96607,7 @@ void m68000_device::move_adr32_sr_ip() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -96740,7 +96740,7 @@ void m68000_device::move_dpc_sr_ip() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96848,7 +96848,7 @@ void m68000_device::move_dpci_sr_ip() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96916,7 +96916,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97135,12 +97135,12 @@ void m68000_device::nbcd_b_ds_ip() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97185,7 +97185,7 @@ void m68000_device::nbcd_b_ais_ip() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97209,12 +97209,12 @@ void m68000_device::nbcd_b_ais_ip() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97278,7 +97278,7 @@ void m68000_device::nbcd_b_aips_ip() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97300,12 +97300,12 @@ void m68000_device::nbcd_b_aips_ip() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97371,7 +97371,7 @@ void m68000_device::nbcd_b_pais_ip() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97393,12 +97393,12 @@ void m68000_device::nbcd_b_pais_ip() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97481,7 +97481,7 @@ void m68000_device::nbcd_b_das_ip() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97505,12 +97505,12 @@ void m68000_device::nbcd_b_das_ip() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97566,7 +97566,7 @@ void m68000_device::nbcd_b_dais_ip() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97634,7 +97634,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97658,12 +97658,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97747,7 +97747,7 @@ void m68000_device::nbcd_b_adr16_ip() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -97769,12 +97769,12 @@ void m68000_device::nbcd_b_adr16_ip() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97882,7 +97882,7 @@ void m68000_device::nbcd_b_adr32_ip() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97904,12 +97904,12 @@ void m68000_device::nbcd_b_adr32_ip() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97970,7 +97970,7 @@ void m68000_device::swap_ds_ip() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -97978,7 +97978,7 @@ void m68000_device::swap_ds_ip() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98022,7 +98022,7 @@ void m68000_device::pea_ais_ip() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98112,7 +98112,7 @@ void m68000_device::pea_das_ip() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98142,7 +98142,7 @@ void m68000_device::pea_das_ip() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98230,7 +98230,7 @@ void m68000_device::pea_dais_ip() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98297,7 +98297,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98654,7 +98654,7 @@ void m68000_device::pea_dpc_ip() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98684,7 +98684,7 @@ void m68000_device::pea_dpc_ip() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98771,7 +98771,7 @@ void m68000_device::pea_dpci_ip() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98838,7 +98838,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98935,7 +98935,7 @@ void m68000_device::ext_w_ds_ip() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -99358,7 +99358,7 @@ void m68000_device::movem_w_list_dais_ip() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -99797,7 +99797,7 @@ void m68000_device::ext_l_ds_ip() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -100290,7 +100290,7 @@ void m68000_device::movem_l_list_dais_ip() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -100799,13 +100799,13 @@ void m68000_device::tst_b_ds_ip() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100844,11 +100844,11 @@ void m68000_device::tst_b_ais_ip() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100870,13 +100870,13 @@ void m68000_device::tst_b_ais_ip() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100918,12 +100918,12 @@ void m68000_device::tst_b_aips_ip() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -100946,13 +100946,13 @@ void m68000_device::tst_b_aips_ip() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100993,7 +100993,7 @@ void m68000_device::tst_b_pais_ip() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101001,7 +101001,7 @@ void m68000_device::tst_b_pais_ip() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101024,13 +101024,13 @@ void m68000_device::tst_b_pais_ip() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101069,7 +101069,7 @@ void m68000_device::tst_b_das_ip() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101095,11 +101095,11 @@ void m68000_device::tst_b_das_ip() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101121,13 +101121,13 @@ void m68000_device::tst_b_das_ip() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101164,14 +101164,14 @@ void m68000_device::tst_b_dais_ip() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101179,7 +101179,7 @@ void m68000_device::tst_b_dais_ip() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101206,7 +101206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101235,11 +101235,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101261,13 +101261,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101308,7 +101308,7 @@ void m68000_device::tst_b_adr16_ip() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -101334,7 +101334,7 @@ void m68000_device::tst_b_adr16_ip() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -101357,13 +101357,13 @@ void m68000_device::tst_b_adr16_ip() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101402,7 +101402,7 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101429,7 +101429,7 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -101455,7 +101455,7 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -101478,13 +101478,13 @@ void m68000_device::tst_b_adr32_ip() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101526,13 +101526,13 @@ void m68000_device::tst_w_ds_ip() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101571,11 +101571,11 @@ void m68000_device::tst_w_ais_ip() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101601,13 +101601,13 @@ void m68000_device::tst_w_ais_ip() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101649,12 +101649,12 @@ void m68000_device::tst_w_aips_ip() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101681,13 +101681,13 @@ void m68000_device::tst_w_aips_ip() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101728,7 +101728,7 @@ void m68000_device::tst_w_pais_ip() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101736,7 +101736,7 @@ void m68000_device::tst_w_pais_ip() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101763,13 +101763,13 @@ void m68000_device::tst_w_pais_ip() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101808,7 +101808,7 @@ void m68000_device::tst_w_das_ip() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101834,11 +101834,11 @@ void m68000_device::tst_w_das_ip() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101864,13 +101864,13 @@ void m68000_device::tst_w_das_ip() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101907,14 +101907,14 @@ void m68000_device::tst_w_dais_ip() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101922,7 +101922,7 @@ void m68000_device::tst_w_dais_ip() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101949,7 +101949,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101978,11 +101978,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102008,13 +102008,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102055,7 +102055,7 @@ void m68000_device::tst_w_adr16_ip() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102081,7 +102081,7 @@ void m68000_device::tst_w_adr16_ip() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102108,13 +102108,13 @@ void m68000_device::tst_w_adr16_ip() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102153,7 +102153,7 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102180,7 +102180,7 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -102206,7 +102206,7 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102233,13 +102233,13 @@ void m68000_device::tst_w_adr32_ip() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102281,13 +102281,13 @@ void m68000_device::tst_l_ds_ip() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102328,7 +102328,7 @@ void m68000_device::tst_l_ais_ip() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102356,7 +102356,7 @@ void m68000_device::tst_l_ais_ip() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102382,13 +102382,13 @@ void m68000_device::tst_l_ais_ip() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102429,7 +102429,7 @@ void m68000_device::tst_l_aips_ip() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102457,11 +102457,11 @@ void m68000_device::tst_l_aips_ip() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102487,13 +102487,13 @@ void m68000_device::tst_l_aips_ip() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102533,14 +102533,14 @@ void m68000_device::tst_l_pais_ip() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102567,7 +102567,7 @@ void m68000_device::tst_l_pais_ip() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102593,13 +102593,13 @@ void m68000_device::tst_l_pais_ip() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102640,7 +102640,7 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102665,7 +102665,7 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102693,7 +102693,7 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102719,13 +102719,13 @@ void m68000_device::tst_l_das_ip() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102764,14 +102764,14 @@ void m68000_device::tst_l_dais_ip() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -102779,7 +102779,7 @@ void m68000_device::tst_l_dais_ip() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102806,7 +102806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102834,7 +102834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102862,7 +102862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102888,13 +102888,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102937,7 +102937,7 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102963,7 +102963,7 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102991,7 +102991,7 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -103017,13 +103017,13 @@ void m68000_device::tst_l_adr16_ip() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103064,7 +103064,7 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103091,7 +103091,7 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -103117,7 +103117,7 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -103145,7 +103145,7 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -103171,13 +103171,13 @@ void m68000_device::tst_l_adr32_ip() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103220,14 +103220,14 @@ void m68000_device::tas_ds_ip() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103268,11 +103268,11 @@ void m68000_device::tas_ais_ip() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103289,14 +103289,14 @@ void m68000_device::tas_ais_ip() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103320,11 +103320,11 @@ void m68000_device::tas_ais_ip() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103366,12 +103366,12 @@ void m68000_device::tas_aips_ip() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103389,14 +103389,14 @@ void m68000_device::tas_aips_ip() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103420,11 +103420,11 @@ void m68000_device::tas_aips_ip() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103465,7 +103465,7 @@ void m68000_device::tas_pais_ip() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103473,7 +103473,7 @@ void m68000_device::tas_pais_ip() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103491,14 +103491,14 @@ void m68000_device::tas_pais_ip() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103522,11 +103522,11 @@ void m68000_device::tas_pais_ip() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103565,7 +103565,7 @@ void m68000_device::tas_das_ip() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103591,11 +103591,11 @@ void m68000_device::tas_das_ip() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103612,14 +103612,14 @@ void m68000_device::tas_das_ip() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103643,11 +103643,11 @@ void m68000_device::tas_das_ip() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103684,14 +103684,14 @@ void m68000_device::tas_dais_ip() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103699,7 +103699,7 @@ void m68000_device::tas_dais_ip() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103726,7 +103726,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103755,11 +103755,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103776,14 +103776,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103807,11 +103807,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103852,7 +103852,7 @@ void m68000_device::tas_adr16_ip() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -103878,7 +103878,7 @@ void m68000_device::tas_adr16_ip() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -103896,14 +103896,14 @@ void m68000_device::tas_adr16_ip() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103927,11 +103927,11 @@ void m68000_device::tas_adr16_ip() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103970,7 +103970,7 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103997,7 +103997,7 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -104023,7 +104023,7 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104041,14 +104041,14 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -104072,11 +104072,11 @@ void m68000_device::tas_adr32_ip() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104563,7 +104563,7 @@ void m68000_device::movem_w_dais_list_ip() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -104627,7 +104627,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105256,7 +105256,7 @@ void m68000_device::movem_w_dpci_list_ip() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -105320,7 +105320,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105949,7 +105949,7 @@ void m68000_device::movem_l_dais_list_ip() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106013,7 +106013,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106738,7 +106738,7 @@ void m68000_device::movem_l_dpci_list_ip() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106802,7 +106802,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106940,14 +106940,14 @@ void m68000_device::trap_imm4_ip() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -106975,7 +106975,7 @@ void m68000_device::trap_imm4_ip() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -107001,7 +107001,7 @@ void m68000_device::trap_imm4_ip() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107142,7 +107142,7 @@ void m68000_device::link_as_imm16_ip() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -107462,7 +107462,7 @@ void m68000_device::reset_ip() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -107576,7 +107576,7 @@ void m68000_device::stop_i16u_ip() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -107590,6 +107590,7 @@ void m68000_device::stop_i16u_ip() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -107606,7 +107607,7 @@ void m68000_device::rte_ip() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107753,7 +107754,7 @@ void m68000_device::rts_ip() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107914,7 +107915,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -107940,7 +107941,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107968,7 +107969,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -107994,7 +107995,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -108133,7 +108134,7 @@ void m68000_device::rtr_ip() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108512,7 +108513,7 @@ void m68000_device::jsr_dais_ip() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109028,7 +109029,7 @@ void m68000_device::jsr_dpci_ip() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109305,7 +109306,7 @@ void m68000_device::jmp_dais_ip() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109620,7 +109621,7 @@ void m68000_device::jmp_dpci_ip() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109714,7 +109715,7 @@ void m68000_device::addq_b_imm3_ds_ip() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -109760,7 +109761,7 @@ void m68000_device::addq_b_imm3_ais_ip() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -109786,7 +109787,7 @@ void m68000_device::addq_b_imm3_ais_ip() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109852,7 +109853,7 @@ void m68000_device::addq_b_imm3_aips_ip() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109876,7 +109877,7 @@ void m68000_device::addq_b_imm3_aips_ip() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109944,7 +109945,7 @@ void m68000_device::addq_b_imm3_pais_ip() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109968,7 +109969,7 @@ void m68000_device::addq_b_imm3_pais_ip() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110053,7 +110054,7 @@ void m68000_device::addq_b_imm3_das_ip() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110079,7 +110080,7 @@ void m68000_device::addq_b_imm3_das_ip() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110137,7 +110138,7 @@ void m68000_device::addq_b_imm3_dais_ip() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110205,7 +110206,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110231,7 +110232,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110318,7 @@ void m68000_device::addq_b_imm3_adr16_ip() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -110341,7 +110342,7 @@ void m68000_device::addq_b_imm3_adr16_ip() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110451,7 +110452,7 @@ void m68000_device::addq_b_imm3_adr32_ip() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -110475,7 +110476,7 @@ void m68000_device::addq_b_imm3_adr32_ip() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110537,7 +110538,7 @@ void m68000_device::addq_w_imm3_ds_ip() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -110585,7 +110586,7 @@ void m68000_device::addq_w_imm3_as_ip() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -110611,7 +110612,7 @@ void m68000_device::addq_w_imm3_as_ip() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -110637,7 +110638,7 @@ void m68000_device::addq_w_imm3_ais_ip() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110667,7 +110668,7 @@ void m68000_device::addq_w_imm3_ais_ip() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110739,7 +110740,7 @@ void m68000_device::addq_w_imm3_aips_ip() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110767,7 +110768,7 @@ void m68000_device::addq_w_imm3_aips_ip() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110841,7 +110842,7 @@ void m68000_device::addq_w_imm3_pais_ip() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110869,7 +110870,7 @@ void m68000_device::addq_w_imm3_pais_ip() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110960,7 +110961,7 @@ void m68000_device::addq_w_imm3_das_ip() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110990,7 +110991,7 @@ void m68000_device::addq_w_imm3_das_ip() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111054,7 +111055,7 @@ void m68000_device::addq_w_imm3_dais_ip() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111122,7 +111123,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -111152,7 +111153,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111244,7 +111245,7 @@ void m68000_device::addq_w_imm3_adr16_ip() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -111272,7 +111273,7 @@ void m68000_device::addq_w_imm3_adr16_ip() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111388,7 +111389,7 @@ void m68000_device::addq_w_imm3_adr32_ip() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111416,7 +111417,7 @@ void m68000_device::addq_w_imm3_adr32_ip() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111484,7 +111485,7 @@ void m68000_device::addq_l_imm3_ds_ip() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -111511,7 +111512,7 @@ void m68000_device::addq_l_imm3_ds_ip() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -111540,7 +111541,7 @@ void m68000_device::addq_l_imm3_as_ip() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -111566,7 +111567,7 @@ void m68000_device::addq_l_imm3_as_ip() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -111592,7 +111593,7 @@ void m68000_device::addq_l_imm3_ais_ip() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111646,7 +111647,7 @@ void m68000_device::addq_l_imm3_ais_ip() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111674,7 +111675,7 @@ void m68000_device::addq_l_imm3_ais_ip() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111738,7 +111739,7 @@ void m68000_device::addq_l_imm3_aips_ip() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111795,7 +111796,7 @@ void m68000_device::addq_l_imm3_aips_ip() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111823,7 +111824,7 @@ void m68000_device::addq_l_imm3_aips_ip() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111886,7 +111887,7 @@ void m68000_device::addq_l_imm3_pais_ip() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -111945,7 +111946,7 @@ void m68000_device::addq_l_imm3_pais_ip() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111973,7 +111974,7 @@ void m68000_device::addq_l_imm3_pais_ip() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112061,7 +112062,7 @@ void m68000_device::addq_l_imm3_das_ip() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112115,7 +112116,7 @@ void m68000_device::addq_l_imm3_das_ip() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112143,7 +112144,7 @@ void m68000_device::addq_l_imm3_das_ip() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112205,7 +112206,7 @@ void m68000_device::addq_l_imm3_dais_ip() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -112272,7 +112273,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112326,7 +112327,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112354,7 +112355,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112444,7 +112445,7 @@ void m68000_device::addq_l_imm3_adr16_ip() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112498,7 +112499,7 @@ void m68000_device::addq_l_imm3_adr16_ip() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112526,7 +112527,7 @@ void m68000_device::addq_l_imm3_adr16_ip() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112640,7 +112641,7 @@ void m68000_device::addq_l_imm3_adr32_ip() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -112694,7 +112695,7 @@ void m68000_device::addq_l_imm3_adr32_ip() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112722,7 +112723,7 @@ void m68000_device::addq_l_imm3_adr32_ip() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112788,7 +112789,7 @@ void m68000_device::st_ds_ip() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112800,7 +112801,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112831,7 +112832,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -112859,7 +112860,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112878,7 +112879,7 @@ void m68000_device::dbt_ds_rel16_ip() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112890,13 +112891,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -112927,7 +112928,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112935,7 +112936,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112962,11 +112963,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113000,13 +113001,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113040,7 +113041,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113077,11 +113078,11 @@ void m68000_device::st_ais_ip() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113103,7 +113104,7 @@ void m68000_device::st_ais_ip() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113113,7 +113114,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113140,7 +113141,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113171,7 +113172,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113205,12 +113206,12 @@ void m68000_device::st_aips_ip() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113233,7 +113234,7 @@ void m68000_device::st_aips_ip() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113243,7 +113244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113270,7 +113271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113301,7 +113302,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113334,7 +113335,7 @@ void m68000_device::st_pais_ip() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113342,7 +113343,7 @@ void m68000_device::st_pais_ip() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113365,7 +113366,7 @@ void m68000_device::st_pais_ip() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113375,7 +113376,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113402,7 +113403,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113433,7 +113434,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113464,7 +113465,7 @@ void m68000_device::st_das_ip() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113490,11 +113491,11 @@ void m68000_device::st_das_ip() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113516,7 +113517,7 @@ void m68000_device::st_das_ip() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113526,7 +113527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113553,7 +113554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113584,7 +113585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113613,14 +113614,14 @@ void m68000_device::st_dais_ip() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113628,7 +113629,7 @@ void m68000_device::st_dais_ip() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113655,7 +113656,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113684,11 +113685,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113710,7 +113711,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113720,7 +113721,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113747,7 +113748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113778,7 +113779,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113811,7 +113812,7 @@ void m68000_device::st_adr16_ip() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -113837,7 +113838,7 @@ void m68000_device::st_adr16_ip() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -113860,7 +113861,7 @@ void m68000_device::st_adr16_ip() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113870,7 +113871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113897,7 +113898,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113928,7 +113929,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113959,7 +113960,7 @@ void m68000_device::st_adr32_ip() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113986,7 +113987,7 @@ void m68000_device::st_adr32_ip() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -114012,7 +114013,7 @@ void m68000_device::st_adr32_ip() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114035,7 +114036,7 @@ void m68000_device::st_adr32_ip() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114045,7 +114046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114072,7 +114073,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -114103,7 +114104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -114136,7 +114137,7 @@ void m68000_device::subq_b_imm3_ds_ip() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -114182,7 +114183,7 @@ void m68000_device::subq_b_imm3_ais_ip() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114208,7 +114209,7 @@ void m68000_device::subq_b_imm3_ais_ip() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114274,7 +114275,7 @@ void m68000_device::subq_b_imm3_aips_ip() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114298,7 +114299,7 @@ void m68000_device::subq_b_imm3_aips_ip() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114366,7 +114367,7 @@ void m68000_device::subq_b_imm3_pais_ip() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114390,7 +114391,7 @@ void m68000_device::subq_b_imm3_pais_ip() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114475,7 +114476,7 @@ void m68000_device::subq_b_imm3_das_ip() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114501,7 +114502,7 @@ void m68000_device::subq_b_imm3_das_ip() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114559,7 +114560,7 @@ void m68000_device::subq_b_imm3_dais_ip() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -114627,7 +114628,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114653,7 +114654,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114739,7 +114740,7 @@ void m68000_device::subq_b_imm3_adr16_ip() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -114763,7 +114764,7 @@ void m68000_device::subq_b_imm3_adr16_ip() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114873,7 +114874,7 @@ void m68000_device::subq_b_imm3_adr32_ip() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114897,7 +114898,7 @@ void m68000_device::subq_b_imm3_adr32_ip() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114959,7 +114960,7 @@ void m68000_device::subq_w_imm3_ds_ip() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -115007,7 +115008,7 @@ void m68000_device::subq_w_imm3_as_ip() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115033,7 +115034,7 @@ void m68000_device::subq_w_imm3_as_ip() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -115059,7 +115060,7 @@ void m68000_device::subq_w_imm3_ais_ip() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115089,7 +115090,7 @@ void m68000_device::subq_w_imm3_ais_ip() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115161,7 +115162,7 @@ void m68000_device::subq_w_imm3_aips_ip() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115189,7 +115190,7 @@ void m68000_device::subq_w_imm3_aips_ip() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115263,7 +115264,7 @@ void m68000_device::subq_w_imm3_pais_ip() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115291,7 +115292,7 @@ void m68000_device::subq_w_imm3_pais_ip() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115382,7 +115383,7 @@ void m68000_device::subq_w_imm3_das_ip() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115412,7 +115413,7 @@ void m68000_device::subq_w_imm3_das_ip() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115476,7 +115477,7 @@ void m68000_device::subq_w_imm3_dais_ip() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -115544,7 +115545,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115574,7 +115575,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115666,7 +115667,7 @@ void m68000_device::subq_w_imm3_adr16_ip() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -115694,7 +115695,7 @@ void m68000_device::subq_w_imm3_adr16_ip() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115810,7 +115811,7 @@ void m68000_device::subq_w_imm3_adr32_ip() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -115838,7 +115839,7 @@ void m68000_device::subq_w_imm3_adr32_ip() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115906,7 +115907,7 @@ void m68000_device::subq_l_imm3_ds_ip() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -115933,7 +115934,7 @@ void m68000_device::subq_l_imm3_ds_ip() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -115962,7 +115963,7 @@ void m68000_device::subq_l_imm3_as_ip() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115988,7 +115989,7 @@ void m68000_device::subq_l_imm3_as_ip() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -116014,7 +116015,7 @@ void m68000_device::subq_l_imm3_ais_ip() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116068,7 +116069,7 @@ void m68000_device::subq_l_imm3_ais_ip() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116096,7 +116097,7 @@ void m68000_device::subq_l_imm3_ais_ip() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116160,7 +116161,7 @@ void m68000_device::subq_l_imm3_aips_ip() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116217,7 +116218,7 @@ void m68000_device::subq_l_imm3_aips_ip() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116245,7 +116246,7 @@ void m68000_device::subq_l_imm3_aips_ip() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116308,7 +116309,7 @@ void m68000_device::subq_l_imm3_pais_ip() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -116367,7 +116368,7 @@ void m68000_device::subq_l_imm3_pais_ip() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116395,7 +116396,7 @@ void m68000_device::subq_l_imm3_pais_ip() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116483,7 +116484,7 @@ void m68000_device::subq_l_imm3_das_ip() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116537,7 +116538,7 @@ void m68000_device::subq_l_imm3_das_ip() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116565,7 +116566,7 @@ void m68000_device::subq_l_imm3_das_ip() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116627,7 +116628,7 @@ void m68000_device::subq_l_imm3_dais_ip() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -116694,7 +116695,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116748,7 +116749,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116776,7 +116777,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116866,7 +116867,7 @@ void m68000_device::subq_l_imm3_adr16_ip() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116920,7 +116921,7 @@ void m68000_device::subq_l_imm3_adr16_ip() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116948,7 +116949,7 @@ void m68000_device::subq_l_imm3_adr16_ip() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117062,7 +117063,7 @@ void m68000_device::subq_l_imm3_adr32_ip() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117116,7 +117117,7 @@ void m68000_device::subq_l_imm3_adr32_ip() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117144,7 +117145,7 @@ void m68000_device::subq_l_imm3_adr32_ip() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117210,7 +117211,7 @@ void m68000_device::sf_ds_ip() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117222,7 +117223,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117253,7 +117254,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -117281,7 +117282,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117300,7 +117301,7 @@ void m68000_device::dbra_ds_rel16_ip() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117312,13 +117313,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117349,7 +117350,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117357,7 +117358,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117384,11 +117385,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117422,13 +117423,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117462,7 +117463,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117499,11 +117500,11 @@ void m68000_device::sf_ais_ip() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117525,7 +117526,7 @@ void m68000_device::sf_ais_ip() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117535,7 +117536,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117562,7 +117563,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117593,7 +117594,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117627,12 +117628,12 @@ void m68000_device::sf_aips_ip() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117655,7 +117656,7 @@ void m68000_device::sf_aips_ip() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117665,7 +117666,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117692,7 +117693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117723,7 +117724,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117756,7 +117757,7 @@ void m68000_device::sf_pais_ip() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117764,7 +117765,7 @@ void m68000_device::sf_pais_ip() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117787,7 +117788,7 @@ void m68000_device::sf_pais_ip() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117797,7 +117798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117824,7 +117825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117855,7 +117856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117886,7 +117887,7 @@ void m68000_device::sf_das_ip() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117912,11 +117913,11 @@ void m68000_device::sf_das_ip() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117938,7 +117939,7 @@ void m68000_device::sf_das_ip() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117948,7 +117949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117975,7 +117976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118006,7 +118007,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118035,14 +118036,14 @@ void m68000_device::sf_dais_ip() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118050,7 +118051,7 @@ void m68000_device::sf_dais_ip() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118077,7 +118078,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118106,11 +118107,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118132,7 +118133,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118142,7 +118143,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118169,7 +118170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118200,7 +118201,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118233,7 +118234,7 @@ void m68000_device::sf_adr16_ip() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118259,7 +118260,7 @@ void m68000_device::sf_adr16_ip() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -118282,7 +118283,7 @@ void m68000_device::sf_adr16_ip() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118319,7 +118320,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118350,7 +118351,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118381,7 +118382,7 @@ void m68000_device::sf_adr32_ip() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118408,7 +118409,7 @@ void m68000_device::sf_adr32_ip() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118434,7 +118435,7 @@ void m68000_device::sf_adr32_ip() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118457,7 +118458,7 @@ void m68000_device::sf_adr32_ip() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118467,7 +118468,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118494,7 +118495,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -118525,7 +118526,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118558,7 +118559,7 @@ void m68000_device::shi_ds_ip() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118570,7 +118571,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118601,7 +118602,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118629,7 +118630,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118648,7 +118649,7 @@ void m68000_device::dbhi_ds_rel16_ip() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118660,13 +118661,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118697,7 +118698,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118705,7 +118706,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118732,11 +118733,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118770,13 +118771,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118810,7 +118811,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118847,11 +118848,11 @@ void m68000_device::shi_ais_ip() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118873,7 +118874,7 @@ void m68000_device::shi_ais_ip() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118883,7 +118884,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118910,7 +118911,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -118941,7 +118942,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118975,12 +118976,12 @@ void m68000_device::shi_aips_ip() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119003,7 +119004,7 @@ void m68000_device::shi_aips_ip() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119013,7 +119014,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119040,7 +119041,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119071,7 +119072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119104,7 +119105,7 @@ void m68000_device::shi_pais_ip() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119112,7 +119113,7 @@ void m68000_device::shi_pais_ip() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119135,7 +119136,7 @@ void m68000_device::shi_pais_ip() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119145,7 +119146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119172,7 +119173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119203,7 +119204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119234,7 +119235,7 @@ void m68000_device::shi_das_ip() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119260,11 +119261,11 @@ void m68000_device::shi_das_ip() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119286,7 +119287,7 @@ void m68000_device::shi_das_ip() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119296,7 +119297,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119323,7 +119324,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119354,7 +119355,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119383,14 +119384,14 @@ void m68000_device::shi_dais_ip() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119398,7 +119399,7 @@ void m68000_device::shi_dais_ip() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119425,7 +119426,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119454,11 +119455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119480,7 +119481,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119490,7 +119491,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119548,7 +119549,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119581,7 +119582,7 @@ void m68000_device::shi_adr16_ip() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -119607,7 +119608,7 @@ void m68000_device::shi_adr16_ip() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -119630,7 +119631,7 @@ void m68000_device::shi_adr16_ip() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119640,7 +119641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119667,7 +119668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119698,7 +119699,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119729,7 +119730,7 @@ void m68000_device::shi_adr32_ip() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119756,7 +119757,7 @@ void m68000_device::shi_adr32_ip() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119782,7 +119783,7 @@ void m68000_device::shi_adr32_ip() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -119805,7 +119806,7 @@ void m68000_device::shi_adr32_ip() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119815,7 +119816,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119842,7 +119843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -119873,7 +119874,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119906,7 +119907,7 @@ void m68000_device::sls_ds_ip() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119918,7 +119919,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119949,7 +119950,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119977,7 +119978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119996,7 +119997,7 @@ void m68000_device::dbls_ds_rel16_ip() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -120008,13 +120009,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120045,7 +120046,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -120053,7 +120054,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120080,11 +120081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120118,13 +120119,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120158,7 +120159,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120195,11 +120196,11 @@ void m68000_device::sls_ais_ip() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120221,7 +120222,7 @@ void m68000_device::sls_ais_ip() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120231,7 +120232,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120258,7 +120259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120289,7 +120290,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120323,12 +120324,12 @@ void m68000_device::sls_aips_ip() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120351,7 +120352,7 @@ void m68000_device::sls_aips_ip() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120361,7 +120362,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120388,7 +120389,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120419,7 +120420,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120452,7 +120453,7 @@ void m68000_device::sls_pais_ip() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120460,7 +120461,7 @@ void m68000_device::sls_pais_ip() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120483,7 +120484,7 @@ void m68000_device::sls_pais_ip() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120493,7 +120494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120520,7 +120521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120551,7 +120552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120582,7 +120583,7 @@ void m68000_device::sls_das_ip() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120608,11 +120609,11 @@ void m68000_device::sls_das_ip() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120634,7 +120635,7 @@ void m68000_device::sls_das_ip() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120644,7 +120645,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120671,7 +120672,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120702,7 +120703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120731,14 +120732,14 @@ void m68000_device::sls_dais_ip() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120746,7 +120747,7 @@ void m68000_device::sls_dais_ip() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120773,7 +120774,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120802,11 +120803,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120828,7 +120829,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120838,7 +120839,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120865,7 +120866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120896,7 +120897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120929,7 +120930,7 @@ void m68000_device::sls_adr16_ip() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120955,7 +120956,7 @@ void m68000_device::sls_adr16_ip() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -120978,7 +120979,7 @@ void m68000_device::sls_adr16_ip() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120988,7 +120989,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121015,7 +121016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -121046,7 +121047,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121077,7 +121078,7 @@ void m68000_device::sls_adr32_ip() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121104,7 +121105,7 @@ void m68000_device::sls_adr32_ip() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121130,7 +121131,7 @@ void m68000_device::sls_adr32_ip() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121153,7 +121154,7 @@ void m68000_device::sls_adr32_ip() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121163,7 +121164,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121190,7 +121191,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -121221,7 +121222,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121254,7 +121255,7 @@ void m68000_device::scc_ds_ip() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -121266,7 +121267,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121297,7 +121298,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121325,7 +121326,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -121344,7 +121345,7 @@ void m68000_device::dbcc_ds_rel16_ip() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -121356,13 +121357,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -121393,7 +121394,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -121401,7 +121402,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121428,11 +121429,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121466,13 +121467,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121506,7 +121507,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121543,11 +121544,11 @@ void m68000_device::scc_ais_ip() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121569,7 +121570,7 @@ void m68000_device::scc_ais_ip() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121579,7 +121580,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121606,7 +121607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121637,7 +121638,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121671,12 +121672,12 @@ void m68000_device::scc_aips_ip() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121699,7 +121700,7 @@ void m68000_device::scc_aips_ip() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121709,7 +121710,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121736,7 +121737,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121767,7 +121768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121800,7 +121801,7 @@ void m68000_device::scc_pais_ip() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -121808,7 +121809,7 @@ void m68000_device::scc_pais_ip() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121831,7 +121832,7 @@ void m68000_device::scc_pais_ip() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121841,7 +121842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121868,7 +121869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121899,7 +121900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121930,7 +121931,7 @@ void m68000_device::scc_das_ip() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121956,11 +121957,11 @@ void m68000_device::scc_das_ip() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121982,7 +121983,7 @@ void m68000_device::scc_das_ip() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121992,7 +121993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122019,7 +122020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122050,7 +122051,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122079,14 +122080,14 @@ void m68000_device::scc_dais_ip() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -122094,7 +122095,7 @@ void m68000_device::scc_dais_ip() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122121,7 +122122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122150,11 +122151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122176,7 +122177,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122186,7 +122187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122213,7 +122214,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122244,7 +122245,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122277,7 +122278,7 @@ void m68000_device::scc_adr16_ip() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122303,7 +122304,7 @@ void m68000_device::scc_adr16_ip() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -122326,7 +122327,7 @@ void m68000_device::scc_adr16_ip() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122336,7 +122337,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122363,7 +122364,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122394,7 +122395,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122425,7 +122426,7 @@ void m68000_device::scc_adr32_ip() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122452,7 +122453,7 @@ void m68000_device::scc_adr32_ip() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122478,7 +122479,7 @@ void m68000_device::scc_adr32_ip() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -122501,7 +122502,7 @@ void m68000_device::scc_adr32_ip() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122511,7 +122512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122538,7 +122539,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -122569,7 +122570,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122602,7 +122603,7 @@ void m68000_device::scs_ds_ip() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -122614,7 +122615,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122645,7 +122646,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122673,7 +122674,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -122692,7 +122693,7 @@ void m68000_device::dbcs_ds_rel16_ip() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -122704,13 +122705,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122741,7 +122742,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -122749,7 +122750,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122776,11 +122777,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122814,13 +122815,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122854,7 +122855,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122891,11 +122892,11 @@ void m68000_device::scs_ais_ip() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122917,7 +122918,7 @@ void m68000_device::scs_ais_ip() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122927,7 +122928,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122954,7 +122955,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -122985,7 +122986,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123019,12 +123020,12 @@ void m68000_device::scs_aips_ip() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123047,7 +123048,7 @@ void m68000_device::scs_aips_ip() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123057,7 +123058,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123084,7 +123085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123115,7 +123116,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123148,7 +123149,7 @@ void m68000_device::scs_pais_ip() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -123156,7 +123157,7 @@ void m68000_device::scs_pais_ip() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123179,7 +123180,7 @@ void m68000_device::scs_pais_ip() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123189,7 +123190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123216,7 +123217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123247,7 +123248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123278,7 +123279,7 @@ void m68000_device::scs_das_ip() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123304,11 +123305,11 @@ void m68000_device::scs_das_ip() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123330,7 +123331,7 @@ void m68000_device::scs_das_ip() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123340,7 +123341,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123367,7 +123368,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123398,7 +123399,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123427,14 +123428,14 @@ void m68000_device::scs_dais_ip() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -123442,7 +123443,7 @@ void m68000_device::scs_dais_ip() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123469,7 +123470,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123498,11 +123499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123524,7 +123525,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123534,7 +123535,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123561,7 +123562,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123592,7 +123593,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123625,7 +123626,7 @@ void m68000_device::scs_adr16_ip() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -123651,7 +123652,7 @@ void m68000_device::scs_adr16_ip() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -123674,7 +123675,7 @@ void m68000_device::scs_adr16_ip() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123684,7 +123685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123711,7 +123712,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123742,7 +123743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123773,7 +123774,7 @@ void m68000_device::scs_adr32_ip() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123800,7 +123801,7 @@ void m68000_device::scs_adr32_ip() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -123826,7 +123827,7 @@ void m68000_device::scs_adr32_ip() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123849,7 +123850,7 @@ void m68000_device::scs_adr32_ip() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123859,7 +123860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123886,7 +123887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -123917,7 +123918,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123950,7 +123951,7 @@ void m68000_device::sne_ds_ip() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -123962,7 +123963,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123993,7 +123994,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -124021,7 +124022,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -124040,7 +124041,7 @@ void m68000_device::dbne_ds_rel16_ip() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -124052,13 +124053,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124089,7 +124090,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -124097,7 +124098,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124124,11 +124125,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124162,13 +124163,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124202,7 +124203,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124239,11 +124240,11 @@ void m68000_device::sne_ais_ip() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124265,7 +124266,7 @@ void m68000_device::sne_ais_ip() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124275,7 +124276,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124302,7 +124303,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124333,7 +124334,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124367,12 +124368,12 @@ void m68000_device::sne_aips_ip() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124395,7 +124396,7 @@ void m68000_device::sne_aips_ip() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124405,7 +124406,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124432,7 +124433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124463,7 +124464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124496,7 +124497,7 @@ void m68000_device::sne_pais_ip() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124504,7 +124505,7 @@ void m68000_device::sne_pais_ip() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124527,7 +124528,7 @@ void m68000_device::sne_pais_ip() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124537,7 +124538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124564,7 +124565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124595,7 +124596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124626,7 +124627,7 @@ void m68000_device::sne_das_ip() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124652,11 +124653,11 @@ void m68000_device::sne_das_ip() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124678,7 +124679,7 @@ void m68000_device::sne_das_ip() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124688,7 +124689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124715,7 +124716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124746,7 +124747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124775,14 +124776,14 @@ void m68000_device::sne_dais_ip() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124790,7 +124791,7 @@ void m68000_device::sne_dais_ip() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124817,7 +124818,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124846,11 +124847,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124872,7 +124873,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124882,7 +124883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124909,7 +124910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124940,7 +124941,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124973,7 +124974,7 @@ void m68000_device::sne_adr16_ip() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124999,7 +125000,7 @@ void m68000_device::sne_adr16_ip() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -125022,7 +125023,7 @@ void m68000_device::sne_adr16_ip() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125032,7 +125033,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125059,7 +125060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -125090,7 +125091,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125121,7 +125122,7 @@ void m68000_device::sne_adr32_ip() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125148,7 +125149,7 @@ void m68000_device::sne_adr32_ip() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125174,7 +125175,7 @@ void m68000_device::sne_adr32_ip() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125197,7 +125198,7 @@ void m68000_device::sne_adr32_ip() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125207,7 +125208,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125234,7 +125235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -125265,7 +125266,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125298,7 +125299,7 @@ void m68000_device::seq_ds_ip() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -125310,7 +125311,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125341,7 +125342,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125369,7 +125370,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125388,7 +125389,7 @@ void m68000_device::dbeq_ds_rel16_ip() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -125400,13 +125401,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -125437,7 +125438,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -125445,7 +125446,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125472,11 +125473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125510,13 +125511,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125550,7 +125551,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125587,11 +125588,11 @@ void m68000_device::seq_ais_ip() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -125613,7 +125614,7 @@ void m68000_device::seq_ais_ip() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125623,7 +125624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125650,7 +125651,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125681,7 +125682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125715,12 +125716,12 @@ void m68000_device::seq_aips_ip() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125743,7 +125744,7 @@ void m68000_device::seq_aips_ip() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125753,7 +125754,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125780,7 +125781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125811,7 +125812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125844,7 +125845,7 @@ void m68000_device::seq_pais_ip() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -125852,7 +125853,7 @@ void m68000_device::seq_pais_ip() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125875,7 +125876,7 @@ void m68000_device::seq_pais_ip() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125885,7 +125886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125912,7 +125913,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125943,7 +125944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125974,7 +125975,7 @@ void m68000_device::seq_das_ip() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126000,11 +126001,11 @@ void m68000_device::seq_das_ip() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126026,7 +126027,7 @@ void m68000_device::seq_das_ip() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126036,7 +126037,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126063,7 +126064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126094,7 +126095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126123,14 +126124,14 @@ void m68000_device::seq_dais_ip() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -126138,7 +126139,7 @@ void m68000_device::seq_dais_ip() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126165,7 +126166,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126194,11 +126195,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126220,7 +126221,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126230,7 +126231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126257,7 +126258,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126288,7 +126289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126321,7 +126322,7 @@ void m68000_device::seq_adr16_ip() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126347,7 +126348,7 @@ void m68000_device::seq_adr16_ip() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -126370,7 +126371,7 @@ void m68000_device::seq_adr16_ip() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126380,7 +126381,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126407,7 +126408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126438,7 +126439,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126469,7 +126470,7 @@ void m68000_device::seq_adr32_ip() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126496,7 +126497,7 @@ void m68000_device::seq_adr32_ip() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126522,7 +126523,7 @@ void m68000_device::seq_adr32_ip() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -126545,7 +126546,7 @@ void m68000_device::seq_adr32_ip() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126555,7 +126556,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126582,7 +126583,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -126613,7 +126614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126646,7 +126647,7 @@ void m68000_device::svc_ds_ip() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -126658,7 +126659,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126689,7 +126690,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126717,7 +126718,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126736,7 +126737,7 @@ void m68000_device::dbvc_ds_rel16_ip() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -126748,13 +126749,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126785,7 +126786,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -126793,7 +126794,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126820,11 +126821,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126858,13 +126859,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126898,7 +126899,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126935,11 +126936,11 @@ void m68000_device::svc_ais_ip() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126961,7 +126962,7 @@ void m68000_device::svc_ais_ip() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126971,7 +126972,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126998,7 +126999,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127029,7 +127030,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127063,12 +127064,12 @@ void m68000_device::svc_aips_ip() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127091,7 +127092,7 @@ void m68000_device::svc_aips_ip() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127101,7 +127102,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127128,7 +127129,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127159,7 +127160,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127192,7 +127193,7 @@ void m68000_device::svc_pais_ip() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -127200,7 +127201,7 @@ void m68000_device::svc_pais_ip() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127223,7 +127224,7 @@ void m68000_device::svc_pais_ip() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127233,7 +127234,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127260,7 +127261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127291,7 +127292,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127322,7 +127323,7 @@ void m68000_device::svc_das_ip() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127348,11 +127349,11 @@ void m68000_device::svc_das_ip() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127374,7 +127375,7 @@ void m68000_device::svc_das_ip() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127384,7 +127385,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127411,7 +127412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127442,7 +127443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127471,14 +127472,14 @@ void m68000_device::svc_dais_ip() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -127486,7 +127487,7 @@ void m68000_device::svc_dais_ip() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127513,7 +127514,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127542,11 +127543,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127568,7 +127569,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127578,7 +127579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127605,7 +127606,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127636,7 +127637,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127669,7 +127670,7 @@ void m68000_device::svc_adr16_ip() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -127695,7 +127696,7 @@ void m68000_device::svc_adr16_ip() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -127718,7 +127719,7 @@ void m68000_device::svc_adr16_ip() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127728,7 +127729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127755,7 +127756,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127786,7 +127787,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127817,7 +127818,7 @@ void m68000_device::svc_adr32_ip() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127844,7 +127845,7 @@ void m68000_device::svc_adr32_ip() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -127870,7 +127871,7 @@ void m68000_device::svc_adr32_ip() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127893,7 +127894,7 @@ void m68000_device::svc_adr32_ip() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127903,7 +127904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127930,7 +127931,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -127961,7 +127962,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127994,7 +127995,7 @@ void m68000_device::svs_ds_ip() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -128006,7 +128007,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128037,7 +128038,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -128065,7 +128066,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -128084,7 +128085,7 @@ void m68000_device::dbvs_ds_rel16_ip() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -128096,13 +128097,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -128133,7 +128134,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -128141,7 +128142,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128168,11 +128169,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128206,13 +128207,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128246,7 +128247,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128283,11 +128284,11 @@ void m68000_device::svs_ais_ip() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128309,7 +128310,7 @@ void m68000_device::svs_ais_ip() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128319,7 +128320,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128346,7 +128347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128377,7 +128378,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128411,12 +128412,12 @@ void m68000_device::svs_aips_ip() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128439,7 +128440,7 @@ void m68000_device::svs_aips_ip() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128449,7 +128450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128476,7 +128477,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128507,7 +128508,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128540,7 +128541,7 @@ void m68000_device::svs_pais_ip() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -128548,7 +128549,7 @@ void m68000_device::svs_pais_ip() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128571,7 +128572,7 @@ void m68000_device::svs_pais_ip() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128581,7 +128582,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128608,7 +128609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128639,7 +128640,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128670,7 +128671,7 @@ void m68000_device::svs_das_ip() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128696,11 +128697,11 @@ void m68000_device::svs_das_ip() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128722,7 +128723,7 @@ void m68000_device::svs_das_ip() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128732,7 +128733,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128759,7 +128760,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128790,7 +128791,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128819,14 +128820,14 @@ void m68000_device::svs_dais_ip() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -128834,7 +128835,7 @@ void m68000_device::svs_dais_ip() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128861,7 +128862,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128890,11 +128891,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128916,7 +128917,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128926,7 +128927,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128953,7 +128954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128984,7 +128985,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129017,7 +129018,7 @@ void m68000_device::svs_adr16_ip() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129043,7 +129044,7 @@ void m68000_device::svs_adr16_ip() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -129066,7 +129067,7 @@ void m68000_device::svs_adr16_ip() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129076,7 +129077,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129103,7 +129104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -129134,7 +129135,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129165,7 +129166,7 @@ void m68000_device::svs_adr32_ip() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129192,7 +129193,7 @@ void m68000_device::svs_adr32_ip() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129218,7 +129219,7 @@ void m68000_device::svs_adr32_ip() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129241,7 +129242,7 @@ void m68000_device::svs_adr32_ip() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129251,7 +129252,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129278,7 +129279,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -129309,7 +129310,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129342,7 +129343,7 @@ void m68000_device::spl_ds_ip() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -129354,7 +129355,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129385,7 +129386,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129413,7 +129414,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -129432,7 +129433,7 @@ void m68000_device::dbpl_ds_rel16_ip() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -129444,13 +129445,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129481,7 +129482,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -129489,7 +129490,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129516,11 +129517,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129554,13 +129555,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129594,7 +129595,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129631,11 +129632,11 @@ void m68000_device::spl_ais_ip() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -129657,7 +129658,7 @@ void m68000_device::spl_ais_ip() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129667,7 +129668,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129694,7 +129695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129725,7 +129726,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129759,12 +129760,12 @@ void m68000_device::spl_aips_ip() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129787,7 +129788,7 @@ void m68000_device::spl_aips_ip() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129797,7 +129798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129824,7 +129825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129855,7 +129856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129888,7 +129889,7 @@ void m68000_device::spl_pais_ip() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -129896,7 +129897,7 @@ void m68000_device::spl_pais_ip() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129919,7 +129920,7 @@ void m68000_device::spl_pais_ip() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129929,7 +129930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129956,7 +129957,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129987,7 +129988,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130018,7 +130019,7 @@ void m68000_device::spl_das_ip() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130044,11 +130045,11 @@ void m68000_device::spl_das_ip() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130070,7 +130071,7 @@ void m68000_device::spl_das_ip() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130080,7 +130081,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130107,7 +130108,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130138,7 +130139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130167,14 +130168,14 @@ void m68000_device::spl_dais_ip() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -130182,7 +130183,7 @@ void m68000_device::spl_dais_ip() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130209,7 +130210,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130238,11 +130239,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130264,7 +130265,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130274,7 +130275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130301,7 +130302,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130332,7 +130333,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130365,7 +130366,7 @@ void m68000_device::spl_adr16_ip() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130391,7 +130392,7 @@ void m68000_device::spl_adr16_ip() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -130414,7 +130415,7 @@ void m68000_device::spl_adr16_ip() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130424,7 +130425,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130451,7 +130452,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130482,7 +130483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130513,7 +130514,7 @@ void m68000_device::spl_adr32_ip() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130540,7 +130541,7 @@ void m68000_device::spl_adr32_ip() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130566,7 +130567,7 @@ void m68000_device::spl_adr32_ip() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130589,7 +130590,7 @@ void m68000_device::spl_adr32_ip() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130599,7 +130600,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130626,7 +130627,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -130657,7 +130658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130690,7 +130691,7 @@ void m68000_device::smi_ds_ip() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130702,7 +130703,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130733,7 +130734,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130761,7 +130762,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130780,7 +130781,7 @@ void m68000_device::dbmi_ds_rel16_ip() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130792,13 +130793,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130829,7 +130830,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130837,7 +130838,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130864,11 +130865,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130902,13 +130903,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130942,7 +130943,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130979,11 +130980,11 @@ void m68000_device::smi_ais_ip() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131005,7 +131006,7 @@ void m68000_device::smi_ais_ip() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131015,7 +131016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131042,7 +131043,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131073,7 +131074,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131107,12 +131108,12 @@ void m68000_device::smi_aips_ip() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131135,7 +131136,7 @@ void m68000_device::smi_aips_ip() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131145,7 +131146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131172,7 +131173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131203,7 +131204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131236,7 +131237,7 @@ void m68000_device::smi_pais_ip() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131244,7 +131245,7 @@ void m68000_device::smi_pais_ip() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131267,7 +131268,7 @@ void m68000_device::smi_pais_ip() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131277,7 +131278,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131304,7 +131305,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131335,7 +131336,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131366,7 +131367,7 @@ void m68000_device::smi_das_ip() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131392,11 +131393,11 @@ void m68000_device::smi_das_ip() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131418,7 +131419,7 @@ void m68000_device::smi_das_ip() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131428,7 +131429,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131455,7 +131456,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131486,7 +131487,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131515,14 +131516,14 @@ void m68000_device::smi_dais_ip() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131530,7 +131531,7 @@ void m68000_device::smi_dais_ip() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131557,7 +131558,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131586,11 +131587,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131612,7 +131613,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131622,7 +131623,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131649,7 +131650,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131680,7 +131681,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131713,7 +131714,7 @@ void m68000_device::smi_adr16_ip() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131739,7 +131740,7 @@ void m68000_device::smi_adr16_ip() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -131762,7 +131763,7 @@ void m68000_device::smi_adr16_ip() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131772,7 +131773,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131799,7 +131800,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131830,7 +131831,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131861,7 +131862,7 @@ void m68000_device::smi_adr32_ip() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131888,7 +131889,7 @@ void m68000_device::smi_adr32_ip() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -131914,7 +131915,7 @@ void m68000_device::smi_adr32_ip() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -131937,7 +131938,7 @@ void m68000_device::smi_adr32_ip() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131947,7 +131948,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131974,7 +131975,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -132005,7 +132006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132038,7 +132039,7 @@ void m68000_device::sge_ds_ip() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -132050,7 +132051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132081,7 +132082,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -132109,7 +132110,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -132128,7 +132129,7 @@ void m68000_device::dbge_ds_rel16_ip() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -132140,13 +132141,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -132177,7 +132178,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -132185,7 +132186,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132212,11 +132213,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132250,13 +132251,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132290,7 +132291,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132327,11 +132328,11 @@ void m68000_device::sge_ais_ip() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132353,7 +132354,7 @@ void m68000_device::sge_ais_ip() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132363,7 +132364,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132390,7 +132391,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132421,7 +132422,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132455,12 +132456,12 @@ void m68000_device::sge_aips_ip() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132483,7 +132484,7 @@ void m68000_device::sge_aips_ip() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132493,7 +132494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132520,7 +132521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132551,7 +132552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132584,7 +132585,7 @@ void m68000_device::sge_pais_ip() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132592,7 +132593,7 @@ void m68000_device::sge_pais_ip() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132615,7 +132616,7 @@ void m68000_device::sge_pais_ip() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132625,7 +132626,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132652,7 +132653,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132683,7 +132684,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132714,7 +132715,7 @@ void m68000_device::sge_das_ip() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132740,11 +132741,11 @@ void m68000_device::sge_das_ip() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132766,7 +132767,7 @@ void m68000_device::sge_das_ip() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132776,7 +132777,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132803,7 +132804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -132834,7 +132835,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132863,14 +132864,14 @@ void m68000_device::sge_dais_ip() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132878,7 +132879,7 @@ void m68000_device::sge_dais_ip() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132905,7 +132906,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132934,11 +132935,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132960,7 +132961,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132970,7 +132971,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132997,7 +132998,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133028,7 +133029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133061,7 +133062,7 @@ void m68000_device::sge_adr16_ip() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133087,7 +133088,7 @@ void m68000_device::sge_adr16_ip() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -133110,7 +133111,7 @@ void m68000_device::sge_adr16_ip() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133120,7 +133121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133147,7 +133148,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133178,7 +133179,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133209,7 +133210,7 @@ void m68000_device::sge_adr32_ip() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133236,7 +133237,7 @@ void m68000_device::sge_adr32_ip() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133262,7 +133263,7 @@ void m68000_device::sge_adr32_ip() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -133285,7 +133286,7 @@ void m68000_device::sge_adr32_ip() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133295,7 +133296,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133322,7 +133323,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -133353,7 +133354,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133386,7 +133387,7 @@ void m68000_device::slt_ds_ip() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -133398,7 +133399,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133429,7 +133430,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133457,7 +133458,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -133476,7 +133477,7 @@ void m68000_device::dblt_ds_rel16_ip() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -133488,13 +133489,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133525,7 +133526,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -133533,7 +133534,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133560,11 +133561,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133598,13 +133599,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133638,7 +133639,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133675,11 +133676,11 @@ void m68000_device::slt_ais_ip() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -133701,7 +133702,7 @@ void m68000_device::slt_ais_ip() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133711,7 +133712,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133738,7 +133739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133769,7 +133770,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133803,12 +133804,12 @@ void m68000_device::slt_aips_ip() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133831,7 +133832,7 @@ void m68000_device::slt_aips_ip() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133841,7 +133842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133868,7 +133869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133899,7 +133900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133932,7 +133933,7 @@ void m68000_device::slt_pais_ip() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -133940,7 +133941,7 @@ void m68000_device::slt_pais_ip() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133963,7 +133964,7 @@ void m68000_device::slt_pais_ip() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133973,7 +133974,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134000,7 +134001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -134031,7 +134032,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134062,7 +134063,7 @@ void m68000_device::slt_das_ip() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134088,11 +134089,11 @@ void m68000_device::slt_das_ip() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134114,7 +134115,7 @@ void m68000_device::slt_das_ip() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134124,7 +134125,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134151,7 +134152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134182,7 +134183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134211,14 +134212,14 @@ void m68000_device::slt_dais_ip() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -134226,7 +134227,7 @@ void m68000_device::slt_dais_ip() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134253,7 +134254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134282,11 +134283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134308,7 +134309,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134318,7 +134319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134345,7 +134346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134376,7 +134377,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134409,7 +134410,7 @@ void m68000_device::slt_adr16_ip() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134435,7 +134436,7 @@ void m68000_device::slt_adr16_ip() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -134458,7 +134459,7 @@ void m68000_device::slt_adr16_ip() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134468,7 +134469,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134495,7 +134496,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134526,7 +134527,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134557,7 +134558,7 @@ void m68000_device::slt_adr32_ip() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134584,7 +134585,7 @@ void m68000_device::slt_adr32_ip() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134610,7 +134611,7 @@ void m68000_device::slt_adr32_ip() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -134633,7 +134634,7 @@ void m68000_device::slt_adr32_ip() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134643,7 +134644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134670,7 +134671,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -134701,7 +134702,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134734,7 +134735,7 @@ void m68000_device::sgt_ds_ip() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -134746,7 +134747,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134777,7 +134778,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134805,7 +134806,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -134824,7 +134825,7 @@ void m68000_device::dbgt_ds_rel16_ip() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -134836,13 +134837,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134873,7 +134874,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -134881,7 +134882,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134908,11 +134909,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134946,13 +134947,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134986,7 +134987,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135023,11 +135024,11 @@ void m68000_device::sgt_ais_ip() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135049,7 +135050,7 @@ void m68000_device::sgt_ais_ip() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135059,7 +135060,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135086,7 +135087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135117,7 +135118,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135151,12 +135152,12 @@ void m68000_device::sgt_aips_ip() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135179,7 +135180,7 @@ void m68000_device::sgt_aips_ip() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135189,7 +135190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135216,7 +135217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135247,7 +135248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135280,7 +135281,7 @@ void m68000_device::sgt_pais_ip() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135288,7 +135289,7 @@ void m68000_device::sgt_pais_ip() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135311,7 +135312,7 @@ void m68000_device::sgt_pais_ip() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135321,7 +135322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135348,7 +135349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135379,7 +135380,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135410,7 +135411,7 @@ void m68000_device::sgt_das_ip() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135436,11 +135437,11 @@ void m68000_device::sgt_das_ip() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135462,7 +135463,7 @@ void m68000_device::sgt_das_ip() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135472,7 +135473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135499,7 +135500,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135530,7 +135531,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135559,14 +135560,14 @@ void m68000_device::sgt_dais_ip() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135574,7 +135575,7 @@ void m68000_device::sgt_dais_ip() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135601,7 +135602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135630,11 +135631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135656,7 +135657,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135666,7 +135667,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135693,7 +135694,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135724,7 +135725,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135757,7 +135758,7 @@ void m68000_device::sgt_adr16_ip() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135783,7 +135784,7 @@ void m68000_device::sgt_adr16_ip() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -135806,7 +135807,7 @@ void m68000_device::sgt_adr16_ip() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135816,7 +135817,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135843,7 +135844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135874,7 +135875,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135905,7 +135906,7 @@ void m68000_device::sgt_adr32_ip() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135932,7 +135933,7 @@ void m68000_device::sgt_adr32_ip() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -135958,7 +135959,7 @@ void m68000_device::sgt_adr32_ip() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135981,7 +135982,7 @@ void m68000_device::sgt_adr32_ip() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135991,7 +135992,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136018,7 +136019,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -136049,7 +136050,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136082,7 +136083,7 @@ void m68000_device::sle_ds_ip() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -136094,7 +136095,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136125,7 +136126,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -136153,7 +136154,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -136172,7 +136173,7 @@ void m68000_device::dble_ds_rel16_ip() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -136184,13 +136185,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136221,7 +136222,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -136229,7 +136230,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136256,11 +136257,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136294,13 +136295,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136334,7 +136335,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136371,11 +136372,11 @@ void m68000_device::sle_ais_ip() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136397,7 +136398,7 @@ void m68000_device::sle_ais_ip() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136407,7 +136408,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136434,7 +136435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136465,7 +136466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136499,12 +136500,12 @@ void m68000_device::sle_aips_ip() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136527,7 +136528,7 @@ void m68000_device::sle_aips_ip() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136537,7 +136538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136564,7 +136565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136595,7 +136596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136628,7 +136629,7 @@ void m68000_device::sle_pais_ip() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136636,7 +136637,7 @@ void m68000_device::sle_pais_ip() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136659,7 +136660,7 @@ void m68000_device::sle_pais_ip() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136669,7 +136670,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136696,7 +136697,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136727,7 +136728,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136758,7 +136759,7 @@ void m68000_device::sle_das_ip() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136784,11 +136785,11 @@ void m68000_device::sle_das_ip() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136810,7 +136811,7 @@ void m68000_device::sle_das_ip() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136820,7 +136821,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136847,7 +136848,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -136878,7 +136879,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136907,14 +136908,14 @@ void m68000_device::sle_dais_ip() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136922,7 +136923,7 @@ void m68000_device::sle_dais_ip() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136949,7 +136950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136978,11 +136979,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -137004,7 +137005,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137014,7 +137015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137041,7 +137042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137072,7 +137073,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137105,7 +137106,7 @@ void m68000_device::sle_adr16_ip() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137131,7 +137132,7 @@ void m68000_device::sle_adr16_ip() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -137154,7 +137155,7 @@ void m68000_device::sle_adr16_ip() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137164,7 +137165,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137191,7 +137192,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137222,7 +137223,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137253,7 +137254,7 @@ void m68000_device::sle_adr32_ip() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137280,7 +137281,7 @@ void m68000_device::sle_adr32_ip() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -137306,7 +137307,7 @@ void m68000_device::sle_adr32_ip() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137329,7 +137330,7 @@ void m68000_device::sle_adr32_ip() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137339,7 +137340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137366,7 +137367,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -137397,7 +137398,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137627,7 +137628,7 @@ void m68000_device::bsr_rel16_ip() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -137750,7 +137751,7 @@ void m68000_device::bsr_rel8_ip() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -140690,7 +140691,7 @@ void m68000_device::moveq_imm8o_dd_ip() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -140737,7 +140738,7 @@ void m68000_device::or_b_ds_dd_ip() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140745,7 +140746,7 @@ void m68000_device::or_b_ds_dd_ip() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140785,11 +140786,11 @@ void m68000_device::or_b_ais_dd_ip() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140811,7 +140812,7 @@ void m68000_device::or_b_ais_dd_ip() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140819,7 +140820,7 @@ void m68000_device::or_b_ais_dd_ip() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140862,12 +140863,12 @@ void m68000_device::or_b_aips_dd_ip() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140890,7 +140891,7 @@ void m68000_device::or_b_aips_dd_ip() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140898,7 +140899,7 @@ void m68000_device::or_b_aips_dd_ip() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140940,7 +140941,7 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140948,7 +140949,7 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140971,7 +140972,7 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140979,7 +140980,7 @@ void m68000_device::or_b_pais_dd_ip() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141019,7 +141020,7 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141045,11 +141046,11 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141071,7 +141072,7 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141079,7 +141080,7 @@ void m68000_device::or_b_das_dd_ip() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141117,14 +141118,14 @@ void m68000_device::or_b_dais_dd_ip() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141132,7 +141133,7 @@ void m68000_device::or_b_dais_dd_ip() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141159,7 +141160,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141188,11 +141189,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141214,7 +141215,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141222,7 +141223,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141264,7 +141265,7 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -141290,7 +141291,7 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -141313,7 +141314,7 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141321,7 +141322,7 @@ void m68000_device::or_b_adr16_dd_ip() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141361,7 +141362,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141388,7 +141389,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -141414,7 +141415,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -141437,7 +141438,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141445,7 +141446,7 @@ void m68000_device::or_b_adr32_dd_ip() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141484,7 +141485,7 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141510,11 +141511,11 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141536,7 +141537,7 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141544,7 +141545,7 @@ void m68000_device::or_b_dpc_dd_ip() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141581,14 +141582,14 @@ void m68000_device::or_b_dpci_dd_ip() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141596,7 +141597,7 @@ void m68000_device::or_b_dpci_dd_ip() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141623,7 +141624,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141652,11 +141653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141678,7 +141679,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141686,7 +141687,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141728,7 +141729,7 @@ void m68000_device::or_b_imm8_dd_ip() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141755,7 +141756,7 @@ void m68000_device::or_b_imm8_dd_ip() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141763,7 +141764,7 @@ void m68000_device::or_b_imm8_dd_ip() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141805,7 +141806,7 @@ void m68000_device::or_w_ds_dd_ip() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141813,7 +141814,7 @@ void m68000_device::or_w_ds_dd_ip() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141853,11 +141854,11 @@ void m68000_device::or_w_ais_dd_ip() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141883,7 +141884,7 @@ void m68000_device::or_w_ais_dd_ip() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141891,7 +141892,7 @@ void m68000_device::or_w_ais_dd_ip() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141934,12 +141935,12 @@ void m68000_device::or_w_aips_dd_ip() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -141966,7 +141967,7 @@ void m68000_device::or_w_aips_dd_ip() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141974,7 +141975,7 @@ void m68000_device::or_w_aips_dd_ip() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142016,7 +142017,7 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142024,7 +142025,7 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142051,7 +142052,7 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142059,7 +142060,7 @@ void m68000_device::or_w_pais_dd_ip() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142099,7 +142100,7 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142125,11 +142126,11 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142155,7 +142156,7 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142163,7 +142164,7 @@ void m68000_device::or_w_das_dd_ip() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142201,14 +142202,14 @@ void m68000_device::or_w_dais_dd_ip() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142216,7 +142217,7 @@ void m68000_device::or_w_dais_dd_ip() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142243,7 +142244,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142272,11 +142273,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142302,7 +142303,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142310,7 +142311,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142352,7 +142353,7 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -142378,7 +142379,7 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -142405,7 +142406,7 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142413,7 +142414,7 @@ void m68000_device::or_w_adr16_dd_ip() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142453,7 +142454,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142480,7 +142481,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -142506,7 +142507,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -142533,7 +142534,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142541,7 +142542,7 @@ void m68000_device::or_w_adr32_dd_ip() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142580,7 +142581,7 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142606,11 +142607,11 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142636,7 +142637,7 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142644,7 +142645,7 @@ void m68000_device::or_w_dpc_dd_ip() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142681,14 +142682,14 @@ void m68000_device::or_w_dpci_dd_ip() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142696,7 +142697,7 @@ void m68000_device::or_w_dpci_dd_ip() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142723,7 +142724,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142752,11 +142753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142782,7 +142783,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142790,7 +142791,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142832,7 +142833,7 @@ void m68000_device::or_w_imm16_dd_ip() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142859,7 +142860,7 @@ void m68000_device::or_w_imm16_dd_ip() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142867,7 +142868,7 @@ void m68000_device::or_w_imm16_dd_ip() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142909,12 +142910,12 @@ void m68000_device::or_l_ds_dd_ip() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142937,7 +142938,7 @@ void m68000_device::or_l_ds_dd_ip() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -142946,7 +142947,7 @@ void m68000_device::or_l_ds_dd_ip() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142966,7 +142967,7 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142994,7 +142995,7 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143020,12 +143021,12 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143054,7 +143055,7 @@ void m68000_device::or_l_ais_dd_ip() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143074,7 +143075,7 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143102,11 +143103,11 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143132,12 +143133,12 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143166,7 +143167,7 @@ void m68000_device::or_l_aips_dd_ip() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143185,14 +143186,14 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143219,7 +143220,7 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143245,12 +143246,12 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143279,7 +143280,7 @@ void m68000_device::or_l_pais_dd_ip() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143299,7 +143300,7 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143324,7 +143325,7 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143352,7 +143353,7 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143378,12 +143379,12 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143412,7 +143413,7 @@ void m68000_device::or_l_das_dd_ip() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143430,14 +143431,14 @@ void m68000_device::or_l_dais_dd_ip() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -143445,7 +143446,7 @@ void m68000_device::or_l_dais_dd_ip() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143472,7 +143473,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143500,7 +143501,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143528,7 +143529,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143554,12 +143555,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143588,7 +143589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143610,7 +143611,7 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -143636,7 +143637,7 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143664,7 +143665,7 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143690,12 +143691,12 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143724,7 +143725,7 @@ void m68000_device::or_l_adr16_dd_ip() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143744,7 +143745,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143771,7 +143772,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143797,7 +143798,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -143825,7 +143826,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143851,12 +143852,12 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143885,7 +143886,7 @@ void m68000_device::or_l_adr32_dd_ip() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143904,7 +143905,7 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143929,7 +143930,7 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143957,7 +143958,7 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143983,12 +143984,12 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144017,7 +144018,7 @@ void m68000_device::or_l_dpc_dd_ip() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144034,14 +144035,14 @@ void m68000_device::or_l_dpci_dd_ip() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -144049,7 +144050,7 @@ void m68000_device::or_l_dpci_dd_ip() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144076,7 +144077,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144104,7 +144105,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -144132,7 +144133,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144158,12 +144159,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144192,7 +144193,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144212,7 +144213,7 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144239,7 +144240,7 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144266,12 +144267,12 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144294,7 +144295,7 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -144303,7 +144304,7 @@ void m68000_device::or_l_imm32_dd_ip() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144325,13 +144326,13 @@ void m68000_device::divu_w_ds_dd_ip() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144344,7 +144345,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144362,7 +144363,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144370,7 +144371,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -144398,7 +144399,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144424,7 +144425,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144561,7 +144562,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144595,7 +144596,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144606,7 +144607,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144618,7 +144619,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144638,7 +144639,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -144649,7 +144650,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144659,13 +144660,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144676,7 +144677,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -144686,7 +144687,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -144694,7 +144695,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144736,7 +144737,7 @@ void m68000_device::divu_w_ais_dd_ip() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144765,13 +144766,13 @@ void m68000_device::divu_w_ais_dd_ip() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144784,7 +144785,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144802,7 +144803,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144810,7 +144811,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144838,7 +144839,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144864,7 +144865,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145001,7 +145002,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145035,7 +145036,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145046,7 +145047,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145058,7 +145059,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145078,7 +145079,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145089,7 +145090,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145099,13 +145100,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145116,7 +145117,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145126,7 +145127,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145134,7 +145135,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145182,7 +145183,7 @@ void m68000_device::divu_w_aips_dd_ip() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145209,13 +145210,13 @@ void m68000_device::divu_w_aips_dd_ip() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145228,7 +145229,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145246,7 +145247,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145254,7 +145255,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145282,7 +145283,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145308,7 +145309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145445,7 +145446,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145479,7 +145480,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145490,7 +145491,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145502,7 +145503,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145522,7 +145523,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145533,7 +145534,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145543,13 +145544,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145560,7 +145561,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145570,7 +145571,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145578,7 +145579,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145628,7 +145629,7 @@ void m68000_device::divu_w_pais_dd_ip() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145655,13 +145656,13 @@ void m68000_device::divu_w_pais_dd_ip() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145674,7 +145675,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145692,7 +145693,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145700,7 +145701,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145728,7 +145729,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145754,7 +145755,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145891,7 +145892,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145925,7 +145926,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145936,7 +145937,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145948,7 +145949,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145968,7 +145969,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145979,7 +145980,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145989,13 +145990,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146006,7 +146007,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146016,7 +146017,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146024,7 +146025,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146091,7 +146092,7 @@ void m68000_device::divu_w_das_dd_ip() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146120,13 +146121,13 @@ void m68000_device::divu_w_das_dd_ip() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146139,7 +146140,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146157,7 +146158,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146165,7 +146166,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146193,7 +146194,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146219,7 +146220,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146356,7 +146357,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146390,7 +146391,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146401,7 +146402,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146413,7 +146414,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146433,7 +146434,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146444,7 +146445,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146454,13 +146455,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146471,7 +146472,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146481,7 +146482,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146489,7 +146490,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146529,7 +146530,7 @@ void m68000_device::divu_w_dais_dd_ip() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146597,7 +146598,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146626,13 +146627,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146645,7 +146646,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146663,7 +146664,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146671,7 +146672,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146699,7 +146700,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146725,7 +146726,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146862,7 +146863,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146896,7 +146897,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146907,7 +146908,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146919,7 +146920,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146939,7 +146940,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146950,7 +146951,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146960,13 +146961,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146977,7 +146978,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146987,7 +146988,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146995,7 +146996,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147063,7 +147064,7 @@ void m68000_device::divu_w_adr16_dd_ip() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -147090,13 +147091,13 @@ void m68000_device::divu_w_adr16_dd_ip() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147109,7 +147110,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147127,7 +147128,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147135,7 +147136,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -147163,7 +147164,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147189,7 +147190,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147326,7 +147327,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147360,7 +147361,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147371,7 +147372,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147383,7 +147384,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147403,7 +147404,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147414,7 +147415,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147424,13 +147425,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147441,7 +147442,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147451,7 +147452,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147459,7 +147460,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147551,7 +147552,7 @@ void m68000_device::divu_w_adr32_dd_ip() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147578,13 +147579,13 @@ void m68000_device::divu_w_adr32_dd_ip() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147597,7 +147598,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147615,7 +147616,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147623,7 +147624,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147651,7 +147652,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147677,7 +147678,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -147814,7 +147815,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147848,7 +147849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147859,7 +147860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147871,7 +147872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147891,7 +147892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147902,7 +147903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147912,13 +147913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147929,7 +147930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147939,7 +147940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147947,7 +147948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148013,7 +148014,7 @@ void m68000_device::divu_w_dpc_dd_ip() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148042,13 +148043,13 @@ void m68000_device::divu_w_dpc_dd_ip() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148061,7 +148062,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148079,7 +148080,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148087,7 +148088,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148115,7 +148116,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148141,7 +148142,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148278,7 +148279,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148312,7 +148313,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148323,7 +148324,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148335,7 +148336,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148355,7 +148356,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148366,7 +148367,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148376,13 +148377,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148393,7 +148394,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148403,7 +148404,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148411,7 +148412,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148450,7 +148451,7 @@ void m68000_device::divu_w_dpci_dd_ip() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148518,7 +148519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148547,13 +148548,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148566,7 +148567,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148584,7 +148585,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148592,7 +148593,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148620,7 +148621,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148646,7 +148647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148783,7 +148784,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148817,7 +148818,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148828,7 +148829,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148840,7 +148841,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148860,7 +148861,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148871,7 +148872,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148881,13 +148882,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148898,7 +148899,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148908,7 +148909,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148916,7 +148917,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148986,13 +148987,13 @@ void m68000_device::divu_w_imm16_dd_ip() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -149005,7 +149006,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149023,7 +149024,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -149031,7 +149032,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -149059,7 +149060,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -149085,7 +149086,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -149222,7 +149223,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149256,7 +149257,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149267,7 +149268,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149279,7 +149280,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149299,7 +149300,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -149310,7 +149311,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149320,13 +149321,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149337,7 +149338,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -149347,7 +149348,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -149355,7 +149356,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149399,12 +149400,12 @@ void m68000_device::sbcd_ds_dd_ip() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149456,7 +149457,7 @@ void m68000_device::sbcd_pais_paid_ip() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -149500,12 +149501,12 @@ void m68000_device::sbcd_pais_paid_ip() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149564,11 +149565,11 @@ void m68000_device::or_b_dd_ais_ip() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149590,7 +149591,7 @@ void m68000_device::or_b_dd_ais_ip() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149620,7 +149621,7 @@ void m68000_device::or_b_dd_ais_ip() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149655,12 +149656,12 @@ void m68000_device::or_b_dd_aips_ip() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149683,7 +149684,7 @@ void m68000_device::or_b_dd_aips_ip() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149713,7 +149714,7 @@ void m68000_device::or_b_dd_aips_ip() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149747,7 +149748,7 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149755,7 +149756,7 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149778,7 +149779,7 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149808,7 +149809,7 @@ void m68000_device::or_b_dd_pais_ip() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149840,7 +149841,7 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149866,11 +149867,11 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149892,7 +149893,7 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149922,7 +149923,7 @@ void m68000_device::or_b_dd_das_ip() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149952,14 +149953,14 @@ void m68000_device::or_b_dd_dais_ip() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149967,7 +149968,7 @@ void m68000_device::or_b_dd_dais_ip() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149994,7 +149995,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150023,11 +150024,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -150049,7 +150050,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150079,7 +150080,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150113,7 +150114,7 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150139,7 +150140,7 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -150162,7 +150163,7 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150192,7 +150193,7 @@ void m68000_device::or_b_dd_adr16_ip() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150224,7 +150225,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150251,7 +150252,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -150277,7 +150278,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150300,7 +150301,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150330,7 +150331,7 @@ void m68000_device::or_b_dd_adr32_ip() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150362,11 +150363,11 @@ void m68000_device::or_w_dd_ais_ip() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150392,7 +150393,7 @@ void m68000_device::or_w_dd_ais_ip() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150422,7 +150423,7 @@ void m68000_device::or_w_dd_ais_ip() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150463,12 +150464,12 @@ void m68000_device::or_w_dd_aips_ip() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150495,7 +150496,7 @@ void m68000_device::or_w_dd_aips_ip() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150525,7 +150526,7 @@ void m68000_device::or_w_dd_aips_ip() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150565,7 +150566,7 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150573,7 +150574,7 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150600,7 +150601,7 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150630,7 +150631,7 @@ void m68000_device::or_w_dd_pais_ip() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150668,7 +150669,7 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150694,11 +150695,11 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150724,7 +150725,7 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150754,7 +150755,7 @@ void m68000_device::or_w_dd_das_ip() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150790,14 +150791,14 @@ void m68000_device::or_w_dd_dais_ip() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -150805,7 +150806,7 @@ void m68000_device::or_w_dd_dais_ip() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150832,7 +150833,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150861,11 +150862,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150891,7 +150892,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150921,7 +150922,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150961,7 +150962,7 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150987,7 +150988,7 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151014,7 +151015,7 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151044,7 +151045,7 @@ void m68000_device::or_w_dd_adr16_ip() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151082,7 +151083,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151109,7 +151110,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -151135,7 +151136,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -151162,7 +151163,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151192,7 +151193,7 @@ void m68000_device::or_w_dd_adr32_ip() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151230,7 +151231,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151258,7 +151259,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151284,7 +151285,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151312,7 +151313,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151340,7 +151341,7 @@ void m68000_device::or_l_dd_ais_ip() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151378,7 +151379,7 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151406,11 +151407,11 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151436,7 +151437,7 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151464,7 +151465,7 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151492,7 +151493,7 @@ void m68000_device::or_l_dd_aips_ip() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151529,14 +151530,14 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151563,7 +151564,7 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151589,7 +151590,7 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151617,7 +151618,7 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151645,7 +151646,7 @@ void m68000_device::or_l_dd_pais_ip() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151683,7 +151684,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151708,7 +151709,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151736,7 +151737,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151762,7 +151763,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151790,7 +151791,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151818,7 +151819,7 @@ void m68000_device::or_l_dd_das_ip() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151854,14 +151855,14 @@ void m68000_device::or_l_dd_dais_ip() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -151869,7 +151870,7 @@ void m68000_device::or_l_dd_dais_ip() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151896,7 +151897,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151924,7 +151925,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151952,7 +151953,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151978,7 +151979,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152006,7 +152007,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152034,7 +152035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152074,7 +152075,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152100,7 +152101,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -152128,7 +152129,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152154,7 +152155,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152182,7 +152183,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152210,7 +152211,7 @@ void m68000_device::or_l_dd_adr16_ip() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152248,7 +152249,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -152275,7 +152276,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -152301,7 +152302,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152329,7 +152330,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152355,7 +152356,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152383,7 +152384,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152411,7 +152412,7 @@ void m68000_device::or_l_dd_adr32_ip() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152451,13 +152452,13 @@ void m68000_device::divs_w_ds_dd_ip() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152471,7 +152472,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152481,7 +152482,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152496,7 +152497,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -152504,7 +152505,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -152532,7 +152533,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -152558,7 +152559,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -152690,7 +152691,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -152699,7 +152700,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -152707,12 +152708,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152720,7 +152721,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152737,7 +152738,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -152745,7 +152746,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152779,7 +152780,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152806,13 +152807,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152820,27 +152821,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152852,7 +152853,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152864,7 +152865,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152879,7 +152880,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152888,7 +152889,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152896,7 +152897,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152906,7 +152907,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152915,7 +152916,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152927,7 +152928,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152979,7 +152980,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -152995,7 +152996,7 @@ void m68000_device::divs_w_ais_dd_ip() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -153024,13 +153025,13 @@ void m68000_device::divs_w_ais_dd_ip() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153044,7 +153045,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153054,7 +153055,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153069,7 +153070,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153077,7 +153078,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153105,7 +153106,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153131,7 +153132,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153263,7 +153264,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153272,7 +153273,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153280,12 +153281,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153293,7 +153294,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153310,7 +153311,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153318,7 +153319,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153352,7 +153353,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153379,13 +153380,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153393,27 +153394,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153425,7 +153426,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153437,7 +153438,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153452,7 +153453,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153461,7 +153462,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153469,7 +153470,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153479,7 +153480,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153488,7 +153489,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153500,7 +153501,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153552,7 +153553,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -153574,7 +153575,7 @@ void m68000_device::divs_w_aips_dd_ip() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153601,13 +153602,13 @@ void m68000_device::divs_w_aips_dd_ip() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153621,7 +153622,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153631,7 +153632,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153646,7 +153647,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153654,7 +153655,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153682,7 +153683,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153708,7 +153709,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153840,7 +153841,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153849,7 +153850,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153857,12 +153858,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153870,7 +153871,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153887,7 +153888,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153895,7 +153896,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153929,7 +153930,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153956,13 +153957,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153970,27 +153971,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154002,7 +154003,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154014,7 +154015,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154029,7 +154030,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154038,7 +154039,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154046,7 +154047,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154056,7 +154057,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154065,7 +154066,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154077,7 +154078,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154129,7 +154130,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154153,7 +154154,7 @@ void m68000_device::divs_w_pais_dd_ip() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154180,13 +154181,13 @@ void m68000_device::divs_w_pais_dd_ip() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154200,7 +154201,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154210,7 +154211,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154225,7 +154226,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154233,7 +154234,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -154261,7 +154262,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154287,7 +154288,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154419,7 +154420,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -154428,7 +154429,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -154436,12 +154437,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154449,7 +154450,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154466,7 +154467,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -154474,7 +154475,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154508,7 +154509,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154535,13 +154536,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154549,27 +154550,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154581,7 +154582,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154593,7 +154594,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154608,7 +154609,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154617,7 +154618,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154625,7 +154626,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154635,7 +154636,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154644,7 +154645,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154656,7 +154657,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154708,7 +154709,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154749,7 +154750,7 @@ void m68000_device::divs_w_das_dd_ip() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -154778,13 +154779,13 @@ void m68000_device::divs_w_das_dd_ip() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154798,7 +154799,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154808,7 +154809,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154823,7 +154824,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154831,7 +154832,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154859,7 +154860,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154885,7 +154886,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155017,7 +155018,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155026,7 +155027,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155034,12 +155035,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155047,7 +155048,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155064,7 +155065,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155072,7 +155073,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155106,7 +155107,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155133,13 +155134,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155147,27 +155148,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155179,7 +155180,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155191,7 +155192,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155206,7 +155207,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155215,7 +155216,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155223,7 +155224,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155233,7 +155234,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155242,7 +155243,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155254,7 +155255,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155306,7 +155307,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155320,7 +155321,7 @@ void m68000_device::divs_w_dais_dd_ip() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -155388,7 +155389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -155417,13 +155418,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155437,7 +155438,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155447,7 +155448,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155462,7 +155463,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -155470,7 +155471,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -155498,7 +155499,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -155524,7 +155525,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155656,7 +155657,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155665,7 +155666,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155673,12 +155674,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155686,7 +155687,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155703,7 +155704,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155711,7 +155712,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155745,7 +155746,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155772,13 +155773,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155786,27 +155787,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155818,7 +155819,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155830,7 +155831,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155845,7 +155846,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155854,7 +155855,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155862,7 +155863,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155872,7 +155873,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155881,7 +155882,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155893,7 +155894,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155945,7 +155946,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155987,7 +155988,7 @@ void m68000_device::divs_w_adr16_dd_ip() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -156014,13 +156015,13 @@ void m68000_device::divs_w_adr16_dd_ip() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156034,7 +156035,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156044,7 +156045,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156059,7 +156060,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156067,7 +156068,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -156095,7 +156096,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156121,7 +156122,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156253,7 +156254,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156262,7 +156263,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156270,12 +156271,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156283,7 +156284,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156300,7 +156301,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156308,7 +156309,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156342,7 +156343,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156369,13 +156370,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156383,27 +156384,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156415,7 +156416,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156427,7 +156428,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156442,7 +156443,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156451,7 +156452,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156459,7 +156460,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156469,7 +156470,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156478,7 +156479,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156490,7 +156491,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156542,7 +156543,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -156608,7 +156609,7 @@ void m68000_device::divs_w_adr32_dd_ip() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156635,13 +156636,13 @@ void m68000_device::divs_w_adr32_dd_ip() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156655,7 +156656,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156665,7 +156666,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156680,7 +156681,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156688,7 +156689,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156716,7 +156717,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156742,7 +156743,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -156874,7 +156875,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156883,7 +156884,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156891,12 +156892,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156904,7 +156905,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156921,7 +156922,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156929,7 +156930,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156963,7 +156964,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156990,13 +156991,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157004,27 +157005,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157036,7 +157037,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157048,7 +157049,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157063,7 +157064,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157072,7 +157073,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157080,7 +157081,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157090,7 +157091,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157099,7 +157100,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157111,7 +157112,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157163,7 +157164,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157203,7 +157204,7 @@ void m68000_device::divs_w_dpc_dd_ip() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157232,13 +157233,13 @@ void m68000_device::divs_w_dpc_dd_ip() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157252,7 +157253,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157262,7 +157263,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157277,7 +157278,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157285,7 +157286,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157313,7 +157314,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157339,7 +157340,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -157471,7 +157472,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -157480,7 +157481,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -157488,12 +157489,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157501,7 +157502,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157518,7 +157519,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -157526,7 +157527,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157560,7 +157561,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157587,13 +157588,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157601,27 +157602,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157633,7 +157634,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157645,7 +157646,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157660,7 +157661,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157669,7 +157670,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157677,7 +157678,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157687,7 +157688,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157696,7 +157697,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157708,7 +157709,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157760,7 +157761,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157773,7 +157774,7 @@ void m68000_device::divs_w_dpci_dd_ip() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -157841,7 +157842,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157870,13 +157871,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157890,7 +157891,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157900,7 +157901,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157915,7 +157916,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157923,7 +157924,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157951,7 +157952,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157977,7 +157978,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -158109,7 +158110,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158118,7 +158119,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158126,12 +158127,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158139,7 +158140,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158156,7 +158157,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158164,7 +158165,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158198,7 +158199,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158225,13 +158226,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158239,27 +158240,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158271,7 +158272,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158283,7 +158284,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158298,7 +158299,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158307,7 +158308,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158315,7 +158316,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158325,7 +158326,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158334,7 +158335,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158346,7 +158347,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158398,7 +158399,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158442,13 +158443,13 @@ void m68000_device::divs_w_imm16_dd_ip() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158462,7 +158463,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158472,7 +158473,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158487,7 +158488,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -158495,7 +158496,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -158523,7 +158524,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -158549,7 +158550,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -158681,7 +158682,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158690,7 +158691,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158698,12 +158699,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158711,7 +158712,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158728,7 +158729,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158736,7 +158737,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158770,7 +158771,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158797,13 +158798,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158811,27 +158812,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158843,7 +158844,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158855,7 +158856,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158870,7 +158871,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158879,7 +158880,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158887,7 +158888,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158897,7 +158898,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158906,7 +158907,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158918,7 +158919,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158970,7 +158971,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158988,7 +158989,7 @@ void m68000_device::sub_b_ds_dd_ip() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159035,7 +159036,7 @@ void m68000_device::sub_b_ais_dd_ip() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159060,7 +159061,7 @@ void m68000_device::sub_b_ais_dd_ip() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159113,7 +159114,7 @@ void m68000_device::sub_b_aips_dd_ip() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159136,7 +159137,7 @@ void m68000_device::sub_b_aips_dd_ip() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159191,7 +159192,7 @@ void m68000_device::sub_b_pais_dd_ip() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159214,7 +159215,7 @@ void m68000_device::sub_b_pais_dd_ip() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159286,7 +159287,7 @@ void m68000_device::sub_b_das_dd_ip() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159311,7 +159312,7 @@ void m68000_device::sub_b_das_dd_ip() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159356,7 +159357,7 @@ void m68000_device::sub_b_dais_dd_ip() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159424,7 +159425,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159449,7 +159450,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159522,7 +159523,7 @@ void m68000_device::sub_b_adr16_dd_ip() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -159545,7 +159546,7 @@ void m68000_device::sub_b_adr16_dd_ip() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159642,7 +159643,7 @@ void m68000_device::sub_b_adr32_dd_ip() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159665,7 +159666,7 @@ void m68000_device::sub_b_adr32_dd_ip() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159736,7 +159737,7 @@ void m68000_device::sub_b_dpc_dd_ip() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159761,7 +159762,7 @@ void m68000_device::sub_b_dpc_dd_ip() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159805,7 +159806,7 @@ void m68000_device::sub_b_dpci_dd_ip() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159873,7 +159874,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159898,7 +159899,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159973,7 +159974,7 @@ void m68000_device::sub_b_imm8_dd_ip() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160022,7 +160023,7 @@ void m68000_device::sub_w_ds_dd_ip() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160071,7 +160072,7 @@ void m68000_device::sub_w_as_dd_ip() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160118,7 +160119,7 @@ void m68000_device::sub_w_ais_dd_ip() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160147,7 +160148,7 @@ void m68000_device::sub_w_ais_dd_ip() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160200,7 +160201,7 @@ void m68000_device::sub_w_aips_dd_ip() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160227,7 +160228,7 @@ void m68000_device::sub_w_aips_dd_ip() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160282,7 +160283,7 @@ void m68000_device::sub_w_pais_dd_ip() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160309,7 +160310,7 @@ void m68000_device::sub_w_pais_dd_ip() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160381,7 +160382,7 @@ void m68000_device::sub_w_das_dd_ip() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160410,7 +160411,7 @@ void m68000_device::sub_w_das_dd_ip() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160455,7 +160456,7 @@ void m68000_device::sub_w_dais_dd_ip() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160523,7 +160524,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160552,7 +160553,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160625,7 +160626,7 @@ void m68000_device::sub_w_adr16_dd_ip() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -160652,7 +160653,7 @@ void m68000_device::sub_w_adr16_dd_ip() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160749,7 +160750,7 @@ void m68000_device::sub_w_adr32_dd_ip() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -160776,7 +160777,7 @@ void m68000_device::sub_w_adr32_dd_ip() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160847,7 +160848,7 @@ void m68000_device::sub_w_dpc_dd_ip() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160876,7 +160877,7 @@ void m68000_device::sub_w_dpc_dd_ip() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160920,7 +160921,7 @@ void m68000_device::sub_w_dpci_dd_ip() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160988,7 +160989,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161017,7 +161018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161092,7 +161093,7 @@ void m68000_device::sub_w_imm16_dd_ip() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161141,7 +161142,7 @@ void m68000_device::sub_l_ds_dd_ip() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161168,7 +161169,7 @@ void m68000_device::sub_l_ds_dd_ip() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161198,7 +161199,7 @@ void m68000_device::sub_l_as_dd_ip() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161225,7 +161226,7 @@ void m68000_device::sub_l_as_dd_ip() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161253,7 +161254,7 @@ void m68000_device::sub_l_ais_dd_ip() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161306,12 +161307,12 @@ void m68000_device::sub_l_ais_dd_ip() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161359,7 +161360,7 @@ void m68000_device::sub_l_aips_dd_ip() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161415,12 +161416,12 @@ void m68000_device::sub_l_aips_dd_ip() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161467,7 +161468,7 @@ void m68000_device::sub_l_pais_dd_ip() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -161525,12 +161526,12 @@ void m68000_device::sub_l_pais_dd_ip() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161602,7 +161603,7 @@ void m68000_device::sub_l_das_dd_ip() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161655,12 +161656,12 @@ void m68000_device::sub_l_das_dd_ip() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161706,7 +161707,7 @@ void m68000_device::sub_l_dais_dd_ip() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -161773,7 +161774,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161826,12 +161827,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161905,7 +161906,7 @@ void m68000_device::sub_l_adr16_dd_ip() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161958,12 +161959,12 @@ void m68000_device::sub_l_adr16_dd_ip() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162061,7 +162062,7 @@ void m68000_device::sub_l_adr32_dd_ip() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162114,12 +162115,12 @@ void m68000_device::sub_l_adr32_dd_ip() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162190,7 +162191,7 @@ void m68000_device::sub_l_dpc_dd_ip() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162243,12 +162244,12 @@ void m68000_device::sub_l_dpc_dd_ip() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162293,7 +162294,7 @@ void m68000_device::sub_l_dpci_dd_ip() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -162360,7 +162361,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162413,12 +162414,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162518,7 +162519,7 @@ void m68000_device::sub_l_imm32_dd_ip() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -162545,7 +162546,7 @@ void m68000_device::sub_l_imm32_dd_ip() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -162575,7 +162576,7 @@ void m68000_device::suba_w_ds_ad_ip() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162601,7 +162602,7 @@ void m68000_device::suba_w_ds_ad_ip() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162630,7 +162631,7 @@ void m68000_device::suba_w_as_ad_ip() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162656,7 +162657,7 @@ void m68000_device::suba_w_as_ad_ip() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162683,7 +162684,7 @@ void m68000_device::suba_w_ais_ad_ip() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162712,7 +162713,7 @@ void m68000_device::suba_w_ais_ad_ip() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162738,7 +162739,7 @@ void m68000_device::suba_w_ais_ad_ip() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162771,7 +162772,7 @@ void m68000_device::suba_w_aips_ad_ip() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162798,7 +162799,7 @@ void m68000_device::suba_w_aips_ad_ip() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162824,7 +162825,7 @@ void m68000_device::suba_w_aips_ad_ip() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162859,7 +162860,7 @@ void m68000_device::suba_w_pais_ad_ip() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162886,7 +162887,7 @@ void m68000_device::suba_w_pais_ad_ip() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162912,7 +162913,7 @@ void m68000_device::suba_w_pais_ad_ip() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162964,7 +162965,7 @@ void m68000_device::suba_w_das_ad_ip() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162993,7 +162994,7 @@ void m68000_device::suba_w_das_ad_ip() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163019,7 +163020,7 @@ void m68000_device::suba_w_das_ad_ip() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163044,7 +163045,7 @@ void m68000_device::suba_w_dais_ad_ip() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163112,7 +163113,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163141,7 +163142,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163167,7 +163168,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163220,7 +163221,7 @@ void m68000_device::suba_w_adr16_ad_ip() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -163247,7 +163248,7 @@ void m68000_device::suba_w_adr16_ad_ip() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163273,7 +163274,7 @@ void m68000_device::suba_w_adr16_ad_ip() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163350,7 +163351,7 @@ void m68000_device::suba_w_adr32_ad_ip() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -163377,7 +163378,7 @@ void m68000_device::suba_w_adr32_ad_ip() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163403,7 +163404,7 @@ void m68000_device::suba_w_adr32_ad_ip() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163454,7 +163455,7 @@ void m68000_device::suba_w_dpc_ad_ip() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163483,7 +163484,7 @@ void m68000_device::suba_w_dpc_ad_ip() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163509,7 +163510,7 @@ void m68000_device::suba_w_dpc_ad_ip() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163533,7 +163534,7 @@ void m68000_device::suba_w_dpci_ad_ip() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163601,7 +163602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163630,7 +163631,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163656,7 +163657,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163711,7 +163712,7 @@ void m68000_device::suba_w_imm16_ad_ip() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163737,7 +163738,7 @@ void m68000_device::suba_w_imm16_ad_ip() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163766,7 +163767,7 @@ void m68000_device::subx_b_ds_dd_ip() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -163819,7 +163820,7 @@ void m68000_device::subx_b_pais_paid_ip() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -163864,7 +163865,7 @@ void m68000_device::subx_b_pais_paid_ip() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163925,7 +163926,7 @@ void m68000_device::sub_b_dd_ais_ip() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -163950,7 +163951,7 @@ void m68000_device::sub_b_dd_ais_ip() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164017,7 +164018,7 @@ void m68000_device::sub_b_dd_aips_ip() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164040,7 +164041,7 @@ void m68000_device::sub_b_dd_aips_ip() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164109,7 +164110,7 @@ void m68000_device::sub_b_dd_pais_ip() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164132,7 +164133,7 @@ void m68000_device::sub_b_dd_pais_ip() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164218,7 +164219,7 @@ void m68000_device::sub_b_dd_das_ip() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164243,7 +164244,7 @@ void m68000_device::sub_b_dd_das_ip() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164302,7 +164303,7 @@ void m68000_device::sub_b_dd_dais_ip() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -164370,7 +164371,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164395,7 +164396,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164482,7 +164483,7 @@ void m68000_device::sub_b_dd_adr16_ip() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -164505,7 +164506,7 @@ void m68000_device::sub_b_dd_adr16_ip() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164616,7 +164617,7 @@ void m68000_device::sub_b_dd_adr32_ip() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164639,7 +164640,7 @@ void m68000_device::sub_b_dd_adr32_ip() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164702,7 +164703,7 @@ void m68000_device::subx_w_ds_dd_ip() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -164755,7 +164756,7 @@ void m68000_device::subx_w_pais_paid_ip() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -164808,7 +164809,7 @@ void m68000_device::subx_w_pais_paid_ip() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164875,7 +164876,7 @@ void m68000_device::sub_w_dd_ais_ip() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164904,7 +164905,7 @@ void m68000_device::sub_w_dd_ais_ip() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164977,7 +164978,7 @@ void m68000_device::sub_w_dd_aips_ip() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165004,7 +165005,7 @@ void m68000_device::sub_w_dd_aips_ip() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165079,7 +165080,7 @@ void m68000_device::sub_w_dd_pais_ip() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165106,7 +165107,7 @@ void m68000_device::sub_w_dd_pais_ip() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165198,7 +165199,7 @@ void m68000_device::sub_w_dd_das_ip() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165227,7 +165228,7 @@ void m68000_device::sub_w_dd_das_ip() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165292,7 +165293,7 @@ void m68000_device::sub_w_dd_dais_ip() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165360,7 +165361,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165389,7 +165390,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165482,7 +165483,7 @@ void m68000_device::sub_w_dd_adr16_ip() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -165509,7 +165510,7 @@ void m68000_device::sub_w_dd_adr16_ip() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165626,7 +165627,7 @@ void m68000_device::sub_w_dd_adr32_ip() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -165653,7 +165654,7 @@ void m68000_device::sub_w_dd_adr32_ip() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165722,7 +165723,7 @@ void m68000_device::subx_l_ds_dd_ip() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -165749,7 +165750,7 @@ void m68000_device::subx_l_ds_dd_ip() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -165807,7 +165808,7 @@ void m68000_device::subx_l_pais_paid_ip() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -165860,7 +165861,7 @@ void m68000_device::subx_l_pais_paid_ip() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -165910,7 +165911,7 @@ void m68000_device::subx_l_pais_paid_ip() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165977,7 +165978,7 @@ void m68000_device::sub_l_dd_ais_ip() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166030,7 +166031,7 @@ void m68000_device::sub_l_dd_ais_ip() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166058,7 +166059,7 @@ void m68000_device::sub_l_dd_ais_ip() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166123,7 +166124,7 @@ void m68000_device::sub_l_dd_aips_ip() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166179,7 +166180,7 @@ void m68000_device::sub_l_dd_aips_ip() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166207,7 +166208,7 @@ void m68000_device::sub_l_dd_aips_ip() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166271,7 +166272,7 @@ void m68000_device::sub_l_dd_pais_ip() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -166329,7 +166330,7 @@ void m68000_device::sub_l_dd_pais_ip() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166357,7 +166358,7 @@ void m68000_device::sub_l_dd_pais_ip() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166446,7 +166447,7 @@ void m68000_device::sub_l_dd_das_ip() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166499,7 +166500,7 @@ void m68000_device::sub_l_dd_das_ip() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166527,7 +166528,7 @@ void m68000_device::sub_l_dd_das_ip() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166590,7 +166591,7 @@ void m68000_device::sub_l_dd_dais_ip() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -166657,7 +166658,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166710,7 +166711,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166738,7 +166739,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166829,7 +166830,7 @@ void m68000_device::sub_l_dd_adr16_ip() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166882,7 +166883,7 @@ void m68000_device::sub_l_dd_adr16_ip() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166910,7 +166911,7 @@ void m68000_device::sub_l_dd_adr16_ip() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167025,7 +167026,7 @@ void m68000_device::sub_l_dd_adr32_ip() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167078,7 +167079,7 @@ void m68000_device::sub_l_dd_adr32_ip() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167106,7 +167107,7 @@ void m68000_device::sub_l_dd_adr32_ip() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167173,7 +167174,7 @@ void m68000_device::suba_l_ds_ad_ip() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167199,7 +167200,7 @@ void m68000_device::suba_l_ds_ad_ip() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167228,7 +167229,7 @@ void m68000_device::suba_l_as_ad_ip() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167254,7 +167255,7 @@ void m68000_device::suba_l_as_ad_ip() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167281,7 +167282,7 @@ void m68000_device::suba_l_ais_ad_ip() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167334,11 +167335,11 @@ void m68000_device::suba_l_ais_ad_ip() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167385,7 +167386,7 @@ void m68000_device::suba_l_aips_ad_ip() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167441,11 +167442,11 @@ void m68000_device::suba_l_aips_ad_ip() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167491,7 +167492,7 @@ void m68000_device::suba_l_pais_ad_ip() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -167549,11 +167550,11 @@ void m68000_device::suba_l_pais_ad_ip() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167624,7 +167625,7 @@ void m68000_device::suba_l_das_ad_ip() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167677,11 +167678,11 @@ void m68000_device::suba_l_das_ad_ip() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167726,7 +167727,7 @@ void m68000_device::suba_l_dais_ad_ip() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -167793,7 +167794,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167846,11 +167847,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167923,7 +167924,7 @@ void m68000_device::suba_l_adr16_ad_ip() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167976,11 +167977,11 @@ void m68000_device::suba_l_adr16_ad_ip() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168077,7 +168078,7 @@ void m68000_device::suba_l_adr32_ad_ip() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -168130,11 +168131,11 @@ void m68000_device::suba_l_adr32_ad_ip() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168204,7 +168205,7 @@ void m68000_device::suba_l_dpc_ad_ip() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168257,11 +168258,11 @@ void m68000_device::suba_l_dpc_ad_ip() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168305,7 +168306,7 @@ void m68000_device::suba_l_dpci_ad_ip() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168372,7 +168373,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168425,11 +168426,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168528,7 +168529,7 @@ void m68000_device::suba_l_imm32_ad_ip() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -168554,7 +168555,7 @@ void m68000_device::suba_l_imm32_ad_ip() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -168583,7 +168584,7 @@ void m68000_device::cmp_b_ds_dd_ip() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168629,7 +168630,7 @@ void m68000_device::cmp_b_ais_dd_ip() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168654,7 +168655,7 @@ void m68000_device::cmp_b_ais_dd_ip() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168706,7 +168707,7 @@ void m68000_device::cmp_b_aips_dd_ip() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168729,7 +168730,7 @@ void m68000_device::cmp_b_aips_dd_ip() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168783,7 +168784,7 @@ void m68000_device::cmp_b_pais_dd_ip() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168806,7 +168807,7 @@ void m68000_device::cmp_b_pais_dd_ip() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168877,7 +168878,7 @@ void m68000_device::cmp_b_das_dd_ip() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168902,7 +168903,7 @@ void m68000_device::cmp_b_das_dd_ip() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168946,7 +168947,7 @@ void m68000_device::cmp_b_dais_dd_ip() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169014,7 +169015,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169039,7 +169040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169111,7 +169112,7 @@ void m68000_device::cmp_b_adr16_dd_ip() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -169134,7 +169135,7 @@ void m68000_device::cmp_b_adr16_dd_ip() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169230,7 +169231,7 @@ void m68000_device::cmp_b_adr32_dd_ip() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169253,7 +169254,7 @@ void m68000_device::cmp_b_adr32_dd_ip() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169323,7 +169324,7 @@ void m68000_device::cmp_b_dpc_dd_ip() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169348,7 +169349,7 @@ void m68000_device::cmp_b_dpc_dd_ip() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169391,7 +169392,7 @@ void m68000_device::cmp_b_dpci_dd_ip() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169459,7 +169460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169484,7 +169485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169558,7 +169559,7 @@ void m68000_device::cmp_b_imm8_dd_ip() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169606,7 +169607,7 @@ void m68000_device::cmp_w_ds_dd_ip() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169654,7 +169655,7 @@ void m68000_device::cmp_w_as_dd_ip() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169700,7 +169701,7 @@ void m68000_device::cmp_w_ais_dd_ip() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169729,7 +169730,7 @@ void m68000_device::cmp_w_ais_dd_ip() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169781,7 +169782,7 @@ void m68000_device::cmp_w_aips_dd_ip() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169808,7 +169809,7 @@ void m68000_device::cmp_w_aips_dd_ip() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169862,7 +169863,7 @@ void m68000_device::cmp_w_pais_dd_ip() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169889,7 +169890,7 @@ void m68000_device::cmp_w_pais_dd_ip() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169960,7 +169961,7 @@ void m68000_device::cmp_w_das_dd_ip() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169989,7 +169990,7 @@ void m68000_device::cmp_w_das_dd_ip() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170033,7 +170034,7 @@ void m68000_device::cmp_w_dais_dd_ip() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170101,7 +170102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170130,7 +170131,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170202,7 +170203,7 @@ void m68000_device::cmp_w_adr16_dd_ip() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -170229,7 +170230,7 @@ void m68000_device::cmp_w_adr16_dd_ip() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170325,7 +170326,7 @@ void m68000_device::cmp_w_adr32_dd_ip() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -170352,7 +170353,7 @@ void m68000_device::cmp_w_adr32_dd_ip() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170422,7 +170423,7 @@ void m68000_device::cmp_w_dpc_dd_ip() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170451,7 +170452,7 @@ void m68000_device::cmp_w_dpc_dd_ip() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170494,7 +170495,7 @@ void m68000_device::cmp_w_dpci_dd_ip() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170562,7 +170563,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170591,7 +170592,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170665,7 +170666,7 @@ void m68000_device::cmp_w_imm16_dd_ip() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170713,11 +170714,11 @@ void m68000_device::cmp_l_ds_dd_ip() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170766,11 +170767,11 @@ void m68000_device::cmp_l_as_dd_ip() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170817,7 +170818,7 @@ void m68000_device::cmp_l_ais_dd_ip() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170870,11 +170871,11 @@ void m68000_device::cmp_l_ais_dd_ip() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170921,7 +170922,7 @@ void m68000_device::cmp_l_aips_dd_ip() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170977,11 +170978,11 @@ void m68000_device::cmp_l_aips_dd_ip() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171027,7 +171028,7 @@ void m68000_device::cmp_l_pais_dd_ip() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -171085,11 +171086,11 @@ void m68000_device::cmp_l_pais_dd_ip() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171160,7 +171161,7 @@ void m68000_device::cmp_l_das_dd_ip() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171213,11 +171214,11 @@ void m68000_device::cmp_l_das_dd_ip() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171262,7 +171263,7 @@ void m68000_device::cmp_l_dais_dd_ip() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171329,7 +171330,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171382,11 +171383,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171459,7 +171460,7 @@ void m68000_device::cmp_l_adr16_dd_ip() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171512,11 +171513,11 @@ void m68000_device::cmp_l_adr16_dd_ip() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171613,7 +171614,7 @@ void m68000_device::cmp_l_adr32_dd_ip() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171666,11 +171667,11 @@ void m68000_device::cmp_l_adr32_dd_ip() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171740,7 +171741,7 @@ void m68000_device::cmp_l_dpc_dd_ip() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171793,11 +171794,11 @@ void m68000_device::cmp_l_dpc_dd_ip() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171841,7 +171842,7 @@ void m68000_device::cmp_l_dpci_dd_ip() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171908,7 +171909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171961,11 +171962,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172064,11 +172065,11 @@ void m68000_device::cmp_l_imm32_dd_ip() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172117,11 +172118,11 @@ void m68000_device::cmpa_w_ds_ad_ip() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172170,11 +172171,11 @@ void m68000_device::cmpa_w_as_ad_ip() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172221,7 +172222,7 @@ void m68000_device::cmpa_w_ais_ad_ip() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172250,11 +172251,11 @@ void m68000_device::cmpa_w_ais_ad_ip() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172307,7 +172308,7 @@ void m68000_device::cmpa_w_aips_ad_ip() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172334,11 +172335,11 @@ void m68000_device::cmpa_w_aips_ad_ip() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172393,7 +172394,7 @@ void m68000_device::cmpa_w_pais_ad_ip() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172420,11 +172421,11 @@ void m68000_device::cmpa_w_pais_ad_ip() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172496,7 +172497,7 @@ void m68000_device::cmpa_w_das_ad_ip() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172525,11 +172526,11 @@ void m68000_device::cmpa_w_das_ad_ip() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172574,7 +172575,7 @@ void m68000_device::cmpa_w_dais_ad_ip() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -172642,7 +172643,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172671,11 +172672,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172748,7 +172749,7 @@ void m68000_device::cmpa_w_adr16_ad_ip() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -172775,11 +172776,11 @@ void m68000_device::cmpa_w_adr16_ad_ip() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172876,7 +172877,7 @@ void m68000_device::cmpa_w_adr32_ad_ip() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172903,11 +172904,11 @@ void m68000_device::cmpa_w_adr32_ad_ip() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172978,7 +172979,7 @@ void m68000_device::cmpa_w_dpc_ad_ip() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173007,11 +173008,11 @@ void m68000_device::cmpa_w_dpc_ad_ip() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173055,7 +173056,7 @@ void m68000_device::cmpa_w_dpci_ad_ip() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -173123,7 +173124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173152,11 +173153,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173231,11 +173232,11 @@ void m68000_device::cmpa_w_imm16_ad_ip() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173283,7 +173284,7 @@ void m68000_device::eor_b_dd_ds_ip() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -173291,7 +173292,7 @@ void m68000_device::eor_b_dd_ds_ip() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173356,7 +173357,7 @@ void m68000_device::cmpm_b_aips_aipd_ip() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -173380,7 +173381,7 @@ void m68000_device::cmpm_b_aips_aipd_ip() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173422,11 +173423,11 @@ void m68000_device::eor_b_dd_ais_ip() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173448,7 +173449,7 @@ void m68000_device::eor_b_dd_ais_ip() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173478,7 +173479,7 @@ void m68000_device::eor_b_dd_ais_ip() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173513,12 +173514,12 @@ void m68000_device::eor_b_dd_aips_ip() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173541,7 +173542,7 @@ void m68000_device::eor_b_dd_aips_ip() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173571,7 +173572,7 @@ void m68000_device::eor_b_dd_aips_ip() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173605,7 +173606,7 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173613,7 +173614,7 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173636,7 +173637,7 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173666,7 +173667,7 @@ void m68000_device::eor_b_dd_pais_ip() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173698,7 +173699,7 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173724,11 +173725,11 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173750,7 +173751,7 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68000_device::eor_b_dd_das_ip() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173810,14 +173811,14 @@ void m68000_device::eor_b_dd_dais_ip() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -173825,7 +173826,7 @@ void m68000_device::eor_b_dd_dais_ip() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173852,7 +173853,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173881,11 +173882,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173907,7 +173908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173937,7 +173938,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173971,7 +173972,7 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173997,7 +173998,7 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174020,7 +174021,7 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174050,7 +174051,7 @@ void m68000_device::eor_b_dd_adr16_ip() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174082,7 +174083,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174109,7 +174110,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -174135,7 +174136,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174158,7 +174159,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174188,7 +174189,7 @@ void m68000_device::eor_b_dd_adr32_ip() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174221,7 +174222,7 @@ void m68000_device::eor_w_dd_ds_ip() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -174229,7 +174230,7 @@ void m68000_device::eor_w_dd_ds_ip() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174298,7 +174299,7 @@ void m68000_device::cmpm_w_aips_aipd_ip() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174326,7 +174327,7 @@ void m68000_device::cmpm_w_aips_aipd_ip() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174368,11 +174369,11 @@ void m68000_device::eor_w_dd_ais_ip() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174398,7 +174399,7 @@ void m68000_device::eor_w_dd_ais_ip() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174428,7 +174429,7 @@ void m68000_device::eor_w_dd_ais_ip() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174469,12 +174470,12 @@ void m68000_device::eor_w_dd_aips_ip() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174501,7 +174502,7 @@ void m68000_device::eor_w_dd_aips_ip() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174531,7 +174532,7 @@ void m68000_device::eor_w_dd_aips_ip() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174571,7 +174572,7 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -174579,7 +174580,7 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174606,7 +174607,7 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174636,7 +174637,7 @@ void m68000_device::eor_w_dd_pais_ip() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174674,7 +174675,7 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174700,11 +174701,11 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174730,7 +174731,7 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174760,7 +174761,7 @@ void m68000_device::eor_w_dd_das_ip() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174796,14 +174797,14 @@ void m68000_device::eor_w_dd_dais_ip() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174811,7 +174812,7 @@ void m68000_device::eor_w_dd_dais_ip() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174838,7 +174839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174867,11 +174868,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174897,7 +174898,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174927,7 +174928,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174967,7 +174968,7 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174993,7 +174994,7 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175020,7 +175021,7 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175050,7 +175051,7 @@ void m68000_device::eor_w_dd_adr16_ip() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175088,7 +175089,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175115,7 +175116,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -175141,7 +175142,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175168,7 +175169,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175198,7 +175199,7 @@ void m68000_device::eor_w_dd_adr32_ip() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175237,12 +175238,12 @@ void m68000_device::eor_l_dd_ds_ip() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175265,7 +175266,7 @@ void m68000_device::eor_l_dd_ds_ip() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -175274,7 +175275,7 @@ void m68000_device::eor_l_dd_ds_ip() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -175347,7 +175348,7 @@ void m68000_device::cmpm_l_aips_aipd_ip() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175397,13 +175398,13 @@ void m68000_device::cmpm_l_aips_aipd_ip() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175445,7 +175446,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175473,7 +175474,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175499,7 +175500,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175527,7 +175528,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175555,7 +175556,7 @@ void m68000_device::eor_l_dd_ais_ip() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175593,7 +175594,7 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175621,11 +175622,11 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175651,7 +175652,7 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175679,7 +175680,7 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175707,7 +175708,7 @@ void m68000_device::eor_l_dd_aips_ip() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175744,14 +175745,14 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175778,7 +175779,7 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175804,7 +175805,7 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175832,7 +175833,7 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175860,7 +175861,7 @@ void m68000_device::eor_l_dd_pais_ip() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175898,7 +175899,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175923,7 +175924,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175951,7 +175952,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175977,7 +175978,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176005,7 +176006,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176033,7 +176034,7 @@ void m68000_device::eor_l_dd_das_ip() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176069,14 +176070,14 @@ void m68000_device::eor_l_dd_dais_ip() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -176084,7 +176085,7 @@ void m68000_device::eor_l_dd_dais_ip() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176111,7 +176112,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176139,7 +176140,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176167,7 +176168,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176193,7 +176194,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176221,7 +176222,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176249,7 +176250,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176289,7 +176290,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176315,7 +176316,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176343,7 +176344,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176369,7 +176370,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176397,7 +176398,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176425,7 +176426,7 @@ void m68000_device::eor_l_dd_adr16_ip() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176463,7 +176464,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176490,7 +176491,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -176516,7 +176517,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176544,7 +176545,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176570,7 +176571,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176598,7 +176599,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176626,7 +176627,7 @@ void m68000_device::eor_l_dd_adr32_ip() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176666,11 +176667,11 @@ void m68000_device::cmpa_l_ds_ad_ip() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176719,11 +176720,11 @@ void m68000_device::cmpa_l_as_ad_ip() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176770,7 +176771,7 @@ void m68000_device::cmpa_l_ais_ad_ip() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176823,11 +176824,11 @@ void m68000_device::cmpa_l_ais_ad_ip() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176874,7 +176875,7 @@ void m68000_device::cmpa_l_aips_ad_ip() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176930,11 +176931,11 @@ void m68000_device::cmpa_l_aips_ad_ip() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176980,7 +176981,7 @@ void m68000_device::cmpa_l_pais_ad_ip() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -177038,11 +177039,11 @@ void m68000_device::cmpa_l_pais_ad_ip() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177113,7 +177114,7 @@ void m68000_device::cmpa_l_das_ad_ip() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177166,11 +177167,11 @@ void m68000_device::cmpa_l_das_ad_ip() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177215,7 +177216,7 @@ void m68000_device::cmpa_l_dais_ad_ip() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177282,7 +177283,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177335,11 +177336,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177412,7 +177413,7 @@ void m68000_device::cmpa_l_adr16_ad_ip() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177465,11 +177466,11 @@ void m68000_device::cmpa_l_adr16_ad_ip() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177566,7 +177567,7 @@ void m68000_device::cmpa_l_adr32_ad_ip() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177619,11 +177620,11 @@ void m68000_device::cmpa_l_adr32_ad_ip() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177693,7 +177694,7 @@ void m68000_device::cmpa_l_dpc_ad_ip() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177746,11 +177747,11 @@ void m68000_device::cmpa_l_dpc_ad_ip() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177794,7 +177795,7 @@ void m68000_device::cmpa_l_dpci_ad_ip() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177861,7 +177862,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177914,11 +177915,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178017,11 +178018,11 @@ void m68000_device::cmpa_l_imm32_ad_ip() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178070,7 +178071,7 @@ void m68000_device::and_b_ds_dd_ip() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178078,7 +178079,7 @@ void m68000_device::and_b_ds_dd_ip() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178118,11 +178119,11 @@ void m68000_device::and_b_ais_dd_ip() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178144,7 +178145,7 @@ void m68000_device::and_b_ais_dd_ip() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178152,7 +178153,7 @@ void m68000_device::and_b_ais_dd_ip() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178195,12 +178196,12 @@ void m68000_device::and_b_aips_dd_ip() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178223,7 +178224,7 @@ void m68000_device::and_b_aips_dd_ip() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178231,7 +178232,7 @@ void m68000_device::and_b_aips_dd_ip() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178273,7 +178274,7 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178281,7 +178282,7 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178304,7 +178305,7 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178312,7 +178313,7 @@ void m68000_device::and_b_pais_dd_ip() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178352,7 +178353,7 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178378,11 +178379,11 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178404,7 +178405,7 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178412,7 +178413,7 @@ void m68000_device::and_b_das_dd_ip() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178450,14 +178451,14 @@ void m68000_device::and_b_dais_dd_ip() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178465,7 +178466,7 @@ void m68000_device::and_b_dais_dd_ip() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178492,7 +178493,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178521,11 +178522,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178547,7 +178548,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178555,7 +178556,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178597,7 +178598,7 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178623,7 +178624,7 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -178646,7 +178647,7 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178654,7 +178655,7 @@ void m68000_device::and_b_adr16_dd_ip() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178694,7 +178695,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178721,7 +178722,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -178747,7 +178748,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -178770,7 +178771,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178778,7 +178779,7 @@ void m68000_device::and_b_adr32_dd_ip() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178817,7 +178818,7 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178843,11 +178844,11 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178869,7 +178870,7 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178877,7 +178878,7 @@ void m68000_device::and_b_dpc_dd_ip() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178914,14 +178915,14 @@ void m68000_device::and_b_dpci_dd_ip() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178929,7 +178930,7 @@ void m68000_device::and_b_dpci_dd_ip() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178956,7 +178957,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178985,11 +178986,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -179011,7 +179012,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179019,7 +179020,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179061,7 +179062,7 @@ void m68000_device::and_b_imm8_dd_ip() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179088,7 +179089,7 @@ void m68000_device::and_b_imm8_dd_ip() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179096,7 +179097,7 @@ void m68000_device::and_b_imm8_dd_ip() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179138,7 +179139,7 @@ void m68000_device::and_w_ds_dd_ip() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179146,7 +179147,7 @@ void m68000_device::and_w_ds_dd_ip() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179186,11 +179187,11 @@ void m68000_device::and_w_ais_dd_ip() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179216,7 +179217,7 @@ void m68000_device::and_w_ais_dd_ip() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179224,7 +179225,7 @@ void m68000_device::and_w_ais_dd_ip() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179267,12 +179268,12 @@ void m68000_device::and_w_aips_dd_ip() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179299,7 +179300,7 @@ void m68000_device::and_w_aips_dd_ip() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179307,7 +179308,7 @@ void m68000_device::and_w_aips_dd_ip() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179349,7 +179350,7 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -179357,7 +179358,7 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179384,7 +179385,7 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179392,7 +179393,7 @@ void m68000_device::and_w_pais_dd_ip() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179432,7 +179433,7 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179458,11 +179459,11 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179488,7 +179489,7 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179496,7 +179497,7 @@ void m68000_device::and_w_das_dd_ip() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179534,14 +179535,14 @@ void m68000_device::and_w_dais_dd_ip() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179549,7 +179550,7 @@ void m68000_device::and_w_dais_dd_ip() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179576,7 +179577,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179605,11 +179606,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179635,7 +179636,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179643,7 +179644,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179685,7 +179686,7 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179711,7 +179712,7 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -179738,7 +179739,7 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179746,7 +179747,7 @@ void m68000_device::and_w_adr16_dd_ip() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179786,7 +179787,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179813,7 +179814,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -179839,7 +179840,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179866,7 +179867,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179874,7 +179875,7 @@ void m68000_device::and_w_adr32_dd_ip() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179913,7 +179914,7 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179939,11 +179940,11 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179969,7 +179970,7 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179977,7 +179978,7 @@ void m68000_device::and_w_dpc_dd_ip() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180014,14 +180015,14 @@ void m68000_device::and_w_dpci_dd_ip() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180029,7 +180030,7 @@ void m68000_device::and_w_dpci_dd_ip() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180056,7 +180057,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180085,11 +180086,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180115,7 +180116,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180123,7 +180124,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180165,7 +180166,7 @@ void m68000_device::and_w_imm16_dd_ip() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180192,7 +180193,7 @@ void m68000_device::and_w_imm16_dd_ip() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180200,7 +180201,7 @@ void m68000_device::and_w_imm16_dd_ip() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180242,12 +180243,12 @@ void m68000_device::and_l_ds_dd_ip() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180270,7 +180271,7 @@ void m68000_device::and_l_ds_dd_ip() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -180279,7 +180280,7 @@ void m68000_device::and_l_ds_dd_ip() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180299,7 +180300,7 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180327,7 +180328,7 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180353,12 +180354,12 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180387,7 +180388,7 @@ void m68000_device::and_l_ais_dd_ip() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180407,7 +180408,7 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180435,11 +180436,11 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180465,12 +180466,12 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180499,7 +180500,7 @@ void m68000_device::and_l_aips_dd_ip() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180518,14 +180519,14 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180552,7 +180553,7 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180578,12 +180579,12 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180612,7 +180613,7 @@ void m68000_device::and_l_pais_dd_ip() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180632,7 +180633,7 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180657,7 +180658,7 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180685,7 +180686,7 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180711,12 +180712,12 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180745,7 +180746,7 @@ void m68000_device::and_l_das_dd_ip() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180763,14 +180764,14 @@ void m68000_device::and_l_dais_dd_ip() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -180778,7 +180779,7 @@ void m68000_device::and_l_dais_dd_ip() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180805,7 +180806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180833,7 +180834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180861,7 +180862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180887,12 +180888,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180921,7 +180922,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180943,7 +180944,7 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -180969,7 +180970,7 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180997,7 +180998,7 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181023,12 +181024,12 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181057,7 +181058,7 @@ void m68000_device::and_l_adr16_dd_ip() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181077,7 +181078,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181104,7 +181105,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181130,7 +181131,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181158,7 +181159,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181184,12 +181185,12 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181218,7 +181219,7 @@ void m68000_device::and_l_adr32_dd_ip() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181237,7 +181238,7 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181262,7 +181263,7 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181290,7 +181291,7 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181316,12 +181317,12 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181350,7 +181351,7 @@ void m68000_device::and_l_dpc_dd_ip() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181367,14 +181368,14 @@ void m68000_device::and_l_dpci_dd_ip() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -181382,7 +181383,7 @@ void m68000_device::and_l_dpci_dd_ip() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181409,7 +181410,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181437,7 +181438,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181465,7 +181466,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181491,12 +181492,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181525,7 +181526,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181545,7 +181546,7 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181572,7 +181573,7 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181599,12 +181600,12 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181627,7 +181628,7 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -181636,7 +181637,7 @@ void m68000_device::and_l_imm32_dd_ip() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181660,7 +181661,7 @@ void m68000_device::mulu_w_ds_dd_ip() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181696,7 +181697,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181708,7 +181709,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181720,7 +181721,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181742,7 +181743,7 @@ void m68000_device::mulu_w_ais_dd_ip() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181773,7 +181774,7 @@ void m68000_device::mulu_w_ais_dd_ip() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181809,7 +181810,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181821,7 +181822,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181833,7 +181834,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181861,7 +181862,7 @@ void m68000_device::mulu_w_aips_dd_ip() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -181890,7 +181891,7 @@ void m68000_device::mulu_w_aips_dd_ip() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181926,7 +181927,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181938,7 +181939,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181950,7 +181951,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181980,7 +181981,7 @@ void m68000_device::mulu_w_pais_dd_ip() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -182009,7 +182010,7 @@ void m68000_device::mulu_w_pais_dd_ip() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182045,7 +182046,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182057,7 +182058,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182069,7 +182070,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182116,7 +182117,7 @@ void m68000_device::mulu_w_das_dd_ip() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182147,7 +182148,7 @@ void m68000_device::mulu_w_das_dd_ip() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182183,7 +182184,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182195,7 +182196,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182207,7 +182208,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182227,7 +182228,7 @@ void m68000_device::mulu_w_dais_dd_ip() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182295,7 +182296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182326,7 +182327,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182362,7 +182363,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182374,7 +182375,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182386,7 +182387,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182434,7 +182435,7 @@ void m68000_device::mulu_w_adr16_dd_ip() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -182463,7 +182464,7 @@ void m68000_device::mulu_w_adr16_dd_ip() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182499,7 +182500,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182511,7 +182512,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182523,7 +182524,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182595,7 +182596,7 @@ void m68000_device::mulu_w_adr32_dd_ip() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -182624,7 +182625,7 @@ void m68000_device::mulu_w_adr32_dd_ip() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182660,7 +182661,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182672,7 +182673,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182684,7 +182685,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182730,7 +182731,7 @@ void m68000_device::mulu_w_dpc_dd_ip() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182761,7 +182762,7 @@ void m68000_device::mulu_w_dpc_dd_ip() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182797,7 +182798,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182809,7 +182810,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182821,7 +182822,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182840,7 +182841,7 @@ void m68000_device::mulu_w_dpci_dd_ip() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182908,7 +182909,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182939,7 +182940,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182975,7 +182976,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182987,7 +182988,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182999,7 +183000,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183051,7 +183052,7 @@ void m68000_device::mulu_w_imm16_dd_ip() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -183087,7 +183088,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183099,7 +183100,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183111,7 +183112,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183135,12 +183136,12 @@ void m68000_device::abcd_ds_dd_ip() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183192,7 +183193,7 @@ void m68000_device::abcd_pais_paid_ip() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -183236,12 +183237,12 @@ void m68000_device::abcd_pais_paid_ip() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183300,11 +183301,11 @@ void m68000_device::and_b_dd_ais_ip() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183326,7 +183327,7 @@ void m68000_device::and_b_dd_ais_ip() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183356,7 +183357,7 @@ void m68000_device::and_b_dd_ais_ip() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183391,12 +183392,12 @@ void m68000_device::and_b_dd_aips_ip() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183419,7 +183420,7 @@ void m68000_device::and_b_dd_aips_ip() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183449,7 +183450,7 @@ void m68000_device::and_b_dd_aips_ip() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183483,7 +183484,7 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -183491,7 +183492,7 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183514,7 +183515,7 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183544,7 +183545,7 @@ void m68000_device::and_b_dd_pais_ip() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183576,7 +183577,7 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183602,11 +183603,11 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183628,7 +183629,7 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183658,7 +183659,7 @@ void m68000_device::and_b_dd_das_ip() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183688,14 +183689,14 @@ void m68000_device::and_b_dd_dais_ip() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -183703,7 +183704,7 @@ void m68000_device::and_b_dd_dais_ip() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183730,7 +183731,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183759,11 +183760,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183785,7 +183786,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183815,7 +183816,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183849,7 +183850,7 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -183875,7 +183876,7 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -183898,7 +183899,7 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183928,7 +183929,7 @@ void m68000_device::and_b_dd_adr16_ip() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183960,7 +183961,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183987,7 +183988,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184013,7 +184014,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -184036,7 +184037,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184066,7 +184067,7 @@ void m68000_device::and_b_dd_adr32_ip() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -184200,11 +184201,11 @@ void m68000_device::and_w_dd_ais_ip() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184230,7 +184231,7 @@ void m68000_device::and_w_dd_ais_ip() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184260,7 +184261,7 @@ void m68000_device::and_w_dd_ais_ip() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184301,12 +184302,12 @@ void m68000_device::and_w_dd_aips_ip() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184333,7 +184334,7 @@ void m68000_device::and_w_dd_aips_ip() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184363,7 +184364,7 @@ void m68000_device::and_w_dd_aips_ip() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184403,7 +184404,7 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -184411,7 +184412,7 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184438,7 +184439,7 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184468,7 +184469,7 @@ void m68000_device::and_w_dd_pais_ip() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184506,7 +184507,7 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184532,11 +184533,11 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184562,7 +184563,7 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184592,7 +184593,7 @@ void m68000_device::and_w_dd_das_ip() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184628,14 +184629,14 @@ void m68000_device::and_w_dd_dais_ip() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -184643,7 +184644,7 @@ void m68000_device::and_w_dd_dais_ip() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184670,7 +184671,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184699,11 +184700,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184729,7 +184730,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184759,7 +184760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184799,7 +184800,7 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -184825,7 +184826,7 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -184852,7 +184853,7 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184882,7 +184883,7 @@ void m68000_device::and_w_dd_adr16_ip() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184920,7 +184921,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184947,7 +184948,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184973,7 +184974,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -185000,7 +185001,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185030,7 +185031,7 @@ void m68000_device::and_w_dd_adr32_ip() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185119,7 +185120,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185147,7 +185148,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185173,7 +185174,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185201,7 +185202,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185229,7 +185230,7 @@ void m68000_device::and_l_dd_ais_ip() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185267,7 +185268,7 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185295,11 +185296,11 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185325,7 +185326,7 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185353,7 +185354,7 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185381,7 +185382,7 @@ void m68000_device::and_l_dd_aips_ip() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185418,14 +185419,14 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185452,7 +185453,7 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185478,7 +185479,7 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185506,7 +185507,7 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185534,7 +185535,7 @@ void m68000_device::and_l_dd_pais_ip() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185572,7 +185573,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185597,7 +185598,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185625,7 +185626,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185651,7 +185652,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185679,7 +185680,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185707,7 +185708,7 @@ void m68000_device::and_l_dd_das_ip() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185743,14 +185744,14 @@ void m68000_device::and_l_dd_dais_ip() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -185758,7 +185759,7 @@ void m68000_device::and_l_dd_dais_ip() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185785,7 +185786,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185813,7 +185814,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185841,7 +185842,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185867,7 +185868,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185895,7 +185896,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185923,7 +185924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185963,7 +185964,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -185989,7 +185990,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -186017,7 +186018,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -186043,7 +186044,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186071,7 +186072,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186099,7 +186100,7 @@ void m68000_device::and_l_dd_adr16_ip() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -186137,7 +186138,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -186164,7 +186165,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -186190,7 +186191,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186218,7 +186219,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -186244,7 +186245,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186272,7 +186273,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186300,7 +186301,7 @@ void m68000_device::and_l_dd_adr32_ip() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -186342,7 +186343,7 @@ void m68000_device::muls_w_ds_dd_ip() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186378,7 +186379,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186392,7 +186393,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186404,7 +186405,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186416,7 +186417,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186433,7 +186434,7 @@ void m68000_device::muls_w_ais_dd_ip() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186464,7 +186465,7 @@ void m68000_device::muls_w_ais_dd_ip() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186500,7 +186501,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186514,7 +186515,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186526,7 +186527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186538,7 +186539,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186561,7 +186562,7 @@ void m68000_device::muls_w_aips_dd_ip() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186590,7 +186591,7 @@ void m68000_device::muls_w_aips_dd_ip() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186626,7 +186627,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186640,7 +186641,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186652,7 +186653,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186664,7 +186665,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186689,7 +186690,7 @@ void m68000_device::muls_w_pais_dd_ip() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186718,7 +186719,7 @@ void m68000_device::muls_w_pais_dd_ip() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186754,7 +186755,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186768,7 +186769,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186780,7 +186781,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186792,7 +186793,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186834,7 +186835,7 @@ void m68000_device::muls_w_das_dd_ip() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186865,7 +186866,7 @@ void m68000_device::muls_w_das_dd_ip() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186901,7 +186902,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186915,7 +186916,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186927,7 +186928,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186939,7 +186940,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186954,7 +186955,7 @@ void m68000_device::muls_w_dais_dd_ip() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187022,7 +187023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187053,7 +187054,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187089,7 +187090,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187103,7 +187104,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187115,7 +187116,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187127,7 +187128,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187170,7 +187171,7 @@ void m68000_device::muls_w_adr16_dd_ip() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -187199,7 +187200,7 @@ void m68000_device::muls_w_adr16_dd_ip() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187235,7 +187236,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187249,7 +187250,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187261,7 +187262,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187273,7 +187274,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187340,7 +187341,7 @@ void m68000_device::muls_w_adr32_dd_ip() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187369,7 +187370,7 @@ void m68000_device::muls_w_adr32_dd_ip() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187405,7 +187406,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187419,7 +187420,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187431,7 +187432,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187443,7 +187444,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187484,7 +187485,7 @@ void m68000_device::muls_w_dpc_dd_ip() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187515,7 +187516,7 @@ void m68000_device::muls_w_dpc_dd_ip() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187551,7 +187552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187565,7 +187566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187577,7 +187578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187589,7 +187590,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187603,7 +187604,7 @@ void m68000_device::muls_w_dpci_dd_ip() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187671,7 +187672,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187702,7 +187703,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187738,7 +187739,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187752,7 +187753,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187764,7 +187765,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187776,7 +187777,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187823,7 +187824,7 @@ void m68000_device::muls_w_imm16_dd_ip() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187859,7 +187860,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187873,7 +187874,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187885,7 +187886,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187897,7 +187898,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187916,7 +187917,7 @@ void m68000_device::add_b_ds_dd_ip() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -187963,7 +187964,7 @@ void m68000_device::add_b_ais_dd_ip() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187988,7 +187989,7 @@ void m68000_device::add_b_ais_dd_ip() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188041,7 +188042,7 @@ void m68000_device::add_b_aips_dd_ip() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188064,7 +188065,7 @@ void m68000_device::add_b_aips_dd_ip() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188119,7 +188120,7 @@ void m68000_device::add_b_pais_dd_ip() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188142,7 +188143,7 @@ void m68000_device::add_b_pais_dd_ip() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188214,7 +188215,7 @@ void m68000_device::add_b_das_dd_ip() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188239,7 +188240,7 @@ void m68000_device::add_b_das_dd_ip() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188284,7 +188285,7 @@ void m68000_device::add_b_dais_dd_ip() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188352,7 +188353,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188377,7 +188378,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188450,7 +188451,7 @@ void m68000_device::add_b_adr16_dd_ip() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -188473,7 +188474,7 @@ void m68000_device::add_b_adr16_dd_ip() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188570,7 +188571,7 @@ void m68000_device::add_b_adr32_dd_ip() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -188593,7 +188594,7 @@ void m68000_device::add_b_adr32_dd_ip() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188664,7 +188665,7 @@ void m68000_device::add_b_dpc_dd_ip() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188689,7 +188690,7 @@ void m68000_device::add_b_dpc_dd_ip() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188733,7 +188734,7 @@ void m68000_device::add_b_dpci_dd_ip() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188801,7 +188802,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188826,7 +188827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188901,7 +188902,7 @@ void m68000_device::add_b_imm8_dd_ip() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188950,7 +188951,7 @@ void m68000_device::add_w_ds_dd_ip() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188999,7 +189000,7 @@ void m68000_device::add_w_as_dd_ip() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189046,7 +189047,7 @@ void m68000_device::add_w_ais_dd_ip() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189075,7 +189076,7 @@ void m68000_device::add_w_ais_dd_ip() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189128,7 +189129,7 @@ void m68000_device::add_w_aips_dd_ip() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189155,7 +189156,7 @@ void m68000_device::add_w_aips_dd_ip() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189210,7 +189211,7 @@ void m68000_device::add_w_pais_dd_ip() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189237,7 +189238,7 @@ void m68000_device::add_w_pais_dd_ip() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189309,7 +189310,7 @@ void m68000_device::add_w_das_dd_ip() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189338,7 +189339,7 @@ void m68000_device::add_w_das_dd_ip() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189383,7 +189384,7 @@ void m68000_device::add_w_dais_dd_ip() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189451,7 +189452,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189480,7 +189481,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189553,7 +189554,7 @@ void m68000_device::add_w_adr16_dd_ip() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -189580,7 +189581,7 @@ void m68000_device::add_w_adr16_dd_ip() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189677,7 +189678,7 @@ void m68000_device::add_w_adr32_dd_ip() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189704,7 +189705,7 @@ void m68000_device::add_w_adr32_dd_ip() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189775,7 +189776,7 @@ void m68000_device::add_w_dpc_dd_ip() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189804,7 +189805,7 @@ void m68000_device::add_w_dpc_dd_ip() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189848,7 +189849,7 @@ void m68000_device::add_w_dpci_dd_ip() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189916,7 +189917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189945,7 +189946,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190020,7 +190021,7 @@ void m68000_device::add_w_imm16_dd_ip() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190069,7 +190070,7 @@ void m68000_device::add_l_ds_dd_ip() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190096,7 +190097,7 @@ void m68000_device::add_l_ds_dd_ip() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190126,7 +190127,7 @@ void m68000_device::add_l_as_dd_ip() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190153,7 +190154,7 @@ void m68000_device::add_l_as_dd_ip() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190181,7 +190182,7 @@ void m68000_device::add_l_ais_dd_ip() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190234,12 +190235,12 @@ void m68000_device::add_l_ais_dd_ip() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190287,7 +190288,7 @@ void m68000_device::add_l_aips_dd_ip() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190343,12 +190344,12 @@ void m68000_device::add_l_aips_dd_ip() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190395,7 +190396,7 @@ void m68000_device::add_l_pais_dd_ip() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190453,12 +190454,12 @@ void m68000_device::add_l_pais_dd_ip() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190530,7 +190531,7 @@ void m68000_device::add_l_das_dd_ip() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190583,12 +190584,12 @@ void m68000_device::add_l_das_dd_ip() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190634,7 +190635,7 @@ void m68000_device::add_l_dais_dd_ip() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190701,7 +190702,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190754,12 +190755,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190833,7 +190834,7 @@ void m68000_device::add_l_adr16_dd_ip() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190886,12 +190887,12 @@ void m68000_device::add_l_adr16_dd_ip() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190989,7 +190990,7 @@ void m68000_device::add_l_adr32_dd_ip() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -191042,12 +191043,12 @@ void m68000_device::add_l_adr32_dd_ip() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191118,7 +191119,7 @@ void m68000_device::add_l_dpc_dd_ip() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191171,12 +191172,12 @@ void m68000_device::add_l_dpc_dd_ip() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191221,7 +191222,7 @@ void m68000_device::add_l_dpci_dd_ip() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191288,7 +191289,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191341,12 +191342,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191446,7 +191447,7 @@ void m68000_device::add_l_imm32_dd_ip() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -191473,7 +191474,7 @@ void m68000_device::add_l_imm32_dd_ip() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -191503,7 +191504,7 @@ void m68000_device::adda_w_ds_ad_ip() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191529,7 +191530,7 @@ void m68000_device::adda_w_ds_ad_ip() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191558,7 +191559,7 @@ void m68000_device::adda_w_as_ad_ip() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191584,7 +191585,7 @@ void m68000_device::adda_w_as_ad_ip() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191611,7 +191612,7 @@ void m68000_device::adda_w_ais_ad_ip() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191640,7 +191641,7 @@ void m68000_device::adda_w_ais_ad_ip() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191666,7 +191667,7 @@ void m68000_device::adda_w_ais_ad_ip() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191699,7 +191700,7 @@ void m68000_device::adda_w_aips_ad_ip() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191726,7 +191727,7 @@ void m68000_device::adda_w_aips_ad_ip() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191752,7 +191753,7 @@ void m68000_device::adda_w_aips_ad_ip() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191787,7 +191788,7 @@ void m68000_device::adda_w_pais_ad_ip() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191814,7 +191815,7 @@ void m68000_device::adda_w_pais_ad_ip() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191840,7 +191841,7 @@ void m68000_device::adda_w_pais_ad_ip() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191892,7 +191893,7 @@ void m68000_device::adda_w_das_ad_ip() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191921,7 +191922,7 @@ void m68000_device::adda_w_das_ad_ip() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191947,7 +191948,7 @@ void m68000_device::adda_w_das_ad_ip() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191972,7 +191973,7 @@ void m68000_device::adda_w_dais_ad_ip() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192040,7 +192041,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192069,7 +192070,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192095,7 +192096,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192148,7 +192149,7 @@ void m68000_device::adda_w_adr16_ad_ip() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -192175,7 +192176,7 @@ void m68000_device::adda_w_adr16_ad_ip() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192201,7 +192202,7 @@ void m68000_device::adda_w_adr16_ad_ip() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192278,7 +192279,7 @@ void m68000_device::adda_w_adr32_ad_ip() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -192305,7 +192306,7 @@ void m68000_device::adda_w_adr32_ad_ip() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192331,7 +192332,7 @@ void m68000_device::adda_w_adr32_ad_ip() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192382,7 +192383,7 @@ void m68000_device::adda_w_dpc_ad_ip() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192411,7 +192412,7 @@ void m68000_device::adda_w_dpc_ad_ip() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192437,7 +192438,7 @@ void m68000_device::adda_w_dpc_ad_ip() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192461,7 +192462,7 @@ void m68000_device::adda_w_dpci_ad_ip() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192529,7 +192530,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192558,7 +192559,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192584,7 +192585,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192639,7 +192640,7 @@ void m68000_device::adda_w_imm16_ad_ip() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192665,7 +192666,7 @@ void m68000_device::adda_w_imm16_ad_ip() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192694,7 +192695,7 @@ void m68000_device::addx_b_ds_dd_ip() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -192702,7 +192703,7 @@ void m68000_device::addx_b_ds_dd_ip() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -192744,16 +192745,16 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192776,7 +192777,7 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192796,7 +192797,7 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192826,7 +192827,7 @@ void m68000_device::addx_b_pais_paid_ip() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -192858,7 +192859,7 @@ void m68000_device::add_b_dd_ais_ip() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192883,7 +192884,7 @@ void m68000_device::add_b_dd_ais_ip() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192950,7 +192951,7 @@ void m68000_device::add_b_dd_aips_ip() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192973,7 +192974,7 @@ void m68000_device::add_b_dd_aips_ip() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193042,7 +193043,7 @@ void m68000_device::add_b_dd_pais_ip() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193065,7 +193066,7 @@ void m68000_device::add_b_dd_pais_ip() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193151,7 +193152,7 @@ void m68000_device::add_b_dd_das_ip() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193176,7 +193177,7 @@ void m68000_device::add_b_dd_das_ip() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193235,7 +193236,7 @@ void m68000_device::add_b_dd_dais_ip() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193303,7 +193304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193328,7 +193329,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193415,7 +193416,7 @@ void m68000_device::add_b_dd_adr16_ip() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -193438,7 +193439,7 @@ void m68000_device::add_b_dd_adr16_ip() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193549,7 +193550,7 @@ void m68000_device::add_b_dd_adr32_ip() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193572,7 +193573,7 @@ void m68000_device::add_b_dd_adr32_ip() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193635,7 +193636,7 @@ void m68000_device::addx_w_ds_dd_ip() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -193643,7 +193644,7 @@ void m68000_device::addx_w_ds_dd_ip() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -193685,16 +193686,16 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -193721,7 +193722,7 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -193745,7 +193746,7 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193775,7 +193776,7 @@ void m68000_device::addx_w_pais_paid_ip() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -193813,7 +193814,7 @@ void m68000_device::add_w_dd_ais_ip() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193842,7 +193843,7 @@ void m68000_device::add_w_dd_ais_ip() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193915,7 +193916,7 @@ void m68000_device::add_w_dd_aips_ip() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193942,7 +193943,7 @@ void m68000_device::add_w_dd_aips_ip() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194017,7 +194018,7 @@ void m68000_device::add_w_dd_pais_ip() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194044,7 +194045,7 @@ void m68000_device::add_w_dd_pais_ip() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194136,7 +194137,7 @@ void m68000_device::add_w_dd_das_ip() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194165,7 +194166,7 @@ void m68000_device::add_w_dd_das_ip() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194230,7 +194231,7 @@ void m68000_device::add_w_dd_dais_ip() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194298,7 +194299,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194327,7 +194328,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194420,7 +194421,7 @@ void m68000_device::add_w_dd_adr16_ip() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -194447,7 +194448,7 @@ void m68000_device::add_w_dd_adr16_ip() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194564,7 +194565,7 @@ void m68000_device::add_w_dd_adr32_ip() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -194591,7 +194592,7 @@ void m68000_device::add_w_dd_adr32_ip() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194660,12 +194661,12 @@ void m68000_device::addx_l_ds_dd_ip() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -194688,7 +194689,7 @@ void m68000_device::addx_l_ds_dd_ip() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -194697,7 +194698,7 @@ void m68000_device::addx_l_ds_dd_ip() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -194719,13 +194720,13 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194749,11 +194750,11 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194778,7 +194779,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194804,7 +194805,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -194832,7 +194833,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -194855,7 +194856,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194885,7 +194886,7 @@ void m68000_device::addx_l_pais_paid_ip() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -194923,7 +194924,7 @@ void m68000_device::add_l_dd_ais_ip() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194976,7 +194977,7 @@ void m68000_device::add_l_dd_ais_ip() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195004,7 +195005,7 @@ void m68000_device::add_l_dd_ais_ip() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195069,7 +195070,7 @@ void m68000_device::add_l_dd_aips_ip() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -195125,7 +195126,7 @@ void m68000_device::add_l_dd_aips_ip() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195153,7 +195154,7 @@ void m68000_device::add_l_dd_aips_ip() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195217,7 +195218,7 @@ void m68000_device::add_l_dd_pais_ip() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195275,7 +195276,7 @@ void m68000_device::add_l_dd_pais_ip() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195303,7 +195304,7 @@ void m68000_device::add_l_dd_pais_ip() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195392,7 +195393,7 @@ void m68000_device::add_l_dd_das_ip() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195445,7 +195446,7 @@ void m68000_device::add_l_dd_das_ip() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195473,7 +195474,7 @@ void m68000_device::add_l_dd_das_ip() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195536,7 +195537,7 @@ void m68000_device::add_l_dd_dais_ip() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195603,7 +195604,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195656,7 +195657,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195684,7 +195685,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195775,7 +195776,7 @@ void m68000_device::add_l_dd_adr16_ip() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195828,7 +195829,7 @@ void m68000_device::add_l_dd_adr16_ip() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195856,7 +195857,7 @@ void m68000_device::add_l_dd_adr16_ip() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195971,7 +195972,7 @@ void m68000_device::add_l_dd_adr32_ip() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -196024,7 +196025,7 @@ void m68000_device::add_l_dd_adr32_ip() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196052,7 +196053,7 @@ void m68000_device::add_l_dd_adr32_ip() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -196119,7 +196120,7 @@ void m68000_device::adda_l_ds_ad_ip() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196145,7 +196146,7 @@ void m68000_device::adda_l_ds_ad_ip() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196174,7 +196175,7 @@ void m68000_device::adda_l_as_ad_ip() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196200,7 +196201,7 @@ void m68000_device::adda_l_as_ad_ip() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196227,7 +196228,7 @@ void m68000_device::adda_l_ais_ad_ip() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196280,11 +196281,11 @@ void m68000_device::adda_l_ais_ad_ip() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196331,7 +196332,7 @@ void m68000_device::adda_l_aips_ad_ip() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196387,11 +196388,11 @@ void m68000_device::adda_l_aips_ad_ip() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196437,7 +196438,7 @@ void m68000_device::adda_l_pais_ad_ip() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -196495,11 +196496,11 @@ void m68000_device::adda_l_pais_ad_ip() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196570,7 +196571,7 @@ void m68000_device::adda_l_das_ad_ip() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196623,11 +196624,11 @@ void m68000_device::adda_l_das_ad_ip() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196672,7 +196673,7 @@ void m68000_device::adda_l_dais_ad_ip() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196739,7 +196740,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196792,11 +196793,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196869,7 +196870,7 @@ void m68000_device::adda_l_adr16_ad_ip() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196922,11 +196923,11 @@ void m68000_device::adda_l_adr16_ad_ip() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197023,7 +197024,7 @@ void m68000_device::adda_l_adr32_ad_ip() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197076,11 +197077,11 @@ void m68000_device::adda_l_adr32_ad_ip() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -197150,7 +197151,7 @@ void m68000_device::adda_l_dpc_ad_ip() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197203,11 +197204,11 @@ void m68000_device::adda_l_dpc_ad_ip() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197251,7 +197252,7 @@ void m68000_device::adda_l_dpci_ad_ip() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -197318,7 +197319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197371,11 +197372,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197474,7 +197475,7 @@ void m68000_device::adda_l_imm32_ad_ip() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -197500,7 +197501,7 @@ void m68000_device::adda_l_imm32_ad_ip() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -197528,13 +197529,13 @@ void m68000_device::asr_b_imm3_ds_ip() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197566,7 +197567,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197600,13 +197601,13 @@ void m68000_device::lsr_b_imm3_ds_ip() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197638,7 +197639,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197672,13 +197673,13 @@ void m68000_device::roxr_b_imm3_ds_ip() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197710,7 +197711,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197744,13 +197745,13 @@ void m68000_device::ror_b_imm3_ds_ip() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197782,7 +197783,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -197817,13 +197818,13 @@ void m68000_device::asr_b_dd_ds_ip() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197855,7 +197856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197890,13 +197891,13 @@ void m68000_device::lsr_b_dd_ds_ip() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197928,7 +197929,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197963,13 +197964,13 @@ void m68000_device::roxr_b_dd_ds_ip() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198001,7 +198002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198036,13 +198037,13 @@ void m68000_device::ror_b_dd_ds_ip() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198074,7 +198075,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198108,13 +198109,13 @@ void m68000_device::asr_w_imm3_ds_ip() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198146,7 +198147,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198180,13 +198181,13 @@ void m68000_device::lsr_w_imm3_ds_ip() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198218,7 +198219,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198252,13 +198253,13 @@ void m68000_device::roxr_w_imm3_ds_ip() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198290,7 +198291,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198324,13 +198325,13 @@ void m68000_device::ror_w_imm3_ds_ip() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198362,7 +198363,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198397,13 +198398,13 @@ void m68000_device::asr_w_dd_ds_ip() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198435,7 +198436,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198470,13 +198471,13 @@ void m68000_device::lsr_w_dd_ds_ip() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198508,7 +198509,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198543,13 +198544,13 @@ void m68000_device::roxr_w_dd_ds_ip() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198581,7 +198582,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198616,13 +198617,13 @@ void m68000_device::ror_w_dd_ds_ip() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198654,7 +198655,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198688,13 +198689,13 @@ void m68000_device::asr_l_imm3_ds_ip() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198726,7 +198727,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198743,7 +198744,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198766,13 +198767,13 @@ void m68000_device::lsr_l_imm3_ds_ip() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198804,7 +198805,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198821,7 +198822,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198844,13 +198845,13 @@ void m68000_device::roxr_l_imm3_ds_ip() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198882,7 +198883,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198899,7 +198900,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198922,13 +198923,13 @@ void m68000_device::ror_l_imm3_ds_ip() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198960,7 +198961,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198977,7 +198978,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199001,13 +199002,13 @@ void m68000_device::asr_l_dd_ds_ip() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199039,7 +199040,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199056,7 +199057,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199080,13 +199081,13 @@ void m68000_device::lsr_l_dd_ds_ip() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199118,7 +199119,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199135,7 +199136,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199159,13 +199160,13 @@ void m68000_device::roxr_l_dd_ds_ip() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199197,7 +199198,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199214,7 +199215,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199238,13 +199239,13 @@ void m68000_device::ror_l_dd_ds_ip() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199276,7 +199277,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -199293,7 +199294,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199315,7 +199316,7 @@ void m68000_device::asr_ais_ip() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199344,12 +199345,12 @@ void m68000_device::asr_ais_ip() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199422,7 +199423,7 @@ void m68000_device::asr_aips_ip() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199449,12 +199450,12 @@ void m68000_device::asr_aips_ip() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199529,7 +199530,7 @@ void m68000_device::asr_pais_ip() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199556,12 +199557,12 @@ void m68000_device::asr_pais_ip() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199653,7 +199654,7 @@ void m68000_device::asr_das_ip() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199682,12 +199683,12 @@ void m68000_device::asr_das_ip() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199752,7 +199753,7 @@ void m68000_device::asr_dais_ip() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -199820,7 +199821,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199849,12 +199850,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199947,7 +199948,7 @@ void m68000_device::asr_adr16_ip() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -199974,12 +199975,12 @@ void m68000_device::asr_adr16_ip() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200096,7 +200097,7 @@ void m68000_device::asr_adr32_ip() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200123,12 +200124,12 @@ void m68000_device::asr_adr32_ip() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200196,13 +200197,13 @@ void m68000_device::asl_b_imm3_ds_ip() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200234,7 +200235,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200268,13 +200269,13 @@ void m68000_device::lsl_b_imm3_ds_ip() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200306,7 +200307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200320,7 +200321,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200341,13 +200342,13 @@ void m68000_device::roxl_b_imm3_ds_ip() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200379,7 +200380,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200413,13 +200414,13 @@ void m68000_device::rol_b_imm3_ds_ip() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200451,7 +200452,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200486,13 +200487,13 @@ void m68000_device::asl_b_dd_ds_ip() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200524,7 +200525,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200559,13 +200560,13 @@ void m68000_device::lsl_b_dd_ds_ip() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200597,7 +200598,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200611,7 +200612,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200633,13 +200634,13 @@ void m68000_device::roxl_b_dd_ds_ip() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200671,7 +200672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200706,13 +200707,13 @@ void m68000_device::rol_b_dd_ds_ip() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200744,7 +200745,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200778,13 +200779,13 @@ void m68000_device::asl_w_imm3_ds_ip() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200816,7 +200817,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200850,13 +200851,13 @@ void m68000_device::lsl_w_imm3_ds_ip() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200888,7 +200889,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200902,7 +200903,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200923,13 +200924,13 @@ void m68000_device::roxl_w_imm3_ds_ip() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200961,7 +200962,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200995,13 +200996,13 @@ void m68000_device::rol_w_imm3_ds_ip() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201033,7 +201034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201068,13 +201069,13 @@ void m68000_device::asl_w_dd_ds_ip() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201106,7 +201107,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201141,13 +201142,13 @@ void m68000_device::lsl_w_dd_ds_ip() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201179,7 +201180,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201193,7 +201194,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -201215,13 +201216,13 @@ void m68000_device::roxl_w_dd_ds_ip() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201253,7 +201254,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201288,13 +201289,13 @@ void m68000_device::rol_w_dd_ds_ip() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201326,7 +201327,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201360,13 +201361,13 @@ void m68000_device::asl_l_imm3_ds_ip() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201398,7 +201399,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201415,7 +201416,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201438,13 +201439,13 @@ void m68000_device::lsl_l_imm3_ds_ip() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201476,7 +201477,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201488,14 +201489,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201518,13 +201519,13 @@ void m68000_device::roxl_l_imm3_ds_ip() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201556,7 +201557,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201573,7 +201574,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201596,13 +201597,13 @@ void m68000_device::rol_l_imm3_ds_ip() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201634,7 +201635,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201651,7 +201652,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201675,13 +201676,13 @@ void m68000_device::asl_l_dd_ds_ip() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201713,7 +201714,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201730,7 +201731,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201754,13 +201755,13 @@ void m68000_device::lsl_l_dd_ds_ip() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201792,7 +201793,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201804,14 +201805,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201835,13 +201836,13 @@ void m68000_device::roxl_l_dd_ds_ip() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201873,7 +201874,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201890,7 +201891,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201914,13 +201915,13 @@ void m68000_device::rol_l_dd_ds_ip() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201952,7 +201953,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201969,7 +201970,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201991,7 +201992,7 @@ void m68000_device::asl_ais_ip() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202020,12 +202021,12 @@ void m68000_device::asl_ais_ip() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202098,7 +202099,7 @@ void m68000_device::asl_aips_ip() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202125,12 +202126,12 @@ void m68000_device::asl_aips_ip() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202205,7 +202206,7 @@ void m68000_device::asl_pais_ip() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202232,12 +202233,12 @@ void m68000_device::asl_pais_ip() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202329,7 +202330,7 @@ void m68000_device::asl_das_ip() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202358,12 +202359,12 @@ void m68000_device::asl_das_ip() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202428,7 +202429,7 @@ void m68000_device::asl_dais_ip() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -202496,7 +202497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202525,12 +202526,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202623,7 +202624,7 @@ void m68000_device::asl_adr16_ip() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -202650,12 +202651,12 @@ void m68000_device::asl_adr16_ip() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202772,7 +202773,7 @@ void m68000_device::asl_adr32_ip() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -202799,12 +202800,12 @@ void m68000_device::asl_adr32_ip() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202871,7 +202872,7 @@ void m68000_device::lsr_ais_ip() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202900,12 +202901,12 @@ void m68000_device::lsr_ais_ip() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202978,7 +202979,7 @@ void m68000_device::lsr_aips_ip() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203005,12 +203006,12 @@ void m68000_device::lsr_aips_ip() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203085,7 +203086,7 @@ void m68000_device::lsr_pais_ip() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203112,12 +203113,12 @@ void m68000_device::lsr_pais_ip() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203209,7 +203210,7 @@ void m68000_device::lsr_das_ip() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203238,12 +203239,12 @@ void m68000_device::lsr_das_ip() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203308,7 +203309,7 @@ void m68000_device::lsr_dais_ip() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -203376,7 +203377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203405,12 +203406,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203503,7 +203504,7 @@ void m68000_device::lsr_adr16_ip() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -203530,12 +203531,12 @@ void m68000_device::lsr_adr16_ip() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203652,7 +203653,7 @@ void m68000_device::lsr_adr32_ip() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -203679,12 +203680,12 @@ void m68000_device::lsr_adr32_ip() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203751,11 +203752,11 @@ void m68000_device::lsl_ais_ip() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -203781,12 +203782,12 @@ void m68000_device::lsl_ais_ip() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203816,7 +203817,7 @@ void m68000_device::lsl_ais_ip() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -203857,12 +203858,12 @@ void m68000_device::lsl_aips_ip() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203889,12 +203890,12 @@ void m68000_device::lsl_aips_ip() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203924,7 +203925,7 @@ void m68000_device::lsl_aips_ip() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -203964,7 +203965,7 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203972,7 +203973,7 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203999,12 +204000,12 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204034,7 +204035,7 @@ void m68000_device::lsl_pais_ip() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204072,7 +204073,7 @@ void m68000_device::lsl_das_ip() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204098,11 +204099,11 @@ void m68000_device::lsl_das_ip() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -204128,12 +204129,12 @@ void m68000_device::lsl_das_ip() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204163,7 +204164,7 @@ void m68000_device::lsl_das_ip() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204199,14 +204200,14 @@ void m68000_device::lsl_dais_ip() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204214,7 +204215,7 @@ void m68000_device::lsl_dais_ip() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204241,7 +204242,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204270,11 +204271,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -204300,12 +204301,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204335,7 +204336,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204375,7 +204376,7 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -204401,7 +204402,7 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -204428,12 +204429,12 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204463,7 +204464,7 @@ void m68000_device::lsl_adr16_ip() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204501,7 +204502,7 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204528,7 +204529,7 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -204554,7 +204555,7 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -204581,12 +204582,12 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204616,7 +204617,7 @@ void m68000_device::lsl_adr32_ip() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204654,7 +204655,7 @@ void m68000_device::roxr_ais_ip() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204683,12 +204684,12 @@ void m68000_device::roxr_ais_ip() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204761,7 +204762,7 @@ void m68000_device::roxr_aips_ip() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204788,12 +204789,12 @@ void m68000_device::roxr_aips_ip() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204868,7 +204869,7 @@ void m68000_device::roxr_pais_ip() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204895,12 +204896,12 @@ void m68000_device::roxr_pais_ip() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204992,7 +204993,7 @@ void m68000_device::roxr_das_ip() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205021,12 +205022,12 @@ void m68000_device::roxr_das_ip() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205091,7 +205092,7 @@ void m68000_device::roxr_dais_ip() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -205159,7 +205160,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205188,12 +205189,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205286,7 +205287,7 @@ void m68000_device::roxr_adr16_ip() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -205313,12 +205314,12 @@ void m68000_device::roxr_adr16_ip() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205435,7 +205436,7 @@ void m68000_device::roxr_adr32_ip() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205462,12 +205463,12 @@ void m68000_device::roxr_adr32_ip() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205534,7 +205535,7 @@ void m68000_device::roxl_ais_ip() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205563,12 +205564,12 @@ void m68000_device::roxl_ais_ip() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205641,7 +205642,7 @@ void m68000_device::roxl_aips_ip() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205668,12 +205669,12 @@ void m68000_device::roxl_aips_ip() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205748,7 +205749,7 @@ void m68000_device::roxl_pais_ip() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205775,12 +205776,12 @@ void m68000_device::roxl_pais_ip() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205872,7 +205873,7 @@ void m68000_device::roxl_das_ip() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205901,12 +205902,12 @@ void m68000_device::roxl_das_ip() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205971,7 +205972,7 @@ void m68000_device::roxl_dais_ip() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206039,7 +206040,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206068,12 +206069,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206166,7 +206167,7 @@ void m68000_device::roxl_adr16_ip() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -206193,12 +206194,12 @@ void m68000_device::roxl_adr16_ip() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206315,7 +206316,7 @@ void m68000_device::roxl_adr32_ip() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -206342,12 +206343,12 @@ void m68000_device::roxl_adr32_ip() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206414,7 +206415,7 @@ void m68000_device::ror_ais_ip() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206443,12 +206444,12 @@ void m68000_device::ror_ais_ip() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206521,7 +206522,7 @@ void m68000_device::ror_aips_ip() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206548,12 +206549,12 @@ void m68000_device::ror_aips_ip() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206628,7 +206629,7 @@ void m68000_device::ror_pais_ip() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206655,12 +206656,12 @@ void m68000_device::ror_pais_ip() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206752,7 +206753,7 @@ void m68000_device::ror_das_ip() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206781,12 +206782,12 @@ void m68000_device::ror_das_ip() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206851,7 +206852,7 @@ void m68000_device::ror_dais_ip() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206919,7 +206920,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206948,12 +206949,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207046,7 +207047,7 @@ void m68000_device::ror_adr16_ip() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207073,12 +207074,12 @@ void m68000_device::ror_adr16_ip() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207195,7 +207196,7 @@ void m68000_device::ror_adr32_ip() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -207222,12 +207223,12 @@ void m68000_device::ror_adr32_ip() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207294,7 +207295,7 @@ void m68000_device::rol_ais_ip() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207323,12 +207324,12 @@ void m68000_device::rol_ais_ip() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207401,7 +207402,7 @@ void m68000_device::rol_aips_ip() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207428,12 +207429,12 @@ void m68000_device::rol_aips_ip() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207508,7 +207509,7 @@ void m68000_device::rol_pais_ip() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207535,12 +207536,12 @@ void m68000_device::rol_pais_ip() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207632,7 +207633,7 @@ void m68000_device::rol_das_ip() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207661,12 +207662,12 @@ void m68000_device::rol_das_ip() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207731,7 +207732,7 @@ void m68000_device::rol_dais_ip() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207799,7 +207800,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207828,12 +207829,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207926,7 +207927,7 @@ void m68000_device::rol_adr16_ip() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207953,12 +207954,12 @@ void m68000_device::rol_adr16_ip() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208075,7 +208076,7 @@ void m68000_device::rol_adr32_ip() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -208102,12 +208103,12 @@ void m68000_device::rol_adr32_ip() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000.cpp b/src/devices/cpu/m68000/m68000.cpp
index 7ebc5731bac..4864c9980ea 100644
--- a/src/devices/cpu/m68000/m68000.cpp
+++ b/src/devices/cpu/m68000/m68000.cpp
@@ -33,6 +33,14 @@ m68000_device::m68000_device(const machine_config &mconfig, device_type type, co
{
}
+void m68000_device::set_current_mmu(mmu *mmu)
+{
+ m_mmu = mmu;
+
+ if(m_mmu)
+ m_mmu->set_super(m_sr & SR_S);
+}
+
void m68000_device::abort_access(u32 reason)
{
m_post_run = reason;
@@ -116,7 +124,7 @@ void m68000_device::execute_run()
m_ipc = m_pc - 2;
m_irdi = m_ird;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(m_ipc);
}
(this->*(m_handlers_f[m_inst_state]))();
@@ -285,9 +293,9 @@ void m68000_device::device_start()
m_post_run = 0;
m_post_run_cycles = 0;
- state_add(STATE_GENPCBASE, "PC", m_ipc).callimport();
- state_add(STATE_GENPC, "rPC", m_pc);
- state_add(M68K_IR, "IR", m_ir);
+ state_add(STATE_GENPCBASE, "CURPC", m_ipc).callimport();
+ state_add(STATE_GENPC, "PC", m_pc).callimport();
+ state_add(M68K_IR, "IR", m_ir);
state_add(STATE_GENFLAGS, "GENFLAGS", m_sr).noshow().callexport().formatstr("%16s");
state_add(M68K_SR, "SR", m_sr).callimport();
for(int r = 0; r != 8; r++)
@@ -303,11 +311,15 @@ void m68000_device::device_start()
void m68000_device::state_import(const device_state_entry &entry)
{
switch(entry.index()) {
+ case STATE_GENPC:
+ m_ipc = m_pc;
+ [[fallthrough]];
+
case STATE_GENPCBASE: {
m_pc = m_ipc+2;
m_au = m_ipc+4;
auto dis = machine().disable_side_effects();
- m_ir = m_ird = m_opcodes.read_word(m_ipc);
+ m_ir = m_ird = m_irdi = m_opcodes.read_word(m_ipc);
m_irc = m_dbin = m_opcodes.read_word(m_pc);
set_ftu_const();
m_inst_state = m_decode_table[m_ird];
diff --git a/src/devices/cpu/m68000/m68000.h b/src/devices/cpu/m68000/m68000.h
index 3d1b939d814..2279622d896 100644
--- a/src/devices/cpu/m68000/m68000.h
+++ b/src/devices/cpu/m68000/m68000.h
@@ -40,8 +40,8 @@ public:
virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
virtual space_config_vector memory_space_config() const override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
void set_current_mmu(mmu *m);
@@ -188,7 +188,7 @@ protected:
void do_post_run();
// cpu space map with autovectors
- void default_autovectors_map(address_map &map);
+ void default_autovectors_map(address_map &map) ATTR_COLD;
// helper for interrupt vector access
void start_interrupt_vector_lookup();
diff --git a/src/devices/cpu/m68000/m68000gen.py b/src/devices/cpu/m68000/m68000gen.py
index fa2310d7900..35412cb2db1 100755
--- a/src/devices/cpu/m68000/m68000gen.py
+++ b/src/devices/cpu/m68000/m68000gen.py
@@ -1,4 +1,4 @@
-#!/bin/python
+#!/bin/python3
# m68000 emulation code generator
@@ -975,109 +975,109 @@ def generate_base_code_for_microcode(ir, irmask, madr, tvn, group01):
rx_is_usp = (ir & 0xfff0) == 0x4e60
rx_is_movem = (ir & 0xf100) == 0x4000 and (ir & 0xffc0) != 0x4840 and (ir & 0xff00) != 0x4e00
movem_pre_decr = (ir & 0xf138) == 0x4020 and (ir & 0xffc0) != 0x4840 and (ir & 0xff00) != 0x4e00
- is_byte = ((((ir & 0x01c0) == 0x0000 or (ir & 0x0038) != 0x0000) and (ir & 0xf0c0) == 0x0000) and (ir & 0x0ff0) != 0x0800) \
- or (ir & 0xf1f8) == 0x0148 \
- or ((ir & 0xf100) == 0x0100 and (ir & 0x0030) != 0x0000) \
- or ((ir & 0xff00) == 0x0800 and (ir & 0x0030) != 0x0000) \
- or (ir & 0xf000) == 0x1000 \
- or (ir & 0xe0c0) == 0x4000 \
- or (ir & 0xe0c0) == 0x8000 \
- or (ir & 0xf0c0) == 0xb000 \
- or (ir & 0xf0c0) == 0xb000 \
- or (ir & 0xe0c0) == 0xc000 \
- or (ir & 0xf0c0) == 0xe000 \
- or (ir & 0xffc0) == 0x4ac0 \
- or (ir & 0xf0f8) == 0x50c0 \
- or (ir & 0xf0f0) == 0x50d0 \
- or (ir & 0xf0e0) == 0x50e0
+ is_byte = (((((ir & 0x01c0) == 0x0000 or (ir & 0x0038) != 0x0000) and (ir & 0xf0c0) == 0x0000) and (ir & 0x0ff0) != 0x0800)
+ or (ir & 0xf1f8) == 0x0148
+ or ((ir & 0xf100) == 0x0100 and (ir & 0x0030) != 0x0000)
+ or ((ir & 0xff00) == 0x0800 and (ir & 0x0030) != 0x0000)
+ or (ir & 0xf000) == 0x1000
+ or (ir & 0xe0c0) == 0x4000
+ or (ir & 0xe0c0) == 0x8000
+ or (ir & 0xf0c0) == 0xb000
+ or (ir & 0xf0c0) == 0xb000
+ or (ir & 0xe0c0) == 0xc000
+ or (ir & 0xf0c0) == 0xe000
+ or (ir & 0xffc0) == 0x4ac0
+ or (ir & 0xf0f8) == 0x50c0
+ or (ir & 0xf0f0) == 0x50d0
+ or (ir & 0xf0e0) == 0x50e0)
is_movep = (ir & 0xf138) == 0x0108
- rx_is_areg = ((ir & 0x3000) != 0x0000 and (ir & 0xc000) == 0x0000 and (ir & 0x01c0) >= 0x0040) \
- or (ir & 0xf1c0) == 0x41c0 \
- or (ir & 0xff00) == 0x6100 \
- or (ir & 0xa1b8) == 0x8108 \
- or ((ir & 0x90c0) == 0x90c0 and (ir & 0xf000) != 0xf000) \
- or (ir & 0xd138) == 0x9108 \
- or (ir & 0xf138) == 0xd108
- ry_is_areg = ((ir & 0x6000) != 0x6000 and (ir & 0x0038) != 0x0000 and (ir & 0x0038) != 0x0038 and (ir & 0xf0f8) != 0x50c8) \
- or ((ir & 0xf000) == 0xf000 and (ir & 0x0038) != 0x0000 and (ir & 0x0038) != 0x0038) \
- or (ir & 0xf0c0) == 0xe0c0
- macro_tvn = 6 if (ir & 0xf040) == 0x4000 else \
- "trap-tvn" if (ir & 0xf060) == 0x4040 else \
- 7 if (ir & 0xf060) == 0x4060 else \
- 5
+ rx_is_areg = (((ir & 0x3000) != 0x0000 and (ir & 0xc000) == 0x0000 and (ir & 0x01c0) >= 0x0040)
+ or (ir & 0xf1c0) == 0x41c0
+ or (ir & 0xff00) == 0x6100
+ or (ir & 0xa1b8) == 0x8108
+ or ((ir & 0x90c0) == 0x90c0 and (ir & 0xf000) != 0xf000)
+ or (ir & 0xd138) == 0x9108
+ or (ir & 0xf138) == 0xd108)
+ ry_is_areg = (((ir & 0x6000) != 0x6000 and (ir & 0x0038) != 0x0000 and (ir & 0x0038) != 0x0038 and (ir & 0xf0f8) != 0x50c8)
+ or ((ir & 0xf000) == 0xf000 and (ir & 0x0038) != 0x0000 and (ir & 0x0038) != 0x0038)
+ or (ir & 0xf0c0) == 0xe0c0)
+ macro_tvn = (6 if (ir & 0xf040) == 0x4000 else
+ "trap-tvn" if (ir & 0xf060) == 0x4040 else
+ 7 if (ir & 0xf060) == 0x4060 else
+ 5)
inhibit_ccr = (ir & 0xe1c0) == 0x2040 or (ir & 0xf038) == 0x5008 or (ir & 0xb0c0) == 0x90c0
# decode of the instruction for the ALU
alu_row = 0
if (ir & 0xf0c0) == 0x80c0:
alu_row = 1
- if (ir & 0xff00) == 0x0600 \
- or ((ir & 0xc000) == 0x0000 and (ir & 0x3000) != 0x0000) \
- or ((ir & 0xf100) == 0x5000 and (ir & 0x00c0) != 0x00c0) \
- or (ir & 0xf000) == 0x7000 \
- or ((ir & 0xf000) == 0xd000 and ((ir & 0x0100) == 0x0000 or (ir & 0x00c0) == 0x00c0 or (ir & 0x0030) != 0x0000)) \
- or ((ir & 0xf118) == 0xe000 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf7c0) == 0xe0c0):
+ if ((ir & 0xff00) == 0x0600
+ or ((ir & 0xc000) == 0x0000 and (ir & 0x3000) != 0x0000)
+ or ((ir & 0xf100) == 0x5000 and (ir & 0x00c0) != 0x00c0)
+ or (ir & 0xf000) == 0x7000
+ or ((ir & 0xf000) == 0xd000 and ((ir & 0x0100) == 0x0000 or (ir & 0x00c0) == 0x00c0 or (ir & 0x0030) != 0x0000))
+ or ((ir & 0xf118) == 0xe000 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf7c0) == 0xe0c0)):
alu_row = 2
- if ((ir & 0xf130) == 0xc100 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf118) == 0xe100 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf7c0) == 0xe1c0):
+ if (((ir & 0xf130) == 0xc100 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf118) == 0xe100 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf7c0) == 0xe1c0)):
alu_row = 3
- if (ir & 0xbf00) == 0x0200 \
- or ((ir & 0xf130) == 0xc000 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf000) == 0xc000 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0030) != 0x0000) \
- or ((ir & 0xf118) == 0xe108 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf7c0) == 0xe3c0):
+ if ((ir & 0xbf00) == 0x0200
+ or ((ir & 0xf130) == 0xc000 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf000) == 0xc000 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0030) != 0x0000)
+ or ((ir & 0xf118) == 0xe108 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf7c0) == 0xe3c0)):
alu_row = 4
- if (ir & 0xbf00) == 0x0400 \
- or ((ir & 0xf100) == 0x5100 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf000) == 0x9000 and ((ir & 0x0100) == 0x0000 or (ir & 0x00c0) == 0x00c0 or (ir & 0x0030) != 0x0000)) \
- or ((ir & 0xf118) == 0xe008 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf7c0) == 0xe2c0):
+ if ((ir & 0xbf00) == 0x0400
+ or ((ir & 0xf100) == 0x5100 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf000) == 0x9000 and ((ir & 0x0100) == 0x0000 or (ir & 0x00c0) == 0x00c0 or (ir & 0x0030) != 0x0000))
+ or ((ir & 0xf118) == 0xe008 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf7c0) == 0xe2c0)):
alu_row = 5
- if (ir & 0xff00) == 0x0c00 \
- or (ir & 0xf100) == 0x4100 \
- or ((ir & 0xf000) == 0xb000 and ((ir & 0x0100) == 0x0000 or (ir & 0x0038) == 0x0008 or (ir & 0x00c0) == 0x00c0)):
+ if ((ir & 0xff00) == 0x0c00
+ or (ir & 0xf100) == 0x4100
+ or ((ir & 0xf000) == 0xb000 and ((ir & 0x0100) == 0x0000 or (ir & 0x0038) == 0x0008 or (ir & 0x00c0) == 0x00c0))):
alu_row = 6
if (ir & 0xf0c0) == 0xc0c0:
alu_row = 7
- if (ir & 0xff80) == 0x4880 \
- or ((ir & 0xf118) == 0xe010 and (ir & 0x00c0) != 0x00c0) \
- or (ir & 0xf7c0) == 0xe4c0:
+ if ((ir & 0xff80) == 0x4880
+ or ((ir & 0xf118) == 0xe010 and (ir & 0x00c0) != 0x00c0)
+ or (ir & 0xf7c0) == 0xe4c0):
alu_row = 8
- if (ir & 0xff80) == 0x4800 \
- or ((ir & 0xf130) == 0x8100 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf118) == 0xe118 and (ir & 0x00c0) != 0x00c0) \
- or (ir & 0xf7c0) == 0xe7c0:
+ if ((ir & 0xff80) == 0x4800
+ or ((ir & 0xf130) == 0x8100 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf118) == 0xe118 and (ir & 0x00c0) != 0x00c0)
+ or (ir & 0xf7c0) == 0xe7c0):
alu_row = 9
- if (ir & 0xff00) == 0x4000 \
- or ((ir & 0xf130) == 0x9100 and (ir & 0x00c0) != 0x00c0) \
- or ((ir & 0xf118) == 0xe018 and (ir & 0x00c0) != 0x00c0) \
- or (ir & 0xf7c0) == 0xe6c0:
+ if ((ir & 0xff00) == 0x4000
+ or ((ir & 0xf130) == 0x9100 and (ir & 0x00c0) != 0x00c0)
+ or ((ir & 0xf118) == 0xe018 and (ir & 0x00c0) != 0x00c0)
+ or (ir & 0xf7c0) == 0xe6c0):
alu_row = 10
- if (ir & 0xff00) == 0x4600 \
- or ((ir & 0xf118) == 0xe110 and (ir & 0x00c0) != 0x00c0) \
- or (ir & 0xf7c0) == 0xe5c0:
+ if ((ir & 0xff00) == 0x4600
+ or ((ir & 0xf118) == 0xe110 and (ir & 0x00c0) != 0x00c0)
+ or (ir & 0xf7c0) == 0xe5c0):
alu_row = 11
if ((ir & 0xf130) == 0xd100 and (ir & 0x00c0) != 0x00c0):
alu_row = 12
- if (ir & 0xf180) == 0x0100 \
- or (ir & 0xff80) == 0x0800 \
- or (ir & 0xff00) == 0x0a00 \
- or ((ir & 0xf100) == 0xb100 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0038) != 0x0008):
+ if ((ir & 0xf180) == 0x0100
+ or (ir & 0xff80) == 0x0800
+ or (ir & 0xff00) == 0x0a00
+ or ((ir & 0xf100) == 0xb100 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0038) != 0x0008)):
alu_row = 13
- if (ir & 0xff00) == 0x0000 \
- or (ir & 0xf180) == 0x0180 \
- or (ir & 0xff80) == 0x0880 \
- or ((ir & 0xf000) == 0x8000 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0130) != 0x0100):
+ if ((ir & 0xff00) == 0x0000
+ or (ir & 0xf180) == 0x0180
+ or (ir & 0xff80) == 0x0880
+ or ((ir & 0xf000) == 0x8000 and (ir & 0x00c0) != 0x00c0 and (ir & 0x0130) != 0x0100)):
alu_row = 14
- if (ir & 0xff00) == 0x4a00 \
- or (ir & 0xf0c0) == 0x50c0:
+ if ((ir & 0xff00) == 0x4a00
+ or (ir & 0xf0c0) == 0x50c0):
alu_row = 15
- no_ccr_en = (ir & 0xe1c0) == 0x2040 \
- or (ir & 0xf038) == 0x5008 \
- or (ir & 0xb0c0) == 0x90c0
+ no_ccr_en = ((ir & 0xe1c0) == 0x2040
+ or (ir & 0xf038) == 0x5008
+ or (ir & 0xb0c0) == 0x90c0)
# decode on the nanocode
perm_start = nanox(nano, 63, 2) != 0
@@ -1688,23 +1688,23 @@ def generate_base_code_for_microcode(ir, irmask, madr, tvn, group01):
alu_init = False
alu_finish = False
if True:
- code_to_sort.append(["i", \
- "// alu r=%d c=%d m=%c%c%c%c%c i=%c%c%c%c%c%c%c %s a=%s d=%s" % \
- (alu_row, alu_column, \
- 'x' if alu_mask & 0x10 else '.', \
- 'n' if alu_mask & 0x08 else '.', \
- 'z' if alu_mask & 0x04 else '.', \
- 'v' if alu_mask & 0x02 else '.', \
- 'c' if alu_mask & 0x01 else '.', \
- 'b' if alu_info & ALUInfo.is_byte else '.', \
- 'l' if alu_info & ALUInfo.is_long else '.', \
- 'm' if alu_info & ALUInfo.is_mul else '.', \
- 'd' if alu_info & ALUInfo.is_div else '.', \
- 'r' if alu_info & ALUInfo.is_rox_and else '.', \
- 'i' if alu_info & ALUInfo.init else '.', \
- 'f' if alu_info & ALUInfo.finish else '.', \
- alu_op, \
- "alub" if alu_actrl else "%s:%s" % (abd, regname[abd]) if abd != None else "none", \
+ code_to_sort.append(["i",
+ "// alu r=%d c=%d m=%c%c%c%c%c i=%c%c%c%c%c%c%c %s a=%s d=%s" %
+ (alu_row, alu_column,
+ 'x' if alu_mask & 0x10 else '.',
+ 'n' if alu_mask & 0x08 else '.',
+ 'z' if alu_mask & 0x04 else '.',
+ 'v' if alu_mask & 0x02 else '.',
+ 'c' if alu_mask & 0x01 else '.',
+ 'b' if alu_info & ALUInfo.is_byte else '.',
+ 'l' if alu_info & ALUInfo.is_long else '.',
+ 'm' if alu_info & ALUInfo.is_mul else '.',
+ 'd' if alu_info & ALUInfo.is_div else '.',
+ 'r' if alu_info & ALUInfo.is_rox_and else '.',
+ 'i' if alu_info & ALUInfo.init else '.',
+ 'f' if alu_info & ALUInfo.finish else '.',
+ alu_op,
+ "alub" if alu_actrl else "%s:%s" % (abd, regname[abd]) if abd != None else "none",
("%s:%s" % (dbd, regname[dbd]) if dbd != None else "none") if alu_dctrl == 0 else "0" if alu_dctrl == 2 else "-1" if alu_dctrl == 3 else "?")])
if (alu_actrl or abd != None or alu_op == ALU.over) and alu_single_param[alu_op]:
code_to_sort.append(["alu", alu_op, alu_mask, alu_info, (abd if abd else ["c", 0]) if alu_op == ALU.over else R.alub if alu_actrl else abd])
@@ -1893,7 +1893,7 @@ def generate_code_from_blocks(blocks, ir, irmask, tvn, priv, group01):
if len(b[3]) == 0:
if cb[-1][0] != "set_trace":
# stop #nnnn case, which loops on itself transparently
- cb.append(["next"])
+ cb.append(["next_stop"])
else:
cb[-1][0] = "next_trace"
elif b[3][0] == ib:
@@ -2285,10 +2285,12 @@ def generate_source_from_code(code, gen_mode):
source.append("\tsr_%s();" % aflags)
elif ci[0] == "=t":
source.append("\tm_t = %s;" % ci[1])
- elif ci[0] == "next" or ci[0] == "next_trace":
+ elif ci[0] == "next_stop" or ci[0] == "next_trace":
source.append("\tm_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];")
if not (gen_mode & GEN.full):
source.append("\tm_inst_substate = 0;")
+ if ci[0] == "next_stop":
+ source.append("\tdebugger_wait_hook();")
if ci[0] == "next_trace":
source.append("\tif(m_sr & SR_T)")
source.append("\t\tm_next_state = S_TRACE;")
diff --git a/src/devices/cpu/m68000/m68000mcu-sdfm.cpp b/src/devices/cpu/m68000/m68000mcu-sdfm.cpp
index b179da1113d..6bea4e0676c 100644
--- a/src/devices/cpu/m68000/m68000mcu-sdfm.cpp
+++ b/src/devices/cpu/m68000/m68000mcu-sdfm.cpp
@@ -185,7 +185,7 @@ void m68000_mcu_device::state_bus_error_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195,7 +195,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -218,7 +218,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -240,7 +240,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -266,7 +266,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -288,7 +288,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -313,7 +313,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -336,7 +336,7 @@ void m68000_mcu_device::state_bus_error_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -464,7 +464,7 @@ void m68000_mcu_device::state_address_error_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -474,7 +474,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -497,7 +497,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -519,7 +519,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -545,7 +545,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -567,7 +567,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -592,7 +592,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -615,7 +615,7 @@ void m68000_mcu_device::state_address_error_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -750,7 +750,7 @@ void m68000_mcu_device::state_interrupt_dfm()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -762,7 +762,7 @@ void m68000_mcu_device::state_interrupt_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -818,7 +818,7 @@ void m68000_mcu_device::state_interrupt_dfm()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -841,7 +841,7 @@ void m68000_mcu_device::state_interrupt_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -967,7 +967,7 @@ void m68000_mcu_device::state_trace_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -977,7 +977,7 @@ void m68000_mcu_device::state_trace_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1002,7 +1002,7 @@ void m68000_mcu_device::state_trace_dfm()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1025,7 +1025,7 @@ void m68000_mcu_device::state_trace_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1151,7 +1151,7 @@ void m68000_mcu_device::state_illegal_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1161,7 +1161,7 @@ void m68000_mcu_device::state_illegal_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1186,7 +1186,7 @@ void m68000_mcu_device::state_illegal_dfm()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1209,7 +1209,7 @@ void m68000_mcu_device::state_illegal_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1335,7 +1335,7 @@ void m68000_mcu_device::state_priviledge_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1345,7 +1345,7 @@ void m68000_mcu_device::state_priviledge_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1370,7 +1370,7 @@ void m68000_mcu_device::state_priviledge_dfm()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1393,7 +1393,7 @@ void m68000_mcu_device::state_priviledge_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1519,7 +1519,7 @@ void m68000_mcu_device::state_linea_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1529,7 +1529,7 @@ void m68000_mcu_device::state_linea_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1554,7 +1554,7 @@ void m68000_mcu_device::state_linea_dfm()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1577,7 +1577,7 @@ void m68000_mcu_device::state_linea_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1703,7 +1703,7 @@ void m68000_mcu_device::state_linef_dfm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1713,7 +1713,7 @@ void m68000_mcu_device::state_linef_dfm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1738,7 +1738,7 @@ void m68000_mcu_device::state_linef_dfm()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1761,7 +1761,7 @@ void m68000_mcu_device::state_linef_dfm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -1884,7 +1884,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dfm() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1907,7 +1907,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dfm() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -1915,7 +1915,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dfm() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1949,7 +1949,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dfm() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -1971,11 +1971,11 @@ void m68000_mcu_device::ori_b_imm8_ais_dfm() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -1995,7 +1995,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dfm() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2022,7 +2022,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dfm() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2049,7 +2049,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dfm() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2074,12 +2074,12 @@ void m68000_mcu_device::ori_b_imm8_aips_dfm() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2100,7 +2100,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dfm() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2127,7 +2127,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dfm() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2154,7 +2154,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dfm() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2178,7 +2178,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dfm() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2186,7 +2186,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dfm() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2207,7 +2207,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dfm() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2234,7 +2234,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dfm() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2261,7 +2261,7 @@ void m68000_mcu_device::ori_b_imm8_das_dfm() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2283,7 +2283,7 @@ void m68000_mcu_device::ori_b_imm8_das_dfm() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2306,11 +2306,11 @@ void m68000_mcu_device::ori_b_imm8_das_dfm() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2330,7 +2330,7 @@ void m68000_mcu_device::ori_b_imm8_das_dfm() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2357,7 +2357,7 @@ void m68000_mcu_device::ori_b_imm8_das_dfm() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2384,7 +2384,7 @@ void m68000_mcu_device::ori_b_imm8_dais_dfm() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2404,14 +2404,14 @@ void m68000_mcu_device::ori_b_imm8_dais_dfm() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2419,7 +2419,7 @@ void m68000_mcu_device::ori_b_imm8_dais_dfm() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2443,7 +2443,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2469,11 +2469,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2493,7 +2493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2520,7 +2520,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2546,7 +2546,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dfm() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2571,7 +2571,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dfm() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2594,7 +2594,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dfm() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2615,7 +2615,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dfm() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2642,7 +2642,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dfm() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2668,7 +2668,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2691,7 +2691,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2715,7 +2715,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2738,7 +2738,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2759,7 +2759,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2786,7 +2786,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dfm() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2812,7 +2812,7 @@ void m68000_mcu_device::ori_imm8_ccr_dfm() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2834,21 +2834,21 @@ void m68000_mcu_device::ori_imm8_ccr_dfm() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -2856,7 +2856,7 @@ void m68000_mcu_device::ori_imm8_ccr_dfm() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2880,11 +2880,11 @@ void m68000_mcu_device::ori_imm8_ccr_dfm() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2918,7 +2918,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dfm() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2941,7 +2941,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dfm() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2949,7 +2949,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dfm() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -2983,7 +2983,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dfm() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3005,11 +3005,11 @@ void m68000_mcu_device::ori_w_imm16_ais_dfm() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3032,7 +3032,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dfm() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3059,7 +3059,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dfm() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3091,7 +3091,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dfm() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3116,12 +3116,12 @@ void m68000_mcu_device::ori_w_imm16_aips_dfm() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3145,7 +3145,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dfm() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3172,7 +3172,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dfm() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3204,7 +3204,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dfm() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3228,7 +3228,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dfm() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3236,7 +3236,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dfm() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3260,7 +3260,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dfm() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3287,7 +3287,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dfm() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3319,7 +3319,7 @@ void m68000_mcu_device::ori_w_imm16_das_dfm() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3341,7 +3341,7 @@ void m68000_mcu_device::ori_w_imm16_das_dfm() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3364,11 +3364,11 @@ void m68000_mcu_device::ori_w_imm16_das_dfm() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3391,7 +3391,7 @@ void m68000_mcu_device::ori_w_imm16_das_dfm() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3418,7 +3418,7 @@ void m68000_mcu_device::ori_w_imm16_das_dfm() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3450,7 +3450,7 @@ void m68000_mcu_device::ori_w_imm16_dais_dfm() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3470,14 +3470,14 @@ void m68000_mcu_device::ori_w_imm16_dais_dfm() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3485,7 +3485,7 @@ void m68000_mcu_device::ori_w_imm16_dais_dfm() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3509,7 +3509,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3535,11 +3535,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3562,7 +3562,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3589,7 +3589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3620,7 +3620,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dfm() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3645,7 +3645,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dfm() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3668,7 +3668,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dfm() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3692,7 +3692,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dfm() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3719,7 +3719,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dfm() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3750,7 +3750,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3773,7 +3773,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3797,7 +3797,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3820,7 +3820,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3844,7 +3844,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3871,7 +3871,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dfm() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -3906,7 +3906,7 @@ void m68000_mcu_device::ori_i16u_sr_dfm() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3928,23 +3928,23 @@ void m68000_mcu_device::ori_i16u_sr_dfm() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3952,7 +3952,7 @@ void m68000_mcu_device::ori_i16u_sr_dfm() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -3976,11 +3976,11 @@ void m68000_mcu_device::ori_i16u_sr_dfm() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4013,7 +4013,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dfm() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4036,7 +4036,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dfm() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4059,12 +4059,12 @@ void m68000_mcu_device::ori_l_imm32_ds_dfm() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4084,7 +4084,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dfm() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4093,7 +4093,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dfm() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4109,7 +4109,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4132,7 +4132,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4154,7 +4154,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4179,7 +4179,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4202,7 +4202,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4227,7 +4227,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4252,7 +4252,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dfm() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4283,7 +4283,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4306,7 +4306,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4328,7 +4328,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4353,11 +4353,11 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4380,7 +4380,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4405,7 +4405,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4430,7 +4430,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dfm() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4461,7 +4461,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4484,7 +4484,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4505,14 +4505,14 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4536,7 +4536,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4559,7 +4559,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4584,7 +4584,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4609,7 +4609,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dfm() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4640,7 +4640,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4663,7 +4663,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4685,7 +4685,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4707,7 +4707,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4732,7 +4732,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4755,7 +4755,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4780,7 +4780,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4805,7 +4805,7 @@ void m68000_mcu_device::ori_l_imm32_das_dfm() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dfm() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4859,7 +4859,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dfm() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4879,14 +4879,14 @@ void m68000_mcu_device::ori_l_imm32_dais_dfm() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -4894,7 +4894,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dfm() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4918,7 +4918,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4943,7 +4943,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4968,7 +4968,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -4991,7 +4991,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5016,7 +5016,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5041,7 +5041,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5071,7 +5071,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5094,7 +5094,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5119,7 +5119,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5142,7 +5142,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5167,7 +5167,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5190,7 +5190,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5215,7 +5215,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5240,7 +5240,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dfm() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5270,7 +5270,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5293,7 +5293,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5316,7 +5316,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5340,7 +5340,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5363,7 +5363,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5388,7 +5388,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5411,7 +5411,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5436,7 +5436,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5461,7 +5461,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dfm() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -5496,13 +5496,13 @@ void m68000_mcu_device::btst_dd_ds_dfm() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5531,7 +5531,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5544,7 +5544,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5562,7 +5562,7 @@ void m68000_mcu_device::movep_w_das_dd_dfm() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5584,7 +5584,7 @@ void m68000_mcu_device::movep_w_das_dd_dfm() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5603,7 +5603,7 @@ void m68000_mcu_device::movep_w_das_dd_dfm() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5625,7 +5625,7 @@ void m68000_mcu_device::movep_w_das_dd_dfm() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5658,11 +5658,11 @@ void m68000_mcu_device::btst_dd_ais_dfm() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5682,13 +5682,13 @@ void m68000_mcu_device::btst_dd_ais_dfm() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5724,12 +5724,12 @@ void m68000_mcu_device::btst_dd_aips_dfm() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5750,13 +5750,13 @@ void m68000_mcu_device::btst_dd_aips_dfm() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5791,7 +5791,7 @@ void m68000_mcu_device::btst_dd_pais_dfm() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -5799,7 +5799,7 @@ void m68000_mcu_device::btst_dd_pais_dfm() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5820,13 +5820,13 @@ void m68000_mcu_device::btst_dd_pais_dfm() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5859,7 +5859,7 @@ void m68000_mcu_device::btst_dd_das_dfm() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5882,11 +5882,11 @@ void m68000_mcu_device::btst_dd_das_dfm() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5906,13 +5906,13 @@ void m68000_mcu_device::btst_dd_das_dfm() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5943,14 +5943,14 @@ void m68000_mcu_device::btst_dd_dais_dfm() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5958,7 +5958,7 @@ void m68000_mcu_device::btst_dd_dais_dfm() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -5982,7 +5982,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6008,11 +6008,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6032,13 +6032,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6073,7 +6073,7 @@ void m68000_mcu_device::btst_dd_adr16_dfm() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6096,7 +6096,7 @@ void m68000_mcu_device::btst_dd_adr16_dfm() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6117,13 +6117,13 @@ void m68000_mcu_device::btst_dd_adr16_dfm() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6156,7 +6156,7 @@ void m68000_mcu_device::btst_dd_adr32_dfm() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6180,7 +6180,7 @@ void m68000_mcu_device::btst_dd_adr32_dfm() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6203,7 +6203,7 @@ void m68000_mcu_device::btst_dd_adr32_dfm() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6224,13 +6224,13 @@ void m68000_mcu_device::btst_dd_adr32_dfm() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6262,7 +6262,7 @@ void m68000_mcu_device::btst_dd_dpc_dfm() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6285,11 +6285,11 @@ void m68000_mcu_device::btst_dd_dpc_dfm() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6309,13 +6309,13 @@ void m68000_mcu_device::btst_dd_dpc_dfm() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6345,14 +6345,14 @@ void m68000_mcu_device::btst_dd_dpci_dfm() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6360,7 +6360,7 @@ void m68000_mcu_device::btst_dd_dpci_dfm() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6384,7 +6384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6410,11 +6410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6434,13 +6434,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6475,7 +6475,7 @@ void m68000_mcu_device::btst_dd_imm_dfm() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6500,12 +6500,12 @@ void m68000_mcu_device::btst_dd_imm_dfm() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6534,7 +6534,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6547,7 +6547,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6569,13 +6569,13 @@ void m68000_mcu_device::bchg_dd_ds_dfm() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6604,7 +6604,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6616,14 +6616,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6641,7 +6641,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6663,7 +6663,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6681,7 +6681,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6700,7 +6700,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6719,7 +6719,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6741,7 +6741,7 @@ void m68000_mcu_device::movep_l_das_dd_dfm() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -6774,11 +6774,11 @@ void m68000_mcu_device::bchg_dd_ais_dfm() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6799,7 +6799,7 @@ void m68000_mcu_device::bchg_dd_ais_dfm() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6824,7 +6824,7 @@ void m68000_mcu_device::bchg_dd_ais_dfm() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6855,12 +6855,12 @@ void m68000_mcu_device::bchg_dd_aips_dfm() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6882,7 +6882,7 @@ void m68000_mcu_device::bchg_dd_aips_dfm() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6907,7 +6907,7 @@ void m68000_mcu_device::bchg_dd_aips_dfm() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6937,7 +6937,7 @@ void m68000_mcu_device::bchg_dd_pais_dfm() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6945,7 +6945,7 @@ void m68000_mcu_device::bchg_dd_pais_dfm() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6967,7 +6967,7 @@ void m68000_mcu_device::bchg_dd_pais_dfm() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6992,7 +6992,7 @@ void m68000_mcu_device::bchg_dd_pais_dfm() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7020,7 +7020,7 @@ void m68000_mcu_device::bchg_dd_das_dfm() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7043,11 +7043,11 @@ void m68000_mcu_device::bchg_dd_das_dfm() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7068,7 +7068,7 @@ void m68000_mcu_device::bchg_dd_das_dfm() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7093,7 +7093,7 @@ void m68000_mcu_device::bchg_dd_das_dfm() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7119,14 +7119,14 @@ void m68000_mcu_device::bchg_dd_dais_dfm() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7134,7 +7134,7 @@ void m68000_mcu_device::bchg_dd_dais_dfm() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7158,7 +7158,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7184,11 +7184,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7209,7 +7209,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7234,7 +7234,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7264,7 +7264,7 @@ void m68000_mcu_device::bchg_dd_adr16_dfm() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7287,7 +7287,7 @@ void m68000_mcu_device::bchg_dd_adr16_dfm() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,7 +7309,7 @@ void m68000_mcu_device::bchg_dd_adr16_dfm() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7334,7 +7334,7 @@ void m68000_mcu_device::bchg_dd_adr16_dfm() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7362,7 +7362,7 @@ void m68000_mcu_device::bchg_dd_adr32_dfm() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7386,7 +7386,7 @@ void m68000_mcu_device::bchg_dd_adr32_dfm() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7409,7 +7409,7 @@ void m68000_mcu_device::bchg_dd_adr32_dfm() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7431,7 +7431,7 @@ void m68000_mcu_device::bchg_dd_adr32_dfm() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7456,7 +7456,7 @@ void m68000_mcu_device::bchg_dd_adr32_dfm() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7488,13 +7488,13 @@ void m68000_mcu_device::bclr_dd_ds_dfm() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7520,14 +7520,14 @@ void m68000_mcu_device::bclr_dd_ds_dfm() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7539,18 +7539,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7568,7 +7568,7 @@ void m68000_mcu_device::movep_w_dd_das_dfm() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7592,7 +7592,7 @@ void m68000_mcu_device::movep_w_dd_das_dfm() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7608,7 +7608,7 @@ void m68000_mcu_device::movep_w_dd_das_dfm() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7625,11 +7625,11 @@ void m68000_mcu_device::movep_w_dd_das_dfm() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7662,11 +7662,11 @@ void m68000_mcu_device::bclr_dd_ais_dfm() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7686,12 +7686,12 @@ void m68000_mcu_device::bclr_dd_ais_dfm() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7716,7 +7716,7 @@ void m68000_mcu_device::bclr_dd_ais_dfm() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7747,12 +7747,12 @@ void m68000_mcu_device::bclr_dd_aips_dfm() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7773,12 +7773,12 @@ void m68000_mcu_device::bclr_dd_aips_dfm() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7803,7 +7803,7 @@ void m68000_mcu_device::bclr_dd_aips_dfm() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7833,7 +7833,7 @@ void m68000_mcu_device::bclr_dd_pais_dfm() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7841,7 +7841,7 @@ void m68000_mcu_device::bclr_dd_pais_dfm() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7862,12 +7862,12 @@ void m68000_mcu_device::bclr_dd_pais_dfm() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7892,7 +7892,7 @@ void m68000_mcu_device::bclr_dd_pais_dfm() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7920,7 +7920,7 @@ void m68000_mcu_device::bclr_dd_das_dfm() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -7943,11 +7943,11 @@ void m68000_mcu_device::bclr_dd_das_dfm() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7967,12 +7967,12 @@ void m68000_mcu_device::bclr_dd_das_dfm() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7997,7 +7997,7 @@ void m68000_mcu_device::bclr_dd_das_dfm() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8023,14 +8023,14 @@ void m68000_mcu_device::bclr_dd_dais_dfm() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8038,7 +8038,7 @@ void m68000_mcu_device::bclr_dd_dais_dfm() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8062,7 +8062,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8088,11 +8088,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8112,12 +8112,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8142,7 +8142,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8172,7 +8172,7 @@ void m68000_mcu_device::bclr_dd_adr16_dfm() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8195,7 +8195,7 @@ void m68000_mcu_device::bclr_dd_adr16_dfm() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8216,12 +8216,12 @@ void m68000_mcu_device::bclr_dd_adr16_dfm() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8246,7 +8246,7 @@ void m68000_mcu_device::bclr_dd_adr16_dfm() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8274,7 +8274,7 @@ void m68000_mcu_device::bclr_dd_adr32_dfm() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8298,7 +8298,7 @@ void m68000_mcu_device::bclr_dd_adr32_dfm() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8321,7 +8321,7 @@ void m68000_mcu_device::bclr_dd_adr32_dfm() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8342,12 +8342,12 @@ void m68000_mcu_device::bclr_dd_adr32_dfm() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8372,7 +8372,7 @@ void m68000_mcu_device::bclr_dd_adr32_dfm() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8404,13 +8404,13 @@ void m68000_mcu_device::bset_dd_ds_dfm() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8439,7 +8439,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8451,14 +8451,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8476,7 +8476,7 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8499,7 +8499,7 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8515,7 +8515,7 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8532,7 +8532,7 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8548,7 +8548,7 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8565,11 +8565,11 @@ void m68000_mcu_device::movep_l_dd_das_dfm() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8602,11 +8602,11 @@ void m68000_mcu_device::bset_dd_ais_dfm() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8627,7 +8627,7 @@ void m68000_mcu_device::bset_dd_ais_dfm() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8652,7 +8652,7 @@ void m68000_mcu_device::bset_dd_ais_dfm() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8683,12 +8683,12 @@ void m68000_mcu_device::bset_dd_aips_dfm() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8710,7 +8710,7 @@ void m68000_mcu_device::bset_dd_aips_dfm() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8735,7 +8735,7 @@ void m68000_mcu_device::bset_dd_aips_dfm() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8765,7 +8765,7 @@ void m68000_mcu_device::bset_dd_pais_dfm() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8773,7 +8773,7 @@ void m68000_mcu_device::bset_dd_pais_dfm() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8795,7 +8795,7 @@ void m68000_mcu_device::bset_dd_pais_dfm() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8820,7 +8820,7 @@ void m68000_mcu_device::bset_dd_pais_dfm() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8848,7 +8848,7 @@ void m68000_mcu_device::bset_dd_das_dfm() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8871,11 +8871,11 @@ void m68000_mcu_device::bset_dd_das_dfm() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8896,7 +8896,7 @@ void m68000_mcu_device::bset_dd_das_dfm() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8921,7 +8921,7 @@ void m68000_mcu_device::bset_dd_das_dfm() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8947,14 +8947,14 @@ void m68000_mcu_device::bset_dd_dais_dfm() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8962,7 +8962,7 @@ void m68000_mcu_device::bset_dd_dais_dfm() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -8986,7 +8986,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9012,11 +9012,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9037,7 +9037,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9062,7 +9062,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9092,7 +9092,7 @@ void m68000_mcu_device::bset_dd_adr16_dfm() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9115,7 +9115,7 @@ void m68000_mcu_device::bset_dd_adr16_dfm() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9137,7 +9137,7 @@ void m68000_mcu_device::bset_dd_adr16_dfm() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9162,7 +9162,7 @@ void m68000_mcu_device::bset_dd_adr16_dfm() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9190,7 +9190,7 @@ void m68000_mcu_device::bset_dd_adr32_dfm() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9214,7 +9214,7 @@ void m68000_mcu_device::bset_dd_adr32_dfm() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9237,7 +9237,7 @@ void m68000_mcu_device::bset_dd_adr32_dfm() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9259,7 +9259,7 @@ void m68000_mcu_device::bset_dd_adr32_dfm() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9284,7 +9284,7 @@ void m68000_mcu_device::bset_dd_adr32_dfm() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9313,7 +9313,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dfm() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9336,7 +9336,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dfm() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -9344,7 +9344,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dfm() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9378,7 +9378,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dfm() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9400,11 +9400,11 @@ void m68000_mcu_device::andi_b_imm8_ais_dfm() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9424,7 +9424,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dfm() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9451,7 +9451,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dfm() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9478,7 +9478,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dfm() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9503,12 +9503,12 @@ void m68000_mcu_device::andi_b_imm8_aips_dfm() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9529,7 +9529,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dfm() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9556,7 +9556,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dfm() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9583,7 +9583,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dfm() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9607,7 +9607,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dfm() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9615,7 +9615,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dfm() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9636,7 +9636,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dfm() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9663,7 +9663,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dfm() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9690,7 +9690,7 @@ void m68000_mcu_device::andi_b_imm8_das_dfm() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9712,7 +9712,7 @@ void m68000_mcu_device::andi_b_imm8_das_dfm() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9735,11 +9735,11 @@ void m68000_mcu_device::andi_b_imm8_das_dfm() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9759,7 +9759,7 @@ void m68000_mcu_device::andi_b_imm8_das_dfm() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9786,7 +9786,7 @@ void m68000_mcu_device::andi_b_imm8_das_dfm() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9813,7 +9813,7 @@ void m68000_mcu_device::andi_b_imm8_dais_dfm() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9833,14 +9833,14 @@ void m68000_mcu_device::andi_b_imm8_dais_dfm() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9848,7 +9848,7 @@ void m68000_mcu_device::andi_b_imm8_dais_dfm() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9872,7 +9872,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -9898,11 +9898,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9922,7 +9922,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9949,7 +9949,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9975,7 +9975,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dfm() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10000,7 +10000,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dfm() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10023,7 +10023,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dfm() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10044,7 +10044,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dfm() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10071,7 +10071,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dfm() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10097,7 +10097,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10120,7 +10120,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10144,7 +10144,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10167,7 +10167,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10188,7 +10188,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10215,7 +10215,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dfm() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10241,7 +10241,7 @@ void m68000_mcu_device::andi_imm8_ccr_dfm() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10263,21 +10263,21 @@ void m68000_mcu_device::andi_imm8_ccr_dfm() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -10285,7 +10285,7 @@ void m68000_mcu_device::andi_imm8_ccr_dfm() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10309,11 +10309,11 @@ void m68000_mcu_device::andi_imm8_ccr_dfm() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10347,7 +10347,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dfm() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10370,7 +10370,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dfm() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10378,7 +10378,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dfm() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10412,7 +10412,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dfm() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10434,11 +10434,11 @@ void m68000_mcu_device::andi_w_imm16_ais_dfm() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10461,7 +10461,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dfm() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10488,7 +10488,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dfm() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10520,7 +10520,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dfm() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10545,12 +10545,12 @@ void m68000_mcu_device::andi_w_imm16_aips_dfm() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -10574,7 +10574,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dfm() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10601,7 +10601,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dfm() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10633,7 +10633,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dfm() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10657,7 +10657,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dfm() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10665,7 +10665,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dfm() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -10689,7 +10689,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dfm() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10716,7 +10716,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dfm() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10748,7 +10748,7 @@ void m68000_mcu_device::andi_w_imm16_das_dfm() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10770,7 +10770,7 @@ void m68000_mcu_device::andi_w_imm16_das_dfm() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10793,11 +10793,11 @@ void m68000_mcu_device::andi_w_imm16_das_dfm() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10820,7 +10820,7 @@ void m68000_mcu_device::andi_w_imm16_das_dfm() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10847,7 +10847,7 @@ void m68000_mcu_device::andi_w_imm16_das_dfm() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -10879,7 +10879,7 @@ void m68000_mcu_device::andi_w_imm16_dais_dfm() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10899,14 +10899,14 @@ void m68000_mcu_device::andi_w_imm16_dais_dfm() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10914,7 +10914,7 @@ void m68000_mcu_device::andi_w_imm16_dais_dfm() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10938,7 +10938,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10964,11 +10964,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -10991,7 +10991,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11018,7 +11018,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11049,7 +11049,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dfm() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11074,7 +11074,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dfm() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11097,7 +11097,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dfm() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11121,7 +11121,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dfm() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11148,7 +11148,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dfm() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11179,7 +11179,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11202,7 +11202,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11226,7 +11226,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11249,7 +11249,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11273,7 +11273,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11300,7 +11300,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dfm() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11335,7 +11335,7 @@ void m68000_mcu_device::andi_i16u_sr_dfm() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11357,23 +11357,23 @@ void m68000_mcu_device::andi_i16u_sr_dfm() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11381,7 +11381,7 @@ void m68000_mcu_device::andi_i16u_sr_dfm() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11405,11 +11405,11 @@ void m68000_mcu_device::andi_i16u_sr_dfm() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11442,7 +11442,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dfm() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11465,7 +11465,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dfm() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11488,12 +11488,12 @@ void m68000_mcu_device::andi_l_imm32_ds_dfm() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11513,7 +11513,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dfm() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -11522,7 +11522,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dfm() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -11538,7 +11538,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11561,7 +11561,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11583,7 +11583,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11608,7 +11608,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11631,7 +11631,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11656,7 +11656,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11681,7 +11681,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dfm() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11712,7 +11712,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11757,7 +11757,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11782,11 +11782,11 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11809,7 +11809,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11834,7 +11834,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11859,7 +11859,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dfm() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -11890,7 +11890,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11913,7 +11913,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11934,14 +11934,14 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11965,7 +11965,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -11988,7 +11988,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12013,7 +12013,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12038,7 +12038,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dfm() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12069,7 +12069,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12092,7 +12092,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12114,7 +12114,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12136,7 +12136,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12161,7 +12161,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12184,7 +12184,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12209,7 +12209,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12234,7 +12234,7 @@ void m68000_mcu_device::andi_l_imm32_das_dfm() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12265,7 +12265,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dfm() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12288,7 +12288,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dfm() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12308,14 +12308,14 @@ void m68000_mcu_device::andi_l_imm32_dais_dfm() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -12323,7 +12323,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dfm() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12347,7 +12347,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12372,7 +12372,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12397,7 +12397,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12420,7 +12420,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12445,7 +12445,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12470,7 +12470,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12500,7 +12500,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12523,7 +12523,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12548,7 +12548,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12571,7 +12571,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12596,7 +12596,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12619,7 +12619,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12644,7 +12644,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12669,7 +12669,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dfm() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12699,7 +12699,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12722,7 +12722,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12745,7 +12745,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12769,7 +12769,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12792,7 +12792,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12817,7 +12817,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -12840,7 +12840,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12865,7 +12865,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12890,7 +12890,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dfm() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -12944,7 +12944,7 @@ void m68000_mcu_device::subi_b_imm8_ds_dfm() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13006,7 +13006,7 @@ void m68000_mcu_device::subi_b_imm8_ais_dfm() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13029,7 +13029,7 @@ void m68000_mcu_device::subi_b_imm8_ais_dfm() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13109,7 +13109,7 @@ void m68000_mcu_device::subi_b_imm8_aips_dfm() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13130,7 +13130,7 @@ void m68000_mcu_device::subi_b_imm8_aips_dfm() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13212,7 +13212,7 @@ void m68000_mcu_device::subi_b_imm8_pais_dfm() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13233,7 +13233,7 @@ void m68000_mcu_device::subi_b_imm8_pais_dfm() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13329,7 +13329,7 @@ void m68000_mcu_device::subi_b_imm8_das_dfm() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13352,7 +13352,7 @@ void m68000_mcu_device::subi_b_imm8_das_dfm() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13424,7 +13424,7 @@ void m68000_mcu_device::subi_b_imm8_dais_dfm() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -13486,7 +13486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13509,7 +13509,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13606,7 +13606,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_dfm() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13627,7 +13627,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_dfm() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13745,7 +13745,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_dfm() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13766,7 +13766,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_dfm() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13841,7 +13841,7 @@ void m68000_mcu_device::subi_w_imm16_ds_dfm() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13903,7 +13903,7 @@ void m68000_mcu_device::subi_w_imm16_ais_dfm() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13929,7 +13929,7 @@ void m68000_mcu_device::subi_w_imm16_ais_dfm() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14014,7 +14014,7 @@ void m68000_mcu_device::subi_w_imm16_aips_dfm() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14038,7 +14038,7 @@ void m68000_mcu_device::subi_w_imm16_aips_dfm() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14125,7 +14125,7 @@ void m68000_mcu_device::subi_w_imm16_pais_dfm() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14149,7 +14149,7 @@ void m68000_mcu_device::subi_w_imm16_pais_dfm() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14250,7 +14250,7 @@ void m68000_mcu_device::subi_w_imm16_das_dfm() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14276,7 +14276,7 @@ void m68000_mcu_device::subi_w_imm16_das_dfm() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_mcu_device::subi_w_imm16_dais_dfm() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -14415,7 +14415,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14441,7 +14441,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14543,7 +14543,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_dfm() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14567,7 +14567,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_dfm() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14690,7 +14690,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_dfm() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14714,7 +14714,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_dfm() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14815,7 +14815,7 @@ void m68000_mcu_device::subi_l_imm32_ds_dfm() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -14839,7 +14839,7 @@ void m68000_mcu_device::subi_l_imm32_ds_dfm() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -14906,7 +14906,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dfm() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14953,7 +14953,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dfm() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14978,7 +14978,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dfm() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15076,7 +15076,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dfm() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15126,7 +15126,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dfm() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15151,7 +15151,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dfm() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15248,7 +15248,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dfm() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -15300,7 +15300,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dfm() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15325,7 +15325,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dfm() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15444,7 +15444,7 @@ void m68000_mcu_device::subi_l_imm32_das_dfm() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15491,7 +15491,7 @@ void m68000_mcu_device::subi_l_imm32_das_dfm() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15516,7 +15516,7 @@ void m68000_mcu_device::subi_l_imm32_das_dfm() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15612,7 +15612,7 @@ void m68000_mcu_device::subi_l_imm32_dais_dfm() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -15673,7 +15673,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15720,7 +15720,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15745,7 +15745,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15866,7 +15866,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dfm() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -15913,7 +15913,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dfm() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15938,7 +15938,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dfm() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16080,7 +16080,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dfm() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -16127,7 +16127,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dfm() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16152,7 +16152,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dfm() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16230,7 +16230,7 @@ void m68000_mcu_device::addi_b_imm8_ds_dfm() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16292,7 +16292,7 @@ void m68000_mcu_device::addi_b_imm8_ais_dfm() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16315,7 +16315,7 @@ void m68000_mcu_device::addi_b_imm8_ais_dfm() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16395,7 +16395,7 @@ void m68000_mcu_device::addi_b_imm8_aips_dfm() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16416,7 +16416,7 @@ void m68000_mcu_device::addi_b_imm8_aips_dfm() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16498,7 +16498,7 @@ void m68000_mcu_device::addi_b_imm8_pais_dfm() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16519,7 +16519,7 @@ void m68000_mcu_device::addi_b_imm8_pais_dfm() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16615,7 +16615,7 @@ void m68000_mcu_device::addi_b_imm8_das_dfm() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16638,7 +16638,7 @@ void m68000_mcu_device::addi_b_imm8_das_dfm() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16710,7 +16710,7 @@ void m68000_mcu_device::addi_b_imm8_dais_dfm() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16772,7 +16772,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16795,7 +16795,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16892,7 +16892,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_dfm() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16913,7 +16913,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_dfm() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17031,7 +17031,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_dfm() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -17052,7 +17052,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_dfm() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17127,7 +17127,7 @@ void m68000_mcu_device::addi_w_imm16_ds_dfm() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17189,7 +17189,7 @@ void m68000_mcu_device::addi_w_imm16_ais_dfm() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17215,7 +17215,7 @@ void m68000_mcu_device::addi_w_imm16_ais_dfm() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17300,7 +17300,7 @@ void m68000_mcu_device::addi_w_imm16_aips_dfm() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17324,7 +17324,7 @@ void m68000_mcu_device::addi_w_imm16_aips_dfm() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17411,7 +17411,7 @@ void m68000_mcu_device::addi_w_imm16_pais_dfm() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17435,7 +17435,7 @@ void m68000_mcu_device::addi_w_imm16_pais_dfm() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17536,7 +17536,7 @@ void m68000_mcu_device::addi_w_imm16_das_dfm() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17562,7 +17562,7 @@ void m68000_mcu_device::addi_w_imm16_das_dfm() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17639,7 +17639,7 @@ void m68000_mcu_device::addi_w_imm16_dais_dfm() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17701,7 +17701,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17727,7 +17727,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17829,7 +17829,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_dfm() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -17853,7 +17853,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_dfm() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17976,7 +17976,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_dfm() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18000,7 +18000,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_dfm() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18101,7 +18101,7 @@ void m68000_mcu_device::addi_l_imm32_ds_dfm() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -18125,7 +18125,7 @@ void m68000_mcu_device::addi_l_imm32_ds_dfm() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -18192,7 +18192,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dfm() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18239,7 +18239,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dfm() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18264,7 +18264,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dfm() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18362,7 +18362,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dfm() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18412,7 +18412,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dfm() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18437,7 +18437,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dfm() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18534,7 +18534,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dfm() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -18586,7 +18586,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dfm() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18611,7 +18611,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dfm() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18730,7 +18730,7 @@ void m68000_mcu_device::addi_l_imm32_das_dfm() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -18777,7 +18777,7 @@ void m68000_mcu_device::addi_l_imm32_das_dfm() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18802,7 +18802,7 @@ void m68000_mcu_device::addi_l_imm32_das_dfm() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18898,7 +18898,7 @@ void m68000_mcu_device::addi_l_imm32_dais_dfm() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -18959,7 +18959,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19006,7 +19006,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19031,7 +19031,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19152,7 +19152,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dfm() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19199,7 +19199,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dfm() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19224,7 +19224,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dfm() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19366,7 +19366,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dfm() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -19413,7 +19413,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dfm() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19438,7 +19438,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dfm() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19494,7 +19494,7 @@ void m68000_mcu_device::btst_imm8_ds_dfm() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19520,13 +19520,13 @@ void m68000_mcu_device::btst_imm8_ds_dfm() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -19555,7 +19555,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19568,7 +19568,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19587,7 +19587,7 @@ void m68000_mcu_device::btst_imm8_ais_dfm() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19609,11 +19609,11 @@ void m68000_mcu_device::btst_imm8_ais_dfm() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19633,13 +19633,13 @@ void m68000_mcu_device::btst_imm8_ais_dfm() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19673,7 +19673,7 @@ void m68000_mcu_device::btst_imm8_aips_dfm() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19698,12 +19698,12 @@ void m68000_mcu_device::btst_imm8_aips_dfm() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19724,13 +19724,13 @@ void m68000_mcu_device::btst_imm8_aips_dfm() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19764,7 +19764,7 @@ void m68000_mcu_device::btst_imm8_pais_dfm() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19788,7 +19788,7 @@ void m68000_mcu_device::btst_imm8_pais_dfm() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -19796,7 +19796,7 @@ void m68000_mcu_device::btst_imm8_pais_dfm() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19817,13 +19817,13 @@ void m68000_mcu_device::btst_imm8_pais_dfm() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19857,7 +19857,7 @@ void m68000_mcu_device::btst_imm8_das_dfm() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19879,7 +19879,7 @@ void m68000_mcu_device::btst_imm8_das_dfm() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19902,11 +19902,11 @@ void m68000_mcu_device::btst_imm8_das_dfm() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19926,13 +19926,13 @@ void m68000_mcu_device::btst_imm8_das_dfm() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19966,7 +19966,7 @@ void m68000_mcu_device::btst_imm8_dais_dfm() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -19986,14 +19986,14 @@ void m68000_mcu_device::btst_imm8_dais_dfm() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20001,7 +20001,7 @@ void m68000_mcu_device::btst_imm8_dais_dfm() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20025,7 +20025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20051,11 +20051,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20075,13 +20075,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20114,7 +20114,7 @@ void m68000_mcu_device::btst_imm8_adr16_dfm() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20139,7 +20139,7 @@ void m68000_mcu_device::btst_imm8_adr16_dfm() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20162,7 +20162,7 @@ void m68000_mcu_device::btst_imm8_adr16_dfm() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20183,13 +20183,13 @@ void m68000_mcu_device::btst_imm8_adr16_dfm() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20222,7 +20222,7 @@ void m68000_mcu_device::btst_imm8_adr32_dfm() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20245,7 +20245,7 @@ void m68000_mcu_device::btst_imm8_adr32_dfm() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20269,7 +20269,7 @@ void m68000_mcu_device::btst_imm8_adr32_dfm() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20292,7 +20292,7 @@ void m68000_mcu_device::btst_imm8_adr32_dfm() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20313,13 +20313,13 @@ void m68000_mcu_device::btst_imm8_adr32_dfm() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20352,7 +20352,7 @@ void m68000_mcu_device::btst_imm8_dpc_dfm() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20374,7 +20374,7 @@ void m68000_mcu_device::btst_imm8_dpc_dfm() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20397,11 +20397,11 @@ void m68000_mcu_device::btst_imm8_dpc_dfm() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20421,13 +20421,13 @@ void m68000_mcu_device::btst_imm8_dpc_dfm() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20460,7 +20460,7 @@ void m68000_mcu_device::btst_imm8_dpci_dfm() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20480,14 +20480,14 @@ void m68000_mcu_device::btst_imm8_dpci_dfm() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20495,7 +20495,7 @@ void m68000_mcu_device::btst_imm8_dpci_dfm() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20519,7 +20519,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20545,11 +20545,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20569,13 +20569,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20609,7 +20609,7 @@ void m68000_mcu_device::bchg_imm8_ds_dfm() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20635,13 +20635,13 @@ void m68000_mcu_device::bchg_imm8_ds_dfm() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20670,7 +20670,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20682,14 +20682,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20708,7 +20708,7 @@ void m68000_mcu_device::bchg_imm8_ais_dfm() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20730,11 +20730,11 @@ void m68000_mcu_device::bchg_imm8_ais_dfm() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20755,7 +20755,7 @@ void m68000_mcu_device::bchg_imm8_ais_dfm() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20780,7 +20780,7 @@ void m68000_mcu_device::bchg_imm8_ais_dfm() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20809,7 +20809,7 @@ void m68000_mcu_device::bchg_imm8_aips_dfm() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20834,12 +20834,12 @@ void m68000_mcu_device::bchg_imm8_aips_dfm() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20861,7 +20861,7 @@ void m68000_mcu_device::bchg_imm8_aips_dfm() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20886,7 +20886,7 @@ void m68000_mcu_device::bchg_imm8_aips_dfm() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20915,7 +20915,7 @@ void m68000_mcu_device::bchg_imm8_pais_dfm() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -20939,7 +20939,7 @@ void m68000_mcu_device::bchg_imm8_pais_dfm() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -20947,7 +20947,7 @@ void m68000_mcu_device::bchg_imm8_pais_dfm() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20969,7 +20969,7 @@ void m68000_mcu_device::bchg_imm8_pais_dfm() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -20994,7 +20994,7 @@ void m68000_mcu_device::bchg_imm8_pais_dfm() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21023,7 +21023,7 @@ void m68000_mcu_device::bchg_imm8_das_dfm() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21045,7 +21045,7 @@ void m68000_mcu_device::bchg_imm8_das_dfm() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21068,11 +21068,11 @@ void m68000_mcu_device::bchg_imm8_das_dfm() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21093,7 +21093,7 @@ void m68000_mcu_device::bchg_imm8_das_dfm() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21118,7 +21118,7 @@ void m68000_mcu_device::bchg_imm8_das_dfm() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21147,7 +21147,7 @@ void m68000_mcu_device::bchg_imm8_dais_dfm() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21167,14 +21167,14 @@ void m68000_mcu_device::bchg_imm8_dais_dfm() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -21182,7 +21182,7 @@ void m68000_mcu_device::bchg_imm8_dais_dfm() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21206,7 +21206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21232,11 +21232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21257,7 +21257,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21282,7 +21282,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21310,7 +21310,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dfm() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21335,7 +21335,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dfm() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21358,7 +21358,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dfm() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21380,7 +21380,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dfm() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21405,7 +21405,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dfm() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21433,7 +21433,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21456,7 +21456,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21480,7 +21480,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21503,7 +21503,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21525,7 +21525,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21550,7 +21550,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dfm() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21579,7 +21579,7 @@ void m68000_mcu_device::bclr_imm8_ds_dfm() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21605,13 +21605,13 @@ void m68000_mcu_device::bclr_imm8_ds_dfm() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21637,14 +21637,14 @@ void m68000_mcu_device::bclr_imm8_ds_dfm() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21656,18 +21656,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21686,7 +21686,7 @@ void m68000_mcu_device::bclr_imm8_ais_dfm() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21708,11 +21708,11 @@ void m68000_mcu_device::bclr_imm8_ais_dfm() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21732,12 +21732,12 @@ void m68000_mcu_device::bclr_imm8_ais_dfm() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21762,7 +21762,7 @@ void m68000_mcu_device::bclr_imm8_ais_dfm() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21791,7 +21791,7 @@ void m68000_mcu_device::bclr_imm8_aips_dfm() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21816,12 +21816,12 @@ void m68000_mcu_device::bclr_imm8_aips_dfm() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21842,12 +21842,12 @@ void m68000_mcu_device::bclr_imm8_aips_dfm() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21872,7 +21872,7 @@ void m68000_mcu_device::bclr_imm8_aips_dfm() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21901,7 +21901,7 @@ void m68000_mcu_device::bclr_imm8_pais_dfm() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -21925,7 +21925,7 @@ void m68000_mcu_device::bclr_imm8_pais_dfm() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -21933,7 +21933,7 @@ void m68000_mcu_device::bclr_imm8_pais_dfm() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21954,12 +21954,12 @@ void m68000_mcu_device::bclr_imm8_pais_dfm() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -21984,7 +21984,7 @@ void m68000_mcu_device::bclr_imm8_pais_dfm() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22013,7 +22013,7 @@ void m68000_mcu_device::bclr_imm8_das_dfm() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22035,7 +22035,7 @@ void m68000_mcu_device::bclr_imm8_das_dfm() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22058,11 +22058,11 @@ void m68000_mcu_device::bclr_imm8_das_dfm() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22082,12 +22082,12 @@ void m68000_mcu_device::bclr_imm8_das_dfm() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22112,7 +22112,7 @@ void m68000_mcu_device::bclr_imm8_das_dfm() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22141,7 +22141,7 @@ void m68000_mcu_device::bclr_imm8_dais_dfm() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22161,14 +22161,14 @@ void m68000_mcu_device::bclr_imm8_dais_dfm() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22176,7 +22176,7 @@ void m68000_mcu_device::bclr_imm8_dais_dfm() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22200,7 +22200,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22226,11 +22226,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22250,12 +22250,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22280,7 +22280,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22308,7 +22308,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dfm() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22333,7 +22333,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dfm() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22356,7 +22356,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dfm() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22377,12 +22377,12 @@ void m68000_mcu_device::bclr_imm8_adr16_dfm() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22407,7 +22407,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dfm() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22435,7 +22435,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22458,7 +22458,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22482,7 +22482,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22505,7 +22505,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22526,12 +22526,12 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22556,7 +22556,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dfm() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22585,7 +22585,7 @@ void m68000_mcu_device::bset_imm8_ds_dfm() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22611,13 +22611,13 @@ void m68000_mcu_device::bset_imm8_ds_dfm() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22646,7 +22646,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22658,14 +22658,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22684,7 +22684,7 @@ void m68000_mcu_device::bset_imm8_ais_dfm() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22706,11 +22706,11 @@ void m68000_mcu_device::bset_imm8_ais_dfm() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22731,7 +22731,7 @@ void m68000_mcu_device::bset_imm8_ais_dfm() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22756,7 +22756,7 @@ void m68000_mcu_device::bset_imm8_ais_dfm() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22785,7 +22785,7 @@ void m68000_mcu_device::bset_imm8_aips_dfm() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22810,12 +22810,12 @@ void m68000_mcu_device::bset_imm8_aips_dfm() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22837,7 +22837,7 @@ void m68000_mcu_device::bset_imm8_aips_dfm() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22862,7 +22862,7 @@ void m68000_mcu_device::bset_imm8_aips_dfm() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22891,7 +22891,7 @@ void m68000_mcu_device::bset_imm8_pais_dfm() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -22915,7 +22915,7 @@ void m68000_mcu_device::bset_imm8_pais_dfm() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22923,7 +22923,7 @@ void m68000_mcu_device::bset_imm8_pais_dfm() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22945,7 +22945,7 @@ void m68000_mcu_device::bset_imm8_pais_dfm() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22970,7 +22970,7 @@ void m68000_mcu_device::bset_imm8_pais_dfm() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22999,7 +22999,7 @@ void m68000_mcu_device::bset_imm8_das_dfm() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23021,7 +23021,7 @@ void m68000_mcu_device::bset_imm8_das_dfm() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23044,11 +23044,11 @@ void m68000_mcu_device::bset_imm8_das_dfm() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23069,7 +23069,7 @@ void m68000_mcu_device::bset_imm8_das_dfm() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23094,7 +23094,7 @@ void m68000_mcu_device::bset_imm8_das_dfm() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23123,7 +23123,7 @@ void m68000_mcu_device::bset_imm8_dais_dfm() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23143,14 +23143,14 @@ void m68000_mcu_device::bset_imm8_dais_dfm() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23158,7 +23158,7 @@ void m68000_mcu_device::bset_imm8_dais_dfm() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23182,7 +23182,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23208,11 +23208,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23233,7 +23233,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23258,7 +23258,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23286,7 +23286,7 @@ void m68000_mcu_device::bset_imm8_adr16_dfm() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23311,7 +23311,7 @@ void m68000_mcu_device::bset_imm8_adr16_dfm() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23334,7 +23334,7 @@ void m68000_mcu_device::bset_imm8_adr16_dfm() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23356,7 +23356,7 @@ void m68000_mcu_device::bset_imm8_adr16_dfm() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23381,7 +23381,7 @@ void m68000_mcu_device::bset_imm8_adr16_dfm() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23409,7 +23409,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23432,7 +23432,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23456,7 +23456,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23479,7 +23479,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23501,7 +23501,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23526,7 +23526,7 @@ void m68000_mcu_device::bset_imm8_adr32_dfm() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23555,7 +23555,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dfm() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23578,7 +23578,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dfm() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -23586,7 +23586,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dfm() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23620,7 +23620,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dfm() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23642,11 +23642,11 @@ void m68000_mcu_device::eori_b_imm8_ais_dfm() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23666,7 +23666,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dfm() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23693,7 +23693,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dfm() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23720,7 +23720,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dfm() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23745,12 +23745,12 @@ void m68000_mcu_device::eori_b_imm8_aips_dfm() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23771,7 +23771,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dfm() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23798,7 +23798,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dfm() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23825,7 +23825,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dfm() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23849,7 +23849,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dfm() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23857,7 +23857,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dfm() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23878,7 +23878,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dfm() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23905,7 +23905,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dfm() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23932,7 +23932,7 @@ void m68000_mcu_device::eori_b_imm8_das_dfm() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23954,7 +23954,7 @@ void m68000_mcu_device::eori_b_imm8_das_dfm() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -23977,11 +23977,11 @@ void m68000_mcu_device::eori_b_imm8_das_dfm() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24001,7 +24001,7 @@ void m68000_mcu_device::eori_b_imm8_das_dfm() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24028,7 +24028,7 @@ void m68000_mcu_device::eori_b_imm8_das_dfm() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24055,7 +24055,7 @@ void m68000_mcu_device::eori_b_imm8_dais_dfm() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24075,14 +24075,14 @@ void m68000_mcu_device::eori_b_imm8_dais_dfm() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24090,7 +24090,7 @@ void m68000_mcu_device::eori_b_imm8_dais_dfm() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24114,7 +24114,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24140,11 +24140,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24164,7 +24164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24191,7 +24191,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24217,7 +24217,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dfm() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24242,7 +24242,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dfm() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24265,7 +24265,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dfm() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24286,7 +24286,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dfm() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24313,7 +24313,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dfm() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24339,7 +24339,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24362,7 +24362,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24386,7 +24386,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24409,7 +24409,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24430,7 +24430,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24457,7 +24457,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dfm() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24483,7 +24483,7 @@ void m68000_mcu_device::eori_imm8_ccr_dfm() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24505,21 +24505,21 @@ void m68000_mcu_device::eori_imm8_ccr_dfm() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -24527,7 +24527,7 @@ void m68000_mcu_device::eori_imm8_ccr_dfm() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24551,11 +24551,11 @@ void m68000_mcu_device::eori_imm8_ccr_dfm() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24589,7 +24589,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dfm() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24612,7 +24612,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dfm() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -24620,7 +24620,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dfm() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24654,7 +24654,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dfm() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24676,11 +24676,11 @@ void m68000_mcu_device::eori_w_imm16_ais_dfm() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24703,7 +24703,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dfm() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24730,7 +24730,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dfm() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24762,7 +24762,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dfm() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24787,12 +24787,12 @@ void m68000_mcu_device::eori_w_imm16_aips_dfm() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -24816,7 +24816,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dfm() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24843,7 +24843,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dfm() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24875,7 +24875,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dfm() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -24899,7 +24899,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dfm() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24907,7 +24907,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dfm() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -24931,7 +24931,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dfm() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24958,7 +24958,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dfm() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -24990,7 +24990,7 @@ void m68000_mcu_device::eori_w_imm16_das_dfm() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25012,7 +25012,7 @@ void m68000_mcu_device::eori_w_imm16_das_dfm() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25035,11 +25035,11 @@ void m68000_mcu_device::eori_w_imm16_das_dfm() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25062,7 +25062,7 @@ void m68000_mcu_device::eori_w_imm16_das_dfm() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25089,7 +25089,7 @@ void m68000_mcu_device::eori_w_imm16_das_dfm() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25121,7 +25121,7 @@ void m68000_mcu_device::eori_w_imm16_dais_dfm() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25141,14 +25141,14 @@ void m68000_mcu_device::eori_w_imm16_dais_dfm() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25156,7 +25156,7 @@ void m68000_mcu_device::eori_w_imm16_dais_dfm() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25180,7 +25180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25206,11 +25206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25233,7 +25233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25260,7 +25260,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25291,7 +25291,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dfm() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25316,7 +25316,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dfm() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25339,7 +25339,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dfm() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25363,7 +25363,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dfm() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25390,7 +25390,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dfm() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25421,7 +25421,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25444,7 +25444,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25468,7 +25468,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25491,7 +25491,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25515,7 +25515,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25542,7 +25542,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dfm() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25577,7 +25577,7 @@ void m68000_mcu_device::eori_i16u_sr_dfm() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25599,23 +25599,23 @@ void m68000_mcu_device::eori_i16u_sr_dfm() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -25623,7 +25623,7 @@ void m68000_mcu_device::eori_i16u_sr_dfm() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25647,11 +25647,11 @@ void m68000_mcu_device::eori_i16u_sr_dfm() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25684,7 +25684,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dfm() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25707,7 +25707,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dfm() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25730,12 +25730,12 @@ void m68000_mcu_device::eori_l_imm32_ds_dfm() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25755,7 +25755,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dfm() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -25764,7 +25764,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dfm() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -25780,7 +25780,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25803,7 +25803,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25825,7 +25825,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -25850,7 +25850,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25873,7 +25873,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25898,7 +25898,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -25923,7 +25923,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dfm() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -25954,7 +25954,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25977,7 +25977,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -25999,7 +25999,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26024,11 +26024,11 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26051,7 +26051,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26076,7 +26076,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26101,7 +26101,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dfm() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26132,7 +26132,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26155,7 +26155,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26176,14 +26176,14 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26207,7 +26207,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26230,7 +26230,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26255,7 +26255,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26280,7 +26280,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dfm() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26311,7 +26311,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26334,7 +26334,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26356,7 +26356,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26378,7 +26378,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26403,7 +26403,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26426,7 +26426,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26451,7 +26451,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26476,7 +26476,7 @@ void m68000_mcu_device::eori_l_imm32_das_dfm() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26507,7 +26507,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dfm() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26530,7 +26530,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dfm() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26550,14 +26550,14 @@ void m68000_mcu_device::eori_l_imm32_dais_dfm() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -26565,7 +26565,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dfm() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26589,7 +26589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26614,7 +26614,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26639,7 +26639,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26662,7 +26662,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26687,7 +26687,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26712,7 +26712,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26742,7 +26742,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26765,7 +26765,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26790,7 +26790,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26813,7 +26813,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -26838,7 +26838,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26861,7 +26861,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26886,7 +26886,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26911,7 +26911,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dfm() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -26941,7 +26941,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26964,7 +26964,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -26987,7 +26987,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -27011,7 +27011,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27034,7 +27034,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -27059,7 +27059,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -27082,7 +27082,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27107,7 +27107,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -27132,7 +27132,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dfm() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -27186,7 +27186,7 @@ void m68000_mcu_device::cmpi_b_imm8_ds_dfm() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -27247,7 +27247,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_dfm() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27270,7 +27270,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_dfm() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27336,7 +27336,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_dfm() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27357,7 +27357,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_dfm() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27425,7 +27425,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_dfm() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27446,7 +27446,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_dfm() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27528,7 +27528,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_dfm() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27551,7 +27551,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_dfm() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27609,7 +27609,7 @@ void m68000_mcu_device::cmpi_b_imm8_dais_dfm() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -27671,7 +27671,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27694,7 +27694,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27777,7 +27777,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_dfm() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27798,7 +27798,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_dfm() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27902,7 +27902,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_dfm() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27923,7 +27923,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_dfm() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27984,7 +27984,7 @@ void m68000_mcu_device::cmpi_w_imm16_ds_dfm() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -28045,7 +28045,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_dfm() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28071,7 +28071,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_dfm() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28137,7 +28137,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_dfm() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28161,7 +28161,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_dfm() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28229,7 +28229,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_dfm() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28253,7 +28253,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_dfm() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28335,7 +28335,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_dfm() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28361,7 +28361,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_dfm() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28419,7 +28419,7 @@ void m68000_mcu_device::cmpi_w_imm16_dais_dfm() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -28481,7 +28481,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28507,7 +28507,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28590,7 +28590,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_dfm() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28614,7 +28614,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_dfm() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28718,7 +28718,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_dfm() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28742,7 +28742,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_dfm() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28825,11 +28825,11 @@ void m68000_mcu_device::cmpi_l_imm32_ds_dfm() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28912,7 +28912,7 @@ void m68000_mcu_device::cmpi_l_imm32_ais_dfm() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28959,13 +28959,13 @@ void m68000_mcu_device::cmpi_l_imm32_ais_dfm() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29043,7 +29043,7 @@ void m68000_mcu_device::cmpi_l_imm32_aips_dfm() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29093,13 +29093,13 @@ void m68000_mcu_device::cmpi_l_imm32_aips_dfm() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29176,7 +29176,7 @@ void m68000_mcu_device::cmpi_l_imm32_pais_dfm() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -29228,13 +29228,13 @@ void m68000_mcu_device::cmpi_l_imm32_pais_dfm() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29333,7 +29333,7 @@ void m68000_mcu_device::cmpi_l_imm32_das_dfm() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29380,13 +29380,13 @@ void m68000_mcu_device::cmpi_l_imm32_das_dfm() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29462,7 +29462,7 @@ void m68000_mcu_device::cmpi_l_imm32_dais_dfm() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -29523,7 +29523,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29570,13 +29570,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29677,7 +29677,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_dfm() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29724,13 +29724,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_dfm() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29852,7 +29852,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_dfm() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29899,13 +29899,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_dfm() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29943,7 +29943,7 @@ void m68000_mcu_device::move_b_ds_dd_dfm() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -29983,7 +29983,7 @@ void m68000_mcu_device::move_b_ais_dd_dfm() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30007,7 +30007,7 @@ void m68000_mcu_device::move_b_ais_dd_dfm() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30051,7 +30051,7 @@ void m68000_mcu_device::move_b_aips_dd_dfm() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30073,7 +30073,7 @@ void m68000_mcu_device::move_b_aips_dd_dfm() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30119,7 +30119,7 @@ void m68000_mcu_device::move_b_pais_dd_dfm() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30141,7 +30141,7 @@ void m68000_mcu_device::move_b_pais_dd_dfm() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30201,7 +30201,7 @@ void m68000_mcu_device::move_b_das_dd_dfm() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30225,7 +30225,7 @@ void m68000_mcu_device::move_b_das_dd_dfm() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30261,7 +30261,7 @@ void m68000_mcu_device::move_b_dais_dd_dfm() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30323,7 +30323,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30347,7 +30347,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30408,7 +30408,7 @@ void m68000_mcu_device::move_b_adr16_dd_dfm() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30430,7 +30430,7 @@ void m68000_mcu_device::move_b_adr16_dd_dfm() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30512,7 +30512,7 @@ void m68000_mcu_device::move_b_adr32_dd_dfm() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30534,7 +30534,7 @@ void m68000_mcu_device::move_b_adr32_dd_dfm() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30593,7 +30593,7 @@ void m68000_mcu_device::move_b_dpc_dd_dfm() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30617,7 +30617,7 @@ void m68000_mcu_device::move_b_dpc_dd_dfm() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30652,7 +30652,7 @@ void m68000_mcu_device::move_b_dpci_dd_dfm() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30714,7 +30714,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30738,7 +30738,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30802,7 +30802,7 @@ void m68000_mcu_device::move_b_imm8_dd_dfm() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -30845,7 +30845,7 @@ void m68000_mcu_device::move_b_ds_aid_dfm() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30898,7 +30898,7 @@ void m68000_mcu_device::move_b_ais_aid_dfm() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -30921,7 +30921,7 @@ void m68000_mcu_device::move_b_ais_aid_dfm() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30980,7 +30980,7 @@ void m68000_mcu_device::move_b_aips_aid_dfm() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31001,7 +31001,7 @@ void m68000_mcu_device::move_b_aips_aid_dfm() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31062,7 +31062,7 @@ void m68000_mcu_device::move_b_pais_aid_dfm() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31083,7 +31083,7 @@ void m68000_mcu_device::move_b_pais_aid_dfm() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31158,7 +31158,7 @@ void m68000_mcu_device::move_b_das_aid_dfm() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31181,7 +31181,7 @@ void m68000_mcu_device::move_b_das_aid_dfm() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31232,7 +31232,7 @@ void m68000_mcu_device::move_b_dais_aid_dfm() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31294,7 +31294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31317,7 +31317,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31393,7 +31393,7 @@ void m68000_mcu_device::move_b_adr16_aid_dfm() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31414,7 +31414,7 @@ void m68000_mcu_device::move_b_adr16_aid_dfm() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31511,7 +31511,7 @@ void m68000_mcu_device::move_b_adr32_aid_dfm() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31532,7 +31532,7 @@ void m68000_mcu_device::move_b_adr32_aid_dfm() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68000_mcu_device::move_b_dpc_aid_dfm() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31629,7 +31629,7 @@ void m68000_mcu_device::move_b_dpc_aid_dfm() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31679,7 +31679,7 @@ void m68000_mcu_device::move_b_dpci_aid_dfm() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31741,7 +31741,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31764,7 +31764,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31843,7 +31843,7 @@ void m68000_mcu_device::move_b_imm8_aid_dfm() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31899,7 +31899,7 @@ void m68000_mcu_device::move_b_ds_aipd_dfm() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31951,7 +31951,7 @@ void m68000_mcu_device::move_b_ais_aipd_dfm() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31975,7 +31975,7 @@ void m68000_mcu_device::move_b_ais_aipd_dfm() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32033,7 +32033,7 @@ void m68000_mcu_device::move_b_aips_aipd_dfm() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32055,7 +32055,7 @@ void m68000_mcu_device::move_b_aips_aipd_dfm() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32115,7 +32115,7 @@ void m68000_mcu_device::move_b_pais_aipd_dfm() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32137,7 +32137,7 @@ void m68000_mcu_device::move_b_pais_aipd_dfm() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32211,7 +32211,7 @@ void m68000_mcu_device::move_b_das_aipd_dfm() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32235,7 +32235,7 @@ void m68000_mcu_device::move_b_das_aipd_dfm() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32285,7 +32285,7 @@ void m68000_mcu_device::move_b_dais_aipd_dfm() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32347,7 +32347,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32371,7 +32371,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32446,7 +32446,7 @@ void m68000_mcu_device::move_b_adr16_aipd_dfm() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32468,7 +32468,7 @@ void m68000_mcu_device::move_b_adr16_aipd_dfm() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32564,7 +32564,7 @@ void m68000_mcu_device::move_b_adr32_aipd_dfm() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32586,7 +32586,7 @@ void m68000_mcu_device::move_b_adr32_aipd_dfm() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32659,7 +32659,7 @@ void m68000_mcu_device::move_b_dpc_aipd_dfm() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32683,7 +32683,7 @@ void m68000_mcu_device::move_b_dpc_aipd_dfm() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32732,7 +32732,7 @@ void m68000_mcu_device::move_b_dpci_aipd_dfm() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32794,7 +32794,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32818,7 +32818,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32896,7 +32896,7 @@ void m68000_mcu_device::move_b_imm8_aipd_dfm() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32950,7 +32950,7 @@ void m68000_mcu_device::move_b_ds_paid_dfm() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33003,7 +33003,7 @@ void m68000_mcu_device::move_b_ais_paid_dfm() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33026,7 +33026,7 @@ void m68000_mcu_device::move_b_ais_paid_dfm() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33085,7 +33085,7 @@ void m68000_mcu_device::move_b_aips_paid_dfm() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33106,7 +33106,7 @@ void m68000_mcu_device::move_b_aips_paid_dfm() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33167,7 +33167,7 @@ void m68000_mcu_device::move_b_pais_paid_dfm() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33188,7 +33188,7 @@ void m68000_mcu_device::move_b_pais_paid_dfm() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33263,7 +33263,7 @@ void m68000_mcu_device::move_b_das_paid_dfm() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33286,7 +33286,7 @@ void m68000_mcu_device::move_b_das_paid_dfm() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33337,7 +33337,7 @@ void m68000_mcu_device::move_b_dais_paid_dfm() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33399,7 +33399,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33422,7 +33422,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33498,7 +33498,7 @@ void m68000_mcu_device::move_b_adr16_paid_dfm() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33519,7 +33519,7 @@ void m68000_mcu_device::move_b_adr16_paid_dfm() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33616,7 +33616,7 @@ void m68000_mcu_device::move_b_adr32_paid_dfm() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33637,7 +33637,7 @@ void m68000_mcu_device::move_b_adr32_paid_dfm() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33711,7 +33711,7 @@ void m68000_mcu_device::move_b_dpc_paid_dfm() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33734,7 +33734,7 @@ void m68000_mcu_device::move_b_dpc_paid_dfm() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33784,7 +33784,7 @@ void m68000_mcu_device::move_b_dpci_paid_dfm() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33846,7 +33846,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33869,7 +33869,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33947,7 +33947,7 @@ void m68000_mcu_device::move_b_imm8_paid_dfm() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34023,7 +34023,7 @@ void m68000_mcu_device::move_b_ds_dad_dfm() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -34077,7 +34077,7 @@ void m68000_mcu_device::move_b_ais_dad_dfm() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34099,7 +34099,7 @@ void m68000_mcu_device::move_b_ais_dad_dfm() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34185,7 +34185,7 @@ void m68000_mcu_device::move_b_aips_dad_dfm() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34205,7 +34205,7 @@ void m68000_mcu_device::move_b_aips_dad_dfm() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34293,7 +34293,7 @@ void m68000_mcu_device::move_b_pais_dad_dfm() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34313,7 +34313,7 @@ void m68000_mcu_device::move_b_pais_dad_dfm() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34415,7 +34415,7 @@ void m68000_mcu_device::move_b_das_dad_dfm() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34437,7 +34437,7 @@ void m68000_mcu_device::move_b_das_dad_dfm() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34515,7 +34515,7 @@ void m68000_mcu_device::move_b_dais_dad_dfm() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34577,7 +34577,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34599,7 +34599,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34702,7 +34702,7 @@ void m68000_mcu_device::move_b_adr16_dad_dfm() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34722,7 +34722,7 @@ void m68000_mcu_device::move_b_adr16_dad_dfm() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34846,7 +34846,7 @@ void m68000_mcu_device::move_b_adr32_dad_dfm() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34866,7 +34866,7 @@ void m68000_mcu_device::move_b_adr32_dad_dfm() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34967,7 +34967,7 @@ void m68000_mcu_device::move_b_dpc_dad_dfm() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34989,7 +34989,7 @@ void m68000_mcu_device::move_b_dpc_dad_dfm() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35066,7 +35066,7 @@ void m68000_mcu_device::move_b_dpci_dad_dfm() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35128,7 +35128,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35150,7 +35150,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35276,7 +35276,7 @@ void m68000_mcu_device::move_b_imm8_dad_dfm() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35328,7 +35328,7 @@ void m68000_mcu_device::move_b_ds_daid_dfm() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -35392,7 +35392,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35446,7 +35446,7 @@ void m68000_mcu_device::move_b_ais_daid_dfm() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35465,7 +35465,7 @@ void m68000_mcu_device::move_b_ais_daid_dfm() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35480,7 +35480,7 @@ void m68000_mcu_device::move_b_ais_daid_dfm() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35504,7 +35504,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35592,7 +35592,7 @@ void m68000_mcu_device::move_b_aips_daid_dfm() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35609,7 +35609,7 @@ void m68000_mcu_device::move_b_aips_daid_dfm() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35624,7 +35624,7 @@ void m68000_mcu_device::move_b_aips_daid_dfm() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35648,7 +35648,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35738,7 +35738,7 @@ void m68000_mcu_device::move_b_pais_daid_dfm() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35755,7 +35755,7 @@ void m68000_mcu_device::move_b_pais_daid_dfm() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35770,7 +35770,7 @@ void m68000_mcu_device::move_b_pais_daid_dfm() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35794,7 +35794,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35898,7 +35898,7 @@ void m68000_mcu_device::move_b_das_daid_dfm() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35917,7 +35917,7 @@ void m68000_mcu_device::move_b_das_daid_dfm() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35932,7 +35932,7 @@ void m68000_mcu_device::move_b_das_daid_dfm() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35956,7 +35956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36036,7 +36036,7 @@ void m68000_mcu_device::move_b_dais_daid_dfm() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36098,7 +36098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36117,7 +36117,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36132,7 +36132,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36156,7 +36156,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36261,7 +36261,7 @@ void m68000_mcu_device::move_b_adr16_daid_dfm() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36278,7 +36278,7 @@ void m68000_mcu_device::move_b_adr16_daid_dfm() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36293,7 +36293,7 @@ void m68000_mcu_device::move_b_adr16_daid_dfm() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36317,7 +36317,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36443,7 +36443,7 @@ void m68000_mcu_device::move_b_adr32_daid_dfm() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36460,7 +36460,7 @@ void m68000_mcu_device::move_b_adr32_daid_dfm() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36475,7 +36475,7 @@ void m68000_mcu_device::move_b_adr32_daid_dfm() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36499,7 +36499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36602,7 +36602,7 @@ void m68000_mcu_device::move_b_dpc_daid_dfm() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36621,7 +36621,7 @@ void m68000_mcu_device::move_b_dpc_daid_dfm() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36636,7 +36636,7 @@ void m68000_mcu_device::move_b_dpc_daid_dfm() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36660,7 +36660,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36739,7 +36739,7 @@ void m68000_mcu_device::move_b_dpci_daid_dfm() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36801,7 +36801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36820,7 +36820,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36835,7 +36835,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36859,7 +36859,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36962,7 +36962,7 @@ void m68000_mcu_device::move_b_imm8_daid_dfm() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -37026,7 +37026,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37081,7 +37081,7 @@ void m68000_mcu_device::move_b_ds_adr16_dfm() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37160,7 +37160,7 @@ void m68000_mcu_device::move_b_ais_adr16_dfm() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37182,7 +37182,7 @@ void m68000_mcu_device::move_b_ais_adr16_dfm() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37267,7 +37267,7 @@ void m68000_mcu_device::move_b_aips_adr16_dfm() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37287,7 +37287,7 @@ void m68000_mcu_device::move_b_aips_adr16_dfm() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37374,7 +37374,7 @@ void m68000_mcu_device::move_b_pais_adr16_dfm() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37394,7 +37394,7 @@ void m68000_mcu_device::move_b_pais_adr16_dfm() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37495,7 +37495,7 @@ void m68000_mcu_device::move_b_das_adr16_dfm() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37517,7 +37517,7 @@ void m68000_mcu_device::move_b_das_adr16_dfm() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37594,7 +37594,7 @@ void m68000_mcu_device::move_b_dais_adr16_dfm() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37656,7 +37656,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37678,7 +37678,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37780,7 +37780,7 @@ void m68000_mcu_device::move_b_adr16_adr16_dfm() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37800,7 +37800,7 @@ void m68000_mcu_device::move_b_adr16_adr16_dfm() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37923,7 +37923,7 @@ void m68000_mcu_device::move_b_adr32_adr16_dfm() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37943,7 +37943,7 @@ void m68000_mcu_device::move_b_adr32_adr16_dfm() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38043,7 +38043,7 @@ void m68000_mcu_device::move_b_dpc_adr16_dfm() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38065,7 +38065,7 @@ void m68000_mcu_device::move_b_dpc_adr16_dfm() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38141,7 +38141,7 @@ void m68000_mcu_device::move_b_dpc_adr16_dfm() // 11fa ffff
void m68000_mcu_device::move_b_dpci_adr16_dfm() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38203,7 +38203,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38225,7 +38225,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38329,7 +38329,7 @@ void m68000_mcu_device::move_b_imm8_adr16_dfm() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38431,7 +38431,7 @@ void m68000_mcu_device::move_b_ds_adr32_dfm() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38510,7 +38510,7 @@ void m68000_mcu_device::move_b_ais_adr32_dfm() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38532,7 +38532,7 @@ void m68000_mcu_device::move_b_ais_adr32_dfm() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38637,7 +38637,7 @@ void m68000_mcu_device::move_b_aips_adr32_dfm() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38657,7 +38657,7 @@ void m68000_mcu_device::move_b_aips_adr32_dfm() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38764,7 +38764,7 @@ void m68000_mcu_device::move_b_pais_adr32_dfm() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38784,7 +38784,7 @@ void m68000_mcu_device::move_b_pais_adr32_dfm() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38905,7 +38905,7 @@ void m68000_mcu_device::move_b_das_adr32_dfm() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38927,7 +38927,7 @@ void m68000_mcu_device::move_b_das_adr32_dfm() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39024,7 +39024,7 @@ void m68000_mcu_device::move_b_dais_adr32_dfm() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39086,7 +39086,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39108,7 +39108,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39230,7 +39230,7 @@ void m68000_mcu_device::move_b_adr16_adr32_dfm() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39250,7 +39250,7 @@ void m68000_mcu_device::move_b_adr16_adr32_dfm() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39393,7 +39393,7 @@ void m68000_mcu_device::move_b_adr32_adr32_dfm() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39413,7 +39413,7 @@ void m68000_mcu_device::move_b_adr32_adr32_dfm() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39533,7 +39533,7 @@ void m68000_mcu_device::move_b_dpc_adr32_dfm() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39555,7 +39555,7 @@ void m68000_mcu_device::move_b_dpc_adr32_dfm() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39651,7 +39651,7 @@ void m68000_mcu_device::move_b_dpc_adr32_dfm() // 13fa ffff
void m68000_mcu_device::move_b_dpci_adr32_dfm() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39713,7 +39713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39735,7 +39735,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39880,7 +39880,7 @@ void m68000_mcu_device::move_b_imm8_adr32_dfm() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39963,13 +39963,13 @@ void m68000_mcu_device::move_l_ds_dd_dfm() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -40008,14 +40008,14 @@ void m68000_mcu_device::move_l_as_dd_dfm() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40050,7 +40050,7 @@ void m68000_mcu_device::move_l_ais_dd_dfm() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40098,14 +40098,14 @@ void m68000_mcu_device::move_l_ais_dd_dfm() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40140,7 +40140,7 @@ void m68000_mcu_device::move_l_aips_dd_dfm() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40191,14 +40191,14 @@ void m68000_mcu_device::move_l_aips_dd_dfm() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68000_mcu_device::move_l_pais_dd_dfm() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -40285,14 +40285,14 @@ void m68000_mcu_device::move_l_pais_dd_dfm() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40348,7 +40348,7 @@ void m68000_mcu_device::move_l_das_dd_dfm() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40396,14 +40396,14 @@ void m68000_mcu_device::move_l_das_dd_dfm() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40436,7 +40436,7 @@ void m68000_mcu_device::move_l_dais_dd_dfm() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -40497,7 +40497,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40545,14 +40545,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40610,7 +40610,7 @@ void m68000_mcu_device::move_l_adr16_dd_dfm() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40658,14 +40658,14 @@ void m68000_mcu_device::move_l_adr16_dd_dfm() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40744,7 +40744,7 @@ void m68000_mcu_device::move_l_adr32_dd_dfm() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -40792,14 +40792,14 @@ void m68000_mcu_device::move_l_adr32_dd_dfm() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40854,7 +40854,7 @@ void m68000_mcu_device::move_l_dpc_dd_dfm() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -40902,14 +40902,14 @@ void m68000_mcu_device::move_l_dpc_dd_dfm() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40941,7 +40941,7 @@ void m68000_mcu_device::move_l_dpci_dd_dfm() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41002,7 +41002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41050,14 +41050,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41139,14 +41139,14 @@ void m68000_mcu_device::move_l_imm32_dd_dfm() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41184,13 +41184,13 @@ void m68000_mcu_device::movea_l_ds_ad_dfm() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41227,12 +41227,12 @@ void m68000_mcu_device::movea_l_as_ad_dfm() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41267,7 +41267,7 @@ void m68000_mcu_device::movea_l_ais_ad_dfm() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41315,13 +41315,13 @@ void m68000_mcu_device::movea_l_ais_ad_dfm() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41355,7 +41355,7 @@ void m68000_mcu_device::movea_l_aips_ad_dfm() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41406,13 +41406,13 @@ void m68000_mcu_device::movea_l_aips_ad_dfm() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41445,7 +41445,7 @@ void m68000_mcu_device::movea_l_pais_ad_dfm() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -41498,13 +41498,13 @@ void m68000_mcu_device::movea_l_pais_ad_dfm() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41559,7 +41559,7 @@ void m68000_mcu_device::movea_l_das_ad_dfm() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41607,13 +41607,13 @@ void m68000_mcu_device::movea_l_das_ad_dfm() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41645,7 +41645,7 @@ void m68000_mcu_device::movea_l_dais_ad_dfm() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41706,7 +41706,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41754,13 +41754,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41817,7 +41817,7 @@ void m68000_mcu_device::movea_l_adr16_ad_dfm() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41865,13 +41865,13 @@ void m68000_mcu_device::movea_l_adr16_ad_dfm() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -41949,7 +41949,7 @@ void m68000_mcu_device::movea_l_adr32_ad_dfm() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -41997,13 +41997,13 @@ void m68000_mcu_device::movea_l_adr32_ad_dfm() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42057,7 +42057,7 @@ void m68000_mcu_device::movea_l_dpc_ad_dfm() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42105,13 +42105,13 @@ void m68000_mcu_device::movea_l_dpc_ad_dfm() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42142,7 +42142,7 @@ void m68000_mcu_device::movea_l_dpci_ad_dfm() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -42203,7 +42203,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42251,13 +42251,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42338,13 +42338,13 @@ void m68000_mcu_device::movea_l_imm32_ad_dfm() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -42402,7 +42402,7 @@ void m68000_mcu_device::move_l_ds_aid_dfm() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42427,7 +42427,7 @@ void m68000_mcu_device::move_l_ds_aid_dfm() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42486,7 +42486,7 @@ void m68000_mcu_device::move_l_as_aid_dfm() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42511,7 +42511,7 @@ void m68000_mcu_device::move_l_as_aid_dfm() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42546,7 +42546,7 @@ void m68000_mcu_device::move_l_ais_aid_dfm() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -42593,7 +42593,7 @@ void m68000_mcu_device::move_l_ais_aid_dfm() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42617,7 +42617,7 @@ void m68000_mcu_device::move_l_ais_aid_dfm() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42675,7 +42675,7 @@ void m68000_mcu_device::move_l_aips_aid_dfm() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -42725,7 +42725,7 @@ void m68000_mcu_device::move_l_aips_aid_dfm() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42749,7 +42749,7 @@ void m68000_mcu_device::move_l_aips_aid_dfm() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42806,7 +42806,7 @@ void m68000_mcu_device::move_l_pais_aid_dfm() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -42858,7 +42858,7 @@ void m68000_mcu_device::move_l_pais_aid_dfm() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42882,7 +42882,7 @@ void m68000_mcu_device::move_l_pais_aid_dfm() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42961,7 +42961,7 @@ void m68000_mcu_device::move_l_das_aid_dfm() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43008,7 +43008,7 @@ void m68000_mcu_device::move_l_das_aid_dfm() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43032,7 +43032,7 @@ void m68000_mcu_device::move_l_das_aid_dfm() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43088,7 +43088,7 @@ void m68000_mcu_device::move_l_dais_aid_dfm() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43149,7 +43149,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43196,7 +43196,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43220,7 +43220,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43301,7 +43301,7 @@ void m68000_mcu_device::move_l_adr16_aid_dfm() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43348,7 +43348,7 @@ void m68000_mcu_device::move_l_adr16_aid_dfm() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43372,7 +43372,7 @@ void m68000_mcu_device::move_l_adr16_aid_dfm() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43474,7 +43474,7 @@ void m68000_mcu_device::move_l_adr32_aid_dfm() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -43521,7 +43521,7 @@ void m68000_mcu_device::move_l_adr32_aid_dfm() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43545,7 +43545,7 @@ void m68000_mcu_device::move_l_adr32_aid_dfm() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43623,7 +43623,7 @@ void m68000_mcu_device::move_l_dpc_aid_dfm() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -43670,7 +43670,7 @@ void m68000_mcu_device::move_l_dpc_aid_dfm() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43694,7 +43694,7 @@ void m68000_mcu_device::move_l_dpc_aid_dfm() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43749,7 +43749,7 @@ void m68000_mcu_device::move_l_dpci_aid_dfm() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43810,7 +43810,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -43857,7 +43857,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43881,7 +43881,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44007,7 +44007,7 @@ void m68000_mcu_device::move_l_imm32_aid_dfm() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44032,7 +44032,7 @@ void m68000_mcu_device::move_l_imm32_aid_dfm() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44091,7 +44091,7 @@ void m68000_mcu_device::move_l_ds_aipd_dfm() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44116,7 +44116,7 @@ void m68000_mcu_device::move_l_ds_aipd_dfm() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44175,7 +44175,7 @@ void m68000_mcu_device::move_l_as_aipd_dfm() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44200,7 +44200,7 @@ void m68000_mcu_device::move_l_as_aipd_dfm() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44235,7 +44235,7 @@ void m68000_mcu_device::move_l_ais_aipd_dfm() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44282,7 +44282,7 @@ void m68000_mcu_device::move_l_ais_aipd_dfm() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44306,7 +44306,7 @@ void m68000_mcu_device::move_l_ais_aipd_dfm() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44363,7 +44363,7 @@ void m68000_mcu_device::move_l_aips_aipd_dfm() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44413,7 +44413,7 @@ void m68000_mcu_device::move_l_aips_aipd_dfm() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44437,7 +44437,7 @@ void m68000_mcu_device::move_l_aips_aipd_dfm() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44493,7 +44493,7 @@ void m68000_mcu_device::move_l_pais_aipd_dfm() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -44545,7 +44545,7 @@ void m68000_mcu_device::move_l_pais_aipd_dfm() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44569,7 +44569,7 @@ void m68000_mcu_device::move_l_pais_aipd_dfm() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44647,7 +44647,7 @@ void m68000_mcu_device::move_l_das_aipd_dfm() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44694,7 +44694,7 @@ void m68000_mcu_device::move_l_das_aipd_dfm() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44718,7 +44718,7 @@ void m68000_mcu_device::move_l_das_aipd_dfm() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44773,7 +44773,7 @@ void m68000_mcu_device::move_l_dais_aipd_dfm() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44834,7 +44834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -44881,7 +44881,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44905,7 +44905,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44985,7 +44985,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dfm() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45032,7 +45032,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dfm() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45056,7 +45056,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dfm() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45157,7 +45157,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dfm() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45204,7 +45204,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dfm() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45228,7 +45228,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dfm() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45305,7 +45305,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dfm() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -45352,7 +45352,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dfm() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45376,7 +45376,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dfm() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45430,7 +45430,7 @@ void m68000_mcu_device::move_l_dpci_aipd_dfm() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -45491,7 +45491,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -45538,7 +45538,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45562,7 +45562,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45687,7 +45687,7 @@ void m68000_mcu_device::move_l_imm32_aipd_dfm() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45712,7 +45712,7 @@ void m68000_mcu_device::move_l_imm32_aipd_dfm() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45749,7 +45749,7 @@ void m68000_mcu_device::move_l_ds_paid_dfm() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45774,7 +45774,7 @@ void m68000_mcu_device::move_l_ds_paid_dfm() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45832,7 +45832,7 @@ void m68000_mcu_device::move_l_as_paid_dfm() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45857,7 +45857,7 @@ void m68000_mcu_device::move_l_as_paid_dfm() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45913,7 +45913,7 @@ void m68000_mcu_device::move_l_ais_paid_dfm() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -45960,7 +45960,7 @@ void m68000_mcu_device::move_l_ais_paid_dfm() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45985,7 +45985,7 @@ void m68000_mcu_device::move_l_ais_paid_dfm() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46041,7 +46041,7 @@ void m68000_mcu_device::move_l_aips_paid_dfm() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46091,7 +46091,7 @@ void m68000_mcu_device::move_l_aips_paid_dfm() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46116,7 +46116,7 @@ void m68000_mcu_device::move_l_aips_paid_dfm() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46171,7 +46171,7 @@ void m68000_mcu_device::move_l_pais_paid_dfm() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -46223,7 +46223,7 @@ void m68000_mcu_device::move_l_pais_paid_dfm() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46248,7 +46248,7 @@ void m68000_mcu_device::move_l_pais_paid_dfm() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46325,7 +46325,7 @@ void m68000_mcu_device::move_l_das_paid_dfm() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46372,7 +46372,7 @@ void m68000_mcu_device::move_l_das_paid_dfm() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46397,7 +46397,7 @@ void m68000_mcu_device::move_l_das_paid_dfm() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46451,7 +46451,7 @@ void m68000_mcu_device::move_l_dais_paid_dfm() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46512,7 +46512,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46559,7 +46559,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46584,7 +46584,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46663,7 +46663,7 @@ void m68000_mcu_device::move_l_adr16_paid_dfm() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46710,7 +46710,7 @@ void m68000_mcu_device::move_l_adr16_paid_dfm() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46735,7 +46735,7 @@ void m68000_mcu_device::move_l_adr16_paid_dfm() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46835,7 +46835,7 @@ void m68000_mcu_device::move_l_adr32_paid_dfm() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -46882,7 +46882,7 @@ void m68000_mcu_device::move_l_adr32_paid_dfm() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46907,7 +46907,7 @@ void m68000_mcu_device::move_l_adr32_paid_dfm() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46983,7 +46983,7 @@ void m68000_mcu_device::move_l_dpc_paid_dfm() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -47030,7 +47030,7 @@ void m68000_mcu_device::move_l_dpc_paid_dfm() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47055,7 +47055,7 @@ void m68000_mcu_device::move_l_dpc_paid_dfm() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47108,7 +47108,7 @@ void m68000_mcu_device::move_l_dpci_paid_dfm() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47169,7 +47169,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -47216,7 +47216,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47241,7 +47241,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47343,7 +47343,7 @@ void m68000_mcu_device::move_l_imm32_paid_dfm() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47368,7 +47368,7 @@ void m68000_mcu_device::move_l_imm32_paid_dfm() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47447,7 +47447,7 @@ void m68000_mcu_device::move_l_ds_dad_dfm() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47471,7 +47471,7 @@ void m68000_mcu_device::move_l_ds_dad_dfm() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47496,7 +47496,7 @@ void m68000_mcu_device::move_l_ds_dad_dfm() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47554,7 +47554,7 @@ void m68000_mcu_device::move_l_as_dad_dfm() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47578,7 +47578,7 @@ void m68000_mcu_device::move_l_as_dad_dfm() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47603,7 +47603,7 @@ void m68000_mcu_device::move_l_as_dad_dfm() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47638,7 +47638,7 @@ void m68000_mcu_device::move_l_ais_dad_dfm() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -47684,7 +47684,7 @@ void m68000_mcu_device::move_l_ais_dad_dfm() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47709,7 +47709,7 @@ void m68000_mcu_device::move_l_ais_dad_dfm() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47793,7 +47793,7 @@ void m68000_mcu_device::move_l_aips_dad_dfm() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -47842,7 +47842,7 @@ void m68000_mcu_device::move_l_aips_dad_dfm() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47867,7 +47867,7 @@ void m68000_mcu_device::move_l_aips_dad_dfm() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47950,7 +47950,7 @@ void m68000_mcu_device::move_l_pais_dad_dfm() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48001,7 +48001,7 @@ void m68000_mcu_device::move_l_pais_dad_dfm() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48026,7 +48026,7 @@ void m68000_mcu_device::move_l_pais_dad_dfm() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48131,7 +48131,7 @@ void m68000_mcu_device::move_l_das_dad_dfm() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48177,7 +48177,7 @@ void m68000_mcu_device::move_l_das_dad_dfm() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48202,7 +48202,7 @@ void m68000_mcu_device::move_l_das_dad_dfm() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48284,7 +48284,7 @@ void m68000_mcu_device::move_l_dais_dad_dfm() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -48345,7 +48345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48391,7 +48391,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48416,7 +48416,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48523,7 +48523,7 @@ void m68000_mcu_device::move_l_adr16_dad_dfm() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48569,7 +48569,7 @@ void m68000_mcu_device::move_l_adr16_dad_dfm() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48594,7 +48594,7 @@ void m68000_mcu_device::move_l_adr16_dad_dfm() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48722,7 +48722,7 @@ void m68000_mcu_device::move_l_adr32_dad_dfm() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -48768,7 +48768,7 @@ void m68000_mcu_device::move_l_adr32_dad_dfm() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48793,7 +48793,7 @@ void m68000_mcu_device::move_l_adr32_dad_dfm() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48897,7 +48897,7 @@ void m68000_mcu_device::move_l_dpc_dad_dfm() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -48943,7 +48943,7 @@ void m68000_mcu_device::move_l_dpc_dad_dfm() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48968,7 +48968,7 @@ void m68000_mcu_device::move_l_dpc_dad_dfm() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49049,7 +49049,7 @@ void m68000_mcu_device::move_l_dpci_dad_dfm() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49110,7 +49110,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -49156,7 +49156,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49181,7 +49181,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49332,7 +49332,7 @@ void m68000_mcu_device::move_l_imm32_dad_dfm() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49356,7 +49356,7 @@ void m68000_mcu_device::move_l_imm32_dad_dfm() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49381,7 +49381,7 @@ void m68000_mcu_device::move_l_imm32_dad_dfm() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49414,7 +49414,7 @@ void m68000_mcu_device::move_l_ds_daid_dfm() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49478,7 +49478,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49502,7 +49502,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49527,7 +49527,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49560,7 +49560,7 @@ void m68000_mcu_device::move_l_as_daid_dfm() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49624,7 +49624,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49648,7 +49648,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49673,7 +49673,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49708,7 +49708,7 @@ void m68000_mcu_device::move_l_ais_daid_dfm() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -49751,7 +49751,7 @@ void m68000_mcu_device::move_l_ais_daid_dfm() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49766,7 +49766,7 @@ void m68000_mcu_device::move_l_ais_daid_dfm() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49790,7 +49790,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49817,7 +49817,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49901,7 +49901,7 @@ void m68000_mcu_device::move_l_aips_daid_dfm() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -49947,7 +49947,7 @@ void m68000_mcu_device::move_l_aips_daid_dfm() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49962,7 +49962,7 @@ void m68000_mcu_device::move_l_aips_daid_dfm() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49986,7 +49986,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50013,7 +50013,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50096,7 +50096,7 @@ void m68000_mcu_device::move_l_pais_daid_dfm() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50144,7 +50144,7 @@ void m68000_mcu_device::move_l_pais_daid_dfm() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50159,7 +50159,7 @@ void m68000_mcu_device::move_l_pais_daid_dfm() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50183,7 +50183,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50210,7 +50210,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50315,7 +50315,7 @@ void m68000_mcu_device::move_l_das_daid_dfm() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50358,7 +50358,7 @@ void m68000_mcu_device::move_l_das_daid_dfm() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50373,7 +50373,7 @@ void m68000_mcu_device::move_l_das_daid_dfm() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50397,7 +50397,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50424,7 +50424,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50506,7 +50506,7 @@ void m68000_mcu_device::move_l_dais_daid_dfm() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50567,7 +50567,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50610,7 +50610,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50625,7 +50625,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50649,7 +50649,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50676,7 +50676,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50783,7 +50783,7 @@ void m68000_mcu_device::move_l_adr16_daid_dfm() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -50826,7 +50826,7 @@ void m68000_mcu_device::move_l_adr16_daid_dfm() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50841,7 +50841,7 @@ void m68000_mcu_device::move_l_adr16_daid_dfm() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50865,7 +50865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50892,7 +50892,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51020,7 +51020,7 @@ void m68000_mcu_device::move_l_adr32_daid_dfm() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -51063,7 +51063,7 @@ void m68000_mcu_device::move_l_adr32_daid_dfm() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51078,7 +51078,7 @@ void m68000_mcu_device::move_l_adr32_daid_dfm() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51102,7 +51102,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51129,7 +51129,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51233,7 +51233,7 @@ void m68000_mcu_device::move_l_dpc_daid_dfm() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -51276,7 +51276,7 @@ void m68000_mcu_device::move_l_dpc_daid_dfm() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51291,7 +51291,7 @@ void m68000_mcu_device::move_l_dpc_daid_dfm() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51315,7 +51315,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51342,7 +51342,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51423,7 +51423,7 @@ void m68000_mcu_device::move_l_dpci_daid_dfm() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51484,7 +51484,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -51527,7 +51527,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51542,7 +51542,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51566,7 +51566,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51593,7 +51593,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51719,7 +51719,7 @@ void m68000_mcu_device::move_l_imm32_daid_dfm() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -51783,7 +51783,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51807,7 +51807,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51832,7 +51832,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51868,7 +51868,7 @@ void m68000_mcu_device::move_l_ds_adr16_dfm() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51893,7 +51893,7 @@ void m68000_mcu_device::move_l_ds_adr16_dfm() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51978,7 +51978,7 @@ void m68000_mcu_device::move_l_as_adr16_dfm() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52003,7 +52003,7 @@ void m68000_mcu_device::move_l_as_adr16_dfm() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52086,7 +52086,7 @@ void m68000_mcu_device::move_l_ais_adr16_dfm() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52132,7 +52132,7 @@ void m68000_mcu_device::move_l_ais_adr16_dfm() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52157,7 +52157,7 @@ void m68000_mcu_device::move_l_ais_adr16_dfm() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52240,7 +52240,7 @@ void m68000_mcu_device::move_l_aips_adr16_dfm() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52289,7 +52289,7 @@ void m68000_mcu_device::move_l_aips_adr16_dfm() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_mcu_device::move_l_aips_adr16_dfm() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52396,7 +52396,7 @@ void m68000_mcu_device::move_l_pais_adr16_dfm() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52447,7 +52447,7 @@ void m68000_mcu_device::move_l_pais_adr16_dfm() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52472,7 +52472,7 @@ void m68000_mcu_device::move_l_pais_adr16_dfm() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52576,7 +52576,7 @@ void m68000_mcu_device::move_l_das_adr16_dfm() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52622,7 +52622,7 @@ void m68000_mcu_device::move_l_das_adr16_dfm() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52647,7 +52647,7 @@ void m68000_mcu_device::move_l_das_adr16_dfm() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52728,7 +52728,7 @@ void m68000_mcu_device::move_l_dais_adr16_dfm() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52789,7 +52789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -52835,7 +52835,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52860,7 +52860,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52966,7 +52966,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dfm() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -53012,7 +53012,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dfm() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53037,7 +53037,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dfm() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53164,7 +53164,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dfm() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -53210,7 +53210,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dfm() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53235,7 +53235,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dfm() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53338,7 +53338,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dfm() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -53384,7 +53384,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dfm() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53409,7 +53409,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dfm() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53489,7 +53489,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dfm() // 21fa ffff
void m68000_mcu_device::move_l_dpci_adr16_dfm() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53550,7 +53550,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -53596,7 +53596,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53621,7 +53621,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53750,7 +53750,7 @@ void m68000_mcu_device::move_l_imm32_adr16_dfm() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53775,7 +53775,7 @@ void m68000_mcu_device::move_l_imm32_adr16_dfm() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53881,7 +53881,7 @@ void m68000_mcu_device::move_l_ds_adr32_dfm() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53906,7 +53906,7 @@ void m68000_mcu_device::move_l_ds_adr32_dfm() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54012,7 +54012,7 @@ void m68000_mcu_device::move_l_as_adr32_dfm() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54037,7 +54037,7 @@ void m68000_mcu_device::move_l_as_adr32_dfm() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54120,7 +54120,7 @@ void m68000_mcu_device::move_l_ais_adr32_dfm() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54167,7 +54167,7 @@ void m68000_mcu_device::move_l_ais_adr32_dfm() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54190,7 +54190,7 @@ void m68000_mcu_device::move_l_ais_adr32_dfm() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54214,7 +54214,7 @@ void m68000_mcu_device::move_l_ais_adr32_dfm() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54296,7 +54296,7 @@ void m68000_mcu_device::move_l_aips_adr32_dfm() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54346,7 +54346,7 @@ void m68000_mcu_device::move_l_aips_adr32_dfm() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54369,7 +54369,7 @@ void m68000_mcu_device::move_l_aips_adr32_dfm() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54393,7 +54393,7 @@ void m68000_mcu_device::move_l_aips_adr32_dfm() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54474,7 +54474,7 @@ void m68000_mcu_device::move_l_pais_adr32_dfm() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54526,7 +54526,7 @@ void m68000_mcu_device::move_l_pais_adr32_dfm() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54549,7 +54549,7 @@ void m68000_mcu_device::move_l_pais_adr32_dfm() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54573,7 +54573,7 @@ void m68000_mcu_device::move_l_pais_adr32_dfm() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54676,7 +54676,7 @@ void m68000_mcu_device::move_l_das_adr32_dfm() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54723,7 +54723,7 @@ void m68000_mcu_device::move_l_das_adr32_dfm() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54746,7 +54746,7 @@ void m68000_mcu_device::move_l_das_adr32_dfm() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54770,7 +54770,7 @@ void m68000_mcu_device::move_l_das_adr32_dfm() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54850,7 +54850,7 @@ void m68000_mcu_device::move_l_dais_adr32_dfm() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54911,7 +54911,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -54958,7 +54958,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -54981,7 +54981,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55005,7 +55005,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55110,7 +55110,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dfm() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -55157,7 +55157,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dfm() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55180,7 +55180,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dfm() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55204,7 +55204,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dfm() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55330,7 +55330,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dfm() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -55377,7 +55377,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dfm() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55400,7 +55400,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dfm() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55424,7 +55424,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dfm() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55526,7 +55526,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dfm() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55573,7 +55573,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dfm() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55596,7 +55596,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dfm() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55620,7 +55620,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dfm() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55699,7 +55699,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dfm() // 23fa ffff
void m68000_mcu_device::move_l_dpci_adr32_dfm() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55760,7 +55760,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55807,7 +55807,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -55830,7 +55830,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55854,7 +55854,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56003,7 +56003,7 @@ void m68000_mcu_device::move_l_imm32_adr32_dfm() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56028,7 +56028,7 @@ void m68000_mcu_device::move_l_imm32_adr32_dfm() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56115,7 +56115,7 @@ void m68000_mcu_device::move_w_ds_dd_dfm() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56158,7 +56158,7 @@ void m68000_mcu_device::move_w_as_dd_dfm() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56198,7 +56198,7 @@ void m68000_mcu_device::move_w_ais_dd_dfm() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56225,7 +56225,7 @@ void m68000_mcu_device::move_w_ais_dd_dfm() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56269,7 +56269,7 @@ void m68000_mcu_device::move_w_aips_dd_dfm() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56294,7 +56294,7 @@ void m68000_mcu_device::move_w_aips_dd_dfm() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56340,7 +56340,7 @@ void m68000_mcu_device::move_w_pais_dd_dfm() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56365,7 +56365,7 @@ void m68000_mcu_device::move_w_pais_dd_dfm() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56425,7 +56425,7 @@ void m68000_mcu_device::move_w_das_dd_dfm() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56452,7 +56452,7 @@ void m68000_mcu_device::move_w_das_dd_dfm() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56488,7 +56488,7 @@ void m68000_mcu_device::move_w_dais_dd_dfm() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56550,7 +56550,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56577,7 +56577,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56638,7 +56638,7 @@ void m68000_mcu_device::move_w_adr16_dd_dfm() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56663,7 +56663,7 @@ void m68000_mcu_device::move_w_adr16_dd_dfm() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56745,7 +56745,7 @@ void m68000_mcu_device::move_w_adr32_dd_dfm() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -56770,7 +56770,7 @@ void m68000_mcu_device::move_w_adr32_dd_dfm() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56829,7 +56829,7 @@ void m68000_mcu_device::move_w_dpc_dd_dfm() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56856,7 +56856,7 @@ void m68000_mcu_device::move_w_dpc_dd_dfm() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56891,7 +56891,7 @@ void m68000_mcu_device::move_w_dpci_dd_dfm() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56953,7 +56953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56980,7 +56980,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -57044,7 +57044,7 @@ void m68000_mcu_device::move_w_imm16_dd_dfm() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -57091,7 +57091,7 @@ void m68000_mcu_device::movea_w_ds_ad_dfm() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -57131,7 +57131,7 @@ void m68000_mcu_device::movea_w_as_ad_dfm() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57166,7 +57166,7 @@ void m68000_mcu_device::movea_w_ais_ad_dfm() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57234,7 +57234,7 @@ void m68000_mcu_device::movea_w_aips_ad_dfm() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57302,7 +57302,7 @@ void m68000_mcu_device::movea_w_pais_ad_dfm() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57384,7 +57384,7 @@ void m68000_mcu_device::movea_w_das_ad_dfm() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57444,7 +57444,7 @@ void m68000_mcu_device::movea_w_dais_ad_dfm() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57506,7 +57506,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57591,7 +57591,7 @@ void m68000_mcu_device::movea_w_adr16_ad_dfm() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57695,7 +57695,7 @@ void m68000_mcu_device::movea_w_adr32_ad_dfm() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -57776,7 +57776,7 @@ void m68000_mcu_device::movea_w_dpc_ad_dfm() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57835,7 +57835,7 @@ void m68000_mcu_device::movea_w_dpci_ad_dfm() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57897,7 +57897,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57989,7 +57989,7 @@ void m68000_mcu_device::movea_w_imm16_ad_dfm() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -58026,7 +58026,7 @@ void m68000_mcu_device::move_w_ds_aid_dfm() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58087,7 +58087,7 @@ void m68000_mcu_device::move_w_as_aid_dfm() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58145,7 +58145,7 @@ void m68000_mcu_device::move_w_ais_aid_dfm() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58171,7 +58171,7 @@ void m68000_mcu_device::move_w_ais_aid_dfm() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58235,7 +58235,7 @@ void m68000_mcu_device::move_w_aips_aid_dfm() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58259,7 +58259,7 @@ void m68000_mcu_device::move_w_aips_aid_dfm() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58325,7 +58325,7 @@ void m68000_mcu_device::move_w_pais_aid_dfm() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58349,7 +58349,7 @@ void m68000_mcu_device::move_w_pais_aid_dfm() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58429,7 +58429,7 @@ void m68000_mcu_device::move_w_das_aid_dfm() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58455,7 +58455,7 @@ void m68000_mcu_device::move_w_das_aid_dfm() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58511,7 +58511,7 @@ void m68000_mcu_device::move_w_dais_aid_dfm() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58573,7 +58573,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58599,7 +58599,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58680,7 +58680,7 @@ void m68000_mcu_device::move_w_adr16_aid_dfm() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58704,7 +58704,7 @@ void m68000_mcu_device::move_w_adr16_aid_dfm() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58806,7 +58806,7 @@ void m68000_mcu_device::move_w_adr32_aid_dfm() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -58830,7 +58830,7 @@ void m68000_mcu_device::move_w_adr32_aid_dfm() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58909,7 +58909,7 @@ void m68000_mcu_device::move_w_dpc_aid_dfm() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58935,7 +58935,7 @@ void m68000_mcu_device::move_w_dpc_aid_dfm() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58990,7 +58990,7 @@ void m68000_mcu_device::move_w_dpci_aid_dfm() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59052,7 +59052,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59078,7 +59078,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59162,7 +59162,7 @@ void m68000_mcu_device::move_w_imm16_aid_dfm() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59223,7 +59223,7 @@ void m68000_mcu_device::move_w_ds_aipd_dfm() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59283,7 +59283,7 @@ void m68000_mcu_device::move_w_as_aipd_dfm() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59340,7 +59340,7 @@ void m68000_mcu_device::move_w_ais_aipd_dfm() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59367,7 +59367,7 @@ void m68000_mcu_device::move_w_ais_aipd_dfm() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59430,7 +59430,7 @@ void m68000_mcu_device::move_w_aips_aipd_dfm() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59455,7 +59455,7 @@ void m68000_mcu_device::move_w_aips_aipd_dfm() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59520,7 +59520,7 @@ void m68000_mcu_device::move_w_pais_aipd_dfm() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59545,7 +59545,7 @@ void m68000_mcu_device::move_w_pais_aipd_dfm() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59624,7 +59624,7 @@ void m68000_mcu_device::move_w_das_aipd_dfm() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59651,7 +59651,7 @@ void m68000_mcu_device::move_w_das_aipd_dfm() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59706,7 +59706,7 @@ void m68000_mcu_device::move_w_dais_aipd_dfm() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59768,7 +59768,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59795,7 +59795,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59875,7 +59875,7 @@ void m68000_mcu_device::move_w_adr16_aipd_dfm() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -59900,7 +59900,7 @@ void m68000_mcu_device::move_w_adr16_aipd_dfm() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60001,7 +60001,7 @@ void m68000_mcu_device::move_w_adr32_aipd_dfm() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60026,7 +60026,7 @@ void m68000_mcu_device::move_w_adr32_aipd_dfm() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60104,7 +60104,7 @@ void m68000_mcu_device::move_w_dpc_aipd_dfm() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60131,7 +60131,7 @@ void m68000_mcu_device::move_w_dpc_aipd_dfm() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60185,7 +60185,7 @@ void m68000_mcu_device::move_w_dpci_aipd_dfm() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60247,7 +60247,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60274,7 +60274,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60357,7 +60357,7 @@ void m68000_mcu_device::move_w_imm16_aipd_dfm() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60416,7 +60416,7 @@ void m68000_mcu_device::move_w_ds_paid_dfm() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60476,7 +60476,7 @@ void m68000_mcu_device::move_w_as_paid_dfm() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60534,7 +60534,7 @@ void m68000_mcu_device::move_w_ais_paid_dfm() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60560,7 +60560,7 @@ void m68000_mcu_device::move_w_ais_paid_dfm() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60624,7 +60624,7 @@ void m68000_mcu_device::move_w_aips_paid_dfm() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60648,7 +60648,7 @@ void m68000_mcu_device::move_w_aips_paid_dfm() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60714,7 +60714,7 @@ void m68000_mcu_device::move_w_pais_paid_dfm() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -60738,7 +60738,7 @@ void m68000_mcu_device::move_w_pais_paid_dfm() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60818,7 +60818,7 @@ void m68000_mcu_device::move_w_das_paid_dfm() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60844,7 +60844,7 @@ void m68000_mcu_device::move_w_das_paid_dfm() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60900,7 +60900,7 @@ void m68000_mcu_device::move_w_dais_paid_dfm() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60962,7 +60962,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60988,7 +60988,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61069,7 +61069,7 @@ void m68000_mcu_device::move_w_adr16_paid_dfm() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61093,7 +61093,7 @@ void m68000_mcu_device::move_w_adr16_paid_dfm() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61195,7 +61195,7 @@ void m68000_mcu_device::move_w_adr32_paid_dfm() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61219,7 +61219,7 @@ void m68000_mcu_device::move_w_adr32_paid_dfm() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61298,7 +61298,7 @@ void m68000_mcu_device::move_w_dpc_paid_dfm() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61324,7 +61324,7 @@ void m68000_mcu_device::move_w_dpc_paid_dfm() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61379,7 +61379,7 @@ void m68000_mcu_device::move_w_dpci_paid_dfm() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -61441,7 +61441,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61467,7 +61467,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61550,7 +61550,7 @@ void m68000_mcu_device::move_w_imm16_paid_dfm() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61631,7 +61631,7 @@ void m68000_mcu_device::move_w_ds_dad_dfm() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61713,7 +61713,7 @@ void m68000_mcu_device::move_w_as_dad_dfm() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61772,7 +61772,7 @@ void m68000_mcu_device::move_w_ais_dad_dfm() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61797,7 +61797,7 @@ void m68000_mcu_device::move_w_ais_dad_dfm() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61888,7 +61888,7 @@ void m68000_mcu_device::move_w_aips_dad_dfm() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -61911,7 +61911,7 @@ void m68000_mcu_device::move_w_aips_dad_dfm() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62004,7 +62004,7 @@ void m68000_mcu_device::move_w_pais_dad_dfm() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62027,7 +62027,7 @@ void m68000_mcu_device::move_w_pais_dad_dfm() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62134,7 +62134,7 @@ void m68000_mcu_device::move_w_das_dad_dfm() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62159,7 +62159,7 @@ void m68000_mcu_device::move_w_das_dad_dfm() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62242,7 +62242,7 @@ void m68000_mcu_device::move_w_dais_dad_dfm() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62304,7 +62304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62329,7 +62329,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62437,7 +62437,7 @@ void m68000_mcu_device::move_w_adr16_dad_dfm() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62460,7 +62460,7 @@ void m68000_mcu_device::move_w_adr16_dad_dfm() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62589,7 +62589,7 @@ void m68000_mcu_device::move_w_adr32_dad_dfm() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -62612,7 +62612,7 @@ void m68000_mcu_device::move_w_adr32_dad_dfm() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62718,7 +62718,7 @@ void m68000_mcu_device::move_w_dpc_dad_dfm() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62743,7 +62743,7 @@ void m68000_mcu_device::move_w_dpc_dad_dfm() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62825,7 +62825,7 @@ void m68000_mcu_device::move_w_dpci_dad_dfm() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62887,7 +62887,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62912,7 +62912,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63043,7 +63043,7 @@ void m68000_mcu_device::move_w_imm16_dad_dfm() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63100,7 +63100,7 @@ void m68000_mcu_device::move_w_ds_daid_dfm() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63164,7 +63164,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63221,7 +63221,7 @@ void m68000_mcu_device::move_w_as_daid_dfm() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63285,7 +63285,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63344,7 +63344,7 @@ void m68000_mcu_device::move_w_ais_daid_dfm() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63366,7 +63366,7 @@ void m68000_mcu_device::move_w_ais_daid_dfm() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63381,7 +63381,7 @@ void m68000_mcu_device::move_w_ais_daid_dfm() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63405,7 +63405,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63498,7 +63498,7 @@ void m68000_mcu_device::move_w_aips_daid_dfm() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -63518,7 +63518,7 @@ void m68000_mcu_device::move_w_aips_daid_dfm() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63533,7 +63533,7 @@ void m68000_mcu_device::move_w_aips_daid_dfm() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63557,7 +63557,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63652,7 +63652,7 @@ void m68000_mcu_device::move_w_pais_daid_dfm() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -63672,7 +63672,7 @@ void m68000_mcu_device::move_w_pais_daid_dfm() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63687,7 +63687,7 @@ void m68000_mcu_device::move_w_pais_daid_dfm() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63711,7 +63711,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63820,7 +63820,7 @@ void m68000_mcu_device::move_w_das_daid_dfm() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63842,7 +63842,7 @@ void m68000_mcu_device::move_w_das_daid_dfm() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63857,7 +63857,7 @@ void m68000_mcu_device::move_w_das_daid_dfm() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63881,7 +63881,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63966,7 +63966,7 @@ void m68000_mcu_device::move_w_dais_daid_dfm() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64028,7 +64028,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64050,7 +64050,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64065,7 +64065,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64089,7 +64089,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64199,7 +64199,7 @@ void m68000_mcu_device::move_w_adr16_daid_dfm() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -64219,7 +64219,7 @@ void m68000_mcu_device::move_w_adr16_daid_dfm() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64234,7 +64234,7 @@ void m68000_mcu_device::move_w_adr16_daid_dfm() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64258,7 +64258,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64389,7 +64389,7 @@ void m68000_mcu_device::move_w_adr32_daid_dfm() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -64409,7 +64409,7 @@ void m68000_mcu_device::move_w_adr32_daid_dfm() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64424,7 +64424,7 @@ void m68000_mcu_device::move_w_adr32_daid_dfm() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64448,7 +64448,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64556,7 +64556,7 @@ void m68000_mcu_device::move_w_dpc_daid_dfm() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64578,7 +64578,7 @@ void m68000_mcu_device::move_w_dpc_daid_dfm() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64593,7 +64593,7 @@ void m68000_mcu_device::move_w_dpc_daid_dfm() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64617,7 +64617,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64701,7 +64701,7 @@ void m68000_mcu_device::move_w_dpci_daid_dfm() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64763,7 +64763,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64785,7 +64785,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64800,7 +64800,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64824,7 +64824,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64932,7 +64932,7 @@ void m68000_mcu_device::move_w_imm16_daid_dfm() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -64996,7 +64996,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65056,7 +65056,7 @@ void m68000_mcu_device::move_w_ds_adr16_dfm() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65142,7 +65142,7 @@ void m68000_mcu_device::move_w_as_adr16_dfm() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65226,7 +65226,7 @@ void m68000_mcu_device::move_w_ais_adr16_dfm() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65251,7 +65251,7 @@ void m68000_mcu_device::move_w_ais_adr16_dfm() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65341,7 +65341,7 @@ void m68000_mcu_device::move_w_aips_adr16_dfm() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65364,7 +65364,7 @@ void m68000_mcu_device::move_w_aips_adr16_dfm() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65456,7 +65456,7 @@ void m68000_mcu_device::move_w_pais_adr16_dfm() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65479,7 +65479,7 @@ void m68000_mcu_device::move_w_pais_adr16_dfm() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65585,7 +65585,7 @@ void m68000_mcu_device::move_w_das_adr16_dfm() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65610,7 +65610,7 @@ void m68000_mcu_device::move_w_das_adr16_dfm() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65692,7 +65692,7 @@ void m68000_mcu_device::move_w_dais_adr16_dfm() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65754,7 +65754,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65779,7 +65779,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65886,7 +65886,7 @@ void m68000_mcu_device::move_w_adr16_adr16_dfm() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -65909,7 +65909,7 @@ void m68000_mcu_device::move_w_adr16_adr16_dfm() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66037,7 +66037,7 @@ void m68000_mcu_device::move_w_adr32_adr16_dfm() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -66060,7 +66060,7 @@ void m68000_mcu_device::move_w_adr32_adr16_dfm() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66165,7 +66165,7 @@ void m68000_mcu_device::move_w_dpc_adr16_dfm() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66190,7 +66190,7 @@ void m68000_mcu_device::move_w_dpc_adr16_dfm() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66271,7 +66271,7 @@ void m68000_mcu_device::move_w_dpc_adr16_dfm() // 31fa ffff
void m68000_mcu_device::move_w_dpci_adr16_dfm() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66333,7 +66333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66358,7 +66358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66467,7 +66467,7 @@ void m68000_mcu_device::move_w_imm16_adr16_dfm() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66574,7 +66574,7 @@ void m68000_mcu_device::move_w_ds_adr32_dfm() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66681,7 +66681,7 @@ void m68000_mcu_device::move_w_as_adr32_dfm() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66765,7 +66765,7 @@ void m68000_mcu_device::move_w_ais_adr32_dfm() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66790,7 +66790,7 @@ void m68000_mcu_device::move_w_ais_adr32_dfm() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66900,7 +66900,7 @@ void m68000_mcu_device::move_w_aips_adr32_dfm() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -66923,7 +66923,7 @@ void m68000_mcu_device::move_w_aips_adr32_dfm() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67035,7 +67035,7 @@ void m68000_mcu_device::move_w_pais_adr32_dfm() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67058,7 +67058,7 @@ void m68000_mcu_device::move_w_pais_adr32_dfm() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67184,7 +67184,7 @@ void m68000_mcu_device::move_w_das_adr32_dfm() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67209,7 +67209,7 @@ void m68000_mcu_device::move_w_das_adr32_dfm() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67311,7 +67311,7 @@ void m68000_mcu_device::move_w_dais_adr32_dfm() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67373,7 +67373,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67398,7 +67398,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67525,7 +67525,7 @@ void m68000_mcu_device::move_w_adr16_adr32_dfm() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67548,7 +67548,7 @@ void m68000_mcu_device::move_w_adr16_adr32_dfm() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67696,7 +67696,7 @@ void m68000_mcu_device::move_w_adr32_adr32_dfm() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -67719,7 +67719,7 @@ void m68000_mcu_device::move_w_adr32_adr32_dfm() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67844,7 +67844,7 @@ void m68000_mcu_device::move_w_dpc_adr32_dfm() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67869,7 +67869,7 @@ void m68000_mcu_device::move_w_dpc_adr32_dfm() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67970,7 +67970,7 @@ void m68000_mcu_device::move_w_dpc_adr32_dfm() // 33fa ffff
void m68000_mcu_device::move_w_dpci_adr32_dfm() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68032,7 +68032,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68057,7 +68057,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68207,7 +68207,7 @@ void m68000_mcu_device::move_w_imm16_adr32_dfm() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68293,7 +68293,7 @@ void m68000_mcu_device::negx_b_ds_dfm() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -68332,7 +68332,7 @@ void m68000_mcu_device::negx_b_ais_dfm() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68355,7 +68355,7 @@ void m68000_mcu_device::negx_b_ais_dfm() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68412,7 +68412,7 @@ void m68000_mcu_device::negx_b_aips_dfm() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68433,7 +68433,7 @@ void m68000_mcu_device::negx_b_aips_dfm() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68492,7 +68492,7 @@ void m68000_mcu_device::negx_b_pais_dfm() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68513,7 +68513,7 @@ void m68000_mcu_device::negx_b_pais_dfm() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68586,7 +68586,7 @@ void m68000_mcu_device::negx_b_das_dfm() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68609,7 +68609,7 @@ void m68000_mcu_device::negx_b_das_dfm() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68658,7 +68658,7 @@ void m68000_mcu_device::negx_b_dais_dfm() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68720,7 +68720,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68743,7 +68743,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68817,7 +68817,7 @@ void m68000_mcu_device::negx_b_adr16_dfm() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68838,7 +68838,7 @@ void m68000_mcu_device::negx_b_adr16_dfm() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68933,7 +68933,7 @@ void m68000_mcu_device::negx_b_adr32_dfm() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68954,7 +68954,7 @@ void m68000_mcu_device::negx_b_adr32_dfm() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69007,7 +69007,7 @@ void m68000_mcu_device::negx_w_ds_dfm() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -69046,7 +69046,7 @@ void m68000_mcu_device::negx_w_ais_dfm() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69072,7 +69072,7 @@ void m68000_mcu_device::negx_w_ais_dfm() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69134,7 +69134,7 @@ void m68000_mcu_device::negx_w_aips_dfm() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69158,7 +69158,7 @@ void m68000_mcu_device::negx_w_aips_dfm() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69222,7 +69222,7 @@ void m68000_mcu_device::negx_w_pais_dfm() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69246,7 +69246,7 @@ void m68000_mcu_device::negx_w_pais_dfm() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69324,7 +69324,7 @@ void m68000_mcu_device::negx_w_das_dfm() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69350,7 +69350,7 @@ void m68000_mcu_device::negx_w_das_dfm() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69404,7 +69404,7 @@ void m68000_mcu_device::negx_w_dais_dfm() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69466,7 +69466,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69492,7 +69492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69571,7 +69571,7 @@ void m68000_mcu_device::negx_w_adr16_dfm() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69595,7 +69595,7 @@ void m68000_mcu_device::negx_w_adr16_dfm() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69695,7 +69695,7 @@ void m68000_mcu_device::negx_w_adr32_dfm() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69719,7 +69719,7 @@ void m68000_mcu_device::negx_w_adr32_dfm() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69777,12 +69777,12 @@ void m68000_mcu_device::negx_l_ds_dfm() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69822,7 +69822,7 @@ void m68000_mcu_device::negx_l_ais_dfm() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69869,7 +69869,7 @@ void m68000_mcu_device::negx_l_ais_dfm() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69894,7 +69894,7 @@ void m68000_mcu_device::negx_l_ais_dfm() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -69948,7 +69948,7 @@ void m68000_mcu_device::negx_l_aips_dfm() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -69998,7 +69998,7 @@ void m68000_mcu_device::negx_l_aips_dfm() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70023,7 +70023,7 @@ void m68000_mcu_device::negx_l_aips_dfm() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70076,7 +70076,7 @@ void m68000_mcu_device::negx_l_pais_dfm() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -70128,7 +70128,7 @@ void m68000_mcu_device::negx_l_pais_dfm() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70153,7 +70153,7 @@ void m68000_mcu_device::negx_l_pais_dfm() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70228,7 +70228,7 @@ void m68000_mcu_device::negx_l_das_dfm() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70275,7 +70275,7 @@ void m68000_mcu_device::negx_l_das_dfm() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70300,7 +70300,7 @@ void m68000_mcu_device::negx_l_das_dfm() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70352,7 +70352,7 @@ void m68000_mcu_device::negx_l_dais_dfm() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70413,7 +70413,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70460,7 +70460,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70485,7 +70485,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70562,7 +70562,7 @@ void m68000_mcu_device::negx_l_adr16_dfm() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70609,7 +70609,7 @@ void m68000_mcu_device::negx_l_adr16_dfm() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70634,7 +70634,7 @@ void m68000_mcu_device::negx_l_adr16_dfm() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70732,7 +70732,7 @@ void m68000_mcu_device::negx_l_adr32_dfm() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -70779,7 +70779,7 @@ void m68000_mcu_device::negx_l_adr32_dfm() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70804,7 +70804,7 @@ void m68000_mcu_device::negx_l_adr32_dfm() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70898,7 +70898,7 @@ void m68000_mcu_device::move_sr_ais_dfm() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -70926,7 +70926,7 @@ void m68000_mcu_device::move_sr_ais_dfm() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -70987,7 +70987,7 @@ void m68000_mcu_device::move_sr_aips_dfm() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71013,7 +71013,7 @@ void m68000_mcu_device::move_sr_aips_dfm() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71076,7 +71076,7 @@ void m68000_mcu_device::move_sr_pais_dfm() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71102,7 +71102,7 @@ void m68000_mcu_device::move_sr_pais_dfm() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71179,7 +71179,7 @@ void m68000_mcu_device::move_sr_das_dfm() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71207,7 +71207,7 @@ void m68000_mcu_device::move_sr_das_dfm() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71260,7 +71260,7 @@ void m68000_mcu_device::move_sr_dais_dfm() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71322,7 +71322,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71350,7 +71350,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71428,7 +71428,7 @@ void m68000_mcu_device::move_sr_adr16_dfm() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71454,7 +71454,7 @@ void m68000_mcu_device::move_sr_adr16_dfm() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71553,7 +71553,7 @@ void m68000_mcu_device::move_sr_adr32_dfm() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -71579,7 +71579,7 @@ void m68000_mcu_device::move_sr_adr32_dfm() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -71635,7 +71635,7 @@ void m68000_mcu_device::chk_w_ds_dd_dfm() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -71643,7 +71643,7 @@ void m68000_mcu_device::chk_w_ds_dd_dfm() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71661,14 +71661,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71693,7 +71693,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71716,7 +71716,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71855,7 +71855,7 @@ void m68000_mcu_device::chk_w_ais_dd_dfm() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -71879,7 +71879,7 @@ void m68000_mcu_device::chk_w_ais_dd_dfm() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -71887,7 +71887,7 @@ void m68000_mcu_device::chk_w_ais_dd_dfm() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71905,14 +71905,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71937,7 +71937,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -71960,7 +71960,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72105,7 +72105,7 @@ void m68000_mcu_device::chk_w_aips_dd_dfm() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -72127,7 +72127,7 @@ void m68000_mcu_device::chk_w_aips_dd_dfm() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72135,7 +72135,7 @@ void m68000_mcu_device::chk_w_aips_dd_dfm() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72153,14 +72153,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72185,7 +72185,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72208,7 +72208,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72355,7 +72355,7 @@ void m68000_mcu_device::chk_w_pais_dd_dfm() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -72377,7 +72377,7 @@ void m68000_mcu_device::chk_w_pais_dd_dfm() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72385,7 +72385,7 @@ void m68000_mcu_device::chk_w_pais_dd_dfm() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72403,14 +72403,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72435,7 +72435,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72458,7 +72458,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72619,7 +72619,7 @@ void m68000_mcu_device::chk_w_das_dd_dfm() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72643,7 +72643,7 @@ void m68000_mcu_device::chk_w_das_dd_dfm() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72651,7 +72651,7 @@ void m68000_mcu_device::chk_w_das_dd_dfm() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72669,14 +72669,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72701,7 +72701,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72724,7 +72724,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -72861,7 +72861,7 @@ void m68000_mcu_device::chk_w_dais_dd_dfm() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72923,7 +72923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72947,7 +72947,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72955,7 +72955,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72973,14 +72973,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73005,7 +73005,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73028,7 +73028,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73190,7 +73190,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dfm() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -73212,7 +73212,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dfm() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73220,7 +73220,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dfm() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73238,14 +73238,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73270,7 +73270,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73293,7 +73293,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73476,7 +73476,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dfm() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -73498,7 +73498,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dfm() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73506,7 +73506,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dfm() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73524,14 +73524,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73556,7 +73556,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73579,7 +73579,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73739,7 +73739,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dfm() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73763,7 +73763,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dfm() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73771,7 +73771,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dfm() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73789,14 +73789,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73821,7 +73821,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73844,7 +73844,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -73980,7 +73980,7 @@ void m68000_mcu_device::chk_w_dpci_dd_dfm() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74042,7 +74042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74066,7 +74066,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -74074,7 +74074,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74092,14 +74092,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74124,7 +74124,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74147,7 +74147,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74309,7 +74309,7 @@ void m68000_mcu_device::chk_w_imm16_dd_dfm() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -74317,7 +74317,7 @@ void m68000_mcu_device::chk_w_imm16_dd_dfm() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74335,14 +74335,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74367,7 +74367,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74390,7 +74390,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -74628,7 +74628,7 @@ void m68000_mcu_device::lea_dais_ad_dfm() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -74923,7 +74923,7 @@ void m68000_mcu_device::lea_dpci_ad_dfm() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -75026,7 +75026,7 @@ void m68000_mcu_device::clr_b_ds_dfm() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75034,7 +75034,7 @@ void m68000_mcu_device::clr_b_ds_dfm() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75066,11 +75066,11 @@ void m68000_mcu_device::clr_b_ais_dfm() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75090,7 +75090,7 @@ void m68000_mcu_device::clr_b_ais_dfm() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75117,7 +75117,7 @@ void m68000_mcu_device::clr_b_ais_dfm() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75145,12 +75145,12 @@ void m68000_mcu_device::clr_b_aips_dfm() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75171,7 +75171,7 @@ void m68000_mcu_device::clr_b_aips_dfm() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75198,7 +75198,7 @@ void m68000_mcu_device::clr_b_aips_dfm() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75225,7 +75225,7 @@ void m68000_mcu_device::clr_b_pais_dfm() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75233,7 +75233,7 @@ void m68000_mcu_device::clr_b_pais_dfm() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75254,7 +75254,7 @@ void m68000_mcu_device::clr_b_pais_dfm() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75281,7 +75281,7 @@ void m68000_mcu_device::clr_b_pais_dfm() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75306,7 +75306,7 @@ void m68000_mcu_device::clr_b_das_dfm() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75329,11 +75329,11 @@ void m68000_mcu_device::clr_b_das_dfm() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75353,7 +75353,7 @@ void m68000_mcu_device::clr_b_das_dfm() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75380,7 +75380,7 @@ void m68000_mcu_device::clr_b_das_dfm() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75403,14 +75403,14 @@ void m68000_mcu_device::clr_b_dais_dfm() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -75418,7 +75418,7 @@ void m68000_mcu_device::clr_b_dais_dfm() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75442,7 +75442,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75468,11 +75468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75492,7 +75492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75519,7 +75519,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75546,7 +75546,7 @@ void m68000_mcu_device::clr_b_adr16_dfm() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -75569,7 +75569,7 @@ void m68000_mcu_device::clr_b_adr16_dfm() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75590,7 +75590,7 @@ void m68000_mcu_device::clr_b_adr16_dfm() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75617,7 +75617,7 @@ void m68000_mcu_device::clr_b_adr16_dfm() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75642,7 +75642,7 @@ void m68000_mcu_device::clr_b_adr32_dfm() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75666,7 +75666,7 @@ void m68000_mcu_device::clr_b_adr32_dfm() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -75689,7 +75689,7 @@ void m68000_mcu_device::clr_b_adr32_dfm() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75710,7 +75710,7 @@ void m68000_mcu_device::clr_b_adr32_dfm() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75737,7 +75737,7 @@ void m68000_mcu_device::clr_b_adr32_dfm() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75764,7 +75764,7 @@ void m68000_mcu_device::clr_w_ds_dfm() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75772,7 +75772,7 @@ void m68000_mcu_device::clr_w_ds_dfm() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75804,11 +75804,11 @@ void m68000_mcu_device::clr_w_ais_dfm() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -75831,7 +75831,7 @@ void m68000_mcu_device::clr_w_ais_dfm() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75858,7 +75858,7 @@ void m68000_mcu_device::clr_w_ais_dfm() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -75891,12 +75891,12 @@ void m68000_mcu_device::clr_w_aips_dfm() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -75920,7 +75920,7 @@ void m68000_mcu_device::clr_w_aips_dfm() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75947,7 +75947,7 @@ void m68000_mcu_device::clr_w_aips_dfm() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -75979,7 +75979,7 @@ void m68000_mcu_device::clr_w_pais_dfm() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75987,7 +75987,7 @@ void m68000_mcu_device::clr_w_pais_dfm() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76011,7 +76011,7 @@ void m68000_mcu_device::clr_w_pais_dfm() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76038,7 +76038,7 @@ void m68000_mcu_device::clr_w_pais_dfm() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76068,7 +76068,7 @@ void m68000_mcu_device::clr_w_das_dfm() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76091,11 +76091,11 @@ void m68000_mcu_device::clr_w_das_dfm() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76118,7 +76118,7 @@ void m68000_mcu_device::clr_w_das_dfm() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76145,7 +76145,7 @@ void m68000_mcu_device::clr_w_das_dfm() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76173,14 +76173,14 @@ void m68000_mcu_device::clr_w_dais_dfm() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -76188,7 +76188,7 @@ void m68000_mcu_device::clr_w_dais_dfm() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76212,7 +76212,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76238,11 +76238,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76265,7 +76265,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76292,7 +76292,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76324,7 +76324,7 @@ void m68000_mcu_device::clr_w_adr16_dfm() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -76347,7 +76347,7 @@ void m68000_mcu_device::clr_w_adr16_dfm() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76371,7 +76371,7 @@ void m68000_mcu_device::clr_w_adr16_dfm() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76398,7 +76398,7 @@ void m68000_mcu_device::clr_w_adr16_dfm() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76428,7 +76428,7 @@ void m68000_mcu_device::clr_w_adr32_dfm() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76452,7 +76452,7 @@ void m68000_mcu_device::clr_w_adr32_dfm() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -76475,7 +76475,7 @@ void m68000_mcu_device::clr_w_adr32_dfm() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76499,7 +76499,7 @@ void m68000_mcu_device::clr_w_adr32_dfm() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76526,7 +76526,7 @@ void m68000_mcu_device::clr_w_adr32_dfm() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76558,12 +76558,12 @@ void m68000_mcu_device::clr_l_ds_dfm() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76589,7 +76589,7 @@ void m68000_mcu_device::clr_l_ds_dfm() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -76604,7 +76604,7 @@ void m68000_mcu_device::clr_l_ais_dfm() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76629,7 +76629,7 @@ void m68000_mcu_device::clr_l_ais_dfm() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76652,7 +76652,7 @@ void m68000_mcu_device::clr_l_ais_dfm() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76677,7 +76677,7 @@ void m68000_mcu_device::clr_l_ais_dfm() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76702,7 +76702,7 @@ void m68000_mcu_device::clr_l_ais_dfm() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76732,7 +76732,7 @@ void m68000_mcu_device::clr_l_aips_dfm() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -76757,11 +76757,11 @@ void m68000_mcu_device::clr_l_aips_dfm() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76784,7 +76784,7 @@ void m68000_mcu_device::clr_l_aips_dfm() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76809,7 +76809,7 @@ void m68000_mcu_device::clr_l_aips_dfm() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76834,7 +76834,7 @@ void m68000_mcu_device::clr_l_aips_dfm() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76863,14 +76863,14 @@ void m68000_mcu_device::clr_l_pais_dfm() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76894,7 +76894,7 @@ void m68000_mcu_device::clr_l_pais_dfm() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -76917,7 +76917,7 @@ void m68000_mcu_device::clr_l_pais_dfm() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76942,7 +76942,7 @@ void m68000_mcu_device::clr_l_pais_dfm() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76967,7 +76967,7 @@ void m68000_mcu_device::clr_l_pais_dfm() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -76997,7 +76997,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77019,7 +77019,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77044,7 +77044,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77067,7 +77067,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77092,7 +77092,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77117,7 +77117,7 @@ void m68000_mcu_device::clr_l_das_dfm() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77145,14 +77145,14 @@ void m68000_mcu_device::clr_l_dais_dfm() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -77160,7 +77160,7 @@ void m68000_mcu_device::clr_l_dais_dfm() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77184,7 +77184,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77209,7 +77209,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77234,7 +77234,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77257,7 +77257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77282,7 +77282,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77307,7 +77307,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77339,7 +77339,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -77362,7 +77362,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77387,7 +77387,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77410,7 +77410,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77435,7 +77435,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77460,7 +77460,7 @@ void m68000_mcu_device::clr_l_adr16_dfm() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77490,7 +77490,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77514,7 +77514,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -77537,7 +77537,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -77562,7 +77562,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -77585,7 +77585,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77610,7 +77610,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77635,7 +77635,7 @@ void m68000_mcu_device::clr_l_adr32_dfm() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -77667,7 +77667,7 @@ void m68000_mcu_device::neg_b_ds_dfm() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -77706,7 +77706,7 @@ void m68000_mcu_device::neg_b_ais_dfm() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77729,7 +77729,7 @@ void m68000_mcu_device::neg_b_ais_dfm() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77786,7 +77786,7 @@ void m68000_mcu_device::neg_b_aips_dfm() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77807,7 +77807,7 @@ void m68000_mcu_device::neg_b_aips_dfm() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77866,7 +77866,7 @@ void m68000_mcu_device::neg_b_pais_dfm() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77887,7 +77887,7 @@ void m68000_mcu_device::neg_b_pais_dfm() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77960,7 +77960,7 @@ void m68000_mcu_device::neg_b_das_dfm() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77983,7 +77983,7 @@ void m68000_mcu_device::neg_b_das_dfm() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78032,7 +78032,7 @@ void m68000_mcu_device::neg_b_dais_dfm() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78094,7 +78094,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78117,7 +78117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78191,7 +78191,7 @@ void m68000_mcu_device::neg_b_adr16_dfm() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78212,7 +78212,7 @@ void m68000_mcu_device::neg_b_adr16_dfm() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78307,7 +78307,7 @@ void m68000_mcu_device::neg_b_adr32_dfm() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78328,7 +78328,7 @@ void m68000_mcu_device::neg_b_adr32_dfm() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78381,7 +78381,7 @@ void m68000_mcu_device::neg_w_ds_dfm() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -78420,7 +78420,7 @@ void m68000_mcu_device::neg_w_ais_dfm() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78446,7 +78446,7 @@ void m68000_mcu_device::neg_w_ais_dfm() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78508,7 +78508,7 @@ void m68000_mcu_device::neg_w_aips_dfm() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78532,7 +78532,7 @@ void m68000_mcu_device::neg_w_aips_dfm() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78596,7 +78596,7 @@ void m68000_mcu_device::neg_w_pais_dfm() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78620,7 +78620,7 @@ void m68000_mcu_device::neg_w_pais_dfm() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78698,7 +78698,7 @@ void m68000_mcu_device::neg_w_das_dfm() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78724,7 +78724,7 @@ void m68000_mcu_device::neg_w_das_dfm() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78778,7 +78778,7 @@ void m68000_mcu_device::neg_w_dais_dfm() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78840,7 +78840,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78866,7 +78866,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78945,7 +78945,7 @@ void m68000_mcu_device::neg_w_adr16_dfm() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -78969,7 +78969,7 @@ void m68000_mcu_device::neg_w_adr16_dfm() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79069,7 +79069,7 @@ void m68000_mcu_device::neg_w_adr32_dfm() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79093,7 +79093,7 @@ void m68000_mcu_device::neg_w_adr32_dfm() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79151,12 +79151,12 @@ void m68000_mcu_device::neg_l_ds_dfm() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79196,7 +79196,7 @@ void m68000_mcu_device::neg_l_ais_dfm() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79243,7 +79243,7 @@ void m68000_mcu_device::neg_l_ais_dfm() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79268,7 +79268,7 @@ void m68000_mcu_device::neg_l_ais_dfm() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79322,7 +79322,7 @@ void m68000_mcu_device::neg_l_aips_dfm() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79372,7 +79372,7 @@ void m68000_mcu_device::neg_l_aips_dfm() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79397,7 +79397,7 @@ void m68000_mcu_device::neg_l_aips_dfm() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79450,7 +79450,7 @@ void m68000_mcu_device::neg_l_pais_dfm() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79502,7 +79502,7 @@ void m68000_mcu_device::neg_l_pais_dfm() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79527,7 +79527,7 @@ void m68000_mcu_device::neg_l_pais_dfm() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79602,7 +79602,7 @@ void m68000_mcu_device::neg_l_das_dfm() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79649,7 +79649,7 @@ void m68000_mcu_device::neg_l_das_dfm() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79674,7 +79674,7 @@ void m68000_mcu_device::neg_l_das_dfm() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79726,7 +79726,7 @@ void m68000_mcu_device::neg_l_dais_dfm() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79787,7 +79787,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79834,7 +79834,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79859,7 +79859,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79936,7 +79936,7 @@ void m68000_mcu_device::neg_l_adr16_dfm() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -79983,7 +79983,7 @@ void m68000_mcu_device::neg_l_adr16_dfm() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80008,7 +80008,7 @@ void m68000_mcu_device::neg_l_adr16_dfm() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80106,7 +80106,7 @@ void m68000_mcu_device::neg_l_adr32_dfm() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80153,7 +80153,7 @@ void m68000_mcu_device::neg_l_adr32_dfm() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80178,7 +80178,7 @@ void m68000_mcu_device::neg_l_adr32_dfm() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80300,7 +80300,7 @@ void m68000_mcu_device::move_ais_ccr_dfm() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80398,7 +80398,7 @@ void m68000_mcu_device::move_aips_ccr_dfm() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80496,7 +80496,7 @@ void m68000_mcu_device::move_pais_ccr_dfm() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -80608,7 +80608,7 @@ void m68000_mcu_device::move_das_ccr_dfm() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80698,7 +80698,7 @@ void m68000_mcu_device::move_dais_ccr_dfm() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80760,7 +80760,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80875,7 +80875,7 @@ void m68000_mcu_device::move_adr16_ccr_dfm() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -81009,7 +81009,7 @@ void m68000_mcu_device::move_adr32_ccr_dfm() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -81120,7 +81120,7 @@ void m68000_mcu_device::move_dpc_ccr_dfm() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81209,7 +81209,7 @@ void m68000_mcu_device::move_dpc_ccr_dfm() // 44fa ffff
void m68000_mcu_device::move_dpci_ccr_dfm() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81271,7 +81271,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81456,7 +81456,7 @@ void m68000_mcu_device::not_b_ds_dfm() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -81495,7 +81495,7 @@ void m68000_mcu_device::not_b_ais_dfm() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81518,7 +81518,7 @@ void m68000_mcu_device::not_b_ais_dfm() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81575,7 +81575,7 @@ void m68000_mcu_device::not_b_aips_dfm() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81596,7 +81596,7 @@ void m68000_mcu_device::not_b_aips_dfm() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81655,7 +81655,7 @@ void m68000_mcu_device::not_b_pais_dfm() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81676,7 +81676,7 @@ void m68000_mcu_device::not_b_pais_dfm() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81749,7 +81749,7 @@ void m68000_mcu_device::not_b_das_dfm() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81772,7 +81772,7 @@ void m68000_mcu_device::not_b_das_dfm() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81821,7 +81821,7 @@ void m68000_mcu_device::not_b_dais_dfm() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81883,7 +81883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81906,7 +81906,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81980,7 +81980,7 @@ void m68000_mcu_device::not_b_adr16_dfm() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82001,7 +82001,7 @@ void m68000_mcu_device::not_b_adr16_dfm() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82096,7 +82096,7 @@ void m68000_mcu_device::not_b_adr32_dfm() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82117,7 +82117,7 @@ void m68000_mcu_device::not_b_adr32_dfm() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82170,7 +82170,7 @@ void m68000_mcu_device::not_w_ds_dfm() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -82209,7 +82209,7 @@ void m68000_mcu_device::not_w_ais_dfm() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82235,7 +82235,7 @@ void m68000_mcu_device::not_w_ais_dfm() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82297,7 +82297,7 @@ void m68000_mcu_device::not_w_aips_dfm() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82321,7 +82321,7 @@ void m68000_mcu_device::not_w_aips_dfm() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82385,7 +82385,7 @@ void m68000_mcu_device::not_w_pais_dfm() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82409,7 +82409,7 @@ void m68000_mcu_device::not_w_pais_dfm() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82487,7 +82487,7 @@ void m68000_mcu_device::not_w_das_dfm() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82513,7 +82513,7 @@ void m68000_mcu_device::not_w_das_dfm() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82567,7 +82567,7 @@ void m68000_mcu_device::not_w_dais_dfm() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82629,7 +82629,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82655,7 +82655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82734,7 +82734,7 @@ void m68000_mcu_device::not_w_adr16_dfm() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82758,7 +82758,7 @@ void m68000_mcu_device::not_w_adr16_dfm() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82858,7 +82858,7 @@ void m68000_mcu_device::not_w_adr32_dfm() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -82882,7 +82882,7 @@ void m68000_mcu_device::not_w_adr32_dfm() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82940,12 +82940,12 @@ void m68000_mcu_device::not_l_ds_dfm() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82985,7 +82985,7 @@ void m68000_mcu_device::not_l_ais_dfm() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83032,7 +83032,7 @@ void m68000_mcu_device::not_l_ais_dfm() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83057,7 +83057,7 @@ void m68000_mcu_device::not_l_ais_dfm() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83111,7 +83111,7 @@ void m68000_mcu_device::not_l_aips_dfm() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83161,7 +83161,7 @@ void m68000_mcu_device::not_l_aips_dfm() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83186,7 +83186,7 @@ void m68000_mcu_device::not_l_aips_dfm() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68000_mcu_device::not_l_pais_dfm() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -83291,7 +83291,7 @@ void m68000_mcu_device::not_l_pais_dfm() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83316,7 +83316,7 @@ void m68000_mcu_device::not_l_pais_dfm() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83391,7 +83391,7 @@ void m68000_mcu_device::not_l_das_dfm() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83438,7 +83438,7 @@ void m68000_mcu_device::not_l_das_dfm() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83463,7 +83463,7 @@ void m68000_mcu_device::not_l_das_dfm() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83515,7 +83515,7 @@ void m68000_mcu_device::not_l_dais_dfm() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -83576,7 +83576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83623,7 +83623,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83648,7 +83648,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83725,7 +83725,7 @@ void m68000_mcu_device::not_l_adr16_dfm() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83772,7 +83772,7 @@ void m68000_mcu_device::not_l_adr16_dfm() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83797,7 +83797,7 @@ void m68000_mcu_device::not_l_adr16_dfm() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83895,7 +83895,7 @@ void m68000_mcu_device::not_l_adr32_dfm() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -83942,7 +83942,7 @@ void m68000_mcu_device::not_l_adr32_dfm() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83967,7 +83967,7 @@ void m68000_mcu_device::not_l_adr32_dfm() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -84099,7 +84099,7 @@ void m68000_mcu_device::move_ais_sr_dfm() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84203,7 +84203,7 @@ void m68000_mcu_device::move_aips_sr_dfm() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84307,7 +84307,7 @@ void m68000_mcu_device::move_pais_sr_dfm() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84425,7 +84425,7 @@ void m68000_mcu_device::move_das_sr_dfm() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84521,7 +84521,7 @@ void m68000_mcu_device::move_dais_sr_dfm() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84583,7 +84583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84704,7 +84704,7 @@ void m68000_mcu_device::move_adr16_sr_dfm() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84844,7 +84844,7 @@ void m68000_mcu_device::move_adr32_sr_dfm() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -84961,7 +84961,7 @@ void m68000_mcu_device::move_dpc_sr_dfm() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85056,7 +85056,7 @@ void m68000_mcu_device::move_dpci_sr_dfm() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85118,7 +85118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85311,12 +85311,12 @@ void m68000_mcu_device::nbcd_b_ds_dfm() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85354,7 +85354,7 @@ void m68000_mcu_device::nbcd_b_ais_dfm() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85376,12 +85376,12 @@ void m68000_mcu_device::nbcd_b_ais_dfm() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85436,7 +85436,7 @@ void m68000_mcu_device::nbcd_b_aips_dfm() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85456,12 +85456,12 @@ void m68000_mcu_device::nbcd_b_aips_dfm() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85518,7 +85518,7 @@ void m68000_mcu_device::nbcd_b_pais_dfm() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85538,12 +85538,12 @@ void m68000_mcu_device::nbcd_b_pais_dfm() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85614,7 +85614,7 @@ void m68000_mcu_device::nbcd_b_das_dfm() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85636,12 +85636,12 @@ void m68000_mcu_device::nbcd_b_das_dfm() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85688,7 +85688,7 @@ void m68000_mcu_device::nbcd_b_dais_dfm() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85750,7 +85750,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85772,12 +85772,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85849,7 +85849,7 @@ void m68000_mcu_device::nbcd_b_adr16_dfm() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85869,12 +85869,12 @@ void m68000_mcu_device::nbcd_b_adr16_dfm() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -85967,7 +85967,7 @@ void m68000_mcu_device::nbcd_b_adr32_dfm() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85987,12 +85987,12 @@ void m68000_mcu_device::nbcd_b_adr32_dfm() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -86044,7 +86044,7 @@ void m68000_mcu_device::swap_ds_dfm() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -86052,7 +86052,7 @@ void m68000_mcu_device::swap_ds_dfm() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86089,7 +86089,7 @@ void m68000_mcu_device::pea_ais_dfm() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86166,7 +86166,7 @@ void m68000_mcu_device::pea_das_dfm() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86193,7 +86193,7 @@ void m68000_mcu_device::pea_das_dfm() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86268,7 +86268,7 @@ void m68000_mcu_device::pea_dais_dfm() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86329,7 +86329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86638,7 +86638,7 @@ void m68000_mcu_device::pea_dpc_dfm() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86665,7 +86665,7 @@ void m68000_mcu_device::pea_dpc_dfm() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86739,7 +86739,7 @@ void m68000_mcu_device::pea_dpc_dfm() // 487a ffff
void m68000_mcu_device::pea_dpci_dfm() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86800,7 +86800,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86884,7 +86884,7 @@ void m68000_mcu_device::ext_w_ds_dfm() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -87255,7 +87255,7 @@ void m68000_mcu_device::movem_w_list_dais_dfm() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -87643,7 +87643,7 @@ void m68000_mcu_device::ext_l_ds_dfm() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -88075,7 +88075,7 @@ void m68000_mcu_device::movem_l_list_dais_dfm() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -88524,13 +88524,13 @@ void m68000_mcu_device::tst_b_ds_dfm() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88562,11 +88562,11 @@ void m68000_mcu_device::tst_b_ais_dfm() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88586,13 +88586,13 @@ void m68000_mcu_device::tst_b_ais_dfm() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88627,12 +88627,12 @@ void m68000_mcu_device::tst_b_aips_dfm() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88653,13 +88653,13 @@ void m68000_mcu_device::tst_b_aips_dfm() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88693,7 +88693,7 @@ void m68000_mcu_device::tst_b_pais_dfm() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -88701,7 +88701,7 @@ void m68000_mcu_device::tst_b_pais_dfm() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88722,13 +88722,13 @@ void m68000_mcu_device::tst_b_pais_dfm() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88760,7 +88760,7 @@ void m68000_mcu_device::tst_b_das_dfm() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88783,11 +88783,11 @@ void m68000_mcu_device::tst_b_das_dfm() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88807,13 +88807,13 @@ void m68000_mcu_device::tst_b_das_dfm() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88843,14 +88843,14 @@ void m68000_mcu_device::tst_b_dais_dfm() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -88858,7 +88858,7 @@ void m68000_mcu_device::tst_b_dais_dfm() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88882,7 +88882,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88908,11 +88908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88932,13 +88932,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -88972,7 +88972,7 @@ void m68000_mcu_device::tst_b_adr16_dfm() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -88995,7 +88995,7 @@ void m68000_mcu_device::tst_b_adr16_dfm() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89016,13 +89016,13 @@ void m68000_mcu_device::tst_b_adr16_dfm() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89054,7 +89054,7 @@ void m68000_mcu_device::tst_b_adr32_dfm() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89078,7 +89078,7 @@ void m68000_mcu_device::tst_b_adr32_dfm() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89101,7 +89101,7 @@ void m68000_mcu_device::tst_b_adr32_dfm() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89122,13 +89122,13 @@ void m68000_mcu_device::tst_b_adr32_dfm() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89163,13 +89163,13 @@ void m68000_mcu_device::tst_w_ds_dfm() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89201,11 +89201,11 @@ void m68000_mcu_device::tst_w_ais_dfm() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89228,13 +89228,13 @@ void m68000_mcu_device::tst_w_ais_dfm() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89269,12 +89269,12 @@ void m68000_mcu_device::tst_w_aips_dfm() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89298,13 +89298,13 @@ void m68000_mcu_device::tst_w_aips_dfm() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89338,7 +89338,7 @@ void m68000_mcu_device::tst_w_pais_dfm() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -89346,7 +89346,7 @@ void m68000_mcu_device::tst_w_pais_dfm() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89370,13 +89370,13 @@ void m68000_mcu_device::tst_w_pais_dfm() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89408,7 +89408,7 @@ void m68000_mcu_device::tst_w_das_dfm() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89431,11 +89431,11 @@ void m68000_mcu_device::tst_w_das_dfm() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89458,13 +89458,13 @@ void m68000_mcu_device::tst_w_das_dfm() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89494,14 +89494,14 @@ void m68000_mcu_device::tst_w_dais_dfm() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -89509,7 +89509,7 @@ void m68000_mcu_device::tst_w_dais_dfm() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89533,7 +89533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89559,11 +89559,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89586,13 +89586,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89626,7 +89626,7 @@ void m68000_mcu_device::tst_w_adr16_dfm() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89649,7 +89649,7 @@ void m68000_mcu_device::tst_w_adr16_dfm() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89673,13 +89673,13 @@ void m68000_mcu_device::tst_w_adr16_dfm() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89711,7 +89711,7 @@ void m68000_mcu_device::tst_w_adr32_dfm() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89735,7 +89735,7 @@ void m68000_mcu_device::tst_w_adr32_dfm() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -89758,7 +89758,7 @@ void m68000_mcu_device::tst_w_adr32_dfm() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89782,13 +89782,13 @@ void m68000_mcu_device::tst_w_adr32_dfm() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89823,13 +89823,13 @@ void m68000_mcu_device::tst_l_ds_dfm() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89863,7 +89863,7 @@ void m68000_mcu_device::tst_l_ais_dfm() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89888,7 +89888,7 @@ void m68000_mcu_device::tst_l_ais_dfm() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -89911,13 +89911,13 @@ void m68000_mcu_device::tst_l_ais_dfm() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89951,7 +89951,7 @@ void m68000_mcu_device::tst_l_aips_dfm() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -89976,11 +89976,11 @@ void m68000_mcu_device::tst_l_aips_dfm() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90003,13 +90003,13 @@ void m68000_mcu_device::tst_l_aips_dfm() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90042,14 +90042,14 @@ void m68000_mcu_device::tst_l_pais_dfm() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90073,7 +90073,7 @@ void m68000_mcu_device::tst_l_pais_dfm() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90096,13 +90096,13 @@ void m68000_mcu_device::tst_l_pais_dfm() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90136,7 +90136,7 @@ void m68000_mcu_device::tst_l_das_dfm() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90158,7 +90158,7 @@ void m68000_mcu_device::tst_l_das_dfm() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90183,7 +90183,7 @@ void m68000_mcu_device::tst_l_das_dfm() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90206,13 +90206,13 @@ void m68000_mcu_device::tst_l_das_dfm() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90244,14 +90244,14 @@ void m68000_mcu_device::tst_l_dais_dfm() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -90259,7 +90259,7 @@ void m68000_mcu_device::tst_l_dais_dfm() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90283,7 +90283,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90308,7 +90308,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90333,7 +90333,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90356,13 +90356,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90398,7 +90398,7 @@ void m68000_mcu_device::tst_l_adr16_dfm() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -90421,7 +90421,7 @@ void m68000_mcu_device::tst_l_adr16_dfm() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90446,7 +90446,7 @@ void m68000_mcu_device::tst_l_adr16_dfm() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90469,13 +90469,13 @@ void m68000_mcu_device::tst_l_adr16_dfm() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90509,7 +90509,7 @@ void m68000_mcu_device::tst_l_adr32_dfm() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90533,7 +90533,7 @@ void m68000_mcu_device::tst_l_adr32_dfm() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -90556,7 +90556,7 @@ void m68000_mcu_device::tst_l_adr32_dfm() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -90581,7 +90581,7 @@ void m68000_mcu_device::tst_l_adr32_dfm() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90604,13 +90604,13 @@ void m68000_mcu_device::tst_l_adr32_dfm() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90646,14 +90646,14 @@ void m68000_mcu_device::tas_ds_dfm() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90687,11 +90687,11 @@ void m68000_mcu_device::tas_ais_dfm() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90706,14 +90706,14 @@ void m68000_mcu_device::tas_ais_dfm() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90735,11 +90735,11 @@ void m68000_mcu_device::tas_ais_dfm() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90774,12 +90774,12 @@ void m68000_mcu_device::tas_aips_dfm() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90795,14 +90795,14 @@ void m68000_mcu_device::tas_aips_dfm() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90824,11 +90824,11 @@ void m68000_mcu_device::tas_aips_dfm() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90862,7 +90862,7 @@ void m68000_mcu_device::tas_pais_dfm() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -90870,7 +90870,7 @@ void m68000_mcu_device::tas_pais_dfm() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90886,14 +90886,14 @@ void m68000_mcu_device::tas_pais_dfm() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90915,11 +90915,11 @@ void m68000_mcu_device::tas_pais_dfm() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90951,7 +90951,7 @@ void m68000_mcu_device::tas_das_dfm() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -90974,11 +90974,11 @@ void m68000_mcu_device::tas_das_dfm() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90993,14 +90993,14 @@ void m68000_mcu_device::tas_das_dfm() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91022,11 +91022,11 @@ void m68000_mcu_device::tas_das_dfm() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91056,14 +91056,14 @@ void m68000_mcu_device::tas_dais_dfm() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -91071,7 +91071,7 @@ void m68000_mcu_device::tas_dais_dfm() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91095,7 +91095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91121,11 +91121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -91140,14 +91140,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91169,11 +91169,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91207,7 +91207,7 @@ void m68000_mcu_device::tas_adr16_dfm() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -91230,7 +91230,7 @@ void m68000_mcu_device::tas_adr16_dfm() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91246,14 +91246,14 @@ void m68000_mcu_device::tas_adr16_dfm() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91275,11 +91275,11 @@ void m68000_mcu_device::tas_adr16_dfm() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91311,7 +91311,7 @@ void m68000_mcu_device::tas_adr32_dfm() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91335,7 +91335,7 @@ void m68000_mcu_device::tas_adr32_dfm() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -91358,7 +91358,7 @@ void m68000_mcu_device::tas_adr32_dfm() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91374,14 +91374,14 @@ void m68000_mcu_device::tas_adr32_dfm() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91403,11 +91403,11 @@ void m68000_mcu_device::tas_adr32_dfm() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -91833,7 +91833,7 @@ void m68000_mcu_device::movem_w_dais_list_dfm() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -91891,7 +91891,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -92444,7 +92444,7 @@ void m68000_mcu_device::movem_w_dpci_list_dfm() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -92502,7 +92502,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93055,7 +93055,7 @@ void m68000_mcu_device::movem_l_dais_list_dfm() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93113,7 +93113,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93750,7 +93750,7 @@ void m68000_mcu_device::movem_l_dpci_list_dfm() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93808,7 +93808,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93930,14 +93930,14 @@ void m68000_mcu_device::trap_imm4_dfm() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -93962,7 +93962,7 @@ void m68000_mcu_device::trap_imm4_dfm() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -93985,7 +93985,7 @@ void m68000_mcu_device::trap_imm4_dfm() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94107,7 +94107,7 @@ void m68000_mcu_device::link_as_imm16_dfm() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -94384,7 +94384,7 @@ void m68000_mcu_device::reset_dfm() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -94484,7 +94484,7 @@ void m68000_mcu_device::stop_i16u_dfm() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -94497,6 +94497,7 @@ void m68000_mcu_device::stop_i16u_dfm() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -94510,7 +94511,7 @@ void m68000_mcu_device::rte_dfm() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -94638,7 +94639,7 @@ void m68000_mcu_device::rts_dfm() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -94779,7 +94780,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -94802,7 +94803,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94827,7 +94828,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94850,7 +94851,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -94970,7 +94971,7 @@ void m68000_mcu_device::rtr_dfm() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -95298,7 +95299,7 @@ void m68000_mcu_device::jsr_dais_dfm() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95747,7 +95748,7 @@ void m68000_mcu_device::jsr_dpc_dfm() // 4eba ffff
void m68000_mcu_device::jsr_dpci_dfm() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95988,7 +95989,7 @@ void m68000_mcu_device::jmp_dais_dfm() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96260,7 +96261,7 @@ void m68000_mcu_device::jmp_dpc_dfm() // 4efa ffff
void m68000_mcu_device::jmp_dpci_dfm() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96344,7 +96345,7 @@ void m68000_mcu_device::addq_b_imm3_ds_dfm() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -96383,7 +96384,7 @@ void m68000_mcu_device::addq_b_imm3_ais_dfm() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96407,7 +96408,7 @@ void m68000_mcu_device::addq_b_imm3_ais_dfm() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96464,7 +96465,7 @@ void m68000_mcu_device::addq_b_imm3_aips_dfm() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96486,7 +96487,7 @@ void m68000_mcu_device::addq_b_imm3_aips_dfm() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96545,7 +96546,7 @@ void m68000_mcu_device::addq_b_imm3_pais_dfm() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96567,7 +96568,7 @@ void m68000_mcu_device::addq_b_imm3_pais_dfm() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96640,7 +96641,7 @@ void m68000_mcu_device::addq_b_imm3_das_dfm() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96664,7 +96665,7 @@ void m68000_mcu_device::addq_b_imm3_das_dfm() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96713,7 +96714,7 @@ void m68000_mcu_device::addq_b_imm3_dais_dfm() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96775,7 +96776,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96799,7 +96800,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96873,7 +96874,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_dfm() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96895,7 +96896,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_dfm() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96990,7 +96991,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_dfm() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -97012,7 +97013,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_dfm() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97065,7 +97066,7 @@ void m68000_mcu_device::addq_w_imm3_ds_dfm() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -97106,7 +97107,7 @@ void m68000_mcu_device::addq_w_imm3_as_dfm() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97129,7 +97130,7 @@ void m68000_mcu_device::addq_w_imm3_as_dfm() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97151,7 +97152,7 @@ void m68000_mcu_device::addq_w_imm3_ais_dfm() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97178,7 +97179,7 @@ void m68000_mcu_device::addq_w_imm3_ais_dfm() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97240,7 +97241,7 @@ void m68000_mcu_device::addq_w_imm3_aips_dfm() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97265,7 +97266,7 @@ void m68000_mcu_device::addq_w_imm3_aips_dfm() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97329,7 +97330,7 @@ void m68000_mcu_device::addq_w_imm3_pais_dfm() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97354,7 +97355,7 @@ void m68000_mcu_device::addq_w_imm3_pais_dfm() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97432,7 +97433,7 @@ void m68000_mcu_device::addq_w_imm3_das_dfm() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97459,7 +97460,7 @@ void m68000_mcu_device::addq_w_imm3_das_dfm() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97513,7 +97514,7 @@ void m68000_mcu_device::addq_w_imm3_dais_dfm() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97575,7 +97576,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97602,7 +97603,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97681,7 +97682,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_dfm() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97706,7 +97707,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_dfm() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97806,7 +97807,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_dfm() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -97831,7 +97832,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_dfm() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97889,7 +97890,7 @@ void m68000_mcu_device::addq_l_imm3_ds_dfm() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -97913,7 +97914,7 @@ void m68000_mcu_device::addq_l_imm3_ds_dfm() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -97938,7 +97939,7 @@ void m68000_mcu_device::addq_l_imm3_as_dfm() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97961,7 +97962,7 @@ void m68000_mcu_device::addq_l_imm3_as_dfm() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97983,7 +97984,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dfm() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98031,7 +98032,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dfm() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98056,7 +98057,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dfm() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98110,7 +98111,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dfm() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98161,7 +98162,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dfm() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98186,7 +98187,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dfm() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98239,7 +98240,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dfm() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -98292,7 +98293,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dfm() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98317,7 +98318,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dfm() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98392,7 +98393,7 @@ void m68000_mcu_device::addq_l_imm3_das_dfm() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98440,7 +98441,7 @@ void m68000_mcu_device::addq_l_imm3_das_dfm() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98465,7 +98466,7 @@ void m68000_mcu_device::addq_l_imm3_das_dfm() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98517,7 +98518,7 @@ void m68000_mcu_device::addq_l_imm3_dais_dfm() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -98578,7 +98579,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98626,7 +98627,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98651,7 +98652,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98728,7 +98729,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dfm() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98776,7 +98777,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dfm() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98801,7 +98802,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dfm() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98899,7 +98900,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dfm() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -98947,7 +98948,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dfm() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98972,7 +98973,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dfm() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -99028,7 +99029,7 @@ void m68000_mcu_device::st_ds_dfm() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -99040,7 +99041,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99067,7 +99068,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99092,7 +99093,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -99107,7 +99108,7 @@ void m68000_mcu_device::dbt_ds_rel16_dfm() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -99119,13 +99120,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99153,7 +99154,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -99161,7 +99162,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99185,11 +99186,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99219,13 +99220,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99255,7 +99256,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99286,11 +99287,11 @@ void m68000_mcu_device::st_ais_dfm() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99310,7 +99311,7 @@ void m68000_mcu_device::st_ais_dfm() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99320,7 +99321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99344,7 +99345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99372,7 +99373,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99400,12 +99401,12 @@ void m68000_mcu_device::st_aips_dfm() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99426,7 +99427,7 @@ void m68000_mcu_device::st_aips_dfm() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99436,7 +99437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99460,7 +99461,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99488,7 +99489,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99515,7 +99516,7 @@ void m68000_mcu_device::st_pais_dfm() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99523,7 +99524,7 @@ void m68000_mcu_device::st_pais_dfm() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99544,7 +99545,7 @@ void m68000_mcu_device::st_pais_dfm() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99554,7 +99555,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99578,7 +99579,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99606,7 +99607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99631,7 +99632,7 @@ void m68000_mcu_device::st_das_dfm() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99654,11 +99655,11 @@ void m68000_mcu_device::st_das_dfm() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99678,7 +99679,7 @@ void m68000_mcu_device::st_das_dfm() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99688,7 +99689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99712,7 +99713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99740,7 +99741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99763,14 +99764,14 @@ void m68000_mcu_device::st_dais_dfm() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99778,7 +99779,7 @@ void m68000_mcu_device::st_dais_dfm() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99802,7 +99803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99828,11 +99829,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99852,7 +99853,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99862,7 +99863,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -99886,7 +99887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99914,7 +99915,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99941,7 +99942,7 @@ void m68000_mcu_device::st_adr16_dfm() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -99964,7 +99965,7 @@ void m68000_mcu_device::st_adr16_dfm() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99985,7 +99986,7 @@ void m68000_mcu_device::st_adr16_dfm() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99995,7 +99996,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100019,7 +100020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100047,7 +100048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100072,7 +100073,7 @@ void m68000_mcu_device::st_adr32_dfm() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100096,7 +100097,7 @@ void m68000_mcu_device::st_adr32_dfm() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100119,7 +100120,7 @@ void m68000_mcu_device::st_adr32_dfm() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100140,7 +100141,7 @@ void m68000_mcu_device::st_adr32_dfm() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -100150,7 +100151,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -100174,7 +100175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100202,7 +100203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100229,7 +100230,7 @@ void m68000_mcu_device::subq_b_imm3_ds_dfm() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100268,7 +100269,7 @@ void m68000_mcu_device::subq_b_imm3_ais_dfm() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100292,7 +100293,7 @@ void m68000_mcu_device::subq_b_imm3_ais_dfm() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100349,7 +100350,7 @@ void m68000_mcu_device::subq_b_imm3_aips_dfm() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100371,7 +100372,7 @@ void m68000_mcu_device::subq_b_imm3_aips_dfm() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100430,7 +100431,7 @@ void m68000_mcu_device::subq_b_imm3_pais_dfm() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100452,7 +100453,7 @@ void m68000_mcu_device::subq_b_imm3_pais_dfm() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100525,7 +100526,7 @@ void m68000_mcu_device::subq_b_imm3_das_dfm() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100549,7 +100550,7 @@ void m68000_mcu_device::subq_b_imm3_das_dfm() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100598,7 +100599,7 @@ void m68000_mcu_device::subq_b_imm3_dais_dfm() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100660,7 +100661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100684,7 +100685,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100758,7 +100759,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_dfm() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100780,7 +100781,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_dfm() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100875,7 +100876,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_dfm() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100897,7 +100898,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_dfm() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100950,7 +100951,7 @@ void m68000_mcu_device::subq_w_imm3_ds_dfm() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100991,7 +100992,7 @@ void m68000_mcu_device::subq_w_imm3_as_dfm() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101014,7 +101015,7 @@ void m68000_mcu_device::subq_w_imm3_as_dfm() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101036,7 +101037,7 @@ void m68000_mcu_device::subq_w_imm3_ais_dfm() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101063,7 +101064,7 @@ void m68000_mcu_device::subq_w_imm3_ais_dfm() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101125,7 +101126,7 @@ void m68000_mcu_device::subq_w_imm3_aips_dfm() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101150,7 +101151,7 @@ void m68000_mcu_device::subq_w_imm3_aips_dfm() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101214,7 +101215,7 @@ void m68000_mcu_device::subq_w_imm3_pais_dfm() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101239,7 +101240,7 @@ void m68000_mcu_device::subq_w_imm3_pais_dfm() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101317,7 +101318,7 @@ void m68000_mcu_device::subq_w_imm3_das_dfm() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101344,7 +101345,7 @@ void m68000_mcu_device::subq_w_imm3_das_dfm() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101398,7 +101399,7 @@ void m68000_mcu_device::subq_w_imm3_dais_dfm() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -101460,7 +101461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101487,7 +101488,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101566,7 +101567,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_dfm() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101591,7 +101592,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_dfm() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101691,7 +101692,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_dfm() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101716,7 +101717,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_dfm() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101774,7 +101775,7 @@ void m68000_mcu_device::subq_l_imm3_ds_dfm() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -101798,7 +101799,7 @@ void m68000_mcu_device::subq_l_imm3_ds_dfm() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -101823,7 +101824,7 @@ void m68000_mcu_device::subq_l_imm3_as_dfm() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101846,7 +101847,7 @@ void m68000_mcu_device::subq_l_imm3_as_dfm() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101868,7 +101869,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dfm() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101916,7 +101917,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dfm() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101941,7 +101942,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dfm() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -101995,7 +101996,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dfm() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102046,7 +102047,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dfm() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102071,7 +102072,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dfm() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102124,7 +102125,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dfm() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -102177,7 +102178,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dfm() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102202,7 +102203,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dfm() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102277,7 +102278,7 @@ void m68000_mcu_device::subq_l_imm3_das_dfm() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102325,7 +102326,7 @@ void m68000_mcu_device::subq_l_imm3_das_dfm() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102350,7 +102351,7 @@ void m68000_mcu_device::subq_l_imm3_das_dfm() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102402,7 +102403,7 @@ void m68000_mcu_device::subq_l_imm3_dais_dfm() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -102463,7 +102464,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102511,7 +102512,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102536,7 +102537,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102613,7 +102614,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dfm() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102661,7 +102662,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dfm() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102686,7 +102687,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dfm() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102784,7 +102785,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dfm() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102832,7 +102833,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dfm() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102857,7 +102858,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dfm() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102913,7 +102914,7 @@ void m68000_mcu_device::sf_ds_dfm() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -102925,7 +102926,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -102952,7 +102953,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102977,7 +102978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -102992,7 +102993,7 @@ void m68000_mcu_device::dbra_ds_rel16_dfm() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -103004,13 +103005,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103038,7 +103039,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -103046,7 +103047,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103070,11 +103071,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103104,13 +103105,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103140,7 +103141,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103171,11 +103172,11 @@ void m68000_mcu_device::sf_ais_dfm() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103195,7 +103196,7 @@ void m68000_mcu_device::sf_ais_dfm() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103205,7 +103206,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103229,7 +103230,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103257,7 +103258,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103285,12 +103286,12 @@ void m68000_mcu_device::sf_aips_dfm() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103311,7 +103312,7 @@ void m68000_mcu_device::sf_aips_dfm() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103321,7 +103322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103345,7 +103346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103373,7 +103374,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103400,7 +103401,7 @@ void m68000_mcu_device::sf_pais_dfm() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103408,7 +103409,7 @@ void m68000_mcu_device::sf_pais_dfm() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103429,7 +103430,7 @@ void m68000_mcu_device::sf_pais_dfm() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103439,7 +103440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103463,7 +103464,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103491,7 +103492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103516,7 +103517,7 @@ void m68000_mcu_device::sf_das_dfm() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103539,11 +103540,11 @@ void m68000_mcu_device::sf_das_dfm() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103563,7 +103564,7 @@ void m68000_mcu_device::sf_das_dfm() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103573,7 +103574,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103597,7 +103598,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103625,7 +103626,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103648,14 +103649,14 @@ void m68000_mcu_device::sf_dais_dfm() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103663,7 +103664,7 @@ void m68000_mcu_device::sf_dais_dfm() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103687,7 +103688,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103713,11 +103714,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103737,7 +103738,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103747,7 +103748,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103771,7 +103772,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103799,7 +103800,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103826,7 +103827,7 @@ void m68000_mcu_device::sf_adr16_dfm() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103849,7 +103850,7 @@ void m68000_mcu_device::sf_adr16_dfm() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103870,7 +103871,7 @@ void m68000_mcu_device::sf_adr16_dfm() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103880,7 +103881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103904,7 +103905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103932,7 +103933,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103957,7 +103958,7 @@ void m68000_mcu_device::sf_adr32_dfm() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -103981,7 +103982,7 @@ void m68000_mcu_device::sf_adr32_dfm() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104004,7 +104005,7 @@ void m68000_mcu_device::sf_adr32_dfm() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104025,7 +104026,7 @@ void m68000_mcu_device::sf_adr32_dfm() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104035,7 +104036,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104059,7 +104060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104087,7 +104088,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104114,7 +104115,7 @@ void m68000_mcu_device::shi_ds_dfm() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -104126,7 +104127,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104153,7 +104154,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104178,7 +104179,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -104193,7 +104194,7 @@ void m68000_mcu_device::dbhi_ds_rel16_dfm() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -104205,13 +104206,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104239,7 +104240,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -104247,7 +104248,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104271,11 +104272,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104305,13 +104306,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104341,7 +104342,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104372,11 +104373,11 @@ void m68000_mcu_device::shi_ais_dfm() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104396,7 +104397,7 @@ void m68000_mcu_device::shi_ais_dfm() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104406,7 +104407,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104430,7 +104431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104458,7 +104459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104486,12 +104487,12 @@ void m68000_mcu_device::shi_aips_dfm() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104512,7 +104513,7 @@ void m68000_mcu_device::shi_aips_dfm() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104522,7 +104523,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104546,7 +104547,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104574,7 +104575,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104601,7 +104602,7 @@ void m68000_mcu_device::shi_pais_dfm() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -104609,7 +104610,7 @@ void m68000_mcu_device::shi_pais_dfm() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104630,7 +104631,7 @@ void m68000_mcu_device::shi_pais_dfm() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104640,7 +104641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104664,7 +104665,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104692,7 +104693,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104717,7 +104718,7 @@ void m68000_mcu_device::shi_das_dfm() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104740,11 +104741,11 @@ void m68000_mcu_device::shi_das_dfm() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104764,7 +104765,7 @@ void m68000_mcu_device::shi_das_dfm() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104774,7 +104775,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104798,7 +104799,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104826,7 +104827,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104849,14 +104850,14 @@ void m68000_mcu_device::shi_dais_dfm() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -104864,7 +104865,7 @@ void m68000_mcu_device::shi_dais_dfm() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104888,7 +104889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104914,11 +104915,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104938,7 +104939,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104948,7 +104949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -104972,7 +104973,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105000,7 +105001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105027,7 +105028,7 @@ void m68000_mcu_device::shi_adr16_dfm() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105050,7 +105051,7 @@ void m68000_mcu_device::shi_adr16_dfm() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105071,7 +105072,7 @@ void m68000_mcu_device::shi_adr16_dfm() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105081,7 +105082,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105105,7 +105106,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105133,7 +105134,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105158,7 +105159,7 @@ void m68000_mcu_device::shi_adr32_dfm() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105182,7 +105183,7 @@ void m68000_mcu_device::shi_adr32_dfm() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105205,7 +105206,7 @@ void m68000_mcu_device::shi_adr32_dfm() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105226,7 +105227,7 @@ void m68000_mcu_device::shi_adr32_dfm() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105236,7 +105237,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105260,7 +105261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105288,7 +105289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105315,7 +105316,7 @@ void m68000_mcu_device::sls_ds_dfm() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -105327,7 +105328,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105354,7 +105355,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105379,7 +105380,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -105394,7 +105395,7 @@ void m68000_mcu_device::dbls_ds_rel16_dfm() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -105406,13 +105407,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105440,7 +105441,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -105448,7 +105449,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105472,11 +105473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105506,13 +105507,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105542,7 +105543,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105573,11 +105574,11 @@ void m68000_mcu_device::sls_ais_dfm() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105597,7 +105598,7 @@ void m68000_mcu_device::sls_ais_dfm() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105607,7 +105608,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105631,7 +105632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105659,7 +105660,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105687,12 +105688,12 @@ void m68000_mcu_device::sls_aips_dfm() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105713,7 +105714,7 @@ void m68000_mcu_device::sls_aips_dfm() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105723,7 +105724,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105747,7 +105748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105775,7 +105776,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105802,7 +105803,7 @@ void m68000_mcu_device::sls_pais_dfm() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -105810,7 +105811,7 @@ void m68000_mcu_device::sls_pais_dfm() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105831,7 +105832,7 @@ void m68000_mcu_device::sls_pais_dfm() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105841,7 +105842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105865,7 +105866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -105893,7 +105894,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105918,7 +105919,7 @@ void m68000_mcu_device::sls_das_dfm() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105941,11 +105942,11 @@ void m68000_mcu_device::sls_das_dfm() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105965,7 +105966,7 @@ void m68000_mcu_device::sls_das_dfm() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105975,7 +105976,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -105999,7 +106000,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106027,7 +106028,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106050,14 +106051,14 @@ void m68000_mcu_device::sls_dais_dfm() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -106065,7 +106066,7 @@ void m68000_mcu_device::sls_dais_dfm() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106089,7 +106090,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106115,11 +106116,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106139,7 +106140,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106149,7 +106150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106173,7 +106174,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106201,7 +106202,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106228,7 +106229,7 @@ void m68000_mcu_device::sls_adr16_dfm() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106251,7 +106252,7 @@ void m68000_mcu_device::sls_adr16_dfm() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106272,7 +106273,7 @@ void m68000_mcu_device::sls_adr16_dfm() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106282,7 +106283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106306,7 +106307,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106334,7 +106335,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106359,7 +106360,7 @@ void m68000_mcu_device::sls_adr32_dfm() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106383,7 +106384,7 @@ void m68000_mcu_device::sls_adr32_dfm() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106406,7 +106407,7 @@ void m68000_mcu_device::sls_adr32_dfm() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106427,7 +106428,7 @@ void m68000_mcu_device::sls_adr32_dfm() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106437,7 +106438,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106461,7 +106462,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106489,7 +106490,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106516,7 +106517,7 @@ void m68000_mcu_device::scc_ds_dfm() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -106528,7 +106529,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106555,7 +106556,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106580,7 +106581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -106595,7 +106596,7 @@ void m68000_mcu_device::dbcc_ds_rel16_dfm() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -106607,13 +106608,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106641,7 +106642,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -106649,7 +106650,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106673,11 +106674,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106707,13 +106708,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106743,7 +106744,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106774,11 +106775,11 @@ void m68000_mcu_device::scc_ais_dfm() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106798,7 +106799,7 @@ void m68000_mcu_device::scc_ais_dfm() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106808,7 +106809,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106832,7 +106833,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106860,7 +106861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106888,12 +106889,12 @@ void m68000_mcu_device::scc_aips_dfm() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106914,7 +106915,7 @@ void m68000_mcu_device::scc_aips_dfm() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106924,7 +106925,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -106948,7 +106949,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -106976,7 +106977,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107003,7 +107004,7 @@ void m68000_mcu_device::scc_pais_dfm() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -107011,7 +107012,7 @@ void m68000_mcu_device::scc_pais_dfm() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107032,7 +107033,7 @@ void m68000_mcu_device::scc_pais_dfm() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107042,7 +107043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107066,7 +107067,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107094,7 +107095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107119,7 +107120,7 @@ void m68000_mcu_device::scc_das_dfm() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107142,11 +107143,11 @@ void m68000_mcu_device::scc_das_dfm() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107166,7 +107167,7 @@ void m68000_mcu_device::scc_das_dfm() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107176,7 +107177,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107200,7 +107201,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107228,7 +107229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107251,14 +107252,14 @@ void m68000_mcu_device::scc_dais_dfm() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -107266,7 +107267,7 @@ void m68000_mcu_device::scc_dais_dfm() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107290,7 +107291,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107316,11 +107317,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107340,7 +107341,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107350,7 +107351,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107374,7 +107375,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107402,7 +107403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107429,7 +107430,7 @@ void m68000_mcu_device::scc_adr16_dfm() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107452,7 +107453,7 @@ void m68000_mcu_device::scc_adr16_dfm() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107473,7 +107474,7 @@ void m68000_mcu_device::scc_adr16_dfm() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107483,7 +107484,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107507,7 +107508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107535,7 +107536,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107560,7 +107561,7 @@ void m68000_mcu_device::scc_adr32_dfm() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107584,7 +107585,7 @@ void m68000_mcu_device::scc_adr32_dfm() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107607,7 +107608,7 @@ void m68000_mcu_device::scc_adr32_dfm() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107628,7 +107629,7 @@ void m68000_mcu_device::scc_adr32_dfm() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107638,7 +107639,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107662,7 +107663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107690,7 +107691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107717,7 +107718,7 @@ void m68000_mcu_device::scs_ds_dfm() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -107729,7 +107730,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107756,7 +107757,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107781,7 +107782,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -107796,7 +107797,7 @@ void m68000_mcu_device::dbcs_ds_rel16_dfm() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -107808,13 +107809,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -107842,7 +107843,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -107850,7 +107851,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107874,11 +107875,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107908,13 +107909,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107944,7 +107945,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -107975,11 +107976,11 @@ void m68000_mcu_device::scs_ais_dfm() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107999,7 +108000,7 @@ void m68000_mcu_device::scs_ais_dfm() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108009,7 +108010,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108033,7 +108034,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108061,7 +108062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108089,12 +108090,12 @@ void m68000_mcu_device::scs_aips_dfm() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108115,7 +108116,7 @@ void m68000_mcu_device::scs_aips_dfm() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108125,7 +108126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108149,7 +108150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108177,7 +108178,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108204,7 +108205,7 @@ void m68000_mcu_device::scs_pais_dfm() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -108212,7 +108213,7 @@ void m68000_mcu_device::scs_pais_dfm() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108233,7 +108234,7 @@ void m68000_mcu_device::scs_pais_dfm() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108243,7 +108244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108267,7 +108268,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108295,7 +108296,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108320,7 +108321,7 @@ void m68000_mcu_device::scs_das_dfm() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108343,11 +108344,11 @@ void m68000_mcu_device::scs_das_dfm() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108367,7 +108368,7 @@ void m68000_mcu_device::scs_das_dfm() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108377,7 +108378,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108401,7 +108402,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108429,7 +108430,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108452,14 +108453,14 @@ void m68000_mcu_device::scs_dais_dfm() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -108467,7 +108468,7 @@ void m68000_mcu_device::scs_dais_dfm() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108491,7 +108492,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108517,11 +108518,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108541,7 +108542,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108551,7 +108552,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108575,7 +108576,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108603,7 +108604,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108630,7 +108631,7 @@ void m68000_mcu_device::scs_adr16_dfm() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108653,7 +108654,7 @@ void m68000_mcu_device::scs_adr16_dfm() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108674,7 +108675,7 @@ void m68000_mcu_device::scs_adr16_dfm() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108684,7 +108685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108708,7 +108709,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108736,7 +108737,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108761,7 +108762,7 @@ void m68000_mcu_device::scs_adr32_dfm() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108785,7 +108786,7 @@ void m68000_mcu_device::scs_adr32_dfm() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108808,7 +108809,7 @@ void m68000_mcu_device::scs_adr32_dfm() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108829,7 +108830,7 @@ void m68000_mcu_device::scs_adr32_dfm() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108839,7 +108840,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108863,7 +108864,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108891,7 +108892,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108918,7 +108919,7 @@ void m68000_mcu_device::sne_ds_dfm() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -108930,7 +108931,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -108957,7 +108958,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -108982,7 +108983,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -108997,7 +108998,7 @@ void m68000_mcu_device::dbne_ds_rel16_dfm() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -109009,13 +109010,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109043,7 +109044,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -109051,7 +109052,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109075,11 +109076,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109109,13 +109110,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109145,7 +109146,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109176,11 +109177,11 @@ void m68000_mcu_device::sne_ais_dfm() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109200,7 +109201,7 @@ void m68000_mcu_device::sne_ais_dfm() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109210,7 +109211,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109234,7 +109235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109262,7 +109263,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109290,12 +109291,12 @@ void m68000_mcu_device::sne_aips_dfm() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109316,7 +109317,7 @@ void m68000_mcu_device::sne_aips_dfm() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109326,7 +109327,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109350,7 +109351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109378,7 +109379,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109405,7 +109406,7 @@ void m68000_mcu_device::sne_pais_dfm() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -109413,7 +109414,7 @@ void m68000_mcu_device::sne_pais_dfm() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109434,7 +109435,7 @@ void m68000_mcu_device::sne_pais_dfm() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109444,7 +109445,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109468,7 +109469,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109496,7 +109497,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109521,7 +109522,7 @@ void m68000_mcu_device::sne_das_dfm() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109544,11 +109545,11 @@ void m68000_mcu_device::sne_das_dfm() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109568,7 +109569,7 @@ void m68000_mcu_device::sne_das_dfm() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109578,7 +109579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109602,7 +109603,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109630,7 +109631,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109653,14 +109654,14 @@ void m68000_mcu_device::sne_dais_dfm() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -109668,7 +109669,7 @@ void m68000_mcu_device::sne_dais_dfm() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109692,7 +109693,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109718,11 +109719,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109742,7 +109743,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109752,7 +109753,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109776,7 +109777,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109804,7 +109805,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109831,7 +109832,7 @@ void m68000_mcu_device::sne_adr16_dfm() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109854,7 +109855,7 @@ void m68000_mcu_device::sne_adr16_dfm() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109875,7 +109876,7 @@ void m68000_mcu_device::sne_adr16_dfm() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109885,7 +109886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109909,7 +109910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -109937,7 +109938,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109962,7 +109963,7 @@ void m68000_mcu_device::sne_adr32_dfm() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -109986,7 +109987,7 @@ void m68000_mcu_device::sne_adr32_dfm() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110009,7 +110010,7 @@ void m68000_mcu_device::sne_adr32_dfm() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110030,7 +110031,7 @@ void m68000_mcu_device::sne_adr32_dfm() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110040,7 +110041,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110064,7 +110065,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110092,7 +110093,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110119,7 +110120,7 @@ void m68000_mcu_device::seq_ds_dfm() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -110131,7 +110132,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110158,7 +110159,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110183,7 +110184,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -110198,7 +110199,7 @@ void m68000_mcu_device::dbeq_ds_rel16_dfm() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -110210,13 +110211,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110244,7 +110245,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -110252,7 +110253,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110276,11 +110277,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110310,13 +110311,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110346,7 +110347,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110377,11 +110378,11 @@ void m68000_mcu_device::seq_ais_dfm() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110401,7 +110402,7 @@ void m68000_mcu_device::seq_ais_dfm() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110411,7 +110412,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110435,7 +110436,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110463,7 +110464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110491,12 +110492,12 @@ void m68000_mcu_device::seq_aips_dfm() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110517,7 +110518,7 @@ void m68000_mcu_device::seq_aips_dfm() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110527,7 +110528,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110551,7 +110552,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110579,7 +110580,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110606,7 +110607,7 @@ void m68000_mcu_device::seq_pais_dfm() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -110614,7 +110615,7 @@ void m68000_mcu_device::seq_pais_dfm() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110635,7 +110636,7 @@ void m68000_mcu_device::seq_pais_dfm() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110645,7 +110646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110669,7 +110670,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110697,7 +110698,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110722,7 +110723,7 @@ void m68000_mcu_device::seq_das_dfm() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110745,11 +110746,11 @@ void m68000_mcu_device::seq_das_dfm() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110769,7 +110770,7 @@ void m68000_mcu_device::seq_das_dfm() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110779,7 +110780,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110803,7 +110804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -110831,7 +110832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110854,14 +110855,14 @@ void m68000_mcu_device::seq_dais_dfm() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -110869,7 +110870,7 @@ void m68000_mcu_device::seq_dais_dfm() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110893,7 +110894,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110919,11 +110920,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110943,7 +110944,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110953,7 +110954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -110977,7 +110978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111005,7 +111006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111032,7 +111033,7 @@ void m68000_mcu_device::seq_adr16_dfm() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111055,7 +111056,7 @@ void m68000_mcu_device::seq_adr16_dfm() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111076,7 +111077,7 @@ void m68000_mcu_device::seq_adr16_dfm() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111086,7 +111087,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111110,7 +111111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111138,7 +111139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111163,7 +111164,7 @@ void m68000_mcu_device::seq_adr32_dfm() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111187,7 +111188,7 @@ void m68000_mcu_device::seq_adr32_dfm() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111210,7 +111211,7 @@ void m68000_mcu_device::seq_adr32_dfm() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111231,7 +111232,7 @@ void m68000_mcu_device::seq_adr32_dfm() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111241,7 +111242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111265,7 +111266,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111293,7 +111294,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111320,7 +111321,7 @@ void m68000_mcu_device::svc_ds_dfm() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -111332,7 +111333,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111359,7 +111360,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111384,7 +111385,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -111399,7 +111400,7 @@ void m68000_mcu_device::dbvc_ds_rel16_dfm() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -111411,13 +111412,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111445,7 +111446,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -111453,7 +111454,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111477,11 +111478,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111511,13 +111512,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111547,7 +111548,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111578,11 +111579,11 @@ void m68000_mcu_device::svc_ais_dfm() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111602,7 +111603,7 @@ void m68000_mcu_device::svc_ais_dfm() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111612,7 +111613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111636,7 +111637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111664,7 +111665,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111692,12 +111693,12 @@ void m68000_mcu_device::svc_aips_dfm() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111718,7 +111719,7 @@ void m68000_mcu_device::svc_aips_dfm() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111728,7 +111729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111752,7 +111753,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111780,7 +111781,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111807,7 +111808,7 @@ void m68000_mcu_device::svc_pais_dfm() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -111815,7 +111816,7 @@ void m68000_mcu_device::svc_pais_dfm() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111836,7 +111837,7 @@ void m68000_mcu_device::svc_pais_dfm() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111846,7 +111847,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111870,7 +111871,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -111898,7 +111899,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111923,7 +111924,7 @@ void m68000_mcu_device::svc_das_dfm() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -111946,11 +111947,11 @@ void m68000_mcu_device::svc_das_dfm() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111970,7 +111971,7 @@ void m68000_mcu_device::svc_das_dfm() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111980,7 +111981,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112004,7 +112005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112032,7 +112033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112055,14 +112056,14 @@ void m68000_mcu_device::svc_dais_dfm() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -112070,7 +112071,7 @@ void m68000_mcu_device::svc_dais_dfm() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112094,7 +112095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112120,11 +112121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112144,7 +112145,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112154,7 +112155,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112178,7 +112179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112206,7 +112207,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112233,7 +112234,7 @@ void m68000_mcu_device::svc_adr16_dfm() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112256,7 +112257,7 @@ void m68000_mcu_device::svc_adr16_dfm() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112277,7 +112278,7 @@ void m68000_mcu_device::svc_adr16_dfm() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112287,7 +112288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112311,7 +112312,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112339,7 +112340,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112364,7 +112365,7 @@ void m68000_mcu_device::svc_adr32_dfm() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112388,7 +112389,7 @@ void m68000_mcu_device::svc_adr32_dfm() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112411,7 +112412,7 @@ void m68000_mcu_device::svc_adr32_dfm() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112432,7 +112433,7 @@ void m68000_mcu_device::svc_adr32_dfm() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112442,7 +112443,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112466,7 +112467,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112494,7 +112495,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112521,7 +112522,7 @@ void m68000_mcu_device::svs_ds_dfm() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112533,7 +112534,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112560,7 +112561,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112585,7 +112586,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112600,7 +112601,7 @@ void m68000_mcu_device::dbvs_ds_rel16_dfm() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112612,13 +112613,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112646,7 +112647,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112654,7 +112655,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112678,11 +112679,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112712,13 +112713,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112748,7 +112749,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112779,11 +112780,11 @@ void m68000_mcu_device::svs_ais_dfm() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112803,7 +112804,7 @@ void m68000_mcu_device::svs_ais_dfm() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112813,7 +112814,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112837,7 +112838,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112865,7 +112866,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112893,12 +112894,12 @@ void m68000_mcu_device::svs_aips_dfm() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112919,7 +112920,7 @@ void m68000_mcu_device::svs_aips_dfm() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112929,7 +112930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -112953,7 +112954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112981,7 +112982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113008,7 +113009,7 @@ void m68000_mcu_device::svs_pais_dfm() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113016,7 +113017,7 @@ void m68000_mcu_device::svs_pais_dfm() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113037,7 +113038,7 @@ void m68000_mcu_device::svs_pais_dfm() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113047,7 +113048,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113071,7 +113072,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113099,7 +113100,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113124,7 +113125,7 @@ void m68000_mcu_device::svs_das_dfm() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113147,11 +113148,11 @@ void m68000_mcu_device::svs_das_dfm() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113171,7 +113172,7 @@ void m68000_mcu_device::svs_das_dfm() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113181,7 +113182,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113205,7 +113206,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113233,7 +113234,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113256,14 +113257,14 @@ void m68000_mcu_device::svs_dais_dfm() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113271,7 +113272,7 @@ void m68000_mcu_device::svs_dais_dfm() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113295,7 +113296,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113321,11 +113322,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113345,7 +113346,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113355,7 +113356,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113379,7 +113380,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113407,7 +113408,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113434,7 +113435,7 @@ void m68000_mcu_device::svs_adr16_dfm() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113457,7 +113458,7 @@ void m68000_mcu_device::svs_adr16_dfm() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113478,7 +113479,7 @@ void m68000_mcu_device::svs_adr16_dfm() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113488,7 +113489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113512,7 +113513,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113540,7 +113541,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113565,7 +113566,7 @@ void m68000_mcu_device::svs_adr32_dfm() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113589,7 +113590,7 @@ void m68000_mcu_device::svs_adr32_dfm() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113612,7 +113613,7 @@ void m68000_mcu_device::svs_adr32_dfm() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113633,7 +113634,7 @@ void m68000_mcu_device::svs_adr32_dfm() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113643,7 +113644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113667,7 +113668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113695,7 +113696,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113722,7 +113723,7 @@ void m68000_mcu_device::spl_ds_dfm() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -113734,7 +113735,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113761,7 +113762,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113786,7 +113787,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -113801,7 +113802,7 @@ void m68000_mcu_device::dbpl_ds_rel16_dfm() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -113813,13 +113814,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113847,7 +113848,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -113855,7 +113856,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113879,11 +113880,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113913,13 +113914,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113949,7 +113950,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -113980,11 +113981,11 @@ void m68000_mcu_device::spl_ais_dfm() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114004,7 +114005,7 @@ void m68000_mcu_device::spl_ais_dfm() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114014,7 +114015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114038,7 +114039,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114066,7 +114067,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114094,12 +114095,12 @@ void m68000_mcu_device::spl_aips_dfm() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114120,7 +114121,7 @@ void m68000_mcu_device::spl_aips_dfm() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114130,7 +114131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114154,7 +114155,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114182,7 +114183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114209,7 +114210,7 @@ void m68000_mcu_device::spl_pais_dfm() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114217,7 +114218,7 @@ void m68000_mcu_device::spl_pais_dfm() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114238,7 +114239,7 @@ void m68000_mcu_device::spl_pais_dfm() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114248,7 +114249,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114272,7 +114273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114300,7 +114301,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114325,7 +114326,7 @@ void m68000_mcu_device::spl_das_dfm() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114348,11 +114349,11 @@ void m68000_mcu_device::spl_das_dfm() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114372,7 +114373,7 @@ void m68000_mcu_device::spl_das_dfm() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114382,7 +114383,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114406,7 +114407,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114434,7 +114435,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114457,14 +114458,14 @@ void m68000_mcu_device::spl_dais_dfm() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114472,7 +114473,7 @@ void m68000_mcu_device::spl_dais_dfm() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114496,7 +114497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114522,11 +114523,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114546,7 +114547,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114556,7 +114557,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114580,7 +114581,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114608,7 +114609,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114635,7 +114636,7 @@ void m68000_mcu_device::spl_adr16_dfm() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114658,7 +114659,7 @@ void m68000_mcu_device::spl_adr16_dfm() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114679,7 +114680,7 @@ void m68000_mcu_device::spl_adr16_dfm() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114689,7 +114690,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114713,7 +114714,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114741,7 +114742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114766,7 +114767,7 @@ void m68000_mcu_device::spl_adr32_dfm() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114790,7 +114791,7 @@ void m68000_mcu_device::spl_adr32_dfm() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114813,7 +114814,7 @@ void m68000_mcu_device::spl_adr32_dfm() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114834,7 +114835,7 @@ void m68000_mcu_device::spl_adr32_dfm() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114844,7 +114845,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114868,7 +114869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114896,7 +114897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114923,7 +114924,7 @@ void m68000_mcu_device::smi_ds_dfm() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -114935,7 +114936,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -114962,7 +114963,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114987,7 +114988,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -115002,7 +115003,7 @@ void m68000_mcu_device::dbmi_ds_rel16_dfm() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -115014,13 +115015,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115048,7 +115049,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -115056,7 +115057,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115080,11 +115081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115114,13 +115115,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115150,7 +115151,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115181,11 +115182,11 @@ void m68000_mcu_device::smi_ais_dfm() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115205,7 +115206,7 @@ void m68000_mcu_device::smi_ais_dfm() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115215,7 +115216,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115239,7 +115240,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115267,7 +115268,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115295,12 +115296,12 @@ void m68000_mcu_device::smi_aips_dfm() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115321,7 +115322,7 @@ void m68000_mcu_device::smi_aips_dfm() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115331,7 +115332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115355,7 +115356,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115383,7 +115384,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115410,7 +115411,7 @@ void m68000_mcu_device::smi_pais_dfm() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115418,7 +115419,7 @@ void m68000_mcu_device::smi_pais_dfm() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115439,7 +115440,7 @@ void m68000_mcu_device::smi_pais_dfm() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115449,7 +115450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115473,7 +115474,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115501,7 +115502,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115526,7 +115527,7 @@ void m68000_mcu_device::smi_das_dfm() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115549,11 +115550,11 @@ void m68000_mcu_device::smi_das_dfm() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115573,7 +115574,7 @@ void m68000_mcu_device::smi_das_dfm() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115583,7 +115584,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115607,7 +115608,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115635,7 +115636,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115658,14 +115659,14 @@ void m68000_mcu_device::smi_dais_dfm() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115673,7 +115674,7 @@ void m68000_mcu_device::smi_dais_dfm() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115697,7 +115698,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115723,11 +115724,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115747,7 +115748,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115757,7 +115758,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115781,7 +115782,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115809,7 +115810,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115836,7 +115837,7 @@ void m68000_mcu_device::smi_adr16_dfm() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115859,7 +115860,7 @@ void m68000_mcu_device::smi_adr16_dfm() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115880,7 +115881,7 @@ void m68000_mcu_device::smi_adr16_dfm() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115890,7 +115891,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115914,7 +115915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -115942,7 +115943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115967,7 +115968,7 @@ void m68000_mcu_device::smi_adr32_dfm() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -115991,7 +115992,7 @@ void m68000_mcu_device::smi_adr32_dfm() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116014,7 +116015,7 @@ void m68000_mcu_device::smi_adr32_dfm() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116035,7 +116036,7 @@ void m68000_mcu_device::smi_adr32_dfm() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116045,7 +116046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116069,7 +116070,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116097,7 +116098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116124,7 +116125,7 @@ void m68000_mcu_device::sge_ds_dfm() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -116136,7 +116137,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116163,7 +116164,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116188,7 +116189,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116203,7 +116204,7 @@ void m68000_mcu_device::dbge_ds_rel16_dfm() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -116215,13 +116216,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116249,7 +116250,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -116257,7 +116258,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116281,11 +116282,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116315,13 +116316,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116351,7 +116352,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116382,11 +116383,11 @@ void m68000_mcu_device::sge_ais_dfm() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116406,7 +116407,7 @@ void m68000_mcu_device::sge_ais_dfm() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116416,7 +116417,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116440,7 +116441,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116468,7 +116469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116496,12 +116497,12 @@ void m68000_mcu_device::sge_aips_dfm() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116522,7 +116523,7 @@ void m68000_mcu_device::sge_aips_dfm() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116532,7 +116533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116556,7 +116557,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116584,7 +116585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116611,7 +116612,7 @@ void m68000_mcu_device::sge_pais_dfm() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116619,7 +116620,7 @@ void m68000_mcu_device::sge_pais_dfm() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116640,7 +116641,7 @@ void m68000_mcu_device::sge_pais_dfm() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116650,7 +116651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116674,7 +116675,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116702,7 +116703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116727,7 +116728,7 @@ void m68000_mcu_device::sge_das_dfm() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116750,11 +116751,11 @@ void m68000_mcu_device::sge_das_dfm() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116774,7 +116775,7 @@ void m68000_mcu_device::sge_das_dfm() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116784,7 +116785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116808,7 +116809,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -116836,7 +116837,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116859,14 +116860,14 @@ void m68000_mcu_device::sge_dais_dfm() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -116874,7 +116875,7 @@ void m68000_mcu_device::sge_dais_dfm() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116898,7 +116899,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116924,11 +116925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116948,7 +116949,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116958,7 +116959,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -116982,7 +116983,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117010,7 +117011,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117037,7 +117038,7 @@ void m68000_mcu_device::sge_adr16_dfm() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117060,7 +117061,7 @@ void m68000_mcu_device::sge_adr16_dfm() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117081,7 +117082,7 @@ void m68000_mcu_device::sge_adr16_dfm() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117091,7 +117092,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117115,7 +117116,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117143,7 +117144,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117168,7 +117169,7 @@ void m68000_mcu_device::sge_adr32_dfm() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117192,7 +117193,7 @@ void m68000_mcu_device::sge_adr32_dfm() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117215,7 +117216,7 @@ void m68000_mcu_device::sge_adr32_dfm() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117236,7 +117237,7 @@ void m68000_mcu_device::sge_adr32_dfm() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117246,7 +117247,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117270,7 +117271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117298,7 +117299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117325,7 +117326,7 @@ void m68000_mcu_device::slt_ds_dfm() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117337,7 +117338,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117364,7 +117365,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117389,7 +117390,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117404,7 +117405,7 @@ void m68000_mcu_device::dblt_ds_rel16_dfm() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117416,13 +117417,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117450,7 +117451,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117458,7 +117459,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117482,11 +117483,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117516,13 +117517,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117552,7 +117553,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117583,11 +117584,11 @@ void m68000_mcu_device::slt_ais_dfm() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117607,7 +117608,7 @@ void m68000_mcu_device::slt_ais_dfm() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117617,7 +117618,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117641,7 +117642,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117669,7 +117670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117697,12 +117698,12 @@ void m68000_mcu_device::slt_aips_dfm() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117723,7 +117724,7 @@ void m68000_mcu_device::slt_aips_dfm() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117733,7 +117734,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117757,7 +117758,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117785,7 +117786,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117812,7 +117813,7 @@ void m68000_mcu_device::slt_pais_dfm() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117820,7 +117821,7 @@ void m68000_mcu_device::slt_pais_dfm() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117841,7 +117842,7 @@ void m68000_mcu_device::slt_pais_dfm() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117851,7 +117852,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117875,7 +117876,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117903,7 +117904,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117928,7 +117929,7 @@ void m68000_mcu_device::slt_das_dfm() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -117951,11 +117952,11 @@ void m68000_mcu_device::slt_das_dfm() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117975,7 +117976,7 @@ void m68000_mcu_device::slt_das_dfm() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117985,7 +117986,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118009,7 +118010,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118037,7 +118038,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118060,14 +118061,14 @@ void m68000_mcu_device::slt_dais_dfm() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118075,7 +118076,7 @@ void m68000_mcu_device::slt_dais_dfm() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118099,7 +118100,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118125,11 +118126,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118149,7 +118150,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118159,7 +118160,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118183,7 +118184,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118211,7 +118212,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118238,7 +118239,7 @@ void m68000_mcu_device::slt_adr16_dfm() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118261,7 +118262,7 @@ void m68000_mcu_device::slt_adr16_dfm() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118282,7 +118283,7 @@ void m68000_mcu_device::slt_adr16_dfm() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118316,7 +118317,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118344,7 +118345,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118369,7 +118370,7 @@ void m68000_mcu_device::slt_adr32_dfm() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118393,7 +118394,7 @@ void m68000_mcu_device::slt_adr32_dfm() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118416,7 +118417,7 @@ void m68000_mcu_device::slt_adr32_dfm() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118437,7 +118438,7 @@ void m68000_mcu_device::slt_adr32_dfm() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118447,7 +118448,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118471,7 +118472,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118499,7 +118500,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118526,7 +118527,7 @@ void m68000_mcu_device::sgt_ds_dfm() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118538,7 +118539,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118565,7 +118566,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118590,7 +118591,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118605,7 +118606,7 @@ void m68000_mcu_device::dbgt_ds_rel16_dfm() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118617,13 +118618,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118651,7 +118652,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118659,7 +118660,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118683,11 +118684,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118717,13 +118718,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118753,7 +118754,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118784,11 +118785,11 @@ void m68000_mcu_device::sgt_ais_dfm() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118808,7 +118809,7 @@ void m68000_mcu_device::sgt_ais_dfm() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118818,7 +118819,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118842,7 +118843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118870,7 +118871,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118898,12 +118899,12 @@ void m68000_mcu_device::sgt_aips_dfm() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118924,7 +118925,7 @@ void m68000_mcu_device::sgt_aips_dfm() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118934,7 +118935,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -118958,7 +118959,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118986,7 +118987,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119013,7 +119014,7 @@ void m68000_mcu_device::sgt_pais_dfm() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119021,7 +119022,7 @@ void m68000_mcu_device::sgt_pais_dfm() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119042,7 +119043,7 @@ void m68000_mcu_device::sgt_pais_dfm() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119052,7 +119053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119076,7 +119077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119104,7 +119105,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119129,7 +119130,7 @@ void m68000_mcu_device::sgt_das_dfm() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119152,11 +119153,11 @@ void m68000_mcu_device::sgt_das_dfm() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119176,7 +119177,7 @@ void m68000_mcu_device::sgt_das_dfm() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119186,7 +119187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119210,7 +119211,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119238,7 +119239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119261,14 +119262,14 @@ void m68000_mcu_device::sgt_dais_dfm() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119276,7 +119277,7 @@ void m68000_mcu_device::sgt_dais_dfm() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119300,7 +119301,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119326,11 +119327,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119350,7 +119351,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119360,7 +119361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119384,7 +119385,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119412,7 +119413,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119439,7 +119440,7 @@ void m68000_mcu_device::sgt_adr16_dfm() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119462,7 +119463,7 @@ void m68000_mcu_device::sgt_adr16_dfm() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119483,7 +119484,7 @@ void m68000_mcu_device::sgt_adr16_dfm() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119493,7 +119494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119545,7 +119546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119570,7 +119571,7 @@ void m68000_mcu_device::sgt_adr32_dfm() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119594,7 +119595,7 @@ void m68000_mcu_device::sgt_adr32_dfm() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119617,7 +119618,7 @@ void m68000_mcu_device::sgt_adr32_dfm() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119638,7 +119639,7 @@ void m68000_mcu_device::sgt_adr32_dfm() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119648,7 +119649,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119672,7 +119673,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119700,7 +119701,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119727,7 +119728,7 @@ void m68000_mcu_device::sle_ds_dfm() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119739,7 +119740,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119766,7 +119767,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119791,7 +119792,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119806,7 +119807,7 @@ void m68000_mcu_device::dble_ds_rel16_dfm() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -119818,13 +119819,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119852,7 +119853,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -119860,7 +119861,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119884,11 +119885,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119918,13 +119919,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119954,7 +119955,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -119985,11 +119986,11 @@ void m68000_mcu_device::sle_ais_dfm() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120009,7 +120010,7 @@ void m68000_mcu_device::sle_ais_dfm() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120019,7 +120020,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120043,7 +120044,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120071,7 +120072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120099,12 +120100,12 @@ void m68000_mcu_device::sle_aips_dfm() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120125,7 +120126,7 @@ void m68000_mcu_device::sle_aips_dfm() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120135,7 +120136,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120159,7 +120160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120187,7 +120188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120214,7 +120215,7 @@ void m68000_mcu_device::sle_pais_dfm() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120222,7 +120223,7 @@ void m68000_mcu_device::sle_pais_dfm() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120243,7 +120244,7 @@ void m68000_mcu_device::sle_pais_dfm() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120253,7 +120254,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120277,7 +120278,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120305,7 +120306,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120330,7 +120331,7 @@ void m68000_mcu_device::sle_das_dfm() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120353,11 +120354,11 @@ void m68000_mcu_device::sle_das_dfm() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120377,7 +120378,7 @@ void m68000_mcu_device::sle_das_dfm() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120387,7 +120388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120411,7 +120412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120439,7 +120440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120462,14 +120463,14 @@ void m68000_mcu_device::sle_dais_dfm() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120477,7 +120478,7 @@ void m68000_mcu_device::sle_dais_dfm() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120501,7 +120502,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120527,11 +120528,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120551,7 +120552,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120561,7 +120562,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120585,7 +120586,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120613,7 +120614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120640,7 +120641,7 @@ void m68000_mcu_device::sle_adr16_dfm() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120663,7 +120664,7 @@ void m68000_mcu_device::sle_adr16_dfm() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120684,7 +120685,7 @@ void m68000_mcu_device::sle_adr16_dfm() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120694,7 +120695,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120718,7 +120719,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120746,7 +120747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120771,7 +120772,7 @@ void m68000_mcu_device::sle_adr32_dfm() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120795,7 +120796,7 @@ void m68000_mcu_device::sle_adr32_dfm() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120818,7 +120819,7 @@ void m68000_mcu_device::sle_adr32_dfm() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120839,7 +120840,7 @@ void m68000_mcu_device::sle_adr32_dfm() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120849,7 +120850,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -120873,7 +120874,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120901,7 +120902,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -121102,7 +121103,7 @@ void m68000_mcu_device::bsr_rel16_dfm() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -121209,7 +121210,7 @@ void m68000_mcu_device::bsr_rel8_dfm() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -123811,7 +123812,7 @@ void m68000_mcu_device::moveq_imm8o_dd_dfm() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -123851,7 +123852,7 @@ void m68000_mcu_device::or_b_ds_dd_dfm() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123859,7 +123860,7 @@ void m68000_mcu_device::or_b_ds_dd_dfm() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -123892,11 +123893,11 @@ void m68000_mcu_device::or_b_ais_dd_dfm() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -123916,7 +123917,7 @@ void m68000_mcu_device::or_b_ais_dd_dfm() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123924,7 +123925,7 @@ void m68000_mcu_device::or_b_ais_dd_dfm() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -123960,12 +123961,12 @@ void m68000_mcu_device::or_b_aips_dd_dfm() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123986,7 +123987,7 @@ void m68000_mcu_device::or_b_aips_dd_dfm() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123994,7 +123995,7 @@ void m68000_mcu_device::or_b_aips_dd_dfm() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124029,7 +124030,7 @@ void m68000_mcu_device::or_b_pais_dd_dfm() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124037,7 +124038,7 @@ void m68000_mcu_device::or_b_pais_dd_dfm() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124058,7 +124059,7 @@ void m68000_mcu_device::or_b_pais_dd_dfm() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124066,7 +124067,7 @@ void m68000_mcu_device::or_b_pais_dd_dfm() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124099,7 +124100,7 @@ void m68000_mcu_device::or_b_das_dd_dfm() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124122,11 +124123,11 @@ void m68000_mcu_device::or_b_das_dd_dfm() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124146,7 +124147,7 @@ void m68000_mcu_device::or_b_das_dd_dfm() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124154,7 +124155,7 @@ void m68000_mcu_device::or_b_das_dd_dfm() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124185,14 +124186,14 @@ void m68000_mcu_device::or_b_dais_dd_dfm() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124200,7 +124201,7 @@ void m68000_mcu_device::or_b_dais_dd_dfm() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124224,7 +124225,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124250,11 +124251,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124274,7 +124275,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124282,7 +124283,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124317,7 +124318,7 @@ void m68000_mcu_device::or_b_adr16_dd_dfm() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124340,7 +124341,7 @@ void m68000_mcu_device::or_b_adr16_dd_dfm() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124361,7 +124362,7 @@ void m68000_mcu_device::or_b_adr16_dd_dfm() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124369,7 +124370,7 @@ void m68000_mcu_device::or_b_adr16_dd_dfm() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124402,7 +124403,7 @@ void m68000_mcu_device::or_b_adr32_dd_dfm() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124426,7 +124427,7 @@ void m68000_mcu_device::or_b_adr32_dd_dfm() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124449,7 +124450,7 @@ void m68000_mcu_device::or_b_adr32_dd_dfm() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124470,7 +124471,7 @@ void m68000_mcu_device::or_b_adr32_dd_dfm() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124478,7 +124479,7 @@ void m68000_mcu_device::or_b_adr32_dd_dfm() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124510,7 +124511,7 @@ void m68000_mcu_device::or_b_dpc_dd_dfm() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124533,11 +124534,11 @@ void m68000_mcu_device::or_b_dpc_dd_dfm() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124557,7 +124558,7 @@ void m68000_mcu_device::or_b_dpc_dd_dfm() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124565,7 +124566,7 @@ void m68000_mcu_device::or_b_dpc_dd_dfm() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124595,14 +124596,14 @@ void m68000_mcu_device::or_b_dpci_dd_dfm() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124610,7 +124611,7 @@ void m68000_mcu_device::or_b_dpci_dd_dfm() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124634,7 +124635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124660,11 +124661,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124684,7 +124685,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124692,7 +124693,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124727,7 +124728,7 @@ void m68000_mcu_device::or_b_imm8_dd_dfm() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124751,7 +124752,7 @@ void m68000_mcu_device::or_b_imm8_dd_dfm() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124759,7 +124760,7 @@ void m68000_mcu_device::or_b_imm8_dd_dfm() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124794,7 +124795,7 @@ void m68000_mcu_device::or_w_ds_dd_dfm() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124802,7 +124803,7 @@ void m68000_mcu_device::or_w_ds_dd_dfm() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124835,11 +124836,11 @@ void m68000_mcu_device::or_w_ais_dd_dfm() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124862,7 +124863,7 @@ void m68000_mcu_device::or_w_ais_dd_dfm() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124870,7 +124871,7 @@ void m68000_mcu_device::or_w_ais_dd_dfm() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124906,12 +124907,12 @@ void m68000_mcu_device::or_w_aips_dd_dfm() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -124935,7 +124936,7 @@ void m68000_mcu_device::or_w_aips_dd_dfm() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124943,7 +124944,7 @@ void m68000_mcu_device::or_w_aips_dd_dfm() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -124978,7 +124979,7 @@ void m68000_mcu_device::or_w_pais_dd_dfm() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124986,7 +124987,7 @@ void m68000_mcu_device::or_w_pais_dd_dfm() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125010,7 +125011,7 @@ void m68000_mcu_device::or_w_pais_dd_dfm() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125018,7 +125019,7 @@ void m68000_mcu_device::or_w_pais_dd_dfm() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125051,7 +125052,7 @@ void m68000_mcu_device::or_w_das_dd_dfm() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125074,11 +125075,11 @@ void m68000_mcu_device::or_w_das_dd_dfm() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125101,7 +125102,7 @@ void m68000_mcu_device::or_w_das_dd_dfm() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125109,7 +125110,7 @@ void m68000_mcu_device::or_w_das_dd_dfm() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125140,14 +125141,14 @@ void m68000_mcu_device::or_w_dais_dd_dfm() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125155,7 +125156,7 @@ void m68000_mcu_device::or_w_dais_dd_dfm() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125179,7 +125180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125205,11 +125206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125232,7 +125233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125240,7 +125241,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125275,7 +125276,7 @@ void m68000_mcu_device::or_w_adr16_dd_dfm() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125298,7 +125299,7 @@ void m68000_mcu_device::or_w_adr16_dd_dfm() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125322,7 +125323,7 @@ void m68000_mcu_device::or_w_adr16_dd_dfm() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125330,7 +125331,7 @@ void m68000_mcu_device::or_w_adr16_dd_dfm() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125363,7 +125364,7 @@ void m68000_mcu_device::or_w_adr32_dd_dfm() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125387,7 +125388,7 @@ void m68000_mcu_device::or_w_adr32_dd_dfm() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125410,7 +125411,7 @@ void m68000_mcu_device::or_w_adr32_dd_dfm() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125434,7 +125435,7 @@ void m68000_mcu_device::or_w_adr32_dd_dfm() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125442,7 +125443,7 @@ void m68000_mcu_device::or_w_adr32_dd_dfm() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125474,7 +125475,7 @@ void m68000_mcu_device::or_w_dpc_dd_dfm() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125497,11 +125498,11 @@ void m68000_mcu_device::or_w_dpc_dd_dfm() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125524,7 +125525,7 @@ void m68000_mcu_device::or_w_dpc_dd_dfm() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125532,7 +125533,7 @@ void m68000_mcu_device::or_w_dpc_dd_dfm() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125562,14 +125563,14 @@ void m68000_mcu_device::or_w_dpci_dd_dfm() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125577,7 +125578,7 @@ void m68000_mcu_device::or_w_dpci_dd_dfm() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125601,7 +125602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125627,11 +125628,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125654,7 +125655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125662,7 +125663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125697,7 +125698,7 @@ void m68000_mcu_device::or_w_imm16_dd_dfm() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125721,7 +125722,7 @@ void m68000_mcu_device::or_w_imm16_dd_dfm() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125729,7 +125730,7 @@ void m68000_mcu_device::or_w_imm16_dd_dfm() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125764,12 +125765,12 @@ void m68000_mcu_device::or_l_ds_dd_dfm() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125789,7 +125790,7 @@ void m68000_mcu_device::or_l_ds_dd_dfm() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -125798,7 +125799,7 @@ void m68000_mcu_device::or_l_ds_dd_dfm() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125814,7 +125815,7 @@ void m68000_mcu_device::or_l_ais_dd_dfm() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125839,7 +125840,7 @@ void m68000_mcu_device::or_l_ais_dd_dfm() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125862,12 +125863,12 @@ void m68000_mcu_device::or_l_ais_dd_dfm() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125893,7 +125894,7 @@ void m68000_mcu_device::or_l_ais_dd_dfm() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125909,7 +125910,7 @@ void m68000_mcu_device::or_l_aips_dd_dfm() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -125934,11 +125935,11 @@ void m68000_mcu_device::or_l_aips_dd_dfm() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -125961,12 +125962,12 @@ void m68000_mcu_device::or_l_aips_dd_dfm() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125992,7 +125993,7 @@ void m68000_mcu_device::or_l_aips_dd_dfm() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126007,14 +126008,14 @@ void m68000_mcu_device::or_l_pais_dd_dfm() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126038,7 +126039,7 @@ void m68000_mcu_device::or_l_pais_dd_dfm() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126061,12 +126062,12 @@ void m68000_mcu_device::or_l_pais_dd_dfm() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126092,7 +126093,7 @@ void m68000_mcu_device::or_l_pais_dd_dfm() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126108,7 +126109,7 @@ void m68000_mcu_device::or_l_das_dd_dfm() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126130,7 +126131,7 @@ void m68000_mcu_device::or_l_das_dd_dfm() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126155,7 +126156,7 @@ void m68000_mcu_device::or_l_das_dd_dfm() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126178,12 +126179,12 @@ void m68000_mcu_device::or_l_das_dd_dfm() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126209,7 +126210,7 @@ void m68000_mcu_device::or_l_das_dd_dfm() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126223,14 +126224,14 @@ void m68000_mcu_device::or_l_dais_dd_dfm() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126238,7 +126239,7 @@ void m68000_mcu_device::or_l_dais_dd_dfm() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126262,7 +126263,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126287,7 +126288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126312,7 +126313,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126335,12 +126336,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126366,7 +126367,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126384,7 +126385,7 @@ void m68000_mcu_device::or_l_adr16_dd_dfm() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126407,7 +126408,7 @@ void m68000_mcu_device::or_l_adr16_dd_dfm() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126432,7 +126433,7 @@ void m68000_mcu_device::or_l_adr16_dd_dfm() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126455,12 +126456,12 @@ void m68000_mcu_device::or_l_adr16_dd_dfm() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126486,7 +126487,7 @@ void m68000_mcu_device::or_l_adr16_dd_dfm() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126502,7 +126503,7 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126526,7 +126527,7 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126549,7 +126550,7 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -126574,7 +126575,7 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126597,12 +126598,12 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126628,7 +126629,7 @@ void m68000_mcu_device::or_l_adr32_dd_dfm() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126643,7 +126644,7 @@ void m68000_mcu_device::or_l_dpc_dd_dfm() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126665,7 +126666,7 @@ void m68000_mcu_device::or_l_dpc_dd_dfm() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126690,7 +126691,7 @@ void m68000_mcu_device::or_l_dpc_dd_dfm() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126713,12 +126714,12 @@ void m68000_mcu_device::or_l_dpc_dd_dfm() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126744,7 +126745,7 @@ void m68000_mcu_device::or_l_dpc_dd_dfm() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126757,14 +126758,14 @@ void m68000_mcu_device::or_l_dpci_dd_dfm() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126772,7 +126773,7 @@ void m68000_mcu_device::or_l_dpci_dd_dfm() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126796,7 +126797,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126821,7 +126822,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126846,7 +126847,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126869,12 +126870,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126900,7 +126901,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126916,7 +126917,7 @@ void m68000_mcu_device::or_l_imm32_dd_dfm() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126940,7 +126941,7 @@ void m68000_mcu_device::or_l_imm32_dd_dfm() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126964,12 +126965,12 @@ void m68000_mcu_device::or_l_imm32_dd_dfm() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -126989,7 +126990,7 @@ void m68000_mcu_device::or_l_imm32_dd_dfm() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -126998,7 +126999,7 @@ void m68000_mcu_device::or_l_imm32_dd_dfm() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -127016,13 +127017,13 @@ void m68000_mcu_device::divu_w_ds_dd_dfm() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127035,7 +127036,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127053,7 +127054,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127061,7 +127062,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127086,7 +127087,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127109,7 +127110,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127230,7 +127231,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127260,7 +127261,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127271,7 +127272,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127283,7 +127284,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127303,7 +127304,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127314,7 +127315,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127324,13 +127325,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127341,7 +127342,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127351,7 +127352,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127359,7 +127360,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127394,7 +127395,7 @@ void m68000_mcu_device::divu_w_ais_dd_dfm() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -127420,13 +127421,13 @@ void m68000_mcu_device::divu_w_ais_dd_dfm() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127439,7 +127440,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127457,7 +127458,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127465,7 +127466,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127490,7 +127491,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127513,7 +127514,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127634,7 +127635,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127664,7 +127665,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127675,7 +127676,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127687,7 +127688,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127707,7 +127708,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127718,7 +127719,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127728,13 +127729,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127745,7 +127746,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127755,7 +127756,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127763,7 +127764,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127804,7 +127805,7 @@ void m68000_mcu_device::divu_w_aips_dd_dfm() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -127828,13 +127829,13 @@ void m68000_mcu_device::divu_w_aips_dd_dfm() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127847,7 +127848,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127865,7 +127866,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127873,7 +127874,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127898,7 +127899,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -127921,7 +127922,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128042,7 +128043,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128072,7 +128073,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128083,7 +128084,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128095,7 +128096,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128115,7 +128116,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128126,7 +128127,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128136,13 +128137,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128153,7 +128154,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128163,7 +128164,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128171,7 +128172,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128214,7 +128215,7 @@ void m68000_mcu_device::divu_w_pais_dd_dfm() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -128238,13 +128239,13 @@ void m68000_mcu_device::divu_w_pais_dd_dfm() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128257,7 +128258,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128275,7 +128276,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128283,7 +128284,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128308,7 +128309,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128331,7 +128332,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128452,7 +128453,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128482,7 +128483,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128493,7 +128494,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128505,7 +128506,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128525,7 +128526,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128536,7 +128537,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128546,13 +128547,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128563,7 +128564,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128573,7 +128574,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128581,7 +128582,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128638,7 +128639,7 @@ void m68000_mcu_device::divu_w_das_dd_dfm() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -128664,13 +128665,13 @@ void m68000_mcu_device::divu_w_das_dd_dfm() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128683,7 +128684,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128701,7 +128702,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128709,7 +128710,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128734,7 +128735,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128757,7 +128758,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -128878,7 +128879,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128908,7 +128909,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128919,7 +128920,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128931,7 +128932,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128951,7 +128952,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128962,7 +128963,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128972,13 +128973,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128989,7 +128990,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128999,7 +129000,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129007,7 +129008,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129040,7 +129041,7 @@ void m68000_mcu_device::divu_w_dais_dd_dfm() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129102,7 +129103,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -129128,13 +129129,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129147,7 +129148,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129165,7 +129166,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129173,7 +129174,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129198,7 +129199,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129221,7 +129222,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129342,7 +129343,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129372,7 +129373,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129383,7 +129384,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129395,7 +129396,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129415,7 +129416,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129426,7 +129427,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129436,13 +129437,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129453,7 +129454,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129463,7 +129464,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129471,7 +129472,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129529,7 +129530,7 @@ void m68000_mcu_device::divu_w_adr16_dd_dfm() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -129553,13 +129554,13 @@ void m68000_mcu_device::divu_w_adr16_dd_dfm() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129572,7 +129573,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129590,7 +129591,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129598,7 +129599,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129623,7 +129624,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129646,7 +129647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -129767,7 +129768,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129797,7 +129798,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129808,7 +129809,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129820,7 +129821,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129840,7 +129841,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129851,7 +129852,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129861,13 +129862,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129878,7 +129879,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129888,7 +129889,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129896,7 +129897,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129975,7 +129976,7 @@ void m68000_mcu_device::divu_w_adr32_dd_dfm() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -129999,13 +130000,13 @@ void m68000_mcu_device::divu_w_adr32_dd_dfm() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130018,7 +130019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130036,7 +130037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130044,7 +130045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130069,7 +130070,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130092,7 +130093,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130213,7 +130214,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130243,7 +130244,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130254,7 +130255,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130266,7 +130267,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130286,7 +130287,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130297,7 +130298,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130307,13 +130308,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130324,7 +130325,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130334,7 +130335,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130342,7 +130343,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130398,7 +130399,7 @@ void m68000_mcu_device::divu_w_dpc_dd_dfm() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130424,13 +130425,13 @@ void m68000_mcu_device::divu_w_dpc_dd_dfm() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130443,7 +130444,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130461,7 +130462,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130469,7 +130470,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130494,7 +130495,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130517,7 +130518,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130638,7 +130639,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130668,7 +130669,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130679,7 +130680,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130691,7 +130692,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130711,7 +130712,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130722,7 +130723,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130732,13 +130733,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130749,7 +130750,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130759,7 +130760,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130767,7 +130768,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130799,7 +130800,7 @@ void m68000_mcu_device::divu_w_dpci_dd_dfm() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130861,7 +130862,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130887,13 +130888,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130906,7 +130907,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130924,7 +130925,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130932,7 +130933,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130957,7 +130958,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -130980,7 +130981,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131101,7 +131102,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131131,7 +131132,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131142,7 +131143,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131154,7 +131155,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131174,7 +131175,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131185,7 +131186,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131195,13 +131196,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131212,7 +131213,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131222,7 +131223,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131230,7 +131231,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131290,13 +131291,13 @@ void m68000_mcu_device::divu_w_imm16_dd_dfm() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -131309,7 +131310,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131327,7 +131328,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -131335,7 +131336,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131360,7 +131361,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131383,7 +131384,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -131504,7 +131505,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131534,7 +131535,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131545,7 +131546,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131557,7 +131558,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131577,7 +131578,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131588,7 +131589,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131598,13 +131599,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131615,7 +131616,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131625,7 +131626,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131633,7 +131634,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131670,12 +131671,12 @@ void m68000_mcu_device::sbcd_ds_dd_dfm() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -131720,7 +131721,7 @@ void m68000_mcu_device::sbcd_pais_paid_dfm() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -131760,12 +131761,12 @@ void m68000_mcu_device::sbcd_pais_paid_dfm() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -131815,11 +131816,11 @@ void m68000_mcu_device::or_b_dd_ais_dfm() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -131839,7 +131840,7 @@ void m68000_mcu_device::or_b_dd_ais_dfm() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131866,7 +131867,7 @@ void m68000_mcu_device::or_b_dd_ais_dfm() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131895,12 +131896,12 @@ void m68000_mcu_device::or_b_dd_aips_dfm() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131921,7 +131922,7 @@ void m68000_mcu_device::or_b_dd_aips_dfm() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131948,7 +131949,7 @@ void m68000_mcu_device::or_b_dd_aips_dfm() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131976,7 +131977,7 @@ void m68000_mcu_device::or_b_dd_pais_dfm() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131984,7 +131985,7 @@ void m68000_mcu_device::or_b_dd_pais_dfm() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132005,7 +132006,7 @@ void m68000_mcu_device::or_b_dd_pais_dfm() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132032,7 +132033,7 @@ void m68000_mcu_device::or_b_dd_pais_dfm() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132058,7 +132059,7 @@ void m68000_mcu_device::or_b_dd_das_dfm() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132081,11 +132082,11 @@ void m68000_mcu_device::or_b_dd_das_dfm() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132105,7 +132106,7 @@ void m68000_mcu_device::or_b_dd_das_dfm() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132132,7 +132133,7 @@ void m68000_mcu_device::or_b_dd_das_dfm() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132156,14 +132157,14 @@ void m68000_mcu_device::or_b_dd_dais_dfm() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132171,7 +132172,7 @@ void m68000_mcu_device::or_b_dd_dais_dfm() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132195,7 +132196,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132221,11 +132222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132245,7 +132246,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132272,7 +132273,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132300,7 +132301,7 @@ void m68000_mcu_device::or_b_dd_adr16_dfm() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132323,7 +132324,7 @@ void m68000_mcu_device::or_b_dd_adr16_dfm() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132344,7 +132345,7 @@ void m68000_mcu_device::or_b_dd_adr16_dfm() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132371,7 +132372,7 @@ void m68000_mcu_device::or_b_dd_adr16_dfm() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132397,7 +132398,7 @@ void m68000_mcu_device::or_b_dd_adr32_dfm() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132421,7 +132422,7 @@ void m68000_mcu_device::or_b_dd_adr32_dfm() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132444,7 +132445,7 @@ void m68000_mcu_device::or_b_dd_adr32_dfm() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132465,7 +132466,7 @@ void m68000_mcu_device::or_b_dd_adr32_dfm() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132492,7 +132493,7 @@ void m68000_mcu_device::or_b_dd_adr32_dfm() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132518,11 +132519,11 @@ void m68000_mcu_device::or_w_dd_ais_dfm() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132545,7 +132546,7 @@ void m68000_mcu_device::or_w_dd_ais_dfm() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132572,7 +132573,7 @@ void m68000_mcu_device::or_w_dd_ais_dfm() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132606,12 +132607,12 @@ void m68000_mcu_device::or_w_dd_aips_dfm() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -132635,7 +132636,7 @@ void m68000_mcu_device::or_w_dd_aips_dfm() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132662,7 +132663,7 @@ void m68000_mcu_device::or_w_dd_aips_dfm() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132695,7 +132696,7 @@ void m68000_mcu_device::or_w_dd_pais_dfm() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132703,7 +132704,7 @@ void m68000_mcu_device::or_w_dd_pais_dfm() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -132727,7 +132728,7 @@ void m68000_mcu_device::or_w_dd_pais_dfm() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132754,7 +132755,7 @@ void m68000_mcu_device::or_w_dd_pais_dfm() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132785,7 +132786,7 @@ void m68000_mcu_device::or_w_dd_das_dfm() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132808,11 +132809,11 @@ void m68000_mcu_device::or_w_dd_das_dfm() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132835,7 +132836,7 @@ void m68000_mcu_device::or_w_dd_das_dfm() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132862,7 +132863,7 @@ void m68000_mcu_device::or_w_dd_das_dfm() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -132891,14 +132892,14 @@ void m68000_mcu_device::or_w_dd_dais_dfm() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132906,7 +132907,7 @@ void m68000_mcu_device::or_w_dd_dais_dfm() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132930,7 +132931,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132956,11 +132957,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -132983,7 +132984,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133010,7 +133011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133043,7 +133044,7 @@ void m68000_mcu_device::or_w_dd_adr16_dfm() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133066,7 +133067,7 @@ void m68000_mcu_device::or_w_dd_adr16_dfm() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133090,7 +133091,7 @@ void m68000_mcu_device::or_w_dd_adr16_dfm() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133117,7 +133118,7 @@ void m68000_mcu_device::or_w_dd_adr16_dfm() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133148,7 +133149,7 @@ void m68000_mcu_device::or_w_dd_adr32_dfm() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133172,7 +133173,7 @@ void m68000_mcu_device::or_w_dd_adr32_dfm() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133195,7 +133196,7 @@ void m68000_mcu_device::or_w_dd_adr32_dfm() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133219,7 +133220,7 @@ void m68000_mcu_device::or_w_dd_adr32_dfm() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133246,7 +133247,7 @@ void m68000_mcu_device::or_w_dd_adr32_dfm() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133277,7 +133278,7 @@ void m68000_mcu_device::or_l_dd_ais_dfm() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133302,7 +133303,7 @@ void m68000_mcu_device::or_l_dd_ais_dfm() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133325,7 +133326,7 @@ void m68000_mcu_device::or_l_dd_ais_dfm() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133350,7 +133351,7 @@ void m68000_mcu_device::or_l_dd_ais_dfm() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133375,7 +133376,7 @@ void m68000_mcu_device::or_l_dd_ais_dfm() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133406,7 +133407,7 @@ void m68000_mcu_device::or_l_dd_aips_dfm() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133431,11 +133432,11 @@ void m68000_mcu_device::or_l_dd_aips_dfm() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133458,7 +133459,7 @@ void m68000_mcu_device::or_l_dd_aips_dfm() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133483,7 +133484,7 @@ void m68000_mcu_device::or_l_dd_aips_dfm() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133508,7 +133509,7 @@ void m68000_mcu_device::or_l_dd_aips_dfm() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133538,14 +133539,14 @@ void m68000_mcu_device::or_l_dd_pais_dfm() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133569,7 +133570,7 @@ void m68000_mcu_device::or_l_dd_pais_dfm() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133592,7 +133593,7 @@ void m68000_mcu_device::or_l_dd_pais_dfm() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133617,7 +133618,7 @@ void m68000_mcu_device::or_l_dd_pais_dfm() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133642,7 +133643,7 @@ void m68000_mcu_device::or_l_dd_pais_dfm() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133673,7 +133674,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133695,7 +133696,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133720,7 +133721,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133743,7 +133744,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133768,7 +133769,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133793,7 +133794,7 @@ void m68000_mcu_device::or_l_dd_das_dfm() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -133822,14 +133823,14 @@ void m68000_mcu_device::or_l_dd_dais_dfm() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -133837,7 +133838,7 @@ void m68000_mcu_device::or_l_dd_dais_dfm() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133861,7 +133862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133886,7 +133887,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -133911,7 +133912,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -133934,7 +133935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133959,7 +133960,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133984,7 +133985,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134017,7 +134018,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134040,7 +134041,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -134065,7 +134066,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134088,7 +134089,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134113,7 +134114,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134138,7 +134139,7 @@ void m68000_mcu_device::or_l_dd_adr16_dfm() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134169,7 +134170,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134193,7 +134194,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134216,7 +134217,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -134241,7 +134242,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -134264,7 +134265,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134289,7 +134290,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134314,7 +134315,7 @@ void m68000_mcu_device::or_l_dd_adr32_dfm() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -134347,13 +134348,13 @@ void m68000_mcu_device::divs_w_ds_dd_dfm() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134367,7 +134368,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134377,7 +134378,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134392,7 +134393,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134400,7 +134401,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134425,7 +134426,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134448,7 +134449,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134564,7 +134565,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -134573,7 +134574,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -134581,12 +134582,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134594,7 +134595,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134611,7 +134612,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -134619,7 +134620,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134649,7 +134650,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134676,13 +134677,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134690,27 +134691,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134722,7 +134723,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134734,7 +134735,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134749,7 +134750,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134758,7 +134759,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134766,7 +134767,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134776,7 +134777,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134785,7 +134786,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134797,7 +134798,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134845,7 +134846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -134858,7 +134859,7 @@ void m68000_mcu_device::divs_w_ais_dd_dfm() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -134884,13 +134885,13 @@ void m68000_mcu_device::divs_w_ais_dd_dfm() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134904,7 +134905,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134914,7 +134915,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134929,7 +134930,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134937,7 +134938,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134962,7 +134963,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -134985,7 +134986,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135101,7 +135102,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135110,7 +135111,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135118,12 +135119,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135131,7 +135132,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135148,7 +135149,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135156,7 +135157,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135186,7 +135187,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135213,13 +135214,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135227,27 +135228,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135259,7 +135260,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135271,7 +135272,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135286,7 +135287,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135295,7 +135296,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135303,7 +135304,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135313,7 +135314,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135322,7 +135323,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135334,7 +135335,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135382,7 +135383,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135401,7 +135402,7 @@ void m68000_mcu_device::divs_w_aips_dd_dfm() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -135425,13 +135426,13 @@ void m68000_mcu_device::divs_w_aips_dd_dfm() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135445,7 +135446,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135455,7 +135456,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135470,7 +135471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -135478,7 +135479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135503,7 +135504,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135526,7 +135527,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -135642,7 +135643,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135651,7 +135652,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135659,12 +135660,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135672,7 +135673,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135689,7 +135690,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135697,7 +135698,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135727,7 +135728,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135754,13 +135755,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135768,27 +135769,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135800,7 +135801,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135812,7 +135813,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135827,7 +135828,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135836,7 +135837,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135844,7 +135845,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135854,7 +135855,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135863,7 +135864,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135875,7 +135876,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135923,7 +135924,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135944,7 +135945,7 @@ void m68000_mcu_device::divs_w_pais_dd_dfm() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -135968,13 +135969,13 @@ void m68000_mcu_device::divs_w_pais_dd_dfm() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135988,7 +135989,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135998,7 +135999,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136013,7 +136014,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136021,7 +136022,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136046,7 +136047,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136069,7 +136070,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136185,7 +136186,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136194,7 +136195,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136202,12 +136203,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136215,7 +136216,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136232,7 +136233,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136240,7 +136241,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136270,7 +136271,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136297,13 +136298,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136311,27 +136312,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136343,7 +136344,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136355,7 +136356,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136370,7 +136371,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136379,7 +136380,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136387,7 +136388,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136397,7 +136398,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136406,7 +136407,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136418,7 +136419,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136466,7 +136467,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -136501,7 +136502,7 @@ void m68000_mcu_device::divs_w_das_dd_dfm() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -136527,13 +136528,13 @@ void m68000_mcu_device::divs_w_das_dd_dfm() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136547,7 +136548,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136557,7 +136558,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136572,7 +136573,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136580,7 +136581,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136605,7 +136606,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136628,7 +136629,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -136744,7 +136745,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136753,7 +136754,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136761,12 +136762,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136774,7 +136775,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136791,7 +136792,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136799,7 +136800,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136829,7 +136830,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136856,13 +136857,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136870,27 +136871,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136902,7 +136903,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136914,7 +136915,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136929,7 +136930,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136938,7 +136939,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136946,7 +136947,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136956,7 +136957,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136965,7 +136966,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136977,7 +136978,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137025,7 +137026,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137036,7 +137037,7 @@ void m68000_mcu_device::divs_w_dais_dd_dfm() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -137098,7 +137099,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -137124,13 +137125,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137144,7 +137145,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137154,7 +137155,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137169,7 +137170,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137177,7 +137178,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137202,7 +137203,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137225,7 +137226,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137341,7 +137342,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137350,7 +137351,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137358,12 +137359,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137371,7 +137372,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137388,7 +137389,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137396,7 +137397,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137426,7 +137427,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137453,13 +137454,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137467,27 +137468,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137499,7 +137500,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137511,7 +137512,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137526,7 +137527,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137535,7 +137536,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137543,7 +137544,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137553,7 +137554,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137562,7 +137563,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137574,7 +137575,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137622,7 +137623,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137658,7 +137659,7 @@ void m68000_mcu_device::divs_w_adr16_dd_dfm() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -137682,13 +137683,13 @@ void m68000_mcu_device::divs_w_adr16_dd_dfm() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137702,7 +137703,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137712,7 +137713,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137727,7 +137728,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137735,7 +137736,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137760,7 +137761,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137783,7 +137784,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -137899,7 +137900,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137908,7 +137909,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137916,12 +137917,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137929,7 +137930,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137946,7 +137947,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137954,7 +137955,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137984,7 +137985,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138011,13 +138012,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138025,27 +138026,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138057,7 +138058,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138069,7 +138070,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138084,7 +138085,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138093,7 +138094,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138101,7 +138102,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138111,7 +138112,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138120,7 +138121,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138132,7 +138133,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138180,7 +138181,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138237,7 +138238,7 @@ void m68000_mcu_device::divs_w_adr32_dd_dfm() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -138261,13 +138262,13 @@ void m68000_mcu_device::divs_w_adr32_dd_dfm() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138281,7 +138282,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138291,7 +138292,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138306,7 +138307,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138314,7 +138315,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138339,7 +138340,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138362,7 +138363,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138478,7 +138479,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -138487,7 +138488,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -138495,12 +138496,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138508,7 +138509,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138525,7 +138526,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -138533,7 +138534,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -138563,7 +138564,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138590,13 +138591,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138604,27 +138605,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138636,7 +138637,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138648,7 +138649,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138663,7 +138664,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138672,7 +138673,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138680,7 +138681,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138690,7 +138691,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138699,7 +138700,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138711,7 +138712,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138759,7 +138760,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138793,7 +138794,7 @@ void m68000_mcu_device::divs_w_dpc_dd_dfm() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -138819,13 +138820,13 @@ void m68000_mcu_device::divs_w_dpc_dd_dfm() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138839,7 +138840,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138849,7 +138850,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138864,7 +138865,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138872,7 +138873,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138897,7 +138898,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -138920,7 +138921,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139036,7 +139037,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139045,7 +139046,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139053,12 +139054,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139066,7 +139067,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139083,7 +139084,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139091,7 +139092,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139121,7 +139122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139148,13 +139149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139162,27 +139163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139194,7 +139195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139206,7 +139207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139221,7 +139222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139230,7 +139231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139238,7 +139239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139248,7 +139249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139257,7 +139258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139269,7 +139270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139317,7 +139318,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139327,7 +139328,7 @@ void m68000_mcu_device::divs_w_dpci_dd_dfm() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -139389,7 +139390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -139415,13 +139416,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139435,7 +139436,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139445,7 +139446,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139460,7 +139461,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -139468,7 +139469,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139493,7 +139494,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139516,7 +139517,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -139632,7 +139633,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139641,7 +139642,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139649,12 +139650,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139662,7 +139663,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139679,7 +139680,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139687,7 +139688,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139717,7 +139718,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139744,13 +139745,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139758,27 +139759,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139790,7 +139791,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139802,7 +139803,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139817,7 +139818,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139826,7 +139827,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139834,7 +139835,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139844,7 +139845,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139853,7 +139854,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139865,7 +139866,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139913,7 +139914,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139951,13 +139952,13 @@ void m68000_mcu_device::divs_w_imm16_dd_dfm() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139971,7 +139972,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139981,7 +139982,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139996,7 +139997,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -140004,7 +140005,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140029,7 +140030,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140052,7 +140053,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -140168,7 +140169,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -140177,7 +140178,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -140185,12 +140186,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140198,7 +140199,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140215,7 +140216,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -140223,7 +140224,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -140253,7 +140254,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140280,13 +140281,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140294,27 +140295,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140326,7 +140327,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140338,7 +140339,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140353,7 +140354,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140362,7 +140363,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140370,7 +140371,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140380,7 +140381,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140389,7 +140390,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140401,7 +140402,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140449,7 +140450,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -140464,7 +140465,7 @@ void m68000_mcu_device::sub_b_ds_dd_dfm() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140504,7 +140505,7 @@ void m68000_mcu_device::sub_b_ais_dd_dfm() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140527,7 +140528,7 @@ void m68000_mcu_device::sub_b_ais_dd_dfm() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140573,7 +140574,7 @@ void m68000_mcu_device::sub_b_aips_dd_dfm() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140594,7 +140595,7 @@ void m68000_mcu_device::sub_b_aips_dd_dfm() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140642,7 +140643,7 @@ void m68000_mcu_device::sub_b_pais_dd_dfm() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140663,7 +140664,7 @@ void m68000_mcu_device::sub_b_pais_dd_dfm() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140725,7 +140726,7 @@ void m68000_mcu_device::sub_b_das_dd_dfm() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140748,7 +140749,7 @@ void m68000_mcu_device::sub_b_das_dd_dfm() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140786,7 +140787,7 @@ void m68000_mcu_device::sub_b_dais_dd_dfm() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -140848,7 +140849,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140871,7 +140872,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140934,7 +140935,7 @@ void m68000_mcu_device::sub_b_adr16_dd_dfm() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140955,7 +140956,7 @@ void m68000_mcu_device::sub_b_adr16_dd_dfm() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141039,7 +141040,7 @@ void m68000_mcu_device::sub_b_adr32_dd_dfm() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141060,7 +141061,7 @@ void m68000_mcu_device::sub_b_adr32_dd_dfm() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141121,7 +141122,7 @@ void m68000_mcu_device::sub_b_dpc_dd_dfm() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141144,7 +141145,7 @@ void m68000_mcu_device::sub_b_dpc_dd_dfm() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141181,7 +141182,7 @@ void m68000_mcu_device::sub_b_dpci_dd_dfm() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141243,7 +141244,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141266,7 +141267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141331,7 +141332,7 @@ void m68000_mcu_device::sub_b_imm8_dd_dfm() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141373,7 +141374,7 @@ void m68000_mcu_device::sub_w_ds_dd_dfm() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141415,7 +141416,7 @@ void m68000_mcu_device::sub_w_as_dd_dfm() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141455,7 +141456,7 @@ void m68000_mcu_device::sub_w_ais_dd_dfm() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141481,7 +141482,7 @@ void m68000_mcu_device::sub_w_ais_dd_dfm() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141527,7 +141528,7 @@ void m68000_mcu_device::sub_w_aips_dd_dfm() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141551,7 +141552,7 @@ void m68000_mcu_device::sub_w_aips_dd_dfm() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141599,7 +141600,7 @@ void m68000_mcu_device::sub_w_pais_dd_dfm() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141623,7 +141624,7 @@ void m68000_mcu_device::sub_w_pais_dd_dfm() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141685,7 +141686,7 @@ void m68000_mcu_device::sub_w_das_dd_dfm() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141711,7 +141712,7 @@ void m68000_mcu_device::sub_w_das_dd_dfm() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141749,7 +141750,7 @@ void m68000_mcu_device::sub_w_dais_dd_dfm() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141811,7 +141812,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141837,7 +141838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141900,7 +141901,7 @@ void m68000_mcu_device::sub_w_adr16_dd_dfm() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141924,7 +141925,7 @@ void m68000_mcu_device::sub_w_adr16_dd_dfm() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142008,7 +142009,7 @@ void m68000_mcu_device::sub_w_adr32_dd_dfm() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142032,7 +142033,7 @@ void m68000_mcu_device::sub_w_adr32_dd_dfm() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142093,7 +142094,7 @@ void m68000_mcu_device::sub_w_dpc_dd_dfm() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142119,7 +142120,7 @@ void m68000_mcu_device::sub_w_dpc_dd_dfm() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142156,7 +142157,7 @@ void m68000_mcu_device::sub_w_dpci_dd_dfm() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -142218,7 +142219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142244,7 +142245,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142309,7 +142310,7 @@ void m68000_mcu_device::sub_w_imm16_dd_dfm() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142351,7 +142352,7 @@ void m68000_mcu_device::sub_l_ds_dd_dfm() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142375,7 +142376,7 @@ void m68000_mcu_device::sub_l_ds_dd_dfm() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142401,7 +142402,7 @@ void m68000_mcu_device::sub_l_as_dd_dfm() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142425,7 +142426,7 @@ void m68000_mcu_device::sub_l_as_dd_dfm() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142449,7 +142450,7 @@ void m68000_mcu_device::sub_l_ais_dd_dfm() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142496,12 +142497,12 @@ void m68000_mcu_device::sub_l_ais_dd_dfm() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142542,7 +142543,7 @@ void m68000_mcu_device::sub_l_aips_dd_dfm() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142592,12 +142593,12 @@ void m68000_mcu_device::sub_l_aips_dd_dfm() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142637,7 +142638,7 @@ void m68000_mcu_device::sub_l_pais_dd_dfm() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -142689,12 +142690,12 @@ void m68000_mcu_device::sub_l_pais_dd_dfm() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142756,7 +142757,7 @@ void m68000_mcu_device::sub_l_das_dd_dfm() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142803,12 +142804,12 @@ void m68000_mcu_device::sub_l_das_dd_dfm() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142847,7 +142848,7 @@ void m68000_mcu_device::sub_l_dais_dd_dfm() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -142908,7 +142909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142955,12 +142956,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143024,7 +143025,7 @@ void m68000_mcu_device::sub_l_adr16_dd_dfm() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143071,12 +143072,12 @@ void m68000_mcu_device::sub_l_adr16_dd_dfm() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143161,7 +143162,7 @@ void m68000_mcu_device::sub_l_adr32_dd_dfm() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143208,12 +143209,12 @@ void m68000_mcu_device::sub_l_adr32_dd_dfm() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143274,7 +143275,7 @@ void m68000_mcu_device::sub_l_dpc_dd_dfm() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143321,12 +143322,12 @@ void m68000_mcu_device::sub_l_dpc_dd_dfm() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143364,7 +143365,7 @@ void m68000_mcu_device::sub_l_dpci_dd_dfm() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -143425,7 +143426,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143472,12 +143473,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143564,7 +143565,7 @@ void m68000_mcu_device::sub_l_imm32_dd_dfm() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -143588,7 +143589,7 @@ void m68000_mcu_device::sub_l_imm32_dd_dfm() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -143614,7 +143615,7 @@ void m68000_mcu_device::suba_w_ds_ad_dfm() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143637,7 +143638,7 @@ void m68000_mcu_device::suba_w_ds_ad_dfm() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143662,7 +143663,7 @@ void m68000_mcu_device::suba_w_as_ad_dfm() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143685,7 +143686,7 @@ void m68000_mcu_device::suba_w_as_ad_dfm() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143708,7 +143709,7 @@ void m68000_mcu_device::suba_w_ais_ad_dfm() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143734,7 +143735,7 @@ void m68000_mcu_device::suba_w_ais_ad_dfm() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143757,7 +143758,7 @@ void m68000_mcu_device::suba_w_ais_ad_dfm() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143786,7 +143787,7 @@ void m68000_mcu_device::suba_w_aips_ad_dfm() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143810,7 +143811,7 @@ void m68000_mcu_device::suba_w_aips_ad_dfm() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143833,7 +143834,7 @@ void m68000_mcu_device::suba_w_aips_ad_dfm() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143864,7 +143865,7 @@ void m68000_mcu_device::suba_w_pais_ad_dfm() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143888,7 +143889,7 @@ void m68000_mcu_device::suba_w_pais_ad_dfm() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143911,7 +143912,7 @@ void m68000_mcu_device::suba_w_pais_ad_dfm() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143956,7 +143957,7 @@ void m68000_mcu_device::suba_w_das_ad_dfm() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143982,7 +143983,7 @@ void m68000_mcu_device::suba_w_das_ad_dfm() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144005,7 +144006,7 @@ void m68000_mcu_device::suba_w_das_ad_dfm() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144026,7 +144027,7 @@ void m68000_mcu_device::suba_w_dais_ad_dfm() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144088,7 +144089,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144114,7 +144115,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144137,7 +144138,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144183,7 +144184,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dfm() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -144207,7 +144208,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dfm() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144230,7 +144231,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dfm() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144297,7 +144298,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dfm() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -144321,7 +144322,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dfm() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144344,7 +144345,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dfm() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144388,7 +144389,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dfm() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144414,7 +144415,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dfm() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144437,7 +144438,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dfm() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144457,7 +144458,7 @@ void m68000_mcu_device::suba_w_dpci_ad_dfm() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144519,7 +144520,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144545,7 +144546,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144568,7 +144569,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144616,7 +144617,7 @@ void m68000_mcu_device::suba_w_imm16_ad_dfm() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144639,7 +144640,7 @@ void m68000_mcu_device::suba_w_imm16_ad_dfm() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144664,7 +144665,7 @@ void m68000_mcu_device::subx_b_ds_dd_dfm() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -144710,7 +144711,7 @@ void m68000_mcu_device::subx_b_pais_paid_dfm() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -144751,7 +144752,7 @@ void m68000_mcu_device::subx_b_pais_paid_dfm() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144803,7 +144804,7 @@ void m68000_mcu_device::sub_b_dd_ais_dfm() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144826,7 +144827,7 @@ void m68000_mcu_device::sub_b_dd_ais_dfm() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144884,7 +144885,7 @@ void m68000_mcu_device::sub_b_dd_aips_dfm() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144905,7 +144906,7 @@ void m68000_mcu_device::sub_b_dd_aips_dfm() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144965,7 +144966,7 @@ void m68000_mcu_device::sub_b_dd_pais_dfm() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144986,7 +144987,7 @@ void m68000_mcu_device::sub_b_dd_pais_dfm() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145060,7 +145061,7 @@ void m68000_mcu_device::sub_b_dd_das_dfm() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145083,7 +145084,7 @@ void m68000_mcu_device::sub_b_dd_das_dfm() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145133,7 +145134,7 @@ void m68000_mcu_device::sub_b_dd_dais_dfm() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -145195,7 +145196,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145218,7 +145219,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145293,7 +145294,7 @@ void m68000_mcu_device::sub_b_dd_adr16_dfm() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145314,7 +145315,7 @@ void m68000_mcu_device::sub_b_dd_adr16_dfm() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145410,7 +145411,7 @@ void m68000_mcu_device::sub_b_dd_adr32_dfm() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145431,7 +145432,7 @@ void m68000_mcu_device::sub_b_dd_adr32_dfm() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145485,7 +145486,7 @@ void m68000_mcu_device::subx_w_ds_dd_dfm() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -145531,7 +145532,7 @@ void m68000_mcu_device::subx_w_pais_paid_dfm() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -145578,7 +145579,7 @@ void m68000_mcu_device::subx_w_pais_paid_dfm() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145635,7 +145636,7 @@ void m68000_mcu_device::sub_w_dd_ais_dfm() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145661,7 +145662,7 @@ void m68000_mcu_device::sub_w_dd_ais_dfm() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145724,7 +145725,7 @@ void m68000_mcu_device::sub_w_dd_aips_dfm() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -145748,7 +145749,7 @@ void m68000_mcu_device::sub_w_dd_aips_dfm() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145813,7 +145814,7 @@ void m68000_mcu_device::sub_w_dd_pais_dfm() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -145837,7 +145838,7 @@ void m68000_mcu_device::sub_w_dd_pais_dfm() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145916,7 +145917,7 @@ void m68000_mcu_device::sub_w_dd_das_dfm() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145942,7 +145943,7 @@ void m68000_mcu_device::sub_w_dd_das_dfm() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145997,7 +145998,7 @@ void m68000_mcu_device::sub_w_dd_dais_dfm() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146059,7 +146060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146085,7 +146086,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146165,7 +146166,7 @@ void m68000_mcu_device::sub_w_dd_adr16_dfm() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146189,7 +146190,7 @@ void m68000_mcu_device::sub_w_dd_adr16_dfm() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146290,7 +146291,7 @@ void m68000_mcu_device::sub_w_dd_adr32_dfm() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146314,7 +146315,7 @@ void m68000_mcu_device::sub_w_dd_adr32_dfm() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146373,7 +146374,7 @@ void m68000_mcu_device::subx_l_ds_dd_dfm() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -146397,7 +146398,7 @@ void m68000_mcu_device::subx_l_ds_dd_dfm() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -146448,7 +146449,7 @@ void m68000_mcu_device::subx_l_pais_paid_dfm() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -146495,7 +146496,7 @@ void m68000_mcu_device::subx_l_pais_paid_dfm() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -146539,7 +146540,7 @@ void m68000_mcu_device::subx_l_pais_paid_dfm() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146596,7 +146597,7 @@ void m68000_mcu_device::sub_l_dd_ais_dfm() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146643,7 +146644,7 @@ void m68000_mcu_device::sub_l_dd_ais_dfm() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146668,7 +146669,7 @@ void m68000_mcu_device::sub_l_dd_ais_dfm() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146723,7 +146724,7 @@ void m68000_mcu_device::sub_l_dd_aips_dfm() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -146773,7 +146774,7 @@ void m68000_mcu_device::sub_l_dd_aips_dfm() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146798,7 +146799,7 @@ void m68000_mcu_device::sub_l_dd_aips_dfm() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146852,7 +146853,7 @@ void m68000_mcu_device::sub_l_dd_pais_dfm() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -146904,7 +146905,7 @@ void m68000_mcu_device::sub_l_dd_pais_dfm() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146929,7 +146930,7 @@ void m68000_mcu_device::sub_l_dd_pais_dfm() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147005,7 +147006,7 @@ void m68000_mcu_device::sub_l_dd_das_dfm() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147052,7 +147053,7 @@ void m68000_mcu_device::sub_l_dd_das_dfm() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147077,7 +147078,7 @@ void m68000_mcu_device::sub_l_dd_das_dfm() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147130,7 +147131,7 @@ void m68000_mcu_device::sub_l_dd_dais_dfm() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -147191,7 +147192,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147238,7 +147239,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147263,7 +147264,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147341,7 +147342,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dfm() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147388,7 +147389,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dfm() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147413,7 +147414,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dfm() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147512,7 +147513,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dfm() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147559,7 +147560,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dfm() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147584,7 +147585,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dfm() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147641,7 +147642,7 @@ void m68000_mcu_device::suba_l_ds_ad_dfm() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147664,7 +147665,7 @@ void m68000_mcu_device::suba_l_ds_ad_dfm() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147689,7 +147690,7 @@ void m68000_mcu_device::suba_l_as_ad_dfm() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147712,7 +147713,7 @@ void m68000_mcu_device::suba_l_as_ad_dfm() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147735,7 +147736,7 @@ void m68000_mcu_device::suba_l_ais_ad_dfm() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147782,11 +147783,11 @@ void m68000_mcu_device::suba_l_ais_ad_dfm() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -147826,7 +147827,7 @@ void m68000_mcu_device::suba_l_aips_ad_dfm() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -147876,11 +147877,11 @@ void m68000_mcu_device::suba_l_aips_ad_dfm() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -147919,7 +147920,7 @@ void m68000_mcu_device::suba_l_pais_ad_dfm() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -147971,11 +147972,11 @@ void m68000_mcu_device::suba_l_pais_ad_dfm() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148036,7 +148037,7 @@ void m68000_mcu_device::suba_l_das_ad_dfm() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148083,11 +148084,11 @@ void m68000_mcu_device::suba_l_das_ad_dfm() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148125,7 +148126,7 @@ void m68000_mcu_device::suba_l_dais_ad_dfm() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148186,7 +148187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148233,11 +148234,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148300,7 +148301,7 @@ void m68000_mcu_device::suba_l_adr16_ad_dfm() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148347,11 +148348,11 @@ void m68000_mcu_device::suba_l_adr16_ad_dfm() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148435,7 +148436,7 @@ void m68000_mcu_device::suba_l_adr32_ad_dfm() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -148482,11 +148483,11 @@ void m68000_mcu_device::suba_l_adr32_ad_dfm() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148546,7 +148547,7 @@ void m68000_mcu_device::suba_l_dpc_ad_dfm() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148593,11 +148594,11 @@ void m68000_mcu_device::suba_l_dpc_ad_dfm() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148634,7 +148635,7 @@ void m68000_mcu_device::suba_l_dpci_ad_dfm() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148695,7 +148696,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148742,11 +148743,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -148832,7 +148833,7 @@ void m68000_mcu_device::suba_l_imm32_ad_dfm() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -148855,7 +148856,7 @@ void m68000_mcu_device::suba_l_imm32_ad_dfm() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -148880,7 +148881,7 @@ void m68000_mcu_device::cmp_b_ds_dd_dfm() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148919,7 +148920,7 @@ void m68000_mcu_device::cmp_b_ais_dd_dfm() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148942,7 +148943,7 @@ void m68000_mcu_device::cmp_b_ais_dd_dfm() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148987,7 +148988,7 @@ void m68000_mcu_device::cmp_b_aips_dd_dfm() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149008,7 +149009,7 @@ void m68000_mcu_device::cmp_b_aips_dd_dfm() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149055,7 +149056,7 @@ void m68000_mcu_device::cmp_b_pais_dd_dfm() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149076,7 +149077,7 @@ void m68000_mcu_device::cmp_b_pais_dd_dfm() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149137,7 +149138,7 @@ void m68000_mcu_device::cmp_b_das_dd_dfm() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149160,7 +149161,7 @@ void m68000_mcu_device::cmp_b_das_dd_dfm() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149197,7 +149198,7 @@ void m68000_mcu_device::cmp_b_dais_dd_dfm() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149259,7 +149260,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149282,7 +149283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149344,7 +149345,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_dfm() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149365,7 +149366,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_dfm() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149448,7 +149449,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_dfm() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149469,7 +149470,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_dfm() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149529,7 +149530,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_dfm() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149552,7 +149553,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_dfm() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149588,7 +149589,7 @@ void m68000_mcu_device::cmp_b_dpci_dd_dfm() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149650,7 +149651,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149673,7 +149674,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149737,7 +149738,7 @@ void m68000_mcu_device::cmp_b_imm8_dd_dfm() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149778,7 +149779,7 @@ void m68000_mcu_device::cmp_w_ds_dd_dfm() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149819,7 +149820,7 @@ void m68000_mcu_device::cmp_w_as_dd_dfm() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149858,7 +149859,7 @@ void m68000_mcu_device::cmp_w_ais_dd_dfm() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149884,7 +149885,7 @@ void m68000_mcu_device::cmp_w_ais_dd_dfm() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149929,7 +149930,7 @@ void m68000_mcu_device::cmp_w_aips_dd_dfm() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -149953,7 +149954,7 @@ void m68000_mcu_device::cmp_w_aips_dd_dfm() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150000,7 +150001,7 @@ void m68000_mcu_device::cmp_w_pais_dd_dfm() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150024,7 +150025,7 @@ void m68000_mcu_device::cmp_w_pais_dd_dfm() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150085,7 +150086,7 @@ void m68000_mcu_device::cmp_w_das_dd_dfm() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150111,7 +150112,7 @@ void m68000_mcu_device::cmp_w_das_dd_dfm() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150148,7 +150149,7 @@ void m68000_mcu_device::cmp_w_dais_dd_dfm() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150210,7 +150211,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150236,7 +150237,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150298,7 +150299,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_dfm() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150322,7 +150323,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_dfm() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150405,7 +150406,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_dfm() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150429,7 +150430,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_dfm() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150489,7 +150490,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_dfm() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150515,7 +150516,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_dfm() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150551,7 +150552,7 @@ void m68000_mcu_device::cmp_w_dpci_dd_dfm() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150613,7 +150614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150639,7 +150640,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150703,7 +150704,7 @@ void m68000_mcu_device::cmp_w_imm16_dd_dfm() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150744,11 +150745,11 @@ void m68000_mcu_device::cmp_l_ds_dd_dfm() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150790,11 +150791,11 @@ void m68000_mcu_device::cmp_l_as_dd_dfm() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150834,7 +150835,7 @@ void m68000_mcu_device::cmp_l_ais_dd_dfm() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150881,11 +150882,11 @@ void m68000_mcu_device::cmp_l_ais_dd_dfm() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150925,7 +150926,7 @@ void m68000_mcu_device::cmp_l_aips_dd_dfm() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150975,11 +150976,11 @@ void m68000_mcu_device::cmp_l_aips_dd_dfm() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151018,7 +151019,7 @@ void m68000_mcu_device::cmp_l_pais_dd_dfm() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -151070,11 +151071,11 @@ void m68000_mcu_device::cmp_l_pais_dd_dfm() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151135,7 +151136,7 @@ void m68000_mcu_device::cmp_l_das_dd_dfm() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151182,11 +151183,11 @@ void m68000_mcu_device::cmp_l_das_dd_dfm() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151224,7 +151225,7 @@ void m68000_mcu_device::cmp_l_dais_dd_dfm() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151285,7 +151286,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151332,11 +151333,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151399,7 +151400,7 @@ void m68000_mcu_device::cmp_l_adr16_dd_dfm() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151446,11 +151447,11 @@ void m68000_mcu_device::cmp_l_adr16_dd_dfm() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151534,7 +151535,7 @@ void m68000_mcu_device::cmp_l_adr32_dd_dfm() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151581,11 +151582,11 @@ void m68000_mcu_device::cmp_l_adr32_dd_dfm() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151645,7 +151646,7 @@ void m68000_mcu_device::cmp_l_dpc_dd_dfm() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151692,11 +151693,11 @@ void m68000_mcu_device::cmp_l_dpc_dd_dfm() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151733,7 +151734,7 @@ void m68000_mcu_device::cmp_l_dpci_dd_dfm() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151794,7 +151795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151841,11 +151842,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151931,11 +151932,11 @@ void m68000_mcu_device::cmp_l_imm32_dd_dfm() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151977,11 +151978,11 @@ void m68000_mcu_device::cmpa_w_ds_ad_dfm() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152023,11 +152024,11 @@ void m68000_mcu_device::cmpa_w_as_ad_dfm() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152067,7 +152068,7 @@ void m68000_mcu_device::cmpa_w_ais_ad_dfm() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152093,11 +152094,11 @@ void m68000_mcu_device::cmpa_w_ais_ad_dfm() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152143,7 +152144,7 @@ void m68000_mcu_device::cmpa_w_aips_ad_dfm() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152167,11 +152168,11 @@ void m68000_mcu_device::cmpa_w_aips_ad_dfm() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152219,7 +152220,7 @@ void m68000_mcu_device::cmpa_w_pais_ad_dfm() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152243,11 +152244,11 @@ void m68000_mcu_device::cmpa_w_pais_ad_dfm() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152309,7 +152310,7 @@ void m68000_mcu_device::cmpa_w_das_ad_dfm() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152335,11 +152336,11 @@ void m68000_mcu_device::cmpa_w_das_ad_dfm() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152377,7 +152378,7 @@ void m68000_mcu_device::cmpa_w_dais_ad_dfm() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152439,7 +152440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152465,11 +152466,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152532,7 +152533,7 @@ void m68000_mcu_device::cmpa_w_adr16_ad_dfm() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152556,11 +152557,11 @@ void m68000_mcu_device::cmpa_w_adr16_ad_dfm() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152644,7 +152645,7 @@ void m68000_mcu_device::cmpa_w_adr32_ad_dfm() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152668,11 +152669,11 @@ void m68000_mcu_device::cmpa_w_adr32_ad_dfm() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152733,7 +152734,7 @@ void m68000_mcu_device::cmpa_w_dpc_ad_dfm() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152759,11 +152760,11 @@ void m68000_mcu_device::cmpa_w_dpc_ad_dfm() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152800,7 +152801,7 @@ void m68000_mcu_device::cmpa_w_dpci_ad_dfm() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152862,7 +152863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152888,11 +152889,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152957,11 +152958,11 @@ void m68000_mcu_device::cmpa_w_imm16_ad_dfm() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153002,7 +153003,7 @@ void m68000_mcu_device::eor_b_dd_ds_dfm() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153010,7 +153011,7 @@ void m68000_mcu_device::eor_b_dd_ds_dfm() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153066,7 +153067,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_dfm() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153088,7 +153089,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_dfm() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153123,11 +153124,11 @@ void m68000_mcu_device::eor_b_dd_ais_dfm() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153147,7 +153148,7 @@ void m68000_mcu_device::eor_b_dd_ais_dfm() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153174,7 +153175,7 @@ void m68000_mcu_device::eor_b_dd_ais_dfm() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153203,12 +153204,12 @@ void m68000_mcu_device::eor_b_dd_aips_dfm() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153229,7 +153230,7 @@ void m68000_mcu_device::eor_b_dd_aips_dfm() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153256,7 +153257,7 @@ void m68000_mcu_device::eor_b_dd_aips_dfm() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153284,7 +153285,7 @@ void m68000_mcu_device::eor_b_dd_pais_dfm() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153292,7 +153293,7 @@ void m68000_mcu_device::eor_b_dd_pais_dfm() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153313,7 +153314,7 @@ void m68000_mcu_device::eor_b_dd_pais_dfm() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153340,7 +153341,7 @@ void m68000_mcu_device::eor_b_dd_pais_dfm() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153366,7 +153367,7 @@ void m68000_mcu_device::eor_b_dd_das_dfm() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153389,11 +153390,11 @@ void m68000_mcu_device::eor_b_dd_das_dfm() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153413,7 +153414,7 @@ void m68000_mcu_device::eor_b_dd_das_dfm() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153440,7 +153441,7 @@ void m68000_mcu_device::eor_b_dd_das_dfm() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153464,14 +153465,14 @@ void m68000_mcu_device::eor_b_dd_dais_dfm() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153479,7 +153480,7 @@ void m68000_mcu_device::eor_b_dd_dais_dfm() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153503,7 +153504,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153529,11 +153530,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153553,7 +153554,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153580,7 +153581,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153608,7 +153609,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dfm() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -153631,7 +153632,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dfm() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153652,7 +153653,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dfm() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153679,7 +153680,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dfm() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153705,7 +153706,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dfm() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153729,7 +153730,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dfm() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -153752,7 +153753,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dfm() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153773,7 +153774,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dfm() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153800,7 +153801,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dfm() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153827,7 +153828,7 @@ void m68000_mcu_device::eor_w_dd_ds_dfm() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153835,7 +153836,7 @@ void m68000_mcu_device::eor_w_dd_ds_dfm() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153894,7 +153895,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_dfm() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -153919,7 +153920,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_dfm() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153954,11 +153955,11 @@ void m68000_mcu_device::eor_w_dd_ais_dfm() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -153981,7 +153982,7 @@ void m68000_mcu_device::eor_w_dd_ais_dfm() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154008,7 +154009,7 @@ void m68000_mcu_device::eor_w_dd_ais_dfm() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154042,12 +154043,12 @@ void m68000_mcu_device::eor_w_dd_aips_dfm() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154071,7 +154072,7 @@ void m68000_mcu_device::eor_w_dd_aips_dfm() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154098,7 +154099,7 @@ void m68000_mcu_device::eor_w_dd_aips_dfm() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154131,7 +154132,7 @@ void m68000_mcu_device::eor_w_dd_pais_dfm() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -154139,7 +154140,7 @@ void m68000_mcu_device::eor_w_dd_pais_dfm() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154163,7 +154164,7 @@ void m68000_mcu_device::eor_w_dd_pais_dfm() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154190,7 +154191,7 @@ void m68000_mcu_device::eor_w_dd_pais_dfm() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154221,7 +154222,7 @@ void m68000_mcu_device::eor_w_dd_das_dfm() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154244,11 +154245,11 @@ void m68000_mcu_device::eor_w_dd_das_dfm() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154271,7 +154272,7 @@ void m68000_mcu_device::eor_w_dd_das_dfm() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154298,7 +154299,7 @@ void m68000_mcu_device::eor_w_dd_das_dfm() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154327,14 +154328,14 @@ void m68000_mcu_device::eor_w_dd_dais_dfm() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -154342,7 +154343,7 @@ void m68000_mcu_device::eor_w_dd_dais_dfm() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154366,7 +154367,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154392,11 +154393,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154419,7 +154420,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154446,7 +154447,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154479,7 +154480,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dfm() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -154502,7 +154503,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dfm() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154526,7 +154527,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dfm() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154553,7 +154554,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dfm() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154584,7 +154585,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dfm() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154608,7 +154609,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dfm() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -154631,7 +154632,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dfm() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154655,7 +154656,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dfm() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154682,7 +154683,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dfm() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -154714,12 +154715,12 @@ void m68000_mcu_device::eor_l_dd_ds_dfm() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154739,7 +154740,7 @@ void m68000_mcu_device::eor_l_dd_ds_dfm() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -154748,7 +154749,7 @@ void m68000_mcu_device::eor_l_dd_ds_dfm() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154811,7 +154812,7 @@ void m68000_mcu_device::cmpm_l_aips_aipd_dfm() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154855,13 +154856,13 @@ void m68000_mcu_device::cmpm_l_aips_aipd_dfm() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154896,7 +154897,7 @@ void m68000_mcu_device::eor_l_dd_ais_dfm() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -154921,7 +154922,7 @@ void m68000_mcu_device::eor_l_dd_ais_dfm() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -154944,7 +154945,7 @@ void m68000_mcu_device::eor_l_dd_ais_dfm() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154969,7 +154970,7 @@ void m68000_mcu_device::eor_l_dd_ais_dfm() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -154994,7 +154995,7 @@ void m68000_mcu_device::eor_l_dd_ais_dfm() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155025,7 +155026,7 @@ void m68000_mcu_device::eor_l_dd_aips_dfm() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155050,11 +155051,11 @@ void m68000_mcu_device::eor_l_dd_aips_dfm() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155077,7 +155078,7 @@ void m68000_mcu_device::eor_l_dd_aips_dfm() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155102,7 +155103,7 @@ void m68000_mcu_device::eor_l_dd_aips_dfm() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155127,7 +155128,7 @@ void m68000_mcu_device::eor_l_dd_aips_dfm() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155157,14 +155158,14 @@ void m68000_mcu_device::eor_l_dd_pais_dfm() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155188,7 +155189,7 @@ void m68000_mcu_device::eor_l_dd_pais_dfm() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155211,7 +155212,7 @@ void m68000_mcu_device::eor_l_dd_pais_dfm() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155236,7 +155237,7 @@ void m68000_mcu_device::eor_l_dd_pais_dfm() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155261,7 +155262,7 @@ void m68000_mcu_device::eor_l_dd_pais_dfm() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155292,7 +155293,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155314,7 +155315,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155339,7 +155340,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155362,7 +155363,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155387,7 +155388,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155412,7 +155413,7 @@ void m68000_mcu_device::eor_l_dd_das_dfm() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155441,14 +155442,14 @@ void m68000_mcu_device::eor_l_dd_dais_dfm() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -155456,7 +155457,7 @@ void m68000_mcu_device::eor_l_dd_dais_dfm() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155480,7 +155481,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155505,7 +155506,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155530,7 +155531,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155553,7 +155554,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155578,7 +155579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155603,7 +155604,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155636,7 +155637,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -155659,7 +155660,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155684,7 +155685,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155707,7 +155708,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155732,7 +155733,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155757,7 +155758,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dfm() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155788,7 +155789,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155812,7 +155813,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -155835,7 +155836,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -155860,7 +155861,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -155883,7 +155884,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155908,7 +155909,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155933,7 +155934,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dfm() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -155966,11 +155967,11 @@ void m68000_mcu_device::cmpa_l_ds_ad_dfm() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156012,11 +156013,11 @@ void m68000_mcu_device::cmpa_l_as_ad_dfm() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156056,7 +156057,7 @@ void m68000_mcu_device::cmpa_l_ais_ad_dfm() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156103,11 +156104,11 @@ void m68000_mcu_device::cmpa_l_ais_ad_dfm() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156147,7 +156148,7 @@ void m68000_mcu_device::cmpa_l_aips_ad_dfm() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156197,11 +156198,11 @@ void m68000_mcu_device::cmpa_l_aips_ad_dfm() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156240,7 +156241,7 @@ void m68000_mcu_device::cmpa_l_pais_ad_dfm() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -156292,11 +156293,11 @@ void m68000_mcu_device::cmpa_l_pais_ad_dfm() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156357,7 +156358,7 @@ void m68000_mcu_device::cmpa_l_das_ad_dfm() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156404,11 +156405,11 @@ void m68000_mcu_device::cmpa_l_das_ad_dfm() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156446,7 +156447,7 @@ void m68000_mcu_device::cmpa_l_dais_ad_dfm() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -156507,7 +156508,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156554,11 +156555,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156621,7 +156622,7 @@ void m68000_mcu_device::cmpa_l_adr16_ad_dfm() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156668,11 +156669,11 @@ void m68000_mcu_device::cmpa_l_adr16_ad_dfm() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156756,7 +156757,7 @@ void m68000_mcu_device::cmpa_l_adr32_ad_dfm() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -156803,11 +156804,11 @@ void m68000_mcu_device::cmpa_l_adr32_ad_dfm() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156867,7 +156868,7 @@ void m68000_mcu_device::cmpa_l_dpc_ad_dfm() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -156914,11 +156915,11 @@ void m68000_mcu_device::cmpa_l_dpc_ad_dfm() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156955,7 +156956,7 @@ void m68000_mcu_device::cmpa_l_dpci_ad_dfm() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -157016,7 +157017,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157063,11 +157064,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157153,11 +157154,11 @@ void m68000_mcu_device::cmpa_l_imm32_ad_dfm() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157199,7 +157200,7 @@ void m68000_mcu_device::and_b_ds_dd_dfm() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157207,7 +157208,7 @@ void m68000_mcu_device::and_b_ds_dd_dfm() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157240,11 +157241,11 @@ void m68000_mcu_device::and_b_ais_dd_dfm() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157264,7 +157265,7 @@ void m68000_mcu_device::and_b_ais_dd_dfm() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157272,7 +157273,7 @@ void m68000_mcu_device::and_b_ais_dd_dfm() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157308,12 +157309,12 @@ void m68000_mcu_device::and_b_aips_dd_dfm() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157334,7 +157335,7 @@ void m68000_mcu_device::and_b_aips_dd_dfm() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157342,7 +157343,7 @@ void m68000_mcu_device::and_b_aips_dd_dfm() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157377,7 +157378,7 @@ void m68000_mcu_device::and_b_pais_dd_dfm() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157385,7 +157386,7 @@ void m68000_mcu_device::and_b_pais_dd_dfm() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157406,7 +157407,7 @@ void m68000_mcu_device::and_b_pais_dd_dfm() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157414,7 +157415,7 @@ void m68000_mcu_device::and_b_pais_dd_dfm() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157447,7 +157448,7 @@ void m68000_mcu_device::and_b_das_dd_dfm() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157470,11 +157471,11 @@ void m68000_mcu_device::and_b_das_dd_dfm() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157494,7 +157495,7 @@ void m68000_mcu_device::and_b_das_dd_dfm() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157502,7 +157503,7 @@ void m68000_mcu_device::and_b_das_dd_dfm() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157533,14 +157534,14 @@ void m68000_mcu_device::and_b_dais_dd_dfm() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157548,7 +157549,7 @@ void m68000_mcu_device::and_b_dais_dd_dfm() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157572,7 +157573,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157598,11 +157599,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157622,7 +157623,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157630,7 +157631,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157665,7 +157666,7 @@ void m68000_mcu_device::and_b_adr16_dd_dfm() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157688,7 +157689,7 @@ void m68000_mcu_device::and_b_adr16_dd_dfm() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157709,7 +157710,7 @@ void m68000_mcu_device::and_b_adr16_dd_dfm() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157717,7 +157718,7 @@ void m68000_mcu_device::and_b_adr16_dd_dfm() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157750,7 +157751,7 @@ void m68000_mcu_device::and_b_adr32_dd_dfm() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157774,7 +157775,7 @@ void m68000_mcu_device::and_b_adr32_dd_dfm() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -157797,7 +157798,7 @@ void m68000_mcu_device::and_b_adr32_dd_dfm() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157818,7 +157819,7 @@ void m68000_mcu_device::and_b_adr32_dd_dfm() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157826,7 +157827,7 @@ void m68000_mcu_device::and_b_adr32_dd_dfm() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157858,7 +157859,7 @@ void m68000_mcu_device::and_b_dpc_dd_dfm() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157881,11 +157882,11 @@ void m68000_mcu_device::and_b_dpc_dd_dfm() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157905,7 +157906,7 @@ void m68000_mcu_device::and_b_dpc_dd_dfm() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157913,7 +157914,7 @@ void m68000_mcu_device::and_b_dpc_dd_dfm() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157943,14 +157944,14 @@ void m68000_mcu_device::and_b_dpci_dd_dfm() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157958,7 +157959,7 @@ void m68000_mcu_device::and_b_dpci_dd_dfm() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -157982,7 +157983,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158008,11 +158009,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -158032,7 +158033,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158040,7 +158041,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158075,7 +158076,7 @@ void m68000_mcu_device::and_b_imm8_dd_dfm() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158099,7 +158100,7 @@ void m68000_mcu_device::and_b_imm8_dd_dfm() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158107,7 +158108,7 @@ void m68000_mcu_device::and_b_imm8_dd_dfm() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158142,7 +158143,7 @@ void m68000_mcu_device::and_w_ds_dd_dfm() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158150,7 +158151,7 @@ void m68000_mcu_device::and_w_ds_dd_dfm() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158183,11 +158184,11 @@ void m68000_mcu_device::and_w_ais_dd_dfm() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158210,7 +158211,7 @@ void m68000_mcu_device::and_w_ais_dd_dfm() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158218,7 +158219,7 @@ void m68000_mcu_device::and_w_ais_dd_dfm() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158254,12 +158255,12 @@ void m68000_mcu_device::and_w_aips_dd_dfm() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158283,7 +158284,7 @@ void m68000_mcu_device::and_w_aips_dd_dfm() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158291,7 +158292,7 @@ void m68000_mcu_device::and_w_aips_dd_dfm() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158326,7 +158327,7 @@ void m68000_mcu_device::and_w_pais_dd_dfm() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158334,7 +158335,7 @@ void m68000_mcu_device::and_w_pais_dd_dfm() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158358,7 +158359,7 @@ void m68000_mcu_device::and_w_pais_dd_dfm() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158366,7 +158367,7 @@ void m68000_mcu_device::and_w_pais_dd_dfm() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158399,7 +158400,7 @@ void m68000_mcu_device::and_w_das_dd_dfm() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158422,11 +158423,11 @@ void m68000_mcu_device::and_w_das_dd_dfm() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158449,7 +158450,7 @@ void m68000_mcu_device::and_w_das_dd_dfm() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158457,7 +158458,7 @@ void m68000_mcu_device::and_w_das_dd_dfm() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158488,14 +158489,14 @@ void m68000_mcu_device::and_w_dais_dd_dfm() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158503,7 +158504,7 @@ void m68000_mcu_device::and_w_dais_dd_dfm() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158527,7 +158528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158553,11 +158554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158580,7 +158581,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158588,7 +158589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158623,7 +158624,7 @@ void m68000_mcu_device::and_w_adr16_dd_dfm() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -158646,7 +158647,7 @@ void m68000_mcu_device::and_w_adr16_dd_dfm() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158670,7 +158671,7 @@ void m68000_mcu_device::and_w_adr16_dd_dfm() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158678,7 +158679,7 @@ void m68000_mcu_device::and_w_adr16_dd_dfm() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158711,7 +158712,7 @@ void m68000_mcu_device::and_w_adr32_dd_dfm() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158735,7 +158736,7 @@ void m68000_mcu_device::and_w_adr32_dd_dfm() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -158758,7 +158759,7 @@ void m68000_mcu_device::and_w_adr32_dd_dfm() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -158782,7 +158783,7 @@ void m68000_mcu_device::and_w_adr32_dd_dfm() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158790,7 +158791,7 @@ void m68000_mcu_device::and_w_adr32_dd_dfm() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158822,7 +158823,7 @@ void m68000_mcu_device::and_w_dpc_dd_dfm() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158845,11 +158846,11 @@ void m68000_mcu_device::and_w_dpc_dd_dfm() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158872,7 +158873,7 @@ void m68000_mcu_device::and_w_dpc_dd_dfm() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158880,7 +158881,7 @@ void m68000_mcu_device::and_w_dpc_dd_dfm() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158910,14 +158911,14 @@ void m68000_mcu_device::and_w_dpci_dd_dfm() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158925,7 +158926,7 @@ void m68000_mcu_device::and_w_dpci_dd_dfm() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158949,7 +158950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -158975,11 +158976,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159002,7 +159003,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159010,7 +159011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159045,7 +159046,7 @@ void m68000_mcu_device::and_w_imm16_dd_dfm() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159069,7 +159070,7 @@ void m68000_mcu_device::and_w_imm16_dd_dfm() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159077,7 +159078,7 @@ void m68000_mcu_device::and_w_imm16_dd_dfm() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159112,12 +159113,12 @@ void m68000_mcu_device::and_l_ds_dd_dfm() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159137,7 +159138,7 @@ void m68000_mcu_device::and_l_ds_dd_dfm() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -159146,7 +159147,7 @@ void m68000_mcu_device::and_l_ds_dd_dfm() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159162,7 +159163,7 @@ void m68000_mcu_device::and_l_ais_dd_dfm() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159187,7 +159188,7 @@ void m68000_mcu_device::and_l_ais_dd_dfm() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159210,12 +159211,12 @@ void m68000_mcu_device::and_l_ais_dd_dfm() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159241,7 +159242,7 @@ void m68000_mcu_device::and_l_ais_dd_dfm() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159257,7 +159258,7 @@ void m68000_mcu_device::and_l_aips_dd_dfm() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159282,11 +159283,11 @@ void m68000_mcu_device::and_l_aips_dd_dfm() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159309,12 +159310,12 @@ void m68000_mcu_device::and_l_aips_dd_dfm() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159340,7 +159341,7 @@ void m68000_mcu_device::and_l_aips_dd_dfm() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159355,14 +159356,14 @@ void m68000_mcu_device::and_l_pais_dd_dfm() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159386,7 +159387,7 @@ void m68000_mcu_device::and_l_pais_dd_dfm() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159409,12 +159410,12 @@ void m68000_mcu_device::and_l_pais_dd_dfm() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159440,7 +159441,7 @@ void m68000_mcu_device::and_l_pais_dd_dfm() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159456,7 +159457,7 @@ void m68000_mcu_device::and_l_das_dd_dfm() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159478,7 +159479,7 @@ void m68000_mcu_device::and_l_das_dd_dfm() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159503,7 +159504,7 @@ void m68000_mcu_device::and_l_das_dd_dfm() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159526,12 +159527,12 @@ void m68000_mcu_device::and_l_das_dd_dfm() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159557,7 +159558,7 @@ void m68000_mcu_device::and_l_das_dd_dfm() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159571,14 +159572,14 @@ void m68000_mcu_device::and_l_dais_dd_dfm() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -159586,7 +159587,7 @@ void m68000_mcu_device::and_l_dais_dd_dfm() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159610,7 +159611,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159635,7 +159636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159660,7 +159661,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159683,12 +159684,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159714,7 +159715,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159732,7 +159733,7 @@ void m68000_mcu_device::and_l_adr16_dd_dfm() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -159755,7 +159756,7 @@ void m68000_mcu_device::and_l_adr16_dd_dfm() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159780,7 +159781,7 @@ void m68000_mcu_device::and_l_adr16_dd_dfm() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159803,12 +159804,12 @@ void m68000_mcu_device::and_l_adr16_dd_dfm() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159834,7 +159835,7 @@ void m68000_mcu_device::and_l_adr16_dd_dfm() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159850,7 +159851,7 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159874,7 +159875,7 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -159897,7 +159898,7 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -159922,7 +159923,7 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -159945,12 +159946,12 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159976,7 +159977,7 @@ void m68000_mcu_device::and_l_adr32_dd_dfm() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159991,7 +159992,7 @@ void m68000_mcu_device::and_l_dpc_dd_dfm() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160013,7 +160014,7 @@ void m68000_mcu_device::and_l_dpc_dd_dfm() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -160038,7 +160039,7 @@ void m68000_mcu_device::and_l_dpc_dd_dfm() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160061,12 +160062,12 @@ void m68000_mcu_device::and_l_dpc_dd_dfm() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160092,7 +160093,7 @@ void m68000_mcu_device::and_l_dpc_dd_dfm() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160105,14 +160106,14 @@ void m68000_mcu_device::and_l_dpci_dd_dfm() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -160120,7 +160121,7 @@ void m68000_mcu_device::and_l_dpci_dd_dfm() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160144,7 +160145,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160169,7 +160170,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -160194,7 +160195,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160217,12 +160218,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160248,7 +160249,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160264,7 +160265,7 @@ void m68000_mcu_device::and_l_imm32_dd_dfm() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160288,7 +160289,7 @@ void m68000_mcu_device::and_l_imm32_dd_dfm() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160312,12 +160313,12 @@ void m68000_mcu_device::and_l_imm32_dd_dfm() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -160337,7 +160338,7 @@ void m68000_mcu_device::and_l_imm32_dd_dfm() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -160346,7 +160347,7 @@ void m68000_mcu_device::and_l_imm32_dd_dfm() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160366,7 +160367,7 @@ void m68000_mcu_device::mulu_w_ds_dd_dfm() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160399,7 +160400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160411,7 +160412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160423,7 +160424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160441,7 +160442,7 @@ void m68000_mcu_device::mulu_w_ais_dd_dfm() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160469,7 +160470,7 @@ void m68000_mcu_device::mulu_w_ais_dd_dfm() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160502,7 +160503,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160514,7 +160515,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160526,7 +160527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160550,7 +160551,7 @@ void m68000_mcu_device::mulu_w_aips_dd_dfm() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -160576,7 +160577,7 @@ void m68000_mcu_device::mulu_w_aips_dd_dfm() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160609,7 +160610,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160621,7 +160622,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160633,7 +160634,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160659,7 +160660,7 @@ void m68000_mcu_device::mulu_w_pais_dd_dfm() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -160685,7 +160686,7 @@ void m68000_mcu_device::mulu_w_pais_dd_dfm() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160718,7 +160719,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160730,7 +160731,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160742,7 +160743,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160782,7 +160783,7 @@ void m68000_mcu_device::mulu_w_das_dd_dfm() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160810,7 +160811,7 @@ void m68000_mcu_device::mulu_w_das_dd_dfm() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160843,7 +160844,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160855,7 +160856,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160867,7 +160868,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160883,7 +160884,7 @@ void m68000_mcu_device::mulu_w_dais_dd_dfm() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160945,7 +160946,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160973,7 +160974,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161006,7 +161007,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161018,7 +161019,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161030,7 +161031,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161071,7 +161072,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_dfm() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -161097,7 +161098,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_dfm() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161130,7 +161131,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161142,7 +161143,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161154,7 +161155,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161216,7 +161217,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_dfm() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -161242,7 +161243,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_dfm() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161275,7 +161276,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161287,7 +161288,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161299,7 +161300,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161338,7 +161339,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_dfm() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161366,7 +161367,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_dfm() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161399,7 +161400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161411,7 +161412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161423,7 +161424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161438,7 +161439,7 @@ void m68000_mcu_device::mulu_w_dpci_dd_dfm() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -161500,7 +161501,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161528,7 +161529,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161561,7 +161562,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161573,7 +161574,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161585,7 +161586,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161630,7 +161631,7 @@ void m68000_mcu_device::mulu_w_imm16_dd_dfm() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161663,7 +161664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161675,7 +161676,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161687,7 +161688,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161707,12 +161708,12 @@ void m68000_mcu_device::abcd_ds_dd_dfm() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -161757,7 +161758,7 @@ void m68000_mcu_device::abcd_pais_paid_dfm() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -161797,12 +161798,12 @@ void m68000_mcu_device::abcd_pais_paid_dfm() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -161852,11 +161853,11 @@ void m68000_mcu_device::and_b_dd_ais_dfm() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -161876,7 +161877,7 @@ void m68000_mcu_device::and_b_dd_ais_dfm() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161903,7 +161904,7 @@ void m68000_mcu_device::and_b_dd_ais_dfm() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -161932,12 +161933,12 @@ void m68000_mcu_device::and_b_dd_aips_dfm() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -161958,7 +161959,7 @@ void m68000_mcu_device::and_b_dd_aips_dfm() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161985,7 +161986,7 @@ void m68000_mcu_device::and_b_dd_aips_dfm() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162013,7 +162014,7 @@ void m68000_mcu_device::and_b_dd_pais_dfm() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162021,7 +162022,7 @@ void m68000_mcu_device::and_b_dd_pais_dfm() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162042,7 +162043,7 @@ void m68000_mcu_device::and_b_dd_pais_dfm() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162069,7 +162070,7 @@ void m68000_mcu_device::and_b_dd_pais_dfm() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162095,7 +162096,7 @@ void m68000_mcu_device::and_b_dd_das_dfm() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162118,11 +162119,11 @@ void m68000_mcu_device::and_b_dd_das_dfm() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162142,7 +162143,7 @@ void m68000_mcu_device::and_b_dd_das_dfm() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162169,7 +162170,7 @@ void m68000_mcu_device::and_b_dd_das_dfm() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162193,14 +162194,14 @@ void m68000_mcu_device::and_b_dd_dais_dfm() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162208,7 +162209,7 @@ void m68000_mcu_device::and_b_dd_dais_dfm() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162232,7 +162233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162258,11 +162259,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162282,7 +162283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162309,7 +162310,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162337,7 +162338,7 @@ void m68000_mcu_device::and_b_dd_adr16_dfm() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -162360,7 +162361,7 @@ void m68000_mcu_device::and_b_dd_adr16_dfm() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162381,7 +162382,7 @@ void m68000_mcu_device::and_b_dd_adr16_dfm() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162408,7 +162409,7 @@ void m68000_mcu_device::and_b_dd_adr16_dfm() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162434,7 +162435,7 @@ void m68000_mcu_device::and_b_dd_adr32_dfm() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162458,7 +162459,7 @@ void m68000_mcu_device::and_b_dd_adr32_dfm() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -162481,7 +162482,7 @@ void m68000_mcu_device::and_b_dd_adr32_dfm() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162502,7 +162503,7 @@ void m68000_mcu_device::and_b_dd_adr32_dfm() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162529,7 +162530,7 @@ void m68000_mcu_device::and_b_dd_adr32_dfm() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162643,11 +162644,11 @@ void m68000_mcu_device::and_w_dd_ais_dfm() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162670,7 +162671,7 @@ void m68000_mcu_device::and_w_dd_ais_dfm() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162697,7 +162698,7 @@ void m68000_mcu_device::and_w_dd_ais_dfm() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162731,12 +162732,12 @@ void m68000_mcu_device::and_w_dd_aips_dfm() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -162760,7 +162761,7 @@ void m68000_mcu_device::and_w_dd_aips_dfm() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162787,7 +162788,7 @@ void m68000_mcu_device::and_w_dd_aips_dfm() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162820,7 +162821,7 @@ void m68000_mcu_device::and_w_dd_pais_dfm() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162828,7 +162829,7 @@ void m68000_mcu_device::and_w_dd_pais_dfm() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -162852,7 +162853,7 @@ void m68000_mcu_device::and_w_dd_pais_dfm() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162879,7 +162880,7 @@ void m68000_mcu_device::and_w_dd_pais_dfm() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -162910,7 +162911,7 @@ void m68000_mcu_device::and_w_dd_das_dfm() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162933,11 +162934,11 @@ void m68000_mcu_device::and_w_dd_das_dfm() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -162960,7 +162961,7 @@ void m68000_mcu_device::and_w_dd_das_dfm() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162987,7 +162988,7 @@ void m68000_mcu_device::and_w_dd_das_dfm() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163016,14 +163017,14 @@ void m68000_mcu_device::and_w_dd_dais_dfm() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163031,7 +163032,7 @@ void m68000_mcu_device::and_w_dd_dais_dfm() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163055,7 +163056,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163081,11 +163082,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163108,7 +163109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163135,7 +163136,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163168,7 +163169,7 @@ void m68000_mcu_device::and_w_dd_adr16_dfm() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -163191,7 +163192,7 @@ void m68000_mcu_device::and_w_dd_adr16_dfm() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163215,7 +163216,7 @@ void m68000_mcu_device::and_w_dd_adr16_dfm() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163242,7 +163243,7 @@ void m68000_mcu_device::and_w_dd_adr16_dfm() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163273,7 +163274,7 @@ void m68000_mcu_device::and_w_dd_adr32_dfm() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163297,7 +163298,7 @@ void m68000_mcu_device::and_w_dd_adr32_dfm() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -163320,7 +163321,7 @@ void m68000_mcu_device::and_w_dd_adr32_dfm() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163344,7 +163345,7 @@ void m68000_mcu_device::and_w_dd_adr32_dfm() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163371,7 +163372,7 @@ void m68000_mcu_device::and_w_dd_adr32_dfm() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163446,7 +163447,7 @@ void m68000_mcu_device::and_l_dd_ais_dfm() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163471,7 +163472,7 @@ void m68000_mcu_device::and_l_dd_ais_dfm() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163494,7 +163495,7 @@ void m68000_mcu_device::and_l_dd_ais_dfm() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163519,7 +163520,7 @@ void m68000_mcu_device::and_l_dd_ais_dfm() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163544,7 +163545,7 @@ void m68000_mcu_device::and_l_dd_ais_dfm() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163575,7 +163576,7 @@ void m68000_mcu_device::and_l_dd_aips_dfm() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163600,11 +163601,11 @@ void m68000_mcu_device::and_l_dd_aips_dfm() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163627,7 +163628,7 @@ void m68000_mcu_device::and_l_dd_aips_dfm() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163652,7 +163653,7 @@ void m68000_mcu_device::and_l_dd_aips_dfm() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163677,7 +163678,7 @@ void m68000_mcu_device::and_l_dd_aips_dfm() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163707,14 +163708,14 @@ void m68000_mcu_device::and_l_dd_pais_dfm() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163738,7 +163739,7 @@ void m68000_mcu_device::and_l_dd_pais_dfm() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163761,7 +163762,7 @@ void m68000_mcu_device::and_l_dd_pais_dfm() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163786,7 +163787,7 @@ void m68000_mcu_device::and_l_dd_pais_dfm() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163811,7 +163812,7 @@ void m68000_mcu_device::and_l_dd_pais_dfm() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163842,7 +163843,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163864,7 +163865,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -163889,7 +163890,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -163912,7 +163913,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163937,7 +163938,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163962,7 +163963,7 @@ void m68000_mcu_device::and_l_dd_das_dfm() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -163991,14 +163992,14 @@ void m68000_mcu_device::and_l_dd_dais_dfm() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164006,7 +164007,7 @@ void m68000_mcu_device::and_l_dd_dais_dfm() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164030,7 +164031,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164055,7 +164056,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164080,7 +164081,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164103,7 +164104,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164128,7 +164129,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164153,7 +164154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164186,7 +164187,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -164209,7 +164210,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164234,7 +164235,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164257,7 +164258,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164282,7 +164283,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164307,7 +164308,7 @@ void m68000_mcu_device::and_l_dd_adr16_dfm() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164338,7 +164339,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164362,7 +164363,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -164385,7 +164386,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164410,7 +164411,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -164433,7 +164434,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164458,7 +164459,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164483,7 +164484,7 @@ void m68000_mcu_device::and_l_dd_adr32_dfm() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -164518,7 +164519,7 @@ void m68000_mcu_device::muls_w_ds_dd_dfm() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164551,7 +164552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164565,7 +164566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164577,7 +164578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164588,7 +164589,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164602,7 +164603,7 @@ void m68000_mcu_device::muls_w_ais_dd_dfm() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164630,7 +164631,7 @@ void m68000_mcu_device::muls_w_ais_dd_dfm() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164663,7 +164664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164677,7 +164678,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164689,7 +164690,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164700,7 +164701,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164720,7 +164721,7 @@ void m68000_mcu_device::muls_w_aips_dd_dfm() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164746,7 +164747,7 @@ void m68000_mcu_device::muls_w_aips_dd_dfm() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164779,7 +164780,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164793,7 +164794,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164805,7 +164806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164816,7 +164817,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164838,7 +164839,7 @@ void m68000_mcu_device::muls_w_pais_dd_dfm() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -164864,7 +164865,7 @@ void m68000_mcu_device::muls_w_pais_dd_dfm() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164897,7 +164898,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164911,7 +164912,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164923,7 +164924,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164934,7 +164935,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164970,7 +164971,7 @@ void m68000_mcu_device::muls_w_das_dd_dfm() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164998,7 +164999,7 @@ void m68000_mcu_device::muls_w_das_dd_dfm() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165031,7 +165032,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165045,7 +165046,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165057,7 +165058,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165068,7 +165069,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165080,7 +165081,7 @@ void m68000_mcu_device::muls_w_dais_dd_dfm() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165142,7 +165143,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165170,7 +165171,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165203,7 +165204,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165217,7 +165218,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165229,7 +165230,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165240,7 +165241,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165277,7 +165278,7 @@ void m68000_mcu_device::muls_w_adr16_dd_dfm() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -165303,7 +165304,7 @@ void m68000_mcu_device::muls_w_adr16_dd_dfm() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165336,7 +165337,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165350,7 +165351,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165362,7 +165363,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165373,7 +165374,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165431,7 +165432,7 @@ void m68000_mcu_device::muls_w_adr32_dd_dfm() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -165457,7 +165458,7 @@ void m68000_mcu_device::muls_w_adr32_dd_dfm() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165490,7 +165491,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165504,7 +165505,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165516,7 +165517,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165527,7 +165528,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165562,7 +165563,7 @@ void m68000_mcu_device::muls_w_dpc_dd_dfm() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165590,7 +165591,7 @@ void m68000_mcu_device::muls_w_dpc_dd_dfm() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165623,7 +165624,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165637,7 +165638,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165649,7 +165650,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165660,7 +165661,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165671,7 +165672,7 @@ void m68000_mcu_device::muls_w_dpci_dd_dfm() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165733,7 +165734,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165761,7 +165762,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165794,7 +165795,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165808,7 +165809,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165820,7 +165821,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165831,7 +165832,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165872,7 +165873,7 @@ void m68000_mcu_device::muls_w_imm16_dd_dfm() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165905,7 +165906,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165919,7 +165920,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165931,7 +165932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165942,7 +165943,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165958,7 +165959,7 @@ void m68000_mcu_device::add_b_ds_dd_dfm() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -165998,7 +165999,7 @@ void m68000_mcu_device::add_b_ais_dd_dfm() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166021,7 +166022,7 @@ void m68000_mcu_device::add_b_ais_dd_dfm() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166067,7 +166068,7 @@ void m68000_mcu_device::add_b_aips_dd_dfm() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166088,7 +166089,7 @@ void m68000_mcu_device::add_b_aips_dd_dfm() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166136,7 +166137,7 @@ void m68000_mcu_device::add_b_pais_dd_dfm() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166157,7 +166158,7 @@ void m68000_mcu_device::add_b_pais_dd_dfm() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166219,7 +166220,7 @@ void m68000_mcu_device::add_b_das_dd_dfm() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166242,7 +166243,7 @@ void m68000_mcu_device::add_b_das_dd_dfm() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166280,7 +166281,7 @@ void m68000_mcu_device::add_b_dais_dd_dfm() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166342,7 +166343,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166365,7 +166366,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166428,7 +166429,7 @@ void m68000_mcu_device::add_b_adr16_dd_dfm() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166449,7 +166450,7 @@ void m68000_mcu_device::add_b_adr16_dd_dfm() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166533,7 +166534,7 @@ void m68000_mcu_device::add_b_adr32_dd_dfm() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166554,7 +166555,7 @@ void m68000_mcu_device::add_b_adr32_dd_dfm() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166615,7 +166616,7 @@ void m68000_mcu_device::add_b_dpc_dd_dfm() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166638,7 +166639,7 @@ void m68000_mcu_device::add_b_dpc_dd_dfm() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166675,7 +166676,7 @@ void m68000_mcu_device::add_b_dpci_dd_dfm() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166737,7 +166738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166760,7 +166761,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166825,7 +166826,7 @@ void m68000_mcu_device::add_b_imm8_dd_dfm() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166867,7 +166868,7 @@ void m68000_mcu_device::add_w_ds_dd_dfm() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166909,7 +166910,7 @@ void m68000_mcu_device::add_w_as_dd_dfm() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166949,7 +166950,7 @@ void m68000_mcu_device::add_w_ais_dd_dfm() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166975,7 +166976,7 @@ void m68000_mcu_device::add_w_ais_dd_dfm() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167021,7 +167022,7 @@ void m68000_mcu_device::add_w_aips_dd_dfm() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167045,7 +167046,7 @@ void m68000_mcu_device::add_w_aips_dd_dfm() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167093,7 +167094,7 @@ void m68000_mcu_device::add_w_pais_dd_dfm() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167117,7 +167118,7 @@ void m68000_mcu_device::add_w_pais_dd_dfm() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167179,7 +167180,7 @@ void m68000_mcu_device::add_w_das_dd_dfm() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167205,7 +167206,7 @@ void m68000_mcu_device::add_w_das_dd_dfm() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167243,7 +167244,7 @@ void m68000_mcu_device::add_w_dais_dd_dfm() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167305,7 +167306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167331,7 +167332,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167394,7 +167395,7 @@ void m68000_mcu_device::add_w_adr16_dd_dfm() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167418,7 +167419,7 @@ void m68000_mcu_device::add_w_adr16_dd_dfm() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167502,7 +167503,7 @@ void m68000_mcu_device::add_w_adr32_dd_dfm() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167526,7 +167527,7 @@ void m68000_mcu_device::add_w_adr32_dd_dfm() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167587,7 +167588,7 @@ void m68000_mcu_device::add_w_dpc_dd_dfm() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167613,7 +167614,7 @@ void m68000_mcu_device::add_w_dpc_dd_dfm() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167650,7 +167651,7 @@ void m68000_mcu_device::add_w_dpci_dd_dfm() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167712,7 +167713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167738,7 +167739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167803,7 +167804,7 @@ void m68000_mcu_device::add_w_imm16_dd_dfm() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167845,7 +167846,7 @@ void m68000_mcu_device::add_l_ds_dd_dfm() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167869,7 +167870,7 @@ void m68000_mcu_device::add_l_ds_dd_dfm() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167895,7 +167896,7 @@ void m68000_mcu_device::add_l_as_dd_dfm() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167919,7 +167920,7 @@ void m68000_mcu_device::add_l_as_dd_dfm() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167943,7 +167944,7 @@ void m68000_mcu_device::add_l_ais_dd_dfm() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -167990,12 +167991,12 @@ void m68000_mcu_device::add_l_ais_dd_dfm() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168036,7 +168037,7 @@ void m68000_mcu_device::add_l_aips_dd_dfm() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168086,12 +168087,12 @@ void m68000_mcu_device::add_l_aips_dd_dfm() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168131,7 +168132,7 @@ void m68000_mcu_device::add_l_pais_dd_dfm() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -168183,12 +168184,12 @@ void m68000_mcu_device::add_l_pais_dd_dfm() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168250,7 +168251,7 @@ void m68000_mcu_device::add_l_das_dd_dfm() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168297,12 +168298,12 @@ void m68000_mcu_device::add_l_das_dd_dfm() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168341,7 +168342,7 @@ void m68000_mcu_device::add_l_dais_dd_dfm() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168402,7 +168403,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168449,12 +168450,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168518,7 +168519,7 @@ void m68000_mcu_device::add_l_adr16_dd_dfm() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168565,12 +168566,12 @@ void m68000_mcu_device::add_l_adr16_dd_dfm() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168655,7 +168656,7 @@ void m68000_mcu_device::add_l_adr32_dd_dfm() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -168702,12 +168703,12 @@ void m68000_mcu_device::add_l_adr32_dd_dfm() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168768,7 +168769,7 @@ void m68000_mcu_device::add_l_dpc_dd_dfm() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -168815,12 +168816,12 @@ void m68000_mcu_device::add_l_dpc_dd_dfm() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168858,7 +168859,7 @@ void m68000_mcu_device::add_l_dpci_dd_dfm() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168919,7 +168920,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -168966,12 +168967,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169058,7 +169059,7 @@ void m68000_mcu_device::add_l_imm32_dd_dfm() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -169082,7 +169083,7 @@ void m68000_mcu_device::add_l_imm32_dd_dfm() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -169108,7 +169109,7 @@ void m68000_mcu_device::adda_w_ds_ad_dfm() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169131,7 +169132,7 @@ void m68000_mcu_device::adda_w_ds_ad_dfm() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169156,7 +169157,7 @@ void m68000_mcu_device::adda_w_as_ad_dfm() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169179,7 +169180,7 @@ void m68000_mcu_device::adda_w_as_ad_dfm() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169202,7 +169203,7 @@ void m68000_mcu_device::adda_w_ais_ad_dfm() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169228,7 +169229,7 @@ void m68000_mcu_device::adda_w_ais_ad_dfm() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169251,7 +169252,7 @@ void m68000_mcu_device::adda_w_ais_ad_dfm() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169280,7 +169281,7 @@ void m68000_mcu_device::adda_w_aips_ad_dfm() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169304,7 +169305,7 @@ void m68000_mcu_device::adda_w_aips_ad_dfm() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169327,7 +169328,7 @@ void m68000_mcu_device::adda_w_aips_ad_dfm() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169358,7 +169359,7 @@ void m68000_mcu_device::adda_w_pais_ad_dfm() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169382,7 +169383,7 @@ void m68000_mcu_device::adda_w_pais_ad_dfm() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169405,7 +169406,7 @@ void m68000_mcu_device::adda_w_pais_ad_dfm() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169450,7 +169451,7 @@ void m68000_mcu_device::adda_w_das_ad_dfm() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169476,7 +169477,7 @@ void m68000_mcu_device::adda_w_das_ad_dfm() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169499,7 +169500,7 @@ void m68000_mcu_device::adda_w_das_ad_dfm() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169520,7 +169521,7 @@ void m68000_mcu_device::adda_w_dais_ad_dfm() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169582,7 +169583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169608,7 +169609,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169631,7 +169632,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169677,7 +169678,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dfm() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169701,7 +169702,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dfm() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169724,7 +169725,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dfm() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169791,7 +169792,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dfm() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -169815,7 +169816,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dfm() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169838,7 +169839,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dfm() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169882,7 +169883,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dfm() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169908,7 +169909,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dfm() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169931,7 +169932,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dfm() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169951,7 +169952,7 @@ void m68000_mcu_device::adda_w_dpci_ad_dfm() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170013,7 +170014,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -170039,7 +170040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170062,7 +170063,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170110,7 +170111,7 @@ void m68000_mcu_device::adda_w_imm16_ad_dfm() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170133,7 +170134,7 @@ void m68000_mcu_device::adda_w_imm16_ad_dfm() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170158,7 +170159,7 @@ void m68000_mcu_device::addx_b_ds_dd_dfm() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170166,7 +170167,7 @@ void m68000_mcu_device::addx_b_ds_dd_dfm() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -170201,16 +170202,16 @@ void m68000_mcu_device::addx_b_pais_paid_dfm() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170231,7 +170232,7 @@ void m68000_mcu_device::addx_b_pais_paid_dfm() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170249,7 +170250,7 @@ void m68000_mcu_device::addx_b_pais_paid_dfm() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170276,7 +170277,7 @@ void m68000_mcu_device::addx_b_pais_paid_dfm() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -170302,7 +170303,7 @@ void m68000_mcu_device::add_b_dd_ais_dfm() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170325,7 +170326,7 @@ void m68000_mcu_device::add_b_dd_ais_dfm() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170383,7 +170384,7 @@ void m68000_mcu_device::add_b_dd_aips_dfm() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170404,7 +170405,7 @@ void m68000_mcu_device::add_b_dd_aips_dfm() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170464,7 +170465,7 @@ void m68000_mcu_device::add_b_dd_pais_dfm() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170485,7 +170486,7 @@ void m68000_mcu_device::add_b_dd_pais_dfm() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170559,7 +170560,7 @@ void m68000_mcu_device::add_b_dd_das_dfm() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170582,7 +170583,7 @@ void m68000_mcu_device::add_b_dd_das_dfm() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170632,7 +170633,7 @@ void m68000_mcu_device::add_b_dd_dais_dfm() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170694,7 +170695,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170717,7 +170718,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170792,7 +170793,7 @@ void m68000_mcu_device::add_b_dd_adr16_dfm() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170813,7 +170814,7 @@ void m68000_mcu_device::add_b_dd_adr16_dfm() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170909,7 +170910,7 @@ void m68000_mcu_device::add_b_dd_adr32_dfm() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170930,7 +170931,7 @@ void m68000_mcu_device::add_b_dd_adr32_dfm() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170984,7 +170985,7 @@ void m68000_mcu_device::addx_w_ds_dd_dfm() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170992,7 +170993,7 @@ void m68000_mcu_device::addx_w_ds_dd_dfm() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171027,16 +171028,16 @@ void m68000_mcu_device::addx_w_pais_paid_dfm() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171060,7 +171061,7 @@ void m68000_mcu_device::addx_w_pais_paid_dfm() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171081,7 +171082,7 @@ void m68000_mcu_device::addx_w_pais_paid_dfm() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171108,7 +171109,7 @@ void m68000_mcu_device::addx_w_pais_paid_dfm() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -171139,7 +171140,7 @@ void m68000_mcu_device::add_w_dd_ais_dfm() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171165,7 +171166,7 @@ void m68000_mcu_device::add_w_dd_ais_dfm() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171228,7 +171229,7 @@ void m68000_mcu_device::add_w_dd_aips_dfm() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171252,7 +171253,7 @@ void m68000_mcu_device::add_w_dd_aips_dfm() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171317,7 +171318,7 @@ void m68000_mcu_device::add_w_dd_pais_dfm() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171341,7 +171342,7 @@ void m68000_mcu_device::add_w_dd_pais_dfm() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171420,7 +171421,7 @@ void m68000_mcu_device::add_w_dd_das_dfm() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171446,7 +171447,7 @@ void m68000_mcu_device::add_w_dd_das_dfm() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171501,7 +171502,7 @@ void m68000_mcu_device::add_w_dd_dais_dfm() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -171563,7 +171564,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171589,7 +171590,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171669,7 +171670,7 @@ void m68000_mcu_device::add_w_dd_adr16_dfm() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171693,7 +171694,7 @@ void m68000_mcu_device::add_w_dd_adr16_dfm() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171794,7 +171795,7 @@ void m68000_mcu_device::add_w_dd_adr32_dfm() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -171818,7 +171819,7 @@ void m68000_mcu_device::add_w_dd_adr32_dfm() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171877,12 +171878,12 @@ void m68000_mcu_device::addx_l_ds_dd_dfm() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171902,7 +171903,7 @@ void m68000_mcu_device::addx_l_ds_dd_dfm() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -171911,7 +171912,7 @@ void m68000_mcu_device::addx_l_ds_dd_dfm() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171929,13 +171930,13 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171956,11 +171957,11 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -171982,7 +171983,7 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -172005,7 +172006,7 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -172030,7 +172031,7 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -172050,7 +172051,7 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172077,7 +172078,7 @@ void m68000_mcu_device::addx_l_pais_paid_dfm() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -172108,7 +172109,7 @@ void m68000_mcu_device::add_l_dd_ais_dfm() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172155,7 +172156,7 @@ void m68000_mcu_device::add_l_dd_ais_dfm() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172180,7 +172181,7 @@ void m68000_mcu_device::add_l_dd_ais_dfm() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172235,7 +172236,7 @@ void m68000_mcu_device::add_l_dd_aips_dfm() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172285,7 +172286,7 @@ void m68000_mcu_device::add_l_dd_aips_dfm() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172310,7 +172311,7 @@ void m68000_mcu_device::add_l_dd_aips_dfm() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172364,7 +172365,7 @@ void m68000_mcu_device::add_l_dd_pais_dfm() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -172416,7 +172417,7 @@ void m68000_mcu_device::add_l_dd_pais_dfm() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172441,7 +172442,7 @@ void m68000_mcu_device::add_l_dd_pais_dfm() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172517,7 +172518,7 @@ void m68000_mcu_device::add_l_dd_das_dfm() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172564,7 +172565,7 @@ void m68000_mcu_device::add_l_dd_das_dfm() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172589,7 +172590,7 @@ void m68000_mcu_device::add_l_dd_das_dfm() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172642,7 +172643,7 @@ void m68000_mcu_device::add_l_dd_dais_dfm() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -172703,7 +172704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172750,7 +172751,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172775,7 +172776,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172853,7 +172854,7 @@ void m68000_mcu_device::add_l_dd_adr16_dfm() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -172900,7 +172901,7 @@ void m68000_mcu_device::add_l_dd_adr16_dfm() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172925,7 +172926,7 @@ void m68000_mcu_device::add_l_dd_adr16_dfm() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173024,7 +173025,7 @@ void m68000_mcu_device::add_l_dd_adr32_dfm() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173071,7 +173072,7 @@ void m68000_mcu_device::add_l_dd_adr32_dfm() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173096,7 +173097,7 @@ void m68000_mcu_device::add_l_dd_adr32_dfm() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173153,7 +173154,7 @@ void m68000_mcu_device::adda_l_ds_ad_dfm() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173176,7 +173177,7 @@ void m68000_mcu_device::adda_l_ds_ad_dfm() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173201,7 +173202,7 @@ void m68000_mcu_device::adda_l_as_ad_dfm() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173224,7 +173225,7 @@ void m68000_mcu_device::adda_l_as_ad_dfm() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173247,7 +173248,7 @@ void m68000_mcu_device::adda_l_ais_ad_dfm() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173294,11 +173295,11 @@ void m68000_mcu_device::adda_l_ais_ad_dfm() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173338,7 +173339,7 @@ void m68000_mcu_device::adda_l_aips_ad_dfm() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173388,11 +173389,11 @@ void m68000_mcu_device::adda_l_aips_ad_dfm() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173431,7 +173432,7 @@ void m68000_mcu_device::adda_l_pais_ad_dfm() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -173483,11 +173484,11 @@ void m68000_mcu_device::adda_l_pais_ad_dfm() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173548,7 +173549,7 @@ void m68000_mcu_device::adda_l_das_ad_dfm() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173595,11 +173596,11 @@ void m68000_mcu_device::adda_l_das_ad_dfm() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173637,7 +173638,7 @@ void m68000_mcu_device::adda_l_dais_ad_dfm() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -173698,7 +173699,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173745,11 +173746,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173812,7 +173813,7 @@ void m68000_mcu_device::adda_l_adr16_ad_dfm() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173859,11 +173860,11 @@ void m68000_mcu_device::adda_l_adr16_ad_dfm() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173947,7 +173948,7 @@ void m68000_mcu_device::adda_l_adr32_ad_dfm() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -173994,11 +173995,11 @@ void m68000_mcu_device::adda_l_adr32_ad_dfm() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174058,7 +174059,7 @@ void m68000_mcu_device::adda_l_dpc_ad_dfm() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174105,11 +174106,11 @@ void m68000_mcu_device::adda_l_dpc_ad_dfm() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174146,7 +174147,7 @@ void m68000_mcu_device::adda_l_dpci_ad_dfm() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -174207,7 +174208,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174254,11 +174255,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174344,7 +174345,7 @@ void m68000_mcu_device::adda_l_imm32_ad_dfm() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -174367,7 +174368,7 @@ void m68000_mcu_device::adda_l_imm32_ad_dfm() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -174391,13 +174392,13 @@ void m68000_mcu_device::asr_b_imm3_ds_dfm() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174426,7 +174427,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174456,13 +174457,13 @@ void m68000_mcu_device::lsr_b_imm3_ds_dfm() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174491,7 +174492,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174521,13 +174522,13 @@ void m68000_mcu_device::roxr_b_imm3_ds_dfm() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174556,7 +174557,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174586,13 +174587,13 @@ void m68000_mcu_device::ror_b_imm3_ds_dfm() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174621,7 +174622,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174652,13 +174653,13 @@ void m68000_mcu_device::asr_b_dd_ds_dfm() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174687,7 +174688,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174718,13 +174719,13 @@ void m68000_mcu_device::lsr_b_dd_ds_dfm() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174753,7 +174754,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174784,13 +174785,13 @@ void m68000_mcu_device::roxr_b_dd_ds_dfm() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174819,7 +174820,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174850,13 +174851,13 @@ void m68000_mcu_device::ror_b_dd_ds_dfm() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174885,7 +174886,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174915,13 +174916,13 @@ void m68000_mcu_device::asr_w_imm3_ds_dfm() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174950,7 +174951,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174980,13 +174981,13 @@ void m68000_mcu_device::lsr_w_imm3_ds_dfm() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175015,7 +175016,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175045,13 +175046,13 @@ void m68000_mcu_device::roxr_w_imm3_ds_dfm() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175080,7 +175081,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175110,13 +175111,13 @@ void m68000_mcu_device::ror_w_imm3_ds_dfm() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175145,7 +175146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175176,13 +175177,13 @@ void m68000_mcu_device::asr_w_dd_ds_dfm() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175211,7 +175212,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175242,13 +175243,13 @@ void m68000_mcu_device::lsr_w_dd_ds_dfm() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175277,7 +175278,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175308,13 +175309,13 @@ void m68000_mcu_device::roxr_w_dd_ds_dfm() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175343,7 +175344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175374,13 +175375,13 @@ void m68000_mcu_device::ror_w_dd_ds_dfm() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175409,7 +175410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175439,13 +175440,13 @@ void m68000_mcu_device::asr_l_imm3_ds_dfm() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175474,7 +175475,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175491,7 +175492,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175510,13 +175511,13 @@ void m68000_mcu_device::lsr_l_imm3_ds_dfm() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175545,7 +175546,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175562,7 +175563,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175581,13 +175582,13 @@ void m68000_mcu_device::roxr_l_imm3_ds_dfm() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175616,7 +175617,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175633,7 +175634,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175652,13 +175653,13 @@ void m68000_mcu_device::ror_l_imm3_ds_dfm() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175687,7 +175688,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175704,7 +175705,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175724,13 +175725,13 @@ void m68000_mcu_device::asr_l_dd_ds_dfm() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175759,7 +175760,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175776,7 +175777,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175796,13 +175797,13 @@ void m68000_mcu_device::lsr_l_dd_ds_dfm() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175831,7 +175832,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175848,7 +175849,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175868,13 +175869,13 @@ void m68000_mcu_device::roxr_l_dd_ds_dfm() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175903,7 +175904,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175920,7 +175921,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175940,13 +175941,13 @@ void m68000_mcu_device::ror_l_dd_ds_dfm() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175975,7 +175976,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175992,7 +175993,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -176010,7 +176011,7 @@ void m68000_mcu_device::asr_ais_dfm() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176036,12 +176037,12 @@ void m68000_mcu_device::asr_ais_dfm() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176104,7 +176105,7 @@ void m68000_mcu_device::asr_aips_dfm() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176128,12 +176129,12 @@ void m68000_mcu_device::asr_aips_dfm() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176198,7 +176199,7 @@ void m68000_mcu_device::asr_pais_dfm() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176222,12 +176223,12 @@ void m68000_mcu_device::asr_pais_dfm() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176306,7 +176307,7 @@ void m68000_mcu_device::asr_das_dfm() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176332,12 +176333,12 @@ void m68000_mcu_device::asr_das_dfm() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176392,7 +176393,7 @@ void m68000_mcu_device::asr_dais_dfm() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -176454,7 +176455,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176480,12 +176481,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176565,7 +176566,7 @@ void m68000_mcu_device::asr_adr16_dfm() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176589,12 +176590,12 @@ void m68000_mcu_device::asr_adr16_dfm() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176695,7 +176696,7 @@ void m68000_mcu_device::asr_adr32_dfm() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176719,12 +176720,12 @@ void m68000_mcu_device::asr_adr32_dfm() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176782,13 +176783,13 @@ void m68000_mcu_device::asl_b_imm3_ds_dfm() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176817,7 +176818,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176847,13 +176848,13 @@ void m68000_mcu_device::lsl_b_imm3_ds_dfm() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176896,7 +176897,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176913,13 +176914,13 @@ void m68000_mcu_device::roxl_b_imm3_ds_dfm() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176948,7 +176949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176978,13 +176979,13 @@ void m68000_mcu_device::rol_b_imm3_ds_dfm() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177013,7 +177014,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177044,13 +177045,13 @@ void m68000_mcu_device::asl_b_dd_ds_dfm() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177079,7 +177080,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177110,13 +177111,13 @@ void m68000_mcu_device::lsl_b_dd_ds_dfm() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177145,7 +177146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177159,7 +177160,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177177,13 +177178,13 @@ void m68000_mcu_device::roxl_b_dd_ds_dfm() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177212,7 +177213,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177243,13 +177244,13 @@ void m68000_mcu_device::rol_b_dd_ds_dfm() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177278,7 +177279,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177308,13 +177309,13 @@ void m68000_mcu_device::asl_w_imm3_ds_dfm() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177343,7 +177344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177373,13 +177374,13 @@ void m68000_mcu_device::lsl_w_imm3_ds_dfm() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177408,7 +177409,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177422,7 +177423,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177439,13 +177440,13 @@ void m68000_mcu_device::roxl_w_imm3_ds_dfm() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177474,7 +177475,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177504,13 +177505,13 @@ void m68000_mcu_device::rol_w_imm3_ds_dfm() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177539,7 +177540,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177570,13 +177571,13 @@ void m68000_mcu_device::asl_w_dd_ds_dfm() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177605,7 +177606,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177636,13 +177637,13 @@ void m68000_mcu_device::lsl_w_dd_ds_dfm() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177671,7 +177672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177685,7 +177686,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177703,13 +177704,13 @@ void m68000_mcu_device::roxl_w_dd_ds_dfm() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177738,7 +177739,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177769,13 +177770,13 @@ void m68000_mcu_device::rol_w_dd_ds_dfm() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177804,7 +177805,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177834,13 +177835,13 @@ void m68000_mcu_device::asl_l_imm3_ds_dfm() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177869,7 +177870,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177886,7 +177887,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177905,13 +177906,13 @@ void m68000_mcu_device::lsl_l_imm3_ds_dfm() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177940,7 +177941,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177952,14 +177953,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177978,13 +177979,13 @@ void m68000_mcu_device::roxl_l_imm3_ds_dfm() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178013,7 +178014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178030,7 +178031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178049,13 +178050,13 @@ void m68000_mcu_device::rol_l_imm3_ds_dfm() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178084,7 +178085,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178101,7 +178102,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178121,13 +178122,13 @@ void m68000_mcu_device::asl_l_dd_ds_dfm() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178156,7 +178157,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178173,7 +178174,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178193,13 +178194,13 @@ void m68000_mcu_device::lsl_l_dd_ds_dfm() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178228,7 +178229,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178240,14 +178241,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178267,13 +178268,13 @@ void m68000_mcu_device::roxl_l_dd_ds_dfm() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178302,7 +178303,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178319,7 +178320,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178339,13 +178340,13 @@ void m68000_mcu_device::rol_l_dd_ds_dfm() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178374,7 +178375,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178391,7 +178392,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178409,7 +178410,7 @@ void m68000_mcu_device::asl_ais_dfm() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178435,12 +178436,12 @@ void m68000_mcu_device::asl_ais_dfm() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178503,7 +178504,7 @@ void m68000_mcu_device::asl_aips_dfm() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178527,12 +178528,12 @@ void m68000_mcu_device::asl_aips_dfm() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178597,7 +178598,7 @@ void m68000_mcu_device::asl_pais_dfm() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178621,12 +178622,12 @@ void m68000_mcu_device::asl_pais_dfm() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178705,7 +178706,7 @@ void m68000_mcu_device::asl_das_dfm() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178731,12 +178732,12 @@ void m68000_mcu_device::asl_das_dfm() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178791,7 +178792,7 @@ void m68000_mcu_device::asl_dais_dfm() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -178853,7 +178854,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178879,12 +178880,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178964,7 +178965,7 @@ void m68000_mcu_device::asl_adr16_dfm() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -178988,12 +178989,12 @@ void m68000_mcu_device::asl_adr16_dfm() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179094,7 +179095,7 @@ void m68000_mcu_device::asl_adr32_dfm() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179118,12 +179119,12 @@ void m68000_mcu_device::asl_adr32_dfm() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179180,7 +179181,7 @@ void m68000_mcu_device::lsr_ais_dfm() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179206,12 +179207,12 @@ void m68000_mcu_device::lsr_ais_dfm() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179274,7 +179275,7 @@ void m68000_mcu_device::lsr_aips_dfm() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179298,12 +179299,12 @@ void m68000_mcu_device::lsr_aips_dfm() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179368,7 +179369,7 @@ void m68000_mcu_device::lsr_pais_dfm() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179392,12 +179393,12 @@ void m68000_mcu_device::lsr_pais_dfm() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179476,7 +179477,7 @@ void m68000_mcu_device::lsr_das_dfm() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179502,12 +179503,12 @@ void m68000_mcu_device::lsr_das_dfm() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179562,7 +179563,7 @@ void m68000_mcu_device::lsr_dais_dfm() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -179624,7 +179625,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179650,12 +179651,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179735,7 +179736,7 @@ void m68000_mcu_device::lsr_adr16_dfm() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179759,12 +179760,12 @@ void m68000_mcu_device::lsr_adr16_dfm() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179865,7 +179866,7 @@ void m68000_mcu_device::lsr_adr32_dfm() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179889,12 +179890,12 @@ void m68000_mcu_device::lsr_adr32_dfm() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179951,11 +179952,11 @@ void m68000_mcu_device::lsl_ais_dfm() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -179978,12 +179979,12 @@ void m68000_mcu_device::lsl_ais_dfm() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180010,7 +180011,7 @@ void m68000_mcu_device::lsl_ais_dfm() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180044,12 +180045,12 @@ void m68000_mcu_device::lsl_aips_dfm() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180073,12 +180074,12 @@ void m68000_mcu_device::lsl_aips_dfm() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180105,7 +180106,7 @@ void m68000_mcu_device::lsl_aips_dfm() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180138,7 +180139,7 @@ void m68000_mcu_device::lsl_pais_dfm() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180146,7 +180147,7 @@ void m68000_mcu_device::lsl_pais_dfm() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180170,12 +180171,12 @@ void m68000_mcu_device::lsl_pais_dfm() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180202,7 +180203,7 @@ void m68000_mcu_device::lsl_pais_dfm() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180233,7 +180234,7 @@ void m68000_mcu_device::lsl_das_dfm() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180256,11 +180257,11 @@ void m68000_mcu_device::lsl_das_dfm() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180283,12 +180284,12 @@ void m68000_mcu_device::lsl_das_dfm() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180315,7 +180316,7 @@ void m68000_mcu_device::lsl_das_dfm() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180344,14 +180345,14 @@ void m68000_mcu_device::lsl_dais_dfm() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180359,7 +180360,7 @@ void m68000_mcu_device::lsl_dais_dfm() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180383,7 +180384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180409,11 +180410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180436,12 +180437,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180468,7 +180469,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180501,7 +180502,7 @@ void m68000_mcu_device::lsl_adr16_dfm() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180524,7 +180525,7 @@ void m68000_mcu_device::lsl_adr16_dfm() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180548,12 +180549,12 @@ void m68000_mcu_device::lsl_adr16_dfm() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180580,7 +180581,7 @@ void m68000_mcu_device::lsl_adr16_dfm() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180611,7 +180612,7 @@ void m68000_mcu_device::lsl_adr32_dfm() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
m_icount -= 4;
@@ -180635,7 +180636,7 @@ void m68000_mcu_device::lsl_adr32_dfm() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180658,7 +180659,7 @@ void m68000_mcu_device::lsl_adr32_dfm() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180682,12 +180683,12 @@ void m68000_mcu_device::lsl_adr32_dfm() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180714,7 +180715,7 @@ void m68000_mcu_device::lsl_adr32_dfm() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program.write_interruptible(m_aob & ~1, m_dbout);
m_icount -= 4;
@@ -180745,7 +180746,7 @@ void m68000_mcu_device::roxr_ais_dfm() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180771,12 +180772,12 @@ void m68000_mcu_device::roxr_ais_dfm() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180839,7 +180840,7 @@ void m68000_mcu_device::roxr_aips_dfm() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180863,12 +180864,12 @@ void m68000_mcu_device::roxr_aips_dfm() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180933,7 +180934,7 @@ void m68000_mcu_device::roxr_pais_dfm() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180957,12 +180958,12 @@ void m68000_mcu_device::roxr_pais_dfm() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181041,7 +181042,7 @@ void m68000_mcu_device::roxr_das_dfm() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181067,12 +181068,12 @@ void m68000_mcu_device::roxr_das_dfm() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181127,7 +181128,7 @@ void m68000_mcu_device::roxr_dais_dfm() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181189,7 +181190,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181215,12 +181216,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181300,7 +181301,7 @@ void m68000_mcu_device::roxr_adr16_dfm() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181324,12 +181325,12 @@ void m68000_mcu_device::roxr_adr16_dfm() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181430,7 +181431,7 @@ void m68000_mcu_device::roxr_adr32_dfm() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181454,12 +181455,12 @@ void m68000_mcu_device::roxr_adr32_dfm() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181516,7 +181517,7 @@ void m68000_mcu_device::roxl_ais_dfm() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181542,12 +181543,12 @@ void m68000_mcu_device::roxl_ais_dfm() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181610,7 +181611,7 @@ void m68000_mcu_device::roxl_aips_dfm() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181634,12 +181635,12 @@ void m68000_mcu_device::roxl_aips_dfm() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181704,7 +181705,7 @@ void m68000_mcu_device::roxl_pais_dfm() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181728,12 +181729,12 @@ void m68000_mcu_device::roxl_pais_dfm() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181812,7 +181813,7 @@ void m68000_mcu_device::roxl_das_dfm() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181838,12 +181839,12 @@ void m68000_mcu_device::roxl_das_dfm() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181898,7 +181899,7 @@ void m68000_mcu_device::roxl_dais_dfm() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181960,7 +181961,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181986,12 +181987,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182071,7 +182072,7 @@ void m68000_mcu_device::roxl_adr16_dfm() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182095,12 +182096,12 @@ void m68000_mcu_device::roxl_adr16_dfm() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182201,7 +182202,7 @@ void m68000_mcu_device::roxl_adr32_dfm() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182225,12 +182226,12 @@ void m68000_mcu_device::roxl_adr32_dfm() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182287,7 +182288,7 @@ void m68000_mcu_device::ror_ais_dfm() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182313,12 +182314,12 @@ void m68000_mcu_device::ror_ais_dfm() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182381,7 +182382,7 @@ void m68000_mcu_device::ror_aips_dfm() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182405,12 +182406,12 @@ void m68000_mcu_device::ror_aips_dfm() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182475,7 +182476,7 @@ void m68000_mcu_device::ror_pais_dfm() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182499,12 +182500,12 @@ void m68000_mcu_device::ror_pais_dfm() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182583,7 +182584,7 @@ void m68000_mcu_device::ror_das_dfm() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182609,12 +182610,12 @@ void m68000_mcu_device::ror_das_dfm() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182669,7 +182670,7 @@ void m68000_mcu_device::ror_dais_dfm() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182731,7 +182732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182757,12 +182758,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182842,7 +182843,7 @@ void m68000_mcu_device::ror_adr16_dfm() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182866,12 +182867,12 @@ void m68000_mcu_device::ror_adr16_dfm() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182972,7 +182973,7 @@ void m68000_mcu_device::ror_adr32_dfm() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -182996,12 +182997,12 @@ void m68000_mcu_device::ror_adr32_dfm() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183058,7 +183059,7 @@ void m68000_mcu_device::rol_ais_dfm() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183084,12 +183085,12 @@ void m68000_mcu_device::rol_ais_dfm() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183152,7 +183153,7 @@ void m68000_mcu_device::rol_aips_dfm() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183176,12 +183177,12 @@ void m68000_mcu_device::rol_aips_dfm() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183246,7 +183247,7 @@ void m68000_mcu_device::rol_pais_dfm() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183270,12 +183271,12 @@ void m68000_mcu_device::rol_pais_dfm() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183354,7 +183355,7 @@ void m68000_mcu_device::rol_das_dfm() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183380,12 +183381,12 @@ void m68000_mcu_device::rol_das_dfm() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183440,7 +183441,7 @@ void m68000_mcu_device::rol_dais_dfm() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183502,7 +183503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183528,12 +183529,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183613,7 +183614,7 @@ void m68000_mcu_device::rol_adr16_dfm() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183637,12 +183638,12 @@ void m68000_mcu_device::rol_adr16_dfm() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183743,7 +183744,7 @@ void m68000_mcu_device::rol_adr32_dfm() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -183767,12 +183768,12 @@ void m68000_mcu_device::rol_adr32_dfm() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000mcu-sdpm.cpp b/src/devices/cpu/m68000/m68000mcu-sdpm.cpp
index 1221e0a3de6..85fc5a7599a 100644
--- a/src/devices/cpu/m68000/m68000mcu-sdpm.cpp
+++ b/src/devices/cpu/m68000/m68000mcu-sdpm.cpp
@@ -209,7 +209,7 @@ void m68000_mcu_device::state_bus_error_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -219,7 +219,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -245,7 +245,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -270,7 +270,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -299,7 +299,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -324,7 +324,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -352,7 +352,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -378,7 +378,7 @@ void m68000_mcu_device::state_bus_error_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -525,7 +525,7 @@ void m68000_mcu_device::state_address_error_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -535,7 +535,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -561,7 +561,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -586,7 +586,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -615,7 +615,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -640,7 +640,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -668,7 +668,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -694,7 +694,7 @@ void m68000_mcu_device::state_address_error_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -851,7 +851,7 @@ void m68000_mcu_device::state_interrupt_dpm()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -863,7 +863,7 @@ void m68000_mcu_device::state_interrupt_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -925,7 +925,7 @@ void m68000_mcu_device::state_interrupt_dpm()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -951,7 +951,7 @@ void m68000_mcu_device::state_interrupt_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1096,7 +1096,7 @@ void m68000_mcu_device::state_trace_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1106,7 +1106,7 @@ void m68000_mcu_device::state_trace_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1134,7 +1134,7 @@ void m68000_mcu_device::state_trace_dpm()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1160,7 +1160,7 @@ void m68000_mcu_device::state_trace_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1305,7 +1305,7 @@ void m68000_mcu_device::state_illegal_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1315,7 +1315,7 @@ void m68000_mcu_device::state_illegal_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1343,7 +1343,7 @@ void m68000_mcu_device::state_illegal_dpm()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1369,7 +1369,7 @@ void m68000_mcu_device::state_illegal_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1514,7 +1514,7 @@ void m68000_mcu_device::state_priviledge_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1524,7 +1524,7 @@ void m68000_mcu_device::state_priviledge_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1552,7 +1552,7 @@ void m68000_mcu_device::state_priviledge_dpm()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1578,7 +1578,7 @@ void m68000_mcu_device::state_priviledge_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1723,7 +1723,7 @@ void m68000_mcu_device::state_linea_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1733,7 +1733,7 @@ void m68000_mcu_device::state_linea_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1761,7 +1761,7 @@ void m68000_mcu_device::state_linea_dpm()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1787,7 +1787,7 @@ void m68000_mcu_device::state_linea_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1932,7 +1932,7 @@ void m68000_mcu_device::state_linef_dpm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1942,7 +1942,7 @@ void m68000_mcu_device::state_linef_dpm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1970,7 +1970,7 @@ void m68000_mcu_device::state_linef_dpm()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1996,7 +1996,7 @@ void m68000_mcu_device::state_linef_dpm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2138,7 +2138,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dpm() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2164,7 +2164,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dpm() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2172,7 +2172,7 @@ void m68000_mcu_device::ori_b_imm8_ds_dpm() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2213,7 +2213,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dpm() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2238,11 +2238,11 @@ void m68000_mcu_device::ori_b_imm8_ais_dpm() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2264,7 +2264,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dpm() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2294,7 +2294,7 @@ void m68000_mcu_device::ori_b_imm8_ais_dpm() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2327,7 +2327,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dpm() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2355,12 +2355,12 @@ void m68000_mcu_device::ori_b_imm8_aips_dpm() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2383,7 +2383,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dpm() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2413,7 +2413,7 @@ void m68000_mcu_device::ori_b_imm8_aips_dpm() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2446,7 +2446,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dpm() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2473,7 +2473,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dpm() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2481,7 +2481,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dpm() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2504,7 +2504,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dpm() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2534,7 +2534,7 @@ void m68000_mcu_device::ori_b_imm8_pais_dpm() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2567,7 +2567,7 @@ void m68000_mcu_device::ori_b_imm8_das_dpm() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2592,7 +2592,7 @@ void m68000_mcu_device::ori_b_imm8_das_dpm() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2618,11 +2618,11 @@ void m68000_mcu_device::ori_b_imm8_das_dpm() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2644,7 +2644,7 @@ void m68000_mcu_device::ori_b_imm8_das_dpm() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2674,7 +2674,7 @@ void m68000_mcu_device::ori_b_imm8_das_dpm() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2707,7 +2707,7 @@ void m68000_mcu_device::ori_b_imm8_dais_dpm() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2730,14 +2730,14 @@ void m68000_mcu_device::ori_b_imm8_dais_dpm() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2745,7 +2745,7 @@ void m68000_mcu_device::ori_b_imm8_dais_dpm() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2772,7 +2772,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2801,11 +2801,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2827,7 +2827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2857,7 +2857,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2889,7 +2889,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dpm() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -2917,7 +2917,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dpm() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -2943,7 +2943,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dpm() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -2966,7 +2966,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dpm() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2996,7 +2996,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_dpm() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3028,7 +3028,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3054,7 +3054,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3081,7 +3081,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3107,7 +3107,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -3130,7 +3130,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3160,7 +3160,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_dpm() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3192,7 +3192,7 @@ void m68000_mcu_device::ori_imm8_ccr_dpm() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3217,21 +3217,21 @@ void m68000_mcu_device::ori_imm8_ccr_dpm() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3239,7 +3239,7 @@ void m68000_mcu_device::ori_imm8_ccr_dpm() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3266,11 +3266,11 @@ void m68000_mcu_device::ori_imm8_ccr_dpm() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3311,7 +3311,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dpm() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3337,7 +3337,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dpm() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3345,7 +3345,7 @@ void m68000_mcu_device::ori_w_imm16_ds_dpm() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3386,7 +3386,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dpm() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3411,11 +3411,11 @@ void m68000_mcu_device::ori_w_imm16_ais_dpm() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3441,7 +3441,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dpm() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3471,7 +3471,7 @@ void m68000_mcu_device::ori_w_imm16_ais_dpm() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3510,7 +3510,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dpm() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3538,12 +3538,12 @@ void m68000_mcu_device::ori_w_imm16_aips_dpm() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3570,7 +3570,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dpm() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3600,7 +3600,7 @@ void m68000_mcu_device::ori_w_imm16_aips_dpm() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3639,7 +3639,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dpm() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3666,7 +3666,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dpm() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3674,7 +3674,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dpm() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3701,7 +3701,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dpm() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3731,7 +3731,7 @@ void m68000_mcu_device::ori_w_imm16_pais_dpm() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3770,7 +3770,7 @@ void m68000_mcu_device::ori_w_imm16_das_dpm() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3795,7 +3795,7 @@ void m68000_mcu_device::ori_w_imm16_das_dpm() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3821,11 +3821,11 @@ void m68000_mcu_device::ori_w_imm16_das_dpm() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -3851,7 +3851,7 @@ void m68000_mcu_device::ori_w_imm16_das_dpm() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3881,7 +3881,7 @@ void m68000_mcu_device::ori_w_imm16_das_dpm() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -3920,7 +3920,7 @@ void m68000_mcu_device::ori_w_imm16_dais_dpm() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3943,14 +3943,14 @@ void m68000_mcu_device::ori_w_imm16_dais_dpm() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3958,7 +3958,7 @@ void m68000_mcu_device::ori_w_imm16_dais_dpm() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -3985,7 +3985,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4014,11 +4014,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4044,7 +4044,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4074,7 +4074,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4112,7 +4112,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dpm() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4140,7 +4140,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dpm() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -4166,7 +4166,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dpm() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4193,7 +4193,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dpm() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4223,7 +4223,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_dpm() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4261,7 +4261,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4287,7 +4287,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4314,7 +4314,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -4340,7 +4340,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -4367,7 +4367,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4397,7 +4397,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_dpm() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4439,7 +4439,7 @@ void m68000_mcu_device::ori_i16u_sr_dpm() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4464,23 +4464,23 @@ void m68000_mcu_device::ori_i16u_sr_dpm() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4488,7 +4488,7 @@ void m68000_mcu_device::ori_i16u_sr_dpm() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4515,11 +4515,11 @@ void m68000_mcu_device::ori_i16u_sr_dpm() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4559,7 +4559,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dpm() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4585,7 +4585,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dpm() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4611,12 +4611,12 @@ void m68000_mcu_device::ori_l_imm32_ds_dpm() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4639,7 +4639,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dpm() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4648,7 +4648,7 @@ void m68000_mcu_device::ori_l_imm32_ds_dpm() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4668,7 +4668,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4694,7 +4694,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4719,7 +4719,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4747,7 +4747,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4773,7 +4773,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4801,7 +4801,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4829,7 +4829,7 @@ void m68000_mcu_device::ori_l_imm32_ais_dpm() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -4867,7 +4867,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4893,7 +4893,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -4918,7 +4918,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4946,11 +4946,11 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -4976,7 +4976,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5004,7 +5004,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5032,7 +5032,7 @@ void m68000_mcu_device::ori_l_imm32_aips_dpm() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5070,7 +5070,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5096,7 +5096,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5120,14 +5120,14 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5154,7 +5154,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5180,7 +5180,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5208,7 +5208,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5236,7 +5236,7 @@ void m68000_mcu_device::ori_l_imm32_pais_dpm() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5274,7 +5274,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5300,7 +5300,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5325,7 +5325,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5350,7 +5350,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5378,7 +5378,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5404,7 +5404,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5432,7 +5432,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5460,7 +5460,7 @@ void m68000_mcu_device::ori_l_imm32_das_dpm() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5498,7 +5498,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dpm() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5524,7 +5524,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dpm() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5547,14 +5547,14 @@ void m68000_mcu_device::ori_l_imm32_dais_dpm() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -5562,7 +5562,7 @@ void m68000_mcu_device::ori_l_imm32_dais_dpm() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5589,7 +5589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5617,7 +5617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5645,7 +5645,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5671,7 +5671,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5699,7 +5699,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5727,7 +5727,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5764,7 +5764,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5790,7 +5790,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -5818,7 +5818,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5844,7 +5844,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5872,7 +5872,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -5898,7 +5898,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5926,7 +5926,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5954,7 +5954,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_dpm() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -5991,7 +5991,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6017,7 +6017,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6043,7 +6043,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6070,7 +6070,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -6096,7 +6096,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6124,7 +6124,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -6150,7 +6150,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6178,7 +6178,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6206,7 +6206,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_dpm() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -6248,13 +6248,13 @@ void m68000_mcu_device::btst_dd_ds_dpm() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6286,7 +6286,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6300,7 +6300,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6322,7 +6322,7 @@ void m68000_mcu_device::movep_w_das_dd_dpm() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6347,7 +6347,7 @@ void m68000_mcu_device::movep_w_das_dd_dpm() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6368,7 +6368,7 @@ void m68000_mcu_device::movep_w_das_dd_dpm() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6392,7 +6392,7 @@ void m68000_mcu_device::movep_w_das_dd_dpm() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6432,11 +6432,11 @@ void m68000_mcu_device::btst_dd_ais_dpm() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6458,13 +6458,13 @@ void m68000_mcu_device::btst_dd_ais_dpm() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6507,12 +6507,12 @@ void m68000_mcu_device::btst_dd_aips_dpm() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6535,13 +6535,13 @@ void m68000_mcu_device::btst_dd_aips_dpm() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6583,7 +6583,7 @@ void m68000_mcu_device::btst_dd_pais_dpm() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6591,7 +6591,7 @@ void m68000_mcu_device::btst_dd_pais_dpm() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6614,13 +6614,13 @@ void m68000_mcu_device::btst_dd_pais_dpm() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6660,7 +6660,7 @@ void m68000_mcu_device::btst_dd_das_dpm() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6686,11 +6686,11 @@ void m68000_mcu_device::btst_dd_das_dpm() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6712,13 +6712,13 @@ void m68000_mcu_device::btst_dd_das_dpm() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6756,14 +6756,14 @@ void m68000_mcu_device::btst_dd_dais_dpm() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6771,7 +6771,7 @@ void m68000_mcu_device::btst_dd_dais_dpm() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6798,7 +6798,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6827,11 +6827,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6853,13 +6853,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6901,7 +6901,7 @@ void m68000_mcu_device::btst_dd_adr16_dpm() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6927,7 +6927,7 @@ void m68000_mcu_device::btst_dd_adr16_dpm() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -6950,13 +6950,13 @@ void m68000_mcu_device::btst_dd_adr16_dpm() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -6996,7 +6996,7 @@ void m68000_mcu_device::btst_dd_adr32_dpm() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7023,7 +7023,7 @@ void m68000_mcu_device::btst_dd_adr32_dpm() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7049,7 +7049,7 @@ void m68000_mcu_device::btst_dd_adr32_dpm() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -7072,13 +7072,13 @@ void m68000_mcu_device::btst_dd_adr32_dpm() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7117,7 +7117,7 @@ void m68000_mcu_device::btst_dd_dpc_dpm() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7143,11 +7143,11 @@ void m68000_mcu_device::btst_dd_dpc_dpm() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7169,13 +7169,13 @@ void m68000_mcu_device::btst_dd_dpc_dpm() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7212,14 +7212,14 @@ void m68000_mcu_device::btst_dd_dpci_dpm() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7227,7 +7227,7 @@ void m68000_mcu_device::btst_dd_dpci_dpm() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7254,7 +7254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7283,11 +7283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,13 +7309,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7357,7 +7357,7 @@ void m68000_mcu_device::btst_dd_imm_dpm() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7385,12 +7385,12 @@ void m68000_mcu_device::btst_dd_imm_dpm() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7422,7 +7422,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7436,7 +7436,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7462,13 +7462,13 @@ void m68000_mcu_device::bchg_dd_ds_dpm() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -7500,7 +7500,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7513,14 +7513,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7542,7 +7542,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7567,7 +7567,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7587,7 +7587,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7608,7 +7608,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7629,7 +7629,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7653,7 +7653,7 @@ void m68000_mcu_device::movep_l_das_dd_dpm() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7693,11 +7693,11 @@ void m68000_mcu_device::bchg_dd_ais_dpm() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7720,7 +7720,7 @@ void m68000_mcu_device::bchg_dd_ais_dpm() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7748,7 +7748,7 @@ void m68000_mcu_device::bchg_dd_ais_dpm() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7785,12 +7785,12 @@ void m68000_mcu_device::bchg_dd_aips_dpm() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7814,7 +7814,7 @@ void m68000_mcu_device::bchg_dd_aips_dpm() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7842,7 +7842,7 @@ void m68000_mcu_device::bchg_dd_aips_dpm() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7878,7 +7878,7 @@ void m68000_mcu_device::bchg_dd_pais_dpm() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7886,7 +7886,7 @@ void m68000_mcu_device::bchg_dd_pais_dpm() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7910,7 +7910,7 @@ void m68000_mcu_device::bchg_dd_pais_dpm() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7938,7 +7938,7 @@ void m68000_mcu_device::bchg_dd_pais_dpm() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7972,7 +7972,7 @@ void m68000_mcu_device::bchg_dd_das_dpm() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -7998,11 +7998,11 @@ void m68000_mcu_device::bchg_dd_das_dpm() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8025,7 +8025,7 @@ void m68000_mcu_device::bchg_dd_das_dpm() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8053,7 +8053,7 @@ void m68000_mcu_device::bchg_dd_das_dpm() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8085,14 +8085,14 @@ void m68000_mcu_device::bchg_dd_dais_dpm() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8100,7 +8100,7 @@ void m68000_mcu_device::bchg_dd_dais_dpm() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8127,7 +8127,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8156,11 +8156,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8183,7 +8183,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8211,7 +8211,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8247,7 +8247,7 @@ void m68000_mcu_device::bchg_dd_adr16_dpm() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8273,7 +8273,7 @@ void m68000_mcu_device::bchg_dd_adr16_dpm() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -8297,7 +8297,7 @@ void m68000_mcu_device::bchg_dd_adr16_dpm() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8325,7 +8325,7 @@ void m68000_mcu_device::bchg_dd_adr16_dpm() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8359,7 +8359,7 @@ void m68000_mcu_device::bchg_dd_adr32_dpm() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8386,7 +8386,7 @@ void m68000_mcu_device::bchg_dd_adr32_dpm() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8412,7 +8412,7 @@ void m68000_mcu_device::bchg_dd_adr32_dpm() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -8436,7 +8436,7 @@ void m68000_mcu_device::bchg_dd_adr32_dpm() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -8464,7 +8464,7 @@ void m68000_mcu_device::bchg_dd_adr32_dpm() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8502,13 +8502,13 @@ void m68000_mcu_device::bclr_dd_ds_dpm() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8537,14 +8537,14 @@ void m68000_mcu_device::bclr_dd_ds_dpm() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8557,18 +8557,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8590,7 +8590,7 @@ void m68000_mcu_device::movep_w_dd_das_dpm() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8617,7 +8617,7 @@ void m68000_mcu_device::movep_w_dd_das_dpm() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8635,7 +8635,7 @@ void m68000_mcu_device::movep_w_dd_das_dpm() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8654,11 +8654,11 @@ void m68000_mcu_device::movep_w_dd_das_dpm() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -8698,11 +8698,11 @@ void m68000_mcu_device::bclr_dd_ais_dpm() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8724,12 +8724,12 @@ void m68000_mcu_device::bclr_dd_ais_dpm() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8757,7 +8757,7 @@ void m68000_mcu_device::bclr_dd_ais_dpm() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8794,12 +8794,12 @@ void m68000_mcu_device::bclr_dd_aips_dpm() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8822,12 +8822,12 @@ void m68000_mcu_device::bclr_dd_aips_dpm() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8855,7 +8855,7 @@ void m68000_mcu_device::bclr_dd_aips_dpm() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8891,7 +8891,7 @@ void m68000_mcu_device::bclr_dd_pais_dpm() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8899,7 +8899,7 @@ void m68000_mcu_device::bclr_dd_pais_dpm() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8922,12 +8922,12 @@ void m68000_mcu_device::bclr_dd_pais_dpm() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8955,7 +8955,7 @@ void m68000_mcu_device::bclr_dd_pais_dpm() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8989,7 +8989,7 @@ void m68000_mcu_device::bclr_dd_das_dpm() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9015,11 +9015,11 @@ void m68000_mcu_device::bclr_dd_das_dpm() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9041,12 +9041,12 @@ void m68000_mcu_device::bclr_dd_das_dpm() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9074,7 +9074,7 @@ void m68000_mcu_device::bclr_dd_das_dpm() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9106,14 +9106,14 @@ void m68000_mcu_device::bclr_dd_dais_dpm() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9121,7 +9121,7 @@ void m68000_mcu_device::bclr_dd_dais_dpm() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9148,7 +9148,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9177,11 +9177,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9203,12 +9203,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9236,7 +9236,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9272,7 +9272,7 @@ void m68000_mcu_device::bclr_dd_adr16_dpm() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9298,7 +9298,7 @@ void m68000_mcu_device::bclr_dd_adr16_dpm() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -9321,12 +9321,12 @@ void m68000_mcu_device::bclr_dd_adr16_dpm() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9354,7 +9354,7 @@ void m68000_mcu_device::bclr_dd_adr16_dpm() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9388,7 +9388,7 @@ void m68000_mcu_device::bclr_dd_adr32_dpm() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9415,7 +9415,7 @@ void m68000_mcu_device::bclr_dd_adr32_dpm() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9441,7 +9441,7 @@ void m68000_mcu_device::bclr_dd_adr32_dpm() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9464,12 +9464,12 @@ void m68000_mcu_device::bclr_dd_adr32_dpm() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -9497,7 +9497,7 @@ void m68000_mcu_device::bclr_dd_adr32_dpm() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9535,13 +9535,13 @@ void m68000_mcu_device::bset_dd_ds_dpm() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9573,7 +9573,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9586,14 +9586,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9615,7 +9615,7 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9641,7 +9641,7 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9659,7 +9659,7 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9678,7 +9678,7 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9696,7 +9696,7 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9715,11 +9715,11 @@ void m68000_mcu_device::movep_l_dd_das_dpm() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -9759,11 +9759,11 @@ void m68000_mcu_device::bset_dd_ais_dpm() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9786,7 +9786,7 @@ void m68000_mcu_device::bset_dd_ais_dpm() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9814,7 +9814,7 @@ void m68000_mcu_device::bset_dd_ais_dpm() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9851,12 +9851,12 @@ void m68000_mcu_device::bset_dd_aips_dpm() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9880,7 +9880,7 @@ void m68000_mcu_device::bset_dd_aips_dpm() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9908,7 +9908,7 @@ void m68000_mcu_device::bset_dd_aips_dpm() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9944,7 +9944,7 @@ void m68000_mcu_device::bset_dd_pais_dpm() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9952,7 +9952,7 @@ void m68000_mcu_device::bset_dd_pais_dpm() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9976,7 +9976,7 @@ void m68000_mcu_device::bset_dd_pais_dpm() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10004,7 +10004,7 @@ void m68000_mcu_device::bset_dd_pais_dpm() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10038,7 +10038,7 @@ void m68000_mcu_device::bset_dd_das_dpm() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10064,11 +10064,11 @@ void m68000_mcu_device::bset_dd_das_dpm() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10091,7 +10091,7 @@ void m68000_mcu_device::bset_dd_das_dpm() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10119,7 +10119,7 @@ void m68000_mcu_device::bset_dd_das_dpm() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10151,14 +10151,14 @@ void m68000_mcu_device::bset_dd_dais_dpm() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10166,7 +10166,7 @@ void m68000_mcu_device::bset_dd_dais_dpm() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10193,7 +10193,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10222,11 +10222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10249,7 +10249,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10277,7 +10277,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10313,7 +10313,7 @@ void m68000_mcu_device::bset_dd_adr16_dpm() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10339,7 +10339,7 @@ void m68000_mcu_device::bset_dd_adr16_dpm() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10363,7 +10363,7 @@ void m68000_mcu_device::bset_dd_adr16_dpm() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10391,7 +10391,7 @@ void m68000_mcu_device::bset_dd_adr16_dpm() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10425,7 +10425,7 @@ void m68000_mcu_device::bset_dd_adr32_dpm() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10452,7 +10452,7 @@ void m68000_mcu_device::bset_dd_adr32_dpm() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10478,7 +10478,7 @@ void m68000_mcu_device::bset_dd_adr32_dpm() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10502,7 +10502,7 @@ void m68000_mcu_device::bset_dd_adr32_dpm() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10530,7 +10530,7 @@ void m68000_mcu_device::bset_dd_adr32_dpm() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10565,7 +10565,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dpm() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10591,7 +10591,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dpm() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10599,7 +10599,7 @@ void m68000_mcu_device::andi_b_imm8_ds_dpm() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10640,7 +10640,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dpm() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10665,11 +10665,11 @@ void m68000_mcu_device::andi_b_imm8_ais_dpm() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10691,7 +10691,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dpm() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10721,7 +10721,7 @@ void m68000_mcu_device::andi_b_imm8_ais_dpm() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10754,7 +10754,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dpm() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10782,12 +10782,12 @@ void m68000_mcu_device::andi_b_imm8_aips_dpm() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10810,7 +10810,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dpm() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10840,7 +10840,7 @@ void m68000_mcu_device::andi_b_imm8_aips_dpm() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10873,7 +10873,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dpm() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -10900,7 +10900,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dpm() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10908,7 +10908,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dpm() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10931,7 +10931,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dpm() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10961,7 +10961,7 @@ void m68000_mcu_device::andi_b_imm8_pais_dpm() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10994,7 +10994,7 @@ void m68000_mcu_device::andi_b_imm8_das_dpm() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11019,7 +11019,7 @@ void m68000_mcu_device::andi_b_imm8_das_dpm() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11045,11 +11045,11 @@ void m68000_mcu_device::andi_b_imm8_das_dpm() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11071,7 +11071,7 @@ void m68000_mcu_device::andi_b_imm8_das_dpm() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11101,7 +11101,7 @@ void m68000_mcu_device::andi_b_imm8_das_dpm() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11134,7 +11134,7 @@ void m68000_mcu_device::andi_b_imm8_dais_dpm() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11157,14 +11157,14 @@ void m68000_mcu_device::andi_b_imm8_dais_dpm() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11172,7 +11172,7 @@ void m68000_mcu_device::andi_b_imm8_dais_dpm() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11199,7 +11199,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11228,11 +11228,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11254,7 +11254,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11284,7 +11284,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11316,7 +11316,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dpm() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11344,7 +11344,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dpm() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11370,7 +11370,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dpm() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -11393,7 +11393,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dpm() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11423,7 +11423,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_dpm() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11455,7 +11455,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11481,7 +11481,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11508,7 +11508,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11534,7 +11534,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -11557,7 +11557,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11587,7 +11587,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_dpm() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11619,7 +11619,7 @@ void m68000_mcu_device::andi_imm8_ccr_dpm() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11644,21 +11644,21 @@ void m68000_mcu_device::andi_imm8_ccr_dpm() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11666,7 +11666,7 @@ void m68000_mcu_device::andi_imm8_ccr_dpm() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11693,11 +11693,11 @@ void m68000_mcu_device::andi_imm8_ccr_dpm() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11738,7 +11738,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dpm() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11764,7 +11764,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dpm() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11772,7 +11772,7 @@ void m68000_mcu_device::andi_w_imm16_ds_dpm() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11813,7 +11813,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dpm() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11838,11 +11838,11 @@ void m68000_mcu_device::andi_w_imm16_ais_dpm() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -11868,7 +11868,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dpm() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11898,7 +11898,7 @@ void m68000_mcu_device::andi_w_imm16_ais_dpm() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -11937,7 +11937,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dpm() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -11965,12 +11965,12 @@ void m68000_mcu_device::andi_w_imm16_aips_dpm() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -11997,7 +11997,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dpm() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12027,7 +12027,7 @@ void m68000_mcu_device::andi_w_imm16_aips_dpm() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12066,7 +12066,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dpm() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12093,7 +12093,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dpm() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12101,7 +12101,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dpm() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -12128,7 +12128,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dpm() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12158,7 +12158,7 @@ void m68000_mcu_device::andi_w_imm16_pais_dpm() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12197,7 +12197,7 @@ void m68000_mcu_device::andi_w_imm16_das_dpm() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12222,7 +12222,7 @@ void m68000_mcu_device::andi_w_imm16_das_dpm() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12248,11 +12248,11 @@ void m68000_mcu_device::andi_w_imm16_das_dpm() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12278,7 +12278,7 @@ void m68000_mcu_device::andi_w_imm16_das_dpm() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12308,7 +12308,7 @@ void m68000_mcu_device::andi_w_imm16_das_dpm() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12347,7 +12347,7 @@ void m68000_mcu_device::andi_w_imm16_dais_dpm() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12370,14 +12370,14 @@ void m68000_mcu_device::andi_w_imm16_dais_dpm() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12385,7 +12385,7 @@ void m68000_mcu_device::andi_w_imm16_dais_dpm() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12412,7 +12412,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12441,11 +12441,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -12471,7 +12471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12501,7 +12501,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12539,7 +12539,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dpm() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12567,7 +12567,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dpm() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12593,7 +12593,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dpm() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12620,7 +12620,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dpm() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12650,7 +12650,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_dpm() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12688,7 +12688,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12714,7 +12714,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12741,7 +12741,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12767,7 +12767,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -12794,7 +12794,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12824,7 +12824,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_dpm() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -12866,7 +12866,7 @@ void m68000_mcu_device::andi_i16u_sr_dpm() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12891,23 +12891,23 @@ void m68000_mcu_device::andi_i16u_sr_dpm() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -12915,7 +12915,7 @@ void m68000_mcu_device::andi_i16u_sr_dpm() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12942,11 +12942,11 @@ void m68000_mcu_device::andi_i16u_sr_dpm() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -12986,7 +12986,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dpm() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13012,7 +13012,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dpm() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13038,12 +13038,12 @@ void m68000_mcu_device::andi_l_imm32_ds_dpm() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13066,7 +13066,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dpm() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -13075,7 +13075,7 @@ void m68000_mcu_device::andi_l_imm32_ds_dpm() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -13095,7 +13095,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13121,7 +13121,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13146,7 +13146,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13174,7 +13174,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13200,7 +13200,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13228,7 +13228,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13256,7 +13256,7 @@ void m68000_mcu_device::andi_l_imm32_ais_dpm() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13294,7 +13294,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13320,7 +13320,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13345,7 +13345,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13373,11 +13373,11 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13403,7 +13403,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13431,7 +13431,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13459,7 +13459,7 @@ void m68000_mcu_device::andi_l_imm32_aips_dpm() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13497,7 +13497,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13523,7 +13523,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13547,14 +13547,14 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13581,7 +13581,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13607,7 +13607,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13635,7 +13635,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13663,7 +13663,7 @@ void m68000_mcu_device::andi_l_imm32_pais_dpm() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13701,7 +13701,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13727,7 +13727,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13752,7 +13752,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13777,7 +13777,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -13805,7 +13805,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -13831,7 +13831,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13859,7 +13859,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13887,7 +13887,7 @@ void m68000_mcu_device::andi_l_imm32_das_dpm() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -13925,7 +13925,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dpm() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13951,7 +13951,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dpm() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -13974,14 +13974,14 @@ void m68000_mcu_device::andi_l_imm32_dais_dpm() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -13989,7 +13989,7 @@ void m68000_mcu_device::andi_l_imm32_dais_dpm() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14016,7 +14016,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14044,7 +14044,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14072,7 +14072,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14098,7 +14098,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14126,7 +14126,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14154,7 +14154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14191,7 +14191,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14217,7 +14217,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14245,7 +14245,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14271,7 +14271,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14299,7 +14299,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14325,7 +14325,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14381,7 +14381,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_dpm() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14418,7 +14418,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14444,7 +14444,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14470,7 +14470,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -14497,7 +14497,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -14523,7 +14523,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14551,7 +14551,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -14577,7 +14577,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14605,7 +14605,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14633,7 +14633,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_dpm() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -14697,7 +14697,7 @@ void m68000_mcu_device::subi_b_imm8_ds_dpm() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -14769,7 +14769,7 @@ void m68000_mcu_device::subi_b_imm8_ais_dpm() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14794,7 +14794,7 @@ void m68000_mcu_device::subi_b_imm8_ais_dpm() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14886,7 +14886,7 @@ void m68000_mcu_device::subi_b_imm8_aips_dpm() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -14909,7 +14909,7 @@ void m68000_mcu_device::subi_b_imm8_aips_dpm() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15003,7 +15003,7 @@ void m68000_mcu_device::subi_b_imm8_pais_dpm() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15026,7 +15026,7 @@ void m68000_mcu_device::subi_b_imm8_pais_dpm() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15137,7 +15137,7 @@ void m68000_mcu_device::subi_b_imm8_das_dpm() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15162,7 +15162,7 @@ void m68000_mcu_device::subi_b_imm8_das_dpm() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15246,7 +15246,7 @@ void m68000_mcu_device::subi_b_imm8_dais_dpm() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -15314,7 +15314,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15339,7 +15339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15451,7 +15451,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_dpm() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15474,7 +15474,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_dpm() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15610,7 +15610,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_dpm() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -15633,7 +15633,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_dpm() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15720,7 +15720,7 @@ void m68000_mcu_device::subi_w_imm16_ds_dpm() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -15792,7 +15792,7 @@ void m68000_mcu_device::subi_w_imm16_ais_dpm() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15821,7 +15821,7 @@ void m68000_mcu_device::subi_w_imm16_ais_dpm() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15919,7 +15919,7 @@ void m68000_mcu_device::subi_w_imm16_aips_dpm() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15946,7 +15946,7 @@ void m68000_mcu_device::subi_w_imm16_aips_dpm() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16046,7 +16046,7 @@ void m68000_mcu_device::subi_w_imm16_pais_dpm() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -16073,7 +16073,7 @@ void m68000_mcu_device::subi_w_imm16_pais_dpm() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16190,7 +16190,7 @@ void m68000_mcu_device::subi_w_imm16_das_dpm() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16219,7 +16219,7 @@ void m68000_mcu_device::subi_w_imm16_das_dpm() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16309,7 +16309,7 @@ void m68000_mcu_device::subi_w_imm16_dais_dpm() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16377,7 +16377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16406,7 +16406,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16524,7 +16524,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_dpm() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16551,7 +16551,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_dpm() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16693,7 +16693,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_dpm() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -16720,7 +16720,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_dpm() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16837,7 +16837,7 @@ void m68000_mcu_device::subi_l_imm32_ds_dpm() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -16864,7 +16864,7 @@ void m68000_mcu_device::subi_l_imm32_ds_dpm() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -16941,7 +16941,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dpm() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16994,7 +16994,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dpm() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17022,7 +17022,7 @@ void m68000_mcu_device::subi_l_imm32_ais_dpm() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17136,7 +17136,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dpm() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -17192,7 +17192,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dpm() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17220,7 +17220,7 @@ void m68000_mcu_device::subi_l_imm32_aips_dpm() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17333,7 +17333,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dpm() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -17391,7 +17391,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dpm() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17419,7 +17419,7 @@ void m68000_mcu_device::subi_l_imm32_pais_dpm() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17557,7 +17557,7 @@ void m68000_mcu_device::subi_l_imm32_das_dpm() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17610,7 +17610,7 @@ void m68000_mcu_device::subi_l_imm32_das_dpm() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17638,7 +17638,7 @@ void m68000_mcu_device::subi_l_imm32_das_dpm() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17750,7 +17750,7 @@ void m68000_mcu_device::subi_l_imm32_dais_dpm() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -17817,7 +17817,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17870,7 +17870,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17898,7 +17898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18038,7 +18038,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dpm() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -18091,7 +18091,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dpm() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18119,7 +18119,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_dpm() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18283,7 +18283,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dpm() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -18336,7 +18336,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dpm() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18364,7 +18364,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_dpm() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18455,7 +18455,7 @@ void m68000_mcu_device::addi_b_imm8_ds_dpm() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -18527,7 +18527,7 @@ void m68000_mcu_device::addi_b_imm8_ais_dpm() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18552,7 +18552,7 @@ void m68000_mcu_device::addi_b_imm8_ais_dpm() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18644,7 +18644,7 @@ void m68000_mcu_device::addi_b_imm8_aips_dpm() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18667,7 +18667,7 @@ void m68000_mcu_device::addi_b_imm8_aips_dpm() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18761,7 +18761,7 @@ void m68000_mcu_device::addi_b_imm8_pais_dpm() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18784,7 +18784,7 @@ void m68000_mcu_device::addi_b_imm8_pais_dpm() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18895,7 +18895,7 @@ void m68000_mcu_device::addi_b_imm8_das_dpm() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18920,7 +18920,7 @@ void m68000_mcu_device::addi_b_imm8_das_dpm() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19004,7 +19004,7 @@ void m68000_mcu_device::addi_b_imm8_dais_dpm() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19072,7 +19072,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19097,7 +19097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19209,7 +19209,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_dpm() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19232,7 +19232,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_dpm() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19368,7 +19368,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_dpm() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -19391,7 +19391,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_dpm() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19478,7 +19478,7 @@ void m68000_mcu_device::addi_w_imm16_ds_dpm() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19550,7 +19550,7 @@ void m68000_mcu_device::addi_w_imm16_ais_dpm() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19579,7 +19579,7 @@ void m68000_mcu_device::addi_w_imm16_ais_dpm() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19677,7 +19677,7 @@ void m68000_mcu_device::addi_w_imm16_aips_dpm() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19704,7 +19704,7 @@ void m68000_mcu_device::addi_w_imm16_aips_dpm() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19804,7 +19804,7 @@ void m68000_mcu_device::addi_w_imm16_pais_dpm() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19831,7 +19831,7 @@ void m68000_mcu_device::addi_w_imm16_pais_dpm() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19948,7 +19948,7 @@ void m68000_mcu_device::addi_w_imm16_das_dpm() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19977,7 +19977,7 @@ void m68000_mcu_device::addi_w_imm16_das_dpm() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20067,7 +20067,7 @@ void m68000_mcu_device::addi_w_imm16_dais_dpm() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -20135,7 +20135,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20164,7 +20164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20282,7 +20282,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_dpm() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20309,7 +20309,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_dpm() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20451,7 +20451,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_dpm() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -20478,7 +20478,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_dpm() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20595,7 +20595,7 @@ void m68000_mcu_device::addi_l_imm32_ds_dpm() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -20622,7 +20622,7 @@ void m68000_mcu_device::addi_l_imm32_ds_dpm() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -20699,7 +20699,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dpm() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20752,7 +20752,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dpm() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20780,7 +20780,7 @@ void m68000_mcu_device::addi_l_imm32_ais_dpm() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20894,7 +20894,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dpm() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20950,7 +20950,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dpm() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20978,7 +20978,7 @@ void m68000_mcu_device::addi_l_imm32_aips_dpm() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21091,7 +21091,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dpm() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -21149,7 +21149,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dpm() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21177,7 +21177,7 @@ void m68000_mcu_device::addi_l_imm32_pais_dpm() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21315,7 +21315,7 @@ void m68000_mcu_device::addi_l_imm32_das_dpm() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21368,7 +21368,7 @@ void m68000_mcu_device::addi_l_imm32_das_dpm() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21396,7 +21396,7 @@ void m68000_mcu_device::addi_l_imm32_das_dpm() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21508,7 +21508,7 @@ void m68000_mcu_device::addi_l_imm32_dais_dpm() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -21575,7 +21575,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21628,7 +21628,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21656,7 +21656,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21796,7 +21796,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dpm() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21849,7 +21849,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dpm() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21877,7 +21877,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_dpm() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22041,7 +22041,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dpm() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22094,7 +22094,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dpm() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22122,7 +22122,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_dpm() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22188,7 +22188,7 @@ void m68000_mcu_device::btst_imm8_ds_dpm() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22217,13 +22217,13 @@ void m68000_mcu_device::btst_imm8_ds_dpm() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22255,7 +22255,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22269,7 +22269,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22292,7 +22292,7 @@ void m68000_mcu_device::btst_imm8_ais_dpm() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22317,11 +22317,11 @@ void m68000_mcu_device::btst_imm8_ais_dpm() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22343,13 +22343,13 @@ void m68000_mcu_device::btst_imm8_ais_dpm() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22390,7 +22390,7 @@ void m68000_mcu_device::btst_imm8_aips_dpm() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22418,12 +22418,12 @@ void m68000_mcu_device::btst_imm8_aips_dpm() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22446,13 +22446,13 @@ void m68000_mcu_device::btst_imm8_aips_dpm() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22493,7 +22493,7 @@ void m68000_mcu_device::btst_imm8_pais_dpm() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22520,7 +22520,7 @@ void m68000_mcu_device::btst_imm8_pais_dpm() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22528,7 +22528,7 @@ void m68000_mcu_device::btst_imm8_pais_dpm() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22551,13 +22551,13 @@ void m68000_mcu_device::btst_imm8_pais_dpm() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22598,7 +22598,7 @@ void m68000_mcu_device::btst_imm8_das_dpm() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22623,7 +22623,7 @@ void m68000_mcu_device::btst_imm8_das_dpm() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22649,11 +22649,11 @@ void m68000_mcu_device::btst_imm8_das_dpm() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22675,13 +22675,13 @@ void m68000_mcu_device::btst_imm8_das_dpm() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22722,7 +22722,7 @@ void m68000_mcu_device::btst_imm8_dais_dpm() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22745,14 +22745,14 @@ void m68000_mcu_device::btst_imm8_dais_dpm() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22760,7 +22760,7 @@ void m68000_mcu_device::btst_imm8_dais_dpm() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22787,7 +22787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22816,11 +22816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22842,13 +22842,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22888,7 +22888,7 @@ void m68000_mcu_device::btst_imm8_adr16_dpm() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -22916,7 +22916,7 @@ void m68000_mcu_device::btst_imm8_adr16_dpm() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22942,7 +22942,7 @@ void m68000_mcu_device::btst_imm8_adr16_dpm() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -22965,13 +22965,13 @@ void m68000_mcu_device::btst_imm8_adr16_dpm() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23011,7 +23011,7 @@ void m68000_mcu_device::btst_imm8_adr32_dpm() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23037,7 +23037,7 @@ void m68000_mcu_device::btst_imm8_adr32_dpm() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23064,7 +23064,7 @@ void m68000_mcu_device::btst_imm8_adr32_dpm() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23090,7 +23090,7 @@ void m68000_mcu_device::btst_imm8_adr32_dpm() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -23113,13 +23113,13 @@ void m68000_mcu_device::btst_imm8_adr32_dpm() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23159,7 +23159,7 @@ void m68000_mcu_device::btst_imm8_dpc_dpm() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23184,7 +23184,7 @@ void m68000_mcu_device::btst_imm8_dpc_dpm() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23210,11 +23210,11 @@ void m68000_mcu_device::btst_imm8_dpc_dpm() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23236,13 +23236,13 @@ void m68000_mcu_device::btst_imm8_dpc_dpm() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23282,7 +23282,7 @@ void m68000_mcu_device::btst_imm8_dpci_dpm() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23305,14 +23305,14 @@ void m68000_mcu_device::btst_imm8_dpci_dpm() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23320,7 +23320,7 @@ void m68000_mcu_device::btst_imm8_dpci_dpm() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23347,7 +23347,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23376,11 +23376,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23402,13 +23402,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23449,7 +23449,7 @@ void m68000_mcu_device::bchg_imm8_ds_dpm() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23478,13 +23478,13 @@ void m68000_mcu_device::bchg_imm8_ds_dpm() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -23516,7 +23516,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23529,14 +23529,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23559,7 +23559,7 @@ void m68000_mcu_device::bchg_imm8_ais_dpm() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23584,11 +23584,11 @@ void m68000_mcu_device::bchg_imm8_ais_dpm() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23611,7 +23611,7 @@ void m68000_mcu_device::bchg_imm8_ais_dpm() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23639,7 +23639,7 @@ void m68000_mcu_device::bchg_imm8_ais_dpm() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23674,7 +23674,7 @@ void m68000_mcu_device::bchg_imm8_aips_dpm() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23702,12 +23702,12 @@ void m68000_mcu_device::bchg_imm8_aips_dpm() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23731,7 +23731,7 @@ void m68000_mcu_device::bchg_imm8_aips_dpm() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23759,7 +23759,7 @@ void m68000_mcu_device::bchg_imm8_aips_dpm() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23794,7 +23794,7 @@ void m68000_mcu_device::bchg_imm8_pais_dpm() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23821,7 +23821,7 @@ void m68000_mcu_device::bchg_imm8_pais_dpm() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23829,7 +23829,7 @@ void m68000_mcu_device::bchg_imm8_pais_dpm() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23853,7 +23853,7 @@ void m68000_mcu_device::bchg_imm8_pais_dpm() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23881,7 +23881,7 @@ void m68000_mcu_device::bchg_imm8_pais_dpm() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23916,7 +23916,7 @@ void m68000_mcu_device::bchg_imm8_das_dpm() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23941,7 +23941,7 @@ void m68000_mcu_device::bchg_imm8_das_dpm() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -23967,11 +23967,11 @@ void m68000_mcu_device::bchg_imm8_das_dpm() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23994,7 +23994,7 @@ void m68000_mcu_device::bchg_imm8_das_dpm() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24022,7 +24022,7 @@ void m68000_mcu_device::bchg_imm8_das_dpm() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24057,7 +24057,7 @@ void m68000_mcu_device::bchg_imm8_dais_dpm() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24080,14 +24080,14 @@ void m68000_mcu_device::bchg_imm8_dais_dpm() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24095,7 +24095,7 @@ void m68000_mcu_device::bchg_imm8_dais_dpm() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24122,7 +24122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24151,11 +24151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24178,7 +24178,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24206,7 +24206,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24240,7 +24240,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dpm() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24268,7 +24268,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dpm() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24294,7 +24294,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dpm() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24318,7 +24318,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dpm() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24346,7 +24346,7 @@ void m68000_mcu_device::bchg_imm8_adr16_dpm() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24380,7 +24380,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24406,7 +24406,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24433,7 +24433,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24459,7 +24459,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -24483,7 +24483,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -24511,7 +24511,7 @@ void m68000_mcu_device::bchg_imm8_adr32_dpm() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24546,7 +24546,7 @@ void m68000_mcu_device::bclr_imm8_ds_dpm() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24575,13 +24575,13 @@ void m68000_mcu_device::bclr_imm8_ds_dpm() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24610,14 +24610,14 @@ void m68000_mcu_device::bclr_imm8_ds_dpm() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24630,18 +24630,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24664,7 +24664,7 @@ void m68000_mcu_device::bclr_imm8_ais_dpm() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24689,11 +24689,11 @@ void m68000_mcu_device::bclr_imm8_ais_dpm() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24715,12 +24715,12 @@ void m68000_mcu_device::bclr_imm8_ais_dpm() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24748,7 +24748,7 @@ void m68000_mcu_device::bclr_imm8_ais_dpm() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24783,7 +24783,7 @@ void m68000_mcu_device::bclr_imm8_aips_dpm() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24811,12 +24811,12 @@ void m68000_mcu_device::bclr_imm8_aips_dpm() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24839,12 +24839,12 @@ void m68000_mcu_device::bclr_imm8_aips_dpm() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24872,7 +24872,7 @@ void m68000_mcu_device::bclr_imm8_aips_dpm() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24907,7 +24907,7 @@ void m68000_mcu_device::bclr_imm8_pais_dpm() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -24934,7 +24934,7 @@ void m68000_mcu_device::bclr_imm8_pais_dpm() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24942,7 +24942,7 @@ void m68000_mcu_device::bclr_imm8_pais_dpm() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24965,12 +24965,12 @@ void m68000_mcu_device::bclr_imm8_pais_dpm() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24998,7 +24998,7 @@ void m68000_mcu_device::bclr_imm8_pais_dpm() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25033,7 +25033,7 @@ void m68000_mcu_device::bclr_imm8_das_dpm() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25058,7 +25058,7 @@ void m68000_mcu_device::bclr_imm8_das_dpm() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25084,11 +25084,11 @@ void m68000_mcu_device::bclr_imm8_das_dpm() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25110,12 +25110,12 @@ void m68000_mcu_device::bclr_imm8_das_dpm() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25143,7 +25143,7 @@ void m68000_mcu_device::bclr_imm8_das_dpm() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25178,7 +25178,7 @@ void m68000_mcu_device::bclr_imm8_dais_dpm() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25201,14 +25201,14 @@ void m68000_mcu_device::bclr_imm8_dais_dpm() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25216,7 +25216,7 @@ void m68000_mcu_device::bclr_imm8_dais_dpm() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25243,7 +25243,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25272,11 +25272,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25298,12 +25298,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25331,7 +25331,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25365,7 +25365,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dpm() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25393,7 +25393,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dpm() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25419,7 +25419,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dpm() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25442,12 +25442,12 @@ void m68000_mcu_device::bclr_imm8_adr16_dpm() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25475,7 +25475,7 @@ void m68000_mcu_device::bclr_imm8_adr16_dpm() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25509,7 +25509,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25535,7 +25535,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25562,7 +25562,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25588,7 +25588,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -25611,12 +25611,12 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -25644,7 +25644,7 @@ void m68000_mcu_device::bclr_imm8_adr32_dpm() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25679,7 +25679,7 @@ void m68000_mcu_device::bset_imm8_ds_dpm() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25708,13 +25708,13 @@ void m68000_mcu_device::bset_imm8_ds_dpm() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25746,7 +25746,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25759,14 +25759,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25789,7 +25789,7 @@ void m68000_mcu_device::bset_imm8_ais_dpm() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25814,11 +25814,11 @@ void m68000_mcu_device::bset_imm8_ais_dpm() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25841,7 +25841,7 @@ void m68000_mcu_device::bset_imm8_ais_dpm() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25869,7 +25869,7 @@ void m68000_mcu_device::bset_imm8_ais_dpm() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25904,7 +25904,7 @@ void m68000_mcu_device::bset_imm8_aips_dpm() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -25932,12 +25932,12 @@ void m68000_mcu_device::bset_imm8_aips_dpm() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -25961,7 +25961,7 @@ void m68000_mcu_device::bset_imm8_aips_dpm() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25989,7 +25989,7 @@ void m68000_mcu_device::bset_imm8_aips_dpm() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26024,7 +26024,7 @@ void m68000_mcu_device::bset_imm8_pais_dpm() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26051,7 +26051,7 @@ void m68000_mcu_device::bset_imm8_pais_dpm() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -26059,7 +26059,7 @@ void m68000_mcu_device::bset_imm8_pais_dpm() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -26083,7 +26083,7 @@ void m68000_mcu_device::bset_imm8_pais_dpm() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26111,7 +26111,7 @@ void m68000_mcu_device::bset_imm8_pais_dpm() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26146,7 +26146,7 @@ void m68000_mcu_device::bset_imm8_das_dpm() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26171,7 +26171,7 @@ void m68000_mcu_device::bset_imm8_das_dpm() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26197,11 +26197,11 @@ void m68000_mcu_device::bset_imm8_das_dpm() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26224,7 +26224,7 @@ void m68000_mcu_device::bset_imm8_das_dpm() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26252,7 +26252,7 @@ void m68000_mcu_device::bset_imm8_das_dpm() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26287,7 +26287,7 @@ void m68000_mcu_device::bset_imm8_dais_dpm() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26310,14 +26310,14 @@ void m68000_mcu_device::bset_imm8_dais_dpm() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26325,7 +26325,7 @@ void m68000_mcu_device::bset_imm8_dais_dpm() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26352,7 +26352,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26381,11 +26381,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26408,7 +26408,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26436,7 +26436,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26470,7 +26470,7 @@ void m68000_mcu_device::bset_imm8_adr16_dpm() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26498,7 +26498,7 @@ void m68000_mcu_device::bset_imm8_adr16_dpm() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -26524,7 +26524,7 @@ void m68000_mcu_device::bset_imm8_adr16_dpm() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26548,7 +26548,7 @@ void m68000_mcu_device::bset_imm8_adr16_dpm() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26576,7 +26576,7 @@ void m68000_mcu_device::bset_imm8_adr16_dpm() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26610,7 +26610,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26636,7 +26636,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26663,7 +26663,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26689,7 +26689,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -26713,7 +26713,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -26741,7 +26741,7 @@ void m68000_mcu_device::bset_imm8_adr32_dpm() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26776,7 +26776,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dpm() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26802,7 +26802,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dpm() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -26810,7 +26810,7 @@ void m68000_mcu_device::eori_b_imm8_ds_dpm() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26851,7 +26851,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dpm() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26876,11 +26876,11 @@ void m68000_mcu_device::eori_b_imm8_ais_dpm() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26902,7 +26902,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dpm() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26932,7 +26932,7 @@ void m68000_mcu_device::eori_b_imm8_ais_dpm() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -26965,7 +26965,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dpm() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -26993,12 +26993,12 @@ void m68000_mcu_device::eori_b_imm8_aips_dpm() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27021,7 +27021,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dpm() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27051,7 +27051,7 @@ void m68000_mcu_device::eori_b_imm8_aips_dpm() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27084,7 +27084,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dpm() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27111,7 +27111,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dpm() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27119,7 +27119,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dpm() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27142,7 +27142,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dpm() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27172,7 +27172,7 @@ void m68000_mcu_device::eori_b_imm8_pais_dpm() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27205,7 +27205,7 @@ void m68000_mcu_device::eori_b_imm8_das_dpm() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27230,7 +27230,7 @@ void m68000_mcu_device::eori_b_imm8_das_dpm() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27256,11 +27256,11 @@ void m68000_mcu_device::eori_b_imm8_das_dpm() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27282,7 +27282,7 @@ void m68000_mcu_device::eori_b_imm8_das_dpm() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27312,7 +27312,7 @@ void m68000_mcu_device::eori_b_imm8_das_dpm() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27345,7 +27345,7 @@ void m68000_mcu_device::eori_b_imm8_dais_dpm() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27368,14 +27368,14 @@ void m68000_mcu_device::eori_b_imm8_dais_dpm() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27383,7 +27383,7 @@ void m68000_mcu_device::eori_b_imm8_dais_dpm() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27410,7 +27410,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27439,11 +27439,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27465,7 +27465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27495,7 +27495,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27527,7 +27527,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dpm() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27555,7 +27555,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dpm() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -27581,7 +27581,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dpm() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -27604,7 +27604,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dpm() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27634,7 +27634,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_dpm() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27666,7 +27666,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27692,7 +27692,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27719,7 +27719,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -27745,7 +27745,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -27768,7 +27768,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27798,7 +27798,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_dpm() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27830,7 +27830,7 @@ void m68000_mcu_device::eori_imm8_ccr_dpm() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27855,21 +27855,21 @@ void m68000_mcu_device::eori_imm8_ccr_dpm() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -27877,7 +27877,7 @@ void m68000_mcu_device::eori_imm8_ccr_dpm() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27904,11 +27904,11 @@ void m68000_mcu_device::eori_imm8_ccr_dpm() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27949,7 +27949,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dpm() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -27975,7 +27975,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dpm() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -27983,7 +27983,7 @@ void m68000_mcu_device::eori_w_imm16_ds_dpm() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28024,7 +28024,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dpm() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28049,11 +28049,11 @@ void m68000_mcu_device::eori_w_imm16_ais_dpm() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28079,7 +28079,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dpm() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28109,7 +28109,7 @@ void m68000_mcu_device::eori_w_imm16_ais_dpm() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28148,7 +28148,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dpm() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28176,12 +28176,12 @@ void m68000_mcu_device::eori_w_imm16_aips_dpm() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28208,7 +28208,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dpm() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28238,7 +28238,7 @@ void m68000_mcu_device::eori_w_imm16_aips_dpm() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28277,7 +28277,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dpm() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28304,7 +28304,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dpm() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28312,7 +28312,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dpm() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28339,7 +28339,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dpm() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28369,7 +28369,7 @@ void m68000_mcu_device::eori_w_imm16_pais_dpm() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28408,7 +28408,7 @@ void m68000_mcu_device::eori_w_imm16_das_dpm() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28433,7 +28433,7 @@ void m68000_mcu_device::eori_w_imm16_das_dpm() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28459,11 +28459,11 @@ void m68000_mcu_device::eori_w_imm16_das_dpm() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28489,7 +28489,7 @@ void m68000_mcu_device::eori_w_imm16_das_dpm() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28519,7 +28519,7 @@ void m68000_mcu_device::eori_w_imm16_das_dpm() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28558,7 +28558,7 @@ void m68000_mcu_device::eori_w_imm16_dais_dpm() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28581,14 +28581,14 @@ void m68000_mcu_device::eori_w_imm16_dais_dpm() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28596,7 +28596,7 @@ void m68000_mcu_device::eori_w_imm16_dais_dpm() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28623,7 +28623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28652,11 +28652,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -28682,7 +28682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28712,7 +28712,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28750,7 +28750,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dpm() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28778,7 +28778,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dpm() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -28804,7 +28804,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dpm() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -28831,7 +28831,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dpm() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28861,7 +28861,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_dpm() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -28899,7 +28899,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28925,7 +28925,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -28952,7 +28952,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -28978,7 +28978,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -29005,7 +29005,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29035,7 +29035,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_dpm() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29077,7 +29077,7 @@ void m68000_mcu_device::eori_i16u_sr_dpm() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29102,23 +29102,23 @@ void m68000_mcu_device::eori_i16u_sr_dpm() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -29126,7 +29126,7 @@ void m68000_mcu_device::eori_i16u_sr_dpm() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29153,11 +29153,11 @@ void m68000_mcu_device::eori_i16u_sr_dpm() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29197,7 +29197,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dpm() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29223,7 +29223,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dpm() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29249,12 +29249,12 @@ void m68000_mcu_device::eori_l_imm32_ds_dpm() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29277,7 +29277,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dpm() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -29286,7 +29286,7 @@ void m68000_mcu_device::eori_l_imm32_ds_dpm() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -29306,7 +29306,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29332,7 +29332,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29357,7 +29357,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29385,7 +29385,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29411,7 +29411,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29439,7 +29439,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29467,7 +29467,7 @@ void m68000_mcu_device::eori_l_imm32_ais_dpm() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29505,7 +29505,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29531,7 +29531,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29556,7 +29556,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29584,11 +29584,11 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29614,7 +29614,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29642,7 +29642,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29670,7 +29670,7 @@ void m68000_mcu_device::eori_l_imm32_aips_dpm() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29708,7 +29708,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29734,7 +29734,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29758,14 +29758,14 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29792,7 +29792,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -29818,7 +29818,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29846,7 +29846,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29874,7 +29874,7 @@ void m68000_mcu_device::eori_l_imm32_pais_dpm() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -29912,7 +29912,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29938,7 +29938,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29963,7 +29963,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -29988,7 +29988,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30016,7 +30016,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30042,7 +30042,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30070,7 +30070,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30098,7 +30098,7 @@ void m68000_mcu_device::eori_l_imm32_das_dpm() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30136,7 +30136,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dpm() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30162,7 +30162,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dpm() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30185,14 +30185,14 @@ void m68000_mcu_device::eori_l_imm32_dais_dpm() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -30200,7 +30200,7 @@ void m68000_mcu_device::eori_l_imm32_dais_dpm() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30227,7 +30227,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30255,7 +30255,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30283,7 +30283,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30309,7 +30309,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30337,7 +30337,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30365,7 +30365,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30402,7 +30402,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30428,7 +30428,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30456,7 +30456,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30482,7 +30482,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30510,7 +30510,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30536,7 +30536,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30564,7 +30564,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30592,7 +30592,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_dpm() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30629,7 +30629,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30655,7 +30655,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30681,7 +30681,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -30708,7 +30708,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -30734,7 +30734,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30762,7 +30762,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -30788,7 +30788,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30816,7 +30816,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30844,7 +30844,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_dpm() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -30908,7 +30908,7 @@ void m68000_mcu_device::cmpi_b_imm8_ds_dpm() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -30979,7 +30979,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_dpm() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31004,7 +31004,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_dpm() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31080,7 +31080,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_dpm() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31103,7 +31103,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_dpm() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31181,7 +31181,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_dpm() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31204,7 +31204,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_dpm() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31299,7 +31299,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_dpm() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31324,7 +31324,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_dpm() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31392,7 +31392,7 @@ void m68000_mcu_device::cmpi_b_imm8_dais_dpm() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31460,7 +31460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31485,7 +31485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31581,7 +31581,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_dpm() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31604,7 +31604,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_dpm() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31724,7 +31724,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_dpm() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -31747,7 +31747,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_dpm() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31818,7 +31818,7 @@ void m68000_mcu_device::cmpi_w_imm16_ds_dpm() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -31889,7 +31889,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_dpm() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31918,7 +31918,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_dpm() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31994,7 +31994,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_dpm() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32021,7 +32021,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_dpm() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32099,7 +32099,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_dpm() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32126,7 +32126,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_dpm() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32221,7 +32221,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_dpm() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32250,7 +32250,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_dpm() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32318,7 +32318,7 @@ void m68000_mcu_device::cmpi_w_imm16_dais_dpm() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32386,7 +32386,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32415,7 +32415,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32511,7 +32511,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_dpm() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32538,7 +32538,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_dpm() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32658,7 +32658,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_dpm() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -32685,7 +32685,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_dpm() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32781,11 +32781,11 @@ void m68000_mcu_device::cmpi_l_imm32_ds_dpm() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32881,7 +32881,7 @@ void m68000_mcu_device::cmpi_l_imm32_ais_dpm() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32934,13 +32934,13 @@ void m68000_mcu_device::cmpi_l_imm32_ais_dpm() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33031,7 +33031,7 @@ void m68000_mcu_device::cmpi_l_imm32_aips_dpm() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -33087,13 +33087,13 @@ void m68000_mcu_device::cmpi_l_imm32_aips_dpm() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33183,7 +33183,7 @@ void m68000_mcu_device::cmpi_l_imm32_pais_dpm() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -33241,13 +33241,13 @@ void m68000_mcu_device::cmpi_l_imm32_pais_dpm() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33362,7 +33362,7 @@ void m68000_mcu_device::cmpi_l_imm32_das_dpm() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33415,13 +33415,13 @@ void m68000_mcu_device::cmpi_l_imm32_das_dpm() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33510,7 +33510,7 @@ void m68000_mcu_device::cmpi_l_imm32_dais_dpm() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -33577,7 +33577,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33630,13 +33630,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33753,7 +33753,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_dpm() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33806,13 +33806,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_dpm() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33953,7 +33953,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_dpm() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34006,13 +34006,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_dpm() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34057,7 +34057,7 @@ void m68000_mcu_device::move_b_ds_dd_dpm() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -34104,7 +34104,7 @@ void m68000_mcu_device::move_b_ais_dd_dpm() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34130,7 +34130,7 @@ void m68000_mcu_device::move_b_ais_dd_dpm() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34181,7 +34181,7 @@ void m68000_mcu_device::move_b_aips_dd_dpm() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34205,7 +34205,7 @@ void m68000_mcu_device::move_b_aips_dd_dpm() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34258,7 +34258,7 @@ void m68000_mcu_device::move_b_pais_dd_dpm() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34282,7 +34282,7 @@ void m68000_mcu_device::move_b_pais_dd_dpm() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34352,7 +34352,7 @@ void m68000_mcu_device::move_b_das_dd_dpm() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34378,7 +34378,7 @@ void m68000_mcu_device::move_b_das_dd_dpm() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34421,7 +34421,7 @@ void m68000_mcu_device::move_b_dais_dd_dpm() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34489,7 +34489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34515,7 +34515,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34586,7 +34586,7 @@ void m68000_mcu_device::move_b_adr16_dd_dpm() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -34610,7 +34610,7 @@ void m68000_mcu_device::move_b_adr16_dd_dpm() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34705,7 +34705,7 @@ void m68000_mcu_device::move_b_adr32_dd_dpm() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34729,7 +34729,7 @@ void m68000_mcu_device::move_b_adr32_dd_dpm() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34798,7 +34798,7 @@ void m68000_mcu_device::move_b_dpc_dd_dpm() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34824,7 +34824,7 @@ void m68000_mcu_device::move_b_dpc_dd_dpm() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34866,7 +34866,7 @@ void m68000_mcu_device::move_b_dpci_dd_dpm() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34934,7 +34934,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34960,7 +34960,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -35034,7 +35034,7 @@ void m68000_mcu_device::move_b_imm8_dd_dpm() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -35084,7 +35084,7 @@ void m68000_mcu_device::move_b_ds_aid_dpm() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35146,7 +35146,7 @@ void m68000_mcu_device::move_b_ais_aid_dpm() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35171,7 +35171,7 @@ void m68000_mcu_device::move_b_ais_aid_dpm() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35239,7 +35239,7 @@ void m68000_mcu_device::move_b_aips_aid_dpm() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35262,7 +35262,7 @@ void m68000_mcu_device::move_b_aips_aid_dpm() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35332,7 +35332,7 @@ void m68000_mcu_device::move_b_pais_aid_dpm() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35355,7 +35355,7 @@ void m68000_mcu_device::move_b_pais_aid_dpm() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35442,7 +35442,7 @@ void m68000_mcu_device::move_b_das_aid_dpm() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35467,7 +35467,7 @@ void m68000_mcu_device::move_b_das_aid_dpm() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35527,7 +35527,7 @@ void m68000_mcu_device::move_b_dais_aid_dpm() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35595,7 +35595,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35620,7 +35620,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35708,7 +35708,7 @@ void m68000_mcu_device::move_b_adr16_aid_dpm() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -35731,7 +35731,7 @@ void m68000_mcu_device::move_b_adr16_aid_dpm() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35843,7 +35843,7 @@ void m68000_mcu_device::move_b_adr32_aid_dpm() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35866,7 +35866,7 @@ void m68000_mcu_device::move_b_adr32_aid_dpm() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35952,7 +35952,7 @@ void m68000_mcu_device::move_b_dpc_aid_dpm() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35977,7 +35977,7 @@ void m68000_mcu_device::move_b_dpc_aid_dpm() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36036,7 +36036,7 @@ void m68000_mcu_device::move_b_dpci_aid_dpm() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36104,7 +36104,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36129,7 +36129,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36220,7 +36220,7 @@ void m68000_mcu_device::move_b_imm8_aid_dpm() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36285,7 +36285,7 @@ void m68000_mcu_device::move_b_ds_aipd_dpm() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36346,7 +36346,7 @@ void m68000_mcu_device::move_b_ais_aipd_dpm() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36372,7 +36372,7 @@ void m68000_mcu_device::move_b_ais_aipd_dpm() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36439,7 +36439,7 @@ void m68000_mcu_device::move_b_aips_aipd_dpm() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36463,7 +36463,7 @@ void m68000_mcu_device::move_b_aips_aipd_dpm() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36532,7 +36532,7 @@ void m68000_mcu_device::move_b_pais_aipd_dpm() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36556,7 +36556,7 @@ void m68000_mcu_device::move_b_pais_aipd_dpm() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36642,7 +36642,7 @@ void m68000_mcu_device::move_b_das_aipd_dpm() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36668,7 +36668,7 @@ void m68000_mcu_device::move_b_das_aipd_dpm() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36727,7 +36727,7 @@ void m68000_mcu_device::move_b_dais_aipd_dpm() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36795,7 +36795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36821,7 +36821,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36908,7 +36908,7 @@ void m68000_mcu_device::move_b_adr16_aipd_dpm() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -36932,7 +36932,7 @@ void m68000_mcu_device::move_b_adr16_aipd_dpm() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37043,7 +37043,7 @@ void m68000_mcu_device::move_b_adr32_aipd_dpm() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37067,7 +37067,7 @@ void m68000_mcu_device::move_b_adr32_aipd_dpm() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37152,7 +37152,7 @@ void m68000_mcu_device::move_b_dpc_aipd_dpm() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37178,7 +37178,7 @@ void m68000_mcu_device::move_b_dpc_aipd_dpm() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37236,7 +37236,7 @@ void m68000_mcu_device::move_b_dpci_aipd_dpm() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37304,7 +37304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37330,7 +37330,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37420,7 +37420,7 @@ void m68000_mcu_device::move_b_imm8_aipd_dpm() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37483,7 +37483,7 @@ void m68000_mcu_device::move_b_ds_paid_dpm() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37545,7 +37545,7 @@ void m68000_mcu_device::move_b_ais_paid_dpm() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37570,7 +37570,7 @@ void m68000_mcu_device::move_b_ais_paid_dpm() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37638,7 +37638,7 @@ void m68000_mcu_device::move_b_aips_paid_dpm() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37661,7 +37661,7 @@ void m68000_mcu_device::move_b_aips_paid_dpm() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37731,7 +37731,7 @@ void m68000_mcu_device::move_b_pais_paid_dpm() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37754,7 +37754,7 @@ void m68000_mcu_device::move_b_pais_paid_dpm() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37841,7 +37841,7 @@ void m68000_mcu_device::move_b_das_paid_dpm() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37866,7 +37866,7 @@ void m68000_mcu_device::move_b_das_paid_dpm() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37926,7 +37926,7 @@ void m68000_mcu_device::move_b_dais_paid_dpm() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37994,7 +37994,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38019,7 +38019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38107,7 +38107,7 @@ void m68000_mcu_device::move_b_adr16_paid_dpm() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -38130,7 +38130,7 @@ void m68000_mcu_device::move_b_adr16_paid_dpm() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38242,7 +38242,7 @@ void m68000_mcu_device::move_b_adr32_paid_dpm() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -38265,7 +38265,7 @@ void m68000_mcu_device::move_b_adr32_paid_dpm() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68000_mcu_device::move_b_dpc_paid_dpm() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38376,7 +38376,7 @@ void m68000_mcu_device::move_b_dpc_paid_dpm() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38435,7 +38435,7 @@ void m68000_mcu_device::move_b_dpci_paid_dpm() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38503,7 +38503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38528,7 +38528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38618,7 +38618,7 @@ void m68000_mcu_device::move_b_imm8_paid_dpm() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38706,7 +38706,7 @@ void m68000_mcu_device::move_b_ds_dad_dpm() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -38769,7 +38769,7 @@ void m68000_mcu_device::move_b_ais_dad_dpm() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38793,7 +38793,7 @@ void m68000_mcu_device::move_b_ais_dad_dpm() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68000_mcu_device::move_b_aips_dad_dpm() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -38913,7 +38913,7 @@ void m68000_mcu_device::move_b_aips_dad_dpm() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39013,7 +39013,7 @@ void m68000_mcu_device::move_b_pais_dad_dpm() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -39035,7 +39035,7 @@ void m68000_mcu_device::move_b_pais_dad_dpm() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39152,7 +39152,7 @@ void m68000_mcu_device::move_b_das_dad_dpm() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39176,7 +39176,7 @@ void m68000_mcu_device::move_b_das_dad_dpm() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39266,7 +39266,7 @@ void m68000_mcu_device::move_b_dais_dad_dpm() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39334,7 +39334,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39358,7 +39358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39476,7 +39476,7 @@ void m68000_mcu_device::move_b_adr16_dad_dpm() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -39498,7 +39498,7 @@ void m68000_mcu_device::move_b_adr16_dad_dpm() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39640,7 +39640,7 @@ void m68000_mcu_device::move_b_adr32_dad_dpm() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -39662,7 +39662,7 @@ void m68000_mcu_device::move_b_adr32_dad_dpm() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39778,7 +39778,7 @@ void m68000_mcu_device::move_b_dpc_dad_dpm() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39802,7 +39802,7 @@ void m68000_mcu_device::move_b_dpc_dad_dpm() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39891,7 +39891,7 @@ void m68000_mcu_device::move_b_dpci_dad_dpm() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39959,7 +39959,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39983,7 +39983,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40127,7 +40127,7 @@ void m68000_mcu_device::move_b_imm8_dad_dpm() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40188,7 +40188,7 @@ void m68000_mcu_device::move_b_ds_daid_dpm() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -40258,7 +40258,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40321,7 +40321,7 @@ void m68000_mcu_device::move_b_ais_daid_dpm() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40342,7 +40342,7 @@ void m68000_mcu_device::move_b_ais_daid_dpm() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40357,7 +40357,7 @@ void m68000_mcu_device::move_b_ais_daid_dpm() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40384,7 +40384,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40484,7 +40484,7 @@ void m68000_mcu_device::move_b_aips_daid_dpm() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40503,7 +40503,7 @@ void m68000_mcu_device::move_b_aips_daid_dpm() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40518,7 +40518,7 @@ void m68000_mcu_device::move_b_aips_daid_dpm() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40545,7 +40545,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40647,7 +40647,7 @@ void m68000_mcu_device::move_b_pais_daid_dpm() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40666,7 +40666,7 @@ void m68000_mcu_device::move_b_pais_daid_dpm() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40681,7 +40681,7 @@ void m68000_mcu_device::move_b_pais_daid_dpm() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40708,7 +40708,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40827,7 +40827,7 @@ void m68000_mcu_device::move_b_das_daid_dpm() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40848,7 +40848,7 @@ void m68000_mcu_device::move_b_das_daid_dpm() // 11a8 f1f8
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40863,7 +40863,7 @@ void m68000_mcu_device::move_b_das_daid_dpm() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40890,7 +40890,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40982,7 +40982,7 @@ void m68000_mcu_device::move_b_dais_daid_dpm() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41050,7 +41050,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41071,7 +41071,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41086,7 +41086,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41113,7 +41113,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41233,7 +41233,7 @@ void m68000_mcu_device::move_b_adr16_daid_dpm() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -41252,7 +41252,7 @@ void m68000_mcu_device::move_b_adr16_daid_dpm() // 11b8 f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41267,7 +41267,7 @@ void m68000_mcu_device::move_b_adr16_daid_dpm() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41294,7 +41294,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41438,7 +41438,7 @@ void m68000_mcu_device::move_b_adr32_daid_dpm() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41457,7 +41457,7 @@ void m68000_mcu_device::move_b_adr32_daid_dpm() // 11b9 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41472,7 +41472,7 @@ void m68000_mcu_device::move_b_adr32_daid_dpm() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41499,7 +41499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41617,7 +41617,7 @@ void m68000_mcu_device::move_b_dpc_daid_dpm() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41638,7 +41638,7 @@ void m68000_mcu_device::move_b_dpc_daid_dpm() // 11ba f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41653,7 +41653,7 @@ void m68000_mcu_device::move_b_dpc_daid_dpm() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41680,7 +41680,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41771,7 +41771,7 @@ void m68000_mcu_device::move_b_dpci_daid_dpm() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41839,7 +41839,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41860,7 +41860,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41875,7 +41875,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41902,7 +41902,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42020,7 +42020,7 @@ void m68000_mcu_device::move_b_imm8_daid_dpm() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -42090,7 +42090,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42154,7 +42154,7 @@ void m68000_mcu_device::move_b_ds_adr16_dpm() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42245,7 +42245,7 @@ void m68000_mcu_device::move_b_ais_adr16_dpm() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42269,7 +42269,7 @@ void m68000_mcu_device::move_b_ais_adr16_dpm() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42366,7 +42366,7 @@ void m68000_mcu_device::move_b_aips_adr16_dpm() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42388,7 +42388,7 @@ void m68000_mcu_device::move_b_aips_adr16_dpm() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42487,7 +42487,7 @@ void m68000_mcu_device::move_b_pais_adr16_dpm() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42509,7 +42509,7 @@ void m68000_mcu_device::move_b_pais_adr16_dpm() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42625,7 +42625,7 @@ void m68000_mcu_device::move_b_das_adr16_dpm() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42649,7 +42649,7 @@ void m68000_mcu_device::move_b_das_adr16_dpm() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42738,7 +42738,7 @@ void m68000_mcu_device::move_b_dais_adr16_dpm() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42806,7 +42806,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42830,7 +42830,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42947,7 +42947,7 @@ void m68000_mcu_device::move_b_adr16_adr16_dpm() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -42969,7 +42969,7 @@ void m68000_mcu_device::move_b_adr16_adr16_dpm() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43110,7 +43110,7 @@ void m68000_mcu_device::move_b_adr32_adr16_dpm() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -43132,7 +43132,7 @@ void m68000_mcu_device::move_b_adr32_adr16_dpm() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43247,7 +43247,7 @@ void m68000_mcu_device::move_b_dpc_adr16_dpm() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43271,7 +43271,7 @@ void m68000_mcu_device::move_b_dpc_adr16_dpm() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43359,7 +43359,7 @@ void m68000_mcu_device::move_b_dpci_adr16_dpm() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43427,7 +43427,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43451,7 +43451,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43570,7 +43570,7 @@ void m68000_mcu_device::move_b_imm8_adr16_dpm() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43687,7 +43687,7 @@ void m68000_mcu_device::move_b_ds_adr32_dpm() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43778,7 +43778,7 @@ void m68000_mcu_device::move_b_ais_adr32_dpm() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43802,7 +43802,7 @@ void m68000_mcu_device::move_b_ais_adr32_dpm() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43922,7 +43922,7 @@ void m68000_mcu_device::move_b_aips_adr32_dpm() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -43944,7 +43944,7 @@ void m68000_mcu_device::move_b_aips_adr32_dpm() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44066,7 +44066,7 @@ void m68000_mcu_device::move_b_pais_adr32_dpm() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -44088,7 +44088,7 @@ void m68000_mcu_device::move_b_pais_adr32_dpm() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44227,7 +44227,7 @@ void m68000_mcu_device::move_b_das_adr32_dpm() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44251,7 +44251,7 @@ void m68000_mcu_device::move_b_das_adr32_dpm() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44363,7 +44363,7 @@ void m68000_mcu_device::move_b_dais_adr32_dpm() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44431,7 +44431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44455,7 +44455,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44595,7 +44595,7 @@ void m68000_mcu_device::move_b_adr16_adr32_dpm() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -44617,7 +44617,7 @@ void m68000_mcu_device::move_b_adr16_adr32_dpm() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44781,7 +44781,7 @@ void m68000_mcu_device::move_b_adr32_adr32_dpm() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -44803,7 +44803,7 @@ void m68000_mcu_device::move_b_adr32_adr32_dpm() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44941,7 +44941,7 @@ void m68000_mcu_device::move_b_dpc_adr32_dpm() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44965,7 +44965,7 @@ void m68000_mcu_device::move_b_dpc_adr32_dpm() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45076,7 +45076,7 @@ void m68000_mcu_device::move_b_dpci_adr32_dpm() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45144,7 +45144,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45168,7 +45168,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45334,7 +45334,7 @@ void m68000_mcu_device::move_b_imm8_adr32_dpm() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45429,13 +45429,13 @@ void m68000_mcu_device::move_l_ds_dd_dpm() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -45481,14 +45481,14 @@ void m68000_mcu_device::move_l_as_dd_dpm() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45530,7 +45530,7 @@ void m68000_mcu_device::move_l_ais_dd_dpm() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45584,14 +45584,14 @@ void m68000_mcu_device::move_l_ais_dd_dpm() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45633,7 +45633,7 @@ void m68000_mcu_device::move_l_aips_dd_dpm() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45690,14 +45690,14 @@ void m68000_mcu_device::move_l_aips_dd_dpm() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45738,7 +45738,7 @@ void m68000_mcu_device::move_l_pais_dd_dpm() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -45797,14 +45797,14 @@ void m68000_mcu_device::move_l_pais_dd_dpm() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45870,7 +45870,7 @@ void m68000_mcu_device::move_l_das_dd_dpm() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -45924,14 +45924,14 @@ void m68000_mcu_device::move_l_das_dd_dpm() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45971,7 +45971,7 @@ void m68000_mcu_device::move_l_dais_dd_dpm() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46038,7 +46038,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46092,14 +46092,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46167,7 +46167,7 @@ void m68000_mcu_device::move_l_adr16_dd_dpm() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46221,14 +46221,14 @@ void m68000_mcu_device::move_l_adr16_dd_dpm() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46320,7 +46320,7 @@ void m68000_mcu_device::move_l_adr32_dd_dpm() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46374,14 +46374,14 @@ void m68000_mcu_device::move_l_adr32_dd_dpm() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46446,7 +46446,7 @@ void m68000_mcu_device::move_l_dpc_dd_dpm() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46500,14 +46500,14 @@ void m68000_mcu_device::move_l_dpc_dd_dpm() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46546,7 +46546,7 @@ void m68000_mcu_device::move_l_dpci_dd_dpm() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46613,7 +46613,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46667,14 +46667,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46769,14 +46769,14 @@ void m68000_mcu_device::move_l_imm32_dd_dpm() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46821,13 +46821,13 @@ void m68000_mcu_device::movea_l_ds_ad_dpm() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -46871,12 +46871,12 @@ void m68000_mcu_device::movea_l_as_ad_dpm() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46918,7 +46918,7 @@ void m68000_mcu_device::movea_l_ais_ad_dpm() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46972,13 +46972,13 @@ void m68000_mcu_device::movea_l_ais_ad_dpm() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47019,7 +47019,7 @@ void m68000_mcu_device::movea_l_aips_ad_dpm() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47076,13 +47076,13 @@ void m68000_mcu_device::movea_l_aips_ad_dpm() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47122,7 +47122,7 @@ void m68000_mcu_device::movea_l_pais_ad_dpm() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -47181,13 +47181,13 @@ void m68000_mcu_device::movea_l_pais_ad_dpm() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47252,7 +47252,7 @@ void m68000_mcu_device::movea_l_das_ad_dpm() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47306,13 +47306,13 @@ void m68000_mcu_device::movea_l_das_ad_dpm() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47351,7 +47351,7 @@ void m68000_mcu_device::movea_l_dais_ad_dpm() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47418,7 +47418,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47472,13 +47472,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47545,7 +47545,7 @@ void m68000_mcu_device::movea_l_adr16_ad_dpm() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47599,13 +47599,13 @@ void m68000_mcu_device::movea_l_adr16_ad_dpm() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47696,7 +47696,7 @@ void m68000_mcu_device::movea_l_adr32_ad_dpm() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -47750,13 +47750,13 @@ void m68000_mcu_device::movea_l_adr32_ad_dpm() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -47820,7 +47820,7 @@ void m68000_mcu_device::movea_l_dpc_ad_dpm() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -47874,13 +47874,13 @@ void m68000_mcu_device::movea_l_dpc_ad_dpm() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47918,7 +47918,7 @@ void m68000_mcu_device::movea_l_dpci_ad_dpm() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47985,7 +47985,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -48039,13 +48039,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -48139,13 +48139,13 @@ void m68000_mcu_device::movea_l_imm32_ad_dpm() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -48213,7 +48213,7 @@ void m68000_mcu_device::move_l_ds_aid_dpm() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48241,7 +48241,7 @@ void m68000_mcu_device::move_l_ds_aid_dpm() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48310,7 +48310,7 @@ void m68000_mcu_device::move_l_as_aid_dpm() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48338,7 +48338,7 @@ void m68000_mcu_device::move_l_as_aid_dpm() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48380,7 +48380,7 @@ void m68000_mcu_device::move_l_ais_aid_dpm() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48433,7 +48433,7 @@ void m68000_mcu_device::move_l_ais_aid_dpm() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48460,7 +48460,7 @@ void m68000_mcu_device::move_l_ais_aid_dpm() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48528,7 +48528,7 @@ void m68000_mcu_device::move_l_aips_aid_dpm() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48584,7 +48584,7 @@ void m68000_mcu_device::move_l_aips_aid_dpm() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48611,7 +48611,7 @@ void m68000_mcu_device::move_l_aips_aid_dpm() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48678,7 +48678,7 @@ void m68000_mcu_device::move_l_pais_aid_dpm() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48736,7 +48736,7 @@ void m68000_mcu_device::move_l_pais_aid_dpm() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48763,7 +48763,7 @@ void m68000_mcu_device::move_l_pais_aid_dpm() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48855,7 +48855,7 @@ void m68000_mcu_device::move_l_das_aid_dpm() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -48908,7 +48908,7 @@ void m68000_mcu_device::move_l_das_aid_dpm() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48935,7 +48935,7 @@ void m68000_mcu_device::move_l_das_aid_dpm() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49001,7 +49001,7 @@ void m68000_mcu_device::move_l_dais_aid_dpm() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49068,7 +49068,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49121,7 +49121,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49148,7 +49148,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49242,7 +49242,7 @@ void m68000_mcu_device::move_l_adr16_aid_dpm() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49295,7 +49295,7 @@ void m68000_mcu_device::move_l_adr16_aid_dpm() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49322,7 +49322,7 @@ void m68000_mcu_device::move_l_adr16_aid_dpm() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49440,7 +49440,7 @@ void m68000_mcu_device::move_l_adr32_aid_dpm() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49493,7 +49493,7 @@ void m68000_mcu_device::move_l_adr32_aid_dpm() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49520,7 +49520,7 @@ void m68000_mcu_device::move_l_adr32_aid_dpm() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49611,7 +49611,7 @@ void m68000_mcu_device::move_l_dpc_aid_dpm() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49664,7 +49664,7 @@ void m68000_mcu_device::move_l_dpc_aid_dpm() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49691,7 +49691,7 @@ void m68000_mcu_device::move_l_dpc_aid_dpm() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49756,7 +49756,7 @@ void m68000_mcu_device::move_l_dpci_aid_dpm() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49823,7 +49823,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49876,7 +49876,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49903,7 +49903,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50048,7 +50048,7 @@ void m68000_mcu_device::move_l_imm32_aid_dpm() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50076,7 +50076,7 @@ void m68000_mcu_device::move_l_imm32_aid_dpm() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68000_mcu_device::move_l_ds_aipd_dpm() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50173,7 +50173,7 @@ void m68000_mcu_device::move_l_ds_aipd_dpm() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50242,7 +50242,7 @@ void m68000_mcu_device::move_l_as_aipd_dpm() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50270,7 +50270,7 @@ void m68000_mcu_device::move_l_as_aipd_dpm() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50312,7 +50312,7 @@ void m68000_mcu_device::move_l_ais_aipd_dpm() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50365,7 +50365,7 @@ void m68000_mcu_device::move_l_ais_aipd_dpm() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50392,7 +50392,7 @@ void m68000_mcu_device::move_l_ais_aipd_dpm() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50459,7 +50459,7 @@ void m68000_mcu_device::move_l_aips_aipd_dpm() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50515,7 +50515,7 @@ void m68000_mcu_device::move_l_aips_aipd_dpm() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50542,7 +50542,7 @@ void m68000_mcu_device::move_l_aips_aipd_dpm() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50608,7 +50608,7 @@ void m68000_mcu_device::move_l_pais_aipd_dpm() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50666,7 +50666,7 @@ void m68000_mcu_device::move_l_pais_aipd_dpm() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50693,7 +50693,7 @@ void m68000_mcu_device::move_l_pais_aipd_dpm() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50784,7 +50784,7 @@ void m68000_mcu_device::move_l_das_aipd_dpm() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -50837,7 +50837,7 @@ void m68000_mcu_device::move_l_das_aipd_dpm() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50864,7 +50864,7 @@ void m68000_mcu_device::move_l_das_aipd_dpm() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50929,7 +50929,7 @@ void m68000_mcu_device::move_l_dais_aipd_dpm() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50996,7 +50996,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51049,7 +51049,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51076,7 +51076,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51169,7 +51169,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dpm() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51222,7 +51222,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dpm() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51249,7 +51249,7 @@ void m68000_mcu_device::move_l_adr16_aipd_dpm() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51366,7 +51366,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dpm() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51419,7 +51419,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dpm() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51446,7 +51446,7 @@ void m68000_mcu_device::move_l_adr32_aipd_dpm() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51536,7 +51536,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dpm() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51589,7 +51589,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dpm() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51616,7 +51616,7 @@ void m68000_mcu_device::move_l_dpc_aipd_dpm() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51680,7 +51680,7 @@ void m68000_mcu_device::move_l_dpci_aipd_dpm() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51747,7 +51747,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51800,7 +51800,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51827,7 +51827,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51971,7 +51971,7 @@ void m68000_mcu_device::move_l_imm32_aipd_dpm() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51999,7 +51999,7 @@ void m68000_mcu_device::move_l_imm32_aipd_dpm() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52043,7 +52043,7 @@ void m68000_mcu_device::move_l_ds_paid_dpm() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52071,7 +52071,7 @@ void m68000_mcu_device::move_l_ds_paid_dpm() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52139,7 +52139,7 @@ void m68000_mcu_device::move_l_as_paid_dpm() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52167,7 +52167,7 @@ void m68000_mcu_device::move_l_as_paid_dpm() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52233,7 +52233,7 @@ void m68000_mcu_device::move_l_ais_paid_dpm() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52286,7 +52286,7 @@ void m68000_mcu_device::move_l_ais_paid_dpm() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_mcu_device::move_l_ais_paid_dpm() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52380,7 +52380,7 @@ void m68000_mcu_device::move_l_aips_paid_dpm() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52436,7 +52436,7 @@ void m68000_mcu_device::move_l_aips_paid_dpm() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52464,7 +52464,7 @@ void m68000_mcu_device::move_l_aips_paid_dpm() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52529,7 +52529,7 @@ void m68000_mcu_device::move_l_pais_paid_dpm() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52587,7 +52587,7 @@ void m68000_mcu_device::move_l_pais_paid_dpm() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52615,7 +52615,7 @@ void m68000_mcu_device::move_l_pais_paid_dpm() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52705,7 +52705,7 @@ void m68000_mcu_device::move_l_das_paid_dpm() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52758,7 +52758,7 @@ void m68000_mcu_device::move_l_das_paid_dpm() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52786,7 +52786,7 @@ void m68000_mcu_device::move_l_das_paid_dpm() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52850,7 +52850,7 @@ void m68000_mcu_device::move_l_dais_paid_dpm() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52917,7 +52917,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52970,7 +52970,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52998,7 +52998,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53090,7 +53090,7 @@ void m68000_mcu_device::move_l_adr16_paid_dpm() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -53143,7 +53143,7 @@ void m68000_mcu_device::move_l_adr16_paid_dpm() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53171,7 +53171,7 @@ void m68000_mcu_device::move_l_adr16_paid_dpm() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53287,7 +53287,7 @@ void m68000_mcu_device::move_l_adr32_paid_dpm() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53340,7 +53340,7 @@ void m68000_mcu_device::move_l_adr32_paid_dpm() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53368,7 +53368,7 @@ void m68000_mcu_device::move_l_adr32_paid_dpm() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53457,7 +53457,7 @@ void m68000_mcu_device::move_l_dpc_paid_dpm() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53510,7 +53510,7 @@ void m68000_mcu_device::move_l_dpc_paid_dpm() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53538,7 +53538,7 @@ void m68000_mcu_device::move_l_dpc_paid_dpm() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53601,7 +53601,7 @@ void m68000_mcu_device::move_l_dpci_paid_dpm() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53668,7 +53668,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53721,7 +53721,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53749,7 +53749,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53867,7 +53867,7 @@ void m68000_mcu_device::move_l_imm32_paid_dpm() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53895,7 +53895,7 @@ void m68000_mcu_device::move_l_imm32_paid_dpm() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53987,7 +53987,7 @@ void m68000_mcu_device::move_l_ds_dad_dpm() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54014,7 +54014,7 @@ void m68000_mcu_device::move_l_ds_dad_dpm() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54042,7 +54042,7 @@ void m68000_mcu_device::move_l_ds_dad_dpm() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54110,7 +54110,7 @@ void m68000_mcu_device::move_l_as_dad_dpm() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54137,7 +54137,7 @@ void m68000_mcu_device::move_l_as_dad_dpm() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54165,7 +54165,7 @@ void m68000_mcu_device::move_l_as_dad_dpm() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54207,7 +54207,7 @@ void m68000_mcu_device::move_l_ais_dad_dpm() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54259,7 +54259,7 @@ void m68000_mcu_device::move_l_ais_dad_dpm() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54287,7 +54287,7 @@ void m68000_mcu_device::move_l_ais_dad_dpm() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54384,7 +54384,7 @@ void m68000_mcu_device::move_l_aips_dad_dpm() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54439,7 +54439,7 @@ void m68000_mcu_device::move_l_aips_dad_dpm() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54467,7 +54467,7 @@ void m68000_mcu_device::move_l_aips_dad_dpm() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54563,7 +54563,7 @@ void m68000_mcu_device::move_l_pais_dad_dpm() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54620,7 +54620,7 @@ void m68000_mcu_device::move_l_pais_dad_dpm() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54648,7 +54648,7 @@ void m68000_mcu_device::move_l_pais_dad_dpm() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54769,7 +54769,7 @@ void m68000_mcu_device::move_l_das_dad_dpm() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -54821,7 +54821,7 @@ void m68000_mcu_device::move_l_das_dad_dpm() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54849,7 +54849,7 @@ void m68000_mcu_device::move_l_das_dad_dpm() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54944,7 +54944,7 @@ void m68000_mcu_device::move_l_dais_dad_dpm() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55011,7 +55011,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55063,7 +55063,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55091,7 +55091,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55214,7 +55214,7 @@ void m68000_mcu_device::move_l_adr16_dad_dpm() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55266,7 +55266,7 @@ void m68000_mcu_device::move_l_adr16_dad_dpm() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55294,7 +55294,7 @@ void m68000_mcu_device::move_l_adr16_dad_dpm() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55441,7 +55441,7 @@ void m68000_mcu_device::move_l_adr32_dad_dpm() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55493,7 +55493,7 @@ void m68000_mcu_device::move_l_adr32_dad_dpm() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55521,7 +55521,7 @@ void m68000_mcu_device::move_l_adr32_dad_dpm() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55641,7 +55641,7 @@ void m68000_mcu_device::move_l_dpc_dad_dpm() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55693,7 +55693,7 @@ void m68000_mcu_device::move_l_dpc_dad_dpm() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55721,7 +55721,7 @@ void m68000_mcu_device::move_l_dpc_dad_dpm() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55815,7 +55815,7 @@ void m68000_mcu_device::move_l_dpci_dad_dpm() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55882,7 +55882,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55934,7 +55934,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55962,7 +55962,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56135,7 +56135,7 @@ void m68000_mcu_device::move_l_imm32_dad_dpm() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56162,7 +56162,7 @@ void m68000_mcu_device::move_l_imm32_dad_dpm() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56190,7 +56190,7 @@ void m68000_mcu_device::move_l_imm32_dad_dpm() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56230,7 +56230,7 @@ void m68000_mcu_device::move_l_ds_daid_dpm() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56300,7 +56300,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56327,7 +56327,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56355,7 +56355,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56395,7 +56395,7 @@ void m68000_mcu_device::move_l_as_daid_dpm() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56465,7 +56465,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56492,7 +56492,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56520,7 +56520,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56562,7 +56562,7 @@ void m68000_mcu_device::move_l_ais_daid_dpm() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56611,7 +56611,7 @@ void m68000_mcu_device::move_l_ais_daid_dpm() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56626,7 +56626,7 @@ void m68000_mcu_device::move_l_ais_daid_dpm() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56653,7 +56653,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56683,7 +56683,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56780,7 +56780,7 @@ void m68000_mcu_device::move_l_aips_daid_dpm() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56832,7 +56832,7 @@ void m68000_mcu_device::move_l_aips_daid_dpm() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56847,7 +56847,7 @@ void m68000_mcu_device::move_l_aips_daid_dpm() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56874,7 +56874,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56904,7 +56904,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57000,7 +57000,7 @@ void m68000_mcu_device::move_l_pais_daid_dpm() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57054,7 +57054,7 @@ void m68000_mcu_device::move_l_pais_daid_dpm() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57069,7 +57069,7 @@ void m68000_mcu_device::move_l_pais_daid_dpm() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57096,7 +57096,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57126,7 +57126,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57247,7 +57247,7 @@ void m68000_mcu_device::move_l_das_daid_dpm() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57296,7 +57296,7 @@ void m68000_mcu_device::move_l_das_daid_dpm() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57311,7 +57311,7 @@ void m68000_mcu_device::move_l_das_daid_dpm() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57338,7 +57338,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57368,7 +57368,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57463,7 +57463,7 @@ void m68000_mcu_device::move_l_dais_daid_dpm() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57530,7 +57530,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57579,7 +57579,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57594,7 +57594,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57621,7 +57621,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57651,7 +57651,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57774,7 +57774,7 @@ void m68000_mcu_device::move_l_adr16_daid_dpm() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57823,7 +57823,7 @@ void m68000_mcu_device::move_l_adr16_daid_dpm() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57838,7 +57838,7 @@ void m68000_mcu_device::move_l_adr16_daid_dpm() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57865,7 +57865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57895,7 +57895,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58042,7 +58042,7 @@ void m68000_mcu_device::move_l_adr32_daid_dpm() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -58091,7 +58091,7 @@ void m68000_mcu_device::move_l_adr32_daid_dpm() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58106,7 +58106,7 @@ void m68000_mcu_device::move_l_adr32_daid_dpm() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58133,7 +58133,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58163,7 +58163,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58283,7 +58283,7 @@ void m68000_mcu_device::move_l_dpc_daid_dpm() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58332,7 +58332,7 @@ void m68000_mcu_device::move_l_dpc_daid_dpm() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58347,7 +58347,7 @@ void m68000_mcu_device::move_l_dpc_daid_dpm() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58374,7 +58374,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58404,7 +58404,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58498,7 +58498,7 @@ void m68000_mcu_device::move_l_dpci_daid_dpm() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58565,7 +58565,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58614,7 +58614,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58629,7 +58629,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58656,7 +58656,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58686,7 +58686,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58831,7 +58831,7 @@ void m68000_mcu_device::move_l_imm32_daid_dpm() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -58901,7 +58901,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58928,7 +58928,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58956,7 +58956,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58999,7 +58999,7 @@ void m68000_mcu_device::move_l_ds_adr16_dpm() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59027,7 +59027,7 @@ void m68000_mcu_device::move_l_ds_adr16_dpm() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59125,7 +59125,7 @@ void m68000_mcu_device::move_l_as_adr16_dpm() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59153,7 +59153,7 @@ void m68000_mcu_device::move_l_as_adr16_dpm() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59249,7 +59249,7 @@ void m68000_mcu_device::move_l_ais_adr16_dpm() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59301,7 +59301,7 @@ void m68000_mcu_device::move_l_ais_adr16_dpm() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59329,7 +59329,7 @@ void m68000_mcu_device::move_l_ais_adr16_dpm() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59425,7 +59425,7 @@ void m68000_mcu_device::move_l_aips_adr16_dpm() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59480,7 +59480,7 @@ void m68000_mcu_device::move_l_aips_adr16_dpm() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59508,7 +59508,7 @@ void m68000_mcu_device::move_l_aips_adr16_dpm() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59603,7 +59603,7 @@ void m68000_mcu_device::move_l_pais_adr16_dpm() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59660,7 +59660,7 @@ void m68000_mcu_device::move_l_pais_adr16_dpm() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59688,7 +59688,7 @@ void m68000_mcu_device::move_l_pais_adr16_dpm() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59808,7 +59808,7 @@ void m68000_mcu_device::move_l_das_adr16_dpm() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -59860,7 +59860,7 @@ void m68000_mcu_device::move_l_das_adr16_dpm() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59888,7 +59888,7 @@ void m68000_mcu_device::move_l_das_adr16_dpm() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59982,7 +59982,7 @@ void m68000_mcu_device::move_l_dais_adr16_dpm() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60049,7 +60049,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60101,7 +60101,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60129,7 +60129,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60251,7 +60251,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dpm() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60303,7 +60303,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dpm() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60331,7 +60331,7 @@ void m68000_mcu_device::move_l_adr16_adr16_dpm() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60477,7 +60477,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dpm() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60529,7 +60529,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dpm() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60557,7 +60557,7 @@ void m68000_mcu_device::move_l_adr32_adr16_dpm() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60676,7 +60676,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dpm() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60728,7 +60728,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dpm() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60756,7 +60756,7 @@ void m68000_mcu_device::move_l_dpc_adr16_dpm() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60849,7 +60849,7 @@ void m68000_mcu_device::move_l_dpci_adr16_dpm() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60916,7 +60916,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60968,7 +60968,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60996,7 +60996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61144,7 +61144,7 @@ void m68000_mcu_device::move_l_imm32_adr16_dpm() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61172,7 +61172,7 @@ void m68000_mcu_device::move_l_imm32_adr16_dpm() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61294,7 +61294,7 @@ void m68000_mcu_device::move_l_ds_adr32_dpm() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61322,7 +61322,7 @@ void m68000_mcu_device::move_l_ds_adr32_dpm() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61444,7 +61444,7 @@ void m68000_mcu_device::move_l_as_adr32_dpm() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61472,7 +61472,7 @@ void m68000_mcu_device::move_l_as_adr32_dpm() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61568,7 +61568,7 @@ void m68000_mcu_device::move_l_ais_adr32_dpm() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61621,7 +61621,7 @@ void m68000_mcu_device::move_l_ais_adr32_dpm() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61647,7 +61647,7 @@ void m68000_mcu_device::move_l_ais_adr32_dpm() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61674,7 +61674,7 @@ void m68000_mcu_device::move_l_ais_adr32_dpm() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61769,7 +61769,7 @@ void m68000_mcu_device::move_l_aips_adr32_dpm() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61825,7 +61825,7 @@ void m68000_mcu_device::move_l_aips_adr32_dpm() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61851,7 +61851,7 @@ void m68000_mcu_device::move_l_aips_adr32_dpm() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61878,7 +61878,7 @@ void m68000_mcu_device::move_l_aips_adr32_dpm() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61972,7 +61972,7 @@ void m68000_mcu_device::move_l_pais_adr32_dpm() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62030,7 +62030,7 @@ void m68000_mcu_device::move_l_pais_adr32_dpm() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62056,7 +62056,7 @@ void m68000_mcu_device::move_l_pais_adr32_dpm() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62083,7 +62083,7 @@ void m68000_mcu_device::move_l_pais_adr32_dpm() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62202,7 +62202,7 @@ void m68000_mcu_device::move_l_das_adr32_dpm() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62255,7 +62255,7 @@ void m68000_mcu_device::move_l_das_adr32_dpm() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62281,7 +62281,7 @@ void m68000_mcu_device::move_l_das_adr32_dpm() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62308,7 +62308,7 @@ void m68000_mcu_device::move_l_das_adr32_dpm() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62401,7 +62401,7 @@ void m68000_mcu_device::move_l_dais_adr32_dpm() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62468,7 +62468,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62521,7 +62521,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62547,7 +62547,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62574,7 +62574,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62695,7 +62695,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dpm() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62748,7 +62748,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dpm() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62774,7 +62774,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dpm() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62801,7 +62801,7 @@ void m68000_mcu_device::move_l_adr16_adr32_dpm() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62946,7 +62946,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dpm() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -62999,7 +62999,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dpm() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -63025,7 +63025,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dpm() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63052,7 +63052,7 @@ void m68000_mcu_device::move_l_adr32_adr32_dpm() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63170,7 +63170,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dpm() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63223,7 +63223,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dpm() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63249,7 +63249,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dpm() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63276,7 +63276,7 @@ void m68000_mcu_device::move_l_dpc_adr32_dpm() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63368,7 +63368,7 @@ void m68000_mcu_device::move_l_dpci_adr32_dpm() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63435,7 +63435,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63488,7 +63488,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63514,7 +63514,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63541,7 +63541,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63712,7 +63712,7 @@ void m68000_mcu_device::move_l_imm32_adr32_dpm() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63740,7 +63740,7 @@ void m68000_mcu_device::move_l_imm32_adr32_dpm() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63840,7 +63840,7 @@ void m68000_mcu_device::move_w_ds_dd_dpm() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63890,7 +63890,7 @@ void m68000_mcu_device::move_w_as_dd_dpm() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63937,7 +63937,7 @@ void m68000_mcu_device::move_w_ais_dd_dpm() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -63967,7 +63967,7 @@ void m68000_mcu_device::move_w_ais_dd_dpm() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64018,7 +64018,7 @@ void m68000_mcu_device::move_w_aips_dd_dpm() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64046,7 +64046,7 @@ void m68000_mcu_device::move_w_aips_dd_dpm() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64099,7 +64099,7 @@ void m68000_mcu_device::move_w_pais_dd_dpm() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64127,7 +64127,7 @@ void m68000_mcu_device::move_w_pais_dd_dpm() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64197,7 +64197,7 @@ void m68000_mcu_device::move_w_das_dd_dpm() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64227,7 +64227,7 @@ void m68000_mcu_device::move_w_das_dd_dpm() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64270,7 +64270,7 @@ void m68000_mcu_device::move_w_dais_dd_dpm() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64338,7 +64338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64368,7 +64368,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64439,7 +64439,7 @@ void m68000_mcu_device::move_w_adr16_dd_dpm() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -64467,7 +64467,7 @@ void m68000_mcu_device::move_w_adr16_dd_dpm() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64562,7 +64562,7 @@ void m68000_mcu_device::move_w_adr32_dd_dpm() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64590,7 +64590,7 @@ void m68000_mcu_device::move_w_adr32_dd_dpm() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64659,7 +64659,7 @@ void m68000_mcu_device::move_w_dpc_dd_dpm() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64689,7 +64689,7 @@ void m68000_mcu_device::move_w_dpc_dd_dpm() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64731,7 +64731,7 @@ void m68000_mcu_device::move_w_dpci_dd_dpm() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64799,7 +64799,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64829,7 +64829,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64903,7 +64903,7 @@ void m68000_mcu_device::move_w_imm16_dd_dpm() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -64957,7 +64957,7 @@ void m68000_mcu_device::movea_w_ds_ad_dpm() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -65004,7 +65004,7 @@ void m68000_mcu_device::movea_w_as_ad_dpm() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65046,7 +65046,7 @@ void m68000_mcu_device::movea_w_ais_ad_dpm() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65124,7 +65124,7 @@ void m68000_mcu_device::movea_w_aips_ad_dpm() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65202,7 +65202,7 @@ void m68000_mcu_device::movea_w_pais_ad_dpm() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65297,7 +65297,7 @@ void m68000_mcu_device::movea_w_das_ad_dpm() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65367,7 +65367,7 @@ void m68000_mcu_device::movea_w_dais_ad_dpm() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65435,7 +65435,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65533,7 +65533,7 @@ void m68000_mcu_device::movea_w_adr16_ad_dpm() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -65653,7 +65653,7 @@ void m68000_mcu_device::movea_w_adr32_ad_dpm() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -65747,7 +65747,7 @@ void m68000_mcu_device::movea_w_dpc_ad_dpm() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65816,7 +65816,7 @@ void m68000_mcu_device::movea_w_dpci_ad_dpm() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65884,7 +65884,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65989,7 +65989,7 @@ void m68000_mcu_device::movea_w_imm16_ad_dpm() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -66033,7 +66033,7 @@ void m68000_mcu_device::move_w_ds_aid_dpm() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66104,7 +66104,7 @@ void m68000_mcu_device::move_w_as_aid_dpm() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66172,7 +66172,7 @@ void m68000_mcu_device::move_w_ais_aid_dpm() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66201,7 +66201,7 @@ void m68000_mcu_device::move_w_ais_aid_dpm() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68000_mcu_device::move_w_aips_aid_dpm() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66302,7 +66302,7 @@ void m68000_mcu_device::move_w_aips_aid_dpm() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66378,7 +66378,7 @@ void m68000_mcu_device::move_w_pais_aid_dpm() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66405,7 +66405,7 @@ void m68000_mcu_device::move_w_pais_aid_dpm() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66498,7 +66498,7 @@ void m68000_mcu_device::move_w_das_aid_dpm() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66527,7 +66527,7 @@ void m68000_mcu_device::move_w_das_aid_dpm() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66593,7 +66593,7 @@ void m68000_mcu_device::move_w_dais_aid_dpm() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66661,7 +66661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66690,7 +66690,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66784,7 +66784,7 @@ void m68000_mcu_device::move_w_adr16_aid_dpm() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -66811,7 +66811,7 @@ void m68000_mcu_device::move_w_adr16_aid_dpm() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66929,7 +66929,7 @@ void m68000_mcu_device::move_w_adr32_aid_dpm() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66956,7 +66956,7 @@ void m68000_mcu_device::move_w_adr32_aid_dpm() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67048,7 +67048,7 @@ void m68000_mcu_device::move_w_dpc_aid_dpm() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67077,7 +67077,7 @@ void m68000_mcu_device::move_w_dpc_aid_dpm() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67142,7 +67142,7 @@ void m68000_mcu_device::move_w_dpci_aid_dpm() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67210,7 +67210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67239,7 +67239,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67336,7 +67336,7 @@ void m68000_mcu_device::move_w_imm16_aid_dpm() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67407,7 +67407,7 @@ void m68000_mcu_device::move_w_ds_aipd_dpm() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67477,7 +67477,7 @@ void m68000_mcu_device::move_w_as_aipd_dpm() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67544,7 +67544,7 @@ void m68000_mcu_device::move_w_ais_aipd_dpm() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67574,7 +67574,7 @@ void m68000_mcu_device::move_w_ais_aipd_dpm() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67647,7 +67647,7 @@ void m68000_mcu_device::move_w_aips_aipd_dpm() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67675,7 +67675,7 @@ void m68000_mcu_device::move_w_aips_aipd_dpm() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67750,7 +67750,7 @@ void m68000_mcu_device::move_w_pais_aipd_dpm() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67778,7 +67778,7 @@ void m68000_mcu_device::move_w_pais_aipd_dpm() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67870,7 +67870,7 @@ void m68000_mcu_device::move_w_das_aipd_dpm() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67900,7 +67900,7 @@ void m68000_mcu_device::move_w_das_aipd_dpm() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67965,7 +67965,7 @@ void m68000_mcu_device::move_w_dais_aipd_dpm() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68033,7 +68033,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68063,7 +68063,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68156,7 +68156,7 @@ void m68000_mcu_device::move_w_adr16_aipd_dpm() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -68184,7 +68184,7 @@ void m68000_mcu_device::move_w_adr16_aipd_dpm() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68301,7 +68301,7 @@ void m68000_mcu_device::move_w_adr32_aipd_dpm() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -68329,7 +68329,7 @@ void m68000_mcu_device::move_w_adr32_aipd_dpm() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68420,7 +68420,7 @@ void m68000_mcu_device::move_w_dpc_aipd_dpm() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68450,7 +68450,7 @@ void m68000_mcu_device::move_w_dpc_aipd_dpm() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68514,7 +68514,7 @@ void m68000_mcu_device::move_w_dpci_aipd_dpm() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68582,7 +68582,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68612,7 +68612,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68708,7 +68708,7 @@ void m68000_mcu_device::move_w_imm16_aipd_dpm() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68777,7 +68777,7 @@ void m68000_mcu_device::move_w_ds_paid_dpm() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68847,7 +68847,7 @@ void m68000_mcu_device::move_w_as_paid_dpm() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68915,7 +68915,7 @@ void m68000_mcu_device::move_w_ais_paid_dpm() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68944,7 +68944,7 @@ void m68000_mcu_device::move_w_ais_paid_dpm() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69018,7 +69018,7 @@ void m68000_mcu_device::move_w_aips_paid_dpm() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69045,7 +69045,7 @@ void m68000_mcu_device::move_w_aips_paid_dpm() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69121,7 +69121,7 @@ void m68000_mcu_device::move_w_pais_paid_dpm() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69148,7 +69148,7 @@ void m68000_mcu_device::move_w_pais_paid_dpm() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69241,7 +69241,7 @@ void m68000_mcu_device::move_w_das_paid_dpm() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69270,7 +69270,7 @@ void m68000_mcu_device::move_w_das_paid_dpm() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69336,7 +69336,7 @@ void m68000_mcu_device::move_w_dais_paid_dpm() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69404,7 +69404,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69433,7 +69433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69527,7 +69527,7 @@ void m68000_mcu_device::move_w_adr16_paid_dpm() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -69554,7 +69554,7 @@ void m68000_mcu_device::move_w_adr16_paid_dpm() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69672,7 +69672,7 @@ void m68000_mcu_device::move_w_adr32_paid_dpm() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69699,7 +69699,7 @@ void m68000_mcu_device::move_w_adr32_paid_dpm() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69791,7 +69791,7 @@ void m68000_mcu_device::move_w_dpc_paid_dpm() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69820,7 +69820,7 @@ void m68000_mcu_device::move_w_dpc_paid_dpm() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69885,7 +69885,7 @@ void m68000_mcu_device::move_w_dpci_paid_dpm() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69953,7 +69953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69982,7 +69982,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70078,7 +70078,7 @@ void m68000_mcu_device::move_w_imm16_paid_dpm() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70172,7 +70172,7 @@ void m68000_mcu_device::move_w_ds_dad_dpm() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70267,7 +70267,7 @@ void m68000_mcu_device::move_w_as_dad_dpm() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70336,7 +70336,7 @@ void m68000_mcu_device::move_w_ais_dad_dpm() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70364,7 +70364,7 @@ void m68000_mcu_device::move_w_ais_dad_dpm() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70468,7 +70468,7 @@ void m68000_mcu_device::move_w_aips_dad_dpm() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70494,7 +70494,7 @@ void m68000_mcu_device::move_w_aips_dad_dpm() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70600,7 +70600,7 @@ void m68000_mcu_device::move_w_pais_dad_dpm() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70626,7 +70626,7 @@ void m68000_mcu_device::move_w_pais_dad_dpm() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70749,7 +70749,7 @@ void m68000_mcu_device::move_w_das_dad_dpm() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70777,7 +70777,7 @@ void m68000_mcu_device::move_w_das_dad_dpm() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70873,7 +70873,7 @@ void m68000_mcu_device::move_w_dais_dad_dpm() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -70941,7 +70941,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70969,7 +70969,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71093,7 +71093,7 @@ void m68000_mcu_device::move_w_adr16_dad_dpm() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -71119,7 +71119,7 @@ void m68000_mcu_device::move_w_adr16_dad_dpm() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71267,7 +71267,7 @@ void m68000_mcu_device::move_w_adr32_dad_dpm() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -71293,7 +71293,7 @@ void m68000_mcu_device::move_w_adr32_dad_dpm() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71415,7 +71415,7 @@ void m68000_mcu_device::move_w_dpc_dad_dpm() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71443,7 +71443,7 @@ void m68000_mcu_device::move_w_dpc_dad_dpm() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71538,7 +71538,7 @@ void m68000_mcu_device::move_w_dpci_dad_dpm() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71606,7 +71606,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71634,7 +71634,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71784,7 +71784,7 @@ void m68000_mcu_device::move_w_imm16_dad_dpm() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71851,7 +71851,7 @@ void m68000_mcu_device::move_w_ds_daid_dpm() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -71921,7 +71921,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71988,7 +71988,7 @@ void m68000_mcu_device::move_w_as_daid_dpm() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -72058,7 +72058,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72127,7 +72127,7 @@ void m68000_mcu_device::move_w_ais_daid_dpm() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72152,7 +72152,7 @@ void m68000_mcu_device::move_w_ais_daid_dpm() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72167,7 +72167,7 @@ void m68000_mcu_device::move_w_ais_daid_dpm() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72194,7 +72194,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72300,7 +72300,7 @@ void m68000_mcu_device::move_w_aips_daid_dpm() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72323,7 +72323,7 @@ void m68000_mcu_device::move_w_aips_daid_dpm() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72338,7 +72338,7 @@ void m68000_mcu_device::move_w_aips_daid_dpm() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72365,7 +72365,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72473,7 +72473,7 @@ void m68000_mcu_device::move_w_pais_daid_dpm() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72496,7 +72496,7 @@ void m68000_mcu_device::move_w_pais_daid_dpm() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72511,7 +72511,7 @@ void m68000_mcu_device::move_w_pais_daid_dpm() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72538,7 +72538,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72663,7 +72663,7 @@ void m68000_mcu_device::move_w_das_daid_dpm() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72688,7 +72688,7 @@ void m68000_mcu_device::move_w_das_daid_dpm() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72703,7 +72703,7 @@ void m68000_mcu_device::move_w_das_daid_dpm() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72730,7 +72730,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72828,7 +72828,7 @@ void m68000_mcu_device::move_w_dais_daid_dpm() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72896,7 +72896,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72921,7 +72921,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72936,7 +72936,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72963,7 +72963,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73089,7 +73089,7 @@ void m68000_mcu_device::move_w_adr16_daid_dpm() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -73112,7 +73112,7 @@ void m68000_mcu_device::move_w_adr16_daid_dpm() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73127,7 +73127,7 @@ void m68000_mcu_device::move_w_adr16_daid_dpm() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73154,7 +73154,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73304,7 +73304,7 @@ void m68000_mcu_device::move_w_adr32_daid_dpm() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -73327,7 +73327,7 @@ void m68000_mcu_device::move_w_adr32_daid_dpm() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73342,7 +73342,7 @@ void m68000_mcu_device::move_w_adr32_daid_dpm() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73369,7 +73369,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73493,7 +73493,7 @@ void m68000_mcu_device::move_w_dpc_daid_dpm() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73518,7 +73518,7 @@ void m68000_mcu_device::move_w_dpc_daid_dpm() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73533,7 +73533,7 @@ void m68000_mcu_device::move_w_dpc_daid_dpm() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73560,7 +73560,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73657,7 +73657,7 @@ void m68000_mcu_device::move_w_dpci_daid_dpm() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -73725,7 +73725,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73750,7 +73750,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73765,7 +73765,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73792,7 +73792,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73916,7 +73916,7 @@ void m68000_mcu_device::move_w_imm16_daid_dpm() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -73986,7 +73986,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74056,7 +74056,7 @@ void m68000_mcu_device::move_w_ds_adr16_dpm() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74155,7 +74155,7 @@ void m68000_mcu_device::move_w_as_adr16_dpm() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74252,7 +74252,7 @@ void m68000_mcu_device::move_w_ais_adr16_dpm() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74280,7 +74280,7 @@ void m68000_mcu_device::move_w_ais_adr16_dpm() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74383,7 +74383,7 @@ void m68000_mcu_device::move_w_aips_adr16_dpm() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74409,7 +74409,7 @@ void m68000_mcu_device::move_w_aips_adr16_dpm() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74514,7 +74514,7 @@ void m68000_mcu_device::move_w_pais_adr16_dpm() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74540,7 +74540,7 @@ void m68000_mcu_device::move_w_pais_adr16_dpm() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74662,7 +74662,7 @@ void m68000_mcu_device::move_w_das_adr16_dpm() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74690,7 +74690,7 @@ void m68000_mcu_device::move_w_das_adr16_dpm() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74785,7 +74785,7 @@ void m68000_mcu_device::move_w_dais_adr16_dpm() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74853,7 +74853,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74881,7 +74881,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75004,7 +75004,7 @@ void m68000_mcu_device::move_w_adr16_adr16_dpm() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -75030,7 +75030,7 @@ void m68000_mcu_device::move_w_adr16_adr16_dpm() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75177,7 +75177,7 @@ void m68000_mcu_device::move_w_adr32_adr16_dpm() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75203,7 +75203,7 @@ void m68000_mcu_device::move_w_adr32_adr16_dpm() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75324,7 +75324,7 @@ void m68000_mcu_device::move_w_dpc_adr16_dpm() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75352,7 +75352,7 @@ void m68000_mcu_device::move_w_dpc_adr16_dpm() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75446,7 +75446,7 @@ void m68000_mcu_device::move_w_dpci_adr16_dpm() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75514,7 +75514,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75542,7 +75542,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75667,7 +75667,7 @@ void m68000_mcu_device::move_w_imm16_adr16_dpm() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75790,7 +75790,7 @@ void m68000_mcu_device::move_w_ds_adr32_dpm() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75913,7 +75913,7 @@ void m68000_mcu_device::move_w_as_adr32_dpm() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76010,7 +76010,7 @@ void m68000_mcu_device::move_w_ais_adr32_dpm() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76038,7 +76038,7 @@ void m68000_mcu_device::move_w_ais_adr32_dpm() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76164,7 +76164,7 @@ void m68000_mcu_device::move_w_aips_adr32_dpm() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76190,7 +76190,7 @@ void m68000_mcu_device::move_w_aips_adr32_dpm() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76318,7 +76318,7 @@ void m68000_mcu_device::move_w_pais_adr32_dpm() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76344,7 +76344,7 @@ void m68000_mcu_device::move_w_pais_adr32_dpm() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76489,7 +76489,7 @@ void m68000_mcu_device::move_w_das_adr32_dpm() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76517,7 +76517,7 @@ void m68000_mcu_device::move_w_das_adr32_dpm() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76635,7 +76635,7 @@ void m68000_mcu_device::move_w_dais_adr32_dpm() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76703,7 +76703,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76731,7 +76731,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76877,7 +76877,7 @@ void m68000_mcu_device::move_w_adr16_adr32_dpm() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -76903,7 +76903,7 @@ void m68000_mcu_device::move_w_adr16_adr32_dpm() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77073,7 +77073,7 @@ void m68000_mcu_device::move_w_adr32_adr32_dpm() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -77099,7 +77099,7 @@ void m68000_mcu_device::move_w_adr32_adr32_dpm() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77243,7 +77243,7 @@ void m68000_mcu_device::move_w_dpc_adr32_dpm() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77271,7 +77271,7 @@ void m68000_mcu_device::move_w_dpc_adr32_dpm() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77388,7 +77388,7 @@ void m68000_mcu_device::move_w_dpci_adr32_dpm() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77456,7 +77456,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77484,7 +77484,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77656,7 +77656,7 @@ void m68000_mcu_device::move_w_imm16_adr32_dpm() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77755,7 +77755,7 @@ void m68000_mcu_device::negx_b_ds_dpm() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -77801,7 +77801,7 @@ void m68000_mcu_device::negx_b_ais_dpm() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77826,7 +77826,7 @@ void m68000_mcu_device::negx_b_ais_dpm() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77892,7 +77892,7 @@ void m68000_mcu_device::negx_b_aips_dpm() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -77915,7 +77915,7 @@ void m68000_mcu_device::negx_b_aips_dpm() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77983,7 +77983,7 @@ void m68000_mcu_device::negx_b_pais_dpm() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78006,7 +78006,7 @@ void m68000_mcu_device::negx_b_pais_dpm() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78091,7 +78091,7 @@ void m68000_mcu_device::negx_b_das_dpm() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78116,7 +78116,7 @@ void m68000_mcu_device::negx_b_das_dpm() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78174,7 +78174,7 @@ void m68000_mcu_device::negx_b_dais_dpm() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78242,7 +78242,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78267,7 +78267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78353,7 +78353,7 @@ void m68000_mcu_device::negx_b_adr16_dpm() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -78376,7 +78376,7 @@ void m68000_mcu_device::negx_b_adr16_dpm() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78486,7 +78486,7 @@ void m68000_mcu_device::negx_b_adr32_dpm() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -78509,7 +78509,7 @@ void m68000_mcu_device::negx_b_adr32_dpm() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78571,7 +78571,7 @@ void m68000_mcu_device::negx_w_ds_dpm() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -78617,7 +78617,7 @@ void m68000_mcu_device::negx_w_ais_dpm() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78646,7 +78646,7 @@ void m68000_mcu_device::negx_w_ais_dpm() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78718,7 +78718,7 @@ void m68000_mcu_device::negx_w_aips_dpm() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78745,7 +78745,7 @@ void m68000_mcu_device::negx_w_aips_dpm() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78819,7 +78819,7 @@ void m68000_mcu_device::negx_w_pais_dpm() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78846,7 +78846,7 @@ void m68000_mcu_device::negx_w_pais_dpm() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78937,7 +78937,7 @@ void m68000_mcu_device::negx_w_das_dpm() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78966,7 +78966,7 @@ void m68000_mcu_device::negx_w_das_dpm() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79030,7 +79030,7 @@ void m68000_mcu_device::negx_w_dais_dpm() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79098,7 +79098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -79127,7 +79127,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79219,7 +79219,7 @@ void m68000_mcu_device::negx_w_adr16_dpm() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -79246,7 +79246,7 @@ void m68000_mcu_device::negx_w_adr16_dpm() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79362,7 +79362,7 @@ void m68000_mcu_device::negx_w_adr32_dpm() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79389,7 +79389,7 @@ void m68000_mcu_device::negx_w_adr32_dpm() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79457,12 +79457,12 @@ void m68000_mcu_device::negx_l_ds_dpm() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79509,7 +79509,7 @@ void m68000_mcu_device::negx_l_ais_dpm() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79562,7 +79562,7 @@ void m68000_mcu_device::negx_l_ais_dpm() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79590,7 +79590,7 @@ void m68000_mcu_device::negx_l_ais_dpm() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79654,7 +79654,7 @@ void m68000_mcu_device::negx_l_aips_dpm() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79710,7 +79710,7 @@ void m68000_mcu_device::negx_l_aips_dpm() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79738,7 +79738,7 @@ void m68000_mcu_device::negx_l_aips_dpm() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79801,7 +79801,7 @@ void m68000_mcu_device::negx_l_pais_dpm() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79859,7 +79859,7 @@ void m68000_mcu_device::negx_l_pais_dpm() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79887,7 +79887,7 @@ void m68000_mcu_device::negx_l_pais_dpm() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79975,7 +79975,7 @@ void m68000_mcu_device::negx_l_das_dpm() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80028,7 +80028,7 @@ void m68000_mcu_device::negx_l_das_dpm() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80056,7 +80056,7 @@ void m68000_mcu_device::negx_l_das_dpm() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80118,7 +80118,7 @@ void m68000_mcu_device::negx_l_dais_dpm() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80185,7 +80185,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80238,7 +80238,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80266,7 +80266,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80356,7 +80356,7 @@ void m68000_mcu_device::negx_l_adr16_dpm() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80409,7 +80409,7 @@ void m68000_mcu_device::negx_l_adr16_dpm() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80437,7 +80437,7 @@ void m68000_mcu_device::negx_l_adr16_dpm() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80551,7 +80551,7 @@ void m68000_mcu_device::negx_l_adr32_dpm() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -80604,7 +80604,7 @@ void m68000_mcu_device::negx_l_adr32_dpm() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80632,7 +80632,7 @@ void m68000_mcu_device::negx_l_adr32_dpm() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80743,7 +80743,7 @@ void m68000_mcu_device::move_sr_ais_dpm() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80774,7 +80774,7 @@ void m68000_mcu_device::move_sr_ais_dpm() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80845,7 +80845,7 @@ void m68000_mcu_device::move_sr_aips_dpm() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80874,7 +80874,7 @@ void m68000_mcu_device::move_sr_aips_dpm() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80947,7 +80947,7 @@ void m68000_mcu_device::move_sr_pais_dpm() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80976,7 +80976,7 @@ void m68000_mcu_device::move_sr_pais_dpm() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -81066,7 +81066,7 @@ void m68000_mcu_device::move_sr_das_dpm() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81097,7 +81097,7 @@ void m68000_mcu_device::move_sr_das_dpm() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81160,7 +81160,7 @@ void m68000_mcu_device::move_sr_dais_dpm() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81228,7 +81228,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81259,7 +81259,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81350,7 +81350,7 @@ void m68000_mcu_device::move_sr_adr16_dpm() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -81379,7 +81379,7 @@ void m68000_mcu_device::move_sr_adr16_dpm() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81494,7 +81494,7 @@ void m68000_mcu_device::move_sr_adr32_dpm() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -81523,7 +81523,7 @@ void m68000_mcu_device::move_sr_adr32_dpm() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -81589,7 +81589,7 @@ void m68000_mcu_device::chk_w_ds_dd_dpm() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -81597,7 +81597,7 @@ void m68000_mcu_device::chk_w_ds_dd_dpm() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81615,14 +81615,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -81650,7 +81650,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81676,7 +81676,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81834,7 +81834,7 @@ void m68000_mcu_device::chk_w_ais_dd_dpm() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -81861,7 +81861,7 @@ void m68000_mcu_device::chk_w_ais_dd_dpm() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -81869,7 +81869,7 @@ void m68000_mcu_device::chk_w_ais_dd_dpm() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81887,14 +81887,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81922,7 +81922,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81948,7 +81948,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82112,7 +82112,7 @@ void m68000_mcu_device::chk_w_aips_dd_dpm() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82137,7 +82137,7 @@ void m68000_mcu_device::chk_w_aips_dd_dpm() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82145,7 +82145,7 @@ void m68000_mcu_device::chk_w_aips_dd_dpm() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82163,14 +82163,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82198,7 +82198,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82224,7 +82224,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82390,7 +82390,7 @@ void m68000_mcu_device::chk_w_pais_dd_dpm() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82415,7 +82415,7 @@ void m68000_mcu_device::chk_w_pais_dd_dpm() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82423,7 +82423,7 @@ void m68000_mcu_device::chk_w_pais_dd_dpm() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82441,14 +82441,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82476,7 +82476,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82502,7 +82502,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82685,7 +82685,7 @@ void m68000_mcu_device::chk_w_das_dd_dpm() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -82712,7 +82712,7 @@ void m68000_mcu_device::chk_w_das_dd_dpm() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82720,7 +82720,7 @@ void m68000_mcu_device::chk_w_das_dd_dpm() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82738,14 +82738,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82773,7 +82773,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82799,7 +82799,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -82955,7 +82955,7 @@ void m68000_mcu_device::chk_w_dais_dd_dpm() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -83023,7 +83023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83050,7 +83050,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83058,7 +83058,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83076,14 +83076,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83111,7 +83111,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83137,7 +83137,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83321,7 +83321,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dpm() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -83346,7 +83346,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dpm() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83354,7 +83354,7 @@ void m68000_mcu_device::chk_w_adr16_dd_dpm() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83372,14 +83372,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83407,7 +83407,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83433,7 +83433,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83641,7 +83641,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dpm() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83666,7 +83666,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dpm() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83674,7 +83674,7 @@ void m68000_mcu_device::chk_w_adr32_dd_dpm() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83692,14 +83692,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83727,7 +83727,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83753,7 +83753,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -83935,7 +83935,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dpm() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83962,7 +83962,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dpm() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83970,7 +83970,7 @@ void m68000_mcu_device::chk_w_dpc_dd_dpm() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83988,14 +83988,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84023,7 +84023,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84049,7 +84049,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84204,7 +84204,7 @@ void m68000_mcu_device::chk_w_dpci_dd_dpm() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84272,7 +84272,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84299,7 +84299,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -84307,7 +84307,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84325,14 +84325,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84360,7 +84360,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84386,7 +84386,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84570,7 +84570,7 @@ void m68000_mcu_device::chk_w_imm16_dd_dpm() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -84578,7 +84578,7 @@ void m68000_mcu_device::chk_w_imm16_dd_dpm() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84596,14 +84596,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -84631,7 +84631,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84657,7 +84657,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84931,7 +84931,7 @@ void m68000_mcu_device::lea_dais_ad_dpm() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85272,7 +85272,7 @@ void m68000_mcu_device::lea_dpci_ad_dpm() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85388,7 +85388,7 @@ void m68000_mcu_device::clr_b_ds_dpm() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -85396,7 +85396,7 @@ void m68000_mcu_device::clr_b_ds_dpm() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85435,11 +85435,11 @@ void m68000_mcu_device::clr_b_ais_dpm() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85461,7 +85461,7 @@ void m68000_mcu_device::clr_b_ais_dpm() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85491,7 +85491,7 @@ void m68000_mcu_device::clr_b_ais_dpm() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85525,12 +85525,12 @@ void m68000_mcu_device::clr_b_aips_dpm() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85553,7 +85553,7 @@ void m68000_mcu_device::clr_b_aips_dpm() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85583,7 +85583,7 @@ void m68000_mcu_device::clr_b_aips_dpm() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85616,7 +85616,7 @@ void m68000_mcu_device::clr_b_pais_dpm() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -85624,7 +85624,7 @@ void m68000_mcu_device::clr_b_pais_dpm() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85647,7 +85647,7 @@ void m68000_mcu_device::clr_b_pais_dpm() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85677,7 +85677,7 @@ void m68000_mcu_device::clr_b_pais_dpm() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85708,7 +85708,7 @@ void m68000_mcu_device::clr_b_das_dpm() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85734,11 +85734,11 @@ void m68000_mcu_device::clr_b_das_dpm() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85760,7 +85760,7 @@ void m68000_mcu_device::clr_b_das_dpm() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85790,7 +85790,7 @@ void m68000_mcu_device::clr_b_das_dpm() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85819,14 +85819,14 @@ void m68000_mcu_device::clr_b_dais_dpm() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -85834,7 +85834,7 @@ void m68000_mcu_device::clr_b_dais_dpm() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85861,7 +85861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -85890,11 +85890,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85916,7 +85916,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85946,7 +85946,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85979,7 +85979,7 @@ void m68000_mcu_device::clr_b_adr16_dpm() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86005,7 +86005,7 @@ void m68000_mcu_device::clr_b_adr16_dpm() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86028,7 +86028,7 @@ void m68000_mcu_device::clr_b_adr16_dpm() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86058,7 +86058,7 @@ void m68000_mcu_device::clr_b_adr16_dpm() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86089,7 +86089,7 @@ void m68000_mcu_device::clr_b_adr32_dpm() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86116,7 +86116,7 @@ void m68000_mcu_device::clr_b_adr32_dpm() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -86142,7 +86142,7 @@ void m68000_mcu_device::clr_b_adr32_dpm() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -86165,7 +86165,7 @@ void m68000_mcu_device::clr_b_adr32_dpm() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86195,7 +86195,7 @@ void m68000_mcu_device::clr_b_adr32_dpm() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86228,7 +86228,7 @@ void m68000_mcu_device::clr_w_ds_dpm() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -86236,7 +86236,7 @@ void m68000_mcu_device::clr_w_ds_dpm() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86275,11 +86275,11 @@ void m68000_mcu_device::clr_w_ais_dpm() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86305,7 +86305,7 @@ void m68000_mcu_device::clr_w_ais_dpm() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86335,7 +86335,7 @@ void m68000_mcu_device::clr_w_ais_dpm() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86375,12 +86375,12 @@ void m68000_mcu_device::clr_w_aips_dpm() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86407,7 +86407,7 @@ void m68000_mcu_device::clr_w_aips_dpm() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86437,7 +86437,7 @@ void m68000_mcu_device::clr_w_aips_dpm() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86476,7 +86476,7 @@ void m68000_mcu_device::clr_w_pais_dpm() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -86484,7 +86484,7 @@ void m68000_mcu_device::clr_w_pais_dpm() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86511,7 +86511,7 @@ void m68000_mcu_device::clr_w_pais_dpm() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86541,7 +86541,7 @@ void m68000_mcu_device::clr_w_pais_dpm() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86578,7 +86578,7 @@ void m68000_mcu_device::clr_w_das_dpm() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86604,11 +86604,11 @@ void m68000_mcu_device::clr_w_das_dpm() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86634,7 +86634,7 @@ void m68000_mcu_device::clr_w_das_dpm() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86664,7 +86664,7 @@ void m68000_mcu_device::clr_w_das_dpm() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86699,14 +86699,14 @@ void m68000_mcu_device::clr_w_dais_dpm() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -86714,7 +86714,7 @@ void m68000_mcu_device::clr_w_dais_dpm() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86741,7 +86741,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -86770,11 +86770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -86800,7 +86800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86830,7 +86830,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86869,7 +86869,7 @@ void m68000_mcu_device::clr_w_adr16_dpm() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86895,7 +86895,7 @@ void m68000_mcu_device::clr_w_adr16_dpm() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86922,7 +86922,7 @@ void m68000_mcu_device::clr_w_adr16_dpm() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86952,7 +86952,7 @@ void m68000_mcu_device::clr_w_adr16_dpm() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -86989,7 +86989,7 @@ void m68000_mcu_device::clr_w_adr32_dpm() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87016,7 +87016,7 @@ void m68000_mcu_device::clr_w_adr32_dpm() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -87042,7 +87042,7 @@ void m68000_mcu_device::clr_w_adr32_dpm() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87069,7 +87069,7 @@ void m68000_mcu_device::clr_w_adr32_dpm() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87099,7 +87099,7 @@ void m68000_mcu_device::clr_w_adr32_dpm() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87138,12 +87138,12 @@ void m68000_mcu_device::clr_l_ds_dpm() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87172,7 +87172,7 @@ void m68000_mcu_device::clr_l_ds_dpm() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -87191,7 +87191,7 @@ void m68000_mcu_device::clr_l_ais_dpm() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87219,7 +87219,7 @@ void m68000_mcu_device::clr_l_ais_dpm() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87245,7 +87245,7 @@ void m68000_mcu_device::clr_l_ais_dpm() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87273,7 +87273,7 @@ void m68000_mcu_device::clr_l_ais_dpm() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87301,7 +87301,7 @@ void m68000_mcu_device::clr_l_ais_dpm() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87338,7 +87338,7 @@ void m68000_mcu_device::clr_l_aips_dpm() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87366,11 +87366,11 @@ void m68000_mcu_device::clr_l_aips_dpm() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87396,7 +87396,7 @@ void m68000_mcu_device::clr_l_aips_dpm() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87424,7 +87424,7 @@ void m68000_mcu_device::clr_l_aips_dpm() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87452,7 +87452,7 @@ void m68000_mcu_device::clr_l_aips_dpm() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87488,14 +87488,14 @@ void m68000_mcu_device::clr_l_pais_dpm() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87522,7 +87522,7 @@ void m68000_mcu_device::clr_l_pais_dpm() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87548,7 +87548,7 @@ void m68000_mcu_device::clr_l_pais_dpm() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87576,7 +87576,7 @@ void m68000_mcu_device::clr_l_pais_dpm() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87604,7 +87604,7 @@ void m68000_mcu_device::clr_l_pais_dpm() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87641,7 +87641,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87666,7 +87666,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87694,7 +87694,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87720,7 +87720,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87748,7 +87748,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87776,7 +87776,7 @@ void m68000_mcu_device::clr_l_das_dpm() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -87811,14 +87811,14 @@ void m68000_mcu_device::clr_l_dais_dpm() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -87826,7 +87826,7 @@ void m68000_mcu_device::clr_l_dais_dpm() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87853,7 +87853,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -87881,7 +87881,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87909,7 +87909,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -87935,7 +87935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87963,7 +87963,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87991,7 +87991,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88030,7 +88030,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -88056,7 +88056,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -88084,7 +88084,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -88110,7 +88110,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88138,7 +88138,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88166,7 +88166,7 @@ void m68000_mcu_device::clr_l_adr16_dpm() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88203,7 +88203,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -88230,7 +88230,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -88256,7 +88256,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88284,7 +88284,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -88310,7 +88310,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88338,7 +88338,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88366,7 +88366,7 @@ void m68000_mcu_device::clr_l_adr32_dpm() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -88405,7 +88405,7 @@ void m68000_mcu_device::neg_b_ds_dpm() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -88451,7 +88451,7 @@ void m68000_mcu_device::neg_b_ais_dpm() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88476,7 +88476,7 @@ void m68000_mcu_device::neg_b_ais_dpm() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88542,7 +88542,7 @@ void m68000_mcu_device::neg_b_aips_dpm() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88565,7 +88565,7 @@ void m68000_mcu_device::neg_b_aips_dpm() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88633,7 +88633,7 @@ void m68000_mcu_device::neg_b_pais_dpm() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88656,7 +88656,7 @@ void m68000_mcu_device::neg_b_pais_dpm() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88741,7 +88741,7 @@ void m68000_mcu_device::neg_b_das_dpm() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88766,7 +88766,7 @@ void m68000_mcu_device::neg_b_das_dpm() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88824,7 +88824,7 @@ void m68000_mcu_device::neg_b_dais_dpm() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88892,7 +88892,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88917,7 +88917,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89003,7 +89003,7 @@ void m68000_mcu_device::neg_b_adr16_dpm() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89026,7 +89026,7 @@ void m68000_mcu_device::neg_b_adr16_dpm() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89136,7 +89136,7 @@ void m68000_mcu_device::neg_b_adr32_dpm() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -89159,7 +89159,7 @@ void m68000_mcu_device::neg_b_adr32_dpm() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89221,7 +89221,7 @@ void m68000_mcu_device::neg_w_ds_dpm() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -89267,7 +89267,7 @@ void m68000_mcu_device::neg_w_ais_dpm() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89296,7 +89296,7 @@ void m68000_mcu_device::neg_w_ais_dpm() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89368,7 +89368,7 @@ void m68000_mcu_device::neg_w_aips_dpm() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89395,7 +89395,7 @@ void m68000_mcu_device::neg_w_aips_dpm() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89469,7 +89469,7 @@ void m68000_mcu_device::neg_w_pais_dpm() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89496,7 +89496,7 @@ void m68000_mcu_device::neg_w_pais_dpm() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89587,7 +89587,7 @@ void m68000_mcu_device::neg_w_das_dpm() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89616,7 +89616,7 @@ void m68000_mcu_device::neg_w_das_dpm() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89680,7 +89680,7 @@ void m68000_mcu_device::neg_w_dais_dpm() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89748,7 +89748,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89777,7 +89777,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89869,7 +89869,7 @@ void m68000_mcu_device::neg_w_adr16_dpm() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89896,7 +89896,7 @@ void m68000_mcu_device::neg_w_adr16_dpm() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90012,7 +90012,7 @@ void m68000_mcu_device::neg_w_adr32_dpm() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90039,7 +90039,7 @@ void m68000_mcu_device::neg_w_adr32_dpm() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90107,12 +90107,12 @@ void m68000_mcu_device::neg_l_ds_dpm() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90159,7 +90159,7 @@ void m68000_mcu_device::neg_l_ais_dpm() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90212,7 +90212,7 @@ void m68000_mcu_device::neg_l_ais_dpm() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90240,7 +90240,7 @@ void m68000_mcu_device::neg_l_ais_dpm() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90304,7 +90304,7 @@ void m68000_mcu_device::neg_l_aips_dpm() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90360,7 +90360,7 @@ void m68000_mcu_device::neg_l_aips_dpm() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90388,7 +90388,7 @@ void m68000_mcu_device::neg_l_aips_dpm() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90451,7 +90451,7 @@ void m68000_mcu_device::neg_l_pais_dpm() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -90509,7 +90509,7 @@ void m68000_mcu_device::neg_l_pais_dpm() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90537,7 +90537,7 @@ void m68000_mcu_device::neg_l_pais_dpm() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90625,7 +90625,7 @@ void m68000_mcu_device::neg_l_das_dpm() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90678,7 +90678,7 @@ void m68000_mcu_device::neg_l_das_dpm() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90706,7 +90706,7 @@ void m68000_mcu_device::neg_l_das_dpm() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90768,7 +90768,7 @@ void m68000_mcu_device::neg_l_dais_dpm() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -90835,7 +90835,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90888,7 +90888,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90916,7 +90916,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91006,7 +91006,7 @@ void m68000_mcu_device::neg_l_adr16_dpm() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -91059,7 +91059,7 @@ void m68000_mcu_device::neg_l_adr16_dpm() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91087,7 +91087,7 @@ void m68000_mcu_device::neg_l_adr16_dpm() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91201,7 +91201,7 @@ void m68000_mcu_device::neg_l_adr32_dpm() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -91254,7 +91254,7 @@ void m68000_mcu_device::neg_l_adr32_dpm() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91282,7 +91282,7 @@ void m68000_mcu_device::neg_l_adr32_dpm() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91424,7 +91424,7 @@ void m68000_mcu_device::move_ais_ccr_dpm() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91535,7 +91535,7 @@ void m68000_mcu_device::move_aips_ccr_dpm() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91646,7 +91646,7 @@ void m68000_mcu_device::move_pais_ccr_dpm() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91774,7 +91774,7 @@ void m68000_mcu_device::move_das_ccr_dpm() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91877,7 +91877,7 @@ void m68000_mcu_device::move_dais_ccr_dpm() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91945,7 +91945,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92076,7 +92076,7 @@ void m68000_mcu_device::move_adr16_ccr_dpm() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -92229,7 +92229,7 @@ void m68000_mcu_device::move_adr32_ccr_dpm() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92356,7 +92356,7 @@ void m68000_mcu_device::move_dpc_ccr_dpm() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92458,7 +92458,7 @@ void m68000_mcu_device::move_dpci_ccr_dpm() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92526,7 +92526,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92737,7 +92737,7 @@ void m68000_mcu_device::not_b_ds_dpm() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -92783,7 +92783,7 @@ void m68000_mcu_device::not_b_ais_dpm() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92808,7 +92808,7 @@ void m68000_mcu_device::not_b_ais_dpm() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92874,7 +92874,7 @@ void m68000_mcu_device::not_b_aips_dpm() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92897,7 +92897,7 @@ void m68000_mcu_device::not_b_aips_dpm() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92965,7 +92965,7 @@ void m68000_mcu_device::not_b_pais_dpm() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92988,7 +92988,7 @@ void m68000_mcu_device::not_b_pais_dpm() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93073,7 +93073,7 @@ void m68000_mcu_device::not_b_das_dpm() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93098,7 +93098,7 @@ void m68000_mcu_device::not_b_das_dpm() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93156,7 +93156,7 @@ void m68000_mcu_device::not_b_dais_dpm() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93224,7 +93224,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93249,7 +93249,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93335,7 +93335,7 @@ void m68000_mcu_device::not_b_adr16_dpm() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -93358,7 +93358,7 @@ void m68000_mcu_device::not_b_adr16_dpm() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93468,7 +93468,7 @@ void m68000_mcu_device::not_b_adr32_dpm() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -93491,7 +93491,7 @@ void m68000_mcu_device::not_b_adr32_dpm() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93553,7 +93553,7 @@ void m68000_mcu_device::not_w_ds_dpm() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -93599,7 +93599,7 @@ void m68000_mcu_device::not_w_ais_dpm() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93628,7 +93628,7 @@ void m68000_mcu_device::not_w_ais_dpm() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93700,7 +93700,7 @@ void m68000_mcu_device::not_w_aips_dpm() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93727,7 +93727,7 @@ void m68000_mcu_device::not_w_aips_dpm() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93801,7 +93801,7 @@ void m68000_mcu_device::not_w_pais_dpm() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93828,7 +93828,7 @@ void m68000_mcu_device::not_w_pais_dpm() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93919,7 +93919,7 @@ void m68000_mcu_device::not_w_das_dpm() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93948,7 +93948,7 @@ void m68000_mcu_device::not_w_das_dpm() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94012,7 +94012,7 @@ void m68000_mcu_device::not_w_dais_dpm() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94080,7 +94080,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94109,7 +94109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94201,7 +94201,7 @@ void m68000_mcu_device::not_w_adr16_dpm() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -94228,7 +94228,7 @@ void m68000_mcu_device::not_w_adr16_dpm() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94344,7 +94344,7 @@ void m68000_mcu_device::not_w_adr32_dpm() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94371,7 +94371,7 @@ void m68000_mcu_device::not_w_adr32_dpm() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94439,12 +94439,12 @@ void m68000_mcu_device::not_l_ds_dpm() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94491,7 +94491,7 @@ void m68000_mcu_device::not_l_ais_dpm() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94544,7 +94544,7 @@ void m68000_mcu_device::not_l_ais_dpm() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94572,7 +94572,7 @@ void m68000_mcu_device::not_l_ais_dpm() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94636,7 +94636,7 @@ void m68000_mcu_device::not_l_aips_dpm() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94692,7 +94692,7 @@ void m68000_mcu_device::not_l_aips_dpm() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94720,7 +94720,7 @@ void m68000_mcu_device::not_l_aips_dpm() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94783,7 +94783,7 @@ void m68000_mcu_device::not_l_pais_dpm() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -94841,7 +94841,7 @@ void m68000_mcu_device::not_l_pais_dpm() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94869,7 +94869,7 @@ void m68000_mcu_device::not_l_pais_dpm() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94957,7 +94957,7 @@ void m68000_mcu_device::not_l_das_dpm() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95010,7 +95010,7 @@ void m68000_mcu_device::not_l_das_dpm() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95038,7 +95038,7 @@ void m68000_mcu_device::not_l_das_dpm() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95100,7 +95100,7 @@ void m68000_mcu_device::not_l_dais_dpm() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -95167,7 +95167,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95220,7 +95220,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95248,7 +95248,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95338,7 +95338,7 @@ void m68000_mcu_device::not_l_adr16_dpm() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95391,7 +95391,7 @@ void m68000_mcu_device::not_l_adr16_dpm() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95419,7 +95419,7 @@ void m68000_mcu_device::not_l_adr16_dpm() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95533,7 +95533,7 @@ void m68000_mcu_device::not_l_adr32_dpm() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -95586,7 +95586,7 @@ void m68000_mcu_device::not_l_adr32_dpm() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95614,7 +95614,7 @@ void m68000_mcu_device::not_l_adr32_dpm() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95766,7 +95766,7 @@ void m68000_mcu_device::move_ais_sr_dpm() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -95883,7 +95883,7 @@ void m68000_mcu_device::move_aips_sr_dpm() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96000,7 +96000,7 @@ void m68000_mcu_device::move_pais_sr_dpm() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96134,7 +96134,7 @@ void m68000_mcu_device::move_das_sr_dpm() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96243,7 +96243,7 @@ void m68000_mcu_device::move_dais_sr_dpm() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96311,7 +96311,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96448,7 +96448,7 @@ void m68000_mcu_device::move_adr16_sr_dpm() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -96607,7 +96607,7 @@ void m68000_mcu_device::move_adr32_sr_dpm() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -96740,7 +96740,7 @@ void m68000_mcu_device::move_dpc_sr_dpm() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96848,7 +96848,7 @@ void m68000_mcu_device::move_dpci_sr_dpm() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96916,7 +96916,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97135,12 +97135,12 @@ void m68000_mcu_device::nbcd_b_ds_dpm() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97185,7 +97185,7 @@ void m68000_mcu_device::nbcd_b_ais_dpm() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97209,12 +97209,12 @@ void m68000_mcu_device::nbcd_b_ais_dpm() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97278,7 +97278,7 @@ void m68000_mcu_device::nbcd_b_aips_dpm() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97300,12 +97300,12 @@ void m68000_mcu_device::nbcd_b_aips_dpm() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97371,7 +97371,7 @@ void m68000_mcu_device::nbcd_b_pais_dpm() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97393,12 +97393,12 @@ void m68000_mcu_device::nbcd_b_pais_dpm() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97481,7 +97481,7 @@ void m68000_mcu_device::nbcd_b_das_dpm() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97505,12 +97505,12 @@ void m68000_mcu_device::nbcd_b_das_dpm() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97566,7 +97566,7 @@ void m68000_mcu_device::nbcd_b_dais_dpm() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97634,7 +97634,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97658,12 +97658,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97747,7 +97747,7 @@ void m68000_mcu_device::nbcd_b_adr16_dpm() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -97769,12 +97769,12 @@ void m68000_mcu_device::nbcd_b_adr16_dpm() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97882,7 +97882,7 @@ void m68000_mcu_device::nbcd_b_adr32_dpm() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97904,12 +97904,12 @@ void m68000_mcu_device::nbcd_b_adr32_dpm() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -97970,7 +97970,7 @@ void m68000_mcu_device::swap_ds_dpm() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -97978,7 +97978,7 @@ void m68000_mcu_device::swap_ds_dpm() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98022,7 +98022,7 @@ void m68000_mcu_device::pea_ais_dpm() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98112,7 +98112,7 @@ void m68000_mcu_device::pea_das_dpm() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98142,7 +98142,7 @@ void m68000_mcu_device::pea_das_dpm() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98230,7 +98230,7 @@ void m68000_mcu_device::pea_dais_dpm() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98297,7 +98297,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98654,7 +98654,7 @@ void m68000_mcu_device::pea_dpc_dpm() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98684,7 +98684,7 @@ void m68000_mcu_device::pea_dpc_dpm() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98771,7 +98771,7 @@ void m68000_mcu_device::pea_dpci_dpm() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98838,7 +98838,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98935,7 +98935,7 @@ void m68000_mcu_device::ext_w_ds_dpm() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -99358,7 +99358,7 @@ void m68000_mcu_device::movem_w_list_dais_dpm() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -99797,7 +99797,7 @@ void m68000_mcu_device::ext_l_ds_dpm() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -100290,7 +100290,7 @@ void m68000_mcu_device::movem_l_list_dais_dpm() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -100799,13 +100799,13 @@ void m68000_mcu_device::tst_b_ds_dpm() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100844,11 +100844,11 @@ void m68000_mcu_device::tst_b_ais_dpm() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100870,13 +100870,13 @@ void m68000_mcu_device::tst_b_ais_dpm() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100918,12 +100918,12 @@ void m68000_mcu_device::tst_b_aips_dpm() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -100946,13 +100946,13 @@ void m68000_mcu_device::tst_b_aips_dpm() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -100993,7 +100993,7 @@ void m68000_mcu_device::tst_b_pais_dpm() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101001,7 +101001,7 @@ void m68000_mcu_device::tst_b_pais_dpm() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101024,13 +101024,13 @@ void m68000_mcu_device::tst_b_pais_dpm() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101069,7 +101069,7 @@ void m68000_mcu_device::tst_b_das_dpm() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101095,11 +101095,11 @@ void m68000_mcu_device::tst_b_das_dpm() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101121,13 +101121,13 @@ void m68000_mcu_device::tst_b_das_dpm() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101164,14 +101164,14 @@ void m68000_mcu_device::tst_b_dais_dpm() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101179,7 +101179,7 @@ void m68000_mcu_device::tst_b_dais_dpm() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101206,7 +101206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101235,11 +101235,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101261,13 +101261,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101308,7 +101308,7 @@ void m68000_mcu_device::tst_b_adr16_dpm() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -101334,7 +101334,7 @@ void m68000_mcu_device::tst_b_adr16_dpm() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -101357,13 +101357,13 @@ void m68000_mcu_device::tst_b_adr16_dpm() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101402,7 +101402,7 @@ void m68000_mcu_device::tst_b_adr32_dpm() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101429,7 +101429,7 @@ void m68000_mcu_device::tst_b_adr32_dpm() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -101455,7 +101455,7 @@ void m68000_mcu_device::tst_b_adr32_dpm() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -101478,13 +101478,13 @@ void m68000_mcu_device::tst_b_adr32_dpm() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101526,13 +101526,13 @@ void m68000_mcu_device::tst_w_ds_dpm() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101571,11 +101571,11 @@ void m68000_mcu_device::tst_w_ais_dpm() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101601,13 +101601,13 @@ void m68000_mcu_device::tst_w_ais_dpm() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101649,12 +101649,12 @@ void m68000_mcu_device::tst_w_aips_dpm() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101681,13 +101681,13 @@ void m68000_mcu_device::tst_w_aips_dpm() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101728,7 +101728,7 @@ void m68000_mcu_device::tst_w_pais_dpm() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101736,7 +101736,7 @@ void m68000_mcu_device::tst_w_pais_dpm() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101763,13 +101763,13 @@ void m68000_mcu_device::tst_w_pais_dpm() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101808,7 +101808,7 @@ void m68000_mcu_device::tst_w_das_dpm() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101834,11 +101834,11 @@ void m68000_mcu_device::tst_w_das_dpm() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -101864,13 +101864,13 @@ void m68000_mcu_device::tst_w_das_dpm() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101907,14 +101907,14 @@ void m68000_mcu_device::tst_w_dais_dpm() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101922,7 +101922,7 @@ void m68000_mcu_device::tst_w_dais_dpm() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101949,7 +101949,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -101978,11 +101978,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102008,13 +102008,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102055,7 +102055,7 @@ void m68000_mcu_device::tst_w_adr16_dpm() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102081,7 +102081,7 @@ void m68000_mcu_device::tst_w_adr16_dpm() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102108,13 +102108,13 @@ void m68000_mcu_device::tst_w_adr16_dpm() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102153,7 +102153,7 @@ void m68000_mcu_device::tst_w_adr32_dpm() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102180,7 +102180,7 @@ void m68000_mcu_device::tst_w_adr32_dpm() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -102206,7 +102206,7 @@ void m68000_mcu_device::tst_w_adr32_dpm() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102233,13 +102233,13 @@ void m68000_mcu_device::tst_w_adr32_dpm() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102281,13 +102281,13 @@ void m68000_mcu_device::tst_l_ds_dpm() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102328,7 +102328,7 @@ void m68000_mcu_device::tst_l_ais_dpm() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102356,7 +102356,7 @@ void m68000_mcu_device::tst_l_ais_dpm() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102382,13 +102382,13 @@ void m68000_mcu_device::tst_l_ais_dpm() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102429,7 +102429,7 @@ void m68000_mcu_device::tst_l_aips_dpm() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102457,11 +102457,11 @@ void m68000_mcu_device::tst_l_aips_dpm() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102487,13 +102487,13 @@ void m68000_mcu_device::tst_l_aips_dpm() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102533,14 +102533,14 @@ void m68000_mcu_device::tst_l_pais_dpm() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102567,7 +102567,7 @@ void m68000_mcu_device::tst_l_pais_dpm() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102593,13 +102593,13 @@ void m68000_mcu_device::tst_l_pais_dpm() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102640,7 +102640,7 @@ void m68000_mcu_device::tst_l_das_dpm() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102665,7 +102665,7 @@ void m68000_mcu_device::tst_l_das_dpm() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102693,7 +102693,7 @@ void m68000_mcu_device::tst_l_das_dpm() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102719,13 +102719,13 @@ void m68000_mcu_device::tst_l_das_dpm() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102764,14 +102764,14 @@ void m68000_mcu_device::tst_l_dais_dpm() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -102779,7 +102779,7 @@ void m68000_mcu_device::tst_l_dais_dpm() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102806,7 +102806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -102834,7 +102834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102862,7 +102862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -102888,13 +102888,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102937,7 +102937,7 @@ void m68000_mcu_device::tst_l_adr16_dpm() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102963,7 +102963,7 @@ void m68000_mcu_device::tst_l_adr16_dpm() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102991,7 +102991,7 @@ void m68000_mcu_device::tst_l_adr16_dpm() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -103017,13 +103017,13 @@ void m68000_mcu_device::tst_l_adr16_dpm() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103064,7 +103064,7 @@ void m68000_mcu_device::tst_l_adr32_dpm() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103091,7 +103091,7 @@ void m68000_mcu_device::tst_l_adr32_dpm() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -103117,7 +103117,7 @@ void m68000_mcu_device::tst_l_adr32_dpm() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -103145,7 +103145,7 @@ void m68000_mcu_device::tst_l_adr32_dpm() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -103171,13 +103171,13 @@ void m68000_mcu_device::tst_l_adr32_dpm() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103220,14 +103220,14 @@ void m68000_mcu_device::tas_ds_dpm() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103268,11 +103268,11 @@ void m68000_mcu_device::tas_ais_dpm() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103289,14 +103289,14 @@ void m68000_mcu_device::tas_ais_dpm() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103320,11 +103320,11 @@ void m68000_mcu_device::tas_ais_dpm() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103366,12 +103366,12 @@ void m68000_mcu_device::tas_aips_dpm() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103389,14 +103389,14 @@ void m68000_mcu_device::tas_aips_dpm() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103420,11 +103420,11 @@ void m68000_mcu_device::tas_aips_dpm() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103465,7 +103465,7 @@ void m68000_mcu_device::tas_pais_dpm() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103473,7 +103473,7 @@ void m68000_mcu_device::tas_pais_dpm() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103491,14 +103491,14 @@ void m68000_mcu_device::tas_pais_dpm() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103522,11 +103522,11 @@ void m68000_mcu_device::tas_pais_dpm() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103565,7 +103565,7 @@ void m68000_mcu_device::tas_das_dpm() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103591,11 +103591,11 @@ void m68000_mcu_device::tas_das_dpm() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103612,14 +103612,14 @@ void m68000_mcu_device::tas_das_dpm() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103643,11 +103643,11 @@ void m68000_mcu_device::tas_das_dpm() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103684,14 +103684,14 @@ void m68000_mcu_device::tas_dais_dpm() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103699,7 +103699,7 @@ void m68000_mcu_device::tas_dais_dpm() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103726,7 +103726,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103755,11 +103755,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103776,14 +103776,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103807,11 +103807,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103852,7 +103852,7 @@ void m68000_mcu_device::tas_adr16_dpm() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -103878,7 +103878,7 @@ void m68000_mcu_device::tas_adr16_dpm() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -103896,14 +103896,14 @@ void m68000_mcu_device::tas_adr16_dpm() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103927,11 +103927,11 @@ void m68000_mcu_device::tas_adr16_dpm() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103970,7 +103970,7 @@ void m68000_mcu_device::tas_adr32_dpm() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -103997,7 +103997,7 @@ void m68000_mcu_device::tas_adr32_dpm() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -104023,7 +104023,7 @@ void m68000_mcu_device::tas_adr32_dpm() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104041,14 +104041,14 @@ void m68000_mcu_device::tas_adr32_dpm() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -104072,11 +104072,11 @@ void m68000_mcu_device::tas_adr32_dpm() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -104563,7 +104563,7 @@ void m68000_mcu_device::movem_w_dais_list_dpm() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -104627,7 +104627,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105256,7 +105256,7 @@ void m68000_mcu_device::movem_w_dpci_list_dpm() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -105320,7 +105320,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105949,7 +105949,7 @@ void m68000_mcu_device::movem_l_dais_list_dpm() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106013,7 +106013,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106738,7 +106738,7 @@ void m68000_mcu_device::movem_l_dpci_list_dpm() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106802,7 +106802,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106940,14 +106940,14 @@ void m68000_mcu_device::trap_imm4_dpm() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -106975,7 +106975,7 @@ void m68000_mcu_device::trap_imm4_dpm() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -107001,7 +107001,7 @@ void m68000_mcu_device::trap_imm4_dpm() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107142,7 +107142,7 @@ void m68000_mcu_device::link_as_imm16_dpm() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -107462,7 +107462,7 @@ void m68000_mcu_device::reset_dpm() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -107576,7 +107576,7 @@ void m68000_mcu_device::stop_i16u_dpm() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -107590,6 +107590,7 @@ void m68000_mcu_device::stop_i16u_dpm() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -107606,7 +107607,7 @@ void m68000_mcu_device::rte_dpm() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107753,7 +107754,7 @@ void m68000_mcu_device::rts_dpm() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107914,7 +107915,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -107940,7 +107941,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107968,7 +107969,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -107994,7 +107995,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -108133,7 +108134,7 @@ void m68000_mcu_device::rtr_dpm() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108512,7 +108513,7 @@ void m68000_mcu_device::jsr_dais_dpm() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109028,7 +109029,7 @@ void m68000_mcu_device::jsr_dpci_dpm() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109305,7 +109306,7 @@ void m68000_mcu_device::jmp_dais_dpm() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109620,7 +109621,7 @@ void m68000_mcu_device::jmp_dpci_dpm() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109714,7 +109715,7 @@ void m68000_mcu_device::addq_b_imm3_ds_dpm() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -109760,7 +109761,7 @@ void m68000_mcu_device::addq_b_imm3_ais_dpm() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -109786,7 +109787,7 @@ void m68000_mcu_device::addq_b_imm3_ais_dpm() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109852,7 +109853,7 @@ void m68000_mcu_device::addq_b_imm3_aips_dpm() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109876,7 +109877,7 @@ void m68000_mcu_device::addq_b_imm3_aips_dpm() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109944,7 +109945,7 @@ void m68000_mcu_device::addq_b_imm3_pais_dpm() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109968,7 +109969,7 @@ void m68000_mcu_device::addq_b_imm3_pais_dpm() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110053,7 +110054,7 @@ void m68000_mcu_device::addq_b_imm3_das_dpm() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110079,7 +110080,7 @@ void m68000_mcu_device::addq_b_imm3_das_dpm() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110137,7 +110138,7 @@ void m68000_mcu_device::addq_b_imm3_dais_dpm() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110205,7 +110206,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110231,7 +110232,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110318,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_dpm() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -110341,7 +110342,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_dpm() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110451,7 +110452,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_dpm() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -110475,7 +110476,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_dpm() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110537,7 +110538,7 @@ void m68000_mcu_device::addq_w_imm3_ds_dpm() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -110585,7 +110586,7 @@ void m68000_mcu_device::addq_w_imm3_as_dpm() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -110611,7 +110612,7 @@ void m68000_mcu_device::addq_w_imm3_as_dpm() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -110637,7 +110638,7 @@ void m68000_mcu_device::addq_w_imm3_ais_dpm() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110667,7 +110668,7 @@ void m68000_mcu_device::addq_w_imm3_ais_dpm() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110739,7 +110740,7 @@ void m68000_mcu_device::addq_w_imm3_aips_dpm() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110767,7 +110768,7 @@ void m68000_mcu_device::addq_w_imm3_aips_dpm() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110841,7 +110842,7 @@ void m68000_mcu_device::addq_w_imm3_pais_dpm() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110869,7 +110870,7 @@ void m68000_mcu_device::addq_w_imm3_pais_dpm() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110960,7 +110961,7 @@ void m68000_mcu_device::addq_w_imm3_das_dpm() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110990,7 +110991,7 @@ void m68000_mcu_device::addq_w_imm3_das_dpm() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111054,7 +111055,7 @@ void m68000_mcu_device::addq_w_imm3_dais_dpm() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111122,7 +111123,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -111152,7 +111153,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111244,7 +111245,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_dpm() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -111272,7 +111273,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_dpm() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111388,7 +111389,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_dpm() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111416,7 +111417,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_dpm() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111484,7 +111485,7 @@ void m68000_mcu_device::addq_l_imm3_ds_dpm() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -111511,7 +111512,7 @@ void m68000_mcu_device::addq_l_imm3_ds_dpm() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -111540,7 +111541,7 @@ void m68000_mcu_device::addq_l_imm3_as_dpm() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -111566,7 +111567,7 @@ void m68000_mcu_device::addq_l_imm3_as_dpm() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -111592,7 +111593,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dpm() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111646,7 +111647,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dpm() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111674,7 +111675,7 @@ void m68000_mcu_device::addq_l_imm3_ais_dpm() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111738,7 +111739,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dpm() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111795,7 +111796,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dpm() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111823,7 +111824,7 @@ void m68000_mcu_device::addq_l_imm3_aips_dpm() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111886,7 +111887,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dpm() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -111945,7 +111946,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dpm() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111973,7 +111974,7 @@ void m68000_mcu_device::addq_l_imm3_pais_dpm() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112061,7 +112062,7 @@ void m68000_mcu_device::addq_l_imm3_das_dpm() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112115,7 +112116,7 @@ void m68000_mcu_device::addq_l_imm3_das_dpm() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112143,7 +112144,7 @@ void m68000_mcu_device::addq_l_imm3_das_dpm() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112205,7 +112206,7 @@ void m68000_mcu_device::addq_l_imm3_dais_dpm() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -112272,7 +112273,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112326,7 +112327,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112354,7 +112355,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112444,7 +112445,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dpm() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112498,7 +112499,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dpm() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112526,7 +112527,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_dpm() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112640,7 +112641,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dpm() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -112694,7 +112695,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dpm() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112722,7 +112723,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_dpm() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112788,7 +112789,7 @@ void m68000_mcu_device::st_ds_dpm() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112800,7 +112801,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112831,7 +112832,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -112859,7 +112860,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112878,7 +112879,7 @@ void m68000_mcu_device::dbt_ds_rel16_dpm() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112890,13 +112891,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -112927,7 +112928,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112935,7 +112936,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -112962,11 +112963,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113000,13 +113001,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113040,7 +113041,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113077,11 +113078,11 @@ void m68000_mcu_device::st_ais_dpm() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113103,7 +113104,7 @@ void m68000_mcu_device::st_ais_dpm() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113113,7 +113114,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113140,7 +113141,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113171,7 +113172,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113205,12 +113206,12 @@ void m68000_mcu_device::st_aips_dpm() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113233,7 +113234,7 @@ void m68000_mcu_device::st_aips_dpm() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113243,7 +113244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113270,7 +113271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113301,7 +113302,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113334,7 +113335,7 @@ void m68000_mcu_device::st_pais_dpm() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113342,7 +113343,7 @@ void m68000_mcu_device::st_pais_dpm() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113365,7 +113366,7 @@ void m68000_mcu_device::st_pais_dpm() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113375,7 +113376,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113402,7 +113403,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113433,7 +113434,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113464,7 +113465,7 @@ void m68000_mcu_device::st_das_dpm() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113490,11 +113491,11 @@ void m68000_mcu_device::st_das_dpm() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113516,7 +113517,7 @@ void m68000_mcu_device::st_das_dpm() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113526,7 +113527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113553,7 +113554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113584,7 +113585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113613,14 +113614,14 @@ void m68000_mcu_device::st_dais_dpm() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113628,7 +113629,7 @@ void m68000_mcu_device::st_dais_dpm() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113655,7 +113656,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113684,11 +113685,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113710,7 +113711,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113720,7 +113721,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113747,7 +113748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113778,7 +113779,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113811,7 +113812,7 @@ void m68000_mcu_device::st_adr16_dpm() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -113837,7 +113838,7 @@ void m68000_mcu_device::st_adr16_dpm() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -113860,7 +113861,7 @@ void m68000_mcu_device::st_adr16_dpm() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113870,7 +113871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113897,7 +113898,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113928,7 +113929,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113959,7 +113960,7 @@ void m68000_mcu_device::st_adr32_dpm() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -113986,7 +113987,7 @@ void m68000_mcu_device::st_adr32_dpm() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -114012,7 +114013,7 @@ void m68000_mcu_device::st_adr32_dpm() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114035,7 +114036,7 @@ void m68000_mcu_device::st_adr32_dpm() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114045,7 +114046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -114072,7 +114073,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -114103,7 +114104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -114136,7 +114137,7 @@ void m68000_mcu_device::subq_b_imm3_ds_dpm() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -114182,7 +114183,7 @@ void m68000_mcu_device::subq_b_imm3_ais_dpm() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114208,7 +114209,7 @@ void m68000_mcu_device::subq_b_imm3_ais_dpm() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114274,7 +114275,7 @@ void m68000_mcu_device::subq_b_imm3_aips_dpm() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114298,7 +114299,7 @@ void m68000_mcu_device::subq_b_imm3_aips_dpm() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114366,7 +114367,7 @@ void m68000_mcu_device::subq_b_imm3_pais_dpm() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114390,7 +114391,7 @@ void m68000_mcu_device::subq_b_imm3_pais_dpm() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114475,7 +114476,7 @@ void m68000_mcu_device::subq_b_imm3_das_dpm() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114501,7 +114502,7 @@ void m68000_mcu_device::subq_b_imm3_das_dpm() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114559,7 +114560,7 @@ void m68000_mcu_device::subq_b_imm3_dais_dpm() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -114627,7 +114628,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114653,7 +114654,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114739,7 +114740,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_dpm() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -114763,7 +114764,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_dpm() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114873,7 +114874,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_dpm() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114897,7 +114898,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_dpm() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114959,7 +114960,7 @@ void m68000_mcu_device::subq_w_imm3_ds_dpm() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -115007,7 +115008,7 @@ void m68000_mcu_device::subq_w_imm3_as_dpm() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115033,7 +115034,7 @@ void m68000_mcu_device::subq_w_imm3_as_dpm() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -115059,7 +115060,7 @@ void m68000_mcu_device::subq_w_imm3_ais_dpm() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115089,7 +115090,7 @@ void m68000_mcu_device::subq_w_imm3_ais_dpm() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115161,7 +115162,7 @@ void m68000_mcu_device::subq_w_imm3_aips_dpm() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115189,7 +115190,7 @@ void m68000_mcu_device::subq_w_imm3_aips_dpm() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115263,7 +115264,7 @@ void m68000_mcu_device::subq_w_imm3_pais_dpm() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115291,7 +115292,7 @@ void m68000_mcu_device::subq_w_imm3_pais_dpm() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115382,7 +115383,7 @@ void m68000_mcu_device::subq_w_imm3_das_dpm() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115412,7 +115413,7 @@ void m68000_mcu_device::subq_w_imm3_das_dpm() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115476,7 +115477,7 @@ void m68000_mcu_device::subq_w_imm3_dais_dpm() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -115544,7 +115545,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115574,7 +115575,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115666,7 +115667,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_dpm() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -115694,7 +115695,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_dpm() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115810,7 +115811,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_dpm() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -115838,7 +115839,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_dpm() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115906,7 +115907,7 @@ void m68000_mcu_device::subq_l_imm3_ds_dpm() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -115933,7 +115934,7 @@ void m68000_mcu_device::subq_l_imm3_ds_dpm() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -115962,7 +115963,7 @@ void m68000_mcu_device::subq_l_imm3_as_dpm() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115988,7 +115989,7 @@ void m68000_mcu_device::subq_l_imm3_as_dpm() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -116014,7 +116015,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dpm() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116068,7 +116069,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dpm() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116096,7 +116097,7 @@ void m68000_mcu_device::subq_l_imm3_ais_dpm() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116160,7 +116161,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dpm() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116217,7 +116218,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dpm() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116245,7 +116246,7 @@ void m68000_mcu_device::subq_l_imm3_aips_dpm() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116308,7 +116309,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dpm() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -116367,7 +116368,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dpm() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116395,7 +116396,7 @@ void m68000_mcu_device::subq_l_imm3_pais_dpm() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116483,7 +116484,7 @@ void m68000_mcu_device::subq_l_imm3_das_dpm() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116537,7 +116538,7 @@ void m68000_mcu_device::subq_l_imm3_das_dpm() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116565,7 +116566,7 @@ void m68000_mcu_device::subq_l_imm3_das_dpm() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116627,7 +116628,7 @@ void m68000_mcu_device::subq_l_imm3_dais_dpm() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -116694,7 +116695,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116748,7 +116749,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116776,7 +116777,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116866,7 +116867,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dpm() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116920,7 +116921,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dpm() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116948,7 +116949,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_dpm() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117062,7 +117063,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dpm() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117116,7 +117117,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dpm() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117144,7 +117145,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_dpm() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117210,7 +117211,7 @@ void m68000_mcu_device::sf_ds_dpm() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117222,7 +117223,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117253,7 +117254,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -117281,7 +117282,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117300,7 +117301,7 @@ void m68000_mcu_device::dbra_ds_rel16_dpm() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117312,13 +117313,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117349,7 +117350,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117357,7 +117358,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117384,11 +117385,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117422,13 +117423,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117462,7 +117463,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117499,11 +117500,11 @@ void m68000_mcu_device::sf_ais_dpm() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117525,7 +117526,7 @@ void m68000_mcu_device::sf_ais_dpm() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117535,7 +117536,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117562,7 +117563,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117593,7 +117594,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117627,12 +117628,12 @@ void m68000_mcu_device::sf_aips_dpm() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117655,7 +117656,7 @@ void m68000_mcu_device::sf_aips_dpm() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117665,7 +117666,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117692,7 +117693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117723,7 +117724,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117756,7 +117757,7 @@ void m68000_mcu_device::sf_pais_dpm() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117764,7 +117765,7 @@ void m68000_mcu_device::sf_pais_dpm() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117787,7 +117788,7 @@ void m68000_mcu_device::sf_pais_dpm() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117797,7 +117798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117824,7 +117825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117855,7 +117856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117886,7 +117887,7 @@ void m68000_mcu_device::sf_das_dpm() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117912,11 +117913,11 @@ void m68000_mcu_device::sf_das_dpm() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117938,7 +117939,7 @@ void m68000_mcu_device::sf_das_dpm() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117948,7 +117949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -117975,7 +117976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118006,7 +118007,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118035,14 +118036,14 @@ void m68000_mcu_device::sf_dais_dpm() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118050,7 +118051,7 @@ void m68000_mcu_device::sf_dais_dpm() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118077,7 +118078,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118106,11 +118107,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118132,7 +118133,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118142,7 +118143,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118169,7 +118170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118200,7 +118201,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118233,7 +118234,7 @@ void m68000_mcu_device::sf_adr16_dpm() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118259,7 +118260,7 @@ void m68000_mcu_device::sf_adr16_dpm() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -118282,7 +118283,7 @@ void m68000_mcu_device::sf_adr16_dpm() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118319,7 +118320,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118350,7 +118351,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118381,7 +118382,7 @@ void m68000_mcu_device::sf_adr32_dpm() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118408,7 +118409,7 @@ void m68000_mcu_device::sf_adr32_dpm() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118434,7 +118435,7 @@ void m68000_mcu_device::sf_adr32_dpm() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118457,7 +118458,7 @@ void m68000_mcu_device::sf_adr32_dpm() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118467,7 +118468,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118494,7 +118495,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -118525,7 +118526,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118558,7 +118559,7 @@ void m68000_mcu_device::shi_ds_dpm() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118570,7 +118571,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118601,7 +118602,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118629,7 +118630,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118648,7 +118649,7 @@ void m68000_mcu_device::dbhi_ds_rel16_dpm() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118660,13 +118661,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118697,7 +118698,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118705,7 +118706,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118732,11 +118733,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118770,13 +118771,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118810,7 +118811,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118847,11 +118848,11 @@ void m68000_mcu_device::shi_ais_dpm() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118873,7 +118874,7 @@ void m68000_mcu_device::shi_ais_dpm() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118883,7 +118884,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -118910,7 +118911,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -118941,7 +118942,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118975,12 +118976,12 @@ void m68000_mcu_device::shi_aips_dpm() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119003,7 +119004,7 @@ void m68000_mcu_device::shi_aips_dpm() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119013,7 +119014,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119040,7 +119041,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119071,7 +119072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119104,7 +119105,7 @@ void m68000_mcu_device::shi_pais_dpm() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119112,7 +119113,7 @@ void m68000_mcu_device::shi_pais_dpm() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119135,7 +119136,7 @@ void m68000_mcu_device::shi_pais_dpm() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119145,7 +119146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119172,7 +119173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119203,7 +119204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119234,7 +119235,7 @@ void m68000_mcu_device::shi_das_dpm() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119260,11 +119261,11 @@ void m68000_mcu_device::shi_das_dpm() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119286,7 +119287,7 @@ void m68000_mcu_device::shi_das_dpm() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119296,7 +119297,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119323,7 +119324,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119354,7 +119355,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119383,14 +119384,14 @@ void m68000_mcu_device::shi_dais_dpm() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119398,7 +119399,7 @@ void m68000_mcu_device::shi_dais_dpm() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119425,7 +119426,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119454,11 +119455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119480,7 +119481,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119490,7 +119491,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119548,7 +119549,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119581,7 +119582,7 @@ void m68000_mcu_device::shi_adr16_dpm() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -119607,7 +119608,7 @@ void m68000_mcu_device::shi_adr16_dpm() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -119630,7 +119631,7 @@ void m68000_mcu_device::shi_adr16_dpm() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119640,7 +119641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119667,7 +119668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119698,7 +119699,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119729,7 +119730,7 @@ void m68000_mcu_device::shi_adr32_dpm() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119756,7 +119757,7 @@ void m68000_mcu_device::shi_adr32_dpm() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119782,7 +119783,7 @@ void m68000_mcu_device::shi_adr32_dpm() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -119805,7 +119806,7 @@ void m68000_mcu_device::shi_adr32_dpm() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119815,7 +119816,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119842,7 +119843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -119873,7 +119874,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119906,7 +119907,7 @@ void m68000_mcu_device::sls_ds_dpm() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119918,7 +119919,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -119949,7 +119950,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119977,7 +119978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119996,7 +119997,7 @@ void m68000_mcu_device::dbls_ds_rel16_dpm() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -120008,13 +120009,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120045,7 +120046,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -120053,7 +120054,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120080,11 +120081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120118,13 +120119,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120158,7 +120159,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120195,11 +120196,11 @@ void m68000_mcu_device::sls_ais_dpm() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120221,7 +120222,7 @@ void m68000_mcu_device::sls_ais_dpm() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120231,7 +120232,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120258,7 +120259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120289,7 +120290,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120323,12 +120324,12 @@ void m68000_mcu_device::sls_aips_dpm() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120351,7 +120352,7 @@ void m68000_mcu_device::sls_aips_dpm() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120361,7 +120362,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120388,7 +120389,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120419,7 +120420,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120452,7 +120453,7 @@ void m68000_mcu_device::sls_pais_dpm() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120460,7 +120461,7 @@ void m68000_mcu_device::sls_pais_dpm() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120483,7 +120484,7 @@ void m68000_mcu_device::sls_pais_dpm() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120493,7 +120494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120520,7 +120521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120551,7 +120552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120582,7 +120583,7 @@ void m68000_mcu_device::sls_das_dpm() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120608,11 +120609,11 @@ void m68000_mcu_device::sls_das_dpm() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120634,7 +120635,7 @@ void m68000_mcu_device::sls_das_dpm() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120644,7 +120645,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120671,7 +120672,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120702,7 +120703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120731,14 +120732,14 @@ void m68000_mcu_device::sls_dais_dpm() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120746,7 +120747,7 @@ void m68000_mcu_device::sls_dais_dpm() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120773,7 +120774,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120802,11 +120803,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120828,7 +120829,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120838,7 +120839,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -120865,7 +120866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120896,7 +120897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120929,7 +120930,7 @@ void m68000_mcu_device::sls_adr16_dpm() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120955,7 +120956,7 @@ void m68000_mcu_device::sls_adr16_dpm() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -120978,7 +120979,7 @@ void m68000_mcu_device::sls_adr16_dpm() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120988,7 +120989,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121015,7 +121016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -121046,7 +121047,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121077,7 +121078,7 @@ void m68000_mcu_device::sls_adr32_dpm() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121104,7 +121105,7 @@ void m68000_mcu_device::sls_adr32_dpm() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121130,7 +121131,7 @@ void m68000_mcu_device::sls_adr32_dpm() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121153,7 +121154,7 @@ void m68000_mcu_device::sls_adr32_dpm() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121163,7 +121164,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121190,7 +121191,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -121221,7 +121222,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121254,7 +121255,7 @@ void m68000_mcu_device::scc_ds_dpm() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -121266,7 +121267,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121297,7 +121298,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121325,7 +121326,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -121344,7 +121345,7 @@ void m68000_mcu_device::dbcc_ds_rel16_dpm() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -121356,13 +121357,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -121393,7 +121394,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -121401,7 +121402,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121428,11 +121429,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121466,13 +121467,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121506,7 +121507,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121543,11 +121544,11 @@ void m68000_mcu_device::scc_ais_dpm() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121569,7 +121570,7 @@ void m68000_mcu_device::scc_ais_dpm() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121579,7 +121580,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121606,7 +121607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121637,7 +121638,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121671,12 +121672,12 @@ void m68000_mcu_device::scc_aips_dpm() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121699,7 +121700,7 @@ void m68000_mcu_device::scc_aips_dpm() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121709,7 +121710,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121736,7 +121737,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121767,7 +121768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121800,7 +121801,7 @@ void m68000_mcu_device::scc_pais_dpm() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -121808,7 +121809,7 @@ void m68000_mcu_device::scc_pais_dpm() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121831,7 +121832,7 @@ void m68000_mcu_device::scc_pais_dpm() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121841,7 +121842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121868,7 +121869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121899,7 +121900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121930,7 +121931,7 @@ void m68000_mcu_device::scc_das_dpm() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -121956,11 +121957,11 @@ void m68000_mcu_device::scc_das_dpm() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121982,7 +121983,7 @@ void m68000_mcu_device::scc_das_dpm() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121992,7 +121993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122019,7 +122020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122050,7 +122051,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122079,14 +122080,14 @@ void m68000_mcu_device::scc_dais_dpm() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -122094,7 +122095,7 @@ void m68000_mcu_device::scc_dais_dpm() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122121,7 +122122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122150,11 +122151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122176,7 +122177,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122186,7 +122187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122213,7 +122214,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122244,7 +122245,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122277,7 +122278,7 @@ void m68000_mcu_device::scc_adr16_dpm() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122303,7 +122304,7 @@ void m68000_mcu_device::scc_adr16_dpm() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -122326,7 +122327,7 @@ void m68000_mcu_device::scc_adr16_dpm() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122336,7 +122337,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122363,7 +122364,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122394,7 +122395,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122425,7 +122426,7 @@ void m68000_mcu_device::scc_adr32_dpm() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122452,7 +122453,7 @@ void m68000_mcu_device::scc_adr32_dpm() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122478,7 +122479,7 @@ void m68000_mcu_device::scc_adr32_dpm() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -122501,7 +122502,7 @@ void m68000_mcu_device::scc_adr32_dpm() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122511,7 +122512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122538,7 +122539,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -122569,7 +122570,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122602,7 +122603,7 @@ void m68000_mcu_device::scs_ds_dpm() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -122614,7 +122615,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122645,7 +122646,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122673,7 +122674,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -122692,7 +122693,7 @@ void m68000_mcu_device::dbcs_ds_rel16_dpm() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -122704,13 +122705,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122741,7 +122742,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -122749,7 +122750,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122776,11 +122777,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122814,13 +122815,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122854,7 +122855,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122891,11 +122892,11 @@ void m68000_mcu_device::scs_ais_dpm() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122917,7 +122918,7 @@ void m68000_mcu_device::scs_ais_dpm() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122927,7 +122928,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -122954,7 +122955,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -122985,7 +122986,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123019,12 +123020,12 @@ void m68000_mcu_device::scs_aips_dpm() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123047,7 +123048,7 @@ void m68000_mcu_device::scs_aips_dpm() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123057,7 +123058,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123084,7 +123085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123115,7 +123116,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123148,7 +123149,7 @@ void m68000_mcu_device::scs_pais_dpm() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -123156,7 +123157,7 @@ void m68000_mcu_device::scs_pais_dpm() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123179,7 +123180,7 @@ void m68000_mcu_device::scs_pais_dpm() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123189,7 +123190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123216,7 +123217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123247,7 +123248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123278,7 +123279,7 @@ void m68000_mcu_device::scs_das_dpm() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123304,11 +123305,11 @@ void m68000_mcu_device::scs_das_dpm() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123330,7 +123331,7 @@ void m68000_mcu_device::scs_das_dpm() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123340,7 +123341,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123367,7 +123368,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123398,7 +123399,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123427,14 +123428,14 @@ void m68000_mcu_device::scs_dais_dpm() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -123442,7 +123443,7 @@ void m68000_mcu_device::scs_dais_dpm() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123469,7 +123470,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123498,11 +123499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123524,7 +123525,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123534,7 +123535,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123561,7 +123562,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123592,7 +123593,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123625,7 +123626,7 @@ void m68000_mcu_device::scs_adr16_dpm() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -123651,7 +123652,7 @@ void m68000_mcu_device::scs_adr16_dpm() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -123674,7 +123675,7 @@ void m68000_mcu_device::scs_adr16_dpm() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123684,7 +123685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123711,7 +123712,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123742,7 +123743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123773,7 +123774,7 @@ void m68000_mcu_device::scs_adr32_dpm() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123800,7 +123801,7 @@ void m68000_mcu_device::scs_adr32_dpm() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -123826,7 +123827,7 @@ void m68000_mcu_device::scs_adr32_dpm() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123849,7 +123850,7 @@ void m68000_mcu_device::scs_adr32_dpm() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123859,7 +123860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123886,7 +123887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -123917,7 +123918,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123950,7 +123951,7 @@ void m68000_mcu_device::sne_ds_dpm() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -123962,7 +123963,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -123993,7 +123994,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -124021,7 +124022,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -124040,7 +124041,7 @@ void m68000_mcu_device::dbne_ds_rel16_dpm() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -124052,13 +124053,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124089,7 +124090,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -124097,7 +124098,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124124,11 +124125,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124162,13 +124163,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124202,7 +124203,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124239,11 +124240,11 @@ void m68000_mcu_device::sne_ais_dpm() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124265,7 +124266,7 @@ void m68000_mcu_device::sne_ais_dpm() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124275,7 +124276,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124302,7 +124303,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124333,7 +124334,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124367,12 +124368,12 @@ void m68000_mcu_device::sne_aips_dpm() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124395,7 +124396,7 @@ void m68000_mcu_device::sne_aips_dpm() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124405,7 +124406,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124432,7 +124433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124463,7 +124464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124496,7 +124497,7 @@ void m68000_mcu_device::sne_pais_dpm() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124504,7 +124505,7 @@ void m68000_mcu_device::sne_pais_dpm() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124527,7 +124528,7 @@ void m68000_mcu_device::sne_pais_dpm() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124537,7 +124538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124564,7 +124565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124595,7 +124596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124626,7 +124627,7 @@ void m68000_mcu_device::sne_das_dpm() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124652,11 +124653,11 @@ void m68000_mcu_device::sne_das_dpm() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124678,7 +124679,7 @@ void m68000_mcu_device::sne_das_dpm() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124688,7 +124689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124715,7 +124716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124746,7 +124747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124775,14 +124776,14 @@ void m68000_mcu_device::sne_dais_dpm() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124790,7 +124791,7 @@ void m68000_mcu_device::sne_dais_dpm() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124817,7 +124818,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124846,11 +124847,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124872,7 +124873,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124882,7 +124883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -124909,7 +124910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124940,7 +124941,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124973,7 +124974,7 @@ void m68000_mcu_device::sne_adr16_dpm() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124999,7 +125000,7 @@ void m68000_mcu_device::sne_adr16_dpm() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -125022,7 +125023,7 @@ void m68000_mcu_device::sne_adr16_dpm() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125032,7 +125033,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125059,7 +125060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -125090,7 +125091,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125121,7 +125122,7 @@ void m68000_mcu_device::sne_adr32_dpm() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125148,7 +125149,7 @@ void m68000_mcu_device::sne_adr32_dpm() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125174,7 +125175,7 @@ void m68000_mcu_device::sne_adr32_dpm() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125197,7 +125198,7 @@ void m68000_mcu_device::sne_adr32_dpm() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125207,7 +125208,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125234,7 +125235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -125265,7 +125266,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125298,7 +125299,7 @@ void m68000_mcu_device::seq_ds_dpm() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -125310,7 +125311,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125341,7 +125342,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125369,7 +125370,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125388,7 +125389,7 @@ void m68000_mcu_device::dbeq_ds_rel16_dpm() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -125400,13 +125401,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -125437,7 +125438,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -125445,7 +125446,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125472,11 +125473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125510,13 +125511,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125550,7 +125551,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125587,11 +125588,11 @@ void m68000_mcu_device::seq_ais_dpm() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -125613,7 +125614,7 @@ void m68000_mcu_device::seq_ais_dpm() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125623,7 +125624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125650,7 +125651,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125681,7 +125682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125715,12 +125716,12 @@ void m68000_mcu_device::seq_aips_dpm() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125743,7 +125744,7 @@ void m68000_mcu_device::seq_aips_dpm() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125753,7 +125754,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125780,7 +125781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125811,7 +125812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125844,7 +125845,7 @@ void m68000_mcu_device::seq_pais_dpm() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -125852,7 +125853,7 @@ void m68000_mcu_device::seq_pais_dpm() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125875,7 +125876,7 @@ void m68000_mcu_device::seq_pais_dpm() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125885,7 +125886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -125912,7 +125913,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125943,7 +125944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125974,7 +125975,7 @@ void m68000_mcu_device::seq_das_dpm() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126000,11 +126001,11 @@ void m68000_mcu_device::seq_das_dpm() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126026,7 +126027,7 @@ void m68000_mcu_device::seq_das_dpm() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126036,7 +126037,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126063,7 +126064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126094,7 +126095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126123,14 +126124,14 @@ void m68000_mcu_device::seq_dais_dpm() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -126138,7 +126139,7 @@ void m68000_mcu_device::seq_dais_dpm() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126165,7 +126166,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126194,11 +126195,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126220,7 +126221,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126230,7 +126231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126257,7 +126258,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126288,7 +126289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126321,7 +126322,7 @@ void m68000_mcu_device::seq_adr16_dpm() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126347,7 +126348,7 @@ void m68000_mcu_device::seq_adr16_dpm() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -126370,7 +126371,7 @@ void m68000_mcu_device::seq_adr16_dpm() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126380,7 +126381,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126407,7 +126408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126438,7 +126439,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126469,7 +126470,7 @@ void m68000_mcu_device::seq_adr32_dpm() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126496,7 +126497,7 @@ void m68000_mcu_device::seq_adr32_dpm() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126522,7 +126523,7 @@ void m68000_mcu_device::seq_adr32_dpm() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -126545,7 +126546,7 @@ void m68000_mcu_device::seq_adr32_dpm() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126555,7 +126556,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126582,7 +126583,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -126613,7 +126614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126646,7 +126647,7 @@ void m68000_mcu_device::svc_ds_dpm() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -126658,7 +126659,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126689,7 +126690,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126717,7 +126718,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126736,7 +126737,7 @@ void m68000_mcu_device::dbvc_ds_rel16_dpm() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -126748,13 +126749,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126785,7 +126786,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -126793,7 +126794,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126820,11 +126821,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126858,13 +126859,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126898,7 +126899,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126935,11 +126936,11 @@ void m68000_mcu_device::svc_ais_dpm() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126961,7 +126962,7 @@ void m68000_mcu_device::svc_ais_dpm() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126971,7 +126972,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -126998,7 +126999,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127029,7 +127030,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127063,12 +127064,12 @@ void m68000_mcu_device::svc_aips_dpm() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127091,7 +127092,7 @@ void m68000_mcu_device::svc_aips_dpm() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127101,7 +127102,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127128,7 +127129,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127159,7 +127160,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127192,7 +127193,7 @@ void m68000_mcu_device::svc_pais_dpm() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -127200,7 +127201,7 @@ void m68000_mcu_device::svc_pais_dpm() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127223,7 +127224,7 @@ void m68000_mcu_device::svc_pais_dpm() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127233,7 +127234,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127260,7 +127261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127291,7 +127292,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127322,7 +127323,7 @@ void m68000_mcu_device::svc_das_dpm() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127348,11 +127349,11 @@ void m68000_mcu_device::svc_das_dpm() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127374,7 +127375,7 @@ void m68000_mcu_device::svc_das_dpm() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127384,7 +127385,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127411,7 +127412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127442,7 +127443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127471,14 +127472,14 @@ void m68000_mcu_device::svc_dais_dpm() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -127486,7 +127487,7 @@ void m68000_mcu_device::svc_dais_dpm() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127513,7 +127514,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127542,11 +127543,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127568,7 +127569,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127578,7 +127579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127605,7 +127606,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127636,7 +127637,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127669,7 +127670,7 @@ void m68000_mcu_device::svc_adr16_dpm() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -127695,7 +127696,7 @@ void m68000_mcu_device::svc_adr16_dpm() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -127718,7 +127719,7 @@ void m68000_mcu_device::svc_adr16_dpm() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127728,7 +127729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127755,7 +127756,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127786,7 +127787,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127817,7 +127818,7 @@ void m68000_mcu_device::svc_adr32_dpm() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127844,7 +127845,7 @@ void m68000_mcu_device::svc_adr32_dpm() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -127870,7 +127871,7 @@ void m68000_mcu_device::svc_adr32_dpm() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127893,7 +127894,7 @@ void m68000_mcu_device::svc_adr32_dpm() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127903,7 +127904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -127930,7 +127931,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -127961,7 +127962,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127994,7 +127995,7 @@ void m68000_mcu_device::svs_ds_dpm() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -128006,7 +128007,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128037,7 +128038,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -128065,7 +128066,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -128084,7 +128085,7 @@ void m68000_mcu_device::dbvs_ds_rel16_dpm() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -128096,13 +128097,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -128133,7 +128134,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -128141,7 +128142,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128168,11 +128169,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128206,13 +128207,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128246,7 +128247,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128283,11 +128284,11 @@ void m68000_mcu_device::svs_ais_dpm() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128309,7 +128310,7 @@ void m68000_mcu_device::svs_ais_dpm() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128319,7 +128320,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128346,7 +128347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128377,7 +128378,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128411,12 +128412,12 @@ void m68000_mcu_device::svs_aips_dpm() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128439,7 +128440,7 @@ void m68000_mcu_device::svs_aips_dpm() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128449,7 +128450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128476,7 +128477,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128507,7 +128508,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128540,7 +128541,7 @@ void m68000_mcu_device::svs_pais_dpm() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -128548,7 +128549,7 @@ void m68000_mcu_device::svs_pais_dpm() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128571,7 +128572,7 @@ void m68000_mcu_device::svs_pais_dpm() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128581,7 +128582,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128608,7 +128609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128639,7 +128640,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128670,7 +128671,7 @@ void m68000_mcu_device::svs_das_dpm() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128696,11 +128697,11 @@ void m68000_mcu_device::svs_das_dpm() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128722,7 +128723,7 @@ void m68000_mcu_device::svs_das_dpm() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128732,7 +128733,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128759,7 +128760,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128790,7 +128791,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128819,14 +128820,14 @@ void m68000_mcu_device::svs_dais_dpm() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -128834,7 +128835,7 @@ void m68000_mcu_device::svs_dais_dpm() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128861,7 +128862,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128890,11 +128891,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128916,7 +128917,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128926,7 +128927,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -128953,7 +128954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128984,7 +128985,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129017,7 +129018,7 @@ void m68000_mcu_device::svs_adr16_dpm() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129043,7 +129044,7 @@ void m68000_mcu_device::svs_adr16_dpm() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -129066,7 +129067,7 @@ void m68000_mcu_device::svs_adr16_dpm() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129076,7 +129077,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129103,7 +129104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -129134,7 +129135,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129165,7 +129166,7 @@ void m68000_mcu_device::svs_adr32_dpm() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129192,7 +129193,7 @@ void m68000_mcu_device::svs_adr32_dpm() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129218,7 +129219,7 @@ void m68000_mcu_device::svs_adr32_dpm() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129241,7 +129242,7 @@ void m68000_mcu_device::svs_adr32_dpm() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129251,7 +129252,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129278,7 +129279,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -129309,7 +129310,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129342,7 +129343,7 @@ void m68000_mcu_device::spl_ds_dpm() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -129354,7 +129355,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129385,7 +129386,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129413,7 +129414,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -129432,7 +129433,7 @@ void m68000_mcu_device::dbpl_ds_rel16_dpm() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -129444,13 +129445,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129481,7 +129482,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -129489,7 +129490,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129516,11 +129517,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129554,13 +129555,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129594,7 +129595,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129631,11 +129632,11 @@ void m68000_mcu_device::spl_ais_dpm() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -129657,7 +129658,7 @@ void m68000_mcu_device::spl_ais_dpm() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129667,7 +129668,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129694,7 +129695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129725,7 +129726,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129759,12 +129760,12 @@ void m68000_mcu_device::spl_aips_dpm() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129787,7 +129788,7 @@ void m68000_mcu_device::spl_aips_dpm() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129797,7 +129798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129824,7 +129825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129855,7 +129856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129888,7 +129889,7 @@ void m68000_mcu_device::spl_pais_dpm() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -129896,7 +129897,7 @@ void m68000_mcu_device::spl_pais_dpm() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129919,7 +129920,7 @@ void m68000_mcu_device::spl_pais_dpm() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129929,7 +129930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -129956,7 +129957,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129987,7 +129988,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130018,7 +130019,7 @@ void m68000_mcu_device::spl_das_dpm() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130044,11 +130045,11 @@ void m68000_mcu_device::spl_das_dpm() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130070,7 +130071,7 @@ void m68000_mcu_device::spl_das_dpm() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130080,7 +130081,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130107,7 +130108,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130138,7 +130139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130167,14 +130168,14 @@ void m68000_mcu_device::spl_dais_dpm() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -130182,7 +130183,7 @@ void m68000_mcu_device::spl_dais_dpm() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130209,7 +130210,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130238,11 +130239,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130264,7 +130265,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130274,7 +130275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130301,7 +130302,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130332,7 +130333,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130365,7 +130366,7 @@ void m68000_mcu_device::spl_adr16_dpm() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130391,7 +130392,7 @@ void m68000_mcu_device::spl_adr16_dpm() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -130414,7 +130415,7 @@ void m68000_mcu_device::spl_adr16_dpm() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130424,7 +130425,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130451,7 +130452,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130482,7 +130483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130513,7 +130514,7 @@ void m68000_mcu_device::spl_adr32_dpm() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130540,7 +130541,7 @@ void m68000_mcu_device::spl_adr32_dpm() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130566,7 +130567,7 @@ void m68000_mcu_device::spl_adr32_dpm() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130589,7 +130590,7 @@ void m68000_mcu_device::spl_adr32_dpm() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130599,7 +130600,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130626,7 +130627,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -130657,7 +130658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130690,7 +130691,7 @@ void m68000_mcu_device::smi_ds_dpm() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130702,7 +130703,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130733,7 +130734,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130761,7 +130762,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130780,7 +130781,7 @@ void m68000_mcu_device::dbmi_ds_rel16_dpm() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130792,13 +130793,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130829,7 +130830,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130837,7 +130838,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130864,11 +130865,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130902,13 +130903,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130942,7 +130943,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -130979,11 +130980,11 @@ void m68000_mcu_device::smi_ais_dpm() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131005,7 +131006,7 @@ void m68000_mcu_device::smi_ais_dpm() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131015,7 +131016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131042,7 +131043,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131073,7 +131074,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131107,12 +131108,12 @@ void m68000_mcu_device::smi_aips_dpm() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131135,7 +131136,7 @@ void m68000_mcu_device::smi_aips_dpm() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131145,7 +131146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131172,7 +131173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131203,7 +131204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131236,7 +131237,7 @@ void m68000_mcu_device::smi_pais_dpm() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131244,7 +131245,7 @@ void m68000_mcu_device::smi_pais_dpm() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131267,7 +131268,7 @@ void m68000_mcu_device::smi_pais_dpm() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131277,7 +131278,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131304,7 +131305,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131335,7 +131336,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131366,7 +131367,7 @@ void m68000_mcu_device::smi_das_dpm() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131392,11 +131393,11 @@ void m68000_mcu_device::smi_das_dpm() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131418,7 +131419,7 @@ void m68000_mcu_device::smi_das_dpm() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131428,7 +131429,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131455,7 +131456,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131486,7 +131487,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131515,14 +131516,14 @@ void m68000_mcu_device::smi_dais_dpm() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131530,7 +131531,7 @@ void m68000_mcu_device::smi_dais_dpm() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131557,7 +131558,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131586,11 +131587,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131612,7 +131613,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131622,7 +131623,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131649,7 +131650,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131680,7 +131681,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131713,7 +131714,7 @@ void m68000_mcu_device::smi_adr16_dpm() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131739,7 +131740,7 @@ void m68000_mcu_device::smi_adr16_dpm() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -131762,7 +131763,7 @@ void m68000_mcu_device::smi_adr16_dpm() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131772,7 +131773,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131799,7 +131800,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131830,7 +131831,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131861,7 +131862,7 @@ void m68000_mcu_device::smi_adr32_dpm() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131888,7 +131889,7 @@ void m68000_mcu_device::smi_adr32_dpm() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -131914,7 +131915,7 @@ void m68000_mcu_device::smi_adr32_dpm() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -131937,7 +131938,7 @@ void m68000_mcu_device::smi_adr32_dpm() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131947,7 +131948,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -131974,7 +131975,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -132005,7 +132006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132038,7 +132039,7 @@ void m68000_mcu_device::sge_ds_dpm() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -132050,7 +132051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132081,7 +132082,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -132109,7 +132110,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -132128,7 +132129,7 @@ void m68000_mcu_device::dbge_ds_rel16_dpm() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -132140,13 +132141,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -132177,7 +132178,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -132185,7 +132186,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132212,11 +132213,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132250,13 +132251,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132290,7 +132291,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132327,11 +132328,11 @@ void m68000_mcu_device::sge_ais_dpm() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132353,7 +132354,7 @@ void m68000_mcu_device::sge_ais_dpm() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132363,7 +132364,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132390,7 +132391,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132421,7 +132422,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132455,12 +132456,12 @@ void m68000_mcu_device::sge_aips_dpm() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132483,7 +132484,7 @@ void m68000_mcu_device::sge_aips_dpm() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132493,7 +132494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132520,7 +132521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132551,7 +132552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132584,7 +132585,7 @@ void m68000_mcu_device::sge_pais_dpm() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132592,7 +132593,7 @@ void m68000_mcu_device::sge_pais_dpm() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132615,7 +132616,7 @@ void m68000_mcu_device::sge_pais_dpm() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132625,7 +132626,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132652,7 +132653,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132683,7 +132684,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132714,7 +132715,7 @@ void m68000_mcu_device::sge_das_dpm() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132740,11 +132741,11 @@ void m68000_mcu_device::sge_das_dpm() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132766,7 +132767,7 @@ void m68000_mcu_device::sge_das_dpm() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132776,7 +132777,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132803,7 +132804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -132834,7 +132835,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132863,14 +132864,14 @@ void m68000_mcu_device::sge_dais_dpm() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132878,7 +132879,7 @@ void m68000_mcu_device::sge_dais_dpm() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132905,7 +132906,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132934,11 +132935,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132960,7 +132961,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132970,7 +132971,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -132997,7 +132998,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133028,7 +133029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133061,7 +133062,7 @@ void m68000_mcu_device::sge_adr16_dpm() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133087,7 +133088,7 @@ void m68000_mcu_device::sge_adr16_dpm() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -133110,7 +133111,7 @@ void m68000_mcu_device::sge_adr16_dpm() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133120,7 +133121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133147,7 +133148,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133178,7 +133179,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133209,7 +133210,7 @@ void m68000_mcu_device::sge_adr32_dpm() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133236,7 +133237,7 @@ void m68000_mcu_device::sge_adr32_dpm() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133262,7 +133263,7 @@ void m68000_mcu_device::sge_adr32_dpm() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -133285,7 +133286,7 @@ void m68000_mcu_device::sge_adr32_dpm() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133295,7 +133296,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133322,7 +133323,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -133353,7 +133354,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133386,7 +133387,7 @@ void m68000_mcu_device::slt_ds_dpm() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -133398,7 +133399,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133429,7 +133430,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133457,7 +133458,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -133476,7 +133477,7 @@ void m68000_mcu_device::dblt_ds_rel16_dpm() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -133488,13 +133489,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133525,7 +133526,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -133533,7 +133534,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133560,11 +133561,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133598,13 +133599,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133638,7 +133639,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133675,11 +133676,11 @@ void m68000_mcu_device::slt_ais_dpm() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -133701,7 +133702,7 @@ void m68000_mcu_device::slt_ais_dpm() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133711,7 +133712,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133738,7 +133739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133769,7 +133770,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133803,12 +133804,12 @@ void m68000_mcu_device::slt_aips_dpm() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133831,7 +133832,7 @@ void m68000_mcu_device::slt_aips_dpm() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133841,7 +133842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -133868,7 +133869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133899,7 +133900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133932,7 +133933,7 @@ void m68000_mcu_device::slt_pais_dpm() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -133940,7 +133941,7 @@ void m68000_mcu_device::slt_pais_dpm() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133963,7 +133964,7 @@ void m68000_mcu_device::slt_pais_dpm() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133973,7 +133974,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134000,7 +134001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -134031,7 +134032,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134062,7 +134063,7 @@ void m68000_mcu_device::slt_das_dpm() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134088,11 +134089,11 @@ void m68000_mcu_device::slt_das_dpm() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134114,7 +134115,7 @@ void m68000_mcu_device::slt_das_dpm() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134124,7 +134125,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134151,7 +134152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134182,7 +134183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134211,14 +134212,14 @@ void m68000_mcu_device::slt_dais_dpm() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -134226,7 +134227,7 @@ void m68000_mcu_device::slt_dais_dpm() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134253,7 +134254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134282,11 +134283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134308,7 +134309,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134318,7 +134319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134345,7 +134346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134376,7 +134377,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134409,7 +134410,7 @@ void m68000_mcu_device::slt_adr16_dpm() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134435,7 +134436,7 @@ void m68000_mcu_device::slt_adr16_dpm() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -134458,7 +134459,7 @@ void m68000_mcu_device::slt_adr16_dpm() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134468,7 +134469,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134495,7 +134496,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134526,7 +134527,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134557,7 +134558,7 @@ void m68000_mcu_device::slt_adr32_dpm() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134584,7 +134585,7 @@ void m68000_mcu_device::slt_adr32_dpm() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134610,7 +134611,7 @@ void m68000_mcu_device::slt_adr32_dpm() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -134633,7 +134634,7 @@ void m68000_mcu_device::slt_adr32_dpm() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134643,7 +134644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134670,7 +134671,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -134701,7 +134702,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134734,7 +134735,7 @@ void m68000_mcu_device::sgt_ds_dpm() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -134746,7 +134747,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134777,7 +134778,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134805,7 +134806,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -134824,7 +134825,7 @@ void m68000_mcu_device::dbgt_ds_rel16_dpm() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -134836,13 +134837,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134873,7 +134874,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -134881,7 +134882,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134908,11 +134909,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134946,13 +134947,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -134986,7 +134987,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135023,11 +135024,11 @@ void m68000_mcu_device::sgt_ais_dpm() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135049,7 +135050,7 @@ void m68000_mcu_device::sgt_ais_dpm() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135059,7 +135060,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135086,7 +135087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135117,7 +135118,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135151,12 +135152,12 @@ void m68000_mcu_device::sgt_aips_dpm() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135179,7 +135180,7 @@ void m68000_mcu_device::sgt_aips_dpm() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135189,7 +135190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135216,7 +135217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135247,7 +135248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135280,7 +135281,7 @@ void m68000_mcu_device::sgt_pais_dpm() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135288,7 +135289,7 @@ void m68000_mcu_device::sgt_pais_dpm() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135311,7 +135312,7 @@ void m68000_mcu_device::sgt_pais_dpm() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135321,7 +135322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135348,7 +135349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135379,7 +135380,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135410,7 +135411,7 @@ void m68000_mcu_device::sgt_das_dpm() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135436,11 +135437,11 @@ void m68000_mcu_device::sgt_das_dpm() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135462,7 +135463,7 @@ void m68000_mcu_device::sgt_das_dpm() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135472,7 +135473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135499,7 +135500,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135530,7 +135531,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135559,14 +135560,14 @@ void m68000_mcu_device::sgt_dais_dpm() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135574,7 +135575,7 @@ void m68000_mcu_device::sgt_dais_dpm() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135601,7 +135602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135630,11 +135631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135656,7 +135657,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135666,7 +135667,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135693,7 +135694,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135724,7 +135725,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135757,7 +135758,7 @@ void m68000_mcu_device::sgt_adr16_dpm() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135783,7 +135784,7 @@ void m68000_mcu_device::sgt_adr16_dpm() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -135806,7 +135807,7 @@ void m68000_mcu_device::sgt_adr16_dpm() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135816,7 +135817,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135843,7 +135844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135874,7 +135875,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135905,7 +135906,7 @@ void m68000_mcu_device::sgt_adr32_dpm() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -135932,7 +135933,7 @@ void m68000_mcu_device::sgt_adr32_dpm() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -135958,7 +135959,7 @@ void m68000_mcu_device::sgt_adr32_dpm() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135981,7 +135982,7 @@ void m68000_mcu_device::sgt_adr32_dpm() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135991,7 +135992,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136018,7 +136019,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -136049,7 +136050,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136082,7 +136083,7 @@ void m68000_mcu_device::sle_ds_dpm() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -136094,7 +136095,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136125,7 +136126,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -136153,7 +136154,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -136172,7 +136173,7 @@ void m68000_mcu_device::dble_ds_rel16_dpm() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -136184,13 +136185,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136221,7 +136222,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -136229,7 +136230,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136256,11 +136257,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136294,13 +136295,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136334,7 +136335,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136371,11 +136372,11 @@ void m68000_mcu_device::sle_ais_dpm() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136397,7 +136398,7 @@ void m68000_mcu_device::sle_ais_dpm() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136407,7 +136408,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136434,7 +136435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136465,7 +136466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136499,12 +136500,12 @@ void m68000_mcu_device::sle_aips_dpm() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136527,7 +136528,7 @@ void m68000_mcu_device::sle_aips_dpm() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136537,7 +136538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136564,7 +136565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136595,7 +136596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136628,7 +136629,7 @@ void m68000_mcu_device::sle_pais_dpm() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136636,7 +136637,7 @@ void m68000_mcu_device::sle_pais_dpm() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136659,7 +136660,7 @@ void m68000_mcu_device::sle_pais_dpm() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136669,7 +136670,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136696,7 +136697,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136727,7 +136728,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136758,7 +136759,7 @@ void m68000_mcu_device::sle_das_dpm() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136784,11 +136785,11 @@ void m68000_mcu_device::sle_das_dpm() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136810,7 +136811,7 @@ void m68000_mcu_device::sle_das_dpm() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136820,7 +136821,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136847,7 +136848,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -136878,7 +136879,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136907,14 +136908,14 @@ void m68000_mcu_device::sle_dais_dpm() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136922,7 +136923,7 @@ void m68000_mcu_device::sle_dais_dpm() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136949,7 +136950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -136978,11 +136979,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -137004,7 +137005,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137014,7 +137015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137041,7 +137042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137072,7 +137073,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137105,7 +137106,7 @@ void m68000_mcu_device::sle_adr16_dpm() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137131,7 +137132,7 @@ void m68000_mcu_device::sle_adr16_dpm() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -137154,7 +137155,7 @@ void m68000_mcu_device::sle_adr16_dpm() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137164,7 +137165,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137191,7 +137192,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137222,7 +137223,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137253,7 +137254,7 @@ void m68000_mcu_device::sle_adr32_dpm() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137280,7 +137281,7 @@ void m68000_mcu_device::sle_adr32_dpm() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -137306,7 +137307,7 @@ void m68000_mcu_device::sle_adr32_dpm() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137329,7 +137330,7 @@ void m68000_mcu_device::sle_adr32_dpm() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137339,7 +137340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -137366,7 +137367,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -137397,7 +137398,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137627,7 +137628,7 @@ void m68000_mcu_device::bsr_rel16_dpm() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -137750,7 +137751,7 @@ void m68000_mcu_device::bsr_rel8_dpm() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -140690,7 +140691,7 @@ void m68000_mcu_device::moveq_imm8o_dd_dpm() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -140737,7 +140738,7 @@ void m68000_mcu_device::or_b_ds_dd_dpm() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140745,7 +140746,7 @@ void m68000_mcu_device::or_b_ds_dd_dpm() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140785,11 +140786,11 @@ void m68000_mcu_device::or_b_ais_dd_dpm() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140811,7 +140812,7 @@ void m68000_mcu_device::or_b_ais_dd_dpm() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140819,7 +140820,7 @@ void m68000_mcu_device::or_b_ais_dd_dpm() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140862,12 +140863,12 @@ void m68000_mcu_device::or_b_aips_dd_dpm() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140890,7 +140891,7 @@ void m68000_mcu_device::or_b_aips_dd_dpm() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140898,7 +140899,7 @@ void m68000_mcu_device::or_b_aips_dd_dpm() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -140940,7 +140941,7 @@ void m68000_mcu_device::or_b_pais_dd_dpm() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140948,7 +140949,7 @@ void m68000_mcu_device::or_b_pais_dd_dpm() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140971,7 +140972,7 @@ void m68000_mcu_device::or_b_pais_dd_dpm() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140979,7 +140980,7 @@ void m68000_mcu_device::or_b_pais_dd_dpm() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141019,7 +141020,7 @@ void m68000_mcu_device::or_b_das_dd_dpm() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141045,11 +141046,11 @@ void m68000_mcu_device::or_b_das_dd_dpm() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141071,7 +141072,7 @@ void m68000_mcu_device::or_b_das_dd_dpm() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141079,7 +141080,7 @@ void m68000_mcu_device::or_b_das_dd_dpm() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141117,14 +141118,14 @@ void m68000_mcu_device::or_b_dais_dd_dpm() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141132,7 +141133,7 @@ void m68000_mcu_device::or_b_dais_dd_dpm() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141159,7 +141160,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141188,11 +141189,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141214,7 +141215,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141222,7 +141223,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141264,7 +141265,7 @@ void m68000_mcu_device::or_b_adr16_dd_dpm() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -141290,7 +141291,7 @@ void m68000_mcu_device::or_b_adr16_dd_dpm() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -141313,7 +141314,7 @@ void m68000_mcu_device::or_b_adr16_dd_dpm() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141321,7 +141322,7 @@ void m68000_mcu_device::or_b_adr16_dd_dpm() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141361,7 +141362,7 @@ void m68000_mcu_device::or_b_adr32_dd_dpm() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141388,7 +141389,7 @@ void m68000_mcu_device::or_b_adr32_dd_dpm() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -141414,7 +141415,7 @@ void m68000_mcu_device::or_b_adr32_dd_dpm() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -141437,7 +141438,7 @@ void m68000_mcu_device::or_b_adr32_dd_dpm() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141445,7 +141446,7 @@ void m68000_mcu_device::or_b_adr32_dd_dpm() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141484,7 +141485,7 @@ void m68000_mcu_device::or_b_dpc_dd_dpm() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141510,11 +141511,11 @@ void m68000_mcu_device::or_b_dpc_dd_dpm() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141536,7 +141537,7 @@ void m68000_mcu_device::or_b_dpc_dd_dpm() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141544,7 +141545,7 @@ void m68000_mcu_device::or_b_dpc_dd_dpm() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141581,14 +141582,14 @@ void m68000_mcu_device::or_b_dpci_dd_dpm() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141596,7 +141597,7 @@ void m68000_mcu_device::or_b_dpci_dd_dpm() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141623,7 +141624,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141652,11 +141653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141678,7 +141679,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141686,7 +141687,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141728,7 +141729,7 @@ void m68000_mcu_device::or_b_imm8_dd_dpm() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141755,7 +141756,7 @@ void m68000_mcu_device::or_b_imm8_dd_dpm() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141763,7 +141764,7 @@ void m68000_mcu_device::or_b_imm8_dd_dpm() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141805,7 +141806,7 @@ void m68000_mcu_device::or_w_ds_dd_dpm() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141813,7 +141814,7 @@ void m68000_mcu_device::or_w_ds_dd_dpm() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141853,11 +141854,11 @@ void m68000_mcu_device::or_w_ais_dd_dpm() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -141883,7 +141884,7 @@ void m68000_mcu_device::or_w_ais_dd_dpm() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141891,7 +141892,7 @@ void m68000_mcu_device::or_w_ais_dd_dpm() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -141934,12 +141935,12 @@ void m68000_mcu_device::or_w_aips_dd_dpm() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -141966,7 +141967,7 @@ void m68000_mcu_device::or_w_aips_dd_dpm() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141974,7 +141975,7 @@ void m68000_mcu_device::or_w_aips_dd_dpm() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142016,7 +142017,7 @@ void m68000_mcu_device::or_w_pais_dd_dpm() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142024,7 +142025,7 @@ void m68000_mcu_device::or_w_pais_dd_dpm() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142051,7 +142052,7 @@ void m68000_mcu_device::or_w_pais_dd_dpm() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142059,7 +142060,7 @@ void m68000_mcu_device::or_w_pais_dd_dpm() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142099,7 +142100,7 @@ void m68000_mcu_device::or_w_das_dd_dpm() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142125,11 +142126,11 @@ void m68000_mcu_device::or_w_das_dd_dpm() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142155,7 +142156,7 @@ void m68000_mcu_device::or_w_das_dd_dpm() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142163,7 +142164,7 @@ void m68000_mcu_device::or_w_das_dd_dpm() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142201,14 +142202,14 @@ void m68000_mcu_device::or_w_dais_dd_dpm() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142216,7 +142217,7 @@ void m68000_mcu_device::or_w_dais_dd_dpm() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142243,7 +142244,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142272,11 +142273,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -142302,7 +142303,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142310,7 +142311,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142352,7 +142353,7 @@ void m68000_mcu_device::or_w_adr16_dd_dpm() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -142378,7 +142379,7 @@ void m68000_mcu_device::or_w_adr16_dd_dpm() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -142405,7 +142406,7 @@ void m68000_mcu_device::or_w_adr16_dd_dpm() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142413,7 +142414,7 @@ void m68000_mcu_device::or_w_adr16_dd_dpm() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142453,7 +142454,7 @@ void m68000_mcu_device::or_w_adr32_dd_dpm() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142480,7 +142481,7 @@ void m68000_mcu_device::or_w_adr32_dd_dpm() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -142506,7 +142507,7 @@ void m68000_mcu_device::or_w_adr32_dd_dpm() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -142533,7 +142534,7 @@ void m68000_mcu_device::or_w_adr32_dd_dpm() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142541,7 +142542,7 @@ void m68000_mcu_device::or_w_adr32_dd_dpm() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142580,7 +142581,7 @@ void m68000_mcu_device::or_w_dpc_dd_dpm() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142606,11 +142607,11 @@ void m68000_mcu_device::or_w_dpc_dd_dpm() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142636,7 +142637,7 @@ void m68000_mcu_device::or_w_dpc_dd_dpm() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142644,7 +142645,7 @@ void m68000_mcu_device::or_w_dpc_dd_dpm() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142681,14 +142682,14 @@ void m68000_mcu_device::or_w_dpci_dd_dpm() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142696,7 +142697,7 @@ void m68000_mcu_device::or_w_dpci_dd_dpm() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142723,7 +142724,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142752,11 +142753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142782,7 +142783,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142790,7 +142791,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142832,7 +142833,7 @@ void m68000_mcu_device::or_w_imm16_dd_dpm() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142859,7 +142860,7 @@ void m68000_mcu_device::or_w_imm16_dd_dpm() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142867,7 +142868,7 @@ void m68000_mcu_device::or_w_imm16_dd_dpm() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142909,12 +142910,12 @@ void m68000_mcu_device::or_l_ds_dd_dpm() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -142937,7 +142938,7 @@ void m68000_mcu_device::or_l_ds_dd_dpm() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -142946,7 +142947,7 @@ void m68000_mcu_device::or_l_ds_dd_dpm() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142966,7 +142967,7 @@ void m68000_mcu_device::or_l_ais_dd_dpm() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142994,7 +142995,7 @@ void m68000_mcu_device::or_l_ais_dd_dpm() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143020,12 +143021,12 @@ void m68000_mcu_device::or_l_ais_dd_dpm() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143054,7 +143055,7 @@ void m68000_mcu_device::or_l_ais_dd_dpm() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143074,7 +143075,7 @@ void m68000_mcu_device::or_l_aips_dd_dpm() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143102,11 +143103,11 @@ void m68000_mcu_device::or_l_aips_dd_dpm() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143132,12 +143133,12 @@ void m68000_mcu_device::or_l_aips_dd_dpm() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143166,7 +143167,7 @@ void m68000_mcu_device::or_l_aips_dd_dpm() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143185,14 +143186,14 @@ void m68000_mcu_device::or_l_pais_dd_dpm() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143219,7 +143220,7 @@ void m68000_mcu_device::or_l_pais_dd_dpm() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143245,12 +143246,12 @@ void m68000_mcu_device::or_l_pais_dd_dpm() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143279,7 +143280,7 @@ void m68000_mcu_device::or_l_pais_dd_dpm() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143299,7 +143300,7 @@ void m68000_mcu_device::or_l_das_dd_dpm() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143324,7 +143325,7 @@ void m68000_mcu_device::or_l_das_dd_dpm() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143352,7 +143353,7 @@ void m68000_mcu_device::or_l_das_dd_dpm() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143378,12 +143379,12 @@ void m68000_mcu_device::or_l_das_dd_dpm() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143412,7 +143413,7 @@ void m68000_mcu_device::or_l_das_dd_dpm() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143430,14 +143431,14 @@ void m68000_mcu_device::or_l_dais_dd_dpm() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -143445,7 +143446,7 @@ void m68000_mcu_device::or_l_dais_dd_dpm() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143472,7 +143473,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143500,7 +143501,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143528,7 +143529,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143554,12 +143555,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143588,7 +143589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143610,7 +143611,7 @@ void m68000_mcu_device::or_l_adr16_dd_dpm() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -143636,7 +143637,7 @@ void m68000_mcu_device::or_l_adr16_dd_dpm() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143664,7 +143665,7 @@ void m68000_mcu_device::or_l_adr16_dd_dpm() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143690,12 +143691,12 @@ void m68000_mcu_device::or_l_adr16_dd_dpm() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143724,7 +143725,7 @@ void m68000_mcu_device::or_l_adr16_dd_dpm() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143744,7 +143745,7 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143771,7 +143772,7 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143797,7 +143798,7 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -143825,7 +143826,7 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -143851,12 +143852,12 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143885,7 +143886,7 @@ void m68000_mcu_device::or_l_adr32_dd_dpm() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143904,7 +143905,7 @@ void m68000_mcu_device::or_l_dpc_dd_dpm() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143929,7 +143930,7 @@ void m68000_mcu_device::or_l_dpc_dd_dpm() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143957,7 +143958,7 @@ void m68000_mcu_device::or_l_dpc_dd_dpm() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -143983,12 +143984,12 @@ void m68000_mcu_device::or_l_dpc_dd_dpm() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144017,7 +144018,7 @@ void m68000_mcu_device::or_l_dpc_dd_dpm() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144034,14 +144035,14 @@ void m68000_mcu_device::or_l_dpci_dd_dpm() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -144049,7 +144050,7 @@ void m68000_mcu_device::or_l_dpci_dd_dpm() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144076,7 +144077,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144104,7 +144105,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -144132,7 +144133,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144158,12 +144159,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144192,7 +144193,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144212,7 +144213,7 @@ void m68000_mcu_device::or_l_imm32_dd_dpm() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144239,7 +144240,7 @@ void m68000_mcu_device::or_l_imm32_dd_dpm() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144266,12 +144267,12 @@ void m68000_mcu_device::or_l_imm32_dd_dpm() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -144294,7 +144295,7 @@ void m68000_mcu_device::or_l_imm32_dd_dpm() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -144303,7 +144304,7 @@ void m68000_mcu_device::or_l_imm32_dd_dpm() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144325,13 +144326,13 @@ void m68000_mcu_device::divu_w_ds_dd_dpm() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144344,7 +144345,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144362,7 +144363,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144370,7 +144371,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -144398,7 +144399,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144424,7 +144425,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144561,7 +144562,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144595,7 +144596,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144606,7 +144607,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144618,7 +144619,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144638,7 +144639,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -144649,7 +144650,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144659,13 +144660,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144676,7 +144677,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -144686,7 +144687,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -144694,7 +144695,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144736,7 +144737,7 @@ void m68000_mcu_device::divu_w_ais_dd_dpm() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144765,13 +144766,13 @@ void m68000_mcu_device::divu_w_ais_dd_dpm() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144784,7 +144785,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144802,7 +144803,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144810,7 +144811,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144838,7 +144839,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144864,7 +144865,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145001,7 +145002,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145035,7 +145036,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145046,7 +145047,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145058,7 +145059,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145078,7 +145079,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145089,7 +145090,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145099,13 +145100,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145116,7 +145117,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145126,7 +145127,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145134,7 +145135,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145182,7 +145183,7 @@ void m68000_mcu_device::divu_w_aips_dd_dpm() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145209,13 +145210,13 @@ void m68000_mcu_device::divu_w_aips_dd_dpm() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145228,7 +145229,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145246,7 +145247,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145254,7 +145255,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145282,7 +145283,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145308,7 +145309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145445,7 +145446,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145479,7 +145480,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145490,7 +145491,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145502,7 +145503,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145522,7 +145523,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145533,7 +145534,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145543,13 +145544,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145560,7 +145561,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145570,7 +145571,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145578,7 +145579,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145628,7 +145629,7 @@ void m68000_mcu_device::divu_w_pais_dd_dpm() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145655,13 +145656,13 @@ void m68000_mcu_device::divu_w_pais_dd_dpm() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145674,7 +145675,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145692,7 +145693,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145700,7 +145701,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145728,7 +145729,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145754,7 +145755,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145891,7 +145892,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145925,7 +145926,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145936,7 +145937,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145948,7 +145949,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145968,7 +145969,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145979,7 +145980,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145989,13 +145990,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146006,7 +146007,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146016,7 +146017,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146024,7 +146025,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146091,7 +146092,7 @@ void m68000_mcu_device::divu_w_das_dd_dpm() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146120,13 +146121,13 @@ void m68000_mcu_device::divu_w_das_dd_dpm() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146139,7 +146140,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146157,7 +146158,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146165,7 +146166,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146193,7 +146194,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146219,7 +146220,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146356,7 +146357,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146390,7 +146391,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146401,7 +146402,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146413,7 +146414,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146433,7 +146434,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146444,7 +146445,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146454,13 +146455,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146471,7 +146472,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146481,7 +146482,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146489,7 +146490,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146529,7 +146530,7 @@ void m68000_mcu_device::divu_w_dais_dd_dpm() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146597,7 +146598,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146626,13 +146627,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146645,7 +146646,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146663,7 +146664,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146671,7 +146672,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146699,7 +146700,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146725,7 +146726,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146862,7 +146863,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146896,7 +146897,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146907,7 +146908,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146919,7 +146920,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146939,7 +146940,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146950,7 +146951,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146960,13 +146961,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146977,7 +146978,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146987,7 +146988,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146995,7 +146996,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147063,7 +147064,7 @@ void m68000_mcu_device::divu_w_adr16_dd_dpm() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -147090,13 +147091,13 @@ void m68000_mcu_device::divu_w_adr16_dd_dpm() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147109,7 +147110,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147127,7 +147128,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147135,7 +147136,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -147163,7 +147164,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147189,7 +147190,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147326,7 +147327,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147360,7 +147361,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147371,7 +147372,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147383,7 +147384,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147403,7 +147404,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147414,7 +147415,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147424,13 +147425,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147441,7 +147442,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147451,7 +147452,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147459,7 +147460,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147551,7 +147552,7 @@ void m68000_mcu_device::divu_w_adr32_dd_dpm() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147578,13 +147579,13 @@ void m68000_mcu_device::divu_w_adr32_dd_dpm() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147597,7 +147598,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147615,7 +147616,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147623,7 +147624,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147651,7 +147652,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147677,7 +147678,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -147814,7 +147815,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147848,7 +147849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147859,7 +147860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147871,7 +147872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147891,7 +147892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147902,7 +147903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147912,13 +147913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147929,7 +147930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147939,7 +147940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147947,7 +147948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148013,7 +148014,7 @@ void m68000_mcu_device::divu_w_dpc_dd_dpm() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148042,13 +148043,13 @@ void m68000_mcu_device::divu_w_dpc_dd_dpm() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148061,7 +148062,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148079,7 +148080,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148087,7 +148088,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148115,7 +148116,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148141,7 +148142,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148278,7 +148279,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148312,7 +148313,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148323,7 +148324,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148335,7 +148336,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148355,7 +148356,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148366,7 +148367,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148376,13 +148377,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148393,7 +148394,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148403,7 +148404,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148411,7 +148412,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148450,7 +148451,7 @@ void m68000_mcu_device::divu_w_dpci_dd_dpm() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148518,7 +148519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148547,13 +148548,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148566,7 +148567,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148584,7 +148585,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148592,7 +148593,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148620,7 +148621,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148646,7 +148647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148783,7 +148784,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148817,7 +148818,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148828,7 +148829,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148840,7 +148841,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148860,7 +148861,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148871,7 +148872,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148881,13 +148882,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148898,7 +148899,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148908,7 +148909,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148916,7 +148917,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148986,13 +148987,13 @@ void m68000_mcu_device::divu_w_imm16_dd_dpm() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -149005,7 +149006,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149023,7 +149024,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -149031,7 +149032,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -149059,7 +149060,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -149085,7 +149086,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -149222,7 +149223,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149256,7 +149257,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149267,7 +149268,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149279,7 +149280,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149299,7 +149300,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -149310,7 +149311,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149320,13 +149321,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149337,7 +149338,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -149347,7 +149348,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -149355,7 +149356,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149399,12 +149400,12 @@ void m68000_mcu_device::sbcd_ds_dd_dpm() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149456,7 +149457,7 @@ void m68000_mcu_device::sbcd_pais_paid_dpm() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -149500,12 +149501,12 @@ void m68000_mcu_device::sbcd_pais_paid_dpm() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149564,11 +149565,11 @@ void m68000_mcu_device::or_b_dd_ais_dpm() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149590,7 +149591,7 @@ void m68000_mcu_device::or_b_dd_ais_dpm() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149620,7 +149621,7 @@ void m68000_mcu_device::or_b_dd_ais_dpm() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149655,12 +149656,12 @@ void m68000_mcu_device::or_b_dd_aips_dpm() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149683,7 +149684,7 @@ void m68000_mcu_device::or_b_dd_aips_dpm() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149713,7 +149714,7 @@ void m68000_mcu_device::or_b_dd_aips_dpm() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149747,7 +149748,7 @@ void m68000_mcu_device::or_b_dd_pais_dpm() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149755,7 +149756,7 @@ void m68000_mcu_device::or_b_dd_pais_dpm() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149778,7 +149779,7 @@ void m68000_mcu_device::or_b_dd_pais_dpm() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149808,7 +149809,7 @@ void m68000_mcu_device::or_b_dd_pais_dpm() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149840,7 +149841,7 @@ void m68000_mcu_device::or_b_dd_das_dpm() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149866,11 +149867,11 @@ void m68000_mcu_device::or_b_dd_das_dpm() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149892,7 +149893,7 @@ void m68000_mcu_device::or_b_dd_das_dpm() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149922,7 +149923,7 @@ void m68000_mcu_device::or_b_dd_das_dpm() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149952,14 +149953,14 @@ void m68000_mcu_device::or_b_dd_dais_dpm() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149967,7 +149968,7 @@ void m68000_mcu_device::or_b_dd_dais_dpm() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -149994,7 +149995,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150023,11 +150024,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -150049,7 +150050,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150079,7 +150080,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150113,7 +150114,7 @@ void m68000_mcu_device::or_b_dd_adr16_dpm() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150139,7 +150140,7 @@ void m68000_mcu_device::or_b_dd_adr16_dpm() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -150162,7 +150163,7 @@ void m68000_mcu_device::or_b_dd_adr16_dpm() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150192,7 +150193,7 @@ void m68000_mcu_device::or_b_dd_adr16_dpm() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150224,7 +150225,7 @@ void m68000_mcu_device::or_b_dd_adr32_dpm() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150251,7 +150252,7 @@ void m68000_mcu_device::or_b_dd_adr32_dpm() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -150277,7 +150278,7 @@ void m68000_mcu_device::or_b_dd_adr32_dpm() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150300,7 +150301,7 @@ void m68000_mcu_device::or_b_dd_adr32_dpm() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150330,7 +150331,7 @@ void m68000_mcu_device::or_b_dd_adr32_dpm() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150362,11 +150363,11 @@ void m68000_mcu_device::or_w_dd_ais_dpm() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150392,7 +150393,7 @@ void m68000_mcu_device::or_w_dd_ais_dpm() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150422,7 +150423,7 @@ void m68000_mcu_device::or_w_dd_ais_dpm() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150463,12 +150464,12 @@ void m68000_mcu_device::or_w_dd_aips_dpm() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150495,7 +150496,7 @@ void m68000_mcu_device::or_w_dd_aips_dpm() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150525,7 +150526,7 @@ void m68000_mcu_device::or_w_dd_aips_dpm() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150565,7 +150566,7 @@ void m68000_mcu_device::or_w_dd_pais_dpm() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150573,7 +150574,7 @@ void m68000_mcu_device::or_w_dd_pais_dpm() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150600,7 +150601,7 @@ void m68000_mcu_device::or_w_dd_pais_dpm() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150630,7 +150631,7 @@ void m68000_mcu_device::or_w_dd_pais_dpm() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150668,7 +150669,7 @@ void m68000_mcu_device::or_w_dd_das_dpm() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150694,11 +150695,11 @@ void m68000_mcu_device::or_w_dd_das_dpm() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150724,7 +150725,7 @@ void m68000_mcu_device::or_w_dd_das_dpm() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150754,7 +150755,7 @@ void m68000_mcu_device::or_w_dd_das_dpm() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150790,14 +150791,14 @@ void m68000_mcu_device::or_w_dd_dais_dpm() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -150805,7 +150806,7 @@ void m68000_mcu_device::or_w_dd_dais_dpm() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150832,7 +150833,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -150861,11 +150862,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -150891,7 +150892,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150921,7 +150922,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -150961,7 +150962,7 @@ void m68000_mcu_device::or_w_dd_adr16_dpm() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150987,7 +150988,7 @@ void m68000_mcu_device::or_w_dd_adr16_dpm() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151014,7 +151015,7 @@ void m68000_mcu_device::or_w_dd_adr16_dpm() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151044,7 +151045,7 @@ void m68000_mcu_device::or_w_dd_adr16_dpm() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151082,7 +151083,7 @@ void m68000_mcu_device::or_w_dd_adr32_dpm() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151109,7 +151110,7 @@ void m68000_mcu_device::or_w_dd_adr32_dpm() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -151135,7 +151136,7 @@ void m68000_mcu_device::or_w_dd_adr32_dpm() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -151162,7 +151163,7 @@ void m68000_mcu_device::or_w_dd_adr32_dpm() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151192,7 +151193,7 @@ void m68000_mcu_device::or_w_dd_adr32_dpm() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151230,7 +151231,7 @@ void m68000_mcu_device::or_l_dd_ais_dpm() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151258,7 +151259,7 @@ void m68000_mcu_device::or_l_dd_ais_dpm() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151284,7 +151285,7 @@ void m68000_mcu_device::or_l_dd_ais_dpm() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151312,7 +151313,7 @@ void m68000_mcu_device::or_l_dd_ais_dpm() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151340,7 +151341,7 @@ void m68000_mcu_device::or_l_dd_ais_dpm() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151378,7 +151379,7 @@ void m68000_mcu_device::or_l_dd_aips_dpm() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151406,11 +151407,11 @@ void m68000_mcu_device::or_l_dd_aips_dpm() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151436,7 +151437,7 @@ void m68000_mcu_device::or_l_dd_aips_dpm() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151464,7 +151465,7 @@ void m68000_mcu_device::or_l_dd_aips_dpm() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151492,7 +151493,7 @@ void m68000_mcu_device::or_l_dd_aips_dpm() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151529,14 +151530,14 @@ void m68000_mcu_device::or_l_dd_pais_dpm() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151563,7 +151564,7 @@ void m68000_mcu_device::or_l_dd_pais_dpm() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151589,7 +151590,7 @@ void m68000_mcu_device::or_l_dd_pais_dpm() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151617,7 +151618,7 @@ void m68000_mcu_device::or_l_dd_pais_dpm() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151645,7 +151646,7 @@ void m68000_mcu_device::or_l_dd_pais_dpm() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151683,7 +151684,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151708,7 +151709,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151736,7 +151737,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151762,7 +151763,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151790,7 +151791,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151818,7 +151819,7 @@ void m68000_mcu_device::or_l_dd_das_dpm() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -151854,14 +151855,14 @@ void m68000_mcu_device::or_l_dd_dais_dpm() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -151869,7 +151870,7 @@ void m68000_mcu_device::or_l_dd_dais_dpm() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151896,7 +151897,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -151924,7 +151925,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151952,7 +151953,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -151978,7 +151979,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152006,7 +152007,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152034,7 +152035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152074,7 +152075,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152100,7 +152101,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -152128,7 +152129,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152154,7 +152155,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152182,7 +152183,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152210,7 +152211,7 @@ void m68000_mcu_device::or_l_dd_adr16_dpm() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152248,7 +152249,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -152275,7 +152276,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -152301,7 +152302,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152329,7 +152330,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -152355,7 +152356,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152383,7 +152384,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152411,7 +152412,7 @@ void m68000_mcu_device::or_l_dd_adr32_dpm() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -152451,13 +152452,13 @@ void m68000_mcu_device::divs_w_ds_dd_dpm() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152471,7 +152472,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152481,7 +152482,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152496,7 +152497,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -152504,7 +152505,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -152532,7 +152533,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -152558,7 +152559,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -152690,7 +152691,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -152699,7 +152700,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -152707,12 +152708,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152720,7 +152721,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152737,7 +152738,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -152745,7 +152746,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152779,7 +152780,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152806,13 +152807,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152820,27 +152821,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152852,7 +152853,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152864,7 +152865,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152879,7 +152880,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152888,7 +152889,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152896,7 +152897,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152906,7 +152907,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152915,7 +152916,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152927,7 +152928,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152979,7 +152980,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -152995,7 +152996,7 @@ void m68000_mcu_device::divs_w_ais_dd_dpm() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -153024,13 +153025,13 @@ void m68000_mcu_device::divs_w_ais_dd_dpm() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153044,7 +153045,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153054,7 +153055,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153069,7 +153070,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153077,7 +153078,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153105,7 +153106,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153131,7 +153132,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153263,7 +153264,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153272,7 +153273,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153280,12 +153281,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153293,7 +153294,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153310,7 +153311,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153318,7 +153319,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153352,7 +153353,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153379,13 +153380,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153393,27 +153394,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153425,7 +153426,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153437,7 +153438,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153452,7 +153453,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153461,7 +153462,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153469,7 +153470,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153479,7 +153480,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153488,7 +153489,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153500,7 +153501,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153552,7 +153553,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -153574,7 +153575,7 @@ void m68000_mcu_device::divs_w_aips_dd_dpm() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153601,13 +153602,13 @@ void m68000_mcu_device::divs_w_aips_dd_dpm() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153621,7 +153622,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153631,7 +153632,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153646,7 +153647,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153654,7 +153655,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153682,7 +153683,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153708,7 +153709,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153840,7 +153841,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153849,7 +153850,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153857,12 +153858,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153870,7 +153871,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153887,7 +153888,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153895,7 +153896,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153929,7 +153930,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153956,13 +153957,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153970,27 +153971,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154002,7 +154003,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154014,7 +154015,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154029,7 +154030,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154038,7 +154039,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154046,7 +154047,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154056,7 +154057,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154065,7 +154066,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154077,7 +154078,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154129,7 +154130,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154153,7 +154154,7 @@ void m68000_mcu_device::divs_w_pais_dd_dpm() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154180,13 +154181,13 @@ void m68000_mcu_device::divs_w_pais_dd_dpm() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154200,7 +154201,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154210,7 +154211,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154225,7 +154226,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154233,7 +154234,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -154261,7 +154262,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154287,7 +154288,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154419,7 +154420,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -154428,7 +154429,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -154436,12 +154437,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154449,7 +154450,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154466,7 +154467,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -154474,7 +154475,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154508,7 +154509,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154535,13 +154536,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154549,27 +154550,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154581,7 +154582,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154593,7 +154594,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154608,7 +154609,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154617,7 +154618,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154625,7 +154626,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154635,7 +154636,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154644,7 +154645,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154656,7 +154657,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154708,7 +154709,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154749,7 +154750,7 @@ void m68000_mcu_device::divs_w_das_dd_dpm() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -154778,13 +154779,13 @@ void m68000_mcu_device::divs_w_das_dd_dpm() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154798,7 +154799,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154808,7 +154809,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154823,7 +154824,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154831,7 +154832,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154859,7 +154860,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154885,7 +154886,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155017,7 +155018,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155026,7 +155027,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155034,12 +155035,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155047,7 +155048,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155064,7 +155065,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155072,7 +155073,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155106,7 +155107,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155133,13 +155134,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155147,27 +155148,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155179,7 +155180,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155191,7 +155192,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155206,7 +155207,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155215,7 +155216,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155223,7 +155224,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155233,7 +155234,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155242,7 +155243,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155254,7 +155255,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155306,7 +155307,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155320,7 +155321,7 @@ void m68000_mcu_device::divs_w_dais_dd_dpm() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -155388,7 +155389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -155417,13 +155418,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155437,7 +155438,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155447,7 +155448,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155462,7 +155463,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -155470,7 +155471,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -155498,7 +155499,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -155524,7 +155525,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155656,7 +155657,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155665,7 +155666,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155673,12 +155674,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155686,7 +155687,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155703,7 +155704,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155711,7 +155712,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155745,7 +155746,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155772,13 +155773,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155786,27 +155787,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155818,7 +155819,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155830,7 +155831,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155845,7 +155846,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155854,7 +155855,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155862,7 +155863,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155872,7 +155873,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155881,7 +155882,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155893,7 +155894,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155945,7 +155946,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155987,7 +155988,7 @@ void m68000_mcu_device::divs_w_adr16_dd_dpm() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -156014,13 +156015,13 @@ void m68000_mcu_device::divs_w_adr16_dd_dpm() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156034,7 +156035,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156044,7 +156045,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156059,7 +156060,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156067,7 +156068,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -156095,7 +156096,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156121,7 +156122,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156253,7 +156254,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156262,7 +156263,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156270,12 +156271,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156283,7 +156284,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156300,7 +156301,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156308,7 +156309,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156342,7 +156343,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156369,13 +156370,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156383,27 +156384,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156415,7 +156416,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156427,7 +156428,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156442,7 +156443,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156451,7 +156452,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156459,7 +156460,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156469,7 +156470,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156478,7 +156479,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156490,7 +156491,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156542,7 +156543,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -156608,7 +156609,7 @@ void m68000_mcu_device::divs_w_adr32_dd_dpm() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156635,13 +156636,13 @@ void m68000_mcu_device::divs_w_adr32_dd_dpm() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156655,7 +156656,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156665,7 +156666,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156680,7 +156681,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156688,7 +156689,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156716,7 +156717,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156742,7 +156743,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -156874,7 +156875,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156883,7 +156884,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156891,12 +156892,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156904,7 +156905,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156921,7 +156922,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156929,7 +156930,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156963,7 +156964,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156990,13 +156991,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157004,27 +157005,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157036,7 +157037,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157048,7 +157049,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157063,7 +157064,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157072,7 +157073,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157080,7 +157081,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157090,7 +157091,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157099,7 +157100,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157111,7 +157112,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157163,7 +157164,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157203,7 +157204,7 @@ void m68000_mcu_device::divs_w_dpc_dd_dpm() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157232,13 +157233,13 @@ void m68000_mcu_device::divs_w_dpc_dd_dpm() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157252,7 +157253,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157262,7 +157263,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157277,7 +157278,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157285,7 +157286,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157313,7 +157314,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157339,7 +157340,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -157471,7 +157472,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -157480,7 +157481,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -157488,12 +157489,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157501,7 +157502,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157518,7 +157519,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -157526,7 +157527,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157560,7 +157561,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157587,13 +157588,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157601,27 +157602,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157633,7 +157634,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157645,7 +157646,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157660,7 +157661,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157669,7 +157670,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157677,7 +157678,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157687,7 +157688,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157696,7 +157697,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157708,7 +157709,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157760,7 +157761,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157773,7 +157774,7 @@ void m68000_mcu_device::divs_w_dpci_dd_dpm() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -157841,7 +157842,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157870,13 +157871,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157890,7 +157891,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157900,7 +157901,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157915,7 +157916,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157923,7 +157924,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157951,7 +157952,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157977,7 +157978,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -158109,7 +158110,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158118,7 +158119,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158126,12 +158127,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158139,7 +158140,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158156,7 +158157,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158164,7 +158165,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158198,7 +158199,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158225,13 +158226,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158239,27 +158240,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158271,7 +158272,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158283,7 +158284,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158298,7 +158299,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158307,7 +158308,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158315,7 +158316,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158325,7 +158326,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158334,7 +158335,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158346,7 +158347,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158398,7 +158399,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158442,13 +158443,13 @@ void m68000_mcu_device::divs_w_imm16_dd_dpm() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158462,7 +158463,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158472,7 +158473,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158487,7 +158488,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -158495,7 +158496,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -158523,7 +158524,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -158549,7 +158550,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -158681,7 +158682,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158690,7 +158691,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158698,12 +158699,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158711,7 +158712,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158728,7 +158729,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158736,7 +158737,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158770,7 +158771,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158797,13 +158798,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158811,27 +158812,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158843,7 +158844,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158855,7 +158856,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158870,7 +158871,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158879,7 +158880,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158887,7 +158888,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158897,7 +158898,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158906,7 +158907,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158918,7 +158919,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158970,7 +158971,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158988,7 +158989,7 @@ void m68000_mcu_device::sub_b_ds_dd_dpm() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159035,7 +159036,7 @@ void m68000_mcu_device::sub_b_ais_dd_dpm() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159060,7 +159061,7 @@ void m68000_mcu_device::sub_b_ais_dd_dpm() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159113,7 +159114,7 @@ void m68000_mcu_device::sub_b_aips_dd_dpm() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159136,7 +159137,7 @@ void m68000_mcu_device::sub_b_aips_dd_dpm() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159191,7 +159192,7 @@ void m68000_mcu_device::sub_b_pais_dd_dpm() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159214,7 +159215,7 @@ void m68000_mcu_device::sub_b_pais_dd_dpm() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159286,7 +159287,7 @@ void m68000_mcu_device::sub_b_das_dd_dpm() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159311,7 +159312,7 @@ void m68000_mcu_device::sub_b_das_dd_dpm() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159356,7 +159357,7 @@ void m68000_mcu_device::sub_b_dais_dd_dpm() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159424,7 +159425,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159449,7 +159450,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159522,7 +159523,7 @@ void m68000_mcu_device::sub_b_adr16_dd_dpm() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -159545,7 +159546,7 @@ void m68000_mcu_device::sub_b_adr16_dd_dpm() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159642,7 +159643,7 @@ void m68000_mcu_device::sub_b_adr32_dd_dpm() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159665,7 +159666,7 @@ void m68000_mcu_device::sub_b_adr32_dd_dpm() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159736,7 +159737,7 @@ void m68000_mcu_device::sub_b_dpc_dd_dpm() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159761,7 +159762,7 @@ void m68000_mcu_device::sub_b_dpc_dd_dpm() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159805,7 +159806,7 @@ void m68000_mcu_device::sub_b_dpci_dd_dpm() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159873,7 +159874,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159898,7 +159899,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159973,7 +159974,7 @@ void m68000_mcu_device::sub_b_imm8_dd_dpm() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160022,7 +160023,7 @@ void m68000_mcu_device::sub_w_ds_dd_dpm() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160071,7 +160072,7 @@ void m68000_mcu_device::sub_w_as_dd_dpm() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160118,7 +160119,7 @@ void m68000_mcu_device::sub_w_ais_dd_dpm() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160147,7 +160148,7 @@ void m68000_mcu_device::sub_w_ais_dd_dpm() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160200,7 +160201,7 @@ void m68000_mcu_device::sub_w_aips_dd_dpm() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160227,7 +160228,7 @@ void m68000_mcu_device::sub_w_aips_dd_dpm() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160282,7 +160283,7 @@ void m68000_mcu_device::sub_w_pais_dd_dpm() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160309,7 +160310,7 @@ void m68000_mcu_device::sub_w_pais_dd_dpm() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160381,7 +160382,7 @@ void m68000_mcu_device::sub_w_das_dd_dpm() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160410,7 +160411,7 @@ void m68000_mcu_device::sub_w_das_dd_dpm() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160455,7 +160456,7 @@ void m68000_mcu_device::sub_w_dais_dd_dpm() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160523,7 +160524,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160552,7 +160553,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160625,7 +160626,7 @@ void m68000_mcu_device::sub_w_adr16_dd_dpm() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -160652,7 +160653,7 @@ void m68000_mcu_device::sub_w_adr16_dd_dpm() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160749,7 +160750,7 @@ void m68000_mcu_device::sub_w_adr32_dd_dpm() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -160776,7 +160777,7 @@ void m68000_mcu_device::sub_w_adr32_dd_dpm() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160847,7 +160848,7 @@ void m68000_mcu_device::sub_w_dpc_dd_dpm() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160876,7 +160877,7 @@ void m68000_mcu_device::sub_w_dpc_dd_dpm() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160920,7 +160921,7 @@ void m68000_mcu_device::sub_w_dpci_dd_dpm() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160988,7 +160989,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161017,7 +161018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161092,7 +161093,7 @@ void m68000_mcu_device::sub_w_imm16_dd_dpm() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161141,7 +161142,7 @@ void m68000_mcu_device::sub_l_ds_dd_dpm() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161168,7 +161169,7 @@ void m68000_mcu_device::sub_l_ds_dd_dpm() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161198,7 +161199,7 @@ void m68000_mcu_device::sub_l_as_dd_dpm() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161225,7 +161226,7 @@ void m68000_mcu_device::sub_l_as_dd_dpm() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161253,7 +161254,7 @@ void m68000_mcu_device::sub_l_ais_dd_dpm() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161306,12 +161307,12 @@ void m68000_mcu_device::sub_l_ais_dd_dpm() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161359,7 +161360,7 @@ void m68000_mcu_device::sub_l_aips_dd_dpm() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161415,12 +161416,12 @@ void m68000_mcu_device::sub_l_aips_dd_dpm() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161467,7 +161468,7 @@ void m68000_mcu_device::sub_l_pais_dd_dpm() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -161525,12 +161526,12 @@ void m68000_mcu_device::sub_l_pais_dd_dpm() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161602,7 +161603,7 @@ void m68000_mcu_device::sub_l_das_dd_dpm() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161655,12 +161656,12 @@ void m68000_mcu_device::sub_l_das_dd_dpm() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161706,7 +161707,7 @@ void m68000_mcu_device::sub_l_dais_dd_dpm() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -161773,7 +161774,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161826,12 +161827,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161905,7 +161906,7 @@ void m68000_mcu_device::sub_l_adr16_dd_dpm() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161958,12 +161959,12 @@ void m68000_mcu_device::sub_l_adr16_dd_dpm() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162061,7 +162062,7 @@ void m68000_mcu_device::sub_l_adr32_dd_dpm() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162114,12 +162115,12 @@ void m68000_mcu_device::sub_l_adr32_dd_dpm() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162190,7 +162191,7 @@ void m68000_mcu_device::sub_l_dpc_dd_dpm() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162243,12 +162244,12 @@ void m68000_mcu_device::sub_l_dpc_dd_dpm() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162293,7 +162294,7 @@ void m68000_mcu_device::sub_l_dpci_dd_dpm() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -162360,7 +162361,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162413,12 +162414,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162518,7 +162519,7 @@ void m68000_mcu_device::sub_l_imm32_dd_dpm() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -162545,7 +162546,7 @@ void m68000_mcu_device::sub_l_imm32_dd_dpm() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -162575,7 +162576,7 @@ void m68000_mcu_device::suba_w_ds_ad_dpm() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162601,7 +162602,7 @@ void m68000_mcu_device::suba_w_ds_ad_dpm() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162630,7 +162631,7 @@ void m68000_mcu_device::suba_w_as_ad_dpm() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162656,7 +162657,7 @@ void m68000_mcu_device::suba_w_as_ad_dpm() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162683,7 +162684,7 @@ void m68000_mcu_device::suba_w_ais_ad_dpm() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162712,7 +162713,7 @@ void m68000_mcu_device::suba_w_ais_ad_dpm() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162738,7 +162739,7 @@ void m68000_mcu_device::suba_w_ais_ad_dpm() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162771,7 +162772,7 @@ void m68000_mcu_device::suba_w_aips_ad_dpm() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162798,7 +162799,7 @@ void m68000_mcu_device::suba_w_aips_ad_dpm() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162824,7 +162825,7 @@ void m68000_mcu_device::suba_w_aips_ad_dpm() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162859,7 +162860,7 @@ void m68000_mcu_device::suba_w_pais_ad_dpm() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162886,7 +162887,7 @@ void m68000_mcu_device::suba_w_pais_ad_dpm() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162912,7 +162913,7 @@ void m68000_mcu_device::suba_w_pais_ad_dpm() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162964,7 +162965,7 @@ void m68000_mcu_device::suba_w_das_ad_dpm() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162993,7 +162994,7 @@ void m68000_mcu_device::suba_w_das_ad_dpm() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163019,7 +163020,7 @@ void m68000_mcu_device::suba_w_das_ad_dpm() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163044,7 +163045,7 @@ void m68000_mcu_device::suba_w_dais_ad_dpm() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163112,7 +163113,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163141,7 +163142,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163167,7 +163168,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163220,7 +163221,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dpm() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -163247,7 +163248,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dpm() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163273,7 +163274,7 @@ void m68000_mcu_device::suba_w_adr16_ad_dpm() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163350,7 +163351,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dpm() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -163377,7 +163378,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dpm() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163403,7 +163404,7 @@ void m68000_mcu_device::suba_w_adr32_ad_dpm() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163454,7 +163455,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dpm() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163483,7 +163484,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dpm() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163509,7 +163510,7 @@ void m68000_mcu_device::suba_w_dpc_ad_dpm() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163533,7 +163534,7 @@ void m68000_mcu_device::suba_w_dpci_ad_dpm() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163601,7 +163602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163630,7 +163631,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163656,7 +163657,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163711,7 +163712,7 @@ void m68000_mcu_device::suba_w_imm16_ad_dpm() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163737,7 +163738,7 @@ void m68000_mcu_device::suba_w_imm16_ad_dpm() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163766,7 +163767,7 @@ void m68000_mcu_device::subx_b_ds_dd_dpm() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -163819,7 +163820,7 @@ void m68000_mcu_device::subx_b_pais_paid_dpm() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -163864,7 +163865,7 @@ void m68000_mcu_device::subx_b_pais_paid_dpm() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163925,7 +163926,7 @@ void m68000_mcu_device::sub_b_dd_ais_dpm() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -163950,7 +163951,7 @@ void m68000_mcu_device::sub_b_dd_ais_dpm() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164017,7 +164018,7 @@ void m68000_mcu_device::sub_b_dd_aips_dpm() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164040,7 +164041,7 @@ void m68000_mcu_device::sub_b_dd_aips_dpm() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164109,7 +164110,7 @@ void m68000_mcu_device::sub_b_dd_pais_dpm() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164132,7 +164133,7 @@ void m68000_mcu_device::sub_b_dd_pais_dpm() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164218,7 +164219,7 @@ void m68000_mcu_device::sub_b_dd_das_dpm() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164243,7 +164244,7 @@ void m68000_mcu_device::sub_b_dd_das_dpm() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164302,7 +164303,7 @@ void m68000_mcu_device::sub_b_dd_dais_dpm() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -164370,7 +164371,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164395,7 +164396,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164482,7 +164483,7 @@ void m68000_mcu_device::sub_b_dd_adr16_dpm() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -164505,7 +164506,7 @@ void m68000_mcu_device::sub_b_dd_adr16_dpm() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164616,7 +164617,7 @@ void m68000_mcu_device::sub_b_dd_adr32_dpm() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164639,7 +164640,7 @@ void m68000_mcu_device::sub_b_dd_adr32_dpm() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164702,7 +164703,7 @@ void m68000_mcu_device::subx_w_ds_dd_dpm() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -164755,7 +164756,7 @@ void m68000_mcu_device::subx_w_pais_paid_dpm() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -164808,7 +164809,7 @@ void m68000_mcu_device::subx_w_pais_paid_dpm() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164875,7 +164876,7 @@ void m68000_mcu_device::sub_w_dd_ais_dpm() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164904,7 +164905,7 @@ void m68000_mcu_device::sub_w_dd_ais_dpm() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164977,7 +164978,7 @@ void m68000_mcu_device::sub_w_dd_aips_dpm() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165004,7 +165005,7 @@ void m68000_mcu_device::sub_w_dd_aips_dpm() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165079,7 +165080,7 @@ void m68000_mcu_device::sub_w_dd_pais_dpm() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165106,7 +165107,7 @@ void m68000_mcu_device::sub_w_dd_pais_dpm() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165198,7 +165199,7 @@ void m68000_mcu_device::sub_w_dd_das_dpm() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165227,7 +165228,7 @@ void m68000_mcu_device::sub_w_dd_das_dpm() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165292,7 +165293,7 @@ void m68000_mcu_device::sub_w_dd_dais_dpm() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165360,7 +165361,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165389,7 +165390,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165482,7 +165483,7 @@ void m68000_mcu_device::sub_w_dd_adr16_dpm() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -165509,7 +165510,7 @@ void m68000_mcu_device::sub_w_dd_adr16_dpm() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165626,7 +165627,7 @@ void m68000_mcu_device::sub_w_dd_adr32_dpm() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -165653,7 +165654,7 @@ void m68000_mcu_device::sub_w_dd_adr32_dpm() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165722,7 +165723,7 @@ void m68000_mcu_device::subx_l_ds_dd_dpm() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -165749,7 +165750,7 @@ void m68000_mcu_device::subx_l_ds_dd_dpm() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -165807,7 +165808,7 @@ void m68000_mcu_device::subx_l_pais_paid_dpm() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -165860,7 +165861,7 @@ void m68000_mcu_device::subx_l_pais_paid_dpm() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -165910,7 +165911,7 @@ void m68000_mcu_device::subx_l_pais_paid_dpm() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165977,7 +165978,7 @@ void m68000_mcu_device::sub_l_dd_ais_dpm() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166030,7 +166031,7 @@ void m68000_mcu_device::sub_l_dd_ais_dpm() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166058,7 +166059,7 @@ void m68000_mcu_device::sub_l_dd_ais_dpm() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166123,7 +166124,7 @@ void m68000_mcu_device::sub_l_dd_aips_dpm() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166179,7 +166180,7 @@ void m68000_mcu_device::sub_l_dd_aips_dpm() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166207,7 +166208,7 @@ void m68000_mcu_device::sub_l_dd_aips_dpm() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166271,7 +166272,7 @@ void m68000_mcu_device::sub_l_dd_pais_dpm() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -166329,7 +166330,7 @@ void m68000_mcu_device::sub_l_dd_pais_dpm() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166357,7 +166358,7 @@ void m68000_mcu_device::sub_l_dd_pais_dpm() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166446,7 +166447,7 @@ void m68000_mcu_device::sub_l_dd_das_dpm() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166499,7 +166500,7 @@ void m68000_mcu_device::sub_l_dd_das_dpm() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166527,7 +166528,7 @@ void m68000_mcu_device::sub_l_dd_das_dpm() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166590,7 +166591,7 @@ void m68000_mcu_device::sub_l_dd_dais_dpm() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -166657,7 +166658,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166710,7 +166711,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166738,7 +166739,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166829,7 +166830,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dpm() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166882,7 +166883,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dpm() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166910,7 +166911,7 @@ void m68000_mcu_device::sub_l_dd_adr16_dpm() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167025,7 +167026,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dpm() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167078,7 +167079,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dpm() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167106,7 +167107,7 @@ void m68000_mcu_device::sub_l_dd_adr32_dpm() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167173,7 +167174,7 @@ void m68000_mcu_device::suba_l_ds_ad_dpm() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167199,7 +167200,7 @@ void m68000_mcu_device::suba_l_ds_ad_dpm() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167228,7 +167229,7 @@ void m68000_mcu_device::suba_l_as_ad_dpm() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167254,7 +167255,7 @@ void m68000_mcu_device::suba_l_as_ad_dpm() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167281,7 +167282,7 @@ void m68000_mcu_device::suba_l_ais_ad_dpm() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167334,11 +167335,11 @@ void m68000_mcu_device::suba_l_ais_ad_dpm() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167385,7 +167386,7 @@ void m68000_mcu_device::suba_l_aips_ad_dpm() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167441,11 +167442,11 @@ void m68000_mcu_device::suba_l_aips_ad_dpm() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167491,7 +167492,7 @@ void m68000_mcu_device::suba_l_pais_ad_dpm() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -167549,11 +167550,11 @@ void m68000_mcu_device::suba_l_pais_ad_dpm() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167624,7 +167625,7 @@ void m68000_mcu_device::suba_l_das_ad_dpm() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167677,11 +167678,11 @@ void m68000_mcu_device::suba_l_das_ad_dpm() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167726,7 +167727,7 @@ void m68000_mcu_device::suba_l_dais_ad_dpm() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -167793,7 +167794,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167846,11 +167847,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167923,7 +167924,7 @@ void m68000_mcu_device::suba_l_adr16_ad_dpm() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167976,11 +167977,11 @@ void m68000_mcu_device::suba_l_adr16_ad_dpm() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168077,7 +168078,7 @@ void m68000_mcu_device::suba_l_adr32_ad_dpm() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -168130,11 +168131,11 @@ void m68000_mcu_device::suba_l_adr32_ad_dpm() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168204,7 +168205,7 @@ void m68000_mcu_device::suba_l_dpc_ad_dpm() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168257,11 +168258,11 @@ void m68000_mcu_device::suba_l_dpc_ad_dpm() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168305,7 +168306,7 @@ void m68000_mcu_device::suba_l_dpci_ad_dpm() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168372,7 +168373,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168425,11 +168426,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168528,7 +168529,7 @@ void m68000_mcu_device::suba_l_imm32_ad_dpm() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -168554,7 +168555,7 @@ void m68000_mcu_device::suba_l_imm32_ad_dpm() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -168583,7 +168584,7 @@ void m68000_mcu_device::cmp_b_ds_dd_dpm() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168629,7 +168630,7 @@ void m68000_mcu_device::cmp_b_ais_dd_dpm() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168654,7 +168655,7 @@ void m68000_mcu_device::cmp_b_ais_dd_dpm() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168706,7 +168707,7 @@ void m68000_mcu_device::cmp_b_aips_dd_dpm() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168729,7 +168730,7 @@ void m68000_mcu_device::cmp_b_aips_dd_dpm() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168783,7 +168784,7 @@ void m68000_mcu_device::cmp_b_pais_dd_dpm() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168806,7 +168807,7 @@ void m68000_mcu_device::cmp_b_pais_dd_dpm() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168877,7 +168878,7 @@ void m68000_mcu_device::cmp_b_das_dd_dpm() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168902,7 +168903,7 @@ void m68000_mcu_device::cmp_b_das_dd_dpm() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168946,7 +168947,7 @@ void m68000_mcu_device::cmp_b_dais_dd_dpm() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169014,7 +169015,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169039,7 +169040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169111,7 +169112,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_dpm() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -169134,7 +169135,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_dpm() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169230,7 +169231,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_dpm() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169253,7 +169254,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_dpm() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169323,7 +169324,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_dpm() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169348,7 +169349,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_dpm() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169391,7 +169392,7 @@ void m68000_mcu_device::cmp_b_dpci_dd_dpm() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169459,7 +169460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169484,7 +169485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169558,7 +169559,7 @@ void m68000_mcu_device::cmp_b_imm8_dd_dpm() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169606,7 +169607,7 @@ void m68000_mcu_device::cmp_w_ds_dd_dpm() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169654,7 +169655,7 @@ void m68000_mcu_device::cmp_w_as_dd_dpm() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169700,7 +169701,7 @@ void m68000_mcu_device::cmp_w_ais_dd_dpm() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169729,7 +169730,7 @@ void m68000_mcu_device::cmp_w_ais_dd_dpm() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169781,7 +169782,7 @@ void m68000_mcu_device::cmp_w_aips_dd_dpm() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169808,7 +169809,7 @@ void m68000_mcu_device::cmp_w_aips_dd_dpm() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169862,7 +169863,7 @@ void m68000_mcu_device::cmp_w_pais_dd_dpm() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169889,7 +169890,7 @@ void m68000_mcu_device::cmp_w_pais_dd_dpm() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169960,7 +169961,7 @@ void m68000_mcu_device::cmp_w_das_dd_dpm() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169989,7 +169990,7 @@ void m68000_mcu_device::cmp_w_das_dd_dpm() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170033,7 +170034,7 @@ void m68000_mcu_device::cmp_w_dais_dd_dpm() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170101,7 +170102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170130,7 +170131,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170202,7 +170203,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_dpm() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -170229,7 +170230,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_dpm() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170325,7 +170326,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_dpm() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -170352,7 +170353,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_dpm() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170422,7 +170423,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_dpm() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170451,7 +170452,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_dpm() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170494,7 +170495,7 @@ void m68000_mcu_device::cmp_w_dpci_dd_dpm() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170562,7 +170563,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170591,7 +170592,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170665,7 +170666,7 @@ void m68000_mcu_device::cmp_w_imm16_dd_dpm() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170713,11 +170714,11 @@ void m68000_mcu_device::cmp_l_ds_dd_dpm() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170766,11 +170767,11 @@ void m68000_mcu_device::cmp_l_as_dd_dpm() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170817,7 +170818,7 @@ void m68000_mcu_device::cmp_l_ais_dd_dpm() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170870,11 +170871,11 @@ void m68000_mcu_device::cmp_l_ais_dd_dpm() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170921,7 +170922,7 @@ void m68000_mcu_device::cmp_l_aips_dd_dpm() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170977,11 +170978,11 @@ void m68000_mcu_device::cmp_l_aips_dd_dpm() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171027,7 +171028,7 @@ void m68000_mcu_device::cmp_l_pais_dd_dpm() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -171085,11 +171086,11 @@ void m68000_mcu_device::cmp_l_pais_dd_dpm() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171160,7 +171161,7 @@ void m68000_mcu_device::cmp_l_das_dd_dpm() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171213,11 +171214,11 @@ void m68000_mcu_device::cmp_l_das_dd_dpm() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171262,7 +171263,7 @@ void m68000_mcu_device::cmp_l_dais_dd_dpm() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171329,7 +171330,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171382,11 +171383,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171459,7 +171460,7 @@ void m68000_mcu_device::cmp_l_adr16_dd_dpm() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171512,11 +171513,11 @@ void m68000_mcu_device::cmp_l_adr16_dd_dpm() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171613,7 +171614,7 @@ void m68000_mcu_device::cmp_l_adr32_dd_dpm() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171666,11 +171667,11 @@ void m68000_mcu_device::cmp_l_adr32_dd_dpm() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171740,7 +171741,7 @@ void m68000_mcu_device::cmp_l_dpc_dd_dpm() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171793,11 +171794,11 @@ void m68000_mcu_device::cmp_l_dpc_dd_dpm() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171841,7 +171842,7 @@ void m68000_mcu_device::cmp_l_dpci_dd_dpm() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171908,7 +171909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171961,11 +171962,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172064,11 +172065,11 @@ void m68000_mcu_device::cmp_l_imm32_dd_dpm() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172117,11 +172118,11 @@ void m68000_mcu_device::cmpa_w_ds_ad_dpm() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172170,11 +172171,11 @@ void m68000_mcu_device::cmpa_w_as_ad_dpm() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172221,7 +172222,7 @@ void m68000_mcu_device::cmpa_w_ais_ad_dpm() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172250,11 +172251,11 @@ void m68000_mcu_device::cmpa_w_ais_ad_dpm() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172307,7 +172308,7 @@ void m68000_mcu_device::cmpa_w_aips_ad_dpm() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172334,11 +172335,11 @@ void m68000_mcu_device::cmpa_w_aips_ad_dpm() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172393,7 +172394,7 @@ void m68000_mcu_device::cmpa_w_pais_ad_dpm() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172420,11 +172421,11 @@ void m68000_mcu_device::cmpa_w_pais_ad_dpm() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172496,7 +172497,7 @@ void m68000_mcu_device::cmpa_w_das_ad_dpm() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172525,11 +172526,11 @@ void m68000_mcu_device::cmpa_w_das_ad_dpm() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172574,7 +172575,7 @@ void m68000_mcu_device::cmpa_w_dais_ad_dpm() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -172642,7 +172643,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172671,11 +172672,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172748,7 +172749,7 @@ void m68000_mcu_device::cmpa_w_adr16_ad_dpm() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -172775,11 +172776,11 @@ void m68000_mcu_device::cmpa_w_adr16_ad_dpm() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172876,7 +172877,7 @@ void m68000_mcu_device::cmpa_w_adr32_ad_dpm() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172903,11 +172904,11 @@ void m68000_mcu_device::cmpa_w_adr32_ad_dpm() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172978,7 +172979,7 @@ void m68000_mcu_device::cmpa_w_dpc_ad_dpm() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173007,11 +173008,11 @@ void m68000_mcu_device::cmpa_w_dpc_ad_dpm() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173055,7 +173056,7 @@ void m68000_mcu_device::cmpa_w_dpci_ad_dpm() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -173123,7 +173124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173152,11 +173153,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173231,11 +173232,11 @@ void m68000_mcu_device::cmpa_w_imm16_ad_dpm() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173283,7 +173284,7 @@ void m68000_mcu_device::eor_b_dd_ds_dpm() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -173291,7 +173292,7 @@ void m68000_mcu_device::eor_b_dd_ds_dpm() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173356,7 +173357,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_dpm() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -173380,7 +173381,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_dpm() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173422,11 +173423,11 @@ void m68000_mcu_device::eor_b_dd_ais_dpm() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173448,7 +173449,7 @@ void m68000_mcu_device::eor_b_dd_ais_dpm() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173478,7 +173479,7 @@ void m68000_mcu_device::eor_b_dd_ais_dpm() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173513,12 +173514,12 @@ void m68000_mcu_device::eor_b_dd_aips_dpm() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173541,7 +173542,7 @@ void m68000_mcu_device::eor_b_dd_aips_dpm() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173571,7 +173572,7 @@ void m68000_mcu_device::eor_b_dd_aips_dpm() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173605,7 +173606,7 @@ void m68000_mcu_device::eor_b_dd_pais_dpm() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173613,7 +173614,7 @@ void m68000_mcu_device::eor_b_dd_pais_dpm() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173636,7 +173637,7 @@ void m68000_mcu_device::eor_b_dd_pais_dpm() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173666,7 +173667,7 @@ void m68000_mcu_device::eor_b_dd_pais_dpm() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173698,7 +173699,7 @@ void m68000_mcu_device::eor_b_dd_das_dpm() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173724,11 +173725,11 @@ void m68000_mcu_device::eor_b_dd_das_dpm() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173750,7 +173751,7 @@ void m68000_mcu_device::eor_b_dd_das_dpm() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68000_mcu_device::eor_b_dd_das_dpm() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173810,14 +173811,14 @@ void m68000_mcu_device::eor_b_dd_dais_dpm() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -173825,7 +173826,7 @@ void m68000_mcu_device::eor_b_dd_dais_dpm() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173852,7 +173853,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -173881,11 +173882,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173907,7 +173908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173937,7 +173938,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173971,7 +173972,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dpm() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173997,7 +173998,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dpm() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174020,7 +174021,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dpm() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174050,7 +174051,7 @@ void m68000_mcu_device::eor_b_dd_adr16_dpm() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174082,7 +174083,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dpm() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174109,7 +174110,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dpm() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -174135,7 +174136,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dpm() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174158,7 +174159,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dpm() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174188,7 +174189,7 @@ void m68000_mcu_device::eor_b_dd_adr32_dpm() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174221,7 +174222,7 @@ void m68000_mcu_device::eor_w_dd_ds_dpm() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -174229,7 +174230,7 @@ void m68000_mcu_device::eor_w_dd_ds_dpm() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174298,7 +174299,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_dpm() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174326,7 +174327,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_dpm() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174368,11 +174369,11 @@ void m68000_mcu_device::eor_w_dd_ais_dpm() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174398,7 +174399,7 @@ void m68000_mcu_device::eor_w_dd_ais_dpm() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174428,7 +174429,7 @@ void m68000_mcu_device::eor_w_dd_ais_dpm() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174469,12 +174470,12 @@ void m68000_mcu_device::eor_w_dd_aips_dpm() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174501,7 +174502,7 @@ void m68000_mcu_device::eor_w_dd_aips_dpm() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174531,7 +174532,7 @@ void m68000_mcu_device::eor_w_dd_aips_dpm() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174571,7 +174572,7 @@ void m68000_mcu_device::eor_w_dd_pais_dpm() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -174579,7 +174580,7 @@ void m68000_mcu_device::eor_w_dd_pais_dpm() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174606,7 +174607,7 @@ void m68000_mcu_device::eor_w_dd_pais_dpm() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174636,7 +174637,7 @@ void m68000_mcu_device::eor_w_dd_pais_dpm() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174674,7 +174675,7 @@ void m68000_mcu_device::eor_w_dd_das_dpm() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174700,11 +174701,11 @@ void m68000_mcu_device::eor_w_dd_das_dpm() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174730,7 +174731,7 @@ void m68000_mcu_device::eor_w_dd_das_dpm() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174760,7 +174761,7 @@ void m68000_mcu_device::eor_w_dd_das_dpm() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174796,14 +174797,14 @@ void m68000_mcu_device::eor_w_dd_dais_dpm() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174811,7 +174812,7 @@ void m68000_mcu_device::eor_w_dd_dais_dpm() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174838,7 +174839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -174867,11 +174868,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -174897,7 +174898,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174927,7 +174928,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -174967,7 +174968,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dpm() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174993,7 +174994,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dpm() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175020,7 +175021,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dpm() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175050,7 +175051,7 @@ void m68000_mcu_device::eor_w_dd_adr16_dpm() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175088,7 +175089,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dpm() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175115,7 +175116,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dpm() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -175141,7 +175142,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dpm() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175168,7 +175169,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dpm() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175198,7 +175199,7 @@ void m68000_mcu_device::eor_w_dd_adr32_dpm() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175237,12 +175238,12 @@ void m68000_mcu_device::eor_l_dd_ds_dpm() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175265,7 +175266,7 @@ void m68000_mcu_device::eor_l_dd_ds_dpm() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -175274,7 +175275,7 @@ void m68000_mcu_device::eor_l_dd_ds_dpm() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -175347,7 +175348,7 @@ void m68000_mcu_device::cmpm_l_aips_aipd_dpm() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175397,13 +175398,13 @@ void m68000_mcu_device::cmpm_l_aips_aipd_dpm() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175445,7 +175446,7 @@ void m68000_mcu_device::eor_l_dd_ais_dpm() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175473,7 +175474,7 @@ void m68000_mcu_device::eor_l_dd_ais_dpm() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175499,7 +175500,7 @@ void m68000_mcu_device::eor_l_dd_ais_dpm() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175527,7 +175528,7 @@ void m68000_mcu_device::eor_l_dd_ais_dpm() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175555,7 +175556,7 @@ void m68000_mcu_device::eor_l_dd_ais_dpm() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175593,7 +175594,7 @@ void m68000_mcu_device::eor_l_dd_aips_dpm() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175621,11 +175622,11 @@ void m68000_mcu_device::eor_l_dd_aips_dpm() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175651,7 +175652,7 @@ void m68000_mcu_device::eor_l_dd_aips_dpm() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175679,7 +175680,7 @@ void m68000_mcu_device::eor_l_dd_aips_dpm() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175707,7 +175708,7 @@ void m68000_mcu_device::eor_l_dd_aips_dpm() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175744,14 +175745,14 @@ void m68000_mcu_device::eor_l_dd_pais_dpm() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175778,7 +175779,7 @@ void m68000_mcu_device::eor_l_dd_pais_dpm() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175804,7 +175805,7 @@ void m68000_mcu_device::eor_l_dd_pais_dpm() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175832,7 +175833,7 @@ void m68000_mcu_device::eor_l_dd_pais_dpm() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175860,7 +175861,7 @@ void m68000_mcu_device::eor_l_dd_pais_dpm() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -175898,7 +175899,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -175923,7 +175924,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175951,7 +175952,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -175977,7 +175978,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176005,7 +176006,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176033,7 +176034,7 @@ void m68000_mcu_device::eor_l_dd_das_dpm() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176069,14 +176070,14 @@ void m68000_mcu_device::eor_l_dd_dais_dpm() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -176084,7 +176085,7 @@ void m68000_mcu_device::eor_l_dd_dais_dpm() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176111,7 +176112,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176139,7 +176140,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176167,7 +176168,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176193,7 +176194,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176221,7 +176222,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176249,7 +176250,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176289,7 +176290,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176315,7 +176316,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176343,7 +176344,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176369,7 +176370,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176397,7 +176398,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176425,7 +176426,7 @@ void m68000_mcu_device::eor_l_dd_adr16_dpm() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176463,7 +176464,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -176490,7 +176491,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -176516,7 +176517,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176544,7 +176545,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -176570,7 +176571,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176598,7 +176599,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176626,7 +176627,7 @@ void m68000_mcu_device::eor_l_dd_adr32_dpm() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -176666,11 +176667,11 @@ void m68000_mcu_device::cmpa_l_ds_ad_dpm() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176719,11 +176720,11 @@ void m68000_mcu_device::cmpa_l_as_ad_dpm() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176770,7 +176771,7 @@ void m68000_mcu_device::cmpa_l_ais_ad_dpm() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176823,11 +176824,11 @@ void m68000_mcu_device::cmpa_l_ais_ad_dpm() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176874,7 +176875,7 @@ void m68000_mcu_device::cmpa_l_aips_ad_dpm() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176930,11 +176931,11 @@ void m68000_mcu_device::cmpa_l_aips_ad_dpm() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176980,7 +176981,7 @@ void m68000_mcu_device::cmpa_l_pais_ad_dpm() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -177038,11 +177039,11 @@ void m68000_mcu_device::cmpa_l_pais_ad_dpm() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177113,7 +177114,7 @@ void m68000_mcu_device::cmpa_l_das_ad_dpm() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177166,11 +177167,11 @@ void m68000_mcu_device::cmpa_l_das_ad_dpm() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177215,7 +177216,7 @@ void m68000_mcu_device::cmpa_l_dais_ad_dpm() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177282,7 +177283,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177335,11 +177336,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177412,7 +177413,7 @@ void m68000_mcu_device::cmpa_l_adr16_ad_dpm() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177465,11 +177466,11 @@ void m68000_mcu_device::cmpa_l_adr16_ad_dpm() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177566,7 +177567,7 @@ void m68000_mcu_device::cmpa_l_adr32_ad_dpm() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177619,11 +177620,11 @@ void m68000_mcu_device::cmpa_l_adr32_ad_dpm() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177693,7 +177694,7 @@ void m68000_mcu_device::cmpa_l_dpc_ad_dpm() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177746,11 +177747,11 @@ void m68000_mcu_device::cmpa_l_dpc_ad_dpm() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177794,7 +177795,7 @@ void m68000_mcu_device::cmpa_l_dpci_ad_dpm() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177861,7 +177862,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177914,11 +177915,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178017,11 +178018,11 @@ void m68000_mcu_device::cmpa_l_imm32_ad_dpm() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178070,7 +178071,7 @@ void m68000_mcu_device::and_b_ds_dd_dpm() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178078,7 +178079,7 @@ void m68000_mcu_device::and_b_ds_dd_dpm() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178118,11 +178119,11 @@ void m68000_mcu_device::and_b_ais_dd_dpm() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178144,7 +178145,7 @@ void m68000_mcu_device::and_b_ais_dd_dpm() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178152,7 +178153,7 @@ void m68000_mcu_device::and_b_ais_dd_dpm() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178195,12 +178196,12 @@ void m68000_mcu_device::and_b_aips_dd_dpm() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178223,7 +178224,7 @@ void m68000_mcu_device::and_b_aips_dd_dpm() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178231,7 +178232,7 @@ void m68000_mcu_device::and_b_aips_dd_dpm() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178273,7 +178274,7 @@ void m68000_mcu_device::and_b_pais_dd_dpm() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178281,7 +178282,7 @@ void m68000_mcu_device::and_b_pais_dd_dpm() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178304,7 +178305,7 @@ void m68000_mcu_device::and_b_pais_dd_dpm() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178312,7 +178313,7 @@ void m68000_mcu_device::and_b_pais_dd_dpm() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178352,7 +178353,7 @@ void m68000_mcu_device::and_b_das_dd_dpm() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178378,11 +178379,11 @@ void m68000_mcu_device::and_b_das_dd_dpm() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178404,7 +178405,7 @@ void m68000_mcu_device::and_b_das_dd_dpm() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178412,7 +178413,7 @@ void m68000_mcu_device::and_b_das_dd_dpm() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178450,14 +178451,14 @@ void m68000_mcu_device::and_b_dais_dd_dpm() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178465,7 +178466,7 @@ void m68000_mcu_device::and_b_dais_dd_dpm() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178492,7 +178493,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178521,11 +178522,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178547,7 +178548,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178555,7 +178556,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178597,7 +178598,7 @@ void m68000_mcu_device::and_b_adr16_dd_dpm() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178623,7 +178624,7 @@ void m68000_mcu_device::and_b_adr16_dd_dpm() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -178646,7 +178647,7 @@ void m68000_mcu_device::and_b_adr16_dd_dpm() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178654,7 +178655,7 @@ void m68000_mcu_device::and_b_adr16_dd_dpm() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178694,7 +178695,7 @@ void m68000_mcu_device::and_b_adr32_dd_dpm() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178721,7 +178722,7 @@ void m68000_mcu_device::and_b_adr32_dd_dpm() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -178747,7 +178748,7 @@ void m68000_mcu_device::and_b_adr32_dd_dpm() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -178770,7 +178771,7 @@ void m68000_mcu_device::and_b_adr32_dd_dpm() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178778,7 +178779,7 @@ void m68000_mcu_device::and_b_adr32_dd_dpm() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178817,7 +178818,7 @@ void m68000_mcu_device::and_b_dpc_dd_dpm() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178843,11 +178844,11 @@ void m68000_mcu_device::and_b_dpc_dd_dpm() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178869,7 +178870,7 @@ void m68000_mcu_device::and_b_dpc_dd_dpm() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178877,7 +178878,7 @@ void m68000_mcu_device::and_b_dpc_dd_dpm() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178914,14 +178915,14 @@ void m68000_mcu_device::and_b_dpci_dd_dpm() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178929,7 +178930,7 @@ void m68000_mcu_device::and_b_dpci_dd_dpm() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178956,7 +178957,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -178985,11 +178986,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -179011,7 +179012,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179019,7 +179020,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179061,7 +179062,7 @@ void m68000_mcu_device::and_b_imm8_dd_dpm() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179088,7 +179089,7 @@ void m68000_mcu_device::and_b_imm8_dd_dpm() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179096,7 +179097,7 @@ void m68000_mcu_device::and_b_imm8_dd_dpm() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179138,7 +179139,7 @@ void m68000_mcu_device::and_w_ds_dd_dpm() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179146,7 +179147,7 @@ void m68000_mcu_device::and_w_ds_dd_dpm() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179186,11 +179187,11 @@ void m68000_mcu_device::and_w_ais_dd_dpm() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179216,7 +179217,7 @@ void m68000_mcu_device::and_w_ais_dd_dpm() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179224,7 +179225,7 @@ void m68000_mcu_device::and_w_ais_dd_dpm() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179267,12 +179268,12 @@ void m68000_mcu_device::and_w_aips_dd_dpm() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179299,7 +179300,7 @@ void m68000_mcu_device::and_w_aips_dd_dpm() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179307,7 +179308,7 @@ void m68000_mcu_device::and_w_aips_dd_dpm() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179349,7 +179350,7 @@ void m68000_mcu_device::and_w_pais_dd_dpm() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -179357,7 +179358,7 @@ void m68000_mcu_device::and_w_pais_dd_dpm() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179384,7 +179385,7 @@ void m68000_mcu_device::and_w_pais_dd_dpm() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179392,7 +179393,7 @@ void m68000_mcu_device::and_w_pais_dd_dpm() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179432,7 +179433,7 @@ void m68000_mcu_device::and_w_das_dd_dpm() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179458,11 +179459,11 @@ void m68000_mcu_device::and_w_das_dd_dpm() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179488,7 +179489,7 @@ void m68000_mcu_device::and_w_das_dd_dpm() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179496,7 +179497,7 @@ void m68000_mcu_device::and_w_das_dd_dpm() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179534,14 +179535,14 @@ void m68000_mcu_device::and_w_dais_dd_dpm() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179549,7 +179550,7 @@ void m68000_mcu_device::and_w_dais_dd_dpm() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179576,7 +179577,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179605,11 +179606,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -179635,7 +179636,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179643,7 +179644,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179685,7 +179686,7 @@ void m68000_mcu_device::and_w_adr16_dd_dpm() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179711,7 +179712,7 @@ void m68000_mcu_device::and_w_adr16_dd_dpm() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -179738,7 +179739,7 @@ void m68000_mcu_device::and_w_adr16_dd_dpm() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179746,7 +179747,7 @@ void m68000_mcu_device::and_w_adr16_dd_dpm() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179786,7 +179787,7 @@ void m68000_mcu_device::and_w_adr32_dd_dpm() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179813,7 +179814,7 @@ void m68000_mcu_device::and_w_adr32_dd_dpm() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -179839,7 +179840,7 @@ void m68000_mcu_device::and_w_adr32_dd_dpm() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179866,7 +179867,7 @@ void m68000_mcu_device::and_w_adr32_dd_dpm() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179874,7 +179875,7 @@ void m68000_mcu_device::and_w_adr32_dd_dpm() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179913,7 +179914,7 @@ void m68000_mcu_device::and_w_dpc_dd_dpm() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179939,11 +179940,11 @@ void m68000_mcu_device::and_w_dpc_dd_dpm() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -179969,7 +179970,7 @@ void m68000_mcu_device::and_w_dpc_dd_dpm() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179977,7 +179978,7 @@ void m68000_mcu_device::and_w_dpc_dd_dpm() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180014,14 +180015,14 @@ void m68000_mcu_device::and_w_dpci_dd_dpm() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180029,7 +180030,7 @@ void m68000_mcu_device::and_w_dpci_dd_dpm() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180056,7 +180057,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180085,11 +180086,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180115,7 +180116,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180123,7 +180124,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180165,7 +180166,7 @@ void m68000_mcu_device::and_w_imm16_dd_dpm() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180192,7 +180193,7 @@ void m68000_mcu_device::and_w_imm16_dd_dpm() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180200,7 +180201,7 @@ void m68000_mcu_device::and_w_imm16_dd_dpm() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180242,12 +180243,12 @@ void m68000_mcu_device::and_l_ds_dd_dpm() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180270,7 +180271,7 @@ void m68000_mcu_device::and_l_ds_dd_dpm() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -180279,7 +180280,7 @@ void m68000_mcu_device::and_l_ds_dd_dpm() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180299,7 +180300,7 @@ void m68000_mcu_device::and_l_ais_dd_dpm() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180327,7 +180328,7 @@ void m68000_mcu_device::and_l_ais_dd_dpm() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180353,12 +180354,12 @@ void m68000_mcu_device::and_l_ais_dd_dpm() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180387,7 +180388,7 @@ void m68000_mcu_device::and_l_ais_dd_dpm() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180407,7 +180408,7 @@ void m68000_mcu_device::and_l_aips_dd_dpm() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180435,11 +180436,11 @@ void m68000_mcu_device::and_l_aips_dd_dpm() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180465,12 +180466,12 @@ void m68000_mcu_device::and_l_aips_dd_dpm() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180499,7 +180500,7 @@ void m68000_mcu_device::and_l_aips_dd_dpm() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180518,14 +180519,14 @@ void m68000_mcu_device::and_l_pais_dd_dpm() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180552,7 +180553,7 @@ void m68000_mcu_device::and_l_pais_dd_dpm() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180578,12 +180579,12 @@ void m68000_mcu_device::and_l_pais_dd_dpm() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180612,7 +180613,7 @@ void m68000_mcu_device::and_l_pais_dd_dpm() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180632,7 +180633,7 @@ void m68000_mcu_device::and_l_das_dd_dpm() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180657,7 +180658,7 @@ void m68000_mcu_device::and_l_das_dd_dpm() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180685,7 +180686,7 @@ void m68000_mcu_device::and_l_das_dd_dpm() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180711,12 +180712,12 @@ void m68000_mcu_device::and_l_das_dd_dpm() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180745,7 +180746,7 @@ void m68000_mcu_device::and_l_das_dd_dpm() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180763,14 +180764,14 @@ void m68000_mcu_device::and_l_dais_dd_dpm() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -180778,7 +180779,7 @@ void m68000_mcu_device::and_l_dais_dd_dpm() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180805,7 +180806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -180833,7 +180834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180861,7 +180862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -180887,12 +180888,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180921,7 +180922,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180943,7 +180944,7 @@ void m68000_mcu_device::and_l_adr16_dd_dpm() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -180969,7 +180970,7 @@ void m68000_mcu_device::and_l_adr16_dd_dpm() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180997,7 +180998,7 @@ void m68000_mcu_device::and_l_adr16_dd_dpm() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181023,12 +181024,12 @@ void m68000_mcu_device::and_l_adr16_dd_dpm() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181057,7 +181058,7 @@ void m68000_mcu_device::and_l_adr16_dd_dpm() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181077,7 +181078,7 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181104,7 +181105,7 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181130,7 +181131,7 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181158,7 +181159,7 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -181184,12 +181185,12 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181218,7 +181219,7 @@ void m68000_mcu_device::and_l_adr32_dd_dpm() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181237,7 +181238,7 @@ void m68000_mcu_device::and_l_dpc_dd_dpm() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181262,7 +181263,7 @@ void m68000_mcu_device::and_l_dpc_dd_dpm() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181290,7 +181291,7 @@ void m68000_mcu_device::and_l_dpc_dd_dpm() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181316,12 +181317,12 @@ void m68000_mcu_device::and_l_dpc_dd_dpm() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181350,7 +181351,7 @@ void m68000_mcu_device::and_l_dpc_dd_dpm() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181367,14 +181368,14 @@ void m68000_mcu_device::and_l_dpci_dd_dpm() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -181382,7 +181383,7 @@ void m68000_mcu_device::and_l_dpci_dd_dpm() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181409,7 +181410,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181437,7 +181438,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181465,7 +181466,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181491,12 +181492,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181525,7 +181526,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181545,7 +181546,7 @@ void m68000_mcu_device::and_l_imm32_dd_dpm() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181572,7 +181573,7 @@ void m68000_mcu_device::and_l_imm32_dd_dpm() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181599,12 +181600,12 @@ void m68000_mcu_device::and_l_imm32_dd_dpm() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -181627,7 +181628,7 @@ void m68000_mcu_device::and_l_imm32_dd_dpm() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -181636,7 +181637,7 @@ void m68000_mcu_device::and_l_imm32_dd_dpm() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181660,7 +181661,7 @@ void m68000_mcu_device::mulu_w_ds_dd_dpm() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181696,7 +181697,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181708,7 +181709,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181720,7 +181721,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181742,7 +181743,7 @@ void m68000_mcu_device::mulu_w_ais_dd_dpm() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181773,7 +181774,7 @@ void m68000_mcu_device::mulu_w_ais_dd_dpm() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181809,7 +181810,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181821,7 +181822,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181833,7 +181834,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181861,7 +181862,7 @@ void m68000_mcu_device::mulu_w_aips_dd_dpm() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -181890,7 +181891,7 @@ void m68000_mcu_device::mulu_w_aips_dd_dpm() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181926,7 +181927,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181938,7 +181939,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181950,7 +181951,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181980,7 +181981,7 @@ void m68000_mcu_device::mulu_w_pais_dd_dpm() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -182009,7 +182010,7 @@ void m68000_mcu_device::mulu_w_pais_dd_dpm() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182045,7 +182046,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182057,7 +182058,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182069,7 +182070,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182116,7 +182117,7 @@ void m68000_mcu_device::mulu_w_das_dd_dpm() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182147,7 +182148,7 @@ void m68000_mcu_device::mulu_w_das_dd_dpm() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182183,7 +182184,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182195,7 +182196,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182207,7 +182208,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182227,7 +182228,7 @@ void m68000_mcu_device::mulu_w_dais_dd_dpm() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182295,7 +182296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182326,7 +182327,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182362,7 +182363,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182374,7 +182375,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182386,7 +182387,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182434,7 +182435,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_dpm() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -182463,7 +182464,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_dpm() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182499,7 +182500,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182511,7 +182512,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182523,7 +182524,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182595,7 +182596,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_dpm() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -182624,7 +182625,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_dpm() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182660,7 +182661,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182672,7 +182673,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182684,7 +182685,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182730,7 +182731,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_dpm() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182761,7 +182762,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_dpm() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182797,7 +182798,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182809,7 +182810,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182821,7 +182822,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182840,7 +182841,7 @@ void m68000_mcu_device::mulu_w_dpci_dd_dpm() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182908,7 +182909,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182939,7 +182940,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182975,7 +182976,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182987,7 +182988,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182999,7 +183000,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183051,7 +183052,7 @@ void m68000_mcu_device::mulu_w_imm16_dd_dpm() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -183087,7 +183088,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183099,7 +183100,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183111,7 +183112,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183135,12 +183136,12 @@ void m68000_mcu_device::abcd_ds_dd_dpm() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183192,7 +183193,7 @@ void m68000_mcu_device::abcd_pais_paid_dpm() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -183236,12 +183237,12 @@ void m68000_mcu_device::abcd_pais_paid_dpm() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183300,11 +183301,11 @@ void m68000_mcu_device::and_b_dd_ais_dpm() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183326,7 +183327,7 @@ void m68000_mcu_device::and_b_dd_ais_dpm() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183356,7 +183357,7 @@ void m68000_mcu_device::and_b_dd_ais_dpm() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183391,12 +183392,12 @@ void m68000_mcu_device::and_b_dd_aips_dpm() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183419,7 +183420,7 @@ void m68000_mcu_device::and_b_dd_aips_dpm() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183449,7 +183450,7 @@ void m68000_mcu_device::and_b_dd_aips_dpm() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183483,7 +183484,7 @@ void m68000_mcu_device::and_b_dd_pais_dpm() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -183491,7 +183492,7 @@ void m68000_mcu_device::and_b_dd_pais_dpm() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183514,7 +183515,7 @@ void m68000_mcu_device::and_b_dd_pais_dpm() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183544,7 +183545,7 @@ void m68000_mcu_device::and_b_dd_pais_dpm() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183576,7 +183577,7 @@ void m68000_mcu_device::and_b_dd_das_dpm() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183602,11 +183603,11 @@ void m68000_mcu_device::and_b_dd_das_dpm() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183628,7 +183629,7 @@ void m68000_mcu_device::and_b_dd_das_dpm() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183658,7 +183659,7 @@ void m68000_mcu_device::and_b_dd_das_dpm() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183688,14 +183689,14 @@ void m68000_mcu_device::and_b_dd_dais_dpm() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -183703,7 +183704,7 @@ void m68000_mcu_device::and_b_dd_dais_dpm() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183730,7 +183731,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183759,11 +183760,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183785,7 +183786,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183815,7 +183816,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183849,7 +183850,7 @@ void m68000_mcu_device::and_b_dd_adr16_dpm() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -183875,7 +183876,7 @@ void m68000_mcu_device::and_b_dd_adr16_dpm() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -183898,7 +183899,7 @@ void m68000_mcu_device::and_b_dd_adr16_dpm() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183928,7 +183929,7 @@ void m68000_mcu_device::and_b_dd_adr16_dpm() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183960,7 +183961,7 @@ void m68000_mcu_device::and_b_dd_adr32_dpm() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -183987,7 +183988,7 @@ void m68000_mcu_device::and_b_dd_adr32_dpm() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184013,7 +184014,7 @@ void m68000_mcu_device::and_b_dd_adr32_dpm() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -184036,7 +184037,7 @@ void m68000_mcu_device::and_b_dd_adr32_dpm() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184066,7 +184067,7 @@ void m68000_mcu_device::and_b_dd_adr32_dpm() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -184200,11 +184201,11 @@ void m68000_mcu_device::and_w_dd_ais_dpm() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184230,7 +184231,7 @@ void m68000_mcu_device::and_w_dd_ais_dpm() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184260,7 +184261,7 @@ void m68000_mcu_device::and_w_dd_ais_dpm() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184301,12 +184302,12 @@ void m68000_mcu_device::and_w_dd_aips_dpm() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184333,7 +184334,7 @@ void m68000_mcu_device::and_w_dd_aips_dpm() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184363,7 +184364,7 @@ void m68000_mcu_device::and_w_dd_aips_dpm() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184403,7 +184404,7 @@ void m68000_mcu_device::and_w_dd_pais_dpm() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -184411,7 +184412,7 @@ void m68000_mcu_device::and_w_dd_pais_dpm() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184438,7 +184439,7 @@ void m68000_mcu_device::and_w_dd_pais_dpm() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184468,7 +184469,7 @@ void m68000_mcu_device::and_w_dd_pais_dpm() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184506,7 +184507,7 @@ void m68000_mcu_device::and_w_dd_das_dpm() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184532,11 +184533,11 @@ void m68000_mcu_device::and_w_dd_das_dpm() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184562,7 +184563,7 @@ void m68000_mcu_device::and_w_dd_das_dpm() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184592,7 +184593,7 @@ void m68000_mcu_device::and_w_dd_das_dpm() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184628,14 +184629,14 @@ void m68000_mcu_device::and_w_dd_dais_dpm() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -184643,7 +184644,7 @@ void m68000_mcu_device::and_w_dd_dais_dpm() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184670,7 +184671,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184699,11 +184700,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -184729,7 +184730,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184759,7 +184760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184799,7 +184800,7 @@ void m68000_mcu_device::and_w_dd_adr16_dpm() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -184825,7 +184826,7 @@ void m68000_mcu_device::and_w_dd_adr16_dpm() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -184852,7 +184853,7 @@ void m68000_mcu_device::and_w_dd_adr16_dpm() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184882,7 +184883,7 @@ void m68000_mcu_device::and_w_dd_adr16_dpm() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -184920,7 +184921,7 @@ void m68000_mcu_device::and_w_dd_adr32_dpm() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -184947,7 +184948,7 @@ void m68000_mcu_device::and_w_dd_adr32_dpm() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184973,7 +184974,7 @@ void m68000_mcu_device::and_w_dd_adr32_dpm() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -185000,7 +185001,7 @@ void m68000_mcu_device::and_w_dd_adr32_dpm() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185030,7 +185031,7 @@ void m68000_mcu_device::and_w_dd_adr32_dpm() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185119,7 +185120,7 @@ void m68000_mcu_device::and_l_dd_ais_dpm() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185147,7 +185148,7 @@ void m68000_mcu_device::and_l_dd_ais_dpm() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185173,7 +185174,7 @@ void m68000_mcu_device::and_l_dd_ais_dpm() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185201,7 +185202,7 @@ void m68000_mcu_device::and_l_dd_ais_dpm() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185229,7 +185230,7 @@ void m68000_mcu_device::and_l_dd_ais_dpm() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185267,7 +185268,7 @@ void m68000_mcu_device::and_l_dd_aips_dpm() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185295,11 +185296,11 @@ void m68000_mcu_device::and_l_dd_aips_dpm() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185325,7 +185326,7 @@ void m68000_mcu_device::and_l_dd_aips_dpm() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185353,7 +185354,7 @@ void m68000_mcu_device::and_l_dd_aips_dpm() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185381,7 +185382,7 @@ void m68000_mcu_device::and_l_dd_aips_dpm() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185418,14 +185419,14 @@ void m68000_mcu_device::and_l_dd_pais_dpm() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185452,7 +185453,7 @@ void m68000_mcu_device::and_l_dd_pais_dpm() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185478,7 +185479,7 @@ void m68000_mcu_device::and_l_dd_pais_dpm() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185506,7 +185507,7 @@ void m68000_mcu_device::and_l_dd_pais_dpm() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185534,7 +185535,7 @@ void m68000_mcu_device::and_l_dd_pais_dpm() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185572,7 +185573,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185597,7 +185598,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185625,7 +185626,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185651,7 +185652,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185679,7 +185680,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185707,7 +185708,7 @@ void m68000_mcu_device::and_l_dd_das_dpm() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185743,14 +185744,14 @@ void m68000_mcu_device::and_l_dd_dais_dpm() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -185758,7 +185759,7 @@ void m68000_mcu_device::and_l_dd_dais_dpm() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185785,7 +185786,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -185813,7 +185814,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185841,7 +185842,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -185867,7 +185868,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185895,7 +185896,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185923,7 +185924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -185963,7 +185964,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -185989,7 +185990,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -186017,7 +186018,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -186043,7 +186044,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186071,7 +186072,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186099,7 +186100,7 @@ void m68000_mcu_device::and_l_dd_adr16_dpm() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -186137,7 +186138,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -186164,7 +186165,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -186190,7 +186191,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186218,7 +186219,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -186244,7 +186245,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186272,7 +186273,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186300,7 +186301,7 @@ void m68000_mcu_device::and_l_dd_adr32_dpm() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -186342,7 +186343,7 @@ void m68000_mcu_device::muls_w_ds_dd_dpm() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186378,7 +186379,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186392,7 +186393,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186404,7 +186405,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186416,7 +186417,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186433,7 +186434,7 @@ void m68000_mcu_device::muls_w_ais_dd_dpm() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186464,7 +186465,7 @@ void m68000_mcu_device::muls_w_ais_dd_dpm() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186500,7 +186501,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186514,7 +186515,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186526,7 +186527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186538,7 +186539,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186561,7 +186562,7 @@ void m68000_mcu_device::muls_w_aips_dd_dpm() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186590,7 +186591,7 @@ void m68000_mcu_device::muls_w_aips_dd_dpm() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186626,7 +186627,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186640,7 +186641,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186652,7 +186653,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186664,7 +186665,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186689,7 +186690,7 @@ void m68000_mcu_device::muls_w_pais_dd_dpm() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186718,7 +186719,7 @@ void m68000_mcu_device::muls_w_pais_dd_dpm() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186754,7 +186755,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186768,7 +186769,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186780,7 +186781,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186792,7 +186793,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186834,7 +186835,7 @@ void m68000_mcu_device::muls_w_das_dd_dpm() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186865,7 +186866,7 @@ void m68000_mcu_device::muls_w_das_dd_dpm() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186901,7 +186902,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186915,7 +186916,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186927,7 +186928,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186939,7 +186940,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186954,7 +186955,7 @@ void m68000_mcu_device::muls_w_dais_dd_dpm() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187022,7 +187023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187053,7 +187054,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187089,7 +187090,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187103,7 +187104,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187115,7 +187116,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187127,7 +187128,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187170,7 +187171,7 @@ void m68000_mcu_device::muls_w_adr16_dd_dpm() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -187199,7 +187200,7 @@ void m68000_mcu_device::muls_w_adr16_dd_dpm() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187235,7 +187236,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187249,7 +187250,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187261,7 +187262,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187273,7 +187274,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187340,7 +187341,7 @@ void m68000_mcu_device::muls_w_adr32_dd_dpm() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187369,7 +187370,7 @@ void m68000_mcu_device::muls_w_adr32_dd_dpm() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187405,7 +187406,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187419,7 +187420,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187431,7 +187432,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187443,7 +187444,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187484,7 +187485,7 @@ void m68000_mcu_device::muls_w_dpc_dd_dpm() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187515,7 +187516,7 @@ void m68000_mcu_device::muls_w_dpc_dd_dpm() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187551,7 +187552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187565,7 +187566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187577,7 +187578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187589,7 +187590,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187603,7 +187604,7 @@ void m68000_mcu_device::muls_w_dpci_dd_dpm() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187671,7 +187672,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187702,7 +187703,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187738,7 +187739,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187752,7 +187753,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187764,7 +187765,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187776,7 +187777,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187823,7 +187824,7 @@ void m68000_mcu_device::muls_w_imm16_dd_dpm() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187859,7 +187860,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187873,7 +187874,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187885,7 +187886,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187897,7 +187898,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187916,7 +187917,7 @@ void m68000_mcu_device::add_b_ds_dd_dpm() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -187963,7 +187964,7 @@ void m68000_mcu_device::add_b_ais_dd_dpm() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187988,7 +187989,7 @@ void m68000_mcu_device::add_b_ais_dd_dpm() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188041,7 +188042,7 @@ void m68000_mcu_device::add_b_aips_dd_dpm() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188064,7 +188065,7 @@ void m68000_mcu_device::add_b_aips_dd_dpm() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188119,7 +188120,7 @@ void m68000_mcu_device::add_b_pais_dd_dpm() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188142,7 +188143,7 @@ void m68000_mcu_device::add_b_pais_dd_dpm() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188214,7 +188215,7 @@ void m68000_mcu_device::add_b_das_dd_dpm() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188239,7 +188240,7 @@ void m68000_mcu_device::add_b_das_dd_dpm() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188284,7 +188285,7 @@ void m68000_mcu_device::add_b_dais_dd_dpm() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188352,7 +188353,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188377,7 +188378,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188450,7 +188451,7 @@ void m68000_mcu_device::add_b_adr16_dd_dpm() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -188473,7 +188474,7 @@ void m68000_mcu_device::add_b_adr16_dd_dpm() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188570,7 +188571,7 @@ void m68000_mcu_device::add_b_adr32_dd_dpm() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -188593,7 +188594,7 @@ void m68000_mcu_device::add_b_adr32_dd_dpm() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188664,7 +188665,7 @@ void m68000_mcu_device::add_b_dpc_dd_dpm() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188689,7 +188690,7 @@ void m68000_mcu_device::add_b_dpc_dd_dpm() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188733,7 +188734,7 @@ void m68000_mcu_device::add_b_dpci_dd_dpm() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188801,7 +188802,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188826,7 +188827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188901,7 +188902,7 @@ void m68000_mcu_device::add_b_imm8_dd_dpm() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188950,7 +188951,7 @@ void m68000_mcu_device::add_w_ds_dd_dpm() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188999,7 +189000,7 @@ void m68000_mcu_device::add_w_as_dd_dpm() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189046,7 +189047,7 @@ void m68000_mcu_device::add_w_ais_dd_dpm() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189075,7 +189076,7 @@ void m68000_mcu_device::add_w_ais_dd_dpm() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189128,7 +189129,7 @@ void m68000_mcu_device::add_w_aips_dd_dpm() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189155,7 +189156,7 @@ void m68000_mcu_device::add_w_aips_dd_dpm() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189210,7 +189211,7 @@ void m68000_mcu_device::add_w_pais_dd_dpm() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189237,7 +189238,7 @@ void m68000_mcu_device::add_w_pais_dd_dpm() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189309,7 +189310,7 @@ void m68000_mcu_device::add_w_das_dd_dpm() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189338,7 +189339,7 @@ void m68000_mcu_device::add_w_das_dd_dpm() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189383,7 +189384,7 @@ void m68000_mcu_device::add_w_dais_dd_dpm() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189451,7 +189452,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189480,7 +189481,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189553,7 +189554,7 @@ void m68000_mcu_device::add_w_adr16_dd_dpm() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -189580,7 +189581,7 @@ void m68000_mcu_device::add_w_adr16_dd_dpm() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189677,7 +189678,7 @@ void m68000_mcu_device::add_w_adr32_dd_dpm() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189704,7 +189705,7 @@ void m68000_mcu_device::add_w_adr32_dd_dpm() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189775,7 +189776,7 @@ void m68000_mcu_device::add_w_dpc_dd_dpm() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189804,7 +189805,7 @@ void m68000_mcu_device::add_w_dpc_dd_dpm() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189848,7 +189849,7 @@ void m68000_mcu_device::add_w_dpci_dd_dpm() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189916,7 +189917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189945,7 +189946,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190020,7 +190021,7 @@ void m68000_mcu_device::add_w_imm16_dd_dpm() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190069,7 +190070,7 @@ void m68000_mcu_device::add_l_ds_dd_dpm() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190096,7 +190097,7 @@ void m68000_mcu_device::add_l_ds_dd_dpm() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190126,7 +190127,7 @@ void m68000_mcu_device::add_l_as_dd_dpm() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190153,7 +190154,7 @@ void m68000_mcu_device::add_l_as_dd_dpm() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190181,7 +190182,7 @@ void m68000_mcu_device::add_l_ais_dd_dpm() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190234,12 +190235,12 @@ void m68000_mcu_device::add_l_ais_dd_dpm() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190287,7 +190288,7 @@ void m68000_mcu_device::add_l_aips_dd_dpm() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190343,12 +190344,12 @@ void m68000_mcu_device::add_l_aips_dd_dpm() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190395,7 +190396,7 @@ void m68000_mcu_device::add_l_pais_dd_dpm() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190453,12 +190454,12 @@ void m68000_mcu_device::add_l_pais_dd_dpm() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190530,7 +190531,7 @@ void m68000_mcu_device::add_l_das_dd_dpm() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190583,12 +190584,12 @@ void m68000_mcu_device::add_l_das_dd_dpm() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190634,7 +190635,7 @@ void m68000_mcu_device::add_l_dais_dd_dpm() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190701,7 +190702,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190754,12 +190755,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190833,7 +190834,7 @@ void m68000_mcu_device::add_l_adr16_dd_dpm() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190886,12 +190887,12 @@ void m68000_mcu_device::add_l_adr16_dd_dpm() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190989,7 +190990,7 @@ void m68000_mcu_device::add_l_adr32_dd_dpm() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -191042,12 +191043,12 @@ void m68000_mcu_device::add_l_adr32_dd_dpm() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191118,7 +191119,7 @@ void m68000_mcu_device::add_l_dpc_dd_dpm() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191171,12 +191172,12 @@ void m68000_mcu_device::add_l_dpc_dd_dpm() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191221,7 +191222,7 @@ void m68000_mcu_device::add_l_dpci_dd_dpm() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191288,7 +191289,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191341,12 +191342,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191446,7 +191447,7 @@ void m68000_mcu_device::add_l_imm32_dd_dpm() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -191473,7 +191474,7 @@ void m68000_mcu_device::add_l_imm32_dd_dpm() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -191503,7 +191504,7 @@ void m68000_mcu_device::adda_w_ds_ad_dpm() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191529,7 +191530,7 @@ void m68000_mcu_device::adda_w_ds_ad_dpm() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191558,7 +191559,7 @@ void m68000_mcu_device::adda_w_as_ad_dpm() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191584,7 +191585,7 @@ void m68000_mcu_device::adda_w_as_ad_dpm() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191611,7 +191612,7 @@ void m68000_mcu_device::adda_w_ais_ad_dpm() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191640,7 +191641,7 @@ void m68000_mcu_device::adda_w_ais_ad_dpm() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191666,7 +191667,7 @@ void m68000_mcu_device::adda_w_ais_ad_dpm() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191699,7 +191700,7 @@ void m68000_mcu_device::adda_w_aips_ad_dpm() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191726,7 +191727,7 @@ void m68000_mcu_device::adda_w_aips_ad_dpm() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191752,7 +191753,7 @@ void m68000_mcu_device::adda_w_aips_ad_dpm() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191787,7 +191788,7 @@ void m68000_mcu_device::adda_w_pais_ad_dpm() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191814,7 +191815,7 @@ void m68000_mcu_device::adda_w_pais_ad_dpm() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191840,7 +191841,7 @@ void m68000_mcu_device::adda_w_pais_ad_dpm() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191892,7 +191893,7 @@ void m68000_mcu_device::adda_w_das_ad_dpm() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191921,7 +191922,7 @@ void m68000_mcu_device::adda_w_das_ad_dpm() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191947,7 +191948,7 @@ void m68000_mcu_device::adda_w_das_ad_dpm() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191972,7 +191973,7 @@ void m68000_mcu_device::adda_w_dais_ad_dpm() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192040,7 +192041,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192069,7 +192070,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192095,7 +192096,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192148,7 +192149,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dpm() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -192175,7 +192176,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dpm() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192201,7 +192202,7 @@ void m68000_mcu_device::adda_w_adr16_ad_dpm() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192278,7 +192279,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dpm() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -192305,7 +192306,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dpm() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192331,7 +192332,7 @@ void m68000_mcu_device::adda_w_adr32_ad_dpm() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192382,7 +192383,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dpm() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192411,7 +192412,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dpm() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192437,7 +192438,7 @@ void m68000_mcu_device::adda_w_dpc_ad_dpm() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192461,7 +192462,7 @@ void m68000_mcu_device::adda_w_dpci_ad_dpm() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192529,7 +192530,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192558,7 +192559,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192584,7 +192585,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192639,7 +192640,7 @@ void m68000_mcu_device::adda_w_imm16_ad_dpm() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192665,7 +192666,7 @@ void m68000_mcu_device::adda_w_imm16_ad_dpm() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192694,7 +192695,7 @@ void m68000_mcu_device::addx_b_ds_dd_dpm() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -192702,7 +192703,7 @@ void m68000_mcu_device::addx_b_ds_dd_dpm() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -192744,16 +192745,16 @@ void m68000_mcu_device::addx_b_pais_paid_dpm() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192776,7 +192777,7 @@ void m68000_mcu_device::addx_b_pais_paid_dpm() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192796,7 +192797,7 @@ void m68000_mcu_device::addx_b_pais_paid_dpm() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192826,7 +192827,7 @@ void m68000_mcu_device::addx_b_pais_paid_dpm() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -192858,7 +192859,7 @@ void m68000_mcu_device::add_b_dd_ais_dpm() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192883,7 +192884,7 @@ void m68000_mcu_device::add_b_dd_ais_dpm() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192950,7 +192951,7 @@ void m68000_mcu_device::add_b_dd_aips_dpm() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192973,7 +192974,7 @@ void m68000_mcu_device::add_b_dd_aips_dpm() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193042,7 +193043,7 @@ void m68000_mcu_device::add_b_dd_pais_dpm() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193065,7 +193066,7 @@ void m68000_mcu_device::add_b_dd_pais_dpm() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193151,7 +193152,7 @@ void m68000_mcu_device::add_b_dd_das_dpm() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193176,7 +193177,7 @@ void m68000_mcu_device::add_b_dd_das_dpm() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193235,7 +193236,7 @@ void m68000_mcu_device::add_b_dd_dais_dpm() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193303,7 +193304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193328,7 +193329,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193415,7 +193416,7 @@ void m68000_mcu_device::add_b_dd_adr16_dpm() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -193438,7 +193439,7 @@ void m68000_mcu_device::add_b_dd_adr16_dpm() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193549,7 +193550,7 @@ void m68000_mcu_device::add_b_dd_adr32_dpm() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193572,7 +193573,7 @@ void m68000_mcu_device::add_b_dd_adr32_dpm() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193635,7 +193636,7 @@ void m68000_mcu_device::addx_w_ds_dd_dpm() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -193643,7 +193644,7 @@ void m68000_mcu_device::addx_w_ds_dd_dpm() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -193685,16 +193686,16 @@ void m68000_mcu_device::addx_w_pais_paid_dpm() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -193721,7 +193722,7 @@ void m68000_mcu_device::addx_w_pais_paid_dpm() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -193745,7 +193746,7 @@ void m68000_mcu_device::addx_w_pais_paid_dpm() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193775,7 +193776,7 @@ void m68000_mcu_device::addx_w_pais_paid_dpm() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -193813,7 +193814,7 @@ void m68000_mcu_device::add_w_dd_ais_dpm() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193842,7 +193843,7 @@ void m68000_mcu_device::add_w_dd_ais_dpm() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193915,7 +193916,7 @@ void m68000_mcu_device::add_w_dd_aips_dpm() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193942,7 +193943,7 @@ void m68000_mcu_device::add_w_dd_aips_dpm() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194017,7 +194018,7 @@ void m68000_mcu_device::add_w_dd_pais_dpm() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194044,7 +194045,7 @@ void m68000_mcu_device::add_w_dd_pais_dpm() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194136,7 +194137,7 @@ void m68000_mcu_device::add_w_dd_das_dpm() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194165,7 +194166,7 @@ void m68000_mcu_device::add_w_dd_das_dpm() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194230,7 +194231,7 @@ void m68000_mcu_device::add_w_dd_dais_dpm() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194298,7 +194299,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194327,7 +194328,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194420,7 +194421,7 @@ void m68000_mcu_device::add_w_dd_adr16_dpm() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -194447,7 +194448,7 @@ void m68000_mcu_device::add_w_dd_adr16_dpm() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194564,7 +194565,7 @@ void m68000_mcu_device::add_w_dd_adr32_dpm() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -194591,7 +194592,7 @@ void m68000_mcu_device::add_w_dd_adr32_dpm() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194660,12 +194661,12 @@ void m68000_mcu_device::addx_l_ds_dd_dpm() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -194688,7 +194689,7 @@ void m68000_mcu_device::addx_l_ds_dd_dpm() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -194697,7 +194698,7 @@ void m68000_mcu_device::addx_l_ds_dd_dpm() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -194719,13 +194720,13 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194749,11 +194750,11 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194778,7 +194779,7 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -194804,7 +194805,7 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -194832,7 +194833,7 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -194855,7 +194856,7 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194885,7 +194886,7 @@ void m68000_mcu_device::addx_l_pais_paid_dpm() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -194923,7 +194924,7 @@ void m68000_mcu_device::add_l_dd_ais_dpm() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194976,7 +194977,7 @@ void m68000_mcu_device::add_l_dd_ais_dpm() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195004,7 +195005,7 @@ void m68000_mcu_device::add_l_dd_ais_dpm() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195069,7 +195070,7 @@ void m68000_mcu_device::add_l_dd_aips_dpm() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -195125,7 +195126,7 @@ void m68000_mcu_device::add_l_dd_aips_dpm() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195153,7 +195154,7 @@ void m68000_mcu_device::add_l_dd_aips_dpm() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195217,7 +195218,7 @@ void m68000_mcu_device::add_l_dd_pais_dpm() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195275,7 +195276,7 @@ void m68000_mcu_device::add_l_dd_pais_dpm() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195303,7 +195304,7 @@ void m68000_mcu_device::add_l_dd_pais_dpm() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195392,7 +195393,7 @@ void m68000_mcu_device::add_l_dd_das_dpm() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195445,7 +195446,7 @@ void m68000_mcu_device::add_l_dd_das_dpm() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195473,7 +195474,7 @@ void m68000_mcu_device::add_l_dd_das_dpm() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195536,7 +195537,7 @@ void m68000_mcu_device::add_l_dd_dais_dpm() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195603,7 +195604,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195656,7 +195657,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195684,7 +195685,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195775,7 +195776,7 @@ void m68000_mcu_device::add_l_dd_adr16_dpm() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195828,7 +195829,7 @@ void m68000_mcu_device::add_l_dd_adr16_dpm() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195856,7 +195857,7 @@ void m68000_mcu_device::add_l_dd_adr16_dpm() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195971,7 +195972,7 @@ void m68000_mcu_device::add_l_dd_adr32_dpm() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -196024,7 +196025,7 @@ void m68000_mcu_device::add_l_dd_adr32_dpm() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196052,7 +196053,7 @@ void m68000_mcu_device::add_l_dd_adr32_dpm() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -196119,7 +196120,7 @@ void m68000_mcu_device::adda_l_ds_ad_dpm() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196145,7 +196146,7 @@ void m68000_mcu_device::adda_l_ds_ad_dpm() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196174,7 +196175,7 @@ void m68000_mcu_device::adda_l_as_ad_dpm() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196200,7 +196201,7 @@ void m68000_mcu_device::adda_l_as_ad_dpm() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196227,7 +196228,7 @@ void m68000_mcu_device::adda_l_ais_ad_dpm() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196280,11 +196281,11 @@ void m68000_mcu_device::adda_l_ais_ad_dpm() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196331,7 +196332,7 @@ void m68000_mcu_device::adda_l_aips_ad_dpm() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196387,11 +196388,11 @@ void m68000_mcu_device::adda_l_aips_ad_dpm() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196437,7 +196438,7 @@ void m68000_mcu_device::adda_l_pais_ad_dpm() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -196495,11 +196496,11 @@ void m68000_mcu_device::adda_l_pais_ad_dpm() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196570,7 +196571,7 @@ void m68000_mcu_device::adda_l_das_ad_dpm() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196623,11 +196624,11 @@ void m68000_mcu_device::adda_l_das_ad_dpm() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196672,7 +196673,7 @@ void m68000_mcu_device::adda_l_dais_ad_dpm() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196739,7 +196740,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196792,11 +196793,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196869,7 +196870,7 @@ void m68000_mcu_device::adda_l_adr16_ad_dpm() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196922,11 +196923,11 @@ void m68000_mcu_device::adda_l_adr16_ad_dpm() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197023,7 +197024,7 @@ void m68000_mcu_device::adda_l_adr32_ad_dpm() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197076,11 +197077,11 @@ void m68000_mcu_device::adda_l_adr32_ad_dpm() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -197150,7 +197151,7 @@ void m68000_mcu_device::adda_l_dpc_ad_dpm() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197203,11 +197204,11 @@ void m68000_mcu_device::adda_l_dpc_ad_dpm() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197251,7 +197252,7 @@ void m68000_mcu_device::adda_l_dpci_ad_dpm() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -197318,7 +197319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197371,11 +197372,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197474,7 +197475,7 @@ void m68000_mcu_device::adda_l_imm32_ad_dpm() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -197500,7 +197501,7 @@ void m68000_mcu_device::adda_l_imm32_ad_dpm() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -197528,13 +197529,13 @@ void m68000_mcu_device::asr_b_imm3_ds_dpm() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197566,7 +197567,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197600,13 +197601,13 @@ void m68000_mcu_device::lsr_b_imm3_ds_dpm() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197638,7 +197639,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197672,13 +197673,13 @@ void m68000_mcu_device::roxr_b_imm3_ds_dpm() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197710,7 +197711,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197744,13 +197745,13 @@ void m68000_mcu_device::ror_b_imm3_ds_dpm() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197782,7 +197783,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -197817,13 +197818,13 @@ void m68000_mcu_device::asr_b_dd_ds_dpm() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197855,7 +197856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197890,13 +197891,13 @@ void m68000_mcu_device::lsr_b_dd_ds_dpm() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197928,7 +197929,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197963,13 +197964,13 @@ void m68000_mcu_device::roxr_b_dd_ds_dpm() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198001,7 +198002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198036,13 +198037,13 @@ void m68000_mcu_device::ror_b_dd_ds_dpm() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198074,7 +198075,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198108,13 +198109,13 @@ void m68000_mcu_device::asr_w_imm3_ds_dpm() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198146,7 +198147,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198180,13 +198181,13 @@ void m68000_mcu_device::lsr_w_imm3_ds_dpm() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198218,7 +198219,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198252,13 +198253,13 @@ void m68000_mcu_device::roxr_w_imm3_ds_dpm() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198290,7 +198291,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198324,13 +198325,13 @@ void m68000_mcu_device::ror_w_imm3_ds_dpm() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198362,7 +198363,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198397,13 +198398,13 @@ void m68000_mcu_device::asr_w_dd_ds_dpm() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198435,7 +198436,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198470,13 +198471,13 @@ void m68000_mcu_device::lsr_w_dd_ds_dpm() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198508,7 +198509,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198543,13 +198544,13 @@ void m68000_mcu_device::roxr_w_dd_ds_dpm() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198581,7 +198582,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198616,13 +198617,13 @@ void m68000_mcu_device::ror_w_dd_ds_dpm() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198654,7 +198655,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198688,13 +198689,13 @@ void m68000_mcu_device::asr_l_imm3_ds_dpm() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198726,7 +198727,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198743,7 +198744,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198766,13 +198767,13 @@ void m68000_mcu_device::lsr_l_imm3_ds_dpm() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198804,7 +198805,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198821,7 +198822,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198844,13 +198845,13 @@ void m68000_mcu_device::roxr_l_imm3_ds_dpm() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198882,7 +198883,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198899,7 +198900,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198922,13 +198923,13 @@ void m68000_mcu_device::ror_l_imm3_ds_dpm() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198960,7 +198961,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198977,7 +198978,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199001,13 +199002,13 @@ void m68000_mcu_device::asr_l_dd_ds_dpm() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199039,7 +199040,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199056,7 +199057,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199080,13 +199081,13 @@ void m68000_mcu_device::lsr_l_dd_ds_dpm() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199118,7 +199119,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199135,7 +199136,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199159,13 +199160,13 @@ void m68000_mcu_device::roxr_l_dd_ds_dpm() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199197,7 +199198,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199214,7 +199215,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199238,13 +199239,13 @@ void m68000_mcu_device::ror_l_dd_ds_dpm() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199276,7 +199277,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -199293,7 +199294,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199315,7 +199316,7 @@ void m68000_mcu_device::asr_ais_dpm() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199344,12 +199345,12 @@ void m68000_mcu_device::asr_ais_dpm() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199422,7 +199423,7 @@ void m68000_mcu_device::asr_aips_dpm() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199449,12 +199450,12 @@ void m68000_mcu_device::asr_aips_dpm() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199529,7 +199530,7 @@ void m68000_mcu_device::asr_pais_dpm() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199556,12 +199557,12 @@ void m68000_mcu_device::asr_pais_dpm() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199653,7 +199654,7 @@ void m68000_mcu_device::asr_das_dpm() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199682,12 +199683,12 @@ void m68000_mcu_device::asr_das_dpm() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199752,7 +199753,7 @@ void m68000_mcu_device::asr_dais_dpm() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -199820,7 +199821,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199849,12 +199850,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199947,7 +199948,7 @@ void m68000_mcu_device::asr_adr16_dpm() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -199974,12 +199975,12 @@ void m68000_mcu_device::asr_adr16_dpm() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200096,7 +200097,7 @@ void m68000_mcu_device::asr_adr32_dpm() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200123,12 +200124,12 @@ void m68000_mcu_device::asr_adr32_dpm() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200196,13 +200197,13 @@ void m68000_mcu_device::asl_b_imm3_ds_dpm() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200234,7 +200235,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200268,13 +200269,13 @@ void m68000_mcu_device::lsl_b_imm3_ds_dpm() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200306,7 +200307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200320,7 +200321,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200341,13 +200342,13 @@ void m68000_mcu_device::roxl_b_imm3_ds_dpm() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200379,7 +200380,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200413,13 +200414,13 @@ void m68000_mcu_device::rol_b_imm3_ds_dpm() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200451,7 +200452,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200486,13 +200487,13 @@ void m68000_mcu_device::asl_b_dd_ds_dpm() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200524,7 +200525,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200559,13 +200560,13 @@ void m68000_mcu_device::lsl_b_dd_ds_dpm() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200597,7 +200598,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200611,7 +200612,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200633,13 +200634,13 @@ void m68000_mcu_device::roxl_b_dd_ds_dpm() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200671,7 +200672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200706,13 +200707,13 @@ void m68000_mcu_device::rol_b_dd_ds_dpm() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200744,7 +200745,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200778,13 +200779,13 @@ void m68000_mcu_device::asl_w_imm3_ds_dpm() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200816,7 +200817,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200850,13 +200851,13 @@ void m68000_mcu_device::lsl_w_imm3_ds_dpm() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200888,7 +200889,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200902,7 +200903,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200923,13 +200924,13 @@ void m68000_mcu_device::roxl_w_imm3_ds_dpm() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200961,7 +200962,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200995,13 +200996,13 @@ void m68000_mcu_device::rol_w_imm3_ds_dpm() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201033,7 +201034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201068,13 +201069,13 @@ void m68000_mcu_device::asl_w_dd_ds_dpm() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201106,7 +201107,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201141,13 +201142,13 @@ void m68000_mcu_device::lsl_w_dd_ds_dpm() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201179,7 +201180,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201193,7 +201194,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -201215,13 +201216,13 @@ void m68000_mcu_device::roxl_w_dd_ds_dpm() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201253,7 +201254,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201288,13 +201289,13 @@ void m68000_mcu_device::rol_w_dd_ds_dpm() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201326,7 +201327,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201360,13 +201361,13 @@ void m68000_mcu_device::asl_l_imm3_ds_dpm() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201398,7 +201399,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201415,7 +201416,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201438,13 +201439,13 @@ void m68000_mcu_device::lsl_l_imm3_ds_dpm() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201476,7 +201477,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201488,14 +201489,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201518,13 +201519,13 @@ void m68000_mcu_device::roxl_l_imm3_ds_dpm() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201556,7 +201557,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201573,7 +201574,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201596,13 +201597,13 @@ void m68000_mcu_device::rol_l_imm3_ds_dpm() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201634,7 +201635,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201651,7 +201652,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201675,13 +201676,13 @@ void m68000_mcu_device::asl_l_dd_ds_dpm() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201713,7 +201714,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201730,7 +201731,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201754,13 +201755,13 @@ void m68000_mcu_device::lsl_l_dd_ds_dpm() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201792,7 +201793,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201804,14 +201805,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201835,13 +201836,13 @@ void m68000_mcu_device::roxl_l_dd_ds_dpm() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201873,7 +201874,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201890,7 +201891,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201914,13 +201915,13 @@ void m68000_mcu_device::rol_l_dd_ds_dpm() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201952,7 +201953,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201969,7 +201970,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201991,7 +201992,7 @@ void m68000_mcu_device::asl_ais_dpm() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202020,12 +202021,12 @@ void m68000_mcu_device::asl_ais_dpm() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202098,7 +202099,7 @@ void m68000_mcu_device::asl_aips_dpm() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202125,12 +202126,12 @@ void m68000_mcu_device::asl_aips_dpm() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202205,7 +202206,7 @@ void m68000_mcu_device::asl_pais_dpm() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202232,12 +202233,12 @@ void m68000_mcu_device::asl_pais_dpm() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202329,7 +202330,7 @@ void m68000_mcu_device::asl_das_dpm() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202358,12 +202359,12 @@ void m68000_mcu_device::asl_das_dpm() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202428,7 +202429,7 @@ void m68000_mcu_device::asl_dais_dpm() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -202496,7 +202497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202525,12 +202526,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202623,7 +202624,7 @@ void m68000_mcu_device::asl_adr16_dpm() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -202650,12 +202651,12 @@ void m68000_mcu_device::asl_adr16_dpm() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202772,7 +202773,7 @@ void m68000_mcu_device::asl_adr32_dpm() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -202799,12 +202800,12 @@ void m68000_mcu_device::asl_adr32_dpm() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202871,7 +202872,7 @@ void m68000_mcu_device::lsr_ais_dpm() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202900,12 +202901,12 @@ void m68000_mcu_device::lsr_ais_dpm() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202978,7 +202979,7 @@ void m68000_mcu_device::lsr_aips_dpm() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203005,12 +203006,12 @@ void m68000_mcu_device::lsr_aips_dpm() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203085,7 +203086,7 @@ void m68000_mcu_device::lsr_pais_dpm() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203112,12 +203113,12 @@ void m68000_mcu_device::lsr_pais_dpm() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203209,7 +203210,7 @@ void m68000_mcu_device::lsr_das_dpm() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203238,12 +203239,12 @@ void m68000_mcu_device::lsr_das_dpm() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203308,7 +203309,7 @@ void m68000_mcu_device::lsr_dais_dpm() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -203376,7 +203377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203405,12 +203406,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203503,7 +203504,7 @@ void m68000_mcu_device::lsr_adr16_dpm() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -203530,12 +203531,12 @@ void m68000_mcu_device::lsr_adr16_dpm() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203652,7 +203653,7 @@ void m68000_mcu_device::lsr_adr32_dpm() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -203679,12 +203680,12 @@ void m68000_mcu_device::lsr_adr32_dpm() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203751,11 +203752,11 @@ void m68000_mcu_device::lsl_ais_dpm() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -203781,12 +203782,12 @@ void m68000_mcu_device::lsl_ais_dpm() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203816,7 +203817,7 @@ void m68000_mcu_device::lsl_ais_dpm() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -203857,12 +203858,12 @@ void m68000_mcu_device::lsl_aips_dpm() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203889,12 +203890,12 @@ void m68000_mcu_device::lsl_aips_dpm() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203924,7 +203925,7 @@ void m68000_mcu_device::lsl_aips_dpm() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -203964,7 +203965,7 @@ void m68000_mcu_device::lsl_pais_dpm() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203972,7 +203973,7 @@ void m68000_mcu_device::lsl_pais_dpm() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203999,12 +204000,12 @@ void m68000_mcu_device::lsl_pais_dpm() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204034,7 +204035,7 @@ void m68000_mcu_device::lsl_pais_dpm() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204072,7 +204073,7 @@ void m68000_mcu_device::lsl_das_dpm() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204098,11 +204099,11 @@ void m68000_mcu_device::lsl_das_dpm() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -204128,12 +204129,12 @@ void m68000_mcu_device::lsl_das_dpm() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204163,7 +204164,7 @@ void m68000_mcu_device::lsl_das_dpm() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204199,14 +204200,14 @@ void m68000_mcu_device::lsl_dais_dpm() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204214,7 +204215,7 @@ void m68000_mcu_device::lsl_dais_dpm() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204241,7 +204242,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204270,11 +204271,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program.read_interruptible(m_aob & ~1);
@@ -204300,12 +204301,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204335,7 +204336,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204375,7 +204376,7 @@ void m68000_mcu_device::lsl_adr16_dpm() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -204401,7 +204402,7 @@ void m68000_mcu_device::lsl_adr16_dpm() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -204428,12 +204429,12 @@ void m68000_mcu_device::lsl_adr16_dpm() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204463,7 +204464,7 @@ void m68000_mcu_device::lsl_adr16_dpm() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204501,7 +204502,7 @@ void m68000_mcu_device::lsl_adr32_dpm() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes.read_interruptible(m_aob & ~1);
@@ -204528,7 +204529,7 @@ void m68000_mcu_device::lsl_adr32_dpm() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -204554,7 +204555,7 @@ void m68000_mcu_device::lsl_adr32_dpm() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -204581,12 +204582,12 @@ void m68000_mcu_device::lsl_adr32_dpm() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204616,7 +204617,7 @@ void m68000_mcu_device::lsl_adr32_dpm() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program.write_interruptible(m_aob & ~1, m_dbout);
@@ -204654,7 +204655,7 @@ void m68000_mcu_device::roxr_ais_dpm() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204683,12 +204684,12 @@ void m68000_mcu_device::roxr_ais_dpm() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204761,7 +204762,7 @@ void m68000_mcu_device::roxr_aips_dpm() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204788,12 +204789,12 @@ void m68000_mcu_device::roxr_aips_dpm() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204868,7 +204869,7 @@ void m68000_mcu_device::roxr_pais_dpm() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204895,12 +204896,12 @@ void m68000_mcu_device::roxr_pais_dpm() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204992,7 +204993,7 @@ void m68000_mcu_device::roxr_das_dpm() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205021,12 +205022,12 @@ void m68000_mcu_device::roxr_das_dpm() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205091,7 +205092,7 @@ void m68000_mcu_device::roxr_dais_dpm() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -205159,7 +205160,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205188,12 +205189,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205286,7 +205287,7 @@ void m68000_mcu_device::roxr_adr16_dpm() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -205313,12 +205314,12 @@ void m68000_mcu_device::roxr_adr16_dpm() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205435,7 +205436,7 @@ void m68000_mcu_device::roxr_adr32_dpm() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205462,12 +205463,12 @@ void m68000_mcu_device::roxr_adr32_dpm() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205534,7 +205535,7 @@ void m68000_mcu_device::roxl_ais_dpm() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205563,12 +205564,12 @@ void m68000_mcu_device::roxl_ais_dpm() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205641,7 +205642,7 @@ void m68000_mcu_device::roxl_aips_dpm() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205668,12 +205669,12 @@ void m68000_mcu_device::roxl_aips_dpm() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205748,7 +205749,7 @@ void m68000_mcu_device::roxl_pais_dpm() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205775,12 +205776,12 @@ void m68000_mcu_device::roxl_pais_dpm() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205872,7 +205873,7 @@ void m68000_mcu_device::roxl_das_dpm() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205901,12 +205902,12 @@ void m68000_mcu_device::roxl_das_dpm() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205971,7 +205972,7 @@ void m68000_mcu_device::roxl_dais_dpm() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206039,7 +206040,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206068,12 +206069,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206166,7 +206167,7 @@ void m68000_mcu_device::roxl_adr16_dpm() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -206193,12 +206194,12 @@ void m68000_mcu_device::roxl_adr16_dpm() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206315,7 +206316,7 @@ void m68000_mcu_device::roxl_adr32_dpm() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -206342,12 +206343,12 @@ void m68000_mcu_device::roxl_adr32_dpm() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206414,7 +206415,7 @@ void m68000_mcu_device::ror_ais_dpm() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206443,12 +206444,12 @@ void m68000_mcu_device::ror_ais_dpm() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206521,7 +206522,7 @@ void m68000_mcu_device::ror_aips_dpm() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206548,12 +206549,12 @@ void m68000_mcu_device::ror_aips_dpm() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206628,7 +206629,7 @@ void m68000_mcu_device::ror_pais_dpm() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206655,12 +206656,12 @@ void m68000_mcu_device::ror_pais_dpm() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206752,7 +206753,7 @@ void m68000_mcu_device::ror_das_dpm() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206781,12 +206782,12 @@ void m68000_mcu_device::ror_das_dpm() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206851,7 +206852,7 @@ void m68000_mcu_device::ror_dais_dpm() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206919,7 +206920,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206948,12 +206949,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207046,7 +207047,7 @@ void m68000_mcu_device::ror_adr16_dpm() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207073,12 +207074,12 @@ void m68000_mcu_device::ror_adr16_dpm() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207195,7 +207196,7 @@ void m68000_mcu_device::ror_adr32_dpm() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -207222,12 +207223,12 @@ void m68000_mcu_device::ror_adr32_dpm() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207294,7 +207295,7 @@ void m68000_mcu_device::rol_ais_dpm() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207323,12 +207324,12 @@ void m68000_mcu_device::rol_ais_dpm() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207401,7 +207402,7 @@ void m68000_mcu_device::rol_aips_dpm() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207428,12 +207429,12 @@ void m68000_mcu_device::rol_aips_dpm() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207508,7 +207509,7 @@ void m68000_mcu_device::rol_pais_dpm() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207535,12 +207536,12 @@ void m68000_mcu_device::rol_pais_dpm() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207632,7 +207633,7 @@ void m68000_mcu_device::rol_das_dpm() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207661,12 +207662,12 @@ void m68000_mcu_device::rol_das_dpm() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207731,7 +207732,7 @@ void m68000_mcu_device::rol_dais_dpm() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207799,7 +207800,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207828,12 +207829,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207926,7 +207927,7 @@ void m68000_mcu_device::rol_adr16_dpm() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207953,12 +207954,12 @@ void m68000_mcu_device::rol_adr16_dpm() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208075,7 +208076,7 @@ void m68000_mcu_device::rol_adr32_dpm() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -208102,12 +208103,12 @@ void m68000_mcu_device::rol_adr32_dpm() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000mcu-sifm.cpp b/src/devices/cpu/m68000/m68000mcu-sifm.cpp
index c11553263fe..2612b3f2d0f 100644
--- a/src/devices/cpu/m68000/m68000mcu-sifm.cpp
+++ b/src/devices/cpu/m68000/m68000mcu-sifm.cpp
@@ -185,7 +185,7 @@ void m68000_mcu_device::state_bus_error_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195,7 +195,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -218,7 +218,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -240,7 +240,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -266,7 +266,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -288,7 +288,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -313,7 +313,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -336,7 +336,7 @@ void m68000_mcu_device::state_bus_error_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -464,7 +464,7 @@ void m68000_mcu_device::state_address_error_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -474,7 +474,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -497,7 +497,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -519,7 +519,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -545,7 +545,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -567,7 +567,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -592,7 +592,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -615,7 +615,7 @@ void m68000_mcu_device::state_address_error_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -750,7 +750,7 @@ void m68000_mcu_device::state_interrupt_ifm()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -762,7 +762,7 @@ void m68000_mcu_device::state_interrupt_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -818,7 +818,7 @@ void m68000_mcu_device::state_interrupt_ifm()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -841,7 +841,7 @@ void m68000_mcu_device::state_interrupt_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -967,7 +967,7 @@ void m68000_mcu_device::state_trace_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -977,7 +977,7 @@ void m68000_mcu_device::state_trace_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1002,7 +1002,7 @@ void m68000_mcu_device::state_trace_ifm()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1025,7 +1025,7 @@ void m68000_mcu_device::state_trace_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1151,7 +1151,7 @@ void m68000_mcu_device::state_illegal_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1161,7 +1161,7 @@ void m68000_mcu_device::state_illegal_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1186,7 +1186,7 @@ void m68000_mcu_device::state_illegal_ifm()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1209,7 +1209,7 @@ void m68000_mcu_device::state_illegal_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1335,7 +1335,7 @@ void m68000_mcu_device::state_priviledge_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1345,7 +1345,7 @@ void m68000_mcu_device::state_priviledge_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1370,7 +1370,7 @@ void m68000_mcu_device::state_priviledge_ifm()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1393,7 +1393,7 @@ void m68000_mcu_device::state_priviledge_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1519,7 +1519,7 @@ void m68000_mcu_device::state_linea_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1529,7 +1529,7 @@ void m68000_mcu_device::state_linea_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1554,7 +1554,7 @@ void m68000_mcu_device::state_linea_ifm()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1577,7 +1577,7 @@ void m68000_mcu_device::state_linea_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1703,7 +1703,7 @@ void m68000_mcu_device::state_linef_ifm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1713,7 +1713,7 @@ void m68000_mcu_device::state_linef_ifm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1738,7 +1738,7 @@ void m68000_mcu_device::state_linef_ifm()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1761,7 +1761,7 @@ void m68000_mcu_device::state_linef_ifm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -1884,7 +1884,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ifm() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1907,7 +1907,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ifm() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -1915,7 +1915,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ifm() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1949,7 +1949,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ifm() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -1971,11 +1971,11 @@ void m68000_mcu_device::ori_b_imm8_ais_ifm() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -1995,7 +1995,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ifm() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2022,7 +2022,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ifm() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2049,7 +2049,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ifm() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2074,12 +2074,12 @@ void m68000_mcu_device::ori_b_imm8_aips_ifm() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2100,7 +2100,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ifm() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2127,7 +2127,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ifm() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2154,7 +2154,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ifm() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2178,7 +2178,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ifm() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2186,7 +2186,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ifm() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2207,7 +2207,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ifm() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2234,7 +2234,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ifm() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2261,7 +2261,7 @@ void m68000_mcu_device::ori_b_imm8_das_ifm() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2283,7 +2283,7 @@ void m68000_mcu_device::ori_b_imm8_das_ifm() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2306,11 +2306,11 @@ void m68000_mcu_device::ori_b_imm8_das_ifm() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2330,7 +2330,7 @@ void m68000_mcu_device::ori_b_imm8_das_ifm() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2357,7 +2357,7 @@ void m68000_mcu_device::ori_b_imm8_das_ifm() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2384,7 +2384,7 @@ void m68000_mcu_device::ori_b_imm8_dais_ifm() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2404,14 +2404,14 @@ void m68000_mcu_device::ori_b_imm8_dais_ifm() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2419,7 +2419,7 @@ void m68000_mcu_device::ori_b_imm8_dais_ifm() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2443,7 +2443,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2469,11 +2469,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -2493,7 +2493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2520,7 +2520,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2546,7 +2546,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ifm() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2571,7 +2571,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ifm() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2594,7 +2594,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ifm() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2615,7 +2615,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ifm() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2642,7 +2642,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ifm() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2668,7 +2668,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2691,7 +2691,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2715,7 +2715,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2738,7 +2738,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2759,7 +2759,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2786,7 +2786,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ifm() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -2812,7 +2812,7 @@ void m68000_mcu_device::ori_imm8_ccr_ifm() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2834,21 +2834,21 @@ void m68000_mcu_device::ori_imm8_ccr_ifm() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -2856,7 +2856,7 @@ void m68000_mcu_device::ori_imm8_ccr_ifm() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2880,11 +2880,11 @@ void m68000_mcu_device::ori_imm8_ccr_ifm() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2918,7 +2918,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ifm() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2941,7 +2941,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ifm() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2949,7 +2949,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ifm() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -2983,7 +2983,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ifm() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3005,11 +3005,11 @@ void m68000_mcu_device::ori_w_imm16_ais_ifm() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3032,7 +3032,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ifm() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3059,7 +3059,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ifm() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3091,7 +3091,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ifm() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3116,12 +3116,12 @@ void m68000_mcu_device::ori_w_imm16_aips_ifm() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3145,7 +3145,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ifm() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3172,7 +3172,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ifm() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3204,7 +3204,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ifm() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3228,7 +3228,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ifm() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3236,7 +3236,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ifm() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3260,7 +3260,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ifm() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3287,7 +3287,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ifm() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3319,7 +3319,7 @@ void m68000_mcu_device::ori_w_imm16_das_ifm() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3341,7 +3341,7 @@ void m68000_mcu_device::ori_w_imm16_das_ifm() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3364,11 +3364,11 @@ void m68000_mcu_device::ori_w_imm16_das_ifm() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3391,7 +3391,7 @@ void m68000_mcu_device::ori_w_imm16_das_ifm() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3418,7 +3418,7 @@ void m68000_mcu_device::ori_w_imm16_das_ifm() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3450,7 +3450,7 @@ void m68000_mcu_device::ori_w_imm16_dais_ifm() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3470,14 +3470,14 @@ void m68000_mcu_device::ori_w_imm16_dais_ifm() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3485,7 +3485,7 @@ void m68000_mcu_device::ori_w_imm16_dais_ifm() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3509,7 +3509,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3535,11 +3535,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3562,7 +3562,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3589,7 +3589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3620,7 +3620,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ifm() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3645,7 +3645,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ifm() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3668,7 +3668,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ifm() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3692,7 +3692,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ifm() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3719,7 +3719,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ifm() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3750,7 +3750,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3773,7 +3773,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3797,7 +3797,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3820,7 +3820,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3844,7 +3844,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3871,7 +3871,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ifm() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -3906,7 +3906,7 @@ void m68000_mcu_device::ori_i16u_sr_ifm() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3928,23 +3928,23 @@ void m68000_mcu_device::ori_i16u_sr_ifm() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3952,7 +3952,7 @@ void m68000_mcu_device::ori_i16u_sr_ifm() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -3976,11 +3976,11 @@ void m68000_mcu_device::ori_i16u_sr_ifm() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4013,7 +4013,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ifm() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4036,7 +4036,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ifm() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4059,12 +4059,12 @@ void m68000_mcu_device::ori_l_imm32_ds_ifm() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4084,7 +4084,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ifm() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4093,7 +4093,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ifm() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4109,7 +4109,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4132,7 +4132,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4154,7 +4154,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4179,7 +4179,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4202,7 +4202,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4227,7 +4227,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4252,7 +4252,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ifm() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4283,7 +4283,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4306,7 +4306,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4328,7 +4328,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4353,11 +4353,11 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4380,7 +4380,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4405,7 +4405,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4430,7 +4430,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ifm() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4461,7 +4461,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4484,7 +4484,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4505,14 +4505,14 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4536,7 +4536,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4559,7 +4559,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4584,7 +4584,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4609,7 +4609,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ifm() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4640,7 +4640,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4663,7 +4663,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4685,7 +4685,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4707,7 +4707,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4732,7 +4732,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4755,7 +4755,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4780,7 +4780,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4805,7 +4805,7 @@ void m68000_mcu_device::ori_l_imm32_das_ifm() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ifm() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4859,7 +4859,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ifm() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4879,14 +4879,14 @@ void m68000_mcu_device::ori_l_imm32_dais_ifm() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -4894,7 +4894,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ifm() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4918,7 +4918,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4943,7 +4943,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4968,7 +4968,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -4991,7 +4991,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5016,7 +5016,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5041,7 +5041,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5071,7 +5071,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5094,7 +5094,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5119,7 +5119,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5142,7 +5142,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5167,7 +5167,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5190,7 +5190,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5215,7 +5215,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5240,7 +5240,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ifm() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5270,7 +5270,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5293,7 +5293,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5316,7 +5316,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5340,7 +5340,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5363,7 +5363,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5388,7 +5388,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5411,7 +5411,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5436,7 +5436,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5461,7 +5461,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ifm() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -5496,13 +5496,13 @@ void m68000_mcu_device::btst_dd_ds_ifm() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5531,7 +5531,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5544,7 +5544,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -5562,7 +5562,7 @@ void m68000_mcu_device::movep_w_das_dd_ifm() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5584,7 +5584,7 @@ void m68000_mcu_device::movep_w_das_dd_ifm() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5603,7 +5603,7 @@ void m68000_mcu_device::movep_w_das_dd_ifm() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5625,7 +5625,7 @@ void m68000_mcu_device::movep_w_das_dd_ifm() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5658,11 +5658,11 @@ void m68000_mcu_device::btst_dd_ais_ifm() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5682,13 +5682,13 @@ void m68000_mcu_device::btst_dd_ais_ifm() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5724,12 +5724,12 @@ void m68000_mcu_device::btst_dd_aips_ifm() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5750,13 +5750,13 @@ void m68000_mcu_device::btst_dd_aips_ifm() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5791,7 +5791,7 @@ void m68000_mcu_device::btst_dd_pais_ifm() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -5799,7 +5799,7 @@ void m68000_mcu_device::btst_dd_pais_ifm() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -5820,13 +5820,13 @@ void m68000_mcu_device::btst_dd_pais_ifm() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5859,7 +5859,7 @@ void m68000_mcu_device::btst_dd_das_ifm() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5882,11 +5882,11 @@ void m68000_mcu_device::btst_dd_das_ifm() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -5906,13 +5906,13 @@ void m68000_mcu_device::btst_dd_das_ifm() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5943,14 +5943,14 @@ void m68000_mcu_device::btst_dd_dais_ifm() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5958,7 +5958,7 @@ void m68000_mcu_device::btst_dd_dais_ifm() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -5982,7 +5982,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6008,11 +6008,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6032,13 +6032,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6073,7 +6073,7 @@ void m68000_mcu_device::btst_dd_adr16_ifm() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6096,7 +6096,7 @@ void m68000_mcu_device::btst_dd_adr16_ifm() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6117,13 +6117,13 @@ void m68000_mcu_device::btst_dd_adr16_ifm() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6156,7 +6156,7 @@ void m68000_mcu_device::btst_dd_adr32_ifm() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6180,7 +6180,7 @@ void m68000_mcu_device::btst_dd_adr32_ifm() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6203,7 +6203,7 @@ void m68000_mcu_device::btst_dd_adr32_ifm() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6224,13 +6224,13 @@ void m68000_mcu_device::btst_dd_adr32_ifm() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6262,7 +6262,7 @@ void m68000_mcu_device::btst_dd_dpc_ifm() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6285,11 +6285,11 @@ void m68000_mcu_device::btst_dd_dpc_ifm() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6309,13 +6309,13 @@ void m68000_mcu_device::btst_dd_dpc_ifm() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6345,14 +6345,14 @@ void m68000_mcu_device::btst_dd_dpci_ifm() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6360,7 +6360,7 @@ void m68000_mcu_device::btst_dd_dpci_ifm() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6384,7 +6384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6410,11 +6410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6434,13 +6434,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6475,7 +6475,7 @@ void m68000_mcu_device::btst_dd_imm_ifm() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6500,12 +6500,12 @@ void m68000_mcu_device::btst_dd_imm_ifm() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6534,7 +6534,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6547,7 +6547,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -6569,13 +6569,13 @@ void m68000_mcu_device::bchg_dd_ds_ifm() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6604,7 +6604,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6616,14 +6616,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6641,7 +6641,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6663,7 +6663,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6681,7 +6681,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6700,7 +6700,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6719,7 +6719,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6741,7 +6741,7 @@ void m68000_mcu_device::movep_l_das_dd_ifm() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -6774,11 +6774,11 @@ void m68000_mcu_device::bchg_dd_ais_ifm() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -6799,7 +6799,7 @@ void m68000_mcu_device::bchg_dd_ais_ifm() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6824,7 +6824,7 @@ void m68000_mcu_device::bchg_dd_ais_ifm() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6855,12 +6855,12 @@ void m68000_mcu_device::bchg_dd_aips_ifm() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6882,7 +6882,7 @@ void m68000_mcu_device::bchg_dd_aips_ifm() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6907,7 +6907,7 @@ void m68000_mcu_device::bchg_dd_aips_ifm() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -6937,7 +6937,7 @@ void m68000_mcu_device::bchg_dd_pais_ifm() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6945,7 +6945,7 @@ void m68000_mcu_device::bchg_dd_pais_ifm() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6967,7 +6967,7 @@ void m68000_mcu_device::bchg_dd_pais_ifm() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6992,7 +6992,7 @@ void m68000_mcu_device::bchg_dd_pais_ifm() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7020,7 +7020,7 @@ void m68000_mcu_device::bchg_dd_das_ifm() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7043,11 +7043,11 @@ void m68000_mcu_device::bchg_dd_das_ifm() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7068,7 +7068,7 @@ void m68000_mcu_device::bchg_dd_das_ifm() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7093,7 +7093,7 @@ void m68000_mcu_device::bchg_dd_das_ifm() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7119,14 +7119,14 @@ void m68000_mcu_device::bchg_dd_dais_ifm() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7134,7 +7134,7 @@ void m68000_mcu_device::bchg_dd_dais_ifm() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7158,7 +7158,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7184,11 +7184,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7209,7 +7209,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7234,7 +7234,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7264,7 +7264,7 @@ void m68000_mcu_device::bchg_dd_adr16_ifm() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7287,7 +7287,7 @@ void m68000_mcu_device::bchg_dd_adr16_ifm() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,7 +7309,7 @@ void m68000_mcu_device::bchg_dd_adr16_ifm() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7334,7 +7334,7 @@ void m68000_mcu_device::bchg_dd_adr16_ifm() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7362,7 +7362,7 @@ void m68000_mcu_device::bchg_dd_adr32_ifm() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7386,7 +7386,7 @@ void m68000_mcu_device::bchg_dd_adr32_ifm() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7409,7 +7409,7 @@ void m68000_mcu_device::bchg_dd_adr32_ifm() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7431,7 +7431,7 @@ void m68000_mcu_device::bchg_dd_adr32_ifm() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7456,7 +7456,7 @@ void m68000_mcu_device::bchg_dd_adr32_ifm() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7488,13 +7488,13 @@ void m68000_mcu_device::bclr_dd_ds_ifm() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7520,14 +7520,14 @@ void m68000_mcu_device::bclr_dd_ds_ifm() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7539,18 +7539,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7568,7 +7568,7 @@ void m68000_mcu_device::movep_w_dd_das_ifm() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7592,7 +7592,7 @@ void m68000_mcu_device::movep_w_dd_das_ifm() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7608,7 +7608,7 @@ void m68000_mcu_device::movep_w_dd_das_ifm() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -7625,11 +7625,11 @@ void m68000_mcu_device::movep_w_dd_das_ifm() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7662,11 +7662,11 @@ void m68000_mcu_device::bclr_dd_ais_ifm() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7686,12 +7686,12 @@ void m68000_mcu_device::bclr_dd_ais_ifm() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7716,7 +7716,7 @@ void m68000_mcu_device::bclr_dd_ais_ifm() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7747,12 +7747,12 @@ void m68000_mcu_device::bclr_dd_aips_ifm() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7773,12 +7773,12 @@ void m68000_mcu_device::bclr_dd_aips_ifm() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7803,7 +7803,7 @@ void m68000_mcu_device::bclr_dd_aips_ifm() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7833,7 +7833,7 @@ void m68000_mcu_device::bclr_dd_pais_ifm() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7841,7 +7841,7 @@ void m68000_mcu_device::bclr_dd_pais_ifm() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7862,12 +7862,12 @@ void m68000_mcu_device::bclr_dd_pais_ifm() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7892,7 +7892,7 @@ void m68000_mcu_device::bclr_dd_pais_ifm() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7920,7 +7920,7 @@ void m68000_mcu_device::bclr_dd_das_ifm() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -7943,11 +7943,11 @@ void m68000_mcu_device::bclr_dd_das_ifm() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -7967,12 +7967,12 @@ void m68000_mcu_device::bclr_dd_das_ifm() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7997,7 +7997,7 @@ void m68000_mcu_device::bclr_dd_das_ifm() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8023,14 +8023,14 @@ void m68000_mcu_device::bclr_dd_dais_ifm() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8038,7 +8038,7 @@ void m68000_mcu_device::bclr_dd_dais_ifm() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8062,7 +8062,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8088,11 +8088,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8112,12 +8112,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8142,7 +8142,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8172,7 +8172,7 @@ void m68000_mcu_device::bclr_dd_adr16_ifm() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8195,7 +8195,7 @@ void m68000_mcu_device::bclr_dd_adr16_ifm() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8216,12 +8216,12 @@ void m68000_mcu_device::bclr_dd_adr16_ifm() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8246,7 +8246,7 @@ void m68000_mcu_device::bclr_dd_adr16_ifm() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8274,7 +8274,7 @@ void m68000_mcu_device::bclr_dd_adr32_ifm() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8298,7 +8298,7 @@ void m68000_mcu_device::bclr_dd_adr32_ifm() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8321,7 +8321,7 @@ void m68000_mcu_device::bclr_dd_adr32_ifm() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8342,12 +8342,12 @@ void m68000_mcu_device::bclr_dd_adr32_ifm() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8372,7 +8372,7 @@ void m68000_mcu_device::bclr_dd_adr32_ifm() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8404,13 +8404,13 @@ void m68000_mcu_device::bset_dd_ds_ifm() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8439,7 +8439,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8451,14 +8451,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8476,7 +8476,7 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8499,7 +8499,7 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8515,7 +8515,7 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8532,7 +8532,7 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8548,7 +8548,7 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -8565,11 +8565,11 @@ void m68000_mcu_device::movep_l_dd_das_ifm() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8602,11 +8602,11 @@ void m68000_mcu_device::bset_dd_ais_ifm() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8627,7 +8627,7 @@ void m68000_mcu_device::bset_dd_ais_ifm() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8652,7 +8652,7 @@ void m68000_mcu_device::bset_dd_ais_ifm() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8683,12 +8683,12 @@ void m68000_mcu_device::bset_dd_aips_ifm() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8710,7 +8710,7 @@ void m68000_mcu_device::bset_dd_aips_ifm() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8735,7 +8735,7 @@ void m68000_mcu_device::bset_dd_aips_ifm() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8765,7 +8765,7 @@ void m68000_mcu_device::bset_dd_pais_ifm() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8773,7 +8773,7 @@ void m68000_mcu_device::bset_dd_pais_ifm() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8795,7 +8795,7 @@ void m68000_mcu_device::bset_dd_pais_ifm() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8820,7 +8820,7 @@ void m68000_mcu_device::bset_dd_pais_ifm() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8848,7 +8848,7 @@ void m68000_mcu_device::bset_dd_das_ifm() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8871,11 +8871,11 @@ void m68000_mcu_device::bset_dd_das_ifm() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -8896,7 +8896,7 @@ void m68000_mcu_device::bset_dd_das_ifm() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8921,7 +8921,7 @@ void m68000_mcu_device::bset_dd_das_ifm() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8947,14 +8947,14 @@ void m68000_mcu_device::bset_dd_dais_ifm() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8962,7 +8962,7 @@ void m68000_mcu_device::bset_dd_dais_ifm() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -8986,7 +8986,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9012,11 +9012,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9037,7 +9037,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9062,7 +9062,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9092,7 +9092,7 @@ void m68000_mcu_device::bset_dd_adr16_ifm() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9115,7 +9115,7 @@ void m68000_mcu_device::bset_dd_adr16_ifm() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9137,7 +9137,7 @@ void m68000_mcu_device::bset_dd_adr16_ifm() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9162,7 +9162,7 @@ void m68000_mcu_device::bset_dd_adr16_ifm() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9190,7 +9190,7 @@ void m68000_mcu_device::bset_dd_adr32_ifm() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9214,7 +9214,7 @@ void m68000_mcu_device::bset_dd_adr32_ifm() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9237,7 +9237,7 @@ void m68000_mcu_device::bset_dd_adr32_ifm() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9259,7 +9259,7 @@ void m68000_mcu_device::bset_dd_adr32_ifm() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9284,7 +9284,7 @@ void m68000_mcu_device::bset_dd_adr32_ifm() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9313,7 +9313,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ifm() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9336,7 +9336,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ifm() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -9344,7 +9344,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ifm() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9378,7 +9378,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ifm() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9400,11 +9400,11 @@ void m68000_mcu_device::andi_b_imm8_ais_ifm() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9424,7 +9424,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ifm() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9451,7 +9451,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ifm() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9478,7 +9478,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ifm() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9503,12 +9503,12 @@ void m68000_mcu_device::andi_b_imm8_aips_ifm() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9529,7 +9529,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ifm() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9556,7 +9556,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ifm() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9583,7 +9583,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ifm() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9607,7 +9607,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ifm() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9615,7 +9615,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ifm() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9636,7 +9636,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ifm() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9663,7 +9663,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ifm() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9690,7 +9690,7 @@ void m68000_mcu_device::andi_b_imm8_das_ifm() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9712,7 +9712,7 @@ void m68000_mcu_device::andi_b_imm8_das_ifm() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9735,11 +9735,11 @@ void m68000_mcu_device::andi_b_imm8_das_ifm() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9759,7 +9759,7 @@ void m68000_mcu_device::andi_b_imm8_das_ifm() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9786,7 +9786,7 @@ void m68000_mcu_device::andi_b_imm8_das_ifm() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9813,7 +9813,7 @@ void m68000_mcu_device::andi_b_imm8_dais_ifm() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9833,14 +9833,14 @@ void m68000_mcu_device::andi_b_imm8_dais_ifm() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9848,7 +9848,7 @@ void m68000_mcu_device::andi_b_imm8_dais_ifm() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9872,7 +9872,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -9898,11 +9898,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -9922,7 +9922,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -9949,7 +9949,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -9975,7 +9975,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ifm() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10000,7 +10000,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ifm() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10023,7 +10023,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ifm() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10044,7 +10044,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ifm() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10071,7 +10071,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ifm() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10097,7 +10097,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10120,7 +10120,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10144,7 +10144,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10167,7 +10167,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10188,7 +10188,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10215,7 +10215,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ifm() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -10241,7 +10241,7 @@ void m68000_mcu_device::andi_imm8_ccr_ifm() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10263,21 +10263,21 @@ void m68000_mcu_device::andi_imm8_ccr_ifm() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -10285,7 +10285,7 @@ void m68000_mcu_device::andi_imm8_ccr_ifm() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10309,11 +10309,11 @@ void m68000_mcu_device::andi_imm8_ccr_ifm() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10347,7 +10347,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ifm() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10370,7 +10370,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ifm() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10378,7 +10378,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ifm() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10412,7 +10412,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ifm() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10434,11 +10434,11 @@ void m68000_mcu_device::andi_w_imm16_ais_ifm() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10461,7 +10461,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ifm() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10488,7 +10488,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ifm() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10520,7 +10520,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ifm() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10545,12 +10545,12 @@ void m68000_mcu_device::andi_w_imm16_aips_ifm() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -10574,7 +10574,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ifm() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10601,7 +10601,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ifm() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10633,7 +10633,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ifm() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10657,7 +10657,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ifm() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10665,7 +10665,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ifm() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -10689,7 +10689,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ifm() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10716,7 +10716,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ifm() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10748,7 +10748,7 @@ void m68000_mcu_device::andi_w_imm16_das_ifm() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10770,7 +10770,7 @@ void m68000_mcu_device::andi_w_imm16_das_ifm() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10793,11 +10793,11 @@ void m68000_mcu_device::andi_w_imm16_das_ifm() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10820,7 +10820,7 @@ void m68000_mcu_device::andi_w_imm16_das_ifm() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10847,7 +10847,7 @@ void m68000_mcu_device::andi_w_imm16_das_ifm() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -10879,7 +10879,7 @@ void m68000_mcu_device::andi_w_imm16_dais_ifm() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10899,14 +10899,14 @@ void m68000_mcu_device::andi_w_imm16_dais_ifm() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10914,7 +10914,7 @@ void m68000_mcu_device::andi_w_imm16_dais_ifm() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10938,7 +10938,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10964,11 +10964,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -10991,7 +10991,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11018,7 +11018,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11049,7 +11049,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ifm() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11074,7 +11074,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ifm() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11097,7 +11097,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ifm() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11121,7 +11121,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ifm() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11148,7 +11148,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ifm() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11179,7 +11179,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11202,7 +11202,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11226,7 +11226,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11249,7 +11249,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11273,7 +11273,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11300,7 +11300,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ifm() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11335,7 +11335,7 @@ void m68000_mcu_device::andi_i16u_sr_ifm() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11357,23 +11357,23 @@ void m68000_mcu_device::andi_i16u_sr_ifm() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11381,7 +11381,7 @@ void m68000_mcu_device::andi_i16u_sr_ifm() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11405,11 +11405,11 @@ void m68000_mcu_device::andi_i16u_sr_ifm() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11442,7 +11442,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ifm() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11465,7 +11465,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ifm() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11488,12 +11488,12 @@ void m68000_mcu_device::andi_l_imm32_ds_ifm() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11513,7 +11513,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ifm() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -11522,7 +11522,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ifm() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -11538,7 +11538,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11561,7 +11561,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11583,7 +11583,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11608,7 +11608,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11631,7 +11631,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11656,7 +11656,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11681,7 +11681,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ifm() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11712,7 +11712,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11757,7 +11757,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11782,11 +11782,11 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11809,7 +11809,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11834,7 +11834,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -11859,7 +11859,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ifm() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -11890,7 +11890,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11913,7 +11913,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11934,14 +11934,14 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11965,7 +11965,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -11988,7 +11988,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12013,7 +12013,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12038,7 +12038,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ifm() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12069,7 +12069,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12092,7 +12092,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12114,7 +12114,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12136,7 +12136,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12161,7 +12161,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12184,7 +12184,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12209,7 +12209,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12234,7 +12234,7 @@ void m68000_mcu_device::andi_l_imm32_das_ifm() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12265,7 +12265,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ifm() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12288,7 +12288,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ifm() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12308,14 +12308,14 @@ void m68000_mcu_device::andi_l_imm32_dais_ifm() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -12323,7 +12323,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ifm() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12347,7 +12347,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12372,7 +12372,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12397,7 +12397,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12420,7 +12420,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12445,7 +12445,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12470,7 +12470,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12500,7 +12500,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12523,7 +12523,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12548,7 +12548,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12571,7 +12571,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12596,7 +12596,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12619,7 +12619,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12644,7 +12644,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12669,7 +12669,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ifm() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12699,7 +12699,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12722,7 +12722,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12745,7 +12745,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12769,7 +12769,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12792,7 +12792,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12817,7 +12817,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -12840,7 +12840,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12865,7 +12865,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -12890,7 +12890,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ifm() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -12944,7 +12944,7 @@ void m68000_mcu_device::subi_b_imm8_ds_ifm() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13006,7 +13006,7 @@ void m68000_mcu_device::subi_b_imm8_ais_ifm() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13029,7 +13029,7 @@ void m68000_mcu_device::subi_b_imm8_ais_ifm() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13109,7 +13109,7 @@ void m68000_mcu_device::subi_b_imm8_aips_ifm() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13130,7 +13130,7 @@ void m68000_mcu_device::subi_b_imm8_aips_ifm() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13212,7 +13212,7 @@ void m68000_mcu_device::subi_b_imm8_pais_ifm() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13233,7 +13233,7 @@ void m68000_mcu_device::subi_b_imm8_pais_ifm() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13329,7 +13329,7 @@ void m68000_mcu_device::subi_b_imm8_das_ifm() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13352,7 +13352,7 @@ void m68000_mcu_device::subi_b_imm8_das_ifm() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13424,7 +13424,7 @@ void m68000_mcu_device::subi_b_imm8_dais_ifm() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -13486,7 +13486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13509,7 +13509,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13606,7 +13606,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_ifm() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13627,7 +13627,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_ifm() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13745,7 +13745,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_ifm() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -13766,7 +13766,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_ifm() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13841,7 +13841,7 @@ void m68000_mcu_device::subi_w_imm16_ds_ifm() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -13903,7 +13903,7 @@ void m68000_mcu_device::subi_w_imm16_ais_ifm() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -13929,7 +13929,7 @@ void m68000_mcu_device::subi_w_imm16_ais_ifm() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14014,7 +14014,7 @@ void m68000_mcu_device::subi_w_imm16_aips_ifm() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14038,7 +14038,7 @@ void m68000_mcu_device::subi_w_imm16_aips_ifm() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14125,7 +14125,7 @@ void m68000_mcu_device::subi_w_imm16_pais_ifm() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14149,7 +14149,7 @@ void m68000_mcu_device::subi_w_imm16_pais_ifm() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14250,7 +14250,7 @@ void m68000_mcu_device::subi_w_imm16_das_ifm() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14276,7 +14276,7 @@ void m68000_mcu_device::subi_w_imm16_das_ifm() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_mcu_device::subi_w_imm16_dais_ifm() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -14415,7 +14415,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14441,7 +14441,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14543,7 +14543,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_ifm() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14567,7 +14567,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_ifm() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14690,7 +14690,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_ifm() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14714,7 +14714,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_ifm() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14815,7 +14815,7 @@ void m68000_mcu_device::subi_l_imm32_ds_ifm() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -14839,7 +14839,7 @@ void m68000_mcu_device::subi_l_imm32_ds_ifm() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -14906,7 +14906,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ifm() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14953,7 +14953,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ifm() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14978,7 +14978,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ifm() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15076,7 +15076,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ifm() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15126,7 +15126,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ifm() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15151,7 +15151,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ifm() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15248,7 +15248,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ifm() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -15300,7 +15300,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ifm() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15325,7 +15325,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ifm() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15444,7 +15444,7 @@ void m68000_mcu_device::subi_l_imm32_das_ifm() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15491,7 +15491,7 @@ void m68000_mcu_device::subi_l_imm32_das_ifm() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15516,7 +15516,7 @@ void m68000_mcu_device::subi_l_imm32_das_ifm() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15612,7 +15612,7 @@ void m68000_mcu_device::subi_l_imm32_dais_ifm() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -15673,7 +15673,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15720,7 +15720,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15745,7 +15745,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -15866,7 +15866,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ifm() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -15913,7 +15913,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ifm() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15938,7 +15938,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ifm() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16080,7 +16080,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ifm() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -16127,7 +16127,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ifm() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16152,7 +16152,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ifm() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -16230,7 +16230,7 @@ void m68000_mcu_device::addi_b_imm8_ds_ifm() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16292,7 +16292,7 @@ void m68000_mcu_device::addi_b_imm8_ais_ifm() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16315,7 +16315,7 @@ void m68000_mcu_device::addi_b_imm8_ais_ifm() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16395,7 +16395,7 @@ void m68000_mcu_device::addi_b_imm8_aips_ifm() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16416,7 +16416,7 @@ void m68000_mcu_device::addi_b_imm8_aips_ifm() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16498,7 +16498,7 @@ void m68000_mcu_device::addi_b_imm8_pais_ifm() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16519,7 +16519,7 @@ void m68000_mcu_device::addi_b_imm8_pais_ifm() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16615,7 +16615,7 @@ void m68000_mcu_device::addi_b_imm8_das_ifm() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16638,7 +16638,7 @@ void m68000_mcu_device::addi_b_imm8_das_ifm() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16710,7 +16710,7 @@ void m68000_mcu_device::addi_b_imm8_dais_ifm() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16772,7 +16772,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16795,7 +16795,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16892,7 +16892,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_ifm() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -16913,7 +16913,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_ifm() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17031,7 +17031,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_ifm() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -17052,7 +17052,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_ifm() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17127,7 +17127,7 @@ void m68000_mcu_device::addi_w_imm16_ds_ifm() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17189,7 +17189,7 @@ void m68000_mcu_device::addi_w_imm16_ais_ifm() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17215,7 +17215,7 @@ void m68000_mcu_device::addi_w_imm16_ais_ifm() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17300,7 +17300,7 @@ void m68000_mcu_device::addi_w_imm16_aips_ifm() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17324,7 +17324,7 @@ void m68000_mcu_device::addi_w_imm16_aips_ifm() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17411,7 +17411,7 @@ void m68000_mcu_device::addi_w_imm16_pais_ifm() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17435,7 +17435,7 @@ void m68000_mcu_device::addi_w_imm16_pais_ifm() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17536,7 +17536,7 @@ void m68000_mcu_device::addi_w_imm16_das_ifm() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17562,7 +17562,7 @@ void m68000_mcu_device::addi_w_imm16_das_ifm() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17639,7 +17639,7 @@ void m68000_mcu_device::addi_w_imm16_dais_ifm() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17701,7 +17701,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17727,7 +17727,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17829,7 +17829,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_ifm() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -17853,7 +17853,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_ifm() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17976,7 +17976,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_ifm() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18000,7 +18000,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_ifm() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18101,7 +18101,7 @@ void m68000_mcu_device::addi_l_imm32_ds_ifm() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -18125,7 +18125,7 @@ void m68000_mcu_device::addi_l_imm32_ds_ifm() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -18192,7 +18192,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ifm() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18239,7 +18239,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ifm() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18264,7 +18264,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ifm() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18362,7 +18362,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ifm() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18412,7 +18412,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ifm() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18437,7 +18437,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ifm() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18534,7 +18534,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ifm() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -18586,7 +18586,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ifm() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18611,7 +18611,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ifm() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18730,7 +18730,7 @@ void m68000_mcu_device::addi_l_imm32_das_ifm() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -18777,7 +18777,7 @@ void m68000_mcu_device::addi_l_imm32_das_ifm() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18802,7 +18802,7 @@ void m68000_mcu_device::addi_l_imm32_das_ifm() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18898,7 +18898,7 @@ void m68000_mcu_device::addi_l_imm32_dais_ifm() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -18959,7 +18959,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19006,7 +19006,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19031,7 +19031,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19152,7 +19152,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ifm() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19199,7 +19199,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ifm() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19224,7 +19224,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ifm() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19366,7 +19366,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ifm() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -19413,7 +19413,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ifm() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19438,7 +19438,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ifm() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19494,7 +19494,7 @@ void m68000_mcu_device::btst_imm8_ds_ifm() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19520,13 +19520,13 @@ void m68000_mcu_device::btst_imm8_ds_ifm() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -19555,7 +19555,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19568,7 +19568,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -19587,7 +19587,7 @@ void m68000_mcu_device::btst_imm8_ais_ifm() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19609,11 +19609,11 @@ void m68000_mcu_device::btst_imm8_ais_ifm() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19633,13 +19633,13 @@ void m68000_mcu_device::btst_imm8_ais_ifm() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19673,7 +19673,7 @@ void m68000_mcu_device::btst_imm8_aips_ifm() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19698,12 +19698,12 @@ void m68000_mcu_device::btst_imm8_aips_ifm() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19724,13 +19724,13 @@ void m68000_mcu_device::btst_imm8_aips_ifm() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19764,7 +19764,7 @@ void m68000_mcu_device::btst_imm8_pais_ifm() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19788,7 +19788,7 @@ void m68000_mcu_device::btst_imm8_pais_ifm() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -19796,7 +19796,7 @@ void m68000_mcu_device::btst_imm8_pais_ifm() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -19817,13 +19817,13 @@ void m68000_mcu_device::btst_imm8_pais_ifm() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19857,7 +19857,7 @@ void m68000_mcu_device::btst_imm8_das_ifm() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19879,7 +19879,7 @@ void m68000_mcu_device::btst_imm8_das_ifm() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19902,11 +19902,11 @@ void m68000_mcu_device::btst_imm8_das_ifm() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -19926,13 +19926,13 @@ void m68000_mcu_device::btst_imm8_das_ifm() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19966,7 +19966,7 @@ void m68000_mcu_device::btst_imm8_dais_ifm() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -19986,14 +19986,14 @@ void m68000_mcu_device::btst_imm8_dais_ifm() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20001,7 +20001,7 @@ void m68000_mcu_device::btst_imm8_dais_ifm() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20025,7 +20025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20051,11 +20051,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20075,13 +20075,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20114,7 +20114,7 @@ void m68000_mcu_device::btst_imm8_adr16_ifm() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20139,7 +20139,7 @@ void m68000_mcu_device::btst_imm8_adr16_ifm() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20162,7 +20162,7 @@ void m68000_mcu_device::btst_imm8_adr16_ifm() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20183,13 +20183,13 @@ void m68000_mcu_device::btst_imm8_adr16_ifm() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20222,7 +20222,7 @@ void m68000_mcu_device::btst_imm8_adr32_ifm() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20245,7 +20245,7 @@ void m68000_mcu_device::btst_imm8_adr32_ifm() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20269,7 +20269,7 @@ void m68000_mcu_device::btst_imm8_adr32_ifm() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20292,7 +20292,7 @@ void m68000_mcu_device::btst_imm8_adr32_ifm() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20313,13 +20313,13 @@ void m68000_mcu_device::btst_imm8_adr32_ifm() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20352,7 +20352,7 @@ void m68000_mcu_device::btst_imm8_dpc_ifm() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20374,7 +20374,7 @@ void m68000_mcu_device::btst_imm8_dpc_ifm() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20397,11 +20397,11 @@ void m68000_mcu_device::btst_imm8_dpc_ifm() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20421,13 +20421,13 @@ void m68000_mcu_device::btst_imm8_dpc_ifm() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20460,7 +20460,7 @@ void m68000_mcu_device::btst_imm8_dpci_ifm() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20480,14 +20480,14 @@ void m68000_mcu_device::btst_imm8_dpci_ifm() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -20495,7 +20495,7 @@ void m68000_mcu_device::btst_imm8_dpci_ifm() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20519,7 +20519,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20545,11 +20545,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20569,13 +20569,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20609,7 +20609,7 @@ void m68000_mcu_device::bchg_imm8_ds_ifm() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20635,13 +20635,13 @@ void m68000_mcu_device::bchg_imm8_ds_ifm() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20670,7 +20670,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20682,14 +20682,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -20708,7 +20708,7 @@ void m68000_mcu_device::bchg_imm8_ais_ifm() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20730,11 +20730,11 @@ void m68000_mcu_device::bchg_imm8_ais_ifm() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -20755,7 +20755,7 @@ void m68000_mcu_device::bchg_imm8_ais_ifm() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20780,7 +20780,7 @@ void m68000_mcu_device::bchg_imm8_ais_ifm() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20809,7 +20809,7 @@ void m68000_mcu_device::bchg_imm8_aips_ifm() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20834,12 +20834,12 @@ void m68000_mcu_device::bchg_imm8_aips_ifm() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20861,7 +20861,7 @@ void m68000_mcu_device::bchg_imm8_aips_ifm() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20886,7 +20886,7 @@ void m68000_mcu_device::bchg_imm8_aips_ifm() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -20915,7 +20915,7 @@ void m68000_mcu_device::bchg_imm8_pais_ifm() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -20939,7 +20939,7 @@ void m68000_mcu_device::bchg_imm8_pais_ifm() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -20947,7 +20947,7 @@ void m68000_mcu_device::bchg_imm8_pais_ifm() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -20969,7 +20969,7 @@ void m68000_mcu_device::bchg_imm8_pais_ifm() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -20994,7 +20994,7 @@ void m68000_mcu_device::bchg_imm8_pais_ifm() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21023,7 +21023,7 @@ void m68000_mcu_device::bchg_imm8_das_ifm() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21045,7 +21045,7 @@ void m68000_mcu_device::bchg_imm8_das_ifm() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21068,11 +21068,11 @@ void m68000_mcu_device::bchg_imm8_das_ifm() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21093,7 +21093,7 @@ void m68000_mcu_device::bchg_imm8_das_ifm() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21118,7 +21118,7 @@ void m68000_mcu_device::bchg_imm8_das_ifm() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21147,7 +21147,7 @@ void m68000_mcu_device::bchg_imm8_dais_ifm() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21167,14 +21167,14 @@ void m68000_mcu_device::bchg_imm8_dais_ifm() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -21182,7 +21182,7 @@ void m68000_mcu_device::bchg_imm8_dais_ifm() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21206,7 +21206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21232,11 +21232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21257,7 +21257,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21282,7 +21282,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21310,7 +21310,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ifm() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21335,7 +21335,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ifm() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21358,7 +21358,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ifm() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21380,7 +21380,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ifm() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21405,7 +21405,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ifm() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21433,7 +21433,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21456,7 +21456,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21480,7 +21480,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21503,7 +21503,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21525,7 +21525,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21550,7 +21550,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ifm() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21579,7 +21579,7 @@ void m68000_mcu_device::bclr_imm8_ds_ifm() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21605,13 +21605,13 @@ void m68000_mcu_device::bclr_imm8_ds_ifm() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21637,14 +21637,14 @@ void m68000_mcu_device::bclr_imm8_ds_ifm() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21656,18 +21656,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -21686,7 +21686,7 @@ void m68000_mcu_device::bclr_imm8_ais_ifm() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21708,11 +21708,11 @@ void m68000_mcu_device::bclr_imm8_ais_ifm() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -21732,12 +21732,12 @@ void m68000_mcu_device::bclr_imm8_ais_ifm() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21762,7 +21762,7 @@ void m68000_mcu_device::bclr_imm8_ais_ifm() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21791,7 +21791,7 @@ void m68000_mcu_device::bclr_imm8_aips_ifm() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21816,12 +21816,12 @@ void m68000_mcu_device::bclr_imm8_aips_ifm() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21842,12 +21842,12 @@ void m68000_mcu_device::bclr_imm8_aips_ifm() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21872,7 +21872,7 @@ void m68000_mcu_device::bclr_imm8_aips_ifm() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -21901,7 +21901,7 @@ void m68000_mcu_device::bclr_imm8_pais_ifm() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -21925,7 +21925,7 @@ void m68000_mcu_device::bclr_imm8_pais_ifm() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -21933,7 +21933,7 @@ void m68000_mcu_device::bclr_imm8_pais_ifm() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -21954,12 +21954,12 @@ void m68000_mcu_device::bclr_imm8_pais_ifm() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -21984,7 +21984,7 @@ void m68000_mcu_device::bclr_imm8_pais_ifm() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22013,7 +22013,7 @@ void m68000_mcu_device::bclr_imm8_das_ifm() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22035,7 +22035,7 @@ void m68000_mcu_device::bclr_imm8_das_ifm() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22058,11 +22058,11 @@ void m68000_mcu_device::bclr_imm8_das_ifm() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22082,12 +22082,12 @@ void m68000_mcu_device::bclr_imm8_das_ifm() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22112,7 +22112,7 @@ void m68000_mcu_device::bclr_imm8_das_ifm() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22141,7 +22141,7 @@ void m68000_mcu_device::bclr_imm8_dais_ifm() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22161,14 +22161,14 @@ void m68000_mcu_device::bclr_imm8_dais_ifm() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22176,7 +22176,7 @@ void m68000_mcu_device::bclr_imm8_dais_ifm() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22200,7 +22200,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22226,11 +22226,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22250,12 +22250,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22280,7 +22280,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22308,7 +22308,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ifm() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22333,7 +22333,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ifm() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22356,7 +22356,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ifm() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22377,12 +22377,12 @@ void m68000_mcu_device::bclr_imm8_adr16_ifm() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22407,7 +22407,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ifm() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22435,7 +22435,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22458,7 +22458,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22482,7 +22482,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22505,7 +22505,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22526,12 +22526,12 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22556,7 +22556,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ifm() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22585,7 +22585,7 @@ void m68000_mcu_device::bset_imm8_ds_ifm() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22611,13 +22611,13 @@ void m68000_mcu_device::bset_imm8_ds_ifm() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22646,7 +22646,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22658,14 +22658,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22684,7 +22684,7 @@ void m68000_mcu_device::bset_imm8_ais_ifm() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22706,11 +22706,11 @@ void m68000_mcu_device::bset_imm8_ais_ifm() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -22731,7 +22731,7 @@ void m68000_mcu_device::bset_imm8_ais_ifm() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22756,7 +22756,7 @@ void m68000_mcu_device::bset_imm8_ais_ifm() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22785,7 +22785,7 @@ void m68000_mcu_device::bset_imm8_aips_ifm() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22810,12 +22810,12 @@ void m68000_mcu_device::bset_imm8_aips_ifm() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22837,7 +22837,7 @@ void m68000_mcu_device::bset_imm8_aips_ifm() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22862,7 +22862,7 @@ void m68000_mcu_device::bset_imm8_aips_ifm() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22891,7 +22891,7 @@ void m68000_mcu_device::bset_imm8_pais_ifm() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -22915,7 +22915,7 @@ void m68000_mcu_device::bset_imm8_pais_ifm() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22923,7 +22923,7 @@ void m68000_mcu_device::bset_imm8_pais_ifm() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22945,7 +22945,7 @@ void m68000_mcu_device::bset_imm8_pais_ifm() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22970,7 +22970,7 @@ void m68000_mcu_device::bset_imm8_pais_ifm() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -22999,7 +22999,7 @@ void m68000_mcu_device::bset_imm8_das_ifm() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23021,7 +23021,7 @@ void m68000_mcu_device::bset_imm8_das_ifm() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23044,11 +23044,11 @@ void m68000_mcu_device::bset_imm8_das_ifm() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23069,7 +23069,7 @@ void m68000_mcu_device::bset_imm8_das_ifm() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23094,7 +23094,7 @@ void m68000_mcu_device::bset_imm8_das_ifm() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23123,7 +23123,7 @@ void m68000_mcu_device::bset_imm8_dais_ifm() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23143,14 +23143,14 @@ void m68000_mcu_device::bset_imm8_dais_ifm() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23158,7 +23158,7 @@ void m68000_mcu_device::bset_imm8_dais_ifm() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23182,7 +23182,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23208,11 +23208,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23233,7 +23233,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23258,7 +23258,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23286,7 +23286,7 @@ void m68000_mcu_device::bset_imm8_adr16_ifm() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23311,7 +23311,7 @@ void m68000_mcu_device::bset_imm8_adr16_ifm() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23334,7 +23334,7 @@ void m68000_mcu_device::bset_imm8_adr16_ifm() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23356,7 +23356,7 @@ void m68000_mcu_device::bset_imm8_adr16_ifm() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23381,7 +23381,7 @@ void m68000_mcu_device::bset_imm8_adr16_ifm() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23409,7 +23409,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23432,7 +23432,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23456,7 +23456,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23479,7 +23479,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23501,7 +23501,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23526,7 +23526,7 @@ void m68000_mcu_device::bset_imm8_adr32_ifm() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23555,7 +23555,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ifm() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23578,7 +23578,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ifm() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -23586,7 +23586,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ifm() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23620,7 +23620,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ifm() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23642,11 +23642,11 @@ void m68000_mcu_device::eori_b_imm8_ais_ifm() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -23666,7 +23666,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ifm() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23693,7 +23693,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ifm() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23720,7 +23720,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ifm() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23745,12 +23745,12 @@ void m68000_mcu_device::eori_b_imm8_aips_ifm() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23771,7 +23771,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ifm() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23798,7 +23798,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ifm() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23825,7 +23825,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ifm() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23849,7 +23849,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ifm() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23857,7 +23857,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ifm() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23878,7 +23878,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ifm() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23905,7 +23905,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ifm() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -23932,7 +23932,7 @@ void m68000_mcu_device::eori_b_imm8_das_ifm() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23954,7 +23954,7 @@ void m68000_mcu_device::eori_b_imm8_das_ifm() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -23977,11 +23977,11 @@ void m68000_mcu_device::eori_b_imm8_das_ifm() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24001,7 +24001,7 @@ void m68000_mcu_device::eori_b_imm8_das_ifm() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24028,7 +24028,7 @@ void m68000_mcu_device::eori_b_imm8_das_ifm() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24055,7 +24055,7 @@ void m68000_mcu_device::eori_b_imm8_dais_ifm() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24075,14 +24075,14 @@ void m68000_mcu_device::eori_b_imm8_dais_ifm() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24090,7 +24090,7 @@ void m68000_mcu_device::eori_b_imm8_dais_ifm() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24114,7 +24114,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24140,11 +24140,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -24164,7 +24164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24191,7 +24191,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24217,7 +24217,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ifm() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24242,7 +24242,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ifm() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24265,7 +24265,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ifm() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24286,7 +24286,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ifm() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24313,7 +24313,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ifm() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24339,7 +24339,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24362,7 +24362,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24386,7 +24386,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24409,7 +24409,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24430,7 +24430,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24457,7 +24457,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ifm() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -24483,7 +24483,7 @@ void m68000_mcu_device::eori_imm8_ccr_ifm() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24505,21 +24505,21 @@ void m68000_mcu_device::eori_imm8_ccr_ifm() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -24527,7 +24527,7 @@ void m68000_mcu_device::eori_imm8_ccr_ifm() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24551,11 +24551,11 @@ void m68000_mcu_device::eori_imm8_ccr_ifm() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24589,7 +24589,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ifm() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24612,7 +24612,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ifm() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -24620,7 +24620,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ifm() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24654,7 +24654,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ifm() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24676,11 +24676,11 @@ void m68000_mcu_device::eori_w_imm16_ais_ifm() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24703,7 +24703,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ifm() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24730,7 +24730,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ifm() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24762,7 +24762,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ifm() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24787,12 +24787,12 @@ void m68000_mcu_device::eori_w_imm16_aips_ifm() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -24816,7 +24816,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ifm() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24843,7 +24843,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ifm() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24875,7 +24875,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ifm() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -24899,7 +24899,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ifm() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24907,7 +24907,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ifm() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -24931,7 +24931,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ifm() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24958,7 +24958,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ifm() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -24990,7 +24990,7 @@ void m68000_mcu_device::eori_w_imm16_das_ifm() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25012,7 +25012,7 @@ void m68000_mcu_device::eori_w_imm16_das_ifm() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25035,11 +25035,11 @@ void m68000_mcu_device::eori_w_imm16_das_ifm() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25062,7 +25062,7 @@ void m68000_mcu_device::eori_w_imm16_das_ifm() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25089,7 +25089,7 @@ void m68000_mcu_device::eori_w_imm16_das_ifm() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25121,7 +25121,7 @@ void m68000_mcu_device::eori_w_imm16_dais_ifm() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25141,14 +25141,14 @@ void m68000_mcu_device::eori_w_imm16_dais_ifm() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25156,7 +25156,7 @@ void m68000_mcu_device::eori_w_imm16_dais_ifm() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25180,7 +25180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25206,11 +25206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25233,7 +25233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25260,7 +25260,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25291,7 +25291,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ifm() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25316,7 +25316,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ifm() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25339,7 +25339,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ifm() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25363,7 +25363,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ifm() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25390,7 +25390,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ifm() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25421,7 +25421,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25444,7 +25444,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25468,7 +25468,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25491,7 +25491,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25515,7 +25515,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25542,7 +25542,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ifm() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25577,7 +25577,7 @@ void m68000_mcu_device::eori_i16u_sr_ifm() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25599,23 +25599,23 @@ void m68000_mcu_device::eori_i16u_sr_ifm() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -25623,7 +25623,7 @@ void m68000_mcu_device::eori_i16u_sr_ifm() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25647,11 +25647,11 @@ void m68000_mcu_device::eori_i16u_sr_ifm() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25684,7 +25684,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ifm() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25707,7 +25707,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ifm() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25730,12 +25730,12 @@ void m68000_mcu_device::eori_l_imm32_ds_ifm() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25755,7 +25755,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ifm() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -25764,7 +25764,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ifm() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -25780,7 +25780,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25803,7 +25803,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25825,7 +25825,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -25850,7 +25850,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25873,7 +25873,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25898,7 +25898,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -25923,7 +25923,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ifm() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -25954,7 +25954,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25977,7 +25977,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -25999,7 +25999,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26024,11 +26024,11 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26051,7 +26051,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26076,7 +26076,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26101,7 +26101,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ifm() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26132,7 +26132,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26155,7 +26155,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26176,14 +26176,14 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26207,7 +26207,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26230,7 +26230,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26255,7 +26255,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26280,7 +26280,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ifm() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26311,7 +26311,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26334,7 +26334,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26356,7 +26356,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26378,7 +26378,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26403,7 +26403,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26426,7 +26426,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26451,7 +26451,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26476,7 +26476,7 @@ void m68000_mcu_device::eori_l_imm32_das_ifm() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26507,7 +26507,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ifm() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26530,7 +26530,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ifm() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26550,14 +26550,14 @@ void m68000_mcu_device::eori_l_imm32_dais_ifm() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -26565,7 +26565,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ifm() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26589,7 +26589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26614,7 +26614,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26639,7 +26639,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26662,7 +26662,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26687,7 +26687,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26712,7 +26712,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26742,7 +26742,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26765,7 +26765,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26790,7 +26790,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26813,7 +26813,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -26838,7 +26838,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26861,7 +26861,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26886,7 +26886,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -26911,7 +26911,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ifm() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -26941,7 +26941,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26964,7 +26964,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -26987,7 +26987,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -27011,7 +27011,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27034,7 +27034,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -27059,7 +27059,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -27082,7 +27082,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27107,7 +27107,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -27132,7 +27132,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ifm() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -27186,7 +27186,7 @@ void m68000_mcu_device::cmpi_b_imm8_ds_ifm() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -27247,7 +27247,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_ifm() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27270,7 +27270,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_ifm() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27336,7 +27336,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_ifm() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27357,7 +27357,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_ifm() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27425,7 +27425,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_ifm() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27446,7 +27446,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_ifm() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27528,7 +27528,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_ifm() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27551,7 +27551,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_ifm() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27609,7 +27609,7 @@ void m68000_mcu_device::cmpi_b_imm8_dais_ifm() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -27671,7 +27671,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -27694,7 +27694,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27777,7 +27777,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_ifm() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27798,7 +27798,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_ifm() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27902,7 +27902,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_ifm() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27923,7 +27923,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_ifm() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -27984,7 +27984,7 @@ void m68000_mcu_device::cmpi_w_imm16_ds_ifm() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -28045,7 +28045,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_ifm() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28071,7 +28071,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_ifm() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28137,7 +28137,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_ifm() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28161,7 +28161,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_ifm() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28229,7 +28229,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_ifm() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28253,7 +28253,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_ifm() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28335,7 +28335,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_ifm() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28361,7 +28361,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_ifm() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28419,7 +28419,7 @@ void m68000_mcu_device::cmpi_w_imm16_dais_ifm() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -28481,7 +28481,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -28507,7 +28507,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28590,7 +28590,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_ifm() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28614,7 +28614,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_ifm() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28718,7 +28718,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_ifm() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28742,7 +28742,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_ifm() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -28825,11 +28825,11 @@ void m68000_mcu_device::cmpi_l_imm32_ds_ifm() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28912,7 +28912,7 @@ void m68000_mcu_device::cmpi_l_imm32_ais_ifm() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28959,13 +28959,13 @@ void m68000_mcu_device::cmpi_l_imm32_ais_ifm() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29043,7 +29043,7 @@ void m68000_mcu_device::cmpi_l_imm32_aips_ifm() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29093,13 +29093,13 @@ void m68000_mcu_device::cmpi_l_imm32_aips_ifm() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29176,7 +29176,7 @@ void m68000_mcu_device::cmpi_l_imm32_pais_ifm() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -29228,13 +29228,13 @@ void m68000_mcu_device::cmpi_l_imm32_pais_ifm() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29333,7 +29333,7 @@ void m68000_mcu_device::cmpi_l_imm32_das_ifm() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29380,13 +29380,13 @@ void m68000_mcu_device::cmpi_l_imm32_das_ifm() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29462,7 +29462,7 @@ void m68000_mcu_device::cmpi_l_imm32_dais_ifm() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -29523,7 +29523,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29570,13 +29570,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29677,7 +29677,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_ifm() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29724,13 +29724,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_ifm() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29852,7 +29852,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_ifm() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29899,13 +29899,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_ifm() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29943,7 +29943,7 @@ void m68000_mcu_device::move_b_ds_dd_ifm() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -29983,7 +29983,7 @@ void m68000_mcu_device::move_b_ais_dd_ifm() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30007,7 +30007,7 @@ void m68000_mcu_device::move_b_ais_dd_ifm() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30051,7 +30051,7 @@ void m68000_mcu_device::move_b_aips_dd_ifm() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30073,7 +30073,7 @@ void m68000_mcu_device::move_b_aips_dd_ifm() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30119,7 +30119,7 @@ void m68000_mcu_device::move_b_pais_dd_ifm() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30141,7 +30141,7 @@ void m68000_mcu_device::move_b_pais_dd_ifm() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30201,7 +30201,7 @@ void m68000_mcu_device::move_b_das_dd_ifm() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30225,7 +30225,7 @@ void m68000_mcu_device::move_b_das_dd_ifm() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30261,7 +30261,7 @@ void m68000_mcu_device::move_b_dais_dd_ifm() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30323,7 +30323,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30347,7 +30347,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30408,7 +30408,7 @@ void m68000_mcu_device::move_b_adr16_dd_ifm() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30430,7 +30430,7 @@ void m68000_mcu_device::move_b_adr16_dd_ifm() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30512,7 +30512,7 @@ void m68000_mcu_device::move_b_adr32_dd_ifm() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -30534,7 +30534,7 @@ void m68000_mcu_device::move_b_adr32_dd_ifm() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30593,7 +30593,7 @@ void m68000_mcu_device::move_b_dpc_dd_ifm() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30617,7 +30617,7 @@ void m68000_mcu_device::move_b_dpc_dd_ifm() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30652,7 +30652,7 @@ void m68000_mcu_device::move_b_dpci_dd_ifm() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -30714,7 +30714,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -30738,7 +30738,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -30802,7 +30802,7 @@ void m68000_mcu_device::move_b_imm8_dd_ifm() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -30845,7 +30845,7 @@ void m68000_mcu_device::move_b_ds_aid_ifm() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30898,7 +30898,7 @@ void m68000_mcu_device::move_b_ais_aid_ifm() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -30921,7 +30921,7 @@ void m68000_mcu_device::move_b_ais_aid_ifm() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -30980,7 +30980,7 @@ void m68000_mcu_device::move_b_aips_aid_ifm() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31001,7 +31001,7 @@ void m68000_mcu_device::move_b_aips_aid_ifm() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31062,7 +31062,7 @@ void m68000_mcu_device::move_b_pais_aid_ifm() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31083,7 +31083,7 @@ void m68000_mcu_device::move_b_pais_aid_ifm() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31158,7 +31158,7 @@ void m68000_mcu_device::move_b_das_aid_ifm() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31181,7 +31181,7 @@ void m68000_mcu_device::move_b_das_aid_ifm() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31232,7 +31232,7 @@ void m68000_mcu_device::move_b_dais_aid_ifm() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31294,7 +31294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31317,7 +31317,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31393,7 +31393,7 @@ void m68000_mcu_device::move_b_adr16_aid_ifm() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31414,7 +31414,7 @@ void m68000_mcu_device::move_b_adr16_aid_ifm() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31511,7 +31511,7 @@ void m68000_mcu_device::move_b_adr32_aid_ifm() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -31532,7 +31532,7 @@ void m68000_mcu_device::move_b_adr32_aid_ifm() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68000_mcu_device::move_b_dpc_aid_ifm() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31629,7 +31629,7 @@ void m68000_mcu_device::move_b_dpc_aid_ifm() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31679,7 +31679,7 @@ void m68000_mcu_device::move_b_dpci_aid_ifm() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31741,7 +31741,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31764,7 +31764,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31843,7 +31843,7 @@ void m68000_mcu_device::move_b_imm8_aid_ifm() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31899,7 +31899,7 @@ void m68000_mcu_device::move_b_ds_aipd_ifm() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -31951,7 +31951,7 @@ void m68000_mcu_device::move_b_ais_aipd_ifm() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -31975,7 +31975,7 @@ void m68000_mcu_device::move_b_ais_aipd_ifm() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32033,7 +32033,7 @@ void m68000_mcu_device::move_b_aips_aipd_ifm() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32055,7 +32055,7 @@ void m68000_mcu_device::move_b_aips_aipd_ifm() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32115,7 +32115,7 @@ void m68000_mcu_device::move_b_pais_aipd_ifm() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32137,7 +32137,7 @@ void m68000_mcu_device::move_b_pais_aipd_ifm() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32211,7 +32211,7 @@ void m68000_mcu_device::move_b_das_aipd_ifm() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32235,7 +32235,7 @@ void m68000_mcu_device::move_b_das_aipd_ifm() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32285,7 +32285,7 @@ void m68000_mcu_device::move_b_dais_aipd_ifm() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32347,7 +32347,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32371,7 +32371,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32446,7 +32446,7 @@ void m68000_mcu_device::move_b_adr16_aipd_ifm() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32468,7 +32468,7 @@ void m68000_mcu_device::move_b_adr16_aipd_ifm() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32564,7 +32564,7 @@ void m68000_mcu_device::move_b_adr32_aipd_ifm() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -32586,7 +32586,7 @@ void m68000_mcu_device::move_b_adr32_aipd_ifm() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32659,7 +32659,7 @@ void m68000_mcu_device::move_b_dpc_aipd_ifm() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32683,7 +32683,7 @@ void m68000_mcu_device::move_b_dpc_aipd_ifm() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32732,7 +32732,7 @@ void m68000_mcu_device::move_b_dpci_aipd_ifm() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32794,7 +32794,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -32818,7 +32818,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32896,7 +32896,7 @@ void m68000_mcu_device::move_b_imm8_aipd_ifm() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -32950,7 +32950,7 @@ void m68000_mcu_device::move_b_ds_paid_ifm() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33003,7 +33003,7 @@ void m68000_mcu_device::move_b_ais_paid_ifm() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33026,7 +33026,7 @@ void m68000_mcu_device::move_b_ais_paid_ifm() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33085,7 +33085,7 @@ void m68000_mcu_device::move_b_aips_paid_ifm() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33106,7 +33106,7 @@ void m68000_mcu_device::move_b_aips_paid_ifm() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33167,7 +33167,7 @@ void m68000_mcu_device::move_b_pais_paid_ifm() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33188,7 +33188,7 @@ void m68000_mcu_device::move_b_pais_paid_ifm() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33263,7 +33263,7 @@ void m68000_mcu_device::move_b_das_paid_ifm() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33286,7 +33286,7 @@ void m68000_mcu_device::move_b_das_paid_ifm() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33337,7 +33337,7 @@ void m68000_mcu_device::move_b_dais_paid_ifm() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33399,7 +33399,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33422,7 +33422,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33498,7 +33498,7 @@ void m68000_mcu_device::move_b_adr16_paid_ifm() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33519,7 +33519,7 @@ void m68000_mcu_device::move_b_adr16_paid_ifm() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33616,7 +33616,7 @@ void m68000_mcu_device::move_b_adr32_paid_ifm() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -33637,7 +33637,7 @@ void m68000_mcu_device::move_b_adr32_paid_ifm() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33711,7 +33711,7 @@ void m68000_mcu_device::move_b_dpc_paid_ifm() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33734,7 +33734,7 @@ void m68000_mcu_device::move_b_dpc_paid_ifm() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33784,7 +33784,7 @@ void m68000_mcu_device::move_b_dpci_paid_ifm() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -33846,7 +33846,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -33869,7 +33869,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33947,7 +33947,7 @@ void m68000_mcu_device::move_b_imm8_paid_ifm() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34023,7 +34023,7 @@ void m68000_mcu_device::move_b_ds_dad_ifm() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -34077,7 +34077,7 @@ void m68000_mcu_device::move_b_ais_dad_ifm() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34099,7 +34099,7 @@ void m68000_mcu_device::move_b_ais_dad_ifm() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34185,7 +34185,7 @@ void m68000_mcu_device::move_b_aips_dad_ifm() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34205,7 +34205,7 @@ void m68000_mcu_device::move_b_aips_dad_ifm() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34293,7 +34293,7 @@ void m68000_mcu_device::move_b_pais_dad_ifm() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34313,7 +34313,7 @@ void m68000_mcu_device::move_b_pais_dad_ifm() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34415,7 +34415,7 @@ void m68000_mcu_device::move_b_das_dad_ifm() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34437,7 +34437,7 @@ void m68000_mcu_device::move_b_das_dad_ifm() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34515,7 +34515,7 @@ void m68000_mcu_device::move_b_dais_dad_ifm() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34577,7 +34577,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34599,7 +34599,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34702,7 +34702,7 @@ void m68000_mcu_device::move_b_adr16_dad_ifm() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34722,7 +34722,7 @@ void m68000_mcu_device::move_b_adr16_dad_ifm() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34846,7 +34846,7 @@ void m68000_mcu_device::move_b_adr32_dad_ifm() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -34866,7 +34866,7 @@ void m68000_mcu_device::move_b_adr32_dad_ifm() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34967,7 +34967,7 @@ void m68000_mcu_device::move_b_dpc_dad_ifm() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -34989,7 +34989,7 @@ void m68000_mcu_device::move_b_dpc_dad_ifm() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35066,7 +35066,7 @@ void m68000_mcu_device::move_b_dpci_dad_ifm() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35128,7 +35128,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35150,7 +35150,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35276,7 +35276,7 @@ void m68000_mcu_device::move_b_imm8_dad_ifm() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35328,7 +35328,7 @@ void m68000_mcu_device::move_b_ds_daid_ifm() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -35392,7 +35392,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35446,7 +35446,7 @@ void m68000_mcu_device::move_b_ais_daid_ifm() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35465,7 +35465,7 @@ void m68000_mcu_device::move_b_ais_daid_ifm() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35480,7 +35480,7 @@ void m68000_mcu_device::move_b_ais_daid_ifm() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35504,7 +35504,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35592,7 +35592,7 @@ void m68000_mcu_device::move_b_aips_daid_ifm() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35609,7 +35609,7 @@ void m68000_mcu_device::move_b_aips_daid_ifm() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35624,7 +35624,7 @@ void m68000_mcu_device::move_b_aips_daid_ifm() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35648,7 +35648,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35738,7 +35738,7 @@ void m68000_mcu_device::move_b_pais_daid_ifm() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -35755,7 +35755,7 @@ void m68000_mcu_device::move_b_pais_daid_ifm() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35770,7 +35770,7 @@ void m68000_mcu_device::move_b_pais_daid_ifm() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35794,7 +35794,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35898,7 +35898,7 @@ void m68000_mcu_device::move_b_das_daid_ifm() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35917,7 +35917,7 @@ void m68000_mcu_device::move_b_das_daid_ifm() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -35932,7 +35932,7 @@ void m68000_mcu_device::move_b_das_daid_ifm() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35956,7 +35956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36036,7 +36036,7 @@ void m68000_mcu_device::move_b_dais_daid_ifm() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36098,7 +36098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36117,7 +36117,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36132,7 +36132,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36156,7 +36156,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36261,7 +36261,7 @@ void m68000_mcu_device::move_b_adr16_daid_ifm() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36278,7 +36278,7 @@ void m68000_mcu_device::move_b_adr16_daid_ifm() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36293,7 +36293,7 @@ void m68000_mcu_device::move_b_adr16_daid_ifm() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36317,7 +36317,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36443,7 +36443,7 @@ void m68000_mcu_device::move_b_adr32_daid_ifm() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -36460,7 +36460,7 @@ void m68000_mcu_device::move_b_adr32_daid_ifm() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36475,7 +36475,7 @@ void m68000_mcu_device::move_b_adr32_daid_ifm() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36499,7 +36499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36602,7 +36602,7 @@ void m68000_mcu_device::move_b_dpc_daid_ifm() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36621,7 +36621,7 @@ void m68000_mcu_device::move_b_dpc_daid_ifm() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36636,7 +36636,7 @@ void m68000_mcu_device::move_b_dpc_daid_ifm() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36660,7 +36660,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36739,7 +36739,7 @@ void m68000_mcu_device::move_b_dpci_daid_ifm() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36801,7 +36801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36820,7 +36820,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -36835,7 +36835,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36859,7 +36859,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36962,7 +36962,7 @@ void m68000_mcu_device::move_b_imm8_daid_ifm() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -37026,7 +37026,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37081,7 +37081,7 @@ void m68000_mcu_device::move_b_ds_adr16_ifm() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37160,7 +37160,7 @@ void m68000_mcu_device::move_b_ais_adr16_ifm() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37182,7 +37182,7 @@ void m68000_mcu_device::move_b_ais_adr16_ifm() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37267,7 +37267,7 @@ void m68000_mcu_device::move_b_aips_adr16_ifm() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37287,7 +37287,7 @@ void m68000_mcu_device::move_b_aips_adr16_ifm() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37374,7 +37374,7 @@ void m68000_mcu_device::move_b_pais_adr16_ifm() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37394,7 +37394,7 @@ void m68000_mcu_device::move_b_pais_adr16_ifm() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37495,7 +37495,7 @@ void m68000_mcu_device::move_b_das_adr16_ifm() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37517,7 +37517,7 @@ void m68000_mcu_device::move_b_das_adr16_ifm() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37594,7 +37594,7 @@ void m68000_mcu_device::move_b_dais_adr16_ifm() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37656,7 +37656,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37678,7 +37678,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37780,7 +37780,7 @@ void m68000_mcu_device::move_b_adr16_adr16_ifm() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37800,7 +37800,7 @@ void m68000_mcu_device::move_b_adr16_adr16_ifm() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37923,7 +37923,7 @@ void m68000_mcu_device::move_b_adr32_adr16_ifm() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -37943,7 +37943,7 @@ void m68000_mcu_device::move_b_adr32_adr16_ifm() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38043,7 +38043,7 @@ void m68000_mcu_device::move_b_dpc_adr16_ifm() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38065,7 +38065,7 @@ void m68000_mcu_device::move_b_dpc_adr16_ifm() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38141,7 +38141,7 @@ void m68000_mcu_device::move_b_dpc_adr16_ifm() // 11fa ffff
void m68000_mcu_device::move_b_dpci_adr16_ifm() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38203,7 +38203,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38225,7 +38225,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38329,7 +38329,7 @@ void m68000_mcu_device::move_b_imm8_adr16_ifm() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38431,7 +38431,7 @@ void m68000_mcu_device::move_b_ds_adr32_ifm() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38510,7 +38510,7 @@ void m68000_mcu_device::move_b_ais_adr32_ifm() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38532,7 +38532,7 @@ void m68000_mcu_device::move_b_ais_adr32_ifm() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38637,7 +38637,7 @@ void m68000_mcu_device::move_b_aips_adr32_ifm() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38657,7 +38657,7 @@ void m68000_mcu_device::move_b_aips_adr32_ifm() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38764,7 +38764,7 @@ void m68000_mcu_device::move_b_pais_adr32_ifm() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -38784,7 +38784,7 @@ void m68000_mcu_device::move_b_pais_adr32_ifm() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38905,7 +38905,7 @@ void m68000_mcu_device::move_b_das_adr32_ifm() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38927,7 +38927,7 @@ void m68000_mcu_device::move_b_das_adr32_ifm() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39024,7 +39024,7 @@ void m68000_mcu_device::move_b_dais_adr32_ifm() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39086,7 +39086,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39108,7 +39108,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39230,7 +39230,7 @@ void m68000_mcu_device::move_b_adr16_adr32_ifm() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39250,7 +39250,7 @@ void m68000_mcu_device::move_b_adr16_adr32_ifm() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39393,7 +39393,7 @@ void m68000_mcu_device::move_b_adr32_adr32_ifm() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -39413,7 +39413,7 @@ void m68000_mcu_device::move_b_adr32_adr32_ifm() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39533,7 +39533,7 @@ void m68000_mcu_device::move_b_dpc_adr32_ifm() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39555,7 +39555,7 @@ void m68000_mcu_device::move_b_dpc_adr32_ifm() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39651,7 +39651,7 @@ void m68000_mcu_device::move_b_dpc_adr32_ifm() // 13fa ffff
void m68000_mcu_device::move_b_dpci_adr32_ifm() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39713,7 +39713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39735,7 +39735,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39880,7 +39880,7 @@ void m68000_mcu_device::move_b_imm8_adr32_ifm() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39963,13 +39963,13 @@ void m68000_mcu_device::move_l_ds_dd_ifm() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -40008,14 +40008,14 @@ void m68000_mcu_device::move_l_as_dd_ifm() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40050,7 +40050,7 @@ void m68000_mcu_device::move_l_ais_dd_ifm() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40098,14 +40098,14 @@ void m68000_mcu_device::move_l_ais_dd_ifm() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40140,7 +40140,7 @@ void m68000_mcu_device::move_l_aips_dd_ifm() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40191,14 +40191,14 @@ void m68000_mcu_device::move_l_aips_dd_ifm() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68000_mcu_device::move_l_pais_dd_ifm() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -40285,14 +40285,14 @@ void m68000_mcu_device::move_l_pais_dd_ifm() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40348,7 +40348,7 @@ void m68000_mcu_device::move_l_das_dd_ifm() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40396,14 +40396,14 @@ void m68000_mcu_device::move_l_das_dd_ifm() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40436,7 +40436,7 @@ void m68000_mcu_device::move_l_dais_dd_ifm() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -40497,7 +40497,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40545,14 +40545,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40610,7 +40610,7 @@ void m68000_mcu_device::move_l_adr16_dd_ifm() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40658,14 +40658,14 @@ void m68000_mcu_device::move_l_adr16_dd_ifm() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40744,7 +40744,7 @@ void m68000_mcu_device::move_l_adr32_dd_ifm() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -40792,14 +40792,14 @@ void m68000_mcu_device::move_l_adr32_dd_ifm() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40854,7 +40854,7 @@ void m68000_mcu_device::move_l_dpc_dd_ifm() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -40902,14 +40902,14 @@ void m68000_mcu_device::move_l_dpc_dd_ifm() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40941,7 +40941,7 @@ void m68000_mcu_device::move_l_dpci_dd_ifm() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41002,7 +41002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41050,14 +41050,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41139,14 +41139,14 @@ void m68000_mcu_device::move_l_imm32_dd_ifm() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41184,13 +41184,13 @@ void m68000_mcu_device::movea_l_ds_ad_ifm() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41227,12 +41227,12 @@ void m68000_mcu_device::movea_l_as_ad_ifm() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41267,7 +41267,7 @@ void m68000_mcu_device::movea_l_ais_ad_ifm() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41315,13 +41315,13 @@ void m68000_mcu_device::movea_l_ais_ad_ifm() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41355,7 +41355,7 @@ void m68000_mcu_device::movea_l_aips_ad_ifm() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41406,13 +41406,13 @@ void m68000_mcu_device::movea_l_aips_ad_ifm() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41445,7 +41445,7 @@ void m68000_mcu_device::movea_l_pais_ad_ifm() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -41498,13 +41498,13 @@ void m68000_mcu_device::movea_l_pais_ad_ifm() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41559,7 +41559,7 @@ void m68000_mcu_device::movea_l_das_ad_ifm() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41607,13 +41607,13 @@ void m68000_mcu_device::movea_l_das_ad_ifm() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41645,7 +41645,7 @@ void m68000_mcu_device::movea_l_dais_ad_ifm() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -41706,7 +41706,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41754,13 +41754,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41817,7 +41817,7 @@ void m68000_mcu_device::movea_l_adr16_ad_ifm() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41865,13 +41865,13 @@ void m68000_mcu_device::movea_l_adr16_ad_ifm() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -41949,7 +41949,7 @@ void m68000_mcu_device::movea_l_adr32_ad_ifm() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -41997,13 +41997,13 @@ void m68000_mcu_device::movea_l_adr32_ad_ifm() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42057,7 +42057,7 @@ void m68000_mcu_device::movea_l_dpc_ad_ifm() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42105,13 +42105,13 @@ void m68000_mcu_device::movea_l_dpc_ad_ifm() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42142,7 +42142,7 @@ void m68000_mcu_device::movea_l_dpci_ad_ifm() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -42203,7 +42203,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42251,13 +42251,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42338,13 +42338,13 @@ void m68000_mcu_device::movea_l_imm32_ad_ifm() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -42402,7 +42402,7 @@ void m68000_mcu_device::move_l_ds_aid_ifm() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42427,7 +42427,7 @@ void m68000_mcu_device::move_l_ds_aid_ifm() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42486,7 +42486,7 @@ void m68000_mcu_device::move_l_as_aid_ifm() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42511,7 +42511,7 @@ void m68000_mcu_device::move_l_as_aid_ifm() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42546,7 +42546,7 @@ void m68000_mcu_device::move_l_ais_aid_ifm() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -42593,7 +42593,7 @@ void m68000_mcu_device::move_l_ais_aid_ifm() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42617,7 +42617,7 @@ void m68000_mcu_device::move_l_ais_aid_ifm() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42675,7 +42675,7 @@ void m68000_mcu_device::move_l_aips_aid_ifm() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -42725,7 +42725,7 @@ void m68000_mcu_device::move_l_aips_aid_ifm() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42749,7 +42749,7 @@ void m68000_mcu_device::move_l_aips_aid_ifm() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42806,7 +42806,7 @@ void m68000_mcu_device::move_l_pais_aid_ifm() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -42858,7 +42858,7 @@ void m68000_mcu_device::move_l_pais_aid_ifm() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42882,7 +42882,7 @@ void m68000_mcu_device::move_l_pais_aid_ifm() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -42961,7 +42961,7 @@ void m68000_mcu_device::move_l_das_aid_ifm() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43008,7 +43008,7 @@ void m68000_mcu_device::move_l_das_aid_ifm() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43032,7 +43032,7 @@ void m68000_mcu_device::move_l_das_aid_ifm() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43088,7 +43088,7 @@ void m68000_mcu_device::move_l_dais_aid_ifm() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43149,7 +43149,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43196,7 +43196,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43220,7 +43220,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43301,7 +43301,7 @@ void m68000_mcu_device::move_l_adr16_aid_ifm() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43348,7 +43348,7 @@ void m68000_mcu_device::move_l_adr16_aid_ifm() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43372,7 +43372,7 @@ void m68000_mcu_device::move_l_adr16_aid_ifm() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43474,7 +43474,7 @@ void m68000_mcu_device::move_l_adr32_aid_ifm() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -43521,7 +43521,7 @@ void m68000_mcu_device::move_l_adr32_aid_ifm() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43545,7 +43545,7 @@ void m68000_mcu_device::move_l_adr32_aid_ifm() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43623,7 +43623,7 @@ void m68000_mcu_device::move_l_dpc_aid_ifm() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -43670,7 +43670,7 @@ void m68000_mcu_device::move_l_dpc_aid_ifm() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43694,7 +43694,7 @@ void m68000_mcu_device::move_l_dpc_aid_ifm() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -43749,7 +43749,7 @@ void m68000_mcu_device::move_l_dpci_aid_ifm() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -43810,7 +43810,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -43857,7 +43857,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43881,7 +43881,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44007,7 +44007,7 @@ void m68000_mcu_device::move_l_imm32_aid_ifm() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44032,7 +44032,7 @@ void m68000_mcu_device::move_l_imm32_aid_ifm() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44091,7 +44091,7 @@ void m68000_mcu_device::move_l_ds_aipd_ifm() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44116,7 +44116,7 @@ void m68000_mcu_device::move_l_ds_aipd_ifm() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44175,7 +44175,7 @@ void m68000_mcu_device::move_l_as_aipd_ifm() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44200,7 +44200,7 @@ void m68000_mcu_device::move_l_as_aipd_ifm() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44235,7 +44235,7 @@ void m68000_mcu_device::move_l_ais_aipd_ifm() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44282,7 +44282,7 @@ void m68000_mcu_device::move_l_ais_aipd_ifm() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44306,7 +44306,7 @@ void m68000_mcu_device::move_l_ais_aipd_ifm() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44363,7 +44363,7 @@ void m68000_mcu_device::move_l_aips_aipd_ifm() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44413,7 +44413,7 @@ void m68000_mcu_device::move_l_aips_aipd_ifm() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44437,7 +44437,7 @@ void m68000_mcu_device::move_l_aips_aipd_ifm() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44493,7 +44493,7 @@ void m68000_mcu_device::move_l_pais_aipd_ifm() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -44545,7 +44545,7 @@ void m68000_mcu_device::move_l_pais_aipd_ifm() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44569,7 +44569,7 @@ void m68000_mcu_device::move_l_pais_aipd_ifm() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44647,7 +44647,7 @@ void m68000_mcu_device::move_l_das_aipd_ifm() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44694,7 +44694,7 @@ void m68000_mcu_device::move_l_das_aipd_ifm() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44718,7 +44718,7 @@ void m68000_mcu_device::move_l_das_aipd_ifm() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44773,7 +44773,7 @@ void m68000_mcu_device::move_l_dais_aipd_ifm() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44834,7 +44834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -44881,7 +44881,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -44905,7 +44905,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -44985,7 +44985,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ifm() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45032,7 +45032,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ifm() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45056,7 +45056,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ifm() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45157,7 +45157,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ifm() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45204,7 +45204,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ifm() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45228,7 +45228,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ifm() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45305,7 +45305,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ifm() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -45352,7 +45352,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ifm() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45376,7 +45376,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ifm() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45430,7 +45430,7 @@ void m68000_mcu_device::move_l_dpci_aipd_ifm() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -45491,7 +45491,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -45538,7 +45538,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45562,7 +45562,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45687,7 +45687,7 @@ void m68000_mcu_device::move_l_imm32_aipd_ifm() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45712,7 +45712,7 @@ void m68000_mcu_device::move_l_imm32_aipd_ifm() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45749,7 +45749,7 @@ void m68000_mcu_device::move_l_ds_paid_ifm() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45774,7 +45774,7 @@ void m68000_mcu_device::move_l_ds_paid_ifm() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45832,7 +45832,7 @@ void m68000_mcu_device::move_l_as_paid_ifm() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45857,7 +45857,7 @@ void m68000_mcu_device::move_l_as_paid_ifm() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -45913,7 +45913,7 @@ void m68000_mcu_device::move_l_ais_paid_ifm() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -45960,7 +45960,7 @@ void m68000_mcu_device::move_l_ais_paid_ifm() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45985,7 +45985,7 @@ void m68000_mcu_device::move_l_ais_paid_ifm() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46041,7 +46041,7 @@ void m68000_mcu_device::move_l_aips_paid_ifm() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46091,7 +46091,7 @@ void m68000_mcu_device::move_l_aips_paid_ifm() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46116,7 +46116,7 @@ void m68000_mcu_device::move_l_aips_paid_ifm() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46171,7 +46171,7 @@ void m68000_mcu_device::move_l_pais_paid_ifm() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -46223,7 +46223,7 @@ void m68000_mcu_device::move_l_pais_paid_ifm() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46248,7 +46248,7 @@ void m68000_mcu_device::move_l_pais_paid_ifm() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46325,7 +46325,7 @@ void m68000_mcu_device::move_l_das_paid_ifm() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46372,7 +46372,7 @@ void m68000_mcu_device::move_l_das_paid_ifm() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46397,7 +46397,7 @@ void m68000_mcu_device::move_l_das_paid_ifm() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46451,7 +46451,7 @@ void m68000_mcu_device::move_l_dais_paid_ifm() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46512,7 +46512,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46559,7 +46559,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46584,7 +46584,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46663,7 +46663,7 @@ void m68000_mcu_device::move_l_adr16_paid_ifm() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46710,7 +46710,7 @@ void m68000_mcu_device::move_l_adr16_paid_ifm() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46735,7 +46735,7 @@ void m68000_mcu_device::move_l_adr16_paid_ifm() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46835,7 +46835,7 @@ void m68000_mcu_device::move_l_adr32_paid_ifm() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -46882,7 +46882,7 @@ void m68000_mcu_device::move_l_adr32_paid_ifm() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46907,7 +46907,7 @@ void m68000_mcu_device::move_l_adr32_paid_ifm() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -46983,7 +46983,7 @@ void m68000_mcu_device::move_l_dpc_paid_ifm() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -47030,7 +47030,7 @@ void m68000_mcu_device::move_l_dpc_paid_ifm() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47055,7 +47055,7 @@ void m68000_mcu_device::move_l_dpc_paid_ifm() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47108,7 +47108,7 @@ void m68000_mcu_device::move_l_dpci_paid_ifm() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47169,7 +47169,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -47216,7 +47216,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47241,7 +47241,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47343,7 +47343,7 @@ void m68000_mcu_device::move_l_imm32_paid_ifm() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47368,7 +47368,7 @@ void m68000_mcu_device::move_l_imm32_paid_ifm() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47447,7 +47447,7 @@ void m68000_mcu_device::move_l_ds_dad_ifm() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47471,7 +47471,7 @@ void m68000_mcu_device::move_l_ds_dad_ifm() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47496,7 +47496,7 @@ void m68000_mcu_device::move_l_ds_dad_ifm() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47554,7 +47554,7 @@ void m68000_mcu_device::move_l_as_dad_ifm() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47578,7 +47578,7 @@ void m68000_mcu_device::move_l_as_dad_ifm() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47603,7 +47603,7 @@ void m68000_mcu_device::move_l_as_dad_ifm() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47638,7 +47638,7 @@ void m68000_mcu_device::move_l_ais_dad_ifm() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -47684,7 +47684,7 @@ void m68000_mcu_device::move_l_ais_dad_ifm() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47709,7 +47709,7 @@ void m68000_mcu_device::move_l_ais_dad_ifm() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47793,7 +47793,7 @@ void m68000_mcu_device::move_l_aips_dad_ifm() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -47842,7 +47842,7 @@ void m68000_mcu_device::move_l_aips_dad_ifm() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47867,7 +47867,7 @@ void m68000_mcu_device::move_l_aips_dad_ifm() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -47950,7 +47950,7 @@ void m68000_mcu_device::move_l_pais_dad_ifm() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48001,7 +48001,7 @@ void m68000_mcu_device::move_l_pais_dad_ifm() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48026,7 +48026,7 @@ void m68000_mcu_device::move_l_pais_dad_ifm() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48131,7 +48131,7 @@ void m68000_mcu_device::move_l_das_dad_ifm() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48177,7 +48177,7 @@ void m68000_mcu_device::move_l_das_dad_ifm() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48202,7 +48202,7 @@ void m68000_mcu_device::move_l_das_dad_ifm() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48284,7 +48284,7 @@ void m68000_mcu_device::move_l_dais_dad_ifm() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -48345,7 +48345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48391,7 +48391,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48416,7 +48416,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48523,7 +48523,7 @@ void m68000_mcu_device::move_l_adr16_dad_ifm() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48569,7 +48569,7 @@ void m68000_mcu_device::move_l_adr16_dad_ifm() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48594,7 +48594,7 @@ void m68000_mcu_device::move_l_adr16_dad_ifm() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48722,7 +48722,7 @@ void m68000_mcu_device::move_l_adr32_dad_ifm() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -48768,7 +48768,7 @@ void m68000_mcu_device::move_l_adr32_dad_ifm() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48793,7 +48793,7 @@ void m68000_mcu_device::move_l_adr32_dad_ifm() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48897,7 +48897,7 @@ void m68000_mcu_device::move_l_dpc_dad_ifm() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -48943,7 +48943,7 @@ void m68000_mcu_device::move_l_dpc_dad_ifm() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48968,7 +48968,7 @@ void m68000_mcu_device::move_l_dpc_dad_ifm() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49049,7 +49049,7 @@ void m68000_mcu_device::move_l_dpci_dad_ifm() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49110,7 +49110,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -49156,7 +49156,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49181,7 +49181,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49332,7 +49332,7 @@ void m68000_mcu_device::move_l_imm32_dad_ifm() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49356,7 +49356,7 @@ void m68000_mcu_device::move_l_imm32_dad_ifm() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49381,7 +49381,7 @@ void m68000_mcu_device::move_l_imm32_dad_ifm() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49414,7 +49414,7 @@ void m68000_mcu_device::move_l_ds_daid_ifm() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49478,7 +49478,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49502,7 +49502,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49527,7 +49527,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49560,7 +49560,7 @@ void m68000_mcu_device::move_l_as_daid_ifm() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -49624,7 +49624,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49648,7 +49648,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49673,7 +49673,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49708,7 +49708,7 @@ void m68000_mcu_device::move_l_ais_daid_ifm() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -49751,7 +49751,7 @@ void m68000_mcu_device::move_l_ais_daid_ifm() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49766,7 +49766,7 @@ void m68000_mcu_device::move_l_ais_daid_ifm() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49790,7 +49790,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49817,7 +49817,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49901,7 +49901,7 @@ void m68000_mcu_device::move_l_aips_daid_ifm() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -49947,7 +49947,7 @@ void m68000_mcu_device::move_l_aips_daid_ifm() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -49962,7 +49962,7 @@ void m68000_mcu_device::move_l_aips_daid_ifm() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49986,7 +49986,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50013,7 +50013,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50096,7 +50096,7 @@ void m68000_mcu_device::move_l_pais_daid_ifm() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50144,7 +50144,7 @@ void m68000_mcu_device::move_l_pais_daid_ifm() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50159,7 +50159,7 @@ void m68000_mcu_device::move_l_pais_daid_ifm() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50183,7 +50183,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50210,7 +50210,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50315,7 +50315,7 @@ void m68000_mcu_device::move_l_das_daid_ifm() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50358,7 +50358,7 @@ void m68000_mcu_device::move_l_das_daid_ifm() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50373,7 +50373,7 @@ void m68000_mcu_device::move_l_das_daid_ifm() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50397,7 +50397,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50424,7 +50424,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50506,7 +50506,7 @@ void m68000_mcu_device::move_l_dais_daid_ifm() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50567,7 +50567,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50610,7 +50610,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50625,7 +50625,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50649,7 +50649,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50676,7 +50676,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50783,7 +50783,7 @@ void m68000_mcu_device::move_l_adr16_daid_ifm() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -50826,7 +50826,7 @@ void m68000_mcu_device::move_l_adr16_daid_ifm() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -50841,7 +50841,7 @@ void m68000_mcu_device::move_l_adr16_daid_ifm() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50865,7 +50865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50892,7 +50892,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51020,7 +51020,7 @@ void m68000_mcu_device::move_l_adr32_daid_ifm() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -51063,7 +51063,7 @@ void m68000_mcu_device::move_l_adr32_daid_ifm() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51078,7 +51078,7 @@ void m68000_mcu_device::move_l_adr32_daid_ifm() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51102,7 +51102,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51129,7 +51129,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51233,7 +51233,7 @@ void m68000_mcu_device::move_l_dpc_daid_ifm() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -51276,7 +51276,7 @@ void m68000_mcu_device::move_l_dpc_daid_ifm() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51291,7 +51291,7 @@ void m68000_mcu_device::move_l_dpc_daid_ifm() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51315,7 +51315,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51342,7 +51342,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51423,7 +51423,7 @@ void m68000_mcu_device::move_l_dpci_daid_ifm() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51484,7 +51484,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -51527,7 +51527,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -51542,7 +51542,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51566,7 +51566,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51593,7 +51593,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51719,7 +51719,7 @@ void m68000_mcu_device::move_l_imm32_daid_ifm() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -51783,7 +51783,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51807,7 +51807,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51832,7 +51832,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51868,7 +51868,7 @@ void m68000_mcu_device::move_l_ds_adr16_ifm() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51893,7 +51893,7 @@ void m68000_mcu_device::move_l_ds_adr16_ifm() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51978,7 +51978,7 @@ void m68000_mcu_device::move_l_as_adr16_ifm() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52003,7 +52003,7 @@ void m68000_mcu_device::move_l_as_adr16_ifm() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52086,7 +52086,7 @@ void m68000_mcu_device::move_l_ais_adr16_ifm() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52132,7 +52132,7 @@ void m68000_mcu_device::move_l_ais_adr16_ifm() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52157,7 +52157,7 @@ void m68000_mcu_device::move_l_ais_adr16_ifm() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52240,7 +52240,7 @@ void m68000_mcu_device::move_l_aips_adr16_ifm() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52289,7 +52289,7 @@ void m68000_mcu_device::move_l_aips_adr16_ifm() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_mcu_device::move_l_aips_adr16_ifm() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52396,7 +52396,7 @@ void m68000_mcu_device::move_l_pais_adr16_ifm() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52447,7 +52447,7 @@ void m68000_mcu_device::move_l_pais_adr16_ifm() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52472,7 +52472,7 @@ void m68000_mcu_device::move_l_pais_adr16_ifm() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52576,7 +52576,7 @@ void m68000_mcu_device::move_l_das_adr16_ifm() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52622,7 +52622,7 @@ void m68000_mcu_device::move_l_das_adr16_ifm() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52647,7 +52647,7 @@ void m68000_mcu_device::move_l_das_adr16_ifm() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52728,7 +52728,7 @@ void m68000_mcu_device::move_l_dais_adr16_ifm() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52789,7 +52789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -52835,7 +52835,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52860,7 +52860,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52966,7 +52966,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ifm() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -53012,7 +53012,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ifm() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53037,7 +53037,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ifm() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53164,7 +53164,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ifm() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -53210,7 +53210,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ifm() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53235,7 +53235,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ifm() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53338,7 +53338,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ifm() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -53384,7 +53384,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ifm() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53409,7 +53409,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ifm() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53489,7 +53489,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ifm() // 21fa ffff
void m68000_mcu_device::move_l_dpci_adr16_ifm() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53550,7 +53550,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -53596,7 +53596,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53621,7 +53621,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53750,7 +53750,7 @@ void m68000_mcu_device::move_l_imm32_adr16_ifm() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53775,7 +53775,7 @@ void m68000_mcu_device::move_l_imm32_adr16_ifm() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53881,7 +53881,7 @@ void m68000_mcu_device::move_l_ds_adr32_ifm() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53906,7 +53906,7 @@ void m68000_mcu_device::move_l_ds_adr32_ifm() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54012,7 +54012,7 @@ void m68000_mcu_device::move_l_as_adr32_ifm() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54037,7 +54037,7 @@ void m68000_mcu_device::move_l_as_adr32_ifm() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54120,7 +54120,7 @@ void m68000_mcu_device::move_l_ais_adr32_ifm() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54167,7 +54167,7 @@ void m68000_mcu_device::move_l_ais_adr32_ifm() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54190,7 +54190,7 @@ void m68000_mcu_device::move_l_ais_adr32_ifm() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54214,7 +54214,7 @@ void m68000_mcu_device::move_l_ais_adr32_ifm() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54296,7 +54296,7 @@ void m68000_mcu_device::move_l_aips_adr32_ifm() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54346,7 +54346,7 @@ void m68000_mcu_device::move_l_aips_adr32_ifm() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54369,7 +54369,7 @@ void m68000_mcu_device::move_l_aips_adr32_ifm() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54393,7 +54393,7 @@ void m68000_mcu_device::move_l_aips_adr32_ifm() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54474,7 +54474,7 @@ void m68000_mcu_device::move_l_pais_adr32_ifm() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54526,7 +54526,7 @@ void m68000_mcu_device::move_l_pais_adr32_ifm() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54549,7 +54549,7 @@ void m68000_mcu_device::move_l_pais_adr32_ifm() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54573,7 +54573,7 @@ void m68000_mcu_device::move_l_pais_adr32_ifm() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54676,7 +54676,7 @@ void m68000_mcu_device::move_l_das_adr32_ifm() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54723,7 +54723,7 @@ void m68000_mcu_device::move_l_das_adr32_ifm() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54746,7 +54746,7 @@ void m68000_mcu_device::move_l_das_adr32_ifm() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54770,7 +54770,7 @@ void m68000_mcu_device::move_l_das_adr32_ifm() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54850,7 +54850,7 @@ void m68000_mcu_device::move_l_dais_adr32_ifm() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54911,7 +54911,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -54958,7 +54958,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -54981,7 +54981,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55005,7 +55005,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55110,7 +55110,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ifm() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -55157,7 +55157,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ifm() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55180,7 +55180,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ifm() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55204,7 +55204,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ifm() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55330,7 +55330,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ifm() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -55377,7 +55377,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ifm() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55400,7 +55400,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ifm() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55424,7 +55424,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ifm() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55526,7 +55526,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ifm() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55573,7 +55573,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ifm() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55596,7 +55596,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ifm() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55620,7 +55620,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ifm() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55699,7 +55699,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ifm() // 23fa ffff
void m68000_mcu_device::move_l_dpci_adr32_ifm() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55760,7 +55760,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55807,7 +55807,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -55830,7 +55830,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55854,7 +55854,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56003,7 +56003,7 @@ void m68000_mcu_device::move_l_imm32_adr32_ifm() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56028,7 +56028,7 @@ void m68000_mcu_device::move_l_imm32_adr32_ifm() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56115,7 +56115,7 @@ void m68000_mcu_device::move_w_ds_dd_ifm() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56158,7 +56158,7 @@ void m68000_mcu_device::move_w_as_dd_ifm() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -56198,7 +56198,7 @@ void m68000_mcu_device::move_w_ais_dd_ifm() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56225,7 +56225,7 @@ void m68000_mcu_device::move_w_ais_dd_ifm() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56269,7 +56269,7 @@ void m68000_mcu_device::move_w_aips_dd_ifm() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56294,7 +56294,7 @@ void m68000_mcu_device::move_w_aips_dd_ifm() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56340,7 +56340,7 @@ void m68000_mcu_device::move_w_pais_dd_ifm() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56365,7 +56365,7 @@ void m68000_mcu_device::move_w_pais_dd_ifm() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56425,7 +56425,7 @@ void m68000_mcu_device::move_w_das_dd_ifm() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56452,7 +56452,7 @@ void m68000_mcu_device::move_w_das_dd_ifm() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56488,7 +56488,7 @@ void m68000_mcu_device::move_w_dais_dd_ifm() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56550,7 +56550,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56577,7 +56577,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56638,7 +56638,7 @@ void m68000_mcu_device::move_w_adr16_dd_ifm() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56663,7 +56663,7 @@ void m68000_mcu_device::move_w_adr16_dd_ifm() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56745,7 +56745,7 @@ void m68000_mcu_device::move_w_adr32_dd_ifm() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -56770,7 +56770,7 @@ void m68000_mcu_device::move_w_adr32_dd_ifm() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56829,7 +56829,7 @@ void m68000_mcu_device::move_w_dpc_dd_ifm() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56856,7 +56856,7 @@ void m68000_mcu_device::move_w_dpc_dd_ifm() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -56891,7 +56891,7 @@ void m68000_mcu_device::move_w_dpci_dd_ifm() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56953,7 +56953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -56980,7 +56980,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -57044,7 +57044,7 @@ void m68000_mcu_device::move_w_imm16_dd_ifm() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -57091,7 +57091,7 @@ void m68000_mcu_device::movea_w_ds_ad_ifm() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -57131,7 +57131,7 @@ void m68000_mcu_device::movea_w_as_ad_ifm() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57166,7 +57166,7 @@ void m68000_mcu_device::movea_w_ais_ad_ifm() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57234,7 +57234,7 @@ void m68000_mcu_device::movea_w_aips_ad_ifm() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57302,7 +57302,7 @@ void m68000_mcu_device::movea_w_pais_ad_ifm() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57384,7 +57384,7 @@ void m68000_mcu_device::movea_w_das_ad_ifm() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57444,7 +57444,7 @@ void m68000_mcu_device::movea_w_dais_ad_ifm() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57506,7 +57506,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57591,7 +57591,7 @@ void m68000_mcu_device::movea_w_adr16_ad_ifm() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57695,7 +57695,7 @@ void m68000_mcu_device::movea_w_adr32_ad_ifm() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -57776,7 +57776,7 @@ void m68000_mcu_device::movea_w_dpc_ad_ifm() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57835,7 +57835,7 @@ void m68000_mcu_device::movea_w_dpci_ad_ifm() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57897,7 +57897,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57989,7 +57989,7 @@ void m68000_mcu_device::movea_w_imm16_ad_ifm() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -58026,7 +58026,7 @@ void m68000_mcu_device::move_w_ds_aid_ifm() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58087,7 +58087,7 @@ void m68000_mcu_device::move_w_as_aid_ifm() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58145,7 +58145,7 @@ void m68000_mcu_device::move_w_ais_aid_ifm() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58171,7 +58171,7 @@ void m68000_mcu_device::move_w_ais_aid_ifm() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58235,7 +58235,7 @@ void m68000_mcu_device::move_w_aips_aid_ifm() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58259,7 +58259,7 @@ void m68000_mcu_device::move_w_aips_aid_ifm() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58325,7 +58325,7 @@ void m68000_mcu_device::move_w_pais_aid_ifm() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58349,7 +58349,7 @@ void m68000_mcu_device::move_w_pais_aid_ifm() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58429,7 +58429,7 @@ void m68000_mcu_device::move_w_das_aid_ifm() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58455,7 +58455,7 @@ void m68000_mcu_device::move_w_das_aid_ifm() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58511,7 +58511,7 @@ void m68000_mcu_device::move_w_dais_aid_ifm() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58573,7 +58573,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58599,7 +58599,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58680,7 +58680,7 @@ void m68000_mcu_device::move_w_adr16_aid_ifm() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58704,7 +58704,7 @@ void m68000_mcu_device::move_w_adr16_aid_ifm() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58806,7 +58806,7 @@ void m68000_mcu_device::move_w_adr32_aid_ifm() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -58830,7 +58830,7 @@ void m68000_mcu_device::move_w_adr32_aid_ifm() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58909,7 +58909,7 @@ void m68000_mcu_device::move_w_dpc_aid_ifm() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58935,7 +58935,7 @@ void m68000_mcu_device::move_w_dpc_aid_ifm() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58990,7 +58990,7 @@ void m68000_mcu_device::move_w_dpci_aid_ifm() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59052,7 +59052,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59078,7 +59078,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59162,7 +59162,7 @@ void m68000_mcu_device::move_w_imm16_aid_ifm() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59223,7 +59223,7 @@ void m68000_mcu_device::move_w_ds_aipd_ifm() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59283,7 +59283,7 @@ void m68000_mcu_device::move_w_as_aipd_ifm() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59340,7 +59340,7 @@ void m68000_mcu_device::move_w_ais_aipd_ifm() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59367,7 +59367,7 @@ void m68000_mcu_device::move_w_ais_aipd_ifm() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59430,7 +59430,7 @@ void m68000_mcu_device::move_w_aips_aipd_ifm() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59455,7 +59455,7 @@ void m68000_mcu_device::move_w_aips_aipd_ifm() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59520,7 +59520,7 @@ void m68000_mcu_device::move_w_pais_aipd_ifm() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59545,7 +59545,7 @@ void m68000_mcu_device::move_w_pais_aipd_ifm() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59624,7 +59624,7 @@ void m68000_mcu_device::move_w_das_aipd_ifm() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59651,7 +59651,7 @@ void m68000_mcu_device::move_w_das_aipd_ifm() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59706,7 +59706,7 @@ void m68000_mcu_device::move_w_dais_aipd_ifm() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -59768,7 +59768,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -59795,7 +59795,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59875,7 +59875,7 @@ void m68000_mcu_device::move_w_adr16_aipd_ifm() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -59900,7 +59900,7 @@ void m68000_mcu_device::move_w_adr16_aipd_ifm() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60001,7 +60001,7 @@ void m68000_mcu_device::move_w_adr32_aipd_ifm() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60026,7 +60026,7 @@ void m68000_mcu_device::move_w_adr32_aipd_ifm() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60104,7 +60104,7 @@ void m68000_mcu_device::move_w_dpc_aipd_ifm() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60131,7 +60131,7 @@ void m68000_mcu_device::move_w_dpc_aipd_ifm() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60185,7 +60185,7 @@ void m68000_mcu_device::move_w_dpci_aipd_ifm() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60247,7 +60247,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60274,7 +60274,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60357,7 +60357,7 @@ void m68000_mcu_device::move_w_imm16_aipd_ifm() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -60416,7 +60416,7 @@ void m68000_mcu_device::move_w_ds_paid_ifm() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60476,7 +60476,7 @@ void m68000_mcu_device::move_w_as_paid_ifm() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60534,7 +60534,7 @@ void m68000_mcu_device::move_w_ais_paid_ifm() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60560,7 +60560,7 @@ void m68000_mcu_device::move_w_ais_paid_ifm() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60624,7 +60624,7 @@ void m68000_mcu_device::move_w_aips_paid_ifm() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60648,7 +60648,7 @@ void m68000_mcu_device::move_w_aips_paid_ifm() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60714,7 +60714,7 @@ void m68000_mcu_device::move_w_pais_paid_ifm() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -60738,7 +60738,7 @@ void m68000_mcu_device::move_w_pais_paid_ifm() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60818,7 +60818,7 @@ void m68000_mcu_device::move_w_das_paid_ifm() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60844,7 +60844,7 @@ void m68000_mcu_device::move_w_das_paid_ifm() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60900,7 +60900,7 @@ void m68000_mcu_device::move_w_dais_paid_ifm() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -60962,7 +60962,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -60988,7 +60988,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61069,7 +61069,7 @@ void m68000_mcu_device::move_w_adr16_paid_ifm() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61093,7 +61093,7 @@ void m68000_mcu_device::move_w_adr16_paid_ifm() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61195,7 +61195,7 @@ void m68000_mcu_device::move_w_adr32_paid_ifm() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61219,7 +61219,7 @@ void m68000_mcu_device::move_w_adr32_paid_ifm() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61298,7 +61298,7 @@ void m68000_mcu_device::move_w_dpc_paid_ifm() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61324,7 +61324,7 @@ void m68000_mcu_device::move_w_dpc_paid_ifm() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61379,7 +61379,7 @@ void m68000_mcu_device::move_w_dpci_paid_ifm() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -61441,7 +61441,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61467,7 +61467,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61550,7 +61550,7 @@ void m68000_mcu_device::move_w_imm16_paid_ifm() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61631,7 +61631,7 @@ void m68000_mcu_device::move_w_ds_dad_ifm() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61713,7 +61713,7 @@ void m68000_mcu_device::move_w_as_dad_ifm() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61772,7 +61772,7 @@ void m68000_mcu_device::move_w_ais_dad_ifm() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -61797,7 +61797,7 @@ void m68000_mcu_device::move_w_ais_dad_ifm() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61888,7 +61888,7 @@ void m68000_mcu_device::move_w_aips_dad_ifm() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -61911,7 +61911,7 @@ void m68000_mcu_device::move_w_aips_dad_ifm() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62004,7 +62004,7 @@ void m68000_mcu_device::move_w_pais_dad_ifm() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62027,7 +62027,7 @@ void m68000_mcu_device::move_w_pais_dad_ifm() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62134,7 +62134,7 @@ void m68000_mcu_device::move_w_das_dad_ifm() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62159,7 +62159,7 @@ void m68000_mcu_device::move_w_das_dad_ifm() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62242,7 +62242,7 @@ void m68000_mcu_device::move_w_dais_dad_ifm() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62304,7 +62304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62329,7 +62329,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62437,7 +62437,7 @@ void m68000_mcu_device::move_w_adr16_dad_ifm() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62460,7 +62460,7 @@ void m68000_mcu_device::move_w_adr16_dad_ifm() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62589,7 +62589,7 @@ void m68000_mcu_device::move_w_adr32_dad_ifm() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -62612,7 +62612,7 @@ void m68000_mcu_device::move_w_adr32_dad_ifm() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62718,7 +62718,7 @@ void m68000_mcu_device::move_w_dpc_dad_ifm() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62743,7 +62743,7 @@ void m68000_mcu_device::move_w_dpc_dad_ifm() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62825,7 +62825,7 @@ void m68000_mcu_device::move_w_dpci_dad_ifm() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -62887,7 +62887,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -62912,7 +62912,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63043,7 +63043,7 @@ void m68000_mcu_device::move_w_imm16_dad_ifm() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63100,7 +63100,7 @@ void m68000_mcu_device::move_w_ds_daid_ifm() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63164,7 +63164,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63221,7 +63221,7 @@ void m68000_mcu_device::move_w_as_daid_ifm() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -63285,7 +63285,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63344,7 +63344,7 @@ void m68000_mcu_device::move_w_ais_daid_ifm() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63366,7 +63366,7 @@ void m68000_mcu_device::move_w_ais_daid_ifm() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63381,7 +63381,7 @@ void m68000_mcu_device::move_w_ais_daid_ifm() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63405,7 +63405,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63498,7 +63498,7 @@ void m68000_mcu_device::move_w_aips_daid_ifm() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -63518,7 +63518,7 @@ void m68000_mcu_device::move_w_aips_daid_ifm() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63533,7 +63533,7 @@ void m68000_mcu_device::move_w_aips_daid_ifm() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63557,7 +63557,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63652,7 +63652,7 @@ void m68000_mcu_device::move_w_pais_daid_ifm() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -63672,7 +63672,7 @@ void m68000_mcu_device::move_w_pais_daid_ifm() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63687,7 +63687,7 @@ void m68000_mcu_device::move_w_pais_daid_ifm() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63711,7 +63711,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63820,7 +63820,7 @@ void m68000_mcu_device::move_w_das_daid_ifm() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -63842,7 +63842,7 @@ void m68000_mcu_device::move_w_das_daid_ifm() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -63857,7 +63857,7 @@ void m68000_mcu_device::move_w_das_daid_ifm() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63881,7 +63881,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63966,7 +63966,7 @@ void m68000_mcu_device::move_w_dais_daid_ifm() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64028,7 +64028,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64050,7 +64050,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64065,7 +64065,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64089,7 +64089,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64199,7 +64199,7 @@ void m68000_mcu_device::move_w_adr16_daid_ifm() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -64219,7 +64219,7 @@ void m68000_mcu_device::move_w_adr16_daid_ifm() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64234,7 +64234,7 @@ void m68000_mcu_device::move_w_adr16_daid_ifm() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64258,7 +64258,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64389,7 +64389,7 @@ void m68000_mcu_device::move_w_adr32_daid_ifm() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -64409,7 +64409,7 @@ void m68000_mcu_device::move_w_adr32_daid_ifm() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64424,7 +64424,7 @@ void m68000_mcu_device::move_w_adr32_daid_ifm() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64448,7 +64448,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64556,7 +64556,7 @@ void m68000_mcu_device::move_w_dpc_daid_ifm() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64578,7 +64578,7 @@ void m68000_mcu_device::move_w_dpc_daid_ifm() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64593,7 +64593,7 @@ void m68000_mcu_device::move_w_dpc_daid_ifm() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64617,7 +64617,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64701,7 +64701,7 @@ void m68000_mcu_device::move_w_dpci_daid_ifm() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64763,7 +64763,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -64785,7 +64785,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -64800,7 +64800,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64824,7 +64824,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64932,7 +64932,7 @@ void m68000_mcu_device::move_w_imm16_daid_ifm() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -64996,7 +64996,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65056,7 +65056,7 @@ void m68000_mcu_device::move_w_ds_adr16_ifm() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65142,7 +65142,7 @@ void m68000_mcu_device::move_w_as_adr16_ifm() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65226,7 +65226,7 @@ void m68000_mcu_device::move_w_ais_adr16_ifm() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65251,7 +65251,7 @@ void m68000_mcu_device::move_w_ais_adr16_ifm() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65341,7 +65341,7 @@ void m68000_mcu_device::move_w_aips_adr16_ifm() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65364,7 +65364,7 @@ void m68000_mcu_device::move_w_aips_adr16_ifm() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65456,7 +65456,7 @@ void m68000_mcu_device::move_w_pais_adr16_ifm() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65479,7 +65479,7 @@ void m68000_mcu_device::move_w_pais_adr16_ifm() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65585,7 +65585,7 @@ void m68000_mcu_device::move_w_das_adr16_ifm() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65610,7 +65610,7 @@ void m68000_mcu_device::move_w_das_adr16_ifm() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65692,7 +65692,7 @@ void m68000_mcu_device::move_w_dais_adr16_ifm() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65754,7 +65754,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65779,7 +65779,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65886,7 +65886,7 @@ void m68000_mcu_device::move_w_adr16_adr16_ifm() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -65909,7 +65909,7 @@ void m68000_mcu_device::move_w_adr16_adr16_ifm() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66037,7 +66037,7 @@ void m68000_mcu_device::move_w_adr32_adr16_ifm() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -66060,7 +66060,7 @@ void m68000_mcu_device::move_w_adr32_adr16_ifm() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66165,7 +66165,7 @@ void m68000_mcu_device::move_w_dpc_adr16_ifm() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66190,7 +66190,7 @@ void m68000_mcu_device::move_w_dpc_adr16_ifm() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66271,7 +66271,7 @@ void m68000_mcu_device::move_w_dpc_adr16_ifm() // 31fa ffff
void m68000_mcu_device::move_w_dpci_adr16_ifm() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66333,7 +66333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66358,7 +66358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66467,7 +66467,7 @@ void m68000_mcu_device::move_w_imm16_adr16_ifm() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66574,7 +66574,7 @@ void m68000_mcu_device::move_w_ds_adr32_ifm() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66681,7 +66681,7 @@ void m68000_mcu_device::move_w_as_adr32_ifm() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66765,7 +66765,7 @@ void m68000_mcu_device::move_w_ais_adr32_ifm() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66790,7 +66790,7 @@ void m68000_mcu_device::move_w_ais_adr32_ifm() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66900,7 +66900,7 @@ void m68000_mcu_device::move_w_aips_adr32_ifm() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -66923,7 +66923,7 @@ void m68000_mcu_device::move_w_aips_adr32_ifm() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67035,7 +67035,7 @@ void m68000_mcu_device::move_w_pais_adr32_ifm() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67058,7 +67058,7 @@ void m68000_mcu_device::move_w_pais_adr32_ifm() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67184,7 +67184,7 @@ void m68000_mcu_device::move_w_das_adr32_ifm() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67209,7 +67209,7 @@ void m68000_mcu_device::move_w_das_adr32_ifm() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67311,7 +67311,7 @@ void m68000_mcu_device::move_w_dais_adr32_ifm() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67373,7 +67373,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67398,7 +67398,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67525,7 +67525,7 @@ void m68000_mcu_device::move_w_adr16_adr32_ifm() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67548,7 +67548,7 @@ void m68000_mcu_device::move_w_adr16_adr32_ifm() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67696,7 +67696,7 @@ void m68000_mcu_device::move_w_adr32_adr32_ifm() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -67719,7 +67719,7 @@ void m68000_mcu_device::move_w_adr32_adr32_ifm() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67844,7 +67844,7 @@ void m68000_mcu_device::move_w_dpc_adr32_ifm() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67869,7 +67869,7 @@ void m68000_mcu_device::move_w_dpc_adr32_ifm() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67970,7 +67970,7 @@ void m68000_mcu_device::move_w_dpc_adr32_ifm() // 33fa ffff
void m68000_mcu_device::move_w_dpci_adr32_ifm() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68032,7 +68032,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68057,7 +68057,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68207,7 +68207,7 @@ void m68000_mcu_device::move_w_imm16_adr32_ifm() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68293,7 +68293,7 @@ void m68000_mcu_device::negx_b_ds_ifm() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -68332,7 +68332,7 @@ void m68000_mcu_device::negx_b_ais_ifm() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68355,7 +68355,7 @@ void m68000_mcu_device::negx_b_ais_ifm() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68412,7 +68412,7 @@ void m68000_mcu_device::negx_b_aips_ifm() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68433,7 +68433,7 @@ void m68000_mcu_device::negx_b_aips_ifm() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68492,7 +68492,7 @@ void m68000_mcu_device::negx_b_pais_ifm() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68513,7 +68513,7 @@ void m68000_mcu_device::negx_b_pais_ifm() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68586,7 +68586,7 @@ void m68000_mcu_device::negx_b_das_ifm() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68609,7 +68609,7 @@ void m68000_mcu_device::negx_b_das_ifm() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68658,7 +68658,7 @@ void m68000_mcu_device::negx_b_dais_ifm() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68720,7 +68720,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -68743,7 +68743,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68817,7 +68817,7 @@ void m68000_mcu_device::negx_b_adr16_ifm() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68838,7 +68838,7 @@ void m68000_mcu_device::negx_b_adr16_ifm() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68933,7 +68933,7 @@ void m68000_mcu_device::negx_b_adr32_ifm() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -68954,7 +68954,7 @@ void m68000_mcu_device::negx_b_adr32_ifm() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69007,7 +69007,7 @@ void m68000_mcu_device::negx_w_ds_ifm() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -69046,7 +69046,7 @@ void m68000_mcu_device::negx_w_ais_ifm() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69072,7 +69072,7 @@ void m68000_mcu_device::negx_w_ais_ifm() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69134,7 +69134,7 @@ void m68000_mcu_device::negx_w_aips_ifm() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69158,7 +69158,7 @@ void m68000_mcu_device::negx_w_aips_ifm() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69222,7 +69222,7 @@ void m68000_mcu_device::negx_w_pais_ifm() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69246,7 +69246,7 @@ void m68000_mcu_device::negx_w_pais_ifm() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69324,7 +69324,7 @@ void m68000_mcu_device::negx_w_das_ifm() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69350,7 +69350,7 @@ void m68000_mcu_device::negx_w_das_ifm() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69404,7 +69404,7 @@ void m68000_mcu_device::negx_w_dais_ifm() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69466,7 +69466,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -69492,7 +69492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69571,7 +69571,7 @@ void m68000_mcu_device::negx_w_adr16_ifm() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69595,7 +69595,7 @@ void m68000_mcu_device::negx_w_adr16_ifm() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69695,7 +69695,7 @@ void m68000_mcu_device::negx_w_adr32_ifm() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69719,7 +69719,7 @@ void m68000_mcu_device::negx_w_adr32_ifm() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69777,12 +69777,12 @@ void m68000_mcu_device::negx_l_ds_ifm() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69822,7 +69822,7 @@ void m68000_mcu_device::negx_l_ais_ifm() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69869,7 +69869,7 @@ void m68000_mcu_device::negx_l_ais_ifm() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69894,7 +69894,7 @@ void m68000_mcu_device::negx_l_ais_ifm() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -69948,7 +69948,7 @@ void m68000_mcu_device::negx_l_aips_ifm() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -69998,7 +69998,7 @@ void m68000_mcu_device::negx_l_aips_ifm() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70023,7 +70023,7 @@ void m68000_mcu_device::negx_l_aips_ifm() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70076,7 +70076,7 @@ void m68000_mcu_device::negx_l_pais_ifm() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -70128,7 +70128,7 @@ void m68000_mcu_device::negx_l_pais_ifm() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70153,7 +70153,7 @@ void m68000_mcu_device::negx_l_pais_ifm() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70228,7 +70228,7 @@ void m68000_mcu_device::negx_l_das_ifm() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70275,7 +70275,7 @@ void m68000_mcu_device::negx_l_das_ifm() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70300,7 +70300,7 @@ void m68000_mcu_device::negx_l_das_ifm() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70352,7 +70352,7 @@ void m68000_mcu_device::negx_l_dais_ifm() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70413,7 +70413,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70460,7 +70460,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70485,7 +70485,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70562,7 +70562,7 @@ void m68000_mcu_device::negx_l_adr16_ifm() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70609,7 +70609,7 @@ void m68000_mcu_device::negx_l_adr16_ifm() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70634,7 +70634,7 @@ void m68000_mcu_device::negx_l_adr16_ifm() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70732,7 +70732,7 @@ void m68000_mcu_device::negx_l_adr32_ifm() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -70779,7 +70779,7 @@ void m68000_mcu_device::negx_l_adr32_ifm() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70804,7 +70804,7 @@ void m68000_mcu_device::negx_l_adr32_ifm() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -70898,7 +70898,7 @@ void m68000_mcu_device::move_sr_ais_ifm() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -70926,7 +70926,7 @@ void m68000_mcu_device::move_sr_ais_ifm() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -70987,7 +70987,7 @@ void m68000_mcu_device::move_sr_aips_ifm() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71013,7 +71013,7 @@ void m68000_mcu_device::move_sr_aips_ifm() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71076,7 +71076,7 @@ void m68000_mcu_device::move_sr_pais_ifm() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71102,7 +71102,7 @@ void m68000_mcu_device::move_sr_pais_ifm() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71179,7 +71179,7 @@ void m68000_mcu_device::move_sr_das_ifm() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71207,7 +71207,7 @@ void m68000_mcu_device::move_sr_das_ifm() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71260,7 +71260,7 @@ void m68000_mcu_device::move_sr_dais_ifm() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71322,7 +71322,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -71350,7 +71350,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71428,7 +71428,7 @@ void m68000_mcu_device::move_sr_adr16_ifm() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71454,7 +71454,7 @@ void m68000_mcu_device::move_sr_adr16_ifm() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71553,7 +71553,7 @@ void m68000_mcu_device::move_sr_adr32_ifm() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -71579,7 +71579,7 @@ void m68000_mcu_device::move_sr_adr32_ifm() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -71635,7 +71635,7 @@ void m68000_mcu_device::chk_w_ds_dd_ifm() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -71643,7 +71643,7 @@ void m68000_mcu_device::chk_w_ds_dd_ifm() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71661,14 +71661,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71693,7 +71693,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71716,7 +71716,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71855,7 +71855,7 @@ void m68000_mcu_device::chk_w_ais_dd_ifm() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -71879,7 +71879,7 @@ void m68000_mcu_device::chk_w_ais_dd_ifm() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -71887,7 +71887,7 @@ void m68000_mcu_device::chk_w_ais_dd_ifm() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -71905,14 +71905,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71937,7 +71937,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -71960,7 +71960,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72105,7 +72105,7 @@ void m68000_mcu_device::chk_w_aips_dd_ifm() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -72127,7 +72127,7 @@ void m68000_mcu_device::chk_w_aips_dd_ifm() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72135,7 +72135,7 @@ void m68000_mcu_device::chk_w_aips_dd_ifm() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72153,14 +72153,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72185,7 +72185,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72208,7 +72208,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72355,7 +72355,7 @@ void m68000_mcu_device::chk_w_pais_dd_ifm() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -72377,7 +72377,7 @@ void m68000_mcu_device::chk_w_pais_dd_ifm() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72385,7 +72385,7 @@ void m68000_mcu_device::chk_w_pais_dd_ifm() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72403,14 +72403,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72435,7 +72435,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72458,7 +72458,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72619,7 +72619,7 @@ void m68000_mcu_device::chk_w_das_dd_ifm() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72643,7 +72643,7 @@ void m68000_mcu_device::chk_w_das_dd_ifm() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72651,7 +72651,7 @@ void m68000_mcu_device::chk_w_das_dd_ifm() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72669,14 +72669,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72701,7 +72701,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72724,7 +72724,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -72861,7 +72861,7 @@ void m68000_mcu_device::chk_w_dais_dd_ifm() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72923,7 +72923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -72947,7 +72947,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -72955,7 +72955,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -72973,14 +72973,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73005,7 +73005,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73028,7 +73028,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73190,7 +73190,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ifm() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -73212,7 +73212,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ifm() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73220,7 +73220,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ifm() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73238,14 +73238,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73270,7 +73270,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73293,7 +73293,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73476,7 +73476,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ifm() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -73498,7 +73498,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ifm() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73506,7 +73506,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ifm() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73524,14 +73524,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73556,7 +73556,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73579,7 +73579,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73739,7 +73739,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ifm() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73763,7 +73763,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ifm() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -73771,7 +73771,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ifm() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -73789,14 +73789,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73821,7 +73821,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73844,7 +73844,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -73980,7 +73980,7 @@ void m68000_mcu_device::chk_w_dpci_dd_ifm() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74042,7 +74042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74066,7 +74066,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -74074,7 +74074,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74092,14 +74092,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74124,7 +74124,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74147,7 +74147,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74309,7 +74309,7 @@ void m68000_mcu_device::chk_w_imm16_dd_ifm() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -74317,7 +74317,7 @@ void m68000_mcu_device::chk_w_imm16_dd_ifm() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -74335,14 +74335,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74367,7 +74367,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74390,7 +74390,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -74628,7 +74628,7 @@ void m68000_mcu_device::lea_dais_ad_ifm() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -74923,7 +74923,7 @@ void m68000_mcu_device::lea_dpci_ad_ifm() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -75026,7 +75026,7 @@ void m68000_mcu_device::clr_b_ds_ifm() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75034,7 +75034,7 @@ void m68000_mcu_device::clr_b_ds_ifm() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75066,11 +75066,11 @@ void m68000_mcu_device::clr_b_ais_ifm() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75090,7 +75090,7 @@ void m68000_mcu_device::clr_b_ais_ifm() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75117,7 +75117,7 @@ void m68000_mcu_device::clr_b_ais_ifm() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75145,12 +75145,12 @@ void m68000_mcu_device::clr_b_aips_ifm() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75171,7 +75171,7 @@ void m68000_mcu_device::clr_b_aips_ifm() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75198,7 +75198,7 @@ void m68000_mcu_device::clr_b_aips_ifm() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75225,7 +75225,7 @@ void m68000_mcu_device::clr_b_pais_ifm() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75233,7 +75233,7 @@ void m68000_mcu_device::clr_b_pais_ifm() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75254,7 +75254,7 @@ void m68000_mcu_device::clr_b_pais_ifm() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75281,7 +75281,7 @@ void m68000_mcu_device::clr_b_pais_ifm() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75306,7 +75306,7 @@ void m68000_mcu_device::clr_b_das_ifm() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75329,11 +75329,11 @@ void m68000_mcu_device::clr_b_das_ifm() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75353,7 +75353,7 @@ void m68000_mcu_device::clr_b_das_ifm() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75380,7 +75380,7 @@ void m68000_mcu_device::clr_b_das_ifm() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75403,14 +75403,14 @@ void m68000_mcu_device::clr_b_dais_ifm() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -75418,7 +75418,7 @@ void m68000_mcu_device::clr_b_dais_ifm() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75442,7 +75442,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75468,11 +75468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -75492,7 +75492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75519,7 +75519,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75546,7 +75546,7 @@ void m68000_mcu_device::clr_b_adr16_ifm() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -75569,7 +75569,7 @@ void m68000_mcu_device::clr_b_adr16_ifm() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75590,7 +75590,7 @@ void m68000_mcu_device::clr_b_adr16_ifm() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75617,7 +75617,7 @@ void m68000_mcu_device::clr_b_adr16_ifm() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75642,7 +75642,7 @@ void m68000_mcu_device::clr_b_adr32_ifm() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75666,7 +75666,7 @@ void m68000_mcu_device::clr_b_adr32_ifm() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -75689,7 +75689,7 @@ void m68000_mcu_device::clr_b_adr32_ifm() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -75710,7 +75710,7 @@ void m68000_mcu_device::clr_b_adr32_ifm() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75737,7 +75737,7 @@ void m68000_mcu_device::clr_b_adr32_ifm() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -75764,7 +75764,7 @@ void m68000_mcu_device::clr_w_ds_ifm() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -75772,7 +75772,7 @@ void m68000_mcu_device::clr_w_ds_ifm() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75804,11 +75804,11 @@ void m68000_mcu_device::clr_w_ais_ifm() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -75831,7 +75831,7 @@ void m68000_mcu_device::clr_w_ais_ifm() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75858,7 +75858,7 @@ void m68000_mcu_device::clr_w_ais_ifm() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -75891,12 +75891,12 @@ void m68000_mcu_device::clr_w_aips_ifm() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -75920,7 +75920,7 @@ void m68000_mcu_device::clr_w_aips_ifm() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75947,7 +75947,7 @@ void m68000_mcu_device::clr_w_aips_ifm() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -75979,7 +75979,7 @@ void m68000_mcu_device::clr_w_pais_ifm() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -75987,7 +75987,7 @@ void m68000_mcu_device::clr_w_pais_ifm() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76011,7 +76011,7 @@ void m68000_mcu_device::clr_w_pais_ifm() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76038,7 +76038,7 @@ void m68000_mcu_device::clr_w_pais_ifm() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76068,7 +76068,7 @@ void m68000_mcu_device::clr_w_das_ifm() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76091,11 +76091,11 @@ void m68000_mcu_device::clr_w_das_ifm() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76118,7 +76118,7 @@ void m68000_mcu_device::clr_w_das_ifm() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76145,7 +76145,7 @@ void m68000_mcu_device::clr_w_das_ifm() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76173,14 +76173,14 @@ void m68000_mcu_device::clr_w_dais_ifm() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -76188,7 +76188,7 @@ void m68000_mcu_device::clr_w_dais_ifm() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76212,7 +76212,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76238,11 +76238,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76265,7 +76265,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76292,7 +76292,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76324,7 +76324,7 @@ void m68000_mcu_device::clr_w_adr16_ifm() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -76347,7 +76347,7 @@ void m68000_mcu_device::clr_w_adr16_ifm() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76371,7 +76371,7 @@ void m68000_mcu_device::clr_w_adr16_ifm() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76398,7 +76398,7 @@ void m68000_mcu_device::clr_w_adr16_ifm() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76428,7 +76428,7 @@ void m68000_mcu_device::clr_w_adr32_ifm() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76452,7 +76452,7 @@ void m68000_mcu_device::clr_w_adr32_ifm() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -76475,7 +76475,7 @@ void m68000_mcu_device::clr_w_adr32_ifm() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76499,7 +76499,7 @@ void m68000_mcu_device::clr_w_adr32_ifm() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76526,7 +76526,7 @@ void m68000_mcu_device::clr_w_adr32_ifm() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76558,12 +76558,12 @@ void m68000_mcu_device::clr_l_ds_ifm() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76589,7 +76589,7 @@ void m68000_mcu_device::clr_l_ds_ifm() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -76604,7 +76604,7 @@ void m68000_mcu_device::clr_l_ais_ifm() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76629,7 +76629,7 @@ void m68000_mcu_device::clr_l_ais_ifm() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76652,7 +76652,7 @@ void m68000_mcu_device::clr_l_ais_ifm() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76677,7 +76677,7 @@ void m68000_mcu_device::clr_l_ais_ifm() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76702,7 +76702,7 @@ void m68000_mcu_device::clr_l_ais_ifm() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76732,7 +76732,7 @@ void m68000_mcu_device::clr_l_aips_ifm() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -76757,11 +76757,11 @@ void m68000_mcu_device::clr_l_aips_ifm() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76784,7 +76784,7 @@ void m68000_mcu_device::clr_l_aips_ifm() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76809,7 +76809,7 @@ void m68000_mcu_device::clr_l_aips_ifm() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76834,7 +76834,7 @@ void m68000_mcu_device::clr_l_aips_ifm() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76863,14 +76863,14 @@ void m68000_mcu_device::clr_l_pais_ifm() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76894,7 +76894,7 @@ void m68000_mcu_device::clr_l_pais_ifm() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -76917,7 +76917,7 @@ void m68000_mcu_device::clr_l_pais_ifm() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76942,7 +76942,7 @@ void m68000_mcu_device::clr_l_pais_ifm() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -76967,7 +76967,7 @@ void m68000_mcu_device::clr_l_pais_ifm() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -76997,7 +76997,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77019,7 +77019,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77044,7 +77044,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77067,7 +77067,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77092,7 +77092,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77117,7 +77117,7 @@ void m68000_mcu_device::clr_l_das_ifm() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77145,14 +77145,14 @@ void m68000_mcu_device::clr_l_dais_ifm() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -77160,7 +77160,7 @@ void m68000_mcu_device::clr_l_dais_ifm() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77184,7 +77184,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77209,7 +77209,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77234,7 +77234,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77257,7 +77257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77282,7 +77282,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77307,7 +77307,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77339,7 +77339,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -77362,7 +77362,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77387,7 +77387,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77410,7 +77410,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77435,7 +77435,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77460,7 +77460,7 @@ void m68000_mcu_device::clr_l_adr16_ifm() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77490,7 +77490,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77514,7 +77514,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -77537,7 +77537,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -77562,7 +77562,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -77585,7 +77585,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77610,7 +77610,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -77635,7 +77635,7 @@ void m68000_mcu_device::clr_l_adr32_ifm() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -77667,7 +77667,7 @@ void m68000_mcu_device::neg_b_ds_ifm() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -77706,7 +77706,7 @@ void m68000_mcu_device::neg_b_ais_ifm() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77729,7 +77729,7 @@ void m68000_mcu_device::neg_b_ais_ifm() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77786,7 +77786,7 @@ void m68000_mcu_device::neg_b_aips_ifm() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77807,7 +77807,7 @@ void m68000_mcu_device::neg_b_aips_ifm() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77866,7 +77866,7 @@ void m68000_mcu_device::neg_b_pais_ifm() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -77887,7 +77887,7 @@ void m68000_mcu_device::neg_b_pais_ifm() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77960,7 +77960,7 @@ void m68000_mcu_device::neg_b_das_ifm() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77983,7 +77983,7 @@ void m68000_mcu_device::neg_b_das_ifm() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78032,7 +78032,7 @@ void m68000_mcu_device::neg_b_dais_ifm() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78094,7 +78094,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78117,7 +78117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78191,7 +78191,7 @@ void m68000_mcu_device::neg_b_adr16_ifm() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78212,7 +78212,7 @@ void m68000_mcu_device::neg_b_adr16_ifm() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78307,7 +78307,7 @@ void m68000_mcu_device::neg_b_adr32_ifm() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -78328,7 +78328,7 @@ void m68000_mcu_device::neg_b_adr32_ifm() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78381,7 +78381,7 @@ void m68000_mcu_device::neg_w_ds_ifm() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -78420,7 +78420,7 @@ void m68000_mcu_device::neg_w_ais_ifm() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78446,7 +78446,7 @@ void m68000_mcu_device::neg_w_ais_ifm() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78508,7 +78508,7 @@ void m68000_mcu_device::neg_w_aips_ifm() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78532,7 +78532,7 @@ void m68000_mcu_device::neg_w_aips_ifm() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78596,7 +78596,7 @@ void m68000_mcu_device::neg_w_pais_ifm() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78620,7 +78620,7 @@ void m68000_mcu_device::neg_w_pais_ifm() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78698,7 +78698,7 @@ void m68000_mcu_device::neg_w_das_ifm() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78724,7 +78724,7 @@ void m68000_mcu_device::neg_w_das_ifm() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78778,7 +78778,7 @@ void m68000_mcu_device::neg_w_dais_ifm() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78840,7 +78840,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78866,7 +78866,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78945,7 +78945,7 @@ void m68000_mcu_device::neg_w_adr16_ifm() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -78969,7 +78969,7 @@ void m68000_mcu_device::neg_w_adr16_ifm() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79069,7 +79069,7 @@ void m68000_mcu_device::neg_w_adr32_ifm() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79093,7 +79093,7 @@ void m68000_mcu_device::neg_w_adr32_ifm() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79151,12 +79151,12 @@ void m68000_mcu_device::neg_l_ds_ifm() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79196,7 +79196,7 @@ void m68000_mcu_device::neg_l_ais_ifm() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79243,7 +79243,7 @@ void m68000_mcu_device::neg_l_ais_ifm() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79268,7 +79268,7 @@ void m68000_mcu_device::neg_l_ais_ifm() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79322,7 +79322,7 @@ void m68000_mcu_device::neg_l_aips_ifm() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79372,7 +79372,7 @@ void m68000_mcu_device::neg_l_aips_ifm() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79397,7 +79397,7 @@ void m68000_mcu_device::neg_l_aips_ifm() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79450,7 +79450,7 @@ void m68000_mcu_device::neg_l_pais_ifm() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79502,7 +79502,7 @@ void m68000_mcu_device::neg_l_pais_ifm() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79527,7 +79527,7 @@ void m68000_mcu_device::neg_l_pais_ifm() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79602,7 +79602,7 @@ void m68000_mcu_device::neg_l_das_ifm() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79649,7 +79649,7 @@ void m68000_mcu_device::neg_l_das_ifm() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79674,7 +79674,7 @@ void m68000_mcu_device::neg_l_das_ifm() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79726,7 +79726,7 @@ void m68000_mcu_device::neg_l_dais_ifm() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79787,7 +79787,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79834,7 +79834,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79859,7 +79859,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79936,7 +79936,7 @@ void m68000_mcu_device::neg_l_adr16_ifm() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -79983,7 +79983,7 @@ void m68000_mcu_device::neg_l_adr16_ifm() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80008,7 +80008,7 @@ void m68000_mcu_device::neg_l_adr16_ifm() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80106,7 +80106,7 @@ void m68000_mcu_device::neg_l_adr32_ifm() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80153,7 +80153,7 @@ void m68000_mcu_device::neg_l_adr32_ifm() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80178,7 +80178,7 @@ void m68000_mcu_device::neg_l_adr32_ifm() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80300,7 +80300,7 @@ void m68000_mcu_device::move_ais_ccr_ifm() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80398,7 +80398,7 @@ void m68000_mcu_device::move_aips_ccr_ifm() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80496,7 +80496,7 @@ void m68000_mcu_device::move_pais_ccr_ifm() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -80608,7 +80608,7 @@ void m68000_mcu_device::move_das_ccr_ifm() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80698,7 +80698,7 @@ void m68000_mcu_device::move_dais_ccr_ifm() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80760,7 +80760,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80875,7 +80875,7 @@ void m68000_mcu_device::move_adr16_ccr_ifm() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -81009,7 +81009,7 @@ void m68000_mcu_device::move_adr32_ccr_ifm() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -81120,7 +81120,7 @@ void m68000_mcu_device::move_dpc_ccr_ifm() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81209,7 +81209,7 @@ void m68000_mcu_device::move_dpc_ccr_ifm() // 44fa ffff
void m68000_mcu_device::move_dpci_ccr_ifm() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81271,7 +81271,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81456,7 +81456,7 @@ void m68000_mcu_device::not_b_ds_ifm() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -81495,7 +81495,7 @@ void m68000_mcu_device::not_b_ais_ifm() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81518,7 +81518,7 @@ void m68000_mcu_device::not_b_ais_ifm() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81575,7 +81575,7 @@ void m68000_mcu_device::not_b_aips_ifm() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81596,7 +81596,7 @@ void m68000_mcu_device::not_b_aips_ifm() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81655,7 +81655,7 @@ void m68000_mcu_device::not_b_pais_ifm() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -81676,7 +81676,7 @@ void m68000_mcu_device::not_b_pais_ifm() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81749,7 +81749,7 @@ void m68000_mcu_device::not_b_das_ifm() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81772,7 +81772,7 @@ void m68000_mcu_device::not_b_das_ifm() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81821,7 +81821,7 @@ void m68000_mcu_device::not_b_dais_ifm() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81883,7 +81883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81906,7 +81906,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81980,7 +81980,7 @@ void m68000_mcu_device::not_b_adr16_ifm() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82001,7 +82001,7 @@ void m68000_mcu_device::not_b_adr16_ifm() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82096,7 +82096,7 @@ void m68000_mcu_device::not_b_adr32_ifm() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -82117,7 +82117,7 @@ void m68000_mcu_device::not_b_adr32_ifm() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82170,7 +82170,7 @@ void m68000_mcu_device::not_w_ds_ifm() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -82209,7 +82209,7 @@ void m68000_mcu_device::not_w_ais_ifm() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82235,7 +82235,7 @@ void m68000_mcu_device::not_w_ais_ifm() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82297,7 +82297,7 @@ void m68000_mcu_device::not_w_aips_ifm() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82321,7 +82321,7 @@ void m68000_mcu_device::not_w_aips_ifm() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82385,7 +82385,7 @@ void m68000_mcu_device::not_w_pais_ifm() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82409,7 +82409,7 @@ void m68000_mcu_device::not_w_pais_ifm() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82487,7 +82487,7 @@ void m68000_mcu_device::not_w_das_ifm() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82513,7 +82513,7 @@ void m68000_mcu_device::not_w_das_ifm() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82567,7 +82567,7 @@ void m68000_mcu_device::not_w_dais_ifm() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82629,7 +82629,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -82655,7 +82655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82734,7 +82734,7 @@ void m68000_mcu_device::not_w_adr16_ifm() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82758,7 +82758,7 @@ void m68000_mcu_device::not_w_adr16_ifm() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82858,7 +82858,7 @@ void m68000_mcu_device::not_w_adr32_ifm() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -82882,7 +82882,7 @@ void m68000_mcu_device::not_w_adr32_ifm() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82940,12 +82940,12 @@ void m68000_mcu_device::not_l_ds_ifm() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82985,7 +82985,7 @@ void m68000_mcu_device::not_l_ais_ifm() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83032,7 +83032,7 @@ void m68000_mcu_device::not_l_ais_ifm() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83057,7 +83057,7 @@ void m68000_mcu_device::not_l_ais_ifm() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83111,7 +83111,7 @@ void m68000_mcu_device::not_l_aips_ifm() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83161,7 +83161,7 @@ void m68000_mcu_device::not_l_aips_ifm() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83186,7 +83186,7 @@ void m68000_mcu_device::not_l_aips_ifm() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68000_mcu_device::not_l_pais_ifm() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -83291,7 +83291,7 @@ void m68000_mcu_device::not_l_pais_ifm() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83316,7 +83316,7 @@ void m68000_mcu_device::not_l_pais_ifm() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83391,7 +83391,7 @@ void m68000_mcu_device::not_l_das_ifm() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83438,7 +83438,7 @@ void m68000_mcu_device::not_l_das_ifm() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83463,7 +83463,7 @@ void m68000_mcu_device::not_l_das_ifm() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83515,7 +83515,7 @@ void m68000_mcu_device::not_l_dais_ifm() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -83576,7 +83576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83623,7 +83623,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83648,7 +83648,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83725,7 +83725,7 @@ void m68000_mcu_device::not_l_adr16_ifm() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83772,7 +83772,7 @@ void m68000_mcu_device::not_l_adr16_ifm() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83797,7 +83797,7 @@ void m68000_mcu_device::not_l_adr16_ifm() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -83895,7 +83895,7 @@ void m68000_mcu_device::not_l_adr32_ifm() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -83942,7 +83942,7 @@ void m68000_mcu_device::not_l_adr32_ifm() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83967,7 +83967,7 @@ void m68000_mcu_device::not_l_adr32_ifm() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -84099,7 +84099,7 @@ void m68000_mcu_device::move_ais_sr_ifm() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84203,7 +84203,7 @@ void m68000_mcu_device::move_aips_sr_ifm() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84307,7 +84307,7 @@ void m68000_mcu_device::move_pais_sr_ifm() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84425,7 +84425,7 @@ void m68000_mcu_device::move_das_sr_ifm() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84521,7 +84521,7 @@ void m68000_mcu_device::move_dais_sr_ifm() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84583,7 +84583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -84704,7 +84704,7 @@ void m68000_mcu_device::move_adr16_sr_ifm() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84844,7 +84844,7 @@ void m68000_mcu_device::move_adr32_sr_ifm() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -84961,7 +84961,7 @@ void m68000_mcu_device::move_dpc_sr_ifm() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85056,7 +85056,7 @@ void m68000_mcu_device::move_dpci_sr_ifm() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85118,7 +85118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85311,12 +85311,12 @@ void m68000_mcu_device::nbcd_b_ds_ifm() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85354,7 +85354,7 @@ void m68000_mcu_device::nbcd_b_ais_ifm() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85376,12 +85376,12 @@ void m68000_mcu_device::nbcd_b_ais_ifm() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85436,7 +85436,7 @@ void m68000_mcu_device::nbcd_b_aips_ifm() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85456,12 +85456,12 @@ void m68000_mcu_device::nbcd_b_aips_ifm() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85518,7 +85518,7 @@ void m68000_mcu_device::nbcd_b_pais_ifm() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85538,12 +85538,12 @@ void m68000_mcu_device::nbcd_b_pais_ifm() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85614,7 +85614,7 @@ void m68000_mcu_device::nbcd_b_das_ifm() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85636,12 +85636,12 @@ void m68000_mcu_device::nbcd_b_das_ifm() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85688,7 +85688,7 @@ void m68000_mcu_device::nbcd_b_dais_ifm() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85750,7 +85750,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -85772,12 +85772,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85849,7 +85849,7 @@ void m68000_mcu_device::nbcd_b_adr16_ifm() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85869,12 +85869,12 @@ void m68000_mcu_device::nbcd_b_adr16_ifm() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -85967,7 +85967,7 @@ void m68000_mcu_device::nbcd_b_adr32_ifm() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85987,12 +85987,12 @@ void m68000_mcu_device::nbcd_b_adr32_ifm() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -86044,7 +86044,7 @@ void m68000_mcu_device::swap_ds_ifm() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -86052,7 +86052,7 @@ void m68000_mcu_device::swap_ds_ifm() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86089,7 +86089,7 @@ void m68000_mcu_device::pea_ais_ifm() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86166,7 +86166,7 @@ void m68000_mcu_device::pea_das_ifm() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86193,7 +86193,7 @@ void m68000_mcu_device::pea_das_ifm() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86268,7 +86268,7 @@ void m68000_mcu_device::pea_dais_ifm() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86329,7 +86329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86638,7 +86638,7 @@ void m68000_mcu_device::pea_dpc_ifm() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86665,7 +86665,7 @@ void m68000_mcu_device::pea_dpc_ifm() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86739,7 +86739,7 @@ void m68000_mcu_device::pea_dpc_ifm() // 487a ffff
void m68000_mcu_device::pea_dpci_ifm() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -86800,7 +86800,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -86884,7 +86884,7 @@ void m68000_mcu_device::ext_w_ds_ifm() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -87255,7 +87255,7 @@ void m68000_mcu_device::movem_w_list_dais_ifm() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -87643,7 +87643,7 @@ void m68000_mcu_device::ext_l_ds_ifm() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -88075,7 +88075,7 @@ void m68000_mcu_device::movem_l_list_dais_ifm() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -88524,13 +88524,13 @@ void m68000_mcu_device::tst_b_ds_ifm() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88562,11 +88562,11 @@ void m68000_mcu_device::tst_b_ais_ifm() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88586,13 +88586,13 @@ void m68000_mcu_device::tst_b_ais_ifm() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88627,12 +88627,12 @@ void m68000_mcu_device::tst_b_aips_ifm() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88653,13 +88653,13 @@ void m68000_mcu_device::tst_b_aips_ifm() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88693,7 +88693,7 @@ void m68000_mcu_device::tst_b_pais_ifm() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -88701,7 +88701,7 @@ void m68000_mcu_device::tst_b_pais_ifm() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -88722,13 +88722,13 @@ void m68000_mcu_device::tst_b_pais_ifm() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88760,7 +88760,7 @@ void m68000_mcu_device::tst_b_das_ifm() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88783,11 +88783,11 @@ void m68000_mcu_device::tst_b_das_ifm() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88807,13 +88807,13 @@ void m68000_mcu_device::tst_b_das_ifm() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88843,14 +88843,14 @@ void m68000_mcu_device::tst_b_dais_ifm() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -88858,7 +88858,7 @@ void m68000_mcu_device::tst_b_dais_ifm() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88882,7 +88882,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88908,11 +88908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -88932,13 +88932,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -88972,7 +88972,7 @@ void m68000_mcu_device::tst_b_adr16_ifm() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -88995,7 +88995,7 @@ void m68000_mcu_device::tst_b_adr16_ifm() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89016,13 +89016,13 @@ void m68000_mcu_device::tst_b_adr16_ifm() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89054,7 +89054,7 @@ void m68000_mcu_device::tst_b_adr32_ifm() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89078,7 +89078,7 @@ void m68000_mcu_device::tst_b_adr32_ifm() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89101,7 +89101,7 @@ void m68000_mcu_device::tst_b_adr32_ifm() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -89122,13 +89122,13 @@ void m68000_mcu_device::tst_b_adr32_ifm() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89163,13 +89163,13 @@ void m68000_mcu_device::tst_w_ds_ifm() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89201,11 +89201,11 @@ void m68000_mcu_device::tst_w_ais_ifm() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89228,13 +89228,13 @@ void m68000_mcu_device::tst_w_ais_ifm() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89269,12 +89269,12 @@ void m68000_mcu_device::tst_w_aips_ifm() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89298,13 +89298,13 @@ void m68000_mcu_device::tst_w_aips_ifm() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89338,7 +89338,7 @@ void m68000_mcu_device::tst_w_pais_ifm() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -89346,7 +89346,7 @@ void m68000_mcu_device::tst_w_pais_ifm() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89370,13 +89370,13 @@ void m68000_mcu_device::tst_w_pais_ifm() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89408,7 +89408,7 @@ void m68000_mcu_device::tst_w_das_ifm() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89431,11 +89431,11 @@ void m68000_mcu_device::tst_w_das_ifm() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89458,13 +89458,13 @@ void m68000_mcu_device::tst_w_das_ifm() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89494,14 +89494,14 @@ void m68000_mcu_device::tst_w_dais_ifm() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -89509,7 +89509,7 @@ void m68000_mcu_device::tst_w_dais_ifm() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89533,7 +89533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89559,11 +89559,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89586,13 +89586,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89626,7 +89626,7 @@ void m68000_mcu_device::tst_w_adr16_ifm() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89649,7 +89649,7 @@ void m68000_mcu_device::tst_w_adr16_ifm() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89673,13 +89673,13 @@ void m68000_mcu_device::tst_w_adr16_ifm() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89711,7 +89711,7 @@ void m68000_mcu_device::tst_w_adr32_ifm() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89735,7 +89735,7 @@ void m68000_mcu_device::tst_w_adr32_ifm() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -89758,7 +89758,7 @@ void m68000_mcu_device::tst_w_adr32_ifm() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89782,13 +89782,13 @@ void m68000_mcu_device::tst_w_adr32_ifm() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89823,13 +89823,13 @@ void m68000_mcu_device::tst_l_ds_ifm() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89863,7 +89863,7 @@ void m68000_mcu_device::tst_l_ais_ifm() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89888,7 +89888,7 @@ void m68000_mcu_device::tst_l_ais_ifm() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -89911,13 +89911,13 @@ void m68000_mcu_device::tst_l_ais_ifm() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89951,7 +89951,7 @@ void m68000_mcu_device::tst_l_aips_ifm() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -89976,11 +89976,11 @@ void m68000_mcu_device::tst_l_aips_ifm() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90003,13 +90003,13 @@ void m68000_mcu_device::tst_l_aips_ifm() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90042,14 +90042,14 @@ void m68000_mcu_device::tst_l_pais_ifm() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90073,7 +90073,7 @@ void m68000_mcu_device::tst_l_pais_ifm() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90096,13 +90096,13 @@ void m68000_mcu_device::tst_l_pais_ifm() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90136,7 +90136,7 @@ void m68000_mcu_device::tst_l_das_ifm() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90158,7 +90158,7 @@ void m68000_mcu_device::tst_l_das_ifm() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90183,7 +90183,7 @@ void m68000_mcu_device::tst_l_das_ifm() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90206,13 +90206,13 @@ void m68000_mcu_device::tst_l_das_ifm() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90244,14 +90244,14 @@ void m68000_mcu_device::tst_l_dais_ifm() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -90259,7 +90259,7 @@ void m68000_mcu_device::tst_l_dais_ifm() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90283,7 +90283,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90308,7 +90308,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90333,7 +90333,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90356,13 +90356,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90398,7 +90398,7 @@ void m68000_mcu_device::tst_l_adr16_ifm() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -90421,7 +90421,7 @@ void m68000_mcu_device::tst_l_adr16_ifm() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90446,7 +90446,7 @@ void m68000_mcu_device::tst_l_adr16_ifm() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90469,13 +90469,13 @@ void m68000_mcu_device::tst_l_adr16_ifm() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90509,7 +90509,7 @@ void m68000_mcu_device::tst_l_adr32_ifm() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90533,7 +90533,7 @@ void m68000_mcu_device::tst_l_adr32_ifm() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -90556,7 +90556,7 @@ void m68000_mcu_device::tst_l_adr32_ifm() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -90581,7 +90581,7 @@ void m68000_mcu_device::tst_l_adr32_ifm() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90604,13 +90604,13 @@ void m68000_mcu_device::tst_l_adr32_ifm() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90646,14 +90646,14 @@ void m68000_mcu_device::tas_ds_ifm() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90687,11 +90687,11 @@ void m68000_mcu_device::tas_ais_ifm() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90706,14 +90706,14 @@ void m68000_mcu_device::tas_ais_ifm() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90735,11 +90735,11 @@ void m68000_mcu_device::tas_ais_ifm() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90774,12 +90774,12 @@ void m68000_mcu_device::tas_aips_ifm() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90795,14 +90795,14 @@ void m68000_mcu_device::tas_aips_ifm() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90824,11 +90824,11 @@ void m68000_mcu_device::tas_aips_ifm() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90862,7 +90862,7 @@ void m68000_mcu_device::tas_pais_ifm() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -90870,7 +90870,7 @@ void m68000_mcu_device::tas_pais_ifm() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -90886,14 +90886,14 @@ void m68000_mcu_device::tas_pais_ifm() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90915,11 +90915,11 @@ void m68000_mcu_device::tas_pais_ifm() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90951,7 +90951,7 @@ void m68000_mcu_device::tas_das_ifm() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -90974,11 +90974,11 @@ void m68000_mcu_device::tas_das_ifm() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -90993,14 +90993,14 @@ void m68000_mcu_device::tas_das_ifm() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91022,11 +91022,11 @@ void m68000_mcu_device::tas_das_ifm() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91056,14 +91056,14 @@ void m68000_mcu_device::tas_dais_ifm() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -91071,7 +91071,7 @@ void m68000_mcu_device::tas_dais_ifm() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91095,7 +91095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91121,11 +91121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -91140,14 +91140,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91169,11 +91169,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91207,7 +91207,7 @@ void m68000_mcu_device::tas_adr16_ifm() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -91230,7 +91230,7 @@ void m68000_mcu_device::tas_adr16_ifm() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91246,14 +91246,14 @@ void m68000_mcu_device::tas_adr16_ifm() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91275,11 +91275,11 @@ void m68000_mcu_device::tas_adr16_ifm() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91311,7 +91311,7 @@ void m68000_mcu_device::tas_adr32_ifm() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91335,7 +91335,7 @@ void m68000_mcu_device::tas_adr32_ifm() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -91358,7 +91358,7 @@ void m68000_mcu_device::tas_adr32_ifm() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -91374,14 +91374,14 @@ void m68000_mcu_device::tas_adr32_ifm() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91403,11 +91403,11 @@ void m68000_mcu_device::tas_adr32_ifm() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -91833,7 +91833,7 @@ void m68000_mcu_device::movem_w_dais_list_ifm() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -91891,7 +91891,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -92444,7 +92444,7 @@ void m68000_mcu_device::movem_w_dpci_list_ifm() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -92502,7 +92502,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93055,7 +93055,7 @@ void m68000_mcu_device::movem_l_dais_list_ifm() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93113,7 +93113,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93750,7 +93750,7 @@ void m68000_mcu_device::movem_l_dpci_list_ifm() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -93808,7 +93808,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -93930,14 +93930,14 @@ void m68000_mcu_device::trap_imm4_ifm() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -93962,7 +93962,7 @@ void m68000_mcu_device::trap_imm4_ifm() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -93985,7 +93985,7 @@ void m68000_mcu_device::trap_imm4_ifm() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94107,7 +94107,7 @@ void m68000_mcu_device::link_as_imm16_ifm() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -94384,7 +94384,7 @@ void m68000_mcu_device::reset_ifm() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -94484,7 +94484,7 @@ void m68000_mcu_device::stop_i16u_ifm() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -94497,6 +94497,7 @@ void m68000_mcu_device::stop_i16u_ifm() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -94510,7 +94511,7 @@ void m68000_mcu_device::rte_ifm() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -94638,7 +94639,7 @@ void m68000_mcu_device::rts_ifm() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -94779,7 +94780,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -94802,7 +94803,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94827,7 +94828,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94850,7 +94851,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -94970,7 +94971,7 @@ void m68000_mcu_device::rtr_ifm() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -95298,7 +95299,7 @@ void m68000_mcu_device::jsr_dais_ifm() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95747,7 +95748,7 @@ void m68000_mcu_device::jsr_dpc_ifm() // 4eba ffff
void m68000_mcu_device::jsr_dpci_ifm() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -95988,7 +95989,7 @@ void m68000_mcu_device::jmp_dais_ifm() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96260,7 +96261,7 @@ void m68000_mcu_device::jmp_dpc_ifm() // 4efa ffff
void m68000_mcu_device::jmp_dpci_ifm() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -96344,7 +96345,7 @@ void m68000_mcu_device::addq_b_imm3_ds_ifm() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -96383,7 +96384,7 @@ void m68000_mcu_device::addq_b_imm3_ais_ifm() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96407,7 +96408,7 @@ void m68000_mcu_device::addq_b_imm3_ais_ifm() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96464,7 +96465,7 @@ void m68000_mcu_device::addq_b_imm3_aips_ifm() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96486,7 +96487,7 @@ void m68000_mcu_device::addq_b_imm3_aips_ifm() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96545,7 +96546,7 @@ void m68000_mcu_device::addq_b_imm3_pais_ifm() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96567,7 +96568,7 @@ void m68000_mcu_device::addq_b_imm3_pais_ifm() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96640,7 +96641,7 @@ void m68000_mcu_device::addq_b_imm3_das_ifm() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96664,7 +96665,7 @@ void m68000_mcu_device::addq_b_imm3_das_ifm() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96713,7 +96714,7 @@ void m68000_mcu_device::addq_b_imm3_dais_ifm() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96775,7 +96776,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -96799,7 +96800,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96873,7 +96874,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_ifm() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -96895,7 +96896,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_ifm() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96990,7 +96991,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_ifm() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -97012,7 +97013,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_ifm() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97065,7 +97066,7 @@ void m68000_mcu_device::addq_w_imm3_ds_ifm() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -97106,7 +97107,7 @@ void m68000_mcu_device::addq_w_imm3_as_ifm() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97129,7 +97130,7 @@ void m68000_mcu_device::addq_w_imm3_as_ifm() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97151,7 +97152,7 @@ void m68000_mcu_device::addq_w_imm3_ais_ifm() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97178,7 +97179,7 @@ void m68000_mcu_device::addq_w_imm3_ais_ifm() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97240,7 +97241,7 @@ void m68000_mcu_device::addq_w_imm3_aips_ifm() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97265,7 +97266,7 @@ void m68000_mcu_device::addq_w_imm3_aips_ifm() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97329,7 +97330,7 @@ void m68000_mcu_device::addq_w_imm3_pais_ifm() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97354,7 +97355,7 @@ void m68000_mcu_device::addq_w_imm3_pais_ifm() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97432,7 +97433,7 @@ void m68000_mcu_device::addq_w_imm3_das_ifm() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97459,7 +97460,7 @@ void m68000_mcu_device::addq_w_imm3_das_ifm() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97513,7 +97514,7 @@ void m68000_mcu_device::addq_w_imm3_dais_ifm() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97575,7 +97576,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -97602,7 +97603,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97681,7 +97682,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_ifm() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97706,7 +97707,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_ifm() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97806,7 +97807,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_ifm() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -97831,7 +97832,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_ifm() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97889,7 +97890,7 @@ void m68000_mcu_device::addq_l_imm3_ds_ifm() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -97913,7 +97914,7 @@ void m68000_mcu_device::addq_l_imm3_ds_ifm() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -97938,7 +97939,7 @@ void m68000_mcu_device::addq_l_imm3_as_ifm() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -97961,7 +97962,7 @@ void m68000_mcu_device::addq_l_imm3_as_ifm() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -97983,7 +97984,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ifm() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98031,7 +98032,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ifm() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98056,7 +98057,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ifm() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98110,7 +98111,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ifm() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98161,7 +98162,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ifm() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98186,7 +98187,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ifm() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98239,7 +98240,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ifm() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -98292,7 +98293,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ifm() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98317,7 +98318,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ifm() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98392,7 +98393,7 @@ void m68000_mcu_device::addq_l_imm3_das_ifm() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98440,7 +98441,7 @@ void m68000_mcu_device::addq_l_imm3_das_ifm() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98465,7 +98466,7 @@ void m68000_mcu_device::addq_l_imm3_das_ifm() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98517,7 +98518,7 @@ void m68000_mcu_device::addq_l_imm3_dais_ifm() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -98578,7 +98579,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98626,7 +98627,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98651,7 +98652,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98728,7 +98729,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ifm() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98776,7 +98777,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ifm() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98801,7 +98802,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ifm() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -98899,7 +98900,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ifm() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -98947,7 +98948,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ifm() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98972,7 +98973,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ifm() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -99028,7 +99029,7 @@ void m68000_mcu_device::st_ds_ifm() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -99040,7 +99041,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99067,7 +99068,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99092,7 +99093,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -99107,7 +99108,7 @@ void m68000_mcu_device::dbt_ds_rel16_ifm() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -99119,13 +99120,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99153,7 +99154,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -99161,7 +99162,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99185,11 +99186,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99219,13 +99220,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99255,7 +99256,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99286,11 +99287,11 @@ void m68000_mcu_device::st_ais_ifm() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99310,7 +99311,7 @@ void m68000_mcu_device::st_ais_ifm() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99320,7 +99321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99344,7 +99345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99372,7 +99373,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99400,12 +99401,12 @@ void m68000_mcu_device::st_aips_ifm() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99426,7 +99427,7 @@ void m68000_mcu_device::st_aips_ifm() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99436,7 +99437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99460,7 +99461,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99488,7 +99489,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99515,7 +99516,7 @@ void m68000_mcu_device::st_pais_ifm() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99523,7 +99524,7 @@ void m68000_mcu_device::st_pais_ifm() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99544,7 +99545,7 @@ void m68000_mcu_device::st_pais_ifm() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99554,7 +99555,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99578,7 +99579,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99606,7 +99607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99631,7 +99632,7 @@ void m68000_mcu_device::st_das_ifm() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99654,11 +99655,11 @@ void m68000_mcu_device::st_das_ifm() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99678,7 +99679,7 @@ void m68000_mcu_device::st_das_ifm() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99688,7 +99689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99712,7 +99713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99740,7 +99741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99763,14 +99764,14 @@ void m68000_mcu_device::st_dais_ifm() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99778,7 +99779,7 @@ void m68000_mcu_device::st_dais_ifm() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99802,7 +99803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99828,11 +99829,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -99852,7 +99853,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99862,7 +99863,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -99886,7 +99887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99914,7 +99915,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -99941,7 +99942,7 @@ void m68000_mcu_device::st_adr16_ifm() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -99964,7 +99965,7 @@ void m68000_mcu_device::st_adr16_ifm() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -99985,7 +99986,7 @@ void m68000_mcu_device::st_adr16_ifm() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -99995,7 +99996,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100019,7 +100020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100047,7 +100048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100072,7 +100073,7 @@ void m68000_mcu_device::st_adr32_ifm() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100096,7 +100097,7 @@ void m68000_mcu_device::st_adr32_ifm() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100119,7 +100120,7 @@ void m68000_mcu_device::st_adr32_ifm() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100140,7 +100141,7 @@ void m68000_mcu_device::st_adr32_ifm() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -100150,7 +100151,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -100174,7 +100175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100202,7 +100203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -100229,7 +100230,7 @@ void m68000_mcu_device::subq_b_imm3_ds_ifm() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100268,7 +100269,7 @@ void m68000_mcu_device::subq_b_imm3_ais_ifm() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100292,7 +100293,7 @@ void m68000_mcu_device::subq_b_imm3_ais_ifm() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100349,7 +100350,7 @@ void m68000_mcu_device::subq_b_imm3_aips_ifm() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100371,7 +100372,7 @@ void m68000_mcu_device::subq_b_imm3_aips_ifm() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100430,7 +100431,7 @@ void m68000_mcu_device::subq_b_imm3_pais_ifm() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100452,7 +100453,7 @@ void m68000_mcu_device::subq_b_imm3_pais_ifm() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100525,7 +100526,7 @@ void m68000_mcu_device::subq_b_imm3_das_ifm() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100549,7 +100550,7 @@ void m68000_mcu_device::subq_b_imm3_das_ifm() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100598,7 +100599,7 @@ void m68000_mcu_device::subq_b_imm3_dais_ifm() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100660,7 +100661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -100684,7 +100685,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100758,7 +100759,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_ifm() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100780,7 +100781,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_ifm() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100875,7 +100876,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_ifm() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100897,7 +100898,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_ifm() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100950,7 +100951,7 @@ void m68000_mcu_device::subq_w_imm3_ds_ifm() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -100991,7 +100992,7 @@ void m68000_mcu_device::subq_w_imm3_as_ifm() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101014,7 +101015,7 @@ void m68000_mcu_device::subq_w_imm3_as_ifm() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101036,7 +101037,7 @@ void m68000_mcu_device::subq_w_imm3_ais_ifm() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101063,7 +101064,7 @@ void m68000_mcu_device::subq_w_imm3_ais_ifm() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101125,7 +101126,7 @@ void m68000_mcu_device::subq_w_imm3_aips_ifm() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101150,7 +101151,7 @@ void m68000_mcu_device::subq_w_imm3_aips_ifm() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101214,7 +101215,7 @@ void m68000_mcu_device::subq_w_imm3_pais_ifm() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101239,7 +101240,7 @@ void m68000_mcu_device::subq_w_imm3_pais_ifm() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101317,7 +101318,7 @@ void m68000_mcu_device::subq_w_imm3_das_ifm() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101344,7 +101345,7 @@ void m68000_mcu_device::subq_w_imm3_das_ifm() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101398,7 +101399,7 @@ void m68000_mcu_device::subq_w_imm3_dais_ifm() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -101460,7 +101461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -101487,7 +101488,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101566,7 +101567,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_ifm() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101591,7 +101592,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_ifm() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101691,7 +101692,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_ifm() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101716,7 +101717,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_ifm() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101774,7 +101775,7 @@ void m68000_mcu_device::subq_l_imm3_ds_ifm() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -101798,7 +101799,7 @@ void m68000_mcu_device::subq_l_imm3_ds_ifm() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -101823,7 +101824,7 @@ void m68000_mcu_device::subq_l_imm3_as_ifm() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -101846,7 +101847,7 @@ void m68000_mcu_device::subq_l_imm3_as_ifm() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -101868,7 +101869,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ifm() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101916,7 +101917,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ifm() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101941,7 +101942,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ifm() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -101995,7 +101996,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ifm() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102046,7 +102047,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ifm() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102071,7 +102072,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ifm() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102124,7 +102125,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ifm() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -102177,7 +102178,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ifm() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102202,7 +102203,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ifm() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102277,7 +102278,7 @@ void m68000_mcu_device::subq_l_imm3_das_ifm() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102325,7 +102326,7 @@ void m68000_mcu_device::subq_l_imm3_das_ifm() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102350,7 +102351,7 @@ void m68000_mcu_device::subq_l_imm3_das_ifm() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102402,7 +102403,7 @@ void m68000_mcu_device::subq_l_imm3_dais_ifm() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -102463,7 +102464,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102511,7 +102512,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102536,7 +102537,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102613,7 +102614,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ifm() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102661,7 +102662,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ifm() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102686,7 +102687,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ifm() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102784,7 +102785,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ifm() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102832,7 +102833,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ifm() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102857,7 +102858,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ifm() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -102913,7 +102914,7 @@ void m68000_mcu_device::sf_ds_ifm() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -102925,7 +102926,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -102952,7 +102953,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102977,7 +102978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -102992,7 +102993,7 @@ void m68000_mcu_device::dbra_ds_rel16_ifm() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -103004,13 +103005,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103038,7 +103039,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -103046,7 +103047,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103070,11 +103071,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103104,13 +103105,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103140,7 +103141,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103171,11 +103172,11 @@ void m68000_mcu_device::sf_ais_ifm() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103195,7 +103196,7 @@ void m68000_mcu_device::sf_ais_ifm() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103205,7 +103206,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103229,7 +103230,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103257,7 +103258,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103285,12 +103286,12 @@ void m68000_mcu_device::sf_aips_ifm() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103311,7 +103312,7 @@ void m68000_mcu_device::sf_aips_ifm() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103321,7 +103322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103345,7 +103346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103373,7 +103374,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103400,7 +103401,7 @@ void m68000_mcu_device::sf_pais_ifm() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103408,7 +103409,7 @@ void m68000_mcu_device::sf_pais_ifm() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103429,7 +103430,7 @@ void m68000_mcu_device::sf_pais_ifm() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103439,7 +103440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103463,7 +103464,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103491,7 +103492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103516,7 +103517,7 @@ void m68000_mcu_device::sf_das_ifm() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103539,11 +103540,11 @@ void m68000_mcu_device::sf_das_ifm() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103563,7 +103564,7 @@ void m68000_mcu_device::sf_das_ifm() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103573,7 +103574,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103597,7 +103598,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103625,7 +103626,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103648,14 +103649,14 @@ void m68000_mcu_device::sf_dais_ifm() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103663,7 +103664,7 @@ void m68000_mcu_device::sf_dais_ifm() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103687,7 +103688,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103713,11 +103714,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -103737,7 +103738,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103747,7 +103748,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103771,7 +103772,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103799,7 +103800,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103826,7 +103827,7 @@ void m68000_mcu_device::sf_adr16_ifm() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103849,7 +103850,7 @@ void m68000_mcu_device::sf_adr16_ifm() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103870,7 +103871,7 @@ void m68000_mcu_device::sf_adr16_ifm() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -103880,7 +103881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103904,7 +103905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103932,7 +103933,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -103957,7 +103958,7 @@ void m68000_mcu_device::sf_adr32_ifm() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -103981,7 +103982,7 @@ void m68000_mcu_device::sf_adr32_ifm() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104004,7 +104005,7 @@ void m68000_mcu_device::sf_adr32_ifm() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104025,7 +104026,7 @@ void m68000_mcu_device::sf_adr32_ifm() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104035,7 +104036,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104059,7 +104060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104087,7 +104088,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104114,7 +104115,7 @@ void m68000_mcu_device::shi_ds_ifm() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -104126,7 +104127,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104153,7 +104154,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104178,7 +104179,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -104193,7 +104194,7 @@ void m68000_mcu_device::dbhi_ds_rel16_ifm() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -104205,13 +104206,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104239,7 +104240,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -104247,7 +104248,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104271,11 +104272,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104305,13 +104306,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104341,7 +104342,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104372,11 +104373,11 @@ void m68000_mcu_device::shi_ais_ifm() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104396,7 +104397,7 @@ void m68000_mcu_device::shi_ais_ifm() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104406,7 +104407,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104430,7 +104431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104458,7 +104459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104486,12 +104487,12 @@ void m68000_mcu_device::shi_aips_ifm() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104512,7 +104513,7 @@ void m68000_mcu_device::shi_aips_ifm() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104522,7 +104523,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104546,7 +104547,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104574,7 +104575,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104601,7 +104602,7 @@ void m68000_mcu_device::shi_pais_ifm() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -104609,7 +104610,7 @@ void m68000_mcu_device::shi_pais_ifm() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -104630,7 +104631,7 @@ void m68000_mcu_device::shi_pais_ifm() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104640,7 +104641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104664,7 +104665,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104692,7 +104693,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104717,7 +104718,7 @@ void m68000_mcu_device::shi_das_ifm() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104740,11 +104741,11 @@ void m68000_mcu_device::shi_das_ifm() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104764,7 +104765,7 @@ void m68000_mcu_device::shi_das_ifm() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104774,7 +104775,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104798,7 +104799,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104826,7 +104827,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -104849,14 +104850,14 @@ void m68000_mcu_device::shi_dais_ifm() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -104864,7 +104865,7 @@ void m68000_mcu_device::shi_dais_ifm() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104888,7 +104889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104914,11 +104915,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -104938,7 +104939,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -104948,7 +104949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -104972,7 +104973,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105000,7 +105001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105027,7 +105028,7 @@ void m68000_mcu_device::shi_adr16_ifm() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105050,7 +105051,7 @@ void m68000_mcu_device::shi_adr16_ifm() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105071,7 +105072,7 @@ void m68000_mcu_device::shi_adr16_ifm() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105081,7 +105082,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105105,7 +105106,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105133,7 +105134,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105158,7 +105159,7 @@ void m68000_mcu_device::shi_adr32_ifm() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105182,7 +105183,7 @@ void m68000_mcu_device::shi_adr32_ifm() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105205,7 +105206,7 @@ void m68000_mcu_device::shi_adr32_ifm() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105226,7 +105227,7 @@ void m68000_mcu_device::shi_adr32_ifm() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105236,7 +105237,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105260,7 +105261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105288,7 +105289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105315,7 +105316,7 @@ void m68000_mcu_device::sls_ds_ifm() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -105327,7 +105328,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105354,7 +105355,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105379,7 +105380,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -105394,7 +105395,7 @@ void m68000_mcu_device::dbls_ds_rel16_ifm() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -105406,13 +105407,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105440,7 +105441,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -105448,7 +105449,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105472,11 +105473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105506,13 +105507,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105542,7 +105543,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105573,11 +105574,11 @@ void m68000_mcu_device::sls_ais_ifm() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105597,7 +105598,7 @@ void m68000_mcu_device::sls_ais_ifm() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105607,7 +105608,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105631,7 +105632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105659,7 +105660,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105687,12 +105688,12 @@ void m68000_mcu_device::sls_aips_ifm() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105713,7 +105714,7 @@ void m68000_mcu_device::sls_aips_ifm() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105723,7 +105724,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105747,7 +105748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105775,7 +105776,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105802,7 +105803,7 @@ void m68000_mcu_device::sls_pais_ifm() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -105810,7 +105811,7 @@ void m68000_mcu_device::sls_pais_ifm() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -105831,7 +105832,7 @@ void m68000_mcu_device::sls_pais_ifm() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105841,7 +105842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105865,7 +105866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -105893,7 +105894,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -105918,7 +105919,7 @@ void m68000_mcu_device::sls_das_ifm() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105941,11 +105942,11 @@ void m68000_mcu_device::sls_das_ifm() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -105965,7 +105966,7 @@ void m68000_mcu_device::sls_das_ifm() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -105975,7 +105976,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -105999,7 +106000,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106027,7 +106028,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106050,14 +106051,14 @@ void m68000_mcu_device::sls_dais_ifm() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -106065,7 +106066,7 @@ void m68000_mcu_device::sls_dais_ifm() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106089,7 +106090,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106115,11 +106116,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106139,7 +106140,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106149,7 +106150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106173,7 +106174,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106201,7 +106202,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106228,7 +106229,7 @@ void m68000_mcu_device::sls_adr16_ifm() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106251,7 +106252,7 @@ void m68000_mcu_device::sls_adr16_ifm() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106272,7 +106273,7 @@ void m68000_mcu_device::sls_adr16_ifm() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106282,7 +106283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106306,7 +106307,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106334,7 +106335,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106359,7 +106360,7 @@ void m68000_mcu_device::sls_adr32_ifm() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106383,7 +106384,7 @@ void m68000_mcu_device::sls_adr32_ifm() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106406,7 +106407,7 @@ void m68000_mcu_device::sls_adr32_ifm() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106427,7 +106428,7 @@ void m68000_mcu_device::sls_adr32_ifm() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106437,7 +106438,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106461,7 +106462,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106489,7 +106490,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106516,7 +106517,7 @@ void m68000_mcu_device::scc_ds_ifm() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -106528,7 +106529,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106555,7 +106556,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106580,7 +106581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -106595,7 +106596,7 @@ void m68000_mcu_device::dbcc_ds_rel16_ifm() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -106607,13 +106608,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106641,7 +106642,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -106649,7 +106650,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106673,11 +106674,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106707,13 +106708,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106743,7 +106744,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106774,11 +106775,11 @@ void m68000_mcu_device::scc_ais_ifm() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -106798,7 +106799,7 @@ void m68000_mcu_device::scc_ais_ifm() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106808,7 +106809,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106832,7 +106833,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106860,7 +106861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -106888,12 +106889,12 @@ void m68000_mcu_device::scc_aips_ifm() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -106914,7 +106915,7 @@ void m68000_mcu_device::scc_aips_ifm() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -106924,7 +106925,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -106948,7 +106949,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -106976,7 +106977,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107003,7 +107004,7 @@ void m68000_mcu_device::scc_pais_ifm() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -107011,7 +107012,7 @@ void m68000_mcu_device::scc_pais_ifm() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107032,7 +107033,7 @@ void m68000_mcu_device::scc_pais_ifm() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107042,7 +107043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107066,7 +107067,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107094,7 +107095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107119,7 +107120,7 @@ void m68000_mcu_device::scc_das_ifm() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107142,11 +107143,11 @@ void m68000_mcu_device::scc_das_ifm() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107166,7 +107167,7 @@ void m68000_mcu_device::scc_das_ifm() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107176,7 +107177,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107200,7 +107201,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107228,7 +107229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107251,14 +107252,14 @@ void m68000_mcu_device::scc_dais_ifm() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -107266,7 +107267,7 @@ void m68000_mcu_device::scc_dais_ifm() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107290,7 +107291,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107316,11 +107317,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107340,7 +107341,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107350,7 +107351,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107374,7 +107375,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107402,7 +107403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107429,7 +107430,7 @@ void m68000_mcu_device::scc_adr16_ifm() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107452,7 +107453,7 @@ void m68000_mcu_device::scc_adr16_ifm() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107473,7 +107474,7 @@ void m68000_mcu_device::scc_adr16_ifm() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107483,7 +107484,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107507,7 +107508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107535,7 +107536,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107560,7 +107561,7 @@ void m68000_mcu_device::scc_adr32_ifm() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107584,7 +107585,7 @@ void m68000_mcu_device::scc_adr32_ifm() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107607,7 +107608,7 @@ void m68000_mcu_device::scc_adr32_ifm() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -107628,7 +107629,7 @@ void m68000_mcu_device::scc_adr32_ifm() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -107638,7 +107639,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107662,7 +107663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107690,7 +107691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -107717,7 +107718,7 @@ void m68000_mcu_device::scs_ds_ifm() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -107729,7 +107730,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107756,7 +107757,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107781,7 +107782,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -107796,7 +107797,7 @@ void m68000_mcu_device::dbcs_ds_rel16_ifm() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -107808,13 +107809,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -107842,7 +107843,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -107850,7 +107851,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107874,11 +107875,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107908,13 +107909,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107944,7 +107945,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -107975,11 +107976,11 @@ void m68000_mcu_device::scs_ais_ifm() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -107999,7 +108000,7 @@ void m68000_mcu_device::scs_ais_ifm() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108009,7 +108010,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108033,7 +108034,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108061,7 +108062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108089,12 +108090,12 @@ void m68000_mcu_device::scs_aips_ifm() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108115,7 +108116,7 @@ void m68000_mcu_device::scs_aips_ifm() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108125,7 +108126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108149,7 +108150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108177,7 +108178,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108204,7 +108205,7 @@ void m68000_mcu_device::scs_pais_ifm() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -108212,7 +108213,7 @@ void m68000_mcu_device::scs_pais_ifm() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108233,7 +108234,7 @@ void m68000_mcu_device::scs_pais_ifm() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108243,7 +108244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108267,7 +108268,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108295,7 +108296,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108320,7 +108321,7 @@ void m68000_mcu_device::scs_das_ifm() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108343,11 +108344,11 @@ void m68000_mcu_device::scs_das_ifm() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108367,7 +108368,7 @@ void m68000_mcu_device::scs_das_ifm() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108377,7 +108378,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108401,7 +108402,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108429,7 +108430,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108452,14 +108453,14 @@ void m68000_mcu_device::scs_dais_ifm() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -108467,7 +108468,7 @@ void m68000_mcu_device::scs_dais_ifm() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108491,7 +108492,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108517,11 +108518,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -108541,7 +108542,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108551,7 +108552,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108575,7 +108576,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108603,7 +108604,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108630,7 +108631,7 @@ void m68000_mcu_device::scs_adr16_ifm() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108653,7 +108654,7 @@ void m68000_mcu_device::scs_adr16_ifm() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108674,7 +108675,7 @@ void m68000_mcu_device::scs_adr16_ifm() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108684,7 +108685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108708,7 +108709,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108736,7 +108737,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108761,7 +108762,7 @@ void m68000_mcu_device::scs_adr32_ifm() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108785,7 +108786,7 @@ void m68000_mcu_device::scs_adr32_ifm() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108808,7 +108809,7 @@ void m68000_mcu_device::scs_adr32_ifm() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -108829,7 +108830,7 @@ void m68000_mcu_device::scs_adr32_ifm() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -108839,7 +108840,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108863,7 +108864,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108891,7 +108892,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -108918,7 +108919,7 @@ void m68000_mcu_device::sne_ds_ifm() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -108930,7 +108931,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -108957,7 +108958,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -108982,7 +108983,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -108997,7 +108998,7 @@ void m68000_mcu_device::dbne_ds_rel16_ifm() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -109009,13 +109010,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109043,7 +109044,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -109051,7 +109052,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109075,11 +109076,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109109,13 +109110,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109145,7 +109146,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109176,11 +109177,11 @@ void m68000_mcu_device::sne_ais_ifm() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109200,7 +109201,7 @@ void m68000_mcu_device::sne_ais_ifm() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109210,7 +109211,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109234,7 +109235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109262,7 +109263,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109290,12 +109291,12 @@ void m68000_mcu_device::sne_aips_ifm() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109316,7 +109317,7 @@ void m68000_mcu_device::sne_aips_ifm() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109326,7 +109327,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109350,7 +109351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109378,7 +109379,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109405,7 +109406,7 @@ void m68000_mcu_device::sne_pais_ifm() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -109413,7 +109414,7 @@ void m68000_mcu_device::sne_pais_ifm() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109434,7 +109435,7 @@ void m68000_mcu_device::sne_pais_ifm() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109444,7 +109445,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109468,7 +109469,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109496,7 +109497,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109521,7 +109522,7 @@ void m68000_mcu_device::sne_das_ifm() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109544,11 +109545,11 @@ void m68000_mcu_device::sne_das_ifm() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109568,7 +109569,7 @@ void m68000_mcu_device::sne_das_ifm() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109578,7 +109579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109602,7 +109603,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109630,7 +109631,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109653,14 +109654,14 @@ void m68000_mcu_device::sne_dais_ifm() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -109668,7 +109669,7 @@ void m68000_mcu_device::sne_dais_ifm() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109692,7 +109693,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109718,11 +109719,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -109742,7 +109743,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109752,7 +109753,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109776,7 +109777,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109804,7 +109805,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109831,7 +109832,7 @@ void m68000_mcu_device::sne_adr16_ifm() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109854,7 +109855,7 @@ void m68000_mcu_device::sne_adr16_ifm() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -109875,7 +109876,7 @@ void m68000_mcu_device::sne_adr16_ifm() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -109885,7 +109886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109909,7 +109910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -109937,7 +109938,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -109962,7 +109963,7 @@ void m68000_mcu_device::sne_adr32_ifm() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -109986,7 +109987,7 @@ void m68000_mcu_device::sne_adr32_ifm() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110009,7 +110010,7 @@ void m68000_mcu_device::sne_adr32_ifm() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110030,7 +110031,7 @@ void m68000_mcu_device::sne_adr32_ifm() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110040,7 +110041,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110064,7 +110065,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110092,7 +110093,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110119,7 +110120,7 @@ void m68000_mcu_device::seq_ds_ifm() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -110131,7 +110132,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110158,7 +110159,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110183,7 +110184,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -110198,7 +110199,7 @@ void m68000_mcu_device::dbeq_ds_rel16_ifm() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -110210,13 +110211,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110244,7 +110245,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -110252,7 +110253,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110276,11 +110277,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110310,13 +110311,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110346,7 +110347,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110377,11 +110378,11 @@ void m68000_mcu_device::seq_ais_ifm() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110401,7 +110402,7 @@ void m68000_mcu_device::seq_ais_ifm() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110411,7 +110412,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110435,7 +110436,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110463,7 +110464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110491,12 +110492,12 @@ void m68000_mcu_device::seq_aips_ifm() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110517,7 +110518,7 @@ void m68000_mcu_device::seq_aips_ifm() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110527,7 +110528,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110551,7 +110552,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110579,7 +110580,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110606,7 +110607,7 @@ void m68000_mcu_device::seq_pais_ifm() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -110614,7 +110615,7 @@ void m68000_mcu_device::seq_pais_ifm() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -110635,7 +110636,7 @@ void m68000_mcu_device::seq_pais_ifm() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110645,7 +110646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110669,7 +110670,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110697,7 +110698,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110722,7 +110723,7 @@ void m68000_mcu_device::seq_das_ifm() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110745,11 +110746,11 @@ void m68000_mcu_device::seq_das_ifm() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110769,7 +110770,7 @@ void m68000_mcu_device::seq_das_ifm() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110779,7 +110780,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110803,7 +110804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -110831,7 +110832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -110854,14 +110855,14 @@ void m68000_mcu_device::seq_dais_ifm() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -110869,7 +110870,7 @@ void m68000_mcu_device::seq_dais_ifm() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110893,7 +110894,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110919,11 +110920,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -110943,7 +110944,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -110953,7 +110954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -110977,7 +110978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111005,7 +111006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111032,7 +111033,7 @@ void m68000_mcu_device::seq_adr16_ifm() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111055,7 +111056,7 @@ void m68000_mcu_device::seq_adr16_ifm() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111076,7 +111077,7 @@ void m68000_mcu_device::seq_adr16_ifm() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111086,7 +111087,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111110,7 +111111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111138,7 +111139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111163,7 +111164,7 @@ void m68000_mcu_device::seq_adr32_ifm() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111187,7 +111188,7 @@ void m68000_mcu_device::seq_adr32_ifm() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111210,7 +111211,7 @@ void m68000_mcu_device::seq_adr32_ifm() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111231,7 +111232,7 @@ void m68000_mcu_device::seq_adr32_ifm() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111241,7 +111242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111265,7 +111266,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111293,7 +111294,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111320,7 +111321,7 @@ void m68000_mcu_device::svc_ds_ifm() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -111332,7 +111333,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111359,7 +111360,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111384,7 +111385,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -111399,7 +111400,7 @@ void m68000_mcu_device::dbvc_ds_rel16_ifm() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -111411,13 +111412,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111445,7 +111446,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -111453,7 +111454,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111477,11 +111478,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111511,13 +111512,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111547,7 +111548,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111578,11 +111579,11 @@ void m68000_mcu_device::svc_ais_ifm() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111602,7 +111603,7 @@ void m68000_mcu_device::svc_ais_ifm() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111612,7 +111613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111636,7 +111637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111664,7 +111665,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111692,12 +111693,12 @@ void m68000_mcu_device::svc_aips_ifm() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111718,7 +111719,7 @@ void m68000_mcu_device::svc_aips_ifm() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111728,7 +111729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111752,7 +111753,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111780,7 +111781,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111807,7 +111808,7 @@ void m68000_mcu_device::svc_pais_ifm() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -111815,7 +111816,7 @@ void m68000_mcu_device::svc_pais_ifm() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -111836,7 +111837,7 @@ void m68000_mcu_device::svc_pais_ifm() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111846,7 +111847,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111870,7 +111871,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -111898,7 +111899,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -111923,7 +111924,7 @@ void m68000_mcu_device::svc_das_ifm() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -111946,11 +111947,11 @@ void m68000_mcu_device::svc_das_ifm() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -111970,7 +111971,7 @@ void m68000_mcu_device::svc_das_ifm() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -111980,7 +111981,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112004,7 +112005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112032,7 +112033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112055,14 +112056,14 @@ void m68000_mcu_device::svc_dais_ifm() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -112070,7 +112071,7 @@ void m68000_mcu_device::svc_dais_ifm() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112094,7 +112095,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112120,11 +112121,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112144,7 +112145,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112154,7 +112155,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112178,7 +112179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112206,7 +112207,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112233,7 +112234,7 @@ void m68000_mcu_device::svc_adr16_ifm() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112256,7 +112257,7 @@ void m68000_mcu_device::svc_adr16_ifm() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112277,7 +112278,7 @@ void m68000_mcu_device::svc_adr16_ifm() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112287,7 +112288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112311,7 +112312,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112339,7 +112340,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112364,7 +112365,7 @@ void m68000_mcu_device::svc_adr32_ifm() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112388,7 +112389,7 @@ void m68000_mcu_device::svc_adr32_ifm() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112411,7 +112412,7 @@ void m68000_mcu_device::svc_adr32_ifm() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112432,7 +112433,7 @@ void m68000_mcu_device::svc_adr32_ifm() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112442,7 +112443,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112466,7 +112467,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112494,7 +112495,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112521,7 +112522,7 @@ void m68000_mcu_device::svs_ds_ifm() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112533,7 +112534,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112560,7 +112561,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112585,7 +112586,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112600,7 +112601,7 @@ void m68000_mcu_device::dbvs_ds_rel16_ifm() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112612,13 +112613,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112646,7 +112647,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112654,7 +112655,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112678,11 +112679,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112712,13 +112713,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112748,7 +112749,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112779,11 +112780,11 @@ void m68000_mcu_device::svs_ais_ifm() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -112803,7 +112804,7 @@ void m68000_mcu_device::svs_ais_ifm() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112813,7 +112814,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112837,7 +112838,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112865,7 +112866,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -112893,12 +112894,12 @@ void m68000_mcu_device::svs_aips_ifm() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -112919,7 +112920,7 @@ void m68000_mcu_device::svs_aips_ifm() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -112929,7 +112930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -112953,7 +112954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112981,7 +112982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113008,7 +113009,7 @@ void m68000_mcu_device::svs_pais_ifm() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113016,7 +113017,7 @@ void m68000_mcu_device::svs_pais_ifm() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113037,7 +113038,7 @@ void m68000_mcu_device::svs_pais_ifm() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113047,7 +113048,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113071,7 +113072,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113099,7 +113100,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113124,7 +113125,7 @@ void m68000_mcu_device::svs_das_ifm() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113147,11 +113148,11 @@ void m68000_mcu_device::svs_das_ifm() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113171,7 +113172,7 @@ void m68000_mcu_device::svs_das_ifm() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113181,7 +113182,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113205,7 +113206,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113233,7 +113234,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113256,14 +113257,14 @@ void m68000_mcu_device::svs_dais_ifm() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113271,7 +113272,7 @@ void m68000_mcu_device::svs_dais_ifm() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113295,7 +113296,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113321,11 +113322,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -113345,7 +113346,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113355,7 +113356,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113379,7 +113380,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113407,7 +113408,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113434,7 +113435,7 @@ void m68000_mcu_device::svs_adr16_ifm() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113457,7 +113458,7 @@ void m68000_mcu_device::svs_adr16_ifm() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113478,7 +113479,7 @@ void m68000_mcu_device::svs_adr16_ifm() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113488,7 +113489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113512,7 +113513,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113540,7 +113541,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113565,7 +113566,7 @@ void m68000_mcu_device::svs_adr32_ifm() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113589,7 +113590,7 @@ void m68000_mcu_device::svs_adr32_ifm() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113612,7 +113613,7 @@ void m68000_mcu_device::svs_adr32_ifm() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113633,7 +113634,7 @@ void m68000_mcu_device::svs_adr32_ifm() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113643,7 +113644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113667,7 +113668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113695,7 +113696,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -113722,7 +113723,7 @@ void m68000_mcu_device::spl_ds_ifm() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -113734,7 +113735,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113761,7 +113762,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113786,7 +113787,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -113801,7 +113802,7 @@ void m68000_mcu_device::dbpl_ds_rel16_ifm() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -113813,13 +113814,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113847,7 +113848,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -113855,7 +113856,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113879,11 +113880,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113913,13 +113914,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113949,7 +113950,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -113980,11 +113981,11 @@ void m68000_mcu_device::spl_ais_ifm() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114004,7 +114005,7 @@ void m68000_mcu_device::spl_ais_ifm() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114014,7 +114015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114038,7 +114039,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114066,7 +114067,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114094,12 +114095,12 @@ void m68000_mcu_device::spl_aips_ifm() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114120,7 +114121,7 @@ void m68000_mcu_device::spl_aips_ifm() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114130,7 +114131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114154,7 +114155,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114182,7 +114183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114209,7 +114210,7 @@ void m68000_mcu_device::spl_pais_ifm() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114217,7 +114218,7 @@ void m68000_mcu_device::spl_pais_ifm() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114238,7 +114239,7 @@ void m68000_mcu_device::spl_pais_ifm() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114248,7 +114249,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114272,7 +114273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114300,7 +114301,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114325,7 +114326,7 @@ void m68000_mcu_device::spl_das_ifm() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114348,11 +114349,11 @@ void m68000_mcu_device::spl_das_ifm() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114372,7 +114373,7 @@ void m68000_mcu_device::spl_das_ifm() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114382,7 +114383,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114406,7 +114407,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114434,7 +114435,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114457,14 +114458,14 @@ void m68000_mcu_device::spl_dais_ifm() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114472,7 +114473,7 @@ void m68000_mcu_device::spl_dais_ifm() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114496,7 +114497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114522,11 +114523,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -114546,7 +114547,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114556,7 +114557,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114580,7 +114581,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114608,7 +114609,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114635,7 +114636,7 @@ void m68000_mcu_device::spl_adr16_ifm() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114658,7 +114659,7 @@ void m68000_mcu_device::spl_adr16_ifm() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114679,7 +114680,7 @@ void m68000_mcu_device::spl_adr16_ifm() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114689,7 +114690,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114713,7 +114714,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114741,7 +114742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114766,7 +114767,7 @@ void m68000_mcu_device::spl_adr32_ifm() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114790,7 +114791,7 @@ void m68000_mcu_device::spl_adr32_ifm() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114813,7 +114814,7 @@ void m68000_mcu_device::spl_adr32_ifm() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -114834,7 +114835,7 @@ void m68000_mcu_device::spl_adr32_ifm() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114844,7 +114845,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114868,7 +114869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114896,7 +114897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -114923,7 +114924,7 @@ void m68000_mcu_device::smi_ds_ifm() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -114935,7 +114936,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -114962,7 +114963,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114987,7 +114988,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -115002,7 +115003,7 @@ void m68000_mcu_device::dbmi_ds_rel16_ifm() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -115014,13 +115015,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115048,7 +115049,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -115056,7 +115057,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115080,11 +115081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115114,13 +115115,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115150,7 +115151,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115181,11 +115182,11 @@ void m68000_mcu_device::smi_ais_ifm() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115205,7 +115206,7 @@ void m68000_mcu_device::smi_ais_ifm() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115215,7 +115216,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115239,7 +115240,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115267,7 +115268,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115295,12 +115296,12 @@ void m68000_mcu_device::smi_aips_ifm() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115321,7 +115322,7 @@ void m68000_mcu_device::smi_aips_ifm() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115331,7 +115332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115355,7 +115356,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115383,7 +115384,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115410,7 +115411,7 @@ void m68000_mcu_device::smi_pais_ifm() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115418,7 +115419,7 @@ void m68000_mcu_device::smi_pais_ifm() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115439,7 +115440,7 @@ void m68000_mcu_device::smi_pais_ifm() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115449,7 +115450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115473,7 +115474,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115501,7 +115502,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115526,7 +115527,7 @@ void m68000_mcu_device::smi_das_ifm() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115549,11 +115550,11 @@ void m68000_mcu_device::smi_das_ifm() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115573,7 +115574,7 @@ void m68000_mcu_device::smi_das_ifm() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115583,7 +115584,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115607,7 +115608,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115635,7 +115636,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115658,14 +115659,14 @@ void m68000_mcu_device::smi_dais_ifm() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115673,7 +115674,7 @@ void m68000_mcu_device::smi_dais_ifm() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115697,7 +115698,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115723,11 +115724,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -115747,7 +115748,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115757,7 +115758,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115781,7 +115782,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115809,7 +115810,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115836,7 +115837,7 @@ void m68000_mcu_device::smi_adr16_ifm() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115859,7 +115860,7 @@ void m68000_mcu_device::smi_adr16_ifm() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -115880,7 +115881,7 @@ void m68000_mcu_device::smi_adr16_ifm() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -115890,7 +115891,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115914,7 +115915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -115942,7 +115943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -115967,7 +115968,7 @@ void m68000_mcu_device::smi_adr32_ifm() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -115991,7 +115992,7 @@ void m68000_mcu_device::smi_adr32_ifm() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116014,7 +116015,7 @@ void m68000_mcu_device::smi_adr32_ifm() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116035,7 +116036,7 @@ void m68000_mcu_device::smi_adr32_ifm() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116045,7 +116046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116069,7 +116070,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116097,7 +116098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116124,7 +116125,7 @@ void m68000_mcu_device::sge_ds_ifm() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -116136,7 +116137,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116163,7 +116164,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116188,7 +116189,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116203,7 +116204,7 @@ void m68000_mcu_device::dbge_ds_rel16_ifm() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -116215,13 +116216,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116249,7 +116250,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -116257,7 +116258,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116281,11 +116282,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116315,13 +116316,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116351,7 +116352,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116382,11 +116383,11 @@ void m68000_mcu_device::sge_ais_ifm() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116406,7 +116407,7 @@ void m68000_mcu_device::sge_ais_ifm() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116416,7 +116417,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116440,7 +116441,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116468,7 +116469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116496,12 +116497,12 @@ void m68000_mcu_device::sge_aips_ifm() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116522,7 +116523,7 @@ void m68000_mcu_device::sge_aips_ifm() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116532,7 +116533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116556,7 +116557,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116584,7 +116585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116611,7 +116612,7 @@ void m68000_mcu_device::sge_pais_ifm() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116619,7 +116620,7 @@ void m68000_mcu_device::sge_pais_ifm() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -116640,7 +116641,7 @@ void m68000_mcu_device::sge_pais_ifm() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116650,7 +116651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116674,7 +116675,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116702,7 +116703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116727,7 +116728,7 @@ void m68000_mcu_device::sge_das_ifm() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116750,11 +116751,11 @@ void m68000_mcu_device::sge_das_ifm() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116774,7 +116775,7 @@ void m68000_mcu_device::sge_das_ifm() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116784,7 +116785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116808,7 +116809,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -116836,7 +116837,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -116859,14 +116860,14 @@ void m68000_mcu_device::sge_dais_ifm() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -116874,7 +116875,7 @@ void m68000_mcu_device::sge_dais_ifm() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116898,7 +116899,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116924,11 +116925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -116948,7 +116949,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -116958,7 +116959,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -116982,7 +116983,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117010,7 +117011,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117037,7 +117038,7 @@ void m68000_mcu_device::sge_adr16_ifm() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117060,7 +117061,7 @@ void m68000_mcu_device::sge_adr16_ifm() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117081,7 +117082,7 @@ void m68000_mcu_device::sge_adr16_ifm() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117091,7 +117092,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117115,7 +117116,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117143,7 +117144,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117168,7 +117169,7 @@ void m68000_mcu_device::sge_adr32_ifm() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117192,7 +117193,7 @@ void m68000_mcu_device::sge_adr32_ifm() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117215,7 +117216,7 @@ void m68000_mcu_device::sge_adr32_ifm() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117236,7 +117237,7 @@ void m68000_mcu_device::sge_adr32_ifm() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117246,7 +117247,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117270,7 +117271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117298,7 +117299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117325,7 +117326,7 @@ void m68000_mcu_device::slt_ds_ifm() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117337,7 +117338,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117364,7 +117365,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117389,7 +117390,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117404,7 +117405,7 @@ void m68000_mcu_device::dblt_ds_rel16_ifm() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117416,13 +117417,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117450,7 +117451,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117458,7 +117459,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117482,11 +117483,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117516,13 +117517,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117552,7 +117553,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117583,11 +117584,11 @@ void m68000_mcu_device::slt_ais_ifm() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117607,7 +117608,7 @@ void m68000_mcu_device::slt_ais_ifm() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117617,7 +117618,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117641,7 +117642,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117669,7 +117670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117697,12 +117698,12 @@ void m68000_mcu_device::slt_aips_ifm() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117723,7 +117724,7 @@ void m68000_mcu_device::slt_aips_ifm() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117733,7 +117734,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117757,7 +117758,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117785,7 +117786,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117812,7 +117813,7 @@ void m68000_mcu_device::slt_pais_ifm() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117820,7 +117821,7 @@ void m68000_mcu_device::slt_pais_ifm() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117841,7 +117842,7 @@ void m68000_mcu_device::slt_pais_ifm() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117851,7 +117852,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117875,7 +117876,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117903,7 +117904,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -117928,7 +117929,7 @@ void m68000_mcu_device::slt_das_ifm() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -117951,11 +117952,11 @@ void m68000_mcu_device::slt_das_ifm() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -117975,7 +117976,7 @@ void m68000_mcu_device::slt_das_ifm() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117985,7 +117986,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118009,7 +118010,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118037,7 +118038,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118060,14 +118061,14 @@ void m68000_mcu_device::slt_dais_ifm() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118075,7 +118076,7 @@ void m68000_mcu_device::slt_dais_ifm() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118099,7 +118100,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118125,11 +118126,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118149,7 +118150,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118159,7 +118160,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118183,7 +118184,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118211,7 +118212,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118238,7 +118239,7 @@ void m68000_mcu_device::slt_adr16_ifm() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118261,7 +118262,7 @@ void m68000_mcu_device::slt_adr16_ifm() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118282,7 +118283,7 @@ void m68000_mcu_device::slt_adr16_ifm() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118316,7 +118317,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118344,7 +118345,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118369,7 +118370,7 @@ void m68000_mcu_device::slt_adr32_ifm() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118393,7 +118394,7 @@ void m68000_mcu_device::slt_adr32_ifm() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118416,7 +118417,7 @@ void m68000_mcu_device::slt_adr32_ifm() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118437,7 +118438,7 @@ void m68000_mcu_device::slt_adr32_ifm() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118447,7 +118448,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118471,7 +118472,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118499,7 +118500,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118526,7 +118527,7 @@ void m68000_mcu_device::sgt_ds_ifm() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118538,7 +118539,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118565,7 +118566,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118590,7 +118591,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118605,7 +118606,7 @@ void m68000_mcu_device::dbgt_ds_rel16_ifm() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118617,13 +118618,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118651,7 +118652,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118659,7 +118660,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118683,11 +118684,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118717,13 +118718,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118753,7 +118754,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118784,11 +118785,11 @@ void m68000_mcu_device::sgt_ais_ifm() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -118808,7 +118809,7 @@ void m68000_mcu_device::sgt_ais_ifm() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118818,7 +118819,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118842,7 +118843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118870,7 +118871,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -118898,12 +118899,12 @@ void m68000_mcu_device::sgt_aips_ifm() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118924,7 +118925,7 @@ void m68000_mcu_device::sgt_aips_ifm() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118934,7 +118935,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -118958,7 +118959,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118986,7 +118987,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119013,7 +119014,7 @@ void m68000_mcu_device::sgt_pais_ifm() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119021,7 +119022,7 @@ void m68000_mcu_device::sgt_pais_ifm() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119042,7 +119043,7 @@ void m68000_mcu_device::sgt_pais_ifm() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119052,7 +119053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119076,7 +119077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119104,7 +119105,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119129,7 +119130,7 @@ void m68000_mcu_device::sgt_das_ifm() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119152,11 +119153,11 @@ void m68000_mcu_device::sgt_das_ifm() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119176,7 +119177,7 @@ void m68000_mcu_device::sgt_das_ifm() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119186,7 +119187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119210,7 +119211,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119238,7 +119239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119261,14 +119262,14 @@ void m68000_mcu_device::sgt_dais_ifm() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119276,7 +119277,7 @@ void m68000_mcu_device::sgt_dais_ifm() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119300,7 +119301,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119326,11 +119327,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -119350,7 +119351,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119360,7 +119361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119384,7 +119385,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119412,7 +119413,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119439,7 +119440,7 @@ void m68000_mcu_device::sgt_adr16_ifm() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119462,7 +119463,7 @@ void m68000_mcu_device::sgt_adr16_ifm() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119483,7 +119484,7 @@ void m68000_mcu_device::sgt_adr16_ifm() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119493,7 +119494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119545,7 +119546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119570,7 +119571,7 @@ void m68000_mcu_device::sgt_adr32_ifm() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119594,7 +119595,7 @@ void m68000_mcu_device::sgt_adr32_ifm() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119617,7 +119618,7 @@ void m68000_mcu_device::sgt_adr32_ifm() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119638,7 +119639,7 @@ void m68000_mcu_device::sgt_adr32_ifm() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119648,7 +119649,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119672,7 +119673,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119700,7 +119701,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -119727,7 +119728,7 @@ void m68000_mcu_device::sle_ds_ifm() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119739,7 +119740,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119766,7 +119767,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119791,7 +119792,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119806,7 +119807,7 @@ void m68000_mcu_device::dble_ds_rel16_ifm() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -119818,13 +119819,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119852,7 +119853,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -119860,7 +119861,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119884,11 +119885,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119918,13 +119919,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119954,7 +119955,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -119985,11 +119986,11 @@ void m68000_mcu_device::sle_ais_ifm() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120009,7 +120010,7 @@ void m68000_mcu_device::sle_ais_ifm() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120019,7 +120020,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120043,7 +120044,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120071,7 +120072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120099,12 +120100,12 @@ void m68000_mcu_device::sle_aips_ifm() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120125,7 +120126,7 @@ void m68000_mcu_device::sle_aips_ifm() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120135,7 +120136,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120159,7 +120160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120187,7 +120188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120214,7 +120215,7 @@ void m68000_mcu_device::sle_pais_ifm() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120222,7 +120223,7 @@ void m68000_mcu_device::sle_pais_ifm() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120243,7 +120244,7 @@ void m68000_mcu_device::sle_pais_ifm() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120253,7 +120254,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120277,7 +120278,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120305,7 +120306,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120330,7 +120331,7 @@ void m68000_mcu_device::sle_das_ifm() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120353,11 +120354,11 @@ void m68000_mcu_device::sle_das_ifm() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120377,7 +120378,7 @@ void m68000_mcu_device::sle_das_ifm() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120387,7 +120388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120411,7 +120412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120439,7 +120440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120462,14 +120463,14 @@ void m68000_mcu_device::sle_dais_ifm() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120477,7 +120478,7 @@ void m68000_mcu_device::sle_dais_ifm() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120501,7 +120502,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120527,11 +120528,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -120551,7 +120552,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120561,7 +120562,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120585,7 +120586,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120613,7 +120614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120640,7 +120641,7 @@ void m68000_mcu_device::sle_adr16_ifm() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120663,7 +120664,7 @@ void m68000_mcu_device::sle_adr16_ifm() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120684,7 +120685,7 @@ void m68000_mcu_device::sle_adr16_ifm() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120694,7 +120695,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120718,7 +120719,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120746,7 +120747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -120771,7 +120772,7 @@ void m68000_mcu_device::sle_adr32_ifm() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120795,7 +120796,7 @@ void m68000_mcu_device::sle_adr32_ifm() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120818,7 +120819,7 @@ void m68000_mcu_device::sle_adr32_ifm() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120839,7 +120840,7 @@ void m68000_mcu_device::sle_adr32_ifm() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120849,7 +120850,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -120873,7 +120874,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120901,7 +120902,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -121102,7 +121103,7 @@ void m68000_mcu_device::bsr_rel16_ifm() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -121209,7 +121210,7 @@ void m68000_mcu_device::bsr_rel8_ifm() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -123811,7 +123812,7 @@ void m68000_mcu_device::moveq_imm8o_dd_ifm() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -123851,7 +123852,7 @@ void m68000_mcu_device::or_b_ds_dd_ifm() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123859,7 +123860,7 @@ void m68000_mcu_device::or_b_ds_dd_ifm() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -123892,11 +123893,11 @@ void m68000_mcu_device::or_b_ais_dd_ifm() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -123916,7 +123917,7 @@ void m68000_mcu_device::or_b_ais_dd_ifm() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123924,7 +123925,7 @@ void m68000_mcu_device::or_b_ais_dd_ifm() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -123960,12 +123961,12 @@ void m68000_mcu_device::or_b_aips_dd_ifm() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123986,7 +123987,7 @@ void m68000_mcu_device::or_b_aips_dd_ifm() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -123994,7 +123995,7 @@ void m68000_mcu_device::or_b_aips_dd_ifm() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124029,7 +124030,7 @@ void m68000_mcu_device::or_b_pais_dd_ifm() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124037,7 +124038,7 @@ void m68000_mcu_device::or_b_pais_dd_ifm() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124058,7 +124059,7 @@ void m68000_mcu_device::or_b_pais_dd_ifm() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124066,7 +124067,7 @@ void m68000_mcu_device::or_b_pais_dd_ifm() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124099,7 +124100,7 @@ void m68000_mcu_device::or_b_das_dd_ifm() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124122,11 +124123,11 @@ void m68000_mcu_device::or_b_das_dd_ifm() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124146,7 +124147,7 @@ void m68000_mcu_device::or_b_das_dd_ifm() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124154,7 +124155,7 @@ void m68000_mcu_device::or_b_das_dd_ifm() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124185,14 +124186,14 @@ void m68000_mcu_device::or_b_dais_dd_ifm() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124200,7 +124201,7 @@ void m68000_mcu_device::or_b_dais_dd_ifm() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124224,7 +124225,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124250,11 +124251,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124274,7 +124275,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124282,7 +124283,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124317,7 +124318,7 @@ void m68000_mcu_device::or_b_adr16_dd_ifm() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124340,7 +124341,7 @@ void m68000_mcu_device::or_b_adr16_dd_ifm() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124361,7 +124362,7 @@ void m68000_mcu_device::or_b_adr16_dd_ifm() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124369,7 +124370,7 @@ void m68000_mcu_device::or_b_adr16_dd_ifm() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124402,7 +124403,7 @@ void m68000_mcu_device::or_b_adr32_dd_ifm() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124426,7 +124427,7 @@ void m68000_mcu_device::or_b_adr32_dd_ifm() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124449,7 +124450,7 @@ void m68000_mcu_device::or_b_adr32_dd_ifm() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124470,7 +124471,7 @@ void m68000_mcu_device::or_b_adr32_dd_ifm() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124478,7 +124479,7 @@ void m68000_mcu_device::or_b_adr32_dd_ifm() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124510,7 +124511,7 @@ void m68000_mcu_device::or_b_dpc_dd_ifm() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124533,11 +124534,11 @@ void m68000_mcu_device::or_b_dpc_dd_ifm() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124557,7 +124558,7 @@ void m68000_mcu_device::or_b_dpc_dd_ifm() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124565,7 +124566,7 @@ void m68000_mcu_device::or_b_dpc_dd_ifm() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124595,14 +124596,14 @@ void m68000_mcu_device::or_b_dpci_dd_ifm() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124610,7 +124611,7 @@ void m68000_mcu_device::or_b_dpci_dd_ifm() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124634,7 +124635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124660,11 +124661,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -124684,7 +124685,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124692,7 +124693,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124727,7 +124728,7 @@ void m68000_mcu_device::or_b_imm8_dd_ifm() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124751,7 +124752,7 @@ void m68000_mcu_device::or_b_imm8_dd_ifm() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124759,7 +124760,7 @@ void m68000_mcu_device::or_b_imm8_dd_ifm() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124794,7 +124795,7 @@ void m68000_mcu_device::or_w_ds_dd_ifm() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124802,7 +124803,7 @@ void m68000_mcu_device::or_w_ds_dd_ifm() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124835,11 +124836,11 @@ void m68000_mcu_device::or_w_ais_dd_ifm() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124862,7 +124863,7 @@ void m68000_mcu_device::or_w_ais_dd_ifm() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124870,7 +124871,7 @@ void m68000_mcu_device::or_w_ais_dd_ifm() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124906,12 +124907,12 @@ void m68000_mcu_device::or_w_aips_dd_ifm() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -124935,7 +124936,7 @@ void m68000_mcu_device::or_w_aips_dd_ifm() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -124943,7 +124944,7 @@ void m68000_mcu_device::or_w_aips_dd_ifm() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -124978,7 +124979,7 @@ void m68000_mcu_device::or_w_pais_dd_ifm() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124986,7 +124987,7 @@ void m68000_mcu_device::or_w_pais_dd_ifm() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125010,7 +125011,7 @@ void m68000_mcu_device::or_w_pais_dd_ifm() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125018,7 +125019,7 @@ void m68000_mcu_device::or_w_pais_dd_ifm() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125051,7 +125052,7 @@ void m68000_mcu_device::or_w_das_dd_ifm() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125074,11 +125075,11 @@ void m68000_mcu_device::or_w_das_dd_ifm() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125101,7 +125102,7 @@ void m68000_mcu_device::or_w_das_dd_ifm() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125109,7 +125110,7 @@ void m68000_mcu_device::or_w_das_dd_ifm() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125140,14 +125141,14 @@ void m68000_mcu_device::or_w_dais_dd_ifm() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125155,7 +125156,7 @@ void m68000_mcu_device::or_w_dais_dd_ifm() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125179,7 +125180,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125205,11 +125206,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125232,7 +125233,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125240,7 +125241,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125275,7 +125276,7 @@ void m68000_mcu_device::or_w_adr16_dd_ifm() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125298,7 +125299,7 @@ void m68000_mcu_device::or_w_adr16_dd_ifm() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125322,7 +125323,7 @@ void m68000_mcu_device::or_w_adr16_dd_ifm() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125330,7 +125331,7 @@ void m68000_mcu_device::or_w_adr16_dd_ifm() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125363,7 +125364,7 @@ void m68000_mcu_device::or_w_adr32_dd_ifm() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125387,7 +125388,7 @@ void m68000_mcu_device::or_w_adr32_dd_ifm() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125410,7 +125411,7 @@ void m68000_mcu_device::or_w_adr32_dd_ifm() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125434,7 +125435,7 @@ void m68000_mcu_device::or_w_adr32_dd_ifm() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125442,7 +125443,7 @@ void m68000_mcu_device::or_w_adr32_dd_ifm() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125474,7 +125475,7 @@ void m68000_mcu_device::or_w_dpc_dd_ifm() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125497,11 +125498,11 @@ void m68000_mcu_device::or_w_dpc_dd_ifm() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125524,7 +125525,7 @@ void m68000_mcu_device::or_w_dpc_dd_ifm() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125532,7 +125533,7 @@ void m68000_mcu_device::or_w_dpc_dd_ifm() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125562,14 +125563,14 @@ void m68000_mcu_device::or_w_dpci_dd_ifm() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -125577,7 +125578,7 @@ void m68000_mcu_device::or_w_dpci_dd_ifm() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125601,7 +125602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125627,11 +125628,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125654,7 +125655,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125662,7 +125663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125697,7 +125698,7 @@ void m68000_mcu_device::or_w_imm16_dd_ifm() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125721,7 +125722,7 @@ void m68000_mcu_device::or_w_imm16_dd_ifm() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -125729,7 +125730,7 @@ void m68000_mcu_device::or_w_imm16_dd_ifm() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125764,12 +125765,12 @@ void m68000_mcu_device::or_l_ds_dd_ifm() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125789,7 +125790,7 @@ void m68000_mcu_device::or_l_ds_dd_ifm() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -125798,7 +125799,7 @@ void m68000_mcu_device::or_l_ds_dd_ifm() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125814,7 +125815,7 @@ void m68000_mcu_device::or_l_ais_dd_ifm() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125839,7 +125840,7 @@ void m68000_mcu_device::or_l_ais_dd_ifm() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125862,12 +125863,12 @@ void m68000_mcu_device::or_l_ais_dd_ifm() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125893,7 +125894,7 @@ void m68000_mcu_device::or_l_ais_dd_ifm() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125909,7 +125910,7 @@ void m68000_mcu_device::or_l_aips_dd_ifm() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -125934,11 +125935,11 @@ void m68000_mcu_device::or_l_aips_dd_ifm() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -125961,12 +125962,12 @@ void m68000_mcu_device::or_l_aips_dd_ifm() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125992,7 +125993,7 @@ void m68000_mcu_device::or_l_aips_dd_ifm() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126007,14 +126008,14 @@ void m68000_mcu_device::or_l_pais_dd_ifm() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126038,7 +126039,7 @@ void m68000_mcu_device::or_l_pais_dd_ifm() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126061,12 +126062,12 @@ void m68000_mcu_device::or_l_pais_dd_ifm() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126092,7 +126093,7 @@ void m68000_mcu_device::or_l_pais_dd_ifm() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126108,7 +126109,7 @@ void m68000_mcu_device::or_l_das_dd_ifm() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126130,7 +126131,7 @@ void m68000_mcu_device::or_l_das_dd_ifm() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126155,7 +126156,7 @@ void m68000_mcu_device::or_l_das_dd_ifm() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126178,12 +126179,12 @@ void m68000_mcu_device::or_l_das_dd_ifm() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126209,7 +126210,7 @@ void m68000_mcu_device::or_l_das_dd_ifm() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126223,14 +126224,14 @@ void m68000_mcu_device::or_l_dais_dd_ifm() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126238,7 +126239,7 @@ void m68000_mcu_device::or_l_dais_dd_ifm() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126262,7 +126263,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126287,7 +126288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126312,7 +126313,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126335,12 +126336,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126366,7 +126367,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126384,7 +126385,7 @@ void m68000_mcu_device::or_l_adr16_dd_ifm() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126407,7 +126408,7 @@ void m68000_mcu_device::or_l_adr16_dd_ifm() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126432,7 +126433,7 @@ void m68000_mcu_device::or_l_adr16_dd_ifm() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126455,12 +126456,12 @@ void m68000_mcu_device::or_l_adr16_dd_ifm() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126486,7 +126487,7 @@ void m68000_mcu_device::or_l_adr16_dd_ifm() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126502,7 +126503,7 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126526,7 +126527,7 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126549,7 +126550,7 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -126574,7 +126575,7 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126597,12 +126598,12 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126628,7 +126629,7 @@ void m68000_mcu_device::or_l_adr32_dd_ifm() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126643,7 +126644,7 @@ void m68000_mcu_device::or_l_dpc_dd_ifm() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126665,7 +126666,7 @@ void m68000_mcu_device::or_l_dpc_dd_ifm() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126690,7 +126691,7 @@ void m68000_mcu_device::or_l_dpc_dd_ifm() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126713,12 +126714,12 @@ void m68000_mcu_device::or_l_dpc_dd_ifm() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126744,7 +126745,7 @@ void m68000_mcu_device::or_l_dpc_dd_ifm() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126757,14 +126758,14 @@ void m68000_mcu_device::or_l_dpci_dd_ifm() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -126772,7 +126773,7 @@ void m68000_mcu_device::or_l_dpci_dd_ifm() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126796,7 +126797,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126821,7 +126822,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126846,7 +126847,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126869,12 +126870,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126900,7 +126901,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126916,7 +126917,7 @@ void m68000_mcu_device::or_l_imm32_dd_ifm() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126940,7 +126941,7 @@ void m68000_mcu_device::or_l_imm32_dd_ifm() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126964,12 +126965,12 @@ void m68000_mcu_device::or_l_imm32_dd_ifm() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -126989,7 +126990,7 @@ void m68000_mcu_device::or_l_imm32_dd_ifm() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -126998,7 +126999,7 @@ void m68000_mcu_device::or_l_imm32_dd_ifm() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -127016,13 +127017,13 @@ void m68000_mcu_device::divu_w_ds_dd_ifm() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127035,7 +127036,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127053,7 +127054,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127061,7 +127062,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127086,7 +127087,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127109,7 +127110,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127230,7 +127231,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127260,7 +127261,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127271,7 +127272,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127283,7 +127284,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127303,7 +127304,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127314,7 +127315,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127324,13 +127325,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127341,7 +127342,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127351,7 +127352,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127359,7 +127360,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127394,7 +127395,7 @@ void m68000_mcu_device::divu_w_ais_dd_ifm() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -127420,13 +127421,13 @@ void m68000_mcu_device::divu_w_ais_dd_ifm() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127439,7 +127440,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127457,7 +127458,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127465,7 +127466,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127490,7 +127491,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127513,7 +127514,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127634,7 +127635,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127664,7 +127665,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127675,7 +127676,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127687,7 +127688,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -127707,7 +127708,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -127718,7 +127719,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -127728,13 +127729,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127745,7 +127746,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -127755,7 +127756,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -127763,7 +127764,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127804,7 +127805,7 @@ void m68000_mcu_device::divu_w_aips_dd_ifm() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -127828,13 +127829,13 @@ void m68000_mcu_device::divu_w_aips_dd_ifm() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -127847,7 +127848,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -127865,7 +127866,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -127873,7 +127874,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127898,7 +127899,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -127921,7 +127922,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128042,7 +128043,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128072,7 +128073,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128083,7 +128084,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128095,7 +128096,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128115,7 +128116,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128126,7 +128127,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128136,13 +128137,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128153,7 +128154,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128163,7 +128164,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128171,7 +128172,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128214,7 +128215,7 @@ void m68000_mcu_device::divu_w_pais_dd_ifm() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -128238,13 +128239,13 @@ void m68000_mcu_device::divu_w_pais_dd_ifm() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128257,7 +128258,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128275,7 +128276,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128283,7 +128284,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128308,7 +128309,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128331,7 +128332,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128452,7 +128453,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128482,7 +128483,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128493,7 +128494,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128505,7 +128506,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128525,7 +128526,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128536,7 +128537,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128546,13 +128547,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128563,7 +128564,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128573,7 +128574,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -128581,7 +128582,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128638,7 +128639,7 @@ void m68000_mcu_device::divu_w_das_dd_ifm() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -128664,13 +128665,13 @@ void m68000_mcu_device::divu_w_das_dd_ifm() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -128683,7 +128684,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128701,7 +128702,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -128709,7 +128710,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128734,7 +128735,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128757,7 +128758,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -128878,7 +128879,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128908,7 +128909,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128919,7 +128920,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128931,7 +128932,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -128951,7 +128952,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -128962,7 +128963,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -128972,13 +128973,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -128989,7 +128990,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -128999,7 +129000,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129007,7 +129008,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129040,7 +129041,7 @@ void m68000_mcu_device::divu_w_dais_dd_ifm() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129102,7 +129103,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -129128,13 +129129,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129147,7 +129148,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129165,7 +129166,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129173,7 +129174,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129198,7 +129199,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129221,7 +129222,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129342,7 +129343,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129372,7 +129373,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129383,7 +129384,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129395,7 +129396,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129415,7 +129416,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129426,7 +129427,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129436,13 +129437,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129453,7 +129454,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129463,7 +129464,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129471,7 +129472,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129529,7 +129530,7 @@ void m68000_mcu_device::divu_w_adr16_dd_ifm() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -129553,13 +129554,13 @@ void m68000_mcu_device::divu_w_adr16_dd_ifm() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -129572,7 +129573,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129590,7 +129591,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -129598,7 +129599,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129623,7 +129624,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129646,7 +129647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -129767,7 +129768,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129797,7 +129798,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129808,7 +129809,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129820,7 +129821,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -129840,7 +129841,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -129851,7 +129852,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -129861,13 +129862,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -129878,7 +129879,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -129888,7 +129889,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -129896,7 +129897,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129975,7 +129976,7 @@ void m68000_mcu_device::divu_w_adr32_dd_ifm() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -129999,13 +130000,13 @@ void m68000_mcu_device::divu_w_adr32_dd_ifm() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130018,7 +130019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130036,7 +130037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130044,7 +130045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130069,7 +130070,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130092,7 +130093,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130213,7 +130214,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130243,7 +130244,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130254,7 +130255,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130266,7 +130267,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130286,7 +130287,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130297,7 +130298,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130307,13 +130308,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130324,7 +130325,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130334,7 +130335,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130342,7 +130343,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130398,7 +130399,7 @@ void m68000_mcu_device::divu_w_dpc_dd_ifm() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130424,13 +130425,13 @@ void m68000_mcu_device::divu_w_dpc_dd_ifm() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130443,7 +130444,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130461,7 +130462,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130469,7 +130470,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130494,7 +130495,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130517,7 +130518,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130638,7 +130639,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130668,7 +130669,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130679,7 +130680,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130691,7 +130692,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -130711,7 +130712,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -130722,7 +130723,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -130732,13 +130733,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130749,7 +130750,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -130759,7 +130760,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -130767,7 +130768,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130799,7 +130800,7 @@ void m68000_mcu_device::divu_w_dpci_dd_ifm() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130861,7 +130862,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -130887,13 +130888,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -130906,7 +130907,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -130924,7 +130925,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -130932,7 +130933,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130957,7 +130958,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -130980,7 +130981,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131101,7 +131102,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131131,7 +131132,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131142,7 +131143,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131154,7 +131155,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131174,7 +131175,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131185,7 +131186,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131195,13 +131196,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131212,7 +131213,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131222,7 +131223,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131230,7 +131231,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131290,13 +131291,13 @@ void m68000_mcu_device::divu_w_imm16_dd_ifm() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -131309,7 +131310,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131327,7 +131328,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -131335,7 +131336,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131360,7 +131361,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131383,7 +131384,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -131504,7 +131505,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131534,7 +131535,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131545,7 +131546,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131557,7 +131558,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -131577,7 +131578,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -131588,7 +131589,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -131598,13 +131599,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -131615,7 +131616,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -131625,7 +131626,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -131633,7 +131634,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131670,12 +131671,12 @@ void m68000_mcu_device::sbcd_ds_dd_ifm() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -131720,7 +131721,7 @@ void m68000_mcu_device::sbcd_pais_paid_ifm() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -131760,12 +131761,12 @@ void m68000_mcu_device::sbcd_pais_paid_ifm() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -131815,11 +131816,11 @@ void m68000_mcu_device::or_b_dd_ais_ifm() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -131839,7 +131840,7 @@ void m68000_mcu_device::or_b_dd_ais_ifm() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131866,7 +131867,7 @@ void m68000_mcu_device::or_b_dd_ais_ifm() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131895,12 +131896,12 @@ void m68000_mcu_device::or_b_dd_aips_ifm() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131921,7 +131922,7 @@ void m68000_mcu_device::or_b_dd_aips_ifm() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131948,7 +131949,7 @@ void m68000_mcu_device::or_b_dd_aips_ifm() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -131976,7 +131977,7 @@ void m68000_mcu_device::or_b_dd_pais_ifm() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131984,7 +131985,7 @@ void m68000_mcu_device::or_b_dd_pais_ifm() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132005,7 +132006,7 @@ void m68000_mcu_device::or_b_dd_pais_ifm() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132032,7 +132033,7 @@ void m68000_mcu_device::or_b_dd_pais_ifm() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132058,7 +132059,7 @@ void m68000_mcu_device::or_b_dd_das_ifm() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132081,11 +132082,11 @@ void m68000_mcu_device::or_b_dd_das_ifm() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132105,7 +132106,7 @@ void m68000_mcu_device::or_b_dd_das_ifm() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132132,7 +132133,7 @@ void m68000_mcu_device::or_b_dd_das_ifm() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132156,14 +132157,14 @@ void m68000_mcu_device::or_b_dd_dais_ifm() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132171,7 +132172,7 @@ void m68000_mcu_device::or_b_dd_dais_ifm() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132195,7 +132196,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132221,11 +132222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -132245,7 +132246,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132272,7 +132273,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132300,7 +132301,7 @@ void m68000_mcu_device::or_b_dd_adr16_ifm() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132323,7 +132324,7 @@ void m68000_mcu_device::or_b_dd_adr16_ifm() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132344,7 +132345,7 @@ void m68000_mcu_device::or_b_dd_adr16_ifm() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132371,7 +132372,7 @@ void m68000_mcu_device::or_b_dd_adr16_ifm() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132397,7 +132398,7 @@ void m68000_mcu_device::or_b_dd_adr32_ifm() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132421,7 +132422,7 @@ void m68000_mcu_device::or_b_dd_adr32_ifm() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132444,7 +132445,7 @@ void m68000_mcu_device::or_b_dd_adr32_ifm() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132465,7 +132466,7 @@ void m68000_mcu_device::or_b_dd_adr32_ifm() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132492,7 +132493,7 @@ void m68000_mcu_device::or_b_dd_adr32_ifm() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -132518,11 +132519,11 @@ void m68000_mcu_device::or_w_dd_ais_ifm() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132545,7 +132546,7 @@ void m68000_mcu_device::or_w_dd_ais_ifm() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132572,7 +132573,7 @@ void m68000_mcu_device::or_w_dd_ais_ifm() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132606,12 +132607,12 @@ void m68000_mcu_device::or_w_dd_aips_ifm() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -132635,7 +132636,7 @@ void m68000_mcu_device::or_w_dd_aips_ifm() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132662,7 +132663,7 @@ void m68000_mcu_device::or_w_dd_aips_ifm() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132695,7 +132696,7 @@ void m68000_mcu_device::or_w_dd_pais_ifm() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132703,7 +132704,7 @@ void m68000_mcu_device::or_w_dd_pais_ifm() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -132727,7 +132728,7 @@ void m68000_mcu_device::or_w_dd_pais_ifm() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132754,7 +132755,7 @@ void m68000_mcu_device::or_w_dd_pais_ifm() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132785,7 +132786,7 @@ void m68000_mcu_device::or_w_dd_das_ifm() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132808,11 +132809,11 @@ void m68000_mcu_device::or_w_dd_das_ifm() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132835,7 +132836,7 @@ void m68000_mcu_device::or_w_dd_das_ifm() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132862,7 +132863,7 @@ void m68000_mcu_device::or_w_dd_das_ifm() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -132891,14 +132892,14 @@ void m68000_mcu_device::or_w_dd_dais_ifm() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132906,7 +132907,7 @@ void m68000_mcu_device::or_w_dd_dais_ifm() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132930,7 +132931,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132956,11 +132957,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -132983,7 +132984,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133010,7 +133011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133043,7 +133044,7 @@ void m68000_mcu_device::or_w_dd_adr16_ifm() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133066,7 +133067,7 @@ void m68000_mcu_device::or_w_dd_adr16_ifm() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133090,7 +133091,7 @@ void m68000_mcu_device::or_w_dd_adr16_ifm() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133117,7 +133118,7 @@ void m68000_mcu_device::or_w_dd_adr16_ifm() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133148,7 +133149,7 @@ void m68000_mcu_device::or_w_dd_adr32_ifm() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133172,7 +133173,7 @@ void m68000_mcu_device::or_w_dd_adr32_ifm() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133195,7 +133196,7 @@ void m68000_mcu_device::or_w_dd_adr32_ifm() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133219,7 +133220,7 @@ void m68000_mcu_device::or_w_dd_adr32_ifm() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133246,7 +133247,7 @@ void m68000_mcu_device::or_w_dd_adr32_ifm() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133277,7 +133278,7 @@ void m68000_mcu_device::or_l_dd_ais_ifm() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133302,7 +133303,7 @@ void m68000_mcu_device::or_l_dd_ais_ifm() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133325,7 +133326,7 @@ void m68000_mcu_device::or_l_dd_ais_ifm() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133350,7 +133351,7 @@ void m68000_mcu_device::or_l_dd_ais_ifm() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133375,7 +133376,7 @@ void m68000_mcu_device::or_l_dd_ais_ifm() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133406,7 +133407,7 @@ void m68000_mcu_device::or_l_dd_aips_ifm() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133431,11 +133432,11 @@ void m68000_mcu_device::or_l_dd_aips_ifm() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133458,7 +133459,7 @@ void m68000_mcu_device::or_l_dd_aips_ifm() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133483,7 +133484,7 @@ void m68000_mcu_device::or_l_dd_aips_ifm() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133508,7 +133509,7 @@ void m68000_mcu_device::or_l_dd_aips_ifm() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133538,14 +133539,14 @@ void m68000_mcu_device::or_l_dd_pais_ifm() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133569,7 +133570,7 @@ void m68000_mcu_device::or_l_dd_pais_ifm() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133592,7 +133593,7 @@ void m68000_mcu_device::or_l_dd_pais_ifm() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133617,7 +133618,7 @@ void m68000_mcu_device::or_l_dd_pais_ifm() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133642,7 +133643,7 @@ void m68000_mcu_device::or_l_dd_pais_ifm() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133673,7 +133674,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133695,7 +133696,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133720,7 +133721,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133743,7 +133744,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133768,7 +133769,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133793,7 +133794,7 @@ void m68000_mcu_device::or_l_dd_das_ifm() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -133822,14 +133823,14 @@ void m68000_mcu_device::or_l_dd_dais_ifm() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -133837,7 +133838,7 @@ void m68000_mcu_device::or_l_dd_dais_ifm() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133861,7 +133862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133886,7 +133887,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -133911,7 +133912,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -133934,7 +133935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133959,7 +133960,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -133984,7 +133985,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134017,7 +134018,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134040,7 +134041,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -134065,7 +134066,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134088,7 +134089,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134113,7 +134114,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134138,7 +134139,7 @@ void m68000_mcu_device::or_l_dd_adr16_ifm() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134169,7 +134170,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134193,7 +134194,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134216,7 +134217,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -134241,7 +134242,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -134264,7 +134265,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134289,7 +134290,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -134314,7 +134315,7 @@ void m68000_mcu_device::or_l_dd_adr32_ifm() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -134347,13 +134348,13 @@ void m68000_mcu_device::divs_w_ds_dd_ifm() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134367,7 +134368,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134377,7 +134378,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134392,7 +134393,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134400,7 +134401,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134425,7 +134426,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134448,7 +134449,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134564,7 +134565,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -134573,7 +134574,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -134581,12 +134582,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134594,7 +134595,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134611,7 +134612,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -134619,7 +134620,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134649,7 +134650,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -134676,13 +134677,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134690,27 +134691,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134722,7 +134723,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134734,7 +134735,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134749,7 +134750,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134758,7 +134759,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134766,7 +134767,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134776,7 +134777,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134785,7 +134786,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -134797,7 +134798,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -134845,7 +134846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -134858,7 +134859,7 @@ void m68000_mcu_device::divs_w_ais_dd_ifm() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -134884,13 +134885,13 @@ void m68000_mcu_device::divs_w_ais_dd_ifm() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -134904,7 +134905,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134914,7 +134915,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -134929,7 +134930,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -134937,7 +134938,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134962,7 +134963,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -134985,7 +134986,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135101,7 +135102,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135110,7 +135111,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135118,12 +135119,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135131,7 +135132,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135148,7 +135149,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135156,7 +135157,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135186,7 +135187,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135213,13 +135214,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135227,27 +135228,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135259,7 +135260,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135271,7 +135272,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135286,7 +135287,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135295,7 +135296,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135303,7 +135304,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135313,7 +135314,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135322,7 +135323,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135334,7 +135335,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135382,7 +135383,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135401,7 +135402,7 @@ void m68000_mcu_device::divs_w_aips_dd_ifm() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -135425,13 +135426,13 @@ void m68000_mcu_device::divs_w_aips_dd_ifm() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135445,7 +135446,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135455,7 +135456,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135470,7 +135471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -135478,7 +135479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135503,7 +135504,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135526,7 +135527,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -135642,7 +135643,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -135651,7 +135652,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -135659,12 +135660,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135672,7 +135673,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135689,7 +135690,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -135697,7 +135698,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135727,7 +135728,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -135754,13 +135755,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135768,27 +135769,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135800,7 +135801,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135812,7 +135813,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135827,7 +135828,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135836,7 +135837,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135844,7 +135845,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135854,7 +135855,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135863,7 +135864,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -135875,7 +135876,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -135923,7 +135924,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -135944,7 +135945,7 @@ void m68000_mcu_device::divs_w_pais_dd_ifm() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -135968,13 +135969,13 @@ void m68000_mcu_device::divs_w_pais_dd_ifm() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -135988,7 +135989,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -135998,7 +135999,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136013,7 +136014,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136021,7 +136022,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136046,7 +136047,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136069,7 +136070,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136185,7 +136186,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136194,7 +136195,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136202,12 +136203,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136215,7 +136216,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136232,7 +136233,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136240,7 +136241,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136270,7 +136271,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136297,13 +136298,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136311,27 +136312,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136343,7 +136344,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136355,7 +136356,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136370,7 +136371,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136379,7 +136380,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136387,7 +136388,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136397,7 +136398,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136406,7 +136407,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136418,7 +136419,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136466,7 +136467,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -136501,7 +136502,7 @@ void m68000_mcu_device::divs_w_das_dd_ifm() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -136527,13 +136528,13 @@ void m68000_mcu_device::divs_w_das_dd_ifm() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136547,7 +136548,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136557,7 +136558,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136572,7 +136573,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -136580,7 +136581,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136605,7 +136606,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136628,7 +136629,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -136744,7 +136745,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -136753,7 +136754,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -136761,12 +136762,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136774,7 +136775,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136791,7 +136792,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -136799,7 +136800,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136829,7 +136830,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -136856,13 +136857,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136870,27 +136871,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136902,7 +136903,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136914,7 +136915,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -136929,7 +136930,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136938,7 +136939,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136946,7 +136947,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -136956,7 +136957,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -136965,7 +136966,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -136977,7 +136978,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137025,7 +137026,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137036,7 +137037,7 @@ void m68000_mcu_device::divs_w_dais_dd_ifm() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -137098,7 +137099,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -137124,13 +137125,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137144,7 +137145,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137154,7 +137155,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137169,7 +137170,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137177,7 +137178,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137202,7 +137203,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137225,7 +137226,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137341,7 +137342,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137350,7 +137351,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137358,12 +137359,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137371,7 +137372,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137388,7 +137389,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137396,7 +137397,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137426,7 +137427,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137453,13 +137454,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137467,27 +137468,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137499,7 +137500,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137511,7 +137512,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137526,7 +137527,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137535,7 +137536,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137543,7 +137544,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137553,7 +137554,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137562,7 +137563,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -137574,7 +137575,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -137622,7 +137623,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -137658,7 +137659,7 @@ void m68000_mcu_device::divs_w_adr16_dd_ifm() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -137682,13 +137683,13 @@ void m68000_mcu_device::divs_w_adr16_dd_ifm() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -137702,7 +137703,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137712,7 +137713,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137727,7 +137728,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -137735,7 +137736,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137760,7 +137761,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137783,7 +137784,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -137899,7 +137900,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -137908,7 +137909,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -137916,12 +137917,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -137929,7 +137930,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -137946,7 +137947,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -137954,7 +137955,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137984,7 +137985,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138011,13 +138012,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138025,27 +138026,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138057,7 +138058,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138069,7 +138070,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138084,7 +138085,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138093,7 +138094,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138101,7 +138102,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138111,7 +138112,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138120,7 +138121,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138132,7 +138133,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138180,7 +138181,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138237,7 +138238,7 @@ void m68000_mcu_device::divs_w_adr32_dd_ifm() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -138261,13 +138262,13 @@ void m68000_mcu_device::divs_w_adr32_dd_ifm() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138281,7 +138282,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138291,7 +138292,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138306,7 +138307,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138314,7 +138315,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138339,7 +138340,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138362,7 +138363,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138478,7 +138479,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -138487,7 +138488,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -138495,12 +138496,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138508,7 +138509,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138525,7 +138526,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -138533,7 +138534,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -138563,7 +138564,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -138590,13 +138591,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138604,27 +138605,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138636,7 +138637,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138648,7 +138649,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138663,7 +138664,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138672,7 +138673,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138680,7 +138681,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138690,7 +138691,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138699,7 +138700,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -138711,7 +138712,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -138759,7 +138760,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -138793,7 +138794,7 @@ void m68000_mcu_device::divs_w_dpc_dd_ifm() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -138819,13 +138820,13 @@ void m68000_mcu_device::divs_w_dpc_dd_ifm() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -138839,7 +138840,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138849,7 +138850,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -138864,7 +138865,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -138872,7 +138873,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138897,7 +138898,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -138920,7 +138921,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139036,7 +139037,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139045,7 +139046,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139053,12 +139054,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139066,7 +139067,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139083,7 +139084,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139091,7 +139092,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139121,7 +139122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139148,13 +139149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139162,27 +139163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139194,7 +139195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139206,7 +139207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139221,7 +139222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139230,7 +139231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139238,7 +139239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139248,7 +139249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139257,7 +139258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139269,7 +139270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139317,7 +139318,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139327,7 +139328,7 @@ void m68000_mcu_device::divs_w_dpci_dd_ifm() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -139389,7 +139390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -139415,13 +139416,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139435,7 +139436,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139445,7 +139446,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139460,7 +139461,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -139468,7 +139469,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139493,7 +139494,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139516,7 +139517,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -139632,7 +139633,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -139641,7 +139642,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -139649,12 +139650,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139662,7 +139663,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139679,7 +139680,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -139687,7 +139688,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -139717,7 +139718,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -139744,13 +139745,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139758,27 +139759,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139790,7 +139791,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139802,7 +139803,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139817,7 +139818,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139826,7 +139827,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139834,7 +139835,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139844,7 +139845,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139853,7 +139854,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -139865,7 +139866,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -139913,7 +139914,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -139951,13 +139952,13 @@ void m68000_mcu_device::divs_w_imm16_dd_ifm() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -139971,7 +139972,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139981,7 +139982,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -139996,7 +139997,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -140004,7 +140005,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140029,7 +140030,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140052,7 +140053,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -140168,7 +140169,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -140177,7 +140178,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -140185,12 +140186,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140198,7 +140199,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140215,7 +140216,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -140223,7 +140224,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -140253,7 +140254,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -140280,13 +140281,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140294,27 +140295,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140326,7 +140327,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140338,7 +140339,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -140353,7 +140354,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140362,7 +140363,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140370,7 +140371,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140380,7 +140381,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -140389,7 +140390,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -140401,7 +140402,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -140449,7 +140450,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -140464,7 +140465,7 @@ void m68000_mcu_device::sub_b_ds_dd_ifm() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140504,7 +140505,7 @@ void m68000_mcu_device::sub_b_ais_dd_ifm() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140527,7 +140528,7 @@ void m68000_mcu_device::sub_b_ais_dd_ifm() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140573,7 +140574,7 @@ void m68000_mcu_device::sub_b_aips_dd_ifm() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140594,7 +140595,7 @@ void m68000_mcu_device::sub_b_aips_dd_ifm() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140642,7 +140643,7 @@ void m68000_mcu_device::sub_b_pais_dd_ifm() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140663,7 +140664,7 @@ void m68000_mcu_device::sub_b_pais_dd_ifm() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140725,7 +140726,7 @@ void m68000_mcu_device::sub_b_das_dd_ifm() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140748,7 +140749,7 @@ void m68000_mcu_device::sub_b_das_dd_ifm() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140786,7 +140787,7 @@ void m68000_mcu_device::sub_b_dais_dd_ifm() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -140848,7 +140849,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -140871,7 +140872,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -140934,7 +140935,7 @@ void m68000_mcu_device::sub_b_adr16_dd_ifm() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140955,7 +140956,7 @@ void m68000_mcu_device::sub_b_adr16_dd_ifm() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141039,7 +141040,7 @@ void m68000_mcu_device::sub_b_adr32_dd_ifm() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141060,7 +141061,7 @@ void m68000_mcu_device::sub_b_adr32_dd_ifm() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141121,7 +141122,7 @@ void m68000_mcu_device::sub_b_dpc_dd_ifm() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141144,7 +141145,7 @@ void m68000_mcu_device::sub_b_dpc_dd_ifm() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141181,7 +141182,7 @@ void m68000_mcu_device::sub_b_dpci_dd_ifm() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141243,7 +141244,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141266,7 +141267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141331,7 +141332,7 @@ void m68000_mcu_device::sub_b_imm8_dd_ifm() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141373,7 +141374,7 @@ void m68000_mcu_device::sub_w_ds_dd_ifm() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141415,7 +141416,7 @@ void m68000_mcu_device::sub_w_as_dd_ifm() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141455,7 +141456,7 @@ void m68000_mcu_device::sub_w_ais_dd_ifm() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141481,7 +141482,7 @@ void m68000_mcu_device::sub_w_ais_dd_ifm() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141527,7 +141528,7 @@ void m68000_mcu_device::sub_w_aips_dd_ifm() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141551,7 +141552,7 @@ void m68000_mcu_device::sub_w_aips_dd_ifm() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141599,7 +141600,7 @@ void m68000_mcu_device::sub_w_pais_dd_ifm() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141623,7 +141624,7 @@ void m68000_mcu_device::sub_w_pais_dd_ifm() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141685,7 +141686,7 @@ void m68000_mcu_device::sub_w_das_dd_ifm() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141711,7 +141712,7 @@ void m68000_mcu_device::sub_w_das_dd_ifm() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141749,7 +141750,7 @@ void m68000_mcu_device::sub_w_dais_dd_ifm() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -141811,7 +141812,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -141837,7 +141838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -141900,7 +141901,7 @@ void m68000_mcu_device::sub_w_adr16_dd_ifm() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141924,7 +141925,7 @@ void m68000_mcu_device::sub_w_adr16_dd_ifm() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142008,7 +142009,7 @@ void m68000_mcu_device::sub_w_adr32_dd_ifm() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142032,7 +142033,7 @@ void m68000_mcu_device::sub_w_adr32_dd_ifm() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142093,7 +142094,7 @@ void m68000_mcu_device::sub_w_dpc_dd_ifm() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142119,7 +142120,7 @@ void m68000_mcu_device::sub_w_dpc_dd_ifm() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142156,7 +142157,7 @@ void m68000_mcu_device::sub_w_dpci_dd_ifm() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -142218,7 +142219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -142244,7 +142245,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142309,7 +142310,7 @@ void m68000_mcu_device::sub_w_imm16_dd_ifm() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -142351,7 +142352,7 @@ void m68000_mcu_device::sub_l_ds_dd_ifm() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142375,7 +142376,7 @@ void m68000_mcu_device::sub_l_ds_dd_ifm() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142401,7 +142402,7 @@ void m68000_mcu_device::sub_l_as_dd_ifm() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -142425,7 +142426,7 @@ void m68000_mcu_device::sub_l_as_dd_ifm() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -142449,7 +142450,7 @@ void m68000_mcu_device::sub_l_ais_dd_ifm() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142496,12 +142497,12 @@ void m68000_mcu_device::sub_l_ais_dd_ifm() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142542,7 +142543,7 @@ void m68000_mcu_device::sub_l_aips_dd_ifm() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142592,12 +142593,12 @@ void m68000_mcu_device::sub_l_aips_dd_ifm() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142637,7 +142638,7 @@ void m68000_mcu_device::sub_l_pais_dd_ifm() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -142689,12 +142690,12 @@ void m68000_mcu_device::sub_l_pais_dd_ifm() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142756,7 +142757,7 @@ void m68000_mcu_device::sub_l_das_dd_ifm() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142803,12 +142804,12 @@ void m68000_mcu_device::sub_l_das_dd_ifm() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -142847,7 +142848,7 @@ void m68000_mcu_device::sub_l_dais_dd_ifm() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -142908,7 +142909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142955,12 +142956,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143024,7 +143025,7 @@ void m68000_mcu_device::sub_l_adr16_dd_ifm() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143071,12 +143072,12 @@ void m68000_mcu_device::sub_l_adr16_dd_ifm() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143161,7 +143162,7 @@ void m68000_mcu_device::sub_l_adr32_dd_ifm() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143208,12 +143209,12 @@ void m68000_mcu_device::sub_l_adr32_dd_ifm() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143274,7 +143275,7 @@ void m68000_mcu_device::sub_l_dpc_dd_ifm() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143321,12 +143322,12 @@ void m68000_mcu_device::sub_l_dpc_dd_ifm() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143364,7 +143365,7 @@ void m68000_mcu_device::sub_l_dpci_dd_ifm() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -143425,7 +143426,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143472,12 +143473,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143564,7 +143565,7 @@ void m68000_mcu_device::sub_l_imm32_dd_ifm() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -143588,7 +143589,7 @@ void m68000_mcu_device::sub_l_imm32_dd_ifm() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -143614,7 +143615,7 @@ void m68000_mcu_device::suba_w_ds_ad_ifm() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143637,7 +143638,7 @@ void m68000_mcu_device::suba_w_ds_ad_ifm() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143662,7 +143663,7 @@ void m68000_mcu_device::suba_w_as_ad_ifm() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143685,7 +143686,7 @@ void m68000_mcu_device::suba_w_as_ad_ifm() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143708,7 +143709,7 @@ void m68000_mcu_device::suba_w_ais_ad_ifm() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143734,7 +143735,7 @@ void m68000_mcu_device::suba_w_ais_ad_ifm() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143757,7 +143758,7 @@ void m68000_mcu_device::suba_w_ais_ad_ifm() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143786,7 +143787,7 @@ void m68000_mcu_device::suba_w_aips_ad_ifm() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143810,7 +143811,7 @@ void m68000_mcu_device::suba_w_aips_ad_ifm() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143833,7 +143834,7 @@ void m68000_mcu_device::suba_w_aips_ad_ifm() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143864,7 +143865,7 @@ void m68000_mcu_device::suba_w_pais_ad_ifm() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143888,7 +143889,7 @@ void m68000_mcu_device::suba_w_pais_ad_ifm() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -143911,7 +143912,7 @@ void m68000_mcu_device::suba_w_pais_ad_ifm() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -143956,7 +143957,7 @@ void m68000_mcu_device::suba_w_das_ad_ifm() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -143982,7 +143983,7 @@ void m68000_mcu_device::suba_w_das_ad_ifm() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144005,7 +144006,7 @@ void m68000_mcu_device::suba_w_das_ad_ifm() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144026,7 +144027,7 @@ void m68000_mcu_device::suba_w_dais_ad_ifm() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144088,7 +144089,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144114,7 +144115,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144137,7 +144138,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144183,7 +144184,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ifm() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -144207,7 +144208,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ifm() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144230,7 +144231,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ifm() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144297,7 +144298,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ifm() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -144321,7 +144322,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ifm() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144344,7 +144345,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ifm() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144388,7 +144389,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ifm() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144414,7 +144415,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ifm() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144437,7 +144438,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ifm() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144457,7 +144458,7 @@ void m68000_mcu_device::suba_w_dpci_ad_ifm() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -144519,7 +144520,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -144545,7 +144546,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144568,7 +144569,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144616,7 +144617,7 @@ void m68000_mcu_device::suba_w_imm16_ad_ifm() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -144639,7 +144640,7 @@ void m68000_mcu_device::suba_w_imm16_ad_ifm() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -144664,7 +144665,7 @@ void m68000_mcu_device::subx_b_ds_dd_ifm() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -144710,7 +144711,7 @@ void m68000_mcu_device::subx_b_pais_paid_ifm() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -144751,7 +144752,7 @@ void m68000_mcu_device::subx_b_pais_paid_ifm() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144803,7 +144804,7 @@ void m68000_mcu_device::sub_b_dd_ais_ifm() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144826,7 +144827,7 @@ void m68000_mcu_device::sub_b_dd_ais_ifm() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144884,7 +144885,7 @@ void m68000_mcu_device::sub_b_dd_aips_ifm() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144905,7 +144906,7 @@ void m68000_mcu_device::sub_b_dd_aips_ifm() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144965,7 +144966,7 @@ void m68000_mcu_device::sub_b_dd_pais_ifm() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -144986,7 +144987,7 @@ void m68000_mcu_device::sub_b_dd_pais_ifm() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145060,7 +145061,7 @@ void m68000_mcu_device::sub_b_dd_das_ifm() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145083,7 +145084,7 @@ void m68000_mcu_device::sub_b_dd_das_ifm() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145133,7 +145134,7 @@ void m68000_mcu_device::sub_b_dd_dais_ifm() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -145195,7 +145196,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145218,7 +145219,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145293,7 +145294,7 @@ void m68000_mcu_device::sub_b_dd_adr16_ifm() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145314,7 +145315,7 @@ void m68000_mcu_device::sub_b_dd_adr16_ifm() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145410,7 +145411,7 @@ void m68000_mcu_device::sub_b_dd_adr32_ifm() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -145431,7 +145432,7 @@ void m68000_mcu_device::sub_b_dd_adr32_ifm() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145485,7 +145486,7 @@ void m68000_mcu_device::subx_w_ds_dd_ifm() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -145531,7 +145532,7 @@ void m68000_mcu_device::subx_w_pais_paid_ifm() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -145578,7 +145579,7 @@ void m68000_mcu_device::subx_w_pais_paid_ifm() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145635,7 +145636,7 @@ void m68000_mcu_device::sub_w_dd_ais_ifm() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145661,7 +145662,7 @@ void m68000_mcu_device::sub_w_dd_ais_ifm() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145724,7 +145725,7 @@ void m68000_mcu_device::sub_w_dd_aips_ifm() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -145748,7 +145749,7 @@ void m68000_mcu_device::sub_w_dd_aips_ifm() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145813,7 +145814,7 @@ void m68000_mcu_device::sub_w_dd_pais_ifm() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -145837,7 +145838,7 @@ void m68000_mcu_device::sub_w_dd_pais_ifm() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145916,7 +145917,7 @@ void m68000_mcu_device::sub_w_dd_das_ifm() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -145942,7 +145943,7 @@ void m68000_mcu_device::sub_w_dd_das_ifm() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145997,7 +145998,7 @@ void m68000_mcu_device::sub_w_dd_dais_ifm() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146059,7 +146060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146085,7 +146086,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146165,7 +146166,7 @@ void m68000_mcu_device::sub_w_dd_adr16_ifm() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146189,7 +146190,7 @@ void m68000_mcu_device::sub_w_dd_adr16_ifm() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146290,7 +146291,7 @@ void m68000_mcu_device::sub_w_dd_adr32_ifm() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146314,7 +146315,7 @@ void m68000_mcu_device::sub_w_dd_adr32_ifm() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146373,7 +146374,7 @@ void m68000_mcu_device::subx_l_ds_dd_ifm() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -146397,7 +146398,7 @@ void m68000_mcu_device::subx_l_ds_dd_ifm() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -146448,7 +146449,7 @@ void m68000_mcu_device::subx_l_pais_paid_ifm() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -146495,7 +146496,7 @@ void m68000_mcu_device::subx_l_pais_paid_ifm() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -146539,7 +146540,7 @@ void m68000_mcu_device::subx_l_pais_paid_ifm() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146596,7 +146597,7 @@ void m68000_mcu_device::sub_l_dd_ais_ifm() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146643,7 +146644,7 @@ void m68000_mcu_device::sub_l_dd_ais_ifm() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146668,7 +146669,7 @@ void m68000_mcu_device::sub_l_dd_ais_ifm() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146723,7 +146724,7 @@ void m68000_mcu_device::sub_l_dd_aips_ifm() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -146773,7 +146774,7 @@ void m68000_mcu_device::sub_l_dd_aips_ifm() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146798,7 +146799,7 @@ void m68000_mcu_device::sub_l_dd_aips_ifm() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -146852,7 +146853,7 @@ void m68000_mcu_device::sub_l_dd_pais_ifm() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -146904,7 +146905,7 @@ void m68000_mcu_device::sub_l_dd_pais_ifm() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146929,7 +146930,7 @@ void m68000_mcu_device::sub_l_dd_pais_ifm() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147005,7 +147006,7 @@ void m68000_mcu_device::sub_l_dd_das_ifm() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147052,7 +147053,7 @@ void m68000_mcu_device::sub_l_dd_das_ifm() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147077,7 +147078,7 @@ void m68000_mcu_device::sub_l_dd_das_ifm() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147130,7 +147131,7 @@ void m68000_mcu_device::sub_l_dd_dais_ifm() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -147191,7 +147192,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147238,7 +147239,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147263,7 +147264,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147341,7 +147342,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ifm() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147388,7 +147389,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ifm() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147413,7 +147414,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ifm() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147512,7 +147513,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ifm() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147559,7 +147560,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ifm() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147584,7 +147585,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ifm() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -147641,7 +147642,7 @@ void m68000_mcu_device::suba_l_ds_ad_ifm() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147664,7 +147665,7 @@ void m68000_mcu_device::suba_l_ds_ad_ifm() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147689,7 +147690,7 @@ void m68000_mcu_device::suba_l_as_ad_ifm() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -147712,7 +147713,7 @@ void m68000_mcu_device::suba_l_as_ad_ifm() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -147735,7 +147736,7 @@ void m68000_mcu_device::suba_l_ais_ad_ifm() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147782,11 +147783,11 @@ void m68000_mcu_device::suba_l_ais_ad_ifm() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -147826,7 +147827,7 @@ void m68000_mcu_device::suba_l_aips_ad_ifm() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -147876,11 +147877,11 @@ void m68000_mcu_device::suba_l_aips_ad_ifm() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -147919,7 +147920,7 @@ void m68000_mcu_device::suba_l_pais_ad_ifm() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -147971,11 +147972,11 @@ void m68000_mcu_device::suba_l_pais_ad_ifm() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148036,7 +148037,7 @@ void m68000_mcu_device::suba_l_das_ad_ifm() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148083,11 +148084,11 @@ void m68000_mcu_device::suba_l_das_ad_ifm() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148125,7 +148126,7 @@ void m68000_mcu_device::suba_l_dais_ad_ifm() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148186,7 +148187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148233,11 +148234,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148300,7 +148301,7 @@ void m68000_mcu_device::suba_l_adr16_ad_ifm() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148347,11 +148348,11 @@ void m68000_mcu_device::suba_l_adr16_ad_ifm() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148435,7 +148436,7 @@ void m68000_mcu_device::suba_l_adr32_ad_ifm() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -148482,11 +148483,11 @@ void m68000_mcu_device::suba_l_adr32_ad_ifm() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148546,7 +148547,7 @@ void m68000_mcu_device::suba_l_dpc_ad_ifm() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148593,11 +148594,11 @@ void m68000_mcu_device::suba_l_dpc_ad_ifm() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148634,7 +148635,7 @@ void m68000_mcu_device::suba_l_dpci_ad_ifm() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -148695,7 +148696,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148742,11 +148743,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -148832,7 +148833,7 @@ void m68000_mcu_device::suba_l_imm32_ad_ifm() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -148855,7 +148856,7 @@ void m68000_mcu_device::suba_l_imm32_ad_ifm() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -148880,7 +148881,7 @@ void m68000_mcu_device::cmp_b_ds_dd_ifm() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148919,7 +148920,7 @@ void m68000_mcu_device::cmp_b_ais_dd_ifm() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148942,7 +148943,7 @@ void m68000_mcu_device::cmp_b_ais_dd_ifm() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -148987,7 +148988,7 @@ void m68000_mcu_device::cmp_b_aips_dd_ifm() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149008,7 +149009,7 @@ void m68000_mcu_device::cmp_b_aips_dd_ifm() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149055,7 +149056,7 @@ void m68000_mcu_device::cmp_b_pais_dd_ifm() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149076,7 +149077,7 @@ void m68000_mcu_device::cmp_b_pais_dd_ifm() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149137,7 +149138,7 @@ void m68000_mcu_device::cmp_b_das_dd_ifm() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149160,7 +149161,7 @@ void m68000_mcu_device::cmp_b_das_dd_ifm() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149197,7 +149198,7 @@ void m68000_mcu_device::cmp_b_dais_dd_ifm() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149259,7 +149260,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149282,7 +149283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149344,7 +149345,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_ifm() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149365,7 +149366,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_ifm() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149448,7 +149449,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_ifm() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149469,7 +149470,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_ifm() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149529,7 +149530,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_ifm() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149552,7 +149553,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_ifm() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149588,7 +149589,7 @@ void m68000_mcu_device::cmp_b_dpci_dd_ifm() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -149650,7 +149651,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149673,7 +149674,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149737,7 +149738,7 @@ void m68000_mcu_device::cmp_b_imm8_dd_ifm() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149778,7 +149779,7 @@ void m68000_mcu_device::cmp_w_ds_dd_ifm() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149819,7 +149820,7 @@ void m68000_mcu_device::cmp_w_as_dd_ifm() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149858,7 +149859,7 @@ void m68000_mcu_device::cmp_w_ais_dd_ifm() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -149884,7 +149885,7 @@ void m68000_mcu_device::cmp_w_ais_dd_ifm() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -149929,7 +149930,7 @@ void m68000_mcu_device::cmp_w_aips_dd_ifm() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -149953,7 +149954,7 @@ void m68000_mcu_device::cmp_w_aips_dd_ifm() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150000,7 +150001,7 @@ void m68000_mcu_device::cmp_w_pais_dd_ifm() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150024,7 +150025,7 @@ void m68000_mcu_device::cmp_w_pais_dd_ifm() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150085,7 +150086,7 @@ void m68000_mcu_device::cmp_w_das_dd_ifm() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150111,7 +150112,7 @@ void m68000_mcu_device::cmp_w_das_dd_ifm() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150148,7 +150149,7 @@ void m68000_mcu_device::cmp_w_dais_dd_ifm() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150210,7 +150211,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150236,7 +150237,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150298,7 +150299,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_ifm() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150322,7 +150323,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_ifm() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150405,7 +150406,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_ifm() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150429,7 +150430,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_ifm() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150489,7 +150490,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_ifm() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150515,7 +150516,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_ifm() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150551,7 +150552,7 @@ void m68000_mcu_device::cmp_w_dpci_dd_ifm() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -150613,7 +150614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -150639,7 +150640,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150703,7 +150704,7 @@ void m68000_mcu_device::cmp_w_imm16_dd_ifm() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -150744,11 +150745,11 @@ void m68000_mcu_device::cmp_l_ds_dd_ifm() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150790,11 +150791,11 @@ void m68000_mcu_device::cmp_l_as_dd_ifm() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150834,7 +150835,7 @@ void m68000_mcu_device::cmp_l_ais_dd_ifm() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150881,11 +150882,11 @@ void m68000_mcu_device::cmp_l_ais_dd_ifm() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150925,7 +150926,7 @@ void m68000_mcu_device::cmp_l_aips_dd_ifm() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150975,11 +150976,11 @@ void m68000_mcu_device::cmp_l_aips_dd_ifm() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151018,7 +151019,7 @@ void m68000_mcu_device::cmp_l_pais_dd_ifm() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -151070,11 +151071,11 @@ void m68000_mcu_device::cmp_l_pais_dd_ifm() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151135,7 +151136,7 @@ void m68000_mcu_device::cmp_l_das_dd_ifm() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151182,11 +151183,11 @@ void m68000_mcu_device::cmp_l_das_dd_ifm() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151224,7 +151225,7 @@ void m68000_mcu_device::cmp_l_dais_dd_ifm() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151285,7 +151286,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151332,11 +151333,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151399,7 +151400,7 @@ void m68000_mcu_device::cmp_l_adr16_dd_ifm() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151446,11 +151447,11 @@ void m68000_mcu_device::cmp_l_adr16_dd_ifm() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151534,7 +151535,7 @@ void m68000_mcu_device::cmp_l_adr32_dd_ifm() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151581,11 +151582,11 @@ void m68000_mcu_device::cmp_l_adr32_dd_ifm() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151645,7 +151646,7 @@ void m68000_mcu_device::cmp_l_dpc_dd_ifm() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151692,11 +151693,11 @@ void m68000_mcu_device::cmp_l_dpc_dd_ifm() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151733,7 +151734,7 @@ void m68000_mcu_device::cmp_l_dpci_dd_ifm() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -151794,7 +151795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151841,11 +151842,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151931,11 +151932,11 @@ void m68000_mcu_device::cmp_l_imm32_dd_ifm() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151977,11 +151978,11 @@ void m68000_mcu_device::cmpa_w_ds_ad_ifm() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152023,11 +152024,11 @@ void m68000_mcu_device::cmpa_w_as_ad_ifm() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152067,7 +152068,7 @@ void m68000_mcu_device::cmpa_w_ais_ad_ifm() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152093,11 +152094,11 @@ void m68000_mcu_device::cmpa_w_ais_ad_ifm() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152143,7 +152144,7 @@ void m68000_mcu_device::cmpa_w_aips_ad_ifm() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152167,11 +152168,11 @@ void m68000_mcu_device::cmpa_w_aips_ad_ifm() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152219,7 +152220,7 @@ void m68000_mcu_device::cmpa_w_pais_ad_ifm() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152243,11 +152244,11 @@ void m68000_mcu_device::cmpa_w_pais_ad_ifm() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152309,7 +152310,7 @@ void m68000_mcu_device::cmpa_w_das_ad_ifm() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152335,11 +152336,11 @@ void m68000_mcu_device::cmpa_w_das_ad_ifm() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152377,7 +152378,7 @@ void m68000_mcu_device::cmpa_w_dais_ad_ifm() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152439,7 +152440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152465,11 +152466,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152532,7 +152533,7 @@ void m68000_mcu_device::cmpa_w_adr16_ad_ifm() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152556,11 +152557,11 @@ void m68000_mcu_device::cmpa_w_adr16_ad_ifm() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152644,7 +152645,7 @@ void m68000_mcu_device::cmpa_w_adr32_ad_ifm() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152668,11 +152669,11 @@ void m68000_mcu_device::cmpa_w_adr32_ad_ifm() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152733,7 +152734,7 @@ void m68000_mcu_device::cmpa_w_dpc_ad_ifm() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152759,11 +152760,11 @@ void m68000_mcu_device::cmpa_w_dpc_ad_ifm() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152800,7 +152801,7 @@ void m68000_mcu_device::cmpa_w_dpci_ad_ifm() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152862,7 +152863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -152888,11 +152889,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152957,11 +152958,11 @@ void m68000_mcu_device::cmpa_w_imm16_ad_ifm() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153002,7 +153003,7 @@ void m68000_mcu_device::eor_b_dd_ds_ifm() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153010,7 +153011,7 @@ void m68000_mcu_device::eor_b_dd_ds_ifm() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153066,7 +153067,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_ifm() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153088,7 +153089,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_ifm() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153123,11 +153124,11 @@ void m68000_mcu_device::eor_b_dd_ais_ifm() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153147,7 +153148,7 @@ void m68000_mcu_device::eor_b_dd_ais_ifm() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153174,7 +153175,7 @@ void m68000_mcu_device::eor_b_dd_ais_ifm() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153203,12 +153204,12 @@ void m68000_mcu_device::eor_b_dd_aips_ifm() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153229,7 +153230,7 @@ void m68000_mcu_device::eor_b_dd_aips_ifm() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153256,7 +153257,7 @@ void m68000_mcu_device::eor_b_dd_aips_ifm() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153284,7 +153285,7 @@ void m68000_mcu_device::eor_b_dd_pais_ifm() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153292,7 +153293,7 @@ void m68000_mcu_device::eor_b_dd_pais_ifm() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153313,7 +153314,7 @@ void m68000_mcu_device::eor_b_dd_pais_ifm() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153340,7 +153341,7 @@ void m68000_mcu_device::eor_b_dd_pais_ifm() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153366,7 +153367,7 @@ void m68000_mcu_device::eor_b_dd_das_ifm() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153389,11 +153390,11 @@ void m68000_mcu_device::eor_b_dd_das_ifm() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153413,7 +153414,7 @@ void m68000_mcu_device::eor_b_dd_das_ifm() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153440,7 +153441,7 @@ void m68000_mcu_device::eor_b_dd_das_ifm() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153464,14 +153465,14 @@ void m68000_mcu_device::eor_b_dd_dais_ifm() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153479,7 +153480,7 @@ void m68000_mcu_device::eor_b_dd_dais_ifm() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153503,7 +153504,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153529,11 +153530,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -153553,7 +153554,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153580,7 +153581,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153608,7 +153609,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ifm() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -153631,7 +153632,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ifm() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153652,7 +153653,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ifm() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153679,7 +153680,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ifm() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153705,7 +153706,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ifm() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153729,7 +153730,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ifm() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -153752,7 +153753,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ifm() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -153773,7 +153774,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ifm() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153800,7 +153801,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ifm() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -153827,7 +153828,7 @@ void m68000_mcu_device::eor_w_dd_ds_ifm() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -153835,7 +153836,7 @@ void m68000_mcu_device::eor_w_dd_ds_ifm() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153894,7 +153895,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_ifm() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -153919,7 +153920,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_ifm() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153954,11 +153955,11 @@ void m68000_mcu_device::eor_w_dd_ais_ifm() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -153981,7 +153982,7 @@ void m68000_mcu_device::eor_w_dd_ais_ifm() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154008,7 +154009,7 @@ void m68000_mcu_device::eor_w_dd_ais_ifm() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154042,12 +154043,12 @@ void m68000_mcu_device::eor_w_dd_aips_ifm() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154071,7 +154072,7 @@ void m68000_mcu_device::eor_w_dd_aips_ifm() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154098,7 +154099,7 @@ void m68000_mcu_device::eor_w_dd_aips_ifm() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154131,7 +154132,7 @@ void m68000_mcu_device::eor_w_dd_pais_ifm() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -154139,7 +154140,7 @@ void m68000_mcu_device::eor_w_dd_pais_ifm() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154163,7 +154164,7 @@ void m68000_mcu_device::eor_w_dd_pais_ifm() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154190,7 +154191,7 @@ void m68000_mcu_device::eor_w_dd_pais_ifm() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154221,7 +154222,7 @@ void m68000_mcu_device::eor_w_dd_das_ifm() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154244,11 +154245,11 @@ void m68000_mcu_device::eor_w_dd_das_ifm() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154271,7 +154272,7 @@ void m68000_mcu_device::eor_w_dd_das_ifm() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154298,7 +154299,7 @@ void m68000_mcu_device::eor_w_dd_das_ifm() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154327,14 +154328,14 @@ void m68000_mcu_device::eor_w_dd_dais_ifm() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -154342,7 +154343,7 @@ void m68000_mcu_device::eor_w_dd_dais_ifm() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154366,7 +154367,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154392,11 +154393,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154419,7 +154420,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154446,7 +154447,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154479,7 +154480,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ifm() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -154502,7 +154503,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ifm() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154526,7 +154527,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ifm() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154553,7 +154554,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ifm() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154584,7 +154585,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ifm() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154608,7 +154609,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ifm() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -154631,7 +154632,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ifm() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154655,7 +154656,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ifm() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154682,7 +154683,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ifm() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -154714,12 +154715,12 @@ void m68000_mcu_device::eor_l_dd_ds_ifm() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154739,7 +154740,7 @@ void m68000_mcu_device::eor_l_dd_ds_ifm() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -154748,7 +154749,7 @@ void m68000_mcu_device::eor_l_dd_ds_ifm() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154811,7 +154812,7 @@ void m68000_mcu_device::cmpm_l_aips_aipd_ifm() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154855,13 +154856,13 @@ void m68000_mcu_device::cmpm_l_aips_aipd_ifm() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154896,7 +154897,7 @@ void m68000_mcu_device::eor_l_dd_ais_ifm() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -154921,7 +154922,7 @@ void m68000_mcu_device::eor_l_dd_ais_ifm() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -154944,7 +154945,7 @@ void m68000_mcu_device::eor_l_dd_ais_ifm() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154969,7 +154970,7 @@ void m68000_mcu_device::eor_l_dd_ais_ifm() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -154994,7 +154995,7 @@ void m68000_mcu_device::eor_l_dd_ais_ifm() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155025,7 +155026,7 @@ void m68000_mcu_device::eor_l_dd_aips_ifm() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155050,11 +155051,11 @@ void m68000_mcu_device::eor_l_dd_aips_ifm() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155077,7 +155078,7 @@ void m68000_mcu_device::eor_l_dd_aips_ifm() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155102,7 +155103,7 @@ void m68000_mcu_device::eor_l_dd_aips_ifm() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155127,7 +155128,7 @@ void m68000_mcu_device::eor_l_dd_aips_ifm() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155157,14 +155158,14 @@ void m68000_mcu_device::eor_l_dd_pais_ifm() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155188,7 +155189,7 @@ void m68000_mcu_device::eor_l_dd_pais_ifm() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155211,7 +155212,7 @@ void m68000_mcu_device::eor_l_dd_pais_ifm() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155236,7 +155237,7 @@ void m68000_mcu_device::eor_l_dd_pais_ifm() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155261,7 +155262,7 @@ void m68000_mcu_device::eor_l_dd_pais_ifm() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155292,7 +155293,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155314,7 +155315,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155339,7 +155340,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155362,7 +155363,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155387,7 +155388,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155412,7 +155413,7 @@ void m68000_mcu_device::eor_l_dd_das_ifm() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155441,14 +155442,14 @@ void m68000_mcu_device::eor_l_dd_dais_ifm() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -155456,7 +155457,7 @@ void m68000_mcu_device::eor_l_dd_dais_ifm() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155480,7 +155481,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155505,7 +155506,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155530,7 +155531,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155553,7 +155554,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155578,7 +155579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155603,7 +155604,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155636,7 +155637,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -155659,7 +155660,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155684,7 +155685,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155707,7 +155708,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155732,7 +155733,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155757,7 +155758,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ifm() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155788,7 +155789,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155812,7 +155813,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -155835,7 +155836,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -155860,7 +155861,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -155883,7 +155884,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155908,7 +155909,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -155933,7 +155934,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ifm() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -155966,11 +155967,11 @@ void m68000_mcu_device::cmpa_l_ds_ad_ifm() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156012,11 +156013,11 @@ void m68000_mcu_device::cmpa_l_as_ad_ifm() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156056,7 +156057,7 @@ void m68000_mcu_device::cmpa_l_ais_ad_ifm() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156103,11 +156104,11 @@ void m68000_mcu_device::cmpa_l_ais_ad_ifm() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156147,7 +156148,7 @@ void m68000_mcu_device::cmpa_l_aips_ad_ifm() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156197,11 +156198,11 @@ void m68000_mcu_device::cmpa_l_aips_ad_ifm() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156240,7 +156241,7 @@ void m68000_mcu_device::cmpa_l_pais_ad_ifm() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -156292,11 +156293,11 @@ void m68000_mcu_device::cmpa_l_pais_ad_ifm() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156357,7 +156358,7 @@ void m68000_mcu_device::cmpa_l_das_ad_ifm() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156404,11 +156405,11 @@ void m68000_mcu_device::cmpa_l_das_ad_ifm() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156446,7 +156447,7 @@ void m68000_mcu_device::cmpa_l_dais_ad_ifm() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -156507,7 +156508,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156554,11 +156555,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156621,7 +156622,7 @@ void m68000_mcu_device::cmpa_l_adr16_ad_ifm() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156668,11 +156669,11 @@ void m68000_mcu_device::cmpa_l_adr16_ad_ifm() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156756,7 +156757,7 @@ void m68000_mcu_device::cmpa_l_adr32_ad_ifm() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -156803,11 +156804,11 @@ void m68000_mcu_device::cmpa_l_adr32_ad_ifm() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156867,7 +156868,7 @@ void m68000_mcu_device::cmpa_l_dpc_ad_ifm() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -156914,11 +156915,11 @@ void m68000_mcu_device::cmpa_l_dpc_ad_ifm() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156955,7 +156956,7 @@ void m68000_mcu_device::cmpa_l_dpci_ad_ifm() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -157016,7 +157017,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157063,11 +157064,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157153,11 +157154,11 @@ void m68000_mcu_device::cmpa_l_imm32_ad_ifm() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157199,7 +157200,7 @@ void m68000_mcu_device::and_b_ds_dd_ifm() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157207,7 +157208,7 @@ void m68000_mcu_device::and_b_ds_dd_ifm() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157240,11 +157241,11 @@ void m68000_mcu_device::and_b_ais_dd_ifm() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157264,7 +157265,7 @@ void m68000_mcu_device::and_b_ais_dd_ifm() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157272,7 +157273,7 @@ void m68000_mcu_device::and_b_ais_dd_ifm() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157308,12 +157309,12 @@ void m68000_mcu_device::and_b_aips_dd_ifm() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157334,7 +157335,7 @@ void m68000_mcu_device::and_b_aips_dd_ifm() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157342,7 +157343,7 @@ void m68000_mcu_device::and_b_aips_dd_ifm() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157377,7 +157378,7 @@ void m68000_mcu_device::and_b_pais_dd_ifm() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157385,7 +157386,7 @@ void m68000_mcu_device::and_b_pais_dd_ifm() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157406,7 +157407,7 @@ void m68000_mcu_device::and_b_pais_dd_ifm() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157414,7 +157415,7 @@ void m68000_mcu_device::and_b_pais_dd_ifm() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157447,7 +157448,7 @@ void m68000_mcu_device::and_b_das_dd_ifm() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157470,11 +157471,11 @@ void m68000_mcu_device::and_b_das_dd_ifm() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157494,7 +157495,7 @@ void m68000_mcu_device::and_b_das_dd_ifm() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157502,7 +157503,7 @@ void m68000_mcu_device::and_b_das_dd_ifm() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157533,14 +157534,14 @@ void m68000_mcu_device::and_b_dais_dd_ifm() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157548,7 +157549,7 @@ void m68000_mcu_device::and_b_dais_dd_ifm() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157572,7 +157573,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157598,11 +157599,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157622,7 +157623,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157630,7 +157631,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157665,7 +157666,7 @@ void m68000_mcu_device::and_b_adr16_dd_ifm() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157688,7 +157689,7 @@ void m68000_mcu_device::and_b_adr16_dd_ifm() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157709,7 +157710,7 @@ void m68000_mcu_device::and_b_adr16_dd_ifm() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157717,7 +157718,7 @@ void m68000_mcu_device::and_b_adr16_dd_ifm() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157750,7 +157751,7 @@ void m68000_mcu_device::and_b_adr32_dd_ifm() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157774,7 +157775,7 @@ void m68000_mcu_device::and_b_adr32_dd_ifm() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -157797,7 +157798,7 @@ void m68000_mcu_device::and_b_adr32_dd_ifm() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -157818,7 +157819,7 @@ void m68000_mcu_device::and_b_adr32_dd_ifm() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157826,7 +157827,7 @@ void m68000_mcu_device::and_b_adr32_dd_ifm() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157858,7 +157859,7 @@ void m68000_mcu_device::and_b_dpc_dd_ifm() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157881,11 +157882,11 @@ void m68000_mcu_device::and_b_dpc_dd_ifm() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -157905,7 +157906,7 @@ void m68000_mcu_device::and_b_dpc_dd_ifm() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -157913,7 +157914,7 @@ void m68000_mcu_device::and_b_dpc_dd_ifm() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157943,14 +157944,14 @@ void m68000_mcu_device::and_b_dpci_dd_ifm() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157958,7 +157959,7 @@ void m68000_mcu_device::and_b_dpci_dd_ifm() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -157982,7 +157983,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158008,11 +158009,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -158032,7 +158033,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158040,7 +158041,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158075,7 +158076,7 @@ void m68000_mcu_device::and_b_imm8_dd_ifm() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158099,7 +158100,7 @@ void m68000_mcu_device::and_b_imm8_dd_ifm() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158107,7 +158108,7 @@ void m68000_mcu_device::and_b_imm8_dd_ifm() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158142,7 +158143,7 @@ void m68000_mcu_device::and_w_ds_dd_ifm() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158150,7 +158151,7 @@ void m68000_mcu_device::and_w_ds_dd_ifm() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158183,11 +158184,11 @@ void m68000_mcu_device::and_w_ais_dd_ifm() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158210,7 +158211,7 @@ void m68000_mcu_device::and_w_ais_dd_ifm() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158218,7 +158219,7 @@ void m68000_mcu_device::and_w_ais_dd_ifm() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158254,12 +158255,12 @@ void m68000_mcu_device::and_w_aips_dd_ifm() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158283,7 +158284,7 @@ void m68000_mcu_device::and_w_aips_dd_ifm() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158291,7 +158292,7 @@ void m68000_mcu_device::and_w_aips_dd_ifm() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158326,7 +158327,7 @@ void m68000_mcu_device::and_w_pais_dd_ifm() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158334,7 +158335,7 @@ void m68000_mcu_device::and_w_pais_dd_ifm() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158358,7 +158359,7 @@ void m68000_mcu_device::and_w_pais_dd_ifm() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158366,7 +158367,7 @@ void m68000_mcu_device::and_w_pais_dd_ifm() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158399,7 +158400,7 @@ void m68000_mcu_device::and_w_das_dd_ifm() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158422,11 +158423,11 @@ void m68000_mcu_device::and_w_das_dd_ifm() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158449,7 +158450,7 @@ void m68000_mcu_device::and_w_das_dd_ifm() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158457,7 +158458,7 @@ void m68000_mcu_device::and_w_das_dd_ifm() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158488,14 +158489,14 @@ void m68000_mcu_device::and_w_dais_dd_ifm() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158503,7 +158504,7 @@ void m68000_mcu_device::and_w_dais_dd_ifm() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158527,7 +158528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158553,11 +158554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158580,7 +158581,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158588,7 +158589,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158623,7 +158624,7 @@ void m68000_mcu_device::and_w_adr16_dd_ifm() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -158646,7 +158647,7 @@ void m68000_mcu_device::and_w_adr16_dd_ifm() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158670,7 +158671,7 @@ void m68000_mcu_device::and_w_adr16_dd_ifm() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158678,7 +158679,7 @@ void m68000_mcu_device::and_w_adr16_dd_ifm() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158711,7 +158712,7 @@ void m68000_mcu_device::and_w_adr32_dd_ifm() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158735,7 +158736,7 @@ void m68000_mcu_device::and_w_adr32_dd_ifm() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -158758,7 +158759,7 @@ void m68000_mcu_device::and_w_adr32_dd_ifm() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -158782,7 +158783,7 @@ void m68000_mcu_device::and_w_adr32_dd_ifm() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158790,7 +158791,7 @@ void m68000_mcu_device::and_w_adr32_dd_ifm() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158822,7 +158823,7 @@ void m68000_mcu_device::and_w_dpc_dd_ifm() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158845,11 +158846,11 @@ void m68000_mcu_device::and_w_dpc_dd_ifm() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158872,7 +158873,7 @@ void m68000_mcu_device::and_w_dpc_dd_ifm() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -158880,7 +158881,7 @@ void m68000_mcu_device::and_w_dpc_dd_ifm() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158910,14 +158911,14 @@ void m68000_mcu_device::and_w_dpci_dd_ifm() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -158925,7 +158926,7 @@ void m68000_mcu_device::and_w_dpci_dd_ifm() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158949,7 +158950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -158975,11 +158976,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159002,7 +159003,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159010,7 +159011,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159045,7 +159046,7 @@ void m68000_mcu_device::and_w_imm16_dd_ifm() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159069,7 +159070,7 @@ void m68000_mcu_device::and_w_imm16_dd_ifm() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -159077,7 +159078,7 @@ void m68000_mcu_device::and_w_imm16_dd_ifm() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159112,12 +159113,12 @@ void m68000_mcu_device::and_l_ds_dd_ifm() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159137,7 +159138,7 @@ void m68000_mcu_device::and_l_ds_dd_ifm() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -159146,7 +159147,7 @@ void m68000_mcu_device::and_l_ds_dd_ifm() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159162,7 +159163,7 @@ void m68000_mcu_device::and_l_ais_dd_ifm() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159187,7 +159188,7 @@ void m68000_mcu_device::and_l_ais_dd_ifm() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159210,12 +159211,12 @@ void m68000_mcu_device::and_l_ais_dd_ifm() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159241,7 +159242,7 @@ void m68000_mcu_device::and_l_ais_dd_ifm() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159257,7 +159258,7 @@ void m68000_mcu_device::and_l_aips_dd_ifm() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159282,11 +159283,11 @@ void m68000_mcu_device::and_l_aips_dd_ifm() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159309,12 +159310,12 @@ void m68000_mcu_device::and_l_aips_dd_ifm() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159340,7 +159341,7 @@ void m68000_mcu_device::and_l_aips_dd_ifm() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159355,14 +159356,14 @@ void m68000_mcu_device::and_l_pais_dd_ifm() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159386,7 +159387,7 @@ void m68000_mcu_device::and_l_pais_dd_ifm() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159409,12 +159410,12 @@ void m68000_mcu_device::and_l_pais_dd_ifm() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159440,7 +159441,7 @@ void m68000_mcu_device::and_l_pais_dd_ifm() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159456,7 +159457,7 @@ void m68000_mcu_device::and_l_das_dd_ifm() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159478,7 +159479,7 @@ void m68000_mcu_device::and_l_das_dd_ifm() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159503,7 +159504,7 @@ void m68000_mcu_device::and_l_das_dd_ifm() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159526,12 +159527,12 @@ void m68000_mcu_device::and_l_das_dd_ifm() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159557,7 +159558,7 @@ void m68000_mcu_device::and_l_das_dd_ifm() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159571,14 +159572,14 @@ void m68000_mcu_device::and_l_dais_dd_ifm() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -159586,7 +159587,7 @@ void m68000_mcu_device::and_l_dais_dd_ifm() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159610,7 +159611,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159635,7 +159636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159660,7 +159661,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159683,12 +159684,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159714,7 +159715,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159732,7 +159733,7 @@ void m68000_mcu_device::and_l_adr16_dd_ifm() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -159755,7 +159756,7 @@ void m68000_mcu_device::and_l_adr16_dd_ifm() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159780,7 +159781,7 @@ void m68000_mcu_device::and_l_adr16_dd_ifm() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159803,12 +159804,12 @@ void m68000_mcu_device::and_l_adr16_dd_ifm() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159834,7 +159835,7 @@ void m68000_mcu_device::and_l_adr16_dd_ifm() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159850,7 +159851,7 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159874,7 +159875,7 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -159897,7 +159898,7 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -159922,7 +159923,7 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -159945,12 +159946,12 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -159976,7 +159977,7 @@ void m68000_mcu_device::and_l_adr32_dd_ifm() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159991,7 +159992,7 @@ void m68000_mcu_device::and_l_dpc_dd_ifm() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160013,7 +160014,7 @@ void m68000_mcu_device::and_l_dpc_dd_ifm() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -160038,7 +160039,7 @@ void m68000_mcu_device::and_l_dpc_dd_ifm() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160061,12 +160062,12 @@ void m68000_mcu_device::and_l_dpc_dd_ifm() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160092,7 +160093,7 @@ void m68000_mcu_device::and_l_dpc_dd_ifm() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160105,14 +160106,14 @@ void m68000_mcu_device::and_l_dpci_dd_ifm() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -160120,7 +160121,7 @@ void m68000_mcu_device::and_l_dpci_dd_ifm() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160144,7 +160145,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160169,7 +160170,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -160194,7 +160195,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160217,12 +160218,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -160248,7 +160249,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160264,7 +160265,7 @@ void m68000_mcu_device::and_l_imm32_dd_ifm() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160288,7 +160289,7 @@ void m68000_mcu_device::and_l_imm32_dd_ifm() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160312,12 +160313,12 @@ void m68000_mcu_device::and_l_imm32_dd_ifm() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -160337,7 +160338,7 @@ void m68000_mcu_device::and_l_imm32_dd_ifm() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -160346,7 +160347,7 @@ void m68000_mcu_device::and_l_imm32_dd_ifm() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -160366,7 +160367,7 @@ void m68000_mcu_device::mulu_w_ds_dd_ifm() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160399,7 +160400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160411,7 +160412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160423,7 +160424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160441,7 +160442,7 @@ void m68000_mcu_device::mulu_w_ais_dd_ifm() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160469,7 +160470,7 @@ void m68000_mcu_device::mulu_w_ais_dd_ifm() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160502,7 +160503,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160514,7 +160515,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160526,7 +160527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160550,7 +160551,7 @@ void m68000_mcu_device::mulu_w_aips_dd_ifm() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -160576,7 +160577,7 @@ void m68000_mcu_device::mulu_w_aips_dd_ifm() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160609,7 +160610,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160621,7 +160622,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160633,7 +160634,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160659,7 +160660,7 @@ void m68000_mcu_device::mulu_w_pais_dd_ifm() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -160685,7 +160686,7 @@ void m68000_mcu_device::mulu_w_pais_dd_ifm() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160718,7 +160719,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160730,7 +160731,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160742,7 +160743,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160782,7 +160783,7 @@ void m68000_mcu_device::mulu_w_das_dd_ifm() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160810,7 +160811,7 @@ void m68000_mcu_device::mulu_w_das_dd_ifm() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -160843,7 +160844,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160855,7 +160856,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -160867,7 +160868,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -160883,7 +160884,7 @@ void m68000_mcu_device::mulu_w_dais_dd_ifm() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160945,7 +160946,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160973,7 +160974,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161006,7 +161007,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161018,7 +161019,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161030,7 +161031,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161071,7 +161072,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_ifm() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -161097,7 +161098,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_ifm() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161130,7 +161131,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161142,7 +161143,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161154,7 +161155,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161216,7 +161217,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_ifm() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -161242,7 +161243,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_ifm() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161275,7 +161276,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161287,7 +161288,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161299,7 +161300,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161338,7 +161339,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_ifm() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161366,7 +161367,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_ifm() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161399,7 +161400,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161411,7 +161412,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161423,7 +161424,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161438,7 +161439,7 @@ void m68000_mcu_device::mulu_w_dpci_dd_ifm() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -161500,7 +161501,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161528,7 +161529,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161561,7 +161562,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161573,7 +161574,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161585,7 +161586,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161630,7 +161631,7 @@ void m68000_mcu_device::mulu_w_imm16_dd_ifm() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -161663,7 +161664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161675,7 +161676,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -161687,7 +161688,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -161707,12 +161708,12 @@ void m68000_mcu_device::abcd_ds_dd_ifm() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -161757,7 +161758,7 @@ void m68000_mcu_device::abcd_pais_paid_ifm() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -161797,12 +161798,12 @@ void m68000_mcu_device::abcd_pais_paid_ifm() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -161852,11 +161853,11 @@ void m68000_mcu_device::and_b_dd_ais_ifm() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -161876,7 +161877,7 @@ void m68000_mcu_device::and_b_dd_ais_ifm() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161903,7 +161904,7 @@ void m68000_mcu_device::and_b_dd_ais_ifm() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -161932,12 +161933,12 @@ void m68000_mcu_device::and_b_dd_aips_ifm() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -161958,7 +161959,7 @@ void m68000_mcu_device::and_b_dd_aips_ifm() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161985,7 +161986,7 @@ void m68000_mcu_device::and_b_dd_aips_ifm() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162013,7 +162014,7 @@ void m68000_mcu_device::and_b_dd_pais_ifm() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162021,7 +162022,7 @@ void m68000_mcu_device::and_b_dd_pais_ifm() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162042,7 +162043,7 @@ void m68000_mcu_device::and_b_dd_pais_ifm() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162069,7 +162070,7 @@ void m68000_mcu_device::and_b_dd_pais_ifm() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162095,7 +162096,7 @@ void m68000_mcu_device::and_b_dd_das_ifm() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162118,11 +162119,11 @@ void m68000_mcu_device::and_b_dd_das_ifm() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162142,7 +162143,7 @@ void m68000_mcu_device::and_b_dd_das_ifm() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162169,7 +162170,7 @@ void m68000_mcu_device::and_b_dd_das_ifm() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162193,14 +162194,14 @@ void m68000_mcu_device::and_b_dd_dais_ifm() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162208,7 +162209,7 @@ void m68000_mcu_device::and_b_dd_dais_ifm() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162232,7 +162233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162258,11 +162259,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -162282,7 +162283,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162309,7 +162310,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162337,7 +162338,7 @@ void m68000_mcu_device::and_b_dd_adr16_ifm() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -162360,7 +162361,7 @@ void m68000_mcu_device::and_b_dd_adr16_ifm() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162381,7 +162382,7 @@ void m68000_mcu_device::and_b_dd_adr16_ifm() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162408,7 +162409,7 @@ void m68000_mcu_device::and_b_dd_adr16_ifm() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162434,7 +162435,7 @@ void m68000_mcu_device::and_b_dd_adr32_ifm() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162458,7 +162459,7 @@ void m68000_mcu_device::and_b_dd_adr32_ifm() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -162481,7 +162482,7 @@ void m68000_mcu_device::and_b_dd_adr32_ifm() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -162502,7 +162503,7 @@ void m68000_mcu_device::and_b_dd_adr32_ifm() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162529,7 +162530,7 @@ void m68000_mcu_device::and_b_dd_adr32_ifm() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -162643,11 +162644,11 @@ void m68000_mcu_device::and_w_dd_ais_ifm() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162670,7 +162671,7 @@ void m68000_mcu_device::and_w_dd_ais_ifm() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162697,7 +162698,7 @@ void m68000_mcu_device::and_w_dd_ais_ifm() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162731,12 +162732,12 @@ void m68000_mcu_device::and_w_dd_aips_ifm() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -162760,7 +162761,7 @@ void m68000_mcu_device::and_w_dd_aips_ifm() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162787,7 +162788,7 @@ void m68000_mcu_device::and_w_dd_aips_ifm() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162820,7 +162821,7 @@ void m68000_mcu_device::and_w_dd_pais_ifm() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162828,7 +162829,7 @@ void m68000_mcu_device::and_w_dd_pais_ifm() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -162852,7 +162853,7 @@ void m68000_mcu_device::and_w_dd_pais_ifm() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162879,7 +162880,7 @@ void m68000_mcu_device::and_w_dd_pais_ifm() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -162910,7 +162911,7 @@ void m68000_mcu_device::and_w_dd_das_ifm() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162933,11 +162934,11 @@ void m68000_mcu_device::and_w_dd_das_ifm() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -162960,7 +162961,7 @@ void m68000_mcu_device::and_w_dd_das_ifm() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162987,7 +162988,7 @@ void m68000_mcu_device::and_w_dd_das_ifm() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163016,14 +163017,14 @@ void m68000_mcu_device::and_w_dd_dais_ifm() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163031,7 +163032,7 @@ void m68000_mcu_device::and_w_dd_dais_ifm() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163055,7 +163056,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163081,11 +163082,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163108,7 +163109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163135,7 +163136,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163168,7 +163169,7 @@ void m68000_mcu_device::and_w_dd_adr16_ifm() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -163191,7 +163192,7 @@ void m68000_mcu_device::and_w_dd_adr16_ifm() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163215,7 +163216,7 @@ void m68000_mcu_device::and_w_dd_adr16_ifm() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163242,7 +163243,7 @@ void m68000_mcu_device::and_w_dd_adr16_ifm() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163273,7 +163274,7 @@ void m68000_mcu_device::and_w_dd_adr32_ifm() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163297,7 +163298,7 @@ void m68000_mcu_device::and_w_dd_adr32_ifm() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -163320,7 +163321,7 @@ void m68000_mcu_device::and_w_dd_adr32_ifm() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163344,7 +163345,7 @@ void m68000_mcu_device::and_w_dd_adr32_ifm() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163371,7 +163372,7 @@ void m68000_mcu_device::and_w_dd_adr32_ifm() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163446,7 +163447,7 @@ void m68000_mcu_device::and_l_dd_ais_ifm() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163471,7 +163472,7 @@ void m68000_mcu_device::and_l_dd_ais_ifm() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163494,7 +163495,7 @@ void m68000_mcu_device::and_l_dd_ais_ifm() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163519,7 +163520,7 @@ void m68000_mcu_device::and_l_dd_ais_ifm() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163544,7 +163545,7 @@ void m68000_mcu_device::and_l_dd_ais_ifm() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163575,7 +163576,7 @@ void m68000_mcu_device::and_l_dd_aips_ifm() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163600,11 +163601,11 @@ void m68000_mcu_device::and_l_dd_aips_ifm() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163627,7 +163628,7 @@ void m68000_mcu_device::and_l_dd_aips_ifm() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163652,7 +163653,7 @@ void m68000_mcu_device::and_l_dd_aips_ifm() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163677,7 +163678,7 @@ void m68000_mcu_device::and_l_dd_aips_ifm() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163707,14 +163708,14 @@ void m68000_mcu_device::and_l_dd_pais_ifm() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163738,7 +163739,7 @@ void m68000_mcu_device::and_l_dd_pais_ifm() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163761,7 +163762,7 @@ void m68000_mcu_device::and_l_dd_pais_ifm() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163786,7 +163787,7 @@ void m68000_mcu_device::and_l_dd_pais_ifm() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163811,7 +163812,7 @@ void m68000_mcu_device::and_l_dd_pais_ifm() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163842,7 +163843,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163864,7 +163865,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -163889,7 +163890,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -163912,7 +163913,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163937,7 +163938,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -163962,7 +163963,7 @@ void m68000_mcu_device::and_l_dd_das_ifm() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -163991,14 +163992,14 @@ void m68000_mcu_device::and_l_dd_dais_ifm() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164006,7 +164007,7 @@ void m68000_mcu_device::and_l_dd_dais_ifm() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164030,7 +164031,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164055,7 +164056,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164080,7 +164081,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164103,7 +164104,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164128,7 +164129,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164153,7 +164154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164186,7 +164187,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -164209,7 +164210,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164234,7 +164235,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164257,7 +164258,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164282,7 +164283,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164307,7 +164308,7 @@ void m68000_mcu_device::and_l_dd_adr16_ifm() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164338,7 +164339,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164362,7 +164363,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -164385,7 +164386,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164410,7 +164411,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -164433,7 +164434,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164458,7 +164459,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -164483,7 +164484,7 @@ void m68000_mcu_device::and_l_dd_adr32_ifm() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -164518,7 +164519,7 @@ void m68000_mcu_device::muls_w_ds_dd_ifm() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164551,7 +164552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164565,7 +164566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164577,7 +164578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164588,7 +164589,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164602,7 +164603,7 @@ void m68000_mcu_device::muls_w_ais_dd_ifm() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164630,7 +164631,7 @@ void m68000_mcu_device::muls_w_ais_dd_ifm() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164663,7 +164664,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164677,7 +164678,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164689,7 +164690,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164700,7 +164701,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164720,7 +164721,7 @@ void m68000_mcu_device::muls_w_aips_dd_ifm() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164746,7 +164747,7 @@ void m68000_mcu_device::muls_w_aips_dd_ifm() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164779,7 +164780,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164793,7 +164794,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164805,7 +164806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164816,7 +164817,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164838,7 +164839,7 @@ void m68000_mcu_device::muls_w_pais_dd_ifm() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -164864,7 +164865,7 @@ void m68000_mcu_device::muls_w_pais_dd_ifm() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -164897,7 +164898,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164911,7 +164912,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164923,7 +164924,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -164934,7 +164935,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -164970,7 +164971,7 @@ void m68000_mcu_device::muls_w_das_dd_ifm() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164998,7 +164999,7 @@ void m68000_mcu_device::muls_w_das_dd_ifm() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165031,7 +165032,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165045,7 +165046,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165057,7 +165058,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165068,7 +165069,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165080,7 +165081,7 @@ void m68000_mcu_device::muls_w_dais_dd_ifm() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165142,7 +165143,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165170,7 +165171,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165203,7 +165204,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165217,7 +165218,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165229,7 +165230,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165240,7 +165241,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165277,7 +165278,7 @@ void m68000_mcu_device::muls_w_adr16_dd_ifm() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -165303,7 +165304,7 @@ void m68000_mcu_device::muls_w_adr16_dd_ifm() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165336,7 +165337,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165350,7 +165351,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165362,7 +165363,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165373,7 +165374,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165431,7 +165432,7 @@ void m68000_mcu_device::muls_w_adr32_dd_ifm() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -165457,7 +165458,7 @@ void m68000_mcu_device::muls_w_adr32_dd_ifm() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165490,7 +165491,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165504,7 +165505,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165516,7 +165517,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165527,7 +165528,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165562,7 +165563,7 @@ void m68000_mcu_device::muls_w_dpc_dd_ifm() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165590,7 +165591,7 @@ void m68000_mcu_device::muls_w_dpc_dd_ifm() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165623,7 +165624,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165637,7 +165638,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165649,7 +165650,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165660,7 +165661,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165671,7 +165672,7 @@ void m68000_mcu_device::muls_w_dpci_dd_ifm() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165733,7 +165734,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165761,7 +165762,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165794,7 +165795,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165808,7 +165809,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165820,7 +165821,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165831,7 +165832,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165872,7 +165873,7 @@ void m68000_mcu_device::muls_w_imm16_dd_ifm() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -165905,7 +165906,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165919,7 +165920,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165931,7 +165932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -165942,7 +165943,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -165958,7 +165959,7 @@ void m68000_mcu_device::add_b_ds_dd_ifm() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -165998,7 +165999,7 @@ void m68000_mcu_device::add_b_ais_dd_ifm() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166021,7 +166022,7 @@ void m68000_mcu_device::add_b_ais_dd_ifm() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166067,7 +166068,7 @@ void m68000_mcu_device::add_b_aips_dd_ifm() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166088,7 +166089,7 @@ void m68000_mcu_device::add_b_aips_dd_ifm() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166136,7 +166137,7 @@ void m68000_mcu_device::add_b_pais_dd_ifm() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166157,7 +166158,7 @@ void m68000_mcu_device::add_b_pais_dd_ifm() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166219,7 +166220,7 @@ void m68000_mcu_device::add_b_das_dd_ifm() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166242,7 +166243,7 @@ void m68000_mcu_device::add_b_das_dd_ifm() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166280,7 +166281,7 @@ void m68000_mcu_device::add_b_dais_dd_ifm() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166342,7 +166343,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166365,7 +166366,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166428,7 +166429,7 @@ void m68000_mcu_device::add_b_adr16_dd_ifm() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166449,7 +166450,7 @@ void m68000_mcu_device::add_b_adr16_dd_ifm() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166533,7 +166534,7 @@ void m68000_mcu_device::add_b_adr32_dd_ifm() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -166554,7 +166555,7 @@ void m68000_mcu_device::add_b_adr32_dd_ifm() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166615,7 +166616,7 @@ void m68000_mcu_device::add_b_dpc_dd_ifm() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166638,7 +166639,7 @@ void m68000_mcu_device::add_b_dpc_dd_ifm() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166675,7 +166676,7 @@ void m68000_mcu_device::add_b_dpci_dd_ifm() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -166737,7 +166738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166760,7 +166761,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166825,7 +166826,7 @@ void m68000_mcu_device::add_b_imm8_dd_ifm() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166867,7 +166868,7 @@ void m68000_mcu_device::add_w_ds_dd_ifm() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166909,7 +166910,7 @@ void m68000_mcu_device::add_w_as_dd_ifm() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -166949,7 +166950,7 @@ void m68000_mcu_device::add_w_ais_dd_ifm() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -166975,7 +166976,7 @@ void m68000_mcu_device::add_w_ais_dd_ifm() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167021,7 +167022,7 @@ void m68000_mcu_device::add_w_aips_dd_ifm() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167045,7 +167046,7 @@ void m68000_mcu_device::add_w_aips_dd_ifm() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167093,7 +167094,7 @@ void m68000_mcu_device::add_w_pais_dd_ifm() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167117,7 +167118,7 @@ void m68000_mcu_device::add_w_pais_dd_ifm() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167179,7 +167180,7 @@ void m68000_mcu_device::add_w_das_dd_ifm() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167205,7 +167206,7 @@ void m68000_mcu_device::add_w_das_dd_ifm() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167243,7 +167244,7 @@ void m68000_mcu_device::add_w_dais_dd_ifm() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167305,7 +167306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167331,7 +167332,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167394,7 +167395,7 @@ void m68000_mcu_device::add_w_adr16_dd_ifm() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167418,7 +167419,7 @@ void m68000_mcu_device::add_w_adr16_dd_ifm() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167502,7 +167503,7 @@ void m68000_mcu_device::add_w_adr32_dd_ifm() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167526,7 +167527,7 @@ void m68000_mcu_device::add_w_adr32_dd_ifm() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167587,7 +167588,7 @@ void m68000_mcu_device::add_w_dpc_dd_ifm() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167613,7 +167614,7 @@ void m68000_mcu_device::add_w_dpc_dd_ifm() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167650,7 +167651,7 @@ void m68000_mcu_device::add_w_dpci_dd_ifm() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167712,7 +167713,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167738,7 +167739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167803,7 +167804,7 @@ void m68000_mcu_device::add_w_imm16_dd_ifm() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -167845,7 +167846,7 @@ void m68000_mcu_device::add_l_ds_dd_ifm() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167869,7 +167870,7 @@ void m68000_mcu_device::add_l_ds_dd_ifm() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167895,7 +167896,7 @@ void m68000_mcu_device::add_l_as_dd_ifm() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -167919,7 +167920,7 @@ void m68000_mcu_device::add_l_as_dd_ifm() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -167943,7 +167944,7 @@ void m68000_mcu_device::add_l_ais_dd_ifm() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -167990,12 +167991,12 @@ void m68000_mcu_device::add_l_ais_dd_ifm() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168036,7 +168037,7 @@ void m68000_mcu_device::add_l_aips_dd_ifm() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168086,12 +168087,12 @@ void m68000_mcu_device::add_l_aips_dd_ifm() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168131,7 +168132,7 @@ void m68000_mcu_device::add_l_pais_dd_ifm() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -168183,12 +168184,12 @@ void m68000_mcu_device::add_l_pais_dd_ifm() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168250,7 +168251,7 @@ void m68000_mcu_device::add_l_das_dd_ifm() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168297,12 +168298,12 @@ void m68000_mcu_device::add_l_das_dd_ifm() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168341,7 +168342,7 @@ void m68000_mcu_device::add_l_dais_dd_ifm() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168402,7 +168403,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168449,12 +168450,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168518,7 +168519,7 @@ void m68000_mcu_device::add_l_adr16_dd_ifm() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168565,12 +168566,12 @@ void m68000_mcu_device::add_l_adr16_dd_ifm() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168655,7 +168656,7 @@ void m68000_mcu_device::add_l_adr32_dd_ifm() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -168702,12 +168703,12 @@ void m68000_mcu_device::add_l_adr32_dd_ifm() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168768,7 +168769,7 @@ void m68000_mcu_device::add_l_dpc_dd_ifm() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -168815,12 +168816,12 @@ void m68000_mcu_device::add_l_dpc_dd_ifm() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168858,7 +168859,7 @@ void m68000_mcu_device::add_l_dpci_dd_ifm() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168919,7 +168920,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -168966,12 +168967,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169058,7 +169059,7 @@ void m68000_mcu_device::add_l_imm32_dd_ifm() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -169082,7 +169083,7 @@ void m68000_mcu_device::add_l_imm32_dd_ifm() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -169108,7 +169109,7 @@ void m68000_mcu_device::adda_w_ds_ad_ifm() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169131,7 +169132,7 @@ void m68000_mcu_device::adda_w_ds_ad_ifm() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169156,7 +169157,7 @@ void m68000_mcu_device::adda_w_as_ad_ifm() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169179,7 +169180,7 @@ void m68000_mcu_device::adda_w_as_ad_ifm() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169202,7 +169203,7 @@ void m68000_mcu_device::adda_w_ais_ad_ifm() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169228,7 +169229,7 @@ void m68000_mcu_device::adda_w_ais_ad_ifm() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169251,7 +169252,7 @@ void m68000_mcu_device::adda_w_ais_ad_ifm() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169280,7 +169281,7 @@ void m68000_mcu_device::adda_w_aips_ad_ifm() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169304,7 +169305,7 @@ void m68000_mcu_device::adda_w_aips_ad_ifm() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169327,7 +169328,7 @@ void m68000_mcu_device::adda_w_aips_ad_ifm() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169358,7 +169359,7 @@ void m68000_mcu_device::adda_w_pais_ad_ifm() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169382,7 +169383,7 @@ void m68000_mcu_device::adda_w_pais_ad_ifm() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169405,7 +169406,7 @@ void m68000_mcu_device::adda_w_pais_ad_ifm() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169450,7 +169451,7 @@ void m68000_mcu_device::adda_w_das_ad_ifm() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169476,7 +169477,7 @@ void m68000_mcu_device::adda_w_das_ad_ifm() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169499,7 +169500,7 @@ void m68000_mcu_device::adda_w_das_ad_ifm() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169520,7 +169521,7 @@ void m68000_mcu_device::adda_w_dais_ad_ifm() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169582,7 +169583,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169608,7 +169609,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169631,7 +169632,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169677,7 +169678,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ifm() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169701,7 +169702,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ifm() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169724,7 +169725,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ifm() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169791,7 +169792,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ifm() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -169815,7 +169816,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ifm() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169838,7 +169839,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ifm() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169882,7 +169883,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ifm() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -169908,7 +169909,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ifm() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -169931,7 +169932,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ifm() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -169951,7 +169952,7 @@ void m68000_mcu_device::adda_w_dpci_ad_ifm() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170013,7 +170014,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -170039,7 +170040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170062,7 +170063,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170110,7 +170111,7 @@ void m68000_mcu_device::adda_w_imm16_ad_ifm() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -170133,7 +170134,7 @@ void m68000_mcu_device::adda_w_imm16_ad_ifm() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -170158,7 +170159,7 @@ void m68000_mcu_device::addx_b_ds_dd_ifm() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170166,7 +170167,7 @@ void m68000_mcu_device::addx_b_ds_dd_ifm() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -170201,16 +170202,16 @@ void m68000_mcu_device::addx_b_pais_paid_ifm() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170231,7 +170232,7 @@ void m68000_mcu_device::addx_b_pais_paid_ifm() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
if(!(m_aob & 1))
@@ -170249,7 +170250,7 @@ void m68000_mcu_device::addx_b_pais_paid_ifm() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170276,7 +170277,7 @@ void m68000_mcu_device::addx_b_pais_paid_ifm() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
m_icount -= 4;
@@ -170302,7 +170303,7 @@ void m68000_mcu_device::add_b_dd_ais_ifm() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170325,7 +170326,7 @@ void m68000_mcu_device::add_b_dd_ais_ifm() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170383,7 +170384,7 @@ void m68000_mcu_device::add_b_dd_aips_ifm() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170404,7 +170405,7 @@ void m68000_mcu_device::add_b_dd_aips_ifm() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170464,7 +170465,7 @@ void m68000_mcu_device::add_b_dd_pais_ifm() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170485,7 +170486,7 @@ void m68000_mcu_device::add_b_dd_pais_ifm() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170559,7 +170560,7 @@ void m68000_mcu_device::add_b_dd_das_ifm() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170582,7 +170583,7 @@ void m68000_mcu_device::add_b_dd_das_ifm() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170632,7 +170633,7 @@ void m68000_mcu_device::add_b_dd_dais_ifm() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170694,7 +170695,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170717,7 +170718,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170792,7 +170793,7 @@ void m68000_mcu_device::add_b_dd_adr16_ifm() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170813,7 +170814,7 @@ void m68000_mcu_device::add_b_dd_adr16_ifm() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170909,7 +170910,7 @@ void m68000_mcu_device::add_b_dd_adr32_ifm() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -170930,7 +170931,7 @@ void m68000_mcu_device::add_b_dd_adr32_ifm() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170984,7 +170985,7 @@ void m68000_mcu_device::addx_w_ds_dd_ifm() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -170992,7 +170993,7 @@ void m68000_mcu_device::addx_w_ds_dd_ifm() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171027,16 +171028,16 @@ void m68000_mcu_device::addx_w_pais_paid_ifm() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171060,7 +171061,7 @@ void m68000_mcu_device::addx_w_pais_paid_ifm() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171081,7 +171082,7 @@ void m68000_mcu_device::addx_w_pais_paid_ifm() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171108,7 +171109,7 @@ void m68000_mcu_device::addx_w_pais_paid_ifm() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -171139,7 +171140,7 @@ void m68000_mcu_device::add_w_dd_ais_ifm() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171165,7 +171166,7 @@ void m68000_mcu_device::add_w_dd_ais_ifm() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171228,7 +171229,7 @@ void m68000_mcu_device::add_w_dd_aips_ifm() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171252,7 +171253,7 @@ void m68000_mcu_device::add_w_dd_aips_ifm() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171317,7 +171318,7 @@ void m68000_mcu_device::add_w_dd_pais_ifm() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171341,7 +171342,7 @@ void m68000_mcu_device::add_w_dd_pais_ifm() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171420,7 +171421,7 @@ void m68000_mcu_device::add_w_dd_das_ifm() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171446,7 +171447,7 @@ void m68000_mcu_device::add_w_dd_das_ifm() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171501,7 +171502,7 @@ void m68000_mcu_device::add_w_dd_dais_ifm() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -171563,7 +171564,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -171589,7 +171590,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171669,7 +171670,7 @@ void m68000_mcu_device::add_w_dd_adr16_ifm() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171693,7 +171694,7 @@ void m68000_mcu_device::add_w_dd_adr16_ifm() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171794,7 +171795,7 @@ void m68000_mcu_device::add_w_dd_adr32_ifm() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -171818,7 +171819,7 @@ void m68000_mcu_device::add_w_dd_adr32_ifm() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171877,12 +171878,12 @@ void m68000_mcu_device::addx_l_ds_dd_ifm() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171902,7 +171903,7 @@ void m68000_mcu_device::addx_l_ds_dd_ifm() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -171911,7 +171912,7 @@ void m68000_mcu_device::addx_l_ds_dd_ifm() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171929,13 +171930,13 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171956,11 +171957,11 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -171982,7 +171983,7 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -172005,7 +172006,7 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -172030,7 +172031,7 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -172050,7 +172051,7 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172077,7 +172078,7 @@ void m68000_mcu_device::addx_l_pais_paid_ifm() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -172108,7 +172109,7 @@ void m68000_mcu_device::add_l_dd_ais_ifm() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172155,7 +172156,7 @@ void m68000_mcu_device::add_l_dd_ais_ifm() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172180,7 +172181,7 @@ void m68000_mcu_device::add_l_dd_ais_ifm() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172235,7 +172236,7 @@ void m68000_mcu_device::add_l_dd_aips_ifm() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172285,7 +172286,7 @@ void m68000_mcu_device::add_l_dd_aips_ifm() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172310,7 +172311,7 @@ void m68000_mcu_device::add_l_dd_aips_ifm() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172364,7 +172365,7 @@ void m68000_mcu_device::add_l_dd_pais_ifm() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -172416,7 +172417,7 @@ void m68000_mcu_device::add_l_dd_pais_ifm() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172441,7 +172442,7 @@ void m68000_mcu_device::add_l_dd_pais_ifm() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172517,7 +172518,7 @@ void m68000_mcu_device::add_l_dd_das_ifm() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172564,7 +172565,7 @@ void m68000_mcu_device::add_l_dd_das_ifm() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172589,7 +172590,7 @@ void m68000_mcu_device::add_l_dd_das_ifm() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172642,7 +172643,7 @@ void m68000_mcu_device::add_l_dd_dais_ifm() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -172703,7 +172704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172750,7 +172751,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172775,7 +172776,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -172853,7 +172854,7 @@ void m68000_mcu_device::add_l_dd_adr16_ifm() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -172900,7 +172901,7 @@ void m68000_mcu_device::add_l_dd_adr16_ifm() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172925,7 +172926,7 @@ void m68000_mcu_device::add_l_dd_adr16_ifm() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173024,7 +173025,7 @@ void m68000_mcu_device::add_l_dd_adr32_ifm() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173071,7 +173072,7 @@ void m68000_mcu_device::add_l_dd_adr32_ifm() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173096,7 +173097,7 @@ void m68000_mcu_device::add_l_dd_adr32_ifm() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -173153,7 +173154,7 @@ void m68000_mcu_device::adda_l_ds_ad_ifm() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173176,7 +173177,7 @@ void m68000_mcu_device::adda_l_ds_ad_ifm() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173201,7 +173202,7 @@ void m68000_mcu_device::adda_l_as_ad_ifm() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -173224,7 +173225,7 @@ void m68000_mcu_device::adda_l_as_ad_ifm() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -173247,7 +173248,7 @@ void m68000_mcu_device::adda_l_ais_ad_ifm() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173294,11 +173295,11 @@ void m68000_mcu_device::adda_l_ais_ad_ifm() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173338,7 +173339,7 @@ void m68000_mcu_device::adda_l_aips_ad_ifm() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173388,11 +173389,11 @@ void m68000_mcu_device::adda_l_aips_ad_ifm() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173431,7 +173432,7 @@ void m68000_mcu_device::adda_l_pais_ad_ifm() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -173483,11 +173484,11 @@ void m68000_mcu_device::adda_l_pais_ad_ifm() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173548,7 +173549,7 @@ void m68000_mcu_device::adda_l_das_ad_ifm() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173595,11 +173596,11 @@ void m68000_mcu_device::adda_l_das_ad_ifm() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173637,7 +173638,7 @@ void m68000_mcu_device::adda_l_dais_ad_ifm() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -173698,7 +173699,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173745,11 +173746,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173812,7 +173813,7 @@ void m68000_mcu_device::adda_l_adr16_ad_ifm() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173859,11 +173860,11 @@ void m68000_mcu_device::adda_l_adr16_ad_ifm() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173947,7 +173948,7 @@ void m68000_mcu_device::adda_l_adr32_ad_ifm() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -173994,11 +173995,11 @@ void m68000_mcu_device::adda_l_adr32_ad_ifm() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174058,7 +174059,7 @@ void m68000_mcu_device::adda_l_dpc_ad_ifm() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174105,11 +174106,11 @@ void m68000_mcu_device::adda_l_dpc_ad_ifm() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174146,7 +174147,7 @@ void m68000_mcu_device::adda_l_dpci_ad_ifm() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -174207,7 +174208,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174254,11 +174255,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174344,7 +174345,7 @@ void m68000_mcu_device::adda_l_imm32_ad_ifm() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -174367,7 +174368,7 @@ void m68000_mcu_device::adda_l_imm32_ad_ifm() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -174391,13 +174392,13 @@ void m68000_mcu_device::asr_b_imm3_ds_ifm() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174426,7 +174427,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174456,13 +174457,13 @@ void m68000_mcu_device::lsr_b_imm3_ds_ifm() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174491,7 +174492,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174521,13 +174522,13 @@ void m68000_mcu_device::roxr_b_imm3_ds_ifm() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174556,7 +174557,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174586,13 +174587,13 @@ void m68000_mcu_device::ror_b_imm3_ds_ifm() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174621,7 +174622,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174652,13 +174653,13 @@ void m68000_mcu_device::asr_b_dd_ds_ifm() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174687,7 +174688,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174718,13 +174719,13 @@ void m68000_mcu_device::lsr_b_dd_ds_ifm() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174753,7 +174754,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174784,13 +174785,13 @@ void m68000_mcu_device::roxr_b_dd_ds_ifm() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174819,7 +174820,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174850,13 +174851,13 @@ void m68000_mcu_device::ror_b_dd_ds_ifm() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174885,7 +174886,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174915,13 +174916,13 @@ void m68000_mcu_device::asr_w_imm3_ds_ifm() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174950,7 +174951,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -174980,13 +174981,13 @@ void m68000_mcu_device::lsr_w_imm3_ds_ifm() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175015,7 +175016,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175045,13 +175046,13 @@ void m68000_mcu_device::roxr_w_imm3_ds_ifm() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175080,7 +175081,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175110,13 +175111,13 @@ void m68000_mcu_device::ror_w_imm3_ds_ifm() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175145,7 +175146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175176,13 +175177,13 @@ void m68000_mcu_device::asr_w_dd_ds_ifm() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175211,7 +175212,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175242,13 +175243,13 @@ void m68000_mcu_device::lsr_w_dd_ds_ifm() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175277,7 +175278,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175308,13 +175309,13 @@ void m68000_mcu_device::roxr_w_dd_ds_ifm() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175343,7 +175344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175374,13 +175375,13 @@ void m68000_mcu_device::ror_w_dd_ds_ifm() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175409,7 +175410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175439,13 +175440,13 @@ void m68000_mcu_device::asr_l_imm3_ds_ifm() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175474,7 +175475,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175491,7 +175492,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175510,13 +175511,13 @@ void m68000_mcu_device::lsr_l_imm3_ds_ifm() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175545,7 +175546,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175562,7 +175563,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175581,13 +175582,13 @@ void m68000_mcu_device::roxr_l_imm3_ds_ifm() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175616,7 +175617,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175633,7 +175634,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175652,13 +175653,13 @@ void m68000_mcu_device::ror_l_imm3_ds_ifm() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175687,7 +175688,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175704,7 +175705,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175724,13 +175725,13 @@ void m68000_mcu_device::asr_l_dd_ds_ifm() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175759,7 +175760,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175776,7 +175777,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175796,13 +175797,13 @@ void m68000_mcu_device::lsr_l_dd_ds_ifm() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175831,7 +175832,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175848,7 +175849,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175868,13 +175869,13 @@ void m68000_mcu_device::roxr_l_dd_ds_ifm() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175903,7 +175904,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -175920,7 +175921,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -175940,13 +175941,13 @@ void m68000_mcu_device::ror_l_dd_ds_ifm() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175975,7 +175976,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175992,7 +175993,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -176010,7 +176011,7 @@ void m68000_mcu_device::asr_ais_ifm() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176036,12 +176037,12 @@ void m68000_mcu_device::asr_ais_ifm() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176104,7 +176105,7 @@ void m68000_mcu_device::asr_aips_ifm() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176128,12 +176129,12 @@ void m68000_mcu_device::asr_aips_ifm() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176198,7 +176199,7 @@ void m68000_mcu_device::asr_pais_ifm() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176222,12 +176223,12 @@ void m68000_mcu_device::asr_pais_ifm() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176306,7 +176307,7 @@ void m68000_mcu_device::asr_das_ifm() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176332,12 +176333,12 @@ void m68000_mcu_device::asr_das_ifm() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176392,7 +176393,7 @@ void m68000_mcu_device::asr_dais_ifm() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -176454,7 +176455,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -176480,12 +176481,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176565,7 +176566,7 @@ void m68000_mcu_device::asr_adr16_ifm() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176589,12 +176590,12 @@ void m68000_mcu_device::asr_adr16_ifm() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176695,7 +176696,7 @@ void m68000_mcu_device::asr_adr32_ifm() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176719,12 +176720,12 @@ void m68000_mcu_device::asr_adr32_ifm() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176782,13 +176783,13 @@ void m68000_mcu_device::asl_b_imm3_ds_ifm() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176817,7 +176818,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176847,13 +176848,13 @@ void m68000_mcu_device::lsl_b_imm3_ds_ifm() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176896,7 +176897,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176913,13 +176914,13 @@ void m68000_mcu_device::roxl_b_imm3_ds_ifm() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176948,7 +176949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -176978,13 +176979,13 @@ void m68000_mcu_device::rol_b_imm3_ds_ifm() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177013,7 +177014,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177044,13 +177045,13 @@ void m68000_mcu_device::asl_b_dd_ds_ifm() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177079,7 +177080,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177110,13 +177111,13 @@ void m68000_mcu_device::lsl_b_dd_ds_ifm() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177145,7 +177146,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177159,7 +177160,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177177,13 +177178,13 @@ void m68000_mcu_device::roxl_b_dd_ds_ifm() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177212,7 +177213,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177243,13 +177244,13 @@ void m68000_mcu_device::rol_b_dd_ds_ifm() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177278,7 +177279,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177308,13 +177309,13 @@ void m68000_mcu_device::asl_w_imm3_ds_ifm() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177343,7 +177344,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177373,13 +177374,13 @@ void m68000_mcu_device::lsl_w_imm3_ds_ifm() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177408,7 +177409,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177422,7 +177423,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177439,13 +177440,13 @@ void m68000_mcu_device::roxl_w_imm3_ds_ifm() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177474,7 +177475,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177504,13 +177505,13 @@ void m68000_mcu_device::rol_w_imm3_ds_ifm() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177539,7 +177540,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177570,13 +177571,13 @@ void m68000_mcu_device::asl_w_dd_ds_ifm() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177605,7 +177606,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177636,13 +177637,13 @@ void m68000_mcu_device::lsl_w_dd_ds_ifm() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177671,7 +177672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177685,7 +177686,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -177703,13 +177704,13 @@ void m68000_mcu_device::roxl_w_dd_ds_ifm() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177738,7 +177739,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177769,13 +177770,13 @@ void m68000_mcu_device::rol_w_dd_ds_ifm() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177804,7 +177805,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177834,13 +177835,13 @@ void m68000_mcu_device::asl_l_imm3_ds_ifm() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177869,7 +177870,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177886,7 +177887,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177905,13 +177906,13 @@ void m68000_mcu_device::lsl_l_imm3_ds_ifm() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177940,7 +177941,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -177952,14 +177953,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -177978,13 +177979,13 @@ void m68000_mcu_device::roxl_l_imm3_ds_ifm() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178013,7 +178014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178030,7 +178031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178049,13 +178050,13 @@ void m68000_mcu_device::rol_l_imm3_ds_ifm() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178084,7 +178085,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178101,7 +178102,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178121,13 +178122,13 @@ void m68000_mcu_device::asl_l_dd_ds_ifm() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178156,7 +178157,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178173,7 +178174,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178193,13 +178194,13 @@ void m68000_mcu_device::lsl_l_dd_ds_ifm() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178228,7 +178229,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178240,14 +178241,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178267,13 +178268,13 @@ void m68000_mcu_device::roxl_l_dd_ds_ifm() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178302,7 +178303,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -178319,7 +178320,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178339,13 +178340,13 @@ void m68000_mcu_device::rol_l_dd_ds_ifm() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178374,7 +178375,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178391,7 +178392,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -178409,7 +178410,7 @@ void m68000_mcu_device::asl_ais_ifm() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178435,12 +178436,12 @@ void m68000_mcu_device::asl_ais_ifm() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178503,7 +178504,7 @@ void m68000_mcu_device::asl_aips_ifm() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178527,12 +178528,12 @@ void m68000_mcu_device::asl_aips_ifm() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178597,7 +178598,7 @@ void m68000_mcu_device::asl_pais_ifm() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178621,12 +178622,12 @@ void m68000_mcu_device::asl_pais_ifm() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178705,7 +178706,7 @@ void m68000_mcu_device::asl_das_ifm() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178731,12 +178732,12 @@ void m68000_mcu_device::asl_das_ifm() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178791,7 +178792,7 @@ void m68000_mcu_device::asl_dais_ifm() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -178853,7 +178854,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -178879,12 +178880,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178964,7 +178965,7 @@ void m68000_mcu_device::asl_adr16_ifm() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -178988,12 +178989,12 @@ void m68000_mcu_device::asl_adr16_ifm() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179094,7 +179095,7 @@ void m68000_mcu_device::asl_adr32_ifm() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179118,12 +179119,12 @@ void m68000_mcu_device::asl_adr32_ifm() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179180,7 +179181,7 @@ void m68000_mcu_device::lsr_ais_ifm() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179206,12 +179207,12 @@ void m68000_mcu_device::lsr_ais_ifm() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179274,7 +179275,7 @@ void m68000_mcu_device::lsr_aips_ifm() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179298,12 +179299,12 @@ void m68000_mcu_device::lsr_aips_ifm() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179368,7 +179369,7 @@ void m68000_mcu_device::lsr_pais_ifm() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179392,12 +179393,12 @@ void m68000_mcu_device::lsr_pais_ifm() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179476,7 +179477,7 @@ void m68000_mcu_device::lsr_das_ifm() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179502,12 +179503,12 @@ void m68000_mcu_device::lsr_das_ifm() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179562,7 +179563,7 @@ void m68000_mcu_device::lsr_dais_ifm() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -179624,7 +179625,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179650,12 +179651,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179735,7 +179736,7 @@ void m68000_mcu_device::lsr_adr16_ifm() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179759,12 +179760,12 @@ void m68000_mcu_device::lsr_adr16_ifm() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179865,7 +179866,7 @@ void m68000_mcu_device::lsr_adr32_ifm() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179889,12 +179890,12 @@ void m68000_mcu_device::lsr_adr32_ifm() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179951,11 +179952,11 @@ void m68000_mcu_device::lsl_ais_ifm() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -179978,12 +179979,12 @@ void m68000_mcu_device::lsl_ais_ifm() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180010,7 +180011,7 @@ void m68000_mcu_device::lsl_ais_ifm() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180044,12 +180045,12 @@ void m68000_mcu_device::lsl_aips_ifm() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180073,12 +180074,12 @@ void m68000_mcu_device::lsl_aips_ifm() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180105,7 +180106,7 @@ void m68000_mcu_device::lsl_aips_ifm() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180138,7 +180139,7 @@ void m68000_mcu_device::lsl_pais_ifm() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180146,7 +180147,7 @@ void m68000_mcu_device::lsl_pais_ifm() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180170,12 +180171,12 @@ void m68000_mcu_device::lsl_pais_ifm() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180202,7 +180203,7 @@ void m68000_mcu_device::lsl_pais_ifm() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180233,7 +180234,7 @@ void m68000_mcu_device::lsl_das_ifm() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180256,11 +180257,11 @@ void m68000_mcu_device::lsl_das_ifm() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180283,12 +180284,12 @@ void m68000_mcu_device::lsl_das_ifm() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180315,7 +180316,7 @@ void m68000_mcu_device::lsl_das_ifm() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180344,14 +180345,14 @@ void m68000_mcu_device::lsl_dais_ifm() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180359,7 +180360,7 @@ void m68000_mcu_device::lsl_dais_ifm() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180383,7 +180384,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180409,11 +180410,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180436,12 +180437,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180468,7 +180469,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180501,7 +180502,7 @@ void m68000_mcu_device::lsl_adr16_ifm() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180524,7 +180525,7 @@ void m68000_mcu_device::lsl_adr16_ifm() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180548,12 +180549,12 @@ void m68000_mcu_device::lsl_adr16_ifm() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180580,7 +180581,7 @@ void m68000_mcu_device::lsl_adr16_ifm() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180611,7 +180612,7 @@ void m68000_mcu_device::lsl_adr32_ifm() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
m_icount -= 4;
@@ -180635,7 +180636,7 @@ void m68000_mcu_device::lsl_adr32_ifm() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180658,7 +180659,7 @@ void m68000_mcu_device::lsl_adr32_ifm() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180682,12 +180683,12 @@ void m68000_mcu_device::lsl_adr32_ifm() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180714,7 +180715,7 @@ void m68000_mcu_device::lsl_adr32_ifm() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
m_icount -= 4;
@@ -180745,7 +180746,7 @@ void m68000_mcu_device::roxr_ais_ifm() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180771,12 +180772,12 @@ void m68000_mcu_device::roxr_ais_ifm() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180839,7 +180840,7 @@ void m68000_mcu_device::roxr_aips_ifm() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180863,12 +180864,12 @@ void m68000_mcu_device::roxr_aips_ifm() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180933,7 +180934,7 @@ void m68000_mcu_device::roxr_pais_ifm() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180957,12 +180958,12 @@ void m68000_mcu_device::roxr_pais_ifm() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181041,7 +181042,7 @@ void m68000_mcu_device::roxr_das_ifm() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181067,12 +181068,12 @@ void m68000_mcu_device::roxr_das_ifm() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181127,7 +181128,7 @@ void m68000_mcu_device::roxr_dais_ifm() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181189,7 +181190,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181215,12 +181216,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181300,7 +181301,7 @@ void m68000_mcu_device::roxr_adr16_ifm() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181324,12 +181325,12 @@ void m68000_mcu_device::roxr_adr16_ifm() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181430,7 +181431,7 @@ void m68000_mcu_device::roxr_adr32_ifm() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181454,12 +181455,12 @@ void m68000_mcu_device::roxr_adr32_ifm() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181516,7 +181517,7 @@ void m68000_mcu_device::roxl_ais_ifm() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181542,12 +181543,12 @@ void m68000_mcu_device::roxl_ais_ifm() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181610,7 +181611,7 @@ void m68000_mcu_device::roxl_aips_ifm() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181634,12 +181635,12 @@ void m68000_mcu_device::roxl_aips_ifm() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181704,7 +181705,7 @@ void m68000_mcu_device::roxl_pais_ifm() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181728,12 +181729,12 @@ void m68000_mcu_device::roxl_pais_ifm() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181812,7 +181813,7 @@ void m68000_mcu_device::roxl_das_ifm() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181838,12 +181839,12 @@ void m68000_mcu_device::roxl_das_ifm() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181898,7 +181899,7 @@ void m68000_mcu_device::roxl_dais_ifm() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -181960,7 +181961,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181986,12 +181987,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182071,7 +182072,7 @@ void m68000_mcu_device::roxl_adr16_ifm() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182095,12 +182096,12 @@ void m68000_mcu_device::roxl_adr16_ifm() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182201,7 +182202,7 @@ void m68000_mcu_device::roxl_adr32_ifm() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182225,12 +182226,12 @@ void m68000_mcu_device::roxl_adr32_ifm() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182287,7 +182288,7 @@ void m68000_mcu_device::ror_ais_ifm() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182313,12 +182314,12 @@ void m68000_mcu_device::ror_ais_ifm() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182381,7 +182382,7 @@ void m68000_mcu_device::ror_aips_ifm() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182405,12 +182406,12 @@ void m68000_mcu_device::ror_aips_ifm() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182475,7 +182476,7 @@ void m68000_mcu_device::ror_pais_ifm() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182499,12 +182500,12 @@ void m68000_mcu_device::ror_pais_ifm() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182583,7 +182584,7 @@ void m68000_mcu_device::ror_das_ifm() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182609,12 +182610,12 @@ void m68000_mcu_device::ror_das_ifm() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182669,7 +182670,7 @@ void m68000_mcu_device::ror_dais_ifm() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182731,7 +182732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182757,12 +182758,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182842,7 +182843,7 @@ void m68000_mcu_device::ror_adr16_ifm() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182866,12 +182867,12 @@ void m68000_mcu_device::ror_adr16_ifm() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -182972,7 +182973,7 @@ void m68000_mcu_device::ror_adr32_ifm() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -182996,12 +182997,12 @@ void m68000_mcu_device::ror_adr32_ifm() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183058,7 +183059,7 @@ void m68000_mcu_device::rol_ais_ifm() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183084,12 +183085,12 @@ void m68000_mcu_device::rol_ais_ifm() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183152,7 +183153,7 @@ void m68000_mcu_device::rol_aips_ifm() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183176,12 +183177,12 @@ void m68000_mcu_device::rol_aips_ifm() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183246,7 +183247,7 @@ void m68000_mcu_device::rol_pais_ifm() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183270,12 +183271,12 @@ void m68000_mcu_device::rol_pais_ifm() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183354,7 +183355,7 @@ void m68000_mcu_device::rol_das_ifm() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183380,12 +183381,12 @@ void m68000_mcu_device::rol_das_ifm() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183440,7 +183441,7 @@ void m68000_mcu_device::rol_dais_ifm() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183502,7 +183503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183528,12 +183529,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183613,7 +183614,7 @@ void m68000_mcu_device::rol_adr16_ifm() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183637,12 +183638,12 @@ void m68000_mcu_device::rol_adr16_ifm() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183743,7 +183744,7 @@ void m68000_mcu_device::rol_adr32_ifm() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -183767,12 +183768,12 @@ void m68000_mcu_device::rol_adr32_ifm() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000mcu-sipm.cpp b/src/devices/cpu/m68000/m68000mcu-sipm.cpp
index 73e15ae7481..53007c476c0 100644
--- a/src/devices/cpu/m68000/m68000mcu-sipm.cpp
+++ b/src/devices/cpu/m68000/m68000mcu-sipm.cpp
@@ -209,7 +209,7 @@ void m68000_mcu_device::state_bus_error_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -219,7 +219,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -245,7 +245,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -270,7 +270,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -299,7 +299,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -324,7 +324,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -352,7 +352,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -378,7 +378,7 @@ void m68000_mcu_device::state_bus_error_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -525,7 +525,7 @@ void m68000_mcu_device::state_address_error_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -535,7 +535,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -561,7 +561,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 3:
@@ -586,7 +586,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -615,7 +615,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 7:
@@ -640,7 +640,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -668,7 +668,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 11:
@@ -694,7 +694,7 @@ void m68000_mcu_device::state_address_error_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -851,7 +851,7 @@ void m68000_mcu_device::state_interrupt_ipm()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -863,7 +863,7 @@ void m68000_mcu_device::state_interrupt_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -925,7 +925,7 @@ void m68000_mcu_device::state_interrupt_ipm()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -951,7 +951,7 @@ void m68000_mcu_device::state_interrupt_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1096,7 +1096,7 @@ void m68000_mcu_device::state_trace_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1106,7 +1106,7 @@ void m68000_mcu_device::state_trace_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1134,7 +1134,7 @@ void m68000_mcu_device::state_trace_ipm()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1160,7 +1160,7 @@ void m68000_mcu_device::state_trace_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1305,7 +1305,7 @@ void m68000_mcu_device::state_illegal_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1315,7 +1315,7 @@ void m68000_mcu_device::state_illegal_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1343,7 +1343,7 @@ void m68000_mcu_device::state_illegal_ipm()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1369,7 +1369,7 @@ void m68000_mcu_device::state_illegal_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1514,7 +1514,7 @@ void m68000_mcu_device::state_priviledge_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1524,7 +1524,7 @@ void m68000_mcu_device::state_priviledge_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1552,7 +1552,7 @@ void m68000_mcu_device::state_priviledge_ipm()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1578,7 +1578,7 @@ void m68000_mcu_device::state_priviledge_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1723,7 +1723,7 @@ void m68000_mcu_device::state_linea_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1733,7 +1733,7 @@ void m68000_mcu_device::state_linea_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1761,7 +1761,7 @@ void m68000_mcu_device::state_linea_ipm()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1787,7 +1787,7 @@ void m68000_mcu_device::state_linea_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1932,7 +1932,7 @@ void m68000_mcu_device::state_linef_ipm()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1942,7 +1942,7 @@ void m68000_mcu_device::state_linef_ipm()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1970,7 +1970,7 @@ void m68000_mcu_device::state_linef_ipm()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 3:
@@ -1996,7 +1996,7 @@ void m68000_mcu_device::state_linef_ipm()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2138,7 +2138,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ipm() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2164,7 +2164,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ipm() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2172,7 +2172,7 @@ void m68000_mcu_device::ori_b_imm8_ds_ipm() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2213,7 +2213,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ipm() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2238,11 +2238,11 @@ void m68000_mcu_device::ori_b_imm8_ais_ipm() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2264,7 +2264,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ipm() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2294,7 +2294,7 @@ void m68000_mcu_device::ori_b_imm8_ais_ipm() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2327,7 +2327,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ipm() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2355,12 +2355,12 @@ void m68000_mcu_device::ori_b_imm8_aips_ipm() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2383,7 +2383,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ipm() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2413,7 +2413,7 @@ void m68000_mcu_device::ori_b_imm8_aips_ipm() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2446,7 +2446,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ipm() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2473,7 +2473,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ipm() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2481,7 +2481,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ipm() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -2504,7 +2504,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ipm() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2534,7 +2534,7 @@ void m68000_mcu_device::ori_b_imm8_pais_ipm() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2567,7 +2567,7 @@ void m68000_mcu_device::ori_b_imm8_das_ipm() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2592,7 +2592,7 @@ void m68000_mcu_device::ori_b_imm8_das_ipm() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2618,11 +2618,11 @@ void m68000_mcu_device::ori_b_imm8_das_ipm() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2644,7 +2644,7 @@ void m68000_mcu_device::ori_b_imm8_das_ipm() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2674,7 +2674,7 @@ void m68000_mcu_device::ori_b_imm8_das_ipm() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2707,7 +2707,7 @@ void m68000_mcu_device::ori_b_imm8_dais_ipm() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2730,14 +2730,14 @@ void m68000_mcu_device::ori_b_imm8_dais_ipm() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -2745,7 +2745,7 @@ void m68000_mcu_device::ori_b_imm8_dais_ipm() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2772,7 +2772,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2801,11 +2801,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -2827,7 +2827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2857,7 +2857,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -2889,7 +2889,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ipm() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -2917,7 +2917,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ipm() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -2943,7 +2943,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ipm() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -2966,7 +2966,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ipm() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2996,7 +2996,7 @@ void m68000_mcu_device::ori_b_imm8_adr16_ipm() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3028,7 +3028,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3054,7 +3054,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3081,7 +3081,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3107,7 +3107,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -3130,7 +3130,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3160,7 +3160,7 @@ void m68000_mcu_device::ori_b_imm8_adr32_ipm() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -3192,7 +3192,7 @@ void m68000_mcu_device::ori_imm8_ccr_ipm() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3217,21 +3217,21 @@ void m68000_mcu_device::ori_imm8_ccr_ipm() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3239,7 +3239,7 @@ void m68000_mcu_device::ori_imm8_ccr_ipm() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3266,11 +3266,11 @@ void m68000_mcu_device::ori_imm8_ccr_ipm() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3311,7 +3311,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ipm() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3337,7 +3337,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ipm() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3345,7 +3345,7 @@ void m68000_mcu_device::ori_w_imm16_ds_ipm() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3386,7 +3386,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ipm() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3411,11 +3411,11 @@ void m68000_mcu_device::ori_w_imm16_ais_ipm() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3441,7 +3441,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ipm() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3471,7 +3471,7 @@ void m68000_mcu_device::ori_w_imm16_ais_ipm() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3510,7 +3510,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ipm() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3538,12 +3538,12 @@ void m68000_mcu_device::ori_w_imm16_aips_ipm() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3570,7 +3570,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ipm() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3600,7 +3600,7 @@ void m68000_mcu_device::ori_w_imm16_aips_ipm() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3639,7 +3639,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ipm() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3666,7 +3666,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ipm() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3674,7 +3674,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ipm() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -3701,7 +3701,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ipm() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3731,7 +3731,7 @@ void m68000_mcu_device::ori_w_imm16_pais_ipm() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3770,7 +3770,7 @@ void m68000_mcu_device::ori_w_imm16_das_ipm() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3795,7 +3795,7 @@ void m68000_mcu_device::ori_w_imm16_das_ipm() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3821,11 +3821,11 @@ void m68000_mcu_device::ori_w_imm16_das_ipm() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -3851,7 +3851,7 @@ void m68000_mcu_device::ori_w_imm16_das_ipm() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3881,7 +3881,7 @@ void m68000_mcu_device::ori_w_imm16_das_ipm() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -3920,7 +3920,7 @@ void m68000_mcu_device::ori_w_imm16_dais_ipm() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3943,14 +3943,14 @@ void m68000_mcu_device::ori_w_imm16_dais_ipm() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3958,7 +3958,7 @@ void m68000_mcu_device::ori_w_imm16_dais_ipm() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -3985,7 +3985,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4014,11 +4014,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4044,7 +4044,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4074,7 +4074,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4112,7 +4112,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ipm() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4140,7 +4140,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ipm() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -4166,7 +4166,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ipm() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4193,7 +4193,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ipm() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4223,7 +4223,7 @@ void m68000_mcu_device::ori_w_imm16_adr16_ipm() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4261,7 +4261,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4287,7 +4287,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4314,7 +4314,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -4340,7 +4340,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -4367,7 +4367,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4397,7 +4397,7 @@ void m68000_mcu_device::ori_w_imm16_adr32_ipm() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4439,7 +4439,7 @@ void m68000_mcu_device::ori_i16u_sr_ipm() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4464,23 +4464,23 @@ void m68000_mcu_device::ori_i16u_sr_ipm() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4488,7 +4488,7 @@ void m68000_mcu_device::ori_i16u_sr_ipm() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4515,11 +4515,11 @@ void m68000_mcu_device::ori_i16u_sr_ipm() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4559,7 +4559,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ipm() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4585,7 +4585,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ipm() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4611,12 +4611,12 @@ void m68000_mcu_device::ori_l_imm32_ds_ipm() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4639,7 +4639,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ipm() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -4648,7 +4648,7 @@ void m68000_mcu_device::ori_l_imm32_ds_ipm() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -4668,7 +4668,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4694,7 +4694,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4719,7 +4719,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4747,7 +4747,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4773,7 +4773,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4801,7 +4801,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -4829,7 +4829,7 @@ void m68000_mcu_device::ori_l_imm32_ais_ipm() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -4867,7 +4867,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4893,7 +4893,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -4918,7 +4918,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4946,11 +4946,11 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -4976,7 +4976,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5004,7 +5004,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5032,7 +5032,7 @@ void m68000_mcu_device::ori_l_imm32_aips_ipm() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5070,7 +5070,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5096,7 +5096,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5120,14 +5120,14 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5154,7 +5154,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5180,7 +5180,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5208,7 +5208,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5236,7 +5236,7 @@ void m68000_mcu_device::ori_l_imm32_pais_ipm() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5274,7 +5274,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5300,7 +5300,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5325,7 +5325,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5350,7 +5350,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5378,7 +5378,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5404,7 +5404,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5432,7 +5432,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5460,7 +5460,7 @@ void m68000_mcu_device::ori_l_imm32_das_ipm() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5498,7 +5498,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ipm() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5524,7 +5524,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ipm() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5547,14 +5547,14 @@ void m68000_mcu_device::ori_l_imm32_dais_ipm() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -5562,7 +5562,7 @@ void m68000_mcu_device::ori_l_imm32_dais_ipm() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5589,7 +5589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5617,7 +5617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5645,7 +5645,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5671,7 +5671,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5699,7 +5699,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5727,7 +5727,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5764,7 +5764,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5790,7 +5790,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -5818,7 +5818,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5844,7 +5844,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -5872,7 +5872,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -5898,7 +5898,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5926,7 +5926,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5954,7 +5954,7 @@ void m68000_mcu_device::ori_l_imm32_adr16_ipm() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -5991,7 +5991,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6017,7 +6017,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6043,7 +6043,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6070,7 +6070,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -6096,7 +6096,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6124,7 +6124,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -6150,7 +6150,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6178,7 +6178,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6206,7 +6206,7 @@ void m68000_mcu_device::ori_l_imm32_adr32_ipm() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -6248,13 +6248,13 @@ void m68000_mcu_device::btst_dd_ds_ipm() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6286,7 +6286,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6300,7 +6300,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -6322,7 +6322,7 @@ void m68000_mcu_device::movep_w_das_dd_ipm() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6347,7 +6347,7 @@ void m68000_mcu_device::movep_w_das_dd_ipm() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6368,7 +6368,7 @@ void m68000_mcu_device::movep_w_das_dd_ipm() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6392,7 +6392,7 @@ void m68000_mcu_device::movep_w_das_dd_ipm() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6432,11 +6432,11 @@ void m68000_mcu_device::btst_dd_ais_ipm() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6458,13 +6458,13 @@ void m68000_mcu_device::btst_dd_ais_ipm() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6507,12 +6507,12 @@ void m68000_mcu_device::btst_dd_aips_ipm() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6535,13 +6535,13 @@ void m68000_mcu_device::btst_dd_aips_ipm() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6583,7 +6583,7 @@ void m68000_mcu_device::btst_dd_pais_ipm() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -6591,7 +6591,7 @@ void m68000_mcu_device::btst_dd_pais_ipm() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -6614,13 +6614,13 @@ void m68000_mcu_device::btst_dd_pais_ipm() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6660,7 +6660,7 @@ void m68000_mcu_device::btst_dd_das_ipm() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6686,11 +6686,11 @@ void m68000_mcu_device::btst_dd_das_ipm() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6712,13 +6712,13 @@ void m68000_mcu_device::btst_dd_das_ipm() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6756,14 +6756,14 @@ void m68000_mcu_device::btst_dd_dais_ipm() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -6771,7 +6771,7 @@ void m68000_mcu_device::btst_dd_dais_ipm() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6798,7 +6798,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6827,11 +6827,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -6853,13 +6853,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6901,7 +6901,7 @@ void m68000_mcu_device::btst_dd_adr16_ipm() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -6927,7 +6927,7 @@ void m68000_mcu_device::btst_dd_adr16_ipm() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -6950,13 +6950,13 @@ void m68000_mcu_device::btst_dd_adr16_ipm() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -6996,7 +6996,7 @@ void m68000_mcu_device::btst_dd_adr32_ipm() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7023,7 +7023,7 @@ void m68000_mcu_device::btst_dd_adr32_ipm() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7049,7 +7049,7 @@ void m68000_mcu_device::btst_dd_adr32_ipm() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -7072,13 +7072,13 @@ void m68000_mcu_device::btst_dd_adr32_ipm() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7117,7 +7117,7 @@ void m68000_mcu_device::btst_dd_dpc_ipm() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7143,11 +7143,11 @@ void m68000_mcu_device::btst_dd_dpc_ipm() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7169,13 +7169,13 @@ void m68000_mcu_device::btst_dd_dpc_ipm() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7212,14 +7212,14 @@ void m68000_mcu_device::btst_dd_dpci_ipm() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7227,7 +7227,7 @@ void m68000_mcu_device::btst_dd_dpci_ipm() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7254,7 +7254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7283,11 +7283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7309,13 +7309,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7357,7 +7357,7 @@ void m68000_mcu_device::btst_dd_imm_ipm() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7385,12 +7385,12 @@ void m68000_mcu_device::btst_dd_imm_ipm() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7422,7 +7422,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7436,7 +7436,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -7462,13 +7462,13 @@ void m68000_mcu_device::bchg_dd_ds_ipm() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -7500,7 +7500,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7513,14 +7513,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7542,7 +7542,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7567,7 +7567,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7587,7 +7587,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7608,7 +7608,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7629,7 +7629,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7653,7 +7653,7 @@ void m68000_mcu_device::movep_l_das_dd_ipm() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7693,11 +7693,11 @@ void m68000_mcu_device::bchg_dd_ais_ipm() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -7720,7 +7720,7 @@ void m68000_mcu_device::bchg_dd_ais_ipm() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7748,7 +7748,7 @@ void m68000_mcu_device::bchg_dd_ais_ipm() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7785,12 +7785,12 @@ void m68000_mcu_device::bchg_dd_aips_ipm() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7814,7 +7814,7 @@ void m68000_mcu_device::bchg_dd_aips_ipm() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7842,7 +7842,7 @@ void m68000_mcu_device::bchg_dd_aips_ipm() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7878,7 +7878,7 @@ void m68000_mcu_device::bchg_dd_pais_ipm() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7886,7 +7886,7 @@ void m68000_mcu_device::bchg_dd_pais_ipm() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -7910,7 +7910,7 @@ void m68000_mcu_device::bchg_dd_pais_ipm() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -7938,7 +7938,7 @@ void m68000_mcu_device::bchg_dd_pais_ipm() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -7972,7 +7972,7 @@ void m68000_mcu_device::bchg_dd_das_ipm() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -7998,11 +7998,11 @@ void m68000_mcu_device::bchg_dd_das_ipm() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8025,7 +8025,7 @@ void m68000_mcu_device::bchg_dd_das_ipm() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8053,7 +8053,7 @@ void m68000_mcu_device::bchg_dd_das_ipm() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8085,14 +8085,14 @@ void m68000_mcu_device::bchg_dd_dais_ipm() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8100,7 +8100,7 @@ void m68000_mcu_device::bchg_dd_dais_ipm() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8127,7 +8127,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8156,11 +8156,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8183,7 +8183,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8211,7 +8211,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8247,7 +8247,7 @@ void m68000_mcu_device::bchg_dd_adr16_ipm() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8273,7 +8273,7 @@ void m68000_mcu_device::bchg_dd_adr16_ipm() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -8297,7 +8297,7 @@ void m68000_mcu_device::bchg_dd_adr16_ipm() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -8325,7 +8325,7 @@ void m68000_mcu_device::bchg_dd_adr16_ipm() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8359,7 +8359,7 @@ void m68000_mcu_device::bchg_dd_adr32_ipm() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8386,7 +8386,7 @@ void m68000_mcu_device::bchg_dd_adr32_ipm() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8412,7 +8412,7 @@ void m68000_mcu_device::bchg_dd_adr32_ipm() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -8436,7 +8436,7 @@ void m68000_mcu_device::bchg_dd_adr32_ipm() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -8464,7 +8464,7 @@ void m68000_mcu_device::bchg_dd_adr32_ipm() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8502,13 +8502,13 @@ void m68000_mcu_device::bclr_dd_ds_ipm() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8537,14 +8537,14 @@ void m68000_mcu_device::bclr_dd_ds_ipm() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8557,18 +8557,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8590,7 +8590,7 @@ void m68000_mcu_device::movep_w_dd_das_ipm() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8617,7 +8617,7 @@ void m68000_mcu_device::movep_w_dd_das_ipm() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8635,7 +8635,7 @@ void m68000_mcu_device::movep_w_dd_das_ipm() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -8654,11 +8654,11 @@ void m68000_mcu_device::movep_w_dd_das_ipm() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -8698,11 +8698,11 @@ void m68000_mcu_device::bclr_dd_ais_ipm() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -8724,12 +8724,12 @@ void m68000_mcu_device::bclr_dd_ais_ipm() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8757,7 +8757,7 @@ void m68000_mcu_device::bclr_dd_ais_ipm() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8794,12 +8794,12 @@ void m68000_mcu_device::bclr_dd_aips_ipm() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8822,12 +8822,12 @@ void m68000_mcu_device::bclr_dd_aips_ipm() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8855,7 +8855,7 @@ void m68000_mcu_device::bclr_dd_aips_ipm() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8891,7 +8891,7 @@ void m68000_mcu_device::bclr_dd_pais_ipm() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8899,7 +8899,7 @@ void m68000_mcu_device::bclr_dd_pais_ipm() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8922,12 +8922,12 @@ void m68000_mcu_device::bclr_dd_pais_ipm() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -8955,7 +8955,7 @@ void m68000_mcu_device::bclr_dd_pais_ipm() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8989,7 +8989,7 @@ void m68000_mcu_device::bclr_dd_das_ipm() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9015,11 +9015,11 @@ void m68000_mcu_device::bclr_dd_das_ipm() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9041,12 +9041,12 @@ void m68000_mcu_device::bclr_dd_das_ipm() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9074,7 +9074,7 @@ void m68000_mcu_device::bclr_dd_das_ipm() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9106,14 +9106,14 @@ void m68000_mcu_device::bclr_dd_dais_ipm() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9121,7 +9121,7 @@ void m68000_mcu_device::bclr_dd_dais_ipm() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9148,7 +9148,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9177,11 +9177,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9203,12 +9203,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9236,7 +9236,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9272,7 +9272,7 @@ void m68000_mcu_device::bclr_dd_adr16_ipm() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9298,7 +9298,7 @@ void m68000_mcu_device::bclr_dd_adr16_ipm() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -9321,12 +9321,12 @@ void m68000_mcu_device::bclr_dd_adr16_ipm() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9354,7 +9354,7 @@ void m68000_mcu_device::bclr_dd_adr16_ipm() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9388,7 +9388,7 @@ void m68000_mcu_device::bclr_dd_adr32_ipm() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9415,7 +9415,7 @@ void m68000_mcu_device::bclr_dd_adr32_ipm() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9441,7 +9441,7 @@ void m68000_mcu_device::bclr_dd_adr32_ipm() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9464,12 +9464,12 @@ void m68000_mcu_device::bclr_dd_adr32_ipm() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -9497,7 +9497,7 @@ void m68000_mcu_device::bclr_dd_adr32_ipm() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9535,13 +9535,13 @@ void m68000_mcu_device::bset_dd_ds_ipm() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9573,7 +9573,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9586,14 +9586,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9615,7 +9615,7 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9641,7 +9641,7 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9659,7 +9659,7 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9678,7 +9678,7 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9696,7 +9696,7 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -9715,11 +9715,11 @@ void m68000_mcu_device::movep_l_dd_das_ipm() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -9759,11 +9759,11 @@ void m68000_mcu_device::bset_dd_ais_ipm() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -9786,7 +9786,7 @@ void m68000_mcu_device::bset_dd_ais_ipm() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9814,7 +9814,7 @@ void m68000_mcu_device::bset_dd_ais_ipm() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9851,12 +9851,12 @@ void m68000_mcu_device::bset_dd_aips_ipm() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9880,7 +9880,7 @@ void m68000_mcu_device::bset_dd_aips_ipm() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -9908,7 +9908,7 @@ void m68000_mcu_device::bset_dd_aips_ipm() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9944,7 +9944,7 @@ void m68000_mcu_device::bset_dd_pais_ipm() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9952,7 +9952,7 @@ void m68000_mcu_device::bset_dd_pais_ipm() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -9976,7 +9976,7 @@ void m68000_mcu_device::bset_dd_pais_ipm() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10004,7 +10004,7 @@ void m68000_mcu_device::bset_dd_pais_ipm() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10038,7 +10038,7 @@ void m68000_mcu_device::bset_dd_das_ipm() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10064,11 +10064,11 @@ void m68000_mcu_device::bset_dd_das_ipm() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10091,7 +10091,7 @@ void m68000_mcu_device::bset_dd_das_ipm() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10119,7 +10119,7 @@ void m68000_mcu_device::bset_dd_das_ipm() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10151,14 +10151,14 @@ void m68000_mcu_device::bset_dd_dais_ipm() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10166,7 +10166,7 @@ void m68000_mcu_device::bset_dd_dais_ipm() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10193,7 +10193,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10222,11 +10222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10249,7 +10249,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10277,7 +10277,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10313,7 +10313,7 @@ void m68000_mcu_device::bset_dd_adr16_ipm() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10339,7 +10339,7 @@ void m68000_mcu_device::bset_dd_adr16_ipm() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10363,7 +10363,7 @@ void m68000_mcu_device::bset_dd_adr16_ipm() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -10391,7 +10391,7 @@ void m68000_mcu_device::bset_dd_adr16_ipm() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10425,7 +10425,7 @@ void m68000_mcu_device::bset_dd_adr32_ipm() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10452,7 +10452,7 @@ void m68000_mcu_device::bset_dd_adr32_ipm() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10478,7 +10478,7 @@ void m68000_mcu_device::bset_dd_adr32_ipm() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10502,7 +10502,7 @@ void m68000_mcu_device::bset_dd_adr32_ipm() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10530,7 +10530,7 @@ void m68000_mcu_device::bset_dd_adr32_ipm() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10565,7 +10565,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ipm() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10591,7 +10591,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ipm() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -10599,7 +10599,7 @@ void m68000_mcu_device::andi_b_imm8_ds_ipm() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10640,7 +10640,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ipm() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10665,11 +10665,11 @@ void m68000_mcu_device::andi_b_imm8_ais_ipm() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -10691,7 +10691,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ipm() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10721,7 +10721,7 @@ void m68000_mcu_device::andi_b_imm8_ais_ipm() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10754,7 +10754,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ipm() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10782,12 +10782,12 @@ void m68000_mcu_device::andi_b_imm8_aips_ipm() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10810,7 +10810,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ipm() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10840,7 +10840,7 @@ void m68000_mcu_device::andi_b_imm8_aips_ipm() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10873,7 +10873,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ipm() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -10900,7 +10900,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ipm() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10908,7 +10908,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ipm() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -10931,7 +10931,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ipm() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -10961,7 +10961,7 @@ void m68000_mcu_device::andi_b_imm8_pais_ipm() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -10994,7 +10994,7 @@ void m68000_mcu_device::andi_b_imm8_das_ipm() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11019,7 +11019,7 @@ void m68000_mcu_device::andi_b_imm8_das_ipm() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11045,11 +11045,11 @@ void m68000_mcu_device::andi_b_imm8_das_ipm() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11071,7 +11071,7 @@ void m68000_mcu_device::andi_b_imm8_das_ipm() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11101,7 +11101,7 @@ void m68000_mcu_device::andi_b_imm8_das_ipm() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11134,7 +11134,7 @@ void m68000_mcu_device::andi_b_imm8_dais_ipm() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11157,14 +11157,14 @@ void m68000_mcu_device::andi_b_imm8_dais_ipm() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11172,7 +11172,7 @@ void m68000_mcu_device::andi_b_imm8_dais_ipm() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11199,7 +11199,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11228,11 +11228,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -11254,7 +11254,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11284,7 +11284,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11316,7 +11316,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ipm() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11344,7 +11344,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ipm() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11370,7 +11370,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ipm() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -11393,7 +11393,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ipm() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11423,7 +11423,7 @@ void m68000_mcu_device::andi_b_imm8_adr16_ipm() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11455,7 +11455,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11481,7 +11481,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11508,7 +11508,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11534,7 +11534,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -11557,7 +11557,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11587,7 +11587,7 @@ void m68000_mcu_device::andi_b_imm8_adr32_ipm() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -11619,7 +11619,7 @@ void m68000_mcu_device::andi_imm8_ccr_ipm() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11644,21 +11644,21 @@ void m68000_mcu_device::andi_imm8_ccr_ipm() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -11666,7 +11666,7 @@ void m68000_mcu_device::andi_imm8_ccr_ipm() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11693,11 +11693,11 @@ void m68000_mcu_device::andi_imm8_ccr_ipm() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11738,7 +11738,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ipm() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11764,7 +11764,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ipm() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11772,7 +11772,7 @@ void m68000_mcu_device::andi_w_imm16_ds_ipm() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11813,7 +11813,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ipm() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11838,11 +11838,11 @@ void m68000_mcu_device::andi_w_imm16_ais_ipm() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -11868,7 +11868,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ipm() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -11898,7 +11898,7 @@ void m68000_mcu_device::andi_w_imm16_ais_ipm() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -11937,7 +11937,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ipm() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -11965,12 +11965,12 @@ void m68000_mcu_device::andi_w_imm16_aips_ipm() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -11997,7 +11997,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ipm() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12027,7 +12027,7 @@ void m68000_mcu_device::andi_w_imm16_aips_ipm() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12066,7 +12066,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ipm() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12093,7 +12093,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ipm() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12101,7 +12101,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ipm() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -12128,7 +12128,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ipm() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12158,7 +12158,7 @@ void m68000_mcu_device::andi_w_imm16_pais_ipm() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12197,7 +12197,7 @@ void m68000_mcu_device::andi_w_imm16_das_ipm() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12222,7 +12222,7 @@ void m68000_mcu_device::andi_w_imm16_das_ipm() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12248,11 +12248,11 @@ void m68000_mcu_device::andi_w_imm16_das_ipm() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12278,7 +12278,7 @@ void m68000_mcu_device::andi_w_imm16_das_ipm() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12308,7 +12308,7 @@ void m68000_mcu_device::andi_w_imm16_das_ipm() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12347,7 +12347,7 @@ void m68000_mcu_device::andi_w_imm16_dais_ipm() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12370,14 +12370,14 @@ void m68000_mcu_device::andi_w_imm16_dais_ipm() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12385,7 +12385,7 @@ void m68000_mcu_device::andi_w_imm16_dais_ipm() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12412,7 +12412,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12441,11 +12441,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -12471,7 +12471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12501,7 +12501,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12539,7 +12539,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ipm() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12567,7 +12567,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ipm() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12593,7 +12593,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ipm() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12620,7 +12620,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ipm() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12650,7 +12650,7 @@ void m68000_mcu_device::andi_w_imm16_adr16_ipm() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12688,7 +12688,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12714,7 +12714,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12741,7 +12741,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12767,7 +12767,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -12794,7 +12794,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12824,7 +12824,7 @@ void m68000_mcu_device::andi_w_imm16_adr32_ipm() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -12866,7 +12866,7 @@ void m68000_mcu_device::andi_i16u_sr_ipm() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12891,23 +12891,23 @@ void m68000_mcu_device::andi_i16u_sr_ipm() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -12915,7 +12915,7 @@ void m68000_mcu_device::andi_i16u_sr_ipm() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12942,11 +12942,11 @@ void m68000_mcu_device::andi_i16u_sr_ipm() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -12986,7 +12986,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ipm() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13012,7 +13012,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ipm() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13038,12 +13038,12 @@ void m68000_mcu_device::andi_l_imm32_ds_ipm() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13066,7 +13066,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ipm() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -13075,7 +13075,7 @@ void m68000_mcu_device::andi_l_imm32_ds_ipm() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -13095,7 +13095,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13121,7 +13121,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13146,7 +13146,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13174,7 +13174,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13200,7 +13200,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13228,7 +13228,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13256,7 +13256,7 @@ void m68000_mcu_device::andi_l_imm32_ais_ipm() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13294,7 +13294,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13320,7 +13320,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13345,7 +13345,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13373,11 +13373,11 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13403,7 +13403,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13431,7 +13431,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13459,7 +13459,7 @@ void m68000_mcu_device::andi_l_imm32_aips_ipm() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13497,7 +13497,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13523,7 +13523,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13547,14 +13547,14 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13581,7 +13581,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13607,7 +13607,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13635,7 +13635,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13663,7 +13663,7 @@ void m68000_mcu_device::andi_l_imm32_pais_ipm() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13701,7 +13701,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13727,7 +13727,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13752,7 +13752,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13777,7 +13777,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -13805,7 +13805,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -13831,7 +13831,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13859,7 +13859,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -13887,7 +13887,7 @@ void m68000_mcu_device::andi_l_imm32_das_ipm() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -13925,7 +13925,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ipm() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13951,7 +13951,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ipm() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -13974,14 +13974,14 @@ void m68000_mcu_device::andi_l_imm32_dais_ipm() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -13989,7 +13989,7 @@ void m68000_mcu_device::andi_l_imm32_dais_ipm() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14016,7 +14016,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14044,7 +14044,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14072,7 +14072,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14098,7 +14098,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14126,7 +14126,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14154,7 +14154,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14191,7 +14191,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14217,7 +14217,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14245,7 +14245,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14271,7 +14271,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -14299,7 +14299,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14325,7 +14325,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14353,7 +14353,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14381,7 +14381,7 @@ void m68000_mcu_device::andi_l_imm32_adr16_ipm() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14418,7 +14418,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14444,7 +14444,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14470,7 +14470,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -14497,7 +14497,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -14523,7 +14523,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14551,7 +14551,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -14577,7 +14577,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14605,7 +14605,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14633,7 +14633,7 @@ void m68000_mcu_device::andi_l_imm32_adr32_ipm() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -14697,7 +14697,7 @@ void m68000_mcu_device::subi_b_imm8_ds_ipm() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -14769,7 +14769,7 @@ void m68000_mcu_device::subi_b_imm8_ais_ipm() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -14794,7 +14794,7 @@ void m68000_mcu_device::subi_b_imm8_ais_ipm() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14886,7 +14886,7 @@ void m68000_mcu_device::subi_b_imm8_aips_ipm() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -14909,7 +14909,7 @@ void m68000_mcu_device::subi_b_imm8_aips_ipm() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15003,7 +15003,7 @@ void m68000_mcu_device::subi_b_imm8_pais_ipm() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15026,7 +15026,7 @@ void m68000_mcu_device::subi_b_imm8_pais_ipm() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15137,7 +15137,7 @@ void m68000_mcu_device::subi_b_imm8_das_ipm() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15162,7 +15162,7 @@ void m68000_mcu_device::subi_b_imm8_das_ipm() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15246,7 +15246,7 @@ void m68000_mcu_device::subi_b_imm8_dais_ipm() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -15314,7 +15314,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15339,7 +15339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15451,7 +15451,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_ipm() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15474,7 +15474,7 @@ void m68000_mcu_device::subi_b_imm8_adr16_ipm() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15610,7 +15610,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_ipm() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -15633,7 +15633,7 @@ void m68000_mcu_device::subi_b_imm8_adr32_ipm() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15720,7 +15720,7 @@ void m68000_mcu_device::subi_w_imm16_ds_ipm() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -15792,7 +15792,7 @@ void m68000_mcu_device::subi_w_imm16_ais_ipm() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -15821,7 +15821,7 @@ void m68000_mcu_device::subi_w_imm16_ais_ipm() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15919,7 +15919,7 @@ void m68000_mcu_device::subi_w_imm16_aips_ipm() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -15946,7 +15946,7 @@ void m68000_mcu_device::subi_w_imm16_aips_ipm() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16046,7 +16046,7 @@ void m68000_mcu_device::subi_w_imm16_pais_ipm() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -16073,7 +16073,7 @@ void m68000_mcu_device::subi_w_imm16_pais_ipm() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16190,7 +16190,7 @@ void m68000_mcu_device::subi_w_imm16_das_ipm() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16219,7 +16219,7 @@ void m68000_mcu_device::subi_w_imm16_das_ipm() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16309,7 +16309,7 @@ void m68000_mcu_device::subi_w_imm16_dais_ipm() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -16377,7 +16377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16406,7 +16406,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16524,7 +16524,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_ipm() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16551,7 +16551,7 @@ void m68000_mcu_device::subi_w_imm16_adr16_ipm() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16693,7 +16693,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_ipm() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -16720,7 +16720,7 @@ void m68000_mcu_device::subi_w_imm16_adr32_ipm() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16837,7 +16837,7 @@ void m68000_mcu_device::subi_l_imm32_ds_ipm() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -16864,7 +16864,7 @@ void m68000_mcu_device::subi_l_imm32_ds_ipm() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -16941,7 +16941,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ipm() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -16994,7 +16994,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ipm() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17022,7 +17022,7 @@ void m68000_mcu_device::subi_l_imm32_ais_ipm() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17136,7 +17136,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ipm() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -17192,7 +17192,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ipm() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17220,7 +17220,7 @@ void m68000_mcu_device::subi_l_imm32_aips_ipm() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17333,7 +17333,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ipm() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -17391,7 +17391,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ipm() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17419,7 +17419,7 @@ void m68000_mcu_device::subi_l_imm32_pais_ipm() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17557,7 +17557,7 @@ void m68000_mcu_device::subi_l_imm32_das_ipm() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17610,7 +17610,7 @@ void m68000_mcu_device::subi_l_imm32_das_ipm() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17638,7 +17638,7 @@ void m68000_mcu_device::subi_l_imm32_das_ipm() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -17750,7 +17750,7 @@ void m68000_mcu_device::subi_l_imm32_dais_ipm() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -17817,7 +17817,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -17870,7 +17870,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17898,7 +17898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18038,7 +18038,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ipm() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -18091,7 +18091,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ipm() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18119,7 +18119,7 @@ void m68000_mcu_device::subi_l_imm32_adr16_ipm() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18283,7 +18283,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ipm() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -18336,7 +18336,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ipm() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18364,7 +18364,7 @@ void m68000_mcu_device::subi_l_imm32_adr32_ipm() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -18455,7 +18455,7 @@ void m68000_mcu_device::addi_b_imm8_ds_ipm() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -18527,7 +18527,7 @@ void m68000_mcu_device::addi_b_imm8_ais_ipm() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18552,7 +18552,7 @@ void m68000_mcu_device::addi_b_imm8_ais_ipm() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18644,7 +18644,7 @@ void m68000_mcu_device::addi_b_imm8_aips_ipm() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18667,7 +18667,7 @@ void m68000_mcu_device::addi_b_imm8_aips_ipm() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18761,7 +18761,7 @@ void m68000_mcu_device::addi_b_imm8_pais_ipm() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -18784,7 +18784,7 @@ void m68000_mcu_device::addi_b_imm8_pais_ipm() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18895,7 +18895,7 @@ void m68000_mcu_device::addi_b_imm8_das_ipm() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18920,7 +18920,7 @@ void m68000_mcu_device::addi_b_imm8_das_ipm() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19004,7 +19004,7 @@ void m68000_mcu_device::addi_b_imm8_dais_ipm() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19072,7 +19072,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19097,7 +19097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19209,7 +19209,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_ipm() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19232,7 +19232,7 @@ void m68000_mcu_device::addi_b_imm8_adr16_ipm() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19368,7 +19368,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_ipm() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -19391,7 +19391,7 @@ void m68000_mcu_device::addi_b_imm8_adr32_ipm() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19478,7 +19478,7 @@ void m68000_mcu_device::addi_w_imm16_ds_ipm() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19550,7 +19550,7 @@ void m68000_mcu_device::addi_w_imm16_ais_ipm() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19579,7 +19579,7 @@ void m68000_mcu_device::addi_w_imm16_ais_ipm() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19677,7 +19677,7 @@ void m68000_mcu_device::addi_w_imm16_aips_ipm() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19704,7 +19704,7 @@ void m68000_mcu_device::addi_w_imm16_aips_ipm() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19804,7 +19804,7 @@ void m68000_mcu_device::addi_w_imm16_pais_ipm() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -19831,7 +19831,7 @@ void m68000_mcu_device::addi_w_imm16_pais_ipm() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19948,7 +19948,7 @@ void m68000_mcu_device::addi_w_imm16_das_ipm() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19977,7 +19977,7 @@ void m68000_mcu_device::addi_w_imm16_das_ipm() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20067,7 +20067,7 @@ void m68000_mcu_device::addi_w_imm16_dais_ipm() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -20135,7 +20135,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20164,7 +20164,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20282,7 +20282,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_ipm() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20309,7 +20309,7 @@ void m68000_mcu_device::addi_w_imm16_adr16_ipm() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20451,7 +20451,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_ipm() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -20478,7 +20478,7 @@ void m68000_mcu_device::addi_w_imm16_adr32_ipm() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20595,7 +20595,7 @@ void m68000_mcu_device::addi_l_imm32_ds_ipm() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -20622,7 +20622,7 @@ void m68000_mcu_device::addi_l_imm32_ds_ipm() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -20699,7 +20699,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ipm() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20752,7 +20752,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ipm() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20780,7 +20780,7 @@ void m68000_mcu_device::addi_l_imm32_ais_ipm() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20894,7 +20894,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ipm() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20950,7 +20950,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ipm() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20978,7 +20978,7 @@ void m68000_mcu_device::addi_l_imm32_aips_ipm() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21091,7 +21091,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ipm() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -21149,7 +21149,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ipm() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21177,7 +21177,7 @@ void m68000_mcu_device::addi_l_imm32_pais_ipm() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21315,7 +21315,7 @@ void m68000_mcu_device::addi_l_imm32_das_ipm() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21368,7 +21368,7 @@ void m68000_mcu_device::addi_l_imm32_das_ipm() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21396,7 +21396,7 @@ void m68000_mcu_device::addi_l_imm32_das_ipm() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21508,7 +21508,7 @@ void m68000_mcu_device::addi_l_imm32_dais_ipm() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -21575,7 +21575,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21628,7 +21628,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21656,7 +21656,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21796,7 +21796,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ipm() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -21849,7 +21849,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ipm() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21877,7 +21877,7 @@ void m68000_mcu_device::addi_l_imm32_adr16_ipm() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22041,7 +22041,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ipm() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22094,7 +22094,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ipm() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22122,7 +22122,7 @@ void m68000_mcu_device::addi_l_imm32_adr32_ipm() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22188,7 +22188,7 @@ void m68000_mcu_device::btst_imm8_ds_ipm() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22217,13 +22217,13 @@ void m68000_mcu_device::btst_imm8_ds_ipm() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22255,7 +22255,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22269,7 +22269,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -22292,7 +22292,7 @@ void m68000_mcu_device::btst_imm8_ais_ipm() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22317,11 +22317,11 @@ void m68000_mcu_device::btst_imm8_ais_ipm() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22343,13 +22343,13 @@ void m68000_mcu_device::btst_imm8_ais_ipm() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22390,7 +22390,7 @@ void m68000_mcu_device::btst_imm8_aips_ipm() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22418,12 +22418,12 @@ void m68000_mcu_device::btst_imm8_aips_ipm() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22446,13 +22446,13 @@ void m68000_mcu_device::btst_imm8_aips_ipm() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22493,7 +22493,7 @@ void m68000_mcu_device::btst_imm8_pais_ipm() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22520,7 +22520,7 @@ void m68000_mcu_device::btst_imm8_pais_ipm() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -22528,7 +22528,7 @@ void m68000_mcu_device::btst_imm8_pais_ipm() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -22551,13 +22551,13 @@ void m68000_mcu_device::btst_imm8_pais_ipm() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22598,7 +22598,7 @@ void m68000_mcu_device::btst_imm8_das_ipm() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22623,7 +22623,7 @@ void m68000_mcu_device::btst_imm8_das_ipm() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22649,11 +22649,11 @@ void m68000_mcu_device::btst_imm8_das_ipm() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22675,13 +22675,13 @@ void m68000_mcu_device::btst_imm8_das_ipm() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22722,7 +22722,7 @@ void m68000_mcu_device::btst_imm8_dais_ipm() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22745,14 +22745,14 @@ void m68000_mcu_device::btst_imm8_dais_ipm() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -22760,7 +22760,7 @@ void m68000_mcu_device::btst_imm8_dais_ipm() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22787,7 +22787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22816,11 +22816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -22842,13 +22842,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22888,7 +22888,7 @@ void m68000_mcu_device::btst_imm8_adr16_ipm() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -22916,7 +22916,7 @@ void m68000_mcu_device::btst_imm8_adr16_ipm() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -22942,7 +22942,7 @@ void m68000_mcu_device::btst_imm8_adr16_ipm() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -22965,13 +22965,13 @@ void m68000_mcu_device::btst_imm8_adr16_ipm() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23011,7 +23011,7 @@ void m68000_mcu_device::btst_imm8_adr32_ipm() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23037,7 +23037,7 @@ void m68000_mcu_device::btst_imm8_adr32_ipm() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23064,7 +23064,7 @@ void m68000_mcu_device::btst_imm8_adr32_ipm() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23090,7 +23090,7 @@ void m68000_mcu_device::btst_imm8_adr32_ipm() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -23113,13 +23113,13 @@ void m68000_mcu_device::btst_imm8_adr32_ipm() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23159,7 +23159,7 @@ void m68000_mcu_device::btst_imm8_dpc_ipm() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23184,7 +23184,7 @@ void m68000_mcu_device::btst_imm8_dpc_ipm() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23210,11 +23210,11 @@ void m68000_mcu_device::btst_imm8_dpc_ipm() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23236,13 +23236,13 @@ void m68000_mcu_device::btst_imm8_dpc_ipm() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23282,7 +23282,7 @@ void m68000_mcu_device::btst_imm8_dpci_ipm() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23305,14 +23305,14 @@ void m68000_mcu_device::btst_imm8_dpci_ipm() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -23320,7 +23320,7 @@ void m68000_mcu_device::btst_imm8_dpci_ipm() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23347,7 +23347,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23376,11 +23376,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23402,13 +23402,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23449,7 +23449,7 @@ void m68000_mcu_device::bchg_imm8_ds_ipm() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23478,13 +23478,13 @@ void m68000_mcu_device::bchg_imm8_ds_ipm() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -23516,7 +23516,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23529,14 +23529,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -23559,7 +23559,7 @@ void m68000_mcu_device::bchg_imm8_ais_ipm() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23584,11 +23584,11 @@ void m68000_mcu_device::bchg_imm8_ais_ipm() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23611,7 +23611,7 @@ void m68000_mcu_device::bchg_imm8_ais_ipm() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23639,7 +23639,7 @@ void m68000_mcu_device::bchg_imm8_ais_ipm() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23674,7 +23674,7 @@ void m68000_mcu_device::bchg_imm8_aips_ipm() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23702,12 +23702,12 @@ void m68000_mcu_device::bchg_imm8_aips_ipm() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23731,7 +23731,7 @@ void m68000_mcu_device::bchg_imm8_aips_ipm() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23759,7 +23759,7 @@ void m68000_mcu_device::bchg_imm8_aips_ipm() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23794,7 +23794,7 @@ void m68000_mcu_device::bchg_imm8_pais_ipm() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23821,7 +23821,7 @@ void m68000_mcu_device::bchg_imm8_pais_ipm() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -23829,7 +23829,7 @@ void m68000_mcu_device::bchg_imm8_pais_ipm() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -23853,7 +23853,7 @@ void m68000_mcu_device::bchg_imm8_pais_ipm() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -23881,7 +23881,7 @@ void m68000_mcu_device::bchg_imm8_pais_ipm() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -23916,7 +23916,7 @@ void m68000_mcu_device::bchg_imm8_das_ipm() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23941,7 +23941,7 @@ void m68000_mcu_device::bchg_imm8_das_ipm() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -23967,11 +23967,11 @@ void m68000_mcu_device::bchg_imm8_das_ipm() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -23994,7 +23994,7 @@ void m68000_mcu_device::bchg_imm8_das_ipm() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24022,7 +24022,7 @@ void m68000_mcu_device::bchg_imm8_das_ipm() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24057,7 +24057,7 @@ void m68000_mcu_device::bchg_imm8_dais_ipm() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24080,14 +24080,14 @@ void m68000_mcu_device::bchg_imm8_dais_ipm() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -24095,7 +24095,7 @@ void m68000_mcu_device::bchg_imm8_dais_ipm() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24122,7 +24122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24151,11 +24151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24178,7 +24178,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24206,7 +24206,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24240,7 +24240,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ipm() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24268,7 +24268,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ipm() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24294,7 +24294,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ipm() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24318,7 +24318,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ipm() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -24346,7 +24346,7 @@ void m68000_mcu_device::bchg_imm8_adr16_ipm() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24380,7 +24380,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24406,7 +24406,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24433,7 +24433,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24459,7 +24459,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -24483,7 +24483,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -24511,7 +24511,7 @@ void m68000_mcu_device::bchg_imm8_adr32_ipm() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24546,7 +24546,7 @@ void m68000_mcu_device::bclr_imm8_ds_ipm() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24575,13 +24575,13 @@ void m68000_mcu_device::bclr_imm8_ds_ipm() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -24610,14 +24610,14 @@ void m68000_mcu_device::bclr_imm8_ds_ipm() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24630,18 +24630,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -24664,7 +24664,7 @@ void m68000_mcu_device::bclr_imm8_ais_ipm() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24689,11 +24689,11 @@ void m68000_mcu_device::bclr_imm8_ais_ipm() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -24715,12 +24715,12 @@ void m68000_mcu_device::bclr_imm8_ais_ipm() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24748,7 +24748,7 @@ void m68000_mcu_device::bclr_imm8_ais_ipm() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24783,7 +24783,7 @@ void m68000_mcu_device::bclr_imm8_aips_ipm() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24811,12 +24811,12 @@ void m68000_mcu_device::bclr_imm8_aips_ipm() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24839,12 +24839,12 @@ void m68000_mcu_device::bclr_imm8_aips_ipm() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24872,7 +24872,7 @@ void m68000_mcu_device::bclr_imm8_aips_ipm() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -24907,7 +24907,7 @@ void m68000_mcu_device::bclr_imm8_pais_ipm() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -24934,7 +24934,7 @@ void m68000_mcu_device::bclr_imm8_pais_ipm() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -24942,7 +24942,7 @@ void m68000_mcu_device::bclr_imm8_pais_ipm() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -24965,12 +24965,12 @@ void m68000_mcu_device::bclr_imm8_pais_ipm() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -24998,7 +24998,7 @@ void m68000_mcu_device::bclr_imm8_pais_ipm() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25033,7 +25033,7 @@ void m68000_mcu_device::bclr_imm8_das_ipm() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25058,7 +25058,7 @@ void m68000_mcu_device::bclr_imm8_das_ipm() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25084,11 +25084,11 @@ void m68000_mcu_device::bclr_imm8_das_ipm() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25110,12 +25110,12 @@ void m68000_mcu_device::bclr_imm8_das_ipm() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25143,7 +25143,7 @@ void m68000_mcu_device::bclr_imm8_das_ipm() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25178,7 +25178,7 @@ void m68000_mcu_device::bclr_imm8_dais_ipm() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25201,14 +25201,14 @@ void m68000_mcu_device::bclr_imm8_dais_ipm() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -25216,7 +25216,7 @@ void m68000_mcu_device::bclr_imm8_dais_ipm() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25243,7 +25243,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25272,11 +25272,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25298,12 +25298,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25331,7 +25331,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25365,7 +25365,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ipm() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25393,7 +25393,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ipm() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25419,7 +25419,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ipm() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25442,12 +25442,12 @@ void m68000_mcu_device::bclr_imm8_adr16_ipm() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -25475,7 +25475,7 @@ void m68000_mcu_device::bclr_imm8_adr16_ipm() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25509,7 +25509,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25535,7 +25535,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25562,7 +25562,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25588,7 +25588,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -25611,12 +25611,12 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -25644,7 +25644,7 @@ void m68000_mcu_device::bclr_imm8_adr32_ipm() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25679,7 +25679,7 @@ void m68000_mcu_device::bset_imm8_ds_ipm() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25708,13 +25708,13 @@ void m68000_mcu_device::bset_imm8_ds_ipm() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -25746,7 +25746,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25759,14 +25759,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25789,7 +25789,7 @@ void m68000_mcu_device::bset_imm8_ais_ipm() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25814,11 +25814,11 @@ void m68000_mcu_device::bset_imm8_ais_ipm() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -25841,7 +25841,7 @@ void m68000_mcu_device::bset_imm8_ais_ipm() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25869,7 +25869,7 @@ void m68000_mcu_device::bset_imm8_ais_ipm() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -25904,7 +25904,7 @@ void m68000_mcu_device::bset_imm8_aips_ipm() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -25932,12 +25932,12 @@ void m68000_mcu_device::bset_imm8_aips_ipm() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -25961,7 +25961,7 @@ void m68000_mcu_device::bset_imm8_aips_ipm() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -25989,7 +25989,7 @@ void m68000_mcu_device::bset_imm8_aips_ipm() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26024,7 +26024,7 @@ void m68000_mcu_device::bset_imm8_pais_ipm() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26051,7 +26051,7 @@ void m68000_mcu_device::bset_imm8_pais_ipm() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -26059,7 +26059,7 @@ void m68000_mcu_device::bset_imm8_pais_ipm() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -26083,7 +26083,7 @@ void m68000_mcu_device::bset_imm8_pais_ipm() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26111,7 +26111,7 @@ void m68000_mcu_device::bset_imm8_pais_ipm() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26146,7 +26146,7 @@ void m68000_mcu_device::bset_imm8_das_ipm() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26171,7 +26171,7 @@ void m68000_mcu_device::bset_imm8_das_ipm() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26197,11 +26197,11 @@ void m68000_mcu_device::bset_imm8_das_ipm() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26224,7 +26224,7 @@ void m68000_mcu_device::bset_imm8_das_ipm() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26252,7 +26252,7 @@ void m68000_mcu_device::bset_imm8_das_ipm() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26287,7 +26287,7 @@ void m68000_mcu_device::bset_imm8_dais_ipm() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26310,14 +26310,14 @@ void m68000_mcu_device::bset_imm8_dais_ipm() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26325,7 +26325,7 @@ void m68000_mcu_device::bset_imm8_dais_ipm() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26352,7 +26352,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26381,11 +26381,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26408,7 +26408,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26436,7 +26436,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26470,7 +26470,7 @@ void m68000_mcu_device::bset_imm8_adr16_ipm() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26498,7 +26498,7 @@ void m68000_mcu_device::bset_imm8_adr16_ipm() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -26524,7 +26524,7 @@ void m68000_mcu_device::bset_imm8_adr16_ipm() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26548,7 +26548,7 @@ void m68000_mcu_device::bset_imm8_adr16_ipm() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -26576,7 +26576,7 @@ void m68000_mcu_device::bset_imm8_adr16_ipm() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26610,7 +26610,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26636,7 +26636,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26663,7 +26663,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -26689,7 +26689,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -26713,7 +26713,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -26741,7 +26741,7 @@ void m68000_mcu_device::bset_imm8_adr32_ipm() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -26776,7 +26776,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ipm() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26802,7 +26802,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ipm() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -26810,7 +26810,7 @@ void m68000_mcu_device::eori_b_imm8_ds_ipm() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26851,7 +26851,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ipm() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26876,11 +26876,11 @@ void m68000_mcu_device::eori_b_imm8_ais_ipm() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -26902,7 +26902,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ipm() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26932,7 +26932,7 @@ void m68000_mcu_device::eori_b_imm8_ais_ipm() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -26965,7 +26965,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ipm() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -26993,12 +26993,12 @@ void m68000_mcu_device::eori_b_imm8_aips_ipm() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27021,7 +27021,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ipm() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27051,7 +27051,7 @@ void m68000_mcu_device::eori_b_imm8_aips_ipm() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27084,7 +27084,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ipm() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27111,7 +27111,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ipm() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27119,7 +27119,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ipm() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -27142,7 +27142,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ipm() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27172,7 +27172,7 @@ void m68000_mcu_device::eori_b_imm8_pais_ipm() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27205,7 +27205,7 @@ void m68000_mcu_device::eori_b_imm8_das_ipm() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27230,7 +27230,7 @@ void m68000_mcu_device::eori_b_imm8_das_ipm() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27256,11 +27256,11 @@ void m68000_mcu_device::eori_b_imm8_das_ipm() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27282,7 +27282,7 @@ void m68000_mcu_device::eori_b_imm8_das_ipm() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27312,7 +27312,7 @@ void m68000_mcu_device::eori_b_imm8_das_ipm() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27345,7 +27345,7 @@ void m68000_mcu_device::eori_b_imm8_dais_ipm() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27368,14 +27368,14 @@ void m68000_mcu_device::eori_b_imm8_dais_ipm() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27383,7 +27383,7 @@ void m68000_mcu_device::eori_b_imm8_dais_ipm() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27410,7 +27410,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27439,11 +27439,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -27465,7 +27465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27495,7 +27495,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27527,7 +27527,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ipm() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27555,7 +27555,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ipm() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -27581,7 +27581,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ipm() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -27604,7 +27604,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ipm() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27634,7 +27634,7 @@ void m68000_mcu_device::eori_b_imm8_adr16_ipm() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27666,7 +27666,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27692,7 +27692,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27719,7 +27719,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -27745,7 +27745,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -27768,7 +27768,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27798,7 +27798,7 @@ void m68000_mcu_device::eori_b_imm8_adr32_ipm() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -27830,7 +27830,7 @@ void m68000_mcu_device::eori_imm8_ccr_ipm() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27855,21 +27855,21 @@ void m68000_mcu_device::eori_imm8_ccr_ipm() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -27877,7 +27877,7 @@ void m68000_mcu_device::eori_imm8_ccr_ipm() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27904,11 +27904,11 @@ void m68000_mcu_device::eori_imm8_ccr_ipm() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27949,7 +27949,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ipm() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -27975,7 +27975,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ipm() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -27983,7 +27983,7 @@ void m68000_mcu_device::eori_w_imm16_ds_ipm() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28024,7 +28024,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ipm() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28049,11 +28049,11 @@ void m68000_mcu_device::eori_w_imm16_ais_ipm() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28079,7 +28079,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ipm() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28109,7 +28109,7 @@ void m68000_mcu_device::eori_w_imm16_ais_ipm() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28148,7 +28148,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ipm() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28176,12 +28176,12 @@ void m68000_mcu_device::eori_w_imm16_aips_ipm() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28208,7 +28208,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ipm() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28238,7 +28238,7 @@ void m68000_mcu_device::eori_w_imm16_aips_ipm() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28277,7 +28277,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ipm() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28304,7 +28304,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ipm() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28312,7 +28312,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ipm() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -28339,7 +28339,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ipm() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28369,7 +28369,7 @@ void m68000_mcu_device::eori_w_imm16_pais_ipm() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28408,7 +28408,7 @@ void m68000_mcu_device::eori_w_imm16_das_ipm() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28433,7 +28433,7 @@ void m68000_mcu_device::eori_w_imm16_das_ipm() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28459,11 +28459,11 @@ void m68000_mcu_device::eori_w_imm16_das_ipm() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28489,7 +28489,7 @@ void m68000_mcu_device::eori_w_imm16_das_ipm() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28519,7 +28519,7 @@ void m68000_mcu_device::eori_w_imm16_das_ipm() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28558,7 +28558,7 @@ void m68000_mcu_device::eori_w_imm16_dais_ipm() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28581,14 +28581,14 @@ void m68000_mcu_device::eori_w_imm16_dais_ipm() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28596,7 +28596,7 @@ void m68000_mcu_device::eori_w_imm16_dais_ipm() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28623,7 +28623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28652,11 +28652,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -28682,7 +28682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28712,7 +28712,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28750,7 +28750,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ipm() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28778,7 +28778,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ipm() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -28804,7 +28804,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ipm() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -28831,7 +28831,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ipm() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28861,7 +28861,7 @@ void m68000_mcu_device::eori_w_imm16_adr16_ipm() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -28899,7 +28899,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28925,7 +28925,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -28952,7 +28952,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -28978,7 +28978,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -29005,7 +29005,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29035,7 +29035,7 @@ void m68000_mcu_device::eori_w_imm16_adr32_ipm() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29077,7 +29077,7 @@ void m68000_mcu_device::eori_i16u_sr_ipm() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29102,23 +29102,23 @@ void m68000_mcu_device::eori_i16u_sr_ipm() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -29126,7 +29126,7 @@ void m68000_mcu_device::eori_i16u_sr_ipm() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29153,11 +29153,11 @@ void m68000_mcu_device::eori_i16u_sr_ipm() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29197,7 +29197,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ipm() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29223,7 +29223,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ipm() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29249,12 +29249,12 @@ void m68000_mcu_device::eori_l_imm32_ds_ipm() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29277,7 +29277,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ipm() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -29286,7 +29286,7 @@ void m68000_mcu_device::eori_l_imm32_ds_ipm() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -29306,7 +29306,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29332,7 +29332,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29357,7 +29357,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29385,7 +29385,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29411,7 +29411,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29439,7 +29439,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29467,7 +29467,7 @@ void m68000_mcu_device::eori_l_imm32_ais_ipm() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29505,7 +29505,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29531,7 +29531,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29556,7 +29556,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29584,11 +29584,11 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29614,7 +29614,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29642,7 +29642,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29670,7 +29670,7 @@ void m68000_mcu_device::eori_l_imm32_aips_ipm() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29708,7 +29708,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29734,7 +29734,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29758,14 +29758,14 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29792,7 +29792,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -29818,7 +29818,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29846,7 +29846,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -29874,7 +29874,7 @@ void m68000_mcu_device::eori_l_imm32_pais_ipm() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -29912,7 +29912,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29938,7 +29938,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29963,7 +29963,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -29988,7 +29988,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30016,7 +30016,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30042,7 +30042,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30070,7 +30070,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30098,7 +30098,7 @@ void m68000_mcu_device::eori_l_imm32_das_ipm() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30136,7 +30136,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ipm() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30162,7 +30162,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ipm() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30185,14 +30185,14 @@ void m68000_mcu_device::eori_l_imm32_dais_ipm() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -30200,7 +30200,7 @@ void m68000_mcu_device::eori_l_imm32_dais_ipm() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30227,7 +30227,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30255,7 +30255,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30283,7 +30283,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30309,7 +30309,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30337,7 +30337,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30365,7 +30365,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30402,7 +30402,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30428,7 +30428,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30456,7 +30456,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30482,7 +30482,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -30510,7 +30510,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30536,7 +30536,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30564,7 +30564,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30592,7 +30592,7 @@ void m68000_mcu_device::eori_l_imm32_adr16_ipm() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30629,7 +30629,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30655,7 +30655,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30681,7 +30681,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -30708,7 +30708,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -30734,7 +30734,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30762,7 +30762,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -30788,7 +30788,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30816,7 +30816,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -30844,7 +30844,7 @@ void m68000_mcu_device::eori_l_imm32_adr32_ipm() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -30908,7 +30908,7 @@ void m68000_mcu_device::cmpi_b_imm8_ds_ipm() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -30979,7 +30979,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_ipm() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31004,7 +31004,7 @@ void m68000_mcu_device::cmpi_b_imm8_ais_ipm() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31080,7 +31080,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_ipm() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31103,7 +31103,7 @@ void m68000_mcu_device::cmpi_b_imm8_aips_ipm() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31181,7 +31181,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_ipm() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -31204,7 +31204,7 @@ void m68000_mcu_device::cmpi_b_imm8_pais_ipm() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31299,7 +31299,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_ipm() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31324,7 +31324,7 @@ void m68000_mcu_device::cmpi_b_imm8_das_ipm() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31392,7 +31392,7 @@ void m68000_mcu_device::cmpi_b_imm8_dais_ipm() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -31460,7 +31460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31485,7 +31485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31581,7 +31581,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_ipm() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31604,7 +31604,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr16_ipm() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31724,7 +31724,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_ipm() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -31747,7 +31747,7 @@ void m68000_mcu_device::cmpi_b_imm8_adr32_ipm() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31818,7 +31818,7 @@ void m68000_mcu_device::cmpi_w_imm16_ds_ipm() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -31889,7 +31889,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_ipm() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -31918,7 +31918,7 @@ void m68000_mcu_device::cmpi_w_imm16_ais_ipm() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -31994,7 +31994,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_ipm() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32021,7 +32021,7 @@ void m68000_mcu_device::cmpi_w_imm16_aips_ipm() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32099,7 +32099,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_ipm() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -32126,7 +32126,7 @@ void m68000_mcu_device::cmpi_w_imm16_pais_ipm() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32221,7 +32221,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_ipm() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32250,7 +32250,7 @@ void m68000_mcu_device::cmpi_w_imm16_das_ipm() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32318,7 +32318,7 @@ void m68000_mcu_device::cmpi_w_imm16_dais_ipm() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -32386,7 +32386,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -32415,7 +32415,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32511,7 +32511,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_ipm() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32538,7 +32538,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr16_ipm() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32658,7 +32658,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_ipm() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -32685,7 +32685,7 @@ void m68000_mcu_device::cmpi_w_imm16_adr32_ipm() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -32781,11 +32781,11 @@ void m68000_mcu_device::cmpi_l_imm32_ds_ipm() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32881,7 +32881,7 @@ void m68000_mcu_device::cmpi_l_imm32_ais_ipm() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32934,13 +32934,13 @@ void m68000_mcu_device::cmpi_l_imm32_ais_ipm() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33031,7 +33031,7 @@ void m68000_mcu_device::cmpi_l_imm32_aips_ipm() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -33087,13 +33087,13 @@ void m68000_mcu_device::cmpi_l_imm32_aips_ipm() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33183,7 +33183,7 @@ void m68000_mcu_device::cmpi_l_imm32_pais_ipm() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -33241,13 +33241,13 @@ void m68000_mcu_device::cmpi_l_imm32_pais_ipm() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33362,7 +33362,7 @@ void m68000_mcu_device::cmpi_l_imm32_das_ipm() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33415,13 +33415,13 @@ void m68000_mcu_device::cmpi_l_imm32_das_ipm() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33510,7 +33510,7 @@ void m68000_mcu_device::cmpi_l_imm32_dais_ipm() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -33577,7 +33577,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33630,13 +33630,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33753,7 +33753,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_ipm() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
@@ -33806,13 +33806,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr16_ipm() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33953,7 +33953,7 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_ipm() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34006,13 +34006,13 @@ void m68000_mcu_device::cmpi_l_imm32_adr32_ipm() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34057,7 +34057,7 @@ void m68000_mcu_device::move_b_ds_dd_ipm() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -34104,7 +34104,7 @@ void m68000_mcu_device::move_b_ais_dd_ipm() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34130,7 +34130,7 @@ void m68000_mcu_device::move_b_ais_dd_ipm() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34181,7 +34181,7 @@ void m68000_mcu_device::move_b_aips_dd_ipm() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34205,7 +34205,7 @@ void m68000_mcu_device::move_b_aips_dd_ipm() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34258,7 +34258,7 @@ void m68000_mcu_device::move_b_pais_dd_ipm() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -34282,7 +34282,7 @@ void m68000_mcu_device::move_b_pais_dd_ipm() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34352,7 +34352,7 @@ void m68000_mcu_device::move_b_das_dd_ipm() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34378,7 +34378,7 @@ void m68000_mcu_device::move_b_das_dd_ipm() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34421,7 +34421,7 @@ void m68000_mcu_device::move_b_dais_dd_ipm() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34489,7 +34489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34515,7 +34515,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34586,7 +34586,7 @@ void m68000_mcu_device::move_b_adr16_dd_ipm() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -34610,7 +34610,7 @@ void m68000_mcu_device::move_b_adr16_dd_ipm() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34705,7 +34705,7 @@ void m68000_mcu_device::move_b_adr32_dd_ipm() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34729,7 +34729,7 @@ void m68000_mcu_device::move_b_adr32_dd_ipm() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34798,7 +34798,7 @@ void m68000_mcu_device::move_b_dpc_dd_ipm() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34824,7 +34824,7 @@ void m68000_mcu_device::move_b_dpc_dd_ipm() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -34866,7 +34866,7 @@ void m68000_mcu_device::move_b_dpci_dd_ipm() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -34934,7 +34934,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -34960,7 +34960,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -35034,7 +35034,7 @@ void m68000_mcu_device::move_b_imm8_dd_ipm() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -35084,7 +35084,7 @@ void m68000_mcu_device::move_b_ds_aid_ipm() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35146,7 +35146,7 @@ void m68000_mcu_device::move_b_ais_aid_ipm() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35171,7 +35171,7 @@ void m68000_mcu_device::move_b_ais_aid_ipm() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35239,7 +35239,7 @@ void m68000_mcu_device::move_b_aips_aid_ipm() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35262,7 +35262,7 @@ void m68000_mcu_device::move_b_aips_aid_ipm() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35332,7 +35332,7 @@ void m68000_mcu_device::move_b_pais_aid_ipm() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -35355,7 +35355,7 @@ void m68000_mcu_device::move_b_pais_aid_ipm() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35442,7 +35442,7 @@ void m68000_mcu_device::move_b_das_aid_ipm() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35467,7 +35467,7 @@ void m68000_mcu_device::move_b_das_aid_ipm() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35527,7 +35527,7 @@ void m68000_mcu_device::move_b_dais_aid_ipm() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35595,7 +35595,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35620,7 +35620,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35708,7 +35708,7 @@ void m68000_mcu_device::move_b_adr16_aid_ipm() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -35731,7 +35731,7 @@ void m68000_mcu_device::move_b_adr16_aid_ipm() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35843,7 +35843,7 @@ void m68000_mcu_device::move_b_adr32_aid_ipm() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35866,7 +35866,7 @@ void m68000_mcu_device::move_b_adr32_aid_ipm() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -35952,7 +35952,7 @@ void m68000_mcu_device::move_b_dpc_aid_ipm() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -35977,7 +35977,7 @@ void m68000_mcu_device::move_b_dpc_aid_ipm() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36036,7 +36036,7 @@ void m68000_mcu_device::move_b_dpci_aid_ipm() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36104,7 +36104,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36129,7 +36129,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36220,7 +36220,7 @@ void m68000_mcu_device::move_b_imm8_aid_ipm() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36285,7 +36285,7 @@ void m68000_mcu_device::move_b_ds_aipd_ipm() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36346,7 +36346,7 @@ void m68000_mcu_device::move_b_ais_aipd_ipm() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36372,7 +36372,7 @@ void m68000_mcu_device::move_b_ais_aipd_ipm() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36439,7 +36439,7 @@ void m68000_mcu_device::move_b_aips_aipd_ipm() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36463,7 +36463,7 @@ void m68000_mcu_device::move_b_aips_aipd_ipm() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36532,7 +36532,7 @@ void m68000_mcu_device::move_b_pais_aipd_ipm() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -36556,7 +36556,7 @@ void m68000_mcu_device::move_b_pais_aipd_ipm() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36642,7 +36642,7 @@ void m68000_mcu_device::move_b_das_aipd_ipm() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36668,7 +36668,7 @@ void m68000_mcu_device::move_b_das_aipd_ipm() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36727,7 +36727,7 @@ void m68000_mcu_device::move_b_dais_aipd_ipm() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -36795,7 +36795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -36821,7 +36821,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -36908,7 +36908,7 @@ void m68000_mcu_device::move_b_adr16_aipd_ipm() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -36932,7 +36932,7 @@ void m68000_mcu_device::move_b_adr16_aipd_ipm() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37043,7 +37043,7 @@ void m68000_mcu_device::move_b_adr32_aipd_ipm() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37067,7 +37067,7 @@ void m68000_mcu_device::move_b_adr32_aipd_ipm() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37152,7 +37152,7 @@ void m68000_mcu_device::move_b_dpc_aipd_ipm() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37178,7 +37178,7 @@ void m68000_mcu_device::move_b_dpc_aipd_ipm() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37236,7 +37236,7 @@ void m68000_mcu_device::move_b_dpci_aipd_ipm() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37304,7 +37304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37330,7 +37330,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37420,7 +37420,7 @@ void m68000_mcu_device::move_b_imm8_aipd_ipm() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -37483,7 +37483,7 @@ void m68000_mcu_device::move_b_ds_paid_ipm() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37545,7 +37545,7 @@ void m68000_mcu_device::move_b_ais_paid_ipm() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37570,7 +37570,7 @@ void m68000_mcu_device::move_b_ais_paid_ipm() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37638,7 +37638,7 @@ void m68000_mcu_device::move_b_aips_paid_ipm() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37661,7 +37661,7 @@ void m68000_mcu_device::move_b_aips_paid_ipm() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37731,7 +37731,7 @@ void m68000_mcu_device::move_b_pais_paid_ipm() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -37754,7 +37754,7 @@ void m68000_mcu_device::move_b_pais_paid_ipm() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37841,7 +37841,7 @@ void m68000_mcu_device::move_b_das_paid_ipm() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -37866,7 +37866,7 @@ void m68000_mcu_device::move_b_das_paid_ipm() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37926,7 +37926,7 @@ void m68000_mcu_device::move_b_dais_paid_ipm() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37994,7 +37994,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38019,7 +38019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38107,7 +38107,7 @@ void m68000_mcu_device::move_b_adr16_paid_ipm() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -38130,7 +38130,7 @@ void m68000_mcu_device::move_b_adr16_paid_ipm() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38242,7 +38242,7 @@ void m68000_mcu_device::move_b_adr32_paid_ipm() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -38265,7 +38265,7 @@ void m68000_mcu_device::move_b_adr32_paid_ipm() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68000_mcu_device::move_b_dpc_paid_ipm() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38376,7 +38376,7 @@ void m68000_mcu_device::move_b_dpc_paid_ipm() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38435,7 +38435,7 @@ void m68000_mcu_device::move_b_dpci_paid_ipm() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -38503,7 +38503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38528,7 +38528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38618,7 +38618,7 @@ void m68000_mcu_device::move_b_imm8_paid_ipm() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38706,7 +38706,7 @@ void m68000_mcu_device::move_b_ds_dad_ipm() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -38769,7 +38769,7 @@ void m68000_mcu_device::move_b_ais_dad_ipm() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -38793,7 +38793,7 @@ void m68000_mcu_device::move_b_ais_dad_ipm() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68000_mcu_device::move_b_aips_dad_ipm() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -38913,7 +38913,7 @@ void m68000_mcu_device::move_b_aips_dad_ipm() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39013,7 +39013,7 @@ void m68000_mcu_device::move_b_pais_dad_ipm() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -39035,7 +39035,7 @@ void m68000_mcu_device::move_b_pais_dad_ipm() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39152,7 +39152,7 @@ void m68000_mcu_device::move_b_das_dad_ipm() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39176,7 +39176,7 @@ void m68000_mcu_device::move_b_das_dad_ipm() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39266,7 +39266,7 @@ void m68000_mcu_device::move_b_dais_dad_ipm() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39334,7 +39334,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39358,7 +39358,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39476,7 +39476,7 @@ void m68000_mcu_device::move_b_adr16_dad_ipm() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -39498,7 +39498,7 @@ void m68000_mcu_device::move_b_adr16_dad_ipm() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39640,7 +39640,7 @@ void m68000_mcu_device::move_b_adr32_dad_ipm() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -39662,7 +39662,7 @@ void m68000_mcu_device::move_b_adr32_dad_ipm() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39778,7 +39778,7 @@ void m68000_mcu_device::move_b_dpc_dad_ipm() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39802,7 +39802,7 @@ void m68000_mcu_device::move_b_dpc_dad_ipm() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39891,7 +39891,7 @@ void m68000_mcu_device::move_b_dpci_dad_ipm() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39959,7 +39959,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -39983,7 +39983,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40127,7 +40127,7 @@ void m68000_mcu_device::move_b_imm8_dad_ipm() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40188,7 +40188,7 @@ void m68000_mcu_device::move_b_ds_daid_ipm() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -40258,7 +40258,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40321,7 +40321,7 @@ void m68000_mcu_device::move_b_ais_daid_ipm() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40342,7 +40342,7 @@ void m68000_mcu_device::move_b_ais_daid_ipm() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40357,7 +40357,7 @@ void m68000_mcu_device::move_b_ais_daid_ipm() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40384,7 +40384,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40484,7 +40484,7 @@ void m68000_mcu_device::move_b_aips_daid_ipm() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40503,7 +40503,7 @@ void m68000_mcu_device::move_b_aips_daid_ipm() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40518,7 +40518,7 @@ void m68000_mcu_device::move_b_aips_daid_ipm() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40545,7 +40545,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40647,7 +40647,7 @@ void m68000_mcu_device::move_b_pais_daid_ipm() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -40666,7 +40666,7 @@ void m68000_mcu_device::move_b_pais_daid_ipm() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40681,7 +40681,7 @@ void m68000_mcu_device::move_b_pais_daid_ipm() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40708,7 +40708,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40827,7 +40827,7 @@ void m68000_mcu_device::move_b_das_daid_ipm() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40848,7 +40848,7 @@ void m68000_mcu_device::move_b_das_daid_ipm() // 11a8 f1f8
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -40863,7 +40863,7 @@ void m68000_mcu_device::move_b_das_daid_ipm() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40890,7 +40890,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40982,7 +40982,7 @@ void m68000_mcu_device::move_b_dais_daid_ipm() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41050,7 +41050,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41071,7 +41071,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41086,7 +41086,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41113,7 +41113,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41233,7 +41233,7 @@ void m68000_mcu_device::move_b_adr16_daid_ipm() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -41252,7 +41252,7 @@ void m68000_mcu_device::move_b_adr16_daid_ipm() // 11b8 f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41267,7 +41267,7 @@ void m68000_mcu_device::move_b_adr16_daid_ipm() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41294,7 +41294,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41438,7 +41438,7 @@ void m68000_mcu_device::move_b_adr32_daid_ipm() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41457,7 +41457,7 @@ void m68000_mcu_device::move_b_adr32_daid_ipm() // 11b9 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41472,7 +41472,7 @@ void m68000_mcu_device::move_b_adr32_daid_ipm() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41499,7 +41499,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41617,7 +41617,7 @@ void m68000_mcu_device::move_b_dpc_daid_ipm() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41638,7 +41638,7 @@ void m68000_mcu_device::move_b_dpc_daid_ipm() // 11ba f1ff
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41653,7 +41653,7 @@ void m68000_mcu_device::move_b_dpc_daid_ipm() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41680,7 +41680,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41771,7 +41771,7 @@ void m68000_mcu_device::move_b_dpci_daid_ipm() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41839,7 +41839,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41860,7 +41860,7 @@ adsw2:
[[fallthrough]]; case 4:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -41875,7 +41875,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -41902,7 +41902,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42020,7 +42020,7 @@ void m68000_mcu_device::move_b_imm8_daid_ipm() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -42090,7 +42090,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42154,7 +42154,7 @@ void m68000_mcu_device::move_b_ds_adr16_ipm() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42245,7 +42245,7 @@ void m68000_mcu_device::move_b_ais_adr16_ipm() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42269,7 +42269,7 @@ void m68000_mcu_device::move_b_ais_adr16_ipm() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42366,7 +42366,7 @@ void m68000_mcu_device::move_b_aips_adr16_ipm() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42388,7 +42388,7 @@ void m68000_mcu_device::move_b_aips_adr16_ipm() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42487,7 +42487,7 @@ void m68000_mcu_device::move_b_pais_adr16_ipm() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -42509,7 +42509,7 @@ void m68000_mcu_device::move_b_pais_adr16_ipm() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42625,7 +42625,7 @@ void m68000_mcu_device::move_b_das_adr16_ipm() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42649,7 +42649,7 @@ void m68000_mcu_device::move_b_das_adr16_ipm() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42738,7 +42738,7 @@ void m68000_mcu_device::move_b_dais_adr16_ipm() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42806,7 +42806,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42830,7 +42830,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42947,7 +42947,7 @@ void m68000_mcu_device::move_b_adr16_adr16_ipm() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -42969,7 +42969,7 @@ void m68000_mcu_device::move_b_adr16_adr16_ipm() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43110,7 +43110,7 @@ void m68000_mcu_device::move_b_adr32_adr16_ipm() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -43132,7 +43132,7 @@ void m68000_mcu_device::move_b_adr32_adr16_ipm() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43247,7 +43247,7 @@ void m68000_mcu_device::move_b_dpc_adr16_ipm() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43271,7 +43271,7 @@ void m68000_mcu_device::move_b_dpc_adr16_ipm() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43359,7 +43359,7 @@ void m68000_mcu_device::move_b_dpci_adr16_ipm() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43427,7 +43427,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43451,7 +43451,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43570,7 +43570,7 @@ void m68000_mcu_device::move_b_imm8_adr16_ipm() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43687,7 +43687,7 @@ void m68000_mcu_device::move_b_ds_adr32_ipm() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43778,7 +43778,7 @@ void m68000_mcu_device::move_b_ais_adr32_ipm() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43802,7 +43802,7 @@ void m68000_mcu_device::move_b_ais_adr32_ipm() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43922,7 +43922,7 @@ void m68000_mcu_device::move_b_aips_adr32_ipm() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -43944,7 +43944,7 @@ void m68000_mcu_device::move_b_aips_adr32_ipm() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44066,7 +44066,7 @@ void m68000_mcu_device::move_b_pais_adr32_ipm() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -44088,7 +44088,7 @@ void m68000_mcu_device::move_b_pais_adr32_ipm() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44227,7 +44227,7 @@ void m68000_mcu_device::move_b_das_adr32_ipm() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44251,7 +44251,7 @@ void m68000_mcu_device::move_b_das_adr32_ipm() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44363,7 +44363,7 @@ void m68000_mcu_device::move_b_dais_adr32_ipm() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44431,7 +44431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44455,7 +44455,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44595,7 +44595,7 @@ void m68000_mcu_device::move_b_adr16_adr32_ipm() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -44617,7 +44617,7 @@ void m68000_mcu_device::move_b_adr16_adr32_ipm() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44781,7 +44781,7 @@ void m68000_mcu_device::move_b_adr32_adr32_ipm() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -44803,7 +44803,7 @@ void m68000_mcu_device::move_b_adr32_adr32_ipm() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44941,7 +44941,7 @@ void m68000_mcu_device::move_b_dpc_adr32_ipm() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44965,7 +44965,7 @@ void m68000_mcu_device::move_b_dpc_adr32_ipm() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45076,7 +45076,7 @@ void m68000_mcu_device::move_b_dpci_adr32_ipm() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45144,7 +45144,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45168,7 +45168,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45334,7 +45334,7 @@ void m68000_mcu_device::move_b_imm8_adr32_ipm() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45429,13 +45429,13 @@ void m68000_mcu_device::move_l_ds_dd_ipm() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -45481,14 +45481,14 @@ void m68000_mcu_device::move_l_as_dd_ipm() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45530,7 +45530,7 @@ void m68000_mcu_device::move_l_ais_dd_ipm() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45584,14 +45584,14 @@ void m68000_mcu_device::move_l_ais_dd_ipm() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45633,7 +45633,7 @@ void m68000_mcu_device::move_l_aips_dd_ipm() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45690,14 +45690,14 @@ void m68000_mcu_device::move_l_aips_dd_ipm() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45738,7 +45738,7 @@ void m68000_mcu_device::move_l_pais_dd_ipm() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -45797,14 +45797,14 @@ void m68000_mcu_device::move_l_pais_dd_ipm() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45870,7 +45870,7 @@ void m68000_mcu_device::move_l_das_dd_ipm() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -45924,14 +45924,14 @@ void m68000_mcu_device::move_l_das_dd_ipm() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45971,7 +45971,7 @@ void m68000_mcu_device::move_l_dais_dd_ipm() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46038,7 +46038,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46092,14 +46092,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46167,7 +46167,7 @@ void m68000_mcu_device::move_l_adr16_dd_ipm() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -46221,14 +46221,14 @@ void m68000_mcu_device::move_l_adr16_dd_ipm() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46320,7 +46320,7 @@ void m68000_mcu_device::move_l_adr32_dd_ipm() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46374,14 +46374,14 @@ void m68000_mcu_device::move_l_adr32_dd_ipm() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46446,7 +46446,7 @@ void m68000_mcu_device::move_l_dpc_dd_ipm() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46500,14 +46500,14 @@ void m68000_mcu_device::move_l_dpc_dd_ipm() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46546,7 +46546,7 @@ void m68000_mcu_device::move_l_dpci_dd_ipm() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -46613,7 +46613,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -46667,14 +46667,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46769,14 +46769,14 @@ void m68000_mcu_device::move_l_imm32_dd_ipm() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46821,13 +46821,13 @@ void m68000_mcu_device::movea_l_ds_ad_ipm() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -46871,12 +46871,12 @@ void m68000_mcu_device::movea_l_as_ad_ipm() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46918,7 +46918,7 @@ void m68000_mcu_device::movea_l_ais_ad_ipm() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46972,13 +46972,13 @@ void m68000_mcu_device::movea_l_ais_ad_ipm() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47019,7 +47019,7 @@ void m68000_mcu_device::movea_l_aips_ad_ipm() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47076,13 +47076,13 @@ void m68000_mcu_device::movea_l_aips_ad_ipm() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47122,7 +47122,7 @@ void m68000_mcu_device::movea_l_pais_ad_ipm() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -47181,13 +47181,13 @@ void m68000_mcu_device::movea_l_pais_ad_ipm() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -47252,7 +47252,7 @@ void m68000_mcu_device::movea_l_das_ad_ipm() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47306,13 +47306,13 @@ void m68000_mcu_device::movea_l_das_ad_ipm() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47351,7 +47351,7 @@ void m68000_mcu_device::movea_l_dais_ad_ipm() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47418,7 +47418,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47472,13 +47472,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47545,7 +47545,7 @@ void m68000_mcu_device::movea_l_adr16_ad_ipm() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -47599,13 +47599,13 @@ void m68000_mcu_device::movea_l_adr16_ad_ipm() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47696,7 +47696,7 @@ void m68000_mcu_device::movea_l_adr32_ad_ipm() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -47750,13 +47750,13 @@ void m68000_mcu_device::movea_l_adr32_ad_ipm() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -47820,7 +47820,7 @@ void m68000_mcu_device::movea_l_dpc_ad_ipm() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -47874,13 +47874,13 @@ void m68000_mcu_device::movea_l_dpc_ad_ipm() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -47918,7 +47918,7 @@ void m68000_mcu_device::movea_l_dpci_ad_ipm() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -47985,7 +47985,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -48039,13 +48039,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -48139,13 +48139,13 @@ void m68000_mcu_device::movea_l_imm32_ad_ipm() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -48213,7 +48213,7 @@ void m68000_mcu_device::move_l_ds_aid_ipm() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48241,7 +48241,7 @@ void m68000_mcu_device::move_l_ds_aid_ipm() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48310,7 +48310,7 @@ void m68000_mcu_device::move_l_as_aid_ipm() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48338,7 +48338,7 @@ void m68000_mcu_device::move_l_as_aid_ipm() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48380,7 +48380,7 @@ void m68000_mcu_device::move_l_ais_aid_ipm() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48433,7 +48433,7 @@ void m68000_mcu_device::move_l_ais_aid_ipm() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48460,7 +48460,7 @@ void m68000_mcu_device::move_l_ais_aid_ipm() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48528,7 +48528,7 @@ void m68000_mcu_device::move_l_aips_aid_ipm() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -48584,7 +48584,7 @@ void m68000_mcu_device::move_l_aips_aid_ipm() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48611,7 +48611,7 @@ void m68000_mcu_device::move_l_aips_aid_ipm() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48678,7 +48678,7 @@ void m68000_mcu_device::move_l_pais_aid_ipm() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -48736,7 +48736,7 @@ void m68000_mcu_device::move_l_pais_aid_ipm() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48763,7 +48763,7 @@ void m68000_mcu_device::move_l_pais_aid_ipm() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -48855,7 +48855,7 @@ void m68000_mcu_device::move_l_das_aid_ipm() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -48908,7 +48908,7 @@ void m68000_mcu_device::move_l_das_aid_ipm() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48935,7 +48935,7 @@ void m68000_mcu_device::move_l_das_aid_ipm() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49001,7 +49001,7 @@ void m68000_mcu_device::move_l_dais_aid_ipm() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49068,7 +49068,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49121,7 +49121,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49148,7 +49148,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49242,7 +49242,7 @@ void m68000_mcu_device::move_l_adr16_aid_ipm() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -49295,7 +49295,7 @@ void m68000_mcu_device::move_l_adr16_aid_ipm() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49322,7 +49322,7 @@ void m68000_mcu_device::move_l_adr16_aid_ipm() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49440,7 +49440,7 @@ void m68000_mcu_device::move_l_adr32_aid_ipm() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49493,7 +49493,7 @@ void m68000_mcu_device::move_l_adr32_aid_ipm() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49520,7 +49520,7 @@ void m68000_mcu_device::move_l_adr32_aid_ipm() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49611,7 +49611,7 @@ void m68000_mcu_device::move_l_dpc_aid_ipm() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49664,7 +49664,7 @@ void m68000_mcu_device::move_l_dpc_aid_ipm() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49691,7 +49691,7 @@ void m68000_mcu_device::move_l_dpc_aid_ipm() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -49756,7 +49756,7 @@ void m68000_mcu_device::move_l_dpci_aid_ipm() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -49823,7 +49823,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -49876,7 +49876,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49903,7 +49903,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50048,7 +50048,7 @@ void m68000_mcu_device::move_l_imm32_aid_ipm() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50076,7 +50076,7 @@ void m68000_mcu_device::move_l_imm32_aid_ipm() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68000_mcu_device::move_l_ds_aipd_ipm() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50173,7 +50173,7 @@ void m68000_mcu_device::move_l_ds_aipd_ipm() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50242,7 +50242,7 @@ void m68000_mcu_device::move_l_as_aipd_ipm() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50270,7 +50270,7 @@ void m68000_mcu_device::move_l_as_aipd_ipm() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50312,7 +50312,7 @@ void m68000_mcu_device::move_l_ais_aipd_ipm() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50365,7 +50365,7 @@ void m68000_mcu_device::move_l_ais_aipd_ipm() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50392,7 +50392,7 @@ void m68000_mcu_device::move_l_ais_aipd_ipm() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50459,7 +50459,7 @@ void m68000_mcu_device::move_l_aips_aipd_ipm() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50515,7 +50515,7 @@ void m68000_mcu_device::move_l_aips_aipd_ipm() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50542,7 +50542,7 @@ void m68000_mcu_device::move_l_aips_aipd_ipm() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50608,7 +50608,7 @@ void m68000_mcu_device::move_l_pais_aipd_ipm() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -50666,7 +50666,7 @@ void m68000_mcu_device::move_l_pais_aipd_ipm() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50693,7 +50693,7 @@ void m68000_mcu_device::move_l_pais_aipd_ipm() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50784,7 +50784,7 @@ void m68000_mcu_device::move_l_das_aipd_ipm() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -50837,7 +50837,7 @@ void m68000_mcu_device::move_l_das_aipd_ipm() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50864,7 +50864,7 @@ void m68000_mcu_device::move_l_das_aipd_ipm() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -50929,7 +50929,7 @@ void m68000_mcu_device::move_l_dais_aipd_ipm() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -50996,7 +50996,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51049,7 +51049,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51076,7 +51076,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51169,7 +51169,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ipm() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -51222,7 +51222,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ipm() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51249,7 +51249,7 @@ void m68000_mcu_device::move_l_adr16_aipd_ipm() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51366,7 +51366,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ipm() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51419,7 +51419,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ipm() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51446,7 +51446,7 @@ void m68000_mcu_device::move_l_adr32_aipd_ipm() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51536,7 +51536,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ipm() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51589,7 +51589,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ipm() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51616,7 +51616,7 @@ void m68000_mcu_device::move_l_dpc_aipd_ipm() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51680,7 +51680,7 @@ void m68000_mcu_device::move_l_dpci_aipd_ipm() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51747,7 +51747,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -51800,7 +51800,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51827,7 +51827,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -51971,7 +51971,7 @@ void m68000_mcu_device::move_l_imm32_aipd_ipm() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -51999,7 +51999,7 @@ void m68000_mcu_device::move_l_imm32_aipd_ipm() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52043,7 +52043,7 @@ void m68000_mcu_device::move_l_ds_paid_ipm() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52071,7 +52071,7 @@ void m68000_mcu_device::move_l_ds_paid_ipm() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52139,7 +52139,7 @@ void m68000_mcu_device::move_l_as_paid_ipm() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52167,7 +52167,7 @@ void m68000_mcu_device::move_l_as_paid_ipm() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52233,7 +52233,7 @@ void m68000_mcu_device::move_l_ais_paid_ipm() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52286,7 +52286,7 @@ void m68000_mcu_device::move_l_ais_paid_ipm() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52314,7 +52314,7 @@ void m68000_mcu_device::move_l_ais_paid_ipm() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52380,7 +52380,7 @@ void m68000_mcu_device::move_l_aips_paid_ipm() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52436,7 +52436,7 @@ void m68000_mcu_device::move_l_aips_paid_ipm() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52464,7 +52464,7 @@ void m68000_mcu_device::move_l_aips_paid_ipm() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52529,7 +52529,7 @@ void m68000_mcu_device::move_l_pais_paid_ipm() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -52587,7 +52587,7 @@ void m68000_mcu_device::move_l_pais_paid_ipm() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52615,7 +52615,7 @@ void m68000_mcu_device::move_l_pais_paid_ipm() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52705,7 +52705,7 @@ void m68000_mcu_device::move_l_das_paid_ipm() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52758,7 +52758,7 @@ void m68000_mcu_device::move_l_das_paid_ipm() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52786,7 +52786,7 @@ void m68000_mcu_device::move_l_das_paid_ipm() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -52850,7 +52850,7 @@ void m68000_mcu_device::move_l_dais_paid_ipm() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52917,7 +52917,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -52970,7 +52970,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52998,7 +52998,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53090,7 +53090,7 @@ void m68000_mcu_device::move_l_adr16_paid_ipm() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -53143,7 +53143,7 @@ void m68000_mcu_device::move_l_adr16_paid_ipm() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53171,7 +53171,7 @@ void m68000_mcu_device::move_l_adr16_paid_ipm() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53287,7 +53287,7 @@ void m68000_mcu_device::move_l_adr32_paid_ipm() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53340,7 +53340,7 @@ void m68000_mcu_device::move_l_adr32_paid_ipm() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53368,7 +53368,7 @@ void m68000_mcu_device::move_l_adr32_paid_ipm() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53457,7 +53457,7 @@ void m68000_mcu_device::move_l_dpc_paid_ipm() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53510,7 +53510,7 @@ void m68000_mcu_device::move_l_dpc_paid_ipm() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53538,7 +53538,7 @@ void m68000_mcu_device::move_l_dpc_paid_ipm() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53601,7 +53601,7 @@ void m68000_mcu_device::move_l_dpci_paid_ipm() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53668,7 +53668,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -53721,7 +53721,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53749,7 +53749,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53867,7 +53867,7 @@ void m68000_mcu_device::move_l_imm32_paid_ipm() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53895,7 +53895,7 @@ void m68000_mcu_device::move_l_imm32_paid_ipm() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -53987,7 +53987,7 @@ void m68000_mcu_device::move_l_ds_dad_ipm() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54014,7 +54014,7 @@ void m68000_mcu_device::move_l_ds_dad_ipm() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54042,7 +54042,7 @@ void m68000_mcu_device::move_l_ds_dad_ipm() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54110,7 +54110,7 @@ void m68000_mcu_device::move_l_as_dad_ipm() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54137,7 +54137,7 @@ void m68000_mcu_device::move_l_as_dad_ipm() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54165,7 +54165,7 @@ void m68000_mcu_device::move_l_as_dad_ipm() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54207,7 +54207,7 @@ void m68000_mcu_device::move_l_ais_dad_ipm() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54259,7 +54259,7 @@ void m68000_mcu_device::move_l_ais_dad_ipm() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54287,7 +54287,7 @@ void m68000_mcu_device::move_l_ais_dad_ipm() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54384,7 +54384,7 @@ void m68000_mcu_device::move_l_aips_dad_ipm() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -54439,7 +54439,7 @@ void m68000_mcu_device::move_l_aips_dad_ipm() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54467,7 +54467,7 @@ void m68000_mcu_device::move_l_aips_dad_ipm() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54563,7 +54563,7 @@ void m68000_mcu_device::move_l_pais_dad_ipm() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -54620,7 +54620,7 @@ void m68000_mcu_device::move_l_pais_dad_ipm() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54648,7 +54648,7 @@ void m68000_mcu_device::move_l_pais_dad_ipm() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54769,7 +54769,7 @@ void m68000_mcu_device::move_l_das_dad_ipm() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -54821,7 +54821,7 @@ void m68000_mcu_device::move_l_das_dad_ipm() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54849,7 +54849,7 @@ void m68000_mcu_device::move_l_das_dad_ipm() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54944,7 +54944,7 @@ void m68000_mcu_device::move_l_dais_dad_ipm() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55011,7 +55011,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55063,7 +55063,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55091,7 +55091,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55214,7 +55214,7 @@ void m68000_mcu_device::move_l_adr16_dad_ipm() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -55266,7 +55266,7 @@ void m68000_mcu_device::move_l_adr16_dad_ipm() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55294,7 +55294,7 @@ void m68000_mcu_device::move_l_adr16_dad_ipm() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55441,7 +55441,7 @@ void m68000_mcu_device::move_l_adr32_dad_ipm() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55493,7 +55493,7 @@ void m68000_mcu_device::move_l_adr32_dad_ipm() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55521,7 +55521,7 @@ void m68000_mcu_device::move_l_adr32_dad_ipm() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55641,7 +55641,7 @@ void m68000_mcu_device::move_l_dpc_dad_ipm() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55693,7 +55693,7 @@ void m68000_mcu_device::move_l_dpc_dad_ipm() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55721,7 +55721,7 @@ void m68000_mcu_device::move_l_dpc_dad_ipm() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55815,7 +55815,7 @@ void m68000_mcu_device::move_l_dpci_dad_ipm() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55882,7 +55882,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -55934,7 +55934,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55962,7 +55962,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56135,7 +56135,7 @@ void m68000_mcu_device::move_l_imm32_dad_ipm() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56162,7 +56162,7 @@ void m68000_mcu_device::move_l_imm32_dad_ipm() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56190,7 +56190,7 @@ void m68000_mcu_device::move_l_imm32_dad_ipm() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56230,7 +56230,7 @@ void m68000_mcu_device::move_l_ds_daid_ipm() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56300,7 +56300,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56327,7 +56327,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56355,7 +56355,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56395,7 +56395,7 @@ void m68000_mcu_device::move_l_as_daid_ipm() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -56465,7 +56465,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56492,7 +56492,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56520,7 +56520,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56562,7 +56562,7 @@ void m68000_mcu_device::move_l_ais_daid_ipm() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56611,7 +56611,7 @@ void m68000_mcu_device::move_l_ais_daid_ipm() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56626,7 +56626,7 @@ void m68000_mcu_device::move_l_ais_daid_ipm() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56653,7 +56653,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56683,7 +56683,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56780,7 +56780,7 @@ void m68000_mcu_device::move_l_aips_daid_ipm() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -56832,7 +56832,7 @@ void m68000_mcu_device::move_l_aips_daid_ipm() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -56847,7 +56847,7 @@ void m68000_mcu_device::move_l_aips_daid_ipm() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56874,7 +56874,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56904,7 +56904,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57000,7 +57000,7 @@ void m68000_mcu_device::move_l_pais_daid_ipm() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57054,7 +57054,7 @@ void m68000_mcu_device::move_l_pais_daid_ipm() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57069,7 +57069,7 @@ void m68000_mcu_device::move_l_pais_daid_ipm() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57096,7 +57096,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57126,7 +57126,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57247,7 +57247,7 @@ void m68000_mcu_device::move_l_das_daid_ipm() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57296,7 +57296,7 @@ void m68000_mcu_device::move_l_das_daid_ipm() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57311,7 +57311,7 @@ void m68000_mcu_device::move_l_das_daid_ipm() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57338,7 +57338,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57368,7 +57368,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57463,7 +57463,7 @@ void m68000_mcu_device::move_l_dais_daid_ipm() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57530,7 +57530,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57579,7 +57579,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57594,7 +57594,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57621,7 +57621,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57651,7 +57651,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57774,7 +57774,7 @@ void m68000_mcu_device::move_l_adr16_daid_ipm() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -57823,7 +57823,7 @@ void m68000_mcu_device::move_l_adr16_daid_ipm() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -57838,7 +57838,7 @@ void m68000_mcu_device::move_l_adr16_daid_ipm() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57865,7 +57865,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57895,7 +57895,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58042,7 +58042,7 @@ void m68000_mcu_device::move_l_adr32_daid_ipm() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -58091,7 +58091,7 @@ void m68000_mcu_device::move_l_adr32_daid_ipm() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58106,7 +58106,7 @@ void m68000_mcu_device::move_l_adr32_daid_ipm() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58133,7 +58133,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58163,7 +58163,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58283,7 +58283,7 @@ void m68000_mcu_device::move_l_dpc_daid_ipm() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58332,7 +58332,7 @@ void m68000_mcu_device::move_l_dpc_daid_ipm() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58347,7 +58347,7 @@ void m68000_mcu_device::move_l_dpc_daid_ipm() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58374,7 +58374,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58404,7 +58404,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58498,7 +58498,7 @@ void m68000_mcu_device::move_l_dpci_daid_ipm() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58565,7 +58565,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -58614,7 +58614,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -58629,7 +58629,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58656,7 +58656,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58686,7 +58686,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58831,7 +58831,7 @@ void m68000_mcu_device::move_l_imm32_daid_ipm() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -58901,7 +58901,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58928,7 +58928,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58956,7 +58956,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58999,7 +58999,7 @@ void m68000_mcu_device::move_l_ds_adr16_ipm() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59027,7 +59027,7 @@ void m68000_mcu_device::move_l_ds_adr16_ipm() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59125,7 +59125,7 @@ void m68000_mcu_device::move_l_as_adr16_ipm() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59153,7 +59153,7 @@ void m68000_mcu_device::move_l_as_adr16_ipm() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59249,7 +59249,7 @@ void m68000_mcu_device::move_l_ais_adr16_ipm() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59301,7 +59301,7 @@ void m68000_mcu_device::move_l_ais_adr16_ipm() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59329,7 +59329,7 @@ void m68000_mcu_device::move_l_ais_adr16_ipm() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59425,7 +59425,7 @@ void m68000_mcu_device::move_l_aips_adr16_ipm() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59480,7 +59480,7 @@ void m68000_mcu_device::move_l_aips_adr16_ipm() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59508,7 +59508,7 @@ void m68000_mcu_device::move_l_aips_adr16_ipm() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59603,7 +59603,7 @@ void m68000_mcu_device::move_l_pais_adr16_ipm() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59660,7 +59660,7 @@ void m68000_mcu_device::move_l_pais_adr16_ipm() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59688,7 +59688,7 @@ void m68000_mcu_device::move_l_pais_adr16_ipm() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59808,7 +59808,7 @@ void m68000_mcu_device::move_l_das_adr16_ipm() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -59860,7 +59860,7 @@ void m68000_mcu_device::move_l_das_adr16_ipm() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59888,7 +59888,7 @@ void m68000_mcu_device::move_l_das_adr16_ipm() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59982,7 +59982,7 @@ void m68000_mcu_device::move_l_dais_adr16_ipm() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60049,7 +60049,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60101,7 +60101,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60129,7 +60129,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60251,7 +60251,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ipm() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -60303,7 +60303,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ipm() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60331,7 +60331,7 @@ void m68000_mcu_device::move_l_adr16_adr16_ipm() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60477,7 +60477,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ipm() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60529,7 +60529,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ipm() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60557,7 +60557,7 @@ void m68000_mcu_device::move_l_adr32_adr16_ipm() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60676,7 +60676,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ipm() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60728,7 +60728,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ipm() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60756,7 +60756,7 @@ void m68000_mcu_device::move_l_dpc_adr16_ipm() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60849,7 +60849,7 @@ void m68000_mcu_device::move_l_dpci_adr16_ipm() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60916,7 +60916,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -60968,7 +60968,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60996,7 +60996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61144,7 +61144,7 @@ void m68000_mcu_device::move_l_imm32_adr16_ipm() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61172,7 +61172,7 @@ void m68000_mcu_device::move_l_imm32_adr16_ipm() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61294,7 +61294,7 @@ void m68000_mcu_device::move_l_ds_adr32_ipm() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61322,7 +61322,7 @@ void m68000_mcu_device::move_l_ds_adr32_ipm() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61444,7 +61444,7 @@ void m68000_mcu_device::move_l_as_adr32_ipm() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61472,7 +61472,7 @@ void m68000_mcu_device::move_l_as_adr32_ipm() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61568,7 +61568,7 @@ void m68000_mcu_device::move_l_ais_adr32_ipm() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61621,7 +61621,7 @@ void m68000_mcu_device::move_l_ais_adr32_ipm() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61647,7 +61647,7 @@ void m68000_mcu_device::move_l_ais_adr32_ipm() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61674,7 +61674,7 @@ void m68000_mcu_device::move_l_ais_adr32_ipm() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61769,7 +61769,7 @@ void m68000_mcu_device::move_l_aips_adr32_ipm() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61825,7 +61825,7 @@ void m68000_mcu_device::move_l_aips_adr32_ipm() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -61851,7 +61851,7 @@ void m68000_mcu_device::move_l_aips_adr32_ipm() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61878,7 +61878,7 @@ void m68000_mcu_device::move_l_aips_adr32_ipm() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61972,7 +61972,7 @@ void m68000_mcu_device::move_l_pais_adr32_ipm() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62030,7 +62030,7 @@ void m68000_mcu_device::move_l_pais_adr32_ipm() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62056,7 +62056,7 @@ void m68000_mcu_device::move_l_pais_adr32_ipm() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62083,7 +62083,7 @@ void m68000_mcu_device::move_l_pais_adr32_ipm() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62202,7 +62202,7 @@ void m68000_mcu_device::move_l_das_adr32_ipm() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62255,7 +62255,7 @@ void m68000_mcu_device::move_l_das_adr32_ipm() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62281,7 +62281,7 @@ void m68000_mcu_device::move_l_das_adr32_ipm() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62308,7 +62308,7 @@ void m68000_mcu_device::move_l_das_adr32_ipm() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62401,7 +62401,7 @@ void m68000_mcu_device::move_l_dais_adr32_ipm() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62468,7 +62468,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62521,7 +62521,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62547,7 +62547,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62574,7 +62574,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62695,7 +62695,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ipm() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -62748,7 +62748,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ipm() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -62774,7 +62774,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ipm() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62801,7 +62801,7 @@ void m68000_mcu_device::move_l_adr16_adr32_ipm() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62946,7 +62946,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ipm() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -62999,7 +62999,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ipm() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -63025,7 +63025,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ipm() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63052,7 +63052,7 @@ void m68000_mcu_device::move_l_adr32_adr32_ipm() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63170,7 +63170,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ipm() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63223,7 +63223,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ipm() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63249,7 +63249,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ipm() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63276,7 +63276,7 @@ void m68000_mcu_device::move_l_dpc_adr32_ipm() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63368,7 +63368,7 @@ void m68000_mcu_device::move_l_dpci_adr32_ipm() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63435,7 +63435,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -63488,7 +63488,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -63514,7 +63514,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63541,7 +63541,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63712,7 +63712,7 @@ void m68000_mcu_device::move_l_imm32_adr32_ipm() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63740,7 +63740,7 @@ void m68000_mcu_device::move_l_imm32_adr32_ipm() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63840,7 +63840,7 @@ void m68000_mcu_device::move_w_ds_dd_ipm() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63890,7 +63890,7 @@ void m68000_mcu_device::move_w_as_dd_ipm() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -63937,7 +63937,7 @@ void m68000_mcu_device::move_w_ais_dd_ipm() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -63967,7 +63967,7 @@ void m68000_mcu_device::move_w_ais_dd_ipm() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64018,7 +64018,7 @@ void m68000_mcu_device::move_w_aips_dd_ipm() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64046,7 +64046,7 @@ void m68000_mcu_device::move_w_aips_dd_ipm() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64099,7 +64099,7 @@ void m68000_mcu_device::move_w_pais_dd_ipm() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -64127,7 +64127,7 @@ void m68000_mcu_device::move_w_pais_dd_ipm() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64197,7 +64197,7 @@ void m68000_mcu_device::move_w_das_dd_ipm() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64227,7 +64227,7 @@ void m68000_mcu_device::move_w_das_dd_ipm() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64270,7 +64270,7 @@ void m68000_mcu_device::move_w_dais_dd_ipm() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64338,7 +64338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64368,7 +64368,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64439,7 +64439,7 @@ void m68000_mcu_device::move_w_adr16_dd_ipm() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -64467,7 +64467,7 @@ void m68000_mcu_device::move_w_adr16_dd_ipm() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64562,7 +64562,7 @@ void m68000_mcu_device::move_w_adr32_dd_ipm() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64590,7 +64590,7 @@ void m68000_mcu_device::move_w_adr32_dd_ipm() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64659,7 +64659,7 @@ void m68000_mcu_device::move_w_dpc_dd_ipm() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64689,7 +64689,7 @@ void m68000_mcu_device::move_w_dpc_dd_ipm() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64731,7 +64731,7 @@ void m68000_mcu_device::move_w_dpci_dd_ipm() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -64799,7 +64799,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -64829,7 +64829,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -64903,7 +64903,7 @@ void m68000_mcu_device::move_w_imm16_dd_ipm() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -64957,7 +64957,7 @@ void m68000_mcu_device::movea_w_ds_ad_ipm() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -65004,7 +65004,7 @@ void m68000_mcu_device::movea_w_as_ad_ipm() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65046,7 +65046,7 @@ void m68000_mcu_device::movea_w_ais_ad_ipm() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65124,7 +65124,7 @@ void m68000_mcu_device::movea_w_aips_ad_ipm() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65202,7 +65202,7 @@ void m68000_mcu_device::movea_w_pais_ad_ipm() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65297,7 +65297,7 @@ void m68000_mcu_device::movea_w_das_ad_ipm() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65367,7 +65367,7 @@ void m68000_mcu_device::movea_w_dais_ad_ipm() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65435,7 +65435,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65533,7 +65533,7 @@ void m68000_mcu_device::movea_w_adr16_ad_ipm() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -65653,7 +65653,7 @@ void m68000_mcu_device::movea_w_adr32_ad_ipm() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -65747,7 +65747,7 @@ void m68000_mcu_device::movea_w_dpc_ad_ipm() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65816,7 +65816,7 @@ void m68000_mcu_device::movea_w_dpci_ad_ipm() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -65884,7 +65884,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -65989,7 +65989,7 @@ void m68000_mcu_device::movea_w_imm16_ad_ipm() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -66033,7 +66033,7 @@ void m68000_mcu_device::move_w_ds_aid_ipm() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66104,7 +66104,7 @@ void m68000_mcu_device::move_w_as_aid_ipm() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66172,7 +66172,7 @@ void m68000_mcu_device::move_w_ais_aid_ipm() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66201,7 +66201,7 @@ void m68000_mcu_device::move_w_ais_aid_ipm() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68000_mcu_device::move_w_aips_aid_ipm() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66302,7 +66302,7 @@ void m68000_mcu_device::move_w_aips_aid_ipm() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66378,7 +66378,7 @@ void m68000_mcu_device::move_w_pais_aid_ipm() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66405,7 +66405,7 @@ void m68000_mcu_device::move_w_pais_aid_ipm() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66498,7 +66498,7 @@ void m68000_mcu_device::move_w_das_aid_ipm() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66527,7 +66527,7 @@ void m68000_mcu_device::move_w_das_aid_ipm() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66593,7 +66593,7 @@ void m68000_mcu_device::move_w_dais_aid_ipm() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -66661,7 +66661,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -66690,7 +66690,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66784,7 +66784,7 @@ void m68000_mcu_device::move_w_adr16_aid_ipm() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -66811,7 +66811,7 @@ void m68000_mcu_device::move_w_adr16_aid_ipm() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66929,7 +66929,7 @@ void m68000_mcu_device::move_w_adr32_aid_ipm() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66956,7 +66956,7 @@ void m68000_mcu_device::move_w_adr32_aid_ipm() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67048,7 +67048,7 @@ void m68000_mcu_device::move_w_dpc_aid_ipm() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67077,7 +67077,7 @@ void m68000_mcu_device::move_w_dpc_aid_ipm() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67142,7 +67142,7 @@ void m68000_mcu_device::move_w_dpci_aid_ipm() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -67210,7 +67210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67239,7 +67239,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67336,7 +67336,7 @@ void m68000_mcu_device::move_w_imm16_aid_ipm() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67407,7 +67407,7 @@ void m68000_mcu_device::move_w_ds_aipd_ipm() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67477,7 +67477,7 @@ void m68000_mcu_device::move_w_as_aipd_ipm() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67544,7 +67544,7 @@ void m68000_mcu_device::move_w_ais_aipd_ipm() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67574,7 +67574,7 @@ void m68000_mcu_device::move_w_ais_aipd_ipm() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67647,7 +67647,7 @@ void m68000_mcu_device::move_w_aips_aipd_ipm() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67675,7 +67675,7 @@ void m68000_mcu_device::move_w_aips_aipd_ipm() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67750,7 +67750,7 @@ void m68000_mcu_device::move_w_pais_aipd_ipm() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -67778,7 +67778,7 @@ void m68000_mcu_device::move_w_pais_aipd_ipm() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67870,7 +67870,7 @@ void m68000_mcu_device::move_w_das_aipd_ipm() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -67900,7 +67900,7 @@ void m68000_mcu_device::move_w_das_aipd_ipm() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67965,7 +67965,7 @@ void m68000_mcu_device::move_w_dais_aipd_ipm() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68033,7 +68033,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68063,7 +68063,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68156,7 +68156,7 @@ void m68000_mcu_device::move_w_adr16_aipd_ipm() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -68184,7 +68184,7 @@ void m68000_mcu_device::move_w_adr16_aipd_ipm() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68301,7 +68301,7 @@ void m68000_mcu_device::move_w_adr32_aipd_ipm() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -68329,7 +68329,7 @@ void m68000_mcu_device::move_w_adr32_aipd_ipm() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68420,7 +68420,7 @@ void m68000_mcu_device::move_w_dpc_aipd_ipm() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68450,7 +68450,7 @@ void m68000_mcu_device::move_w_dpc_aipd_ipm() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68514,7 +68514,7 @@ void m68000_mcu_device::move_w_dpci_aipd_ipm() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -68582,7 +68582,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68612,7 +68612,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68708,7 +68708,7 @@ void m68000_mcu_device::move_w_imm16_aipd_ipm() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68777,7 +68777,7 @@ void m68000_mcu_device::move_w_ds_paid_ipm() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68847,7 +68847,7 @@ void m68000_mcu_device::move_w_as_paid_ipm() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68915,7 +68915,7 @@ void m68000_mcu_device::move_w_ais_paid_ipm() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -68944,7 +68944,7 @@ void m68000_mcu_device::move_w_ais_paid_ipm() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69018,7 +69018,7 @@ void m68000_mcu_device::move_w_aips_paid_ipm() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69045,7 +69045,7 @@ void m68000_mcu_device::move_w_aips_paid_ipm() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69121,7 +69121,7 @@ void m68000_mcu_device::move_w_pais_paid_ipm() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -69148,7 +69148,7 @@ void m68000_mcu_device::move_w_pais_paid_ipm() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69241,7 +69241,7 @@ void m68000_mcu_device::move_w_das_paid_ipm() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69270,7 +69270,7 @@ void m68000_mcu_device::move_w_das_paid_ipm() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69336,7 +69336,7 @@ void m68000_mcu_device::move_w_dais_paid_ipm() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69404,7 +69404,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69433,7 +69433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69527,7 +69527,7 @@ void m68000_mcu_device::move_w_adr16_paid_ipm() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -69554,7 +69554,7 @@ void m68000_mcu_device::move_w_adr16_paid_ipm() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69672,7 +69672,7 @@ void m68000_mcu_device::move_w_adr32_paid_ipm() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69699,7 +69699,7 @@ void m68000_mcu_device::move_w_adr32_paid_ipm() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69791,7 +69791,7 @@ void m68000_mcu_device::move_w_dpc_paid_ipm() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69820,7 +69820,7 @@ void m68000_mcu_device::move_w_dpc_paid_ipm() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69885,7 +69885,7 @@ void m68000_mcu_device::move_w_dpci_paid_ipm() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -69953,7 +69953,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -69982,7 +69982,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70078,7 +70078,7 @@ void m68000_mcu_device::move_w_imm16_paid_ipm() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70172,7 +70172,7 @@ void m68000_mcu_device::move_w_ds_dad_ipm() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70267,7 +70267,7 @@ void m68000_mcu_device::move_w_as_dad_ipm() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70336,7 +70336,7 @@ void m68000_mcu_device::move_w_ais_dad_ipm() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70364,7 +70364,7 @@ void m68000_mcu_device::move_w_ais_dad_ipm() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70468,7 +70468,7 @@ void m68000_mcu_device::move_w_aips_dad_ipm() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70494,7 +70494,7 @@ void m68000_mcu_device::move_w_aips_dad_ipm() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70600,7 +70600,7 @@ void m68000_mcu_device::move_w_pais_dad_ipm() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -70626,7 +70626,7 @@ void m68000_mcu_device::move_w_pais_dad_ipm() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70749,7 +70749,7 @@ void m68000_mcu_device::move_w_das_dad_ipm() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70777,7 +70777,7 @@ void m68000_mcu_device::move_w_das_dad_ipm() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70873,7 +70873,7 @@ void m68000_mcu_device::move_w_dais_dad_ipm() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -70941,7 +70941,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -70969,7 +70969,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71093,7 +71093,7 @@ void m68000_mcu_device::move_w_adr16_dad_ipm() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -71119,7 +71119,7 @@ void m68000_mcu_device::move_w_adr16_dad_ipm() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71267,7 +71267,7 @@ void m68000_mcu_device::move_w_adr32_dad_ipm() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -71293,7 +71293,7 @@ void m68000_mcu_device::move_w_adr32_dad_ipm() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71415,7 +71415,7 @@ void m68000_mcu_device::move_w_dpc_dad_ipm() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71443,7 +71443,7 @@ void m68000_mcu_device::move_w_dpc_dad_ipm() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71538,7 +71538,7 @@ void m68000_mcu_device::move_w_dpci_dad_ipm() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -71606,7 +71606,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -71634,7 +71634,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71784,7 +71784,7 @@ void m68000_mcu_device::move_w_imm16_dad_ipm() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71851,7 +71851,7 @@ void m68000_mcu_device::move_w_ds_daid_ipm() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -71921,7 +71921,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71988,7 +71988,7 @@ void m68000_mcu_device::move_w_as_daid_ipm() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -72058,7 +72058,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72127,7 +72127,7 @@ void m68000_mcu_device::move_w_ais_daid_ipm() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72152,7 +72152,7 @@ void m68000_mcu_device::move_w_ais_daid_ipm() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72167,7 +72167,7 @@ void m68000_mcu_device::move_w_ais_daid_ipm() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72194,7 +72194,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72300,7 +72300,7 @@ void m68000_mcu_device::move_w_aips_daid_ipm() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72323,7 +72323,7 @@ void m68000_mcu_device::move_w_aips_daid_ipm() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72338,7 +72338,7 @@ void m68000_mcu_device::move_w_aips_daid_ipm() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72365,7 +72365,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72473,7 +72473,7 @@ void m68000_mcu_device::move_w_pais_daid_ipm() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -72496,7 +72496,7 @@ void m68000_mcu_device::move_w_pais_daid_ipm() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72511,7 +72511,7 @@ void m68000_mcu_device::move_w_pais_daid_ipm() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72538,7 +72538,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72663,7 +72663,7 @@ void m68000_mcu_device::move_w_das_daid_ipm() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72688,7 +72688,7 @@ void m68000_mcu_device::move_w_das_daid_ipm() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72703,7 +72703,7 @@ void m68000_mcu_device::move_w_das_daid_ipm() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72730,7 +72730,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72828,7 +72828,7 @@ void m68000_mcu_device::move_w_dais_daid_ipm() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -72896,7 +72896,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -72921,7 +72921,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -72936,7 +72936,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72963,7 +72963,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73089,7 +73089,7 @@ void m68000_mcu_device::move_w_adr16_daid_ipm() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -73112,7 +73112,7 @@ void m68000_mcu_device::move_w_adr16_daid_ipm() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73127,7 +73127,7 @@ void m68000_mcu_device::move_w_adr16_daid_ipm() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73154,7 +73154,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73304,7 +73304,7 @@ void m68000_mcu_device::move_w_adr32_daid_ipm() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -73327,7 +73327,7 @@ void m68000_mcu_device::move_w_adr32_daid_ipm() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73342,7 +73342,7 @@ void m68000_mcu_device::move_w_adr32_daid_ipm() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73369,7 +73369,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73493,7 +73493,7 @@ void m68000_mcu_device::move_w_dpc_daid_ipm() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73518,7 +73518,7 @@ void m68000_mcu_device::move_w_dpc_daid_ipm() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73533,7 +73533,7 @@ void m68000_mcu_device::move_w_dpc_daid_ipm() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73560,7 +73560,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73657,7 +73657,7 @@ void m68000_mcu_device::move_w_dpci_daid_ipm() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -73725,7 +73725,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -73750,7 +73750,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -73765,7 +73765,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73792,7 +73792,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73916,7 +73916,7 @@ void m68000_mcu_device::move_w_imm16_daid_ipm() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -73986,7 +73986,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74056,7 +74056,7 @@ void m68000_mcu_device::move_w_ds_adr16_ipm() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74155,7 +74155,7 @@ void m68000_mcu_device::move_w_as_adr16_ipm() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74252,7 +74252,7 @@ void m68000_mcu_device::move_w_ais_adr16_ipm() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74280,7 +74280,7 @@ void m68000_mcu_device::move_w_ais_adr16_ipm() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74383,7 +74383,7 @@ void m68000_mcu_device::move_w_aips_adr16_ipm() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74409,7 +74409,7 @@ void m68000_mcu_device::move_w_aips_adr16_ipm() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74514,7 +74514,7 @@ void m68000_mcu_device::move_w_pais_adr16_ipm() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74540,7 +74540,7 @@ void m68000_mcu_device::move_w_pais_adr16_ipm() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74662,7 +74662,7 @@ void m68000_mcu_device::move_w_das_adr16_ipm() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74690,7 +74690,7 @@ void m68000_mcu_device::move_w_das_adr16_ipm() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74785,7 +74785,7 @@ void m68000_mcu_device::move_w_dais_adr16_ipm() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74853,7 +74853,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74881,7 +74881,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75004,7 +75004,7 @@ void m68000_mcu_device::move_w_adr16_adr16_ipm() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -75030,7 +75030,7 @@ void m68000_mcu_device::move_w_adr16_adr16_ipm() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75177,7 +75177,7 @@ void m68000_mcu_device::move_w_adr32_adr16_ipm() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75203,7 +75203,7 @@ void m68000_mcu_device::move_w_adr32_adr16_ipm() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75324,7 +75324,7 @@ void m68000_mcu_device::move_w_dpc_adr16_ipm() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75352,7 +75352,7 @@ void m68000_mcu_device::move_w_dpc_adr16_ipm() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75446,7 +75446,7 @@ void m68000_mcu_device::move_w_dpci_adr16_ipm() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75514,7 +75514,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75542,7 +75542,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75667,7 +75667,7 @@ void m68000_mcu_device::move_w_imm16_adr16_ipm() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75790,7 +75790,7 @@ void m68000_mcu_device::move_w_ds_adr32_ipm() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75913,7 +75913,7 @@ void m68000_mcu_device::move_w_as_adr32_ipm() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76010,7 +76010,7 @@ void m68000_mcu_device::move_w_ais_adr32_ipm() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76038,7 +76038,7 @@ void m68000_mcu_device::move_w_ais_adr32_ipm() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76164,7 +76164,7 @@ void m68000_mcu_device::move_w_aips_adr32_ipm() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76190,7 +76190,7 @@ void m68000_mcu_device::move_w_aips_adr32_ipm() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76318,7 +76318,7 @@ void m68000_mcu_device::move_w_pais_adr32_ipm() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -76344,7 +76344,7 @@ void m68000_mcu_device::move_w_pais_adr32_ipm() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76489,7 +76489,7 @@ void m68000_mcu_device::move_w_das_adr32_ipm() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76517,7 +76517,7 @@ void m68000_mcu_device::move_w_das_adr32_ipm() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76635,7 +76635,7 @@ void m68000_mcu_device::move_w_dais_adr32_ipm() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76703,7 +76703,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76731,7 +76731,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76877,7 +76877,7 @@ void m68000_mcu_device::move_w_adr16_adr32_ipm() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -76903,7 +76903,7 @@ void m68000_mcu_device::move_w_adr16_adr32_ipm() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77073,7 +77073,7 @@ void m68000_mcu_device::move_w_adr32_adr32_ipm() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -77099,7 +77099,7 @@ void m68000_mcu_device::move_w_adr32_adr32_ipm() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77243,7 +77243,7 @@ void m68000_mcu_device::move_w_dpc_adr32_ipm() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77271,7 +77271,7 @@ void m68000_mcu_device::move_w_dpc_adr32_ipm() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77388,7 +77388,7 @@ void m68000_mcu_device::move_w_dpci_adr32_ipm() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77456,7 +77456,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77484,7 +77484,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77656,7 +77656,7 @@ void m68000_mcu_device::move_w_imm16_adr32_ipm() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77755,7 +77755,7 @@ void m68000_mcu_device::negx_b_ds_ipm() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -77801,7 +77801,7 @@ void m68000_mcu_device::negx_b_ais_ipm() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -77826,7 +77826,7 @@ void m68000_mcu_device::negx_b_ais_ipm() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77892,7 +77892,7 @@ void m68000_mcu_device::negx_b_aips_ipm() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -77915,7 +77915,7 @@ void m68000_mcu_device::negx_b_aips_ipm() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77983,7 +77983,7 @@ void m68000_mcu_device::negx_b_pais_ipm() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78006,7 +78006,7 @@ void m68000_mcu_device::negx_b_pais_ipm() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78091,7 +78091,7 @@ void m68000_mcu_device::negx_b_das_ipm() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78116,7 +78116,7 @@ void m68000_mcu_device::negx_b_das_ipm() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78174,7 +78174,7 @@ void m68000_mcu_device::negx_b_dais_ipm() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78242,7 +78242,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78267,7 +78267,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78353,7 +78353,7 @@ void m68000_mcu_device::negx_b_adr16_ipm() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -78376,7 +78376,7 @@ void m68000_mcu_device::negx_b_adr16_ipm() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78486,7 +78486,7 @@ void m68000_mcu_device::negx_b_adr32_ipm() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -78509,7 +78509,7 @@ void m68000_mcu_device::negx_b_adr32_ipm() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78571,7 +78571,7 @@ void m68000_mcu_device::negx_w_ds_ipm() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -78617,7 +78617,7 @@ void m68000_mcu_device::negx_w_ais_ipm() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78646,7 +78646,7 @@ void m68000_mcu_device::negx_w_ais_ipm() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78718,7 +78718,7 @@ void m68000_mcu_device::negx_w_aips_ipm() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78745,7 +78745,7 @@ void m68000_mcu_device::negx_w_aips_ipm() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78819,7 +78819,7 @@ void m68000_mcu_device::negx_w_pais_ipm() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78846,7 +78846,7 @@ void m68000_mcu_device::negx_w_pais_ipm() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78937,7 +78937,7 @@ void m68000_mcu_device::negx_w_das_ipm() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -78966,7 +78966,7 @@ void m68000_mcu_device::negx_w_das_ipm() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79030,7 +79030,7 @@ void m68000_mcu_device::negx_w_dais_ipm() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79098,7 +79098,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -79127,7 +79127,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79219,7 +79219,7 @@ void m68000_mcu_device::negx_w_adr16_ipm() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -79246,7 +79246,7 @@ void m68000_mcu_device::negx_w_adr16_ipm() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79362,7 +79362,7 @@ void m68000_mcu_device::negx_w_adr32_ipm() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79389,7 +79389,7 @@ void m68000_mcu_device::negx_w_adr32_ipm() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79457,12 +79457,12 @@ void m68000_mcu_device::negx_l_ds_ipm() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79509,7 +79509,7 @@ void m68000_mcu_device::negx_l_ais_ipm() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79562,7 +79562,7 @@ void m68000_mcu_device::negx_l_ais_ipm() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79590,7 +79590,7 @@ void m68000_mcu_device::negx_l_ais_ipm() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79654,7 +79654,7 @@ void m68000_mcu_device::negx_l_aips_ipm() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -79710,7 +79710,7 @@ void m68000_mcu_device::negx_l_aips_ipm() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79738,7 +79738,7 @@ void m68000_mcu_device::negx_l_aips_ipm() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79801,7 +79801,7 @@ void m68000_mcu_device::negx_l_pais_ipm() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -79859,7 +79859,7 @@ void m68000_mcu_device::negx_l_pais_ipm() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79887,7 +79887,7 @@ void m68000_mcu_device::negx_l_pais_ipm() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -79975,7 +79975,7 @@ void m68000_mcu_device::negx_l_das_ipm() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80028,7 +80028,7 @@ void m68000_mcu_device::negx_l_das_ipm() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80056,7 +80056,7 @@ void m68000_mcu_device::negx_l_das_ipm() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80118,7 +80118,7 @@ void m68000_mcu_device::negx_l_dais_ipm() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80185,7 +80185,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80238,7 +80238,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80266,7 +80266,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80356,7 +80356,7 @@ void m68000_mcu_device::negx_l_adr16_ipm() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -80409,7 +80409,7 @@ void m68000_mcu_device::negx_l_adr16_ipm() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80437,7 +80437,7 @@ void m68000_mcu_device::negx_l_adr16_ipm() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80551,7 +80551,7 @@ void m68000_mcu_device::negx_l_adr32_ipm() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -80604,7 +80604,7 @@ void m68000_mcu_device::negx_l_adr32_ipm() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80632,7 +80632,7 @@ void m68000_mcu_device::negx_l_adr32_ipm() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -80743,7 +80743,7 @@ void m68000_mcu_device::move_sr_ais_ipm() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -80774,7 +80774,7 @@ void m68000_mcu_device::move_sr_ais_ipm() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80845,7 +80845,7 @@ void m68000_mcu_device::move_sr_aips_ipm() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80874,7 +80874,7 @@ void m68000_mcu_device::move_sr_aips_ipm() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -80947,7 +80947,7 @@ void m68000_mcu_device::move_sr_pais_ipm() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -80976,7 +80976,7 @@ void m68000_mcu_device::move_sr_pais_ipm() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -81066,7 +81066,7 @@ void m68000_mcu_device::move_sr_das_ipm() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81097,7 +81097,7 @@ void m68000_mcu_device::move_sr_das_ipm() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81160,7 +81160,7 @@ void m68000_mcu_device::move_sr_dais_ipm() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81228,7 +81228,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -81259,7 +81259,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81350,7 +81350,7 @@ void m68000_mcu_device::move_sr_adr16_ipm() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -81379,7 +81379,7 @@ void m68000_mcu_device::move_sr_adr16_ipm() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -81494,7 +81494,7 @@ void m68000_mcu_device::move_sr_adr32_ipm() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -81523,7 +81523,7 @@ void m68000_mcu_device::move_sr_adr32_ipm() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -81589,7 +81589,7 @@ void m68000_mcu_device::chk_w_ds_dd_ipm() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -81597,7 +81597,7 @@ void m68000_mcu_device::chk_w_ds_dd_ipm() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81615,14 +81615,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -81650,7 +81650,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81676,7 +81676,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81834,7 +81834,7 @@ void m68000_mcu_device::chk_w_ais_dd_ipm() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -81861,7 +81861,7 @@ void m68000_mcu_device::chk_w_ais_dd_ipm() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -81869,7 +81869,7 @@ void m68000_mcu_device::chk_w_ais_dd_ipm() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -81887,14 +81887,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -81922,7 +81922,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -81948,7 +81948,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82112,7 +82112,7 @@ void m68000_mcu_device::chk_w_aips_dd_ipm() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82137,7 +82137,7 @@ void m68000_mcu_device::chk_w_aips_dd_ipm() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82145,7 +82145,7 @@ void m68000_mcu_device::chk_w_aips_dd_ipm() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82163,14 +82163,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82198,7 +82198,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82224,7 +82224,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82390,7 +82390,7 @@ void m68000_mcu_device::chk_w_pais_dd_ipm() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -82415,7 +82415,7 @@ void m68000_mcu_device::chk_w_pais_dd_ipm() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82423,7 +82423,7 @@ void m68000_mcu_device::chk_w_pais_dd_ipm() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82441,14 +82441,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -82476,7 +82476,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82502,7 +82502,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82685,7 +82685,7 @@ void m68000_mcu_device::chk_w_das_dd_ipm() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -82712,7 +82712,7 @@ void m68000_mcu_device::chk_w_das_dd_ipm() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -82720,7 +82720,7 @@ void m68000_mcu_device::chk_w_das_dd_ipm() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -82738,14 +82738,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -82773,7 +82773,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -82799,7 +82799,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -82955,7 +82955,7 @@ void m68000_mcu_device::chk_w_dais_dd_ipm() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -83023,7 +83023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83050,7 +83050,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83058,7 +83058,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83076,14 +83076,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83111,7 +83111,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83137,7 +83137,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83321,7 +83321,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ipm() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -83346,7 +83346,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ipm() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83354,7 +83354,7 @@ void m68000_mcu_device::chk_w_adr16_dd_ipm() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83372,14 +83372,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -83407,7 +83407,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83433,7 +83433,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83641,7 +83641,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ipm() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83666,7 +83666,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ipm() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83674,7 +83674,7 @@ void m68000_mcu_device::chk_w_adr32_dd_ipm() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83692,14 +83692,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -83727,7 +83727,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -83753,7 +83753,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -83935,7 +83935,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ipm() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -83962,7 +83962,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ipm() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -83970,7 +83970,7 @@ void m68000_mcu_device::chk_w_dpc_dd_ipm() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -83988,14 +83988,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84023,7 +84023,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84049,7 +84049,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84204,7 +84204,7 @@ void m68000_mcu_device::chk_w_dpci_dd_ipm() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84272,7 +84272,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84299,7 +84299,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -84307,7 +84307,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84325,14 +84325,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84360,7 +84360,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84386,7 +84386,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -84570,7 +84570,7 @@ void m68000_mcu_device::chk_w_imm16_dd_ipm() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -84578,7 +84578,7 @@ void m68000_mcu_device::chk_w_imm16_dd_ipm() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -84596,14 +84596,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -84631,7 +84631,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -84657,7 +84657,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -84931,7 +84931,7 @@ void m68000_mcu_device::lea_dais_ad_ipm() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85272,7 +85272,7 @@ void m68000_mcu_device::lea_dpci_ad_ipm() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -85388,7 +85388,7 @@ void m68000_mcu_device::clr_b_ds_ipm() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -85396,7 +85396,7 @@ void m68000_mcu_device::clr_b_ds_ipm() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85435,11 +85435,11 @@ void m68000_mcu_device::clr_b_ais_ipm() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85461,7 +85461,7 @@ void m68000_mcu_device::clr_b_ais_ipm() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85491,7 +85491,7 @@ void m68000_mcu_device::clr_b_ais_ipm() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85525,12 +85525,12 @@ void m68000_mcu_device::clr_b_aips_ipm() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85553,7 +85553,7 @@ void m68000_mcu_device::clr_b_aips_ipm() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85583,7 +85583,7 @@ void m68000_mcu_device::clr_b_aips_ipm() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85616,7 +85616,7 @@ void m68000_mcu_device::clr_b_pais_ipm() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -85624,7 +85624,7 @@ void m68000_mcu_device::clr_b_pais_ipm() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85647,7 +85647,7 @@ void m68000_mcu_device::clr_b_pais_ipm() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85677,7 +85677,7 @@ void m68000_mcu_device::clr_b_pais_ipm() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85708,7 +85708,7 @@ void m68000_mcu_device::clr_b_das_ipm() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85734,11 +85734,11 @@ void m68000_mcu_device::clr_b_das_ipm() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85760,7 +85760,7 @@ void m68000_mcu_device::clr_b_das_ipm() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85790,7 +85790,7 @@ void m68000_mcu_device::clr_b_das_ipm() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85819,14 +85819,14 @@ void m68000_mcu_device::clr_b_dais_ipm() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -85834,7 +85834,7 @@ void m68000_mcu_device::clr_b_dais_ipm() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85861,7 +85861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -85890,11 +85890,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -85916,7 +85916,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85946,7 +85946,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -85979,7 +85979,7 @@ void m68000_mcu_device::clr_b_adr16_ipm() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86005,7 +86005,7 @@ void m68000_mcu_device::clr_b_adr16_ipm() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86028,7 +86028,7 @@ void m68000_mcu_device::clr_b_adr16_ipm() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86058,7 +86058,7 @@ void m68000_mcu_device::clr_b_adr16_ipm() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86089,7 +86089,7 @@ void m68000_mcu_device::clr_b_adr32_ipm() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86116,7 +86116,7 @@ void m68000_mcu_device::clr_b_adr32_ipm() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -86142,7 +86142,7 @@ void m68000_mcu_device::clr_b_adr32_ipm() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -86165,7 +86165,7 @@ void m68000_mcu_device::clr_b_adr32_ipm() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86195,7 +86195,7 @@ void m68000_mcu_device::clr_b_adr32_ipm() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -86228,7 +86228,7 @@ void m68000_mcu_device::clr_w_ds_ipm() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -86236,7 +86236,7 @@ void m68000_mcu_device::clr_w_ds_ipm() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86275,11 +86275,11 @@ void m68000_mcu_device::clr_w_ais_ipm() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86305,7 +86305,7 @@ void m68000_mcu_device::clr_w_ais_ipm() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86335,7 +86335,7 @@ void m68000_mcu_device::clr_w_ais_ipm() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86375,12 +86375,12 @@ void m68000_mcu_device::clr_w_aips_ipm() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86407,7 +86407,7 @@ void m68000_mcu_device::clr_w_aips_ipm() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86437,7 +86437,7 @@ void m68000_mcu_device::clr_w_aips_ipm() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86476,7 +86476,7 @@ void m68000_mcu_device::clr_w_pais_ipm() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -86484,7 +86484,7 @@ void m68000_mcu_device::clr_w_pais_ipm() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86511,7 +86511,7 @@ void m68000_mcu_device::clr_w_pais_ipm() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86541,7 +86541,7 @@ void m68000_mcu_device::clr_w_pais_ipm() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86578,7 +86578,7 @@ void m68000_mcu_device::clr_w_das_ipm() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86604,11 +86604,11 @@ void m68000_mcu_device::clr_w_das_ipm() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86634,7 +86634,7 @@ void m68000_mcu_device::clr_w_das_ipm() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86664,7 +86664,7 @@ void m68000_mcu_device::clr_w_das_ipm() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86699,14 +86699,14 @@ void m68000_mcu_device::clr_w_dais_ipm() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -86714,7 +86714,7 @@ void m68000_mcu_device::clr_w_dais_ipm() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86741,7 +86741,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -86770,11 +86770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -86800,7 +86800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86830,7 +86830,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86869,7 +86869,7 @@ void m68000_mcu_device::clr_w_adr16_ipm() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86895,7 +86895,7 @@ void m68000_mcu_device::clr_w_adr16_ipm() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -86922,7 +86922,7 @@ void m68000_mcu_device::clr_w_adr16_ipm() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86952,7 +86952,7 @@ void m68000_mcu_device::clr_w_adr16_ipm() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -86989,7 +86989,7 @@ void m68000_mcu_device::clr_w_adr32_ipm() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87016,7 +87016,7 @@ void m68000_mcu_device::clr_w_adr32_ipm() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -87042,7 +87042,7 @@ void m68000_mcu_device::clr_w_adr32_ipm() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87069,7 +87069,7 @@ void m68000_mcu_device::clr_w_adr32_ipm() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87099,7 +87099,7 @@ void m68000_mcu_device::clr_w_adr32_ipm() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87138,12 +87138,12 @@ void m68000_mcu_device::clr_l_ds_ipm() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87172,7 +87172,7 @@ void m68000_mcu_device::clr_l_ds_ipm() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -87191,7 +87191,7 @@ void m68000_mcu_device::clr_l_ais_ipm() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87219,7 +87219,7 @@ void m68000_mcu_device::clr_l_ais_ipm() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87245,7 +87245,7 @@ void m68000_mcu_device::clr_l_ais_ipm() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87273,7 +87273,7 @@ void m68000_mcu_device::clr_l_ais_ipm() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87301,7 +87301,7 @@ void m68000_mcu_device::clr_l_ais_ipm() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87338,7 +87338,7 @@ void m68000_mcu_device::clr_l_aips_ipm() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -87366,11 +87366,11 @@ void m68000_mcu_device::clr_l_aips_ipm() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87396,7 +87396,7 @@ void m68000_mcu_device::clr_l_aips_ipm() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87424,7 +87424,7 @@ void m68000_mcu_device::clr_l_aips_ipm() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87452,7 +87452,7 @@ void m68000_mcu_device::clr_l_aips_ipm() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87488,14 +87488,14 @@ void m68000_mcu_device::clr_l_pais_ipm() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87522,7 +87522,7 @@ void m68000_mcu_device::clr_l_pais_ipm() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87548,7 +87548,7 @@ void m68000_mcu_device::clr_l_pais_ipm() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87576,7 +87576,7 @@ void m68000_mcu_device::clr_l_pais_ipm() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87604,7 +87604,7 @@ void m68000_mcu_device::clr_l_pais_ipm() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87641,7 +87641,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87666,7 +87666,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87694,7 +87694,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87720,7 +87720,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87748,7 +87748,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87776,7 +87776,7 @@ void m68000_mcu_device::clr_l_das_ipm() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -87811,14 +87811,14 @@ void m68000_mcu_device::clr_l_dais_ipm() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -87826,7 +87826,7 @@ void m68000_mcu_device::clr_l_dais_ipm() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87853,7 +87853,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -87881,7 +87881,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -87909,7 +87909,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -87935,7 +87935,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87963,7 +87963,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -87991,7 +87991,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88030,7 +88030,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -88056,7 +88056,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -88084,7 +88084,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -88110,7 +88110,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88138,7 +88138,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88166,7 +88166,7 @@ void m68000_mcu_device::clr_l_adr16_ipm() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88203,7 +88203,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -88230,7 +88230,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -88256,7 +88256,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88284,7 +88284,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -88310,7 +88310,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88338,7 +88338,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -88366,7 +88366,7 @@ void m68000_mcu_device::clr_l_adr32_ipm() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -88405,7 +88405,7 @@ void m68000_mcu_device::neg_b_ds_ipm() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -88451,7 +88451,7 @@ void m68000_mcu_device::neg_b_ais_ipm() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88476,7 +88476,7 @@ void m68000_mcu_device::neg_b_ais_ipm() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88542,7 +88542,7 @@ void m68000_mcu_device::neg_b_aips_ipm() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88565,7 +88565,7 @@ void m68000_mcu_device::neg_b_aips_ipm() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88633,7 +88633,7 @@ void m68000_mcu_device::neg_b_pais_ipm() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88656,7 +88656,7 @@ void m68000_mcu_device::neg_b_pais_ipm() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88741,7 +88741,7 @@ void m68000_mcu_device::neg_b_das_ipm() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88766,7 +88766,7 @@ void m68000_mcu_device::neg_b_das_ipm() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88824,7 +88824,7 @@ void m68000_mcu_device::neg_b_dais_ipm() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88892,7 +88892,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -88917,7 +88917,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89003,7 +89003,7 @@ void m68000_mcu_device::neg_b_adr16_ipm() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89026,7 +89026,7 @@ void m68000_mcu_device::neg_b_adr16_ipm() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89136,7 +89136,7 @@ void m68000_mcu_device::neg_b_adr32_ipm() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -89159,7 +89159,7 @@ void m68000_mcu_device::neg_b_adr32_ipm() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89221,7 +89221,7 @@ void m68000_mcu_device::neg_w_ds_ipm() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -89267,7 +89267,7 @@ void m68000_mcu_device::neg_w_ais_ipm() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89296,7 +89296,7 @@ void m68000_mcu_device::neg_w_ais_ipm() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89368,7 +89368,7 @@ void m68000_mcu_device::neg_w_aips_ipm() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89395,7 +89395,7 @@ void m68000_mcu_device::neg_w_aips_ipm() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89469,7 +89469,7 @@ void m68000_mcu_device::neg_w_pais_ipm() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89496,7 +89496,7 @@ void m68000_mcu_device::neg_w_pais_ipm() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89587,7 +89587,7 @@ void m68000_mcu_device::neg_w_das_ipm() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89616,7 +89616,7 @@ void m68000_mcu_device::neg_w_das_ipm() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89680,7 +89680,7 @@ void m68000_mcu_device::neg_w_dais_ipm() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89748,7 +89748,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -89777,7 +89777,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89869,7 +89869,7 @@ void m68000_mcu_device::neg_w_adr16_ipm() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -89896,7 +89896,7 @@ void m68000_mcu_device::neg_w_adr16_ipm() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90012,7 +90012,7 @@ void m68000_mcu_device::neg_w_adr32_ipm() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90039,7 +90039,7 @@ void m68000_mcu_device::neg_w_adr32_ipm() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90107,12 +90107,12 @@ void m68000_mcu_device::neg_l_ds_ipm() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90159,7 +90159,7 @@ void m68000_mcu_device::neg_l_ais_ipm() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90212,7 +90212,7 @@ void m68000_mcu_device::neg_l_ais_ipm() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90240,7 +90240,7 @@ void m68000_mcu_device::neg_l_ais_ipm() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90304,7 +90304,7 @@ void m68000_mcu_device::neg_l_aips_ipm() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90360,7 +90360,7 @@ void m68000_mcu_device::neg_l_aips_ipm() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90388,7 +90388,7 @@ void m68000_mcu_device::neg_l_aips_ipm() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90451,7 +90451,7 @@ void m68000_mcu_device::neg_l_pais_ipm() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -90509,7 +90509,7 @@ void m68000_mcu_device::neg_l_pais_ipm() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90537,7 +90537,7 @@ void m68000_mcu_device::neg_l_pais_ipm() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90625,7 +90625,7 @@ void m68000_mcu_device::neg_l_das_ipm() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90678,7 +90678,7 @@ void m68000_mcu_device::neg_l_das_ipm() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90706,7 +90706,7 @@ void m68000_mcu_device::neg_l_das_ipm() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -90768,7 +90768,7 @@ void m68000_mcu_device::neg_l_dais_ipm() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -90835,7 +90835,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -90888,7 +90888,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90916,7 +90916,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91006,7 +91006,7 @@ void m68000_mcu_device::neg_l_adr16_ipm() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -91059,7 +91059,7 @@ void m68000_mcu_device::neg_l_adr16_ipm() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91087,7 +91087,7 @@ void m68000_mcu_device::neg_l_adr16_ipm() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91201,7 +91201,7 @@ void m68000_mcu_device::neg_l_adr32_ipm() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -91254,7 +91254,7 @@ void m68000_mcu_device::neg_l_adr32_ipm() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91282,7 +91282,7 @@ void m68000_mcu_device::neg_l_adr32_ipm() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -91424,7 +91424,7 @@ void m68000_mcu_device::move_ais_ccr_ipm() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91535,7 +91535,7 @@ void m68000_mcu_device::move_aips_ccr_ipm() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91646,7 +91646,7 @@ void m68000_mcu_device::move_pais_ccr_ipm() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91774,7 +91774,7 @@ void m68000_mcu_device::move_das_ccr_ipm() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91877,7 +91877,7 @@ void m68000_mcu_device::move_dais_ccr_ipm() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91945,7 +91945,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92076,7 +92076,7 @@ void m68000_mcu_device::move_adr16_ccr_ipm() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -92229,7 +92229,7 @@ void m68000_mcu_device::move_adr32_ccr_ipm() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92356,7 +92356,7 @@ void m68000_mcu_device::move_dpc_ccr_ipm() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92458,7 +92458,7 @@ void m68000_mcu_device::move_dpci_ccr_ipm() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92526,7 +92526,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92737,7 +92737,7 @@ void m68000_mcu_device::not_b_ds_ipm() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -92783,7 +92783,7 @@ void m68000_mcu_device::not_b_ais_ipm() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -92808,7 +92808,7 @@ void m68000_mcu_device::not_b_ais_ipm() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92874,7 +92874,7 @@ void m68000_mcu_device::not_b_aips_ipm() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92897,7 +92897,7 @@ void m68000_mcu_device::not_b_aips_ipm() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92965,7 +92965,7 @@ void m68000_mcu_device::not_b_pais_ipm() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -92988,7 +92988,7 @@ void m68000_mcu_device::not_b_pais_ipm() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93073,7 +93073,7 @@ void m68000_mcu_device::not_b_das_ipm() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93098,7 +93098,7 @@ void m68000_mcu_device::not_b_das_ipm() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93156,7 +93156,7 @@ void m68000_mcu_device::not_b_dais_ipm() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93224,7 +93224,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93249,7 +93249,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93335,7 +93335,7 @@ void m68000_mcu_device::not_b_adr16_ipm() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -93358,7 +93358,7 @@ void m68000_mcu_device::not_b_adr16_ipm() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93468,7 +93468,7 @@ void m68000_mcu_device::not_b_adr32_ipm() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -93491,7 +93491,7 @@ void m68000_mcu_device::not_b_adr32_ipm() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93553,7 +93553,7 @@ void m68000_mcu_device::not_w_ds_ipm() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -93599,7 +93599,7 @@ void m68000_mcu_device::not_w_ais_ipm() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93628,7 +93628,7 @@ void m68000_mcu_device::not_w_ais_ipm() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93700,7 +93700,7 @@ void m68000_mcu_device::not_w_aips_ipm() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93727,7 +93727,7 @@ void m68000_mcu_device::not_w_aips_ipm() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93801,7 +93801,7 @@ void m68000_mcu_device::not_w_pais_ipm() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93828,7 +93828,7 @@ void m68000_mcu_device::not_w_pais_ipm() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93919,7 +93919,7 @@ void m68000_mcu_device::not_w_das_ipm() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93948,7 +93948,7 @@ void m68000_mcu_device::not_w_das_ipm() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94012,7 +94012,7 @@ void m68000_mcu_device::not_w_dais_ipm() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94080,7 +94080,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94109,7 +94109,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94201,7 +94201,7 @@ void m68000_mcu_device::not_w_adr16_ipm() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -94228,7 +94228,7 @@ void m68000_mcu_device::not_w_adr16_ipm() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94344,7 +94344,7 @@ void m68000_mcu_device::not_w_adr32_ipm() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94371,7 +94371,7 @@ void m68000_mcu_device::not_w_adr32_ipm() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94439,12 +94439,12 @@ void m68000_mcu_device::not_l_ds_ipm() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94491,7 +94491,7 @@ void m68000_mcu_device::not_l_ais_ipm() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94544,7 +94544,7 @@ void m68000_mcu_device::not_l_ais_ipm() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94572,7 +94572,7 @@ void m68000_mcu_device::not_l_ais_ipm() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94636,7 +94636,7 @@ void m68000_mcu_device::not_l_aips_ipm() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -94692,7 +94692,7 @@ void m68000_mcu_device::not_l_aips_ipm() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94720,7 +94720,7 @@ void m68000_mcu_device::not_l_aips_ipm() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94783,7 +94783,7 @@ void m68000_mcu_device::not_l_pais_ipm() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -94841,7 +94841,7 @@ void m68000_mcu_device::not_l_pais_ipm() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94869,7 +94869,7 @@ void m68000_mcu_device::not_l_pais_ipm() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -94957,7 +94957,7 @@ void m68000_mcu_device::not_l_das_ipm() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95010,7 +95010,7 @@ void m68000_mcu_device::not_l_das_ipm() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95038,7 +95038,7 @@ void m68000_mcu_device::not_l_das_ipm() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95100,7 +95100,7 @@ void m68000_mcu_device::not_l_dais_ipm() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -95167,7 +95167,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95220,7 +95220,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95248,7 +95248,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95338,7 +95338,7 @@ void m68000_mcu_device::not_l_adr16_ipm() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -95391,7 +95391,7 @@ void m68000_mcu_device::not_l_adr16_ipm() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95419,7 +95419,7 @@ void m68000_mcu_device::not_l_adr16_ipm() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95533,7 +95533,7 @@ void m68000_mcu_device::not_l_adr32_ipm() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -95586,7 +95586,7 @@ void m68000_mcu_device::not_l_adr32_ipm() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95614,7 +95614,7 @@ void m68000_mcu_device::not_l_adr32_ipm() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -95766,7 +95766,7 @@ void m68000_mcu_device::move_ais_sr_ipm() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -95883,7 +95883,7 @@ void m68000_mcu_device::move_aips_sr_ipm() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96000,7 +96000,7 @@ void m68000_mcu_device::move_pais_sr_ipm() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96134,7 +96134,7 @@ void m68000_mcu_device::move_das_sr_ipm() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96243,7 +96243,7 @@ void m68000_mcu_device::move_dais_sr_ipm() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96311,7 +96311,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96448,7 +96448,7 @@ void m68000_mcu_device::move_adr16_sr_ipm() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -96607,7 +96607,7 @@ void m68000_mcu_device::move_adr32_sr_ipm() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -96740,7 +96740,7 @@ void m68000_mcu_device::move_dpc_sr_ipm() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -96848,7 +96848,7 @@ void m68000_mcu_device::move_dpci_sr_ipm() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96916,7 +96916,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97135,12 +97135,12 @@ void m68000_mcu_device::nbcd_b_ds_ipm() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97185,7 +97185,7 @@ void m68000_mcu_device::nbcd_b_ais_ipm() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97209,12 +97209,12 @@ void m68000_mcu_device::nbcd_b_ais_ipm() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97278,7 +97278,7 @@ void m68000_mcu_device::nbcd_b_aips_ipm() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97300,12 +97300,12 @@ void m68000_mcu_device::nbcd_b_aips_ipm() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97371,7 +97371,7 @@ void m68000_mcu_device::nbcd_b_pais_ipm() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -97393,12 +97393,12 @@ void m68000_mcu_device::nbcd_b_pais_ipm() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97481,7 +97481,7 @@ void m68000_mcu_device::nbcd_b_das_ipm() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97505,12 +97505,12 @@ void m68000_mcu_device::nbcd_b_das_ipm() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97566,7 +97566,7 @@ void m68000_mcu_device::nbcd_b_dais_ipm() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97634,7 +97634,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -97658,12 +97658,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97747,7 +97747,7 @@ void m68000_mcu_device::nbcd_b_adr16_ipm() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -97769,12 +97769,12 @@ void m68000_mcu_device::nbcd_b_adr16_ipm() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97882,7 +97882,7 @@ void m68000_mcu_device::nbcd_b_adr32_ipm() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97904,12 +97904,12 @@ void m68000_mcu_device::nbcd_b_adr32_ipm() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -97970,7 +97970,7 @@ void m68000_mcu_device::swap_ds_ipm() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -97978,7 +97978,7 @@ void m68000_mcu_device::swap_ds_ipm() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98022,7 +98022,7 @@ void m68000_mcu_device::pea_ais_ipm() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98112,7 +98112,7 @@ void m68000_mcu_device::pea_das_ipm() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98142,7 +98142,7 @@ void m68000_mcu_device::pea_das_ipm() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98230,7 +98230,7 @@ void m68000_mcu_device::pea_dais_ipm() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98297,7 +98297,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98654,7 +98654,7 @@ void m68000_mcu_device::pea_dpc_ipm() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -98684,7 +98684,7 @@ void m68000_mcu_device::pea_dpc_ipm() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98771,7 +98771,7 @@ void m68000_mcu_device::pea_dpci_ipm() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -98838,7 +98838,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -98935,7 +98935,7 @@ void m68000_mcu_device::ext_w_ds_ipm() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -99358,7 +99358,7 @@ void m68000_mcu_device::movem_w_list_dais_ipm() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -99797,7 +99797,7 @@ void m68000_mcu_device::ext_l_ds_ipm() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -100290,7 +100290,7 @@ void m68000_mcu_device::movem_l_list_dais_ipm() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -100799,13 +100799,13 @@ void m68000_mcu_device::tst_b_ds_ipm() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100844,11 +100844,11 @@ void m68000_mcu_device::tst_b_ais_ipm() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -100870,13 +100870,13 @@ void m68000_mcu_device::tst_b_ais_ipm() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100918,12 +100918,12 @@ void m68000_mcu_device::tst_b_aips_ipm() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -100946,13 +100946,13 @@ void m68000_mcu_device::tst_b_aips_ipm() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -100993,7 +100993,7 @@ void m68000_mcu_device::tst_b_pais_ipm() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101001,7 +101001,7 @@ void m68000_mcu_device::tst_b_pais_ipm() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101024,13 +101024,13 @@ void m68000_mcu_device::tst_b_pais_ipm() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101069,7 +101069,7 @@ void m68000_mcu_device::tst_b_das_ipm() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101095,11 +101095,11 @@ void m68000_mcu_device::tst_b_das_ipm() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101121,13 +101121,13 @@ void m68000_mcu_device::tst_b_das_ipm() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101164,14 +101164,14 @@ void m68000_mcu_device::tst_b_dais_ipm() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101179,7 +101179,7 @@ void m68000_mcu_device::tst_b_dais_ipm() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101206,7 +101206,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101235,11 +101235,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -101261,13 +101261,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101308,7 +101308,7 @@ void m68000_mcu_device::tst_b_adr16_ipm() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -101334,7 +101334,7 @@ void m68000_mcu_device::tst_b_adr16_ipm() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -101357,13 +101357,13 @@ void m68000_mcu_device::tst_b_adr16_ipm() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101402,7 +101402,7 @@ void m68000_mcu_device::tst_b_adr32_ipm() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101429,7 +101429,7 @@ void m68000_mcu_device::tst_b_adr32_ipm() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -101455,7 +101455,7 @@ void m68000_mcu_device::tst_b_adr32_ipm() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -101478,13 +101478,13 @@ void m68000_mcu_device::tst_b_adr32_ipm() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101526,13 +101526,13 @@ void m68000_mcu_device::tst_w_ds_ipm() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101571,11 +101571,11 @@ void m68000_mcu_device::tst_w_ais_ipm() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101601,13 +101601,13 @@ void m68000_mcu_device::tst_w_ais_ipm() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101649,12 +101649,12 @@ void m68000_mcu_device::tst_w_aips_ipm() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101681,13 +101681,13 @@ void m68000_mcu_device::tst_w_aips_ipm() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101728,7 +101728,7 @@ void m68000_mcu_device::tst_w_pais_ipm() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -101736,7 +101736,7 @@ void m68000_mcu_device::tst_w_pais_ipm() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101763,13 +101763,13 @@ void m68000_mcu_device::tst_w_pais_ipm() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101808,7 +101808,7 @@ void m68000_mcu_device::tst_w_das_ipm() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101834,11 +101834,11 @@ void m68000_mcu_device::tst_w_das_ipm() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -101864,13 +101864,13 @@ void m68000_mcu_device::tst_w_das_ipm() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101907,14 +101907,14 @@ void m68000_mcu_device::tst_w_dais_ipm() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -101922,7 +101922,7 @@ void m68000_mcu_device::tst_w_dais_ipm() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101949,7 +101949,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -101978,11 +101978,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102008,13 +102008,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102055,7 +102055,7 @@ void m68000_mcu_device::tst_w_adr16_ipm() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102081,7 +102081,7 @@ void m68000_mcu_device::tst_w_adr16_ipm() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102108,13 +102108,13 @@ void m68000_mcu_device::tst_w_adr16_ipm() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102153,7 +102153,7 @@ void m68000_mcu_device::tst_w_adr32_ipm() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102180,7 +102180,7 @@ void m68000_mcu_device::tst_w_adr32_ipm() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -102206,7 +102206,7 @@ void m68000_mcu_device::tst_w_adr32_ipm() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102233,13 +102233,13 @@ void m68000_mcu_device::tst_w_adr32_ipm() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102281,13 +102281,13 @@ void m68000_mcu_device::tst_l_ds_ipm() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102328,7 +102328,7 @@ void m68000_mcu_device::tst_l_ais_ipm() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102356,7 +102356,7 @@ void m68000_mcu_device::tst_l_ais_ipm() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102382,13 +102382,13 @@ void m68000_mcu_device::tst_l_ais_ipm() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102429,7 +102429,7 @@ void m68000_mcu_device::tst_l_aips_ipm() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -102457,11 +102457,11 @@ void m68000_mcu_device::tst_l_aips_ipm() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102487,13 +102487,13 @@ void m68000_mcu_device::tst_l_aips_ipm() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102533,14 +102533,14 @@ void m68000_mcu_device::tst_l_pais_ipm() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102567,7 +102567,7 @@ void m68000_mcu_device::tst_l_pais_ipm() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102593,13 +102593,13 @@ void m68000_mcu_device::tst_l_pais_ipm() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102640,7 +102640,7 @@ void m68000_mcu_device::tst_l_das_ipm() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102665,7 +102665,7 @@ void m68000_mcu_device::tst_l_das_ipm() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102693,7 +102693,7 @@ void m68000_mcu_device::tst_l_das_ipm() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102719,13 +102719,13 @@ void m68000_mcu_device::tst_l_das_ipm() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102764,14 +102764,14 @@ void m68000_mcu_device::tst_l_dais_ipm() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -102779,7 +102779,7 @@ void m68000_mcu_device::tst_l_dais_ipm() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102806,7 +102806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -102834,7 +102834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102862,7 +102862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -102888,13 +102888,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102937,7 +102937,7 @@ void m68000_mcu_device::tst_l_adr16_ipm() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -102963,7 +102963,7 @@ void m68000_mcu_device::tst_l_adr16_ipm() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -102991,7 +102991,7 @@ void m68000_mcu_device::tst_l_adr16_ipm() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -103017,13 +103017,13 @@ void m68000_mcu_device::tst_l_adr16_ipm() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103064,7 +103064,7 @@ void m68000_mcu_device::tst_l_adr32_ipm() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103091,7 +103091,7 @@ void m68000_mcu_device::tst_l_adr32_ipm() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -103117,7 +103117,7 @@ void m68000_mcu_device::tst_l_adr32_ipm() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -103145,7 +103145,7 @@ void m68000_mcu_device::tst_l_adr32_ipm() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -103171,13 +103171,13 @@ void m68000_mcu_device::tst_l_adr32_ipm() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103220,14 +103220,14 @@ void m68000_mcu_device::tas_ds_ipm() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103268,11 +103268,11 @@ void m68000_mcu_device::tas_ais_ipm() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103289,14 +103289,14 @@ void m68000_mcu_device::tas_ais_ipm() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103320,11 +103320,11 @@ void m68000_mcu_device::tas_ais_ipm() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103366,12 +103366,12 @@ void m68000_mcu_device::tas_aips_ipm() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103389,14 +103389,14 @@ void m68000_mcu_device::tas_aips_ipm() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103420,11 +103420,11 @@ void m68000_mcu_device::tas_aips_ipm() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103465,7 +103465,7 @@ void m68000_mcu_device::tas_pais_ipm() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -103473,7 +103473,7 @@ void m68000_mcu_device::tas_pais_ipm() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -103491,14 +103491,14 @@ void m68000_mcu_device::tas_pais_ipm() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103522,11 +103522,11 @@ void m68000_mcu_device::tas_pais_ipm() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103565,7 +103565,7 @@ void m68000_mcu_device::tas_das_ipm() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103591,11 +103591,11 @@ void m68000_mcu_device::tas_das_ipm() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103612,14 +103612,14 @@ void m68000_mcu_device::tas_das_ipm() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103643,11 +103643,11 @@ void m68000_mcu_device::tas_das_ipm() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103684,14 +103684,14 @@ void m68000_mcu_device::tas_dais_ipm() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -103699,7 +103699,7 @@ void m68000_mcu_device::tas_dais_ipm() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103726,7 +103726,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103755,11 +103755,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -103776,14 +103776,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103807,11 +103807,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103852,7 +103852,7 @@ void m68000_mcu_device::tas_adr16_ipm() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -103878,7 +103878,7 @@ void m68000_mcu_device::tas_adr16_ipm() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -103896,14 +103896,14 @@ void m68000_mcu_device::tas_adr16_ipm() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -103927,11 +103927,11 @@ void m68000_mcu_device::tas_adr16_ipm() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103970,7 +103970,7 @@ void m68000_mcu_device::tas_adr32_ipm() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -103997,7 +103997,7 @@ void m68000_mcu_device::tas_adr32_ipm() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -104023,7 +104023,7 @@ void m68000_mcu_device::tas_adr32_ipm() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104041,14 +104041,14 @@ void m68000_mcu_device::tas_adr32_ipm() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -104072,11 +104072,11 @@ void m68000_mcu_device::tas_adr32_ipm() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -104563,7 +104563,7 @@ void m68000_mcu_device::movem_w_dais_list_ipm() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -104627,7 +104627,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105256,7 +105256,7 @@ void m68000_mcu_device::movem_w_dpci_list_ipm() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -105320,7 +105320,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -105949,7 +105949,7 @@ void m68000_mcu_device::movem_l_dais_list_ipm() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106013,7 +106013,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106738,7 +106738,7 @@ void m68000_mcu_device::movem_l_dpci_list_ipm() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -106802,7 +106802,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -106940,14 +106940,14 @@ void m68000_mcu_device::trap_imm4_ipm() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -106975,7 +106975,7 @@ void m68000_mcu_device::trap_imm4_ipm() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 3:
@@ -107001,7 +107001,7 @@ void m68000_mcu_device::trap_imm4_ipm() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107142,7 +107142,7 @@ void m68000_mcu_device::link_as_imm16_ipm() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -107462,7 +107462,7 @@ void m68000_mcu_device::reset_ipm() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -107576,7 +107576,7 @@ void m68000_mcu_device::stop_i16u_ipm() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -107590,6 +107590,7 @@ void m68000_mcu_device::stop_i16u_ipm() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -107606,7 +107607,7 @@ void m68000_mcu_device::rte_ipm() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107753,7 +107754,7 @@ void m68000_mcu_device::rts_ipm() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -107914,7 +107915,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -107940,7 +107941,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -107968,7 +107969,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -107994,7 +107995,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -108133,7 +108134,7 @@ void m68000_mcu_device::rtr_ipm() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108512,7 +108513,7 @@ void m68000_mcu_device::jsr_dais_ipm() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109028,7 +109029,7 @@ void m68000_mcu_device::jsr_dpci_ipm() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -109305,7 +109306,7 @@ void m68000_mcu_device::jmp_dais_ipm() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109620,7 +109621,7 @@ void m68000_mcu_device::jmp_dpci_ipm() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -109714,7 +109715,7 @@ void m68000_mcu_device::addq_b_imm3_ds_ipm() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -109760,7 +109761,7 @@ void m68000_mcu_device::addq_b_imm3_ais_ipm() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -109786,7 +109787,7 @@ void m68000_mcu_device::addq_b_imm3_ais_ipm() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109852,7 +109853,7 @@ void m68000_mcu_device::addq_b_imm3_aips_ipm() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109876,7 +109877,7 @@ void m68000_mcu_device::addq_b_imm3_aips_ipm() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109944,7 +109945,7 @@ void m68000_mcu_device::addq_b_imm3_pais_ipm() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109968,7 +109969,7 @@ void m68000_mcu_device::addq_b_imm3_pais_ipm() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110053,7 +110054,7 @@ void m68000_mcu_device::addq_b_imm3_das_ipm() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110079,7 +110080,7 @@ void m68000_mcu_device::addq_b_imm3_das_ipm() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110137,7 +110138,7 @@ void m68000_mcu_device::addq_b_imm3_dais_ipm() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110205,7 +110206,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110231,7 +110232,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110318,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_ipm() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -110341,7 +110342,7 @@ void m68000_mcu_device::addq_b_imm3_adr16_ipm() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110451,7 +110452,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_ipm() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -110475,7 +110476,7 @@ void m68000_mcu_device::addq_b_imm3_adr32_ipm() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110537,7 +110538,7 @@ void m68000_mcu_device::addq_w_imm3_ds_ipm() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -110585,7 +110586,7 @@ void m68000_mcu_device::addq_w_imm3_as_ipm() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -110611,7 +110612,7 @@ void m68000_mcu_device::addq_w_imm3_as_ipm() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -110637,7 +110638,7 @@ void m68000_mcu_device::addq_w_imm3_ais_ipm() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110667,7 +110668,7 @@ void m68000_mcu_device::addq_w_imm3_ais_ipm() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110739,7 +110740,7 @@ void m68000_mcu_device::addq_w_imm3_aips_ipm() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110767,7 +110768,7 @@ void m68000_mcu_device::addq_w_imm3_aips_ipm() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110841,7 +110842,7 @@ void m68000_mcu_device::addq_w_imm3_pais_ipm() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110869,7 +110870,7 @@ void m68000_mcu_device::addq_w_imm3_pais_ipm() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110960,7 +110961,7 @@ void m68000_mcu_device::addq_w_imm3_das_ipm() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -110990,7 +110991,7 @@ void m68000_mcu_device::addq_w_imm3_das_ipm() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111054,7 +111055,7 @@ void m68000_mcu_device::addq_w_imm3_dais_ipm() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111122,7 +111123,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -111152,7 +111153,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111244,7 +111245,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_ipm() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -111272,7 +111273,7 @@ void m68000_mcu_device::addq_w_imm3_adr16_ipm() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111388,7 +111389,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_ipm() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111416,7 +111417,7 @@ void m68000_mcu_device::addq_w_imm3_adr32_ipm() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111484,7 +111485,7 @@ void m68000_mcu_device::addq_l_imm3_ds_ipm() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -111511,7 +111512,7 @@ void m68000_mcu_device::addq_l_imm3_ds_ipm() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -111540,7 +111541,7 @@ void m68000_mcu_device::addq_l_imm3_as_ipm() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -111566,7 +111567,7 @@ void m68000_mcu_device::addq_l_imm3_as_ipm() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -111592,7 +111593,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ipm() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111646,7 +111647,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ipm() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111674,7 +111675,7 @@ void m68000_mcu_device::addq_l_imm3_ais_ipm() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111738,7 +111739,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ipm() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -111795,7 +111796,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ipm() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111823,7 +111824,7 @@ void m68000_mcu_device::addq_l_imm3_aips_ipm() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -111886,7 +111887,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ipm() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -111945,7 +111946,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ipm() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -111973,7 +111974,7 @@ void m68000_mcu_device::addq_l_imm3_pais_ipm() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112061,7 +112062,7 @@ void m68000_mcu_device::addq_l_imm3_das_ipm() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112115,7 +112116,7 @@ void m68000_mcu_device::addq_l_imm3_das_ipm() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112143,7 +112144,7 @@ void m68000_mcu_device::addq_l_imm3_das_ipm() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112205,7 +112206,7 @@ void m68000_mcu_device::addq_l_imm3_dais_ipm() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -112272,7 +112273,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112326,7 +112327,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112354,7 +112355,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112444,7 +112445,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ipm() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -112498,7 +112499,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ipm() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112526,7 +112527,7 @@ void m68000_mcu_device::addq_l_imm3_adr16_ipm() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112640,7 +112641,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ipm() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -112694,7 +112695,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ipm() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -112722,7 +112723,7 @@ void m68000_mcu_device::addq_l_imm3_adr32_ipm() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -112788,7 +112789,7 @@ void m68000_mcu_device::st_ds_ipm() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -112800,7 +112801,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112831,7 +112832,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -112859,7 +112860,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -112878,7 +112879,7 @@ void m68000_mcu_device::dbt_ds_rel16_ipm() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -112890,13 +112891,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -112927,7 +112928,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -112935,7 +112936,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -112962,11 +112963,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113000,13 +113001,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113040,7 +113041,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113077,11 +113078,11 @@ void m68000_mcu_device::st_ais_ipm() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113103,7 +113104,7 @@ void m68000_mcu_device::st_ais_ipm() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113113,7 +113114,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113140,7 +113141,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113171,7 +113172,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113205,12 +113206,12 @@ void m68000_mcu_device::st_aips_ipm() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113233,7 +113234,7 @@ void m68000_mcu_device::st_aips_ipm() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113243,7 +113244,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113270,7 +113271,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113301,7 +113302,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113334,7 +113335,7 @@ void m68000_mcu_device::st_pais_ipm() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -113342,7 +113343,7 @@ void m68000_mcu_device::st_pais_ipm() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -113365,7 +113366,7 @@ void m68000_mcu_device::st_pais_ipm() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113375,7 +113376,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113402,7 +113403,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -113433,7 +113434,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113464,7 +113465,7 @@ void m68000_mcu_device::st_das_ipm() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113490,11 +113491,11 @@ void m68000_mcu_device::st_das_ipm() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113516,7 +113517,7 @@ void m68000_mcu_device::st_das_ipm() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113526,7 +113527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113553,7 +113554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113584,7 +113585,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113613,14 +113614,14 @@ void m68000_mcu_device::st_dais_ipm() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -113628,7 +113629,7 @@ void m68000_mcu_device::st_dais_ipm() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113655,7 +113656,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113684,11 +113685,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -113710,7 +113711,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113720,7 +113721,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113747,7 +113748,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113778,7 +113779,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113811,7 +113812,7 @@ void m68000_mcu_device::st_adr16_ipm() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -113837,7 +113838,7 @@ void m68000_mcu_device::st_adr16_ipm() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -113860,7 +113861,7 @@ void m68000_mcu_device::st_adr16_ipm() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -113870,7 +113871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113897,7 +113898,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -113928,7 +113929,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -113959,7 +113960,7 @@ void m68000_mcu_device::st_adr32_ipm() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -113986,7 +113987,7 @@ void m68000_mcu_device::st_adr32_ipm() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -114012,7 +114013,7 @@ void m68000_mcu_device::st_adr32_ipm() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114035,7 +114036,7 @@ void m68000_mcu_device::st_adr32_ipm() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -114045,7 +114046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -114072,7 +114073,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -114103,7 +114104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -114136,7 +114137,7 @@ void m68000_mcu_device::subq_b_imm3_ds_ipm() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -114182,7 +114183,7 @@ void m68000_mcu_device::subq_b_imm3_ais_ipm() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114208,7 +114209,7 @@ void m68000_mcu_device::subq_b_imm3_ais_ipm() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114274,7 +114275,7 @@ void m68000_mcu_device::subq_b_imm3_aips_ipm() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114298,7 +114299,7 @@ void m68000_mcu_device::subq_b_imm3_aips_ipm() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114366,7 +114367,7 @@ void m68000_mcu_device::subq_b_imm3_pais_ipm() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114390,7 +114391,7 @@ void m68000_mcu_device::subq_b_imm3_pais_ipm() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114475,7 +114476,7 @@ void m68000_mcu_device::subq_b_imm3_das_ipm() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114501,7 +114502,7 @@ void m68000_mcu_device::subq_b_imm3_das_ipm() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114559,7 +114560,7 @@ void m68000_mcu_device::subq_b_imm3_dais_ipm() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -114627,7 +114628,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -114653,7 +114654,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114739,7 +114740,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_ipm() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -114763,7 +114764,7 @@ void m68000_mcu_device::subq_b_imm3_adr16_ipm() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114873,7 +114874,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_ipm() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114897,7 +114898,7 @@ void m68000_mcu_device::subq_b_imm3_adr32_ipm() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114959,7 +114960,7 @@ void m68000_mcu_device::subq_w_imm3_ds_ipm() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -115007,7 +115008,7 @@ void m68000_mcu_device::subq_w_imm3_as_ipm() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115033,7 +115034,7 @@ void m68000_mcu_device::subq_w_imm3_as_ipm() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -115059,7 +115060,7 @@ void m68000_mcu_device::subq_w_imm3_ais_ipm() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115089,7 +115090,7 @@ void m68000_mcu_device::subq_w_imm3_ais_ipm() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115161,7 +115162,7 @@ void m68000_mcu_device::subq_w_imm3_aips_ipm() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115189,7 +115190,7 @@ void m68000_mcu_device::subq_w_imm3_aips_ipm() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115263,7 +115264,7 @@ void m68000_mcu_device::subq_w_imm3_pais_ipm() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115291,7 +115292,7 @@ void m68000_mcu_device::subq_w_imm3_pais_ipm() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115382,7 +115383,7 @@ void m68000_mcu_device::subq_w_imm3_das_ipm() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115412,7 +115413,7 @@ void m68000_mcu_device::subq_w_imm3_das_ipm() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115476,7 +115477,7 @@ void m68000_mcu_device::subq_w_imm3_dais_ipm() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -115544,7 +115545,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -115574,7 +115575,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115666,7 +115667,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_ipm() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -115694,7 +115695,7 @@ void m68000_mcu_device::subq_w_imm3_adr16_ipm() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115810,7 +115811,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_ipm() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -115838,7 +115839,7 @@ void m68000_mcu_device::subq_w_imm3_adr32_ipm() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115906,7 +115907,7 @@ void m68000_mcu_device::subq_l_imm3_ds_ipm() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -115933,7 +115934,7 @@ void m68000_mcu_device::subq_l_imm3_ds_ipm() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -115962,7 +115963,7 @@ void m68000_mcu_device::subq_l_imm3_as_ipm() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -115988,7 +115989,7 @@ void m68000_mcu_device::subq_l_imm3_as_ipm() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -116014,7 +116015,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ipm() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116068,7 +116069,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ipm() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116096,7 +116097,7 @@ void m68000_mcu_device::subq_l_imm3_ais_ipm() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116160,7 +116161,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ipm() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116217,7 +116218,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ipm() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116245,7 +116246,7 @@ void m68000_mcu_device::subq_l_imm3_aips_ipm() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116308,7 +116309,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ipm() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -116367,7 +116368,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ipm() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116395,7 +116396,7 @@ void m68000_mcu_device::subq_l_imm3_pais_ipm() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116483,7 +116484,7 @@ void m68000_mcu_device::subq_l_imm3_das_ipm() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116537,7 +116538,7 @@ void m68000_mcu_device::subq_l_imm3_das_ipm() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116565,7 +116566,7 @@ void m68000_mcu_device::subq_l_imm3_das_ipm() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116627,7 +116628,7 @@ void m68000_mcu_device::subq_l_imm3_dais_ipm() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -116694,7 +116695,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116748,7 +116749,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116776,7 +116777,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -116866,7 +116867,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ipm() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -116920,7 +116921,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ipm() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116948,7 +116949,7 @@ void m68000_mcu_device::subq_l_imm3_adr16_ipm() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117062,7 +117063,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ipm() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117116,7 +117117,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ipm() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117144,7 +117145,7 @@ void m68000_mcu_device::subq_l_imm3_adr32_ipm() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -117210,7 +117211,7 @@ void m68000_mcu_device::sf_ds_ipm() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -117222,7 +117223,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117253,7 +117254,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -117281,7 +117282,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -117300,7 +117301,7 @@ void m68000_mcu_device::dbra_ds_rel16_ipm() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -117312,13 +117313,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117349,7 +117350,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -117357,7 +117358,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117384,11 +117385,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117422,13 +117423,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117462,7 +117463,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117499,11 +117500,11 @@ void m68000_mcu_device::sf_ais_ipm() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117525,7 +117526,7 @@ void m68000_mcu_device::sf_ais_ipm() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117535,7 +117536,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117562,7 +117563,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117593,7 +117594,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117627,12 +117628,12 @@ void m68000_mcu_device::sf_aips_ipm() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117655,7 +117656,7 @@ void m68000_mcu_device::sf_aips_ipm() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117665,7 +117666,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117692,7 +117693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117723,7 +117724,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117756,7 +117757,7 @@ void m68000_mcu_device::sf_pais_ipm() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117764,7 +117765,7 @@ void m68000_mcu_device::sf_pais_ipm() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -117787,7 +117788,7 @@ void m68000_mcu_device::sf_pais_ipm() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117797,7 +117798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117824,7 +117825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -117855,7 +117856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -117886,7 +117887,7 @@ void m68000_mcu_device::sf_das_ipm() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117912,11 +117913,11 @@ void m68000_mcu_device::sf_das_ipm() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -117938,7 +117939,7 @@ void m68000_mcu_device::sf_das_ipm() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -117948,7 +117949,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -117975,7 +117976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118006,7 +118007,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118035,14 +118036,14 @@ void m68000_mcu_device::sf_dais_ipm() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -118050,7 +118051,7 @@ void m68000_mcu_device::sf_dais_ipm() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118077,7 +118078,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118106,11 +118107,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118132,7 +118133,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118142,7 +118143,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118169,7 +118170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118200,7 +118201,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118233,7 +118234,7 @@ void m68000_mcu_device::sf_adr16_ipm() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118259,7 +118260,7 @@ void m68000_mcu_device::sf_adr16_ipm() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -118282,7 +118283,7 @@ void m68000_mcu_device::sf_adr16_ipm() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118292,7 +118293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118319,7 +118320,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -118350,7 +118351,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118381,7 +118382,7 @@ void m68000_mcu_device::sf_adr32_ipm() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118408,7 +118409,7 @@ void m68000_mcu_device::sf_adr32_ipm() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118434,7 +118435,7 @@ void m68000_mcu_device::sf_adr32_ipm() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118457,7 +118458,7 @@ void m68000_mcu_device::sf_adr32_ipm() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118467,7 +118468,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118494,7 +118495,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -118525,7 +118526,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118558,7 +118559,7 @@ void m68000_mcu_device::shi_ds_ipm() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -118570,7 +118571,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118601,7 +118602,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -118629,7 +118630,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -118648,7 +118649,7 @@ void m68000_mcu_device::dbhi_ds_rel16_ipm() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -118660,13 +118661,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -118697,7 +118698,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -118705,7 +118706,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118732,11 +118733,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118770,13 +118771,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118810,7 +118811,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118847,11 +118848,11 @@ void m68000_mcu_device::shi_ais_ipm() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -118873,7 +118874,7 @@ void m68000_mcu_device::shi_ais_ipm() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -118883,7 +118884,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -118910,7 +118911,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -118941,7 +118942,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -118975,12 +118976,12 @@ void m68000_mcu_device::shi_aips_ipm() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119003,7 +119004,7 @@ void m68000_mcu_device::shi_aips_ipm() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119013,7 +119014,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119040,7 +119041,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119071,7 +119072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119104,7 +119105,7 @@ void m68000_mcu_device::shi_pais_ipm() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119112,7 +119113,7 @@ void m68000_mcu_device::shi_pais_ipm() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119135,7 +119136,7 @@ void m68000_mcu_device::shi_pais_ipm() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119145,7 +119146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119172,7 +119173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -119203,7 +119204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119234,7 +119235,7 @@ void m68000_mcu_device::shi_das_ipm() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119260,11 +119261,11 @@ void m68000_mcu_device::shi_das_ipm() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119286,7 +119287,7 @@ void m68000_mcu_device::shi_das_ipm() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119296,7 +119297,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119323,7 +119324,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119354,7 +119355,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119383,14 +119384,14 @@ void m68000_mcu_device::shi_dais_ipm() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119398,7 +119399,7 @@ void m68000_mcu_device::shi_dais_ipm() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119425,7 +119426,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119454,11 +119455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -119480,7 +119481,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119490,7 +119491,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119517,7 +119518,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119548,7 +119549,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119581,7 +119582,7 @@ void m68000_mcu_device::shi_adr16_ipm() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -119607,7 +119608,7 @@ void m68000_mcu_device::shi_adr16_ipm() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -119630,7 +119631,7 @@ void m68000_mcu_device::shi_adr16_ipm() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119640,7 +119641,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119667,7 +119668,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -119698,7 +119699,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119729,7 +119730,7 @@ void m68000_mcu_device::shi_adr32_ipm() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119756,7 +119757,7 @@ void m68000_mcu_device::shi_adr32_ipm() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119782,7 +119783,7 @@ void m68000_mcu_device::shi_adr32_ipm() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -119805,7 +119806,7 @@ void m68000_mcu_device::shi_adr32_ipm() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -119815,7 +119816,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119842,7 +119843,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -119873,7 +119874,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -119906,7 +119907,7 @@ void m68000_mcu_device::sls_ds_ipm() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -119918,7 +119919,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -119949,7 +119950,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -119977,7 +119978,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -119996,7 +119997,7 @@ void m68000_mcu_device::dbls_ds_rel16_ipm() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -120008,13 +120009,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120045,7 +120046,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -120053,7 +120054,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120080,11 +120081,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120118,13 +120119,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120158,7 +120159,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120195,11 +120196,11 @@ void m68000_mcu_device::sls_ais_ipm() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120221,7 +120222,7 @@ void m68000_mcu_device::sls_ais_ipm() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120231,7 +120232,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120258,7 +120259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120289,7 +120290,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120323,12 +120324,12 @@ void m68000_mcu_device::sls_aips_ipm() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120351,7 +120352,7 @@ void m68000_mcu_device::sls_aips_ipm() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120361,7 +120362,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120388,7 +120389,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120419,7 +120420,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120452,7 +120453,7 @@ void m68000_mcu_device::sls_pais_ipm() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -120460,7 +120461,7 @@ void m68000_mcu_device::sls_pais_ipm() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120483,7 +120484,7 @@ void m68000_mcu_device::sls_pais_ipm() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120493,7 +120494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120520,7 +120521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -120551,7 +120552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120582,7 +120583,7 @@ void m68000_mcu_device::sls_das_ipm() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120608,11 +120609,11 @@ void m68000_mcu_device::sls_das_ipm() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120634,7 +120635,7 @@ void m68000_mcu_device::sls_das_ipm() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120644,7 +120645,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120671,7 +120672,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120702,7 +120703,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120731,14 +120732,14 @@ void m68000_mcu_device::sls_dais_ipm() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -120746,7 +120747,7 @@ void m68000_mcu_device::sls_dais_ipm() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120773,7 +120774,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120802,11 +120803,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -120828,7 +120829,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120838,7 +120839,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -120865,7 +120866,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -120896,7 +120897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -120929,7 +120930,7 @@ void m68000_mcu_device::sls_adr16_ipm() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -120955,7 +120956,7 @@ void m68000_mcu_device::sls_adr16_ipm() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -120978,7 +120979,7 @@ void m68000_mcu_device::sls_adr16_ipm() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -120988,7 +120989,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121015,7 +121016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -121046,7 +121047,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121077,7 +121078,7 @@ void m68000_mcu_device::sls_adr32_ipm() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121104,7 +121105,7 @@ void m68000_mcu_device::sls_adr32_ipm() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121130,7 +121131,7 @@ void m68000_mcu_device::sls_adr32_ipm() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121153,7 +121154,7 @@ void m68000_mcu_device::sls_adr32_ipm() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121163,7 +121164,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121190,7 +121191,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -121221,7 +121222,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121254,7 +121255,7 @@ void m68000_mcu_device::scc_ds_ipm() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -121266,7 +121267,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121297,7 +121298,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -121325,7 +121326,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -121344,7 +121345,7 @@ void m68000_mcu_device::dbcc_ds_rel16_ipm() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -121356,13 +121357,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -121393,7 +121394,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -121401,7 +121402,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121428,11 +121429,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121466,13 +121467,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121506,7 +121507,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121543,11 +121544,11 @@ void m68000_mcu_device::scc_ais_ipm() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121569,7 +121570,7 @@ void m68000_mcu_device::scc_ais_ipm() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121579,7 +121580,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121606,7 +121607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121637,7 +121638,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121671,12 +121672,12 @@ void m68000_mcu_device::scc_aips_ipm() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121699,7 +121700,7 @@ void m68000_mcu_device::scc_aips_ipm() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121709,7 +121710,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121736,7 +121737,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121767,7 +121768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121800,7 +121801,7 @@ void m68000_mcu_device::scc_pais_ipm() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -121808,7 +121809,7 @@ void m68000_mcu_device::scc_pais_ipm() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -121831,7 +121832,7 @@ void m68000_mcu_device::scc_pais_ipm() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121841,7 +121842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121868,7 +121869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -121899,7 +121900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -121930,7 +121931,7 @@ void m68000_mcu_device::scc_das_ipm() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -121956,11 +121957,11 @@ void m68000_mcu_device::scc_das_ipm() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -121982,7 +121983,7 @@ void m68000_mcu_device::scc_das_ipm() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -121992,7 +121993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122019,7 +122020,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122050,7 +122051,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122079,14 +122080,14 @@ void m68000_mcu_device::scc_dais_ipm() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -122094,7 +122095,7 @@ void m68000_mcu_device::scc_dais_ipm() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122121,7 +122122,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122150,11 +122151,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122176,7 +122177,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122186,7 +122187,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122213,7 +122214,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122244,7 +122245,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122277,7 +122278,7 @@ void m68000_mcu_device::scc_adr16_ipm() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122303,7 +122304,7 @@ void m68000_mcu_device::scc_adr16_ipm() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -122326,7 +122327,7 @@ void m68000_mcu_device::scc_adr16_ipm() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122336,7 +122337,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122363,7 +122364,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -122394,7 +122395,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122425,7 +122426,7 @@ void m68000_mcu_device::scc_adr32_ipm() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122452,7 +122453,7 @@ void m68000_mcu_device::scc_adr32_ipm() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122478,7 +122479,7 @@ void m68000_mcu_device::scc_adr32_ipm() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -122501,7 +122502,7 @@ void m68000_mcu_device::scc_adr32_ipm() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122511,7 +122512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122538,7 +122539,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -122569,7 +122570,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -122602,7 +122603,7 @@ void m68000_mcu_device::scs_ds_ipm() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -122614,7 +122615,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122645,7 +122646,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -122673,7 +122674,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -122692,7 +122693,7 @@ void m68000_mcu_device::dbcs_ds_rel16_ipm() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -122704,13 +122705,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -122741,7 +122742,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -122749,7 +122750,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122776,11 +122777,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122814,13 +122815,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122854,7 +122855,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122891,11 +122892,11 @@ void m68000_mcu_device::scs_ais_ipm() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -122917,7 +122918,7 @@ void m68000_mcu_device::scs_ais_ipm() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -122927,7 +122928,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -122954,7 +122955,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -122985,7 +122986,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123019,12 +123020,12 @@ void m68000_mcu_device::scs_aips_ipm() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123047,7 +123048,7 @@ void m68000_mcu_device::scs_aips_ipm() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123057,7 +123058,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123084,7 +123085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123115,7 +123116,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123148,7 +123149,7 @@ void m68000_mcu_device::scs_pais_ipm() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -123156,7 +123157,7 @@ void m68000_mcu_device::scs_pais_ipm() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -123179,7 +123180,7 @@ void m68000_mcu_device::scs_pais_ipm() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123189,7 +123190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123216,7 +123217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -123247,7 +123248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123278,7 +123279,7 @@ void m68000_mcu_device::scs_das_ipm() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123304,11 +123305,11 @@ void m68000_mcu_device::scs_das_ipm() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123330,7 +123331,7 @@ void m68000_mcu_device::scs_das_ipm() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123340,7 +123341,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123367,7 +123368,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123398,7 +123399,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123427,14 +123428,14 @@ void m68000_mcu_device::scs_dais_ipm() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -123442,7 +123443,7 @@ void m68000_mcu_device::scs_dais_ipm() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123469,7 +123470,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123498,11 +123499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -123524,7 +123525,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123534,7 +123535,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123561,7 +123562,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123592,7 +123593,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123625,7 +123626,7 @@ void m68000_mcu_device::scs_adr16_ipm() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -123651,7 +123652,7 @@ void m68000_mcu_device::scs_adr16_ipm() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -123674,7 +123675,7 @@ void m68000_mcu_device::scs_adr16_ipm() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123684,7 +123685,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123711,7 +123712,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -123742,7 +123743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123773,7 +123774,7 @@ void m68000_mcu_device::scs_adr32_ipm() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123800,7 +123801,7 @@ void m68000_mcu_device::scs_adr32_ipm() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -123826,7 +123827,7 @@ void m68000_mcu_device::scs_adr32_ipm() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123849,7 +123850,7 @@ void m68000_mcu_device::scs_adr32_ipm() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -123859,7 +123860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123886,7 +123887,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -123917,7 +123918,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -123950,7 +123951,7 @@ void m68000_mcu_device::sne_ds_ipm() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -123962,7 +123963,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -123993,7 +123994,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -124021,7 +124022,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -124040,7 +124041,7 @@ void m68000_mcu_device::dbne_ds_rel16_ipm() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -124052,13 +124053,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124089,7 +124090,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -124097,7 +124098,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124124,11 +124125,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124162,13 +124163,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124202,7 +124203,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124239,11 +124240,11 @@ void m68000_mcu_device::sne_ais_ipm() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124265,7 +124266,7 @@ void m68000_mcu_device::sne_ais_ipm() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124275,7 +124276,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124302,7 +124303,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124333,7 +124334,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124367,12 +124368,12 @@ void m68000_mcu_device::sne_aips_ipm() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124395,7 +124396,7 @@ void m68000_mcu_device::sne_aips_ipm() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124405,7 +124406,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124432,7 +124433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124463,7 +124464,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124496,7 +124497,7 @@ void m68000_mcu_device::sne_pais_ipm() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -124504,7 +124505,7 @@ void m68000_mcu_device::sne_pais_ipm() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124527,7 +124528,7 @@ void m68000_mcu_device::sne_pais_ipm() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124537,7 +124538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124564,7 +124565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -124595,7 +124596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124626,7 +124627,7 @@ void m68000_mcu_device::sne_das_ipm() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124652,11 +124653,11 @@ void m68000_mcu_device::sne_das_ipm() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124678,7 +124679,7 @@ void m68000_mcu_device::sne_das_ipm() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124688,7 +124689,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124715,7 +124716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124746,7 +124747,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124775,14 +124776,14 @@ void m68000_mcu_device::sne_dais_ipm() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -124790,7 +124791,7 @@ void m68000_mcu_device::sne_dais_ipm() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124817,7 +124818,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124846,11 +124847,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -124872,7 +124873,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -124882,7 +124883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -124909,7 +124910,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -124940,7 +124941,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -124973,7 +124974,7 @@ void m68000_mcu_device::sne_adr16_ipm() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -124999,7 +125000,7 @@ void m68000_mcu_device::sne_adr16_ipm() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -125022,7 +125023,7 @@ void m68000_mcu_device::sne_adr16_ipm() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125032,7 +125033,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125059,7 +125060,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -125090,7 +125091,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125121,7 +125122,7 @@ void m68000_mcu_device::sne_adr32_ipm() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125148,7 +125149,7 @@ void m68000_mcu_device::sne_adr32_ipm() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125174,7 +125175,7 @@ void m68000_mcu_device::sne_adr32_ipm() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125197,7 +125198,7 @@ void m68000_mcu_device::sne_adr32_ipm() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125207,7 +125208,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125234,7 +125235,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -125265,7 +125266,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125298,7 +125299,7 @@ void m68000_mcu_device::seq_ds_ipm() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -125310,7 +125311,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125341,7 +125342,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -125369,7 +125370,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -125388,7 +125389,7 @@ void m68000_mcu_device::dbeq_ds_rel16_ipm() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -125400,13 +125401,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -125437,7 +125438,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -125445,7 +125446,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125472,11 +125473,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125510,13 +125511,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125550,7 +125551,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125587,11 +125588,11 @@ void m68000_mcu_device::seq_ais_ipm() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -125613,7 +125614,7 @@ void m68000_mcu_device::seq_ais_ipm() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125623,7 +125624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125650,7 +125651,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125681,7 +125682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125715,12 +125716,12 @@ void m68000_mcu_device::seq_aips_ipm() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125743,7 +125744,7 @@ void m68000_mcu_device::seq_aips_ipm() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125753,7 +125754,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125780,7 +125781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125811,7 +125812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125844,7 +125845,7 @@ void m68000_mcu_device::seq_pais_ipm() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -125852,7 +125853,7 @@ void m68000_mcu_device::seq_pais_ipm() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125875,7 +125876,7 @@ void m68000_mcu_device::seq_pais_ipm() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -125885,7 +125886,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -125912,7 +125913,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -125943,7 +125944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -125974,7 +125975,7 @@ void m68000_mcu_device::seq_das_ipm() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126000,11 +126001,11 @@ void m68000_mcu_device::seq_das_ipm() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126026,7 +126027,7 @@ void m68000_mcu_device::seq_das_ipm() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126036,7 +126037,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126063,7 +126064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126094,7 +126095,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126123,14 +126124,14 @@ void m68000_mcu_device::seq_dais_ipm() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -126138,7 +126139,7 @@ void m68000_mcu_device::seq_dais_ipm() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126165,7 +126166,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126194,11 +126195,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126220,7 +126221,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126230,7 +126231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126257,7 +126258,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126288,7 +126289,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126321,7 +126322,7 @@ void m68000_mcu_device::seq_adr16_ipm() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126347,7 +126348,7 @@ void m68000_mcu_device::seq_adr16_ipm() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -126370,7 +126371,7 @@ void m68000_mcu_device::seq_adr16_ipm() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126380,7 +126381,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126407,7 +126408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -126438,7 +126439,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126469,7 +126470,7 @@ void m68000_mcu_device::seq_adr32_ipm() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126496,7 +126497,7 @@ void m68000_mcu_device::seq_adr32_ipm() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126522,7 +126523,7 @@ void m68000_mcu_device::seq_adr32_ipm() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -126545,7 +126546,7 @@ void m68000_mcu_device::seq_adr32_ipm() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126555,7 +126556,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126582,7 +126583,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -126613,7 +126614,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -126646,7 +126647,7 @@ void m68000_mcu_device::svc_ds_ipm() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -126658,7 +126659,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126689,7 +126690,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -126717,7 +126718,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -126736,7 +126737,7 @@ void m68000_mcu_device::dbvc_ds_rel16_ipm() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -126748,13 +126749,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -126785,7 +126786,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -126793,7 +126794,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126820,11 +126821,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126858,13 +126859,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126898,7 +126899,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126935,11 +126936,11 @@ void m68000_mcu_device::svc_ais_ipm() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -126961,7 +126962,7 @@ void m68000_mcu_device::svc_ais_ipm() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -126971,7 +126972,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -126998,7 +126999,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127029,7 +127030,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127063,12 +127064,12 @@ void m68000_mcu_device::svc_aips_ipm() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127091,7 +127092,7 @@ void m68000_mcu_device::svc_aips_ipm() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127101,7 +127102,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127128,7 +127129,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127159,7 +127160,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127192,7 +127193,7 @@ void m68000_mcu_device::svc_pais_ipm() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -127200,7 +127201,7 @@ void m68000_mcu_device::svc_pais_ipm() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -127223,7 +127224,7 @@ void m68000_mcu_device::svc_pais_ipm() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127233,7 +127234,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127260,7 +127261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -127291,7 +127292,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127322,7 +127323,7 @@ void m68000_mcu_device::svc_das_ipm() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127348,11 +127349,11 @@ void m68000_mcu_device::svc_das_ipm() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127374,7 +127375,7 @@ void m68000_mcu_device::svc_das_ipm() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127384,7 +127385,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127411,7 +127412,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127442,7 +127443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127471,14 +127472,14 @@ void m68000_mcu_device::svc_dais_ipm() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -127486,7 +127487,7 @@ void m68000_mcu_device::svc_dais_ipm() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127513,7 +127514,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127542,11 +127543,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -127568,7 +127569,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127578,7 +127579,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127605,7 +127606,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127636,7 +127637,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127669,7 +127670,7 @@ void m68000_mcu_device::svc_adr16_ipm() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -127695,7 +127696,7 @@ void m68000_mcu_device::svc_adr16_ipm() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -127718,7 +127719,7 @@ void m68000_mcu_device::svc_adr16_ipm() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127728,7 +127729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127755,7 +127756,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -127786,7 +127787,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127817,7 +127818,7 @@ void m68000_mcu_device::svc_adr32_ipm() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127844,7 +127845,7 @@ void m68000_mcu_device::svc_adr32_ipm() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -127870,7 +127871,7 @@ void m68000_mcu_device::svc_adr32_ipm() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127893,7 +127894,7 @@ void m68000_mcu_device::svc_adr32_ipm() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -127903,7 +127904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -127930,7 +127931,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -127961,7 +127962,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -127994,7 +127995,7 @@ void m68000_mcu_device::svs_ds_ipm() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -128006,7 +128007,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128037,7 +128038,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -128065,7 +128066,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -128084,7 +128085,7 @@ void m68000_mcu_device::dbvs_ds_rel16_ipm() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -128096,13 +128097,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -128133,7 +128134,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -128141,7 +128142,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128168,11 +128169,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128206,13 +128207,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128246,7 +128247,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128283,11 +128284,11 @@ void m68000_mcu_device::svs_ais_ipm() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128309,7 +128310,7 @@ void m68000_mcu_device::svs_ais_ipm() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128319,7 +128320,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128346,7 +128347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128377,7 +128378,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128411,12 +128412,12 @@ void m68000_mcu_device::svs_aips_ipm() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128439,7 +128440,7 @@ void m68000_mcu_device::svs_aips_ipm() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128449,7 +128450,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128476,7 +128477,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128507,7 +128508,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128540,7 +128541,7 @@ void m68000_mcu_device::svs_pais_ipm() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -128548,7 +128549,7 @@ void m68000_mcu_device::svs_pais_ipm() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128571,7 +128572,7 @@ void m68000_mcu_device::svs_pais_ipm() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128581,7 +128582,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128608,7 +128609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -128639,7 +128640,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128670,7 +128671,7 @@ void m68000_mcu_device::svs_das_ipm() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128696,11 +128697,11 @@ void m68000_mcu_device::svs_das_ipm() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128722,7 +128723,7 @@ void m68000_mcu_device::svs_das_ipm() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128732,7 +128733,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128759,7 +128760,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128790,7 +128791,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -128819,14 +128820,14 @@ void m68000_mcu_device::svs_dais_ipm() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -128834,7 +128835,7 @@ void m68000_mcu_device::svs_dais_ipm() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128861,7 +128862,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128890,11 +128891,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -128916,7 +128917,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -128926,7 +128927,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -128953,7 +128954,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -128984,7 +128985,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129017,7 +129018,7 @@ void m68000_mcu_device::svs_adr16_ipm() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129043,7 +129044,7 @@ void m68000_mcu_device::svs_adr16_ipm() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -129066,7 +129067,7 @@ void m68000_mcu_device::svs_adr16_ipm() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129076,7 +129077,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129103,7 +129104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -129134,7 +129135,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129165,7 +129166,7 @@ void m68000_mcu_device::svs_adr32_ipm() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129192,7 +129193,7 @@ void m68000_mcu_device::svs_adr32_ipm() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129218,7 +129219,7 @@ void m68000_mcu_device::svs_adr32_ipm() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129241,7 +129242,7 @@ void m68000_mcu_device::svs_adr32_ipm() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129251,7 +129252,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129278,7 +129279,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -129309,7 +129310,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129342,7 +129343,7 @@ void m68000_mcu_device::spl_ds_ipm() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -129354,7 +129355,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129385,7 +129386,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -129413,7 +129414,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -129432,7 +129433,7 @@ void m68000_mcu_device::dbpl_ds_rel16_ipm() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -129444,13 +129445,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -129481,7 +129482,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -129489,7 +129490,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129516,11 +129517,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129554,13 +129555,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129594,7 +129595,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129631,11 +129632,11 @@ void m68000_mcu_device::spl_ais_ipm() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -129657,7 +129658,7 @@ void m68000_mcu_device::spl_ais_ipm() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129667,7 +129668,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129694,7 +129695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129725,7 +129726,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129759,12 +129760,12 @@ void m68000_mcu_device::spl_aips_ipm() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129787,7 +129788,7 @@ void m68000_mcu_device::spl_aips_ipm() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129797,7 +129798,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129824,7 +129825,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129855,7 +129856,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -129888,7 +129889,7 @@ void m68000_mcu_device::spl_pais_ipm() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -129896,7 +129897,7 @@ void m68000_mcu_device::spl_pais_ipm() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -129919,7 +129920,7 @@ void m68000_mcu_device::spl_pais_ipm() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -129929,7 +129930,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -129956,7 +129957,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -129987,7 +129988,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130018,7 +130019,7 @@ void m68000_mcu_device::spl_das_ipm() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130044,11 +130045,11 @@ void m68000_mcu_device::spl_das_ipm() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130070,7 +130071,7 @@ void m68000_mcu_device::spl_das_ipm() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130080,7 +130081,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130107,7 +130108,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130138,7 +130139,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130167,14 +130168,14 @@ void m68000_mcu_device::spl_dais_ipm() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -130182,7 +130183,7 @@ void m68000_mcu_device::spl_dais_ipm() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130209,7 +130210,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130238,11 +130239,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -130264,7 +130265,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130274,7 +130275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130301,7 +130302,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130332,7 +130333,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130365,7 +130366,7 @@ void m68000_mcu_device::spl_adr16_ipm() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130391,7 +130392,7 @@ void m68000_mcu_device::spl_adr16_ipm() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -130414,7 +130415,7 @@ void m68000_mcu_device::spl_adr16_ipm() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130424,7 +130425,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130451,7 +130452,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -130482,7 +130483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130513,7 +130514,7 @@ void m68000_mcu_device::spl_adr32_ipm() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130540,7 +130541,7 @@ void m68000_mcu_device::spl_adr32_ipm() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130566,7 +130567,7 @@ void m68000_mcu_device::spl_adr32_ipm() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130589,7 +130590,7 @@ void m68000_mcu_device::spl_adr32_ipm() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130599,7 +130600,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130626,7 +130627,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -130657,7 +130658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -130690,7 +130691,7 @@ void m68000_mcu_device::smi_ds_ipm() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130702,7 +130703,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130733,7 +130734,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -130761,7 +130762,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130780,7 +130781,7 @@ void m68000_mcu_device::dbmi_ds_rel16_ipm() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130792,13 +130793,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -130829,7 +130830,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130837,7 +130838,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130864,11 +130865,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130902,13 +130903,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130942,7 +130943,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -130979,11 +130980,11 @@ void m68000_mcu_device::smi_ais_ipm() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131005,7 +131006,7 @@ void m68000_mcu_device::smi_ais_ipm() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131015,7 +131016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131042,7 +131043,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131073,7 +131074,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131107,12 +131108,12 @@ void m68000_mcu_device::smi_aips_ipm() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131135,7 +131136,7 @@ void m68000_mcu_device::smi_aips_ipm() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131145,7 +131146,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131172,7 +131173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131203,7 +131204,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131236,7 +131237,7 @@ void m68000_mcu_device::smi_pais_ipm() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131244,7 +131245,7 @@ void m68000_mcu_device::smi_pais_ipm() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -131267,7 +131268,7 @@ void m68000_mcu_device::smi_pais_ipm() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131277,7 +131278,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131304,7 +131305,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -131335,7 +131336,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131366,7 +131367,7 @@ void m68000_mcu_device::smi_das_ipm() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131392,11 +131393,11 @@ void m68000_mcu_device::smi_das_ipm() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131418,7 +131419,7 @@ void m68000_mcu_device::smi_das_ipm() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131428,7 +131429,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131455,7 +131456,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131486,7 +131487,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131515,14 +131516,14 @@ void m68000_mcu_device::smi_dais_ipm() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131530,7 +131531,7 @@ void m68000_mcu_device::smi_dais_ipm() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131557,7 +131558,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131586,11 +131587,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -131612,7 +131613,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131622,7 +131623,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131649,7 +131650,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131680,7 +131681,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131713,7 +131714,7 @@ void m68000_mcu_device::smi_adr16_ipm() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131739,7 +131740,7 @@ void m68000_mcu_device::smi_adr16_ipm() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -131762,7 +131763,7 @@ void m68000_mcu_device::smi_adr16_ipm() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131772,7 +131773,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131799,7 +131800,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -131830,7 +131831,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -131861,7 +131862,7 @@ void m68000_mcu_device::smi_adr32_ipm() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131888,7 +131889,7 @@ void m68000_mcu_device::smi_adr32_ipm() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -131914,7 +131915,7 @@ void m68000_mcu_device::smi_adr32_ipm() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -131937,7 +131938,7 @@ void m68000_mcu_device::smi_adr32_ipm() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131947,7 +131948,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -131974,7 +131975,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -132005,7 +132006,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132038,7 +132039,7 @@ void m68000_mcu_device::sge_ds_ipm() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -132050,7 +132051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132081,7 +132082,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -132109,7 +132110,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -132128,7 +132129,7 @@ void m68000_mcu_device::dbge_ds_rel16_ipm() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -132140,13 +132141,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -132177,7 +132178,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -132185,7 +132186,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132212,11 +132213,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132250,13 +132251,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132290,7 +132291,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132327,11 +132328,11 @@ void m68000_mcu_device::sge_ais_ipm() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132353,7 +132354,7 @@ void m68000_mcu_device::sge_ais_ipm() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132363,7 +132364,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132390,7 +132391,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132421,7 +132422,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132455,12 +132456,12 @@ void m68000_mcu_device::sge_aips_ipm() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132483,7 +132484,7 @@ void m68000_mcu_device::sge_aips_ipm() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132493,7 +132494,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132520,7 +132521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132551,7 +132552,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132584,7 +132585,7 @@ void m68000_mcu_device::sge_pais_ipm() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -132592,7 +132593,7 @@ void m68000_mcu_device::sge_pais_ipm() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -132615,7 +132616,7 @@ void m68000_mcu_device::sge_pais_ipm() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132625,7 +132626,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132652,7 +132653,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -132683,7 +132684,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132714,7 +132715,7 @@ void m68000_mcu_device::sge_das_ipm() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132740,11 +132741,11 @@ void m68000_mcu_device::sge_das_ipm() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132766,7 +132767,7 @@ void m68000_mcu_device::sge_das_ipm() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132776,7 +132777,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132803,7 +132804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -132834,7 +132835,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -132863,14 +132864,14 @@ void m68000_mcu_device::sge_dais_ipm() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -132878,7 +132879,7 @@ void m68000_mcu_device::sge_dais_ipm() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132905,7 +132906,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132934,11 +132935,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -132960,7 +132961,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -132970,7 +132971,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -132997,7 +132998,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133028,7 +133029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133061,7 +133062,7 @@ void m68000_mcu_device::sge_adr16_ipm() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133087,7 +133088,7 @@ void m68000_mcu_device::sge_adr16_ipm() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -133110,7 +133111,7 @@ void m68000_mcu_device::sge_adr16_ipm() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133120,7 +133121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133147,7 +133148,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -133178,7 +133179,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133209,7 +133210,7 @@ void m68000_mcu_device::sge_adr32_ipm() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133236,7 +133237,7 @@ void m68000_mcu_device::sge_adr32_ipm() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133262,7 +133263,7 @@ void m68000_mcu_device::sge_adr32_ipm() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -133285,7 +133286,7 @@ void m68000_mcu_device::sge_adr32_ipm() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133295,7 +133296,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133322,7 +133323,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -133353,7 +133354,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133386,7 +133387,7 @@ void m68000_mcu_device::slt_ds_ipm() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -133398,7 +133399,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133429,7 +133430,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -133457,7 +133458,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -133476,7 +133477,7 @@ void m68000_mcu_device::dblt_ds_rel16_ipm() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -133488,13 +133489,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -133525,7 +133526,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -133533,7 +133534,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133560,11 +133561,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133598,13 +133599,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133638,7 +133639,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133675,11 +133676,11 @@ void m68000_mcu_device::slt_ais_ipm() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -133701,7 +133702,7 @@ void m68000_mcu_device::slt_ais_ipm() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133711,7 +133712,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133738,7 +133739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133769,7 +133770,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133803,12 +133804,12 @@ void m68000_mcu_device::slt_aips_ipm() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133831,7 +133832,7 @@ void m68000_mcu_device::slt_aips_ipm() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133841,7 +133842,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -133868,7 +133869,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -133899,7 +133900,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -133932,7 +133933,7 @@ void m68000_mcu_device::slt_pais_ipm() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -133940,7 +133941,7 @@ void m68000_mcu_device::slt_pais_ipm() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -133963,7 +133964,7 @@ void m68000_mcu_device::slt_pais_ipm() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -133973,7 +133974,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134000,7 +134001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -134031,7 +134032,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134062,7 +134063,7 @@ void m68000_mcu_device::slt_das_ipm() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134088,11 +134089,11 @@ void m68000_mcu_device::slt_das_ipm() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134114,7 +134115,7 @@ void m68000_mcu_device::slt_das_ipm() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134124,7 +134125,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134151,7 +134152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134182,7 +134183,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134211,14 +134212,14 @@ void m68000_mcu_device::slt_dais_ipm() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -134226,7 +134227,7 @@ void m68000_mcu_device::slt_dais_ipm() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134253,7 +134254,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134282,11 +134283,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -134308,7 +134309,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134318,7 +134319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134345,7 +134346,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134376,7 +134377,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134409,7 +134410,7 @@ void m68000_mcu_device::slt_adr16_ipm() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134435,7 +134436,7 @@ void m68000_mcu_device::slt_adr16_ipm() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -134458,7 +134459,7 @@ void m68000_mcu_device::slt_adr16_ipm() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134468,7 +134469,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134495,7 +134496,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -134526,7 +134527,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134557,7 +134558,7 @@ void m68000_mcu_device::slt_adr32_ipm() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134584,7 +134585,7 @@ void m68000_mcu_device::slt_adr32_ipm() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134610,7 +134611,7 @@ void m68000_mcu_device::slt_adr32_ipm() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -134633,7 +134634,7 @@ void m68000_mcu_device::slt_adr32_ipm() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -134643,7 +134644,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134670,7 +134671,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -134701,7 +134702,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -134734,7 +134735,7 @@ void m68000_mcu_device::sgt_ds_ipm() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -134746,7 +134747,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134777,7 +134778,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -134805,7 +134806,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -134824,7 +134825,7 @@ void m68000_mcu_device::dbgt_ds_rel16_ipm() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -134836,13 +134837,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -134873,7 +134874,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -134881,7 +134882,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134908,11 +134909,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134946,13 +134947,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -134986,7 +134987,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135023,11 +135024,11 @@ void m68000_mcu_device::sgt_ais_ipm() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135049,7 +135050,7 @@ void m68000_mcu_device::sgt_ais_ipm() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135059,7 +135060,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135086,7 +135087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135117,7 +135118,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135151,12 +135152,12 @@ void m68000_mcu_device::sgt_aips_ipm() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135179,7 +135180,7 @@ void m68000_mcu_device::sgt_aips_ipm() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135189,7 +135190,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135216,7 +135217,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135247,7 +135248,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135280,7 +135281,7 @@ void m68000_mcu_device::sgt_pais_ipm() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135288,7 +135289,7 @@ void m68000_mcu_device::sgt_pais_ipm() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135311,7 +135312,7 @@ void m68000_mcu_device::sgt_pais_ipm() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135321,7 +135322,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135348,7 +135349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -135379,7 +135380,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135410,7 +135411,7 @@ void m68000_mcu_device::sgt_das_ipm() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135436,11 +135437,11 @@ void m68000_mcu_device::sgt_das_ipm() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135462,7 +135463,7 @@ void m68000_mcu_device::sgt_das_ipm() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135472,7 +135473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135499,7 +135500,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135530,7 +135531,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135559,14 +135560,14 @@ void m68000_mcu_device::sgt_dais_ipm() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135574,7 +135575,7 @@ void m68000_mcu_device::sgt_dais_ipm() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135601,7 +135602,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135630,11 +135631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -135656,7 +135657,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135666,7 +135667,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135693,7 +135694,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135724,7 +135725,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135757,7 +135758,7 @@ void m68000_mcu_device::sgt_adr16_ipm() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135783,7 +135784,7 @@ void m68000_mcu_device::sgt_adr16_ipm() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -135806,7 +135807,7 @@ void m68000_mcu_device::sgt_adr16_ipm() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135816,7 +135817,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135843,7 +135844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -135874,7 +135875,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -135905,7 +135906,7 @@ void m68000_mcu_device::sgt_adr32_ipm() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -135932,7 +135933,7 @@ void m68000_mcu_device::sgt_adr32_ipm() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -135958,7 +135959,7 @@ void m68000_mcu_device::sgt_adr32_ipm() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135981,7 +135982,7 @@ void m68000_mcu_device::sgt_adr32_ipm() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135991,7 +135992,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136018,7 +136019,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -136049,7 +136050,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136082,7 +136083,7 @@ void m68000_mcu_device::sle_ds_ipm() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -136094,7 +136095,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136125,7 +136126,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -136153,7 +136154,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -136172,7 +136173,7 @@ void m68000_mcu_device::dble_ds_rel16_ipm() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -136184,13 +136185,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136221,7 +136222,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -136229,7 +136230,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136256,11 +136257,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136294,13 +136295,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136334,7 +136335,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136371,11 +136372,11 @@ void m68000_mcu_device::sle_ais_ipm() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136397,7 +136398,7 @@ void m68000_mcu_device::sle_ais_ipm() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136407,7 +136408,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136434,7 +136435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136465,7 +136466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136499,12 +136500,12 @@ void m68000_mcu_device::sle_aips_ipm() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136527,7 +136528,7 @@ void m68000_mcu_device::sle_aips_ipm() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136537,7 +136538,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136564,7 +136565,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136595,7 +136596,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136628,7 +136629,7 @@ void m68000_mcu_device::sle_pais_ipm() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136636,7 +136637,7 @@ void m68000_mcu_device::sle_pais_ipm() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136659,7 +136660,7 @@ void m68000_mcu_device::sle_pais_ipm() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136669,7 +136670,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136696,7 +136697,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -136727,7 +136728,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136758,7 +136759,7 @@ void m68000_mcu_device::sle_das_ipm() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136784,11 +136785,11 @@ void m68000_mcu_device::sle_das_ipm() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -136810,7 +136811,7 @@ void m68000_mcu_device::sle_das_ipm() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136820,7 +136821,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136847,7 +136848,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -136878,7 +136879,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -136907,14 +136908,14 @@ void m68000_mcu_device::sle_dais_ipm() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136922,7 +136923,7 @@ void m68000_mcu_device::sle_dais_ipm() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136949,7 +136950,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -136978,11 +136979,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -137004,7 +137005,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137014,7 +137015,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137041,7 +137042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137072,7 +137073,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137105,7 +137106,7 @@ void m68000_mcu_device::sle_adr16_ipm() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137131,7 +137132,7 @@ void m68000_mcu_device::sle_adr16_ipm() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -137154,7 +137155,7 @@ void m68000_mcu_device::sle_adr16_ipm() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137164,7 +137165,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137191,7 +137192,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -137222,7 +137223,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137253,7 +137254,7 @@ void m68000_mcu_device::sle_adr32_ipm() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137280,7 +137281,7 @@ void m68000_mcu_device::sle_adr32_ipm() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -137306,7 +137307,7 @@ void m68000_mcu_device::sle_adr32_ipm() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137329,7 +137330,7 @@ void m68000_mcu_device::sle_adr32_ipm() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137339,7 +137340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -137366,7 +137367,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -137397,7 +137398,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -137627,7 +137628,7 @@ void m68000_mcu_device::bsr_rel16_ipm() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -137750,7 +137751,7 @@ void m68000_mcu_device::bsr_rel8_ipm() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -140690,7 +140691,7 @@ void m68000_mcu_device::moveq_imm8o_dd_ipm() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -140737,7 +140738,7 @@ void m68000_mcu_device::or_b_ds_dd_ipm() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140745,7 +140746,7 @@ void m68000_mcu_device::or_b_ds_dd_ipm() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140785,11 +140786,11 @@ void m68000_mcu_device::or_b_ais_dd_ipm() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -140811,7 +140812,7 @@ void m68000_mcu_device::or_b_ais_dd_ipm() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140819,7 +140820,7 @@ void m68000_mcu_device::or_b_ais_dd_ipm() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140862,12 +140863,12 @@ void m68000_mcu_device::or_b_aips_dd_ipm() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140890,7 +140891,7 @@ void m68000_mcu_device::or_b_aips_dd_ipm() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140898,7 +140899,7 @@ void m68000_mcu_device::or_b_aips_dd_ipm() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -140940,7 +140941,7 @@ void m68000_mcu_device::or_b_pais_dd_ipm() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140948,7 +140949,7 @@ void m68000_mcu_device::or_b_pais_dd_ipm() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -140971,7 +140972,7 @@ void m68000_mcu_device::or_b_pais_dd_ipm() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -140979,7 +140980,7 @@ void m68000_mcu_device::or_b_pais_dd_ipm() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141019,7 +141020,7 @@ void m68000_mcu_device::or_b_das_dd_ipm() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141045,11 +141046,11 @@ void m68000_mcu_device::or_b_das_dd_ipm() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141071,7 +141072,7 @@ void m68000_mcu_device::or_b_das_dd_ipm() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141079,7 +141080,7 @@ void m68000_mcu_device::or_b_das_dd_ipm() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141117,14 +141118,14 @@ void m68000_mcu_device::or_b_dais_dd_ipm() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141132,7 +141133,7 @@ void m68000_mcu_device::or_b_dais_dd_ipm() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141159,7 +141160,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141188,11 +141189,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141214,7 +141215,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141222,7 +141223,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141264,7 +141265,7 @@ void m68000_mcu_device::or_b_adr16_dd_ipm() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -141290,7 +141291,7 @@ void m68000_mcu_device::or_b_adr16_dd_ipm() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -141313,7 +141314,7 @@ void m68000_mcu_device::or_b_adr16_dd_ipm() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141321,7 +141322,7 @@ void m68000_mcu_device::or_b_adr16_dd_ipm() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141361,7 +141362,7 @@ void m68000_mcu_device::or_b_adr32_dd_ipm() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141388,7 +141389,7 @@ void m68000_mcu_device::or_b_adr32_dd_ipm() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -141414,7 +141415,7 @@ void m68000_mcu_device::or_b_adr32_dd_ipm() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -141437,7 +141438,7 @@ void m68000_mcu_device::or_b_adr32_dd_ipm() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141445,7 +141446,7 @@ void m68000_mcu_device::or_b_adr32_dd_ipm() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141484,7 +141485,7 @@ void m68000_mcu_device::or_b_dpc_dd_ipm() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141510,11 +141511,11 @@ void m68000_mcu_device::or_b_dpc_dd_ipm() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141536,7 +141537,7 @@ void m68000_mcu_device::or_b_dpc_dd_ipm() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141544,7 +141545,7 @@ void m68000_mcu_device::or_b_dpc_dd_ipm() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141581,14 +141582,14 @@ void m68000_mcu_device::or_b_dpci_dd_ipm() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -141596,7 +141597,7 @@ void m68000_mcu_device::or_b_dpci_dd_ipm() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141623,7 +141624,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141652,11 +141653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -141678,7 +141679,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141686,7 +141687,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141728,7 +141729,7 @@ void m68000_mcu_device::or_b_imm8_dd_ipm() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141755,7 +141756,7 @@ void m68000_mcu_device::or_b_imm8_dd_ipm() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141763,7 +141764,7 @@ void m68000_mcu_device::or_b_imm8_dd_ipm() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141805,7 +141806,7 @@ void m68000_mcu_device::or_w_ds_dd_ipm() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141813,7 +141814,7 @@ void m68000_mcu_device::or_w_ds_dd_ipm() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141853,11 +141854,11 @@ void m68000_mcu_device::or_w_ais_dd_ipm() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -141883,7 +141884,7 @@ void m68000_mcu_device::or_w_ais_dd_ipm() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141891,7 +141892,7 @@ void m68000_mcu_device::or_w_ais_dd_ipm() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -141934,12 +141935,12 @@ void m68000_mcu_device::or_w_aips_dd_ipm() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -141966,7 +141967,7 @@ void m68000_mcu_device::or_w_aips_dd_ipm() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -141974,7 +141975,7 @@ void m68000_mcu_device::or_w_aips_dd_ipm() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142016,7 +142017,7 @@ void m68000_mcu_device::or_w_pais_dd_ipm() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142024,7 +142025,7 @@ void m68000_mcu_device::or_w_pais_dd_ipm() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142051,7 +142052,7 @@ void m68000_mcu_device::or_w_pais_dd_ipm() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142059,7 +142060,7 @@ void m68000_mcu_device::or_w_pais_dd_ipm() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142099,7 +142100,7 @@ void m68000_mcu_device::or_w_das_dd_ipm() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142125,11 +142126,11 @@ void m68000_mcu_device::or_w_das_dd_ipm() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142155,7 +142156,7 @@ void m68000_mcu_device::or_w_das_dd_ipm() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142163,7 +142164,7 @@ void m68000_mcu_device::or_w_das_dd_ipm() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142201,14 +142202,14 @@ void m68000_mcu_device::or_w_dais_dd_ipm() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142216,7 +142217,7 @@ void m68000_mcu_device::or_w_dais_dd_ipm() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142243,7 +142244,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142272,11 +142273,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -142302,7 +142303,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142310,7 +142311,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142352,7 +142353,7 @@ void m68000_mcu_device::or_w_adr16_dd_ipm() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -142378,7 +142379,7 @@ void m68000_mcu_device::or_w_adr16_dd_ipm() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -142405,7 +142406,7 @@ void m68000_mcu_device::or_w_adr16_dd_ipm() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142413,7 +142414,7 @@ void m68000_mcu_device::or_w_adr16_dd_ipm() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142453,7 +142454,7 @@ void m68000_mcu_device::or_w_adr32_dd_ipm() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142480,7 +142481,7 @@ void m68000_mcu_device::or_w_adr32_dd_ipm() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -142506,7 +142507,7 @@ void m68000_mcu_device::or_w_adr32_dd_ipm() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -142533,7 +142534,7 @@ void m68000_mcu_device::or_w_adr32_dd_ipm() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142541,7 +142542,7 @@ void m68000_mcu_device::or_w_adr32_dd_ipm() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142580,7 +142581,7 @@ void m68000_mcu_device::or_w_dpc_dd_ipm() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142606,11 +142607,11 @@ void m68000_mcu_device::or_w_dpc_dd_ipm() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142636,7 +142637,7 @@ void m68000_mcu_device::or_w_dpc_dd_ipm() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142644,7 +142645,7 @@ void m68000_mcu_device::or_w_dpc_dd_ipm() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142681,14 +142682,14 @@ void m68000_mcu_device::or_w_dpci_dd_ipm() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142696,7 +142697,7 @@ void m68000_mcu_device::or_w_dpci_dd_ipm() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142723,7 +142724,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142752,11 +142753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142782,7 +142783,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142790,7 +142791,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142832,7 +142833,7 @@ void m68000_mcu_device::or_w_imm16_dd_ipm() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142859,7 +142860,7 @@ void m68000_mcu_device::or_w_imm16_dd_ipm() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -142867,7 +142868,7 @@ void m68000_mcu_device::or_w_imm16_dd_ipm() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142909,12 +142910,12 @@ void m68000_mcu_device::or_l_ds_dd_ipm() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -142937,7 +142938,7 @@ void m68000_mcu_device::or_l_ds_dd_ipm() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -142946,7 +142947,7 @@ void m68000_mcu_device::or_l_ds_dd_ipm() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142966,7 +142967,7 @@ void m68000_mcu_device::or_l_ais_dd_ipm() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -142994,7 +142995,7 @@ void m68000_mcu_device::or_l_ais_dd_ipm() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143020,12 +143021,12 @@ void m68000_mcu_device::or_l_ais_dd_ipm() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143054,7 +143055,7 @@ void m68000_mcu_device::or_l_ais_dd_ipm() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143074,7 +143075,7 @@ void m68000_mcu_device::or_l_aips_dd_ipm() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143102,11 +143103,11 @@ void m68000_mcu_device::or_l_aips_dd_ipm() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143132,12 +143133,12 @@ void m68000_mcu_device::or_l_aips_dd_ipm() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143166,7 +143167,7 @@ void m68000_mcu_device::or_l_aips_dd_ipm() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143185,14 +143186,14 @@ void m68000_mcu_device::or_l_pais_dd_ipm() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143219,7 +143220,7 @@ void m68000_mcu_device::or_l_pais_dd_ipm() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143245,12 +143246,12 @@ void m68000_mcu_device::or_l_pais_dd_ipm() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143279,7 +143280,7 @@ void m68000_mcu_device::or_l_pais_dd_ipm() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143299,7 +143300,7 @@ void m68000_mcu_device::or_l_das_dd_ipm() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143324,7 +143325,7 @@ void m68000_mcu_device::or_l_das_dd_ipm() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143352,7 +143353,7 @@ void m68000_mcu_device::or_l_das_dd_ipm() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143378,12 +143379,12 @@ void m68000_mcu_device::or_l_das_dd_ipm() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143412,7 +143413,7 @@ void m68000_mcu_device::or_l_das_dd_ipm() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143430,14 +143431,14 @@ void m68000_mcu_device::or_l_dais_dd_ipm() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -143445,7 +143446,7 @@ void m68000_mcu_device::or_l_dais_dd_ipm() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143472,7 +143473,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143500,7 +143501,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143528,7 +143529,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143554,12 +143555,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143588,7 +143589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143610,7 +143611,7 @@ void m68000_mcu_device::or_l_adr16_dd_ipm() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -143636,7 +143637,7 @@ void m68000_mcu_device::or_l_adr16_dd_ipm() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -143664,7 +143665,7 @@ void m68000_mcu_device::or_l_adr16_dd_ipm() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143690,12 +143691,12 @@ void m68000_mcu_device::or_l_adr16_dd_ipm() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143724,7 +143725,7 @@ void m68000_mcu_device::or_l_adr16_dd_ipm() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143744,7 +143745,7 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143771,7 +143772,7 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143797,7 +143798,7 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -143825,7 +143826,7 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -143851,12 +143852,12 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -143885,7 +143886,7 @@ void m68000_mcu_device::or_l_adr32_dd_ipm() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -143904,7 +143905,7 @@ void m68000_mcu_device::or_l_dpc_dd_ipm() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143929,7 +143930,7 @@ void m68000_mcu_device::or_l_dpc_dd_ipm() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -143957,7 +143958,7 @@ void m68000_mcu_device::or_l_dpc_dd_ipm() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -143983,12 +143984,12 @@ void m68000_mcu_device::or_l_dpc_dd_ipm() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144017,7 +144018,7 @@ void m68000_mcu_device::or_l_dpc_dd_ipm() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144034,14 +144035,14 @@ void m68000_mcu_device::or_l_dpci_dd_ipm() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -144049,7 +144050,7 @@ void m68000_mcu_device::or_l_dpci_dd_ipm() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144076,7 +144077,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144104,7 +144105,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -144132,7 +144133,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144158,12 +144159,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144192,7 +144193,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144212,7 +144213,7 @@ void m68000_mcu_device::or_l_imm32_dd_ipm() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144239,7 +144240,7 @@ void m68000_mcu_device::or_l_imm32_dd_ipm() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144266,12 +144267,12 @@ void m68000_mcu_device::or_l_imm32_dd_ipm() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -144294,7 +144295,7 @@ void m68000_mcu_device::or_l_imm32_dd_ipm() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -144303,7 +144304,7 @@ void m68000_mcu_device::or_l_imm32_dd_ipm() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144325,13 +144326,13 @@ void m68000_mcu_device::divu_w_ds_dd_ipm() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144344,7 +144345,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144362,7 +144363,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144370,7 +144371,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -144398,7 +144399,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144424,7 +144425,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144561,7 +144562,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144595,7 +144596,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144606,7 +144607,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144618,7 +144619,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -144638,7 +144639,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -144649,7 +144650,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -144659,13 +144660,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144676,7 +144677,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -144686,7 +144687,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -144694,7 +144695,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -144736,7 +144737,7 @@ void m68000_mcu_device::divu_w_ais_dd_ipm() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -144765,13 +144766,13 @@ void m68000_mcu_device::divu_w_ais_dd_ipm() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -144784,7 +144785,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -144802,7 +144803,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -144810,7 +144811,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -144838,7 +144839,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144864,7 +144865,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145001,7 +145002,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145035,7 +145036,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145046,7 +145047,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145058,7 +145059,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145078,7 +145079,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145089,7 +145090,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145099,13 +145100,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145116,7 +145117,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145126,7 +145127,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145134,7 +145135,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145182,7 +145183,7 @@ void m68000_mcu_device::divu_w_aips_dd_ipm() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145209,13 +145210,13 @@ void m68000_mcu_device::divu_w_aips_dd_ipm() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145228,7 +145229,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145246,7 +145247,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145254,7 +145255,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145282,7 +145283,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145308,7 +145309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145445,7 +145446,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145479,7 +145480,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145490,7 +145491,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145502,7 +145503,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145522,7 +145523,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145533,7 +145534,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145543,13 +145544,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145560,7 +145561,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -145570,7 +145571,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -145578,7 +145579,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145628,7 +145629,7 @@ void m68000_mcu_device::divu_w_pais_dd_ipm() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145655,13 +145656,13 @@ void m68000_mcu_device::divu_w_pais_dd_ipm() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -145674,7 +145675,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -145692,7 +145693,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -145700,7 +145701,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -145728,7 +145729,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -145754,7 +145755,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -145891,7 +145892,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -145925,7 +145926,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145936,7 +145937,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145948,7 +145949,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -145968,7 +145969,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -145979,7 +145980,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -145989,13 +145990,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146006,7 +146007,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146016,7 +146017,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146024,7 +146025,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146091,7 +146092,7 @@ void m68000_mcu_device::divu_w_das_dd_ipm() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146120,13 +146121,13 @@ void m68000_mcu_device::divu_w_das_dd_ipm() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146139,7 +146140,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146157,7 +146158,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146165,7 +146166,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146193,7 +146194,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146219,7 +146220,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146356,7 +146357,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146390,7 +146391,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146401,7 +146402,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146413,7 +146414,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146433,7 +146434,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146444,7 +146445,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146454,13 +146455,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146471,7 +146472,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146481,7 +146482,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146489,7 +146490,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146529,7 +146530,7 @@ void m68000_mcu_device::divu_w_dais_dd_ipm() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -146597,7 +146598,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -146626,13 +146627,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -146645,7 +146646,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146663,7 +146664,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -146671,7 +146672,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -146699,7 +146700,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -146725,7 +146726,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -146862,7 +146863,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146896,7 +146897,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146907,7 +146908,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146919,7 +146920,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -146939,7 +146940,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -146950,7 +146951,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -146960,13 +146961,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -146977,7 +146978,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -146987,7 +146988,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -146995,7 +146996,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147063,7 +147064,7 @@ void m68000_mcu_device::divu_w_adr16_dd_ipm() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -147090,13 +147091,13 @@ void m68000_mcu_device::divu_w_adr16_dd_ipm() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147109,7 +147110,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147127,7 +147128,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147135,7 +147136,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -147163,7 +147164,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147189,7 +147190,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147326,7 +147327,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147360,7 +147361,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147371,7 +147372,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147383,7 +147384,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147403,7 +147404,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147414,7 +147415,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147424,13 +147425,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147441,7 +147442,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147451,7 +147452,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147459,7 +147460,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147551,7 +147552,7 @@ void m68000_mcu_device::divu_w_adr32_dd_ipm() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147578,13 +147579,13 @@ void m68000_mcu_device::divu_w_adr32_dd_ipm() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -147597,7 +147598,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147615,7 +147616,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -147623,7 +147624,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -147651,7 +147652,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -147677,7 +147678,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -147814,7 +147815,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147848,7 +147849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147859,7 +147860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147871,7 +147872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -147891,7 +147892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -147902,7 +147903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -147912,13 +147913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -147929,7 +147930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -147939,7 +147940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -147947,7 +147948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148013,7 +148014,7 @@ void m68000_mcu_device::divu_w_dpc_dd_ipm() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148042,13 +148043,13 @@ void m68000_mcu_device::divu_w_dpc_dd_ipm() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148061,7 +148062,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148079,7 +148080,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148087,7 +148088,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148115,7 +148116,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148141,7 +148142,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148278,7 +148279,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148312,7 +148313,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148323,7 +148324,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148335,7 +148336,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148355,7 +148356,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148366,7 +148367,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148376,13 +148377,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148393,7 +148394,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148403,7 +148404,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148411,7 +148412,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148450,7 +148451,7 @@ void m68000_mcu_device::divu_w_dpci_dd_ipm() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148518,7 +148519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -148547,13 +148548,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -148566,7 +148567,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148584,7 +148585,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -148592,7 +148593,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -148620,7 +148621,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -148646,7 +148647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -148783,7 +148784,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148817,7 +148818,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148828,7 +148829,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148840,7 +148841,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -148860,7 +148861,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -148871,7 +148872,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -148881,13 +148882,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -148898,7 +148899,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -148908,7 +148909,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -148916,7 +148917,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148986,13 +148987,13 @@ void m68000_mcu_device::divu_w_imm16_dd_ipm() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -149005,7 +149006,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149023,7 +149024,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -149031,7 +149032,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -149059,7 +149060,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -149085,7 +149086,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -149222,7 +149223,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149256,7 +149257,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149267,7 +149268,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149279,7 +149280,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -149299,7 +149300,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -149310,7 +149311,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -149320,13 +149321,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -149337,7 +149338,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -149347,7 +149348,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -149355,7 +149356,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149399,12 +149400,12 @@ void m68000_mcu_device::sbcd_ds_dd_ipm() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149456,7 +149457,7 @@ void m68000_mcu_device::sbcd_pais_paid_ipm() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -149500,12 +149501,12 @@ void m68000_mcu_device::sbcd_pais_paid_ipm() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149564,11 +149565,11 @@ void m68000_mcu_device::or_b_dd_ais_ipm() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149590,7 +149591,7 @@ void m68000_mcu_device::or_b_dd_ais_ipm() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149620,7 +149621,7 @@ void m68000_mcu_device::or_b_dd_ais_ipm() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149655,12 +149656,12 @@ void m68000_mcu_device::or_b_dd_aips_ipm() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149683,7 +149684,7 @@ void m68000_mcu_device::or_b_dd_aips_ipm() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149713,7 +149714,7 @@ void m68000_mcu_device::or_b_dd_aips_ipm() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149747,7 +149748,7 @@ void m68000_mcu_device::or_b_dd_pais_ipm() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149755,7 +149756,7 @@ void m68000_mcu_device::or_b_dd_pais_ipm() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149778,7 +149779,7 @@ void m68000_mcu_device::or_b_dd_pais_ipm() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149808,7 +149809,7 @@ void m68000_mcu_device::or_b_dd_pais_ipm() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149840,7 +149841,7 @@ void m68000_mcu_device::or_b_dd_das_ipm() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149866,11 +149867,11 @@ void m68000_mcu_device::or_b_dd_das_ipm() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -149892,7 +149893,7 @@ void m68000_mcu_device::or_b_dd_das_ipm() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149922,7 +149923,7 @@ void m68000_mcu_device::or_b_dd_das_ipm() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -149952,14 +149953,14 @@ void m68000_mcu_device::or_b_dd_dais_ipm() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149967,7 +149968,7 @@ void m68000_mcu_device::or_b_dd_dais_ipm() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -149994,7 +149995,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150023,11 +150024,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -150049,7 +150050,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150079,7 +150080,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150113,7 +150114,7 @@ void m68000_mcu_device::or_b_dd_adr16_ipm() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150139,7 +150140,7 @@ void m68000_mcu_device::or_b_dd_adr16_ipm() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -150162,7 +150163,7 @@ void m68000_mcu_device::or_b_dd_adr16_ipm() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150192,7 +150193,7 @@ void m68000_mcu_device::or_b_dd_adr16_ipm() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150224,7 +150225,7 @@ void m68000_mcu_device::or_b_dd_adr32_ipm() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150251,7 +150252,7 @@ void m68000_mcu_device::or_b_dd_adr32_ipm() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -150277,7 +150278,7 @@ void m68000_mcu_device::or_b_dd_adr32_ipm() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150300,7 +150301,7 @@ void m68000_mcu_device::or_b_dd_adr32_ipm() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150330,7 +150331,7 @@ void m68000_mcu_device::or_b_dd_adr32_ipm() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -150362,11 +150363,11 @@ void m68000_mcu_device::or_w_dd_ais_ipm() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150392,7 +150393,7 @@ void m68000_mcu_device::or_w_dd_ais_ipm() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150422,7 +150423,7 @@ void m68000_mcu_device::or_w_dd_ais_ipm() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150463,12 +150464,12 @@ void m68000_mcu_device::or_w_dd_aips_ipm() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150495,7 +150496,7 @@ void m68000_mcu_device::or_w_dd_aips_ipm() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150525,7 +150526,7 @@ void m68000_mcu_device::or_w_dd_aips_ipm() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150565,7 +150566,7 @@ void m68000_mcu_device::or_w_dd_pais_ipm() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150573,7 +150574,7 @@ void m68000_mcu_device::or_w_dd_pais_ipm() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -150600,7 +150601,7 @@ void m68000_mcu_device::or_w_dd_pais_ipm() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150630,7 +150631,7 @@ void m68000_mcu_device::or_w_dd_pais_ipm() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150668,7 +150669,7 @@ void m68000_mcu_device::or_w_dd_das_ipm() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150694,11 +150695,11 @@ void m68000_mcu_device::or_w_dd_das_ipm() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150724,7 +150725,7 @@ void m68000_mcu_device::or_w_dd_das_ipm() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150754,7 +150755,7 @@ void m68000_mcu_device::or_w_dd_das_ipm() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150790,14 +150791,14 @@ void m68000_mcu_device::or_w_dd_dais_ipm() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -150805,7 +150806,7 @@ void m68000_mcu_device::or_w_dd_dais_ipm() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150832,7 +150833,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -150861,11 +150862,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -150891,7 +150892,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150921,7 +150922,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -150961,7 +150962,7 @@ void m68000_mcu_device::or_w_dd_adr16_ipm() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150987,7 +150988,7 @@ void m68000_mcu_device::or_w_dd_adr16_ipm() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151014,7 +151015,7 @@ void m68000_mcu_device::or_w_dd_adr16_ipm() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151044,7 +151045,7 @@ void m68000_mcu_device::or_w_dd_adr16_ipm() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151082,7 +151083,7 @@ void m68000_mcu_device::or_w_dd_adr32_ipm() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151109,7 +151110,7 @@ void m68000_mcu_device::or_w_dd_adr32_ipm() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -151135,7 +151136,7 @@ void m68000_mcu_device::or_w_dd_adr32_ipm() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -151162,7 +151163,7 @@ void m68000_mcu_device::or_w_dd_adr32_ipm() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151192,7 +151193,7 @@ void m68000_mcu_device::or_w_dd_adr32_ipm() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151230,7 +151231,7 @@ void m68000_mcu_device::or_l_dd_ais_ipm() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151258,7 +151259,7 @@ void m68000_mcu_device::or_l_dd_ais_ipm() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151284,7 +151285,7 @@ void m68000_mcu_device::or_l_dd_ais_ipm() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151312,7 +151313,7 @@ void m68000_mcu_device::or_l_dd_ais_ipm() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151340,7 +151341,7 @@ void m68000_mcu_device::or_l_dd_ais_ipm() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151378,7 +151379,7 @@ void m68000_mcu_device::or_l_dd_aips_ipm() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151406,11 +151407,11 @@ void m68000_mcu_device::or_l_dd_aips_ipm() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151436,7 +151437,7 @@ void m68000_mcu_device::or_l_dd_aips_ipm() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151464,7 +151465,7 @@ void m68000_mcu_device::or_l_dd_aips_ipm() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151492,7 +151493,7 @@ void m68000_mcu_device::or_l_dd_aips_ipm() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151529,14 +151530,14 @@ void m68000_mcu_device::or_l_dd_pais_ipm() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151563,7 +151564,7 @@ void m68000_mcu_device::or_l_dd_pais_ipm() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151589,7 +151590,7 @@ void m68000_mcu_device::or_l_dd_pais_ipm() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151617,7 +151618,7 @@ void m68000_mcu_device::or_l_dd_pais_ipm() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151645,7 +151646,7 @@ void m68000_mcu_device::or_l_dd_pais_ipm() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151683,7 +151684,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151708,7 +151709,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151736,7 +151737,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151762,7 +151763,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -151790,7 +151791,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -151818,7 +151819,7 @@ void m68000_mcu_device::or_l_dd_das_ipm() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -151854,14 +151855,14 @@ void m68000_mcu_device::or_l_dd_dais_ipm() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -151869,7 +151870,7 @@ void m68000_mcu_device::or_l_dd_dais_ipm() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151896,7 +151897,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -151924,7 +151925,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -151952,7 +151953,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -151978,7 +151979,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152006,7 +152007,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152034,7 +152035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152074,7 +152075,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152100,7 +152101,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -152128,7 +152129,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152154,7 +152155,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152182,7 +152183,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152210,7 +152211,7 @@ void m68000_mcu_device::or_l_dd_adr16_ipm() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152248,7 +152249,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -152275,7 +152276,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -152301,7 +152302,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152329,7 +152330,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -152355,7 +152356,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152383,7 +152384,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -152411,7 +152412,7 @@ void m68000_mcu_device::or_l_dd_adr32_ipm() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -152451,13 +152452,13 @@ void m68000_mcu_device::divs_w_ds_dd_ipm() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152471,7 +152472,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152481,7 +152482,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152496,7 +152497,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -152504,7 +152505,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -152532,7 +152533,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -152558,7 +152559,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -152690,7 +152691,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -152699,7 +152700,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -152707,12 +152708,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152720,7 +152721,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152737,7 +152738,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -152745,7 +152746,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152779,7 +152780,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -152806,13 +152807,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152820,27 +152821,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152852,7 +152853,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152864,7 +152865,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -152879,7 +152880,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152888,7 +152889,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152896,7 +152897,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152906,7 +152907,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -152915,7 +152916,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -152927,7 +152928,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -152979,7 +152980,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -152995,7 +152996,7 @@ void m68000_mcu_device::divs_w_ais_dd_ipm() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -153024,13 +153025,13 @@ void m68000_mcu_device::divs_w_ais_dd_ipm() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153044,7 +153045,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153054,7 +153055,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153069,7 +153070,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153077,7 +153078,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153105,7 +153106,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153131,7 +153132,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153263,7 +153264,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153272,7 +153273,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153280,12 +153281,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153293,7 +153294,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153310,7 +153311,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153318,7 +153319,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153352,7 +153353,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153379,13 +153380,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153393,27 +153394,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153425,7 +153426,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153437,7 +153438,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153452,7 +153453,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153461,7 +153462,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153469,7 +153470,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153479,7 +153480,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153488,7 +153489,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -153500,7 +153501,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -153552,7 +153553,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -153574,7 +153575,7 @@ void m68000_mcu_device::divs_w_aips_dd_ipm() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153601,13 +153602,13 @@ void m68000_mcu_device::divs_w_aips_dd_ipm() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -153621,7 +153622,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153631,7 +153632,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153646,7 +153647,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -153654,7 +153655,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -153682,7 +153683,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -153708,7 +153709,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -153840,7 +153841,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -153849,7 +153850,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -153857,12 +153858,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153870,7 +153871,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153887,7 +153888,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -153895,7 +153896,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153929,7 +153930,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -153956,13 +153957,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -153970,27 +153971,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154002,7 +154003,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154014,7 +154015,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154029,7 +154030,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154038,7 +154039,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154046,7 +154047,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154056,7 +154057,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154065,7 +154066,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154077,7 +154078,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154129,7 +154130,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154153,7 +154154,7 @@ void m68000_mcu_device::divs_w_pais_dd_ipm() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154180,13 +154181,13 @@ void m68000_mcu_device::divs_w_pais_dd_ipm() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154200,7 +154201,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154210,7 +154211,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154225,7 +154226,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154233,7 +154234,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -154261,7 +154262,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154287,7 +154288,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154419,7 +154420,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -154428,7 +154429,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -154436,12 +154437,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154449,7 +154450,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154466,7 +154467,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -154474,7 +154475,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154508,7 +154509,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -154535,13 +154536,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154549,27 +154550,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154581,7 +154582,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154593,7 +154594,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154608,7 +154609,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154617,7 +154618,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154625,7 +154626,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154635,7 +154636,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154644,7 +154645,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -154656,7 +154657,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -154708,7 +154709,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -154749,7 +154750,7 @@ void m68000_mcu_device::divs_w_das_dd_ipm() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -154778,13 +154779,13 @@ void m68000_mcu_device::divs_w_das_dd_ipm() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -154798,7 +154799,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154808,7 +154809,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -154823,7 +154824,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -154831,7 +154832,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -154859,7 +154860,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -154885,7 +154886,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155017,7 +155018,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155026,7 +155027,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155034,12 +155035,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155047,7 +155048,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155064,7 +155065,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155072,7 +155073,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155106,7 +155107,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155133,13 +155134,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155147,27 +155148,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155179,7 +155180,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155191,7 +155192,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155206,7 +155207,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155215,7 +155216,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155223,7 +155224,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155233,7 +155234,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155242,7 +155243,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155254,7 +155255,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155306,7 +155307,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155320,7 +155321,7 @@ void m68000_mcu_device::divs_w_dais_dd_ipm() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -155388,7 +155389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -155417,13 +155418,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155437,7 +155438,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155447,7 +155448,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155462,7 +155463,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -155470,7 +155471,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -155498,7 +155499,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -155524,7 +155525,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -155656,7 +155657,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -155665,7 +155666,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -155673,12 +155674,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155686,7 +155687,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155703,7 +155704,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -155711,7 +155712,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155745,7 +155746,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -155772,13 +155773,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155786,27 +155787,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155818,7 +155819,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155830,7 +155831,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -155845,7 +155846,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155854,7 +155855,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155862,7 +155863,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155872,7 +155873,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -155881,7 +155882,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -155893,7 +155894,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -155945,7 +155946,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -155987,7 +155988,7 @@ void m68000_mcu_device::divs_w_adr16_dd_ipm() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -156014,13 +156015,13 @@ void m68000_mcu_device::divs_w_adr16_dd_ipm() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156034,7 +156035,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156044,7 +156045,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156059,7 +156060,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156067,7 +156068,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -156095,7 +156096,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156121,7 +156122,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156253,7 +156254,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156262,7 +156263,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156270,12 +156271,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156283,7 +156284,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156300,7 +156301,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156308,7 +156309,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156342,7 +156343,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156369,13 +156370,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156383,27 +156384,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156415,7 +156416,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156427,7 +156428,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156442,7 +156443,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156451,7 +156452,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156459,7 +156460,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156469,7 +156470,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156478,7 +156479,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -156490,7 +156491,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -156542,7 +156543,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -156608,7 +156609,7 @@ void m68000_mcu_device::divs_w_adr32_dd_ipm() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156635,13 +156636,13 @@ void m68000_mcu_device::divs_w_adr32_dd_ipm() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -156655,7 +156656,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156665,7 +156666,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156680,7 +156681,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -156688,7 +156689,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -156716,7 +156717,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -156742,7 +156743,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
@@ -156874,7 +156875,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -156883,7 +156884,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -156891,12 +156892,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156904,7 +156905,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -156921,7 +156922,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -156929,7 +156930,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156963,7 +156964,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -156990,13 +156991,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157004,27 +157005,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157036,7 +157037,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157048,7 +157049,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157063,7 +157064,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157072,7 +157073,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157080,7 +157081,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157090,7 +157091,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157099,7 +157100,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157111,7 +157112,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157163,7 +157164,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157203,7 +157204,7 @@ void m68000_mcu_device::divs_w_dpc_dd_ipm() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157232,13 +157233,13 @@ void m68000_mcu_device::divs_w_dpc_dd_ipm() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157252,7 +157253,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157262,7 +157263,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157277,7 +157278,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157285,7 +157286,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157313,7 +157314,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157339,7 +157340,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -157471,7 +157472,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -157480,7 +157481,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -157488,12 +157489,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157501,7 +157502,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157518,7 +157519,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -157526,7 +157527,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -157560,7 +157561,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -157587,13 +157588,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157601,27 +157602,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157633,7 +157634,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157645,7 +157646,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157660,7 +157661,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157669,7 +157670,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157677,7 +157678,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157687,7 +157688,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157696,7 +157697,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -157708,7 +157709,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -157760,7 +157761,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -157773,7 +157774,7 @@ void m68000_mcu_device::divs_w_dpci_dd_ipm() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -157841,7 +157842,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -157870,13 +157871,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -157890,7 +157891,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157900,7 +157901,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -157915,7 +157916,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -157923,7 +157924,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -157951,7 +157952,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -157977,7 +157978,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -158109,7 +158110,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158118,7 +158119,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158126,12 +158127,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158139,7 +158140,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158156,7 +158157,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158164,7 +158165,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158198,7 +158199,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158225,13 +158226,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158239,27 +158240,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158271,7 +158272,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158283,7 +158284,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158298,7 +158299,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158307,7 +158308,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158315,7 +158316,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158325,7 +158326,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158334,7 +158335,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158346,7 +158347,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158398,7 +158399,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158442,13 +158443,13 @@ void m68000_mcu_device::divs_w_imm16_dd_ipm() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158462,7 +158463,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158472,7 +158473,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158487,7 +158488,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -158495,7 +158496,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
@@ -158523,7 +158524,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -158549,7 +158550,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
@@ -158681,7 +158682,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -158690,7 +158691,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -158698,12 +158699,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158711,7 +158712,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158728,7 +158729,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -158736,7 +158737,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -158770,7 +158771,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -158797,13 +158798,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158811,27 +158812,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158843,7 +158844,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158855,7 +158856,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -158870,7 +158871,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158879,7 +158880,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158887,7 +158888,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158897,7 +158898,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -158906,7 +158907,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -158918,7 +158919,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -158970,7 +158971,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -158988,7 +158989,7 @@ void m68000_mcu_device::sub_b_ds_dd_ipm() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159035,7 +159036,7 @@ void m68000_mcu_device::sub_b_ais_dd_ipm() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159060,7 +159061,7 @@ void m68000_mcu_device::sub_b_ais_dd_ipm() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159113,7 +159114,7 @@ void m68000_mcu_device::sub_b_aips_dd_ipm() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159136,7 +159137,7 @@ void m68000_mcu_device::sub_b_aips_dd_ipm() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159191,7 +159192,7 @@ void m68000_mcu_device::sub_b_pais_dd_ipm() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -159214,7 +159215,7 @@ void m68000_mcu_device::sub_b_pais_dd_ipm() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159286,7 +159287,7 @@ void m68000_mcu_device::sub_b_das_dd_ipm() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159311,7 +159312,7 @@ void m68000_mcu_device::sub_b_das_dd_ipm() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159356,7 +159357,7 @@ void m68000_mcu_device::sub_b_dais_dd_ipm() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159424,7 +159425,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159449,7 +159450,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159522,7 +159523,7 @@ void m68000_mcu_device::sub_b_adr16_dd_ipm() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -159545,7 +159546,7 @@ void m68000_mcu_device::sub_b_adr16_dd_ipm() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159642,7 +159643,7 @@ void m68000_mcu_device::sub_b_adr32_dd_ipm() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159665,7 +159666,7 @@ void m68000_mcu_device::sub_b_adr32_dd_ipm() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159736,7 +159737,7 @@ void m68000_mcu_device::sub_b_dpc_dd_ipm() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159761,7 +159762,7 @@ void m68000_mcu_device::sub_b_dpc_dd_ipm() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159805,7 +159806,7 @@ void m68000_mcu_device::sub_b_dpci_dd_ipm() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -159873,7 +159874,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -159898,7 +159899,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -159973,7 +159974,7 @@ void m68000_mcu_device::sub_b_imm8_dd_ipm() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160022,7 +160023,7 @@ void m68000_mcu_device::sub_w_ds_dd_ipm() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160071,7 +160072,7 @@ void m68000_mcu_device::sub_w_as_dd_ipm() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160118,7 +160119,7 @@ void m68000_mcu_device::sub_w_ais_dd_ipm() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160147,7 +160148,7 @@ void m68000_mcu_device::sub_w_ais_dd_ipm() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160200,7 +160201,7 @@ void m68000_mcu_device::sub_w_aips_dd_ipm() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160227,7 +160228,7 @@ void m68000_mcu_device::sub_w_aips_dd_ipm() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160282,7 +160283,7 @@ void m68000_mcu_device::sub_w_pais_dd_ipm() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160309,7 +160310,7 @@ void m68000_mcu_device::sub_w_pais_dd_ipm() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160381,7 +160382,7 @@ void m68000_mcu_device::sub_w_das_dd_ipm() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160410,7 +160411,7 @@ void m68000_mcu_device::sub_w_das_dd_ipm() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160455,7 +160456,7 @@ void m68000_mcu_device::sub_w_dais_dd_ipm() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160523,7 +160524,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160552,7 +160553,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160625,7 +160626,7 @@ void m68000_mcu_device::sub_w_adr16_dd_ipm() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -160652,7 +160653,7 @@ void m68000_mcu_device::sub_w_adr16_dd_ipm() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160749,7 +160750,7 @@ void m68000_mcu_device::sub_w_adr32_dd_ipm() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -160776,7 +160777,7 @@ void m68000_mcu_device::sub_w_adr32_dd_ipm() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160847,7 +160848,7 @@ void m68000_mcu_device::sub_w_dpc_dd_ipm() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -160876,7 +160877,7 @@ void m68000_mcu_device::sub_w_dpc_dd_ipm() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -160920,7 +160921,7 @@ void m68000_mcu_device::sub_w_dpci_dd_ipm() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -160988,7 +160989,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -161017,7 +161018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161092,7 +161093,7 @@ void m68000_mcu_device::sub_w_imm16_dd_ipm() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -161141,7 +161142,7 @@ void m68000_mcu_device::sub_l_ds_dd_ipm() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161168,7 +161169,7 @@ void m68000_mcu_device::sub_l_ds_dd_ipm() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161198,7 +161199,7 @@ void m68000_mcu_device::sub_l_as_dd_ipm() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -161225,7 +161226,7 @@ void m68000_mcu_device::sub_l_as_dd_ipm() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -161253,7 +161254,7 @@ void m68000_mcu_device::sub_l_ais_dd_ipm() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161306,12 +161307,12 @@ void m68000_mcu_device::sub_l_ais_dd_ipm() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161359,7 +161360,7 @@ void m68000_mcu_device::sub_l_aips_dd_ipm() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -161415,12 +161416,12 @@ void m68000_mcu_device::sub_l_aips_dd_ipm() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161467,7 +161468,7 @@ void m68000_mcu_device::sub_l_pais_dd_ipm() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -161525,12 +161526,12 @@ void m68000_mcu_device::sub_l_pais_dd_ipm() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161602,7 +161603,7 @@ void m68000_mcu_device::sub_l_das_dd_ipm() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161655,12 +161656,12 @@ void m68000_mcu_device::sub_l_das_dd_ipm() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161706,7 +161707,7 @@ void m68000_mcu_device::sub_l_dais_dd_ipm() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -161773,7 +161774,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161826,12 +161827,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -161905,7 +161906,7 @@ void m68000_mcu_device::sub_l_adr16_dd_ipm() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -161958,12 +161959,12 @@ void m68000_mcu_device::sub_l_adr16_dd_ipm() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162061,7 +162062,7 @@ void m68000_mcu_device::sub_l_adr32_dd_ipm() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162114,12 +162115,12 @@ void m68000_mcu_device::sub_l_adr32_dd_ipm() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162190,7 +162191,7 @@ void m68000_mcu_device::sub_l_dpc_dd_ipm() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162243,12 +162244,12 @@ void m68000_mcu_device::sub_l_dpc_dd_ipm() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162293,7 +162294,7 @@ void m68000_mcu_device::sub_l_dpci_dd_ipm() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -162360,7 +162361,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -162413,12 +162414,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -162518,7 +162519,7 @@ void m68000_mcu_device::sub_l_imm32_dd_ipm() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -162545,7 +162546,7 @@ void m68000_mcu_device::sub_l_imm32_dd_ipm() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -162575,7 +162576,7 @@ void m68000_mcu_device::suba_w_ds_ad_ipm() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162601,7 +162602,7 @@ void m68000_mcu_device::suba_w_ds_ad_ipm() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162630,7 +162631,7 @@ void m68000_mcu_device::suba_w_as_ad_ipm() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162656,7 +162657,7 @@ void m68000_mcu_device::suba_w_as_ad_ipm() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162683,7 +162684,7 @@ void m68000_mcu_device::suba_w_ais_ad_ipm() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162712,7 +162713,7 @@ void m68000_mcu_device::suba_w_ais_ad_ipm() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162738,7 +162739,7 @@ void m68000_mcu_device::suba_w_ais_ad_ipm() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162771,7 +162772,7 @@ void m68000_mcu_device::suba_w_aips_ad_ipm() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162798,7 +162799,7 @@ void m68000_mcu_device::suba_w_aips_ad_ipm() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162824,7 +162825,7 @@ void m68000_mcu_device::suba_w_aips_ad_ipm() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162859,7 +162860,7 @@ void m68000_mcu_device::suba_w_pais_ad_ipm() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162886,7 +162887,7 @@ void m68000_mcu_device::suba_w_pais_ad_ipm() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -162912,7 +162913,7 @@ void m68000_mcu_device::suba_w_pais_ad_ipm() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -162964,7 +162965,7 @@ void m68000_mcu_device::suba_w_das_ad_ipm() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -162993,7 +162994,7 @@ void m68000_mcu_device::suba_w_das_ad_ipm() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163019,7 +163020,7 @@ void m68000_mcu_device::suba_w_das_ad_ipm() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163044,7 +163045,7 @@ void m68000_mcu_device::suba_w_dais_ad_ipm() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163112,7 +163113,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163141,7 +163142,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163167,7 +163168,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163220,7 +163221,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ipm() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -163247,7 +163248,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ipm() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163273,7 +163274,7 @@ void m68000_mcu_device::suba_w_adr16_ad_ipm() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163350,7 +163351,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ipm() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -163377,7 +163378,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ipm() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163403,7 +163404,7 @@ void m68000_mcu_device::suba_w_adr32_ad_ipm() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163454,7 +163455,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ipm() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163483,7 +163484,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ipm() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163509,7 +163510,7 @@ void m68000_mcu_device::suba_w_dpc_ad_ipm() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163533,7 +163534,7 @@ void m68000_mcu_device::suba_w_dpci_ad_ipm() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -163601,7 +163602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -163630,7 +163631,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163656,7 +163657,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163711,7 +163712,7 @@ void m68000_mcu_device::suba_w_imm16_ad_ipm() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -163737,7 +163738,7 @@ void m68000_mcu_device::suba_w_imm16_ad_ipm() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -163766,7 +163767,7 @@ void m68000_mcu_device::subx_b_ds_dd_ipm() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -163819,7 +163820,7 @@ void m68000_mcu_device::subx_b_pais_paid_ipm() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -163864,7 +163865,7 @@ void m68000_mcu_device::subx_b_pais_paid_ipm() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163925,7 +163926,7 @@ void m68000_mcu_device::sub_b_dd_ais_ipm() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -163950,7 +163951,7 @@ void m68000_mcu_device::sub_b_dd_ais_ipm() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164017,7 +164018,7 @@ void m68000_mcu_device::sub_b_dd_aips_ipm() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164040,7 +164041,7 @@ void m68000_mcu_device::sub_b_dd_aips_ipm() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164109,7 +164110,7 @@ void m68000_mcu_device::sub_b_dd_pais_ipm() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -164132,7 +164133,7 @@ void m68000_mcu_device::sub_b_dd_pais_ipm() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164218,7 +164219,7 @@ void m68000_mcu_device::sub_b_dd_das_ipm() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164243,7 +164244,7 @@ void m68000_mcu_device::sub_b_dd_das_ipm() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164302,7 +164303,7 @@ void m68000_mcu_device::sub_b_dd_dais_ipm() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -164370,7 +164371,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164395,7 +164396,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164482,7 +164483,7 @@ void m68000_mcu_device::sub_b_dd_adr16_ipm() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -164505,7 +164506,7 @@ void m68000_mcu_device::sub_b_dd_adr16_ipm() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164616,7 +164617,7 @@ void m68000_mcu_device::sub_b_dd_adr32_ipm() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164639,7 +164640,7 @@ void m68000_mcu_device::sub_b_dd_adr32_ipm() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164702,7 +164703,7 @@ void m68000_mcu_device::subx_w_ds_dd_ipm() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -164755,7 +164756,7 @@ void m68000_mcu_device::subx_w_pais_paid_ipm() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -164808,7 +164809,7 @@ void m68000_mcu_device::subx_w_pais_paid_ipm() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164875,7 +164876,7 @@ void m68000_mcu_device::sub_w_dd_ais_ipm() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -164904,7 +164905,7 @@ void m68000_mcu_device::sub_w_dd_ais_ipm() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164977,7 +164978,7 @@ void m68000_mcu_device::sub_w_dd_aips_ipm() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165004,7 +165005,7 @@ void m68000_mcu_device::sub_w_dd_aips_ipm() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165079,7 +165080,7 @@ void m68000_mcu_device::sub_w_dd_pais_ipm() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165106,7 +165107,7 @@ void m68000_mcu_device::sub_w_dd_pais_ipm() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165198,7 +165199,7 @@ void m68000_mcu_device::sub_w_dd_das_ipm() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165227,7 +165228,7 @@ void m68000_mcu_device::sub_w_dd_das_ipm() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165292,7 +165293,7 @@ void m68000_mcu_device::sub_w_dd_dais_ipm() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -165360,7 +165361,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165389,7 +165390,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165482,7 +165483,7 @@ void m68000_mcu_device::sub_w_dd_adr16_ipm() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -165509,7 +165510,7 @@ void m68000_mcu_device::sub_w_dd_adr16_ipm() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165626,7 +165627,7 @@ void m68000_mcu_device::sub_w_dd_adr32_ipm() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -165653,7 +165654,7 @@ void m68000_mcu_device::sub_w_dd_adr32_ipm() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165722,7 +165723,7 @@ void m68000_mcu_device::subx_l_ds_dd_ipm() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -165749,7 +165750,7 @@ void m68000_mcu_device::subx_l_ds_dd_ipm() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -165807,7 +165808,7 @@ void m68000_mcu_device::subx_l_pais_paid_ipm() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -165860,7 +165861,7 @@ void m68000_mcu_device::subx_l_pais_paid_ipm() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -165910,7 +165911,7 @@ void m68000_mcu_device::subx_l_pais_paid_ipm() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165977,7 +165978,7 @@ void m68000_mcu_device::sub_l_dd_ais_ipm() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166030,7 +166031,7 @@ void m68000_mcu_device::sub_l_dd_ais_ipm() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166058,7 +166059,7 @@ void m68000_mcu_device::sub_l_dd_ais_ipm() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166123,7 +166124,7 @@ void m68000_mcu_device::sub_l_dd_aips_ipm() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -166179,7 +166180,7 @@ void m68000_mcu_device::sub_l_dd_aips_ipm() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166207,7 +166208,7 @@ void m68000_mcu_device::sub_l_dd_aips_ipm() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166271,7 +166272,7 @@ void m68000_mcu_device::sub_l_dd_pais_ipm() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -166329,7 +166330,7 @@ void m68000_mcu_device::sub_l_dd_pais_ipm() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166357,7 +166358,7 @@ void m68000_mcu_device::sub_l_dd_pais_ipm() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166446,7 +166447,7 @@ void m68000_mcu_device::sub_l_dd_das_ipm() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166499,7 +166500,7 @@ void m68000_mcu_device::sub_l_dd_das_ipm() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166527,7 +166528,7 @@ void m68000_mcu_device::sub_l_dd_das_ipm() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166590,7 +166591,7 @@ void m68000_mcu_device::sub_l_dd_dais_ipm() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -166657,7 +166658,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166710,7 +166711,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166738,7 +166739,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -166829,7 +166830,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ipm() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -166882,7 +166883,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ipm() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166910,7 +166911,7 @@ void m68000_mcu_device::sub_l_dd_adr16_ipm() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167025,7 +167026,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ipm() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167078,7 +167079,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ipm() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167106,7 +167107,7 @@ void m68000_mcu_device::sub_l_dd_adr32_ipm() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -167173,7 +167174,7 @@ void m68000_mcu_device::suba_l_ds_ad_ipm() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167199,7 +167200,7 @@ void m68000_mcu_device::suba_l_ds_ad_ipm() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167228,7 +167229,7 @@ void m68000_mcu_device::suba_l_as_ad_ipm() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -167254,7 +167255,7 @@ void m68000_mcu_device::suba_l_as_ad_ipm() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -167281,7 +167282,7 @@ void m68000_mcu_device::suba_l_ais_ad_ipm() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167334,11 +167335,11 @@ void m68000_mcu_device::suba_l_ais_ad_ipm() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167385,7 +167386,7 @@ void m68000_mcu_device::suba_l_aips_ad_ipm() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167441,11 +167442,11 @@ void m68000_mcu_device::suba_l_aips_ad_ipm() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167491,7 +167492,7 @@ void m68000_mcu_device::suba_l_pais_ad_ipm() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -167549,11 +167550,11 @@ void m68000_mcu_device::suba_l_pais_ad_ipm() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167624,7 +167625,7 @@ void m68000_mcu_device::suba_l_das_ad_ipm() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167677,11 +167678,11 @@ void m68000_mcu_device::suba_l_das_ad_ipm() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167726,7 +167727,7 @@ void m68000_mcu_device::suba_l_dais_ad_ipm() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -167793,7 +167794,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167846,11 +167847,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -167923,7 +167924,7 @@ void m68000_mcu_device::suba_l_adr16_ad_ipm() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -167976,11 +167977,11 @@ void m68000_mcu_device::suba_l_adr16_ad_ipm() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168077,7 +168078,7 @@ void m68000_mcu_device::suba_l_adr32_ad_ipm() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -168130,11 +168131,11 @@ void m68000_mcu_device::suba_l_adr32_ad_ipm() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168204,7 +168205,7 @@ void m68000_mcu_device::suba_l_dpc_ad_ipm() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168257,11 +168258,11 @@ void m68000_mcu_device::suba_l_dpc_ad_ipm() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168305,7 +168306,7 @@ void m68000_mcu_device::suba_l_dpci_ad_ipm() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -168372,7 +168373,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -168425,11 +168426,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -168528,7 +168529,7 @@ void m68000_mcu_device::suba_l_imm32_ad_ipm() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -168554,7 +168555,7 @@ void m68000_mcu_device::suba_l_imm32_ad_ipm() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -168583,7 +168584,7 @@ void m68000_mcu_device::cmp_b_ds_dd_ipm() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168629,7 +168630,7 @@ void m68000_mcu_device::cmp_b_ais_dd_ipm() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168654,7 +168655,7 @@ void m68000_mcu_device::cmp_b_ais_dd_ipm() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168706,7 +168707,7 @@ void m68000_mcu_device::cmp_b_aips_dd_ipm() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168729,7 +168730,7 @@ void m68000_mcu_device::cmp_b_aips_dd_ipm() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168783,7 +168784,7 @@ void m68000_mcu_device::cmp_b_pais_dd_ipm() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168806,7 +168807,7 @@ void m68000_mcu_device::cmp_b_pais_dd_ipm() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168877,7 +168878,7 @@ void m68000_mcu_device::cmp_b_das_dd_ipm() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -168902,7 +168903,7 @@ void m68000_mcu_device::cmp_b_das_dd_ipm() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -168946,7 +168947,7 @@ void m68000_mcu_device::cmp_b_dais_dd_ipm() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169014,7 +169015,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169039,7 +169040,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169111,7 +169112,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_ipm() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -169134,7 +169135,7 @@ void m68000_mcu_device::cmp_b_adr16_dd_ipm() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169230,7 +169231,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_ipm() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169253,7 +169254,7 @@ void m68000_mcu_device::cmp_b_adr32_dd_ipm() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169323,7 +169324,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_ipm() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169348,7 +169349,7 @@ void m68000_mcu_device::cmp_b_dpc_dd_ipm() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169391,7 +169392,7 @@ void m68000_mcu_device::cmp_b_dpci_dd_ipm() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -169459,7 +169460,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169484,7 +169485,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169558,7 +169559,7 @@ void m68000_mcu_device::cmp_b_imm8_dd_ipm() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169606,7 +169607,7 @@ void m68000_mcu_device::cmp_w_ds_dd_ipm() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169654,7 +169655,7 @@ void m68000_mcu_device::cmp_w_as_dd_ipm() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169700,7 +169701,7 @@ void m68000_mcu_device::cmp_w_ais_dd_ipm() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169729,7 +169730,7 @@ void m68000_mcu_device::cmp_w_ais_dd_ipm() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169781,7 +169782,7 @@ void m68000_mcu_device::cmp_w_aips_dd_ipm() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169808,7 +169809,7 @@ void m68000_mcu_device::cmp_w_aips_dd_ipm() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169862,7 +169863,7 @@ void m68000_mcu_device::cmp_w_pais_dd_ipm() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -169889,7 +169890,7 @@ void m68000_mcu_device::cmp_w_pais_dd_ipm() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -169960,7 +169961,7 @@ void m68000_mcu_device::cmp_w_das_dd_ipm() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169989,7 +169990,7 @@ void m68000_mcu_device::cmp_w_das_dd_ipm() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170033,7 +170034,7 @@ void m68000_mcu_device::cmp_w_dais_dd_ipm() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170101,7 +170102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170130,7 +170131,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170202,7 +170203,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_ipm() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -170229,7 +170230,7 @@ void m68000_mcu_device::cmp_w_adr16_dd_ipm() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170325,7 +170326,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_ipm() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -170352,7 +170353,7 @@ void m68000_mcu_device::cmp_w_adr32_dd_ipm() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170422,7 +170423,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_ipm() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170451,7 +170452,7 @@ void m68000_mcu_device::cmp_w_dpc_dd_ipm() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170494,7 +170495,7 @@ void m68000_mcu_device::cmp_w_dpci_dd_ipm() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170562,7 +170563,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170591,7 +170592,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170665,7 +170666,7 @@ void m68000_mcu_device::cmp_w_imm16_dd_ipm() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -170713,11 +170714,11 @@ void m68000_mcu_device::cmp_l_ds_dd_ipm() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170766,11 +170767,11 @@ void m68000_mcu_device::cmp_l_as_dd_ipm() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170817,7 +170818,7 @@ void m68000_mcu_device::cmp_l_ais_dd_ipm() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170870,11 +170871,11 @@ void m68000_mcu_device::cmp_l_ais_dd_ipm() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170921,7 +170922,7 @@ void m68000_mcu_device::cmp_l_aips_dd_ipm() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170977,11 +170978,11 @@ void m68000_mcu_device::cmp_l_aips_dd_ipm() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171027,7 +171028,7 @@ void m68000_mcu_device::cmp_l_pais_dd_ipm() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -171085,11 +171086,11 @@ void m68000_mcu_device::cmp_l_pais_dd_ipm() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171160,7 +171161,7 @@ void m68000_mcu_device::cmp_l_das_dd_ipm() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171213,11 +171214,11 @@ void m68000_mcu_device::cmp_l_das_dd_ipm() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171262,7 +171263,7 @@ void m68000_mcu_device::cmp_l_dais_dd_ipm() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171329,7 +171330,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171382,11 +171383,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171459,7 +171460,7 @@ void m68000_mcu_device::cmp_l_adr16_dd_ipm() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -171512,11 +171513,11 @@ void m68000_mcu_device::cmp_l_adr16_dd_ipm() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171613,7 +171614,7 @@ void m68000_mcu_device::cmp_l_adr32_dd_ipm() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171666,11 +171667,11 @@ void m68000_mcu_device::cmp_l_adr32_dd_ipm() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171740,7 +171741,7 @@ void m68000_mcu_device::cmp_l_dpc_dd_ipm() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171793,11 +171794,11 @@ void m68000_mcu_device::cmp_l_dpc_dd_ipm() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171841,7 +171842,7 @@ void m68000_mcu_device::cmp_l_dpci_dd_ipm() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -171908,7 +171909,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -171961,11 +171962,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172064,11 +172065,11 @@ void m68000_mcu_device::cmp_l_imm32_dd_ipm() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172117,11 +172118,11 @@ void m68000_mcu_device::cmpa_w_ds_ad_ipm() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172170,11 +172171,11 @@ void m68000_mcu_device::cmpa_w_as_ad_ipm() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172221,7 +172222,7 @@ void m68000_mcu_device::cmpa_w_ais_ad_ipm() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172250,11 +172251,11 @@ void m68000_mcu_device::cmpa_w_ais_ad_ipm() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172307,7 +172308,7 @@ void m68000_mcu_device::cmpa_w_aips_ad_ipm() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172334,11 +172335,11 @@ void m68000_mcu_device::cmpa_w_aips_ad_ipm() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172393,7 +172394,7 @@ void m68000_mcu_device::cmpa_w_pais_ad_ipm() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172420,11 +172421,11 @@ void m68000_mcu_device::cmpa_w_pais_ad_ipm() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172496,7 +172497,7 @@ void m68000_mcu_device::cmpa_w_das_ad_ipm() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172525,11 +172526,11 @@ void m68000_mcu_device::cmpa_w_das_ad_ipm() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172574,7 +172575,7 @@ void m68000_mcu_device::cmpa_w_dais_ad_ipm() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -172642,7 +172643,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -172671,11 +172672,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172748,7 +172749,7 @@ void m68000_mcu_device::cmpa_w_adr16_ad_ipm() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -172775,11 +172776,11 @@ void m68000_mcu_device::cmpa_w_adr16_ad_ipm() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172876,7 +172877,7 @@ void m68000_mcu_device::cmpa_w_adr32_ad_ipm() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172903,11 +172904,11 @@ void m68000_mcu_device::cmpa_w_adr32_ad_ipm() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172978,7 +172979,7 @@ void m68000_mcu_device::cmpa_w_dpc_ad_ipm() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173007,11 +173008,11 @@ void m68000_mcu_device::cmpa_w_dpc_ad_ipm() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173055,7 +173056,7 @@ void m68000_mcu_device::cmpa_w_dpci_ad_ipm() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -173123,7 +173124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -173152,11 +173153,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173231,11 +173232,11 @@ void m68000_mcu_device::cmpa_w_imm16_ad_ipm() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173283,7 +173284,7 @@ void m68000_mcu_device::eor_b_dd_ds_ipm() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -173291,7 +173292,7 @@ void m68000_mcu_device::eor_b_dd_ds_ipm() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173356,7 +173357,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_ipm() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -173380,7 +173381,7 @@ void m68000_mcu_device::cmpm_b_aips_aipd_ipm() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173422,11 +173423,11 @@ void m68000_mcu_device::eor_b_dd_ais_ipm() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173448,7 +173449,7 @@ void m68000_mcu_device::eor_b_dd_ais_ipm() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173478,7 +173479,7 @@ void m68000_mcu_device::eor_b_dd_ais_ipm() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173513,12 +173514,12 @@ void m68000_mcu_device::eor_b_dd_aips_ipm() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173541,7 +173542,7 @@ void m68000_mcu_device::eor_b_dd_aips_ipm() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173571,7 +173572,7 @@ void m68000_mcu_device::eor_b_dd_aips_ipm() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173605,7 +173606,7 @@ void m68000_mcu_device::eor_b_dd_pais_ipm() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173613,7 +173614,7 @@ void m68000_mcu_device::eor_b_dd_pais_ipm() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173636,7 +173637,7 @@ void m68000_mcu_device::eor_b_dd_pais_ipm() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173666,7 +173667,7 @@ void m68000_mcu_device::eor_b_dd_pais_ipm() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173698,7 +173699,7 @@ void m68000_mcu_device::eor_b_dd_das_ipm() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173724,11 +173725,11 @@ void m68000_mcu_device::eor_b_dd_das_ipm() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173750,7 +173751,7 @@ void m68000_mcu_device::eor_b_dd_das_ipm() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68000_mcu_device::eor_b_dd_das_ipm() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173810,14 +173811,14 @@ void m68000_mcu_device::eor_b_dd_dais_ipm() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -173825,7 +173826,7 @@ void m68000_mcu_device::eor_b_dd_dais_ipm() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173852,7 +173853,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -173881,11 +173882,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -173907,7 +173908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173937,7 +173938,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -173971,7 +173972,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ipm() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173997,7 +173998,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ipm() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174020,7 +174021,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ipm() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174050,7 +174051,7 @@ void m68000_mcu_device::eor_b_dd_adr16_ipm() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174082,7 +174083,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ipm() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174109,7 +174110,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ipm() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -174135,7 +174136,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ipm() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174158,7 +174159,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ipm() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174188,7 +174189,7 @@ void m68000_mcu_device::eor_b_dd_adr32_ipm() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -174221,7 +174222,7 @@ void m68000_mcu_device::eor_w_dd_ds_ipm() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -174229,7 +174230,7 @@ void m68000_mcu_device::eor_w_dd_ds_ipm() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174298,7 +174299,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_ipm() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -174326,7 +174327,7 @@ void m68000_mcu_device::cmpm_w_aips_aipd_ipm() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174368,11 +174369,11 @@ void m68000_mcu_device::eor_w_dd_ais_ipm() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174398,7 +174399,7 @@ void m68000_mcu_device::eor_w_dd_ais_ipm() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174428,7 +174429,7 @@ void m68000_mcu_device::eor_w_dd_ais_ipm() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174469,12 +174470,12 @@ void m68000_mcu_device::eor_w_dd_aips_ipm() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174501,7 +174502,7 @@ void m68000_mcu_device::eor_w_dd_aips_ipm() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174531,7 +174532,7 @@ void m68000_mcu_device::eor_w_dd_aips_ipm() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174571,7 +174572,7 @@ void m68000_mcu_device::eor_w_dd_pais_ipm() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -174579,7 +174580,7 @@ void m68000_mcu_device::eor_w_dd_pais_ipm() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -174606,7 +174607,7 @@ void m68000_mcu_device::eor_w_dd_pais_ipm() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174636,7 +174637,7 @@ void m68000_mcu_device::eor_w_dd_pais_ipm() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174674,7 +174675,7 @@ void m68000_mcu_device::eor_w_dd_das_ipm() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174700,11 +174701,11 @@ void m68000_mcu_device::eor_w_dd_das_ipm() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174730,7 +174731,7 @@ void m68000_mcu_device::eor_w_dd_das_ipm() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174760,7 +174761,7 @@ void m68000_mcu_device::eor_w_dd_das_ipm() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174796,14 +174797,14 @@ void m68000_mcu_device::eor_w_dd_dais_ipm() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174811,7 +174812,7 @@ void m68000_mcu_device::eor_w_dd_dais_ipm() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174838,7 +174839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -174867,11 +174868,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -174897,7 +174898,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174927,7 +174928,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -174967,7 +174968,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ipm() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174993,7 +174994,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ipm() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175020,7 +175021,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ipm() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175050,7 +175051,7 @@ void m68000_mcu_device::eor_w_dd_adr16_ipm() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175088,7 +175089,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ipm() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175115,7 +175116,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ipm() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -175141,7 +175142,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ipm() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175168,7 +175169,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ipm() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175198,7 +175199,7 @@ void m68000_mcu_device::eor_w_dd_adr32_ipm() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175237,12 +175238,12 @@ void m68000_mcu_device::eor_l_dd_ds_ipm() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175265,7 +175266,7 @@ void m68000_mcu_device::eor_l_dd_ds_ipm() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -175274,7 +175275,7 @@ void m68000_mcu_device::eor_l_dd_ds_ipm() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -175347,7 +175348,7 @@ void m68000_mcu_device::cmpm_l_aips_aipd_ipm() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -175397,13 +175398,13 @@ void m68000_mcu_device::cmpm_l_aips_aipd_ipm() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175445,7 +175446,7 @@ void m68000_mcu_device::eor_l_dd_ais_ipm() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175473,7 +175474,7 @@ void m68000_mcu_device::eor_l_dd_ais_ipm() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175499,7 +175500,7 @@ void m68000_mcu_device::eor_l_dd_ais_ipm() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175527,7 +175528,7 @@ void m68000_mcu_device::eor_l_dd_ais_ipm() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175555,7 +175556,7 @@ void m68000_mcu_device::eor_l_dd_ais_ipm() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175593,7 +175594,7 @@ void m68000_mcu_device::eor_l_dd_aips_ipm() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175621,11 +175622,11 @@ void m68000_mcu_device::eor_l_dd_aips_ipm() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175651,7 +175652,7 @@ void m68000_mcu_device::eor_l_dd_aips_ipm() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175679,7 +175680,7 @@ void m68000_mcu_device::eor_l_dd_aips_ipm() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175707,7 +175708,7 @@ void m68000_mcu_device::eor_l_dd_aips_ipm() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175744,14 +175745,14 @@ void m68000_mcu_device::eor_l_dd_pais_ipm() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175778,7 +175779,7 @@ void m68000_mcu_device::eor_l_dd_pais_ipm() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175804,7 +175805,7 @@ void m68000_mcu_device::eor_l_dd_pais_ipm() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175832,7 +175833,7 @@ void m68000_mcu_device::eor_l_dd_pais_ipm() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -175860,7 +175861,7 @@ void m68000_mcu_device::eor_l_dd_pais_ipm() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -175898,7 +175899,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -175923,7 +175924,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -175951,7 +175952,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -175977,7 +175978,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176005,7 +176006,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176033,7 +176034,7 @@ void m68000_mcu_device::eor_l_dd_das_ipm() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176069,14 +176070,14 @@ void m68000_mcu_device::eor_l_dd_dais_ipm() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -176084,7 +176085,7 @@ void m68000_mcu_device::eor_l_dd_dais_ipm() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176111,7 +176112,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176139,7 +176140,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176167,7 +176168,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176193,7 +176194,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176221,7 +176222,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176249,7 +176250,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176289,7 +176290,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176315,7 +176316,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -176343,7 +176344,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176369,7 +176370,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176397,7 +176398,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176425,7 +176426,7 @@ void m68000_mcu_device::eor_l_dd_adr16_ipm() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176463,7 +176464,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -176490,7 +176491,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -176516,7 +176517,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176544,7 +176545,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -176570,7 +176571,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176598,7 +176599,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -176626,7 +176627,7 @@ void m68000_mcu_device::eor_l_dd_adr32_ipm() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -176666,11 +176667,11 @@ void m68000_mcu_device::cmpa_l_ds_ad_ipm() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176719,11 +176720,11 @@ void m68000_mcu_device::cmpa_l_as_ad_ipm() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176770,7 +176771,7 @@ void m68000_mcu_device::cmpa_l_ais_ad_ipm() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176823,11 +176824,11 @@ void m68000_mcu_device::cmpa_l_ais_ad_ipm() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176874,7 +176875,7 @@ void m68000_mcu_device::cmpa_l_aips_ad_ipm() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176930,11 +176931,11 @@ void m68000_mcu_device::cmpa_l_aips_ad_ipm() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176980,7 +176981,7 @@ void m68000_mcu_device::cmpa_l_pais_ad_ipm() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -177038,11 +177039,11 @@ void m68000_mcu_device::cmpa_l_pais_ad_ipm() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177113,7 +177114,7 @@ void m68000_mcu_device::cmpa_l_das_ad_ipm() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177166,11 +177167,11 @@ void m68000_mcu_device::cmpa_l_das_ad_ipm() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177215,7 +177216,7 @@ void m68000_mcu_device::cmpa_l_dais_ad_ipm() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177282,7 +177283,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177335,11 +177336,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177412,7 +177413,7 @@ void m68000_mcu_device::cmpa_l_adr16_ad_ipm() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -177465,11 +177466,11 @@ void m68000_mcu_device::cmpa_l_adr16_ad_ipm() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177566,7 +177567,7 @@ void m68000_mcu_device::cmpa_l_adr32_ad_ipm() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177619,11 +177620,11 @@ void m68000_mcu_device::cmpa_l_adr32_ad_ipm() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177693,7 +177694,7 @@ void m68000_mcu_device::cmpa_l_dpc_ad_ipm() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177746,11 +177747,11 @@ void m68000_mcu_device::cmpa_l_dpc_ad_ipm() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177794,7 +177795,7 @@ void m68000_mcu_device::cmpa_l_dpci_ad_ipm() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -177861,7 +177862,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -177914,11 +177915,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178017,11 +178018,11 @@ void m68000_mcu_device::cmpa_l_imm32_ad_ipm() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178070,7 +178071,7 @@ void m68000_mcu_device::and_b_ds_dd_ipm() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178078,7 +178079,7 @@ void m68000_mcu_device::and_b_ds_dd_ipm() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178118,11 +178119,11 @@ void m68000_mcu_device::and_b_ais_dd_ipm() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178144,7 +178145,7 @@ void m68000_mcu_device::and_b_ais_dd_ipm() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178152,7 +178153,7 @@ void m68000_mcu_device::and_b_ais_dd_ipm() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178195,12 +178196,12 @@ void m68000_mcu_device::and_b_aips_dd_ipm() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178223,7 +178224,7 @@ void m68000_mcu_device::and_b_aips_dd_ipm() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178231,7 +178232,7 @@ void m68000_mcu_device::and_b_aips_dd_ipm() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178273,7 +178274,7 @@ void m68000_mcu_device::and_b_pais_dd_ipm() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178281,7 +178282,7 @@ void m68000_mcu_device::and_b_pais_dd_ipm() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178304,7 +178305,7 @@ void m68000_mcu_device::and_b_pais_dd_ipm() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178312,7 +178313,7 @@ void m68000_mcu_device::and_b_pais_dd_ipm() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178352,7 +178353,7 @@ void m68000_mcu_device::and_b_das_dd_ipm() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178378,11 +178379,11 @@ void m68000_mcu_device::and_b_das_dd_ipm() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178404,7 +178405,7 @@ void m68000_mcu_device::and_b_das_dd_ipm() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178412,7 +178413,7 @@ void m68000_mcu_device::and_b_das_dd_ipm() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178450,14 +178451,14 @@ void m68000_mcu_device::and_b_dais_dd_ipm() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178465,7 +178466,7 @@ void m68000_mcu_device::and_b_dais_dd_ipm() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178492,7 +178493,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178521,11 +178522,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178547,7 +178548,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178555,7 +178556,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178597,7 +178598,7 @@ void m68000_mcu_device::and_b_adr16_dd_ipm() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178623,7 +178624,7 @@ void m68000_mcu_device::and_b_adr16_dd_ipm() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -178646,7 +178647,7 @@ void m68000_mcu_device::and_b_adr16_dd_ipm() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178654,7 +178655,7 @@ void m68000_mcu_device::and_b_adr16_dd_ipm() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178694,7 +178695,7 @@ void m68000_mcu_device::and_b_adr32_dd_ipm() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178721,7 +178722,7 @@ void m68000_mcu_device::and_b_adr32_dd_ipm() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -178747,7 +178748,7 @@ void m68000_mcu_device::and_b_adr32_dd_ipm() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -178770,7 +178771,7 @@ void m68000_mcu_device::and_b_adr32_dd_ipm() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178778,7 +178779,7 @@ void m68000_mcu_device::and_b_adr32_dd_ipm() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178817,7 +178818,7 @@ void m68000_mcu_device::and_b_dpc_dd_ipm() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178843,11 +178844,11 @@ void m68000_mcu_device::and_b_dpc_dd_ipm() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -178869,7 +178870,7 @@ void m68000_mcu_device::and_b_dpc_dd_ipm() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -178877,7 +178878,7 @@ void m68000_mcu_device::and_b_dpc_dd_ipm() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178914,14 +178915,14 @@ void m68000_mcu_device::and_b_dpci_dd_ipm() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -178929,7 +178930,7 @@ void m68000_mcu_device::and_b_dpci_dd_ipm() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178956,7 +178957,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -178985,11 +178986,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -179011,7 +179012,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179019,7 +179020,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179061,7 +179062,7 @@ void m68000_mcu_device::and_b_imm8_dd_ipm() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179088,7 +179089,7 @@ void m68000_mcu_device::and_b_imm8_dd_ipm() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179096,7 +179097,7 @@ void m68000_mcu_device::and_b_imm8_dd_ipm() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179138,7 +179139,7 @@ void m68000_mcu_device::and_w_ds_dd_ipm() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179146,7 +179147,7 @@ void m68000_mcu_device::and_w_ds_dd_ipm() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179186,11 +179187,11 @@ void m68000_mcu_device::and_w_ais_dd_ipm() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179216,7 +179217,7 @@ void m68000_mcu_device::and_w_ais_dd_ipm() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179224,7 +179225,7 @@ void m68000_mcu_device::and_w_ais_dd_ipm() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179267,12 +179268,12 @@ void m68000_mcu_device::and_w_aips_dd_ipm() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179299,7 +179300,7 @@ void m68000_mcu_device::and_w_aips_dd_ipm() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179307,7 +179308,7 @@ void m68000_mcu_device::and_w_aips_dd_ipm() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179349,7 +179350,7 @@ void m68000_mcu_device::and_w_pais_dd_ipm() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -179357,7 +179358,7 @@ void m68000_mcu_device::and_w_pais_dd_ipm() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -179384,7 +179385,7 @@ void m68000_mcu_device::and_w_pais_dd_ipm() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179392,7 +179393,7 @@ void m68000_mcu_device::and_w_pais_dd_ipm() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179432,7 +179433,7 @@ void m68000_mcu_device::and_w_das_dd_ipm() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179458,11 +179459,11 @@ void m68000_mcu_device::and_w_das_dd_ipm() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179488,7 +179489,7 @@ void m68000_mcu_device::and_w_das_dd_ipm() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179496,7 +179497,7 @@ void m68000_mcu_device::and_w_das_dd_ipm() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179534,14 +179535,14 @@ void m68000_mcu_device::and_w_dais_dd_ipm() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179549,7 +179550,7 @@ void m68000_mcu_device::and_w_dais_dd_ipm() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179576,7 +179577,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179605,11 +179606,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -179635,7 +179636,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179643,7 +179644,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179685,7 +179686,7 @@ void m68000_mcu_device::and_w_adr16_dd_ipm() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179711,7 +179712,7 @@ void m68000_mcu_device::and_w_adr16_dd_ipm() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -179738,7 +179739,7 @@ void m68000_mcu_device::and_w_adr16_dd_ipm() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179746,7 +179747,7 @@ void m68000_mcu_device::and_w_adr16_dd_ipm() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179786,7 +179787,7 @@ void m68000_mcu_device::and_w_adr32_dd_ipm() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179813,7 +179814,7 @@ void m68000_mcu_device::and_w_adr32_dd_ipm() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -179839,7 +179840,7 @@ void m68000_mcu_device::and_w_adr32_dd_ipm() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179866,7 +179867,7 @@ void m68000_mcu_device::and_w_adr32_dd_ipm() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179874,7 +179875,7 @@ void m68000_mcu_device::and_w_adr32_dd_ipm() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179913,7 +179914,7 @@ void m68000_mcu_device::and_w_dpc_dd_ipm() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179939,11 +179940,11 @@ void m68000_mcu_device::and_w_dpc_dd_ipm() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -179969,7 +179970,7 @@ void m68000_mcu_device::and_w_dpc_dd_ipm() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -179977,7 +179978,7 @@ void m68000_mcu_device::and_w_dpc_dd_ipm() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180014,14 +180015,14 @@ void m68000_mcu_device::and_w_dpci_dd_ipm() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180029,7 +180030,7 @@ void m68000_mcu_device::and_w_dpci_dd_ipm() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180056,7 +180057,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180085,11 +180086,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180115,7 +180116,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180123,7 +180124,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180165,7 +180166,7 @@ void m68000_mcu_device::and_w_imm16_dd_ipm() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180192,7 +180193,7 @@ void m68000_mcu_device::and_w_imm16_dd_ipm() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -180200,7 +180201,7 @@ void m68000_mcu_device::and_w_imm16_dd_ipm() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180242,12 +180243,12 @@ void m68000_mcu_device::and_l_ds_dd_ipm() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180270,7 +180271,7 @@ void m68000_mcu_device::and_l_ds_dd_ipm() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -180279,7 +180280,7 @@ void m68000_mcu_device::and_l_ds_dd_ipm() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180299,7 +180300,7 @@ void m68000_mcu_device::and_l_ais_dd_ipm() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180327,7 +180328,7 @@ void m68000_mcu_device::and_l_ais_dd_ipm() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180353,12 +180354,12 @@ void m68000_mcu_device::and_l_ais_dd_ipm() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180387,7 +180388,7 @@ void m68000_mcu_device::and_l_ais_dd_ipm() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180407,7 +180408,7 @@ void m68000_mcu_device::and_l_aips_dd_ipm() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180435,11 +180436,11 @@ void m68000_mcu_device::and_l_aips_dd_ipm() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180465,12 +180466,12 @@ void m68000_mcu_device::and_l_aips_dd_ipm() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180499,7 +180500,7 @@ void m68000_mcu_device::and_l_aips_dd_ipm() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180518,14 +180519,14 @@ void m68000_mcu_device::and_l_pais_dd_ipm() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180552,7 +180553,7 @@ void m68000_mcu_device::and_l_pais_dd_ipm() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180578,12 +180579,12 @@ void m68000_mcu_device::and_l_pais_dd_ipm() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180612,7 +180613,7 @@ void m68000_mcu_device::and_l_pais_dd_ipm() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180632,7 +180633,7 @@ void m68000_mcu_device::and_l_das_dd_ipm() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180657,7 +180658,7 @@ void m68000_mcu_device::and_l_das_dd_ipm() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180685,7 +180686,7 @@ void m68000_mcu_device::and_l_das_dd_ipm() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180711,12 +180712,12 @@ void m68000_mcu_device::and_l_das_dd_ipm() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180745,7 +180746,7 @@ void m68000_mcu_device::and_l_das_dd_ipm() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180763,14 +180764,14 @@ void m68000_mcu_device::and_l_dais_dd_ipm() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -180778,7 +180779,7 @@ void m68000_mcu_device::and_l_dais_dd_ipm() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180805,7 +180806,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -180833,7 +180834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180861,7 +180862,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -180887,12 +180888,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180921,7 +180922,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -180943,7 +180944,7 @@ void m68000_mcu_device::and_l_adr16_dd_ipm() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -180969,7 +180970,7 @@ void m68000_mcu_device::and_l_adr16_dd_ipm() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -180997,7 +180998,7 @@ void m68000_mcu_device::and_l_adr16_dd_ipm() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181023,12 +181024,12 @@ void m68000_mcu_device::and_l_adr16_dd_ipm() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181057,7 +181058,7 @@ void m68000_mcu_device::and_l_adr16_dd_ipm() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181077,7 +181078,7 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181104,7 +181105,7 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181130,7 +181131,7 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181158,7 +181159,7 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -181184,12 +181185,12 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181218,7 +181219,7 @@ void m68000_mcu_device::and_l_adr32_dd_ipm() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181237,7 +181238,7 @@ void m68000_mcu_device::and_l_dpc_dd_ipm() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181262,7 +181263,7 @@ void m68000_mcu_device::and_l_dpc_dd_ipm() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181290,7 +181291,7 @@ void m68000_mcu_device::and_l_dpc_dd_ipm() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181316,12 +181317,12 @@ void m68000_mcu_device::and_l_dpc_dd_ipm() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181350,7 +181351,7 @@ void m68000_mcu_device::and_l_dpc_dd_ipm() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181367,14 +181368,14 @@ void m68000_mcu_device::and_l_dpci_dd_ipm() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -181382,7 +181383,7 @@ void m68000_mcu_device::and_l_dpci_dd_ipm() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181409,7 +181410,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181437,7 +181438,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -181465,7 +181466,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181491,12 +181492,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181525,7 +181526,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181545,7 +181546,7 @@ void m68000_mcu_device::and_l_imm32_dd_ipm() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181572,7 +181573,7 @@ void m68000_mcu_device::and_l_imm32_dd_ipm() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181599,12 +181600,12 @@ void m68000_mcu_device::and_l_imm32_dd_ipm() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -181627,7 +181628,7 @@ void m68000_mcu_device::and_l_imm32_dd_ipm() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -181636,7 +181637,7 @@ void m68000_mcu_device::and_l_imm32_dd_ipm() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -181660,7 +181661,7 @@ void m68000_mcu_device::mulu_w_ds_dd_ipm() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181696,7 +181697,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181708,7 +181709,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181720,7 +181721,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181742,7 +181743,7 @@ void m68000_mcu_device::mulu_w_ais_dd_ipm() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181773,7 +181774,7 @@ void m68000_mcu_device::mulu_w_ais_dd_ipm() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181809,7 +181810,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181821,7 +181822,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181833,7 +181834,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181861,7 +181862,7 @@ void m68000_mcu_device::mulu_w_aips_dd_ipm() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -181890,7 +181891,7 @@ void m68000_mcu_device::mulu_w_aips_dd_ipm() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -181926,7 +181927,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181938,7 +181939,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -181950,7 +181951,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -181980,7 +181981,7 @@ void m68000_mcu_device::mulu_w_pais_dd_ipm() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -182009,7 +182010,7 @@ void m68000_mcu_device::mulu_w_pais_dd_ipm() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182045,7 +182046,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182057,7 +182058,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182069,7 +182070,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182116,7 +182117,7 @@ void m68000_mcu_device::mulu_w_das_dd_ipm() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182147,7 +182148,7 @@ void m68000_mcu_device::mulu_w_das_dd_ipm() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182183,7 +182184,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182195,7 +182196,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182207,7 +182208,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182227,7 +182228,7 @@ void m68000_mcu_device::mulu_w_dais_dd_ipm() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182295,7 +182296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182326,7 +182327,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182362,7 +182363,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182374,7 +182375,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182386,7 +182387,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182434,7 +182435,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_ipm() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -182463,7 +182464,7 @@ void m68000_mcu_device::mulu_w_adr16_dd_ipm() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182499,7 +182500,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182511,7 +182512,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182523,7 +182524,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182595,7 +182596,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_ipm() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -182624,7 +182625,7 @@ void m68000_mcu_device::mulu_w_adr32_dd_ipm() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182660,7 +182661,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182672,7 +182673,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182684,7 +182685,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182730,7 +182731,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_ipm() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182761,7 +182762,7 @@ void m68000_mcu_device::mulu_w_dpc_dd_ipm() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182797,7 +182798,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182809,7 +182810,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182821,7 +182822,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -182840,7 +182841,7 @@ void m68000_mcu_device::mulu_w_dpci_dd_ipm() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182908,7 +182909,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182939,7 +182940,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -182975,7 +182976,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182987,7 +182988,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -182999,7 +183000,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183051,7 +183052,7 @@ void m68000_mcu_device::mulu_w_imm16_dd_ipm() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -183087,7 +183088,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183099,7 +183100,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -183111,7 +183112,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -183135,12 +183136,12 @@ void m68000_mcu_device::abcd_ds_dd_ipm() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183192,7 +183193,7 @@ void m68000_mcu_device::abcd_pais_paid_ipm() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -183236,12 +183237,12 @@ void m68000_mcu_device::abcd_pais_paid_ipm() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183300,11 +183301,11 @@ void m68000_mcu_device::and_b_dd_ais_ipm() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183326,7 +183327,7 @@ void m68000_mcu_device::and_b_dd_ais_ipm() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183356,7 +183357,7 @@ void m68000_mcu_device::and_b_dd_ais_ipm() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183391,12 +183392,12 @@ void m68000_mcu_device::and_b_dd_aips_ipm() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183419,7 +183420,7 @@ void m68000_mcu_device::and_b_dd_aips_ipm() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183449,7 +183450,7 @@ void m68000_mcu_device::and_b_dd_aips_ipm() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183483,7 +183484,7 @@ void m68000_mcu_device::and_b_dd_pais_ipm() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -183491,7 +183492,7 @@ void m68000_mcu_device::and_b_dd_pais_ipm() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -183514,7 +183515,7 @@ void m68000_mcu_device::and_b_dd_pais_ipm() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183544,7 +183545,7 @@ void m68000_mcu_device::and_b_dd_pais_ipm() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183576,7 +183577,7 @@ void m68000_mcu_device::and_b_dd_das_ipm() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183602,11 +183603,11 @@ void m68000_mcu_device::and_b_dd_das_ipm() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183628,7 +183629,7 @@ void m68000_mcu_device::and_b_dd_das_ipm() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183658,7 +183659,7 @@ void m68000_mcu_device::and_b_dd_das_ipm() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183688,14 +183689,14 @@ void m68000_mcu_device::and_b_dd_dais_ipm() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -183703,7 +183704,7 @@ void m68000_mcu_device::and_b_dd_dais_ipm() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183730,7 +183731,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183759,11 +183760,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -183785,7 +183786,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183815,7 +183816,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183849,7 +183850,7 @@ void m68000_mcu_device::and_b_dd_adr16_ipm() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -183875,7 +183876,7 @@ void m68000_mcu_device::and_b_dd_adr16_ipm() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -183898,7 +183899,7 @@ void m68000_mcu_device::and_b_dd_adr16_ipm() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -183928,7 +183929,7 @@ void m68000_mcu_device::and_b_dd_adr16_ipm() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -183960,7 +183961,7 @@ void m68000_mcu_device::and_b_dd_adr32_ipm() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -183987,7 +183988,7 @@ void m68000_mcu_device::and_b_dd_adr32_ipm() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184013,7 +184014,7 @@ void m68000_mcu_device::and_b_dd_adr32_ipm() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -184036,7 +184037,7 @@ void m68000_mcu_device::and_b_dd_adr32_ipm() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184066,7 +184067,7 @@ void m68000_mcu_device::and_b_dd_adr32_ipm() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -184200,11 +184201,11 @@ void m68000_mcu_device::and_w_dd_ais_ipm() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184230,7 +184231,7 @@ void m68000_mcu_device::and_w_dd_ais_ipm() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184260,7 +184261,7 @@ void m68000_mcu_device::and_w_dd_ais_ipm() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184301,12 +184302,12 @@ void m68000_mcu_device::and_w_dd_aips_ipm() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184333,7 +184334,7 @@ void m68000_mcu_device::and_w_dd_aips_ipm() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184363,7 +184364,7 @@ void m68000_mcu_device::and_w_dd_aips_ipm() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184403,7 +184404,7 @@ void m68000_mcu_device::and_w_dd_pais_ipm() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -184411,7 +184412,7 @@ void m68000_mcu_device::and_w_dd_pais_ipm() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -184438,7 +184439,7 @@ void m68000_mcu_device::and_w_dd_pais_ipm() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184468,7 +184469,7 @@ void m68000_mcu_device::and_w_dd_pais_ipm() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184506,7 +184507,7 @@ void m68000_mcu_device::and_w_dd_das_ipm() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184532,11 +184533,11 @@ void m68000_mcu_device::and_w_dd_das_ipm() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184562,7 +184563,7 @@ void m68000_mcu_device::and_w_dd_das_ipm() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184592,7 +184593,7 @@ void m68000_mcu_device::and_w_dd_das_ipm() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184628,14 +184629,14 @@ void m68000_mcu_device::and_w_dd_dais_ipm() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -184643,7 +184644,7 @@ void m68000_mcu_device::and_w_dd_dais_ipm() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184670,7 +184671,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184699,11 +184700,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -184729,7 +184730,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184759,7 +184760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184799,7 +184800,7 @@ void m68000_mcu_device::and_w_dd_adr16_ipm() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -184825,7 +184826,7 @@ void m68000_mcu_device::and_w_dd_adr16_ipm() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -184852,7 +184853,7 @@ void m68000_mcu_device::and_w_dd_adr16_ipm() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184882,7 +184883,7 @@ void m68000_mcu_device::and_w_dd_adr16_ipm() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -184920,7 +184921,7 @@ void m68000_mcu_device::and_w_dd_adr32_ipm() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -184947,7 +184948,7 @@ void m68000_mcu_device::and_w_dd_adr32_ipm() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -184973,7 +184974,7 @@ void m68000_mcu_device::and_w_dd_adr32_ipm() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -185000,7 +185001,7 @@ void m68000_mcu_device::and_w_dd_adr32_ipm() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185030,7 +185031,7 @@ void m68000_mcu_device::and_w_dd_adr32_ipm() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185119,7 +185120,7 @@ void m68000_mcu_device::and_l_dd_ais_ipm() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185147,7 +185148,7 @@ void m68000_mcu_device::and_l_dd_ais_ipm() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185173,7 +185174,7 @@ void m68000_mcu_device::and_l_dd_ais_ipm() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185201,7 +185202,7 @@ void m68000_mcu_device::and_l_dd_ais_ipm() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185229,7 +185230,7 @@ void m68000_mcu_device::and_l_dd_ais_ipm() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185267,7 +185268,7 @@ void m68000_mcu_device::and_l_dd_aips_ipm() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185295,11 +185296,11 @@ void m68000_mcu_device::and_l_dd_aips_ipm() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185325,7 +185326,7 @@ void m68000_mcu_device::and_l_dd_aips_ipm() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185353,7 +185354,7 @@ void m68000_mcu_device::and_l_dd_aips_ipm() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185381,7 +185382,7 @@ void m68000_mcu_device::and_l_dd_aips_ipm() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185418,14 +185419,14 @@ void m68000_mcu_device::and_l_dd_pais_ipm() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185452,7 +185453,7 @@ void m68000_mcu_device::and_l_dd_pais_ipm() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185478,7 +185479,7 @@ void m68000_mcu_device::and_l_dd_pais_ipm() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185506,7 +185507,7 @@ void m68000_mcu_device::and_l_dd_pais_ipm() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185534,7 +185535,7 @@ void m68000_mcu_device::and_l_dd_pais_ipm() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185572,7 +185573,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185597,7 +185598,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185625,7 +185626,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185651,7 +185652,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185679,7 +185680,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185707,7 +185708,7 @@ void m68000_mcu_device::and_l_dd_das_ipm() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185743,14 +185744,14 @@ void m68000_mcu_device::and_l_dd_dais_ipm() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -185758,7 +185759,7 @@ void m68000_mcu_device::and_l_dd_dais_ipm() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185785,7 +185786,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -185813,7 +185814,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -185841,7 +185842,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -185867,7 +185868,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185895,7 +185896,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -185923,7 +185924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -185963,7 +185964,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -185989,7 +185990,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -186017,7 +186018,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -186043,7 +186044,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186071,7 +186072,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186099,7 +186100,7 @@ void m68000_mcu_device::and_l_dd_adr16_ipm() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -186137,7 +186138,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -186164,7 +186165,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -186190,7 +186191,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186218,7 +186219,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -186244,7 +186245,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -186272,7 +186273,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -186300,7 +186301,7 @@ void m68000_mcu_device::and_l_dd_adr32_ipm() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -186342,7 +186343,7 @@ void m68000_mcu_device::muls_w_ds_dd_ipm() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186378,7 +186379,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186392,7 +186393,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186404,7 +186405,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186416,7 +186417,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186433,7 +186434,7 @@ void m68000_mcu_device::muls_w_ais_dd_ipm() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186464,7 +186465,7 @@ void m68000_mcu_device::muls_w_ais_dd_ipm() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186500,7 +186501,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186514,7 +186515,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186526,7 +186527,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186538,7 +186539,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186561,7 +186562,7 @@ void m68000_mcu_device::muls_w_aips_dd_ipm() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186590,7 +186591,7 @@ void m68000_mcu_device::muls_w_aips_dd_ipm() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186626,7 +186627,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186640,7 +186641,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186652,7 +186653,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186664,7 +186665,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186689,7 +186690,7 @@ void m68000_mcu_device::muls_w_pais_dd_ipm() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -186718,7 +186719,7 @@ void m68000_mcu_device::muls_w_pais_dd_ipm() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186754,7 +186755,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186768,7 +186769,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186780,7 +186781,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186792,7 +186793,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186834,7 +186835,7 @@ void m68000_mcu_device::muls_w_das_dd_ipm() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -186865,7 +186866,7 @@ void m68000_mcu_device::muls_w_das_dd_ipm() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -186901,7 +186902,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186915,7 +186916,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186927,7 +186928,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -186939,7 +186940,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -186954,7 +186955,7 @@ void m68000_mcu_device::muls_w_dais_dd_ipm() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187022,7 +187023,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187053,7 +187054,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187089,7 +187090,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187103,7 +187104,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187115,7 +187116,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187127,7 +187128,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187170,7 +187171,7 @@ void m68000_mcu_device::muls_w_adr16_dd_ipm() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -187199,7 +187200,7 @@ void m68000_mcu_device::muls_w_adr16_dd_ipm() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187235,7 +187236,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187249,7 +187250,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187261,7 +187262,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187273,7 +187274,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187340,7 +187341,7 @@ void m68000_mcu_device::muls_w_adr32_dd_ipm() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187369,7 +187370,7 @@ void m68000_mcu_device::muls_w_adr32_dd_ipm() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187405,7 +187406,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187419,7 +187420,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187431,7 +187432,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187443,7 +187444,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187484,7 +187485,7 @@ void m68000_mcu_device::muls_w_dpc_dd_ipm() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187515,7 +187516,7 @@ void m68000_mcu_device::muls_w_dpc_dd_ipm() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187551,7 +187552,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187565,7 +187566,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187577,7 +187578,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187589,7 +187590,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187603,7 +187604,7 @@ void m68000_mcu_device::muls_w_dpci_dd_ipm() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187671,7 +187672,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187702,7 +187703,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187738,7 +187739,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187752,7 +187753,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187764,7 +187765,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187776,7 +187777,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187823,7 +187824,7 @@ void m68000_mcu_device::muls_w_imm16_dd_ipm() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -187859,7 +187860,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187873,7 +187874,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187885,7 +187886,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -187897,7 +187898,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -187916,7 +187917,7 @@ void m68000_mcu_device::add_b_ds_dd_ipm() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -187963,7 +187964,7 @@ void m68000_mcu_device::add_b_ais_dd_ipm() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187988,7 +187989,7 @@ void m68000_mcu_device::add_b_ais_dd_ipm() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188041,7 +188042,7 @@ void m68000_mcu_device::add_b_aips_dd_ipm() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188064,7 +188065,7 @@ void m68000_mcu_device::add_b_aips_dd_ipm() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188119,7 +188120,7 @@ void m68000_mcu_device::add_b_pais_dd_ipm() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188142,7 +188143,7 @@ void m68000_mcu_device::add_b_pais_dd_ipm() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188214,7 +188215,7 @@ void m68000_mcu_device::add_b_das_dd_ipm() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188239,7 +188240,7 @@ void m68000_mcu_device::add_b_das_dd_ipm() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188284,7 +188285,7 @@ void m68000_mcu_device::add_b_dais_dd_ipm() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188352,7 +188353,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188377,7 +188378,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188450,7 +188451,7 @@ void m68000_mcu_device::add_b_adr16_dd_ipm() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -188473,7 +188474,7 @@ void m68000_mcu_device::add_b_adr16_dd_ipm() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188570,7 +188571,7 @@ void m68000_mcu_device::add_b_adr32_dd_ipm() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -188593,7 +188594,7 @@ void m68000_mcu_device::add_b_adr32_dd_ipm() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188664,7 +188665,7 @@ void m68000_mcu_device::add_b_dpc_dd_ipm() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188689,7 +188690,7 @@ void m68000_mcu_device::add_b_dpc_dd_ipm() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188733,7 +188734,7 @@ void m68000_mcu_device::add_b_dpci_dd_ipm() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -188801,7 +188802,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188826,7 +188827,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188901,7 +188902,7 @@ void m68000_mcu_device::add_b_imm8_dd_ipm() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188950,7 +188951,7 @@ void m68000_mcu_device::add_w_ds_dd_ipm() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -188999,7 +189000,7 @@ void m68000_mcu_device::add_w_as_dd_ipm() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189046,7 +189047,7 @@ void m68000_mcu_device::add_w_ais_dd_ipm() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189075,7 +189076,7 @@ void m68000_mcu_device::add_w_ais_dd_ipm() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189128,7 +189129,7 @@ void m68000_mcu_device::add_w_aips_dd_ipm() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189155,7 +189156,7 @@ void m68000_mcu_device::add_w_aips_dd_ipm() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189210,7 +189211,7 @@ void m68000_mcu_device::add_w_pais_dd_ipm() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -189237,7 +189238,7 @@ void m68000_mcu_device::add_w_pais_dd_ipm() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189309,7 +189310,7 @@ void m68000_mcu_device::add_w_das_dd_ipm() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189338,7 +189339,7 @@ void m68000_mcu_device::add_w_das_dd_ipm() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189383,7 +189384,7 @@ void m68000_mcu_device::add_w_dais_dd_ipm() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189451,7 +189452,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189480,7 +189481,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189553,7 +189554,7 @@ void m68000_mcu_device::add_w_adr16_dd_ipm() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -189580,7 +189581,7 @@ void m68000_mcu_device::add_w_adr16_dd_ipm() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189677,7 +189678,7 @@ void m68000_mcu_device::add_w_adr32_dd_ipm() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189704,7 +189705,7 @@ void m68000_mcu_device::add_w_adr32_dd_ipm() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189775,7 +189776,7 @@ void m68000_mcu_device::add_w_dpc_dd_ipm() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189804,7 +189805,7 @@ void m68000_mcu_device::add_w_dpc_dd_ipm() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -189848,7 +189849,7 @@ void m68000_mcu_device::add_w_dpci_dd_ipm() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189916,7 +189917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189945,7 +189946,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190020,7 +190021,7 @@ void m68000_mcu_device::add_w_imm16_dd_ipm() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -190069,7 +190070,7 @@ void m68000_mcu_device::add_l_ds_dd_ipm() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190096,7 +190097,7 @@ void m68000_mcu_device::add_l_ds_dd_ipm() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190126,7 +190127,7 @@ void m68000_mcu_device::add_l_as_dd_ipm() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -190153,7 +190154,7 @@ void m68000_mcu_device::add_l_as_dd_ipm() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -190181,7 +190182,7 @@ void m68000_mcu_device::add_l_ais_dd_ipm() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190234,12 +190235,12 @@ void m68000_mcu_device::add_l_ais_dd_ipm() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190287,7 +190288,7 @@ void m68000_mcu_device::add_l_aips_dd_ipm() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -190343,12 +190344,12 @@ void m68000_mcu_device::add_l_aips_dd_ipm() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190395,7 +190396,7 @@ void m68000_mcu_device::add_l_pais_dd_ipm() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190453,12 +190454,12 @@ void m68000_mcu_device::add_l_pais_dd_ipm() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190530,7 +190531,7 @@ void m68000_mcu_device::add_l_das_dd_ipm() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190583,12 +190584,12 @@ void m68000_mcu_device::add_l_das_dd_ipm() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190634,7 +190635,7 @@ void m68000_mcu_device::add_l_dais_dd_ipm() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190701,7 +190702,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190754,12 +190755,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190833,7 +190834,7 @@ void m68000_mcu_device::add_l_adr16_dd_ipm() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -190886,12 +190887,12 @@ void m68000_mcu_device::add_l_adr16_dd_ipm() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190989,7 +190990,7 @@ void m68000_mcu_device::add_l_adr32_dd_ipm() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -191042,12 +191043,12 @@ void m68000_mcu_device::add_l_adr32_dd_ipm() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191118,7 +191119,7 @@ void m68000_mcu_device::add_l_dpc_dd_ipm() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191171,12 +191172,12 @@ void m68000_mcu_device::add_l_dpc_dd_ipm() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191221,7 +191222,7 @@ void m68000_mcu_device::add_l_dpci_dd_ipm() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191288,7 +191289,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -191341,12 +191342,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191446,7 +191447,7 @@ void m68000_mcu_device::add_l_imm32_dd_ipm() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -191473,7 +191474,7 @@ void m68000_mcu_device::add_l_imm32_dd_ipm() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -191503,7 +191504,7 @@ void m68000_mcu_device::adda_w_ds_ad_ipm() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191529,7 +191530,7 @@ void m68000_mcu_device::adda_w_ds_ad_ipm() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191558,7 +191559,7 @@ void m68000_mcu_device::adda_w_as_ad_ipm() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191584,7 +191585,7 @@ void m68000_mcu_device::adda_w_as_ad_ipm() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191611,7 +191612,7 @@ void m68000_mcu_device::adda_w_ais_ad_ipm() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191640,7 +191641,7 @@ void m68000_mcu_device::adda_w_ais_ad_ipm() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191666,7 +191667,7 @@ void m68000_mcu_device::adda_w_ais_ad_ipm() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191699,7 +191700,7 @@ void m68000_mcu_device::adda_w_aips_ad_ipm() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191726,7 +191727,7 @@ void m68000_mcu_device::adda_w_aips_ad_ipm() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191752,7 +191753,7 @@ void m68000_mcu_device::adda_w_aips_ad_ipm() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191787,7 +191788,7 @@ void m68000_mcu_device::adda_w_pais_ad_ipm() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191814,7 +191815,7 @@ void m68000_mcu_device::adda_w_pais_ad_ipm() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191840,7 +191841,7 @@ void m68000_mcu_device::adda_w_pais_ad_ipm() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191892,7 +191893,7 @@ void m68000_mcu_device::adda_w_das_ad_ipm() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -191921,7 +191922,7 @@ void m68000_mcu_device::adda_w_das_ad_ipm() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -191947,7 +191948,7 @@ void m68000_mcu_device::adda_w_das_ad_ipm() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191972,7 +191973,7 @@ void m68000_mcu_device::adda_w_dais_ad_ipm() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192040,7 +192041,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192069,7 +192070,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192095,7 +192096,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192148,7 +192149,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ipm() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -192175,7 +192176,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ipm() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192201,7 +192202,7 @@ void m68000_mcu_device::adda_w_adr16_ad_ipm() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192278,7 +192279,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ipm() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -192305,7 +192306,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ipm() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192331,7 +192332,7 @@ void m68000_mcu_device::adda_w_adr32_ad_ipm() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192382,7 +192383,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ipm() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192411,7 +192412,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ipm() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192437,7 +192438,7 @@ void m68000_mcu_device::adda_w_dpc_ad_ipm() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192461,7 +192462,7 @@ void m68000_mcu_device::adda_w_dpci_ad_ipm() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -192529,7 +192530,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -192558,7 +192559,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192584,7 +192585,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192639,7 +192640,7 @@ void m68000_mcu_device::adda_w_imm16_ad_ipm() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -192665,7 +192666,7 @@ void m68000_mcu_device::adda_w_imm16_ad_ipm() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192694,7 +192695,7 @@ void m68000_mcu_device::addx_b_ds_dd_ipm() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -192702,7 +192703,7 @@ void m68000_mcu_device::addx_b_ds_dd_ipm() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -192744,16 +192745,16 @@ void m68000_mcu_device::addx_b_pais_paid_ipm() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192776,7 +192777,7 @@ void m68000_mcu_device::addx_b_pais_paid_ipm() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, m_aob & 1 ? 0x00ff : 0xff00);
@@ -192796,7 +192797,7 @@ void m68000_mcu_device::addx_b_pais_paid_ipm() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192826,7 +192827,7 @@ void m68000_mcu_device::addx_b_pais_paid_ipm() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, (m_aob & 1) ? 0x00ff : 0xff00);
@@ -192858,7 +192859,7 @@ void m68000_mcu_device::add_b_dd_ais_ipm() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192883,7 +192884,7 @@ void m68000_mcu_device::add_b_dd_ais_ipm() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192950,7 +192951,7 @@ void m68000_mcu_device::add_b_dd_aips_ipm() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192973,7 +192974,7 @@ void m68000_mcu_device::add_b_dd_aips_ipm() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193042,7 +193043,7 @@ void m68000_mcu_device::add_b_dd_pais_ipm() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193065,7 +193066,7 @@ void m68000_mcu_device::add_b_dd_pais_ipm() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193151,7 +193152,7 @@ void m68000_mcu_device::add_b_dd_das_ipm() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193176,7 +193177,7 @@ void m68000_mcu_device::add_b_dd_das_ipm() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193235,7 +193236,7 @@ void m68000_mcu_device::add_b_dd_dais_ipm() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193303,7 +193304,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193328,7 +193329,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193415,7 +193416,7 @@ void m68000_mcu_device::add_b_dd_adr16_ipm() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -193438,7 +193439,7 @@ void m68000_mcu_device::add_b_dd_adr16_ipm() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193549,7 +193550,7 @@ void m68000_mcu_device::add_b_dd_adr32_ipm() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193572,7 +193573,7 @@ void m68000_mcu_device::add_b_dd_adr32_ipm() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193635,7 +193636,7 @@ void m68000_mcu_device::addx_w_ds_dd_ipm() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -193643,7 +193644,7 @@ void m68000_mcu_device::addx_w_ds_dd_ipm() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -193685,16 +193686,16 @@ void m68000_mcu_device::addx_w_pais_paid_ipm() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -193721,7 +193722,7 @@ void m68000_mcu_device::addx_w_pais_paid_ipm() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -193745,7 +193746,7 @@ void m68000_mcu_device::addx_w_pais_paid_ipm() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193775,7 +193776,7 @@ void m68000_mcu_device::addx_w_pais_paid_ipm() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -193813,7 +193814,7 @@ void m68000_mcu_device::add_w_dd_ais_ipm() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193842,7 +193843,7 @@ void m68000_mcu_device::add_w_dd_ais_ipm() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193915,7 +193916,7 @@ void m68000_mcu_device::add_w_dd_aips_ipm() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -193942,7 +193943,7 @@ void m68000_mcu_device::add_w_dd_aips_ipm() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194017,7 +194018,7 @@ void m68000_mcu_device::add_w_dd_pais_ipm() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194044,7 +194045,7 @@ void m68000_mcu_device::add_w_dd_pais_ipm() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194136,7 +194137,7 @@ void m68000_mcu_device::add_w_dd_das_ipm() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194165,7 +194166,7 @@ void m68000_mcu_device::add_w_dd_das_ipm() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194230,7 +194231,7 @@ void m68000_mcu_device::add_w_dd_dais_ipm() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194298,7 +194299,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194327,7 +194328,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194420,7 +194421,7 @@ void m68000_mcu_device::add_w_dd_adr16_ipm() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -194447,7 +194448,7 @@ void m68000_mcu_device::add_w_dd_adr16_ipm() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194564,7 +194565,7 @@ void m68000_mcu_device::add_w_dd_adr32_ipm() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -194591,7 +194592,7 @@ void m68000_mcu_device::add_w_dd_adr32_ipm() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194660,12 +194661,12 @@ void m68000_mcu_device::addx_l_ds_dd_ipm() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -194688,7 +194689,7 @@ void m68000_mcu_device::addx_l_ds_dd_ipm() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -194697,7 +194698,7 @@ void m68000_mcu_device::addx_l_ds_dd_ipm() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -194719,13 +194720,13 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194749,11 +194750,11 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194778,7 +194779,7 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -194804,7 +194805,7 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -194832,7 +194833,7 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -194855,7 +194856,7 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194885,7 +194886,7 @@ void m68000_mcu_device::addx_l_pais_paid_ipm() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -194923,7 +194924,7 @@ void m68000_mcu_device::add_l_dd_ais_ipm() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -194976,7 +194977,7 @@ void m68000_mcu_device::add_l_dd_ais_ipm() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195004,7 +195005,7 @@ void m68000_mcu_device::add_l_dd_ais_ipm() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195069,7 +195070,7 @@ void m68000_mcu_device::add_l_dd_aips_ipm() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -195125,7 +195126,7 @@ void m68000_mcu_device::add_l_dd_aips_ipm() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195153,7 +195154,7 @@ void m68000_mcu_device::add_l_dd_aips_ipm() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195217,7 +195218,7 @@ void m68000_mcu_device::add_l_dd_pais_ipm() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195275,7 +195276,7 @@ void m68000_mcu_device::add_l_dd_pais_ipm() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195303,7 +195304,7 @@ void m68000_mcu_device::add_l_dd_pais_ipm() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195392,7 +195393,7 @@ void m68000_mcu_device::add_l_dd_das_ipm() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195445,7 +195446,7 @@ void m68000_mcu_device::add_l_dd_das_ipm() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195473,7 +195474,7 @@ void m68000_mcu_device::add_l_dd_das_ipm() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195536,7 +195537,7 @@ void m68000_mcu_device::add_l_dd_dais_ipm() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195603,7 +195604,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195656,7 +195657,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195684,7 +195685,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195775,7 +195776,7 @@ void m68000_mcu_device::add_l_dd_adr16_ipm() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -195828,7 +195829,7 @@ void m68000_mcu_device::add_l_dd_adr16_ipm() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195856,7 +195857,7 @@ void m68000_mcu_device::add_l_dd_adr16_ipm() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -195971,7 +195972,7 @@ void m68000_mcu_device::add_l_dd_adr32_ipm() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -196024,7 +196025,7 @@ void m68000_mcu_device::add_l_dd_adr32_ipm() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196052,7 +196053,7 @@ void m68000_mcu_device::add_l_dd_adr32_ipm() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -196119,7 +196120,7 @@ void m68000_mcu_device::adda_l_ds_ad_ipm() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196145,7 +196146,7 @@ void m68000_mcu_device::adda_l_ds_ad_ipm() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196174,7 +196175,7 @@ void m68000_mcu_device::adda_l_as_ad_ipm() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -196200,7 +196201,7 @@ void m68000_mcu_device::adda_l_as_ad_ipm() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -196227,7 +196228,7 @@ void m68000_mcu_device::adda_l_ais_ad_ipm() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196280,11 +196281,11 @@ void m68000_mcu_device::adda_l_ais_ad_ipm() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196331,7 +196332,7 @@ void m68000_mcu_device::adda_l_aips_ad_ipm() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -196387,11 +196388,11 @@ void m68000_mcu_device::adda_l_aips_ad_ipm() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196437,7 +196438,7 @@ void m68000_mcu_device::adda_l_pais_ad_ipm() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -196495,11 +196496,11 @@ void m68000_mcu_device::adda_l_pais_ad_ipm() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -196570,7 +196571,7 @@ void m68000_mcu_device::adda_l_das_ad_ipm() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196623,11 +196624,11 @@ void m68000_mcu_device::adda_l_das_ad_ipm() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196672,7 +196673,7 @@ void m68000_mcu_device::adda_l_dais_ad_ipm() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196739,7 +196740,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196792,11 +196793,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -196869,7 +196870,7 @@ void m68000_mcu_device::adda_l_adr16_ad_ipm() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -196922,11 +196923,11 @@ void m68000_mcu_device::adda_l_adr16_ad_ipm() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197023,7 +197024,7 @@ void m68000_mcu_device::adda_l_adr32_ad_ipm() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197076,11 +197077,11 @@ void m68000_mcu_device::adda_l_adr32_ad_ipm() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -197150,7 +197151,7 @@ void m68000_mcu_device::adda_l_dpc_ad_ipm() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197203,11 +197204,11 @@ void m68000_mcu_device::adda_l_dpc_ad_ipm() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197251,7 +197252,7 @@ void m68000_mcu_device::adda_l_dpci_ad_ipm() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -197318,7 +197319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -197371,11 +197372,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -197474,7 +197475,7 @@ void m68000_mcu_device::adda_l_imm32_ad_ipm() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -197500,7 +197501,7 @@ void m68000_mcu_device::adda_l_imm32_ad_ipm() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -197528,13 +197529,13 @@ void m68000_mcu_device::asr_b_imm3_ds_ipm() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197566,7 +197567,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197600,13 +197601,13 @@ void m68000_mcu_device::lsr_b_imm3_ds_ipm() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197638,7 +197639,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197672,13 +197673,13 @@ void m68000_mcu_device::roxr_b_imm3_ds_ipm() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197710,7 +197711,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197744,13 +197745,13 @@ void m68000_mcu_device::ror_b_imm3_ds_ipm() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197782,7 +197783,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -197817,13 +197818,13 @@ void m68000_mcu_device::asr_b_dd_ds_ipm() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197855,7 +197856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197890,13 +197891,13 @@ void m68000_mcu_device::lsr_b_dd_ds_ipm() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197928,7 +197929,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -197963,13 +197964,13 @@ void m68000_mcu_device::roxr_b_dd_ds_ipm() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198001,7 +198002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198036,13 +198037,13 @@ void m68000_mcu_device::ror_b_dd_ds_ipm() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198074,7 +198075,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198108,13 +198109,13 @@ void m68000_mcu_device::asr_w_imm3_ds_ipm() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198146,7 +198147,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198180,13 +198181,13 @@ void m68000_mcu_device::lsr_w_imm3_ds_ipm() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198218,7 +198219,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198252,13 +198253,13 @@ void m68000_mcu_device::roxr_w_imm3_ds_ipm() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198290,7 +198291,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198324,13 +198325,13 @@ void m68000_mcu_device::ror_w_imm3_ds_ipm() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198362,7 +198363,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198397,13 +198398,13 @@ void m68000_mcu_device::asr_w_dd_ds_ipm() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198435,7 +198436,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198470,13 +198471,13 @@ void m68000_mcu_device::lsr_w_dd_ds_ipm() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198508,7 +198509,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198543,13 +198544,13 @@ void m68000_mcu_device::roxr_w_dd_ds_ipm() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198581,7 +198582,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198616,13 +198617,13 @@ void m68000_mcu_device::ror_w_dd_ds_ipm() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198654,7 +198655,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198688,13 +198689,13 @@ void m68000_mcu_device::asr_l_imm3_ds_ipm() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198726,7 +198727,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198743,7 +198744,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198766,13 +198767,13 @@ void m68000_mcu_device::lsr_l_imm3_ds_ipm() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198804,7 +198805,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198821,7 +198822,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198844,13 +198845,13 @@ void m68000_mcu_device::roxr_l_imm3_ds_ipm() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198882,7 +198883,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -198899,7 +198900,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -198922,13 +198923,13 @@ void m68000_mcu_device::ror_l_imm3_ds_ipm() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198960,7 +198961,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -198977,7 +198978,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199001,13 +199002,13 @@ void m68000_mcu_device::asr_l_dd_ds_ipm() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199039,7 +199040,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199056,7 +199057,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199080,13 +199081,13 @@ void m68000_mcu_device::lsr_l_dd_ds_ipm() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199118,7 +199119,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199135,7 +199136,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199159,13 +199160,13 @@ void m68000_mcu_device::roxr_l_dd_ds_ipm() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199197,7 +199198,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -199214,7 +199215,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199238,13 +199239,13 @@ void m68000_mcu_device::ror_l_dd_ds_ipm() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199276,7 +199277,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -199293,7 +199294,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -199315,7 +199316,7 @@ void m68000_mcu_device::asr_ais_ipm() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199344,12 +199345,12 @@ void m68000_mcu_device::asr_ais_ipm() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199422,7 +199423,7 @@ void m68000_mcu_device::asr_aips_ipm() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199449,12 +199450,12 @@ void m68000_mcu_device::asr_aips_ipm() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199529,7 +199530,7 @@ void m68000_mcu_device::asr_pais_ipm() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199556,12 +199557,12 @@ void m68000_mcu_device::asr_pais_ipm() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199653,7 +199654,7 @@ void m68000_mcu_device::asr_das_ipm() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199682,12 +199683,12 @@ void m68000_mcu_device::asr_das_ipm() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199752,7 +199753,7 @@ void m68000_mcu_device::asr_dais_ipm() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -199820,7 +199821,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -199849,12 +199850,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199947,7 +199948,7 @@ void m68000_mcu_device::asr_adr16_ipm() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -199974,12 +199975,12 @@ void m68000_mcu_device::asr_adr16_ipm() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200096,7 +200097,7 @@ void m68000_mcu_device::asr_adr32_ipm() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200123,12 +200124,12 @@ void m68000_mcu_device::asr_adr32_ipm() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200196,13 +200197,13 @@ void m68000_mcu_device::asl_b_imm3_ds_ipm() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200234,7 +200235,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200268,13 +200269,13 @@ void m68000_mcu_device::lsl_b_imm3_ds_ipm() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200306,7 +200307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200320,7 +200321,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200341,13 +200342,13 @@ void m68000_mcu_device::roxl_b_imm3_ds_ipm() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200379,7 +200380,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200413,13 +200414,13 @@ void m68000_mcu_device::rol_b_imm3_ds_ipm() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200451,7 +200452,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200486,13 +200487,13 @@ void m68000_mcu_device::asl_b_dd_ds_ipm() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200524,7 +200525,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200559,13 +200560,13 @@ void m68000_mcu_device::lsl_b_dd_ds_ipm() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200597,7 +200598,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200611,7 +200612,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200633,13 +200634,13 @@ void m68000_mcu_device::roxl_b_dd_ds_ipm() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200671,7 +200672,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200706,13 +200707,13 @@ void m68000_mcu_device::rol_b_dd_ds_ipm() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200744,7 +200745,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -200778,13 +200779,13 @@ void m68000_mcu_device::asl_w_imm3_ds_ipm() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200816,7 +200817,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200850,13 +200851,13 @@ void m68000_mcu_device::lsl_w_imm3_ds_ipm() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200888,7 +200889,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200902,7 +200903,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200923,13 +200924,13 @@ void m68000_mcu_device::roxl_w_imm3_ds_ipm() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200961,7 +200962,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -200995,13 +200996,13 @@ void m68000_mcu_device::rol_w_imm3_ds_ipm() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201033,7 +201034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201068,13 +201069,13 @@ void m68000_mcu_device::asl_w_dd_ds_ipm() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201106,7 +201107,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201141,13 +201142,13 @@ void m68000_mcu_device::lsl_w_dd_ds_ipm() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201179,7 +201180,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201193,7 +201194,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -201215,13 +201216,13 @@ void m68000_mcu_device::roxl_w_dd_ds_ipm() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201253,7 +201254,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201288,13 +201289,13 @@ void m68000_mcu_device::rol_w_dd_ds_ipm() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201326,7 +201327,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201360,13 +201361,13 @@ void m68000_mcu_device::asl_l_imm3_ds_ipm() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201398,7 +201399,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201415,7 +201416,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201438,13 +201439,13 @@ void m68000_mcu_device::lsl_l_imm3_ds_ipm() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201476,7 +201477,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201488,14 +201489,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201518,13 +201519,13 @@ void m68000_mcu_device::roxl_l_imm3_ds_ipm() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201556,7 +201557,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201573,7 +201574,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201596,13 +201597,13 @@ void m68000_mcu_device::rol_l_imm3_ds_ipm() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201634,7 +201635,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201651,7 +201652,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201675,13 +201676,13 @@ void m68000_mcu_device::asl_l_dd_ds_ipm() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201713,7 +201714,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201730,7 +201731,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201754,13 +201755,13 @@ void m68000_mcu_device::lsl_l_dd_ds_ipm() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201792,7 +201793,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201804,14 +201805,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201835,13 +201836,13 @@ void m68000_mcu_device::roxl_l_dd_ds_ipm() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201873,7 +201874,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -201890,7 +201891,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201914,13 +201915,13 @@ void m68000_mcu_device::rol_l_dd_ds_ipm() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201952,7 +201953,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201969,7 +201970,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -201991,7 +201992,7 @@ void m68000_mcu_device::asl_ais_ipm() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202020,12 +202021,12 @@ void m68000_mcu_device::asl_ais_ipm() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202098,7 +202099,7 @@ void m68000_mcu_device::asl_aips_ipm() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202125,12 +202126,12 @@ void m68000_mcu_device::asl_aips_ipm() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202205,7 +202206,7 @@ void m68000_mcu_device::asl_pais_ipm() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202232,12 +202233,12 @@ void m68000_mcu_device::asl_pais_ipm() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202329,7 +202330,7 @@ void m68000_mcu_device::asl_das_ipm() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202358,12 +202359,12 @@ void m68000_mcu_device::asl_das_ipm() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202428,7 +202429,7 @@ void m68000_mcu_device::asl_dais_ipm() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -202496,7 +202497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202525,12 +202526,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202623,7 +202624,7 @@ void m68000_mcu_device::asl_adr16_ipm() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -202650,12 +202651,12 @@ void m68000_mcu_device::asl_adr16_ipm() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202772,7 +202773,7 @@ void m68000_mcu_device::asl_adr32_ipm() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -202799,12 +202800,12 @@ void m68000_mcu_device::asl_adr32_ipm() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202871,7 +202872,7 @@ void m68000_mcu_device::lsr_ais_ipm() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -202900,12 +202901,12 @@ void m68000_mcu_device::lsr_ais_ipm() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202978,7 +202979,7 @@ void m68000_mcu_device::lsr_aips_ipm() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203005,12 +203006,12 @@ void m68000_mcu_device::lsr_aips_ipm() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203085,7 +203086,7 @@ void m68000_mcu_device::lsr_pais_ipm() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203112,12 +203113,12 @@ void m68000_mcu_device::lsr_pais_ipm() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203209,7 +203210,7 @@ void m68000_mcu_device::lsr_das_ipm() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203238,12 +203239,12 @@ void m68000_mcu_device::lsr_das_ipm() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203308,7 +203309,7 @@ void m68000_mcu_device::lsr_dais_ipm() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -203376,7 +203377,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203405,12 +203406,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203503,7 +203504,7 @@ void m68000_mcu_device::lsr_adr16_ipm() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -203530,12 +203531,12 @@ void m68000_mcu_device::lsr_adr16_ipm() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203652,7 +203653,7 @@ void m68000_mcu_device::lsr_adr32_ipm() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -203679,12 +203680,12 @@ void m68000_mcu_device::lsr_adr32_ipm() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203751,11 +203752,11 @@ void m68000_mcu_device::lsl_ais_ipm() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -203781,12 +203782,12 @@ void m68000_mcu_device::lsl_ais_ipm() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203816,7 +203817,7 @@ void m68000_mcu_device::lsl_ais_ipm() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -203857,12 +203858,12 @@ void m68000_mcu_device::lsl_aips_ipm() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203889,12 +203890,12 @@ void m68000_mcu_device::lsl_aips_ipm() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203924,7 +203925,7 @@ void m68000_mcu_device::lsl_aips_ipm() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -203964,7 +203965,7 @@ void m68000_mcu_device::lsl_pais_ipm() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203972,7 +203973,7 @@ void m68000_mcu_device::lsl_pais_ipm() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -203999,12 +204000,12 @@ void m68000_mcu_device::lsl_pais_ipm() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204034,7 +204035,7 @@ void m68000_mcu_device::lsl_pais_ipm() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204072,7 +204073,7 @@ void m68000_mcu_device::lsl_das_ipm() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204098,11 +204099,11 @@ void m68000_mcu_device::lsl_das_ipm() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -204128,12 +204129,12 @@ void m68000_mcu_device::lsl_das_ipm() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204163,7 +204164,7 @@ void m68000_mcu_device::lsl_das_ipm() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204199,14 +204200,14 @@ void m68000_mcu_device::lsl_dais_ipm() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204214,7 +204215,7 @@ void m68000_mcu_device::lsl_dais_ipm() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204241,7 +204242,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204270,11 +204271,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu->read_data(m_aob & ~1, 0xffff);
@@ -204300,12 +204301,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204335,7 +204336,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204375,7 +204376,7 @@ void m68000_mcu_device::lsl_adr16_ipm() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -204401,7 +204402,7 @@ void m68000_mcu_device::lsl_adr16_ipm() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -204428,12 +204429,12 @@ void m68000_mcu_device::lsl_adr16_ipm() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204463,7 +204464,7 @@ void m68000_mcu_device::lsl_adr16_ipm() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204501,7 +204502,7 @@ void m68000_mcu_device::lsl_adr32_ipm() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu->read_program(m_aob & ~1, 0xffff);
@@ -204528,7 +204529,7 @@ void m68000_mcu_device::lsl_adr32_ipm() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -204554,7 +204555,7 @@ void m68000_mcu_device::lsl_adr32_ipm() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -204581,12 +204582,12 @@ void m68000_mcu_device::lsl_adr32_ipm() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204616,7 +204617,7 @@ void m68000_mcu_device::lsl_adr32_ipm() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu->write_data(m_aob & ~1, m_dbout, 0xffff);
@@ -204654,7 +204655,7 @@ void m68000_mcu_device::roxr_ais_ipm() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204683,12 +204684,12 @@ void m68000_mcu_device::roxr_ais_ipm() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204761,7 +204762,7 @@ void m68000_mcu_device::roxr_aips_ipm() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204788,12 +204789,12 @@ void m68000_mcu_device::roxr_aips_ipm() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204868,7 +204869,7 @@ void m68000_mcu_device::roxr_pais_ipm() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -204895,12 +204896,12 @@ void m68000_mcu_device::roxr_pais_ipm() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204992,7 +204993,7 @@ void m68000_mcu_device::roxr_das_ipm() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205021,12 +205022,12 @@ void m68000_mcu_device::roxr_das_ipm() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205091,7 +205092,7 @@ void m68000_mcu_device::roxr_dais_ipm() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -205159,7 +205160,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205188,12 +205189,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205286,7 +205287,7 @@ void m68000_mcu_device::roxr_adr16_ipm() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -205313,12 +205314,12 @@ void m68000_mcu_device::roxr_adr16_ipm() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205435,7 +205436,7 @@ void m68000_mcu_device::roxr_adr32_ipm() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205462,12 +205463,12 @@ void m68000_mcu_device::roxr_adr32_ipm() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205534,7 +205535,7 @@ void m68000_mcu_device::roxl_ais_ipm() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205563,12 +205564,12 @@ void m68000_mcu_device::roxl_ais_ipm() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205641,7 +205642,7 @@ void m68000_mcu_device::roxl_aips_ipm() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205668,12 +205669,12 @@ void m68000_mcu_device::roxl_aips_ipm() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205748,7 +205749,7 @@ void m68000_mcu_device::roxl_pais_ipm() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -205775,12 +205776,12 @@ void m68000_mcu_device::roxl_pais_ipm() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205872,7 +205873,7 @@ void m68000_mcu_device::roxl_das_ipm() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -205901,12 +205902,12 @@ void m68000_mcu_device::roxl_das_ipm() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205971,7 +205972,7 @@ void m68000_mcu_device::roxl_dais_ipm() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206039,7 +206040,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206068,12 +206069,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206166,7 +206167,7 @@ void m68000_mcu_device::roxl_adr16_ipm() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -206193,12 +206194,12 @@ void m68000_mcu_device::roxl_adr16_ipm() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206315,7 +206316,7 @@ void m68000_mcu_device::roxl_adr32_ipm() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -206342,12 +206343,12 @@ void m68000_mcu_device::roxl_adr32_ipm() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206414,7 +206415,7 @@ void m68000_mcu_device::ror_ais_ipm() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206443,12 +206444,12 @@ void m68000_mcu_device::ror_ais_ipm() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206521,7 +206522,7 @@ void m68000_mcu_device::ror_aips_ipm() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206548,12 +206549,12 @@ void m68000_mcu_device::ror_aips_ipm() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206628,7 +206629,7 @@ void m68000_mcu_device::ror_pais_ipm() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -206655,12 +206656,12 @@ void m68000_mcu_device::ror_pais_ipm() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206752,7 +206753,7 @@ void m68000_mcu_device::ror_das_ipm() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206781,12 +206782,12 @@ void m68000_mcu_device::ror_das_ipm() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206851,7 +206852,7 @@ void m68000_mcu_device::ror_dais_ipm() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -206919,7 +206920,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206948,12 +206949,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207046,7 +207047,7 @@ void m68000_mcu_device::ror_adr16_ipm() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207073,12 +207074,12 @@ void m68000_mcu_device::ror_adr16_ipm() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207195,7 +207196,7 @@ void m68000_mcu_device::ror_adr32_ipm() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -207222,12 +207223,12 @@ void m68000_mcu_device::ror_adr32_ipm() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207294,7 +207295,7 @@ void m68000_mcu_device::rol_ais_ipm() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207323,12 +207324,12 @@ void m68000_mcu_device::rol_ais_ipm() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207401,7 +207402,7 @@ void m68000_mcu_device::rol_aips_ipm() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207428,12 +207429,12 @@ void m68000_mcu_device::rol_aips_ipm() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207508,7 +207509,7 @@ void m68000_mcu_device::rol_pais_ipm() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -207535,12 +207536,12 @@ void m68000_mcu_device::rol_pais_ipm() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207632,7 +207633,7 @@ void m68000_mcu_device::rol_das_ipm() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207661,12 +207662,12 @@ void m68000_mcu_device::rol_das_ipm() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207731,7 +207732,7 @@ void m68000_mcu_device::rol_dais_ipm() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207799,7 +207800,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207828,12 +207829,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207926,7 +207927,7 @@ void m68000_mcu_device::rol_adr16_ipm() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -207953,12 +207954,12 @@ void m68000_mcu_device::rol_adr16_ipm() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208075,7 +208076,7 @@ void m68000_mcu_device::rol_adr32_ipm() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -208102,12 +208103,12 @@ void m68000_mcu_device::rol_adr32_ipm() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68000mcu.cpp b/src/devices/cpu/m68000/m68000mcu.cpp
index c793b36f862..39c084e4914 100644
--- a/src/devices/cpu/m68000/m68000mcu.cpp
+++ b/src/devices/cpu/m68000/m68000mcu.cpp
@@ -34,7 +34,7 @@ void m68000_mcu_device::execute_run()
m_ipc = m_pc - 2;
m_irdi = m_ird;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(m_ipc);
}
(this->*(m_handlers_f[m_inst_state]))();
diff --git a/src/devices/cpu/m68000/m68000mcu.h b/src/devices/cpu/m68000/m68000mcu.h
index 07a50ff5977..8b50865f01f 100644
--- a/src/devices/cpu/m68000/m68000mcu.h
+++ b/src/devices/cpu/m68000/m68000mcu.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
-#ifndef MAME_CPU_M68000_M68000mcu_H
-#define MAME_CPU_M68000_M68000mcu_H
+#ifndef MAME_CPU_M68000_M68000MCU_H
+#define MAME_CPU_M68000_M68000MCU_H
#pragma once
@@ -28,9 +28,9 @@ protected:
void internal_update();
virtual void internal_update(uint64_t current_time) = 0;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
void set_current_interrupt_level(u32 level);
};
-#endif
+#endif // MAME_CPU_M68000_M68000MCU_H
diff --git a/src/devices/cpu/m68000/m68000musashi.cpp b/src/devices/cpu/m68000/m68000musashi.cpp
new file mode 100644
index 00000000000..41b4c746458
--- /dev/null
+++ b/src/devices/cpu/m68000/m68000musashi.cpp
@@ -0,0 +1,25 @@
+// license:BSD-3-Clause
+// copyright-holders:Karl Stenerud
+
+#include "emu.h"
+#include "m68000musashi.h"
+#include "m68kdasm.h"
+
+DEFINE_DEVICE_TYPE(M68000MUSASHI, m68000msh_device, "m68000msh", "Motorola MC68000 (Musashi)")
+
+std::unique_ptr<util::disasm_interface> m68000msh_device::create_disassembler()
+{
+ return std::make_unique<m68k_disassembler>(m68k_disassembler::TYPE_68010);
+}
+
+
+m68000msh_device::m68000msh_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : m68000_musashi_device(mconfig, tag, owner, clock, M68000MUSASHI, 16, 24)
+{
+}
+
+void m68000msh_device::device_start()
+{
+ m68000_musashi_device::device_start();
+ init_cpu_m68000();
+}
diff --git a/src/devices/cpu/m68000/m68000musashi.h b/src/devices/cpu/m68000/m68000musashi.h
new file mode 100644
index 00000000000..cea6e63216a
--- /dev/null
+++ b/src/devices/cpu/m68000/m68000musashi.h
@@ -0,0 +1,27 @@
+// license:BSD-3-Clause
+// copyright-holders:Karl Stenerud
+#ifndef MAME_CPU_M68000_M68000MUSASHI_H
+#define MAME_CPU_M68000_M68000MUSASHI_H
+
+#pragma once
+
+#include "m68kmusashi.h"
+
+class m68000msh_device : public m68000_musashi_device
+{
+public:
+ // construction/destruction
+ m68000msh_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ virtual u32 execute_min_cycles() const noexcept override { return 4; }
+ virtual u32 execute_max_cycles() const noexcept override { return 158; }
+
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(M68000MUSASHI, m68000msh_device)
+
+#endif
diff --git a/src/devices/cpu/m68000/m68008-sdf8.cpp b/src/devices/cpu/m68000/m68008-sdf8.cpp
index 1fbe0738d49..a00df6b36ec 100644
--- a/src/devices/cpu/m68000/m68008-sdf8.cpp
+++ b/src/devices/cpu/m68000/m68008-sdf8.cpp
@@ -245,7 +245,7 @@ void m68008_device::state_bus_error_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -255,7 +255,7 @@ void m68008_device::state_bus_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -288,7 +288,7 @@ void m68008_device::state_bus_error_df8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -320,7 +320,7 @@ void m68008_device::state_bus_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -356,7 +356,7 @@ void m68008_device::state_bus_error_df8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -388,7 +388,7 @@ void m68008_device::state_bus_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -423,7 +423,7 @@ void m68008_device::state_bus_error_df8()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -456,7 +456,7 @@ void m68008_device::state_bus_error_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -634,7 +634,7 @@ void m68008_device::state_address_error_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -644,7 +644,7 @@ void m68008_device::state_address_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -677,7 +677,7 @@ void m68008_device::state_address_error_df8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -709,7 +709,7 @@ void m68008_device::state_address_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -745,7 +745,7 @@ void m68008_device::state_address_error_df8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -777,7 +777,7 @@ void m68008_device::state_address_error_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -812,7 +812,7 @@ void m68008_device::state_address_error_df8()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -845,7 +845,7 @@ void m68008_device::state_address_error_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1030,7 +1030,7 @@ void m68008_device::state_interrupt_df8()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -1042,7 +1042,7 @@ void m68008_device::state_interrupt_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1103,7 +1103,7 @@ void m68008_device::state_interrupt_df8()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1136,7 +1136,7 @@ void m68008_device::state_interrupt_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1312,7 +1312,7 @@ void m68008_device::state_trace_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1322,7 +1322,7 @@ void m68008_device::state_trace_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1357,7 +1357,7 @@ void m68008_device::state_trace_df8()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1390,7 +1390,7 @@ void m68008_device::state_trace_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1566,7 +1566,7 @@ void m68008_device::state_illegal_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1576,7 +1576,7 @@ void m68008_device::state_illegal_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1611,7 +1611,7 @@ void m68008_device::state_illegal_df8()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1644,7 +1644,7 @@ void m68008_device::state_illegal_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1820,7 +1820,7 @@ void m68008_device::state_priviledge_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1830,7 +1830,7 @@ void m68008_device::state_priviledge_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1865,7 +1865,7 @@ void m68008_device::state_priviledge_df8()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -1898,7 +1898,7 @@ void m68008_device::state_priviledge_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2074,7 +2074,7 @@ void m68008_device::state_linea_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2084,7 +2084,7 @@ void m68008_device::state_linea_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2119,7 +2119,7 @@ void m68008_device::state_linea_df8()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2152,7 +2152,7 @@ void m68008_device::state_linea_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2328,7 +2328,7 @@ void m68008_device::state_linef_df8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2338,7 +2338,7 @@ void m68008_device::state_linef_df8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2373,7 +2373,7 @@ void m68008_device::state_linef_df8()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2406,7 +2406,7 @@ void m68008_device::state_linef_df8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -2579,7 +2579,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2612,7 +2612,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2620,7 +2620,7 @@ void m68008_device::ori_b_imm8_ds_df8() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2664,7 +2664,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2696,11 +2696,11 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -2718,7 +2718,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2755,7 +2755,7 @@ void m68008_device::ori_b_imm8_ais_df8() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -2782,7 +2782,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2817,12 +2817,12 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -2841,7 +2841,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2878,7 +2878,7 @@ void m68008_device::ori_b_imm8_aips_df8() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -2905,7 +2905,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2939,7 +2939,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2947,7 +2947,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -2966,7 +2966,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3003,7 +3003,7 @@ void m68008_device::ori_b_imm8_pais_df8() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -3030,7 +3030,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3062,7 +3062,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3095,11 +3095,11 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -3117,7 +3117,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3154,7 +3154,7 @@ void m68008_device::ori_b_imm8_das_df8() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -3181,7 +3181,7 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3211,14 +3211,14 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3226,7 +3226,7 @@ void m68008_device::ori_b_imm8_dais_df8() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3260,7 +3260,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3296,11 +3296,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -3318,7 +3318,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3355,7 +3355,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -3381,7 +3381,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3449,7 +3449,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -3468,7 +3468,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3505,7 +3505,7 @@ void m68008_device::ori_b_imm8_adr16_df8() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -3531,7 +3531,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3564,7 +3564,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3598,7 +3598,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3631,7 +3631,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -3650,7 +3650,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3687,7 +3687,7 @@ void m68008_device::ori_b_imm8_adr32_df8() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -3713,7 +3713,7 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3745,21 +3745,21 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3767,7 +3767,7 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3801,11 +3801,11 @@ void m68008_device::ori_imm8_ccr_df8() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3849,7 +3849,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3882,7 +3882,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3890,7 +3890,7 @@ void m68008_device::ori_w_imm16_ds_df8() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3934,7 +3934,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3966,11 +3966,11 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4003,7 +4003,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4040,7 +4040,7 @@ void m68008_device::ori_w_imm16_ais_df8() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4082,7 +4082,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4117,12 +4117,12 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -4156,7 +4156,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4193,7 +4193,7 @@ void m68008_device::ori_w_imm16_aips_df8() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4235,7 +4235,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4269,7 +4269,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -4277,7 +4277,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -4311,7 +4311,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4348,7 +4348,7 @@ void m68008_device::ori_w_imm16_pais_df8() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4390,7 +4390,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4422,7 +4422,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4455,11 +4455,11 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4492,7 +4492,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4529,7 +4529,7 @@ void m68008_device::ori_w_imm16_das_df8() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4571,7 +4571,7 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4601,14 +4601,14 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -4616,7 +4616,7 @@ void m68008_device::ori_w_imm16_dais_df8() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4650,7 +4650,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4686,11 +4686,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4723,7 +4723,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4760,7 +4760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4801,7 +4801,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4869,7 +4869,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -4903,7 +4903,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4940,7 +4940,7 @@ void m68008_device::ori_w_imm16_adr16_df8() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4981,7 +4981,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5014,7 +5014,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5048,7 +5048,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5081,7 +5081,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -5115,7 +5115,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5152,7 +5152,7 @@ void m68008_device::ori_w_imm16_adr32_df8() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5197,7 +5197,7 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5229,23 +5229,23 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -5253,7 +5253,7 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5287,11 +5287,11 @@ void m68008_device::ori_i16u_sr_df8() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5334,7 +5334,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5367,7 +5367,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5400,12 +5400,12 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5435,7 +5435,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -5444,7 +5444,7 @@ void m68008_device::ori_l_imm32_ds_df8() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -5460,7 +5460,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5493,7 +5493,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5525,7 +5525,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -5560,7 +5560,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5593,7 +5593,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5628,7 +5628,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5663,7 +5663,7 @@ void m68008_device::ori_l_imm32_ais_df8() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5704,7 +5704,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5737,7 +5737,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5769,7 +5769,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -5804,11 +5804,11 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5841,7 +5841,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5876,7 +5876,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5911,7 +5911,7 @@ void m68008_device::ori_l_imm32_aips_df8() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5952,7 +5952,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5985,7 +5985,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6016,14 +6016,14 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6057,7 +6057,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6090,7 +6090,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6125,7 +6125,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6160,7 +6160,7 @@ void m68008_device::ori_l_imm32_pais_df8() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6201,7 +6201,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6234,7 +6234,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6266,7 +6266,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6298,7 +6298,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6333,7 +6333,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6366,7 +6366,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6401,7 +6401,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6436,7 +6436,7 @@ void m68008_device::ori_l_imm32_das_df8() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6477,7 +6477,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6510,7 +6510,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6540,14 +6540,14 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -6555,7 +6555,7 @@ void m68008_device::ori_l_imm32_dais_df8() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6589,7 +6589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6624,7 +6624,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6659,7 +6659,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6692,7 +6692,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6727,7 +6727,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6762,7 +6762,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6802,7 +6802,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6835,7 +6835,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6870,7 +6870,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6903,7 +6903,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6938,7 +6938,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6971,7 +6971,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7006,7 +7006,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7041,7 +7041,7 @@ void m68008_device::ori_l_imm32_adr16_df8() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -7081,7 +7081,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7114,7 +7114,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7147,7 +7147,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7181,7 +7181,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7214,7 +7214,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -7249,7 +7249,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7282,7 +7282,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7317,7 +7317,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7352,7 +7352,7 @@ void m68008_device::ori_l_imm32_adr32_df8() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -7397,13 +7397,13 @@ void m68008_device::btst_dd_ds_df8() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7442,7 +7442,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7455,7 +7455,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7473,7 +7473,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7505,7 +7505,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -7522,7 +7522,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -7542,7 +7542,7 @@ void m68008_device::movep_w_das_dd_df8() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7585,11 +7585,11 @@ void m68008_device::btst_dd_ais_df8() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -7607,13 +7607,13 @@ void m68008_device::btst_dd_ais_df8() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7659,12 +7659,12 @@ void m68008_device::btst_dd_aips_df8() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -7683,13 +7683,13 @@ void m68008_device::btst_dd_aips_df8() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7734,7 +7734,7 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7742,7 +7742,7 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -7761,13 +7761,13 @@ void m68008_device::btst_dd_pais_df8() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7810,7 +7810,7 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7843,11 +7843,11 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -7865,13 +7865,13 @@ void m68008_device::btst_dd_das_df8() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7912,14 +7912,14 @@ void m68008_device::btst_dd_dais_df8() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7927,7 +7927,7 @@ void m68008_device::btst_dd_dais_df8() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7961,7 +7961,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7997,11 +7997,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8019,13 +8019,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8070,7 +8070,7 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8103,7 +8103,7 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -8122,13 +8122,13 @@ void m68008_device::btst_dd_adr16_df8() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8171,7 +8171,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8205,7 +8205,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8238,7 +8238,7 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -8257,13 +8257,13 @@ void m68008_device::btst_dd_adr32_df8() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8305,7 +8305,7 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8338,11 +8338,11 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8360,13 +8360,13 @@ void m68008_device::btst_dd_dpc_df8() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8406,14 +8406,14 @@ void m68008_device::btst_dd_dpci_df8() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8421,7 +8421,7 @@ void m68008_device::btst_dd_dpci_df8() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8455,7 +8455,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8491,11 +8491,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8513,13 +8513,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8564,7 +8564,7 @@ void m68008_device::btst_dd_imm_df8() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8599,12 +8599,12 @@ void m68008_device::btst_dd_imm_df8() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8643,7 +8643,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -8656,7 +8656,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -8678,13 +8678,13 @@ void m68008_device::bchg_dd_ds_df8() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8723,7 +8723,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8735,14 +8735,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8760,7 +8760,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8792,7 +8792,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8808,7 +8808,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8825,7 +8825,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8842,7 +8842,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8862,7 +8862,7 @@ void m68008_device::movep_l_das_dd_df8() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8905,11 +8905,11 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -8928,7 +8928,7 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8963,7 +8963,7 @@ void m68008_device::bchg_dd_ais_df8() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8994,12 +8994,12 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -9019,7 +9019,7 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9054,7 +9054,7 @@ void m68008_device::bchg_dd_aips_df8() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9084,7 +9084,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9092,7 +9092,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -9112,7 +9112,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9147,7 +9147,7 @@ void m68008_device::bchg_dd_pais_df8() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9175,7 +9175,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9208,11 +9208,11 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -9231,7 +9231,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9266,7 +9266,7 @@ void m68008_device::bchg_dd_das_df8() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9292,14 +9292,14 @@ void m68008_device::bchg_dd_dais_df8() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9307,7 +9307,7 @@ void m68008_device::bchg_dd_dais_df8() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9341,7 +9341,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9377,11 +9377,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -9400,7 +9400,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9435,7 +9435,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9465,7 +9465,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9498,7 +9498,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -9518,7 +9518,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9553,7 +9553,7 @@ void m68008_device::bchg_dd_adr16_df8() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9581,7 +9581,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9615,7 +9615,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9648,7 +9648,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -9668,7 +9668,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9703,7 +9703,7 @@ void m68008_device::bchg_dd_adr32_df8() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9735,13 +9735,13 @@ void m68008_device::bclr_dd_ds_df8() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9777,14 +9777,14 @@ void m68008_device::bclr_dd_ds_df8() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9796,18 +9796,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9825,7 +9825,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9859,7 +9859,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -9875,7 +9875,7 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -9892,11 +9892,11 @@ void m68008_device::movep_w_dd_das_df8() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9939,11 +9939,11 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -9961,12 +9961,12 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10001,7 +10001,7 @@ void m68008_device::bclr_dd_ais_df8() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10032,12 +10032,12 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -10056,12 +10056,12 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10096,7 +10096,7 @@ void m68008_device::bclr_dd_aips_df8() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10126,7 +10126,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10134,7 +10134,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -10153,12 +10153,12 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10193,7 +10193,7 @@ void m68008_device::bclr_dd_pais_df8() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10221,7 +10221,7 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10254,11 +10254,11 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -10276,12 +10276,12 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10316,7 +10316,7 @@ void m68008_device::bclr_dd_das_df8() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10342,14 +10342,14 @@ void m68008_device::bclr_dd_dais_df8() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10357,7 +10357,7 @@ void m68008_device::bclr_dd_dais_df8() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10391,7 +10391,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10427,11 +10427,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -10449,12 +10449,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10489,7 +10489,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10519,7 +10519,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10552,7 +10552,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -10571,12 +10571,12 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10611,7 +10611,7 @@ void m68008_device::bclr_dd_adr16_df8() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10639,7 +10639,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10673,7 +10673,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10706,7 +10706,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -10725,12 +10725,12 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10765,7 +10765,7 @@ void m68008_device::bclr_dd_adr32_df8() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10797,13 +10797,13 @@ void m68008_device::bset_dd_ds_df8() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10842,7 +10842,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10854,14 +10854,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10879,7 +10879,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10912,7 +10912,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -10928,7 +10928,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -10945,7 +10945,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -10961,7 +10961,7 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -10978,11 +10978,11 @@ void m68008_device::movep_l_dd_das_df8() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11025,11 +11025,11 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -11048,7 +11048,7 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11083,7 +11083,7 @@ void m68008_device::bset_dd_ais_df8() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11114,12 +11114,12 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -11139,7 +11139,7 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11174,7 +11174,7 @@ void m68008_device::bset_dd_aips_df8() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11204,7 +11204,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -11212,7 +11212,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -11232,7 +11232,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11267,7 +11267,7 @@ void m68008_device::bset_dd_pais_df8() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11295,7 +11295,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11328,11 +11328,11 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -11351,7 +11351,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11386,7 +11386,7 @@ void m68008_device::bset_dd_das_df8() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11412,14 +11412,14 @@ void m68008_device::bset_dd_dais_df8() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11427,7 +11427,7 @@ void m68008_device::bset_dd_dais_df8() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11461,7 +11461,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11497,11 +11497,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -11520,7 +11520,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11555,7 +11555,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11585,7 +11585,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11618,7 +11618,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -11638,7 +11638,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11673,7 +11673,7 @@ void m68008_device::bset_dd_adr16_df8() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11701,7 +11701,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11768,7 +11768,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -11788,7 +11788,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11823,7 +11823,7 @@ void m68008_device::bset_dd_adr32_df8() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11852,7 +11852,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11885,7 +11885,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11893,7 +11893,7 @@ void m68008_device::andi_b_imm8_ds_df8() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11937,7 +11937,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11969,11 +11969,11 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -11991,7 +11991,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12028,7 +12028,7 @@ void m68008_device::andi_b_imm8_ais_df8() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12055,7 +12055,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12090,12 +12090,12 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -12114,7 +12114,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12151,7 +12151,7 @@ void m68008_device::andi_b_imm8_aips_df8() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12178,7 +12178,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12212,7 +12212,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12220,7 +12220,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -12239,7 +12239,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12276,7 +12276,7 @@ void m68008_device::andi_b_imm8_pais_df8() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12303,7 +12303,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12335,7 +12335,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12368,11 +12368,11 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -12390,7 +12390,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12427,7 +12427,7 @@ void m68008_device::andi_b_imm8_das_df8() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12454,7 +12454,7 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12484,14 +12484,14 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12499,7 +12499,7 @@ void m68008_device::andi_b_imm8_dais_df8() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12533,7 +12533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12569,11 +12569,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -12591,7 +12591,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12628,7 +12628,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12654,7 +12654,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12689,7 +12689,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -12722,7 +12722,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -12741,7 +12741,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12778,7 +12778,7 @@ void m68008_device::andi_b_imm8_adr16_df8() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12804,7 +12804,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12837,7 +12837,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12871,7 +12871,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -12904,7 +12904,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -12923,7 +12923,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12960,7 +12960,7 @@ void m68008_device::andi_b_imm8_adr32_df8() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -12986,7 +12986,7 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13018,21 +13018,21 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -13040,7 +13040,7 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13074,11 +13074,11 @@ void m68008_device::andi_imm8_ccr_df8() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13122,7 +13122,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13155,7 +13155,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -13163,7 +13163,7 @@ void m68008_device::andi_w_imm16_ds_df8() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13207,7 +13207,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13239,11 +13239,11 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13276,7 +13276,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13313,7 +13313,7 @@ void m68008_device::andi_w_imm16_ais_df8() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13355,7 +13355,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13390,12 +13390,12 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -13429,7 +13429,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13466,7 +13466,7 @@ void m68008_device::andi_w_imm16_aips_df8() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13508,7 +13508,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13542,7 +13542,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -13550,7 +13550,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -13584,7 +13584,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13621,7 +13621,7 @@ void m68008_device::andi_w_imm16_pais_df8() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13663,7 +13663,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13695,7 +13695,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13728,11 +13728,11 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13765,7 +13765,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13802,7 +13802,7 @@ void m68008_device::andi_w_imm16_das_df8() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13844,7 +13844,7 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13874,14 +13874,14 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -13889,7 +13889,7 @@ void m68008_device::andi_w_imm16_dais_df8() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13923,7 +13923,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13959,11 +13959,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13996,7 +13996,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14033,7 +14033,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14074,7 +14074,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14109,7 +14109,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14142,7 +14142,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -14176,7 +14176,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14213,7 +14213,7 @@ void m68008_device::andi_w_imm16_adr16_df8() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14254,7 +14254,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14287,7 +14287,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14321,7 +14321,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14354,7 +14354,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -14388,7 +14388,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14425,7 +14425,7 @@ void m68008_device::andi_w_imm16_adr32_df8() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14470,7 +14470,7 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14502,23 +14502,23 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -14526,7 +14526,7 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14560,11 +14560,11 @@ void m68008_device::andi_i16u_sr_df8() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14607,7 +14607,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14640,7 +14640,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14673,12 +14673,12 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14708,7 +14708,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -14717,7 +14717,7 @@ void m68008_device::andi_l_imm32_ds_df8() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -14733,7 +14733,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14766,7 +14766,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14798,7 +14798,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -14833,7 +14833,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14866,7 +14866,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14901,7 +14901,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14936,7 +14936,7 @@ void m68008_device::andi_l_imm32_ais_df8() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14977,7 +14977,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15010,7 +15010,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15042,7 +15042,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -15077,11 +15077,11 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15114,7 +15114,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15149,7 +15149,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15184,7 +15184,7 @@ void m68008_device::andi_l_imm32_aips_df8() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15225,7 +15225,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15258,7 +15258,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15289,14 +15289,14 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15330,7 +15330,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15363,7 +15363,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15398,7 +15398,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15433,7 +15433,7 @@ void m68008_device::andi_l_imm32_pais_df8() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15474,7 +15474,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15507,7 +15507,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15539,7 +15539,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15571,7 +15571,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -15606,7 +15606,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15639,7 +15639,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15674,7 +15674,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15709,7 +15709,7 @@ void m68008_device::andi_l_imm32_das_df8() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15750,7 +15750,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15783,7 +15783,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15813,14 +15813,14 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -15828,7 +15828,7 @@ void m68008_device::andi_l_imm32_dais_df8() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15862,7 +15862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15897,7 +15897,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -15932,7 +15932,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15965,7 +15965,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16000,7 +16000,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16035,7 +16035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16075,7 +16075,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16108,7 +16108,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16143,7 +16143,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16176,7 +16176,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -16211,7 +16211,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16244,7 +16244,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16279,7 +16279,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16314,7 +16314,7 @@ void m68008_device::andi_l_imm32_adr16_df8() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16354,7 +16354,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16387,7 +16387,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16420,7 +16420,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16454,7 +16454,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16487,7 +16487,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -16522,7 +16522,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16555,7 +16555,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16590,7 +16590,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16625,7 +16625,7 @@ void m68008_device::andi_l_imm32_adr32_df8() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16699,7 +16699,7 @@ void m68008_device::subi_b_imm8_ds_df8() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16781,7 +16781,7 @@ void m68008_device::subi_b_imm8_ais_df8() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16802,7 +16802,7 @@ void m68008_device::subi_b_imm8_ais_df8() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16902,7 +16902,7 @@ void m68008_device::subi_b_imm8_aips_df8() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -16921,7 +16921,7 @@ void m68008_device::subi_b_imm8_aips_df8() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17023,7 +17023,7 @@ void m68008_device::subi_b_imm8_pais_df8() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -17042,7 +17042,7 @@ void m68008_device::subi_b_imm8_pais_df8() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17168,7 +17168,7 @@ void m68008_device::subi_b_imm8_das_df8() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17189,7 +17189,7 @@ void m68008_device::subi_b_imm8_das_df8() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17281,7 +17281,7 @@ void m68008_device::subi_b_imm8_dais_df8() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17363,7 +17363,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17384,7 +17384,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17511,7 +17511,7 @@ void m68008_device::subi_b_imm8_adr16_df8() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -17530,7 +17530,7 @@ void m68008_device::subi_b_imm8_adr16_df8() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17688,7 +17688,7 @@ void m68008_device::subi_b_imm8_adr32_df8() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -17707,7 +17707,7 @@ void m68008_device::subi_b_imm8_adr32_df8() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17802,7 +17802,7 @@ void m68008_device::subi_w_imm16_ds_df8() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17884,7 +17884,7 @@ void m68008_device::subi_w_imm16_ais_df8() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17920,7 +17920,7 @@ void m68008_device::subi_w_imm16_ais_df8() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18035,7 +18035,7 @@ void m68008_device::subi_w_imm16_aips_df8() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -18069,7 +18069,7 @@ void m68008_device::subi_w_imm16_aips_df8() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18186,7 +18186,7 @@ void m68008_device::subi_w_imm16_pais_df8() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -18220,7 +18220,7 @@ void m68008_device::subi_w_imm16_pais_df8() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18361,7 +18361,7 @@ void m68008_device::subi_w_imm16_das_df8() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18397,7 +18397,7 @@ void m68008_device::subi_w_imm16_das_df8() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18504,7 +18504,7 @@ void m68008_device::subi_w_imm16_dais_df8() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -18586,7 +18586,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18622,7 +18622,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18764,7 +18764,7 @@ void m68008_device::subi_w_imm16_adr16_df8() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -18798,7 +18798,7 @@ void m68008_device::subi_w_imm16_adr16_df8() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18971,7 +18971,7 @@ void m68008_device::subi_w_imm16_adr32_df8() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -19005,7 +19005,7 @@ void m68008_device::subi_w_imm16_adr32_df8() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19146,7 +19146,7 @@ void m68008_device::subi_l_imm32_ds_df8() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -19180,7 +19180,7 @@ void m68008_device::subi_l_imm32_ds_df8() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -19267,7 +19267,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -19334,7 +19334,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19369,7 +19369,7 @@ void m68008_device::subi_l_imm32_ais_df8() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19507,7 +19507,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -19577,7 +19577,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19612,7 +19612,7 @@ void m68008_device::subi_l_imm32_aips_df8() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19749,7 +19749,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -19821,7 +19821,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19856,7 +19856,7 @@ void m68008_device::subi_l_imm32_pais_df8() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20025,7 +20025,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -20092,7 +20092,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20127,7 +20127,7 @@ void m68008_device::subi_l_imm32_das_df8() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20263,7 +20263,7 @@ void m68008_device::subi_l_imm32_dais_df8() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -20344,7 +20344,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -20411,7 +20411,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20446,7 +20446,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20617,7 +20617,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -20684,7 +20684,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20719,7 +20719,7 @@ void m68008_device::subi_l_imm32_adr16_df8() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20921,7 +20921,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -20988,7 +20988,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21023,7 +21023,7 @@ void m68008_device::subi_l_imm32_adr32_df8() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21131,7 +21131,7 @@ void m68008_device::addi_b_imm8_ds_df8() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -21213,7 +21213,7 @@ void m68008_device::addi_b_imm8_ais_df8() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21234,7 +21234,7 @@ void m68008_device::addi_b_imm8_ais_df8() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21334,7 +21334,7 @@ void m68008_device::addi_b_imm8_aips_df8() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -21353,7 +21353,7 @@ void m68008_device::addi_b_imm8_aips_df8() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21455,7 +21455,7 @@ void m68008_device::addi_b_imm8_pais_df8() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -21474,7 +21474,7 @@ void m68008_device::addi_b_imm8_pais_df8() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21600,7 +21600,7 @@ void m68008_device::addi_b_imm8_das_df8() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21621,7 +21621,7 @@ void m68008_device::addi_b_imm8_das_df8() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21713,7 +21713,7 @@ void m68008_device::addi_b_imm8_dais_df8() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -21795,7 +21795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21816,7 +21816,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21943,7 +21943,7 @@ void m68008_device::addi_b_imm8_adr16_df8() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -21962,7 +21962,7 @@ void m68008_device::addi_b_imm8_adr16_df8() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22120,7 +22120,7 @@ void m68008_device::addi_b_imm8_adr32_df8() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -22139,7 +22139,7 @@ void m68008_device::addi_b_imm8_adr32_df8() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22234,7 +22234,7 @@ void m68008_device::addi_w_imm16_ds_df8() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -22316,7 +22316,7 @@ void m68008_device::addi_w_imm16_ais_df8() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -22352,7 +22352,7 @@ void m68008_device::addi_w_imm16_ais_df8() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22467,7 +22467,7 @@ void m68008_device::addi_w_imm16_aips_df8() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -22501,7 +22501,7 @@ void m68008_device::addi_w_imm16_aips_df8() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22618,7 +22618,7 @@ void m68008_device::addi_w_imm16_pais_df8() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -22652,7 +22652,7 @@ void m68008_device::addi_w_imm16_pais_df8() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22793,7 +22793,7 @@ void m68008_device::addi_w_imm16_das_df8() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -22829,7 +22829,7 @@ void m68008_device::addi_w_imm16_das_df8() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22936,7 +22936,7 @@ void m68008_device::addi_w_imm16_dais_df8() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -23018,7 +23018,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -23054,7 +23054,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23196,7 +23196,7 @@ void m68008_device::addi_w_imm16_adr16_df8() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -23230,7 +23230,7 @@ void m68008_device::addi_w_imm16_adr16_df8() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23403,7 +23403,7 @@ void m68008_device::addi_w_imm16_adr32_df8() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -23437,7 +23437,7 @@ void m68008_device::addi_w_imm16_adr32_df8() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23578,7 +23578,7 @@ void m68008_device::addi_l_imm32_ds_df8() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -23612,7 +23612,7 @@ void m68008_device::addi_l_imm32_ds_df8() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -23699,7 +23699,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -23766,7 +23766,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23801,7 +23801,7 @@ void m68008_device::addi_l_imm32_ais_df8() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23939,7 +23939,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -24009,7 +24009,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24044,7 +24044,7 @@ void m68008_device::addi_l_imm32_aips_df8() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24181,7 +24181,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -24253,7 +24253,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24288,7 +24288,7 @@ void m68008_device::addi_l_imm32_pais_df8() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24457,7 +24457,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -24524,7 +24524,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24559,7 +24559,7 @@ void m68008_device::addi_l_imm32_das_df8() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24695,7 +24695,7 @@ void m68008_device::addi_l_imm32_dais_df8() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -24776,7 +24776,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -24843,7 +24843,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24878,7 +24878,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25049,7 +25049,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -25116,7 +25116,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25151,7 +25151,7 @@ void m68008_device::addi_l_imm32_adr16_df8() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25353,7 +25353,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -25420,7 +25420,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25455,7 +25455,7 @@ void m68008_device::addi_l_imm32_adr32_df8() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25531,7 +25531,7 @@ void m68008_device::btst_imm8_ds_df8() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25567,13 +25567,13 @@ void m68008_device::btst_imm8_ds_df8() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -25612,7 +25612,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25625,7 +25625,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25644,7 +25644,7 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25676,11 +25676,11 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -25698,13 +25698,13 @@ void m68008_device::btst_imm8_ais_df8() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25748,7 +25748,7 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25783,12 +25783,12 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -25807,13 +25807,13 @@ void m68008_device::btst_imm8_aips_df8() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25857,7 +25857,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25891,7 +25891,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -25899,7 +25899,7 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -25918,13 +25918,13 @@ void m68008_device::btst_imm8_pais_df8() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25968,7 +25968,7 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26000,7 +26000,7 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26033,11 +26033,11 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -26055,13 +26055,13 @@ void m68008_device::btst_imm8_das_df8() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26105,7 +26105,7 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26135,14 +26135,14 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26150,7 +26150,7 @@ void m68008_device::btst_imm8_dais_df8() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26184,7 +26184,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26220,11 +26220,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -26242,13 +26242,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26291,7 +26291,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26326,7 +26326,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -26359,7 +26359,7 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -26378,13 +26378,13 @@ void m68008_device::btst_imm8_adr16_df8() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26427,7 +26427,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26460,7 +26460,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26494,7 +26494,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -26527,7 +26527,7 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -26546,13 +26546,13 @@ void m68008_device::btst_imm8_adr32_df8() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26595,7 +26595,7 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26627,7 +26627,7 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26660,11 +26660,11 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -26682,13 +26682,13 @@ void m68008_device::btst_imm8_dpc_df8() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26731,7 +26731,7 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26761,14 +26761,14 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26776,7 +26776,7 @@ void m68008_device::btst_imm8_dpci_df8() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26810,7 +26810,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26846,11 +26846,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -26868,13 +26868,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26918,7 +26918,7 @@ void m68008_device::bchg_imm8_ds_df8() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26954,13 +26954,13 @@ void m68008_device::bchg_imm8_ds_df8() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -26999,7 +26999,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -27011,14 +27011,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -27037,7 +27037,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27069,11 +27069,11 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -27092,7 +27092,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27127,7 +27127,7 @@ void m68008_device::bchg_imm8_ais_df8() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27156,7 +27156,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27191,12 +27191,12 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -27216,7 +27216,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27251,7 +27251,7 @@ void m68008_device::bchg_imm8_aips_df8() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27280,7 +27280,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27314,7 +27314,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27322,7 +27322,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -27342,7 +27342,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27377,7 +27377,7 @@ void m68008_device::bchg_imm8_pais_df8() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27406,7 +27406,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27438,7 +27438,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27471,11 +27471,11 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -27494,7 +27494,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27529,7 +27529,7 @@ void m68008_device::bchg_imm8_das_df8() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27558,7 +27558,7 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27588,14 +27588,14 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27603,7 +27603,7 @@ void m68008_device::bchg_imm8_dais_df8() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27637,7 +27637,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27673,11 +27673,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -27696,7 +27696,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27731,7 +27731,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27759,7 +27759,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27794,7 +27794,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27827,7 +27827,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -27847,7 +27847,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -27882,7 +27882,7 @@ void m68008_device::bchg_imm8_adr16_df8() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27910,7 +27910,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27943,7 +27943,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27977,7 +27977,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28010,7 +28010,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -28030,7 +28030,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28065,7 +28065,7 @@ void m68008_device::bchg_imm8_adr32_df8() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28094,7 +28094,7 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28130,13 +28130,13 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28172,14 +28172,14 @@ void m68008_device::bclr_imm8_ds_df8() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -28191,18 +28191,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -28221,7 +28221,7 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28253,11 +28253,11 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -28275,12 +28275,12 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28315,7 +28315,7 @@ void m68008_device::bclr_imm8_ais_df8() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28344,7 +28344,7 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28379,12 +28379,12 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -28403,12 +28403,12 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28443,7 +28443,7 @@ void m68008_device::bclr_imm8_aips_df8() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28472,7 +28472,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28506,7 +28506,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28514,7 +28514,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -28533,12 +28533,12 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28573,7 +28573,7 @@ void m68008_device::bclr_imm8_pais_df8() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28602,7 +28602,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28634,7 +28634,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28667,11 +28667,11 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -28689,12 +28689,12 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28729,7 +28729,7 @@ void m68008_device::bclr_imm8_das_df8() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28758,7 +28758,7 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28788,14 +28788,14 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28803,7 +28803,7 @@ void m68008_device::bclr_imm8_dais_df8() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28837,7 +28837,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28873,11 +28873,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -28895,12 +28895,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -28935,7 +28935,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28963,7 +28963,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28998,7 +28998,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29031,7 +29031,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -29050,12 +29050,12 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29090,7 +29090,7 @@ void m68008_device::bclr_imm8_adr16_df8() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29118,7 +29118,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29151,7 +29151,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29185,7 +29185,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29218,7 +29218,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -29237,12 +29237,12 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29277,7 +29277,7 @@ void m68008_device::bclr_imm8_adr32_df8() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29306,7 +29306,7 @@ void m68008_device::bset_imm8_ds_df8() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29342,13 +29342,13 @@ void m68008_device::bset_imm8_ds_df8() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29387,7 +29387,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29399,14 +29399,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29425,7 +29425,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29457,11 +29457,11 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -29480,7 +29480,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29515,7 +29515,7 @@ void m68008_device::bset_imm8_ais_df8() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29544,7 +29544,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29579,12 +29579,12 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -29604,7 +29604,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29639,7 +29639,7 @@ void m68008_device::bset_imm8_aips_df8() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29668,7 +29668,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29702,7 +29702,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -29710,7 +29710,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -29730,7 +29730,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29765,7 +29765,7 @@ void m68008_device::bset_imm8_pais_df8() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29794,7 +29794,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29826,7 +29826,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29859,11 +29859,11 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -29882,7 +29882,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29917,7 +29917,7 @@ void m68008_device::bset_imm8_das_df8() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29946,7 +29946,7 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29976,14 +29976,14 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -29991,7 +29991,7 @@ void m68008_device::bset_imm8_dais_df8() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30025,7 +30025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30061,11 +30061,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -30084,7 +30084,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30119,7 +30119,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30147,7 +30147,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30182,7 +30182,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30215,7 +30215,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -30235,7 +30235,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30270,7 +30270,7 @@ void m68008_device::bset_imm8_adr16_df8() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30298,7 +30298,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30331,7 +30331,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30365,7 +30365,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30398,7 +30398,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -30418,7 +30418,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30453,7 +30453,7 @@ void m68008_device::bset_imm8_adr32_df8() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30482,7 +30482,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30515,7 +30515,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -30523,7 +30523,7 @@ void m68008_device::eori_b_imm8_ds_df8() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30567,7 +30567,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30599,11 +30599,11 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -30621,7 +30621,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30658,7 +30658,7 @@ void m68008_device::eori_b_imm8_ais_df8() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -30685,7 +30685,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30720,12 +30720,12 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -30744,7 +30744,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30781,7 +30781,7 @@ void m68008_device::eori_b_imm8_aips_df8() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -30808,7 +30808,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30842,7 +30842,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -30850,7 +30850,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -30869,7 +30869,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30906,7 +30906,7 @@ void m68008_device::eori_b_imm8_pais_df8() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -30933,7 +30933,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30965,7 +30965,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30998,11 +30998,11 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -31020,7 +31020,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31057,7 +31057,7 @@ void m68008_device::eori_b_imm8_das_df8() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -31084,7 +31084,7 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31114,14 +31114,14 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -31129,7 +31129,7 @@ void m68008_device::eori_b_imm8_dais_df8() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31163,7 +31163,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31199,11 +31199,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -31221,7 +31221,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31258,7 +31258,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -31284,7 +31284,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31319,7 +31319,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31352,7 +31352,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -31371,7 +31371,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31408,7 +31408,7 @@ void m68008_device::eori_b_imm8_adr16_df8() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -31434,7 +31434,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31467,7 +31467,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31501,7 +31501,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31534,7 +31534,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -31553,7 +31553,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31590,7 +31590,7 @@ void m68008_device::eori_b_imm8_adr32_df8() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -31616,7 +31616,7 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31648,21 +31648,21 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -31670,7 +31670,7 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31704,11 +31704,11 @@ void m68008_device::eori_imm8_ccr_df8() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31752,7 +31752,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31785,7 +31785,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -31793,7 +31793,7 @@ void m68008_device::eori_w_imm16_ds_df8() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31837,7 +31837,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31869,11 +31869,11 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31906,7 +31906,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31943,7 +31943,7 @@ void m68008_device::eori_w_imm16_ais_df8() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -31985,7 +31985,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32020,12 +32020,12 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -32059,7 +32059,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32096,7 +32096,7 @@ void m68008_device::eori_w_imm16_aips_df8() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32138,7 +32138,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32172,7 +32172,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -32180,7 +32180,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -32214,7 +32214,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32251,7 +32251,7 @@ void m68008_device::eori_w_imm16_pais_df8() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32293,7 +32293,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32325,7 +32325,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32358,11 +32358,11 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32395,7 +32395,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32432,7 +32432,7 @@ void m68008_device::eori_w_imm16_das_df8() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32474,7 +32474,7 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32504,14 +32504,14 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -32519,7 +32519,7 @@ void m68008_device::eori_w_imm16_dais_df8() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32553,7 +32553,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32589,11 +32589,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32626,7 +32626,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32663,7 +32663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32704,7 +32704,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32739,7 +32739,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32772,7 +32772,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -32806,7 +32806,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32843,7 +32843,7 @@ void m68008_device::eori_w_imm16_adr16_df8() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32884,7 +32884,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32917,7 +32917,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32951,7 +32951,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32984,7 +32984,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -33018,7 +33018,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33055,7 +33055,7 @@ void m68008_device::eori_w_imm16_adr32_df8() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33100,7 +33100,7 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33132,23 +33132,23 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -33156,7 +33156,7 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33190,11 +33190,11 @@ void m68008_device::eori_i16u_sr_df8() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33237,7 +33237,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33270,7 +33270,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33303,12 +33303,12 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33338,7 +33338,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -33347,7 +33347,7 @@ void m68008_device::eori_l_imm32_ds_df8() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -33363,7 +33363,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33396,7 +33396,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33428,7 +33428,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -33463,7 +33463,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33496,7 +33496,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33531,7 +33531,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -33566,7 +33566,7 @@ void m68008_device::eori_l_imm32_ais_df8() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33607,7 +33607,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33640,7 +33640,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33672,7 +33672,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -33707,11 +33707,11 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33744,7 +33744,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33779,7 +33779,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -33814,7 +33814,7 @@ void m68008_device::eori_l_imm32_aips_df8() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33855,7 +33855,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33888,7 +33888,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33919,14 +33919,14 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33960,7 +33960,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33993,7 +33993,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34028,7 +34028,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34063,7 +34063,7 @@ void m68008_device::eori_l_imm32_pais_df8() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34104,7 +34104,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34137,7 +34137,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34169,7 +34169,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34201,7 +34201,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -34236,7 +34236,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34269,7 +34269,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34304,7 +34304,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34339,7 +34339,7 @@ void m68008_device::eori_l_imm32_das_df8() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34380,7 +34380,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34413,7 +34413,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34443,14 +34443,14 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -34458,7 +34458,7 @@ void m68008_device::eori_l_imm32_dais_df8() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34492,7 +34492,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34527,7 +34527,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -34562,7 +34562,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34595,7 +34595,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34630,7 +34630,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34665,7 +34665,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34705,7 +34705,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34738,7 +34738,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34773,7 +34773,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34806,7 +34806,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -34841,7 +34841,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34874,7 +34874,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34909,7 +34909,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34944,7 +34944,7 @@ void m68008_device::eori_l_imm32_adr16_df8() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34984,7 +34984,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35017,7 +35017,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35050,7 +35050,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35084,7 +35084,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35117,7 +35117,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -35152,7 +35152,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35185,7 +35185,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35220,7 +35220,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -35255,7 +35255,7 @@ void m68008_device::eori_l_imm32_adr32_df8() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -35329,7 +35329,7 @@ void m68008_device::cmpi_b_imm8_ds_df8() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -35410,7 +35410,7 @@ void m68008_device::cmpi_b_imm8_ais_df8() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35431,7 +35431,7 @@ void m68008_device::cmpi_b_imm8_ais_df8() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35517,7 +35517,7 @@ void m68008_device::cmpi_b_imm8_aips_df8() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -35536,7 +35536,7 @@ void m68008_device::cmpi_b_imm8_aips_df8() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35624,7 +35624,7 @@ void m68008_device::cmpi_b_imm8_pais_df8() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -35643,7 +35643,7 @@ void m68008_device::cmpi_b_imm8_pais_df8() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35755,7 +35755,7 @@ void m68008_device::cmpi_b_imm8_das_df8() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35776,7 +35776,7 @@ void m68008_device::cmpi_b_imm8_das_df8() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35854,7 +35854,7 @@ void m68008_device::cmpi_b_imm8_dais_df8() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35936,7 +35936,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35957,7 +35957,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36070,7 +36070,7 @@ void m68008_device::cmpi_b_imm8_adr16_df8() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -36089,7 +36089,7 @@ void m68008_device::cmpi_b_imm8_adr16_df8() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36233,7 +36233,7 @@ void m68008_device::cmpi_b_imm8_adr32_df8() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -36252,7 +36252,7 @@ void m68008_device::cmpi_b_imm8_adr32_df8() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36333,7 +36333,7 @@ void m68008_device::cmpi_w_imm16_ds_df8() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -36414,7 +36414,7 @@ void m68008_device::cmpi_w_imm16_ais_df8() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -36450,7 +36450,7 @@ void m68008_device::cmpi_w_imm16_ais_df8() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36536,7 +36536,7 @@ void m68008_device::cmpi_w_imm16_aips_df8() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -36570,7 +36570,7 @@ void m68008_device::cmpi_w_imm16_aips_df8() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36658,7 +36658,7 @@ void m68008_device::cmpi_w_imm16_pais_df8() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -36692,7 +36692,7 @@ void m68008_device::cmpi_w_imm16_pais_df8() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36804,7 +36804,7 @@ void m68008_device::cmpi_w_imm16_das_df8() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -36840,7 +36840,7 @@ void m68008_device::cmpi_w_imm16_das_df8() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36918,7 +36918,7 @@ void m68008_device::cmpi_w_imm16_dais_df8() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37000,7 +37000,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -37036,7 +37036,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37149,7 +37149,7 @@ void m68008_device::cmpi_w_imm16_adr16_df8() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37183,7 +37183,7 @@ void m68008_device::cmpi_w_imm16_adr16_df8() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37327,7 +37327,7 @@ void m68008_device::cmpi_w_imm16_adr32_df8() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37361,7 +37361,7 @@ void m68008_device::cmpi_w_imm16_adr32_df8() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37474,11 +37474,11 @@ void m68008_device::cmpi_l_imm32_ds_df8() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37591,7 +37591,7 @@ void m68008_device::cmpi_l_imm32_ais_df8() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37658,13 +37658,13 @@ void m68008_device::cmpi_l_imm32_ais_df8() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37772,7 +37772,7 @@ void m68008_device::cmpi_l_imm32_aips_df8() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37842,13 +37842,13 @@ void m68008_device::cmpi_l_imm32_aips_df8() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37955,7 +37955,7 @@ void m68008_device::cmpi_l_imm32_pais_df8() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -38027,13 +38027,13 @@ void m68008_device::cmpi_l_imm32_pais_df8() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38172,7 +38172,7 @@ void m68008_device::cmpi_l_imm32_das_df8() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38239,13 +38239,13 @@ void m68008_device::cmpi_l_imm32_das_df8() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68008_device::cmpi_l_imm32_dais_df8() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -38432,7 +38432,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38499,13 +38499,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38646,7 +38646,7 @@ void m68008_device::cmpi_l_imm32_adr16_df8() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38713,13 +38713,13 @@ void m68008_device::cmpi_l_imm32_adr16_df8() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68008_device::cmpi_l_imm32_adr32_df8() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38958,13 +38958,13 @@ void m68008_device::cmpi_l_imm32_adr32_df8() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39012,7 +39012,7 @@ void m68008_device::move_b_ds_dd_df8() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -39062,7 +39062,7 @@ void m68008_device::move_b_ais_dd_df8() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39084,7 +39084,7 @@ void m68008_device::move_b_ais_dd_df8() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39138,7 +39138,7 @@ void m68008_device::move_b_aips_dd_df8() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -39158,7 +39158,7 @@ void m68008_device::move_b_aips_dd_df8() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39214,7 +39214,7 @@ void m68008_device::move_b_pais_dd_df8() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -39234,7 +39234,7 @@ void m68008_device::move_b_pais_dd_df8() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39314,7 +39314,7 @@ void m68008_device::move_b_das_dd_df8() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39336,7 +39336,7 @@ void m68008_device::move_b_das_dd_df8() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39382,7 +39382,7 @@ void m68008_device::move_b_dais_dd_df8() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39464,7 +39464,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39486,7 +39486,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39567,7 +39567,7 @@ void m68008_device::move_b_adr16_dd_df8() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -39587,7 +39587,7 @@ void m68008_device::move_b_adr16_dd_df8() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39699,7 +39699,7 @@ void m68008_device::move_b_adr32_dd_df8() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -39719,7 +39719,7 @@ void m68008_device::move_b_adr32_dd_df8() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39798,7 +39798,7 @@ void m68008_device::move_b_dpc_dd_df8() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39820,7 +39820,7 @@ void m68008_device::move_b_dpc_dd_df8() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39865,7 +39865,7 @@ void m68008_device::move_b_dpci_dd_df8() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39947,7 +39947,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39969,7 +39969,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -40053,7 +40053,7 @@ void m68008_device::move_b_imm8_dd_df8() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -40106,7 +40106,7 @@ void m68008_device::move_b_ds_aid_df8() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40169,7 +40169,7 @@ void m68008_device::move_b_ais_aid_df8() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40190,7 +40190,7 @@ void m68008_device::move_b_ais_aid_df8() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40259,7 +40259,7 @@ void m68008_device::move_b_aips_aid_df8() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -40278,7 +40278,7 @@ void m68008_device::move_b_aips_aid_df8() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40349,7 +40349,7 @@ void m68008_device::move_b_pais_aid_df8() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -40368,7 +40368,7 @@ void m68008_device::move_b_pais_aid_df8() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40463,7 +40463,7 @@ void m68008_device::move_b_das_aid_df8() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40484,7 +40484,7 @@ void m68008_device::move_b_das_aid_df8() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40545,7 +40545,7 @@ void m68008_device::move_b_dais_aid_df8() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -40627,7 +40627,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40648,7 +40648,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40744,7 +40744,7 @@ void m68008_device::move_b_adr16_aid_df8() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -40763,7 +40763,7 @@ void m68008_device::move_b_adr16_aid_df8() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40890,7 +40890,7 @@ void m68008_device::move_b_adr32_aid_df8() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -40909,7 +40909,7 @@ void m68008_device::move_b_adr32_aid_df8() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41003,7 +41003,7 @@ void m68008_device::move_b_dpc_aid_df8() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41024,7 +41024,7 @@ void m68008_device::move_b_dpc_aid_df8() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41084,7 +41084,7 @@ void m68008_device::move_b_dpci_aid_df8() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41166,7 +41166,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41187,7 +41187,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41286,7 +41286,7 @@ void m68008_device::move_b_imm8_aid_df8() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41352,7 +41352,7 @@ void m68008_device::move_b_ds_aipd_df8() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41414,7 +41414,7 @@ void m68008_device::move_b_ais_aipd_df8() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41436,7 +41436,7 @@ void m68008_device::move_b_ais_aipd_df8() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41504,7 +41504,7 @@ void m68008_device::move_b_aips_aipd_df8() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -41524,7 +41524,7 @@ void m68008_device::move_b_aips_aipd_df8() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41594,7 +41594,7 @@ void m68008_device::move_b_pais_aipd_df8() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -41614,7 +41614,7 @@ void m68008_device::move_b_pais_aipd_df8() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41708,7 +41708,7 @@ void m68008_device::move_b_das_aipd_df8() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41730,7 +41730,7 @@ void m68008_device::move_b_das_aipd_df8() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41790,7 +41790,7 @@ void m68008_device::move_b_dais_aipd_df8() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41872,7 +41872,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41894,7 +41894,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41989,7 +41989,7 @@ void m68008_device::move_b_adr16_aipd_df8() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -42009,7 +42009,7 @@ void m68008_device::move_b_adr16_aipd_df8() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42135,7 +42135,7 @@ void m68008_device::move_b_adr32_aipd_df8() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -42155,7 +42155,7 @@ void m68008_device::move_b_adr32_aipd_df8() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42248,7 +42248,7 @@ void m68008_device::move_b_dpc_aipd_df8() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42270,7 +42270,7 @@ void m68008_device::move_b_dpc_aipd_df8() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42329,7 +42329,7 @@ void m68008_device::move_b_dpci_aipd_df8() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42411,7 +42411,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42433,7 +42433,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42531,7 +42531,7 @@ void m68008_device::move_b_imm8_aipd_df8() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42595,7 +42595,7 @@ void m68008_device::move_b_ds_paid_df8() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42658,7 +42658,7 @@ void m68008_device::move_b_ais_paid_df8() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42679,7 +42679,7 @@ void m68008_device::move_b_ais_paid_df8() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42748,7 +42748,7 @@ void m68008_device::move_b_aips_paid_df8() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -42767,7 +42767,7 @@ void m68008_device::move_b_aips_paid_df8() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42838,7 +42838,7 @@ void m68008_device::move_b_pais_paid_df8() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -42857,7 +42857,7 @@ void m68008_device::move_b_pais_paid_df8() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42952,7 +42952,7 @@ void m68008_device::move_b_das_paid_df8() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42973,7 +42973,7 @@ void m68008_device::move_b_das_paid_df8() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43034,7 +43034,7 @@ void m68008_device::move_b_dais_paid_df8() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43116,7 +43116,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43137,7 +43137,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43233,7 +43233,7 @@ void m68008_device::move_b_adr16_paid_df8() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -43252,7 +43252,7 @@ void m68008_device::move_b_adr16_paid_df8() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43379,7 +43379,7 @@ void m68008_device::move_b_adr32_paid_df8() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -43398,7 +43398,7 @@ void m68008_device::move_b_adr32_paid_df8() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43492,7 +43492,7 @@ void m68008_device::move_b_dpc_paid_df8() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43513,7 +43513,7 @@ void m68008_device::move_b_dpc_paid_df8() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43573,7 +43573,7 @@ void m68008_device::move_b_dpci_paid_df8() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43655,7 +43655,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43676,7 +43676,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43774,7 +43774,7 @@ void m68008_device::move_b_imm8_paid_df8() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43870,7 +43870,7 @@ void m68008_device::move_b_ds_dad_df8() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43934,7 +43934,7 @@ void m68008_device::move_b_ais_dad_df8() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43954,7 +43954,7 @@ void m68008_device::move_b_ais_dad_df8() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44060,7 +44060,7 @@ void m68008_device::move_b_aips_dad_df8() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -44078,7 +44078,7 @@ void m68008_device::move_b_aips_dad_df8() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44186,7 +44186,7 @@ void m68008_device::move_b_pais_dad_df8() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -44204,7 +44204,7 @@ void m68008_device::move_b_pais_dad_df8() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44336,7 +44336,7 @@ void m68008_device::move_b_das_dad_df8() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44356,7 +44356,7 @@ void m68008_device::move_b_das_dad_df8() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44454,7 +44454,7 @@ void m68008_device::move_b_dais_dad_df8() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44536,7 +44536,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44556,7 +44556,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44689,7 +44689,7 @@ void m68008_device::move_b_adr16_dad_df8() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -44707,7 +44707,7 @@ void m68008_device::move_b_adr16_dad_df8() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44871,7 +44871,7 @@ void m68008_device::move_b_adr32_dad_df8() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -44889,7 +44889,7 @@ void m68008_device::move_b_adr32_dad_df8() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45020,7 +45020,7 @@ void m68008_device::move_b_dpc_dad_df8() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45040,7 +45040,7 @@ void m68008_device::move_b_dpc_dad_df8() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45137,7 +45137,7 @@ void m68008_device::move_b_dpci_dad_df8() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45219,7 +45219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45239,7 +45239,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45405,7 +45405,7 @@ void m68008_device::move_b_imm8_dad_df8() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45467,7 +45467,7 @@ void m68008_device::move_b_ds_daid_df8() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -45551,7 +45551,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45615,7 +45615,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45632,7 +45632,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45647,7 +45647,7 @@ void m68008_device::move_b_ais_daid_df8() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45681,7 +45681,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45789,7 +45789,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -45804,7 +45804,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45819,7 +45819,7 @@ void m68008_device::move_b_aips_daid_df8() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45853,7 +45853,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45963,7 +45963,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -45978,7 +45978,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45993,7 +45993,7 @@ void m68008_device::move_b_pais_daid_df8() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46027,7 +46027,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46161,7 +46161,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46178,7 +46178,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46193,7 +46193,7 @@ void m68008_device::move_b_das_daid_df8() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46227,7 +46227,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46327,7 +46327,7 @@ void m68008_device::move_b_dais_daid_df8() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46409,7 +46409,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46426,7 +46426,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46441,7 +46441,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46475,7 +46475,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46610,7 +46610,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -46625,7 +46625,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46640,7 +46640,7 @@ void m68008_device::move_b_adr16_daid_df8() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46674,7 +46674,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46840,7 +46840,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -46855,7 +46855,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46870,7 +46870,7 @@ void m68008_device::move_b_adr32_daid_df8() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46904,7 +46904,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47037,7 +47037,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47054,7 +47054,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -47069,7 +47069,7 @@ void m68008_device::move_b_dpc_daid_df8() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47103,7 +47103,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47202,7 +47202,7 @@ void m68008_device::move_b_dpci_daid_df8() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -47284,7 +47284,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47301,7 +47301,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -47316,7 +47316,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47350,7 +47350,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47483,7 +47483,7 @@ void m68008_device::move_b_imm8_daid_df8() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -47567,7 +47567,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47632,7 +47632,7 @@ void m68008_device::move_b_ds_adr16_df8() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47731,7 +47731,7 @@ void m68008_device::move_b_ais_adr16_df8() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47751,7 +47751,7 @@ void m68008_device::move_b_ais_adr16_df8() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47856,7 +47856,7 @@ void m68008_device::move_b_aips_adr16_df8() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -47874,7 +47874,7 @@ void m68008_device::move_b_aips_adr16_df8() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47981,7 +47981,7 @@ void m68008_device::move_b_pais_adr16_df8() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -47999,7 +47999,7 @@ void m68008_device::move_b_pais_adr16_df8() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48130,7 +48130,7 @@ void m68008_device::move_b_das_adr16_df8() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48150,7 +48150,7 @@ void m68008_device::move_b_das_adr16_df8() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48247,7 +48247,7 @@ void m68008_device::move_b_dais_adr16_df8() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48329,7 +48329,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48349,7 +48349,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48481,7 +48481,7 @@ void m68008_device::move_b_adr16_adr16_df8() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -48499,7 +48499,7 @@ void m68008_device::move_b_adr16_adr16_df8() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48662,7 +48662,7 @@ void m68008_device::move_b_adr32_adr16_df8() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -48680,7 +48680,7 @@ void m68008_device::move_b_adr32_adr16_df8() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48810,7 +48810,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48830,7 +48830,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48926,7 +48926,7 @@ void m68008_device::move_b_dpc_adr16_df8() // 11fa ffff
void m68008_device::move_b_dpci_adr16_df8() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -49008,7 +49008,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49028,7 +49028,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49162,7 +49162,7 @@ void m68008_device::move_b_imm8_adr16_df8() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49294,7 +49294,7 @@ void m68008_device::move_b_ds_adr32_df8() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49393,7 +49393,7 @@ void m68008_device::move_b_ais_adr32_df8() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49413,7 +49413,7 @@ void m68008_device::move_b_ais_adr32_df8() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49548,7 +49548,7 @@ void m68008_device::move_b_aips_adr32_df8() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -49566,7 +49566,7 @@ void m68008_device::move_b_aips_adr32_df8() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49703,7 +49703,7 @@ void m68008_device::move_b_pais_adr32_df8() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -49721,7 +49721,7 @@ void m68008_device::move_b_pais_adr32_df8() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49882,7 +49882,7 @@ void m68008_device::move_b_das_adr32_df8() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49902,7 +49902,7 @@ void m68008_device::move_b_das_adr32_df8() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50029,7 +50029,7 @@ void m68008_device::move_b_dais_adr32_df8() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50111,7 +50111,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50131,7 +50131,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50293,7 +50293,7 @@ void m68008_device::move_b_adr16_adr32_df8() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -50311,7 +50311,7 @@ void m68008_device::move_b_adr16_adr32_df8() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50504,7 +50504,7 @@ void m68008_device::move_b_adr32_adr32_df8() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -50522,7 +50522,7 @@ void m68008_device::move_b_adr32_adr32_df8() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50682,7 +50682,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50702,7 +50702,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50828,7 +50828,7 @@ void m68008_device::move_b_dpc_adr32_df8() // 13fa ffff
void m68008_device::move_b_dpci_adr32_df8() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50910,7 +50910,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50930,7 +50930,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51125,7 +51125,7 @@ void m68008_device::move_b_imm8_adr32_df8() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51228,13 +51228,13 @@ void m68008_device::move_l_ds_dd_df8() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -51283,14 +51283,14 @@ void m68008_device::move_l_as_dd_df8() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51335,7 +51335,7 @@ void m68008_device::move_l_ais_dd_df8() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -51403,14 +51403,14 @@ void m68008_device::move_l_ais_dd_df8() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51455,7 +51455,7 @@ void m68008_device::move_l_aips_dd_df8() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -51526,14 +51526,14 @@ void m68008_device::move_l_aips_dd_df8() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51577,7 +51577,7 @@ void m68008_device::move_l_pais_dd_df8() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -51650,14 +51650,14 @@ void m68008_device::move_l_pais_dd_df8() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51733,7 +51733,7 @@ void m68008_device::move_l_das_dd_df8() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -51801,14 +51801,14 @@ void m68008_device::move_l_das_dd_df8() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51851,7 +51851,7 @@ void m68008_device::move_l_dais_dd_df8() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51932,7 +51932,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -52000,14 +52000,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52085,7 +52085,7 @@ void m68008_device::move_l_adr16_dd_df8() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -52153,14 +52153,14 @@ void m68008_device::move_l_adr16_dd_df8() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52269,7 +52269,7 @@ void m68008_device::move_l_adr32_dd_df8() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -52337,14 +52337,14 @@ void m68008_device::move_l_adr32_dd_df8() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52419,7 +52419,7 @@ void m68008_device::move_l_dpc_dd_df8() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -52487,14 +52487,14 @@ void m68008_device::move_l_dpc_dd_df8() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52536,7 +52536,7 @@ void m68008_device::move_l_dpci_dd_df8() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52617,7 +52617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -52685,14 +52685,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52804,14 +52804,14 @@ void m68008_device::move_l_imm32_dd_df8() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52859,13 +52859,13 @@ void m68008_device::movea_l_ds_ad_df8() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -52912,12 +52912,12 @@ void m68008_device::movea_l_as_ad_df8() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52962,7 +52962,7 @@ void m68008_device::movea_l_ais_ad_df8() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53030,13 +53030,13 @@ void m68008_device::movea_l_ais_ad_df8() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53080,7 +53080,7 @@ void m68008_device::movea_l_aips_ad_df8() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53151,13 +53151,13 @@ void m68008_device::movea_l_aips_ad_df8() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53200,7 +53200,7 @@ void m68008_device::movea_l_pais_ad_df8() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -53273,13 +53273,13 @@ void m68008_device::movea_l_pais_ad_df8() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53354,7 +53354,7 @@ void m68008_device::movea_l_das_ad_df8() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53422,13 +53422,13 @@ void m68008_device::movea_l_das_ad_df8() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53470,7 +53470,7 @@ void m68008_device::movea_l_dais_ad_df8() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53551,7 +53551,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53619,13 +53619,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53702,7 +53702,7 @@ void m68008_device::movea_l_adr16_ad_df8() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53770,13 +53770,13 @@ void m68008_device::movea_l_adr16_ad_df8() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -53884,7 +53884,7 @@ void m68008_device::movea_l_adr32_ad_df8() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -53952,13 +53952,13 @@ void m68008_device::movea_l_adr32_ad_df8() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54032,7 +54032,7 @@ void m68008_device::movea_l_dpc_ad_df8() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54100,13 +54100,13 @@ void m68008_device::movea_l_dpc_ad_df8() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54147,7 +54147,7 @@ void m68008_device::movea_l_dpci_ad_df8() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54228,7 +54228,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54296,13 +54296,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54413,13 +54413,13 @@ void m68008_device::movea_l_imm32_ad_df8() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -54497,7 +54497,7 @@ void m68008_device::move_l_ds_aid_df8() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54532,7 +54532,7 @@ void m68008_device::move_l_ds_aid_df8() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54611,7 +54611,7 @@ void m68008_device::move_l_as_aid_df8() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54646,7 +54646,7 @@ void m68008_device::move_l_as_aid_df8() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54691,7 +54691,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -54758,7 +54758,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54792,7 +54792,7 @@ void m68008_device::move_l_ais_aid_df8() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54870,7 +54870,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -54940,7 +54940,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54974,7 +54974,7 @@ void m68008_device::move_l_aips_aid_df8() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55051,7 +55051,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -55123,7 +55123,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55157,7 +55157,7 @@ void m68008_device::move_l_pais_aid_df8() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55266,7 +55266,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -55333,7 +55333,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55367,7 +55367,7 @@ void m68008_device::move_l_das_aid_df8() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55443,7 +55443,7 @@ void m68008_device::move_l_dais_aid_df8() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55524,7 +55524,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -55591,7 +55591,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55625,7 +55625,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55736,7 +55736,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -55803,7 +55803,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55837,7 +55837,7 @@ void m68008_device::move_l_adr16_aid_df8() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55979,7 +55979,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -56046,7 +56046,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56080,7 +56080,7 @@ void m68008_device::move_l_adr32_aid_df8() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56188,7 +56188,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -56255,7 +56255,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56289,7 +56289,7 @@ void m68008_device::move_l_dpc_aid_df8() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56364,7 +56364,7 @@ void m68008_device::move_l_dpci_aid_df8() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -56445,7 +56445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -56512,7 +56512,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56546,7 +56546,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56722,7 +56722,7 @@ void m68008_device::move_l_imm32_aid_df8() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56757,7 +56757,7 @@ void m68008_device::move_l_imm32_aid_df8() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56836,7 +56836,7 @@ void m68008_device::move_l_ds_aipd_df8() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56871,7 +56871,7 @@ void m68008_device::move_l_ds_aipd_df8() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56950,7 +56950,7 @@ void m68008_device::move_l_as_aipd_df8() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56985,7 +56985,7 @@ void m68008_device::move_l_as_aipd_df8() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57030,7 +57030,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -57097,7 +57097,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57131,7 +57131,7 @@ void m68008_device::move_l_ais_aipd_df8() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57208,7 +57208,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -57278,7 +57278,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57312,7 +57312,7 @@ void m68008_device::move_l_aips_aipd_df8() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57388,7 +57388,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57460,7 +57460,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57494,7 +57494,7 @@ void m68008_device::move_l_pais_aipd_df8() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57602,7 +57602,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -57669,7 +57669,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57703,7 +57703,7 @@ void m68008_device::move_l_das_aipd_df8() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57778,7 +57778,7 @@ void m68008_device::move_l_dais_aipd_df8() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57859,7 +57859,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -57926,7 +57926,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57960,7 +57960,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58070,7 +58070,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -58137,7 +58137,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58171,7 +58171,7 @@ void m68008_device::move_l_adr16_aipd_df8() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58312,7 +58312,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -58379,7 +58379,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58413,7 +58413,7 @@ void m68008_device::move_l_adr32_aipd_df8() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58520,7 +58520,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -58587,7 +58587,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58621,7 +58621,7 @@ void m68008_device::move_l_dpc_aipd_df8() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58695,7 +58695,7 @@ void m68008_device::move_l_dpci_aipd_df8() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58776,7 +58776,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -58843,7 +58843,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58877,7 +58877,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59052,7 +59052,7 @@ void m68008_device::move_l_imm32_aipd_df8() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59087,7 +59087,7 @@ void m68008_device::move_l_imm32_aipd_df8() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59134,7 +59134,7 @@ void m68008_device::move_l_ds_paid_df8() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59169,7 +59169,7 @@ void m68008_device::move_l_ds_paid_df8() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59247,7 +59247,7 @@ void m68008_device::move_l_as_paid_df8() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59282,7 +59282,7 @@ void m68008_device::move_l_as_paid_df8() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59358,7 +59358,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -59425,7 +59425,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59460,7 +59460,7 @@ void m68008_device::move_l_ais_paid_df8() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59536,7 +59536,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -59606,7 +59606,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59641,7 +59641,7 @@ void m68008_device::move_l_aips_paid_df8() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59716,7 +59716,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59788,7 +59788,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59823,7 +59823,7 @@ void m68008_device::move_l_pais_paid_df8() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59930,7 +59930,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -59997,7 +59997,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60032,7 +60032,7 @@ void m68008_device::move_l_das_paid_df8() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60106,7 +60106,7 @@ void m68008_device::move_l_dais_paid_df8() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60187,7 +60187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -60254,7 +60254,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60289,7 +60289,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60398,7 +60398,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -60465,7 +60465,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60500,7 +60500,7 @@ void m68008_device::move_l_adr16_paid_df8() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60640,7 +60640,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -60707,7 +60707,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60742,7 +60742,7 @@ void m68008_device::move_l_adr32_paid_df8() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60848,7 +60848,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -60915,7 +60915,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60950,7 +60950,7 @@ void m68008_device::move_l_dpc_paid_df8() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61023,7 +61023,7 @@ void m68008_device::move_l_dpci_paid_df8() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -61104,7 +61104,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -61171,7 +61171,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61206,7 +61206,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61348,7 +61348,7 @@ void m68008_device::move_l_imm32_paid_df8() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61383,7 +61383,7 @@ void m68008_device::move_l_imm32_paid_df8() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61492,7 +61492,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61526,7 +61526,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61561,7 +61561,7 @@ void m68008_device::move_l_ds_dad_df8() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61639,7 +61639,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61673,7 +61673,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61708,7 +61708,7 @@ void m68008_device::move_l_as_dad_df8() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61753,7 +61753,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -61819,7 +61819,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61854,7 +61854,7 @@ void m68008_device::move_l_ais_dad_df8() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61968,7 +61968,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -62037,7 +62037,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62072,7 +62072,7 @@ void m68008_device::move_l_aips_dad_df8() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62185,7 +62185,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62256,7 +62256,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62291,7 +62291,7 @@ void m68008_device::move_l_pais_dad_df8() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62436,7 +62436,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -62502,7 +62502,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62537,7 +62537,7 @@ void m68008_device::move_l_das_dad_df8() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62649,7 +62649,7 @@ void m68008_device::move_l_dais_dad_df8() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62730,7 +62730,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -62796,7 +62796,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62831,7 +62831,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62978,7 +62978,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -63044,7 +63044,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63079,7 +63079,7 @@ void m68008_device::move_l_adr16_dad_df8() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63257,7 +63257,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -63323,7 +63323,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63358,7 +63358,7 @@ void m68008_device::move_l_adr32_dad_df8() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63502,7 +63502,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -63568,7 +63568,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63603,7 +63603,7 @@ void m68008_device::move_l_dpc_dad_df8() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63714,7 +63714,7 @@ void m68008_device::move_l_dpci_dad_df8() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63795,7 +63795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -63861,7 +63861,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63896,7 +63896,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64107,7 +64107,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64141,7 +64141,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64176,7 +64176,7 @@ void m68008_device::move_l_imm32_dad_df8() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64219,7 +64219,7 @@ void m68008_device::move_l_ds_daid_df8() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -64303,7 +64303,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64337,7 +64337,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64372,7 +64372,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64415,7 +64415,7 @@ void m68008_device::move_l_as_daid_df8() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -64499,7 +64499,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64533,7 +64533,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64568,7 +64568,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64613,7 +64613,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -64676,7 +64676,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -64691,7 +64691,7 @@ void m68008_device::move_l_ais_daid_df8() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64725,7 +64725,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64762,7 +64762,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64876,7 +64876,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -64942,7 +64942,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -64957,7 +64957,7 @@ void m68008_device::move_l_aips_daid_df8() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64991,7 +64991,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65028,7 +65028,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65141,7 +65141,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -65209,7 +65209,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65224,7 +65224,7 @@ void m68008_device::move_l_pais_daid_df8() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65258,7 +65258,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65295,7 +65295,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65440,7 +65440,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -65503,7 +65503,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65518,7 +65518,7 @@ void m68008_device::move_l_das_daid_df8() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65552,7 +65552,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65589,7 +65589,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65701,7 +65701,7 @@ void m68008_device::move_l_dais_daid_df8() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -65782,7 +65782,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -65845,7 +65845,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65860,7 +65860,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65894,7 +65894,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65931,7 +65931,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66078,7 +66078,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -66141,7 +66141,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66156,7 +66156,7 @@ void m68008_device::move_l_adr16_daid_df8() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66190,7 +66190,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66227,7 +66227,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66405,7 +66405,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -66468,7 +66468,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66483,7 +66483,7 @@ void m68008_device::move_l_adr32_daid_df8() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66517,7 +66517,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66554,7 +66554,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66698,7 +66698,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -66761,7 +66761,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66776,7 +66776,7 @@ void m68008_device::move_l_dpc_daid_df8() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66810,7 +66810,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66847,7 +66847,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66958,7 +66958,7 @@ void m68008_device::move_l_dpci_daid_df8() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -67039,7 +67039,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -67102,7 +67102,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -67117,7 +67117,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67151,7 +67151,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67188,7 +67188,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67364,7 +67364,7 @@ void m68008_device::move_l_imm32_daid_df8() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -67448,7 +67448,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67482,7 +67482,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67517,7 +67517,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67563,7 +67563,7 @@ void m68008_device::move_l_ds_adr16_df8() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67598,7 +67598,7 @@ void m68008_device::move_l_ds_adr16_df8() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67713,7 +67713,7 @@ void m68008_device::move_l_as_adr16_df8() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67748,7 +67748,7 @@ void m68008_device::move_l_as_adr16_df8() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67861,7 +67861,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -67927,7 +67927,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67962,7 +67962,7 @@ void m68008_device::move_l_ais_adr16_df8() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68075,7 +68075,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -68144,7 +68144,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68179,7 +68179,7 @@ void m68008_device::move_l_aips_adr16_df8() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68291,7 +68291,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -68362,7 +68362,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68397,7 +68397,7 @@ void m68008_device::move_l_pais_adr16_df8() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68541,7 +68541,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -68607,7 +68607,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68642,7 +68642,7 @@ void m68008_device::move_l_das_adr16_df8() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68753,7 +68753,7 @@ void m68008_device::move_l_dais_adr16_df8() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -68834,7 +68834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -68900,7 +68900,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68935,7 +68935,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69081,7 +69081,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -69147,7 +69147,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69182,7 +69182,7 @@ void m68008_device::move_l_adr16_adr16_df8() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69359,7 +69359,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -69425,7 +69425,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69460,7 +69460,7 @@ void m68008_device::move_l_adr32_adr16_df8() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69603,7 +69603,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -69669,7 +69669,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69704,7 +69704,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69814,7 +69814,7 @@ void m68008_device::move_l_dpc_adr16_df8() // 21fa ffff
void m68008_device::move_l_dpci_adr16_df8() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -69895,7 +69895,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -69961,7 +69961,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69996,7 +69996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70175,7 +70175,7 @@ void m68008_device::move_l_imm32_adr16_df8() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70210,7 +70210,7 @@ void m68008_device::move_l_imm32_adr16_df8() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70356,7 +70356,7 @@ void m68008_device::move_l_ds_adr32_df8() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70391,7 +70391,7 @@ void m68008_device::move_l_ds_adr32_df8() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70537,7 +70537,7 @@ void m68008_device::move_l_as_adr32_df8() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70572,7 +70572,7 @@ void m68008_device::move_l_as_adr32_df8() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70685,7 +70685,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -70752,7 +70752,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -70785,7 +70785,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70819,7 +70819,7 @@ void m68008_device::move_l_ais_adr32_df8() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70931,7 +70931,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -71001,7 +71001,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -71034,7 +71034,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71068,7 +71068,7 @@ void m68008_device::move_l_aips_adr32_df8() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71179,7 +71179,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -71251,7 +71251,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -71284,7 +71284,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71318,7 +71318,7 @@ void m68008_device::move_l_pais_adr32_df8() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71461,7 +71461,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -71528,7 +71528,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -71561,7 +71561,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71595,7 +71595,7 @@ void m68008_device::move_l_das_adr32_df8() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71705,7 +71705,7 @@ void m68008_device::move_l_dais_adr32_df8() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -71786,7 +71786,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -71853,7 +71853,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -71886,7 +71886,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71920,7 +71920,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72065,7 +72065,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -72132,7 +72132,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -72165,7 +72165,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72199,7 +72199,7 @@ void m68008_device::move_l_adr16_adr32_df8() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72375,7 +72375,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -72442,7 +72442,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -72475,7 +72475,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72509,7 +72509,7 @@ void m68008_device::move_l_adr32_adr32_df8() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72651,7 +72651,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -72718,7 +72718,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -72751,7 +72751,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72785,7 +72785,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72894,7 +72894,7 @@ void m68008_device::move_l_dpc_adr32_df8() // 23fa ffff
void m68008_device::move_l_dpci_adr32_df8() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -72975,7 +72975,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -73042,7 +73042,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -73075,7 +73075,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -73109,7 +73109,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73318,7 +73318,7 @@ void m68008_device::move_l_imm32_adr32_df8() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73353,7 +73353,7 @@ void m68008_device::move_l_imm32_adr32_df8() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73470,7 +73470,7 @@ void m68008_device::move_w_ds_dd_df8() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -73523,7 +73523,7 @@ void m68008_device::move_w_as_dd_df8() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -73573,7 +73573,7 @@ void m68008_device::move_w_ais_dd_df8() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73610,7 +73610,7 @@ void m68008_device::move_w_ais_dd_df8() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73664,7 +73664,7 @@ void m68008_device::move_w_aips_dd_df8() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -73699,7 +73699,7 @@ void m68008_device::move_w_aips_dd_df8() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73755,7 +73755,7 @@ void m68008_device::move_w_pais_dd_df8() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -73790,7 +73790,7 @@ void m68008_device::move_w_pais_dd_df8() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73870,7 +73870,7 @@ void m68008_device::move_w_das_dd_df8() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73907,7 +73907,7 @@ void m68008_device::move_w_das_dd_df8() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73953,7 +73953,7 @@ void m68008_device::move_w_dais_dd_df8() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74035,7 +74035,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74072,7 +74072,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74153,7 +74153,7 @@ void m68008_device::move_w_adr16_dd_df8() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -74188,7 +74188,7 @@ void m68008_device::move_w_adr16_dd_df8() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74300,7 +74300,7 @@ void m68008_device::move_w_adr32_dd_df8() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -74335,7 +74335,7 @@ void m68008_device::move_w_adr32_dd_df8() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74414,7 +74414,7 @@ void m68008_device::move_w_dpc_dd_df8() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74451,7 +74451,7 @@ void m68008_device::move_w_dpc_dd_df8() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74496,7 +74496,7 @@ void m68008_device::move_w_dpci_dd_df8() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74578,7 +74578,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74615,7 +74615,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74699,7 +74699,7 @@ void m68008_device::move_w_imm16_dd_df8() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -74756,7 +74756,7 @@ void m68008_device::movea_w_ds_ad_df8() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -74806,7 +74806,7 @@ void m68008_device::movea_w_as_ad_df8() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74851,7 +74851,7 @@ void m68008_device::movea_w_ais_ad_df8() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74939,7 +74939,7 @@ void m68008_device::movea_w_aips_ad_df8() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -75027,7 +75027,7 @@ void m68008_device::movea_w_pais_ad_df8() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -75139,7 +75139,7 @@ void m68008_device::movea_w_das_ad_df8() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75219,7 +75219,7 @@ void m68008_device::movea_w_dais_ad_df8() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75301,7 +75301,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75416,7 +75416,7 @@ void m68008_device::movea_w_adr16_ad_df8() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -75560,7 +75560,7 @@ void m68008_device::movea_w_adr32_ad_df8() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -75671,7 +75671,7 @@ void m68008_device::movea_w_dpc_ad_df8() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75750,7 +75750,7 @@ void m68008_device::movea_w_dpci_ad_df8() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75832,7 +75832,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75954,7 +75954,7 @@ void m68008_device::movea_w_imm16_ad_df8() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -76001,7 +76001,7 @@ void m68008_device::move_w_ds_aid_df8() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76082,7 +76082,7 @@ void m68008_device::move_w_as_aid_df8() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76160,7 +76160,7 @@ void m68008_device::move_w_ais_aid_df8() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76196,7 +76196,7 @@ void m68008_device::move_w_ais_aid_df8() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76280,7 +76280,7 @@ void m68008_device::move_w_aips_aid_df8() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -76314,7 +76314,7 @@ void m68008_device::move_w_aips_aid_df8() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76400,7 +76400,7 @@ void m68008_device::move_w_pais_aid_df8() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -76434,7 +76434,7 @@ void m68008_device::move_w_pais_aid_df8() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76544,7 +76544,7 @@ void m68008_device::move_w_das_aid_df8() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76580,7 +76580,7 @@ void m68008_device::move_w_das_aid_df8() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76656,7 +76656,7 @@ void m68008_device::move_w_dais_aid_df8() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76738,7 +76738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76774,7 +76774,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76885,7 +76885,7 @@ void m68008_device::move_w_adr16_aid_df8() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -76919,7 +76919,7 @@ void m68008_device::move_w_adr16_aid_df8() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77061,7 +77061,7 @@ void m68008_device::move_w_adr32_aid_df8() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -77095,7 +77095,7 @@ void m68008_device::move_w_adr32_aid_df8() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77204,7 +77204,7 @@ void m68008_device::move_w_dpc_aid_df8() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77240,7 +77240,7 @@ void m68008_device::move_w_dpc_aid_df8() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77315,7 +77315,7 @@ void m68008_device::move_w_dpci_aid_df8() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77397,7 +77397,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77433,7 +77433,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77547,7 +77547,7 @@ void m68008_device::move_w_imm16_aid_df8() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77628,7 +77628,7 @@ void m68008_device::move_w_ds_aipd_df8() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77708,7 +77708,7 @@ void m68008_device::move_w_as_aipd_df8() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77785,7 +77785,7 @@ void m68008_device::move_w_ais_aipd_df8() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77822,7 +77822,7 @@ void m68008_device::move_w_ais_aipd_df8() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77905,7 +77905,7 @@ void m68008_device::move_w_aips_aipd_df8() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -77940,7 +77940,7 @@ void m68008_device::move_w_aips_aipd_df8() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78025,7 +78025,7 @@ void m68008_device::move_w_pais_aipd_df8() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -78060,7 +78060,7 @@ void m68008_device::move_w_pais_aipd_df8() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78169,7 +78169,7 @@ void m68008_device::move_w_das_aipd_df8() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78206,7 +78206,7 @@ void m68008_device::move_w_das_aipd_df8() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78281,7 +78281,7 @@ void m68008_device::move_w_dais_aipd_df8() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78363,7 +78363,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78400,7 +78400,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78510,7 +78510,7 @@ void m68008_device::move_w_adr16_aipd_df8() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -78545,7 +78545,7 @@ void m68008_device::move_w_adr16_aipd_df8() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78686,7 +78686,7 @@ void m68008_device::move_w_adr32_aipd_df8() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -78721,7 +78721,7 @@ void m68008_device::move_w_adr32_aipd_df8() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78829,7 +78829,7 @@ void m68008_device::move_w_dpc_aipd_df8() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78866,7 +78866,7 @@ void m68008_device::move_w_dpc_aipd_df8() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78940,7 +78940,7 @@ void m68008_device::move_w_dpci_aipd_df8() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79022,7 +79022,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79059,7 +79059,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -79172,7 +79172,7 @@ void m68008_device::move_w_imm16_aipd_df8() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -79251,7 +79251,7 @@ void m68008_device::move_w_ds_paid_df8() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79331,7 +79331,7 @@ void m68008_device::move_w_as_paid_df8() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79409,7 +79409,7 @@ void m68008_device::move_w_ais_paid_df8() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79445,7 +79445,7 @@ void m68008_device::move_w_ais_paid_df8() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79529,7 +79529,7 @@ void m68008_device::move_w_aips_paid_df8() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -79563,7 +79563,7 @@ void m68008_device::move_w_aips_paid_df8() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79649,7 +79649,7 @@ void m68008_device::move_w_pais_paid_df8() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -79683,7 +79683,7 @@ void m68008_device::move_w_pais_paid_df8() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79793,7 +79793,7 @@ void m68008_device::move_w_das_paid_df8() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79829,7 +79829,7 @@ void m68008_device::move_w_das_paid_df8() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79905,7 +79905,7 @@ void m68008_device::move_w_dais_paid_df8() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79987,7 +79987,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80023,7 +80023,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80134,7 +80134,7 @@ void m68008_device::move_w_adr16_paid_df8() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -80168,7 +80168,7 @@ void m68008_device::move_w_adr16_paid_df8() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80310,7 +80310,7 @@ void m68008_device::move_w_adr32_paid_df8() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -80344,7 +80344,7 @@ void m68008_device::move_w_adr32_paid_df8() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80453,7 +80453,7 @@ void m68008_device::move_w_dpc_paid_df8() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80489,7 +80489,7 @@ void m68008_device::move_w_dpc_paid_df8() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80564,7 +80564,7 @@ void m68008_device::move_w_dpci_paid_df8() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80646,7 +80646,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80682,7 +80682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80795,7 +80795,7 @@ void m68008_device::move_w_imm16_paid_df8() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80906,7 +80906,7 @@ void m68008_device::move_w_ds_dad_df8() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81018,7 +81018,7 @@ void m68008_device::move_w_as_dad_df8() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81097,7 +81097,7 @@ void m68008_device::move_w_ais_dad_df8() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81132,7 +81132,7 @@ void m68008_device::move_w_ais_dad_df8() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81253,7 +81253,7 @@ void m68008_device::move_w_aips_dad_df8() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -81286,7 +81286,7 @@ void m68008_device::move_w_aips_dad_df8() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81409,7 +81409,7 @@ void m68008_device::move_w_pais_dad_df8() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -81442,7 +81442,7 @@ void m68008_device::move_w_pais_dad_df8() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81589,7 +81589,7 @@ void m68008_device::move_w_das_dad_df8() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81624,7 +81624,7 @@ void m68008_device::move_w_das_dad_df8() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81737,7 +81737,7 @@ void m68008_device::move_w_dais_dad_df8() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81819,7 +81819,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81854,7 +81854,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82002,7 +82002,7 @@ void m68008_device::move_w_adr16_dad_df8() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -82035,7 +82035,7 @@ void m68008_device::move_w_adr16_dad_df8() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82214,7 +82214,7 @@ void m68008_device::move_w_adr32_dad_df8() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -82247,7 +82247,7 @@ void m68008_device::move_w_adr32_dad_df8() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82393,7 +82393,7 @@ void m68008_device::move_w_dpc_dad_df8() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -82428,7 +82428,7 @@ void m68008_device::move_w_dpc_dad_df8() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82540,7 +82540,7 @@ void m68008_device::move_w_dpci_dad_df8() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82622,7 +82622,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -82657,7 +82657,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82838,7 +82838,7 @@ void m68008_device::move_w_imm16_dad_df8() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82915,7 +82915,7 @@ void m68008_device::move_w_ds_daid_df8() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -82999,7 +82999,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83076,7 +83076,7 @@ void m68008_device::move_w_as_daid_df8() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -83160,7 +83160,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -83271,7 +83271,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83286,7 +83286,7 @@ void m68008_device::move_w_ais_daid_df8() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83320,7 +83320,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83443,7 +83443,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -83473,7 +83473,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83488,7 +83488,7 @@ void m68008_device::move_w_aips_daid_df8() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83522,7 +83522,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83647,7 +83647,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -83677,7 +83677,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83692,7 +83692,7 @@ void m68008_device::move_w_pais_daid_df8() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83726,7 +83726,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83875,7 +83875,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -83907,7 +83907,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83922,7 +83922,7 @@ void m68008_device::move_w_das_daid_df8() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83956,7 +83956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84071,7 +84071,7 @@ void m68008_device::move_w_dais_daid_df8() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84153,7 +84153,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -84185,7 +84185,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84200,7 +84200,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84234,7 +84234,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84384,7 +84384,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -84414,7 +84414,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84429,7 +84429,7 @@ void m68008_device::move_w_adr16_daid_df8() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84463,7 +84463,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84644,7 +84644,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -84674,7 +84674,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84689,7 +84689,7 @@ void m68008_device::move_w_adr32_daid_df8() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84723,7 +84723,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84871,7 +84871,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -84903,7 +84903,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84918,7 +84918,7 @@ void m68008_device::move_w_dpc_daid_df8() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84952,7 +84952,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85066,7 +85066,7 @@ void m68008_device::move_w_dpci_daid_df8() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85148,7 +85148,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -85180,7 +85180,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -85195,7 +85195,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85229,7 +85229,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85377,7 +85377,7 @@ void m68008_device::move_w_imm16_daid_df8() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -85461,7 +85461,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -85541,7 +85541,7 @@ void m68008_device::move_w_ds_adr16_df8() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85657,7 +85657,7 @@ void m68008_device::move_w_as_adr16_df8() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85771,7 +85771,7 @@ void m68008_device::move_w_ais_adr16_df8() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -85806,7 +85806,7 @@ void m68008_device::move_w_ais_adr16_df8() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85926,7 +85926,7 @@ void m68008_device::move_w_aips_adr16_df8() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -85959,7 +85959,7 @@ void m68008_device::move_w_aips_adr16_df8() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86081,7 +86081,7 @@ void m68008_device::move_w_pais_adr16_df8() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -86114,7 +86114,7 @@ void m68008_device::move_w_pais_adr16_df8() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86260,7 +86260,7 @@ void m68008_device::move_w_das_adr16_df8() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86295,7 +86295,7 @@ void m68008_device::move_w_das_adr16_df8() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86407,7 +86407,7 @@ void m68008_device::move_w_dais_adr16_df8() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86489,7 +86489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86524,7 +86524,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86671,7 +86671,7 @@ void m68008_device::move_w_adr16_adr16_df8() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -86704,7 +86704,7 @@ void m68008_device::move_w_adr16_adr16_df8() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86882,7 +86882,7 @@ void m68008_device::move_w_adr32_adr16_df8() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -86915,7 +86915,7 @@ void m68008_device::move_w_adr32_adr16_df8() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87060,7 +87060,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87095,7 +87095,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87206,7 +87206,7 @@ void m68008_device::move_w_dpc_adr16_df8() // 31fa ffff
void m68008_device::move_w_dpci_adr16_df8() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -87288,7 +87288,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87323,7 +87323,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87472,7 +87472,7 @@ void m68008_device::move_w_imm16_adr16_df8() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87619,7 +87619,7 @@ void m68008_device::move_w_ds_adr32_df8() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87766,7 +87766,7 @@ void m68008_device::move_w_as_adr32_df8() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87880,7 +87880,7 @@ void m68008_device::move_w_ais_adr32_df8() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87915,7 +87915,7 @@ void m68008_device::move_w_ais_adr32_df8() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88065,7 +88065,7 @@ void m68008_device::move_w_aips_adr32_df8() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -88098,7 +88098,7 @@ void m68008_device::move_w_aips_adr32_df8() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88250,7 +88250,7 @@ void m68008_device::move_w_pais_adr32_df8() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -88283,7 +88283,7 @@ void m68008_device::move_w_pais_adr32_df8() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88459,7 +88459,7 @@ void m68008_device::move_w_das_adr32_df8() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88494,7 +88494,7 @@ void m68008_device::move_w_das_adr32_df8() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88636,7 +88636,7 @@ void m68008_device::move_w_dais_adr32_df8() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88718,7 +88718,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88753,7 +88753,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88930,7 +88930,7 @@ void m68008_device::move_w_adr16_adr32_df8() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -88963,7 +88963,7 @@ void m68008_device::move_w_adr16_adr32_df8() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89171,7 +89171,7 @@ void m68008_device::move_w_adr32_adr32_df8() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -89204,7 +89204,7 @@ void m68008_device::move_w_adr32_adr32_df8() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89379,7 +89379,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89414,7 +89414,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89555,7 +89555,7 @@ void m68008_device::move_w_dpc_adr32_df8() // 33fa ffff
void m68008_device::move_w_dpci_adr32_df8() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89637,7 +89637,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89672,7 +89672,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89882,7 +89882,7 @@ void m68008_device::move_w_imm16_adr32_df8() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89998,7 +89998,7 @@ void m68008_device::negx_b_ds_df8() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -90047,7 +90047,7 @@ void m68008_device::negx_b_ais_df8() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90068,7 +90068,7 @@ void m68008_device::negx_b_ais_df8() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90135,7 +90135,7 @@ void m68008_device::negx_b_aips_df8() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -90154,7 +90154,7 @@ void m68008_device::negx_b_aips_df8() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90223,7 +90223,7 @@ void m68008_device::negx_b_pais_df8() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -90242,7 +90242,7 @@ void m68008_device::negx_b_pais_df8() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90335,7 +90335,7 @@ void m68008_device::negx_b_das_df8() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90356,7 +90356,7 @@ void m68008_device::negx_b_das_df8() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90415,7 +90415,7 @@ void m68008_device::negx_b_dais_df8() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -90497,7 +90497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90518,7 +90518,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90612,7 +90612,7 @@ void m68008_device::negx_b_adr16_df8() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -90631,7 +90631,7 @@ void m68008_device::negx_b_adr16_df8() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90756,7 +90756,7 @@ void m68008_device::negx_b_adr32_df8() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -90775,7 +90775,7 @@ void m68008_device::negx_b_adr32_df8() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90838,7 +90838,7 @@ void m68008_device::negx_w_ds_df8() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -90887,7 +90887,7 @@ void m68008_device::negx_w_ais_df8() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90923,7 +90923,7 @@ void m68008_device::negx_w_ais_df8() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91005,7 +91005,7 @@ void m68008_device::negx_w_aips_df8() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -91039,7 +91039,7 @@ void m68008_device::negx_w_aips_df8() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91123,7 +91123,7 @@ void m68008_device::negx_w_pais_df8() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -91157,7 +91157,7 @@ void m68008_device::negx_w_pais_df8() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91265,7 +91265,7 @@ void m68008_device::negx_w_das_df8() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91301,7 +91301,7 @@ void m68008_device::negx_w_das_df8() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91375,7 +91375,7 @@ void m68008_device::negx_w_dais_df8() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91457,7 +91457,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91493,7 +91493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91602,7 +91602,7 @@ void m68008_device::negx_w_adr16_df8() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -91636,7 +91636,7 @@ void m68008_device::negx_w_adr16_df8() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91776,7 +91776,7 @@ void m68008_device::negx_w_adr32_df8() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -91810,7 +91810,7 @@ void m68008_device::negx_w_adr32_df8() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91888,12 +91888,12 @@ void m68008_device::negx_l_ds_df8() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91943,7 +91943,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -92010,7 +92010,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92045,7 +92045,7 @@ void m68008_device::negx_l_ais_df8() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92119,7 +92119,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -92189,7 +92189,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92224,7 +92224,7 @@ void m68008_device::negx_l_aips_df8() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92297,7 +92297,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -92369,7 +92369,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92404,7 +92404,7 @@ void m68008_device::negx_l_pais_df8() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92509,7 +92509,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -92576,7 +92576,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92611,7 +92611,7 @@ void m68008_device::negx_l_das_df8() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92683,7 +92683,7 @@ void m68008_device::negx_l_dais_df8() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -92764,7 +92764,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -92831,7 +92831,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92866,7 +92866,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92973,7 +92973,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -93040,7 +93040,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93075,7 +93075,7 @@ void m68008_device::negx_l_adr16_df8() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -93213,7 +93213,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -93280,7 +93280,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93315,7 +93315,7 @@ void m68008_device::negx_l_adr32_df8() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -93439,7 +93439,7 @@ void m68008_device::move_sr_ais_df8() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93477,7 +93477,7 @@ void m68008_device::move_sr_ais_df8() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -93558,7 +93558,7 @@ void m68008_device::move_sr_aips_df8() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -93594,7 +93594,7 @@ void m68008_device::move_sr_aips_df8() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -93677,7 +93677,7 @@ void m68008_device::move_sr_pais_df8() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -93713,7 +93713,7 @@ void m68008_device::move_sr_pais_df8() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -93820,7 +93820,7 @@ void m68008_device::move_sr_das_df8() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93858,7 +93858,7 @@ void m68008_device::move_sr_das_df8() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -93931,7 +93931,7 @@ void m68008_device::move_sr_dais_df8() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94013,7 +94013,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94051,7 +94051,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -94159,7 +94159,7 @@ void m68008_device::move_sr_adr16_df8() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -94195,7 +94195,7 @@ void m68008_device::move_sr_adr16_df8() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -94334,7 +94334,7 @@ void m68008_device::move_sr_adr32_df8() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -94370,7 +94370,7 @@ void m68008_device::move_sr_adr32_df8() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -94446,7 +94446,7 @@ void m68008_device::chk_w_ds_dd_df8() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -94454,7 +94454,7 @@ void m68008_device::chk_w_ds_dd_df8() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -94472,14 +94472,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -94514,7 +94514,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -94547,7 +94547,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -94736,7 +94736,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -94770,7 +94770,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -94778,7 +94778,7 @@ void m68008_device::chk_w_ais_dd_df8() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -94796,14 +94796,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -94838,7 +94838,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -94871,7 +94871,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95066,7 +95066,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -95098,7 +95098,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95106,7 +95106,7 @@ void m68008_device::chk_w_aips_dd_df8() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95124,14 +95124,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95166,7 +95166,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95199,7 +95199,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95396,7 +95396,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -95428,7 +95428,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95436,7 +95436,7 @@ void m68008_device::chk_w_pais_dd_df8() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95454,14 +95454,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95496,7 +95496,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95529,7 +95529,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95750,7 +95750,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -95784,7 +95784,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95792,7 +95792,7 @@ void m68008_device::chk_w_das_dd_df8() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95810,14 +95810,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95852,7 +95852,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -95885,7 +95885,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96072,7 +96072,7 @@ void m68008_device::chk_w_dais_dd_df8() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96154,7 +96154,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -96188,7 +96188,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96196,7 +96196,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96214,14 +96214,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96256,7 +96256,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96289,7 +96289,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96511,7 +96511,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -96543,7 +96543,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96551,7 +96551,7 @@ void m68008_device::chk_w_adr16_dd_df8() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96569,14 +96569,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96611,7 +96611,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96644,7 +96644,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96897,7 +96897,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -96929,7 +96929,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96937,7 +96937,7 @@ void m68008_device::chk_w_adr32_dd_df8() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96955,14 +96955,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -96997,7 +96997,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97030,7 +97030,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97250,7 +97250,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -97284,7 +97284,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -97292,7 +97292,7 @@ void m68008_device::chk_w_dpc_dd_df8() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -97310,14 +97310,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97352,7 +97352,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97385,7 +97385,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97571,7 +97571,7 @@ void m68008_device::chk_w_dpci_dd_df8() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97653,7 +97653,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -97687,7 +97687,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -97695,7 +97695,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -97713,14 +97713,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97755,7 +97755,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -97788,7 +97788,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -98010,7 +98010,7 @@ void m68008_device::chk_w_imm16_dd_df8() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -98018,7 +98018,7 @@ void m68008_device::chk_w_imm16_dd_df8() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -98036,14 +98036,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -98078,7 +98078,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -98111,7 +98111,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -98429,7 +98429,7 @@ void m68008_device::lea_dais_ad_df8() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -98824,7 +98824,7 @@ void m68008_device::lea_dpci_ad_df8() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -98957,7 +98957,7 @@ void m68008_device::clr_b_ds_df8() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -98965,7 +98965,7 @@ void m68008_device::clr_b_ds_df8() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99007,11 +99007,11 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -99029,7 +99029,7 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99066,7 +99066,7 @@ void m68008_device::clr_b_ais_df8() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99094,12 +99094,12 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -99118,7 +99118,7 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99155,7 +99155,7 @@ void m68008_device::clr_b_aips_df8() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99182,7 +99182,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99190,7 +99190,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -99209,7 +99209,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99246,7 +99246,7 @@ void m68008_device::clr_b_pais_df8() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99271,7 +99271,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99304,11 +99304,11 @@ void m68008_device::clr_b_das_df8() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -99326,7 +99326,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99363,7 +99363,7 @@ void m68008_device::clr_b_das_df8() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99386,14 +99386,14 @@ void m68008_device::clr_b_dais_df8() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99401,7 +99401,7 @@ void m68008_device::clr_b_dais_df8() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99435,7 +99435,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99471,11 +99471,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -99493,7 +99493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99530,7 +99530,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99557,7 +99557,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -99590,7 +99590,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -99609,7 +99609,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99646,7 +99646,7 @@ void m68008_device::clr_b_adr16_df8() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99671,7 +99671,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99705,7 +99705,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -99738,7 +99738,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -99757,7 +99757,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99794,7 +99794,7 @@ void m68008_device::clr_b_adr32_df8() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -99821,7 +99821,7 @@ void m68008_device::clr_w_ds_df8() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -99829,7 +99829,7 @@ void m68008_device::clr_w_ds_df8() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99871,11 +99871,11 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99908,7 +99908,7 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99945,7 +99945,7 @@ void m68008_device::clr_w_ais_df8() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -99988,12 +99988,12 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -100027,7 +100027,7 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100064,7 +100064,7 @@ void m68008_device::clr_w_aips_df8() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100106,7 +100106,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -100114,7 +100114,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -100148,7 +100148,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100185,7 +100185,7 @@ void m68008_device::clr_w_pais_df8() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100225,7 +100225,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100258,11 +100258,11 @@ void m68008_device::clr_w_das_df8() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100295,7 +100295,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100332,7 +100332,7 @@ void m68008_device::clr_w_das_df8() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100370,14 +100370,14 @@ void m68008_device::clr_w_dais_df8() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -100385,7 +100385,7 @@ void m68008_device::clr_w_dais_df8() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100419,7 +100419,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100455,11 +100455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100492,7 +100492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100529,7 +100529,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100571,7 +100571,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -100604,7 +100604,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -100638,7 +100638,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100675,7 +100675,7 @@ void m68008_device::clr_w_adr16_df8() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100715,7 +100715,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100749,7 +100749,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -100782,7 +100782,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -100816,7 +100816,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100853,7 +100853,7 @@ void m68008_device::clr_w_adr32_df8() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100895,12 +100895,12 @@ void m68008_device::clr_l_ds_df8() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100936,7 +100936,7 @@ void m68008_device::clr_l_ds_df8() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -100951,7 +100951,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -100986,7 +100986,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101019,7 +101019,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101054,7 +101054,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101089,7 +101089,7 @@ void m68008_device::clr_l_ais_df8() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101129,7 +101129,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -101164,11 +101164,11 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101201,7 +101201,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101236,7 +101236,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101271,7 +101271,7 @@ void m68008_device::clr_l_aips_df8() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101310,14 +101310,14 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101351,7 +101351,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101384,7 +101384,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101419,7 +101419,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101454,7 +101454,7 @@ void m68008_device::clr_l_pais_df8() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101494,7 +101494,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101526,7 +101526,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -101561,7 +101561,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101594,7 +101594,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101629,7 +101629,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101664,7 +101664,7 @@ void m68008_device::clr_l_das_df8() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101702,14 +101702,14 @@ void m68008_device::clr_l_dais_df8() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -101717,7 +101717,7 @@ void m68008_device::clr_l_dais_df8() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101751,7 +101751,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101786,7 +101786,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -101821,7 +101821,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101854,7 +101854,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101889,7 +101889,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101924,7 +101924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101966,7 +101966,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -101999,7 +101999,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -102034,7 +102034,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102067,7 +102067,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102102,7 +102102,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -102137,7 +102137,7 @@ void m68008_device::clr_l_adr16_df8() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -102177,7 +102177,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102211,7 +102211,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -102244,7 +102244,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -102279,7 +102279,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102312,7 +102312,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102347,7 +102347,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -102382,7 +102382,7 @@ void m68008_device::clr_l_adr32_df8() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -102424,7 +102424,7 @@ void m68008_device::neg_b_ds_df8() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -102473,7 +102473,7 @@ void m68008_device::neg_b_ais_df8() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102494,7 +102494,7 @@ void m68008_device::neg_b_ais_df8() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102561,7 +102561,7 @@ void m68008_device::neg_b_aips_df8() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -102580,7 +102580,7 @@ void m68008_device::neg_b_aips_df8() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102649,7 +102649,7 @@ void m68008_device::neg_b_pais_df8() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -102668,7 +102668,7 @@ void m68008_device::neg_b_pais_df8() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102761,7 +102761,7 @@ void m68008_device::neg_b_das_df8() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102782,7 +102782,7 @@ void m68008_device::neg_b_das_df8() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102841,7 +102841,7 @@ void m68008_device::neg_b_dais_df8() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -102923,7 +102923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102944,7 +102944,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103038,7 +103038,7 @@ void m68008_device::neg_b_adr16_df8() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -103057,7 +103057,7 @@ void m68008_device::neg_b_adr16_df8() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103182,7 +103182,7 @@ void m68008_device::neg_b_adr32_df8() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -103201,7 +103201,7 @@ void m68008_device::neg_b_adr32_df8() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103264,7 +103264,7 @@ void m68008_device::neg_w_ds_df8() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -103313,7 +103313,7 @@ void m68008_device::neg_w_ais_df8() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103349,7 +103349,7 @@ void m68008_device::neg_w_ais_df8() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103431,7 +103431,7 @@ void m68008_device::neg_w_aips_df8() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -103465,7 +103465,7 @@ void m68008_device::neg_w_aips_df8() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103549,7 +103549,7 @@ void m68008_device::neg_w_pais_df8() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -103583,7 +103583,7 @@ void m68008_device::neg_w_pais_df8() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103691,7 +103691,7 @@ void m68008_device::neg_w_das_df8() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103727,7 +103727,7 @@ void m68008_device::neg_w_das_df8() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103801,7 +103801,7 @@ void m68008_device::neg_w_dais_df8() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -103883,7 +103883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103919,7 +103919,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104028,7 +104028,7 @@ void m68008_device::neg_w_adr16_df8() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -104062,7 +104062,7 @@ void m68008_device::neg_w_adr16_df8() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104202,7 +104202,7 @@ void m68008_device::neg_w_adr32_df8() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -104236,7 +104236,7 @@ void m68008_device::neg_w_adr32_df8() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104314,12 +104314,12 @@ void m68008_device::neg_l_ds_df8() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104369,7 +104369,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -104436,7 +104436,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104471,7 +104471,7 @@ void m68008_device::neg_l_ais_df8() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104545,7 +104545,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -104615,7 +104615,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104650,7 +104650,7 @@ void m68008_device::neg_l_aips_df8() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104723,7 +104723,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -104795,7 +104795,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104830,7 +104830,7 @@ void m68008_device::neg_l_pais_df8() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104935,7 +104935,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -105002,7 +105002,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105037,7 +105037,7 @@ void m68008_device::neg_l_das_df8() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105109,7 +105109,7 @@ void m68008_device::neg_l_dais_df8() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -105190,7 +105190,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -105257,7 +105257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105292,7 +105292,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105399,7 +105399,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -105466,7 +105466,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105501,7 +105501,7 @@ void m68008_device::neg_l_adr16_df8() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105639,7 +105639,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -105706,7 +105706,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105741,7 +105741,7 @@ void m68008_device::neg_l_adr32_df8() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105903,7 +105903,7 @@ void m68008_device::move_ais_ccr_df8() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106031,7 +106031,7 @@ void m68008_device::move_aips_ccr_df8() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -106159,7 +106159,7 @@ void m68008_device::move_pais_ccr_df8() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -106311,7 +106311,7 @@ void m68008_device::move_das_ccr_df8() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106431,7 +106431,7 @@ void m68008_device::move_dais_ccr_df8() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -106513,7 +106513,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106668,7 +106668,7 @@ void m68008_device::move_adr16_ccr_df8() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -106852,7 +106852,7 @@ void m68008_device::move_adr32_ccr_df8() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -107003,7 +107003,7 @@ void m68008_device::move_dpc_ccr_df8() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107122,7 +107122,7 @@ void m68008_device::move_dpc_ccr_df8() // 44fa ffff
void m68008_device::move_dpci_ccr_df8() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -107204,7 +107204,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107449,7 +107449,7 @@ void m68008_device::not_b_ds_df8() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -107498,7 +107498,7 @@ void m68008_device::not_b_ais_df8() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107519,7 +107519,7 @@ void m68008_device::not_b_ais_df8() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107586,7 +107586,7 @@ void m68008_device::not_b_aips_df8() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -107605,7 +107605,7 @@ void m68008_device::not_b_aips_df8() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107674,7 +107674,7 @@ void m68008_device::not_b_pais_df8() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -107693,7 +107693,7 @@ void m68008_device::not_b_pais_df8() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107786,7 +107786,7 @@ void m68008_device::not_b_das_df8() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107807,7 +107807,7 @@ void m68008_device::not_b_das_df8() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107866,7 +107866,7 @@ void m68008_device::not_b_dais_df8() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -107948,7 +107948,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107969,7 +107969,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108063,7 +108063,7 @@ void m68008_device::not_b_adr16_df8() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -108082,7 +108082,7 @@ void m68008_device::not_b_adr16_df8() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108207,7 +108207,7 @@ void m68008_device::not_b_adr32_df8() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -108226,7 +108226,7 @@ void m68008_device::not_b_adr32_df8() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108289,7 +108289,7 @@ void m68008_device::not_w_ds_df8() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -108338,7 +108338,7 @@ void m68008_device::not_w_ais_df8() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108374,7 +108374,7 @@ void m68008_device::not_w_ais_df8() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108456,7 +108456,7 @@ void m68008_device::not_w_aips_df8() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -108490,7 +108490,7 @@ void m68008_device::not_w_aips_df8() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108574,7 +108574,7 @@ void m68008_device::not_w_pais_df8() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -108608,7 +108608,7 @@ void m68008_device::not_w_pais_df8() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108716,7 +108716,7 @@ void m68008_device::not_w_das_df8() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108752,7 +108752,7 @@ void m68008_device::not_w_das_df8() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108826,7 +108826,7 @@ void m68008_device::not_w_dais_df8() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -108908,7 +108908,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108944,7 +108944,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109053,7 +109053,7 @@ void m68008_device::not_w_adr16_df8() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -109087,7 +109087,7 @@ void m68008_device::not_w_adr16_df8() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109227,7 +109227,7 @@ void m68008_device::not_w_adr32_df8() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -109261,7 +109261,7 @@ void m68008_device::not_w_adr32_df8() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109339,12 +109339,12 @@ void m68008_device::not_l_ds_df8() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109394,7 +109394,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -109461,7 +109461,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109496,7 +109496,7 @@ void m68008_device::not_l_ais_df8() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109570,7 +109570,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -109640,7 +109640,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109675,7 +109675,7 @@ void m68008_device::not_l_aips_df8() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109748,7 +109748,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -109820,7 +109820,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109855,7 +109855,7 @@ void m68008_device::not_l_pais_df8() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109960,7 +109960,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -110027,7 +110027,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110062,7 +110062,7 @@ void m68008_device::not_l_das_df8() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110134,7 +110134,7 @@ void m68008_device::not_l_dais_df8() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -110215,7 +110215,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -110282,7 +110282,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110317,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110424,7 +110424,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -110491,7 +110491,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110526,7 +110526,7 @@ void m68008_device::not_l_adr16_df8() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110664,7 +110664,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -110731,7 +110731,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110766,7 +110766,7 @@ void m68008_device::not_l_adr32_df8() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110938,7 +110938,7 @@ void m68008_device::move_ais_sr_df8() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111072,7 +111072,7 @@ void m68008_device::move_aips_sr_df8() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -111206,7 +111206,7 @@ void m68008_device::move_pais_sr_df8() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -111364,7 +111364,7 @@ void m68008_device::move_das_sr_df8() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111490,7 +111490,7 @@ void m68008_device::move_dais_sr_df8() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111572,7 +111572,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111733,7 +111733,7 @@ void m68008_device::move_adr16_sr_df8() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -111923,7 +111923,7 @@ void m68008_device::move_adr32_sr_df8() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -112080,7 +112080,7 @@ void m68008_device::move_dpc_sr_df8() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112205,7 +112205,7 @@ void m68008_device::move_dpci_sr_df8() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -112287,7 +112287,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112540,12 +112540,12 @@ void m68008_device::nbcd_b_ds_df8() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112593,7 +112593,7 @@ void m68008_device::nbcd_b_ais_df8() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112613,12 +112613,12 @@ void m68008_device::nbcd_b_ais_df8() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112683,7 +112683,7 @@ void m68008_device::nbcd_b_aips_df8() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -112701,12 +112701,12 @@ void m68008_device::nbcd_b_aips_df8() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112773,7 +112773,7 @@ void m68008_device::nbcd_b_pais_df8() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -112791,12 +112791,12 @@ void m68008_device::nbcd_b_pais_df8() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112887,7 +112887,7 @@ void m68008_device::nbcd_b_das_df8() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112907,12 +112907,12 @@ void m68008_device::nbcd_b_das_df8() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112969,7 +112969,7 @@ void m68008_device::nbcd_b_dais_df8() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -113051,7 +113051,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -113071,12 +113071,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113168,7 +113168,7 @@ void m68008_device::nbcd_b_adr16_df8() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -113186,12 +113186,12 @@ void m68008_device::nbcd_b_adr16_df8() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113314,7 +113314,7 @@ void m68008_device::nbcd_b_adr32_df8() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -113332,12 +113332,12 @@ void m68008_device::nbcd_b_adr32_df8() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113399,7 +113399,7 @@ void m68008_device::swap_ds_df8() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -113407,7 +113407,7 @@ void m68008_device::swap_ds_df8() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -113454,7 +113454,7 @@ void m68008_device::pea_ais_df8() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -113561,7 +113561,7 @@ void m68008_device::pea_das_df8() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -113598,7 +113598,7 @@ void m68008_device::pea_das_df8() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -113703,7 +113703,7 @@ void m68008_device::pea_dais_df8() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -113784,7 +113784,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -114213,7 +114213,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -114250,7 +114250,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114354,7 +114354,7 @@ void m68008_device::pea_dpc_df8() // 487a ffff
void m68008_device::pea_dpci_df8() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -114435,7 +114435,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -114549,7 +114549,7 @@ void m68008_device::ext_w_ds_df8() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -115040,7 +115040,7 @@ void m68008_device::movem_w_list_dais_df8() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -115558,7 +115558,7 @@ void m68008_device::ext_l_ds_df8() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -116140,7 +116140,7 @@ void m68008_device::movem_l_list_dais_df8() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -116749,13 +116749,13 @@ void m68008_device::tst_b_ds_df8() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116797,11 +116797,11 @@ void m68008_device::tst_b_ais_df8() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -116819,13 +116819,13 @@ void m68008_device::tst_b_ais_df8() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116870,12 +116870,12 @@ void m68008_device::tst_b_aips_df8() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -116894,13 +116894,13 @@ void m68008_device::tst_b_aips_df8() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116944,7 +116944,7 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116952,7 +116952,7 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -116971,13 +116971,13 @@ void m68008_device::tst_b_pais_df8() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117019,7 +117019,7 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117052,11 +117052,11 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -117074,13 +117074,13 @@ void m68008_device::tst_b_das_df8() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117120,14 +117120,14 @@ void m68008_device::tst_b_dais_df8() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -117135,7 +117135,7 @@ void m68008_device::tst_b_dais_df8() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117169,7 +117169,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117205,11 +117205,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -117227,13 +117227,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117277,7 +117277,7 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117310,7 +117310,7 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -117329,13 +117329,13 @@ void m68008_device::tst_b_adr16_df8() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117377,7 +117377,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117411,7 +117411,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117444,7 +117444,7 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -117463,13 +117463,13 @@ void m68008_device::tst_b_adr32_df8() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117514,13 +117514,13 @@ void m68008_device::tst_w_ds_df8() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117562,11 +117562,11 @@ void m68008_device::tst_w_ais_df8() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117599,13 +117599,13 @@ void m68008_device::tst_w_ais_df8() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117650,12 +117650,12 @@ void m68008_device::tst_w_aips_df8() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -117689,13 +117689,13 @@ void m68008_device::tst_w_aips_df8() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117739,7 +117739,7 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117747,7 +117747,7 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -117781,13 +117781,13 @@ void m68008_device::tst_w_pais_df8() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117829,7 +117829,7 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117862,11 +117862,11 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117899,13 +117899,13 @@ void m68008_device::tst_w_das_df8() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117945,14 +117945,14 @@ void m68008_device::tst_w_dais_df8() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -117960,7 +117960,7 @@ void m68008_device::tst_w_dais_df8() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117994,7 +117994,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118030,11 +118030,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118067,13 +118067,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118117,7 +118117,7 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -118150,7 +118150,7 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118184,13 +118184,13 @@ void m68008_device::tst_w_adr16_df8() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118232,7 +118232,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118266,7 +118266,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -118299,7 +118299,7 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118333,13 +118333,13 @@ void m68008_device::tst_w_adr32_df8() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118384,13 +118384,13 @@ void m68008_device::tst_l_ds_df8() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118434,7 +118434,7 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118469,7 +118469,7 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118502,13 +118502,13 @@ void m68008_device::tst_l_ais_df8() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118552,7 +118552,7 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118587,11 +118587,11 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118624,13 +118624,13 @@ void m68008_device::tst_l_aips_df8() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118673,14 +118673,14 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118714,7 +118714,7 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118747,13 +118747,13 @@ void m68008_device::tst_l_pais_df8() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118797,7 +118797,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118829,7 +118829,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118864,7 +118864,7 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118897,13 +118897,13 @@ void m68008_device::tst_l_das_df8() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118945,14 +118945,14 @@ void m68008_device::tst_l_dais_df8() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -118960,7 +118960,7 @@ void m68008_device::tst_l_dais_df8() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118994,7 +118994,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119029,7 +119029,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -119064,7 +119064,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119097,13 +119097,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119149,7 +119149,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -119182,7 +119182,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -119217,7 +119217,7 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119250,13 +119250,13 @@ void m68008_device::tst_l_adr16_df8() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119300,7 +119300,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119334,7 +119334,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -119367,7 +119367,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -119402,7 +119402,7 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119435,13 +119435,13 @@ void m68008_device::tst_l_adr32_df8() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119487,14 +119487,14 @@ void m68008_device::tas_ds_df8() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119538,11 +119538,11 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -119555,14 +119555,14 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119584,11 +119584,11 @@ void m68008_device::tas_ais_df8() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119633,12 +119633,12 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -119652,14 +119652,14 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119681,11 +119681,11 @@ void m68008_device::tas_aips_df8() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119729,7 +119729,7 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119737,7 +119737,7 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -119751,14 +119751,14 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119780,11 +119780,11 @@ void m68008_device::tas_pais_df8() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119826,7 +119826,7 @@ void m68008_device::tas_das_df8() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119859,11 +119859,11 @@ void m68008_device::tas_das_df8() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -119876,14 +119876,14 @@ void m68008_device::tas_das_df8() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119905,11 +119905,11 @@ void m68008_device::tas_das_df8() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119949,14 +119949,14 @@ void m68008_device::tas_dais_df8() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119964,7 +119964,7 @@ void m68008_device::tas_dais_df8() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119998,7 +119998,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120034,11 +120034,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -120051,14 +120051,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120080,11 +120080,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120128,7 +120128,7 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -120161,7 +120161,7 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -120175,14 +120175,14 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120204,11 +120204,11 @@ void m68008_device::tas_adr16_df8() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120250,7 +120250,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120284,7 +120284,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -120317,7 +120317,7 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -120331,14 +120331,14 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120360,11 +120360,11 @@ void m68008_device::tas_adr32_df8() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120940,7 +120940,7 @@ void m68008_device::movem_w_dais_list_df8() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -121018,7 +121018,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -121771,7 +121771,7 @@ void m68008_device::movem_w_dpci_list_df8() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -121849,7 +121849,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -122602,7 +122602,7 @@ void m68008_device::movem_l_dais_list_df8() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -122680,7 +122680,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -123557,7 +123557,7 @@ void m68008_device::movem_l_dpci_list_df8() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -123635,7 +123635,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -123797,14 +123797,14 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -123839,7 +123839,7 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -123872,7 +123872,7 @@ void m68008_device::trap_imm4_df8() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -124044,7 +124044,7 @@ void m68008_device::link_as_imm16_df8() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -124411,7 +124411,7 @@ void m68008_device::reset_df8() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -124531,7 +124531,7 @@ void m68008_device::stop_i16u_df8() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -124544,6 +124544,7 @@ void m68008_device::stop_i16u_df8() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -124557,7 +124558,7 @@ void m68008_device::rte_df8() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -124738,7 +124739,7 @@ void m68008_device::rts_df8() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -124929,7 +124930,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -124962,7 +124963,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -124997,7 +124998,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -125030,7 +125031,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -125200,7 +125201,7 @@ void m68008_device::rtr_df8() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -125658,7 +125659,7 @@ void m68008_device::jsr_dais_df8() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -126277,7 +126278,7 @@ void m68008_device::jsr_dpc_df8() // 4eba ffff
void m68008_device::jsr_dpci_df8() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -126598,7 +126599,7 @@ void m68008_device::jmp_dais_df8() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -126960,7 +126961,7 @@ void m68008_device::jmp_dpc_df8() // 4efa ffff
void m68008_device::jmp_dpci_df8() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -127064,7 +127065,7 @@ void m68008_device::addq_b_imm3_ds_df8() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -127113,7 +127114,7 @@ void m68008_device::addq_b_imm3_ais_df8() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127135,7 +127136,7 @@ void m68008_device::addq_b_imm3_ais_df8() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127202,7 +127203,7 @@ void m68008_device::addq_b_imm3_aips_df8() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -127222,7 +127223,7 @@ void m68008_device::addq_b_imm3_aips_df8() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127291,7 +127292,7 @@ void m68008_device::addq_b_imm3_pais_df8() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -127311,7 +127312,7 @@ void m68008_device::addq_b_imm3_pais_df8() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127404,7 +127405,7 @@ void m68008_device::addq_b_imm3_das_df8() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127426,7 +127427,7 @@ void m68008_device::addq_b_imm3_das_df8() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127485,7 +127486,7 @@ void m68008_device::addq_b_imm3_dais_df8() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -127567,7 +127568,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127589,7 +127590,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127683,7 +127684,7 @@ void m68008_device::addq_b_imm3_adr16_df8() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -127703,7 +127704,7 @@ void m68008_device::addq_b_imm3_adr16_df8() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127828,7 +127829,7 @@ void m68008_device::addq_b_imm3_adr32_df8() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -127848,7 +127849,7 @@ void m68008_device::addq_b_imm3_adr32_df8() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127911,7 +127912,7 @@ void m68008_device::addq_w_imm3_ds_df8() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -127962,7 +127963,7 @@ void m68008_device::addq_w_imm3_as_df8() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -127995,7 +127996,7 @@ void m68008_device::addq_w_imm3_as_df8() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -128017,7 +128018,7 @@ void m68008_device::addq_w_imm3_ais_df8() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128054,7 +128055,7 @@ void m68008_device::addq_w_imm3_ais_df8() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128136,7 +128137,7 @@ void m68008_device::addq_w_imm3_aips_df8() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -128171,7 +128172,7 @@ void m68008_device::addq_w_imm3_aips_df8() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128255,7 +128256,7 @@ void m68008_device::addq_w_imm3_pais_df8() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -128290,7 +128291,7 @@ void m68008_device::addq_w_imm3_pais_df8() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128398,7 +128399,7 @@ void m68008_device::addq_w_imm3_das_df8() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128435,7 +128436,7 @@ void m68008_device::addq_w_imm3_das_df8() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128509,7 +128510,7 @@ void m68008_device::addq_w_imm3_dais_df8() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -128591,7 +128592,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128628,7 +128629,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128737,7 +128738,7 @@ void m68008_device::addq_w_imm3_adr16_df8() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -128772,7 +128773,7 @@ void m68008_device::addq_w_imm3_adr16_df8() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128912,7 +128913,7 @@ void m68008_device::addq_w_imm3_adr32_df8() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -128947,7 +128948,7 @@ void m68008_device::addq_w_imm3_adr32_df8() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129025,7 +129026,7 @@ void m68008_device::addq_l_imm3_ds_df8() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -129059,7 +129060,7 @@ void m68008_device::addq_l_imm3_ds_df8() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -129084,7 +129085,7 @@ void m68008_device::addq_l_imm3_as_df8() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -129117,7 +129118,7 @@ void m68008_device::addq_l_imm3_as_df8() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -129139,7 +129140,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -129207,7 +129208,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129242,7 +129243,7 @@ void m68008_device::addq_l_imm3_ais_df8() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129316,7 +129317,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -129387,7 +129388,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129422,7 +129423,7 @@ void m68008_device::addq_l_imm3_aips_df8() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129495,7 +129496,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -129568,7 +129569,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129603,7 +129604,7 @@ void m68008_device::addq_l_imm3_pais_df8() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129708,7 +129709,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -129776,7 +129777,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129811,7 +129812,7 @@ void m68008_device::addq_l_imm3_das_df8() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129883,7 +129884,7 @@ void m68008_device::addq_l_imm3_dais_df8() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -129964,7 +129965,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -130032,7 +130033,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130067,7 +130068,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130174,7 +130175,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -130242,7 +130243,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130277,7 +130278,7 @@ void m68008_device::addq_l_imm3_adr16_df8() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130415,7 +130416,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -130483,7 +130484,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130518,7 +130519,7 @@ void m68008_device::addq_l_imm3_adr32_df8() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130594,7 +130595,7 @@ void m68008_device::st_ds_df8() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130606,7 +130607,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130643,7 +130644,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130678,7 +130679,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130693,7 +130694,7 @@ void m68008_device::dbt_ds_rel16_df8() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130705,13 +130706,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130749,7 +130750,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130757,7 +130758,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130791,11 +130792,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130835,13 +130836,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130881,7 +130882,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130922,11 +130923,11 @@ void m68008_device::st_ais_df8() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -130944,7 +130945,7 @@ void m68008_device::st_ais_df8() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130954,7 +130955,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130988,7 +130989,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131026,7 +131027,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131054,12 +131055,12 @@ void m68008_device::st_aips_df8() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -131078,7 +131079,7 @@ void m68008_device::st_aips_df8() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131088,7 +131089,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131122,7 +131123,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131160,7 +131161,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131187,7 +131188,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131195,7 +131196,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -131214,7 +131215,7 @@ void m68008_device::st_pais_df8() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131224,7 +131225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131258,7 +131259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131296,7 +131297,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131321,7 +131322,7 @@ void m68008_device::st_das_df8() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131354,11 +131355,11 @@ void m68008_device::st_das_df8() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -131376,7 +131377,7 @@ void m68008_device::st_das_df8() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131386,7 +131387,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131420,7 +131421,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131458,7 +131459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131481,14 +131482,14 @@ void m68008_device::st_dais_df8() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131496,7 +131497,7 @@ void m68008_device::st_dais_df8() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131530,7 +131531,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131566,11 +131567,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -131588,7 +131589,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131598,7 +131599,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131632,7 +131633,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131670,7 +131671,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131697,7 +131698,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131730,7 +131731,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -131749,7 +131750,7 @@ void m68008_device::st_adr16_df8() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131759,7 +131760,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131793,7 +131794,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131831,7 +131832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -131856,7 +131857,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131890,7 +131891,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -131923,7 +131924,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -131942,7 +131943,7 @@ void m68008_device::st_adr32_df8() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131952,7 +131953,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131986,7 +131987,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -132024,7 +132025,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -132051,7 +132052,7 @@ void m68008_device::subq_b_imm3_ds_df8() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -132100,7 +132101,7 @@ void m68008_device::subq_b_imm3_ais_df8() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132122,7 +132123,7 @@ void m68008_device::subq_b_imm3_ais_df8() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132189,7 +132190,7 @@ void m68008_device::subq_b_imm3_aips_df8() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -132209,7 +132210,7 @@ void m68008_device::subq_b_imm3_aips_df8() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132278,7 +132279,7 @@ void m68008_device::subq_b_imm3_pais_df8() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -132298,7 +132299,7 @@ void m68008_device::subq_b_imm3_pais_df8() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132391,7 +132392,7 @@ void m68008_device::subq_b_imm3_das_df8() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132413,7 +132414,7 @@ void m68008_device::subq_b_imm3_das_df8() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132472,7 +132473,7 @@ void m68008_device::subq_b_imm3_dais_df8() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -132554,7 +132555,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132576,7 +132577,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132670,7 +132671,7 @@ void m68008_device::subq_b_imm3_adr16_df8() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -132690,7 +132691,7 @@ void m68008_device::subq_b_imm3_adr16_df8() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132815,7 +132816,7 @@ void m68008_device::subq_b_imm3_adr32_df8() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -132835,7 +132836,7 @@ void m68008_device::subq_b_imm3_adr32_df8() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132898,7 +132899,7 @@ void m68008_device::subq_w_imm3_ds_df8() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -132949,7 +132950,7 @@ void m68008_device::subq_w_imm3_as_df8() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -132982,7 +132983,7 @@ void m68008_device::subq_w_imm3_as_df8() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -133004,7 +133005,7 @@ void m68008_device::subq_w_imm3_ais_df8() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133041,7 +133042,7 @@ void m68008_device::subq_w_imm3_ais_df8() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133123,7 +133124,7 @@ void m68008_device::subq_w_imm3_aips_df8() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -133158,7 +133159,7 @@ void m68008_device::subq_w_imm3_aips_df8() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133242,7 +133243,7 @@ void m68008_device::subq_w_imm3_pais_df8() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -133277,7 +133278,7 @@ void m68008_device::subq_w_imm3_pais_df8() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133385,7 +133386,7 @@ void m68008_device::subq_w_imm3_das_df8() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133422,7 +133423,7 @@ void m68008_device::subq_w_imm3_das_df8() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133496,7 +133497,7 @@ void m68008_device::subq_w_imm3_dais_df8() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -133578,7 +133579,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133615,7 +133616,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133724,7 +133725,7 @@ void m68008_device::subq_w_imm3_adr16_df8() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -133759,7 +133760,7 @@ void m68008_device::subq_w_imm3_adr16_df8() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133899,7 +133900,7 @@ void m68008_device::subq_w_imm3_adr32_df8() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -133934,7 +133935,7 @@ void m68008_device::subq_w_imm3_adr32_df8() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134012,7 +134013,7 @@ void m68008_device::subq_l_imm3_ds_df8() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -134046,7 +134047,7 @@ void m68008_device::subq_l_imm3_ds_df8() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -134071,7 +134072,7 @@ void m68008_device::subq_l_imm3_as_df8() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -134104,7 +134105,7 @@ void m68008_device::subq_l_imm3_as_df8() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -134126,7 +134127,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -134194,7 +134195,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134229,7 +134230,7 @@ void m68008_device::subq_l_imm3_ais_df8() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134303,7 +134304,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -134374,7 +134375,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134409,7 +134410,7 @@ void m68008_device::subq_l_imm3_aips_df8() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134482,7 +134483,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -134555,7 +134556,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134590,7 +134591,7 @@ void m68008_device::subq_l_imm3_pais_df8() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134695,7 +134696,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -134763,7 +134764,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134798,7 +134799,7 @@ void m68008_device::subq_l_imm3_das_df8() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134870,7 +134871,7 @@ void m68008_device::subq_l_imm3_dais_df8() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -134951,7 +134952,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -135019,7 +135020,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135054,7 +135055,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135161,7 +135162,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -135229,7 +135230,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135264,7 +135265,7 @@ void m68008_device::subq_l_imm3_adr16_df8() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135402,7 +135403,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -135470,7 +135471,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135505,7 +135506,7 @@ void m68008_device::subq_l_imm3_adr32_df8() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135581,7 +135582,7 @@ void m68008_device::sf_ds_df8() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -135593,7 +135594,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135630,7 +135631,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135665,7 +135666,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -135680,7 +135681,7 @@ void m68008_device::dbra_ds_rel16_df8() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -135692,13 +135693,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135736,7 +135737,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -135744,7 +135745,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135778,11 +135779,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135822,13 +135823,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135868,7 +135869,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135909,11 +135910,11 @@ void m68008_device::sf_ais_df8() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -135931,7 +135932,7 @@ void m68008_device::sf_ais_df8() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135941,7 +135942,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135975,7 +135976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136013,7 +136014,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136041,12 +136042,12 @@ void m68008_device::sf_aips_df8() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -136065,7 +136066,7 @@ void m68008_device::sf_aips_df8() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136075,7 +136076,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136109,7 +136110,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136147,7 +136148,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136174,7 +136175,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136182,7 +136183,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -136201,7 +136202,7 @@ void m68008_device::sf_pais_df8() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136211,7 +136212,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136245,7 +136246,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136283,7 +136284,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136308,7 +136309,7 @@ void m68008_device::sf_das_df8() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136341,11 +136342,11 @@ void m68008_device::sf_das_df8() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -136363,7 +136364,7 @@ void m68008_device::sf_das_df8() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136373,7 +136374,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136407,7 +136408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136445,7 +136446,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136468,14 +136469,14 @@ void m68008_device::sf_dais_df8() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136483,7 +136484,7 @@ void m68008_device::sf_dais_df8() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136517,7 +136518,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136553,11 +136554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -136575,7 +136576,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136585,7 +136586,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136619,7 +136620,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136657,7 +136658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136684,7 +136685,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136717,7 +136718,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -136736,7 +136737,7 @@ void m68008_device::sf_adr16_df8() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136746,7 +136747,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136780,7 +136781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136818,7 +136819,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -136843,7 +136844,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136877,7 +136878,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136910,7 +136911,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -136929,7 +136930,7 @@ void m68008_device::sf_adr32_df8() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136939,7 +136940,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136973,7 +136974,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137011,7 +137012,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -137038,7 +137039,7 @@ void m68008_device::shi_ds_df8() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -137050,7 +137051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137087,7 +137088,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137122,7 +137123,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -137137,7 +137138,7 @@ void m68008_device::dbhi_ds_rel16_df8() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -137149,13 +137150,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137193,7 +137194,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -137201,7 +137202,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137235,11 +137236,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137279,13 +137280,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137325,7 +137326,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137366,11 +137367,11 @@ void m68008_device::shi_ais_df8() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -137388,7 +137389,7 @@ void m68008_device::shi_ais_df8() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137398,7 +137399,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137432,7 +137433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137470,7 +137471,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -137498,12 +137499,12 @@ void m68008_device::shi_aips_df8() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -137522,7 +137523,7 @@ void m68008_device::shi_aips_df8() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137532,7 +137533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137566,7 +137567,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137604,7 +137605,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -137631,7 +137632,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -137639,7 +137640,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -137658,7 +137659,7 @@ void m68008_device::shi_pais_df8() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137668,7 +137669,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137702,7 +137703,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137740,7 +137741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -137765,7 +137766,7 @@ void m68008_device::shi_das_df8() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137798,11 +137799,11 @@ void m68008_device::shi_das_df8() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -137820,7 +137821,7 @@ void m68008_device::shi_das_df8() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137830,7 +137831,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137864,7 +137865,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137902,7 +137903,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -137925,14 +137926,14 @@ void m68008_device::shi_dais_df8() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -137940,7 +137941,7 @@ void m68008_device::shi_dais_df8() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137974,7 +137975,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138010,11 +138011,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -138032,7 +138033,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138042,7 +138043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138076,7 +138077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138114,7 +138115,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -138141,7 +138142,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138174,7 +138175,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -138193,7 +138194,7 @@ void m68008_device::shi_adr16_df8() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138203,7 +138204,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138237,7 +138238,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138275,7 +138276,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -138300,7 +138301,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138334,7 +138335,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138367,7 +138368,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -138386,7 +138387,7 @@ void m68008_device::shi_adr32_df8() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138396,7 +138397,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138430,7 +138431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138468,7 +138469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -138495,7 +138496,7 @@ void m68008_device::sls_ds_df8() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -138507,7 +138508,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138544,7 +138545,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138579,7 +138580,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -138594,7 +138595,7 @@ void m68008_device::dbls_ds_rel16_df8() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -138606,13 +138607,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138650,7 +138651,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -138658,7 +138659,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138692,11 +138693,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138736,13 +138737,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138782,7 +138783,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138823,11 +138824,11 @@ void m68008_device::sls_ais_df8() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -138845,7 +138846,7 @@ void m68008_device::sls_ais_df8() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138855,7 +138856,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138889,7 +138890,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138927,7 +138928,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -138955,12 +138956,12 @@ void m68008_device::sls_aips_df8() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -138979,7 +138980,7 @@ void m68008_device::sls_aips_df8() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138989,7 +138990,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139023,7 +139024,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139061,7 +139062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139088,7 +139089,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -139096,7 +139097,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -139115,7 +139116,7 @@ void m68008_device::sls_pais_df8() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139125,7 +139126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139159,7 +139160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139197,7 +139198,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139222,7 +139223,7 @@ void m68008_device::sls_das_df8() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139255,11 +139256,11 @@ void m68008_device::sls_das_df8() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -139277,7 +139278,7 @@ void m68008_device::sls_das_df8() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139287,7 +139288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139321,7 +139322,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139359,7 +139360,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139382,14 +139383,14 @@ void m68008_device::sls_dais_df8() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -139397,7 +139398,7 @@ void m68008_device::sls_dais_df8() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139431,7 +139432,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139467,11 +139468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -139489,7 +139490,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139499,7 +139500,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139533,7 +139534,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139571,7 +139572,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139598,7 +139599,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139631,7 +139632,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -139650,7 +139651,7 @@ void m68008_device::sls_adr16_df8() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139660,7 +139661,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139694,7 +139695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139732,7 +139733,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139757,7 +139758,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139791,7 +139792,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139824,7 +139825,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -139843,7 +139844,7 @@ void m68008_device::sls_adr32_df8() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139853,7 +139854,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139887,7 +139888,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139925,7 +139926,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -139952,7 +139953,7 @@ void m68008_device::scc_ds_df8() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -139964,7 +139965,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140001,7 +140002,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140036,7 +140037,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -140051,7 +140052,7 @@ void m68008_device::dbcc_ds_rel16_df8() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -140063,13 +140064,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140107,7 +140108,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -140115,7 +140116,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140149,11 +140150,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140193,13 +140194,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140239,7 +140240,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140280,11 +140281,11 @@ void m68008_device::scc_ais_df8() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -140302,7 +140303,7 @@ void m68008_device::scc_ais_df8() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140312,7 +140313,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140346,7 +140347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140384,7 +140385,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -140412,12 +140413,12 @@ void m68008_device::scc_aips_df8() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -140436,7 +140437,7 @@ void m68008_device::scc_aips_df8() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140446,7 +140447,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140480,7 +140481,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140518,7 +140519,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -140545,7 +140546,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140553,7 +140554,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -140572,7 +140573,7 @@ void m68008_device::scc_pais_df8() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140582,7 +140583,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140616,7 +140617,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140654,7 +140655,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -140679,7 +140680,7 @@ void m68008_device::scc_das_df8() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140712,11 +140713,11 @@ void m68008_device::scc_das_df8() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -140734,7 +140735,7 @@ void m68008_device::scc_das_df8() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140744,7 +140745,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140778,7 +140779,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -140816,7 +140817,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -140839,14 +140840,14 @@ void m68008_device::scc_dais_df8() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -140854,7 +140855,7 @@ void m68008_device::scc_dais_df8() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140888,7 +140889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140924,11 +140925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -140946,7 +140947,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140956,7 +140957,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140990,7 +140991,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141028,7 +141029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -141055,7 +141056,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141088,7 +141089,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -141107,7 +141108,7 @@ void m68008_device::scc_adr16_df8() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141117,7 +141118,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141151,7 +141152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141189,7 +141190,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -141214,7 +141215,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141248,7 +141249,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141281,7 +141282,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -141300,7 +141301,7 @@ void m68008_device::scc_adr32_df8() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141310,7 +141311,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141344,7 +141345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141382,7 +141383,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -141409,7 +141410,7 @@ void m68008_device::scs_ds_df8() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -141421,7 +141422,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141458,7 +141459,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141493,7 +141494,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -141508,7 +141509,7 @@ void m68008_device::dbcs_ds_rel16_df8() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -141520,13 +141521,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141564,7 +141565,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -141572,7 +141573,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141606,11 +141607,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141650,13 +141651,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141696,7 +141697,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141737,11 +141738,11 @@ void m68008_device::scs_ais_df8() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -141759,7 +141760,7 @@ void m68008_device::scs_ais_df8() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141769,7 +141770,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141803,7 +141804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141841,7 +141842,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -141869,12 +141870,12 @@ void m68008_device::scs_aips_df8() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -141893,7 +141894,7 @@ void m68008_device::scs_aips_df8() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141903,7 +141904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141937,7 +141938,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -141975,7 +141976,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142002,7 +142003,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142010,7 +142011,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -142029,7 +142030,7 @@ void m68008_device::scs_pais_df8() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142039,7 +142040,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142073,7 +142074,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142111,7 +142112,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142136,7 +142137,7 @@ void m68008_device::scs_das_df8() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142169,11 +142170,11 @@ void m68008_device::scs_das_df8() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -142191,7 +142192,7 @@ void m68008_device::scs_das_df8() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142201,7 +142202,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142235,7 +142236,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142273,7 +142274,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142296,14 +142297,14 @@ void m68008_device::scs_dais_df8() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142311,7 +142312,7 @@ void m68008_device::scs_dais_df8() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142345,7 +142346,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142381,11 +142382,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -142403,7 +142404,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142413,7 +142414,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142447,7 +142448,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142485,7 +142486,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142512,7 +142513,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142545,7 +142546,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -142564,7 +142565,7 @@ void m68008_device::scs_adr16_df8() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142574,7 +142575,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142608,7 +142609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142646,7 +142647,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142671,7 +142672,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142705,7 +142706,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142738,7 +142739,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -142757,7 +142758,7 @@ void m68008_device::scs_adr32_df8() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142767,7 +142768,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142801,7 +142802,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142839,7 +142840,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -142866,7 +142867,7 @@ void m68008_device::sne_ds_df8() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -142878,7 +142879,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142915,7 +142916,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -142950,7 +142951,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142965,7 +142966,7 @@ void m68008_device::dbne_ds_rel16_df8() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -142977,13 +142978,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143021,7 +143022,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -143029,7 +143030,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143063,11 +143064,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143107,13 +143108,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143153,7 +143154,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143194,11 +143195,11 @@ void m68008_device::sne_ais_df8() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -143216,7 +143217,7 @@ void m68008_device::sne_ais_df8() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143226,7 +143227,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143260,7 +143261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143298,7 +143299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -143326,12 +143327,12 @@ void m68008_device::sne_aips_df8() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -143350,7 +143351,7 @@ void m68008_device::sne_aips_df8() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143360,7 +143361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143394,7 +143395,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143432,7 +143433,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -143459,7 +143460,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -143467,7 +143468,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -143486,7 +143487,7 @@ void m68008_device::sne_pais_df8() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143496,7 +143497,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143530,7 +143531,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143568,7 +143569,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -143593,7 +143594,7 @@ void m68008_device::sne_das_df8() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143626,11 +143627,11 @@ void m68008_device::sne_das_df8() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -143648,7 +143649,7 @@ void m68008_device::sne_das_df8() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143658,7 +143659,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143692,7 +143693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143730,7 +143731,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -143753,14 +143754,14 @@ void m68008_device::sne_dais_df8() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -143768,7 +143769,7 @@ void m68008_device::sne_dais_df8() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143802,7 +143803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143838,11 +143839,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -143860,7 +143861,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143870,7 +143871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143904,7 +143905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -143942,7 +143943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -143969,7 +143970,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144002,7 +144003,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -144021,7 +144022,7 @@ void m68008_device::sne_adr16_df8() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144031,7 +144032,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144065,7 +144066,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144103,7 +144104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -144128,7 +144129,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144162,7 +144163,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144195,7 +144196,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -144214,7 +144215,7 @@ void m68008_device::sne_adr32_df8() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144224,7 +144225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144258,7 +144259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144296,7 +144297,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -144323,7 +144324,7 @@ void m68008_device::seq_ds_df8() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -144335,7 +144336,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144372,7 +144373,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144407,7 +144408,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144422,7 +144423,7 @@ void m68008_device::dbeq_ds_rel16_df8() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -144434,13 +144435,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144478,7 +144479,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -144486,7 +144487,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144520,11 +144521,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144564,13 +144565,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144610,7 +144611,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144651,11 +144652,11 @@ void m68008_device::seq_ais_df8() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -144673,7 +144674,7 @@ void m68008_device::seq_ais_df8() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144683,7 +144684,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144717,7 +144718,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144755,7 +144756,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -144783,12 +144784,12 @@ void m68008_device::seq_aips_df8() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -144807,7 +144808,7 @@ void m68008_device::seq_aips_df8() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144817,7 +144818,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144851,7 +144852,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -144889,7 +144890,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -144916,7 +144917,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -144924,7 +144925,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -144943,7 +144944,7 @@ void m68008_device::seq_pais_df8() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144953,7 +144954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144987,7 +144988,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145025,7 +145026,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -145050,7 +145051,7 @@ void m68008_device::seq_das_df8() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145083,11 +145084,11 @@ void m68008_device::seq_das_df8() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -145105,7 +145106,7 @@ void m68008_device::seq_das_df8() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145115,7 +145116,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145149,7 +145150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145187,7 +145188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -145210,14 +145211,14 @@ void m68008_device::seq_dais_df8() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -145225,7 +145226,7 @@ void m68008_device::seq_dais_df8() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145259,7 +145260,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145295,11 +145296,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -145317,7 +145318,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145327,7 +145328,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145361,7 +145362,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145399,7 +145400,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -145426,7 +145427,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145459,7 +145460,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -145478,7 +145479,7 @@ void m68008_device::seq_adr16_df8() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145488,7 +145489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145522,7 +145523,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145560,7 +145561,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -145585,7 +145586,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145619,7 +145620,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145652,7 +145653,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -145671,7 +145672,7 @@ void m68008_device::seq_adr32_df8() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145681,7 +145682,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145715,7 +145716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145753,7 +145754,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -145780,7 +145781,7 @@ void m68008_device::svc_ds_df8() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -145792,7 +145793,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145829,7 +145830,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145864,7 +145865,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -145879,7 +145880,7 @@ void m68008_device::dbvc_ds_rel16_df8() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -145891,13 +145892,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -145935,7 +145936,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -145943,7 +145944,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145977,11 +145978,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146021,13 +146022,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146067,7 +146068,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146108,11 +146109,11 @@ void m68008_device::svc_ais_df8() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -146130,7 +146131,7 @@ void m68008_device::svc_ais_df8() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146140,7 +146141,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146174,7 +146175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146212,7 +146213,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -146240,12 +146241,12 @@ void m68008_device::svc_aips_df8() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -146264,7 +146265,7 @@ void m68008_device::svc_aips_df8() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146274,7 +146275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146308,7 +146309,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146346,7 +146347,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -146373,7 +146374,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -146381,7 +146382,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -146400,7 +146401,7 @@ void m68008_device::svc_pais_df8() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146410,7 +146411,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146444,7 +146445,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146482,7 +146483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -146507,7 +146508,7 @@ void m68008_device::svc_das_df8() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146540,11 +146541,11 @@ void m68008_device::svc_das_df8() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -146562,7 +146563,7 @@ void m68008_device::svc_das_df8() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146572,7 +146573,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146606,7 +146607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146644,7 +146645,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -146667,14 +146668,14 @@ void m68008_device::svc_dais_df8() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -146682,7 +146683,7 @@ void m68008_device::svc_dais_df8() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146716,7 +146717,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146752,11 +146753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -146774,7 +146775,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146784,7 +146785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146818,7 +146819,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146856,7 +146857,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -146883,7 +146884,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -146916,7 +146917,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -146935,7 +146936,7 @@ void m68008_device::svc_adr16_df8() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146945,7 +146946,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146979,7 +146980,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147017,7 +147018,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -147042,7 +147043,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147076,7 +147077,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147109,7 +147110,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -147128,7 +147129,7 @@ void m68008_device::svc_adr32_df8() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147138,7 +147139,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147172,7 +147173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147210,7 +147211,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -147237,7 +147238,7 @@ void m68008_device::svs_ds_df8() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -147249,7 +147250,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147286,7 +147287,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147321,7 +147322,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -147336,7 +147337,7 @@ void m68008_device::dbvs_ds_rel16_df8() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -147348,13 +147349,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147392,7 +147393,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -147400,7 +147401,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147434,11 +147435,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147478,13 +147479,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147524,7 +147525,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147565,11 +147566,11 @@ void m68008_device::svs_ais_df8() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -147587,7 +147588,7 @@ void m68008_device::svs_ais_df8() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147597,7 +147598,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147631,7 +147632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147669,7 +147670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -147697,12 +147698,12 @@ void m68008_device::svs_aips_df8() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -147721,7 +147722,7 @@ void m68008_device::svs_aips_df8() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147731,7 +147732,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147765,7 +147766,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147803,7 +147804,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -147830,7 +147831,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -147838,7 +147839,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -147857,7 +147858,7 @@ void m68008_device::svs_pais_df8() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147867,7 +147868,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147901,7 +147902,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -147939,7 +147940,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -147964,7 +147965,7 @@ void m68008_device::svs_das_df8() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147997,11 +147998,11 @@ void m68008_device::svs_das_df8() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -148019,7 +148020,7 @@ void m68008_device::svs_das_df8() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148029,7 +148030,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148063,7 +148064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148101,7 +148102,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -148124,14 +148125,14 @@ void m68008_device::svs_dais_df8() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -148139,7 +148140,7 @@ void m68008_device::svs_dais_df8() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148173,7 +148174,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148209,11 +148210,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -148231,7 +148232,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148241,7 +148242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148275,7 +148276,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148313,7 +148314,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -148340,7 +148341,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148373,7 +148374,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -148392,7 +148393,7 @@ void m68008_device::svs_adr16_df8() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148402,7 +148403,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148436,7 +148437,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148474,7 +148475,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -148499,7 +148500,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148533,7 +148534,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148566,7 +148567,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -148585,7 +148586,7 @@ void m68008_device::svs_adr32_df8() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148595,7 +148596,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148629,7 +148630,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148667,7 +148668,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -148694,7 +148695,7 @@ void m68008_device::spl_ds_df8() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -148706,7 +148707,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148743,7 +148744,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148778,7 +148779,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -148793,7 +148794,7 @@ void m68008_device::dbpl_ds_rel16_df8() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -148805,13 +148806,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -148849,7 +148850,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -148857,7 +148858,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148891,11 +148892,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148935,13 +148936,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148981,7 +148982,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149022,11 +149023,11 @@ void m68008_device::spl_ais_df8() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -149044,7 +149045,7 @@ void m68008_device::spl_ais_df8() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149054,7 +149055,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149088,7 +149089,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149126,7 +149127,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149154,12 +149155,12 @@ void m68008_device::spl_aips_df8() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -149178,7 +149179,7 @@ void m68008_device::spl_aips_df8() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149188,7 +149189,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149222,7 +149223,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149260,7 +149261,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149287,7 +149288,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149295,7 +149296,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -149314,7 +149315,7 @@ void m68008_device::spl_pais_df8() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149324,7 +149325,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149358,7 +149359,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149396,7 +149397,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149421,7 +149422,7 @@ void m68008_device::spl_das_df8() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149454,11 +149455,11 @@ void m68008_device::spl_das_df8() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -149476,7 +149477,7 @@ void m68008_device::spl_das_df8() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149486,7 +149487,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149520,7 +149521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149558,7 +149559,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149581,14 +149582,14 @@ void m68008_device::spl_dais_df8() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149596,7 +149597,7 @@ void m68008_device::spl_dais_df8() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149630,7 +149631,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149666,11 +149667,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -149688,7 +149689,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149698,7 +149699,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149732,7 +149733,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149770,7 +149771,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149797,7 +149798,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149830,7 +149831,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -149849,7 +149850,7 @@ void m68008_device::spl_adr16_df8() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149859,7 +149860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149893,7 +149894,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -149931,7 +149932,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -149956,7 +149957,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149990,7 +149991,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150023,7 +150024,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -150042,7 +150043,7 @@ void m68008_device::spl_adr32_df8() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150052,7 +150053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150086,7 +150087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150124,7 +150125,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -150151,7 +150152,7 @@ void m68008_device::smi_ds_df8() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -150163,7 +150164,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150200,7 +150201,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150235,7 +150236,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -150250,7 +150251,7 @@ void m68008_device::dbmi_ds_rel16_df8() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -150262,13 +150263,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150306,7 +150307,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -150314,7 +150315,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150348,11 +150349,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150392,13 +150393,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150438,7 +150439,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150479,11 +150480,11 @@ void m68008_device::smi_ais_df8() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -150501,7 +150502,7 @@ void m68008_device::smi_ais_df8() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150511,7 +150512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150545,7 +150546,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150583,7 +150584,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -150611,12 +150612,12 @@ void m68008_device::smi_aips_df8() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -150635,7 +150636,7 @@ void m68008_device::smi_aips_df8() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150645,7 +150646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150679,7 +150680,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150717,7 +150718,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -150744,7 +150745,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150752,7 +150753,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -150771,7 +150772,7 @@ void m68008_device::smi_pais_df8() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150781,7 +150782,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150815,7 +150816,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150853,7 +150854,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -150878,7 +150879,7 @@ void m68008_device::smi_das_df8() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150911,11 +150912,11 @@ void m68008_device::smi_das_df8() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -150933,7 +150934,7 @@ void m68008_device::smi_das_df8() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150943,7 +150944,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150977,7 +150978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151015,7 +151016,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -151038,14 +151039,14 @@ void m68008_device::smi_dais_df8() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -151053,7 +151054,7 @@ void m68008_device::smi_dais_df8() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151087,7 +151088,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151123,11 +151124,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -151145,7 +151146,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151155,7 +151156,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151189,7 +151190,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151227,7 +151228,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -151254,7 +151255,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151287,7 +151288,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -151306,7 +151307,7 @@ void m68008_device::smi_adr16_df8() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151316,7 +151317,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151350,7 +151351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151388,7 +151389,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -151413,7 +151414,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151447,7 +151448,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151480,7 +151481,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -151499,7 +151500,7 @@ void m68008_device::smi_adr32_df8() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151509,7 +151510,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151543,7 +151544,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151581,7 +151582,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -151608,7 +151609,7 @@ void m68008_device::sge_ds_df8() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -151620,7 +151621,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151657,7 +151658,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151692,7 +151693,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -151707,7 +151708,7 @@ void m68008_device::dbge_ds_rel16_df8() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -151719,13 +151720,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151763,7 +151764,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -151771,7 +151772,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151805,11 +151806,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151849,13 +151850,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151895,7 +151896,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151936,11 +151937,11 @@ void m68008_device::sge_ais_df8() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -151958,7 +151959,7 @@ void m68008_device::sge_ais_df8() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151968,7 +151969,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152002,7 +152003,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152040,7 +152041,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152068,12 +152069,12 @@ void m68008_device::sge_aips_df8() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -152092,7 +152093,7 @@ void m68008_device::sge_aips_df8() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152102,7 +152103,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152136,7 +152137,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152174,7 +152175,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152201,7 +152202,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -152209,7 +152210,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -152228,7 +152229,7 @@ void m68008_device::sge_pais_df8() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152238,7 +152239,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152272,7 +152273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152310,7 +152311,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152335,7 +152336,7 @@ void m68008_device::sge_das_df8() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152368,11 +152369,11 @@ void m68008_device::sge_das_df8() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -152390,7 +152391,7 @@ void m68008_device::sge_das_df8() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152400,7 +152401,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152434,7 +152435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152472,7 +152473,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152495,14 +152496,14 @@ void m68008_device::sge_dais_df8() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -152510,7 +152511,7 @@ void m68008_device::sge_dais_df8() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152544,7 +152545,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152580,11 +152581,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -152602,7 +152603,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152612,7 +152613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152646,7 +152647,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152684,7 +152685,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152711,7 +152712,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152744,7 +152745,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -152763,7 +152764,7 @@ void m68008_device::sge_adr16_df8() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152773,7 +152774,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152807,7 +152808,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152845,7 +152846,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -152870,7 +152871,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152904,7 +152905,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152937,7 +152938,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -152956,7 +152957,7 @@ void m68008_device::sge_adr32_df8() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152966,7 +152967,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153000,7 +153001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153038,7 +153039,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -153065,7 +153066,7 @@ void m68008_device::slt_ds_df8() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -153077,7 +153078,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153114,7 +153115,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153149,7 +153150,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -153164,7 +153165,7 @@ void m68008_device::dblt_ds_rel16_df8() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -153176,13 +153177,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153220,7 +153221,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -153228,7 +153229,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153262,11 +153263,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153306,13 +153307,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153352,7 +153353,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153393,11 +153394,11 @@ void m68008_device::slt_ais_df8() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -153415,7 +153416,7 @@ void m68008_device::slt_ais_df8() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153425,7 +153426,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153459,7 +153460,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153497,7 +153498,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -153525,12 +153526,12 @@ void m68008_device::slt_aips_df8() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -153549,7 +153550,7 @@ void m68008_device::slt_aips_df8() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153559,7 +153560,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153593,7 +153594,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153631,7 +153632,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -153658,7 +153659,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153666,7 +153667,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -153685,7 +153686,7 @@ void m68008_device::slt_pais_df8() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153695,7 +153696,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153729,7 +153730,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153767,7 +153768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -153792,7 +153793,7 @@ void m68008_device::slt_das_df8() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153825,11 +153826,11 @@ void m68008_device::slt_das_df8() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -153847,7 +153848,7 @@ void m68008_device::slt_das_df8() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153857,7 +153858,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153891,7 +153892,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -153929,7 +153930,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -153952,14 +153953,14 @@ void m68008_device::slt_dais_df8() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153967,7 +153968,7 @@ void m68008_device::slt_dais_df8() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154001,7 +154002,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154037,11 +154038,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -154059,7 +154060,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154069,7 +154070,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154103,7 +154104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154141,7 +154142,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -154168,7 +154169,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154201,7 +154202,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -154220,7 +154221,7 @@ void m68008_device::slt_adr16_df8() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154230,7 +154231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154264,7 +154265,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154302,7 +154303,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -154327,7 +154328,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154361,7 +154362,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154394,7 +154395,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -154413,7 +154414,7 @@ void m68008_device::slt_adr32_df8() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154423,7 +154424,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154457,7 +154458,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154495,7 +154496,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -154522,7 +154523,7 @@ void m68008_device::sgt_ds_df8() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -154534,7 +154535,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154571,7 +154572,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154606,7 +154607,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154621,7 +154622,7 @@ void m68008_device::dbgt_ds_rel16_df8() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -154633,13 +154634,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154677,7 +154678,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -154685,7 +154686,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154719,11 +154720,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154763,13 +154764,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154809,7 +154810,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154850,11 +154851,11 @@ void m68008_device::sgt_ais_df8() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -154872,7 +154873,7 @@ void m68008_device::sgt_ais_df8() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154882,7 +154883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154916,7 +154917,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -154954,7 +154955,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -154982,12 +154983,12 @@ void m68008_device::sgt_aips_df8() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -155006,7 +155007,7 @@ void m68008_device::sgt_aips_df8() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155016,7 +155017,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155050,7 +155051,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155088,7 +155089,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155115,7 +155116,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -155123,7 +155124,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -155142,7 +155143,7 @@ void m68008_device::sgt_pais_df8() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155152,7 +155153,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155186,7 +155187,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155224,7 +155225,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155249,7 +155250,7 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155282,11 +155283,11 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -155304,7 +155305,7 @@ void m68008_device::sgt_das_df8() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155314,7 +155315,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155348,7 +155349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155386,7 +155387,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155409,14 +155410,14 @@ void m68008_device::sgt_dais_df8() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -155424,7 +155425,7 @@ void m68008_device::sgt_dais_df8() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155458,7 +155459,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155494,11 +155495,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -155516,7 +155517,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155526,7 +155527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155560,7 +155561,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155598,7 +155599,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155625,7 +155626,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155658,7 +155659,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -155677,7 +155678,7 @@ void m68008_device::sgt_adr16_df8() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155687,7 +155688,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155721,7 +155722,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155759,7 +155760,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155784,7 +155785,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155818,7 +155819,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155851,7 +155852,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -155870,7 +155871,7 @@ void m68008_device::sgt_adr32_df8() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155880,7 +155881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155914,7 +155915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -155952,7 +155953,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -155979,7 +155980,7 @@ void m68008_device::sle_ds_df8() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -155991,7 +155992,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156028,7 +156029,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156063,7 +156064,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -156078,7 +156079,7 @@ void m68008_device::dble_ds_rel16_df8() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -156090,13 +156091,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156134,7 +156135,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -156142,7 +156143,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156176,11 +156177,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156220,13 +156221,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156266,7 +156267,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156307,11 +156308,11 @@ void m68008_device::sle_ais_df8() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -156329,7 +156330,7 @@ void m68008_device::sle_ais_df8() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156339,7 +156340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156373,7 +156374,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156411,7 +156412,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -156439,12 +156440,12 @@ void m68008_device::sle_aips_df8() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -156463,7 +156464,7 @@ void m68008_device::sle_aips_df8() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156473,7 +156474,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156507,7 +156508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156545,7 +156546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -156572,7 +156573,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -156580,7 +156581,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -156599,7 +156600,7 @@ void m68008_device::sle_pais_df8() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156609,7 +156610,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156643,7 +156644,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156681,7 +156682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -156706,7 +156707,7 @@ void m68008_device::sle_das_df8() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156739,11 +156740,11 @@ void m68008_device::sle_das_df8() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -156761,7 +156762,7 @@ void m68008_device::sle_das_df8() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156771,7 +156772,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156805,7 +156806,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156843,7 +156844,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -156866,14 +156867,14 @@ void m68008_device::sle_dais_df8() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -156881,7 +156882,7 @@ void m68008_device::sle_dais_df8() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156915,7 +156916,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156951,11 +156952,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -156973,7 +156974,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156983,7 +156984,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157017,7 +157018,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157055,7 +157056,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -157082,7 +157083,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157115,7 +157116,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -157134,7 +157135,7 @@ void m68008_device::sle_adr16_df8() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157144,7 +157145,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157178,7 +157179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157216,7 +157217,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -157241,7 +157242,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157275,7 +157276,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157308,7 +157309,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -157327,7 +157328,7 @@ void m68008_device::sle_adr32_df8() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157337,7 +157338,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157371,7 +157372,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157409,7 +157410,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -157660,7 +157661,7 @@ void m68008_device::bsr_rel16_df8() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -157807,7 +157808,7 @@ void m68008_device::bsr_rel8_df8() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -161149,7 +161150,7 @@ void m68008_device::moveq_imm8o_dd_df8() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -161199,7 +161200,7 @@ void m68008_device::or_b_ds_dd_df8() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161207,7 +161208,7 @@ void m68008_device::or_b_ds_dd_df8() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161250,11 +161251,11 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -161272,7 +161273,7 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161280,7 +161281,7 @@ void m68008_device::or_b_ais_dd_df8() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161326,12 +161327,12 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -161350,7 +161351,7 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161358,7 +161359,7 @@ void m68008_device::or_b_aips_dd_df8() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161403,7 +161404,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -161411,7 +161412,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -161430,7 +161431,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161438,7 +161439,7 @@ void m68008_device::or_b_pais_dd_df8() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161481,7 +161482,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161514,11 +161515,11 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -161536,7 +161537,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161544,7 +161545,7 @@ void m68008_device::or_b_das_dd_df8() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161585,14 +161586,14 @@ void m68008_device::or_b_dais_dd_df8() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -161600,7 +161601,7 @@ void m68008_device::or_b_dais_dd_df8() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161634,7 +161635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161670,11 +161671,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -161692,7 +161693,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161700,7 +161701,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161745,7 +161746,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161778,7 +161779,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -161797,7 +161798,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161805,7 +161806,7 @@ void m68008_device::or_b_adr16_dd_df8() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161848,7 +161849,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161882,7 +161883,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161915,7 +161916,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -161934,7 +161935,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161942,7 +161943,7 @@ void m68008_device::or_b_adr32_dd_df8() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161984,7 +161985,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162017,11 +162018,11 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -162039,7 +162040,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162047,7 +162048,7 @@ void m68008_device::or_b_dpc_dd_df8() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162087,14 +162088,14 @@ void m68008_device::or_b_dpci_dd_df8() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162102,7 +162103,7 @@ void m68008_device::or_b_dpci_dd_df8() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162136,7 +162137,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162172,11 +162173,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -162194,7 +162195,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162202,7 +162203,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162247,7 +162248,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162281,7 +162282,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162289,7 +162290,7 @@ void m68008_device::or_b_imm8_dd_df8() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162334,7 +162335,7 @@ void m68008_device::or_w_ds_dd_df8() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162342,7 +162343,7 @@ void m68008_device::or_w_ds_dd_df8() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162385,11 +162386,11 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162422,7 +162423,7 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162430,7 +162431,7 @@ void m68008_device::or_w_ais_dd_df8() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162476,12 +162477,12 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -162515,7 +162516,7 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162523,7 +162524,7 @@ void m68008_device::or_w_aips_dd_df8() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162568,7 +162569,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162576,7 +162577,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -162610,7 +162611,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162618,7 +162619,7 @@ void m68008_device::or_w_pais_dd_df8() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162661,7 +162662,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162694,11 +162695,11 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162731,7 +162732,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162739,7 +162740,7 @@ void m68008_device::or_w_das_dd_df8() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162780,14 +162781,14 @@ void m68008_device::or_w_dais_dd_df8() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162795,7 +162796,7 @@ void m68008_device::or_w_dais_dd_df8() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162829,7 +162830,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162865,11 +162866,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162902,7 +162903,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162910,7 +162911,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162955,7 +162956,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162988,7 +162989,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -163022,7 +163023,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163030,7 +163031,7 @@ void m68008_device::or_w_adr16_dd_df8() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163073,7 +163074,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163107,7 +163108,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163140,7 +163141,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -163174,7 +163175,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163182,7 +163183,7 @@ void m68008_device::or_w_adr32_dd_df8() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163224,7 +163225,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163257,11 +163258,11 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163294,7 +163295,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163302,7 +163303,7 @@ void m68008_device::or_w_dpc_dd_df8() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163342,14 +163343,14 @@ void m68008_device::or_w_dpci_dd_df8() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163357,7 +163358,7 @@ void m68008_device::or_w_dpci_dd_df8() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163391,7 +163392,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163427,11 +163428,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163464,7 +163465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163472,7 +163473,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163517,7 +163518,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163551,7 +163552,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163559,7 +163560,7 @@ void m68008_device::or_w_imm16_dd_df8() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163604,12 +163605,12 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163639,7 +163640,7 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -163648,7 +163649,7 @@ void m68008_device::or_l_ds_dd_df8() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163664,7 +163665,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -163699,7 +163700,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163732,12 +163733,12 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163773,7 +163774,7 @@ void m68008_device::or_l_ais_dd_df8() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163789,7 +163790,7 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -163824,11 +163825,11 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163861,12 +163862,12 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163902,7 +163903,7 @@ void m68008_device::or_l_aips_dd_df8() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163917,14 +163918,14 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163958,7 +163959,7 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163991,12 +163992,12 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164032,7 +164033,7 @@ void m68008_device::or_l_pais_dd_df8() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164048,7 +164049,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164080,7 +164081,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -164115,7 +164116,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164148,12 +164149,12 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164189,7 +164190,7 @@ void m68008_device::or_l_das_dd_df8() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164203,14 +164204,14 @@ void m68008_device::or_l_dais_dd_df8() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164218,7 +164219,7 @@ void m68008_device::or_l_dais_dd_df8() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164252,7 +164253,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164287,7 +164288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -164322,7 +164323,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164355,12 +164356,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164396,7 +164397,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164414,7 +164415,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164447,7 +164448,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -164482,7 +164483,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164515,12 +164516,12 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164556,7 +164557,7 @@ void m68008_device::or_l_adr16_dd_df8() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164572,7 +164573,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164606,7 +164607,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164639,7 +164640,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -164674,7 +164675,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164707,12 +164708,12 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164748,7 +164749,7 @@ void m68008_device::or_l_adr32_dd_df8() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164763,7 +164764,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164795,7 +164796,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164830,7 +164831,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164863,12 +164864,12 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164904,7 +164905,7 @@ void m68008_device::or_l_dpc_dd_df8() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164917,14 +164918,14 @@ void m68008_device::or_l_dpci_dd_df8() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164932,7 +164933,7 @@ void m68008_device::or_l_dpci_dd_df8() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164966,7 +164967,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165001,7 +165002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165036,7 +165037,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165069,12 +165070,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165110,7 +165111,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -165126,7 +165127,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165160,7 +165161,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165194,12 +165195,12 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165229,7 +165230,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -165238,7 +165239,7 @@ void m68008_device::or_l_imm32_dd_df8() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -165256,13 +165257,13 @@ void m68008_device::divu_w_ds_dd_df8() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -165275,7 +165276,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165293,7 +165294,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -165301,7 +165302,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -165336,7 +165337,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -165369,7 +165370,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -165540,7 +165541,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165580,7 +165581,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -165591,7 +165592,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -165603,7 +165604,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -165623,7 +165624,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -165634,7 +165635,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -165644,13 +165645,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165661,7 +165662,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -165671,7 +165672,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -165679,7 +165680,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165724,7 +165725,7 @@ void m68008_device::divu_w_ais_dd_df8() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165760,13 +165761,13 @@ void m68008_device::divu_w_ais_dd_df8() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -165779,7 +165780,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165797,7 +165798,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -165805,7 +165806,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -165840,7 +165841,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -165873,7 +165874,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166044,7 +166045,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166084,7 +166085,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166095,7 +166096,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166107,7 +166108,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166127,7 +166128,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -166138,7 +166139,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166148,13 +166149,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166165,7 +166166,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -166175,7 +166176,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -166183,7 +166184,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166234,7 +166235,7 @@ void m68008_device::divu_w_aips_dd_df8() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -166268,13 +166269,13 @@ void m68008_device::divu_w_aips_dd_df8() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -166287,7 +166288,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166305,7 +166306,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -166313,7 +166314,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166348,7 +166349,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166381,7 +166382,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166552,7 +166553,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166592,7 +166593,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166603,7 +166604,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166615,7 +166616,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166635,7 +166636,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -166646,7 +166647,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166656,13 +166657,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166673,7 +166674,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -166683,7 +166684,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -166691,7 +166692,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166744,7 +166745,7 @@ void m68008_device::divu_w_pais_dd_df8() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -166778,13 +166779,13 @@ void m68008_device::divu_w_pais_dd_df8() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -166797,7 +166798,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166815,7 +166816,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -166823,7 +166824,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166858,7 +166859,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -166891,7 +166892,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -167062,7 +167063,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167102,7 +167103,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167113,7 +167114,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167125,7 +167126,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167145,7 +167146,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -167156,7 +167157,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167166,13 +167167,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167183,7 +167184,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -167193,7 +167194,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -167201,7 +167202,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167278,7 +167279,7 @@ void m68008_device::divu_w_das_dd_df8() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167314,13 +167315,13 @@ void m68008_device::divu_w_das_dd_df8() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -167333,7 +167334,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167351,7 +167352,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -167359,7 +167360,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -167394,7 +167395,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -167427,7 +167428,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -167598,7 +167599,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167638,7 +167639,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167649,7 +167650,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167661,7 +167662,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167681,7 +167682,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -167692,7 +167693,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167702,13 +167703,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167719,7 +167720,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -167729,7 +167730,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -167737,7 +167738,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167780,7 +167781,7 @@ void m68008_device::divu_w_dais_dd_df8() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167862,7 +167863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167898,13 +167899,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -167917,7 +167918,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167935,7 +167936,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -167943,7 +167944,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -167978,7 +167979,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -168011,7 +168012,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -168182,7 +168183,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168222,7 +168223,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168233,7 +168234,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168245,7 +168246,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168265,7 +168266,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -168276,7 +168277,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168286,13 +168287,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168303,7 +168304,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -168313,7 +168314,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -168321,7 +168322,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168399,7 +168400,7 @@ void m68008_device::divu_w_adr16_dd_df8() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -168433,13 +168434,13 @@ void m68008_device::divu_w_adr16_dd_df8() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -168452,7 +168453,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168470,7 +168471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -168478,7 +168479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -168513,7 +168514,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -168546,7 +168547,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -168717,7 +168718,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168757,7 +168758,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168768,7 +168769,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168780,7 +168781,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168800,7 +168801,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -168811,7 +168812,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168821,13 +168822,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168838,7 +168839,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -168848,7 +168849,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -168856,7 +168857,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168965,7 +168966,7 @@ void m68008_device::divu_w_adr32_dd_df8() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -168999,13 +169000,13 @@ void m68008_device::divu_w_adr32_dd_df8() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -169018,7 +169019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169036,7 +169037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -169044,7 +169045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169079,7 +169080,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169112,7 +169113,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169283,7 +169284,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169323,7 +169324,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169334,7 +169335,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169346,7 +169347,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169366,7 +169367,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -169377,7 +169378,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169387,13 +169388,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169404,7 +169405,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -169414,7 +169415,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -169422,7 +169423,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169498,7 +169499,7 @@ void m68008_device::divu_w_dpc_dd_df8() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169534,13 +169535,13 @@ void m68008_device::divu_w_dpc_dd_df8() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -169553,7 +169554,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169571,7 +169572,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -169579,7 +169580,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169614,7 +169615,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169647,7 +169648,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -169818,7 +169819,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169858,7 +169859,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169869,7 +169870,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169881,7 +169882,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169901,7 +169902,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -169912,7 +169913,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169922,13 +169923,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169939,7 +169940,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -169949,7 +169950,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -169957,7 +169958,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169999,7 +170000,7 @@ void m68008_device::divu_w_dpci_dd_df8() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170081,7 +170082,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170117,13 +170118,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -170136,7 +170137,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170154,7 +170155,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -170162,7 +170163,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170197,7 +170198,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170230,7 +170231,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170401,7 +170402,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170441,7 +170442,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170452,7 +170453,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170464,7 +170465,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170484,7 +170485,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -170495,7 +170496,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170505,13 +170506,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170522,7 +170523,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -170532,7 +170533,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -170540,7 +170541,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170620,13 +170621,13 @@ void m68008_device::divu_w_imm16_dd_df8() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -170639,7 +170640,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170657,7 +170658,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -170665,7 +170666,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170700,7 +170701,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170733,7 +170734,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -170904,7 +170905,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170944,7 +170945,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170955,7 +170956,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170967,7 +170968,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170987,7 +170988,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -170998,7 +170999,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -171008,13 +171009,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -171025,7 +171026,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -171035,7 +171036,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -171043,7 +171044,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171090,12 +171091,12 @@ void m68008_device::sbcd_ds_dd_df8() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171150,7 +171151,7 @@ void m68008_device::sbcd_pais_paid_df8() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -171186,12 +171187,12 @@ void m68008_device::sbcd_pais_paid_df8() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171251,11 +171252,11 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -171273,7 +171274,7 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171310,7 +171311,7 @@ void m68008_device::or_b_dd_ais_df8() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171339,12 +171340,12 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -171363,7 +171364,7 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171400,7 +171401,7 @@ void m68008_device::or_b_dd_aips_df8() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171428,7 +171429,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -171436,7 +171437,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -171455,7 +171456,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171492,7 +171493,7 @@ void m68008_device::or_b_dd_pais_df8() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171518,7 +171519,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171551,11 +171552,11 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -171573,7 +171574,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171610,7 +171611,7 @@ void m68008_device::or_b_dd_das_df8() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171634,14 +171635,14 @@ void m68008_device::or_b_dd_dais_df8() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -171649,7 +171650,7 @@ void m68008_device::or_b_dd_dais_df8() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171683,7 +171684,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171719,11 +171720,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -171741,7 +171742,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171778,7 +171779,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171806,7 +171807,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171839,7 +171840,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -171858,7 +171859,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171895,7 +171896,7 @@ void m68008_device::or_b_dd_adr16_df8() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -171921,7 +171922,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171955,7 +171956,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171988,7 +171989,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -172007,7 +172008,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172044,7 +172045,7 @@ void m68008_device::or_b_dd_adr32_df8() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -172070,11 +172071,11 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172107,7 +172108,7 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172144,7 +172145,7 @@ void m68008_device::or_w_dd_ais_df8() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172188,12 +172189,12 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -172227,7 +172228,7 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172264,7 +172265,7 @@ void m68008_device::or_w_dd_aips_df8() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172307,7 +172308,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -172315,7 +172316,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -172349,7 +172350,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172386,7 +172387,7 @@ void m68008_device::or_w_dd_pais_df8() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172427,7 +172428,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172460,11 +172461,11 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172497,7 +172498,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172534,7 +172535,7 @@ void m68008_device::or_w_dd_das_df8() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172573,14 +172574,14 @@ void m68008_device::or_w_dd_dais_df8() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -172588,7 +172589,7 @@ void m68008_device::or_w_dd_dais_df8() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172622,7 +172623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172658,11 +172659,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172695,7 +172696,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172732,7 +172733,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172775,7 +172776,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172808,7 +172809,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -172842,7 +172843,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172879,7 +172880,7 @@ void m68008_device::or_w_dd_adr16_df8() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172920,7 +172921,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172954,7 +172955,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172987,7 +172988,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -173021,7 +173022,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173058,7 +173059,7 @@ void m68008_device::or_w_dd_adr32_df8() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173099,7 +173100,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -173134,7 +173135,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173167,7 +173168,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173202,7 +173203,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173237,7 +173238,7 @@ void m68008_device::or_l_dd_ais_df8() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173278,7 +173279,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -173313,11 +173314,11 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173350,7 +173351,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173385,7 +173386,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173420,7 +173421,7 @@ void m68008_device::or_l_dd_aips_df8() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173460,14 +173461,14 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173501,7 +173502,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173534,7 +173535,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173569,7 +173570,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173604,7 +173605,7 @@ void m68008_device::or_l_dd_pais_df8() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173645,7 +173646,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173677,7 +173678,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -173712,7 +173713,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173745,7 +173746,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173815,7 +173816,7 @@ void m68008_device::or_l_dd_das_df8() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173854,14 +173855,14 @@ void m68008_device::or_l_dd_dais_df8() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -173869,7 +173870,7 @@ void m68008_device::or_l_dd_dais_df8() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173903,7 +173904,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173938,7 +173939,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -173973,7 +173974,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174006,7 +174007,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174041,7 +174042,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174076,7 +174077,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174119,7 +174120,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174152,7 +174153,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -174187,7 +174188,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174220,7 +174221,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174255,7 +174256,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174290,7 +174291,7 @@ void m68008_device::or_l_dd_adr16_df8() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174331,7 +174332,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174365,7 +174366,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174398,7 +174399,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -174433,7 +174434,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174466,7 +174467,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174501,7 +174502,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174536,7 +174537,7 @@ void m68008_device::or_l_dd_adr32_df8() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174579,13 +174580,13 @@ void m68008_device::divs_w_ds_dd_df8() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -174599,7 +174600,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174609,7 +174610,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174624,7 +174625,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -174632,7 +174633,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -174667,7 +174668,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -174700,7 +174701,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -174866,7 +174867,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -174875,7 +174876,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -174883,12 +174884,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174896,7 +174897,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174913,7 +174914,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -174921,7 +174922,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174961,7 +174962,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174988,13 +174989,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175002,27 +175003,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175034,7 +175035,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175046,7 +175047,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175061,7 +175062,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175070,7 +175071,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175078,7 +175079,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175088,7 +175089,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175097,7 +175098,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175109,7 +175110,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175167,7 +175168,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -175180,7 +175181,7 @@ void m68008_device::divs_w_ais_dd_df8() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -175216,13 +175217,13 @@ void m68008_device::divs_w_ais_dd_df8() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175236,7 +175237,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175246,7 +175247,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175261,7 +175262,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -175269,7 +175270,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -175304,7 +175305,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -175337,7 +175338,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -175503,7 +175504,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -175512,7 +175513,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -175520,12 +175521,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175533,7 +175534,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175550,7 +175551,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -175558,7 +175559,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175598,7 +175599,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175625,13 +175626,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175639,27 +175640,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175671,7 +175672,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175683,7 +175684,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175698,7 +175699,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175707,7 +175708,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175715,7 +175716,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175725,7 +175726,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175734,7 +175735,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175746,7 +175747,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175804,7 +175805,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -175823,7 +175824,7 @@ void m68008_device::divs_w_aips_dd_df8() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -175857,13 +175858,13 @@ void m68008_device::divs_w_aips_dd_df8() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175877,7 +175878,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175887,7 +175888,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175902,7 +175903,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -175910,7 +175911,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -175945,7 +175946,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -175978,7 +175979,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -176144,7 +176145,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -176153,7 +176154,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -176161,12 +176162,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176174,7 +176175,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176191,7 +176192,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -176199,7 +176200,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176239,7 +176240,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176266,13 +176267,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176280,27 +176281,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176312,7 +176313,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176324,7 +176325,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176339,7 +176340,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176348,7 +176349,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176356,7 +176357,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -176366,7 +176367,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176375,7 +176376,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176387,7 +176388,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -176445,7 +176446,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -176466,7 +176467,7 @@ void m68008_device::divs_w_pais_dd_df8() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -176500,13 +176501,13 @@ void m68008_device::divs_w_pais_dd_df8() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176520,7 +176521,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176530,7 +176531,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176545,7 +176546,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -176553,7 +176554,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -176588,7 +176589,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -176621,7 +176622,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -176787,7 +176788,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -176796,7 +176797,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -176804,12 +176805,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176817,7 +176818,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176834,7 +176835,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -176842,7 +176843,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176909,13 +176910,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176923,27 +176924,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176955,7 +176956,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176967,7 +176968,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176982,7 +176983,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176991,7 +176992,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176999,7 +177000,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177009,7 +177010,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177018,7 +177019,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177030,7 +177031,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177088,7 +177089,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -177133,7 +177134,7 @@ void m68008_device::divs_w_das_dd_df8() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -177169,13 +177170,13 @@ void m68008_device::divs_w_das_dd_df8() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177189,7 +177190,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177199,7 +177200,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177214,7 +177215,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -177222,7 +177223,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -177257,7 +177258,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -177290,7 +177291,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -177456,7 +177457,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -177465,7 +177466,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -177473,12 +177474,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177486,7 +177487,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177503,7 +177504,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -177511,7 +177512,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177551,7 +177552,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177578,13 +177579,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177592,27 +177593,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177624,7 +177625,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177636,7 +177637,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177651,7 +177652,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177660,7 +177661,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177668,7 +177669,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177678,7 +177679,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177687,7 +177688,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177699,7 +177700,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177757,7 +177758,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -177768,7 +177769,7 @@ void m68008_device::divs_w_dais_dd_df8() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -177850,7 +177851,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -177886,13 +177887,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177906,7 +177907,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177916,7 +177917,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177931,7 +177932,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -177939,7 +177940,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -177974,7 +177975,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -178007,7 +178008,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -178173,7 +178174,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -178182,7 +178183,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -178190,12 +178191,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178203,7 +178204,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178220,7 +178221,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -178228,7 +178229,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178268,7 +178269,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178295,13 +178296,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178309,27 +178310,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178341,7 +178342,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178353,7 +178354,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178368,7 +178369,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -178377,7 +178378,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178385,7 +178386,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -178395,7 +178396,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178404,7 +178405,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -178416,7 +178417,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -178474,7 +178475,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -178520,7 +178521,7 @@ void m68008_device::divs_w_adr16_dd_df8() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -178554,13 +178555,13 @@ void m68008_device::divs_w_adr16_dd_df8() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178574,7 +178575,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178584,7 +178585,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178599,7 +178600,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -178607,7 +178608,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -178642,7 +178643,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -178675,7 +178676,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -178841,7 +178842,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -178850,7 +178851,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -178858,12 +178859,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178871,7 +178872,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178888,7 +178889,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -178896,7 +178897,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178936,7 +178937,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178963,13 +178964,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178977,27 +178978,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179009,7 +179010,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179021,7 +179022,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179036,7 +179037,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179045,7 +179046,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179053,7 +179054,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179063,7 +179064,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179072,7 +179073,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179084,7 +179085,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179142,7 +179143,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -179219,7 +179220,7 @@ void m68008_device::divs_w_adr32_dd_df8() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -179253,13 +179254,13 @@ void m68008_device::divs_w_adr32_dd_df8() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179273,7 +179274,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179283,7 +179284,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179298,7 +179299,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -179306,7 +179307,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -179341,7 +179342,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -179374,7 +179375,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -179540,7 +179541,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -179549,7 +179550,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -179557,12 +179558,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -179570,7 +179571,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179587,7 +179588,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -179595,7 +179596,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179635,7 +179636,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -179662,13 +179663,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179676,27 +179677,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179708,7 +179709,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179720,7 +179721,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179735,7 +179736,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179744,7 +179745,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179752,7 +179753,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179762,7 +179763,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179771,7 +179772,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179783,7 +179784,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179841,7 +179842,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -179885,7 +179886,7 @@ void m68008_device::divs_w_dpc_dd_df8() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179921,13 +179922,13 @@ void m68008_device::divs_w_dpc_dd_df8() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179941,7 +179942,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179951,7 +179952,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179966,7 +179967,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -179974,7 +179975,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180009,7 +180010,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180042,7 +180043,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180208,7 +180209,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -180217,7 +180218,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -180225,12 +180226,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180238,7 +180239,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180255,7 +180256,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -180263,7 +180264,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180303,7 +180304,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180330,13 +180331,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180344,27 +180345,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180376,7 +180377,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180388,7 +180389,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180403,7 +180404,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -180412,7 +180413,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180420,7 +180421,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -180430,7 +180431,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180439,7 +180440,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -180451,7 +180452,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -180509,7 +180510,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -180519,7 +180520,7 @@ void m68008_device::divs_w_dpci_dd_df8() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -180601,7 +180602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180637,13 +180638,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180657,7 +180658,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180667,7 +180668,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180682,7 +180683,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -180690,7 +180691,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180725,7 +180726,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180758,7 +180759,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -180924,7 +180925,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -180933,7 +180934,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -180941,12 +180942,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180954,7 +180955,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180971,7 +180972,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -180979,7 +180980,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181019,7 +181020,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181046,13 +181047,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181060,27 +181061,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181092,7 +181093,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181104,7 +181105,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181119,7 +181120,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181128,7 +181129,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181136,7 +181137,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181146,7 +181147,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181155,7 +181156,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181167,7 +181168,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181225,7 +181226,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -181273,13 +181274,13 @@ void m68008_device::divs_w_imm16_dd_df8() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181293,7 +181294,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181303,7 +181304,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181318,7 +181319,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -181326,7 +181327,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -181361,7 +181362,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -181394,7 +181395,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -181560,7 +181561,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -181569,7 +181570,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -181577,12 +181578,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181590,7 +181591,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181607,7 +181608,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -181615,7 +181616,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181655,7 +181656,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181682,13 +181683,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181696,27 +181697,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181728,7 +181729,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181740,7 +181741,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181755,7 +181756,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181764,7 +181765,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181772,7 +181773,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181782,7 +181783,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181791,7 +181792,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181803,7 +181804,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181861,7 +181862,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -181876,7 +181877,7 @@ void m68008_device::sub_b_ds_dd_df8() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -181926,7 +181927,7 @@ void m68008_device::sub_b_ais_dd_df8() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181947,7 +181948,7 @@ void m68008_device::sub_b_ais_dd_df8() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182003,7 +182004,7 @@ void m68008_device::sub_b_aips_dd_df8() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -182022,7 +182023,7 @@ void m68008_device::sub_b_aips_dd_df8() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182080,7 +182081,7 @@ void m68008_device::sub_b_pais_dd_df8() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -182099,7 +182100,7 @@ void m68008_device::sub_b_pais_dd_df8() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182181,7 +182182,7 @@ void m68008_device::sub_b_das_dd_df8() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182202,7 +182203,7 @@ void m68008_device::sub_b_das_dd_df8() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182250,7 +182251,7 @@ void m68008_device::sub_b_dais_dd_df8() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182332,7 +182333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182353,7 +182354,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182436,7 +182437,7 @@ void m68008_device::sub_b_adr16_dd_df8() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -182455,7 +182456,7 @@ void m68008_device::sub_b_adr16_dd_df8() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182569,7 +182570,7 @@ void m68008_device::sub_b_adr32_dd_df8() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -182588,7 +182589,7 @@ void m68008_device::sub_b_adr32_dd_df8() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182669,7 +182670,7 @@ void m68008_device::sub_b_dpc_dd_df8() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182690,7 +182691,7 @@ void m68008_device::sub_b_dpc_dd_df8() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182737,7 +182738,7 @@ void m68008_device::sub_b_dpci_dd_df8() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182819,7 +182820,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182840,7 +182841,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182925,7 +182926,7 @@ void m68008_device::sub_b_imm8_dd_df8() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182977,7 +182978,7 @@ void m68008_device::sub_w_ds_dd_df8() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183029,7 +183030,7 @@ void m68008_device::sub_w_as_dd_df8() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183079,7 +183080,7 @@ void m68008_device::sub_w_ais_dd_df8() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183115,7 +183116,7 @@ void m68008_device::sub_w_ais_dd_df8() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183171,7 +183172,7 @@ void m68008_device::sub_w_aips_dd_df8() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -183205,7 +183206,7 @@ void m68008_device::sub_w_aips_dd_df8() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183263,7 +183264,7 @@ void m68008_device::sub_w_pais_dd_df8() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -183297,7 +183298,7 @@ void m68008_device::sub_w_pais_dd_df8() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183379,7 +183380,7 @@ void m68008_device::sub_w_das_dd_df8() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183415,7 +183416,7 @@ void m68008_device::sub_w_das_dd_df8() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183463,7 +183464,7 @@ void m68008_device::sub_w_dais_dd_df8() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183545,7 +183546,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183581,7 +183582,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183664,7 +183665,7 @@ void m68008_device::sub_w_adr16_dd_df8() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -183698,7 +183699,7 @@ void m68008_device::sub_w_adr16_dd_df8() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183812,7 +183813,7 @@ void m68008_device::sub_w_adr32_dd_df8() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -183846,7 +183847,7 @@ void m68008_device::sub_w_adr32_dd_df8() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183927,7 +183928,7 @@ void m68008_device::sub_w_dpc_dd_df8() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183963,7 +183964,7 @@ void m68008_device::sub_w_dpc_dd_df8() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184010,7 +184011,7 @@ void m68008_device::sub_w_dpci_dd_df8() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -184092,7 +184093,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -184128,7 +184129,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184213,7 +184214,7 @@ void m68008_device::sub_w_imm16_dd_df8() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184265,7 +184266,7 @@ void m68008_device::sub_l_ds_dd_df8() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -184299,7 +184300,7 @@ void m68008_device::sub_l_ds_dd_df8() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -184325,7 +184326,7 @@ void m68008_device::sub_l_as_dd_df8() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -184359,7 +184360,7 @@ void m68008_device::sub_l_as_dd_df8() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -184383,7 +184384,7 @@ void m68008_device::sub_l_ais_dd_df8() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -184450,12 +184451,12 @@ void m68008_device::sub_l_ais_dd_df8() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184506,7 +184507,7 @@ void m68008_device::sub_l_aips_dd_df8() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -184576,12 +184577,12 @@ void m68008_device::sub_l_aips_dd_df8() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184631,7 +184632,7 @@ void m68008_device::sub_l_pais_dd_df8() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -184703,12 +184704,12 @@ void m68008_device::sub_l_pais_dd_df8() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184790,7 +184791,7 @@ void m68008_device::sub_l_das_dd_df8() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -184857,12 +184858,12 @@ void m68008_device::sub_l_das_dd_df8() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184911,7 +184912,7 @@ void m68008_device::sub_l_dais_dd_df8() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -184992,7 +184993,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -185059,12 +185060,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185148,7 +185149,7 @@ void m68008_device::sub_l_adr16_dd_df8() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -185215,12 +185216,12 @@ void m68008_device::sub_l_adr16_dd_df8() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185335,7 +185336,7 @@ void m68008_device::sub_l_adr32_dd_df8() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -185402,12 +185403,12 @@ void m68008_device::sub_l_adr32_dd_df8() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185488,7 +185489,7 @@ void m68008_device::sub_l_dpc_dd_df8() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -185555,12 +185556,12 @@ void m68008_device::sub_l_dpc_dd_df8() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185608,7 +185609,7 @@ void m68008_device::sub_l_dpci_dd_df8() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -185689,7 +185690,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -185756,12 +185757,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185878,7 +185879,7 @@ void m68008_device::sub_l_imm32_dd_df8() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -185912,7 +185913,7 @@ void m68008_device::sub_l_imm32_dd_df8() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -185938,7 +185939,7 @@ void m68008_device::suba_w_ds_ad_df8() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -185971,7 +185972,7 @@ void m68008_device::suba_w_ds_ad_df8() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -185996,7 +185997,7 @@ void m68008_device::suba_w_as_ad_df8() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186029,7 +186030,7 @@ void m68008_device::suba_w_as_ad_df8() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186052,7 +186053,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186088,7 +186089,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186121,7 +186122,7 @@ void m68008_device::suba_w_ais_ad_df8() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186150,7 +186151,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -186184,7 +186185,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186217,7 +186218,7 @@ void m68008_device::suba_w_aips_ad_df8() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186248,7 +186249,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -186282,7 +186283,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186315,7 +186316,7 @@ void m68008_device::suba_w_pais_ad_df8() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186370,7 +186371,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186406,7 +186407,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186439,7 +186440,7 @@ void m68008_device::suba_w_das_ad_df8() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186460,7 +186461,7 @@ void m68008_device::suba_w_dais_ad_df8() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -186542,7 +186543,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186578,7 +186579,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186611,7 +186612,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186667,7 +186668,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -186701,7 +186702,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186734,7 +186735,7 @@ void m68008_device::suba_w_adr16_ad_df8() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186821,7 +186822,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -186855,7 +186856,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186888,7 +186889,7 @@ void m68008_device::suba_w_adr32_ad_df8() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186942,7 +186943,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186978,7 +186979,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187011,7 +187012,7 @@ void m68008_device::suba_w_dpc_ad_df8() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187031,7 +187032,7 @@ void m68008_device::suba_w_dpci_ad_df8() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187113,7 +187114,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -187149,7 +187150,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187182,7 +187183,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187240,7 +187241,7 @@ void m68008_device::suba_w_imm16_ad_df8() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187273,7 +187274,7 @@ void m68008_device::suba_w_imm16_ad_df8() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187298,7 +187299,7 @@ void m68008_device::subx_b_ds_dd_df8() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -187354,7 +187355,7 @@ void m68008_device::subx_b_pais_paid_df8() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -187391,7 +187392,7 @@ void m68008_device::subx_b_pais_paid_df8() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187453,7 +187454,7 @@ void m68008_device::sub_b_dd_ais_df8() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187474,7 +187475,7 @@ void m68008_device::sub_b_dd_ais_df8() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187542,7 +187543,7 @@ void m68008_device::sub_b_dd_aips_df8() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -187561,7 +187562,7 @@ void m68008_device::sub_b_dd_aips_df8() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187631,7 +187632,7 @@ void m68008_device::sub_b_dd_pais_df8() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -187650,7 +187651,7 @@ void m68008_device::sub_b_dd_pais_df8() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187744,7 +187745,7 @@ void m68008_device::sub_b_dd_das_df8() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187765,7 +187766,7 @@ void m68008_device::sub_b_dd_das_df8() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187825,7 +187826,7 @@ void m68008_device::sub_b_dd_dais_df8() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187907,7 +187908,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187928,7 +187929,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188023,7 +188024,7 @@ void m68008_device::sub_b_dd_adr16_df8() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -188042,7 +188043,7 @@ void m68008_device::sub_b_dd_adr16_df8() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188168,7 +188169,7 @@ void m68008_device::sub_b_dd_adr32_df8() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -188187,7 +188188,7 @@ void m68008_device::sub_b_dd_adr32_df8() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188251,7 +188252,7 @@ void m68008_device::subx_w_ds_dd_df8() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -188307,7 +188308,7 @@ void m68008_device::subx_w_pais_paid_df8() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -188374,7 +188375,7 @@ void m68008_device::subx_w_pais_paid_df8() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188451,7 +188452,7 @@ void m68008_device::sub_w_dd_ais_df8() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188487,7 +188488,7 @@ void m68008_device::sub_w_dd_ais_df8() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188570,7 +188571,7 @@ void m68008_device::sub_w_dd_aips_df8() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188604,7 +188605,7 @@ void m68008_device::sub_w_dd_aips_df8() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188689,7 +188690,7 @@ void m68008_device::sub_w_dd_pais_df8() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188723,7 +188724,7 @@ void m68008_device::sub_w_dd_pais_df8() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188832,7 +188833,7 @@ void m68008_device::sub_w_dd_das_df8() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188868,7 +188869,7 @@ void m68008_device::sub_w_dd_das_df8() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188943,7 +188944,7 @@ void m68008_device::sub_w_dd_dais_df8() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189025,7 +189026,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189061,7 +189062,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189171,7 +189172,7 @@ void m68008_device::sub_w_dd_adr16_df8() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189205,7 +189206,7 @@ void m68008_device::sub_w_dd_adr16_df8() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189346,7 +189347,7 @@ void m68008_device::sub_w_dd_adr32_df8() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189380,7 +189381,7 @@ void m68008_device::sub_w_dd_adr32_df8() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189459,7 +189460,7 @@ void m68008_device::subx_l_ds_dd_df8() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -189493,7 +189494,7 @@ void m68008_device::subx_l_ds_dd_df8() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -189554,7 +189555,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -189621,7 +189622,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -189685,7 +189686,7 @@ void m68008_device::subx_l_pais_paid_df8() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189762,7 +189763,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189829,7 +189830,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189864,7 +189865,7 @@ void m68008_device::sub_l_dd_ais_df8() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -189939,7 +189940,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -190009,7 +190010,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190044,7 +190045,7 @@ void m68008_device::sub_l_dd_aips_df8() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190118,7 +190119,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190190,7 +190191,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190225,7 +190226,7 @@ void m68008_device::sub_l_dd_pais_df8() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190331,7 +190332,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -190398,7 +190399,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190433,7 +190434,7 @@ void m68008_device::sub_l_dd_das_df8() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190506,7 +190507,7 @@ void m68008_device::sub_l_dd_dais_df8() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190587,7 +190588,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -190654,7 +190655,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190689,7 +190690,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190797,7 +190798,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -190864,7 +190865,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190899,7 +190900,7 @@ void m68008_device::sub_l_dd_adr16_df8() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -191038,7 +191039,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -191105,7 +191106,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191140,7 +191141,7 @@ void m68008_device::sub_l_dd_adr32_df8() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -191217,7 +191218,7 @@ void m68008_device::suba_l_ds_ad_df8() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -191250,7 +191251,7 @@ void m68008_device::suba_l_ds_ad_df8() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191275,7 +191276,7 @@ void m68008_device::suba_l_as_ad_df8() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -191308,7 +191309,7 @@ void m68008_device::suba_l_as_ad_df8() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191331,7 +191332,7 @@ void m68008_device::suba_l_ais_ad_df8() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -191398,11 +191399,11 @@ void m68008_device::suba_l_ais_ad_df8() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -191452,7 +191453,7 @@ void m68008_device::suba_l_aips_ad_df8() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -191522,11 +191523,11 @@ void m68008_device::suba_l_aips_ad_df8() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -191575,7 +191576,7 @@ void m68008_device::suba_l_pais_ad_df8() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -191647,11 +191648,11 @@ void m68008_device::suba_l_pais_ad_df8() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -191732,7 +191733,7 @@ void m68008_device::suba_l_das_ad_df8() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -191799,11 +191800,11 @@ void m68008_device::suba_l_das_ad_df8() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -191851,7 +191852,7 @@ void m68008_device::suba_l_dais_ad_df8() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191932,7 +191933,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -191999,11 +192000,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192086,7 +192087,7 @@ void m68008_device::suba_l_adr16_ad_df8() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -192153,11 +192154,11 @@ void m68008_device::suba_l_adr16_ad_df8() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192271,7 +192272,7 @@ void m68008_device::suba_l_adr32_ad_df8() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -192338,11 +192339,11 @@ void m68008_device::suba_l_adr32_ad_df8() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192422,7 +192423,7 @@ void m68008_device::suba_l_dpc_ad_df8() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192489,11 +192490,11 @@ void m68008_device::suba_l_dpc_ad_df8() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192540,7 +192541,7 @@ void m68008_device::suba_l_dpci_ad_df8() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -192621,7 +192622,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192688,11 +192689,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -192808,7 +192809,7 @@ void m68008_device::suba_l_imm32_ad_df8() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -192841,7 +192842,7 @@ void m68008_device::suba_l_imm32_ad_df8() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192866,7 +192867,7 @@ void m68008_device::cmp_b_ds_dd_df8() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -192915,7 +192916,7 @@ void m68008_device::cmp_b_ais_dd_df8() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192936,7 +192937,7 @@ void m68008_device::cmp_b_ais_dd_df8() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -192991,7 +192992,7 @@ void m68008_device::cmp_b_aips_dd_df8() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -193010,7 +193011,7 @@ void m68008_device::cmp_b_aips_dd_df8() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193067,7 +193068,7 @@ void m68008_device::cmp_b_pais_dd_df8() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -193086,7 +193087,7 @@ void m68008_device::cmp_b_pais_dd_df8() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193167,7 +193168,7 @@ void m68008_device::cmp_b_das_dd_df8() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193188,7 +193189,7 @@ void m68008_device::cmp_b_das_dd_df8() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193235,7 +193236,7 @@ void m68008_device::cmp_b_dais_dd_df8() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193317,7 +193318,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193338,7 +193339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193420,7 +193421,7 @@ void m68008_device::cmp_b_adr16_dd_df8() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -193439,7 +193440,7 @@ void m68008_device::cmp_b_adr16_dd_df8() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193552,7 +193553,7 @@ void m68008_device::cmp_b_adr32_dd_df8() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -193571,7 +193572,7 @@ void m68008_device::cmp_b_adr32_dd_df8() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193651,7 +193652,7 @@ void m68008_device::cmp_b_dpc_dd_df8() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193672,7 +193673,7 @@ void m68008_device::cmp_b_dpc_dd_df8() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193718,7 +193719,7 @@ void m68008_device::cmp_b_dpci_dd_df8() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193800,7 +193801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193821,7 +193822,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193905,7 +193906,7 @@ void m68008_device::cmp_b_imm8_dd_df8() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193956,7 +193957,7 @@ void m68008_device::cmp_w_ds_dd_df8() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194007,7 +194008,7 @@ void m68008_device::cmp_w_as_dd_df8() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194056,7 +194057,7 @@ void m68008_device::cmp_w_ais_dd_df8() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194092,7 +194093,7 @@ void m68008_device::cmp_w_ais_dd_df8() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194147,7 +194148,7 @@ void m68008_device::cmp_w_aips_dd_df8() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -194181,7 +194182,7 @@ void m68008_device::cmp_w_aips_dd_df8() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194238,7 +194239,7 @@ void m68008_device::cmp_w_pais_dd_df8() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -194272,7 +194273,7 @@ void m68008_device::cmp_w_pais_dd_df8() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194353,7 +194354,7 @@ void m68008_device::cmp_w_das_dd_df8() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194389,7 +194390,7 @@ void m68008_device::cmp_w_das_dd_df8() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194436,7 +194437,7 @@ void m68008_device::cmp_w_dais_dd_df8() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194518,7 +194519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194554,7 +194555,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194636,7 +194637,7 @@ void m68008_device::cmp_w_adr16_dd_df8() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -194670,7 +194671,7 @@ void m68008_device::cmp_w_adr16_dd_df8() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194783,7 +194784,7 @@ void m68008_device::cmp_w_adr32_dd_df8() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -194817,7 +194818,7 @@ void m68008_device::cmp_w_adr32_dd_df8() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194897,7 +194898,7 @@ void m68008_device::cmp_w_dpc_dd_df8() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194933,7 +194934,7 @@ void m68008_device::cmp_w_dpc_dd_df8() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194979,7 +194980,7 @@ void m68008_device::cmp_w_dpci_dd_df8() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -195061,7 +195062,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195097,7 +195098,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -195181,7 +195182,7 @@ void m68008_device::cmp_w_imm16_dd_df8() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -195232,11 +195233,11 @@ void m68008_device::cmp_l_ds_dd_df8() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195288,11 +195289,11 @@ void m68008_device::cmp_l_as_dd_df8() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195342,7 +195343,7 @@ void m68008_device::cmp_l_ais_dd_df8() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -195409,11 +195410,11 @@ void m68008_device::cmp_l_ais_dd_df8() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195463,7 +195464,7 @@ void m68008_device::cmp_l_aips_dd_df8() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -195533,11 +195534,11 @@ void m68008_device::cmp_l_aips_dd_df8() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195586,7 +195587,7 @@ void m68008_device::cmp_l_pais_dd_df8() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195658,11 +195659,11 @@ void m68008_device::cmp_l_pais_dd_df8() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195743,7 +195744,7 @@ void m68008_device::cmp_l_das_dd_df8() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -195810,11 +195811,11 @@ void m68008_device::cmp_l_das_dd_df8() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195862,7 +195863,7 @@ void m68008_device::cmp_l_dais_dd_df8() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195943,7 +195944,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -196010,11 +196011,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196097,7 +196098,7 @@ void m68008_device::cmp_l_adr16_dd_df8() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -196164,11 +196165,11 @@ void m68008_device::cmp_l_adr16_dd_df8() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196282,7 +196283,7 @@ void m68008_device::cmp_l_adr32_dd_df8() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -196349,11 +196350,11 @@ void m68008_device::cmp_l_adr32_dd_df8() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196433,7 +196434,7 @@ void m68008_device::cmp_l_dpc_dd_df8() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -196500,11 +196501,11 @@ void m68008_device::cmp_l_dpc_dd_df8() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196551,7 +196552,7 @@ void m68008_device::cmp_l_dpci_dd_df8() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196632,7 +196633,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -196699,11 +196700,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196819,11 +196820,11 @@ void m68008_device::cmp_l_imm32_dd_df8() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196875,11 +196876,11 @@ void m68008_device::cmpa_w_ds_ad_df8() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196931,11 +196932,11 @@ void m68008_device::cmpa_w_as_ad_df8() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196985,7 +196986,7 @@ void m68008_device::cmpa_w_ais_ad_df8() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197021,11 +197022,11 @@ void m68008_device::cmpa_w_ais_ad_df8() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197081,7 +197082,7 @@ void m68008_device::cmpa_w_aips_ad_df8() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -197115,11 +197116,11 @@ void m68008_device::cmpa_w_aips_ad_df8() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197177,7 +197178,7 @@ void m68008_device::cmpa_w_pais_ad_df8() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -197211,11 +197212,11 @@ void m68008_device::cmpa_w_pais_ad_df8() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197297,7 +197298,7 @@ void m68008_device::cmpa_w_das_ad_df8() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197333,11 +197334,11 @@ void m68008_device::cmpa_w_das_ad_df8() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197385,7 +197386,7 @@ void m68008_device::cmpa_w_dais_ad_df8() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -197467,7 +197468,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197503,11 +197504,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197590,7 +197591,7 @@ void m68008_device::cmpa_w_adr16_ad_df8() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -197624,11 +197625,11 @@ void m68008_device::cmpa_w_adr16_ad_df8() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197742,7 +197743,7 @@ void m68008_device::cmpa_w_adr32_ad_df8() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -197776,11 +197777,11 @@ void m68008_device::cmpa_w_adr32_ad_df8() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197861,7 +197862,7 @@ void m68008_device::cmpa_w_dpc_ad_df8() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197897,11 +197898,11 @@ void m68008_device::cmpa_w_dpc_ad_df8() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197948,7 +197949,7 @@ void m68008_device::cmpa_w_dpci_ad_df8() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -198030,7 +198031,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -198066,11 +198067,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198155,11 +198156,11 @@ void m68008_device::cmpa_w_imm16_ad_df8() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198210,7 +198211,7 @@ void m68008_device::eor_b_dd_ds_df8() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -198218,7 +198219,7 @@ void m68008_device::eor_b_dd_ds_df8() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198282,7 +198283,7 @@ void m68008_device::cmpm_b_aips_aipd_df8() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -198302,7 +198303,7 @@ void m68008_device::cmpm_b_aips_aipd_df8() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198347,11 +198348,11 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -198369,7 +198370,7 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198406,7 +198407,7 @@ void m68008_device::eor_b_dd_ais_df8() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -198435,12 +198436,12 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -198459,7 +198460,7 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198496,7 +198497,7 @@ void m68008_device::eor_b_dd_aips_df8() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -198524,7 +198525,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -198532,7 +198533,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -198551,7 +198552,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198588,7 +198589,7 @@ void m68008_device::eor_b_dd_pais_df8() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -198614,7 +198615,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198647,11 +198648,11 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -198669,7 +198670,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198706,7 +198707,7 @@ void m68008_device::eor_b_dd_das_df8() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -198730,14 +198731,14 @@ void m68008_device::eor_b_dd_dais_df8() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -198745,7 +198746,7 @@ void m68008_device::eor_b_dd_dais_df8() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198779,7 +198780,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198815,11 +198816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -198837,7 +198838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198874,7 +198875,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -198902,7 +198903,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -198935,7 +198936,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -198954,7 +198955,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198991,7 +198992,7 @@ void m68008_device::eor_b_dd_adr16_df8() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -199017,7 +199018,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199051,7 +199052,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -199084,7 +199085,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -199103,7 +199104,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199140,7 +199141,7 @@ void m68008_device::eor_b_dd_adr32_df8() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -199167,7 +199168,7 @@ void m68008_device::eor_w_dd_ds_df8() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -199175,7 +199176,7 @@ void m68008_device::eor_w_dd_ds_df8() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199254,7 +199255,7 @@ void m68008_device::cmpm_w_aips_aipd_df8() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199289,7 +199290,7 @@ void m68008_device::cmpm_w_aips_aipd_df8() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199334,11 +199335,11 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199371,7 +199372,7 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199408,7 +199409,7 @@ void m68008_device::eor_w_dd_ais_df8() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199452,12 +199453,12 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199491,7 +199492,7 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199528,7 +199529,7 @@ void m68008_device::eor_w_dd_aips_df8() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199571,7 +199572,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -199579,7 +199580,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199613,7 +199614,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199650,7 +199651,7 @@ void m68008_device::eor_w_dd_pais_df8() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199691,7 +199692,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199724,11 +199725,11 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199761,7 +199762,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199798,7 +199799,7 @@ void m68008_device::eor_w_dd_das_df8() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199837,14 +199838,14 @@ void m68008_device::eor_w_dd_dais_df8() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -199852,7 +199853,7 @@ void m68008_device::eor_w_dd_dais_df8() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199886,7 +199887,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199922,11 +199923,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199959,7 +199960,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199996,7 +199997,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200039,7 +200040,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -200072,7 +200073,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200106,7 +200107,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200143,7 +200144,7 @@ void m68008_device::eor_w_dd_adr16_df8() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200184,7 +200185,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200218,7 +200219,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -200251,7 +200252,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200285,7 +200286,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200322,7 +200323,7 @@ void m68008_device::eor_w_dd_adr32_df8() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200364,12 +200365,12 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200399,7 +200400,7 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -200408,7 +200409,7 @@ void m68008_device::eor_l_dd_ds_df8() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200491,7 +200492,7 @@ void m68008_device::cmpm_l_aips_aipd_df8() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200555,13 +200556,13 @@ void m68008_device::cmpm_l_aips_aipd_df8() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200606,7 +200607,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200641,7 +200642,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200674,7 +200675,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200709,7 +200710,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200744,7 +200745,7 @@ void m68008_device::eor_l_dd_ais_df8() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200785,7 +200786,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200820,11 +200821,11 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200857,7 +200858,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200892,7 +200893,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200927,7 +200928,7 @@ void m68008_device::eor_l_dd_aips_df8() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200967,14 +200968,14 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201008,7 +201009,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201041,7 +201042,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201076,7 +201077,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201111,7 +201112,7 @@ void m68008_device::eor_l_dd_pais_df8() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201152,7 +201153,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201184,7 +201185,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -201219,7 +201220,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201252,7 +201253,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201287,7 +201288,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201322,7 +201323,7 @@ void m68008_device::eor_l_dd_das_df8() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201361,14 +201362,14 @@ void m68008_device::eor_l_dd_dais_df8() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -201376,7 +201377,7 @@ void m68008_device::eor_l_dd_dais_df8() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201410,7 +201411,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201445,7 +201446,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -201480,7 +201481,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201513,7 +201514,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201548,7 +201549,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201583,7 +201584,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201626,7 +201627,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -201659,7 +201660,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -201694,7 +201695,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201727,7 +201728,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201762,7 +201763,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201797,7 +201798,7 @@ void m68008_device::eor_l_dd_adr16_df8() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201838,7 +201839,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201872,7 +201873,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -201905,7 +201906,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -201940,7 +201941,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201973,7 +201974,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202008,7 +202009,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -202043,7 +202044,7 @@ void m68008_device::eor_l_dd_adr32_df8() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -202086,11 +202087,11 @@ void m68008_device::cmpa_l_ds_ad_df8() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202142,11 +202143,11 @@ void m68008_device::cmpa_l_as_ad_df8() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202196,7 +202197,7 @@ void m68008_device::cmpa_l_ais_ad_df8() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -202263,11 +202264,11 @@ void m68008_device::cmpa_l_ais_ad_df8() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202317,7 +202318,7 @@ void m68008_device::cmpa_l_aips_ad_df8() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -202387,11 +202388,11 @@ void m68008_device::cmpa_l_aips_ad_df8() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202440,7 +202441,7 @@ void m68008_device::cmpa_l_pais_ad_df8() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -202512,11 +202513,11 @@ void m68008_device::cmpa_l_pais_ad_df8() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202597,7 +202598,7 @@ void m68008_device::cmpa_l_das_ad_df8() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -202664,11 +202665,11 @@ void m68008_device::cmpa_l_das_ad_df8() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202716,7 +202717,7 @@ void m68008_device::cmpa_l_dais_ad_df8() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -202797,7 +202798,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -202864,11 +202865,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202951,7 +202952,7 @@ void m68008_device::cmpa_l_adr16_ad_df8() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -203018,11 +203019,11 @@ void m68008_device::cmpa_l_adr16_ad_df8() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203136,7 +203137,7 @@ void m68008_device::cmpa_l_adr32_ad_df8() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -203203,11 +203204,11 @@ void m68008_device::cmpa_l_adr32_ad_df8() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203287,7 +203288,7 @@ void m68008_device::cmpa_l_dpc_ad_df8() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -203354,11 +203355,11 @@ void m68008_device::cmpa_l_dpc_ad_df8() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203405,7 +203406,7 @@ void m68008_device::cmpa_l_dpci_ad_df8() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -203486,7 +203487,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -203553,11 +203554,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203673,11 +203674,11 @@ void m68008_device::cmpa_l_imm32_ad_df8() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203729,7 +203730,7 @@ void m68008_device::and_b_ds_dd_df8() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203737,7 +203738,7 @@ void m68008_device::and_b_ds_dd_df8() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203780,11 +203781,11 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -203802,7 +203803,7 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203810,7 +203811,7 @@ void m68008_device::and_b_ais_dd_df8() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203856,12 +203857,12 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -203880,7 +203881,7 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203888,7 +203889,7 @@ void m68008_device::and_b_aips_dd_df8() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203933,7 +203934,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203941,7 +203942,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -203960,7 +203961,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203968,7 +203969,7 @@ void m68008_device::and_b_pais_dd_df8() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204011,7 +204012,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204044,11 +204045,11 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -204066,7 +204067,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204074,7 +204075,7 @@ void m68008_device::and_b_das_dd_df8() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204115,14 +204116,14 @@ void m68008_device::and_b_dais_dd_df8() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204130,7 +204131,7 @@ void m68008_device::and_b_dais_dd_df8() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204164,7 +204165,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204200,11 +204201,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -204222,7 +204223,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204230,7 +204231,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204275,7 +204276,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -204308,7 +204309,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -204327,7 +204328,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204335,7 +204336,7 @@ void m68008_device::and_b_adr16_dd_df8() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204378,7 +204379,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204412,7 +204413,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -204445,7 +204446,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -204464,7 +204465,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204472,7 +204473,7 @@ void m68008_device::and_b_adr32_dd_df8() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204514,7 +204515,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204547,11 +204548,11 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -204569,7 +204570,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204577,7 +204578,7 @@ void m68008_device::and_b_dpc_dd_df8() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204617,14 +204618,14 @@ void m68008_device::and_b_dpci_dd_df8() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204632,7 +204633,7 @@ void m68008_device::and_b_dpci_dd_df8() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204666,7 +204667,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204702,11 +204703,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob);
m_icount -= 4;
@@ -204724,7 +204725,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204732,7 +204733,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204777,7 +204778,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204811,7 +204812,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204819,7 +204820,7 @@ void m68008_device::and_b_imm8_dd_df8() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204864,7 +204865,7 @@ void m68008_device::and_w_ds_dd_df8() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204872,7 +204873,7 @@ void m68008_device::and_w_ds_dd_df8() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204915,11 +204916,11 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204952,7 +204953,7 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204960,7 +204961,7 @@ void m68008_device::and_w_ais_dd_df8() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205006,12 +205007,12 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -205045,7 +205046,7 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205053,7 +205054,7 @@ void m68008_device::and_w_aips_dd_df8() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205098,7 +205099,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -205106,7 +205107,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -205140,7 +205141,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205148,7 +205149,7 @@ void m68008_device::and_w_pais_dd_df8() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205191,7 +205192,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205224,11 +205225,11 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205261,7 +205262,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205269,7 +205270,7 @@ void m68008_device::and_w_das_dd_df8() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205310,14 +205311,14 @@ void m68008_device::and_w_dais_dd_df8() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -205325,7 +205326,7 @@ void m68008_device::and_w_dais_dd_df8() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205359,7 +205360,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205395,11 +205396,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205432,7 +205433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205440,7 +205441,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205485,7 +205486,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -205518,7 +205519,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -205552,7 +205553,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205560,7 +205561,7 @@ void m68008_device::and_w_adr16_dd_df8() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205603,7 +205604,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205637,7 +205638,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -205670,7 +205671,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -205704,7 +205705,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205712,7 +205713,7 @@ void m68008_device::and_w_adr32_dd_df8() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205754,7 +205755,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205787,11 +205788,11 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205824,7 +205825,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205832,7 +205833,7 @@ void m68008_device::and_w_dpc_dd_df8() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205872,14 +205873,14 @@ void m68008_device::and_w_dpci_dd_df8() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -205887,7 +205888,7 @@ void m68008_device::and_w_dpci_dd_df8() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205921,7 +205922,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205957,11 +205958,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205994,7 +205995,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -206002,7 +206003,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206047,7 +206048,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206081,7 +206082,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -206089,7 +206090,7 @@ void m68008_device::and_w_imm16_dd_df8() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206134,12 +206135,12 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206169,7 +206170,7 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -206178,7 +206179,7 @@ void m68008_device::and_l_ds_dd_df8() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206194,7 +206195,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -206229,7 +206230,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206262,12 +206263,12 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206303,7 +206304,7 @@ void m68008_device::and_l_ais_dd_df8() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206319,7 +206320,7 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -206354,11 +206355,11 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206391,12 +206392,12 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206432,7 +206433,7 @@ void m68008_device::and_l_aips_dd_df8() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206447,14 +206448,14 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206488,7 +206489,7 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206521,12 +206522,12 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206562,7 +206563,7 @@ void m68008_device::and_l_pais_dd_df8() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206578,7 +206579,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206610,7 +206611,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -206645,7 +206646,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206678,12 +206679,12 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206719,7 +206720,7 @@ void m68008_device::and_l_das_dd_df8() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206733,14 +206734,14 @@ void m68008_device::and_l_dais_dd_df8() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -206748,7 +206749,7 @@ void m68008_device::and_l_dais_dd_df8() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206782,7 +206783,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206817,7 +206818,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -206852,7 +206853,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206885,12 +206886,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206926,7 +206927,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206944,7 +206945,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -206977,7 +206978,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -207012,7 +207013,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207045,12 +207046,12 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207086,7 +207087,7 @@ void m68008_device::and_l_adr16_dd_df8() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207102,7 +207103,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207136,7 +207137,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -207169,7 +207170,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -207204,7 +207205,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207237,12 +207238,12 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207278,7 +207279,7 @@ void m68008_device::and_l_adr32_dd_df8() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207293,7 +207294,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207325,7 +207326,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -207360,7 +207361,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207393,12 +207394,12 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207434,7 +207435,7 @@ void m68008_device::and_l_dpc_dd_df8() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207447,14 +207448,14 @@ void m68008_device::and_l_dpci_dd_df8() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -207462,7 +207463,7 @@ void m68008_device::and_l_dpci_dd_df8() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207496,7 +207497,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207531,7 +207532,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -207566,7 +207567,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207599,12 +207600,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207640,7 +207641,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207656,7 +207657,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207690,7 +207691,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207724,12 +207725,12 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207759,7 +207760,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -207768,7 +207769,7 @@ void m68008_device::and_l_imm32_dd_df8() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207788,7 +207789,7 @@ void m68008_device::mulu_w_ds_dd_df8() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -207831,7 +207832,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207843,7 +207844,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207855,7 +207856,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -207873,7 +207874,7 @@ void m68008_device::mulu_w_ais_dd_df8() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207911,7 +207912,7 @@ void m68008_device::mulu_w_ais_dd_df8() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -207954,7 +207955,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207966,7 +207967,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207978,7 +207979,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208002,7 +208003,7 @@ void m68008_device::mulu_w_aips_dd_df8() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -208038,7 +208039,7 @@ void m68008_device::mulu_w_aips_dd_df8() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208081,7 +208082,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208093,7 +208094,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208105,7 +208106,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208131,7 +208132,7 @@ void m68008_device::mulu_w_pais_dd_df8() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -208167,7 +208168,7 @@ void m68008_device::mulu_w_pais_dd_df8() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208210,7 +208211,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208222,7 +208223,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208234,7 +208235,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208284,7 +208285,7 @@ void m68008_device::mulu_w_das_dd_df8() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208322,7 +208323,7 @@ void m68008_device::mulu_w_das_dd_df8() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208365,7 +208366,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208377,7 +208378,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208389,7 +208390,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208405,7 +208406,7 @@ void m68008_device::mulu_w_dais_dd_df8() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -208487,7 +208488,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208525,7 +208526,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208568,7 +208569,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208580,7 +208581,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208592,7 +208593,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208643,7 +208644,7 @@ void m68008_device::mulu_w_adr16_dd_df8() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -208679,7 +208680,7 @@ void m68008_device::mulu_w_adr16_dd_df8() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208722,7 +208723,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208734,7 +208735,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208746,7 +208747,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208828,7 +208829,7 @@ void m68008_device::mulu_w_adr32_dd_df8() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -208864,7 +208865,7 @@ void m68008_device::mulu_w_adr32_dd_df8() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208907,7 +208908,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208919,7 +208920,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208931,7 +208932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208980,7 +208981,7 @@ void m68008_device::mulu_w_dpc_dd_df8() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209018,7 +209019,7 @@ void m68008_device::mulu_w_dpc_dd_df8() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209061,7 +209062,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209073,7 +209074,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209085,7 +209086,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209100,7 +209101,7 @@ void m68008_device::mulu_w_dpci_dd_df8() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209182,7 +209183,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209220,7 +209221,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209263,7 +209264,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209275,7 +209276,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209287,7 +209288,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209342,7 +209343,7 @@ void m68008_device::mulu_w_imm16_dd_df8() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209385,7 +209386,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209397,7 +209398,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209409,7 +209410,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209429,12 +209430,12 @@ void m68008_device::abcd_ds_dd_df8() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209489,7 +209490,7 @@ void m68008_device::abcd_pais_paid_df8() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -209525,12 +209526,12 @@ void m68008_device::abcd_pais_paid_df8() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209590,11 +209591,11 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -209612,7 +209613,7 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209649,7 +209650,7 @@ void m68008_device::and_b_dd_ais_df8() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -209678,12 +209679,12 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -209702,7 +209703,7 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209739,7 +209740,7 @@ void m68008_device::and_b_dd_aips_df8() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -209767,7 +209768,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -209775,7 +209776,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -209794,7 +209795,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209831,7 +209832,7 @@ void m68008_device::and_b_dd_pais_df8() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -209857,7 +209858,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209890,11 +209891,11 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -209912,7 +209913,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209949,7 +209950,7 @@ void m68008_device::and_b_dd_das_df8() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -209973,14 +209974,14 @@ void m68008_device::and_b_dd_dais_df8() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -209988,7 +209989,7 @@ void m68008_device::and_b_dd_dais_df8() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210022,7 +210023,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210058,11 +210059,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -210080,7 +210081,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210117,7 +210118,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -210145,7 +210146,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -210178,7 +210179,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -210197,7 +210198,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210234,7 +210235,7 @@ void m68008_device::and_b_dd_adr16_df8() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -210260,7 +210261,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210294,7 +210295,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -210327,7 +210328,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -210346,7 +210347,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210383,7 +210384,7 @@ void m68008_device::and_b_dd_adr32_df8() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -210517,11 +210518,11 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210554,7 +210555,7 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210591,7 +210592,7 @@ void m68008_device::and_w_dd_ais_df8() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210635,12 +210636,12 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -210674,7 +210675,7 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210711,7 +210712,7 @@ void m68008_device::and_w_dd_aips_df8() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210754,7 +210755,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -210762,7 +210763,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -210796,7 +210797,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210833,7 +210834,7 @@ void m68008_device::and_w_dd_pais_df8() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210874,7 +210875,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210907,11 +210908,11 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210944,7 +210945,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210981,7 +210982,7 @@ void m68008_device::and_w_dd_das_df8() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211020,14 +211021,14 @@ void m68008_device::and_w_dd_dais_df8() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -211035,7 +211036,7 @@ void m68008_device::and_w_dd_dais_df8() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211069,7 +211070,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211105,11 +211106,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211142,7 +211143,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211179,7 +211180,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211222,7 +211223,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -211255,7 +211256,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -211289,7 +211290,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211326,7 +211327,7 @@ void m68008_device::and_w_dd_adr16_df8() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211367,7 +211368,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211401,7 +211402,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -211434,7 +211435,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -211468,7 +211469,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211505,7 +211506,7 @@ void m68008_device::and_w_dd_adr32_df8() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211600,7 +211601,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -211635,7 +211636,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211668,7 +211669,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211703,7 +211704,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -211738,7 +211739,7 @@ void m68008_device::and_l_dd_ais_df8() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211779,7 +211780,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -211814,11 +211815,11 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211851,7 +211852,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211886,7 +211887,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -211921,7 +211922,7 @@ void m68008_device::and_l_dd_aips_df8() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211961,14 +211962,14 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212002,7 +212003,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212035,7 +212036,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212070,7 +212071,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212105,7 +212106,7 @@ void m68008_device::and_l_dd_pais_df8() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212146,7 +212147,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212178,7 +212179,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -212213,7 +212214,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212246,7 +212247,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212281,7 +212282,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212316,7 +212317,7 @@ void m68008_device::and_l_dd_das_df8() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212355,14 +212356,14 @@ void m68008_device::and_l_dd_dais_df8() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -212370,7 +212371,7 @@ void m68008_device::and_l_dd_dais_df8() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212404,7 +212405,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212439,7 +212440,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -212474,7 +212475,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212507,7 +212508,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212542,7 +212543,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212577,7 +212578,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212620,7 +212621,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -212653,7 +212654,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -212688,7 +212689,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212721,7 +212722,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212756,7 +212757,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212791,7 +212792,7 @@ void m68008_device::and_l_dd_adr16_df8() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212832,7 +212833,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212866,7 +212867,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -212899,7 +212900,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -212934,7 +212935,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212967,7 +212968,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213002,7 +213003,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -213037,7 +213038,7 @@ void m68008_device::and_l_dd_adr32_df8() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -213082,7 +213083,7 @@ void m68008_device::muls_w_ds_dd_df8() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213125,7 +213126,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213139,7 +213140,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213151,7 +213152,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213162,7 +213163,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213176,7 +213177,7 @@ void m68008_device::muls_w_ais_dd_df8() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213214,7 +213215,7 @@ void m68008_device::muls_w_ais_dd_df8() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213257,7 +213258,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213271,7 +213272,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213283,7 +213284,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213294,7 +213295,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213314,7 +213315,7 @@ void m68008_device::muls_w_aips_dd_df8() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -213350,7 +213351,7 @@ void m68008_device::muls_w_aips_dd_df8() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213393,7 +213394,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213407,7 +213408,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213419,7 +213420,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213430,7 +213431,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213452,7 +213453,7 @@ void m68008_device::muls_w_pais_dd_df8() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -213488,7 +213489,7 @@ void m68008_device::muls_w_pais_dd_df8() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213531,7 +213532,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213545,7 +213546,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213557,7 +213558,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213568,7 +213569,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213614,7 +213615,7 @@ void m68008_device::muls_w_das_dd_df8() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213652,7 +213653,7 @@ void m68008_device::muls_w_das_dd_df8() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213695,7 +213696,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213709,7 +213710,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213721,7 +213722,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213732,7 +213733,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213744,7 +213745,7 @@ void m68008_device::muls_w_dais_dd_df8() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -213826,7 +213827,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213864,7 +213865,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213907,7 +213908,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213921,7 +213922,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213933,7 +213934,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213944,7 +213945,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213991,7 +213992,7 @@ void m68008_device::muls_w_adr16_dd_df8() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -214027,7 +214028,7 @@ void m68008_device::muls_w_adr16_dd_df8() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214070,7 +214071,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214084,7 +214085,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214096,7 +214097,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214107,7 +214108,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214185,7 +214186,7 @@ void m68008_device::muls_w_adr32_dd_df8() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -214221,7 +214222,7 @@ void m68008_device::muls_w_adr32_dd_df8() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214264,7 +214265,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214278,7 +214279,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214290,7 +214291,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214301,7 +214302,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214346,7 +214347,7 @@ void m68008_device::muls_w_dpc_dd_df8() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214384,7 +214385,7 @@ void m68008_device::muls_w_dpc_dd_df8() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214427,7 +214428,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214441,7 +214442,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214453,7 +214454,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214464,7 +214465,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214475,7 +214476,7 @@ void m68008_device::muls_w_dpci_dd_df8() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214557,7 +214558,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214595,7 +214596,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214638,7 +214639,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214652,7 +214653,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214664,7 +214665,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214675,7 +214676,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214726,7 +214727,7 @@ void m68008_device::muls_w_imm16_dd_df8() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214769,7 +214770,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214783,7 +214784,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214795,7 +214796,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214806,7 +214807,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214822,7 +214823,7 @@ void m68008_device::add_b_ds_dd_df8() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -214872,7 +214873,7 @@ void m68008_device::add_b_ais_dd_df8() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214893,7 +214894,7 @@ void m68008_device::add_b_ais_dd_df8() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -214949,7 +214950,7 @@ void m68008_device::add_b_aips_dd_df8() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -214968,7 +214969,7 @@ void m68008_device::add_b_aips_dd_df8() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215026,7 +215027,7 @@ void m68008_device::add_b_pais_dd_df8() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -215045,7 +215046,7 @@ void m68008_device::add_b_pais_dd_df8() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215127,7 +215128,7 @@ void m68008_device::add_b_das_dd_df8() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215148,7 +215149,7 @@ void m68008_device::add_b_das_dd_df8() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215196,7 +215197,7 @@ void m68008_device::add_b_dais_dd_df8() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215278,7 +215279,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215299,7 +215300,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215382,7 +215383,7 @@ void m68008_device::add_b_adr16_dd_df8() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -215401,7 +215402,7 @@ void m68008_device::add_b_adr16_dd_df8() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215515,7 +215516,7 @@ void m68008_device::add_b_adr32_dd_df8() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -215534,7 +215535,7 @@ void m68008_device::add_b_adr32_dd_df8() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215615,7 +215616,7 @@ void m68008_device::add_b_dpc_dd_df8() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215636,7 +215637,7 @@ void m68008_device::add_b_dpc_dd_df8() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215683,7 +215684,7 @@ void m68008_device::add_b_dpci_dd_df8() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215765,7 +215766,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215786,7 +215787,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215871,7 +215872,7 @@ void m68008_device::add_b_imm8_dd_df8() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215923,7 +215924,7 @@ void m68008_device::add_w_ds_dd_df8() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215975,7 +215976,7 @@ void m68008_device::add_w_as_dd_df8() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216025,7 +216026,7 @@ void m68008_device::add_w_ais_dd_df8() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216061,7 +216062,7 @@ void m68008_device::add_w_ais_dd_df8() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216117,7 +216118,7 @@ void m68008_device::add_w_aips_dd_df8() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -216151,7 +216152,7 @@ void m68008_device::add_w_aips_dd_df8() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216209,7 +216210,7 @@ void m68008_device::add_w_pais_dd_df8() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -216243,7 +216244,7 @@ void m68008_device::add_w_pais_dd_df8() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216325,7 +216326,7 @@ void m68008_device::add_w_das_dd_df8() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216361,7 +216362,7 @@ void m68008_device::add_w_das_dd_df8() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216409,7 +216410,7 @@ void m68008_device::add_w_dais_dd_df8() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -216491,7 +216492,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216527,7 +216528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216610,7 +216611,7 @@ void m68008_device::add_w_adr16_dd_df8() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -216644,7 +216645,7 @@ void m68008_device::add_w_adr16_dd_df8() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216758,7 +216759,7 @@ void m68008_device::add_w_adr32_dd_df8() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -216792,7 +216793,7 @@ void m68008_device::add_w_adr32_dd_df8() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216873,7 +216874,7 @@ void m68008_device::add_w_dpc_dd_df8() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216909,7 +216910,7 @@ void m68008_device::add_w_dpc_dd_df8() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216956,7 +216957,7 @@ void m68008_device::add_w_dpci_dd_df8() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -217038,7 +217039,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -217074,7 +217075,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -217159,7 +217160,7 @@ void m68008_device::add_w_imm16_dd_df8() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -217211,7 +217212,7 @@ void m68008_device::add_l_ds_dd_df8() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -217245,7 +217246,7 @@ void m68008_device::add_l_ds_dd_df8() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217271,7 +217272,7 @@ void m68008_device::add_l_as_dd_df8() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -217305,7 +217306,7 @@ void m68008_device::add_l_as_dd_df8() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217329,7 +217330,7 @@ void m68008_device::add_l_ais_dd_df8() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -217396,12 +217397,12 @@ void m68008_device::add_l_ais_dd_df8() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217452,7 +217453,7 @@ void m68008_device::add_l_aips_dd_df8() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -217522,12 +217523,12 @@ void m68008_device::add_l_aips_dd_df8() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217577,7 +217578,7 @@ void m68008_device::add_l_pais_dd_df8() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -217649,12 +217650,12 @@ void m68008_device::add_l_pais_dd_df8() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217736,7 +217737,7 @@ void m68008_device::add_l_das_dd_df8() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -217803,12 +217804,12 @@ void m68008_device::add_l_das_dd_df8() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217857,7 +217858,7 @@ void m68008_device::add_l_dais_dd_df8() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -217938,7 +217939,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -218005,12 +218006,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218094,7 +218095,7 @@ void m68008_device::add_l_adr16_dd_df8() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -218161,12 +218162,12 @@ void m68008_device::add_l_adr16_dd_df8() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218281,7 +218282,7 @@ void m68008_device::add_l_adr32_dd_df8() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -218348,12 +218349,12 @@ void m68008_device::add_l_adr32_dd_df8() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218434,7 +218435,7 @@ void m68008_device::add_l_dpc_dd_df8() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -218501,12 +218502,12 @@ void m68008_device::add_l_dpc_dd_df8() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218554,7 +218555,7 @@ void m68008_device::add_l_dpci_dd_df8() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -218635,7 +218636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -218702,12 +218703,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218824,7 +218825,7 @@ void m68008_device::add_l_imm32_dd_df8() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -218858,7 +218859,7 @@ void m68008_device::add_l_imm32_dd_df8() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -218884,7 +218885,7 @@ void m68008_device::adda_w_ds_ad_df8() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -218917,7 +218918,7 @@ void m68008_device::adda_w_ds_ad_df8() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -218942,7 +218943,7 @@ void m68008_device::adda_w_as_ad_df8() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -218975,7 +218976,7 @@ void m68008_device::adda_w_as_ad_df8() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -218998,7 +218999,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219034,7 +219035,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219067,7 +219068,7 @@ void m68008_device::adda_w_ais_ad_df8() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219096,7 +219097,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -219130,7 +219131,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219163,7 +219164,7 @@ void m68008_device::adda_w_aips_ad_df8() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219194,7 +219195,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -219228,7 +219229,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219261,7 +219262,7 @@ void m68008_device::adda_w_pais_ad_df8() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219316,7 +219317,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219352,7 +219353,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219385,7 +219386,7 @@ void m68008_device::adda_w_das_ad_df8() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219406,7 +219407,7 @@ void m68008_device::adda_w_dais_ad_df8() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -219488,7 +219489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219524,7 +219525,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219557,7 +219558,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219613,7 +219614,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -219647,7 +219648,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219680,7 +219681,7 @@ void m68008_device::adda_w_adr16_ad_df8() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219767,7 +219768,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -219801,7 +219802,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219834,7 +219835,7 @@ void m68008_device::adda_w_adr32_ad_df8() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219888,7 +219889,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219924,7 +219925,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219957,7 +219958,7 @@ void m68008_device::adda_w_dpc_ad_df8() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219977,7 +219978,7 @@ void m68008_device::adda_w_dpci_ad_df8() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -220059,7 +220060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -220095,7 +220096,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -220128,7 +220129,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -220186,7 +220187,7 @@ void m68008_device::adda_w_imm16_ad_df8() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -220219,7 +220220,7 @@ void m68008_device::adda_w_imm16_ad_df8() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -220244,7 +220245,7 @@ void m68008_device::addx_b_ds_dd_df8() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -220252,7 +220253,7 @@ void m68008_device::addx_b_ds_dd_df8() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -220297,16 +220298,16 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -220325,7 +220326,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
m_icount -= 4;
@@ -220341,7 +220342,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220378,7 +220379,7 @@ void m68008_device::addx_b_pais_paid_df8() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob, m_dbout);
m_icount -= 4;
@@ -220404,7 +220405,7 @@ void m68008_device::add_b_dd_ais_df8() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220425,7 +220426,7 @@ void m68008_device::add_b_dd_ais_df8() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220493,7 +220494,7 @@ void m68008_device::add_b_dd_aips_df8() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -220512,7 +220513,7 @@ void m68008_device::add_b_dd_aips_df8() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220582,7 +220583,7 @@ void m68008_device::add_b_dd_pais_df8() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -220601,7 +220602,7 @@ void m68008_device::add_b_dd_pais_df8() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220695,7 +220696,7 @@ void m68008_device::add_b_dd_das_df8() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220716,7 +220717,7 @@ void m68008_device::add_b_dd_das_df8() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220776,7 +220777,7 @@ void m68008_device::add_b_dd_dais_df8() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -220858,7 +220859,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220879,7 +220880,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220974,7 +220975,7 @@ void m68008_device::add_b_dd_adr16_df8() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -220993,7 +220994,7 @@ void m68008_device::add_b_dd_adr16_df8() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221119,7 +221120,7 @@ void m68008_device::add_b_dd_adr32_df8() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob);
@@ -221138,7 +221139,7 @@ void m68008_device::add_b_dd_adr32_df8() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221202,7 +221203,7 @@ void m68008_device::addx_w_ds_dd_df8() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -221210,7 +221211,7 @@ void m68008_device::addx_w_ds_dd_df8() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221255,16 +221256,16 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221298,7 +221299,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221329,7 +221330,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221366,7 +221367,7 @@ void m68008_device::addx_w_pais_paid_df8() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -221407,7 +221408,7 @@ void m68008_device::add_w_dd_ais_df8() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221443,7 +221444,7 @@ void m68008_device::add_w_dd_ais_df8() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221526,7 +221527,7 @@ void m68008_device::add_w_dd_aips_df8() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -221560,7 +221561,7 @@ void m68008_device::add_w_dd_aips_df8() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221645,7 +221646,7 @@ void m68008_device::add_w_dd_pais_df8() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -221679,7 +221680,7 @@ void m68008_device::add_w_dd_pais_df8() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221788,7 +221789,7 @@ void m68008_device::add_w_dd_das_df8() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221824,7 +221825,7 @@ void m68008_device::add_w_dd_das_df8() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221899,7 +221900,7 @@ void m68008_device::add_w_dd_dais_df8() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -221981,7 +221982,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222017,7 +222018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222127,7 +222128,7 @@ void m68008_device::add_w_dd_adr16_df8() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -222161,7 +222162,7 @@ void m68008_device::add_w_dd_adr16_df8() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222302,7 +222303,7 @@ void m68008_device::add_w_dd_adr32_df8() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -222336,7 +222337,7 @@ void m68008_device::add_w_dd_adr32_df8() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222415,12 +222416,12 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222450,7 +222451,7 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -222459,7 +222460,7 @@ void m68008_device::addx_l_ds_dd_df8() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -222477,13 +222478,13 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222514,11 +222515,11 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222550,7 +222551,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222583,7 +222584,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -222618,7 +222619,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -222648,7 +222649,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222685,7 +222686,7 @@ void m68008_device::addx_l_pais_paid_df8() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -222726,7 +222727,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -222793,7 +222794,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222828,7 +222829,7 @@ void m68008_device::add_l_dd_ais_df8() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -222903,7 +222904,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -222973,7 +222974,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223008,7 +223009,7 @@ void m68008_device::add_l_dd_aips_df8() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223082,7 +223083,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -223154,7 +223155,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223189,7 +223190,7 @@ void m68008_device::add_l_dd_pais_df8() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223295,7 +223296,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -223362,7 +223363,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223397,7 +223398,7 @@ void m68008_device::add_l_dd_das_df8() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223470,7 +223471,7 @@ void m68008_device::add_l_dd_dais_df8() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -223551,7 +223552,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -223618,7 +223619,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223653,7 +223654,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223761,7 +223762,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -223828,7 +223829,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223863,7 +223864,7 @@ void m68008_device::add_l_dd_adr16_df8() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -224002,7 +224003,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -224069,7 +224070,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224104,7 +224105,7 @@ void m68008_device::add_l_dd_adr32_df8() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -224181,7 +224182,7 @@ void m68008_device::adda_l_ds_ad_df8() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -224214,7 +224215,7 @@ void m68008_device::adda_l_ds_ad_df8() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -224239,7 +224240,7 @@ void m68008_device::adda_l_as_ad_df8() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -224272,7 +224273,7 @@ void m68008_device::adda_l_as_ad_df8() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -224295,7 +224296,7 @@ void m68008_device::adda_l_ais_ad_df8() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -224362,11 +224363,11 @@ void m68008_device::adda_l_ais_ad_df8() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -224416,7 +224417,7 @@ void m68008_device::adda_l_aips_ad_df8() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -224486,11 +224487,11 @@ void m68008_device::adda_l_aips_ad_df8() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -224539,7 +224540,7 @@ void m68008_device::adda_l_pais_ad_df8() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -224611,11 +224612,11 @@ void m68008_device::adda_l_pais_ad_df8() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -224696,7 +224697,7 @@ void m68008_device::adda_l_das_ad_df8() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -224763,11 +224764,11 @@ void m68008_device::adda_l_das_ad_df8() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -224815,7 +224816,7 @@ void m68008_device::adda_l_dais_ad_df8() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -224896,7 +224897,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -224963,11 +224964,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225050,7 +225051,7 @@ void m68008_device::adda_l_adr16_ad_df8() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -225117,11 +225118,11 @@ void m68008_device::adda_l_adr16_ad_df8() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225235,7 +225236,7 @@ void m68008_device::adda_l_adr32_ad_df8() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -225302,11 +225303,11 @@ void m68008_device::adda_l_adr32_ad_df8() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225386,7 +225387,7 @@ void m68008_device::adda_l_dpc_ad_df8() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225453,11 +225454,11 @@ void m68008_device::adda_l_dpc_ad_df8() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225504,7 +225505,7 @@ void m68008_device::adda_l_dpci_ad_df8() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225585,7 +225586,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225652,11 +225653,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -225772,7 +225773,7 @@ void m68008_device::adda_l_imm32_ad_df8() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -225805,7 +225806,7 @@ void m68008_device::adda_l_imm32_ad_df8() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -225829,13 +225830,13 @@ void m68008_device::asr_b_imm3_ds_df8() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225874,7 +225875,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -225904,13 +225905,13 @@ void m68008_device::lsr_b_imm3_ds_df8() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225949,7 +225950,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -225979,13 +225980,13 @@ void m68008_device::roxr_b_imm3_ds_df8() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226024,7 +226025,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226054,13 +226055,13 @@ void m68008_device::ror_b_imm3_ds_df8() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226099,7 +226100,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226130,13 +226131,13 @@ void m68008_device::asr_b_dd_ds_df8() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226175,7 +226176,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226206,13 +226207,13 @@ void m68008_device::lsr_b_dd_ds_df8() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226251,7 +226252,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226282,13 +226283,13 @@ void m68008_device::roxr_b_dd_ds_df8() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226327,7 +226328,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226358,13 +226359,13 @@ void m68008_device::ror_b_dd_ds_df8() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226403,7 +226404,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226433,13 +226434,13 @@ void m68008_device::asr_w_imm3_ds_df8() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226478,7 +226479,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226508,13 +226509,13 @@ void m68008_device::lsr_w_imm3_ds_df8() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226553,7 +226554,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226583,13 +226584,13 @@ void m68008_device::roxr_w_imm3_ds_df8() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226628,7 +226629,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226658,13 +226659,13 @@ void m68008_device::ror_w_imm3_ds_df8() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226703,7 +226704,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226734,13 +226735,13 @@ void m68008_device::asr_w_dd_ds_df8() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226779,7 +226780,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226810,13 +226811,13 @@ void m68008_device::lsr_w_dd_ds_df8() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226855,7 +226856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226886,13 +226887,13 @@ void m68008_device::roxr_w_dd_ds_df8() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226931,7 +226932,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226962,13 +226963,13 @@ void m68008_device::ror_w_dd_ds_df8() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227007,7 +227008,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227037,13 +227038,13 @@ void m68008_device::asr_l_imm3_ds_df8() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227082,7 +227083,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227099,7 +227100,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227118,13 +227119,13 @@ void m68008_device::lsr_l_imm3_ds_df8() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227163,7 +227164,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227180,7 +227181,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227199,13 +227200,13 @@ void m68008_device::roxr_l_imm3_ds_df8() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227244,7 +227245,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227261,7 +227262,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227280,13 +227281,13 @@ void m68008_device::ror_l_imm3_ds_df8() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227325,7 +227326,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227342,7 +227343,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227362,13 +227363,13 @@ void m68008_device::asr_l_dd_ds_df8() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227407,7 +227408,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227424,7 +227425,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227444,13 +227445,13 @@ void m68008_device::lsr_l_dd_ds_df8() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227489,7 +227490,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227506,7 +227507,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227526,13 +227527,13 @@ void m68008_device::roxr_l_dd_ds_df8() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227571,7 +227572,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227588,7 +227589,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227608,13 +227609,13 @@ void m68008_device::ror_l_dd_ds_df8() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227653,7 +227654,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227670,7 +227671,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227688,7 +227689,7 @@ void m68008_device::asr_ais_df8() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -227724,12 +227725,12 @@ void m68008_device::asr_ais_df8() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227812,7 +227813,7 @@ void m68008_device::asr_aips_df8() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -227846,12 +227847,12 @@ void m68008_device::asr_aips_df8() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227936,7 +227937,7 @@ void m68008_device::asr_pais_df8() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -227970,12 +227971,12 @@ void m68008_device::asr_pais_df8() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228084,7 +228085,7 @@ void m68008_device::asr_das_df8() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -228120,12 +228121,12 @@ void m68008_device::asr_das_df8() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228200,7 +228201,7 @@ void m68008_device::asr_dais_df8() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -228282,7 +228283,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -228318,12 +228319,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228433,7 +228434,7 @@ void m68008_device::asr_adr16_df8() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -228467,12 +228468,12 @@ void m68008_device::asr_adr16_df8() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228613,7 +228614,7 @@ void m68008_device::asr_adr32_df8() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -228647,12 +228648,12 @@ void m68008_device::asr_adr32_df8() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228730,13 +228731,13 @@ void m68008_device::asl_b_imm3_ds_df8() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228775,7 +228776,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228805,13 +228806,13 @@ void m68008_device::lsl_b_imm3_ds_df8() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228850,7 +228851,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228864,7 +228865,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -228881,13 +228882,13 @@ void m68008_device::roxl_b_imm3_ds_df8() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228926,7 +228927,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228956,13 +228957,13 @@ void m68008_device::rol_b_imm3_ds_df8() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229001,7 +229002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229032,13 +229033,13 @@ void m68008_device::asl_b_dd_ds_df8() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229077,7 +229078,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229108,13 +229109,13 @@ void m68008_device::lsl_b_dd_ds_df8() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229153,7 +229154,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229167,7 +229168,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229185,13 +229186,13 @@ void m68008_device::roxl_b_dd_ds_df8() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229230,7 +229231,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229261,13 +229262,13 @@ void m68008_device::rol_b_dd_ds_df8() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229306,7 +229307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229336,13 +229337,13 @@ void m68008_device::asl_w_imm3_ds_df8() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229381,7 +229382,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229411,13 +229412,13 @@ void m68008_device::lsl_w_imm3_ds_df8() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229456,7 +229457,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229470,7 +229471,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229487,13 +229488,13 @@ void m68008_device::roxl_w_imm3_ds_df8() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229532,7 +229533,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229562,13 +229563,13 @@ void m68008_device::rol_w_imm3_ds_df8() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229607,7 +229608,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229638,13 +229639,13 @@ void m68008_device::asl_w_dd_ds_df8() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229683,7 +229684,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229714,13 +229715,13 @@ void m68008_device::lsl_w_dd_ds_df8() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229759,7 +229760,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229773,7 +229774,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229791,13 +229792,13 @@ void m68008_device::roxl_w_dd_ds_df8() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229836,7 +229837,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229867,13 +229868,13 @@ void m68008_device::rol_w_dd_ds_df8() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229912,7 +229913,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229942,13 +229943,13 @@ void m68008_device::asl_l_imm3_ds_df8() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229987,7 +229988,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230004,7 +230005,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230023,13 +230024,13 @@ void m68008_device::lsl_l_imm3_ds_df8() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230068,7 +230069,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230080,14 +230081,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230106,13 +230107,13 @@ void m68008_device::roxl_l_imm3_ds_df8() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230151,7 +230152,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230168,7 +230169,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230187,13 +230188,13 @@ void m68008_device::rol_l_imm3_ds_df8() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230232,7 +230233,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -230249,7 +230250,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230269,13 +230270,13 @@ void m68008_device::asl_l_dd_ds_df8() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230314,7 +230315,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230331,7 +230332,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230351,13 +230352,13 @@ void m68008_device::lsl_l_dd_ds_df8() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230396,7 +230397,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230408,14 +230409,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230435,13 +230436,13 @@ void m68008_device::roxl_l_dd_ds_df8() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230480,7 +230481,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230497,7 +230498,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230517,13 +230518,13 @@ void m68008_device::rol_l_dd_ds_df8() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230562,7 +230563,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -230579,7 +230580,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230597,7 +230598,7 @@ void m68008_device::asl_ais_df8() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -230633,12 +230634,12 @@ void m68008_device::asl_ais_df8() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230721,7 +230722,7 @@ void m68008_device::asl_aips_df8() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230755,12 +230756,12 @@ void m68008_device::asl_aips_df8() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230845,7 +230846,7 @@ void m68008_device::asl_pais_df8() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230879,12 +230880,12 @@ void m68008_device::asl_pais_df8() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230993,7 +230994,7 @@ void m68008_device::asl_das_df8() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231029,12 +231030,12 @@ void m68008_device::asl_das_df8() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231109,7 +231110,7 @@ void m68008_device::asl_dais_df8() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -231191,7 +231192,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231227,12 +231228,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231342,7 +231343,7 @@ void m68008_device::asl_adr16_df8() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231376,12 +231377,12 @@ void m68008_device::asl_adr16_df8() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231522,7 +231523,7 @@ void m68008_device::asl_adr32_df8() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231556,12 +231557,12 @@ void m68008_device::asl_adr32_df8() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231638,7 +231639,7 @@ void m68008_device::lsr_ais_df8() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231674,12 +231675,12 @@ void m68008_device::lsr_ais_df8() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231762,7 +231763,7 @@ void m68008_device::lsr_aips_df8() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231796,12 +231797,12 @@ void m68008_device::lsr_aips_df8() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231886,7 +231887,7 @@ void m68008_device::lsr_pais_df8() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231920,12 +231921,12 @@ void m68008_device::lsr_pais_df8() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232034,7 +232035,7 @@ void m68008_device::lsr_das_df8() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -232070,12 +232071,12 @@ void m68008_device::lsr_das_df8() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232150,7 +232151,7 @@ void m68008_device::lsr_dais_df8() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -232232,7 +232233,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -232268,12 +232269,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232383,7 +232384,7 @@ void m68008_device::lsr_adr16_df8() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -232417,12 +232418,12 @@ void m68008_device::lsr_adr16_df8() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232563,7 +232564,7 @@ void m68008_device::lsr_adr32_df8() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -232597,12 +232598,12 @@ void m68008_device::lsr_adr32_df8() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232679,11 +232680,11 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -232716,12 +232717,12 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232758,7 +232759,7 @@ void m68008_device::lsl_ais_df8() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -232802,12 +232803,12 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -232841,12 +232842,12 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232883,7 +232884,7 @@ void m68008_device::lsl_aips_df8() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -232926,7 +232927,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -232934,7 +232935,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -232968,12 +232969,12 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233010,7 +233011,7 @@ void m68008_device::lsl_pais_df8() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233051,7 +233052,7 @@ void m68008_device::lsl_das_df8() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233084,11 +233085,11 @@ void m68008_device::lsl_das_df8() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233121,12 +233122,12 @@ void m68008_device::lsl_das_df8() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233163,7 +233164,7 @@ void m68008_device::lsl_das_df8() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233202,14 +233203,14 @@ void m68008_device::lsl_dais_df8() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -233217,7 +233218,7 @@ void m68008_device::lsl_dais_df8() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233251,7 +233252,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233287,11 +233288,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233324,12 +233325,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233366,7 +233367,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233409,7 +233410,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -233442,7 +233443,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -233476,12 +233477,12 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233518,7 +233519,7 @@ void m68008_device::lsl_adr16_df8() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233559,7 +233560,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233593,7 +233594,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -233626,7 +233627,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -233660,12 +233661,12 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233702,7 +233703,7 @@ void m68008_device::lsl_adr32_df8() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233743,7 +233744,7 @@ void m68008_device::roxr_ais_df8() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -233779,12 +233780,12 @@ void m68008_device::roxr_ais_df8() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233867,7 +233868,7 @@ void m68008_device::roxr_aips_df8() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -233901,12 +233902,12 @@ void m68008_device::roxr_aips_df8() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233991,7 +233992,7 @@ void m68008_device::roxr_pais_df8() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -234025,12 +234026,12 @@ void m68008_device::roxr_pais_df8() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234139,7 +234140,7 @@ void m68008_device::roxr_das_df8() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234175,12 +234176,12 @@ void m68008_device::roxr_das_df8() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234255,7 +234256,7 @@ void m68008_device::roxr_dais_df8() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -234337,7 +234338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234373,12 +234374,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234488,7 +234489,7 @@ void m68008_device::roxr_adr16_df8() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -234522,12 +234523,12 @@ void m68008_device::roxr_adr16_df8() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234668,7 +234669,7 @@ void m68008_device::roxr_adr32_df8() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -234702,12 +234703,12 @@ void m68008_device::roxr_adr32_df8() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234784,7 +234785,7 @@ void m68008_device::roxl_ais_df8() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234820,12 +234821,12 @@ void m68008_device::roxl_ais_df8() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234908,7 +234909,7 @@ void m68008_device::roxl_aips_df8() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -234942,12 +234943,12 @@ void m68008_device::roxl_aips_df8() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235032,7 +235033,7 @@ void m68008_device::roxl_pais_df8() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235066,12 +235067,12 @@ void m68008_device::roxl_pais_df8() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235180,7 +235181,7 @@ void m68008_device::roxl_das_df8() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235216,12 +235217,12 @@ void m68008_device::roxl_das_df8() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235296,7 +235297,7 @@ void m68008_device::roxl_dais_df8() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -235378,7 +235379,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235414,12 +235415,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235529,7 +235530,7 @@ void m68008_device::roxl_adr16_df8() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235563,12 +235564,12 @@ void m68008_device::roxl_adr16_df8() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235709,7 +235710,7 @@ void m68008_device::roxl_adr32_df8() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235743,12 +235744,12 @@ void m68008_device::roxl_adr32_df8() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235825,7 +235826,7 @@ void m68008_device::ror_ais_df8() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235861,12 +235862,12 @@ void m68008_device::ror_ais_df8() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235949,7 +235950,7 @@ void m68008_device::ror_aips_df8() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235983,12 +235984,12 @@ void m68008_device::ror_aips_df8() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236073,7 +236074,7 @@ void m68008_device::ror_pais_df8() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -236107,12 +236108,12 @@ void m68008_device::ror_pais_df8() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236221,7 +236222,7 @@ void m68008_device::ror_das_df8() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236257,12 +236258,12 @@ void m68008_device::ror_das_df8() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236337,7 +236338,7 @@ void m68008_device::ror_dais_df8() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -236419,7 +236420,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236455,12 +236456,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236570,7 +236571,7 @@ void m68008_device::ror_adr16_df8() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -236604,12 +236605,12 @@ void m68008_device::ror_adr16_df8() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236750,7 +236751,7 @@ void m68008_device::ror_adr32_df8() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -236784,12 +236785,12 @@ void m68008_device::ror_adr32_df8() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236866,7 +236867,7 @@ void m68008_device::rol_ais_df8() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236902,12 +236903,12 @@ void m68008_device::rol_ais_df8() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236990,7 +236991,7 @@ void m68008_device::rol_aips_df8() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237024,12 +237025,12 @@ void m68008_device::rol_aips_df8() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237114,7 +237115,7 @@ void m68008_device::rol_pais_df8() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237148,12 +237149,12 @@ void m68008_device::rol_pais_df8() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237262,7 +237263,7 @@ void m68008_device::rol_das_df8() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -237298,12 +237299,12 @@ void m68008_device::rol_das_df8() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237378,7 +237379,7 @@ void m68008_device::rol_dais_df8() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -237460,7 +237461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -237496,12 +237497,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237611,7 +237612,7 @@ void m68008_device::rol_adr16_df8() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237645,12 +237646,12 @@ void m68008_device::rol_adr16_df8() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237791,7 +237792,7 @@ void m68008_device::rol_adr32_df8() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237825,12 +237826,12 @@ void m68008_device::rol_adr32_df8() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68008-sdp8.cpp b/src/devices/cpu/m68000/m68008-sdp8.cpp
index 70f425aefba..f0f640d6385 100644
--- a/src/devices/cpu/m68000/m68008-sdp8.cpp
+++ b/src/devices/cpu/m68000/m68008-sdp8.cpp
@@ -281,7 +281,7 @@ void m68008_device::state_bus_error_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -291,7 +291,7 @@ void m68008_device::state_bus_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -329,7 +329,7 @@ void m68008_device::state_bus_error_dp8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -366,7 +366,7 @@ void m68008_device::state_bus_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -407,7 +407,7 @@ void m68008_device::state_bus_error_dp8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -444,7 +444,7 @@ void m68008_device::state_bus_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 17:
@@ -484,7 +484,7 @@ void m68008_device::state_bus_error_dp8()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 21:
@@ -522,7 +522,7 @@ void m68008_device::state_bus_error_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 25:
@@ -729,7 +729,7 @@ void m68008_device::state_address_error_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -739,7 +739,7 @@ void m68008_device::state_address_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -777,7 +777,7 @@ void m68008_device::state_address_error_dp8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -814,7 +814,7 @@ void m68008_device::state_address_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -855,7 +855,7 @@ void m68008_device::state_address_error_dp8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -892,7 +892,7 @@ void m68008_device::state_address_error_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 17:
@@ -932,7 +932,7 @@ void m68008_device::state_address_error_dp8()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 21:
@@ -970,7 +970,7 @@ void m68008_device::state_address_error_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 25:
@@ -1187,7 +1187,7 @@ void m68008_device::state_interrupt_dp8()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -1199,7 +1199,7 @@ void m68008_device::state_interrupt_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1267,7 +1267,7 @@ void m68008_device::state_interrupt_dp8()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1305,7 +1305,7 @@ void m68008_device::state_interrupt_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 11:
@@ -1510,7 +1510,7 @@ void m68008_device::state_trace_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1520,7 +1520,7 @@ void m68008_device::state_trace_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1560,7 +1560,7 @@ void m68008_device::state_trace_dp8()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1598,7 +1598,7 @@ void m68008_device::state_trace_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -1803,7 +1803,7 @@ void m68008_device::state_illegal_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1813,7 +1813,7 @@ void m68008_device::state_illegal_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1853,7 +1853,7 @@ void m68008_device::state_illegal_dp8()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1891,7 +1891,7 @@ void m68008_device::state_illegal_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2096,7 +2096,7 @@ void m68008_device::state_priviledge_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2106,7 +2106,7 @@ void m68008_device::state_priviledge_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2146,7 +2146,7 @@ void m68008_device::state_priviledge_dp8()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2184,7 +2184,7 @@ void m68008_device::state_priviledge_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2389,7 +2389,7 @@ void m68008_device::state_linea_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2399,7 +2399,7 @@ void m68008_device::state_linea_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2439,7 +2439,7 @@ void m68008_device::state_linea_dp8()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2477,7 +2477,7 @@ void m68008_device::state_linea_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2682,7 +2682,7 @@ void m68008_device::state_linef_dp8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2692,7 +2692,7 @@ void m68008_device::state_linef_dp8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2732,7 +2732,7 @@ void m68008_device::state_linef_dp8()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2770,7 +2770,7 @@ void m68008_device::state_linef_dp8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2972,7 +2972,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3010,7 +3010,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3018,7 +3018,7 @@ void m68008_device::ori_b_imm8_ds_dp8() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3071,7 +3071,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3108,11 +3108,11 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -3132,7 +3132,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3174,7 +3174,7 @@ void m68008_device::ori_b_imm8_ais_dp8() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -3207,7 +3207,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3247,12 +3247,12 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -3273,7 +3273,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3315,7 +3315,7 @@ void m68008_device::ori_b_imm8_aips_dp8() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -3348,7 +3348,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3387,7 +3387,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3395,7 +3395,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3458,7 +3458,7 @@ void m68008_device::ori_b_imm8_pais_dp8() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -3491,7 +3491,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3528,7 +3528,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3566,11 +3566,11 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -3590,7 +3590,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3632,7 +3632,7 @@ void m68008_device::ori_b_imm8_das_dp8() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -3665,7 +3665,7 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3700,14 +3700,14 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3715,7 +3715,7 @@ void m68008_device::ori_b_imm8_dais_dp8() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3754,7 +3754,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3795,11 +3795,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -3819,7 +3819,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3861,7 +3861,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -3893,7 +3893,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -3933,7 +3933,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3971,7 +3971,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -3992,7 +3992,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4034,7 +4034,7 @@ void m68008_device::ori_b_imm8_adr16_dp8() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -4066,7 +4066,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4104,7 +4104,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4143,7 +4143,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -4181,7 +4181,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -4202,7 +4202,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4244,7 +4244,7 @@ void m68008_device::ori_b_imm8_adr32_dp8() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -4276,7 +4276,7 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4313,21 +4313,21 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4335,7 +4335,7 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4374,11 +4374,11 @@ void m68008_device::ori_imm8_ccr_dp8() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4431,7 +4431,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4469,7 +4469,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -4477,7 +4477,7 @@ void m68008_device::ori_w_imm16_ds_dp8() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4530,7 +4530,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4567,11 +4567,11 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -4609,7 +4609,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4651,7 +4651,7 @@ void m68008_device::ori_w_imm16_ais_dp8() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -4702,7 +4702,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4742,12 +4742,12 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4786,7 +4786,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4828,7 +4828,7 @@ void m68008_device::ori_w_imm16_aips_dp8() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -4879,7 +4879,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -4918,7 +4918,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -4926,7 +4926,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4965,7 +4965,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5007,7 +5007,7 @@ void m68008_device::ori_w_imm16_pais_dp8() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -5058,7 +5058,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5095,7 +5095,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5133,11 +5133,11 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -5175,7 +5175,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5217,7 +5217,7 @@ void m68008_device::ori_w_imm16_das_dp8() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -5268,7 +5268,7 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5303,14 +5303,14 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5318,7 +5318,7 @@ void m68008_device::ori_w_imm16_dais_dp8() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5357,7 +5357,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5398,11 +5398,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -5440,7 +5440,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5482,7 +5482,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -5532,7 +5532,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5572,7 +5572,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5610,7 +5610,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -5649,7 +5649,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5691,7 +5691,7 @@ void m68008_device::ori_w_imm16_adr16_dp8() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -5741,7 +5741,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5779,7 +5779,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -5818,7 +5818,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -5856,7 +5856,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -5895,7 +5895,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5937,7 +5937,7 @@ void m68008_device::ori_w_imm16_adr32_dp8() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -5991,7 +5991,7 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6028,23 +6028,23 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -6052,7 +6052,7 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6091,11 +6091,11 @@ void m68008_device::ori_i16u_sr_dp8() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6147,7 +6147,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6185,7 +6185,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6223,12 +6223,12 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6263,7 +6263,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -6272,7 +6272,7 @@ void m68008_device::ori_l_imm32_ds_dp8() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -6292,7 +6292,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6330,7 +6330,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6367,7 +6367,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6407,7 +6407,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6445,7 +6445,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6485,7 +6485,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6525,7 +6525,7 @@ void m68008_device::ori_l_imm32_ais_dp8() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -6575,7 +6575,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6613,7 +6613,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6650,7 +6650,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6690,11 +6690,11 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6732,7 +6732,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6772,7 +6772,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6812,7 +6812,7 @@ void m68008_device::ori_l_imm32_aips_dp8() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -6862,7 +6862,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6900,7 +6900,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -6936,14 +6936,14 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -6982,7 +6982,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -7020,7 +7020,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7060,7 +7060,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7100,7 +7100,7 @@ void m68008_device::ori_l_imm32_pais_dp8() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -7150,7 +7150,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7188,7 +7188,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7225,7 +7225,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7262,7 +7262,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -7302,7 +7302,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -7340,7 +7340,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7380,7 +7380,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7420,7 +7420,7 @@ void m68008_device::ori_l_imm32_das_dp8() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -7470,7 +7470,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7508,7 +7508,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7543,14 +7543,14 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -7558,7 +7558,7 @@ void m68008_device::ori_l_imm32_dais_dp8() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7597,7 +7597,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7637,7 +7637,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -7677,7 +7677,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -7715,7 +7715,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7755,7 +7755,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7795,7 +7795,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -7844,7 +7844,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7882,7 +7882,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -7922,7 +7922,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -7960,7 +7960,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -8000,7 +8000,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -8038,7 +8038,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -8078,7 +8078,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -8118,7 +8118,7 @@ void m68008_device::ori_l_imm32_adr16_dp8() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -8167,7 +8167,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8205,7 +8205,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8243,7 +8243,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8282,7 +8282,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -8320,7 +8320,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -8360,7 +8360,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -8398,7 +8398,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -8438,7 +8438,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -8478,7 +8478,7 @@ void m68008_device::ori_l_imm32_adr32_dp8() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -8532,13 +8532,13 @@ void m68008_device::btst_dd_ds_dp8() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8582,7 +8582,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8596,7 +8596,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8618,7 +8618,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8655,7 +8655,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -8674,7 +8674,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program8.read_interruptible(m_aob);
@@ -8696,7 +8696,7 @@ void m68008_device::movep_w_das_dd_dp8() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8748,11 +8748,11 @@ void m68008_device::btst_dd_ais_dp8() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -8772,13 +8772,13 @@ void m68008_device::btst_dd_ais_dp8() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8833,12 +8833,12 @@ void m68008_device::btst_dd_aips_dp8() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8859,13 +8859,13 @@ void m68008_device::btst_dd_aips_dp8() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -8919,7 +8919,7 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8927,7 +8927,7 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8948,13 +8948,13 @@ void m68008_device::btst_dd_pais_dp8() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9006,7 +9006,7 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9044,11 +9044,11 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -9068,13 +9068,13 @@ void m68008_device::btst_dd_das_dp8() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9124,14 +9124,14 @@ void m68008_device::btst_dd_dais_dp8() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9139,7 +9139,7 @@ void m68008_device::btst_dd_dais_dp8() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9178,7 +9178,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9219,11 +9219,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -9243,13 +9243,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9303,7 +9303,7 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9341,7 +9341,7 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9362,13 +9362,13 @@ void m68008_device::btst_dd_adr16_dp8() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9420,7 +9420,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9459,7 +9459,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9497,7 +9497,7 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -9518,13 +9518,13 @@ void m68008_device::btst_dd_adr32_dp8() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9575,7 +9575,7 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9613,11 +9613,11 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -9637,13 +9637,13 @@ void m68008_device::btst_dd_dpc_dp8() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9692,14 +9692,14 @@ void m68008_device::btst_dd_dpci_dp8() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9707,7 +9707,7 @@ void m68008_device::btst_dd_dpci_dp8() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9746,7 +9746,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9787,11 +9787,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -9811,13 +9811,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9871,7 +9871,7 @@ void m68008_device::btst_dd_imm_dp8() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -9911,12 +9911,12 @@ void m68008_device::btst_dd_imm_dp8() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9960,7 +9960,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -9974,7 +9974,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -10000,13 +10000,13 @@ void m68008_device::bchg_dd_ds_dp8() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10050,7 +10050,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10063,14 +10063,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10092,7 +10092,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10129,7 +10129,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10147,7 +10147,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10166,7 +10166,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10185,7 +10185,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10207,7 +10207,7 @@ void m68008_device::movep_l_das_dd_dp8() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10259,11 +10259,11 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10284,7 +10284,7 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10324,7 +10324,7 @@ void m68008_device::bchg_dd_ais_dp8() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10361,12 +10361,12 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -10388,7 +10388,7 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10428,7 +10428,7 @@ void m68008_device::bchg_dd_aips_dp8() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10464,7 +10464,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10472,7 +10472,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -10494,7 +10494,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10534,7 +10534,7 @@ void m68008_device::bchg_dd_pais_dp8() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10568,7 +10568,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10606,11 +10606,11 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10631,7 +10631,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10671,7 +10671,7 @@ void m68008_device::bchg_dd_das_dp8() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10703,14 +10703,14 @@ void m68008_device::bchg_dd_dais_dp8() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10718,7 +10718,7 @@ void m68008_device::bchg_dd_dais_dp8() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10757,7 +10757,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -10798,11 +10798,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -10823,7 +10823,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10863,7 +10863,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10899,7 +10899,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10937,7 +10937,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10959,7 +10959,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10999,7 +10999,7 @@ void m68008_device::bchg_dd_adr16_dp8() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11033,7 +11033,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11072,7 +11072,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11110,7 +11110,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -11132,7 +11132,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -11172,7 +11172,7 @@ void m68008_device::bchg_dd_adr32_dp8() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11210,13 +11210,13 @@ void m68008_device::bclr_dd_ds_dp8() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -11257,14 +11257,14 @@ void m68008_device::bclr_dd_ds_dp8() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -11277,18 +11277,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -11310,7 +11310,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11349,7 +11349,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -11367,7 +11367,7 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -11386,11 +11386,11 @@ void m68008_device::movep_w_dd_das_dp8() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11442,11 +11442,11 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -11466,12 +11466,12 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11511,7 +11511,7 @@ void m68008_device::bclr_dd_ais_dp8() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11548,12 +11548,12 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -11574,12 +11574,12 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11619,7 +11619,7 @@ void m68008_device::bclr_dd_aips_dp8() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11655,7 +11655,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -11663,7 +11663,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -11684,12 +11684,12 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11729,7 +11729,7 @@ void m68008_device::bclr_dd_pais_dp8() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11763,7 +11763,7 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11801,11 +11801,11 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -11825,12 +11825,12 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -11870,7 +11870,7 @@ void m68008_device::bclr_dd_das_dp8() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11902,14 +11902,14 @@ void m68008_device::bclr_dd_dais_dp8() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11917,7 +11917,7 @@ void m68008_device::bclr_dd_dais_dp8() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11956,7 +11956,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -11997,11 +11997,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -12021,12 +12021,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -12066,7 +12066,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12102,7 +12102,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -12140,7 +12140,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12161,12 +12161,12 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -12206,7 +12206,7 @@ void m68008_device::bclr_dd_adr16_dp8() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12240,7 +12240,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -12279,7 +12279,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12317,7 +12317,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -12338,12 +12338,12 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -12383,7 +12383,7 @@ void m68008_device::bclr_dd_adr32_dp8() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12421,13 +12421,13 @@ void m68008_device::bset_dd_ds_dp8() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -12471,7 +12471,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -12484,14 +12484,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -12513,7 +12513,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -12551,7 +12551,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -12569,7 +12569,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -12588,7 +12588,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -12606,7 +12606,7 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -12625,11 +12625,11 @@ void m68008_device::movep_l_dd_das_dp8() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -12681,11 +12681,11 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -12706,7 +12706,7 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12746,7 +12746,7 @@ void m68008_device::bset_dd_ais_dp8() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12783,12 +12783,12 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -12810,7 +12810,7 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12850,7 +12850,7 @@ void m68008_device::bset_dd_aips_dp8() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12886,7 +12886,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12894,7 +12894,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -12916,7 +12916,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12956,7 +12956,7 @@ void m68008_device::bset_dd_pais_dp8() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12990,7 +12990,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13028,11 +13028,11 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -13053,7 +13053,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13093,7 +13093,7 @@ void m68008_device::bset_dd_das_dp8() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13125,14 +13125,14 @@ void m68008_device::bset_dd_dais_dp8() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -13140,7 +13140,7 @@ void m68008_device::bset_dd_dais_dp8() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13179,7 +13179,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13220,11 +13220,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -13245,7 +13245,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13285,7 +13285,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13321,7 +13321,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -13359,7 +13359,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13381,7 +13381,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13421,7 +13421,7 @@ void m68008_device::bset_dd_adr16_dp8() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13455,7 +13455,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13494,7 +13494,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -13532,7 +13532,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -13554,7 +13554,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -13594,7 +13594,7 @@ void m68008_device::bset_dd_adr32_dp8() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13629,7 +13629,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13667,7 +13667,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -13675,7 +13675,7 @@ void m68008_device::andi_b_imm8_ds_dp8() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13728,7 +13728,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13765,11 +13765,11 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -13789,7 +13789,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13831,7 +13831,7 @@ void m68008_device::andi_b_imm8_ais_dp8() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -13864,7 +13864,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -13904,12 +13904,12 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13930,7 +13930,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13972,7 +13972,7 @@ void m68008_device::andi_b_imm8_aips_dp8() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14005,7 +14005,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14044,7 +14044,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -14052,7 +14052,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -14073,7 +14073,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14115,7 +14115,7 @@ void m68008_device::andi_b_imm8_pais_dp8() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14148,7 +14148,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14185,7 +14185,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14223,11 +14223,11 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -14247,7 +14247,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14289,7 +14289,7 @@ void m68008_device::andi_b_imm8_das_dp8() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14322,7 +14322,7 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14357,14 +14357,14 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -14372,7 +14372,7 @@ void m68008_device::andi_b_imm8_dais_dp8() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14411,7 +14411,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14452,11 +14452,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -14476,7 +14476,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14518,7 +14518,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14550,7 +14550,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14590,7 +14590,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14628,7 +14628,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14649,7 +14649,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14691,7 +14691,7 @@ void m68008_device::andi_b_imm8_adr16_dp8() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14723,7 +14723,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14761,7 +14761,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14800,7 +14800,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -14838,7 +14838,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -14859,7 +14859,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14901,7 +14901,7 @@ void m68008_device::andi_b_imm8_adr32_dp8() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -14933,7 +14933,7 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -14970,21 +14970,21 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -14992,7 +14992,7 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15031,11 +15031,11 @@ void m68008_device::andi_imm8_ccr_dp8() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15088,7 +15088,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15126,7 +15126,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -15134,7 +15134,7 @@ void m68008_device::andi_w_imm16_ds_dp8() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15187,7 +15187,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15224,11 +15224,11 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -15266,7 +15266,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15308,7 +15308,7 @@ void m68008_device::andi_w_imm16_ais_dp8() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -15359,7 +15359,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15399,12 +15399,12 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15443,7 +15443,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15485,7 +15485,7 @@ void m68008_device::andi_w_imm16_aips_dp8() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -15536,7 +15536,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15575,7 +15575,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -15583,7 +15583,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15622,7 +15622,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15664,7 +15664,7 @@ void m68008_device::andi_w_imm16_pais_dp8() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -15715,7 +15715,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15752,7 +15752,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15790,11 +15790,11 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -15832,7 +15832,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15874,7 +15874,7 @@ void m68008_device::andi_w_imm16_das_dp8() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -15925,7 +15925,7 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -15960,14 +15960,14 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -15975,7 +15975,7 @@ void m68008_device::andi_w_imm16_dais_dp8() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16014,7 +16014,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16055,11 +16055,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -16097,7 +16097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16139,7 +16139,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -16189,7 +16189,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16229,7 +16229,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -16267,7 +16267,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -16306,7 +16306,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16348,7 +16348,7 @@ void m68008_device::andi_w_imm16_adr16_dp8() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -16398,7 +16398,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16436,7 +16436,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16475,7 +16475,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -16513,7 +16513,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -16552,7 +16552,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16594,7 +16594,7 @@ void m68008_device::andi_w_imm16_adr32_dp8() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -16648,7 +16648,7 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16685,23 +16685,23 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -16709,7 +16709,7 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16748,11 +16748,11 @@ void m68008_device::andi_i16u_sr_dp8() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16804,7 +16804,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16842,7 +16842,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16880,12 +16880,12 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16920,7 +16920,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -16929,7 +16929,7 @@ void m68008_device::andi_l_imm32_ds_dp8() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -16949,7 +16949,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -16987,7 +16987,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17024,7 +17024,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -17064,7 +17064,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -17102,7 +17102,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17142,7 +17142,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17182,7 +17182,7 @@ void m68008_device::andi_l_imm32_ais_dp8() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -17232,7 +17232,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17270,7 +17270,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17307,7 +17307,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -17347,11 +17347,11 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -17389,7 +17389,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17429,7 +17429,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17469,7 +17469,7 @@ void m68008_device::andi_l_imm32_aips_dp8() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -17519,7 +17519,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17557,7 +17557,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17593,14 +17593,14 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -17639,7 +17639,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -17677,7 +17677,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17717,7 +17717,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17757,7 +17757,7 @@ void m68008_device::andi_l_imm32_pais_dp8() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -17807,7 +17807,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17845,7 +17845,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17882,7 +17882,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -17919,7 +17919,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -17959,7 +17959,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -17997,7 +17997,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18037,7 +18037,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18077,7 +18077,7 @@ void m68008_device::andi_l_imm32_das_dp8() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -18127,7 +18127,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18165,7 +18165,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18200,14 +18200,14 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -18215,7 +18215,7 @@ void m68008_device::andi_l_imm32_dais_dp8() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18254,7 +18254,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18294,7 +18294,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -18334,7 +18334,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -18372,7 +18372,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18412,7 +18412,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18452,7 +18452,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -18501,7 +18501,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18539,7 +18539,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18579,7 +18579,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -18617,7 +18617,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -18657,7 +18657,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -18695,7 +18695,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18735,7 +18735,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18775,7 +18775,7 @@ void m68008_device::andi_l_imm32_adr16_dp8() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -18824,7 +18824,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18862,7 +18862,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18900,7 +18900,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -18939,7 +18939,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -18977,7 +18977,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -19017,7 +19017,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -19055,7 +19055,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19095,7 +19095,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -19135,7 +19135,7 @@ void m68008_device::andi_l_imm32_adr32_dp8() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -19223,7 +19223,7 @@ void m68008_device::subi_b_imm8_ds_dp8() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19319,7 +19319,7 @@ void m68008_device::subi_b_imm8_ais_dp8() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19342,7 +19342,7 @@ void m68008_device::subi_b_imm8_ais_dp8() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19458,7 +19458,7 @@ void m68008_device::subi_b_imm8_aips_dp8() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19479,7 +19479,7 @@ void m68008_device::subi_b_imm8_aips_dp8() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19597,7 +19597,7 @@ void m68008_device::subi_b_imm8_pais_dp8() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19618,7 +19618,7 @@ void m68008_device::subi_b_imm8_pais_dp8() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19765,7 +19765,7 @@ void m68008_device::subi_b_imm8_das_dp8() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19788,7 +19788,7 @@ void m68008_device::subi_b_imm8_das_dp8() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19896,7 +19896,7 @@ void m68008_device::subi_b_imm8_dais_dp8() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19988,7 +19988,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20011,7 +20011,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20159,7 +20159,7 @@ void m68008_device::subi_b_imm8_adr16_dp8() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -20180,7 +20180,7 @@ void m68008_device::subi_b_imm8_adr16_dp8() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20364,7 +20364,7 @@ void m68008_device::subi_b_imm8_adr32_dp8() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -20385,7 +20385,7 @@ void m68008_device::subi_b_imm8_adr32_dp8() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20496,7 +20496,7 @@ void m68008_device::subi_w_imm16_ds_dp8() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -20592,7 +20592,7 @@ void m68008_device::subi_w_imm16_ais_dp8() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20633,7 +20633,7 @@ void m68008_device::subi_w_imm16_ais_dp8() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20767,7 +20767,7 @@ void m68008_device::subi_w_imm16_aips_dp8() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20806,7 +20806,7 @@ void m68008_device::subi_w_imm16_aips_dp8() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20942,7 +20942,7 @@ void m68008_device::subi_w_imm16_pais_dp8() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20981,7 +20981,7 @@ void m68008_device::subi_w_imm16_pais_dp8() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21146,7 +21146,7 @@ void m68008_device::subi_w_imm16_das_dp8() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21187,7 +21187,7 @@ void m68008_device::subi_w_imm16_das_dp8() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21313,7 +21313,7 @@ void m68008_device::subi_w_imm16_dais_dp8() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -21405,7 +21405,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21446,7 +21446,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21612,7 +21612,7 @@ void m68008_device::subi_w_imm16_adr16_dp8() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -21651,7 +21651,7 @@ void m68008_device::subi_w_imm16_adr16_dp8() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21853,7 +21853,7 @@ void m68008_device::subi_w_imm16_adr32_dp8() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -21892,7 +21892,7 @@ void m68008_device::subi_w_imm16_adr32_dp8() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22057,7 +22057,7 @@ void m68008_device::subi_l_imm32_ds_dp8() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -22096,7 +22096,7 @@ void m68008_device::subi_l_imm32_ds_dp8() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -22197,7 +22197,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22274,7 +22274,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22314,7 +22314,7 @@ void m68008_device::subi_l_imm32_ais_dp8() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22476,7 +22476,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22556,7 +22556,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22596,7 +22596,7 @@ void m68008_device::subi_l_imm32_aips_dp8() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22757,7 +22757,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -22839,7 +22839,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22879,7 +22879,7 @@ void m68008_device::subi_l_imm32_pais_dp8() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23077,7 +23077,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23154,7 +23154,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23194,7 +23194,7 @@ void m68008_device::subi_l_imm32_das_dp8() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23354,7 +23354,7 @@ void m68008_device::subi_l_imm32_dais_dp8() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -23445,7 +23445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23522,7 +23522,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23562,7 +23562,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23762,7 +23762,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23839,7 +23839,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23879,7 +23879,7 @@ void m68008_device::subi_l_imm32_adr16_dp8() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24115,7 +24115,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -24192,7 +24192,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24232,7 +24232,7 @@ void m68008_device::subi_l_imm32_adr32_dp8() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24359,7 +24359,7 @@ void m68008_device::addi_b_imm8_ds_dp8() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -24455,7 +24455,7 @@ void m68008_device::addi_b_imm8_ais_dp8() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -24478,7 +24478,7 @@ void m68008_device::addi_b_imm8_ais_dp8() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24594,7 +24594,7 @@ void m68008_device::addi_b_imm8_aips_dp8() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24615,7 +24615,7 @@ void m68008_device::addi_b_imm8_aips_dp8() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24733,7 +24733,7 @@ void m68008_device::addi_b_imm8_pais_dp8() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24754,7 +24754,7 @@ void m68008_device::addi_b_imm8_pais_dp8() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24901,7 +24901,7 @@ void m68008_device::addi_b_imm8_das_dp8() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -24924,7 +24924,7 @@ void m68008_device::addi_b_imm8_das_dp8() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25032,7 +25032,7 @@ void m68008_device::addi_b_imm8_dais_dp8() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -25124,7 +25124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -25147,7 +25147,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25295,7 +25295,7 @@ void m68008_device::addi_b_imm8_adr16_dp8() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -25316,7 +25316,7 @@ void m68008_device::addi_b_imm8_adr16_dp8() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25500,7 +25500,7 @@ void m68008_device::addi_b_imm8_adr32_dp8() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -25521,7 +25521,7 @@ void m68008_device::addi_b_imm8_adr32_dp8() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25632,7 +25632,7 @@ void m68008_device::addi_w_imm16_ds_dp8() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -25728,7 +25728,7 @@ void m68008_device::addi_w_imm16_ais_dp8() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -25769,7 +25769,7 @@ void m68008_device::addi_w_imm16_ais_dp8() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25903,7 +25903,7 @@ void m68008_device::addi_w_imm16_aips_dp8() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25942,7 +25942,7 @@ void m68008_device::addi_w_imm16_aips_dp8() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26078,7 +26078,7 @@ void m68008_device::addi_w_imm16_pais_dp8() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26117,7 +26117,7 @@ void m68008_device::addi_w_imm16_pais_dp8() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26282,7 +26282,7 @@ void m68008_device::addi_w_imm16_das_dp8() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -26323,7 +26323,7 @@ void m68008_device::addi_w_imm16_das_dp8() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26449,7 +26449,7 @@ void m68008_device::addi_w_imm16_dais_dp8() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -26541,7 +26541,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -26582,7 +26582,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26748,7 +26748,7 @@ void m68008_device::addi_w_imm16_adr16_dp8() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -26787,7 +26787,7 @@ void m68008_device::addi_w_imm16_adr16_dp8() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26989,7 +26989,7 @@ void m68008_device::addi_w_imm16_adr32_dp8() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -27028,7 +27028,7 @@ void m68008_device::addi_w_imm16_adr32_dp8() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27193,7 +27193,7 @@ void m68008_device::addi_l_imm32_ds_dp8() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -27232,7 +27232,7 @@ void m68008_device::addi_l_imm32_ds_dp8() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -27333,7 +27333,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -27410,7 +27410,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27450,7 +27450,7 @@ void m68008_device::addi_l_imm32_ais_dp8() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -27612,7 +27612,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -27692,7 +27692,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27732,7 +27732,7 @@ void m68008_device::addi_l_imm32_aips_dp8() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -27893,7 +27893,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -27975,7 +27975,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28015,7 +28015,7 @@ void m68008_device::addi_l_imm32_pais_dp8() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28213,7 +28213,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28290,7 +28290,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28330,7 +28330,7 @@ void m68008_device::addi_l_imm32_das_dp8() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28490,7 +28490,7 @@ void m68008_device::addi_l_imm32_dais_dp8() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -28581,7 +28581,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28658,7 +28658,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28698,7 +28698,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28898,7 +28898,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28975,7 +28975,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29015,7 +29015,7 @@ void m68008_device::addi_l_imm32_adr16_dp8() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -29251,7 +29251,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -29328,7 +29328,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29368,7 +29368,7 @@ void m68008_device::addi_l_imm32_adr32_dp8() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -29458,7 +29458,7 @@ void m68008_device::btst_imm8_ds_dp8() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29499,13 +29499,13 @@ void m68008_device::btst_imm8_ds_dp8() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -29549,7 +29549,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29563,7 +29563,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29586,7 +29586,7 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29623,11 +29623,11 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -29647,13 +29647,13 @@ void m68008_device::btst_imm8_ais_dp8() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29706,7 +29706,7 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29746,12 +29746,12 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29772,13 +29772,13 @@ void m68008_device::btst_imm8_aips_dp8() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29831,7 +29831,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29870,7 +29870,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -29878,7 +29878,7 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29899,13 +29899,13 @@ void m68008_device::btst_imm8_pais_dp8() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29958,7 +29958,7 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -29995,7 +29995,7 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30033,11 +30033,11 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -30057,13 +30057,13 @@ void m68008_device::btst_imm8_das_dp8() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30116,7 +30116,7 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30151,14 +30151,14 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -30166,7 +30166,7 @@ void m68008_device::btst_imm8_dais_dp8() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30205,7 +30205,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30246,11 +30246,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -30270,13 +30270,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30328,7 +30328,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30368,7 +30368,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30406,7 +30406,7 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30427,13 +30427,13 @@ void m68008_device::btst_imm8_adr16_dp8() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30485,7 +30485,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30523,7 +30523,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30562,7 +30562,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -30600,7 +30600,7 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -30621,13 +30621,13 @@ void m68008_device::btst_imm8_adr32_dp8() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30679,7 +30679,7 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30716,7 +30716,7 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30754,11 +30754,11 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -30778,13 +30778,13 @@ void m68008_device::btst_imm8_dpc_dp8() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30836,7 +30836,7 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30871,14 +30871,14 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -30886,7 +30886,7 @@ void m68008_device::btst_imm8_dpci_dp8() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30925,7 +30925,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -30966,11 +30966,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -30990,13 +30990,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31049,7 +31049,7 @@ void m68008_device::bchg_imm8_ds_dp8() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31090,13 +31090,13 @@ void m68008_device::bchg_imm8_ds_dp8() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -31140,7 +31140,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -31153,14 +31153,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -31183,7 +31183,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31220,11 +31220,11 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -31245,7 +31245,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31285,7 +31285,7 @@ void m68008_device::bchg_imm8_ais_dp8() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31320,7 +31320,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31360,12 +31360,12 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31387,7 +31387,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31427,7 +31427,7 @@ void m68008_device::bchg_imm8_aips_dp8() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31462,7 +31462,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31501,7 +31501,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -31509,7 +31509,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31531,7 +31531,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31571,7 +31571,7 @@ void m68008_device::bchg_imm8_pais_dp8() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31643,7 +31643,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31681,11 +31681,11 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -31706,7 +31706,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -31746,7 +31746,7 @@ void m68008_device::bchg_imm8_das_dp8() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31781,7 +31781,7 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31816,14 +31816,14 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -31831,7 +31831,7 @@ void m68008_device::bchg_imm8_dais_dp8() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31870,7 +31870,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -31911,11 +31911,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -31936,7 +31936,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -31976,7 +31976,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32010,7 +32010,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32050,7 +32050,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -32088,7 +32088,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -32110,7 +32110,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -32150,7 +32150,7 @@ void m68008_device::bchg_imm8_adr16_dp8() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32184,7 +32184,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32222,7 +32222,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32261,7 +32261,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -32299,7 +32299,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -32321,7 +32321,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -32361,7 +32361,7 @@ void m68008_device::bchg_imm8_adr32_dp8() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32396,7 +32396,7 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32437,13 +32437,13 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -32484,14 +32484,14 @@ void m68008_device::bclr_imm8_ds_dp8() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -32504,18 +32504,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -32538,7 +32538,7 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32575,11 +32575,11 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -32599,12 +32599,12 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32644,7 +32644,7 @@ void m68008_device::bclr_imm8_ais_dp8() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32679,7 +32679,7 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32719,12 +32719,12 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32745,12 +32745,12 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32790,7 +32790,7 @@ void m68008_device::bclr_imm8_aips_dp8() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32825,7 +32825,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -32864,7 +32864,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -32872,7 +32872,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32893,12 +32893,12 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32938,7 +32938,7 @@ void m68008_device::bclr_imm8_pais_dp8() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32973,7 +32973,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33010,7 +33010,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33048,11 +33048,11 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -33072,12 +33072,12 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33117,7 +33117,7 @@ void m68008_device::bclr_imm8_das_dp8() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33152,7 +33152,7 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33187,14 +33187,14 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -33202,7 +33202,7 @@ void m68008_device::bclr_imm8_dais_dp8() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33241,7 +33241,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33282,11 +33282,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -33306,12 +33306,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33351,7 +33351,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33385,7 +33385,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33425,7 +33425,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -33463,7 +33463,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -33484,12 +33484,12 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33529,7 +33529,7 @@ void m68008_device::bclr_imm8_adr16_dp8() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33563,7 +33563,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33601,7 +33601,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33640,7 +33640,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -33678,7 +33678,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -33699,12 +33699,12 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -33744,7 +33744,7 @@ void m68008_device::bclr_imm8_adr32_dp8() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33779,7 +33779,7 @@ void m68008_device::bset_imm8_ds_dp8() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33820,13 +33820,13 @@ void m68008_device::bset_imm8_ds_dp8() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -33870,7 +33870,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -33883,14 +33883,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -33913,7 +33913,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -33950,11 +33950,11 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -33975,7 +33975,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34015,7 +34015,7 @@ void m68008_device::bset_imm8_ais_dp8() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34050,7 +34050,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34090,12 +34090,12 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34117,7 +34117,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34157,7 +34157,7 @@ void m68008_device::bset_imm8_aips_dp8() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34192,7 +34192,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34231,7 +34231,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -34239,7 +34239,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34261,7 +34261,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34301,7 +34301,7 @@ void m68008_device::bset_imm8_pais_dp8() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34336,7 +34336,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34373,7 +34373,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34411,11 +34411,11 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -34436,7 +34436,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34476,7 +34476,7 @@ void m68008_device::bset_imm8_das_dp8() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34511,7 +34511,7 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34546,14 +34546,14 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -34561,7 +34561,7 @@ void m68008_device::bset_imm8_dais_dp8() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34600,7 +34600,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34641,11 +34641,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -34666,7 +34666,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34706,7 +34706,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34740,7 +34740,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34780,7 +34780,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -34818,7 +34818,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34840,7 +34840,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34880,7 +34880,7 @@ void m68008_device::bset_imm8_adr16_dp8() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34914,7 +34914,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34952,7 +34952,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -34991,7 +34991,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -35029,7 +35029,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -35051,7 +35051,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -35091,7 +35091,7 @@ void m68008_device::bset_imm8_adr32_dp8() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -35126,7 +35126,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35164,7 +35164,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -35172,7 +35172,7 @@ void m68008_device::eori_b_imm8_ds_dp8() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35225,7 +35225,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35262,11 +35262,11 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -35286,7 +35286,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35328,7 +35328,7 @@ void m68008_device::eori_b_imm8_ais_dp8() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -35361,7 +35361,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35401,12 +35401,12 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35427,7 +35427,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35469,7 +35469,7 @@ void m68008_device::eori_b_imm8_aips_dp8() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -35502,7 +35502,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35541,7 +35541,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -35549,7 +35549,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35570,7 +35570,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35612,7 +35612,7 @@ void m68008_device::eori_b_imm8_pais_dp8() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -35645,7 +35645,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35682,7 +35682,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35720,11 +35720,11 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -35744,7 +35744,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35786,7 +35786,7 @@ void m68008_device::eori_b_imm8_das_dp8() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -35819,7 +35819,7 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35854,14 +35854,14 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -35869,7 +35869,7 @@ void m68008_device::eori_b_imm8_dais_dp8() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35908,7 +35908,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -35949,11 +35949,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob);
@@ -35973,7 +35973,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36015,7 +36015,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -36047,7 +36047,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36087,7 +36087,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -36125,7 +36125,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -36146,7 +36146,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36188,7 +36188,7 @@ void m68008_device::eori_b_imm8_adr16_dp8() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -36220,7 +36220,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36258,7 +36258,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36297,7 +36297,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -36335,7 +36335,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -36356,7 +36356,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36398,7 +36398,7 @@ void m68008_device::eori_b_imm8_adr32_dp8() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -36430,7 +36430,7 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36467,21 +36467,21 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -36489,7 +36489,7 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36528,11 +36528,11 @@ void m68008_device::eori_imm8_ccr_dp8() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36585,7 +36585,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36623,7 +36623,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -36631,7 +36631,7 @@ void m68008_device::eori_w_imm16_ds_dp8() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36684,7 +36684,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36721,11 +36721,11 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -36763,7 +36763,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36805,7 +36805,7 @@ void m68008_device::eori_w_imm16_ais_dp8() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -36856,7 +36856,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -36896,12 +36896,12 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -36940,7 +36940,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36982,7 +36982,7 @@ void m68008_device::eori_w_imm16_aips_dp8() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -37033,7 +37033,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37072,7 +37072,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -37080,7 +37080,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37119,7 +37119,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37161,7 +37161,7 @@ void m68008_device::eori_w_imm16_pais_dp8() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -37212,7 +37212,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37249,7 +37249,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37287,11 +37287,11 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37329,7 +37329,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37371,7 +37371,7 @@ void m68008_device::eori_w_imm16_das_dp8() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -37422,7 +37422,7 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37457,14 +37457,14 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -37472,7 +37472,7 @@ void m68008_device::eori_w_imm16_dais_dp8() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37511,7 +37511,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37552,11 +37552,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -37594,7 +37594,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37636,7 +37636,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -37686,7 +37686,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37726,7 +37726,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -37764,7 +37764,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -37803,7 +37803,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37845,7 +37845,7 @@ void m68008_device::eori_w_imm16_adr16_dp8() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -37895,7 +37895,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37933,7 +37933,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -37972,7 +37972,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -38010,7 +38010,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -38049,7 +38049,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38091,7 +38091,7 @@ void m68008_device::eori_w_imm16_adr32_dp8() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -38145,7 +38145,7 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38182,23 +38182,23 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -38206,7 +38206,7 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38245,11 +38245,11 @@ void m68008_device::eori_i16u_sr_dp8() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38301,7 +38301,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38339,7 +38339,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38377,12 +38377,12 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38417,7 +38417,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -38426,7 +38426,7 @@ void m68008_device::eori_l_imm32_ds_dp8() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -38446,7 +38446,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38484,7 +38484,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38521,7 +38521,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -38561,7 +38561,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38599,7 +38599,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38639,7 +38639,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -38679,7 +38679,7 @@ void m68008_device::eori_l_imm32_ais_dp8() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -38729,7 +38729,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38767,7 +38767,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -38804,7 +38804,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -38844,11 +38844,11 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -38886,7 +38886,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38926,7 +38926,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -38966,7 +38966,7 @@ void m68008_device::eori_l_imm32_aips_dp8() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -39016,7 +39016,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39054,7 +39054,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39090,14 +39090,14 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -39136,7 +39136,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -39174,7 +39174,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39214,7 +39214,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39254,7 +39254,7 @@ void m68008_device::eori_l_imm32_pais_dp8() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -39304,7 +39304,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39342,7 +39342,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39379,7 +39379,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39416,7 +39416,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -39456,7 +39456,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -39494,7 +39494,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39534,7 +39534,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39574,7 +39574,7 @@ void m68008_device::eori_l_imm32_das_dp8() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -39624,7 +39624,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39662,7 +39662,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39697,14 +39697,14 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -39712,7 +39712,7 @@ void m68008_device::eori_l_imm32_dais_dp8() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39751,7 +39751,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -39791,7 +39791,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -39831,7 +39831,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -39869,7 +39869,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39909,7 +39909,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39949,7 +39949,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -39998,7 +39998,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -40036,7 +40036,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -40076,7 +40076,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -40114,7 +40114,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -40154,7 +40154,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -40192,7 +40192,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -40272,7 +40272,7 @@ void m68008_device::eori_l_imm32_adr16_dp8() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -40321,7 +40321,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -40359,7 +40359,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -40397,7 +40397,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -40436,7 +40436,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -40474,7 +40474,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -40514,7 +40514,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -40552,7 +40552,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40592,7 +40592,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -40632,7 +40632,7 @@ void m68008_device::eori_l_imm32_adr32_dp8() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -40720,7 +40720,7 @@ void m68008_device::cmpi_b_imm8_ds_dp8() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -40815,7 +40815,7 @@ void m68008_device::cmpi_b_imm8_ais_dp8() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -40838,7 +40838,7 @@ void m68008_device::cmpi_b_imm8_ais_dp8() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -40938,7 +40938,7 @@ void m68008_device::cmpi_b_imm8_aips_dp8() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -40959,7 +40959,7 @@ void m68008_device::cmpi_b_imm8_aips_dp8() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41061,7 +41061,7 @@ void m68008_device::cmpi_b_imm8_pais_dp8() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41082,7 +41082,7 @@ void m68008_device::cmpi_b_imm8_pais_dp8() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41213,7 +41213,7 @@ void m68008_device::cmpi_b_imm8_das_dp8() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -41236,7 +41236,7 @@ void m68008_device::cmpi_b_imm8_das_dp8() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41328,7 +41328,7 @@ void m68008_device::cmpi_b_imm8_dais_dp8() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41420,7 +41420,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -41443,7 +41443,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41575,7 +41575,7 @@ void m68008_device::cmpi_b_imm8_adr16_dp8() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -41596,7 +41596,7 @@ void m68008_device::cmpi_b_imm8_adr16_dp8() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41764,7 +41764,7 @@ void m68008_device::cmpi_b_imm8_adr32_dp8() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -41785,7 +41785,7 @@ void m68008_device::cmpi_b_imm8_adr32_dp8() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41880,7 +41880,7 @@ void m68008_device::cmpi_w_imm16_ds_dp8() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -41975,7 +41975,7 @@ void m68008_device::cmpi_w_imm16_ais_dp8() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42016,7 +42016,7 @@ void m68008_device::cmpi_w_imm16_ais_dp8() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42116,7 +42116,7 @@ void m68008_device::cmpi_w_imm16_aips_dp8() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -42155,7 +42155,7 @@ void m68008_device::cmpi_w_imm16_aips_dp8() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42257,7 +42257,7 @@ void m68008_device::cmpi_w_imm16_pais_dp8() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -42296,7 +42296,7 @@ void m68008_device::cmpi_w_imm16_pais_dp8() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42427,7 +42427,7 @@ void m68008_device::cmpi_w_imm16_das_dp8() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42468,7 +42468,7 @@ void m68008_device::cmpi_w_imm16_das_dp8() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42560,7 +42560,7 @@ void m68008_device::cmpi_w_imm16_dais_dp8() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42652,7 +42652,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42693,7 +42693,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42825,7 +42825,7 @@ void m68008_device::cmpi_w_imm16_adr16_dp8() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -42864,7 +42864,7 @@ void m68008_device::cmpi_w_imm16_adr16_dp8() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -43032,7 +43032,7 @@ void m68008_device::cmpi_w_imm16_adr32_dp8() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -43071,7 +43071,7 @@ void m68008_device::cmpi_w_imm16_adr32_dp8() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -43203,11 +43203,11 @@ void m68008_device::cmpi_l_imm32_ds_dp8() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43339,7 +43339,7 @@ void m68008_device::cmpi_l_imm32_ais_dp8() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -43416,13 +43416,13 @@ void m68008_device::cmpi_l_imm32_ais_dp8() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43549,7 +43549,7 @@ void m68008_device::cmpi_l_imm32_aips_dp8() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -43629,13 +43629,13 @@ void m68008_device::cmpi_l_imm32_aips_dp8() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43761,7 +43761,7 @@ void m68008_device::cmpi_l_imm32_pais_dp8() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -43843,13 +43843,13 @@ void m68008_device::cmpi_l_imm32_pais_dp8() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44012,7 +44012,7 @@ void m68008_device::cmpi_l_imm32_das_dp8() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44089,13 +44089,13 @@ void m68008_device::cmpi_l_imm32_das_dp8() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44220,7 +44220,7 @@ void m68008_device::cmpi_l_imm32_dais_dp8() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44311,7 +44311,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44388,13 +44388,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44559,7 +44559,7 @@ void m68008_device::cmpi_l_imm32_adr16_dp8() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44636,13 +44636,13 @@ void m68008_device::cmpi_l_imm32_adr16_dp8() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44843,7 +44843,7 @@ void m68008_device::cmpi_l_imm32_adr32_dp8() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -44920,13 +44920,13 @@ void m68008_device::cmpi_l_imm32_adr32_dp8() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44983,7 +44983,7 @@ void m68008_device::move_b_ds_dd_dp8() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -45042,7 +45042,7 @@ void m68008_device::move_b_ais_dd_dp8() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45066,7 +45066,7 @@ void m68008_device::move_b_ais_dd_dp8() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45129,7 +45129,7 @@ void m68008_device::move_b_aips_dd_dp8() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45151,7 +45151,7 @@ void m68008_device::move_b_aips_dd_dp8() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45216,7 +45216,7 @@ void m68008_device::move_b_pais_dd_dp8() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45238,7 +45238,7 @@ void m68008_device::move_b_pais_dd_dp8() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45332,7 +45332,7 @@ void m68008_device::move_b_das_dd_dp8() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45356,7 +45356,7 @@ void m68008_device::move_b_das_dd_dp8() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45411,7 +45411,7 @@ void m68008_device::move_b_dais_dd_dp8() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45503,7 +45503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45527,7 +45527,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45622,7 +45622,7 @@ void m68008_device::move_b_adr16_dd_dp8() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -45644,7 +45644,7 @@ void m68008_device::move_b_adr16_dd_dp8() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45775,7 +45775,7 @@ void m68008_device::move_b_adr32_dd_dp8() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -45797,7 +45797,7 @@ void m68008_device::move_b_adr32_dd_dp8() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45890,7 +45890,7 @@ void m68008_device::move_b_dpc_dd_dp8() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45914,7 +45914,7 @@ void m68008_device::move_b_dpc_dd_dp8() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45968,7 +45968,7 @@ void m68008_device::move_b_dpci_dd_dp8() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46060,7 +46060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -46084,7 +46084,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -46182,7 +46182,7 @@ void m68008_device::move_b_imm8_dd_dp8() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -46244,7 +46244,7 @@ void m68008_device::move_b_ds_aid_dp8() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46318,7 +46318,7 @@ void m68008_device::move_b_ais_aid_dp8() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46341,7 +46341,7 @@ void m68008_device::move_b_ais_aid_dp8() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46421,7 +46421,7 @@ void m68008_device::move_b_aips_aid_dp8() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46442,7 +46442,7 @@ void m68008_device::move_b_aips_aid_dp8() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46524,7 +46524,7 @@ void m68008_device::move_b_pais_aid_dp8() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46545,7 +46545,7 @@ void m68008_device::move_b_pais_aid_dp8() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46656,7 +46656,7 @@ void m68008_device::move_b_das_aid_dp8() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46679,7 +46679,7 @@ void m68008_device::move_b_das_aid_dp8() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46751,7 +46751,7 @@ void m68008_device::move_b_dais_aid_dp8() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46843,7 +46843,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46866,7 +46866,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46978,7 +46978,7 @@ void m68008_device::move_b_adr16_aid_dp8() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46999,7 +46999,7 @@ void m68008_device::move_b_adr16_aid_dp8() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47147,7 +47147,7 @@ void m68008_device::move_b_adr32_aid_dp8() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -47168,7 +47168,7 @@ void m68008_device::move_b_adr32_aid_dp8() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47278,7 +47278,7 @@ void m68008_device::move_b_dpc_aid_dp8() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47301,7 +47301,7 @@ void m68008_device::move_b_dpc_aid_dp8() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47372,7 +47372,7 @@ void m68008_device::move_b_dpci_aid_dp8() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -47464,7 +47464,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47487,7 +47487,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47602,7 +47602,7 @@ void m68008_device::move_b_imm8_aid_dp8() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47679,7 +47679,7 @@ void m68008_device::move_b_ds_aipd_dp8() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47752,7 +47752,7 @@ void m68008_device::move_b_ais_aipd_dp8() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47776,7 +47776,7 @@ void m68008_device::move_b_ais_aipd_dp8() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47855,7 +47855,7 @@ void m68008_device::move_b_aips_aipd_dp8() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47877,7 +47877,7 @@ void m68008_device::move_b_aips_aipd_dp8() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47958,7 +47958,7 @@ void m68008_device::move_b_pais_aipd_dp8() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47980,7 +47980,7 @@ void m68008_device::move_b_pais_aipd_dp8() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48090,7 +48090,7 @@ void m68008_device::move_b_das_aipd_dp8() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48114,7 +48114,7 @@ void m68008_device::move_b_das_aipd_dp8() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48185,7 +48185,7 @@ void m68008_device::move_b_dais_aipd_dp8() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48277,7 +48277,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48301,7 +48301,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48412,7 +48412,7 @@ void m68008_device::move_b_adr16_aipd_dp8() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -48434,7 +48434,7 @@ void m68008_device::move_b_adr16_aipd_dp8() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48581,7 +48581,7 @@ void m68008_device::move_b_adr32_aipd_dp8() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -48603,7 +48603,7 @@ void m68008_device::move_b_adr32_aipd_dp8() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48712,7 +48712,7 @@ void m68008_device::move_b_dpc_aipd_dp8() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48736,7 +48736,7 @@ void m68008_device::move_b_dpc_aipd_dp8() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48806,7 +48806,7 @@ void m68008_device::move_b_dpci_aipd_dp8() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48898,7 +48898,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48922,7 +48922,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49036,7 +49036,7 @@ void m68008_device::move_b_imm8_aipd_dp8() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49111,7 +49111,7 @@ void m68008_device::move_b_ds_paid_dp8() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49185,7 +49185,7 @@ void m68008_device::move_b_ais_paid_dp8() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49208,7 +49208,7 @@ void m68008_device::move_b_ais_paid_dp8() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49288,7 +49288,7 @@ void m68008_device::move_b_aips_paid_dp8() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -49309,7 +49309,7 @@ void m68008_device::move_b_aips_paid_dp8() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49391,7 +49391,7 @@ void m68008_device::move_b_pais_paid_dp8() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -49412,7 +49412,7 @@ void m68008_device::move_b_pais_paid_dp8() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49523,7 +49523,7 @@ void m68008_device::move_b_das_paid_dp8() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49546,7 +49546,7 @@ void m68008_device::move_b_das_paid_dp8() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49618,7 +49618,7 @@ void m68008_device::move_b_dais_paid_dp8() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -49710,7 +49710,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49733,7 +49733,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49845,7 +49845,7 @@ void m68008_device::move_b_adr16_paid_dp8() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49866,7 +49866,7 @@ void m68008_device::move_b_adr16_paid_dp8() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50014,7 +50014,7 @@ void m68008_device::move_b_adr32_paid_dp8() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -50035,7 +50035,7 @@ void m68008_device::move_b_adr32_paid_dp8() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68008_device::move_b_dpc_paid_dp8() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50168,7 +50168,7 @@ void m68008_device::move_b_dpc_paid_dp8() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50239,7 +50239,7 @@ void m68008_device::move_b_dpci_paid_dp8() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50331,7 +50331,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50354,7 +50354,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50468,7 +50468,7 @@ void m68008_device::move_b_imm8_paid_dp8() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50580,7 +50580,7 @@ void m68008_device::move_b_ds_dad_dp8() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50655,7 +50655,7 @@ void m68008_device::move_b_ais_dad_dp8() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50677,7 +50677,7 @@ void m68008_device::move_b_ais_dad_dp8() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50799,7 +50799,7 @@ void m68008_device::move_b_aips_dad_dp8() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50819,7 +50819,7 @@ void m68008_device::move_b_aips_dad_dp8() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50943,7 +50943,7 @@ void m68008_device::move_b_pais_dad_dp8() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50963,7 +50963,7 @@ void m68008_device::move_b_pais_dad_dp8() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51116,7 +51116,7 @@ void m68008_device::move_b_das_dad_dp8() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51138,7 +51138,7 @@ void m68008_device::move_b_das_dad_dp8() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51252,7 +51252,7 @@ void m68008_device::move_b_dais_dad_dp8() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -51344,7 +51344,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51366,7 +51366,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51520,7 +51520,7 @@ void m68008_device::move_b_adr16_dad_dp8() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51540,7 +51540,7 @@ void m68008_device::move_b_adr16_dad_dp8() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51730,7 +51730,7 @@ void m68008_device::move_b_adr32_dad_dp8() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -51750,7 +51750,7 @@ void m68008_device::move_b_adr32_dad_dp8() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51902,7 +51902,7 @@ void m68008_device::move_b_dpc_dad_dp8() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51924,7 +51924,7 @@ void m68008_device::move_b_dpc_dad_dp8() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52037,7 +52037,7 @@ void m68008_device::move_b_dpci_dad_dp8() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -52129,7 +52129,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -52151,7 +52151,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52343,7 +52343,7 @@ void m68008_device::move_b_imm8_dad_dp8() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -52416,7 +52416,7 @@ void m68008_device::move_b_ds_daid_dp8() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -52510,7 +52510,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -52585,7 +52585,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -52604,7 +52604,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -52619,7 +52619,7 @@ void m68008_device::move_b_ais_daid_dp8() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52658,7 +52658,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52782,7 +52782,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52799,7 +52799,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -52814,7 +52814,7 @@ void m68008_device::move_b_aips_daid_dp8() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52853,7 +52853,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52979,7 +52979,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52996,7 +52996,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53011,7 +53011,7 @@ void m68008_device::move_b_pais_daid_dp8() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53050,7 +53050,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53205,7 +53205,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -53224,7 +53224,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53239,7 +53239,7 @@ void m68008_device::move_b_das_daid_dp8() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53278,7 +53278,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53394,7 +53394,7 @@ void m68008_device::move_b_dais_daid_dp8() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -53486,7 +53486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -53505,7 +53505,7 @@ adsw2:
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53520,7 +53520,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53559,7 +53559,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53715,7 +53715,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53732,7 +53732,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53747,7 +53747,7 @@ void m68008_device::move_b_adr16_daid_dp8() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53786,7 +53786,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53978,7 +53978,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -53995,7 +53995,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff
[[fallthrough]]; case 10:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54010,7 +54010,7 @@ void m68008_device::move_b_adr32_daid_dp8() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54049,7 +54049,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54203,7 +54203,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -54222,7 +54222,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54237,7 +54237,7 @@ void m68008_device::move_b_dpc_daid_dp8() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54276,7 +54276,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54391,7 +54391,7 @@ void m68008_device::move_b_dpci_daid_dp8() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -54483,7 +54483,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -54502,7 +54502,7 @@ adsw2:
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54517,7 +54517,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54556,7 +54556,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54710,7 +54710,7 @@ void m68008_device::move_b_imm8_daid_dp8() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -54804,7 +54804,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54880,7 +54880,7 @@ void m68008_device::move_b_ds_adr16_dp8() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54995,7 +54995,7 @@ void m68008_device::move_b_ais_adr16_dp8() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55017,7 +55017,7 @@ void m68008_device::move_b_ais_adr16_dp8() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55138,7 +55138,7 @@ void m68008_device::move_b_aips_adr16_dp8() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -55158,7 +55158,7 @@ void m68008_device::move_b_aips_adr16_dp8() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55281,7 +55281,7 @@ void m68008_device::move_b_pais_adr16_dp8() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -55301,7 +55301,7 @@ void m68008_device::move_b_pais_adr16_dp8() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55453,7 +55453,7 @@ void m68008_device::move_b_das_adr16_dp8() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55475,7 +55475,7 @@ void m68008_device::move_b_das_adr16_dp8() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55588,7 +55588,7 @@ void m68008_device::move_b_dais_adr16_dp8() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -55680,7 +55680,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55702,7 +55702,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55855,7 +55855,7 @@ void m68008_device::move_b_adr16_adr16_dp8() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55875,7 +55875,7 @@ void m68008_device::move_b_adr16_adr16_dp8() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56064,7 +56064,7 @@ void m68008_device::move_b_adr32_adr16_dp8() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -56084,7 +56084,7 @@ void m68008_device::move_b_adr32_adr16_dp8() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56235,7 +56235,7 @@ void m68008_device::move_b_dpc_adr16_dp8() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56257,7 +56257,7 @@ void m68008_device::move_b_dpc_adr16_dp8() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56369,7 +56369,7 @@ void m68008_device::move_b_dpci_adr16_dp8() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56461,7 +56461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56483,7 +56483,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56638,7 +56638,7 @@ void m68008_device::move_b_imm8_adr16_dp8() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56791,7 +56791,7 @@ void m68008_device::move_b_ds_adr32_dp8() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56906,7 +56906,7 @@ void m68008_device::move_b_ais_adr32_dp8() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56928,7 +56928,7 @@ void m68008_device::move_b_ais_adr32_dp8() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57084,7 +57084,7 @@ void m68008_device::move_b_aips_adr32_dp8() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -57104,7 +57104,7 @@ void m68008_device::move_b_aips_adr32_dp8() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57262,7 +57262,7 @@ void m68008_device::move_b_pais_adr32_dp8() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -57282,7 +57282,7 @@ void m68008_device::move_b_pais_adr32_dp8() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57469,7 +57469,7 @@ void m68008_device::move_b_das_adr32_dp8() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57491,7 +57491,7 @@ void m68008_device::move_b_das_adr32_dp8() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57639,7 +57639,7 @@ void m68008_device::move_b_dais_adr32_dp8() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57731,7 +57731,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57753,7 +57753,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57941,7 +57941,7 @@ void m68008_device::move_b_adr16_adr32_dp8() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -57961,7 +57961,7 @@ void m68008_device::move_b_adr16_adr32_dp8() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58185,7 +58185,7 @@ void m68008_device::move_b_adr32_adr32_dp8() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -58205,7 +58205,7 @@ void m68008_device::move_b_adr32_adr32_dp8() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58391,7 +58391,7 @@ void m68008_device::move_b_dpc_adr32_dp8() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58413,7 +58413,7 @@ void m68008_device::move_b_dpc_adr32_dp8() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58560,7 +58560,7 @@ void m68008_device::move_b_dpci_adr32_dp8() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58652,7 +58652,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58674,7 +58674,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58900,7 +58900,7 @@ void m68008_device::move_b_imm8_adr32_dp8() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59019,13 +59019,13 @@ void m68008_device::move_l_ds_dd_dp8() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -59083,14 +59083,14 @@ void m68008_device::move_l_as_dd_dp8() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59144,7 +59144,7 @@ void m68008_device::move_l_ais_dd_dp8() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59222,14 +59222,14 @@ void m68008_device::move_l_ais_dd_dp8() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59283,7 +59283,7 @@ void m68008_device::move_l_aips_dd_dp8() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59364,14 +59364,14 @@ void m68008_device::move_l_aips_dd_dp8() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59424,7 +59424,7 @@ void m68008_device::move_l_pais_dd_dp8() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59507,14 +59507,14 @@ void m68008_device::move_l_pais_dd_dp8() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59604,7 +59604,7 @@ void m68008_device::move_l_das_dd_dp8() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -59682,14 +59682,14 @@ void m68008_device::move_l_das_dd_dp8() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59741,7 +59741,7 @@ void m68008_device::move_l_dais_dd_dp8() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -59832,7 +59832,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -59910,14 +59910,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60009,7 +60009,7 @@ void m68008_device::move_l_adr16_dd_dp8() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60087,14 +60087,14 @@ void m68008_device::move_l_adr16_dd_dp8() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60222,7 +60222,7 @@ void m68008_device::move_l_adr32_dd_dp8() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -60300,14 +60300,14 @@ void m68008_device::move_l_adr32_dd_dp8() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60396,7 +60396,7 @@ void m68008_device::move_l_dpc_dd_dp8() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -60474,14 +60474,14 @@ void m68008_device::move_l_dpc_dd_dp8() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60532,7 +60532,7 @@ void m68008_device::move_l_dpci_dd_dp8() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60623,7 +60623,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -60701,14 +60701,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60839,14 +60839,14 @@ void m68008_device::move_l_imm32_dd_dp8() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60903,13 +60903,13 @@ void m68008_device::movea_l_ds_ad_dp8() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -60965,12 +60965,12 @@ void m68008_device::movea_l_as_ad_dp8() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61024,7 +61024,7 @@ void m68008_device::movea_l_ais_ad_dp8() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61102,13 +61102,13 @@ void m68008_device::movea_l_ais_ad_dp8() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61161,7 +61161,7 @@ void m68008_device::movea_l_aips_ad_dp8() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61242,13 +61242,13 @@ void m68008_device::movea_l_aips_ad_dp8() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61300,7 +61300,7 @@ void m68008_device::movea_l_pais_ad_dp8() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -61383,13 +61383,13 @@ void m68008_device::movea_l_pais_ad_dp8() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61478,7 +61478,7 @@ void m68008_device::movea_l_das_ad_dp8() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61556,13 +61556,13 @@ void m68008_device::movea_l_das_ad_dp8() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -61613,7 +61613,7 @@ void m68008_device::movea_l_dais_ad_dp8() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -61704,7 +61704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61782,13 +61782,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -61879,7 +61879,7 @@ void m68008_device::movea_l_adr16_ad_dp8() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61957,13 +61957,13 @@ void m68008_device::movea_l_adr16_ad_dp8() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62090,7 +62090,7 @@ void m68008_device::movea_l_adr32_ad_dp8() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -62168,13 +62168,13 @@ void m68008_device::movea_l_adr32_ad_dp8() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -62262,7 +62262,7 @@ void m68008_device::movea_l_dpc_ad_dp8() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62340,13 +62340,13 @@ void m68008_device::movea_l_dpc_ad_dp8() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62396,7 +62396,7 @@ void m68008_device::movea_l_dpci_ad_dp8() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62487,7 +62487,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62565,13 +62565,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62701,13 +62701,13 @@ void m68008_device::movea_l_imm32_ad_dp8() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -62799,7 +62799,7 @@ void m68008_device::move_l_ds_aid_dp8() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62839,7 +62839,7 @@ void m68008_device::move_l_ds_aid_dp8() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62932,7 +62932,7 @@ void m68008_device::move_l_as_aid_dp8() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62972,7 +62972,7 @@ void m68008_device::move_l_as_aid_dp8() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63026,7 +63026,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -63103,7 +63103,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63142,7 +63142,7 @@ void m68008_device::move_l_ais_aid_dp8() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63234,7 +63234,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -63314,7 +63314,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63353,7 +63353,7 @@ void m68008_device::move_l_aips_aid_dp8() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63444,7 +63444,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -63526,7 +63526,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63565,7 +63565,7 @@ void m68008_device::move_l_pais_aid_dp8() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63693,7 +63693,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -63770,7 +63770,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63809,7 +63809,7 @@ void m68008_device::move_l_das_aid_dp8() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63899,7 +63899,7 @@ void m68008_device::move_l_dais_aid_dp8() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63990,7 +63990,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64067,7 +64067,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64106,7 +64106,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64236,7 +64236,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64313,7 +64313,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64352,7 +64352,7 @@ void m68008_device::move_l_adr16_aid_dp8() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64518,7 +64518,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -64595,7 +64595,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64634,7 +64634,7 @@ void m68008_device::move_l_adr32_aid_dp8() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64761,7 +64761,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -64838,7 +64838,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64877,7 +64877,7 @@ void m68008_device::move_l_dpc_aid_dp8() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64966,7 +64966,7 @@ void m68008_device::move_l_dpci_aid_dp8() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -65057,7 +65057,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -65134,7 +65134,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65173,7 +65173,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65378,7 +65378,7 @@ void m68008_device::move_l_imm32_aid_dp8() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65418,7 +65418,7 @@ void m68008_device::move_l_imm32_aid_dp8() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65511,7 +65511,7 @@ void m68008_device::move_l_ds_aipd_dp8() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65551,7 +65551,7 @@ void m68008_device::move_l_ds_aipd_dp8() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65644,7 +65644,7 @@ void m68008_device::move_l_as_aipd_dp8() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65684,7 +65684,7 @@ void m68008_device::move_l_as_aipd_dp8() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65738,7 +65738,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65815,7 +65815,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65854,7 +65854,7 @@ void m68008_device::move_l_ais_aipd_dp8() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65945,7 +65945,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66025,7 +66025,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66064,7 +66064,7 @@ void m68008_device::move_l_aips_aipd_dp8() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66154,7 +66154,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -66236,7 +66236,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68008_device::move_l_pais_aipd_dp8() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66402,7 +66402,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66479,7 +66479,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66518,7 +66518,7 @@ void m68008_device::move_l_das_aipd_dp8() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66607,7 +66607,7 @@ void m68008_device::move_l_dais_aipd_dp8() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -66698,7 +66698,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66775,7 +66775,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66814,7 +66814,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66943,7 +66943,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -67020,7 +67020,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67059,7 +67059,7 @@ void m68008_device::move_l_adr16_aipd_dp8() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67224,7 +67224,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -67301,7 +67301,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67340,7 +67340,7 @@ void m68008_device::move_l_adr32_aipd_dp8() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67466,7 +67466,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -67543,7 +67543,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67582,7 +67582,7 @@ void m68008_device::move_l_dpc_aipd_dp8() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67670,7 +67670,7 @@ void m68008_device::move_l_dpci_aipd_dp8() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -67761,7 +67761,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -67838,7 +67838,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67877,7 +67877,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68081,7 +68081,7 @@ void m68008_device::move_l_imm32_aipd_dp8() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68121,7 +68121,7 @@ void m68008_device::move_l_imm32_aipd_dp8() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68177,7 +68177,7 @@ void m68008_device::move_l_ds_paid_dp8() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68217,7 +68217,7 @@ void m68008_device::move_l_ds_paid_dp8() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68309,7 +68309,7 @@ void m68008_device::move_l_as_paid_dp8() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68349,7 +68349,7 @@ void m68008_device::move_l_as_paid_dp8() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68439,7 +68439,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -68516,7 +68516,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68556,7 +68556,7 @@ void m68008_device::move_l_ais_paid_dp8() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68646,7 +68646,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -68726,7 +68726,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68766,7 +68766,7 @@ void m68008_device::move_l_aips_paid_dp8() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68855,7 +68855,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -68937,7 +68937,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68977,7 +68977,7 @@ void m68008_device::move_l_pais_paid_dp8() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69103,7 +69103,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69180,7 +69180,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69220,7 +69220,7 @@ void m68008_device::move_l_das_paid_dp8() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69308,7 +69308,7 @@ void m68008_device::move_l_dais_paid_dp8() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -69399,7 +69399,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69476,7 +69476,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69516,7 +69516,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69644,7 +69644,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69721,7 +69721,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69761,7 +69761,7 @@ void m68008_device::move_l_adr16_paid_dp8() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69925,7 +69925,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -70002,7 +70002,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70042,7 +70042,7 @@ void m68008_device::move_l_adr32_paid_dp8() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70167,7 +70167,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -70244,7 +70244,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70284,7 +70284,7 @@ void m68008_device::move_l_dpc_paid_dp8() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70371,7 +70371,7 @@ void m68008_device::move_l_dpci_paid_dp8() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70462,7 +70462,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -70539,7 +70539,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70579,7 +70579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70745,7 +70745,7 @@ void m68008_device::move_l_imm32_paid_dp8() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70785,7 +70785,7 @@ void m68008_device::move_l_imm32_paid_dp8() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70913,7 +70913,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70952,7 +70952,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70992,7 +70992,7 @@ void m68008_device::move_l_ds_dad_dp8() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71084,7 +71084,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71123,7 +71123,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71163,7 +71163,7 @@ void m68008_device::move_l_as_dad_dp8() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71217,7 +71217,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -71293,7 +71293,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71333,7 +71333,7 @@ void m68008_device::move_l_ais_dad_dp8() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71466,7 +71466,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -71545,7 +71545,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71585,7 +71585,7 @@ void m68008_device::move_l_aips_dad_dp8() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71717,7 +71717,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -71798,7 +71798,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71838,7 +71838,7 @@ void m68008_device::move_l_pais_dad_dp8() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72007,7 +72007,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72083,7 +72083,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72123,7 +72123,7 @@ void m68008_device::move_l_das_dad_dp8() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72254,7 +72254,7 @@ void m68008_device::move_l_dais_dad_dp8() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -72345,7 +72345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72421,7 +72421,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72461,7 +72461,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72632,7 +72632,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72708,7 +72708,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72748,7 +72748,7 @@ void m68008_device::move_l_adr16_dad_dp8() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72955,7 +72955,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -73031,7 +73031,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73071,7 +73071,7 @@ void m68008_device::move_l_adr32_dad_dp8() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73239,7 +73239,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -73315,7 +73315,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73355,7 +73355,7 @@ void m68008_device::move_l_dpc_dad_dp8() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73485,7 +73485,7 @@ void m68008_device::move_l_dpci_dad_dp8() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -73576,7 +73576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -73652,7 +73652,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73692,7 +73692,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73937,7 +73937,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73976,7 +73976,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74016,7 +74016,7 @@ void m68008_device::move_l_imm32_dad_dp8() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74068,7 +74068,7 @@ void m68008_device::move_l_ds_daid_dp8() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -74162,7 +74162,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74201,7 +74201,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74241,7 +74241,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74293,7 +74293,7 @@ void m68008_device::move_l_as_daid_dp8() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -74387,7 +74387,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74426,7 +74426,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74466,7 +74466,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74520,7 +74520,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74593,7 +74593,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -74608,7 +74608,7 @@ void m68008_device::move_l_ais_daid_dp8() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74647,7 +74647,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74689,7 +74689,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74822,7 +74822,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74898,7 +74898,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -74913,7 +74913,7 @@ void m68008_device::move_l_aips_daid_dp8() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74952,7 +74952,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74994,7 +74994,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75126,7 +75126,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -75204,7 +75204,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75219,7 +75219,7 @@ void m68008_device::move_l_pais_daid_dp8() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75258,7 +75258,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75300,7 +75300,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75469,7 +75469,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75542,7 +75542,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75557,7 +75557,7 @@ void m68008_device::move_l_das_daid_dp8() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75596,7 +75596,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75638,7 +75638,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75769,7 +75769,7 @@ void m68008_device::move_l_dais_daid_dp8() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -75860,7 +75860,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75933,7 +75933,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75948,7 +75948,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75987,7 +75987,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76029,7 +76029,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76200,7 +76200,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -76273,7 +76273,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -76288,7 +76288,7 @@ void m68008_device::move_l_adr16_daid_dp8() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76327,7 +76327,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76369,7 +76369,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76576,7 +76576,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -76649,7 +76649,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -76664,7 +76664,7 @@ void m68008_device::move_l_adr32_daid_dp8() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76703,7 +76703,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76745,7 +76745,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76913,7 +76913,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -76986,7 +76986,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -77001,7 +77001,7 @@ void m68008_device::move_l_dpc_daid_dp8() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77040,7 +77040,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77082,7 +77082,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77212,7 +77212,7 @@ void m68008_device::move_l_dpci_daid_dp8() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -77303,7 +77303,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -77376,7 +77376,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -77391,7 +77391,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77430,7 +77430,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77472,7 +77472,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77677,7 +77677,7 @@ void m68008_device::move_l_imm32_daid_dp8() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -77771,7 +77771,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77810,7 +77810,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77850,7 +77850,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77905,7 +77905,7 @@ void m68008_device::move_l_ds_adr16_dp8() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77945,7 +77945,7 @@ void m68008_device::move_l_ds_adr16_dp8() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78079,7 +78079,7 @@ void m68008_device::move_l_as_adr16_dp8() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78119,7 +78119,7 @@ void m68008_device::move_l_as_adr16_dp8() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78251,7 +78251,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78327,7 +78327,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78367,7 +78367,7 @@ void m68008_device::move_l_ais_adr16_dp8() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78499,7 +78499,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78578,7 +78578,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78618,7 +78618,7 @@ void m68008_device::move_l_aips_adr16_dp8() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78749,7 +78749,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -78830,7 +78830,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78870,7 +78870,7 @@ void m68008_device::move_l_pais_adr16_dp8() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79038,7 +79038,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79114,7 +79114,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79154,7 +79154,7 @@ void m68008_device::move_l_das_adr16_dp8() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79284,7 +79284,7 @@ void m68008_device::move_l_dais_adr16_dp8() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79375,7 +79375,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79451,7 +79451,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79491,7 +79491,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79661,7 +79661,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79737,7 +79737,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79777,7 +79777,7 @@ void m68008_device::move_l_adr16_adr16_dp8() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79983,7 +79983,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -80059,7 +80059,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80099,7 +80099,7 @@ void m68008_device::move_l_adr32_adr16_dp8() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80266,7 +80266,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -80342,7 +80342,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80382,7 +80382,7 @@ void m68008_device::move_l_dpc_adr16_dp8() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80511,7 +80511,7 @@ void m68008_device::move_l_dpci_adr16_dp8() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80602,7 +80602,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -80678,7 +80678,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80718,7 +80718,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80926,7 +80926,7 @@ void m68008_device::move_l_imm32_adr16_dp8() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80966,7 +80966,7 @@ void m68008_device::move_l_imm32_adr16_dp8() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81136,7 +81136,7 @@ void m68008_device::move_l_ds_adr32_dp8() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81176,7 +81176,7 @@ void m68008_device::move_l_ds_adr32_dp8() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81346,7 +81346,7 @@ void m68008_device::move_l_as_adr32_dp8() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81386,7 +81386,7 @@ void m68008_device::move_l_as_adr32_dp8() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81518,7 +81518,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -81595,7 +81595,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -81633,7 +81633,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81672,7 +81672,7 @@ void m68008_device::move_l_ais_adr32_dp8() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81803,7 +81803,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -81883,7 +81883,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -81921,7 +81921,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81960,7 +81960,7 @@ void m68008_device::move_l_aips_adr32_dp8() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82090,7 +82090,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -82172,7 +82172,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -82210,7 +82210,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82249,7 +82249,7 @@ void m68008_device::move_l_pais_adr32_dp8() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82416,7 +82416,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -82493,7 +82493,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -82531,7 +82531,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82570,7 +82570,7 @@ void m68008_device::move_l_das_adr32_dp8() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82699,7 +82699,7 @@ void m68008_device::move_l_dais_adr32_dp8() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -82790,7 +82790,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -82867,7 +82867,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -82905,7 +82905,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82944,7 +82944,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83113,7 +83113,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83190,7 +83190,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -83228,7 +83228,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83267,7 +83267,7 @@ void m68008_device::move_l_adr16_adr32_dp8() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83472,7 +83472,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -83549,7 +83549,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -83587,7 +83587,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83626,7 +83626,7 @@ void m68008_device::move_l_adr32_adr32_dp8() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83792,7 +83792,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -83869,7 +83869,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -83907,7 +83907,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83946,7 +83946,7 @@ void m68008_device::move_l_dpc_adr32_dp8() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84074,7 +84074,7 @@ void m68008_device::move_l_dpci_adr32_dp8() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -84165,7 +84165,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -84242,7 +84242,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -84280,7 +84280,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -84319,7 +84319,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84562,7 +84562,7 @@ void m68008_device::move_l_imm32_adr32_dp8() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84602,7 +84602,7 @@ void m68008_device::move_l_imm32_adr32_dp8() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84738,7 +84738,7 @@ void m68008_device::move_w_ds_dd_dp8() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -84800,7 +84800,7 @@ void m68008_device::move_w_as_dd_dp8() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -84859,7 +84859,7 @@ void m68008_device::move_w_ais_dd_dp8() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84901,7 +84901,7 @@ void m68008_device::move_w_ais_dd_dp8() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -84964,7 +84964,7 @@ void m68008_device::move_w_aips_dd_dp8() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85004,7 +85004,7 @@ void m68008_device::move_w_aips_dd_dp8() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85069,7 +85069,7 @@ void m68008_device::move_w_pais_dd_dp8() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85109,7 +85109,7 @@ void m68008_device::move_w_pais_dd_dp8() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85203,7 +85203,7 @@ void m68008_device::move_w_das_dd_dp8() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85245,7 +85245,7 @@ void m68008_device::move_w_das_dd_dp8() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85300,7 +85300,7 @@ void m68008_device::move_w_dais_dd_dp8() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85392,7 +85392,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85434,7 +85434,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85529,7 +85529,7 @@ void m68008_device::move_w_adr16_dd_dp8() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -85569,7 +85569,7 @@ void m68008_device::move_w_adr16_dd_dp8() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85700,7 +85700,7 @@ void m68008_device::move_w_adr32_dd_dp8() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -85740,7 +85740,7 @@ void m68008_device::move_w_adr32_dd_dp8() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85833,7 +85833,7 @@ void m68008_device::move_w_dpc_dd_dp8() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85875,7 +85875,7 @@ void m68008_device::move_w_dpc_dd_dp8() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85929,7 +85929,7 @@ void m68008_device::move_w_dpci_dd_dp8() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86021,7 +86021,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -86063,7 +86063,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -86161,7 +86161,7 @@ void m68008_device::move_w_imm16_dd_dp8() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -86227,7 +86227,7 @@ void m68008_device::movea_w_ds_ad_dp8() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86286,7 +86286,7 @@ void m68008_device::movea_w_as_ad_dp8() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86340,7 +86340,7 @@ void m68008_device::movea_w_ais_ad_dp8() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86442,7 +86442,7 @@ void m68008_device::movea_w_aips_ad_dp8() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86544,7 +86544,7 @@ void m68008_device::movea_w_pais_ad_dp8() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86675,7 +86675,7 @@ void m68008_device::movea_w_das_ad_dp8() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86769,7 +86769,7 @@ void m68008_device::movea_w_dais_ad_dp8() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86861,7 +86861,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86995,7 +86995,7 @@ void m68008_device::movea_w_adr16_ad_dp8() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87163,7 +87163,7 @@ void m68008_device::movea_w_adr32_ad_dp8() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -87293,7 +87293,7 @@ void m68008_device::movea_w_dpc_ad_dp8() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87386,7 +87386,7 @@ void m68008_device::movea_w_dpci_ad_dp8() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -87478,7 +87478,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87619,7 +87619,7 @@ void m68008_device::movea_w_imm16_ad_dp8() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -87675,7 +87675,7 @@ void m68008_device::move_w_ds_aid_dp8() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -87770,7 +87770,7 @@ void m68008_device::move_w_as_aid_dp8() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -87862,7 +87862,7 @@ void m68008_device::move_w_ais_aid_dp8() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87903,7 +87903,7 @@ void m68008_device::move_w_ais_aid_dp8() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88001,7 +88001,7 @@ void m68008_device::move_w_aips_aid_dp8() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88040,7 +88040,7 @@ void m68008_device::move_w_aips_aid_dp8() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88140,7 +88140,7 @@ void m68008_device::move_w_pais_aid_dp8() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88179,7 +88179,7 @@ void m68008_device::move_w_pais_aid_dp8() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88308,7 +88308,7 @@ void m68008_device::move_w_das_aid_dp8() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88349,7 +88349,7 @@ void m68008_device::move_w_das_aid_dp8() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88439,7 +88439,7 @@ void m68008_device::move_w_dais_aid_dp8() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88531,7 +88531,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88572,7 +88572,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88702,7 +88702,7 @@ void m68008_device::move_w_adr16_aid_dp8() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88741,7 +88741,7 @@ void m68008_device::move_w_adr16_aid_dp8() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88907,7 +88907,7 @@ void m68008_device::move_w_adr32_aid_dp8() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -88946,7 +88946,7 @@ void m68008_device::move_w_adr32_aid_dp8() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89074,7 +89074,7 @@ void m68008_device::move_w_dpc_aid_dp8() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89115,7 +89115,7 @@ void m68008_device::move_w_dpc_aid_dp8() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89204,7 +89204,7 @@ void m68008_device::move_w_dpci_aid_dp8() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89296,7 +89296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89337,7 +89337,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89470,7 +89470,7 @@ void m68008_device::move_w_imm16_aid_dp8() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89565,7 +89565,7 @@ void m68008_device::move_w_ds_aipd_dp8() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89659,7 +89659,7 @@ void m68008_device::move_w_as_aipd_dp8() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89750,7 +89750,7 @@ void m68008_device::move_w_ais_aipd_dp8() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89792,7 +89792,7 @@ void m68008_device::move_w_ais_aipd_dp8() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89889,7 +89889,7 @@ void m68008_device::move_w_aips_aipd_dp8() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89929,7 +89929,7 @@ void m68008_device::move_w_aips_aipd_dp8() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90028,7 +90028,7 @@ void m68008_device::move_w_pais_aipd_dp8() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90068,7 +90068,7 @@ void m68008_device::move_w_pais_aipd_dp8() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90196,7 +90196,7 @@ void m68008_device::move_w_das_aipd_dp8() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -90238,7 +90238,7 @@ void m68008_device::move_w_das_aipd_dp8() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90327,7 +90327,7 @@ void m68008_device::move_w_dais_aipd_dp8() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -90419,7 +90419,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -90461,7 +90461,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90590,7 +90590,7 @@ void m68008_device::move_w_adr16_aipd_dp8() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90630,7 +90630,7 @@ void m68008_device::move_w_adr16_aipd_dp8() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90795,7 +90795,7 @@ void m68008_device::move_w_adr32_aipd_dp8() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -90835,7 +90835,7 @@ void m68008_device::move_w_adr32_aipd_dp8() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90962,7 +90962,7 @@ void m68008_device::move_w_dpc_aipd_dp8() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91004,7 +91004,7 @@ void m68008_device::move_w_dpc_aipd_dp8() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91092,7 +91092,7 @@ void m68008_device::move_w_dpci_aipd_dp8() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91184,7 +91184,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91226,7 +91226,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91358,7 +91358,7 @@ void m68008_device::move_w_imm16_aipd_dp8() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91451,7 +91451,7 @@ void m68008_device::move_w_ds_paid_dp8() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91545,7 +91545,7 @@ void m68008_device::move_w_as_paid_dp8() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91637,7 +91637,7 @@ void m68008_device::move_w_ais_paid_dp8() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91678,7 +91678,7 @@ void m68008_device::move_w_ais_paid_dp8() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91776,7 +91776,7 @@ void m68008_device::move_w_aips_paid_dp8() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91815,7 +91815,7 @@ void m68008_device::move_w_aips_paid_dp8() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91915,7 +91915,7 @@ void m68008_device::move_w_pais_paid_dp8() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91954,7 +91954,7 @@ void m68008_device::move_w_pais_paid_dp8() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92083,7 +92083,7 @@ void m68008_device::move_w_das_paid_dp8() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92124,7 +92124,7 @@ void m68008_device::move_w_das_paid_dp8() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92214,7 +92214,7 @@ void m68008_device::move_w_dais_paid_dp8() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92306,7 +92306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92347,7 +92347,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92477,7 +92477,7 @@ void m68008_device::move_w_adr16_paid_dp8() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92516,7 +92516,7 @@ void m68008_device::move_w_adr16_paid_dp8() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92682,7 +92682,7 @@ void m68008_device::move_w_adr32_paid_dp8() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -92721,7 +92721,7 @@ void m68008_device::move_w_adr32_paid_dp8() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92849,7 +92849,7 @@ void m68008_device::move_w_dpc_paid_dp8() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92890,7 +92890,7 @@ void m68008_device::move_w_dpc_paid_dp8() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92979,7 +92979,7 @@ void m68008_device::move_w_dpci_paid_dp8() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93071,7 +93071,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -93112,7 +93112,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93244,7 +93244,7 @@ void m68008_device::move_w_imm16_paid_dp8() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93374,7 +93374,7 @@ void m68008_device::move_w_ds_dad_dp8() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -93505,7 +93505,7 @@ void m68008_device::move_w_as_dad_dp8() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -93598,7 +93598,7 @@ void m68008_device::move_w_ais_dad_dp8() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -93638,7 +93638,7 @@ void m68008_device::move_w_ais_dad_dp8() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93778,7 +93778,7 @@ void m68008_device::move_w_aips_dad_dp8() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93816,7 +93816,7 @@ void m68008_device::move_w_aips_dad_dp8() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93958,7 +93958,7 @@ void m68008_device::move_w_pais_dad_dp8() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93996,7 +93996,7 @@ void m68008_device::move_w_pais_dad_dp8() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94167,7 +94167,7 @@ void m68008_device::move_w_das_dad_dp8() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -94207,7 +94207,7 @@ void m68008_device::move_w_das_dad_dp8() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94339,7 +94339,7 @@ void m68008_device::move_w_dais_dad_dp8() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94431,7 +94431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -94471,7 +94471,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94643,7 +94643,7 @@ void m68008_device::move_w_adr16_dad_dp8() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94681,7 +94681,7 @@ void m68008_device::move_w_adr16_dad_dp8() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94889,7 +94889,7 @@ void m68008_device::move_w_adr32_dad_dp8() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -94927,7 +94927,7 @@ void m68008_device::move_w_adr32_dad_dp8() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95097,7 +95097,7 @@ void m68008_device::move_w_dpc_dad_dp8() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -95137,7 +95137,7 @@ void m68008_device::move_w_dpc_dad_dp8() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95268,7 +95268,7 @@ void m68008_device::move_w_dpci_dad_dp8() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -95360,7 +95360,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -95400,7 +95400,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95610,7 +95610,7 @@ void m68008_device::move_w_imm16_dad_dp8() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -95701,7 +95701,7 @@ void m68008_device::move_w_ds_daid_dp8() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -95795,7 +95795,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -95886,7 +95886,7 @@ void m68008_device::move_w_as_daid_dp8() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -95980,7 +95980,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -96073,7 +96073,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -96110,7 +96110,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96125,7 +96125,7 @@ void m68008_device::move_w_ais_daid_dp8() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96164,7 +96164,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96306,7 +96306,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96341,7 +96341,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96356,7 +96356,7 @@ void m68008_device::move_w_aips_daid_dp8() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96395,7 +96395,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96539,7 +96539,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96574,7 +96574,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96589,7 +96589,7 @@ void m68008_device::move_w_pais_daid_dp8() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96628,7 +96628,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96801,7 +96801,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -96838,7 +96838,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96853,7 +96853,7 @@ void m68008_device::move_w_das_daid_dp8() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96892,7 +96892,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97026,7 +97026,7 @@ void m68008_device::move_w_dais_daid_dp8() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97118,7 +97118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -97155,7 +97155,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97170,7 +97170,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97209,7 +97209,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97383,7 +97383,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97418,7 +97418,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97433,7 +97433,7 @@ void m68008_device::move_w_adr16_daid_dp8() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97472,7 +97472,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97682,7 +97682,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -97717,7 +97717,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97732,7 +97732,7 @@ void m68008_device::move_w_adr32_daid_dp8() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97771,7 +97771,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97943,7 +97943,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -97980,7 +97980,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97995,7 +97995,7 @@ void m68008_device::move_w_dpc_daid_dp8() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98034,7 +98034,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98167,7 +98167,7 @@ void m68008_device::move_w_dpci_daid_dp8() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -98259,7 +98259,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -98296,7 +98296,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -98311,7 +98311,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98350,7 +98350,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98522,7 +98522,7 @@ void m68008_device::move_w_imm16_daid_dp8() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -98616,7 +98616,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -98710,7 +98710,7 @@ void m68008_device::move_w_ds_adr16_dp8() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98845,7 +98845,7 @@ void m68008_device::move_w_as_adr16_dp8() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98978,7 +98978,7 @@ void m68008_device::move_w_ais_adr16_dp8() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99018,7 +99018,7 @@ void m68008_device::move_w_ais_adr16_dp8() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99157,7 +99157,7 @@ void m68008_device::move_w_aips_adr16_dp8() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -99195,7 +99195,7 @@ void m68008_device::move_w_aips_adr16_dp8() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99336,7 +99336,7 @@ void m68008_device::move_w_pais_adr16_dp8() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -99374,7 +99374,7 @@ void m68008_device::move_w_pais_adr16_dp8() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99544,7 +99544,7 @@ void m68008_device::move_w_das_adr16_dp8() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99584,7 +99584,7 @@ void m68008_device::move_w_das_adr16_dp8() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99715,7 +99715,7 @@ void m68008_device::move_w_dais_adr16_dp8() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -99807,7 +99807,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99847,7 +99847,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100018,7 +100018,7 @@ void m68008_device::move_w_adr16_adr16_dp8() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -100056,7 +100056,7 @@ void m68008_device::move_w_adr16_adr16_dp8() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100263,7 +100263,7 @@ void m68008_device::move_w_adr32_adr16_dp8() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -100301,7 +100301,7 @@ void m68008_device::move_w_adr32_adr16_dp8() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100470,7 +100470,7 @@ void m68008_device::move_w_dpc_adr16_dp8() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -100510,7 +100510,7 @@ void m68008_device::move_w_dpc_adr16_dp8() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100640,7 +100640,7 @@ void m68008_device::move_w_dpci_adr16_dp8() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100732,7 +100732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -100772,7 +100772,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100945,7 +100945,7 @@ void m68008_device::move_w_imm16_adr16_dp8() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101116,7 +101116,7 @@ void m68008_device::move_w_ds_adr32_dp8() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101287,7 +101287,7 @@ void m68008_device::move_w_as_adr32_dp8() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101420,7 +101420,7 @@ void m68008_device::move_w_ais_adr32_dp8() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -101460,7 +101460,7 @@ void m68008_device::move_w_ais_adr32_dp8() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101634,7 +101634,7 @@ void m68008_device::move_w_aips_adr32_dp8() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101672,7 +101672,7 @@ void m68008_device::move_w_aips_adr32_dp8() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101848,7 +101848,7 @@ void m68008_device::move_w_pais_adr32_dp8() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101886,7 +101886,7 @@ void m68008_device::move_w_pais_adr32_dp8() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102091,7 +102091,7 @@ void m68008_device::move_w_das_adr32_dp8() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -102131,7 +102131,7 @@ void m68008_device::move_w_das_adr32_dp8() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102297,7 +102297,7 @@ void m68008_device::move_w_dais_adr32_dp8() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -102389,7 +102389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -102429,7 +102429,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102635,7 +102635,7 @@ void m68008_device::move_w_adr16_adr32_dp8() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102673,7 +102673,7 @@ void m68008_device::move_w_adr16_adr32_dp8() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102915,7 +102915,7 @@ void m68008_device::move_w_adr32_adr32_dp8() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -102953,7 +102953,7 @@ void m68008_device::move_w_adr32_adr32_dp8() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103157,7 +103157,7 @@ void m68008_device::move_w_dpc_adr32_dp8() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -103197,7 +103197,7 @@ void m68008_device::move_w_dpc_adr32_dp8() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103362,7 +103362,7 @@ void m68008_device::move_w_dpci_adr32_dp8() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -103454,7 +103454,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -103494,7 +103494,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103738,7 +103738,7 @@ void m68008_device::move_w_imm16_adr32_dp8() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103873,7 +103873,7 @@ void m68008_device::negx_b_ds_dp8() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -103931,7 +103931,7 @@ void m68008_device::negx_b_ais_dp8() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103954,7 +103954,7 @@ void m68008_device::negx_b_ais_dp8() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104032,7 +104032,7 @@ void m68008_device::negx_b_aips_dp8() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -104053,7 +104053,7 @@ void m68008_device::negx_b_aips_dp8() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104133,7 +104133,7 @@ void m68008_device::negx_b_pais_dp8() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -104154,7 +104154,7 @@ void m68008_device::negx_b_pais_dp8() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104263,7 +104263,7 @@ void m68008_device::negx_b_das_dp8() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104286,7 +104286,7 @@ void m68008_device::negx_b_das_dp8() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104356,7 +104356,7 @@ void m68008_device::negx_b_dais_dp8() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -104448,7 +104448,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104471,7 +104471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104581,7 +104581,7 @@ void m68008_device::negx_b_adr16_dp8() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104602,7 +104602,7 @@ void m68008_device::negx_b_adr16_dp8() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104748,7 +104748,7 @@ void m68008_device::negx_b_adr32_dp8() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -104769,7 +104769,7 @@ void m68008_device::negx_b_adr32_dp8() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104843,7 +104843,7 @@ void m68008_device::negx_w_ds_dp8() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -104901,7 +104901,7 @@ void m68008_device::negx_w_ais_dp8() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104942,7 +104942,7 @@ void m68008_device::negx_w_ais_dp8() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105038,7 +105038,7 @@ void m68008_device::negx_w_aips_dp8() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -105077,7 +105077,7 @@ void m68008_device::negx_w_aips_dp8() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105175,7 +105175,7 @@ void m68008_device::negx_w_pais_dp8() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -105214,7 +105214,7 @@ void m68008_device::negx_w_pais_dp8() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105341,7 +105341,7 @@ void m68008_device::negx_w_das_dp8() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -105382,7 +105382,7 @@ void m68008_device::negx_w_das_dp8() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105470,7 +105470,7 @@ void m68008_device::negx_w_dais_dp8() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -105562,7 +105562,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -105603,7 +105603,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105731,7 +105731,7 @@ void m68008_device::negx_w_adr16_dp8() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -105770,7 +105770,7 @@ void m68008_device::negx_w_adr16_dp8() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105934,7 +105934,7 @@ void m68008_device::negx_w_adr32_dp8() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -105973,7 +105973,7 @@ void m68008_device::negx_w_adr32_dp8() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106065,12 +106065,12 @@ void m68008_device::negx_l_ds_dp8() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106129,7 +106129,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -106206,7 +106206,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106246,7 +106246,7 @@ void m68008_device::negx_l_ais_dp8() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106334,7 +106334,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -106414,7 +106414,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106454,7 +106454,7 @@ void m68008_device::negx_l_aips_dp8() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106541,7 +106541,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -106623,7 +106623,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106663,7 +106663,7 @@ void m68008_device::negx_l_pais_dp8() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106787,7 +106787,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -106864,7 +106864,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106904,7 +106904,7 @@ void m68008_device::negx_l_das_dp8() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106990,7 +106990,7 @@ void m68008_device::negx_l_dais_dp8() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -107081,7 +107081,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -107158,7 +107158,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107198,7 +107198,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107324,7 +107324,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -107401,7 +107401,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107441,7 +107441,7 @@ void m68008_device::negx_l_adr16_dp8() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107603,7 +107603,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -107680,7 +107680,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107720,7 +107720,7 @@ void m68008_device::negx_l_adr32_dp8() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107867,7 +107867,7 @@ void m68008_device::move_sr_ais_dp8() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107910,7 +107910,7 @@ void m68008_device::move_sr_ais_dp8() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108005,7 +108005,7 @@ void m68008_device::move_sr_aips_dp8() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108046,7 +108046,7 @@ void m68008_device::move_sr_aips_dp8() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108143,7 +108143,7 @@ void m68008_device::move_sr_pais_dp8() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108184,7 +108184,7 @@ void m68008_device::move_sr_pais_dp8() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108310,7 +108310,7 @@ void m68008_device::move_sr_das_dp8() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108353,7 +108353,7 @@ void m68008_device::move_sr_das_dp8() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108440,7 +108440,7 @@ void m68008_device::move_sr_dais_dp8() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -108532,7 +108532,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108575,7 +108575,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108702,7 +108702,7 @@ void m68008_device::move_sr_adr16_dp8() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -108743,7 +108743,7 @@ void m68008_device::move_sr_adr16_dp8() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108906,7 +108906,7 @@ void m68008_device::move_sr_adr32_dp8() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -108947,7 +108947,7 @@ void m68008_device::move_sr_adr32_dp8() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -109037,7 +109037,7 @@ void m68008_device::chk_w_ds_dd_dp8() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -109045,7 +109045,7 @@ void m68008_device::chk_w_ds_dd_dp8() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109063,14 +109063,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -109110,7 +109110,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109148,7 +109148,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109366,7 +109366,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -109405,7 +109405,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -109413,7 +109413,7 @@ void m68008_device::chk_w_ais_dd_dp8() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109431,14 +109431,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109478,7 +109478,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109516,7 +109516,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -109740,7 +109740,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109777,7 +109777,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -109785,7 +109785,7 @@ void m68008_device::chk_w_aips_dd_dp8() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109803,14 +109803,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109850,7 +109850,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109888,7 +109888,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110114,7 +110114,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110151,7 +110151,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -110159,7 +110159,7 @@ void m68008_device::chk_w_pais_dd_dp8() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -110177,14 +110177,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -110224,7 +110224,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -110262,7 +110262,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110517,7 +110517,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -110556,7 +110556,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -110564,7 +110564,7 @@ void m68008_device::chk_w_das_dd_dp8() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -110582,14 +110582,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -110629,7 +110629,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110667,7 +110667,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -110883,7 +110883,7 @@ void m68008_device::chk_w_dais_dd_dp8() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110975,7 +110975,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -111014,7 +111014,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111022,7 +111022,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111040,14 +111040,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -111087,7 +111087,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111125,7 +111125,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111381,7 +111381,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111418,7 +111418,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111426,7 +111426,7 @@ void m68008_device::chk_w_adr16_dd_dp8() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111444,14 +111444,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -111491,7 +111491,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111529,7 +111529,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111821,7 +111821,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -111858,7 +111858,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111866,7 +111866,7 @@ void m68008_device::chk_w_adr32_dd_dp8() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111884,14 +111884,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111931,7 +111931,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111969,7 +111969,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -112223,7 +112223,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -112262,7 +112262,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -112270,7 +112270,7 @@ void m68008_device::chk_w_dpc_dd_dp8() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -112288,14 +112288,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -112335,7 +112335,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -112373,7 +112373,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -112588,7 +112588,7 @@ void m68008_device::chk_w_dpci_dd_dp8() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -112680,7 +112680,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -112719,7 +112719,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -112727,7 +112727,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -112745,14 +112745,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -112792,7 +112792,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -112830,7 +112830,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -113086,7 +113086,7 @@ void m68008_device::chk_w_imm16_dd_dp8() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -113094,7 +113094,7 @@ void m68008_device::chk_w_imm16_dd_dp8() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -113112,14 +113112,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -113159,7 +113159,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -113197,7 +113197,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -113567,7 +113567,7 @@ void m68008_device::lea_dais_ad_dp8() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -114028,7 +114028,7 @@ void m68008_device::lea_dpci_ad_dp8() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -114180,7 +114180,7 @@ void m68008_device::clr_b_ds_dp8() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -114188,7 +114188,7 @@ void m68008_device::clr_b_ds_dp8() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -114239,11 +114239,11 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -114263,7 +114263,7 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114305,7 +114305,7 @@ void m68008_device::clr_b_ais_dp8() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -114339,12 +114339,12 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114365,7 +114365,7 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114407,7 +114407,7 @@ void m68008_device::clr_b_aips_dp8() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -114440,7 +114440,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114448,7 +114448,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114469,7 +114469,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114511,7 +114511,7 @@ void m68008_device::clr_b_pais_dp8() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -114542,7 +114542,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -114580,11 +114580,11 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -114604,7 +114604,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114646,7 +114646,7 @@ void m68008_device::clr_b_das_dp8() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -114675,14 +114675,14 @@ void m68008_device::clr_b_dais_dp8() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114690,7 +114690,7 @@ void m68008_device::clr_b_dais_dp8() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -114729,7 +114729,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -114770,11 +114770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -114794,7 +114794,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114836,7 +114836,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -114869,7 +114869,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -114907,7 +114907,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114928,7 +114928,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114970,7 +114970,7 @@ void m68008_device::clr_b_adr16_dp8() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -115001,7 +115001,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -115040,7 +115040,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -115078,7 +115078,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -115099,7 +115099,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115141,7 +115141,7 @@ void m68008_device::clr_b_adr32_dp8() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -115174,7 +115174,7 @@ void m68008_device::clr_w_ds_dp8() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -115182,7 +115182,7 @@ void m68008_device::clr_w_ds_dp8() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -115233,11 +115233,11 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -115275,7 +115275,7 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115317,7 +115317,7 @@ void m68008_device::clr_w_ais_dp8() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -115369,12 +115369,12 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115413,7 +115413,7 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115455,7 +115455,7 @@ void m68008_device::clr_w_aips_dp8() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -115506,7 +115506,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115514,7 +115514,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115553,7 +115553,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115595,7 +115595,7 @@ void m68008_device::clr_w_pais_dp8() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -115644,7 +115644,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -115682,11 +115682,11 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -115724,7 +115724,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115766,7 +115766,7 @@ void m68008_device::clr_w_das_dp8() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -115813,14 +115813,14 @@ void m68008_device::clr_w_dais_dp8() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115828,7 +115828,7 @@ void m68008_device::clr_w_dais_dp8() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -115867,7 +115867,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -115908,11 +115908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -115950,7 +115950,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115992,7 +115992,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -116043,7 +116043,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -116081,7 +116081,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -116120,7 +116120,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116162,7 +116162,7 @@ void m68008_device::clr_w_adr16_dp8() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -116211,7 +116211,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -116250,7 +116250,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -116288,7 +116288,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -116327,7 +116327,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116369,7 +116369,7 @@ void m68008_device::clr_w_adr32_dp8() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -116420,12 +116420,12 @@ void m68008_device::clr_l_ds_dp8() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116466,7 +116466,7 @@ void m68008_device::clr_l_ds_dp8() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116485,7 +116485,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116525,7 +116525,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -116563,7 +116563,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116603,7 +116603,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -116643,7 +116643,7 @@ void m68008_device::clr_l_ais_dp8() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -116692,7 +116692,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116732,11 +116732,11 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -116774,7 +116774,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116814,7 +116814,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -116854,7 +116854,7 @@ void m68008_device::clr_l_aips_dp8() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -116902,14 +116902,14 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -116948,7 +116948,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -116986,7 +116986,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117026,7 +117026,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117066,7 +117066,7 @@ void m68008_device::clr_l_pais_dp8() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -117115,7 +117115,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117152,7 +117152,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117192,7 +117192,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -117230,7 +117230,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117270,7 +117270,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117310,7 +117310,7 @@ void m68008_device::clr_l_das_dp8() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -117357,14 +117357,14 @@ void m68008_device::clr_l_dais_dp8() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -117372,7 +117372,7 @@ void m68008_device::clr_l_dais_dp8() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117411,7 +117411,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117451,7 +117451,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117491,7 +117491,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -117529,7 +117529,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117569,7 +117569,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117609,7 +117609,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -117660,7 +117660,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117698,7 +117698,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117738,7 +117738,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -117776,7 +117776,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117816,7 +117816,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117856,7 +117856,7 @@ void m68008_device::clr_l_adr16_dp8() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -117905,7 +117905,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -117944,7 +117944,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -117982,7 +117982,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -118022,7 +118022,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -118060,7 +118060,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118100,7 +118100,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -118140,7 +118140,7 @@ void m68008_device::clr_l_adr32_dp8() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -118191,7 +118191,7 @@ void m68008_device::neg_b_ds_dp8() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -118249,7 +118249,7 @@ void m68008_device::neg_b_ais_dp8() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118272,7 +118272,7 @@ void m68008_device::neg_b_ais_dp8() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118350,7 +118350,7 @@ void m68008_device::neg_b_aips_dp8() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -118371,7 +118371,7 @@ void m68008_device::neg_b_aips_dp8() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118451,7 +118451,7 @@ void m68008_device::neg_b_pais_dp8() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -118472,7 +118472,7 @@ void m68008_device::neg_b_pais_dp8() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118581,7 +118581,7 @@ void m68008_device::neg_b_das_dp8() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118604,7 +118604,7 @@ void m68008_device::neg_b_das_dp8() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118674,7 +118674,7 @@ void m68008_device::neg_b_dais_dp8() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -118766,7 +118766,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118789,7 +118789,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118899,7 +118899,7 @@ void m68008_device::neg_b_adr16_dp8() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118920,7 +118920,7 @@ void m68008_device::neg_b_adr16_dp8() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119066,7 +119066,7 @@ void m68008_device::neg_b_adr32_dp8() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -119087,7 +119087,7 @@ void m68008_device::neg_b_adr32_dp8() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119161,7 +119161,7 @@ void m68008_device::neg_w_ds_dp8() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -119219,7 +119219,7 @@ void m68008_device::neg_w_ais_dp8() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119260,7 +119260,7 @@ void m68008_device::neg_w_ais_dp8() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119356,7 +119356,7 @@ void m68008_device::neg_w_aips_dp8() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119395,7 +119395,7 @@ void m68008_device::neg_w_aips_dp8() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119493,7 +119493,7 @@ void m68008_device::neg_w_pais_dp8() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119532,7 +119532,7 @@ void m68008_device::neg_w_pais_dp8() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119659,7 +119659,7 @@ void m68008_device::neg_w_das_dp8() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119700,7 +119700,7 @@ void m68008_device::neg_w_das_dp8() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119788,7 +119788,7 @@ void m68008_device::neg_w_dais_dp8() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -119880,7 +119880,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119921,7 +119921,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120049,7 +120049,7 @@ void m68008_device::neg_w_adr16_dp8() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -120088,7 +120088,7 @@ void m68008_device::neg_w_adr16_dp8() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120252,7 +120252,7 @@ void m68008_device::neg_w_adr32_dp8() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -120291,7 +120291,7 @@ void m68008_device::neg_w_adr32_dp8() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120383,12 +120383,12 @@ void m68008_device::neg_l_ds_dp8() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120447,7 +120447,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120524,7 +120524,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120564,7 +120564,7 @@ void m68008_device::neg_l_ais_dp8() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -120652,7 +120652,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120732,7 +120732,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120772,7 +120772,7 @@ void m68008_device::neg_l_aips_dp8() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -120859,7 +120859,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -120941,7 +120941,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120981,7 +120981,7 @@ void m68008_device::neg_l_pais_dp8() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121105,7 +121105,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121182,7 +121182,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121222,7 +121222,7 @@ void m68008_device::neg_l_das_dp8() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121308,7 +121308,7 @@ void m68008_device::neg_l_dais_dp8() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -121399,7 +121399,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121476,7 +121476,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121516,7 +121516,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121642,7 +121642,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121719,7 +121719,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121759,7 +121759,7 @@ void m68008_device::neg_l_adr16_dp8() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121921,7 +121921,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -121998,7 +121998,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -122038,7 +122038,7 @@ void m68008_device::neg_l_adr32_dp8() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -122228,7 +122228,7 @@ void m68008_device::move_ais_ccr_dp8() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -122375,7 +122375,7 @@ void m68008_device::move_aips_ccr_dp8() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -122522,7 +122522,7 @@ void m68008_device::move_pais_ccr_dp8() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -122698,7 +122698,7 @@ void m68008_device::move_das_ccr_dp8() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -122837,7 +122837,7 @@ void m68008_device::move_dais_ccr_dp8() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -122929,7 +122929,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -123108,7 +123108,7 @@ void m68008_device::move_adr16_ccr_dp8() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123321,7 +123321,7 @@ void m68008_device::move_adr32_ccr_dp8() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -123496,7 +123496,7 @@ void m68008_device::move_dpc_ccr_dp8() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -123634,7 +123634,7 @@ void m68008_device::move_dpci_ccr_dp8() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -123726,7 +123726,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124009,7 +124009,7 @@ void m68008_device::not_b_ds_dp8() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -124067,7 +124067,7 @@ void m68008_device::not_b_ais_dp8() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124090,7 +124090,7 @@ void m68008_device::not_b_ais_dp8() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124168,7 +124168,7 @@ void m68008_device::not_b_aips_dp8() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124189,7 +124189,7 @@ void m68008_device::not_b_aips_dp8() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124269,7 +124269,7 @@ void m68008_device::not_b_pais_dp8() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124290,7 +124290,7 @@ void m68008_device::not_b_pais_dp8() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124399,7 +124399,7 @@ void m68008_device::not_b_das_dp8() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124422,7 +124422,7 @@ void m68008_device::not_b_das_dp8() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124492,7 +124492,7 @@ void m68008_device::not_b_dais_dp8() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -124584,7 +124584,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124607,7 +124607,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124717,7 +124717,7 @@ void m68008_device::not_b_adr16_dp8() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -124738,7 +124738,7 @@ void m68008_device::not_b_adr16_dp8() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124884,7 +124884,7 @@ void m68008_device::not_b_adr32_dp8() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -124905,7 +124905,7 @@ void m68008_device::not_b_adr32_dp8() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124979,7 +124979,7 @@ void m68008_device::not_w_ds_dp8() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -125037,7 +125037,7 @@ void m68008_device::not_w_ais_dp8() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125078,7 +125078,7 @@ void m68008_device::not_w_ais_dp8() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125174,7 +125174,7 @@ void m68008_device::not_w_aips_dp8() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125213,7 +125213,7 @@ void m68008_device::not_w_aips_dp8() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125311,7 +125311,7 @@ void m68008_device::not_w_pais_dp8() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125350,7 +125350,7 @@ void m68008_device::not_w_pais_dp8() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125477,7 +125477,7 @@ void m68008_device::not_w_das_dp8() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125518,7 +125518,7 @@ void m68008_device::not_w_das_dp8() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125606,7 +125606,7 @@ void m68008_device::not_w_dais_dp8() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -125698,7 +125698,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125739,7 +125739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125867,7 +125867,7 @@ void m68008_device::not_w_adr16_dp8() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125906,7 +125906,7 @@ void m68008_device::not_w_adr16_dp8() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126070,7 +126070,7 @@ void m68008_device::not_w_adr32_dp8() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -126109,7 +126109,7 @@ void m68008_device::not_w_adr32_dp8() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126201,12 +126201,12 @@ void m68008_device::not_l_ds_dp8() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126265,7 +126265,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -126342,7 +126342,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126382,7 +126382,7 @@ void m68008_device::not_l_ais_dp8() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126470,7 +126470,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -126550,7 +126550,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126590,7 +126590,7 @@ void m68008_device::not_l_aips_dp8() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126677,7 +126677,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -126759,7 +126759,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126799,7 +126799,7 @@ void m68008_device::not_l_pais_dp8() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126923,7 +126923,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127000,7 +127000,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127040,7 +127040,7 @@ void m68008_device::not_l_das_dp8() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127126,7 +127126,7 @@ void m68008_device::not_l_dais_dp8() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -127217,7 +127217,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127294,7 +127294,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127334,7 +127334,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127460,7 +127460,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127537,7 +127537,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127577,7 +127577,7 @@ void m68008_device::not_l_adr16_dp8() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127739,7 +127739,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -127816,7 +127816,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127856,7 +127856,7 @@ void m68008_device::not_l_adr32_dp8() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -128056,7 +128056,7 @@ void m68008_device::move_ais_sr_dp8() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128209,7 +128209,7 @@ void m68008_device::move_aips_sr_dp8() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128362,7 +128362,7 @@ void m68008_device::move_pais_sr_dp8() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128544,7 +128544,7 @@ void m68008_device::move_das_sr_dp8() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128689,7 +128689,7 @@ void m68008_device::move_dais_sr_dp8() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -128781,7 +128781,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128966,7 +128966,7 @@ void m68008_device::move_adr16_sr_dp8() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129185,7 +129185,7 @@ void m68008_device::move_adr32_sr_dp8() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -129366,7 +129366,7 @@ void m68008_device::move_dpc_sr_dp8() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129510,7 +129510,7 @@ void m68008_device::move_dpci_sr_dp8() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129602,7 +129602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129893,12 +129893,12 @@ void m68008_device::nbcd_b_ds_dp8() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -129955,7 +129955,7 @@ void m68008_device::nbcd_b_ais_dp8() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129977,12 +129977,12 @@ void m68008_device::nbcd_b_ais_dp8() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130058,7 +130058,7 @@ void m68008_device::nbcd_b_aips_dp8() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -130078,12 +130078,12 @@ void m68008_device::nbcd_b_aips_dp8() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130161,7 +130161,7 @@ void m68008_device::nbcd_b_pais_dp8() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -130181,12 +130181,12 @@ void m68008_device::nbcd_b_pais_dp8() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130293,7 +130293,7 @@ void m68008_device::nbcd_b_das_dp8() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -130315,12 +130315,12 @@ void m68008_device::nbcd_b_das_dp8() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130388,7 +130388,7 @@ void m68008_device::nbcd_b_dais_dp8() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130480,7 +130480,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -130502,12 +130502,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130615,7 +130615,7 @@ void m68008_device::nbcd_b_adr16_dp8() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130635,12 +130635,12 @@ void m68008_device::nbcd_b_adr16_dp8() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130784,7 +130784,7 @@ void m68008_device::nbcd_b_adr32_dp8() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -130804,12 +130804,12 @@ void m68008_device::nbcd_b_adr32_dp8() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -130882,7 +130882,7 @@ void m68008_device::swap_ds_dp8() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -130890,7 +130890,7 @@ void m68008_device::swap_ds_dp8() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130946,7 +130946,7 @@ void m68008_device::pea_ais_dp8() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131072,7 +131072,7 @@ void m68008_device::pea_das_dp8() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131114,7 +131114,7 @@ void m68008_device::pea_das_dp8() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131238,7 +131238,7 @@ void m68008_device::pea_dais_dp8() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -131329,7 +131329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -131830,7 +131830,7 @@ void m68008_device::pea_dpc_dp8() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131872,7 +131872,7 @@ void m68008_device::pea_dpc_dp8() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131995,7 +131995,7 @@ void m68008_device::pea_dpci_dp8() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -132086,7 +132086,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -132219,7 +132219,7 @@ void m68008_device::ext_w_ds_dp8() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -132786,7 +132786,7 @@ void m68008_device::movem_w_list_dais_dp8() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -133381,7 +133381,7 @@ void m68008_device::ext_l_ds_dp8() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -134054,7 +134054,7 @@ void m68008_device::movem_l_list_dais_dp8() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -134755,13 +134755,13 @@ void m68008_device::tst_b_ds_dp8() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -134812,11 +134812,11 @@ void m68008_device::tst_b_ais_dp8() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -134836,13 +134836,13 @@ void m68008_device::tst_b_ais_dp8() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -134896,12 +134896,12 @@ void m68008_device::tst_b_aips_dp8() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -134922,13 +134922,13 @@ void m68008_device::tst_b_aips_dp8() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -134981,7 +134981,7 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -134989,7 +134989,7 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135010,13 +135010,13 @@ void m68008_device::tst_b_pais_dp8() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135067,7 +135067,7 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135105,11 +135105,11 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -135129,13 +135129,13 @@ void m68008_device::tst_b_das_dp8() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135184,14 +135184,14 @@ void m68008_device::tst_b_dais_dp8() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135199,7 +135199,7 @@ void m68008_device::tst_b_dais_dp8() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135238,7 +135238,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135279,11 +135279,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -135303,13 +135303,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135362,7 +135362,7 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135400,7 +135400,7 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135421,13 +135421,13 @@ void m68008_device::tst_b_adr16_dp8() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135478,7 +135478,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135517,7 +135517,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -135555,7 +135555,7 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -135576,13 +135576,13 @@ void m68008_device::tst_b_adr32_dp8() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135636,13 +135636,13 @@ void m68008_device::tst_w_ds_dp8() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135693,11 +135693,11 @@ void m68008_device::tst_w_ais_dp8() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -135735,13 +135735,13 @@ void m68008_device::tst_w_ais_dp8() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135795,12 +135795,12 @@ void m68008_device::tst_w_aips_dp8() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135839,13 +135839,13 @@ void m68008_device::tst_w_aips_dp8() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -135898,7 +135898,7 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135906,7 +135906,7 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135945,13 +135945,13 @@ void m68008_device::tst_w_pais_dp8() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136002,7 +136002,7 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136040,11 +136040,11 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -136082,13 +136082,13 @@ void m68008_device::tst_w_das_dp8() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136137,14 +136137,14 @@ void m68008_device::tst_w_dais_dp8() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136152,7 +136152,7 @@ void m68008_device::tst_w_dais_dp8() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136191,7 +136191,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136232,11 +136232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -136274,13 +136274,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136333,7 +136333,7 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136371,7 +136371,7 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -136410,13 +136410,13 @@ void m68008_device::tst_w_adr16_dp8() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136467,7 +136467,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136506,7 +136506,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -136544,7 +136544,7 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -136583,13 +136583,13 @@ void m68008_device::tst_w_adr32_dp8() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -136643,13 +136643,13 @@ void m68008_device::tst_l_ds_dp8() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136702,7 +136702,7 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136742,7 +136742,7 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -136780,13 +136780,13 @@ void m68008_device::tst_l_ais_dp8() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136839,7 +136839,7 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136879,11 +136879,11 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -136921,13 +136921,13 @@ void m68008_device::tst_l_aips_dp8() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136979,14 +136979,14 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137025,7 +137025,7 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137063,13 +137063,13 @@ void m68008_device::tst_l_pais_dp8() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137122,7 +137122,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137159,7 +137159,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137199,7 +137199,7 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137237,13 +137237,13 @@ void m68008_device::tst_l_das_dp8() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137294,14 +137294,14 @@ void m68008_device::tst_l_dais_dp8() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -137309,7 +137309,7 @@ void m68008_device::tst_l_dais_dp8() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137348,7 +137348,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137388,7 +137388,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137428,7 +137428,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137466,13 +137466,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137527,7 +137527,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137565,7 +137565,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137605,7 +137605,7 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137643,13 +137643,13 @@ void m68008_device::tst_l_adr16_dp8() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137702,7 +137702,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -137741,7 +137741,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -137779,7 +137779,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -137819,7 +137819,7 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -137857,13 +137857,13 @@ void m68008_device::tst_l_adr32_dp8() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137918,14 +137918,14 @@ void m68008_device::tas_ds_dp8() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137978,11 +137978,11 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -137997,14 +137997,14 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138028,11 +138028,11 @@ void m68008_device::tas_ais_dp8() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138086,12 +138086,12 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -138107,14 +138107,14 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138138,11 +138138,11 @@ void m68008_device::tas_aips_dp8() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138195,7 +138195,7 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -138203,7 +138203,7 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -138219,14 +138219,14 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138250,11 +138250,11 @@ void m68008_device::tas_pais_dp8() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138305,7 +138305,7 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138343,11 +138343,11 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -138362,14 +138362,14 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138393,11 +138393,11 @@ void m68008_device::tas_das_dp8() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138446,14 +138446,14 @@ void m68008_device::tas_dais_dp8() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -138461,7 +138461,7 @@ void m68008_device::tas_dais_dp8() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138500,7 +138500,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138541,11 +138541,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -138560,14 +138560,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138591,11 +138591,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138648,7 +138648,7 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -138686,7 +138686,7 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -138702,14 +138702,14 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138733,11 +138733,11 @@ void m68008_device::tas_adr16_dp8() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138788,7 +138788,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -138827,7 +138827,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -138865,7 +138865,7 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -138881,14 +138881,14 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138912,11 +138912,11 @@ void m68008_device::tas_adr32_dp8() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -139583,7 +139583,7 @@ void m68008_device::movem_w_dais_list_dp8() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -139671,7 +139671,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -140540,7 +140540,7 @@ void m68008_device::movem_w_dpci_list_dp8() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -140628,7 +140628,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -141497,7 +141497,7 @@ void m68008_device::movem_l_dais_list_dp8() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -141585,7 +141585,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -142598,7 +142598,7 @@ void m68008_device::movem_l_dpci_list_dp8() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -142686,7 +142686,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -142872,14 +142872,14 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -142919,7 +142919,7 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -142957,7 +142957,7 @@ void m68008_device::trap_imm4_dp8() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -143158,7 +143158,7 @@ void m68008_device::link_as_imm16_dp8() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -143586,7 +143586,7 @@ void m68008_device::reset_dp8() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -143724,7 +143724,7 @@ void m68008_device::stop_i16u_dp8() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -143738,6 +143738,7 @@ void m68008_device::stop_i16u_dp8() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -143754,7 +143755,7 @@ void m68008_device::rte_dp8() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143964,7 +143965,7 @@ void m68008_device::rts_dp8() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -144185,7 +144186,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -144223,7 +144224,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144263,7 +144264,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -144301,7 +144302,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -144500,7 +144501,7 @@ void m68008_device::rtr_dp8() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145035,7 +145036,7 @@ void m68008_device::jsr_dais_dp8() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -145755,7 +145756,7 @@ void m68008_device::jsr_dpci_dp8() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -146128,7 +146129,7 @@ void m68008_device::jmp_dais_dp8() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -146551,7 +146552,7 @@ void m68008_device::jmp_dpci_dp8() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -146669,7 +146670,7 @@ void m68008_device::addq_b_imm3_ds_dp8() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -146727,7 +146728,7 @@ void m68008_device::addq_b_imm3_ais_dp8() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -146751,7 +146752,7 @@ void m68008_device::addq_b_imm3_ais_dp8() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146829,7 +146830,7 @@ void m68008_device::addq_b_imm3_aips_dp8() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -146851,7 +146852,7 @@ void m68008_device::addq_b_imm3_aips_dp8() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146931,7 +146932,7 @@ void m68008_device::addq_b_imm3_pais_dp8() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -146953,7 +146954,7 @@ void m68008_device::addq_b_imm3_pais_dp8() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147062,7 +147063,7 @@ void m68008_device::addq_b_imm3_das_dp8() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147086,7 +147087,7 @@ void m68008_device::addq_b_imm3_das_dp8() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147156,7 +147157,7 @@ void m68008_device::addq_b_imm3_dais_dp8() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -147248,7 +147249,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147272,7 +147273,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147382,7 +147383,7 @@ void m68008_device::addq_b_imm3_adr16_dp8() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147404,7 +147405,7 @@ void m68008_device::addq_b_imm3_adr16_dp8() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147550,7 +147551,7 @@ void m68008_device::addq_b_imm3_adr32_dp8() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -147572,7 +147573,7 @@ void m68008_device::addq_b_imm3_adr32_dp8() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147646,7 +147647,7 @@ void m68008_device::addq_w_imm3_ds_dp8() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -147706,7 +147707,7 @@ void m68008_device::addq_w_imm3_as_dp8() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -147744,7 +147745,7 @@ void m68008_device::addq_w_imm3_as_dp8() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -147770,7 +147771,7 @@ void m68008_device::addq_w_imm3_ais_dp8() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147812,7 +147813,7 @@ void m68008_device::addq_w_imm3_ais_dp8() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147908,7 +147909,7 @@ void m68008_device::addq_w_imm3_aips_dp8() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -147948,7 +147949,7 @@ void m68008_device::addq_w_imm3_aips_dp8() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148046,7 +148047,7 @@ void m68008_device::addq_w_imm3_pais_dp8() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -148086,7 +148087,7 @@ void m68008_device::addq_w_imm3_pais_dp8() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148213,7 +148214,7 @@ void m68008_device::addq_w_imm3_das_dp8() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -148255,7 +148256,7 @@ void m68008_device::addq_w_imm3_das_dp8() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148343,7 +148344,7 @@ void m68008_device::addq_w_imm3_dais_dp8() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148435,7 +148436,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -148477,7 +148478,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148605,7 +148606,7 @@ void m68008_device::addq_w_imm3_adr16_dp8() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -148645,7 +148646,7 @@ void m68008_device::addq_w_imm3_adr16_dp8() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148809,7 +148810,7 @@ void m68008_device::addq_w_imm3_adr32_dp8() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -148849,7 +148850,7 @@ void m68008_device::addq_w_imm3_adr32_dp8() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148941,7 +148942,7 @@ void m68008_device::addq_l_imm3_ds_dp8() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -148980,7 +148981,7 @@ void m68008_device::addq_l_imm3_ds_dp8() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -149009,7 +149010,7 @@ void m68008_device::addq_l_imm3_as_dp8() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -149047,7 +149048,7 @@ void m68008_device::addq_l_imm3_as_dp8() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -149073,7 +149074,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149151,7 +149152,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149191,7 +149192,7 @@ void m68008_device::addq_l_imm3_ais_dp8() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149279,7 +149280,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149360,7 +149361,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149400,7 +149401,7 @@ void m68008_device::addq_l_imm3_aips_dp8() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149487,7 +149488,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -149570,7 +149571,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149610,7 +149611,7 @@ void m68008_device::addq_l_imm3_pais_dp8() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149734,7 +149735,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -149812,7 +149813,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149852,7 +149853,7 @@ void m68008_device::addq_l_imm3_das_dp8() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149938,7 +149939,7 @@ void m68008_device::addq_l_imm3_dais_dp8() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -150029,7 +150030,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150107,7 +150108,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150147,7 +150148,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150273,7 +150274,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150351,7 +150352,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150391,7 +150392,7 @@ void m68008_device::addq_l_imm3_adr16_dp8() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150553,7 +150554,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -150631,7 +150632,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150671,7 +150672,7 @@ void m68008_device::addq_l_imm3_adr32_dp8() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150761,7 +150762,7 @@ void m68008_device::st_ds_dp8() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -150773,7 +150774,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150816,7 +150817,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -150856,7 +150857,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -150875,7 +150876,7 @@ void m68008_device::dbt_ds_rel16_dp8() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -150887,13 +150888,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150936,7 +150937,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -150944,7 +150945,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -150983,11 +150984,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151033,13 +151034,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151085,7 +151086,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151134,11 +151135,11 @@ void m68008_device::st_ais_dp8() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -151158,7 +151159,7 @@ void m68008_device::st_ais_dp8() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151168,7 +151169,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151207,7 +151208,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151250,7 +151251,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -151284,12 +151285,12 @@ void m68008_device::st_aips_dp8() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151310,7 +151311,7 @@ void m68008_device::st_aips_dp8() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151320,7 +151321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151359,7 +151360,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151402,7 +151403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -151435,7 +151436,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -151443,7 +151444,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151464,7 +151465,7 @@ void m68008_device::st_pais_dp8() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151474,7 +151475,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151513,7 +151514,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151556,7 +151557,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -151587,7 +151588,7 @@ void m68008_device::st_das_dp8() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151625,11 +151626,11 @@ void m68008_device::st_das_dp8() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -151649,7 +151650,7 @@ void m68008_device::st_das_dp8() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151659,7 +151660,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151698,7 +151699,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -151741,7 +151742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -151770,14 +151771,14 @@ void m68008_device::st_dais_dp8() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -151785,7 +151786,7 @@ void m68008_device::st_dais_dp8() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151824,7 +151825,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151865,11 +151866,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -151889,7 +151890,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151899,7 +151900,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -151938,7 +151939,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -151981,7 +151982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -152014,7 +152015,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152052,7 +152053,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152073,7 +152074,7 @@ void m68008_device::st_adr16_dp8() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152083,7 +152084,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152122,7 +152123,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -152165,7 +152166,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -152196,7 +152197,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152235,7 +152236,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -152273,7 +152274,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -152294,7 +152295,7 @@ void m68008_device::st_adr32_dp8() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152304,7 +152305,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -152343,7 +152344,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -152386,7 +152387,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -152419,7 +152420,7 @@ void m68008_device::subq_b_imm3_ds_dp8() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -152477,7 +152478,7 @@ void m68008_device::subq_b_imm3_ais_dp8() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -152501,7 +152502,7 @@ void m68008_device::subq_b_imm3_ais_dp8() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152579,7 +152580,7 @@ void m68008_device::subq_b_imm3_aips_dp8() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -152601,7 +152602,7 @@ void m68008_device::subq_b_imm3_aips_dp8() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152681,7 +152682,7 @@ void m68008_device::subq_b_imm3_pais_dp8() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -152703,7 +152704,7 @@ void m68008_device::subq_b_imm3_pais_dp8() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152812,7 +152813,7 @@ void m68008_device::subq_b_imm3_das_dp8() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -152836,7 +152837,7 @@ void m68008_device::subq_b_imm3_das_dp8() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152906,7 +152907,7 @@ void m68008_device::subq_b_imm3_dais_dp8() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152998,7 +152999,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -153022,7 +153023,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153132,7 +153133,7 @@ void m68008_device::subq_b_imm3_adr16_dp8() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -153154,7 +153155,7 @@ void m68008_device::subq_b_imm3_adr16_dp8() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153300,7 +153301,7 @@ void m68008_device::subq_b_imm3_adr32_dp8() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -153322,7 +153323,7 @@ void m68008_device::subq_b_imm3_adr32_dp8() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153396,7 +153397,7 @@ void m68008_device::subq_w_imm3_ds_dp8() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -153456,7 +153457,7 @@ void m68008_device::subq_w_imm3_as_dp8() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -153494,7 +153495,7 @@ void m68008_device::subq_w_imm3_as_dp8() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -153520,7 +153521,7 @@ void m68008_device::subq_w_imm3_ais_dp8() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -153562,7 +153563,7 @@ void m68008_device::subq_w_imm3_ais_dp8() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153658,7 +153659,7 @@ void m68008_device::subq_w_imm3_aips_dp8() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153698,7 +153699,7 @@ void m68008_device::subq_w_imm3_aips_dp8() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153796,7 +153797,7 @@ void m68008_device::subq_w_imm3_pais_dp8() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153836,7 +153837,7 @@ void m68008_device::subq_w_imm3_pais_dp8() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153963,7 +153964,7 @@ void m68008_device::subq_w_imm3_das_dp8() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -154005,7 +154006,7 @@ void m68008_device::subq_w_imm3_das_dp8() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154093,7 +154094,7 @@ void m68008_device::subq_w_imm3_dais_dp8() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -154185,7 +154186,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -154227,7 +154228,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154355,7 +154356,7 @@ void m68008_device::subq_w_imm3_adr16_dp8() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -154395,7 +154396,7 @@ void m68008_device::subq_w_imm3_adr16_dp8() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154559,7 +154560,7 @@ void m68008_device::subq_w_imm3_adr32_dp8() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -154599,7 +154600,7 @@ void m68008_device::subq_w_imm3_adr32_dp8() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154691,7 +154692,7 @@ void m68008_device::subq_l_imm3_ds_dp8() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -154730,7 +154731,7 @@ void m68008_device::subq_l_imm3_ds_dp8() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -154759,7 +154760,7 @@ void m68008_device::subq_l_imm3_as_dp8() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -154797,7 +154798,7 @@ void m68008_device::subq_l_imm3_as_dp8() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -154823,7 +154824,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154901,7 +154902,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154941,7 +154942,7 @@ void m68008_device::subq_l_imm3_ais_dp8() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155029,7 +155030,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -155110,7 +155111,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155150,7 +155151,7 @@ void m68008_device::subq_l_imm3_aips_dp8() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155237,7 +155238,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -155320,7 +155321,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155360,7 +155361,7 @@ void m68008_device::subq_l_imm3_pais_dp8() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155484,7 +155485,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -155562,7 +155563,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155602,7 +155603,7 @@ void m68008_device::subq_l_imm3_das_dp8() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155688,7 +155689,7 @@ void m68008_device::subq_l_imm3_dais_dp8() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -155779,7 +155780,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -155857,7 +155858,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155897,7 +155898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156023,7 +156024,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156101,7 +156102,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156141,7 +156142,7 @@ void m68008_device::subq_l_imm3_adr16_dp8() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156303,7 +156304,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -156381,7 +156382,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156421,7 +156422,7 @@ void m68008_device::subq_l_imm3_adr32_dp8() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156511,7 +156512,7 @@ void m68008_device::sf_ds_dp8() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -156523,7 +156524,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156566,7 +156567,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -156606,7 +156607,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -156625,7 +156626,7 @@ void m68008_device::dbra_ds_rel16_dp8() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -156637,13 +156638,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -156686,7 +156687,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -156694,7 +156695,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156733,11 +156734,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156783,13 +156784,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156835,7 +156836,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156884,11 +156885,11 @@ void m68008_device::sf_ais_dp8() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -156908,7 +156909,7 @@ void m68008_device::sf_ais_dp8() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156918,7 +156919,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -156957,7 +156958,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157000,7 +157001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157034,12 +157035,12 @@ void m68008_device::sf_aips_dp8() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -157060,7 +157061,7 @@ void m68008_device::sf_aips_dp8() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157070,7 +157071,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157109,7 +157110,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157152,7 +157153,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157185,7 +157186,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157193,7 +157194,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -157214,7 +157215,7 @@ void m68008_device::sf_pais_dp8() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157224,7 +157225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157263,7 +157264,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157306,7 +157307,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157337,7 +157338,7 @@ void m68008_device::sf_das_dp8() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157375,11 +157376,11 @@ void m68008_device::sf_das_dp8() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -157399,7 +157400,7 @@ void m68008_device::sf_das_dp8() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157409,7 +157410,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157448,7 +157449,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157491,7 +157492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157520,14 +157521,14 @@ void m68008_device::sf_dais_dp8() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157535,7 +157536,7 @@ void m68008_device::sf_dais_dp8() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157574,7 +157575,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157615,11 +157616,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -157639,7 +157640,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157649,7 +157650,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157688,7 +157689,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157731,7 +157732,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157764,7 +157765,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -157802,7 +157803,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -157823,7 +157824,7 @@ void m68008_device::sf_adr16_dp8() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157833,7 +157834,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157872,7 +157873,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157915,7 +157916,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -157946,7 +157947,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -157985,7 +157986,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -158023,7 +158024,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -158044,7 +158045,7 @@ void m68008_device::sf_adr32_dp8() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158054,7 +158055,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158093,7 +158094,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -158136,7 +158137,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -158169,7 +158170,7 @@ void m68008_device::shi_ds_dp8() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -158181,7 +158182,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158224,7 +158225,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -158264,7 +158265,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -158283,7 +158284,7 @@ void m68008_device::dbhi_ds_rel16_dp8() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -158295,13 +158296,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -158344,7 +158345,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -158352,7 +158353,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158391,11 +158392,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158441,13 +158442,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158493,7 +158494,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158542,11 +158543,11 @@ void m68008_device::shi_ais_dp8() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -158566,7 +158567,7 @@ void m68008_device::shi_ais_dp8() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158576,7 +158577,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158615,7 +158616,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158658,7 +158659,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -158692,12 +158693,12 @@ void m68008_device::shi_aips_dp8() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -158718,7 +158719,7 @@ void m68008_device::shi_aips_dp8() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158728,7 +158729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158767,7 +158768,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158810,7 +158811,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -158843,7 +158844,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158851,7 +158852,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -158872,7 +158873,7 @@ void m68008_device::shi_pais_dp8() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158882,7 +158883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -158921,7 +158922,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158964,7 +158965,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -158995,7 +158996,7 @@ void m68008_device::shi_das_dp8() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159033,11 +159034,11 @@ void m68008_device::shi_das_dp8() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -159057,7 +159058,7 @@ void m68008_device::shi_das_dp8() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159067,7 +159068,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159106,7 +159107,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159149,7 +159150,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -159178,14 +159179,14 @@ void m68008_device::shi_dais_dp8() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -159193,7 +159194,7 @@ void m68008_device::shi_dais_dp8() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159232,7 +159233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159273,11 +159274,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -159297,7 +159298,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159307,7 +159308,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159346,7 +159347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159389,7 +159390,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -159422,7 +159423,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -159460,7 +159461,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159481,7 +159482,7 @@ void m68008_device::shi_adr16_dp8() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159491,7 +159492,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159530,7 +159531,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159573,7 +159574,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -159604,7 +159605,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159643,7 +159644,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -159681,7 +159682,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -159702,7 +159703,7 @@ void m68008_device::shi_adr32_dp8() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159712,7 +159713,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159751,7 +159752,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -159794,7 +159795,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -159827,7 +159828,7 @@ void m68008_device::sls_ds_dp8() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -159839,7 +159840,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -159882,7 +159883,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -159922,7 +159923,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159941,7 +159942,7 @@ void m68008_device::dbls_ds_rel16_dp8() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -159953,13 +159954,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -160002,7 +160003,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -160010,7 +160011,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160049,11 +160050,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160099,13 +160100,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160151,7 +160152,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160200,11 +160201,11 @@ void m68008_device::sls_ais_dp8() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -160224,7 +160225,7 @@ void m68008_device::sls_ais_dp8() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160234,7 +160235,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160273,7 +160274,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160316,7 +160317,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -160350,12 +160351,12 @@ void m68008_device::sls_aips_dp8() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160376,7 +160377,7 @@ void m68008_device::sls_aips_dp8() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160386,7 +160387,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160425,7 +160426,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160468,7 +160469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -160501,7 +160502,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -160509,7 +160510,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160530,7 +160531,7 @@ void m68008_device::sls_pais_dp8() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160540,7 +160541,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160579,7 +160580,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160622,7 +160623,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -160653,7 +160654,7 @@ void m68008_device::sls_das_dp8() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160691,11 +160692,11 @@ void m68008_device::sls_das_dp8() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -160715,7 +160716,7 @@ void m68008_device::sls_das_dp8() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160725,7 +160726,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160764,7 +160765,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -160807,7 +160808,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -160836,14 +160837,14 @@ void m68008_device::sls_dais_dp8() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -160851,7 +160852,7 @@ void m68008_device::sls_dais_dp8() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160890,7 +160891,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -160931,11 +160932,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -160955,7 +160956,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160965,7 +160966,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161004,7 +161005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -161047,7 +161048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -161080,7 +161081,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -161118,7 +161119,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -161139,7 +161140,7 @@ void m68008_device::sls_adr16_dp8() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161149,7 +161150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161188,7 +161189,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -161231,7 +161232,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -161262,7 +161263,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161301,7 +161302,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -161339,7 +161340,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -161360,7 +161361,7 @@ void m68008_device::sls_adr32_dp8() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161370,7 +161371,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161409,7 +161410,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -161452,7 +161453,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -161485,7 +161486,7 @@ void m68008_device::scc_ds_dp8() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -161497,7 +161498,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161540,7 +161541,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -161580,7 +161581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -161599,7 +161600,7 @@ void m68008_device::dbcc_ds_rel16_dp8() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -161611,13 +161612,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -161660,7 +161661,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -161668,7 +161669,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161707,11 +161708,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161757,13 +161758,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161809,7 +161810,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161858,11 +161859,11 @@ void m68008_device::scc_ais_dp8() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -161882,7 +161883,7 @@ void m68008_device::scc_ais_dp8() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161892,7 +161893,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -161931,7 +161932,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -161974,7 +161975,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162008,12 +162009,12 @@ void m68008_device::scc_aips_dp8() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162034,7 +162035,7 @@ void m68008_device::scc_aips_dp8() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162044,7 +162045,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162083,7 +162084,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -162126,7 +162127,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162159,7 +162160,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162167,7 +162168,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162188,7 +162189,7 @@ void m68008_device::scc_pais_dp8() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162198,7 +162199,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162237,7 +162238,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -162280,7 +162281,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162311,7 +162312,7 @@ void m68008_device::scc_das_dp8() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162349,11 +162350,11 @@ void m68008_device::scc_das_dp8() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -162373,7 +162374,7 @@ void m68008_device::scc_das_dp8() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162383,7 +162384,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162422,7 +162423,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162465,7 +162466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162494,14 +162495,14 @@ void m68008_device::scc_dais_dp8() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162509,7 +162510,7 @@ void m68008_device::scc_dais_dp8() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162548,7 +162549,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162589,11 +162590,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -162613,7 +162614,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162623,7 +162624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162662,7 +162663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162705,7 +162706,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162738,7 +162739,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -162776,7 +162777,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162797,7 +162798,7 @@ void m68008_device::scc_adr16_dp8() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162807,7 +162808,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162846,7 +162847,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162889,7 +162890,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -162920,7 +162921,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -162959,7 +162960,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -162997,7 +162998,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -163018,7 +163019,7 @@ void m68008_device::scc_adr32_dp8() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163028,7 +163029,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163067,7 +163068,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -163110,7 +163111,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -163143,7 +163144,7 @@ void m68008_device::scs_ds_dp8() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -163155,7 +163156,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163198,7 +163199,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -163238,7 +163239,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163257,7 +163258,7 @@ void m68008_device::dbcs_ds_rel16_dp8() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -163269,13 +163270,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -163318,7 +163319,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -163326,7 +163327,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163365,11 +163366,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163415,13 +163416,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163467,7 +163468,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163516,11 +163517,11 @@ void m68008_device::scs_ais_dp8() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -163540,7 +163541,7 @@ void m68008_device::scs_ais_dp8() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163550,7 +163551,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163589,7 +163590,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163632,7 +163633,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -163666,12 +163667,12 @@ void m68008_device::scs_aips_dp8() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -163692,7 +163693,7 @@ void m68008_device::scs_aips_dp8() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163702,7 +163703,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163741,7 +163742,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163784,7 +163785,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -163817,7 +163818,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -163825,7 +163826,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -163846,7 +163847,7 @@ void m68008_device::scs_pais_dp8() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163856,7 +163857,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -163895,7 +163896,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163938,7 +163939,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -163969,7 +163970,7 @@ void m68008_device::scs_das_dp8() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164007,11 +164008,11 @@ void m68008_device::scs_das_dp8() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -164031,7 +164032,7 @@ void m68008_device::scs_das_dp8() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164041,7 +164042,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164080,7 +164081,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164123,7 +164124,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -164152,14 +164153,14 @@ void m68008_device::scs_dais_dp8() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -164167,7 +164168,7 @@ void m68008_device::scs_dais_dp8() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164206,7 +164207,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164247,11 +164248,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -164271,7 +164272,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164281,7 +164282,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164320,7 +164321,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164363,7 +164364,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -164396,7 +164397,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -164434,7 +164435,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164455,7 +164456,7 @@ void m68008_device::scs_adr16_dp8() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164465,7 +164466,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164504,7 +164505,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164547,7 +164548,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -164578,7 +164579,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164617,7 +164618,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -164655,7 +164656,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -164676,7 +164677,7 @@ void m68008_device::scs_adr32_dp8() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164686,7 +164687,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164725,7 +164726,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -164768,7 +164769,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -164801,7 +164802,7 @@ void m68008_device::sne_ds_dp8() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -164813,7 +164814,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -164856,7 +164857,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -164896,7 +164897,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164915,7 +164916,7 @@ void m68008_device::dbne_ds_rel16_dp8() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -164927,13 +164928,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -164976,7 +164977,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -164984,7 +164985,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165023,11 +165024,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165073,13 +165074,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165125,7 +165126,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165174,11 +165175,11 @@ void m68008_device::sne_ais_dp8() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -165198,7 +165199,7 @@ void m68008_device::sne_ais_dp8() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165208,7 +165209,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165247,7 +165248,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165290,7 +165291,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -165324,12 +165325,12 @@ void m68008_device::sne_aips_dp8() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165350,7 +165351,7 @@ void m68008_device::sne_aips_dp8() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165360,7 +165361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165399,7 +165400,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165442,7 +165443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -165475,7 +165476,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -165483,7 +165484,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165504,7 +165505,7 @@ void m68008_device::sne_pais_dp8() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165514,7 +165515,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165553,7 +165554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165596,7 +165597,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -165627,7 +165628,7 @@ void m68008_device::sne_das_dp8() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165665,11 +165666,11 @@ void m68008_device::sne_das_dp8() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -165689,7 +165690,7 @@ void m68008_device::sne_das_dp8() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165699,7 +165700,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165738,7 +165739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -165781,7 +165782,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -165810,14 +165811,14 @@ void m68008_device::sne_dais_dp8() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -165825,7 +165826,7 @@ void m68008_device::sne_dais_dp8() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165864,7 +165865,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165905,11 +165906,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -165929,7 +165930,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165939,7 +165940,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -165978,7 +165979,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -166021,7 +166022,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -166054,7 +166055,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -166092,7 +166093,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -166113,7 +166114,7 @@ void m68008_device::sne_adr16_dp8() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166123,7 +166124,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166162,7 +166163,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -166205,7 +166206,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -166236,7 +166237,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166275,7 +166276,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -166313,7 +166314,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -166334,7 +166335,7 @@ void m68008_device::sne_adr32_dp8() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166344,7 +166345,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166383,7 +166384,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -166426,7 +166427,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -166459,7 +166460,7 @@ void m68008_device::seq_ds_dp8() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -166471,7 +166472,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166514,7 +166515,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -166554,7 +166555,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -166573,7 +166574,7 @@ void m68008_device::dbeq_ds_rel16_dp8() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -166585,13 +166586,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -166634,7 +166635,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -166642,7 +166643,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166681,11 +166682,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166731,13 +166732,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166783,7 +166784,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166832,11 +166833,11 @@ void m68008_device::seq_ais_dp8() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -166856,7 +166857,7 @@ void m68008_device::seq_ais_dp8() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166866,7 +166867,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -166905,7 +166906,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -166948,7 +166949,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -166982,12 +166983,12 @@ void m68008_device::seq_aips_dp8() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167008,7 +167009,7 @@ void m68008_device::seq_aips_dp8() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167018,7 +167019,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167057,7 +167058,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -167100,7 +167101,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -167133,7 +167134,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -167141,7 +167142,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167162,7 +167163,7 @@ void m68008_device::seq_pais_dp8() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167172,7 +167173,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167211,7 +167212,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -167254,7 +167255,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -167285,7 +167286,7 @@ void m68008_device::seq_das_dp8() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167323,11 +167324,11 @@ void m68008_device::seq_das_dp8() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -167347,7 +167348,7 @@ void m68008_device::seq_das_dp8() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167357,7 +167358,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167396,7 +167397,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167439,7 +167440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -167468,14 +167469,14 @@ void m68008_device::seq_dais_dp8() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -167483,7 +167484,7 @@ void m68008_device::seq_dais_dp8() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167522,7 +167523,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167563,11 +167564,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -167587,7 +167588,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167597,7 +167598,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167636,7 +167637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167679,7 +167680,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -167712,7 +167713,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -167750,7 +167751,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167771,7 +167772,7 @@ void m68008_device::seq_adr16_dp8() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167781,7 +167782,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167820,7 +167821,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167863,7 +167864,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -167894,7 +167895,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -167933,7 +167934,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167971,7 +167972,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -167992,7 +167993,7 @@ void m68008_device::seq_adr32_dp8() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168002,7 +168003,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168041,7 +168042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -168084,7 +168085,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -168117,7 +168118,7 @@ void m68008_device::svc_ds_dp8() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -168129,7 +168130,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168172,7 +168173,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -168212,7 +168213,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -168231,7 +168232,7 @@ void m68008_device::dbvc_ds_rel16_dp8() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -168243,13 +168244,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -168292,7 +168293,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -168300,7 +168301,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168339,11 +168340,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168389,13 +168390,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168441,7 +168442,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168490,11 +168491,11 @@ void m68008_device::svc_ais_dp8() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -168514,7 +168515,7 @@ void m68008_device::svc_ais_dp8() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168524,7 +168525,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168563,7 +168564,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168606,7 +168607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -168640,12 +168641,12 @@ void m68008_device::svc_aips_dp8() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168666,7 +168667,7 @@ void m68008_device::svc_aips_dp8() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168676,7 +168677,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168715,7 +168716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168758,7 +168759,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -168791,7 +168792,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -168799,7 +168800,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168820,7 +168821,7 @@ void m68008_device::svc_pais_dp8() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168830,7 +168831,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168869,7 +168870,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168912,7 +168913,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -168943,7 +168944,7 @@ void m68008_device::svc_das_dp8() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -168981,11 +168982,11 @@ void m68008_device::svc_das_dp8() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -169005,7 +169006,7 @@ void m68008_device::svc_das_dp8() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169015,7 +169016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169054,7 +169055,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169097,7 +169098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -169126,14 +169127,14 @@ void m68008_device::svc_dais_dp8() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -169141,7 +169142,7 @@ void m68008_device::svc_dais_dp8() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169180,7 +169181,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169221,11 +169222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -169245,7 +169246,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169255,7 +169256,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169294,7 +169295,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169337,7 +169338,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -169370,7 +169371,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -169408,7 +169409,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169429,7 +169430,7 @@ void m68008_device::svc_adr16_dp8() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169439,7 +169440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169478,7 +169479,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169521,7 +169522,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -169552,7 +169553,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169591,7 +169592,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -169629,7 +169630,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -169650,7 +169651,7 @@ void m68008_device::svc_adr32_dp8() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169660,7 +169661,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169699,7 +169700,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -169742,7 +169743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -169775,7 +169776,7 @@ void m68008_device::svs_ds_dp8() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -169787,7 +169788,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169830,7 +169831,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -169870,7 +169871,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -169889,7 +169890,7 @@ void m68008_device::dbvs_ds_rel16_dp8() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -169901,13 +169902,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -169950,7 +169951,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -169958,7 +169959,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -169997,11 +169998,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170047,13 +170048,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170099,7 +170100,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170148,11 +170149,11 @@ void m68008_device::svs_ais_dp8() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -170172,7 +170173,7 @@ void m68008_device::svs_ais_dp8() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170182,7 +170183,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170221,7 +170222,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170264,7 +170265,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -170298,12 +170299,12 @@ void m68008_device::svs_aips_dp8() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170324,7 +170325,7 @@ void m68008_device::svs_aips_dp8() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170334,7 +170335,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170373,7 +170374,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170416,7 +170417,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -170449,7 +170450,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -170457,7 +170458,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170478,7 +170479,7 @@ void m68008_device::svs_pais_dp8() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170488,7 +170489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170527,7 +170528,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170570,7 +170571,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -170601,7 +170602,7 @@ void m68008_device::svs_das_dp8() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170639,11 +170640,11 @@ void m68008_device::svs_das_dp8() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -170663,7 +170664,7 @@ void m68008_device::svs_das_dp8() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170673,7 +170674,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170712,7 +170713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -170755,7 +170756,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -170784,14 +170785,14 @@ void m68008_device::svs_dais_dp8() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -170799,7 +170800,7 @@ void m68008_device::svs_dais_dp8() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170838,7 +170839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170879,11 +170880,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -170903,7 +170904,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170913,7 +170914,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -170952,7 +170953,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -170995,7 +170996,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -171028,7 +171029,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -171066,7 +171067,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171087,7 +171088,7 @@ void m68008_device::svs_adr16_dp8() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171097,7 +171098,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171136,7 +171137,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -171179,7 +171180,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -171210,7 +171211,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171249,7 +171250,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -171287,7 +171288,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -171308,7 +171309,7 @@ void m68008_device::svs_adr32_dp8() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171318,7 +171319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171357,7 +171358,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -171400,7 +171401,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -171433,7 +171434,7 @@ void m68008_device::spl_ds_dp8() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -171445,7 +171446,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171488,7 +171489,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -171528,7 +171529,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171547,7 +171548,7 @@ void m68008_device::dbpl_ds_rel16_dp8() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -171559,13 +171560,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -171608,7 +171609,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -171616,7 +171617,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171655,11 +171656,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171705,13 +171706,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171757,7 +171758,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171806,11 +171807,11 @@ void m68008_device::spl_ais_dp8() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -171830,7 +171831,7 @@ void m68008_device::spl_ais_dp8() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171840,7 +171841,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -171879,7 +171880,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -171922,7 +171923,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -171956,12 +171957,12 @@ void m68008_device::spl_aips_dp8() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -171982,7 +171983,7 @@ void m68008_device::spl_aips_dp8() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171992,7 +171993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172031,7 +172032,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -172074,7 +172075,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -172107,7 +172108,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -172115,7 +172116,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172136,7 +172137,7 @@ void m68008_device::spl_pais_dp8() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172146,7 +172147,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172185,7 +172186,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -172228,7 +172229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -172259,7 +172260,7 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172297,11 +172298,11 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -172321,7 +172322,7 @@ void m68008_device::spl_das_dp8() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172331,7 +172332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172370,7 +172371,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172413,7 +172414,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -172442,14 +172443,14 @@ void m68008_device::spl_dais_dp8() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -172457,7 +172458,7 @@ void m68008_device::spl_dais_dp8() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172496,7 +172497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172537,11 +172538,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -172561,7 +172562,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172571,7 +172572,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172610,7 +172611,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172653,7 +172654,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -172686,7 +172687,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -172724,7 +172725,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172745,7 +172746,7 @@ void m68008_device::spl_adr16_dp8() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172755,7 +172756,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172794,7 +172795,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172837,7 +172838,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -172868,7 +172869,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -172907,7 +172908,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -172945,7 +172946,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -172966,7 +172967,7 @@ void m68008_device::spl_adr32_dp8() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172976,7 +172977,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173015,7 +173016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -173058,7 +173059,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -173091,7 +173092,7 @@ void m68008_device::smi_ds_dp8() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -173103,7 +173104,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173146,7 +173147,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -173186,7 +173187,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -173205,7 +173206,7 @@ void m68008_device::dbmi_ds_rel16_dp8() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -173217,13 +173218,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173266,7 +173267,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -173274,7 +173275,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173313,11 +173314,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173363,13 +173364,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173415,7 +173416,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173464,11 +173465,11 @@ void m68008_device::smi_ais_dp8() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -173488,7 +173489,7 @@ void m68008_device::smi_ais_dp8() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173498,7 +173499,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173537,7 +173538,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173580,7 +173581,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -173614,12 +173615,12 @@ void m68008_device::smi_aips_dp8() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173640,7 +173641,7 @@ void m68008_device::smi_aips_dp8() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173650,7 +173651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173689,7 +173690,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173732,7 +173733,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -173765,7 +173766,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173773,7 +173774,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173794,7 +173795,7 @@ void m68008_device::smi_pais_dp8() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173804,7 +173805,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173843,7 +173844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173886,7 +173887,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -173917,7 +173918,7 @@ void m68008_device::smi_das_dp8() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -173955,11 +173956,11 @@ void m68008_device::smi_das_dp8() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -173979,7 +173980,7 @@ void m68008_device::smi_das_dp8() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173989,7 +173990,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174028,7 +174029,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174071,7 +174072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -174100,14 +174101,14 @@ void m68008_device::smi_dais_dp8() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174115,7 +174116,7 @@ void m68008_device::smi_dais_dp8() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174154,7 +174155,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174195,11 +174196,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -174219,7 +174220,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174229,7 +174230,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174268,7 +174269,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174311,7 +174312,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -174344,7 +174345,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174382,7 +174383,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174403,7 +174404,7 @@ void m68008_device::smi_adr16_dp8() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174413,7 +174414,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174452,7 +174453,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174495,7 +174496,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -174526,7 +174527,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174565,7 +174566,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -174603,7 +174604,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -174624,7 +174625,7 @@ void m68008_device::smi_adr32_dp8() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174634,7 +174635,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174673,7 +174674,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -174716,7 +174717,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -174749,7 +174750,7 @@ void m68008_device::sge_ds_dp8() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -174761,7 +174762,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174804,7 +174805,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -174844,7 +174845,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -174863,7 +174864,7 @@ void m68008_device::dbge_ds_rel16_dp8() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -174875,13 +174876,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174924,7 +174925,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -174932,7 +174933,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -174971,11 +174972,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175021,13 +175022,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175073,7 +175074,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175122,11 +175123,11 @@ void m68008_device::sge_ais_dp8() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -175146,7 +175147,7 @@ void m68008_device::sge_ais_dp8() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175156,7 +175157,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175195,7 +175196,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175238,7 +175239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -175272,12 +175273,12 @@ void m68008_device::sge_aips_dp8() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175298,7 +175299,7 @@ void m68008_device::sge_aips_dp8() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175308,7 +175309,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175347,7 +175348,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175390,7 +175391,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -175423,7 +175424,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -175431,7 +175432,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175452,7 +175453,7 @@ void m68008_device::sge_pais_dp8() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175462,7 +175463,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175501,7 +175502,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175544,7 +175545,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -175575,7 +175576,7 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175613,11 +175614,11 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -175637,7 +175638,7 @@ void m68008_device::sge_das_dp8() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175647,7 +175648,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175686,7 +175687,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -175729,7 +175730,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -175758,14 +175759,14 @@ void m68008_device::sge_dais_dp8() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -175773,7 +175774,7 @@ void m68008_device::sge_dais_dp8() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175812,7 +175813,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175853,11 +175854,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -175877,7 +175878,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175887,7 +175888,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -175926,7 +175927,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -175969,7 +175970,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -176002,7 +176003,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176040,7 +176041,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176061,7 +176062,7 @@ void m68008_device::sge_adr16_dp8() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176071,7 +176072,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176110,7 +176111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -176153,7 +176154,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -176184,7 +176185,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176223,7 +176224,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -176261,7 +176262,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -176282,7 +176283,7 @@ void m68008_device::sge_adr32_dp8() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176292,7 +176293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176331,7 +176332,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -176374,7 +176375,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -176407,7 +176408,7 @@ void m68008_device::slt_ds_dp8() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -176419,7 +176420,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176462,7 +176463,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -176502,7 +176503,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176521,7 +176522,7 @@ void m68008_device::dblt_ds_rel16_dp8() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -176533,13 +176534,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176582,7 +176583,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -176590,7 +176591,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176629,11 +176630,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176679,13 +176680,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176731,7 +176732,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176780,11 +176781,11 @@ void m68008_device::slt_ais_dp8() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -176804,7 +176805,7 @@ void m68008_device::slt_ais_dp8() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176814,7 +176815,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -176853,7 +176854,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -176896,7 +176897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -176930,12 +176931,12 @@ void m68008_device::slt_aips_dp8() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176956,7 +176957,7 @@ void m68008_device::slt_aips_dp8() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176966,7 +176967,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177005,7 +177006,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -177048,7 +177049,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -177081,7 +177082,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -177089,7 +177090,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -177110,7 +177111,7 @@ void m68008_device::slt_pais_dp8() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177120,7 +177121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177159,7 +177160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -177202,7 +177203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -177233,7 +177234,7 @@ void m68008_device::slt_das_dp8() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177271,11 +177272,11 @@ void m68008_device::slt_das_dp8() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -177295,7 +177296,7 @@ void m68008_device::slt_das_dp8() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177305,7 +177306,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177344,7 +177345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177387,7 +177388,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -177416,14 +177417,14 @@ void m68008_device::slt_dais_dp8() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -177431,7 +177432,7 @@ void m68008_device::slt_dais_dp8() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177470,7 +177471,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177511,11 +177512,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -177535,7 +177536,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177545,7 +177546,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177584,7 +177585,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177627,7 +177628,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -177660,7 +177661,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -177698,7 +177699,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177719,7 +177720,7 @@ void m68008_device::slt_adr16_dp8() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177729,7 +177730,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177768,7 +177769,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177811,7 +177812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -177842,7 +177843,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177881,7 +177882,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -177919,7 +177920,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -177940,7 +177941,7 @@ void m68008_device::slt_adr32_dp8() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177950,7 +177951,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -177989,7 +177990,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -178032,7 +178033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -178065,7 +178066,7 @@ void m68008_device::sgt_ds_dp8() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -178077,7 +178078,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178120,7 +178121,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -178160,7 +178161,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -178179,7 +178180,7 @@ void m68008_device::dbgt_ds_rel16_dp8() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -178191,13 +178192,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178240,7 +178241,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -178248,7 +178249,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178287,11 +178288,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178337,13 +178338,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178389,7 +178390,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178438,11 +178439,11 @@ void m68008_device::sgt_ais_dp8() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -178462,7 +178463,7 @@ void m68008_device::sgt_ais_dp8() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178472,7 +178473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178511,7 +178512,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178554,7 +178555,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -178588,12 +178589,12 @@ void m68008_device::sgt_aips_dp8() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178614,7 +178615,7 @@ void m68008_device::sgt_aips_dp8() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178624,7 +178625,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178663,7 +178664,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178706,7 +178707,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -178739,7 +178740,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178747,7 +178748,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178768,7 +178769,7 @@ void m68008_device::sgt_pais_dp8() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178778,7 +178779,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178817,7 +178818,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178860,7 +178861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -178891,7 +178892,7 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -178929,11 +178930,11 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -178953,7 +178954,7 @@ void m68008_device::sgt_das_dp8() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178963,7 +178964,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179002,7 +179003,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179045,7 +179046,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -179074,14 +179075,14 @@ void m68008_device::sgt_dais_dp8() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179089,7 +179090,7 @@ void m68008_device::sgt_dais_dp8() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179128,7 +179129,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179169,11 +179170,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -179193,7 +179194,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179203,7 +179204,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179242,7 +179243,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179285,7 +179286,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -179318,7 +179319,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179356,7 +179357,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179377,7 +179378,7 @@ void m68008_device::sgt_adr16_dp8() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179387,7 +179388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179426,7 +179427,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179469,7 +179470,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -179500,7 +179501,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179539,7 +179540,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -179577,7 +179578,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -179598,7 +179599,7 @@ void m68008_device::sgt_adr32_dp8() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179608,7 +179609,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179647,7 +179648,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -179690,7 +179691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -179723,7 +179724,7 @@ void m68008_device::sle_ds_dp8() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -179735,7 +179736,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179778,7 +179779,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -179818,7 +179819,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -179837,7 +179838,7 @@ void m68008_device::dble_ds_rel16_dp8() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -179849,13 +179850,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179898,7 +179899,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -179906,7 +179907,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179945,11 +179946,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -179995,13 +179996,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180047,7 +180048,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180096,11 +180097,11 @@ void m68008_device::sle_ais_dp8() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -180120,7 +180121,7 @@ void m68008_device::sle_ais_dp8() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180130,7 +180131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180169,7 +180170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180212,7 +180213,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -180246,12 +180247,12 @@ void m68008_device::sle_aips_dp8() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180272,7 +180273,7 @@ void m68008_device::sle_aips_dp8() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180282,7 +180283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180321,7 +180322,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180364,7 +180365,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -180397,7 +180398,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180405,7 +180406,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180426,7 +180427,7 @@ void m68008_device::sle_pais_dp8() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180436,7 +180437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180475,7 +180476,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180518,7 +180519,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -180549,7 +180550,7 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180587,11 +180588,11 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -180611,7 +180612,7 @@ void m68008_device::sle_das_dp8() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180621,7 +180622,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180660,7 +180661,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -180703,7 +180704,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -180732,14 +180733,14 @@ void m68008_device::sle_dais_dp8() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180747,7 +180748,7 @@ void m68008_device::sle_dais_dp8() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180786,7 +180787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180827,11 +180828,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -180851,7 +180852,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180861,7 +180862,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -180900,7 +180901,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -180943,7 +180944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -180976,7 +180977,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -181014,7 +181015,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181035,7 +181036,7 @@ void m68008_device::sle_adr16_dp8() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -181045,7 +181046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -181084,7 +181085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -181127,7 +181128,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -181158,7 +181159,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -181197,7 +181198,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -181235,7 +181236,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -181256,7 +181257,7 @@ void m68008_device::sle_adr32_dp8() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -181266,7 +181267,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -181305,7 +181306,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -181348,7 +181349,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -181638,7 +181639,7 @@ void m68008_device::bsr_rel16_dp8() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -181809,7 +181810,7 @@ void m68008_device::bsr_rel8_dp8() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -185637,7 +185638,7 @@ void m68008_device::moveq_imm8o_dd_dp8() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -185696,7 +185697,7 @@ void m68008_device::or_b_ds_dd_dp8() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185704,7 +185705,7 @@ void m68008_device::or_b_ds_dd_dp8() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -185756,11 +185757,11 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -185780,7 +185781,7 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185788,7 +185789,7 @@ void m68008_device::or_b_ais_dd_dp8() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -185843,12 +185844,12 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185869,7 +185870,7 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185877,7 +185878,7 @@ void m68008_device::or_b_aips_dd_dp8() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -185931,7 +185932,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -185939,7 +185940,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185960,7 +185961,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185968,7 +185969,7 @@ void m68008_device::or_b_pais_dd_dp8() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186020,7 +186021,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186058,11 +186059,11 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -186082,7 +186083,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186090,7 +186091,7 @@ void m68008_device::or_b_das_dd_dp8() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186140,14 +186141,14 @@ void m68008_device::or_b_dais_dd_dp8() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -186155,7 +186156,7 @@ void m68008_device::or_b_dais_dd_dp8() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186194,7 +186195,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186235,11 +186236,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -186259,7 +186260,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186267,7 +186268,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186321,7 +186322,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -186359,7 +186360,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186380,7 +186381,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186388,7 +186389,7 @@ void m68008_device::or_b_adr16_dd_dp8() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186440,7 +186441,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186479,7 +186480,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -186517,7 +186518,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -186538,7 +186539,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186546,7 +186547,7 @@ void m68008_device::or_b_adr32_dd_dp8() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186597,7 +186598,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186635,11 +186636,11 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -186659,7 +186660,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186667,7 +186668,7 @@ void m68008_device::or_b_dpc_dd_dp8() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186716,14 +186717,14 @@ void m68008_device::or_b_dpci_dd_dp8() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -186731,7 +186732,7 @@ void m68008_device::or_b_dpci_dd_dp8() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186770,7 +186771,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186811,11 +186812,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -186835,7 +186836,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186843,7 +186844,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186897,7 +186898,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186936,7 +186937,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186944,7 +186945,7 @@ void m68008_device::or_b_imm8_dd_dp8() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -186998,7 +186999,7 @@ void m68008_device::or_w_ds_dd_dp8() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187006,7 +187007,7 @@ void m68008_device::or_w_ds_dd_dp8() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187058,11 +187059,11 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -187100,7 +187101,7 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187108,7 +187109,7 @@ void m68008_device::or_w_ais_dd_dp8() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187163,12 +187164,12 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -187207,7 +187208,7 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187215,7 +187216,7 @@ void m68008_device::or_w_aips_dd_dp8() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187269,7 +187270,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -187277,7 +187278,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -187316,7 +187317,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187324,7 +187325,7 @@ void m68008_device::or_w_pais_dd_dp8() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187376,7 +187377,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187414,11 +187415,11 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -187456,7 +187457,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187464,7 +187465,7 @@ void m68008_device::or_w_das_dd_dp8() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187514,14 +187515,14 @@ void m68008_device::or_w_dais_dd_dp8() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -187529,7 +187530,7 @@ void m68008_device::or_w_dais_dd_dp8() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187568,7 +187569,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187609,11 +187610,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -187651,7 +187652,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187659,7 +187660,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187713,7 +187714,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -187751,7 +187752,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187790,7 +187791,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187798,7 +187799,7 @@ void m68008_device::or_w_adr16_dd_dp8() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187850,7 +187851,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -187889,7 +187890,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -187927,7 +187928,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -187966,7 +187967,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187974,7 +187975,7 @@ void m68008_device::or_w_adr32_dd_dp8() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188025,7 +188026,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188063,11 +188064,11 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188105,7 +188106,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188113,7 +188114,7 @@ void m68008_device::or_w_dpc_dd_dp8() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188162,14 +188163,14 @@ void m68008_device::or_w_dpci_dd_dp8() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -188177,7 +188178,7 @@ void m68008_device::or_w_dpci_dd_dp8() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188216,7 +188217,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188257,11 +188258,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188299,7 +188300,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188307,7 +188308,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188361,7 +188362,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188400,7 +188401,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188408,7 +188409,7 @@ void m68008_device::or_w_imm16_dd_dp8() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188462,12 +188463,12 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -188502,7 +188503,7 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -188511,7 +188512,7 @@ void m68008_device::or_l_ds_dd_dp8() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188531,7 +188532,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188571,7 +188572,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188609,12 +188610,12 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188655,7 +188656,7 @@ void m68008_device::or_l_ais_dd_dp8() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188675,7 +188676,7 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188715,11 +188716,11 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188757,12 +188758,12 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188803,7 +188804,7 @@ void m68008_device::or_l_aips_dd_dp8() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188822,14 +188823,14 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188868,7 +188869,7 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -188906,12 +188907,12 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188952,7 +188953,7 @@ void m68008_device::or_l_pais_dd_dp8() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188972,7 +188973,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189009,7 +189010,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189049,7 +189050,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189087,12 +189088,12 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189133,7 +189134,7 @@ void m68008_device::or_l_das_dd_dp8() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189151,14 +189152,14 @@ void m68008_device::or_l_dais_dd_dp8() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -189166,7 +189167,7 @@ void m68008_device::or_l_dais_dd_dp8() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189205,7 +189206,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189245,7 +189246,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189285,7 +189286,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189323,12 +189324,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189369,7 +189370,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189391,7 +189392,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -189429,7 +189430,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189469,7 +189470,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189507,12 +189508,12 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189553,7 +189554,7 @@ void m68008_device::or_l_adr16_dd_dp8() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189573,7 +189574,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189612,7 +189613,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -189650,7 +189651,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -189690,7 +189691,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -189728,12 +189729,12 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189774,7 +189775,7 @@ void m68008_device::or_l_adr32_dd_dp8() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189793,7 +189794,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189830,7 +189831,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -189870,7 +189871,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -189908,12 +189909,12 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189954,7 +189955,7 @@ void m68008_device::or_l_dpc_dd_dp8() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189971,14 +189972,14 @@ void m68008_device::or_l_dpci_dd_dp8() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -189986,7 +189987,7 @@ void m68008_device::or_l_dpci_dd_dp8() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190025,7 +190026,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190065,7 +190066,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -190105,7 +190106,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190143,12 +190144,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190189,7 +190190,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -190209,7 +190210,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190248,7 +190249,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190287,12 +190288,12 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -190327,7 +190328,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -190336,7 +190337,7 @@ void m68008_device::or_l_imm32_dd_dp8() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -190358,13 +190359,13 @@ void m68008_device::divu_w_ds_dd_dp8() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -190377,7 +190378,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190395,7 +190396,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -190403,7 +190404,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -190443,7 +190444,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -190481,7 +190482,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -190678,7 +190679,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190724,7 +190725,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -190735,7 +190736,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -190747,7 +190748,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -190767,7 +190768,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -190778,7 +190779,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -190788,13 +190789,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190805,7 +190806,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -190815,7 +190816,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -190823,7 +190824,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190877,7 +190878,7 @@ void m68008_device::divu_w_ais_dd_dp8() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -190918,13 +190919,13 @@ void m68008_device::divu_w_ais_dd_dp8() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -190937,7 +190938,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190955,7 +190956,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -190963,7 +190964,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -191003,7 +191004,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -191041,7 +191042,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -191238,7 +191239,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191284,7 +191285,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191295,7 +191296,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191307,7 +191308,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191327,7 +191328,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -191338,7 +191339,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191348,13 +191349,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191365,7 +191366,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -191375,7 +191376,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -191383,7 +191384,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191443,7 +191444,7 @@ void m68008_device::divu_w_aips_dd_dp8() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191482,13 +191483,13 @@ void m68008_device::divu_w_aips_dd_dp8() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -191501,7 +191502,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191519,7 +191520,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -191527,7 +191528,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -191567,7 +191568,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -191605,7 +191606,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -191802,7 +191803,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191848,7 +191849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191859,7 +191860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191871,7 +191872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191891,7 +191892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -191902,7 +191903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191912,13 +191913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191929,7 +191930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -191939,7 +191940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -191947,7 +191948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192009,7 +192010,7 @@ void m68008_device::divu_w_pais_dd_dp8() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192048,13 +192049,13 @@ void m68008_device::divu_w_pais_dd_dp8() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -192067,7 +192068,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192085,7 +192086,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -192093,7 +192094,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -192133,7 +192134,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -192171,7 +192172,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -192368,7 +192369,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192414,7 +192415,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -192425,7 +192426,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -192437,7 +192438,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -192457,7 +192458,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -192468,7 +192469,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -192478,13 +192479,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192495,7 +192496,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -192505,7 +192506,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -192513,7 +192514,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192604,7 +192605,7 @@ void m68008_device::divu_w_das_dd_dp8() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192645,13 +192646,13 @@ void m68008_device::divu_w_das_dd_dp8() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -192664,7 +192665,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192682,7 +192683,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -192690,7 +192691,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -192730,7 +192731,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -192768,7 +192769,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -192965,7 +192966,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193011,7 +193012,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193022,7 +193023,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193034,7 +193035,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193054,7 +193055,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -193065,7 +193066,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193075,13 +193076,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193092,7 +193093,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -193102,7 +193103,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -193110,7 +193111,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193162,7 +193163,7 @@ void m68008_device::divu_w_dais_dd_dp8() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193254,7 +193255,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193295,13 +193296,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -193314,7 +193315,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193332,7 +193333,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -193340,7 +193341,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -193380,7 +193381,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -193418,7 +193419,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -193615,7 +193616,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193661,7 +193662,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193672,7 +193673,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193684,7 +193685,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193704,7 +193705,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -193715,7 +193716,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193725,13 +193726,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193742,7 +193743,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -193752,7 +193753,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -193760,7 +193761,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193852,7 +193853,7 @@ void m68008_device::divu_w_adr16_dd_dp8() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193891,13 +193892,13 @@ void m68008_device::divu_w_adr16_dd_dp8() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -193910,7 +193911,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193928,7 +193929,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -193936,7 +193937,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -193976,7 +193977,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -194014,7 +194015,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -194211,7 +194212,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194257,7 +194258,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194268,7 +194269,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194280,7 +194281,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194300,7 +194301,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -194311,7 +194312,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194321,13 +194322,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194338,7 +194339,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -194348,7 +194349,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -194356,7 +194357,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194484,7 +194485,7 @@ void m68008_device::divu_w_adr32_dd_dp8() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -194523,13 +194524,13 @@ void m68008_device::divu_w_adr32_dd_dp8() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -194542,7 +194543,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194560,7 +194561,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -194568,7 +194569,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -194608,7 +194609,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -194646,7 +194647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
@@ -194843,7 +194844,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194889,7 +194890,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194900,7 +194901,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194912,7 +194913,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194932,7 +194933,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -194943,7 +194944,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194953,13 +194954,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194970,7 +194971,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -194980,7 +194981,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -194988,7 +194989,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195078,7 +195079,7 @@ void m68008_device::divu_w_dpc_dd_dp8() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195119,13 +195120,13 @@ void m68008_device::divu_w_dpc_dd_dp8() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -195138,7 +195139,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195156,7 +195157,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195164,7 +195165,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -195204,7 +195205,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -195242,7 +195243,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -195439,7 +195440,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195485,7 +195486,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -195496,7 +195497,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -195508,7 +195509,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -195528,7 +195529,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -195539,7 +195540,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -195549,13 +195550,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195566,7 +195567,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -195576,7 +195577,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -195584,7 +195585,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195635,7 +195636,7 @@ void m68008_device::divu_w_dpci_dd_dp8() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -195727,7 +195728,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195768,13 +195769,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -195787,7 +195788,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195805,7 +195806,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195813,7 +195814,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -195853,7 +195854,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -195891,7 +195892,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -196088,7 +196089,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196134,7 +196135,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196145,7 +196146,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196157,7 +196158,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196177,7 +196178,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -196188,7 +196189,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196198,13 +196199,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196215,7 +196216,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -196225,7 +196226,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -196233,7 +196234,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196327,13 +196328,13 @@ void m68008_device::divu_w_imm16_dd_dp8() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -196346,7 +196347,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196364,7 +196365,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -196372,7 +196373,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -196412,7 +196413,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -196450,7 +196451,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -196647,7 +196648,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196693,7 +196694,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196704,7 +196705,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196716,7 +196717,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196736,7 +196737,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -196747,7 +196748,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196757,13 +196758,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196774,7 +196775,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -196784,7 +196785,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -196792,7 +196793,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196848,12 +196849,12 @@ void m68008_device::sbcd_ds_dd_dp8() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -196917,7 +196918,7 @@ void m68008_device::sbcd_pais_paid_dp8() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -196957,12 +196958,12 @@ void m68008_device::sbcd_pais_paid_dp8() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -197033,11 +197034,11 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -197057,7 +197058,7 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197099,7 +197100,7 @@ void m68008_device::or_b_dd_ais_dp8() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197134,12 +197135,12 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -197160,7 +197161,7 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197202,7 +197203,7 @@ void m68008_device::or_b_dd_aips_dp8() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197236,7 +197237,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -197244,7 +197245,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -197265,7 +197266,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197307,7 +197308,7 @@ void m68008_device::or_b_dd_pais_dp8() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197339,7 +197340,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -197377,11 +197378,11 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -197401,7 +197402,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197443,7 +197444,7 @@ void m68008_device::or_b_dd_das_dp8() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197473,14 +197474,14 @@ void m68008_device::or_b_dd_dais_dp8() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -197488,7 +197489,7 @@ void m68008_device::or_b_dd_dais_dp8() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -197527,7 +197528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -197568,11 +197569,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -197592,7 +197593,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197634,7 +197635,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197668,7 +197669,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -197706,7 +197707,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197727,7 +197728,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197769,7 +197770,7 @@ void m68008_device::or_b_dd_adr16_dp8() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197801,7 +197802,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -197840,7 +197841,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -197878,7 +197879,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -197899,7 +197900,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197941,7 +197942,7 @@ void m68008_device::or_b_dd_adr32_dp8() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -197973,11 +197974,11 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -198015,7 +198016,7 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198057,7 +198058,7 @@ void m68008_device::or_w_dd_ais_dp8() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198110,12 +198111,12 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -198154,7 +198155,7 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198196,7 +198197,7 @@ void m68008_device::or_w_dd_aips_dp8() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198248,7 +198249,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -198256,7 +198257,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -198295,7 +198296,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198337,7 +198338,7 @@ void m68008_device::or_w_dd_pais_dp8() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198387,7 +198388,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -198425,11 +198426,11 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -198467,7 +198468,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198509,7 +198510,7 @@ void m68008_device::or_w_dd_das_dp8() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198557,14 +198558,14 @@ void m68008_device::or_w_dd_dais_dp8() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -198572,7 +198573,7 @@ void m68008_device::or_w_dd_dais_dp8() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -198611,7 +198612,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -198652,11 +198653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -198694,7 +198695,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198736,7 +198737,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198788,7 +198789,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -198826,7 +198827,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -198865,7 +198866,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198907,7 +198908,7 @@ void m68008_device::or_w_dd_adr16_dp8() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -198957,7 +198958,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -198996,7 +198997,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -199034,7 +199035,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -199073,7 +199074,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199115,7 +199116,7 @@ void m68008_device::or_w_dd_adr32_dp8() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -199165,7 +199166,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199205,7 +199206,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199243,7 +199244,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199283,7 +199284,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199323,7 +199324,7 @@ void m68008_device::or_l_dd_ais_dp8() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -199373,7 +199374,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199413,11 +199414,11 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199455,7 +199456,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199495,7 +199496,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199535,7 +199536,7 @@ void m68008_device::or_l_dd_aips_dp8() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -199584,14 +199585,14 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199630,7 +199631,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199668,7 +199669,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199708,7 +199709,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199748,7 +199749,7 @@ void m68008_device::or_l_dd_pais_dp8() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -199798,7 +199799,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -199835,7 +199836,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -199875,7 +199876,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -199913,7 +199914,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199953,7 +199954,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199993,7 +199994,7 @@ void m68008_device::or_l_dd_das_dp8() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -200041,14 +200042,14 @@ void m68008_device::or_l_dd_dais_dp8() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -200056,7 +200057,7 @@ void m68008_device::or_l_dd_dais_dp8() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -200095,7 +200096,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -200135,7 +200136,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200175,7 +200176,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200213,7 +200214,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200253,7 +200254,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200293,7 +200294,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -200345,7 +200346,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -200383,7 +200384,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200423,7 +200424,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200461,7 +200462,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200501,7 +200502,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200541,7 +200542,7 @@ void m68008_device::or_l_dd_adr16_dp8() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -200591,7 +200592,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -200630,7 +200631,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -200668,7 +200669,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -200708,7 +200709,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -200746,7 +200747,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200786,7 +200787,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200826,7 +200827,7 @@ void m68008_device::or_l_dd_adr32_dp8() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -200878,13 +200879,13 @@ void m68008_device::divs_w_ds_dd_dp8() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -200898,7 +200899,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -200908,7 +200909,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -200923,7 +200924,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -200931,7 +200932,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -200971,7 +200972,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -201009,7 +201010,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -201201,7 +201202,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -201210,7 +201211,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -201218,12 +201219,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201231,7 +201232,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201248,7 +201249,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -201256,7 +201257,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201302,7 +201303,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201329,13 +201330,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201343,27 +201344,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201375,7 +201376,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201387,7 +201388,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201402,7 +201403,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -201411,7 +201412,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201419,7 +201420,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -201429,7 +201430,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201438,7 +201439,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -201450,7 +201451,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -201514,7 +201515,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -201530,7 +201531,7 @@ void m68008_device::divs_w_ais_dd_dp8() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -201571,13 +201572,13 @@ void m68008_device::divs_w_ais_dd_dp8() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201591,7 +201592,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201601,7 +201602,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201616,7 +201617,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -201624,7 +201625,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -201664,7 +201665,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -201702,7 +201703,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -201894,7 +201895,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -201903,7 +201904,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -201911,12 +201912,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201924,7 +201925,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201941,7 +201942,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -201949,7 +201950,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201995,7 +201996,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202022,13 +202023,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202036,27 +202037,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202068,7 +202069,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202080,7 +202081,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202095,7 +202096,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202104,7 +202105,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202112,7 +202113,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202122,7 +202123,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202131,7 +202132,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202143,7 +202144,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202207,7 +202208,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -202229,7 +202230,7 @@ void m68008_device::divs_w_aips_dd_dp8() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202268,13 +202269,13 @@ void m68008_device::divs_w_aips_dd_dp8() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202288,7 +202289,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202298,7 +202299,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202313,7 +202314,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -202321,7 +202322,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -202361,7 +202362,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -202399,7 +202400,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -202591,7 +202592,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -202600,7 +202601,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -202608,12 +202609,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202621,7 +202622,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202638,7 +202639,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -202646,7 +202647,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202692,7 +202693,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202719,13 +202720,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202733,27 +202734,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202765,7 +202766,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202777,7 +202778,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202792,7 +202793,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202801,7 +202802,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202809,7 +202810,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202819,7 +202820,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202828,7 +202829,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202840,7 +202841,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202904,7 +202905,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -202928,7 +202929,7 @@ void m68008_device::divs_w_pais_dd_dp8() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202967,13 +202968,13 @@ void m68008_device::divs_w_pais_dd_dp8() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202987,7 +202988,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202997,7 +202998,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203012,7 +203013,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -203020,7 +203021,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -203060,7 +203061,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -203098,7 +203099,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -203290,7 +203291,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -203299,7 +203300,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -203307,12 +203308,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -203320,7 +203321,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203337,7 +203338,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -203345,7 +203346,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203391,7 +203392,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -203418,13 +203419,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203432,27 +203433,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203464,7 +203465,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203476,7 +203477,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203491,7 +203492,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -203500,7 +203501,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203508,7 +203509,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -203518,7 +203519,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203527,7 +203528,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -203539,7 +203540,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -203603,7 +203604,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -203656,7 +203657,7 @@ void m68008_device::divs_w_das_dd_dp8() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203697,13 +203698,13 @@ void m68008_device::divs_w_das_dd_dp8() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203717,7 +203718,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203727,7 +203728,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203742,7 +203743,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -203750,7 +203751,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -203790,7 +203791,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -203828,7 +203829,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -204020,7 +204021,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -204029,7 +204030,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -204037,12 +204038,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204050,7 +204051,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204067,7 +204068,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -204075,7 +204076,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204121,7 +204122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204148,13 +204149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204162,27 +204163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204194,7 +204195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204206,7 +204207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204221,7 +204222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -204230,7 +204231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204238,7 +204239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -204248,7 +204249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204257,7 +204258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -204269,7 +204270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -204333,7 +204334,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -204347,7 +204348,7 @@ void m68008_device::divs_w_dais_dd_dp8() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -204439,7 +204440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204480,13 +204481,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204500,7 +204501,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204510,7 +204511,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204525,7 +204526,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -204533,7 +204534,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -204573,7 +204574,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -204611,7 +204612,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -204803,7 +204804,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -204812,7 +204813,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -204820,12 +204821,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204833,7 +204834,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204850,7 +204851,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -204858,7 +204859,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204904,7 +204905,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204931,13 +204932,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204945,27 +204946,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204977,7 +204978,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204989,7 +204990,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205004,7 +205005,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205013,7 +205014,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205021,7 +205022,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205031,7 +205032,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205040,7 +205041,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205052,7 +205053,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205116,7 +205117,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -205170,7 +205171,7 @@ void m68008_device::divs_w_adr16_dd_dp8() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205209,13 +205210,13 @@ void m68008_device::divs_w_adr16_dd_dp8() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205229,7 +205230,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205239,7 +205240,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205254,7 +205255,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -205262,7 +205263,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -205302,7 +205303,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -205340,7 +205341,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -205532,7 +205533,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -205541,7 +205542,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -205549,12 +205550,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -205562,7 +205563,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205579,7 +205580,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -205587,7 +205588,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205633,7 +205634,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -205660,13 +205661,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205674,27 +205675,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205706,7 +205707,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205718,7 +205719,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205733,7 +205734,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205742,7 +205743,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205750,7 +205751,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205760,7 +205761,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205769,7 +205770,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205781,7 +205782,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205845,7 +205846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -205935,7 +205936,7 @@ void m68008_device::divs_w_adr32_dd_dp8() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -205974,13 +205975,13 @@ void m68008_device::divs_w_adr32_dd_dp8() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205994,7 +205995,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206004,7 +206005,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206019,7 +206020,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -206027,7 +206028,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -206067,7 +206068,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -206105,7 +206106,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
@@ -206297,7 +206298,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -206306,7 +206307,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -206314,12 +206315,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -206327,7 +206328,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206344,7 +206345,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -206352,7 +206353,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206398,7 +206399,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -206425,13 +206426,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206439,27 +206440,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206471,7 +206472,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206483,7 +206484,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206498,7 +206499,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -206507,7 +206508,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206515,7 +206516,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -206525,7 +206526,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206534,7 +206535,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -206546,7 +206547,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -206610,7 +206611,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -206662,7 +206663,7 @@ void m68008_device::divs_w_dpc_dd_dp8() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206703,13 +206704,13 @@ void m68008_device::divs_w_dpc_dd_dp8() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206723,7 +206724,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206733,7 +206734,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206748,7 +206749,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -206756,7 +206757,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -206796,7 +206797,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -206834,7 +206835,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -207026,7 +207027,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -207035,7 +207036,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -207043,12 +207044,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207056,7 +207057,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207073,7 +207074,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -207081,7 +207082,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207127,7 +207128,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207154,13 +207155,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207168,27 +207169,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207200,7 +207201,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207212,7 +207213,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207227,7 +207228,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -207236,7 +207237,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207244,7 +207245,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -207254,7 +207255,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207263,7 +207264,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -207275,7 +207276,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -207339,7 +207340,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -207352,7 +207353,7 @@ void m68008_device::divs_w_dpci_dd_dp8() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207444,7 +207445,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207485,13 +207486,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207505,7 +207506,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207515,7 +207516,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207530,7 +207531,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -207538,7 +207539,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -207578,7 +207579,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -207616,7 +207617,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -207808,7 +207809,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -207817,7 +207818,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -207825,12 +207826,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207838,7 +207839,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207855,7 +207856,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -207863,7 +207864,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207909,7 +207910,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207936,13 +207937,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207950,27 +207951,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207982,7 +207983,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207994,7 +207995,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208009,7 +208010,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208018,7 +208019,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208026,7 +208027,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208036,7 +208037,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208045,7 +208046,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208057,7 +208058,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208121,7 +208122,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -208177,13 +208178,13 @@ void m68008_device::divs_w_imm16_dd_dp8() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208197,7 +208198,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208207,7 +208208,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208222,7 +208223,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -208230,7 +208231,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -208270,7 +208271,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -208308,7 +208309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -208500,7 +208501,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -208509,7 +208510,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -208517,12 +208518,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -208530,7 +208531,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208547,7 +208548,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -208555,7 +208556,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208601,7 +208602,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -208628,13 +208629,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208642,27 +208643,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208674,7 +208675,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208686,7 +208687,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208701,7 +208702,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208710,7 +208711,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208718,7 +208719,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208728,7 +208729,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208737,7 +208738,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208749,7 +208750,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208813,7 +208814,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -208831,7 +208832,7 @@ void m68008_device::sub_b_ds_dd_dp8() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -208890,7 +208891,7 @@ void m68008_device::sub_b_ais_dd_dp8() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208913,7 +208914,7 @@ void m68008_device::sub_b_ais_dd_dp8() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -208978,7 +208979,7 @@ void m68008_device::sub_b_aips_dd_dp8() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -208999,7 +209000,7 @@ void m68008_device::sub_b_aips_dd_dp8() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209066,7 +209067,7 @@ void m68008_device::sub_b_pais_dd_dp8() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -209087,7 +209088,7 @@ void m68008_device::sub_b_pais_dd_dp8() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209183,7 +209184,7 @@ void m68008_device::sub_b_das_dd_dp8() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209206,7 +209207,7 @@ void m68008_device::sub_b_das_dd_dp8() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209263,7 +209264,7 @@ void m68008_device::sub_b_dais_dd_dp8() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209355,7 +209356,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209378,7 +209379,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209475,7 +209476,7 @@ void m68008_device::sub_b_adr16_dd_dp8() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -209496,7 +209497,7 @@ void m68008_device::sub_b_adr16_dd_dp8() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209629,7 +209630,7 @@ void m68008_device::sub_b_adr32_dd_dp8() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -209650,7 +209651,7 @@ void m68008_device::sub_b_adr32_dd_dp8() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209745,7 +209746,7 @@ void m68008_device::sub_b_dpc_dd_dp8() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209768,7 +209769,7 @@ void m68008_device::sub_b_dpc_dd_dp8() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209824,7 +209825,7 @@ void m68008_device::sub_b_dpci_dd_dp8() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209916,7 +209917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209939,7 +209940,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210038,7 +210039,7 @@ void m68008_device::sub_b_imm8_dd_dp8() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210099,7 +210100,7 @@ void m68008_device::sub_w_ds_dd_dp8() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210160,7 +210161,7 @@ void m68008_device::sub_w_as_dd_dp8() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210219,7 +210220,7 @@ void m68008_device::sub_w_ais_dd_dp8() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210260,7 +210261,7 @@ void m68008_device::sub_w_ais_dd_dp8() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210325,7 +210326,7 @@ void m68008_device::sub_w_aips_dd_dp8() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -210364,7 +210365,7 @@ void m68008_device::sub_w_aips_dd_dp8() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210431,7 +210432,7 @@ void m68008_device::sub_w_pais_dd_dp8() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -210470,7 +210471,7 @@ void m68008_device::sub_w_pais_dd_dp8() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210566,7 +210567,7 @@ void m68008_device::sub_w_das_dd_dp8() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210607,7 +210608,7 @@ void m68008_device::sub_w_das_dd_dp8() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210664,7 +210665,7 @@ void m68008_device::sub_w_dais_dd_dp8() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -210756,7 +210757,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210797,7 +210798,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210894,7 +210895,7 @@ void m68008_device::sub_w_adr16_dd_dp8() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -210933,7 +210934,7 @@ void m68008_device::sub_w_adr16_dd_dp8() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211066,7 +211067,7 @@ void m68008_device::sub_w_adr32_dd_dp8() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -211105,7 +211106,7 @@ void m68008_device::sub_w_adr32_dd_dp8() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211200,7 +211201,7 @@ void m68008_device::sub_w_dpc_dd_dp8() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -211241,7 +211242,7 @@ void m68008_device::sub_w_dpc_dd_dp8() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211297,7 +211298,7 @@ void m68008_device::sub_w_dpci_dd_dp8() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -211389,7 +211390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -211430,7 +211431,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211529,7 +211530,7 @@ void m68008_device::sub_w_imm16_dd_dp8() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211590,7 +211591,7 @@ void m68008_device::sub_l_ds_dd_dp8() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -211629,7 +211630,7 @@ void m68008_device::sub_l_ds_dd_dp8() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -211659,7 +211660,7 @@ void m68008_device::sub_l_as_dd_dp8() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -211698,7 +211699,7 @@ void m68008_device::sub_l_as_dd_dp8() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -211726,7 +211727,7 @@ void m68008_device::sub_l_ais_dd_dp8() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -211803,12 +211804,12 @@ void m68008_device::sub_l_ais_dd_dp8() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211868,7 +211869,7 @@ void m68008_device::sub_l_aips_dd_dp8() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -211948,12 +211949,12 @@ void m68008_device::sub_l_aips_dd_dp8() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212012,7 +212013,7 @@ void m68008_device::sub_l_pais_dd_dp8() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -212094,12 +212095,12 @@ void m68008_device::sub_l_pais_dd_dp8() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212195,7 +212196,7 @@ void m68008_device::sub_l_das_dd_dp8() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212272,12 +212273,12 @@ void m68008_device::sub_l_das_dd_dp8() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212335,7 +212336,7 @@ void m68008_device::sub_l_dais_dd_dp8() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -212426,7 +212427,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212503,12 +212504,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212606,7 +212607,7 @@ void m68008_device::sub_l_adr16_dd_dp8() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212683,12 +212684,12 @@ void m68008_device::sub_l_adr16_dd_dp8() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212822,7 +212823,7 @@ void m68008_device::sub_l_adr32_dd_dp8() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -212899,12 +212900,12 @@ void m68008_device::sub_l_adr32_dd_dp8() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212999,7 +213000,7 @@ void m68008_device::sub_l_dpc_dd_dp8() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -213076,12 +213077,12 @@ void m68008_device::sub_l_dpc_dd_dp8() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213138,7 +213139,7 @@ void m68008_device::sub_l_dpci_dd_dp8() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -213229,7 +213230,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -213306,12 +213307,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213447,7 +213448,7 @@ void m68008_device::sub_l_imm32_dd_dp8() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -213486,7 +213487,7 @@ void m68008_device::sub_l_imm32_dd_dp8() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -213516,7 +213517,7 @@ void m68008_device::suba_w_ds_ad_dp8() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213554,7 +213555,7 @@ void m68008_device::suba_w_ds_ad_dp8() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213583,7 +213584,7 @@ void m68008_device::suba_w_as_ad_dp8() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213621,7 +213622,7 @@ void m68008_device::suba_w_as_ad_dp8() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213648,7 +213649,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -213689,7 +213690,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213727,7 +213728,7 @@ void m68008_device::suba_w_ais_ad_dp8() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213760,7 +213761,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -213799,7 +213800,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213837,7 +213838,7 @@ void m68008_device::suba_w_aips_ad_dp8() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213872,7 +213873,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -213911,7 +213912,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213949,7 +213950,7 @@ void m68008_device::suba_w_pais_ad_dp8() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214013,7 +214014,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214054,7 +214055,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214092,7 +214093,7 @@ void m68008_device::suba_w_das_ad_dp8() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214117,7 +214118,7 @@ void m68008_device::suba_w_dais_ad_dp8() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214209,7 +214210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214250,7 +214251,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214288,7 +214289,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214353,7 +214354,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -214392,7 +214393,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214430,7 +214431,7 @@ void m68008_device::suba_w_adr16_ad_dp8() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214531,7 +214532,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -214570,7 +214571,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214608,7 +214609,7 @@ void m68008_device::suba_w_adr32_ad_dp8() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214671,7 +214672,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214712,7 +214713,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214750,7 +214751,7 @@ void m68008_device::suba_w_dpc_ad_dp8() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214774,7 +214775,7 @@ void m68008_device::suba_w_dpci_ad_dp8() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214866,7 +214867,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214907,7 +214908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214945,7 +214946,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -215012,7 +215013,7 @@ void m68008_device::suba_w_imm16_ad_dp8() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -215050,7 +215051,7 @@ void m68008_device::suba_w_imm16_ad_dp8() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -215079,7 +215080,7 @@ void m68008_device::subx_b_ds_dd_dp8() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -215144,7 +215145,7 @@ void m68008_device::subx_b_pais_paid_dp8() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -215185,7 +215186,7 @@ void m68008_device::subx_b_pais_paid_dp8() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215258,7 +215259,7 @@ void m68008_device::sub_b_dd_ais_dp8() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215281,7 +215282,7 @@ void m68008_device::sub_b_dd_ais_dp8() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215360,7 +215361,7 @@ void m68008_device::sub_b_dd_aips_dp8() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -215381,7 +215382,7 @@ void m68008_device::sub_b_dd_aips_dp8() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215462,7 +215463,7 @@ void m68008_device::sub_b_dd_pais_dp8() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -215483,7 +215484,7 @@ void m68008_device::sub_b_dd_pais_dp8() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215593,7 +215594,7 @@ void m68008_device::sub_b_dd_das_dp8() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215616,7 +215617,7 @@ void m68008_device::sub_b_dd_das_dp8() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215687,7 +215688,7 @@ void m68008_device::sub_b_dd_dais_dp8() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215779,7 +215780,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215802,7 +215803,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215913,7 +215914,7 @@ void m68008_device::sub_b_dd_adr16_dp8() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -215934,7 +215935,7 @@ void m68008_device::sub_b_dd_adr16_dp8() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216081,7 +216082,7 @@ void m68008_device::sub_b_dd_adr32_dp8() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -216102,7 +216103,7 @@ void m68008_device::sub_b_dd_adr32_dp8() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216177,7 +216178,7 @@ void m68008_device::subx_w_ds_dd_dp8() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -216242,7 +216243,7 @@ void m68008_device::subx_w_pais_paid_dp8() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -216319,7 +216320,7 @@ void m68008_device::subx_w_pais_paid_dp8() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216410,7 +216411,7 @@ void m68008_device::sub_w_dd_ais_dp8() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216451,7 +216452,7 @@ void m68008_device::sub_w_dd_ais_dp8() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216548,7 +216549,7 @@ void m68008_device::sub_w_dd_aips_dp8() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -216587,7 +216588,7 @@ void m68008_device::sub_w_dd_aips_dp8() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216686,7 +216687,7 @@ void m68008_device::sub_w_dd_pais_dp8() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -216725,7 +216726,7 @@ void m68008_device::sub_w_dd_pais_dp8() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216853,7 +216854,7 @@ void m68008_device::sub_w_dd_das_dp8() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216894,7 +216895,7 @@ void m68008_device::sub_w_dd_das_dp8() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216983,7 +216984,7 @@ void m68008_device::sub_w_dd_dais_dp8() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -217075,7 +217076,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -217116,7 +217117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217245,7 +217246,7 @@ void m68008_device::sub_w_dd_adr16_dp8() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -217284,7 +217285,7 @@ void m68008_device::sub_w_dd_adr16_dp8() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217449,7 +217450,7 @@ void m68008_device::sub_w_dd_adr32_dp8() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -217488,7 +217489,7 @@ void m68008_device::sub_w_dd_adr32_dp8() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217581,7 +217582,7 @@ void m68008_device::subx_l_ds_dd_dp8() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -217620,7 +217621,7 @@ void m68008_device::subx_l_ds_dd_dp8() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217690,7 +217691,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -217767,7 +217768,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -217841,7 +217842,7 @@ void m68008_device::subx_l_pais_paid_dp8() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217932,7 +217933,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -218009,7 +218010,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218049,7 +218050,7 @@ void m68008_device::sub_l_dd_ais_dp8() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218138,7 +218139,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -218218,7 +218219,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218258,7 +218259,7 @@ void m68008_device::sub_l_dd_aips_dp8() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218346,7 +218347,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -218428,7 +218429,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218468,7 +218469,7 @@ void m68008_device::sub_l_dd_pais_dp8() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218593,7 +218594,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -218670,7 +218671,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218710,7 +218711,7 @@ void m68008_device::sub_l_dd_das_dp8() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218797,7 +218798,7 @@ void m68008_device::sub_l_dd_dais_dp8() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -218888,7 +218889,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -218965,7 +218966,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219005,7 +219006,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219132,7 +219133,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -219209,7 +219210,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219249,7 +219250,7 @@ void m68008_device::sub_l_dd_adr16_dp8() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219412,7 +219413,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -219489,7 +219490,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219529,7 +219530,7 @@ void m68008_device::sub_l_dd_adr32_dp8() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219620,7 +219621,7 @@ void m68008_device::suba_l_ds_ad_dp8() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -219658,7 +219659,7 @@ void m68008_device::suba_l_ds_ad_dp8() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219687,7 +219688,7 @@ void m68008_device::suba_l_as_ad_dp8() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -219725,7 +219726,7 @@ void m68008_device::suba_l_as_ad_dp8() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219752,7 +219753,7 @@ void m68008_device::suba_l_ais_ad_dp8() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -219829,11 +219830,11 @@ void m68008_device::suba_l_ais_ad_dp8() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -219892,7 +219893,7 @@ void m68008_device::suba_l_aips_ad_dp8() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -219972,11 +219973,11 @@ void m68008_device::suba_l_aips_ad_dp8() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -220034,7 +220035,7 @@ void m68008_device::suba_l_pais_ad_dp8() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -220116,11 +220117,11 @@ void m68008_device::suba_l_pais_ad_dp8() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -220215,7 +220216,7 @@ void m68008_device::suba_l_das_ad_dp8() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220292,11 +220293,11 @@ void m68008_device::suba_l_das_ad_dp8() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220353,7 +220354,7 @@ void m68008_device::suba_l_dais_ad_dp8() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -220444,7 +220445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220521,11 +220522,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220622,7 +220623,7 @@ void m68008_device::suba_l_adr16_ad_dp8() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220699,11 +220700,11 @@ void m68008_device::suba_l_adr16_ad_dp8() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220836,7 +220837,7 @@ void m68008_device::suba_l_adr32_ad_dp8() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -220913,11 +220914,11 @@ void m68008_device::suba_l_adr32_ad_dp8() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -221011,7 +221012,7 @@ void m68008_device::suba_l_dpc_ad_dp8() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -221088,11 +221089,11 @@ void m68008_device::suba_l_dpc_ad_dp8() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -221148,7 +221149,7 @@ void m68008_device::suba_l_dpci_ad_dp8() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -221239,7 +221240,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -221316,11 +221317,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -221455,7 +221456,7 @@ void m68008_device::suba_l_imm32_ad_dp8() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -221493,7 +221494,7 @@ void m68008_device::suba_l_imm32_ad_dp8() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -221522,7 +221523,7 @@ void m68008_device::cmp_b_ds_dd_dp8() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221580,7 +221581,7 @@ void m68008_device::cmp_b_ais_dd_dp8() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221603,7 +221604,7 @@ void m68008_device::cmp_b_ais_dd_dp8() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221667,7 +221668,7 @@ void m68008_device::cmp_b_aips_dd_dp8() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -221688,7 +221689,7 @@ void m68008_device::cmp_b_aips_dd_dp8() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221754,7 +221755,7 @@ void m68008_device::cmp_b_pais_dd_dp8() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -221775,7 +221776,7 @@ void m68008_device::cmp_b_pais_dd_dp8() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221870,7 +221871,7 @@ void m68008_device::cmp_b_das_dd_dp8() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221893,7 +221894,7 @@ void m68008_device::cmp_b_das_dd_dp8() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221949,7 +221950,7 @@ void m68008_device::cmp_b_dais_dd_dp8() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -222041,7 +222042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222064,7 +222065,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222160,7 +222161,7 @@ void m68008_device::cmp_b_adr16_dd_dp8() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -222181,7 +222182,7 @@ void m68008_device::cmp_b_adr16_dd_dp8() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222313,7 +222314,7 @@ void m68008_device::cmp_b_adr32_dd_dp8() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -222334,7 +222335,7 @@ void m68008_device::cmp_b_adr32_dd_dp8() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222428,7 +222429,7 @@ void m68008_device::cmp_b_dpc_dd_dp8() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222451,7 +222452,7 @@ void m68008_device::cmp_b_dpc_dd_dp8() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222506,7 +222507,7 @@ void m68008_device::cmp_b_dpci_dd_dp8() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -222598,7 +222599,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222621,7 +222622,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222719,7 +222720,7 @@ void m68008_device::cmp_b_imm8_dd_dp8() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222779,7 +222780,7 @@ void m68008_device::cmp_w_ds_dd_dp8() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222839,7 +222840,7 @@ void m68008_device::cmp_w_as_dd_dp8() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222897,7 +222898,7 @@ void m68008_device::cmp_w_ais_dd_dp8() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222938,7 +222939,7 @@ void m68008_device::cmp_w_ais_dd_dp8() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223002,7 +223003,7 @@ void m68008_device::cmp_w_aips_dd_dp8() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -223041,7 +223042,7 @@ void m68008_device::cmp_w_aips_dd_dp8() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223107,7 +223108,7 @@ void m68008_device::cmp_w_pais_dd_dp8() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -223146,7 +223147,7 @@ void m68008_device::cmp_w_pais_dd_dp8() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223241,7 +223242,7 @@ void m68008_device::cmp_w_das_dd_dp8() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223282,7 +223283,7 @@ void m68008_device::cmp_w_das_dd_dp8() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223338,7 +223339,7 @@ void m68008_device::cmp_w_dais_dd_dp8() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -223430,7 +223431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223471,7 +223472,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223567,7 +223568,7 @@ void m68008_device::cmp_w_adr16_dd_dp8() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -223606,7 +223607,7 @@ void m68008_device::cmp_w_adr16_dd_dp8() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223738,7 +223739,7 @@ void m68008_device::cmp_w_adr32_dd_dp8() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -223777,7 +223778,7 @@ void m68008_device::cmp_w_adr32_dd_dp8() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223871,7 +223872,7 @@ void m68008_device::cmp_w_dpc_dd_dp8() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223912,7 +223913,7 @@ void m68008_device::cmp_w_dpc_dd_dp8() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223967,7 +223968,7 @@ void m68008_device::cmp_w_dpci_dd_dp8() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -224059,7 +224060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -224100,7 +224101,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -224198,7 +224199,7 @@ void m68008_device::cmp_w_imm16_dd_dp8() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -224258,11 +224259,11 @@ void m68008_device::cmp_l_ds_dd_dp8() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224323,11 +224324,11 @@ void m68008_device::cmp_l_as_dd_dp8() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224386,7 +224387,7 @@ void m68008_device::cmp_l_ais_dd_dp8() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -224463,11 +224464,11 @@ void m68008_device::cmp_l_ais_dd_dp8() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224526,7 +224527,7 @@ void m68008_device::cmp_l_aips_dd_dp8() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -224606,11 +224607,11 @@ void m68008_device::cmp_l_aips_dd_dp8() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224668,7 +224669,7 @@ void m68008_device::cmp_l_pais_dd_dp8() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -224750,11 +224751,11 @@ void m68008_device::cmp_l_pais_dd_dp8() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224849,7 +224850,7 @@ void m68008_device::cmp_l_das_dd_dp8() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -224926,11 +224927,11 @@ void m68008_device::cmp_l_das_dd_dp8() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224987,7 +224988,7 @@ void m68008_device::cmp_l_dais_dd_dp8() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225078,7 +225079,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -225155,11 +225156,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225256,7 +225257,7 @@ void m68008_device::cmp_l_adr16_dd_dp8() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -225333,11 +225334,11 @@ void m68008_device::cmp_l_adr16_dd_dp8() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225470,7 +225471,7 @@ void m68008_device::cmp_l_adr32_dd_dp8() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -225547,11 +225548,11 @@ void m68008_device::cmp_l_adr32_dd_dp8() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225645,7 +225646,7 @@ void m68008_device::cmp_l_dpc_dd_dp8() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -225722,11 +225723,11 @@ void m68008_device::cmp_l_dpc_dd_dp8() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225782,7 +225783,7 @@ void m68008_device::cmp_l_dpci_dd_dp8() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225873,7 +225874,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -225950,11 +225951,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226089,11 +226090,11 @@ void m68008_device::cmp_l_imm32_dd_dp8() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226154,11 +226155,11 @@ void m68008_device::cmpa_w_ds_ad_dp8() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226219,11 +226220,11 @@ void m68008_device::cmpa_w_as_ad_dp8() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226282,7 +226283,7 @@ void m68008_device::cmpa_w_ais_ad_dp8() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226323,11 +226324,11 @@ void m68008_device::cmpa_w_ais_ad_dp8() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226392,7 +226393,7 @@ void m68008_device::cmpa_w_aips_ad_dp8() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -226431,11 +226432,11 @@ void m68008_device::cmpa_w_aips_ad_dp8() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226502,7 +226503,7 @@ void m68008_device::cmpa_w_pais_ad_dp8() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -226541,11 +226542,11 @@ void m68008_device::cmpa_w_pais_ad_dp8() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226641,7 +226642,7 @@ void m68008_device::cmpa_w_das_ad_dp8() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226682,11 +226683,11 @@ void m68008_device::cmpa_w_das_ad_dp8() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226743,7 +226744,7 @@ void m68008_device::cmpa_w_dais_ad_dp8() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -226835,7 +226836,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226876,11 +226877,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226977,7 +226978,7 @@ void m68008_device::cmpa_w_adr16_ad_dp8() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -227016,11 +227017,11 @@ void m68008_device::cmpa_w_adr16_ad_dp8() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227153,7 +227154,7 @@ void m68008_device::cmpa_w_adr32_ad_dp8() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -227192,11 +227193,11 @@ void m68008_device::cmpa_w_adr32_ad_dp8() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227291,7 +227292,7 @@ void m68008_device::cmpa_w_dpc_ad_dp8() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -227332,11 +227333,11 @@ void m68008_device::cmpa_w_dpc_ad_dp8() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227392,7 +227393,7 @@ void m68008_device::cmpa_w_dpci_ad_dp8() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -227484,7 +227485,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -227525,11 +227526,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227628,11 +227629,11 @@ void m68008_device::cmpa_w_imm16_ad_dp8() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227692,7 +227693,7 @@ void m68008_device::eor_b_dd_ds_dp8() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -227700,7 +227701,7 @@ void m68008_device::eor_b_dd_ds_dp8() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -227775,7 +227776,7 @@ void m68008_device::cmpm_b_aips_aipd_dp8() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -227797,7 +227798,7 @@ void m68008_device::cmpm_b_aips_aipd_dp8() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227851,11 +227852,11 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -227875,7 +227876,7 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227917,7 +227918,7 @@ void m68008_device::eor_b_dd_ais_dp8() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -227952,12 +227953,12 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -227978,7 +227979,7 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228020,7 +228021,7 @@ void m68008_device::eor_b_dd_aips_dp8() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228054,7 +228055,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -228062,7 +228063,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -228083,7 +228084,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228125,7 +228126,7 @@ void m68008_device::eor_b_dd_pais_dp8() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228157,7 +228158,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -228195,11 +228196,11 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -228219,7 +228220,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228261,7 +228262,7 @@ void m68008_device::eor_b_dd_das_dp8() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228291,14 +228292,14 @@ void m68008_device::eor_b_dd_dais_dp8() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -228306,7 +228307,7 @@ void m68008_device::eor_b_dd_dais_dp8() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -228345,7 +228346,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -228386,11 +228387,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -228410,7 +228411,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228452,7 +228453,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228486,7 +228487,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -228524,7 +228525,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -228545,7 +228546,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228587,7 +228588,7 @@ void m68008_device::eor_b_dd_adr16_dp8() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228619,7 +228620,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -228658,7 +228659,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -228696,7 +228697,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -228717,7 +228718,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228759,7 +228760,7 @@ void m68008_device::eor_b_dd_adr32_dp8() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -228792,7 +228793,7 @@ void m68008_device::eor_w_dd_ds_dp8() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -228800,7 +228801,7 @@ void m68008_device::eor_w_dd_ds_dp8() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -228893,7 +228894,7 @@ void m68008_device::cmpm_w_aips_aipd_dp8() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -228933,7 +228934,7 @@ void m68008_device::cmpm_w_aips_aipd_dp8() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228987,11 +228988,11 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -229029,7 +229030,7 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229071,7 +229072,7 @@ void m68008_device::eor_w_dd_ais_dp8() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229124,12 +229125,12 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -229168,7 +229169,7 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229210,7 +229211,7 @@ void m68008_device::eor_w_dd_aips_dp8() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229262,7 +229263,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -229270,7 +229271,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -229309,7 +229310,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229351,7 +229352,7 @@ void m68008_device::eor_w_dd_pais_dp8() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229401,7 +229402,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -229439,11 +229440,11 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -229481,7 +229482,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229523,7 +229524,7 @@ void m68008_device::eor_w_dd_das_dp8() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229571,14 +229572,14 @@ void m68008_device::eor_w_dd_dais_dp8() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -229586,7 +229587,7 @@ void m68008_device::eor_w_dd_dais_dp8() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -229625,7 +229626,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -229666,11 +229667,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -229708,7 +229709,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229750,7 +229751,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229802,7 +229803,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -229840,7 +229841,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -229879,7 +229880,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229921,7 +229922,7 @@ void m68008_device::eor_w_dd_adr16_dp8() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -229971,7 +229972,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -230010,7 +230011,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -230048,7 +230049,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -230087,7 +230088,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230129,7 +230130,7 @@ void m68008_device::eor_w_dd_adr32_dp8() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -230180,12 +230181,12 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -230220,7 +230221,7 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -230229,7 +230230,7 @@ void m68008_device::eor_l_dd_ds_dp8() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -230326,7 +230327,7 @@ void m68008_device::cmpm_l_aips_aipd_dp8() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -230400,13 +230401,13 @@ void m68008_device::cmpm_l_aips_aipd_dp8() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230460,7 +230461,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -230500,7 +230501,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230538,7 +230539,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230578,7 +230579,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -230618,7 +230619,7 @@ void m68008_device::eor_l_dd_ais_dp8() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -230668,7 +230669,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -230708,11 +230709,11 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230750,7 +230751,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230790,7 +230791,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -230830,7 +230831,7 @@ void m68008_device::eor_l_dd_aips_dp8() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -230879,14 +230880,14 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230925,7 +230926,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -230963,7 +230964,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231003,7 +231004,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231043,7 +231044,7 @@ void m68008_device::eor_l_dd_pais_dp8() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -231093,7 +231094,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -231130,7 +231131,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231170,7 +231171,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231208,7 +231209,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231248,7 +231249,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231288,7 +231289,7 @@ void m68008_device::eor_l_dd_das_dp8() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -231336,14 +231337,14 @@ void m68008_device::eor_l_dd_dais_dp8() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -231351,7 +231352,7 @@ void m68008_device::eor_l_dd_dais_dp8() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -231390,7 +231391,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -231430,7 +231431,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231470,7 +231471,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231508,7 +231509,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231548,7 +231549,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231588,7 +231589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -231640,7 +231641,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -231678,7 +231679,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231718,7 +231719,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -231756,7 +231757,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231796,7 +231797,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231836,7 +231837,7 @@ void m68008_device::eor_l_dd_adr16_dp8() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -231886,7 +231887,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -231925,7 +231926,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -231963,7 +231964,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -232003,7 +232004,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -232041,7 +232042,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232081,7 +232082,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -232121,7 +232122,7 @@ void m68008_device::eor_l_dd_adr32_dp8() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -232173,11 +232174,11 @@ void m68008_device::cmpa_l_ds_ad_dp8() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232238,11 +232239,11 @@ void m68008_device::cmpa_l_as_ad_dp8() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232301,7 +232302,7 @@ void m68008_device::cmpa_l_ais_ad_dp8() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -232378,11 +232379,11 @@ void m68008_device::cmpa_l_ais_ad_dp8() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232441,7 +232442,7 @@ void m68008_device::cmpa_l_aips_ad_dp8() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -232521,11 +232522,11 @@ void m68008_device::cmpa_l_aips_ad_dp8() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232583,7 +232584,7 @@ void m68008_device::cmpa_l_pais_ad_dp8() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -232665,11 +232666,11 @@ void m68008_device::cmpa_l_pais_ad_dp8() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232764,7 +232765,7 @@ void m68008_device::cmpa_l_das_ad_dp8() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -232841,11 +232842,11 @@ void m68008_device::cmpa_l_das_ad_dp8() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232902,7 +232903,7 @@ void m68008_device::cmpa_l_dais_ad_dp8() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -232993,7 +232994,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -233070,11 +233071,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233171,7 +233172,7 @@ void m68008_device::cmpa_l_adr16_ad_dp8() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -233248,11 +233249,11 @@ void m68008_device::cmpa_l_adr16_ad_dp8() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233385,7 +233386,7 @@ void m68008_device::cmpa_l_adr32_ad_dp8() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -233462,11 +233463,11 @@ void m68008_device::cmpa_l_adr32_ad_dp8() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233560,7 +233561,7 @@ void m68008_device::cmpa_l_dpc_ad_dp8() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -233637,11 +233638,11 @@ void m68008_device::cmpa_l_dpc_ad_dp8() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233697,7 +233698,7 @@ void m68008_device::cmpa_l_dpci_ad_dp8() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -233788,7 +233789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -233865,11 +233866,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234004,11 +234005,11 @@ void m68008_device::cmpa_l_imm32_ad_dp8() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234069,7 +234070,7 @@ void m68008_device::and_b_ds_dd_dp8() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234077,7 +234078,7 @@ void m68008_device::and_b_ds_dd_dp8() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234129,11 +234130,11 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -234153,7 +234154,7 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234161,7 +234162,7 @@ void m68008_device::and_b_ais_dd_dp8() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234216,12 +234217,12 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -234242,7 +234243,7 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234250,7 +234251,7 @@ void m68008_device::and_b_aips_dd_dp8() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234304,7 +234305,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -234312,7 +234313,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -234333,7 +234334,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234341,7 +234342,7 @@ void m68008_device::and_b_pais_dd_dp8() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234393,7 +234394,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234431,11 +234432,11 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -234455,7 +234456,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234463,7 +234464,7 @@ void m68008_device::and_b_das_dd_dp8() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234513,14 +234514,14 @@ void m68008_device::and_b_dais_dd_dp8() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -234528,7 +234529,7 @@ void m68008_device::and_b_dais_dd_dp8() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234567,7 +234568,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234608,11 +234609,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -234632,7 +234633,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234640,7 +234641,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234694,7 +234695,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -234732,7 +234733,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -234753,7 +234754,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234761,7 +234762,7 @@ void m68008_device::and_b_adr16_dd_dp8() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234813,7 +234814,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234852,7 +234853,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -234890,7 +234891,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -234911,7 +234912,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234919,7 +234920,7 @@ void m68008_device::and_b_adr32_dd_dp8() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -234970,7 +234971,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235008,11 +235009,11 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -235032,7 +235033,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235040,7 +235041,7 @@ void m68008_device::and_b_dpc_dd_dp8() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235089,14 +235090,14 @@ void m68008_device::and_b_dpci_dd_dp8() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -235104,7 +235105,7 @@ void m68008_device::and_b_dpci_dd_dp8() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235143,7 +235144,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235184,11 +235185,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob);
@@ -235208,7 +235209,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235216,7 +235217,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235270,7 +235271,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235309,7 +235310,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235317,7 +235318,7 @@ void m68008_device::and_b_imm8_dd_dp8() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235371,7 +235372,7 @@ void m68008_device::and_w_ds_dd_dp8() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235379,7 +235380,7 @@ void m68008_device::and_w_ds_dd_dp8() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235431,11 +235432,11 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235473,7 +235474,7 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235481,7 +235482,7 @@ void m68008_device::and_w_ais_dd_dp8() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235536,12 +235537,12 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -235580,7 +235581,7 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235588,7 +235589,7 @@ void m68008_device::and_w_aips_dd_dp8() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235642,7 +235643,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -235650,7 +235651,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -235689,7 +235690,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235697,7 +235698,7 @@ void m68008_device::and_w_pais_dd_dp8() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235749,7 +235750,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235787,11 +235788,11 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -235829,7 +235830,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235837,7 +235838,7 @@ void m68008_device::and_w_das_dd_dp8() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235887,14 +235888,14 @@ void m68008_device::and_w_dais_dd_dp8() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -235902,7 +235903,7 @@ void m68008_device::and_w_dais_dd_dp8() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235941,7 +235942,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -235982,11 +235983,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -236024,7 +236025,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236032,7 +236033,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236086,7 +236087,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -236124,7 +236125,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -236163,7 +236164,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236171,7 +236172,7 @@ void m68008_device::and_w_adr16_dd_dp8() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236223,7 +236224,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236262,7 +236263,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -236300,7 +236301,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -236339,7 +236340,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236347,7 +236348,7 @@ void m68008_device::and_w_adr32_dd_dp8() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236398,7 +236399,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236436,11 +236437,11 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236478,7 +236479,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236486,7 +236487,7 @@ void m68008_device::and_w_dpc_dd_dp8() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236535,14 +236536,14 @@ void m68008_device::and_w_dpci_dd_dp8() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -236550,7 +236551,7 @@ void m68008_device::and_w_dpci_dd_dp8() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236589,7 +236590,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236630,11 +236631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236672,7 +236673,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236680,7 +236681,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236734,7 +236735,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236773,7 +236774,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236781,7 +236782,7 @@ void m68008_device::and_w_imm16_dd_dp8() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236835,12 +236836,12 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -236875,7 +236876,7 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -236884,7 +236885,7 @@ void m68008_device::and_l_ds_dd_dp8() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -236904,7 +236905,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -236944,7 +236945,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -236982,12 +236983,12 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237028,7 +237029,7 @@ void m68008_device::and_l_ais_dd_dp8() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237048,7 +237049,7 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -237088,11 +237089,11 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237130,12 +237131,12 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237176,7 +237177,7 @@ void m68008_device::and_l_aips_dd_dp8() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237195,14 +237196,14 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237241,7 +237242,7 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237279,12 +237280,12 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237325,7 +237326,7 @@ void m68008_device::and_l_pais_dd_dp8() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237345,7 +237346,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -237382,7 +237383,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237422,7 +237423,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237460,12 +237461,12 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237506,7 +237507,7 @@ void m68008_device::and_l_das_dd_dp8() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237524,14 +237525,14 @@ void m68008_device::and_l_dais_dd_dp8() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -237539,7 +237540,7 @@ void m68008_device::and_l_dais_dd_dp8() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -237578,7 +237579,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -237618,7 +237619,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237658,7 +237659,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237696,12 +237697,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237742,7 +237743,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237764,7 +237765,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -237802,7 +237803,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237842,7 +237843,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -237880,12 +237881,12 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237926,7 +237927,7 @@ void m68008_device::and_l_adr16_dd_dp8() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237946,7 +237947,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -237985,7 +237986,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238023,7 +238024,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -238063,7 +238064,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -238101,12 +238102,12 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238147,7 +238148,7 @@ void m68008_device::and_l_adr32_dd_dp8() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238166,7 +238167,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238203,7 +238204,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238243,7 +238244,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238281,12 +238282,12 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238327,7 +238328,7 @@ void m68008_device::and_l_dpc_dd_dp8() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238344,14 +238345,14 @@ void m68008_device::and_l_dpci_dd_dp8() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -238359,7 +238360,7 @@ void m68008_device::and_l_dpci_dd_dp8() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238398,7 +238399,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238438,7 +238439,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238478,7 +238479,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238516,12 +238517,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238562,7 +238563,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238582,7 +238583,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238621,7 +238622,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238660,12 +238661,12 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -238700,7 +238701,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -238709,7 +238710,7 @@ void m68008_device::and_l_imm32_dd_dp8() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238733,7 +238734,7 @@ void m68008_device::mulu_w_ds_dd_dp8() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -238781,7 +238782,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238793,7 +238794,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238805,7 +238806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -238827,7 +238828,7 @@ void m68008_device::mulu_w_ais_dd_dp8() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -238870,7 +238871,7 @@ void m68008_device::mulu_w_ais_dd_dp8() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -238918,7 +238919,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238930,7 +238931,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238942,7 +238943,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -238970,7 +238971,7 @@ void m68008_device::mulu_w_aips_dd_dp8() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -239011,7 +239012,7 @@ void m68008_device::mulu_w_aips_dd_dp8() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239059,7 +239060,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239071,7 +239072,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239083,7 +239084,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239113,7 +239114,7 @@ void m68008_device::mulu_w_pais_dd_dp8() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -239154,7 +239155,7 @@ void m68008_device::mulu_w_pais_dd_dp8() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239202,7 +239203,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239214,7 +239215,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239226,7 +239227,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239285,7 +239286,7 @@ void m68008_device::mulu_w_das_dd_dp8() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -239328,7 +239329,7 @@ void m68008_device::mulu_w_das_dd_dp8() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239376,7 +239377,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239388,7 +239389,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239400,7 +239401,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239420,7 +239421,7 @@ void m68008_device::mulu_w_dais_dd_dp8() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -239512,7 +239513,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -239555,7 +239556,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239603,7 +239604,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239615,7 +239616,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239627,7 +239628,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239687,7 +239688,7 @@ void m68008_device::mulu_w_adr16_dd_dp8() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -239728,7 +239729,7 @@ void m68008_device::mulu_w_adr16_dd_dp8() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239776,7 +239777,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239788,7 +239789,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239800,7 +239801,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239896,7 +239897,7 @@ void m68008_device::mulu_w_adr32_dd_dp8() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -239937,7 +239938,7 @@ void m68008_device::mulu_w_adr32_dd_dp8() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239985,7 +239986,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239997,7 +239998,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240009,7 +240010,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240067,7 +240068,7 @@ void m68008_device::mulu_w_dpc_dd_dp8() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -240110,7 +240111,7 @@ void m68008_device::mulu_w_dpc_dd_dp8() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240158,7 +240159,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240170,7 +240171,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240182,7 +240183,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240201,7 +240202,7 @@ void m68008_device::mulu_w_dpci_dd_dp8() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -240293,7 +240294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -240336,7 +240337,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240384,7 +240385,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240396,7 +240397,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240408,7 +240409,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240472,7 +240473,7 @@ void m68008_device::mulu_w_imm16_dd_dp8() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240520,7 +240521,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240532,7 +240533,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240544,7 +240545,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240568,12 +240569,12 @@ void m68008_device::abcd_ds_dd_dp8() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -240637,7 +240638,7 @@ void m68008_device::abcd_pais_paid_dp8() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -240677,12 +240678,12 @@ void m68008_device::abcd_pais_paid_dp8() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -240753,11 +240754,11 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -240777,7 +240778,7 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -240819,7 +240820,7 @@ void m68008_device::and_b_dd_ais_dp8() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -240854,12 +240855,12 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -240880,7 +240881,7 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -240922,7 +240923,7 @@ void m68008_device::and_b_dd_aips_dp8() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -240956,7 +240957,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -240964,7 +240965,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -240985,7 +240986,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241027,7 +241028,7 @@ void m68008_device::and_b_dd_pais_dp8() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -241059,7 +241060,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -241097,11 +241098,11 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -241121,7 +241122,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241163,7 +241164,7 @@ void m68008_device::and_b_dd_das_dp8() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -241193,14 +241194,14 @@ void m68008_device::and_b_dd_dais_dp8() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -241208,7 +241209,7 @@ void m68008_device::and_b_dd_dais_dp8() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -241247,7 +241248,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -241288,11 +241289,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob);
@@ -241312,7 +241313,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241354,7 +241355,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -241388,7 +241389,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -241426,7 +241427,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -241447,7 +241448,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241489,7 +241490,7 @@ void m68008_device::and_b_dd_adr16_dp8() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -241521,7 +241522,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -241560,7 +241561,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -241598,7 +241599,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -241619,7 +241620,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241661,7 +241662,7 @@ void m68008_device::and_b_dd_adr32_dp8() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -241819,11 +241820,11 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -241861,7 +241862,7 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241903,7 +241904,7 @@ void m68008_device::and_w_dd_ais_dp8() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -241956,12 +241957,12 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -242000,7 +242001,7 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242042,7 +242043,7 @@ void m68008_device::and_w_dd_aips_dp8() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -242094,7 +242095,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -242102,7 +242103,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -242141,7 +242142,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242183,7 +242184,7 @@ void m68008_device::and_w_dd_pais_dp8() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -242233,7 +242234,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -242271,11 +242272,11 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -242313,7 +242314,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242355,7 +242356,7 @@ void m68008_device::and_w_dd_das_dp8() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -242403,14 +242404,14 @@ void m68008_device::and_w_dd_dais_dp8() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -242418,7 +242419,7 @@ void m68008_device::and_w_dd_dais_dp8() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -242457,7 +242458,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -242498,11 +242499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -242540,7 +242541,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242582,7 +242583,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -242634,7 +242635,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -242672,7 +242673,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -242711,7 +242712,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242753,7 +242754,7 @@ void m68008_device::and_w_dd_adr16_dp8() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -242803,7 +242804,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -242842,7 +242843,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -242880,7 +242881,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -242919,7 +242920,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242961,7 +242962,7 @@ void m68008_device::and_w_dd_adr32_dp8() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -243074,7 +243075,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -243114,7 +243115,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -243152,7 +243153,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243192,7 +243193,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243232,7 +243233,7 @@ void m68008_device::and_l_dd_ais_dp8() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -243282,7 +243283,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -243322,11 +243323,11 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -243364,7 +243365,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243404,7 +243405,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243444,7 +243445,7 @@ void m68008_device::and_l_dd_aips_dp8() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -243493,14 +243494,14 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -243539,7 +243540,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -243577,7 +243578,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243617,7 +243618,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243657,7 +243658,7 @@ void m68008_device::and_l_dd_pais_dp8() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -243707,7 +243708,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -243744,7 +243745,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -243784,7 +243785,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -243822,7 +243823,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243862,7 +243863,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243902,7 +243903,7 @@ void m68008_device::and_l_dd_das_dp8() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -243950,14 +243951,14 @@ void m68008_device::and_l_dd_dais_dp8() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -243965,7 +243966,7 @@ void m68008_device::and_l_dd_dais_dp8() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -244004,7 +244005,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -244044,7 +244045,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -244084,7 +244085,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -244122,7 +244123,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244162,7 +244163,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244202,7 +244203,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -244254,7 +244255,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -244292,7 +244293,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -244332,7 +244333,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -244370,7 +244371,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244410,7 +244411,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244450,7 +244451,7 @@ void m68008_device::and_l_dd_adr16_dp8() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -244500,7 +244501,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -244539,7 +244540,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -244577,7 +244578,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -244617,7 +244618,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -244655,7 +244656,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244695,7 +244696,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244735,7 +244736,7 @@ void m68008_device::and_l_dd_adr32_dp8() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -244789,7 +244790,7 @@ void m68008_device::muls_w_ds_dd_dp8() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -244837,7 +244838,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244851,7 +244852,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244863,7 +244864,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -244875,7 +244876,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244892,7 +244893,7 @@ void m68008_device::muls_w_ais_dd_dp8() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -244935,7 +244936,7 @@ void m68008_device::muls_w_ais_dd_dp8() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -244983,7 +244984,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244997,7 +244998,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245009,7 +245010,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245021,7 +245022,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245044,7 +245045,7 @@ void m68008_device::muls_w_aips_dd_dp8() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -245085,7 +245086,7 @@ void m68008_device::muls_w_aips_dd_dp8() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245133,7 +245134,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245147,7 +245148,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245159,7 +245160,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245171,7 +245172,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245196,7 +245197,7 @@ void m68008_device::muls_w_pais_dd_dp8() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -245237,7 +245238,7 @@ void m68008_device::muls_w_pais_dd_dp8() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245285,7 +245286,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245299,7 +245300,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245311,7 +245312,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245323,7 +245324,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245377,7 +245378,7 @@ void m68008_device::muls_w_das_dd_dp8() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -245420,7 +245421,7 @@ void m68008_device::muls_w_das_dd_dp8() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245468,7 +245469,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245482,7 +245483,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245494,7 +245495,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245506,7 +245507,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245521,7 +245522,7 @@ void m68008_device::muls_w_dais_dd_dp8() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -245613,7 +245614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -245656,7 +245657,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245704,7 +245705,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245718,7 +245719,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245730,7 +245731,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245742,7 +245743,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245797,7 +245798,7 @@ void m68008_device::muls_w_adr16_dd_dp8() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -245838,7 +245839,7 @@ void m68008_device::muls_w_adr16_dd_dp8() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245886,7 +245887,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245900,7 +245901,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245912,7 +245913,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245924,7 +245925,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246015,7 +246016,7 @@ void m68008_device::muls_w_adr32_dd_dp8() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -246056,7 +246057,7 @@ void m68008_device::muls_w_adr32_dd_dp8() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246104,7 +246105,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246118,7 +246119,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246130,7 +246131,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246142,7 +246143,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246195,7 +246196,7 @@ void m68008_device::muls_w_dpc_dd_dp8() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246238,7 +246239,7 @@ void m68008_device::muls_w_dpc_dd_dp8() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246286,7 +246287,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246300,7 +246301,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246312,7 +246313,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246324,7 +246325,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246338,7 +246339,7 @@ void m68008_device::muls_w_dpci_dd_dp8() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -246430,7 +246431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246473,7 +246474,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246521,7 +246522,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246535,7 +246536,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246547,7 +246548,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246559,7 +246560,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246618,7 +246619,7 @@ void m68008_device::muls_w_imm16_dd_dp8() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246666,7 +246667,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246680,7 +246681,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246692,7 +246693,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246704,7 +246705,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246723,7 +246724,7 @@ void m68008_device::add_b_ds_dd_dp8() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246782,7 +246783,7 @@ void m68008_device::add_b_ais_dd_dp8() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246805,7 +246806,7 @@ void m68008_device::add_b_ais_dd_dp8() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246870,7 +246871,7 @@ void m68008_device::add_b_aips_dd_dp8() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -246891,7 +246892,7 @@ void m68008_device::add_b_aips_dd_dp8() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246958,7 +246959,7 @@ void m68008_device::add_b_pais_dd_dp8() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -246979,7 +246980,7 @@ void m68008_device::add_b_pais_dd_dp8() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247075,7 +247076,7 @@ void m68008_device::add_b_das_dd_dp8() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247098,7 +247099,7 @@ void m68008_device::add_b_das_dd_dp8() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247155,7 +247156,7 @@ void m68008_device::add_b_dais_dd_dp8() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -247247,7 +247248,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247270,7 +247271,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247367,7 +247368,7 @@ void m68008_device::add_b_adr16_dd_dp8() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -247388,7 +247389,7 @@ void m68008_device::add_b_adr16_dd_dp8() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247521,7 +247522,7 @@ void m68008_device::add_b_adr32_dd_dp8() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -247542,7 +247543,7 @@ void m68008_device::add_b_adr32_dd_dp8() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247637,7 +247638,7 @@ void m68008_device::add_b_dpc_dd_dp8() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247660,7 +247661,7 @@ void m68008_device::add_b_dpc_dd_dp8() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247716,7 +247717,7 @@ void m68008_device::add_b_dpci_dd_dp8() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -247808,7 +247809,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247831,7 +247832,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247930,7 +247931,7 @@ void m68008_device::add_b_imm8_dd_dp8() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247991,7 +247992,7 @@ void m68008_device::add_w_ds_dd_dp8() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248052,7 +248053,7 @@ void m68008_device::add_w_as_dd_dp8() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248111,7 +248112,7 @@ void m68008_device::add_w_ais_dd_dp8() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248152,7 +248153,7 @@ void m68008_device::add_w_ais_dd_dp8() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248217,7 +248218,7 @@ void m68008_device::add_w_aips_dd_dp8() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -248256,7 +248257,7 @@ void m68008_device::add_w_aips_dd_dp8() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248323,7 +248324,7 @@ void m68008_device::add_w_pais_dd_dp8() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -248362,7 +248363,7 @@ void m68008_device::add_w_pais_dd_dp8() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248458,7 +248459,7 @@ void m68008_device::add_w_das_dd_dp8() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248499,7 +248500,7 @@ void m68008_device::add_w_das_dd_dp8() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248556,7 +248557,7 @@ void m68008_device::add_w_dais_dd_dp8() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -248648,7 +248649,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248689,7 +248690,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248786,7 +248787,7 @@ void m68008_device::add_w_adr16_dd_dp8() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -248825,7 +248826,7 @@ void m68008_device::add_w_adr16_dd_dp8() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248958,7 +248959,7 @@ void m68008_device::add_w_adr32_dd_dp8() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -248997,7 +248998,7 @@ void m68008_device::add_w_adr32_dd_dp8() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249092,7 +249093,7 @@ void m68008_device::add_w_dpc_dd_dp8() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -249133,7 +249134,7 @@ void m68008_device::add_w_dpc_dd_dp8() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249189,7 +249190,7 @@ void m68008_device::add_w_dpci_dd_dp8() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -249281,7 +249282,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -249322,7 +249323,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249421,7 +249422,7 @@ void m68008_device::add_w_imm16_dd_dp8() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249482,7 +249483,7 @@ void m68008_device::add_l_ds_dd_dp8() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -249521,7 +249522,7 @@ void m68008_device::add_l_ds_dd_dp8() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -249551,7 +249552,7 @@ void m68008_device::add_l_as_dd_dp8() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -249590,7 +249591,7 @@ void m68008_device::add_l_as_dd_dp8() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -249618,7 +249619,7 @@ void m68008_device::add_l_ais_dd_dp8() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -249695,12 +249696,12 @@ void m68008_device::add_l_ais_dd_dp8() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -249760,7 +249761,7 @@ void m68008_device::add_l_aips_dd_dp8() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -249840,12 +249841,12 @@ void m68008_device::add_l_aips_dd_dp8() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -249904,7 +249905,7 @@ void m68008_device::add_l_pais_dd_dp8() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -249986,12 +249987,12 @@ void m68008_device::add_l_pais_dd_dp8() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250087,7 +250088,7 @@ void m68008_device::add_l_das_dd_dp8() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250164,12 +250165,12 @@ void m68008_device::add_l_das_dd_dp8() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250227,7 +250228,7 @@ void m68008_device::add_l_dais_dd_dp8() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -250318,7 +250319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250395,12 +250396,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250498,7 +250499,7 @@ void m68008_device::add_l_adr16_dd_dp8() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250575,12 +250576,12 @@ void m68008_device::add_l_adr16_dd_dp8() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250714,7 +250715,7 @@ void m68008_device::add_l_adr32_dd_dp8() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -250791,12 +250792,12 @@ void m68008_device::add_l_adr32_dd_dp8() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250891,7 +250892,7 @@ void m68008_device::add_l_dpc_dd_dp8() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -250968,12 +250969,12 @@ void m68008_device::add_l_dpc_dd_dp8() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -251030,7 +251031,7 @@ void m68008_device::add_l_dpci_dd_dp8() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -251121,7 +251122,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -251198,12 +251199,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -251339,7 +251340,7 @@ void m68008_device::add_l_imm32_dd_dp8() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -251378,7 +251379,7 @@ void m68008_device::add_l_imm32_dd_dp8() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -251408,7 +251409,7 @@ void m68008_device::adda_w_ds_ad_dp8() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251446,7 +251447,7 @@ void m68008_device::adda_w_ds_ad_dp8() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251475,7 +251476,7 @@ void m68008_device::adda_w_as_ad_dp8() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251513,7 +251514,7 @@ void m68008_device::adda_w_as_ad_dp8() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251540,7 +251541,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -251581,7 +251582,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251619,7 +251620,7 @@ void m68008_device::adda_w_ais_ad_dp8() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251652,7 +251653,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -251691,7 +251692,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251729,7 +251730,7 @@ void m68008_device::adda_w_aips_ad_dp8() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251764,7 +251765,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -251803,7 +251804,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251841,7 +251842,7 @@ void m68008_device::adda_w_pais_ad_dp8() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251905,7 +251906,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -251946,7 +251947,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251984,7 +251985,7 @@ void m68008_device::adda_w_das_ad_dp8() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252009,7 +252010,7 @@ void m68008_device::adda_w_dais_ad_dp8() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -252101,7 +252102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252142,7 +252143,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252180,7 +252181,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252245,7 +252246,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -252284,7 +252285,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252322,7 +252323,7 @@ void m68008_device::adda_w_adr16_ad_dp8() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252423,7 +252424,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -252462,7 +252463,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252500,7 +252501,7 @@ void m68008_device::adda_w_adr32_ad_dp8() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252563,7 +252564,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252604,7 +252605,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252642,7 +252643,7 @@ void m68008_device::adda_w_dpc_ad_dp8() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252666,7 +252667,7 @@ void m68008_device::adda_w_dpci_ad_dp8() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -252758,7 +252759,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252799,7 +252800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252837,7 +252838,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252904,7 +252905,7 @@ void m68008_device::adda_w_imm16_ad_dp8() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252942,7 +252943,7 @@ void m68008_device::adda_w_imm16_ad_dp8() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252971,7 +252972,7 @@ void m68008_device::addx_b_ds_dd_dp8() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -252979,7 +252980,7 @@ void m68008_device::addx_b_ds_dd_dp8() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -253033,16 +253034,16 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob);
@@ -253063,7 +253064,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_program8.read_interruptible(m_aob);
@@ -253081,7 +253082,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253123,7 +253124,7 @@ void m68008_device::addx_b_pais_paid_dp8() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob, m_dbout);
@@ -253155,7 +253156,7 @@ void m68008_device::add_b_dd_ais_dp8() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253178,7 +253179,7 @@ void m68008_device::add_b_dd_ais_dp8() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253257,7 +253258,7 @@ void m68008_device::add_b_dd_aips_dp8() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -253278,7 +253279,7 @@ void m68008_device::add_b_dd_aips_dp8() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253359,7 +253360,7 @@ void m68008_device::add_b_dd_pais_dp8() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -253380,7 +253381,7 @@ void m68008_device::add_b_dd_pais_dp8() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253490,7 +253491,7 @@ void m68008_device::add_b_dd_das_dp8() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253513,7 +253514,7 @@ void m68008_device::add_b_dd_das_dp8() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253584,7 +253585,7 @@ void m68008_device::add_b_dd_dais_dp8() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -253676,7 +253677,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253699,7 +253700,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253810,7 +253811,7 @@ void m68008_device::add_b_dd_adr16_dp8() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -253831,7 +253832,7 @@ void m68008_device::add_b_dd_adr16_dp8() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253978,7 +253979,7 @@ void m68008_device::add_b_dd_adr32_dp8() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -253999,7 +254000,7 @@ void m68008_device::add_b_dd_adr32_dp8() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254074,7 +254075,7 @@ void m68008_device::addx_w_ds_dd_dp8() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -254082,7 +254083,7 @@ void m68008_device::addx_w_ds_dd_dp8() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -254136,16 +254137,16 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -254184,7 +254185,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -254220,7 +254221,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254262,7 +254263,7 @@ void m68008_device::addx_w_pais_paid_dp8() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -254312,7 +254313,7 @@ void m68008_device::add_w_dd_ais_dp8() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -254353,7 +254354,7 @@ void m68008_device::add_w_dd_ais_dp8() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254450,7 +254451,7 @@ void m68008_device::add_w_dd_aips_dp8() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -254489,7 +254490,7 @@ void m68008_device::add_w_dd_aips_dp8() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254588,7 +254589,7 @@ void m68008_device::add_w_dd_pais_dp8() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -254627,7 +254628,7 @@ void m68008_device::add_w_dd_pais_dp8() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254755,7 +254756,7 @@ void m68008_device::add_w_dd_das_dp8() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -254796,7 +254797,7 @@ void m68008_device::add_w_dd_das_dp8() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254885,7 +254886,7 @@ void m68008_device::add_w_dd_dais_dp8() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -254977,7 +254978,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -255018,7 +255019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255147,7 +255148,7 @@ void m68008_device::add_w_dd_adr16_dp8() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -255186,7 +255187,7 @@ void m68008_device::add_w_dd_adr16_dp8() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255351,7 +255352,7 @@ void m68008_device::add_w_dd_adr32_dp8() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -255390,7 +255391,7 @@ void m68008_device::add_w_dd_adr32_dp8() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255483,12 +255484,12 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -255523,7 +255524,7 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -255532,7 +255533,7 @@ void m68008_device::addx_l_ds_dd_dp8() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -255554,13 +255555,13 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -255596,11 +255597,11 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -255637,7 +255638,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -255675,7 +255676,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -255715,7 +255716,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -255750,7 +255751,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255792,7 +255793,7 @@ void m68008_device::addx_l_pais_paid_dp8() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -255842,7 +255843,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -255919,7 +255920,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255959,7 +255960,7 @@ void m68008_device::add_l_dd_ais_dp8() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256048,7 +256049,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -256128,7 +256129,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256168,7 +256169,7 @@ void m68008_device::add_l_dd_aips_dp8() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256256,7 +256257,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -256338,7 +256339,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256378,7 +256379,7 @@ void m68008_device::add_l_dd_pais_dp8() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256503,7 +256504,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -256580,7 +256581,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256620,7 +256621,7 @@ void m68008_device::add_l_dd_das_dp8() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256707,7 +256708,7 @@ void m68008_device::add_l_dd_dais_dp8() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -256798,7 +256799,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -256875,7 +256876,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256915,7 +256916,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257042,7 +257043,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -257119,7 +257120,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -257159,7 +257160,7 @@ void m68008_device::add_l_dd_adr16_dp8() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257322,7 +257323,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -257399,7 +257400,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -257439,7 +257440,7 @@ void m68008_device::add_l_dd_adr32_dp8() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257530,7 +257531,7 @@ void m68008_device::adda_l_ds_ad_dp8() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -257568,7 +257569,7 @@ void m68008_device::adda_l_ds_ad_dp8() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -257597,7 +257598,7 @@ void m68008_device::adda_l_as_ad_dp8() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -257635,7 +257636,7 @@ void m68008_device::adda_l_as_ad_dp8() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -257662,7 +257663,7 @@ void m68008_device::adda_l_ais_ad_dp8() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -257739,11 +257740,11 @@ void m68008_device::adda_l_ais_ad_dp8() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -257802,7 +257803,7 @@ void m68008_device::adda_l_aips_ad_dp8() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -257882,11 +257883,11 @@ void m68008_device::adda_l_aips_ad_dp8() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -257944,7 +257945,7 @@ void m68008_device::adda_l_pais_ad_dp8() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -258026,11 +258027,11 @@ void m68008_device::adda_l_pais_ad_dp8() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -258125,7 +258126,7 @@ void m68008_device::adda_l_das_ad_dp8() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258202,11 +258203,11 @@ void m68008_device::adda_l_das_ad_dp8() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258263,7 +258264,7 @@ void m68008_device::adda_l_dais_ad_dp8() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -258354,7 +258355,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258431,11 +258432,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258532,7 +258533,7 @@ void m68008_device::adda_l_adr16_ad_dp8() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258609,11 +258610,11 @@ void m68008_device::adda_l_adr16_ad_dp8() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258746,7 +258747,7 @@ void m68008_device::adda_l_adr32_ad_dp8() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -258823,11 +258824,11 @@ void m68008_device::adda_l_adr32_ad_dp8() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -258921,7 +258922,7 @@ void m68008_device::adda_l_dpc_ad_dp8() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -258998,11 +258999,11 @@ void m68008_device::adda_l_dpc_ad_dp8() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -259058,7 +259059,7 @@ void m68008_device::adda_l_dpci_ad_dp8() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -259149,7 +259150,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -259226,11 +259227,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -259365,7 +259366,7 @@ void m68008_device::adda_l_imm32_ad_dp8() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -259403,7 +259404,7 @@ void m68008_device::adda_l_imm32_ad_dp8() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -259431,13 +259432,13 @@ void m68008_device::asr_b_imm3_ds_dp8() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259481,7 +259482,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259515,13 +259516,13 @@ void m68008_device::lsr_b_imm3_ds_dp8() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259565,7 +259566,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259599,13 +259600,13 @@ void m68008_device::roxr_b_imm3_ds_dp8() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259649,7 +259650,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259683,13 +259684,13 @@ void m68008_device::ror_b_imm3_ds_dp8() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259733,7 +259734,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -259768,13 +259769,13 @@ void m68008_device::asr_b_dd_ds_dp8() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259818,7 +259819,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259853,13 +259854,13 @@ void m68008_device::lsr_b_dd_ds_dp8() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259903,7 +259904,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259938,13 +259939,13 @@ void m68008_device::roxr_b_dd_ds_dp8() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259988,7 +259989,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260023,13 +260024,13 @@ void m68008_device::ror_b_dd_ds_dp8() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260073,7 +260074,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260107,13 +260108,13 @@ void m68008_device::asr_w_imm3_ds_dp8() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260157,7 +260158,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260191,13 +260192,13 @@ void m68008_device::lsr_w_imm3_ds_dp8() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260241,7 +260242,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260275,13 +260276,13 @@ void m68008_device::roxr_w_imm3_ds_dp8() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260325,7 +260326,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260359,13 +260360,13 @@ void m68008_device::ror_w_imm3_ds_dp8() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260409,7 +260410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260444,13 +260445,13 @@ void m68008_device::asr_w_dd_ds_dp8() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260494,7 +260495,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260529,13 +260530,13 @@ void m68008_device::lsr_w_dd_ds_dp8() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260579,7 +260580,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260614,13 +260615,13 @@ void m68008_device::roxr_w_dd_ds_dp8() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260664,7 +260665,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260699,13 +260700,13 @@ void m68008_device::ror_w_dd_ds_dp8() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260749,7 +260750,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260783,13 +260784,13 @@ void m68008_device::asr_l_imm3_ds_dp8() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260833,7 +260834,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260850,7 +260851,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -260873,13 +260874,13 @@ void m68008_device::lsr_l_imm3_ds_dp8() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260923,7 +260924,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260940,7 +260941,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -260963,13 +260964,13 @@ void m68008_device::roxr_l_imm3_ds_dp8() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261013,7 +261014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261030,7 +261031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261053,13 +261054,13 @@ void m68008_device::ror_l_imm3_ds_dp8() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261103,7 +261104,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -261120,7 +261121,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261144,13 +261145,13 @@ void m68008_device::asr_l_dd_ds_dp8() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261194,7 +261195,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261211,7 +261212,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261235,13 +261236,13 @@ void m68008_device::lsr_l_dd_ds_dp8() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261285,7 +261286,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261302,7 +261303,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261326,13 +261327,13 @@ void m68008_device::roxr_l_dd_ds_dp8() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261376,7 +261377,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261393,7 +261394,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261417,13 +261418,13 @@ void m68008_device::ror_l_dd_ds_dp8() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261467,7 +261468,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -261484,7 +261485,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261506,7 +261507,7 @@ void m68008_device::asr_ais_dp8() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -261547,12 +261548,12 @@ void m68008_device::asr_ais_dp8() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261649,7 +261650,7 @@ void m68008_device::asr_aips_dp8() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -261688,12 +261689,12 @@ void m68008_device::asr_aips_dp8() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261792,7 +261793,7 @@ void m68008_device::asr_pais_dp8() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -261831,12 +261832,12 @@ void m68008_device::asr_pais_dp8() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261964,7 +261965,7 @@ void m68008_device::asr_das_dp8() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -262005,12 +262006,12 @@ void m68008_device::asr_das_dp8() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262099,7 +262100,7 @@ void m68008_device::asr_dais_dp8() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -262191,7 +262192,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -262232,12 +262233,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262366,7 +262367,7 @@ void m68008_device::asr_adr16_dp8() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -262405,12 +262406,12 @@ void m68008_device::asr_adr16_dp8() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262575,7 +262576,7 @@ void m68008_device::asr_adr32_dp8() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -262614,12 +262615,12 @@ void m68008_device::asr_adr32_dp8() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262711,13 +262712,13 @@ void m68008_device::asl_b_imm3_ds_dp8() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262761,7 +262762,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262795,13 +262796,13 @@ void m68008_device::lsl_b_imm3_ds_dp8() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262845,7 +262846,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262859,7 +262860,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -262880,13 +262881,13 @@ void m68008_device::roxl_b_imm3_ds_dp8() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262930,7 +262931,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262964,13 +262965,13 @@ void m68008_device::rol_b_imm3_ds_dp8() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263014,7 +263015,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263049,13 +263050,13 @@ void m68008_device::asl_b_dd_ds_dp8() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263099,7 +263100,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263134,13 +263135,13 @@ void m68008_device::lsl_b_dd_ds_dp8() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263184,7 +263185,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263198,7 +263199,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263220,13 +263221,13 @@ void m68008_device::roxl_b_dd_ds_dp8() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263270,7 +263271,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263305,13 +263306,13 @@ void m68008_device::rol_b_dd_ds_dp8() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263355,7 +263356,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263389,13 +263390,13 @@ void m68008_device::asl_w_imm3_ds_dp8() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263439,7 +263440,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263473,13 +263474,13 @@ void m68008_device::lsl_w_imm3_ds_dp8() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263523,7 +263524,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263537,7 +263538,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263558,13 +263559,13 @@ void m68008_device::roxl_w_imm3_ds_dp8() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263608,7 +263609,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263642,13 +263643,13 @@ void m68008_device::rol_w_imm3_ds_dp8() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263692,7 +263693,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263727,13 +263728,13 @@ void m68008_device::asl_w_dd_ds_dp8() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263777,7 +263778,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263812,13 +263813,13 @@ void m68008_device::lsl_w_dd_ds_dp8() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263862,7 +263863,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263876,7 +263877,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263898,13 +263899,13 @@ void m68008_device::roxl_w_dd_ds_dp8() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263948,7 +263949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263983,13 +263984,13 @@ void m68008_device::rol_w_dd_ds_dp8() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264033,7 +264034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264067,13 +264068,13 @@ void m68008_device::asl_l_imm3_ds_dp8() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264117,7 +264118,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264134,7 +264135,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264157,13 +264158,13 @@ void m68008_device::lsl_l_imm3_ds_dp8() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264207,7 +264208,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264219,14 +264220,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264249,13 +264250,13 @@ void m68008_device::roxl_l_imm3_ds_dp8() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264299,7 +264300,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264316,7 +264317,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264339,13 +264340,13 @@ void m68008_device::rol_l_imm3_ds_dp8() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264389,7 +264390,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264406,7 +264407,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264430,13 +264431,13 @@ void m68008_device::asl_l_dd_ds_dp8() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264480,7 +264481,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264497,7 +264498,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264521,13 +264522,13 @@ void m68008_device::lsl_l_dd_ds_dp8() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264571,7 +264572,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264583,14 +264584,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264614,13 +264615,13 @@ void m68008_device::roxl_l_dd_ds_dp8() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264664,7 +264665,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264681,7 +264682,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264705,13 +264706,13 @@ void m68008_device::rol_l_dd_ds_dp8() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264755,7 +264756,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264772,7 +264773,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264794,7 +264795,7 @@ void m68008_device::asl_ais_dp8() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -264835,12 +264836,12 @@ void m68008_device::asl_ais_dp8() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264937,7 +264938,7 @@ void m68008_device::asl_aips_dp8() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -264976,12 +264977,12 @@ void m68008_device::asl_aips_dp8() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265080,7 +265081,7 @@ void m68008_device::asl_pais_dp8() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -265119,12 +265120,12 @@ void m68008_device::asl_pais_dp8() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265252,7 +265253,7 @@ void m68008_device::asl_das_dp8() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -265293,12 +265294,12 @@ void m68008_device::asl_das_dp8() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265387,7 +265388,7 @@ void m68008_device::asl_dais_dp8() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -265479,7 +265480,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -265520,12 +265521,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265654,7 +265655,7 @@ void m68008_device::asl_adr16_dp8() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -265693,12 +265694,12 @@ void m68008_device::asl_adr16_dp8() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265863,7 +265864,7 @@ void m68008_device::asl_adr32_dp8() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -265902,12 +265903,12 @@ void m68008_device::asl_adr32_dp8() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265998,7 +265999,7 @@ void m68008_device::lsr_ais_dp8() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266039,12 +266040,12 @@ void m68008_device::lsr_ais_dp8() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266141,7 +266142,7 @@ void m68008_device::lsr_aips_dp8() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -266180,12 +266181,12 @@ void m68008_device::lsr_aips_dp8() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266284,7 +266285,7 @@ void m68008_device::lsr_pais_dp8() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -266323,12 +266324,12 @@ void m68008_device::lsr_pais_dp8() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266456,7 +266457,7 @@ void m68008_device::lsr_das_dp8() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266497,12 +266498,12 @@ void m68008_device::lsr_das_dp8() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266591,7 +266592,7 @@ void m68008_device::lsr_dais_dp8() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -266683,7 +266684,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266724,12 +266725,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266858,7 +266859,7 @@ void m68008_device::lsr_adr16_dp8() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -266897,12 +266898,12 @@ void m68008_device::lsr_adr16_dp8() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267067,7 +267068,7 @@ void m68008_device::lsr_adr32_dp8() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -267106,12 +267107,12 @@ void m68008_device::lsr_adr32_dp8() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267202,11 +267203,11 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -267244,12 +267245,12 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267291,7 +267292,7 @@ void m68008_device::lsl_ais_dp8() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -267344,12 +267345,12 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -267388,12 +267389,12 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267435,7 +267436,7 @@ void m68008_device::lsl_aips_dp8() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -267487,7 +267488,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -267495,7 +267496,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -267534,12 +267535,12 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267581,7 +267582,7 @@ void m68008_device::lsl_pais_dp8() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -267631,7 +267632,7 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -267669,11 +267670,11 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -267711,12 +267712,12 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267758,7 +267759,7 @@ void m68008_device::lsl_das_dp8() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -267806,14 +267807,14 @@ void m68008_device::lsl_dais_dp8() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -267821,7 +267822,7 @@ void m68008_device::lsl_dais_dp8() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -267860,7 +267861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -267901,11 +267902,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_program8.read_interruptible(m_aob & ~1) << 8;
@@ -267943,12 +267944,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267990,7 +267991,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -268042,7 +268043,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -268080,7 +268081,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -268119,12 +268120,12 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268166,7 +268167,7 @@ void m68008_device::lsl_adr16_dp8() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -268216,7 +268217,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_opcodes8.read_interruptible(m_aob & ~1) << 8;
@@ -268255,7 +268256,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -268293,7 +268294,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -268332,12 +268333,12 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268379,7 +268380,7 @@ void m68008_device::lsl_adr32_dp8() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_program8.write_interruptible(m_aob & ~1, m_dbout >> 8);
@@ -268429,7 +268430,7 @@ void m68008_device::roxr_ais_dp8() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -268470,12 +268471,12 @@ void m68008_device::roxr_ais_dp8() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268572,7 +268573,7 @@ void m68008_device::roxr_aips_dp8() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -268611,12 +268612,12 @@ void m68008_device::roxr_aips_dp8() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268715,7 +268716,7 @@ void m68008_device::roxr_pais_dp8() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -268754,12 +268755,12 @@ void m68008_device::roxr_pais_dp8() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268887,7 +268888,7 @@ void m68008_device::roxr_das_dp8() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -268928,12 +268929,12 @@ void m68008_device::roxr_das_dp8() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269022,7 +269023,7 @@ void m68008_device::roxr_dais_dp8() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -269114,7 +269115,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -269155,12 +269156,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269289,7 +269290,7 @@ void m68008_device::roxr_adr16_dp8() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -269328,12 +269329,12 @@ void m68008_device::roxr_adr16_dp8() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269498,7 +269499,7 @@ void m68008_device::roxr_adr32_dp8() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -269537,12 +269538,12 @@ void m68008_device::roxr_adr32_dp8() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269633,7 +269634,7 @@ void m68008_device::roxl_ais_dp8() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -269674,12 +269675,12 @@ void m68008_device::roxl_ais_dp8() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269776,7 +269777,7 @@ void m68008_device::roxl_aips_dp8() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -269815,12 +269816,12 @@ void m68008_device::roxl_aips_dp8() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269919,7 +269920,7 @@ void m68008_device::roxl_pais_dp8() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -269958,12 +269959,12 @@ void m68008_device::roxl_pais_dp8() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270091,7 +270092,7 @@ void m68008_device::roxl_das_dp8() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270132,12 +270133,12 @@ void m68008_device::roxl_das_dp8() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270226,7 +270227,7 @@ void m68008_device::roxl_dais_dp8() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -270318,7 +270319,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270359,12 +270360,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270493,7 +270494,7 @@ void m68008_device::roxl_adr16_dp8() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -270532,12 +270533,12 @@ void m68008_device::roxl_adr16_dp8() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270702,7 +270703,7 @@ void m68008_device::roxl_adr32_dp8() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -270741,12 +270742,12 @@ void m68008_device::roxl_adr32_dp8() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270837,7 +270838,7 @@ void m68008_device::ror_ais_dp8() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270878,12 +270879,12 @@ void m68008_device::ror_ais_dp8() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270980,7 +270981,7 @@ void m68008_device::ror_aips_dp8() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -271019,12 +271020,12 @@ void m68008_device::ror_aips_dp8() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271123,7 +271124,7 @@ void m68008_device::ror_pais_dp8() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -271162,12 +271163,12 @@ void m68008_device::ror_pais_dp8() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271295,7 +271296,7 @@ void m68008_device::ror_das_dp8() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -271336,12 +271337,12 @@ void m68008_device::ror_das_dp8() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271430,7 +271431,7 @@ void m68008_device::ror_dais_dp8() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -271522,7 +271523,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -271563,12 +271564,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271697,7 +271698,7 @@ void m68008_device::ror_adr16_dp8() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -271736,12 +271737,12 @@ void m68008_device::ror_adr16_dp8() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271906,7 +271907,7 @@ void m68008_device::ror_adr32_dp8() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -271945,12 +271946,12 @@ void m68008_device::ror_adr32_dp8() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272041,7 +272042,7 @@ void m68008_device::rol_ais_dp8() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272082,12 +272083,12 @@ void m68008_device::rol_ais_dp8() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272184,7 +272185,7 @@ void m68008_device::rol_aips_dp8() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -272223,12 +272224,12 @@ void m68008_device::rol_aips_dp8() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272327,7 +272328,7 @@ void m68008_device::rol_pais_dp8() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -272366,12 +272367,12 @@ void m68008_device::rol_pais_dp8() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272499,7 +272500,7 @@ void m68008_device::rol_das_dp8() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272540,12 +272541,12 @@ void m68008_device::rol_das_dp8() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272634,7 +272635,7 @@ void m68008_device::rol_dais_dp8() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -272726,7 +272727,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272767,12 +272768,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272901,7 +272902,7 @@ void m68008_device::rol_adr16_dp8() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -272940,12 +272941,12 @@ void m68008_device::rol_adr16_dp8() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -273110,7 +273111,7 @@ void m68008_device::rol_adr32_dp8() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -273149,12 +273150,12 @@ void m68008_device::rol_adr32_dp8() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68008-sif8.cpp b/src/devices/cpu/m68000/m68008-sif8.cpp
index 45b9a377c11..14c00a48f46 100644
--- a/src/devices/cpu/m68000/m68008-sif8.cpp
+++ b/src/devices/cpu/m68000/m68008-sif8.cpp
@@ -245,7 +245,7 @@ void m68008_device::state_bus_error_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -255,7 +255,7 @@ void m68008_device::state_bus_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -288,7 +288,7 @@ void m68008_device::state_bus_error_if8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -320,7 +320,7 @@ void m68008_device::state_bus_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -356,7 +356,7 @@ void m68008_device::state_bus_error_if8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -388,7 +388,7 @@ void m68008_device::state_bus_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -423,7 +423,7 @@ void m68008_device::state_bus_error_if8()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -456,7 +456,7 @@ void m68008_device::state_bus_error_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -634,7 +634,7 @@ void m68008_device::state_address_error_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -644,7 +644,7 @@ void m68008_device::state_address_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -677,7 +677,7 @@ void m68008_device::state_address_error_if8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -709,7 +709,7 @@ void m68008_device::state_address_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -745,7 +745,7 @@ void m68008_device::state_address_error_if8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -777,7 +777,7 @@ void m68008_device::state_address_error_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -812,7 +812,7 @@ void m68008_device::state_address_error_if8()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -845,7 +845,7 @@ void m68008_device::state_address_error_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1030,7 +1030,7 @@ void m68008_device::state_interrupt_if8()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -1042,7 +1042,7 @@ void m68008_device::state_interrupt_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1103,7 +1103,7 @@ void m68008_device::state_interrupt_if8()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1136,7 +1136,7 @@ void m68008_device::state_interrupt_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1312,7 +1312,7 @@ void m68008_device::state_trace_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1322,7 +1322,7 @@ void m68008_device::state_trace_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1357,7 +1357,7 @@ void m68008_device::state_trace_if8()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1390,7 +1390,7 @@ void m68008_device::state_trace_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1566,7 +1566,7 @@ void m68008_device::state_illegal_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1576,7 +1576,7 @@ void m68008_device::state_illegal_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1611,7 +1611,7 @@ void m68008_device::state_illegal_if8()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1644,7 +1644,7 @@ void m68008_device::state_illegal_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1820,7 +1820,7 @@ void m68008_device::state_priviledge_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1830,7 +1830,7 @@ void m68008_device::state_priviledge_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1865,7 +1865,7 @@ void m68008_device::state_priviledge_if8()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -1898,7 +1898,7 @@ void m68008_device::state_priviledge_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2074,7 +2074,7 @@ void m68008_device::state_linea_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2084,7 +2084,7 @@ void m68008_device::state_linea_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2119,7 +2119,7 @@ void m68008_device::state_linea_if8()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2152,7 +2152,7 @@ void m68008_device::state_linea_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2328,7 +2328,7 @@ void m68008_device::state_linef_if8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2338,7 +2338,7 @@ void m68008_device::state_linef_if8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2373,7 +2373,7 @@ void m68008_device::state_linef_if8()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2406,7 +2406,7 @@ void m68008_device::state_linef_if8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -2579,7 +2579,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2612,7 +2612,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -2620,7 +2620,7 @@ void m68008_device::ori_b_imm8_ds_if8() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2664,7 +2664,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2696,11 +2696,11 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -2718,7 +2718,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2755,7 +2755,7 @@ void m68008_device::ori_b_imm8_ais_if8() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -2782,7 +2782,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2817,12 +2817,12 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -2841,7 +2841,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -2878,7 +2878,7 @@ void m68008_device::ori_b_imm8_aips_if8() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -2905,7 +2905,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -2939,7 +2939,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -2947,7 +2947,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -2966,7 +2966,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3003,7 +3003,7 @@ void m68008_device::ori_b_imm8_pais_if8() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -3030,7 +3030,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3062,7 +3062,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3095,11 +3095,11 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -3117,7 +3117,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3154,7 +3154,7 @@ void m68008_device::ori_b_imm8_das_if8() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -3181,7 +3181,7 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3211,14 +3211,14 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3226,7 +3226,7 @@ void m68008_device::ori_b_imm8_dais_if8() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3260,7 +3260,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3296,11 +3296,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -3318,7 +3318,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3355,7 +3355,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -3381,7 +3381,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3449,7 +3449,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -3468,7 +3468,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3505,7 +3505,7 @@ void m68008_device::ori_b_imm8_adr16_if8() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -3531,7 +3531,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3564,7 +3564,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3598,7 +3598,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3631,7 +3631,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -3650,7 +3650,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3687,7 +3687,7 @@ void m68008_device::ori_b_imm8_adr32_if8() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -3713,7 +3713,7 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3745,21 +3745,21 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -3767,7 +3767,7 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3801,11 +3801,11 @@ void m68008_device::ori_imm8_ccr_if8() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3849,7 +3849,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3882,7 +3882,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3890,7 +3890,7 @@ void m68008_device::ori_w_imm16_ds_if8() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3934,7 +3934,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -3966,11 +3966,11 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4003,7 +4003,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4040,7 +4040,7 @@ void m68008_device::ori_w_imm16_ais_if8() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4082,7 +4082,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4117,12 +4117,12 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -4156,7 +4156,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4193,7 +4193,7 @@ void m68008_device::ori_w_imm16_aips_if8() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4235,7 +4235,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4269,7 +4269,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -4277,7 +4277,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -4311,7 +4311,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4348,7 +4348,7 @@ void m68008_device::ori_w_imm16_pais_if8() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4390,7 +4390,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4422,7 +4422,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4455,11 +4455,11 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4492,7 +4492,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4529,7 +4529,7 @@ void m68008_device::ori_w_imm16_das_if8() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4571,7 +4571,7 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4601,14 +4601,14 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -4616,7 +4616,7 @@ void m68008_device::ori_w_imm16_dais_if8() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4650,7 +4650,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4686,11 +4686,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4723,7 +4723,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4760,7 +4760,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4801,7 +4801,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -4836,7 +4836,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4869,7 +4869,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -4903,7 +4903,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4940,7 +4940,7 @@ void m68008_device::ori_w_imm16_adr16_if8() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -4981,7 +4981,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5014,7 +5014,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5048,7 +5048,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5081,7 +5081,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -5115,7 +5115,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5152,7 +5152,7 @@ void m68008_device::ori_w_imm16_adr32_if8() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5197,7 +5197,7 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5229,23 +5229,23 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -5253,7 +5253,7 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5287,11 +5287,11 @@ void m68008_device::ori_i16u_sr_if8() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5334,7 +5334,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5367,7 +5367,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5400,12 +5400,12 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5435,7 +5435,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -5444,7 +5444,7 @@ void m68008_device::ori_l_imm32_ds_if8() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -5460,7 +5460,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5493,7 +5493,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5525,7 +5525,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -5560,7 +5560,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5593,7 +5593,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5628,7 +5628,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5663,7 +5663,7 @@ void m68008_device::ori_l_imm32_ais_if8() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5704,7 +5704,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5737,7 +5737,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5769,7 +5769,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -5804,11 +5804,11 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5841,7 +5841,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5876,7 +5876,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -5911,7 +5911,7 @@ void m68008_device::ori_l_imm32_aips_if8() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -5952,7 +5952,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -5985,7 +5985,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6016,14 +6016,14 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6057,7 +6057,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6090,7 +6090,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6125,7 +6125,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6160,7 +6160,7 @@ void m68008_device::ori_l_imm32_pais_if8() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6201,7 +6201,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6234,7 +6234,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6266,7 +6266,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6298,7 +6298,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6333,7 +6333,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6366,7 +6366,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6401,7 +6401,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6436,7 +6436,7 @@ void m68008_device::ori_l_imm32_das_if8() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6477,7 +6477,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6510,7 +6510,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6540,14 +6540,14 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -6555,7 +6555,7 @@ void m68008_device::ori_l_imm32_dais_if8() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6589,7 +6589,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6624,7 +6624,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6659,7 +6659,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6692,7 +6692,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6727,7 +6727,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6762,7 +6762,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -6802,7 +6802,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6835,7 +6835,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6870,7 +6870,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6903,7 +6903,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6938,7 +6938,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -6971,7 +6971,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7006,7 +7006,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7041,7 +7041,7 @@ void m68008_device::ori_l_imm32_adr16_if8() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -7081,7 +7081,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7114,7 +7114,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7147,7 +7147,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7181,7 +7181,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7214,7 +7214,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -7249,7 +7249,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7282,7 +7282,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7317,7 +7317,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7352,7 +7352,7 @@ void m68008_device::ori_l_imm32_adr32_if8() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -7397,13 +7397,13 @@ void m68008_device::btst_dd_ds_if8() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7442,7 +7442,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7455,7 +7455,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -7473,7 +7473,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7505,7 +7505,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -7522,7 +7522,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -7542,7 +7542,7 @@ void m68008_device::movep_w_das_dd_if8() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7585,11 +7585,11 @@ void m68008_device::btst_dd_ais_if8() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -7607,13 +7607,13 @@ void m68008_device::btst_dd_ais_if8() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7659,12 +7659,12 @@ void m68008_device::btst_dd_aips_if8() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -7683,13 +7683,13 @@ void m68008_device::btst_dd_aips_if8() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7734,7 +7734,7 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -7742,7 +7742,7 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -7761,13 +7761,13 @@ void m68008_device::btst_dd_pais_if8() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7810,7 +7810,7 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7843,11 +7843,11 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -7865,13 +7865,13 @@ void m68008_device::btst_dd_das_if8() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7912,14 +7912,14 @@ void m68008_device::btst_dd_dais_if8() // 0130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -7927,7 +7927,7 @@ void m68008_device::btst_dd_dais_if8() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7961,7 +7961,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -7997,11 +7997,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8019,13 +8019,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8070,7 +8070,7 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8103,7 +8103,7 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -8122,13 +8122,13 @@ void m68008_device::btst_dd_adr16_if8() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8171,7 +8171,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8205,7 +8205,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8238,7 +8238,7 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -8257,13 +8257,13 @@ void m68008_device::btst_dd_adr32_if8() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8305,7 +8305,7 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8338,11 +8338,11 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -8360,13 +8360,13 @@ void m68008_device::btst_dd_dpc_if8() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8406,14 +8406,14 @@ void m68008_device::btst_dd_dpci_if8() // 013b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -8421,7 +8421,7 @@ void m68008_device::btst_dd_dpci_if8() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8455,7 +8455,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8491,11 +8491,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -8513,13 +8513,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8564,7 +8564,7 @@ void m68008_device::btst_dd_imm_if8() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8599,12 +8599,12 @@ void m68008_device::btst_dd_imm_if8() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8643,7 +8643,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -8656,7 +8656,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -8678,13 +8678,13 @@ void m68008_device::bchg_dd_ds_if8() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8723,7 +8723,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8735,14 +8735,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8760,7 +8760,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8792,7 +8792,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8808,7 +8808,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8825,7 +8825,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8842,7 +8842,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8862,7 +8862,7 @@ void m68008_device::movep_l_das_dd_if8() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -8905,11 +8905,11 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -8928,7 +8928,7 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8963,7 +8963,7 @@ void m68008_device::bchg_dd_ais_if8() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -8994,12 +8994,12 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -9019,7 +9019,7 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9054,7 +9054,7 @@ void m68008_device::bchg_dd_aips_if8() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9084,7 +9084,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -9092,7 +9092,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -9112,7 +9112,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9147,7 +9147,7 @@ void m68008_device::bchg_dd_pais_if8() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9175,7 +9175,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9208,11 +9208,11 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -9231,7 +9231,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9266,7 +9266,7 @@ void m68008_device::bchg_dd_das_if8() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9292,14 +9292,14 @@ void m68008_device::bchg_dd_dais_if8() // 0170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9307,7 +9307,7 @@ void m68008_device::bchg_dd_dais_if8() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9341,7 +9341,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9377,11 +9377,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -9400,7 +9400,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9435,7 +9435,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9465,7 +9465,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9498,7 +9498,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -9518,7 +9518,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9553,7 +9553,7 @@ void m68008_device::bchg_dd_adr16_if8() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9581,7 +9581,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9615,7 +9615,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9648,7 +9648,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -9668,7 +9668,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9703,7 +9703,7 @@ void m68008_device::bchg_dd_adr32_if8() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -9735,13 +9735,13 @@ void m68008_device::bclr_dd_ds_if8() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9777,14 +9777,14 @@ void m68008_device::bclr_dd_ds_if8() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9796,18 +9796,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -9825,7 +9825,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9859,7 +9859,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -9875,7 +9875,7 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -9892,11 +9892,11 @@ void m68008_device::movep_w_dd_das_if8() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -9939,11 +9939,11 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -9961,12 +9961,12 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10001,7 +10001,7 @@ void m68008_device::bclr_dd_ais_if8() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10032,12 +10032,12 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -10056,12 +10056,12 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10096,7 +10096,7 @@ void m68008_device::bclr_dd_aips_if8() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10126,7 +10126,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10134,7 +10134,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -10153,12 +10153,12 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10193,7 +10193,7 @@ void m68008_device::bclr_dd_pais_if8() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10221,7 +10221,7 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10254,11 +10254,11 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -10276,12 +10276,12 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10316,7 +10316,7 @@ void m68008_device::bclr_dd_das_if8() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10342,14 +10342,14 @@ void m68008_device::bclr_dd_dais_if8() // 01b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10357,7 +10357,7 @@ void m68008_device::bclr_dd_dais_if8() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10391,7 +10391,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10427,11 +10427,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -10449,12 +10449,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10489,7 +10489,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10519,7 +10519,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10552,7 +10552,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -10571,12 +10571,12 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10611,7 +10611,7 @@ void m68008_device::bclr_dd_adr16_if8() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10639,7 +10639,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10673,7 +10673,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10706,7 +10706,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -10725,12 +10725,12 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10765,7 +10765,7 @@ void m68008_device::bclr_dd_adr32_if8() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10797,13 +10797,13 @@ void m68008_device::bset_dd_ds_if8() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10842,7 +10842,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10854,14 +10854,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10879,7 +10879,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -10912,7 +10912,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -10928,7 +10928,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -10945,7 +10945,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -10961,7 +10961,7 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -10978,11 +10978,11 @@ void m68008_device::movep_l_dd_das_if8() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11025,11 +11025,11 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -11048,7 +11048,7 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11083,7 +11083,7 @@ void m68008_device::bset_dd_ais_if8() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11114,12 +11114,12 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -11139,7 +11139,7 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11174,7 +11174,7 @@ void m68008_device::bset_dd_aips_if8() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11204,7 +11204,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -11212,7 +11212,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -11232,7 +11232,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11267,7 +11267,7 @@ void m68008_device::bset_dd_pais_if8() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11295,7 +11295,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11328,11 +11328,11 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -11351,7 +11351,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11386,7 +11386,7 @@ void m68008_device::bset_dd_das_if8() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11412,14 +11412,14 @@ void m68008_device::bset_dd_dais_if8() // 01f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11427,7 +11427,7 @@ void m68008_device::bset_dd_dais_if8() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11461,7 +11461,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11497,11 +11497,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -11520,7 +11520,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11555,7 +11555,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11585,7 +11585,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11618,7 +11618,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -11638,7 +11638,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11673,7 +11673,7 @@ void m68008_device::bset_dd_adr16_if8() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11701,7 +11701,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11735,7 +11735,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11768,7 +11768,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -11788,7 +11788,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11823,7 +11823,7 @@ void m68008_device::bset_dd_adr32_if8() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11852,7 +11852,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11885,7 +11885,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -11893,7 +11893,7 @@ void m68008_device::andi_b_imm8_ds_if8() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11937,7 +11937,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -11969,11 +11969,11 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -11991,7 +11991,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12028,7 +12028,7 @@ void m68008_device::andi_b_imm8_ais_if8() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12055,7 +12055,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12090,12 +12090,12 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -12114,7 +12114,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12151,7 +12151,7 @@ void m68008_device::andi_b_imm8_aips_if8() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12178,7 +12178,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12212,7 +12212,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12220,7 +12220,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -12239,7 +12239,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12276,7 +12276,7 @@ void m68008_device::andi_b_imm8_pais_if8() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12303,7 +12303,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12335,7 +12335,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12368,11 +12368,11 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -12390,7 +12390,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12427,7 +12427,7 @@ void m68008_device::andi_b_imm8_das_if8() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12454,7 +12454,7 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12484,14 +12484,14 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -12499,7 +12499,7 @@ void m68008_device::andi_b_imm8_dais_if8() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12533,7 +12533,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12569,11 +12569,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -12591,7 +12591,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12628,7 +12628,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12654,7 +12654,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12689,7 +12689,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -12722,7 +12722,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -12741,7 +12741,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12778,7 +12778,7 @@ void m68008_device::andi_b_imm8_adr16_if8() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12804,7 +12804,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12837,7 +12837,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -12871,7 +12871,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -12904,7 +12904,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -12923,7 +12923,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -12960,7 +12960,7 @@ void m68008_device::andi_b_imm8_adr32_if8() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -12986,7 +12986,7 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13018,21 +13018,21 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -13040,7 +13040,7 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13074,11 +13074,11 @@ void m68008_device::andi_imm8_ccr_if8() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13122,7 +13122,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13155,7 +13155,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -13163,7 +13163,7 @@ void m68008_device::andi_w_imm16_ds_if8() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13207,7 +13207,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13239,11 +13239,11 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13276,7 +13276,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13313,7 +13313,7 @@ void m68008_device::andi_w_imm16_ais_if8() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13355,7 +13355,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13390,12 +13390,12 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -13429,7 +13429,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13466,7 +13466,7 @@ void m68008_device::andi_w_imm16_aips_if8() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13508,7 +13508,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13542,7 +13542,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -13550,7 +13550,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -13584,7 +13584,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13621,7 +13621,7 @@ void m68008_device::andi_w_imm16_pais_if8() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13663,7 +13663,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13695,7 +13695,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13728,11 +13728,11 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13765,7 +13765,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13802,7 +13802,7 @@ void m68008_device::andi_w_imm16_das_if8() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -13844,7 +13844,7 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13874,14 +13874,14 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -13889,7 +13889,7 @@ void m68008_device::andi_w_imm16_dais_if8() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13923,7 +13923,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13959,11 +13959,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -13996,7 +13996,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14033,7 +14033,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14074,7 +14074,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14109,7 +14109,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14142,7 +14142,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -14176,7 +14176,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14213,7 +14213,7 @@ void m68008_device::andi_w_imm16_adr16_if8() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14254,7 +14254,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14287,7 +14287,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14321,7 +14321,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14354,7 +14354,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -14388,7 +14388,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14425,7 +14425,7 @@ void m68008_device::andi_w_imm16_adr32_if8() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14470,7 +14470,7 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14502,23 +14502,23 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -14526,7 +14526,7 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14560,11 +14560,11 @@ void m68008_device::andi_i16u_sr_if8() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14607,7 +14607,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14640,7 +14640,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14673,12 +14673,12 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14708,7 +14708,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -14717,7 +14717,7 @@ void m68008_device::andi_l_imm32_ds_if8() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -14733,7 +14733,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14766,7 +14766,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14798,7 +14798,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -14833,7 +14833,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -14866,7 +14866,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14901,7 +14901,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -14936,7 +14936,7 @@ void m68008_device::andi_l_imm32_ais_if8() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -14977,7 +14977,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15010,7 +15010,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15042,7 +15042,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -15077,11 +15077,11 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15114,7 +15114,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15149,7 +15149,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15184,7 +15184,7 @@ void m68008_device::andi_l_imm32_aips_if8() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15225,7 +15225,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15258,7 +15258,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15289,14 +15289,14 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15330,7 +15330,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15363,7 +15363,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15398,7 +15398,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15433,7 +15433,7 @@ void m68008_device::andi_l_imm32_pais_if8() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15474,7 +15474,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15507,7 +15507,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15539,7 +15539,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15571,7 +15571,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -15606,7 +15606,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15639,7 +15639,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15674,7 +15674,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -15709,7 +15709,7 @@ void m68008_device::andi_l_imm32_das_if8() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -15750,7 +15750,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15783,7 +15783,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15813,14 +15813,14 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -15828,7 +15828,7 @@ void m68008_device::andi_l_imm32_dais_if8() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15862,7 +15862,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15897,7 +15897,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -15932,7 +15932,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -15965,7 +15965,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16000,7 +16000,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16035,7 +16035,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16075,7 +16075,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16108,7 +16108,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16143,7 +16143,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16176,7 +16176,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -16211,7 +16211,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16244,7 +16244,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16279,7 +16279,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16314,7 +16314,7 @@ void m68008_device::andi_l_imm32_adr16_if8() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16354,7 +16354,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16387,7 +16387,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16420,7 +16420,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16454,7 +16454,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16487,7 +16487,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -16522,7 +16522,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -16555,7 +16555,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16590,7 +16590,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -16625,7 +16625,7 @@ void m68008_device::andi_l_imm32_adr32_if8() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -16699,7 +16699,7 @@ void m68008_device::subi_b_imm8_ds_if8() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -16781,7 +16781,7 @@ void m68008_device::subi_b_imm8_ais_if8() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -16802,7 +16802,7 @@ void m68008_device::subi_b_imm8_ais_if8() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16902,7 +16902,7 @@ void m68008_device::subi_b_imm8_aips_if8() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -16921,7 +16921,7 @@ void m68008_device::subi_b_imm8_aips_if8() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17023,7 +17023,7 @@ void m68008_device::subi_b_imm8_pais_if8() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -17042,7 +17042,7 @@ void m68008_device::subi_b_imm8_pais_if8() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17168,7 +17168,7 @@ void m68008_device::subi_b_imm8_das_if8() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17189,7 +17189,7 @@ void m68008_device::subi_b_imm8_das_if8() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17281,7 +17281,7 @@ void m68008_device::subi_b_imm8_dais_if8() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -17363,7 +17363,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17384,7 +17384,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17511,7 +17511,7 @@ void m68008_device::subi_b_imm8_adr16_if8() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -17530,7 +17530,7 @@ void m68008_device::subi_b_imm8_adr16_if8() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17688,7 +17688,7 @@ void m68008_device::subi_b_imm8_adr32_if8() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -17707,7 +17707,7 @@ void m68008_device::subi_b_imm8_adr32_if8() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17802,7 +17802,7 @@ void m68008_device::subi_w_imm16_ds_if8() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -17884,7 +17884,7 @@ void m68008_device::subi_w_imm16_ais_if8() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -17920,7 +17920,7 @@ void m68008_device::subi_w_imm16_ais_if8() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18035,7 +18035,7 @@ void m68008_device::subi_w_imm16_aips_if8() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -18069,7 +18069,7 @@ void m68008_device::subi_w_imm16_aips_if8() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18186,7 +18186,7 @@ void m68008_device::subi_w_imm16_pais_if8() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -18220,7 +18220,7 @@ void m68008_device::subi_w_imm16_pais_if8() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18361,7 +18361,7 @@ void m68008_device::subi_w_imm16_das_if8() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18397,7 +18397,7 @@ void m68008_device::subi_w_imm16_das_if8() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18504,7 +18504,7 @@ void m68008_device::subi_w_imm16_dais_if8() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -18586,7 +18586,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -18622,7 +18622,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18764,7 +18764,7 @@ void m68008_device::subi_w_imm16_adr16_if8() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -18798,7 +18798,7 @@ void m68008_device::subi_w_imm16_adr16_if8() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18971,7 +18971,7 @@ void m68008_device::subi_w_imm16_adr32_if8() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -19005,7 +19005,7 @@ void m68008_device::subi_w_imm16_adr32_if8() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19146,7 +19146,7 @@ void m68008_device::subi_l_imm32_ds_if8() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -19180,7 +19180,7 @@ void m68008_device::subi_l_imm32_ds_if8() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -19267,7 +19267,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -19334,7 +19334,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19369,7 +19369,7 @@ void m68008_device::subi_l_imm32_ais_if8() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19507,7 +19507,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -19577,7 +19577,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19612,7 +19612,7 @@ void m68008_device::subi_l_imm32_aips_if8() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -19749,7 +19749,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -19821,7 +19821,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19856,7 +19856,7 @@ void m68008_device::subi_l_imm32_pais_if8() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20025,7 +20025,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -20092,7 +20092,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20127,7 +20127,7 @@ void m68008_device::subi_l_imm32_das_if8() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20263,7 +20263,7 @@ void m68008_device::subi_l_imm32_dais_if8() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -20344,7 +20344,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -20411,7 +20411,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20446,7 +20446,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20617,7 +20617,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -20684,7 +20684,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20719,7 +20719,7 @@ void m68008_device::subi_l_imm32_adr16_if8() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -20921,7 +20921,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -20988,7 +20988,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21023,7 +21023,7 @@ void m68008_device::subi_l_imm32_adr32_if8() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -21131,7 +21131,7 @@ void m68008_device::addi_b_imm8_ds_if8() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -21213,7 +21213,7 @@ void m68008_device::addi_b_imm8_ais_if8() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21234,7 +21234,7 @@ void m68008_device::addi_b_imm8_ais_if8() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21334,7 +21334,7 @@ void m68008_device::addi_b_imm8_aips_if8() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -21353,7 +21353,7 @@ void m68008_device::addi_b_imm8_aips_if8() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21455,7 +21455,7 @@ void m68008_device::addi_b_imm8_pais_if8() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -21474,7 +21474,7 @@ void m68008_device::addi_b_imm8_pais_if8() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21600,7 +21600,7 @@ void m68008_device::addi_b_imm8_das_if8() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21621,7 +21621,7 @@ void m68008_device::addi_b_imm8_das_if8() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21713,7 +21713,7 @@ void m68008_device::addi_b_imm8_dais_if8() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -21795,7 +21795,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21816,7 +21816,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21943,7 +21943,7 @@ void m68008_device::addi_b_imm8_adr16_if8() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -21962,7 +21962,7 @@ void m68008_device::addi_b_imm8_adr16_if8() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22120,7 +22120,7 @@ void m68008_device::addi_b_imm8_adr32_if8() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -22139,7 +22139,7 @@ void m68008_device::addi_b_imm8_adr32_if8() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22234,7 +22234,7 @@ void m68008_device::addi_w_imm16_ds_if8() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -22316,7 +22316,7 @@ void m68008_device::addi_w_imm16_ais_if8() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -22352,7 +22352,7 @@ void m68008_device::addi_w_imm16_ais_if8() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22467,7 +22467,7 @@ void m68008_device::addi_w_imm16_aips_if8() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -22501,7 +22501,7 @@ void m68008_device::addi_w_imm16_aips_if8() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22618,7 +22618,7 @@ void m68008_device::addi_w_imm16_pais_if8() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -22652,7 +22652,7 @@ void m68008_device::addi_w_imm16_pais_if8() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22793,7 +22793,7 @@ void m68008_device::addi_w_imm16_das_if8() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -22829,7 +22829,7 @@ void m68008_device::addi_w_imm16_das_if8() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22936,7 +22936,7 @@ void m68008_device::addi_w_imm16_dais_if8() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -23018,7 +23018,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -23054,7 +23054,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23196,7 +23196,7 @@ void m68008_device::addi_w_imm16_adr16_if8() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -23230,7 +23230,7 @@ void m68008_device::addi_w_imm16_adr16_if8() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23403,7 +23403,7 @@ void m68008_device::addi_w_imm16_adr32_if8() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -23437,7 +23437,7 @@ void m68008_device::addi_w_imm16_adr32_if8() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23578,7 +23578,7 @@ void m68008_device::addi_l_imm32_ds_if8() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -23612,7 +23612,7 @@ void m68008_device::addi_l_imm32_ds_if8() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -23699,7 +23699,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -23766,7 +23766,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23801,7 +23801,7 @@ void m68008_device::addi_l_imm32_ais_if8() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23939,7 +23939,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -24009,7 +24009,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24044,7 +24044,7 @@ void m68008_device::addi_l_imm32_aips_if8() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24181,7 +24181,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -24253,7 +24253,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24288,7 +24288,7 @@ void m68008_device::addi_l_imm32_pais_if8() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24457,7 +24457,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -24524,7 +24524,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24559,7 +24559,7 @@ void m68008_device::addi_l_imm32_das_if8() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24695,7 +24695,7 @@ void m68008_device::addi_l_imm32_dais_if8() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -24776,7 +24776,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -24843,7 +24843,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24878,7 +24878,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25049,7 +25049,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -25116,7 +25116,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25151,7 +25151,7 @@ void m68008_device::addi_l_imm32_adr16_if8() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25353,7 +25353,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -25420,7 +25420,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25455,7 +25455,7 @@ void m68008_device::addi_l_imm32_adr32_if8() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -25531,7 +25531,7 @@ void m68008_device::btst_imm8_ds_if8() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25567,13 +25567,13 @@ void m68008_device::btst_imm8_ds_if8() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -25612,7 +25612,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25625,7 +25625,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -25644,7 +25644,7 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25676,11 +25676,11 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -25698,13 +25698,13 @@ void m68008_device::btst_imm8_ais_if8() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25748,7 +25748,7 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25783,12 +25783,12 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -25807,13 +25807,13 @@ void m68008_device::btst_imm8_aips_if8() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25857,7 +25857,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25891,7 +25891,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -25899,7 +25899,7 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -25918,13 +25918,13 @@ void m68008_device::btst_imm8_pais_if8() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -25968,7 +25968,7 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26000,7 +26000,7 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26033,11 +26033,11 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -26055,13 +26055,13 @@ void m68008_device::btst_imm8_das_if8() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26105,7 +26105,7 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26135,14 +26135,14 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26150,7 +26150,7 @@ void m68008_device::btst_imm8_dais_if8() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26184,7 +26184,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26220,11 +26220,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -26242,13 +26242,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26291,7 +26291,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26326,7 +26326,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -26359,7 +26359,7 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -26378,13 +26378,13 @@ void m68008_device::btst_imm8_adr16_if8() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26427,7 +26427,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26460,7 +26460,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26494,7 +26494,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -26527,7 +26527,7 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -26546,13 +26546,13 @@ void m68008_device::btst_imm8_adr32_if8() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26595,7 +26595,7 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26627,7 +26627,7 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26660,11 +26660,11 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -26682,13 +26682,13 @@ void m68008_device::btst_imm8_dpc_if8() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26731,7 +26731,7 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26761,14 +26761,14 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -26776,7 +26776,7 @@ void m68008_device::btst_imm8_dpci_if8() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26810,7 +26810,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26846,11 +26846,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -26868,13 +26868,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26918,7 +26918,7 @@ void m68008_device::bchg_imm8_ds_if8() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -26954,13 +26954,13 @@ void m68008_device::bchg_imm8_ds_if8() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -26999,7 +26999,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -27011,14 +27011,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -27037,7 +27037,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27069,11 +27069,11 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -27092,7 +27092,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27127,7 +27127,7 @@ void m68008_device::bchg_imm8_ais_if8() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27156,7 +27156,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27191,12 +27191,12 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -27216,7 +27216,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27251,7 +27251,7 @@ void m68008_device::bchg_imm8_aips_if8() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27280,7 +27280,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27314,7 +27314,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -27322,7 +27322,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -27342,7 +27342,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27377,7 +27377,7 @@ void m68008_device::bchg_imm8_pais_if8() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27406,7 +27406,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27438,7 +27438,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27471,11 +27471,11 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -27494,7 +27494,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27529,7 +27529,7 @@ void m68008_device::bchg_imm8_das_if8() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27558,7 +27558,7 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27588,14 +27588,14 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -27603,7 +27603,7 @@ void m68008_device::bchg_imm8_dais_if8() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27637,7 +27637,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27673,11 +27673,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -27696,7 +27696,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27731,7 +27731,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27759,7 +27759,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27794,7 +27794,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27827,7 +27827,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -27847,7 +27847,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -27882,7 +27882,7 @@ void m68008_device::bchg_imm8_adr16_if8() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -27910,7 +27910,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27943,7 +27943,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -27977,7 +27977,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28010,7 +28010,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -28030,7 +28030,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28065,7 +28065,7 @@ void m68008_device::bchg_imm8_adr32_if8() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28094,7 +28094,7 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28130,13 +28130,13 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28172,14 +28172,14 @@ void m68008_device::bclr_imm8_ds_if8() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -28191,18 +28191,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -28221,7 +28221,7 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28253,11 +28253,11 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -28275,12 +28275,12 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28315,7 +28315,7 @@ void m68008_device::bclr_imm8_ais_if8() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28344,7 +28344,7 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28379,12 +28379,12 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -28403,12 +28403,12 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28443,7 +28443,7 @@ void m68008_device::bclr_imm8_aips_if8() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28472,7 +28472,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28506,7 +28506,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -28514,7 +28514,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -28533,12 +28533,12 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28573,7 +28573,7 @@ void m68008_device::bclr_imm8_pais_if8() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28602,7 +28602,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28634,7 +28634,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28667,11 +28667,11 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -28689,12 +28689,12 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28729,7 +28729,7 @@ void m68008_device::bclr_imm8_das_if8() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28758,7 +28758,7 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28788,14 +28788,14 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -28803,7 +28803,7 @@ void m68008_device::bclr_imm8_dais_if8() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28837,7 +28837,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28873,11 +28873,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -28895,12 +28895,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -28935,7 +28935,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -28963,7 +28963,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -28998,7 +28998,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29031,7 +29031,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -29050,12 +29050,12 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29090,7 +29090,7 @@ void m68008_device::bclr_imm8_adr16_if8() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29118,7 +29118,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29151,7 +29151,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29185,7 +29185,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29218,7 +29218,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -29237,12 +29237,12 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29277,7 +29277,7 @@ void m68008_device::bclr_imm8_adr32_if8() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29306,7 +29306,7 @@ void m68008_device::bset_imm8_ds_if8() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29342,13 +29342,13 @@ void m68008_device::bset_imm8_ds_if8() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29387,7 +29387,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29399,14 +29399,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29425,7 +29425,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29457,11 +29457,11 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -29480,7 +29480,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29515,7 +29515,7 @@ void m68008_device::bset_imm8_ais_if8() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29544,7 +29544,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29579,12 +29579,12 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -29604,7 +29604,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29639,7 +29639,7 @@ void m68008_device::bset_imm8_aips_if8() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29668,7 +29668,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29702,7 +29702,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -29710,7 +29710,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -29730,7 +29730,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29765,7 +29765,7 @@ void m68008_device::bset_imm8_pais_if8() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29794,7 +29794,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29826,7 +29826,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29859,11 +29859,11 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -29882,7 +29882,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29917,7 +29917,7 @@ void m68008_device::bset_imm8_das_if8() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -29946,7 +29946,7 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -29976,14 +29976,14 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -29991,7 +29991,7 @@ void m68008_device::bset_imm8_dais_if8() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30025,7 +30025,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30061,11 +30061,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -30084,7 +30084,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30119,7 +30119,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30147,7 +30147,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30182,7 +30182,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30215,7 +30215,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -30235,7 +30235,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30270,7 +30270,7 @@ void m68008_device::bset_imm8_adr16_if8() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30298,7 +30298,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30331,7 +30331,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30365,7 +30365,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30398,7 +30398,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -30418,7 +30418,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30453,7 +30453,7 @@ void m68008_device::bset_imm8_adr32_if8() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -30482,7 +30482,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30515,7 +30515,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -30523,7 +30523,7 @@ void m68008_device::eori_b_imm8_ds_if8() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30567,7 +30567,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30599,11 +30599,11 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -30621,7 +30621,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30658,7 +30658,7 @@ void m68008_device::eori_b_imm8_ais_if8() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -30685,7 +30685,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30720,12 +30720,12 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -30744,7 +30744,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30781,7 +30781,7 @@ void m68008_device::eori_b_imm8_aips_if8() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -30808,7 +30808,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30842,7 +30842,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -30850,7 +30850,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -30869,7 +30869,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -30906,7 +30906,7 @@ void m68008_device::eori_b_imm8_pais_if8() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -30933,7 +30933,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30965,7 +30965,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -30998,11 +30998,11 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -31020,7 +31020,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31057,7 +31057,7 @@ void m68008_device::eori_b_imm8_das_if8() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -31084,7 +31084,7 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31114,14 +31114,14 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -31129,7 +31129,7 @@ void m68008_device::eori_b_imm8_dais_if8() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31163,7 +31163,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31199,11 +31199,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -31221,7 +31221,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31258,7 +31258,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -31284,7 +31284,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31319,7 +31319,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31352,7 +31352,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -31371,7 +31371,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31408,7 +31408,7 @@ void m68008_device::eori_b_imm8_adr16_if8() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -31434,7 +31434,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31467,7 +31467,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31501,7 +31501,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31534,7 +31534,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -31553,7 +31553,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31590,7 +31590,7 @@ void m68008_device::eori_b_imm8_adr32_if8() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -31616,7 +31616,7 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31648,21 +31648,21 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -31670,7 +31670,7 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31704,11 +31704,11 @@ void m68008_device::eori_imm8_ccr_if8() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31752,7 +31752,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31785,7 +31785,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -31793,7 +31793,7 @@ void m68008_device::eori_w_imm16_ds_if8() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31837,7 +31837,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31869,11 +31869,11 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -31906,7 +31906,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -31943,7 +31943,7 @@ void m68008_device::eori_w_imm16_ais_if8() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -31985,7 +31985,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32020,12 +32020,12 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -32059,7 +32059,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32096,7 +32096,7 @@ void m68008_device::eori_w_imm16_aips_if8() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32138,7 +32138,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32172,7 +32172,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -32180,7 +32180,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -32214,7 +32214,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32251,7 +32251,7 @@ void m68008_device::eori_w_imm16_pais_if8() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32293,7 +32293,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32325,7 +32325,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32358,11 +32358,11 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32395,7 +32395,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32432,7 +32432,7 @@ void m68008_device::eori_w_imm16_das_if8() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32474,7 +32474,7 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32504,14 +32504,14 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -32519,7 +32519,7 @@ void m68008_device::eori_w_imm16_dais_if8() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32553,7 +32553,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32589,11 +32589,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32626,7 +32626,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32663,7 +32663,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32704,7 +32704,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32739,7 +32739,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32772,7 +32772,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -32806,7 +32806,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -32843,7 +32843,7 @@ void m68008_device::eori_w_imm16_adr16_if8() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -32884,7 +32884,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32917,7 +32917,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -32951,7 +32951,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32984,7 +32984,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -33018,7 +33018,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33055,7 +33055,7 @@ void m68008_device::eori_w_imm16_adr32_if8() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33100,7 +33100,7 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33132,23 +33132,23 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -33156,7 +33156,7 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33190,11 +33190,11 @@ void m68008_device::eori_i16u_sr_if8() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33237,7 +33237,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33270,7 +33270,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33303,12 +33303,12 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33338,7 +33338,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -33347,7 +33347,7 @@ void m68008_device::eori_l_imm32_ds_if8() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -33363,7 +33363,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33396,7 +33396,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33428,7 +33428,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -33463,7 +33463,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33496,7 +33496,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33531,7 +33531,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -33566,7 +33566,7 @@ void m68008_device::eori_l_imm32_ais_if8() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33607,7 +33607,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33640,7 +33640,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33672,7 +33672,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -33707,11 +33707,11 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33744,7 +33744,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -33779,7 +33779,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -33814,7 +33814,7 @@ void m68008_device::eori_l_imm32_aips_if8() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -33855,7 +33855,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33888,7 +33888,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33919,14 +33919,14 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33960,7 +33960,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -33993,7 +33993,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34028,7 +34028,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34063,7 +34063,7 @@ void m68008_device::eori_l_imm32_pais_if8() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34104,7 +34104,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34137,7 +34137,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34169,7 +34169,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34201,7 +34201,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -34236,7 +34236,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34269,7 +34269,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34304,7 +34304,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34339,7 +34339,7 @@ void m68008_device::eori_l_imm32_das_if8() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34380,7 +34380,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34413,7 +34413,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34443,14 +34443,14 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -34458,7 +34458,7 @@ void m68008_device::eori_l_imm32_dais_if8() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34492,7 +34492,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34527,7 +34527,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -34562,7 +34562,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34595,7 +34595,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34630,7 +34630,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34665,7 +34665,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34705,7 +34705,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34738,7 +34738,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34773,7 +34773,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34806,7 +34806,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -34841,7 +34841,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -34874,7 +34874,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -34909,7 +34909,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -34944,7 +34944,7 @@ void m68008_device::eori_l_imm32_adr16_if8() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -34984,7 +34984,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35017,7 +35017,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35050,7 +35050,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35084,7 +35084,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35117,7 +35117,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -35152,7 +35152,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -35185,7 +35185,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35220,7 +35220,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -35255,7 +35255,7 @@ void m68008_device::eori_l_imm32_adr32_if8() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -35329,7 +35329,7 @@ void m68008_device::cmpi_b_imm8_ds_if8() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -35410,7 +35410,7 @@ void m68008_device::cmpi_b_imm8_ais_if8() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35431,7 +35431,7 @@ void m68008_device::cmpi_b_imm8_ais_if8() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35517,7 +35517,7 @@ void m68008_device::cmpi_b_imm8_aips_if8() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -35536,7 +35536,7 @@ void m68008_device::cmpi_b_imm8_aips_if8() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35624,7 +35624,7 @@ void m68008_device::cmpi_b_imm8_pais_if8() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -35643,7 +35643,7 @@ void m68008_device::cmpi_b_imm8_pais_if8() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35755,7 +35755,7 @@ void m68008_device::cmpi_b_imm8_das_if8() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35776,7 +35776,7 @@ void m68008_device::cmpi_b_imm8_das_if8() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -35854,7 +35854,7 @@ void m68008_device::cmpi_b_imm8_dais_if8() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -35936,7 +35936,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -35957,7 +35957,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36070,7 +36070,7 @@ void m68008_device::cmpi_b_imm8_adr16_if8() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -36089,7 +36089,7 @@ void m68008_device::cmpi_b_imm8_adr16_if8() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36233,7 +36233,7 @@ void m68008_device::cmpi_b_imm8_adr32_if8() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -36252,7 +36252,7 @@ void m68008_device::cmpi_b_imm8_adr32_if8() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36333,7 +36333,7 @@ void m68008_device::cmpi_w_imm16_ds_if8() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -36414,7 +36414,7 @@ void m68008_device::cmpi_w_imm16_ais_if8() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -36450,7 +36450,7 @@ void m68008_device::cmpi_w_imm16_ais_if8() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36536,7 +36536,7 @@ void m68008_device::cmpi_w_imm16_aips_if8() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -36570,7 +36570,7 @@ void m68008_device::cmpi_w_imm16_aips_if8() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36658,7 +36658,7 @@ void m68008_device::cmpi_w_imm16_pais_if8() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -36692,7 +36692,7 @@ void m68008_device::cmpi_w_imm16_pais_if8() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36804,7 +36804,7 @@ void m68008_device::cmpi_w_imm16_das_if8() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -36840,7 +36840,7 @@ void m68008_device::cmpi_w_imm16_das_if8() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -36918,7 +36918,7 @@ void m68008_device::cmpi_w_imm16_dais_if8() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -37000,7 +37000,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -37036,7 +37036,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37149,7 +37149,7 @@ void m68008_device::cmpi_w_imm16_adr16_if8() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37183,7 +37183,7 @@ void m68008_device::cmpi_w_imm16_adr16_if8() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37327,7 +37327,7 @@ void m68008_device::cmpi_w_imm16_adr32_if8() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37361,7 +37361,7 @@ void m68008_device::cmpi_w_imm16_adr32_if8() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -37474,11 +37474,11 @@ void m68008_device::cmpi_l_imm32_ds_if8() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37591,7 +37591,7 @@ void m68008_device::cmpi_l_imm32_ais_if8() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37658,13 +37658,13 @@ void m68008_device::cmpi_l_imm32_ais_if8() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37772,7 +37772,7 @@ void m68008_device::cmpi_l_imm32_aips_if8() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37842,13 +37842,13 @@ void m68008_device::cmpi_l_imm32_aips_if8() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37955,7 +37955,7 @@ void m68008_device::cmpi_l_imm32_pais_if8() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -38027,13 +38027,13 @@ void m68008_device::cmpi_l_imm32_pais_if8() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38172,7 +38172,7 @@ void m68008_device::cmpi_l_imm32_das_if8() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38239,13 +38239,13 @@ void m68008_device::cmpi_l_imm32_das_if8() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38351,7 +38351,7 @@ void m68008_device::cmpi_l_imm32_dais_if8() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -38432,7 +38432,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38499,13 +38499,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38646,7 +38646,7 @@ void m68008_device::cmpi_l_imm32_adr16_if8() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38713,13 +38713,13 @@ void m68008_device::cmpi_l_imm32_adr16_if8() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38891,7 +38891,7 @@ void m68008_device::cmpi_l_imm32_adr32_if8() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38958,13 +38958,13 @@ void m68008_device::cmpi_l_imm32_adr32_if8() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39012,7 +39012,7 @@ void m68008_device::move_b_ds_dd_if8() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -39062,7 +39062,7 @@ void m68008_device::move_b_ais_dd_if8() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39084,7 +39084,7 @@ void m68008_device::move_b_ais_dd_if8() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39138,7 +39138,7 @@ void m68008_device::move_b_aips_dd_if8() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -39158,7 +39158,7 @@ void m68008_device::move_b_aips_dd_if8() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39214,7 +39214,7 @@ void m68008_device::move_b_pais_dd_if8() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -39234,7 +39234,7 @@ void m68008_device::move_b_pais_dd_if8() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39314,7 +39314,7 @@ void m68008_device::move_b_das_dd_if8() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39336,7 +39336,7 @@ void m68008_device::move_b_das_dd_if8() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39382,7 +39382,7 @@ void m68008_device::move_b_dais_dd_if8() // 1030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39464,7 +39464,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39486,7 +39486,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39567,7 +39567,7 @@ void m68008_device::move_b_adr16_dd_if8() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -39587,7 +39587,7 @@ void m68008_device::move_b_adr16_dd_if8() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39699,7 +39699,7 @@ void m68008_device::move_b_adr32_dd_if8() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -39719,7 +39719,7 @@ void m68008_device::move_b_adr32_dd_if8() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39798,7 +39798,7 @@ void m68008_device::move_b_dpc_dd_if8() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39820,7 +39820,7 @@ void m68008_device::move_b_dpc_dd_if8() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -39865,7 +39865,7 @@ void m68008_device::move_b_dpci_dd_if8() // 103b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -39947,7 +39947,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -39969,7 +39969,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -40053,7 +40053,7 @@ void m68008_device::move_b_imm8_dd_if8() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -40106,7 +40106,7 @@ void m68008_device::move_b_ds_aid_if8() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40169,7 +40169,7 @@ void m68008_device::move_b_ais_aid_if8() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40190,7 +40190,7 @@ void m68008_device::move_b_ais_aid_if8() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40259,7 +40259,7 @@ void m68008_device::move_b_aips_aid_if8() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -40278,7 +40278,7 @@ void m68008_device::move_b_aips_aid_if8() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40349,7 +40349,7 @@ void m68008_device::move_b_pais_aid_if8() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -40368,7 +40368,7 @@ void m68008_device::move_b_pais_aid_if8() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40463,7 +40463,7 @@ void m68008_device::move_b_das_aid_if8() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40484,7 +40484,7 @@ void m68008_device::move_b_das_aid_if8() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40545,7 +40545,7 @@ void m68008_device::move_b_dais_aid_if8() // 10b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -40627,7 +40627,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -40648,7 +40648,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40744,7 +40744,7 @@ void m68008_device::move_b_adr16_aid_if8() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -40763,7 +40763,7 @@ void m68008_device::move_b_adr16_aid_if8() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -40890,7 +40890,7 @@ void m68008_device::move_b_adr32_aid_if8() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -40909,7 +40909,7 @@ void m68008_device::move_b_adr32_aid_if8() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41003,7 +41003,7 @@ void m68008_device::move_b_dpc_aid_if8() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41024,7 +41024,7 @@ void m68008_device::move_b_dpc_aid_if8() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41084,7 +41084,7 @@ void m68008_device::move_b_dpci_aid_if8() // 10bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41166,7 +41166,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41187,7 +41187,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41286,7 +41286,7 @@ void m68008_device::move_b_imm8_aid_if8() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41352,7 +41352,7 @@ void m68008_device::move_b_ds_aipd_if8() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41414,7 +41414,7 @@ void m68008_device::move_b_ais_aipd_if8() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41436,7 +41436,7 @@ void m68008_device::move_b_ais_aipd_if8() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41504,7 +41504,7 @@ void m68008_device::move_b_aips_aipd_if8() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -41524,7 +41524,7 @@ void m68008_device::move_b_aips_aipd_if8() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41594,7 +41594,7 @@ void m68008_device::move_b_pais_aipd_if8() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -41614,7 +41614,7 @@ void m68008_device::move_b_pais_aipd_if8() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41708,7 +41708,7 @@ void m68008_device::move_b_das_aipd_if8() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41730,7 +41730,7 @@ void m68008_device::move_b_das_aipd_if8() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41790,7 +41790,7 @@ void m68008_device::move_b_dais_aipd_if8() // 10f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41872,7 +41872,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -41894,7 +41894,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -41989,7 +41989,7 @@ void m68008_device::move_b_adr16_aipd_if8() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -42009,7 +42009,7 @@ void m68008_device::move_b_adr16_aipd_if8() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42135,7 +42135,7 @@ void m68008_device::move_b_adr32_aipd_if8() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -42155,7 +42155,7 @@ void m68008_device::move_b_adr32_aipd_if8() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42248,7 +42248,7 @@ void m68008_device::move_b_dpc_aipd_if8() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42270,7 +42270,7 @@ void m68008_device::move_b_dpc_aipd_if8() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42329,7 +42329,7 @@ void m68008_device::move_b_dpci_aipd_if8() // 10fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42411,7 +42411,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42433,7 +42433,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42531,7 +42531,7 @@ void m68008_device::move_b_imm8_aipd_if8() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -42595,7 +42595,7 @@ void m68008_device::move_b_ds_paid_if8() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42658,7 +42658,7 @@ void m68008_device::move_b_ais_paid_if8() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42679,7 +42679,7 @@ void m68008_device::move_b_ais_paid_if8() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42748,7 +42748,7 @@ void m68008_device::move_b_aips_paid_if8() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -42767,7 +42767,7 @@ void m68008_device::move_b_aips_paid_if8() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42838,7 +42838,7 @@ void m68008_device::move_b_pais_paid_if8() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -42857,7 +42857,7 @@ void m68008_device::move_b_pais_paid_if8() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -42952,7 +42952,7 @@ void m68008_device::move_b_das_paid_if8() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -42973,7 +42973,7 @@ void m68008_device::move_b_das_paid_if8() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43034,7 +43034,7 @@ void m68008_device::move_b_dais_paid_if8() // 1130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43116,7 +43116,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43137,7 +43137,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43233,7 +43233,7 @@ void m68008_device::move_b_adr16_paid_if8() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -43252,7 +43252,7 @@ void m68008_device::move_b_adr16_paid_if8() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43379,7 +43379,7 @@ void m68008_device::move_b_adr32_paid_if8() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -43398,7 +43398,7 @@ void m68008_device::move_b_adr32_paid_if8() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43492,7 +43492,7 @@ void m68008_device::move_b_dpc_paid_if8() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43513,7 +43513,7 @@ void m68008_device::move_b_dpc_paid_if8() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43573,7 +43573,7 @@ void m68008_device::move_b_dpci_paid_if8() // 113b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -43655,7 +43655,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43676,7 +43676,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43774,7 +43774,7 @@ void m68008_device::move_b_imm8_paid_if8() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43870,7 +43870,7 @@ void m68008_device::move_b_ds_dad_if8() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -43934,7 +43934,7 @@ void m68008_device::move_b_ais_dad_if8() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -43954,7 +43954,7 @@ void m68008_device::move_b_ais_dad_if8() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44060,7 +44060,7 @@ void m68008_device::move_b_aips_dad_if8() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -44078,7 +44078,7 @@ void m68008_device::move_b_aips_dad_if8() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44186,7 +44186,7 @@ void m68008_device::move_b_pais_dad_if8() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -44204,7 +44204,7 @@ void m68008_device::move_b_pais_dad_if8() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44336,7 +44336,7 @@ void m68008_device::move_b_das_dad_if8() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44356,7 +44356,7 @@ void m68008_device::move_b_das_dad_if8() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44454,7 +44454,7 @@ void m68008_device::move_b_dais_dad_if8() // 1170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -44536,7 +44536,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -44556,7 +44556,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44689,7 +44689,7 @@ void m68008_device::move_b_adr16_dad_if8() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -44707,7 +44707,7 @@ void m68008_device::move_b_adr16_dad_if8() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44871,7 +44871,7 @@ void m68008_device::move_b_adr32_dad_if8() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -44889,7 +44889,7 @@ void m68008_device::move_b_adr32_dad_if8() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45020,7 +45020,7 @@ void m68008_device::move_b_dpc_dad_if8() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45040,7 +45040,7 @@ void m68008_device::move_b_dpc_dad_if8() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45137,7 +45137,7 @@ void m68008_device::move_b_dpci_dad_if8() // 117b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45219,7 +45219,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45239,7 +45239,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45405,7 +45405,7 @@ void m68008_device::move_b_imm8_dad_if8() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45467,7 +45467,7 @@ void m68008_device::move_b_ds_daid_if8() // 1180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -45551,7 +45551,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -45615,7 +45615,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -45632,7 +45632,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45647,7 +45647,7 @@ void m68008_device::move_b_ais_daid_if8() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45681,7 +45681,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45789,7 +45789,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -45804,7 +45804,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45819,7 +45819,7 @@ void m68008_device::move_b_aips_daid_if8() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45853,7 +45853,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -45963,7 +45963,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -45978,7 +45978,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -45993,7 +45993,7 @@ void m68008_device::move_b_pais_daid_if8() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46027,7 +46027,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46161,7 +46161,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46178,7 +46178,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46193,7 +46193,7 @@ void m68008_device::move_b_das_daid_if8() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46227,7 +46227,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46327,7 +46327,7 @@ void m68008_device::move_b_dais_daid_if8() // 11b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46409,7 +46409,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46426,7 +46426,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46441,7 +46441,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46475,7 +46475,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46610,7 +46610,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -46625,7 +46625,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46640,7 +46640,7 @@ void m68008_device::move_b_adr16_daid_if8() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46674,7 +46674,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46840,7 +46840,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -46855,7 +46855,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -46870,7 +46870,7 @@ void m68008_device::move_b_adr32_daid_if8() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -46904,7 +46904,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47037,7 +47037,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47054,7 +47054,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -47069,7 +47069,7 @@ void m68008_device::move_b_dpc_daid_if8() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47103,7 +47103,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47202,7 +47202,7 @@ void m68008_device::move_b_dpci_daid_if8() // 11bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -47284,7 +47284,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47301,7 +47301,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -47316,7 +47316,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47350,7 +47350,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47483,7 +47483,7 @@ void m68008_device::move_b_imm8_daid_if8() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -47567,7 +47567,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47632,7 +47632,7 @@ void m68008_device::move_b_ds_adr16_if8() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47731,7 +47731,7 @@ void m68008_device::move_b_ais_adr16_if8() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47751,7 +47751,7 @@ void m68008_device::move_b_ais_adr16_if8() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47856,7 +47856,7 @@ void m68008_device::move_b_aips_adr16_if8() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -47874,7 +47874,7 @@ void m68008_device::move_b_aips_adr16_if8() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -47981,7 +47981,7 @@ void m68008_device::move_b_pais_adr16_if8() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -47999,7 +47999,7 @@ void m68008_device::move_b_pais_adr16_if8() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48130,7 +48130,7 @@ void m68008_device::move_b_das_adr16_if8() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48150,7 +48150,7 @@ void m68008_device::move_b_das_adr16_if8() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48247,7 +48247,7 @@ void m68008_device::move_b_dais_adr16_if8() // 11f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48329,7 +48329,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48349,7 +48349,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48481,7 +48481,7 @@ void m68008_device::move_b_adr16_adr16_if8() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -48499,7 +48499,7 @@ void m68008_device::move_b_adr16_adr16_if8() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48662,7 +48662,7 @@ void m68008_device::move_b_adr32_adr16_if8() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -48680,7 +48680,7 @@ void m68008_device::move_b_adr32_adr16_if8() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48810,7 +48810,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48830,7 +48830,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -48926,7 +48926,7 @@ void m68008_device::move_b_dpc_adr16_if8() // 11fa ffff
void m68008_device::move_b_dpci_adr16_if8() // 11fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -49008,7 +49008,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49028,7 +49028,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49162,7 +49162,7 @@ void m68008_device::move_b_imm8_adr16_if8() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49294,7 +49294,7 @@ void m68008_device::move_b_ds_adr32_if8() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49393,7 +49393,7 @@ void m68008_device::move_b_ais_adr32_if8() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49413,7 +49413,7 @@ void m68008_device::move_b_ais_adr32_if8() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49548,7 +49548,7 @@ void m68008_device::move_b_aips_adr32_if8() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -49566,7 +49566,7 @@ void m68008_device::move_b_aips_adr32_if8() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49703,7 +49703,7 @@ void m68008_device::move_b_pais_adr32_if8() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -49721,7 +49721,7 @@ void m68008_device::move_b_pais_adr32_if8() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49882,7 +49882,7 @@ void m68008_device::move_b_das_adr32_if8() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49902,7 +49902,7 @@ void m68008_device::move_b_das_adr32_if8() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50029,7 +50029,7 @@ void m68008_device::move_b_dais_adr32_if8() // 13f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50111,7 +50111,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50131,7 +50131,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50293,7 +50293,7 @@ void m68008_device::move_b_adr16_adr32_if8() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -50311,7 +50311,7 @@ void m68008_device::move_b_adr16_adr32_if8() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50504,7 +50504,7 @@ void m68008_device::move_b_adr32_adr32_if8() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -50522,7 +50522,7 @@ void m68008_device::move_b_adr32_adr32_if8() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50682,7 +50682,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50702,7 +50702,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50828,7 +50828,7 @@ void m68008_device::move_b_dpc_adr32_if8() // 13fa ffff
void m68008_device::move_b_dpci_adr32_if8() // 13fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50910,7 +50910,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50930,7 +50930,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51125,7 +51125,7 @@ void m68008_device::move_b_imm8_adr32_if8() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51228,13 +51228,13 @@ void m68008_device::move_l_ds_dd_if8() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -51283,14 +51283,14 @@ void m68008_device::move_l_as_dd_if8() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51335,7 +51335,7 @@ void m68008_device::move_l_ais_dd_if8() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -51403,14 +51403,14 @@ void m68008_device::move_l_ais_dd_if8() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51455,7 +51455,7 @@ void m68008_device::move_l_aips_dd_if8() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -51526,14 +51526,14 @@ void m68008_device::move_l_aips_dd_if8() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51577,7 +51577,7 @@ void m68008_device::move_l_pais_dd_if8() // 2020 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -51650,14 +51650,14 @@ void m68008_device::move_l_pais_dd_if8() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51733,7 +51733,7 @@ void m68008_device::move_l_das_dd_if8() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -51801,14 +51801,14 @@ void m68008_device::move_l_das_dd_if8() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51851,7 +51851,7 @@ void m68008_device::move_l_dais_dd_if8() // 2030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -51932,7 +51932,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -52000,14 +52000,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52085,7 +52085,7 @@ void m68008_device::move_l_adr16_dd_if8() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -52153,14 +52153,14 @@ void m68008_device::move_l_adr16_dd_if8() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52269,7 +52269,7 @@ void m68008_device::move_l_adr32_dd_if8() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -52337,14 +52337,14 @@ void m68008_device::move_l_adr32_dd_if8() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52419,7 +52419,7 @@ void m68008_device::move_l_dpc_dd_if8() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -52487,14 +52487,14 @@ void m68008_device::move_l_dpc_dd_if8() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52536,7 +52536,7 @@ void m68008_device::move_l_dpci_dd_if8() // 203b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -52617,7 +52617,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -52685,14 +52685,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52804,14 +52804,14 @@ void m68008_device::move_l_imm32_dd_if8() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52859,13 +52859,13 @@ void m68008_device::movea_l_ds_ad_if8() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -52912,12 +52912,12 @@ void m68008_device::movea_l_as_ad_if8() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52962,7 +52962,7 @@ void m68008_device::movea_l_ais_ad_if8() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53030,13 +53030,13 @@ void m68008_device::movea_l_ais_ad_if8() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53080,7 +53080,7 @@ void m68008_device::movea_l_aips_ad_if8() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53151,13 +53151,13 @@ void m68008_device::movea_l_aips_ad_if8() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53200,7 +53200,7 @@ void m68008_device::movea_l_pais_ad_if8() // 2060 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -53273,13 +53273,13 @@ void m68008_device::movea_l_pais_ad_if8() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53354,7 +53354,7 @@ void m68008_device::movea_l_das_ad_if8() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53422,13 +53422,13 @@ void m68008_device::movea_l_das_ad_if8() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53470,7 +53470,7 @@ void m68008_device::movea_l_dais_ad_if8() // 2070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -53551,7 +53551,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53619,13 +53619,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53702,7 +53702,7 @@ void m68008_device::movea_l_adr16_ad_if8() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53770,13 +53770,13 @@ void m68008_device::movea_l_adr16_ad_if8() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -53884,7 +53884,7 @@ void m68008_device::movea_l_adr32_ad_if8() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -53952,13 +53952,13 @@ void m68008_device::movea_l_adr32_ad_if8() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54032,7 +54032,7 @@ void m68008_device::movea_l_dpc_ad_if8() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54100,13 +54100,13 @@ void m68008_device::movea_l_dpc_ad_if8() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54147,7 +54147,7 @@ void m68008_device::movea_l_dpci_ad_if8() // 207b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -54228,7 +54228,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54296,13 +54296,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54413,13 +54413,13 @@ void m68008_device::movea_l_imm32_ad_if8() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -54497,7 +54497,7 @@ void m68008_device::move_l_ds_aid_if8() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54532,7 +54532,7 @@ void m68008_device::move_l_ds_aid_if8() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54611,7 +54611,7 @@ void m68008_device::move_l_as_aid_if8() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54646,7 +54646,7 @@ void m68008_device::move_l_as_aid_if8() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54691,7 +54691,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -54758,7 +54758,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54792,7 +54792,7 @@ void m68008_device::move_l_ais_aid_if8() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -54870,7 +54870,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -54940,7 +54940,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54974,7 +54974,7 @@ void m68008_device::move_l_aips_aid_if8() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55051,7 +55051,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -55123,7 +55123,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55157,7 +55157,7 @@ void m68008_device::move_l_pais_aid_if8() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55266,7 +55266,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -55333,7 +55333,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55367,7 +55367,7 @@ void m68008_device::move_l_das_aid_if8() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55443,7 +55443,7 @@ void m68008_device::move_l_dais_aid_if8() // 20b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -55524,7 +55524,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -55591,7 +55591,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55625,7 +55625,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55736,7 +55736,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -55803,7 +55803,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -55837,7 +55837,7 @@ void m68008_device::move_l_adr16_aid_if8() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -55979,7 +55979,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -56046,7 +56046,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56080,7 +56080,7 @@ void m68008_device::move_l_adr32_aid_if8() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56188,7 +56188,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -56255,7 +56255,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56289,7 +56289,7 @@ void m68008_device::move_l_dpc_aid_if8() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56364,7 +56364,7 @@ void m68008_device::move_l_dpci_aid_if8() // 20bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -56445,7 +56445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -56512,7 +56512,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56546,7 +56546,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -56722,7 +56722,7 @@ void m68008_device::move_l_imm32_aid_if8() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56757,7 +56757,7 @@ void m68008_device::move_l_imm32_aid_if8() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56836,7 +56836,7 @@ void m68008_device::move_l_ds_aipd_if8() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56871,7 +56871,7 @@ void m68008_device::move_l_ds_aipd_if8() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56950,7 +56950,7 @@ void m68008_device::move_l_as_aipd_if8() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -56985,7 +56985,7 @@ void m68008_device::move_l_as_aipd_if8() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57030,7 +57030,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -57097,7 +57097,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57131,7 +57131,7 @@ void m68008_device::move_l_ais_aipd_if8() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57208,7 +57208,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -57278,7 +57278,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57312,7 +57312,7 @@ void m68008_device::move_l_aips_aipd_if8() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57388,7 +57388,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -57460,7 +57460,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57494,7 +57494,7 @@ void m68008_device::move_l_pais_aipd_if8() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57602,7 +57602,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -57669,7 +57669,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57703,7 +57703,7 @@ void m68008_device::move_l_das_aipd_if8() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -57778,7 +57778,7 @@ void m68008_device::move_l_dais_aipd_if8() // 20f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -57859,7 +57859,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -57926,7 +57926,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -57960,7 +57960,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58070,7 +58070,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -58137,7 +58137,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58171,7 +58171,7 @@ void m68008_device::move_l_adr16_aipd_if8() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58312,7 +58312,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -58379,7 +58379,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58413,7 +58413,7 @@ void m68008_device::move_l_adr32_aipd_if8() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58520,7 +58520,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -58587,7 +58587,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58621,7 +58621,7 @@ void m68008_device::move_l_dpc_aipd_if8() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -58695,7 +58695,7 @@ void m68008_device::move_l_dpci_aipd_if8() // 20fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -58776,7 +58776,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -58843,7 +58843,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -58877,7 +58877,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59052,7 +59052,7 @@ void m68008_device::move_l_imm32_aipd_if8() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -59087,7 +59087,7 @@ void m68008_device::move_l_imm32_aipd_if8() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59134,7 +59134,7 @@ void m68008_device::move_l_ds_paid_if8() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59169,7 +59169,7 @@ void m68008_device::move_l_ds_paid_if8() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59247,7 +59247,7 @@ void m68008_device::move_l_as_paid_if8() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59282,7 +59282,7 @@ void m68008_device::move_l_as_paid_if8() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59358,7 +59358,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -59425,7 +59425,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59460,7 +59460,7 @@ void m68008_device::move_l_ais_paid_if8() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59536,7 +59536,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -59606,7 +59606,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59641,7 +59641,7 @@ void m68008_device::move_l_aips_paid_if8() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59716,7 +59716,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59788,7 +59788,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59823,7 +59823,7 @@ void m68008_device::move_l_pais_paid_if8() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -59930,7 +59930,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -59997,7 +59997,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60032,7 +60032,7 @@ void m68008_device::move_l_das_paid_if8() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60106,7 +60106,7 @@ void m68008_device::move_l_dais_paid_if8() // 2130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60187,7 +60187,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -60254,7 +60254,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60289,7 +60289,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60398,7 +60398,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -60465,7 +60465,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60500,7 +60500,7 @@ void m68008_device::move_l_adr16_paid_if8() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60640,7 +60640,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -60707,7 +60707,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60742,7 +60742,7 @@ void m68008_device::move_l_adr32_paid_if8() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -60848,7 +60848,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -60915,7 +60915,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60950,7 +60950,7 @@ void m68008_device::move_l_dpc_paid_if8() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61023,7 +61023,7 @@ void m68008_device::move_l_dpci_paid_if8() // 213b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -61104,7 +61104,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -61171,7 +61171,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61206,7 +61206,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61348,7 +61348,7 @@ void m68008_device::move_l_imm32_paid_if8() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61383,7 +61383,7 @@ void m68008_device::move_l_imm32_paid_if8() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61492,7 +61492,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61526,7 +61526,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61561,7 +61561,7 @@ void m68008_device::move_l_ds_dad_if8() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61639,7 +61639,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61673,7 +61673,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -61708,7 +61708,7 @@ void m68008_device::move_l_as_dad_if8() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61753,7 +61753,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -61819,7 +61819,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61854,7 +61854,7 @@ void m68008_device::move_l_ais_dad_if8() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -61968,7 +61968,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -62037,7 +62037,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62072,7 +62072,7 @@ void m68008_device::move_l_aips_dad_if8() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62185,7 +62185,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -62256,7 +62256,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62291,7 +62291,7 @@ void m68008_device::move_l_pais_dad_if8() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62436,7 +62436,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -62502,7 +62502,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62537,7 +62537,7 @@ void m68008_device::move_l_das_dad_if8() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62649,7 +62649,7 @@ void m68008_device::move_l_dais_dad_if8() // 2170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62730,7 +62730,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -62796,7 +62796,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62831,7 +62831,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -62978,7 +62978,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -63044,7 +63044,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63079,7 +63079,7 @@ void m68008_device::move_l_adr16_dad_if8() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63257,7 +63257,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -63323,7 +63323,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63358,7 +63358,7 @@ void m68008_device::move_l_adr32_dad_if8() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63502,7 +63502,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -63568,7 +63568,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63603,7 +63603,7 @@ void m68008_device::move_l_dpc_dad_if8() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63714,7 +63714,7 @@ void m68008_device::move_l_dpci_dad_if8() // 217b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63795,7 +63795,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -63861,7 +63861,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63896,7 +63896,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64107,7 +64107,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64141,7 +64141,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64176,7 +64176,7 @@ void m68008_device::move_l_imm32_dad_if8() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64219,7 +64219,7 @@ void m68008_device::move_l_ds_daid_if8() // 2180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -64303,7 +64303,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64337,7 +64337,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64372,7 +64372,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64415,7 +64415,7 @@ void m68008_device::move_l_as_daid_if8() // 2188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -64499,7 +64499,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64533,7 +64533,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64568,7 +64568,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64613,7 +64613,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -64676,7 +64676,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -64691,7 +64691,7 @@ void m68008_device::move_l_ais_daid_if8() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64725,7 +64725,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64762,7 +64762,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64876,7 +64876,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -64942,7 +64942,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -64957,7 +64957,7 @@ void m68008_device::move_l_aips_daid_if8() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -64991,7 +64991,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65028,7 +65028,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65141,7 +65141,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -65209,7 +65209,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65224,7 +65224,7 @@ void m68008_device::move_l_pais_daid_if8() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65258,7 +65258,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65295,7 +65295,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65440,7 +65440,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -65503,7 +65503,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65518,7 +65518,7 @@ void m68008_device::move_l_das_daid_if8() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65552,7 +65552,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65589,7 +65589,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65701,7 +65701,7 @@ void m68008_device::move_l_dais_daid_if8() // 21b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -65782,7 +65782,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -65845,7 +65845,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -65860,7 +65860,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65894,7 +65894,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65931,7 +65931,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66078,7 +66078,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -66141,7 +66141,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66156,7 +66156,7 @@ void m68008_device::move_l_adr16_daid_if8() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66190,7 +66190,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66227,7 +66227,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66405,7 +66405,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -66468,7 +66468,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66483,7 +66483,7 @@ void m68008_device::move_l_adr32_daid_if8() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66517,7 +66517,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66554,7 +66554,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66698,7 +66698,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -66761,7 +66761,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -66776,7 +66776,7 @@ void m68008_device::move_l_dpc_daid_if8() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66810,7 +66810,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -66847,7 +66847,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66958,7 +66958,7 @@ void m68008_device::move_l_dpci_daid_if8() // 21bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -67039,7 +67039,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -67102,7 +67102,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -67117,7 +67117,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67151,7 +67151,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67188,7 +67188,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67364,7 +67364,7 @@ void m68008_device::move_l_imm32_daid_if8() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -67448,7 +67448,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67482,7 +67482,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67517,7 +67517,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67563,7 +67563,7 @@ void m68008_device::move_l_ds_adr16_if8() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67598,7 +67598,7 @@ void m68008_device::move_l_ds_adr16_if8() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67713,7 +67713,7 @@ void m68008_device::move_l_as_adr16_if8() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67748,7 +67748,7 @@ void m68008_device::move_l_as_adr16_if8() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67861,7 +67861,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -67927,7 +67927,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -67962,7 +67962,7 @@ void m68008_device::move_l_ais_adr16_if8() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68075,7 +68075,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -68144,7 +68144,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68179,7 +68179,7 @@ void m68008_device::move_l_aips_adr16_if8() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68291,7 +68291,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -68362,7 +68362,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68397,7 +68397,7 @@ void m68008_device::move_l_pais_adr16_if8() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68541,7 +68541,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -68607,7 +68607,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68642,7 +68642,7 @@ void m68008_device::move_l_das_adr16_if8() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68753,7 +68753,7 @@ void m68008_device::move_l_dais_adr16_if8() // 21f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -68834,7 +68834,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -68900,7 +68900,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68935,7 +68935,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69081,7 +69081,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -69147,7 +69147,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69182,7 +69182,7 @@ void m68008_device::move_l_adr16_adr16_if8() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69359,7 +69359,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -69425,7 +69425,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69460,7 +69460,7 @@ void m68008_device::move_l_adr32_adr16_if8() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69603,7 +69603,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -69669,7 +69669,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69704,7 +69704,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69814,7 +69814,7 @@ void m68008_device::move_l_dpc_adr16_if8() // 21fa ffff
void m68008_device::move_l_dpci_adr16_if8() // 21fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -69895,7 +69895,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -69961,7 +69961,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69996,7 +69996,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70175,7 +70175,7 @@ void m68008_device::move_l_imm32_adr16_if8() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70210,7 +70210,7 @@ void m68008_device::move_l_imm32_adr16_if8() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70356,7 +70356,7 @@ void m68008_device::move_l_ds_adr32_if8() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70391,7 +70391,7 @@ void m68008_device::move_l_ds_adr32_if8() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70537,7 +70537,7 @@ void m68008_device::move_l_as_adr32_if8() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70572,7 +70572,7 @@ void m68008_device::move_l_as_adr32_if8() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70685,7 +70685,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -70752,7 +70752,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -70785,7 +70785,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70819,7 +70819,7 @@ void m68008_device::move_l_ais_adr32_if8() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70931,7 +70931,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -71001,7 +71001,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -71034,7 +71034,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71068,7 +71068,7 @@ void m68008_device::move_l_aips_adr32_if8() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71179,7 +71179,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -71251,7 +71251,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -71284,7 +71284,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71318,7 +71318,7 @@ void m68008_device::move_l_pais_adr32_if8() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71461,7 +71461,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -71528,7 +71528,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -71561,7 +71561,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71595,7 +71595,7 @@ void m68008_device::move_l_das_adr32_if8() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71705,7 +71705,7 @@ void m68008_device::move_l_dais_adr32_if8() // 23f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -71786,7 +71786,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -71853,7 +71853,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -71886,7 +71886,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71920,7 +71920,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72065,7 +72065,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -72132,7 +72132,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -72165,7 +72165,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72199,7 +72199,7 @@ void m68008_device::move_l_adr16_adr32_if8() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72375,7 +72375,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -72442,7 +72442,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -72475,7 +72475,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72509,7 +72509,7 @@ void m68008_device::move_l_adr32_adr32_if8() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72651,7 +72651,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -72718,7 +72718,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -72751,7 +72751,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -72785,7 +72785,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72894,7 +72894,7 @@ void m68008_device::move_l_dpc_adr32_if8() // 23fa ffff
void m68008_device::move_l_dpci_adr32_if8() // 23fb ffff
{
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -72975,7 +72975,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -73042,7 +73042,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -73075,7 +73075,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -73109,7 +73109,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73318,7 +73318,7 @@ void m68008_device::move_l_imm32_adr32_if8() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73353,7 +73353,7 @@ void m68008_device::move_l_imm32_adr32_if8() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73470,7 +73470,7 @@ void m68008_device::move_w_ds_dd_if8() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -73523,7 +73523,7 @@ void m68008_device::move_w_as_dd_if8() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -73573,7 +73573,7 @@ void m68008_device::move_w_ais_dd_if8() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73610,7 +73610,7 @@ void m68008_device::move_w_ais_dd_if8() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73664,7 +73664,7 @@ void m68008_device::move_w_aips_dd_if8() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -73699,7 +73699,7 @@ void m68008_device::move_w_aips_dd_if8() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73755,7 +73755,7 @@ void m68008_device::move_w_pais_dd_if8() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -73790,7 +73790,7 @@ void m68008_device::move_w_pais_dd_if8() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73870,7 +73870,7 @@ void m68008_device::move_w_das_dd_if8() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -73907,7 +73907,7 @@ void m68008_device::move_w_das_dd_if8() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -73953,7 +73953,7 @@ void m68008_device::move_w_dais_dd_if8() // 3030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74035,7 +74035,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74072,7 +74072,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74153,7 +74153,7 @@ void m68008_device::move_w_adr16_dd_if8() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -74188,7 +74188,7 @@ void m68008_device::move_w_adr16_dd_if8() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74300,7 +74300,7 @@ void m68008_device::move_w_adr32_dd_if8() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -74335,7 +74335,7 @@ void m68008_device::move_w_adr32_dd_if8() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74414,7 +74414,7 @@ void m68008_device::move_w_dpc_dd_if8() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74451,7 +74451,7 @@ void m68008_device::move_w_dpc_dd_if8() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74496,7 +74496,7 @@ void m68008_device::move_w_dpci_dd_if8() // 303b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -74578,7 +74578,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -74615,7 +74615,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -74699,7 +74699,7 @@ void m68008_device::move_w_imm16_dd_if8() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -74756,7 +74756,7 @@ void m68008_device::movea_w_ds_ad_if8() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -74806,7 +74806,7 @@ void m68008_device::movea_w_as_ad_if8() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74851,7 +74851,7 @@ void m68008_device::movea_w_ais_ad_if8() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -74939,7 +74939,7 @@ void m68008_device::movea_w_aips_ad_if8() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -75027,7 +75027,7 @@ void m68008_device::movea_w_pais_ad_if8() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -75139,7 +75139,7 @@ void m68008_device::movea_w_das_ad_if8() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75219,7 +75219,7 @@ void m68008_device::movea_w_dais_ad_if8() // 3070 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75301,7 +75301,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75416,7 +75416,7 @@ void m68008_device::movea_w_adr16_ad_if8() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -75560,7 +75560,7 @@ void m68008_device::movea_w_adr32_ad_if8() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -75671,7 +75671,7 @@ void m68008_device::movea_w_dpc_ad_if8() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75750,7 +75750,7 @@ void m68008_device::movea_w_dpci_ad_if8() // 307b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -75832,7 +75832,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -75954,7 +75954,7 @@ void m68008_device::movea_w_imm16_ad_if8() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -76001,7 +76001,7 @@ void m68008_device::move_w_ds_aid_if8() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76082,7 +76082,7 @@ void m68008_device::move_w_as_aid_if8() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76160,7 +76160,7 @@ void m68008_device::move_w_ais_aid_if8() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76196,7 +76196,7 @@ void m68008_device::move_w_ais_aid_if8() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76280,7 +76280,7 @@ void m68008_device::move_w_aips_aid_if8() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -76314,7 +76314,7 @@ void m68008_device::move_w_aips_aid_if8() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76400,7 +76400,7 @@ void m68008_device::move_w_pais_aid_if8() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -76434,7 +76434,7 @@ void m68008_device::move_w_pais_aid_if8() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76544,7 +76544,7 @@ void m68008_device::move_w_das_aid_if8() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76580,7 +76580,7 @@ void m68008_device::move_w_das_aid_if8() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76656,7 +76656,7 @@ void m68008_device::move_w_dais_aid_if8() // 30b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -76738,7 +76738,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -76774,7 +76774,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -76885,7 +76885,7 @@ void m68008_device::move_w_adr16_aid_if8() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -76919,7 +76919,7 @@ void m68008_device::move_w_adr16_aid_if8() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77061,7 +77061,7 @@ void m68008_device::move_w_adr32_aid_if8() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -77095,7 +77095,7 @@ void m68008_device::move_w_adr32_aid_if8() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77204,7 +77204,7 @@ void m68008_device::move_w_dpc_aid_if8() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77240,7 +77240,7 @@ void m68008_device::move_w_dpc_aid_if8() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77315,7 +77315,7 @@ void m68008_device::move_w_dpci_aid_if8() // 30bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -77397,7 +77397,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77433,7 +77433,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77547,7 +77547,7 @@ void m68008_device::move_w_imm16_aid_if8() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77628,7 +77628,7 @@ void m68008_device::move_w_ds_aipd_if8() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77708,7 +77708,7 @@ void m68008_device::move_w_as_aipd_if8() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77785,7 +77785,7 @@ void m68008_device::move_w_ais_aipd_if8() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -77822,7 +77822,7 @@ void m68008_device::move_w_ais_aipd_if8() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77905,7 +77905,7 @@ void m68008_device::move_w_aips_aipd_if8() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -77940,7 +77940,7 @@ void m68008_device::move_w_aips_aipd_if8() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78025,7 +78025,7 @@ void m68008_device::move_w_pais_aipd_if8() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -78060,7 +78060,7 @@ void m68008_device::move_w_pais_aipd_if8() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78169,7 +78169,7 @@ void m68008_device::move_w_das_aipd_if8() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78206,7 +78206,7 @@ void m68008_device::move_w_das_aipd_if8() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78281,7 +78281,7 @@ void m68008_device::move_w_dais_aipd_if8() // 30f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -78363,7 +78363,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78400,7 +78400,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78510,7 +78510,7 @@ void m68008_device::move_w_adr16_aipd_if8() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -78545,7 +78545,7 @@ void m68008_device::move_w_adr16_aipd_if8() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78686,7 +78686,7 @@ void m68008_device::move_w_adr32_aipd_if8() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -78721,7 +78721,7 @@ void m68008_device::move_w_adr32_aipd_if8() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78829,7 +78829,7 @@ void m68008_device::move_w_dpc_aipd_if8() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -78866,7 +78866,7 @@ void m68008_device::move_w_dpc_aipd_if8() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -78940,7 +78940,7 @@ void m68008_device::move_w_dpci_aipd_if8() // 30fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79022,7 +79022,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79059,7 +79059,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -79172,7 +79172,7 @@ void m68008_device::move_w_imm16_aipd_if8() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -79251,7 +79251,7 @@ void m68008_device::move_w_ds_paid_if8() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79331,7 +79331,7 @@ void m68008_device::move_w_as_paid_if8() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79409,7 +79409,7 @@ void m68008_device::move_w_ais_paid_if8() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79445,7 +79445,7 @@ void m68008_device::move_w_ais_paid_if8() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79529,7 +79529,7 @@ void m68008_device::move_w_aips_paid_if8() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -79563,7 +79563,7 @@ void m68008_device::move_w_aips_paid_if8() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79649,7 +79649,7 @@ void m68008_device::move_w_pais_paid_if8() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -79683,7 +79683,7 @@ void m68008_device::move_w_pais_paid_if8() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79793,7 +79793,7 @@ void m68008_device::move_w_das_paid_if8() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -79829,7 +79829,7 @@ void m68008_device::move_w_das_paid_if8() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79905,7 +79905,7 @@ void m68008_device::move_w_dais_paid_if8() // 3130 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -79987,7 +79987,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80023,7 +80023,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80134,7 +80134,7 @@ void m68008_device::move_w_adr16_paid_if8() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -80168,7 +80168,7 @@ void m68008_device::move_w_adr16_paid_if8() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80310,7 +80310,7 @@ void m68008_device::move_w_adr32_paid_if8() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -80344,7 +80344,7 @@ void m68008_device::move_w_adr32_paid_if8() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80453,7 +80453,7 @@ void m68008_device::move_w_dpc_paid_if8() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80489,7 +80489,7 @@ void m68008_device::move_w_dpc_paid_if8() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80564,7 +80564,7 @@ void m68008_device::move_w_dpci_paid_if8() // 313b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -80646,7 +80646,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -80682,7 +80682,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80795,7 +80795,7 @@ void m68008_device::move_w_imm16_paid_if8() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80906,7 +80906,7 @@ void m68008_device::move_w_ds_dad_if8() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81018,7 +81018,7 @@ void m68008_device::move_w_as_dad_if8() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81097,7 +81097,7 @@ void m68008_device::move_w_ais_dad_if8() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81132,7 +81132,7 @@ void m68008_device::move_w_ais_dad_if8() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81253,7 +81253,7 @@ void m68008_device::move_w_aips_dad_if8() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -81286,7 +81286,7 @@ void m68008_device::move_w_aips_dad_if8() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81409,7 +81409,7 @@ void m68008_device::move_w_pais_dad_if8() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -81442,7 +81442,7 @@ void m68008_device::move_w_pais_dad_if8() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81589,7 +81589,7 @@ void m68008_device::move_w_das_dad_if8() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81624,7 +81624,7 @@ void m68008_device::move_w_das_dad_if8() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81737,7 +81737,7 @@ void m68008_device::move_w_dais_dad_if8() // 3170 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -81819,7 +81819,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -81854,7 +81854,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82002,7 +82002,7 @@ void m68008_device::move_w_adr16_dad_if8() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -82035,7 +82035,7 @@ void m68008_device::move_w_adr16_dad_if8() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82214,7 +82214,7 @@ void m68008_device::move_w_adr32_dad_if8() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -82247,7 +82247,7 @@ void m68008_device::move_w_adr32_dad_if8() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82393,7 +82393,7 @@ void m68008_device::move_w_dpc_dad_if8() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -82428,7 +82428,7 @@ void m68008_device::move_w_dpc_dad_if8() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82540,7 +82540,7 @@ void m68008_device::move_w_dpci_dad_if8() // 317b f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -82622,7 +82622,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -82657,7 +82657,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -82838,7 +82838,7 @@ void m68008_device::move_w_imm16_dad_if8() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82915,7 +82915,7 @@ void m68008_device::move_w_ds_daid_if8() // 3180 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = m_irdi & 7;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -82999,7 +82999,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83076,7 +83076,7 @@ void m68008_device::move_w_as_daid_if8() // 3188 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -83160,7 +83160,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83239,7 +83239,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -83271,7 +83271,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83286,7 +83286,7 @@ void m68008_device::move_w_ais_daid_if8() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83320,7 +83320,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83443,7 +83443,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -83473,7 +83473,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83488,7 +83488,7 @@ void m68008_device::move_w_aips_daid_if8() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83522,7 +83522,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83647,7 +83647,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -83677,7 +83677,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83692,7 +83692,7 @@ void m68008_device::move_w_pais_daid_if8() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83726,7 +83726,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83875,7 +83875,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -83907,7 +83907,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -83922,7 +83922,7 @@ void m68008_device::move_w_das_daid_if8() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -83956,7 +83956,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84071,7 +84071,7 @@ void m68008_device::move_w_dais_daid_if8() // 31b0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -84153,7 +84153,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -84185,7 +84185,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84200,7 +84200,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84234,7 +84234,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84384,7 +84384,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -84414,7 +84414,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84429,7 +84429,7 @@ void m68008_device::move_w_adr16_daid_if8() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84463,7 +84463,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84644,7 +84644,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -84674,7 +84674,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84689,7 +84689,7 @@ void m68008_device::move_w_adr32_daid_if8() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84723,7 +84723,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84871,7 +84871,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -84903,7 +84903,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -84918,7 +84918,7 @@ void m68008_device::move_w_dpc_daid_if8() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84952,7 +84952,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85066,7 +85066,7 @@ void m68008_device::move_w_dpci_daid_if8() // 31bb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85148,7 +85148,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -85180,7 +85180,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -85195,7 +85195,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85229,7 +85229,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85377,7 +85377,7 @@ void m68008_device::move_w_imm16_daid_if8() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -85461,7 +85461,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -85541,7 +85541,7 @@ void m68008_device::move_w_ds_adr16_if8() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85657,7 +85657,7 @@ void m68008_device::move_w_as_adr16_if8() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85771,7 +85771,7 @@ void m68008_device::move_w_ais_adr16_if8() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -85806,7 +85806,7 @@ void m68008_device::move_w_ais_adr16_if8() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -85926,7 +85926,7 @@ void m68008_device::move_w_aips_adr16_if8() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -85959,7 +85959,7 @@ void m68008_device::move_w_aips_adr16_if8() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86081,7 +86081,7 @@ void m68008_device::move_w_pais_adr16_if8() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -86114,7 +86114,7 @@ void m68008_device::move_w_pais_adr16_if8() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86260,7 +86260,7 @@ void m68008_device::move_w_das_adr16_if8() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86295,7 +86295,7 @@ void m68008_device::move_w_das_adr16_if8() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86407,7 +86407,7 @@ void m68008_device::move_w_dais_adr16_if8() // 31f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86489,7 +86489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86524,7 +86524,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86671,7 +86671,7 @@ void m68008_device::move_w_adr16_adr16_if8() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -86704,7 +86704,7 @@ void m68008_device::move_w_adr16_adr16_if8() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86882,7 +86882,7 @@ void m68008_device::move_w_adr32_adr16_if8() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -86915,7 +86915,7 @@ void m68008_device::move_w_adr32_adr16_if8() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87060,7 +87060,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87095,7 +87095,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87206,7 +87206,7 @@ void m68008_device::move_w_dpc_adr16_if8() // 31fa ffff
void m68008_device::move_w_dpci_adr16_if8() // 31fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -87288,7 +87288,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87323,7 +87323,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87472,7 +87472,7 @@ void m68008_device::move_w_imm16_adr16_if8() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87619,7 +87619,7 @@ void m68008_device::move_w_ds_adr32_if8() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87766,7 +87766,7 @@ void m68008_device::move_w_as_adr32_if8() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -87880,7 +87880,7 @@ void m68008_device::move_w_ais_adr32_if8() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87915,7 +87915,7 @@ void m68008_device::move_w_ais_adr32_if8() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88065,7 +88065,7 @@ void m68008_device::move_w_aips_adr32_if8() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -88098,7 +88098,7 @@ void m68008_device::move_w_aips_adr32_if8() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88250,7 +88250,7 @@ void m68008_device::move_w_pais_adr32_if8() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -88283,7 +88283,7 @@ void m68008_device::move_w_pais_adr32_if8() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88459,7 +88459,7 @@ void m68008_device::move_w_das_adr32_if8() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88494,7 +88494,7 @@ void m68008_device::move_w_das_adr32_if8() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88636,7 +88636,7 @@ void m68008_device::move_w_dais_adr32_if8() // 33f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88718,7 +88718,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88753,7 +88753,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -88930,7 +88930,7 @@ void m68008_device::move_w_adr16_adr32_if8() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -88963,7 +88963,7 @@ void m68008_device::move_w_adr16_adr32_if8() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89171,7 +89171,7 @@ void m68008_device::move_w_adr32_adr32_if8() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -89204,7 +89204,7 @@ void m68008_device::move_w_adr32_adr32_if8() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89379,7 +89379,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89414,7 +89414,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89555,7 +89555,7 @@ void m68008_device::move_w_dpc_adr32_if8() // 33fa ffff
void m68008_device::move_w_dpci_adr32_if8() // 33fb ffff
{
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89637,7 +89637,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89672,7 +89672,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89882,7 +89882,7 @@ void m68008_device::move_w_imm16_adr32_if8() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -89998,7 +89998,7 @@ void m68008_device::negx_b_ds_if8() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -90047,7 +90047,7 @@ void m68008_device::negx_b_ais_if8() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90068,7 +90068,7 @@ void m68008_device::negx_b_ais_if8() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90135,7 +90135,7 @@ void m68008_device::negx_b_aips_if8() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -90154,7 +90154,7 @@ void m68008_device::negx_b_aips_if8() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90223,7 +90223,7 @@ void m68008_device::negx_b_pais_if8() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -90242,7 +90242,7 @@ void m68008_device::negx_b_pais_if8() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90335,7 +90335,7 @@ void m68008_device::negx_b_das_if8() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90356,7 +90356,7 @@ void m68008_device::negx_b_das_if8() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90415,7 +90415,7 @@ void m68008_device::negx_b_dais_if8() // 4030 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -90497,7 +90497,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90518,7 +90518,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90612,7 +90612,7 @@ void m68008_device::negx_b_adr16_if8() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -90631,7 +90631,7 @@ void m68008_device::negx_b_adr16_if8() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90756,7 +90756,7 @@ void m68008_device::negx_b_adr32_if8() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -90775,7 +90775,7 @@ void m68008_device::negx_b_adr32_if8() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -90838,7 +90838,7 @@ void m68008_device::negx_w_ds_if8() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -90887,7 +90887,7 @@ void m68008_device::negx_w_ais_if8() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -90923,7 +90923,7 @@ void m68008_device::negx_w_ais_if8() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91005,7 +91005,7 @@ void m68008_device::negx_w_aips_if8() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -91039,7 +91039,7 @@ void m68008_device::negx_w_aips_if8() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91123,7 +91123,7 @@ void m68008_device::negx_w_pais_if8() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -91157,7 +91157,7 @@ void m68008_device::negx_w_pais_if8() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91265,7 +91265,7 @@ void m68008_device::negx_w_das_if8() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91301,7 +91301,7 @@ void m68008_device::negx_w_das_if8() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91375,7 +91375,7 @@ void m68008_device::negx_w_dais_if8() // 4070 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91457,7 +91457,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -91493,7 +91493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91602,7 +91602,7 @@ void m68008_device::negx_w_adr16_if8() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -91636,7 +91636,7 @@ void m68008_device::negx_w_adr16_if8() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91776,7 +91776,7 @@ void m68008_device::negx_w_adr32_if8() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -91810,7 +91810,7 @@ void m68008_device::negx_w_adr32_if8() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91888,12 +91888,12 @@ void m68008_device::negx_l_ds_if8() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91943,7 +91943,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -92010,7 +92010,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92045,7 +92045,7 @@ void m68008_device::negx_l_ais_if8() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92119,7 +92119,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -92189,7 +92189,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92224,7 +92224,7 @@ void m68008_device::negx_l_aips_if8() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92297,7 +92297,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -92369,7 +92369,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92404,7 +92404,7 @@ void m68008_device::negx_l_pais_if8() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92509,7 +92509,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -92576,7 +92576,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92611,7 +92611,7 @@ void m68008_device::negx_l_das_if8() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92683,7 +92683,7 @@ void m68008_device::negx_l_dais_if8() // 40b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -92764,7 +92764,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -92831,7 +92831,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92866,7 +92866,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -92973,7 +92973,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -93040,7 +93040,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93075,7 +93075,7 @@ void m68008_device::negx_l_adr16_if8() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -93213,7 +93213,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -93280,7 +93280,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93315,7 +93315,7 @@ void m68008_device::negx_l_adr32_if8() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -93439,7 +93439,7 @@ void m68008_device::move_sr_ais_if8() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93477,7 +93477,7 @@ void m68008_device::move_sr_ais_if8() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -93558,7 +93558,7 @@ void m68008_device::move_sr_aips_if8() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -93594,7 +93594,7 @@ void m68008_device::move_sr_aips_if8() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -93677,7 +93677,7 @@ void m68008_device::move_sr_pais_if8() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -93713,7 +93713,7 @@ void m68008_device::move_sr_pais_if8() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -93820,7 +93820,7 @@ void m68008_device::move_sr_das_if8() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -93858,7 +93858,7 @@ void m68008_device::move_sr_das_if8() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -93931,7 +93931,7 @@ void m68008_device::move_sr_dais_if8() // 40f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94013,7 +94013,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -94051,7 +94051,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -94159,7 +94159,7 @@ void m68008_device::move_sr_adr16_if8() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -94195,7 +94195,7 @@ void m68008_device::move_sr_adr16_if8() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -94334,7 +94334,7 @@ void m68008_device::move_sr_adr32_if8() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -94370,7 +94370,7 @@ void m68008_device::move_sr_adr32_if8() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -94446,7 +94446,7 @@ void m68008_device::chk_w_ds_dd_if8() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -94454,7 +94454,7 @@ void m68008_device::chk_w_ds_dd_if8() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -94472,14 +94472,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -94514,7 +94514,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -94547,7 +94547,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -94736,7 +94736,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -94770,7 +94770,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -94778,7 +94778,7 @@ void m68008_device::chk_w_ais_dd_if8() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -94796,14 +94796,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -94838,7 +94838,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -94871,7 +94871,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95066,7 +95066,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -95098,7 +95098,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95106,7 +95106,7 @@ void m68008_device::chk_w_aips_dd_if8() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95124,14 +95124,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95166,7 +95166,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95199,7 +95199,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95396,7 +95396,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -95428,7 +95428,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95436,7 +95436,7 @@ void m68008_device::chk_w_pais_dd_if8() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95454,14 +95454,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95496,7 +95496,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95529,7 +95529,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95750,7 +95750,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -95784,7 +95784,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -95792,7 +95792,7 @@ void m68008_device::chk_w_das_dd_if8() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -95810,14 +95810,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95852,7 +95852,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -95885,7 +95885,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96072,7 +96072,7 @@ void m68008_device::chk_w_dais_dd_if8() // 41b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -96154,7 +96154,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -96188,7 +96188,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96196,7 +96196,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96214,14 +96214,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96256,7 +96256,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96289,7 +96289,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96511,7 +96511,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -96543,7 +96543,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96551,7 +96551,7 @@ void m68008_device::chk_w_adr16_dd_if8() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96569,14 +96569,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96611,7 +96611,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96644,7 +96644,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96897,7 +96897,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -96929,7 +96929,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -96937,7 +96937,7 @@ void m68008_device::chk_w_adr32_dd_if8() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -96955,14 +96955,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -96997,7 +96997,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97030,7 +97030,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97250,7 +97250,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -97284,7 +97284,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -97292,7 +97292,7 @@ void m68008_device::chk_w_dpc_dd_if8() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -97310,14 +97310,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97352,7 +97352,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97385,7 +97385,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97571,7 +97571,7 @@ void m68008_device::chk_w_dpci_dd_if8() // 41bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97653,7 +97653,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -97687,7 +97687,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -97695,7 +97695,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -97713,14 +97713,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97755,7 +97755,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -97788,7 +97788,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -98010,7 +98010,7 @@ void m68008_device::chk_w_imm16_dd_if8() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -98018,7 +98018,7 @@ void m68008_device::chk_w_imm16_dd_if8() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -98036,14 +98036,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -98078,7 +98078,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -98111,7 +98111,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -98429,7 +98429,7 @@ void m68008_device::lea_dais_ad_if8() // 41f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -98824,7 +98824,7 @@ void m68008_device::lea_dpci_ad_if8() // 41fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -98957,7 +98957,7 @@ void m68008_device::clr_b_ds_if8() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -98965,7 +98965,7 @@ void m68008_device::clr_b_ds_if8() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99007,11 +99007,11 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -99029,7 +99029,7 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99066,7 +99066,7 @@ void m68008_device::clr_b_ais_if8() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99094,12 +99094,12 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -99118,7 +99118,7 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99155,7 +99155,7 @@ void m68008_device::clr_b_aips_if8() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99182,7 +99182,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -99190,7 +99190,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -99209,7 +99209,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99246,7 +99246,7 @@ void m68008_device::clr_b_pais_if8() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99271,7 +99271,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99304,11 +99304,11 @@ void m68008_device::clr_b_das_if8() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -99326,7 +99326,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99363,7 +99363,7 @@ void m68008_device::clr_b_das_if8() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99386,14 +99386,14 @@ void m68008_device::clr_b_dais_if8() // 4230 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -99401,7 +99401,7 @@ void m68008_device::clr_b_dais_if8() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99435,7 +99435,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99471,11 +99471,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -99493,7 +99493,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99530,7 +99530,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99557,7 +99557,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -99590,7 +99590,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -99609,7 +99609,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99646,7 +99646,7 @@ void m68008_device::clr_b_adr16_if8() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99671,7 +99671,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99705,7 +99705,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -99738,7 +99738,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -99757,7 +99757,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99794,7 +99794,7 @@ void m68008_device::clr_b_adr32_if8() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -99821,7 +99821,7 @@ void m68008_device::clr_w_ds_if8() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -99829,7 +99829,7 @@ void m68008_device::clr_w_ds_if8() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99871,11 +99871,11 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -99908,7 +99908,7 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99945,7 +99945,7 @@ void m68008_device::clr_w_ais_if8() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -99988,12 +99988,12 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -100027,7 +100027,7 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100064,7 +100064,7 @@ void m68008_device::clr_w_aips_if8() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100106,7 +100106,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -100114,7 +100114,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -100148,7 +100148,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100185,7 +100185,7 @@ void m68008_device::clr_w_pais_if8() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100225,7 +100225,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100258,11 +100258,11 @@ void m68008_device::clr_w_das_if8() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100295,7 +100295,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100332,7 +100332,7 @@ void m68008_device::clr_w_das_if8() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100370,14 +100370,14 @@ void m68008_device::clr_w_dais_if8() // 4270 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -100385,7 +100385,7 @@ void m68008_device::clr_w_dais_if8() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100419,7 +100419,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100455,11 +100455,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100492,7 +100492,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100529,7 +100529,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100571,7 +100571,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -100604,7 +100604,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -100638,7 +100638,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100675,7 +100675,7 @@ void m68008_device::clr_w_adr16_if8() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100715,7 +100715,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -100749,7 +100749,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -100782,7 +100782,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -100816,7 +100816,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100853,7 +100853,7 @@ void m68008_device::clr_w_adr32_if8() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -100895,12 +100895,12 @@ void m68008_device::clr_l_ds_if8() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100936,7 +100936,7 @@ void m68008_device::clr_l_ds_if8() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -100951,7 +100951,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -100986,7 +100986,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101019,7 +101019,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101054,7 +101054,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101089,7 +101089,7 @@ void m68008_device::clr_l_ais_if8() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101129,7 +101129,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -101164,11 +101164,11 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101201,7 +101201,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101236,7 +101236,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101271,7 +101271,7 @@ void m68008_device::clr_l_aips_if8() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101310,14 +101310,14 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101351,7 +101351,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101384,7 +101384,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101419,7 +101419,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101454,7 +101454,7 @@ void m68008_device::clr_l_pais_if8() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101494,7 +101494,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101526,7 +101526,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -101561,7 +101561,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101594,7 +101594,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101629,7 +101629,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101664,7 +101664,7 @@ void m68008_device::clr_l_das_if8() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101702,14 +101702,14 @@ void m68008_device::clr_l_dais_if8() // 42b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -101717,7 +101717,7 @@ void m68008_device::clr_l_dais_if8() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101751,7 +101751,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101786,7 +101786,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -101821,7 +101821,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -101854,7 +101854,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101889,7 +101889,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -101924,7 +101924,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -101966,7 +101966,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -101999,7 +101999,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -102034,7 +102034,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102067,7 +102067,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102102,7 +102102,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -102137,7 +102137,7 @@ void m68008_device::clr_l_adr16_if8() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -102177,7 +102177,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102211,7 +102211,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -102244,7 +102244,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -102279,7 +102279,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -102312,7 +102312,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102347,7 +102347,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -102382,7 +102382,7 @@ void m68008_device::clr_l_adr32_if8() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -102424,7 +102424,7 @@ void m68008_device::neg_b_ds_if8() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -102473,7 +102473,7 @@ void m68008_device::neg_b_ais_if8() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102494,7 +102494,7 @@ void m68008_device::neg_b_ais_if8() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102561,7 +102561,7 @@ void m68008_device::neg_b_aips_if8() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -102580,7 +102580,7 @@ void m68008_device::neg_b_aips_if8() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102649,7 +102649,7 @@ void m68008_device::neg_b_pais_if8() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -102668,7 +102668,7 @@ void m68008_device::neg_b_pais_if8() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102761,7 +102761,7 @@ void m68008_device::neg_b_das_if8() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102782,7 +102782,7 @@ void m68008_device::neg_b_das_if8() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102841,7 +102841,7 @@ void m68008_device::neg_b_dais_if8() // 4430 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -102923,7 +102923,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -102944,7 +102944,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103038,7 +103038,7 @@ void m68008_device::neg_b_adr16_if8() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -103057,7 +103057,7 @@ void m68008_device::neg_b_adr16_if8() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103182,7 +103182,7 @@ void m68008_device::neg_b_adr32_if8() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -103201,7 +103201,7 @@ void m68008_device::neg_b_adr32_if8() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103264,7 +103264,7 @@ void m68008_device::neg_w_ds_if8() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -103313,7 +103313,7 @@ void m68008_device::neg_w_ais_if8() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103349,7 +103349,7 @@ void m68008_device::neg_w_ais_if8() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103431,7 +103431,7 @@ void m68008_device::neg_w_aips_if8() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -103465,7 +103465,7 @@ void m68008_device::neg_w_aips_if8() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103549,7 +103549,7 @@ void m68008_device::neg_w_pais_if8() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -103583,7 +103583,7 @@ void m68008_device::neg_w_pais_if8() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103691,7 +103691,7 @@ void m68008_device::neg_w_das_if8() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103727,7 +103727,7 @@ void m68008_device::neg_w_das_if8() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103801,7 +103801,7 @@ void m68008_device::neg_w_dais_if8() // 4470 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -103883,7 +103883,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103919,7 +103919,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104028,7 +104028,7 @@ void m68008_device::neg_w_adr16_if8() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -104062,7 +104062,7 @@ void m68008_device::neg_w_adr16_if8() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104202,7 +104202,7 @@ void m68008_device::neg_w_adr32_if8() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -104236,7 +104236,7 @@ void m68008_device::neg_w_adr32_if8() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104314,12 +104314,12 @@ void m68008_device::neg_l_ds_if8() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104369,7 +104369,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -104436,7 +104436,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104471,7 +104471,7 @@ void m68008_device::neg_l_ais_if8() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104545,7 +104545,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -104615,7 +104615,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104650,7 +104650,7 @@ void m68008_device::neg_l_aips_if8() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104723,7 +104723,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -104795,7 +104795,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104830,7 +104830,7 @@ void m68008_device::neg_l_pais_if8() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -104935,7 +104935,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -105002,7 +105002,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105037,7 +105037,7 @@ void m68008_device::neg_l_das_if8() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105109,7 +105109,7 @@ void m68008_device::neg_l_dais_if8() // 44b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -105190,7 +105190,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -105257,7 +105257,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105292,7 +105292,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105399,7 +105399,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -105466,7 +105466,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105501,7 +105501,7 @@ void m68008_device::neg_l_adr16_if8() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105639,7 +105639,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -105706,7 +105706,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105741,7 +105741,7 @@ void m68008_device::neg_l_adr32_if8() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -105903,7 +105903,7 @@ void m68008_device::move_ais_ccr_if8() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106031,7 +106031,7 @@ void m68008_device::move_aips_ccr_if8() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -106159,7 +106159,7 @@ void m68008_device::move_pais_ccr_if8() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -106311,7 +106311,7 @@ void m68008_device::move_das_ccr_if8() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106431,7 +106431,7 @@ void m68008_device::move_dais_ccr_if8() // 44f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -106513,7 +106513,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -106668,7 +106668,7 @@ void m68008_device::move_adr16_ccr_if8() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -106852,7 +106852,7 @@ void m68008_device::move_adr32_ccr_if8() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -107003,7 +107003,7 @@ void m68008_device::move_dpc_ccr_if8() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107122,7 +107122,7 @@ void m68008_device::move_dpc_ccr_if8() // 44fa ffff
void m68008_device::move_dpci_ccr_if8() // 44fb ffff
{
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -107204,7 +107204,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107449,7 +107449,7 @@ void m68008_device::not_b_ds_if8() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -107498,7 +107498,7 @@ void m68008_device::not_b_ais_if8() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107519,7 +107519,7 @@ void m68008_device::not_b_ais_if8() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107586,7 +107586,7 @@ void m68008_device::not_b_aips_if8() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -107605,7 +107605,7 @@ void m68008_device::not_b_aips_if8() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107674,7 +107674,7 @@ void m68008_device::not_b_pais_if8() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -107693,7 +107693,7 @@ void m68008_device::not_b_pais_if8() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107786,7 +107786,7 @@ void m68008_device::not_b_das_if8() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107807,7 +107807,7 @@ void m68008_device::not_b_das_if8() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107866,7 +107866,7 @@ void m68008_device::not_b_dais_if8() // 4630 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -107948,7 +107948,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107969,7 +107969,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108063,7 +108063,7 @@ void m68008_device::not_b_adr16_if8() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -108082,7 +108082,7 @@ void m68008_device::not_b_adr16_if8() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108207,7 +108207,7 @@ void m68008_device::not_b_adr32_if8() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -108226,7 +108226,7 @@ void m68008_device::not_b_adr32_if8() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108289,7 +108289,7 @@ void m68008_device::not_w_ds_if8() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -108338,7 +108338,7 @@ void m68008_device::not_w_ais_if8() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108374,7 +108374,7 @@ void m68008_device::not_w_ais_if8() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108456,7 +108456,7 @@ void m68008_device::not_w_aips_if8() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -108490,7 +108490,7 @@ void m68008_device::not_w_aips_if8() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108574,7 +108574,7 @@ void m68008_device::not_w_pais_if8() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -108608,7 +108608,7 @@ void m68008_device::not_w_pais_if8() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108716,7 +108716,7 @@ void m68008_device::not_w_das_if8() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108752,7 +108752,7 @@ void m68008_device::not_w_das_if8() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -108826,7 +108826,7 @@ void m68008_device::not_w_dais_if8() // 4670 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -108908,7 +108908,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108944,7 +108944,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109053,7 +109053,7 @@ void m68008_device::not_w_adr16_if8() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -109087,7 +109087,7 @@ void m68008_device::not_w_adr16_if8() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109227,7 +109227,7 @@ void m68008_device::not_w_adr32_if8() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -109261,7 +109261,7 @@ void m68008_device::not_w_adr32_if8() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109339,12 +109339,12 @@ void m68008_device::not_l_ds_if8() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109394,7 +109394,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -109461,7 +109461,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109496,7 +109496,7 @@ void m68008_device::not_l_ais_if8() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109570,7 +109570,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -109640,7 +109640,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109675,7 +109675,7 @@ void m68008_device::not_l_aips_if8() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109748,7 +109748,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -109820,7 +109820,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -109855,7 +109855,7 @@ void m68008_device::not_l_pais_if8() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -109960,7 +109960,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -110027,7 +110027,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110062,7 +110062,7 @@ void m68008_device::not_l_das_if8() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110134,7 +110134,7 @@ void m68008_device::not_l_dais_if8() // 46b0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -110215,7 +110215,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -110282,7 +110282,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110317,7 +110317,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110424,7 +110424,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -110491,7 +110491,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110526,7 +110526,7 @@ void m68008_device::not_l_adr16_if8() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110664,7 +110664,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -110731,7 +110731,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -110766,7 +110766,7 @@ void m68008_device::not_l_adr32_if8() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -110938,7 +110938,7 @@ void m68008_device::move_ais_sr_if8() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111072,7 +111072,7 @@ void m68008_device::move_aips_sr_if8() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -111206,7 +111206,7 @@ void m68008_device::move_pais_sr_if8() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -111364,7 +111364,7 @@ void m68008_device::move_das_sr_if8() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111490,7 +111490,7 @@ void m68008_device::move_dais_sr_if8() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -111572,7 +111572,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -111733,7 +111733,7 @@ void m68008_device::move_adr16_sr_if8() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -111923,7 +111923,7 @@ void m68008_device::move_adr32_sr_if8() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -112080,7 +112080,7 @@ void m68008_device::move_dpc_sr_if8() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112205,7 +112205,7 @@ void m68008_device::move_dpci_sr_if8() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -112287,7 +112287,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112540,12 +112540,12 @@ void m68008_device::nbcd_b_ds_if8() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112593,7 +112593,7 @@ void m68008_device::nbcd_b_ais_if8() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112613,12 +112613,12 @@ void m68008_device::nbcd_b_ais_if8() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112683,7 +112683,7 @@ void m68008_device::nbcd_b_aips_if8() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -112701,12 +112701,12 @@ void m68008_device::nbcd_b_aips_if8() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112773,7 +112773,7 @@ void m68008_device::nbcd_b_pais_if8() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -112791,12 +112791,12 @@ void m68008_device::nbcd_b_pais_if8() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112887,7 +112887,7 @@ void m68008_device::nbcd_b_das_if8() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -112907,12 +112907,12 @@ void m68008_device::nbcd_b_das_if8() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -112969,7 +112969,7 @@ void m68008_device::nbcd_b_dais_if8() // 4830 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -113051,7 +113051,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -113071,12 +113071,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113168,7 +113168,7 @@ void m68008_device::nbcd_b_adr16_if8() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -113186,12 +113186,12 @@ void m68008_device::nbcd_b_adr16_if8() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113314,7 +113314,7 @@ void m68008_device::nbcd_b_adr32_if8() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -113332,12 +113332,12 @@ void m68008_device::nbcd_b_adr32_if8() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -113399,7 +113399,7 @@ void m68008_device::swap_ds_if8() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -113407,7 +113407,7 @@ void m68008_device::swap_ds_if8() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -113454,7 +113454,7 @@ void m68008_device::pea_ais_if8() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -113561,7 +113561,7 @@ void m68008_device::pea_das_if8() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -113598,7 +113598,7 @@ void m68008_device::pea_das_if8() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -113703,7 +113703,7 @@ void m68008_device::pea_dais_if8() // 4870 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -113784,7 +113784,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -114213,7 +114213,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -114250,7 +114250,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114354,7 +114354,7 @@ void m68008_device::pea_dpc_if8() // 487a ffff
void m68008_device::pea_dpci_if8() // 487b ffff
{
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -114435,7 +114435,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -114549,7 +114549,7 @@ void m68008_device::ext_w_ds_if8() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -115040,7 +115040,7 @@ void m68008_device::movem_w_list_dais_if8() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -115558,7 +115558,7 @@ void m68008_device::ext_l_ds_if8() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -116140,7 +116140,7 @@ void m68008_device::movem_l_list_dais_if8() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -116749,13 +116749,13 @@ void m68008_device::tst_b_ds_if8() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116797,11 +116797,11 @@ void m68008_device::tst_b_ais_if8() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -116819,13 +116819,13 @@ void m68008_device::tst_b_ais_if8() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116870,12 +116870,12 @@ void m68008_device::tst_b_aips_if8() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -116894,13 +116894,13 @@ void m68008_device::tst_b_aips_if8() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -116944,7 +116944,7 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -116952,7 +116952,7 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -116971,13 +116971,13 @@ void m68008_device::tst_b_pais_if8() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117019,7 +117019,7 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117052,11 +117052,11 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -117074,13 +117074,13 @@ void m68008_device::tst_b_das_if8() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117120,14 +117120,14 @@ void m68008_device::tst_b_dais_if8() // 4a30 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -117135,7 +117135,7 @@ void m68008_device::tst_b_dais_if8() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117169,7 +117169,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117205,11 +117205,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -117227,13 +117227,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117277,7 +117277,7 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117310,7 +117310,7 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -117329,13 +117329,13 @@ void m68008_device::tst_b_adr16_if8() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117377,7 +117377,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117411,7 +117411,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117444,7 +117444,7 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -117463,13 +117463,13 @@ void m68008_device::tst_b_adr32_if8() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117514,13 +117514,13 @@ void m68008_device::tst_w_ds_if8() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117562,11 +117562,11 @@ void m68008_device::tst_w_ais_if8() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117599,13 +117599,13 @@ void m68008_device::tst_w_ais_if8() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117650,12 +117650,12 @@ void m68008_device::tst_w_aips_if8() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -117689,13 +117689,13 @@ void m68008_device::tst_w_aips_if8() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117739,7 +117739,7 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -117747,7 +117747,7 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -117781,13 +117781,13 @@ void m68008_device::tst_w_pais_if8() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117829,7 +117829,7 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117862,11 +117862,11 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117899,13 +117899,13 @@ void m68008_device::tst_w_das_if8() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117945,14 +117945,14 @@ void m68008_device::tst_w_dais_if8() // 4a70 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -117960,7 +117960,7 @@ void m68008_device::tst_w_dais_if8() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -117994,7 +117994,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118030,11 +118030,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118067,13 +118067,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118117,7 +118117,7 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -118150,7 +118150,7 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118184,13 +118184,13 @@ void m68008_device::tst_w_adr16_if8() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118232,7 +118232,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118266,7 +118266,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -118299,7 +118299,7 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118333,13 +118333,13 @@ void m68008_device::tst_w_adr32_if8() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118384,13 +118384,13 @@ void m68008_device::tst_l_ds_if8() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118434,7 +118434,7 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118469,7 +118469,7 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118502,13 +118502,13 @@ void m68008_device::tst_l_ais_if8() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118552,7 +118552,7 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118587,11 +118587,11 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118624,13 +118624,13 @@ void m68008_device::tst_l_aips_if8() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118673,14 +118673,14 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118714,7 +118714,7 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118747,13 +118747,13 @@ void m68008_device::tst_l_pais_if8() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118797,7 +118797,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118829,7 +118829,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118864,7 +118864,7 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118897,13 +118897,13 @@ void m68008_device::tst_l_das_if8() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118945,14 +118945,14 @@ void m68008_device::tst_l_dais_if8() // 4ab0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -118960,7 +118960,7 @@ void m68008_device::tst_l_dais_if8() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -118994,7 +118994,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119029,7 +119029,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -119064,7 +119064,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119097,13 +119097,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119149,7 +119149,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -119182,7 +119182,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -119217,7 +119217,7 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119250,13 +119250,13 @@ void m68008_device::tst_l_adr16_if8() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119300,7 +119300,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119334,7 +119334,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -119367,7 +119367,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -119402,7 +119402,7 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119435,13 +119435,13 @@ void m68008_device::tst_l_adr32_if8() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119487,14 +119487,14 @@ void m68008_device::tas_ds_if8() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119538,11 +119538,11 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -119555,14 +119555,14 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119584,11 +119584,11 @@ void m68008_device::tas_ais_if8() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119633,12 +119633,12 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -119652,14 +119652,14 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119681,11 +119681,11 @@ void m68008_device::tas_aips_if8() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119729,7 +119729,7 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -119737,7 +119737,7 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -119751,14 +119751,14 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119780,11 +119780,11 @@ void m68008_device::tas_pais_if8() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119826,7 +119826,7 @@ void m68008_device::tas_das_if8() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119859,11 +119859,11 @@ void m68008_device::tas_das_if8() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -119876,14 +119876,14 @@ void m68008_device::tas_das_if8() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -119905,11 +119905,11 @@ void m68008_device::tas_das_if8() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119949,14 +119949,14 @@ void m68008_device::tas_dais_if8() // 4af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -119964,7 +119964,7 @@ void m68008_device::tas_dais_if8() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -119998,7 +119998,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120034,11 +120034,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -120051,14 +120051,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120080,11 +120080,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120128,7 +120128,7 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -120161,7 +120161,7 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -120175,14 +120175,14 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120204,11 +120204,11 @@ void m68008_device::tas_adr16_if8() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120250,7 +120250,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120284,7 +120284,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -120317,7 +120317,7 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -120331,14 +120331,14 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -120360,11 +120360,11 @@ void m68008_device::tas_adr32_if8() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -120940,7 +120940,7 @@ void m68008_device::movem_w_dais_list_if8() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -121018,7 +121018,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -121771,7 +121771,7 @@ void m68008_device::movem_w_dpci_list_if8() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -121849,7 +121849,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -122602,7 +122602,7 @@ void m68008_device::movem_l_dais_list_if8() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -122680,7 +122680,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -123557,7 +123557,7 @@ void m68008_device::movem_l_dpci_list_if8() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -123635,7 +123635,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -123797,14 +123797,14 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -123839,7 +123839,7 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -123872,7 +123872,7 @@ void m68008_device::trap_imm4_if8() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -124044,7 +124044,7 @@ void m68008_device::link_as_imm16_if8() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -124411,7 +124411,7 @@ void m68008_device::reset_if8() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -124531,7 +124531,7 @@ void m68008_device::stop_i16u_if8() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -124544,6 +124544,7 @@ void m68008_device::stop_i16u_if8() // 4e72 ffff
m_au = m_au - 2;
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
+ debugger_wait_hook();
return;
}
@@ -124557,7 +124558,7 @@ void m68008_device::rte_if8() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -124738,7 +124739,7 @@ void m68008_device::rts_if8() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -124929,7 +124930,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -124962,7 +124963,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -124997,7 +124998,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -125030,7 +125031,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -125200,7 +125201,7 @@ void m68008_device::rtr_if8() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -125658,7 +125659,7 @@ void m68008_device::jsr_dais_if8() // 4eb0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -126277,7 +126278,7 @@ void m68008_device::jsr_dpc_if8() // 4eba ffff
void m68008_device::jsr_dpci_if8() // 4ebb ffff
{
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -126598,7 +126599,7 @@ void m68008_device::jmp_dais_if8() // 4ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -126960,7 +126961,7 @@ void m68008_device::jmp_dpc_if8() // 4efa ffff
void m68008_device::jmp_dpci_if8() // 4efb ffff
{
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -127064,7 +127065,7 @@ void m68008_device::addq_b_imm3_ds_if8() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -127113,7 +127114,7 @@ void m68008_device::addq_b_imm3_ais_if8() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127135,7 +127136,7 @@ void m68008_device::addq_b_imm3_ais_if8() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127202,7 +127203,7 @@ void m68008_device::addq_b_imm3_aips_if8() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -127222,7 +127223,7 @@ void m68008_device::addq_b_imm3_aips_if8() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127291,7 +127292,7 @@ void m68008_device::addq_b_imm3_pais_if8() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -127311,7 +127312,7 @@ void m68008_device::addq_b_imm3_pais_if8() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127404,7 +127405,7 @@ void m68008_device::addq_b_imm3_das_if8() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127426,7 +127427,7 @@ void m68008_device::addq_b_imm3_das_if8() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127485,7 +127486,7 @@ void m68008_device::addq_b_imm3_dais_if8() // 5030 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -127567,7 +127568,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -127589,7 +127590,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127683,7 +127684,7 @@ void m68008_device::addq_b_imm3_adr16_if8() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -127703,7 +127704,7 @@ void m68008_device::addq_b_imm3_adr16_if8() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127828,7 +127829,7 @@ void m68008_device::addq_b_imm3_adr32_if8() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -127848,7 +127849,7 @@ void m68008_device::addq_b_imm3_adr32_if8() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127911,7 +127912,7 @@ void m68008_device::addq_w_imm3_ds_if8() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -127962,7 +127963,7 @@ void m68008_device::addq_w_imm3_as_if8() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -127995,7 +127996,7 @@ void m68008_device::addq_w_imm3_as_if8() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -128017,7 +128018,7 @@ void m68008_device::addq_w_imm3_ais_if8() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128054,7 +128055,7 @@ void m68008_device::addq_w_imm3_ais_if8() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128136,7 +128137,7 @@ void m68008_device::addq_w_imm3_aips_if8() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -128171,7 +128172,7 @@ void m68008_device::addq_w_imm3_aips_if8() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128255,7 +128256,7 @@ void m68008_device::addq_w_imm3_pais_if8() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -128290,7 +128291,7 @@ void m68008_device::addq_w_imm3_pais_if8() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128398,7 +128399,7 @@ void m68008_device::addq_w_imm3_das_if8() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128435,7 +128436,7 @@ void m68008_device::addq_w_imm3_das_if8() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128509,7 +128510,7 @@ void m68008_device::addq_w_imm3_dais_if8() // 5070 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -128591,7 +128592,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -128628,7 +128629,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128737,7 +128738,7 @@ void m68008_device::addq_w_imm3_adr16_if8() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -128772,7 +128773,7 @@ void m68008_device::addq_w_imm3_adr16_if8() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -128912,7 +128913,7 @@ void m68008_device::addq_w_imm3_adr32_if8() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -128947,7 +128948,7 @@ void m68008_device::addq_w_imm3_adr32_if8() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129025,7 +129026,7 @@ void m68008_device::addq_l_imm3_ds_if8() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -129059,7 +129060,7 @@ void m68008_device::addq_l_imm3_ds_if8() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -129084,7 +129085,7 @@ void m68008_device::addq_l_imm3_as_if8() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -129117,7 +129118,7 @@ void m68008_device::addq_l_imm3_as_if8() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -129139,7 +129140,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -129207,7 +129208,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129242,7 +129243,7 @@ void m68008_device::addq_l_imm3_ais_if8() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129316,7 +129317,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -129387,7 +129388,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129422,7 +129423,7 @@ void m68008_device::addq_l_imm3_aips_if8() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129495,7 +129496,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -129568,7 +129569,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129603,7 +129604,7 @@ void m68008_device::addq_l_imm3_pais_if8() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129708,7 +129709,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -129776,7 +129777,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -129811,7 +129812,7 @@ void m68008_device::addq_l_imm3_das_if8() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -129883,7 +129884,7 @@ void m68008_device::addq_l_imm3_dais_if8() // 50b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -129964,7 +129965,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -130032,7 +130033,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130067,7 +130068,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130174,7 +130175,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -130242,7 +130243,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130277,7 +130278,7 @@ void m68008_device::addq_l_imm3_adr16_if8() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130415,7 +130416,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -130483,7 +130484,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130518,7 +130519,7 @@ void m68008_device::addq_l_imm3_adr32_if8() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -130594,7 +130595,7 @@ void m68008_device::st_ds_if8() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -130606,7 +130607,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130643,7 +130644,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130678,7 +130679,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -130693,7 +130694,7 @@ void m68008_device::dbt_ds_rel16_if8() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -130705,13 +130706,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130749,7 +130750,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -130757,7 +130758,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130791,11 +130792,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130835,13 +130836,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130881,7 +130882,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130922,11 +130923,11 @@ void m68008_device::st_ais_if8() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -130944,7 +130945,7 @@ void m68008_device::st_ais_if8() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -130954,7 +130955,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -130988,7 +130989,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131026,7 +131027,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131054,12 +131055,12 @@ void m68008_device::st_aips_if8() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -131078,7 +131079,7 @@ void m68008_device::st_aips_if8() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131088,7 +131089,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131122,7 +131123,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131160,7 +131161,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131187,7 +131188,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -131195,7 +131196,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -131214,7 +131215,7 @@ void m68008_device::st_pais_if8() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131224,7 +131225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131258,7 +131259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131296,7 +131297,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131321,7 +131322,7 @@ void m68008_device::st_das_if8() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131354,11 +131355,11 @@ void m68008_device::st_das_if8() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -131376,7 +131377,7 @@ void m68008_device::st_das_if8() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131386,7 +131387,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131420,7 +131421,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131458,7 +131459,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131481,14 +131482,14 @@ void m68008_device::st_dais_if8() // 50f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -131496,7 +131497,7 @@ void m68008_device::st_dais_if8() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131530,7 +131531,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131566,11 +131567,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -131588,7 +131589,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131598,7 +131599,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131632,7 +131633,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131670,7 +131671,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131697,7 +131698,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131730,7 +131731,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -131749,7 +131750,7 @@ void m68008_device::st_adr16_if8() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131759,7 +131760,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131793,7 +131794,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131831,7 +131832,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -131856,7 +131857,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131890,7 +131891,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -131923,7 +131924,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -131942,7 +131943,7 @@ void m68008_device::st_adr32_if8() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -131952,7 +131953,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -131986,7 +131987,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -132024,7 +132025,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -132051,7 +132052,7 @@ void m68008_device::subq_b_imm3_ds_if8() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -132100,7 +132101,7 @@ void m68008_device::subq_b_imm3_ais_if8() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132122,7 +132123,7 @@ void m68008_device::subq_b_imm3_ais_if8() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132189,7 +132190,7 @@ void m68008_device::subq_b_imm3_aips_if8() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -132209,7 +132210,7 @@ void m68008_device::subq_b_imm3_aips_if8() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132278,7 +132279,7 @@ void m68008_device::subq_b_imm3_pais_if8() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -132298,7 +132299,7 @@ void m68008_device::subq_b_imm3_pais_if8() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132391,7 +132392,7 @@ void m68008_device::subq_b_imm3_das_if8() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132413,7 +132414,7 @@ void m68008_device::subq_b_imm3_das_if8() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132472,7 +132473,7 @@ void m68008_device::subq_b_imm3_dais_if8() // 5130 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -132554,7 +132555,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -132576,7 +132577,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132670,7 +132671,7 @@ void m68008_device::subq_b_imm3_adr16_if8() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -132690,7 +132691,7 @@ void m68008_device::subq_b_imm3_adr16_if8() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132815,7 +132816,7 @@ void m68008_device::subq_b_imm3_adr32_if8() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -132835,7 +132836,7 @@ void m68008_device::subq_b_imm3_adr32_if8() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -132898,7 +132899,7 @@ void m68008_device::subq_w_imm3_ds_if8() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -132949,7 +132950,7 @@ void m68008_device::subq_w_imm3_as_if8() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -132982,7 +132983,7 @@ void m68008_device::subq_w_imm3_as_if8() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -133004,7 +133005,7 @@ void m68008_device::subq_w_imm3_ais_if8() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133041,7 +133042,7 @@ void m68008_device::subq_w_imm3_ais_if8() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133123,7 +133124,7 @@ void m68008_device::subq_w_imm3_aips_if8() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -133158,7 +133159,7 @@ void m68008_device::subq_w_imm3_aips_if8() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133242,7 +133243,7 @@ void m68008_device::subq_w_imm3_pais_if8() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -133277,7 +133278,7 @@ void m68008_device::subq_w_imm3_pais_if8() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133385,7 +133386,7 @@ void m68008_device::subq_w_imm3_das_if8() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133422,7 +133423,7 @@ void m68008_device::subq_w_imm3_das_if8() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133496,7 +133497,7 @@ void m68008_device::subq_w_imm3_dais_if8() // 5170 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -133578,7 +133579,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -133615,7 +133616,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133724,7 +133725,7 @@ void m68008_device::subq_w_imm3_adr16_if8() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -133759,7 +133760,7 @@ void m68008_device::subq_w_imm3_adr16_if8() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -133899,7 +133900,7 @@ void m68008_device::subq_w_imm3_adr32_if8() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -133934,7 +133935,7 @@ void m68008_device::subq_w_imm3_adr32_if8() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134012,7 +134013,7 @@ void m68008_device::subq_l_imm3_ds_if8() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -134046,7 +134047,7 @@ void m68008_device::subq_l_imm3_ds_if8() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -134071,7 +134072,7 @@ void m68008_device::subq_l_imm3_as_if8() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -134104,7 +134105,7 @@ void m68008_device::subq_l_imm3_as_if8() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -134126,7 +134127,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -134194,7 +134195,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134229,7 +134230,7 @@ void m68008_device::subq_l_imm3_ais_if8() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134303,7 +134304,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -134374,7 +134375,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134409,7 +134410,7 @@ void m68008_device::subq_l_imm3_aips_if8() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134482,7 +134483,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -134555,7 +134556,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134590,7 +134591,7 @@ void m68008_device::subq_l_imm3_pais_if8() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134695,7 +134696,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -134763,7 +134764,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -134798,7 +134799,7 @@ void m68008_device::subq_l_imm3_das_if8() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -134870,7 +134871,7 @@ void m68008_device::subq_l_imm3_dais_if8() // 51b0 f1f8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -134951,7 +134952,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -135019,7 +135020,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135054,7 +135055,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135161,7 +135162,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -135229,7 +135230,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135264,7 +135265,7 @@ void m68008_device::subq_l_imm3_adr16_if8() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135402,7 +135403,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -135470,7 +135471,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -135505,7 +135506,7 @@ void m68008_device::subq_l_imm3_adr32_if8() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -135581,7 +135582,7 @@ void m68008_device::sf_ds_if8() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -135593,7 +135594,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135630,7 +135631,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135665,7 +135666,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -135680,7 +135681,7 @@ void m68008_device::dbra_ds_rel16_if8() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -135692,13 +135693,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135736,7 +135737,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -135744,7 +135745,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135778,11 +135779,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135822,13 +135823,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135868,7 +135869,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135909,11 +135910,11 @@ void m68008_device::sf_ais_if8() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -135931,7 +135932,7 @@ void m68008_device::sf_ais_if8() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -135941,7 +135942,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -135975,7 +135976,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136013,7 +136014,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136041,12 +136042,12 @@ void m68008_device::sf_aips_if8() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -136065,7 +136066,7 @@ void m68008_device::sf_aips_if8() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136075,7 +136076,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136109,7 +136110,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136147,7 +136148,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136174,7 +136175,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -136182,7 +136183,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -136201,7 +136202,7 @@ void m68008_device::sf_pais_if8() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136211,7 +136212,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136245,7 +136246,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136283,7 +136284,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136308,7 +136309,7 @@ void m68008_device::sf_das_if8() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136341,11 +136342,11 @@ void m68008_device::sf_das_if8() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -136363,7 +136364,7 @@ void m68008_device::sf_das_if8() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136373,7 +136374,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136407,7 +136408,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136445,7 +136446,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136468,14 +136469,14 @@ void m68008_device::sf_dais_if8() // 51f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136483,7 +136484,7 @@ void m68008_device::sf_dais_if8() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136517,7 +136518,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136553,11 +136554,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -136575,7 +136576,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136585,7 +136586,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136619,7 +136620,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136657,7 +136658,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136684,7 +136685,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136717,7 +136718,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -136736,7 +136737,7 @@ void m68008_device::sf_adr16_if8() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136746,7 +136747,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136780,7 +136781,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136818,7 +136819,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -136843,7 +136844,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136877,7 +136878,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136910,7 +136911,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -136929,7 +136930,7 @@ void m68008_device::sf_adr32_if8() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -136939,7 +136940,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -136973,7 +136974,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137011,7 +137012,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -137038,7 +137039,7 @@ void m68008_device::shi_ds_if8() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -137050,7 +137051,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137087,7 +137088,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137122,7 +137123,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -137137,7 +137138,7 @@ void m68008_device::dbhi_ds_rel16_if8() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -137149,13 +137150,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137193,7 +137194,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -137201,7 +137202,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137235,11 +137236,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137279,13 +137280,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137325,7 +137326,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137366,11 +137367,11 @@ void m68008_device::shi_ais_if8() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -137388,7 +137389,7 @@ void m68008_device::shi_ais_if8() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137398,7 +137399,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137432,7 +137433,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137470,7 +137471,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -137498,12 +137499,12 @@ void m68008_device::shi_aips_if8() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -137522,7 +137523,7 @@ void m68008_device::shi_aips_if8() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137532,7 +137533,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137566,7 +137567,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137604,7 +137605,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -137631,7 +137632,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -137639,7 +137640,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -137658,7 +137659,7 @@ void m68008_device::shi_pais_if8() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137668,7 +137669,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137702,7 +137703,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137740,7 +137741,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -137765,7 +137766,7 @@ void m68008_device::shi_das_if8() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137798,11 +137799,11 @@ void m68008_device::shi_das_if8() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -137820,7 +137821,7 @@ void m68008_device::shi_das_if8() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -137830,7 +137831,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137864,7 +137865,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137902,7 +137903,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -137925,14 +137926,14 @@ void m68008_device::shi_dais_if8() // 52f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -137940,7 +137941,7 @@ void m68008_device::shi_dais_if8() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -137974,7 +137975,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138010,11 +138011,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -138032,7 +138033,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138042,7 +138043,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138076,7 +138077,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138114,7 +138115,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -138141,7 +138142,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138174,7 +138175,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -138193,7 +138194,7 @@ void m68008_device::shi_adr16_if8() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138203,7 +138204,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138237,7 +138238,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138275,7 +138276,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -138300,7 +138301,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138334,7 +138335,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138367,7 +138368,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -138386,7 +138387,7 @@ void m68008_device::shi_adr32_if8() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138396,7 +138397,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138430,7 +138431,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138468,7 +138469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -138495,7 +138496,7 @@ void m68008_device::sls_ds_if8() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -138507,7 +138508,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138544,7 +138545,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138579,7 +138580,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -138594,7 +138595,7 @@ void m68008_device::dbls_ds_rel16_if8() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -138606,13 +138607,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138650,7 +138651,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -138658,7 +138659,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138692,11 +138693,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138736,13 +138737,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138782,7 +138783,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138823,11 +138824,11 @@ void m68008_device::sls_ais_if8() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -138845,7 +138846,7 @@ void m68008_device::sls_ais_if8() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138855,7 +138856,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -138889,7 +138890,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138927,7 +138928,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -138955,12 +138956,12 @@ void m68008_device::sls_aips_if8() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -138979,7 +138980,7 @@ void m68008_device::sls_aips_if8() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -138989,7 +138990,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139023,7 +139024,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139061,7 +139062,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139088,7 +139089,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -139096,7 +139097,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -139115,7 +139116,7 @@ void m68008_device::sls_pais_if8() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139125,7 +139126,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139159,7 +139160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139197,7 +139198,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139222,7 +139223,7 @@ void m68008_device::sls_das_if8() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139255,11 +139256,11 @@ void m68008_device::sls_das_if8() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -139277,7 +139278,7 @@ void m68008_device::sls_das_if8() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139287,7 +139288,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139321,7 +139322,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139359,7 +139360,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139382,14 +139383,14 @@ void m68008_device::sls_dais_if8() // 53f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -139397,7 +139398,7 @@ void m68008_device::sls_dais_if8() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139431,7 +139432,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139467,11 +139468,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -139489,7 +139490,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139499,7 +139500,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139533,7 +139534,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139571,7 +139572,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139598,7 +139599,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139631,7 +139632,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -139650,7 +139651,7 @@ void m68008_device::sls_adr16_if8() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139660,7 +139661,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139694,7 +139695,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139732,7 +139733,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139757,7 +139758,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139791,7 +139792,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139824,7 +139825,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -139843,7 +139844,7 @@ void m68008_device::sls_adr32_if8() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -139853,7 +139854,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -139887,7 +139888,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139925,7 +139926,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -139952,7 +139953,7 @@ void m68008_device::scc_ds_if8() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -139964,7 +139965,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140001,7 +140002,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140036,7 +140037,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -140051,7 +140052,7 @@ void m68008_device::dbcc_ds_rel16_if8() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -140063,13 +140064,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140107,7 +140108,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -140115,7 +140116,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140149,11 +140150,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140193,13 +140194,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140239,7 +140240,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140280,11 +140281,11 @@ void m68008_device::scc_ais_if8() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -140302,7 +140303,7 @@ void m68008_device::scc_ais_if8() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140312,7 +140313,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140346,7 +140347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140384,7 +140385,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -140412,12 +140413,12 @@ void m68008_device::scc_aips_if8() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -140436,7 +140437,7 @@ void m68008_device::scc_aips_if8() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140446,7 +140447,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140480,7 +140481,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140518,7 +140519,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -140545,7 +140546,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -140553,7 +140554,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -140572,7 +140573,7 @@ void m68008_device::scc_pais_if8() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140582,7 +140583,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140616,7 +140617,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140654,7 +140655,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -140679,7 +140680,7 @@ void m68008_device::scc_das_if8() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140712,11 +140713,11 @@ void m68008_device::scc_das_if8() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -140734,7 +140735,7 @@ void m68008_device::scc_das_if8() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140744,7 +140745,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140778,7 +140779,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -140816,7 +140817,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -140839,14 +140840,14 @@ void m68008_device::scc_dais_if8() // 54f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -140854,7 +140855,7 @@ void m68008_device::scc_dais_if8() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140888,7 +140889,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140924,11 +140925,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -140946,7 +140947,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -140956,7 +140957,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -140990,7 +140991,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141028,7 +141029,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -141055,7 +141056,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141088,7 +141089,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -141107,7 +141108,7 @@ void m68008_device::scc_adr16_if8() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141117,7 +141118,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141151,7 +141152,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141189,7 +141190,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -141214,7 +141215,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141248,7 +141249,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141281,7 +141282,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -141300,7 +141301,7 @@ void m68008_device::scc_adr32_if8() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141310,7 +141311,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141344,7 +141345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141382,7 +141383,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -141409,7 +141410,7 @@ void m68008_device::scs_ds_if8() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -141421,7 +141422,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141458,7 +141459,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141493,7 +141494,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -141508,7 +141509,7 @@ void m68008_device::dbcs_ds_rel16_if8() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -141520,13 +141521,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141564,7 +141565,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -141572,7 +141573,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141606,11 +141607,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141650,13 +141651,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141696,7 +141697,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141737,11 +141738,11 @@ void m68008_device::scs_ais_if8() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -141759,7 +141760,7 @@ void m68008_device::scs_ais_if8() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141769,7 +141770,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141803,7 +141804,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141841,7 +141842,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -141869,12 +141870,12 @@ void m68008_device::scs_aips_if8() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -141893,7 +141894,7 @@ void m68008_device::scs_aips_if8() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -141903,7 +141904,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -141937,7 +141938,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -141975,7 +141976,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142002,7 +142003,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -142010,7 +142011,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -142029,7 +142030,7 @@ void m68008_device::scs_pais_if8() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142039,7 +142040,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142073,7 +142074,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142111,7 +142112,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142136,7 +142137,7 @@ void m68008_device::scs_das_if8() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142169,11 +142170,11 @@ void m68008_device::scs_das_if8() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -142191,7 +142192,7 @@ void m68008_device::scs_das_if8() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142201,7 +142202,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142235,7 +142236,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142273,7 +142274,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142296,14 +142297,14 @@ void m68008_device::scs_dais_if8() // 55f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -142311,7 +142312,7 @@ void m68008_device::scs_dais_if8() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142345,7 +142346,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142381,11 +142382,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -142403,7 +142404,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142413,7 +142414,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142447,7 +142448,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142485,7 +142486,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142512,7 +142513,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142545,7 +142546,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -142564,7 +142565,7 @@ void m68008_device::scs_adr16_if8() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142574,7 +142575,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142608,7 +142609,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142646,7 +142647,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142671,7 +142672,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142705,7 +142706,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142738,7 +142739,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -142757,7 +142758,7 @@ void m68008_device::scs_adr32_if8() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -142767,7 +142768,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142801,7 +142802,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142839,7 +142840,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -142866,7 +142867,7 @@ void m68008_device::sne_ds_if8() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -142878,7 +142879,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -142915,7 +142916,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -142950,7 +142951,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -142965,7 +142966,7 @@ void m68008_device::dbne_ds_rel16_if8() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -142977,13 +142978,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143021,7 +143022,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -143029,7 +143030,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143063,11 +143064,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143107,13 +143108,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143153,7 +143154,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143194,11 +143195,11 @@ void m68008_device::sne_ais_if8() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -143216,7 +143217,7 @@ void m68008_device::sne_ais_if8() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143226,7 +143227,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143260,7 +143261,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143298,7 +143299,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -143326,12 +143327,12 @@ void m68008_device::sne_aips_if8() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -143350,7 +143351,7 @@ void m68008_device::sne_aips_if8() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143360,7 +143361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143394,7 +143395,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143432,7 +143433,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -143459,7 +143460,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -143467,7 +143468,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -143486,7 +143487,7 @@ void m68008_device::sne_pais_if8() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143496,7 +143497,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143530,7 +143531,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143568,7 +143569,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -143593,7 +143594,7 @@ void m68008_device::sne_das_if8() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143626,11 +143627,11 @@ void m68008_device::sne_das_if8() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -143648,7 +143649,7 @@ void m68008_device::sne_das_if8() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143658,7 +143659,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143692,7 +143693,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143730,7 +143731,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -143753,14 +143754,14 @@ void m68008_device::sne_dais_if8() // 56f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -143768,7 +143769,7 @@ void m68008_device::sne_dais_if8() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143802,7 +143803,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143838,11 +143839,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -143860,7 +143861,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -143870,7 +143871,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -143904,7 +143905,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -143942,7 +143943,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -143969,7 +143970,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144002,7 +144003,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -144021,7 +144022,7 @@ void m68008_device::sne_adr16_if8() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144031,7 +144032,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144065,7 +144066,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144103,7 +144104,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -144128,7 +144129,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144162,7 +144163,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144195,7 +144196,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -144214,7 +144215,7 @@ void m68008_device::sne_adr32_if8() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144224,7 +144225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144258,7 +144259,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144296,7 +144297,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -144323,7 +144324,7 @@ void m68008_device::seq_ds_if8() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -144335,7 +144336,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144372,7 +144373,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144407,7 +144408,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -144422,7 +144423,7 @@ void m68008_device::dbeq_ds_rel16_if8() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -144434,13 +144435,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144478,7 +144479,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -144486,7 +144487,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144520,11 +144521,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144564,13 +144565,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144610,7 +144611,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144651,11 +144652,11 @@ void m68008_device::seq_ais_if8() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -144673,7 +144674,7 @@ void m68008_device::seq_ais_if8() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144683,7 +144684,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144717,7 +144718,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144755,7 +144756,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -144783,12 +144784,12 @@ void m68008_device::seq_aips_if8() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -144807,7 +144808,7 @@ void m68008_device::seq_aips_if8() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144817,7 +144818,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144851,7 +144852,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -144889,7 +144890,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -144916,7 +144917,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -144924,7 +144925,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -144943,7 +144944,7 @@ void m68008_device::seq_pais_if8() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -144953,7 +144954,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -144987,7 +144988,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145025,7 +145026,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -145050,7 +145051,7 @@ void m68008_device::seq_das_if8() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145083,11 +145084,11 @@ void m68008_device::seq_das_if8() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -145105,7 +145106,7 @@ void m68008_device::seq_das_if8() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145115,7 +145116,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145149,7 +145150,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145187,7 +145188,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -145210,14 +145211,14 @@ void m68008_device::seq_dais_if8() // 57f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -145225,7 +145226,7 @@ void m68008_device::seq_dais_if8() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145259,7 +145260,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145295,11 +145296,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -145317,7 +145318,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145327,7 +145328,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145361,7 +145362,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145399,7 +145400,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -145426,7 +145427,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145459,7 +145460,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -145478,7 +145479,7 @@ void m68008_device::seq_adr16_if8() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145488,7 +145489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145522,7 +145523,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145560,7 +145561,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -145585,7 +145586,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145619,7 +145620,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145652,7 +145653,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -145671,7 +145672,7 @@ void m68008_device::seq_adr32_if8() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -145681,7 +145682,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145715,7 +145716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145753,7 +145754,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -145780,7 +145781,7 @@ void m68008_device::svc_ds_if8() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -145792,7 +145793,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145829,7 +145830,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145864,7 +145865,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -145879,7 +145880,7 @@ void m68008_device::dbvc_ds_rel16_if8() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -145891,13 +145892,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -145935,7 +145936,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -145943,7 +145944,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -145977,11 +145978,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146021,13 +146022,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146067,7 +146068,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146108,11 +146109,11 @@ void m68008_device::svc_ais_if8() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -146130,7 +146131,7 @@ void m68008_device::svc_ais_if8() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146140,7 +146141,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146174,7 +146175,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146212,7 +146213,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -146240,12 +146241,12 @@ void m68008_device::svc_aips_if8() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -146264,7 +146265,7 @@ void m68008_device::svc_aips_if8() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146274,7 +146275,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146308,7 +146309,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146346,7 +146347,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -146373,7 +146374,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -146381,7 +146382,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -146400,7 +146401,7 @@ void m68008_device::svc_pais_if8() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146410,7 +146411,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146444,7 +146445,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146482,7 +146483,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -146507,7 +146508,7 @@ void m68008_device::svc_das_if8() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146540,11 +146541,11 @@ void m68008_device::svc_das_if8() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -146562,7 +146563,7 @@ void m68008_device::svc_das_if8() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146572,7 +146573,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146606,7 +146607,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146644,7 +146645,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -146667,14 +146668,14 @@ void m68008_device::svc_dais_if8() // 58f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -146682,7 +146683,7 @@ void m68008_device::svc_dais_if8() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146716,7 +146717,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146752,11 +146753,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -146774,7 +146775,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146784,7 +146785,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146818,7 +146819,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146856,7 +146857,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -146883,7 +146884,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -146916,7 +146917,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -146935,7 +146936,7 @@ void m68008_device::svc_adr16_if8() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -146945,7 +146946,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -146979,7 +146980,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147017,7 +147018,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -147042,7 +147043,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147076,7 +147077,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147109,7 +147110,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -147128,7 +147129,7 @@ void m68008_device::svc_adr32_if8() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147138,7 +147139,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147172,7 +147173,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147210,7 +147211,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -147237,7 +147238,7 @@ void m68008_device::svs_ds_if8() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -147249,7 +147250,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147286,7 +147287,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147321,7 +147322,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -147336,7 +147337,7 @@ void m68008_device::dbvs_ds_rel16_if8() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -147348,13 +147349,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147392,7 +147393,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -147400,7 +147401,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147434,11 +147435,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147478,13 +147479,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147524,7 +147525,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147565,11 +147566,11 @@ void m68008_device::svs_ais_if8() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -147587,7 +147588,7 @@ void m68008_device::svs_ais_if8() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147597,7 +147598,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147631,7 +147632,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147669,7 +147670,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -147697,12 +147698,12 @@ void m68008_device::svs_aips_if8() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -147721,7 +147722,7 @@ void m68008_device::svs_aips_if8() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147731,7 +147732,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147765,7 +147766,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147803,7 +147804,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -147830,7 +147831,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -147838,7 +147839,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -147857,7 +147858,7 @@ void m68008_device::svs_pais_if8() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -147867,7 +147868,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147901,7 +147902,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -147939,7 +147940,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -147964,7 +147965,7 @@ void m68008_device::svs_das_if8() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -147997,11 +147998,11 @@ void m68008_device::svs_das_if8() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -148019,7 +148020,7 @@ void m68008_device::svs_das_if8() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148029,7 +148030,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148063,7 +148064,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148101,7 +148102,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -148124,14 +148125,14 @@ void m68008_device::svs_dais_if8() // 59f0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -148139,7 +148140,7 @@ void m68008_device::svs_dais_if8() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148173,7 +148174,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148209,11 +148210,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -148231,7 +148232,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148241,7 +148242,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148275,7 +148276,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148313,7 +148314,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -148340,7 +148341,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148373,7 +148374,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -148392,7 +148393,7 @@ void m68008_device::svs_adr16_if8() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148402,7 +148403,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148436,7 +148437,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148474,7 +148475,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -148499,7 +148500,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148533,7 +148534,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148566,7 +148567,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -148585,7 +148586,7 @@ void m68008_device::svs_adr32_if8() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -148595,7 +148596,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148629,7 +148630,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148667,7 +148668,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -148694,7 +148695,7 @@ void m68008_device::spl_ds_if8() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -148706,7 +148707,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148743,7 +148744,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148778,7 +148779,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -148793,7 +148794,7 @@ void m68008_device::dbpl_ds_rel16_if8() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -148805,13 +148806,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -148849,7 +148850,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -148857,7 +148858,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148891,11 +148892,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148935,13 +148936,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -148981,7 +148982,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149022,11 +149023,11 @@ void m68008_device::spl_ais_if8() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -149044,7 +149045,7 @@ void m68008_device::spl_ais_if8() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149054,7 +149055,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149088,7 +149089,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149126,7 +149127,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149154,12 +149155,12 @@ void m68008_device::spl_aips_if8() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -149178,7 +149179,7 @@ void m68008_device::spl_aips_if8() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149188,7 +149189,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149222,7 +149223,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149260,7 +149261,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149287,7 +149288,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -149295,7 +149296,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -149314,7 +149315,7 @@ void m68008_device::spl_pais_if8() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149324,7 +149325,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149358,7 +149359,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149396,7 +149397,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149421,7 +149422,7 @@ void m68008_device::spl_das_if8() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149454,11 +149455,11 @@ void m68008_device::spl_das_if8() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -149476,7 +149477,7 @@ void m68008_device::spl_das_if8() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149486,7 +149487,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149520,7 +149521,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149558,7 +149559,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149581,14 +149582,14 @@ void m68008_device::spl_dais_if8() // 5af0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -149596,7 +149597,7 @@ void m68008_device::spl_dais_if8() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149630,7 +149631,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149666,11 +149667,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -149688,7 +149689,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149698,7 +149699,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149732,7 +149733,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149770,7 +149771,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149797,7 +149798,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149830,7 +149831,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -149849,7 +149850,7 @@ void m68008_device::spl_adr16_if8() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -149859,7 +149860,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149893,7 +149894,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -149931,7 +149932,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -149956,7 +149957,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -149990,7 +149991,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150023,7 +150024,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -150042,7 +150043,7 @@ void m68008_device::spl_adr32_if8() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150052,7 +150053,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150086,7 +150087,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150124,7 +150125,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -150151,7 +150152,7 @@ void m68008_device::smi_ds_if8() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -150163,7 +150164,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150200,7 +150201,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150235,7 +150236,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -150250,7 +150251,7 @@ void m68008_device::dbmi_ds_rel16_if8() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -150262,13 +150263,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150306,7 +150307,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -150314,7 +150315,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150348,11 +150349,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150392,13 +150393,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150438,7 +150439,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150479,11 +150480,11 @@ void m68008_device::smi_ais_if8() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -150501,7 +150502,7 @@ void m68008_device::smi_ais_if8() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150511,7 +150512,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150545,7 +150546,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150583,7 +150584,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -150611,12 +150612,12 @@ void m68008_device::smi_aips_if8() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -150635,7 +150636,7 @@ void m68008_device::smi_aips_if8() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150645,7 +150646,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150679,7 +150680,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150717,7 +150718,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -150744,7 +150745,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -150752,7 +150753,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -150771,7 +150772,7 @@ void m68008_device::smi_pais_if8() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150781,7 +150782,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150815,7 +150816,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150853,7 +150854,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -150878,7 +150879,7 @@ void m68008_device::smi_das_if8() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150911,11 +150912,11 @@ void m68008_device::smi_das_if8() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -150933,7 +150934,7 @@ void m68008_device::smi_das_if8() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -150943,7 +150944,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -150977,7 +150978,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151015,7 +151016,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -151038,14 +151039,14 @@ void m68008_device::smi_dais_if8() // 5bf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -151053,7 +151054,7 @@ void m68008_device::smi_dais_if8() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151087,7 +151088,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151123,11 +151124,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -151145,7 +151146,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151155,7 +151156,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151189,7 +151190,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151227,7 +151228,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -151254,7 +151255,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151287,7 +151288,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -151306,7 +151307,7 @@ void m68008_device::smi_adr16_if8() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151316,7 +151317,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151350,7 +151351,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151388,7 +151389,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -151413,7 +151414,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151447,7 +151448,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151480,7 +151481,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -151499,7 +151500,7 @@ void m68008_device::smi_adr32_if8() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151509,7 +151510,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151543,7 +151544,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151581,7 +151582,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -151608,7 +151609,7 @@ void m68008_device::sge_ds_if8() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -151620,7 +151621,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151657,7 +151658,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151692,7 +151693,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -151707,7 +151708,7 @@ void m68008_device::dbge_ds_rel16_if8() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -151719,13 +151720,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151763,7 +151764,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -151771,7 +151772,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151805,11 +151806,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151849,13 +151850,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151895,7 +151896,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -151936,11 +151937,11 @@ void m68008_device::sge_ais_if8() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -151958,7 +151959,7 @@ void m68008_device::sge_ais_if8() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151968,7 +151969,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152002,7 +152003,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152040,7 +152041,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152068,12 +152069,12 @@ void m68008_device::sge_aips_if8() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -152092,7 +152093,7 @@ void m68008_device::sge_aips_if8() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152102,7 +152103,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152136,7 +152137,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152174,7 +152175,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152201,7 +152202,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -152209,7 +152210,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -152228,7 +152229,7 @@ void m68008_device::sge_pais_if8() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152238,7 +152239,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152272,7 +152273,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152310,7 +152311,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152335,7 +152336,7 @@ void m68008_device::sge_das_if8() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152368,11 +152369,11 @@ void m68008_device::sge_das_if8() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -152390,7 +152391,7 @@ void m68008_device::sge_das_if8() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152400,7 +152401,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152434,7 +152435,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152472,7 +152473,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152495,14 +152496,14 @@ void m68008_device::sge_dais_if8() // 5cf0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -152510,7 +152511,7 @@ void m68008_device::sge_dais_if8() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152544,7 +152545,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152580,11 +152581,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -152602,7 +152603,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152612,7 +152613,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152646,7 +152647,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152684,7 +152685,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152711,7 +152712,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152744,7 +152745,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -152763,7 +152764,7 @@ void m68008_device::sge_adr16_if8() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152773,7 +152774,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152807,7 +152808,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152845,7 +152846,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -152870,7 +152871,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -152904,7 +152905,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152937,7 +152938,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -152956,7 +152957,7 @@ void m68008_device::sge_adr32_if8() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152966,7 +152967,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153000,7 +153001,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153038,7 +153039,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -153065,7 +153066,7 @@ void m68008_device::slt_ds_if8() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -153077,7 +153078,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153114,7 +153115,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153149,7 +153150,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -153164,7 +153165,7 @@ void m68008_device::dblt_ds_rel16_if8() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -153176,13 +153177,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153220,7 +153221,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -153228,7 +153229,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153262,11 +153263,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153306,13 +153307,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153352,7 +153353,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153393,11 +153394,11 @@ void m68008_device::slt_ais_if8() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -153415,7 +153416,7 @@ void m68008_device::slt_ais_if8() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153425,7 +153426,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153459,7 +153460,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153497,7 +153498,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -153525,12 +153526,12 @@ void m68008_device::slt_aips_if8() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -153549,7 +153550,7 @@ void m68008_device::slt_aips_if8() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153559,7 +153560,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153593,7 +153594,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153631,7 +153632,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -153658,7 +153659,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -153666,7 +153667,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -153685,7 +153686,7 @@ void m68008_device::slt_pais_if8() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153695,7 +153696,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153729,7 +153730,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153767,7 +153768,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -153792,7 +153793,7 @@ void m68008_device::slt_das_if8() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153825,11 +153826,11 @@ void m68008_device::slt_das_if8() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -153847,7 +153848,7 @@ void m68008_device::slt_das_if8() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -153857,7 +153858,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -153891,7 +153892,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -153929,7 +153930,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -153952,14 +153953,14 @@ void m68008_device::slt_dais_if8() // 5df0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -153967,7 +153968,7 @@ void m68008_device::slt_dais_if8() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154001,7 +154002,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154037,11 +154038,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -154059,7 +154060,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154069,7 +154070,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154103,7 +154104,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154141,7 +154142,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -154168,7 +154169,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154201,7 +154202,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -154220,7 +154221,7 @@ void m68008_device::slt_adr16_if8() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154230,7 +154231,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154264,7 +154265,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154302,7 +154303,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -154327,7 +154328,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154361,7 +154362,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154394,7 +154395,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -154413,7 +154414,7 @@ void m68008_device::slt_adr32_if8() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154423,7 +154424,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154457,7 +154458,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154495,7 +154496,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -154522,7 +154523,7 @@ void m68008_device::sgt_ds_if8() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -154534,7 +154535,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154571,7 +154572,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154606,7 +154607,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -154621,7 +154622,7 @@ void m68008_device::dbgt_ds_rel16_if8() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -154633,13 +154634,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154677,7 +154678,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -154685,7 +154686,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154719,11 +154720,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154763,13 +154764,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154809,7 +154810,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154850,11 +154851,11 @@ void m68008_device::sgt_ais_if8() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -154872,7 +154873,7 @@ void m68008_device::sgt_ais_if8() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -154882,7 +154883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -154916,7 +154917,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -154954,7 +154955,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -154982,12 +154983,12 @@ void m68008_device::sgt_aips_if8() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -155006,7 +155007,7 @@ void m68008_device::sgt_aips_if8() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155016,7 +155017,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155050,7 +155051,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155088,7 +155089,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155115,7 +155116,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -155123,7 +155124,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -155142,7 +155143,7 @@ void m68008_device::sgt_pais_if8() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155152,7 +155153,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155186,7 +155187,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155224,7 +155225,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155249,7 +155250,7 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155282,11 +155283,11 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -155304,7 +155305,7 @@ void m68008_device::sgt_das_if8() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155314,7 +155315,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155348,7 +155349,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155386,7 +155387,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155409,14 +155410,14 @@ void m68008_device::sgt_dais_if8() // 5ef0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -155424,7 +155425,7 @@ void m68008_device::sgt_dais_if8() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155458,7 +155459,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155494,11 +155495,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -155516,7 +155517,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155526,7 +155527,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155560,7 +155561,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155598,7 +155599,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155625,7 +155626,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155658,7 +155659,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -155677,7 +155678,7 @@ void m68008_device::sgt_adr16_if8() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155687,7 +155688,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155721,7 +155722,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155759,7 +155760,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155784,7 +155785,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155818,7 +155819,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155851,7 +155852,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -155870,7 +155871,7 @@ void m68008_device::sgt_adr32_if8() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -155880,7 +155881,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -155914,7 +155915,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -155952,7 +155953,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -155979,7 +155980,7 @@ void m68008_device::sle_ds_if8() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -155991,7 +155992,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156028,7 +156029,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156063,7 +156064,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -156078,7 +156079,7 @@ void m68008_device::dble_ds_rel16_if8() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -156090,13 +156091,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156134,7 +156135,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -156142,7 +156143,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156176,11 +156177,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156220,13 +156221,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156266,7 +156267,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156307,11 +156308,11 @@ void m68008_device::sle_ais_if8() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -156329,7 +156330,7 @@ void m68008_device::sle_ais_if8() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156339,7 +156340,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156373,7 +156374,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156411,7 +156412,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -156439,12 +156440,12 @@ void m68008_device::sle_aips_if8() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -156463,7 +156464,7 @@ void m68008_device::sle_aips_if8() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156473,7 +156474,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156507,7 +156508,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156545,7 +156546,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -156572,7 +156573,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -156580,7 +156581,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -156599,7 +156600,7 @@ void m68008_device::sle_pais_if8() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156609,7 +156610,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156643,7 +156644,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156681,7 +156682,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -156706,7 +156707,7 @@ void m68008_device::sle_das_if8() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156739,11 +156740,11 @@ void m68008_device::sle_das_if8() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -156761,7 +156762,7 @@ void m68008_device::sle_das_if8() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156771,7 +156772,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156805,7 +156806,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156843,7 +156844,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -156866,14 +156867,14 @@ void m68008_device::sle_dais_if8() // 5ff0 fff8
{
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -156881,7 +156882,7 @@ void m68008_device::sle_dais_if8() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156915,7 +156916,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -156951,11 +156952,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -156973,7 +156974,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156983,7 +156984,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157017,7 +157018,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157055,7 +157056,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -157082,7 +157083,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157115,7 +157116,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -157134,7 +157135,7 @@ void m68008_device::sle_adr16_if8() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157144,7 +157145,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157178,7 +157179,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157216,7 +157217,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -157241,7 +157242,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157275,7 +157276,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157308,7 +157309,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -157327,7 +157328,7 @@ void m68008_device::sle_adr32_if8() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157337,7 +157338,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -157371,7 +157372,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157409,7 +157410,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -157660,7 +157661,7 @@ void m68008_device::bsr_rel16_if8() // 6100 ffff
{
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -157807,7 +157808,7 @@ void m68008_device::bsr_rel8_if8() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -161149,7 +161150,7 @@ void m68008_device::moveq_imm8o_dd_if8() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -161199,7 +161200,7 @@ void m68008_device::or_b_ds_dd_if8() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161207,7 +161208,7 @@ void m68008_device::or_b_ds_dd_if8() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161250,11 +161251,11 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -161272,7 +161273,7 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161280,7 +161281,7 @@ void m68008_device::or_b_ais_dd_if8() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161326,12 +161327,12 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -161350,7 +161351,7 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161358,7 +161359,7 @@ void m68008_device::or_b_aips_dd_if8() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161403,7 +161404,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -161411,7 +161412,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -161430,7 +161431,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161438,7 +161439,7 @@ void m68008_device::or_b_pais_dd_if8() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161481,7 +161482,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161514,11 +161515,11 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -161536,7 +161537,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161544,7 +161545,7 @@ void m68008_device::or_b_das_dd_if8() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161585,14 +161586,14 @@ void m68008_device::or_b_dais_dd_if8() // 8030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -161600,7 +161601,7 @@ void m68008_device::or_b_dais_dd_if8() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161634,7 +161635,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161670,11 +161671,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -161692,7 +161693,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161700,7 +161701,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161745,7 +161746,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161778,7 +161779,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -161797,7 +161798,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161805,7 +161806,7 @@ void m68008_device::or_b_adr16_dd_if8() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161848,7 +161849,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161882,7 +161883,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161915,7 +161916,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -161934,7 +161935,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -161942,7 +161943,7 @@ void m68008_device::or_b_adr32_dd_if8() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -161984,7 +161985,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162017,11 +162018,11 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -162039,7 +162040,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162047,7 +162048,7 @@ void m68008_device::or_b_dpc_dd_if8() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162087,14 +162088,14 @@ void m68008_device::or_b_dpci_dd_if8() // 803b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162102,7 +162103,7 @@ void m68008_device::or_b_dpci_dd_if8() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162136,7 +162137,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162172,11 +162173,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -162194,7 +162195,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162202,7 +162203,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162247,7 +162248,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162281,7 +162282,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162289,7 +162290,7 @@ void m68008_device::or_b_imm8_dd_if8() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162334,7 +162335,7 @@ void m68008_device::or_w_ds_dd_if8() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162342,7 +162343,7 @@ void m68008_device::or_w_ds_dd_if8() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162385,11 +162386,11 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162422,7 +162423,7 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162430,7 +162431,7 @@ void m68008_device::or_w_ais_dd_if8() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162476,12 +162477,12 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -162515,7 +162516,7 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162523,7 +162524,7 @@ void m68008_device::or_w_aips_dd_if8() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162568,7 +162569,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162576,7 +162577,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -162610,7 +162611,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162618,7 +162619,7 @@ void m68008_device::or_w_pais_dd_if8() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162661,7 +162662,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162694,11 +162695,11 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162731,7 +162732,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162739,7 +162740,7 @@ void m68008_device::or_w_das_dd_if8() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162780,14 +162781,14 @@ void m68008_device::or_w_dais_dd_if8() // 8070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162795,7 +162796,7 @@ void m68008_device::or_w_dais_dd_if8() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162829,7 +162830,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162865,11 +162866,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162902,7 +162903,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -162910,7 +162911,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -162955,7 +162956,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162988,7 +162989,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -163022,7 +163023,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163030,7 +163031,7 @@ void m68008_device::or_w_adr16_dd_if8() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163073,7 +163074,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163107,7 +163108,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163140,7 +163141,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -163174,7 +163175,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163182,7 +163183,7 @@ void m68008_device::or_w_adr32_dd_if8() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163224,7 +163225,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163257,11 +163258,11 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163294,7 +163295,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163302,7 +163303,7 @@ void m68008_device::or_w_dpc_dd_if8() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163342,14 +163343,14 @@ void m68008_device::or_w_dpci_dd_if8() // 807b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -163357,7 +163358,7 @@ void m68008_device::or_w_dpci_dd_if8() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163391,7 +163392,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163427,11 +163428,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163464,7 +163465,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163472,7 +163473,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163517,7 +163518,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163551,7 +163552,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -163559,7 +163560,7 @@ void m68008_device::or_w_imm16_dd_if8() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163604,12 +163605,12 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163639,7 +163640,7 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -163648,7 +163649,7 @@ void m68008_device::or_l_ds_dd_if8() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163664,7 +163665,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -163699,7 +163700,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163732,12 +163733,12 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163773,7 +163774,7 @@ void m68008_device::or_l_ais_dd_if8() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163789,7 +163790,7 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -163824,11 +163825,11 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163861,12 +163862,12 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -163902,7 +163903,7 @@ void m68008_device::or_l_aips_dd_if8() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163917,14 +163918,14 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163958,7 +163959,7 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -163991,12 +163992,12 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164032,7 +164033,7 @@ void m68008_device::or_l_pais_dd_if8() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164048,7 +164049,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164080,7 +164081,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -164115,7 +164116,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164148,12 +164149,12 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164189,7 +164190,7 @@ void m68008_device::or_l_das_dd_if8() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164203,14 +164204,14 @@ void m68008_device::or_l_dais_dd_if8() // 80b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164218,7 +164219,7 @@ void m68008_device::or_l_dais_dd_if8() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164252,7 +164253,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164287,7 +164288,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -164322,7 +164323,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164355,12 +164356,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164396,7 +164397,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164414,7 +164415,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164447,7 +164448,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -164482,7 +164483,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164515,12 +164516,12 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164556,7 +164557,7 @@ void m68008_device::or_l_adr16_dd_if8() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164572,7 +164573,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164606,7 +164607,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164639,7 +164640,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -164674,7 +164675,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164707,12 +164708,12 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164748,7 +164749,7 @@ void m68008_device::or_l_adr32_dd_if8() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164763,7 +164764,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164795,7 +164796,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164830,7 +164831,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164863,12 +164864,12 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -164904,7 +164905,7 @@ void m68008_device::or_l_dpc_dd_if8() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164917,14 +164918,14 @@ void m68008_device::or_l_dpci_dd_if8() // 80bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -164932,7 +164933,7 @@ void m68008_device::or_l_dpci_dd_if8() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -164966,7 +164967,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165001,7 +165002,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165036,7 +165037,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165069,12 +165070,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165110,7 +165111,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -165126,7 +165127,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165160,7 +165161,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165194,12 +165195,12 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -165229,7 +165230,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -165238,7 +165239,7 @@ void m68008_device::or_l_imm32_dd_if8() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -165256,13 +165257,13 @@ void m68008_device::divu_w_ds_dd_if8() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -165275,7 +165276,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165293,7 +165294,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -165301,7 +165302,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -165336,7 +165337,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -165369,7 +165370,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -165540,7 +165541,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165580,7 +165581,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -165591,7 +165592,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -165603,7 +165604,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -165623,7 +165624,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -165634,7 +165635,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -165644,13 +165645,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165661,7 +165662,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -165671,7 +165672,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -165679,7 +165680,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -165724,7 +165725,7 @@ void m68008_device::divu_w_ais_dd_if8() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -165760,13 +165761,13 @@ void m68008_device::divu_w_ais_dd_if8() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -165779,7 +165780,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -165797,7 +165798,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -165805,7 +165806,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -165840,7 +165841,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -165873,7 +165874,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166044,7 +166045,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166084,7 +166085,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166095,7 +166096,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166107,7 +166108,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166127,7 +166128,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -166138,7 +166139,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166148,13 +166149,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166165,7 +166166,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -166175,7 +166176,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -166183,7 +166184,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166234,7 +166235,7 @@ void m68008_device::divu_w_aips_dd_if8() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -166268,13 +166269,13 @@ void m68008_device::divu_w_aips_dd_if8() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -166287,7 +166288,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166305,7 +166306,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -166313,7 +166314,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166348,7 +166349,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166381,7 +166382,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166552,7 +166553,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166592,7 +166593,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166603,7 +166604,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166615,7 +166616,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -166635,7 +166636,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -166646,7 +166647,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -166656,13 +166657,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166673,7 +166674,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -166683,7 +166684,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -166691,7 +166692,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -166744,7 +166745,7 @@ void m68008_device::divu_w_pais_dd_if8() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -166778,13 +166779,13 @@ void m68008_device::divu_w_pais_dd_if8() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -166797,7 +166798,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -166815,7 +166816,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -166823,7 +166824,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166858,7 +166859,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -166891,7 +166892,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -167062,7 +167063,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167102,7 +167103,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167113,7 +167114,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167125,7 +167126,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167145,7 +167146,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -167156,7 +167157,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167166,13 +167167,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167183,7 +167184,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -167193,7 +167194,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -167201,7 +167202,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167278,7 +167279,7 @@ void m68008_device::divu_w_das_dd_if8() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167314,13 +167315,13 @@ void m68008_device::divu_w_das_dd_if8() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -167333,7 +167334,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167351,7 +167352,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -167359,7 +167360,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -167394,7 +167395,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -167427,7 +167428,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -167598,7 +167599,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167638,7 +167639,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167649,7 +167650,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167661,7 +167662,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -167681,7 +167682,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -167692,7 +167693,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -167702,13 +167703,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167719,7 +167720,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -167729,7 +167730,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -167737,7 +167738,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -167780,7 +167781,7 @@ void m68008_device::divu_w_dais_dd_if8() // 80f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -167862,7 +167863,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -167898,13 +167899,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -167917,7 +167918,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -167935,7 +167936,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -167943,7 +167944,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -167978,7 +167979,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -168011,7 +168012,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -168182,7 +168183,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168222,7 +168223,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168233,7 +168234,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168245,7 +168246,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168265,7 +168266,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -168276,7 +168277,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168286,13 +168287,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168303,7 +168304,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -168313,7 +168314,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -168321,7 +168322,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168399,7 +168400,7 @@ void m68008_device::divu_w_adr16_dd_if8() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -168433,13 +168434,13 @@ void m68008_device::divu_w_adr16_dd_if8() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -168452,7 +168453,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168470,7 +168471,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -168478,7 +168479,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -168513,7 +168514,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -168546,7 +168547,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -168717,7 +168718,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168757,7 +168758,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168768,7 +168769,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168780,7 +168781,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -168800,7 +168801,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -168811,7 +168812,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -168821,13 +168822,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -168838,7 +168839,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -168848,7 +168849,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -168856,7 +168857,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -168965,7 +168966,7 @@ void m68008_device::divu_w_adr32_dd_if8() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -168999,13 +169000,13 @@ void m68008_device::divu_w_adr32_dd_if8() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -169018,7 +169019,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169036,7 +169037,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -169044,7 +169045,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169079,7 +169080,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169112,7 +169113,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169283,7 +169284,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169323,7 +169324,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169334,7 +169335,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169346,7 +169347,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169366,7 +169367,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -169377,7 +169378,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169387,13 +169388,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169404,7 +169405,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -169414,7 +169415,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -169422,7 +169423,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169498,7 +169499,7 @@ void m68008_device::divu_w_dpc_dd_if8() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -169534,13 +169535,13 @@ void m68008_device::divu_w_dpc_dd_if8() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -169553,7 +169554,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169571,7 +169572,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -169579,7 +169580,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169614,7 +169615,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169647,7 +169648,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -169818,7 +169819,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169858,7 +169859,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169869,7 +169870,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169881,7 +169882,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -169901,7 +169902,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -169912,7 +169913,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -169922,13 +169923,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -169939,7 +169940,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -169949,7 +169950,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -169957,7 +169958,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -169999,7 +170000,7 @@ void m68008_device::divu_w_dpci_dd_if8() // 80fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -170081,7 +170082,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -170117,13 +170118,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -170136,7 +170137,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170154,7 +170155,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -170162,7 +170163,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170197,7 +170198,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170230,7 +170231,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170401,7 +170402,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170441,7 +170442,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170452,7 +170453,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170464,7 +170465,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170484,7 +170485,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -170495,7 +170496,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170505,13 +170506,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170522,7 +170523,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -170532,7 +170533,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -170540,7 +170541,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170620,13 +170621,13 @@ void m68008_device::divu_w_imm16_dd_if8() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -170639,7 +170640,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -170657,7 +170658,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -170665,7 +170666,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170700,7 +170701,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170733,7 +170734,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -170904,7 +170905,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -170944,7 +170945,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -170955,7 +170956,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170967,7 +170968,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -170987,7 +170988,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -170998,7 +170999,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -171008,13 +171009,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -171025,7 +171026,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -171035,7 +171036,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -171043,7 +171044,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171090,12 +171091,12 @@ void m68008_device::sbcd_ds_dd_if8() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171150,7 +171151,7 @@ void m68008_device::sbcd_pais_paid_if8() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -171186,12 +171187,12 @@ void m68008_device::sbcd_pais_paid_if8() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171251,11 +171252,11 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -171273,7 +171274,7 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171310,7 +171311,7 @@ void m68008_device::or_b_dd_ais_if8() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171339,12 +171340,12 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -171363,7 +171364,7 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171400,7 +171401,7 @@ void m68008_device::or_b_dd_aips_if8() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171428,7 +171429,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -171436,7 +171437,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -171455,7 +171456,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171492,7 +171493,7 @@ void m68008_device::or_b_dd_pais_if8() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171518,7 +171519,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171551,11 +171552,11 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -171573,7 +171574,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171610,7 +171611,7 @@ void m68008_device::or_b_dd_das_if8() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171634,14 +171635,14 @@ void m68008_device::or_b_dd_dais_if8() // 8130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -171649,7 +171650,7 @@ void m68008_device::or_b_dd_dais_if8() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171683,7 +171684,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171719,11 +171720,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -171741,7 +171742,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171778,7 +171779,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171806,7 +171807,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171839,7 +171840,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -171858,7 +171859,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -171895,7 +171896,7 @@ void m68008_device::or_b_dd_adr16_if8() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -171921,7 +171922,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -171955,7 +171956,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171988,7 +171989,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -172007,7 +172008,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172044,7 +172045,7 @@ void m68008_device::or_b_dd_adr32_if8() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -172070,11 +172071,11 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172107,7 +172108,7 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172144,7 +172145,7 @@ void m68008_device::or_w_dd_ais_if8() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172188,12 +172189,12 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -172227,7 +172228,7 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172264,7 +172265,7 @@ void m68008_device::or_w_dd_aips_if8() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172307,7 +172308,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -172315,7 +172316,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -172349,7 +172350,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172386,7 +172387,7 @@ void m68008_device::or_w_dd_pais_if8() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172427,7 +172428,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172460,11 +172461,11 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172497,7 +172498,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172534,7 +172535,7 @@ void m68008_device::or_w_dd_das_if8() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172573,14 +172574,14 @@ void m68008_device::or_w_dd_dais_if8() // 8170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -172588,7 +172589,7 @@ void m68008_device::or_w_dd_dais_if8() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172622,7 +172623,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172658,11 +172659,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172695,7 +172696,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172732,7 +172733,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172775,7 +172776,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172808,7 +172809,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -172842,7 +172843,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -172879,7 +172880,7 @@ void m68008_device::or_w_dd_adr16_if8() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -172920,7 +172921,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -172954,7 +172955,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172987,7 +172988,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -173021,7 +173022,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173058,7 +173059,7 @@ void m68008_device::or_w_dd_adr32_if8() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173099,7 +173100,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -173134,7 +173135,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173167,7 +173168,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173202,7 +173203,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173237,7 +173238,7 @@ void m68008_device::or_l_dd_ais_if8() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173278,7 +173279,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -173313,11 +173314,11 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173350,7 +173351,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173385,7 +173386,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173420,7 +173421,7 @@ void m68008_device::or_l_dd_aips_if8() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173460,14 +173461,14 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173501,7 +173502,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173534,7 +173535,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173569,7 +173570,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173604,7 +173605,7 @@ void m68008_device::or_l_dd_pais_if8() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173645,7 +173646,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173677,7 +173678,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -173712,7 +173713,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173745,7 +173746,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -173780,7 +173781,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -173815,7 +173816,7 @@ void m68008_device::or_l_dd_das_if8() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -173854,14 +173855,14 @@ void m68008_device::or_l_dd_dais_if8() // 81b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -173869,7 +173870,7 @@ void m68008_device::or_l_dd_dais_if8() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173903,7 +173904,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -173938,7 +173939,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -173973,7 +173974,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174006,7 +174007,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174041,7 +174042,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174076,7 +174077,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174119,7 +174120,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174152,7 +174153,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -174187,7 +174188,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174220,7 +174221,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174255,7 +174256,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174290,7 +174291,7 @@ void m68008_device::or_l_dd_adr16_if8() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174331,7 +174332,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174365,7 +174366,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174398,7 +174399,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -174433,7 +174434,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -174466,7 +174467,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174501,7 +174502,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -174536,7 +174537,7 @@ void m68008_device::or_l_dd_adr32_if8() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -174579,13 +174580,13 @@ void m68008_device::divs_w_ds_dd_if8() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -174599,7 +174600,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174609,7 +174610,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174624,7 +174625,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -174632,7 +174633,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -174667,7 +174668,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -174700,7 +174701,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -174866,7 +174867,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -174875,7 +174876,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -174883,12 +174884,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174896,7 +174897,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -174913,7 +174914,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -174921,7 +174922,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -174961,7 +174962,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -174988,13 +174989,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175002,27 +175003,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175034,7 +175035,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175046,7 +175047,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175061,7 +175062,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175070,7 +175071,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175078,7 +175079,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175088,7 +175089,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175097,7 +175098,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175109,7 +175110,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175167,7 +175168,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -175180,7 +175181,7 @@ void m68008_device::divs_w_ais_dd_if8() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -175216,13 +175217,13 @@ void m68008_device::divs_w_ais_dd_if8() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175236,7 +175237,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175246,7 +175247,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175261,7 +175262,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -175269,7 +175270,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -175304,7 +175305,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -175337,7 +175338,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -175503,7 +175504,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -175512,7 +175513,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -175520,12 +175521,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175533,7 +175534,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175550,7 +175551,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -175558,7 +175559,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -175598,7 +175599,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -175625,13 +175626,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175639,27 +175640,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175671,7 +175672,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175683,7 +175684,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175698,7 +175699,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175707,7 +175708,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175715,7 +175716,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175725,7 +175726,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175734,7 +175735,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -175746,7 +175747,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -175804,7 +175805,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -175823,7 +175824,7 @@ void m68008_device::divs_w_aips_dd_if8() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -175857,13 +175858,13 @@ void m68008_device::divs_w_aips_dd_if8() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -175877,7 +175878,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175887,7 +175888,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -175902,7 +175903,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -175910,7 +175911,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -175945,7 +175946,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -175978,7 +175979,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -176144,7 +176145,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -176153,7 +176154,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -176161,12 +176162,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176174,7 +176175,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176191,7 +176192,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -176199,7 +176200,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176239,7 +176240,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176266,13 +176267,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176280,27 +176281,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176312,7 +176313,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176324,7 +176325,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176339,7 +176340,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176348,7 +176349,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176356,7 +176357,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -176366,7 +176367,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176375,7 +176376,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176387,7 +176388,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -176445,7 +176446,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -176466,7 +176467,7 @@ void m68008_device::divs_w_pais_dd_if8() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -176500,13 +176501,13 @@ void m68008_device::divs_w_pais_dd_if8() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176520,7 +176521,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176530,7 +176531,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176545,7 +176546,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -176553,7 +176554,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -176588,7 +176589,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -176621,7 +176622,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -176787,7 +176788,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -176796,7 +176797,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -176804,12 +176805,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176817,7 +176818,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176834,7 +176835,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -176842,7 +176843,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -176882,7 +176883,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -176909,13 +176910,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176923,27 +176924,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176955,7 +176956,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176967,7 +176968,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -176982,7 +176983,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -176991,7 +176992,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -176999,7 +177000,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177009,7 +177010,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177018,7 +177019,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177030,7 +177031,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177088,7 +177089,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -177133,7 +177134,7 @@ void m68008_device::divs_w_das_dd_if8() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -177169,13 +177170,13 @@ void m68008_device::divs_w_das_dd_if8() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177189,7 +177190,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177199,7 +177200,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177214,7 +177215,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -177222,7 +177223,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -177257,7 +177258,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -177290,7 +177291,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -177456,7 +177457,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -177465,7 +177466,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -177473,12 +177474,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177486,7 +177487,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177503,7 +177504,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -177511,7 +177512,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -177551,7 +177552,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -177578,13 +177579,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177592,27 +177593,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177624,7 +177625,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177636,7 +177637,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177651,7 +177652,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177660,7 +177661,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177668,7 +177669,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177678,7 +177679,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177687,7 +177688,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -177699,7 +177700,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -177757,7 +177758,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -177768,7 +177769,7 @@ void m68008_device::divs_w_dais_dd_if8() // 81f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -177850,7 +177851,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -177886,13 +177887,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -177906,7 +177907,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177916,7 +177917,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -177931,7 +177932,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -177939,7 +177940,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -177974,7 +177975,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -178007,7 +178008,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -178173,7 +178174,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -178182,7 +178183,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -178190,12 +178191,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178203,7 +178204,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178220,7 +178221,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -178228,7 +178229,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178268,7 +178269,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178295,13 +178296,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178309,27 +178310,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178341,7 +178342,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178353,7 +178354,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178368,7 +178369,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -178377,7 +178378,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178385,7 +178386,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -178395,7 +178396,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178404,7 +178405,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -178416,7 +178417,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -178474,7 +178475,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -178520,7 +178521,7 @@ void m68008_device::divs_w_adr16_dd_if8() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -178554,13 +178555,13 @@ void m68008_device::divs_w_adr16_dd_if8() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -178574,7 +178575,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178584,7 +178585,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178599,7 +178600,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -178607,7 +178608,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -178642,7 +178643,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -178675,7 +178676,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -178841,7 +178842,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -178850,7 +178851,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -178858,12 +178859,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178871,7 +178872,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178888,7 +178889,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -178896,7 +178897,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -178936,7 +178937,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -178963,13 +178964,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -178977,27 +178978,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179009,7 +179010,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179021,7 +179022,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179036,7 +179037,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179045,7 +179046,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179053,7 +179054,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179063,7 +179064,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179072,7 +179073,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179084,7 +179085,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179142,7 +179143,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -179219,7 +179220,7 @@ void m68008_device::divs_w_adr32_dd_if8() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -179253,13 +179254,13 @@ void m68008_device::divs_w_adr32_dd_if8() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179273,7 +179274,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179283,7 +179284,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179298,7 +179299,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -179306,7 +179307,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -179341,7 +179342,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -179374,7 +179375,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -179540,7 +179541,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -179549,7 +179550,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -179557,12 +179558,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -179570,7 +179571,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179587,7 +179588,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -179595,7 +179596,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -179635,7 +179636,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -179662,13 +179663,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179676,27 +179677,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179708,7 +179709,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179720,7 +179721,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179735,7 +179736,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179744,7 +179745,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179752,7 +179753,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179762,7 +179763,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179771,7 +179772,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -179783,7 +179784,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -179841,7 +179842,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -179885,7 +179886,7 @@ void m68008_device::divs_w_dpc_dd_if8() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -179921,13 +179922,13 @@ void m68008_device::divs_w_dpc_dd_if8() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -179941,7 +179942,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179951,7 +179952,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -179966,7 +179967,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -179974,7 +179975,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180009,7 +180010,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180042,7 +180043,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180208,7 +180209,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -180217,7 +180218,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -180225,12 +180226,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180238,7 +180239,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180255,7 +180256,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -180263,7 +180264,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -180303,7 +180304,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180330,13 +180331,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180344,27 +180345,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180376,7 +180377,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180388,7 +180389,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180403,7 +180404,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -180412,7 +180413,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180420,7 +180421,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -180430,7 +180431,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180439,7 +180440,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -180451,7 +180452,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -180509,7 +180510,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -180519,7 +180520,7 @@ void m68008_device::divs_w_dpci_dd_if8() // 81fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -180601,7 +180602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -180637,13 +180638,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -180657,7 +180658,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180667,7 +180668,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180682,7 +180683,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -180690,7 +180691,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180725,7 +180726,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180758,7 +180759,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -180924,7 +180925,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -180933,7 +180934,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -180941,12 +180942,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -180954,7 +180955,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -180971,7 +180972,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -180979,7 +180980,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181019,7 +181020,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181046,13 +181047,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181060,27 +181061,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181092,7 +181093,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181104,7 +181105,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181119,7 +181120,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181128,7 +181129,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181136,7 +181137,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181146,7 +181147,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181155,7 +181156,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181167,7 +181168,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181225,7 +181226,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -181273,13 +181274,13 @@ void m68008_device::divs_w_imm16_dd_if8() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181293,7 +181294,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181303,7 +181304,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181318,7 +181319,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -181326,7 +181327,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -181361,7 +181362,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -181394,7 +181395,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -181560,7 +181561,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -181569,7 +181570,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -181577,12 +181578,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181590,7 +181591,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181607,7 +181608,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -181615,7 +181616,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -181655,7 +181656,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -181682,13 +181683,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181696,27 +181697,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181728,7 +181729,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181740,7 +181741,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -181755,7 +181756,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181764,7 +181765,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181772,7 +181773,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181782,7 +181783,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -181791,7 +181792,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -181803,7 +181804,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -181861,7 +181862,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -181876,7 +181877,7 @@ void m68008_device::sub_b_ds_dd_if8() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -181926,7 +181927,7 @@ void m68008_device::sub_b_ais_dd_if8() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -181947,7 +181948,7 @@ void m68008_device::sub_b_ais_dd_if8() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182003,7 +182004,7 @@ void m68008_device::sub_b_aips_dd_if8() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -182022,7 +182023,7 @@ void m68008_device::sub_b_aips_dd_if8() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182080,7 +182081,7 @@ void m68008_device::sub_b_pais_dd_if8() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -182099,7 +182100,7 @@ void m68008_device::sub_b_pais_dd_if8() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182181,7 +182182,7 @@ void m68008_device::sub_b_das_dd_if8() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182202,7 +182203,7 @@ void m68008_device::sub_b_das_dd_if8() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182250,7 +182251,7 @@ void m68008_device::sub_b_dais_dd_if8() // 9030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182332,7 +182333,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182353,7 +182354,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182436,7 +182437,7 @@ void m68008_device::sub_b_adr16_dd_if8() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -182455,7 +182456,7 @@ void m68008_device::sub_b_adr16_dd_if8() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182569,7 +182570,7 @@ void m68008_device::sub_b_adr32_dd_if8() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -182588,7 +182589,7 @@ void m68008_device::sub_b_adr32_dd_if8() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182669,7 +182670,7 @@ void m68008_device::sub_b_dpc_dd_if8() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182690,7 +182691,7 @@ void m68008_device::sub_b_dpc_dd_if8() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182737,7 +182738,7 @@ void m68008_device::sub_b_dpci_dd_if8() // 903b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -182819,7 +182820,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -182840,7 +182841,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182925,7 +182926,7 @@ void m68008_device::sub_b_imm8_dd_if8() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -182977,7 +182978,7 @@ void m68008_device::sub_w_ds_dd_if8() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183029,7 +183030,7 @@ void m68008_device::sub_w_as_dd_if8() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183079,7 +183080,7 @@ void m68008_device::sub_w_ais_dd_if8() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183115,7 +183116,7 @@ void m68008_device::sub_w_ais_dd_if8() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183171,7 +183172,7 @@ void m68008_device::sub_w_aips_dd_if8() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -183205,7 +183206,7 @@ void m68008_device::sub_w_aips_dd_if8() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183263,7 +183264,7 @@ void m68008_device::sub_w_pais_dd_if8() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -183297,7 +183298,7 @@ void m68008_device::sub_w_pais_dd_if8() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183379,7 +183380,7 @@ void m68008_device::sub_w_das_dd_if8() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183415,7 +183416,7 @@ void m68008_device::sub_w_das_dd_if8() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183463,7 +183464,7 @@ void m68008_device::sub_w_dais_dd_if8() // 9070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -183545,7 +183546,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183581,7 +183582,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183664,7 +183665,7 @@ void m68008_device::sub_w_adr16_dd_if8() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -183698,7 +183699,7 @@ void m68008_device::sub_w_adr16_dd_if8() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183812,7 +183813,7 @@ void m68008_device::sub_w_adr32_dd_if8() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -183846,7 +183847,7 @@ void m68008_device::sub_w_adr32_dd_if8() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -183927,7 +183928,7 @@ void m68008_device::sub_w_dpc_dd_if8() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -183963,7 +183964,7 @@ void m68008_device::sub_w_dpc_dd_if8() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184010,7 +184011,7 @@ void m68008_device::sub_w_dpci_dd_if8() // 907b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -184092,7 +184093,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -184128,7 +184129,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184213,7 +184214,7 @@ void m68008_device::sub_w_imm16_dd_if8() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -184265,7 +184266,7 @@ void m68008_device::sub_l_ds_dd_if8() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -184299,7 +184300,7 @@ void m68008_device::sub_l_ds_dd_if8() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -184325,7 +184326,7 @@ void m68008_device::sub_l_as_dd_if8() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -184359,7 +184360,7 @@ void m68008_device::sub_l_as_dd_if8() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -184383,7 +184384,7 @@ void m68008_device::sub_l_ais_dd_if8() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -184450,12 +184451,12 @@ void m68008_device::sub_l_ais_dd_if8() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184506,7 +184507,7 @@ void m68008_device::sub_l_aips_dd_if8() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -184576,12 +184577,12 @@ void m68008_device::sub_l_aips_dd_if8() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184631,7 +184632,7 @@ void m68008_device::sub_l_pais_dd_if8() // 90a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -184703,12 +184704,12 @@ void m68008_device::sub_l_pais_dd_if8() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184790,7 +184791,7 @@ void m68008_device::sub_l_das_dd_if8() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -184857,12 +184858,12 @@ void m68008_device::sub_l_das_dd_if8() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -184911,7 +184912,7 @@ void m68008_device::sub_l_dais_dd_if8() // 90b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -184992,7 +184993,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -185059,12 +185060,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185148,7 +185149,7 @@ void m68008_device::sub_l_adr16_dd_if8() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -185215,12 +185216,12 @@ void m68008_device::sub_l_adr16_dd_if8() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185335,7 +185336,7 @@ void m68008_device::sub_l_adr32_dd_if8() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -185402,12 +185403,12 @@ void m68008_device::sub_l_adr32_dd_if8() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185488,7 +185489,7 @@ void m68008_device::sub_l_dpc_dd_if8() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -185555,12 +185556,12 @@ void m68008_device::sub_l_dpc_dd_if8() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185608,7 +185609,7 @@ void m68008_device::sub_l_dpci_dd_if8() // 90bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -185689,7 +185690,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -185756,12 +185757,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -185878,7 +185879,7 @@ void m68008_device::sub_l_imm32_dd_if8() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -185912,7 +185913,7 @@ void m68008_device::sub_l_imm32_dd_if8() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -185938,7 +185939,7 @@ void m68008_device::suba_w_ds_ad_if8() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -185971,7 +185972,7 @@ void m68008_device::suba_w_ds_ad_if8() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -185996,7 +185997,7 @@ void m68008_device::suba_w_as_ad_if8() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186029,7 +186030,7 @@ void m68008_device::suba_w_as_ad_if8() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186052,7 +186053,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186088,7 +186089,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186121,7 +186122,7 @@ void m68008_device::suba_w_ais_ad_if8() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186150,7 +186151,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -186184,7 +186185,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186217,7 +186218,7 @@ void m68008_device::suba_w_aips_ad_if8() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186248,7 +186249,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -186282,7 +186283,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186315,7 +186316,7 @@ void m68008_device::suba_w_pais_ad_if8() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186370,7 +186371,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186406,7 +186407,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186439,7 +186440,7 @@ void m68008_device::suba_w_das_ad_if8() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186460,7 +186461,7 @@ void m68008_device::suba_w_dais_ad_if8() // 90f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -186542,7 +186543,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186578,7 +186579,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186611,7 +186612,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186667,7 +186668,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -186701,7 +186702,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186734,7 +186735,7 @@ void m68008_device::suba_w_adr16_ad_if8() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186821,7 +186822,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -186855,7 +186856,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -186888,7 +186889,7 @@ void m68008_device::suba_w_adr32_ad_if8() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -186942,7 +186943,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -186978,7 +186979,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187011,7 +187012,7 @@ void m68008_device::suba_w_dpc_ad_if8() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187031,7 +187032,7 @@ void m68008_device::suba_w_dpci_ad_if8() // 90fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187113,7 +187114,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -187149,7 +187150,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187182,7 +187183,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187240,7 +187241,7 @@ void m68008_device::suba_w_imm16_ad_if8() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -187273,7 +187274,7 @@ void m68008_device::suba_w_imm16_ad_if8() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -187298,7 +187299,7 @@ void m68008_device::subx_b_ds_dd_if8() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -187354,7 +187355,7 @@ void m68008_device::subx_b_pais_paid_if8() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -187391,7 +187392,7 @@ void m68008_device::subx_b_pais_paid_if8() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187453,7 +187454,7 @@ void m68008_device::sub_b_dd_ais_if8() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187474,7 +187475,7 @@ void m68008_device::sub_b_dd_ais_if8() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187542,7 +187543,7 @@ void m68008_device::sub_b_dd_aips_if8() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -187561,7 +187562,7 @@ void m68008_device::sub_b_dd_aips_if8() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187631,7 +187632,7 @@ void m68008_device::sub_b_dd_pais_if8() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -187650,7 +187651,7 @@ void m68008_device::sub_b_dd_pais_if8() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187744,7 +187745,7 @@ void m68008_device::sub_b_dd_das_if8() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187765,7 +187766,7 @@ void m68008_device::sub_b_dd_das_if8() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -187825,7 +187826,7 @@ void m68008_device::sub_b_dd_dais_if8() // 9130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -187907,7 +187908,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -187928,7 +187929,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188023,7 +188024,7 @@ void m68008_device::sub_b_dd_adr16_if8() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -188042,7 +188043,7 @@ void m68008_device::sub_b_dd_adr16_if8() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188168,7 +188169,7 @@ void m68008_device::sub_b_dd_adr32_if8() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -188187,7 +188188,7 @@ void m68008_device::sub_b_dd_adr32_if8() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188251,7 +188252,7 @@ void m68008_device::subx_w_ds_dd_if8() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -188307,7 +188308,7 @@ void m68008_device::subx_w_pais_paid_if8() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -188374,7 +188375,7 @@ void m68008_device::subx_w_pais_paid_if8() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188451,7 +188452,7 @@ void m68008_device::sub_w_dd_ais_if8() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188487,7 +188488,7 @@ void m68008_device::sub_w_dd_ais_if8() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188570,7 +188571,7 @@ void m68008_device::sub_w_dd_aips_if8() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188604,7 +188605,7 @@ void m68008_device::sub_w_dd_aips_if8() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188689,7 +188690,7 @@ void m68008_device::sub_w_dd_pais_if8() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188723,7 +188724,7 @@ void m68008_device::sub_w_dd_pais_if8() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188832,7 +188833,7 @@ void m68008_device::sub_w_dd_das_if8() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -188868,7 +188869,7 @@ void m68008_device::sub_w_dd_das_if8() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188943,7 +188944,7 @@ void m68008_device::sub_w_dd_dais_if8() // 9170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -189025,7 +189026,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -189061,7 +189062,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189171,7 +189172,7 @@ void m68008_device::sub_w_dd_adr16_if8() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189205,7 +189206,7 @@ void m68008_device::sub_w_dd_adr16_if8() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189346,7 +189347,7 @@ void m68008_device::sub_w_dd_adr32_if8() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189380,7 +189381,7 @@ void m68008_device::sub_w_dd_adr32_if8() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189459,7 +189460,7 @@ void m68008_device::subx_l_ds_dd_if8() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -189493,7 +189494,7 @@ void m68008_device::subx_l_ds_dd_if8() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -189554,7 +189555,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -189621,7 +189622,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -189685,7 +189686,7 @@ void m68008_device::subx_l_pais_paid_if8() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189762,7 +189763,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189829,7 +189830,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189864,7 +189865,7 @@ void m68008_device::sub_l_dd_ais_if8() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -189939,7 +189940,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -190009,7 +190010,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190044,7 +190045,7 @@ void m68008_device::sub_l_dd_aips_if8() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190118,7 +190119,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -190190,7 +190191,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190225,7 +190226,7 @@ void m68008_device::sub_l_dd_pais_if8() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190331,7 +190332,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -190398,7 +190399,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190433,7 +190434,7 @@ void m68008_device::sub_l_dd_das_if8() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190506,7 +190507,7 @@ void m68008_device::sub_l_dd_dais_if8() // 91b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -190587,7 +190588,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -190654,7 +190655,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190689,7 +190690,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -190797,7 +190798,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -190864,7 +190865,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190899,7 +190900,7 @@ void m68008_device::sub_l_dd_adr16_if8() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -191038,7 +191039,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -191105,7 +191106,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191140,7 +191141,7 @@ void m68008_device::sub_l_dd_adr32_if8() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -191217,7 +191218,7 @@ void m68008_device::suba_l_ds_ad_if8() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -191250,7 +191251,7 @@ void m68008_device::suba_l_ds_ad_if8() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191275,7 +191276,7 @@ void m68008_device::suba_l_as_ad_if8() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -191308,7 +191309,7 @@ void m68008_device::suba_l_as_ad_if8() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -191331,7 +191332,7 @@ void m68008_device::suba_l_ais_ad_if8() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -191398,11 +191399,11 @@ void m68008_device::suba_l_ais_ad_if8() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -191452,7 +191453,7 @@ void m68008_device::suba_l_aips_ad_if8() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -191522,11 +191523,11 @@ void m68008_device::suba_l_aips_ad_if8() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -191575,7 +191576,7 @@ void m68008_device::suba_l_pais_ad_if8() // 91e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -191647,11 +191648,11 @@ void m68008_device::suba_l_pais_ad_if8() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -191732,7 +191733,7 @@ void m68008_device::suba_l_das_ad_if8() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -191799,11 +191800,11 @@ void m68008_device::suba_l_das_ad_if8() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -191851,7 +191852,7 @@ void m68008_device::suba_l_dais_ad_if8() // 91f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -191932,7 +191933,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -191999,11 +192000,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192086,7 +192087,7 @@ void m68008_device::suba_l_adr16_ad_if8() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -192153,11 +192154,11 @@ void m68008_device::suba_l_adr16_ad_if8() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192271,7 +192272,7 @@ void m68008_device::suba_l_adr32_ad_if8() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -192338,11 +192339,11 @@ void m68008_device::suba_l_adr32_ad_if8() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192422,7 +192423,7 @@ void m68008_device::suba_l_dpc_ad_if8() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192489,11 +192490,11 @@ void m68008_device::suba_l_dpc_ad_if8() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192540,7 +192541,7 @@ void m68008_device::suba_l_dpci_ad_if8() // 91fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -192621,7 +192622,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192688,11 +192689,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -192808,7 +192809,7 @@ void m68008_device::suba_l_imm32_ad_if8() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -192841,7 +192842,7 @@ void m68008_device::suba_l_imm32_ad_if8() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -192866,7 +192867,7 @@ void m68008_device::cmp_b_ds_dd_if8() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -192915,7 +192916,7 @@ void m68008_device::cmp_b_ais_dd_if8() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192936,7 +192937,7 @@ void m68008_device::cmp_b_ais_dd_if8() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -192991,7 +192992,7 @@ void m68008_device::cmp_b_aips_dd_if8() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -193010,7 +193011,7 @@ void m68008_device::cmp_b_aips_dd_if8() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193067,7 +193068,7 @@ void m68008_device::cmp_b_pais_dd_if8() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -193086,7 +193087,7 @@ void m68008_device::cmp_b_pais_dd_if8() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193167,7 +193168,7 @@ void m68008_device::cmp_b_das_dd_if8() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193188,7 +193189,7 @@ void m68008_device::cmp_b_das_dd_if8() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193235,7 +193236,7 @@ void m68008_device::cmp_b_dais_dd_if8() // b030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193317,7 +193318,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193338,7 +193339,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193420,7 +193421,7 @@ void m68008_device::cmp_b_adr16_dd_if8() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -193439,7 +193440,7 @@ void m68008_device::cmp_b_adr16_dd_if8() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193552,7 +193553,7 @@ void m68008_device::cmp_b_adr32_dd_if8() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -193571,7 +193572,7 @@ void m68008_device::cmp_b_adr32_dd_if8() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193651,7 +193652,7 @@ void m68008_device::cmp_b_dpc_dd_if8() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193672,7 +193673,7 @@ void m68008_device::cmp_b_dpc_dd_if8() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193718,7 +193719,7 @@ void m68008_device::cmp_b_dpci_dd_if8() // b03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193800,7 +193801,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193821,7 +193822,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193905,7 +193906,7 @@ void m68008_device::cmp_b_imm8_dd_if8() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -193956,7 +193957,7 @@ void m68008_device::cmp_w_ds_dd_if8() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194007,7 +194008,7 @@ void m68008_device::cmp_w_as_dd_if8() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194056,7 +194057,7 @@ void m68008_device::cmp_w_ais_dd_if8() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194092,7 +194093,7 @@ void m68008_device::cmp_w_ais_dd_if8() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194147,7 +194148,7 @@ void m68008_device::cmp_w_aips_dd_if8() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -194181,7 +194182,7 @@ void m68008_device::cmp_w_aips_dd_if8() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194238,7 +194239,7 @@ void m68008_device::cmp_w_pais_dd_if8() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -194272,7 +194273,7 @@ void m68008_device::cmp_w_pais_dd_if8() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194353,7 +194354,7 @@ void m68008_device::cmp_w_das_dd_if8() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194389,7 +194390,7 @@ void m68008_device::cmp_w_das_dd_if8() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194436,7 +194437,7 @@ void m68008_device::cmp_w_dais_dd_if8() // b070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -194518,7 +194519,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194554,7 +194555,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194636,7 +194637,7 @@ void m68008_device::cmp_w_adr16_dd_if8() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -194670,7 +194671,7 @@ void m68008_device::cmp_w_adr16_dd_if8() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194783,7 +194784,7 @@ void m68008_device::cmp_w_adr32_dd_if8() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -194817,7 +194818,7 @@ void m68008_device::cmp_w_adr32_dd_if8() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194897,7 +194898,7 @@ void m68008_device::cmp_w_dpc_dd_if8() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -194933,7 +194934,7 @@ void m68008_device::cmp_w_dpc_dd_if8() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -194979,7 +194980,7 @@ void m68008_device::cmp_w_dpci_dd_if8() // b07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -195061,7 +195062,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195097,7 +195098,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -195181,7 +195182,7 @@ void m68008_device::cmp_w_imm16_dd_if8() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -195232,11 +195233,11 @@ void m68008_device::cmp_l_ds_dd_if8() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195288,11 +195289,11 @@ void m68008_device::cmp_l_as_dd_if8() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195342,7 +195343,7 @@ void m68008_device::cmp_l_ais_dd_if8() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -195409,11 +195410,11 @@ void m68008_device::cmp_l_ais_dd_if8() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195463,7 +195464,7 @@ void m68008_device::cmp_l_aips_dd_if8() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -195533,11 +195534,11 @@ void m68008_device::cmp_l_aips_dd_if8() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195586,7 +195587,7 @@ void m68008_device::cmp_l_pais_dd_if8() // b0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -195658,11 +195659,11 @@ void m68008_device::cmp_l_pais_dd_if8() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195743,7 +195744,7 @@ void m68008_device::cmp_l_das_dd_if8() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -195810,11 +195811,11 @@ void m68008_device::cmp_l_das_dd_if8() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195862,7 +195863,7 @@ void m68008_device::cmp_l_dais_dd_if8() // b0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -195943,7 +195944,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -196010,11 +196011,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196097,7 +196098,7 @@ void m68008_device::cmp_l_adr16_dd_if8() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -196164,11 +196165,11 @@ void m68008_device::cmp_l_adr16_dd_if8() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196282,7 +196283,7 @@ void m68008_device::cmp_l_adr32_dd_if8() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -196349,11 +196350,11 @@ void m68008_device::cmp_l_adr32_dd_if8() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196433,7 +196434,7 @@ void m68008_device::cmp_l_dpc_dd_if8() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -196500,11 +196501,11 @@ void m68008_device::cmp_l_dpc_dd_if8() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196551,7 +196552,7 @@ void m68008_device::cmp_l_dpci_dd_if8() // b0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -196632,7 +196633,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -196699,11 +196700,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196819,11 +196820,11 @@ void m68008_device::cmp_l_imm32_dd_if8() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196875,11 +196876,11 @@ void m68008_device::cmpa_w_ds_ad_if8() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196931,11 +196932,11 @@ void m68008_device::cmpa_w_as_ad_if8() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196985,7 +196986,7 @@ void m68008_device::cmpa_w_ais_ad_if8() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197021,11 +197022,11 @@ void m68008_device::cmpa_w_ais_ad_if8() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197081,7 +197082,7 @@ void m68008_device::cmpa_w_aips_ad_if8() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -197115,11 +197116,11 @@ void m68008_device::cmpa_w_aips_ad_if8() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197177,7 +197178,7 @@ void m68008_device::cmpa_w_pais_ad_if8() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -197211,11 +197212,11 @@ void m68008_device::cmpa_w_pais_ad_if8() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197297,7 +197298,7 @@ void m68008_device::cmpa_w_das_ad_if8() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197333,11 +197334,11 @@ void m68008_device::cmpa_w_das_ad_if8() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197385,7 +197386,7 @@ void m68008_device::cmpa_w_dais_ad_if8() // b0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -197467,7 +197468,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197503,11 +197504,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197590,7 +197591,7 @@ void m68008_device::cmpa_w_adr16_ad_if8() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -197624,11 +197625,11 @@ void m68008_device::cmpa_w_adr16_ad_if8() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197742,7 +197743,7 @@ void m68008_device::cmpa_w_adr32_ad_if8() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -197776,11 +197777,11 @@ void m68008_device::cmpa_w_adr32_ad_if8() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197861,7 +197862,7 @@ void m68008_device::cmpa_w_dpc_ad_if8() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -197897,11 +197898,11 @@ void m68008_device::cmpa_w_dpc_ad_if8() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197948,7 +197949,7 @@ void m68008_device::cmpa_w_dpci_ad_if8() // b0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -198030,7 +198031,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -198066,11 +198067,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198155,11 +198156,11 @@ void m68008_device::cmpa_w_imm16_ad_if8() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198210,7 +198211,7 @@ void m68008_device::eor_b_dd_ds_if8() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -198218,7 +198219,7 @@ void m68008_device::eor_b_dd_ds_if8() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198282,7 +198283,7 @@ void m68008_device::cmpm_b_aips_aipd_if8() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -198302,7 +198303,7 @@ void m68008_device::cmpm_b_aips_aipd_if8() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198347,11 +198348,11 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -198369,7 +198370,7 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198406,7 +198407,7 @@ void m68008_device::eor_b_dd_ais_if8() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -198435,12 +198436,12 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -198459,7 +198460,7 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198496,7 +198497,7 @@ void m68008_device::eor_b_dd_aips_if8() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -198524,7 +198525,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -198532,7 +198533,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -198551,7 +198552,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198588,7 +198589,7 @@ void m68008_device::eor_b_dd_pais_if8() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -198614,7 +198615,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198647,11 +198648,11 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -198669,7 +198670,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198706,7 +198707,7 @@ void m68008_device::eor_b_dd_das_if8() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -198730,14 +198731,14 @@ void m68008_device::eor_b_dd_dais_if8() // b130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -198745,7 +198746,7 @@ void m68008_device::eor_b_dd_dais_if8() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198779,7 +198780,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -198815,11 +198816,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -198837,7 +198838,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198874,7 +198875,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -198902,7 +198903,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -198935,7 +198936,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -198954,7 +198955,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198991,7 +198992,7 @@ void m68008_device::eor_b_dd_adr16_if8() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -199017,7 +199018,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199051,7 +199052,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -199084,7 +199085,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -199103,7 +199104,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199140,7 +199141,7 @@ void m68008_device::eor_b_dd_adr32_if8() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -199167,7 +199168,7 @@ void m68008_device::eor_w_dd_ds_if8() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -199175,7 +199176,7 @@ void m68008_device::eor_w_dd_ds_if8() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199254,7 +199255,7 @@ void m68008_device::cmpm_w_aips_aipd_if8() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199289,7 +199290,7 @@ void m68008_device::cmpm_w_aips_aipd_if8() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199334,11 +199335,11 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199371,7 +199372,7 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199408,7 +199409,7 @@ void m68008_device::eor_w_dd_ais_if8() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199452,12 +199453,12 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199491,7 +199492,7 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199528,7 +199529,7 @@ void m68008_device::eor_w_dd_aips_if8() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199571,7 +199572,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -199579,7 +199580,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199613,7 +199614,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199650,7 +199651,7 @@ void m68008_device::eor_w_dd_pais_if8() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199691,7 +199692,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199724,11 +199725,11 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199761,7 +199762,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199798,7 +199799,7 @@ void m68008_device::eor_w_dd_das_if8() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -199837,14 +199838,14 @@ void m68008_device::eor_w_dd_dais_if8() // b170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -199852,7 +199853,7 @@ void m68008_device::eor_w_dd_dais_if8() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199886,7 +199887,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199922,11 +199923,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -199959,7 +199960,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199996,7 +199997,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200039,7 +200040,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -200072,7 +200073,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200106,7 +200107,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200143,7 +200144,7 @@ void m68008_device::eor_w_dd_adr16_if8() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200184,7 +200185,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200218,7 +200219,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -200251,7 +200252,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200285,7 +200286,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200322,7 +200323,7 @@ void m68008_device::eor_w_dd_adr32_if8() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200364,12 +200365,12 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200399,7 +200400,7 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -200408,7 +200409,7 @@ void m68008_device::eor_l_dd_ds_if8() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -200491,7 +200492,7 @@ void m68008_device::cmpm_l_aips_aipd_if8() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200555,13 +200556,13 @@ void m68008_device::cmpm_l_aips_aipd_if8() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200606,7 +200607,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200641,7 +200642,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200674,7 +200675,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200709,7 +200710,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200744,7 +200745,7 @@ void m68008_device::eor_l_dd_ais_if8() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200785,7 +200786,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200820,11 +200821,11 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -200857,7 +200858,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200892,7 +200893,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200927,7 +200928,7 @@ void m68008_device::eor_l_dd_aips_if8() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -200967,14 +200968,14 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201008,7 +201009,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201041,7 +201042,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201076,7 +201077,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201111,7 +201112,7 @@ void m68008_device::eor_l_dd_pais_if8() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201152,7 +201153,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201184,7 +201185,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -201219,7 +201220,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201252,7 +201253,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201287,7 +201288,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201322,7 +201323,7 @@ void m68008_device::eor_l_dd_das_if8() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201361,14 +201362,14 @@ void m68008_device::eor_l_dd_dais_if8() // b1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -201376,7 +201377,7 @@ void m68008_device::eor_l_dd_dais_if8() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201410,7 +201411,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201445,7 +201446,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -201480,7 +201481,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201513,7 +201514,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201548,7 +201549,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201583,7 +201584,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201626,7 +201627,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -201659,7 +201660,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -201694,7 +201695,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201727,7 +201728,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201762,7 +201763,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -201797,7 +201798,7 @@ void m68008_device::eor_l_dd_adr16_if8() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -201838,7 +201839,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201872,7 +201873,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -201905,7 +201906,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -201940,7 +201941,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -201973,7 +201974,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202008,7 +202009,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -202043,7 +202044,7 @@ void m68008_device::eor_l_dd_adr32_if8() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -202086,11 +202087,11 @@ void m68008_device::cmpa_l_ds_ad_if8() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202142,11 +202143,11 @@ void m68008_device::cmpa_l_as_ad_if8() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202196,7 +202197,7 @@ void m68008_device::cmpa_l_ais_ad_if8() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -202263,11 +202264,11 @@ void m68008_device::cmpa_l_ais_ad_if8() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202317,7 +202318,7 @@ void m68008_device::cmpa_l_aips_ad_if8() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -202387,11 +202388,11 @@ void m68008_device::cmpa_l_aips_ad_if8() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202440,7 +202441,7 @@ void m68008_device::cmpa_l_pais_ad_if8() // b1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -202512,11 +202513,11 @@ void m68008_device::cmpa_l_pais_ad_if8() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202597,7 +202598,7 @@ void m68008_device::cmpa_l_das_ad_if8() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -202664,11 +202665,11 @@ void m68008_device::cmpa_l_das_ad_if8() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202716,7 +202717,7 @@ void m68008_device::cmpa_l_dais_ad_if8() // b1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -202797,7 +202798,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -202864,11 +202865,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202951,7 +202952,7 @@ void m68008_device::cmpa_l_adr16_ad_if8() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -203018,11 +203019,11 @@ void m68008_device::cmpa_l_adr16_ad_if8() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203136,7 +203137,7 @@ void m68008_device::cmpa_l_adr32_ad_if8() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -203203,11 +203204,11 @@ void m68008_device::cmpa_l_adr32_ad_if8() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203287,7 +203288,7 @@ void m68008_device::cmpa_l_dpc_ad_if8() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -203354,11 +203355,11 @@ void m68008_device::cmpa_l_dpc_ad_if8() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203405,7 +203406,7 @@ void m68008_device::cmpa_l_dpci_ad_if8() // b1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -203486,7 +203487,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -203553,11 +203554,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203673,11 +203674,11 @@ void m68008_device::cmpa_l_imm32_ad_if8() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203729,7 +203730,7 @@ void m68008_device::and_b_ds_dd_if8() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203737,7 +203738,7 @@ void m68008_device::and_b_ds_dd_if8() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203780,11 +203781,11 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -203802,7 +203803,7 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203810,7 +203811,7 @@ void m68008_device::and_b_ais_dd_if8() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203856,12 +203857,12 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -203880,7 +203881,7 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203888,7 +203889,7 @@ void m68008_device::and_b_aips_dd_if8() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -203933,7 +203934,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -203941,7 +203942,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -203960,7 +203961,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -203968,7 +203969,7 @@ void m68008_device::and_b_pais_dd_if8() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204011,7 +204012,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204044,11 +204045,11 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -204066,7 +204067,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204074,7 +204075,7 @@ void m68008_device::and_b_das_dd_if8() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204115,14 +204116,14 @@ void m68008_device::and_b_dais_dd_if8() // c030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204130,7 +204131,7 @@ void m68008_device::and_b_dais_dd_if8() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204164,7 +204165,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204200,11 +204201,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -204222,7 +204223,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204230,7 +204231,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204275,7 +204276,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -204308,7 +204309,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -204327,7 +204328,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204335,7 +204336,7 @@ void m68008_device::and_b_adr16_dd_if8() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204378,7 +204379,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204412,7 +204413,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -204445,7 +204446,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -204464,7 +204465,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204472,7 +204473,7 @@ void m68008_device::and_b_adr32_dd_if8() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204514,7 +204515,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204547,11 +204548,11 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -204569,7 +204570,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204577,7 +204578,7 @@ void m68008_device::and_b_dpc_dd_if8() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204617,14 +204618,14 @@ void m68008_device::and_b_dpci_dd_if8() // c03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -204632,7 +204633,7 @@ void m68008_device::and_b_dpci_dd_if8() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204666,7 +204667,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204702,11 +204703,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob);
m_icount -= 4;
@@ -204724,7 +204725,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204732,7 +204733,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204777,7 +204778,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204811,7 +204812,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204819,7 +204820,7 @@ void m68008_device::and_b_imm8_dd_if8() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204864,7 +204865,7 @@ void m68008_device::and_w_ds_dd_if8() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204872,7 +204873,7 @@ void m68008_device::and_w_ds_dd_if8() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204915,11 +204916,11 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -204952,7 +204953,7 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -204960,7 +204961,7 @@ void m68008_device::and_w_ais_dd_if8() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205006,12 +205007,12 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -205045,7 +205046,7 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205053,7 +205054,7 @@ void m68008_device::and_w_aips_dd_if8() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205098,7 +205099,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -205106,7 +205107,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -205140,7 +205141,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205148,7 +205149,7 @@ void m68008_device::and_w_pais_dd_if8() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205191,7 +205192,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205224,11 +205225,11 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205261,7 +205262,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205269,7 +205270,7 @@ void m68008_device::and_w_das_dd_if8() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205310,14 +205311,14 @@ void m68008_device::and_w_dais_dd_if8() // c070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -205325,7 +205326,7 @@ void m68008_device::and_w_dais_dd_if8() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205359,7 +205360,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205395,11 +205396,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205432,7 +205433,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205440,7 +205441,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205485,7 +205486,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -205518,7 +205519,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -205552,7 +205553,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205560,7 +205561,7 @@ void m68008_device::and_w_adr16_dd_if8() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205603,7 +205604,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205637,7 +205638,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -205670,7 +205671,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -205704,7 +205705,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205712,7 +205713,7 @@ void m68008_device::and_w_adr32_dd_if8() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205754,7 +205755,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205787,11 +205788,11 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205824,7 +205825,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -205832,7 +205833,7 @@ void m68008_device::and_w_dpc_dd_if8() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205872,14 +205873,14 @@ void m68008_device::and_w_dpci_dd_if8() // c07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -205887,7 +205888,7 @@ void m68008_device::and_w_dpci_dd_if8() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205921,7 +205922,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205957,11 +205958,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -205994,7 +205995,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -206002,7 +206003,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206047,7 +206048,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206081,7 +206082,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -206089,7 +206090,7 @@ void m68008_device::and_w_imm16_dd_if8() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206134,12 +206135,12 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206169,7 +206170,7 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -206178,7 +206179,7 @@ void m68008_device::and_l_ds_dd_if8() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206194,7 +206195,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -206229,7 +206230,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206262,12 +206263,12 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206303,7 +206304,7 @@ void m68008_device::and_l_ais_dd_if8() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206319,7 +206320,7 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -206354,11 +206355,11 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206391,12 +206392,12 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206432,7 +206433,7 @@ void m68008_device::and_l_aips_dd_if8() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206447,14 +206448,14 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206488,7 +206489,7 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206521,12 +206522,12 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206562,7 +206563,7 @@ void m68008_device::and_l_pais_dd_if8() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206578,7 +206579,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206610,7 +206611,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -206645,7 +206646,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206678,12 +206679,12 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206719,7 +206720,7 @@ void m68008_device::and_l_das_dd_if8() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206733,14 +206734,14 @@ void m68008_device::and_l_dais_dd_if8() // c0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -206748,7 +206749,7 @@ void m68008_device::and_l_dais_dd_if8() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206782,7 +206783,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206817,7 +206818,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -206852,7 +206853,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -206885,12 +206886,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206926,7 +206927,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -206944,7 +206945,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -206977,7 +206978,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -207012,7 +207013,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207045,12 +207046,12 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207086,7 +207087,7 @@ void m68008_device::and_l_adr16_dd_if8() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207102,7 +207103,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207136,7 +207137,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -207169,7 +207170,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -207204,7 +207205,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207237,12 +207238,12 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207278,7 +207279,7 @@ void m68008_device::and_l_adr32_dd_if8() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207293,7 +207294,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207325,7 +207326,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -207360,7 +207361,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207393,12 +207394,12 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207434,7 +207435,7 @@ void m68008_device::and_l_dpc_dd_if8() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207447,14 +207448,14 @@ void m68008_device::and_l_dpci_dd_if8() // c0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -207462,7 +207463,7 @@ void m68008_device::and_l_dpci_dd_if8() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207496,7 +207497,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207531,7 +207532,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -207566,7 +207567,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207599,12 +207600,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207640,7 +207641,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207656,7 +207657,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207690,7 +207691,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207724,12 +207725,12 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -207759,7 +207760,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -207768,7 +207769,7 @@ void m68008_device::and_l_imm32_dd_if8() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -207788,7 +207789,7 @@ void m68008_device::mulu_w_ds_dd_if8() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -207831,7 +207832,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207843,7 +207844,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207855,7 +207856,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -207873,7 +207874,7 @@ void m68008_device::mulu_w_ais_dd_if8() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207911,7 +207912,7 @@ void m68008_device::mulu_w_ais_dd_if8() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -207954,7 +207955,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207966,7 +207967,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -207978,7 +207979,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208002,7 +208003,7 @@ void m68008_device::mulu_w_aips_dd_if8() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -208038,7 +208039,7 @@ void m68008_device::mulu_w_aips_dd_if8() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208081,7 +208082,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208093,7 +208094,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208105,7 +208106,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208131,7 +208132,7 @@ void m68008_device::mulu_w_pais_dd_if8() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -208167,7 +208168,7 @@ void m68008_device::mulu_w_pais_dd_if8() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208210,7 +208211,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208222,7 +208223,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208234,7 +208235,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208284,7 +208285,7 @@ void m68008_device::mulu_w_das_dd_if8() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208322,7 +208323,7 @@ void m68008_device::mulu_w_das_dd_if8() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208365,7 +208366,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208377,7 +208378,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208389,7 +208390,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208405,7 +208406,7 @@ void m68008_device::mulu_w_dais_dd_if8() // c0f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -208487,7 +208488,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208525,7 +208526,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208568,7 +208569,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208580,7 +208581,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208592,7 +208593,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208643,7 +208644,7 @@ void m68008_device::mulu_w_adr16_dd_if8() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -208679,7 +208680,7 @@ void m68008_device::mulu_w_adr16_dd_if8() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208722,7 +208723,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208734,7 +208735,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208746,7 +208747,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208828,7 +208829,7 @@ void m68008_device::mulu_w_adr32_dd_if8() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -208864,7 +208865,7 @@ void m68008_device::mulu_w_adr32_dd_if8() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -208907,7 +208908,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208919,7 +208920,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -208931,7 +208932,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -208980,7 +208981,7 @@ void m68008_device::mulu_w_dpc_dd_if8() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209018,7 +209019,7 @@ void m68008_device::mulu_w_dpc_dd_if8() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209061,7 +209062,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209073,7 +209074,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209085,7 +209086,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209100,7 +209101,7 @@ void m68008_device::mulu_w_dpci_dd_if8() // c0fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209182,7 +209183,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209220,7 +209221,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209263,7 +209264,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209275,7 +209276,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209287,7 +209288,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209342,7 +209343,7 @@ void m68008_device::mulu_w_imm16_dd_if8() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -209385,7 +209386,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209397,7 +209398,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -209409,7 +209410,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -209429,12 +209430,12 @@ void m68008_device::abcd_ds_dd_if8() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209489,7 +209490,7 @@ void m68008_device::abcd_pais_paid_if8() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -209525,12 +209526,12 @@ void m68008_device::abcd_pais_paid_if8() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209590,11 +209591,11 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -209612,7 +209613,7 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209649,7 +209650,7 @@ void m68008_device::and_b_dd_ais_if8() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -209678,12 +209679,12 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -209702,7 +209703,7 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209739,7 +209740,7 @@ void m68008_device::and_b_dd_aips_if8() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -209767,7 +209768,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -209775,7 +209776,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -209794,7 +209795,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209831,7 +209832,7 @@ void m68008_device::and_b_dd_pais_if8() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -209857,7 +209858,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -209890,11 +209891,11 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -209912,7 +209913,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -209949,7 +209950,7 @@ void m68008_device::and_b_dd_das_if8() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -209973,14 +209974,14 @@ void m68008_device::and_b_dd_dais_if8() // c130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -209988,7 +209989,7 @@ void m68008_device::and_b_dd_dais_if8() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210022,7 +210023,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210058,11 +210059,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -210080,7 +210081,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210117,7 +210118,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -210145,7 +210146,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -210178,7 +210179,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -210197,7 +210198,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210234,7 +210235,7 @@ void m68008_device::and_b_dd_adr16_if8() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -210260,7 +210261,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210294,7 +210295,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -210327,7 +210328,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -210346,7 +210347,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210383,7 +210384,7 @@ void m68008_device::and_b_dd_adr32_if8() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -210517,11 +210518,11 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210554,7 +210555,7 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210591,7 +210592,7 @@ void m68008_device::and_w_dd_ais_if8() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210635,12 +210636,12 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -210674,7 +210675,7 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210711,7 +210712,7 @@ void m68008_device::and_w_dd_aips_if8() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210754,7 +210755,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -210762,7 +210763,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -210796,7 +210797,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210833,7 +210834,7 @@ void m68008_device::and_w_dd_pais_if8() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -210874,7 +210875,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210907,11 +210908,11 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -210944,7 +210945,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -210981,7 +210982,7 @@ void m68008_device::and_w_dd_das_if8() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211020,14 +211021,14 @@ void m68008_device::and_w_dd_dais_if8() // c170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -211035,7 +211036,7 @@ void m68008_device::and_w_dd_dais_if8() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211069,7 +211070,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211105,11 +211106,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211142,7 +211143,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211179,7 +211180,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211222,7 +211223,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -211255,7 +211256,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -211289,7 +211290,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211326,7 +211327,7 @@ void m68008_device::and_w_dd_adr16_if8() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211367,7 +211368,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211401,7 +211402,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -211434,7 +211435,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -211468,7 +211469,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211505,7 +211506,7 @@ void m68008_device::and_w_dd_adr32_if8() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211600,7 +211601,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -211635,7 +211636,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211668,7 +211669,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211703,7 +211704,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -211738,7 +211739,7 @@ void m68008_device::and_l_dd_ais_if8() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211779,7 +211780,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -211814,11 +211815,11 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -211851,7 +211852,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211886,7 +211887,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -211921,7 +211922,7 @@ void m68008_device::and_l_dd_aips_if8() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -211961,14 +211962,14 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212002,7 +212003,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212035,7 +212036,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212070,7 +212071,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212105,7 +212106,7 @@ void m68008_device::and_l_dd_pais_if8() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212146,7 +212147,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212178,7 +212179,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -212213,7 +212214,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212246,7 +212247,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212281,7 +212282,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212316,7 +212317,7 @@ void m68008_device::and_l_dd_das_if8() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212355,14 +212356,14 @@ void m68008_device::and_l_dd_dais_if8() // c1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -212370,7 +212371,7 @@ void m68008_device::and_l_dd_dais_if8() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212404,7 +212405,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212439,7 +212440,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -212474,7 +212475,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212507,7 +212508,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212542,7 +212543,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212577,7 +212578,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212620,7 +212621,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -212653,7 +212654,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -212688,7 +212689,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212721,7 +212722,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212756,7 +212757,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -212791,7 +212792,7 @@ void m68008_device::and_l_dd_adr16_if8() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -212832,7 +212833,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212866,7 +212867,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -212899,7 +212900,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -212934,7 +212935,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -212967,7 +212968,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213002,7 +213003,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -213037,7 +213038,7 @@ void m68008_device::and_l_dd_adr32_if8() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -213082,7 +213083,7 @@ void m68008_device::muls_w_ds_dd_if8() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213125,7 +213126,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213139,7 +213140,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213151,7 +213152,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213162,7 +213163,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213176,7 +213177,7 @@ void m68008_device::muls_w_ais_dd_if8() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213214,7 +213215,7 @@ void m68008_device::muls_w_ais_dd_if8() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213257,7 +213258,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213271,7 +213272,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213283,7 +213284,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213294,7 +213295,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213314,7 +213315,7 @@ void m68008_device::muls_w_aips_dd_if8() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -213350,7 +213351,7 @@ void m68008_device::muls_w_aips_dd_if8() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213393,7 +213394,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213407,7 +213408,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213419,7 +213420,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213430,7 +213431,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213452,7 +213453,7 @@ void m68008_device::muls_w_pais_dd_if8() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -213488,7 +213489,7 @@ void m68008_device::muls_w_pais_dd_if8() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213531,7 +213532,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213545,7 +213546,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213557,7 +213558,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213568,7 +213569,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213614,7 +213615,7 @@ void m68008_device::muls_w_das_dd_if8() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213652,7 +213653,7 @@ void m68008_device::muls_w_das_dd_if8() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213695,7 +213696,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213709,7 +213710,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213721,7 +213722,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213732,7 +213733,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213744,7 +213745,7 @@ void m68008_device::muls_w_dais_dd_if8() // c1f0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -213826,7 +213827,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -213864,7 +213865,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -213907,7 +213908,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213921,7 +213922,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213933,7 +213934,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -213944,7 +213945,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -213991,7 +213992,7 @@ void m68008_device::muls_w_adr16_dd_if8() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -214027,7 +214028,7 @@ void m68008_device::muls_w_adr16_dd_if8() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214070,7 +214071,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214084,7 +214085,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214096,7 +214097,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214107,7 +214108,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214185,7 +214186,7 @@ void m68008_device::muls_w_adr32_dd_if8() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -214221,7 +214222,7 @@ void m68008_device::muls_w_adr32_dd_if8() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214264,7 +214265,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214278,7 +214279,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214290,7 +214291,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214301,7 +214302,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214346,7 +214347,7 @@ void m68008_device::muls_w_dpc_dd_if8() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214384,7 +214385,7 @@ void m68008_device::muls_w_dpc_dd_if8() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214427,7 +214428,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214441,7 +214442,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214453,7 +214454,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214464,7 +214465,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214475,7 +214476,7 @@ void m68008_device::muls_w_dpci_dd_if8() // c1fb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214557,7 +214558,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214595,7 +214596,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214638,7 +214639,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214652,7 +214653,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214664,7 +214665,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214675,7 +214676,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214726,7 +214727,7 @@ void m68008_device::muls_w_imm16_dd_if8() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -214769,7 +214770,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214783,7 +214784,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214795,7 +214796,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -214806,7 +214807,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -214822,7 +214823,7 @@ void m68008_device::add_b_ds_dd_if8() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -214872,7 +214873,7 @@ void m68008_device::add_b_ais_dd_if8() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -214893,7 +214894,7 @@ void m68008_device::add_b_ais_dd_if8() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -214949,7 +214950,7 @@ void m68008_device::add_b_aips_dd_if8() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -214968,7 +214969,7 @@ void m68008_device::add_b_aips_dd_if8() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215026,7 +215027,7 @@ void m68008_device::add_b_pais_dd_if8() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -215045,7 +215046,7 @@ void m68008_device::add_b_pais_dd_if8() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215127,7 +215128,7 @@ void m68008_device::add_b_das_dd_if8() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215148,7 +215149,7 @@ void m68008_device::add_b_das_dd_if8() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215196,7 +215197,7 @@ void m68008_device::add_b_dais_dd_if8() // d030 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215278,7 +215279,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215299,7 +215300,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215382,7 +215383,7 @@ void m68008_device::add_b_adr16_dd_if8() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -215401,7 +215402,7 @@ void m68008_device::add_b_adr16_dd_if8() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215515,7 +215516,7 @@ void m68008_device::add_b_adr32_dd_if8() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -215534,7 +215535,7 @@ void m68008_device::add_b_adr32_dd_if8() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215615,7 +215616,7 @@ void m68008_device::add_b_dpc_dd_if8() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215636,7 +215637,7 @@ void m68008_device::add_b_dpc_dd_if8() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215683,7 +215684,7 @@ void m68008_device::add_b_dpci_dd_if8() // d03b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215765,7 +215766,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215786,7 +215787,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215871,7 +215872,7 @@ void m68008_device::add_b_imm8_dd_if8() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215923,7 +215924,7 @@ void m68008_device::add_w_ds_dd_if8() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -215975,7 +215976,7 @@ void m68008_device::add_w_as_dd_if8() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216025,7 +216026,7 @@ void m68008_device::add_w_ais_dd_if8() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216061,7 +216062,7 @@ void m68008_device::add_w_ais_dd_if8() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216117,7 +216118,7 @@ void m68008_device::add_w_aips_dd_if8() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -216151,7 +216152,7 @@ void m68008_device::add_w_aips_dd_if8() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216209,7 +216210,7 @@ void m68008_device::add_w_pais_dd_if8() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -216243,7 +216244,7 @@ void m68008_device::add_w_pais_dd_if8() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216325,7 +216326,7 @@ void m68008_device::add_w_das_dd_if8() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216361,7 +216362,7 @@ void m68008_device::add_w_das_dd_if8() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216409,7 +216410,7 @@ void m68008_device::add_w_dais_dd_if8() // d070 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -216491,7 +216492,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216527,7 +216528,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216610,7 +216611,7 @@ void m68008_device::add_w_adr16_dd_if8() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -216644,7 +216645,7 @@ void m68008_device::add_w_adr16_dd_if8() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216758,7 +216759,7 @@ void m68008_device::add_w_adr32_dd_if8() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -216792,7 +216793,7 @@ void m68008_device::add_w_adr32_dd_if8() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216873,7 +216874,7 @@ void m68008_device::add_w_dpc_dd_if8() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216909,7 +216910,7 @@ void m68008_device::add_w_dpc_dd_if8() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -216956,7 +216957,7 @@ void m68008_device::add_w_dpci_dd_if8() // d07b f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -217038,7 +217039,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -217074,7 +217075,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -217159,7 +217160,7 @@ void m68008_device::add_w_imm16_dd_if8() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -217211,7 +217212,7 @@ void m68008_device::add_l_ds_dd_if8() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -217245,7 +217246,7 @@ void m68008_device::add_l_ds_dd_if8() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217271,7 +217272,7 @@ void m68008_device::add_l_as_dd_if8() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -217305,7 +217306,7 @@ void m68008_device::add_l_as_dd_if8() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217329,7 +217330,7 @@ void m68008_device::add_l_ais_dd_if8() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -217396,12 +217397,12 @@ void m68008_device::add_l_ais_dd_if8() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217452,7 +217453,7 @@ void m68008_device::add_l_aips_dd_if8() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -217522,12 +217523,12 @@ void m68008_device::add_l_aips_dd_if8() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217577,7 +217578,7 @@ void m68008_device::add_l_pais_dd_if8() // d0a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -217649,12 +217650,12 @@ void m68008_device::add_l_pais_dd_if8() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217736,7 +217737,7 @@ void m68008_device::add_l_das_dd_if8() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -217803,12 +217804,12 @@ void m68008_device::add_l_das_dd_if8() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217857,7 +217858,7 @@ void m68008_device::add_l_dais_dd_if8() // d0b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -217938,7 +217939,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -218005,12 +218006,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218094,7 +218095,7 @@ void m68008_device::add_l_adr16_dd_if8() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -218161,12 +218162,12 @@ void m68008_device::add_l_adr16_dd_if8() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218281,7 +218282,7 @@ void m68008_device::add_l_adr32_dd_if8() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -218348,12 +218349,12 @@ void m68008_device::add_l_adr32_dd_if8() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218434,7 +218435,7 @@ void m68008_device::add_l_dpc_dd_if8() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -218501,12 +218502,12 @@ void m68008_device::add_l_dpc_dd_if8() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218554,7 +218555,7 @@ void m68008_device::add_l_dpci_dd_if8() // d0bb f1ff
{
int rx = (m_irdi >> 9) & 7;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -218635,7 +218636,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -218702,12 +218703,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218824,7 +218825,7 @@ void m68008_device::add_l_imm32_dd_if8() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -218858,7 +218859,7 @@ void m68008_device::add_l_imm32_dd_if8() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -218884,7 +218885,7 @@ void m68008_device::adda_w_ds_ad_if8() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -218917,7 +218918,7 @@ void m68008_device::adda_w_ds_ad_if8() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -218942,7 +218943,7 @@ void m68008_device::adda_w_as_ad_if8() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -218975,7 +218976,7 @@ void m68008_device::adda_w_as_ad_if8() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -218998,7 +218999,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219034,7 +219035,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219067,7 +219068,7 @@ void m68008_device::adda_w_ais_ad_if8() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219096,7 +219097,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -219130,7 +219131,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219163,7 +219164,7 @@ void m68008_device::adda_w_aips_ad_if8() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219194,7 +219195,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -219228,7 +219229,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219261,7 +219262,7 @@ void m68008_device::adda_w_pais_ad_if8() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219316,7 +219317,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219352,7 +219353,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219385,7 +219386,7 @@ void m68008_device::adda_w_das_ad_if8() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219406,7 +219407,7 @@ void m68008_device::adda_w_dais_ad_if8() // d0f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -219488,7 +219489,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219524,7 +219525,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219557,7 +219558,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219613,7 +219614,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -219647,7 +219648,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219680,7 +219681,7 @@ void m68008_device::adda_w_adr16_ad_if8() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219767,7 +219768,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -219801,7 +219802,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219834,7 +219835,7 @@ void m68008_device::adda_w_adr32_ad_if8() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219888,7 +219889,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -219924,7 +219925,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -219957,7 +219958,7 @@ void m68008_device::adda_w_dpc_ad_if8() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219977,7 +219978,7 @@ void m68008_device::adda_w_dpci_ad_if8() // d0fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -220059,7 +220060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -220095,7 +220096,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -220128,7 +220129,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -220186,7 +220187,7 @@ void m68008_device::adda_w_imm16_ad_if8() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -220219,7 +220220,7 @@ void m68008_device::adda_w_imm16_ad_if8() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -220244,7 +220245,7 @@ void m68008_device::addx_b_ds_dd_if8() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -220252,7 +220253,7 @@ void m68008_device::addx_b_ds_dd_if8() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -220297,16 +220298,16 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -220325,7 +220326,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
m_icount -= 4;
@@ -220341,7 +220342,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220378,7 +220379,7 @@ void m68008_device::addx_b_pais_paid_if8() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob, m_dbout);
m_icount -= 4;
@@ -220404,7 +220405,7 @@ void m68008_device::add_b_dd_ais_if8() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220425,7 +220426,7 @@ void m68008_device::add_b_dd_ais_if8() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220493,7 +220494,7 @@ void m68008_device::add_b_dd_aips_if8() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -220512,7 +220513,7 @@ void m68008_device::add_b_dd_aips_if8() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220582,7 +220583,7 @@ void m68008_device::add_b_dd_pais_if8() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -220601,7 +220602,7 @@ void m68008_device::add_b_dd_pais_if8() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220695,7 +220696,7 @@ void m68008_device::add_b_dd_das_if8() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220716,7 +220717,7 @@ void m68008_device::add_b_dd_das_if8() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220776,7 +220777,7 @@ void m68008_device::add_b_dd_dais_if8() // d130 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -220858,7 +220859,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -220879,7 +220880,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -220974,7 +220975,7 @@ void m68008_device::add_b_dd_adr16_if8() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -220993,7 +220994,7 @@ void m68008_device::add_b_dd_adr16_if8() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221119,7 +221120,7 @@ void m68008_device::add_b_dd_adr32_if8() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob);
@@ -221138,7 +221139,7 @@ void m68008_device::add_b_dd_adr32_if8() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221202,7 +221203,7 @@ void m68008_device::addx_w_ds_dd_if8() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -221210,7 +221211,7 @@ void m68008_device::addx_w_ds_dd_if8() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221255,16 +221256,16 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221298,7 +221299,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -221329,7 +221330,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221366,7 +221367,7 @@ void m68008_device::addx_w_pais_paid_if8() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -221407,7 +221408,7 @@ void m68008_device::add_w_dd_ais_if8() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221443,7 +221444,7 @@ void m68008_device::add_w_dd_ais_if8() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221526,7 +221527,7 @@ void m68008_device::add_w_dd_aips_if8() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -221560,7 +221561,7 @@ void m68008_device::add_w_dd_aips_if8() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221645,7 +221646,7 @@ void m68008_device::add_w_dd_pais_if8() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -221679,7 +221680,7 @@ void m68008_device::add_w_dd_pais_if8() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221788,7 +221789,7 @@ void m68008_device::add_w_dd_das_if8() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221824,7 +221825,7 @@ void m68008_device::add_w_dd_das_if8() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -221899,7 +221900,7 @@ void m68008_device::add_w_dd_dais_if8() // d170 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -221981,7 +221982,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222017,7 +222018,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222127,7 +222128,7 @@ void m68008_device::add_w_dd_adr16_if8() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -222161,7 +222162,7 @@ void m68008_device::add_w_dd_adr16_if8() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222302,7 +222303,7 @@ void m68008_device::add_w_dd_adr32_if8() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -222336,7 +222337,7 @@ void m68008_device::add_w_dd_adr32_if8() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222415,12 +222416,12 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222450,7 +222451,7 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -222459,7 +222460,7 @@ void m68008_device::addx_l_ds_dd_if8() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -222477,13 +222478,13 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222514,11 +222515,11 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222550,7 +222551,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -222583,7 +222584,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -222618,7 +222619,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -222648,7 +222649,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222685,7 +222686,7 @@ void m68008_device::addx_l_pais_paid_if8() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -222726,7 +222727,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -222793,7 +222794,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -222828,7 +222829,7 @@ void m68008_device::add_l_dd_ais_if8() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -222903,7 +222904,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -222973,7 +222974,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223008,7 +223009,7 @@ void m68008_device::add_l_dd_aips_if8() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223082,7 +223083,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -223154,7 +223155,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223189,7 +223190,7 @@ void m68008_device::add_l_dd_pais_if8() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223295,7 +223296,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -223362,7 +223363,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223397,7 +223398,7 @@ void m68008_device::add_l_dd_das_if8() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223470,7 +223471,7 @@ void m68008_device::add_l_dd_dais_if8() // d1b0 f1f8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -223551,7 +223552,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -223618,7 +223619,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223653,7 +223654,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -223761,7 +223762,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -223828,7 +223829,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -223863,7 +223864,7 @@ void m68008_device::add_l_dd_adr16_if8() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -224002,7 +224003,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -224069,7 +224070,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224104,7 +224105,7 @@ void m68008_device::add_l_dd_adr32_if8() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -224181,7 +224182,7 @@ void m68008_device::adda_l_ds_ad_if8() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -224214,7 +224215,7 @@ void m68008_device::adda_l_ds_ad_if8() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -224239,7 +224240,7 @@ void m68008_device::adda_l_as_ad_if8() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -224272,7 +224273,7 @@ void m68008_device::adda_l_as_ad_if8() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -224295,7 +224296,7 @@ void m68008_device::adda_l_ais_ad_if8() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -224362,11 +224363,11 @@ void m68008_device::adda_l_ais_ad_if8() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -224416,7 +224417,7 @@ void m68008_device::adda_l_aips_ad_if8() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -224486,11 +224487,11 @@ void m68008_device::adda_l_aips_ad_if8() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -224539,7 +224540,7 @@ void m68008_device::adda_l_pais_ad_if8() // d1e0 f1f8
int ry = map_sp((m_irdi & 7) | 8);
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -224611,11 +224612,11 @@ void m68008_device::adda_l_pais_ad_if8() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -224696,7 +224697,7 @@ void m68008_device::adda_l_das_ad_if8() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -224763,11 +224764,11 @@ void m68008_device::adda_l_das_ad_if8() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -224815,7 +224816,7 @@ void m68008_device::adda_l_dais_ad_if8() // d1f0 f1f8
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
int ry = map_sp((m_irdi & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -224896,7 +224897,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -224963,11 +224964,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225050,7 +225051,7 @@ void m68008_device::adda_l_adr16_ad_if8() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -225117,11 +225118,11 @@ void m68008_device::adda_l_adr16_ad_if8() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225235,7 +225236,7 @@ void m68008_device::adda_l_adr32_ad_if8() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -225302,11 +225303,11 @@ void m68008_device::adda_l_adr32_ad_if8() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225386,7 +225387,7 @@ void m68008_device::adda_l_dpc_ad_if8() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225453,11 +225454,11 @@ void m68008_device::adda_l_dpc_ad_if8() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225504,7 +225505,7 @@ void m68008_device::adda_l_dpci_ad_if8() // d1fb f1ff
{
int rx = map_sp(((m_irdi >> 9) & 7) | 8);
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225585,7 +225586,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225652,11 +225653,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -225772,7 +225773,7 @@ void m68008_device::adda_l_imm32_ad_if8() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -225805,7 +225806,7 @@ void m68008_device::adda_l_imm32_ad_if8() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -225829,13 +225830,13 @@ void m68008_device::asr_b_imm3_ds_if8() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225874,7 +225875,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -225904,13 +225905,13 @@ void m68008_device::lsr_b_imm3_ds_if8() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225949,7 +225950,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -225979,13 +225980,13 @@ void m68008_device::roxr_b_imm3_ds_if8() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226024,7 +226025,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226054,13 +226055,13 @@ void m68008_device::ror_b_imm3_ds_if8() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226099,7 +226100,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226130,13 +226131,13 @@ void m68008_device::asr_b_dd_ds_if8() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226175,7 +226176,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226206,13 +226207,13 @@ void m68008_device::lsr_b_dd_ds_if8() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226251,7 +226252,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226282,13 +226283,13 @@ void m68008_device::roxr_b_dd_ds_if8() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226327,7 +226328,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226358,13 +226359,13 @@ void m68008_device::ror_b_dd_ds_if8() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226403,7 +226404,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226433,13 +226434,13 @@ void m68008_device::asr_w_imm3_ds_if8() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226478,7 +226479,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226508,13 +226509,13 @@ void m68008_device::lsr_w_imm3_ds_if8() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226553,7 +226554,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226583,13 +226584,13 @@ void m68008_device::roxr_w_imm3_ds_if8() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226628,7 +226629,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226658,13 +226659,13 @@ void m68008_device::ror_w_imm3_ds_if8() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226703,7 +226704,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -226734,13 +226735,13 @@ void m68008_device::asr_w_dd_ds_if8() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226779,7 +226780,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226810,13 +226811,13 @@ void m68008_device::lsr_w_dd_ds_if8() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226855,7 +226856,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226886,13 +226887,13 @@ void m68008_device::roxr_w_dd_ds_if8() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226931,7 +226932,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -226962,13 +226963,13 @@ void m68008_device::ror_w_dd_ds_if8() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227007,7 +227008,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227037,13 +227038,13 @@ void m68008_device::asr_l_imm3_ds_if8() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227082,7 +227083,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227099,7 +227100,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227118,13 +227119,13 @@ void m68008_device::lsr_l_imm3_ds_if8() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227163,7 +227164,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227180,7 +227181,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227199,13 +227200,13 @@ void m68008_device::roxr_l_imm3_ds_if8() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227244,7 +227245,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227261,7 +227262,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227280,13 +227281,13 @@ void m68008_device::ror_l_imm3_ds_if8() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227325,7 +227326,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227342,7 +227343,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227362,13 +227363,13 @@ void m68008_device::asr_l_dd_ds_if8() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227407,7 +227408,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227424,7 +227425,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227444,13 +227445,13 @@ void m68008_device::lsr_l_dd_ds_if8() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227489,7 +227490,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227506,7 +227507,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227526,13 +227527,13 @@ void m68008_device::roxr_l_dd_ds_if8() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227571,7 +227572,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -227588,7 +227589,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227608,13 +227609,13 @@ void m68008_device::ror_l_dd_ds_if8() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227653,7 +227654,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -227670,7 +227671,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -227688,7 +227689,7 @@ void m68008_device::asr_ais_if8() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -227724,12 +227725,12 @@ void m68008_device::asr_ais_if8() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227812,7 +227813,7 @@ void m68008_device::asr_aips_if8() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -227846,12 +227847,12 @@ void m68008_device::asr_aips_if8() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227936,7 +227937,7 @@ void m68008_device::asr_pais_if8() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -227970,12 +227971,12 @@ void m68008_device::asr_pais_if8() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228084,7 +228085,7 @@ void m68008_device::asr_das_if8() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -228120,12 +228121,12 @@ void m68008_device::asr_das_if8() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228200,7 +228201,7 @@ void m68008_device::asr_dais_if8() // e0f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -228282,7 +228283,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -228318,12 +228319,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228433,7 +228434,7 @@ void m68008_device::asr_adr16_if8() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -228467,12 +228468,12 @@ void m68008_device::asr_adr16_if8() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228613,7 +228614,7 @@ void m68008_device::asr_adr32_if8() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -228647,12 +228648,12 @@ void m68008_device::asr_adr32_if8() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228730,13 +228731,13 @@ void m68008_device::asl_b_imm3_ds_if8() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228775,7 +228776,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228805,13 +228806,13 @@ void m68008_device::lsl_b_imm3_ds_if8() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228850,7 +228851,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228864,7 +228865,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -228881,13 +228882,13 @@ void m68008_device::roxl_b_imm3_ds_if8() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228926,7 +228927,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -228956,13 +228957,13 @@ void m68008_device::rol_b_imm3_ds_if8() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229001,7 +229002,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229032,13 +229033,13 @@ void m68008_device::asl_b_dd_ds_if8() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229077,7 +229078,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229108,13 +229109,13 @@ void m68008_device::lsl_b_dd_ds_if8() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229153,7 +229154,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229167,7 +229168,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229185,13 +229186,13 @@ void m68008_device::roxl_b_dd_ds_if8() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229230,7 +229231,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229261,13 +229262,13 @@ void m68008_device::rol_b_dd_ds_if8() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229306,7 +229307,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229336,13 +229337,13 @@ void m68008_device::asl_w_imm3_ds_if8() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229381,7 +229382,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229411,13 +229412,13 @@ void m68008_device::lsl_w_imm3_ds_if8() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229456,7 +229457,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229470,7 +229471,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229487,13 +229488,13 @@ void m68008_device::roxl_w_imm3_ds_if8() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229532,7 +229533,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229562,13 +229563,13 @@ void m68008_device::rol_w_imm3_ds_if8() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229607,7 +229608,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229638,13 +229639,13 @@ void m68008_device::asl_w_dd_ds_if8() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229683,7 +229684,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229714,13 +229715,13 @@ void m68008_device::lsl_w_dd_ds_if8() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229759,7 +229760,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229773,7 +229774,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -229791,13 +229792,13 @@ void m68008_device::roxl_w_dd_ds_if8() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229836,7 +229837,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -229867,13 +229868,13 @@ void m68008_device::rol_w_dd_ds_if8() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229912,7 +229913,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -229942,13 +229943,13 @@ void m68008_device::asl_l_imm3_ds_if8() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229987,7 +229988,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230004,7 +230005,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230023,13 +230024,13 @@ void m68008_device::lsl_l_imm3_ds_if8() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230068,7 +230069,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230080,14 +230081,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230106,13 +230107,13 @@ void m68008_device::roxl_l_imm3_ds_if8() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230151,7 +230152,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230168,7 +230169,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230187,13 +230188,13 @@ void m68008_device::rol_l_imm3_ds_if8() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230232,7 +230233,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -230249,7 +230250,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230269,13 +230270,13 @@ void m68008_device::asl_l_dd_ds_if8() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230314,7 +230315,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230331,7 +230332,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230351,13 +230352,13 @@ void m68008_device::lsl_l_dd_ds_if8() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230396,7 +230397,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230408,14 +230409,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230435,13 +230436,13 @@ void m68008_device::roxl_l_dd_ds_if8() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230480,7 +230481,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -230497,7 +230498,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230517,13 +230518,13 @@ void m68008_device::rol_l_dd_ds_if8() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230562,7 +230563,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -230579,7 +230580,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -230597,7 +230598,7 @@ void m68008_device::asl_ais_if8() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -230633,12 +230634,12 @@ void m68008_device::asl_ais_if8() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230721,7 +230722,7 @@ void m68008_device::asl_aips_if8() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230755,12 +230756,12 @@ void m68008_device::asl_aips_if8() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230845,7 +230846,7 @@ void m68008_device::asl_pais_if8() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230879,12 +230880,12 @@ void m68008_device::asl_pais_if8() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230993,7 +230994,7 @@ void m68008_device::asl_das_if8() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231029,12 +231030,12 @@ void m68008_device::asl_das_if8() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231109,7 +231110,7 @@ void m68008_device::asl_dais_if8() // e1f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -231191,7 +231192,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231227,12 +231228,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231342,7 +231343,7 @@ void m68008_device::asl_adr16_if8() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231376,12 +231377,12 @@ void m68008_device::asl_adr16_if8() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231522,7 +231523,7 @@ void m68008_device::asl_adr32_if8() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231556,12 +231557,12 @@ void m68008_device::asl_adr32_if8() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231638,7 +231639,7 @@ void m68008_device::lsr_ais_if8() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -231674,12 +231675,12 @@ void m68008_device::lsr_ais_if8() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231762,7 +231763,7 @@ void m68008_device::lsr_aips_if8() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231796,12 +231797,12 @@ void m68008_device::lsr_aips_if8() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231886,7 +231887,7 @@ void m68008_device::lsr_pais_if8() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231920,12 +231921,12 @@ void m68008_device::lsr_pais_if8() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232034,7 +232035,7 @@ void m68008_device::lsr_das_if8() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -232070,12 +232071,12 @@ void m68008_device::lsr_das_if8() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232150,7 +232151,7 @@ void m68008_device::lsr_dais_if8() // e2f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -232232,7 +232233,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -232268,12 +232269,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232383,7 +232384,7 @@ void m68008_device::lsr_adr16_if8() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -232417,12 +232418,12 @@ void m68008_device::lsr_adr16_if8() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232563,7 +232564,7 @@ void m68008_device::lsr_adr32_if8() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -232597,12 +232598,12 @@ void m68008_device::lsr_adr32_if8() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232679,11 +232680,11 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -232716,12 +232717,12 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232758,7 +232759,7 @@ void m68008_device::lsl_ais_if8() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -232802,12 +232803,12 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -232841,12 +232842,12 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232883,7 +232884,7 @@ void m68008_device::lsl_aips_if8() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -232926,7 +232927,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -232934,7 +232935,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -232968,12 +232969,12 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233010,7 +233011,7 @@ void m68008_device::lsl_pais_if8() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233051,7 +233052,7 @@ void m68008_device::lsl_das_if8() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233084,11 +233085,11 @@ void m68008_device::lsl_das_if8() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233121,12 +233122,12 @@ void m68008_device::lsl_das_if8() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233163,7 +233164,7 @@ void m68008_device::lsl_das_if8() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233202,14 +233203,14 @@ void m68008_device::lsl_dais_if8() // e3f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -233217,7 +233218,7 @@ void m68008_device::lsl_dais_if8() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233251,7 +233252,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233287,11 +233288,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233324,12 +233325,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233366,7 +233367,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233409,7 +233410,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -233442,7 +233443,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -233476,12 +233477,12 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233518,7 +233519,7 @@ void m68008_device::lsl_adr16_if8() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233559,7 +233560,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
m_icount -= 4;
@@ -233593,7 +233594,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -233626,7 +233627,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -233660,12 +233661,12 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233702,7 +233703,7 @@ void m68008_device::lsl_adr32_if8() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
m_icount -= 4;
@@ -233743,7 +233744,7 @@ void m68008_device::roxr_ais_if8() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -233779,12 +233780,12 @@ void m68008_device::roxr_ais_if8() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233867,7 +233868,7 @@ void m68008_device::roxr_aips_if8() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -233901,12 +233902,12 @@ void m68008_device::roxr_aips_if8() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233991,7 +233992,7 @@ void m68008_device::roxr_pais_if8() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -234025,12 +234026,12 @@ void m68008_device::roxr_pais_if8() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234139,7 +234140,7 @@ void m68008_device::roxr_das_if8() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234175,12 +234176,12 @@ void m68008_device::roxr_das_if8() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234255,7 +234256,7 @@ void m68008_device::roxr_dais_if8() // e4f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -234337,7 +234338,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234373,12 +234374,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234488,7 +234489,7 @@ void m68008_device::roxr_adr16_if8() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -234522,12 +234523,12 @@ void m68008_device::roxr_adr16_if8() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234668,7 +234669,7 @@ void m68008_device::roxr_adr32_if8() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -234702,12 +234703,12 @@ void m68008_device::roxr_adr32_if8() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234784,7 +234785,7 @@ void m68008_device::roxl_ais_if8() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -234820,12 +234821,12 @@ void m68008_device::roxl_ais_if8() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234908,7 +234909,7 @@ void m68008_device::roxl_aips_if8() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -234942,12 +234943,12 @@ void m68008_device::roxl_aips_if8() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235032,7 +235033,7 @@ void m68008_device::roxl_pais_if8() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235066,12 +235067,12 @@ void m68008_device::roxl_pais_if8() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235180,7 +235181,7 @@ void m68008_device::roxl_das_if8() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235216,12 +235217,12 @@ void m68008_device::roxl_das_if8() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235296,7 +235297,7 @@ void m68008_device::roxl_dais_if8() // e5f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -235378,7 +235379,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235414,12 +235415,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235529,7 +235530,7 @@ void m68008_device::roxl_adr16_if8() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235563,12 +235564,12 @@ void m68008_device::roxl_adr16_if8() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235709,7 +235710,7 @@ void m68008_device::roxl_adr32_if8() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235743,12 +235744,12 @@ void m68008_device::roxl_adr32_if8() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235825,7 +235826,7 @@ void m68008_device::ror_ais_if8() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -235861,12 +235862,12 @@ void m68008_device::ror_ais_if8() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -235949,7 +235950,7 @@ void m68008_device::ror_aips_if8() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235983,12 +235984,12 @@ void m68008_device::ror_aips_if8() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236073,7 +236074,7 @@ void m68008_device::ror_pais_if8() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -236107,12 +236108,12 @@ void m68008_device::ror_pais_if8() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236221,7 +236222,7 @@ void m68008_device::ror_das_if8() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236257,12 +236258,12 @@ void m68008_device::ror_das_if8() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236337,7 +236338,7 @@ void m68008_device::ror_dais_if8() // e6f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -236419,7 +236420,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236455,12 +236456,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236570,7 +236571,7 @@ void m68008_device::ror_adr16_if8() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -236604,12 +236605,12 @@ void m68008_device::ror_adr16_if8() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236750,7 +236751,7 @@ void m68008_device::ror_adr32_if8() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -236784,12 +236785,12 @@ void m68008_device::ror_adr32_if8() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236866,7 +236867,7 @@ void m68008_device::rol_ais_if8() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -236902,12 +236903,12 @@ void m68008_device::rol_ais_if8() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -236990,7 +236991,7 @@ void m68008_device::rol_aips_if8() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237024,12 +237025,12 @@ void m68008_device::rol_aips_if8() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237114,7 +237115,7 @@ void m68008_device::rol_pais_if8() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237148,12 +237149,12 @@ void m68008_device::rol_pais_if8() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237262,7 +237263,7 @@ void m68008_device::rol_das_if8() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -237298,12 +237299,12 @@ void m68008_device::rol_das_if8() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237378,7 +237379,7 @@ void m68008_device::rol_dais_if8() // e7f0 fff8
int rx = (m_irdi >> 9) & 7;
int ry = map_sp((m_irdi & 7) | 8);
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -237460,7 +237461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -237496,12 +237497,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237611,7 +237612,7 @@ void m68008_device::rol_adr16_if8() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237645,12 +237646,12 @@ void m68008_device::rol_adr16_if8() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237791,7 +237792,7 @@ void m68008_device::rol_adr32_if8() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237825,12 +237826,12 @@ void m68008_device::rol_adr32_if8() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68008-sip8.cpp b/src/devices/cpu/m68000/m68008-sip8.cpp
index c56baef48f3..33610de164c 100644
--- a/src/devices/cpu/m68000/m68008-sip8.cpp
+++ b/src/devices/cpu/m68000/m68008-sip8.cpp
@@ -281,7 +281,7 @@ void m68008_device::state_bus_error_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -291,7 +291,7 @@ void m68008_device::state_bus_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -329,7 +329,7 @@ void m68008_device::state_bus_error_ip8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -366,7 +366,7 @@ void m68008_device::state_bus_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -407,7 +407,7 @@ void m68008_device::state_bus_error_ip8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -444,7 +444,7 @@ void m68008_device::state_bus_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 17:
@@ -484,7 +484,7 @@ void m68008_device::state_bus_error_ip8()
m_da[16] = m_au;
m_ftu = 0x0008;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 21:
@@ -522,7 +522,7 @@ void m68008_device::state_bus_error_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 25:
@@ -729,7 +729,7 @@ void m68008_device::state_address_error_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -739,7 +739,7 @@ void m68008_device::state_address_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 1:
@@ -777,7 +777,7 @@ void m68008_device::state_address_error_ip8()
m_dbout = m_aluo;
m_ftu = m_ird;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 5:
@@ -814,7 +814,7 @@ void m68008_device::state_address_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 9:
@@ -855,7 +855,7 @@ void m68008_device::state_address_error_ip8()
m_pc = m_at;
m_ftu = (m_ftu & ~0x1f) | m_ssw;
m_au = m_au - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=11:m_at d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 13:
@@ -892,7 +892,7 @@ void m68008_device::state_address_error_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 17:
@@ -932,7 +932,7 @@ void m68008_device::state_address_error_ip8()
m_da[16] = m_au;
m_ftu = 0x000c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 21:
@@ -970,7 +970,7 @@ void m68008_device::state_address_error_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N | SSW_CRITICAL;
[[fallthrough]]; case 25:
@@ -1187,7 +1187,7 @@ void m68008_device::state_interrupt_ip8()
m_pc = m_au;
m_sr = (m_sr & ~SR_I) | ((m_next_state >> 16) & SR_I);
update_interrupt();
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_icount -= 2;
// 235 itlx3
@@ -1199,7 +1199,7 @@ void m68008_device::state_interrupt_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1267,7 +1267,7 @@ void m68008_device::state_interrupt_ip8()
m_da[16] = m_au;
m_ftu = m_int_vector;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 7:
@@ -1305,7 +1305,7 @@ void m68008_device::state_interrupt_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 11:
@@ -1510,7 +1510,7 @@ void m68008_device::state_trace_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1520,7 +1520,7 @@ void m68008_device::state_trace_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1560,7 +1560,7 @@ void m68008_device::state_trace_ip8()
m_da[16] = m_au;
m_ftu = 0x0024;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1598,7 +1598,7 @@ void m68008_device::state_trace_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -1803,7 +1803,7 @@ void m68008_device::state_illegal_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -1813,7 +1813,7 @@ void m68008_device::state_illegal_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -1853,7 +1853,7 @@ void m68008_device::state_illegal_ip8()
m_da[16] = m_au;
m_ftu = 0x0010;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -1891,7 +1891,7 @@ void m68008_device::state_illegal_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2096,7 +2096,7 @@ void m68008_device::state_priviledge_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2106,7 +2106,7 @@ void m68008_device::state_priviledge_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2146,7 +2146,7 @@ void m68008_device::state_priviledge_ip8()
m_da[16] = m_au;
m_ftu = 0x0020;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2184,7 +2184,7 @@ void m68008_device::state_priviledge_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2389,7 +2389,7 @@ void m68008_device::state_linea_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2399,7 +2399,7 @@ void m68008_device::state_linea_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2439,7 +2439,7 @@ void m68008_device::state_linea_ip8()
m_da[16] = m_au;
m_ftu = 0x0028;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2477,7 +2477,7 @@ void m68008_device::state_linea_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2682,7 +2682,7 @@ void m68008_device::state_linef_ip8()
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -2692,7 +2692,7 @@ void m68008_device::state_linef_ip8()
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 1:
@@ -2732,7 +2732,7 @@ void m68008_device::state_linef_ip8()
m_da[16] = m_au;
m_ftu = 0x002c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 5:
@@ -2770,7 +2770,7 @@ void m68008_device::state_linef_ip8()
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_N;
[[fallthrough]]; case 9:
@@ -2972,7 +2972,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3010,7 +3010,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -3018,7 +3018,7 @@ void m68008_device::ori_b_imm8_ds_ip8() // 0000 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3071,7 +3071,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3108,11 +3108,11 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -3132,7 +3132,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3174,7 +3174,7 @@ void m68008_device::ori_b_imm8_ais_ip8() // 0010 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -3207,7 +3207,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3247,12 +3247,12 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -3273,7 +3273,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3315,7 +3315,7 @@ void m68008_device::ori_b_imm8_aips_ip8() // 0018 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -3348,7 +3348,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3387,7 +3387,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -3395,7 +3395,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -3416,7 +3416,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3458,7 +3458,7 @@ void m68008_device::ori_b_imm8_pais_ip8() // 0020 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -3491,7 +3491,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3528,7 +3528,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3566,11 +3566,11 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -3590,7 +3590,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3632,7 +3632,7 @@ void m68008_device::ori_b_imm8_das_ip8() // 0028 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -3665,7 +3665,7 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3700,14 +3700,14 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -3715,7 +3715,7 @@ void m68008_device::ori_b_imm8_dais_ip8() // 0030 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3754,7 +3754,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3795,11 +3795,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -3819,7 +3819,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -3861,7 +3861,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -3893,7 +3893,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -3933,7 +3933,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -3971,7 +3971,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -3992,7 +3992,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4034,7 +4034,7 @@ void m68008_device::ori_b_imm8_adr16_ip8() // 0038 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -4066,7 +4066,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4104,7 +4104,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4143,7 +4143,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -4181,7 +4181,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -4202,7 +4202,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4244,7 +4244,7 @@ void m68008_device::ori_b_imm8_adr32_ip8() // 0039 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_mmu8->write_data(m_aob, m_dbout);
@@ -4276,7 +4276,7 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4313,21 +4313,21 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=b...... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -4335,7 +4335,7 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4374,11 +4374,11 @@ void m68008_device::ori_imm8_ccr_ip8() // 003c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4431,7 +4431,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4469,7 +4469,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -4477,7 +4477,7 @@ void m68008_device::ori_w_imm16_ds_ip8() // 0040 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4530,7 +4530,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4567,11 +4567,11 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -4609,7 +4609,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4651,7 +4651,7 @@ void m68008_device::ori_w_imm16_ais_ip8() // 0050 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -4702,7 +4702,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4742,12 +4742,12 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4786,7 +4786,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -4828,7 +4828,7 @@ void m68008_device::ori_w_imm16_aips_ip8() // 0058 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -4879,7 +4879,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -4918,7 +4918,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -4926,7 +4926,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -4965,7 +4965,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5007,7 +5007,7 @@ void m68008_device::ori_w_imm16_pais_ip8() // 0060 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -5058,7 +5058,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5095,7 +5095,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5133,11 +5133,11 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -5175,7 +5175,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5217,7 +5217,7 @@ void m68008_device::ori_w_imm16_das_ip8() // 0068 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -5268,7 +5268,7 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5303,14 +5303,14 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -5318,7 +5318,7 @@ void m68008_device::ori_w_imm16_dais_ip8() // 0070 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5357,7 +5357,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5398,11 +5398,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -5440,7 +5440,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5482,7 +5482,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -5532,7 +5532,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5572,7 +5572,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -5610,7 +5610,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -5649,7 +5649,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5691,7 +5691,7 @@ void m68008_device::ori_w_imm16_adr16_ip8() // 0078 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -5741,7 +5741,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5779,7 +5779,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -5818,7 +5818,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -5856,7 +5856,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -5895,7 +5895,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -5937,7 +5937,7 @@ void m68008_device::ori_w_imm16_adr32_ip8() // 0079 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -5991,7 +5991,7 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6028,23 +6028,23 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=14 c=2 m=..... i=....... 8 a=37:m_ftu d=9:m_dt
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_or(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -6052,7 +6052,7 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6091,11 +6091,11 @@ void m68008_device::ori_i16u_sr_ip8() // 007c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6147,7 +6147,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6185,7 +6185,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6223,12 +6223,12 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6263,7 +6263,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=18:m_da[ry]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=18:m_da[ry]
alu_or(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -6272,7 +6272,7 @@ void m68008_device::ori_l_imm32_ds_ip8() // 0080 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -6292,7 +6292,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6330,7 +6330,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6367,7 +6367,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6407,7 +6407,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6445,7 +6445,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6485,7 +6485,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6525,7 +6525,7 @@ void m68008_device::ori_l_imm32_ais_ip8() // 0090 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -6575,7 +6575,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6613,7 +6613,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6650,7 +6650,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -6690,11 +6690,11 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6732,7 +6732,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -6772,7 +6772,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -6812,7 +6812,7 @@ void m68008_device::ori_l_imm32_aips_ip8() // 0098 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -6862,7 +6862,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6900,7 +6900,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -6936,14 +6936,14 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -6982,7 +6982,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -7020,7 +7020,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7060,7 +7060,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7100,7 +7100,7 @@ void m68008_device::ori_l_imm32_pais_ip8() // 00a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -7150,7 +7150,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7188,7 +7188,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7225,7 +7225,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7262,7 +7262,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -7302,7 +7302,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -7340,7 +7340,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7380,7 +7380,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7420,7 +7420,7 @@ void m68008_device::ori_l_imm32_das_ip8() // 00a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -7470,7 +7470,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7508,7 +7508,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7543,14 +7543,14 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -7558,7 +7558,7 @@ void m68008_device::ori_l_imm32_dais_ip8() // 00b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7597,7 +7597,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7637,7 +7637,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -7677,7 +7677,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -7715,7 +7715,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -7755,7 +7755,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -7795,7 +7795,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -7844,7 +7844,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7882,7 +7882,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -7922,7 +7922,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -7960,7 +7960,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -8000,7 +8000,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -8038,7 +8038,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -8078,7 +8078,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -8118,7 +8118,7 @@ void m68008_device::ori_l_imm32_adr16_ip8() // 00b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -8167,7 +8167,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8205,7 +8205,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8243,7 +8243,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8282,7 +8282,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -8320,7 +8320,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -8360,7 +8360,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -8398,7 +8398,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -8438,7 +8438,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=R.alue:m_alue
alu_or(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -8478,7 +8478,7 @@ void m68008_device::ori_l_imm32_adr32_ip8() // 00b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -8532,13 +8532,13 @@ void m68008_device::btst_dd_ds_ip8() // 0100 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -8582,7 +8582,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8596,7 +8596,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -8618,7 +8618,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8
// 1d2 mpiw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8655,7 +8655,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8
// 29a mpiw2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -8674,7 +8674,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_data(m_aob);
@@ -8696,7 +8696,7 @@ void m68008_device::movep_w_das_dd_ip8() // 0108 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8748,11 +8748,11 @@ void m68008_device::btst_dd_ais_ip8() // 0110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -8772,13 +8772,13 @@ void m68008_device::btst_dd_ais_ip8() // 0110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8833,12 +8833,12 @@ void m68008_device::btst_dd_aips_ip8() // 0118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8859,13 +8859,13 @@ void m68008_device::btst_dd_aips_ip8() // 0118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -8919,7 +8919,7 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -8927,7 +8927,7 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -8948,13 +8948,13 @@ void m68008_device::btst_dd_pais_ip8() // 0120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9006,7 +9006,7 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9044,11 +9044,11 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -9068,13 +9068,13 @@ void m68008_device::btst_dd_das_ip8() // 0128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9124,14 +9124,14 @@ void m68008_device::btst_dd_dais_ip8() // 0130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9139,7 +9139,7 @@ void m68008_device::btst_dd_dais_ip8() // 0130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9178,7 +9178,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9219,11 +9219,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -9243,13 +9243,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9303,7 +9303,7 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -9341,7 +9341,7 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -9362,13 +9362,13 @@ void m68008_device::btst_dd_adr16_ip8() // 0138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9420,7 +9420,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9459,7 +9459,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9497,7 +9497,7 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -9518,13 +9518,13 @@ void m68008_device::btst_dd_adr32_ip8() // 0139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9575,7 +9575,7 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9613,11 +9613,11 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -9637,13 +9637,13 @@ void m68008_device::btst_dd_dpc_ip8() // 013a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9692,14 +9692,14 @@ void m68008_device::btst_dd_dpci_ip8() // 013b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -9707,7 +9707,7 @@ void m68008_device::btst_dd_dpci_ip8() // 013b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9746,7 +9746,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9787,11 +9787,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -9811,13 +9811,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9871,7 +9871,7 @@ void m68008_device::btst_dd_imm_ip8() // 013c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -9911,12 +9911,12 @@ void m68008_device::btst_dd_imm_ip8() // 013c f1ff
m_pc = m_au;
m_dcr = m_da[rx];
set_16h(m_dt, high16(m_at));
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_dt;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=9:m_dt d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -9960,7 +9960,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_dt, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -9974,7 +9974,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=23:m_dt d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=23:m_dt d=R.dcro8:m_dcro8
alu_and8(high16(m_dt), 1 << (m_dcr & 7));
sr_z();
set_ftu_const();
@@ -10000,13 +10000,13 @@ void m68008_device::bchg_dd_ds_ip8() // 0140 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10050,7 +10050,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10063,14 +10063,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -10092,7 +10092,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
// 1d6 mpil1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10129,7 +10129,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
// 29e mpil2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -10147,7 +10147,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
// 34e mpil3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_data(m_aob);
@@ -10166,7 +10166,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
m_aob = m_au;
set_16h(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -10185,7 +10185,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
m_aob = m_au;
m_ir = m_irc;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_data(m_aob);
@@ -10207,7 +10207,7 @@ void m68008_device::movep_l_das_dd_ip8() // 0148 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10259,11 +10259,11 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -10284,7 +10284,7 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10324,7 +10324,7 @@ void m68008_device::bchg_dd_ais_ip8() // 0150 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10361,12 +10361,12 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -10388,7 +10388,7 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10428,7 +10428,7 @@ void m68008_device::bchg_dd_aips_ip8() // 0158 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10464,7 +10464,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -10472,7 +10472,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -10494,7 +10494,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -10534,7 +10534,7 @@ void m68008_device::bchg_dd_pais_ip8() // 0160 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10568,7 +10568,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10606,11 +10606,11 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -10631,7 +10631,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10671,7 +10671,7 @@ void m68008_device::bchg_dd_das_ip8() // 0168 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10703,14 +10703,14 @@ void m68008_device::bchg_dd_dais_ip8() // 0170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -10718,7 +10718,7 @@ void m68008_device::bchg_dd_dais_ip8() // 0170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10757,7 +10757,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -10798,11 +10798,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -10823,7 +10823,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10863,7 +10863,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -10899,7 +10899,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -10937,7 +10937,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -10959,7 +10959,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -10999,7 +10999,7 @@ void m68008_device::bchg_dd_adr16_ip8() // 0178 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11033,7 +11033,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11072,7 +11072,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -11110,7 +11110,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -11132,7 +11132,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -11172,7 +11172,7 @@ void m68008_device::bchg_dd_adr32_ip8() // 0179 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11210,13 +11210,13 @@ void m68008_device::bclr_dd_ds_ip8() // 0180 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -11257,14 +11257,14 @@ void m68008_device::bclr_dd_ds_ip8() // 0180 f1f8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -11277,18 +11277,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -11310,7 +11310,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8
// 1ca mpow1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11349,7 +11349,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu8->write_data(m_aob, m_dbout);
@@ -11367,7 +11367,7 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -11386,11 +11386,11 @@ void m68008_device::movep_w_dd_das_ip8() // 0188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11442,11 +11442,11 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -11466,12 +11466,12 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11511,7 +11511,7 @@ void m68008_device::bclr_dd_ais_ip8() // 0190 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11548,12 +11548,12 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -11574,12 +11574,12 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11619,7 +11619,7 @@ void m68008_device::bclr_dd_aips_ip8() // 0198 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11655,7 +11655,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -11663,7 +11663,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -11684,12 +11684,12 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -11729,7 +11729,7 @@ void m68008_device::bclr_dd_pais_ip8() // 01a0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11763,7 +11763,7 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11801,11 +11801,11 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -11825,12 +11825,12 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -11870,7 +11870,7 @@ void m68008_device::bclr_dd_das_ip8() // 01a8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -11902,14 +11902,14 @@ void m68008_device::bclr_dd_dais_ip8() // 01b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -11917,7 +11917,7 @@ void m68008_device::bclr_dd_dais_ip8() // 01b0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11956,7 +11956,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -11997,11 +11997,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -12021,12 +12021,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -12066,7 +12066,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12102,7 +12102,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -12140,7 +12140,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -12161,12 +12161,12 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -12206,7 +12206,7 @@ void m68008_device::bclr_dd_adr16_ip8() // 01b8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12240,7 +12240,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -12279,7 +12279,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -12317,7 +12317,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -12338,12 +12338,12 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -12383,7 +12383,7 @@ void m68008_device::bclr_dd_adr32_ip8() // 01b9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12421,13 +12421,13 @@ void m68008_device::bset_dd_ds_ip8() // 01c0 f1f8
m_dcr = m_da[rx];
m_at = m_da[rx];
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_or(m_da[rx], m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -12471,7 +12471,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -12484,14 +12484,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -12513,7 +12513,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
// 1ce mpol1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -12551,7 +12551,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
m_aob = m_au;
set_8xh(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
m_mmu8->write_data(m_aob, m_dbout);
@@ -12569,7 +12569,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, high16(m_da[rx]));
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=16:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=16:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -12588,7 +12588,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
m_ir = m_irc;
set_8xh(m_dbout, m_da[rx]);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=2:m_da[rx]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dxl:m_da[rx]
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob, m_dbout);
@@ -12606,7 +12606,7 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
m_aob = m_au;
set_8xl(m_dbout, m_da[rx]);
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -12625,11 +12625,11 @@ void m68008_device::movep_l_dd_das_ip8() // 01c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -12681,11 +12681,11 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -12706,7 +12706,7 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12746,7 +12746,7 @@ void m68008_device::bset_dd_ais_ip8() // 01d0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12783,12 +12783,12 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -12810,7 +12810,7 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12850,7 +12850,7 @@ void m68008_device::bset_dd_aips_ip8() // 01d8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12886,7 +12886,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -12894,7 +12894,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -12916,7 +12916,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
@@ -12956,7 +12956,7 @@ void m68008_device::bset_dd_pais_ip8() // 01e0 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -12990,7 +12990,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13028,11 +13028,11 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -13053,7 +13053,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13093,7 +13093,7 @@ void m68008_device::bset_dd_das_ip8() // 01e8 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13125,14 +13125,14 @@ void m68008_device::bset_dd_dais_ip8() // 01f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -13140,7 +13140,7 @@ void m68008_device::bset_dd_dais_ip8() // 01f0 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13179,7 +13179,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13220,11 +13220,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -13245,7 +13245,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13285,7 +13285,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13321,7 +13321,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -13359,7 +13359,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13381,7 +13381,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -13421,7 +13421,7 @@ void m68008_device::bset_dd_adr16_ip8() // 01f8 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13455,7 +13455,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13494,7 +13494,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -13532,7 +13532,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -13554,7 +13554,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -13594,7 +13594,7 @@ void m68008_device::bset_dd_adr32_ip8() // 01f9 f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -13629,7 +13629,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13667,7 +13667,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -13675,7 +13675,7 @@ void m68008_device::andi_b_imm8_ds_ip8() // 0200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13728,7 +13728,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13765,11 +13765,11 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -13789,7 +13789,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13831,7 +13831,7 @@ void m68008_device::andi_b_imm8_ais_ip8() // 0210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -13864,7 +13864,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -13904,12 +13904,12 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -13930,7 +13930,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -13972,7 +13972,7 @@ void m68008_device::andi_b_imm8_aips_ip8() // 0218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14005,7 +14005,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14044,7 +14044,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -14052,7 +14052,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -14073,7 +14073,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14115,7 +14115,7 @@ void m68008_device::andi_b_imm8_pais_ip8() // 0220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14148,7 +14148,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14185,7 +14185,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14223,11 +14223,11 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -14247,7 +14247,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14289,7 +14289,7 @@ void m68008_device::andi_b_imm8_das_ip8() // 0228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14322,7 +14322,7 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14357,14 +14357,14 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -14372,7 +14372,7 @@ void m68008_device::andi_b_imm8_dais_ip8() // 0230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14411,7 +14411,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14452,11 +14452,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -14476,7 +14476,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14518,7 +14518,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14550,7 +14550,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14590,7 +14590,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -14628,7 +14628,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -14649,7 +14649,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14691,7 +14691,7 @@ void m68008_device::andi_b_imm8_adr16_ip8() // 0238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14723,7 +14723,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14761,7 +14761,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14800,7 +14800,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -14838,7 +14838,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -14859,7 +14859,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -14901,7 +14901,7 @@ void m68008_device::andi_b_imm8_adr32_ip8() // 0239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_mmu8->write_data(m_aob, m_dbout);
@@ -14933,7 +14933,7 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -14970,21 +14970,21 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=b...... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=b...... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -14992,7 +14992,7 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15031,11 +15031,11 @@ void m68008_device::andi_imm8_ccr_ip8() // 023c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15088,7 +15088,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15126,7 +15126,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -15134,7 +15134,7 @@ void m68008_device::andi_w_imm16_ds_ip8() // 0240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15187,7 +15187,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15224,11 +15224,11 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -15266,7 +15266,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15308,7 +15308,7 @@ void m68008_device::andi_w_imm16_ais_ip8() // 0250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -15359,7 +15359,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15399,12 +15399,12 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15443,7 +15443,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15485,7 +15485,7 @@ void m68008_device::andi_w_imm16_aips_ip8() // 0258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -15536,7 +15536,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15575,7 +15575,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -15583,7 +15583,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -15622,7 +15622,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15664,7 +15664,7 @@ void m68008_device::andi_w_imm16_pais_ip8() // 0260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -15715,7 +15715,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15752,7 +15752,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15790,11 +15790,11 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -15832,7 +15832,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -15874,7 +15874,7 @@ void m68008_device::andi_w_imm16_das_ip8() // 0268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -15925,7 +15925,7 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -15960,14 +15960,14 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -15975,7 +15975,7 @@ void m68008_device::andi_w_imm16_dais_ip8() // 0270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16014,7 +16014,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16055,11 +16055,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -16097,7 +16097,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16139,7 +16139,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -16189,7 +16189,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16229,7 +16229,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -16267,7 +16267,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -16306,7 +16306,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16348,7 +16348,7 @@ void m68008_device::andi_w_imm16_adr16_ip8() // 0278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -16398,7 +16398,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16436,7 +16436,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16475,7 +16475,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -16513,7 +16513,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -16552,7 +16552,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -16594,7 +16594,7 @@ void m68008_device::andi_w_imm16_adr32_ip8() // 0279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -16648,7 +16648,7 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16685,23 +16685,23 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=4 c=2 m=..... i=....... 1 a=37:m_ftu d=9:m_dt
+ // alu r=4 c=2 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=R.dtl:m_dt
alu_and(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -16709,7 +16709,7 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16748,11 +16748,11 @@ void m68008_device::andi_i16u_sr_ip8() // 027c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16804,7 +16804,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16842,7 +16842,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16880,12 +16880,12 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=4:m_da[ry]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_and(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16920,7 +16920,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=18:m_da[ry]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=18:m_da[ry]
alu_and(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -16929,7 +16929,7 @@ void m68008_device::andi_l_imm32_ds_ip8() // 0280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -16949,7 +16949,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -16987,7 +16987,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17024,7 +17024,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -17064,7 +17064,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -17102,7 +17102,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17142,7 +17142,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17182,7 +17182,7 @@ void m68008_device::andi_l_imm32_ais_ip8() // 0290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -17232,7 +17232,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17270,7 +17270,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17307,7 +17307,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -17347,11 +17347,11 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -17389,7 +17389,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17429,7 +17429,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17469,7 +17469,7 @@ void m68008_device::andi_l_imm32_aips_ip8() // 0298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -17519,7 +17519,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17557,7 +17557,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17593,14 +17593,14 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -17639,7 +17639,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -17677,7 +17677,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -17717,7 +17717,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -17757,7 +17757,7 @@ void m68008_device::andi_l_imm32_pais_ip8() // 02a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -17807,7 +17807,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17845,7 +17845,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17882,7 +17882,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -17919,7 +17919,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -17959,7 +17959,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -17997,7 +17997,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18037,7 +18037,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18077,7 +18077,7 @@ void m68008_device::andi_l_imm32_das_ip8() // 02a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -18127,7 +18127,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18165,7 +18165,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18200,14 +18200,14 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -18215,7 +18215,7 @@ void m68008_device::andi_l_imm32_dais_ip8() // 02b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18254,7 +18254,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18294,7 +18294,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -18334,7 +18334,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -18372,7 +18372,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18412,7 +18412,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18452,7 +18452,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -18501,7 +18501,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18539,7 +18539,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18579,7 +18579,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -18617,7 +18617,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -18657,7 +18657,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -18695,7 +18695,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -18735,7 +18735,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -18775,7 +18775,7 @@ void m68008_device::andi_l_imm32_adr16_ip8() // 02b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -18824,7 +18824,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18862,7 +18862,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18900,7 +18900,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -18939,7 +18939,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -18977,7 +18977,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -19017,7 +19017,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -19055,7 +19055,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_and(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19095,7 +19095,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=R.alue:m_alue
alu_and(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -19135,7 +19135,7 @@ void m68008_device::andi_l_imm32_adr32_ip8() // 02b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -19223,7 +19223,7 @@ void m68008_device::subi_b_imm8_ds_ip8() // 0400 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -19319,7 +19319,7 @@ void m68008_device::subi_b_imm8_ais_ip8() // 0410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19342,7 +19342,7 @@ void m68008_device::subi_b_imm8_ais_ip8() // 0410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19458,7 +19458,7 @@ void m68008_device::subi_b_imm8_aips_ip8() // 0418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19479,7 +19479,7 @@ void m68008_device::subi_b_imm8_aips_ip8() // 0418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19597,7 +19597,7 @@ void m68008_device::subi_b_imm8_pais_ip8() // 0420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -19618,7 +19618,7 @@ void m68008_device::subi_b_imm8_pais_ip8() // 0420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19765,7 +19765,7 @@ void m68008_device::subi_b_imm8_das_ip8() // 0428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -19788,7 +19788,7 @@ void m68008_device::subi_b_imm8_das_ip8() // 0428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -19896,7 +19896,7 @@ void m68008_device::subi_b_imm8_dais_ip8() // 0430 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -19988,7 +19988,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20011,7 +20011,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20159,7 +20159,7 @@ void m68008_device::subi_b_imm8_adr16_ip8() // 0438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -20180,7 +20180,7 @@ void m68008_device::subi_b_imm8_adr16_ip8() // 0438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20364,7 +20364,7 @@ void m68008_device::subi_b_imm8_adr32_ip8() // 0439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -20385,7 +20385,7 @@ void m68008_device::subi_b_imm8_adr32_ip8() // 0439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20496,7 +20496,7 @@ void m68008_device::subi_w_imm16_ds_ip8() // 0440 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -20592,7 +20592,7 @@ void m68008_device::subi_w_imm16_ais_ip8() // 0450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -20633,7 +20633,7 @@ void m68008_device::subi_w_imm16_ais_ip8() // 0450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20767,7 +20767,7 @@ void m68008_device::subi_w_imm16_aips_ip8() // 0458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20806,7 +20806,7 @@ void m68008_device::subi_w_imm16_aips_ip8() // 0458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -20942,7 +20942,7 @@ void m68008_device::subi_w_imm16_pais_ip8() // 0460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -20981,7 +20981,7 @@ void m68008_device::subi_w_imm16_pais_ip8() // 0460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21146,7 +21146,7 @@ void m68008_device::subi_w_imm16_das_ip8() // 0468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21187,7 +21187,7 @@ void m68008_device::subi_w_imm16_das_ip8() // 0468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21313,7 +21313,7 @@ void m68008_device::subi_w_imm16_dais_ip8() // 0470 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -21405,7 +21405,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -21446,7 +21446,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21612,7 +21612,7 @@ void m68008_device::subi_w_imm16_adr16_ip8() // 0478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -21651,7 +21651,7 @@ void m68008_device::subi_w_imm16_adr16_ip8() // 0478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -21853,7 +21853,7 @@ void m68008_device::subi_w_imm16_adr32_ip8() // 0479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -21892,7 +21892,7 @@ void m68008_device::subi_w_imm16_adr32_ip8() // 0479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22057,7 +22057,7 @@ void m68008_device::subi_l_imm32_ds_ip8() // 0480 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -22096,7 +22096,7 @@ void m68008_device::subi_l_imm32_ds_ip8() // 0480 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -22197,7 +22197,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22274,7 +22274,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22314,7 +22314,7 @@ void m68008_device::subi_l_imm32_ais_ip8() // 0490 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22476,7 +22476,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -22556,7 +22556,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22596,7 +22596,7 @@ void m68008_device::subi_l_imm32_aips_ip8() // 0498 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -22757,7 +22757,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -22839,7 +22839,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -22879,7 +22879,7 @@ void m68008_device::subi_l_imm32_pais_ip8() // 04a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23077,7 +23077,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23154,7 +23154,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23194,7 +23194,7 @@ void m68008_device::subi_l_imm32_das_ip8() // 04a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23354,7 +23354,7 @@ void m68008_device::subi_l_imm32_dais_ip8() // 04b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -23445,7 +23445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23522,7 +23522,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23562,7 +23562,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -23762,7 +23762,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -23839,7 +23839,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -23879,7 +23879,7 @@ void m68008_device::subi_l_imm32_adr16_ip8() // 04b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24115,7 +24115,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -24192,7 +24192,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24232,7 +24232,7 @@ void m68008_device::subi_l_imm32_adr32_ip8() // 04b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -24359,7 +24359,7 @@ void m68008_device::addi_b_imm8_ds_ip8() // 0600 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add8(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -24455,7 +24455,7 @@ void m68008_device::addi_b_imm8_ais_ip8() // 0610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -24478,7 +24478,7 @@ void m68008_device::addi_b_imm8_ais_ip8() // 0610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24594,7 +24594,7 @@ void m68008_device::addi_b_imm8_aips_ip8() // 0618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24615,7 +24615,7 @@ void m68008_device::addi_b_imm8_aips_ip8() // 0618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24733,7 +24733,7 @@ void m68008_device::addi_b_imm8_pais_ip8() // 0620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -24754,7 +24754,7 @@ void m68008_device::addi_b_imm8_pais_ip8() // 0620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -24901,7 +24901,7 @@ void m68008_device::addi_b_imm8_das_ip8() // 0628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -24924,7 +24924,7 @@ void m68008_device::addi_b_imm8_das_ip8() // 0628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25032,7 +25032,7 @@ void m68008_device::addi_b_imm8_dais_ip8() // 0630 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -25124,7 +25124,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -25147,7 +25147,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25295,7 +25295,7 @@ void m68008_device::addi_b_imm8_adr16_ip8() // 0638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -25316,7 +25316,7 @@ void m68008_device::addi_b_imm8_adr16_ip8() // 0638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25500,7 +25500,7 @@ void m68008_device::addi_b_imm8_adr32_ip8() // 0639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -25521,7 +25521,7 @@ void m68008_device::addi_b_imm8_adr32_ip8() // 0639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add8(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25632,7 +25632,7 @@ void m68008_device::addi_w_imm16_ds_ip8() // 0640 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -25728,7 +25728,7 @@ void m68008_device::addi_w_imm16_ais_ip8() // 0650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -25769,7 +25769,7 @@ void m68008_device::addi_w_imm16_ais_ip8() // 0650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -25903,7 +25903,7 @@ void m68008_device::addi_w_imm16_aips_ip8() // 0658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -25942,7 +25942,7 @@ void m68008_device::addi_w_imm16_aips_ip8() // 0658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26078,7 +26078,7 @@ void m68008_device::addi_w_imm16_pais_ip8() // 0660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -26117,7 +26117,7 @@ void m68008_device::addi_w_imm16_pais_ip8() // 0660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26282,7 +26282,7 @@ void m68008_device::addi_w_imm16_das_ip8() // 0668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -26323,7 +26323,7 @@ void m68008_device::addi_w_imm16_das_ip8() // 0668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26449,7 +26449,7 @@ void m68008_device::addi_w_imm16_dais_ip8() // 0670 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -26541,7 +26541,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -26582,7 +26582,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26748,7 +26748,7 @@ void m68008_device::addi_w_imm16_adr16_ip8() // 0678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -26787,7 +26787,7 @@ void m68008_device::addi_w_imm16_adr16_ip8() // 0678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -26989,7 +26989,7 @@ void m68008_device::addi_w_imm16_adr32_ip8() // 0679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -27028,7 +27028,7 @@ void m68008_device::addi_w_imm16_adr32_ip8() // 0679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27193,7 +27193,7 @@ void m68008_device::addi_l_imm32_ds_ip8() // 0680 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_add(m_dt, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -27232,7 +27232,7 @@ void m68008_device::addi_l_imm32_ds_ip8() // 0680 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -27333,7 +27333,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -27410,7 +27410,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27450,7 +27450,7 @@ void m68008_device::addi_l_imm32_ais_ip8() // 0690 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -27612,7 +27612,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -27692,7 +27692,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -27732,7 +27732,7 @@ void m68008_device::addi_l_imm32_aips_ip8() // 0698 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -27893,7 +27893,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -27975,7 +27975,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28015,7 +28015,7 @@ void m68008_device::addi_l_imm32_pais_ip8() // 06a0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28213,7 +28213,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28290,7 +28290,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28330,7 +28330,7 @@ void m68008_device::addi_l_imm32_das_ip8() // 06a8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28490,7 +28490,7 @@ void m68008_device::addi_l_imm32_dais_ip8() // 06b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -28581,7 +28581,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28658,7 +28658,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -28698,7 +28698,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -28898,7 +28898,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -28975,7 +28975,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29015,7 +29015,7 @@ void m68008_device::addi_l_imm32_adr16_ip8() // 06b8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -29251,7 +29251,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -29328,7 +29328,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dbin:m_dbin
alu_add(m_dt, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -29368,7 +29368,7 @@ void m68008_device::addi_l_imm32_adr32_ip8() // 06b9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -29458,7 +29458,7 @@ void m68008_device::btst_imm8_ds_ip8() // 0800 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29499,13 +29499,13 @@ void m68008_device::btst_imm8_ds_ip8() // 0800 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 0e7 btsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -29549,7 +29549,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29563,7 +29563,7 @@ btsr3:
// 044 btsr3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_and(high16(m_da[ry]), 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -29586,7 +29586,7 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29623,11 +29623,11 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -29647,13 +29647,13 @@ void m68008_device::btst_imm8_ais_ip8() // 0810 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29706,7 +29706,7 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29746,12 +29746,12 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29772,13 +29772,13 @@ void m68008_device::btst_imm8_aips_ip8() // 0818 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29831,7 +29831,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29870,7 +29870,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -29878,7 +29878,7 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -29899,13 +29899,13 @@ void m68008_device::btst_imm8_pais_ip8() // 0820 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29958,7 +29958,7 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -29995,7 +29995,7 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30033,11 +30033,11 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -30057,13 +30057,13 @@ void m68008_device::btst_imm8_das_ip8() // 0828 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30116,7 +30116,7 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30151,14 +30151,14 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -30166,7 +30166,7 @@ void m68008_device::btst_imm8_dais_ip8() // 0830 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30205,7 +30205,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30246,11 +30246,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -30270,13 +30270,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30328,7 +30328,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30368,7 +30368,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -30406,7 +30406,7 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -30427,13 +30427,13 @@ void m68008_device::btst_imm8_adr16_ip8() // 0838 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30485,7 +30485,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30523,7 +30523,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30562,7 +30562,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -30600,7 +30600,7 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -30621,13 +30621,13 @@ void m68008_device::btst_imm8_adr32_ip8() // 0839 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30679,7 +30679,7 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30716,7 +30716,7 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30754,11 +30754,11 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob);
@@ -30778,13 +30778,13 @@ void m68008_device::btst_imm8_dpc_ip8() // 083a ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30836,7 +30836,7 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30871,14 +30871,14 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -30886,7 +30886,7 @@ void m68008_device::btst_imm8_dpci_ip8() // 083b ffff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30925,7 +30925,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -30966,11 +30966,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob);
@@ -30990,13 +30990,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_and8(m_dbin, 1 << (m_dcr & 7));
sr_z();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31049,7 +31049,7 @@ void m68008_device::bchg_imm8_ds_ip8() // 0840 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31090,13 +31090,13 @@ void m68008_device::bchg_imm8_ds_ip8() // 0840 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=13 c=2 m=..... i=....... 9 a=4:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_eor(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -31140,7 +31140,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -31153,14 +31153,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=13 c=2 m=..... i=....... 9 a=18:m_da[ry] d=35:m_dcro
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=18:m_da[ry] d=R.dcro:m_dcro
alu_eor(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=13 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=13 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -31183,7 +31183,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31220,11 +31220,11 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -31245,7 +31245,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31285,7 +31285,7 @@ void m68008_device::bchg_imm8_ais_ip8() // 0850 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31320,7 +31320,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31360,12 +31360,12 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31387,7 +31387,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31427,7 +31427,7 @@ void m68008_device::bchg_imm8_aips_ip8() // 0858 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31462,7 +31462,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31501,7 +31501,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -31509,7 +31509,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -31531,7 +31531,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -31571,7 +31571,7 @@ void m68008_device::bchg_imm8_pais_ip8() // 0860 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31606,7 +31606,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31643,7 +31643,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31681,11 +31681,11 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -31706,7 +31706,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -31746,7 +31746,7 @@ void m68008_device::bchg_imm8_das_ip8() // 0868 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -31781,7 +31781,7 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31816,14 +31816,14 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -31831,7 +31831,7 @@ void m68008_device::bchg_imm8_dais_ip8() // 0870 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31870,7 +31870,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -31911,11 +31911,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -31936,7 +31936,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -31976,7 +31976,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32010,7 +32010,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32050,7 +32050,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -32088,7 +32088,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -32110,7 +32110,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -32150,7 +32150,7 @@ void m68008_device::bchg_imm8_adr16_ip8() // 0878 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32184,7 +32184,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32222,7 +32222,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32261,7 +32261,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -32299,7 +32299,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -32321,7 +32321,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=2 m=..... i=b...... 9 a=31:m_dbin d=36:m_dcro8
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_eor8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -32361,7 +32361,7 @@ void m68008_device::bchg_imm8_adr32_ip8() // 0879 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=13 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=13 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32396,7 +32396,7 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32437,13 +32437,13 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06e bclr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=.l..... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -32484,14 +32484,14 @@ void m68008_device::bclr_imm8_ds_ip8() // 0880 fff8
goto bclr4;
bclr4:
// 0cc bclr4
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0c4 bcsr4
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -32504,18 +32504,18 @@ bclr4:
bclr3:
// 08c bclr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=.l..... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=.l..... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0c8 bclr5
- // alu r=14 c=4 m=..... i=.l..... 9 a=33:m_aluo d=35:m_dcro
+ // alu r=14 c=4 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=R.dcro:m_dcro
alu_eor(m_aluo, 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.l...i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.l...i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -32538,7 +32538,7 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32575,11 +32575,11 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -32599,12 +32599,12 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32644,7 +32644,7 @@ void m68008_device::bclr_imm8_ais_ip8() // 0890 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32679,7 +32679,7 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32719,12 +32719,12 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32745,12 +32745,12 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32790,7 +32790,7 @@ void m68008_device::bclr_imm8_aips_ip8() // 0898 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32825,7 +32825,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -32864,7 +32864,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -32872,7 +32872,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -32893,12 +32893,12 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -32938,7 +32938,7 @@ void m68008_device::bclr_imm8_pais_ip8() // 08a0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -32973,7 +32973,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33010,7 +33010,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33048,11 +33048,11 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -33072,12 +33072,12 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33117,7 +33117,7 @@ void m68008_device::bclr_imm8_das_ip8() // 08a8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33152,7 +33152,7 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33187,14 +33187,14 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=bl..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -33202,7 +33202,7 @@ void m68008_device::bclr_imm8_dais_ip8() // 08b0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33241,7 +33241,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=bl..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33282,11 +33282,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -33306,12 +33306,12 @@ adsw2:
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33351,7 +33351,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33385,7 +33385,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33425,7 +33425,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -33463,7 +33463,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -33484,12 +33484,12 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -33529,7 +33529,7 @@ void m68008_device::bclr_imm8_adr16_ip8() // 08b8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33563,7 +33563,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33601,7 +33601,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=bl..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33640,7 +33640,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=bl..... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=bl..... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -33678,7 +33678,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -33699,12 +33699,12 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
m_ir = m_irc;
m_alub = m_dbin;
m_ftu = m_sr;
- // alu r=14 c=2 m=..... i=bl..... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=bl..... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
// 067 bclm2
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=4 m=..... i=bl..... 9 a=33:m_aluo d=36:m_dcro8
+ // alu r=14 c=4 m=..... i=bl..... ALU.eor a=R.aluo:m_aluo d=R.dcro8:m_dcro8
alu_eor8(m_aluo, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -33744,7 +33744,7 @@ void m68008_device::bclr_imm8_adr32_ip8() // 08b9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=bl...i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=bl...i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -33779,7 +33779,7 @@ void m68008_device::bset_imm8_ds_ip8() // 08c0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33820,13 +33820,13 @@ void m68008_device::bset_imm8_ds_ip8() // 08c0 fff8
m_dcr = m_dt;
m_at = m_dt;
m_au = m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=9:m_dt d=4:m_da[ry]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_or(m_dt, m_da[ry]);
// 06a bcsr2
m_t = m_dcr & 0x10;
m_alub = m_da[ry];
m_au = m_pc + 2;
- // alu r=14 c=2 m=..... i=....... 8 a=4:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=R.dyl:m_da[ry] d=R.dcro:m_dcro
alu_or(m_da[ry], 1 << (m_dcr & 15));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -33870,7 +33870,7 @@ bcsr4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -33883,14 +33883,14 @@ bcsr4:
bcsr3:
// 084 bcsr3
m_alub = high16(m_da[ry]);
- // alu r=14 c=2 m=..... i=....... 8 a=18:m_da[ry] d=35:m_dcro
+ // alu r=14 c=2 m=..... i=....... ALU.or_ a=18:m_da[ry] d=R.dcro:m_dcro
alu_or(high16(m_da[ry]), 1 << (m_dcr & 15));
m_icount -= 2;
// 0a1 bcsr5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
- // alu r=14 c=1 m=..z.. i=.....i. 1 a=alub d=35:m_dcro
+ // alu r=14 c=1 m=..z.. i=.....i. ALU.and_ a=alub d=R.dcro:m_dcro
alu_and(m_alub, 1 << (m_dcr & 15));
sr_z();
set_ftu_const();
@@ -33913,7 +33913,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -33950,11 +33950,11 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -33975,7 +33975,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34015,7 +34015,7 @@ void m68008_device::bset_imm8_ais_ip8() // 08d0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34050,7 +34050,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34090,12 +34090,12 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34117,7 +34117,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34157,7 +34157,7 @@ void m68008_device::bset_imm8_aips_ip8() // 08d8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34192,7 +34192,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34231,7 +34231,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -34239,7 +34239,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -34261,7 +34261,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
@@ -34301,7 +34301,7 @@ void m68008_device::bset_imm8_pais_ip8() // 08e0 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34336,7 +34336,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34373,7 +34373,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34411,11 +34411,11 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -34436,7 +34436,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34476,7 +34476,7 @@ void m68008_device::bset_imm8_das_ip8() // 08e8 fff8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34511,7 +34511,7 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34546,14 +34546,14 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -34561,7 +34561,7 @@ void m68008_device::bset_imm8_dais_ip8() // 08f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34600,7 +34600,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34641,11 +34641,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -34666,7 +34666,7 @@ adsw2:
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34706,7 +34706,7 @@ adsw2:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34740,7 +34740,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34780,7 +34780,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -34818,7 +34818,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -34840,7 +34840,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
@@ -34880,7 +34880,7 @@ void m68008_device::bset_imm8_adr16_ip8() // 08f8 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -34914,7 +34914,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34952,7 +34952,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -34991,7 +34991,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -35029,7 +35029,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -35051,7 +35051,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
m_alub = m_dbin;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=14 c=2 m=..... i=b...... 8 a=31:m_dbin d=36:m_dcro8
+ // alu r=14 c=2 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=R.dcro8:m_dcro8
alu_or8(m_dbin, 1 << (m_dcr & 7));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 15:
@@ -35091,7 +35091,7 @@ void m68008_device::bset_imm8_adr32_ip8() // 08f9 ffff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
- // alu r=14 c=1 m=..z.. i=b....i. 1 a=alub d=36:m_dcro8
+ // alu r=14 c=1 m=..z.. i=b....i. ALU.and_ a=alub d=R.dcro8:m_dcro8
alu_and8(m_alub, 1 << (m_dcr & 7));
sr_z();
m_base_ssw = SSW_DATA;
@@ -35126,7 +35126,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35164,7 +35164,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor8(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -35172,7 +35172,7 @@ void m68008_device::eori_b_imm8_ds_ip8() // 0a00 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35225,7 +35225,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35262,11 +35262,11 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -35286,7 +35286,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35328,7 +35328,7 @@ void m68008_device::eori_b_imm8_ais_ip8() // 0a10 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -35361,7 +35361,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35401,12 +35401,12 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35427,7 +35427,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35469,7 +35469,7 @@ void m68008_device::eori_b_imm8_aips_ip8() // 0a18 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -35502,7 +35502,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35541,7 +35541,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -35549,7 +35549,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -35570,7 +35570,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35612,7 +35612,7 @@ void m68008_device::eori_b_imm8_pais_ip8() // 0a20 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -35645,7 +35645,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35682,7 +35682,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35720,11 +35720,11 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -35744,7 +35744,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -35786,7 +35786,7 @@ void m68008_device::eori_b_imm8_das_ip8() // 0a28 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -35819,7 +35819,7 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35854,14 +35854,14 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -35869,7 +35869,7 @@ void m68008_device::eori_b_imm8_dais_ip8() // 0a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35908,7 +35908,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -35949,11 +35949,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob);
@@ -35973,7 +35973,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36015,7 +36015,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -36047,7 +36047,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36087,7 +36087,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -36125,7 +36125,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -36146,7 +36146,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36188,7 +36188,7 @@ void m68008_device::eori_b_imm8_adr16_ip8() // 0a38 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -36220,7 +36220,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36258,7 +36258,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36297,7 +36297,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -36335,7 +36335,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -36356,7 +36356,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor8(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36398,7 +36398,7 @@ void m68008_device::eori_b_imm8_adr32_ip8() // 0a39 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 19:
m_mmu8->write_data(m_aob, m_dbout);
@@ -36430,7 +36430,7 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36467,21 +36467,21 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=b...... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=b...... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor8(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = (m_ftu & SR_CCR) | (m_sr & SR_SR);
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -36489,7 +36489,7 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36528,11 +36528,11 @@ void m68008_device::eori_imm8_ccr_ip8() // 0a3c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36585,7 +36585,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36623,7 +36623,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -36631,7 +36631,7 @@ void m68008_device::eori_w_imm16_ds_ip8() // 0a40 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36684,7 +36684,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36721,11 +36721,11 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -36763,7 +36763,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36805,7 +36805,7 @@ void m68008_device::eori_w_imm16_ais_ip8() // 0a50 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -36856,7 +36856,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -36896,12 +36896,12 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -36940,7 +36940,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -36982,7 +36982,7 @@ void m68008_device::eori_w_imm16_aips_ip8() // 0a58 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -37033,7 +37033,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37072,7 +37072,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -37080,7 +37080,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -37119,7 +37119,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37161,7 +37161,7 @@ void m68008_device::eori_w_imm16_pais_ip8() // 0a60 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -37212,7 +37212,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37249,7 +37249,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37287,11 +37287,11 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37329,7 +37329,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37371,7 +37371,7 @@ void m68008_device::eori_w_imm16_das_ip8() // 0a68 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -37422,7 +37422,7 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37457,14 +37457,14 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -37472,7 +37472,7 @@ void m68008_device::eori_w_imm16_dais_ip8() // 0a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37511,7 +37511,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37552,11 +37552,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -37594,7 +37594,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37636,7 +37636,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -37686,7 +37686,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37726,7 +37726,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -37764,7 +37764,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -37803,7 +37803,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -37845,7 +37845,7 @@ void m68008_device::eori_w_imm16_adr16_ip8() // 0a78 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -37895,7 +37895,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37933,7 +37933,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -37972,7 +37972,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -38010,7 +38010,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -38049,7 +38049,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38091,7 +38091,7 @@ void m68008_device::eori_w_imm16_adr32_ip8() // 0a79 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -38145,7 +38145,7 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38182,23 +38182,23 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff
// 1cc stiw1
m_ftu = m_sr;
m_au = m_pc - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 307 stiw2
- // alu r=13 c=2 m=..... i=....... 9 a=37:m_ftu d=9:m_dt
+ // alu r=13 c=2 m=..... i=....... ALU.eor a=R.ftu:m_ftu d=R.dtl:m_dt
alu_eor(m_ftu, m_dt);
m_icount -= 2;
// 320 stiw3
m_movemr = m_dbin;
m_ftu = m_aluo;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_icount -= 2;
// 321 stiw4
m_sr = m_isr = m_ftu & (SR_CCR|SR_SR);
update_user_super();
update_interrupt();
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_icount -= 2;
// 1e1 malw3
m_aob = m_au;
@@ -38206,7 +38206,7 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38245,11 +38245,11 @@ void m68008_device::eori_i16u_sr_ip8() // 0a7c ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38301,7 +38301,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38339,7 +38339,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38377,12 +38377,12 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_eor(m_dt, m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38417,7 +38417,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=18:m_da[ry]
alu_eor(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -38426,7 +38426,7 @@ void m68008_device::eori_l_imm32_ds_ip8() // 0a80 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -38446,7 +38446,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38484,7 +38484,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38521,7 +38521,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -38561,7 +38561,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38599,7 +38599,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38639,7 +38639,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -38679,7 +38679,7 @@ void m68008_device::eori_l_imm32_ais_ip8() // 0a90 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -38729,7 +38729,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38767,7 +38767,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -38804,7 +38804,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -38844,11 +38844,11 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -38886,7 +38886,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -38926,7 +38926,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -38966,7 +38966,7 @@ void m68008_device::eori_l_imm32_aips_ip8() // 0a98 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -39016,7 +39016,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39054,7 +39054,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39090,14 +39090,14 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -39136,7 +39136,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -39174,7 +39174,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39214,7 +39214,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39254,7 +39254,7 @@ void m68008_device::eori_l_imm32_pais_ip8() // 0aa0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -39304,7 +39304,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39342,7 +39342,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39379,7 +39379,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39416,7 +39416,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -39456,7 +39456,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -39494,7 +39494,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39534,7 +39534,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39574,7 +39574,7 @@ void m68008_device::eori_l_imm32_das_ip8() // 0aa8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -39624,7 +39624,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39662,7 +39662,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39697,14 +39697,14 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -39712,7 +39712,7 @@ void m68008_device::eori_l_imm32_dais_ip8() // 0ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39751,7 +39751,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 33:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -39791,7 +39791,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -39831,7 +39831,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -39869,7 +39869,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -39909,7 +39909,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -39949,7 +39949,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -39998,7 +39998,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -40036,7 +40036,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -40076,7 +40076,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -40114,7 +40114,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -40154,7 +40154,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -40192,7 +40192,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40232,7 +40232,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -40272,7 +40272,7 @@ void m68008_device::eori_l_imm32_adr16_ip8() // 0ab8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -40321,7 +40321,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -40359,7 +40359,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_pc = m_au;
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -40397,7 +40397,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -40436,7 +40436,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -40474,7 +40474,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -40514,7 +40514,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 21:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -40552,7 +40552,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=9:m_dt d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dtl:m_dt d=R.dbin:m_dbin
alu_eor(m_dt, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -40592,7 +40592,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=23:m_dt d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=23:m_dt d=R.alue:m_alue
alu_eor(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -40632,7 +40632,7 @@ void m68008_device::eori_l_imm32_adr32_ip8() // 0ab9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 33:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -40720,7 +40720,7 @@ void m68008_device::cmpi_b_imm8_ds_ip8() // 0c00 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub8(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -40815,7 +40815,7 @@ void m68008_device::cmpi_b_imm8_ais_ip8() // 0c10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -40838,7 +40838,7 @@ void m68008_device::cmpi_b_imm8_ais_ip8() // 0c10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -40938,7 +40938,7 @@ void m68008_device::cmpi_b_imm8_aips_ip8() // 0c18 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -40959,7 +40959,7 @@ void m68008_device::cmpi_b_imm8_aips_ip8() // 0c18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41061,7 +41061,7 @@ void m68008_device::cmpi_b_imm8_pais_ip8() // 0c20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -41082,7 +41082,7 @@ void m68008_device::cmpi_b_imm8_pais_ip8() // 0c20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41213,7 +41213,7 @@ void m68008_device::cmpi_b_imm8_das_ip8() // 0c28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -41236,7 +41236,7 @@ void m68008_device::cmpi_b_imm8_das_ip8() // 0c28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41328,7 +41328,7 @@ void m68008_device::cmpi_b_imm8_dais_ip8() // 0c30 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -41420,7 +41420,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -41443,7 +41443,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41575,7 +41575,7 @@ void m68008_device::cmpi_b_imm8_adr16_ip8() // 0c38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -41596,7 +41596,7 @@ void m68008_device::cmpi_b_imm8_adr16_ip8() // 0c38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41764,7 +41764,7 @@ void m68008_device::cmpi_b_imm8_adr32_ip8() // 0c39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -41785,7 +41785,7 @@ void m68008_device::cmpi_b_imm8_adr32_ip8() // 0c39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub8(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -41880,7 +41880,7 @@ void m68008_device::cmpi_w_imm16_ds_ip8() // 0c40 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 23a rcaw2
@@ -41975,7 +41975,7 @@ void m68008_device::cmpi_w_imm16_ais_ip8() // 0c50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42016,7 +42016,7 @@ void m68008_device::cmpi_w_imm16_ais_ip8() // 0c50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42116,7 +42116,7 @@ void m68008_device::cmpi_w_imm16_aips_ip8() // 0c58 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -42155,7 +42155,7 @@ void m68008_device::cmpi_w_imm16_aips_ip8() // 0c58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42257,7 +42257,7 @@ void m68008_device::cmpi_w_imm16_pais_ip8() // 0c60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -42296,7 +42296,7 @@ void m68008_device::cmpi_w_imm16_pais_ip8() // 0c60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42427,7 +42427,7 @@ void m68008_device::cmpi_w_imm16_das_ip8() // 0c68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42468,7 +42468,7 @@ void m68008_device::cmpi_w_imm16_das_ip8() // 0c68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42560,7 +42560,7 @@ void m68008_device::cmpi_w_imm16_dais_ip8() // 0c70 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -42652,7 +42652,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -42693,7 +42693,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -42825,7 +42825,7 @@ void m68008_device::cmpi_w_imm16_adr16_ip8() // 0c78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -42864,7 +42864,7 @@ void m68008_device::cmpi_w_imm16_adr16_ip8() // 0c78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -43032,7 +43032,7 @@ void m68008_device::cmpi_w_imm16_adr32_ip8() // 0c79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -43071,7 +43071,7 @@ void m68008_device::cmpi_w_imm16_adr32_ip8() // 0c79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 34c mmrw3
@@ -43203,11 +43203,11 @@ void m68008_device::cmpi_l_imm32_ds_ip8() // 0c80 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dyl:m_da[ry]
alu_sub(m_dt, m_da[ry]);
sr_nzvc();
// 239 rcal2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43339,7 +43339,7 @@ void m68008_device::cmpi_l_imm32_ais_ip8() // 0c90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -43416,13 +43416,13 @@ void m68008_device::cmpi_l_imm32_ais_ip8() // 0c90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43549,7 +43549,7 @@ void m68008_device::cmpi_l_imm32_aips_ip8() // 0c98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -43629,13 +43629,13 @@ void m68008_device::cmpi_l_imm32_aips_ip8() // 0c98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -43761,7 +43761,7 @@ void m68008_device::cmpi_l_imm32_pais_ip8() // 0ca0 fff8
m_dbin = m_edb;
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -43843,13 +43843,13 @@ void m68008_device::cmpi_l_imm32_pais_ip8() // 0ca0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44012,7 +44012,7 @@ void m68008_device::cmpi_l_imm32_das_ip8() // 0ca8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44089,13 +44089,13 @@ void m68008_device::cmpi_l_imm32_das_ip8() // 0ca8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44220,7 +44220,7 @@ void m68008_device::cmpi_l_imm32_dais_ip8() // 0cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -44311,7 +44311,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44388,13 +44388,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44559,7 +44559,7 @@ void m68008_device::cmpi_l_imm32_adr16_ip8() // 0cb8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
@@ -44636,13 +44636,13 @@ void m68008_device::cmpi_l_imm32_adr16_ip8() // 0cb8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44843,7 +44843,7 @@ void m68008_device::cmpi_l_imm32_adr32_ip8() // 0cb9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 17:
@@ -44920,13 +44920,13 @@ void m68008_device::cmpi_l_imm32_adr32_ip8() // 0cb9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dbin:m_dbin
alu_sub(m_dt, m_dbin);
sr_nzvc();
// 171 cpdl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -44983,7 +44983,7 @@ void m68008_device::move_b_ds_dd_ip8() // 1000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -45042,7 +45042,7 @@ void m68008_device::move_b_ais_dd_ip8() // 1010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45066,7 +45066,7 @@ void m68008_device::move_b_ais_dd_ip8() // 1010 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45129,7 +45129,7 @@ void m68008_device::move_b_aips_dd_ip8() // 1018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45151,7 +45151,7 @@ void m68008_device::move_b_aips_dd_ip8() // 1018 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45216,7 +45216,7 @@ void m68008_device::move_b_pais_dd_ip8() // 1020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -45238,7 +45238,7 @@ void m68008_device::move_b_pais_dd_ip8() // 1020 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45332,7 +45332,7 @@ void m68008_device::move_b_das_dd_ip8() // 1028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45356,7 +45356,7 @@ void m68008_device::move_b_das_dd_ip8() // 1028 f1f8
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45411,7 +45411,7 @@ void m68008_device::move_b_dais_dd_ip8() // 1030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -45503,7 +45503,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45527,7 +45527,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45622,7 +45622,7 @@ void m68008_device::move_b_adr16_dd_ip8() // 1038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -45644,7 +45644,7 @@ void m68008_device::move_b_adr16_dd_ip8() // 1038 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45775,7 +45775,7 @@ void m68008_device::move_b_adr32_dd_ip8() // 1039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -45797,7 +45797,7 @@ void m68008_device::move_b_adr32_dd_ip8() // 1039 f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45890,7 +45890,7 @@ void m68008_device::move_b_dpc_dd_ip8() // 103a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -45914,7 +45914,7 @@ void m68008_device::move_b_dpc_dd_ip8() // 103a f1ff
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -45968,7 +45968,7 @@ void m68008_device::move_b_dpci_dd_ip8() // 103b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46060,7 +46060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -46084,7 +46084,7 @@ adsw2:
m_pc = m_au;
set_8(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -46182,7 +46182,7 @@ void m68008_device::move_b_imm8_dd_ip8() // 103c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -46244,7 +46244,7 @@ void m68008_device::move_b_ds_aid_ip8() // 1080 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46318,7 +46318,7 @@ void m68008_device::move_b_ais_aid_ip8() // 1090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46341,7 +46341,7 @@ void m68008_device::move_b_ais_aid_ip8() // 1090 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46421,7 +46421,7 @@ void m68008_device::move_b_aips_aid_ip8() // 1098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46442,7 +46442,7 @@ void m68008_device::move_b_aips_aid_ip8() // 1098 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46524,7 +46524,7 @@ void m68008_device::move_b_pais_aid_ip8() // 10a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -46545,7 +46545,7 @@ void m68008_device::move_b_pais_aid_ip8() // 10a0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46656,7 +46656,7 @@ void m68008_device::move_b_das_aid_ip8() // 10a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46679,7 +46679,7 @@ void m68008_device::move_b_das_aid_ip8() // 10a8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46751,7 +46751,7 @@ void m68008_device::move_b_dais_aid_ip8() // 10b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -46843,7 +46843,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -46866,7 +46866,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -46978,7 +46978,7 @@ void m68008_device::move_b_adr16_aid_ip8() // 10b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -46999,7 +46999,7 @@ void m68008_device::move_b_adr16_aid_ip8() // 10b8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47147,7 +47147,7 @@ void m68008_device::move_b_adr32_aid_ip8() // 10b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -47168,7 +47168,7 @@ void m68008_device::move_b_adr32_aid_ip8() // 10b9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47278,7 +47278,7 @@ void m68008_device::move_b_dpc_aid_ip8() // 10ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47301,7 +47301,7 @@ void m68008_device::move_b_dpc_aid_ip8() // 10ba f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47372,7 +47372,7 @@ void m68008_device::move_b_dpci_aid_ip8() // 10bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -47464,7 +47464,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47487,7 +47487,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47602,7 +47602,7 @@ void m68008_device::move_b_imm8_aid_ip8() // 10bc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47679,7 +47679,7 @@ void m68008_device::move_b_ds_aipd_ip8() // 10c0 f1f8
set_8xl(m_dbout, m_da[ry]);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47752,7 +47752,7 @@ void m68008_device::move_b_ais_aipd_ip8() // 10d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -47776,7 +47776,7 @@ void m68008_device::move_b_ais_aipd_ip8() // 10d0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47855,7 +47855,7 @@ void m68008_device::move_b_aips_aipd_ip8() // 10d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47877,7 +47877,7 @@ void m68008_device::move_b_aips_aipd_ip8() // 10d8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -47958,7 +47958,7 @@ void m68008_device::move_b_pais_aipd_ip8() // 10e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -47980,7 +47980,7 @@ void m68008_device::move_b_pais_aipd_ip8() // 10e0 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48090,7 +48090,7 @@ void m68008_device::move_b_das_aipd_ip8() // 10e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48114,7 +48114,7 @@ void m68008_device::move_b_das_aipd_ip8() // 10e8 f1f8
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48185,7 +48185,7 @@ void m68008_device::move_b_dais_aipd_ip8() // 10f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48277,7 +48277,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48301,7 +48301,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48412,7 +48412,7 @@ void m68008_device::move_b_adr16_aipd_ip8() // 10f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -48434,7 +48434,7 @@ void m68008_device::move_b_adr16_aipd_ip8() // 10f8 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48581,7 +48581,7 @@ void m68008_device::move_b_adr32_aipd_ip8() // 10f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -48603,7 +48603,7 @@ void m68008_device::move_b_adr32_aipd_ip8() // 10f9 f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48712,7 +48712,7 @@ void m68008_device::move_b_dpc_aipd_ip8() // 10fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48736,7 +48736,7 @@ void m68008_device::move_b_dpc_aipd_ip8() // 10fa f1ff
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -48806,7 +48806,7 @@ void m68008_device::move_b_dpci_aipd_ip8() // 10fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -48898,7 +48898,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -48922,7 +48922,7 @@ adsw2:
set_8xl(m_dbout, m_dbin);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49036,7 +49036,7 @@ void m68008_device::move_b_imm8_aipd_ip8() // 10fc f1ff
set_8xl(m_dbout, m_dt);
m_pc = m_au;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -49111,7 +49111,7 @@ void m68008_device::move_b_ds_paid_ip8() // 1100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49185,7 +49185,7 @@ void m68008_device::move_b_ais_paid_ip8() // 1110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49208,7 +49208,7 @@ void m68008_device::move_b_ais_paid_ip8() // 1110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49288,7 +49288,7 @@ void m68008_device::move_b_aips_paid_ip8() // 1118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -49309,7 +49309,7 @@ void m68008_device::move_b_aips_paid_ip8() // 1118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49391,7 +49391,7 @@ void m68008_device::move_b_pais_paid_ip8() // 1120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -49412,7 +49412,7 @@ void m68008_device::move_b_pais_paid_ip8() // 1120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49523,7 +49523,7 @@ void m68008_device::move_b_das_paid_ip8() // 1128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49546,7 +49546,7 @@ void m68008_device::move_b_das_paid_ip8() // 1128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49618,7 +49618,7 @@ void m68008_device::move_b_dais_paid_ip8() // 1130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -49710,7 +49710,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -49733,7 +49733,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -49845,7 +49845,7 @@ void m68008_device::move_b_adr16_paid_ip8() // 1138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -49866,7 +49866,7 @@ void m68008_device::move_b_adr16_paid_ip8() // 1138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50014,7 +50014,7 @@ void m68008_device::move_b_adr32_paid_ip8() // 1139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -50035,7 +50035,7 @@ void m68008_device::move_b_adr32_paid_ip8() // 1139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50145,7 +50145,7 @@ void m68008_device::move_b_dpc_paid_ip8() // 113a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50168,7 +50168,7 @@ void m68008_device::move_b_dpc_paid_ip8() // 113a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50239,7 +50239,7 @@ void m68008_device::move_b_dpci_paid_ip8() // 113b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -50331,7 +50331,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50354,7 +50354,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50468,7 +50468,7 @@ void m68008_device::move_b_imm8_paid_ip8() // 113c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50580,7 +50580,7 @@ void m68008_device::move_b_ds_dad_ip8() // 1140 f1f8
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -50655,7 +50655,7 @@ void m68008_device::move_b_ais_dad_ip8() // 1150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -50677,7 +50677,7 @@ void m68008_device::move_b_ais_dad_ip8() // 1150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50799,7 +50799,7 @@ void m68008_device::move_b_aips_dad_ip8() // 1158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50819,7 +50819,7 @@ void m68008_device::move_b_aips_dad_ip8() // 1158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -50943,7 +50943,7 @@ void m68008_device::move_b_pais_dad_ip8() // 1160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -50963,7 +50963,7 @@ void m68008_device::move_b_pais_dad_ip8() // 1160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51116,7 +51116,7 @@ void m68008_device::move_b_das_dad_ip8() // 1168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51138,7 +51138,7 @@ void m68008_device::move_b_das_dad_ip8() // 1168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51252,7 +51252,7 @@ void m68008_device::move_b_dais_dad_ip8() // 1170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -51344,7 +51344,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51366,7 +51366,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51520,7 +51520,7 @@ void m68008_device::move_b_adr16_dad_ip8() // 1178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -51540,7 +51540,7 @@ void m68008_device::move_b_adr16_dad_ip8() // 1178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51730,7 +51730,7 @@ void m68008_device::move_b_adr32_dad_ip8() // 1179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -51750,7 +51750,7 @@ void m68008_device::move_b_adr32_dad_ip8() // 1179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -51902,7 +51902,7 @@ void m68008_device::move_b_dpc_dad_ip8() // 117a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -51924,7 +51924,7 @@ void m68008_device::move_b_dpc_dad_ip8() // 117a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52037,7 +52037,7 @@ void m68008_device::move_b_dpci_dad_ip8() // 117b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -52129,7 +52129,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -52151,7 +52151,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52343,7 +52343,7 @@ void m68008_device::move_b_imm8_dad_ip8() // 117c f1ff
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -52416,7 +52416,7 @@ void m68008_device::move_b_ds_daid_ip8() // 1180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -52510,7 +52510,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_da[ry]);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -52585,7 +52585,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -52604,7 +52604,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -52619,7 +52619,7 @@ void m68008_device::move_b_ais_daid_ip8() // 1190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52658,7 +52658,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52782,7 +52782,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52799,7 +52799,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -52814,7 +52814,7 @@ void m68008_device::move_b_aips_daid_ip8() // 1198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52853,7 +52853,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -52979,7 +52979,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=bl..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -52996,7 +52996,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8
[[fallthrough]]; case 2:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53011,7 +53011,7 @@ void m68008_device::move_b_pais_daid_ip8() // 11a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53050,7 +53050,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53205,7 +53205,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -53224,7 +53224,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53239,7 +53239,7 @@ void m68008_device::move_b_das_daid_ip8() // 11a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53278,7 +53278,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53394,7 +53394,7 @@ void m68008_device::move_b_dais_daid_ip8() // 11b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -53486,7 +53486,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -53505,7 +53505,7 @@ adsw2:
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53520,7 +53520,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53559,7 +53559,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53715,7 +53715,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -53732,7 +53732,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -53747,7 +53747,7 @@ void m68008_device::move_b_adr16_daid_ip8() // 11b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53786,7 +53786,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -53978,7 +53978,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -53995,7 +53995,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff
[[fallthrough]]; case 10:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54010,7 +54010,7 @@ void m68008_device::move_b_adr32_daid_ip8() // 11b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54049,7 +54049,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54203,7 +54203,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -54222,7 +54222,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54237,7 +54237,7 @@ void m68008_device::move_b_dpc_daid_ip8() // 11ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54276,7 +54276,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54391,7 +54391,7 @@ void m68008_device::move_b_dpci_daid_ip8() // 11bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -54483,7 +54483,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=bl..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=bl..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -54502,7 +54502,7 @@ adsw2:
[[fallthrough]]; case 6:
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -54517,7 +54517,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54556,7 +54556,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54710,7 +54710,7 @@ void m68008_device::move_b_imm8_daid_ip8() // 11bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=bl..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=bl..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -54804,7 +54804,7 @@ rmdw2:
m_ir = m_irc;
set_8xl(m_dbout, m_dt);
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=bl...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=bl...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -54880,7 +54880,7 @@ void m68008_device::move_b_ds_adr16_ip8() // 11c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -54995,7 +54995,7 @@ void m68008_device::move_b_ais_adr16_ip8() // 11d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55017,7 +55017,7 @@ void m68008_device::move_b_ais_adr16_ip8() // 11d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55138,7 +55138,7 @@ void m68008_device::move_b_aips_adr16_ip8() // 11d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -55158,7 +55158,7 @@ void m68008_device::move_b_aips_adr16_ip8() // 11d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55281,7 +55281,7 @@ void m68008_device::move_b_pais_adr16_ip8() // 11e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -55301,7 +55301,7 @@ void m68008_device::move_b_pais_adr16_ip8() // 11e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55453,7 +55453,7 @@ void m68008_device::move_b_das_adr16_ip8() // 11e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55475,7 +55475,7 @@ void m68008_device::move_b_das_adr16_ip8() // 11e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55588,7 +55588,7 @@ void m68008_device::move_b_dais_adr16_ip8() // 11f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -55680,7 +55680,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -55702,7 +55702,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -55855,7 +55855,7 @@ void m68008_device::move_b_adr16_adr16_ip8() // 11f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -55875,7 +55875,7 @@ void m68008_device::move_b_adr16_adr16_ip8() // 11f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56064,7 +56064,7 @@ void m68008_device::move_b_adr32_adr16_ip8() // 11f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -56084,7 +56084,7 @@ void m68008_device::move_b_adr32_adr16_ip8() // 11f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56235,7 +56235,7 @@ void m68008_device::move_b_dpc_adr16_ip8() // 11fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56257,7 +56257,7 @@ void m68008_device::move_b_dpc_adr16_ip8() // 11fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56369,7 +56369,7 @@ void m68008_device::move_b_dpci_adr16_ip8() // 11fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -56461,7 +56461,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56483,7 +56483,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56638,7 +56638,7 @@ void m68008_device::move_b_imm8_adr16_ip8() // 11fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56791,7 +56791,7 @@ void m68008_device::move_b_ds_adr32_ip8() // 13c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -56906,7 +56906,7 @@ void m68008_device::move_b_ais_adr32_ip8() // 13d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -56928,7 +56928,7 @@ void m68008_device::move_b_ais_adr32_ip8() // 13d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57084,7 +57084,7 @@ void m68008_device::move_b_aips_adr32_ip8() // 13d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -57104,7 +57104,7 @@ void m68008_device::move_b_aips_adr32_ip8() // 13d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57262,7 +57262,7 @@ void m68008_device::move_b_pais_adr32_ip8() // 13e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -57282,7 +57282,7 @@ void m68008_device::move_b_pais_adr32_ip8() // 13e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57469,7 +57469,7 @@ void m68008_device::move_b_das_adr32_ip8() // 13e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57491,7 +57491,7 @@ void m68008_device::move_b_das_adr32_ip8() // 13e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57639,7 +57639,7 @@ void m68008_device::move_b_dais_adr32_ip8() // 13f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -57731,7 +57731,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -57753,7 +57753,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -57941,7 +57941,7 @@ void m68008_device::move_b_adr16_adr32_ip8() // 13f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -57961,7 +57961,7 @@ void m68008_device::move_b_adr16_adr32_ip8() // 13f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58185,7 +58185,7 @@ void m68008_device::move_b_adr32_adr32_ip8() // 13f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -58205,7 +58205,7 @@ void m68008_device::move_b_adr32_adr32_ip8() // 13f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58391,7 +58391,7 @@ void m68008_device::move_b_dpc_adr32_ip8() // 13fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58413,7 +58413,7 @@ void m68008_device::move_b_dpc_adr32_ip8() // 13fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58560,7 +58560,7 @@ void m68008_device::move_b_dpci_adr32_ip8() // 13fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -58652,7 +58652,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -58674,7 +58674,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -58900,7 +58900,7 @@ void m68008_device::move_b_imm8_adr32_ip8() // 13fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and8(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59019,13 +59019,13 @@ void m68008_device::move_l_ds_dd_ip8() // 2000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_da[rx] = m_at;
@@ -59083,14 +59083,14 @@ void m68008_device::move_l_as_dd_ip8() // 2008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59144,7 +59144,7 @@ void m68008_device::move_l_ais_dd_ip8() // 2010 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59222,14 +59222,14 @@ void m68008_device::move_l_ais_dd_ip8() // 2010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59283,7 +59283,7 @@ void m68008_device::move_l_aips_dd_ip8() // 2018 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -59364,14 +59364,14 @@ void m68008_device::move_l_aips_dd_ip8() // 2018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59424,7 +59424,7 @@ void m68008_device::move_l_pais_dd_ip8() // 2020 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -59507,14 +59507,14 @@ void m68008_device::move_l_pais_dd_ip8() // 2020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59604,7 +59604,7 @@ void m68008_device::move_l_das_dd_ip8() // 2028 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -59682,14 +59682,14 @@ void m68008_device::move_l_das_dd_ip8() // 2028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -59741,7 +59741,7 @@ void m68008_device::move_l_dais_dd_ip8() // 2030 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -59832,7 +59832,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -59910,14 +59910,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60009,7 +60009,7 @@ void m68008_device::move_l_adr16_dd_ip8() // 2038 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -60087,14 +60087,14 @@ void m68008_device::move_l_adr16_dd_ip8() // 2038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60222,7 +60222,7 @@ void m68008_device::move_l_adr32_dd_ip8() // 2039 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -60300,14 +60300,14 @@ void m68008_device::move_l_adr32_dd_ip8() // 2039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60396,7 +60396,7 @@ void m68008_device::move_l_dpc_dd_ip8() // 203a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -60474,14 +60474,14 @@ void m68008_device::move_l_dpc_dd_ip8() // 203a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60532,7 +60532,7 @@ void m68008_device::move_l_dpci_dd_ip8() // 203b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -60623,7 +60623,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -60701,14 +60701,14 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60839,14 +60839,14 @@ void m68008_device::move_l_imm32_dd_ip8() // 203c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -60903,13 +60903,13 @@ void m68008_device::movea_l_ds_ad_ip8() // 2040 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -60965,12 +60965,12 @@ void m68008_device::movea_l_as_ad_ip8() // 2048 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -61024,7 +61024,7 @@ void m68008_device::movea_l_ais_ad_ip8() // 2050 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61102,13 +61102,13 @@ void m68008_device::movea_l_ais_ad_ip8() // 2050 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61161,7 +61161,7 @@ void m68008_device::movea_l_aips_ad_ip8() // 2058 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -61242,13 +61242,13 @@ void m68008_device::movea_l_aips_ad_ip8() // 2058 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61300,7 +61300,7 @@ void m68008_device::movea_l_pais_ad_ip8() // 2060 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -61383,13 +61383,13 @@ void m68008_device::movea_l_pais_ad_ip8() // 2060 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -61478,7 +61478,7 @@ void m68008_device::movea_l_das_ad_ip8() // 2068 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61556,13 +61556,13 @@ void m68008_device::movea_l_das_ad_ip8() // 2068 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -61613,7 +61613,7 @@ void m68008_device::movea_l_dais_ad_ip8() // 2070 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -61704,7 +61704,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61782,13 +61782,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -61879,7 +61879,7 @@ void m68008_device::movea_l_adr16_ad_ip8() // 2078 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -61957,13 +61957,13 @@ void m68008_device::movea_l_adr16_ad_ip8() // 2078 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62090,7 +62090,7 @@ void m68008_device::movea_l_adr32_ad_ip8() // 2079 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -62168,13 +62168,13 @@ void m68008_device::movea_l_adr32_ad_ip8() // 2079 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -62262,7 +62262,7 @@ void m68008_device::movea_l_dpc_ad_ip8() // 207a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62340,13 +62340,13 @@ void m68008_device::movea_l_dpc_ad_ip8() // 207a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62396,7 +62396,7 @@ void m68008_device::movea_l_dpci_ad_ip8() // 207b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -62487,7 +62487,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -62565,13 +62565,13 @@ adsl2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 36f mrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_alue);
- // alu r=2 c=1 m=..... i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -62701,13 +62701,13 @@ void m68008_device::movea_l_imm32_ad_ip8() // 207c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=..... i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -62799,7 +62799,7 @@ void m68008_device::move_l_ds_aid_ip8() // 2080 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62839,7 +62839,7 @@ void m68008_device::move_l_ds_aid_ip8() // 2080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -62932,7 +62932,7 @@ void m68008_device::move_l_as_aid_ip8() // 2088 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -62972,7 +62972,7 @@ void m68008_device::move_l_as_aid_ip8() // 2088 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -63026,7 +63026,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -63103,7 +63103,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63142,7 +63142,7 @@ void m68008_device::move_l_ais_aid_ip8() // 2090 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63234,7 +63234,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -63314,7 +63314,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63353,7 +63353,7 @@ void m68008_device::move_l_aips_aid_ip8() // 2098 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63444,7 +63444,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -63526,7 +63526,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63565,7 +63565,7 @@ void m68008_device::move_l_pais_aid_ip8() // 20a0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63693,7 +63693,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -63770,7 +63770,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -63809,7 +63809,7 @@ void m68008_device::move_l_das_aid_ip8() // 20a8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -63899,7 +63899,7 @@ void m68008_device::move_l_dais_aid_ip8() // 20b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -63990,7 +63990,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64067,7 +64067,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64106,7 +64106,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64236,7 +64236,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -64313,7 +64313,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64352,7 +64352,7 @@ void m68008_device::move_l_adr16_aid_ip8() // 20b8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64518,7 +64518,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -64595,7 +64595,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64634,7 +64634,7 @@ void m68008_device::move_l_adr32_aid_ip8() // 20b9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64761,7 +64761,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -64838,7 +64838,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -64877,7 +64877,7 @@ void m68008_device::move_l_dpc_aid_ip8() // 20ba f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -64966,7 +64966,7 @@ void m68008_device::move_l_dpci_aid_ip8() // 20bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -65057,7 +65057,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -65134,7 +65134,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65173,7 +65173,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65378,7 +65378,7 @@ void m68008_device::move_l_imm32_aid_ip8() // 20bc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65418,7 +65418,7 @@ void m68008_device::move_l_imm32_aid_ip8() // 20bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65511,7 +65511,7 @@ void m68008_device::move_l_ds_aipd_ip8() // 20c0 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65551,7 +65551,7 @@ void m68008_device::move_l_ds_aipd_ip8() // 20c0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65644,7 +65644,7 @@ void m68008_device::move_l_as_aipd_ip8() // 20c8 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65684,7 +65684,7 @@ void m68008_device::move_l_as_aipd_ip8() // 20c8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -65738,7 +65738,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -65815,7 +65815,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -65854,7 +65854,7 @@ void m68008_device::move_l_ais_aipd_ip8() // 20d0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -65945,7 +65945,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -66025,7 +66025,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66064,7 +66064,7 @@ void m68008_device::move_l_aips_aipd_ip8() // 20d8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66154,7 +66154,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -66236,7 +66236,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66275,7 +66275,7 @@ void m68008_device::move_l_pais_aipd_ip8() // 20e0 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66402,7 +66402,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66479,7 +66479,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66518,7 +66518,7 @@ void m68008_device::move_l_das_aipd_ip8() // 20e8 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66607,7 +66607,7 @@ void m68008_device::move_l_dais_aipd_ip8() // 20f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -66698,7 +66698,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -66775,7 +66775,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -66814,7 +66814,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -66943,7 +66943,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -67020,7 +67020,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67059,7 +67059,7 @@ void m68008_device::move_l_adr16_aipd_ip8() // 20f8 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67224,7 +67224,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -67301,7 +67301,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67340,7 +67340,7 @@ void m68008_device::move_l_adr32_aipd_ip8() // 20f9 f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67466,7 +67466,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -67543,7 +67543,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67582,7 +67582,7 @@ void m68008_device::move_l_dpc_aipd_ip8() // 20fa f1ff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -67670,7 +67670,7 @@ void m68008_device::move_l_dpci_aipd_ip8() // 20fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -67761,7 +67761,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -67838,7 +67838,7 @@ adsl2:
m_dbout = m_alue;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -67877,7 +67877,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68081,7 +68081,7 @@ void m68008_device::move_l_imm32_aipd_ip8() // 20fc f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -68121,7 +68121,7 @@ void m68008_device::move_l_imm32_aipd_ip8() // 20fc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68177,7 +68177,7 @@ void m68008_device::move_l_ds_paid_ip8() // 2100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68217,7 +68217,7 @@ void m68008_device::move_l_ds_paid_ip8() // 2100 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68309,7 +68309,7 @@ void m68008_device::move_l_as_paid_ip8() // 2108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68349,7 +68349,7 @@ void m68008_device::move_l_as_paid_ip8() // 2108 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68439,7 +68439,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -68516,7 +68516,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68556,7 +68556,7 @@ void m68008_device::move_l_ais_paid_ip8() // 2110 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68646,7 +68646,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -68726,7 +68726,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68766,7 +68766,7 @@ void m68008_device::move_l_aips_paid_ip8() // 2118 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -68855,7 +68855,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -68937,7 +68937,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -68977,7 +68977,7 @@ void m68008_device::move_l_pais_paid_ip8() // 2120 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69103,7 +69103,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69180,7 +69180,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69220,7 +69220,7 @@ void m68008_device::move_l_das_paid_ip8() // 2128 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69308,7 +69308,7 @@ void m68008_device::move_l_dais_paid_ip8() // 2130 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -69399,7 +69399,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69476,7 +69476,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69516,7 +69516,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69644,7 +69644,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -69721,7 +69721,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -69761,7 +69761,7 @@ void m68008_device::move_l_adr16_paid_ip8() // 2138 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -69925,7 +69925,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -70002,7 +70002,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70042,7 +70042,7 @@ void m68008_device::move_l_adr32_paid_ip8() // 2139 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70167,7 +70167,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -70244,7 +70244,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70284,7 +70284,7 @@ void m68008_device::move_l_dpc_paid_ip8() // 213a f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70371,7 +70371,7 @@ void m68008_device::move_l_dpci_paid_ip8() // 213b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -70462,7 +70462,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -70539,7 +70539,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70579,7 +70579,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70745,7 +70745,7 @@ void m68008_device::move_l_imm32_paid_ip8() // 213c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -70785,7 +70785,7 @@ void m68008_device::move_l_imm32_paid_ip8() // 213c f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70913,7 +70913,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -70952,7 +70952,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -70992,7 +70992,7 @@ void m68008_device::move_l_ds_dad_ip8() // 2140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71084,7 +71084,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71123,7 +71123,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -71163,7 +71163,7 @@ void m68008_device::move_l_as_dad_ip8() // 2148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71217,7 +71217,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -71293,7 +71293,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71333,7 +71333,7 @@ void m68008_device::move_l_ais_dad_ip8() // 2150 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71466,7 +71466,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -71545,7 +71545,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71585,7 +71585,7 @@ void m68008_device::move_l_aips_dad_ip8() // 2158 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -71717,7 +71717,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -71798,7 +71798,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -71838,7 +71838,7 @@ void m68008_device::move_l_pais_dad_ip8() // 2160 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72007,7 +72007,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72083,7 +72083,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72123,7 +72123,7 @@ void m68008_device::move_l_das_dad_ip8() // 2168 f1f8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72254,7 +72254,7 @@ void m68008_device::move_l_dais_dad_ip8() // 2170 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -72345,7 +72345,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72421,7 +72421,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72461,7 +72461,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72632,7 +72632,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -72708,7 +72708,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -72748,7 +72748,7 @@ void m68008_device::move_l_adr16_dad_ip8() // 2178 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -72955,7 +72955,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -73031,7 +73031,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73071,7 +73071,7 @@ void m68008_device::move_l_adr32_dad_ip8() // 2179 f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73239,7 +73239,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -73315,7 +73315,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73355,7 +73355,7 @@ void m68008_device::move_l_dpc_dad_ip8() // 217a f1ff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73485,7 +73485,7 @@ void m68008_device::move_l_dpci_dad_ip8() // 217b f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -73576,7 +73576,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -73652,7 +73652,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -73692,7 +73692,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73937,7 +73937,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -73976,7 +73976,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74016,7 +74016,7 @@ void m68008_device::move_l_imm32_dad_ip8() // 217c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74068,7 +74068,7 @@ void m68008_device::move_l_ds_daid_ip8() // 2180 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -74162,7 +74162,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74201,7 +74201,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74241,7 +74241,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74293,7 +74293,7 @@ void m68008_device::move_l_as_daid_ip8() // 2188 f1f8
switch(m_inst_substate) {
case 0:
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -74387,7 +74387,7 @@ rmdl2:
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74426,7 +74426,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -74466,7 +74466,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74520,7 +74520,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74593,7 +74593,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -74608,7 +74608,7 @@ void m68008_device::move_l_ais_daid_ip8() // 2190 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74647,7 +74647,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74689,7 +74689,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -74822,7 +74822,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -74898,7 +74898,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -74913,7 +74913,7 @@ void m68008_device::move_l_aips_daid_ip8() // 2198 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74952,7 +74952,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -74994,7 +74994,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75126,7 +75126,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -75204,7 +75204,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75219,7 +75219,7 @@ void m68008_device::move_l_pais_daid_ip8() // 21a0 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75258,7 +75258,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75300,7 +75300,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75469,7 +75469,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75542,7 +75542,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75557,7 +75557,7 @@ void m68008_device::move_l_das_daid_ip8() // 21a8 f1f8
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75596,7 +75596,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75638,7 +75638,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -75769,7 +75769,7 @@ void m68008_device::move_l_dais_daid_ip8() // 21b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -75860,7 +75860,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -75933,7 +75933,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -75948,7 +75948,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -75987,7 +75987,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76029,7 +76029,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76200,7 +76200,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -76273,7 +76273,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -76288,7 +76288,7 @@ void m68008_device::move_l_adr16_daid_ip8() // 21b8 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76327,7 +76327,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76369,7 +76369,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76576,7 +76576,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -76649,7 +76649,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -76664,7 +76664,7 @@ void m68008_device::move_l_adr32_daid_ip8() // 21b9 f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76703,7 +76703,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -76745,7 +76745,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -76913,7 +76913,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -76986,7 +76986,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -77001,7 +77001,7 @@ void m68008_device::move_l_dpc_daid_ip8() // 21ba f1ff
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77040,7 +77040,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77082,7 +77082,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77212,7 +77212,7 @@ void m68008_device::move_l_dpci_daid_ip8() // 21bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -77303,7 +77303,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -77376,7 +77376,7 @@ adsl2:
}
m_dbin = m_edb;
// 29c mmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 10d mmxl1
@@ -77391,7 +77391,7 @@ adsl2:
mmxl2:
// 02c mmxl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77430,7 +77430,7 @@ mmxl2:
mmxl3:
// 0ec mmxl3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77472,7 +77472,7 @@ mawl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77677,7 +77677,7 @@ void m68008_device::move_l_imm32_daid_ip8() // 21bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1ef rmxl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 105 rmxl1
@@ -77771,7 +77771,7 @@ rmdl2:
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -77810,7 +77810,7 @@ rmdl2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -77850,7 +77850,7 @@ rmdl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77905,7 +77905,7 @@ void m68008_device::move_l_ds_adr16_ip8() // 21c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -77945,7 +77945,7 @@ void m68008_device::move_l_ds_adr16_ip8() // 21c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78079,7 +78079,7 @@ void m68008_device::move_l_as_adr16_ip8() // 21c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78119,7 +78119,7 @@ void m68008_device::move_l_as_adr16_ip8() // 21c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78251,7 +78251,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78327,7 +78327,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78367,7 +78367,7 @@ void m68008_device::move_l_ais_adr16_ip8() // 21d0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78499,7 +78499,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -78578,7 +78578,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78618,7 +78618,7 @@ void m68008_device::move_l_aips_adr16_ip8() // 21d8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -78749,7 +78749,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -78830,7 +78830,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -78870,7 +78870,7 @@ void m68008_device::move_l_pais_adr16_ip8() // 21e0 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79038,7 +79038,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79114,7 +79114,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79154,7 +79154,7 @@ void m68008_device::move_l_das_adr16_ip8() // 21e8 fff8
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79284,7 +79284,7 @@ void m68008_device::move_l_dais_adr16_ip8() // 21f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -79375,7 +79375,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79451,7 +79451,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79491,7 +79491,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79661,7 +79661,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -79737,7 +79737,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -79777,7 +79777,7 @@ void m68008_device::move_l_adr16_adr16_ip8() // 21f8 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -79983,7 +79983,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -80059,7 +80059,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80099,7 +80099,7 @@ void m68008_device::move_l_adr32_adr16_ip8() // 21f9 ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80266,7 +80266,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -80342,7 +80342,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80382,7 +80382,7 @@ void m68008_device::move_l_dpc_adr16_ip8() // 21fa ffff
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80511,7 +80511,7 @@ void m68008_device::move_l_dpci_adr16_ip8() // 21fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -80602,7 +80602,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -80678,7 +80678,7 @@ adsl2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80718,7 +80718,7 @@ adsl2:
m_dbout = m_alue;
set_16l(m_at, m_aluo);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -80926,7 +80926,7 @@ void m68008_device::move_l_imm32_adr16_ip8() // 21fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -80966,7 +80966,7 @@ void m68008_device::move_l_imm32_adr16_ip8() // 21fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81136,7 +81136,7 @@ void m68008_device::move_l_ds_adr32_ip8() // 23c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81176,7 +81176,7 @@ void m68008_device::move_l_ds_adr32_ip8() // 23c0 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81346,7 +81346,7 @@ void m68008_device::move_l_as_adr32_ip8() // 23c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -81386,7 +81386,7 @@ void m68008_device::move_l_as_adr32_ip8() // 23c8 fff8
m_dbout = high16(m_da[ry]);
m_alub = high16(m_da[ry]);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81518,7 +81518,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -81595,7 +81595,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -81633,7 +81633,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81672,7 +81672,7 @@ void m68008_device::move_l_ais_adr32_ip8() // 23d0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -81803,7 +81803,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -81883,7 +81883,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -81921,7 +81921,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -81960,7 +81960,7 @@ void m68008_device::move_l_aips_adr32_ip8() // 23d8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82090,7 +82090,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -82172,7 +82172,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -82210,7 +82210,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82249,7 +82249,7 @@ void m68008_device::move_l_pais_adr32_ip8() // 23e0 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82416,7 +82416,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -82493,7 +82493,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -82531,7 +82531,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82570,7 +82570,7 @@ void m68008_device::move_l_das_adr32_ip8() // 23e8 fff8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -82699,7 +82699,7 @@ void m68008_device::move_l_dais_adr32_ip8() // 23f0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -82790,7 +82790,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -82867,7 +82867,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -82905,7 +82905,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -82944,7 +82944,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83113,7 +83113,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -83190,7 +83190,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -83228,7 +83228,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83267,7 +83267,7 @@ void m68008_device::move_l_adr16_adr32_ip8() // 23f8 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83472,7 +83472,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -83549,7 +83549,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -83587,7 +83587,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83626,7 +83626,7 @@ void m68008_device::move_l_adr32_adr32_ip8() // 23f9 ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -83792,7 +83792,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -83869,7 +83869,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -83907,7 +83907,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -83946,7 +83946,7 @@ void m68008_device::move_l_dpc_adr32_ip8() // 23fa ffff
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84074,7 +84074,7 @@ void m68008_device::move_l_dpci_adr32_ip8() // 23fb ffff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -84165,7 +84165,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -84242,7 +84242,7 @@ adsl2:
m_pc = m_au;
set_16l(m_at, m_dbin);
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -84280,7 +84280,7 @@ adsl2:
m_aob = merge_16_32(high16(m_at), m_dbin);
m_dbout = m_aluo;
m_au = merge_16_32(high16(m_at), m_dbin) + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=11:m_at d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -84319,7 +84319,7 @@ adsl2:
m_ir = m_irc;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84562,7 +84562,7 @@ void m68008_device::move_l_imm32_adr32_ip8() // 23fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -84602,7 +84602,7 @@ void m68008_device::move_l_imm32_adr32_ip8() // 23fc ffff
m_dbout = high16(m_dt);
m_alub = high16(m_dt);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nz.. i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=.nz.. i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
sr_nz_u();
m_base_ssw = SSW_DATA;
@@ -84738,7 +84738,7 @@ void m68008_device::move_w_ds_dd_ip8() // 3000 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -84800,7 +84800,7 @@ void m68008_device::move_w_as_dd_ip8() // 3008 f1f8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -84859,7 +84859,7 @@ void m68008_device::move_w_ais_dd_ip8() // 3010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -84901,7 +84901,7 @@ void m68008_device::move_w_ais_dd_ip8() // 3010 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -84964,7 +84964,7 @@ void m68008_device::move_w_aips_dd_ip8() // 3018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85004,7 +85004,7 @@ void m68008_device::move_w_aips_dd_ip8() // 3018 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85069,7 +85069,7 @@ void m68008_device::move_w_pais_dd_ip8() // 3020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -85109,7 +85109,7 @@ void m68008_device::move_w_pais_dd_ip8() // 3020 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85203,7 +85203,7 @@ void m68008_device::move_w_das_dd_ip8() // 3028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85245,7 +85245,7 @@ void m68008_device::move_w_das_dd_ip8() // 3028 f1f8
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85300,7 +85300,7 @@ void m68008_device::move_w_dais_dd_ip8() // 3030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -85392,7 +85392,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85434,7 +85434,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85529,7 +85529,7 @@ void m68008_device::move_w_adr16_dd_ip8() // 3038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -85569,7 +85569,7 @@ void m68008_device::move_w_adr16_dd_ip8() // 3038 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85700,7 +85700,7 @@ void m68008_device::move_w_adr32_dd_ip8() // 3039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -85740,7 +85740,7 @@ void m68008_device::move_w_adr32_dd_ip8() // 3039 f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85833,7 +85833,7 @@ void m68008_device::move_w_dpc_dd_ip8() // 303a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -85875,7 +85875,7 @@ void m68008_device::move_w_dpc_dd_ip8() // 303a f1ff
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -85929,7 +85929,7 @@ void m68008_device::move_w_dpci_dd_ip8() // 303b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86021,7 +86021,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -86063,7 +86063,7 @@ adsw2:
m_pc = m_au;
set_16l(m_da[rx], m_dbin);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -86161,7 +86161,7 @@ void m68008_device::move_w_imm16_dd_ip8() // 303c f1ff
m_pc = m_au;
m_at = m_dt;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
// 27a rrgw2
@@ -86227,7 +86227,7 @@ void m68008_device::movea_w_ds_ad_ip8() // 3040 f1f8
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -86286,7 +86286,7 @@ void m68008_device::movea_w_as_ad_ip8() // 3048 f1f8
// 278 rrgl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=2 c=1 m=..... i=......f 1 a=17:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=17:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
m_da[rx] = m_at;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -86340,7 +86340,7 @@ void m68008_device::movea_w_ais_ad_ip8() // 3050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86442,7 +86442,7 @@ void m68008_device::movea_w_aips_ad_ip8() // 3058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86544,7 +86544,7 @@ void m68008_device::movea_w_pais_ad_ip8() // 3060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -86675,7 +86675,7 @@ void m68008_device::movea_w_das_ad_ip8() // 3068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86769,7 +86769,7 @@ void m68008_device::movea_w_dais_ad_ip8() // 3070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -86861,7 +86861,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -86995,7 +86995,7 @@ void m68008_device::movea_w_adr16_ad_ip8() // 3078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -87163,7 +87163,7 @@ void m68008_device::movea_w_adr32_ad_ip8() // 3079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -87293,7 +87293,7 @@ void m68008_device::movea_w_dpc_ad_ip8() // 307a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87386,7 +87386,7 @@ void m68008_device::movea_w_dpci_ad_ip8() // 307b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -87478,7 +87478,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87619,7 +87619,7 @@ void m68008_device::movea_w_imm16_ad_ip8() // 307c f1ff
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_at;
- // alu r=2 c=1 m=..... i=......f 1 a=23:m_dt d=-1
+ // alu r=2 c=1 m=..... i=......f ALU.and_ a=23:m_dt d=-1
alu_and(high16(m_dt), 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -87675,7 +87675,7 @@ void m68008_device::move_w_ds_aid_ip8() // 3080 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -87770,7 +87770,7 @@ void m68008_device::move_w_as_aid_ip8() // 3088 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -87862,7 +87862,7 @@ void m68008_device::move_w_ais_aid_ip8() // 3090 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -87903,7 +87903,7 @@ void m68008_device::move_w_ais_aid_ip8() // 3090 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88001,7 +88001,7 @@ void m68008_device::move_w_aips_aid_ip8() // 3098 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88040,7 +88040,7 @@ void m68008_device::move_w_aips_aid_ip8() // 3098 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88140,7 +88140,7 @@ void m68008_device::move_w_pais_aid_ip8() // 30a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -88179,7 +88179,7 @@ void m68008_device::move_w_pais_aid_ip8() // 30a0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88308,7 +88308,7 @@ void m68008_device::move_w_das_aid_ip8() // 30a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88349,7 +88349,7 @@ void m68008_device::move_w_das_aid_ip8() // 30a8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88439,7 +88439,7 @@ void m68008_device::move_w_dais_aid_ip8() // 30b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -88531,7 +88531,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -88572,7 +88572,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88702,7 +88702,7 @@ void m68008_device::move_w_adr16_aid_ip8() // 30b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -88741,7 +88741,7 @@ void m68008_device::move_w_adr16_aid_ip8() // 30b8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -88907,7 +88907,7 @@ void m68008_device::move_w_adr32_aid_ip8() // 30b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -88946,7 +88946,7 @@ void m68008_device::move_w_adr32_aid_ip8() // 30b9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89074,7 +89074,7 @@ void m68008_device::move_w_dpc_aid_ip8() // 30ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89115,7 +89115,7 @@ void m68008_device::move_w_dpc_aid_ip8() // 30ba f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89204,7 +89204,7 @@ void m68008_device::move_w_dpci_aid_ip8() // 30bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -89296,7 +89296,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89337,7 +89337,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89470,7 +89470,7 @@ void m68008_device::move_w_imm16_aid_ip8() // 30bc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89565,7 +89565,7 @@ void m68008_device::move_w_ds_aipd_ip8() // 30c0 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89659,7 +89659,7 @@ void m68008_device::move_w_as_aipd_ip8() // 30c8 f1f8
m_dbout = m_da[ry];
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89750,7 +89750,7 @@ void m68008_device::move_w_ais_aipd_ip8() // 30d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -89792,7 +89792,7 @@ void m68008_device::move_w_ais_aipd_ip8() // 30d0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -89889,7 +89889,7 @@ void m68008_device::move_w_aips_aipd_ip8() // 30d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -89929,7 +89929,7 @@ void m68008_device::move_w_aips_aipd_ip8() // 30d8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90028,7 +90028,7 @@ void m68008_device::move_w_pais_aipd_ip8() // 30e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -90068,7 +90068,7 @@ void m68008_device::move_w_pais_aipd_ip8() // 30e0 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90196,7 +90196,7 @@ void m68008_device::move_w_das_aipd_ip8() // 30e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -90238,7 +90238,7 @@ void m68008_device::move_w_das_aipd_ip8() // 30e8 f1f8
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90327,7 +90327,7 @@ void m68008_device::move_w_dais_aipd_ip8() // 30f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -90419,7 +90419,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -90461,7 +90461,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90590,7 +90590,7 @@ void m68008_device::move_w_adr16_aipd_ip8() // 30f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -90630,7 +90630,7 @@ void m68008_device::move_w_adr16_aipd_ip8() // 30f8 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90795,7 +90795,7 @@ void m68008_device::move_w_adr32_aipd_ip8() // 30f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -90835,7 +90835,7 @@ void m68008_device::move_w_adr32_aipd_ip8() // 30f9 f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -90962,7 +90962,7 @@ void m68008_device::move_w_dpc_aipd_ip8() // 30fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91004,7 +91004,7 @@ void m68008_device::move_w_dpc_aipd_ip8() // 30fa f1ff
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91092,7 +91092,7 @@ void m68008_device::move_w_dpci_aipd_ip8() // 30fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -91184,7 +91184,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91226,7 +91226,7 @@ adsw2:
m_dbout = m_dbin;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91358,7 +91358,7 @@ void m68008_device::move_w_imm16_aipd_ip8() // 30fc f1ff
m_dbout = m_dt;
m_pc = m_au;
m_au = m_da[rx] + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -91451,7 +91451,7 @@ void m68008_device::move_w_ds_paid_ip8() // 3100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91545,7 +91545,7 @@ void m68008_device::move_w_as_paid_ip8() // 3108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91637,7 +91637,7 @@ void m68008_device::move_w_ais_paid_ip8() // 3110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -91678,7 +91678,7 @@ void m68008_device::move_w_ais_paid_ip8() // 3110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91776,7 +91776,7 @@ void m68008_device::move_w_aips_paid_ip8() // 3118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91815,7 +91815,7 @@ void m68008_device::move_w_aips_paid_ip8() // 3118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -91915,7 +91915,7 @@ void m68008_device::move_w_pais_paid_ip8() // 3120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -91954,7 +91954,7 @@ void m68008_device::move_w_pais_paid_ip8() // 3120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92083,7 +92083,7 @@ void m68008_device::move_w_das_paid_ip8() // 3128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92124,7 +92124,7 @@ void m68008_device::move_w_das_paid_ip8() // 3128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92214,7 +92214,7 @@ void m68008_device::move_w_dais_paid_ip8() // 3130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -92306,7 +92306,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92347,7 +92347,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92477,7 +92477,7 @@ void m68008_device::move_w_adr16_paid_ip8() // 3138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -92516,7 +92516,7 @@ void m68008_device::move_w_adr16_paid_ip8() // 3138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92682,7 +92682,7 @@ void m68008_device::move_w_adr32_paid_ip8() // 3139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -92721,7 +92721,7 @@ void m68008_device::move_w_adr32_paid_ip8() // 3139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92849,7 +92849,7 @@ void m68008_device::move_w_dpc_paid_ip8() // 313a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -92890,7 +92890,7 @@ void m68008_device::move_w_dpc_paid_ip8() // 313a f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -92979,7 +92979,7 @@ void m68008_device::move_w_dpci_paid_ip8() // 313b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -93071,7 +93071,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -93112,7 +93112,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93244,7 +93244,7 @@ void m68008_device::move_w_imm16_paid_ip8() // 313c f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_da[rx] - 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93374,7 +93374,7 @@ void m68008_device::move_w_ds_dad_ip8() // 3140 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -93505,7 +93505,7 @@ void m68008_device::move_w_as_dad_ip8() // 3148 f1f8
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -93598,7 +93598,7 @@ void m68008_device::move_w_ais_dad_ip8() // 3150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -93638,7 +93638,7 @@ void m68008_device::move_w_ais_dad_ip8() // 3150 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93778,7 +93778,7 @@ void m68008_device::move_w_aips_dad_ip8() // 3158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93816,7 +93816,7 @@ void m68008_device::move_w_aips_dad_ip8() // 3158 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -93958,7 +93958,7 @@ void m68008_device::move_w_pais_dad_ip8() // 3160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -93996,7 +93996,7 @@ void m68008_device::move_w_pais_dad_ip8() // 3160 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94167,7 +94167,7 @@ void m68008_device::move_w_das_dad_ip8() // 3168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -94207,7 +94207,7 @@ void m68008_device::move_w_das_dad_ip8() // 3168 f1f8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94339,7 +94339,7 @@ void m68008_device::move_w_dais_dad_ip8() // 3170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -94431,7 +94431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -94471,7 +94471,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94643,7 +94643,7 @@ void m68008_device::move_w_adr16_dad_ip8() // 3178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -94681,7 +94681,7 @@ void m68008_device::move_w_adr16_dad_ip8() // 3178 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -94889,7 +94889,7 @@ void m68008_device::move_w_adr32_dad_ip8() // 3179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -94927,7 +94927,7 @@ void m68008_device::move_w_adr32_dad_ip8() // 3179 f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95097,7 +95097,7 @@ void m68008_device::move_w_dpc_dad_ip8() // 317a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -95137,7 +95137,7 @@ void m68008_device::move_w_dpc_dad_ip8() // 317a f1ff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95268,7 +95268,7 @@ void m68008_device::move_w_dpci_dad_ip8() // 317b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -95360,7 +95360,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -95400,7 +95400,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo) + m_da[rx];
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -95610,7 +95610,7 @@ void m68008_device::move_w_imm16_dad_ip8() // 317c f1ff
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -95701,7 +95701,7 @@ void m68008_device::move_w_ds_daid_ip8() // 3180 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -95795,7 +95795,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -95886,7 +95886,7 @@ void m68008_device::move_w_as_daid_ip8() // 3188 f1f8
switch(m_inst_substate) {
case 0:
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -95980,7 +95980,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_da[ry];
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -96073,7 +96073,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -96110,7 +96110,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96125,7 +96125,7 @@ void m68008_device::move_w_ais_daid_ip8() // 3190 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96164,7 +96164,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96306,7 +96306,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96341,7 +96341,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96356,7 +96356,7 @@ void m68008_device::move_w_aips_daid_ip8() // 3198 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96395,7 +96395,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96539,7 +96539,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -96574,7 +96574,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96589,7 +96589,7 @@ void m68008_device::move_w_pais_daid_ip8() // 31a0 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96628,7 +96628,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96801,7 +96801,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -96838,7 +96838,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -96853,7 +96853,7 @@ void m68008_device::move_w_das_daid_ip8() // 31a8 f1f8
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -96892,7 +96892,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97026,7 +97026,7 @@ void m68008_device::move_w_dais_daid_ip8() // 31b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -97118,7 +97118,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -97155,7 +97155,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97170,7 +97170,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97209,7 +97209,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97383,7 +97383,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -97418,7 +97418,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97433,7 +97433,7 @@ void m68008_device::move_w_adr16_daid_ip8() // 31b8 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97472,7 +97472,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97682,7 +97682,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -97717,7 +97717,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97732,7 +97732,7 @@ void m68008_device::move_w_adr32_daid_ip8() // 31b9 f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97771,7 +97771,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -97943,7 +97943,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -97980,7 +97980,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -97995,7 +97995,7 @@ void m68008_device::move_w_dpc_daid_ip8() // 31ba f1ff
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98034,7 +98034,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98167,7 +98167,7 @@ void m68008_device::move_w_dpci_daid_ip8() // 31bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -98259,7 +98259,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -98296,7 +98296,7 @@ adsw2:
}
m_dbin = m_edb;
// 298 mmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=33:m_aluo d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.aluo:m_aluo d=0
alu_ext(m_aluo);
m_icount -= 2;
// 101 mmxw1
@@ -98311,7 +98311,7 @@ adsw2:
mmxw2:
// 028 mmxw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98350,7 +98350,7 @@ mmxw2:
mmxw3:
// 0e8 mmxw3
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98522,7 +98522,7 @@ void m68008_device::move_w_imm16_daid_ip8() // 31bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 1eb rmxw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 109 rmxw1
@@ -98616,7 +98616,7 @@ rmdw2:
m_ir = m_irc;
m_dbout = m_dt;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -98710,7 +98710,7 @@ void m68008_device::move_w_ds_adr16_ip8() // 31c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98845,7 +98845,7 @@ void m68008_device::move_w_as_adr16_ip8() // 31c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -98978,7 +98978,7 @@ void m68008_device::move_w_ais_adr16_ip8() // 31d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99018,7 +99018,7 @@ void m68008_device::move_w_ais_adr16_ip8() // 31d0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99157,7 +99157,7 @@ void m68008_device::move_w_aips_adr16_ip8() // 31d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -99195,7 +99195,7 @@ void m68008_device::move_w_aips_adr16_ip8() // 31d8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99336,7 +99336,7 @@ void m68008_device::move_w_pais_adr16_ip8() // 31e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -99374,7 +99374,7 @@ void m68008_device::move_w_pais_adr16_ip8() // 31e0 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99544,7 +99544,7 @@ void m68008_device::move_w_das_adr16_ip8() // 31e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99584,7 +99584,7 @@ void m68008_device::move_w_das_adr16_ip8() // 31e8 fff8
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -99715,7 +99715,7 @@ void m68008_device::move_w_dais_adr16_ip8() // 31f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -99807,7 +99807,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -99847,7 +99847,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100018,7 +100018,7 @@ void m68008_device::move_w_adr16_adr16_ip8() // 31f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -100056,7 +100056,7 @@ void m68008_device::move_w_adr16_adr16_ip8() // 31f8 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100263,7 +100263,7 @@ void m68008_device::move_w_adr32_adr16_ip8() // 31f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -100301,7 +100301,7 @@ void m68008_device::move_w_adr32_adr16_ip8() // 31f9 ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100470,7 +100470,7 @@ void m68008_device::move_w_dpc_adr16_ip8() // 31fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -100510,7 +100510,7 @@ void m68008_device::move_w_dpc_adr16_ip8() // 31fa ffff
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100640,7 +100640,7 @@ void m68008_device::move_w_dpci_adr16_ip8() // 31fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -100732,7 +100732,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -100772,7 +100772,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
m_au = ext32(m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -100945,7 +100945,7 @@ void m68008_device::move_w_imm16_adr16_ip8() // 31fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = ext32(m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101116,7 +101116,7 @@ void m68008_device::move_w_ds_adr32_ip8() // 33c0 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101287,7 +101287,7 @@ void m68008_device::move_w_as_adr32_ip8() // 33c8 fff8
m_pc = m_au;
set_16l(m_at, m_da[ry]);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=3:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101420,7 +101420,7 @@ void m68008_device::move_w_ais_adr32_ip8() // 33d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -101460,7 +101460,7 @@ void m68008_device::move_w_ais_adr32_ip8() // 33d0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101634,7 +101634,7 @@ void m68008_device::move_w_aips_adr32_ip8() // 33d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101672,7 +101672,7 @@ void m68008_device::move_w_aips_adr32_ip8() // 33d8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -101848,7 +101848,7 @@ void m68008_device::move_w_pais_adr32_ip8() // 33e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -101886,7 +101886,7 @@ void m68008_device::move_w_pais_adr32_ip8() // 33e0 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102091,7 +102091,7 @@ void m68008_device::move_w_das_adr32_ip8() // 33e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -102131,7 +102131,7 @@ void m68008_device::move_w_das_adr32_ip8() // 33e8 fff8
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102297,7 +102297,7 @@ void m68008_device::move_w_dais_adr32_ip8() // 33f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -102389,7 +102389,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -102429,7 +102429,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102635,7 +102635,7 @@ void m68008_device::move_w_adr16_adr32_ip8() // 33f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -102673,7 +102673,7 @@ void m68008_device::move_w_adr16_adr32_ip8() // 33f8 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -102915,7 +102915,7 @@ void m68008_device::move_w_adr32_adr32_ip8() // 33f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -102953,7 +102953,7 @@ void m68008_device::move_w_adr32_adr32_ip8() // 33f9 ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103157,7 +103157,7 @@ void m68008_device::move_w_dpc_adr32_ip8() // 33fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -103197,7 +103197,7 @@ void m68008_device::move_w_dpc_adr32_ip8() // 33fa ffff
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103362,7 +103362,7 @@ void m68008_device::move_w_dpci_adr32_ip8() // 33fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -103454,7 +103454,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -103494,7 +103494,7 @@ adsw2:
m_aob = m_au;
m_pc = m_au;
set_16h(m_at, m_aluo);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103738,7 +103738,7 @@ void m68008_device::move_w_imm16_adr32_ip8() // 33fc ffff
m_pc = m_au;
set_16l(m_at, m_dt);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=9:m_dt d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -103873,7 +103873,7 @@ void m68008_device::negx_b_ds_ip8() // 4000 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -103931,7 +103931,7 @@ void m68008_device::negx_b_ais_ip8() // 4010 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -103954,7 +103954,7 @@ void m68008_device::negx_b_ais_ip8() // 4010 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104032,7 +104032,7 @@ void m68008_device::negx_b_aips_ip8() // 4018 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -104053,7 +104053,7 @@ void m68008_device::negx_b_aips_ip8() // 4018 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104133,7 +104133,7 @@ void m68008_device::negx_b_pais_ip8() // 4020 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -104154,7 +104154,7 @@ void m68008_device::negx_b_pais_ip8() // 4020 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104263,7 +104263,7 @@ void m68008_device::negx_b_das_ip8() // 4028 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104286,7 +104286,7 @@ void m68008_device::negx_b_das_ip8() // 4028 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104356,7 +104356,7 @@ void m68008_device::negx_b_dais_ip8() // 4030 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -104448,7 +104448,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104471,7 +104471,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104581,7 +104581,7 @@ void m68008_device::negx_b_adr16_ip8() // 4038 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -104602,7 +104602,7 @@ void m68008_device::negx_b_adr16_ip8() // 4038 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104748,7 +104748,7 @@ void m68008_device::negx_b_adr32_ip8() // 4039 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -104769,7 +104769,7 @@ void m68008_device::negx_b_adr32_ip8() // 4039 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx8(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -104843,7 +104843,7 @@ void m68008_device::negx_w_ds_ip8() // 4040 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 08b roaw2
@@ -104901,7 +104901,7 @@ void m68008_device::negx_w_ais_ip8() // 4050 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -104942,7 +104942,7 @@ void m68008_device::negx_w_ais_ip8() // 4050 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105038,7 +105038,7 @@ void m68008_device::negx_w_aips_ip8() // 4058 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -105077,7 +105077,7 @@ void m68008_device::negx_w_aips_ip8() // 4058 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105175,7 +105175,7 @@ void m68008_device::negx_w_pais_ip8() // 4060 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -105214,7 +105214,7 @@ void m68008_device::negx_w_pais_ip8() // 4060 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105341,7 +105341,7 @@ void m68008_device::negx_w_das_ip8() // 4068 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -105382,7 +105382,7 @@ void m68008_device::negx_w_das_ip8() // 4068 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105470,7 +105470,7 @@ void m68008_device::negx_w_dais_ip8() // 4070 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -105562,7 +105562,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -105603,7 +105603,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105731,7 +105731,7 @@ void m68008_device::negx_w_adr16_ip8() // 4078 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -105770,7 +105770,7 @@ void m68008_device::negx_w_adr16_ip8() // 4078 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -105934,7 +105934,7 @@ void m68008_device::negx_w_adr32_ip8() // 4079 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -105973,7 +105973,7 @@ void m68008_device::negx_w_adr32_ip8() // 4079 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106065,12 +106065,12 @@ void m68008_device::negx_l_ds_ip8() // 4080 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=0
alu_subx(m_da[ry], 0x0000);
sr_xnzvc_u();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106129,7 +106129,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -106206,7 +106206,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106246,7 +106246,7 @@ void m68008_device::negx_l_ais_ip8() // 4090 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106334,7 +106334,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -106414,7 +106414,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106454,7 +106454,7 @@ void m68008_device::negx_l_aips_ip8() // 4098 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106541,7 +106541,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -106623,7 +106623,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106663,7 +106663,7 @@ void m68008_device::negx_l_pais_ip8() // 40a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106787,7 +106787,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -106864,7 +106864,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -106904,7 +106904,7 @@ void m68008_device::negx_l_das_ip8() // 40a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -106990,7 +106990,7 @@ void m68008_device::negx_l_dais_ip8() // 40b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=10 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -107081,7 +107081,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -107158,7 +107158,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107198,7 +107198,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107324,7 +107324,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -107401,7 +107401,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107441,7 +107441,7 @@ void m68008_device::negx_l_adr16_ip8() // 40b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107603,7 +107603,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -107680,7 +107680,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=31:m_dbin d=0
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dbin:m_dbin d=0
alu_subx(m_dbin, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -107720,7 +107720,7 @@ void m68008_device::negx_l_adr32_ip8() // 40b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -107867,7 +107867,7 @@ void m68008_device::move_sr_ais_ip8() // 40d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -107910,7 +107910,7 @@ void m68008_device::move_sr_ais_ip8() // 40d0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108005,7 +108005,7 @@ void m68008_device::move_sr_aips_ip8() // 40d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108046,7 +108046,7 @@ void m68008_device::move_sr_aips_ip8() // 40d8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108143,7 +108143,7 @@ void m68008_device::move_sr_pais_ip8() // 40e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -108184,7 +108184,7 @@ void m68008_device::move_sr_pais_ip8() // 40e0 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -108310,7 +108310,7 @@ void m68008_device::move_sr_das_ip8() // 40e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108353,7 +108353,7 @@ void m68008_device::move_sr_das_ip8() // 40e8 fff8
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108440,7 +108440,7 @@ void m68008_device::move_sr_dais_ip8() // 40f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -108532,7 +108532,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -108575,7 +108575,7 @@ adsw2:
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108702,7 +108702,7 @@ void m68008_device::move_sr_adr16_ip8() // 40f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -108743,7 +108743,7 @@ void m68008_device::move_sr_adr16_ip8() // 40f8 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -108906,7 +108906,7 @@ void m68008_device::move_sr_adr32_ip8() // 40f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -108947,7 +108947,7 @@ void m68008_device::move_sr_adr32_ip8() // 40f9 ffff
m_ftu = m_sr;
// 324 sftm2
m_au = m_at;
- // alu r=10 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -109037,7 +109037,7 @@ void m68008_device::chk_w_ds_dd_ip8() // 4180 f1f8
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_sub(m_da[rx], m_da[ry]);
sr_nzvc();
m_icount -= 2;
@@ -109045,7 +109045,7 @@ void m68008_device::chk_w_ds_dd_ip8() // 4180 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109063,14 +109063,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -109110,7 +109110,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109148,7 +109148,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109366,7 +109366,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -109405,7 +109405,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -109413,7 +109413,7 @@ void m68008_device::chk_w_ais_dd_ip8() // 4190 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109431,14 +109431,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109478,7 +109478,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109516,7 +109516,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -109740,7 +109740,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -109777,7 +109777,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -109785,7 +109785,7 @@ void m68008_device::chk_w_aips_dd_ip8() // 4198 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -109803,14 +109803,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -109850,7 +109850,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -109888,7 +109888,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110114,7 +110114,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -110151,7 +110151,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -110159,7 +110159,7 @@ void m68008_device::chk_w_pais_dd_ip8() // 41a0 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -110177,14 +110177,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -110224,7 +110224,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -110262,7 +110262,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110517,7 +110517,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -110556,7 +110556,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -110564,7 +110564,7 @@ void m68008_device::chk_w_das_dd_ip8() // 41a8 f1f8
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -110582,14 +110582,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -110629,7 +110629,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -110667,7 +110667,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -110883,7 +110883,7 @@ void m68008_device::chk_w_dais_dd_ip8() // 41b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -110975,7 +110975,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -111014,7 +111014,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111022,7 +111022,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111040,14 +111040,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -111087,7 +111087,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111125,7 +111125,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111381,7 +111381,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -111418,7 +111418,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111426,7 +111426,7 @@ void m68008_device::chk_w_adr16_dd_ip8() // 41b8 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111444,14 +111444,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -111491,7 +111491,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111529,7 +111529,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111821,7 +111821,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -111858,7 +111858,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -111866,7 +111866,7 @@ void m68008_device::chk_w_adr32_dd_ip8() // 41b9 f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -111884,14 +111884,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -111931,7 +111931,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -111969,7 +111969,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -112223,7 +112223,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -112262,7 +112262,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -112270,7 +112270,7 @@ void m68008_device::chk_w_dpc_dd_ip8() // 41ba f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -112288,14 +112288,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -112335,7 +112335,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -112373,7 +112373,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -112588,7 +112588,7 @@ void m68008_device::chk_w_dpci_dd_ip8() // 41bb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -112680,7 +112680,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -112719,7 +112719,7 @@ adsw2:
// 151 chkm1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_nzvc();
m_icount -= 2;
@@ -112727,7 +112727,7 @@ adsw2:
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -112745,14 +112745,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -112792,7 +112792,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -112830,7 +112830,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -113086,7 +113086,7 @@ void m68008_device::chk_w_imm16_dd_ip8() // 41bc f1ff
// 152 chkr1
m_alub = m_da[rx];
m_au = m_au - 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=2:m_da[rx] d=9:m_dt
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dtl:m_dt
alu_sub(m_da[rx], m_dt);
sr_nzvc();
m_icount -= 2;
@@ -113094,7 +113094,7 @@ void m68008_device::chk_w_imm16_dd_ip8() // 41bc f1ff
m_t = !(m_isr & (SR_V|SR_N));
m_pc = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=.nzvc i=.l...i. 1 a=alub d=-1
+ // alu r=6 c=1 m=.nzvc i=.l...i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -113112,14 +113112,14 @@ trap1:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=12:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=37:m_ftu d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -113159,7 +113159,7 @@ trap1:
m_da[16] = m_au;
m_ftu = 0x0018;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=26:m_pc d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -113197,7 +113197,7 @@ trap1:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -113567,7 +113567,7 @@ void m68008_device::lea_dais_ad_ip8() // 41f0 f1f8
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -114028,7 +114028,7 @@ void m68008_device::lea_dpci_ad_ip8() // 41fb f1ff
switch(m_inst_substate) {
case 0:
// 1fb leax0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ea leax1
@@ -114180,7 +114180,7 @@ void m68008_device::clr_b_ds_ip8() // 4200 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and8(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -114188,7 +114188,7 @@ void m68008_device::clr_b_ds_ip8() // 4200 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -114239,11 +114239,11 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -114263,7 +114263,7 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114305,7 +114305,7 @@ void m68008_device::clr_b_ais_ip8() // 4210 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -114339,12 +114339,12 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114365,7 +114365,7 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114407,7 +114407,7 @@ void m68008_device::clr_b_aips_ip8() // 4218 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -114440,7 +114440,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -114448,7 +114448,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -114469,7 +114469,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114511,7 +114511,7 @@ void m68008_device::clr_b_pais_ip8() // 4220 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -114542,7 +114542,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -114580,11 +114580,11 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -114604,7 +114604,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114646,7 +114646,7 @@ void m68008_device::clr_b_das_ip8() // 4228 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -114675,14 +114675,14 @@ void m68008_device::clr_b_dais_ip8() // 4230 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -114690,7 +114690,7 @@ void m68008_device::clr_b_dais_ip8() // 4230 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -114729,7 +114729,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -114770,11 +114770,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -114794,7 +114794,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114836,7 +114836,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -114869,7 +114869,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -114907,7 +114907,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -114928,7 +114928,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -114970,7 +114970,7 @@ void m68008_device::clr_b_adr16_ip8() // 4238 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -115001,7 +115001,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -115040,7 +115040,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -115078,7 +115078,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -115099,7 +115099,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and8(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115141,7 +115141,7 @@ void m68008_device::clr_b_adr32_ip8() // 4239 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -115174,7 +115174,7 @@ void m68008_device::clr_w_ds_ip8() // 4240 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 08b roaw2
@@ -115182,7 +115182,7 @@ void m68008_device::clr_w_ds_ip8() // 4240 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -115233,11 +115233,11 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -115275,7 +115275,7 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115317,7 +115317,7 @@ void m68008_device::clr_w_ais_ip8() // 4250 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -115369,12 +115369,12 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115413,7 +115413,7 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115455,7 +115455,7 @@ void m68008_device::clr_w_aips_ip8() // 4258 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -115506,7 +115506,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -115514,7 +115514,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -115553,7 +115553,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115595,7 +115595,7 @@ void m68008_device::clr_w_pais_ip8() // 4260 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -115644,7 +115644,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -115682,11 +115682,11 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -115724,7 +115724,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115766,7 +115766,7 @@ void m68008_device::clr_w_das_ip8() // 4268 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -115813,14 +115813,14 @@ void m68008_device::clr_w_dais_ip8() // 4270 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -115828,7 +115828,7 @@ void m68008_device::clr_w_dais_ip8() // 4270 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -115867,7 +115867,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -115908,11 +115908,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -115950,7 +115950,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -115992,7 +115992,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -116043,7 +116043,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -116081,7 +116081,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -116120,7 +116120,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116162,7 +116162,7 @@ void m68008_device::clr_w_adr16_ip8() // 4278 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -116211,7 +116211,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -116250,7 +116250,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -116288,7 +116288,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -116327,7 +116327,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116369,7 +116369,7 @@ void m68008_device::clr_w_adr32_ip8() // 4279 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -116420,12 +116420,12 @@ void m68008_device::clr_l_ds_ip8() // 4280 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=0
alu_and(m_da[ry], 0x0000);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=0
alu_and(high16(m_da[ry]), 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116466,7 +116466,7 @@ void m68008_device::clr_l_ds_ip8() // 4280 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -116485,7 +116485,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116525,7 +116525,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -116563,7 +116563,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116603,7 +116603,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -116643,7 +116643,7 @@ void m68008_device::clr_l_ais_ip8() // 4290 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -116692,7 +116692,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -116732,11 +116732,11 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -116774,7 +116774,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -116814,7 +116814,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -116854,7 +116854,7 @@ void m68008_device::clr_l_aips_ip8() // 4298 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -116902,14 +116902,14 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -116948,7 +116948,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -116986,7 +116986,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117026,7 +117026,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117066,7 +117066,7 @@ void m68008_device::clr_l_pais_ip8() // 42a0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -117115,7 +117115,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117152,7 +117152,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117192,7 +117192,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -117230,7 +117230,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117270,7 +117270,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117310,7 +117310,7 @@ void m68008_device::clr_l_das_ip8() // 42a8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -117357,14 +117357,14 @@ void m68008_device::clr_l_dais_ip8() // 42b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -117372,7 +117372,7 @@ void m68008_device::clr_l_dais_ip8() // 42b0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117411,7 +117411,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117451,7 +117451,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117491,7 +117491,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -117529,7 +117529,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117569,7 +117569,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117609,7 +117609,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -117660,7 +117660,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -117698,7 +117698,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -117738,7 +117738,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -117776,7 +117776,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -117816,7 +117816,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -117856,7 +117856,7 @@ void m68008_device::clr_l_adr16_ip8() // 42b8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -117905,7 +117905,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -117944,7 +117944,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_and(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -117982,7 +117982,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -118022,7 +118022,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -118060,7 +118060,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=0
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118100,7 +118100,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=0
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=0
alu_and(m_alub, 0x0000);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -118140,7 +118140,7 @@ void m68008_device::clr_l_adr32_ip8() // 42b9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -118191,7 +118191,7 @@ void m68008_device::neg_b_ds_ip8() // 4400 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub8(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -118249,7 +118249,7 @@ void m68008_device::neg_b_ais_ip8() // 4410 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118272,7 +118272,7 @@ void m68008_device::neg_b_ais_ip8() // 4410 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118350,7 +118350,7 @@ void m68008_device::neg_b_aips_ip8() // 4418 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -118371,7 +118371,7 @@ void m68008_device::neg_b_aips_ip8() // 4418 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118451,7 +118451,7 @@ void m68008_device::neg_b_pais_ip8() // 4420 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -118472,7 +118472,7 @@ void m68008_device::neg_b_pais_ip8() // 4420 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118581,7 +118581,7 @@ void m68008_device::neg_b_das_ip8() // 4428 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118604,7 +118604,7 @@ void m68008_device::neg_b_das_ip8() // 4428 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118674,7 +118674,7 @@ void m68008_device::neg_b_dais_ip8() // 4430 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -118766,7 +118766,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -118789,7 +118789,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -118899,7 +118899,7 @@ void m68008_device::neg_b_adr16_ip8() // 4438 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -118920,7 +118920,7 @@ void m68008_device::neg_b_adr16_ip8() // 4438 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119066,7 +119066,7 @@ void m68008_device::neg_b_adr32_ip8() // 4439 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -119087,7 +119087,7 @@ void m68008_device::neg_b_adr32_ip8() // 4439 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub8(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119161,7 +119161,7 @@ void m68008_device::neg_w_ds_ip8() // 4440 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 08b roaw2
@@ -119219,7 +119219,7 @@ void m68008_device::neg_w_ais_ip8() // 4450 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119260,7 +119260,7 @@ void m68008_device::neg_w_ais_ip8() // 4450 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119356,7 +119356,7 @@ void m68008_device::neg_w_aips_ip8() // 4458 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119395,7 +119395,7 @@ void m68008_device::neg_w_aips_ip8() // 4458 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119493,7 +119493,7 @@ void m68008_device::neg_w_pais_ip8() // 4460 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -119532,7 +119532,7 @@ void m68008_device::neg_w_pais_ip8() // 4460 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119659,7 +119659,7 @@ void m68008_device::neg_w_das_ip8() // 4468 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119700,7 +119700,7 @@ void m68008_device::neg_w_das_ip8() // 4468 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -119788,7 +119788,7 @@ void m68008_device::neg_w_dais_ip8() // 4470 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -119880,7 +119880,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -119921,7 +119921,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120049,7 +120049,7 @@ void m68008_device::neg_w_adr16_ip8() // 4478 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -120088,7 +120088,7 @@ void m68008_device::neg_w_adr16_ip8() // 4478 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120252,7 +120252,7 @@ void m68008_device::neg_w_adr32_ip8() // 4479 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -120291,7 +120291,7 @@ void m68008_device::neg_w_adr32_ip8() // 4479 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120383,12 +120383,12 @@ void m68008_device::neg_l_ds_ip8() // 4480 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=0
alu_sub(m_da[ry], 0x0000);
sr_xnzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=0
alu_subc(high16(m_da[ry]), 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120447,7 +120447,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120524,7 +120524,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120564,7 +120564,7 @@ void m68008_device::neg_l_ais_ip8() // 4490 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -120652,7 +120652,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -120732,7 +120732,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120772,7 +120772,7 @@ void m68008_device::neg_l_aips_ip8() // 4498 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -120859,7 +120859,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -120941,7 +120941,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -120981,7 +120981,7 @@ void m68008_device::neg_l_pais_ip8() // 44a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121105,7 +121105,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121182,7 +121182,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121222,7 +121222,7 @@ void m68008_device::neg_l_das_ip8() // 44a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121308,7 +121308,7 @@ void m68008_device::neg_l_dais_ip8() // 44b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -121399,7 +121399,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121476,7 +121476,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121516,7 +121516,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121642,7 +121642,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -121719,7 +121719,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -121759,7 +121759,7 @@ void m68008_device::neg_l_adr16_ip8() // 44b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -121921,7 +121921,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -121998,7 +121998,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=0
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=0
alu_sub(m_dbin, 0x0000);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -122038,7 +122038,7 @@ void m68008_device::neg_l_adr32_ip8() // 44b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=0
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=0
alu_subc(m_alub, 0x0000);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -122228,7 +122228,7 @@ void m68008_device::move_ais_ccr_ip8() // 44d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -122375,7 +122375,7 @@ void m68008_device::move_aips_ccr_ip8() // 44d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -122522,7 +122522,7 @@ void m68008_device::move_pais_ccr_ip8() // 44e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -122698,7 +122698,7 @@ void m68008_device::move_das_ccr_ip8() // 44e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -122837,7 +122837,7 @@ void m68008_device::move_dais_ccr_ip8() // 44f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -122929,7 +122929,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -123108,7 +123108,7 @@ void m68008_device::move_adr16_ccr_ip8() // 44f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -123321,7 +123321,7 @@ void m68008_device::move_adr32_ccr_ip8() // 44f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -123496,7 +123496,7 @@ void m68008_device::move_dpc_ccr_ip8() // 44fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -123634,7 +123634,7 @@ void m68008_device::move_dpci_ccr_ip8() // 44fb ffff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -123726,7 +123726,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124009,7 +124009,7 @@ void m68008_device::not_b_ds_ip8() // 4600 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not8(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -124067,7 +124067,7 @@ void m68008_device::not_b_ais_ip8() // 4610 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124090,7 +124090,7 @@ void m68008_device::not_b_ais_ip8() // 4610 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124168,7 +124168,7 @@ void m68008_device::not_b_aips_ip8() // 4618 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124189,7 +124189,7 @@ void m68008_device::not_b_aips_ip8() // 4618 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124269,7 +124269,7 @@ void m68008_device::not_b_pais_ip8() // 4620 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=alub d=-1
alu_and8x(m_alub, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -124290,7 +124290,7 @@ void m68008_device::not_b_pais_ip8() // 4620 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124399,7 +124399,7 @@ void m68008_device::not_b_das_ip8() // 4628 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124422,7 +124422,7 @@ void m68008_device::not_b_das_ip8() // 4628 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124492,7 +124492,7 @@ void m68008_device::not_b_dais_ip8() // 4630 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -124584,7 +124584,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -124607,7 +124607,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124717,7 +124717,7 @@ void m68008_device::not_b_adr16_ip8() // 4638 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -124738,7 +124738,7 @@ void m68008_device::not_b_adr16_ip8() // 4638 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124884,7 +124884,7 @@ void m68008_device::not_b_adr32_ip8() // 4639 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=b...r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8x(m_dbin, 0xff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -124905,7 +124905,7 @@ void m68008_device::not_b_adr32_ip8() // 4639 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=b....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=b....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not8(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -124979,7 +124979,7 @@ void m68008_device::not_w_ds_ip8() // 4640 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -125037,7 +125037,7 @@ void m68008_device::not_w_ais_ip8() // 4650 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125078,7 +125078,7 @@ void m68008_device::not_w_ais_ip8() // 4650 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125174,7 +125174,7 @@ void m68008_device::not_w_aips_ip8() // 4658 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125213,7 +125213,7 @@ void m68008_device::not_w_aips_ip8() // 4658 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125311,7 +125311,7 @@ void m68008_device::not_w_pais_ip8() // 4660 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -125350,7 +125350,7 @@ void m68008_device::not_w_pais_ip8() // 4660 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125477,7 +125477,7 @@ void m68008_device::not_w_das_ip8() // 4668 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125518,7 +125518,7 @@ void m68008_device::not_w_das_ip8() // 4668 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125606,7 +125606,7 @@ void m68008_device::not_w_dais_ip8() // 4670 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -125698,7 +125698,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -125739,7 +125739,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -125867,7 +125867,7 @@ void m68008_device::not_w_adr16_ip8() // 4678 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -125906,7 +125906,7 @@ void m68008_device::not_w_adr16_ip8() // 4678 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126070,7 +126070,7 @@ void m68008_device::not_w_adr32_ip8() // 4679 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -126109,7 +126109,7 @@ void m68008_device::not_w_adr32_ip8() // 4679 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.....i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.....i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126201,12 +126201,12 @@ void m68008_device::not_l_ds_ip8() // 4680 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=4:m_da[ry] d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dyl:m_da[ry] d=0
alu_not(m_da[ry]);
sr_nzvc();
// 15e nnrl2
set_16l(m_da[ry], m_aluo);
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=18:m_da[ry] d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=18:m_da[ry] d=0
alu_not(high16(m_da[ry]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126265,7 +126265,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -126342,7 +126342,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126382,7 +126382,7 @@ void m68008_device::not_l_ais_ip8() // 4690 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126470,7 +126470,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -126550,7 +126550,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126590,7 +126590,7 @@ void m68008_device::not_l_aips_ip8() // 4698 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126677,7 +126677,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -126759,7 +126759,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -126799,7 +126799,7 @@ void m68008_device::not_l_pais_ip8() // 46a0 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -126923,7 +126923,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127000,7 +127000,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127040,7 +127040,7 @@ void m68008_device::not_l_das_ip8() // 46a8 fff8
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127126,7 +127126,7 @@ void m68008_device::not_l_dais_ip8() // 46b0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=11 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -127217,7 +127217,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127294,7 +127294,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127334,7 +127334,7 @@ adsl2:
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127460,7 +127460,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -127537,7 +127537,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127577,7 +127577,7 @@ void m68008_device::not_l_adr16_ip8() // 46b8 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -127739,7 +127739,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -127816,7 +127816,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=11 c=2 m=.nzvc i=.l...i. 7 a=31:m_dbin d=0
+ // alu r=11 c=2 m=.nzvc i=.l...i. ALU.not_ a=R.dbin:m_dbin d=0
alu_not(m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -127856,7 +127856,7 @@ void m68008_device::not_l_adr32_ip8() // 46b9 ffff
m_aob = m_at;
m_dbout = m_aluo;
m_au = m_at - 2;
- // alu r=11 c=3 m=.nzvc i=.l....f 7 a=alub d=0
+ // alu r=11 c=3 m=.nzvc i=.l....f ALU.not_ a=alub d=0
alu_not(m_alub);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -128056,7 +128056,7 @@ void m68008_device::move_ais_sr_ip8() // 46d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128209,7 +128209,7 @@ void m68008_device::move_aips_sr_ip8() // 46d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128362,7 +128362,7 @@ void m68008_device::move_pais_sr_ip8() // 46e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -128544,7 +128544,7 @@ void m68008_device::move_das_sr_ip8() // 46e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128689,7 +128689,7 @@ void m68008_device::move_dais_sr_ip8() // 46f0 fff8
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -128781,7 +128781,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -128966,7 +128966,7 @@ void m68008_device::move_adr16_sr_ip8() // 46f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -129185,7 +129185,7 @@ void m68008_device::move_adr32_sr_ip8() // 46f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -129366,7 +129366,7 @@ void m68008_device::move_dpc_sr_ip8() // 46fa ffff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129510,7 +129510,7 @@ void m68008_device::move_dpci_sr_ip8() // 46fb ffff
return;
}
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -129602,7 +129602,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129893,12 +129893,12 @@ void m68008_device::nbcd_b_ds_ip8() // 4800 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=0
alu_sbcd8(m_da[ry], 0x0000);
sr_xnzvc_u();
// 117 nbcr2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -129955,7 +129955,7 @@ void m68008_device::nbcd_b_ais_ip8() // 4810 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -129977,12 +129977,12 @@ void m68008_device::nbcd_b_ais_ip8() // 4810 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130058,7 +130058,7 @@ void m68008_device::nbcd_b_aips_ip8() // 4818 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -130078,12 +130078,12 @@ void m68008_device::nbcd_b_aips_ip8() // 4818 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130161,7 +130161,7 @@ void m68008_device::nbcd_b_pais_ip8() // 4820 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -130181,12 +130181,12 @@ void m68008_device::nbcd_b_pais_ip8() // 4820 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130293,7 +130293,7 @@ void m68008_device::nbcd_b_das_ip8() // 4828 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -130315,12 +130315,12 @@ void m68008_device::nbcd_b_das_ip8() // 4828 fff8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130388,7 +130388,7 @@ void m68008_device::nbcd_b_dais_ip8() // 4830 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -130480,7 +130480,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
@@ -130502,12 +130502,12 @@ adsw2:
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130615,7 +130615,7 @@ void m68008_device::nbcd_b_adr16_ip8() // 4838 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -130635,12 +130635,12 @@ void m68008_device::nbcd_b_adr16_ip8() // 4838 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130784,7 +130784,7 @@ void m68008_device::nbcd_b_adr32_ip8() // 4839 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -130804,12 +130804,12 @@ void m68008_device::nbcd_b_adr32_ip8() // 4839 ffff
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=31:m_dbin d=0
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dbin:m_dbin d=0
alu_sbcd8(m_dbin, 0x0000);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -130882,7 +130882,7 @@ void m68008_device::swap_ds_ip8() // 4840 fff8
m_alub = m_da[ry];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nzvc();
// 342 swap2
@@ -130890,7 +130890,7 @@ void m68008_device::swap_ds_ip8() // 4840 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[ry] = merge_16_32(high16(m_at), m_aluo);
m_au = m_au + 2;
- // alu r=9 c=1 m=.nz.. i=......f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=......f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -130946,7 +130946,7 @@ void m68008_device::pea_ais_ip8() // 4850 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_da[m_sp] - 4;
- // alu r=9 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131072,7 +131072,7 @@ void m68008_device::pea_das_ip8() // 4868 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131114,7 +131114,7 @@ void m68008_device::pea_das_ip8() // 4868 fff8
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131238,7 +131238,7 @@ void m68008_device::pea_dais_ip8() // 4870 fff8
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -131329,7 +131329,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -131830,7 +131830,7 @@ void m68008_device::pea_dpc_ip8() // 487a ffff
m_aob = m_au;
m_at = m_pc;
m_au = m_au + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -131872,7 +131872,7 @@ void m68008_device::pea_dpc_ip8() // 487a ffff
m_au = ext32(m_aluo) + m_at;
// 17f pead3
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -131995,7 +131995,7 @@ void m68008_device::pea_dpci_ip8() // 487b ffff
switch(m_inst_substate) {
case 0:
// 1ff peax0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3ee peax1
@@ -132086,7 +132086,7 @@ peax4:
// 218 peax4
m_ir = m_irc;
m_at = m_au;
- // alu r=9 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_pc + 4;
m_icount -= 2;
@@ -132219,7 +132219,7 @@ void m68008_device::ext_w_ds_ip8() // 4880 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=2 m=.nzvc i=.l...i. 5 a=4:m_da[ry] d=0
+ // alu r=8 c=2 m=.nzvc i=.l...i. ALU.ext a=R.dyl:m_da[ry] d=0
alu_ext(m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -132786,7 +132786,7 @@ void m68008_device::movem_w_list_dais_ip8() // 48b0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -133381,7 +133381,7 @@ void m68008_device::ext_l_ds_ip8() // 48c0 fff8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=8 c=3 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=3 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 233 extr2
@@ -134054,7 +134054,7 @@ void m68008_device::movem_l_list_dais_ip8() // 48f0 fff8
m_pc = m_au;
set_16l(m_at, m_dbin);
m_au = m_au - 2;
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02f stmx3
@@ -134755,13 +134755,13 @@ void m68008_device::tst_b_ds_ip8() // 4a00 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -134812,11 +134812,11 @@ void m68008_device::tst_b_ais_ip8() // 4a10 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -134836,13 +134836,13 @@ void m68008_device::tst_b_ais_ip8() // 4a10 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -134896,12 +134896,12 @@ void m68008_device::tst_b_aips_ip8() // 4a18 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -134922,13 +134922,13 @@ void m68008_device::tst_b_aips_ip8() // 4a18 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -134981,7 +134981,7 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -134989,7 +134989,7 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135010,13 +135010,13 @@ void m68008_device::tst_b_pais_ip8() // 4a20 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135067,7 +135067,7 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135105,11 +135105,11 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -135129,13 +135129,13 @@ void m68008_device::tst_b_das_ip8() // 4a28 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135184,14 +135184,14 @@ void m68008_device::tst_b_dais_ip8() // 4a30 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -135199,7 +135199,7 @@ void m68008_device::tst_b_dais_ip8() // 4a30 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135238,7 +135238,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135279,11 +135279,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -135303,13 +135303,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135362,7 +135362,7 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -135400,7 +135400,7 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -135421,13 +135421,13 @@ void m68008_device::tst_b_adr16_ip8() // 4a38 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135478,7 +135478,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135517,7 +135517,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -135555,7 +135555,7 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -135576,13 +135576,13 @@ void m68008_device::tst_b_adr32_ip8() // 4a39 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135636,13 +135636,13 @@ void m68008_device::tst_w_ds_ip8() // 4a40 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135693,11 +135693,11 @@ void m68008_device::tst_w_ais_ip8() // 4a50 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -135735,13 +135735,13 @@ void m68008_device::tst_w_ais_ip8() // 4a50 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135795,12 +135795,12 @@ void m68008_device::tst_w_aips_ip8() // 4a58 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135839,13 +135839,13 @@ void m68008_device::tst_w_aips_ip8() // 4a58 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -135898,7 +135898,7 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - 2;
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -135906,7 +135906,7 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -135945,13 +135945,13 @@ void m68008_device::tst_w_pais_ip8() // 4a60 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136002,7 +136002,7 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136040,11 +136040,11 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -136082,13 +136082,13 @@ void m68008_device::tst_w_das_ip8() // 4a68 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136137,14 +136137,14 @@ void m68008_device::tst_w_dais_ip8() // 4a70 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -136152,7 +136152,7 @@ void m68008_device::tst_w_dais_ip8() // 4a70 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136191,7 +136191,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136232,11 +136232,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -136274,13 +136274,13 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136333,7 +136333,7 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -136371,7 +136371,7 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -136410,13 +136410,13 @@ void m68008_device::tst_w_adr16_ip8() // 4a78 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136467,7 +136467,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136506,7 +136506,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=....... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -136544,7 +136544,7 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -136583,13 +136583,13 @@ void m68008_device::tst_w_adr32_ip8() // 4a79 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -136643,13 +136643,13 @@ void m68008_device::tst_l_ds_ip8() // 4a80 fff8
m_pc = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
// 362 tsrl2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=18:m_da[ry] d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136702,7 +136702,7 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136742,7 +136742,7 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -136780,13 +136780,13 @@ void m68008_device::tst_l_ais_ip8() // 4a90 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136839,7 +136839,7 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -136879,11 +136879,11 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -136921,13 +136921,13 @@ void m68008_device::tst_l_aips_ip8() // 4a98 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -136979,14 +136979,14 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137025,7 +137025,7 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137063,13 +137063,13 @@ void m68008_device::tst_l_pais_ip8() // 4aa0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137122,7 +137122,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137159,7 +137159,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137199,7 +137199,7 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137237,13 +137237,13 @@ void m68008_device::tst_l_das_ip8() // 4aa8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137294,14 +137294,14 @@ void m68008_device::tst_l_dais_ip8() // 4ab0 fff8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=15 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -137309,7 +137309,7 @@ void m68008_device::tst_l_dais_ip8() // 4ab0 fff8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137348,7 +137348,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137388,7 +137388,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137428,7 +137428,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137466,13 +137466,13 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137527,7 +137527,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -137565,7 +137565,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -137605,7 +137605,7 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137643,13 +137643,13 @@ void m68008_device::tst_l_adr16_ip8() // 4ab8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137702,7 +137702,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -137741,7 +137741,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=.l..... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -137779,7 +137779,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -137819,7 +137819,7 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -137857,13 +137857,13 @@ void m68008_device::tst_l_adr32_ip8() // 4ab9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=.l...i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 361 tsml2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=15 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137918,14 +137918,14 @@ void m68008_device::tas_ds_ip8() // 4ac0 fff8
m_ir = m_irc;
m_alub = m_da[ry];
m_pc = m_au;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=4:m_da[ry]
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_or8(m_ftu, m_da[ry]);
// 346 tasr2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_au + 2;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=alub d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -137978,11 +137978,11 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -137997,14 +137997,14 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138028,11 +138028,11 @@ void m68008_device::tas_ais_ip8() // 4ad0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138086,12 +138086,12 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8
m_dcr = m_da[m_movems];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -138107,14 +138107,14 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138138,11 +138138,11 @@ void m68008_device::tas_aips_ip8() // 4ad8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138195,7 +138195,7 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8
m_pc = m_au;
m_dcr = m_da[m_movems];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -138203,7 +138203,7 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -138219,14 +138219,14 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138250,11 +138250,11 @@ void m68008_device::tas_pais_ip8() // 4ae0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138305,7 +138305,7 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138343,11 +138343,11 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -138362,14 +138362,14 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138393,11 +138393,11 @@ void m68008_device::tas_das_ip8() // 4ae8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138446,14 +138446,14 @@ void m68008_device::tas_dais_ip8() // 4af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -138461,7 +138461,7 @@ void m68008_device::tas_dais_ip8() // 4af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138500,7 +138500,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138541,11 +138541,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[m_movems];
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -138560,14 +138560,14 @@ adsw2:
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138591,11 +138591,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138648,7 +138648,7 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff
m_dcr = m_da[m_movems];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -138686,7 +138686,7 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -138702,14 +138702,14 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138733,11 +138733,11 @@ void m68008_device::tas_adr16_ip8() // 4af8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138788,7 +138788,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -138827,7 +138827,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff
m_dcr = m_da[m_movems];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=14:m_da[m_movems] d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.moveml:m_da[m_movems] d=R.dbin:m_dbin
alu_or8(m_da[m_movems], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -138865,7 +138865,7 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -138881,14 +138881,14 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff
// 343 tasm1
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=37:m_ftu d=31:m_dbin
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_or8(m_ftu, m_dbin);
m_icount -= 2;
// 344 tasm2
m_aob = m_au;
set_8xl(m_dbout, m_aluo);
m_au = m_pc;
- // alu r=15 c=1 m=.nzvc i=b....i. 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
sr_nzvc();
m_base_ssw = SSW_DATA;
@@ -138912,11 +138912,11 @@ void m68008_device::tas_adr32_ip8() // 4af9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -139583,7 +139583,7 @@ void m68008_device::movem_w_dais_list_ip8() // 4cb0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -139671,7 +139671,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -140540,7 +140540,7 @@ void m68008_device::movem_w_dpci_list_ip8() // 4cbb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -140628,7 +140628,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -141497,7 +141497,7 @@ void m68008_device::movem_l_dais_list_ip8() // 4cf0 fff8
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -141585,7 +141585,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -142598,7 +142598,7 @@ void m68008_device::movem_l_dpci_list_ip8() // 4cfb ffff
m_irc = m_edb;
m_dbin = m_edb;
// 027 ldmx1
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 02b ldmx2
@@ -142686,7 +142686,7 @@ ldmx5:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 277 ldmx6
m_t = !m_movemr;
@@ -142872,14 +142872,14 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 3c2 trap3
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 1:
@@ -142919,7 +142919,7 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0
m_da[16] = m_au;
m_ftu = 0x80 | ((m_ird & 0xf) << 2);
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 5:
@@ -142957,7 +142957,7 @@ void m68008_device::trap_imm4_ip8() // 4e40 fff0
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -143158,7 +143158,7 @@ void m68008_device::link_as_imm16_ip8() // 4e50 fff8
m_aob = m_au;
m_at = m_da[ry];
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=3:m_da[ry] d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ayl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 2b5 link2
m_pc = m_au;
@@ -143586,7 +143586,7 @@ void m68008_device::reset_ip8() // 4e70 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 27b rset2
@@ -143724,7 +143724,7 @@ void m68008_device::stop_i16u_ip8() // 4e72 ffff
m_pc = m_au;
m_ftu = m_dbin;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=0
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=0
alu_and(m_dbin, 0x0000);
m_icount -= 2;
// 327 aaa01
@@ -143738,6 +143738,7 @@ void m68008_device::stop_i16u_ip8() // 4e72 ffff
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
m_inst_substate = 0;
+ debugger_wait_hook();
return;
}
}
@@ -143754,7 +143755,7 @@ void m68008_device::rte_ip8() // 4e73 ffff
if(!m_rte_instr_callback.isnull()) (m_rte_instr_callback)(1);
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -143964,7 +143965,7 @@ void m68008_device::rts_ip8() // 4e75 ffff
// 126 rts1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -144185,7 +144186,7 @@ trpv3:
update_user_super();
update_interrupt();
m_au = m_da[16] - 2;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -144223,7 +144224,7 @@ trpv3:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=37:m_ftu d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -144263,7 +144264,7 @@ trpv3:
m_da[16] = m_au;
m_ftu = 0x001c;
m_au = m_au + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=26:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -144301,7 +144302,7 @@ trpv3:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -144500,7 +144501,7 @@ void m68008_device::rtr_ip8() // 4e77 ffff
// 12a rtr1
m_aob = m_da[m_sp];
m_au = m_da[m_sp] + 2;
- // alu r=0 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -145035,7 +145036,7 @@ void m68008_device::jsr_dais_ip8() // 4eb0 fff8
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -145755,7 +145756,7 @@ void m68008_device::jsr_dpci_ip8() // 4ebb ffff
switch(m_inst_substate) {
case 0:
// 1f3 jsrx0
- // alu r=0 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b2 jsrx1
@@ -146128,7 +146129,7 @@ void m68008_device::jmp_dais_ip8() // 4ef0 fff8
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -146551,7 +146552,7 @@ void m68008_device::jmp_dpci_ip8() // 4efb ffff
switch(m_inst_substate) {
case 0:
// 1f7 jmpx0
- // alu r=0 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=0 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 2b6 jmpx1
@@ -146669,7 +146670,7 @@ void m68008_device::addq_b_imm3_ds_ip8() // 5000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -146727,7 +146728,7 @@ void m68008_device::addq_b_imm3_ais_ip8() // 5010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -146751,7 +146752,7 @@ void m68008_device::addq_b_imm3_ais_ip8() // 5010 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146829,7 +146830,7 @@ void m68008_device::addq_b_imm3_aips_ip8() // 5018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -146851,7 +146852,7 @@ void m68008_device::addq_b_imm3_aips_ip8() // 5018 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -146931,7 +146932,7 @@ void m68008_device::addq_b_imm3_pais_ip8() // 5020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -146953,7 +146954,7 @@ void m68008_device::addq_b_imm3_pais_ip8() // 5020 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147062,7 +147063,7 @@ void m68008_device::addq_b_imm3_das_ip8() // 5028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147086,7 +147087,7 @@ void m68008_device::addq_b_imm3_das_ip8() // 5028 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147156,7 +147157,7 @@ void m68008_device::addq_b_imm3_dais_ip8() // 5030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -147248,7 +147249,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147272,7 +147273,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147382,7 +147383,7 @@ void m68008_device::addq_b_imm3_adr16_ip8() // 5038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -147404,7 +147405,7 @@ void m68008_device::addq_b_imm3_adr16_ip8() // 5038 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147550,7 +147551,7 @@ void m68008_device::addq_b_imm3_adr32_ip8() // 5039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -147572,7 +147573,7 @@ void m68008_device::addq_b_imm3_adr32_ip8() // 5039 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147646,7 +147647,7 @@ void m68008_device::addq_w_imm3_ds_ip8() // 5040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -147706,7 +147707,7 @@ void m68008_device::addq_w_imm3_as_ip8() // 5048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.....i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -147744,7 +147745,7 @@ void m68008_device::addq_w_imm3_as_ip8() // 5048 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -147770,7 +147771,7 @@ void m68008_device::addq_w_imm3_ais_ip8() // 5050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -147812,7 +147813,7 @@ void m68008_device::addq_w_imm3_ais_ip8() // 5050 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -147908,7 +147909,7 @@ void m68008_device::addq_w_imm3_aips_ip8() // 5058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -147948,7 +147949,7 @@ void m68008_device::addq_w_imm3_aips_ip8() // 5058 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148046,7 +148047,7 @@ void m68008_device::addq_w_imm3_pais_ip8() // 5060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -148086,7 +148087,7 @@ void m68008_device::addq_w_imm3_pais_ip8() // 5060 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148213,7 +148214,7 @@ void m68008_device::addq_w_imm3_das_ip8() // 5068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -148255,7 +148256,7 @@ void m68008_device::addq_w_imm3_das_ip8() // 5068 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148343,7 +148344,7 @@ void m68008_device::addq_w_imm3_dais_ip8() // 5070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -148435,7 +148436,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -148477,7 +148478,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148605,7 +148606,7 @@ void m68008_device::addq_w_imm3_adr16_ip8() // 5078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -148645,7 +148646,7 @@ void m68008_device::addq_w_imm3_adr16_ip8() // 5078 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148809,7 +148810,7 @@ void m68008_device::addq_w_imm3_adr32_ip8() // 5079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -148849,7 +148850,7 @@ void m68008_device::addq_w_imm3_adr32_ip8() // 5079 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -148941,7 +148942,7 @@ void m68008_device::addq_l_imm3_ds_ip8() // 5080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=4:m_da[ry]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -148980,7 +148981,7 @@ void m68008_device::addq_l_imm3_ds_ip8() // 5080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=18:m_da[ry]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=18:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -149009,7 +149010,7 @@ void m68008_device::addq_l_imm3_as_ip8() // 5088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=2 c=2 m=..... i=.l...i. 4 a=37:m_ftu d=3:m_da[ry]
+ // alu r=2 c=2 m=..... i=.l...i. ALU.add a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_add(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -149047,7 +149048,7 @@ void m68008_device::addq_l_imm3_as_ip8() // 5088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=2 c=3 m=..... i=.l....f 11 a=23:m_dt d=17:m_da[ry]
+ // alu r=2 c=3 m=..... i=.l....f ALU.addc a=23:m_dt d=17:m_da[ry]
alu_addc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -149073,7 +149074,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149151,7 +149152,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149191,7 +149192,7 @@ void m68008_device::addq_l_imm3_ais_ip8() // 5090 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149279,7 +149280,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -149360,7 +149361,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149400,7 +149401,7 @@ void m68008_device::addq_l_imm3_aips_ip8() // 5098 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149487,7 +149488,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -149570,7 +149571,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149610,7 +149611,7 @@ void m68008_device::addq_l_imm3_pais_ip8() // 50a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149734,7 +149735,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -149812,7 +149813,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -149852,7 +149853,7 @@ void m68008_device::addq_l_imm3_das_ip8() // 50a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -149938,7 +149939,7 @@ void m68008_device::addq_l_imm3_dais_ip8() // 50b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -150029,7 +150030,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150107,7 +150108,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150147,7 +150148,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150273,7 +150274,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -150351,7 +150352,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150391,7 +150392,7 @@ void m68008_device::addq_l_imm3_adr16_ip8() // 50b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150553,7 +150554,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -150631,7 +150632,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=37:m_ftu d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_add(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -150671,7 +150672,7 @@ void m68008_device::addq_l_imm3_adr32_ip8() // 50b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=R.alue:m_alue
alu_addc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -150761,7 +150762,7 @@ void m68008_device::st_ds_ip8() // 50c0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -150773,7 +150774,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150816,7 +150817,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -150856,7 +150857,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -150875,7 +150876,7 @@ void m68008_device::dbt_ds_rel16_ip8() // 50c8 fff8
// 06c dbcc1
m_t = 1;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -150887,13 +150888,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -150936,7 +150937,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -150944,7 +150945,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -150983,11 +150984,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151033,13 +151034,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151085,7 +151086,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151134,11 +151135,11 @@ void m68008_device::st_ais_ip8() // 50d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -151158,7 +151159,7 @@ void m68008_device::st_ais_ip8() // 50d0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151168,7 +151169,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151207,7 +151208,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151250,7 +151251,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -151284,12 +151285,12 @@ void m68008_device::st_aips_ip8() // 50d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151310,7 +151311,7 @@ void m68008_device::st_aips_ip8() // 50d8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151320,7 +151321,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151359,7 +151360,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151402,7 +151403,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -151435,7 +151436,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -151443,7 +151444,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -151464,7 +151465,7 @@ void m68008_device::st_pais_ip8() // 50e0 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151474,7 +151475,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151513,7 +151514,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -151556,7 +151557,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -151587,7 +151588,7 @@ void m68008_device::st_das_ip8() // 50e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151625,11 +151626,11 @@ void m68008_device::st_das_ip8() // 50e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -151649,7 +151650,7 @@ void m68008_device::st_das_ip8() // 50e8 fff8
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151659,7 +151660,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151698,7 +151699,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -151741,7 +151742,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -151770,14 +151771,14 @@ void m68008_device::st_dais_ip8() // 50f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -151785,7 +151786,7 @@ void m68008_device::st_dais_ip8() // 50f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151824,7 +151825,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151865,11 +151866,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -151889,7 +151890,7 @@ adsw2:
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -151899,7 +151900,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -151938,7 +151939,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -151981,7 +151982,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -152014,7 +152015,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -152052,7 +152053,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -152073,7 +152074,7 @@ void m68008_device::st_adr16_ip8() // 50f8 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152083,7 +152084,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152122,7 +152123,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -152165,7 +152166,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -152196,7 +152197,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152235,7 +152236,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -152273,7 +152274,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -152294,7 +152295,7 @@ void m68008_device::st_adr32_ip8() // 50f9 ffff
m_ir = m_irc;
m_t = 1;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -152304,7 +152305,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -152343,7 +152344,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -152386,7 +152387,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -152419,7 +152420,7 @@ void m68008_device::subq_b_imm3_ds_ip8() // 5100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub8(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -152477,7 +152478,7 @@ void m68008_device::subq_b_imm3_ais_ip8() // 5110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -152501,7 +152502,7 @@ void m68008_device::subq_b_imm3_ais_ip8() // 5110 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152579,7 +152580,7 @@ void m68008_device::subq_b_imm3_aips_ip8() // 5118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -152601,7 +152602,7 @@ void m68008_device::subq_b_imm3_aips_ip8() // 5118 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152681,7 +152682,7 @@ void m68008_device::subq_b_imm3_pais_ip8() // 5120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -152703,7 +152704,7 @@ void m68008_device::subq_b_imm3_pais_ip8() // 5120 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152812,7 +152813,7 @@ void m68008_device::subq_b_imm3_das_ip8() // 5128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -152836,7 +152837,7 @@ void m68008_device::subq_b_imm3_das_ip8() // 5128 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -152906,7 +152907,7 @@ void m68008_device::subq_b_imm3_dais_ip8() // 5130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -152998,7 +152999,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -153022,7 +153023,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153132,7 +153133,7 @@ void m68008_device::subq_b_imm3_adr16_ip8() // 5138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -153154,7 +153155,7 @@ void m68008_device::subq_b_imm3_adr16_ip8() // 5138 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153300,7 +153301,7 @@ void m68008_device::subq_b_imm3_adr32_ip8() // 5139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -153322,7 +153323,7 @@ void m68008_device::subq_b_imm3_adr32_ip8() // 5139 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub8(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153396,7 +153397,7 @@ void m68008_device::subq_w_imm3_ds_ip8() // 5140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 08b roaw2
@@ -153456,7 +153457,7 @@ void m68008_device::subq_w_imm3_as_ip8() // 5148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.....i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -153494,7 +153495,7 @@ void m68008_device::subq_w_imm3_as_ip8() // 5148 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -153520,7 +153521,7 @@ void m68008_device::subq_w_imm3_ais_ip8() // 5150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -153562,7 +153563,7 @@ void m68008_device::subq_w_imm3_ais_ip8() // 5150 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153658,7 +153659,7 @@ void m68008_device::subq_w_imm3_aips_ip8() // 5158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153698,7 +153699,7 @@ void m68008_device::subq_w_imm3_aips_ip8() // 5158 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153796,7 +153797,7 @@ void m68008_device::subq_w_imm3_pais_ip8() // 5160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -153836,7 +153837,7 @@ void m68008_device::subq_w_imm3_pais_ip8() // 5160 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -153963,7 +153964,7 @@ void m68008_device::subq_w_imm3_das_ip8() // 5168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -154005,7 +154006,7 @@ void m68008_device::subq_w_imm3_das_ip8() // 5168 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154093,7 +154094,7 @@ void m68008_device::subq_w_imm3_dais_ip8() // 5170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -154185,7 +154186,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
@@ -154227,7 +154228,7 @@ adsw2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154355,7 +154356,7 @@ void m68008_device::subq_w_imm3_adr16_ip8() // 5178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -154395,7 +154396,7 @@ void m68008_device::subq_w_imm3_adr16_ip8() // 5178 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154559,7 +154560,7 @@ void m68008_device::subq_w_imm3_adr32_ip8() // 5179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -154599,7 +154600,7 @@ void m68008_device::subq_w_imm3_adr32_ip8() // 5179 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154691,7 +154692,7 @@ void m68008_device::subq_l_imm3_ds_ip8() // 5180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=4:m_da[ry]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dyl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
sr_xnzvc();
// 259 roal2
@@ -154730,7 +154731,7 @@ void m68008_device::subq_l_imm3_ds_ip8() // 5180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=18:m_da[ry]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=18:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
sr_xnzvc_u();
m_icount -= 2;
@@ -154759,7 +154760,7 @@ void m68008_device::subq_l_imm3_as_ip8() // 5188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_dt = ext32(m_ftu);
- // alu r=5 c=2 m=..... i=.l...i. 2 a=37:m_ftu d=3:m_da[ry]
+ // alu r=5 c=2 m=..... i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.ayl:m_da[ry]
alu_sub(m_ftu, m_da[ry]);
// 259 roal2
set_16l(m_da[ry], m_aluo);
@@ -154797,7 +154798,7 @@ void m68008_device::subq_l_imm3_as_ip8() // 5188 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=5 c=3 m=..... i=.l....f 10 a=23:m_dt d=17:m_da[ry]
+ // alu r=5 c=3 m=..... i=.l....f ALU.subc a=23:m_dt d=17:m_da[ry]
alu_subc(high16(m_dt), high16(m_da[ry]));
m_icount -= 2;
// 25b roal4
@@ -154823,7 +154824,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -154901,7 +154902,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -154941,7 +154942,7 @@ void m68008_device::subq_l_imm3_ais_ip8() // 5190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155029,7 +155030,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -155110,7 +155111,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155150,7 +155151,7 @@ void m68008_device::subq_l_imm3_aips_ip8() // 5198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155237,7 +155238,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -155320,7 +155321,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155360,7 +155361,7 @@ void m68008_device::subq_l_imm3_pais_ip8() // 51a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155484,7 +155485,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -155562,7 +155563,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155602,7 +155603,7 @@ void m68008_device::subq_l_imm3_das_ip8() // 51a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -155688,7 +155689,7 @@ void m68008_device::subq_l_imm3_dais_ip8() // 51b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -155779,7 +155780,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -155857,7 +155858,7 @@ adsl2:
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -155897,7 +155898,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156023,7 +156024,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -156101,7 +156102,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156141,7 +156142,7 @@ void m68008_device::subq_l_imm3_adr16_ip8() // 51b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156303,7 +156304,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -156381,7 +156382,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff
m_pc = m_au;
m_dt = ext32(m_ftu);
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=37:m_ftu d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ftu:m_ftu d=R.dbin:m_dbin
alu_sub(m_ftu, m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -156421,7 +156422,7 @@ void m68008_device::subq_l_imm3_adr32_ip8() // 51b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=R.alue:m_alue
alu_subc(high16(m_dt), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -156511,7 +156512,7 @@ void m68008_device::sf_ds_ip8() // 51c0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -156523,7 +156524,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156566,7 +156567,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -156606,7 +156607,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -156625,7 +156626,7 @@ void m68008_device::dbra_ds_rel16_ip8() // 51c8 fff8
// 06c dbcc1
m_t = 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -156637,13 +156638,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -156686,7 +156687,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -156694,7 +156695,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156733,11 +156734,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156783,13 +156784,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156835,7 +156836,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156884,11 +156885,11 @@ void m68008_device::sf_ais_ip8() // 51d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -156908,7 +156909,7 @@ void m68008_device::sf_ais_ip8() // 51d0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -156918,7 +156919,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -156957,7 +156958,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157000,7 +157001,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157034,12 +157035,12 @@ void m68008_device::sf_aips_ip8() // 51d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -157060,7 +157061,7 @@ void m68008_device::sf_aips_ip8() // 51d8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157070,7 +157071,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157109,7 +157110,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157152,7 +157153,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157185,7 +157186,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -157193,7 +157194,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -157214,7 +157215,7 @@ void m68008_device::sf_pais_ip8() // 51e0 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157224,7 +157225,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157263,7 +157264,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -157306,7 +157307,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157337,7 +157338,7 @@ void m68008_device::sf_das_ip8() // 51e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157375,11 +157376,11 @@ void m68008_device::sf_das_ip8() // 51e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -157399,7 +157400,7 @@ void m68008_device::sf_das_ip8() // 51e8 fff8
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157409,7 +157410,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157448,7 +157449,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157491,7 +157492,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157520,14 +157521,14 @@ void m68008_device::sf_dais_ip8() // 51f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -157535,7 +157536,7 @@ void m68008_device::sf_dais_ip8() // 51f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157574,7 +157575,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157615,11 +157616,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -157639,7 +157640,7 @@ adsw2:
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157649,7 +157650,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157688,7 +157689,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157731,7 +157732,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157764,7 +157765,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -157802,7 +157803,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -157823,7 +157824,7 @@ void m68008_device::sf_adr16_ip8() // 51f8 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -157833,7 +157834,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157872,7 +157873,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -157915,7 +157916,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -157946,7 +157947,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -157985,7 +157986,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -158023,7 +158024,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -158044,7 +158045,7 @@ void m68008_device::sf_adr32_ip8() // 51f9 ffff
m_ir = m_irc;
m_t = 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158054,7 +158055,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158093,7 +158094,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -158136,7 +158137,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -158169,7 +158170,7 @@ void m68008_device::shi_ds_ip8() // 52c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -158181,7 +158182,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158224,7 +158225,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -158264,7 +158265,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -158283,7 +158284,7 @@ void m68008_device::dbhi_ds_rel16_ip8() // 52c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -158295,13 +158296,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -158344,7 +158345,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -158352,7 +158353,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158391,11 +158392,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158441,13 +158442,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158493,7 +158494,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158542,11 +158543,11 @@ void m68008_device::shi_ais_ip8() // 52d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -158566,7 +158567,7 @@ void m68008_device::shi_ais_ip8() // 52d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158576,7 +158577,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158615,7 +158616,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158658,7 +158659,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -158692,12 +158693,12 @@ void m68008_device::shi_aips_ip8() // 52d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -158718,7 +158719,7 @@ void m68008_device::shi_aips_ip8() // 52d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158728,7 +158729,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158767,7 +158768,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158810,7 +158811,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -158843,7 +158844,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -158851,7 +158852,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -158872,7 +158873,7 @@ void m68008_device::shi_pais_ip8() // 52e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -158882,7 +158883,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -158921,7 +158922,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -158964,7 +158965,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -158995,7 +158996,7 @@ void m68008_device::shi_das_ip8() // 52e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159033,11 +159034,11 @@ void m68008_device::shi_das_ip8() // 52e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -159057,7 +159058,7 @@ void m68008_device::shi_das_ip8() // 52e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159067,7 +159068,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159106,7 +159107,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159149,7 +159150,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -159178,14 +159179,14 @@ void m68008_device::shi_dais_ip8() // 52f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -159193,7 +159194,7 @@ void m68008_device::shi_dais_ip8() // 52f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159232,7 +159233,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159273,11 +159274,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -159297,7 +159298,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159307,7 +159308,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159346,7 +159347,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159389,7 +159390,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -159422,7 +159423,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -159460,7 +159461,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -159481,7 +159482,7 @@ void m68008_device::shi_adr16_ip8() // 52f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159491,7 +159492,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159530,7 +159531,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -159573,7 +159574,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -159604,7 +159605,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159643,7 +159644,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -159681,7 +159682,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -159702,7 +159703,7 @@ void m68008_device::shi_adr32_ip8() // 52f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) == 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -159712,7 +159713,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159751,7 +159752,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -159794,7 +159795,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -159827,7 +159828,7 @@ void m68008_device::sls_ds_ip8() // 53c0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -159839,7 +159840,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -159882,7 +159883,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -159922,7 +159923,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -159941,7 +159942,7 @@ void m68008_device::dbls_ds_rel16_ip8() // 53c8 fff8
// 06c dbcc1
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -159953,13 +159954,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -160002,7 +160003,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -160010,7 +160011,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160049,11 +160050,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160099,13 +160100,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160151,7 +160152,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160200,11 +160201,11 @@ void m68008_device::sls_ais_ip8() // 53d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -160224,7 +160225,7 @@ void m68008_device::sls_ais_ip8() // 53d0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160234,7 +160235,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160273,7 +160274,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160316,7 +160317,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -160350,12 +160351,12 @@ void m68008_device::sls_aips_ip8() // 53d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160376,7 +160377,7 @@ void m68008_device::sls_aips_ip8() // 53d8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160386,7 +160387,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160425,7 +160426,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160468,7 +160469,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -160501,7 +160502,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -160509,7 +160510,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -160530,7 +160531,7 @@ void m68008_device::sls_pais_ip8() // 53e0 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160540,7 +160541,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160579,7 +160580,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -160622,7 +160623,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -160653,7 +160654,7 @@ void m68008_device::sls_das_ip8() // 53e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160691,11 +160692,11 @@ void m68008_device::sls_das_ip8() // 53e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -160715,7 +160716,7 @@ void m68008_device::sls_das_ip8() // 53e8 fff8
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160725,7 +160726,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160764,7 +160765,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -160807,7 +160808,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -160836,14 +160837,14 @@ void m68008_device::sls_dais_ip8() // 53f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -160851,7 +160852,7 @@ void m68008_device::sls_dais_ip8() // 53f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160890,7 +160891,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -160931,11 +160932,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -160955,7 +160956,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -160965,7 +160966,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161004,7 +161005,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -161047,7 +161048,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -161080,7 +161081,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -161118,7 +161119,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -161139,7 +161140,7 @@ void m68008_device::sls_adr16_ip8() // 53f8 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161149,7 +161150,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161188,7 +161189,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -161231,7 +161232,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -161262,7 +161263,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161301,7 +161302,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -161339,7 +161340,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -161360,7 +161361,7 @@ void m68008_device::sls_adr32_ip8() // 53f9 ffff
m_ir = m_irc;
m_t = (m_sr & (SR_C|SR_Z)) != 0;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161370,7 +161371,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161409,7 +161410,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -161452,7 +161453,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -161485,7 +161486,7 @@ void m68008_device::scc_ds_ip8() // 54c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -161497,7 +161498,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161540,7 +161541,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -161580,7 +161581,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -161599,7 +161600,7 @@ void m68008_device::dbcc_ds_rel16_ip8() // 54c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_C);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -161611,13 +161612,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -161660,7 +161661,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -161668,7 +161669,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161707,11 +161708,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161757,13 +161758,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161809,7 +161810,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161858,11 +161859,11 @@ void m68008_device::scc_ais_ip8() // 54d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -161882,7 +161883,7 @@ void m68008_device::scc_ais_ip8() // 54d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -161892,7 +161893,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -161931,7 +161932,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -161974,7 +161975,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162008,12 +162009,12 @@ void m68008_device::scc_aips_ip8() // 54d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162034,7 +162035,7 @@ void m68008_device::scc_aips_ip8() // 54d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162044,7 +162045,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162083,7 +162084,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -162126,7 +162127,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162159,7 +162160,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -162167,7 +162168,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -162188,7 +162189,7 @@ void m68008_device::scc_pais_ip8() // 54e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162198,7 +162199,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162237,7 +162238,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -162280,7 +162281,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162311,7 +162312,7 @@ void m68008_device::scc_das_ip8() // 54e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162349,11 +162350,11 @@ void m68008_device::scc_das_ip8() // 54e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -162373,7 +162374,7 @@ void m68008_device::scc_das_ip8() // 54e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162383,7 +162384,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162422,7 +162423,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162465,7 +162466,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162494,14 +162495,14 @@ void m68008_device::scc_dais_ip8() // 54f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -162509,7 +162510,7 @@ void m68008_device::scc_dais_ip8() // 54f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162548,7 +162549,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162589,11 +162590,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -162613,7 +162614,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162623,7 +162624,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162662,7 +162663,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162705,7 +162706,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162738,7 +162739,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -162776,7 +162777,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -162797,7 +162798,7 @@ void m68008_device::scc_adr16_ip8() // 54f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -162807,7 +162808,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162846,7 +162847,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -162889,7 +162890,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -162920,7 +162921,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -162959,7 +162960,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -162997,7 +162998,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -163018,7 +163019,7 @@ void m68008_device::scc_adr32_ip8() // 54f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_C);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163028,7 +163029,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163067,7 +163068,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -163110,7 +163111,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -163143,7 +163144,7 @@ void m68008_device::scs_ds_ip8() // 55c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -163155,7 +163156,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163198,7 +163199,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -163238,7 +163239,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -163257,7 +163258,7 @@ void m68008_device::dbcs_ds_rel16_ip8() // 55c8 fff8
// 06c dbcc1
m_t = m_sr & SR_C;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -163269,13 +163270,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -163318,7 +163319,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -163326,7 +163327,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163365,11 +163366,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163415,13 +163416,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163467,7 +163468,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163516,11 +163517,11 @@ void m68008_device::scs_ais_ip8() // 55d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -163540,7 +163541,7 @@ void m68008_device::scs_ais_ip8() // 55d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163550,7 +163551,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163589,7 +163590,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163632,7 +163633,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -163666,12 +163667,12 @@ void m68008_device::scs_aips_ip8() // 55d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -163692,7 +163693,7 @@ void m68008_device::scs_aips_ip8() // 55d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163702,7 +163703,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163741,7 +163742,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163784,7 +163785,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -163817,7 +163818,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -163825,7 +163826,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -163846,7 +163847,7 @@ void m68008_device::scs_pais_ip8() // 55e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -163856,7 +163857,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -163895,7 +163896,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -163938,7 +163939,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -163969,7 +163970,7 @@ void m68008_device::scs_das_ip8() // 55e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164007,11 +164008,11 @@ void m68008_device::scs_das_ip8() // 55e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -164031,7 +164032,7 @@ void m68008_device::scs_das_ip8() // 55e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164041,7 +164042,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164080,7 +164081,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164123,7 +164124,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -164152,14 +164153,14 @@ void m68008_device::scs_dais_ip8() // 55f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -164167,7 +164168,7 @@ void m68008_device::scs_dais_ip8() // 55f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164206,7 +164207,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164247,11 +164248,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -164271,7 +164272,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164281,7 +164282,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164320,7 +164321,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164363,7 +164364,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -164396,7 +164397,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -164434,7 +164435,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -164455,7 +164456,7 @@ void m68008_device::scs_adr16_ip8() // 55f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164465,7 +164466,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164504,7 +164505,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -164547,7 +164548,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -164578,7 +164579,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164617,7 +164618,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -164655,7 +164656,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -164676,7 +164677,7 @@ void m68008_device::scs_adr32_ip8() // 55f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_C;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -164686,7 +164687,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164725,7 +164726,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -164768,7 +164769,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -164801,7 +164802,7 @@ void m68008_device::sne_ds_ip8() // 56c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -164813,7 +164814,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -164856,7 +164857,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -164896,7 +164897,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -164915,7 +164916,7 @@ void m68008_device::dbne_ds_rel16_ip8() // 56c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_Z);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -164927,13 +164928,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -164976,7 +164977,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -164984,7 +164985,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165023,11 +165024,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165073,13 +165074,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165125,7 +165126,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165174,11 +165175,11 @@ void m68008_device::sne_ais_ip8() // 56d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -165198,7 +165199,7 @@ void m68008_device::sne_ais_ip8() // 56d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165208,7 +165209,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165247,7 +165248,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165290,7 +165291,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -165324,12 +165325,12 @@ void m68008_device::sne_aips_ip8() // 56d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165350,7 +165351,7 @@ void m68008_device::sne_aips_ip8() // 56d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165360,7 +165361,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165399,7 +165400,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165442,7 +165443,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -165475,7 +165476,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -165483,7 +165484,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -165504,7 +165505,7 @@ void m68008_device::sne_pais_ip8() // 56e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165514,7 +165515,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165553,7 +165554,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -165596,7 +165597,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -165627,7 +165628,7 @@ void m68008_device::sne_das_ip8() // 56e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165665,11 +165666,11 @@ void m68008_device::sne_das_ip8() // 56e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -165689,7 +165690,7 @@ void m68008_device::sne_das_ip8() // 56e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165699,7 +165700,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165738,7 +165739,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -165781,7 +165782,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -165810,14 +165811,14 @@ void m68008_device::sne_dais_ip8() // 56f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -165825,7 +165826,7 @@ void m68008_device::sne_dais_ip8() // 56f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165864,7 +165865,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165905,11 +165906,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -165929,7 +165930,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -165939,7 +165940,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -165978,7 +165979,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -166021,7 +166022,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -166054,7 +166055,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -166092,7 +166093,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -166113,7 +166114,7 @@ void m68008_device::sne_adr16_ip8() // 56f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166123,7 +166124,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166162,7 +166163,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -166205,7 +166206,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -166236,7 +166237,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166275,7 +166276,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -166313,7 +166314,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -166334,7 +166335,7 @@ void m68008_device::sne_adr32_ip8() // 56f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_Z);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166344,7 +166345,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166383,7 +166384,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -166426,7 +166427,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -166459,7 +166460,7 @@ void m68008_device::seq_ds_ip8() // 57c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -166471,7 +166472,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166514,7 +166515,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -166554,7 +166555,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -166573,7 +166574,7 @@ void m68008_device::dbeq_ds_rel16_ip8() // 57c8 fff8
// 06c dbcc1
m_t = m_sr & SR_Z;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -166585,13 +166586,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -166634,7 +166635,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -166642,7 +166643,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166681,11 +166682,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166731,13 +166732,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166783,7 +166784,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166832,11 +166833,11 @@ void m68008_device::seq_ais_ip8() // 57d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -166856,7 +166857,7 @@ void m68008_device::seq_ais_ip8() // 57d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -166866,7 +166867,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -166905,7 +166906,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -166948,7 +166949,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -166982,12 +166983,12 @@ void m68008_device::seq_aips_ip8() // 57d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167008,7 +167009,7 @@ void m68008_device::seq_aips_ip8() // 57d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167018,7 +167019,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167057,7 +167058,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -167100,7 +167101,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -167133,7 +167134,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -167141,7 +167142,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -167162,7 +167163,7 @@ void m68008_device::seq_pais_ip8() // 57e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167172,7 +167173,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167211,7 +167212,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -167254,7 +167255,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -167285,7 +167286,7 @@ void m68008_device::seq_das_ip8() // 57e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167323,11 +167324,11 @@ void m68008_device::seq_das_ip8() // 57e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -167347,7 +167348,7 @@ void m68008_device::seq_das_ip8() // 57e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167357,7 +167358,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167396,7 +167397,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167439,7 +167440,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -167468,14 +167469,14 @@ void m68008_device::seq_dais_ip8() // 57f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -167483,7 +167484,7 @@ void m68008_device::seq_dais_ip8() // 57f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167522,7 +167523,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167563,11 +167564,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -167587,7 +167588,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167597,7 +167598,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167636,7 +167637,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167679,7 +167680,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -167712,7 +167713,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -167750,7 +167751,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -167771,7 +167772,7 @@ void m68008_device::seq_adr16_ip8() // 57f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -167781,7 +167782,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167820,7 +167821,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -167863,7 +167864,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -167894,7 +167895,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -167933,7 +167934,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -167971,7 +167972,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -167992,7 +167993,7 @@ void m68008_device::seq_adr32_ip8() // 57f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_Z;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168002,7 +168003,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168041,7 +168042,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -168084,7 +168085,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -168117,7 +168118,7 @@ void m68008_device::svc_ds_ip8() // 58c0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -168129,7 +168130,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168172,7 +168173,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -168212,7 +168213,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -168231,7 +168232,7 @@ void m68008_device::dbvc_ds_rel16_ip8() // 58c8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -168243,13 +168244,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -168292,7 +168293,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -168300,7 +168301,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168339,11 +168340,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168389,13 +168390,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168441,7 +168442,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168490,11 +168491,11 @@ void m68008_device::svc_ais_ip8() // 58d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -168514,7 +168515,7 @@ void m68008_device::svc_ais_ip8() // 58d0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168524,7 +168525,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168563,7 +168564,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168606,7 +168607,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -168640,12 +168641,12 @@ void m68008_device::svc_aips_ip8() // 58d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168666,7 +168667,7 @@ void m68008_device::svc_aips_ip8() // 58d8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168676,7 +168677,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168715,7 +168716,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168758,7 +168759,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -168791,7 +168792,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -168799,7 +168800,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -168820,7 +168821,7 @@ void m68008_device::svc_pais_ip8() // 58e0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -168830,7 +168831,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168869,7 +168870,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -168912,7 +168913,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -168943,7 +168944,7 @@ void m68008_device::svc_das_ip8() // 58e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -168981,11 +168982,11 @@ void m68008_device::svc_das_ip8() // 58e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -169005,7 +169006,7 @@ void m68008_device::svc_das_ip8() // 58e8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169015,7 +169016,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169054,7 +169055,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169097,7 +169098,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -169126,14 +169127,14 @@ void m68008_device::svc_dais_ip8() // 58f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -169141,7 +169142,7 @@ void m68008_device::svc_dais_ip8() // 58f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169180,7 +169181,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169221,11 +169222,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -169245,7 +169246,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169255,7 +169256,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169294,7 +169295,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169337,7 +169338,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -169370,7 +169371,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -169408,7 +169409,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -169429,7 +169430,7 @@ void m68008_device::svc_adr16_ip8() // 58f8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169439,7 +169440,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169478,7 +169479,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -169521,7 +169522,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -169552,7 +169553,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169591,7 +169592,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -169629,7 +169630,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -169650,7 +169651,7 @@ void m68008_device::svc_adr32_ip8() // 58f9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -169660,7 +169661,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169699,7 +169700,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -169742,7 +169743,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -169775,7 +169776,7 @@ void m68008_device::svs_ds_ip8() // 59c0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -169787,7 +169788,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169830,7 +169831,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -169870,7 +169871,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -169889,7 +169890,7 @@ void m68008_device::dbvs_ds_rel16_ip8() // 59c8 fff8
// 06c dbcc1
m_t = m_sr & SR_V;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -169901,13 +169902,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -169950,7 +169951,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -169958,7 +169959,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -169997,11 +169998,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170047,13 +170048,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170099,7 +170100,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170148,11 +170149,11 @@ void m68008_device::svs_ais_ip8() // 59d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -170172,7 +170173,7 @@ void m68008_device::svs_ais_ip8() // 59d0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170182,7 +170183,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170221,7 +170222,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170264,7 +170265,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -170298,12 +170299,12 @@ void m68008_device::svs_aips_ip8() // 59d8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170324,7 +170325,7 @@ void m68008_device::svs_aips_ip8() // 59d8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170334,7 +170335,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170373,7 +170374,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170416,7 +170417,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -170449,7 +170450,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -170457,7 +170458,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -170478,7 +170479,7 @@ void m68008_device::svs_pais_ip8() // 59e0 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170488,7 +170489,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170527,7 +170528,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -170570,7 +170571,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -170601,7 +170602,7 @@ void m68008_device::svs_das_ip8() // 59e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170639,11 +170640,11 @@ void m68008_device::svs_das_ip8() // 59e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -170663,7 +170664,7 @@ void m68008_device::svs_das_ip8() // 59e8 fff8
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170673,7 +170674,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170712,7 +170713,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -170755,7 +170756,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -170784,14 +170785,14 @@ void m68008_device::svs_dais_ip8() // 59f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -170799,7 +170800,7 @@ void m68008_device::svs_dais_ip8() // 59f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170838,7 +170839,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170879,11 +170880,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -170903,7 +170904,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -170913,7 +170914,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -170952,7 +170953,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -170995,7 +170996,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -171028,7 +171029,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -171066,7 +171067,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -171087,7 +171088,7 @@ void m68008_device::svs_adr16_ip8() // 59f8 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171097,7 +171098,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171136,7 +171137,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -171179,7 +171180,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -171210,7 +171211,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171249,7 +171250,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -171287,7 +171288,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -171308,7 +171309,7 @@ void m68008_device::svs_adr32_ip8() // 59f9 ffff
m_ir = m_irc;
m_t = m_sr & SR_V;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171318,7 +171319,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171357,7 +171358,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -171400,7 +171401,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -171433,7 +171434,7 @@ void m68008_device::spl_ds_ip8() // 5ac0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -171445,7 +171446,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171488,7 +171489,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -171528,7 +171529,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -171547,7 +171548,7 @@ void m68008_device::dbpl_ds_rel16_ip8() // 5ac8 fff8
// 06c dbcc1
m_t = !(m_sr & SR_N);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -171559,13 +171560,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -171608,7 +171609,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -171616,7 +171617,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171655,11 +171656,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171705,13 +171706,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171757,7 +171758,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171806,11 +171807,11 @@ void m68008_device::spl_ais_ip8() // 5ad0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -171830,7 +171831,7 @@ void m68008_device::spl_ais_ip8() // 5ad0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171840,7 +171841,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -171879,7 +171880,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -171922,7 +171923,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -171956,12 +171957,12 @@ void m68008_device::spl_aips_ip8() // 5ad8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -171982,7 +171983,7 @@ void m68008_device::spl_aips_ip8() // 5ad8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -171992,7 +171993,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172031,7 +172032,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -172074,7 +172075,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -172107,7 +172108,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -172115,7 +172116,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -172136,7 +172137,7 @@ void m68008_device::spl_pais_ip8() // 5ae0 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172146,7 +172147,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172185,7 +172186,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -172228,7 +172229,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -172259,7 +172260,7 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172297,11 +172298,11 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -172321,7 +172322,7 @@ void m68008_device::spl_das_ip8() // 5ae8 fff8
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172331,7 +172332,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172370,7 +172371,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172413,7 +172414,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -172442,14 +172443,14 @@ void m68008_device::spl_dais_ip8() // 5af0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -172457,7 +172458,7 @@ void m68008_device::spl_dais_ip8() // 5af0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172496,7 +172497,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172537,11 +172538,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -172561,7 +172562,7 @@ adsw2:
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172571,7 +172572,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172610,7 +172611,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172653,7 +172654,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -172686,7 +172687,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -172724,7 +172725,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -172745,7 +172746,7 @@ void m68008_device::spl_adr16_ip8() // 5af8 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172755,7 +172756,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172794,7 +172795,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -172837,7 +172838,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -172868,7 +172869,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -172907,7 +172908,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -172945,7 +172946,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -172966,7 +172967,7 @@ void m68008_device::spl_adr32_ip8() // 5af9 ffff
m_ir = m_irc;
m_t = !(m_sr & SR_N);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -172976,7 +172977,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173015,7 +173016,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -173058,7 +173059,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -173091,7 +173092,7 @@ void m68008_device::smi_ds_ip8() // 5bc0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -173103,7 +173104,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173146,7 +173147,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -173186,7 +173187,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -173205,7 +173206,7 @@ void m68008_device::dbmi_ds_rel16_ip8() // 5bc8 fff8
// 06c dbcc1
m_t = m_sr & SR_N;
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -173217,13 +173218,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -173266,7 +173267,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -173274,7 +173275,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173313,11 +173314,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173363,13 +173364,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173415,7 +173416,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173464,11 +173465,11 @@ void m68008_device::smi_ais_ip8() // 5bd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -173488,7 +173489,7 @@ void m68008_device::smi_ais_ip8() // 5bd0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173498,7 +173499,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173537,7 +173538,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173580,7 +173581,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -173614,12 +173615,12 @@ void m68008_device::smi_aips_ip8() // 5bd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173640,7 +173641,7 @@ void m68008_device::smi_aips_ip8() // 5bd8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173650,7 +173651,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173689,7 +173690,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173732,7 +173733,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -173765,7 +173766,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -173773,7 +173774,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -173794,7 +173795,7 @@ void m68008_device::smi_pais_ip8() // 5be0 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173804,7 +173805,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173843,7 +173844,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -173886,7 +173887,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -173917,7 +173918,7 @@ void m68008_device::smi_das_ip8() // 5be8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -173955,11 +173956,11 @@ void m68008_device::smi_das_ip8() // 5be8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -173979,7 +173980,7 @@ void m68008_device::smi_das_ip8() // 5be8 fff8
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -173989,7 +173990,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174028,7 +174029,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174071,7 +174072,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -174100,14 +174101,14 @@ void m68008_device::smi_dais_ip8() // 5bf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -174115,7 +174116,7 @@ void m68008_device::smi_dais_ip8() // 5bf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174154,7 +174155,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174195,11 +174196,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -174219,7 +174220,7 @@ adsw2:
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174229,7 +174230,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174268,7 +174269,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174311,7 +174312,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -174344,7 +174345,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174382,7 +174383,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -174403,7 +174404,7 @@ void m68008_device::smi_adr16_ip8() // 5bf8 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174413,7 +174414,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174452,7 +174453,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -174495,7 +174496,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -174526,7 +174527,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174565,7 +174566,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -174603,7 +174604,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -174624,7 +174625,7 @@ void m68008_device::smi_adr32_ip8() // 5bf9 ffff
m_ir = m_irc;
m_t = m_sr & SR_N;
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -174634,7 +174635,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174673,7 +174674,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -174716,7 +174717,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -174749,7 +174750,7 @@ void m68008_device::sge_ds_ip8() // 5cc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -174761,7 +174762,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174804,7 +174805,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -174844,7 +174845,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -174863,7 +174864,7 @@ void m68008_device::dbge_ds_rel16_ip8() // 5cc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -174875,13 +174876,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -174924,7 +174925,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -174932,7 +174933,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -174971,11 +174972,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175021,13 +175022,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175073,7 +175074,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175122,11 +175123,11 @@ void m68008_device::sge_ais_ip8() // 5cd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -175146,7 +175147,7 @@ void m68008_device::sge_ais_ip8() // 5cd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175156,7 +175157,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175195,7 +175196,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175238,7 +175239,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -175272,12 +175273,12 @@ void m68008_device::sge_aips_ip8() // 5cd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175298,7 +175299,7 @@ void m68008_device::sge_aips_ip8() // 5cd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175308,7 +175309,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175347,7 +175348,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175390,7 +175391,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -175423,7 +175424,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -175431,7 +175432,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -175452,7 +175453,7 @@ void m68008_device::sge_pais_ip8() // 5ce0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175462,7 +175463,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175501,7 +175502,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -175544,7 +175545,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -175575,7 +175576,7 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175613,11 +175614,11 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -175637,7 +175638,7 @@ void m68008_device::sge_das_ip8() // 5ce8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175647,7 +175648,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175686,7 +175687,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -175729,7 +175730,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -175758,14 +175759,14 @@ void m68008_device::sge_dais_ip8() // 5cf0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -175773,7 +175774,7 @@ void m68008_device::sge_dais_ip8() // 5cf0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175812,7 +175813,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175853,11 +175854,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -175877,7 +175878,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -175887,7 +175888,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -175926,7 +175927,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -175969,7 +175970,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -176002,7 +176003,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176040,7 +176041,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -176061,7 +176062,7 @@ void m68008_device::sge_adr16_ip8() // 5cf8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176071,7 +176072,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176110,7 +176111,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -176153,7 +176154,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -176184,7 +176185,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176223,7 +176224,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -176261,7 +176262,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -176282,7 +176283,7 @@ void m68008_device::sge_adr32_ip8() // 5cf9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176292,7 +176293,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176331,7 +176332,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -176374,7 +176375,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -176407,7 +176408,7 @@ void m68008_device::slt_ds_ip8() // 5dc0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -176419,7 +176420,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176462,7 +176463,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -176502,7 +176503,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -176521,7 +176522,7 @@ void m68008_device::dblt_ds_rel16_ip8() // 5dc8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -176533,13 +176534,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -176582,7 +176583,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -176590,7 +176591,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176629,11 +176630,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176679,13 +176680,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176731,7 +176732,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176780,11 +176781,11 @@ void m68008_device::slt_ais_ip8() // 5dd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -176804,7 +176805,7 @@ void m68008_device::slt_ais_ip8() // 5dd0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176814,7 +176815,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -176853,7 +176854,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -176896,7 +176897,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -176930,12 +176931,12 @@ void m68008_device::slt_aips_ip8() // 5dd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -176956,7 +176957,7 @@ void m68008_device::slt_aips_ip8() // 5dd8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -176966,7 +176967,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177005,7 +177006,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -177048,7 +177049,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -177081,7 +177082,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -177089,7 +177090,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -177110,7 +177111,7 @@ void m68008_device::slt_pais_ip8() // 5de0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177120,7 +177121,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177159,7 +177160,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -177202,7 +177203,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -177233,7 +177234,7 @@ void m68008_device::slt_das_ip8() // 5de8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177271,11 +177272,11 @@ void m68008_device::slt_das_ip8() // 5de8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -177295,7 +177296,7 @@ void m68008_device::slt_das_ip8() // 5de8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177305,7 +177306,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177344,7 +177345,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177387,7 +177388,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -177416,14 +177417,14 @@ void m68008_device::slt_dais_ip8() // 5df0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -177431,7 +177432,7 @@ void m68008_device::slt_dais_ip8() // 5df0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177470,7 +177471,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177511,11 +177512,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -177535,7 +177536,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177545,7 +177546,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177584,7 +177585,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177627,7 +177628,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -177660,7 +177661,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -177698,7 +177699,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -177719,7 +177720,7 @@ void m68008_device::slt_adr16_ip8() // 5df8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177729,7 +177730,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177768,7 +177769,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -177811,7 +177812,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -177842,7 +177843,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177881,7 +177882,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -177919,7 +177920,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -177940,7 +177941,7 @@ void m68008_device::slt_adr32_ip8() // 5df9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -177950,7 +177951,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -177989,7 +177990,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -178032,7 +178033,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -178065,7 +178066,7 @@ void m68008_device::sgt_ds_ip8() // 5ec0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -178077,7 +178078,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178120,7 +178121,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -178160,7 +178161,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -178179,7 +178180,7 @@ void m68008_device::dbgt_ds_rel16_ip8() // 5ec8 fff8
// 06c dbcc1
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -178191,13 +178192,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -178240,7 +178241,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -178248,7 +178249,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178287,11 +178288,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178337,13 +178338,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178389,7 +178390,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178438,11 +178439,11 @@ void m68008_device::sgt_ais_ip8() // 5ed0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -178462,7 +178463,7 @@ void m68008_device::sgt_ais_ip8() // 5ed0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178472,7 +178473,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178511,7 +178512,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178554,7 +178555,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -178588,12 +178589,12 @@ void m68008_device::sgt_aips_ip8() // 5ed8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178614,7 +178615,7 @@ void m68008_device::sgt_aips_ip8() // 5ed8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178624,7 +178625,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178663,7 +178664,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178706,7 +178707,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -178739,7 +178740,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -178747,7 +178748,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -178768,7 +178769,7 @@ void m68008_device::sgt_pais_ip8() // 5ee0 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178778,7 +178779,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178817,7 +178818,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -178860,7 +178861,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -178891,7 +178892,7 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -178929,11 +178930,11 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -178953,7 +178954,7 @@ void m68008_device::sgt_das_ip8() // 5ee8 fff8
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -178963,7 +178964,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179002,7 +179003,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179045,7 +179046,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -179074,14 +179075,14 @@ void m68008_device::sgt_dais_ip8() // 5ef0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -179089,7 +179090,7 @@ void m68008_device::sgt_dais_ip8() // 5ef0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179128,7 +179129,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179169,11 +179170,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -179193,7 +179194,7 @@ adsw2:
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179203,7 +179204,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179242,7 +179243,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179285,7 +179286,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -179318,7 +179319,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179356,7 +179357,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -179377,7 +179378,7 @@ void m68008_device::sgt_adr16_ip8() // 5ef8 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179387,7 +179388,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179426,7 +179427,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -179469,7 +179470,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -179500,7 +179501,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179539,7 +179540,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -179577,7 +179578,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -179598,7 +179599,7 @@ void m68008_device::sgt_adr32_ip8() // 5ef9 ffff
m_ir = m_irc;
m_t = ((m_sr & (SR_N|SR_V|SR_Z)) == (SR_N|SR_V)) || ((m_sr & (SR_N|SR_V|SR_Z)) == 0);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -179608,7 +179609,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179647,7 +179648,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -179690,7 +179691,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -179723,7 +179724,7 @@ void m68008_device::sle_ds_ip8() // 5fc0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccr2;
@@ -179735,7 +179736,7 @@ roaw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179778,7 +179779,7 @@ roaw2:
sccr2:
// 0cb sccr2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -179818,7 +179819,7 @@ sccr2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -179837,7 +179838,7 @@ void m68008_device::dble_ds_rel16_ip8() // 5fc8 fff8
// 06c dbcc1
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_au = ext32(m_dbin) + m_pc;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_icount -= 2;
if(m_t)
goto dbcc6;
@@ -179849,13 +179850,13 @@ dbcc2:
m_alub = m_da[ry];
m_at = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=....... 1 a=4:m_da[ry] d=-1
+ // alu r=15 c=1 m=..... i=....... ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
// 175 dbcc3
m_t = m_isr & SR_Z;
m_pc = m_au;
m_au = m_at + 2;
- // alu r=15 c=3 m=..... i=....... 4 a=alub d=-1
+ // alu r=15 c=3 m=..... i=....... ALU.add a=alub d=-1
alu_add(m_alub, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -179898,7 +179899,7 @@ dbcc6:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
set_ftu_const();
m_icount -= 2;
if(m_sr & SR_T)
@@ -179906,7 +179907,7 @@ dbcc6:
// 0c5 bbci3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179945,11 +179946,11 @@ dbcc6:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 34c mmrw3
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -179995,13 +179996,13 @@ dbcc4:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
// 08b roaw2
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180047,7 +180048,7 @@ dbcc5:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180096,11 +180097,11 @@ void m68008_device::sle_ais_ip8() // 5fd0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -180120,7 +180121,7 @@ void m68008_device::sle_ais_ip8() // 5fd0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180130,7 +180131,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180169,7 +180170,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180212,7 +180213,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -180246,12 +180247,12 @@ void m68008_device::sle_aips_ip8() // 5fd8 fff8
m_dcr = m_dt;
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180272,7 +180273,7 @@ void m68008_device::sle_aips_ip8() // 5fd8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180282,7 +180283,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180321,7 +180322,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180364,7 +180365,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -180397,7 +180398,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8
m_pc = m_au;
m_dcr = m_dt;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -180405,7 +180406,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=15 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -180426,7 +180427,7 @@ void m68008_device::sle_pais_ip8() // 5fe0 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180436,7 +180437,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180475,7 +180476,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -180518,7 +180519,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -180549,7 +180550,7 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180587,11 +180588,11 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -180611,7 +180612,7 @@ void m68008_device::sle_das_ip8() // 5fe8 fff8
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180621,7 +180622,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180660,7 +180661,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -180703,7 +180704,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -180732,14 +180733,14 @@ void m68008_device::sle_dais_ip8() // 5ff0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=15 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=15 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=15 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -180747,7 +180748,7 @@ void m68008_device::sle_dais_ip8() // 5ff0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180786,7 +180787,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180827,11 +180828,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_dt;
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -180851,7 +180852,7 @@ adsw2:
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -180861,7 +180862,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -180900,7 +180901,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -180943,7 +180944,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -180976,7 +180977,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff
m_dcr = m_dt;
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -181014,7 +181015,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -181035,7 +181036,7 @@ void m68008_device::sle_adr16_ip8() // 5ff8 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -181045,7 +181046,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -181084,7 +181085,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -181127,7 +181128,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -181158,7 +181159,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -181197,7 +181198,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff
m_dcr = m_dt;
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=15 c=0 m=..... i=b...... 8 a=9:m_dt d=31:m_dbin
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=R.dtl:m_dt d=R.dbin:m_dbin
alu_or8(m_dt, m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -181235,7 +181236,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=15 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -181256,7 +181257,7 @@ void m68008_device::sle_adr32_ip8() // 5ff9 ffff
m_ir = m_irc;
m_t = (m_sr & SR_Z) || ((m_sr & (SR_N|SR_V)) == SR_N) || ((m_sr & (SR_N|SR_V)) == SR_V);
m_pc = m_au;
- // alu r=15 c=1 m=..... i=b...... 1 a=none d=0
+ // alu r=15 c=1 m=..... i=b...... ALU.and_ a=none d=0
alu_and8(0x0000, 0x0000);
if(m_t)
goto sccb2;
@@ -181266,7 +181267,7 @@ sccb3:
// 04f sccb3
m_pc = m_au;
m_au = m_at;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -181305,7 +181306,7 @@ sccb3:
sccb2:
// 0cf sccb2
m_au = m_at;
- // alu r=15 c=2 m=..... i=b...... 8 a=33:m_aluo d=-1
+ // alu r=15 c=2 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=-1
alu_or8(m_aluo, 0xff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -181348,7 +181349,7 @@ morw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=15 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=15 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -181638,7 +181639,7 @@ void m68008_device::bsr_rel16_ip8() // 6100 ffff
case 0:
// 0a9 bsrw1
m_at = m_au;
- // alu r=0 c=1 m=..... i=....... 1 a=10:m_au d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[m_sp] - 4;
m_icount -= 2;
@@ -181809,7 +181810,7 @@ void m68008_device::bsr_rel8_ip8() // 6100 ff00
// 089 bsri1
m_at = m_pc;
m_au = m_da[m_sp] - 4;
- // alu r=0 c=1 m=..... i=....... 1 a=12:m_pc d=-1
+ // alu r=0 c=1 m=..... i=....... ALU.and_ a=R.pcl:m_pc d=-1
alu_and(m_pc, 0xffff);
m_icount -= 2;
// 102 bsri2
@@ -185637,7 +185638,7 @@ void m68008_device::moveq_imm8o_dd_ip8() // 7000 f100
m_pc = m_au;
m_da[rx] = ext32(m_ftu);
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=37:m_ftu d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
sr_nzvc();
// 34c mmrw3
@@ -185696,7 +185697,7 @@ void m68008_device::or_b_ds_dd_ip8() // 8000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185704,7 +185705,7 @@ void m68008_device::or_b_ds_dd_ip8() // 8000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -185756,11 +185757,11 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -185780,7 +185781,7 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185788,7 +185789,7 @@ void m68008_device::or_b_ais_dd_ip8() // 8010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -185843,12 +185844,12 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185869,7 +185870,7 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185877,7 +185878,7 @@ void m68008_device::or_b_aips_dd_ip8() // 8018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -185931,7 +185932,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -185939,7 +185940,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -185960,7 +185961,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -185968,7 +185969,7 @@ void m68008_device::or_b_pais_dd_ip8() // 8020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186020,7 +186021,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186058,11 +186059,11 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -186082,7 +186083,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186090,7 +186091,7 @@ void m68008_device::or_b_das_dd_ip8() // 8028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186140,14 +186141,14 @@ void m68008_device::or_b_dais_dd_ip8() // 8030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -186155,7 +186156,7 @@ void m68008_device::or_b_dais_dd_ip8() // 8030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186194,7 +186195,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186235,11 +186236,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -186259,7 +186260,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186267,7 +186268,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186321,7 +186322,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -186359,7 +186360,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -186380,7 +186381,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186388,7 +186389,7 @@ void m68008_device::or_b_adr16_dd_ip8() // 8038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186440,7 +186441,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186479,7 +186480,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -186517,7 +186518,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -186538,7 +186539,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186546,7 +186547,7 @@ void m68008_device::or_b_adr32_dd_ip8() // 8039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186597,7 +186598,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186635,11 +186636,11 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -186659,7 +186660,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186667,7 +186668,7 @@ void m68008_device::or_b_dpc_dd_ip8() // 803a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186716,14 +186717,14 @@ void m68008_device::or_b_dpci_dd_ip8() // 803b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -186731,7 +186732,7 @@ void m68008_device::or_b_dpci_dd_ip8() // 803b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186770,7 +186771,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186811,11 +186812,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -186835,7 +186836,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186843,7 +186844,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186897,7 +186898,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186936,7 +186937,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -186944,7 +186945,7 @@ void m68008_device::or_b_imm8_dd_ip8() // 803c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -186998,7 +186999,7 @@ void m68008_device::or_w_ds_dd_ip8() // 8040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187006,7 +187007,7 @@ void m68008_device::or_w_ds_dd_ip8() // 8040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187058,11 +187059,11 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -187100,7 +187101,7 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187108,7 +187109,7 @@ void m68008_device::or_w_ais_dd_ip8() // 8050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187163,12 +187164,12 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -187207,7 +187208,7 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187215,7 +187216,7 @@ void m68008_device::or_w_aips_dd_ip8() // 8058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187269,7 +187270,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -187277,7 +187278,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -187316,7 +187317,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187324,7 +187325,7 @@ void m68008_device::or_w_pais_dd_ip8() // 8060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187376,7 +187377,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187414,11 +187415,11 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -187456,7 +187457,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187464,7 +187465,7 @@ void m68008_device::or_w_das_dd_ip8() // 8068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187514,14 +187515,14 @@ void m68008_device::or_w_dais_dd_ip8() // 8070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -187529,7 +187530,7 @@ void m68008_device::or_w_dais_dd_ip8() // 8070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187568,7 +187569,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187609,11 +187610,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -187651,7 +187652,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187659,7 +187660,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187713,7 +187714,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -187751,7 +187752,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -187790,7 +187791,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187798,7 +187799,7 @@ void m68008_device::or_w_adr16_dd_ip8() // 8078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187850,7 +187851,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -187889,7 +187890,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -187927,7 +187928,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -187966,7 +187967,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -187974,7 +187975,7 @@ void m68008_device::or_w_adr32_dd_ip8() // 8079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188025,7 +188026,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188063,11 +188064,11 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188105,7 +188106,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188113,7 +188114,7 @@ void m68008_device::or_w_dpc_dd_ip8() // 807a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188162,14 +188163,14 @@ void m68008_device::or_w_dpci_dd_ip8() // 807b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -188177,7 +188178,7 @@ void m68008_device::or_w_dpci_dd_ip8() // 807b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188216,7 +188217,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188257,11 +188258,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188299,7 +188300,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188307,7 +188308,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188361,7 +188362,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188400,7 +188401,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -188408,7 +188409,7 @@ void m68008_device::or_w_imm16_dd_ip8() // 807c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188462,12 +188463,12 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_or(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -188502,7 +188503,7 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=18:m_da[ry] d=16:m_da[rx]
alu_or(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -188511,7 +188512,7 @@ void m68008_device::or_l_ds_dd_ip8() // 8080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188531,7 +188532,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188571,7 +188572,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188609,12 +188610,12 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188655,7 +188656,7 @@ void m68008_device::or_l_ais_dd_ip8() // 8090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188675,7 +188676,7 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -188715,11 +188716,11 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188757,12 +188758,12 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188803,7 +188804,7 @@ void m68008_device::or_l_aips_dd_ip8() // 8098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188822,14 +188823,14 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188868,7 +188869,7 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -188906,12 +188907,12 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -188952,7 +188953,7 @@ void m68008_device::or_l_pais_dd_ip8() // 80a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -188972,7 +188973,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189009,7 +189010,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189049,7 +189050,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189087,12 +189088,12 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189133,7 +189134,7 @@ void m68008_device::or_l_das_dd_ip8() // 80a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189151,14 +189152,14 @@ void m68008_device::or_l_dais_dd_ip8() // 80b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -189166,7 +189167,7 @@ void m68008_device::or_l_dais_dd_ip8() // 80b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189205,7 +189206,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189245,7 +189246,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189285,7 +189286,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189323,12 +189324,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189369,7 +189370,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189391,7 +189392,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -189429,7 +189430,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -189469,7 +189470,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189507,12 +189508,12 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189553,7 +189554,7 @@ void m68008_device::or_l_adr16_dd_ip8() // 80b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189573,7 +189574,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189612,7 +189613,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -189650,7 +189651,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -189690,7 +189691,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -189728,12 +189729,12 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189774,7 +189775,7 @@ void m68008_device::or_l_adr32_dd_ip8() // 80b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189793,7 +189794,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189830,7 +189831,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -189870,7 +189871,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -189908,12 +189909,12 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -189954,7 +189955,7 @@ void m68008_device::or_l_dpc_dd_ip8() // 80ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -189971,14 +189972,14 @@ void m68008_device::or_l_dpci_dd_ip8() // 80bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -189986,7 +189987,7 @@ void m68008_device::or_l_dpci_dd_ip8() // 80bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190025,7 +190026,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190065,7 +190066,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -190105,7 +190106,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190143,12 +190144,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=31:m_dbin d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_or(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=alub d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=alub d=16:m_da[rx]
alu_or(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190189,7 +190190,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -190209,7 +190210,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190248,7 +190249,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190287,12 +190288,12 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=9:m_dt d=2:m_da[rx]
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_or(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=33:m_aluo
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -190327,7 +190328,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=23:m_dt d=16:m_da[rx]
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=23:m_dt d=16:m_da[rx]
alu_or(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -190336,7 +190337,7 @@ void m68008_device::or_l_imm32_dd_ip8() // 80bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -190358,13 +190359,13 @@ void m68008_device::divu_w_ds_dd_ip8() // 80c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -190377,7 +190378,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190395,7 +190396,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -190403,7 +190404,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -190443,7 +190444,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -190481,7 +190482,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -190678,7 +190679,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190724,7 +190725,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -190735,7 +190736,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -190747,7 +190748,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -190767,7 +190768,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -190778,7 +190779,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -190788,13 +190789,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190805,7 +190806,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -190815,7 +190816,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -190823,7 +190824,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -190877,7 +190878,7 @@ void m68008_device::divu_w_ais_dd_ip8() // 80d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -190918,13 +190919,13 @@ void m68008_device::divu_w_ais_dd_ip8() // 80d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -190937,7 +190938,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -190955,7 +190956,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -190963,7 +190964,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -191003,7 +191004,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -191041,7 +191042,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -191238,7 +191239,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191284,7 +191285,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191295,7 +191296,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191307,7 +191308,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191327,7 +191328,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -191338,7 +191339,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191348,13 +191349,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191365,7 +191366,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -191375,7 +191376,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -191383,7 +191384,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191443,7 +191444,7 @@ void m68008_device::divu_w_aips_dd_ip8() // 80d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -191482,13 +191483,13 @@ void m68008_device::divu_w_aips_dd_ip8() // 80d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -191501,7 +191502,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191519,7 +191520,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -191527,7 +191528,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -191567,7 +191568,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -191605,7 +191606,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -191802,7 +191803,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -191848,7 +191849,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191859,7 +191860,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191871,7 +191872,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -191891,7 +191892,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -191902,7 +191903,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -191912,13 +191913,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -191929,7 +191930,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -191939,7 +191940,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -191947,7 +191948,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192009,7 +192010,7 @@ void m68008_device::divu_w_pais_dd_ip8() // 80e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -192048,13 +192049,13 @@ void m68008_device::divu_w_pais_dd_ip8() // 80e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -192067,7 +192068,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192085,7 +192086,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -192093,7 +192094,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -192133,7 +192134,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -192171,7 +192172,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -192368,7 +192369,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192414,7 +192415,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -192425,7 +192426,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -192437,7 +192438,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -192457,7 +192458,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -192468,7 +192469,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -192478,13 +192479,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192495,7 +192496,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -192505,7 +192506,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -192513,7 +192514,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -192604,7 +192605,7 @@ void m68008_device::divu_w_das_dd_ip8() // 80e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -192645,13 +192646,13 @@ void m68008_device::divu_w_das_dd_ip8() // 80e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -192664,7 +192665,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -192682,7 +192683,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -192690,7 +192691,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -192730,7 +192731,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -192768,7 +192769,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -192965,7 +192966,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193011,7 +193012,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193022,7 +193023,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193034,7 +193035,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193054,7 +193055,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -193065,7 +193066,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193075,13 +193076,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193092,7 +193093,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -193102,7 +193103,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -193110,7 +193111,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193162,7 +193163,7 @@ void m68008_device::divu_w_dais_dd_ip8() // 80f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -193254,7 +193255,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -193295,13 +193296,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -193314,7 +193315,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193332,7 +193333,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -193340,7 +193341,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -193380,7 +193381,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -193418,7 +193419,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -193615,7 +193616,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193661,7 +193662,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193672,7 +193673,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193684,7 +193685,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -193704,7 +193705,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -193715,7 +193716,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -193725,13 +193726,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193742,7 +193743,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -193752,7 +193753,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -193760,7 +193761,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -193852,7 +193853,7 @@ void m68008_device::divu_w_adr16_dd_ip8() // 80f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -193891,13 +193892,13 @@ void m68008_device::divu_w_adr16_dd_ip8() // 80f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -193910,7 +193911,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -193928,7 +193929,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -193936,7 +193937,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -193976,7 +193977,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -194014,7 +194015,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -194211,7 +194212,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194257,7 +194258,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194268,7 +194269,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194280,7 +194281,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194300,7 +194301,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -194311,7 +194312,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194321,13 +194322,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194338,7 +194339,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -194348,7 +194349,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -194356,7 +194357,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194484,7 +194485,7 @@ void m68008_device::divu_w_adr32_dd_ip8() // 80f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -194523,13 +194524,13 @@ void m68008_device::divu_w_adr32_dd_ip8() // 80f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -194542,7 +194543,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194560,7 +194561,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -194568,7 +194569,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -194608,7 +194609,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -194646,7 +194647,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
@@ -194843,7 +194844,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -194889,7 +194890,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194900,7 +194901,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194912,7 +194913,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -194932,7 +194933,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -194943,7 +194944,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -194953,13 +194954,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -194970,7 +194971,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -194980,7 +194981,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -194988,7 +194989,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195078,7 +195079,7 @@ void m68008_device::divu_w_dpc_dd_ip8() // 80fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195119,13 +195120,13 @@ void m68008_device::divu_w_dpc_dd_ip8() // 80fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -195138,7 +195139,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195156,7 +195157,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195164,7 +195165,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -195204,7 +195205,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -195242,7 +195243,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -195439,7 +195440,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195485,7 +195486,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -195496,7 +195497,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -195508,7 +195509,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -195528,7 +195529,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -195539,7 +195540,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -195549,13 +195550,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195566,7 +195567,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -195576,7 +195577,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -195584,7 +195585,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -195635,7 +195636,7 @@ void m68008_device::divu_w_dpci_dd_ip8() // 80fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -195727,7 +195728,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -195768,13 +195769,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -195787,7 +195788,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -195805,7 +195806,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -195813,7 +195814,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -195853,7 +195854,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -195891,7 +195892,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -196088,7 +196089,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196134,7 +196135,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196145,7 +196146,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196157,7 +196158,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196177,7 +196178,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -196188,7 +196189,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196198,13 +196199,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196215,7 +196216,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -196225,7 +196226,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -196233,7 +196234,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196327,13 +196328,13 @@ void m68008_device::divu_w_imm16_dd_ip8() // 80fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 213 dvum2
m_t = m_isr & SR_Z;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=16:m_da[rx]
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=16:m_da[rx]
alu_sub(m_alub, high16(m_da[rx]));
sr_nzvc();
m_icount -= 2;
@@ -196346,7 +196347,7 @@ dvum3:
m_t = m_isr & SR_C;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196364,7 +196365,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -196372,7 +196373,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -196412,7 +196413,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -196450,7 +196451,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -196647,7 +196648,7 @@ dvum4:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196693,7 +196694,7 @@ dvum5:
// 291 dvum5
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196704,7 +196705,7 @@ dvum8:
// 252 dvum8
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196716,7 +196717,7 @@ dvum7:
// 2d2 dvum7
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -196736,7 +196737,7 @@ dvumc:
// 369 dvumc
m_t = m_isr & SR_C;
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
if(m_t)
@@ -196747,7 +196748,7 @@ dvum6:
// 2d0 dvum6
m_t = m_isr & SR_N;
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
if(m_t)
@@ -196757,13 +196758,13 @@ dvum6:
dvum9:
// 250 dvum9
set_16h(m_da[rx], m_aluo);
- // alu r=1 c=1 m=..... i=.l.d... 1 a=33:m_aluo d=0
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aluo:m_aluo d=0
alu_and(m_aluo, 0x0000);
m_icount -= 2;
goto dvumd;
dvume:
// 290 dvume
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -196774,7 +196775,7 @@ dvumd:
m_ir = m_irc;
m_alub = m_aluo;
m_au = m_pc + 2;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
goto dvum0;
dvumf:
@@ -196784,7 +196785,7 @@ dvumf:
m_alub = m_aluo;
set_16h(m_da[rx], m_at);
m_au = m_pc + 2;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
goto dvum0;
dvum0:
@@ -196792,7 +196793,7 @@ dvum0:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_alue);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=29:m_alue
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.alue:m_alue
alu_sub(m_alub, m_alue);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -196848,12 +196849,12 @@ void m68008_device::sbcd_ds_dd_ip8() // 8100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sbcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -196917,7 +196918,7 @@ void m68008_device::sbcd_pais_paid_ip8() // 8108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=9 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -196957,12 +196958,12 @@ void m68008_device::sbcd_pais_paid_ip8() // 8108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=9 c=2 m=xnzvc i=b....i. 6 a=alub d=31:m_dbin
+ // alu r=9 c=2 m=xnzvc i=b....i. ALU.sbcd a=alub d=R.dbin:m_dbin
alu_sbcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=9 c=3 m=xnzvc i=b.....f 6 a=33:m_aluo d=?
+ // alu r=9 c=3 m=xnzvc i=b.....f ALU.sbcd a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -197033,11 +197034,11 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -197057,7 +197058,7 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197099,7 +197100,7 @@ void m68008_device::or_b_dd_ais_ip8() // 8110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197134,12 +197135,12 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -197160,7 +197161,7 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197202,7 +197203,7 @@ void m68008_device::or_b_dd_aips_ip8() // 8118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197236,7 +197237,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -197244,7 +197245,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -197265,7 +197266,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197307,7 +197308,7 @@ void m68008_device::or_b_dd_pais_ip8() // 8120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197339,7 +197340,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -197377,11 +197378,11 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -197401,7 +197402,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197443,7 +197444,7 @@ void m68008_device::or_b_dd_das_ip8() // 8128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197473,14 +197474,14 @@ void m68008_device::or_b_dd_dais_ip8() // 8130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=b...... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -197488,7 +197489,7 @@ void m68008_device::or_b_dd_dais_ip8() // 8130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -197527,7 +197528,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -197568,11 +197569,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -197592,7 +197593,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197634,7 +197635,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197668,7 +197669,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -197706,7 +197707,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -197727,7 +197728,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197769,7 +197770,7 @@ void m68008_device::or_b_dd_adr16_ip8() // 8138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197801,7 +197802,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -197840,7 +197841,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=b...... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -197878,7 +197879,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -197899,7 +197900,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=b....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=b....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -197941,7 +197942,7 @@ void m68008_device::or_b_dd_adr32_ip8() // 8139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=b...... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=b...... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -197973,11 +197974,11 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -198015,7 +198016,7 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198057,7 +198058,7 @@ void m68008_device::or_w_dd_ais_ip8() // 8150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198110,12 +198111,12 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -198154,7 +198155,7 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198196,7 +198197,7 @@ void m68008_device::or_w_dd_aips_ip8() // 8158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198248,7 +198249,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -198256,7 +198257,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=14 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -198295,7 +198296,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198337,7 +198338,7 @@ void m68008_device::or_w_dd_pais_ip8() // 8160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198387,7 +198388,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=....... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -198425,11 +198426,11 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -198467,7 +198468,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198509,7 +198510,7 @@ void m68008_device::or_w_dd_das_ip8() // 8168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198557,14 +198558,14 @@ void m68008_device::or_w_dd_dais_ip8() // 8170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=14 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=....... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -198572,7 +198573,7 @@ void m68008_device::or_w_dd_dais_ip8() // 8170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -198611,7 +198612,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -198652,11 +198653,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -198694,7 +198695,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198736,7 +198737,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198788,7 +198789,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -198826,7 +198827,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -198865,7 +198866,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -198907,7 +198908,7 @@ void m68008_device::or_w_dd_adr16_ip8() // 8178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -198957,7 +198958,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -198996,7 +198997,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=....... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -199034,7 +199035,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=14 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -199073,7 +199074,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.....i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.....i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199115,7 +199116,7 @@ void m68008_device::or_w_dd_adr32_ip8() // 8179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=....... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=....... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -199165,7 +199166,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199205,7 +199206,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199243,7 +199244,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199283,7 +199284,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199323,7 +199324,7 @@ void m68008_device::or_l_dd_ais_ip8() // 8190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -199373,7 +199374,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -199413,11 +199414,11 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199455,7 +199456,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199495,7 +199496,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199535,7 +199536,7 @@ void m68008_device::or_l_dd_aips_ip8() // 8198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -199584,14 +199585,14 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199630,7 +199631,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199668,7 +199669,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199708,7 +199709,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199748,7 +199749,7 @@ void m68008_device::or_l_dd_pais_ip8() // 81a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -199798,7 +199799,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -199835,7 +199836,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -199875,7 +199876,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -199913,7 +199914,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -199953,7 +199954,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -199993,7 +199994,7 @@ void m68008_device::or_l_dd_das_ip8() // 81a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -200041,14 +200042,14 @@ void m68008_device::or_l_dd_dais_ip8() // 81b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=14 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=14 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=14 c=0 m=..... i=.l..... 8 a=33:m_aluo d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -200056,7 +200057,7 @@ void m68008_device::or_l_dd_dais_ip8() // 81b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -200095,7 +200096,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -200135,7 +200136,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200175,7 +200176,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200213,7 +200214,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200253,7 +200254,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200293,7 +200294,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -200345,7 +200346,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -200383,7 +200384,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -200423,7 +200424,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200461,7 +200462,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200501,7 +200502,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200541,7 +200542,7 @@ void m68008_device::or_l_dd_adr16_ip8() // 81b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -200591,7 +200592,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=31:m_dbin d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -200630,7 +200631,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=14 c=0 m=..... i=.l..... 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -200668,7 +200669,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=14 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=14 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -200708,7 +200709,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=31:m_dbin
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -200746,7 +200747,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=14 c=2 m=.nzvc i=.l...i. 8 a=2:m_da[rx] d=31:m_dbin
+ // alu r=14 c=2 m=.nzvc i=.l...i. ALU.or_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_or(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -200786,7 +200787,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=14 c=3 m=.nzvc i=.l....f 8 a=16:m_da[rx] d=29:m_alue
+ // alu r=14 c=3 m=.nzvc i=.l....f ALU.or_ a=16:m_da[rx] d=R.alue:m_alue
alu_or(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -200826,7 +200827,7 @@ void m68008_device::or_l_dd_adr32_ip8() // 81b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=14 c=0 m=..... i=.l..... 8 a=none d=none
+ // alu r=14 c=0 m=..... i=.l..... ALU.or_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -200878,13 +200879,13 @@ void m68008_device::divs_w_ds_dd_ip8() // 81c0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_da[ry]);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=4:m_da[ry] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -200898,7 +200899,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -200908,7 +200909,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -200923,7 +200924,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -200931,7 +200932,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
@@ -200971,7 +200972,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -201009,7 +201010,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -201201,7 +201202,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -201210,7 +201211,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -201218,12 +201219,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201231,7 +201232,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201248,7 +201249,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -201256,7 +201257,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201302,7 +201303,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201329,13 +201330,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201343,27 +201344,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201375,7 +201376,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201387,7 +201388,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201402,7 +201403,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -201411,7 +201412,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201419,7 +201420,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -201429,7 +201430,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201438,7 +201439,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -201450,7 +201451,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -201514,7 +201515,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -201530,7 +201531,7 @@ void m68008_device::divs_w_ais_dd_ip8() // 81d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -201571,13 +201572,13 @@ void m68008_device::divs_w_ais_dd_ip8() // 81d0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -201591,7 +201592,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201601,7 +201602,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201616,7 +201617,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -201624,7 +201625,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -201664,7 +201665,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -201702,7 +201703,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -201894,7 +201895,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -201903,7 +201904,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -201911,12 +201912,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -201924,7 +201925,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -201941,7 +201942,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -201949,7 +201950,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -201995,7 +201996,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202022,13 +202023,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202036,27 +202037,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202068,7 +202069,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202080,7 +202081,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202095,7 +202096,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202104,7 +202105,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202112,7 +202113,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202122,7 +202123,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202131,7 +202132,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202143,7 +202144,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202207,7 +202208,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -202229,7 +202230,7 @@ void m68008_device::divs_w_aips_dd_ip8() // 81d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202268,13 +202269,13 @@ void m68008_device::divs_w_aips_dd_ip8() // 81d8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202288,7 +202289,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202298,7 +202299,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202313,7 +202314,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -202321,7 +202322,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -202361,7 +202362,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -202399,7 +202400,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -202591,7 +202592,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -202600,7 +202601,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -202608,12 +202609,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202621,7 +202622,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202638,7 +202639,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -202646,7 +202647,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -202692,7 +202693,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -202719,13 +202720,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202733,27 +202734,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202765,7 +202766,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202777,7 +202778,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202792,7 +202793,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202801,7 +202802,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202809,7 +202810,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202819,7 +202820,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202828,7 +202829,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -202840,7 +202841,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -202904,7 +202905,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -202928,7 +202929,7 @@ void m68008_device::divs_w_pais_dd_ip8() // 81e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -202967,13 +202968,13 @@ void m68008_device::divs_w_pais_dd_ip8() // 81e0 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -202987,7 +202988,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -202997,7 +202998,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203012,7 +203013,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -203020,7 +203021,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -203060,7 +203061,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -203098,7 +203099,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -203290,7 +203291,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -203299,7 +203300,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -203307,12 +203308,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -203320,7 +203321,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203337,7 +203338,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -203345,7 +203346,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -203391,7 +203392,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -203418,13 +203419,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203432,27 +203433,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203464,7 +203465,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203476,7 +203477,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203491,7 +203492,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -203500,7 +203501,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203508,7 +203509,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -203518,7 +203519,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203527,7 +203528,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -203539,7 +203540,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -203603,7 +203604,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -203656,7 +203657,7 @@ void m68008_device::divs_w_das_dd_ip8() // 81e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -203697,13 +203698,13 @@ void m68008_device::divs_w_das_dd_ip8() // 81e8 f1f8
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -203717,7 +203718,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203727,7 +203728,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -203742,7 +203743,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -203750,7 +203751,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -203790,7 +203791,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -203828,7 +203829,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -204020,7 +204021,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -204029,7 +204030,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -204037,12 +204038,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204050,7 +204051,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204067,7 +204068,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -204075,7 +204076,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204121,7 +204122,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204148,13 +204149,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204162,27 +204163,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204194,7 +204195,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204206,7 +204207,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204221,7 +204222,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -204230,7 +204231,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204238,7 +204239,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -204248,7 +204249,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204257,7 +204258,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -204269,7 +204270,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -204333,7 +204334,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -204347,7 +204348,7 @@ void m68008_device::divs_w_dais_dd_ip8() // 81f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -204439,7 +204440,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -204480,13 +204481,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -204500,7 +204501,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204510,7 +204511,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204525,7 +204526,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -204533,7 +204534,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -204573,7 +204574,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -204611,7 +204612,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -204803,7 +204804,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -204812,7 +204813,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -204820,12 +204821,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204833,7 +204834,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204850,7 +204851,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -204858,7 +204859,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -204904,7 +204905,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -204931,13 +204932,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204945,27 +204946,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204977,7 +204978,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -204989,7 +204990,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205004,7 +205005,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205013,7 +205014,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205021,7 +205022,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205031,7 +205032,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205040,7 +205041,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205052,7 +205053,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205116,7 +205117,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -205170,7 +205171,7 @@ void m68008_device::divs_w_adr16_dd_ip8() // 81f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -205209,13 +205210,13 @@ void m68008_device::divs_w_adr16_dd_ip8() // 81f8 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205229,7 +205230,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205239,7 +205240,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205254,7 +205255,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -205262,7 +205263,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -205302,7 +205303,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -205340,7 +205341,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -205532,7 +205533,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -205541,7 +205542,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -205549,12 +205550,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -205562,7 +205563,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205579,7 +205580,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -205587,7 +205588,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -205633,7 +205634,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -205660,13 +205661,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205674,27 +205675,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205706,7 +205707,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205718,7 +205719,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -205733,7 +205734,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205742,7 +205743,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205750,7 +205751,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205760,7 +205761,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205769,7 +205770,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -205781,7 +205782,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -205845,7 +205846,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -205935,7 +205936,7 @@ void m68008_device::divs_w_adr32_dd_ip8() // 81f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -205974,13 +205975,13 @@ void m68008_device::divs_w_adr32_dd_ip8() // 81f9 f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -205994,7 +205995,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206004,7 +206005,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206019,7 +206020,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -206027,7 +206028,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -206067,7 +206068,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -206105,7 +206106,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 29:
@@ -206297,7 +206298,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -206306,7 +206307,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -206314,12 +206315,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -206327,7 +206328,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206344,7 +206345,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -206352,7 +206353,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -206398,7 +206399,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -206425,13 +206426,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206439,27 +206440,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206471,7 +206472,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206483,7 +206484,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206498,7 +206499,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -206507,7 +206508,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206515,7 +206516,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -206525,7 +206526,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206534,7 +206535,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -206546,7 +206547,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -206610,7 +206611,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -206662,7 +206663,7 @@ void m68008_device::divs_w_dpc_dd_ip8() // 81fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -206703,13 +206704,13 @@ void m68008_device::divs_w_dpc_dd_ip8() // 81fa f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -206723,7 +206724,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206733,7 +206734,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -206748,7 +206749,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -206756,7 +206757,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -206796,7 +206797,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -206834,7 +206835,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -207026,7 +207027,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -207035,7 +207036,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -207043,12 +207044,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207056,7 +207057,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207073,7 +207074,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -207081,7 +207082,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207127,7 +207128,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207154,13 +207155,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207168,27 +207169,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207200,7 +207201,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207212,7 +207213,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207227,7 +207228,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -207236,7 +207237,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207244,7 +207245,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -207254,7 +207255,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207263,7 +207264,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -207275,7 +207276,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -207339,7 +207340,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -207352,7 +207353,7 @@ void m68008_device::divs_w_dpci_dd_ip8() // 81fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=1 c=5 m=..... i=.l.d... 24 a=31:m_dbin d=0
+ // alu r=1 c=5 m=..... i=.l.d... ALU.over a=R.dbin:m_dbin d=0
alu_over(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -207444,7 +207445,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -207485,13 +207486,13 @@ adsw2:
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dbin);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=31:m_dbin d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -207505,7 +207506,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207515,7 +207516,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207530,7 +207531,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -207538,7 +207539,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -207578,7 +207579,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -207616,7 +207617,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
@@ -207808,7 +207809,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -207817,7 +207818,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -207825,12 +207826,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207838,7 +207839,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207855,7 +207856,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -207863,7 +207864,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -207909,7 +207910,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -207936,13 +207937,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207950,27 +207951,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207982,7 +207983,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -207994,7 +207995,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208009,7 +208010,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208018,7 +208019,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208026,7 +208027,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208036,7 +208037,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208045,7 +208046,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208057,7 +208058,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208121,7 +208122,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -208177,13 +208178,13 @@ void m68008_device::divs_w_imm16_dd_ip8() // 81fc f1ff
m_alue = m_da[rx];
m_pc = m_au;
set_16h(m_at, m_dt);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=9:m_dt d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.dtl:m_dt d=-1
alu_and(m_dt, 0xffff);
sr_nzvc();
m_icount -= 2;
// 0c9 dvs03
m_t = (m_isr & SR_Z) ? 2 : (m_isr & SR_N) ? 1 : 0;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208197,7 +208198,7 @@ dvs04:
// 0a3 dvs04
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208207,7 +208208,7 @@ dvs05:
m_alub = m_aluo;
set_16l(m_at, high16(m_da[rx]));
m_au = merge_16_32(0, m_ftu) + 1;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208222,7 +208223,7 @@ dvur2:
update_user_super();
update_interrupt();
m_pc = m_au;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=10:m_au d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.aul:m_au d=-1
alu_and(m_au, 0xffff);
m_au = m_da[16] - 2;
m_icount -= 2;
@@ -208230,7 +208231,7 @@ dvur2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=37:m_ftu d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.ftu:m_ftu d=-1
alu_and(m_ftu, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
@@ -208270,7 +208271,7 @@ dvur2:
m_da[16] = m_au;
m_ftu = 0x0014;
m_au = m_au + 2;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=26:m_pc d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=R.pch:m_pc d=-1
alu_and(high16(m_pc), 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
@@ -208308,7 +208309,7 @@ dvur2:
m_dbout = m_aluo;
m_at = ext32(m_ftu);
m_au = m_au - 4;
- // alu r=1 c=1 m=..... i=.l.d... 1 a=alub d=-1
+ // alu r=1 c=1 m=..... i=.l.d... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
@@ -208500,7 +208501,7 @@ dvur2:
dvs06:
// 176 dvs06
m_t = m_isr & SR_N;
- // alu r=1 c=2 m=..... i=.l.d... 2 a=2:m_da[rx] d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.dxl:m_da[rx] d=0
alu_sub(m_da[rx], 0x0000);
m_icount -= 2;
if(m_t)
@@ -208509,7 +208510,7 @@ dvs06:
goto dvs07;
dvs07:
// 042 dvs07
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=11:m_at
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.atl:m_at
alu_sub(m_alub, m_at);
sr_nzvc();
m_icount -= 2;
@@ -208517,12 +208518,12 @@ dvs07:
dvs10:
// 0c2 dvs10
m_alue = m_aluo;
- // alu r=1 c=3 m=..... i=.l.d... 10 a=16:m_da[rx] d=0
+ // alu r=1 c=3 m=..... i=.l.d... ALU.subc a=16:m_da[rx] d=0
alu_subc(high16(m_da[rx]), 0x0000);
m_icount -= 2;
// 177 dvs11
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -208530,7 +208531,7 @@ dvs10:
dvs08:
// 216 dvs08
m_t = m_isr & SR_C;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208547,7 +208548,7 @@ dvumz:
dvs09:
// 295 dvs09
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs0c;
@@ -208555,7 +208556,7 @@ dvuma:
// 0e6 dvuma
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=1 c=5 m=.nzvc i=.l.d.i. 24 a=none d=none
+ // alu r=1 c=5 m=.nzvc i=.l.d.i. ALU.over a=none d=none
alu_over(0x0000);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -208601,7 +208602,7 @@ dvs0c:
// 2d6 dvs0c
m_t = !(m_au & 0x3f);
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=33:m_aluo
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -208628,13 +208629,13 @@ dvs0e:
dvs0a:
// 2d4 dvs0a
m_au = m_au - 1;
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs0c;
dvs0f:
// 294 dvs0f
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=11:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.atl:m_at d=-1
alu_and(m_at, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208642,27 +208643,27 @@ dvs0f:
dvs13:
// 254 dvs13
set_16l(m_at, m_aluo);
- // alu r=1 c=6 m=..... i=.l.d... 22 a=33:m_aluo d=-1
+ // alu r=1 c=6 m=..... i=.l.d... ALU.sla1 a=R.aluo:m_aluo d=-1
alu_sla1(m_aluo);
m_icount -= 2;
goto dvs14;
dvs12:
// 214 dvs12
m_au = m_au - 1;
- // alu r=1 c=4 m=..... i=.l.d... 21 a=33:m_aluo d=-1
+ // alu r=1 c=4 m=..... i=.l.d... ALU.sla0 a=R.aluo:m_aluo d=-1
alu_sla0(m_aluo);
m_icount -= 2;
goto dvs14;
dvs14:
// 210 dvs14
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=25:m_at d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.ath:m_at d=-1
alu_and(high16(m_at), 0xffff);
sr_nzvc();
m_icount -= 2;
// 211 dvs15
m_t = m_isr & SR_N;
m_alub = m_alue;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=16:m_da[rx] d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=16:m_da[rx] d=-1
alu_and(high16(m_da[rx]), 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208674,7 +208675,7 @@ dvs16:
// 041 dvs16
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208686,7 +208687,7 @@ dvs1d:
// 0c1 dvs1d
m_t = m_isr & SR_N;
set_16h(m_at, m_at);
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
m_icount -= 2;
@@ -208701,7 +208702,7 @@ dvs17:
m_t = m_isr & SR_N;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208710,7 +208711,7 @@ dvs17:
goto leaa2;
dvs1a:
// 0cd dvs1a
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208718,7 +208719,7 @@ dvs1a:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208728,7 +208729,7 @@ dvs1a:
dvs1f:
// 08a dvs1f
m_ir = m_irc;
- // alu r=1 c=2 m=.nzvc i=.l.d.i. 2 a=alub d=0
+ // alu r=1 c=2 m=.nzvc i=.l.d.i. ALU.sub a=alub d=0
alu_sub(m_alub, 0x0000);
sr_nzvc();
m_icount -= 2;
@@ -208737,7 +208738,7 @@ dvs1f:
m_t = (m_isr & (SR_Z|SR_N)) != 0;
set_16l(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=33:m_aluo d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc();
if(m_t)
@@ -208749,7 +208750,7 @@ dvs1e:
m_t = m_isr & SR_N;
m_alub = m_aluo;
set_16l(m_at, m_aluo);
- // alu r=1 c=2 m=..... i=.l.d... 2 a=25:m_at d=0
+ // alu r=1 c=2 m=..... i=.l.d... ALU.sub a=R.ath:m_at d=0
alu_sub(high16(m_at), 0x0000);
m_icount -= 2;
if(m_t)
@@ -208813,7 +208814,7 @@ dvs1c:
m_ir = m_irc;
set_16h(m_at, m_aluo);
m_au = m_pc + 2;
- // alu r=1 c=1 m=.nzvc i=.l.d.i. 1 a=alub d=-1
+ // alu r=1 c=1 m=.nzvc i=.l.d.i. ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nzvc();
goto leaa2;
@@ -208831,7 +208832,7 @@ void m68008_device::sub_b_ds_dd_ip8() // 9000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -208890,7 +208891,7 @@ void m68008_device::sub_b_ais_dd_ip8() // 9010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -208913,7 +208914,7 @@ void m68008_device::sub_b_ais_dd_ip8() // 9010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -208978,7 +208979,7 @@ void m68008_device::sub_b_aips_dd_ip8() // 9018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -208999,7 +209000,7 @@ void m68008_device::sub_b_aips_dd_ip8() // 9018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209066,7 +209067,7 @@ void m68008_device::sub_b_pais_dd_ip8() // 9020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -209087,7 +209088,7 @@ void m68008_device::sub_b_pais_dd_ip8() // 9020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209183,7 +209184,7 @@ void m68008_device::sub_b_das_dd_ip8() // 9028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209206,7 +209207,7 @@ void m68008_device::sub_b_das_dd_ip8() // 9028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209263,7 +209264,7 @@ void m68008_device::sub_b_dais_dd_ip8() // 9030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209355,7 +209356,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209378,7 +209379,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209475,7 +209476,7 @@ void m68008_device::sub_b_adr16_dd_ip8() // 9038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -209496,7 +209497,7 @@ void m68008_device::sub_b_adr16_dd_ip8() // 9038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209629,7 +209630,7 @@ void m68008_device::sub_b_adr32_dd_ip8() // 9039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -209650,7 +209651,7 @@ void m68008_device::sub_b_adr32_dd_ip8() // 9039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209745,7 +209746,7 @@ void m68008_device::sub_b_dpc_dd_ip8() // 903a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209768,7 +209769,7 @@ void m68008_device::sub_b_dpc_dd_ip8() // 903a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -209824,7 +209825,7 @@ void m68008_device::sub_b_dpci_dd_ip8() // 903b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -209916,7 +209917,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -209939,7 +209940,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210038,7 +210039,7 @@ void m68008_device::sub_b_imm8_dd_ip8() // 903c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210099,7 +210100,7 @@ void m68008_device::sub_w_ds_dd_ip8() // 9040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210160,7 +210161,7 @@ void m68008_device::sub_w_as_dd_ip8() // 9048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210219,7 +210220,7 @@ void m68008_device::sub_w_ais_dd_ip8() // 9050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210260,7 +210261,7 @@ void m68008_device::sub_w_ais_dd_ip8() // 9050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210325,7 +210326,7 @@ void m68008_device::sub_w_aips_dd_ip8() // 9058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -210364,7 +210365,7 @@ void m68008_device::sub_w_aips_dd_ip8() // 9058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210431,7 +210432,7 @@ void m68008_device::sub_w_pais_dd_ip8() // 9060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -210470,7 +210471,7 @@ void m68008_device::sub_w_pais_dd_ip8() // 9060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210566,7 +210567,7 @@ void m68008_device::sub_w_das_dd_ip8() // 9068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210607,7 +210608,7 @@ void m68008_device::sub_w_das_dd_ip8() // 9068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210664,7 +210665,7 @@ void m68008_device::sub_w_dais_dd_ip8() // 9070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -210756,7 +210757,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -210797,7 +210798,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -210894,7 +210895,7 @@ void m68008_device::sub_w_adr16_dd_ip8() // 9078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -210933,7 +210934,7 @@ void m68008_device::sub_w_adr16_dd_ip8() // 9078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211066,7 +211067,7 @@ void m68008_device::sub_w_adr32_dd_ip8() // 9079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -211105,7 +211106,7 @@ void m68008_device::sub_w_adr32_dd_ip8() // 9079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211200,7 +211201,7 @@ void m68008_device::sub_w_dpc_dd_ip8() // 907a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -211241,7 +211242,7 @@ void m68008_device::sub_w_dpc_dd_ip8() // 907a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211297,7 +211298,7 @@ void m68008_device::sub_w_dpci_dd_ip8() // 907b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -211389,7 +211390,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -211430,7 +211431,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211529,7 +211530,7 @@ void m68008_device::sub_w_imm16_dd_ip8() // 907c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -211590,7 +211591,7 @@ void m68008_device::sub_l_ds_dd_ip8() // 9080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -211629,7 +211630,7 @@ void m68008_device::sub_l_ds_dd_ip8() // 9080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -211659,7 +211660,7 @@ void m68008_device::sub_l_as_dd_ip8() // 9088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -211698,7 +211699,7 @@ void m68008_device::sub_l_as_dd_ip8() // 9088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -211726,7 +211727,7 @@ void m68008_device::sub_l_ais_dd_ip8() // 9090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -211803,12 +211804,12 @@ void m68008_device::sub_l_ais_dd_ip8() // 9090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -211868,7 +211869,7 @@ void m68008_device::sub_l_aips_dd_ip8() // 9098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -211948,12 +211949,12 @@ void m68008_device::sub_l_aips_dd_ip8() // 9098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212012,7 +212013,7 @@ void m68008_device::sub_l_pais_dd_ip8() // 90a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -212094,12 +212095,12 @@ void m68008_device::sub_l_pais_dd_ip8() // 90a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212195,7 +212196,7 @@ void m68008_device::sub_l_das_dd_ip8() // 90a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212272,12 +212273,12 @@ void m68008_device::sub_l_das_dd_ip8() // 90a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212335,7 +212336,7 @@ void m68008_device::sub_l_dais_dd_ip8() // 90b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -212426,7 +212427,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212503,12 +212504,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212606,7 +212607,7 @@ void m68008_device::sub_l_adr16_dd_ip8() // 90b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -212683,12 +212684,12 @@ void m68008_device::sub_l_adr16_dd_ip8() // 90b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212822,7 +212823,7 @@ void m68008_device::sub_l_adr32_dd_ip8() // 90b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -212899,12 +212900,12 @@ void m68008_device::sub_l_adr32_dd_ip8() // 90b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -212999,7 +213000,7 @@ void m68008_device::sub_l_dpc_dd_ip8() // 90ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -213076,12 +213077,12 @@ void m68008_device::sub_l_dpc_dd_ip8() // 90ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213138,7 +213139,7 @@ void m68008_device::sub_l_dpci_dd_ip8() // 90bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -213229,7 +213230,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -213306,12 +213307,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -213447,7 +213448,7 @@ void m68008_device::sub_l_imm32_dd_ip8() // 90bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -213486,7 +213487,7 @@ void m68008_device::sub_l_imm32_dd_ip8() // 90bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -213516,7 +213517,7 @@ void m68008_device::suba_w_ds_ad_ip8() // 90c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213554,7 +213555,7 @@ void m68008_device::suba_w_ds_ad_ip8() // 90c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213583,7 +213584,7 @@ void m68008_device::suba_w_as_ad_ip8() // 90c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213621,7 +213622,7 @@ void m68008_device::suba_w_as_ad_ip8() // 90c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213648,7 +213649,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -213689,7 +213690,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213727,7 +213728,7 @@ void m68008_device::suba_w_ais_ad_ip8() // 90d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213760,7 +213761,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -213799,7 +213800,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213837,7 +213838,7 @@ void m68008_device::suba_w_aips_ad_ip8() // 90d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -213872,7 +213873,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -213911,7 +213912,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -213949,7 +213950,7 @@ void m68008_device::suba_w_pais_ad_ip8() // 90e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214013,7 +214014,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214054,7 +214055,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214092,7 +214093,7 @@ void m68008_device::suba_w_das_ad_ip8() // 90e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214117,7 +214118,7 @@ void m68008_device::suba_w_dais_ad_ip8() // 90f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214209,7 +214210,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214250,7 +214251,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214288,7 +214289,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214353,7 +214354,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -214392,7 +214393,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214430,7 +214431,7 @@ void m68008_device::suba_w_adr16_ad_ip8() // 90f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214531,7 +214532,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -214570,7 +214571,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214608,7 +214609,7 @@ void m68008_device::suba_w_adr32_ad_ip8() // 90f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214671,7 +214672,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214712,7 +214713,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214750,7 +214751,7 @@ void m68008_device::suba_w_dpc_ad_ip8() // 90fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -214774,7 +214775,7 @@ void m68008_device::suba_w_dpci_ad_ip8() // 90fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -214866,7 +214867,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -214907,7 +214908,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -214945,7 +214946,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -215012,7 +215013,7 @@ void m68008_device::suba_w_imm16_ad_ip8() // 90fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -215050,7 +215051,7 @@ void m68008_device::suba_w_imm16_ad_ip8() // 90fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=5 c=3 m=..... i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -215079,7 +215080,7 @@ void m68008_device::subx_b_ds_dd_ip8() // 9100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -215144,7 +215145,7 @@ void m68008_device::subx_b_pais_paid_ip8() // 9108 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -215185,7 +215186,7 @@ void m68008_device::subx_b_pais_paid_ip8() // 9108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=b....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=b....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215258,7 +215259,7 @@ void m68008_device::sub_b_dd_ais_ip8() // 9110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215281,7 +215282,7 @@ void m68008_device::sub_b_dd_ais_ip8() // 9110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215360,7 +215361,7 @@ void m68008_device::sub_b_dd_aips_ip8() // 9118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -215381,7 +215382,7 @@ void m68008_device::sub_b_dd_aips_ip8() // 9118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215462,7 +215463,7 @@ void m68008_device::sub_b_dd_pais_ip8() // 9120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -215483,7 +215484,7 @@ void m68008_device::sub_b_dd_pais_ip8() // 9120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215593,7 +215594,7 @@ void m68008_device::sub_b_dd_das_ip8() // 9128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215616,7 +215617,7 @@ void m68008_device::sub_b_dd_das_ip8() // 9128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215687,7 +215688,7 @@ void m68008_device::sub_b_dd_dais_ip8() // 9130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -215779,7 +215780,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -215802,7 +215803,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -215913,7 +215914,7 @@ void m68008_device::sub_b_dd_adr16_ip8() // 9138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -215934,7 +215935,7 @@ void m68008_device::sub_b_dd_adr16_ip8() // 9138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216081,7 +216082,7 @@ void m68008_device::sub_b_dd_adr32_ip8() // 9139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -216102,7 +216103,7 @@ void m68008_device::sub_b_dd_adr32_ip8() // 9139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=b....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=b....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216177,7 +216178,7 @@ void m68008_device::subx_w_ds_dd_ip8() // 9140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -216242,7 +216243,7 @@ void m68008_device::subx_w_pais_paid_ip8() // 9148 f1f8
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
@@ -216319,7 +216320,7 @@ void m68008_device::subx_w_pais_paid_ip8() // 9148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=2 m=xnzvc i=.....i. 3 a=alub d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.....i. ALU.subx a=alub d=R.dbin:m_dbin
alu_subx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216410,7 +216411,7 @@ void m68008_device::sub_w_dd_ais_ip8() // 9150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216451,7 +216452,7 @@ void m68008_device::sub_w_dd_ais_ip8() // 9150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216548,7 +216549,7 @@ void m68008_device::sub_w_dd_aips_ip8() // 9158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -216587,7 +216588,7 @@ void m68008_device::sub_w_dd_aips_ip8() // 9158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216686,7 +216687,7 @@ void m68008_device::sub_w_dd_pais_ip8() // 9160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -216725,7 +216726,7 @@ void m68008_device::sub_w_dd_pais_ip8() // 9160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216853,7 +216854,7 @@ void m68008_device::sub_w_dd_das_ip8() // 9168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -216894,7 +216895,7 @@ void m68008_device::sub_w_dd_das_ip8() // 9168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -216983,7 +216984,7 @@ void m68008_device::sub_w_dd_dais_ip8() // 9170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -217075,7 +217076,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -217116,7 +217117,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217245,7 +217246,7 @@ void m68008_device::sub_w_dd_adr16_ip8() // 9178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -217284,7 +217285,7 @@ void m68008_device::sub_w_dd_adr16_ip8() // 9178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217449,7 +217450,7 @@ void m68008_device::sub_w_dd_adr32_ip8() // 9179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -217488,7 +217489,7 @@ void m68008_device::sub_w_dd_adr32_ip8() // 9179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.....i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.....i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217581,7 +217582,7 @@ void m68008_device::subx_l_ds_dd_ip8() // 9180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_subx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
@@ -217620,7 +217621,7 @@ void m68008_device::subx_l_ds_dd_ip8() // 9180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -217690,7 +217691,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=10 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
@@ -217767,7 +217768,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=10 c=2 m=xnzvc i=.l...i. 3 a=33:m_aluo d=31:m_dbin
+ // alu r=10 c=2 m=xnzvc i=.l...i. ALU.subx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_subx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -217841,7 +217842,7 @@ void m68008_device::subx_l_pais_paid_ip8() // 9188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=10 c=3 m=xnzvc i=.l....f 10 a=alub d=31:m_dbin
+ // alu r=10 c=3 m=xnzvc i=.l....f ALU.subc a=alub d=R.dbin:m_dbin
alu_subc(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -217932,7 +217933,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -218009,7 +218010,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218049,7 +218050,7 @@ void m68008_device::sub_l_dd_ais_ip8() // 9190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218138,7 +218139,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -218218,7 +218219,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218258,7 +218259,7 @@ void m68008_device::sub_l_dd_aips_ip8() // 9198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218346,7 +218347,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -218428,7 +218429,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218468,7 +218469,7 @@ void m68008_device::sub_l_dd_pais_ip8() // 91a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218593,7 +218594,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -218670,7 +218671,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -218710,7 +218711,7 @@ void m68008_device::sub_l_dd_das_ip8() // 91a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -218797,7 +218798,7 @@ void m68008_device::sub_l_dd_dais_ip8() // 91b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -218888,7 +218889,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -218965,7 +218966,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219005,7 +219006,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219132,7 +219133,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -219209,7 +219210,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219249,7 +219250,7 @@ void m68008_device::sub_l_dd_adr16_ip8() // 91b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219412,7 +219413,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -219489,7 +219490,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=5 c=2 m=xnzvc i=.l...i. 2 a=2:m_da[rx] d=31:m_dbin
+ // alu r=5 c=2 m=xnzvc i=.l...i. ALU.sub a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_sub(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -219529,7 +219530,7 @@ void m68008_device::sub_l_dd_adr32_ip8() // 91b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=5 c=3 m=xnzvc i=.l....f 10 a=16:m_da[rx] d=29:m_alue
+ // alu r=5 c=3 m=xnzvc i=.l....f ALU.subc a=16:m_da[rx] d=R.alue:m_alue
alu_subc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -219620,7 +219621,7 @@ void m68008_device::suba_l_ds_ad_ip8() // 91c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -219658,7 +219659,7 @@ void m68008_device::suba_l_ds_ad_ip8() // 91c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219687,7 +219688,7 @@ void m68008_device::suba_l_as_ad_ip8() // 91c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=5 c=2 m=..... i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -219725,7 +219726,7 @@ void m68008_device::suba_l_as_ad_ip8() // 91c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -219752,7 +219753,7 @@ void m68008_device::suba_l_ais_ad_ip8() // 91d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -219829,11 +219830,11 @@ void m68008_device::suba_l_ais_ad_ip8() // 91d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -219892,7 +219893,7 @@ void m68008_device::suba_l_aips_ad_ip8() // 91d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -219972,11 +219973,11 @@ void m68008_device::suba_l_aips_ad_ip8() // 91d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -220034,7 +220035,7 @@ void m68008_device::suba_l_pais_ad_ip8() // 91e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -220116,11 +220117,11 @@ void m68008_device::suba_l_pais_ad_ip8() // 91e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -220215,7 +220216,7 @@ void m68008_device::suba_l_das_ad_ip8() // 91e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220292,11 +220293,11 @@ void m68008_device::suba_l_das_ad_ip8() // 91e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220353,7 +220354,7 @@ void m68008_device::suba_l_dais_ad_ip8() // 91f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -220444,7 +220445,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220521,11 +220522,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220622,7 +220623,7 @@ void m68008_device::suba_l_adr16_ad_ip8() // 91f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -220699,11 +220700,11 @@ void m68008_device::suba_l_adr16_ad_ip8() // 91f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -220836,7 +220837,7 @@ void m68008_device::suba_l_adr32_ad_ip8() // 91f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -220913,11 +220914,11 @@ void m68008_device::suba_l_adr32_ad_ip8() // 91f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -221011,7 +221012,7 @@ void m68008_device::suba_l_dpc_ad_ip8() // 91fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -221088,11 +221089,11 @@ void m68008_device::suba_l_dpc_ad_ip8() // 91fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -221148,7 +221149,7 @@ void m68008_device::suba_l_dpci_ad_ip8() // 91fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -221239,7 +221240,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -221316,11 +221317,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=5 c=2 m=..... i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=5 c=3 m=..... i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -221455,7 +221456,7 @@ void m68008_device::suba_l_imm32_ad_ip8() // 91fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=5 c=2 m=..... i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=5 c=2 m=..... i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -221493,7 +221494,7 @@ void m68008_device::suba_l_imm32_ad_ip8() // 91fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=5 c=3 m=..... i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=5 c=3 m=..... i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -221522,7 +221523,7 @@ void m68008_device::cmp_b_ds_dd_ip8() // b000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub8(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221580,7 +221581,7 @@ void m68008_device::cmp_b_ais_dd_ip8() // b010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221603,7 +221604,7 @@ void m68008_device::cmp_b_ais_dd_ip8() // b010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221667,7 +221668,7 @@ void m68008_device::cmp_b_aips_dd_ip8() // b018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -221688,7 +221689,7 @@ void m68008_device::cmp_b_aips_dd_ip8() // b018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221754,7 +221755,7 @@ void m68008_device::cmp_b_pais_dd_ip8() // b020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -221775,7 +221776,7 @@ void m68008_device::cmp_b_pais_dd_ip8() // b020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221870,7 +221871,7 @@ void m68008_device::cmp_b_das_dd_ip8() // b028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -221893,7 +221894,7 @@ void m68008_device::cmp_b_das_dd_ip8() // b028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -221949,7 +221950,7 @@ void m68008_device::cmp_b_dais_dd_ip8() // b030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -222041,7 +222042,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222064,7 +222065,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222160,7 +222161,7 @@ void m68008_device::cmp_b_adr16_dd_ip8() // b038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -222181,7 +222182,7 @@ void m68008_device::cmp_b_adr16_dd_ip8() // b038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222313,7 +222314,7 @@ void m68008_device::cmp_b_adr32_dd_ip8() // b039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -222334,7 +222335,7 @@ void m68008_device::cmp_b_adr32_dd_ip8() // b039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222428,7 +222429,7 @@ void m68008_device::cmp_b_dpc_dd_ip8() // b03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222451,7 +222452,7 @@ void m68008_device::cmp_b_dpc_dd_ip8() // b03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222506,7 +222507,7 @@ void m68008_device::cmp_b_dpci_dd_ip8() // b03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -222598,7 +222599,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222621,7 +222622,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub8(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222719,7 +222720,7 @@ void m68008_device::cmp_b_imm8_dd_ip8() // b03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub8(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222779,7 +222780,7 @@ void m68008_device::cmp_w_ds_dd_ip8() // b040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222839,7 +222840,7 @@ void m68008_device::cmp_w_as_dd_ip8() // b048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -222897,7 +222898,7 @@ void m68008_device::cmp_w_ais_dd_ip8() // b050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -222938,7 +222939,7 @@ void m68008_device::cmp_w_ais_dd_ip8() // b050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223002,7 +223003,7 @@ void m68008_device::cmp_w_aips_dd_ip8() // b058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -223041,7 +223042,7 @@ void m68008_device::cmp_w_aips_dd_ip8() // b058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223107,7 +223108,7 @@ void m68008_device::cmp_w_pais_dd_ip8() // b060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -223146,7 +223147,7 @@ void m68008_device::cmp_w_pais_dd_ip8() // b060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223241,7 +223242,7 @@ void m68008_device::cmp_w_das_dd_ip8() // b068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223282,7 +223283,7 @@ void m68008_device::cmp_w_das_dd_ip8() // b068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223338,7 +223339,7 @@ void m68008_device::cmp_w_dais_dd_ip8() // b070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -223430,7 +223431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223471,7 +223472,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223567,7 +223568,7 @@ void m68008_device::cmp_w_adr16_dd_ip8() // b078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -223606,7 +223607,7 @@ void m68008_device::cmp_w_adr16_dd_ip8() // b078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223738,7 +223739,7 @@ void m68008_device::cmp_w_adr32_dd_ip8() // b079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -223777,7 +223778,7 @@ void m68008_device::cmp_w_adr32_dd_ip8() // b079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223871,7 +223872,7 @@ void m68008_device::cmp_w_dpc_dd_ip8() // b07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -223912,7 +223913,7 @@ void m68008_device::cmp_w_dpc_dd_ip8() // b07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -223967,7 +223968,7 @@ void m68008_device::cmp_w_dpci_dd_ip8() // b07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -224059,7 +224060,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -224100,7 +224101,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -224198,7 +224199,7 @@ void m68008_device::cmp_w_imm16_dd_ip8() // b07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 23a rcaw2
@@ -224258,11 +224259,11 @@ void m68008_device::cmp_l_ds_dd_ip8() // b080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=18:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224323,11 +224324,11 @@ void m68008_device::cmp_l_as_dd_ip8() // b088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=17:m_da[ry] d=16:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224386,7 +224387,7 @@ void m68008_device::cmp_l_ais_dd_ip8() // b090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -224463,11 +224464,11 @@ void m68008_device::cmp_l_ais_dd_ip8() // b090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224526,7 +224527,7 @@ void m68008_device::cmp_l_aips_dd_ip8() // b098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -224606,11 +224607,11 @@ void m68008_device::cmp_l_aips_dd_ip8() // b098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224668,7 +224669,7 @@ void m68008_device::cmp_l_pais_dd_ip8() // b0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -224750,11 +224751,11 @@ void m68008_device::cmp_l_pais_dd_ip8() // b0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224849,7 +224850,7 @@ void m68008_device::cmp_l_das_dd_ip8() // b0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -224926,11 +224927,11 @@ void m68008_device::cmp_l_das_dd_ip8() // b0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -224987,7 +224988,7 @@ void m68008_device::cmp_l_dais_dd_ip8() // b0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225078,7 +225079,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -225155,11 +225156,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225256,7 +225257,7 @@ void m68008_device::cmp_l_adr16_dd_ip8() // b0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -225333,11 +225334,11 @@ void m68008_device::cmp_l_adr16_dd_ip8() // b0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225470,7 +225471,7 @@ void m68008_device::cmp_l_adr32_dd_ip8() // b0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -225547,11 +225548,11 @@ void m68008_device::cmp_l_adr32_dd_ip8() // b0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225645,7 +225646,7 @@ void m68008_device::cmp_l_dpc_dd_ip8() // b0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -225722,11 +225723,11 @@ void m68008_device::cmp_l_dpc_dd_ip8() // b0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -225782,7 +225783,7 @@ void m68008_device::cmp_l_dpci_dd_ip8() // b0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -225873,7 +225874,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -225950,11 +225951,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=31:m_dbin d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=16:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226089,11 +226090,11 @@ void m68008_device::cmp_l_imm32_dd_ip8() // b0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=9:m_dt d=2:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=23:m_dt d=16:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=23:m_dt d=16:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226154,11 +226155,11 @@ void m68008_device::cmpa_w_ds_ad_ip8() // b0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226219,11 +226220,11 @@ void m68008_device::cmpa_w_as_ad_ip8() // b0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226282,7 +226283,7 @@ void m68008_device::cmpa_w_ais_ad_ip8() // b0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226323,11 +226324,11 @@ void m68008_device::cmpa_w_ais_ad_ip8() // b0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226392,7 +226393,7 @@ void m68008_device::cmpa_w_aips_ad_ip8() // b0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -226431,11 +226432,11 @@ void m68008_device::cmpa_w_aips_ad_ip8() // b0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226502,7 +226503,7 @@ void m68008_device::cmpa_w_pais_ad_ip8() // b0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=6 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -226541,11 +226542,11 @@ void m68008_device::cmpa_w_pais_ad_ip8() // b0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226641,7 +226642,7 @@ void m68008_device::cmpa_w_das_ad_ip8() // b0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226682,11 +226683,11 @@ void m68008_device::cmpa_w_das_ad_ip8() // b0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226743,7 +226744,7 @@ void m68008_device::cmpa_w_dais_ad_ip8() // b0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -226835,7 +226836,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -226876,11 +226877,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -226977,7 +226978,7 @@ void m68008_device::cmpa_w_adr16_ad_ip8() // b0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -227016,11 +227017,11 @@ void m68008_device::cmpa_w_adr16_ad_ip8() // b0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227153,7 +227154,7 @@ void m68008_device::cmpa_w_adr32_ad_ip8() // b0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -227192,11 +227193,11 @@ void m68008_device::cmpa_w_adr32_ad_ip8() // b0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227291,7 +227292,7 @@ void m68008_device::cmpa_w_dpc_ad_ip8() // b0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -227332,11 +227333,11 @@ void m68008_device::cmpa_w_dpc_ad_ip8() // b0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227392,7 +227393,7 @@ void m68008_device::cmpa_w_dpci_ad_ip8() // b0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -227484,7 +227485,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -227525,11 +227526,11 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227628,11 +227629,11 @@ void m68008_device::cmpa_w_imm16_ad_ip8() // b0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 174 cprm2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=25:m_at d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=R.ath:m_at d=15:m_da[rx]
alu_subc(high16(m_at), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227692,7 +227693,7 @@ void m68008_device::eor_b_dd_ds_ip8() // b100 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor8(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -227700,7 +227701,7 @@ void m68008_device::eor_b_dd_ds_ip8() // b100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -227775,7 +227776,7 @@ void m68008_device::cmpm_b_aips_aipd_ip8() // b108 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + (rx < 15 ? 1 : 2);
- // alu r=6 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
@@ -227797,7 +227798,7 @@ void m68008_device::cmpm_b_aips_aipd_ip8() // b108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=b....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=b....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub8(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227851,11 +227852,11 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -227875,7 +227876,7 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -227917,7 +227918,7 @@ void m68008_device::eor_b_dd_ais_ip8() // b110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -227952,12 +227953,12 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -227978,7 +227979,7 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228020,7 +228021,7 @@ void m68008_device::eor_b_dd_aips_ip8() // b118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228054,7 +228055,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -228062,7 +228063,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -228083,7 +228084,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228125,7 +228126,7 @@ void m68008_device::eor_b_dd_pais_ip8() // b120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228157,7 +228158,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -228195,11 +228196,11 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -228219,7 +228220,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228261,7 +228262,7 @@ void m68008_device::eor_b_dd_das_ip8() // b128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228291,14 +228292,14 @@ void m68008_device::eor_b_dd_dais_ip8() // b130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=b...... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -228306,7 +228307,7 @@ void m68008_device::eor_b_dd_dais_ip8() // b130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -228345,7 +228346,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -228386,11 +228387,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -228410,7 +228411,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228452,7 +228453,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228486,7 +228487,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -228524,7 +228525,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -228545,7 +228546,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228587,7 +228588,7 @@ void m68008_device::eor_b_dd_adr16_ip8() // b138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228619,7 +228620,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -228658,7 +228659,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=b...... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -228696,7 +228697,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -228717,7 +228718,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=b....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=b....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228759,7 +228760,7 @@ void m68008_device::eor_b_dd_adr32_ip8() // b139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=b...... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=b...... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -228792,7 +228793,7 @@ void m68008_device::eor_w_dd_ds_ip8() // b140 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 08b roaw2
@@ -228800,7 +228801,7 @@ void m68008_device::eor_w_dd_ds_ip8() // b140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -228893,7 +228894,7 @@ void m68008_device::cmpm_w_aips_aipd_ip8() // b148 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -228933,7 +228934,7 @@ void m68008_device::cmpm_w_aips_aipd_ip8() // b148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -228987,11 +228988,11 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -229029,7 +229030,7 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229071,7 +229072,7 @@ void m68008_device::eor_w_dd_ais_ip8() // b150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229124,12 +229125,12 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -229168,7 +229169,7 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229210,7 +229211,7 @@ void m68008_device::eor_w_dd_aips_ip8() // b158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229262,7 +229263,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -229270,7 +229271,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=13 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -229309,7 +229310,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229351,7 +229352,7 @@ void m68008_device::eor_w_dd_pais_ip8() // b160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229401,7 +229402,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=....... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -229439,11 +229440,11 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -229481,7 +229482,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229523,7 +229524,7 @@ void m68008_device::eor_w_dd_das_ip8() // b168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229571,14 +229572,14 @@ void m68008_device::eor_w_dd_dais_ip8() // b170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=13 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=....... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -229586,7 +229587,7 @@ void m68008_device::eor_w_dd_dais_ip8() // b170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -229625,7 +229626,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -229666,11 +229667,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -229708,7 +229709,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229750,7 +229751,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229802,7 +229803,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -229840,7 +229841,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -229879,7 +229880,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -229921,7 +229922,7 @@ void m68008_device::eor_w_dd_adr16_ip8() // b178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -229971,7 +229972,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -230010,7 +230011,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=....... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -230048,7 +230049,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=13 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -230087,7 +230088,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.....i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.....i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230129,7 +230130,7 @@ void m68008_device::eor_w_dd_adr32_ip8() // b179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=....... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=....... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -230180,12 +230181,12 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8
m_aob = m_au;
m_ir = m_irc;
m_pc = m_au;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=4:m_da[ry]
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dyl:m_da[ry]
alu_eor(m_da[rx], m_da[ry]);
sr_nzvc();
// 259 roal2
set_16l(m_da[ry], m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -230220,7 +230221,7 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25a roal3
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=18:m_da[ry]
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=18:m_da[ry]
alu_eor(high16(m_da[rx]), high16(m_da[ry]));
sr_nzvc_u();
m_icount -= 2;
@@ -230229,7 +230230,7 @@ void m68008_device::eor_l_dd_ds_ip8() // b180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -230326,7 +230327,7 @@ void m68008_device::cmpm_l_aips_aipd_ip8() // b188 f1f8
m_aob = m_da[rx];
m_ir = m_irc;
m_au = m_da[rx] + 2;
- // alu r=6 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -230400,13 +230401,13 @@ void m68008_device::cmpm_l_aips_aipd_ip8() // b188 f1f8
m_aob = m_pc;
m_da[rx] = m_au;
m_au = m_pc + 2;
- // alu r=6 c=2 m=.nzvc i=.l...i. 2 a=33:m_aluo d=31:m_dbin
+ // alu r=6 c=2 m=.nzvc i=.l...i. ALU.sub a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_sub(m_aluo, m_dbin);
sr_nzvc();
// 157 cmml7
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
- // alu r=6 c=3 m=.nzvc i=.l....f 10 a=alub d=29:m_alue
+ // alu r=6 c=3 m=.nzvc i=.l....f ALU.subc a=alub d=R.alue:m_alue
alu_subc(m_alub, m_alue);
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230460,7 +230461,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -230500,7 +230501,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230538,7 +230539,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230578,7 +230579,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -230618,7 +230619,7 @@ void m68008_device::eor_l_dd_ais_ip8() // b190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -230668,7 +230669,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -230708,11 +230709,11 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230750,7 +230751,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -230790,7 +230791,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -230830,7 +230831,7 @@ void m68008_device::eor_l_dd_aips_ip8() // b198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -230879,14 +230880,14 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230925,7 +230926,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -230963,7 +230964,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231003,7 +231004,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231043,7 +231044,7 @@ void m68008_device::eor_l_dd_pais_ip8() // b1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -231093,7 +231094,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -231130,7 +231131,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231170,7 +231171,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231208,7 +231209,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231248,7 +231249,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231288,7 +231289,7 @@ void m68008_device::eor_l_dd_das_ip8() // b1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -231336,14 +231337,14 @@ void m68008_device::eor_l_dd_dais_ip8() // b1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=13 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=13 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=13 c=0 m=..... i=.l..... 9 a=33:m_aluo d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -231351,7 +231352,7 @@ void m68008_device::eor_l_dd_dais_ip8() // b1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -231390,7 +231391,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -231430,7 +231431,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231470,7 +231471,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231508,7 +231509,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231548,7 +231549,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231588,7 +231589,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -231640,7 +231641,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -231678,7 +231679,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -231718,7 +231719,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -231756,7 +231757,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -231796,7 +231797,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -231836,7 +231837,7 @@ void m68008_device::eor_l_dd_adr16_ip8() // b1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -231886,7 +231887,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=31:m_dbin d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -231925,7 +231926,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=13 c=0 m=..... i=.l..... 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -231963,7 +231964,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=13 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=13 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -232003,7 +232004,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=31:m_dbin
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -232041,7 +232042,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=13 c=2 m=.nzvc i=.l...i. 9 a=2:m_da[rx] d=31:m_dbin
+ // alu r=13 c=2 m=.nzvc i=.l...i. ALU.eor a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_eor(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232081,7 +232082,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=13 c=3 m=.nzvc i=.l....f 9 a=16:m_da[rx] d=29:m_alue
+ // alu r=13 c=3 m=.nzvc i=.l....f ALU.eor a=16:m_da[rx] d=R.alue:m_alue
alu_eor(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -232121,7 +232122,7 @@ void m68008_device::eor_l_dd_adr32_ip8() // b1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=13 c=0 m=..... i=.l..... 9 a=none d=none
+ // alu r=13 c=0 m=..... i=.l..... ALU.eor a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -232173,11 +232174,11 @@ void m68008_device::cmpa_l_ds_ad_ip8() // b1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=18:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232238,11 +232239,11 @@ void m68008_device::cmpa_l_as_ad_ip8() // b1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_sub(m_da[ry], m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=17:m_da[ry] d=15:m_da[rx]
alu_subc(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232301,7 +232302,7 @@ void m68008_device::cmpa_l_ais_ad_ip8() // b1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -232378,11 +232379,11 @@ void m68008_device::cmpa_l_ais_ad_ip8() // b1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232441,7 +232442,7 @@ void m68008_device::cmpa_l_aips_ad_ip8() // b1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -232521,11 +232522,11 @@ void m68008_device::cmpa_l_aips_ad_ip8() // b1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232583,7 +232584,7 @@ void m68008_device::cmpa_l_pais_ad_ip8() // b1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -232665,11 +232666,11 @@ void m68008_device::cmpa_l_pais_ad_ip8() // b1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232764,7 +232765,7 @@ void m68008_device::cmpa_l_das_ad_ip8() // b1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -232841,11 +232842,11 @@ void m68008_device::cmpa_l_das_ad_ip8() // b1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -232902,7 +232903,7 @@ void m68008_device::cmpa_l_dais_ad_ip8() // b1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -232993,7 +232994,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -233070,11 +233071,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233171,7 +233172,7 @@ void m68008_device::cmpa_l_adr16_ad_ip8() // b1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -233248,11 +233249,11 @@ void m68008_device::cmpa_l_adr16_ad_ip8() // b1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233385,7 +233386,7 @@ void m68008_device::cmpa_l_adr32_ad_ip8() // b1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -233462,11 +233463,11 @@ void m68008_device::cmpa_l_adr32_ad_ip8() // b1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233560,7 +233561,7 @@ void m68008_device::cmpa_l_dpc_ad_ip8() // b1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -233637,11 +233638,11 @@ void m68008_device::cmpa_l_dpc_ad_ip8() // b1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -233697,7 +233698,7 @@ void m68008_device::cmpa_l_dpci_ad_ip8() // b1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=6 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=6 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -233788,7 +233789,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=6 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=6 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -233865,11 +233866,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=31:m_dbin d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_sub(m_dbin, m_da[rx]);
sr_nzvc();
// 172 cpml2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=alub d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=alub d=15:m_da[rx]
alu_subc(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234004,11 +234005,11 @@ void m68008_device::cmpa_l_imm32_ad_ip8() // b1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=6 c=2 m=.nzvc i=.....i. 2 a=9:m_dt d=1:m_da[rx]
+ // alu r=6 c=2 m=.nzvc i=.....i. ALU.sub a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_sub(m_dt, m_da[rx]);
sr_nzvc();
// 173 cprl2
- // alu r=6 c=3 m=.nzvc i=......f 10 a=23:m_dt d=15:m_da[rx]
+ // alu r=6 c=3 m=.nzvc i=......f ALU.subc a=23:m_dt d=15:m_da[rx]
alu_subc(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -234069,7 +234070,7 @@ void m68008_device::and_b_ds_dd_ip8() // c000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and8(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234077,7 +234078,7 @@ void m68008_device::and_b_ds_dd_ip8() // c000 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234129,11 +234130,11 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -234153,7 +234154,7 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234161,7 +234162,7 @@ void m68008_device::and_b_ais_dd_ip8() // c010 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234216,12 +234217,12 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -234242,7 +234243,7 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234250,7 +234251,7 @@ void m68008_device::and_b_aips_dd_ip8() // c018 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234304,7 +234305,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -234312,7 +234313,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -234333,7 +234334,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234341,7 +234342,7 @@ void m68008_device::and_b_pais_dd_ip8() // c020 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234393,7 +234394,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234431,11 +234432,11 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -234455,7 +234456,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234463,7 +234464,7 @@ void m68008_device::and_b_das_dd_ip8() // c028 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234513,14 +234514,14 @@ void m68008_device::and_b_dais_dd_ip8() // c030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -234528,7 +234529,7 @@ void m68008_device::and_b_dais_dd_ip8() // c030 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234567,7 +234568,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234608,11 +234609,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -234632,7 +234633,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234640,7 +234641,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234694,7 +234695,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -234732,7 +234733,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -234753,7 +234754,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234761,7 +234762,7 @@ void m68008_device::and_b_adr16_dd_ip8() // c038 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234813,7 +234814,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234852,7 +234853,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -234890,7 +234891,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -234911,7 +234912,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -234919,7 +234920,7 @@ void m68008_device::and_b_adr32_dd_ip8() // c039 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -234970,7 +234971,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235008,11 +235009,11 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -235032,7 +235033,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235040,7 +235041,7 @@ void m68008_device::and_b_dpc_dd_ip8() // c03a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235089,14 +235090,14 @@ void m68008_device::and_b_dpci_dd_ip8() // c03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -235104,7 +235105,7 @@ void m68008_device::and_b_dpci_dd_ip8() // c03b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235143,7 +235144,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 11:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235184,11 +235185,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob);
@@ -235208,7 +235209,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and8(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235216,7 +235217,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 7:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235270,7 +235271,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235309,7 +235310,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and8(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235317,7 +235318,7 @@ void m68008_device::and_b_imm8_dd_ip8() // c03c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235371,7 +235372,7 @@ void m68008_device::and_w_ds_dd_ip8() // c040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235379,7 +235380,7 @@ void m68008_device::and_w_ds_dd_ip8() // c040 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235431,11 +235432,11 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235473,7 +235474,7 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235481,7 +235482,7 @@ void m68008_device::and_w_ais_dd_ip8() // c050 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235536,12 +235537,12 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -235580,7 +235581,7 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235588,7 +235589,7 @@ void m68008_device::and_w_aips_dd_ip8() // c058 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235642,7 +235643,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -235650,7 +235651,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -235689,7 +235690,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235697,7 +235698,7 @@ void m68008_device::and_w_pais_dd_ip8() // c060 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235749,7 +235750,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235787,11 +235788,11 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -235829,7 +235830,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -235837,7 +235838,7 @@ void m68008_device::and_w_das_dd_ip8() // c068 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235887,14 +235888,14 @@ void m68008_device::and_w_dais_dd_ip8() // c070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -235902,7 +235903,7 @@ void m68008_device::and_w_dais_dd_ip8() // c070 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235941,7 +235942,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -235982,11 +235983,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -236024,7 +236025,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236032,7 +236033,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236086,7 +236087,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -236124,7 +236125,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -236163,7 +236164,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236171,7 +236172,7 @@ void m68008_device::and_w_adr16_dd_ip8() // c078 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236223,7 +236224,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236262,7 +236263,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -236300,7 +236301,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -236339,7 +236340,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236347,7 +236348,7 @@ void m68008_device::and_w_adr32_dd_ip8() // c079 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236398,7 +236399,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236436,11 +236437,11 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236478,7 +236479,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236486,7 +236487,7 @@ void m68008_device::and_w_dpc_dd_ip8() // c07a f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236535,14 +236536,14 @@ void m68008_device::and_w_dpci_dd_ip8() // c07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -236550,7 +236551,7 @@ void m68008_device::and_w_dpci_dd_ip8() // c07b f1ff
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236589,7 +236590,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236630,11 +236631,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236672,7 +236673,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236680,7 +236681,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236734,7 +236735,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236773,7 +236774,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 27a rrgw2
@@ -236781,7 +236782,7 @@ void m68008_device::and_w_imm16_dd_ip8() // c07c f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236835,12 +236836,12 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_and(m_da[ry], m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -236875,7 +236876,7 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=18:m_da[ry] d=16:m_da[rx]
alu_and(high16(m_da[ry]), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -236884,7 +236885,7 @@ void m68008_device::and_l_ds_dd_ip8() // c080 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -236904,7 +236905,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -236944,7 +236945,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -236982,12 +236983,12 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237028,7 +237029,7 @@ void m68008_device::and_l_ais_dd_ip8() // c090 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237048,7 +237049,7 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -237088,11 +237089,11 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237130,12 +237131,12 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237176,7 +237177,7 @@ void m68008_device::and_l_aips_dd_ip8() // c098 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237195,14 +237196,14 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237241,7 +237242,7 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237279,12 +237280,12 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237325,7 +237326,7 @@ void m68008_device::and_l_pais_dd_ip8() // c0a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237345,7 +237346,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -237382,7 +237383,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237422,7 +237423,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237460,12 +237461,12 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237506,7 +237507,7 @@ void m68008_device::and_l_das_dd_ip8() // c0a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237524,14 +237525,14 @@ void m68008_device::and_l_dais_dd_ip8() // c0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -237539,7 +237540,7 @@ void m68008_device::and_l_dais_dd_ip8() // c0b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -237578,7 +237579,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -237618,7 +237619,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237658,7 +237659,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237696,12 +237697,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237742,7 +237743,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237764,7 +237765,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -237802,7 +237803,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -237842,7 +237843,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -237880,12 +237881,12 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -237926,7 +237927,7 @@ void m68008_device::and_l_adr16_dd_ip8() // c0b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -237946,7 +237947,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -237985,7 +237986,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238023,7 +238024,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -238063,7 +238064,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -238101,12 +238102,12 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238147,7 +238148,7 @@ void m68008_device::and_l_adr32_dd_ip8() // c0b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238166,7 +238167,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_pc;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238203,7 +238204,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238243,7 +238244,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238281,12 +238282,12 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238327,7 +238328,7 @@ void m68008_device::and_l_dpc_dd_ip8() // c0ba f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238344,14 +238345,14 @@ void m68008_device::and_l_dpci_dd_ip8() // c0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_pc + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -238359,7 +238360,7 @@ void m68008_device::and_l_dpci_dd_ip8() // c0bb f1ff
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238398,7 +238399,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238438,7 +238439,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -238478,7 +238479,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238516,12 +238517,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=31:m_dbin d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_and(m_dbin, m_da[rx]);
sr_nzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=alub d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=alub d=16:m_da[rx]
alu_and(m_alub, high16(m_da[rx]));
sr_nzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -238562,7 +238563,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238582,7 +238583,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff
m_aob = m_au;
set_16h(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238621,7 +238622,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff
set_16h(m_at, m_dbin);
set_16l(m_dt, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238660,12 +238661,12 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=9:m_dt d=2:m_da[rx]
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_and(m_dt, m_da[rx]);
sr_nzvc();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=33:m_aluo
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -238700,7 +238701,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=23:m_dt d=16:m_da[rx]
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=23:m_dt d=16:m_da[rx]
alu_and(high16(m_dt), high16(m_da[rx]));
sr_nzvc_u();
m_icount -= 2;
@@ -238709,7 +238710,7 @@ void m68008_device::and_l_imm32_dd_ip8() // c0bc f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -238733,7 +238734,7 @@ void m68008_device::mulu_w_ds_dd_ip8() // c0c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -238781,7 +238782,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238793,7 +238794,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238805,7 +238806,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -238827,7 +238828,7 @@ void m68008_device::mulu_w_ais_dd_ip8() // c0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -238870,7 +238871,7 @@ void m68008_device::mulu_w_ais_dd_ip8() // c0d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -238918,7 +238919,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238930,7 +238931,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -238942,7 +238943,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -238970,7 +238971,7 @@ void m68008_device::mulu_w_aips_dd_ip8() // c0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -239011,7 +239012,7 @@ void m68008_device::mulu_w_aips_dd_ip8() // c0d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239059,7 +239060,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239071,7 +239072,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239083,7 +239084,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239113,7 +239114,7 @@ void m68008_device::mulu_w_pais_dd_ip8() // c0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -239154,7 +239155,7 @@ void m68008_device::mulu_w_pais_dd_ip8() // c0e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239202,7 +239203,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239214,7 +239215,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239226,7 +239227,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239285,7 +239286,7 @@ void m68008_device::mulu_w_das_dd_ip8() // c0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -239328,7 +239329,7 @@ void m68008_device::mulu_w_das_dd_ip8() // c0e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239376,7 +239377,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239388,7 +239389,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239400,7 +239401,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239420,7 +239421,7 @@ void m68008_device::mulu_w_dais_dd_ip8() // c0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -239512,7 +239513,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -239555,7 +239556,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239603,7 +239604,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239615,7 +239616,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239627,7 +239628,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239687,7 +239688,7 @@ void m68008_device::mulu_w_adr16_dd_ip8() // c0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -239728,7 +239729,7 @@ void m68008_device::mulu_w_adr16_dd_ip8() // c0f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239776,7 +239777,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239788,7 +239789,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239800,7 +239801,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -239896,7 +239897,7 @@ void m68008_device::mulu_w_adr32_dd_ip8() // c0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -239937,7 +239938,7 @@ void m68008_device::mulu_w_adr32_dd_ip8() // c0f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -239985,7 +239986,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -239997,7 +239998,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240009,7 +240010,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240067,7 +240068,7 @@ void m68008_device::mulu_w_dpc_dd_ip8() // c0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -240110,7 +240111,7 @@ void m68008_device::mulu_w_dpc_dd_ip8() // c0fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240158,7 +240159,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240170,7 +240171,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240182,7 +240183,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240201,7 +240202,7 @@ void m68008_device::mulu_w_dpci_dd_ip8() // c0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -240293,7 +240294,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -240336,7 +240337,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240384,7 +240385,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240396,7 +240397,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240408,7 +240409,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240472,7 +240473,7 @@ void m68008_device::mulu_w_imm16_dd_ip8() // c0fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -240520,7 +240521,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : m_alue & 2 ? 1 : 2;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32mu(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240532,7 +240533,7 @@ mulm4:
goto mulm4;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -240544,7 +240545,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -240568,12 +240569,12 @@ void m68008_device::abcd_ds_dd_ip8() // c100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_abcd8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 11b rbrb2
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -240637,7 +240638,7 @@ void m68008_device::abcd_pais_paid_ip8() // c108 f1f8
// 135 asbb2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=3 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 136 asbb3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
@@ -240677,12 +240678,12 @@ void m68008_device::abcd_pais_paid_ip8() // c108 f1f8
m_dbin = m_edb;
// 040 asbb5
m_aob = m_pc;
- // alu r=3 c=2 m=xnzvc i=b....i. 23 a=alub d=31:m_dbin
+ // alu r=3 c=2 m=xnzvc i=b....i. ALU.abcd a=alub d=R.dbin:m_dbin
alu_abcd8(m_alub, m_dbin);
sr_xnzvc_u();
// 113 asbb6
m_au = m_at;
- // alu r=3 c=3 m=xnzvc i=b.....f 4 a=33:m_aluo d=?
+ // alu r=3 c=3 m=xnzvc i=b.....f ALU.add a=R.aluo:m_aluo d=?
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -240753,11 +240754,11 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -240777,7 +240778,7 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -240819,7 +240820,7 @@ void m68008_device::and_b_dd_ais_ip8() // c110 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -240854,12 +240855,12 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -240880,7 +240881,7 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -240922,7 +240923,7 @@ void m68008_device::and_b_dd_aips_ip8() // c118 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -240956,7 +240957,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -240964,7 +240965,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -240985,7 +240986,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241027,7 +241028,7 @@ void m68008_device::and_b_dd_pais_ip8() // c120 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 7:
m_mmu8->write_data(m_aob, m_dbout);
@@ -241059,7 +241060,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -241097,11 +241098,11 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -241121,7 +241122,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241163,7 +241164,7 @@ void m68008_device::and_b_dd_das_ip8() // c128 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -241193,14 +241194,14 @@ void m68008_device::and_b_dd_dais_ip8() // c130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -241208,7 +241209,7 @@ void m68008_device::and_b_dd_dais_ip8() // c130 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -241247,7 +241248,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -241288,11 +241289,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob);
@@ -241312,7 +241313,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241354,7 +241355,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -241388,7 +241389,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -241426,7 +241427,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -241447,7 +241448,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241489,7 +241490,7 @@ void m68008_device::and_b_dd_adr16_ip8() // c138 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 11:
m_mmu8->write_data(m_aob, m_dbout);
@@ -241521,7 +241522,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -241560,7 +241561,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=b...... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -241598,7 +241599,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -241619,7 +241620,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=b....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=b....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and8(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241661,7 +241662,7 @@ void m68008_device::and_b_dd_adr32_ip8() // c139 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 15:
m_mmu8->write_data(m_aob, m_dbout);
@@ -241819,11 +241820,11 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -241861,7 +241862,7 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -241903,7 +241904,7 @@ void m68008_device::and_w_dd_ais_ip8() // c150 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -241956,12 +241957,12 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -242000,7 +242001,7 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242042,7 +242043,7 @@ void m68008_device::and_w_dd_aips_ip8() // c158 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -242094,7 +242095,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -242102,7 +242103,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -242141,7 +242142,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242183,7 +242184,7 @@ void m68008_device::and_w_dd_pais_ip8() // c160 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -242233,7 +242234,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -242271,11 +242272,11 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -242313,7 +242314,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242355,7 +242356,7 @@ void m68008_device::and_w_dd_das_ip8() // c168 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -242403,14 +242404,14 @@ void m68008_device::and_w_dd_dais_ip8() // c170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -242418,7 +242419,7 @@ void m68008_device::and_w_dd_dais_ip8() // c170 f1f8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -242457,7 +242458,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -242498,11 +242499,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -242540,7 +242541,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242582,7 +242583,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -242634,7 +242635,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -242672,7 +242673,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -242711,7 +242712,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242753,7 +242754,7 @@ void m68008_device::and_w_dd_adr16_ip8() // c178 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -242803,7 +242804,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -242842,7 +242843,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -242880,7 +242881,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -242919,7 +242920,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.....i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.....i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -242961,7 +242962,7 @@ void m68008_device::and_w_dd_adr32_ip8() // c179 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -243074,7 +243075,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -243114,7 +243115,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -243152,7 +243153,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243192,7 +243193,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243232,7 +243233,7 @@ void m68008_device::and_l_dd_ais_ip8() // c190 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -243282,7 +243283,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -243322,11 +243323,11 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
// 21b pinl3
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -243364,7 +243365,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243404,7 +243405,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243444,7 +243445,7 @@ void m68008_device::and_l_dd_aips_ip8() // c198 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -243493,14 +243494,14 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
m_aob = m_au;
m_da[ry] = m_au;
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -243539,7 +243540,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -243577,7 +243578,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243617,7 +243618,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243657,7 +243658,7 @@ void m68008_device::and_l_dd_pais_ip8() // c1a0 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -243707,7 +243708,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
// 1c6 adsl1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -243744,7 +243745,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -243784,7 +243785,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -243822,7 +243823,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -243862,7 +243863,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -243902,7 +243903,7 @@ void m68008_device::and_l_dd_das_ip8() // c1a8 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -243950,14 +243951,14 @@ void m68008_device::and_l_dd_dais_ip8() // c1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=4 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixw4;
else
@@ -243965,7 +243966,7 @@ void m68008_device::and_l_dd_dais_ip8() // c1b0 f1f8
aixw2:
// 124 aixw2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -244004,7 +244005,7 @@ aixw2:
aixw4:
// 1e4 aixw4
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 25:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -244044,7 +244045,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -244084,7 +244085,7 @@ adsl2:
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -244122,7 +244123,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244162,7 +244163,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244202,7 +244203,7 @@ adsl2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -244254,7 +244255,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -244292,7 +244293,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -244332,7 +244333,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -244370,7 +244371,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244410,7 +244411,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244450,7 +244451,7 @@ void m68008_device::and_l_dd_adr16_ip8() // c1b8 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 21:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -244500,7 +244501,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -244539,7 +244540,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=.l..... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -244577,7 +244578,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -244617,7 +244618,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 13:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -244655,7 +244656,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=4 c=2 m=.nzvc i=.l...i. 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=2 m=.nzvc i=.l...i. ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -244695,7 +244696,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=4 c=3 m=.nzvc i=.l....f 1 a=16:m_da[rx] d=29:m_alue
+ // alu r=4 c=3 m=.nzvc i=.l....f ALU.and_ a=16:m_da[rx] d=R.alue:m_alue
alu_and(high16(m_da[rx]), m_alue);
sr_nzvc_u();
m_base_ssw = SSW_DATA;
@@ -244735,7 +244736,7 @@ void m68008_device::and_l_dd_adr32_ip8() // c1b9 f1ff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=.l..... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -244789,7 +244790,7 @@ void m68008_device::muls_w_ds_dd_ip8() // c1c0 f1f8
m_alue = m_da[ry];
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -244837,7 +244838,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244851,7 +244852,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244863,7 +244864,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -244875,7 +244876,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244892,7 +244893,7 @@ void m68008_device::muls_w_ais_dd_ip8() // c1d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -244935,7 +244936,7 @@ void m68008_device::muls_w_ais_dd_ip8() // c1d0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -244983,7 +244984,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -244997,7 +244998,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245009,7 +245010,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245021,7 +245022,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245044,7 +245045,7 @@ void m68008_device::muls_w_aips_dd_ip8() // c1d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -245085,7 +245086,7 @@ void m68008_device::muls_w_aips_dd_ip8() // c1d8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245133,7 +245134,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245147,7 +245148,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245159,7 +245160,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245171,7 +245172,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245196,7 +245197,7 @@ void m68008_device::muls_w_pais_dd_ip8() // c1e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=alub d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -245237,7 +245238,7 @@ void m68008_device::muls_w_pais_dd_ip8() // c1e0 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245285,7 +245286,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245299,7 +245300,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245311,7 +245312,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245323,7 +245324,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245377,7 +245378,7 @@ void m68008_device::muls_w_das_dd_ip8() // c1e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -245420,7 +245421,7 @@ void m68008_device::muls_w_das_dd_ip8() // c1e8 f1f8
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245468,7 +245469,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245482,7 +245483,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245494,7 +245495,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245506,7 +245507,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245521,7 +245522,7 @@ void m68008_device::muls_w_dais_dd_ip8() // c1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -245613,7 +245614,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -245656,7 +245657,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245704,7 +245705,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245718,7 +245719,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245730,7 +245731,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245742,7 +245743,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245797,7 +245798,7 @@ void m68008_device::muls_w_adr16_dd_ip8() // c1f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -245838,7 +245839,7 @@ void m68008_device::muls_w_adr16_dd_ip8() // c1f8 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -245886,7 +245887,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245900,7 +245901,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -245912,7 +245913,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -245924,7 +245925,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246015,7 +246016,7 @@ void m68008_device::muls_w_adr32_dd_ip8() // c1f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -246056,7 +246057,7 @@ void m68008_device::muls_w_adr32_dd_ip8() // c1f9 f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246104,7 +246105,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246118,7 +246119,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246130,7 +246131,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246142,7 +246143,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246195,7 +246196,7 @@ void m68008_device::muls_w_dpc_dd_ip8() // c1fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246238,7 +246239,7 @@ void m68008_device::muls_w_dpc_dd_ip8() // c1fa f1ff
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246286,7 +246287,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246300,7 +246301,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246312,7 +246313,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246324,7 +246325,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246338,7 +246339,7 @@ void m68008_device::muls_w_dpci_dd_ip8() // c1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=7 c=5 m=..... i=.lm.... 5 a=31:m_dbin d=0
+ // alu r=7 c=5 m=..... i=.lm.... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -246430,7 +246431,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=7 c=1 m=..... i=.lm.... 1 a=31:m_dbin d=-1
+ // alu r=7 c=1 m=..... i=.lm.... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246473,7 +246474,7 @@ adsw2:
m_alue = m_dbin;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246521,7 +246522,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246535,7 +246536,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246547,7 +246548,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246559,7 +246560,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246618,7 +246619,7 @@ void m68008_device::muls_w_imm16_dd_ip8() // c1fc f1ff
m_alue = m_dt;
m_at = m_au;
m_au = ext32(m_ftu);
- // alu r=7 c=1 m=.nzvc i=.lm..i. 1 a=2:m_da[rx] d=0
+ // alu r=7 c=1 m=.nzvc i=.lm..i. ALU.and_ a=R.dxl:m_da[rx] d=0
alu_and(m_da[rx], 0x0000);
sr_nzvc();
// 3c4 mulm2
@@ -246666,7 +246667,7 @@ mulm4:
m_t = !(m_au & 0x3f) ? 0 : (m_alue & 3) == 1 ? 1 : (m_alue & 3) == 2 ? 2 : 3;
set_16l(m_pc, m_at);
m_au = m_au - 1;
- // alu r=7 c=4 m=.nzvc i=.lm...f 20 a=33:m_aluo d=-1
+ // alu r=7 c=4 m=.nzvc i=.lm...f ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32ms(m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246680,7 +246681,7 @@ mulm4:
goto mulm4;
mulm5:
// 0a0 mulm5
- // alu r=7 c=2 m=.nzvc i=.lm...f 2 a=alub d=33:m_aluo
+ // alu r=7 c=2 m=.nzvc i=.lm...f ALU.sub a=alub d=R.aluo:m_aluo
alu_sub(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246692,7 +246693,7 @@ mulm6:
set_16h(m_pc, high16(m_at));
m_da[rx] = merge_16_32(m_aluo, m_alue);
m_au = m_at + 2;
- // alu r=7 c=1 m=.nzvc i=.lm...f 1 a=33:m_aluo d=-1
+ // alu r=7 c=1 m=.nzvc i=.lm...f ALU.and_ a=R.aluo:m_aluo d=-1
alu_and(m_aluo, 0xffff);
sr_nzvc_u();
set_ftu_const();
@@ -246704,7 +246705,7 @@ mulm6:
return;
mulm3:
// 060 mulm3
- // alu r=7 c=3 m=.nzvc i=.lm...f 4 a=alub d=33:m_aluo
+ // alu r=7 c=3 m=.nzvc i=.lm...f ALU.add a=alub d=R.aluo:m_aluo
alu_add(m_alub, m_aluo);
sr_nzvc_u();
m_icount -= 2;
@@ -246723,7 +246724,7 @@ void m68008_device::add_b_ds_dd_ip8() // d000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add8(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246782,7 +246783,7 @@ void m68008_device::add_b_ais_dd_ip8() // d010 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -246805,7 +246806,7 @@ void m68008_device::add_b_ais_dd_ip8() // d010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246870,7 +246871,7 @@ void m68008_device::add_b_aips_dd_ip8() // d018 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -246891,7 +246892,7 @@ void m68008_device::add_b_aips_dd_ip8() // d018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -246958,7 +246959,7 @@ void m68008_device::add_b_pais_dd_ip8() // d020 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -246979,7 +246980,7 @@ void m68008_device::add_b_pais_dd_ip8() // d020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247075,7 +247076,7 @@ void m68008_device::add_b_das_dd_ip8() // d028 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247098,7 +247099,7 @@ void m68008_device::add_b_das_dd_ip8() // d028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247155,7 +247156,7 @@ void m68008_device::add_b_dais_dd_ip8() // d030 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -247247,7 +247248,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247270,7 +247271,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247367,7 +247368,7 @@ void m68008_device::add_b_adr16_dd_ip8() // d038 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -247388,7 +247389,7 @@ void m68008_device::add_b_adr16_dd_ip8() // d038 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247521,7 +247522,7 @@ void m68008_device::add_b_adr32_dd_ip8() // d039 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -247542,7 +247543,7 @@ void m68008_device::add_b_adr32_dd_ip8() // d039 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247637,7 +247638,7 @@ void m68008_device::add_b_dpc_dd_ip8() // d03a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247660,7 +247661,7 @@ void m68008_device::add_b_dpc_dd_ip8() // d03a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247716,7 +247717,7 @@ void m68008_device::add_b_dpci_dd_ip8() // d03b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -247808,7 +247809,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -247831,7 +247832,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add8(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247930,7 +247931,7 @@ void m68008_device::add_b_imm8_dd_ip8() // d03c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add8(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -247991,7 +247992,7 @@ void m68008_device::add_w_ds_dd_ip8() // d040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248052,7 +248053,7 @@ void m68008_device::add_w_as_dd_ip8() // d048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248111,7 +248112,7 @@ void m68008_device::add_w_ais_dd_ip8() // d050 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248152,7 +248153,7 @@ void m68008_device::add_w_ais_dd_ip8() // d050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248217,7 +248218,7 @@ void m68008_device::add_w_aips_dd_ip8() // d058 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -248256,7 +248257,7 @@ void m68008_device::add_w_aips_dd_ip8() // d058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248323,7 +248324,7 @@ void m68008_device::add_w_pais_dd_ip8() // d060 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -248362,7 +248363,7 @@ void m68008_device::add_w_pais_dd_ip8() // d060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248458,7 +248459,7 @@ void m68008_device::add_w_das_dd_ip8() // d068 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248499,7 +248500,7 @@ void m68008_device::add_w_das_dd_ip8() // d068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248556,7 +248557,7 @@ void m68008_device::add_w_dais_dd_ip8() // d070 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -248648,7 +248649,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -248689,7 +248690,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248786,7 +248787,7 @@ void m68008_device::add_w_adr16_dd_ip8() // d078 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -248825,7 +248826,7 @@ void m68008_device::add_w_adr16_dd_ip8() // d078 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -248958,7 +248959,7 @@ void m68008_device::add_w_adr32_dd_ip8() // d079 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -248997,7 +248998,7 @@ void m68008_device::add_w_adr32_dd_ip8() // d079 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249092,7 +249093,7 @@ void m68008_device::add_w_dpc_dd_ip8() // d07a f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -249133,7 +249134,7 @@ void m68008_device::add_w_dpc_dd_ip8() // d07a f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249189,7 +249190,7 @@ void m68008_device::add_w_dpci_dd_ip8() // d07b f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -249281,7 +249282,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -249322,7 +249323,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249421,7 +249422,7 @@ void m68008_device::add_w_imm16_dd_ip8() // d07c f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 27a rrgw2
@@ -249482,7 +249483,7 @@ void m68008_device::add_l_ds_dd_ip8() // d080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -249521,7 +249522,7 @@ void m68008_device::add_l_ds_dd_ip8() // d080 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=18:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -249551,7 +249552,7 @@ void m68008_device::add_l_as_dd_ip8() // d088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=3:m_da[ry] d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.ayl:m_da[ry] d=R.dxl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -249590,7 +249591,7 @@ void m68008_device::add_l_as_dd_ip8() // d088 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=17:m_da[ry] d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=17:m_da[ry] d=16:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -249618,7 +249619,7 @@ void m68008_device::add_l_ais_dd_ip8() // d090 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -249695,12 +249696,12 @@ void m68008_device::add_l_ais_dd_ip8() // d090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -249760,7 +249761,7 @@ void m68008_device::add_l_aips_dd_ip8() // d098 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -249840,12 +249841,12 @@ void m68008_device::add_l_aips_dd_ip8() // d098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -249904,7 +249905,7 @@ void m68008_device::add_l_pais_dd_ip8() // d0a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -249986,12 +249987,12 @@ void m68008_device::add_l_pais_dd_ip8() // d0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250087,7 +250088,7 @@ void m68008_device::add_l_das_dd_ip8() // d0a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250164,12 +250165,12 @@ void m68008_device::add_l_das_dd_ip8() // d0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250227,7 +250228,7 @@ void m68008_device::add_l_dais_dd_ip8() // d0b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -250318,7 +250319,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250395,12 +250396,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250498,7 +250499,7 @@ void m68008_device::add_l_adr16_dd_ip8() // d0b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -250575,12 +250576,12 @@ void m68008_device::add_l_adr16_dd_ip8() // d0b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250714,7 +250715,7 @@ void m68008_device::add_l_adr32_dd_ip8() // d0b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -250791,12 +250792,12 @@ void m68008_device::add_l_adr32_dd_ip8() // d0b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -250891,7 +250892,7 @@ void m68008_device::add_l_dpc_dd_ip8() // d0ba f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -250968,12 +250969,12 @@ void m68008_device::add_l_dpc_dd_ip8() // d0ba f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -251030,7 +251031,7 @@ void m68008_device::add_l_dpci_dd_ip8() // d0bb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -251121,7 +251122,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -251198,12 +251199,12 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=31:m_dbin d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dbin:m_dbin d=R.dxl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
sr_xnzvc();
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=alub d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=alub d=16:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -251339,7 +251340,7 @@ void m68008_device::add_l_imm32_dd_ip8() // d0bc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=9:m_dt d=2:m_da[rx]
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dtl:m_dt d=R.dxl:m_da[rx]
alu_add(m_dt, m_da[rx]);
sr_xnzvc();
// 3c0 rorl2
@@ -251378,7 +251379,7 @@ void m68008_device::add_l_imm32_dd_ip8() // d0bc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=23:m_dt d=16:m_da[rx]
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=23:m_dt d=16:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -251408,7 +251409,7 @@ void m68008_device::adda_w_ds_ad_ip8() // d0c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251446,7 +251447,7 @@ void m68008_device::adda_w_ds_ad_ip8() // d0c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251475,7 +251476,7 @@ void m68008_device::adda_w_as_ad_ip8() // d0c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251513,7 +251514,7 @@ void m68008_device::adda_w_as_ad_ip8() // d0c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251540,7 +251541,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -251581,7 +251582,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251619,7 +251620,7 @@ void m68008_device::adda_w_ais_ad_ip8() // d0d0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251652,7 +251653,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -251691,7 +251692,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251729,7 +251730,7 @@ void m68008_device::adda_w_aips_ad_ip8() // d0d8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251764,7 +251765,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -251803,7 +251804,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251841,7 +251842,7 @@ void m68008_device::adda_w_pais_ad_ip8() // d0e0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -251905,7 +251906,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -251946,7 +251947,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -251984,7 +251985,7 @@ void m68008_device::adda_w_das_ad_ip8() // d0e8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252009,7 +252010,7 @@ void m68008_device::adda_w_dais_ad_ip8() // d0f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -252101,7 +252102,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252142,7 +252143,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252180,7 +252181,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252245,7 +252246,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -252284,7 +252285,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252322,7 +252323,7 @@ void m68008_device::adda_w_adr16_ad_ip8() // d0f8 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252423,7 +252424,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -252462,7 +252463,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252500,7 +252501,7 @@ void m68008_device::adda_w_adr32_ad_ip8() // d0f9 f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252563,7 +252564,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252604,7 +252605,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252642,7 +252643,7 @@ void m68008_device::adda_w_dpc_ad_ip8() // d0fa f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252666,7 +252667,7 @@ void m68008_device::adda_w_dpci_ad_ip8() // d0fb f1ff
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -252758,7 +252759,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = 0;
@@ -252799,7 +252800,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252837,7 +252838,7 @@ adsw2:
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252904,7 +252905,7 @@ void m68008_device::adda_w_imm16_ad_ip8() // d0fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c8 rorm2
set_16l(m_da[rx], m_aluo);
@@ -252942,7 +252943,7 @@ void m68008_device::adda_w_imm16_ad_ip8() // d0fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25f rorm3
- // alu r=2 c=3 m=..... i=......f 11 a=25:m_at d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=R.ath:m_at d=15:m_da[rx]
alu_addc(high16(m_at), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -252971,7 +252972,7 @@ void m68008_device::addx_b_ds_dd_ip8() // d100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx8(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -252979,7 +252980,7 @@ void m68008_device::addx_b_ds_dd_ip8() // d100 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -253033,16 +253034,16 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - (ry < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - (rx < 15 ? 1 : 2);
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob);
@@ -253063,7 +253064,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 3:
m_edb = m_mmu8->read_data(m_aob);
@@ -253081,7 +253082,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=b....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=b....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx8(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253123,7 +253124,7 @@ void m68008_device::addx_b_pais_paid_ip8() // d108 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8xl(m_dbout, m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=b...... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=b...... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob, m_dbout);
@@ -253155,7 +253156,7 @@ void m68008_device::add_b_dd_ais_ip8() // d110 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253178,7 +253179,7 @@ void m68008_device::add_b_dd_ais_ip8() // d110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253257,7 +253258,7 @@ void m68008_device::add_b_dd_aips_ip8() // d118 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -253278,7 +253279,7 @@ void m68008_device::add_b_dd_aips_ip8() // d118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253359,7 +253360,7 @@ void m68008_device::add_b_dd_pais_ip8() // d120 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=b...... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=alub d=-1
alu_and8(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -253380,7 +253381,7 @@ void m68008_device::add_b_dd_pais_ip8() // d120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253490,7 +253491,7 @@ void m68008_device::add_b_dd_das_ip8() // d128 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253513,7 +253514,7 @@ void m68008_device::add_b_dd_das_ip8() // d128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253584,7 +253585,7 @@ void m68008_device::add_b_dd_dais_ip8() // d130 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=b...... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=b...... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -253676,7 +253677,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -253699,7 +253700,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253810,7 +253811,7 @@ void m68008_device::add_b_dd_adr16_ip8() // d138 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -253831,7 +253832,7 @@ void m68008_device::add_b_dd_adr16_ip8() // d138 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -253978,7 +253979,7 @@ void m68008_device::add_b_dd_adr32_ip8() // d139 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=b...... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and8(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -253999,7 +254000,7 @@ void m68008_device::add_b_dd_adr32_ip8() // d139 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=b....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=b....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add8(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254074,7 +254075,7 @@ void m68008_device::addx_w_ds_dd_ip8() // d140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 27a rrgw2
@@ -254082,7 +254083,7 @@ void m68008_device::addx_w_ds_dd_ip8() // d140 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=R.aluo:m_aluo d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -254136,16 +254137,16 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 131 asxw2
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 132 asxw3
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -254184,7 +254185,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8
m_alub = m_dbin;
m_at = m_au;
m_da[rx] = m_au;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -254220,7 +254221,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8
// 065 asxw5
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=2 m=xnzvc i=.....i. 12 a=alub d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.....i. ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254262,7 +254263,7 @@ void m68008_device::addx_w_pais_paid_ip8() // d148 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=....... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=....... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -254312,7 +254313,7 @@ void m68008_device::add_w_dd_ais_ip8() // d150 f1f8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -254353,7 +254354,7 @@ void m68008_device::add_w_dd_ais_ip8() // d150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254450,7 +254451,7 @@ void m68008_device::add_w_dd_aips_ip8() // d158 f1f8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -254489,7 +254490,7 @@ void m68008_device::add_w_dd_aips_ip8() // d158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254588,7 +254589,7 @@ void m68008_device::add_w_dd_pais_ip8() // d160 f1f8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -254627,7 +254628,7 @@ void m68008_device::add_w_dd_pais_ip8() // d160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254755,7 +254756,7 @@ void m68008_device::add_w_dd_das_ip8() // d168 f1f8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -254796,7 +254797,7 @@ void m68008_device::add_w_dd_das_ip8() // d168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -254885,7 +254886,7 @@ void m68008_device::add_w_dd_dais_ip8() // d170 f1f8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -254977,7 +254978,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -255018,7 +255019,7 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255147,7 +255148,7 @@ void m68008_device::add_w_dd_adr16_ip8() // d178 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -255186,7 +255187,7 @@ void m68008_device::add_w_dd_adr16_ip8() // d178 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255351,7 +255352,7 @@ void m68008_device::add_w_dd_adr32_ip8() // d179 f1ff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -255390,7 +255391,7 @@ void m68008_device::add_w_dd_adr32_ip8() // d179 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.....i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.....i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255483,12 +255484,12 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=4:m_da[ry] d=2:m_da[rx]
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.dyl:m_da[ry] d=R.dxl:m_da[rx]
alu_addx(m_da[ry], m_da[rx]);
sr_xnzvc_u();
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=33:m_aluo
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.aluo:m_aluo
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -255523,7 +255524,7 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=18:m_da[ry] d=16:m_da[rx]
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=18:m_da[ry] d=16:m_da[rx]
alu_addx(high16(m_da[ry]), high16(m_da[rx]));
sr_xnzvc_u();
m_icount -= 2;
@@ -255532,7 +255533,7 @@ void m68008_device::addx_l_ds_dd_ip8() // d180 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16h(m_da[rx], m_aluo);
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=33:m_aluo d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -255554,13 +255555,13 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
m_pc = m_au;
m_dcr = 0;
m_au = m_da[ry] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_icount -= 2;
// 048 asxl2
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -255596,11 +255597,11 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
// 139 asxl3
m_aob = m_au;
m_da[ry] = m_au;
- // alu r=12 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=12 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 13a asxl4
m_au = m_da[rx] - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -255637,7 +255638,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
m_aob = m_au;
m_alub = m_dbin;
m_au = m_au - 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=31:m_dbin d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=R.dbin:m_dbin d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -255675,7 +255676,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
m_at = m_au;
m_da[rx] = m_au;
m_au = m_au + 2;
- // alu r=12 c=2 m=xnzvc i=.l...i. 12 a=33:m_aluo d=31:m_dbin
+ // alu r=12 c=2 m=xnzvc i=.l...i. ALU.addx a=R.aluo:m_aluo d=R.dbin:m_dbin
alu_addx(m_aluo, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_DATA | SSW_R;
@@ -255715,7 +255716,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
m_ir = m_irc;
m_dbout = m_aluo;
m_au = ext32(m_dbin);
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=31:m_dbin
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=R.dbin:m_dbin
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -255750,7 +255751,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
// 062 asxl8
m_aob = m_pc;
m_au = m_at;
- // alu r=12 c=3 m=xnzvc i=.l....f 12 a=alub d=31:m_dbin
+ // alu r=12 c=3 m=xnzvc i=.l....f ALU.addx a=alub d=R.dbin:m_dbin
alu_addx(m_alub, m_dbin);
sr_xnzvc_u();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255792,7 +255793,7 @@ void m68008_device::addx_l_pais_paid_ip8() // d188 f1f8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=12 c=0 m=..... i=.l..... 12 a=none d=none
+ // alu r=12 c=0 m=..... i=.l..... ALU.addx a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 25:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -255842,7 +255843,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -255919,7 +255920,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -255959,7 +255960,7 @@ void m68008_device::add_l_dd_ais_ip8() // d190 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256048,7 +256049,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -256128,7 +256129,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256168,7 +256169,7 @@ void m68008_device::add_l_dd_aips_ip8() // d198 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256256,7 +256257,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -256338,7 +256339,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256378,7 +256379,7 @@ void m68008_device::add_l_dd_pais_ip8() // d1a0 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256503,7 +256504,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -256580,7 +256581,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256620,7 +256621,7 @@ void m68008_device::add_l_dd_das_ip8() // d1a8 f1f8
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -256707,7 +256708,7 @@ void m68008_device::add_l_dd_dais_ip8() // d1b0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=.l..... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=.l..... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -256798,7 +256799,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -256875,7 +256876,7 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -256915,7 +256916,7 @@ adsl2:
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257042,7 +257043,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -257119,7 +257120,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -257159,7 +257160,7 @@ void m68008_device::add_l_dd_adr16_ip8() // d1b8 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257322,7 +257323,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=.l..... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -257399,7 +257400,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_au = m_at;
- // alu r=2 c=2 m=xnzvc i=.l...i. 4 a=2:m_da[rx] d=31:m_dbin
+ // alu r=2 c=2 m=xnzvc i=.l...i. ALU.add a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_add(m_da[rx], m_dbin);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -257439,7 +257440,7 @@ void m68008_device::add_l_dd_adr32_ip8() // d1b9 f1ff
m_aob = m_au;
m_dbout = m_aluo;
m_au = m_au - 2;
- // alu r=2 c=3 m=xnzvc i=.l....f 11 a=16:m_da[rx] d=29:m_alue
+ // alu r=2 c=3 m=xnzvc i=.l....f ALU.addc a=16:m_da[rx] d=R.alue:m_alue
alu_addc(high16(m_da[rx]), m_alue);
sr_xnzvc_u();
m_base_ssw = SSW_DATA;
@@ -257530,7 +257531,7 @@ void m68008_device::adda_l_ds_ad_ip8() // d1c0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=4:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dyl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -257568,7 +257569,7 @@ void m68008_device::adda_l_ds_ad_ip8() // d1c0 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=18:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=18:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -257597,7 +257598,7 @@ void m68008_device::adda_l_as_ad_ip8() // d1c8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_da[ry]);
- // alu r=2 c=2 m=..... i=.....i. 4 a=3:m_da[ry] d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.ayl:m_da[ry] d=R.axl:m_da[rx]
alu_add(m_da[ry], m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -257635,7 +257636,7 @@ void m68008_device::adda_l_as_ad_ip8() // d1c8 f1f8
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=17:m_da[ry] d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=17:m_da[ry] d=15:m_da[rx]
alu_addc(high16(m_da[ry]), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -257662,7 +257663,7 @@ void m68008_device::adda_l_ais_ad_ip8() // d1d0 f1f8
// 00b adrl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -257739,11 +257740,11 @@ void m68008_device::adda_l_ais_ad_ip8() // d1d0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -257802,7 +257803,7 @@ void m68008_device::adda_l_aips_ad_ip8() // d1d8 f1f8
// 00f pinl1
m_aob = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -257882,11 +257883,11 @@ void m68008_device::adda_l_aips_ad_ip8() // d1d8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -257944,7 +257945,7 @@ void m68008_device::adda_l_pais_ad_ip8() // d1e0 f1f8
case 0:
// 179 pdcl1
m_au = m_da[ry] - 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_icount -= 2;
// 17a pdcl2
@@ -258026,11 +258027,11 @@ void m68008_device::adda_l_pais_ad_ip8() // d1e0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 9:
@@ -258125,7 +258126,7 @@ void m68008_device::adda_l_das_ad_ip8() // d1e8 f1f8
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258202,11 +258203,11 @@ void m68008_device::adda_l_das_ad_ip8() // d1e8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258263,7 +258264,7 @@ void m68008_device::adda_l_dais_ad_ip8() // d1f0 f1f8
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -258354,7 +258355,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258431,11 +258432,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258532,7 +258533,7 @@ void m68008_device::adda_l_adr16_ad_ip8() // d1f8 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -258609,11 +258610,11 @@ void m68008_device::adda_l_adr16_ad_ip8() // d1f8 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -258746,7 +258747,7 @@ void m68008_device::adda_l_adr32_ad_ip8() // d1f9 f1ff
// 008 ablw3
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -258823,11 +258824,11 @@ void m68008_device::adda_l_adr32_ad_ip8() // d1f9 f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
@@ -258921,7 +258922,7 @@ void m68008_device::adda_l_dpc_ad_ip8() // d1fa f1ff
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -258998,11 +258999,11 @@ void m68008_device::adda_l_dpc_ad_ip8() // d1fa f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -259058,7 +259059,7 @@ void m68008_device::adda_l_dpci_ad_ip8() // d1fb f1ff
switch(m_inst_substate) {
case 0:
// 1e7 aixw0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e6 aixw1
@@ -259149,7 +259150,7 @@ adsl2:
// 00c adsl2
m_aob = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -259226,11 +259227,11 @@ adsl2:
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dbin);
- // alu r=2 c=2 m=..... i=.....i. 4 a=31:m_dbin d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dbin:m_dbin d=R.axl:m_da[rx]
alu_add(m_dbin, m_da[rx]);
// 25c roml2
set_16l(m_da[rx], m_aluo);
- // alu r=2 c=3 m=..... i=......f 11 a=alub d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=alub d=15:m_da[rx]
alu_addc(m_alub, high16(m_da[rx]));
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 13:
@@ -259365,7 +259366,7 @@ void m68008_device::adda_l_imm32_ad_ip8() // d1fc f1ff
m_ir = m_irc;
m_pc = m_au;
m_at = ext32(m_dt);
- // alu r=2 c=2 m=..... i=.....i. 4 a=9:m_dt d=1:m_da[rx]
+ // alu r=2 c=2 m=..... i=.....i. ALU.add a=R.dtl:m_dt d=R.axl:m_da[rx]
alu_add(m_dt, m_da[rx]);
// 3c0 rorl2
set_16l(m_da[rx], m_aluo);
@@ -259403,7 +259404,7 @@ void m68008_device::adda_l_imm32_ad_ip8() // d1fc f1ff
m_irc = m_edb;
m_dbin = m_edb;
// 25e rorl3
- // alu r=2 c=3 m=..... i=......f 11 a=23:m_dt d=15:m_da[rx]
+ // alu r=2 c=3 m=..... i=......f ALU.addc a=23:m_dt d=15:m_da[rx]
alu_addc(high16(m_dt), high16(m_da[rx]));
m_icount -= 2;
// 25d roml3
@@ -259431,13 +259432,13 @@ void m68008_device::asr_b_imm3_ds_ip8() // e000 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259481,7 +259482,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259515,13 +259516,13 @@ void m68008_device::lsr_b_imm3_ds_ip8() // e008 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259565,7 +259566,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259599,13 +259600,13 @@ void m68008_device::roxr_b_imm3_ds_ip8() // e010 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259649,7 +259650,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259683,13 +259684,13 @@ void m68008_device::ror_b_imm3_ds_ip8() // e018 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259733,7 +259734,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -259768,13 +259769,13 @@ void m68008_device::asr_b_dd_ds_ip8() // e020 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259818,7 +259819,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=b....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=b....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259853,13 +259854,13 @@ void m68008_device::lsr_b_dd_ds_ip8() // e028 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259903,7 +259904,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=b....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=b....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -259938,13 +259939,13 @@ void m68008_device::roxr_b_dd_ds_ip8() // e030 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -259988,7 +259989,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=b....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=b....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260023,13 +260024,13 @@ void m68008_device::ror_b_dd_ds_ip8() // e038 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260073,7 +260074,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=b....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=b....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260107,13 +260108,13 @@ void m68008_device::asr_w_imm3_ds_ip8() // e040 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260157,7 +260158,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260191,13 +260192,13 @@ void m68008_device::lsr_w_imm3_ds_ip8() // e048 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260241,7 +260242,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260275,13 +260276,13 @@ void m68008_device::roxr_w_imm3_ds_ip8() // e050 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260325,7 +260326,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260359,13 +260360,13 @@ void m68008_device::ror_w_imm3_ds_ip8() // e058 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260409,7 +260410,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260444,13 +260445,13 @@ void m68008_device::asr_w_dd_ds_ip8() // e060 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260494,7 +260495,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260529,13 +260530,13 @@ void m68008_device::lsr_w_dd_ds_ip8() // e068 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260579,7 +260580,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260614,13 +260615,13 @@ void m68008_device::roxr_w_dd_ds_ip8() // e070 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260664,7 +260665,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260699,13 +260700,13 @@ void m68008_device::ror_w_dd_ds_ip8() // e078 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260749,7 +260750,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -260783,13 +260784,13 @@ void m68008_device::asr_l_imm3_ds_ip8() // e080 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260833,7 +260834,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260850,7 +260851,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -260873,13 +260874,13 @@ void m68008_device::lsr_l_imm3_ds_ip8() // e088 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -260923,7 +260924,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -260940,7 +260941,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -260963,13 +260964,13 @@ void m68008_device::roxr_l_imm3_ds_ip8() // e090 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261013,7 +261014,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261030,7 +261031,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261053,13 +261054,13 @@ void m68008_device::ror_l_imm3_ds_ip8() // e098 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261103,7 +261104,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -261120,7 +261121,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261144,13 +261145,13 @@ void m68008_device::asr_l_dd_ds_ip8() // e0a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=2 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=2 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=2 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=2 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261194,7 +261195,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=2 c=4 m=xnzvc i=.l...i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.l...i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261211,7 +261212,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=2 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=2 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261235,13 +261236,13 @@ void m68008_device::lsr_l_dd_ds_ip8() // e0a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=5 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=5 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=5 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=5 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261285,7 +261286,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=5 c=4 m=xnzvc i=.l...i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.l...i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261302,7 +261303,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=5 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=5 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261326,13 +261327,13 @@ void m68008_device::roxr_l_dd_ds_ip8() // e0b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=8 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=8 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=8 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=8 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261376,7 +261377,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=8 c=4 m=xnzvc i=.l...i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.l...i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -261393,7 +261394,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=8 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=8 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261417,13 +261418,13 @@ void m68008_device::ror_l_dd_ds_ip8() // e0b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=10 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=10 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=10 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=10 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261467,7 +261468,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=10 c=4 m=.nzvc i=.l...i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.l...i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -261484,7 +261485,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=10 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=10 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -261506,7 +261507,7 @@ void m68008_device::asr_ais_ip8() // e0d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -261547,12 +261548,12 @@ void m68008_device::asr_ais_ip8() // e0d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261649,7 +261650,7 @@ void m68008_device::asr_aips_ip8() // e0d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -261688,12 +261689,12 @@ void m68008_device::asr_aips_ip8() // e0d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261792,7 +261793,7 @@ void m68008_device::asr_pais_ip8() // e0e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=2 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -261831,12 +261832,12 @@ void m68008_device::asr_pais_ip8() // e0e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -261964,7 +261965,7 @@ void m68008_device::asr_das_ip8() // e0e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -262005,12 +262006,12 @@ void m68008_device::asr_das_ip8() // e0e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262099,7 +262100,7 @@ void m68008_device::asr_dais_ip8() // e0f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=2 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=2 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -262191,7 +262192,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -262232,12 +262233,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262366,7 +262367,7 @@ void m68008_device::asr_adr16_ip8() // e0f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -262405,12 +262406,12 @@ void m68008_device::asr_adr16_ip8() // e0f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262575,7 +262576,7 @@ void m68008_device::asr_adr32_ip8() // e0f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=2 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -262614,12 +262615,12 @@ void m68008_device::asr_adr32_ip8() // e0f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=2 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=2 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=2 c=4 m=xnzvc i=.....i. 14 a=33:m_aluo d=-1
+ // alu r=2 c=4 m=xnzvc i=.....i. ALU.asr a=R.aluo:m_aluo d=-1
alu_asr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262711,13 +262712,13 @@ void m68008_device::asl_b_imm3_ds_ip8() // e100 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262761,7 +262762,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262795,13 +262796,13 @@ void m68008_device::lsl_b_imm3_ds_ip8() // e108 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262845,7 +262846,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262859,7 +262860,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -262880,13 +262881,13 @@ void m68008_device::roxl_b_imm3_ds_ip8() // e110 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -262930,7 +262931,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -262964,13 +262965,13 @@ void m68008_device::rol_b_imm3_ds_ip8() // e118 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263014,7 +263015,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263049,13 +263050,13 @@ void m68008_device::asl_b_dd_ds_ip8() // e120 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263099,7 +263100,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=b....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=b....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263134,13 +263135,13 @@ void m68008_device::lsl_b_dd_ds_ip8() // e128 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263184,7 +263185,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=b....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=b....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263198,7 +263199,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_8(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=b...... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=b...... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263220,13 +263221,13 @@ void m68008_device::roxl_b_dd_ds_ip8() // e130 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=b...r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=b...r.. ALU.and_ a=18:m_da[ry] d=-1
alu_and8x(high16(m_da[ry]), 0xff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=b...ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=b...ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8x(m_da[ry], 0xff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263270,7 +263271,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=b....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=b....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl8(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263305,13 +263306,13 @@ void m68008_device::rol_b_dd_ds_ip8() // e138 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=b...... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=b...... ALU.and_ a=18:m_da[ry] d=-1
alu_and8(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=b....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=b....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and8(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263355,7 +263356,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=b....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=b....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol8(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263389,13 +263390,13 @@ void m68008_device::asl_w_imm3_ds_ip8() // e140 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263439,7 +263440,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263473,13 +263474,13 @@ void m68008_device::lsl_w_imm3_ds_ip8() // e148 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263523,7 +263524,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263537,7 +263538,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263558,13 +263559,13 @@ void m68008_device::roxl_w_imm3_ds_ip8() // e150 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263608,7 +263609,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263642,13 +263643,13 @@ void m68008_device::rol_w_imm3_ds_ip8() // e158 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263692,7 +263693,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -263727,13 +263728,13 @@ void m68008_device::asl_w_dd_ds_ip8() // e160 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263777,7 +263778,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263812,13 +263813,13 @@ void m68008_device::lsl_w_dd_ds_ip8() // e168 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263862,7 +263863,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263876,7 +263877,7 @@ nbcr3:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
set_16l(m_da[ry], m_aluo);
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
set_ftu_const();
m_icount -= 2;
m_inst_state = m_next_state ? m_next_state : m_decode_table[m_ird];
@@ -263898,13 +263899,13 @@ void m68008_device::roxl_w_dd_ds_ip8() // e170 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=....r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -263948,7 +263949,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -263983,13 +263984,13 @@ void m68008_device::rol_w_dd_ds_ip8() // e178 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=....... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 383 srrw2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264033,7 +264034,7 @@ srrw3:
// 2d3 srrw3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264067,13 +264068,13 @@ void m68008_device::asl_l_imm3_ds_ip8() // e180 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264117,7 +264118,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264134,7 +264135,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264157,13 +264158,13 @@ void m68008_device::lsl_l_imm3_ds_ip8() // e188 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264207,7 +264208,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264219,14 +264220,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264249,13 +264250,13 @@ void m68008_device::roxl_l_imm3_ds_ip8() // e190 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264299,7 +264300,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264316,7 +264317,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264339,13 +264340,13 @@ void m68008_device::rol_l_imm3_ds_ip8() // e198 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_ftu);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264389,7 +264390,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264406,7 +264407,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264430,13 +264431,13 @@ void m68008_device::asl_l_dd_ds_ip8() // e1a0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=3 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=3 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=3 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=3 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264480,7 +264481,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=3 c=4 m=xnzvc i=.l...i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.l...i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264497,7 +264498,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=3 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=3 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264521,13 +264522,13 @@ void m68008_device::lsl_l_dd_ds_ip8() // e1a8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=4 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=4 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=4 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=4 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264571,7 +264572,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=4 c=4 m=xnzvc i=.l...i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.l...i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264583,14 +264584,14 @@ srrl4:
// 257 srrl4
m_alub = m_alue;
m_da[ry] = merge_16_32(m_alue, m_aluo);
- // alu r=4 c=0 m=..... i=.l..... 1 a=33:m_aluo d=29:m_alue
+ // alu r=4 c=0 m=..... i=.l..... ALU.and_ a=R.aluo:m_aluo d=R.alue:m_alue
alu_and(m_aluo, m_alue);
m_icount -= 2;
// 306 srrl5
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=4 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=4 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264614,13 +264615,13 @@ void m68008_device::roxl_l_dd_ds_ip8() // e1b0 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=11 c=1 m=..... i=.l..r.. 1 a=18:m_da[ry] d=-1
+ // alu r=11 c=1 m=..... i=.l..r.. ALU.and_ a=18:m_da[ry] d=-1
alu_andx(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=11 c=1 m=.nzvc i=.l..ri. 1 a=4:m_da[ry] d=-1
+ // alu r=11 c=1 m=.nzvc i=.l..ri. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_andx(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264664,7 +264665,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=11 c=4 m=xnzvc i=.l...i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.l...i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl32(m_aluo);
sr_xnzvc();
m_icount -= 2;
@@ -264681,7 +264682,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=11 c=1 m=.nz.. i=.l..r.f 1 a=alub d=-1
+ // alu r=11 c=1 m=.nz.. i=.l..r.f ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264705,13 +264706,13 @@ void m68008_device::rol_l_dd_ds_ip8() // e1b8 f1f8
m_ir = m_irc;
m_pc = m_au;
m_au = ext32(m_da[rx]);
- // alu r=9 c=1 m=..... i=.l..... 1 a=18:m_da[ry] d=-1
+ // alu r=9 c=1 m=..... i=.l..... ALU.and_ a=18:m_da[ry] d=-1
alu_and(high16(m_da[ry]), 0xffff);
// 387 srrl2
m_t = !(m_au & 0x3f);
m_alue = m_aluo;
m_au = m_au - 1;
- // alu r=9 c=1 m=.nzvc i=.l...i. 1 a=4:m_da[ry] d=-1
+ // alu r=9 c=1 m=.nzvc i=.l...i. ALU.and_ a=R.dyl:m_da[ry] d=-1
alu_and(m_da[ry], 0xffff);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264755,7 +264756,7 @@ srrl3:
// 2d7 srrl3
m_t = !(m_au & 0x3f);
m_au = m_au - 1;
- // alu r=9 c=4 m=.nzvc i=.l...i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.l...i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol32(m_aluo);
sr_nzvc();
m_icount -= 2;
@@ -264772,7 +264773,7 @@ srrl4:
m_ird = m_ir;
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_au = m_pc + 2;
- // alu r=9 c=1 m=.nz.. i=.l....f 1 a=alub d=-1
+ // alu r=9 c=1 m=.nz.. i=.l....f ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
sr_nz_u();
set_ftu_const();
@@ -264794,7 +264795,7 @@ void m68008_device::asl_ais_ip8() // e1d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -264835,12 +264836,12 @@ void m68008_device::asl_ais_ip8() // e1d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -264937,7 +264938,7 @@ void m68008_device::asl_aips_ip8() // e1d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -264976,12 +264977,12 @@ void m68008_device::asl_aips_ip8() // e1d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265080,7 +265081,7 @@ void m68008_device::asl_pais_ip8() // e1e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=3 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -265119,12 +265120,12 @@ void m68008_device::asl_pais_ip8() // e1e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265252,7 +265253,7 @@ void m68008_device::asl_das_ip8() // e1e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -265293,12 +265294,12 @@ void m68008_device::asl_das_ip8() // e1e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265387,7 +265388,7 @@ void m68008_device::asl_dais_ip8() // e1f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=3 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=3 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -265479,7 +265480,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -265520,12 +265521,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265654,7 +265655,7 @@ void m68008_device::asl_adr16_ip8() // e1f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -265693,12 +265694,12 @@ void m68008_device::asl_adr16_ip8() // e1f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265863,7 +265864,7 @@ void m68008_device::asl_adr32_ip8() // e1f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=3 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -265902,12 +265903,12 @@ void m68008_device::asl_adr32_ip8() // e1f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=3 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=3 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=3 c=4 m=xnzvc i=.....i. 13 a=33:m_aluo d=-1
+ // alu r=3 c=4 m=xnzvc i=.....i. ALU.asl a=R.aluo:m_aluo d=-1
alu_asl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -265998,7 +265999,7 @@ void m68008_device::lsr_ais_ip8() // e2d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266039,12 +266040,12 @@ void m68008_device::lsr_ais_ip8() // e2d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266141,7 +266142,7 @@ void m68008_device::lsr_aips_ip8() // e2d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -266180,12 +266181,12 @@ void m68008_device::lsr_aips_ip8() // e2d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266284,7 +266285,7 @@ void m68008_device::lsr_pais_ip8() // e2e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=5 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -266323,12 +266324,12 @@ void m68008_device::lsr_pais_ip8() // e2e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266456,7 +266457,7 @@ void m68008_device::lsr_das_ip8() // e2e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266497,12 +266498,12 @@ void m68008_device::lsr_das_ip8() // e2e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266591,7 +266592,7 @@ void m68008_device::lsr_dais_ip8() // e2f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=5 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=5 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -266683,7 +266684,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -266724,12 +266725,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -266858,7 +266859,7 @@ void m68008_device::lsr_adr16_ip8() // e2f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -266897,12 +266898,12 @@ void m68008_device::lsr_adr16_ip8() // e2f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267067,7 +267068,7 @@ void m68008_device::lsr_adr32_ip8() // e2f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=5 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -267106,12 +267107,12 @@ void m68008_device::lsr_adr32_ip8() // e2f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=5 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=5 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=5 c=4 m=xnzvc i=.....i. 16 a=33:m_aluo d=-1
+ // alu r=5 c=4 m=xnzvc i=.....i. ALU.lsr a=R.aluo:m_aluo d=-1
alu_lsr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267202,11 +267203,11 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -267244,12 +267245,12 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267291,7 +267292,7 @@ void m68008_device::lsl_ais_ip8() // e3d0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -267344,12 +267345,12 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8
m_dcr = m_da[rx];
m_at = m_da[ry];
m_au = m_da[ry] + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -267388,12 +267389,12 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267435,7 +267436,7 @@ void m68008_device::lsl_aips_ip8() // e3d8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -267487,7 +267488,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8
m_pc = m_au;
m_dcr = m_da[rx];
m_au = m_da[ry] - 2;
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_icount -= 2;
// 17b pdcw2
@@ -267495,7 +267496,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=4 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -267534,12 +267535,12 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267581,7 +267582,7 @@ void m68008_device::lsl_pais_ip8() // e3e0 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 9:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -267631,7 +267632,7 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8
// 1c2 adsw1
m_aob = m_au;
m_au = ext32(m_dbin) + m_da[ry];
- // alu r=4 c=0 m=..... i=....... 1 a=none d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.dbin:m_dbin
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -267669,11 +267670,11 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -267711,12 +267712,12 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267758,7 +267759,7 @@ void m68008_device::lsl_das_ip8() // e3e8 fff8
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -267806,14 +267807,14 @@ void m68008_device::lsl_dais_ip8() // e3f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=4 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=4 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
m_aob = m_au;
m_t = m_irc & 0x0800;
m_au = m_da[ry] + ext32(m_aluo);
- // alu r=4 c=0 m=..... i=....... 1 a=33:m_aluo d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.aluo:m_aluo d=none
if(m_t)
goto aixl5;
else
@@ -267821,7 +267822,7 @@ void m68008_device::lsl_dais_ip8() // e3f0 fff8
aixl2:
// 120 aixl2
m_au = ext32(m_da[map_sp(m_irc >> 12)]) + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -267860,7 +267861,7 @@ aixl2:
aixl5:
// 1e0 aixl5
m_au = m_da[map_sp(m_irc >> 12)] + m_au;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=5:m_da[map_sp(m_irc >> 12)]
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=R.rzl:m_da[map_sp(m_irc >> 12)]
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 17:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -267901,11 +267902,11 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=none
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
m_edb = m_mmu8->read_data(m_aob & ~1) << 8;
@@ -267943,12 +267944,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -267990,7 +267991,7 @@ adsw2:
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -268042,7 +268043,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff
m_dcr = m_da[rx];
m_at = ext32(m_dbin);
m_au = ext32(m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
@@ -268080,7 +268081,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -268119,12 +268120,12 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268166,7 +268167,7 @@ void m68008_device::lsl_adr16_ip8() // e3f8 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 13:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -268216,7 +268217,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff
m_aob = m_au;
set_16h(m_at, m_dbin);
m_au = m_au + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=31:m_dbin d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=none
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 1:
m_edb = m_mmu8->read_program(m_aob & ~1) << 8;
@@ -268255,7 +268256,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff
m_dcr = m_da[rx];
set_16l(m_at, m_dbin);
m_au = merge_16_32(high16(m_at), m_dbin);
- // alu r=4 c=0 m=..... i=....... 1 a=2:m_da[rx] d=31:m_dbin
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=R.dxl:m_da[rx] d=R.dbin:m_dbin
alu_and(m_da[rx], m_dbin);
m_base_ssw = SSW_PROGRAM | SSW_R;
[[fallthrough]]; case 5:
@@ -268293,7 +268294,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=4 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -268332,12 +268333,12 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=4 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=4 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=4 c=4 m=xnzvc i=.....i. 15 a=33:m_aluo d=-1
+ // alu r=4 c=4 m=xnzvc i=.....i. ALU.lsl a=R.aluo:m_aluo d=-1
alu_lsl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268379,7 +268380,7 @@ void m68008_device::lsl_adr32_ip8() // e3f9 ffff
if(m_next_state != S_TRACE) m_next_state = m_int_next_state;
m_dbout = m_aluo;
m_au = m_pc + 2;
- // alu r=4 c=0 m=..... i=....... 1 a=none d=none
+ // alu r=4 c=0 m=..... i=....... ALU.and_ a=none d=none
m_base_ssw = SSW_DATA;
[[fallthrough]]; case 17:
m_mmu8->write_data(m_aob & ~1, m_dbout >> 8);
@@ -268429,7 +268430,7 @@ void m68008_device::roxr_ais_ip8() // e4d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -268470,12 +268471,12 @@ void m68008_device::roxr_ais_ip8() // e4d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268572,7 +268573,7 @@ void m68008_device::roxr_aips_ip8() // e4d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -268611,12 +268612,12 @@ void m68008_device::roxr_aips_ip8() // e4d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268715,7 +268716,7 @@ void m68008_device::roxr_pais_ip8() // e4e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=8 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -268754,12 +268755,12 @@ void m68008_device::roxr_pais_ip8() // e4e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -268887,7 +268888,7 @@ void m68008_device::roxr_das_ip8() // e4e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -268928,12 +268929,12 @@ void m68008_device::roxr_das_ip8() // e4e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269022,7 +269023,7 @@ void m68008_device::roxr_dais_ip8() // e4f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=8 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=8 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -269114,7 +269115,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -269155,12 +269156,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269289,7 +269290,7 @@ void m68008_device::roxr_adr16_ip8() // e4f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -269328,12 +269329,12 @@ void m68008_device::roxr_adr16_ip8() // e4f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269498,7 +269499,7 @@ void m68008_device::roxr_adr32_ip8() // e4f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=8 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -269537,12 +269538,12 @@ void m68008_device::roxr_adr32_ip8() // e4f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=8 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=8 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=8 c=4 m=xnzvc i=.....i. 20 a=33:m_aluo d=-1
+ // alu r=8 c=4 m=xnzvc i=.....i. ALU.roxr a=R.aluo:m_aluo d=-1
alu_roxr(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269633,7 +269634,7 @@ void m68008_device::roxl_ais_ip8() // e5d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -269674,12 +269675,12 @@ void m68008_device::roxl_ais_ip8() // e5d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269776,7 +269777,7 @@ void m68008_device::roxl_aips_ip8() // e5d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -269815,12 +269816,12 @@ void m68008_device::roxl_aips_ip8() // e5d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -269919,7 +269920,7 @@ void m68008_device::roxl_pais_ip8() // e5e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=11 c=1 m=..... i=....r.. 1 a=alub d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=alub d=-1
alu_andx(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -269958,12 +269959,12 @@ void m68008_device::roxl_pais_ip8() // e5e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270091,7 +270092,7 @@ void m68008_device::roxl_das_ip8() // e5e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270132,12 +270133,12 @@ void m68008_device::roxl_das_ip8() // e5e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270226,7 +270227,7 @@ void m68008_device::roxl_dais_ip8() // e5f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=11 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=11 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -270318,7 +270319,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270359,12 +270360,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270493,7 +270494,7 @@ void m68008_device::roxl_adr16_ip8() // e5f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -270532,12 +270533,12 @@ void m68008_device::roxl_adr16_ip8() // e5f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270702,7 +270703,7 @@ void m68008_device::roxl_adr32_ip8() // e5f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=11 c=1 m=..... i=....r.. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=..... i=....r.. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -270741,12 +270742,12 @@ void m68008_device::roxl_adr32_ip8() // e5f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=11 c=1 m=.nzvc i=....ri. 1 a=31:m_dbin d=-1
+ // alu r=11 c=1 m=.nzvc i=....ri. ALU.and_ a=R.dbin:m_dbin d=-1
alu_andx(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=11 c=4 m=xnzvc i=.....i. 19 a=33:m_aluo d=-1
+ // alu r=11 c=4 m=xnzvc i=.....i. ALU.roxl a=R.aluo:m_aluo d=-1
alu_roxl(m_aluo);
sr_xnzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270837,7 +270838,7 @@ void m68008_device::ror_ais_ip8() // e6d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -270878,12 +270879,12 @@ void m68008_device::ror_ais_ip8() // e6d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -270980,7 +270981,7 @@ void m68008_device::ror_aips_ip8() // e6d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -271019,12 +271020,12 @@ void m68008_device::ror_aips_ip8() // e6d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271123,7 +271124,7 @@ void m68008_device::ror_pais_ip8() // e6e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=10 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -271162,12 +271163,12 @@ void m68008_device::ror_pais_ip8() // e6e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271295,7 +271296,7 @@ void m68008_device::ror_das_ip8() // e6e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -271336,12 +271337,12 @@ void m68008_device::ror_das_ip8() // e6e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271430,7 +271431,7 @@ void m68008_device::ror_dais_ip8() // e6f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=10 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=10 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -271522,7 +271523,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -271563,12 +271564,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271697,7 +271698,7 @@ void m68008_device::ror_adr16_ip8() // e6f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -271736,12 +271737,12 @@ void m68008_device::ror_adr16_ip8() // e6f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -271906,7 +271907,7 @@ void m68008_device::ror_adr32_ip8() // e6f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=10 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -271945,12 +271946,12 @@ void m68008_device::ror_adr32_ip8() // e6f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=10 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=10 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=10 c=4 m=.nzvc i=.....i. 18 a=33:m_aluo d=-1
+ // alu r=10 c=4 m=.nzvc i=.....i. ALU.ror a=R.aluo:m_aluo d=-1
alu_ror(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272041,7 +272042,7 @@ void m68008_device::rol_ais_ip8() // e7d0 fff8
// 006 adrw1
m_aob = m_da[ry];
m_at = m_da[ry];
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272082,12 +272083,12 @@ void m68008_device::rol_ais_ip8() // e7d0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272184,7 +272185,7 @@ void m68008_device::rol_aips_ip8() // e7d8 fff8
// 21d pinw2
m_da[ry] = m_au;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -272223,12 +272224,12 @@ void m68008_device::rol_aips_ip8() // e7d8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272327,7 +272328,7 @@ void m68008_device::rol_pais_ip8() // e7e0 fff8
m_at = m_au;
m_da[ry] = m_au;
m_au = m_pc;
- // alu r=9 c=1 m=..... i=....... 1 a=alub d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=alub d=-1
alu_and(m_alub, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 1:
@@ -272366,12 +272367,12 @@ void m68008_device::rol_pais_ip8() // e7e0 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272499,7 +272500,7 @@ void m68008_device::rol_das_ip8() // e7e8 fff8
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272540,12 +272541,12 @@ void m68008_device::rol_das_ip8() // e7e8 fff8
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272634,7 +272635,7 @@ void m68008_device::rol_dais_ip8() // e7f0 fff8
switch(m_inst_substate) {
case 0:
// 1e3 aixl0
- // alu r=9 c=5 m=..... i=....... 5 a=31:m_dbin d=0
+ // alu r=9 c=5 m=..... i=....... ALU.ext a=R.dbin:m_dbin d=0
alu_ext(m_dbin);
m_icount -= 2;
// 3e2 aixl1
@@ -272726,7 +272727,7 @@ adsw2:
m_aob = m_au;
m_at = m_au;
m_au = m_pc + 4;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
// 024 adrw2
m_dcr = m_da[rx];
@@ -272767,12 +272768,12 @@ adsw2:
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -272901,7 +272902,7 @@ void m68008_device::rol_adr16_ip8() // e7f8 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 5:
@@ -272940,12 +272941,12 @@ void m68008_device::rol_adr16_ip8() // e7f8 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
@@ -273110,7 +273111,7 @@ void m68008_device::rol_adr32_ip8() // e7f9 ffff
// 004 abll3
m_aob = m_at;
m_au = m_pc + 2;
- // alu r=9 c=1 m=..... i=....... 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=..... i=....... ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
m_base_ssw = SSW_DATA | SSW_R;
[[fallthrough]]; case 9:
@@ -273149,12 +273150,12 @@ void m68008_device::rol_adr32_ip8() // e7f9 ffff
m_ir = m_irc;
m_pc = m_au;
m_au = m_au + 2;
- // alu r=9 c=1 m=.nzvc i=.....i. 1 a=31:m_dbin d=-1
+ // alu r=9 c=1 m=.nzvc i=.....i. ALU.and_ a=R.dbin:m_dbin d=-1
alu_and(m_dbin, 0xffff);
sr_nzvc();
// 304 stmw2
m_au = m_at;
- // alu r=9 c=4 m=.nzvc i=.....i. 17 a=33:m_aluo d=-1
+ // alu r=9 c=4 m=.nzvc i=.....i. ALU.rol a=R.aluo:m_aluo d=-1
alu_rol(m_aluo);
sr_nzvc();
m_base_ssw = SSW_PROGRAM | SSW_R;
diff --git a/src/devices/cpu/m68000/m68008.h b/src/devices/cpu/m68000/m68008.h
index 170d5eeea81..84c3cd91071 100644
--- a/src/devices/cpu/m68000/m68008.h
+++ b/src/devices/cpu/m68000/m68008.h
@@ -27,7 +27,7 @@ public:
void set_current_mmu(mmu8 *m);
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
protected:
// Typed constructor
@@ -67,7 +67,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M68008, m68008_device)
diff --git a/src/devices/cpu/m68000/m68010.cpp b/src/devices/cpu/m68000/m68010.cpp
index 593885778e4..4a94e6b93f6 100644
--- a/src/devices/cpu/m68000/m68010.cpp
+++ b/src/devices/cpu/m68000/m68010.cpp
@@ -18,6 +18,11 @@ m68010_device::m68010_device(const machine_config &mconfig, const char *tag, dev
{
}
+m68010_device::m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map)
+ : m68000_musashi_device(mconfig, tag, owner, clock, M68010, 16,24, internal_map)
+{
+}
+
void m68010_device::device_start()
{
m68000_musashi_device::device_start();
diff --git a/src/devices/cpu/m68000/m68010.h b/src/devices/cpu/m68000/m68010.h
index 154ec0160f3..9ef84823888 100644
--- a/src/devices/cpu/m68000/m68010.h
+++ b/src/devices/cpu/m68000/m68010.h
@@ -12,6 +12,7 @@ class m68010_device : public m68000_musashi_device
public:
// construction/destruction
m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, address_map_constructor internal_map);
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -19,7 +20,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M68010, m68010_device)
diff --git a/src/devices/cpu/m68000/m68020.h b/src/devices/cpu/m68000/m68020.h
index c582b7fbd0f..d392d59ad59 100644
--- a/src/devices/cpu/m68000/m68020.h
+++ b/src/devices/cpu/m68000/m68020.h
@@ -19,7 +19,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68020_device : public m68000_musashi_device
@@ -34,7 +34,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68020fpu_device : public m68000_musashi_device
@@ -49,7 +49,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68020pmmu_device : public m68000_musashi_device
@@ -64,7 +64,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68020hmmu_device : public m68000_musashi_device
@@ -81,7 +81,7 @@ public:
virtual bool memory_translate(int space, int intention, offs_t &address, address_space *&target_space) override;
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M68EC020, m68ec020_device)
diff --git a/src/devices/cpu/m68000/m68030.cpp b/src/devices/cpu/m68000/m68030.cpp
index a23326d0dcc..4e03561623f 100644
--- a/src/devices/cpu/m68000/m68030.cpp
+++ b/src/devices/cpu/m68000/m68030.cpp
@@ -19,8 +19,9 @@ std::unique_ptr<util::disasm_interface> m68030_device::create_disassembler()
}
m68030_device::m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : m68000_musashi_device(mconfig, tag, owner, clock, M68030, 32,32)
+ : m68000_musashi_device(mconfig, tag, owner, clock, M68030, 32, 32)
{
+ m_has_fpu = true;
}
void m68030_device::device_start()
diff --git a/src/devices/cpu/m68000/m68030.h b/src/devices/cpu/m68000/m68030.h
index 6817c990fa6..08fedda2e17 100644
--- a/src/devices/cpu/m68000/m68030.h
+++ b/src/devices/cpu/m68000/m68030.h
@@ -19,7 +19,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68030_device : public m68000_musashi_device
@@ -34,7 +34,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M68EC030, m68ec030_device)
diff --git a/src/devices/cpu/m68000/m68040.cpp b/src/devices/cpu/m68000/m68040.cpp
index 6944101ae81..864f3d0e22a 100644
--- a/src/devices/cpu/m68000/m68040.cpp
+++ b/src/devices/cpu/m68000/m68040.cpp
@@ -27,6 +27,7 @@ std::unique_ptr<util::disasm_interface> m68040_device::create_disassembler()
m68040_device::m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: m68000_musashi_device(mconfig, tag, owner, clock, M68040, 32,32)
{
+ m_has_fpu = true;
}
diff --git a/src/devices/cpu/m68000/m68040.h b/src/devices/cpu/m68000/m68040.h
index 538772f7f15..d4a562757dc 100644
--- a/src/devices/cpu/m68000/m68040.h
+++ b/src/devices/cpu/m68000/m68040.h
@@ -19,7 +19,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68lc040_device : public m68000_musashi_device
@@ -34,7 +34,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class m68040_device : public m68000_musashi_device
@@ -49,7 +49,7 @@ public:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(M68EC040, m68ec040_device)
diff --git a/src/devices/cpu/m68000/m68k_in.lst b/src/devices/cpu/m68000/m68k_in.lst
index 846172f61ff..baf931ffaca 100644
--- a/src/devices/cpu/m68000/m68k_in.lst
+++ b/src/devices/cpu/m68000/m68k_in.lst
@@ -5063,7 +5063,7 @@ e3c0 ffc0 lsl w A+-DXWL 01:8 7:14 234fc:5
{
m_pmmu_enabled = 0;
}
- m_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
+ m_can_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
break;
case 0x004: /* ITT0 */
m_mmu_itt0 = REG_DA()[(word2 >> 12) & 15];
diff --git a/src/devices/cpu/m68000/m68kcommon.h b/src/devices/cpu/m68000/m68kcommon.h
index 86cb0bc18e6..c92b1926a49 100644
--- a/src/devices/cpu/m68000/m68kcommon.h
+++ b/src/devices/cpu/m68000/m68kcommon.h
@@ -48,13 +48,12 @@ public:
};
static constexpr u8 autovector(int level) { return 0x18 + level; }
- void autovectors_map(address_map &map);
+ void autovectors_map(address_map &map) ATTR_COLD;
void set_cpu_space(int space_id) { m_cpu_space_id = space_id; }
void set_interrupt_mixer(bool enable) { m_interrupt_mixer = enable; }
auto reset_cb() { return m_reset_cb.bind(); }
- virtual u32 execute_input_lines() const noexcept override { return m_interrupt_mixer ? 8 : 3; } // number of input lines
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return m_interrupt_mixer ? inputnum == M68K_IRQ_7 : false; }
virtual bool supervisor_mode() const noexcept = 0;
diff --git a/src/devices/cpu/m68000/m68kcpu.cpp b/src/devices/cpu/m68000/m68kcpu.cpp
index 2ab2cb9fd43..19d1063e026 100644
--- a/src/devices/cpu/m68000/m68kcpu.cpp
+++ b/src/devices/cpu/m68000/m68kcpu.cpp
@@ -9,7 +9,7 @@ static const char copyright_notice[] =
"MUSASHI\n"
"Version 4.95 (2012-02-19)\n"
"A portable Motorola M68xxx/CPU32/ColdFire processor emulation engine.\n"
-"Copyright Karl Stenerud. All rights reserved.\n"
+"Copyright Karl Stenerud.\n"
;
#endif
@@ -880,6 +880,7 @@ void m68000_musashi_device::execute_run()
}
if(m_stopped)
{
+ debugger_wait_hook();
if (m_icount > 0)
m_icount = 0;
return;
@@ -901,7 +902,7 @@ void m68000_musashi_device::execute_run()
try
{
- if (!m_instruction_restart)
+ if (!m_can_instruction_restart)
{
m_run_mode = RUN_MODE_NORMAL;
/* Read an instruction and call its handler */
@@ -1038,7 +1039,7 @@ void m68000_musashi_device::init_cpu_common(void)
m_pmmu_enabled = false;
m_hmmu_enabled = 0;
m_emmu_enabled = false;
- m_instruction_restart = false;
+ m_can_instruction_restart = false;
/* The first call to this function initializes the opcode handler jump table */
if(!emulation_initialized)
@@ -1073,7 +1074,7 @@ void m68000_musashi_device::init_cpu_common(void)
save_item(NAME(m_pmmu_enabled));
save_item(NAME(m_hmmu_enabled));
save_item(NAME(m_emmu_enabled));
- save_item(NAME(m_instruction_restart));
+ save_item(NAME(m_can_instruction_restart));
save_item(NAME(m_restart_instruction));
save_item(NAME(m_mmu_crp_aptr));
@@ -1112,7 +1113,7 @@ void m68000_musashi_device::device_reset()
m_pmmu_enabled = false;
m_hmmu_enabled = 0;
m_emmu_enabled = false;
- m_instruction_restart = false;
+ m_can_instruction_restart = false;
m_mmu_tc = 0;
m_mmu_tt0 = 0;
@@ -1316,7 +1317,7 @@ void m68000_musashi_device::set_hmmu_enable(int enable)
void m68000_musashi_device::set_emmu_enable(bool enable)
{
m_emmu_enabled = enable;
- m_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
+ m_can_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
}
void m68000_musashi_device::set_fpu_enable(bool enable)
@@ -1602,6 +1603,238 @@ void m68000_musashi_device::init32mmu(address_space &space, address_space &ospac
};
}
+/* interface for 32-bit data bus without byte smearing 68040) */
+void m68000_musashi_device::init32_no_smear(address_space &space, address_space &ospace)
+{
+ m_space = &space;
+ m_ospace = &ospace;
+ ospace.cache(m_oprogram32);
+ space.specific(m_program32);
+
+ m_readimm16 = [this](offs_t address) -> u16
+ { return m_oprogram32.read_word(address); };
+ m_read8 = [this](offs_t address) -> u8
+ { return m_program32.read_byte(address); };
+ m_read16 = [this](offs_t address) -> u16
+ { return m_program32.read_word_unaligned(address); };
+ m_read32 = [this](offs_t address) -> u32
+ { return m_program32.read_dword_unaligned(address); };
+ m_write8 = [this](offs_t address, u8 data)
+ { return m_program32.write_byte(address, data); };
+ m_write16 = [this](offs_t address, u16 data)
+ {
+ if (address & 1)
+ {
+ m_program32.write_byte(address, data >> 8);
+ m_program32.write_byte(address + 1, data & 0xff);
+ }
+ else
+ {
+ m_program32.write_word(address, data);
+ }
+ return;
+ };
+ m_write32 = [this](offs_t address, u32 data)
+ {
+ switch (address & 3)
+ {
+ case 0:
+ m_program32.write_dword(address, data, 0xffffffffU);
+ break;
+
+ case 1:
+ m_program32.write_dword(address - 1, (data & 0xff000000U) | (data & 0xffffff00U) >> 8, 0x00ffffff);
+ m_program32.write_dword(address + 3, dword_from_byte(data & 0x000000ff), 0xff000000U);
+ break;
+
+ case 2:
+ m_program32.write_dword(address - 2, dword_from_word((data & 0xffff0000U) >> 16), 0x0000ffff);
+ m_program32.write_dword(address + 2, dword_from_word(data & 0x0000ffff), 0xffff0000U);
+ break;
+
+ case 3:
+ m_program32.write_dword(address - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
+ m_program32.write_dword(address + 1, rotl_32(data, 8), 0xffffff00U);
+ break;
+ }
+ };
+}
+
+/* interface for 32-bit data bus with PMMU without byte smearing (68040)*/
+void m68000_musashi_device::init32mmu_no_smear(address_space &space, address_space &ospace)
+{
+ m_space = &space;
+ m_ospace = &ospace;
+ ospace.cache(m_oprogram32);
+ space.specific(m_program32);
+
+ m_readimm16 = [this](offs_t address) -> u16
+ {
+ if (m_pmmu_enabled)
+ {
+ address = pmmu_translate_addr(address, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ }
+
+ return m_oprogram32.read_word(address);
+ };
+
+ m_read8 = [this](offs_t address) -> u8
+ {
+ if (m_pmmu_enabled)
+ {
+ address = pmmu_translate_addr(address, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ }
+ return m_program32.read_byte(address);
+ };
+
+ m_read16 = [this](offs_t address) -> u16
+ {
+ if (m_pmmu_enabled)
+ {
+ u32 address0 = pmmu_translate_addr(address, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ if (WORD_ALIGNED(address))
+ return m_program32.read_word(address0);
+ u32 address1 = pmmu_translate_addr(address + 1, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ u16 result = m_program32.read_byte(address0) << 8;
+ return result | m_program32.read_byte(address1);
+ }
+ return m_program32.read_word_unaligned(address);
+ };
+
+ m_read32 = [this](offs_t address) -> u32
+ {
+ if (m_pmmu_enabled)
+ {
+ u32 address0 = pmmu_translate_addr(address, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ if ((address + 3) & 0xfc)
+ // not at page boundary; use default code
+ address = address0;
+ else if (DWORD_ALIGNED(address)) // 0
+ return m_program32.read_dword(address0);
+ else
+ {
+ u32 address2 = pmmu_translate_addr(address + 2, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ if (WORD_ALIGNED(address))
+ { // 2
+ u32 result = m_program32.read_word(address0) << 16;
+ return result | m_program32.read_word(address2);
+ }
+ u32 address1 = pmmu_translate_addr(address + 1, 1);
+ u32 address3 = pmmu_translate_addr(address + 3, 1);
+ if (m_mmu_tmp_buserror_occurred)
+ return ~0;
+ u32 result = m_program32.read_byte(address0) << 24;
+ result |= m_program32.read_word(address1) << 8;
+ return result | m_program32.read_byte(address3);
+ }
+ }
+ return m_program32.read_dword_unaligned(address);
+ };
+
+ m_write8 = [this](offs_t address, u8 data)
+ {
+ u32 address0 = address;
+ if (m_pmmu_enabled)
+ {
+ address0 = pmmu_translate_addr(address, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ m_program32.write_byte(address0, data);
+ };
+
+ m_write16 = [this](offs_t address, u16 data)
+ {
+ u32 address0 = address;
+ if (m_pmmu_enabled)
+ {
+ address0 = pmmu_translate_addr(address0, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ if (address0 & 1)
+ {
+ m_program32.write_byte(address0, data >> 8);
+ m_program32.write_byte(address0 + 1, data & 0xff);
+ }
+ else
+ {
+ m_program32.write_word(address0, data);
+ }
+ };
+
+ m_write32 = [this](offs_t address, u32 data)
+ {
+ u32 address0 = address;
+ if (m_pmmu_enabled)
+ {
+ address0 = pmmu_translate_addr(address0, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ switch (address & 3)
+ {
+ case 0:
+ m_program32.write_dword(address0, data, 0xffffffffU);
+ break;
+
+ case 1:
+ {
+ u32 address3 = address + 3;
+ if (m_pmmu_enabled)
+ {
+ address3 = pmmu_translate_addr(address3, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ m_program32.write_dword(address0 - 1, (data & 0xff000000U) | (data & 0xffffff00U) >> 8, 0x00ffffff);
+ m_program32.write_dword(address3, dword_from_byte(data & 0x000000ff), 0xff000000U);
+ break;
+ }
+
+ case 2:
+ {
+ u32 address2 = address + 2;
+ if (m_pmmu_enabled)
+ {
+ address2 = pmmu_translate_addr(address2, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ m_program32.write_dword(address0 - 2, dword_from_word((data & 0xffff0000U) >> 16), 0x0000ffff);
+ m_program32.write_dword(address2, dword_from_word(data & 0x0000ffff), 0xffff0000U);
+ break;
+ }
+
+ case 3:
+ {
+ u32 address1 = address + 1;
+ if (m_pmmu_enabled)
+ {
+ address1 = pmmu_translate_addr(address1, 0);
+ if (m_mmu_tmp_buserror_occurred)
+ return;
+ }
+ m_program32.write_dword(address0 - 3, dword_from_unaligned_word((data & 0xffff0000U) >> 16), 0x000000ff);
+ m_program32.write_dword(address1, rotl_32(data, 8), 0xffffff00U);
+ break;
+ }
+ }
+ };
+}
+
void m68000_musashi_device::init32hmmu(address_space &space, address_space &ospace)
{
m_space = &space;
@@ -1688,7 +1921,7 @@ void m68000_musashi_device::init32hmmu(address_space &space, address_space &ospa
// do not call set_input_line(M68K_LINE_BUSERROR) when using rerun flag
void m68000_musashi_device::set_buserror_details(u32 fault_addr, u8 rw, u8 fc, bool rerun)
{
- if (m_instruction_restart && rerun) m_mmu_tmp_buserror_occurred = true; // hack for external MMU
+ if (m_can_instruction_restart && rerun) m_mmu_tmp_buserror_occurred = true; // hack for external MMU
// save values for 68000 specific bus error
m_aerr_address = fault_addr;
@@ -1997,7 +2230,6 @@ void m68000_musashi_device::init_cpu_m68030(void)
m_cyc_shift = 1;
m_cyc_reset = 518;
m_has_pmmu = 1;
- m_has_fpu = 1;
define_state();
}
@@ -2040,7 +2272,7 @@ void m68000_musashi_device::init_cpu_m68040(void)
m_cpu_type = CPU_TYPE_040;
- init32mmu(*m_program, *m_oprogram);
+ init32mmu_no_smear(*m_program, *m_oprogram);
m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
m_state_table = m68ki_instruction_state_table[5];
m_cyc_instruction = m68ki_cycles[5];
@@ -2055,7 +2287,6 @@ void m68000_musashi_device::init_cpu_m68040(void)
m_cyc_shift = 1;
m_cyc_reset = 518;
m_has_pmmu = 1;
- m_has_fpu = 1;
define_state();
}
@@ -2068,7 +2299,7 @@ void m68000_musashi_device::init_cpu_m68ec040(void)
m_cpu_type = CPU_TYPE_EC040;
- init32(*m_program, *m_oprogram);
+ init32_no_smear(*m_program, *m_oprogram);
m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
m_state_table = m68ki_instruction_state_table[5];
m_cyc_instruction = m68ki_cycles[5];
@@ -2096,7 +2327,7 @@ void m68000_musashi_device::init_cpu_m68lc040(void)
m_cpu_type = CPU_TYPE_LC040;
- init32mmu(*m_program, *m_oprogram);
+ init32mmu_no_smear(*m_program, *m_oprogram);
m_sr_mask = 0xf71f; /* T1 T0 S M -- I2 I1 I0 -- -- -- X N Z V C */
m_state_table = m68ki_instruction_state_table[5];
m_cyc_instruction = m68ki_cycles[5];
@@ -2337,7 +2568,7 @@ void m68000_musashi_device::clear_all()
m_pmmu_enabled= false;
m_hmmu_enabled= 0;
m_emmu_enabled= false;
- m_instruction_restart= false;
+ m_can_instruction_restart= false;
m_has_fpu= 0;
m_fpu_just_reset= 0;
diff --git a/src/devices/cpu/m68000/m68kcpu.h b/src/devices/cpu/m68000/m68kcpu.h
index aebe498f899..93507a2a283 100644
--- a/src/devices/cpu/m68000/m68kcpu.h
+++ b/src/devices/cpu/m68000/m68kcpu.h
@@ -8,7 +8,7 @@
* Version 4.50
*
* A portable Motorola M680x0 processor emulation engine.
- * Copyright Karl Stenerud. All rights reserved.
+ * Copyright Karl Stenerud
*
*/
@@ -604,11 +604,14 @@ inline u32 m68ki_read_imm_16()
result = MASK_OUT_ABOVE_16(m_pref_data);
m_pc += 2;
if (!m_mmu_tmp_buserror_occurred) {
+
// prefetch only if no bus error occurred in opcode fetch
m_pref_data = m68ki_ic_readimm16(m_pc);
m_pref_addr = m_mmu_tmp_buserror_occurred ? ~0 : m_pc;
- // ignore bus error on prefetch
- m_mmu_tmp_buserror_occurred = 0;
+ if (!CPU_TYPE_IS_010())
+ {
+ m_mmu_tmp_buserror_occurred = 0;
+ }
}
return result;
@@ -656,6 +659,16 @@ inline u32 m68ki_read_8_fc(u32 address, u32 fc)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 1;
m_mmu_tmp_sz = M68K_SZ_BYTE;
+ // Check for reading the FPU's CIRs if this is an '020 or '030.
+ // In CPU space (FC 7), addresses 0x0002xxxx are coprocessor interface registers.
+ // Bits 15-13 are the coprocessor ID, and bits 0-4 are the register select.
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ return m6888x_read_cir(address);
+ }
+ }
return m_read8(address);
}
inline u32 m68ki_read_16_fc(u32 address, u32 fc)
@@ -667,6 +680,13 @@ inline u32 m68ki_read_16_fc(u32 address, u32 fc)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 1;
m_mmu_tmp_sz = M68K_SZ_WORD;
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ return m6888x_read_cir(address);
+ }
+ }
return m_read16(address);
}
inline u32 m68ki_read_32_fc(u32 address, u32 fc)
@@ -678,6 +698,13 @@ inline u32 m68ki_read_32_fc(u32 address, u32 fc)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 1;
m_mmu_tmp_sz = M68K_SZ_LONG;
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ return m6888x_read_cir(address);
+ }
+ }
return m_read32(address);
}
@@ -686,6 +713,14 @@ inline void m68ki_write_8_fc(u32 address, u32 fc, u32 value)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 0;
m_mmu_tmp_sz = M68K_SZ_BYTE;
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ m6888x_write_cir(address, value);
+ return;
+ }
+ }
m_write8(address, value);
}
inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value)
@@ -697,6 +732,14 @@ inline void m68ki_write_16_fc(u32 address, u32 fc, u32 value)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 0;
m_mmu_tmp_sz = M68K_SZ_WORD;
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ m6888x_write_cir(address, value);
+ return;
+ }
+ }
m_write16(address, value);
}
inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value)
@@ -708,6 +751,14 @@ inline void m68ki_write_32_fc(u32 address, u32 fc, u32 value)
m_mmu_tmp_fc = fc;
m_mmu_tmp_rw = 0;
m_mmu_tmp_sz = M68K_SZ_LONG;
+ if ((fc == 7) && CPU_TYPE_IS_020_PLUS() && !CPU_TYPE_IS_040_PLUS())
+ {
+ if ((address & 0xffffeff0) == 0x00022000)
+ {
+ m6888x_write_cir(address, value);
+ return;
+ }
+ }
m_write32(address, value);
}
diff --git a/src/devices/cpu/m68000/m68kdasm.cpp b/src/devices/cpu/m68000/m68kdasm.cpp
index 9370720f24c..9f3a088d677 100644
--- a/src/devices/cpu/m68000/m68kdasm.cpp
+++ b/src/devices/cpu/m68000/m68kdasm.cpp
@@ -8,7 +8,7 @@
* Version 3.32
*
* A portable Motorola M680x0 processor emulation engine.
- * Copyright Karl Stenerud. All rights reserved.
+ * Copyright Karl Stenerud.
*
*/
@@ -893,7 +893,7 @@ std::string m68k_disassembler::d68020_cas_8()
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
- return util::string_format("cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_8(m_cpu_ir));
+ return util::string_format("cas.b D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_8(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas_16()
@@ -902,7 +902,7 @@ std::string m68k_disassembler::d68020_cas_16()
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
- return util::string_format("cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_16(m_cpu_ir));
+ return util::string_format("cas.w D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_16(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas_32()
@@ -911,7 +911,7 @@ std::string m68k_disassembler::d68020_cas_32()
if(limit.first)
return limit.second;
u16 extension = read_imm_16();
- return util::string_format("cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>8)&7, get_ea_mode_str_32(m_cpu_ir));
+ return util::string_format("cas.l D%d, D%d, %s; (2+)", extension&7, (extension>>6)&7, get_ea_mode_str_32(m_cpu_ir));
}
std::string m68k_disassembler::d68020_cas2_16()
diff --git a/src/devices/cpu/m68000/m68kdasm.h b/src/devices/cpu/m68000/m68kdasm.h
index 88022b9d15d..865af5d7c61 100644
--- a/src/devices/cpu/m68000/m68kdasm.h
+++ b/src/devices/cpu/m68000/m68kdasm.h
@@ -8,7 +8,7 @@
* Version 3.32
*
* A portable Motorola M680x0 processor emulation engine.
- * Copyright Karl Stenerud. All rights reserved.
+ * Copyright Karl Stenerud.
*
*/
diff --git a/src/devices/cpu/m68000/m68kfpu.cpp b/src/devices/cpu/m68000/m68kfpu.cpp
index e8acf965db6..1d16077091c 100644
--- a/src/devices/cpu/m68000/m68kfpu.cpp
+++ b/src/devices/cpu/m68000/m68kfpu.cpp
@@ -1,22 +1,51 @@
// license:BSD-3-Clause
-// copyright-holders:Karl Stenerud
+// copyright-holders:Karl Stenerud, R. Belmont
+
+/*
+ SoftFloat 3E version, May/June 2024
+ - Exception flags now set for all opcodes
+ - FREM/FMOD now generate the quotient bits in FPSR, required for SANE to do trigonometry
+ - FMOVE of a float to an integer register generates the proper INEXACT exception, required
+ for SANE to calculate square roots.
+*/
+
+#include <cstdint>
#include "emu.h"
#include "m68kmusashi.h"
+#define LOG_FPSR (1U << 1)
+#define LOG_INSTRUCTIONS (1U << 2)
+#define LOG_INSTRUCTIONS_VERBOSE (1U << 3)
+#define LOG_LOADSTORE (1U << 4)
+
+#define VERBOSE (0)
+
+#define LOG_OUTPUT_FUNC osd_printf_info
+#include "logmacro.h"
+
static constexpr int FPCC_N = 0x08000000;
static constexpr int FPCC_Z = 0x04000000;
static constexpr int FPCC_I = 0x02000000;
static constexpr int FPCC_NAN = 0x01000000;
-static constexpr int FPES_OE = 0x00002000;
-static constexpr int FPAE_IOP = 0x00000080;
+static constexpr u32 FPES_INEXDEC = 0x00000100;
+static constexpr u32 FPES_INEXACT = 0x00000200;
+static constexpr u32 FPES_DIVZERO = 0x00000400;
+static constexpr u32 FPES_OVERFLOW = 0x00000800;
+static constexpr u32 FPES_UNDERFLOW = 0x00001000;
+static constexpr u32 FPES_OPERR = 0x00002000;
+static constexpr u32 FPES_SNAN = 0x00004000;
-#ifdef UNUSED_DEFINITION
-static constexpr u64 DOUBLE_INFINITY = 0x7ff0000000000000U;
-static constexpr u64 DOUBLE_EXPONENT = 0x7ff0000000000000U;
-static constexpr u64 DOUBLE_MANTISSA = 0x000fffffffffffffU;
-#endif
+static constexpr u32 FPAE_INEXACT = 0x00000008;
+static constexpr u32 FPAE_DIVZERO = 0x00000010;
+static constexpr u32 FPAE_OVERFLOW = 0x00000020;
+static constexpr u32 FPAE_UNDERFLOW = 0x00000040;
+static constexpr u32 FPAE_OPERR = 0x00000010;
+
+static constexpr u32 EXC_ENB_INEXACT = 0x00000001;
+static constexpr u32 EXC_ENB_UNDFLOW = 0x00000002;
+static constexpr u32 EXC_ENB_OVRFLOW = 0x00000004;
// masks for packed dwords, positive k-factor
const u32 m68000_musashi_device::pkmask2[18] =
@@ -34,34 +63,34 @@ const u32 m68000_musashi_device::pkmask3[18] =
0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff,
};
-inline floatx80 m68000_musashi_device::load_extended_float80(u32 ea)
+inline extFloat80_t m68000_musashi_device::load_extended_float80(u32 ea)
{
u32 d1,d2;
u16 d3;
- floatx80 fp;
+ extFloat80_t fp;
d3 = m68ki_read_16(ea);
d1 = m68ki_read_32(ea+4);
d2 = m68ki_read_32(ea+8);
- fp.high = d3;
- fp.low = ((u64)d1<<32) | (d2 & 0xffffffff);
+ fp.signExp = d3;
+ fp.signif = ((u64)d1<<32) | (d2 & 0xffffffff);
return fp;
}
-inline void m68000_musashi_device::store_extended_float80(u32 ea, floatx80 fpr)
+inline void m68000_musashi_device::store_extended_float80(u32 ea, extFloat80_t fpr)
{
- m68ki_write_16(ea+0, fpr.high);
+ m68ki_write_16(ea+0, fpr.signExp);
m68ki_write_16(ea+2, 0);
- m68ki_write_32(ea+4, (fpr.low>>32)&0xffffffff);
- m68ki_write_32(ea+8, fpr.low&0xffffffff);
+ m68ki_write_32(ea+4, (fpr.signif>>32)&0xffffffff);
+ m68ki_write_32(ea+8, fpr.signif&0xffffffff);
}
-inline floatx80 m68000_musashi_device::load_pack_float80(u32 ea)
+inline extFloat80_t m68000_musashi_device::load_pack_float80(u32 ea)
{
u32 dw1, dw2, dw3;
- floatx80 result;
+ extFloat80_t result;
double tmp;
char str[128], *ch;
@@ -109,7 +138,7 @@ inline floatx80 m68000_musashi_device::load_pack_float80(u32 ea)
return result;
}
-inline void m68000_musashi_device::store_pack_float80(u32 ea, int k, floatx80 fpr)
+inline void m68000_musashi_device::store_pack_float80(u32 ea, int k, extFloat80_t fpr)
{
u32 dw1, dw2, dw3;
char str[128], *ch;
@@ -118,7 +147,7 @@ inline void m68000_musashi_device::store_pack_float80(u32 ea, int k, floatx80 fp
dw1 = dw2 = dw3 = 0;
ch = &str[0];
- snprintf(str, 128, "%.16e", fx80_to_double(fpr));
+ snprintf(str, sizeof(str), "%.16e", fx80_to_double(fpr));
if (*ch == '-')
{
@@ -241,87 +270,65 @@ inline void m68000_musashi_device::store_pack_float80(u32 ea, int k, floatx80 fp
m68ki_write_32(ea+8, dw3);
}
-inline floatx80 propagateFloatx80NaNOneArg(floatx80 a)
+void m68000_musashi_device::set_condition_codes(extFloat80_t reg)
{
- if (floatx80_is_signaling_nan(a))
- float_raise(float_flag_invalid);
-
- a.low |= 0xC000000000000000U;
-
- return a;
-}
-
-static void normalizeFloatx80Subnormal(uint64_t aSig, int32_t *zExpPtr, uint64_t *zSigPtr)
-{
- int shiftCount = countLeadingZeros64(aSig);
- *zSigPtr = aSig << shiftCount;
- *zExpPtr = 1 - shiftCount;
-}
+ m_fpsr &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
-inline floatx80 getman(floatx80 src)
-{
- const flag sign = (src.high >> 15);
- int32_t exp = (src.high & 0x7fff);
- uint64_t signific = src.low;
+ // sign flag
+ if (reg.signExp & 0x8000)
+ {
+ m_fpsr |= FPCC_N;
+ }
- if (exp == 0x7fff)
+ // zero flag
+ if (((reg.signExp & 0x7fff) == 0) && ((reg.signif<<1) == 0))
{
- if ((uint64_t)(signific << 1))
- {
- return propagateFloatx80NaNOneArg(src);
- }
- else
- {
- return packFloatx80(0, 0xffff, 0xffffffffffffffffU);
- }
+ m_fpsr |= FPCC_Z;
}
- if (exp == 0)
+ // infinity flag
+ if (((reg.signExp & 0x7fff) == 0x7fff) && ((reg.signif<<1) == 0))
{
- if (signific == 0)
- {
- return packFloatx80(sign, 0, 0);
- }
- normalizeFloatx80Subnormal(signific, &exp, &signific);
+ m_fpsr |= FPCC_I;
}
- return packFloatx80(sign, 0x3fff, signific);
+ // NaN flag
+ if (extFloat80_is_nan(reg))
+ {
+ m_fpsr |= FPCC_NAN;
+ }
}
-inline void m68000_musashi_device::SET_CONDITION_CODES(floatx80 reg)
+void m68000_musashi_device::clear_exception_flags()
{
-// u64 *regi;
-
-// regi = (u64 *)&reg;
-
- m_fpsr &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
+ softfloat_exceptionFlags = 0;
+ m_fpsr &= ~(FPES_SNAN | FPES_OPERR | FPES_OVERFLOW | FPES_UNDERFLOW | FPES_DIVZERO | FPAE_DIVZERO | FPAE_INEXACT | FPAE_OPERR | FPAE_OVERFLOW | FPAE_UNDERFLOW | FPES_INEXDEC);
+}
- // sign flag
- if (reg.high & 0x8000)
+void m68000_musashi_device::sync_exception_flags(extFloat80_t op1, extFloat80_t op2, u32 enables)
+{
+ if (extF80_isSignalingNaN(op1) || extF80_isSignalingNaN(op2))
{
- m_fpsr |= FPCC_N;
+ m_fpsr |= FPES_SNAN;
}
- // zero flag
- if (((reg.high & 0x7fff) == 0) && ((reg.low<<1) == 0))
+ if ((enables & EXC_ENB_INEXACT) && (softfloat_exceptionFlags & softfloat_flag_inexact))
{
- m_fpsr |= FPCC_Z;
+ m_fpsr |= FPES_INEXACT | FPAE_INEXACT;
}
- // infinity flag
- if (((reg.high & 0x7fff) == 0x7fff) && ((reg.low<<1) == 0))
+ if ((enables & EXC_ENB_UNDFLOW) && (softfloat_exceptionFlags & softfloat_flag_underflow))
{
- m_fpsr |= FPCC_I;
+ m_fpsr |= FPES_UNDERFLOW | FPAE_UNDERFLOW;
}
- // NaN flag
- if (floatx80_is_nan(reg))
+ if ((enables & EXC_ENB_OVRFLOW) && (softfloat_exceptionFlags & softfloat_flag_overflow))
{
- m_fpsr |= FPCC_NAN;
+ m_fpsr |= FPES_OVERFLOW | FPAE_OVERFLOW;
}
}
-inline int m68000_musashi_device::TEST_CONDITION(int condition)
+int m68000_musashi_device::test_condition(int condition)
{
int n = (m_fpsr & FPCC_N) != 0;
int z = (m_fpsr & FPCC_Z) != 0;
@@ -383,6 +390,25 @@ inline int m68000_musashi_device::TEST_CONDITION(int condition)
return r;
}
+s32 m68000_musashi_device::convert_to_int(extFloat80_t source, s32 lowerLimit, s32 upperLimit)
+{
+ clear_exception_flags();
+ s32 result = extF80_to_i32(source, softfloat_roundingMode, true);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ if (result < lowerLimit)
+ {
+ result = lowerLimit;
+ m_fpsr |= FPES_INEXACT | FPAE_INEXACT;
+ }
+ else if (result > upperLimit)
+ {
+ result = upperLimit;
+ m_fpsr |= FPES_INEXACT | FPAE_INEXACT;
+ }
+
+ return result;
+}
+
u8 m68000_musashi_device::READ_EA_8(int ea)
{
int mode = (ea >> 3) & 0x7;
@@ -392,11 +418,7 @@ u8 m68000_musashi_device::READ_EA_8(int ea)
{
case 0: // Dn
{
- return REG_D()[reg];
- }
- case 1: // An
- {
- return REG_A()[reg];
+ return REG_D()[reg] & 0xff;
}
case 2: // (An)
{
@@ -472,11 +494,7 @@ u16 m68000_musashi_device::READ_EA_16(int ea)
{
case 0: // Dn
{
- return (u16)(REG_D()[reg]);
- }
- case 1: // An
- {
- return (u16)REG_A()[reg];
+ return (u16)(REG_D()[reg] & 0xffff);
}
case 2: // (An)
{
@@ -555,7 +573,7 @@ u32 m68000_musashi_device::READ_EA_32(int ea)
{
return REG_D()[reg];
}
- case 1: // An
+ case 1: // An
{
return REG_A()[reg];
}
@@ -709,16 +727,16 @@ u64 m68000_musashi_device::READ_EA_64(int ea)
return 0;
}
-floatx80 m68000_musashi_device::READ_EA_FPE(int mode, int reg, uint32 di_mode_ea)
+extFloat80_t m68000_musashi_device::READ_EA_FPE(int mode, int reg, uint32_t offset)
{
- floatx80 fpr;
+ extFloat80_t fpr;
switch (mode)
{
case 2: // (An)
{
u32 ea = REG_A()[reg];
- fpr = load_extended_float80(ea);
+ fpr = load_extended_float80(ea + offset);
break;
}
@@ -738,14 +756,20 @@ floatx80 m68000_musashi_device::READ_EA_FPE(int mode, int reg, uint32 di_mode_ea
}
case 5: // (d16, An)
{
- fpr = load_extended_float80(di_mode_ea);
+ u32 ea = REG_A()[reg];
+ fpr = load_extended_float80(ea + offset);
break;
}
+#if 0
+ // FIXME: this addressing mode is broken, and fixing it so it works properly
+ // for FMOVEM is quite challenging; disabling it for now.
case 6: // (An) + (Xn) + d8
{
- fpr = load_extended_float80(di_mode_ea);
+ u32 ea = REG_A()[reg];
+ fpr = load_extended_float80(ea + offset);
break;
}
+#endif
case 7: // extended modes
{
@@ -792,9 +816,9 @@ floatx80 m68000_musashi_device::READ_EA_FPE(int mode, int reg, uint32 di_mode_ea
return fpr;
}
-floatx80 m68000_musashi_device::READ_EA_PACK(int ea)
+extFloat80_t m68000_musashi_device::READ_EA_PACK(int ea)
{
- floatx80 fpr;
+ extFloat80_t fpr;
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -815,13 +839,6 @@ floatx80 m68000_musashi_device::READ_EA_PACK(int ea)
break;
}
- case 5: // (d16,An)
- {
- u32 ea = REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16());
- fpr = load_pack_float80(ea);
- break;
- }
-
case 7: // extended modes
{
switch (reg)
@@ -855,7 +872,8 @@ void m68000_musashi_device::WRITE_EA_8(int ea, u8 data)
{
case 0: // Dn
{
- REG_D()[reg] = data;
+ REG_D()[reg] &= 0xffffff00;
+ REG_D()[reg] |= data;
break;
}
case 2: // (An)
@@ -923,7 +941,8 @@ void m68000_musashi_device::WRITE_EA_16(int ea, u16 data)
{
case 0: // Dn
{
- REG_D()[reg] = data;
+ REG_D()[reg] &= 0xffff0000;
+ REG_D()[reg] |= data;
break;
}
case 2: // (An)
@@ -1134,22 +1153,20 @@ void m68000_musashi_device::WRITE_EA_64(int ea, u64 data)
}
}
-void m68000_musashi_device::WRITE_EA_FPE(int mode, int reg, floatx80 fpr, uint32 di_mode_ea)
+void m68000_musashi_device::WRITE_EA_FPE(int mode, int reg, extFloat80_t fpr, uint32_t offset)
{
switch (mode)
{
case 2: // (An)
{
- u32 ea;
- ea = REG_A()[reg];
- store_extended_float80(ea, fpr);
+ u32 ea = REG_A()[reg];
+ store_extended_float80(ea + offset, fpr);
break;
}
case 3: // (An)+
{
- u32 ea;
- ea = REG_A()[reg];
+ u32 ea = REG_A()[reg];
store_extended_float80(ea, fpr);
REG_A()[reg] += 12;
break;
@@ -1157,25 +1174,16 @@ void m68000_musashi_device::WRITE_EA_FPE(int mode, int reg, floatx80 fpr, uint32
case 4: // -(An)
{
- u32 ea;
REG_A()[reg] -= 12;
- ea = REG_A()[reg];
+ u32 ea = REG_A()[reg];
store_extended_float80(ea, fpr);
break;
}
case 5: // (d16,An)
{
- // EA_AY_DI_32() should not be done here because fmovem would increase
- // PC each time, reading incorrect displacement & advancing PC too much.
- store_extended_float80(di_mode_ea, fpr);
- break;
- }
-
- case 6: // (An) + (Xn) + d8
- {
- u32 ea = EA_AY_IX_32();
- store_extended_float80(ea, fpr);
+ u32 ea = REG_A()[reg];
+ store_extended_float80(ea + offset, fpr);
break;
}
@@ -1190,7 +1198,7 @@ void m68000_musashi_device::WRITE_EA_FPE(int mode, int reg, floatx80 fpr, uint32
}
}
-void m68000_musashi_device::WRITE_EA_PACK(int ea, int k, floatx80 fpr)
+void m68000_musashi_device::WRITE_EA_PACK(int ea, int k, extFloat80_t fpr)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
@@ -1236,12 +1244,12 @@ void m68000_musashi_device::WRITE_EA_PACK(int ea, int k, floatx80 fpr)
void m68000_musashi_device::fpgen_rm_reg(u16 w2)
{
- const int ea = m_ir & 0x3f;
- const int rm = (w2 >> 14) & 0x1;
- const int src = (w2 >> 10) & 0x7;
- const int dst = (w2 >> 7) & 0x7;
- const int opmode = w2 & 0x7f;
- floatx80 source;
+ int ea = m_ir & 0x3f;
+ int rm = (w2 >> 14) & 0x1;
+ int src = (w2 >> 10) & 0x7;
+ int dst = (w2 >> 7) & 0x7;
+ int opmode = w2 & 0x7f;
+ extFloat80_t source;
// fmovecr #$f, fp0 f200 5c0f
@@ -1252,21 +1260,22 @@ void m68000_musashi_device::fpgen_rm_reg(u16 w2)
case 0: // Long-Word Integer
{
s32 d = READ_EA_32(ea);
- source = int32_to_floatx80(d);
+ source = i32_to_extF80(d);
break;
}
case 1: // Single-precision Real
{
u32 d = READ_EA_32(ea);
- source = float32_to_floatx80(d);
+ float32_t *pF = (float32_t *)&d;
+ source = f32_to_extF80(*pF);
break;
}
case 2: // Extended-precision Real
{
int imode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- uint32 di_mode_ea = imode == 5 ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
- source = READ_EA_FPE(imode, reg, di_mode_ea);
+ uint32_t offset = (imode == 5) ? MAKE_INT_16(m68ki_read_imm_16()) : 0;
+ source = READ_EA_FPE(imode, reg, offset);
break;
}
case 3: // Packed-decimal Real
@@ -1277,20 +1286,20 @@ void m68000_musashi_device::fpgen_rm_reg(u16 w2)
case 4: // Word Integer
{
s16 d = READ_EA_16(ea);
- source = int32_to_floatx80((s32)d);
+ source = i32_to_extF80((s32)d);
break;
}
case 5: // Double-precision Real
{
u64 d = READ_EA_64(ea);
-
- source = float64_to_floatx80(d);
+ float64_t *pF = (float64_t *)&d;
+ source = f64_to_extF80(*pF);
break;
}
case 6: // Byte Integer
{
s8 d = READ_EA_8(ea);
- source = int32_to_floatx80((s32)d);
+ source = i32_to_extF80((s32)d);
break;
}
case 7: // FMOVECR load from constant ROM
@@ -1298,107 +1307,107 @@ void m68000_musashi_device::fpgen_rm_reg(u16 w2)
switch (w2 & 0x7f)
{
case 0x0: // Pi
- source.high = 0x4000;
- source.low = 0xc90fdaa22168c235U;
+ source.signExp = 0x4000;
+ source.signif = 0xc90fdaa22168c235U;
break;
case 0xb: // log10(2)
- source.high = 0x3ffd;
- source.low = 0x9a209a84fbcff798U;
+ source.signExp = 0x3ffd;
+ source.signif = 0x9a209a84fbcff798U;
break;
case 0xc: // e
- source.high = 0x4000;
- source.low = 0xadf85458a2bb4a9bU;
+ source.signExp = 0x4000;
+ source.signif = 0xadf85458a2bb4a9bU;
break;
case 0xd: // log2(e)
- source.high = 0x3fff;
- source.low = 0xb8aa3b295c17f0bcU;
+ source.signExp = 0x3fff;
+ source.signif = 0xb8aa3b295c17f0bcU;
break;
case 0xe: // log10(e)
- source.high = 0x3ffd;
- source.low = 0xde5bd8a937287195U;
+ source.signExp = 0x3ffd;
+ source.signif = 0xde5bd8a937287195U;
break;
case 0xf: // 0.0
- source = int32_to_floatx80((s32)0);
+ source = i32_to_extF80((s32)0);
break;
case 0x30: // ln(2)
- source.high = 0x3ffe;
- source.low = 0xb17217f7d1cf79acU;
+ source.signExp = 0x3ffe;
+ source.signif = 0xb17217f7d1cf79acU;
break;
case 0x31: // ln(10)
- source.high = 0x4000;
- source.low = 0x935d8dddaaa8ac17U;
+ source.signExp = 0x4000;
+ source.signif = 0x935d8dddaaa8ac17U;
break;
case 0x32: // 1 (or 100? manuals are unclear, but 1 would make more sense)
- source = int32_to_floatx80((s32)1);
+ source = i32_to_extF80((s32)1);
break;
case 0x33: // 10^1
- source = int32_to_floatx80((s32)10);
+ source = i32_to_extF80((s32)10);
break;
case 0x34: // 10^2
- source = int32_to_floatx80((s32)10*10);
+ source = i32_to_extF80((s32)10 * 10);
break;
case 0x35: // 10^4
- source = int32_to_floatx80((s32)1000*10);
+ source = i32_to_extF80((s32)1000 * 10);
break;
case 0x36: // 1.0e8
- source = int32_to_floatx80((s32)10000000*10);
+ source = i32_to_extF80((s32)10000000 * 10);
break;
case 0x37: // 1.0e16 - can't get the right precision from s32 so go "direct" with constants from h/w
- source.high = 0x4034;
- source.low = 0x8e1bc9bf04000000U;
+ source.signExp = 0x4034;
+ source.signif = 0x8e1bc9bf04000000U;
break;
case 0x38: // 1.0e32
- source.high = 0x4069;
- source.low = 0x9dc5ada82b70b59eU;
+ source.signExp = 0x4069;
+ source.signif = 0x9dc5ada82b70b59eU;
break;
case 0x39: // 1.0e64
- source.high = 0x40d3;
- source.low = 0xc2781f49ffcfa6d5U;
+ source.signExp = 0x40d3;
+ source.signif = 0xc2781f49ffcfa6d5U;
break;
case 0x3a: // 1.0e128
- source.high = 0x41a8;
- source.low = 0x93ba47c980e98ce0U;
+ source.signExp = 0x41a8;
+ source.signif = 0x93ba47c980e98ce0U;
break;
case 0x3b: // 1.0e256
- source.high = 0x4351;
- source.low = 0xaa7eebfb9df9de8eU;
+ source.signExp = 0x4351;
+ source.signif = 0xaa7eebfb9df9de8eU;
break;
case 0x3c: // 1.0e512
- source.high = 0x46a3;
- source.low = 0xe319a0aea60e91c7U;
+ source.signExp = 0x46a3;
+ source.signif = 0xe319a0aea60e91c7U;
break;
case 0x3d: // 1.0e1024
- source.high = 0x4d48;
- source.low = 0xc976758681750c17U;
+ source.signExp = 0x4d48;
+ source.signif = 0xc976758681750c17U;
break;
case 0x3e: // 1.0e2048
- source.high = 0x5a92;
- source.low = 0x9e8b3b5dc53d5de5U;
+ source.signExp = 0x5a92;
+ source.signif = 0x9e8b3b5dc53d5de5U;
break;
case 0x3f: // 1.0e4096
- source.high = 0x7525;
- source.low = 0xc46052028a20979bU;
+ source.signExp = 0x7525;
+ source.signif = 0xc46052028a20979bU;
break;
default:
@@ -1408,251 +1417,367 @@ void m68000_musashi_device::fpgen_rm_reg(u16 w2)
// handle it right here, the usual opmode bits aren't valid in the FMOVECR case
m_fpr[dst] = source;
- SET_CONDITION_CODES(m_fpr[dst]);
+ set_condition_codes(m_fpr[dst]);
m_icount -= 4;
return;
}
default: fatalerror("fmove_rm_reg: invalid source specifier %x at %08X\n", src, m_pc-4);
}
+
+ LOGMASKED(LOG_LOADSTORE, "Load source type %d = %f (PC=%08x)\n", src, fx80_to_double(source), m_ppc);
}
else
{
source = m_fpr[src];
+ LOGMASKED(LOG_LOADSTORE, "Load source from FPR %d = %f (PC=%08x)\n", src, fx80_to_double(source), m_ppc);
}
-
+ LOGMASKED(LOG_INSTRUCTIONS, "FPU: opmode %02x (PC=%08x)\n", opmode, m_ppc);
+ const extFloat80_t dstCopy = m_fpr[dst];
+ if (opmode != 0)
+ {
+ clear_exception_flags();
+ }
switch (opmode)
{
case 0x00: // FMOVE
{
m_fpr[dst] = source;
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 4;
+ set_condition_codes(m_fpr[dst]);
+ m_icount -= 56;
break;
}
case 0x01: // FINT
{
- s32 temp;
- temp = floatx80_to_int32(source);
- m_fpr[dst] = int32_to_floatx80(temp);
- SET_CONDITION_CODES(m_fpr[dst]);
+ s32 temp = convert_to_int(source, INT32_MIN, INT32_MAX);
+ m_fpr[dst] = i32_to_extF80(temp);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ m_icount -= 78;
break;
}
case 0x03: // FINTRZ
{
- s32 temp;
- temp = floatx80_to_int32_round_to_zero(source);
- m_fpr[dst] = int32_to_floatx80(temp);
- SET_CONDITION_CODES(m_fpr[dst]);
+ s32 temp = extF80_to_i32_r_minMag(source, true);
+ m_fpr[dst] = i32_to_extF80(temp);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, 0);
+ m_icount -= 78;
break;
}
case 0x04: // FSQRT
{
- m_fpr[dst] = floatx80_sqrt(source);
- SET_CONDITION_CODES(m_fpr[dst]);
+ m_fpr[dst] = extF80_sqrt(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
m_icount -= 109;
break;
}
case 0x06: // FLOGNP1
{
- m_fpr[dst] = floatx80_flognp1(source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 594; // for MC68881
+ m_fpr[dst] = extFloat80_lognp1(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT | EXC_ENB_UNDFLOW);
+ m_icount -= 594;
break;
}
- case 0x0a: // FATAN
+ case 0x0a: // FATAN
{
- m_fpr[dst] = floatx80_fatan (source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 426; // for MC68881
+ m_fpr[dst] = source;
+ m_fpr[dst] = extFloat80_68katan(m_fpr[dst]);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT | EXC_ENB_UNDFLOW);
+ m_icount -= 426;
break;
}
case 0x0e: // FSIN
{
m_fpr[dst] = source;
- floatx80_fsin(m_fpr[dst]);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 75;
+ extFloat80_sin(m_fpr[dst]);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT | EXC_ENB_UNDFLOW);
+ m_icount -= 414;
break;
}
case 0x0f: // FTAN
{
m_fpr[dst] = source;
- floatx80_ftan(m_fpr[dst]);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 75;
+ extFloat80_tan(m_fpr[dst]);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT | EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 496;
break;
}
case 0x14: // FLOGN
{
- m_fpr[dst] = floatx80_flogn (source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 548; // for MC68881
+ m_fpr[dst] = extFloat80_logn(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ m_icount -= 548;
break;
}
case 0x15: // FLOG10
{
- m_fpr[dst] = floatx80_flog10 (source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 604; // for MC68881
+ m_fpr[dst] = extFloat80_log10 (source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ m_icount -= 604;
break;
}
case 0x16: // FLOG2
{
- m_fpr[dst] = floatx80_flog2 (source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 604; // for MC68881
+ m_fpr[dst] = extFloat80_log2 (source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ m_icount -= 604;
break;
}
case 0x18: // FABS
{
m_fpr[dst] = source;
- m_fpr[dst].high &= 0x7fff;
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 3;
+ m_fpr[dst].signExp &= 0x7fff;
+ set_condition_codes(m_fpr[dst]);
+ m_icount -= 58;
break;
}
case 0x1a: // FNEG
{
m_fpr[dst] = source;
- m_fpr[dst].high ^= 0x8000;
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 3;
+ m_fpr[dst].signExp ^= 0x8000;
+ set_condition_codes(m_fpr[dst]);
+ m_icount -= 58;
break;
}
case 0x1d: // FCOS
{
m_fpr[dst] = source;
- floatx80_fcos(m_fpr[dst]);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 75;
+ extFloat80_cos(m_fpr[dst]);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, EXC_ENB_INEXACT);
+ m_icount -= 414;
break;
}
case 0x1e: // FGETEXP
{
s16 temp2;
- temp2 = source.high; // get the exponent
+ temp2 = source.signExp; // get the exponent
temp2 -= 0x3fff; // take off the bias
m_fpr[dst] = double_to_fx80((double)temp2);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 6;
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FGETEXP: %f\n", fx80_to_double(m_fpr[dst]));
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, 0); // only NaNs can raise an exception here
+ m_icount -= 68;
break;
}
case 0x1f: // FGETMAN
{
- m_fpr[dst] = getman(source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 31;
+ m_fpr[dst] = extFloat80_getman(source);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FGETMAN: %f\n", fx80_to_double(m_fpr[dst]));
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, source, 0); // only NaNs can raise an exception here
+ m_icount -= 54;
break;
}
case 0x60: // FSDIVS
+ {
+ float32_t sngSrc, sngDst;
+ sngSrc = extF80_to_f32(source);
+ sngDst = extF80_to_f32(m_fpr[dst]);
+ if (f32_eq(sngSrc, i32_to_f32(0)))
+ {
+ m_fpsr |= FPES_DIVZERO | FPAE_DIVZERO;
+ }
+ sngDst = f32_div(sngDst, sngSrc);
+ m_fpr[dst] = f32_to_extF80(sngDst);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 124;
+ break;
+ }
+ case 0x64: // FDDIV
+ {
+ float64_t sngSrc, sngDst;
+ sngSrc = extF80_to_f64(source);
+ sngDst = extF80_to_f64(m_fpr[dst]);
+ if (f64_eq(sngSrc, i32_to_f64(0)))
+ {
+ m_fpsr |= FPES_DIVZERO | FPAE_DIVZERO;
+ }
+ sngDst = f64_div(sngDst, sngSrc);
+ m_fpr[dst] = f64_to_extF80(sngDst);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 130;
+ break;
+ }
case 0x20: // FDIV
{
- m_fpr[dst] = floatx80_div(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 43;
+ if (extF80_eq(source, i32_to_extF80(0)))
+ {
+ m_fpsr |= FPES_DIVZERO | FPAE_DIVZERO;
+ }
+ m_fpr[dst] = extF80_div(m_fpr[dst], source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_OVRFLOW|EXC_ENB_UNDFLOW);
+ m_icount -= 128;
break;
}
case 0x21: // FMOD
{
- s8 const mode = float_rounding_mode;
- float_rounding_mode = float_round_to_zero;
- m_fpr[dst] = floatx80_rem(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- float_rounding_mode = mode;
- m_icount -= 43; // guess
+ s8 const mode = softfloat_roundingMode;
+ uint64_t quotient;
+ softfloat_roundingMode = softfloat_round_minMag;
+ extFloat80_remainder(m_fpr[dst], source, m_fpr[dst], quotient);
+ set_condition_codes(m_fpr[dst]);
+ softfloat_roundingMode = mode;
+ m_fpsr &= 0xff00ffff;
+ m_fpsr |= (quotient & 0x7f) << 16;
+ if (m_fpr[dst].signExp & 0x8000)
+ {
+ m_fpsr |= 0x00800000;
+ }
+ m_icount -= 95;
break;
}
case 0x22: // FADD
{
- m_fpr[dst] = floatx80_add(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 9;
+ m_fpr[dst] = extF80_add(m_fpr[dst], source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_OVRFLOW|EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FADD: %f + %f = %f\n", fx80_to_double(dstCopy), fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 76;
break;
}
case 0x63: // FSMULS (JFF)
case 0x23: // FMUL
{
- m_fpr[dst] = floatx80_mul(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 11;
+ m_fpr[dst] = extF80_mul(m_fpr[dst], source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FMUL: %f * %f = %f\n", fx80_to_double(dstCopy), fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 96;
break;
}
case 0x24: // FSGLDIV
{
- float32 a = floatx80_to_float32( m_fpr[dst] );
- float32 b = floatx80_to_float32( source );
- m_fpr[dst] = float32_to_floatx80( float32_div(a, b) );
- m_icount -= 43; // // ? (value is from FDIV)
+ float32_t a = extF80_to_f32( m_fpr[dst] );
+ float32_t b = extF80_to_f32( source );
+ m_fpr[dst] = f32_to_extF80( f32_div(a, b) );
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_INEXACT | EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 94;
break;
}
case 0x25: // FREM
{
- s8 const mode = float_rounding_mode;
- float_rounding_mode = float_round_nearest_even;
- m_fpr[dst] = floatx80_rem(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- float_rounding_mode = mode;
- m_icount -= 43; // guess
+ s8 const mode = softfloat_roundingMode;
+ uint64_t quotient;
+ softfloat_roundingMode = softfloat_round_near_even;
+ extFloat80_ieee754_remainder(m_fpr[dst], source, m_fpr[dst], quotient);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(dstCopy, source, EXC_ENB_UNDFLOW);
+ softfloat_roundingMode = mode;
+ m_fpsr &= 0xff00ffff;
+ m_fpsr |= (quotient & 0x7f) << 16;
+ if (m_fpr[dst].signExp & 0x8000)
+ {
+ m_fpsr |= 0x00800000;
+ }
+ m_icount -= 125;
break;
}
case 0x26: // FSCALE
{
- m_fpr[dst] = floatx80_scale(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 46; // (better?) guess
+ m_fpr[dst] = extFloat80_scale(m_fpr[dst], source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 66;
break;
}
case 0x27: // FSGLMUL
{
- float32 a = floatx80_to_float32( m_fpr[dst] );
- float32 b = floatx80_to_float32( source );
- m_fpr[dst] = float32_to_floatx80( float32_mul(a, b) );
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 11; // ? (value is from FMUL)
+ float32_t a = extF80_to_f32( m_fpr[dst] );
+ float32_t b = extF80_to_f32( source );
+ m_fpr[dst] = f32_to_extF80( f32_mul(a, b) );
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_INEXACT | EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ m_icount -= 94;
break;
}
- case 0x28: // FSUB
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f: // FSUB
{
- m_fpr[dst] = floatx80_sub(m_fpr[dst], source);
- SET_CONDITION_CODES(m_fpr[dst]);
- m_icount -= 9;
+ m_fpr[dst] = extF80_sub(m_fpr[dst], source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_INEXACT | EXC_ENB_OVRFLOW | EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FSUB: %f - %f = %f\n", fx80_to_double(dstCopy), fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 76;
break;
}
- case 0x30: // FSINCOS
- case 0x31:
- case 0x32:
- case 0x33:
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37:
+
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35:
+ case 0x36: case 0x37: // FSINCOS
{
- m_fpr[dst] = source;
- floatx80_fsin(m_fpr[dst]);
- SET_CONDITION_CODES(m_fpr[dst]); // condition codes are set for the sine result
+ extFloat80_sincos(source, &m_fpr[dst], &m_fpr[w2 & 7]);
+ set_condition_codes(m_fpr[dst]); // CCs are set on the sin result
+ sync_exception_flags(source, dstCopy, EXC_ENB_INEXACT | EXC_ENB_UNDFLOW);
+ m_icount -= 474;
+ break;
+ }
- m_fpr[(w2 & 0x7)] = source;
- floatx80_fcos(m_fpr[(w2 & 0x7)]);
- m_icount -= 451;
+ case 0x38: case 0x39: case 0x3c: case 0x3d: // FCMP
+ {
+ const extFloat80_t res = extF80_sub(m_fpr[dst], source);
+ set_condition_codes(res);
+ sync_exception_flags(source, dstCopy, 0);
+
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FCMP: %f - %f = %f\n", fx80_to_double(dstCopy), fx80_to_double(source), fx80_to_double(res));
+ m_icount -= 58;
+ break;
+ }
+ case 0x3a: case 0x3b: case 0x3e: case 0x3f: // FTST
+ {
+ set_condition_codes(source);
+ sync_exception_flags(source, dstCopy, 0);
+ m_icount -= 56;
+ break;
+ }
+ case 0x08: // FETOXM1
+ {
+ m_fpr[dst] = extF80_sub(extFloat80_etox(source), i32_to_extF80(1));
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FETOXM1: e ** %f - 1 = %f\n", fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 568;
+ break;
+ }
+ case 0x10: // FETOX
+ {
+ m_fpr[dst] = extFloat80_etox(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FETOX: e ** %f = %f\n", fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 520;
break;
}
- case 0x38: // FCMP
+ case 0x11: // FTWOTOX
{
- floatx80 res;
- res = floatx80_sub(m_fpr[dst], source);
- SET_CONDITION_CODES(res);
- m_icount -= 7;
+ m_fpr[dst] = extFloat80_2tox(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_UNDFLOW);
+ printf("FTWOTOX: 2 ** %f = %f\n", fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 590;
break;
}
- case 0x3a: // FTST
+ case 0x12: // FTENTOX
{
- floatx80 res;
- res = source;
- SET_CONDITION_CODES(res);
- m_icount -= 7;
+ m_fpr[dst] = extFloat80_10tox(source);
+ set_condition_codes(m_fpr[dst]);
+ sync_exception_flags(source, dstCopy, EXC_ENB_UNDFLOW);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FTENTOX: 10 ** %f = %f\n", fx80_to_double(source), fx80_to_double(m_fpr[dst]));
+ m_icount -= 590;
break;
}
@@ -1671,13 +1796,15 @@ void m68000_musashi_device::fmove_reg_mem(u16 w2)
{
case 0: // Long-Word Integer
{
- s32 d = (s32)floatx80_to_int32(m_fpr[src]);
+ s32 d = convert_to_int(m_fpr[src], INT32_MIN, INT32_MAX);
WRITE_EA_32(ea, d);
break;
}
case 1: // Single-precision Real
{
- u32 d = floatx80_to_float32(m_fpr[src]);
+ u32 d;
+ float32_t *pF = (float32_t *)&d;
+ *pF = extF80_to_f32(m_fpr[src]);
WRITE_EA_32(ea, d);
break;
}
@@ -1685,9 +1812,9 @@ void m68000_musashi_device::fmove_reg_mem(u16 w2)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- uint32 di_mode_ea = mode == 5 ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
+ uint32_t offset = (mode == 5) ? MAKE_INT_16(m68ki_read_imm_16()) : 0;
- WRITE_EA_FPE(mode, reg, m_fpr[src], di_mode_ea);
+ WRITE_EA_FPE(mode, reg, m_fpr[src], offset);
break;
}
case 3: // Packed-decimal Real with Static K-factor
@@ -1699,31 +1826,25 @@ void m68000_musashi_device::fmove_reg_mem(u16 w2)
}
case 4: // Word Integer
{
- s32 value = floatx80_to_int32(m_fpr[src]);
- if (value > 0x7fff || value < -0x8000 )
- {
- m_fpsr |= FPES_OE | FPAE_IOP;
- }
- WRITE_EA_16(ea, (s16)value);
+ LOGMASKED(LOG_INSTRUCTIONS_VERBOSE, "FMOVE: %f to reg %d\n", fx80_to_double(m_fpr[src]), dst);
+ s16 value = (s16)convert_to_int(m_fpr[src], INT16_MIN, INT16_MAX);
+ WRITE_EA_16(ea, value);
break;
}
case 5: // Double-precision Real
{
u64 d;
-
- d = floatx80_to_float64(m_fpr[src]);
-
+ float64_t *pF = (float64_t *)&d;
+ clear_exception_flags();
+ *pF = extF80_to_f64(m_fpr[src]);
+ sync_exception_flags(m_fpr[src], m_fpr[src], 0);
WRITE_EA_64(ea, d);
break;
}
case 6: // Byte Integer
{
- s32 value = floatx80_to_int32(m_fpr[src]);
- if (value > 127 || value < -128)
- {
- m_fpsr |= FPES_OE | FPAE_IOP;
- }
- WRITE_EA_8(ea, (s8) value);
+ s8 value = (s8)convert_to_int(m_fpr[src], INT8_MIN, INT8_MAX);
+ WRITE_EA_8(ea, value);
break;
}
case 7: // Packed-decimal Real with Dynamic K-factor
@@ -1741,36 +1862,83 @@ void m68000_musashi_device::fmove_fpcr(u16 w2)
int ea = m_ir & 0x3f;
int dir = (w2 >> 13) & 0x1;
int regsel = (w2 >> 10) & 0x7;
+ int reg = ea & 7;
int mode = (ea >> 3) & 0x7;
- if ((mode == 5) || (mode == 6))
+ LOGMASKED(LOG_FPSR, "FMOVE FP*R: EA %x dir %x reg %d mode %d regsel %x\n", ea, dir, reg, mode, regsel);
+
+ u32 address = 0;
+ switch (mode)
{
- u32 address = 0xffffffff; // force a bus error if this doesn't get assigned
+ case 0: // Dn
+ case 1: // An
+ break;
- if (mode == 5)
- {
- address = EA_AY_DI_32();
- }
- else if (mode == 6)
+ case 2: // (An)
+ address = REG_A()[reg];
+ break;
+
+ case 3: // (An)+
+ case 4: // -(An)
+ break;
+
+ case 5: // (d16, An)
+ address = EA_AY_DI_32();
+ break;
+
+ case 6: // (An) + (Xn) + d8
+ address = EA_AY_IX_32();
+ break;
+
+ case 7:
+ {
+ switch (reg)
{
- address = EA_AY_IX_32();
- }
+ case 0: // (xxx).W
+ address = OPER_I_16();
+ break;
- if (dir) // From system control reg to <ea>
+ case 1: // (xxx).L
+ {
+ u32 d1 = OPER_I_16();
+ u32 d2 = OPER_I_16();
+ address = (d1 << 16) | d2;
+ }
+ break;
+ case 2: // (d16, PC)
+ address = EA_PCDI_32();
+ break;
+
+ case 3: // (PC) + (Xn) + d8
+ address = EA_PCIX_32();
+ break;
+
+ case 4: // #<data>
{
- if (regsel & 4) { m68ki_write_32(address, m_fpcr); address += 4; }
- if (regsel & 2) { m68ki_write_32(address, m_fpsr); address += 4; }
- if (regsel & 1) { m68ki_write_32(address, m_fpiar); address += 4; }
+ if (regsel & 4) m_fpcr = READ_EA_32(ea);
+ else if (regsel & 2) m_fpsr = READ_EA_32(ea);
+ else if (regsel & 1) m_fpiar = READ_EA_32(ea);
+ return;
}
- else // From <ea> to system control reg
- {
- if (regsel & 4) { m_fpcr = m68ki_read_32(address); address += 4; }
- if (regsel & 2) { m_fpsr = m68ki_read_32(address); address += 4; }
- if (regsel & 1) { m_fpiar = m68ki_read_32(address); address += 4; }
+
+ default:
+ fatalerror("M68kFPU: fmove_fpcr: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
+ break;
}
}
- else
+ break;
+
+ default:
+ fatalerror("M68kFPU: fmove_fpcr: unhandled mode %d, reg %d at %08X\n", mode, reg, m_pc);
+ break;
+ }
+
+ switch (mode)
{
+ case 0: // Dn
+ case 1: // An
+ case 3: // (An)+
+ case 4: // -(An)
if (dir) // From system control reg to <ea>
{
if (regsel & 4) WRITE_EA_32(ea, m_fpcr);
@@ -1779,14 +1947,50 @@ void m68000_musashi_device::fmove_fpcr(u16 w2)
}
else // From <ea> to system control reg
{
+ if (regsel & 4) m_fpcr = READ_EA_32(ea);
+ if (regsel & 2) m_fpsr = READ_EA_32(ea);
+ if (regsel & 1) m_fpiar = READ_EA_32(ea);
+ }
+ break;
+
+ default:
+ if (dir) // From system control reg to <ea>
+ {
if (regsel & 4)
{
- m_fpcr = READ_EA_32(ea);
- // should update softfloat rounding mode here
+ m68ki_write_32(address, m_fpcr);
+ address += 4;
+ }
+ if (regsel & 2)
+ {
+ m68ki_write_32(address, m_fpsr);
+ address += 4;
+ }
+ if (regsel & 1)
+ {
+ m68ki_write_32(address, m_fpiar);
+ address += 4;
+ }
+ }
+ else // From <ea> to system control reg
+ {
+ if (regsel & 4)
+ {
+ m_fpcr = m68ki_read_32(address);
+ address += 4;
+ }
+ if (regsel & 2)
+ {
+ m_fpsr = m68ki_read_32(address);
+ address += 4;
+ }
+ if (regsel & 1)
+ {
+ m_fpiar = m68ki_read_32(address);
+ address += 4;
}
- if (regsel & 2) m_fpsr = READ_EA_32(ea);
- if (regsel & 1) m_fpiar = READ_EA_32(ea);
}
+ break;
}
// FIXME: (2011-12-18 ost)
@@ -1800,44 +2004,42 @@ void m68000_musashi_device::fmove_fpcr(u16 w2)
int rnd = (m_fpcr >> 4) & 3;
int prec = (m_fpcr >> 6) & 3;
-// logerror("m68k_fpsp:fmove_fpcr fpcr=%04x prec=%d rnd=%d\n", m_fpcr, prec, rnd);
+ // logerror("fmove_fpcr: fpcr=%04x prec=%d rnd=%d\n", m_fpcr, prec, rnd);
-#ifdef FLOATX80
switch (prec)
{
case 0: // Extend (X)
- floatx80_rounding_precision = 80;
+ extF80_roundingPrecision = 80;
break;
case 1: // Single (S)
- floatx80_rounding_precision = 32;
+ extF80_roundingPrecision = 32;
break;
case 2: // Double (D)
- floatx80_rounding_precision = 64;
+ extF80_roundingPrecision = 64;
break;
case 3: // Undefined
- floatx80_rounding_precision = 80;
+ extF80_roundingPrecision = 80;
break;
}
-#endif
switch (rnd)
{
case 0: // To Nearest (RN)
- float_rounding_mode = float_round_nearest_even;
+ softfloat_roundingMode = softfloat_round_near_even;
break;
case 1: // To Zero (RZ)
- float_rounding_mode = float_round_to_zero;
+ softfloat_roundingMode = softfloat_round_minMag;
break;
case 2: // To Minus Infinitiy (RM)
- float_rounding_mode = float_round_down;
+ softfloat_roundingMode = softfloat_round_min;
break;
case 3: // To Plus Infinitiy (RP)
- float_rounding_mode = float_round_up;
+ softfloat_roundingMode = softfloat_round_max;
break;
}
}
- m_icount -= 10;
+ m_icount -= 30;
}
void m68000_musashi_device::fmovem(u16 w2)
@@ -1852,11 +2054,10 @@ void m68000_musashi_device::fmovem(u16 w2)
{
switch (mode)
{
- case 1: // Dynamic register list, postincrement or control addressing mode.
- // FIXME: not really tested, but seems to work
+ case 1: // dynamic register list, predecrement addressing mode
reglist = REG_D()[(reglist >> 4) & 7];
[[fallthrough]];
- case 0: // Static register list, predecrement or control addressing mode
+ case 0: // static register list, predecrement addressing mode
{
// the "di_mode_ea" parameter kludge is required here else WRITE_EA_FPE would have
// to call EA_AY_DI_32() (that advances PC & reads displacement) each time
@@ -1864,65 +2065,40 @@ void m68000_musashi_device::fmovem(u16 w2)
// this forces to pre-read the mode (named "imode") so we can decide to read displacement, only once
int imode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- int di_mode = imode == 5;
- uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
+ uint32_t offset = (imode == 5) ? MAKE_INT_16(m68ki_read_imm_16()) : 0;
- if (reglist)
+ for (i=0; i < 8; i++)
{
- for (i=0; i < 8; i++)
+ if (reglist & (1 << i))
{
- if (reglist & (1 << i))
- {
- WRITE_EA_FPE(imode, reg, m_fpr[i], di_mode_ea);
- if (di_mode)
- {
- di_mode_ea += 12;
- }
-
- m_icount -= 2;
- }
+ WRITE_EA_FPE(imode, reg, m_fpr[i], offset);
+ offset += 12;
+
+ m_icount -= 2;
}
}
- else if (imode == 6)
- // advance PC if the register list is empty
- EA_AY_IX_32();
- else if (imode == 7)
- fatalerror("m68881: fmovem addressing mode %d unimplemented at 0x%08x\n", imode, m_pc - 4);
break;
}
- case 3: // Dynamic register list, postincrement or control addressing mode.
- // FIXME: not really tested, but seems to work
+ case 3: // dynamic register list, postincrement or control addressing mode
reglist = REG_D()[(reglist >> 4) & 7];
[[fallthrough]];
- case 2: // Static register list, postdecrement or control addressing mode
+ case 2: // static register list, postincrement or control addressing mode
{
int imode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- int di_mode = (imode == 5);
- uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
+ uint32_t offset = (imode == 5) ? MAKE_INT_16(m68ki_read_imm_16()) : 0;
- if (reglist)
+ for (i=0; i < 8; i++)
{
- for (i=0; i < 8; i++)
+ if (reglist & (1 << i))
{
- if (reglist & (1 << i))
- {
- WRITE_EA_FPE(imode, reg, m_fpr[7 - i], di_mode_ea);
- if (di_mode)
- {
- di_mode_ea += 12;
- }
-
- m_icount -= 2;
- }
+ WRITE_EA_FPE(imode, reg, m_fpr[7 - i], offset);
+ offset += 12;
+
+ m_icount -= 2;
}
}
- else if (imode == 6)
- // advance PC if the register list is empty
- EA_AY_IX_32();
- else if (imode == 7)
- fatalerror("m68881: fmovem addressing mode %d unimplemented at 0x%08x\n", imode, m_pc - 4);
break;
}
@@ -1933,26 +2109,23 @@ void m68000_musashi_device::fmovem(u16 w2)
{
switch (mode)
{
- case 3: // Dynamic register list, predecrement addressing mode.
+ case 3: // dynamic register list, postincrement or control addressing mode
// FIXME: not really tested, but seems to work
reglist = REG_D()[(reglist >> 4) & 7];
[[fallthrough]];
- case 2: // Static register list, postincrement or control addressing mode
+ case 2: // static register list, postincrement or control addressing mode
{
int imode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
- int di_mode = (imode == 5);
- uint32 di_mode_ea = di_mode ? (REG_A()[reg] + MAKE_INT_16(m68ki_read_imm_16())) : 0;
+ uint32_t offset = (imode == 5) ? MAKE_INT_16(m68ki_read_imm_16()) : 0;
for (i=0; i < 8; i++)
{
if (reglist & (1 << i))
{
- m_fpr[7 - i] = READ_EA_FPE(imode, reg, di_mode_ea);
- if (di_mode)
- {
- di_mode_ea += 12;
- }
+ m_fpr[7 - i] = READ_EA_FPE(imode, reg, offset);
+ offset += 12;
+
m_icount -= 2;
}
}
@@ -1968,7 +2141,7 @@ void m68000_musashi_device::fscc()
{
const int mode = (m_ir & 0x38) >> 3;
const int condition = OPER_I_16() & 0x3f;
- const int v = (TEST_CONDITION(condition) ? 0xff : 0x00);
+ const int v = (test_condition(condition) ? 0xff : 0x00);
switch (mode)
{
@@ -1995,7 +2168,7 @@ void m68000_musashi_device::fbcc16()
offset = (s16)(OPER_I_16());
// TODO: condition and jump!!!
- if (TEST_CONDITION(condition))
+ if (test_condition(condition))
{
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_16(offset-2);
@@ -2012,7 +2185,7 @@ void m68000_musashi_device::fbcc32()
offset = OPER_I_32();
// TODO: condition and jump!!!
- if (TEST_CONDITION(condition))
+ if (test_condition(condition))
{
m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
m68ki_branch_32(offset-4);
@@ -2021,7 +2194,6 @@ void m68000_musashi_device::fbcc32()
m_icount -= 7;
}
-
void m68000_musashi_device::m68040_fpu_op0()
{
m_fpu_just_reset = 0;
@@ -2144,8 +2316,8 @@ void m68000_musashi_device::do_frestore_null()
m_fpiar = 0;
for (i = 0; i < 8; i++)
{
- m_fpr[i].high = 0x7fff;
- m_fpr[i].low = 0xffffffffffffffffU;
+ m_fpr[i].signExp = 0x7fff;
+ m_fpr[i].signif = 0xffffffffffffffffU;
}
// Mac IIci at 408458e6 wants an FSAVE of a just-restored nullptr frame to also be nullptr
@@ -2333,7 +2505,7 @@ void m68000_musashi_device::m68881_ftrap()
u16 w2 = OPER_I_16();
// now check the condition
- if (TEST_CONDITION(w2 & 0x3f))
+ if (test_condition(w2 & 0x3f))
{
// trap here
m68ki_exception_trap(EXCEPTION_TRAPV);
@@ -2355,3 +2527,44 @@ void m68000_musashi_device::m68881_ftrap()
}
}
}
+
+// Read the FPU's Coprocessor Interface Registers (CIRs).
+// References: MC68881/68882 Coprocessor User's Manual 1st Edition,
+// pages 7-1 to 7-8 and M68030 User's Manual 3rd Edition page 7-69.
+u32 m68000_musashi_device::m6888x_read_cir(offs_t offset)
+{
+ // If no FPU is present, reading any CIRs causes a bus error.
+ // Pre-1992 Macintosh ROMs use this method to detect the presence
+ // of an FPU. 1992 and later ROMs just execute FNOP and check for
+ // an F-line trap, because this mechanism does not exist on the 68040.
+ if (!m_has_fpu)
+ {
+ m68k_cause_bus_error();
+ }
+
+ // TODO: actually try to return meaningful values?
+ // offset function
+ // 0x00 Response read-only 16 bit (value in D31-D16)
+ // 0x02 Control write-only 16
+ // 0x04 Save read 16
+ // 0x06 Restore read/write 16
+ // 0x08 Operation Word read/write 16
+ // 0x0a Command write-only 16
+ // 0x0c (reserved) N/A 16
+ // 0x0e Condition write-only 16
+ // 0x10 Operand read/write 32 bit
+ // 0x14 Register Select read-only 16
+ // 0x18 Instruction Address write-only 32
+ // 0x1c Operand Address read/write 32
+ return 0;
+}
+
+void m68000_musashi_device::m6888x_write_cir(offs_t offset, u32 data)
+{
+ if (!m_has_fpu)
+ {
+ m68k_cause_bus_error();
+ }
+
+ // TODO: actually do something with these values?
+}
diff --git a/src/devices/cpu/m68000/m68kmmu.h b/src/devices/cpu/m68000/m68kmmu.h
index 28a4272f6b1..1f9c4062eb7 100644
--- a/src/devices/cpu/m68000/m68kmmu.h
+++ b/src/devices/cpu/m68000/m68kmmu.h
@@ -1086,7 +1086,7 @@ void m68851_pmove_put(u32 ea, u16 modes)
m_pmmu_enabled = 0;
MMULOG("PMMU disabled\n");
}
- m_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
+ m_can_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
if (!(modes & 0x100)) // flush ATC on moves to TC, SRP, CRP with FD bit clear
{
diff --git a/src/devices/cpu/m68000/m68kmusashi.h b/src/devices/cpu/m68000/m68kmusashi.h
index aa89ea40d80..dba8555ae53 100644
--- a/src/devices/cpu/m68000/m68kmusashi.h
+++ b/src/devices/cpu/m68000/m68kmusashi.h
@@ -7,15 +7,8 @@
#include "m68kcommon.h"
-// SoftFloat 2 lacks an include guard
-#ifndef softfloat2_h
-#define softfloat2_h 1
-#include "softfloat/milieu.h"
-#include "softfloat/softfloat.h"
-#endif
-
-extern flag floatx80_is_nan(floatx80 a);
-
+#include "softfloat3/source/include/softfloat.h"
+#include "softfloat3/bochs_ext/softfloat3_ext.h"
/* MMU constants */
constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22
@@ -107,9 +100,9 @@ protected:
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == M68K_LINE_BUSERROR || (m_interrupt_mixer ? inputnum == M68K_IRQ_7 : false); }
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
virtual void device_pre_save() override;
virtual void device_post_load() override;
@@ -128,6 +121,7 @@ public:
void set_emmu_enable(bool enable);
bool get_pmmu_enable() const {return m_pmmu_enabled;}
void set_fpu_enable(bool enable);
+ bool get_fpu_enable() const { return m_has_fpu; }
void set_buserror_details(u32 fault_addr, u8 rw, u8 fc, bool rerun = false);
void restart_this_instruction();
@@ -152,7 +146,7 @@ protected:
u32 m_cacr; /* Cache Control Register (m68020, unemulated) */
u32 m_caar; /* Cache Address Register (m68020, unemulated) */
u32 m_ir; /* Instruction Register */
- floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */
+ extFloat80_t m_fpr[8]; /* FPU Data Register (m68030/040) */
u32 m_fpiar; /* FPU Instruction Address Register (m68040) */
u32 m_fpsr; /* FPU Status Register (m68040) */
u32 m_fpcr; /* FPU Control Register (m68040) */
@@ -178,7 +172,7 @@ protected:
bool m_pmmu_enabled; /* Indicates if the PMMU is enabled */
int m_hmmu_enabled; /* Indicates if the HMMU is enabled */
bool m_emmu_enabled; /* Indicates if external MMU is enabled */
- bool m_instruction_restart; /* Save DA regs for potential instruction restart */
+ bool m_can_instruction_restart; /* Save DA regs for potential instruction restart */
bool m_fpu_just_reset; /* Indicates the FPU was just reset */
bool m_restart_instruction; /* Indicates the instruction should be restarted */
@@ -226,7 +220,9 @@ protected:
void init8(address_space &space, address_space &ospace);
void init16(address_space &space, address_space &ospace);
void init32(address_space &space, address_space &ospace);
+ void init32_no_smear(address_space &space, address_space &ospace);
void init32mmu(address_space &space, address_space &ospace);
+ void init32mmu_no_smear(address_space &space, address_space &ospace);
void init32hmmu(address_space &space, address_space &ospace);
std::function<u16 (offs_t)> m_readimm16; // Immediate read 16 bit
@@ -302,7 +298,7 @@ protected:
void init_cpu_scc68070(void);
void init_cpu_coldfire(void);
- void default_autovectors_map(address_map &map);
+ void default_autovectors_map(address_map &map) ATTR_COLD;
void m68ki_exception_interrupt(u32 int_level);
@@ -329,48 +325,45 @@ protected:
#include "m68kops.h"
#include "m68kmmu.h"
- static double fx80_to_double(floatx80 fx)
+ static double fx80_to_double(extFloat80_t fx)
{
- u64 d;
- double *foo;
-
- foo = (double *)&d;
-
- d = floatx80_to_float64(fx);
+ const float64_t d = extF80_to_f64(fx);
+ const double *foo = (double *)&d;
return *foo;
}
- static floatx80 double_to_fx80(double in)
+ static extFloat80_t double_to_fx80(double in)
{
- u64 *d;
-
- d = (u64 *)&in;
+ float64_t *d = (float64_t *)&in;
- return float64_to_floatx80(*d);
+ return f64_to_extF80(*d);
}
// defined in m68kfpu.cpp
static const u32 pkmask2[18];
static const u32 pkmask3[18];
- inline floatx80 load_extended_float80(u32 ea);
- inline void store_extended_float80(u32 ea, floatx80 fpr);
- inline floatx80 load_pack_float80(u32 ea);
- inline void store_pack_float80(u32 ea, int k, floatx80 fpr);
- inline void SET_CONDITION_CODES(floatx80 reg);
- inline int TEST_CONDITION(int condition);
+ inline extFloat80_t load_extended_float80(u32 ea);
+ inline void store_extended_float80(u32 ea, extFloat80_t fpr);
+ inline extFloat80_t load_pack_float80(u32 ea);
+ inline void store_pack_float80(u32 ea, int k, extFloat80_t fpr);
+ void set_condition_codes(extFloat80_t reg);
+ int test_condition(int condition);
+ void clear_exception_flags();
+ void sync_exception_flags(extFloat80_t op1, extFloat80_t op2, u32 enables);
+ s32 convert_to_int(extFloat80_t source, s32 lowerLimit, s32 upperLimit);
u8 READ_EA_8(int ea);
u16 READ_EA_16(int ea);
u32 READ_EA_32(int ea);
u64 READ_EA_64(int ea);
- floatx80 READ_EA_FPE(int mode, int reg, uint32 di_mode_ea);
- floatx80 READ_EA_PACK(int ea);
+ extFloat80_t READ_EA_FPE(int mode, int reg, uint32_t offset);
+ extFloat80_t READ_EA_PACK(int ea);
void WRITE_EA_8(int ea, u8 data);
void WRITE_EA_16(int ea, u16 data);
void WRITE_EA_32(int ea, u32 data);
void WRITE_EA_64(int ea, u64 data);
- void WRITE_EA_FPE(int mode, int reg, floatx80 fpr, uint32 di_mode_ea);
- void WRITE_EA_PACK(int ea, int k, floatx80 fpr);
+ void WRITE_EA_FPE(int mode, int reg, extFloat80_t fpr, uint32_t offset);
+ void WRITE_EA_PACK(int ea, int k, extFloat80_t fpr);
void fpgen_rm_reg(u16 w2);
void fmove_reg_mem(u16 w2);
void fmove_fpcr(u16 w2);
@@ -385,6 +378,8 @@ protected:
void m68040_do_frestore(u32 addr, int reg);
void m68040_fpu_op1();
void m68881_ftrap();
+ u32 m6888x_read_cir(offs_t offset);
+ void m6888x_write_cir(offs_t offset, u32 data);
};
#endif // MAME_CPU_M68000_M68KMUSASHI_H
diff --git a/src/devices/cpu/m68000/m68kops.cpp b/src/devices/cpu/m68000/m68kops.cpp
index 79eadced2bb..0b0af3ff059 100644
--- a/src/devices/cpu/m68000/m68kops.cpp
+++ b/src/devices/cpu/m68000/m68kops.cpp
@@ -20216,7 +20216,7 @@ void m68000_musashi_device::x4e7b_movec_l_4()
{
m_pmmu_enabled = 0;
}
- m_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
+ m_can_instruction_restart = m_pmmu_enabled || m_emmu_enabled;
break;
case 0x004: /* ITT0 */
m_mmu_itt0 = REG_DA()[(word2 >> 12) & 15];
diff --git a/src/devices/cpu/m68000/mcf5206e.h b/src/devices/cpu/m68000/mcf5206e.h
index 7455a8c3119..425d54504eb 100644
--- a/src/devices/cpu/m68000/mcf5206e.h
+++ b/src/devices/cpu/m68000/mcf5206e.h
@@ -20,7 +20,7 @@ public:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
DECLARE_DEVICE_TYPE(MCF5206E, mcf5206e_device)
diff --git a/src/devices/cpu/m68000/scc68070.cpp b/src/devices/cpu/m68000/scc68070.cpp
index 8d612f46bfa..cca40fe092f 100644
--- a/src/devices/cpu/m68000/scc68070.cpp
+++ b/src/devices/cpu/m68000/scc68070.cpp
@@ -21,4 +21,34 @@ void scc68070_base_device::device_start()
{
m68000_musashi_device::device_start();
init_cpu_scc68070();
+
+ m_readimm16 = [this](offs_t address) -> u16 { return m_oprogram16.read_word(translate_addr(address)); };
+ m_read8 = [this](offs_t address) -> u8 { return m_program16.read_byte(translate_addr(address)); };
+ m_read16 = [this](offs_t address) -> u16 { return m_program16.read_word(translate_addr(address)); };
+ m_read32 = [this](offs_t address) -> u32 { return m_program16.read_dword(translate_addr(address)); };
+ m_write8 = [this](offs_t address, u8 data)
+ {
+ address = translate_addr(address);
+ m_program16.write_word(address & ~1, data | (data << 8), address & 1 ? 0x00ff : 0xff00);
+ };
+ m_write16 = [this](offs_t address, u16 data) { m_program16.write_word(translate_addr(address), data); };
+ m_write32 = [this](offs_t address, u32 data) { m_program16.write_dword(translate_addr(address), data); };
+}
+
+offs_t scc68070_base_device::translate_addr(offs_t address) const
+{
+ // internal addresses (0x80000000-bfffffff) are only accessible in supervisor mode;
+ // all other accesses use the external 24-bit address bus.
+ if (!(supervisor_mode() && (address >> 30) == 0x2))
+ address &= 0xffffff;
+
+ return address;
+}
+
+bool scc68070_base_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
+{
+ target_space = &space(spacenum);
+ if (spacenum == AS_PROGRAM)
+ address = translate_addr(address);
+ return true;
}
diff --git a/src/devices/cpu/m68000/scc68070.h b/src/devices/cpu/m68000/scc68070.h
index 031d9542b14..1d5c361e88d 100644
--- a/src/devices/cpu/m68000/scc68070.h
+++ b/src/devices/cpu/m68000/scc68070.h
@@ -16,7 +16,11 @@ protected:
virtual u32 execute_max_cycles() const noexcept override { return 158; }
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
+
+ offs_t translate_addr(offs_t address) const;
+
+ virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock,
const device_type type, address_map_constructor internal_map);
diff --git a/src/devices/cpu/m68000/tmp68301.cpp b/src/devices/cpu/m68000/tmp68301.cpp
index 03d9d417cdf..20813bb9dbd 100644
--- a/src/devices/cpu/m68000/tmp68301.cpp
+++ b/src/devices/cpu/m68000/tmp68301.cpp
@@ -513,11 +513,6 @@ void tmp68301_device::ieir_w(u8 data)
}
-u32 tmp68301_device::execute_input_lines() const noexcept
-{
- return 10;
-}
-
void tmp68301_device::execute_set_input(int inputnum, int state)
{
int prev_state = (m_external_interrupt_state >> inputnum) & 1;
@@ -688,7 +683,7 @@ void tmp68301_device::pmr_w(u8 data)
u16 tmp68301_device::pdr_r()
{
- if(m_parallel_mode == 0) {
+ if(m_parallel_mode == 0 || m_parallel_mode == 1) {
if(m_pdir == 0xffff)
return m_pdr;
return (m_pdr & m_pdir) | (m_parallel_r_cb() & ~m_pdir);
@@ -704,7 +699,7 @@ void tmp68301_device::pdr_w(offs_t, u16 data, u16 mem_mask)
if(m_pdr == old)
return;
// logerror("parallel data %04x\n", m_pdr);
- if(m_parallel_mode == 0) {
+ if(m_parallel_mode == 0 || m_parallel_mode == 1) {
if(m_pdir == 0x0000)
return;
m_parallel_w_cb(m_pdr & m_pdir);
@@ -1099,8 +1094,15 @@ void tmp68301_device::serial_tx_update(int ch)
nstate = m_smr[ch] & SMR_PEN ? SR_PARITY : SR_STOP;
break;
- case SR_PARITY:
- abort();
+ case SR_PARITY: {
+ u32 parity = m_smr[ch] & SMR_PEO ? 0 : 1;
+ for(u32 i = 0; i != 5 + ((m_smr[ch] >> SMR_CL_SFT) & 3); i++)
+ if((m_serial_tx[ch] >> i) & 1)
+ parity = parity ^ 1;
+ m_tx_cb[ch](parity);
+ nstate = SR_STOP;
+ break;
+ }
case SR_STOP:
m_tx_cb[ch](1);
diff --git a/src/devices/cpu/m68000/tmp68301.h b/src/devices/cpu/m68000/tmp68301.h
index aa49f1674ae..c521f6b6c1f 100644
--- a/src/devices/cpu/m68000/tmp68301.h
+++ b/src/devices/cpu/m68000/tmp68301.h
@@ -33,17 +33,16 @@ protected:
devcb_write16 m_parallel_w_cb;
devcb_write_line::array<3> m_tx_cb;
- void device_start() override;
- void device_reset() override;
- u32 execute_input_lines() const noexcept override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
void execute_set_input(int inputnum, int state) override;
void internal_update(uint64_t current_time = 0) override;
virtual u8 base_timer_irq() const noexcept { return 4; }
- void internal_map(address_map &map);
- void cpu_space_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
+ void cpu_space_map(address_map &map) ATTR_COLD;
// Address decoder
u8 m_amar[2], m_aamr[2], m_aacr[3];
diff --git a/src/devices/cpu/m6805/hd6305.cpp b/src/devices/cpu/m6805/hd6305.cpp
new file mode 100644
index 00000000000..2cc866c7494
--- /dev/null
+++ b/src/devices/cpu/m6805/hd6305.cpp
@@ -0,0 +1,623 @@
+// license:BSD-3-Clause
+// copyright-holders:Aaron Giles, Vas Crabb, Olivier Galibert
+/*
+
+Hitachi HD6305 series
+
+TODO:
+- HD6305xx has a 14-bit address space, not 13 (memory_access in m6805.h)
+- add unimplemented opcodes: STOP, WAIT, DAA, and HD63705Z0 also has MUL
+- add HD63705Z0 peripherals
+
+*/
+
+#include "emu.h"
+#include "hd6305.h"
+#include "m6805defs.h"
+
+hd6305_device::hd6305_device(
+ machine_config const &mconfig,
+ char const *tag,
+ device_t *owner,
+ uint32_t clock,
+ device_type const type,
+ configuration_params const &params,
+ address_map_constructor internal_map) :
+ m6805_base_device(mconfig, tag, owner, clock, type, params, internal_map),
+ m_sci_clk(*this),
+ m_sci_tx(*this),
+ m_read_port(*this, 0xff),
+ m_write_port(*this)
+{
+ std::fill(m_port_ddr_override.begin(), m_port_ddr_override.end(), 0x00);
+}
+
+// common peripherals
+
+void hd6305_device::device_start()
+{
+ m6805_base_device::device_start();
+
+ save_item(NAME(m_port_data));
+ save_item(NAME(m_port_ddr));
+ save_item(NAME(m_tdr));
+ save_item(NAME(m_prescaler));
+ save_item(NAME(m_tcr));
+ save_item(NAME(m_ssr));
+ save_item(NAME(m_scr));
+ save_item(NAME(m_mr));
+ save_item(NAME(m_timer_last_update));
+ save_item(NAME(m_sci_tx_data));
+ save_item(NAME(m_sci_tx_filled));
+ save_item(NAME(m_sci_tx_byte));
+ save_item(NAME(m_sci_tx_step));
+
+ m_timer_timer = timer_alloc(FUNC(hd6305_device::timer_cb), this);
+ m_timer_sci = timer_alloc(FUNC(hd6305_device::sci_cb), this);
+}
+
+void hd6305_device::device_reset()
+{
+ m6805_base_device::device_reset();
+
+ std::fill(m_port_data.begin(), m_port_data.end(), 0x00);
+ std::fill(m_port_ddr.begin(), m_port_ddr.end(), 0x00);
+
+ m_tdr = 0xf0;
+ m_prescaler = 0x7f;
+ m_tcr = 0x50;
+ m_ssr = 0x3f;
+ m_scr = 0x00;
+ m_mr = 0x5f;
+
+ m_timer_last_update = total_cycles();
+
+ m_sci_tx_data = 0;
+
+ m_sci_tx_filled = false;
+ m_sci_tx_byte = 0;
+ m_sci_tx_step = 0;
+
+ m_sci_clk(1);
+ m_sci_tx(1);
+}
+
+template<int Port>
+u8 hd6305_device::port_r()
+{
+ const u8 ddr = m_port_ddr[Port] & ~m_port_ddr_override[Port];
+ if(ddr == 0xff)
+ return m_port_data[Port];
+
+ return (m_port_data[Port] & ddr) | (m_read_port[Port]() & ~ddr);
+}
+
+template<int Port>
+void hd6305_device::port_w(u8 data)
+{
+ if(data != m_port_data[Port]) {
+ m_port_data[Port] = data;
+ m_write_port[Port](Port, data | ~m_port_ddr[Port], m_port_ddr[Port]);
+ }
+}
+
+template<int Port>
+u8 hd6305_device::port_ddr_r()
+{
+ return m_port_ddr[Port];
+}
+
+template<int Port>
+void hd6305_device::port_ddr_w(u8 data)
+{
+ if(data != m_port_ddr[Port]) {
+ logerror("port %d ddr %c%c%c%c%c%c%c%c\n",
+ Port,
+ BIT(data, 7) ? 'o': 'i',
+ BIT(data, 6) ? 'o': 'i',
+ BIT(data, 5) ? 'o': 'i',
+ BIT(data, 4) ? 'o': 'i',
+ BIT(data, 3) ? 'o': 'i',
+ BIT(data, 2) ? 'o': 'i',
+ BIT(data, 1) ? 'o': 'i',
+ BIT(data, 0) ? 'o': 'i');
+
+ m_port_ddr[Port] = data;
+ m_write_port[Port](Port, m_port_data[Port] | ~data, data);
+ }
+}
+
+void hd6305_device::timer_update_regs()
+{
+ if(machine().side_effects_disabled())
+ return;
+
+ u32 counter = m_prescaler;
+ u64 tc = machine().time().as_ticks(clock())/4;
+ u32 cycles = tc - m_timer_last_update;
+
+ u32 next_counter = counter + cycles;
+ u32 shift = BIT(m_tcr, 0, 3);
+ u32 steps = shift ? (((next_counter >> (shift-1)) + 1) >> 1) - (((counter >> (shift-1)) + 1) >> 1) : cycles;
+
+ m_tdr -= steps;
+ m_prescaler = next_counter & 0x7f;
+ m_timer_last_update = tc;
+ if(!m_tdr && steps) {
+ m_tcr |= 0x80;
+ if(!BIT(m_tcr, 6))
+ m_pending_interrupts |= 1 << HD6305_INT_TIMER1;
+ }
+}
+
+void hd6305_device::timer_wait_next_timeout()
+{
+ u32 shift = BIT(m_tcr, 0, 3);
+ u32 cycles;
+ if(shift == 0)
+ cycles = 1;
+ else {
+ u32 masked_prescaler = ((1 << shift) - 1) & m_prescaler;
+ if(masked_prescaler >= (1 << (shift-1)))
+ cycles = (3 << (shift-1)) - masked_prescaler;
+ else
+ cycles = (1 << (shift-1)) - masked_prescaler;
+ }
+ if(m_tdr != 1)
+ cycles += (m_tdr ? m_tdr - 1 : 0xff) << shift;
+ m_timer_timer->adjust(attotime::from_ticks(cycles*4, clock()));
+}
+
+u8 hd6305_device::timer_data_r()
+{
+ timer_update_regs();
+ return m_tdr;
+}
+
+void hd6305_device::timer_data_w(u8 data)
+{
+ timer_update_regs();
+ m_tdr = data;
+ timer_wait_next_timeout();
+}
+
+u8 hd6305_device::timer_ctrl_r()
+{
+ timer_update_regs();
+ return m_tcr;
+}
+
+void hd6305_device::timer_ctrl_w(u8 data)
+{
+ timer_update_regs();
+ u8 old = m_tcr;
+ m_tcr = (m_tcr & data & 0x80) | (data & 0x7f);
+ if((old ^ m_tcr) & 0x7f) {
+ logerror("timer ctrl %02x irq=%s, %s clock=%s%s prescale=%d\n", data,
+ BIT(m_tcr, 7) ? "on" : "off",
+ BIT(m_tcr, 6) ? "disabled" : "enabled",
+ BIT(m_tcr, 4, 2) == 0 ? "e" : BIT(m_tcr, 4, 2) == 1 ? "e&timer" : BIT(m_tcr, 4, 2) == 2 ? "off" : "timer",
+ BIT(m_tcr, 3) ? " reset prescaler" : "",
+ 1 << BIT(m_tcr, 0, 3));
+
+ if(BIT(m_tcr, 4, 2) != 0)
+ logerror("WARNING: timer mode not implemented\n");
+ }
+ if((m_tcr & 0xc0) == 0x80)
+ m_pending_interrupts |= 1 << HD6305_INT_TIMER1;
+ else
+ m_pending_interrupts &= ~(1 << HD6305_INT_TIMER1);
+ if(BIT(m_tcr, 3)) {
+ m_prescaler = 0x7f;
+ m_tcr &= ~0x08;
+ }
+
+ timer_wait_next_timeout();
+}
+
+
+TIMER_CALLBACK_MEMBER(hd6305_device::timer_cb)
+{
+ timer_update_regs();
+ timer_wait_next_timeout();
+}
+
+u8 hd6305_device::misc_r()
+{
+ return m_mr;
+}
+
+void hd6305_device::misc_w(u8 data)
+{
+ m_mr = (m_mr & data & 0x80) | (data & 0x60) | 0x1f;
+ logerror("misc %02x int2=%s, %s int=%s\n", data,
+ BIT(m_mr, 7) ? "on" : "off",
+ BIT(m_mr, 6) ? "disabled" : "enabled",
+ BIT(m_mr, 5) ? "edge" : "level");
+}
+
+void hd6305_device::sci_timer_step()
+{
+ m_timer_sci->adjust(attotime::from_ticks(1 << (BIT(m_scr, 0, 4) + 2), clock()));
+}
+
+TIMER_CALLBACK_MEMBER(hd6305_device::sci_cb)
+{
+ if(m_sci_tx_step == 16) {
+ m_ssr |= 0x80;
+ if(!BIT(m_ssr, 5))
+ m_pending_interrupts |= 1 << HD6305_INT_SCI;
+
+ if(m_sci_tx_filled) {
+ m_sci_tx_filled = false;
+ m_sci_clk(0);
+ m_sci_tx_byte = m_sci_tx_data;
+ logerror("transmit %02x\n", m_sci_tx_byte);
+ m_sci_tx(m_sci_tx_byte & 0x01);
+ m_sci_tx_step = 1;
+ } else {
+ m_sci_tx_step = 0;
+ return;
+ }
+ } else {
+ if(m_sci_tx_step & 1)
+ m_sci_clk(1);
+ else {
+ m_sci_clk(0);
+ m_sci_tx((m_sci_tx_byte >> (m_sci_tx_step >> 1)) & 0x01);
+ }
+ m_sci_tx_step++;
+ }
+
+ sci_timer_step();
+}
+
+u8 hd6305_device::sci_ctrl_r()
+{
+ return m_scr;
+}
+
+void hd6305_device::sci_ctrl_w(u8 data)
+{
+ m_scr = data;
+ logerror("sci ctrl %02x d3=%s d4=%s d5=%s rate=%d\n", data,
+ BIT(data, 7) ? "data_out" : "gpio",
+ BIT(data, 6) ? "data_in" : "gpio",
+ BIT(data, 5) == 0 ? "gpio" : BIT(data, 4) ? "clock_in" : "clock_out",
+ clock()/(1 << (BIT(data, 0, 4) + 3)));
+}
+
+u8 hd6305_device::sci_ssr_r()
+{
+ return m_ssr;
+}
+
+void hd6305_device::sci_ssr_w(u8 data)
+{
+ m_ssr = ((m_ssr & data) & 0xc0) | (data & 0x38) | 7;
+ logerror("sci ssr w %02x sci irq=%s, %s timer2 irq=%s, %s%s\n", data,
+ BIT(m_ssr, 7) ? "on" : "off",
+ BIT(m_ssr, 5) ? "disabled" : "enabled",
+ BIT(m_ssr, 6) ? "on" : "off",
+ BIT(m_ssr, 4) ? "disabled" : "enabled",
+ BIT(m_ssr, 3) ? "reset sci prescaler" : "");
+
+ if((m_ssr & 0xa0) == 0x80)
+ m_pending_interrupts |= 1 << HD6305_INT_SCI;
+ else
+ m_pending_interrupts &= ~(1 << HD6305_INT_SCI);
+}
+
+u8 hd6305_device::sci_data_r()
+{
+ if(!machine().side_effects_disabled())
+ logerror("sci data r\n");
+ return 0x00;
+}
+
+void hd6305_device::sci_data_w(u8 data)
+{
+ m_sci_tx_data = data;
+ if(m_sci_tx_step == 0) {
+ m_sci_tx_filled = false;
+ m_sci_clk(0);
+ m_sci_tx_byte = m_sci_tx_data;
+ logerror("transmit %02x\n", m_sci_tx_byte);
+ m_sci_tx(m_sci_tx_byte & 0x01);
+ m_sci_tx_step = 1;
+ sci_timer_step();
+ } else
+ m_sci_tx_filled = true;
+}
+
+void hd6305_device::execute_set_input(int inputnum, int state)
+{
+ // TODO: edge vs. level on int1
+ if(inputnum == HD6305_INT_IRQ1 || inputnum == HD6305_INT_IRQ2) {
+ if(m_irq_state[inputnum] != state) {
+ m_irq_state[inputnum] = state;
+
+ if(state != CLEAR_LINE)
+ m_pending_interrupts |= 1 << inputnum;
+ }
+ }
+}
+
+void hd6305_device::interrupt_vector()
+{
+ if((m_pending_interrupts & (1 << HD6305_INT_IRQ1)) != 0) {
+ m_pending_interrupts &= ~(1 << HD6305_INT_IRQ1);
+ rm16<false>(0x1ffa, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD6305_INT_IRQ2)) != 0) {
+ m_pending_interrupts &= ~(1 << HD6305_INT_IRQ2);
+ rm16<false>(0x1ff8, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD6305_INT_TIMER1)) != 0) {
+ // TODO: 1ff6 when in wait...
+ m_pending_interrupts &= ~(1 << HD6305_INT_TIMER1);
+ rm16<false>(0x1ff8, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD6305_INT_TIMER2)) != 0) {
+ m_pending_interrupts &= ~(1 << HD6305_INT_TIMER2);
+ rm16<false>(0x1ff4, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD6305_INT_SCI)) != 0) {
+ m_pending_interrupts &= ~(1 << HD6305_INT_SCI);
+ rm16<false>(0x1ff4, m_pc);
+ }
+}
+
+
+/****************************************************************************
+ * HD6305V0 section
+ ****************************************************************************/
+
+hd6305v0_device::hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ hd6305_device(
+ mconfig,
+ tag,
+ owner,
+ clock,
+ HD6305V0,
+ { s_hmos_s_ops, s_hd6305_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc },
+ address_map_constructor(FUNC(hd6305v0_device::internal_map), this))
+{
+}
+
+void hd6305v0_device::internal_map(address_map &map)
+{
+ map(0x0000, 0x0000).rw(FUNC(hd6305v0_device::port_r<0>), FUNC(hd6305v0_device::port_w<0>));
+ map(0x0001, 0x0001).rw(FUNC(hd6305v0_device::port_r<1>), FUNC(hd6305v0_device::port_w<1>));
+ map(0x0002, 0x0002).rw(FUNC(hd6305v0_device::port_r<2>), FUNC(hd6305v0_device::port_w<2>));
+ map(0x0003, 0x0003).rw(FUNC(hd6305v0_device::port_r<3>), FUNC(hd6305v0_device::port_w<3>));
+ map(0x0004, 0x0004).rw(FUNC(hd6305v0_device::port_ddr_r<0>), FUNC(hd6305v0_device::port_ddr_w<0>));
+ map(0x0005, 0x0005).rw(FUNC(hd6305v0_device::port_ddr_r<1>), FUNC(hd6305v0_device::port_ddr_w<1>));
+ map(0x0006, 0x0006).rw(FUNC(hd6305v0_device::port_ddr_r<2>), FUNC(hd6305v0_device::port_ddr_w<2>));
+ map(0x0007, 0x0007).rw(FUNC(hd6305v0_device::port_ddr_r<3>), FUNC(hd6305v0_device::port_ddr_w<3>));
+ map(0x0008, 0x0008).rw(FUNC(hd6305v0_device::timer_data_r), FUNC(hd6305v0_device::timer_data_w));
+ map(0x0009, 0x0009).rw(FUNC(hd6305v0_device::timer_ctrl_r), FUNC(hd6305v0_device::timer_ctrl_w));
+ map(0x000a, 0x000a).rw(FUNC(hd6305v0_device::misc_r), FUNC(hd6305v0_device::misc_w));
+ map(0x0010, 0x0010).rw(FUNC(hd6305v0_device::sci_ctrl_r), FUNC(hd6305v0_device::sci_ctrl_w));
+ map(0x0011, 0x0011).rw(FUNC(hd6305v0_device::sci_ssr_r), FUNC(hd6305v0_device::sci_ssr_w));
+ map(0x0012, 0x0012).rw(FUNC(hd6305v0_device::sci_data_r), FUNC(hd6305v0_device::sci_data_w));
+ map(0x0040, 0x00ff).ram();
+ map(0x1000, 0x1fff).rom().region(DEVICE_SELF, 0);
+}
+
+
+/****************************************************************************
+ * HD6305Y0 section
+ ****************************************************************************/
+
+hd6305y0_device::hd6305y0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ hd6305_device(
+ mconfig,
+ tag,
+ owner,
+ clock,
+ HD6305Y0,
+ { s_hmos_s_ops, s_hd6305_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc },
+ address_map_constructor(FUNC(hd6305y0_device::internal_map), this))
+{
+}
+
+void hd6305y0_device::internal_map(address_map &map)
+{
+ map(0x0000, 0x0000).rw(FUNC(hd6305y0_device::port_r<0>), FUNC(hd6305y0_device::port_w<0>));
+ map(0x0001, 0x0001).rw(FUNC(hd6305y0_device::port_r<1>), FUNC(hd6305y0_device::port_w<1>));
+ map(0x0002, 0x0002).rw(FUNC(hd6305y0_device::port_r<2>), FUNC(hd6305y0_device::port_w<2>));
+ map(0x0003, 0x0003).r(FUNC(hd6305y0_device::port_r<3>));
+ map(0x0004, 0x0004).w(FUNC(hd6305y0_device::port_ddr_w<0>));
+ map(0x0005, 0x0005).w(FUNC(hd6305y0_device::port_ddr_w<1>));
+ map(0x0006, 0x0006).w(FUNC(hd6305y0_device::port_ddr_w<2>));
+ map(0x0007, 0x0007).w(FUNC(hd6305y0_device::port_ddr_w<6>));
+ map(0x0008, 0x0008).rw(FUNC(hd6305y0_device::timer_data_r), FUNC(hd6305y0_device::timer_data_w));
+ map(0x0009, 0x0009).rw(FUNC(hd6305y0_device::timer_ctrl_r), FUNC(hd6305y0_device::timer_ctrl_w));
+ map(0x000a, 0x000a).rw(FUNC(hd6305y0_device::misc_r), FUNC(hd6305y0_device::misc_w));
+ map(0x000b, 0x000b).rw(FUNC(hd6305y0_device::port_r<4>), FUNC(hd6305y0_device::port_w<4>));
+ map(0x000c, 0x000c).rw(FUNC(hd6305y0_device::port_r<5>), FUNC(hd6305y0_device::port_w<5>));
+ map(0x000d, 0x000d).rw(FUNC(hd6305y0_device::port_r<6>), FUNC(hd6305y0_device::port_w<6>));
+ map(0x0010, 0x0010).rw(FUNC(hd6305y0_device::sci_ctrl_r), FUNC(hd6305y0_device::sci_ctrl_w));
+ map(0x0011, 0x0011).rw(FUNC(hd6305y0_device::sci_ssr_r), FUNC(hd6305y0_device::sci_ssr_w));
+ map(0x0012, 0x0012).rw(FUNC(hd6305y0_device::sci_data_r), FUNC(hd6305y0_device::sci_data_w));
+ map(0x0040, 0x013f).ram();
+ map(0x0140, 0x1fff).rom().region(DEVICE_SELF, 0);
+}
+
+void hd6305y0_device::device_reset()
+{
+ hd6305_device::device_reset();
+
+ // ports E and F are write-only
+ m_port_ddr[4] = m_port_ddr[5] = 0xff;
+}
+
+
+/****************************************************************************
+ * HD6305Y2 section
+ ****************************************************************************/
+
+hd6305y2_device::hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ hd6305_device(
+ mconfig,
+ tag,
+ owner,
+ clock,
+ HD6305Y2,
+ { s_hmos_s_ops, s_hd6305_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc },
+ address_map_constructor(FUNC(hd6305y2_device::internal_map), this))
+{
+}
+
+void hd6305y2_device::internal_map(address_map &map)
+{
+ map(0x0000, 0x0000).rw(FUNC(hd6305y2_device::port_r<0>), FUNC(hd6305y2_device::port_w<0>));
+ map(0x0001, 0x0001).rw(FUNC(hd6305y2_device::port_r<1>), FUNC(hd6305y2_device::port_w<1>));
+ map(0x0002, 0x0002).rw(FUNC(hd6305y2_device::port_r<2>), FUNC(hd6305y2_device::port_w<2>));
+ map(0x0003, 0x0003).r(FUNC(hd6305y2_device::port_r<3>));
+ map(0x0004, 0x0004).w(FUNC(hd6305y2_device::port_ddr_w<0>));
+ map(0x0005, 0x0005).w(FUNC(hd6305y2_device::port_ddr_w<1>));
+ map(0x0006, 0x0006).w(FUNC(hd6305y2_device::port_ddr_w<2>));
+ map(0x0008, 0x0008).rw(FUNC(hd6305y2_device::timer_data_r), FUNC(hd6305y2_device::timer_data_w));
+ map(0x0009, 0x0009).rw(FUNC(hd6305y2_device::timer_ctrl_r), FUNC(hd6305y2_device::timer_ctrl_w));
+ map(0x000a, 0x000a).rw(FUNC(hd6305y2_device::misc_r), FUNC(hd6305y2_device::misc_w));
+ map(0x0010, 0x0010).rw(FUNC(hd6305y2_device::sci_ctrl_r), FUNC(hd6305y2_device::sci_ctrl_w));
+ map(0x0011, 0x0011).rw(FUNC(hd6305y2_device::sci_ssr_r), FUNC(hd6305y2_device::sci_ssr_w));
+ map(0x0012, 0x0012).rw(FUNC(hd6305y2_device::sci_data_r), FUNC(hd6305y2_device::sci_data_w));
+ // All other page zero addresses up to 0x001f are reserved
+ map(0x0040, 0x013f).ram();
+}
+
+
+/****************************************************************************
+ * HD63705Z0 section
+ ****************************************************************************/
+
+hd63705z0_device::hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ hd6305_device(
+ mconfig,
+ tag,
+ owner,
+ clock,
+ HD63705Z0,
+ { s_hmos_b_ops, s_hd63705_cycles, 16, 0x017f, 0x0100, 0x1fff, 0x1ffa },
+ address_map_constructor(FUNC(hd63705z0_device::internal_map), this))
+{
+}
+
+void hd63705z0_device::internal_map(address_map &map)
+{
+ // TODO: ports, timer, SCI
+ map(0x0040, 0x01bf).ram();
+ map(0x01c0, 0x1fff).rom().region(DEVICE_SELF, 0x01c0);
+}
+
+void hd63705z0_device::execute_set_input(int inputnum, int state)
+{
+ if(inputnum == INPUT_LINE_NMI) {
+ if(m_nmi_state != state) {
+ m_nmi_state = state;
+
+ if(state != CLEAR_LINE)
+ m_pending_interrupts |= 1 << HD63705_INT_NMI;
+ }
+ }
+ else if(inputnum <= HD63705_INT_ADCONV) {
+ if(m_irq_state[inputnum] != state) {
+ m_irq_state[inputnum] = state;
+
+ if(state != CLEAR_LINE)
+ m_pending_interrupts |= 1 << inputnum;
+ }
+ }
+}
+
+void hd63705z0_device::interrupt_vector()
+{
+ // Need to add emulation of other interrupt sources here KW-2/4/99
+ // This is just a quick patch for Namco System 2 operation
+
+ if((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1);
+ rm16<true>(0x1ff8, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2);
+ rm16<true>(0x1fec, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV);
+ rm16<true>(0x1fea, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1);
+ rm16<true>(0x1ff6, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2);
+ rm16<true>(0x1ff4, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0) {
+ m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3);
+ rm16<true>(0x1ff2, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_PCI);
+ rm16<true>(0x1ff0, m_pc);
+ }
+ else if((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0) {
+ m_pending_interrupts &= ~(1 << HD63705_INT_SCI);
+ rm16<true>(0x1fee, m_pc);
+ }
+}
+
+void hd63705z0_device::interrupt()
+{
+ // the 6805 latches interrupt requests internally, so we don't clear
+ // pending_interrupts until the interrupt is taken, no matter what the
+ // external IRQ pin does.
+
+ if(BIT(m_pending_interrupts, HD63705_INT_NMI)) {
+ pushword<true>(m_pc);
+ pushbyte<true>(m_x);
+ pushbyte<true>(m_a);
+ pushbyte<true>(m_cc);
+ SEI;
+
+ // no vectors supported, just do the callback to clear irq_state if needed
+ standard_irq_callback(0, m_pc.w.l);
+
+ rm16<true>(0x1ffc, m_pc);
+ m_pending_interrupts &= ~(1 << HD63705_INT_NMI);
+
+ m_icount -= 11;
+ burn_cycles(11);
+ }
+ else if((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0) {
+ if((CC & IFLAG) == 0) {
+ // standard IRQ
+ pushword<true>(m_pc);
+ pushbyte<true>(m_x);
+ pushbyte<true>(m_a);
+ pushbyte<true>(m_cc);
+ SEI;
+
+ // no vectors supported, just do the callback to clear irq_state if needed
+ standard_irq_callback(0, m_pc.w.l);
+
+ interrupt_vector();
+
+ m_pending_interrupts &= ~(1 << M6805_IRQ_LINE);
+
+ m_icount -= 11;
+ burn_cycles(11);
+ }
+ }
+}
+
+
+DEFINE_DEVICE_TYPE(HD6305V0, hd6305v0_device, "hd6305v0", "Hitachi HD6305V0")
+DEFINE_DEVICE_TYPE(HD6305Y0, hd6305y0_device, "hd6305y0", "Hitachi HD6305Y0")
+DEFINE_DEVICE_TYPE(HD6305Y2, hd6305y2_device, "hd6305y2", "Hitachi HD6305Y2")
+DEFINE_DEVICE_TYPE(HD63705Z0, hd63705z0_device, "hd63705z0", "Hitachi HD63705Z0")
diff --git a/src/devices/cpu/m6805/hd6305.h b/src/devices/cpu/m6805/hd6305.h
new file mode 100644
index 00000000000..2d7cc46bfc5
--- /dev/null
+++ b/src/devices/cpu/m6805/hd6305.h
@@ -0,0 +1,229 @@
+// license:BSD-3-Clause
+// copyright-holders:Aaron Giles, Vas Crabb, Olivier Galibert
+
+#ifndef MAME_CPU_M6805_HD6305_H
+#define MAME_CPU_M6805_HD6305_H
+
+#pragma once
+
+#include "m6805.h"
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// device type declarations
+DECLARE_DEVICE_TYPE(HD6305V0, hd6305v0_device)
+DECLARE_DEVICE_TYPE(HD6305Y0, hd6305y0_device)
+DECLARE_DEVICE_TYPE(HD6305Y2, hd6305y2_device)
+DECLARE_DEVICE_TYPE(HD63705Z0, hd63705z0_device)
+
+
+// ======================> hd6305_device
+
+class hd6305_device : public m6805_base_device
+{
+public:
+ auto write_sci_tx() { return m_sci_tx.bind(); }
+ auto write_sci_clk() { return m_sci_clk.bind(); }
+
+protected:
+ // construction/destruction
+ hd6305_device(
+ machine_config const &mconfig,
+ char const *tag,
+ device_t *owner,
+ uint32_t clock,
+ device_type const type,
+ configuration_params const &params,
+ address_map_constructor internal_map);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void execute_set_input(int inputnum, int state) override;
+ virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
+ virtual void interrupt_vector() override;
+
+ virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; }
+
+ template<int Port> u8 port_r();
+ template<int Port> void port_w(u8 data);
+ template<int Port> u8 port_ddr_r();
+ template<int Port> void port_ddr_w(u8 data);
+
+ u8 timer_data_r();
+ void timer_data_w(u8 data);
+ u8 timer_ctrl_r();
+ void timer_ctrl_w(u8 data);
+ void timer_update_regs();
+ void timer_wait_next_timeout();
+
+ u8 misc_r();
+ void misc_w(u8 data);
+
+ u8 sci_ctrl_r();
+ void sci_ctrl_w(u8 data);
+ u8 sci_ssr_r();
+ void sci_ssr_w(u8 data);
+ u8 sci_data_r();
+ void sci_data_w(u8 data);
+
+ void sci_timer_step();
+
+ TIMER_CALLBACK_MEMBER(timer_cb);
+ TIMER_CALLBACK_MEMBER(sci_cb);
+
+ devcb_write_line m_sci_clk;
+ devcb_write_line m_sci_tx;
+
+ // maximum 9 I/O ports
+ devcb_read8::array<9> m_read_port;
+ devcb_write8::array<9> m_write_port;
+ std::array<u8, 9> m_port_data;
+ std::array<u8, 9> m_port_ddr;
+ std::array<u8, 9> m_port_ddr_override;
+
+ emu_timer *m_timer_timer;
+ emu_timer *m_timer_sci;
+
+ u64 m_timer_last_update;
+
+ u8 m_tdr;
+ u8 m_prescaler;
+ u8 m_tcr;
+ u8 m_ssr;
+ u8 m_scr;
+ u8 m_mr;
+ u8 m_sci_tx_data;
+
+ bool m_sci_tx_filled;
+ u8 m_sci_tx_byte;
+ u8 m_sci_tx_step;
+};
+
+// ======================> hd6305v0_device
+
+class hd6305v0_device : public hd6305_device
+{
+public:
+ // construction/destruction
+ hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto read_porta() { return m_read_port [0].bind(); }
+ auto write_porta() { return m_write_port[0].bind(); }
+ auto read_portb() { return m_read_port [1].bind(); }
+ auto write_portb() { return m_write_port[1].bind(); }
+ auto read_portc() { return m_read_port [2].bind(); }
+ auto write_portc() { return m_write_port[2].bind(); }
+ auto read_portd() { return m_read_port [3].bind(); }
+ auto write_portd() { return m_write_port[3].bind(); }
+
+private:
+ void internal_map(address_map &map) ATTR_COLD;
+};
+
+// ======================> hd6305y0_device
+
+class hd6305y0_device : public hd6305_device
+{
+public:
+ // construction/destruction
+ hd6305y0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto read_porta() { return m_read_port [0].bind(); }
+ auto write_porta() { return m_write_port[0].bind(); }
+ auto read_portb() { return m_read_port [1].bind(); }
+ auto write_portb() { return m_write_port[1].bind(); }
+ auto read_portc() { return m_read_port [2].bind(); }
+ auto write_portc() { return m_write_port[2].bind(); }
+ auto read_portd() { return m_read_port [3].bind(); }
+ auto write_porte() { return m_write_port[4].bind(); }
+ auto write_portf() { return m_write_port[5].bind(); }
+ auto read_portg() { return m_read_port [6].bind(); }
+ auto write_portg() { return m_write_port[6].bind(); }
+
+ // port G voltage can override DDR, and read the input pins no matter the DDR value
+ void read_portg_override_mask(u8 mask) { m_port_ddr_override[6] = mask; }
+
+protected:
+ virtual void device_reset() override ATTR_COLD;
+
+private:
+ void internal_map(address_map &map) ATTR_COLD;
+};
+
+// ======================> hd6305y2_device
+
+class hd6305y2_device : public hd6305_device
+{
+public:
+ // construction/destruction
+ hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ auto read_porta() { return m_read_port [0].bind(); }
+ auto write_porta() { return m_write_port[0].bind(); }
+ auto read_portb() { return m_read_port [1].bind(); }
+ auto write_portb() { return m_write_port[1].bind(); }
+ auto read_portc() { return m_read_port [2].bind(); }
+ auto write_portc() { return m_write_port[2].bind(); }
+ auto read_portd() { return m_read_port [3].bind(); }
+
+private:
+ void internal_map(address_map &map) ATTR_COLD;
+};
+
+// ======================> hd63705z0_device
+
+class hd63705z0_device : public hd6305_device
+{
+public:
+ // construction/destruction
+ hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual void execute_set_input(int inputnum, int state) override;
+ virtual void interrupt_vector() override;
+ virtual void interrupt() override;
+
+private:
+ void internal_map(address_map &map) ATTR_COLD;
+};
+
+/****************************************************************************
+ * HD6305 section
+ ****************************************************************************/
+
+#define HD6305_INT_IRQ1 0x00
+#define HD6305_INT_IRQ2 0x01
+#define HD6305_INT_TIMER1 0x02
+#define HD6305_INT_TIMER2 0x03
+#define HD6305_INT_SCI 0x04
+
+/****************************************************************************
+ * HD63705 section
+ ****************************************************************************/
+
+#define HD63705_A M6805_A
+#define HD63705_PC M6805_PC
+#define HD63705_S M6805_S
+#define HD63705_X M6805_X
+#define HD63705_CC M6805_CC
+#define HD63705_NMI_STATE M6805_IRQ_STATE
+#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1
+#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2
+#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3
+
+#define HD63705_INT_MASK 0x1ff
+
+#define HD63705_INT_IRQ1 0x00
+#define HD63705_INT_IRQ2 0x01
+#define HD63705_INT_TIMER1 0x02
+#define HD63705_INT_TIMER2 0x03
+#define HD63705_INT_TIMER3 0x04
+#define HD63705_INT_PCI 0x05
+#define HD63705_INT_SCI 0x06
+#define HD63705_INT_ADCONV 0x07
+#define HD63705_INT_NMI 0x08
+
+#endif // MAME_CPU_M6805_HD6305_H
diff --git a/src/devices/cpu/m6805/m6805.cpp b/src/devices/cpu/m6805/m6805.cpp
index c949cb21b23..5feef38faef 100644
--- a/src/devices/cpu/m6805/m6805.cpp
+++ b/src/devices/cpu/m6805/m6805.cpp
@@ -242,20 +242,23 @@ const m6805_base_device::op_handler_table m6805_base_device::s_hc_b_ops =
#undef big
+// to prevent the possibility of MAME locking up, don't use 0 cycles here
+#define XX 4 // illegal opcode unknown cycle count
+
const m6805_base_device::cycle_count_table m6805_base_device::s_hmos_cycles =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ 10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,10,
/*1*/ 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7,
/*2*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
- /*3*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 0, 6,
- /*4*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
- /*5*/ 4, 0, 0, 4, 4, 0, 4, 4, 4, 4, 4, 0, 4, 4, 0, 4,
- /*6*/ 7, 0, 0, 7, 7, 0, 7, 7, 7, 7, 7, 0, 7, 7, 0, 7,
- /*7*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 0, 6,
- /*8*/ 9, 6, 0,11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2,
- /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 8, 2, 0,
+ /*3*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 6,XX, 6,
+ /*4*/ 4,XX,XX, 4, 4,XX, 4, 4, 4, 4, 4,XX, 4, 4,XX, 4,
+ /*5*/ 4,XX,XX, 4, 4,XX, 4, 4, 4, 4, 4,XX, 4, 4,XX, 4,
+ /*6*/ 7,XX,XX, 7, 7,XX, 7, 7, 7, 7, 7,XX, 7, 7,XX, 7,
+ /*7*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 6,XX, 6,
+ /*8*/ 9, 6,XX,11,XX,XX,XX,XX,XX,XX,XX,XX,XX,XX,XX,XX,
+ /*9*/ XX,XX,XX,XX,XX,XX,XX, 2, 2, 2, 2, 2, 2, 2,XX, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2,XX, 2, 2, 2, 2,XX, 8, 2,XX,
/*B*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 7, 4, 5,
/*C*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 8, 5, 6,
/*D*/ 6, 6, 6, 6, 6, 6, 6, 7, 6, 6, 6, 6, 5, 9, 6, 7,
@@ -269,14 +272,14 @@ const m6805_base_device::cycle_count_table m6805_base_device::s_cmos_cycles =
/*0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
/*1*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
/*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- /*3*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5,
- /*4*/ 3, 0, 0, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3,
- /*5*/ 3, 0, 0, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3,
- /*6*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 5, 0, 6,
- /*7*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5,
- /*8*/ 9, 6, 0,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2,
- /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2,
- /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 6, 2, 0,
+ /*3*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*4*/ 3,XX,XX, 3, 3,XX, 3, 3, 3, 3, 3,XX, 3, 3,XX, 3,
+ /*5*/ 3,XX,XX, 3, 3,XX, 3, 3, 3, 3, 3,XX, 3, 3,XX, 3,
+ /*6*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 5,XX, 6,
+ /*7*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*8*/ 9, 6,XX,10,XX,XX,XX,XX,XX,XX,XX,XX,XX,XX, 2, 2,
+ /*9*/ XX,XX,XX,XX,XX,XX,XX, 2, 2, 2, 2, 2, 2, 2,XX, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2,XX, 2, 2, 2, 2,XX, 6, 2,XX,
/*B*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4,
/*C*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5,
/*D*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 7, 5, 6,
@@ -290,14 +293,14 @@ const m6805_base_device::cycle_count_table m6805_base_device::s_hc_cycles =
/*0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
/*1*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
/*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
- /*3*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5,
- /*4*/ 3, 0,11, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3,
- /*5*/ 3, 0, 0, 3, 3, 0, 3, 3, 3, 3, 3, 0, 3, 3, 0, 3,
- /*6*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 5, 0, 6,
- /*7*/ 5, 0, 0, 5, 5, 0, 5, 5, 5, 5, 5, 0, 5, 4, 0, 5,
- /*8*/ 9, 6, 0,10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2, 2,
- /*9*/ 0, 0, 0, 0, 0, 0, 0, 2, 2, 2, 2, 2, 2, 2, 0, 2,
- /*A*/ 2, 2, 2, 2, 2, 2, 2, 0, 2, 2, 2, 2, 0, 6, 2, 0,
+ /*3*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*4*/ 3,XX,11, 3, 3,XX, 3, 3, 3, 3, 3,XX, 3, 3,XX, 3,
+ /*5*/ 3,XX,XX, 3, 3,XX, 3, 3, 3, 3, 3,XX, 3, 3,XX, 3,
+ /*6*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 5,XX, 6,
+ /*7*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*8*/ 9, 6,XX,10,XX,XX,XX,XX,XX,XX,XX,XX,XX,XX, 2, 2,
+ /*9*/ XX,XX,XX,XX,XX,XX,XX, 2, 2, 2, 2, 2, 2, 2,XX, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2,XX, 2, 2, 2, 2,XX, 6, 2,XX,
/*B*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4,
/*C*/ 4, 4, 4, 4, 4, 4, 4, 5, 4, 4, 4, 4, 3, 6, 4, 5,
/*D*/ 5, 5, 5, 5, 5, 5, 5, 6, 5, 5, 5, 5, 4, 7, 5, 6,
@@ -305,6 +308,50 @@ const m6805_base_device::cycle_count_table m6805_base_device::s_hc_cycles =
/*F*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4
};
+const m6805_base_device::cycle_count_table m6805_base_device::s_hd6305_cycles =
+{
+ /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
+ /*0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*1*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ /*3*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*4*/ 2,XX,XX, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
+ /*5*/ 2,XX,XX, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
+ /*6*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 5,XX, 6,
+ /*7*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*8*/ 8, 5,XX,10,XX,XX,XX,XX,XX,XX,XX,XX,XX, 2, 4, 4,
+ /*9*/ XX,XX,XX,XX,XX,XX,XX, 2, 1, 1, 2, 2, 2, 1,XX, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2,XX, 2, 2, 2, 2,XX, 5, 2,XX,
+ /*B*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 5, 3, 3,
+ /*C*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 6, 4, 4,
+ /*D*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 6, 5, 5,
+ /*E*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 5, 4, 4,
+ /*F*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 5, 3, 4
+};
+
+const m6805_base_device::cycle_count_table m6805_base_device::s_hd63705_cycles =
+{
+ /* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
+ /*0*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*1*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
+ /*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
+ /*3*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*4*/ 2,XX,11, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
+ /*5*/ 2,XX,XX, 2, 2,XX, 2, 2, 2, 2, 2,XX, 2, 2,XX, 2,
+ /*6*/ 6,XX,XX, 6, 6,XX, 6, 6, 6, 6, 6,XX, 6, 5,XX, 6,
+ /*7*/ 5,XX,XX, 5, 5,XX, 5, 5, 5, 5, 5,XX, 5, 4,XX, 5,
+ /*8*/ 9, 6,XX,11,XX,XX,XX,XX,XX,XX,XX,XX,XX, 2, 4, 4,
+ /*9*/ XX,XX,XX,XX,XX,XX,XX, 2, 1, 1, 2, 2, 2, 1,XX, 2,
+ /*A*/ 2, 2, 2, 2, 2, 2, 2,XX, 2, 2, 2, 2,XX, 6, 2,XX,
+ /*B*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 6, 3, 3,
+ /*C*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 7, 4, 4,
+ /*D*/ 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 4, 7, 5, 5,
+ /*E*/ 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 6, 4, 4,
+ /*F*/ 3, 3, 3, 3, 3, 3, 3, 4, 3, 3, 3, 3, 2, 6, 3, 4
+};
+
+#undef XX // /illegal opcode unknown cc
+
//-------------------------------------------------
// m6809_base_device - constructor
@@ -349,11 +396,7 @@ void m6805_base_device::device_start()
space(AS_PROGRAM).specific(m_program13);
}
- // get the minimum not including the zero placeholders for illegal instructions
- m_min_cycles = *std::min_element(
- std::begin(m_params.m_cycles),
- std::end(m_params.m_cycles),
- [] (u8 x, u8 y) { return u8(x - 1) < u8(y - 1); });
+ m_min_cycles = *std::min_element(std::begin(m_params.m_cycles), std::end(m_params.m_cycles));
m_max_cycles = *std::max_element(std::begin(m_params.m_cycles), std::end(m_params.m_cycles));
// set our instruction counter
@@ -395,7 +438,7 @@ void m6805_base_device::device_reset()
m_nmi_state = 0;
- /* IRQ disabled */
+ // IRQ disabled
SEI;
if (m_params.m_addr_width > 14)
@@ -450,21 +493,23 @@ bool m6805_base_device::test_il()
void m6805_base_device::interrupt_vector()
{
+ m_pending_interrupts &= ~(1 << M6805_IRQ_LINE);
if (m_params.m_addr_width > 14)
rm16<true>(0xfffa & m_params.m_vector_mask, m_pc);
else
rm16<false>(0xfffa & m_params.m_vector_mask, m_pc);
}
-/* Generate interrupts */
+// Generate interrupts
void m6805_base_device::interrupt()
{
- /* the 6805 latches interrupt requests internally, so we don't clear */
- /* pending_interrupts until the interrupt is taken, no matter what the */
- /* external IRQ pin does. */
+ // the 6805 latches interrupt requests internally, so we don't clear
+ // pending_interrupts until the interrupt is taken, no matter what the
+ // external IRQ pin does.
- if (BIT(m_pending_interrupts, HD63705_INT_NMI))
+ if (m_pending_interrupts != 0 && (CC & IFLAG) == 0)
{
+ // standard IRQ
if (m_params.m_addr_width > 14) {
pushword<true>(m_pc);
pushbyte<true>(m_x);
@@ -479,48 +524,15 @@ void m6805_base_device::interrupt()
pushbyte<false>(m_cc);
}
SEI;
- /* no vectors supported, just do the callback to clear irq_state if needed */
+
+ // no vectors supported, just do the callback to clear irq_state if needed
standard_irq_callback(0, m_pc.w.l);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ffc, m_pc);
- else
- rm16<false>(0x1ffc, m_pc);
- m_pending_interrupts &= ~(1 << HD63705_INT_NMI);
+ interrupt_vector();
m_icount -= 11;
burn_cycles(11);
}
- else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0)
- {
- if ((CC & IFLAG) == 0)
- {
- /* standard IRQ */
- if (m_params.m_addr_width > 14) {
- pushword<true>(m_pc);
- pushbyte<true>(m_x);
- pushbyte<true>(m_a);
- pushbyte<true>(m_cc);
- }
- else
- {
- pushword<false>(m_pc);
- pushbyte<false>(m_x);
- pushbyte<false>(m_a);
- pushbyte<false>(m_cc);
- }
- SEI;
- /* no vectors supported, just do the callback to clear irq_state if needed */
- standard_irq_callback(0, m_pc.w.l);
-
- interrupt_vector();
-
- m_pending_interrupts &= ~(1 << M6805_IRQ_LINE);
-
- m_icount -= 11;
- burn_cycles(11);
- }
- }
}
@@ -581,21 +593,10 @@ uint32_t m6805_base_device::execute_max_cycles() const noexcept
}
-//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t m6805_base_device::execute_input_lines() const noexcept
-{
- return 9;
-}
-
-
-/* execute instructions on this CPU until icount expires */
+// execute instructions on this CPU until icount expires
void m6805_base_device::execute_run()
{
- S = SP_ADJUST( S ); /* Taken from CPU_SET_CONTEXT when pointer'afying */
+ S = SP_ADJUST( S ); // Taken from CPU_SET_CONTEXT when pointer'ifying
do
{
@@ -632,6 +633,7 @@ void m6805_base_device::execute_set_input(int inputnum, int state)
/****************************************************************************
* M68HC05EG section
****************************************************************************/
+
m68hc05eg_device::m68hc05eg_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(
mconfig,
@@ -684,183 +686,5 @@ std::unique_ptr<util::disasm_interface> m68hc05eg_device::create_disassembler()
return std::make_unique<m68hc05_disassembler>();
}
-/****************************************************************************
- * HD63705 section
- ****************************************************************************/
-hd6305_device::hd6305_device(
- machine_config const &mconfig,
- char const *tag,
- device_t *owner,
- uint32_t clock,
- device_type const type,
- configuration_params const &params,
- address_map_constructor internal_map)
- : m6805_base_device(mconfig, tag, owner, clock, type, params, internal_map)
-{
-}
-
-hd6305v0_device::hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6305_device(
- mconfig,
- tag,
- owner,
- clock,
- HD6305V0,
- { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc },
- address_map_constructor(FUNC(hd6305v0_device::internal_map), this))
-{
-}
-
-void hd6305v0_device::internal_map(address_map &map)
-{
- // TODO: ports, timer, SCI
- map(0x0040, 0x00ff).ram();
- map(0x1000, 0x1fff).rom().region(DEVICE_SELF, 0);
-}
-
-hd6305y2_device::hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6305_device(
- mconfig,
- tag,
- owner,
- clock,
- HD6305Y2,
- { s_hmos_s_ops, s_hmos_cycles, 14, 0x00ff, 0x00c0, 0x1fff, 0x1ffc },
- address_map_constructor(FUNC(hd6305y2_device::internal_map), this))
-{
-}
-
-void hd6305y2_device::internal_map(address_map &map)
-{
- // TODO: ports, timer, SCI
- map(0x0040, 0x013f).ram();
-}
-
-hd63705z0_device::hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : hd6305_device(
- mconfig,
- tag,
- owner,
- clock,
- HD63705Z0,
- { s_hmos_b_ops, s_hmos_cycles, 16, 0x017f, 0x0100, 0x1fff, 0x1ffa },
- address_map_constructor(FUNC(hd63705z0_device::internal_map), this))
-{
-}
-
-void hd63705z0_device::internal_map(address_map &map)
-{
- // TODO: ports, timer, SCI
- map(0x0040, 0x01bf).ram();
- map(0x01c0, 0x1fff).rom().region(DEVICE_SELF, 0x01c0);
-}
-
-void hd6305_device::device_reset()
-{
- m6805_base_device::device_reset();
-}
-
-void hd6305_device::execute_set_input(int inputnum, int state)
-{
- if (inputnum == INPUT_LINE_NMI)
- {
- if (m_nmi_state != state)
- {
- m_nmi_state = state;
-
- if (state != CLEAR_LINE)
- {
- m_pending_interrupts |= 1 << HD63705_INT_NMI;
- }
- }
- }
- else if (inputnum <= HD63705_INT_ADCONV)
- {
- if (m_irq_state[inputnum] != state)
- {
- m_irq_state[inputnum] = state;
-
- if (state != CLEAR_LINE)
- {
- m_pending_interrupts |= 1 << inputnum;
- }
- }
- }
-}
-
-void hd6305_device::interrupt_vector()
-{
- /* Need to add emulation of other interrupt sources here KW-2/4/99 */
- /* This is just a quick patch for Namco System 2 operation */
-
- if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ff8, m_pc);
- else
- rm16<false>(0x1ff8, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1fec, m_pc);
- else
- rm16<false>(0x1fec, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1fea, m_pc);
- else
- rm16<false>(0x1fea, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ff6, m_pc);
- else
- rm16<false>(0x1ff6, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ff4, m_pc);
- else
- rm16<false>(0x1ff4, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0)
- {
- m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ff2, m_pc);
- else
- rm16<false>(0x1ff2, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_PCI);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1ff0, m_pc);
- else
- rm16<false>(0x1ff0, m_pc);
- }
- else if ((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0)
- {
- m_pending_interrupts &= ~(1 << HD63705_INT_SCI);
- if (m_params.m_addr_width > 14)
- rm16<true>(0x1fee, m_pc);
- else
- rm16<false>(0x1fee, m_pc);
- }
-}
-
DEFINE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device, "m68hc05eg", "Motorola MC68HC05EG")
-DEFINE_DEVICE_TYPE(HD6305V0, hd6305v0_device, "hd6305v0", "Hitachi HD6305V0")
-DEFINE_DEVICE_TYPE(HD6305Y2, hd6305y2_device, "hd6305y2", "Hitachi HD6305Y2")
-DEFINE_DEVICE_TYPE(HD63705Z0, hd63705z0_device, "hd63705z0", "Hitachi HD63705Z0")
diff --git a/src/devices/cpu/m6805/m6805.h b/src/devices/cpu/m6805/m6805.h
index 99f71504c8d..a7908e2a542 100644
--- a/src/devices/cpu/m6805/m6805.h
+++ b/src/devices/cpu/m6805/m6805.h
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:Aaron Giles
+// copyright-holders:Aaron Giles, Vas Crabb
/*** m6805: Portable 6805 emulator ******************************************/
#ifndef MAME_CPU_M6805_M6805_H
#define MAME_CPU_M6805_M6805_H
@@ -11,11 +11,7 @@
// TYPE DEFINITIONS
//**************************************************************************
-// device type definition
DECLARE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device)
-DECLARE_DEVICE_TYPE(HD6305V0, hd6305v0_device)
-DECLARE_DEVICE_TYPE(HD6305Y2, hd6305y2_device)
-DECLARE_DEVICE_TYPE(HD63705Z0, hd63705z0_device)
// ======================> m6805_base_device
@@ -107,6 +103,8 @@ protected:
static cycle_count_table s_hmos_cycles;
static cycle_count_table s_cmos_cycles;
static cycle_count_table s_hc_cycles;
+ static cycle_count_table s_hd6305_cycles;
+ static cycle_count_table s_hd63705_cycles;
// construction/destruction
m6805_base_device(
@@ -126,13 +124,12 @@ protected:
address_map_constructor internal_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override;
@@ -319,7 +316,7 @@ public:
protected:
// device-level overrides
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void interrupt_vector() override;
@@ -328,67 +325,6 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
-// ======================> hd6305_device
-
-class hd6305_device : public m6805_base_device
-{
-protected:
- // construction/destruction
- hd6305_device(
- machine_config const &mconfig,
- char const *tag,
- device_t *owner,
- uint32_t clock,
- device_type const type,
- configuration_params const &params,
- address_map_constructor internal_map);
-
- // device-level overrides
- virtual void device_reset() override;
-
- virtual void execute_set_input(int inputnum, int state) override;
- virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
-
- virtual void interrupt_vector() override;
- virtual bool test_il() override { return m_nmi_state != CLEAR_LINE; }
-};
-
-// ======================> hd6305v0_device
-
-class hd6305v0_device : public hd6305_device
-{
-public:
- // construction/destruction
- hd6305v0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-private:
- void internal_map(address_map &map);
-};
-
-// ======================> hd6305y2_device
-
-class hd6305y2_device : public hd6305_device
-{
-public:
- // construction/destruction
- hd6305y2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-private:
- void internal_map(address_map &map);
-};
-
-// ======================> hd63705z0_device
-
-class hd63705z0_device : public hd6305_device
-{
-public:
- // construction/destruction
- hd63705z0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
-private:
- void internal_map(address_map &map);
-};
-
#define M6805_IRQ_LINE 0
/****************************************************************************
@@ -399,30 +335,4 @@ private:
#define M68HC05EG_INT_TIMER (M6805_IRQ_LINE+1)
#define M68HC05EG_INT_CPI (M6805_IRQ_LINE+2)
-/****************************************************************************
- * HD63705 section
- ****************************************************************************/
-
-#define HD63705_A M6805_A
-#define HD63705_PC M6805_PC
-#define HD63705_S M6805_S
-#define HD63705_X M6805_X
-#define HD63705_CC M6805_CC
-#define HD63705_NMI_STATE M6805_IRQ_STATE
-#define HD63705_IRQ1_STATE M6805_IRQ_STATE+1
-#define HD63705_IRQ2_STATE M6805_IRQ_STATE+2
-#define HD63705_ADCONV_STATE M6805_IRQ_STATE+3
-
-#define HD63705_INT_MASK 0x1ff
-
-#define HD63705_INT_IRQ1 0x00
-#define HD63705_INT_IRQ2 0x01
-#define HD63705_INT_TIMER1 0x02
-#define HD63705_INT_TIMER2 0x03
-#define HD63705_INT_TIMER3 0x04
-#define HD63705_INT_PCI 0x05
-#define HD63705_INT_SCI 0x06
-#define HD63705_INT_ADCONV 0x07
-#define HD63705_INT_NMI 0x08
-
#endif // MAME_CPU_M6805_M6805_H
diff --git a/src/devices/cpu/m6805/m68705.cpp b/src/devices/cpu/m6805/m68705.cpp
index 934447a0c5f..30f498980c6 100644
--- a/src/devices/cpu/m6805/m68705.cpp
+++ b/src/devices/cpu/m6805/m68705.cpp
@@ -552,14 +552,14 @@ void m68705_device::nvram_default()
bool m68705_device::nvram_read(util::read_stream &file)
{
- size_t actual;
- return !file.read(&m_user_rom[0], m_user_rom.bytes(), actual) && actual == m_user_rom.bytes();
+ auto const [err, actual] = read(file, &m_user_rom[0], m_user_rom.bytes());
+ return !err && (actual == m_user_rom.bytes());
}
bool m68705_device::nvram_write(util::write_stream &file)
{
- size_t actual;
- return !file.write(&m_user_rom[0], m_user_rom.bytes(), actual) && actual == m_user_rom.bytes();
+ auto const [err, actual] = write(file, &m_user_rom[0], m_user_rom.bytes());
+ return !err;
}
void m6805_hmos_device::interrupt()
diff --git a/src/devices/cpu/m6805/m68705.h b/src/devices/cpu/m6805/m68705.h
index e2406ae1a29..97ee495123b 100644
--- a/src/devices/cpu/m6805/m68705.h
+++ b/src/devices/cpu/m6805/m68705.h
@@ -168,7 +168,7 @@ protected:
m6805_hmos_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, device_type type, u32 addr_width, unsigned ram_size);
void map(address_map &map) { internal_map(map); }
- virtual void internal_map(address_map &map);
+ virtual void internal_map(address_map &map) ATTR_COLD;
template <std::size_t N> void set_port_open_drain(bool value);
template <std::size_t N> void set_port_mask(u8 mask);
@@ -187,8 +187,8 @@ protected:
u8 arr_r();
void arr_w(u8 data);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual void interrupt() override;
@@ -235,7 +235,7 @@ protected:
{
}
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
};
class m68705_device : public m6805_hmos_device, public device_nvram_interface
@@ -251,7 +251,7 @@ public:
};
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
m68705_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, device_type type, u32 addr_width, unsigned ram_size);
@@ -261,8 +261,8 @@ protected:
u8 pcr_r();
void pcr_w(u8 data);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual void nvram_default() override;
virtual bool nvram_read(util::read_stream &file) override;
@@ -293,11 +293,11 @@ public:
void pc_w(u8 data) { port_input_w<2>(data); }
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
m68705p_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, device_type type);
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -311,11 +311,11 @@ public:
void pd_w(u8 data) { port_input_w<3>(data); } // TODO: PD6 is also /INT2
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
m68705u_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, device_type type);
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -323,11 +323,11 @@ protected:
class m68705r_device : public m68705u_device
{
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
m68705r_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, device_type type);
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -363,7 +363,7 @@ public:
void set_timer_external_source(bool external) { m_timer.set_source(external ? m6805_timer::TIMER : m6805_timer::CLOCK_TIMER); }
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
};
class m6805r3_device : public m6805_mrom_device
@@ -372,7 +372,7 @@ public:
m6805r3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- virtual void internal_map(address_map &map) override;
+ virtual void internal_map(address_map &map) override ATTR_COLD;
};
class m6805u2_device : public m6805_mrom_device
@@ -411,7 +411,7 @@ public:
m68705p3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
virtual u8 get_mask_options() const override;
};
@@ -422,7 +422,7 @@ public:
m68705p5_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
virtual u8 get_mask_options() const override;
};
@@ -433,7 +433,7 @@ public:
m68705r3_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
virtual u8 get_mask_options() const override;
};
@@ -446,7 +446,7 @@ public:
static auto parent_rom_device_type() { return &M68705R3; }
protected:
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
virtual u8 get_mask_options() const override;
};
diff --git a/src/devices/cpu/m6805/m68hc05.h b/src/devices/cpu/m6805/m68hc05.h
index 939f71de211..d441c8d7084 100644
--- a/src/devices/cpu/m6805/m68hc05.h
+++ b/src/devices/cpu/m6805/m68hc05.h
@@ -114,8 +114,8 @@ protected:
void copcr_w(u8 data);
void copr_w(u8 data);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override;
@@ -204,9 +204,9 @@ public:
m68hc05c4_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void c4_map(address_map &map);
+ void c4_map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -220,9 +220,9 @@ public:
m68hc05c8_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void c8_map(address_map &map);
+ void c8_map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -236,12 +236,12 @@ public:
m68hc705c4a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void c4a_map(address_map &map);
+ void c4a_map(address_map &map) ATTR_COLD;
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -260,12 +260,12 @@ public:
m68hc705c8a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void c8a_map(address_map &map);
+ void c8a_map(address_map &map) ATTR_COLD;
- virtual tiny_rom_entry const *device_rom_region() const override;
+ virtual tiny_rom_entry const *device_rom_region() const override ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -290,10 +290,10 @@ public:
m68hc705j1a_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void j1a_map(address_map &map);
+ void j1a_map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -307,9 +307,9 @@ public:
m68hc05l9_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void l9_map(address_map &map);
+ void l9_map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -323,9 +323,9 @@ public:
m68hc05l11_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- void l11_map(address_map &map);
+ void l11_map(address_map &map) ATTR_COLD;
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
diff --git a/src/devices/cpu/m6805/m68hc05e1.cpp b/src/devices/cpu/m6805/m68hc05e1.cpp
new file mode 100644
index 00000000000..b4a220c0d08
--- /dev/null
+++ b/src/devices/cpu/m6805/m68hc05e1.cpp
@@ -0,0 +1,294 @@
+// license:BSD-3-Clause
+// copyright-holders:R. Belmont
+/*
+ Motorola M68HC05E1/E4/etc. 8-bit microcontroller family
+*/
+
+#include "emu.h"
+#include "m68hc05e1.h"
+#include "m6805defs.h"
+#include "6805dasm.h"
+
+#define VERBOSE (0)
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(M68HC05E1, m68hc05e1_device, "m68hc05e1", "Motorola M68HC05E1")
+DEFINE_DEVICE_TYPE(M68HC05E5, m68hc05e5_device, "m68hc05e5", "Motorola M68HC05E5")
+
+constexpr int M68HC05EX_INT_IRQ = M6805_IRQ_LINE;
+constexpr int M68HC05EX_INT_TIMER = M68HC05EX_INT_IRQ + 1;
+constexpr int M68HC05EX_INT_CPI = M68HC05EX_INT_IRQ + 2;
+
+m68hc05ex_device::m68hc05ex_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map) :
+ m6805_base_device(mconfig, tag, owner, clock, type, {s_hc_s_ops, s_hc_cycles, 13, 0x00ff, 0x00c0, 0xfffc}),
+ m_program_config("program", ENDIANNESS_BIG, 8, addrbits, 0, internal_map),
+ m_read_p(*this, 0),
+ m_write_p(*this),
+ m_pll_ctrl(0), m_timer_ctrl(0), m_onesec(0)
+{
+ std::fill(std::begin(m_pullups), std::end(m_pullups), 0);
+}
+
+void m68hc05ex_device::device_start()
+{
+ m6805_base_device::device_start();
+
+ save_item(NAME(m_ports));
+ save_item(NAME(m_ddrs));
+ save_item(NAME(m_pll_ctrl));
+ save_item(NAME(m_timer_ctrl));
+ save_item(NAME(m_onesec));
+
+ memset(m_ports, 0, sizeof(m_ports));
+ memset(m_ddrs, 0, sizeof(m_ddrs));
+
+ m_timer = timer_alloc(FUNC(m68hc05ex_device::seconds_tick), this);
+ m_prog_timer = timer_alloc(FUNC(m68hc05ex_device::timer_tick), this);
+}
+
+void m68hc05ex_device::device_reset()
+{
+ m6805_base_device::device_reset();
+ rm16<false>(0x1ffe, m_pc);
+
+ // all ports reset to input on startup
+ memset(m_ports, 0, sizeof(m_ports));
+ memset(m_ddrs, 0, sizeof(m_ddrs));
+}
+
+device_memory_interface::space_config_vector m68hc05ex_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+void m68hc05ex_device::interrupt_vector()
+{
+ if (BIT(m_pending_interrupts, M68HC05EX_INT_IRQ))
+ {
+ m_pending_interrupts &= ~(1 << M68HC05EX_INT_IRQ);
+ rm16<false>(0x1ffa, m_pc);
+ }
+ else if (BIT(m_pending_interrupts, M68HC05EX_INT_TIMER))
+ {
+ m_pending_interrupts &= ~(1 << M68HC05EX_INT_TIMER);
+ rm16<false>(0x1ff8, m_pc);
+ }
+ else if (BIT(m_pending_interrupts, M68HC05EX_INT_CPI))
+ {
+ m_pending_interrupts &= ~(1 << M68HC05EX_INT_CPI);
+ rm16<false>(0x1ff6, m_pc);
+ }
+}
+
+u64 m68hc05ex_device::execute_clocks_to_cycles(u64 clocks) const noexcept
+{
+ return (clocks + 1) / 2;
+}
+
+u64 m68hc05ex_device::execute_cycles_to_clocks(u64 cycles) const noexcept
+{
+ return cycles * 2;
+}
+
+std::unique_ptr<util::disasm_interface> m68hc05ex_device::create_disassembler()
+{
+ return std::make_unique<m68hc05_disassembler>();
+}
+
+void m68hc05ex_device::send_port(u8 offset, u8 data)
+{
+ m_write_p[offset](data);
+}
+
+u8 m68hc05ex_device::ports_r(offs_t offset)
+{
+ u8 incoming = m_read_p[offset]();
+
+ // apply data direction registers
+ incoming &= (m_ddrs[offset] ^ 0xff);
+ // OR in ddr-masked version of port writes
+ incoming |= (m_ports[offset] & m_ddrs[offset]);
+
+ return incoming;
+}
+
+void m68hc05ex_device::ports_w(offs_t offset, u8 data)
+{
+ send_port(offset, (data & m_ddrs[offset]) | (m_pullups[offset] & ~m_ddrs[offset]));
+ m_ports[offset] = data;
+}
+
+u8 m68hc05ex_device::ddrs_r(offs_t offset)
+{
+ return m_ddrs[offset];
+}
+
+void m68hc05ex_device::ddrs_w(offs_t offset, u8 data)
+{
+ send_port(offset, (m_ports[offset] & data) | (m_pullups[offset] & ~data));
+ m_ddrs[offset] = data;
+}
+
+u8 m68hc05ex_device::pll_r()
+{
+ return m_pll_ctrl;
+}
+
+void m68hc05ex_device::pll_w(u8 data)
+{
+ // Motorola documentation for both the 68HC05E1 and E5 says that rate 3 (4 MHz) is illegal.
+ // The Cuda code sets it to 2 MHz, but comments in the code as well as the cycle counts in
+ // the ADB routines indicate the CPU is intended to run at 4.2 MHz, not 2.1.
+ // So we do this little cheat.
+ if ((data & 3) == 2)
+ {
+ data |= 3;
+ }
+
+ if (m_pll_ctrl != data)
+ {
+ static const int clocks[4] = {524288, 1048576, 2097152, 4194304};
+ LOG("PLL ctrl: clock %d TCS:%d BCS:%d AUTO:%d BWC:%d PLLON:%d (PC=%x)\n", clocks[data & 3],
+ (data & 0x80) ? 1 : 0,
+ (data & 0x40) ? 1 : 0,
+ (data & 0x20) ? 1 : 0,
+ (data & 0x10) ? 1 : 0,
+ (data & 0x08) ? 1 : 0, pc());
+
+ m_prog_timer->adjust(attotime::from_hz(clocks[data & 3] / 1024), 0, attotime::from_hz(clocks[data & 3] / 1024));
+ }
+
+ m_pll_ctrl = data;
+}
+
+u8 m68hc05ex_device::timer_ctrl_r()
+{
+ return m_timer_ctrl;
+}
+
+void m68hc05ex_device::timer_ctrl_w(u8 data)
+{
+ if ((m_timer_ctrl & 0x80) && !(data & 0x80))
+ {
+ set_input_line(M68HC05EX_INT_TIMER, CLEAR_LINE);
+ m_timer_ctrl &= ~0x80;
+ }
+ else if ((m_timer_ctrl & 0x40) && !(data & 0x40))
+ {
+ set_input_line(M68HC05EX_INT_TIMER, CLEAR_LINE);
+ m_timer_ctrl &= ~0x40;
+ }
+
+ m_timer_ctrl &= 0xc0;
+ m_timer_ctrl |= (data & ~0xc0);
+}
+
+u8 m68hc05ex_device::timer_counter_r()
+{
+ // this returns an always-incrementing 8-bit value incremented at 1/4th of the CPU's clock rate.
+ return (total_cycles() / 4) % 256;
+}
+
+u8 m68hc05ex_device::onesec_r()
+{
+ return m_onesec;
+}
+
+void m68hc05ex_device::onesec_w(u8 data)
+{
+ m_timer->adjust(attotime::from_seconds(1), 0, attotime::from_seconds(1));
+
+ if ((m_onesec & 0x40) && !(data & 0x40))
+ {
+ set_input_line(M68HC05EX_INT_CPI, CLEAR_LINE);
+ }
+
+ m_onesec = data;
+}
+
+TIMER_CALLBACK_MEMBER(m68hc05ex_device::seconds_tick)
+{
+ m_onesec |= 0x40;
+
+ if (m_onesec & 0x10)
+ {
+ set_input_line(M68HC05EX_INT_CPI, ASSERT_LINE);
+ }
+}
+
+TIMER_CALLBACK_MEMBER(m68hc05ex_device::timer_tick)
+{
+ m_timer_ctrl |= 0x80;
+
+ if (m_timer_ctrl & 0x20)
+ {
+ set_input_line(M68HC05EX_INT_TIMER, ASSERT_LINE);
+ }
+}
+
+// M68HC05E1
+void m68hc05e1_device::m68hc05e1_map(address_map &map)
+{
+ map(0x0000, 0x0002).rw(FUNC(m68hc05e1_device::ports_r), FUNC(m68hc05e1_device::ports_w));
+ map(0x0004, 0x0006).rw(FUNC(m68hc05e1_device::ddrs_r), FUNC(m68hc05e1_device::ddrs_w));
+ map(0x0007, 0x0007).rw(FUNC(m68hc05e1_device::pll_r), FUNC(m68hc05e1_device::pll_w));
+ map(0x0008, 0x0008).rw(FUNC(m68hc05e1_device::timer_ctrl_r), FUNC(m68hc05e1_device::timer_ctrl_w));
+ map(0x0009, 0x0009).r(FUNC(m68hc05e1_device::timer_counter_r));
+ map(0x0012, 0x0012).rw(FUNC(m68hc05e1_device::onesec_r), FUNC(m68hc05e1_device::onesec_w));
+ map(0x0090, 0x01ff).ram().share(m_internal_ram); // work RAM and stack
+ map(0x0f00, 0x1fff).rom().region(DEVICE_SELF, 0);
+}
+
+m68hc05e1_device::m68hc05e1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ m68hc05ex_device(mconfig, M68HC05E1, tag, owner, clock, 13, address_map_constructor(FUNC(m68hc05e1_device::m68hc05e1_map), this)),
+ m_internal_ram(*this, "internal_ram")
+{
+}
+
+m68hc05e1_device::m68hc05e1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map) :
+ m68hc05ex_device(mconfig, type, tag, owner, clock, 13, internal_map),
+ m_internal_ram(*this, "internal_ram")
+{
+}
+
+u8 m68hc05e1_device::read_internal_ram(offs_t offset)
+{
+ return m_internal_ram[offset];
+}
+
+void m68hc05e1_device::write_internal_ram(offs_t offset, u8 data)
+{
+ m_internal_ram[offset] = data;
+}
+
+// M68HC05E5 - Same as E1 with more ROM and SPI and I2C hardware support
+void m68hc05e5_device::m68hc05e5_map(address_map &map)
+{
+ map(0x0000, 0x0002).rw(FUNC(m68hc05e5_device::ports_r), FUNC(m68hc05e5_device::ports_w));
+ map(0x0004, 0x0006).rw(FUNC(m68hc05e5_device::ddrs_r), FUNC(m68hc05e5_device::ddrs_w));
+ map(0x0007, 0x0007).rw(FUNC(m68hc05e5_device::pll_r), FUNC(m68hc05e5_device::pll_w));
+ map(0x0008, 0x0008).rw(FUNC(m68hc05e5_device::timer_ctrl_r), FUNC(m68hc05e5_device::timer_ctrl_w));
+ map(0x0009, 0x0009).r(FUNC(m68hc05e5_device::timer_counter_r));
+// map(0x000a, 0x000c) // SSI (SPI) registers
+ map(0x0012, 0x0012).rw(FUNC(m68hc05e5_device::onesec_r), FUNC(m68hc05e5_device::onesec_w));
+ map(0x0090, 0x01ff).ram().share(m_internal_ram); // work RAM and stack
+ map(0x0b00, 0x1fff).rom().region(DEVICE_SELF, 0);
+}
+
+m68hc05e5_device::m68hc05e5_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ m68hc05e1_device(mconfig, M68HC05E5, tag, owner, clock, 13, address_map_constructor(FUNC(m68hc05e5_device::m68hc05e5_map), this)),
+ m_internal_ram(*this, "internal_ram")
+{
+}
+
+u8 m68hc05e5_device::read_internal_ram(offs_t offset)
+{
+ return m_internal_ram[offset];
+}
+
+void m68hc05e5_device::write_internal_ram(offs_t offset, u8 data)
+{
+ m_internal_ram[offset] = data;
+}
diff --git a/src/devices/cpu/m6805/m68hc05e1.h b/src/devices/cpu/m6805/m68hc05e1.h
new file mode 100644
index 00000000000..958c41a26a5
--- /dev/null
+++ b/src/devices/cpu/m6805/m68hc05e1.h
@@ -0,0 +1,99 @@
+// license:BSD-3-Clause
+// copyright-holders:R. Belmont
+#ifndef MAME_CPU_M6805_M68HC05E1_H
+#define MAME_CPU_M6805_M68HC05E1_H
+
+#pragma once
+
+#include "emu.h"
+#include "m6805.h"
+
+class m68hc05ex_device : public m6805_base_device
+{
+ friend class m68hc05e1_device;
+
+public:
+ const address_space_config m_program_config;
+
+ template <std::size_t Bit> auto read_p() { return m_read_p[Bit].bind(); }
+ template <std::size_t Bit> auto write_p() { return m_write_p[Bit].bind(); }
+ template <std::size_t Bit> void set_pullups(u8 mask) { m_pullups[Bit] = mask; }
+
+protected:
+ // construction/destruction
+ m68hc05ex_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map);
+
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual void interrupt_vector() override;
+
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override;
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ u8 ports_r(offs_t offset);
+ void ports_w(offs_t offset, u8 data);
+ u8 ddrs_r(offs_t offset);
+ void ddrs_w(offs_t offset, u8 data);
+ u8 read_port(u8 offset);
+ void send_port(u8 offset, u8 data);
+ u8 pll_r();
+ void pll_w(u8 data);
+ u8 timer_ctrl_r();
+ void timer_ctrl_w(u8 data);
+ u8 timer_counter_r();
+ u8 onesec_r();
+ void onesec_w(u8 data);
+
+ devcb_read8::array<5> m_read_p;
+ devcb_write8::array<5> m_write_p;
+
+ u8 m_ports[4], m_ddrs[4], m_pullups[4];
+ u8 m_pll_ctrl;
+ u8 m_timer_ctrl;
+ u8 m_onesec;
+ emu_timer *m_timer, *m_prog_timer;
+
+ TIMER_CALLBACK_MEMBER(seconds_tick);
+ TIMER_CALLBACK_MEMBER(timer_tick);
+};
+
+class m68hc05e1_device : public m68hc05ex_device
+{
+public:
+ m68hc05e1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ u8 read_internal_ram(offs_t offset);
+ void write_internal_ram(offs_t offset, u8 data);
+
+protected:
+ m68hc05e1_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map);
+
+ required_shared_ptr<u8> m_internal_ram;
+
+private:
+ void m68hc05e1_map(address_map &map) ATTR_COLD;
+};
+
+class m68hc05e5_device : public m68hc05e1_device
+{
+public:
+ m68hc05e5_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ u8 read_internal_ram(offs_t offset);
+ void write_internal_ram(offs_t offset, u8 data);
+
+protected:
+ required_shared_ptr<u8> m_internal_ram;
+
+private:
+ void m68hc05e5_map(address_map &map) ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(M68HC05E1, m68hc05e1_device)
+DECLARE_DEVICE_TYPE(M68HC05E5, m68hc05e5_device)
+
+#endif // MAME_CPU_M6805_M58HC05E1_H
diff --git a/src/devices/cpu/m6805/m68hc05pge.cpp b/src/devices/cpu/m6805/m68hc05pge.cpp
new file mode 100644
index 00000000000..880540ffd03
--- /dev/null
+++ b/src/devices/cpu/m6805/m68hc05pge.cpp
@@ -0,0 +1,926 @@
+// license:BSD-3-Clause
+// copyright-holders:R. Belmont
+/*
+ Motorola M68HC05PGE semi-custom "PG&E" 68HC05 Power Management Unit for Apple
+ Emulation by R. Belmont
+
+ Named for the electric utility in Cupertino, Pacific Gas & Electric.
+ Early versions of this chip had screened artwork of a power station with
+ lightning bolts, see the PCB photo at:
+ https://www.dobreprogramy.pl/@macminik/powerbook-duo-best-of-both-worlds,blog,39291
+
+ This is a 160-pin part with a lot of feature blocks. Most of the components appear
+ in other 68HC05 variants so I have included references to HC05 parts with similar
+ or identical versions of that functionality.
+
+ - 512 bytes of internal ROM, which can be banked out
+ - Eleven 8-bit GPIO ports A, B, C, D, E, F, G, H, J, K, and L
+ - Four PWM (pulse width modulation) analog outputs (68HC05F32)
+ - One PLM (pulse length modulation) analog output (68HC05B4)
+ - Four ADC inputs (68HC05B4)
+ - An SPI interface (68HC05F32)
+ - A hardware 10x8 keyboard matrix scanner
+ - A 2-axis hardware quadrature decoder for a mouse or trackball
+ - Fixed-interval one second and 5.86 millisecond timers
+ - A custom RTC that counts a uint32 number of seconds in the classic Mac/IIgs format
+ - A custom Apple Desktop Bus modem
+*/
+
+#include "emu.h"
+#include "m68hc05pge.h"
+#include "m6805defs.h"
+#include "6805dasm.h"
+
+#define LOG_ADB (1U << 1)
+#define LOG_IRQ (1U << 2)
+#define LOG_PWM (1U << 3)
+#define LOG_PLM (1U << 4)
+#define LOG_SPI (1U << 5)
+#define LOG_SPI_VERBOSE (1U << 6)
+#define LOG_ADC (1U << 7)
+
+#define VERBOSE (0)
+
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(M68HC05PGE, m68hc05pge_device, "m68hc05pge", "Motorola M68HC05PGE")
+
+static constexpr int M68HC05PGE_INT_IRQ = M6805_IRQ_LINE; // external IRQ line
+static constexpr int M68HC05PGE_INT_ADB = M68HC05PGE_INT_IRQ + 1; // ADB interrupt
+static constexpr int M68HC05PGE_INT_RTI = M68HC05PGE_INT_IRQ + 2; // real-time (5.86 ms) interrupt
+static constexpr int M68HC05PGE_INT_CPI = M68HC05PGE_INT_IRQ + 3; // one second interrupt
+static constexpr int M68HC05PGE_INT_SPI = M68HC05PGE_INT_IRQ + 4; // SPI interrupt
+static constexpr int M68HC05PGE_INT_KEY = M68HC05PGE_INT_IRQ + 5; // keyboard scanner interrupt
+
+static constexpr u8 CSCR_SRAM_CS = 5; // chip select for $8000-$FFFF SRAM
+static constexpr u8 CSCR_RESET = 0;
+
+static constexpr u8 OPTION_INTROM = 7; // internal ROM at fe00, else external address bus
+static constexpr u8 OPTION_EXTBUS = 6; // tri-state external address bus, else ext. bus enabled
+static constexpr u8 OPTION_IRQSENSE = 1; // IRQ is edge-triggered, else level triggered
+static constexpr u8 OPTION_RESET = (1<<OPTION_INTROM);
+
+static constexpr u8 SPCR_IRQ_ENABLE = 7; // IRQ enabled
+static constexpr u8 SPCR_ENABLE = 6; // SPI mode enabled
+static constexpr u8 SPCR_MASTER = 4; // SPI master mode if set, slave otherwise
+static constexpr u8 SPCR_POLARITY = 3; // SPI clock polarity: 0 = clock starts low, 1 = clock starts high
+static constexpr u8 SPCR_PHASE = 2; // SPI phase: 0 = sampled on the rising edge, 1 = sampled on the falling edge
+
+static constexpr u8 SPSR_IRQ_FLAG = 7; // SPI interrupt flag: 1 = interrupt would occur if IRQ_ENABLE in SPCR is set
+
+static constexpr u8 CPICSR_586_IRQ_FLAG = 7; // 5.86ms interrupt flag
+static constexpr u8 CPICSR_ONESEC_IRQ_FLAG = 6; // 1 second interrupt flag
+static constexpr u8 CPICSR_586_IRQ_ENABLE = 5; // 5.86ms interrupt enable
+static constexpr u8 CPICSR_ONESEC_IRQ_ENABLE = 4; // 1 second interrupt enable
+
+static constexpr u8 ADCSR_CONV_COMPLETE = 7; // ADC conversion complete
+static constexpr u8 ADCSR_START_CONV = 5; // ADC start conversion
+static constexpr u8 ADCSR_CHANNEL_MASK = 0x0f; // ADC channel mask for ADCSR
+
+static constexpr u8 ADBXR_TDRE = 7; // ADB transmitter empty
+static constexpr u8 ADBXR_TC = 6; // ADB transmit complete
+static constexpr u8 ADBXR_SRQ = 5; // ADB got a Service ReQuest
+static constexpr u8 ADBXR_RDRF = 3; // ADB receiver full
+static constexpr u8 ADBXR_BRST = 0; // ADB send reset
+static constexpr u8 ADBXR_IRQS ((1 << ADBXR_TDRE) | (1 << ADBXR_TC) | (1 << ADBXR_SRQ) | (1 << ADBXR_RDRF));
+
+static constexpr int s_spi_divisors[4] = {2, 4, 16, 32};
+
+ROM_START( m68hc05pge )
+ ROM_REGION(0x200, "pge", 0)
+ ROM_LOAD( "pge_boot.bin", 0x000000, 0x000200, CRC(62d4dfed) SHA1(79dc721651bf47aec53f57885779c84c4781761d) )
+ROM_END
+
+m68hc05pge_device::m68hc05pge_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map) :
+ m6805_base_device(mconfig, tag, owner, clock, type, {s_hc_b_ops, s_hc_cycles, 16, 0x00ff, 0x0040, 0xfffc}),
+ device_nvram_interface(mconfig, *this),
+ m_program_config("program", ENDIANNESS_BIG, 8, addrbits, 0, internal_map),
+ m_internal_ram(*this, "internal_ram"),
+ m_introm(*this, "bankfe00"),
+ m_read_tbX(*this, 0),
+ m_read_tbY(*this, 0),
+ m_read_tbB(*this, 0),
+ m_read_p(*this, 0),
+ m_write_p(*this),
+ m_ad_in(*this, 0),
+ m_pwm_out(*this),
+ write_spi_mosi(*this),
+ write_spi_clock(*this),
+ m_pll_ctrl(0), m_timer_ctrl(0), m_onesec(0),
+ m_option(OPTION_RESET),
+ m_cscr(CSCR_RESET),
+ m_spi_in(0), m_spi_out(0),
+ m_spi_bit(0), m_spi_clock(0), m_spi_miso(0),
+ m_spcr(0), m_spsr(0),
+ m_cpicsr(0),
+ m_adcsr(0),
+ m_adbcr(0), m_adbsr(1 << ADBXR_TDRE), m_adbdr(0),
+ m_tbcs(0),
+ m_pwmacr(0), m_pwma0(0), m_pwma1(0),
+ m_pwmbcr(0), m_pwmb0(0), m_pwmb1(0),
+ m_plmcr(0), m_plmt1(0), m_plmt2(0)
+{
+ std::fill(std::begin(m_pullups), std::end(m_pullups), 0);
+}
+
+m68hc05pge_device::m68hc05pge_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ m68hc05pge_device(mconfig, M68HC05PGE, tag, owner, clock, 16, address_map_constructor(FUNC(m68hc05pge_device::m68hc05pge_map), this))
+{
+}
+
+void m68hc05pge_device::device_start()
+{
+ m6805_base_device::device_start();
+
+ save_item(NAME(m_ports));
+ save_item(NAME(m_ddrs));
+ save_item(NAME(m_pll_ctrl));
+ save_item(NAME(m_timer_ctrl));
+ save_item(NAME(m_onesec));
+ save_item(NAME(m_option));
+ save_item(NAME(m_cscr));
+ save_item(NAME(m_spi_in));
+ save_item(NAME(m_spi_out));
+ save_item(NAME(m_spi_bit));
+ save_item(NAME(m_spi_clock));
+ save_item(NAME(m_spi_miso));
+ save_item(NAME(m_spcr));
+ save_item(NAME(m_spsr));
+ save_item(NAME(m_cpicsr));
+ save_item(NAME(m_adcsr));
+ save_item(NAME(m_adbcr));
+ save_item(NAME(m_adbsr));
+ save_item(NAME(m_adbdr));
+ save_item(NAME(m_tbcs));
+ save_item(NAME(m_pwmacr));
+ save_item(NAME(m_pwma0));
+ save_item(NAME(m_pwma1));
+ save_item(NAME(m_pwmbcr));
+ save_item(NAME(m_pwmb0));
+ save_item(NAME(m_pwmb1));
+ save_item(NAME(m_plmcr));
+ save_item(NAME(m_plmt1));
+ save_item(NAME(m_plmt2));
+
+ m_seconds_timer = timer_alloc(FUNC(m68hc05pge_device::seconds_tick), this);
+ m_cpi_timer = timer_alloc(FUNC(m68hc05pge_device::cpi_tick), this);
+ m_spi_timer = timer_alloc(FUNC(m68hc05pge_device::spi_tick), this);
+ m_adb_timer = timer_alloc(FUNC(m68hc05pge_device::adb_tick), this);
+
+ system_time systime;
+ struct tm cur_time, macref;
+ machine().current_datetime(systime);
+
+ cur_time.tm_sec = systime.local_time.second;
+ cur_time.tm_min = systime.local_time.minute;
+ cur_time.tm_hour = systime.local_time.hour;
+ cur_time.tm_mday = systime.local_time.mday;
+ cur_time.tm_mon = systime.local_time.month;
+ cur_time.tm_year = systime.local_time.year - 1900;
+ cur_time.tm_isdst = 0;
+
+ macref.tm_sec = 0;
+ macref.tm_min = 0;
+ macref.tm_hour = 0;
+ macref.tm_mday = 1;
+ macref.tm_mon = 0;
+ macref.tm_year = 4;
+ macref.tm_isdst = 0;
+ const u32 ref = (u32)mktime(&macref);
+ m_rtc = (u32)((u32)mktime(&cur_time) - ref);
+}
+
+void m68hc05pge_device::device_reset()
+{
+ option_w(OPTION_RESET);
+ cscr_w(CSCR_RESET);
+
+ m6805_base_device::device_reset();
+
+ // all ports reset to input on startup
+ memset(m_ports, 0, sizeof(m_ports));
+ memset(m_ddrs, 0, sizeof(m_ddrs));
+
+ // on reset the transmitter is empty
+ m_adbsr = (1 << ADBXR_TDRE);
+
+ // start the 1 second timer
+ m_seconds_timer->adjust(attotime::from_hz(1), 0, attotime::from_hz(1));
+ // and the 5.86ms timer (5.86ms = 5860 uSec)
+ m_cpi_timer->adjust(attotime::from_usec(5860), 0, attotime::from_usec(5860));
+}
+
+device_memory_interface::space_config_vector m68hc05pge_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+void m68hc05pge_device::interrupt_vector()
+{
+ for (int irq = M68HC05PGE_INT_IRQ; irq <= M68HC05PGE_INT_KEY; irq++)
+ {
+ if (BIT(m_pending_interrupts, irq))
+ {
+ LOGMASKED(LOG_IRQ, "Taking IRQ %d vector %04x\n", irq, 0xfffa - (irq << 1));
+ m_pending_interrupts &= ~(1 << irq);
+ rm16<true>(0xfffa - (irq << 1), m_pc);
+ return;
+ }
+ }
+}
+
+u64 m68hc05pge_device::execute_clocks_to_cycles(u64 clocks) const noexcept
+{
+ return (clocks + 1) / 2;
+}
+
+u64 m68hc05pge_device::execute_cycles_to_clocks(u64 cycles) const noexcept
+{
+ return cycles * 2;
+}
+
+std::unique_ptr<util::disasm_interface> m68hc05pge_device::create_disassembler()
+{
+ return std::make_unique<m68hc05_disassembler>();
+}
+
+void m68hc05pge_device::send_port(u8 offset, u8 data)
+{
+ m_write_p[offset](data);
+}
+
+u8 m68hc05pge_device::ports_r(offs_t offset)
+{
+ u8 incoming = m_read_p[offset]();
+
+ // apply data direction registers
+ incoming &= (m_ddrs[offset] ^ 0xff);
+ // OR in ddr-masked version of port writes
+ incoming |= (m_ports[offset] & m_ddrs[offset]);
+
+ return incoming;
+}
+
+void m68hc05pge_device::ports_w(offs_t offset, u8 data)
+{
+ send_port(offset, (data & m_ddrs[offset]) | (m_pullups[offset] & ~m_ddrs[offset]));
+ m_ports[offset] = data;
+}
+
+u8 m68hc05pge_device::ddrs_r(offs_t offset)
+{
+ return m_ddrs[offset];
+}
+
+void m68hc05pge_device::ddrs_w(offs_t offset, u8 data)
+{
+ send_port(offset, (m_ports[offset] & data) | (m_pullups[offset] & ~data));
+ m_ddrs[offset] = data;
+}
+
+u8 m68hc05pge_device::pll_r()
+{
+ return m_pll_ctrl;
+}
+
+void m68hc05pge_device::pll_w(u8 data)
+{
+ if (m_pll_ctrl != data)
+ {
+ static const int clocks[4] = {524288, 1048576, 2097152, 4194304};
+ LOG("PLL ctrl: clock %d TCS:%d BCS:%d AUTO:%d BWC:%d PLLON:%d (PC=%x)\n", clocks[data & 3],
+ (data & 0x80) ? 1 : 0,
+ (data & 0x40) ? 1 : 0,
+ (data & 0x20) ? 1 : 0,
+ (data & 0x10) ? 1 : 0,
+ (data & 0x08) ? 1 : 0, pc());
+ }
+
+ m_pll_ctrl = data;
+}
+
+void m68hc05pge_device::execute_set_input(int inputnum, int state)
+{
+ if (state == CLEAR_LINE)
+ {
+ m_pending_interrupts &= ~(1 << inputnum);
+ }
+ else
+ {
+ m_pending_interrupts |= (1 << inputnum);
+ }
+}
+
+// fires every 1 second
+TIMER_CALLBACK_MEMBER(m68hc05pge_device::seconds_tick)
+{
+ m_rtc++;
+ m_cpicsr |= (1 << CPICSR_ONESEC_IRQ_FLAG);
+ if (BIT(m_cpicsr, CPICSR_ONESEC_IRQ_ENABLE))
+ {
+ set_input_line(M68HC05PGE_INT_CPI, ASSERT_LINE);
+ }
+}
+
+// fires every 5.86ms
+TIMER_CALLBACK_MEMBER(m68hc05pge_device::cpi_tick)
+{
+ m_cpicsr |= (1 << CPICSR_586_IRQ_FLAG);
+ if (BIT(m_cpicsr, CPICSR_586_IRQ_ENABLE))
+ {
+ set_input_line(M68HC05PGE_INT_RTI, ASSERT_LINE);
+ }
+}
+
+const tiny_rom_entry *m68hc05pge_device::device_rom_region() const
+{
+ return ROM_NAME(m68hc05pge);
+}
+
+void m68hc05pge_device::m68hc05pge_map(address_map &map)
+{
+ map(0x0000, 0x0003).rw(FUNC(m68hc05pge_device::ports_r), FUNC(m68hc05pge_device::ports_w));
+ map(0x0004, 0x0006).rw(FUNC(m68hc05pge_device::ddrs_r), FUNC(m68hc05pge_device::ddrs_w));
+ map(0x0007, 0x0007).rw(FUNC(m68hc05pge_device::pll_r), FUNC(m68hc05pge_device::pll_w));
+ map(0x000a, 0x000c).rw(FUNC(m68hc05pge_device::spi_r), FUNC(m68hc05pge_device::spi_w));
+ map(0x000d, 0x000d).rw(FUNC(m68hc05pge_device::cpicsr_r), FUNC(m68hc05pge_device::cpicsr_w));
+ map(0x000e, 0x000e).rw(FUNC(m68hc05pge_device::cscr_r), FUNC(m68hc05pge_device::cscr_w));
+ map(0x000f, 0x000f).rw(FUNC(m68hc05pge_device::kcsr_r), FUNC(m68hc05pge_device::kcsr_w));
+ map(0x0014, 0x0016).rw(FUNC(m68hc05pge_device::trackball_r), FUNC(m68hc05pge_device::trackball_w));
+ map(0x0018, 0x001a).rw(FUNC(m68hc05pge_device::adb_r), FUNC(m68hc05pge_device::adb_w));
+ map(0x001c, 0x001c).rw(FUNC(m68hc05pge_device::option_r), FUNC(m68hc05pge_device::option_w));
+ map(0x001d, 0x001e).rw(FUNC(m68hc05pge_device::adc_r), FUNC(m68hc05pge_device::adc_w));
+ map(0x0020, 0x002c).rw(FUNC(m68hc05pge_device::ports_high_r), FUNC(m68hc05pge_device::ports_high_w));
+ map(0x002d, 0x0032).rw(FUNC(m68hc05pge_device::pwm_r), FUNC(m68hc05pge_device::pwm_w));
+ map(0x0034, 0x0036).rw(FUNC(m68hc05pge_device::plm_r), FUNC(m68hc05pge_device::plm_w));
+ map(0x0038, 0x003b).rw(FUNC(m68hc05pge_device::rtc_r), FUNC(m68hc05pge_device::rtc_w));
+ map(0x0040, 0x03ff).ram().share(m_internal_ram); // internal RAM
+ map(0x0ff0, 0x0ff0).nopw(); // watchdog reset (period not known)
+
+ map(0x8000, 0xffff).view(m_introm);
+ m_introm[0](0x8000, 0xffff).rw(FUNC(m68hc05pge_device::sram_r), FUNC(m68hc05pge_device::sram_w));
+ m_introm[1](0x8000, 0xffff).rw(FUNC(m68hc05pge_device::sram_r), FUNC(m68hc05pge_device::sram_w));
+ m_introm[1](0xfe00, 0xffff).rom().region("pge", 0);
+}
+
+u8 m68hc05pge_device::sram_r(offs_t offset)
+{
+ if (BIT(m_cscr, CSCR_SRAM_CS) && !BIT(m_option, OPTION_EXTBUS))
+ {
+ return m_sram[offset];
+ }
+
+ return 0xff;
+}
+
+void m68hc05pge_device::sram_w(offs_t offset, u8 data)
+{
+ if (BIT(m_cscr, CSCR_SRAM_CS) && !BIT(m_option, OPTION_EXTBUS))
+ {
+ m_sram[offset] = data;
+ }
+}
+
+u8 m68hc05pge_device::spi_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ return m_spcr;
+
+ case 1:
+ return m_spsr;
+
+ case 2:
+ if (!machine().side_effects_disabled())
+ {
+ LOGMASKED(LOG_SPI, "SPI got %02x\n", m_spi_in);
+ if (BIT(m_spsr, SPSR_IRQ_FLAG))
+ {
+ set_input_line(M68HC05PGE_INT_SPI, CLEAR_LINE);
+ }
+ }
+ return m_spi_in;
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::spi_w(offs_t offset, u8 data)
+{
+ switch (offset)
+ {
+ case 0:
+ m_spcr = data;
+ m_spi_clock = BIT(m_spcr, SPCR_POLARITY);
+ write_spi_clock(m_spi_clock);
+ break;
+
+ case 2:
+ if (!BIT(m_spcr, SPCR_MASTER))
+ {
+ logerror("68HC05PGE: SPI slave mode not implemented\n");
+ }
+
+ if (BIT(m_spsr, SPSR_IRQ_FLAG))
+ {
+ set_input_line(M68HC05PGE_INT_SPI, CLEAR_LINE);
+ }
+ m_spsr &= ~(1 << SPSR_IRQ_FLAG);
+
+ m_spi_clock = BIT(m_spcr, SPCR_POLARITY);
+ write_spi_clock(m_spi_clock);
+
+ m_spi_out = data;
+ m_spi_in = 0;
+ LOGMASKED(LOG_SPI, "SPI: sending %02x, clock rate %d\n", data, clock() / s_spi_divisors[m_spcr & 3]);
+ m_spi_bit = 16;
+ m_spi_timer->adjust(attotime::from_hz(clock() / s_spi_divisors[m_spcr & 3]));
+ break;
+ }
+}
+
+TIMER_CALLBACK_MEMBER(m68hc05pge_device::spi_tick)
+{
+ LOGMASKED(LOG_SPI_VERBOSE, "spi_tick: bit %d\n", m_spi_bit);
+
+ // first clock edge of a bit
+ if (!(m_spi_bit & 1))
+ {
+ // phase = 0, set up the output data before sending the first clock edge of the bit
+ if (!BIT(m_spcr, SPCR_PHASE))
+ {
+ write_spi_mosi(BIT(m_spi_out, 7));
+ m_spi_out <<= 1;
+ }
+
+ write_spi_clock(m_spi_clock ^ 1);
+
+ // phase = 0, input bit became valid on that first edge
+ if (!BIT(m_spcr, SPCR_PHASE))
+ {
+ m_spi_in <<= 1;
+ m_spi_in |= m_spi_miso;
+ LOGMASKED(LOG_SPI_VERBOSE, "PGE: MISO %d, shift %02x (PH0 POL%d)\n", m_spi_miso, m_spi_in, BIT(m_spcr, SPCR_POLARITY));
+ }
+ }
+ else // second clock edge of the bit
+ {
+ // phase = 1, the output bit must be valid before this clock edge
+ if (BIT(m_spcr, SPCR_PHASE))
+ {
+ write_spi_mosi(BIT(m_spi_out, 7));
+ m_spi_out <<= 1;
+ }
+
+ write_spi_clock(m_spi_clock);
+
+ // phase = 1, input bit became valid on this second edge
+ if (BIT(m_spcr, SPCR_PHASE))
+ {
+ m_spi_in <<= 1;
+ m_spi_in |= m_spi_miso;
+ LOGMASKED(LOG_SPI_VERBOSE, "PGE: MISO %d, shift %02x (PH1 POL%d)\n", m_spi_miso, m_spi_in, BIT(m_spcr, SPCR_POLARITY));
+ }
+ }
+
+ m_spi_bit--;
+ if (m_spi_bit > 0)
+ {
+ m_spi_timer->adjust(attotime::from_hz(clock() / s_spi_divisors[m_spcr & 3]));
+ }
+ else
+ {
+ m_spsr |= (1 << SPSR_IRQ_FLAG);
+ if (BIT(m_spcr, SPCR_IRQ_ENABLE))
+ {
+ set_input_line(M68HC05PGE_INT_SPI, ASSERT_LINE);
+ }
+ }
+}
+
+u8 m68hc05pge_device::cpicsr_r()
+{
+ return m_cpicsr;
+}
+
+void m68hc05pge_device::cpicsr_w(u8 data)
+{
+ m_cpicsr = data;
+ if (!BIT(data, CPICSR_ONESEC_IRQ_FLAG))
+ {
+ set_input_line(M68HC05PGE_INT_CPI, CLEAR_LINE);
+ }
+ if (!BIT(data, CPICSR_586_IRQ_FLAG))
+ {
+ set_input_line(M68HC05PGE_INT_RTI, CLEAR_LINE);
+ }
+}
+
+u8 m68hc05pge_device::cscr_r()
+{
+ return m_cscr;
+}
+
+void m68hc05pge_device::cscr_w(u8 data)
+{
+ m_cscr = data;
+}
+
+u8 m68hc05pge_device::kcsr_r()
+{
+ return 0;
+}
+
+void m68hc05pge_device::kcsr_w(u8 data)
+{
+// printf("%02x to KCSR\n", data);
+}
+
+u8 m68hc05pge_device::trackball_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0: // TBCS
+ return (m_read_tbB() << 7) | m_tbcs; // button not pressed
+ break;
+
+ case 1: // signed X delta
+ return m_read_tbX();
+
+ case 2: // signed Y delta
+ return m_read_tbY();
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::trackball_w(offs_t offset, u8 data)
+{
+ if (offset == 0)
+ {
+ m_tbcs = data & 0x7f;
+ }
+}
+
+u8 m68hc05pge_device::adb_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ return m_adbcr;
+
+ case 1:
+ return m_adbsr;
+
+ case 2:
+ return m_adbdr;
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::adb_w(offs_t offset, u8 data)
+{
+ //printf("%02x to ADB @ %d\n", data, offset);
+ switch (offset)
+ {
+ case 0:
+ //printf("%02x to ADBCR, previous %02x\n", data, m_adbcr);
+ // if we're clearing transmit complete, set transmitter empty
+ if (BIT(m_adbcr, ADBXR_TC) && !BIT(data, ADBXR_TC))
+ {
+ //printf("ADB enabling transmitter empty\n");
+ m_adbsr |= (1 << ADBXR_TDRE);
+ }
+
+ // if we're clearing transmitter empty, kick the timer for transmitter complete
+ if (BIT(m_adbcr, ADBXR_TDRE) && !BIT(data, ADBXR_TDRE))
+ {
+ //printf("ADB setting completion timer\n");
+ m_adb_timer->adjust(attotime::from_usec(50), 1);
+ }
+
+ m_adbcr = data;
+ if (m_adbsr & m_adbcr & ADBXR_IRQS)
+ {
+ set_input_line(M68HC05PGE_INT_ADB, ASSERT_LINE);
+ }
+ else
+ {
+ set_input_line(M68HC05PGE_INT_ADB, CLEAR_LINE);
+ }
+ break;
+
+ case 1:
+ m_adbsr = data;
+ if (m_adbsr & m_adbcr & ADBXR_IRQS)
+ {
+ set_input_line(M68HC05PGE_INT_ADB, ASSERT_LINE);
+ }
+ else
+ {
+ set_input_line(M68HC05PGE_INT_ADB, CLEAR_LINE);
+ }
+ break;
+
+ case 2:
+ m_adbdr = data;
+ LOGMASKED(LOG_ADB, "ADB sending %02x\n", data);
+ m_adbsr &= ~((1 << ADBXR_TDRE) | (1 << ADBXR_TC));
+ m_adb_timer->adjust(attotime::from_usec(1200), 0);
+ break;
+ }
+}
+
+TIMER_CALLBACK_MEMBER(m68hc05pge_device::adb_tick)
+{
+ switch (param)
+ {
+ case 0: // byte transmitted, trigger transmitter empty
+ m_adbsr |= (1 << ADBXR_TDRE);
+ break;
+
+ case 1:
+ m_adbsr |= (1 << ADBXR_TC);
+ break;
+ }
+
+ if (m_adbsr & m_adbcr & ADBXR_IRQS)
+ {
+ set_input_line(M68HC05PGE_INT_ADB, ASSERT_LINE);
+ }
+}
+
+u8 m68hc05pge_device::option_r()
+{
+ return m_option;
+}
+
+void m68hc05pge_device::option_w(u8 data)
+{
+ LOGMASKED(LOG_GENERAL, "%02x to OPTION\n", data);
+ m_option = data;
+
+ m_introm.select(BIT(data, OPTION_INTROM));
+}
+
+u8 m68hc05pge_device::adc_r(offs_t offset)
+{
+ if (!offset)
+ {
+ LOGMASKED(LOG_ADC, "ADC read ch %d\n", m_adcsr & ADCSR_CHANNEL_MASK);
+ return m_ad_in[m_adcsr & ADCSR_CHANNEL_MASK]();
+ }
+
+ return m_adcsr;
+}
+
+void m68hc05pge_device::adc_w(offs_t offset, u8 data)
+{
+ LOGMASKED(LOG_ADC, "%02x to ADC @ %d\n", data, offset);
+ if (offset)
+ {
+ m_adcsr = data;
+
+ if (BIT(m_adcsr, ADCSR_START_CONV))
+ {
+ m_adcsr |= (1 << ADCSR_CONV_COMPLETE);
+ }
+ }
+}
+
+u8 m68hc05pge_device::ports_high_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0: // PORTE
+ case 2: // PORTF
+ case 4: // PORTG
+ case 6: // PORTH
+ case 8: // PORTJ
+ return ports_r((offset >> 1) + PGE_PORTE);
+
+ case 0xa: // PORTL
+ return ports_r(PGE_PORTL);
+
+ case 0xc: // PORTK
+ return ports_r(PGE_PORTK);
+
+ case 1: // DDRE
+ case 3: // DDRF
+ case 5: // DDRG
+ case 7: // DDRH
+ case 9: // DDRJ
+ return m_ddrs[(offset >> 1) + PGE_PORTE];
+
+ case 0xb: // DDRL
+ return m_ddrs[PGE_PORTL];
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::ports_high_w(offs_t offset, u8 data)
+{
+ switch (offset)
+ {
+ case 0: // PORTE
+ case 2: // PORTF
+ case 4: // PORTG
+ case 6: // PORTH
+ case 8: // PORTJ
+ ports_w((offset >> 1) + PGE_PORTE, data);
+ break;
+
+ case 0xa: // PORTL
+ ports_w(PGE_PORTL, data);
+ break;
+
+ case 0xc: // PORTK
+ ports_w(PGE_PORTK, data);
+ break;
+
+ case 1: // DDRE
+ case 3: // DDRF
+ case 5: // DDRG
+ case 7: // DDRH
+ case 9: // DDRJ
+ ddrs_w((offset >> 1) + PGE_PORTE, data);
+ break;
+
+ case 0xb: // DDRL
+ ddrs_w(PGE_PORTL, data);
+ break;
+ }
+}
+
+u8 m68hc05pge_device::pwm_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ return m_pwmacr;
+
+ case 1:
+ return m_pwma0;
+
+ case 2:
+ return m_pwma1;
+
+ case 3:
+ return m_pwmbcr;
+
+ case 4:
+ return m_pwmb0;
+
+ case 5:
+ return m_pwmb1;
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::pwm_w(offs_t offset, u8 data)
+{
+ LOGMASKED(LOG_PWM, "%02x to PWM @ %d\n", data, offset);
+ switch (offset)
+ {
+ case 0: // PWMACR
+ m_pwmacr = data;
+ break;
+
+ case 1: // PWMA0
+ LOGMASKED(LOG_PWM, "%02x to PWMA0\n", data);
+ m_pwma0 = data;
+ m_pwm_out[PGE_PWMA0](data);
+ break;
+
+ case 2: // PWMA1
+ LOGMASKED(LOG_PWM, "%02x to PWMA1\n", data);
+ m_pwma1 = data;
+ m_pwm_out[PGE_PWMA1](data);
+ break;
+
+ case 3: // PWMBCR
+ m_pwmbcr = data;
+ break;
+
+ case 4: // PWMB0
+ LOGMASKED(LOG_PWM, "%02x to PWMB0\n", data);
+ m_pwmb0 = data;
+ m_pwm_out[PGE_PWMB0](data);
+ break;
+
+ case 5: // PWMB1
+ LOGMASKED(LOG_PWM, "%02x to PWMB1\n", data);
+ m_pwmb1 = data;
+ m_pwm_out[PGE_PWMB1](data);
+ break;
+ }
+}
+
+u8 m68hc05pge_device::plm_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ return m_plmcr;
+
+ case 1:
+ return m_plmt1;
+
+ case 2:
+ return m_plmt2;
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::plm_w(offs_t offset, u8 data)
+{
+ LOGMASKED(LOG_PLM, "%02x to PLM @ %d\n", data, offset);
+ switch (offset)
+ {
+ case 0: // PLMCR
+ m_plmcr = data;
+ break;
+
+ case 1: // PLM timer 1
+ m_plmt1 = data;
+ break;
+
+ case 2: // PLM timer 2
+ m_plmt2 = data;
+ break;
+ }
+}
+
+u8 m68hc05pge_device::rtc_r(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ return m_rtc >> 24;
+
+ case 1:
+ return (m_rtc >> 16) & 0xff;
+
+ case 2:
+ return (m_rtc >> 8) & 0xff;
+
+ case 3:
+ return m_rtc & 0xff;
+ }
+
+ return 0;
+}
+
+void m68hc05pge_device::rtc_w(offs_t offset, u8 data)
+{
+ switch (offset)
+ {
+ case 0:
+ m_rtc &= ~0xff000000;
+ m_rtc |= data << 24;
+ break;
+
+ case 1:
+ m_rtc &= ~0x00ff0000;
+ m_rtc |= data << 16;
+ break;
+
+ case 2:
+ m_rtc &= ~0x0000ff00;
+ m_rtc |= data << 8;
+ break;
+
+ case 3:
+ m_rtc &= ~0x000000ff;
+ m_rtc |= data;
+ break;
+ }
+}
+
+void m68hc05pge_device::nvram_default()
+{
+}
+
+bool m68hc05pge_device::nvram_read(util::read_stream &file)
+{
+ auto const [err, actual] = read(file, m_internal_ram, 0x3c0);
+ auto const [err2, actual2] = read(file, m_sram, 0x8000);
+
+ m_internal_ram[0x91 - 0x40] = 0; // clear power flag so the boot ROM does a cold boot
+
+ return !err && !err2;
+}
+
+bool m68hc05pge_device::nvram_write(util::write_stream &file)
+{
+ auto const [err, actual] = write(file, m_internal_ram, 0x3c0);
+ auto const [err2, actual2] = write(file, m_sram, 0x8000);
+ return !err && !err2;
+}
diff --git a/src/devices/cpu/m6805/m68hc05pge.h b/src/devices/cpu/m6805/m68hc05pge.h
new file mode 100644
index 00000000000..bd29b19057b
--- /dev/null
+++ b/src/devices/cpu/m6805/m68hc05pge.h
@@ -0,0 +1,150 @@
+// license:BSD-3-Clause
+// copyright-holders:R. Belmont
+#ifndef MAME_CPU_M6805_M68HC05PGE_H
+#define MAME_CPU_M6805_M68HC05PGE_H
+
+#pragma once
+
+#include "emu.h"
+#include "m6805.h"
+
+class m68hc05pge_device : public m6805_base_device, public device_nvram_interface
+{
+public:
+ const address_space_config m_program_config;
+
+ static constexpr int PGE_PORTA = 0;
+ static constexpr int PGE_PORTB = 1;
+ static constexpr int PGE_PORTC = 2;
+ static constexpr int PGE_PORTD = 3;
+ static constexpr int PGE_PORTE = 4;
+ static constexpr int PGE_PORTF = 5;
+ static constexpr int PGE_PORTG = 6;
+ static constexpr int PGE_PORTH = 7;
+ static constexpr int PGE_PORTJ = 8;
+ static constexpr int PGE_PORTK = 9;
+ static constexpr int PGE_PORTL = 10;
+
+ static constexpr int PGE_PWMA0 = 0;
+ static constexpr int PGE_PWMA1 = 1;
+ static constexpr int PGE_PWMB0 = 2;
+ static constexpr int PGE_PWMB1 = 3;
+
+ m68hc05pge_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ auto read_tbX() { return m_read_tbX.bind(); } // trackball X
+ auto read_tbY() { return m_read_tbY.bind(); } // trackball Y
+ auto read_tbB() { return m_read_tbB.bind(); } // trackball button
+ template <std::size_t Bit> auto read_p() { return m_read_p[Bit].bind(); }
+ template <std::size_t Bit> auto write_p() { return m_write_p[Bit].bind(); }
+ template <std::size_t Bit> void set_pullups(u8 mask) { m_pullups[Bit] = mask; }
+
+ template <std::size_t ad_port> auto ad_in() { return m_ad_in[ad_port].bind(); }
+
+ template <std::size_t pwm> auto pwm_out() { return m_pwm_out[pwm].bind(); }
+
+ auto spi_mosi_callback() { return write_spi_mosi.bind(); }
+ auto spi_clock_callback() { return write_spi_clock.bind(); }
+ void spi_miso_w(int state) { m_spi_miso = state; }
+
+protected:
+ // construction/destruction
+ m68hc05pge_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrbits, address_map_constructor internal_map);
+
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual space_config_vector memory_space_config() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
+
+ virtual void nvram_default() override;
+ virtual bool nvram_read(util::read_stream &file) override;
+ virtual bool nvram_write(util::write_stream &file) override;
+
+ virtual void interrupt_vector() override;
+
+ virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override;
+ virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override;
+ virtual void execute_set_input(int inputnum, int state) override;
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ void m68hc05pge_map(address_map &map) ATTR_COLD;
+
+ u8 ports_r(offs_t offset);
+ void ports_w(offs_t offset, u8 data);
+ u8 ddrs_r(offs_t offset);
+ void ddrs_w(offs_t offset, u8 data);
+ u8 read_port(u8 offset);
+ void send_port(u8 offset, u8 data);
+ u8 pll_r();
+ void pll_w(u8 data);
+ u8 spi_r(offs_t offset);
+ void spi_w(offs_t offset, u8 data);
+ u8 cpicsr_r();
+ void cpicsr_w(u8 data);
+ u8 cscr_r();
+ void cscr_w(u8 data);
+ u8 kcsr_r();
+ void kcsr_w(u8 data);
+ u8 trackball_r(offs_t offset);
+ void trackball_w(offs_t offset, u8 data);
+ u8 adb_r(offs_t offset);
+ void adb_w(offs_t offset, u8 data);
+ u8 option_r();
+ void option_w(u8 data);
+ u8 adc_r(offs_t offset);
+ void adc_w(offs_t offset, u8 data);
+ u8 ports_high_r(offs_t offset);
+ void ports_high_w(offs_t offset, u8 data);
+ u8 pwm_r(offs_t offset);
+ void pwm_w(offs_t offset, u8 data);
+ u8 plm_r(offs_t offset);
+ void plm_w(offs_t offset, u8 data);
+ u8 rtc_r(offs_t offset);
+ void rtc_w(offs_t offset, u8 data);
+ u8 sram_r(offs_t offset);
+ void sram_w(offs_t offset, u8 data);
+
+ TIMER_CALLBACK_MEMBER(seconds_tick);
+ TIMER_CALLBACK_MEMBER(cpi_tick);
+ TIMER_CALLBACK_MEMBER(spi_tick);
+ TIMER_CALLBACK_MEMBER(adb_tick);
+
+ required_shared_ptr<u8> m_internal_ram;
+
+ memory_view m_introm;
+
+ devcb_read8 m_read_tbX, m_read_tbY;
+ devcb_read_line m_read_tbB;
+ devcb_read8::array<11> m_read_p;
+ devcb_write8::array<11> m_write_p;
+
+ devcb_read8::array<16> m_ad_in;
+
+ devcb_write8::array<4> m_pwm_out;
+
+ devcb_write_line write_spi_mosi, write_spi_clock;
+
+ u8 m_ports[11], m_ddrs[11], m_pullups[11];
+ u8 m_pll_ctrl;
+ u8 m_timer_ctrl;
+ u8 m_onesec;
+ u8 m_option, m_cscr;
+ u8 m_spi_in, m_spi_out;
+ int m_spi_bit, m_spi_clock, m_spi_miso;
+ u8 m_spcr, m_spsr;
+ u8 m_cpicsr;
+ u8 m_adcsr;
+ u8 m_adbcr, m_adbsr, m_adbdr;
+ u8 m_tbcs;
+ u8 m_pwmacr, m_pwma0, m_pwma1;
+ u8 m_pwmbcr, m_pwmb0, m_pwmb1;
+ u8 m_plmcr, m_plmt1, m_plmt2;
+ emu_timer *m_seconds_timer, *m_cpi_timer, *m_spi_timer, *m_adb_timer;
+ u32 m_rtc;
+ u8 m_sram[0x8000];
+};
+
+DECLARE_DEVICE_TYPE(M68HC05PGE, m68hc05pge_device)
+
+#endif // MAME_CPU_M6805_M58HC05PGE_H
diff --git a/src/devices/cpu/m6809/6x09dasm.cpp b/src/devices/cpu/m6809/6x09dasm.cpp
index d43e1ce612b..b7b64fc63e5 100644
--- a/src/devices/cpu/m6809/6x09dasm.cpp
+++ b/src/devices/cpu/m6809/6x09dasm.cpp
@@ -16,6 +16,11 @@
Thanks to Franklin Bowen for bug fixes, ideas
+ TODO:
+ - KONAMI EXG/TFR isn't disassembled accurately:
+ 0x3E/0x3F + param bit 7 clear = EXG
+ 0x3E/0x3F + param bit 7 set = TFR
+
*****************************************************************************/
#include "emu.h"
@@ -27,7 +32,7 @@ const char *const m6x09_base_disassembler::m6x09_regs[5] = { "X", "Y", "U", "S",
const char *const m6x09_base_disassembler::m6x09_btwregs[5] = { "CC", "A", "B", "inv" };
const char *const m6x09_base_disassembler::hd6309_tfmregs[16] = {
- "D", "X", "Y", "U", "S", "inv", "inv", "inv",
+ "D", "X", "Y", "U", "S", "inv", "inv", "inv",
"inv", "inv", "inv", "inv", "inv", "inv", "inv", "inv"
};
@@ -50,7 +55,7 @@ m6x09_base_disassembler::m6x09_base_disassembler(const opcodeinfo *opcodes, size
: m_level(level), m_page(0)
{
// create filtered opcode table
- for (int i=0; i<opcode_count; i++)
+ for (int i = 0; i < opcode_count; i++)
{
if (opcodes[i].level() & level)
{
@@ -993,13 +998,13 @@ void m6x09_disassembler::indexed(std::ostream &stream, uint8_t pb, const data_bu
case 0x8c: // (+/- 7 bit offset),PC
offset = (int8_t)params.r8(p++);
- util::stream_format(stream, "$%04X,PCR", (p+offset)); // PC Relative addressing (assembler computes offset from specified absolute address)
+ util::stream_format(stream, "$%04X,PCR", (p+offset) & 0xffff); // PC Relative addressing (assembler computes offset from specified absolute address)
break;
case 0x8d: // (+/- 15 bit offset),PC
offset = (int16_t)params.r16(p);
p += 2;
- util::stream_format(stream, "$%04X,PCR", (p+offset)); // PC Relative addressing (assembler computes offset from specified absolute address)
+ util::stream_format(stream, "$%04X,PCR", (p+offset) & 0xffff); // PC Relative addressing (assembler computes offset from specified absolute address)
break;
case 0x8e: // (+/- W),R
@@ -1145,16 +1150,16 @@ const m6x09_base_disassembler::opcodeinfo konami_disassembler::konami_opcodes[]
{ 0x2E, 1, "EORA", IND, M6x09_GENERAL },
{ 0x2F, 1, "EORB", IND, M6x09_GENERAL },
- { 0x30, 1, "ORA", IMM, M6x09_GENERAL },
- { 0x31, 1, "ORB", IMM, M6x09_GENERAL },
- { 0x32, 1, "ORA", IND, M6x09_GENERAL },
- { 0x33, 1, "ORB", IND, M6x09_GENERAL },
- { 0x34, 1, "CMPA", IMM, M6x09_GENERAL },
- { 0x35, 1, "CMPB", IMM, M6x09_GENERAL },
- { 0x36, 1, "CMPA", IND, M6x09_GENERAL },
- { 0x37, 1, "CMPB", IND, M6x09_GENERAL },
- { 0x38, 1, "SETLINES", IMM, M6x09_GENERAL },
- { 0x39, 1, "SETLINES", IND, M6x09_GENERAL },
+ { 0x30, 1, "ORA", IMM, M6x09_GENERAL },
+ { 0x31, 1, "ORB", IMM, M6x09_GENERAL },
+ { 0x32, 1, "ORA", IND, M6x09_GENERAL },
+ { 0x33, 1, "ORB", IND, M6x09_GENERAL },
+ { 0x34, 1, "CMPA", IMM, M6x09_GENERAL },
+ { 0x35, 1, "CMPB", IMM, M6x09_GENERAL },
+ { 0x36, 1, "CMPA", IND, M6x09_GENERAL },
+ { 0x37, 1, "CMPB", IND, M6x09_GENERAL },
+ { 0x38, 1, "SETLN", IMM, M6x09_GENERAL },
+ { 0x39, 1, "SETLN", IND, M6x09_GENERAL },
{ 0x3A, 1, "STA", IND, M6x09_GENERAL },
{ 0x3B, 1, "STB", IND, M6x09_GENERAL },
{ 0x3C, 1, "ANDCC", IMM, M6x09_GENERAL },
@@ -1242,7 +1247,7 @@ const m6x09_base_disassembler::opcodeinfo konami_disassembler::konami_opcodes[]
{ 0x8C, 0, "DECA", INH, M6x09_GENERAL },
{ 0x8D, 0, "DECB", INH, M6x09_GENERAL },
{ 0x8E, 1, "DEC", IND, M6x09_GENERAL },
- { 0x8F, 0, "RTS", INH , M6x09_GENERAL, STEP_OUT },
+ { 0x8F, 0, "RTS", INH, M6x09_GENERAL, STEP_OUT },
{ 0x90, 0, "TSTA", INH, M6x09_GENERAL },
{ 0x91, 0, "TSTB", INH, M6x09_GENERAL },
@@ -1259,59 +1264,59 @@ const m6x09_base_disassembler::opcodeinfo konami_disassembler::konami_opcodes[]
{ 0x9C, 0, "ASLA", INH, M6x09_GENERAL },
{ 0x9D, 0, "ASLB", INH, M6x09_GENERAL },
{ 0x9E, 1, "ASL", IND, M6x09_GENERAL },
- { 0x9F, 0, "RTI", INH , M6x09_GENERAL, STEP_OUT },
-
- { 0xA0, 0, "ROLA", INH, M6x09_GENERAL },
- { 0xA1, 0, "ROLB", INH, M6x09_GENERAL },
- { 0xA2, 1, "ROL", IND, M6x09_GENERAL },
- { 0xA3, 1, "LSRW", IND, M6x09_GENERAL },
- { 0xA4, 1, "RORW", IND, M6x09_GENERAL },
- { 0xA5, 1, "ASRW", IND, M6x09_GENERAL },
- { 0xA6, 1, "ASLW", IND, M6x09_GENERAL },
- { 0xA7, 1, "ROLW", IND, M6x09_GENERAL },
- { 0xA8, 1, "JMP", IND, M6x09_GENERAL },
- { 0xA9, 1, "JSR", IND, M6x09_GENERAL, STEP_OVER },
- { 0xAA, 1, "BSR", REL, M6x09_GENERAL, STEP_OVER },
- { 0xAB, 2, "LBSR", LREL, M6x09_GENERAL, STEP_OVER },
- { 0xAC, 1, "DECB,JNZ", REL, M6x09_GENERAL },
- { 0xAD, 1, "DECX,JNZ", REL, M6x09_GENERAL },
- { 0xAE, 0, "NOP", INH, M6x09_GENERAL },
+ { 0x9F, 0, "RTI", INH, M6x09_GENERAL, STEP_OUT },
+
+ { 0xA0, 0, "ROLA", INH, M6x09_GENERAL },
+ { 0xA1, 0, "ROLB", INH, M6x09_GENERAL },
+ { 0xA2, 1, "ROL", IND, M6x09_GENERAL },
+ { 0xA3, 1, "LSRW", IND, M6x09_GENERAL },
+ { 0xA4, 1, "RORW", IND, M6x09_GENERAL },
+ { 0xA5, 1, "ASRW", IND, M6x09_GENERAL },
+ { 0xA6, 1, "ASLW", IND, M6x09_GENERAL },
+ { 0xA7, 1, "ROLW", IND, M6x09_GENERAL },
+ { 0xA8, 1, "JMP", IND, M6x09_GENERAL },
+ { 0xA9, 1, "JSR", IND, M6x09_GENERAL, STEP_OVER },
+ { 0xAA, 1, "BSR", REL, M6x09_GENERAL, STEP_OVER },
+ { 0xAB, 2, "LBSR", LREL, M6x09_GENERAL, STEP_OVER },
+ { 0xAC, 1, "DBJNZ", REL, M6x09_GENERAL },
+ { 0xAD, 1, "DXJNZ", REL, M6x09_GENERAL },
+ { 0xAE, 0, "NOP", INH, M6x09_GENERAL },
{ 0xB0, 0, "ABX", INH, M6x09_GENERAL },
{ 0xB1, 0, "DAA", INH, M6x09_GENERAL },
{ 0xB2, 0, "SEX", INH, M6x09_GENERAL },
{ 0xB3, 0, "MUL", INH, M6x09_GENERAL },
- { 0xB4, 0, "LMUL", INH, M6x09_GENERAL },
- { 0xB5, 0, "DIV X,B", INH, M6x09_GENERAL },
- { 0xB6, 0, "BMOVE Y,X,U", INH, M6x09_GENERAL },
- { 0xB7, 0, "MOVE Y,X,U", INH, M6x09_GENERAL },
- { 0xB8, 1, "LSRD", IMM, M6x09_GENERAL },
- { 0xB9, 1, "LSRD", IND, M6x09_GENERAL },
- { 0xBA, 1, "RORD", IMM, M6x09_GENERAL },
- { 0xBB, 1, "RORD", IND, M6x09_GENERAL },
- { 0xBC, 1, "ASRD", IMM, M6x09_GENERAL },
- { 0xBD, 1, "ASRD", IND, M6x09_GENERAL },
- { 0xBE, 1, "ASLD", IMM, M6x09_GENERAL },
- { 0xBF, 1, "ASLD", IND, M6x09_GENERAL },
-
- { 0xC0, 1, "ROLD", IMM, M6x09_GENERAL },
- { 0xC1, 1, "ROLD", IND, M6x09_GENERAL },
- { 0xC2, 0, "CLRD", INH, M6x09_GENERAL },
- { 0xC3, 1, "CLRW", IND, M6x09_GENERAL },
- { 0xC4, 0, "NEGD", INH, M6x09_GENERAL },
- { 0xC5, 1, "NEGW", IND, M6x09_GENERAL },
- { 0xC6, 0, "INCD", INH, M6x09_GENERAL },
- { 0xC7, 1, "INCW", IND, M6x09_GENERAL },
- { 0xC8, 0, "DECD", INH, M6x09_GENERAL },
- { 0xC9, 1, "DECW", IND, M6x09_GENERAL },
- { 0xCA, 0, "TSTD", INH, M6x09_GENERAL },
- { 0xCB, 1, "TSTW", IND, M6x09_GENERAL },
- { 0xCC, 0, "ABSA", INH, M6x09_GENERAL },
- { 0xCD, 0, "ABSB", INH, M6x09_GENERAL },
- { 0xCE, 0, "ABSD", INH, M6x09_GENERAL },
- { 0xCF, 0, "BSET A,X,U", INH, M6x09_GENERAL },
-
- { 0xD0, 0, "BSET D,X,U", INH, M6x09_GENERAL }
+ { 0xB4, 0, "LMUL", INH, M6x09_GENERAL },
+ { 0xB5, 0, "DIV X,B", INH, M6x09_GENERAL },
+ { 0xB6, 0, "BMOVE Y,X,U", INH, M6x09_GENERAL },
+ { 0xB7, 0, "MOVE Y,X,U", INH, M6x09_GENERAL },
+ { 0xB8, 1, "LSRDI", IMM, M6x09_GENERAL },
+ { 0xB9, 1, "LSRWA", IND, M6x09_GENERAL },
+ { 0xBA, 1, "RORDI", IMM, M6x09_GENERAL },
+ { 0xBB, 1, "RORWA", IND, M6x09_GENERAL },
+ { 0xBC, 1, "ASRDI", IMM, M6x09_GENERAL },
+ { 0xBD, 1, "ASRWA", IND, M6x09_GENERAL },
+ { 0xBE, 1, "ASLDI", IMM, M6x09_GENERAL },
+ { 0xBF, 1, "ASLWA", IND, M6x09_GENERAL },
+
+ { 0xC0, 1, "ROLDI", IMM, M6x09_GENERAL },
+ { 0xC1, 1, "ROLWA", IND, M6x09_GENERAL },
+ { 0xC2, 0, "CLRD", INH, M6x09_GENERAL },
+ { 0xC3, 1, "CLRW", IND, M6x09_GENERAL },
+ { 0xC4, 0, "NEGD", INH, M6x09_GENERAL },
+ { 0xC5, 1, "NEGW", IND, M6x09_GENERAL },
+ { 0xC6, 0, "INCD", INH, M6x09_GENERAL },
+ { 0xC7, 1, "INCW", IND, M6x09_GENERAL },
+ { 0xC8, 0, "DECD", INH, M6x09_GENERAL },
+ { 0xC9, 1, "DECW", IND, M6x09_GENERAL },
+ { 0xCA, 0, "TSTD", INH, M6x09_GENERAL },
+ { 0xCB, 1, "TSTW", IND, M6x09_GENERAL },
+ { 0xCC, 0, "ABSA", INH, M6x09_GENERAL },
+ { 0xCD, 0, "ABSB", INH, M6x09_GENERAL },
+ { 0xCE, 0, "ABSD", INH, M6x09_GENERAL },
+ { 0xCF, 0, "BSET A,X,U", INH, M6x09_GENERAL },
+
+ { 0xD0, 0, "BSETW D,X,U", INH, M6x09_GENERAL }
};
@@ -1331,12 +1336,12 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
{
"?", /* 0 - extended mode */
"?", /* 1 */
- "x", /* 2 */
- "y", /* 3 */
+ "X", /* 2 */
+ "Y", /* 3 */
"?", /* 4 - direct page */
- "u", /* 5 */
- "s", /* 6 */
- "pc" /* 7 - pc */
+ "U", /* 5 */
+ "S", /* 6 */
+ "PC" /* 7 - pc */
};
int idx = (mode >> 4) & 7;
@@ -1352,19 +1357,19 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
switch (type & 7)
{
case 0x00: /* register a */
- util::stream_format(stream, "[a,%s]", index_reg[idx]);
+ util::stream_format(stream, "[A,%s]", index_reg[idx]);
break;
case 0x01: /* register b */
- util::stream_format(stream, "[b,%s]", index_reg[idx]);
+ util::stream_format(stream, "[B,%s]", index_reg[idx]);
break;
case 0x04: /* direct - mode */
- util::stream_format(stream, "[$%02x]", params.r8(p++));
+ util::stream_format(stream, "[$%02X]", params.r8(p++));
break;
case 0x07: /* register d */
- util::stream_format(stream, "[d,%s]", index_reg[idx]);
+ util::stream_format(stream, "[D,%s]", index_reg[idx]);
break;
default:
@@ -1377,23 +1382,23 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
switch (type & 7)
{
case 0x00: /* register a */
- util::stream_format(stream, "a,%s", index_reg[idx]);
+ util::stream_format(stream, "A,%s", index_reg[idx]);
break;
case 0x01: /* register b */
- util::stream_format(stream, "b,%s", index_reg[idx]);
+ util::stream_format(stream, "B,%s", index_reg[idx]);
break;
case 0x04: /* direct - mode */
- util::stream_format(stream, "$%02x", params.r8(p++));
+ util::stream_format(stream, "$%02X", params.r8(p++));
break;
case 0x07: /* register d */
- util::stream_format(stream, "d,%s", index_reg[idx]);
+ util::stream_format(stream, "D,%s", index_reg[idx]);
break;
default:
- util::stream_format(stream, "????,%s", index_reg[idx]);
+ util::stream_format(stream, "?,%s", index_reg[idx]);
break;
}
}
@@ -1425,9 +1430,9 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
val = params.r8(p++);
if (val & 0x80)
- util::stream_format(stream, "[#$-%02x,%s]", 0x100 - val, index_reg[idx]);
+ util::stream_format(stream, "[#$-%02X,%s]", 0x100 - val, index_reg[idx]);
else
- util::stream_format(stream, "[#$%02x,%s]", val, index_reg[idx]);
+ util::stream_format(stream, "[#$%02X,%s]", val, index_reg[idx]);
break;
case 5: // post word offset
@@ -1435,9 +1440,9 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
p += 2;
if (val & 0x8000)
- util::stream_format(stream, "[#$-%04x,%s]", 0x10000 - val, index_reg[idx]);
+ util::stream_format(stream, "[#$-%04X,%s]", 0x10000 - val, index_reg[idx]);
else
- util::stream_format(stream, "[#$%04x,%s]", val, index_reg[idx]);
+ util::stream_format(stream, "[#$%04X,%s]", val, index_reg[idx]);
break;
case 6: // simple
@@ -1448,7 +1453,7 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
val = params.r16(p);
p += 2;
- util::stream_format(stream, "[$%04x]", val);
+ util::stream_format(stream, "[$%04X]", val);
break;
}
}
@@ -1476,9 +1481,9 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
val = params.r8(p++);
if (val & 0x80)
- util::stream_format(stream, "#$-%02x,%s", 0x100 - val, index_reg[idx]);
+ util::stream_format(stream, "#$-%02X,%s", 0x100 - val, index_reg[idx]);
else
- util::stream_format(stream, "#$%02x,%s", val, index_reg[idx]);
+ util::stream_format(stream, "#$%02X,%s", val, index_reg[idx]);
break;
case 5: // post word offset
@@ -1486,9 +1491,9 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
p += 2;
if (val & 0x8000)
- util::stream_format(stream, "#$-%04x,%s", 0x10000 - val, index_reg[idx]);
+ util::stream_format(stream, "#$-%04X,%s", 0x10000 - val, index_reg[idx]);
else
- util::stream_format(stream, "#$%04x,%s", val, index_reg[idx]);
+ util::stream_format(stream, "#$%04X,%s", val, index_reg[idx]);
break;
case 6: // simple
@@ -1499,7 +1504,7 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
val = params.r16(p);
p += 2;
- util::stream_format(stream, "$%04x", val);
+ util::stream_format(stream, "$%04X", val);
break;
}
}
@@ -1513,11 +1518,12 @@ void konami_disassembler::indexed(std::ostream &stream, uint8_t mode, const data
void konami_disassembler::register_register(std::ostream &stream, uint8_t pb)
{
- static const char konami_teregs[8] =
+ const char *const konami_teregs[8] =
{
- 'A', 'B', 'X', 'Y', 'S', 'U', '?', '?'
+ // B: D when reading, B when writing
+ "A", "B", "X", "Y", "DP", "U", "S", "PC"
};
- util::stream_format(stream, "%c,%c",
+ util::stream_format(stream, "%s,%s",
konami_teregs[(pb >> 0) & 0x7],
konami_teregs[(pb >> 4) & 0x7]);
}
diff --git a/src/devices/cpu/m6809/base6x09.lst b/src/devices/cpu/m6809/base6x09.lst
index ed000701cc2..223fbdb2879 100644
--- a/src/devices/cpu/m6809/base6x09.lst
+++ b/src/devices/cpu/m6809/base6x09.lst
@@ -50,8 +50,8 @@ IRQ:
INTERRUPT_VECTOR:
@dummy_vma(1);
- @m_pc.b.h = read_operand(0);
- @m_pc.b.l = read_operand(1);
+ @m_pc.b.h = read_vector(0);
+ @m_pc.b.l = read_vector(1);
@dummy_vma(1);
return;
@@ -442,17 +442,13 @@ SYNC:
// is disabled, execution continues with the next instruction.
@dummy_read_opcode_arg(0);
+ m_syncack_write_func(1);
while(!m_nmi_asserted && !m_firq_line && !m_irq_line)
{
- // massaging the PC this way makes the debugger's behavior more
- // intuitive
- m_pc.w--;
-
@eat_remaining();
-
- // unmassage...
- m_pc.w++;
+ ;
}
+ m_syncack_write_func(0);
@eat(1);
return;
@@ -593,14 +589,8 @@ CWAI:
while((m_ea.w = get_pending_interrupt()) == 0)
{
- // massaging the PC this way makes the debugger's behavior more
- // intuitive
- m_pc.w -= 2;
-
@eat_remaining();
-
- // unmassage...
- m_pc.w += 2;
+ ;
}
if (m_nmi_asserted)
@@ -670,7 +660,7 @@ SWI:
// doesn't use SOFTWARE_INTERRUPT label because SWI will
// inhibit IRQ/FIRQ
set_ea(VECTOR_SWI);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_SWI);
m_cc |= CC_E;
set_regop16(m_s);
m_temp.w = entire_state_registers();
@@ -682,12 +672,12 @@ SWI:
SWI2:
set_ea(VECTOR_SWI2);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_SWI2);
goto SOFTWARE_INTERRUPT;
SWI3:
set_ea(VECTOR_SWI3);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_SWI3);
goto SOFTWARE_INTERRUPT;
SOFTWARE_INTERRUPT:
diff --git a/src/devices/cpu/m6809/hd6309.cpp b/src/devices/cpu/m6809/hd6309.cpp
index d47adcf4354..6be0164ceb6 100644
--- a/src/devices/cpu/m6809/hd6309.cpp
+++ b/src/devices/cpu/m6809/hd6309.cpp
@@ -442,7 +442,7 @@ inline void hd6309_device::bittest_set(bool result)
inline uint16_t hd6309_device::read_exgtfr_register(uint8_t reg)
{
- uint16_t result;
+ uint16_t result = 0;
switch(reg & 0x0F)
{
@@ -462,8 +462,6 @@ inline uint16_t hd6309_device::read_exgtfr_register(uint8_t reg)
case 13: result = 0; break; // 0
case 14: result = ((uint16_t) m_q.r.e) << 8 | m_q.r.e; break; // E
case 15: result = ((uint16_t) m_q.r.f) << 8 | m_q.r.f; break; // F
- default:
- fatalerror("Should not reach here");
}
return result;
@@ -495,8 +493,6 @@ inline void hd6309_device::write_exgtfr_register(uint8_t reg, uint16_t value)
case 13: break; // 0
case 14: m_q.r.e = (uint8_t) (value >> 8); break; // E
case 15: m_q.r.f = (uint8_t) (value >> 0); break; // F
- default:
- fatalerror("Should not reach here");
}
}
@@ -601,8 +597,6 @@ void hd6309_device::register_register_op()
case 13: if (promote) set_regop16(m_temp); else set_regop8(m_temp.b.l); break; // 0
case 14: if (promote) set_regop16(m_q.p.w); else set_regop8(m_q.r.e); break; // E
case 15: if (promote) set_regop16(m_q.p.w); else set_regop8(m_q.r.f); break; // F
- default:
- fatalerror("Should not reach here");
}
// set source
@@ -624,8 +618,6 @@ void hd6309_device::register_register_op()
case 13: m_addressing_mode = ADDRESSING_MODE_ZERO; break; // 0
case 14: m_addressing_mode = promote ? ADDRESSING_MODE_REGISTER_W : ADDRESSING_MODE_REGISTER_E; break; // E
case 15: m_addressing_mode = promote ? ADDRESSING_MODE_REGISTER_W : ADDRESSING_MODE_REGISTER_F; break; // F
- default:
- fatalerror("Should not reach here");
}
// eat a single CPU cycle
diff --git a/src/devices/cpu/m6809/hd6309.h b/src/devices/cpu/m6809/hd6309.h
index 1eb8761e101..2cd57f7790c 100644
--- a/src/devices/cpu/m6809/hd6309.h
+++ b/src/devices/cpu/m6809/hd6309.h
@@ -35,8 +35,8 @@ protected:
hd6309_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, device_type type, int divider);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_pre_save() override;
virtual void device_post_load() override;
diff --git a/src/devices/cpu/m6809/hd6309.lst b/src/devices/cpu/m6809/hd6309.lst
index bcab03276dc..93005fe3bd0 100644
--- a/src/devices/cpu/m6809/hd6309.lst
+++ b/src/devices/cpu/m6809/hd6309.lst
@@ -744,13 +744,13 @@ INDEXED:
eat((hd6309_native_mode() && !(m_opcode & 0x10)) ? 2 : 5);
break;
- case 0x0F:
+ case 0x0F: case 0x10:
// 6309 specific mode
m_temp.w = m_q.r.w;
eat(1);
break;
- case 0x2F:
+ case 0x2F: case 0x30:
// 6309 specific mode
@m_temp.b.h = read_opcode_arg();
@m_temp.b.l = read_opcode_arg();
@@ -758,14 +758,14 @@ INDEXED:
eat(hd6309_native_mode() ? 1 : 5);
break;
- case 0x4F:
+ case 0x4F: case 0x50:
// 6309 specific mode
m_temp.w = m_q.r.w;
m_q.r.w += 2;
eat((hd6309_native_mode() && !(m_opcode & 0x10)) ? 2 : 4);
break;
- case 0x6F:
+ case 0x6F: case 0x70:
// 6309 specific mode
m_q.r.w -= 2;
m_temp.w = m_q.r.w;
@@ -773,6 +773,7 @@ INDEXED:
break;
default:
+ pop_state();
goto ILLEGAL;
}
diff --git a/src/devices/cpu/m6809/konami.cpp b/src/devices/cpu/m6809/konami.cpp
index f8c6354db03..ea0683c83ce 100644
--- a/src/devices/cpu/m6809/konami.cpp
+++ b/src/devices/cpu/m6809/konami.cpp
@@ -10,8 +10,9 @@
TODO:
- verify cycle timing
- verify status flag handling
- - what happens with block/shift opcodes when count is 0? maybe a full loop?
- parodius does an indexed LSRD and checks for A==0 to jump over the opcode
+ - EXG/TFR DP: DP here is apparently part of a 16-bit register. DP is
+ the high byte, and the low byte is an unknown hidden register? It
+ doesn't look like any game uses this. See MAME issue #13544.
References:
@@ -186,15 +187,15 @@ inline uint16_t &konami_cpu_device::ireg()
{
switch(m_opcode & 0x70)
{
- case 0x20: return m_x.w;
- case 0x30: return m_y.w;
- case 0x50: return m_u.w;
- case 0x60: return m_s.w;
- case 0x70: return m_pc.w;
+ case 0x20: return m_x.w; // X
+ case 0x30: return m_y.w; // Y
+ case 0x50: return m_u.w; // U
+ case 0x60: return m_s.w; // S
+ case 0x70: return m_pc.w; // PC
+
default:
fatalerror("Should not get here");
// never executed
- //return m_x.w;
}
}
@@ -205,16 +206,18 @@ inline uint16_t &konami_cpu_device::ireg()
inline uint16_t konami_cpu_device::read_exgtfr_register(uint8_t reg)
{
- uint16_t result = 0x00FF;
+ uint16_t result = 0;
switch(reg & 0x07)
{
- case 0: result = m_q.r.a; break; // A
- case 1: result = m_q.r.b; break; // B
- case 2: result = m_x.w; break; // X
- case 3: result = m_y.w; break; // Y
- case 4: result = m_s.w; break; // S
- case 5: result = m_u.w; break; // U
+ case 0: result = m_q.r.a | 0x1000; break; // A (high byte is always 0x10)
+ case 1: result = m_q.r.d; break; // D!
+ case 2: result = m_x.w; break; // X
+ case 3: result = m_y.w; break; // Y
+ case 4: logerror("EXG/TFR unemulated DP reg\n"); break; // DP
+ case 5: result = m_u.w; break; // U
+ case 6: result = m_s.w; break; // S
+ case 7: result = m_pc.w; break; // PC
}
return result;
@@ -229,12 +232,14 @@ inline void konami_cpu_device::write_exgtfr_register(uint8_t reg, uint16_t value
{
switch(reg & 0x07)
{
- case 0: m_q.r.a = value; break; // A
- case 1: m_q.r.b = value; break; // B
- case 2: m_x.w = value; break; // X
- case 3: m_y.w = value; break; // Y
- case 4: m_s.w = value; break; // S
- case 5: m_u.w = value; break; // U
+ case 0: m_q.r.a = value; break; // A
+ case 1: m_q.r.b = value; break; // B
+ case 2: m_x.w = value; break; // X
+ case 3: m_y.w = value; break; // Y
+ case 4: logerror("EXG/TFR unemulated DP reg\n"); break; // DP
+ case 5: m_u.w = value; break; // U
+ case 6: m_s.w = value; break; // S
+ case 7: m_pc.w = value; break; // PC
}
}
diff --git a/src/devices/cpu/m6809/konami.h b/src/devices/cpu/m6809/konami.h
index 2e113e5c2c4..08cf3974f47 100644
--- a/src/devices/cpu/m6809/konami.h
+++ b/src/devices/cpu/m6809/konami.h
@@ -34,7 +34,7 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/m6809/konami.lst b/src/devices/cpu/m6809/konami.lst
index f2f47089cdd..260a3cbdc56 100644
--- a/src/devices/cpu/m6809/konami.lst
+++ b/src/devices/cpu/m6809/konami.lst
@@ -70,14 +70,13 @@ MAIN:
case 0x35: set_regop8(m_q.r.b); set_imm(); %CMP8; return;
case 0x36: set_regop8(m_q.r.a); %INDEXED; %CMP8; return;
case 0x37: set_regop8(m_q.r.b); %INDEXED; %CMP8; return;
- case 0x38: set_imm(); %SETLINE; return;
- case 0x39: %INDEXED; %SETLINE; return;
+ case 0x38: set_imm(); %SETLN; return;
+ case 0x39: %INDEXED; %SETLN; return;
case 0x3A: set_regop8(m_q.r.a); %INDEXED; %ST8; return;
case 0x3B: set_regop8(m_q.r.b); %INDEXED; %ST8; return;
case 0x3C: set_imm(); %ANDCC; return;
case 0x3D: set_imm(); %ORCC; return;
- case 0x3E: %EXG; return;
- case 0x3F: %TFR; return;
+ case 0x3E: case 0x3F: %EXGTFR; return;
case 0x40: set_regop16(m_q.p.d); set_imm(); %LD16; return;
case 0x41: set_regop16(m_q.p.d); %INDEXED; %LD16; return;
@@ -190,8 +189,8 @@ MAIN:
case 0xA9: %INDEXED; %JSR; return;
case 0xAA: %BSR; return;
case 0xAB: %LBSR; return;
- case 0xAC: %DECBJNZ; return;
- case 0xAD: %DECXJNZ; return;
+ case 0xAC: %DBJNZ; return;
+ case 0xAD: %DXJNZ; return;
case 0xAE: %NOP; return;
case 0xB0: %ABX; return;
@@ -202,17 +201,17 @@ MAIN:
case 0xB5: %DIVX; return;
case 0xB6: %BMOVE; return;
case 0xB7: %MOVE; return;
- case 0xB8: %IMM_IM; set_d(); %LSRD; return;
- case 0xB9: %INDEXED; %LSRD; return;
- case 0xBA: %IMM_IM; set_d(); %RORD; return;
- case 0xBB: %INDEXED; %RORD; return;
- case 0xBC: %IMM_IM; set_d(); %ASRD; return;
- case 0xBD: %INDEXED; %ASRD; return;
- case 0xBE: %IMM_IM; set_d(); %ASLD; return;
- case 0xBF: %INDEXED; %ASLD; return;
-
- case 0xC0: %IMM_IM; set_d(); %ROLD; return;
- case 0xC1: %INDEXED; %ROLD; return;
+ case 0xB8: %IMM_IM; set_d(); %LSRDI; return;
+ case 0xB9: %INDEXED; %LSRDI; return;
+ case 0xBA: %IMM_IM; set_d(); %RORDI; return;
+ case 0xBB: %INDEXED; %RORDI; return;
+ case 0xBC: %IMM_IM; set_d(); %ASRDI; return;
+ case 0xBD: %INDEXED; %ASRDI; return;
+ case 0xBE: %IMM_IM; set_d(); %ASLDI; return;
+ case 0xBF: %INDEXED; %ASLDI; return;
+
+ case 0xC0: %IMM_IM; set_d(); %ROLDI; return;
+ case 0xC1: %INDEXED; %ROLDI; return;
case 0xC2: set_d(); %CLR16; return;
case 0xC3: %INDEXED; %CLR16; return;
case 0xC4: set_d(); %NEG16; return;
@@ -228,7 +227,7 @@ MAIN:
case 0xCE: set_d(); %ABS16; return;
case 0xCF: %BSET; return;
- case 0xD0: %BSET2; return;
+ case 0xD0: %BSETW; return;
default: %ILLEGAL; return;
}
return;
@@ -434,29 +433,29 @@ INDEXED:
set_ea(m_temp.w);
return;
-EXG:
+EXGTFR:
{
- // konami's EXG instruction differs enough from 6809 to fork the code
- uint8_t param = read_opcode_arg();
- uint16_t reg1 = read_exgtfr_register(param >> 0);
- uint16_t reg2 = read_exgtfr_register(param >> 4);
- write_exgtfr_register(param >> 0, reg2);
- write_exgtfr_register(param >> 4, reg1);
- }
- eat(3);
- return;
-
-TFR:
- {
- // konami's TFR instruction differs enough from 6809 to fork the code
+ // konami's EXG/TFR instruction differs enough from HD6309 to fork the code
uint8_t param = read_opcode_arg();
uint16_t reg = read_exgtfr_register(param >> 0);
+
+ // Opcodes 0x3E and 0x3F are the same! The bit that distinguishes between EXG and TFR
+ // is actually opcode_arg bit 7. Although Konami software behaves as expected.
+ if (!BIT(param, 7))
+ {
+ uint16_t reg2 = read_exgtfr_register(param >> 4);
+ write_exgtfr_register(param >> 0, reg2);
+ eat(1);
+ }
write_exgtfr_register(param >> 4, reg);
+
+ //if (BIT(m_opcode, 0) != BIT(param, 7))
+ // logerror("KONAMI: Malformed EXG/TFR opcode\n");
}
eat(2);
return;
-SETLINE:
+SETLN:
@set_lines(read_operand());
return;
@@ -490,8 +489,8 @@ BSET:
}
return;
-BSET2:
- // BSET2 does not appear to be interruptable, at least judging from the old implementation
+BSETW:
+ // BSETW does not appear to be interruptable, at least judging from the old implementation
while(m_u.w != 0)
{
@eat(1);
@@ -501,100 +500,105 @@ BSET2:
}
return;
-DECXJNZ:
+DBJNZ:
// not sure if this affects V?
- m_x.w = set_flags<uint16_t>(CC_NZV, m_x.w, 1, m_x.w - 1);
+ m_q.r.b = set_flags<uint8_t>(CC_NZV, m_q.r.b, 1, m_q.r.b - 1);
@eat(1);
set_cond(cond_ne());
goto BRANCH;
-DECBJNZ:
+DXJNZ:
// not sure if this affects V?
- m_q.r.b = set_flags<uint8_t>(CC_NZV, m_q.r.b, 1, m_q.r.b - 1);
+ m_x.w = set_flags<uint16_t>(CC_NZV, m_x.w, 1, m_x.w - 1);
@eat(1);
set_cond(cond_ne());
goto BRANCH;
-LSRD:
+LSRDI:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
m_bcount = is_register_addressing_mode() ? m_temp_im : m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- while(m_bcount--)
+ while (m_bcount-- & 0xf)
{
@eat(1);
m_cc &= ~CC_C;
m_cc |= (m_temp.w & 1) ? CC_C : 0;
m_temp.w = set_flags<uint16_t>(CC_NZ, m_temp.w >> 1);
}
+
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
return;
-ASLD:
+ASLDI:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
m_bcount = is_register_addressing_mode() ? m_temp_im : m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- while(m_bcount--)
+ while (m_bcount-- & 0xf)
{
@eat(1);
m_temp.w = set_flags<uint16_t>(CC_NZVC, m_temp.w, m_temp.w, m_temp.w << 1);
}
+
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
return;
-ASRD:
+ASRDI:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
m_bcount = is_register_addressing_mode() ? m_temp_im : m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- while(m_bcount--)
+ while (m_bcount-- & 0xf)
{
@eat(1);
m_cc &= ~CC_C;
m_cc |= (m_temp.w & 1) ? CC_C : 0;
m_temp.w = set_flags<uint16_t>(CC_NZ, ((int16_t) m_temp.w) >> 1);
}
+
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
return;
-ROLD:
+ROLDI:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
m_bcount = is_register_addressing_mode() ? m_temp_im : m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- while(m_bcount--)
+ while (m_bcount-- & 0xf)
{
@eat(1);
m_temp.w = set_flags<uint16_t>(CC_NZV, rotate_left(m_temp.w));
}
+
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
return;
-RORD:
+RORDI:
// register addr.mode takes shift count from opcode operand, indexed addr.mode takes it from A
m_bcount = is_register_addressing_mode() ? m_temp_im : m_q.r.a;
@m_temp.b.h = read_operand(0);
@m_temp.b.l = read_operand(1);
- while(m_bcount--)
+ while (m_bcount-- & 0xf)
{
@eat(1);
m_temp.w = set_flags<uint16_t>(CC_NZ, rotate_right(m_temp.w));
}
+
@write_operand(0, m_temp.b.h);
write_operand(1, m_temp.b.l);
return;
diff --git a/src/devices/cpu/m6809/m6809.cpp b/src/devices/cpu/m6809/m6809.cpp
index 18152c9b09c..e8c93b3a46c 100644
--- a/src/devices/cpu/m6809/m6809.cpp
+++ b/src/devices/cpu/m6809/m6809.cpp
@@ -145,6 +145,8 @@ DEFINE_DEVICE_TYPE(M6809, m6809_device, "m6809", "MC6809 (legacy)")
m6809_base_device::m6809_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, int divider) :
cpu_device(mconfig, type, tag, owner, clock),
m_lic_func(*this),
+ m_vector_read_func(*this, 0),
+ m_syncack_write_func(*this),
m_program_config("program", ENDIANNESS_BIG, 8, 16),
m_sprogram_config("decrypted_opcodes", ENDIANNESS_BIG, 8, 16),
m_clock_divider(divider)
@@ -451,17 +453,6 @@ uint32_t m6809_base_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t m6809_base_device::execute_input_lines() const noexcept
-{
- return 3;
-}
-
-
-//-------------------------------------------------
// execute_set_input - act on a changed input/
// interrupt line
//-------------------------------------------------
diff --git a/src/devices/cpu/m6809/m6809.h b/src/devices/cpu/m6809/m6809.h
index aeebc6066cc..89e3cb10a82 100644
--- a/src/devices/cpu/m6809/m6809.h
+++ b/src/devices/cpu/m6809/m6809.h
@@ -26,6 +26,9 @@ DECLARE_DEVICE_TYPE(M6809, m6809_device)
// Used by core CPU interface
class m6809_base_device : public cpu_device
{
+public:
+ auto interrupt_vector_read() { return m_vector_read_func.bind(); }
+ auto sync_acknowledge_write() { return m_syncack_write_func.bind(); }
protected:
// construction/destruction
m6809_base_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const device_type type, int divider);
@@ -52,15 +55,14 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_pre_save() override;
virtual void device_post_load() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
@@ -126,6 +128,16 @@ protected:
VECTOR_RESET_FFFE = 0xFFFE
};
+ // exception numbers for debugger
+ enum
+ {
+ EXCEPTION_SWI = 1,
+ EXCEPTION_SWI2 = 2,
+ EXCEPTION_SWI3 = 3,
+ EXCEPTION_XFIRQ = 4,
+ EXCEPTION_XRES = 5
+ };
+
union M6809Q
{
#ifdef LSB_FIRST
@@ -171,10 +183,12 @@ protected:
bool m_lds_encountered;
int m_icount;
int m_addressing_mode;
- PAIR16 m_ea; // effective address
+ PAIR16 m_ea; // effective address
// Callbacks
- devcb_write_line m_lic_func; // LIC pin on the 6809E
+ devcb_write_line m_lic_func; // LIC pin on the 6809E
+ devcb_read8 m_vector_read_func; // Indicates interrupt/reset acknowledge cycle (BA=0, BS=1)
+ devcb_write_line m_syncack_write_func; // Indicates sync acknowledge buscycle
// eat cycles
inline void eat(int cycles) { m_icount -= cycles; }
@@ -216,6 +230,7 @@ protected:
// operand reading/writing
uint8_t read_operand();
uint8_t read_operand(int ordinal);
+ uint8_t read_vector(int ordinal);
void write_operand(uint8_t data);
void write_operand(int ordinal, uint8_t data);
@@ -310,7 +325,7 @@ public:
auto lic() { return m_lic_func.bind(); }
};
-// ======================> m6809_device (LEGACY)
+// ======================> m6809_device (LEGACY, pinpoint if MC6809 or MC6809E)
class m6809_device : public m6809_base_device
{
@@ -327,6 +342,5 @@ enum
#define M6809_IRQ_LINE 0 /* IRQ line number */
#define M6809_FIRQ_LINE 1 /* FIRQ line number */
-#define M6809_SWI 2 /* Virtual SWI line to be used during SWI acknowledge cycle */
#endif // MAME_CPU_M6809_M6809_H
diff --git a/src/devices/cpu/m6809/m6809.lst b/src/devices/cpu/m6809/m6809.lst
index 4f2b8077bb5..92fb70052c8 100644
--- a/src/devices/cpu/m6809/m6809.lst
+++ b/src/devices/cpu/m6809/m6809.lst
@@ -116,7 +116,7 @@ DISPATCH01:
case 0x5B: set_b(); %XDEC8; return;
case 0x5C: set_b(); %INC8; return;
case 0x5D: set_b(); %TST8; return;
- case 0x5E: set_b(); %XCLR8; return;
+ case 0x5E: set_b(); %XCLR8; return;
case 0x5F: set_b(); %CLR8; return;
case 0x60: case 0x61: %INDEXED; %NEG8; return;
@@ -312,7 +312,7 @@ DISPATCH10:
case 0x2E: set_cond(cond_gt()); %LBRANCH; return;
case 0x2F: set_cond(!cond_gt()); %LBRANCH; return;
- case 0x3E: %XSWI2; return;
+ case 0x3E: %XSWI2; return;
case 0x3F: %SWI2; return;
case 0x83: set_regop16(m_q.p.d); set_imm(); %CMP16; return;
@@ -364,7 +364,7 @@ DISPATCH11:
case 0x10: %DISPATCH11; return;
case 0x11: %DISPATCH11; return;
- case 0x3E: %XFIRQ; return;
+ case 0x3E: %XFIRQ; return;
case 0x3F: %SWI3; return;
case 0x83: set_regop16(m_u); set_imm(); %CMP16; return;
case 0x8C: set_regop16(m_s); set_imm(); %CMP16; return;
@@ -663,7 +663,7 @@ XANDCC:
XRES:
set_ea(VECTOR_RESET_FFFE);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_XRES);
set_regop16(m_s);
m_temp.w = entire_state_registers();
@dummy_read_opcode_arg(0);
@@ -724,7 +724,7 @@ XST16:
XSWI2:
set_ea(VECTOR_SWI2);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_SWI2);
set_regop16(m_s);
m_temp.w = entire_state_registers();
@dummy_read_opcode_arg(0);
@@ -745,7 +745,7 @@ XADD16:
XFIRQ:
set_ea(VECTOR_FIRQ);
- standard_irq_callback(M6809_SWI, m_pc.w);
+ debugger_exception_hook(EXCEPTION_XFIRQ);
set_regop16(m_s);
m_temp.w = entire_state_registers();
@dummy_read_opcode_arg(0);
diff --git a/src/devices/cpu/m6809/m6809inl.h b/src/devices/cpu/m6809/m6809inl.h
index 42c08a98d2c..f8d8c5744b4 100644
--- a/src/devices/cpu/m6809/m6809inl.h
+++ b/src/devices/cpu/m6809/m6809inl.h
@@ -92,6 +92,19 @@ inline ATTR_FORCE_INLINE uint8_t m6809_base_device::read_operand(int ordinal)
//-------------------------------------------------
+// read_vector
+//-------------------------------------------------
+
+inline ATTR_FORCE_INLINE uint8_t m6809_base_device::read_vector(int ordinal)
+{
+ if(m_vector_read_func.isunset())
+ return read_memory(m_ea.w + ordinal);
+ else
+ return m_vector_read_func(m_ea.w + ordinal);
+}
+
+
+//-------------------------------------------------
// write_operand
//-------------------------------------------------
@@ -230,14 +243,8 @@ inline T m6809_base_device::set_flags(uint8_t mask, T r)
inline void m6809_base_device::eat_remaining()
{
- // we do this in order to be nice to people debugging
- uint16_t real_pc = m_pc.w;
-
+ debugger_wait_hook();
eat(m_icount);
-
- m_pc.w = m_ppc.w;
- debugger_instruction_hook(m_pc.w);
- m_pc.w = real_pc;
}
diff --git a/src/devices/cpu/m6809/m6809make.py b/src/devices/cpu/m6809/m6809make.py
index 4b966005ef9..b7e243a2066 100644
--- a/src/devices/cpu/m6809/m6809make.py
+++ b/src/devices/cpu/m6809/m6809make.py
@@ -51,9 +51,9 @@ while count < len(lines):
next_line_is_return = (count + 1 == len(lines)) or lines[count+1].strip() == "return;"
# Check to see if the next line is a dispatch followed by return
- next_line_is_dispatch_and_return = (count + 1 < len(lines)) and re.match('([A-Za-z0-9\t ]+\:)*\s*\%', lines[count+1]) and lines[count+2].strip() == "return;"
+ next_line_is_dispatch_and_return = (count + 1 < len(lines)) and re.match('([A-Za-z0-9\t ]+\\:)*\\s*\\%', lines[count+1]) and lines[count+2].strip() == "return;"
- if re.match('([A-Za-z0-9\t ]+\:)*\s*\%', line):
+ if re.match('([A-Za-z0-9\t ]+\\:)*\\s*\\%', line):
# This is a dispatch - find the '%'
percent_pos = line.find("%")
dispatch = line[percent_pos+1:].strip("\t\n; ")
diff --git a/src/devices/cpu/m68hc16/cpu16.h b/src/devices/cpu/m68hc16/cpu16.h
index ccf9929a896..fee614edbf7 100644
--- a/src/devices/cpu/m68hc16/cpu16.h
+++ b/src/devices/cpu/m68hc16/cpu16.h
@@ -29,8 +29,8 @@ protected:
cpu16_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 2; }
diff --git a/src/devices/cpu/m68hc16/m68hc16z.h b/src/devices/cpu/m68hc16/m68hc16z.h
index e28fb879df1..1265bf792e7 100644
--- a/src/devices/cpu/m68hc16/m68hc16z.h
+++ b/src/devices/cpu/m68hc16/m68hc16z.h
@@ -15,14 +15,14 @@ protected:
m68hc16z_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- void sim_map(address_map &map);
- void sram_map(address_map &map);
- void adc_map(address_map &map);
- void qsm_map(address_map &map);
- void gpt_map(address_map &map);
+ void sim_map(address_map &map) ATTR_COLD;
+ void sram_map(address_map &map) ATTR_COLD;
+ void adc_map(address_map &map) ATTR_COLD;
+ void qsm_map(address_map &map) ATTR_COLD;
+ void gpt_map(address_map &map) ATTR_COLD;
private:
void simcr_w(offs_t offset, u16 data, u16 mem_mask = 0xffff);
@@ -95,7 +95,7 @@ public:
mc68hc16z1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
private:
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/m88000/m88000.cpp b/src/devices/cpu/m88000/m88000.cpp
index ef088f49a80..efa63be77fd 100644
--- a/src/devices/cpu/m88000/m88000.cpp
+++ b/src/devices/cpu/m88000/m88000.cpp
@@ -148,8 +148,8 @@ mc88100_device::mc88100_device(const machine_config &mconfig, const char *tag, d
: cpu_device(mconfig, MC88100, tag, owner, clock)
, m_code_config("code", ENDIANNESS_BIG, 32, 32, 0)
, m_data_config("data", ENDIANNESS_BIG, 32, 32, 0)
- , m_cmmu_d(*this, finder_base::DUMMY_TAG)
- , m_cmmu_i(*this, finder_base::DUMMY_TAG)
+ , m_cmmu_code(nullptr)
+ , m_cmmu_data(nullptr)
, m_sb(0)
, m_r{ 0 }
, m_cr{ 0 }
@@ -183,13 +183,13 @@ bool mc88100_device::memory_translate(int spacenum, int intention, offs_t &addre
{
case TR_READ:
case TR_WRITE:
- if (m_cmmu_d)
- return m_cmmu_d->translate(intention, address, m_cr[PSR] & PSR_MODE);
+ if (m_cmmu_data)
+ return m_cmmu_data(address).translate(intention, address, m_cr[PSR] & PSR_MODE);
break;
case TR_FETCH:
- if (m_cmmu_i)
- return m_cmmu_i->translate(intention, address, m_cr[PSR] & PSR_MODE);
+ if (m_cmmu_code)
+ return m_cmmu_code(address).translate(intention, address, m_cr[PSR] & PSR_MODE);
break;
}
@@ -198,7 +198,7 @@ bool mc88100_device::memory_translate(int spacenum, int intention, offs_t &addre
void mc88100_device::device_start()
{
- space(AS_PROGRAM).specific(m_inst_space);
+ space(AS_PROGRAM).specific(m_code_space);
if (has_configured_map(AS_DATA))
space(AS_DATA).specific(m_data_space);
@@ -1394,7 +1394,7 @@ void mc88100_device::exception(unsigned vector, bool const trap)
m_fip = m_cr[VBR] | (vector << 3) | IP_V;
// notify debugger
- if (machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
{
if (vector == E_INTERRUPT)
debug()->interrupt_hook(INPUT_LINE_IRQ0, m_xip & IP_A);
@@ -1525,16 +1525,16 @@ void mc88100_device::fset(unsigned const td, unsigned const d, float64_t const d
void mc88100_device::fetch(u32 &address, u32 &inst)
{
- if (m_cmmu_i)
+ if (m_cmmu_code)
{
- std::optional<u32> data = m_cmmu_i->read<u32>(address & IP_A, m_cr[PSR] & PSR_MODE);
+ std::optional<u32> data = m_cmmu_code(address & IP_A).read<u32>(address & IP_A, m_cr[PSR] & PSR_MODE);
if (data.has_value())
inst = data.value();
else
address |= IP_E;
}
else
- inst = m_inst_space.read_dword(address & IP_A);
+ inst = m_code_space.read_dword(address & IP_A);
}
template <typename T, bool Usr> void mc88100_device::ld(u32 address, unsigned const reg)
@@ -1552,11 +1552,11 @@ template <typename T, bool Usr> void mc88100_device::ld(u32 address, unsigned co
address &= ~(sizeof(T) - 1);
}
- if (m_cmmu_d)
+ if (m_cmmu_data)
{
if constexpr (sizeof(T) < 8)
{
- std::optional<T> const data = m_cmmu_d->read<typename std::make_unsigned<T>::type>(address, (m_cr[PSR] & PSR_MODE) && !Usr);
+ std::optional<T> const data = m_cmmu_data(address).read<typename std::make_unsigned<T>::type>(address, (m_cr[PSR] & PSR_MODE) && !Usr);
if (data.has_value() && reg)
m_r[reg] = std::is_signed<T>() ? s32(data.value()) : data.value();
@@ -1585,8 +1585,8 @@ template <typename T, bool Usr> void mc88100_device::ld(u32 address, unsigned co
}
else
{
- std::optional<u32> const hi = m_cmmu_d->read<u32>(address + 0, (m_cr[PSR] & PSR_MODE) && !Usr);
- std::optional<u32> const lo = m_cmmu_d->read<u32>(address + 4, (m_cr[PSR] & PSR_MODE) && !Usr);
+ std::optional<u32> const hi = m_cmmu_data(address + 0).read<u32>(address + 0, (m_cr[PSR] & PSR_MODE) && !Usr);
+ std::optional<u32> const lo = m_cmmu_data(address + 4).read<u32>(address + 4, (m_cr[PSR] & PSR_MODE) && !Usr);
if (lo.has_value() && hi.has_value())
{
if (reg != 0)
@@ -1673,11 +1673,11 @@ template <typename T, bool Usr> void mc88100_device::st(u32 address, unsigned co
address &= ~(sizeof(T) - 1);
}
- if (m_cmmu_d)
+ if (m_cmmu_data)
{
if constexpr (sizeof(T) < 8)
{
- if (!m_cmmu_d->write(address, T(m_r[reg]), (m_cr[PSR] & PSR_MODE) && !Usr))
+ if (!m_cmmu_data(address).write(address, T(m_r[reg]), (m_cr[PSR] & PSR_MODE) && !Usr))
{
m_cr[DMT0] = DMT_EN<T>(address) | DMT_WRITE | DMT_VALID;
m_cr[DMT1] = 0;
@@ -1701,8 +1701,8 @@ template <typename T, bool Usr> void mc88100_device::st(u32 address, unsigned co
else
{
bool result = true;
- result &= m_cmmu_d->write(address + 0, m_r[(reg + 0) & 31], (m_cr[PSR] & PSR_MODE) && !Usr);
- result &= m_cmmu_d->write(address + 4, m_r[(reg + 1) & 31], (m_cr[PSR] & PSR_MODE) && !Usr);
+ result &= m_cmmu_data(address + 0).write(address + 0, m_r[(reg + 0) & 31], (m_cr[PSR] & PSR_MODE) && !Usr);
+ result &= m_cmmu_data(address + 4).write(address + 4, m_r[(reg + 1) & 31], (m_cr[PSR] & PSR_MODE) && !Usr);
if (!result)
{
@@ -1762,10 +1762,10 @@ template <typename T, bool Usr> void mc88100_device::xmem(u32 address, unsigned
// save source value
T const src = m_r[reg];
- if (m_cmmu_d)
+ if (m_cmmu_data)
{
// read destination
- std::optional<T> const dst = m_cmmu_d->read<T>(address, (m_cr[PSR] & PSR_MODE) && !Usr);
+ std::optional<T> const dst = m_cmmu_data(address).read<T>(address, (m_cr[PSR] & PSR_MODE) && !Usr);
if (dst.has_value())
{
// update register
@@ -1773,7 +1773,7 @@ template <typename T, bool Usr> void mc88100_device::xmem(u32 address, unsigned
m_r[reg] = dst.value();
// write destination
- if (m_cmmu_d->write<T>(address, src, (m_cr[PSR] & PSR_MODE) && !Usr))
+ if (m_cmmu_data(address).write<T>(address, src, (m_cr[PSR] & PSR_MODE) && !Usr))
return;
}
diff --git a/src/devices/cpu/m88000/m88000.h b/src/devices/cpu/m88000/m88000.h
index 2588f821885..e646f9334c8 100644
--- a/src/devices/cpu/m88000/m88000.h
+++ b/src/devices/cpu/m88000/m88000.h
@@ -20,13 +20,13 @@ public:
// construction/destruction
mc88100_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
- template <typename T> void set_cmmu_d(T &&tag) { m_cmmu_d.set_tag(std::forward<T>(tag)); }
- template <typename T> void set_cmmu_i(T &&tag) { m_cmmu_i.set_tag(std::forward<T>(tag)); }
+ void set_cmmu_code(std::function<mc88200_device &(u32 const address)> f) { m_cmmu_code = f; }
+ void set_cmmu_data(std::function<mc88200_device &(u32 const address)> f) { m_cmmu_data = f; }
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual void execute_run() override;
@@ -64,11 +64,11 @@ private:
// address spaces
address_space_config m_code_config;
address_space_config m_data_config;
- memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_inst_space;
+ memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_code_space;
memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_data_space;
- optional_device<mc88200_device> m_cmmu_d;
- optional_device<mc88200_device> m_cmmu_i;
+ std::function<mc88200_device &(u32 const address)> m_cmmu_code;
+ std::function<mc88200_device &(u32 const address)> m_cmmu_data;
// register storage
u32 m_xip; // execute instruction pointer
diff --git a/src/devices/cpu/mb86233/mb86233.cpp b/src/devices/cpu/mb86233/mb86233.cpp
index 6a5451c0095..28fba63498e 100644
--- a/src/devices/cpu/mb86233/mb86233.cpp
+++ b/src/devices/cpu/mb86233/mb86233.cpp
@@ -256,18 +256,6 @@ void mb86233_device::pcs_pop()
m_pcs[i] = m_pcs[i+1];
}
-void mb86233_device::testdz()
-{
- if(m_d)
- m_st &= ~F_ZRD;
- else
- m_st |= F_ZRD;
- if(m_d & 0x80000000)
- m_st |= F_SGD;
- else
- m_st &= ~F_SGD;
-}
-
void mb86233_device::stset_set_sz_int(u32 val)
{
m_alu_stset = val ? (val & 0x80000000 ? F_SGD : 0) : F_ZRD;
@@ -324,7 +312,7 @@ void mb86233_device::alu_pre(u32 alu)
}
case 0x06: {
- // fmad
+ // fadd
m_alu_stmask = F_ZRD|F_SGD|F_CPD|F_OVD|F_DVZD;
m_alu_r1 = f2u(u2f(m_d) + u2f(m_a));
stset_set_sz_fp(m_alu_r1);
@@ -676,9 +664,9 @@ void mb86233_device::write_reg(u32 r, u32 v)
case 0x14: m_b = set_exp(m_b, v); break;
case 0x15: m_b = set_mant(m_b, v); break;
/* c */
- case 0x19: m_d = v; testdz(); break;
- case 0x1a: m_d = set_exp(m_d, v); testdz(); break;
- case 0x1b: m_d = set_mant(m_d, v); testdz(); break;
+ case 0x19: m_d = v; break;
+ case 0x1a: m_d = set_exp(m_d, v); break;
+ case 0x1b: m_d = set_mant(m_d, v); break;
case 0x1c: m_p = v; break;
case 0x1d: m_p = set_exp(m_p, v); break;
case 0x1e: m_p = set_mant(m_p, v); break;
@@ -812,6 +800,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_io_1(r2, v);
break;
}
@@ -822,6 +811,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_io_1(r2, v);
break;
}
@@ -832,6 +822,7 @@ void mb86233_device::execute_run()
u32 v = m_io.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_internal_1(r2, v, false);
break;
}
@@ -842,6 +833,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_internal_1(r2, v, true);
break;
}
@@ -852,6 +844,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_internal_1(r2, v, false);
break;
}
@@ -862,6 +855,7 @@ void mb86233_device::execute_run()
u32 v = m_program.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_mem_internal_1(r2, v, false);
break;
}
@@ -872,6 +866,7 @@ void mb86233_device::execute_run()
// mov reg, mem
u32 v = read_reg(r2);
if(m_stall) goto do_stall;
+ alu_post(alu);
write_mem_internal_1(r1, v, false);
break;
}
@@ -880,6 +875,7 @@ void mb86233_device::execute_run()
// mov reg, mem (e)
u32 v = read_reg(r2);
if(m_stall) goto do_stall;
+ alu_post(alu);
write_mem_io_1(r1, v);
break;
}
@@ -890,6 +886,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_1(r1);
+ alu_post(alu);
write_reg(r2, v);
break;
}
@@ -900,6 +897,7 @@ void mb86233_device::execute_run()
u32 v = m_data.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_1(r1);
+ alu_post(alu);
write_reg(r2, v);
break;
}
@@ -910,6 +908,7 @@ void mb86233_device::execute_run()
u32 v = m_io.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_1(r1);
+ alu_post(alu);
write_reg(r2, v);
break;
}
@@ -920,6 +919,7 @@ void mb86233_device::execute_run()
u32 v = m_program.read_dword(ea);
if(m_stall) goto do_stall;
ea_post_0(r1);
+ alu_post(alu);
write_reg(r2, v);
break;
}
@@ -928,11 +928,13 @@ void mb86233_device::execute_run()
// mov reg, reg
u32 v = read_reg(r1);
if(m_stall) goto do_stall;
+ alu_post(alu);
write_reg(r2, v);
break;
}
default:
+ alu_post(alu);
logerror("unhandled ld/mov subop 7/%x (%x)\n", r2 >> 6, m_ppc);
break;
}
@@ -940,11 +942,11 @@ void mb86233_device::execute_run()
}
default:
+ alu_post(alu);
logerror("unhandled ld/mov subop %x (%x)\n", op, m_ppc);
break;
}
- alu_post(alu);
break;
}
@@ -983,7 +985,6 @@ void mb86233_device::execute_run()
break;
case 3:
m_d = util::sext(opcode, 24);
- testdz();
break;
}
break;
diff --git a/src/devices/cpu/mb86233/mb86233.h b/src/devices/cpu/mb86233/mb86233.h
index 34dac1407c0..f23a0a113ad 100644
--- a/src/devices/cpu/mb86233/mb86233.h
+++ b/src/devices/cpu/mb86233/mb86233.h
@@ -70,12 +70,13 @@ public:
protected:
mb86233_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 3 - 1) / 3; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 3); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual void execute_run() override;
virtual space_config_vector memory_space_config() const override;
@@ -110,7 +111,6 @@ private:
static u32 get_exp(u32 val);
static u32 get_mant(u32 val);
- void testdz();
void alu_update_st();
void alu_pre(u32 alu);
void alu_post(u32 alu);
diff --git a/src/devices/cpu/mb86235/mb86235.h b/src/devices/cpu/mb86235/mb86235.h
index c859807bf56..ed5ba800dc9 100644
--- a/src/devices/cpu/mb86235/mb86235.h
+++ b/src/devices/cpu/mb86235/mb86235.h
@@ -51,17 +51,17 @@ public:
MB86235_ST
};
- void internal_abus(address_map &map);
- void internal_bbus(address_map &map);
+ void internal_abus(address_map &map) ATTR_COLD;
+ void internal_bbus(address_map &map) ATTR_COLD;
+
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
//virtual void execute_set_input(int inputnum, int state);
@@ -75,7 +75,6 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
-
struct mb86235_flags
{
uint32_t az;
@@ -182,9 +181,9 @@ private:
{
compiler_state &operator=(compiler_state const &) = delete;
- uint32_t cycles; /* accumulated cycles */
- uint8_t checkints; /* need to check interrupts before next instruction */
- uml::code_label labelnum; /* index for local labels */
+ uint32_t cycles; /* accumulated cycles */
+ uint8_t checkints; /* need to check interrupts before next instruction */
+ uml::code_label labelnum; /* index for local labels */
};
void run_drc();
@@ -236,7 +235,7 @@ private:
static void full_fifoout0(void *param);
static void full_fifoout1(void *param);
-// interpreter
+ // interpreter
void execute_op(uint32_t h, uint32_t l);
void do_alu1(uint32_t h, uint32_t l);
void do_alu2(uint32_t h, uint32_t l);
diff --git a/src/devices/cpu/mb86235/mb86235drc.cpp b/src/devices/cpu/mb86235/mb86235drc.cpp
index 468ac24ad8f..e45b07ba0a8 100644
--- a/src/devices/cpu/mb86235/mb86235drc.cpp
+++ b/src/devices/cpu/mb86235/mb86235drc.cpp
@@ -528,7 +528,7 @@ void mb86235_device::generate_sequence_instruction(drcuml_block &block, compiler
UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block); // <save fastregs>
diff --git a/src/devices/cpu/mb86235/mb86235fe.h b/src/devices/cpu/mb86235/mb86235fe.h
index ef8bff02df8..ed160a98c0a 100644
--- a/src/devices/cpu/mb86235/mb86235fe.h
+++ b/src/devices/cpu/mb86235/mb86235fe.h
@@ -7,14 +7,14 @@
******************************************************************************/
+#ifndef MAME_CPU_MB86235_MB86235FE_H
+#define MAME_CPU_MB86235_MB86235FE_H
+
#pragma once
#include "mb86235.h"
#include "cpu/drcfe.h"
-#ifndef __MB86235FE_H__
-#define __MB86235FE_H__
-
class mb86235_frontend : public drc_frontend
{
public:
@@ -25,7 +25,6 @@ protected:
virtual bool describe(opcode_desc &desc, const opcode_desc *prev) override;
private:
-
mb86235_device *m_core;
void describe_alu(opcode_desc &desc, uint32_t aluop);
@@ -44,4 +43,4 @@ private:
void describe_ea(opcode_desc &desc, int md, int arx, int ary, int disp);
};
-#endif /* __MB86235FE_H__ */
+#endif // MAME_CPU_MB86235_MB86235FE_H
diff --git a/src/devices/cpu/mb88xx/mb88dasm.cpp b/src/devices/cpu/mb88xx/mb88dasm.cpp
index 16e4bf8e902..02c08b80477 100644
--- a/src/devices/cpu/mb88xx/mb88dasm.cpp
+++ b/src/devices/cpu/mb88xx/mb88dasm.cpp
@@ -2,7 +2,6 @@
// copyright-holders:Ernesto Corvi
/*******************************************************************************
- mb88dasm.c
Core implementation for the portable Fujitsu MB88xx series MCU disassembler.
Written by Ernesto Corvi
@@ -12,216 +11,126 @@
#include "emu.h"
#include "mb88dasm.h"
-u32 mb88_disassembler::opcode_alignment() const
-{
- return 1;
-}
-
offs_t mb88_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
- unsigned startpc = pc;
- uint8_t op = opcodes.r8(pc++);
- uint8_t arg = opcodes.r8(pc);
+ offs_t startpc = pc;
+ u8 op = opcodes.r8(pc++);
+ u8 arg = opcodes.r8(pc);
- switch( op )
+ switch (op)
{
- case 0x00: util::stream_format( stream, "NOP" ); break;
- case 0x01: util::stream_format( stream, "OUTO" ); break;
- case 0x02: util::stream_format( stream, "OUTP" ); break;
- case 0x03: util::stream_format( stream, "OUT" ); break;
- case 0x04: util::stream_format( stream, "TAY" ); break;
- case 0x05: util::stream_format( stream, "TATH" ); break;
- case 0x06: util::stream_format( stream, "TATL" ); break;
- case 0x07: util::stream_format( stream, "TAS" ); break;
- case 0x08: util::stream_format( stream, "ICY" ); break;
- case 0x09: util::stream_format( stream, "ICM" ); break;
- case 0x0A: util::stream_format( stream, "STIC" ); break;
- case 0x0B: util::stream_format( stream, "X" ); break;
- case 0x0C: util::stream_format( stream, "ROL" ); break;
- case 0x0D: util::stream_format( stream, "L" ); break;
- case 0x0E: util::stream_format( stream, "ADC" ); break;
- case 0x0F: util::stream_format( stream, "AND" ); break;
- case 0x10: util::stream_format( stream, "DAA" ); break;
- case 0x11: util::stream_format( stream, "DAS" ); break;
- case 0x12: util::stream_format( stream, "INK" ); break;
- case 0x13: util::stream_format( stream, "IN" ); break;
- case 0x14: util::stream_format( stream, "TYA" ); break;
- case 0x15: util::stream_format( stream, "TTHA" ); break;
- case 0x16: util::stream_format( stream, "TTLA" ); break;
- case 0x17: util::stream_format( stream, "TSA" ); break;
- case 0x18: util::stream_format( stream, "DCY" ); break;
- case 0x19: util::stream_format( stream, "DCM" ); break;
- case 0x1A: util::stream_format( stream, "STDC" ); break;
- case 0x1B: util::stream_format( stream, "XX" ); break;
- case 0x1C: util::stream_format( stream, "ROR" ); break;
- case 0x1D: util::stream_format( stream, "ST" ); break;
- case 0x1E: util::stream_format( stream, "SBC" ); break;
- case 0x1F: util::stream_format( stream, "OR" ); break;
- case 0x20: util::stream_format( stream, "SETR" ); break;
- case 0x21: util::stream_format( stream, "SETC" ); break;
- case 0x22: util::stream_format( stream, "RSTR" ); break;
- case 0x23: util::stream_format( stream, "RSTC" ); break;
- case 0x24: util::stream_format( stream, "TSTR" ); break;
- case 0x25: util::stream_format( stream, "TSTI" ); break;
- case 0x26: util::stream_format( stream, "TSTV" ); break;
- case 0x27: util::stream_format( stream, "TSTS" ); break;
- case 0x28: util::stream_format( stream, "TSTC" ); break;
- case 0x29: util::stream_format( stream, "TSTZ" ); break;
- case 0x2A: util::stream_format( stream, "STS" ); break;
- case 0x2B: util::stream_format( stream, "LS" ); break;
- case 0x2C: util::stream_format( stream, "RTS" ); break;
- case 0x2D: util::stream_format( stream, "NEG" ); break;
- case 0x2E: util::stream_format( stream, "C" ); break;
- case 0x2F: util::stream_format( stream, "EOR" ); break;
- case 0x30:
- case 0x31:
- case 0x32:
- case 0x33: util::stream_format( stream, "SBIT %d", op&3 ); break;
- case 0x34:
- case 0x35:
- case 0x36:
- case 0x37: util::stream_format( stream, "RBIT %d", op&3 ); break;
- case 0x38:
- case 0x39:
- case 0x3A:
- case 0x3B: util::stream_format( stream, "TBIT %d", op&3 ); break;
- case 0x3C: util::stream_format( stream, "RTI" ); break;
- case 0x3D: util::stream_format( stream, "JPA #$%02X", arg ); pc++; break;
- case 0x3E: util::stream_format( stream, "EN #$%02X", arg ); pc++; break;
- case 0x3F: util::stream_format( stream, "DIS #$%02X", arg ); pc++; break;
- case 0x40:
- case 0x41:
- case 0x42:
- case 0x43: util::stream_format( stream, "SETD %d", op&3 ); break;
- case 0x44:
- case 0x45:
- case 0x46:
- case 0x47: util::stream_format( stream, "RSTD %d", op&3 ); break;
- case 0x48:
- case 0x49:
- case 0x4A:
- case 0x4B: util::stream_format( stream, "TSTD %d", (op&3)+8 ); break;
- case 0x4C:
- case 0x4D:
- case 0x4E:
- case 0x4F: util::stream_format( stream, "TBA %d", op&3 ); break;
- case 0x50:
- case 0x51:
- case 0x52:
- case 0x53: util::stream_format( stream, "XD %d", op&3 ); break;
- case 0x54:
- case 0x55:
- case 0x56:
- case 0x57: util::stream_format( stream, "XYD %d", (op&3)+4 ); break;
- case 0x58:
- case 0x59:
- case 0x5A:
- case 0x5B:
- case 0x5C:
- case 0x5D:
- case 0x5E:
- case 0x5F: util::stream_format( stream, "LXI #$%1X", op&7 ); break;
- case 0x60:
- case 0x61:
- case 0x62:
- case 0x63:
- case 0x64:
- case 0x65:
- case 0x66:
- case 0x67: util::stream_format( stream, "CALL $%02X%02X", op&7, arg ); pc++; break;
- case 0x68:
- case 0x69:
- case 0x6A:
- case 0x6B:
- case 0x6C:
- case 0x6D:
- case 0x6E:
- case 0x6F: util::stream_format( stream, "JPL $%02X%02X", op&7, arg ); pc++; break;
- case 0x70:
- case 0x71:
- case 0x72:
- case 0x73:
- case 0x74:
- case 0x75:
- case 0x76:
- case 0x77:
- case 0x78:
- case 0x79:
- case 0x7A:
- case 0x7B:
- case 0x7C:
- case 0x7D:
- case 0x7E:
- case 0x7F: util::stream_format( stream, "AI #$%1X", op&0xf ); break;
- case 0x80:
- case 0x81:
- case 0x82:
- case 0x83:
- case 0x84:
- case 0x85:
- case 0x86:
- case 0x87:
- case 0x88:
- case 0x89:
- case 0x8A:
- case 0x8B:
- case 0x8C:
- case 0x8D:
- case 0x8E:
- case 0x8F: util::stream_format( stream, "LYI #$%1X", op&0xf ); break;
- case 0x90:
- case 0x91:
- case 0x92:
- case 0x93:
- case 0x94:
- case 0x95:
- case 0x96:
- case 0x97:
- case 0x98:
- case 0x99:
- case 0x9A:
- case 0x9B:
- case 0x9C:
- case 0x9D:
- case 0x9E:
- case 0x9F: util::stream_format( stream, "LI #$%1X", op&0xf ); break;
- case 0xA0:
- case 0xA1:
- case 0xA2:
- case 0xA3:
- case 0xA4:
- case 0xA5:
- case 0xA6:
- case 0xA7:
- case 0xA8:
- case 0xA9:
- case 0xAA:
- case 0xAB:
- case 0xAC:
- case 0xAD:
- case 0xAE:
- case 0xAF: util::stream_format( stream, "CYI #$%1X", op&0xf ); break;
- case 0xB0:
- case 0xB1:
- case 0xB2:
- case 0xB3:
- case 0xB4:
- case 0xB5:
- case 0xB6:
- case 0xB7:
- case 0xB8:
- case 0xB9:
- case 0xBA:
- case 0xBB:
- case 0xBC:
- case 0xBD:
- case 0xBE:
- case 0xBF: util::stream_format( stream, "CI #$%1X", op&0xf ); break;
+ case 0x00: util::stream_format(stream, "NOP"); break;
+ case 0x01: util::stream_format(stream, "OUTO"); break;
+ case 0x02: util::stream_format(stream, "OUTP"); break;
+ case 0x03: util::stream_format(stream, "OUT"); break;
+ case 0x04: util::stream_format(stream, "TAY"); break;
+ case 0x05: util::stream_format(stream, "TATH"); break;
+ case 0x06: util::stream_format(stream, "TATL"); break;
+ case 0x07: util::stream_format(stream, "TAS"); break;
+ case 0x08: util::stream_format(stream, "ICY"); break;
+ case 0x09: util::stream_format(stream, "ICM"); break;
+ case 0x0a: util::stream_format(stream, "STIC"); break;
+ case 0x0b: util::stream_format(stream, "X"); break;
+ case 0x0c: util::stream_format(stream, "ROL"); break;
+ case 0x0d: util::stream_format(stream, "L"); break;
+ case 0x0e: util::stream_format(stream, "ADC"); break;
+ case 0x0f: util::stream_format(stream, "AND"); break;
+ case 0x10: util::stream_format(stream, "DAA"); break;
+ case 0x11: util::stream_format(stream, "DAS"); break;
+ case 0x12: util::stream_format(stream, "INK"); break;
+ case 0x13: util::stream_format(stream, "IN"); break;
+ case 0x14: util::stream_format(stream, "TYA"); break;
+ case 0x15: util::stream_format(stream, "TTHA"); break;
+ case 0x16: util::stream_format(stream, "TTLA"); break;
+ case 0x17: util::stream_format(stream, "TSA"); break;
+ case 0x18: util::stream_format(stream, "DCY"); break;
+ case 0x19: util::stream_format(stream, "DCM"); break;
+ case 0x1a: util::stream_format(stream, "STDC"); break;
+ case 0x1b: util::stream_format(stream, "XX"); break;
+ case 0x1c: util::stream_format(stream, "ROR"); break;
+ case 0x1d: util::stream_format(stream, "ST"); break;
+ case 0x1e: util::stream_format(stream, "SBC"); break;
+ case 0x1f: util::stream_format(stream, "OR"); break;
+ case 0x20: util::stream_format(stream, "SETR"); break;
+ case 0x21: util::stream_format(stream, "SETC"); break;
+ case 0x22: util::stream_format(stream, "RSTR"); break;
+ case 0x23: util::stream_format(stream, "RSTC"); break;
+ case 0x24: util::stream_format(stream, "TSTR"); break;
+ case 0x25: util::stream_format(stream, "TSTI"); break;
+ case 0x26: util::stream_format(stream, "TSTV"); break;
+ case 0x27: util::stream_format(stream, "TSTS"); break;
+ case 0x28: util::stream_format(stream, "TSTC"); break;
+ case 0x29: util::stream_format(stream, "TSTZ"); break;
+ case 0x2a: util::stream_format(stream, "STS"); break;
+ case 0x2b: util::stream_format(stream, "LS"); break;
+ case 0x2c: util::stream_format(stream, "RTS"); break;
+ case 0x2d: util::stream_format(stream, "NEG"); break;
+ case 0x2e: util::stream_format(stream, "C"); break;
+ case 0x2f: util::stream_format(stream, "EOR"); break;
+
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ util::stream_format(stream, "SBIT %d", op & 3); break;
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ util::stream_format(stream, "RBIT %d", op & 3); break;
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ util::stream_format(stream, "TBIT %d", op & 3); break;
+
+ case 0x3c: util::stream_format(stream, "RTI"); break;
+ case 0x3d: util::stream_format(stream, "JPA #$%02X", arg); pc++; break;
+ case 0x3e: util::stream_format(stream, "EN #$%02X", arg); pc++; break;
+ case 0x3f: util::stream_format(stream, "DIS #$%02X", arg); pc++; break;
+
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ util::stream_format(stream, "SETD %d", op & 3); break;
+ case 0x44: case 0x45: case 0x46: case 0x47:
+ util::stream_format(stream, "RSTD %d", op & 3); break;
+ case 0x48: case 0x49: case 0x4a: case 0x4b:
+ util::stream_format(stream, "TSTD %d", (op & 3) + 8); break;
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ util::stream_format(stream, "TBA %d", op & 3); break;
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ util::stream_format(stream, "XD %d", op & 3); break;
+ case 0x54: case 0x55: case 0x56: case 0x57:
+ util::stream_format(stream, "XYD %d", (op & 3) + 4); break;
+
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ util::stream_format(stream, "LXI #$%1X", op & 7); break;
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67:
+ util::stream_format(stream, "CALL $%02X%02X", op & 7, arg); pc++; break;
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ util::stream_format(stream, "JPL $%02X%02X", op & 7, arg); pc++; break;
+
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ util::stream_format(stream, "AI #$%1X", op & 0xf); break;
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ util::stream_format(stream, "LYI #$%1X", op & 0xf); break;
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ util::stream_format(stream, "LI #$%1X", op & 0xf); break;
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf:
+ util::stream_format(stream, "CYI #$%1X", op & 0xf); break;
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ util::stream_format(stream, "CI #$%1X", op & 0xf); break;
- default:
- /* C0-FF */
- util::stream_format( stream, "JMP $%04X", (pc&(~0x3f))+ op-0xC0 );
- break;
+ default: // C0-FF
+ util::stream_format(stream, "JMP $%04X", (pc & ~0x3f) + op - 0xc0); break;
}
return (pc - startpc) | SUPPORTED;
diff --git a/src/devices/cpu/mb88xx/mb88dasm.h b/src/devices/cpu/mb88xx/mb88dasm.h
index 80a37a374c7..6d818f0c6b7 100644
--- a/src/devices/cpu/mb88xx/mb88dasm.h
+++ b/src/devices/cpu/mb88xx/mb88dasm.h
@@ -2,14 +2,12 @@
// copyright-holders:Ernesto Corvi
/*******************************************************************************
- mb88dasm.c
Core implementation for the portable Fujitsu MB88xx series MCU disassembler.
Written by Ernesto Corvi
*******************************************************************************/
-
#ifndef MAME_CPU_MB88XX_MB88DASM_H
#define MAME_CPU_MB88XX_MB88DASM_H
@@ -21,8 +19,8 @@ public:
mb88_disassembler() = default;
virtual ~mb88_disassembler() = default;
- virtual u32 opcode_alignment() const override;
+ virtual u32 opcode_alignment() const override { return 1; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
};
-#endif
+#endif // MAME_CPU_MB88XX_MB88DASM_H
diff --git a/src/devices/cpu/mb88xx/mb88xx.cpp b/src/devices/cpu/mb88xx/mb88xx.cpp
index eb8eda38660..48eedebcd23 100644
--- a/src/devices/cpu/mb88xx/mb88xx.cpp
+++ b/src/devices/cpu/mb88xx/mb88xx.cpp
@@ -2,15 +2,14 @@
// copyright-holders:Ernesto Corvi
/***************************************************************************
- mb88xx.cpp
Core implementation for the portable Fujitsu MB88xx series MCU emulator.
Written by Ernesto Corvi
-
TODO:
- - Add support for the timer
- - Add support for the serial interface
+ - Verify timer, Bosconian voice samples are currently a good test case,
+ and they match PCB recordings.
+ - Improve support for the serial interface.
- Split the core to support multiple CPU types?
***************************************************************************/
@@ -58,18 +57,16 @@ DEFINE_DEVICE_TYPE(MB8844, mb8844_cpu_device, "mb8844", "Fujitsu MB8844")
#define TEST_SF() (m_sf & 1)
#define TEST_IF() (m_if & 1)
-#define UPDATE_ST_C(v) m_st=(v&0x10) ? 0 : 1
-#define UPDATE_ST_Z(v) m_st=(v==0) ? 0 : 1
-
-#define UPDATE_CF(v) m_cf=((v&0x10)==0) ? 0 : 1
-#define UPDATE_ZF(v) m_zf=(v!=0) ? 0 : 1
+#define UPDATE_ST_C(v) m_st = (v & 0x10) ? 0 : 1
+#define UPDATE_ST_Z(v) m_st = (v == 0) ? 0 : 1
-#define CYCLES(x) do { m_icount -= (x); } while (0)
+#define UPDATE_CF(v) m_cf = ((v & 0x10) == 0) ? 0 : 1
+#define UPDATE_ZF(v) m_zf = (v != 0) ? 0 : 1
-#define GETPC() (((int)m_PA << 6)+m_PC)
-#define GETEA() ((m_X << 4)+m_Y)
+#define GETPC() (((int)m_PA << 6) + m_PC)
+#define GETEA() ((m_X << 4) + m_Y)
-#define INCPC() do { m_PC++; if ( m_PC >= 0x40 ) { m_PC = 0; m_PA++; } } while (0)
+#define INCPC() do { m_PC++; if (m_PC >= 0x40) { m_PC = 0; m_PA++; } } while (0)
/***************************************************************************
@@ -112,11 +109,19 @@ void mb88_cpu_device::data_7bit(address_map &map)
}
-mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width)
+mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width)
: cpu_device(mconfig, type, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_BIG, 8, program_width, 0, (program_width == 9) ? address_map_constructor(FUNC(mb88_cpu_device::program_9bit), this) : (program_width == 10) ? address_map_constructor(FUNC(mb88_cpu_device::program_10bit), this) : address_map_constructor(FUNC(mb88_cpu_device::program_11bit), this))
- , m_data_config("data", ENDIANNESS_BIG, 8, data_width, 0, (data_width == 4) ? address_map_constructor(FUNC(mb88_cpu_device::data_4bit), this) : (data_width == 5) ? address_map_constructor(FUNC(mb88_cpu_device::data_5bit), this) : (data_width == 6) ? address_map_constructor(FUNC(mb88_cpu_device::data_6bit), this) : address_map_constructor(FUNC(mb88_cpu_device::data_7bit), this))
- , m_PLA(nullptr)
+ , m_program_config("program", ENDIANNESS_BIG, 8, program_width, 0,
+ (program_width == 9) ? address_map_constructor(FUNC(mb88_cpu_device::program_9bit), this) :
+ (program_width == 10) ? address_map_constructor(FUNC(mb88_cpu_device::program_10bit), this) :
+ address_map_constructor(FUNC(mb88_cpu_device::program_11bit), this))
+ , m_data_config("data", ENDIANNESS_BIG, 8, data_width, 0,
+ (data_width == 4) ? address_map_constructor(FUNC(mb88_cpu_device::data_4bit), this) :
+ (data_width == 5) ? address_map_constructor(FUNC(mb88_cpu_device::data_5bit), this) :
+ (data_width == 6) ? address_map_constructor(FUNC(mb88_cpu_device::data_6bit), this) :
+ address_map_constructor(FUNC(mb88_cpu_device::data_7bit), this))
+ , m_pla_data(nullptr)
+ , m_pla_bits(8)
, m_read_k(*this, 0)
, m_write_o(*this)
, m_write_p(*this)
@@ -127,36 +132,36 @@ mb88_cpu_device::mb88_cpu_device(const machine_config &mconfig, device_type type
{
}
-mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb88201_cpu_device::mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB88201, tag, owner, clock, 9, 4)
{
}
-mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb88202_cpu_device::mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB88202, tag, owner, clock, 10, 5)
{
}
-mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8841_cpu_device::mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB8841, tag, owner, clock, 11, 7)
{
}
-mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8842_cpu_device::mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB8842, tag, owner, clock, 11, 7)
{
}
-mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8843_cpu_device::mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB8843, tag, owner, clock, 10, 6)
{
}
-mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8844_cpu_device::mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mb88_cpu_device(mconfig, MB8844, tag, owner, clock, 10, 6)
{
}
@@ -187,7 +192,9 @@ void mb88_cpu_device::device_start()
m_serial = timer_alloc(FUNC(mb88_cpu_device::serial_timer), this);
+ m_if = 0;
m_ctr = 0;
+ m_o_output = 0;
save_item(NAME(m_PC));
save_item(NAME(m_PA));
@@ -209,23 +216,24 @@ void mb88_cpu_device::device_start()
save_item(NAME(m_ctr));
save_item(NAME(m_SB));
save_item(NAME(m_SBcount));
- save_item(NAME(m_pending_interrupt));
+ save_item(NAME(m_o_output));
+ save_item(NAME(m_pending_irq));
save_item(NAME(m_in_irq));
- state_add( MB88_PC, "PC", m_PC).formatstr("%02X");
- state_add( MB88_PA, "PA", m_PA).formatstr("%02X");
- state_add( MB88_SI, "SI", m_SI).formatstr("%01X");
- state_add( MB88_A, "A", m_A).formatstr("%01X");
- state_add( MB88_X, "X", m_X).formatstr("%01X");
- state_add( MB88_Y, "Y", m_Y).formatstr("%01X");
- state_add( MB88_PIO, "PIO", m_pio).formatstr("%02X");
- state_add( MB88_TH, "TH", m_TH).formatstr("%01X");
- state_add( MB88_TL, "TL", m_TL).formatstr("%01X");
- state_add( MB88_SB, "SB", m_SB).formatstr("%01X");
-
- state_add( STATE_GENPC, "GENPC", m_debugger_pc ).callimport().callexport().noshow();
- state_add( STATE_GENPCBASE, "CURPC", m_debugger_pc ).callimport().callexport().noshow();
- state_add( STATE_GENFLAGS, "GENFLAGS", m_debugger_flags ).callimport().callexport().formatstr("%6s").noshow();
+ state_add(MB88XX_PC, "PC", m_PC).formatstr("%02X");
+ state_add(MB88XX_PA, "PA", m_PA).formatstr("%02X");
+ state_add(MB88XX_SI, "SI", m_SI).formatstr("%01X");
+ state_add(MB88XX_A, "A", m_A).formatstr("%01X");
+ state_add(MB88XX_X, "X", m_X).formatstr("%01X");
+ state_add(MB88XX_Y, "Y", m_Y).formatstr("%01X");
+ state_add(MB88XX_PIO, "PIO", m_pio).formatstr("%02X");
+ state_add(MB88XX_TH, "TH", m_TH).formatstr("%01X");
+ state_add(MB88XX_TL, "TL", m_TL).formatstr("%01X");
+ state_add(MB88XX_SB, "SB", m_SB).formatstr("%01X");
+
+ state_add(STATE_GENPC, "GENPC", m_debugger_pc).callimport().callexport().noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_debugger_pc).callimport().callexport().noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_debugger_flags).callimport().callexport().formatstr("%6s").noshow();
set_icountptr(m_icount);
}
@@ -246,7 +254,7 @@ void mb88_cpu_device::state_import(const device_state_entry &entry)
case STATE_GENPC:
case STATE_GENPCBASE:
m_PC = m_debugger_pc & 0x3f;
- m_PA = ( m_debugger_pc >> 6 ) & 0x1f;
+ m_PA = (m_debugger_pc >> 6) & 0x1f;
break;
}
}
@@ -294,7 +302,7 @@ void mb88_cpu_device::state_string_export(const device_state_entry &entry, std::
void mb88_cpu_device::device_reset()
{
- /* zero registers and flags */
+ // zero registers and flags
m_PC = 0;
m_PA = 0;
m_SP[0] = m_SP[1] = m_SP[2] = m_SP[3] = 0;
@@ -302,19 +310,18 @@ void mb88_cpu_device::device_reset()
m_A = 0;
m_X = 0;
m_Y = 0;
- m_st = 1; /* start off with st=1 */
+ m_st = 1; // start off with st=1
m_zf = 0;
m_cf = 0;
m_vf = 0;
m_sf = 0;
- m_if = 0;
m_pio = 0;
m_TH = 0;
m_TL = 0;
m_TP = 0;
m_SB = 0;
m_SBcount = 0;
- m_pending_interrupt = 0;
+ m_pending_irq = 0;
m_in_irq = 0;
}
@@ -322,17 +329,16 @@ void mb88_cpu_device::device_reset()
CORE EXECUTION LOOP
***************************************************************************/
-TIMER_CALLBACK_MEMBER( mb88_cpu_device::serial_timer )
+TIMER_CALLBACK_MEMBER(mb88_cpu_device::serial_timer)
{
m_SBcount++;
- /* if we get too many interrupts with no servicing, disable the timer
- until somebody does something */
+ // if we get too many interrupts with no servicing, disable the timer until somebody does something
if (m_SBcount >= SERIAL_DISABLE_THRESH)
m_serial->adjust(attotime::never);
- /* only read if not full; this is needed by the Namco 52xx to ensure that
- the program can write to S and recover the value even if serial is enabled */
+ // only read if not full; this is needed by the Namco 52xx to ensure that
+ // the program can write to S and recover the value even if serial is enabled
if (!m_sf)
{
m_SB = (m_SB >> 1) | (m_read_si() ? 8 : 0);
@@ -340,38 +346,64 @@ TIMER_CALLBACK_MEMBER( mb88_cpu_device::serial_timer )
if (m_SBcount >= 4)
{
m_sf = 1;
- m_pending_interrupt |= INT_CAUSE_SERIAL;
+ m_pending_irq |= INT_CAUSE_SERIAL;
}
}
-
}
-int mb88_cpu_device::pla( int inA, int inB )
+void mb88_cpu_device::write_pla(u8 index)
{
- int index = ((inB&1) << 4) | (inA&0x0f);
+ u8 mask = 0xff;
- if ( m_PLA )
- return m_PLA[index];
+ if (m_pla_bits == 8)
+ {
+ const u8 shift = (index & 0x10) ? 4 : 0;
+ mask = 0xf << shift;
+ m_o_output = (m_o_output & ~mask) | (index << shift & mask);
+ }
+ else
+ {
+ // if the driver hasn't supplied PLA data, just output the index
+ if (m_pla_data)
+ m_o_output = m_pla_data[index];
+ else
+ m_o_output = index;
+ }
- return index;
+ m_write_o(0, m_o_output, mask);
}
void mb88_cpu_device::execute_set_input(int inputnum, int state)
{
- /* On rising edge trigger interrupt.
- * Note this is a logical level, the actual pin is high-to-low voltage
- * triggered. */
- if ( (m_pio & INT_CAUSE_EXTERNAL) && !m_if && state != CLEAR_LINE )
+ state = state ? 1 : 0;
+
+ switch (inputnum)
{
- m_pending_interrupt |= INT_CAUSE_EXTERNAL;
- }
+ case MB88XX_IRQ_LINE:
+ // On rising edge trigger interrupt.
+ // Note this is a logical level, the actual pin is high-to-low voltage triggered.
+ if (!m_if && state && (m_pio & INT_CAUSE_EXTERNAL))
+ m_pending_irq |= INT_CAUSE_EXTERNAL;
- m_if = state != CLEAR_LINE;
+ m_if = state;
+ break;
+
+ case MB88XX_TC_LINE:
+ // on a falling clock, increment the timer, but only if enabled
+ if (m_ctr && !state && (m_pio & 0x40))
+ increment_timer();
+
+ m_ctr = state;
+ break;
+
+ default:
+ break;
+ }
}
-void mb88_cpu_device::update_pio_enable( uint8_t newpio )
+void mb88_cpu_device::pio_enable(u8 newpio)
{
- /* if the serial state has changed, configure the timer */
+ // if the serial state has changed, configure the timer
if ((m_pio ^ newpio) & 0x30)
{
if ((newpio & 0x30) == 0)
@@ -379,7 +411,7 @@ void mb88_cpu_device::update_pio_enable( uint8_t newpio )
else if ((newpio & 0x30) == 0x20)
m_serial->adjust(attotime::from_hz(clock() / SERIAL_PRESCALE), 0, attotime::from_hz(clock() / SERIAL_PRESCALE));
else
- fatalerror("mb88xx: update_pio_enable set serial enable to unsupported value %02X\n", newpio & 0x30);
+ fatalerror("mb88xx: pio_enable set serial enable to unsupported value %02X\n", newpio & 0x30);
}
m_pio = newpio;
@@ -394,17 +426,17 @@ void mb88_cpu_device::increment_timer()
if (m_TH == 0)
{
m_vf = 1;
- m_pending_interrupt |= INT_CAUSE_TIMER;
+ m_pending_irq |= INT_CAUSE_TIMER;
}
}
}
-void mb88_cpu_device::update_pio( int cycles )
+void mb88_cpu_device::burn_cycles(int cycles)
{
- /* TODO: improve/validate serial and timer support */
+ m_icount -= cycles;
- /* internal clock enable */
- if ( m_pio & 0x80 )
+ // internal clock enable
+ if (m_pio & 0x80)
{
m_TP += cycles;
while (m_TP >= TIMER_PRESCALE)
@@ -414,54 +446,40 @@ void mb88_cpu_device::update_pio( int cycles )
}
}
- /* process pending interrupts */
- if (!m_in_irq && m_pending_interrupt & m_pio)
+ // process pending interrupts
+ if (!m_in_irq && m_pending_irq & m_pio)
{
m_in_irq = true;
- uint16_t intpc = GETPC();
+ u16 intpc = GETPC();
m_SP[m_SI] = intpc;
m_SP[m_SI] |= TEST_CF() << 15;
m_SP[m_SI] |= TEST_ZF() << 14;
m_SP[m_SI] |= TEST_ST() << 13;
- m_SI = ( m_SI + 1 ) & 3;
+ m_SI = (m_SI + 1) & 3;
- /* the datasheet doesn't mention interrupt vectors but
- the Arabian MCU program expects the following */
- if (m_pending_interrupt & m_pio & INT_CAUSE_EXTERNAL)
+ // the datasheet doesn't mention interrupt vectors but the Arabian MCU program expects the following
+ if (m_pending_irq & m_pio & INT_CAUSE_EXTERNAL)
{
- /* if we have a live external source, call the irqcallback */
- standard_irq_callback( 0, intpc );
+ standard_irq_callback(0, intpc);
m_PC = 0x02;
}
- else if (m_pending_interrupt & m_pio & INT_CAUSE_TIMER)
+ else if (m_pending_irq & m_pio & INT_CAUSE_TIMER)
{
- standard_irq_callback( 1, intpc );
+ standard_irq_callback(1, intpc);
m_PC = 0x04;
}
- else if (m_pending_interrupt & m_pio & INT_CAUSE_SERIAL)
+ else if (m_pending_irq & m_pio & INT_CAUSE_SERIAL)
{
- standard_irq_callback( 2, intpc );
+ standard_irq_callback(2, intpc);
m_PC = 0x06;
}
m_PA = 0x00;
m_st = 1;
- m_pending_interrupt = 0;
+ m_pending_irq = 0;
- CYCLES(3); /* ? */
- }
-}
-
-void mb88_cpu_device::clock_w(int state)
-{
- if (state != m_ctr)
- {
- m_ctr = state;
-
- /* on a falling clock, increment the timer, but only if enabled */
- if (m_ctr == 0 && (m_pio & 0x40))
- increment_timer();
+ burn_cycles(3); // ?
}
}
@@ -470,93 +488,93 @@ void mb88_cpu_device::execute_run()
{
while (m_icount > 0)
{
- uint8_t opcode, arg, oc;
+ u8 opcode, arg, oc;
- /* fetch the opcode */
+ // fetch the opcode
debugger_instruction_hook(GETPC());
opcode = READOP(GETPC());
- /* increment the PC */
+ // increment the PC
INCPC();
- /* start with instruction doing 1 cycle */
+ // start with instruction doing 1 cycle
oc = 1;
switch (opcode)
{
- case 0x00: /* nop ZCS:...*/
+ case 0x00: // nop ZCS:...
m_st = 1;
break;
- case 0x01: /* outO ZCS:...*/
- m_write_o(pla(m_A, TEST_CF()));
+ case 0x01: // outO ZCS:...
+ write_pla(TEST_CF() << 4 | m_A);
m_st = 1;
break;
- case 0x02: /* outP ZCS:... */
+ case 0x02: // outP ZCS:...
m_write_p(m_A);
m_st = 1;
break;
- case 0x03: /* outR ZCS:... */
+ case 0x03: // outR ZCS:...
arg = m_Y;
m_write_r[arg & 3](m_A);
m_st = 1;
break;
- case 0x04: /* tay ZCS:... */
+ case 0x04: // tay ZCS:...
m_Y = m_A;
m_st = 1;
break;
- case 0x05: /* tath ZCS:... */
+ case 0x05: // tath ZCS:...
m_TH = m_A;
m_st = 1;
break;
- case 0x06: /* tatl ZCS:... */
+ case 0x06: // tatl ZCS:...
m_TL = m_A;
m_st = 1;
break;
- case 0x07: /* tas ZCS:... */
+ case 0x07: // tas ZCS:...
m_SB = m_A;
m_st = 1;
break;
- case 0x08: /* icy ZCS:x.x */
+ case 0x08: // icy ZCS:x.x
m_Y++;
UPDATE_ST_C(m_Y);
m_Y &= 0x0f;
UPDATE_ZF(m_Y);
break;
- case 0x09: /* icm ZCS:x.x */
- arg=RDMEM(GETEA());
+ case 0x09: // icm ZCS:x.x
+ arg = RDMEM(GETEA());
arg++;
UPDATE_ST_C(arg);
arg &= 0x0f;
UPDATE_ZF(arg);
- WRMEM(GETEA(),arg);
+ WRMEM(GETEA(), arg);
break;
- case 0x0a: /* stic ZCS:x.x */
- WRMEM(GETEA(),m_A);
+ case 0x0a: // stic ZCS:x.x
+ WRMEM(GETEA(), m_A);
m_Y++;
UPDATE_ST_C(m_Y);
m_Y &= 0x0f;
UPDATE_ZF(m_Y);
break;
- case 0x0b: /* x ZCS:x.. */
+ case 0x0b: // x ZCS:x..
arg = RDMEM(GETEA());
- WRMEM(GETEA(),m_A);
+ WRMEM(GETEA(), m_A);
m_A = arg;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x0c: /* rol ZCS:xxx */
+ case 0x0c: // rol ZCS:xxx
m_A <<= 1;
m_A |= TEST_CF();
UPDATE_ST_C(m_A);
@@ -565,13 +583,13 @@ void mb88_cpu_device::execute_run()
UPDATE_ZF(m_A);
break;
- case 0x0d: /* l ZCS:x.. */
+ case 0x0d: // l ZCS:x..
m_A = RDMEM(GETEA());
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x0e: /* adc ZCS:xxx */
+ case 0x0e: // adc ZCS:xxx
arg = RDMEM(GETEA());
arg += m_A;
arg += TEST_CF();
@@ -581,87 +599,87 @@ void mb88_cpu_device::execute_run()
UPDATE_ZF(m_A);
break;
- case 0x0f: /* and ZCS:x.x */
+ case 0x0f: // and ZCS:x.x
m_A &= RDMEM(GETEA());
UPDATE_ZF(m_A);
m_st = m_zf ^ 1;
break;
- case 0x10: /* daa ZCS:.xx */
- if ( TEST_CF() || m_A > 9 ) m_A += 6;
+ case 0x10: // daa ZCS:.xx
+ if (TEST_CF() || m_A > 9) m_A += 6;
UPDATE_ST_C(m_A);
m_cf = m_st ^ 1;
m_A &= 0x0f;
break;
- case 0x11: /* das ZCS:.xx */
- if ( TEST_CF() || m_A > 9 ) m_A += 10;
+ case 0x11: // das ZCS:.xx
+ if (TEST_CF() || m_A > 9) m_A += 10;
UPDATE_ST_C(m_A);
m_cf = m_st ^ 1;
m_A &= 0x0f;
break;
- case 0x12: /* inK ZCS:x.. */
+ case 0x12: // inK ZCS:x..
m_A = m_read_k() & 0x0f;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x13: /* inR ZCS:x.. */
+ case 0x13: // inR ZCS:x..
arg = m_Y;
m_A = m_read_r[arg & 3]() & 0x0f;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x14: /* tya ZCS:x.. */
+ case 0x14: // tya ZCS:x..
m_A = m_Y;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x15: /* ttha ZCS:x.. */
+ case 0x15: // ttha ZCS:x..
m_A = m_TH;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x16: /* ttla ZCS:x.. */
+ case 0x16: // ttla ZCS:x..
m_A = m_TL;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x17: /* tsa ZCS:x.. */
+ case 0x17: // tsa ZCS:x..
m_A = m_SB;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x18: /* dcy ZCS:..x */
+ case 0x18: // dcy ZCS:..x
m_Y--;
UPDATE_ST_C(m_Y);
m_Y &= 0x0f;
break;
- case 0x19: /* dcm ZCS:x.x */
- arg=RDMEM(GETEA());
+ case 0x19: // dcm ZCS:x.x
+ arg = RDMEM(GETEA());
arg--;
UPDATE_ST_C(arg);
arg &= 0x0f;
UPDATE_ZF(arg);
- WRMEM(GETEA(),arg);
+ WRMEM(GETEA(), arg);
break;
- case 0x1a: /* stdc ZCS:x.x */
- WRMEM(GETEA(),m_A);
+ case 0x1a: // stdc ZCS:x.x
+ WRMEM(GETEA(), m_A);
m_Y--;
UPDATE_ST_C(m_Y);
m_Y &= 0x0f;
UPDATE_ZF(m_Y);
break;
- case 0x1b: /* xx ZCS:x.. */
+ case 0x1b: // xx ZCS:x..
arg = m_X;
m_X = m_A;
m_A = arg;
@@ -669,7 +687,7 @@ void mb88_cpu_device::execute_run()
m_st = 1;
break;
- case 0x1c: /* ror ZCS:xxx */
+ case 0x1c: // ror ZCS:xxx
m_A |= TEST_CF() << 4;
UPDATE_ST_C(m_A << 4);
m_cf = m_st ^ 1;
@@ -678,12 +696,12 @@ void mb88_cpu_device::execute_run()
UPDATE_ZF(m_A);
break;
- case 0x1d: /* st ZCS:x.. */
- WRMEM(GETEA(),m_A);
+ case 0x1d: // st ZCS:x..
+ WRMEM(GETEA(), m_A);
m_st = 1;
break;
- case 0x1e: /* sbc ZCS:xxx */
+ case 0x1e: // sbc ZCS:xxx
arg = RDMEM(GETEA());
arg -= m_A;
arg -= TEST_CF();
@@ -693,53 +711,53 @@ void mb88_cpu_device::execute_run()
UPDATE_ZF(m_A);
break;
- case 0x1f: /* or ZCS:x.x */
+ case 0x1f: // or ZCS:x.x
m_A |= RDMEM(GETEA());
UPDATE_ZF(m_A);
m_st = m_zf ^ 1;
break;
- case 0x20: /* setR ZCS:... */
- arg = m_read_r[m_Y/4]() & 0x0f;
- m_write_r[m_Y/4](arg | (1 << (m_Y%4)));
+ case 0x20: // setR ZCS:...
+ arg = m_read_r[m_Y >> 2]() & 0x0f;
+ m_write_r[m_Y >> 2](arg | (1 << (m_Y & 3)));
m_st = 1;
break;
- case 0x21: /* setc ZCS:.xx */
+ case 0x21: // setc ZCS:.xx
m_cf = 1;
m_st = 1;
break;
- case 0x22: /* rstR ZCS:... */
- arg = m_read_r[m_Y/4]() & 0x0f;
- m_write_r[m_Y/4](arg & ~(1 << (m_Y%4)));
+ case 0x22: // rstR ZCS:...
+ arg = m_read_r[m_Y >> 2]() & 0x0f;
+ m_write_r[m_Y >> 2](arg & ~(1 << (m_Y & 3)));
m_st = 1;
break;
- case 0x23: /* rstc ZCS:.xx */
+ case 0x23: // rstc ZCS:.xx
m_cf = 0;
m_st = 1;
break;
- case 0x24: /* tstr ZCS:..x */
- arg = m_read_r[m_Y/4]() & 0x0f;
- m_st = ( arg & ( 1 << (m_Y%4) ) ) ? 0 : 1;
+ case 0x24: // tstr ZCS:..x
+ arg = m_read_r[m_Y >> 2]() & 0x0f;
+ m_st = (arg & (1 << (m_Y & 3))) ? 0 : 1;
break;
- case 0x25: /* tsti ZCS:..x */
+ case 0x25: // tsti ZCS:..x
m_st = m_if ^ 1;
break;
- case 0x26: /* tstv ZCS:..x */
+ case 0x26: // tstv ZCS:..x
m_st = m_vf ^ 1;
m_vf = 0;
break;
- case 0x27: /* tsts ZCS:..x */
+ case 0x27: // tsts ZCS:..x
m_st = m_sf ^ 1;
if (m_sf)
{
- /* re-enable the timer if we disabled it previously */
+ // re-enable the timer if we disabled it previously
if (m_SBcount >= SERIAL_DISABLE_THRESH)
m_serial->adjust(attotime::from_hz(clock() / SERIAL_PRESCALE), 0, attotime::from_hz(clock() / SERIAL_PRESCALE));
m_SBcount = 0;
@@ -747,40 +765,40 @@ void mb88_cpu_device::execute_run()
m_sf = 0;
break;
- case 0x28: /* tstc ZCS:..x */
+ case 0x28: // tstc ZCS:..x
m_st = m_cf ^ 1;
break;
- case 0x29: /* tstz ZCS:..x */
+ case 0x29: // tstz ZCS:..x
m_st = m_zf ^ 1;
break;
- case 0x2a: /* sts ZCS:x.. */
- WRMEM(GETEA(),m_SB);
+ case 0x2a: // sts ZCS:x..
+ WRMEM(GETEA(), m_SB);
UPDATE_ZF(m_SB);
m_st = 1;
break;
- case 0x2b: /* ls ZCS:x.. */
+ case 0x2b: // ls ZCS:x..
m_SB = RDMEM(GETEA());
UPDATE_ZF(m_SB);
m_st = 1;
break;
- case 0x2c: /* rts ZCS:... */
- m_SI = ( m_SI - 1 ) & 3;
+ case 0x2c: // rts ZCS:...
+ m_SI = (m_SI - 1) & 3;
m_PC = m_SP[m_SI] & 0x3f;
m_PA = (m_SP[m_SI] >> 6) & 0x1f;
m_st = 1;
break;
- case 0x2d: /* neg ZCS: ..x */
- m_A = (~m_A)+1;
+ case 0x2d: // neg ZCS: ..x
+ m_A = (~m_A) + 1;
m_A &= 0x0f;
UPDATE_ST_Z(m_A);
break;
- case 0x2e: /* c ZCS:xxx */
+ case 0x2e: // c ZCS:xxx
arg = RDMEM(GETEA());
arg -= m_A;
UPDATE_CF(arg);
@@ -789,139 +807,139 @@ void mb88_cpu_device::execute_run()
m_zf = m_st ^ 1;
break;
- case 0x2f: /* eor ZCS:x.x */
+ case 0x2f: // eor ZCS:x.x
m_A ^= RDMEM(GETEA());
UPDATE_ST_Z(m_A);
m_zf = m_st ^ 1;
break;
- case 0x30: case 0x31: case 0x32: case 0x33: /* sbit ZCS:... */
+ case 0x30: case 0x31: case 0x32: case 0x33: // sbit ZCS:...
arg = RDMEM(GETEA());
- WRMEM(GETEA(), arg | (1 << (opcode&3)));
+ WRMEM(GETEA(), arg | (1 << (opcode & 3)));
m_st = 1;
break;
- case 0x34: case 0x35: case 0x36: case 0x37: /* rbit ZCS:... */
+ case 0x34: case 0x35: case 0x36: case 0x37: // rbit ZCS:...
arg = RDMEM(GETEA());
- WRMEM(GETEA(), arg & ~(1 << (opcode&3)));
+ WRMEM(GETEA(), arg & ~(1 << (opcode & 3)));
m_st = 1;
break;
- case 0x38: case 0x39: case 0x3a: case 0x3b: /* tbit ZCS:... */
+ case 0x38: case 0x39: case 0x3a: case 0x3b: // tbit ZCS:...
arg = RDMEM(GETEA());
- m_st = ( arg & (1 << (opcode&3) ) ) ? 0 : 1;
+ m_st = (arg & (1 << (opcode & 3))) ? 0 : 1;
break;
- case 0x3c: /* rti ZCS:... */
- /* restore address and saved state flags on the top bits of the stack */
+ case 0x3c: // rti ZCS:...
+ // restore address and saved state flags on the top bits of the stack
m_in_irq = false;
- m_SI = ( m_SI - 1 ) & 3;
+ m_SI = (m_SI - 1) & 3;
m_PC = m_SP[m_SI] & 0x3f;
m_PA = (m_SP[m_SI] >> 6) & 0x1f;
- m_st = (m_SP[m_SI] >> 13)&1;
- m_zf = (m_SP[m_SI] >> 14)&1;
- m_cf = (m_SP[m_SI] >> 15)&1;
+ m_st = (m_SP[m_SI] >> 13) & 1;
+ m_zf = (m_SP[m_SI] >> 14) & 1;
+ m_cf = (m_SP[m_SI] >> 15) & 1;
break;
- case 0x3d: /* jpa imm ZCS:..x */
+ case 0x3d: // jpa imm ZCS:..x
m_PA = READOP(GETPC()) & 0x1f;
m_PC = m_A * 4;
- oc = 2;
+ oc++;
m_st = 1;
break;
- case 0x3e: /* en imm ZCS:... */
- update_pio_enable(m_pio | READOP(GETPC()));
+ case 0x3e: // en imm ZCS:...
+ pio_enable(m_pio | READOP(GETPC()));
INCPC();
- oc = 2;
+ oc++;
m_st = 1;
break;
- case 0x3f: /* dis imm ZCS:... */
- update_pio_enable(m_pio & ~(READOP(GETPC())));
+ case 0x3f: // dis imm ZCS:...
+ pio_enable(m_pio & ~(READOP(GETPC())));
INCPC();
- oc = 2;
+ oc++;
m_st = 1;
break;
- case 0x40: case 0x41: case 0x42: case 0x43: /* setD ZCS:... */
+ case 0x40: case 0x41: case 0x42: case 0x43: // setD ZCS:...
arg = m_read_r[0]() & 0x0f;
- arg |= (1 << (opcode&3));
+ arg |= (1 << (opcode & 3));
m_write_r[0](arg);
m_st = 1;
break;
- case 0x44: case 0x45: case 0x46: case 0x47: /* rstD ZCS:... */
+ case 0x44: case 0x45: case 0x46: case 0x47: // rstD ZCS:...
arg = m_read_r[0]() & 0x0f;
- arg &= ~(1 << (opcode&3));
+ arg &= ~(1 << (opcode & 3));
m_write_r[0](arg);
m_st = 1;
break;
- case 0x48: case 0x49: case 0x4a: case 0x4b: /* tstD ZCS:..x */
+ case 0x48: case 0x49: case 0x4a: case 0x4b: // tstD ZCS:..x
arg = m_read_r[2]() & 0x0f;
- m_st = (arg & (1 << (opcode&3))) ? 0 : 1;
+ m_st = (arg & (1 << (opcode & 3))) ? 0 : 1;
break;
- case 0x4c: case 0x4d: case 0x4e: case 0x4f: /* tba ZCS:..x */
- m_st = (m_A & (1 << (opcode&3))) ? 0 : 1;
+ case 0x4c: case 0x4d: case 0x4e: case 0x4f: // tba ZCS:..x
+ m_st = (m_A & (1 << (opcode & 3))) ? 0 : 1;
break;
- case 0x50: case 0x51: case 0x52: case 0x53: /* xd ZCS:x.. */
+ case 0x50: case 0x51: case 0x52: case 0x53: // xd ZCS:x..
arg = RDMEM(opcode&3);
- WRMEM((opcode&3),m_A);
+ WRMEM((opcode & 3), m_A);
m_A = arg;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0x54: case 0x55: case 0x56: case 0x57: /* xyd ZCS:x.. */
- arg = RDMEM((opcode&3)+4);
- WRMEM((opcode&3)+4,m_Y);
+ case 0x54: case 0x55: case 0x56: case 0x57: // xyd ZCS:x..
+ arg = RDMEM((opcode & 3) + 4);
+ WRMEM((opcode & 3) + 4, m_Y);
m_Y = arg;
UPDATE_ZF(m_Y);
m_st = 1;
break;
- case 0x58: case 0x59: case 0x5a: case 0x5b:
- case 0x5c: case 0x5d: case 0x5e: case 0x5f: /* lxi ZCS:x.. */
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f: // lxi ZCS:x..
m_X = opcode & 7;
UPDATE_ZF(m_X);
m_st = 1;
break;
- case 0x60: case 0x61: case 0x62: case 0x63:
- case 0x64: case 0x65: case 0x66: case 0x67: /* call imm ZCS:..x */
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67: // call imm ZCS:..x
arg = READOP(GETPC());
INCPC();
- oc = 2;
- if ( TEST_ST() )
+ oc++;
+ if (TEST_ST())
{
m_SP[m_SI] = GETPC();
- m_SI = ( m_SI + 1 ) & 3;
+ m_SI = (m_SI + 1) & 3;
m_PC = arg & 0x3f;
- m_PA = ( ( opcode & 7 ) << 2 ) | ( arg >> 6 );
+ m_PA = ((opcode & 7) << 2) | (arg >> 6);
}
m_st = 1;
break;
- case 0x68: case 0x69: case 0x6a: case 0x6b:
- case 0x6c: case 0x6d: case 0x6e: case 0x6f: /* jpl imm ZCS:..x */
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f: // jpl imm ZCS:..x
arg = READOP(GETPC());
INCPC();
- oc = 2;
- if ( TEST_ST() )
+ oc++;
+ if (TEST_ST())
{
m_PC = arg & 0x3f;
- m_PA = ( ( opcode & 7 ) << 2 ) | ( arg >> 6 );
+ m_PA = ((opcode & 7) << 2) | (arg >> 6);
}
m_st = 1;
break;
- case 0x70: case 0x71: case 0x72: case 0x73:
- case 0x74: case 0x75: case 0x76: case 0x77:
- case 0x78: case 0x79: case 0x7a: case 0x7b:
- case 0x7c: case 0x7d: case 0x7e: case 0x7f: /* ai ZCS:xxx */
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f: // ai ZCS:xxx
arg = opcode & 0x0f;
arg += m_A;
UPDATE_ST_C(arg);
@@ -930,28 +948,28 @@ void mb88_cpu_device::execute_run()
UPDATE_ZF(m_A);
break;
- case 0x80: case 0x81: case 0x82: case 0x83:
- case 0x84: case 0x85: case 0x86: case 0x87:
- case 0x88: case 0x89: case 0x8a: case 0x8b:
- case 0x8c: case 0x8d: case 0x8e: case 0x8f: /* lxi ZCS:x.. */
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x85: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f: // lxi ZCS:x..
m_Y = opcode & 0x0f;
UPDATE_ZF(m_Y);
m_st = 1;
break;
- case 0x90: case 0x91: case 0x92: case 0x93:
- case 0x94: case 0x95: case 0x96: case 0x97:
- case 0x98: case 0x99: case 0x9a: case 0x9b:
- case 0x9c: case 0x9d: case 0x9e: case 0x9f: /* li ZCS:x.. */
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9a: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f: // li ZCS:x..
m_A = opcode & 0x0f;
UPDATE_ZF(m_A);
m_st = 1;
break;
- case 0xa0: case 0xa1: case 0xa2: case 0xa3:
- case 0xa4: case 0xa5: case 0xa6: case 0xa7:
- case 0xa8: case 0xa9: case 0xaa: case 0xab:
- case 0xac: case 0xad: case 0xae: case 0xaf: /* cyi ZCS:xxx */
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa5: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xaa: case 0xab:
+ case 0xac: case 0xad: case 0xae: case 0xaf: // cyi ZCS:xxx
arg = (opcode & 0x0f) - m_Y;
UPDATE_CF(arg);
arg &= 0x0f;
@@ -959,10 +977,10 @@ void mb88_cpu_device::execute_run()
m_zf = m_st ^ 1;
break;
- case 0xb0: case 0xb1: case 0xb2: case 0xb3:
- case 0xb4: case 0xb5: case 0xb6: case 0xb7:
- case 0xb8: case 0xb9: case 0xba: case 0xbb:
- case 0xbc: case 0xbd: case 0xbe: case 0xbf: /* ci ZCS:xxx */
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xba: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf: // ci ZCS:xxx
arg = (opcode & 0x0f) - m_A;
UPDATE_CF(arg);
arg &= 0x0f;
@@ -970,19 +988,14 @@ void mb88_cpu_device::execute_run()
m_zf = m_st ^ 1;
break;
- default: /* jmp ZCS:..x */
- if ( TEST_ST() )
- {
+ default: // jmp ZCS:..x
+ if (TEST_ST())
m_PC = opcode & 0x3f;
- }
m_st = 1;
break;
}
- /* update cycle counts */
- CYCLES( oc );
-
- /* update interrupts, serial and timer flags */
- update_pio(oc);
+ // update cycle count, also update interrupts, serial and timer flags
+ burn_cycles(oc);
}
}
diff --git a/src/devices/cpu/mb88xx/mb88xx.h b/src/devices/cpu/mb88xx/mb88xx.h
index e207a2f39af..38ad8391dfd 100644
--- a/src/devices/cpu/mb88xx/mb88xx.h
+++ b/src/devices/cpu/mb88xx/mb88xx.h
@@ -2,7 +2,6 @@
// copyright-holders:Ernesto Corvi
/***************************************************************************
- mb88xx.h
Core implementation for the portable Fujitsu MB88xx series MCU emulator.
Written by Ernesto Corvi
@@ -54,20 +53,24 @@
enum
{
- MB88_PC=1,
- MB88_PA,
- MB88_FLAGS,
- MB88_SI,
- MB88_A,
- MB88_X,
- MB88_Y,
- MB88_PIO,
- MB88_TH,
- MB88_TL,
- MB88_SB
+ MB88XX_IRQ_LINE = 0,
+ MB88XX_TC_LINE
};
-#define MB88_IRQ_LINE 0
+enum
+{
+ MB88XX_PC = 1,
+ MB88XX_PA,
+ MB88XX_FLAGS,
+ MB88XX_SI,
+ MB88XX_A,
+ MB88XX_X,
+ MB88XX_Y,
+ MB88XX_PIO,
+ MB88XX_TH,
+ MB88XX_TL,
+ MB88XX_SB
+};
class mb88_cpu_device : public cpu_device
@@ -94,32 +97,33 @@ public:
// SO: serial output
auto write_so() { return m_write_so.bind(); }
- void set_pla(uint8_t *pla) { m_PLA = pla; }
+ // PLA mask option (default to 8-bit)
+ void set_pla_bits(u8 bits) { m_pla_bits = bits; } // 4-bit or 8-bit (4-bit requires PLA data)
+ void set_pla_data(u8 *pla) { m_pla_data = pla; }
- void clock_w(int state);
+ void data_4bit(address_map &map) ATTR_COLD;
+ void data_5bit(address_map &map) ATTR_COLD;
+ void data_6bit(address_map &map) ATTR_COLD;
+ void data_7bit(address_map &map) ATTR_COLD;
+ void program_10bit(address_map &map) ATTR_COLD;
+ void program_11bit(address_map &map) ATTR_COLD;
+ void program_9bit(address_map &map) ATTR_COLD;
- void data_4bit(address_map &map);
- void data_5bit(address_map &map);
- void data_6bit(address_map &map);
- void data_7bit(address_map &map);
- void program_10bit(address_map &map);
- void program_11bit(address_map &map);
- void program_9bit(address_map &map);
protected:
- mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width);
+ mb88_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_max_cycles() const noexcept override { return 3; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 2+3; } // includes interrupt
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 6 - 1) / 6; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 6); }
+ virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == MB88XX_IRQ_LINE || inputnum == MB88XX_TC_LINE; }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 6 - 1) / 6; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 6); }
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -136,36 +140,40 @@ private:
address_space_config m_program_config;
address_space_config m_data_config;
- uint8_t m_PC; /* Program Counter: 6 bits */
- uint8_t m_PA; /* Page Address: 4 bits */
- uint16_t m_SP[4]; /* Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq */
- uint8_t m_SI; /* Stack index: 2 bits */
- uint8_t m_A; /* Accumulator: 4 bits */
- uint8_t m_X; /* Index X: 4 bits */
- uint8_t m_Y; /* Index Y: 4 bits */
- uint8_t m_st; /* State flag: 1 bit */
- uint8_t m_zf; /* Zero flag: 1 bit */
- uint8_t m_cf; /* Carry flag: 1 bit */
- uint8_t m_vf; /* Timer overflow flag: 1 bit */
- uint8_t m_sf; /* Serial Full/Empty flag: 1 bit */
- uint8_t m_if; /* Interrupt flag: 1 bit */
-
- /* Peripheral Control */
- uint8_t m_pio; /* Peripheral enable bits: 8 bits */
-
- /* Timer registers */
- uint8_t m_TH; /* Timer High: 4 bits */
- uint8_t m_TL; /* Timer Low: 4 bits */
- uint8_t m_TP; /* Timer Prescale: 6 bits? */
- uint8_t m_ctr; /* current external counter value */
-
- /* Serial registers */
- uint8_t m_SB; /* Serial buffer: 4 bits */
- uint16_t m_SBcount; /* number of bits received */
+ u8 m_PC; // Program Counter: 6 bits
+ u8 m_PA; // Page Address: 4 bits
+ u16 m_SP[4]; // Stack is 4*10 bit addresses deep, but we also use 3 top bits per address to store flags during irq
+ u8 m_SI; // Stack index: 2 bits
+ u8 m_A; // Accumulator: 4 bits
+ u8 m_X; // Index X: 4 bits
+ u8 m_Y; // Index Y: 4 bits
+ u8 m_st; // State flag: 1 bit
+ u8 m_zf; // Zero flag: 1 bit
+ u8 m_cf; // Carry flag: 1 bit
+ u8 m_vf; // Timer overflow flag: 1 bit
+ u8 m_sf; // Serial Full/Empty flag: 1 bit
+ u8 m_if; // Interrupt flag (IRQ pin): 1 bit
+
+ // Peripheral Control
+ u8 m_pio; // Peripheral enable bits: 8 bits
+
+ // Timer registers
+ u8 m_TH; // Timer High: 4 bits
+ u8 m_TL; // Timer Low: 4 bits
+ u8 m_TP; // Timer Prescale: 6 bits?
+ u8 m_ctr; // current external counter value
+
+ // Serial registers
+ u8 m_SB; // Serial buffer: 4 bits
+ u16 m_SBcount; // number of bits received
emu_timer *m_serial;
- /* PLA configuration and port callbacks */
- uint8_t * m_PLA;
+ // PLA configuration
+ u8 *m_pla_data;
+ u8 m_pla_bits;
+ u8 m_o_output;
+
+ // port callbacks
devcb_read8 m_read_k;
devcb_write8 m_write_o;
devcb_write8 m_write_p;
@@ -174,9 +182,9 @@ private:
devcb_read_line m_read_si;
devcb_write_line m_write_so;
- /* IRQ handling */
- uint8_t m_pending_interrupt;
- bool m_in_irq;
+ // IRQ handling
+ u8 m_pending_irq;
+ bool m_in_irq;
memory_access<11, 0, 0, ENDIANNESS_BIG>::cache m_cache;
memory_access<11, 0, 0, ENDIANNESS_BIG>::specific m_program;
@@ -185,62 +193,56 @@ private:
int m_icount;
// For the debugger
- uint16_t m_debugger_pc;
- uint8_t m_debugger_flags;
+ u16 m_debugger_pc;
+ u8 m_debugger_flags;
- TIMER_CALLBACK_MEMBER( serial_timer );
- int pla( int inA, int inB );
- void update_pio_enable( uint8_t newpio );
+ TIMER_CALLBACK_MEMBER(serial_timer);
+ void write_pla(u8 index);
+ void pio_enable(u8 newpio);
void increment_timer();
- void update_pio( int cycles );
+ void burn_cycles(int cycles);
};
class mb88201_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb88201_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb88202_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb88202_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb8841_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb8841_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb8842_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb8842_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb8843_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb8843_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb8844_cpu_device : public mb88_cpu_device
{
public:
- // construction/destruction
- mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb8844_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
diff --git a/src/devices/cpu/mc68hc11/hc11ops.hxx b/src/devices/cpu/mc68hc11/hc11ops.hxx
index 2429f0b6d57..3380f39a7bb 100644
--- a/src/devices/cpu/mc68hc11/hc11ops.hxx
+++ b/src/devices/cpu/mc68hc11/hc11ops.hxx
@@ -4180,28 +4180,14 @@ void HC11OP(tys)()
/* WAI 0x3E */
void HC11OP(wai)()
{
- if(m_wait_state == 0)
- {
- /* TODO: the following is bogus, pushes regs HERE in an instruction that wants an irq to go out? */
- PUSH16(m_pc);
- PUSH16(m_iy);
- PUSH16(m_ix);
- PUSH8(REG_A);
- PUSH8(REG_B);
- PUSH8(m_ccr);
- CYCLES(14);
- m_wait_state = 1;
- }
- if(m_wait_state == 1)
- {
- SET_PC(m_ppc); // wait for an exception
- CYCLES(1);
- }
- if(m_wait_state == 2)
- {
- m_wait_state = 0;
- CYCLES(1);
- }
+ PUSH16(m_pc);
+ PUSH16(m_iy);
+ PUSH16(m_ix);
+ PUSH8(REG_A);
+ PUSH8(REG_B);
+ PUSH8(m_ccr);
+ CYCLES(14);
+ m_wait_state = 1;
}
/* XGDX 0x8F */
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.cpp b/src/devices/cpu/mc68hc11/mc68hc11.cpp
index 4469be598ca..30ef3a30c45 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.cpp
+++ b/src/devices/cpu/mc68hc11/mc68hc11.cpp
@@ -16,6 +16,8 @@ TODO:
#include "mc68hc11.h"
#include "hc11dasm.h"
+#include <tuple>
+
#define LOG_IRQ (1U << 1)
#define VERBOSE (0)
@@ -163,12 +165,15 @@ std::unique_ptr<util::disasm_interface> mc68hc11_cpu_device::create_disassembler
bool mc68hc11_cpu_device::nvram_read(util::read_stream &file)
{
+ std::error_condition err;
size_t actual;
- if (file.read(&m_eeprom_data[0], m_internal_eeprom_size, actual) || actual != m_internal_eeprom_size)
+ std::tie(err, actual) = read(file, &m_eeprom_data[0], m_internal_eeprom_size);
+ if (err || (actual != m_internal_eeprom_size))
return false;
- if (file.read(&m_config, 1, actual) || actual != 1)
+ std::tie(err, actual) = read(file, &m_config, 1);
+ if (err || (actual != 1))
return false;
return true;
@@ -176,12 +181,15 @@ bool mc68hc11_cpu_device::nvram_read(util::read_stream &file)
bool mc68hc11_cpu_device::nvram_write(util::write_stream &file)
{
+ std::error_condition err;
size_t actual;
- if (file.write(&m_eeprom_data[0], m_internal_eeprom_size, actual) || actual != m_internal_eeprom_size)
+ std::tie(err, actual) = write(file, &m_eeprom_data[0], m_internal_eeprom_size);
+ if (err)
return false;
- if (file.write(&m_config, 1, actual) || actual != 1)
+ std::tie(err, actual) = write(file, &m_config, 1);
+ if (err)
return false;
return true;
@@ -1214,10 +1222,18 @@ void mc68hc11_cpu_device::execute_run()
check_irq_lines();
- m_ppc = m_pc;
- debugger_instruction_hook(m_pc);
+ if (m_wait_state != 0)
+ {
+ debugger_wait_hook();
+ m_icount = 0;
+ }
+ else
+ {
+ m_ppc = m_pc;
+ debugger_instruction_hook(m_pc);
- op = FETCH();
- (this->*hc11_optable[op])();
+ op = FETCH();
+ (this->*hc11_optable[op])();
+ }
}
}
diff --git a/src/devices/cpu/mc68hc11/mc68hc11.h b/src/devices/cpu/mc68hc11/mc68hc11.h
index 75c12c1455c..a7248de563b 100644
--- a/src/devices/cpu/mc68hc11/mc68hc11.h
+++ b/src/devices/cpu/mc68hc11/mc68hc11.h
@@ -56,13 +56,12 @@ protected:
mc68hc11_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint16_t ram_size, uint16_t reg_block_size, uint16_t rom_size, uint16_t eeprom_size, uint8_t init_value, uint8_t config_mask, uint8_t option_mask);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 41; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
virtual void execute_run() override;
@@ -229,7 +228,7 @@ private:
ophandler hc11_optable_page3[256];
ophandler hc11_optable_page4[256];
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
uint8_t FETCH();
uint16_t FETCH16();
@@ -565,7 +564,7 @@ public:
mc68hc11a1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void mc68hc11_reg_map(memory_view::memory_view_entry &block, offs_t base) override;
@@ -580,7 +579,7 @@ public:
mc68hc11d0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void mc68hc11_reg_map(memory_view::memory_view_entry &block, offs_t base) override;
@@ -595,7 +594,7 @@ public:
mc68hc11e1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void mc68hc11_reg_map(memory_view::memory_view_entry &block, offs_t base) override;
};
@@ -607,7 +606,7 @@ public:
mc68hc811e2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void mc68hc11_reg_map(memory_view::memory_view_entry &block, offs_t base) override;
};
@@ -619,7 +618,7 @@ public:
mc68hc11f1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void mc68hc11_reg_map(memory_view::memory_view_entry &block, offs_t base) override;
};
diff --git a/src/devices/cpu/mcs40/mcs40.cpp b/src/devices/cpu/mcs40/mcs40.cpp
index e7b30082012..bf9b6a310d6 100644
--- a/src/devices/cpu/mcs40/mcs40.cpp
+++ b/src/devices/cpu/mcs40/mcs40.cpp
@@ -510,39 +510,39 @@ inline void mcs40_cpu_device_base::set_rc(u8 val)
inline u8 mcs40_cpu_device_base::read_memory()
{
- return m_spaces[AS_RAM_MEMORY]->read_byte((u16(m_cr & 0x7U) << 8) | m_latched_rc) & 0x0fU;
+ return m_spaces[AS_RAM_MEMORY]->read_byte((u16(m_cr & 0x7U) << 8) | m_latched_rc, 0x0fU) & 0x0fU;
}
inline void mcs40_cpu_device_base::write_memory(u8 val)
{
- m_spaces[AS_RAM_MEMORY]->write_byte((u16(m_cr & 0x7U) << 8) | m_latched_rc, val & 0x0fU);
+ m_spaces[AS_RAM_MEMORY]->write_byte((u16(m_cr & 0x7U) << 8) | m_latched_rc, val & 0x0fU, 0x0fU);
}
inline u8 mcs40_cpu_device_base::read_status()
{
u16 const addr((((u16(m_cr) << 6) | (m_latched_rc >> 2)) & 0x01fcU) | (m_opa & 0x0003U));
- return m_spaces[AS_RAM_STATUS]->read_byte(addr) & 0x0fU;
+ return m_spaces[AS_RAM_STATUS]->read_byte(addr, 0x0fU) & 0x0fU;
}
inline void mcs40_cpu_device_base::write_status(u8 val)
{
u16 const addr((((u16(m_cr) << 6) | (m_latched_rc >> 2)) & 0x01fcU) | (m_opa & 0x0003U));
- m_spaces[AS_RAM_STATUS]->write_byte(addr, val & 0x0fU);
+ m_spaces[AS_RAM_STATUS]->write_byte(addr, val & 0x0fU, 0x0fU);
}
inline u8 mcs40_cpu_device_base::read_rom_port()
{
- return m_spaces[AS_ROM_PORTS]->read_byte((u16(m_cr) << 8) | m_latched_rc) & 0x0fU;
+ return m_spaces[AS_ROM_PORTS]->read_byte((u16(m_cr) << 8) | m_latched_rc, 0x0fU) & 0x0fU;
}
inline void mcs40_cpu_device_base::write_rom_port(u8 val)
{
- m_spaces[AS_ROM_PORTS]->write_byte((u16(m_cr) << 8) | m_latched_rc, val & 0x0fU);
+ m_spaces[AS_ROM_PORTS]->write_byte((u16(m_cr) << 8) | m_latched_rc, val & 0x0fU, 0x0fU);
}
inline void mcs40_cpu_device_base::write_memory_port(u8 val)
{
- m_spaces[AS_RAM_PORTS]->write_byte(((m_cr << 2) & 0x1cU) | (m_latched_rc >> 6), val & 0x0fU);
+ m_spaces[AS_RAM_PORTS]->write_byte(((m_cr << 2) & 0x1cU) | (m_latched_rc >> 6), val & 0x0fU, 0x0fU);
}
@@ -580,7 +580,7 @@ inline void mcs40_cpu_device_base::do_a1()
if (cycle::OP == m_cycle)
{
m_pcbase = rom_bank() | m_rom_addr;
- if (machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
debugger_instruction_hook(pc());
if (m_stop_latch)
{
@@ -812,16 +812,15 @@ i4004_cpu_device::i4004_cpu_device(machine_config const &mconfig, char const *ta
{
}
+i4004_cpu_device::~i4004_cpu_device()
+{
+}
+
/***********************************************************************
device_execute_interface implementation
***********************************************************************/
-u32 i4004_cpu_device::execute_input_lines() const noexcept
-{
- return 1U;
-}
-
void i4004_cpu_device::execute_set_input(int inputnum, int state)
{
switch (inputnum)
@@ -863,10 +862,9 @@ i4004_cpu_device::cycle i4004_cpu_device::do_cycle1(u8 opr, u8 opa, pmem &progra
case 0x0:
switch (opa)
{
+ default: // in practice, the 4004 treats these as aliases for NOP
case 0x0: // NOP
return cycle::OP;
- default:
- break;
}
break;
@@ -1122,16 +1120,15 @@ i4040_cpu_device::i4040_cpu_device(machine_config const &mconfig, char const *ta
{
}
+i4040_cpu_device::~i4040_cpu_device()
+{
+}
+
/***********************************************************************
device_execute_interface implementation
***********************************************************************/
-u32 i4040_cpu_device::execute_input_lines() const noexcept
-{
- return 3U;
-}
-
void i4040_cpu_device::execute_set_input(int inputnum, int state)
{
switch (inputnum)
@@ -1166,6 +1163,8 @@ i4040_cpu_device::cycle i4040_cpu_device::do_cycle1(u8 opr, u8 opa, pmem &progra
case 0x0:
switch (opa)
{
+ case 0x0: // NOP
+ return cycle::OP;
case 0x1: // HLT
halt_decoded();
return cycle::OP;
@@ -1192,7 +1191,8 @@ i4040_cpu_device::cycle i4040_cpu_device::do_cycle1(u8 opr, u8 opa, pmem &progra
program_op = pmem::READ;
return cycle::OP;
default:
- break;
+ logerror("MCS-40: unhandled instruction OPR=%X OPA=%X\n", opr, opa);
+ return cycle::OP;
}
break;
default:
diff --git a/src/devices/cpu/mcs40/mcs40.h b/src/devices/cpu/mcs40/mcs40.h
index 9b538fd9255..80f0d1e44d8 100644
--- a/src/devices/cpu/mcs40/mcs40.h
+++ b/src/devices/cpu/mcs40/mcs40.h
@@ -82,8 +82,8 @@ protected:
unsigned cr_mask);
// device_t implementation
- void device_start() override;
- void device_reset() override;
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual void execute_run() override;
@@ -254,12 +254,12 @@ public:
template <unsigned N> auto cm_ram_cb() { return mcs40_cpu_device_base::cm_ram_cb<N>(); }
i4004_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ virtual ~i4004_cpu_device();
protected:
using mcs40_cpu_device_base::mcs40_cpu_device_base;
// device_execute_interface implementation
- virtual u32 execute_input_lines() const noexcept override;
virtual void execute_set_input(int inputnum, int state) override;
// device_disasm_interface implementation
@@ -283,13 +283,13 @@ public:
using mcs40_cpu_device_base::stp_ack_cb;
i4040_cpu_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+ virtual ~i4040_cpu_device();
protected:
// device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device_execute_interface implementation
- virtual u32 execute_input_lines() const noexcept override;
virtual void execute_set_input(int inputnum, int state) override;
// mcs40_cpu_device_base implementation
diff --git a/src/devices/cpu/mcs48/mcs48.cpp b/src/devices/cpu/mcs48/mcs48.cpp
index b3ea2e55dda..879c0f38b7c 100644
--- a/src/devices/cpu/mcs48/mcs48.cpp
+++ b/src/devices/cpu/mcs48/mcs48.cpp
@@ -1,6 +1,6 @@
// license:BSD-3-Clause
// copyright-holders:Dan Boris, Mirko Buffoni, Aaron Giles, Couriersud
-/***************************************************************************
+/*******************************************************************************
Intel MCS-48/UPI-41 Portable Emulator
@@ -8,18 +8,44 @@
Based on the original work Copyright Dan Boris, an 8048 emulator
TODO:
- - EA pin - defined by architecture, must implement:
- 1 means external access, bypassing internal ROM
- reimplement as a push, not a pull
- add CMOS devices, 1 new opcode (01 IDL)
- add special 8022 opcodes (RAD, SEL AN0, SEL AN1, RETI)
- - according to the user manual, some opcodes(dis/enable timer/interrupt)
- don't increment the timer, does it affect the prescaler too?
- Most likely, timer input (prescaler overflow or T1 edge) still occurs,
- just that m_timer increment is delayed 1 opcode.
- - IRQ timing is hacked due to WY-100 needing to take JNI branch before servicing interrupt
+ - IRQ and/or timer increment timing is wrong? See test below. After IRQ,
+ A = 0x20 on MAME, A = 0x22 on the real 8048 as tested by bataais.
-****************************************************************************
+ stop tcnt
+ mov a,0xff
+ mov t,a
+ inc a
+
+ en tcnti
+ strt t
+
+ inc a
+ inc a
+ inc a
+ (etc.)
+
+ With the following test, on MAME, A = 0xff after 30 NOPs, A = 0 after 31
+ NOPs. On the real 8048, A = 0xff after 31 NOPs, A = 0 after 32 NOPs.
+ It can mean that STRT T has a 1 cycle delay, or simply that MOV A,T gets
+ the timer value pre-increment.
+
+ stop tcnt
+ mov a,0xff
+ mov t,a
+ strt t
+
+ nop
+ nop
+ nop
+ (etc.)
+ mov a,t
+
+ - IRQ timing is hacked due to WY-100 needing to take JNI branch before
+ servicing interrupt (see m_irq_polled), probably related to note above?
+
+********************************************************************************
Note that the default internal divisor for this chip is by 3 and
then again by 5, or by 15 total.
@@ -34,36 +60,36 @@
8648 64 1k 27 (OTPROM)
8748 64 1k 27 (EPROM)
8884 64 1k
- N7751 64 1k (8048, speech synthesizer in internal ROM)
+ UPD7751 64 1k (8048, speech synthesizer in internal ROM)
8039 128 0 27 (external ROM)
8049 128 2k 27 (ROM)
8749 128 2k 27 (EPROM)
M58715 128 0 (external ROM)
- 8040 256 4k 27 (external ROM)
+ 8040 256 0 27 (external ROM)
8050 256 4k 27 (ROM)
-****************************************************************************
+********************************************************************************
UPI-41/42 chips are MCS-48 derived, with some opcode changes:
- MCS-48 opcode UPI-41/42 opcode
- ------------- ----------------
- 02: OUTL BUS,A OUT DBB,A
- 08: INS BUS,A <illegal>
- 22: <illegal> IN DBB,A
- 75: ENT0 CLK <illegal>
- 80: MOVX A,@R0 <illegal>
- 81: MOVX A,@R1 <illegal>
- 86: JNI <dest> JOBF <dest>
- 88: ORL BUS,#n <illegal>
- 90: MOVX @R0,A MOV STS,A
- 91: MOVX @R1,A <illegal>
- 98: ANL BUS,#n <illegal>
- D6: <illegal> JNIBF <dest>
- E5: SEL MB0 EN DMA
- F5: SEL MB1 EN FLAGS
+ MCS-48 opcode UPI-41/42 opcode
+ ------------- ----------------
+ 02: OUTL BUS,A OUT DBB,A
+ 08: INS BUS,A <illegal>
+ 22: <illegal> IN DBB,A
+ 75: ENT0 CLK <illegal>
+ 80: MOVX A,@R0 <illegal>
+ 81: MOVX A,@R1 <illegal>
+ 86: JNI <dest> JOBF <dest>
+ 88: ORL BUS,#n <illegal>
+ 90: MOVX @R0,A MOV STS,A
+ 91: MOVX @R1,A <illegal>
+ 98: ANL BUS,#n <illegal>
+ D6: <illegal> JNIBF <dest>
+ E5: SEL MB0 EN DMA
+ F5: SEL MB1 EN FLAGS
Chip numbers are similar to the MCS-48 series:
@@ -81,16 +107,16 @@
8742 128 2k (EPROM)
8742AH 256 2k (EPROM)
-***************************************************************************/
+*******************************************************************************/
#include "emu.h"
#include "mcs48.h"
#include "mcs48dsm.h"
-/***************************************************************************
+/*******************************************************************************
CONSTANTS
-***************************************************************************/
+*******************************************************************************/
// timer/counter enable bits
#define TIMER_ENABLED 0x01
@@ -124,9 +150,9 @@
#define I8048_FEATURE (MB_FEATURE | EXT_BUS_FEATURE)
-/***************************************************************************
+/*******************************************************************************
MACROS
-***************************************************************************/
+*******************************************************************************/
// r0-r7 map to memory via the regptr
#define R0 m_regptr[0]
@@ -139,6 +165,10 @@
#define R7 m_regptr[7]
+/*******************************************************************************
+ DEVICE TYPES
+*******************************************************************************/
+
DEFINE_DEVICE_TYPE(I8021, i8021_device, "i8021", "Intel 8021")
DEFINE_DEVICE_TYPE(I8022, i8022_device, "i8022", "Intel 8022")
DEFINE_DEVICE_TYPE(I8035, i8035_device, "i8035", "Intel 8035")
@@ -150,6 +180,7 @@ DEFINE_DEVICE_TYPE(I8049, i8049_device, "i8049", "Intel 8049")
DEFINE_DEVICE_TYPE(I8749, i8749_device, "i8749", "Intel 8749")
DEFINE_DEVICE_TYPE(I8040, i8040_device, "i8040", "Intel 8040")
DEFINE_DEVICE_TYPE(I8050, i8050_device, "i8050", "Intel 8050")
+
DEFINE_DEVICE_TYPE(I8041A, i8041a_device, "i8041a", "Intel 8041A")
DEFINE_DEVICE_TYPE(I8741A, i8741a_device, "i8741a", "Intel 8741A")
DEFINE_DEVICE_TYPE(I8041AH, i8041ah_device, "i8041ah", "Intel 8041AH")
@@ -158,59 +189,24 @@ DEFINE_DEVICE_TYPE(I8042, i8042_device, "i8042", "Intel 8042")
DEFINE_DEVICE_TYPE(I8742, i8742_device, "i8742", "Intel 8742")
DEFINE_DEVICE_TYPE(I8042AH, i8042ah_device, "i8042ah", "Intel 8042AH")
DEFINE_DEVICE_TYPE(I8742AH, i8742ah_device, "i8742ah", "Intel 8742AH")
-DEFINE_DEVICE_TYPE(MB8884, mb8884_device, "mb8884", "MB8884")
-DEFINE_DEVICE_TYPE(N7751, n7751_device, "n7751", "NEC uPD7751")
-DEFINE_DEVICE_TYPE(M58715, m58715_device, "m58715", "M58715")
+DEFINE_DEVICE_TYPE(MB8884, mb8884_device, "mb8884", "Fujitsu MB8884")
+DEFINE_DEVICE_TYPE(UPD7751, upd7751_device, "upd7751", "NEC uPD7751")
+DEFINE_DEVICE_TYPE(M58715, m58715_device, "m58715", "Mitsubishi M58715")
-/***************************************************************************
- ADDRESS MAPS
-***************************************************************************/
-// FIXME: the memory maps should probably support rom banking for EA
-void mcs48_cpu_device::program_10bit(address_map &map)
-{
- map(0x000, 0x3ff).rom();
-}
-
-void mcs48_cpu_device::program_11bit(address_map &map)
-{
- map(0x000, 0x7ff).rom();
-}
-
-void mcs48_cpu_device::program_12bit(address_map &map)
-{
- map(0x000, 0xfff).rom();
-}
-
-void mcs48_cpu_device::data_6bit(address_map &map)
-{
- map(0x00, 0x3f).ram().share("data");
-}
+/*******************************************************************************
+ CONSTRUCTOR
+*******************************************************************************/
-void mcs48_cpu_device::data_7bit(address_map &map)
-{
- map(0x00, 0x7f).ram().share("data");
-}
-
-void mcs48_cpu_device::data_8bit(address_map &map)
-{
- map(0x00, 0xff).ram().share("data");
-}
-
-
-mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rom_size, int ram_size, uint8_t feature_mask, const mcs48_cpu_device::mcs48_ophandler *opcode_table)
+mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int rom_size, int ram_size, u8 feature_mask, const mcs48_cpu_device::mcs48_ophandler *opcode_table)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 8, (feature_mask & MB_FEATURE) != 0 ? 12 : 11, 0,
- (rom_size == 1024) ? address_map_constructor(FUNC(mcs48_cpu_device::program_10bit), this) :
- (rom_size == 2048) ? address_map_constructor(FUNC(mcs48_cpu_device::program_11bit), this) :
- (rom_size == 4096) ? address_map_constructor(FUNC(mcs48_cpu_device::program_12bit), this) :
- address_map_constructor())
+ rom_size ? address_map_constructor(FUNC(mcs48_cpu_device::program_map), this) : address_map_constructor())
, m_data_config("data", ENDIANNESS_LITTLE, 8, ((ram_size == 64) ? 6 : ((ram_size == 128) ? 7 : 8)), 0,
- (ram_size == 64) ? address_map_constructor(FUNC(mcs48_cpu_device::data_6bit), this) :
- (ram_size == 128) ? address_map_constructor(FUNC(mcs48_cpu_device::data_7bit), this) :
- address_map_constructor(FUNC(mcs48_cpu_device::data_8bit), this))
+ address_map_constructor(FUNC(mcs48_cpu_device::data_map), this))
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
+ , m_rom_view(*this, "rom_view")
, m_port_in_cb(*this, 0xff)
, m_port_out_cb(*this)
, m_bus_in_cb(*this, 0xff)
@@ -221,132 +217,133 @@ mcs48_cpu_device::mcs48_cpu_device(const machine_config &mconfig, device_type ty
, m_psw(0)
, m_dataptr(*this, "data")
, m_feature_mask(feature_mask)
- , m_int_rom_size(rom_size)
+ , m_rom_size(rom_size)
+ , m_ram_size(ram_size)
, m_opcode_table(opcode_table)
{
// Sanity checks
- if ( ram_size != 64 && ram_size != 128 && ram_size != 256 )
+ if (ram_size != 64 && ram_size != 128 && ram_size != 256)
{
fatalerror("mcs48: Invalid RAM size\n");
}
- if ( rom_size != 0 && rom_size != 1024 && rom_size != 2048 && rom_size != 4096 )
+ if (rom_size != 0 && rom_size != 1024 && rom_size != 2048 && rom_size != 4096)
{
fatalerror("mcs48: Invalid ROM size\n");
}
}
-i8021_device::i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8021_device::i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8021, tag, owner, clock, 1024, 64, I802X_FEATURE, s_i8021_opcodes)
{
}
-i8022_device::i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8022_device::i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8022, tag, owner, clock, 2048, 128, I802X_FEATURE, s_i8022_opcodes)
{
}
-i8035_device::i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8035_device::i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8035, tag, owner, clock, 0, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8048_device::i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8048_device::i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8048, tag, owner, clock, 1024, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8648_device::i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8648_device::i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8648, tag, owner, clock, 1024, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8748_device::i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8748_device::i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8748, tag, owner, clock, 1024, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8039_device::i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8039_device::i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8039, tag, owner, clock, 0, 128, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8049_device::i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8049_device::i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8049, tag, owner, clock, 2048, 128, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8749_device::i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8749_device::i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8749, tag, owner, clock, 2048, 128, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8040_device::i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8040_device::i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8040, tag, owner, clock, 0, 256, I8048_FEATURE, s_mcs48_opcodes)
{
}
-i8050_device::i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8050_device::i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, I8050, tag, owner, clock, 4096, 256, I8048_FEATURE, s_mcs48_opcodes)
{
}
-mb8884_device::mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+mb8884_device::mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, MB8884, tag, owner, clock, 0, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-n7751_device::n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mcs48_cpu_device(mconfig, N7751, tag, owner, clock, 1024, 64, I8048_FEATURE, s_mcs48_opcodes)
+upd7751_device::upd7751_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : mcs48_cpu_device(mconfig, UPD7751, tag, owner, clock, 1024, 64, I8048_FEATURE, s_mcs48_opcodes)
{
}
-m58715_device::m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+m58715_device::m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: mcs48_cpu_device(mconfig, M58715, tag, owner, clock, 2048, 128, I8048_FEATURE, s_mcs48_opcodes)
{
}
-upi41_cpu_device::upi41_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rom_size, int ram_size)
+upi41_cpu_device::upi41_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int rom_size, int ram_size)
: mcs48_cpu_device(mconfig, type, tag, owner, clock, rom_size, ram_size, UPI41_FEATURE, s_upi41_opcodes)
{
}
-i8041a_device::i8041a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8041a_device::i8041a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8041A, tag, owner, clock, 1024, 64)
{
}
-i8741a_device::i8741a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8741a_device::i8741a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8741A, tag, owner, clock, 1024, 64)
{
}
-i8041ah_device::i8041ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8041ah_device::i8041ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8041AH, tag, owner, clock, 1024, 128)
{
}
-i8741ah_device::i8741ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8741ah_device::i8741ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8741AH, tag, owner, clock, 1024, 128)
{
}
-i8042_device::i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8042_device::i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8042, tag, owner, clock, 2048, 128)
{
}
-i8742_device::i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8742_device::i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8742, tag, owner, clock, 2048, 128)
{
}
-i8042ah_device::i8042ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8042ah_device::i8042ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8042AH, tag, owner, clock, 2048, 256)
{
}
-i8742ah_device::i8742ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+i8742ah_device::i8742ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: upi41_cpu_device(mconfig, I8742AH, tag, owner, clock, 2048, 256)
{
}
@@ -372,17 +369,41 @@ std::unique_ptr<util::disasm_interface> mcs48_cpu_device::create_disassembler()
}
-/***************************************************************************
+/*******************************************************************************
+ ADDRESS MAPS
+*******************************************************************************/
+
+void mcs48_cpu_device::program_map(address_map &map)
+{
+ const u16 end = m_rom_size - 1;
+
+ // I802X does not have EA pin
+ if (m_feature_mask & I802X_FEATURE)
+ map(0, end).rom();
+ else
+ {
+ map(0, end).view(m_rom_view);
+ m_rom_view[0](0, end).rom();
+ }
+}
+
+void mcs48_cpu_device::data_map(address_map &map)
+{
+ map(0, m_ram_size - 1).ram().share("data");
+}
+
+
+/*******************************************************************************
INLINE FUNCTIONS
-***************************************************************************/
+*******************************************************************************/
/*-------------------------------------------------
opcode_fetch - fetch an opcode byte
-------------------------------------------------*/
-uint8_t mcs48_cpu_device::opcode_fetch()
+u8 mcs48_cpu_device::opcode_fetch()
{
- uint16_t address = m_pc;
+ u16 address = m_pc;
m_pc = ((m_pc + 1) & 0x7ff) | (m_pc & 0x800);
return m_program.read_byte(address);
}
@@ -393,9 +414,9 @@ uint8_t mcs48_cpu_device::opcode_fetch()
byte
-------------------------------------------------*/
-uint8_t mcs48_cpu_device::argument_fetch()
+u8 mcs48_cpu_device::argument_fetch()
{
- uint16_t address = m_pc;
+ u16 address = m_pc;
m_pc = ((m_pc + 1) & 0x7ff) | (m_pc & 0x800);
return m_program.read_byte(address);
}
@@ -413,13 +434,30 @@ void mcs48_cpu_device::update_regptr()
/*-------------------------------------------------
- push_pc_psw - push the m_pc and m_psw values onto
+ update_ea - apply EA pin (External Access input,
+ EA=1: external ROM, EA=0: internal ROM)
+-------------------------------------------------*/
+
+void mcs48_cpu_device::update_ea()
+{
+ if (m_rom_view.exists())
+ {
+ if (m_ea)
+ m_rom_view.disable();
+ else
+ m_rom_view.select(0);
+ }
+}
+
+
+/*-------------------------------------------------
+ push_pc_psw - push the PC and PSW values onto
the stack
-------------------------------------------------*/
void mcs48_cpu_device::push_pc_psw()
{
- uint8_t sp = m_psw & 0x07;
+ u8 sp = m_psw & 0x07;
ram_w(8 + 2*sp, m_pc);
ram_w(9 + 2*sp, ((m_pc >> 8) & 0x0f) | (m_psw & 0xf0));
m_psw = (m_psw & 0xf0) | ((sp + 1) & 0x07);
@@ -433,7 +471,7 @@ void mcs48_cpu_device::push_pc_psw()
void mcs48_cpu_device::pull_pc_psw()
{
- uint8_t sp = (m_psw - 1) & 0x07;
+ u8 sp = (m_psw - 1) & 0x07;
m_pc = ram_r(8 + 2*sp);
m_pc |= ram_r(9 + 2*sp) << 8;
m_psw = ((m_pc >> 8) & 0xf0) | sp;
@@ -449,7 +487,7 @@ void mcs48_cpu_device::pull_pc_psw()
void mcs48_cpu_device::pull_pc()
{
- uint8_t sp = (m_psw - 1) & 0x07;
+ u8 sp = (m_psw - 1) & 0x07;
m_pc = ram_r(8 + 2*sp);
m_pc |= ram_r(9 + 2*sp) << 8;
m_pc &= (m_irq_in_progress) ? 0x7ff : 0xfff;
@@ -462,10 +500,10 @@ void mcs48_cpu_device::pull_pc()
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_add(uint8_t dat)
+void mcs48_cpu_device::execute_add(u8 dat)
{
- uint16_t temp = m_a + dat;
- uint16_t temp4 = (m_a & 0x0f) + (dat & 0x0f);
+ u16 temp = m_a + dat;
+ u16 temp4 = (m_a & 0x0f) + (dat & 0x0f);
m_psw &= ~(C_FLAG | A_FLAG);
m_psw |= (temp4 << 2) & A_FLAG;
@@ -479,11 +517,11 @@ void mcs48_cpu_device::execute_add(uint8_t dat)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_addc(uint8_t dat)
+void mcs48_cpu_device::execute_addc(u8 dat)
{
- uint8_t carryin = (m_psw & C_FLAG) >> 7;
- uint16_t temp = m_a + dat + carryin;
- uint16_t temp4 = (m_a & 0x0f) + (dat & 0x0f) + carryin;
+ u8 carryin = (m_psw & C_FLAG) >> 7;
+ u16 temp = m_a + dat + carryin;
+ u16 temp4 = (m_a & 0x0f) + (dat & 0x0f) + carryin;
m_psw &= ~(C_FLAG | A_FLAG);
m_psw |= (temp4 << 2) & A_FLAG;
@@ -497,9 +535,9 @@ void mcs48_cpu_device::execute_addc(uint8_t dat)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_jmp(uint16_t address)
+void mcs48_cpu_device::execute_jmp(u16 address)
{
- uint16_t a11 = (m_irq_in_progress) ? 0 : m_a11;
+ u16 a11 = (m_irq_in_progress) ? 0 : m_a11;
m_pc = address | a11;
}
@@ -509,7 +547,7 @@ void mcs48_cpu_device::execute_jmp(uint16_t address)
instruction
-------------------------------------------------*/
-void mcs48_cpu_device::execute_call(uint16_t address)
+void mcs48_cpu_device::execute_call(u16 address)
{
push_pc_psw();
execute_jmp(address);
@@ -523,8 +561,8 @@ void mcs48_cpu_device::execute_call(uint16_t address)
void mcs48_cpu_device::execute_jcc(bool result)
{
- uint16_t pch = m_pc & 0xf00;
- uint8_t offset = argument_fetch();
+ u16 pch = m_pc & 0xf00;
+ u8 offset = argument_fetch();
if (result)
m_pc = pch | offset;
}
@@ -535,9 +573,9 @@ void mcs48_cpu_device::execute_jcc(bool result)
code can directly affect
-------------------------------------------------*/
-uint8_t mcs48_cpu_device::p2_mask()
+u8 mcs48_cpu_device::p2_mask()
{
- uint8_t result = 0xff;
+ u8 result = 0xff;
if ((m_feature_mask & UPI41_FEATURE) == 0)
return result;
if (m_flags_enabled)
@@ -553,10 +591,10 @@ uint8_t mcs48_cpu_device::p2_mask()
the 8243 expander chip
-------------------------------------------------*/
-void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port)
+void mcs48_cpu_device::expander_operation(expander_op operation, u8 port)
{
// put opcode on low 4 bits of P2 (overwriting latch)
- port_w(2, m_p2 = (m_p2 & 0xf0) | (uint8_t(operation) << 2) | (port & 3));
+ port_w(2, m_p2 = (m_p2 & 0xf0) | (u8(operation) << 2) | (port & 3));
// generate high-to-low transition on PROG line
prog_w(0);
@@ -579,9 +617,9 @@ void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port)
-/***************************************************************************
+/*******************************************************************************
OPCODE HANDLERS
-***************************************************************************/
+*******************************************************************************/
#define OPHANDLER(_name) void mcs48_cpu_device::_name()
@@ -589,7 +627,7 @@ void mcs48_cpu_device::expander_operation(expander_op operation, uint8_t port)
OPHANDLER( illegal )
{
burn_cycles(1);
- logerror("MCS-48 PC:%04X - Illegal opcode = %02x\n", m_prevpc, program_r(m_prevpc));
+ logerror("Illegal opcode = %02x @ %04X\n", program_r(m_prevpc), m_prevpc);
}
OPHANDLER( add_a_r0 ) { burn_cycles(1); execute_add(R0); }
@@ -850,7 +888,7 @@ OPHANDLER( orld_p7_a ) { burn_cycles(2); expander_operation(EXPANDER_OP_OR,
OPHANDLER( outl_bus_a ) { burn_cycles(2); bus_w(m_a); }
OPHANDLER( outl_p0_a ) { burn_cycles(2); bus_w(m_dbbo = m_a); }
OPHANDLER( outl_p1_a ) { burn_cycles(2); port_w(1, m_p1 = m_a); }
-OPHANDLER( outl_p2_a ) { burn_cycles(2); uint8_t mask = p2_mask(); port_w(2, m_p2 = (m_p2 & ~mask) | (m_a & mask)); }
+OPHANDLER( outl_p2_a ) { burn_cycles(2); u8 mask = p2_mask(); port_w(2, m_p2 = (m_p2 & ~mask) | (m_a & mask)); }
OPHANDLER( out_dbb_a )
{
burn_cycles(1);
@@ -864,7 +902,6 @@ OPHANDLER( out_dbb_a )
port_w(2, m_p2 |= P2_OBF);
}
-
OPHANDLER( ret ) { burn_cycles(2); pull_pc(); }
OPHANDLER( retr )
{
@@ -876,10 +913,10 @@ OPHANDLER( retr )
}
OPHANDLER( rl_a ) { burn_cycles(1); m_a = (m_a << 1) | (m_a >> 7); }
-OPHANDLER( rlc_a ) { burn_cycles(1); uint8_t newc = m_a & C_FLAG; m_a = (m_a << 1) | (m_psw >> 7); m_psw = (m_psw & ~C_FLAG) | newc; }
+OPHANDLER( rlc_a ) { burn_cycles(1); u8 newc = m_a & C_FLAG; m_a = (m_a << 1) | (m_psw >> 7); m_psw = (m_psw & ~C_FLAG) | newc; }
OPHANDLER( rr_a ) { burn_cycles(1); m_a = (m_a >> 1) | (m_a << 7); }
-OPHANDLER( rrc_a ) { burn_cycles(1); uint8_t newc = (m_a << 7) & C_FLAG; m_a = (m_a >> 1) | (m_psw & C_FLAG); m_psw = (m_psw & ~C_FLAG) | newc; }
+OPHANDLER( rrc_a ) { burn_cycles(1); u8 newc = (m_a << 7) & C_FLAG; m_a = (m_a >> 1) | (m_psw & C_FLAG); m_psw = (m_psw & ~C_FLAG) | newc; }
OPHANDLER( sel_mb0 ) { burn_cycles(1); m_a11 = 0x000; }
OPHANDLER( sel_mb1 ) { burn_cycles(1); m_a11 = 0x800; }
@@ -900,19 +937,19 @@ OPHANDLER( strt_cnt )
OPHANDLER( swap_a ) { burn_cycles(1); m_a = (m_a << 4) | (m_a >> 4); }
-OPHANDLER( xch_a_r0 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R0; R0 = tmp; }
-OPHANDLER( xch_a_r1 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R1; R1 = tmp; }
-OPHANDLER( xch_a_r2 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R2; R2 = tmp; }
-OPHANDLER( xch_a_r3 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R3; R3 = tmp; }
-OPHANDLER( xch_a_r4 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R4; R4 = tmp; }
-OPHANDLER( xch_a_r5 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R5; R5 = tmp; }
-OPHANDLER( xch_a_r6 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R6; R6 = tmp; }
-OPHANDLER( xch_a_r7 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = R7; R7 = tmp; }
-OPHANDLER( xch_a_xr0 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = ram_r(R0); ram_w(R0, tmp); }
-OPHANDLER( xch_a_xr1 ) { burn_cycles(1); uint8_t tmp = m_a; m_a = ram_r(R1); ram_w(R1, tmp); }
+OPHANDLER( xch_a_r0 ) { burn_cycles(1); u8 tmp = m_a; m_a = R0; R0 = tmp; }
+OPHANDLER( xch_a_r1 ) { burn_cycles(1); u8 tmp = m_a; m_a = R1; R1 = tmp; }
+OPHANDLER( xch_a_r2 ) { burn_cycles(1); u8 tmp = m_a; m_a = R2; R2 = tmp; }
+OPHANDLER( xch_a_r3 ) { burn_cycles(1); u8 tmp = m_a; m_a = R3; R3 = tmp; }
+OPHANDLER( xch_a_r4 ) { burn_cycles(1); u8 tmp = m_a; m_a = R4; R4 = tmp; }
+OPHANDLER( xch_a_r5 ) { burn_cycles(1); u8 tmp = m_a; m_a = R5; R5 = tmp; }
+OPHANDLER( xch_a_r6 ) { burn_cycles(1); u8 tmp = m_a; m_a = R6; R6 = tmp; }
+OPHANDLER( xch_a_r7 ) { burn_cycles(1); u8 tmp = m_a; m_a = R7; R7 = tmp; }
+OPHANDLER( xch_a_xr0 ) { burn_cycles(1); u8 tmp = m_a; m_a = ram_r(R0); ram_w(R0, tmp); }
+OPHANDLER( xch_a_xr1 ) { burn_cycles(1); u8 tmp = m_a; m_a = ram_r(R1); ram_w(R1, tmp); }
-OPHANDLER( xchd_a_xr0 ) { burn_cycles(1); uint8_t oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); }
-OPHANDLER( xchd_a_xr1 ) { burn_cycles(1); uint8_t oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); }
+OPHANDLER( xchd_a_xr0 ) { burn_cycles(1); u8 oldram = ram_r(R0); ram_w(R0, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); }
+OPHANDLER( xchd_a_xr1 ) { burn_cycles(1); u8 oldram = ram_r(R1); ram_w(R1, (oldram & 0xf0) | (m_a & 0x0f)); m_a = (m_a & 0xf0) | (oldram & 0x0f); }
OPHANDLER( xrl_a_r0 ) { burn_cycles(1); m_a ^= R0; }
OPHANDLER( xrl_a_r1 ) { burn_cycles(1); m_a ^= R1; }
@@ -928,161 +965,161 @@ OPHANDLER( xrl_a_n ) { burn_cycles(2); m_a ^= argument_fetch(); }
-/***************************************************************************
+/*******************************************************************************
OPCODE TABLES
-***************************************************************************/
+*******************************************************************************/
#define OP(_a) &mcs48_cpu_device::_a
const mcs48_cpu_device::mcs48_ophandler mcs48_cpu_device::s_mcs48_opcodes[256] =
{
- OP(nop), OP(illegal), OP(outl_bus_a),OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
+ OP(nop), OP(illegal), OP(outl_bus_a),OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
OP(ins_a_bus), OP(in_a_p1), OP(in_a_p2), OP(illegal), OP(movd_a_p4), OP(movd_a_p5), OP(movd_a_p6), OP(movd_a_p7),
- OP(inc_xr0), OP(inc_xr1), OP(jb_0), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
+ OP(inc_xr0), OP(inc_xr1), OP(jb_0), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
OP(inc_r0), OP(inc_r1), OP(inc_r2), OP(inc_r3), OP(inc_r4), OP(inc_r5), OP(inc_r6), OP(inc_r7),
- OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
+ OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
OP(xch_a_r0), OP(xch_a_r1), OP(xch_a_r2), OP(xch_a_r3), OP(xch_a_r4), OP(xch_a_r5), OP(xch_a_r6), OP(xch_a_r7),
- OP(xchd_a_xr0), OP(xchd_a_xr1), OP(jb_1), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
+ OP(xchd_a_xr0), OP(xchd_a_xr1), OP(jb_1), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
OP(illegal), OP(outl_p1_a), OP(outl_p2_a), OP(illegal), OP(movd_p4_a), OP(movd_p5_a), OP(movd_p6_a), OP(movd_p7_a),
- OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
+ OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
OP(orl_a_r0), OP(orl_a_r1), OP(orl_a_r2), OP(orl_a_r3), OP(orl_a_r4), OP(orl_a_r5), OP(orl_a_r6), OP(orl_a_r7),
- OP(anl_a_xr0), OP(anl_a_xr1), OP(jb_2), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
+ OP(anl_a_xr0), OP(anl_a_xr1), OP(jb_2), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
OP(anl_a_r0), OP(anl_a_r1), OP(anl_a_r2), OP(anl_a_r3), OP(anl_a_r4), OP(anl_a_r5), OP(anl_a_r6), OP(anl_a_r7),
- OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
+ OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
OP(add_a_r0), OP(add_a_r1), OP(add_a_r2), OP(add_a_r3), OP(add_a_r4), OP(add_a_r5), OP(add_a_r6), OP(add_a_r7),
- OP(adc_a_xr0), OP(adc_a_xr1), OP(jb_3), OP(illegal), OP(call_3), OP(ent0_clk), OP(jf1), OP(rr_a), // 70
+ OP(adc_a_xr0), OP(adc_a_xr1), OP(jb_3), OP(illegal), OP(call_3), OP(ent0_clk), OP(jf1), OP(rr_a), // 70
OP(adc_a_r0), OP(adc_a_r1), OP(adc_a_r2), OP(adc_a_r3), OP(adc_a_r4), OP(adc_a_r5), OP(adc_a_r6), OP(adc_a_r7),
- OP(movx_a_xr0), OP(movx_a_xr1), OP(illegal), OP(ret), OP(jmp_4), OP(clr_f0), OP(jni), OP(illegal), // 80
+ OP(movx_a_xr0), OP(movx_a_xr1), OP(illegal), OP(ret), OP(jmp_4), OP(clr_f0), OP(jni), OP(illegal), // 80
OP(orl_bus_n), OP(orl_p1_n), OP(orl_p2_n), OP(illegal), OP(orld_p4_a), OP(orld_p5_a), OP(orld_p6_a), OP(orld_p7_a),
- OP(movx_xr0_a), OP(movx_xr1_a), OP(jb_4), OP(retr), OP(call_4), OP(cpl_f0), OP(jnz), OP(clr_c), // 90
+ OP(movx_xr0_a), OP(movx_xr1_a), OP(jb_4), OP(retr), OP(call_4), OP(cpl_f0), OP(jnz), OP(clr_c), // 90
OP(anl_bus_n), OP(anl_p1_n), OP(anl_p2_n), OP(illegal), OP(anld_p4_a), OP(anld_p5_a), OP(anld_p6_a), OP(anld_p7_a),
- OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(clr_f1), OP(illegal), OP(cpl_c), // A0
+ OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(clr_f1), OP(illegal), OP(cpl_c), // A0
OP(mov_r0_a), OP(mov_r1_a), OP(mov_r2_a), OP(mov_r3_a), OP(mov_r4_a), OP(mov_r5_a), OP(mov_r6_a), OP(mov_r7_a),
- OP(mov_xr0_n), OP(mov_xr1_n), OP(jb_5), OP(jmpp_xa), OP(call_5), OP(cpl_f1), OP(jf0), OP(illegal), // B0
+ OP(mov_xr0_n), OP(mov_xr1_n), OP(jb_5), OP(jmpp_xa), OP(call_5), OP(cpl_f1), OP(jf0), OP(illegal), // B0
OP(mov_r0_n), OP(mov_r1_n), OP(mov_r2_n), OP(mov_r3_n), OP(mov_r4_n), OP(mov_r5_n), OP(mov_r6_n), OP(mov_r7_n),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(sel_rb0), OP(jz), OP(mov_a_psw), // C0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(sel_rb0), OP(jz), OP(mov_a_psw), // C0
OP(dec_r0), OP(dec_r1), OP(dec_r2), OP(dec_r3), OP(dec_r4), OP(dec_r5), OP(dec_r6), OP(dec_r7),
- OP(xrl_a_xr0), OP(xrl_a_xr1), OP(jb_6), OP(xrl_a_n), OP(call_6), OP(sel_rb1), OP(illegal), OP(mov_psw_a), // D0
+ OP(xrl_a_xr0), OP(xrl_a_xr1), OP(jb_6), OP(xrl_a_n), OP(call_6), OP(sel_rb1), OP(illegal), OP(mov_psw_a), // D0
OP(xrl_a_r0), OP(xrl_a_r1), OP(xrl_a_r2), OP(xrl_a_r3), OP(xrl_a_r4), OP(xrl_a_r5), OP(xrl_a_r6), OP(xrl_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(movp3_a_xa),OP(jmp_7), OP(sel_mb0), OP(jnc), OP(rl_a), // E0
+ OP(illegal), OP(illegal), OP(illegal), OP(movp3_a_xa),OP(jmp_7), OP(sel_mb0), OP(jnc), OP(rl_a), // E0
OP(djnz_r0), OP(djnz_r1), OP(djnz_r2), OP(djnz_r3), OP(djnz_r4), OP(djnz_r5), OP(djnz_r6), OP(djnz_r7),
- OP(mov_a_xr0), OP(mov_a_xr1), OP(jb_7), OP(illegal), OP(call_7), OP(sel_mb1), OP(jc), OP(rlc_a), // F0
+ OP(mov_a_xr0), OP(mov_a_xr1), OP(jb_7), OP(illegal), OP(call_7), OP(sel_mb1), OP(jc), OP(rlc_a), // F0
OP(mov_a_r0), OP(mov_a_r1), OP(mov_a_r2), OP(mov_a_r3), OP(mov_a_r4), OP(mov_a_r5), OP(mov_a_r6), OP(mov_a_r7)
};
const mcs48_cpu_device::mcs48_ophandler mcs48_cpu_device::s_upi41_opcodes[256] =
{
- OP(nop), OP(illegal), OP(out_dbb_a), OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
+ OP(nop), OP(illegal), OP(out_dbb_a), OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
OP(illegal), OP(in_a_p1), OP(in_a_p2), OP(illegal), OP(movd_a_p4), OP(movd_a_p5), OP(movd_a_p6), OP(movd_a_p7),
- OP(inc_xr0), OP(inc_xr1), OP(jb_0), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
+ OP(inc_xr0), OP(inc_xr1), OP(jb_0), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
OP(inc_r0), OP(inc_r1), OP(inc_r2), OP(inc_r3), OP(inc_r4), OP(inc_r5), OP(inc_r6), OP(inc_r7),
- OP(xch_a_xr0), OP(xch_a_xr1), OP(in_a_dbb), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
+ OP(xch_a_xr0), OP(xch_a_xr1), OP(in_a_dbb), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
OP(xch_a_r0), OP(xch_a_r1), OP(xch_a_r2), OP(xch_a_r3), OP(xch_a_r4), OP(xch_a_r5), OP(xch_a_r6), OP(xch_a_r7),
- OP(xchd_a_xr0), OP(xchd_a_xr1), OP(jb_1), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
+ OP(xchd_a_xr0), OP(xchd_a_xr1), OP(jb_1), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
OP(illegal), OP(outl_p1_a), OP(outl_p2_a), OP(illegal), OP(movd_p4_a), OP(movd_p5_a), OP(movd_p6_a), OP(movd_p7_a),
- OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
+ OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
OP(orl_a_r0), OP(orl_a_r1), OP(orl_a_r2), OP(orl_a_r3), OP(orl_a_r4), OP(orl_a_r5), OP(orl_a_r6), OP(orl_a_r7),
- OP(anl_a_xr0), OP(anl_a_xr1), OP(jb_2), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
+ OP(anl_a_xr0), OP(anl_a_xr1), OP(jb_2), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
OP(anl_a_r0), OP(anl_a_r1), OP(anl_a_r2), OP(anl_a_r3), OP(anl_a_r4), OP(anl_a_r5), OP(anl_a_r6), OP(anl_a_r7),
- OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
+ OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
OP(add_a_r0), OP(add_a_r1), OP(add_a_r2), OP(add_a_r3), OP(add_a_r4), OP(add_a_r5), OP(add_a_r6), OP(add_a_r7),
- OP(adc_a_xr0), OP(adc_a_xr1), OP(jb_3), OP(illegal), OP(call_3), OP(illegal), OP(jf1), OP(rr_a), // 70
+ OP(adc_a_xr0), OP(adc_a_xr1), OP(jb_3), OP(illegal), OP(call_3), OP(illegal), OP(jf1), OP(rr_a), // 70
OP(adc_a_r0), OP(adc_a_r1), OP(adc_a_r2), OP(adc_a_r3), OP(adc_a_r4), OP(adc_a_r5), OP(adc_a_r6), OP(adc_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(clr_f0), OP(jobf), OP(illegal), // 80
+ OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(clr_f0), OP(jobf), OP(illegal), // 80
OP(illegal), OP(orl_p1_n), OP(orl_p2_n), OP(illegal), OP(orld_p4_a), OP(orld_p5_a), OP(orld_p6_a), OP(orld_p7_a),
- OP(mov_sts_a), OP(illegal), OP(jb_4), OP(retr), OP(call_4), OP(cpl_f0), OP(jnz), OP(clr_c), // 90
+ OP(mov_sts_a), OP(illegal), OP(jb_4), OP(retr), OP(call_4), OP(cpl_f0), OP(jnz), OP(clr_c), // 90
OP(illegal), OP(anl_p1_n), OP(anl_p2_n), OP(illegal), OP(anld_p4_a), OP(anld_p5_a), OP(anld_p6_a), OP(anld_p7_a),
- OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(clr_f1), OP(illegal), OP(cpl_c), // A0
+ OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(clr_f1), OP(illegal), OP(cpl_c), // A0
OP(mov_r0_a), OP(mov_r1_a), OP(mov_r2_a), OP(mov_r3_a), OP(mov_r4_a), OP(mov_r5_a), OP(mov_r6_a), OP(mov_r7_a),
- OP(mov_xr0_n), OP(mov_xr1_n), OP(jb_5), OP(jmpp_xa), OP(call_5), OP(cpl_f1), OP(jf0), OP(illegal), // B0
+ OP(mov_xr0_n), OP(mov_xr1_n), OP(jb_5), OP(jmpp_xa), OP(call_5), OP(cpl_f1), OP(jf0), OP(illegal), // B0
OP(mov_r0_n), OP(mov_r1_n), OP(mov_r2_n), OP(mov_r3_n), OP(mov_r4_n), OP(mov_r5_n), OP(mov_r6_n), OP(mov_r7_n),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(sel_rb0), OP(jz), OP(mov_a_psw), // C0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(sel_rb0), OP(jz), OP(mov_a_psw), // C0
OP(dec_r0), OP(dec_r1), OP(dec_r2), OP(dec_r3), OP(dec_r4), OP(dec_r5), OP(dec_r6), OP(dec_r7),
- OP(xrl_a_xr0), OP(xrl_a_xr1), OP(jb_6), OP(xrl_a_n), OP(call_6), OP(sel_rb1), OP(jnibf), OP(mov_psw_a), // D0
+ OP(xrl_a_xr0), OP(xrl_a_xr1), OP(jb_6), OP(xrl_a_n), OP(call_6), OP(sel_rb1), OP(jnibf), OP(mov_psw_a), // D0
OP(xrl_a_r0), OP(xrl_a_r1), OP(xrl_a_r2), OP(xrl_a_r3), OP(xrl_a_r4), OP(xrl_a_r5), OP(xrl_a_r6), OP(xrl_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(movp3_a_xa),OP(jmp_7), OP(en_dma), OP(jnc), OP(rl_a), // E0
+ OP(illegal), OP(illegal), OP(illegal), OP(movp3_a_xa),OP(jmp_7), OP(en_dma), OP(jnc), OP(rl_a), // E0
OP(djnz_r0), OP(djnz_r1), OP(djnz_r2), OP(djnz_r3), OP(djnz_r4), OP(djnz_r5), OP(djnz_r6), OP(djnz_r7),
- OP(mov_a_xr0), OP(mov_a_xr1), OP(jb_7), OP(illegal), OP(call_7), OP(en_flags), OP(jc), OP(rlc_a), // F0
+ OP(mov_a_xr0), OP(mov_a_xr1), OP(jb_7), OP(illegal), OP(call_7), OP(en_flags), OP(jc), OP(rlc_a), // F0
OP(mov_a_r0), OP(mov_a_r1), OP(mov_a_r2), OP(mov_a_r3), OP(mov_a_r4), OP(mov_a_r5), OP(mov_a_r6), OP(mov_a_r7)
};
const mcs48_cpu_device::mcs48_ophandler mcs48_cpu_device::s_i8021_opcodes[256] =
{
- OP(nop), OP(illegal), OP(illegal), OP(add_a_n), OP(jmp_0), OP(illegal), OP(illegal), OP(dec_a), // 00
+ OP(nop), OP(illegal), OP(illegal), OP(add_a_n), OP(jmp_0), OP(illegal), OP(illegal), OP(dec_a), // 00
OP(in_a_p0), OP(in_a_p1), OP(in_a_p2), OP(illegal), OP(movd_a_p4), OP(movd_a_p5), OP(movd_a_p6), OP(movd_a_p7),
- OP(inc_xr0), OP(inc_xr1), OP(illegal), OP(adc_a_n), OP(call_0), OP(illegal), OP(jtf), OP(inc_a), // 10
+ OP(inc_xr0), OP(inc_xr1), OP(illegal), OP(adc_a_n), OP(call_0), OP(illegal), OP(jtf), OP(inc_a), // 10
OP(inc_r0), OP(inc_r1), OP(inc_r2), OP(inc_r3), OP(inc_r4), OP(inc_r5), OP(inc_r6), OP(inc_r7),
- OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(illegal), OP(illegal), OP(clr_a), // 20
+ OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(illegal), OP(illegal), OP(clr_a), // 20
OP(xch_a_r0), OP(xch_a_r1), OP(xch_a_r2), OP(xch_a_r3), OP(xch_a_r4), OP(xch_a_r5), OP(xch_a_r6), OP(xch_a_r7),
- OP(xchd_a_xr0), OP(xchd_a_xr1), OP(illegal), OP(illegal), OP(call_1), OP(illegal), OP(illegal), OP(cpl_a), // 30
+ OP(xchd_a_xr0), OP(xchd_a_xr1), OP(illegal), OP(illegal), OP(call_1), OP(illegal), OP(illegal), OP(cpl_a), // 30
OP(illegal), OP(outl_p1_a), OP(outl_p2_a), OP(illegal), OP(movd_p4_a), OP(movd_p5_a), OP(movd_p6_a), OP(movd_p7_a),
- OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
+ OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
OP(orl_a_r0), OP(orl_a_r1), OP(orl_a_r2), OP(orl_a_r3), OP(orl_a_r4), OP(orl_a_r5), OP(orl_a_r6), OP(orl_a_r7),
- OP(anl_a_xr0), OP(anl_a_xr1), OP(illegal), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
+ OP(anl_a_xr0), OP(anl_a_xr1), OP(illegal), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
OP(anl_a_r0), OP(anl_a_r1), OP(anl_a_r2), OP(anl_a_r3), OP(anl_a_r4), OP(anl_a_r5), OP(anl_a_r6), OP(anl_a_r7),
- OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
+ OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
OP(add_a_r0), OP(add_a_r1), OP(add_a_r2), OP(add_a_r3), OP(add_a_r4), OP(add_a_r5), OP(add_a_r6), OP(add_a_r7),
- OP(adc_a_xr0), OP(adc_a_xr1), OP(illegal), OP(illegal), OP(call_3), OP(illegal), OP(illegal), OP(rr_a), // 70
+ OP(adc_a_xr0), OP(adc_a_xr1), OP(illegal), OP(illegal), OP(call_3), OP(illegal), OP(illegal), OP(rr_a), // 70
OP(adc_a_r0), OP(adc_a_r1), OP(adc_a_r2), OP(adc_a_r3), OP(adc_a_r4), OP(adc_a_r5), OP(adc_a_r6), OP(adc_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(illegal), OP(illegal), OP(illegal), // 80
+ OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(illegal), OP(illegal), OP(illegal), // 80
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(orld_p4_a), OP(orld_p5_a), OP(orld_p6_a), OP(orld_p7_a),
- OP(outl_p0_a), OP(illegal), OP(illegal), OP(illegal), OP(call_4), OP(illegal), OP(jnz), OP(clr_c), // 90
+ OP(outl_p0_a), OP(illegal), OP(illegal), OP(illegal), OP(call_4), OP(illegal), OP(jnz), OP(clr_c), // 90
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(anld_p4_a), OP(anld_p5_a), OP(anld_p6_a), OP(anld_p7_a),
- OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(illegal), OP(illegal), OP(cpl_c), // A0
+ OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(illegal), OP(illegal), OP(cpl_c), // A0
OP(mov_r0_a), OP(mov_r1_a), OP(mov_r2_a), OP(mov_r3_a), OP(mov_r4_a), OP(mov_r5_a), OP(mov_r6_a), OP(mov_r7_a),
- OP(mov_xr0_n), OP(mov_xr1_n), OP(illegal), OP(jmpp_xa), OP(call_5), OP(illegal), OP(illegal), OP(illegal), // B0
+ OP(mov_xr0_n), OP(mov_xr1_n), OP(illegal), OP(jmpp_xa), OP(call_5), OP(illegal), OP(illegal), OP(illegal), // B0
OP(mov_r0_n), OP(mov_r1_n), OP(mov_r2_n), OP(mov_r3_n), OP(mov_r4_n), OP(mov_r5_n), OP(mov_r6_n), OP(mov_r7_n),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(illegal), OP(jz), OP(illegal), // C0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(illegal), OP(jz), OP(illegal), // C0
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal),
- OP(xrl_a_xr0), OP(xrl_a_xr1), OP(illegal), OP(xrl_a_n), OP(call_6), OP(illegal), OP(illegal), OP(illegal), // D0
+ OP(xrl_a_xr0), OP(xrl_a_xr1), OP(illegal), OP(xrl_a_n), OP(call_6), OP(illegal), OP(illegal), OP(illegal), // D0
OP(xrl_a_r0), OP(xrl_a_r1), OP(xrl_a_r2), OP(xrl_a_r3), OP(xrl_a_r4), OP(xrl_a_r5), OP(xrl_a_r6), OP(xrl_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_7), OP(illegal), OP(jnc), OP(rl_a), // E0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_7), OP(illegal), OP(jnc), OP(rl_a), // E0
OP(djnz_r0), OP(djnz_r1), OP(djnz_r2), OP(djnz_r3), OP(djnz_r4), OP(djnz_r5), OP(djnz_r6), OP(djnz_r7),
- OP(mov_a_xr0), OP(mov_a_xr1), OP(illegal), OP(illegal), OP(call_7), OP(illegal), OP(jc), OP(rlc_a), // F0
+ OP(mov_a_xr0), OP(mov_a_xr1), OP(illegal), OP(illegal), OP(call_7), OP(illegal), OP(jc), OP(rlc_a), // F0
OP(mov_a_r0), OP(mov_a_r1), OP(mov_a_r2), OP(mov_a_r3), OP(mov_a_r4), OP(mov_a_r5), OP(mov_a_r6), OP(mov_a_r7)
};
const mcs48_cpu_device::mcs48_ophandler mcs48_cpu_device::s_i8022_opcodes[256] =
{
- OP(nop), OP(illegal), OP(illegal), OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
+ OP(nop), OP(illegal), OP(illegal), OP(add_a_n), OP(jmp_0), OP(en_i), OP(illegal), OP(dec_a), // 00
OP(in_a_p0), OP(in_a_p1), OP(in_a_p2), OP(illegal), OP(movd_a_p4), OP(movd_a_p5), OP(movd_a_p6), OP(movd_a_p7),
- OP(inc_xr0), OP(inc_xr1), OP(illegal), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
+ OP(inc_xr0), OP(inc_xr1), OP(illegal), OP(adc_a_n), OP(call_0), OP(dis_i), OP(jtf), OP(inc_a), // 10
OP(inc_r0), OP(inc_r1), OP(inc_r2), OP(inc_r3), OP(inc_r4), OP(inc_r5), OP(inc_r6), OP(inc_r7),
- OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
+ OP(xch_a_xr0), OP(xch_a_xr1), OP(illegal), OP(mov_a_n), OP(jmp_1), OP(en_tcnti), OP(jnt_0), OP(clr_a), // 20
OP(xch_a_r0), OP(xch_a_r1), OP(xch_a_r2), OP(xch_a_r3), OP(xch_a_r4), OP(xch_a_r5), OP(xch_a_r6), OP(xch_a_r7),
- OP(xchd_a_xr0), OP(xchd_a_xr1), OP(illegal), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
+ OP(xchd_a_xr0), OP(xchd_a_xr1), OP(illegal), OP(illegal), OP(call_1), OP(dis_tcnti), OP(jt_0), OP(cpl_a), // 30
OP(illegal), OP(outl_p1_a), OP(outl_p2_a), OP(illegal), OP(movd_p4_a), OP(movd_p5_a), OP(movd_p6_a), OP(movd_p7_a),
- OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
+ OP(orl_a_xr0), OP(orl_a_xr1), OP(mov_a_t), OP(orl_a_n), OP(jmp_2), OP(strt_cnt), OP(jnt_1), OP(swap_a), // 40
OP(orl_a_r0), OP(orl_a_r1), OP(orl_a_r2), OP(orl_a_r3), OP(orl_a_r4), OP(orl_a_r5), OP(orl_a_r6), OP(orl_a_r7),
- OP(anl_a_xr0), OP(anl_a_xr1), OP(illegal), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
+ OP(anl_a_xr0), OP(anl_a_xr1), OP(illegal), OP(anl_a_n), OP(call_2), OP(strt_t), OP(jt_1), OP(da_a), // 50
OP(anl_a_r0), OP(anl_a_r1), OP(anl_a_r2), OP(anl_a_r3), OP(anl_a_r4), OP(anl_a_r5), OP(anl_a_r6), OP(anl_a_r7),
- OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
+ OP(add_a_xr0), OP(add_a_xr1), OP(mov_t_a), OP(illegal), OP(jmp_3), OP(stop_tcnt), OP(illegal), OP(rrc_a), // 60
OP(add_a_r0), OP(add_a_r1), OP(add_a_r2), OP(add_a_r3), OP(add_a_r4), OP(add_a_r5), OP(add_a_r6), OP(add_a_r7),
- OP(adc_a_xr0), OP(adc_a_xr1), OP(illegal), OP(illegal), OP(call_3), OP(illegal), OP(illegal), OP(rr_a), // 70
+ OP(adc_a_xr0), OP(adc_a_xr1), OP(illegal), OP(illegal), OP(call_3), OP(illegal), OP(illegal), OP(rr_a), // 70
OP(adc_a_r0), OP(adc_a_r1), OP(adc_a_r2), OP(adc_a_r3), OP(adc_a_r4), OP(adc_a_r5), OP(adc_a_r6), OP(adc_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(illegal), OP(illegal), OP(illegal), // 80
+ OP(illegal), OP(illegal), OP(illegal), OP(ret), OP(jmp_4), OP(illegal), OP(illegal), OP(illegal), // 80
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(orld_p4_a), OP(orld_p5_a), OP(orld_p6_a), OP(orld_p7_a),
- OP(outl_p0_a), OP(illegal), OP(illegal), OP(retr), OP(call_4), OP(illegal), OP(jnz), OP(clr_c), // 90
+ OP(outl_p0_a), OP(illegal), OP(illegal), OP(retr), OP(call_4), OP(illegal), OP(jnz), OP(clr_c), // 90
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(anld_p4_a), OP(anld_p5_a), OP(anld_p6_a), OP(anld_p7_a),
- OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(illegal), OP(illegal), OP(cpl_c), // A0
+ OP(mov_xr0_a), OP(mov_xr1_a), OP(illegal), OP(movp_a_xa), OP(jmp_5), OP(illegal), OP(illegal), OP(cpl_c), // A0
OP(mov_r0_a), OP(mov_r1_a), OP(mov_r2_a), OP(mov_r3_a), OP(mov_r4_a), OP(mov_r5_a), OP(mov_r6_a), OP(mov_r7_a),
- OP(mov_xr0_n), OP(mov_xr1_n), OP(illegal), OP(jmpp_xa), OP(call_5), OP(illegal), OP(illegal), OP(illegal), // B0
+ OP(mov_xr0_n), OP(mov_xr1_n), OP(illegal), OP(jmpp_xa), OP(call_5), OP(illegal), OP(illegal), OP(illegal), // B0
OP(mov_r0_n), OP(mov_r1_n), OP(mov_r2_n), OP(mov_r3_n), OP(mov_r4_n), OP(mov_r5_n), OP(mov_r6_n), OP(mov_r7_n),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(illegal), OP(jz), OP(illegal), // C0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_6), OP(illegal), OP(jz), OP(illegal), // C0
OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal),
- OP(xrl_a_xr0), OP(xrl_a_xr1), OP(illegal), OP(xrl_a_n), OP(call_6), OP(illegal), OP(illegal), OP(illegal), // D0
+ OP(xrl_a_xr0), OP(xrl_a_xr1), OP(illegal), OP(xrl_a_n), OP(call_6), OP(illegal), OP(illegal), OP(illegal), // D0
OP(xrl_a_r0), OP(xrl_a_r1), OP(xrl_a_r2), OP(xrl_a_r3), OP(xrl_a_r4), OP(xrl_a_r5), OP(xrl_a_r6), OP(xrl_a_r7),
- OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_7), OP(illegal), OP(jnc), OP(rl_a), // E0
+ OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(jmp_7), OP(illegal), OP(jnc), OP(rl_a), // E0
OP(djnz_r0), OP(djnz_r1), OP(djnz_r2), OP(djnz_r3), OP(djnz_r4), OP(djnz_r5), OP(djnz_r6), OP(djnz_r7),
- OP(mov_a_xr0), OP(mov_a_xr1), OP(illegal), OP(illegal), OP(call_7), OP(illegal), OP(jc), OP(rlc_a), // F0
+ OP(mov_a_xr0), OP(mov_a_xr1), OP(illegal), OP(illegal), OP(call_7), OP(illegal), OP(jc), OP(rlc_a), // F0
OP(mov_a_r0), OP(mov_a_r1), OP(mov_a_r2), OP(mov_a_r3), OP(mov_a_r4), OP(mov_a_r5), OP(mov_a_r6), OP(mov_a_r7)
};
-/***************************************************************************
+/*******************************************************************************
INITIALIZATION/RESET
-***************************************************************************/
+*******************************************************************************/
void mcs48_cpu_device::device_config_complete()
{
@@ -1104,6 +1141,7 @@ void mcs48_cpu_device::device_start()
m_a = 0;
m_psw = 0;
m_f1 = false;
+ m_a11 = 0;
m_p1 = 0;
m_p2 = 0;
m_timer = 0;
@@ -1122,17 +1160,16 @@ void mcs48_cpu_device::device_start()
m_timecount_enabled = 0;
m_flags_enabled = false;
m_dma_enabled = false;
- m_a11 = 0;
-
- // External access line, EA=1: read from external rom, EA=0: read from internal rom
- // FIXME: Current implementation suboptimal
- m_ea = (m_int_rom_size ? 0 : 1);
space(AS_PROGRAM).cache(m_program);
space(AS_DATA).specific(m_data);
- if(m_feature_mask & EXT_BUS_FEATURE)
+ if (m_feature_mask & EXT_BUS_FEATURE)
space(AS_IO).specific(m_io);
+ // default EA pin state
+ m_ea = m_rom_size ? 0 : 1;
+ update_ea();
+
// ensure that regptr is valid before get_info gets called
update_regptr();
@@ -1151,11 +1188,10 @@ void mcs48_cpu_device::device_start()
state_add(MCS48_P1, "P1", m_p1);
state_add(MCS48_P2, "P2", m_p2);
- for (int regnum = 0; regnum < 8; regnum++) {
+ for (int regnum = 0; regnum < 8; regnum++)
state_add(MCS48_R0 + regnum, string_format("R%d", regnum).c_str(), m_rtemp).callimport().callexport();
- }
- if (m_feature_mask & EXT_BUS_FEATURE)
+ if (!(m_feature_mask & I802X_FEATURE))
state_add(MCS48_EA, "EA", m_ea).mask(0x1);
if (m_feature_mask & UPI41_FEATURE)
@@ -1172,6 +1208,7 @@ void mcs48_cpu_device::device_start()
save_item(NAME(m_a));
save_item(NAME(m_psw));
save_item(NAME(m_f1));
+ save_item(NAME(m_a11));
save_item(NAME(m_p1));
save_item(NAME(m_p2));
save_item(NAME(m_ea));
@@ -1193,8 +1230,6 @@ void mcs48_cpu_device::device_start()
save_item(NAME(m_flags_enabled));
save_item(NAME(m_dma_enabled));
- save_item(NAME(m_a11));
-
set_icountptr(m_icount);
}
@@ -1207,12 +1242,7 @@ void mcs48_cpu_device::device_reset()
update_regptr();
m_f1 = false;
m_a11 = 0;
- m_dbbo = 0xff;
- bus_w(0xff);
- m_p1 = 0xff;
- m_p2 = 0xff;
- port_w(1, m_p1);
- port_w(2, m_p2);
+
m_tirq_enabled = false;
m_xirq_enabled = false;
m_timecount_enabled = 0;
@@ -1220,20 +1250,31 @@ void mcs48_cpu_device::device_reset()
m_sts = 0;
m_flags_enabled = false;
m_dma_enabled = false;
- if (!m_t0_clk_func.isnull())
- m_t0_clk_func(0);
// confirmed from interrupt logic description
m_irq_in_progress = false;
m_timer_overflow = false;
m_irq_polled = false;
+
+ // BUS is set to high-impedance (except when EA=1)
+ m_dbbo = 0xff;
+ m_bus_out_cb(0, 0xff, m_ea ? 0xff : 0); // bus_w
+
+ // port 1 and port 2 are set to input mode
+ m_p1 = 0xff;
+ m_p2 = 0xff;
+ port_w(1, m_p1);
+ port_w(2, m_p2);
+
+ if (!m_t0_clk_func.isnull())
+ m_t0_clk_func(0);
}
-/***************************************************************************
+/*******************************************************************************
EXECUTION
-***************************************************************************/
+*******************************************************************************/
/*-------------------------------------------------
check_irqs - check for and process IRQs
@@ -1296,15 +1337,16 @@ void mcs48_cpu_device::burn_cycles(int count)
// if the timer is enabled, accumulate prescaler cycles
if (m_timecount_enabled & TIMER_ENABLED)
{
- uint8_t oldtimer = m_timer;
+ u8 oldtimer = m_timer;
m_prescaler += count;
m_timer += m_prescaler >> 5;
m_prescaler &= 0x1f;
- timerover = (oldtimer != 0 && m_timer == 0);
+ timerover = m_timer < oldtimer;
}
// if the counter is enabled, poll the T1 test input once for each cycle
else if (m_timecount_enabled & COUNTER_ENABLED)
+ {
for ( ; count > 0; count--, m_icount--)
{
m_t1_history = (m_t1_history << 1) | (test_r(1) & 1);
@@ -1314,6 +1356,7 @@ void mcs48_cpu_device::burn_cycles(int count)
timerover = true;
}
}
+ }
// if either source caused a timer overflow, set the flags
if (timerover)
@@ -1359,19 +1402,19 @@ void mcs48_cpu_device::execute_run()
-/***************************************************************************
+/*******************************************************************************
DATA ACCESS HELPERS
-***************************************************************************/
+*******************************************************************************/
/*-------------------------------------------------
upi41_master_r - master CPU data/status
read
-------------------------------------------------*/
-uint8_t upi41_cpu_device::upi41_master_r(offs_t offset)
+u8 upi41_cpu_device::upi41_master_r(offs_t offset)
{
// if just reading the status, return it
- if ((offset & 1) != 0)
+ if (offset & 1)
return (m_sts & 0xf3) | (m_f1 ? 8 : 0) | ((m_psw & F_FLAG) ? 4 : 0);
// if the output buffer was full, it gets cleared now
@@ -1390,7 +1433,7 @@ uint8_t upi41_cpu_device::upi41_master_r(offs_t offset)
write
-------------------------------------------------*/
-TIMER_CALLBACK_MEMBER( upi41_cpu_device::master_callback )
+TIMER_CALLBACK_MEMBER(upi41_cpu_device::master_callback)
{
// data always goes to the input buffer
m_dbbi = param & 0xff;
@@ -1408,15 +1451,15 @@ TIMER_CALLBACK_MEMBER( upi41_cpu_device::master_callback )
m_f1 = a0;
}
-void upi41_cpu_device::upi41_master_w(offs_t offset, uint8_t data)
+void upi41_cpu_device::upi41_master_w(offs_t offset, u8 data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(upi41_cpu_device::master_callback), this), (offset << 8) | data);
}
-/***************************************************************************
+/*******************************************************************************
GENERAL CONTEXT ACCESS
-***************************************************************************/
+*******************************************************************************/
/*-------------------------------------------------
mcs48_import_state - import state from the
@@ -1475,9 +1518,9 @@ void mcs48_cpu_device::state_string_export(const device_state_entry &entry, std:
{
case STATE_GENFLAGS:
str = string_format("%c%c%c %c%c%c%c%c%c%c%c",
- m_irq_state ? 'I':'.',
- m_a11 ? 'M':'.',
- m_f1 ? '1':'.',
+ m_irq_state ? 'I':'.',
+ m_a11 ? 'M':'.',
+ m_f1 ? '1':'.',
m_psw & 0x80 ? 'C':'.',
m_psw & 0x40 ? 'A':'.',
m_psw & 0x20 ? '0':'.',
@@ -1493,7 +1536,7 @@ void mcs48_cpu_device::state_string_export(const device_state_entry &entry, std:
void mcs48_cpu_device::execute_set_input(int inputnum, int state)
{
- switch( inputnum )
+ switch (inputnum)
{
case MCS48_INPUT_IRQ:
m_irq_state = (state != CLEAR_LINE);
@@ -1501,6 +1544,7 @@ void mcs48_cpu_device::execute_set_input(int inputnum, int state)
case MCS48_INPUT_EA:
m_ea = (state != CLEAR_LINE);
+ update_ea();
break;
}
}
diff --git a/src/devices/cpu/mcs48/mcs48.h b/src/devices/cpu/mcs48/mcs48.h
index 3640286a524..72d2d36ef0e 100644
--- a/src/devices/cpu/mcs48/mcs48.h
+++ b/src/devices/cpu/mcs48/mcs48.h
@@ -94,11 +94,10 @@ DECLARE_DEVICE_TYPE(I8742AH, i8742ah_device) // 2k internal UV EPROM, 256 bytes
// Clones
DECLARE_DEVICE_TYPE(MB8884, mb8884_device) // 8035 clone
-DECLARE_DEVICE_TYPE(N7751, n7751_device) // 8048 clone
+DECLARE_DEVICE_TYPE(UPD7751, upd7751_device) // 8048 clone
DECLARE_DEVICE_TYPE(M58715, m58715_device) // 8049 clone
-
class mcs48_cpu_device : public cpu_device
{
public:
@@ -124,15 +123,8 @@ public:
// PROG line to 8243 expander
auto prog_out_cb() { return m_prog_out_cb.bind(); }
- uint8_t p1_r() { return m_p1; }
- uint8_t p2_r() { return m_p2; }
-
- void data_6bit(address_map &map);
- void data_7bit(address_map &map);
- void data_8bit(address_map &map);
- void program_10bit(address_map &map);
- void program_11bit(address_map &map);
- void program_12bit(address_map &map);
+ u8 p1_r() { return m_p1; }
+ u8 p2_r() { return m_p2; }
template <typename... T> void set_t0_clk_cb(T &&... args) { m_t0_clk_func.set(std::forward<T>(args)...); }
@@ -143,20 +135,19 @@ protected:
typedef void (mcs48_cpu_device::*mcs48_ophandler)();
// construction/destruction
- mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rom_size, int ram_size, uint8_t feature_mask, const mcs48_ophandler *opcode_table);
+ mcs48_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int rom_size, int ram_size, u8 feature_mask, const mcs48_ophandler *opcode_table);
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual void device_config_complete() override;
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override { update_regptr(); }
// device_execute_interface overrides
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 15 - 1) / 15; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 15); }
- virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_max_cycles() const noexcept override { return 2+2; } // opcode+irq
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 15 - 1) / 15; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 15); }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 2+2; } // opcode+irq
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -171,10 +162,10 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-protected:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
+ memory_view m_rom_view;
devcb_read8::array<2> m_port_in_cb;
devcb_write8::array<2> m_port_out_cb;
@@ -185,49 +176,49 @@ protected:
clock_update_delegate m_t0_clk_func;
devcb_write_line m_prog_out_cb;
- uint16_t m_prevpc; // 16-bit previous program counter
- uint16_t m_pc; // 16-bit program counter
-
- uint8_t m_a; // 8-bit accumulator
- uint8_t * m_regptr; // pointer to r0-r7
- uint8_t m_psw; // 8-bit PSW
- bool m_f1; // F1 flag (F0 is in PSW)
- uint8_t m_p1; // 8-bit latched port 1
- uint8_t m_p2; // 8-bit latched port 2
- uint8_t m_ea; // 1-bit latched ea input
- uint8_t m_timer; // 8-bit timer
- uint8_t m_prescaler; // 5-bit timer prescaler
- uint8_t m_t1_history; // 8-bit history of the T1 input
- uint8_t m_sts; // 4-bit status register + OBF/IBF flags (UPI-41 only)
- uint8_t m_dbbi; // 8-bit input data buffer (UPI-41 only)
- uint8_t m_dbbo; // 8-bit output data buffer (UPI-41 only)
-
- bool m_irq_state; // true if the IRQ line is active
- bool m_irq_polled; // true if last instruction was JNI (and not taken)
- bool m_irq_in_progress; // true if an IRQ is in progress
- bool m_timer_overflow; // true on a timer overflow; cleared by taking interrupt
- bool m_timer_flag; // true on a timer overflow; cleared on JTF
- bool m_tirq_enabled; // true if the timer IRQ is enabled
- bool m_xirq_enabled; // true if the external IRQ is enabled
- uint8_t m_timecount_enabled; // bitmask of timer/counter enabled
- bool m_flags_enabled; // true if I/O flags have been enabled (UPI-41 only)
- bool m_dma_enabled; // true if DMA has been enabled (UPI-41 only)
-
- uint16_t m_a11; // A11 value, either 0x000 or 0x800
-
- int m_icount;
+ u16 m_prevpc; // 16-bit previous program counter
+ u16 m_pc; // 16-bit program counter
+
+ u8 m_a; // 8-bit accumulator
+ u8 *m_regptr; // pointer to r0-r7
+ u8 m_psw; // 8-bit PSW
+ bool m_f1; // F1 flag (F0 is in PSW)
+ u16 m_a11; // A11 value, either 0x000 or 0x800
+ u8 m_p1; // 8-bit latched port 1
+ u8 m_p2; // 8-bit latched port 2
+ u8 m_ea; // 1-bit latched ea input
+ u8 m_timer; // 8-bit timer
+ u8 m_prescaler; // 5-bit timer prescaler
+ u8 m_t1_history; // 8-bit history of the T1 input
+ u8 m_sts; // 4-bit status register + OBF/IBF flags (UPI-41 only)
+ u8 m_dbbi; // 8-bit input data buffer (UPI-41 only)
+ u8 m_dbbo; // 8-bit output data buffer (UPI-41 only)
+
+ bool m_irq_state; // true if the IRQ line is active
+ bool m_irq_polled; // true if last instruction was JNI (and not taken)
+ bool m_irq_in_progress; // true if an IRQ is in progress
+ bool m_timer_overflow; // true on a timer overflow; cleared by taking interrupt
+ bool m_timer_flag; // true on a timer overflow; cleared on JTF
+ bool m_tirq_enabled; // true if the timer IRQ is enabled
+ bool m_xirq_enabled; // true if the external IRQ is enabled
+ u8 m_timecount_enabled; // bitmask of timer/counter enabled
+ bool m_flags_enabled; // true if I/O flags have been enabled (UPI-41 only)
+ bool m_dma_enabled; // true if DMA has been enabled (UPI-41 only)
+
+ int m_icount;
// Memory spaces
memory_access<12, 0, 0, ENDIANNESS_LITTLE>::cache m_program;
memory_access<8, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
memory_access<8, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
- required_shared_ptr<uint8_t> m_dataptr;
+ required_shared_ptr<u8> m_dataptr;
- uint8_t m_feature_mask; // processor feature flags
- uint16_t m_int_rom_size; // internal rom size
+ u8 m_feature_mask; // processor feature flags
+ u16 m_rom_size; // internal rom size
+ u16 m_ram_size; // internal ram size
- uint8_t m_rtemp; // temporary for import/export
+ u8 m_rtemp; // temporary for import/export
static const mcs48_ophandler s_mcs48_opcodes[256];
static const mcs48_ophandler s_upi41_opcodes[256];
@@ -235,36 +226,40 @@ protected:
static const mcs48_ophandler s_i8022_opcodes[256];
const mcs48_ophandler *const m_opcode_table;
+ void program_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
+
// ROM is mapped to AS_PROGRAM
- uint8_t program_r(offs_t a) { return m_program.read_byte(a); }
+ u8 program_r(offs_t a) { return m_program.read_byte(a); }
// RAM is mapped to AS_DATA
- uint8_t ram_r(offs_t a) { return m_data.read_byte(a); }
- void ram_w(offs_t a, uint8_t v) { m_data.write_byte(a, v); }
+ u8 ram_r(offs_t a) { return m_data.read_byte(a); }
+ void ram_w(offs_t a, u8 v) { m_data.write_byte(a, v); }
// ports are mapped to AS_IO and callbacks
- uint8_t ext_r(offs_t a) { return m_io.read_byte(a); }
- void ext_w(offs_t a, uint8_t v) { m_io.write_byte(a, v); }
- uint8_t port_r(offs_t a) { return m_port_in_cb[a - 1](); }
- void port_w(offs_t a, uint8_t v) { m_port_out_cb[a - 1](v); }
- int test_r(offs_t a) { return m_test_in_cb[a](); }
- uint8_t bus_r() { return m_bus_in_cb(); }
- void bus_w(uint8_t v) { m_bus_out_cb(v); }
- void prog_w(int v) { m_prog_out_cb(v); }
-
- uint8_t opcode_fetch();
- uint8_t argument_fetch();
+ u8 ext_r(offs_t a) { return m_io.read_byte(a); }
+ void ext_w(offs_t a, u8 v) { m_io.write_byte(a, v); }
+ u8 port_r(offs_t a) { return m_port_in_cb[a - 1](); }
+ void port_w(offs_t a, u8 v) { m_port_out_cb[a - 1](v); }
+ int test_r(offs_t a) { return m_test_in_cb[a](); }
+ u8 bus_r() { return m_bus_in_cb(); }
+ void bus_w(u8 v) { m_bus_out_cb(v); }
+ void prog_w(int v) { m_prog_out_cb(v); }
+
+ u8 opcode_fetch();
+ u8 argument_fetch();
void update_regptr();
+ void update_ea();
void push_pc_psw();
void pull_pc_psw();
void pull_pc();
- void execute_add(uint8_t dat);
- void execute_addc(uint8_t dat);
- void execute_jmp(uint16_t address);
- void execute_call(uint16_t address);
+ void execute_add(u8 dat);
+ void execute_addc(u8 dat);
+ void execute_jmp(u16 address);
+ void execute_call(u16 address);
void execute_jcc(bool result);
- uint8_t p2_mask();
- void expander_operation(expander_op operation, uint8_t port);
+ u8 p2_mask();
+ void expander_operation(expander_op operation, u8 port);
void check_irqs();
void burn_cycles(int count);
@@ -518,108 +513,108 @@ public:
auto p0_out_cb() { return bus_out_cb(); }
// construction/destruction
- i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8021_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device_execute_interface overrides
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 30 - 1) / 30; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 30); }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 30 - 1) / 30; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 30); }
};
class i8022_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8022_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
// device_execute_interface overrides
- virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 30 - 1) / 30; }
- virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 30); }
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 30 - 1) / 30; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 30); }
};
class i8035_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8035_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8048_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8048_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8648_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8648_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8748_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8748_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8039_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8039_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8049_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8049_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8749_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8749_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8040_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8050_device : public mcs48_cpu_device
{
public:
// construction/destruction
- i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8050_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class mb8884_device : public mcs48_cpu_device
{
public:
// construction/destruction
- mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mb8884_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
-class n7751_device : public mcs48_cpu_device
+class upd7751_device : public mcs48_cpu_device
{
public:
// construction/destruction
- n7751_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ upd7751_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class m58715_device : public mcs48_cpu_device
{
public:
// construction/destruction
- m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ m58715_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
@@ -627,70 +622,70 @@ class upi41_cpu_device : public mcs48_cpu_device
{
public:
// functions for talking to the input/output buffers on the UPI41-class chips
- uint8_t upi41_master_r(offs_t offset);
- void upi41_master_w(offs_t offset, uint8_t data);
+ u8 upi41_master_r(offs_t offset);
+ void upi41_master_w(offs_t offset, u8 data);
protected:
// construction/destruction
- upi41_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int rom_size, int ram_size);
+ upi41_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int rom_size, int ram_size);
- TIMER_CALLBACK_MEMBER( master_callback );
+ TIMER_CALLBACK_MEMBER(master_callback);
};
class i8041a_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8041a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8041a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8741a_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8741a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8741a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8041ah_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8041ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8041ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8741ah_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8741ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8741ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8042_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8742_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8742_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8042ah_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8042ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8042ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
class i8742ah_device : public upi41_cpu_device
{
public:
// construction/destruction
- i8742ah_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ i8742ah_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
diff --git a/src/devices/cpu/mcs48/mcs48dsm.cpp b/src/devices/cpu/mcs48/mcs48dsm.cpp
index 3434be06940..d35b18943a0 100644
--- a/src/devices/cpu/mcs48/mcs48dsm.cpp
+++ b/src/devices/cpu/mcs48/mcs48dsm.cpp
@@ -2,8 +2,6 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- mcs48dsm.c
-
Simple MCS-48/UPI-41 disassembler.
Written by Aaron Giles
diff --git a/src/devices/cpu/mcs48/mcs48dsm.h b/src/devices/cpu/mcs48/mcs48dsm.h
index 38d6c899183..3144796ad1a 100644
--- a/src/devices/cpu/mcs48/mcs48dsm.h
+++ b/src/devices/cpu/mcs48/mcs48dsm.h
@@ -2,16 +2,13 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- mcs48dsm.c
-
Simple MCS-48/UPI-41 disassembler.
Written by Aaron Giles
***************************************************************************/
-
-#ifndef MAME_CPU_MCS48_MCS48DASM_H
-#define MAME_CPU_MCS48_MCS48DASM_H
+#ifndef MAME_CPU_MCS48_MCS48DSM_H
+#define MAME_CPU_MCS48_MCS48DSM_H
#pragma once
@@ -31,4 +28,4 @@ private:
bool m_i802x;
};
-#endif
+#endif // MAME_CPU_MCS48_MCS48DSM_H
diff --git a/src/devices/cpu/mcs51/mcs51.cpp b/src/devices/cpu/mcs51/mcs51.cpp
index 45ae5a5851b..5c0e9034f6d 100644
--- a/src/devices/cpu/mcs51/mcs51.cpp
+++ b/src/devices/cpu/mcs51/mcs51.cpp
@@ -2,100 +2,77 @@
// copyright-holders:Steve Ellenoff, Manuel Abadia, Couriersud
/*****************************************************************************
*
- * i8051.c
- * Portable MCS-51 Family Emulator
+ * Portable MCS-51 Family Emulator
+ * Copyright Steve Ellenoff
*
- * Chips in the family:
- * 8051 Product Line (8031,8051,8751)
- * 8052 Product Line (8032,8052,8752)
- * 8054 Product Line (8054)
- * 8058 Product Line (8058)
- * 80552 Product Line (80552, 83552, 87552)
- * 80562 Product Line (80562, 83562, 87562)
+ * Chips in the family:
+ * 8051 Product Line (8031,8051,8751)
+ * 8052 Product Line (8032,8052,8752)
+ * 8054 Product Line (8054)
+ * 8058 Product Line (8058)
+ * 80552 Product Line (80552, 83552, 87552)
+ * 80562 Product Line (80562, 83562, 87562)
*
- * Copyright Steve Ellenoff, all rights reserved.
- *
- * This work is based on:
- * #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
- * #2) 8051 simulator by Travis Marlatte
- * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
+ * This work is based on:
+ * #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
+ * #2) 8051 simulator by Travis Marlatte
+ * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
*
*****************************************************************************/
/*****************************************************************************
- * DS5002FP emulator by Manuel Abadia
- *
- * October 2008, couriersud: Merged back in mcs51
*
- * What has been added?
- * - Extra SFRs
- * - Bytewide Bus Support
- * - Memory Partition and Memory Range
- * - Bootstrap Configuration
- * - Power Fail Interrupt
- * - Timed Access
- * - Stop Mode
- * - Idle Mode
+ * DS5002FP emulator by Manuel Abadia
*
- * What is not implemented?
- * - Peripherals and Reprogrammable Peripheral Controller
- * - CRC-16
- * - Watchdog timer
+ * The main features of the DS5002FP are:
+ * - 100% code-compatible with 8051
+ * - Directly addresses 64kB program/64kB data memory
+ * - Nonvolatile memory control circuitry
+ * - 10-year data retention in the absence of power
+ * - In-system reprogramming via serial port
+ * - Dedicated memory bus, preserving four 8-bit ports for general purpose I/O
+ * - Power-fail reset
+ * - Early warning power-fail interrupt
+ * - Watchdog timer
+ * - Accesses up to 128kB on the bytewide bus
+ * - Decodes memory for 32kB x 8 or 128kB x 8 SRAMs
+ * - Four additional decoded peripheral-chip enables
+ * - CRC hardware for checking memory validity
+ * - Optionally emulates an 8042-style slave interface
+ * - Memory encryption using an 80-bit encryption key
+ * - Automatic random generation of encryption keys
+ * - Self-destruct input for tamper protection
+ * - Optional top-coating prevents microprobe
*
- * The main features of the DS5002FP are:
- * - 100% code-compatible with 8051
- * - Directly addresses 64kB program/64kB data memory
- * - Nonvolatile memory control circuitry
- * - 10-year data retention in the absence of power
- * - In-system reprogramming via serial port
- * - Dedicated memory bus, preserving four 8-bit ports for general purpose I/O
- * - Power-fail reset
- * - Early warning power-fail interrupt
- * - Watchdog timer
- * - Accesses up to 128kB on the bytewide bus
- * - Decodes memory for 32kB x 8 or 128kB x 8 SRAMs
- * - Four additional decoded peripheral-chip enables
- * - CRC hardware for checking memory validity
- * - Optionally emulates an 8042-style slave interface
- * - Memory encryption using an 80-bit encryption key
- * - Automatic random generation of encryption keys
- * - Self-destruct input for tamper protection
- * - Optional top-coating prevents microprobe
+ * TODO:
+ * - Peripherals and Reprogrammable Peripheral Controller
+ * - CRC-16
+ * - Watchdog timer
*
*****************************************************************************/
/******************************************************************************
- * Notes:
- *
- * The term cycles is used here to really refer to clock oscilations, because 1 machine cycle
- * actually takes 12 oscilations.
- *
- * Read/Write/Modify Instruction -
- * Data is read from the Port Latch (not the Port Pin!), possibly modified, and
- * written back to (the pin? and) the latch!
*
- * The following all perform this on a port address..
- * (anl, orl, xrl, jbc, cpl, inc, dec, djnz, mov px.y,c, clr px.y, setb px.y)
+ * Notes:
*
- * Serial UART emulation is not really accurate, but faked enough to work as far as i can tell
+ * The term cycles is used here to really refer to clock oscilations, because 1 machine cycle
+ * actually takes 12 oscilations.
*
- * August 27,2003: Currently support for only 8031/8051/8751 chips (ie 128 RAM)
- * October 14,2003: Added initial support for the 8752 (ie 256 RAM)
- * October 22,2003: Full support for the 8752 (ie 256 RAM)
- * July 28,2004: Fixed MOVX command and added External Ram Paging Support
- * July 31,2004: Added Serial Mode 0 Support & Fixed Interrupt Flags for Serial Port
+ * Read/Write/Modify Instruction -
+ * Data is read from the Port Latch (not the Port Pin!), possibly modified, and
+ * written back to (the pin? and) the latch!
*
- * October, 2008, Couriersud - Major rewrite
+ * The following all perform this on a port address..
+ * (anl, orl, xrl, jbc, cpl, inc, dec, djnz, mov px.y,c, clr px.y, setb px.y)
*
*****************************************************************************/
/* TODO: Various
- * - EA pin - defined by architecture, must implement:
- * 1 means external access, bypassing internal ROM
- * - T0 output clock ?
+ * - EA pin - defined by architecture, must implement:
+ * 1 means external access, bypassing internal ROM
+ * - T0 output clock ?
*
* - Implement 80C52 extended serial capabilities
- * - Fix serial communication - This is a big hack (but working) right now.
* - Implement 83C751 in sslam.c
* - Fix cardline.c
* most likely due to different behaviour of I/O pins. The boards
@@ -104,36 +81,14 @@
* a 0 written to it's latch. At least cardline expects a 1 here.
* - ADC support for 80552/80562 (controls analog inputs for Arctic Thunder)
*
- * Done: (Couriersud)
- * - Merged DS5002FP
- * - Disassembler now uses type specific memory names
- * - Merged DS5002FP disasm
- * - added 83C751 memory names to disassembler
- * - Pointer-ified
- * - Implemented cmos features
- * - Implemented 80C52 interrupt handling
- * - Fix segas18.c (segaic16.c) memory handling.
- * - Fix sslam.c
- * - Fix limenko.c videopkr.c : Issue with core allocation of ram (duplicate savestate)
- * - Handle internal ram better (debugger visible)
- * - Fixed port reading
- * - Rewrote Macros for better readability
- * - Fixed and rewrote Interrupt handling
- * - Now returns INTERNAL_DIVIDER, adjusted cycle counts
- * - Remove unnecessary and duplicated code
- * - Remove unnecessary functions
- * - Rewrite to have sfr-registers stored in int_ram.
- * - Debugger may now watch sfr-registers as well.
- * - implemented interrupt callbacks (HOLD_LINE now supported)
- * - Runtime switch for processor type - remove ifdefs
- * - internal memory maps for internal rom versions (internal ram now displayed in debugger)
- * - more timer cleanups from manual
*/
#include "emu.h"
#include "mcs51.h"
#include "mcs51dasm.h"
+#include <tuple>
+
#define LOG_RX (1U << 1)
#define LOG_TX (1U << 2)
@@ -148,11 +103,11 @@
enum
{
- FEATURE_NONE = 0x00,
- FEATURE_I8052 = 0x01,
- FEATURE_CMOS = 0x02,
- FEATURE_I80C52 = 0x04,
- FEATURE_DS5002FP = 0x08
+ FEATURE_NONE = 0x00,
+ FEATURE_I8052 = 0x01,
+ FEATURE_CMOS = 0x02,
+ FEATURE_I80C52 = 0x04,
+ FEATURE_DS5002FP = 0x08
};
/* Internal address in SFR of registers */
@@ -206,7 +161,6 @@ enum
ADDR_RNR = 0xcf,
ADDR_RPCTL = 0xd8,
ADDR_RPS = 0xda
-
};
/* PC vectors */
@@ -266,6 +220,9 @@ DEFINE_DEVICE_TYPE(DS80C320, ds80c320_device, "ds80c320", "Dallas DS80C320 HSM")
DEFINE_DEVICE_TYPE(SAB80C535, sab80c535_device, "sab80c535", "Siemens SAB80C535")
DEFINE_DEVICE_TYPE(I8344, i8344_device, "i8344", "Intel 8344AH RUPI-44")
DEFINE_DEVICE_TYPE(I8744, i8744_device, "i8744", "Intel 8744H RUPI-44")
+DEFINE_DEVICE_TYPE(P80C552, p80c552_device, "p80c552", "Philips P80C552")
+DEFINE_DEVICE_TYPE(P87C552, p87c552_device, "p87c552", "Philips P87C552")
+DEFINE_DEVICE_TYPE(P80C562, p80c562_device, "p80c562", "Philips P80C562")
DEFINE_DEVICE_TYPE(DS5002FP, ds5002fp_device, "ds5002fp", "Dallas DS5002FP")
@@ -291,11 +248,12 @@ mcs51_cpu_device::mcs51_cpu_device(const machine_config &mconfig, device_type ty
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, program_map)
, m_data_config("data", ENDIANNESS_LITTLE, 8, 9, 0, data_map)
- , m_io_config("io", ENDIANNESS_LITTLE, 8, (features & FEATURE_DS5002FP) ? 17 : 16, 0)
+ , m_io_config("io", ENDIANNESS_LITTLE, 8, (features & FEATURE_DS5002FP) ? 18 : 16, 0)
, m_pc(0)
, m_features(features)
+ , m_inst_cycles(0)
, m_rom_size(program_width > 0 ? 1 << program_width : 0)
- , m_ram_mask( (data_width == 8) ? 0xFF : 0x7F )
+ , m_ram_mask((data_width == 8) ? 0xff : 0x7f)
, m_num_interrupts(5)
, m_sfr_ram(*this, "sfr_ram")
, m_scratchpad(*this, "scratchpad")
@@ -452,6 +410,26 @@ i8744_device::i8744_device(const machine_config &mconfig, const char *tag, devic
{
}
+p80c562_device::p80c562_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features)
+ : i80c51_device(mconfig, type, tag, owner, clock, program_width, data_width, features)
+{
+}
+
+p80c562_device::p80c562_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : p80c562_device(mconfig, P80C562, tag, owner, clock, 0, 8)
+{
+}
+
+p80c552_device::p80c552_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : p80c562_device(mconfig, P80C552, tag, owner, clock, 0, 8)
+{
+}
+
+p87c552_device::p87c552_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : p80c562_device(mconfig, P87C552, tag, owner, clock, 12, 8)
+{
+}
+
/* program width field is set to 0 because technically the SRAM isn't internal */
ds5002fp_device::ds5002fp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: mcs51_cpu_device(mconfig, DS5002FP, tag, owner, clock, 0, 7, FEATURE_DS5002FP | FEATURE_CMOS)
@@ -611,55 +589,55 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
/* Macros for Setting Flags */
#define SET_X(R, v) do { R = (v);} while (0)
-#define SET_CY(n) SET_PSW((PSW & 0x7f) | (n<<7)) //Carry Flag
-#define SET_AC(n) SET_PSW((PSW & 0xbf) | (n<<6)) //Aux.Carry Flag
-#define SET_FO(n) SET_PSW((PSW & 0xdf) | (n<<5)) //User Flag
-#define SET_RS(n) SET_PSW((PSW & 0xe7) | (n<<3)) //R Bank Select
-#define SET_OV(n) SET_PSW((PSW & 0xfb) | (n<<2)) //Overflow Flag
-#define SET_P(n) SET_PSW((PSW & 0xfe) | (n<<0)) //Parity Flag
-
-#define SET_BIT(R, n, v) do { R = (R & ~(1<<(n))) | ((v) << (n));} while (0)
-#define GET_BIT(R, n) (((R)>>(n)) & 0x01)
-
-#define SET_EA(n) SET_BIT(IE, 7, n) //Global Interrupt Enable/Disable
-#define SET_ES(n) SET_BIT(IE, 4, v) //Serial Interrupt Enable/Disable
-#define SET_ET1(n) SET_BIT(IE, 3, n) //Timer 1 Interrupt Enable/Disable
-#define SET_EX1(n) SET_BIT(IE, 2, n) //External Int 1 Interrupt Enable/Disable
-#define SET_ET0(n) SET_BIT(IE, 1, n) //Timer 0 Interrupt Enable/Disable
-#define SET_EX0(n) SET_BIT(IE, 0, n) //External Int 0 Interrupt Enable/Disable
+#define SET_CY(n) SET_PSW((PSW & 0x7f) | ((n) << 7)) //Carry Flag
+#define SET_AC(n) SET_PSW((PSW & 0xbf) | ((n) << 6)) //Aux.Carry Flag
+#define SET_FO(n) SET_PSW((PSW & 0xdf) | ((n) << 5)) //User Flag
+#define SET_RS(n) SET_PSW((PSW & 0xe7) | ((n) << 3)) //R Bank Select
+#define SET_OV(n) SET_PSW((PSW & 0xfb) | ((n) << 2)) //Overflow Flag
+#define SET_P(n) SET_PSW((PSW & 0xfe) | ((n) << 0)) //Parity Flag
+
+#define SET_BIT(R, n, v) do { R = (R & ~(1 << (n))) | ((v) << (n)); } while (0)
+#define GET_BIT(R, n) (((R) >> (n)) & 0x01)
+
+#define SET_EA(n) SET_BIT(IE, 7, n) //Global Interrupt Enable/Disable
+#define SET_ES(n) SET_BIT(IE, 4, v) //Serial Interrupt Enable/Disable
+#define SET_ET1(n) SET_BIT(IE, 3, n) //Timer 1 Interrupt Enable/Disable
+#define SET_EX1(n) SET_BIT(IE, 2, n) //External Int 1 Interrupt Enable/Disable
+#define SET_ET0(n) SET_BIT(IE, 1, n) //Timer 0 Interrupt Enable/Disable
+#define SET_EX0(n) SET_BIT(IE, 0, n) //External Int 0 Interrupt Enable/Disable
/* 8052 Only flags */
-#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
+#define SET_ET2(n) SET_BIT(IE, 5, n) //Timer 2 Interrupt Enable/Disable
/* 8052 Only flags */
-#define SET_PT2(n) SET_BIT(IP, 5, n); //Set Timer 2 Priority Level
+#define SET_PT2(n) SET_BIT(IP, 5, n) //Set Timer 2 Priority Level
-#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
-#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
-#define SET_PX1(n) SET_BIT(IP, 2, n) //Set External Int 1 Priority Level
-#define SET_PT0(n) SET_BIT(IP, 1, n) //Set Timer 0 Priority Level
-#define SET_PX0(n) SET_BIT(IP, 0, n) //Set External Int 0 Priority Level
+#define SET_PS0(n) SET_BIT(IP, 4, n) //Set Serial Priority Level
+#define SET_PT1(n) SET_BIT(IP, 3, n) //Set Timer 1 Priority Level
+#define SET_PX1(n) SET_BIT(IP, 2, n) //Set External Int 1 Priority Level
+#define SET_PT0(n) SET_BIT(IP, 1, n) //Set Timer 0 Priority Level
+#define SET_PX0(n) SET_BIT(IP, 0, n) //Set External Int 0 Priority Level
-#define SET_TF1(n) SET_BIT(TCON, 7, n) //Indicated Timer 1 Overflow Int Triggered
+#define SET_TF1(n) SET_BIT(TCON, 7, n) //Indicated Timer 1 Overflow Int Triggered
#define SET_TR1(n) SET_BIT(TCON, 6, n) //IndicateS Timer 1 is running
-#define SET_TF0(n) SET_BIT(TCON, 5, n) //Indicated Timer 0 Overflow Int Triggered
+#define SET_TF0(n) SET_BIT(TCON, 5, n) //Indicated Timer 0 Overflow Int Triggered
#define SET_TR0(n) SET_BIT(TCON, 4, n) //IndicateS Timer 0 is running
#define SET_IE1(n) SET_BIT(TCON, 3, n) //Indicated External Int 1 Triggered
#define SET_IT1(n) SET_BIT(TCON, 2, n) //Indicates how External Int 1 is Triggered
#define SET_IE0(n) SET_BIT(TCON, 1, n) //Indicated External Int 0 Triggered
#define SET_IT0(n) SET_BIT(TCON, 0, n) //Indicates how External Int 0 is Triggered
-#define SET_SM0(n) SET_BIT(SCON, 7, n) //Sets Serial Port Mode
+#define SET_SM0(n) SET_BIT(SCON, 7, n) //Sets Serial Port Mode
#define SET_SM1(n) SET_BIT(SCON, 6, n) //Sets Serial Port Mode
-#define SET_SM2(n) SET_BIT(SCON, 5, n) //Sets Serial Port Mode (Multiprocesser mode)
+#define SET_SM2(n) SET_BIT(SCON, 5, n) //Sets Serial Port Mode (Multiprocesser mode)
#define SET_REN(n) SET_BIT(SCON, 4, n) //Sets Serial Port Receive Enable
#define SET_TB8(n) SET_BIT(SCON, 3, n) //Transmit 8th Bit
#define SET_RB8(n) SET_BIT(SCON, 2, n) //Receive 8th Bit
#define SET_TI(n) SET_BIT(SCON, 1, n) //Indicates Transmit Interrupt Occurred
#define SET_RI(n) SET_BIT(SCON, 0, n) //Indicates Receive Interrupt Occurred
-#define SET_GATE1(n) SET_BIT(TMOD, 7, n) //Timer 1 Gate Mode
+#define SET_GATE1(n) SET_BIT(TMOD, 7, n) //Timer 1 Gate Mode
#define SET_CT1(n) SET_BIT(TMOD, 6, n) //Timer 1 Counter Mode
-#define SET_M1_1(n) SET_BIT(TMOD, 5, n) //Timer 1 Timer Mode Bit 1
+#define SET_M1_1(n) SET_BIT(TMOD, 5, n) //Timer 1 Timer Mode Bit 1
#define SET_M1_0(n) SET_BIT(TMOD, 4, n) //Timer 1 Timer Mode Bit 0
#define SET_GATE0(n) SET_BIT(TMOD, 3, n) //Timer 0 Gate Mode
#define SET_CT0(n) SET_BIT(TMOD, 2, n) //Timer 0 Counter Mode
@@ -669,14 +647,14 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
/* 8052 Only flags - T2CON Flags */
-#define SET_TF2(n) SET_BIT(T2CON, 7, n) //Indicated Timer 2 Overflow Int Triggered
-#define SET_EXF2(n) SET_BIT(T2CON, 6, n) //Indicates Timer 2 External Flag
-#define SET_RCLK(n) SET_BIT(T2CON, 5, n) //Receive Clock
-#define SET_TCLK(n) SET_BIT(T2CON, 4, n) //Transmit Clock
-#define SET_EXEN2(n) SET_BIT(T2CON, 3, n) //Timer 2 External Interrupt Enable
-#define SET_TR2(n) SET_BIT(T2CON, 2, n) //Indicates Timer 2 is running
-#define SET_CT2(n) SET_BIT(T2CON, 1, n) //Sets Timer 2 Counter/Timer Mode
-#define SET_CP(n) SET_BIT(T2CON, 0, n) //Sets Timer 2 Capture/Reload Mode
+#define SET_TF2(n) SET_BIT(T2CON, 7, n) //Indicated Timer 2 Overflow Int Triggered
+#define SET_EXF2(n) SET_BIT(T2CON, 6, n) //Indicates Timer 2 External Flag
+#define SET_RCLK(n) SET_BIT(T2CON, 5, n) //Receive Clock
+#define SET_TCLK(n) SET_BIT(T2CON, 4, n) //Transmit Clock
+#define SET_EXEN2(n) SET_BIT(T2CON, 3, n) //Timer 2 External Interrupt Enable
+#define SET_TR2(n) SET_BIT(T2CON, 2, n) //Indicates Timer 2 is running
+#define SET_CT2(n) SET_BIT(T2CON, 1, n) //Sets Timer 2 Counter/Timer Mode
+#define SET_CP(n) SET_BIT(T2CON, 0, n) //Sets Timer 2 Capture/Reload Mode
#define SET_GF1(n) SET_BIT(PCON, 3, n)
#define SET_GF0(n) SET_BIT(PCON, 2, n)
@@ -743,7 +721,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define GET_GF1 GET_BIT(PCON, 3)
#define GET_GF0 GET_BIT(PCON, 2)
#define GET_PD GET_BIT(PCON, 1)
-#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) /* PD takes precedence! */
+#define GET_IDL (GET_BIT(PCON, 0) & ~(GET_PD)) // PD takes precedence!
/* 8052 Only flags */
#define GET_TF2 GET_BIT(T2CON, 7)
@@ -776,7 +754,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define GET_SL GET_BIT(MCON, 0)
/* RPCTL Flags - DS5002FP */
-#define GET_RNR GET_BIT(RPCTL, 7) /* Bit 6 ?? */
+#define GET_RNR GET_BIT(RPCTL, 7) // Bit 6 ??
#define GET_EXBS GET_BIT(RPCTL, 5)
#define GET_AE GET_BIT(RPCTL, 4)
#define GET_IBI GET_BIT(RPCTL, 3)
@@ -789,7 +767,7 @@ void mcs51_cpu_device::iram_iwrite(offs_t a, uint8_t d) { if (a <= m_ram_mask) m
#define DO_ADD_FLAGS(a,d,c) do_add_flags(a, d, c)
#define DO_SUB_FLAGS(a,d,c) do_sub_flags(a, d, c)
-#define SET_PARITY() do {m_recalc_parity |= 1;} while (0)
+#define SET_PARITY() do { m_recalc_parity |= 1; } while (0)
#define PUSH_PC() push_pc()
#define POP_PC() pop_pc()
@@ -846,12 +824,18 @@ uint8_t mcs51_cpu_device::r_psw() { return SFR_A(ADDR_PSW); }
In order to simplify memory mapping to the data address bus, the following address map is assumed for partitioned mode:
+ PES = 0:
0x00000-0x0ffff -> data memory on the expanded bus
0x10000-0x1ffff -> data memory on the byte-wide bus
+ PES = 1:
+ 0x20000-0x2ffff -> memory-mapped peripherals on the byte-wide bus
For non-partitioned mode the following memory map is assumed:
- 0x0000-0xffff -> data memory (the bus used to access it does not matter)
+ PES = 0:
+ 0x00000-0x0ffff -> data memory (the bus used to access it does not matter)
+ PES = 1:
+ 0x20000-0x2ffff -> memory-mapped peripherals on the byte-wide bus
*/
offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
@@ -859,18 +843,23 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
/* Memory Range (RG1 and RG0 @ MCON and RPCTL registers) */
static const uint16_t ds5002fp_ranges[4] = { 0x1fff, 0x3fff, 0x7fff, 0xffff };
/* Memory Partition Table (RG1 & RG0 @ MCON & RPCTL registers) */
- static const uint32_t ds5002fp_partitions[16] = {
+ static const uint32_t ds5002fp_partitions[16] =
+ {
0x0000, 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000,
- 0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000 };
+ 0x8000, 0x9000, 0xa000, 0xb000, 0xc000, 0xd000, 0xe000, 0x10000
+ };
/* if partition mode is set, adjust offset based on the bus */
if (m_features & FEATURE_DS5002FP)
{
- if (!GET_PM) {
- if (!GET_EXBS) {
- if ((offset >= ds5002fp_partitions[GET_PA]) && (offset <= ds5002fp_ranges[m_ds5002fp.range])) {
+ if (GET_PES)
+ offset += 0x20000;
+ else if (!GET_PM)
+ {
+ if (!GET_EXBS)
+ {
+ if ((offset >= ds5002fp_partitions[GET_PA]) && (offset <= ds5002fp_ranges[m_ds5002fp.range]))
offset += 0x10000;
- }
}
}
}
@@ -886,12 +875,12 @@ offs_t mcs51_cpu_device::external_ram_iaddr(offs_t offset, offs_t mem_mask)
uint8_t mcs51_cpu_device::iram_read(size_t offset)
{
- return (((offset) < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
+ return ((offset < 0x80) ? m_data.read_byte(offset) : sfr_read(offset));
}
void mcs51_cpu_device::iram_write(size_t offset, uint8_t data)
{
- if ((offset) < 0x80)
+ if (offset < 0x80)
m_data.write_byte(offset, data);
else
sfr_write(offset, data);
@@ -900,19 +889,19 @@ void mcs51_cpu_device::iram_write(size_t offset, uint8_t data)
/*Push the current PC to the stack*/
void mcs51_cpu_device::push_pc()
{
- uint8_t tmpSP = SP+1; //Grab and Increment Stack Pointer
- IRAM_IW(tmpSP, (PC & 0xff)); //Store low byte of PC to Internal Ram (Use IRAM_IW to store stack above 128 bytes)
- tmpSP++; // ""
+ uint8_t tmpSP = SP + 1; //Grab and Increment Stack Pointer
+ IRAM_IW(tmpSP, (PC & 0xff)); //Store low byte of PC to Internal Ram (Use IRAM_IW to store stack above 128 bytes)
+ tmpSP++; // ""
SP = tmpSP; // ""
- IRAM_IW(tmpSP, ( (PC & 0xff00) >> 8)); //Store hi byte of PC to next address in Internal Ram (Use IRAM_IW to store stack above 128 bytes)
+ IRAM_IW(tmpSP, ((PC & 0xff00) >> 8)); //Store hi byte of PC to next address in Internal Ram (Use IRAM_IW to store stack above 128 bytes)
}
/*Pop the current PC off the stack and into the pc*/
void mcs51_cpu_device::pop_pc()
{
- uint8_t tmpSP = SP; //Grab Stack Pointer
- PC = (IRAM_IR(tmpSP--) & 0xff) << 8; //Store hi byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
- PC = PC | IRAM_IR(tmpSP--); //Store lo byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
+ uint8_t tmpSP = SP; //Grab Stack Pointer
+ PC = (IRAM_IR(tmpSP--) & 0xff) << 8; //Store hi byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
+ PC = PC | IRAM_IR(tmpSP--); //Store lo byte to PC (must use IRAM_IR to access stack pointing above 128 bytes)
SP = tmpSP; //Decrement Stack Pointer
}
@@ -921,10 +910,10 @@ void mcs51_cpu_device::set_parity()
{
//This flag will be set when the accumulator contains an odd # of bits set..
uint8_t p = 0;
- int i;
uint8_t a = ACC;
- for (i=0; i<8; i++) { //Test for each of the 8 bits in the ACC!
+ for (int i = 0; i < 8; i++) //Test for each of the 8 bits in the ACC!
+ {
p ^= (a & 1);
a = (a >> 1);
}
@@ -934,8 +923,8 @@ void mcs51_cpu_device::set_parity()
uint8_t mcs51_cpu_device::bit_address_r(uint8_t offset)
{
- uint8_t word;
- uint8_t mask;
+ uint8_t word;
+ uint8_t mask;
int bit_pos;
int distance; /* distance between bit addressable words */
/* 1 for normal bits, 8 for sfr bit addresses */
@@ -943,17 +932,19 @@ uint8_t mcs51_cpu_device::bit_address_r(uint8_t offset)
m_last_bit = offset;
//User defined bit addresses 0x20-0x2f (values are 0x0-0x7f)
- if (offset < 0x80) {
+ if (offset < 0x80)
+ {
distance = 1;
- word = ( (offset & 0x78) >> 3) * distance + 0x20;
+ word = ((offset & 0x78) >> 3) * distance + 0x20;
bit_pos = offset & 0x7;
mask = (0x1 << bit_pos);
return((IRAM_R(word) & mask) >> bit_pos);
}
//SFR bit addressable registers
- else {
+ else
+ {
distance = 8;
- word = ( (offset & 0x78) >> 3) * distance + 0x80;
+ word = ((offset & 0x78) >> 3) * distance + 0x80;
bit_pos = offset & 0x7;
mask = (0x1 << bit_pos);
return ((IRAM_R(word) & mask) >> bit_pos);
@@ -964,13 +955,14 @@ uint8_t mcs51_cpu_device::bit_address_r(uint8_t offset)
void mcs51_cpu_device::bit_address_w(uint8_t offset, uint8_t bit)
{
int word;
- uint8_t mask;
+ uint8_t mask;
int bit_pos;
- uint8_t result;
+ uint8_t result;
int distance;
/* User defined bit addresses 0x20-0x2f (values are 0x0-0x7f) */
- if (offset < 0x80) {
+ if (offset < 0x80)
+ {
distance = 1;
word = ((offset & 0x78) >> 3) * distance + 0x20;
bit_pos = offset & 0x7;
@@ -981,7 +973,8 @@ void mcs51_cpu_device::bit_address_w(uint8_t offset, uint8_t bit)
IRAM_W(word, result);
}
/* SFR bit addressable registers */
- else {
+ else
+ {
distance = 8;
word = ((offset & 0x78) >> 3) * distance + 0x80;
bit_pos = offset & 0x7;
@@ -995,47 +988,52 @@ void mcs51_cpu_device::bit_address_w(uint8_t offset, uint8_t bit)
void mcs51_cpu_device::do_add_flags(uint8_t a, uint8_t data, uint8_t c)
{
- uint16_t result = a+data+c;
- int16_t result1 = (int8_t)a+(int8_t)data+c;
+ uint16_t result = a + data + c;
+ int16_t result1 = (int8_t)a + (int8_t)data + c;
SET_CY((result & 0x100) >> 8);
- result = (a&0x0f)+(data&0x0f)+c;
+ result = (a & 0x0f) + (data & 0x0f) + c;
SET_AC((result & 0x10) >> 4);
SET_OV(result1 < -128 || result1 > 127);
}
void mcs51_cpu_device::do_sub_flags(uint8_t a, uint8_t data, uint8_t c)
{
- uint16_t result = a-(data+c);
- int16_t result1 = (int8_t)a-(int8_t)(data+c);
+ uint16_t result = a - (data + c);
+ int16_t result1 = (int8_t)a - (int8_t)(data + c);
SET_CY((result & 0x100) >> 8);
- result = (a&0x0f)-((data&0x0f)+c);
+ result = (a & 0x0f) - ((data & 0x0f) + c);
SET_AC((result & 0x10) >> 4);
SET_OV((result1 < -128 || result1 > 127));
}
void mcs51_cpu_device::transmit(int state)
{
- if (BIT(SFR_A(ADDR_P3), 1) != state)
+ if (m_uart.txd != state)
{
- if (state)
- SFR_A(ADDR_P3) |= 1U << 1;
- else
- SFR_A(ADDR_P3) &= ~(1U << 1);
+ m_uart.txd = state;
- m_port_out_cb[3](SFR_A(ADDR_P3));
+ // P3.1 = SFR(P3) & TxD
+ if (BIT(SFR_A(ADDR_P3), 1))
+ {
+ if (state)
+ m_port_out_cb[3](SFR_A(ADDR_P3));
+ else
+ m_port_out_cb[3](SFR_A(ADDR_P3) & ~0x02);
+ }
}
}
void mcs51_cpu_device::transmit_receive(int source)
{
- int mode = (GET_SM0<<1) | GET_SM1;
+ int mode = (GET_SM0 << 1) | GET_SM1;
if (source == 1) /* timer1 */
m_uart.smod_div = (m_uart.smod_div + 1) & (1-GET_SMOD);
- switch(mode) {
+ switch (mode)
+ {
// 8 bit shifter - rate set by clock freq / 12
case 0:
if (source == 0)
@@ -1235,7 +1233,7 @@ void mcs51_cpu_device::transmit_receive(int source)
void mcs51_cpu_device::update_timer_t0(int cycles)
{
- int mode = (GET_M0_1<<1) | GET_M0_0;
+ int mode = (GET_M0_1 << 1) | GET_M0_0;
uint32_t count;
if (GET_TR0)
@@ -1252,52 +1250,53 @@ void mcs51_cpu_device::update_timer_t0(int cycles)
if (GET_GATE0 && !GET_IE0)
delta = 0;
- switch(mode) {
- case 0: /* 13 Bit Timer Mode */
- count = ((TH0<<5) | ( TL0 & 0x1f ) );
+ switch (mode)
+ {
+ case 0: /* 13 Bit Timer Mode */
+ count = ((TH0 << 5) | (TL0 & 0x1f));
count += delta;
- if ( count & 0xffffe000 ) /* Check for overflow */
+ if (count & 0xffffe000) /* Check for overflow */
SET_TF0(1);
- TH0 = (count>>5) & 0xff;
- TL0 = count & 0x1f ;
+ TH0 = (count >> 5) & 0xff;
+ TL0 = count & 0x1f;
break;
- case 1: /* 16 Bit Timer Mode */
- count = ((TH0<<8) | TL0);
+ case 1: /* 16 Bit Timer Mode */
+ count = ((TH0 << 8) | TL0);
count += delta;
- if ( count & 0xffff0000 ) /* Check for overflow */
+ if (count & 0xffff0000) /* Check for overflow */
SET_TF0(1);
- TH0 = (count>>8) & 0xff;
+ TH0 = (count >> 8) & 0xff;
TL0 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
- count = ((uint32_t) TL0) + delta;
- if ( count & 0xffffff00 ) /* Check for overflow */
+ case 2: /* 8 Bit Autoreload */
+ count = ((uint32_t)TL0) + delta;
+ if (count & 0xffffff00) /* Check for overflow */
{
SET_TF0(1);
- count += TH0; /* Reload timer */
+ count += TH0; /* Reload timer */
}
/* Update new values of the counter */
TL0 = count & 0xff;
break;
case 3:
/* Split Timer 1 */
- count = ((uint32_t) TL0) + delta;
- if ( count & 0xffffff00 ) /* Check for overflow */
+ count = ((uint32_t)TL0) + delta;
+ if (count & 0xffffff00) /* Check for overflow */
SET_TF0(1);
- TL0 = count & 0xff; /* Update new values of the counter */
+ TL0 = count & 0xff; /* Update new values of the counter */
break;
}
}
if (GET_TR1)
{
- switch(mode)
+ switch (mode)
{
case 3:
/* Split Timer 2 */
- count = ((uint32_t) TH0) + cycles; /* No gate control or counting !*/
- if ( count & 0xffffff00 ) /* Check for overflow */
+ count = ((uint32_t)TH0) + cycles; /* No gate control or counting !*/
+ if (count & 0xffffff00) /* Check for overflow */
SET_TF1(1);
- TH0 = count & 0xff; /* Update new values of the counter */
+ TH0 = count & 0xff; /* Update new values of the counter */
break;
}
}
@@ -1321,8 +1320,8 @@ switching it into or out of Mode 3 or it can be assigned as a baud rate generato
void mcs51_cpu_device::update_timer_t1(int cycles)
{
- uint8_t mode = (GET_M1_1<<1) | GET_M1_0;
- uint8_t mode_0 = (GET_M0_1<<1) | GET_M0_0;
+ uint8_t mode = (GET_M1_1 << 1) | GET_M1_0;
+ uint8_t mode_0 = (GET_M0_1 << 1) | GET_M0_0;
uint32_t count;
if (mode_0 != 3)
@@ -1342,28 +1341,27 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
if (GET_GATE1 && !GET_IE1)
delta = 0;
- switch(mode) {
- case 0: /* 13 Bit Timer Mode */
- count = ((TH1<<5) | ( TL1 & 0x1f ) );
+ switch (mode)
+ {
+ case 0: /* 13 Bit Timer Mode */
+ count = ((TH1 << 5) | (TL1 & 0x1f));
count += delta;
overflow = count & 0xffffe000; /* Check for overflow */
- TH1 = (count>>5) & 0xff;
- TL1 = count & 0x1f ;
+ TH1 = (count >> 5) & 0xff;
+ TL1 = count & 0x1f;
break;
- case 1: /* 16 Bit Timer Mode */
- count = ((TH1<<8) | TL1);
+ case 1: /* 16 Bit Timer Mode */
+ count = ((TH1 << 8) | TL1);
count += delta;
overflow = count & 0xffff0000; /* Check for overflow */
- TH1 = (count>>8) & 0xff;
+ TH1 = (count >> 8) & 0xff;
TL1 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
- count = ((uint32_t) TL1) + delta;
+ case 2: /* 8 Bit Autoreload */
+ count = ((uint32_t)TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
- if ( overflow )
- {
- count += TH1; /* Reload timer */
- }
+ if (overflow)
+ count += TH1; /* Reload timer */
/* Update new values of the counter */
TL1 = count & 0xff;
break;
@@ -1386,30 +1384,29 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
delta = cycles;
/* taken, reset */
m_t1_cnt = 0;
- switch(mode) {
- case 0: /* 13 Bit Timer Mode */
- count = ((TH1<<5) | ( TL1 & 0x1f ) );
+ switch (mode)
+ {
+ case 0: /* 13 Bit Timer Mode */
+ count = ((TH1 << 5) | (TL1 & 0x1f));
count += delta;
overflow = count & 0xffffe000; /* Check for overflow */
- TH1 = (count>>5) & 0xff;
- TL1 = count & 0x1f ;
+ TH1 = (count >> 5) & 0xff;
+ TL1 = count & 0x1f;
break;
- case 1: /* 16 Bit Timer Mode */
- count = ((TH1<<8) | TL1);
+ case 1: /* 16 Bit Timer Mode */
+ count = ((TH1 << 8) | TL1);
count += delta;
overflow = count & 0xffff0000; /* Check for overflow */
- TH1 = (count>>8) & 0xff;
+ TH1 = (count >> 8) & 0xff;
TL1 = count & 0xff;
break;
- case 2: /* 8 Bit Autoreload */
- count = ((uint32_t) TL1) + delta;
+ case 2: /* 8 Bit Autoreload */
+ count = ((uint32_t)TL1) + delta;
overflow = count & 0xffffff00; /* Check for overflow */
- if ( overflow )
- {
- count += TH1; /* Reload timer */
- }
+ if (overflow)
+ count += TH1; /* Reload timer */
/* Update new values of the counter */
- TL1 = count & 0xff;
+ TL1 = count & 0xff;
break;
case 3:
/* do nothing */
@@ -1425,36 +1422,37 @@ void mcs51_cpu_device::update_timer_t1(int cycles)
void mcs51_cpu_device::update_timer_t2(int cycles)
{
/* Update Timer 2 */
- if(GET_TR2) {
+ if (GET_TR2)
+ {
int mode = ((GET_TCLK | GET_RCLK) << 1) | GET_CP;
int delta = GET_CT2 ? m_t2_cnt : (mode & 2) ? cycles * (12/2) : cycles;
- uint32_t count = ((TH2<<8) | TL2) + delta;
+ uint32_t count = ((TH2 << 8) | TL2) + delta;
m_t2_cnt = 0;
switch (mode)
{
case 0: /* 16 Bit Auto Reload */
- if ( count & 0xffff0000 )
+ if (count & 0xffff0000)
{
SET_TF2(1);
- count += ((RCAP2H<<8) | RCAP2L);
+ count += ((RCAP2H << 8) | RCAP2L);
}
- else if (GET_EXEN2 && m_t2ex_cnt>0)
+ else if (GET_EXEN2 && m_t2ex_cnt > 0)
{
- count += ((RCAP2H<<8) | RCAP2L);
+ count += ((RCAP2H << 8) | RCAP2L);
m_t2ex_cnt = 0;
}
- TH2 = (count>>8) & 0xff;
- TL2 = count & 0xff;
+ TH2 = (count >> 8) & 0xff;
+ TL2 = count & 0xff;
break;
case 1: /* 16 Bit Capture */
- if ( count & 0xffff0000 )
+ if (count & 0xffff0000)
SET_TF2(1);
- TH2 = (count>>8) & 0xff;
- TL2 = count & 0xff;
+ TH2 = (count >> 8) & 0xff;
+ TL2 = count & 0xff;
- if (GET_EXEN2 && m_t2ex_cnt>0)
+ if (GET_EXEN2 && m_t2ex_cnt > 0)
{
RCAP2H = TH2;
RCAP2L = TL2;
@@ -1463,44 +1461,23 @@ void mcs51_cpu_device::update_timer_t2(int cycles)
break;
case 2:
case 3: /* Baud rate */
- if ( count & 0xffff0000 )
+ if (count & 0xffff0000)
{
- count += ((RCAP2H<<8) | RCAP2L);
+ count += ((RCAP2H << 8) | RCAP2L);
transmit_receive(2);
}
- TH2 = (count>>8) & 0xff;
- TL2 = count & 0xff;
+ TH2 = (count >> 8) & 0xff;
+ TL2 = count & 0xff;
break;
}
}
}
-void mcs51_cpu_device::update_timers(int cycles)
-{
- while (cycles--)
- {
- update_timer_t0(1);
- update_timer_t1(1);
-
- if (m_features & FEATURE_I8052)
- {
- update_timer_t2(1);
- }
- }
-}
-
-/* Check and update status of serial port */
-void mcs51_cpu_device::update_serial(int cycles)
-{
- while (--cycles>=0)
- transmit_receive(0);
-}
-
/* Check and update status of serial port */
void mcs51_cpu_device::update_irq_prio(uint8_t ipl, uint8_t iph)
{
- for (int i=0; i<8; i++)
- m_irq_prio[i] = ((ipl >> i) & 1) | (((iph >>i ) & 1) << 1);
+ for (int i = 0; i < 8; i++)
+ m_irq_prio[i] = ((ipl >> i) & 1) | (((iph >> i) & 1) << 1);
}
@@ -1523,17 +1500,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
m_last_op = op;
- switch( op )
+ switch (op)
{
- case 0x00: nop(op); break; //NOP
- case 0x01: ajmp(op); break; //AJMP code addr
- case 0x02: ljmp(op); break; //LJMP code addr
- case 0x03: rr_a(op); break; //RR A
- case 0x04: inc_a(op); break; //INC A
- case 0x05: RWM=1; inc_mem(op); RWM=0; break; //INC data addr
+ case 0x00: nop(op); break; //NOP
+ case 0x01: ajmp(op); break; //AJMP code addr
+ case 0x02: ljmp(op); break; //LJMP code addr
+ case 0x03: rr_a(op); break; //RR A
+ case 0x04: inc_a(op); break; //INC A
+ case 0x05: RWM = 1; inc_mem(op); RWM = 0; break; //INC data addr
case 0x06:
- case 0x07: inc_ir(op&1); break; //INC @R0/@R1
+ case 0x07: inc_ir(op & 1); break; //INC @R0/@R1
case 0x08:
case 0x09:
@@ -1542,17 +1519,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x0c:
case 0x0d:
case 0x0e:
- case 0x0f: inc_r(op&7); break; //INC R0 to R7
+ case 0x0f: inc_r(op & 7); break; //INC R0 to R7
- case 0x10: RWM=1; jbc(op); RWM=0; break; //JBC bit addr, code addr
- case 0x11: acall(op); break; //ACALL code addr
- case 0x12: lcall(op); break; //LCALL code addr
- case 0x13: rrc_a(op); break; //RRC A
- case 0x14: dec_a(op); break; //DEC A
- case 0x15: RWM=1; dec_mem(op); RWM=0; break; //DEC data addr
+ case 0x10: RWM = 1; jbc(op); RWM = 0; break; //JBC bit addr, code addr
+ case 0x11: acall(op); break; //ACALL code addr
+ case 0x12: lcall(op); break; //LCALL code addr
+ case 0x13: rrc_a(op); break; //RRC A
+ case 0x14: dec_a(op); break; //DEC A
+ case 0x15: RWM = 1; dec_mem(op); RWM = 0; break; //DEC data addr
case 0x16:
- case 0x17: dec_ir(op&1); break; //DEC @R0/@R1
+ case 0x17: dec_ir(op & 1); break; //DEC @R0/@R1
case 0x18:
case 0x19:
@@ -1561,17 +1538,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x1c:
case 0x1d:
case 0x1e:
- case 0x1f: dec_r(op&7); break; //DEC R0 to R7
+ case 0x1f: dec_r(op & 7); break; //DEC R0 to R7
- case 0x20: jb(op); break; //JB bit addr, code addr
- case 0x21: ajmp(op); break; //AJMP code addr
- case 0x22: ret(op); break; //RET
- case 0x23: rl_a(op); break; //RL A
- case 0x24: add_a_byte(op); break; //ADD A, #data
- case 0x25: add_a_mem(op); break; //ADD A, data addr
+ case 0x20: jb(op); break; //JB bit addr, code addr
+ case 0x21: ajmp(op); break; //AJMP code addr
+ case 0x22: ret(op); break; //RET
+ case 0x23: rl_a(op); break; //RL A
+ case 0x24: add_a_byte(op); break; //ADD A, #data
+ case 0x25: add_a_mem(op); break; //ADD A, data addr
case 0x26:
- case 0x27: add_a_ir(op&1); break; //ADD A, @R0/@R1
+ case 0x27: add_a_ir(op & 1); break; //ADD A, @R0/@R1
case 0x28:
case 0x29:
@@ -1580,17 +1557,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x2c:
case 0x2d:
case 0x2e:
- case 0x2f: add_a_r(op&7); break; //ADD A, R0 to R7
+ case 0x2f: add_a_r(op & 7); break; //ADD A, R0 to R7
- case 0x30: jnb(op); break; //JNB bit addr, code addr
- case 0x31: acall(op); break; //ACALL code addr
- case 0x32: reti(op); break; //RETI
- case 0x33: rlc_a(op); break; //RLC A
- case 0x34: addc_a_byte(op); break; //ADDC A, #data
- case 0x35: addc_a_mem(op); break; //ADDC A, data addr
+ case 0x30: jnb(op); break; //JNB bit addr, code addr
+ case 0x31: acall(op); break; //ACALL code addr
+ case 0x32: reti(op); break; //RETI
+ case 0x33: rlc_a(op); break; //RLC A
+ case 0x34: addc_a_byte(op); break; //ADDC A, #data
+ case 0x35: addc_a_mem(op); break; //ADDC A, data addr
case 0x36:
- case 0x37: addc_a_ir(op&1); break; //ADDC A, @R0/@R1
+ case 0x37: addc_a_ir(op & 1); break; //ADDC A, @R0/@R1
case 0x38:
case 0x39:
@@ -1599,17 +1576,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x3c:
case 0x3d:
case 0x3e:
- case 0x3f: addc_a_r(op&7); break; //ADDC A, R0 to R7
+ case 0x3f: addc_a_r(op & 7); break; //ADDC A, R0 to R7
- case 0x40: jc(op); break; //JC code addr
- case 0x41: ajmp(op); break; //AJMP code addr
- case 0x42: RWM=1; orl_mem_a(op); RWM=0; break; //ORL data addr, A
- case 0x43: RWM=1; orl_mem_byte(op); RWM=0; break; //ORL data addr, #data
- case 0x44: orl_a_byte(op); break;
- case 0x45: orl_a_mem(op); break; //ORL A, data addr
+ case 0x40: jc(op); break; //JC code addr
+ case 0x41: ajmp(op); break; //AJMP code addr
+ case 0x42: RWM = 1; orl_mem_a(op); RWM = 0; break; //ORL data addr, A
+ case 0x43: RWM = 1; orl_mem_byte(op); RWM = 0; break; //ORL data addr, #data
+ case 0x44: orl_a_byte(op); break;
+ case 0x45: orl_a_mem(op); break; //ORL A, data addr
case 0x46:
- case 0x47: orl_a_ir(op&1); break; //ORL A, @RO/@R1
+ case 0x47: orl_a_ir(op & 1); break; //ORL A, @RO/@R1
case 0x48:
case 0x49:
@@ -1618,17 +1595,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x4c:
case 0x4d:
case 0x4e:
- case 0x4f: orl_a_r(op&7); break; //ORL A, RO to R7
+ case 0x4f: orl_a_r(op & 7); break; //ORL A, RO to R7
- case 0x50: jnc(op); break; //JNC code addr
- case 0x51: acall(op); break; //ACALL code addr
- case 0x52: RWM=1; anl_mem_a(op); RWM=0; break; //ANL data addr, A
- case 0x53: RWM=1; anl_mem_byte(op); RWM=0; break; //ANL data addr, #data
- case 0x54: anl_a_byte(op); break; //ANL A, #data
- case 0x55: anl_a_mem(op); break; //ANL A, data addr
+ case 0x50: jnc(op); break; //JNC code addr
+ case 0x51: acall(op); break; //ACALL code addr
+ case 0x52: RWM = 1; anl_mem_a(op); RWM = 0; break; //ANL data addr, A
+ case 0x53: RWM = 1; anl_mem_byte(op); RWM = 0; break; //ANL data addr, #data
+ case 0x54: anl_a_byte(op); break; //ANL A, #data
+ case 0x55: anl_a_mem(op); break; //ANL A, data addr
case 0x56:
- case 0x57: anl_a_ir(op&1); break; //ANL A, @RO/@R1
+ case 0x57: anl_a_ir(op & 1); break; //ANL A, @RO/@R1
case 0x58:
case 0x59:
@@ -1637,17 +1614,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x5c:
case 0x5d:
case 0x5e:
- case 0x5f: anl_a_r(op&7); break; //ANL A, RO to R7
+ case 0x5f: anl_a_r(op & 7); break; //ANL A, RO to R7
- case 0x60: jz(op); break; //JZ code addr
- case 0x61: ajmp(op); break; //AJMP code addr
- case 0x62: RWM=1; xrl_mem_a(op); RWM=0; break; //XRL data addr, A
- case 0x63: RWM=1; xrl_mem_byte(op); RWM=0; break; //XRL data addr, #data
- case 0x64: xrl_a_byte(op); break; //XRL A, #data
- case 0x65: xrl_a_mem(op); break; //XRL A, data addr
+ case 0x60: jz(op); break; //JZ code addr
+ case 0x61: ajmp(op); break; //AJMP code addr
+ case 0x62: RWM = 1; xrl_mem_a(op); RWM = 0; break; //XRL data addr, A
+ case 0x63: RWM = 1; xrl_mem_byte(op); RWM = 0; break; //XRL data addr, #data
+ case 0x64: xrl_a_byte(op); break; //XRL A, #data
+ case 0x65: xrl_a_mem(op); break; //XRL A, data addr
case 0x66:
- case 0x67: xrl_a_ir(op&1); break; //XRL A, @R0/@R1
+ case 0x67: xrl_a_ir(op & 1); break; //XRL A, @R0/@R1
case 0x68:
case 0x69:
@@ -1656,17 +1633,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x6c:
case 0x6d:
case 0x6e:
- case 0x6f: xrl_a_r(op&7); break; //XRL A, R0 to R7
+ case 0x6f: xrl_a_r(op & 7); break; //XRL A, R0 to R7
- case 0x70: jnz(op); break; //JNZ code addr
- case 0x71: acall(op); break; //ACALL code addr
- case 0x72: orl_c_bitaddr(op); break; //ORL C, bit addr
- case 0x73: jmp_iadptr(op); break; //JMP @A+DPTR
- case 0x74: mov_a_byte(op); break; //MOV A, #data
- case 0x75: mov_mem_byte(op); break; //MOV data addr, #data
+ case 0x70: jnz(op); break; //JNZ code addr
+ case 0x71: acall(op); break; //ACALL code addr
+ case 0x72: orl_c_bitaddr(op); break; //ORL C, bit addr
+ case 0x73: jmp_iadptr(op); break; //JMP @A+DPTR
+ case 0x74: mov_a_byte(op); break; //MOV A, #data
+ case 0x75: mov_mem_byte(op); break; //MOV data addr, #data
case 0x76:
- case 0x77: mov_ir_byte(op&1); break; //MOV @R0/@R1, #data
+ case 0x77: mov_ir_byte(op & 1); break; //MOV @R0/@R1, #data
case 0x78:
case 0x79:
@@ -1675,17 +1652,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x7c:
case 0x7d:
case 0x7e:
- case 0x7f: mov_r_byte(op&7); break; //MOV R0 to R7, #data
+ case 0x7f: mov_r_byte(op & 7); break; //MOV R0 to R7, #data
- case 0x80: sjmp(op); break; //SJMP code addr
- case 0x81: ajmp(op); break; //AJMP code addr
- case 0x82: anl_c_bitaddr(op); break; //ANL C, bit addr
- case 0x83: movc_a_iapc(op); break; //MOVC A, @A + PC
- case 0x84: div_ab(op); break; //DIV AB
- case 0x85: mov_mem_mem(op); break; //MOV data addr, data addr
+ case 0x80: sjmp(op); break; //SJMP code addr
+ case 0x81: ajmp(op); break; //AJMP code addr
+ case 0x82: anl_c_bitaddr(op); break; //ANL C, bit addr
+ case 0x83: movc_a_iapc(op); break; //MOVC A, @A + PC
+ case 0x84: div_ab(op); break; //DIV AB
+ case 0x85: mov_mem_mem(op); break; //MOV data addr, data addr
case 0x86:
- case 0x87: mov_mem_ir(op&1); break; //MOV data addr, @R0/@R1
+ case 0x87: mov_mem_ir(op & 1); break; //MOV data addr, @R0/@R1
case 0x88:
case 0x89:
@@ -1694,17 +1671,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x8c:
case 0x8d:
case 0x8e:
- case 0x8f: mov_mem_r(op&7); break; //MOV data addr,R0 to R7
+ case 0x8f: mov_mem_r(op & 7); break; //MOV data addr,R0 to R7
- case 0x90: mov_dptr_byte(op); break; //MOV DPTR, #data
- case 0x91: acall(op); break; //ACALL code addr
- case 0x92: RWM = 1; mov_bitaddr_c(op); RWM = 0; break; //MOV bit addr, C
- case 0x93: movc_a_iadptr(op); break; //MOVC A, @A + DPTR
- case 0x94: subb_a_byte(op); break; //SUBB A, #data
- case 0x95: subb_a_mem(op); break; //SUBB A, data addr
+ case 0x90: mov_dptr_byte(op); break; //MOV DPTR, #data
+ case 0x91: acall(op); break; //ACALL code addr
+ case 0x92: RWM = 1; mov_bitaddr_c(op); RWM = 0; break; //MOV bit addr, C
+ case 0x93: movc_a_iadptr(op); break; //MOVC A, @A + DPTR
+ case 0x94: subb_a_byte(op); break; //SUBB A, #data
+ case 0x95: subb_a_mem(op); break; //SUBB A, data addr
case 0x96:
- case 0x97: subb_a_ir(op&1); break; //SUBB A, @R0/@R1
+ case 0x97: subb_a_ir(op & 1); break; //SUBB A, @R0/@R1
case 0x98:
case 0x99:
@@ -1713,17 +1690,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0x9c:
case 0x9d:
case 0x9e:
- case 0x9f: subb_a_r(op&7); break; //SUBB A, R0 to R7
+ case 0x9f: subb_a_r(op & 7); break; //SUBB A, R0 to R7
- case 0xa0: orl_c_nbitaddr(op); break; //ORL C, /bit addr
- case 0xa1: ajmp(op); break; //AJMP code addr
- case 0xa2: mov_c_bitaddr(op); break; //MOV C, bit addr
- case 0xa3: inc_dptr(op); break; //INC DPTR
- case 0xa4: mul_ab(op); break; //MUL AB
- case 0xa5: illegal(op); break; //reserved
+ case 0xa0: orl_c_nbitaddr(op); break; //ORL C, /bit addr
+ case 0xa1: ajmp(op); break; //AJMP code addr
+ case 0xa2: mov_c_bitaddr(op); break; //MOV C, bit addr
+ case 0xa3: inc_dptr(op); break; //INC DPTR
+ case 0xa4: mul_ab(op); break; //MUL AB
+ case 0xa5: illegal(op); break; //reserved
case 0xa6:
- case 0xa7: mov_ir_mem(op&1); break; //MOV @R0/@R1, data addr
+ case 0xa7: mov_ir_mem(op & 1); break; //MOV @R0/@R1, data addr
case 0xa8:
case 0xa9:
@@ -1732,17 +1709,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xac:
case 0xad:
case 0xae:
- case 0xaf: mov_r_mem(op&7); break; //MOV R0 to R7, data addr
+ case 0xaf: mov_r_mem(op & 7); break; //MOV R0 to R7, data addr
- case 0xb0: anl_c_nbitaddr(op); break; //ANL C,/bit addr
- case 0xb1: acall(op); break; //ACALL code addr
- case 0xb2: RWM=1; cpl_bitaddr(op); RWM=0; break; //CPL bit addr
- case 0xb3: cpl_c(op); break; //CPL C
- case 0xb4: cjne_a_byte(op); break; //CJNE A, #data, code addr
- case 0xb5: cjne_a_mem(op); break; //CJNE A, data addr, code addr
+ case 0xb0: anl_c_nbitaddr(op); break; //ANL C,/bit addr
+ case 0xb1: acall(op); break; //ACALL code addr
+ case 0xb2: RWM = 1; cpl_bitaddr(op); RWM = 0; break; //CPL bit addr
+ case 0xb3: cpl_c(op); break; //CPL C
+ case 0xb4: cjne_a_byte(op); break; //CJNE A, #data, code addr
+ case 0xb5: cjne_a_mem(op); break; //CJNE A, data addr, code addr
case 0xb6:
- case 0xb7: cjne_ir_byte(op&1); break; //CJNE @R0/@R1, #data, code addr
+ case 0xb7: cjne_ir_byte(op & 1); break; //CJNE @R0/@R1, #data, code addr
case 0xb8:
case 0xb9:
@@ -1751,17 +1728,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xbc:
case 0xbd:
case 0xbe:
- case 0xbf: cjne_r_byte(op&7); break; //CJNE R0 to R7, #data, code addr
+ case 0xbf: cjne_r_byte(op & 7); break; //CJNE R0 to R7, #data, code addr
- case 0xc0: push(op); break; //PUSH data addr
- case 0xc1: ajmp(op); break; //AJMP code addr
- case 0xc2: RWM=1; clr_bitaddr(op); RWM=0; break; //CLR bit addr
- case 0xc3: clr_c(op); break; //CLR C
- case 0xc4: swap_a(op); break; //SWAP A
- case 0xc5: xch_a_mem(op); break; //XCH A, data addr
+ case 0xc0: push(op); break; //PUSH data addr
+ case 0xc1: ajmp(op); break; //AJMP code addr
+ case 0xc2: RWM = 1; clr_bitaddr(op); RWM = 0; break; //CLR bit addr
+ case 0xc3: clr_c(op); break; //CLR C
+ case 0xc4: swap_a(op); break; //SWAP A
+ case 0xc5: xch_a_mem(op); break; //XCH A, data addr
case 0xc6:
- case 0xc7: xch_a_ir(op&1); break; //XCH A, @RO/@R1
+ case 0xc7: xch_a_ir(op & 1); break; //XCH A, @RO/@R1
case 0xc8:
case 0xc9:
@@ -1770,17 +1747,17 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xcc:
case 0xcd:
case 0xce:
- case 0xcf: xch_a_r(op&7); break; //XCH A, RO to R7
+ case 0xcf: xch_a_r(op & 7); break; //XCH A, RO to R7
- case 0xd0: pop(op); break; //POP data addr
- case 0xd1: acall(op); break; //ACALL code addr
- case 0xd2: RWM=1; setb_bitaddr(op); RWM=0; break; //SETB bit addr
- case 0xd3: setb_c(op); break; //SETB C
- case 0xd4: da_a(op); break; //DA A
- case 0xd5: RWM=1; djnz_mem(op); RWM=0; break; //DJNZ data addr, code addr
+ case 0xd0: pop(op); break; //POP data addr
+ case 0xd1: acall(op); break; //ACALL code addr
+ case 0xd2: RWM = 1; setb_bitaddr(op); RWM = 0; break; //SETB bit addr
+ case 0xd3: setb_c(op); break; //SETB C
+ case 0xd4: da_a(op); break; //DA A
+ case 0xd5: RWM = 1; djnz_mem(op); RWM = 0; break; //DJNZ data addr, code addr
case 0xd6:
- case 0xd7: xchd_a_ir(op&1); break; //XCHD A, @R0/@R1
+ case 0xd7: xchd_a_ir(op & 1); break; //XCHD A, @R0/@R1
case 0xd8:
case 0xd9:
@@ -1789,18 +1766,18 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xdc:
case 0xdd:
case 0xde:
- case 0xdf: djnz_r(op&7); break; //DJNZ R0 to R7,code addr
+ case 0xdf: djnz_r(op & 7); break; //DJNZ R0 to R7,code addr
- case 0xe0: movx_a_idptr(op); break; //MOVX A,@DPTR
- case 0xe1: ajmp(op); break; //AJMP code addr
+ case 0xe0: movx_a_idptr(op); break; //MOVX A,@DPTR
+ case 0xe1: ajmp(op); break; //AJMP code addr
case 0xe2:
- case 0xe3: movx_a_ir(op&1); break; //MOVX A, @R0/@R1
+ case 0xe3: movx_a_ir(op & 1); break; //MOVX A, @R0/@R1
- case 0xe4: clr_a(op); break; //CLR A
- case 0xe5: mov_a_mem(op); break; //MOV A, data addr
+ case 0xe4: clr_a(op); break; //CLR A
+ case 0xe5: mov_a_mem(op); break; //MOV A, data addr
case 0xe6:
- case 0xe7: mov_a_ir(op&1); break; //MOV A,@RO/@R1
+ case 0xe7: mov_a_ir(op & 1); break; //MOV A,@RO/@R1
case 0xe8:
case 0xe9:
@@ -1809,19 +1786,19 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xec:
case 0xed:
case 0xee:
- case 0xef: mov_a_r(op&7); break; //MOV A,R0 to R7
+ case 0xef: mov_a_r(op & 7); break; //MOV A,R0 to R7
- case 0xf0: movx_idptr_a(op); break; //MOVX @DPTR,A
- case 0xf1: acall(op); break; //ACALL code addr
+ case 0xf0: movx_idptr_a(op); break; //MOVX @DPTR,A
+ case 0xf1: acall(op); break; //ACALL code addr
case 0xf2:
- case 0xf3: movx_ir_a(op&1); break; //MOVX @R0/@R1,A
+ case 0xf3: movx_ir_a(op & 1); break; //MOVX @R0/@R1,A
- case 0xf4: cpl_a(op); break; //CPL A
- case 0xf5: mov_mem_a(op); break; //MOV data addr, A
+ case 0xf4: cpl_a(op); break; //CPL A
+ case 0xf5: mov_mem_a(op); break; //MOV data addr, A
case 0xf6:
- case 0xf7: mov_ir_a(op&1); break; //MOV @R0/@R1, A
+ case 0xf7: mov_ir_a(op & 1); break; //MOV @R0/@R1, A
case 0xf8:
case 0xf9:
@@ -1830,7 +1807,7 @@ void mcs51_cpu_device::execute_op(uint8_t op)
case 0xfc:
case 0xfd:
case 0xfe:
- case 0xff: mov_r_a(op&7); break; //MOV R0 to R7, A
+ case 0xff: mov_r_a(op & 7); break; //MOV R0 to R7, A
default:
illegal(op);
}
@@ -1841,7 +1818,8 @@ void mcs51_cpu_device::execute_op(uint8_t op)
***************************************************************************/
/* # of oscilations each opcode requires*/
-const uint8_t mcs51_cpu_device::mcs51_cycles[256] = {
+const uint8_t mcs51_cpu_device::mcs51_cycles[256] =
+{
1,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
2,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
2,2,2,1,1,1,1,1,1,1,1,1,1,1,1,1,
@@ -1879,8 +1857,7 @@ const uint8_t mcs51_cpu_device::mcs51_cycles[256] = {
**********************************************************************************/
void mcs51_cpu_device::check_irqs()
{
- uint8_t ints = (GET_IE0 | (GET_TF0<<1) | (GET_IE1<<2) | (GET_TF1<<3)
- | ((GET_RI|GET_TI)<<4));
+ uint8_t ints = (GET_IE0 | (GET_TF0 << 1) | (GET_IE1 << 2) | (GET_TF1 << 3) | ((GET_RI | GET_TI) << 4));
uint8_t int_vec = 0;
uint8_t int_mask;
int priority_request = -1;
@@ -1889,14 +1866,14 @@ void mcs51_cpu_device::check_irqs()
int_mask = (GET_EA ? IE : 0x00);
if (m_features & FEATURE_I8052)
- ints |= ((GET_TF2|GET_EXF2)<<5);
+ ints |= ((GET_TF2 | GET_EXF2) << 5);
if (m_features & FEATURE_DS5002FP)
{
- ints |= ((GET_PFW)<<5);
- m_irq_prio[6] = 3; /* force highest priority */
+ ints |= ((GET_PFW) << 5);
+ m_irq_prio[6] = 3; /* force highest priority */
/* mask out interrupts not enabled */
- ints &= ((int_mask & 0x1f) | ((GET_EPFW)<<5));
+ ints &= ((int_mask & 0x1f) | ((GET_EPFW) << 5));
}
else
{
@@ -1904,7 +1881,8 @@ void mcs51_cpu_device::check_irqs()
ints &= int_mask;
}
- if (!ints) return;
+ if (!ints)
+ return;
/* Clear IDL - got enabled interrupt */
if (m_features & FEATURE_CMOS)
@@ -1913,19 +1891,24 @@ void mcs51_cpu_device::check_irqs()
SET_IDL(0);
/* external interrupt wakes up */
if (ints & (GET_IE0 | GET_IE1))
+ {
/* but not the DS5002FP */
if (!(m_features & FEATURE_DS5002FP))
SET_PD(0);
+ }
}
- for (int i=0; i<m_num_interrupts; i++)
+ if ((m_features & FEATURE_CMOS) && GET_PD)
+ return;
+
+ for (int i = 0; i < m_num_interrupts; i++)
{
- if (ints & (1<<i))
+ if (ints & (1 << i))
{
if (m_irq_prio[i] > priority_request)
{
priority_request = m_irq_prio[i];
- int_vec = (i<<3) | 3;
+ int_vec = (i << 3) | 3;
}
}
}
@@ -1970,10 +1953,11 @@ void mcs51_cpu_device::check_irqs()
LOG("Take: %d %02x\n", m_cur_irq_prio, m_irq_active);
//Clear any interrupt flags that should be cleared since we're servicing the irq!
- switch(int_vec) {
+ switch (int_vec)
+ {
case V_IE0:
//External Int Flag only cleared when configured as Edge Triggered..
- if(GET_IT0) /* for some reason having this, breaks alving dmd games */
+ if (GET_IT0) /* for some reason having this, breaks alving dmd games */
SET_IE0(0);
break;
case V_TF0:
@@ -1982,7 +1966,7 @@ void mcs51_cpu_device::check_irqs()
break;
case V_IE1:
//External Int Flag only cleared when configured as Edge Triggered..
- if(GET_IT1) /* for some reason having this, breaks alving dmd games */
+ if (GET_IT1) /* for some reason having this, breaks alving dmd games */
SET_IE1(0);
break;
case V_TF1:
@@ -2006,14 +1990,20 @@ void mcs51_cpu_device::check_irqs()
void mcs51_cpu_device::burn_cycles(int cycles)
{
- /* Update Timer (if any timers are running) */
- update_timers(cycles);
+ while (cycles--)
+ {
+ m_icount--;
- /* Update Serial (only for mode 0) */
- update_serial(cycles);
+ // update timers
+ update_timer_t0(1);
+ update_timer_t1(1);
- /* check_irqs */
- check_irqs();
+ if (m_features & FEATURE_I8052)
+ update_timer_t2(1);
+
+ // check and update status of serial port
+ transmit_receive(0);
+ }
}
void mcs51_cpu_device::execute_set_input(int irqline, int state)
@@ -2032,20 +2022,22 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
/* detect 0->1 transitions */
uint32_t tr_state = (~m_last_line_state) & new_state;
- switch( irqline )
+ switch (irqline)
{
//External Interrupt 0
case MCS51_INT0_LINE:
//Line Asserted?
- if (state != CLEAR_LINE) {
+ if (state != CLEAR_LINE)
+ {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT0 active lo!
- if (GET_IT0) {
+ if (GET_IT0)
+ {
if (GET_BIT(tr_state, MCS51_INT0_LINE))
SET_IE0(1);
}
else
{
- SET_IE0(1); //Nope, just set it..
+ SET_IE0(1); //Nope, just set it..
}
}
else
@@ -2059,14 +2051,16 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
//External Interrupt 1
case MCS51_INT1_LINE:
//Line Asserted?
- if (state != CLEAR_LINE) {
+ if (state != CLEAR_LINE)
+ {
//Need cleared->active line transition? (Logical 1-0 Pulse on the line) - CLEAR->ASSERT Transition since INT1 active lo!
- if(GET_IT1){
+ if (GET_IT1)
+ {
if (GET_BIT(tr_state, MCS51_INT1_LINE))
SET_IE1(1);
}
else
- SET_IE1(1); //Nope, just set it..
+ SET_IE1(1); //Nope, just set it..
}
else
{
@@ -2123,70 +2117,50 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
m_last_line_state = new_state;
}
-/* Execute cycles - returns number of cycles actually run */
+/* Execute cycles */
void mcs51_cpu_device::execute_run()
{
- uint8_t op;
-
- /* external interrupts may have been set since we last checked */
- m_inst_cycles = 0;
- check_irqs();
-
- /* if in powerdown, just return */
- if ((m_features & FEATURE_CMOS) && GET_PD)
- {
- m_icount = 0;
- return;
- }
-
- m_icount -= m_inst_cycles;
- burn_cycles(m_inst_cycles);
-
- if ((m_features & FEATURE_CMOS) && GET_IDL)
- {
- do
- {
- /* burn the cycles */
- m_icount--;
- burn_cycles(1);
- } while( m_icount > 0 );
- return;
- }
-
do
{
- /* Read next opcode */
- PPC = PC;
- debugger_instruction_hook(PC);
- op = m_program.read_byte(PC++);
-
- /* process opcode and count cycles */
- m_inst_cycles = mcs51_cycles[op];
- execute_op(op);
+ // check interrupts
+ check_irqs();
- /* burn the cycles */
- m_icount -= m_inst_cycles;
-
- /* if in powerdown, just return */
+ // if in powerdown and external IRQ did not wake us up, just return
if ((m_features & FEATURE_CMOS) && GET_PD)
+ {
+ debugger_wait_hook();
+ m_icount = 0;
return;
+ }
+
+ // if not idling, process next opcode
+ if (!((m_features & FEATURE_CMOS) && GET_IDL))
+ {
+ PPC = PC;
+ debugger_instruction_hook(PC);
+ uint8_t op = m_program.read_byte(PC++);
+
+ m_inst_cycles += mcs51_cycles[op];
+ execute_op(op);
+ }
+ else
+ m_inst_cycles++;
+ // burn the cycles
burn_cycles(m_inst_cycles);
- /* decrement the timed access window */
+ // decrement the timed access window
if (m_features & FEATURE_DS5002FP)
{
m_ds5002fp.ta_window = (m_ds5002fp.ta_window ? (m_ds5002fp.ta_window - 1) : 0x00);
if (m_ds5002fp.rnr_delay > 0)
- m_ds5002fp.rnr_delay-=m_inst_cycles;
+ m_ds5002fp.rnr_delay -= m_inst_cycles;
}
- /* If the chip entered in idle mode, end the loop */
- if ((m_features & FEATURE_CMOS) && GET_IDL)
- return;
+ m_inst_cycles = 0;
- } while( m_icount > 0 );
+ } while (m_icount > 0);
}
@@ -2204,7 +2178,13 @@ void mcs51_cpu_device::sfr_write(size_t offset, uint8_t data)
case ADDR_P0: m_port_out_cb[0](data); break;
case ADDR_P1: m_port_out_cb[1](data); break;
case ADDR_P2: m_port_out_cb[2](data); break;
- case ADDR_P3: m_port_out_cb[3](data); break;
+ case ADDR_P3:
+ // P3.1 = SFR(P3) & TxD
+ if (!m_uart.txd)
+ m_port_out_cb[3](data & ~0x02);
+ else
+ m_port_out_cb[3](data);
+ break;
case ADDR_SBUF:
LOGMASKED(LOG_TX, "tx byte 0x%02x\n", data);
m_uart.data_out = data;
@@ -2212,7 +2192,7 @@ void mcs51_cpu_device::sfr_write(size_t offset, uint8_t data)
break;
case ADDR_PSW: SET_PARITY(); break;
case ADDR_ACC: SET_PARITY(); break;
- case ADDR_IP: update_irq_prio(data, 0); break;
+ case ADDR_IP: update_irq_prio(data, 0); break;
case ADDR_B:
case ADDR_SP:
case ADDR_DPL:
@@ -2294,28 +2274,34 @@ void mcs51_cpu_device::device_start()
/* Save states */
save_item(NAME(m_ppc));
save_item(NAME(m_pc));
+ save_item(NAME(m_rwm));
+ save_item(NAME(m_recalc_parity));
+ save_item(NAME(m_last_line_state));
+ save_item(NAME(m_t0_cnt));
+ save_item(NAME(m_t1_cnt));
+ save_item(NAME(m_t2_cnt));
+ save_item(NAME(m_t2ex_cnt));
+ save_item(NAME(m_cur_irq_prio));
+ save_item(NAME(m_irq_active));
+ save_item(NAME(m_irq_prio));
save_item(NAME(m_last_op));
save_item(NAME(m_last_bit));
- save_item(NAME(m_rwm) );
- save_item(NAME(m_cur_irq_prio) );
- save_item(NAME(m_last_line_state) );
- save_item(NAME(m_t0_cnt) );
- save_item(NAME(m_t1_cnt) );
- save_item(NAME(m_t2_cnt) );
- save_item(NAME(m_t2ex_cnt) );
- save_item(NAME(m_recalc_parity) );
- save_item(NAME(m_irq_prio) );
- save_item(NAME(m_irq_active) );
- save_item(NAME(m_ds5002fp.previous_ta) );
- save_item(NAME(m_ds5002fp.ta_window) );
- save_item(NAME(m_ds5002fp.rnr_delay) );
- save_item(NAME(m_ds5002fp.range) );
+
save_item(NAME(m_uart.data_out));
save_item(NAME(m_uart.data_in));
+ save_item(NAME(m_uart.txbit));
+ save_item(NAME(m_uart.txd));
+ save_item(NAME(m_uart.rxbit));
+ save_item(NAME(m_uart.rxb8));
save_item(NAME(m_uart.smod_div));
save_item(NAME(m_uart.rx_clk));
save_item(NAME(m_uart.tx_clk));
+ save_item(NAME(m_ds5002fp.previous_ta));
+ save_item(NAME(m_ds5002fp.ta_window));
+ save_item(NAME(m_ds5002fp.range));
+ save_item(NAME(m_ds5002fp.rnr_delay));
+
state_add( MCS51_PC, "PC", m_pc).formatstr("%04X");
state_add( MCS51_SP, "SP", SP).formatstr("%02X");
state_add( MCS51_PSW, "PSW", PSW).formatstr("%02X");
@@ -2347,8 +2333,8 @@ void mcs51_cpu_device::device_start()
state_add( MCS51_TL1, "TL1", TL1).formatstr("%02X");
state_add( MCS51_TH1, "TH1", TH1).formatstr("%02X");
- state_add( STATE_GENPC, "GENPC", m_pc ).noshow();
- state_add( STATE_GENPCBASE, "CURPC", m_pc ).noshow();
+ state_add( STATE_GENPC, "GENPC", m_pc).noshow();
+ state_add( STATE_GENPCBASE, "CURPC", m_pc).noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_rtemp).formatstr("%8s").noshow();
set_icountptr(m_icount);
@@ -2439,11 +2425,11 @@ void mcs51_cpu_device::device_reset()
{
// set initial values (some of them are set using the bootstrap loader)
PCON = 0;
- MCON = m_sfr_ram[ADDR_MCON-0x80];
- RPCTL = m_sfr_ram[ADDR_RPCTL-0x80];
+ MCON = m_sfr_ram[ADDR_MCON - 0x80];
+ RPCTL = m_sfr_ram[ADDR_RPCTL - 0x80];
RPS = 0;
RNR = 0;
- CRCR = m_sfr_ram[ADDR_CRCR-0x80];
+ CRCR = m_sfr_ram[ADDR_CRCR - 0x80];
CRCL = 0;
CRCH = 0;
TA = 0;
@@ -2460,6 +2446,7 @@ void mcs51_cpu_device::device_reset()
m_uart.rx_clk = 0;
m_uart.tx_clk = 0;
m_uart.txbit = SIO_IDLE;
+ m_uart.txd = 1;
m_uart.rxbit = SIO_IDLE;
m_uart.rxb8 = 0;
m_uart.smod_div = 0;
@@ -2552,7 +2539,6 @@ uint8_t i80c52_device::sfr_read(size_t offset)
* DS5002FP Section
****************************************************************************/
-
#define DS5_LOGW(a, d) LOG("write to " # a " register at 0x%04x, data=%x\n", PC, d)
#define DS5_LOGR(a, d) LOG("read from " # a " register at 0x%04x\n", PC)
@@ -2582,15 +2568,15 @@ void ds5002fp_device::sfr_write(size_t offset, uint8_t data)
LOG("TA window initiated at 0x%04x\n", PC);
}
break;
- case ADDR_MCON: data = ds5002fp_protected(ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break;
+ case ADDR_MCON: data = ds5002fp_protected(ADDR_MCON, data, 0x0f, 0xf7); DS5_LOGW(MCON, data); break;
case ADDR_RPCTL: data = ds5002fp_protected(ADDR_RPCTL, data, 0xef, 0xfe); DS5_LOGW(RPCTL, data); break;
- case ADDR_CRCR: data = ds5002fp_protected(ADDR_CRCR, data, 0xff, 0x0f); DS5_LOGW(CRCR, data); break;
- case ADDR_PCON: data = ds5002fp_protected(ADDR_PCON, data, 0xb9, 0xff); break;
- case ADDR_IP: data = ds5002fp_protected(ADDR_IP, data, 0x7f, 0xff); break;
- case ADDR_CRCL: DS5_LOGW(CRCL, data); break;
- case ADDR_CRCH: DS5_LOGW(CRCH, data); break;
- case ADDR_RNR: DS5_LOGW(RNR, data); break;
- case ADDR_RPS: DS5_LOGW(RPS, data); break;
+ case ADDR_CRCR: data = ds5002fp_protected(ADDR_CRCR, data, 0xff, 0x0f); DS5_LOGW(CRCR, data); break;
+ case ADDR_PCON: data = ds5002fp_protected(ADDR_PCON, data, 0xb9, 0xff); break;
+ case ADDR_IP: data = ds5002fp_protected(ADDR_IP, data, 0x7f, 0xff); break;
+ case ADDR_CRCL: DS5_LOGW(CRCL, data); break;
+ case ADDR_CRCH: DS5_LOGW(CRCH, data); break;
+ case ADDR_RNR: DS5_LOGW(RNR, data); break;
+ case ADDR_RPS: DS5_LOGW(RPS, data); break;
default:
mcs51_cpu_device::sfr_write(offset, data);
return;
@@ -2648,47 +2634,53 @@ Documentation states that having the battery connected "maintains the internal s
void ds5002fp_device::nvram_default()
{
- memset( m_scratchpad, 0, 0x80 );
- memset( m_sfr_ram, 0, 0x80 );
+ memset(m_scratchpad, 0, 0x80);
+ memset(m_sfr_ram, 0, 0x80);
int expected_bytes = 0x80 + 0x80;
if (!m_region.found())
{
- logerror( "ds5002fp_device region not found\n" );
+ logerror("ds5002fp_device region not found\n");
}
- else if( m_region->bytes() != expected_bytes )
+ else if (m_region->bytes() != expected_bytes)
{
- logerror( "ds5002fp_device region length 0x%x expected 0x%x\n", m_region->bytes(), expected_bytes );
+ logerror("ds5002fp_device region length 0x%x expected 0x%x\n", m_region->bytes(), expected_bytes);
}
else
{
uint8_t *region = m_region->base();
- memcpy( m_scratchpad, region, 0x80 ); region += 0x80;
- memcpy( m_sfr_ram, region, 0x80 ); region += 0x80;
+ memcpy(m_scratchpad, region, 0x80); region += 0x80;
+ memcpy(m_sfr_ram, region, 0x80); region += 0x80;
/* does anything else need storing? any registers that aren't in sfr ram?
It isn't clear if the various initial MCON registers etc. are just stored in sfr ram
or if the DS5002FP stores them elsewhere and the bootstrap copies them */
}
}
-bool ds5002fp_device::nvram_read( util::read_stream &file )
+bool ds5002fp_device::nvram_read(util::read_stream &file)
{
+ std::error_condition err;
size_t actual;
- if (file.read( m_scratchpad, 0x80, actual ) || actual != 0x80)
+ std::tie(err, actual) = read(file, m_scratchpad, 0x80);
+ if (err || (actual != 0x80))
return false;
- if (file.read( m_sfr_ram, 0x80, actual ) || actual != 0x80)
+ std::tie(err, actual) = read(file, m_sfr_ram, 0x80);
+ if (err || (actual != 0x80))
return false;
return true;
}
-bool ds5002fp_device::nvram_write( util::write_stream &file )
+bool ds5002fp_device::nvram_write(util::write_stream &file)
{
+ std::error_condition err;
size_t actual;
- if (file.write( m_scratchpad, 0x80, actual ) || actual != 0x80)
+ std::tie(err, actual) = write(file, m_scratchpad, 0x80);
+ if (err || (actual != 0x80))
return false;
- if (file.write( m_sfr_ram, 0x80, actual ) || actual != 0x80)
+ std::tie(err, actual) = write(file, m_sfr_ram, 0x80);
+ if (err || (actual != 0x80))
return false;
return true;
}
@@ -2752,3 +2744,18 @@ std::unique_ptr<util::disasm_interface> ds5002fp_device::create_disassembler()
{
return std::make_unique<ds5002fp_disassembler>();
}
+
+std::unique_ptr<util::disasm_interface> p80c562_device::create_disassembler()
+{
+ return std::make_unique<p8xc562_disassembler>();
+}
+
+std::unique_ptr<util::disasm_interface> p80c552_device::create_disassembler()
+{
+ return std::make_unique<p8xc552_disassembler>();
+}
+
+std::unique_ptr<util::disasm_interface> p87c552_device::create_disassembler()
+{
+ return std::make_unique<p8xc552_disassembler>();
+}
diff --git a/src/devices/cpu/mcs51/mcs51.h b/src/devices/cpu/mcs51/mcs51.h
index f145e20d4df..340f520eed4 100644
--- a/src/devices/cpu/mcs51/mcs51.h
+++ b/src/devices/cpu/mcs51/mcs51.h
@@ -2,28 +2,9 @@
// copyright-holders:Steve Ellenoff, Manuel Abadia, Couriersud
/*****************************************************************************
*
- * mcs51.h
- * Portable MCS-51 Family Emulator
+ * Portable MCS-51 Family Emulator
+ * Copyright Steve Ellenoff
*
- * Chips in the family:
- * 8051 Product Line (8031,8051,8751)
- * 8052 Product Line (8032,8052,8752)
- * 8054 Product Line (8054)
- * 8058 Product Line (8058)
- *
- * Copyright Steve Ellenoff, all rights reserved.
- *
- * This work is based on:
- * #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
- * #2) 8051 simulator by Travis Marlatte
- * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
- *
- * 2008, October, Couriersud
- * - Rewrite of timer, interrupt and serial code
- * - addition of CMOS features
- * - internal memory maps
- * - addition of new processor types
- * - full emulation of 8xCx2 processors
*****************************************************************************/
#ifndef MAME_CPU_MCS51_MCS51_H
@@ -42,14 +23,14 @@ enum
enum
{
- MCS51_INT0_LINE = 0, /* P3.2: External Interrupt 0 */
- MCS51_INT1_LINE, /* P3.3: External Interrupt 1 */
- MCS51_T0_LINE, /* P3.4: Timer 0 External Input */
- MCS51_T1_LINE, /* P3.5: Timer 1 External Input */
- MCS51_T2_LINE, /* P1.0: Timer 2 External Input */
- MCS51_T2EX_LINE, /* P1.1: Timer 2 Capture Reload Trigger */
-
- DS5002FP_PFI_LINE /* DS5002FP Power fail interrupt */
+ MCS51_INT0_LINE = 0, // P3.2: External Interrupt 0
+ MCS51_INT1_LINE, // P3.3: External Interrupt 1
+ MCS51_T0_LINE, // P3.4: Timer 0 External Input
+ MCS51_T1_LINE, // P3.5: Timer 1 External Input
+ MCS51_T2_LINE, // P1.0: Timer 2 External Input
+ MCS51_T2EX_LINE, // P1.1: Timer 2 Capture Reload Trigger
+
+ DS5002FP_PFI_LINE // DS5002FP Power fail interrupt
};
@@ -64,23 +45,23 @@ public:
template <unsigned N> auto port_in_cb() { return m_port_in_cb[N].bind(); }
template <unsigned N> auto port_out_cb() { return m_port_out_cb[N].bind(); }
- void program_internal(address_map &map);
- void data_internal(address_map &map);
+ void program_internal(address_map &map) ATTR_COLD;
+ void data_internal(address_map &map) ATTR_COLD;
+
protected:
// construction/destruction
mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
mcs51_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map, address_map_constructor data_map, int program_width, int data_width, uint8_t features = 0);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 12 - 1) / 12; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 12); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
+ virtual uint32_t execute_max_cycles() const noexcept override { return 4+2; } // max opcode cycles + irq
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -93,80 +74,81 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-protected:
address_space_config m_program_config;
address_space_config m_data_config;
address_space_config m_io_config;
- //Internal stuff
- uint16_t m_ppc; //previous pc
- uint16_t m_pc; //current pc
- uint16_t m_features; //features of this cpu
- uint8_t m_rwm; //Signals that the current instruction is a read/write/modify instruction
-
- int m_inst_cycles; /* cycles for the current instruction */
- const uint32_t m_rom_size; /* size (in bytes) of internal program ROM/EPROM */
- int m_ram_mask; /* second ram bank for indirect access available ? */
- int m_num_interrupts; /* number of interrupts supported */
- int m_recalc_parity; /* recalculate parity before next instruction */
- uint32_t m_last_line_state; /* last state of input lines line */
- int m_t0_cnt; /* number of 0->1 transitions on T0 line */
- int m_t1_cnt; /* number of 0->1 transitions on T1 line */
- int m_t2_cnt; /* number of 0->1 transitions on T2 line */
- int m_t2ex_cnt; /* number of 0->1 transitions on T2EX line */
- int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
- uint8_t m_irq_active; /* mask which irq levels are serviced */
- uint8_t m_irq_prio[8]; /* interrupt priority */
-
- uint8_t m_forced_inputs[4]; /* allow read even if configured as output */
+ // Internal stuff
+ uint16_t m_ppc; // previous pc
+ uint16_t m_pc; // current pc
+ uint16_t m_features; // features of this cpu
+ uint8_t m_rwm; // Signals that the current instruction is a read/write/modify instruction
+
+ int m_inst_cycles; // cycles for the current instruction
+ const uint32_t m_rom_size; // size (in bytes) of internal program ROM/EPROM
+ int m_ram_mask; // second ram bank for indirect access available ?
+ int m_num_interrupts; // number of interrupts supported
+ int m_recalc_parity; // recalculate parity before next instruction
+ uint32_t m_last_line_state; // last state of input lines line
+ int m_t0_cnt; // number of 0->1 transitions on T0 line
+ int m_t1_cnt; // number of 0->1 transitions on T1 line
+ int m_t2_cnt; // number of 0->1 transitions on T2 line
+ int m_t2ex_cnt; // number of 0->1 transitions on T2EX line
+ int m_cur_irq_prio; // Holds value of the current IRQ Priority Level; -1 if no irq
+ uint8_t m_irq_active; // mask which irq levels are serviced
+ uint8_t m_irq_prio[8]; // interrupt priority
+
+ uint8_t m_forced_inputs[4]; // allow read even if configured as output
// JB-related hacks
- uint8_t m_last_op;
- uint8_t m_last_bit;
+ uint8_t m_last_op;
+ uint8_t m_last_bit;
- int m_icount;
+ int m_icount;
struct mcs51_uart
{
- uint8_t data_out; //Data to send out
- uint8_t data_in;
- uint8_t txbit;
- uint8_t rxbit;
- uint8_t rxb8;
-
- int smod_div; /* signal divided by 2^SMOD */
- int rx_clk; /* rx clock */
- int tx_clk; /* tx clock */
- } m_uart; /* internal uart */
-
- /* Internal Ram */
- required_shared_ptr<uint8_t> m_sfr_ram; /* 128 SFR - these are in 0x80 - 0xFF */
- required_shared_ptr<uint8_t> m_scratchpad; /* 128 RAM (8031/51) + 128 RAM in second bank (8032/52) */
-
- /* SFR Callbacks */
+ uint8_t data_out; // data to send out
+ uint8_t data_in;
+ uint8_t txbit;
+ uint8_t txd;
+ uint8_t rxbit;
+ uint8_t rxb8;
+
+ int smod_div; // signal divided by 2^SMOD
+ int rx_clk; // rx clock
+ int tx_clk; // tx clock
+ } m_uart; // internal uart
+
+ // Internal Ram
+ required_shared_ptr<uint8_t> m_sfr_ram; // 128 SFR - these are in 0x80 - 0xFF
+ required_shared_ptr<uint8_t> m_scratchpad; // 128 RAM (8031/51) + 128 RAM in second bank (8032/52)
+
+ // SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data);
virtual uint8_t sfr_read(size_t offset);
void transmit(int state);
- /* Memory spaces */
+ // Memory spaces
memory_access<16, 0, 0, ENDIANNESS_LITTLE>::cache m_program;
memory_access< 9, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
- memory_access<17, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
+ memory_access<18, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
devcb_read8::array<4> m_port_in_cb;
devcb_write8::array<4> m_port_out_cb;
- /* DS5002FP */
+ // DS5002FP
struct {
- uint8_t previous_ta; /* Previous Timed Access value */
- uint8_t ta_window; /* Limed Access window */
- uint8_t range; /* Memory Range */
- /* Bootstrap Configuration */
- uint8_t mcon; /* bootstrap loader MCON register */
- uint8_t rpctl; /* bootstrap loader RPCTL register */
- uint8_t crc; /* bootstrap loader CRC register */
- int32_t rnr_delay; /* delay before new random number available */
+ uint8_t previous_ta; // Previous Timed Access value
+ uint8_t ta_window; // Limed Access window
+ uint8_t range; // Memory Range
+
+ // Bootstrap Configuration
+ uint8_t mcon; // bootstrap loader MCON register
+ uint8_t rpctl; // bootstrap loader RPCTL register
+ uint8_t crc; // bootstrap loader CRC register
+ int32_t rnr_delay; // delay before new random number available
} m_ds5002fp;
// for the debugger
@@ -193,8 +175,6 @@ protected:
void update_timer_t0(int cycles);
void update_timer_t1(int cycles);
void update_timer_t2(int cycles);
- void update_timers(int cycles);
- void update_serial(int source);
void update_irq_prio(uint8_t ipl, uint8_t iph);
void execute_op(uint8_t op);
void check_irqs();
@@ -315,19 +295,24 @@ protected:
};
-/* variants with no internal rom and 128 byte internal memory */
+// variants with no internal rom and 128 byte internal memory
DECLARE_DEVICE_TYPE(I8031, i8031_device)
-/* variants with no internal rom and 256 byte internal memory */
+
+// variants with no internal rom and 256 byte internal memory
DECLARE_DEVICE_TYPE(I8032, i8032_device)
-/* variants 4k internal rom and 128 byte internal memory */
+
+// variants 4k internal rom and 128 byte internal memory
DECLARE_DEVICE_TYPE(I8051, i8051_device)
DECLARE_DEVICE_TYPE(I8751, i8751_device)
-/* variants 8k internal rom and 128 byte internal memory (no 8052 features) */
+
+// variants 8k internal rom and 128 byte internal memory (no 8052 features)
DECLARE_DEVICE_TYPE(AM8753, am8753_device)
-/* variants 8k internal rom and 256 byte internal memory and more registers */
+
+// variants 8k internal rom and 256 byte internal memory and more registers
DECLARE_DEVICE_TYPE(I8052, i8052_device)
DECLARE_DEVICE_TYPE(I8752, i8752_device)
-/* cmos variants */
+
+// cmos variants
DECLARE_DEVICE_TYPE(I80C31, i80c31_device)
DECLARE_DEVICE_TYPE(I80C51, i80c51_device)
DECLARE_DEVICE_TYPE(I87C51, i87c51_device)
@@ -340,7 +325,11 @@ DECLARE_DEVICE_TYPE(AT89C52, at89c52_device)
DECLARE_DEVICE_TYPE(AT89S52, at89s52_device)
DECLARE_DEVICE_TYPE(DS80C320, ds80c320_device)
DECLARE_DEVICE_TYPE(SAB80C535, sab80c535_device)
-/* 4k internal perom and 128 internal ram and 2 analog comparators */
+DECLARE_DEVICE_TYPE(P80C552, p80c552_device)
+DECLARE_DEVICE_TYPE(P87C552, p87c552_device)
+DECLARE_DEVICE_TYPE(P80C562, p80c562_device)
+
+// 4k internal perom and 128 internal ram and 2 analog comparators
DECLARE_DEVICE_TYPE(AT89C4051, at89c4051_device)
DECLARE_DEVICE_TYPE(I8344, i8344_device)
@@ -389,7 +378,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- /* SFR Callbacks */
+ // SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;
};
@@ -450,7 +439,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- /* SFR Callbacks */
+ // SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;
};
@@ -552,6 +541,38 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
+class p80c562_device : public i80c51_device
+{
+public:
+ // construction/destruction
+ p80c562_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ p80c562_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int data_width, uint8_t features = 0);
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+};
+
+class p80c552_device : public p80c562_device
+{
+public:
+ // construction/destruction
+ p80c552_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+};
+
+class p87c552_device : public p80c562_device
+{
+public:
+ // construction/destruction
+ p87c552_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+};
+
/*
* The DS5002FP has 2 16 bits data address buses (the byte-wide bus and the expanded bus). The exact memory position accessed depends on the
* partition mode, the memory range and the expanded bus select. The partition mode and the expanded bus select can be changed at any time.
@@ -568,7 +589,7 @@ protected:
* Internal ram 128k and security features
*/
-/* these allow the default state of RAM to be set from a region */
+// these allow the default state of RAM to be set from a region
#define DS5002FP_SET_MON( _mcon) \
ROM_FILL( 0xc6, 1, _mcon)
@@ -597,7 +618,7 @@ public:
protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- /* SFR Callbacks */
+ // SFR Callbacks
virtual void sfr_write(size_t offset, uint8_t data) override;
virtual uint8_t sfr_read(size_t offset) override;
diff --git a/src/devices/cpu/mcs51/mcs51dasm.cpp b/src/devices/cpu/mcs51/mcs51dasm.cpp
index 13ec8a161e7..ab3489d928f 100644
--- a/src/devices/cpu/mcs51/mcs51dasm.cpp
+++ b/src/devices/cpu/mcs51/mcs51dasm.cpp
@@ -2,31 +2,19 @@
// copyright-holders:Steve Ellenoff
/*****************************************************************************
*
- * i8051dasm.c
- * Portable MCS-51 Family Emulator
+ * Portable MCS-51 Family Disassembler
+ * Copyright Steve Ellenoff
*
- * Chips in the family:
- * 8051 Product Line (8031,8051,8751)
- * 8052 Product Line (8032,8052,8752)
- * 8054 Product Line (8054)
- * 8058 Product Line (8058)
- *
- * Copyright Steve Ellenoff, all rights reserved.
- *
- * This work is based on:
- * #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
- * #2) 8051 simulator by Travis Marlatte
- * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
- *
- *****************************************************************************
* Symbol Memory Name Tables borrowed from:
* D52 8052 Disassembler - Copyright Jeffery L. Post
+ *
*****************************************************************************/
#include "emu.h"
#include "mcs51dasm.h"
// Note: addresses >= 0x100 are bit addresses
+// Note: place default_names last in constructors to allow other names to override it
const mcs51_disassembler::mem_info mcs51_disassembler::default_names[] = {
{ 0x00, "rb0r0" },
@@ -319,16 +307,16 @@ const mcs51_disassembler::mem_info mcs51_disassembler::i8xc751_names[] = {
{ 0x98, "i2con" },
{ 0x99, "i2dat" },
{ 0xd8, "i2cfg" },
- { 0xf8, "i2sta" }, /* read only */
+ { 0xf8, "i2sta" }, // read only
- { 0x198, "xstp" }, /* read: no function */
- { 0x199, "xstr" }, /* read: MASTER */
- { 0x19a, "cstp" }, /* read: STP */
- { 0x19b, "cstr" }, /* read: STR */
- { 0x19c, "carl" }, /* read: ARL */
- { 0x19d, "cdr" }, /* read: DRDY */
- { 0x19e, "idle" }, /* read: ATN */
- { 0x19f, "cxa" }, /* read: RDAT */
+ { 0x198, "xstp" }, // read: no function
+ { 0x199, "xstr" }, // read: MASTER
+ { 0x19a, "cstp" }, // read: STP
+ { 0x19b, "cstr" }, // read: STR
+ { 0x19c, "carl" }, // read: ARL
+ { 0x19d, "cdr" }, // read: DRDY
+ { 0x19e, "idle" }, // read: ATN
+ { 0x19f, "cxa" }, // read: RDAT
{ 0x1ac, "ei2" },
@@ -649,6 +637,120 @@ const mcs51_disassembler::mem_info mcs51_disassembler::rupi44_names[] = {
{ -1 }
};
+const mcs51_disassembler::mem_info mcs51_disassembler::p8xc562_names[] = {
+ { 0xa8, "ien0" },
+ { 0xa9, "cml0" },
+ { 0xaa, "cml1" },
+ { 0xab, "cml2" },
+ { 0xac, "ctl0" },
+ { 0xad, "ctl1" },
+ { 0xae, "ctl2" },
+ { 0xaf, "ctl3" },
+ { 0xb8, "ip0" },
+ { 0xc0, "p4" },
+ { 0xc4, "p5" },
+ { 0xc5, "adcon" },
+ { 0xc6, "adch" },
+ { 0xc8, "tm2ir" },
+ { 0xc9, "cmh0" },
+ { 0xca, "cmh1" },
+ { 0xcb, "cmh2" },
+ { 0xcc, "cth0" },
+ { 0xcd, "cth1" },
+ { 0xce, "cth2" },
+ { 0xcf, "cth3" },
+ { 0xe8, "ien1" },
+ { 0xea, "tm2con" },
+ { 0xeb, "ctcon" },
+ { 0xec, "tml2" },
+ { 0xed, "tmh2" },
+ { 0xee, "ste" },
+ { 0xef, "rte" },
+ { 0xf8, "ip1" },
+ { 0xfc, "pwm0" },
+ { 0xfd, "pwm1" },
+ { 0xfe, "pwmp" },
+ { 0xff, "t3" },
+
+ { 0x190, "ct0i" },
+ { 0x191, "ct1i" },
+ { 0x192, "ct2i" },
+ { 0x193, "ct3i" },
+ { 0x194, "t2" },
+ { 0x195, "rt2" },
+
+ { 0x1ae, "ead" },
+
+ { 0x1be, "pad" },
+
+ { 0x1c0, "cmsr0" },
+ { 0x1c1, "cmsr1" },
+ { 0x1c2, "cmsr2" },
+ { 0x1c3, "cmsr3" },
+ { 0x1c4, "cmsr4" },
+ { 0x1c5, "cmsr5" },
+ { 0x1c6, "cmt0" },
+ { 0x1c7, "cmt1" },
+
+ { 0x1c8, "cti0" },
+ { 0x1c9, "cti1" },
+ { 0x1ca, "cti2" },
+ { 0x1cb, "cti3" },
+ { 0x1cc, "cmi0" },
+ { 0x1cd, "cmi1" },
+ { 0x1ce, "cmi2" },
+ { 0x1cf, "t2ov" },
+
+ { 0x1e8, "ect0" },
+ { 0x1e9, "ect1" },
+ { 0x1ea, "ect2" },
+ { 0x1eb, "ect3" },
+ { 0x1ec, "ecm0" },
+ { 0x1ed, "ecm1" },
+ { 0x1ee, "ecm2" },
+ { 0x1ef, "et2" },
+
+ { 0x1f8, "pct0" },
+ { 0x1f9, "pct1" },
+ { 0x1fa, "pct2" },
+ { 0x1fb, "pct3" },
+ { 0x1fc, "pcm0" },
+ { 0x1fd, "pcm1" },
+ { 0x1fe, "pcm2" },
+ { 0x1ff, "pt2" },
+
+ { -1 }
+};
+
+const mcs51_disassembler::mem_info mcs51_disassembler::p8xc552_names[] = {
+ { 0x98, "s0con" },
+ { 0x99, "s0buf" },
+ { 0xd8, "s1con" },
+ { 0xd9, "s1sta" },
+ { 0xda, "s1dat" },
+ { 0xdb, "s1adr" },
+
+ { 0x196, "scl" },
+ { 0x197, "sda" },
+
+ { 0x1ac, "es0" },
+ { 0x1ad, "es1" },
+
+ { 0x1bc, "ps0" },
+ { 0x1bd, "ps1" },
+
+ { 0x1d8, "cr0" },
+ { 0x1d9, "cr1" },
+ { 0x1da, "aa" },
+ { 0x1db, "si" },
+ { 0x1dc, "sto" },
+ { 0x1dd, "sta" },
+ { 0x1de, "ens1" },
+ { 0x1df, "cr2" },
+
+ { -1 }
+};
+
mcs51_disassembler::mcs51_disassembler()
{
}
@@ -1543,7 +1645,7 @@ i8051_disassembler::i8051_disassembler() : mcs51_disassembler(default_names)
{
}
-i8052_disassembler::i8052_disassembler() : mcs51_disassembler(default_names, i8052_names)
+i8052_disassembler::i8052_disassembler() : mcs51_disassembler(i8052_names, default_names)
{
}
@@ -1551,34 +1653,42 @@ i80c51_disassembler::i80c51_disassembler() : mcs51_disassembler(default_names)
{
}
-i80c52_disassembler::i80c52_disassembler() : mcs51_disassembler(default_names, i8052_names, i80c52_names)
+i80c52_disassembler::i80c52_disassembler() : mcs51_disassembler(i8052_names, i80c52_names, default_names)
{
}
-i8xc51fx_disassembler::i8xc51fx_disassembler() : mcs51_disassembler(default_names, i8052_names, i80c52_names, i8xc51fx_names)
+i8xc51fx_disassembler::i8xc51fx_disassembler() : mcs51_disassembler(i8052_names, i80c52_names, i8xc51fx_names, default_names)
{
}
-i8xc51gb_disassembler::i8xc51gb_disassembler() : mcs51_disassembler(default_names, i8052_names, i80c52_names, i8xc51fx_names, i8xc51gb_names)
+i8xc51gb_disassembler::i8xc51gb_disassembler() : mcs51_disassembler(i8052_names, i80c52_names, i8xc51fx_names, i8xc51gb_names, default_names)
{
}
-ds5002fp_disassembler::ds5002fp_disassembler() : mcs51_disassembler(default_names, i8052_names, i80c52_names, ds5002fp_names, i8xc751_names)
+ds5002fp_disassembler::ds5002fp_disassembler() : mcs51_disassembler(i8052_names, i80c52_names, ds5002fp_names, i8xc751_names, default_names)
{
}
-ds80c320_disassembler::ds80c320_disassembler() : mcs51_disassembler(default_names, i8052_names, ds80c320_names)
+ds80c320_disassembler::ds80c320_disassembler() : mcs51_disassembler(i8052_names, ds80c320_names, default_names)
{
}
-sab80515_disassembler::sab80515_disassembler() : mcs51_disassembler(default_names, sab80515_names)
+sab80515_disassembler::sab80515_disassembler() : mcs51_disassembler(sab80515_names, default_names)
{
}
-sab80c515_disassembler::sab80c515_disassembler() : mcs51_disassembler(default_names, sab80515_names, sab80c515_names)
+sab80c515_disassembler::sab80c515_disassembler() : mcs51_disassembler(sab80515_names, sab80c515_names, default_names)
{
}
rupi44_disassembler::rupi44_disassembler() : mcs51_disassembler(rupi44_names)
{
}
+
+p8xc552_disassembler::p8xc552_disassembler() : mcs51_disassembler(p8xc562_names, p8xc552_names, default_names)
+{
+}
+
+p8xc562_disassembler::p8xc562_disassembler() : mcs51_disassembler(p8xc562_names, default_names)
+{
+}
diff --git a/src/devices/cpu/mcs51/mcs51dasm.h b/src/devices/cpu/mcs51/mcs51dasm.h
index b643ed150b9..4ef2a2fd486 100644
--- a/src/devices/cpu/mcs51/mcs51dasm.h
+++ b/src/devices/cpu/mcs51/mcs51dasm.h
@@ -2,25 +2,9 @@
// copyright-holders:Steve Ellenoff
/*****************************************************************************
*
- * i8051dasm.c
- * Portable MCS-51 Family Emulator
+ * Portable MCS-51 Family Disassembler
+ * Copyright Steve Ellenoff
*
- * Chips in the family:
- * 8051 Product Line (8031,8051,8751)
- * 8052 Product Line (8032,8052,8752)
- * 8054 Product Line (8054)
- * 8058 Product Line (8058)
- *
- * Copyright Steve Ellenoff, all rights reserved.
- *
- * This work is based on:
- * #1) 'Intel(tm) MC51 Microcontroller Family Users Manual' and
- * #2) 8051 simulator by Travis Marlatte
- * #3) Portable UPI-41/8041/8741/8042/8742 emulator V0.1 by Juergen Buchmueller (MAME CORE)
- *
- *****************************************************************************
- * Symbol Memory Name Tables borrowed from:
- * D52 8052 Disassembler - Copyright Jeffery L. Post
*****************************************************************************/
#ifndef MAME_CPU_MCS51_MCS51DASM_H
@@ -50,6 +34,8 @@ public:
static const mem_info sab80515_names[];
static const mem_info sab80c515_names[];
static const mem_info rupi44_names[];
+ static const mem_info p8xc552_names[];
+ static const mem_info p8xc562_names[];
template<typename ...Names> mcs51_disassembler(Names &&... names) : mcs51_disassembler() {
add_names(names...);
@@ -158,5 +144,19 @@ public:
virtual ~rupi44_disassembler() = default;
};
+class p8xc552_disassembler : public mcs51_disassembler
+{
+public:
+ p8xc552_disassembler();
+ virtual ~p8xc552_disassembler() = default;
+};
+
+class p8xc562_disassembler : public mcs51_disassembler
+{
+public:
+ p8xc562_disassembler();
+ virtual ~p8xc562_disassembler() = default;
+};
+
#endif
diff --git a/src/devices/cpu/mcs51/mcs51ops.hxx b/src/devices/cpu/mcs51/mcs51ops.hxx
index aed2fa897c8..5e7885b29f9 100644
--- a/src/devices/cpu/mcs51/mcs51ops.hxx
+++ b/src/devices/cpu/mcs51/mcs51ops.hxx
@@ -9,7 +9,7 @@
//ACALL code addr /* 1: aaa1 0001 */
OPHANDLER( acall )
{
- uint8_t addr = ROP_ARG(PC++); //Grab code address byte
+ uint8_t addr = ROP_ARG(PC++); //Grab code address byte
PUSH_PC(); //Save PC to the stack
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
@@ -18,81 +18,81 @@ OPHANDLER( acall )
//ADD A, #data /* 1: 0010 0100 */
OPHANDLER( add_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC, data, 0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, data addr /* 1: 0010 0101 */
OPHANDLER( add_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- uint8_t result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC, data, 0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, @R0/@R1 /* 1: 0010 011i */
OPHANDLER( add_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- uint8_t result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC, data, 0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADD A, R0 to R7 /* 1: 0010 1rrr */
OPHANDLER( add_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- uint8_t result = ACC + data; //Add data to accumulator
- DO_ADD_FLAGS(ACC,data,0); //Set Flags
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC + data; //Add data to accumulator
+ DO_ADD_FLAGS(ACC, data, 0); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, #data /* 1: 0011 0100 */
OPHANDLER( addc_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, data addr /* 1: 0011 0101 */
OPHANDLER( addc_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, @R0/@R1 /* 1: 0011 011i */
OPHANDLER( addc_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//ADDC A, R0 to R7 /* 1: 0011 1rrr */
OPHANDLER( addc_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
- DO_ADD_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC + data + GET_CY; //Add data + carry flag to accumulator
+ DO_ADD_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//AJMP code addr /* 1: aaa0 0001 */
OPHANDLER( ajmp )
{
- uint8_t addr = ROP_ARG(PC++); //Grab code address byte
+ uint8_t addr = ROP_ARG(PC++); //Grab code address byte
//Thanks Gerrit for help with this! :)
PC = (PC & 0xf800) | ((r & 0xe0) << 3) | addr;
}
@@ -100,136 +100,136 @@ OPHANDLER( ajmp )
//ANL data addr, A /* 1: 0101 0010 */
OPHANDLER( anl_mem_a )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data & ACC); //Set data address value to it's value Logical AND with ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, data & ACC); //Set data address value to it's value Logical AND with ACC
}
//ANL data addr, #data /* 1: 0101 0011 */
OPHANDLER( anl_mem_byte )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata & data); //Set data address value to it's value Logical AND with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, srcdata & data); //Set data address value to it's value Logical AND with Data
}
//ANL A, #data /* 1: 0101 0100 */
OPHANDLER( anl_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, data addr /* 1: 0101 0101 */
OPHANDLER( anl_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, @RO/@R1 /* 1: 0101 011i */
OPHANDLER( anl_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL A, RO to R7 /* 1: 0101 1rrr */
OPHANDLER( anl_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC & data); //Set ACC to value of ACC Logical AND with Data
}
//ANL C, bit addr /* 1: 1000 0010 */
OPHANDLER( anl_c_bitaddr )
{
int cy = GET_CY;
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- uint8_t bit = BIT_R(addr); //Grab bit data from bit address
- SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Bit
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
+ SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Bit
}
//ANL C,/bit addr /* 1: 1011 0000 */
OPHANDLER( anl_c_nbitaddr )
{
int cy = GET_CY;
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- uint8_t bit = BIT_R(addr); //Grab bit data from bit address
- bit = ((~bit)&1); //Complement bit
- SET_CY( (cy & bit) ); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
+ bit = (~bit & 1); //Complement bit
+ SET_CY(cy & bit); //Set Carry flag to Carry Flag Value Logical AND with Complemented Bit
}
//CJNE A, #data, code addr /* 1: 1011 0100 */
OPHANDLER( cjne_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC != data) //Jump if values are not equal
+ if (ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
- SET_CY( (ACC < data) );
+ SET_CY(ACC < data);
}
//CJNE A, data addr, code addr /* 1: 1011 0101 */
OPHANDLER( cjne_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- uint8_t data = IRAM_R(addr); //Pull value from data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t data = IRAM_R(addr); //Pull value from data address
- if(ACC != data) //Jump if values are not equal
+ if (ACC != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
- SET_CY( (ACC < data) );
+ SET_CY(ACC < data);
}
//CJNE @R0/@R1, #data, code addr /* 1: 1011 011i */
OPHANDLER( cjne_ir_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- uint8_t srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t srcdata = IRAM_IR(R_REG(r)); //Grab value pointed to by R0 or R1
- if(srcdata != data) //Jump if values are not equal
+ if (srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
- SET_CY( (srcdata < data) );
+ SET_CY(srcdata < data);
}
//CJNE R0 to R7, #data, code addr /* 1: 1011 1rrr */
OPHANDLER( cjne_r_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- uint8_t srcdata = R_REG(r); //Grab value of R0 - R7
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ uint8_t srcdata = R_REG(r); //Grab value of R0 - R7
- if(srcdata != data) //Jump if values are not equal
+ if (srcdata != data) //Jump if values are not equal
{
PC = PC + rel_addr;
}
//Set carry flag to 1 if 1st compare value is < 2nd compare value
- SET_CY( (srcdata < data) );
+ SET_CY(srcdata < data);
}
//CLR bit addr /* 1: 1100 0010 */
OPHANDLER( clr_bitaddr )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,0); //Clear bit at specified bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr, 0); //Clear bit at specified bit address
}
//CLR C /* 1: 1100 0011 */
@@ -241,29 +241,29 @@ OPHANDLER( clr_c )
//CLR A /* 1: 1110 0100 */
OPHANDLER( clr_a )
{
- SET_ACC(0); //Clear Accumulator
+ SET_ACC(0); //Clear Accumulator
}
//CPL bit addr /* 1: 1011 0010 */
OPHANDLER( cpl_bitaddr )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- uint8_t data = (~BIT_R(addr))&1;
- BIT_W(addr,data); //Complement bit at specified bit address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t data = (~BIT_R(addr)) & 1;
+ BIT_W(addr, data); //Complement bit at specified bit address
}
//CPL C /* 1: 1011 0011 */
OPHANDLER( cpl_c )
{
- uint8_t bit = (~GET_CY)&1; //Complement Carry Flag
+ uint8_t bit = (~GET_CY) & 1; //Complement Carry Flag
SET_CY(bit);
}
//CPL A /* 1: 1111 0100 */
OPHANDLER( cpl_a )
{
- uint8_t data = ((~ACC)&0xff);
- SET_ACC(data); //Complement Accumulator
+ uint8_t data = ((~ACC) & 0xff);
+ SET_ACC(data); //Complement Accumulator
}
//DA A /* 1: 1101 0100 */
@@ -278,34 +278,34 @@ OPHANDLER( da_a )
The carry flag will be set if the result is > 0x99, but not cleared otherwise */
uint16_t new_acc = ACC & 0xff;
- if(GET_AC || (new_acc & 0x0f) > 0x09)
+ if (GET_AC || (new_acc & 0x0f) > 0x09)
new_acc += 0x06;
- if(GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
+ if (GET_CY || ((new_acc & 0xf0) > 0x90) || (new_acc & ~0xff))
new_acc += 0x60;
- SET_ACC(new_acc&0xff);
- if(new_acc & ~0xff)
- SET_CY(1);
+ SET_ACC(new_acc & 0xff);
+ if (new_acc & ~0xff)
+ SET_CY(1);
}
//DEC A /* 1: 0001 0100 */
OPHANDLER( dec_a )
{
- SET_ACC(ACC-1);
+ SET_ACC(ACC - 1);
}
//DEC data addr /* 1: 0001 0101 */
OPHANDLER( dec_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
uint8_t data = IRAM_R(addr);
- IRAM_W(addr,data-1);
+ IRAM_W(addr, data - 1);
}
//DEC @R0/@R1 /* 1: 0001 011i */
OPHANDLER( dec_ir )
{
uint8_t data = IRAM_IR(R_REG(r));
- IRAM_IW(R_REG(r),data-1);
+ IRAM_IW(R_REG(r), data - 1);
}
//DEC R0 to R7 /* 1: 0001 1rrr */
@@ -317,14 +317,16 @@ OPHANDLER( dec_r )
//DIV AB /* 1: 1000 0100 */
OPHANDLER( div_ab )
{
- if( B == 0 ) {
+ if (B == 0)
+ {
//Overflow flag is set!
SET_OV(1);
//Really the values are undefined according to the manual, but we'll just leave them as is..
//SET_ACC(0xff);
- //SFR_W(B,0xff);
+ //SFR_W(B, 0xff);
}
- else {
+ else
+ {
int a = (int)ACC / B;
int b = (int)ACC % B;
//A gets quotient byte, B gets remainder byte
@@ -340,10 +342,10 @@ OPHANDLER( div_ab )
//DJNZ data addr, code addr /* 1: 1101 0101 */
OPHANDLER( djnz_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- IRAM_W(addr,IRAM_R(addr) - 1); //Decrement value contained at data address
- if(IRAM_R(addr) != 0) //Branch if contents of data address is not 0
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ IRAM_W(addr, IRAM_R(addr) - 1); //Decrement value contained at data address
+ if (IRAM_R(addr) != 0) //Branch if contents of data address is not 0
{
PC = PC + rel_addr;
}
@@ -352,9 +354,9 @@ OPHANDLER( djnz_mem )
//DJNZ R0 to R7,code addr /* 1: 1101 1rrr */
OPHANDLER( djnz_r )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- SET_REG(r ,R_REG(r) - 1); //Decrement value
- if(R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ SET_REG(r, R_REG(r) - 1); //Decrement value
+ if (R_REG(r) != 0) //Branch if contents of R0 - R7 is not 0
{
PC = PC + rel_addr;
}
@@ -363,22 +365,22 @@ OPHANDLER( djnz_r )
//INC A /* 1: 0000 0100 */
OPHANDLER( inc_a )
{
- SET_ACC(ACC+1);
+ SET_ACC(ACC + 1);
}
//INC data addr /* 1: 0000 0101 */
OPHANDLER( inc_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
uint8_t data = IRAM_R(addr);
- IRAM_W(addr,data+1);
+ IRAM_W(addr, data + 1);
}
//INC @R0/@R1 /* 1: 0000 011i */
OPHANDLER( inc_ir )
{
uint8_t data = IRAM_IR(R_REG(r));
- IRAM_IW(R_REG(r),data+1);
+ IRAM_IW(R_REG(r), data + 1);
}
//INC R0 to R7 /* 1: 0000 1rrr */
@@ -391,16 +393,16 @@ OPHANDLER( inc_r )
//INC DPTR /* 1: 1010 0011 */
OPHANDLER( inc_dptr )
{
- uint16_t dptr = (DPTR)+1;
+ uint16_t dptr = (DPTR) + 1;
SET_DPTR(dptr);
}
//JB bit addr, code addr /* 1: 0010 0000 */
OPHANDLER( jb )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(BIT_R(addr)) //If bit set at specified bit address, jump
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (BIT_R(addr)) //If bit set at specified bit address, jump
{
PC = PC + rel_addr;
}
@@ -409,19 +411,20 @@ OPHANDLER( jb )
//JBC bit addr, code addr /* 1: 0001 0000 */
OPHANDLER( jbc )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(BIT_R(addr)) { //If bit set at specified bit address, jump
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (BIT_R(addr)) //If bit set at specified bit address, jump
+ {
PC = PC + rel_addr;
- BIT_W(addr,0); //Clear Bit also
+ BIT_W(addr, 0); //Clear Bit also
}
}
//JC code addr /* 1: 0100 0000 */
OPHANDLER( jc )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(GET_CY) //Jump if Carry Flag Set
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (GET_CY) //Jump if Carry Flag Set
{
PC = PC + rel_addr;
}
@@ -436,9 +439,9 @@ OPHANDLER( jmp_iadptr )
//JNB bit addr, code addr /* 1: 0011 0000 */
OPHANDLER( jnb )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(!BIT_R(addr)) //If bit NOT set at specified bit address, jump
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (!BIT_R(addr)) //If bit NOT set at specified bit address, jump
{
PC = PC + rel_addr;
}
@@ -447,8 +450,8 @@ OPHANDLER( jnb )
//JNC code addr /* 1: 0101 0000 */
OPHANDLER( jnc )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(!GET_CY) //Jump if Carry Flag not set
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (!GET_CY) //Jump if Carry Flag not set
{
PC = PC + rel_addr;
}
@@ -457,20 +460,20 @@ OPHANDLER( jnc )
//JNZ code addr /* 1: 0111 0000 */
OPHANDLER( jnz )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC != 0) //Branch if ACC is not 0
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (ACC != 0) //Branch if ACC is not 0
{
- PC = PC+rel_addr;
+ PC = PC + rel_addr;
}
}
//JZ code addr /* 1: 0110 0000 */
OPHANDLER( jz )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
- if(ACC == 0) //Branch if ACC is 0
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ if (ACC == 0) //Branch if ACC is 0
{
- PC = PC+rel_addr;
+ PC = PC + rel_addr;
}
}
@@ -481,7 +484,7 @@ OPHANDLER( lcall )
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
PUSH_PC();
- PC = (uint16_t)((addr_hi<<8) | addr_lo);
+ PC = (uint16_t)((addr_hi << 8) | addr_lo);
}
//LJMP code addr /* 1: 0000 0010 */
@@ -490,21 +493,21 @@ OPHANDLER( ljmp )
uint8_t addr_hi, addr_lo;
addr_hi = ROP_ARG(PC++);
addr_lo = ROP_ARG(PC++);
- PC = (uint16_t)((addr_hi<<8) | addr_lo);
+ PC = (uint16_t)((addr_hi << 8) | addr_lo);
}
//MOV A, #data /* 1: 0111 0100 */
OPHANDLER( mov_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- SET_ACC(data); //Store data to ACC
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ SET_ACC(data); //Store data to ACC
}
//MOV A, data addr /* 1: 1110 0101 */
OPHANDLER( mov_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ SET_ACC(IRAM_R(addr)); //Store contents of data address to ACC
}
//MOV A,@RO/@R1 /* 1: 1110 011i */
@@ -522,9 +525,9 @@ OPHANDLER( mov_a_r )
//MOV data addr, #data /* 1: 0111 0101 */
OPHANDLER( mov_mem_byte )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = ROP_ARG(PC++); //Grab data
- IRAM_W(addr,data); //Store data to data address location
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ IRAM_W(addr, data); //Store data to data address location
}
//MOV data addr, data addr /* 1: 1000 0101 */
@@ -534,35 +537,35 @@ OPHANDLER( mov_mem_mem )
uint8_t src,dst;
src = ROP_ARG(PC++); //Grab source data address
dst = ROP_ARG(PC++); //Grab destination data address
- IRAM_W(dst,IRAM_R(src)); //Read source address contents and store to destination address
+ IRAM_W(dst, IRAM_R(src)); //Read source address contents and store to destination address
}
//MOV @R0/@R1, #data /* 1: 0111 011i */
OPHANDLER( mov_ir_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- IRAM_IW(R_REG(r),data); //Store data to address pointed by R0 or R1
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ IRAM_IW(R_REG(r), data); //Store data to address pointed by R0 or R1
}
//MOV R0 to R7, #data /* 1: 0111 1rrr */
OPHANDLER( mov_r_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- SET_REG(r, data); //Store to R0 - R7
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ SET_REG(r, data); //Store to R0 - R7
}
//MOV data addr, @R0/@R1 /* 1: 1000 011i */
OPHANDLER( mov_mem_ir )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr, IRAM_IR(R_REG(r))); //Store contents pointed to by R0 or R1 to data address
}
//MOV data addr,R0 to R7 /* 1: 1000 1rrr */
OPHANDLER( mov_mem_r )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,R_REG(r)); //Store contents of R0 - R7 to data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr, R_REG(r)); //Store contents of R0 - R7 to data address
}
//MOV DPTR, #data16 /* 1: 1001 0000 */
@@ -571,41 +574,41 @@ OPHANDLER( mov_dptr_byte )
uint8_t data_hi, data_lo;
data_hi = ROP_ARG(PC++); //Grab hi byte
data_lo = ROP_ARG(PC++); //Grab lo byte
- SET_DPTR((uint16_t)((data_hi<<8)|data_lo)); //Store to DPTR
+ SET_DPTR((uint16_t)((data_hi << 8) | data_lo)); //Store to DPTR
}
//MOV bit addr, C /* 1: 1001 0010 */
OPHANDLER( mov_bitaddr_c )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,GET_CY); //Store Carry Flag to Bit Address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr, GET_CY); //Store Carry Flag to Bit Address
}
//MOV @R0/@R1, data addr /* 1: 1010 011i */
OPHANDLER( mov_ir_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- IRAM_IW(R_REG(r),IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ IRAM_IW(R_REG(r), IRAM_R(addr)); //Store data from data address to address pointed to by R0 or R1
}
//MOV R0 to R7, data addr /* 1: 1010 1rrr */
OPHANDLER( mov_r_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
SET_REG(r, IRAM_R(addr)); //Store to R0 - R7
}
//MOV data addr, A /* 1: 1111 0101 */
OPHANDLER( mov_mem_a )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- IRAM_W(addr,ACC); //Store A to data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ IRAM_W(addr, ACC); //Store A to data address
}
//MOV @R0/@R1, A /* 1: 1111 011i */
OPHANDLER( mov_ir_a )
{
- IRAM_IW(R_REG(r),ACC); //Store A to location pointed to by R0 or R1
+ IRAM_IW(R_REG(r), ACC); //Store A to location pointed to by R0 or R1
}
//MOV R0 to R7, A /* 1: 1111 1rrr */
@@ -618,15 +621,15 @@ OPHANDLER( mov_r_a )
OPHANDLER( movc_a_iapc )
{
uint8_t data;
- data = CODEMEM_R(ACC+PC); //Move a byte from CODE(Program) Memory and store to ACC
+ data = CODEMEM_R(ACC + PC); //Move a byte from CODE(Program) Memory and store to ACC
SET_ACC(data);
}
//MOV C, bit addr /* 1: 1010 0010 */
OPHANDLER( mov_c_bitaddr )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- SET_CY( (BIT_R(addr)) ); //Store Bit from Bit Address to Carry Flag
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ SET_CY(BIT_R(addr)); //Store Bit from Bit Address to Carry Flag
}
//MOVC A, @A + DPTR /* 1: 1001 0011 */
@@ -641,35 +644,35 @@ OPHANDLER( movc_a_iadptr )
//(Move External Ram 16 bit address to A)
OPHANDLER( movx_a_idptr )
{
-// uint8_t byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
- uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
- uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
- SET_ACC(byte); //Store to ACC
+// uint8_t byte = DATAMEM_R(R_DPTR); //Grab 1 byte from External DATA memory pointed to by dptr
+ uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
+ uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by dptr
+ SET_ACC(byte); //Store to ACC
}
//MOVX A, @R0/@R1 /* 1: 1110 001i */
//(Move External Ram 8 bit address to A)
OPHANDLER( movx_a_ir )
{
- uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
- uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
- SET_ACC(byte); //Store to ACC
+ uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
+ uint8_t byte = DATAMEM_R(addr); //Grab 1 byte from External DATA memory pointed to by address
+ SET_ACC(byte); //Store to ACC
}
//MOVX @DPTR,A /* 1: 1111 0000 */
//(Move A to External Ram 16 bit address)
OPHANDLER( movx_idptr_a )
{
-// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
- uint32_t addr = ERAM_ADDR(DPTR, 0xFFFF);
- DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
+// DATAMEM_W(R_DPTR, ACC); //Store ACC to External DATA memory address pointed to by DPTR
+ uint32_t addr = ERAM_ADDR(DPTR, 0xffff);
+ DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address pointed to by DPTR
}
//MOVX @R0/@R1,A /* 1: 1111 001i */
//(Move A to External Ram 8 bit address)
OPHANDLER( movx_ir_a )
{
- uint32_t addr = ERAM_ADDR(R_REG(r),0xFF); //Grab address by reading location pointed to by R0 or R1
+ uint32_t addr = ERAM_ADDR(R_REG(r), 0xff); //Grab address by reading location pointed to by R0 or R1
DATAMEM_W(addr, ACC); //Store ACC to External DATA memory address
}
@@ -678,10 +681,10 @@ OPHANDLER( mul_ab )
{
uint16_t result = ACC * B;
//A gets lo bits, B gets hi bits of result
- B = (uint8_t) ((result & 0xFF00) >> 8);
- SET_ACC((uint8_t)(result & 0x00FF));
+ B = (uint8_t)((result & 0xff00) >> 8);
+ SET_ACC((uint8_t)(result & 0x00ff));
//Set flags
- SET_OV( ((result & 0x100) >> 8) ); //Set/Clear Overflow Flag if result > 255
+ SET_OV((result & 0x100) >> 8); //Set/Clear Overflow Flag if result > 255
SET_CY(0); //Carry Flag always cleared
}
@@ -693,83 +696,83 @@ OPHANDLER( nop )
//ORL data addr, A /* 1: 0100 0010 */
OPHANDLER( orl_mem_a )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data | ACC); //Set data address value to it's value Logical OR with ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, data | ACC); //Set data address value to it's value Logical OR with ACC
}
//ORL data addr, #data /* 1: 0100 0011 */
OPHANDLER( orl_mem_byte )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata | data); //Set data address value to it's value Logical OR with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, srcdata | data); //Set data address value to it's value Logical OR with Data
}
//ORL A, #data /* 1: 0100 0100 */
OPHANDLER( orl_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, data addr /* 1: 0100 0101 */
OPHANDLER( orl_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, @RO/@R1 /* 1: 0100 011i */
OPHANDLER( orl_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL A, RO to R7 /* 1: 0100 1rrr */
OPHANDLER( orl_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC | data); //Set ACC to value of ACC Logical OR with Data
}
//ORL C, bit addr /* 1: 0111 0010 */
OPHANDLER( orl_c_bitaddr )
{
int cy = GET_CY;
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- uint8_t bit = BIT_R(addr); //Grab bit data from bit address
- SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Bit
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
+ SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Bit
}
//ORL C, /bit addr /* 1: 1010 0000 */
OPHANDLER( orl_c_nbitaddr )
{
int cy = GET_CY;
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- uint8_t bit = BIT_R(addr); //Grab bit data from bit address
- bit = ((~bit)&1); //Complement bit
- SET_CY( (cy | bit) ); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ uint8_t bit = BIT_R(addr); //Grab bit data from bit address
+ bit = (~bit & 1); //Complement bit
+ SET_CY(cy | bit); //Set Carry flag to Carry Flag Value Logical OR with Complemented Bit
}
//POP data addr /* 1: 1101 0000 */
OPHANDLER( pop )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
IRAM_W(addr, IRAM_IR(SP)); //Store to contents of data addr, data pointed to by Stack - IRAM_IR needed to access upper 128 bytes of stack
//IRAM_IW(addr, IRAM_IR(R_SP)); //Store to contents of data addr, data pointed to by Stack - doesn't work, sfr's are not restored this way and it's not an indirect access anyway
- SP = SP-1; //Decrement SP
+ SP = SP - 1; //Decrement SP
}
//PUSH data addr /* 1: 1100 0000 */
OPHANDLER( push )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t tmpSP = SP+1; //Grab and Increment Stack Pointer
- SP = tmpSP; // ""
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t tmpSP = SP + 1; //Grab and Increment Stack Pointer
+ SP = tmpSP; // ""
IRAM_IW(tmpSP, IRAM_R(addr)); //Store to stack contents of data address - IRAM_IW needed to store to upper 128 bytes of stack, however, can't use IRAM_IR because that won't store the sfrs and it's not an indirect access anyway
}
@@ -791,8 +794,8 @@ OPHANDLER( rl_a )
{
//Left Shift A, Bit 7 carries to Bit 0
int carry = ((ACC & 0x80) >> 7);
- int data = (ACC<<1) & 0xfe;
- SET_ACC( data | carry);
+ int data = (ACC << 1) & 0xfe;
+ SET_ACC(data | carry);
}
//RLC A /* 1: 0011 0011 */
@@ -800,8 +803,8 @@ OPHANDLER( rlc_a )
{
//Left Shift A, Bit 7 goes to Carry Flag, Original Carry Flag goes to Bit 0 of ACC
int carry = ((ACC & 0x80) >> 7);
- int data = ((ACC<<1) & 0xfe) | GET_CY;
- SET_ACC( data);
+ int data = ((ACC << 1) & 0xfe) | GET_CY;
+ SET_ACC(data);
SET_CY(carry);
}
@@ -810,8 +813,8 @@ OPHANDLER( rr_a )
{
//Right Shift A, Bit 0 carries to Bit 7
int carry = ((ACC & 1) << 7);
- int data = (ACC>>1) & 0x7f;
- SET_ACC( data | carry);
+ int data = (ACC >> 1) & 0x7f;
+ SET_ACC(data | carry);
}
//RRC A /* 1: 0001 0011 */
@@ -819,37 +822,38 @@ OPHANDLER( rrc_a )
{
//Right Shift A, Bit 0 goes to Carry Flag, Bit 7 of ACC gets set to original Carry Flag
int carry = (ACC & 1);
- int data = ((ACC>>1) & 0x7f) | (GET_CY<<7);
- SET_ACC( data);
+ int data = ((ACC >> 1) & 0x7f) | (GET_CY << 7);
+ SET_ACC(data);
SET_CY(carry);
}
//SETB C /* 1: 1101 0011 */
OPHANDLER( setb_c )
{
- SET_CY(1); //Set Carry Flag
+ //Set Carry Flag
+ SET_CY(1);
}
//SETB bit addr /* 1: 1101 0010 */
OPHANDLER( setb_bitaddr )
{
- uint8_t addr = ROP_ARG(PC++); //Grab bit address
- BIT_W(addr,1); //Set Bit at Bit Address
+ uint8_t addr = ROP_ARG(PC++); //Grab bit address
+ BIT_W(addr, 1); //Set Bit at Bit Address
}
//SJMP code addr /* 1: 1000 0000 */
OPHANDLER( sjmp )
{
- int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
+ int8_t rel_addr = ROP_ARG(PC++); //Grab relative code address
PC = PC + rel_addr; //Update PC
}
//SUBB A, #data /* 1: 1001 0100 */
OPHANDLER( subb_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -857,28 +861,28 @@ OPHANDLER( subb_a_byte )
//SUBB A, data addr /* 1: 1001 0101 */
OPHANDLER( subb_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, @R0/@R1 /* 1: 1001 011i */
OPHANDLER( subb_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
- uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from memory pointed to by R0 or R1
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
//SUBB A, R0 to R7 /* 1: 1001 1rrr */
OPHANDLER( subb_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
- DO_SUB_FLAGS(ACC,data,GET_CY); //Set Flags
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ uint8_t result = ACC - data - GET_CY; //Subtract data & carry flag from accumulator
+ DO_SUB_FLAGS(ACC, data, GET_CY); //Set Flags
SET_ACC(result); //Store 8 bit result of addtion in ACC
}
@@ -888,34 +892,34 @@ OPHANDLER( swap_a )
uint8_t a_nib_lo, a_nib_hi;
a_nib_hi = (ACC & 0x0f) << 4; //Grab lo byte of ACC and move to hi
a_nib_lo = (ACC & 0xf0) >> 4; //Grab hi byte of ACC and move to lo
- SET_ACC( a_nib_hi | a_nib_lo);
+ SET_ACC(a_nib_hi | a_nib_lo);
}
//XCH A, data addr /* 1: 1100 0101 */
OPHANDLER( xch_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data
- uint8_t oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
- IRAM_W(addr,oldACC); //Sets data address to old value of ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data
+ uint8_t oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
+ IRAM_W(addr, oldACC); //Sets data address to old value of ACC
}
//XCH A, @RO/@R1 /* 1: 1100 011i */
OPHANDLER( xch_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
- uint8_t oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
- IRAM_IW(R_REG(r),oldACC); //Sets data address to old value of ACC
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
+ uint8_t oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
+ IRAM_IW(R_REG(r), oldACC); //Sets data address to old value of ACC
}
//XCH A, RO to R7 /* 1: 1100 1rrr */
OPHANDLER( xch_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0-R7
- uint8_t oldACC = ACC; //Hold value of ACC
- SET_ACC(data); //Sets ACC to data
+ uint8_t data = R_REG(r); //Grab data from R0-R7
+ uint8_t oldACC = ACC; //Hold value of ACC
+ SET_ACC(data); //Sets ACC to data
SET_REG(r, oldACC); //Sets data address to old value of ACC
}
@@ -923,56 +927,56 @@ OPHANDLER( xch_a_r )
OPHANDLER( xchd_a_ir )
{
uint8_t acc, ir_data;
- ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
- acc = ACC; //Grab ACC value
- SET_ACC( (acc & 0xf0) | (ir_data & 0x0f) ); //Set ACC to lower nibble of data pointed to by R0 or R1
- IRAM_W(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f) ); //Set data pointed to by R0 or R1 to lower nibble of ACC
+ ir_data = IRAM_IR(R_REG(r)); //Grab data pointed to by R0 or R1
+ acc = ACC; //Grab ACC value
+ SET_ACC((acc & 0xf0) | (ir_data & 0x0f)); //Set ACC to lower nibble of data pointed to by R0 or R1
+ IRAM_W(R_REG(r), (ir_data & 0xf0) | (acc & 0x0f)); //Set data pointed to by R0 or R1 to lower nibble of ACC
}
//XRL data addr, A /* 1: 0110 0010 */
OPHANDLER( xrl_mem_a )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,data ^ ACC); //Set data address value to it's value Logical XOR with ACC
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, data ^ ACC); //Set data address value to it's value Logical XOR with ACC
}
//XRL data addr, #data /* 1: 0110 0011 */
OPHANDLER( xrl_mem_byte )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = ROP_ARG(PC++); //Grab data
- uint8_t srcdata = IRAM_R(addr); //Grab data from data address
- IRAM_W(addr,srcdata ^ data); //Set data address value to it's value Logical XOR with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ uint8_t srcdata = IRAM_R(addr); //Grab data from data address
+ IRAM_W(addr, srcdata ^ data); //Set data address value to it's value Logical XOR with Data
}
//XRL A, #data /* 1: 0110 0100 */
OPHANDLER( xrl_a_byte )
{
- uint8_t data = ROP_ARG(PC++); //Grab data
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ uint8_t data = ROP_ARG(PC++); //Grab data
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, data addr /* 1: 0110 0101 */
OPHANDLER( xrl_a_mem )
{
- uint8_t addr = ROP_ARG(PC++); //Grab data address
- uint8_t data = IRAM_R(addr); //Grab data from data address
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ uint8_t addr = ROP_ARG(PC++); //Grab data address
+ uint8_t data = IRAM_R(addr); //Grab data from data address
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, @R0/@R1 /* 1: 0110 011i */
OPHANDLER( xrl_a_ir )
{
- uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ uint8_t data = IRAM_IR(R_REG(r)); //Grab data from address R0 or R1 points to
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//XRL A, R0 to R7 /* 1: 0110 1rrr */
OPHANDLER( xrl_a_r )
{
- uint8_t data = R_REG(r); //Grab data from R0 - R7
- SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
+ uint8_t data = R_REG(r); //Grab data from R0 - R7
+ SET_ACC(ACC ^ data); //Set ACC to value of ACC Logical XOR with Data
}
//illegal opcodes
diff --git a/src/devices/cpu/mcs96/i8x9x.h b/src/devices/cpu/mcs96/i8x9x.h
index 903e2c5c488..e499ce832be 100644
--- a/src/devices/cpu/mcs96/i8x9x.h
+++ b/src/devices/cpu/mcs96/i8x9x.h
@@ -70,10 +70,9 @@ public:
protected:
i8x9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int data_width);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual void execute_set_input(int linenum, int state) override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -82,7 +81,7 @@ protected:
virtual void do_exec_partial() override;
virtual void internal_update(u64 current_time) override;
- void internal_regs(address_map &map);
+ void internal_regs(address_map &map) ATTR_COLD;
void ad_command_w(u8 data);
u8 ad_result_r(offs_t offset);
void hsi_mode_w(u8 data);
diff --git a/src/devices/cpu/mcs96/i8xc196.h b/src/devices/cpu/mcs96/i8xc196.h
index 02d3e3d9840..f6bd1d0d193 100644
--- a/src/devices/cpu/mcs96/i8xc196.h
+++ b/src/devices/cpu/mcs96/i8xc196.h
@@ -22,7 +22,7 @@ protected:
virtual void do_exec_full() override;
virtual void do_exec_partial() override;
- void internal_regs(address_map &map);
+ void internal_regs(address_map &map) ATTR_COLD;
#define O(o) void o ## _196_full(); void o ## _196_partial()
diff --git a/src/devices/cpu/mcs96/mcs96.h b/src/devices/cpu/mcs96/mcs96.h
index eb22ae13d30..5acdef19cb2 100644
--- a/src/devices/cpu/mcs96/mcs96.h
+++ b/src/devices/cpu/mcs96/mcs96.h
@@ -47,8 +47,8 @@ protected:
mcs96_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int data_width, address_map_constructor regs_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
diff --git a/src/devices/cpu/mcs96/mcs96ops.lst b/src/devices/cpu/mcs96/mcs96ops.lst
index b6242a35a70..72db19afc0f 100644
--- a/src/devices/cpu/mcs96/mcs96ops.lst
+++ b/src/devices/cpu/mcs96/mcs96ops.lst
@@ -16,7 +16,7 @@ fetch
check_irq();
}
PPC = PC;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(PC);
OP1 = read_pc();
if(OP1 == 0xfe) {
@@ -27,7 +27,7 @@ fetch
fetch_noirq
PPC = PC;
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(PC);
OP1 = read_pc();
if(OP1 == 0xfe) {
diff --git a/src/devices/cpu/melps4/m58846.cpp b/src/devices/cpu/melps4/m58846.cpp
index 611f2d3af32..86b5a0c5c51 100644
--- a/src/devices/cpu/melps4/m58846.cpp
+++ b/src/devices/cpu/melps4/m58846.cpp
@@ -200,5 +200,5 @@ void m58846_device::execute_one()
}
break; // 0x1fc
- } // big switch
+ } // 0x1f0
}
diff --git a/src/devices/cpu/melps4/m58846.h b/src/devices/cpu/melps4/m58846.h
index 2ba855e3dd2..3f45829b685 100644
--- a/src/devices/cpu/melps4/m58846.h
+++ b/src/devices/cpu/melps4/m58846.h
@@ -23,8 +23,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_one() override;
@@ -33,8 +33,8 @@ protected:
virtual void write_v(u8 data) override;
TIMER_CALLBACK_MEMBER(timer_update);
- void data_128x4(address_map &map);
- void program_2kx9(address_map &map);
+ void data_128x4(address_map &map) ATTR_COLD;
+ void program_2kx9(address_map &map) ATTR_COLD;
emu_timer *m_timer;
void reset_timer();
diff --git a/src/devices/cpu/melps4/melps4.h b/src/devices/cpu/melps4/melps4.h
index 09894a1fa8e..3ce171f9d0a 100644
--- a/src/devices/cpu/melps4/melps4.h
+++ b/src/devices/cpu/melps4/melps4.h
@@ -93,15 +93,14 @@ protected:
melps4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, int d_pins, u8 sm_page, u8 int_page);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 6 - 1) / 6; } // 6 t-states per machine cycle
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 6); } // "
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 1+1; } // max opcode cycles + interrupt duration
- virtual u32 execute_input_lines() const noexcept override { return 3; } // up to 3 (some internal)
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
virtual void execute_one();
diff --git a/src/devices/cpu/melps4/melps4d.cpp b/src/devices/cpu/melps4/melps4d.cpp
index 5c40642bd6c..656bef4eee0 100644
--- a/src/devices/cpu/melps4/melps4d.cpp
+++ b/src/devices/cpu/melps4/melps4d.cpp
@@ -12,6 +12,24 @@
#include "emu.h"
#include "melps4d.h"
+
+// common lookup tables
+
+enum melps4_disassembler::e_mnemonics : unsigned
+{
+ mILL,
+ mTAB, mTBA, mTAY, mTYA, mTEAB, mTABE, mTEPA, mTXA, mTAX,
+ mLXY, mLZ, mINY, mDEY, mLCPS, mSADR,
+ mTAM, mXAM, mXAMD, mXAMI,
+ mLA, mAM, mAMC, mAMCS, mA, mSC, mRC, mSZC, mCMA, mRL, mRR,
+ mSB, mRB, mSZB, mSEAM, mSEY,
+ mTLA, mTHA, mTAJ, mXAL, mXAH, mLC7, mDEC, mSHL, mRHL, mCPA, mCPAS, mCPAE, mSZJ,
+ mT1AB, mTRAB, mT2AB, mTAB1, mTABR, mTAB2, mTVA, mTWA, mSNZ1, mSNZ2,
+ mBA, mSP, mB, mBM, mRT, mRTS, mRTI,
+ mCLD, mCLS, mCLDS, mSD, mRD, mSZD, mOSAB, mOSPA, mOSE, mIAS, mOFA, mIAF, mOGA, mIAK, mSZK, mSU, mRU,
+ mEI, mDI, mINTH, mINTL, mNOP
+};
+
const char *const melps4_disassembler::s_name[] =
{
"?",
@@ -124,18 +142,3 @@ offs_t melps4_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
return 1 | flags | SUPPORTED;
}
-
-u32 melps4_disassembler::opcode_alignment() const
-{
- return 1;
-}
-
-u32 melps4_disassembler::interface_flags() const
-{
- return PAGED;
-}
-
-u32 melps4_disassembler::page_address_bits() const
-{
- return 7;
-}
diff --git a/src/devices/cpu/melps4/melps4d.h b/src/devices/cpu/melps4/melps4d.h
index b03a506a60e..48155c38af8 100644
--- a/src/devices/cpu/melps4/melps4d.h
+++ b/src/devices/cpu/melps4/melps4d.h
@@ -17,28 +17,13 @@ public:
melps4_disassembler() = default;
virtual ~melps4_disassembler() = default;
- virtual u32 opcode_alignment() const override;
- virtual u32 interface_flags() const override;
- virtual u32 page_address_bits() const override;
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual u32 interface_flags() const override { return PAGED; }
+ virtual u32 page_address_bits() const override { return 7; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- // opcode mnemonics
- enum e_mnemonics
- {
- mILL,
- mTAB, mTBA, mTAY, mTYA, mTEAB, mTABE, mTEPA, mTXA, mTAX,
- mLXY, mLZ, mINY, mDEY, mLCPS, mSADR,
- mTAM, mXAM, mXAMD, mXAMI,
- mLA, mAM, mAMC, mAMCS, mA, mSC, mRC, mSZC, mCMA, mRL, mRR,
- mSB, mRB, mSZB, mSEAM, mSEY,
- mTLA, mTHA, mTAJ, mXAL, mXAH, mLC7, mDEC, mSHL, mRHL, mCPA, mCPAS, mCPAE, mSZJ,
- mT1AB, mTRAB, mT2AB, mTAB1, mTABR, mTAB2, mTVA, mTWA, mSNZ1, mSNZ2,
- mBA, mSP, mB, mBM, mRT, mRTS, mRTI,
- mCLD, mCLS, mCLDS, mSD, mRD, mSZD, mOSAB, mOSPA, mOSE, mIAS, mOFA, mIAF, mOGA, mIAK, mSZK, mSU, mRU,
- mEI, mDI, mINTH, mINTL, mNOP
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_name[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/minx/minx.cpp b/src/devices/cpu/minx/minx.cpp
index 28b1bcb5670..59c47039f13 100644
--- a/src/devices/cpu/minx/minx.cpp
+++ b/src/devices/cpu/minx/minx.cpp
@@ -41,7 +41,7 @@ TODO:
- Add support for O and C flags in NEG8 instruction
- Verify MUL (CE D8) and DIV (CE D9)
- Doublecheck behaviour of CMPN instructions ( CF 60 .. CF 63 )
-- DIV (CE D9) division by zero handling - is supposed to raise a EX4 exception. A real Pokemini unit will freeze. MAME currently will crash.
+- DIV (CE D9) division by zero handling - is supposed to raise a EX4 exception. A real Pokemini unit will freeze.
*/
@@ -212,6 +212,7 @@ void minx_cpu_device::execute_run()
if ( m_halted )
{
+ debugger_wait_hook();
m_icount -= insnminx_cycles_CE[0xAE];
}
else
diff --git a/src/devices/cpu/minx/minx.h b/src/devices/cpu/minx/minx.h
index 991916435ee..72ecceb9233 100644
--- a/src/devices/cpu/minx/minx.h
+++ b/src/devices/cpu/minx/minx.h
@@ -22,13 +22,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/minx/minxd.h b/src/devices/cpu/minx/minxd.h
index 08786c5dda8..4ab5803d1bb 100644
--- a/src/devices/cpu/minx/minxd.h
+++ b/src/devices/cpu/minx/minxd.h
@@ -7,8 +7,8 @@
************************************************************/
-#ifndef MAME_CPU_MINX_MINXDASM_H
-#define MAME_CPU_MINX_MINXDASM_H
+#ifndef MAME_CPU_MINX_MINXD_H
+#define MAME_CPU_MINX_MINXD_H
#pragma once
@@ -86,4 +86,4 @@ private:
static const minxdasm mnemonic_cf[256];
};
-#endif
+#endif // MAME_CPU_MINX_MINXD_H
diff --git a/src/devices/cpu/minx/minxopce.h b/src/devices/cpu/minx/minxopce.h
index ee322d668cb..f792e7898fa 100644
--- a/src/devices/cpu/minx/minxopce.h
+++ b/src/devices/cpu/minx/minxopce.h
@@ -454,7 +454,7 @@ void minx_cpu_device::execute_one_ce()
break;
case 0xD8: { m_HL = ( m_HL & 0x00FF ) * ( m_BA & 0x00FF ); }
break;
- case 0xD9: { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; }
+ case 0xD9: { if ( m_BA & 0x00FF ) { int d = m_HL / ( m_BA & 0x00FF ); m_HL = ( ( m_HL - ( ( m_BA & 0x00FF ) * d ) ) << 8 ) | d; } }
break;
case 0xDA: { /* illegal operation? */ }
break;
diff --git a/src/devices/cpu/mips/mips1.cpp b/src/devices/cpu/mips/mips1.cpp
index dafef5bea3f..2316da4b25d 100644
--- a/src/devices/cpu/mips/mips1.cpp
+++ b/src/devices/cpu/mips/mips1.cpp
@@ -17,8 +17,6 @@
#include "softfloat3/source/include/softfloat.h"
#define LOG_TLB (1U << 1)
-#define LOG_IOP (1U << 2)
-#define LOG_RISCOS (1U << 3)
//#define VERBOSE (LOG_GENERAL|LOG_TLB)
@@ -237,7 +235,7 @@ mips1_device_base::mips1_device_base(machine_config const &mconfig, device_type
}
r2000_device::r2000_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock, size_t icache_size, size_t dcache_size)
- : mips1_device_base(mconfig, R2000, tag, owner, clock, 0x0100, icache_size, dcache_size, false)
+ : mips1_device_base(mconfig, R2000, tag, owner, clock, 0x0120, icache_size, dcache_size, false)
{
}
@@ -385,24 +383,6 @@ void mips1core_device_base::execute_run()
// debugging
debugger_instruction_hook(m_pc);
- if (VERBOSE & LOG_IOP)
- {
- if ((m_pc & 0x1fffffff) == 0x00012C48 || (m_pc & 0x1fffffff) == 0x0001420C || (m_pc & 0x1fffffff) == 0x0001430C)
- {
- u32 ptr = m_r[5];
- u32 length = m_r[6];
- if (length >= 4096)
- length = 4095;
- while (length)
- {
- load<u8>(ptr, [](char c) { printf("%c", c); });
- ptr++;
- length--;
- }
- fflush(stdout);
- }
- }
-
// fetch instruction
fetch(m_pc, [this](u32 const op)
{
@@ -847,154 +827,6 @@ std::unique_ptr<util::disasm_interface> mips1core_device_base::create_disassembl
void mips1core_device_base::generate_exception(u32 exception, bool refill)
{
- if ((VERBOSE & LOG_RISCOS) && (exception == EXCEPTION_SYSCALL))
- {
- static char const *const sysv_syscalls[] =
- {
- "syscall", "exit", "fork", "read", "write", "open", "close", "wait", "creat", "link",
- "unlink", "execv", "chdir", "time", "mknod", "chmod", "chown", "brk", "stat", "lseek",
- "getpid", "mount", "umount", "setuid", "getuid", "stime", "ptrace", "alarm", "fstat", "pause",
- "utime", "stty", "gtty", "access", "nice", "statfs", "sync", "kill", "fstatfs", "setpgrp",
- nullptr, "dup", "pipe", "times", "profil", "plock", "setgid", "getgid", "signal", "msgsys",
- "sysmips", "acct", "shmsys", "semsys", "ioctl", "uadmin", nullptr, "utssys", nullptr, "execve",
- "umask", "chroot", "ofcntl", "ulimit", nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
- "advfs", "unadvfs", "rmount", "rumount", "rfstart", nullptr, "rdebug", "rfstop", "rfsys", "rmdir",
- "mkdir", "getdents", nullptr, nullptr, "sysfs", "getmsg", "putmsg", "poll", "sigreturn", "accept",
- "bind", "connect", "gethostid", "getpeername", "getsockname", "getsockopt", "listen", "recv", "recvfrom", "recvmsg",
- "select", "send", "sendmsg", "sendto", "sethostid", "setsockopt", "shutdown", "socket", "gethostname", "sethostname",
- "getdomainname","setdomainname","truncate", "ftruncate", "rename", "symlink", "readlink", "lstat", "nfsmount", "nfssvc",
- "getfh", "async_daemon", "old_exportfs", "mmap", "munmap", "getitimer", "setitimer", nullptr, nullptr, nullptr,
- nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
- nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
- "cacheflush", "cachectl", "fchown", "fchmod", "wait3", "mmap", "munmap", "madvise", "getpagesize", "setreuid",
- "setregid", "setpgid", "getgroups", "setgroups", "gettimeofday", "getrusage", "getrlimit", "setrlimit", "exportfs", "fcntl"
- };
-
- static char const *const bsd_syscalls[] =
- {
- "syscall", "exit", "fork", "read", "write", "open", "close", nullptr, "creat", "link",
- "unlink", "execv", "chdir", nullptr, "mknod", "chmod", "chown", "brk", nullptr, "lseek",
- "getpid", "omount", "oumount", nullptr, "getuid", nullptr, "ptrace", nullptr, nullptr, nullptr,
- nullptr, nullptr, nullptr, "access", nullptr, nullptr, "sync", "kill", "stat", nullptr,
- "lstat", "dup", "pipe", nullptr, "profil", nullptr, nullptr, "getgid", nullptr, nullptr,
- nullptr, "acct", nullptr, nullptr, "ioctl", "reboot", nullptr, "symlink", "readlink", "execve",
- "umask", "chroot", "fstat", nullptr, "getpagesize", "mremap", "vfork", nullptr, nullptr, "sbrk",
- "sstk", "mmap", "vadvise", "munmap", "mprotec", "madvise", "vhangup", nullptr, "mincore", "getgroups",
- "setgroups", "getpgrp", "setpgrp", "setitimer", "wait3", "swapon", "getitimer", "gethostname", "sethostname", "getdtablesize",
- "dup2", "getdopt", "fcntl", "select", "setdopt", "fsync", "setpriority", "socket", "connect", "accept",
- "getpriority", "send", "recv", "sigreturn", "bind", "setsockopt", "listen", nullptr, "sigvec", "sigblock",
- "sigsetmask", "sigpause", "sigstack", "recvmsg", "sendmsg", nullptr, "gettimeofday", "getrusage", "getsockopt", nullptr,
- "readv", "writev", "settimeofday", "fchown", "fchmod", "recvfrom", "setreuid", "setregid", "rename", "truncate",
- "ftruncate", "flock", nullptr, "sendto", "shutdown", "socketpair", "mkdir", "rmdir", "utimes", "sigcleanup",
- "adjtime", "getpeername", "gethostid", "sethostid", "getrlimit", "setrlimit", "killpg", nullptr, "setquota", "quota",
- "getsockname", "sysmips", "cacheflush", "cachectl", "debug", nullptr, nullptr, nullptr, "nfssvc", "getdirentries",
- "statfs", "fstatfs", "unmount", "async_daemon", "getfh", "getdomainname","setdomainname",nullptr, "quotactl", "old_exportfs",
- "mount", "hdwconf", "exportfs", "nfsfh_open", "libattach", "libdetach"
- };
-
- static char const *const msg_syscalls[] = { "msgget", "msgctl", "msgrcv", "msgsnd" };
- static char const *const shm_syscalls[] = { "shmat", "shmctl", "shmdt", "shmget" };
- static char const *const sem_syscalls[] = { "semctl", "semget", "semop" };
- static char const *const mips_syscalls[] = { "mipskopt", "mipshwconf", "mipsgetrusage", "mipswait", "mipscacheflush", "mipscachectl" };
-
- unsigned const asid = (m_cop0[COP0_EntryHi] & EH_ASID) >> 6;
- switch (m_r[2])
- {
- case 1000: // indirect
- switch (m_r[4])
- {
- case 1049: // msgsys
- LOGMASKED(LOG_RISCOS, "asid %d syscall msgsys:%s() (%s)\n",
- asid, (m_r[5] < std::size(msg_syscalls)) ? msg_syscalls[m_r[5]] : "unknown", machine().describe_context());
- break;
-
- case 1052: // shmsys
- LOGMASKED(LOG_RISCOS, "asid %d syscall shmsys:%s() (%s)\n",
- asid, (m_r[5] < std::size(shm_syscalls)) ? shm_syscalls[m_r[5]] : "unknown", machine().describe_context());
- break;
-
- case 1053: // semsys
- LOGMASKED(LOG_RISCOS, "asid %d syscall semsys:%s() (%s)\n",
- asid, (m_r[5] < std::size(sem_syscalls)) ? sem_syscalls[m_r[5]] : "unknown", machine().describe_context());
- break;
-
- case 2151: // bsd_sysmips
- switch (m_r[5])
- {
- case 0x100: // mipskopt
- LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_sysmips:mipskopt(\"%s\") (%s)\n",
- asid, debug_string(m_r[6]), machine().describe_context());
- break;
-
- default:
- if ((m_r[5] > 0x100) && (m_r[5] - 0x100) < std::size(mips_syscalls))
- LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_sysmips:%s() (%s)\n",
- asid, mips_syscalls[m_r[5] - 0x100], machine().describe_context());
- else
- LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_sysmips:unknown %d (%s)\n",
- asid, m_r[5], machine().describe_context());
- break;
- }
- break;
-
- default:
- if ((m_r[4] > 2000) && (m_r[4] - 2000 < std::size(bsd_syscalls)) && bsd_syscalls[m_r[4] - 2000])
- LOGMASKED(LOG_RISCOS, "asid %d syscall bsd_%s() (%s)\n",
- asid, bsd_syscalls[m_r[4] - 2000], machine().describe_context());
- else
- LOGMASKED(LOG_RISCOS, "asid %d syscall indirect:unknown %d (%s)\n",
- asid, m_r[4], machine().describe_context());
- break;
- }
- break;
-
- case 1003: // read
- case 1006: // close
- case 1054: // ioctl
- case 1169: // fcntl
- LOGMASKED(LOG_RISCOS, "asid %d syscall %s(%d) (%s)\n",
- asid, sysv_syscalls[m_r[2] - 1000], m_r[4], machine().describe_context());
- break;
-
- case 1004: // write
- if (m_r[4] == 1 || m_r[4] == 2)
- LOGMASKED(LOG_RISCOS, "asid %d syscall %s(%d, \"%s\") (%s)\n",
- asid, sysv_syscalls[m_r[2] - 1000], m_r[4], debug_string(m_r[5], m_r[6]), machine().describe_context());
- else
- LOGMASKED(LOG_RISCOS, "asid %d syscall %s(%d) (%s)\n",
- asid, sysv_syscalls[m_r[2] - 1000], m_r[4], machine().describe_context());
- break;
-
- case 1005: // open
- case 1008: // creat
- case 1009: // link
- case 1010: // unlink
- case 1012: // chdir
- case 1018: // stat
- case 1033: // access
- LOGMASKED(LOG_RISCOS, "asid %d syscall %s(\"%s\") (%s)\n",
- asid, sysv_syscalls[m_r[2] - 1000], debug_string(m_r[4]), machine().describe_context());
- break;
-
- case 1059: // execve
- LOGMASKED(LOG_RISCOS, "asid %d syscall execve(\"%s\", [ %s ], [ %s ]) (%s)\n",
- asid, debug_string(m_r[4]), debug_string_array(m_r[5]), debug_string_array(m_r[6]), machine().describe_context());
- break;
-
- case 1060: // umask
- LOGMASKED(LOG_RISCOS, "asid %d syscall umask(%#o) (%s)\n",
- asid, m_r[4] & 0777, machine().describe_context());
- break;
-
- default:
- if ((m_r[2] > 1000) && (m_r[2] - 1000 < std::size(sysv_syscalls)) && sysv_syscalls[m_r[2] - 1000])
- LOGMASKED(LOG_RISCOS, "asid %d syscall %s() (%s)\n", asid, sysv_syscalls[m_r[2] - 1000], machine().describe_context());
- else
- LOGMASKED(LOG_RISCOS, "asid %d syscall unknown %d (%s)\n", asid, m_r[2], machine().describe_context());
- break;
- }
- }
-
// set the exception PC
m_cop0[COP0_EPC] = m_pc;
@@ -1009,16 +841,17 @@ void mips1core_device_base::generate_exception(u32 exception, bool refill)
}
m_branch_state = EXCEPTION;
- // shift the exception bits
- SR = (SR & ~SR_KUIE) | ((SR << 2) & SR_KUIEop);
-
if (refill)
m_pc = (SR & SR_BEV) ? 0xbfc00100 : 0x80000000;
else
m_pc = (SR & SR_BEV) ? 0xbfc00180 : 0x80000080;
+ // hook exception in caller context enabling debugger access to memory parameters
debugger_exception_hook(exception);
+ // shift the exception bits
+ SR = (SR & ~SR_KUIE) | ((SR << 2) & SR_KUIEop);
+
if (SR & SR_KUp)
debugger_privilege_hook();
}
@@ -1490,64 +1323,6 @@ void mips1core_device_base::fetch(u32 address, std::function<void(u32)> &&apply)
apply(data);
}
-std::string mips1core_device_base::debug_string(u32 string_pointer, unsigned const limit)
-{
- auto const suppressor(machine().disable_side_effects());
-
- bool done = false;
- bool mapped = false;
- std::string result("");
-
- while (!done)
- {
- done = true;
- load<u8>(string_pointer++, [limit, &done, &mapped, &result](u8 byte)
- {
- mapped = true;
- if (byte != 0)
- {
- result += byte;
-
- done = result.length() == limit;
- }
- });
- }
-
- if (!mapped)
- result.assign("[unmapped]");
-
- return result;
-}
-
-std::string mips1core_device_base::debug_string_array(u32 array_pointer)
-{
- auto const suppressor(machine().disable_side_effects());
-
- bool done = false;
- std::string result("");
-
- while (!done)
- {
- done = true;
- load<u32>(array_pointer, [this, &done, &result](u32 string_pointer)
- {
- if (string_pointer != 0)
- {
- if (!result.empty())
- result += ", ";
-
- result += '\"' + debug_string(string_pointer) + '\"';
-
- done = false;
- }
- });
-
- array_pointer += 4;
- }
-
- return result;
-}
-
void mips1_device_base::device_start()
{
mips1core_device_base::device_start();
diff --git a/src/devices/cpu/mips/mips1.h b/src/devices/cpu/mips/mips1.h
index c94629a7896..5de7238281c 100644
--- a/src/devices/cpu/mips/mips1.h
+++ b/src/devices/cpu/mips/mips1.h
@@ -20,13 +20,12 @@ protected:
mips1core_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size, bool cache_pws);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 40; }
- virtual u32 execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -99,10 +98,6 @@ protected:
};
std::tuple<struct cache::line &, bool> cache_lookup(u32 address, bool invalidate, bool icache = false);
- // debug helpers
- std::string debug_string(u32 string_pointer, unsigned const limit = 0);
- std::string debug_string_array(u32 array_pointer);
-
// address spaces
address_space_config const m_program_config_be;
address_space_config const m_program_config_le;
@@ -164,8 +159,8 @@ protected:
mips1_device_base(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, u32 cpurev, size_t icache_size, size_t dcache_size, bool cache_pws);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual translate_result translate(int intention, offs_t &address, bool debug) override;
@@ -220,8 +215,8 @@ public:
r3041_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
class r3051_device : public mips1core_device_base
diff --git a/src/devices/cpu/mips/mips1dsm.cpp b/src/devices/cpu/mips/mips1dsm.cpp
index 8fd3af7b5e9..563e9e1715a 100644
--- a/src/devices/cpu/mips/mips1dsm.cpp
+++ b/src/devices/cpu/mips/mips1dsm.cpp
@@ -84,10 +84,12 @@ const char *const mips1_disassembler::ccreg[4][32] =
std::string mips1_disassembler::signed_16bit(int16_t val)
{
- if (val < 0)
- return util::string_format("-$%x", -val);
+ if (val >= -9 && val <= 9)
+ return util::string_format("%d", val);
+ else if (val < 0)
+ return util::string_format("-0x%x", -val);
else
- return util::string_format("$%x", val);
+ return util::string_format("0x%x", val);
}
uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::ostream &stream)
@@ -105,11 +107,9 @@ uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::os
case 0x08: /* BC */
switch (rt)
{
- case 0x00: util::stream_format(stream, "bc%df $%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bc%dt $%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bc%dfl [invalid]", cop); break;
- case 0x03: util::stream_format(stream, "bc%dtl [invalid]", cop); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ case 0x00: util::stream_format(stream, "bc%df 0x%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bc%dt 0x%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x10:
@@ -137,14 +137,13 @@ uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::os
case 0x06: util::stream_format(stream, "tlbwr"); break;
case 0x08: util::stream_format(stream, "tlbp"); break;
case 0x10: util::stream_format(stream, "rfe"); break;
- case 0x18: util::stream_format(stream, "eret [invalid]"); break;
- default: util::stream_format(stream, "cop%d $%07x", cop, op & 0x01ffffff); break;
+ default: util::stream_format(stream, "cop%d 0x%07x", cop, op & 0x01ffffff); break;
}
}
else
- util::stream_format(stream, "cop%d $%07x", cop, op & 0x01ffffff);
+ util::stream_format(stream, "cop%d 0x%07x", cop, op & 0x01ffffff);
break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return flags;
@@ -176,10 +175,10 @@ uint32_t mips1_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s
case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: util::stream_format(stream, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x03: util::stream_format(stream, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x00: util::stream_format(stream, "bc1f 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bc1t 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "bc1fl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x03: util::stream_format(stream, "bc1tl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
}
break;
default: /* COP */
@@ -226,7 +225,7 @@ uint32_t mips1_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s
case 0x3d: util::stream_format(stream, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
case 0x3e: util::stream_format(stream, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
case 0x3f: util::stream_format(stream, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break;
- default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break;
+ default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break;
}
break;
}
@@ -257,7 +256,7 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
case 0x04: util::stream_format(stream, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
case 0x06: util::stream_format(stream, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
case 0x07: util::stream_format(stream, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT; break;
+ case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT | step_over_extra(1); break;
case 0x09: if (rd == 31)
util::stream_format(stream, "jalr %s", reg[rs]);
else
@@ -266,7 +265,6 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
break;
case 0x0c: util::stream_format(stream, "syscall"); flags = STEP_OVER; break;
case 0x0d: util::stream_format(stream, "break"); flags = STEP_OVER; break;
- case 0x0f: util::stream_format(stream, "sync [invalid]"); break;
case 0x10: util::stream_format(stream, "mfhi %s", reg[rd]); break;
case 0x11: util::stream_format(stream, "mthi %s", reg[rs]); break;
case 0x12: util::stream_format(stream, "mflo %s", reg[rd]); break;
@@ -276,75 +274,96 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
case 0x1a: util::stream_format(stream, "div %s,%s", reg[rs], reg[rt]); break;
case 0x1b: util::stream_format(stream, "divu %s,%s", reg[rs], reg[rt]); break;
case 0x20: util::stream_format(stream, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x21: util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x22: util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x23: util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x21: if (rs == 0 || rt == 0)
+ util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]);
+ else
+ util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
+ case 0x22: if (rs == 0)
+ util::stream_format(stream, "neg %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
+ case 0x23: if (rs == 0)
+ util::stream_format(stream, "negu %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x24: util::stream_format(stream, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x25: util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x25: if (rs == 0 || rt == 0)
+ util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]);
+ else
+ util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x26: util::stream_format(stream, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x27: util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x27: if (rs == 0)
+ util::stream_format(stream, "not %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x2a: util::stream_format(stream, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x2b: util::stream_format(stream, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x30: util::stream_format(stream, "teq [invalid]"); break;
- case 0x31: util::stream_format(stream, "tgeu [invalid]"); break;
- case 0x32: util::stream_format(stream, "tlt [invalid]"); break;
- case 0x33: util::stream_format(stream, "tltu [invalid]"); break;
- case 0x34: util::stream_format(stream, "tge [invalid]"); break;
- case 0x36: util::stream_format(stream, "tne [invalid]"); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: util::stream_format(stream, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bltzl [invalid]"); break;
- case 0x03: util::stream_format(stream, "bgezl [invalid]"); break;
- case 0x08: util::stream_format(stream, "tgei [invalid]"); break;
- case 0x09: util::stream_format(stream, "tgeiu [invalid]"); break;
- case 0x0a: util::stream_format(stream, "tlti [invalid]"); break;
- case 0x0b: util::stream_format(stream, "tltiu [invalid]"); break;
- case 0x0c: util::stream_format(stream, "teqi [invalid]"); break;
- case 0x0e: util::stream_format(stream, "tnei [invalid]"); break;
- case 0x10: util::stream_format(stream, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
- case 0x11: util::stream_format(stream, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break;
- case 0x12: util::stream_format(stream, "bltzall [invalid]"); break;
- case 0x13: util::stream_format(stream, "bgezall [invalid]"); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ case 0x00: util::stream_format(stream, "bltz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bgez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x10: util::stream_format(stream, "bltzal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
+ case 0x11: if (rs == 0)
+ util::stream_format(stream, "bal 0x%08x", pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "bgezal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1);
+ break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
- case 0x02: util::stream_format(stream, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
- case 0x03: util::stream_format(stream, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "j 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
+ case 0x03: util::stream_format(stream, "jal 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break;
case 0x04: if (rs == 0 && rt == 0)
- util::stream_format(stream, "b $%08x", pc + 4 + ((int16_t)op << 2));
+ util::stream_format(stream, "b 0x%08x", pc + 4 + ((int16_t)op << 2));
else
{
- util::stream_format(stream, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ if (rt == 0)
+ util::stream_format(stream, "beqz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "beq %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
flags = STEP_COND | step_over_extra(1);
}
- break;
- case 0x05: util::stream_format(stream, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x06: util::stream_format(stream, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x07: util::stream_format(stream, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ break;
+ case 0x05: if (rt == 0)
+ util::stream_format(stream, "bnez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "bne %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_COND | step_over_extra(1);
+ break;
+ case 0x06: util::stream_format(stream, "blez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ case 0x07: util::stream_format(stream, "bgtz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
case 0x08: util::stream_format(stream, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x09: util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x09: if (rs == 0)
+ util::stream_format(stream, "li %s,%s", reg[rt], signed_16bit(op));
+ else
+ util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op));
+ break;
case 0x0a: util::stream_format(stream, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0b: util::stream_format(stream, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: util::stream_format(stream, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0d: util::stream_format(stream, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0e: util::stream_format(stream, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0f: util::stream_format(stream, "lui %s,$%04x", reg[rt], (uint16_t)op); break;
+ case 0x0c: util::stream_format(stream, "andi %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0d: if (rs == 0)
+ util::stream_format(stream, "li %s,0x%04x", reg[rt], (uint16_t)op);
+ else
+ util::stream_format(stream, "ori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op);
+ break;
+ case 0x0e: util::stream_format(stream, "xori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0f: util::stream_format(stream, "lui %s,0x%04x", reg[rt], (uint16_t)op); break;
case 0x10: flags = dasm_cop(pc, 0, op, stream); break;
case 0x11: flags = dasm_cop1(pc, op, stream); break;
case 0x12: flags = dasm_cop(pc, 2, op, stream); break;
case 0x13: flags = dasm_cop(pc, 3, op, stream); break;
- case 0x14: util::stream_format(stream, "beql [invalid]"); break;
- case 0x15: util::stream_format(stream, "bnel [invalid]"); break;
- case 0x16: util::stream_format(stream, "blezl [invalid]"); break;
- case 0x17: util::stream_format(stream, "bgtzl [invalid]"); break;
case 0x20: util::stream_format(stream, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x21: util::stream_format(stream, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x22: util::stream_format(stream, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
@@ -357,24 +376,13 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
case 0x2a: util::stream_format(stream, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x2b: util::stream_format(stream, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x2e: util::stream_format(stream, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- case 0x2f: util::stream_format(stream, "cache [invalid]"); break;
- case 0x30: util::stream_format(stream, "ll [invalid]"); break;
case 0x31: util::stream_format(stream, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
case 0x32: util::stream_format(stream, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
case 0x33: util::stream_format(stream, "lwc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
- case 0x34: util::stream_format(stream, "ldc0 [invalid]"); break;
- case 0x35: util::stream_format(stream, "ldc1 [invalid]"); break;
- case 0x36: util::stream_format(stream, "ldc2 [invalid]"); break;
- case 0x37: util::stream_format(stream, "ldc3 [invalid]"); break;
- case 0x38: util::stream_format(stream, "sc [invalid]"); break;
case 0x39: util::stream_format(stream, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
case 0x3a: util::stream_format(stream, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
case 0x3b: util::stream_format(stream, "swc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break;
- case 0x3c: util::stream_format(stream, "sdc0 [invalid]"); break;
- case 0x3d: util::stream_format(stream, "sdc1 [invalid]"); break;
- case 0x3e: util::stream_format(stream, "sdc2 [invalid]"); break;
- case 0x3f: util::stream_format(stream, "sdc3 [invalid]"); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 4 | flags | SUPPORTED;
}
diff --git a/src/devices/cpu/mips/mips3.cpp b/src/devices/cpu/mips/mips3.cpp
index 1db51f6e961..060c5acfc2f 100644
--- a/src/devices/cpu/mips/mips3.cpp
+++ b/src/devices/cpu/mips/mips3.cpp
@@ -429,9 +429,6 @@ void mips3_device::device_start()
}
}
- /* set up the endianness */
- m_program->accessors(m_memory);
-
/* allocate a timer for the compare interrupt */
m_compare_int_timer = timer_alloc(FUNC(mips3_device::compare_int_callback), this);
@@ -1204,11 +1201,11 @@ inline bool mips3_device::RBYTE(offs_t address, uint32_t *result)
*result = m_fastram[ramnum].offset_base8[tlbaddress ^ m_byte_xor];
return true;
}
- *result = (*m_memory.read_byte)(*m_program, tlbaddress);
+ *result = m_program->read_byte(tlbaddress);
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1237,11 +1234,11 @@ inline bool mips3_device::RHALF(offs_t address, uint32_t *result)
*result = m_fastram[ramnum].offset_base16[(tlbaddress ^ m_word_xor) >> 1];
return true;
}
- *result = (*m_memory.read_word)(*m_program, tlbaddress);
+ *result = m_program->read_word(tlbaddress);
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1270,11 +1267,11 @@ inline bool mips3_device::RWORD(offs_t address, uint32_t *result, bool insn)
*result = m_fastram[ramnum].offset_base32[(tlbaddress ^ m_dword_xor) >> 2];
return true;
}
- *result = (*m_memory.read_dword)(*m_program, tlbaddress);
+ *result = m_program->read_dword(tlbaddress);
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1293,11 +1290,11 @@ inline bool mips3_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & READ_ALLOWED)
{
- *result = (*m_memory.read_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
+ *result = m_program->read_dword((tlbval & ~0xfff) | (address & 0xfff), mem_mask);
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1316,11 +1313,11 @@ inline bool mips3_device::RDOUBLE(offs_t address, uint64_t *result)
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & READ_ALLOWED)
{
- *result = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
+ *result = m_program->read_qword((tlbval & ~0xfff) | (address & 0xfff));
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1339,11 +1336,11 @@ inline bool mips3_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint6
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & READ_ALLOWED)
{
- *result = (*m_memory.read_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask);
+ *result = m_program->read_qword((tlbval & ~0xfff) | (address & 0xfff), mem_mask);
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1372,15 +1369,15 @@ inline void mips3_device::WBYTE(offs_t address, uint8_t data)
m_fastram[ramnum].offset_base8[tlbaddress ^ m_byte_xor] = data;
return;
}
- (*m_memory.write_byte)(*m_program, tlbaddress, data);
+ m_program->write_byte(tlbaddress, data);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1406,15 +1403,15 @@ inline void mips3_device::WHALF(offs_t address, uint16_t data)
m_fastram[ramnum].offset_base16[(tlbaddress ^ m_word_xor) >> 1] = data;
return;
}
- (*m_memory.write_word)(*m_program, tlbaddress, data);
+ m_program->write_word(tlbaddress, data);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1440,15 +1437,15 @@ inline void mips3_device::WWORD(offs_t address, uint32_t data)
m_fastram[ramnum].offset_base32[(tlbaddress ^ m_dword_xor) >> 2] = data;
return;
}
- (*m_memory.write_dword)(*m_program, tlbaddress, data);
+ m_program->write_dword(tlbaddress, data);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1464,15 +1461,15 @@ inline void mips3_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t m
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & WRITE_ALLOWED)
{
- (*m_memory.write_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
+ m_program->write_dword((tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1488,15 +1485,15 @@ inline void mips3_device::WDOUBLE(offs_t address, uint64_t data)
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & WRITE_ALLOWED)
{
- (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data);
+ m_program->write_qword((tlbval & ~0xfff) | (address & 0xfff), data);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1512,15 +1509,15 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & WRITE_ALLOWED)
{
- (*m_memory.write_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
+ m_program->write_qword((tlbval & ~0xfff) | (address & 0xfff), data, mem_mask);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1535,7 +1532,7 @@ inline bool r4650_device::RBYTE(offs_t address, uint32_t *result)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_byte)(*m_program, address);
+ *result = m_program->read_byte(address);
return true;
}
@@ -1545,7 +1542,7 @@ inline bool r4650_device::RBYTE(offs_t address, uint32_t *result)
*result = 0;
return false;
}
- *result = (*m_memory.read_byte)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ *result = m_program->read_byte(address + m_core->cpr[0][COP0_R4650_DBase]);
return true;
}
@@ -1553,7 +1550,7 @@ inline bool r4650_device::RHALF(offs_t address, uint32_t *result)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_word)(*m_program, address);
+ *result = m_program->read_word(address);
return true;
}
@@ -1563,7 +1560,7 @@ inline bool r4650_device::RHALF(offs_t address, uint32_t *result)
*result = 0;
return false;
}
- *result = (*m_memory.read_word)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ *result = m_program->read_word(address + m_core->cpr[0][COP0_R4650_DBase]);
return true;
}
@@ -1571,7 +1568,7 @@ inline bool r4650_device::RWORD(offs_t address, uint32_t *result, bool insn)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_dword)(*m_program, address);
+ *result = m_program->read_dword(address);
return true;
}
@@ -1585,7 +1582,7 @@ inline bool r4650_device::RWORD(offs_t address, uint32_t *result, bool insn)
*result = 0;
return false;
}
- *result = (*m_memory.read_dword)(*m_program, address + base);
+ *result = m_program->read_dword(address + base);
return true;
}
@@ -1593,7 +1590,7 @@ inline bool r4650_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
+ *result = m_program->read_dword(address, mem_mask);
return true;
}
@@ -1603,7 +1600,7 @@ inline bool r4650_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_
*result = 0;
return false;
}
- *result = (*m_memory.read_dword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
+ *result = m_program->read_dword(address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
return true;
}
@@ -1611,7 +1608,7 @@ inline bool r4650_device::RDOUBLE(offs_t address, uint64_t *result)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_qword)(*m_program, address);
+ *result = m_program->read_qword(address);
return true;
}
@@ -1621,7 +1618,7 @@ inline bool r4650_device::RDOUBLE(offs_t address, uint64_t *result)
*result = 0;
return false;
}
- *result = (*m_memory.read_qword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase]);
+ *result = m_program->read_qword(address + m_core->cpr[0][COP0_R4650_DBase]);
return true;
}
@@ -1629,7 +1626,7 @@ inline bool r4650_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint6
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
{
- *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
+ *result = m_program->read_qword(address, mem_mask);
return true;
}
@@ -1639,102 +1636,103 @@ inline bool r4650_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint6
*result = 0;
return false;
}
- *result = (*m_memory.read_qword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
+ *result = m_program->read_qword(address + m_core->cpr[0][COP0_R4650_DBase], mem_mask);
return true;
}
inline void r4650_device::WBYTE(offs_t address, uint8_t data)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_byte)(*m_program, address, data);
+ m_program->write_byte(address, data);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_byte)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+ m_program->write_byte(address + m_core->cpr[0][COP0_R4650_DBound], data);
}
inline void r4650_device::WHALF(offs_t address, uint16_t data)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_word)(*m_program, address, data);
+ m_program->write_word(address, data);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_word)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+ m_program->write_word(address + m_core->cpr[0][COP0_R4650_DBound], data);
}
inline void r4650_device::WWORD(offs_t address, uint32_t data)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_dword)(*m_program, address, data);
+ m_program->write_dword(address, data);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_dword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+ m_program->write_dword(address + m_core->cpr[0][COP0_R4650_DBound], data);
}
inline void r4650_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
+ m_program->write_dword(address, data, mem_mask);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_dword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
+ m_program->write_dword(address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
}
inline void r4650_device::WDOUBLE(offs_t address, uint64_t data)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_qword)(*m_program, address, data);
+ m_program->write_qword(address, data);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_qword)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data);
+ m_program->write_qword(address + m_core->cpr[0][COP0_R4650_DBound], data);
}
inline void r4650_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
if ((SR & SR_KSU_USER) == SR_KSU_KERNEL)
- (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
+ m_program->write_qword(address, data, mem_mask);
else if ((address & 0xfffff000) > m_core->cpr[0][COP0_R4650_DBound])
generate_tlb_exception(EXCEPTION_ADDRSTORE, address);
else
- (*m_memory.write_qword_masked)(*m_program, address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
+ m_program->write_qword(address + m_core->cpr[0][COP0_R4650_DBound], data, mem_mask);
}
inline void r5900_device::WBYTE(offs_t address, uint8_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_byte)(*m_program, address, data);
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_byte(address, data);
else mips3_device::WBYTE(address, data);
}
inline void r5900_device::WHALF(offs_t address, uint16_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_word)(*m_program, address, data);
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_word(address, data);
else mips3_device::WHALF(address, data);
}
inline void r5900_device::WWORD(offs_t address, uint32_t data)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword)(*m_program, address, data);
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_dword(address, data);
else mips3_device::WWORD(address, data);
}
inline void r5900_device::WWORD_MASKED(offs_t address, uint32_t data, uint32_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_dword_masked)(*m_program, address, data, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_dword(address, data, mem_mask);
else mips3_device::WWORD_MASKED(address, data, mem_mask);
}
-inline void r5900_device::WDOUBLE(offs_t address, uint64_t data) {
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword)(*m_program, address, data);
+inline void r5900_device::WDOUBLE(offs_t address, uint64_t data)
+{
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_qword(address, data);
else mips3_device::WDOUBLE(address, data);
}
inline void r5900_device::WDOUBLE_MASKED(offs_t address, uint64_t data, uint64_t mem_mask)
{
- if (address >= 0x70000000 && address < 0x70004000) (*m_memory.write_qword_masked)(*m_program, address, data, mem_mask);
+ if (address >= 0x70000000 && address < 0x70004000) m_program->write_qword(address, data, mem_mask);
else mips3_device::WDOUBLE_MASKED(address, data, mem_mask);
}
@@ -1742,24 +1740,24 @@ inline void r5900le_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
{
if (address >= 0x70000000 && address < 0x70004000)
{
- (*m_memory.write_qword)(*m_program, address, data_lo);
- (*m_memory.write_qword)(*m_program, address + 8, data_hi);
+ m_program->write_qword(address, data_lo);
+ m_program->write_qword(address + 8, data_hi);
return;
}
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & WRITE_ALLOWED)
{
- (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data_lo);
- (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff), data_hi);
+ m_program->write_qword((tlbval & ~0xfff) | (address & 0xfff), data_lo);
+ m_program->write_qword((tlbval & ~0xfff) | ((address + 8) & 0xfff), data_hi);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1774,24 +1772,24 @@ inline void r5900be_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
{
if (address >= 0x70000000 && address < 0x70004000)
{
- (*m_memory.write_qword)(*m_program, address, data_hi);
- (*m_memory.write_qword)(*m_program, address + 8, data_lo);
+ m_program->write_qword(address, data_hi);
+ m_program->write_qword(address + 8, data_lo);
return;
}
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & WRITE_ALLOWED)
{
- (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data_hi);
- (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff), data_lo);
+ m_program->write_qword((tlbval & ~0xfff) | (address & 0xfff), data_hi);
+ m_program->write_qword((tlbval & ~0xfff) | ((address + 8) & 0xfff), data_lo);
}
else
{
- if(tlbval & READ_ALLOWED)
+ if (tlbval & READ_ALLOWED)
{
generate_tlb_exception(EXCEPTION_TLBMOD, address);
}
- else if(tlbval & FLAG_FIXED)
+ else if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBSTORE, address);
}
@@ -1802,9 +1800,11 @@ inline void r5900be_device::WQUAD(offs_t address, uint64_t data_hi, uint64_t dat
}
}
-inline bool r5900_device::RBYTE(offs_t address, uint32_t *result) {
- if (address >= 0x70000000 && address < 0x70004000) {
- *result = (*m_memory.read_byte)(*m_program, address);
+inline bool r5900_device::RBYTE(offs_t address, uint32_t *result)
+{
+ if (address >= 0x70000000 && address < 0x70004000)
+ {
+ *result = m_program->read_byte(address);
return true;
}
return mips3_device::RBYTE(address, result);
@@ -1814,7 +1814,7 @@ inline bool r5900_device::RHALF(offs_t address, uint32_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result = (*m_memory.read_word)(*m_program, address);
+ *result = m_program->read_word(address);
return true;
}
return mips3_device::RHALF(address, result);
@@ -1824,7 +1824,7 @@ inline bool r5900_device::RWORD(offs_t address, uint32_t *result, bool insn)
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result = (*m_memory.read_dword)(*m_program, address);
+ *result = m_program->read_dword(address);
return true;
}
return mips3_device::RWORD(address, result, insn);
@@ -1834,7 +1834,7 @@ inline bool r5900_device::RWORD_MASKED(offs_t address, uint32_t *result, uint32_
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result = (*m_memory.read_dword_masked)(*m_program, address, mem_mask);
+ *result = m_program->read_dword(address, mem_mask);
return true;
}
return mips3_device::RWORD_MASKED(address, result, mem_mask);
@@ -1844,7 +1844,7 @@ inline bool r5900_device::RDOUBLE(offs_t address, uint64_t *result)
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result = (*m_memory.read_qword)(*m_program, address);
+ *result = m_program->read_qword(address);
return true;
}
return mips3_device::RDOUBLE(address, result);
@@ -1854,7 +1854,7 @@ inline bool r5900_device::RDOUBLE_MASKED(offs_t address, uint64_t *result, uint6
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result = (*m_memory.read_qword_masked)(*m_program, address, mem_mask);
+ *result = m_program->read_qword(address, mem_mask);
return true;
}
return mips3_device::RDOUBLE_MASKED(address, result, mem_mask);
@@ -1864,20 +1864,20 @@ inline bool r5900le_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result_lo = (*m_memory.read_qword)(*m_program, address);
- *result_hi = (*m_memory.read_qword)(*m_program, address + 8);
+ *result_lo = m_program->read_qword(address);
+ *result_hi = m_program->read_qword(address + 8);
return true;
}
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & READ_ALLOWED)
{
- *result_lo = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
- *result_hi = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff));
+ *result_lo = m_program->read_qword((tlbval & ~0xfff) | (address & 0xfff));
+ *result_hi = m_program->read_qword((tlbval & ~0xfff) | ((address + 8) & 0xfff));
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -1896,20 +1896,20 @@ inline bool r5900be_device::RQUAD(offs_t address, uint64_t *result_hi, uint64_t
{
if (address >= 0x70000000 && address < 0x70004000)
{
- *result_hi = (*m_memory.read_qword)(*m_program, address);
- *result_lo = (*m_memory.read_qword)(*m_program, address + 8);
+ *result_hi = m_program->read_qword(address);
+ *result_lo = m_program->read_qword(address + 8);
return true;
}
const uint32_t tlbval = vtlb_table()[address >> 12];
if (tlbval & READ_ALLOWED)
{
- *result_hi = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff));
- *result_lo = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | ((address + 8) & 0xfff));
+ *result_hi = m_program->read_qword((tlbval & ~0xfff) | (address & 0xfff));
+ *result_lo = m_program->read_qword((tlbval & ~0xfff) | ((address + 8) & 0xfff));
}
else
{
- if(tlbval & FLAG_FIXED)
+ if (tlbval & FLAG_FIXED)
{
generate_tlb_exception(EXCEPTION_TLBLOAD, address);
}
@@ -2255,25 +2255,31 @@ void mips3_device::handle_cop1_fr0(uint32_t op)
break;
case 0x03:
- if (IS_SINGLE(op)) { /* DIV.S */
- if (FTVALW_FR0 == 0 && (COP1_FCR31 & (1 << (FCR31_ENABLE + FPE_DIV0)))) {
+ if (IS_SINGLE(op)) /* DIV.S */
+ {
+ if (FTVALW_FR0 == 0 && (COP1_FCR31 & (1 << (FCR31_ENABLE + FPE_DIV0))))
+ {
COP1_FCR31 |= (1 << (FCR31_FLAGS + FPE_DIV0)); // Set flag
COP1_FCR31 |= (1 << (FCR31_CAUSE + FPE_DIV0)); // Set cause
generate_exception(EXCEPTION_FPE, 1);
//machine().debug_break();
}
- else {
+ else
+ {
FDVALS_FR0 = FSVALS_FR0 / FTVALS_FR0;
}
}
- else { /* DIV.D */
- if (FTVALL_FR0 == 0ull && (COP1_FCR31 & (1 << (FCR31_ENABLE + FPE_DIV0)))) {
+ else /* DIV.D */
+ {
+ if (FTVALL_FR0 == 0ull && (COP1_FCR31 & (1 << (FCR31_ENABLE + FPE_DIV0))))
+ {
COP1_FCR31 |= (1 << (FCR31_FLAGS + FPE_DIV0)); // Set flag
COP1_FCR31 |= (1 << (FCR31_CAUSE + FPE_DIV0)); // Set cause
generate_exception(EXCEPTION_FPE, 1);
//machine().debug_break();
}
- else {
+ else
+ {
FDVALD_FR0 = FSVALD_FR0 / FTVALD_FR0;
}
}
@@ -3756,7 +3762,7 @@ void mips3_device::handle_regimm(uint32_t op)
void mips3_device::handle_mult(uint32_t op)
{
- uint64_t temp64 = (int64_t)(int32_t)RSVAL32 * (int64_t)(int32_t)RTVAL32;
+ uint64_t temp64 = mul_32x32(RSVAL32, RTVAL32);
LOVAL64 = (int32_t)temp64;
HIVAL64 = (int32_t)(temp64 >> 32);
m_core->icount -= 3;
@@ -3770,7 +3776,7 @@ void r5900_device::handle_mult(uint32_t op)
void mips3_device::handle_multu(uint32_t op)
{
- uint64_t temp64 = (uint64_t)RSVAL32 * (uint64_t)RTVAL32;
+ uint64_t temp64 = mulu_32x32(RSVAL32, RTVAL32);
LOVAL64 = (int32_t)temp64;
HIVAL64 = (int32_t)(temp64 >> 32);
m_core->icount -= 3;
@@ -3906,8 +3912,28 @@ void mips3_device::handle_idt(uint32_t op)
{
switch (op & 0x1f)
{
+ case 0: /* MAD */
+ if (RSREG != 0 && RTREG != 0)
+ {
+ int64_t temp64 = mul_32x32(RSVAL32, RTVAL32);
+ temp64 += ((int64_t)m_core->r[REG_HI] << 32) | m_core->r[REG_LO];
+ m_core->r[REG_LO] = (int32_t)temp64;
+ m_core->r[REG_HI] = (int32_t)(temp64 >> 32);
+ }
+ m_core->icount -= 3;
+ break;
+ case 1: /* MADU */
+ if (RSREG != 0 && RTREG != 0)
+ {
+ uint64_t temp64 = mulu_32x32(RSVAL32, RTVAL32);
+ temp64 += ((uint64_t)m_core->r[REG_HI] << 32) | m_core->r[REG_LO];
+ m_core->r[REG_LO] = (uint32_t)temp64;
+ m_core->r[REG_HI] = (uint32_t)(temp64 >> 32);
+ }
+ m_core->icount -= 3;
+ break;
case 2: /* MUL */
- RDVAL64 = (int32_t)((int32_t)RSVAL32 * (int32_t)RTVAL32);
+ if (RDREG) RDVAL64 = (int32_t)((int32_t)RSVAL32 * (int32_t)RTVAL32);
m_core->icount -= 3;
break;
default:
@@ -4024,7 +4050,7 @@ void r5900_device::handle_idt(uint32_t op)
{
case 0x00: /* MADD */
{
- uint64_t temp64 = (int64_t)(int32_t)RSVAL32 * (int64_t)(int32_t)RTVAL32;
+ uint64_t temp64 = mul_32x32(RSVAL32, RTVAL32);
m_core->r[REG_LO] += (int32_t)temp64;
m_core->r[REG_HI] += (int32_t)(temp64 >> 32);
if (rd)
@@ -4078,7 +4104,7 @@ void r5900_device::handle_idt(uint32_t op)
break;
case 0x18: /* MULT1 */
{
- uint64_t temp64 = (int64_t)(int32_t)RSVAL32 * (int64_t)(int32_t)RTVAL32;
+ uint64_t temp64 = mul_32x32(RSVAL32, RTVAL32);
m_core->rh[REG_LO] = (int32_t)temp64;
m_core->rh[REG_HI] = (int32_t)(temp64 >> 32);
if (rd)
diff --git a/src/devices/cpu/mips/mips3.h b/src/devices/cpu/mips/mips3.h
index 67d74eea7fb..73105cb0ad3 100644
--- a/src/devices/cpu/mips/mips3.h
+++ b/src/devices/cpu/mips/mips3.h
@@ -313,14 +313,13 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 40; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -449,7 +448,6 @@ protected:
uint32_t m_byte_xor;
uint32_t m_word_xor;
uint32_t m_dword_xor;
- data_accessors m_memory;
/* cache memory */
size_t c_icache_size;
@@ -524,7 +522,7 @@ protected:
void static_generate_memory_mode_checks(drcuml_block &block, uml::code_handle &exception_addrerr, int &label, int mode);
void static_generate_fastram_accessor(drcuml_block &block, int &label, int size, bool iswrite, bool ismasked);
void static_generate_memory_rw(drcuml_block &block, int size, bool iswrite, bool ismasked);
- virtual void static_generate_memory_accessor(int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr);
+ virtual void static_generate_memory_accessor(drcuml_block &block, int &label, int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr);
virtual void check_irqs();
virtual void handle_mult(uint32_t op);
@@ -622,11 +620,11 @@ private:
uml::code_label labelnum; /* index for local labels */
};
- void static_generate_entry_point();
- void static_generate_nocode_handler();
- void static_generate_out_of_cycles();
- void static_generate_tlb_mismatch();
- void static_generate_exception(uint8_t exception, int recover, const char *name);
+ void static_generate_entry_point(drcuml_block &block, int &label);
+ void static_generate_nocode_handler(drcuml_block &block, int &label);
+ void static_generate_out_of_cycles(drcuml_block &block, int &label);
+ void static_generate_tlb_mismatch(drcuml_block &block, int &label);
+ void static_generate_exception(drcuml_block &block, int &label, uint8_t exception, int recover, const char *name);
void generate_update_mode(drcuml_block &block);
void generate_update_cycles(drcuml_block &block, compiler_state &compiler, uml::parameter param, bool allow_exception);
@@ -760,7 +758,7 @@ public:
protected:
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- virtual void static_generate_memory_accessor(int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr) override;
+ virtual void static_generate_memory_accessor(drcuml_block &block, int &label, int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr) override;
virtual bool RBYTE(offs_t address, uint32_t *result) override;
virtual bool RHALF(offs_t address, uint32_t *result) override;
@@ -880,7 +878,7 @@ protected:
{
}
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/mips/mips3drc.cpp b/src/devices/cpu/mips/mips3drc.cpp
index 6597b6fd20f..f682da6b212 100644
--- a/src/devices/cpu/mips/mips3drc.cpp
+++ b/src/devices/cpu/mips/mips3drc.cpp
@@ -239,45 +239,55 @@ void mips3_device::code_flush_cache()
try
{
- /* generate the entry point and out-of-cycles handlers */
- static_generate_entry_point();
- static_generate_nocode_handler();
- static_generate_out_of_cycles();
- static_generate_tlb_mismatch();
-
- /* append exception handlers for various types */
- static_generate_exception(EXCEPTION_INTERRUPT, true, "exception_interrupt");
- static_generate_exception(EXCEPTION_INTERRUPT, false, "exception_interrupt_norecover");
- static_generate_exception(EXCEPTION_TLBMOD, true, "exception_tlbmod");
- static_generate_exception(EXCEPTION_TLBLOAD, true, "exception_tlbload");
- static_generate_exception(EXCEPTION_TLBSTORE, true, "exception_tlbstore");
- static_generate_exception(EXCEPTION_TLBLOAD_FILL, true, "exception_tlbload_fill");
- static_generate_exception(EXCEPTION_TLBSTORE_FILL, true, "exception_tlbstore_fill");
- static_generate_exception(EXCEPTION_ADDRLOAD, true, "exception_addrload");
- static_generate_exception(EXCEPTION_ADDRSTORE, true, "exception_addrstore");
- static_generate_exception(EXCEPTION_SYSCALL, true, "exception_syscall");
- static_generate_exception(EXCEPTION_BREAK, true, "exception_break");
- static_generate_exception(EXCEPTION_INVALIDOP, true, "exception_invalidop");
- static_generate_exception(EXCEPTION_BADCOP, true, "exception_badcop");
- static_generate_exception(EXCEPTION_OVERFLOW, true, "exception_overflow");
- static_generate_exception(EXCEPTION_TRAP, true, "exception_trap");
- static_generate_exception(EXCEPTION_FPE, true, "exception_fpe");
+ {
+ drcuml_block &block(m_drcuml->begin_block(1024));
+ int label = 1;
+
+ /* generate the entry point and out-of-cycles handlers */
+ static_generate_entry_point(block, label);
+ static_generate_nocode_handler(block, label);
+ static_generate_out_of_cycles(block, label);
+ static_generate_tlb_mismatch(block, label);
+
+ /* append exception handlers for various types */
+ static_generate_exception(block, label, EXCEPTION_INTERRUPT, true, "exception_interrupt");
+ static_generate_exception(block, label, EXCEPTION_INTERRUPT, false, "exception_interrupt_norecover");
+ static_generate_exception(block, label, EXCEPTION_TLBMOD, true, "exception_tlbmod");
+ static_generate_exception(block, label, EXCEPTION_TLBLOAD, true, "exception_tlbload");
+ static_generate_exception(block, label, EXCEPTION_TLBSTORE, true, "exception_tlbstore");
+ static_generate_exception(block, label, EXCEPTION_TLBLOAD_FILL, true, "exception_tlbload_fill");
+ static_generate_exception(block, label, EXCEPTION_TLBSTORE_FILL, true, "exception_tlbstore_fill");
+ static_generate_exception(block, label, EXCEPTION_ADDRLOAD, true, "exception_addrload");
+ static_generate_exception(block, label, EXCEPTION_ADDRSTORE, true, "exception_addrstore");
+ static_generate_exception(block, label, EXCEPTION_SYSCALL, true, "exception_syscall");
+ static_generate_exception(block, label, EXCEPTION_BREAK, true, "exception_break");
+ static_generate_exception(block, label, EXCEPTION_INVALIDOP, true, "exception_invalidop");
+ static_generate_exception(block, label, EXCEPTION_BADCOP, true, "exception_badcop");
+ static_generate_exception(block, label, EXCEPTION_OVERFLOW, true, "exception_overflow");
+ static_generate_exception(block, label, EXCEPTION_TRAP, true, "exception_trap");
+ static_generate_exception(block, label, EXCEPTION_FPE, true, "exception_fpe");
+
+ block.end();
+ }
/* add subroutines for memory accesses */
for (mode = 0; mode < 3; mode++)
{
- static_generate_memory_accessor(mode, 1, false, false, "read8", m_read8[mode]);
- static_generate_memory_accessor(mode, 1, true, false, "write8", m_write8[mode]);
- static_generate_memory_accessor(mode, 2, false, false, "read16", m_read16[mode]);
- static_generate_memory_accessor(mode, 2, true, false, "write16", m_write16[mode]);
- static_generate_memory_accessor(mode, 4, false, false, "read32", m_read32[mode]);
- static_generate_memory_accessor(mode, 4, false, true, "read32mask", m_read32mask[mode]);
- static_generate_memory_accessor(mode, 4, true, false, "write32", m_write32[mode]);
- static_generate_memory_accessor(mode, 4, true, true, "write32mask", m_write32mask[mode]);
- static_generate_memory_accessor(mode, 8, false, false, "read64", m_read64[mode]);
- static_generate_memory_accessor(mode, 8, false, true, "read64mask", m_read64mask[mode]);
- static_generate_memory_accessor(mode, 8, true, false, "write64", m_write64[mode]);
- static_generate_memory_accessor(mode, 8, true, true, "write64mask", m_write64mask[mode]);
+ drcuml_block &block(m_drcuml->begin_block(1024));
+ int label = 1;
+ static_generate_memory_accessor(block, label, mode, 1, false, false, "read8", m_read8[mode]);
+ static_generate_memory_accessor(block, label, mode, 1, true, false, "write8", m_write8[mode]);
+ static_generate_memory_accessor(block, label, mode, 2, false, false, "read16", m_read16[mode]);
+ static_generate_memory_accessor(block, label, mode, 2, true, false, "write16", m_write16[mode]);
+ static_generate_memory_accessor(block, label, mode, 4, false, false, "read32", m_read32[mode]);
+ static_generate_memory_accessor(block, label, mode, 4, false, true, "read32mask", m_read32mask[mode]);
+ static_generate_memory_accessor(block, label, mode, 4, true, false, "write32", m_write32[mode]);
+ static_generate_memory_accessor(block, label, mode, 4, true, true, "write32mask", m_write32mask[mode]);
+ static_generate_memory_accessor(block, label, mode, 8, false, false, "read64", m_read64[mode]);
+ static_generate_memory_accessor(block, label, mode, 8, false, true, "read64mask", m_read64mask[mode]);
+ static_generate_memory_accessor(block, label, mode, 8, true, false, "write64", m_write64[mode]);
+ static_generate_memory_accessor(block, label, mode, 8, true, true, "write64mask", m_write64mask[mode]);
+ block.end();
}
}
catch (drcuml_block::abort_compilation &)
@@ -585,44 +595,40 @@ static void cfunc_unimplemented(void *param)
static entry point
-------------------------------------------------*/
-void mips3_device::static_generate_entry_point()
+void mips3_device::static_generate_entry_point(drcuml_block &block, int &label)
{
- uml::code_label const skip = 1;
-
- drcuml_block &block(m_drcuml->begin_block(20));
+ uml::code_label const skip = label++;
/* forward references */
alloc_handle(*m_drcuml, m_exception_norecover[EXCEPTION_INTERRUPT], "interrupt_norecover");
alloc_handle(*m_drcuml, m_nocode, "nocode");
alloc_handle(*m_drcuml, m_entry, "entry");
- UML_HANDLE(block, *m_entry); // handle entry
+ UML_HANDLE(block, *m_entry); // handle entry
/* reset the FPU mode */
- UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
- UML_LOAD(block, I0, &m_fpmode[0], I0, SIZE_BYTE, SCALE_x1);// load i0,fpmode,i0,byte
- UML_SETFMOD(block, I0); // setfmod i0
+ UML_AND(block, I0, CCR132(31), 3); // and i0,ccr1[31],3
+ UML_LOAD(block, I0, &m_fpmode[0], I0, SIZE_BYTE, SCALE_x1); // load i0,fpmode,i0,byte
+ UML_SETFMOD(block, I0); // setfmod i0
/* load fast integer registers */
load_fast_iregs(block);
/* check for interrupts */
UML_AND(block, I0, CPR032(COP0_Cause), CPR032(COP0_Status)); // and i0,[Cause],[Status]
- UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00,Z
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_AND(block, I0, I0, 0xfc00); // and i0,i0,0xfc00,Z
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
UML_TEST(block, CPR032(COP0_Status), SR_IE); // test [Status],SR_IE
- UML_JMPc(block, COND_Z, skip); // jmp skip,Z
+ UML_JMPc(block, COND_Z, skip); // jmp skip,Z
UML_TEST(block, CPR032(COP0_Status), SR_EXL | SR_ERL); // test [Status],SR_EXL | SR_ERL
- UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
- UML_MOV(block, I0, mem(&m_core->pc)); // mov i0,pc
- UML_MOV(block, I1, 0); // mov i1,0
- UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]); // callh exception_norecover
+ UML_JMPc(block, COND_NZ, skip); // jmp skip,NZ
+ UML_MOV(block, I0, mem(&m_core->pc)); // mov i0,pc
+ UML_MOV(block, I1, 0); // mov i1,0
+ UML_CALLH(block, *m_exception_norecover[EXCEPTION_INTERRUPT]); // callh exception_norecover
UML_LABEL(block, skip); // skip:
/* generate a hash jump via the current mode and PC */
- UML_HASHJMP(block, mem(&m_core->mode), mem(&m_core->pc), *m_nocode);
- // hashjmp <mode>,<pc>,nocode
- block.end();
+ UML_HASHJMP(block, mem(&m_core->mode), mem(&m_core->pc), *m_nocode); // hashjmp <mode>,<pc>,nocode
}
@@ -631,11 +637,8 @@ void mips3_device::static_generate_entry_point()
exception handler for "out of code"
-------------------------------------------------*/
-void mips3_device::static_generate_nocode_handler()
+void mips3_device::static_generate_nocode_handler(drcuml_block &block, int &label)
{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(10));
-
/* generate a hash jump via the current mode and PC */
alloc_handle(*m_drcuml, m_nocode, "nocode");
UML_HANDLE(block, *m_nocode); // handle nocode
@@ -643,8 +646,6 @@ void mips3_device::static_generate_nocode_handler()
UML_MOV(block, mem(&m_core->pc), I0); // mov [pc],i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
-
- block.end();
}
@@ -653,11 +654,8 @@ void mips3_device::static_generate_nocode_handler()
out of cycles exception handler
-------------------------------------------------*/
-void mips3_device::static_generate_out_of_cycles()
+void mips3_device::static_generate_out_of_cycles(drcuml_block &block, int &label)
{
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(10));
-
/* generate a hash jump via the current mode and PC */
alloc_handle(*m_drcuml, m_out_of_cycles, "out_of_cycles");
UML_HANDLE(block, *m_out_of_cycles); // handle out_of_cycles
@@ -665,8 +663,6 @@ void mips3_device::static_generate_out_of_cycles()
UML_MOV(block, mem(&m_core->pc), I0); // mov <pc>,i0
save_fast_iregs(block);
UML_EXIT(block, EXECUTE_OUT_OF_CYCLES); // exit EXECUTE_OUT_OF_CYCLES
-
- block.end();
}
@@ -675,15 +671,14 @@ void mips3_device::static_generate_out_of_cycles()
TLB mismatch handler
-------------------------------------------------*/
-void mips3_device::static_generate_tlb_mismatch()
+void mips3_device::static_generate_tlb_mismatch(drcuml_block &block, int &label)
{
+ uml::code_label const skip = label++;
+
/* forward references */
alloc_handle(*m_drcuml, m_exception[EXCEPTION_TLBLOAD], "exception_tlbload");
alloc_handle(*m_drcuml, m_exception[EXCEPTION_TLBLOAD_FILL], "exception_tlbload_fill");
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(20));
-
/* generate a hash jump via the current mode and PC */
alloc_handle(*m_drcuml, m_tlb_mismatch, "tlb_mismatch");
UML_HANDLE(block, *m_tlb_mismatch); // handle tlb_mismatch
@@ -702,12 +697,12 @@ void mips3_device::static_generate_tlb_mismatch()
UML_MOV(block, mem(&m_core->arg1), I1); // mov [arg1],i1
UML_CALLC(block, cfunc_printf_debug, this); // callc printf_debug
}
- UML_TEST(block, I1, FETCH_ALLOWED); // test i1,FETCH_ALLOWED
- UML_JMPc(block, COND_NZ, 1); // jmp 1,nz
- UML_TEST(block, I1, FLAG_FIXED); // test i1,FLAG_FIXED
+ UML_TEST(block, I1, FETCH_ALLOWED); // test i1,FETCH_ALLOWED
+ UML_JMPc(block, COND_NZ, skip); // jmp skip,nz
+ UML_TEST(block, I1, FLAG_FIXED); // test i1,FLAG_FIXED
UML_EXHc(block, COND_NZ, *m_exception[EXCEPTION_TLBLOAD], I0); // exh exception[TLBLOAD],i0,nz
UML_EXH(block, *m_exception[EXCEPTION_TLBLOAD_FILL], I0); // exh exception[TLBLOAD_FILL],i0
- UML_LABEL(block, 1); // 1:
+ UML_LABEL(block, skip); // skip:
save_fast_iregs(block);
// the saved PC may be set 1 instruction back with the low bit set to indicate
@@ -717,8 +712,6 @@ void mips3_device::static_generate_tlb_mismatch()
UML_MOV(block, mem(&m_core->pc), I0); // mov i0,[pc]
UML_EXIT(block, EXECUTE_MISSING_CODE); // exit EXECUTE_MISSING_CODE
-
- block.end();
}
@@ -727,12 +720,12 @@ void mips3_device::static_generate_tlb_mismatch()
exception handler
-------------------------------------------------*/
-void mips3_device::static_generate_exception(uint8_t exception, int recover, const char *name)
+void mips3_device::static_generate_exception(drcuml_block &block, int &label, uint8_t exception, int recover, const char *name)
{
uml::code_handle *&exception_handle = recover ? m_exception[exception] : m_exception_norecover[exception];
uint32_t offset = 0x180;
- uml::code_label const next = 1;
- uml::code_label const skip = 2;
+ uml::code_label const next = label++;
+ uml::code_label const skip = label++;
/* translate our fake fill exceptions into real exceptions */
if (exception == EXCEPTION_TLBLOAD_FILL || exception == EXCEPTION_TLBSTORE_FILL)
@@ -741,9 +734,6 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
exception = (exception - EXCEPTION_TLBLOAD_FILL) + EXCEPTION_TLBLOAD;
}
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(1024));
-
/* add a global entry for this */
alloc_handle(*m_drcuml, exception_handle, name);
UML_HANDLE(block, *exception_handle); // handle name
@@ -798,7 +788,7 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
}
/* set EXL in the SR */
- UML_OR(block, I0, CPR032(COP0_Status), SR_EXL); // or i0,[Status],SR_EXL
+ UML_OR(block, I0, CPR032(COP0_Status), SR_EXL); // or i0,[Status],SR_EXL
UML_MOV(block, CPR032(COP0_Status), I0); // mov [Status],i0
generate_update_mode(block);
@@ -806,24 +796,22 @@ void mips3_device::static_generate_exception(uint8_t exception, int recover, con
if ((PRINTF_EXCEPTIONS && exception != EXCEPTION_INTERRUPT && exception != EXCEPTION_SYSCALL) ||
(PRINTF_MMU && (exception == EXCEPTION_TLBLOAD || exception == EXCEPTION_TLBSTORE)))
{
- UML_CALLC(block, cfunc_printf_exception, this); // callc cfunc_printf_exception,nullptr
+ UML_CALLC(block, cfunc_printf_exception, this); // callc cfunc_printf_exception,nullptr
//UML_CALLC(block, cfunc_debug_break, this); // callc cfunc_debug_break,nullptr
}
/* choose our target PC */
- UML_ADD(block, I0, I3, 0xbfc00200); // add i0,i3,0xbfc00200
- UML_TEST(block, CPR032(COP0_Status), SR_BEV); // test CPR032(COP0_Status),SR_BEV
- UML_JMPc(block, COND_NZ, skip); // jnz <skip>
- UML_ADD(block, I0, I3, 0x80000000); // add i0,i3,0x80000000,z
+ UML_ADD(block, I0, I3, 0xbfc00200); // add i0,i3,0xbfc00200
+ UML_TEST(block, CPR032(COP0_Status), SR_BEV); // test CPR032(COP0_Status),SR_BEV
+ UML_JMPc(block, COND_NZ, skip); // jnz <skip>
+ UML_ADD(block, I0, I3, 0x80000000); // add i0,i3,0x80000000,z
UML_LABEL(block, skip); // <skip>:
/* adjust cycles */
- UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I1); // sub icount,icount,cycles,S
- UML_EXHc(block, COND_S, *m_out_of_cycles, I0); // exh out_of_cycles,i0
-
- UML_HASHJMP(block, mem(&m_core->mode), I0, *m_nocode);// hashjmp <mode>,i0,nocode
+ UML_SUB(block, mem(&m_core->icount), mem(&m_core->icount), I1); // sub icount,icount,cycles,S
+ UML_EXHc(block, COND_S, *m_out_of_cycles, I0); // exh out_of_cycles,i0
- block.end();
+ UML_HASHJMP(block, mem(&m_core->mode), I0, *m_nocode); // hashjmp <mode>,i0,nocode
}
@@ -860,7 +848,7 @@ void mips3_device::static_generate_memory_mode_checks(drcuml_block &block, uml::
void mips3_device::static_generate_fastram_accessor(drcuml_block &block, int &label, int size, bool iswrite, bool ismasked)
{
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
for (int ramnum = 0; ramnum < m_fastram_select; ramnum++)
{
@@ -1018,7 +1006,7 @@ void mips3_device::static_generate_memory_rw(drcuml_block &block, int size, bool
static_generate_memory_accessor
------------------------------------------------------------------*/
-void mips3_device::static_generate_memory_accessor(int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr)
+void mips3_device::static_generate_memory_accessor(drcuml_block &block, int &label, int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1; mask for accesses is in I2 */
/* on exit, read result is in I0 */
@@ -1027,10 +1015,6 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, bool iswr
uml::code_handle &exception_tlbfill = *m_exception[iswrite ? EXCEPTION_TLBSTORE_FILL : EXCEPTION_TLBLOAD_FILL];
uml::code_handle &exception_addrerr = *m_exception[iswrite ? EXCEPTION_ADDRSTORE : EXCEPTION_ADDRLOAD];
int tlbmiss = 0;
- int label = 1;
-
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
alloc_handle(*m_drcuml, handleptr, name);
@@ -1048,32 +1032,23 @@ void mips3_device::static_generate_memory_accessor(int mode, int size, bool iswr
static_generate_fastram_accessor(block, label, size, iswrite, ismasked);
static_generate_memory_rw(block, size, iswrite, ismasked);
- if (tlbmiss != 0)
+ UML_LABEL(block, tlbmiss); // tlbmiss:
+ if (iswrite)
{
- UML_LABEL(block, tlbmiss); // tlbmiss:
- if (iswrite)
- {
- UML_TEST(block, I3, READ_ALLOWED); // test i3,READ_ALLOWED
- UML_EXHc(block, COND_NZ, *m_exception[EXCEPTION_TLBMOD], I0); // exh tlbmod,i0,nz
- }
- UML_TEST(block, I3, FLAG_FIXED); // test i3,FLAG_FIXED
- UML_EXHc(block, COND_NZ, exception_tlb, I0); // exh tlb,i0,nz
- UML_EXH(block, exception_tlbfill, I0); // exh tlbfill,i0
+ UML_TEST(block, I3, READ_ALLOWED); // test i3,READ_ALLOWED
+ UML_EXHc(block, COND_NZ, *m_exception[EXCEPTION_TLBMOD], I0); // exh tlbmod,i0,nz
}
-
- block.end();
+ UML_TEST(block, I3, FLAG_FIXED); // test i3,FLAG_FIXED
+ UML_EXHc(block, COND_NZ, exception_tlb, I0); // exh tlb,i0,nz
+ UML_EXH(block, exception_tlbfill, I0); // exh tlbfill,i0
}
-void r4650_device::static_generate_memory_accessor(int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr)
+void r4650_device::static_generate_memory_accessor(drcuml_block &block, int &label, int mode, int size, bool iswrite, bool ismasked, const char *name, uml::code_handle *&handleptr)
{
/* on entry, address is in I0; data for writes is in I1; mask for accesses is in I2 */
/* on exit, read result is in I0 */
/* routine trashes I0-I3 */
uml::code_handle &exception_addrerr = *m_exception[iswrite ? EXCEPTION_ADDRSTORE : EXCEPTION_ADDRLOAD];
- int label = 1;
-
- /* begin generating */
- drcuml_block &block(m_drcuml->begin_block(1024));
/* add a global entry for this */
alloc_handle(*m_drcuml, handleptr, name);
@@ -1093,7 +1068,6 @@ void r4650_device::static_generate_memory_accessor(int mode, int size, bool iswr
static_generate_fastram_accessor(block, label, size, iswrite, ismasked);
static_generate_memory_rw(block, size, iswrite, ismasked);
- block.end();
}
@@ -1390,7 +1364,7 @@ void mips3_device::generate_sequence_instruction(drcuml_block &block, compiler_s
}
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block);
diff --git a/src/devices/cpu/mips/mips3dsm.cpp b/src/devices/cpu/mips/mips3dsm.cpp
index 82a402291ec..cdad3375ae7 100644
--- a/src/devices/cpu/mips/mips3dsm.cpp
+++ b/src/devices/cpu/mips/mips3dsm.cpp
@@ -124,10 +124,12 @@ const char *const mips3_disassembler::ccreg[4][32] =
inline std::string mips3_disassembler::signed_16bit(int16_t val)
{
- if (val < 0)
- return util::string_format("-$%x", -val);
+ if (val >= -9 && val <= 9)
+ return util::string_format("%d", val);
+ else if (val < 0)
+ return util::string_format("-0x%x", -val);
else
- return util::string_format("$%x", val);
+ return util::string_format("0x%x", val);
}
uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &stream)
@@ -147,11 +149,9 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s
case 0x08: /* BC */
switch (rt)
{
- case 0x00: util::stream_format(stream, "bc0f $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bc0t $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bc0fl [invalid]"); break;
- case 0x03: util::stream_format(stream, "bc0tl [invalid]"); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ case 0x00: util::stream_format(stream, "bc0f 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bc0t 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x10:
@@ -181,14 +181,14 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s
default: dasm_extra_cop0(pc, op, stream); break;
}
break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return flags;
}
uint32_t mips3_disassembler::dasm_extra_cop0(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "cop0 $%07x", op & 0x01ffffff);
+ util::stream_format(stream, "cop0 0x%07x", op & 0x01ffffff);
return 0;
}
@@ -218,10 +218,10 @@ uint32_t mips3_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s
case 0x08: /* BC */
switch (rt & 3)
{
- case 0x00: util::stream_format(stream, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
- case 0x03: util::stream_format(stream, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x00: util::stream_format(stream, "bc1f 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bc1t 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "bc1fl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
+ case 0x03: util::stream_format(stream, "bc1tl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break;
}
break;
default: /* COP */
@@ -277,7 +277,7 @@ uint32_t mips3_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s
uint32_t mips3_disassembler::dasm_extra_cop1(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff);
+ util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff);
return 0;
}
@@ -336,7 +336,7 @@ uint32_t mips3_disassembler::dasm_cop1x(uint32_t pc, uint32_t op, std::ostream &
case 0x3d:
case 0x3e:
case 0x3f: util::stream_format(stream, "nmsub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break;
- default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break;
+ default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break;
}
return flags;
}
@@ -358,11 +358,9 @@ uint32_t mips3_disassembler::dasm_cop2(uint32_t pc, uint32_t op, std::ostream &s
case 0x08: /* BC */
switch (rt)
{
- case 0x00: util::stream_format(stream, "bc2f $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bc2t $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bc2fl [invalid]"); break;
- case 0x03: util::stream_format(stream, "bc2tl [invalid]"); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ case 0x00: util::stream_format(stream, "bc2f 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bc2t 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x10:
@@ -383,14 +381,14 @@ uint32_t mips3_disassembler::dasm_cop2(uint32_t pc, uint32_t op, std::ostream &s
case 0x1f: /* COP */
flags = dasm_extra_cop2(pc, op, stream);
break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return flags;
}
uint32_t mips3_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "cop2 $%07x", op & 0x01ffffff);
+ util::stream_format(stream, "cop2 0x%07x", op & 0x01ffffff);
return 0;
}
@@ -406,9 +404,9 @@ uint32_t mips3_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &st
{
case 0: util::stream_format(stream, "mad %s,%s", reg[rs], reg[rt]); break;
case 1: util::stream_format(stream, "madu %s,%s", reg[rs], reg[rt]); break;
- case 2: util::stream_format(stream, "mul %s,%s,%s", reg[rs], reg[rt], reg[rd]); break;
+ case 2: util::stream_format(stream, "mul %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 4: util::stream_format(stream, "msub %s,%s", reg[rs], reg[rt]); break;
- default:util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default:util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return flags;
@@ -416,19 +414,19 @@ uint32_t mips3_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &st
uint32_t mips3_disassembler::dasm_extra_base(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "dc.l $%08x [invalid]", op);
+ util::stream_format(stream, ".word 0x%08x /*invalid*/", op);
return 0;
}
uint32_t mips3_disassembler::dasm_extra_regimm(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "dc.l $%08x [invalid]", op);
+ util::stream_format(stream, ".word 0x%08x /*invalid*/", op);
return 0;
}
uint32_t mips3_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostream &stream)
{
- util::stream_format(stream, "dc.l $%08x [invalid]", op);
+ util::stream_format(stream, ".word 0x%08x /*invalid*/", op);
return 0;
}
@@ -438,7 +436,7 @@ uint32_t ee_disassembler::dasm_extra_cop0(uint32_t pc, uint32_t op, std::ostream
{
case 0x38: util::stream_format(stream, "ei"); break;
case 0x39: util::stream_format(stream, "di"); break;
- default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break;
+ default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break;
}
return 0;
}
@@ -453,7 +451,7 @@ uint32_t ee_disassembler::dasm_extra_cop1(uint32_t pc, uint32_t op, std::ostream
{
case 0x18: util::stream_format(stream, "adda.s %s,%s", cpreg[1][fs], cpreg[1][ft]); break;
case 0x1c: util::stream_format(stream, "madd.s %s,%s,%s", cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
}
@@ -522,10 +520,10 @@ uint32_t ee_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream
case 0x2f: util::stream_format(stream, "vmini.%s %s%s %s%s %s%s", dest, vfreg[rd], destc, vfreg[rs], destc, vfreg[rt], dest); break;
case 0x30: util::stream_format(stream, "viadd %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break;
case 0x31: util::stream_format(stream, "visub %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break;
- case 0x32: util::stream_format(stream, "viaddi %s, %s, $%x", vireg[rt], vireg[rs], imm5); break;
+ case 0x32: util::stream_format(stream, "viaddi %s, %s, 0x%x", vireg[rt], vireg[rs], imm5); break;
case 0x34: util::stream_format(stream, "viand %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break;
case 0x35: util::stream_format(stream, "vior %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break;
- case 0x38: util::stream_format(stream, "vcallms $06x", (op & 0x001fffc0) >> 3); break;
+ case 0x38: util::stream_format(stream, "vcallms 0x%06x", (op & 0x001fffc0) >> 3); break;
case 0x39: util::stream_format(stream, "vcallmsr $vi27"); break;
case 0x3c: case 0x3d: case 0x3e: case 0x3f:
switch (ext)
@@ -588,10 +586,10 @@ uint32_t ee_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream
case 0x41: util::stream_format(stream, "vrget.%s %s%s R", dest, vfreg[rt], destc); break;
case 0x42: util::stream_format(stream, "vrinit R, %s%s", vfreg[rs], fsf); break;
case 0x43: util::stream_format(stream, "vrxor R, %s%s", vfreg[rs], fsf); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -663,14 +661,14 @@ uint32_t ee_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &strea
case 2: util::stream_format(stream, "pmfhl.slw %s", reg[rd]); break;
case 3: util::stream_format(stream, "pmfhl.lh %s", reg[rd]); break;
case 4: util::stream_format(stream, "pmfhl.sh %s", reg[rd]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x31:
switch (fmt)
{
case 0: util::stream_format(stream, "pmthl.lw %s", reg[rd]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
break;
case 0x34: util::stream_format(stream, "psllh %s,%s,%d", reg[rd], reg[rt], shift); break;
@@ -679,7 +677,7 @@ uint32_t ee_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &strea
case 0x3c: util::stream_format(stream, "psllw %s,%s,%d", reg[rd], reg[rt], shift); break;
case 0x3e: util::stream_format(stream, "psrlw %s,%s,%d", reg[rd], reg[rt], shift); break;
case 0x3f: util::stream_format(stream, "psraw %s,%s,%d", reg[rd], reg[rt], shift); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return flags;
@@ -719,7 +717,7 @@ uint32_t ee_disassembler::dasm_mmi0(uint32_t pc, uint32_t op, std::ostream &stre
case 0x1b: util::stream_format(stream, "ppacb %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x1e: util::stream_format(stream, "pext5 %s,%s", reg[rd], reg[rt]); break;
case 0x1f: util::stream_format(stream, "ppac5 %s,%s", reg[rd], reg[rt]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -752,7 +750,7 @@ uint32_t ee_disassembler::dasm_mmi1(uint32_t pc, uint32_t op, std::ostream &stre
case 0x19: util::stream_format(stream, "psubub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x1a: util::stream_format(stream, "pextub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x1b: util::stream_format(stream, "qfsrv %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -789,7 +787,7 @@ uint32_t ee_disassembler::dasm_mmi2(uint32_t pc, uint32_t op, std::ostream &stre
case 0x1d: util::stream_format(stream, "pdivbw %s,%s", reg[rs], reg[rt]); break;
case 0x1e: util::stream_format(stream, "pexew %s,%s", reg[rd], reg[rt]); break;
case 0x1f: util::stream_format(stream, "prot3w %s,%s", reg[rd], reg[rt]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -817,7 +815,7 @@ uint32_t ee_disassembler::dasm_mmi3(uint32_t pc, uint32_t op, std::ostream &stre
case 0x1a: util::stream_format(stream, "pexch %s,%s", reg[rd], reg[rt]); break;
case 0x1b: util::stream_format(stream, "pcpyh %s,%s", reg[rd], reg[rt]); break;
case 0x1e: util::stream_format(stream, "pexcw %s,%s", reg[rd], reg[rt]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -832,7 +830,7 @@ uint32_t ee_disassembler::dasm_extra_base(uint32_t pc, uint32_t op, std::ostream
{
case 0x1e: util::stream_format(stream, "lq %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x1f: util::stream_format(stream, "sq %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
@@ -847,7 +845,7 @@ uint32_t ee_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostr
{
case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break;
case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
}
@@ -860,7 +858,7 @@ uint32_t ee_disassembler::dasm_extra_regimm(uint32_t pc, uint32_t op, std::ostre
{
case 0x18: util::stream_format(stream, "mtsab %s,%s", reg[rs], signed_16bit(op)); break;
case 0x19: util::stream_format(stream, "mtsah %s,%s", reg[rs], signed_16bit(op)); break;
- default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break;
+ default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break;
}
return 0;
}
@@ -894,7 +892,7 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
case 0x04: util::stream_format(stream, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
case 0x06: util::stream_format(stream, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
case 0x07: util::stream_format(stream, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break;
- case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT; break;
+ case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT | step_over_extra(1); break;
case 0x09: if (rd == 31)
util::stream_format(stream, "jalr %s", reg[rs]);
else
@@ -922,13 +920,33 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
case 0x1e: util::stream_format(stream, "ddiv %s,%s", reg[rs], reg[rt]); break;
case 0x1f: util::stream_format(stream, "ddivu %s,%s", reg[rs], reg[rt]); break;
case 0x20: util::stream_format(stream, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x21: util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x22: util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x23: util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x21: if (rs == 0 || rt == 0)
+ util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]);
+ else
+ util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
+ case 0x22: if (rs == 0)
+ util::stream_format(stream, "neg %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
+ case 0x23: if (rs == 0)
+ util::stream_format(stream, "negu %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x24: util::stream_format(stream, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x25: util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x25: if (rs == 0 || rt == 0)
+ util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]);
+ else
+ util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x26: util::stream_format(stream, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
- case 0x27: util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
+ case 0x27: if (rs == 0)
+ util::stream_format(stream, "not %s,%s", reg[rd], reg[rt]);
+ else
+ util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]);
+ break;
case 0x2a: util::stream_format(stream, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x2b: util::stream_format(stream, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
case 0x2c: util::stream_format(stream, "dadd %s,%s,%s", reg[rd], reg[rs], reg[rt]); break;
@@ -954,50 +972,84 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
case 0x01: /* REGIMM */
switch ((op >> 16) & 31)
{
- case 0x00: util::stream_format(stream, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x02: util::stream_format(stream, "bltzl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x03: util::stream_format(stream, "bgezl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x00: util::stream_format(stream, "bltz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bgez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "bltzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x03: util::stream_format(stream, "bgezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
case 0x08: util::stream_format(stream, "tgei %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
case 0x09: util::stream_format(stream, "tgeiu %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
case 0x0a: util::stream_format(stream, "tlti %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
case 0x0b: util::stream_format(stream, "tltiu %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
case 0x0c: util::stream_format(stream, "teqi %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
case 0x0e: util::stream_format(stream, "tnei %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break;
- case 0x10: util::stream_format(stream, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
- case 0x11: util::stream_format(stream, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break;
- case 0x12: util::stream_format(stream, "bltzall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
- case 0x13: util::stream_format(stream, "bgezall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break;
+ case 0x10: util::stream_format(stream, "bltzal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
+ case 0x11: if (rs == 0)
+ util::stream_format(stream, "bal 0x%08x", pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "bgezal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1);
+ break;
+ case 0x12: util::stream_format(stream, "bltzall %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
+ case 0x13: util::stream_format(stream, "bgezall %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break;
default: flags = dasm_extra_regimm(pc, op, stream); break;
}
break;
- case 0x02: util::stream_format(stream, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
- case 0x03: util::stream_format(stream, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "j 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break;
+ case 0x03: util::stream_format(stream, "jal 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break;
case 0x04: if (rs == 0 && rt == 0)
- util::stream_format(stream, "b $%08x", pc + 4 + ((int16_t)op << 2));
+ util::stream_format(stream, "b 0x%08x", pc + 4 + ((int16_t)op << 2));
else
- util::stream_format(stream, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
- break;
- case 0x05: util::stream_format(stream, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
- case 0x06: util::stream_format(stream, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
- case 0x07: util::stream_format(stream, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break;
+ {
+ if (rt == 0)
+ util::stream_format(stream, "beqz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "beq %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_COND | step_over_extra(1);
+ }
+ break;
+ case 0x05: if (rt == 0)
+ util::stream_format(stream, "bnez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "bne %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_COND | step_over_extra(1);
+ break;
+ case 0x06: util::stream_format(stream, "blez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x07: util::stream_format(stream, "bgtz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
case 0x08: util::stream_format(stream, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x09: util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
+ case 0x09: if (rs == 0)
+ util::stream_format(stream, "li %s,%s", reg[rt], signed_16bit(op));
+ else
+ util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op));
+ break;
case 0x0a: util::stream_format(stream, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x0b: util::stream_format(stream, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
- case 0x0c: util::stream_format(stream, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0d: util::stream_format(stream, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0e: util::stream_format(stream, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break;
- case 0x0f: util::stream_format(stream, "lui %s,$%04x", reg[rt], (uint16_t)op); break;
+ case 0x0c: util::stream_format(stream, "andi %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0d: if (rs == 0)
+ util::stream_format(stream, "li %s,0x%04x", reg[rt], (uint16_t)op);
+ else
+ util::stream_format(stream, "ori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op);
+ break;
+ case 0x0e: util::stream_format(stream, "xori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break;
+ case 0x0f: util::stream_format(stream, "lui %s,0x%04x", reg[rt], (uint16_t)op); break;
case 0x10: flags = dasm_cop0(pc, op, stream); break;
case 0x11: flags = dasm_cop1(pc, op, stream); break;
case 0x12: flags = dasm_cop2(pc, op, stream); break;
case 0x13: flags = dasm_cop1x(pc, op, stream); break;
- case 0x14: util::stream_format(stream, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
- case 0x15: util::stream_format(stream, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
- case 0x16: util::stream_format(stream, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
- case 0x17: util::stream_format(stream, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break;
+ case 0x14: if (rt == 0)
+ util::stream_format(stream, "beqzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "beql %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ if (rs != 0 || rt != 0) flags = STEP_COND | step_over_extra(1);
+ break;
+ case 0x15: if (rt == 0)
+ util::stream_format(stream, "bnezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2));
+ else
+ util::stream_format(stream, "bnel %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));
+ flags = STEP_COND | step_over_extra(1);
+ break;
+ case 0x16: util::stream_format(stream, "blezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x17: util::stream_format(stream, "bgtzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break;
case 0x18: util::stream_format(stream, "daddi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x19: util::stream_format(stream, "daddiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break;
case 0x1a: util::stream_format(stream, "ldl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
@@ -1022,7 +1074,7 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
case 0x30: util::stream_format(stream, "ll %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x31: util::stream_format(stream, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
case 0x32: util::stream_format(stream, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
- case 0x33: util::stream_format(stream, "pref $%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break;
+ case 0x33: util::stream_format(stream, "pref 0x%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break;
case 0x34: util::stream_format(stream, "lld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break;
case 0x35: util::stream_format(stream, "ldc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break;
case 0x36: util::stream_format(stream, "ldc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break;
diff --git a/src/devices/cpu/mips/ps2vif1.h b/src/devices/cpu/mips/ps2vif1.h
index 171a3839f8f..e054b448852 100644
--- a/src/devices/cpu/mips/ps2vif1.h
+++ b/src/devices/cpu/mips/ps2vif1.h
@@ -44,8 +44,8 @@ public:
bool fifo_available(uint32_t count) const { return (BUFFER_SIZE - m_end) >= count; }
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_run() override;
uint32_t calculate_unpack_count();
diff --git a/src/devices/cpu/mips/ps2vu.h b/src/devices/cpu/mips/ps2vu.h
index cc898ffa58d..245c623ebfa 100644
--- a/src/devices/cpu/mips/ps2vu.h
+++ b/src/devices/cpu/mips/ps2vu.h
@@ -110,13 +110,12 @@ protected:
};
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override { }
@@ -192,14 +191,14 @@ public:
void vif_w(offs_t offset, uint64_t data);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- void micro_map(address_map &map);
- void vu_map(address_map &map);
+ void micro_map(address_map &map) ATTR_COLD;
+ void vu_map(address_map &map) ATTR_COLD;
void execute_xgkick(uint32_t rs) override;
@@ -222,11 +221,11 @@ public:
sonyvu0_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- void micro_map(address_map &map);
- void vu_map(address_map &map);
+ void micro_map(address_map &map) ATTR_COLD;
+ void vu_map(address_map &map) ATTR_COLD;
void execute_xgkick(uint32_t rs) override;
diff --git a/src/devices/cpu/mips/r4000.cpp b/src/devices/cpu/mips/r4000.cpp
index 4a271082db1..47e2cd784a7 100644
--- a/src/devices/cpu/mips/r4000.cpp
+++ b/src/devices/cpu/mips/r4000.cpp
@@ -27,10 +27,13 @@
*/
#include "emu.h"
-#include "divtlb.h"
-#include "debug/debugcpu.h"
#include "r4000.h"
+
#include "mips3dsm.h"
+
+#include "divtlb.h"
+#include "debug/debugcpu.h"
+
#include "unicode.h"
#include "softfloat3/source/include/softfloat.h"
@@ -1107,7 +1110,7 @@ void r4000_base_device::cpu_exception(u32 exception, u16 const vector)
if (exception == EXCEPTION_INT)
{
- if (machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
{
// notify the debugger of the first pending hardware interrupt
u32 const iphw = CAUSE & SR & CAUSE_IPHW;
diff --git a/src/devices/cpu/mips/r4000.h b/src/devices/cpu/mips/r4000.h
index f905e520493..a6e0f816d9a 100644
--- a/src/devices/cpu/mips/r4000.h
+++ b/src/devices/cpu/mips/r4000.h
@@ -316,9 +316,9 @@ protected:
};
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -332,7 +332,6 @@ protected:
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles + 1) / 2; }
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return *std::max_element(std::begin(m_hilo_cycles), std::end(m_hilo_cycles)); }
- virtual u32 execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/mipsx/mipsx.cpp b/src/devices/cpu/mipsx/mipsx.cpp
new file mode 100644
index 00000000000..438c4b4e3b6
--- /dev/null
+++ b/src/devices/cpu/mipsx/mipsx.cpp
@@ -0,0 +1,62 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+// https://apps.dtic.mil/sti/tr/pdf/ADA181619.pdf
+
+#include "emu.h"
+#include "mipsx.h"
+#include "mipsxdasm.h"
+
+DEFINE_DEVICE_TYPE(MIPSX, mipsx_cpu_device, "mipsx", "MIPS-X")
+
+mipsx_cpu_device::mipsx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : cpu_device(mconfig, MIPSX, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_BIG, 32, 32, 0)
+ , m_pc(0)
+ , m_program(nullptr)
+ , m_icount(0)
+{
+}
+
+std::unique_ptr<util::disasm_interface> mipsx_cpu_device::create_disassembler()
+{
+ return std::make_unique<mipsx_disassembler>();
+}
+
+/*****************************************************************************/
+
+device_memory_interface::space_config_vector mipsx_cpu_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+
+/*****************************************************************************/
+
+void mipsx_cpu_device::device_start()
+{
+ m_program = &space(AS_PROGRAM);
+
+ state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%08X");
+ state_add(STATE_GENPCBASE, "CURPC", m_pc).callexport().noshow();
+
+ set_icountptr(m_icount);
+}
+
+void mipsx_cpu_device::device_reset()
+{
+}
+
+/*****************************************************************************/
+
+void mipsx_cpu_device::execute_run()
+{
+ while (m_icount > 0)
+ {
+ debugger_instruction_hook(m_pc);
+ m_pc += 4;
+ m_icount--;
+ }
+}
diff --git a/src/devices/cpu/mipsx/mipsx.h b/src/devices/cpu/mipsx/mipsx.h
new file mode 100644
index 00000000000..90b6de49b67
--- /dev/null
+++ b/src/devices/cpu/mipsx/mipsx.h
@@ -0,0 +1,37 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#ifndef MAME_CPU_MIPSX_MIPSX_H
+#define MAME_CPU_MIPSX_MIPSX_H
+
+#pragma once
+
+class mipsx_cpu_device : public cpu_device
+{
+public:
+ mipsx_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
+ virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
+ virtual void execute_run() override;
+
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+private:
+ address_space_config m_program_config;
+
+ uint32_t m_pc;
+
+ address_space *m_program;
+ int m_icount;
+};
+
+DECLARE_DEVICE_TYPE(MIPSX, mipsx_cpu_device)
+
+#endif // MAME_CPU_MIPSX_MIPSX_H
diff --git a/src/devices/cpu/mipsx/mipsxdasm.cpp b/src/devices/cpu/mipsx/mipsxdasm.cpp
new file mode 100644
index 00000000000..06f6e075aff
--- /dev/null
+++ b/src/devices/cpu/mipsx/mipsxdasm.cpp
@@ -0,0 +1,635 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#include "emu.h"
+#include "mipsxdasm.h"
+
+namespace {
+
+constexpr bool SHOW_R0_AS_0 = false;
+
+char const *const REGNAMES[32] = {
+ "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31" };
+
+
+constexpr int get_ty(u32 opcode)
+{
+ return BIT(opcode, 30, 2);
+}
+
+constexpr int get_op(u32 opcode)
+{
+ return BIT(opcode, 27, 3);
+}
+
+constexpr int get_src1(u32 opcode)
+{
+ return BIT(opcode, 22, 5);
+}
+
+constexpr int get_src2_dest(u32 opcode)
+{
+ return BIT(opcode, 17, 5);
+}
+
+constexpr int get_compute_dest(u32 opcode)
+{
+ return BIT(opcode, 12, 5);
+}
+
+constexpr int get_compute_compfunc(u32 opcode)
+{
+ return BIT(opcode, 0, 12);
+}
+
+[[maybe_unused]] constexpr int get_offset(u32 opcode)
+{
+ return BIT(opcode, 0, 17);
+}
+
+constexpr int get_sq(u32 opcode)
+{
+ return BIT(opcode, 16, 1);
+}
+
+constexpr int get_shift_amount(int shift)
+{
+ switch (shift & 0xf)
+ {
+ case 0x1:
+ {
+ shift = ((shift & 0x70) >> 2) + 0;
+ break;
+ }
+ case 0x2:
+ {
+ shift = ((shift & 0x70) >> 2) + 1;
+ break;
+ }
+ case 0x4:
+ {
+ shift = ((shift & 0x70) >> 2) + 2;
+ break;
+ }
+ case 0x8:
+ {
+ shift = ((shift & 0x70) >> 2) + 3;
+ break;
+ }
+ default:
+ {
+ return 0;
+ }
+ }
+ return 32 - shift;
+}
+
+
+const char *get_regname(u8 reg)
+{
+ // general purpose register 0 just acts as a constant 0, it can't be changed, if desired simply show it as a non-canonical 0 for readability
+ if ((reg == 0) && (SHOW_R0_AS_0))
+ return "#0";
+
+ return REGNAMES[reg];
+}
+
+} // anonymous namespace
+
+
+u32 mipsx_disassembler::opcode_alignment() const
+{
+ return 4;
+}
+
+offs_t mipsx_disassembler::disassemble(std::ostream& stream, offs_t pc, const data_buffer& opcodes, const data_buffer& params)
+{
+ const u32 opcode = opcodes.r32(pc);
+ const u8 ty = get_ty(opcode);
+
+ switch (ty)
+ {
+ case 0:
+ {
+ const u8 op = get_op(opcode);
+ const int disp = util::sext(opcode, 16) * 4;
+ const u32 basepc = pc + 8;
+ const int src1 = get_src1(opcode);
+ const int src2 = get_src2_dest(opcode);
+ const std::string_view squash = get_sq(opcode) ? "sq" : "";
+
+ switch (op)
+ {
+ case 1:
+ {
+ if ((src1 == 0) && (src2 == 0))
+ {
+ // beq #0, #0, offset is used as an alias for unconditional branch
+ util::stream_format(stream, "bra%s 0x%08x", squash, basepc + disp);
+ }
+ else
+ {
+ util::stream_format(stream, "beq%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ }
+ break;
+ }
+ case 2:
+ {
+ util::stream_format(stream, "bhs%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ break;
+ }
+ case 3:
+ {
+ util::stream_format(stream, "blt%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ break;
+ }
+ case 5:
+ {
+ util::stream_format(stream, "bne%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ break;
+ }
+ case 6:
+ {
+ util::stream_format(stream, "blo%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ break;
+ }
+ case 7:
+ {
+ util::stream_format(stream, "bge%s %s,%s,0x%08x", squash, get_regname(src1), get_regname(src2), basepc + disp);
+ break;
+ }
+
+ default:
+ {
+ util::stream_format(stream, "unknown TY0 (%08x)", opcode);
+ break;
+ }
+ }
+ break;
+ }
+
+ case 1:
+ {
+ const u8 op = get_op(opcode);
+
+ switch (op)
+ {
+ case 0:
+ {
+ const u16 comp = get_compute_compfunc(opcode);
+ if (comp == 0x0e6)
+ {
+ u8 src1 = get_src1(opcode);
+
+ if (src1 == 0)
+ {
+ util::stream_format(stream, "mstart %s,%s", get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else
+ {
+ util::stream_format(stream, "invalid mstart TY1 OP0 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ }
+ else if (comp == 0x099)
+ {
+ util::stream_format(stream, "mstep %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x166)
+ {
+ util::stream_format(stream, "dstep %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else
+ {
+ util::stream_format(stream, "unknown TY1 OP0 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ break;
+ }
+
+ case 1:
+ {
+ const u16 comp = get_compute_compfunc(opcode);
+
+ if (comp == 0x080)
+ {
+ util::stream_format(stream, "rotlcb %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x0c0)
+ {
+ util::stream_format(stream, "rotlb %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if ((comp & 0xf80) == 0x100)
+ {
+ const u8 src2 = get_src2_dest(opcode);
+
+ if (src2 == 0x0)
+ {
+ const int shift = get_shift_amount((get_compute_compfunc(opcode) & 0x7f));
+ if(shift != 0)
+ {
+ util::stream_format(stream, "asr %s,%s,#%d", get_regname(get_src1(opcode)), get_regname(get_compute_dest(opcode)), shift);
+ }
+ else
+ {
+ util::stream_format(stream, "asr %s,%s,#invalid (%02x)", get_regname(get_src1(opcode)), get_regname(get_compute_dest(opcode)), get_compute_compfunc(opcode) & 0x7f);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "invalid asr TY1 OP1 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ }
+ else if ((comp & 0xf80) == 0x200)
+ {
+ const int shift = get_shift_amount(get_compute_compfunc(opcode) & 0x7f);
+ if(shift != 0)
+ {
+ if (get_src1(opcode) == 0)
+ {
+ util::stream_format(stream, "lsl %s,%s,#%d", get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)), 32 - shift);
+ }
+ else if (get_src2_dest(opcode) == 0)
+ {
+ util::stream_format(stream, "lsr %s,%s,#%d", get_regname(get_src1(opcode)), get_regname(get_compute_dest(opcode)), shift);
+ }
+ else
+ {
+ util::stream_format(stream, "sh %s,%s,%s,#%d", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)), shift);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "sh %s,%s,%s,#invalid (%02x)", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)), get_compute_compfunc(opcode) & 0x7f);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "unknown TY1 OP1 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ break;
+ }
+
+ case 4:
+ {
+ const u16 comp = get_compute_compfunc(opcode);
+
+ if (comp == 0x00b)
+ {
+ util::stream_format(stream, "bic %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x00f)
+ {
+ if (get_src2_dest(opcode) == 0x00)
+ {
+ util::stream_format(stream, "not %s,%s", get_regname(get_src1(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else
+ {
+ util::stream_format(stream, "invalid not TY1 OP4 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ }
+ else if (comp == 0x019)
+ {
+ const u8 src1 = get_src1(opcode);
+ const u8 src2 = get_src2_dest(opcode);
+ if ((src1 == 0) || (src2 == 0))
+ {
+ const u8 dest = get_compute_dest(opcode);
+ if (dest == 0)
+ {
+ util::stream_format(stream, "nop");
+ }
+ else
+ {
+ // manuals say src2==0 for mov, but actual ROMs use src1==0
+ util::stream_format(stream, "mov %s,%s", get_regname(get_src1(opcode) | get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "add %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ }
+ else if (comp == 0x01b)
+ {
+ util::stream_format(stream, "xor %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x023)
+ {
+ util::stream_format(stream, "and %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x026)
+ {
+ util::stream_format(stream, "subnc %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x03b)
+ {
+ util::stream_format(stream, "or %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else if (comp == 0x066)
+ {
+ util::stream_format(stream, "sub %s,%s,%s", get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)), get_regname(get_compute_dest(opcode)));
+ }
+ else
+ {
+ util::stream_format(stream, "unknown TY1 OP4 (%02x, %02x, %02x %03x)", get_src1(opcode), get_src2_dest(opcode), get_compute_dest(opcode), get_compute_compfunc(opcode));
+ }
+ break;
+ }
+
+ default:
+ {
+ util::stream_format(stream, "unknown TY1 (%08x)", opcode);
+ break;
+ }
+ }
+ break;
+
+ }
+
+ case 2:
+ {
+ const u8 op = get_op(opcode);
+ const int imm17 = util::sext(opcode, 17);
+
+ switch (op)
+ {
+ case 0:
+ {
+ // ld - Load
+ // ld Offset[rSrc1], rDest
+ util::stream_format(stream, "ld 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+ }
+ case 1:
+ {
+ // ldt - Load Through
+ // ldt Offset[rSrc1], rDest
+ util::stream_format(stream, "ldt 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+ }
+ case 2:
+ {
+ // st - Store
+ // st Offset[rSrc1], rDest
+ util::stream_format(stream, "st 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+ }
+ case 3:
+ {
+ // stt - Store Through
+ // stt Offset[rSrc1], rDest
+ // maybe "store byte" on ES3210 and ES3890
+ util::stream_format(stream, "stt 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+ }
+ case 4:
+ {
+ // ldf - Load Floating Point
+ // ldf Offset[rSrc1], rDest
+ // maybe "load byte" on ES3210 and ES3890
+ util::stream_format(stream, "ldf 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+
+ }
+ case 5: // movfrc or aluc, maybe "load byte" on ES3210 and ES3890
+ {
+ // this is just a suggested form
+ const u8 c2 = BIT(opcode, 0, 4);
+ const u8 c1 = BIT(opcode, 4, 4);
+ const u8 func = BIT(opcode, 8, 6);
+ const u8 op = BIT(opcode, 14, 3);
+ const u8 dest = get_src2_dest(opcode);
+ const u8 src = get_src1(opcode);
+
+ if (src == 0)
+ {
+ util::stream_format(stream, "movfrc (%02x,%02x,%02x,%02x),%s", op, func, c1, c2, get_regname(dest));
+ }
+ else
+ {
+ util::stream_format(stream, "movfrc 0x%08x[%s],%s", imm17, get_regname(src), get_regname(dest));
+ }
+ break;
+
+ }
+ case 6:
+ {
+ // stf - Store Floating Point
+ // stf Offset[rSrc1], rDest
+ util::stream_format(stream, "stf 0x%08x[%s],%s", imm17, get_regname(get_src1(opcode)), get_regname(get_src2_dest(opcode)));
+ break;
+ }
+ case 7: // movtoc, maybe "store byte" on ES3210
+ {
+ // this is just a suggested form
+ const u8 c2 = BIT(opcode, 0, 4);
+ const u8 c1 = BIT(opcode, 4, 4);
+ const u8 func = BIT(opcode, 8, 6);
+ const u8 op = BIT(opcode, 14, 3);
+ const u8 dest = get_src2_dest(opcode);
+ const u8 src = get_src1(opcode);
+
+ if (src == 0)
+ {
+ util::stream_format(stream, "movtoc %s,(%02x,%02x,%02x,%02x)", get_regname(dest), op, func, c1, c2);
+ }
+ else
+ {
+ //util::stream_format(stream, "illegal movtoc form");
+ //util::stream_format(stream, "movtoc %s,(%02x,%02x,%02x,%02x) (src1 == %s)", get_regname(dest), op, func, c1, c2, get_regname(src));
+ util::stream_format(stream, "movtoc 0x%08x[%s],%s", imm17, get_regname(src), get_regname(dest));
+ }
+ break;
+
+ }
+ default:
+ {
+ util::stream_format(stream, "unknown TY2 (%08x)", opcode);
+ break;
+ }
+ }
+ break;
+ }
+
+ case 3:
+ {
+ const u8 op = get_op(opcode);
+
+ switch (op)
+ {
+ case 0:
+ {
+ // jspci - Jump Indexed and Store PC
+ // jspci rSrc1,#Immed,Rdest
+ const int imm17 = util::sext(opcode, 17) * 4;
+ util::stream_format(stream, "jspci %s,#%02x,%s", get_regname(get_src1(opcode)), imm17, get_regname(get_src2_dest(opcode)));
+ break;
+ }
+
+ case 1:
+ {
+ // Halt and Spontaneously Combust
+ if ((opcode & 0x07ffffff) == 0x07c00000)
+ {
+ util::stream_format(stream, "hsc");
+ }
+ else
+ {
+ util::stream_format(stream, "invalid hsc TY3 OP1 (%08x)", opcode);
+ }
+ break;
+ }
+
+ case 2:
+ {
+ // movtos - Move to Special Register
+ // movtos rSrc1, SpecialReg
+
+ // psw 001
+ // md 010
+ // pcm1 100
+ const u16 comp = get_compute_compfunc(opcode);
+ if ((comp & 0xffe) == 0x000)
+ {
+ u8 dest = get_src2_dest(opcode);
+
+ if (dest == 0x00)
+ {
+ u8 src = get_src1(opcode);
+ // TODO: name register?
+ util::stream_format(stream, "movtos %s,%01x", get_regname(src), comp & 0x7);
+ }
+ else
+ {
+ util::stream_format(stream, "invalid movtos TY3 OP2 (%08x)", opcode);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "invalid movtos TY3 OP2 (%08x)", opcode);
+ }
+ break;
+
+ }
+
+ case 3:
+ {
+ // movfrs - Move from Special Register
+ // movfrs SpecialReg, rDest
+
+ // psw 001
+ // md 010
+ // pcm4 100
+ const u16 comp = get_compute_compfunc(opcode);
+ if ((comp & 0xffe) == 0x000)
+ {
+ u8 src = get_src1(opcode);
+ if (src == 0x00)
+ {
+ const u8 dest = get_src2_dest(opcode);
+ // TODO: name register?
+ util::stream_format(stream, "movfrs %01x,%s", comp & 0x7, get_regname(dest));
+ }
+ else
+ {
+ util::stream_format(stream, "invalid movfrs TY3 OP3 (%08x)", opcode);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "invalid movfrs TY3 OP3 (%08x)", opcode);
+ }
+ break;
+
+ }
+
+ case 4:
+ {
+ const int imm17 = util::sext(opcode, 17);
+ util::stream_format(stream, "addi %s,#0x%08x,%s", get_regname(get_src1(opcode)), imm17, get_regname(get_src2_dest(opcode)));
+ break;
+ }
+
+ case 5:
+ {
+ const u16 comp = get_compute_compfunc(opcode);
+ if (comp == 0x03)
+ {
+ const u8 dest = get_src2_dest(opcode);
+ const u8 src = get_src1(opcode);
+
+ if ((src == 0x00) && (dest == 0x00))
+ {
+ util::stream_format(stream, "jpc");
+ }
+ else
+ {
+ util::stream_format(stream, "invalid jpc TY3 OP5 (%08x)", opcode);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "invalid jpc TY3 OP5 (%08x)", opcode);
+ }
+ break;
+ }
+
+ case 6:
+ {
+ if ((opcode & 0x07fff807) == 0x00000003)
+ {
+ const u8 vector = ~((opcode & 0x000007f8) >> 3);
+ util::stream_format(stream, "trap 0x%02x", vector);
+ }
+ else
+ {
+ util::stream_format(stream, "invalid trap TY3 OP6 (%08x)", opcode);
+ }
+ break;
+ }
+
+ case 7:
+ {
+ const u16 comp = get_compute_compfunc(opcode);
+ if (comp == 0x03)
+ {
+ const u8 dest = get_src2_dest(opcode);
+ const u8 src = get_src1(opcode);
+
+ if ((src == 0x00) && (dest == 0x00))
+ {
+ util::stream_format(stream, "jpcrs");
+ }
+ else
+ {
+ util::stream_format(stream, "invalid jpcrs TY3 OP7 (%08x)", opcode);
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "invalid jpcrs TY3 OP7 (%08x)", opcode);
+ }
+ break;
+ }
+
+ default:
+ {
+ util::stream_format(stream, "unknown TY3 (%08x)", opcode);
+ break;
+ }
+ }
+ break;
+ }
+
+ default:
+ {
+ util::stream_format(stream, "unknown (%08x)", opcode);
+ break;
+ }
+ }
+
+ return 4;
+}
diff --git a/src/devices/cpu/mipsx/mipsxdasm.h b/src/devices/cpu/mipsx/mipsxdasm.h
new file mode 100644
index 00000000000..a6e1fe7d092
--- /dev/null
+++ b/src/devices/cpu/mipsx/mipsxdasm.h
@@ -0,0 +1,19 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#ifndef MAME_CPU_MIPSX_MIPSXDASM_H
+#define MAME_CPU_MIPSX_MIPSXDASM_H
+
+#pragma once
+
+class mipsx_disassembler : public util::disasm_interface
+{
+public:
+ mipsx_disassembler() = default;
+ virtual ~mipsx_disassembler() = default;
+
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+};
+
+#endif // MAME_CPU_MIPSX_MIPSXDASM_H
diff --git a/src/devices/cpu/mk1/mk1.h b/src/devices/cpu/mk1/mk1.h
index dad3f3ab9f7..85d20a61b26 100644
--- a/src/devices/cpu/mk1/mk1.h
+++ b/src/devices/cpu/mk1/mk1.h
@@ -26,8 +26,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/mn10200/mn10200.h b/src/devices/cpu/mn10200/mn10200.h
index 8ea31fa1d4b..750b0fcae04 100644
--- a/src/devices/cpu/mn10200/mn10200.h
+++ b/src/devices/cpu/mn10200/mn10200.h
@@ -43,7 +43,7 @@ public:
uint8_t io_control_r(offs_t offset);
void io_control_w(offs_t offset, uint8_t data);
- void mn1020012a_internal_map(address_map &map);
+ void mn1020012a_internal_map(address_map &map) ATTR_COLD;
protected:
static constexpr unsigned MN10200_NUM_PRESCALERS = 2;
static constexpr unsigned MN10200_NUM_TIMERS_8BIT = 10;
@@ -54,15 +54,14 @@ protected:
mn10200_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; } // internal /2 divider
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); } // internal /2 divider
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 13+7; } // max opcode cycles + interrupt duration
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/mn10300/mn103dasm.cpp b/src/devices/cpu/mn10300/mn103dasm.cpp
new file mode 100644
index 00000000000..dd5cef3de46
--- /dev/null
+++ b/src/devices/cpu/mn10300/mn103dasm.cpp
@@ -0,0 +1,929 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/***************************************************************************
+
+ Panasonic MN10300 disassembler
+
+ TODO: add extended instructions, especially those pertaining to the
+ MN103E (AM33).
+
+***************************************************************************/
+
+#include "emu.h"
+#include "mn103dasm.h"
+
+mn10300_disassembler::mn10300_disassembler()
+ : util::disasm_interface()
+{
+}
+
+u32 mn10300_disassembler::opcode_alignment() const
+{
+ return 1;
+}
+
+namespace {
+
+const char *const f_conds[10] = {
+ "lt", "gt", "ge", "le", "cs", "hi", "cc", "ls", "eq", "ne"
+};
+
+const char *const f_ext_branches[4] = {
+ "bvc", "bvs", "bnc", "bns"
+};
+
+const char *const f_move_ops[4] = {
+ "mov", "mov", "movbu", "movhu"
+};
+
+const char *const f_logical_ops[4] = {
+ "and", "or", "xor", "btst"
+};
+
+const char *const f_shift_ops[3] = {
+ "asl", "lsr", "asr"
+};
+
+const char *const f_reg_spec[8] = {
+ "other0",
+ "other", // i.e. D0, D1, A0, A1, MDR, LIR and LAR
+ "other2",
+ "other3",
+ "a3",
+ "a2",
+ "d3",
+ "d2"
+};
+
+} // anonymous namespace
+
+void mn10300_disassembler::format_immediate(std::ostream &stream, u32 imm) const
+{
+ if (s32(imm) < 0)
+ {
+ stream << '-';
+ imm = -imm;
+ }
+ if (imm > 9)
+ stream << "0x";
+ util::stream_format(stream, "%x", imm);
+}
+
+void mn10300_disassembler::format_immediate_unsigned(std::ostream &stream, u32 imm) const
+{
+ if (imm > 9)
+ stream << "0x";
+ util::stream_format(stream, "%x", imm);
+}
+
+void mn10300_disassembler::format_an_disp(std::ostream &stream, u32 imm, int n) const
+{
+ stream << '(';
+ format_immediate(stream, imm);
+ util::stream_format(stream, ", a%d)", n);
+}
+
+void mn10300_disassembler::format_sp_disp(std::ostream &stream, u32 imm) const
+{
+ stream << '(';
+ if (imm > 9)
+ stream << "0x";
+ util::stream_format(stream, "%x, sp)", imm);
+}
+
+void mn10300_disassembler::format_regs(std::ostream &stream, u8 regs) const
+{
+ if (regs == 0)
+ stream << "0";
+ else
+ {
+ stream << '[';
+ bool first = true;
+ for (int n = 7; n >= 0; n--)
+ {
+ if (BIT(regs, n))
+ {
+ if (first)
+ first = false;
+ else
+ stream << ',';
+ stream << f_reg_spec[n];
+ }
+ }
+ stream << ']';
+ }
+}
+
+offs_t mn10300_disassembler::disassemble_f0(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ switch (op2 >> 4)
+ {
+ case 0x0: case 0x4: case 0x6:
+ util::stream_format(stream, "%-8s(a%d), %c%d", f_move_ops[BIT(op2, 5, 2)], BIT(op2, 0, 2), (op2 >> 4) == 0x0 ? 'a' : 'd', BIT(op2, 2, 2));
+ return 2 | SUPPORTED;
+
+ case 0x1: case 0x5: case 0x7:
+ util::stream_format(stream, "%-8s%c%d, (a%d)", f_move_ops[BIT(op2, 5, 2)], (op2 >> 4) == 0x1 ? 'a' : 'd', BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x8:
+ util::stream_format(stream, "%-8sd%d, (a%d)", "bset", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x9:
+ util::stream_format(stream, "%-8sd%d, (a%d)", "bclr", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0xf:
+ if (op2 < 0xf4)
+ {
+ util::stream_format(stream, "%-8s(a%d)", "calls", BIT(op2, 0, 2));
+ return 2 | STEP_OVER | SUPPORTED;
+ }
+ else if (op2 < 0xf8)
+ {
+ util::stream_format(stream, "%-8s(a%d)", "jmp", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else if (op2 == 0xfc)
+ {
+ stream << "rets";
+ return 2 | STEP_OUT | SUPPORTED;
+ }
+ else if (op2 == 0xfd)
+ {
+ stream << "rti";
+ return 2 | STEP_OUT | SUPPORTED;
+ }
+ else if (op2 == 0xfe)
+ {
+ stream << "trap";
+ return 2 | STEP_OVER | SUPPORTED;
+ }
+ [[fallthrough]];
+
+ default:
+ stream << "?";
+ return 1 | SUPPORTED;
+ }
+}
+
+offs_t mn10300_disassembler::disassemble_f1(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ switch (op2 >> 4)
+ {
+ case 0x0:
+ util::stream_format(stream, "%-8sd%d, d%d", "sub", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x1:
+ util::stream_format(stream, "%-8sa%d, d%d", "sub", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x2:
+ util::stream_format(stream, "%-8sd%d, a%d", "sub", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x3:
+ util::stream_format(stream, "%-8sa%d, a%d", "sub", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x4:
+ util::stream_format(stream, "%-8sd%d, d%d", "addc", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x5:
+ util::stream_format(stream, "%-8sa%d, d%d", "add", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x6:
+ util::stream_format(stream, "%-8sd%d, a%d", "add", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x7:
+ util::stream_format(stream, "%-8sa%d, a%d", "add", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x8:
+ util::stream_format(stream, "%-8sd%d, d%d", "subc", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x9:
+ util::stream_format(stream, "%-8sa%d, d%d", "cmp", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0xa:
+ util::stream_format(stream, "%-8sd%d, a%d", "cmp", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0xd:
+ util::stream_format(stream, "%-8sa%d, d%d", "mov", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0xe:
+ util::stream_format(stream, "%-8sd%d, a%d", "mov", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f2(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ switch (op2 >> 4)
+ {
+ case 0x0: case 0x1: case 0x2:
+ util::stream_format(stream, "%-8sd%d, d%d", f_logical_ops[op2 >> 4], BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x3:
+ if (op2 < 0x34)
+ {
+ util::stream_format(stream, "%-8sd%d", "not", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else
+ break;
+
+ case 0x4:
+ util::stream_format(stream, "%-8sd%d, d%d", "mul", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x5:
+ util::stream_format(stream, "%-8sd%d, d%d", "mulu", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x6:
+ util::stream_format(stream, "%-8sd%d, d%d", "div", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x7:
+ util::stream_format(stream, "%-8sd%d, d%d", "divu", BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x8:
+ if (op2 < 0x84)
+ {
+ util::stream_format(stream, "%-8sd%d", "rol", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else if (op2 < 0x88)
+ {
+ util::stream_format(stream, "%-8sd%d", "ror", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else
+ break;
+
+ case 0x9: case 0xa: case 0xb:
+ util::stream_format(stream, "%-8sd%d, d%d", f_shift_ops[(op2 >> 4) - 0x9], BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0xd:
+ if (op2 < 0xd4)
+ {
+ util::stream_format(stream, "%-8sd%d", "ext", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else
+ break;
+
+ case 0xe:
+ if (op2 < 0xe8)
+ {
+ util::stream_format(stream, "%-8s%s, d%d", "mov", BIT(op2, 2) ? "psw" : "mdr", BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+ }
+ else
+ break;
+
+ case 0xf:
+ if (BIT(op2, 1))
+ {
+ util::stream_format(stream, "%-8sd%d, %s", "mov", BIT(op2, 2, 2), BIT(op2, 0) ? "psw" : "mdr");
+ return 2 | SUPPORTED;
+ }
+ else if (!BIT(op2, 0))
+ {
+ util::stream_format(stream, "%-8sa%d, sp", "mov", BIT(op2, 2, 2));
+ return 2 | SUPPORTED;
+ }
+ else
+ break;
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f3(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8s", "mov");
+ if (BIT(op2, 6))
+ util::stream_format(stream, "%c%d, (d%d, a%d)", BIT(op2, 7) ? 'a' : 'd', BIT(op2, 4, 2), BIT(op2, 2, 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "(d%d, a%d), %c%d", BIT(op2, 2, 2), BIT(op2, 0, 2), BIT(op2, 7) ? 'a' : 'd', BIT(op2, 4, 2));
+ return 2 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f4(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 7) + 2]);
+ if (BIT(op2, 6))
+ util::stream_format(stream, "d%d, (d%d, a%d)", BIT(op2, 4, 2), BIT(op2, 2, 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "(d%d, a%d), d%d", BIT(op2, 2, 2), BIT(op2, 0, 2), BIT(op2, 4, 2));
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f5(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "udf%02d d%d, d%d", 20 + (op2 >> 4), BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f6(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "udf%02d d%d, d%d", op2 >> 4, BIT(op2, 2, 2), BIT(op2, 0, 2));
+ return 2 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f8(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (op2 < 0x80)
+ {
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 5, 2)]);
+ if (BIT(op2, 4))
+ {
+ util::stream_format(stream, "%c%d, ", BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 2, 2));
+ format_an_disp(stream, s8(opcodes.r8(pc + 2)), BIT(op2, 0, 2));
+ }
+ else
+ {
+ format_an_disp(stream, s8(opcodes.r8(pc + 2)), BIT(op2, 0, 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 2, 2));
+ }
+ return 3 | SUPPORTED;
+ }
+ else if ((op2 & 0xf2) == 0x92)
+ {
+ util::stream_format(stream, "%-8sd%d, ", f_move_ops[BIT(op2, 0, 2)], BIT(op2, 2, 2));
+ format_sp_disp(stream, opcodes.r8(pc + 2));
+ return 3 | SUPPORTED;
+ }
+ else switch (op2 & 0xfc)
+ {
+ case 0xb8: case 0xbc:
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 2, 2)]);
+ format_sp_disp(stream, opcodes.r8(pc + 2));
+ util::stream_format(stream, ", d%d", BIT(op2, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0xc0: case 0xc4: case 0xc8:
+ util::stream_format(stream, "%-8s%u, d%d", f_shift_ops[BIT(op2, 2, 2)], opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0xe0: case 0xe4: case 0xec:
+ util::stream_format(stream, "%-8s0x%02x, d%d", f_logical_ops[BIT(op2, 2, 2)], opcodes.r8(pc + 2), BIT(op2, 0, 2)); // zero_ext
+ return 3 | SUPPORTED;
+
+ case 0xe8:
+ util::stream_format(stream, "%-8s0x%08x", f_ext_branches[BIT(op2, 0, 2)], u32(pc + s8(opcodes.r8(pc + 2))));
+ return 3 | STEP_COND | SUPPORTED;
+
+ case 0xf0:
+ util::stream_format(stream, "%-8s", "mov");
+ format_an_disp(stream, s8(opcodes.r8(pc + 2)), BIT(op2, 0, 2));
+ stream << ", sp";
+ return 3 | SUPPORTED;
+
+ case 0xf4:
+ util::stream_format(stream, "%-8ssp, ", "mov");
+ format_an_disp(stream, s8(opcodes.r8(pc + 2)), BIT(op2, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0xfc:
+ if (op2 == 0xfe)
+ {
+ util::stream_format(stream, "%-8s", "add");
+ format_immediate(stream, s8(opcodes.r8(pc + 2))); // sign_ext
+ stream << ", sp";
+ return 3 | SUPPORTED;
+ }
+ break;
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_f9(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (BIT(op2, 2))
+ util::stream_format(stream, "udfu%02d 0x%02x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "udf%02d 0x%02x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ return 3 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_fa(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (op2 < 0x80)
+ {
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 5, 2)]);
+ if (BIT(op2, 4))
+ {
+ util::stream_format(stream, "%c%d, ", BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 2, 2));
+ format_an_disp(stream, s16(opcodes.r16(pc + 2)), BIT(op2, 0, 2));
+ }
+ else
+ {
+ format_an_disp(stream, s16(opcodes.r16(pc + 2)), BIT(op2, 0, 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 2, 2));
+ }
+ return 4 | SUPPORTED;
+ }
+ else if (op2 < 0xa0)
+ {
+ switch (op2 & 0x13)
+ {
+ case 0x00:
+ util::stream_format(stream, "%-8sa%d, (0x%04x)", "mov", BIT(op2, 2, 2), opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ util::stream_format(stream, "%-8sd%d, ", f_move_ops[BIT(op2, 0, 2)], BIT(op2, 0, 2) == 0 ? 'a' : 'd', BIT(op2, 2, 2));
+ format_sp_disp(stream, opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+ }
+ }
+ else switch (op2 & 0xfc)
+ {
+ case 0xa0:
+ util::stream_format(stream, "%-8s(0x%04x), a%d", "mov", opcodes.r16(pc + 2), BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xb0: case 0xb4: case 0xb8: case 0xbc:
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 2, 2)]);
+ format_sp_disp(stream, opcodes.r16(pc + 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 2, 2) == 0 ? 'a' : 'd', BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xc0: case 0xd0:
+ util::stream_format(stream, "%-8s", "add");
+ format_immediate(stream, s16(opcodes.r16(pc + 2)));
+ util::stream_format(stream, ", %c%d", BIT(op2, 4) ? 'a' : 'd', BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xc8:
+ util::stream_format(stream, "%-8s", "cmp");
+ format_immediate(stream, s16(opcodes.r16(pc + 2))); // sign_ext
+ util::stream_format(stream, ", d%d", BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xd8:
+ util::stream_format(stream, "%-8s", "cmp");
+ format_immediate_unsigned(stream, opcodes.r16(pc + 2)); // zero_ext
+ util::stream_format(stream, ", a%d", BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xe0: case 0xe4: case 0xe8: case 0xec:
+ util::stream_format(stream, "%-8s0x%04x, d%d", f_logical_ops[BIT(op2, 2, 2)], opcodes.r16(pc + 2), BIT(op2, 0, 2)); // zero_ext
+ return 4 | SUPPORTED;
+
+ case 0xf0:
+ util::stream_format(stream, "%-8s0x%02x, ", "bset", opcodes.r8(pc + 3));
+ format_an_disp(stream, opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xf4:
+ util::stream_format(stream, "%-8s0x%02x, ", "bclr", opcodes.r8(pc + 3));
+ format_an_disp(stream, opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xf8:
+ util::stream_format(stream, "%-8s0x%02x, ", "btst", opcodes.r8(pc + 3));
+ format_an_disp(stream, opcodes.r8(pc + 2), BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+
+ case 0xfc:
+ if (op2 == 0xfe)
+ {
+ util::stream_format(stream, "%-8s", "add");
+ format_immediate(stream, s16(opcodes.r16(pc + 2))); // sign_ext
+ stream << ", sp";
+ return 4 | SUPPORTED;
+ }
+ else if (op2 == 0xff)
+ {
+ util::stream_format(stream, "%-8s(0x%08x)", "calls", u32(pc + s16(opcodes.r16(pc + 2))));
+ return 4 | STEP_OVER | SUPPORTED;
+ }
+ else
+ {
+ util::stream_format(stream, "%-8s0x%04x, psw", f_logical_ops[BIT(op2, 0)], opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+ }
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_fb(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (BIT(op2, 2))
+ util::stream_format(stream, "udfu%02d 0x%04x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r16(pc + 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "udf%02d 0x%04x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r16(pc + 2), BIT(op2, 0, 2));
+ return 4 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_fc(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (op2 < 0x80)
+ {
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 5, 2)]);
+ if (BIT(op2, 4))
+ util::stream_format(stream, "%c%d, (0x%08x, a%d)", BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 2, 2), opcodes.r32(pc + 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "(0x%08x, a%d), %c%d", opcodes.r32(pc + 2), BIT(op2, 2, 2), BIT(op2, 5, 2) == 1 ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+ }
+ else if (op2 < 0xa0)
+ {
+ util::stream_format(stream, "%-8s%c%d, ", f_move_ops[BIT(op2, 0, 2)], BIT(op2, 0, 2) == 0 ? 'a' : 'd', BIT(op2, 2, 2));
+ if (BIT(op2, 4))
+ format_sp_disp(stream, opcodes.r32(pc + 2));
+ else
+ util::stream_format(stream, "(0x%08x)", opcodes.r32(pc + 2));
+ return 6 | SUPPORTED;
+ }
+ else if (op2 < 0xc0)
+ {
+ util::stream_format(stream, "%-8s", f_move_ops[BIT(op2, 2, 2)]);
+ if (BIT(op2, 4))
+ format_sp_disp(stream, opcodes.r32(pc + 2));
+ else
+ util::stream_format(stream, "(0x%08x)", opcodes.r32(pc + 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 2, 2) == 0 ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+ }
+ else switch (op2 & 0xfc)
+ {
+ case 0xc0: case 0xd0:
+ util::stream_format(stream, "%-8s", "add");
+ format_immediate_unsigned(stream, opcodes.r32(pc + 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 4) ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+
+ case 0xc4: case 0xd4:
+ util::stream_format(stream, "%-8s", "sub");
+ format_immediate_unsigned(stream, opcodes.r32(pc + 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 4) ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+
+ case 0xc8: case 0xd8:
+ util::stream_format(stream, "%-8s", "cmp");
+ format_immediate_unsigned(stream, opcodes.r32(pc + 2));
+ util::stream_format(stream, ", %c%d", BIT(op2, 4) ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+
+ case 0xcc: case 0xdc:
+ util::stream_format(stream, "%-8s0x%08x, %c%d", "mov", opcodes.r32(pc + 2), BIT(op2, 4) ? 'a' : 'd', BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+
+ case 0xe0: case 0xe4: case 0xe8: case 0xec:
+ util::stream_format(stream, "%-8s0x%08x, d%d", f_logical_ops[BIT(op2, 2, 2)], opcodes.r32(pc + 2), BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+
+ case 0xfc:
+ if (op2 == 0xfe)
+ {
+ util::stream_format(stream, "%-8s0x%08x, sp", "add", opcodes.r32(pc + 2));
+ return 6 | SUPPORTED;
+ }
+ else if (op2 == 0xff)
+ {
+ util::stream_format(stream, "%-8s(0x%08x)", "calls", u32(pc + opcodes.r32(pc + 2)));
+ return 6 | STEP_OVER | SUPPORTED;
+ }
+ else
+ break;
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_fd(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ if (BIT(op2, 2))
+ util::stream_format(stream, "udfu%02d 0x%08x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r32(pc + 2), BIT(op2, 0, 2));
+ else
+ util::stream_format(stream, "udf%02d 0x%08x, d%d", (BIT(op2, 3) ? 20 : 0) + (op2 >> 4), opcodes.r32(pc + 2), BIT(op2, 0, 2));
+ return 6 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble_fe(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes) const
+{
+ u8 op2 = opcodes.r8(pc + 1);
+ switch (op2)
+ {
+ case 0x00:
+ util::stream_format(stream, "%-8s0x%02x, (0x%08x)", "bset", opcodes.r8(pc + 6), opcodes.r32(pc + 2));
+ return 7 | SUPPORTED;
+
+ case 0x01:
+ util::stream_format(stream, "%-8s0x%02x, (0x%08x)", "bclr", opcodes.r8(pc + 6), opcodes.r32(pc + 2));
+ return 7 | SUPPORTED;
+
+ case 0x02:
+ util::stream_format(stream, "%-8s0x%02x, (0x%08x)", "btst", opcodes.r8(pc + 6), opcodes.r32(pc + 2));
+ return 7 | SUPPORTED;
+
+ case 0x80:
+ util::stream_format(stream, "%-8s0x%02x, (0x%04x)", "bset", opcodes.r8(pc + 4), opcodes.r16(pc + 2));
+ return 5 | SUPPORTED;
+
+ case 0x81:
+ util::stream_format(stream, "%-8s0x%02x, (0x%04x)", "bclr", opcodes.r8(pc + 4), opcodes.r16(pc + 2));
+ return 5 | SUPPORTED;
+
+ case 0x82:
+ util::stream_format(stream, "%-8s0x%02x, (0x%04x)", "btst", opcodes.r8(pc + 4), opcodes.r16(pc + 2));
+ return 5 | SUPPORTED;
+ }
+
+ stream << "?";
+ return 1 | SUPPORTED;
+}
+
+offs_t mn10300_disassembler::disassemble(std::ostream &stream, offs_t pc, const mn10300_disassembler::data_buffer &opcodes, const mn10300_disassembler::data_buffer &params)
+{
+ u8 opcode = opcodes.r8(pc);
+ switch (opcode)
+ {
+ case 0x00: case 0x04: case 0x08: case 0x0c:
+ util::stream_format(stream, "%-8sd%d", "clr", BIT(opcode, 2, 2));
+ return 1 | SUPPORTED;
+
+ case 0x01: case 0x05: case 0x09: case 0x0d:
+ case 0x02: case 0x06: case 0x0a: case 0x0e:
+ case 0x03: case 0x07: case 0x0b: case 0x0f:
+ util::stream_format(stream, "%-8sd%d, (0x%04x)", f_move_ops[BIT(opcode, 0, 2)], BIT(opcode, 2, 2), opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0x10: case 0x11: case 0x12: case 0x13:
+ util::stream_format(stream, "%-8sd%d", "extb", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x14: case 0x15: case 0x16: case 0x17:
+ util::stream_format(stream, "%-8sd%d", "extbu", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x18: case 0x19: case 0x1a: case 0x1b:
+ util::stream_format(stream, "%-8sd%d", "exth", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ util::stream_format(stream, "%-8sd%d", "exthu", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x20: case 0x21: case 0x22: case 0x23:
+ case 0x28: case 0x29: case 0x2a: case 0x2b:
+ util::stream_format(stream, "%-8s", "add");
+ format_immediate(stream, s8(opcodes.r8(pc + 1)));
+ util::stream_format(stream, ", %c%d", BIT(opcode, 3) ? 'd' : 'a', BIT(opcode, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x24: case 0x25: case 0x26: case 0x27:
+ util::stream_format(stream, "%-8s", "mov");
+ format_immediate_unsigned(stream, opcodes.r16(pc + 1)); // zero_ext
+ util::stream_format(stream, ", a%d", BIT(opcode, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ util::stream_format(stream, "%-8s", "mov");
+ format_immediate(stream, s16(opcodes.r16(pc + 1))); // sign_ext
+ util::stream_format(stream, ", d%d", BIT(opcode, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x38: case 0x39: case 0x3a: case 0x3b:
+ util::stream_format(stream, "%-8s(0x%04x), d%d", f_move_ops[BIT(opcode, 2, 2) + 1], opcodes.r16(pc + 1), BIT(opcode, 0, 2));
+ return 3 | SUPPORTED;
+
+ case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ util::stream_format(stream, "%-8ssp, a%d", "mov", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x40: case 0x44: case 0x48: case 0x4c:
+ case 0x41: case 0x45: case 0x49: case 0x4d:
+ util::stream_format(stream, "%-8s%c%d", "inc", BIT(opcode, 0) ? 'a' : 'd', BIT(opcode, 2, 2));
+ return 1 | SUPPORTED;
+
+ case 0x42: case 0x46: case 0x4a: case 0x4e:
+ case 0x43: case 0x47: case 0x4b: case 0x4f:
+ util::stream_format(stream, "%-8s%c%d, ", "mov", BIT(opcode, 0) ? 'a' : 'd', BIT(opcode, 2, 2));
+ format_sp_disp(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ util::stream_format(stream, "%-8sa%d", "inc4", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x54: case 0x55: case 0x56: case 0x57:
+ util::stream_format(stream, "%-8sd%d", "asl2", BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x58: case 0x59: case 0x5a: case 0x5b:
+ case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ util::stream_format(stream, "%-8s", "mov");
+ format_sp_disp(stream, opcodes.r8(pc + 1));
+ util::stream_format(stream, ", %c%d", BIT(opcode, 2) ? 'a' : 'd', BIT(opcode, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x60: case 0x61: case 0x62: case 0x63:
+ case 0x64: case 0x65: case 0x66: case 0x67:
+ case 0x68: case 0x69: case 0x6a: case 0x6b:
+ case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ util::stream_format(stream, "%-8sd%d, (a%d)", "mov", BIT(opcode, 2, 2), BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x70: case 0x71: case 0x72: case 0x73:
+ case 0x74: case 0x75: case 0x76: case 0x77:
+ case 0x78: case 0x79: case 0x7a: case 0x7b:
+ case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ util::stream_format(stream, "%-8s(a%d), d%d", "mov", BIT(opcode, 0, 2), BIT(opcode, 2, 2));
+ return 1 | SUPPORTED;
+
+ case 0x80: case 0x85: case 0x8a: case 0x8f:
+ case 0xa0: case 0xa5: case 0xaa: case 0xaf:
+ util::stream_format(stream, "%-8s", BIT(opcode, 5) ? "cmp" : "mov");
+ format_immediate(stream, s8(opcodes.r8(pc + 1)));
+ util::stream_format(stream, ", d%d", BIT(opcode, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x81: case 0x82: case 0x83:
+ case 0x84: case 0x86: case 0x87:
+ case 0x88: case 0x89: case 0x8b:
+ case 0x8c: case 0x8d: case 0x8e:
+ case 0xa1: case 0xa2: case 0xa3:
+ case 0xa4: case 0xa6: case 0xa7:
+ case 0xa8: case 0xa9: case 0xab:
+ case 0xac: case 0xad: case 0xae:
+ util::stream_format(stream, "%-8sd%d, d%d", BIT(opcode, 5) ? "cmp" : "mov", BIT(opcode, 2, 2), BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0x90: case 0x95: case 0x9a: case 0x9f:
+ case 0xb0: case 0xb5: case 0xba: case 0xbf:
+ util::stream_format(stream, "%-8s", BIT(opcode, 5) ? "cmp" : "mov");
+ format_immediate_unsigned(stream, opcodes.r8(pc + 1)); // zero_ext
+ util::stream_format(stream, ", a%d", BIT(opcode, 0, 2));
+ return 2 | SUPPORTED;
+
+ case 0x91: case 0x92: case 0x93:
+ case 0x94: case 0x96: case 0x97:
+ case 0x98: case 0x99: case 0x9b:
+ case 0x9c: case 0x9d: case 0x9e:
+ case 0xb1: case 0xb2: case 0xb3:
+ case 0xb4: case 0xb6: case 0xb7:
+ case 0xb8: case 0xb9: case 0xbb:
+ case 0xbc: case 0xbd: case 0xbe:
+ util::stream_format(stream, "%-8sa%d, a%d", BIT(opcode, 5) ? "cmp" : "mov", BIT(opcode, 2, 2), BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3: case 0xc4: case 0xc5: case 0xc6: case 0xc7: case 0xc8: case 0xc9:
+ util::stream_format(stream, "b%-7s0x%08x", f_conds[opcode & 0x0f], u32(pc + s8(opcodes.r8(pc + 1))));
+ return 2 | STEP_COND | SUPPORTED;
+
+ case 0xca:
+ util::stream_format(stream, "%-8s0x%08x", "bra", u32(pc + s8(opcodes.r8(pc + 1))));
+ return 2 | SUPPORTED;
+
+ case 0xcb:
+ stream << "nop";
+ return 1 | SUPPORTED;
+
+ case 0xcc:
+ util::stream_format(stream, "%-8s0x%08x", "jmp", u32(pc + s16(opcodes.r16(pc + 1))));
+ return 3 | SUPPORTED;
+
+ case 0xcd:
+ util::stream_format(stream, "%-8s0x%08x, ", "call", u32(pc + s16(opcodes.r16(pc + 1))));
+ format_regs(stream, opcodes.r8(pc + 3));
+ stream << ", ";
+ format_immediate_unsigned(stream, opcodes.r8(pc + 4));
+ return 5 | STEP_OVER | SUPPORTED;
+
+ case 0xce:
+ util::stream_format(stream, "%-8s(sp), ", "movm");
+ format_regs(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0xcf:
+ util::stream_format(stream, "%-8s", "movm");
+ format_regs(stream, opcodes.r8(pc + 1));
+ stream << ", (sp)";
+ return 2 | SUPPORTED;
+
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3: case 0xd4: case 0xd5: case 0xd6: case 0xd7: case 0xd8: case 0xd9:
+ util::stream_format(stream, "l%s", f_conds[opcode & 0x0f]);
+ return 1 | STEP_COND | SUPPORTED;
+
+ case 0xda:
+ stream << "lra";
+ return 1 | SUPPORTED;
+
+ case 0xdb:
+ stream << "setlb";
+ return 1 | SUPPORTED;
+
+ case 0xdc:
+ util::stream_format(stream, "%-8s0x%08x", "jmp", u32(pc + opcodes.r32(pc + 1)));
+ return 5 | SUPPORTED;
+
+ case 0xdd:
+ util::stream_format(stream, "%-8s0x%08x, ", "call", u32(pc + opcodes.r32(pc + 1)));
+ format_regs(stream, opcodes.r8(pc + 5));
+ stream << ", ";
+ format_immediate_unsigned(stream, opcodes.r8(pc + 6));
+ return 7 | STEP_OVER | SUPPORTED;
+
+ case 0xde: case 0xdf:
+ util::stream_format(stream, "%-8s", BIT(opcode, 0) ? "ret" : "retf");
+ format_regs(stream, opcodes.r8(pc + 1));
+ stream << ", ";
+ format_immediate_unsigned(stream, opcodes.r8(pc + 2));
+ return 3 | STEP_OUT | SUPPORTED;
+
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3:
+ case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ case 0xe8: case 0xe9: case 0xea: case 0xeb:
+ case 0xec: case 0xed: case 0xee: case 0xef:
+ util::stream_format(stream, "%-8sd%d, d%d", "add", BIT(opcode, 2, 2), BIT(opcode, 0, 2));
+ return 1 | SUPPORTED;
+
+ case 0xf0:
+ return disassemble_f0(stream, pc, opcodes);
+
+ case 0xf1:
+ return disassemble_f1(stream, pc, opcodes);
+
+ case 0xf2:
+ return disassemble_f2(stream, pc, opcodes);
+
+ case 0xf3:
+ return disassemble_f3(stream, pc, opcodes);
+
+ case 0xf4:
+ return disassemble_f4(stream, pc, opcodes);
+
+ case 0xf5:
+ return disassemble_f5(stream, pc, opcodes);
+
+ case 0xf6:
+ return disassemble_f6(stream, pc, opcodes);
+
+ case 0xf8:
+ return disassemble_f8(stream, pc, opcodes);
+
+ case 0xf9:
+ return disassemble_f9(stream, pc, opcodes);
+
+ case 0xfa:
+ return disassemble_fa(stream, pc, opcodes);
+
+ case 0xfb:
+ return disassemble_fb(stream, pc, opcodes);
+
+ case 0xfc:
+ return disassemble_fc(stream, pc, opcodes);
+
+ case 0xfd:
+ return disassemble_fd(stream, pc, opcodes);
+
+ case 0xfe:
+ return disassemble_fe(stream, pc, opcodes);
+
+ default:
+ stream << "?";
+ return 1 | SUPPORTED;
+ }
+}
diff --git a/src/devices/cpu/mn10300/mn103dasm.h b/src/devices/cpu/mn10300/mn103dasm.h
new file mode 100644
index 00000000000..b1acf39ab7a
--- /dev/null
+++ b/src/devices/cpu/mn10300/mn103dasm.h
@@ -0,0 +1,42 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+
+#ifndef MAME_CPU_MN10300_MN103DASM_H
+#define MAME_CPU_MN10300_MN103DASM_H
+
+#pragma once
+
+class mn10300_disassembler : public util::disasm_interface
+{
+public:
+ // construction/destruction
+ mn10300_disassembler();
+
+ // disassembler overrides
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ void format_immediate(std::ostream &stream, u32 imm) const;
+ void format_immediate_unsigned(std::ostream &stream, u32 imm) const;
+ void format_an_disp(std::ostream &stream, u32 imm, int n) const;
+ void format_sp_disp(std::ostream &stream, u32 imm) const;
+ void format_regs(std::ostream &stream, u8 regs) const;
+
+ offs_t disassemble_f0(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f1(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f2(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f3(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f4(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f5(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f6(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f8(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_f9(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_fa(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_fb(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_fc(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_fd(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+ offs_t disassemble_fe(std::ostream &stream, offs_t pc, const data_buffer &opcodes) const;
+};
+
+#endif // MAME_CPU_MN10300_MN103DASM_H
diff --git a/src/devices/cpu/mn1400/mn1400.cpp b/src/devices/cpu/mn1400/mn1400.cpp
index 75737359030..b1a8d8449fb 100644
--- a/src/devices/cpu/mn1400/mn1400.cpp
+++ b/src/devices/cpu/mn1400/mn1400.cpp
@@ -136,5 +136,6 @@ void mn1400_cpu_device::execute_one()
}
break; // 0xfc
- }
+
+ } // 0xf0
}
diff --git a/src/devices/cpu/mn1400/mn1400base.h b/src/devices/cpu/mn1400/mn1400base.h
index 55f10cb4f65..1749f070257 100644
--- a/src/devices/cpu/mn1400/mn1400base.h
+++ b/src/devices/cpu/mn1400/mn1400base.h
@@ -47,9 +47,9 @@ protected:
mn1400_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -64,10 +64,10 @@ protected:
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
- void program_1kx8(address_map &map);
- void program_2kx8(address_map &map);
- void data_64x4(address_map &map);
- void data_128x4(address_map &map);
+ void program_1kx8(address_map &map) ATTR_COLD;
+ void program_2kx8(address_map &map) ATTR_COLD;
+ void data_64x4(address_map &map) ATTR_COLD;
+ void data_128x4(address_map &map) ATTR_COLD;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/mn1400/mn1400d.cpp b/src/devices/cpu/mn1400/mn1400d.cpp
index 04410d4e30b..ae22889279c 100644
--- a/src/devices/cpu/mn1400/mn1400d.cpp
+++ b/src/devices/cpu/mn1400/mn1400d.cpp
@@ -9,6 +9,24 @@
#include "emu.h"
#include "mn1400d.h"
+
+// common lookup tables
+
+enum mn1400_disassembler::e_mnemonics : unsigned
+{
+ mILL, mILL2,
+ mL, mLD, mLI, mLIC, mLDC, mST, mSTD, mSTIC, mSTDC,
+ mLX, mLY, mTAX, mTAY, mTYA, mTACU, mTACL, mTCAU, mTCAL,
+ mNOP, mAND, mANDI, mOR, mXOR, mA, mAI, mCPL, mC, mCI, mCY,
+ mSL, mICY, mDCY, mICM, mDCM, mSM, mRM, mTB,
+ mINA, mINB, mOTD, mOTMD, mOTE, mOTIE, mRCO, mSCO, mCCO,
+ mRC, mRP, mSC, mSP,
+ mBS0, mBS1, mBS01, mBSN0, mBSN1, mBSN01,
+ mBP, mBC, mBZ, mBPC, mBPZ, mBCZ, mBPCZ,
+ mBNP, mBNC, mBNZ, mBNPC, mBNPZ, mBNCZ, mBNPCZ,
+ mJMP, mCAL, mRET, mEC, mDC
+};
+
const char *const mn1400_disassembler::s_mnemonics[] =
{
"?", "?",
@@ -81,6 +99,8 @@ const u8 mn1400_disassembler::mn1400_mnemonic[0x100] =
};
+// disasm
+
offs_t mn1400_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
offs_t pos = pc;
diff --git a/src/devices/cpu/mn1400/mn1400d.h b/src/devices/cpu/mn1400/mn1400d.h
index 7d3b0af1d28..a51d9445b1b 100644
--- a/src/devices/cpu/mn1400/mn1400d.h
+++ b/src/devices/cpu/mn1400/mn1400d.h
@@ -23,21 +23,7 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum e_mnemonics
- {
- mILL, mILL2,
- mL, mLD, mLI, mLIC, mLDC, mST, mSTD, mSTIC, mSTDC,
- mLX, mLY, mTAX, mTAY, mTYA, mTACU, mTACL, mTCAU, mTCAL,
- mNOP, mAND, mANDI, mOR, mXOR, mA, mAI, mCPL, mC, mCI, mCY,
- mSL, mICY, mDCY, mICM, mDCM, mSM, mRM, mTB,
- mINA, mINB, mOTD, mOTMD, mOTE, mOTIE, mRCO, mSCO, mCCO,
- mRC, mRP, mSC, mSP,
- mBS0, mBS1, mBS01, mBSN0, mBSN1, mBSN01,
- mBP, mBC, mBZ, mBPC, mBPZ, mBCZ, mBPCZ,
- mBNP, mBNC, mBNZ, mBNPC, mBNPZ, mBNCZ, mBNPCZ,
- mJMP, mCAL, mRET, mEC, mDC
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonics[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/mn1400/mn1400op.cpp b/src/devices/cpu/mn1400/mn1400op.cpp
index 5d3defc88bb..4e5018ee840 100644
--- a/src/devices/cpu/mn1400/mn1400op.cpp
+++ b/src/devices/cpu/mn1400/mn1400op.cpp
@@ -45,7 +45,7 @@ void mn1400_cpu_device::op_illegal()
// opcodes
-// load/store instructions
+// data transfer instructions
void mn1400_cpu_device::op_l()
{
diff --git a/src/devices/cpu/mn1880/mn1880.h b/src/devices/cpu/mn1880/mn1880.h
index 1e6d19699a2..787ad33cd83 100644
--- a/src/devices/cpu/mn1880/mn1880.h
+++ b/src/devices/cpu/mn1880/mn1880.h
@@ -32,8 +32,8 @@ protected:
mn1880_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, bool has_mmu, address_map_constructor data_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -50,7 +50,7 @@ protected:
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- void internal_data_map(address_map &map);
+ void internal_data_map(address_map &map) ATTR_COLD;
private:
struct cpu_registers
diff --git a/src/devices/cpu/mpk1839/kl1839vm1.cpp b/src/devices/cpu/mpk1839/kl1839vm1.cpp
new file mode 100644
index 00000000000..7bacc2fec5d
--- /dev/null
+++ b/src/devices/cpu/mpk1839/kl1839vm1.cpp
@@ -0,0 +1,1088 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+
+#include "emu.h"
+#include "kl1839vm1.h"
+#include "kl1839vm1dasm.h"
+
+#include "cpu/vax/vaxdasm.h"
+
+#include <algorithm>
+#include <regex>
+
+
+#define LOG_VAX (1U << 1)
+
+//#define VERBOSE ( LOG_GENERAL | LOG_VAX )
+#include "logmacro.h"
+
+#define UNIMPLEMENTED(msg) LOG("Unimplemented: %s\n", msg)
+#define LOGVAX(...) LOGMASKED(LOG_VAX, __VA_ARGS__)
+
+#define AMC m_amc.d // Microcode PC
+#define RV m_rv.d // Return Address
+#define SCH m_sch.b.l // Counter
+#define RSP m_rsp.b.l // Flags
+
+#define K(x) m_consts[x & 0x0f]
+#define PCM K(5)
+#define RC K(6) // Constant
+
+/* registers of various sizes */
+#define R(x) m_reg[x].d
+
+#define AP R(0x0c)
+#define FP R(0x0d)
+#define SP R(0x0e)
+#define PC R(0x0f)
+
+#define RNK R(0x1c)
+#define RKA R(0x1d) // KRSP?
+#define PSL R(0x1e)
+#define PSW m_reg[0x1e].w.l
+#define BO R(0x1f)
+
+#define NF 0x08
+#define ZF 0x04
+#define VF 0x02
+#define CF 0x01
+
+DEFINE_DEVICE_TYPE(KL1839VM1, kl1839vm1_device, "kl1839vm1", "KL1839VM1")
+
+
+kl1839vm1_device::kl1839vm1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : cpu_device(mconfig, KL1839VM1, tag, owner, clock)
+ , m_microcode_config("microcode", ENDIANNESS_BIG, 32, 14, -2)
+ , m_sysram_config("sysram", ENDIANNESS_BIG, 8, 24, 0)
+ , m_ram_config("ram", ENDIANNESS_LITTLE, 8, 24, 0)
+ , m_io_config("io", ENDIANNESS_LITTLE, 32, 6, -2)
+{
+}
+
+device_memory_interface::space_config_vector kl1839vm1_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_OPCODES, &m_microcode_config),
+ std::make_pair(AS_DATA, &m_sysram_config),
+ std::make_pair(AS_PROGRAM, &m_ram_config),
+ std::make_pair(AS_IO, &m_io_config)
+ };
+}
+
+void kl1839vm1_device::flag(u32 op)
+{
+ const bool tou = BIT(op, 16);
+ if (tou)
+ {
+ // TODO Stop BO till the end of DP (Memory Manager?)
+ }
+
+ const bool copwt = BIT(op, 15);
+ if (copwt)
+ {
+ RNK = PC;
+ RKA = PSL;
+ }
+}
+
+void kl1839vm1_device::rest(u32 op)
+{
+}
+
+/*
+ Shift/Rotate
+
+ val:
+ va: 0 - Carry read; 1 - Carry write
+ fo: 0 - dw, 1 - w, 2 - b; 3 - dd
+ a_c: 1 - arithmetical, 0 - cyclic
+ l_r: 1 - left, 0 - right
+*/
+u32 kl1839vm1_device::shr(u32 val, bool va, u8 fo, bool a_c, bool l_r)
+{
+ u8 left_bit;
+ switch (fo & 0b11)
+ {
+ case 0b00: left_bit = 31; break;
+ case 0b01: left_bit = 15; break;
+ case 0b10: left_bit = 31; break;
+ case 0b11: left_bit = 7; break;
+ }
+ const u8 rd = l_r ? left_bit : 0;
+ const u8 wr = l_r ? 0 : left_bit;
+
+ const bool carry_out = BIT(val, rd);
+ u32 res = l_r ? (val << 1) : (val >> 1);
+ res &= ~(1 << wr);
+ if (!a_c)
+ {
+ res |= (va ? (PSW & CF) : carry_out) << wr;
+ }
+ else if (l_r && !va)
+ {
+ res |= carry_out << wr;
+ }
+
+ RSP |= carry_out;
+ if (a_c && l_r && (fo == 0b10) && (carry_out != BIT(res, rd)))
+ {
+ RSP |= VF;
+ }
+ return res;
+}
+
+void kl1839vm1_device::kop(u8 kop, u8 fd, u32 x, u32 y, u8 rz, u8 ps, bool va = false, u8 fo = 0)
+{
+ u64 res = 0;
+ switch (fd)
+ {
+ case 0b11:
+ x = s8(x);
+ y = s8(y);
+ break;
+ case 0b01:
+ x = s16(x);
+ y = s16(y);
+ break;
+ case 0b00:
+ default: // 0b10
+ break;
+ }
+
+ RSP &= ~(VF | CF);
+ switch (kop)
+ {
+ case 0b0000: res = y; break;
+ // 0b0001:
+ case 0b0010: res = u64(x) + y; break;
+ case 0b0011: res = x; break;
+ case 0b0100: res = u64(x) - y; break;
+ // 0b0101
+ case 0b0110: res = u64(y) - x; break;
+ case 0b0111: res = ~x; break;
+ case 0b1000: res = x ^ y; break;
+ case 0b1001: res = shr(x, va, fo, 1, 1); break; // AL
+ case 0b1010: res = x | y; break;
+ case 0b1011: res = shr(x, va, fo, 0, 1); break; // CL
+ case 0b1100: res = x & ~y; break;
+ case 0b1101: res = shr(x, va, fo, 1, 0); break; // AR
+ case 0b1110: res = x & y; break;
+ case 0b1111: res = shr(x, va, fo, 0, 0); break; // CR
+ default: break; // 0b0001, 0b0101 - reserved
+ }
+
+ // flags
+ RSP &= ~(NF | ZF);
+ RSP |= BIT(res, 31) ? NF : 0;
+ RSP |= (res == 0) ? ZF : 0;
+ if (kop && ((kop & 0b1001) == 0b0000)) // +/-
+ {
+ const bool sig_y = BIT(y, 31);
+ const bool sig_x = BIT(x, 31);
+ RSP |= (kop == 0b0010) // +
+ ? (((sig_y == sig_x) && (BIT(res, 31) != sig_y)) ? VF : 0)
+ : (((sig_y != sig_x) && (BIT(res, 31) != ((kop == 0b0110) ? sig_y : sig_x))) ? VF : 0);
+
+ RSP |= (((kop & 0b1001) != 0b1001) && BIT(res, 32)) ? CF : 0;
+ }
+ switch (ps)
+ {
+ case 0b00: PSW = (PSW & ~0x0f) | (RSP & 0x0f); break;
+ case 0b01: PSW = (PSW & ~0x0f) | (RSP & 0x0c); break;
+ case 0b10: PSW = (PSW & ~0x0e) | (RSP & 0x0e); break;
+ default: break;
+ }
+
+ switch (fd)
+ {
+ case 0b11:
+ res &= 0x000000ff;
+ R(rz) &= 0xffffff00;
+ break;
+ case 0b01:
+ res &= 0x0000ffff;
+ R(rz) &= 0xffff0000;
+ break;
+ case 0b00:
+ default: // 0b10
+ R(rz) = 0;
+ break;
+ }
+ R(rz) |= res;
+ if (rz == 0x1f)
+ mreg_w();
+}
+
+bool kl1839vm1_device::mreg_r()
+{
+ const u8 kob = BIT(m_vma_tmp.d, 24, 3);
+ if ((kob & 0b101) == 0b001)
+ {
+ const u8 no = BIT(m_vma_tmp.d, 30, 2);
+ switch (no)
+ {
+ case 0b00:
+ BO = m_ram.read_dword(m_vma_tmp.d);
+ break;
+ case 0b10:
+ BO = m_io.read_dword(m_vma_tmp.d);
+ break;
+ case 0b11:
+ BO = m_sysram.read_dword(m_vma_tmp.d);
+ break;
+ default:
+ UNIMPLEMENTED("Read w/ catch BRA");
+ break;
+ }
+
+ return true;
+ }
+
+ return false;
+}
+
+void kl1839vm1_device::mreg_w()
+{
+ const u8 kob = BIT(m_vma_tmp.d, 24, 3);
+ if ((kob & 0b110) == 0b010)
+ {
+ const u8 no = BIT(m_vma_tmp.d, 30, 2);
+ switch (no)
+ {
+ case 0b00:
+ m_ram.write_dword(m_vma_tmp.d, BO);
+ break;
+ case 0b10:
+ m_io.write_dword(m_vma_tmp.d, BO);
+ break;
+ case 0b11:
+ m_sysram.write_dword(m_vma_tmp.d, BO);
+ break;
+ default:
+ UNIMPLEMENTED("Write w/ catch BRA");
+ break;
+ }
+ }
+}
+
+void kl1839vm1_device::ma(u32 op)
+{
+ const u8 fd = BIT(op, 28, 2);
+ const u8 kop1 = BIT(op, 24, 4);
+ u8 am = BIT(op, 20, 4);
+ u8 x = BIT(op, 15, 5);
+ const u8 ps = BIT(op, 13, 2);
+ const bool va = BIT(op, 12);
+ const u8 no = BIT(op, 10, 2);
+ const u8 fo = BIT(op, 8, 2);
+ const u8 kob = BIT(op, 5, 3);
+ const bool pd = BIT(op, 4);
+ const bool po = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ if (am>=0xd)
+ UNIMPLEMENTED("Read const with data mirror K>0x0d");
+ else if (am == 8)
+ UNIMPLEMENTED("Read const with data mirror K=8"); // CRM priveleges check
+
+ if (po)
+ UNIMPLEMENTED("MA: PO");
+
+ u32 kob_data = kop1 ? R(x) : K(am);
+
+ if (m_pcm_queue_size > 0)
+ {
+ if (py)
+ am = vax_pcm_pull();
+ else if (am == 5) // PCM
+ K(5) = vax_pcm_pull(1);
+ else if (pd && (am == 0x1f))
+ BO = vax_pcm_pull(1);
+ if (px)
+ x = vax_pcm_pull();
+ else if (pd && (x == 0x1f))
+ BO = vax_pcm_pull(1);
+ }
+ else if (pd)
+ {
+ mreg_r();
+ }
+
+ kop(kop1, fd, R(x), K(am), x, ps, va, fo);
+ if (va)
+ {
+ kob_data = R(x);
+ }
+ if (fd == 0b10)
+ {
+ RKA = m_sysram.read_dword(R(x));
+ }
+ else
+ {
+ kob_process(no, fo, kob, kob_data, R(x));
+ }
+}
+
+void kl1839vm1_device::mb(u32 op)
+{
+ const u8 fd = BIT(op, 28, 2);
+ const u8 kop2 = BIT(op, 25, 3);
+ u8 y = BIT(op, 20, 5);
+ u8 x = BIT(op, 15, 5);
+ const u8 ps = BIT(op, 13, 2);
+ const bool va = BIT(op, 12);
+ const u8 no = BIT(op, 10, 2);
+ const u8 fo = BIT(op, 8, 2);
+ const u8 kob = BIT(op, 5, 3);
+ const bool pd = BIT(op, 4);
+ const bool po = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ if (po)
+ UNIMPLEMENTED("MB: PO");
+
+ u32 kob_data = kop2 ? R(x) : R(y);
+
+ if (m_pcm_queue_size > 0)
+ {
+ if (py)
+ y = vax_pcm_pull();
+ else if (pd && !mreg_r() && (y == 0x1f))
+ BO = vax_pcm_pull(1);
+ if (px)
+ x = vax_pcm_pull();
+ else if (pd && (x == 0x1f))
+ BO = vax_pcm_pull(1);
+ }
+ else if (pd)
+ {
+ mreg_r();
+ }
+
+ kop(kop2 << 1, fd, R(x), R(y), x, ps, va, fo);
+ if (va)
+ {
+ kob_data = R(x);
+ }
+ kob_process(no, fo, kob, kob_data, R(x));
+}
+
+void kl1839vm1_device::mc(u32 op)
+{
+ const u8 fd = BIT(op, 28, 2);
+ const u8 kop2 = BIT(op, 25, 3);
+ u8 y = BIT(op, 20, 5);
+ u8 x = BIT(op, 15, 5);
+ const u8 ps = BIT(op, 13, 2);
+ u8 z = BIT(op, 7, 5);
+
+ const bool pd = BIT(op, 4);
+ const bool pz = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ if (m_pcm_queue_size > 0)
+ {
+ if (py)
+ y = vax_pcm_pull();
+ else if (pd && !mreg_r() && (y == 0x1f))
+ BO = vax_pcm_pull(1);
+ if (px)
+ x = vax_pcm_pull();
+ else if (pd && !mreg_r() && (x == 0x1f))
+ BO = vax_pcm_pull(1);
+ if (pz)
+ z = vax_pcm_pull();
+ else if (pd && (z == 0x1f))
+ BO = vax_pcm_pull(1);
+ }
+ else if (pd)
+ {
+ mreg_r();
+ }
+
+ kop(kop2 << 1, fd, R(x), kop2 ? R(y) : R(x), z, ps);
+}
+
+void kl1839vm1_device::mk(u32 op)
+{
+ const bool ret = BIT(op, 17);
+ if (!ret)
+ {
+ RV = AMC;
+ }
+
+ if ((op & 0xfe000000) == 0xe0000000)
+ {
+ if (BIT(~op, 16)) // madr == 0
+ {
+ const u16 addr = BIT(op, 2, 14);
+ AMC = addr;
+ }
+ else
+ {
+ u16 addr_hi = BIT(op, 8, 8) << 6;
+ AMC = addr_hi | (R(0x18) & 0x3f);
+ }
+ }
+ else if ((op & 0xfe000000) == 0xe2000000)
+ {
+ u16 addr_hi = BIT(op, 8, 8) << 6;
+ //u8 rpp = BIT(op, 2, 4); // TODO rpp irq code
+ AMC = addr_hi;
+ }
+}
+
+void kl1839vm1_device::yp(u32 op)
+{
+ const bool uv = BIT(op, 28);
+ const bool n = BIT(op, 27);
+ const bool z = BIT(op, 26);
+ const bool v = BIT(op, 25);
+ const bool c = BIT(op, 24);
+ const bool fp = BIT(op, 23);
+ const bool fpd = BIT(op, 22);
+ //const bool prb = BIT(op, 21);
+ //const bool rst = BIT(op, 20);
+ //const bool rd = BIT(op, 19);
+ const bool ret = BIT(op, 17);
+ const bool zhs = BIT(op, 16);
+ const u16 addr = BIT(op, 2, 14);
+
+ bool jump = false;
+ if (fp)
+ {
+ // Jump based on SRF flags
+ jump = uv == m_fp;
+ }
+ else if (fpd)
+ {
+ jump = true;
+ }
+ else
+ {
+ // zhs=1 - don't wait for the state completed
+ const u8 mask = (n << 3) | (z << 2) | (v << 1) | (c << 0);
+ const u8 reg = zhs ? RSP : PSW;
+ jump = uv ? ((reg & mask) != 0) : ((reg & mask) == 0);
+ }
+
+ if (jump)
+ {
+ if (!ret)
+ {
+ RV = AMC;
+ }
+ AMC = addr;
+ }
+}
+
+void kl1839vm1_device::zsch(u32 op)
+{
+ if (m_jzdra_waiting)
+ {
+ SCH = R(0x19);
+ m_jzdra_waiting = false;
+ }
+ else
+ {
+ const bool madr = BIT(op, 16);
+ if (madr)
+ {
+ const u8 cnst_hi = BIT(op, 8, 2) << 6;
+ SCH = cnst_hi | (R(0x18) & 0x3f);
+ }
+ else
+ {
+ const u8 cnst = BIT(op, 2, 8);
+ SCH = cnst;
+ }
+ }
+}
+
+void kl1839vm1_device::psch(u32 op)
+{
+ if (SCH--)
+ {
+ const bool madr = BIT(op, 16);
+ if (madr)
+ {
+ const u16 addr_hi = BIT(op, 8, 8) << 6;
+ AMC = addr_hi | (R(0x18) & 0x3f);
+ }
+ else
+ {
+ const u16 addr = BIT(op, 2, 14);
+ AMC = addr;
+ }
+ }
+}
+
+void kl1839vm1_device::rts(u32 op)
+{
+ AMC = RV;
+}
+
+void kl1839vm1_device::acc(u32 op)
+{
+ UNIMPLEMENTED("ACC");
+}
+
+void kl1839vm1_device::chka(u32 op)
+{
+ const bool madr = BIT(op, 16);
+ if (madr)
+ {
+ const u16 addr_hi = BIT(op, 8, 8) << 6;
+ RC = m_microcode.read_dword(addr_hi | (R(0x18) & 0x3f));
+ }
+ else
+ {
+ const u16 addr = BIT(op, 2, 14);
+ RC= m_microcode.read_dword(addr);
+ }
+}
+
+void kl1839vm1_device::chlk(u32 op)
+{
+ const bool sb = BIT(op, 1);
+ const u32 cnst = BIT(op, 2, 24);
+ RC = (sb * 0xff000000) | cnst;
+}
+
+void kl1839vm1_device::srf(u32 op)
+{
+ if (BIT(op, 25)) // WIMM
+ {
+ UNIMPLEMENTED("SRF: WIMM");
+ }
+ if (BIT(op, 21)) // SFP1
+ {
+ m_fp = true;
+ }
+ if (BIT(op, 20)) // RFP1
+ {
+ m_fp = false;
+ }
+ if (BIT(op, 5)) // DEC
+ {
+ UNIMPLEMENTED("SRF: DEC");
+ }
+ if (BIT(op, 4)) // OCT
+ {
+ }
+ if (BIT(op, 2)) // JDZRA
+ {
+ m_jzdra_waiting = true;
+ }
+ if (BIT(op, 1)) // INC
+ {
+ UNIMPLEMENTED("SRF: INC");
+ }
+}
+
+void kl1839vm1_device::invalid(u32 op)
+{
+}
+
+void kl1839vm1_device::kob_process(u8 no, u8 fo, u8 kob, u32 kob_data, u32 data)
+{
+ switch (kob) {
+ case 0b000: // NOP
+ break;
+ case 0b001: // Data Read
+ case 0b010: // Data Write
+ case 0b011: // Read-Modify-Write
+ m_vma_tmp.d = (no << 30) | (fo << 28) | (kob << 24) | kob_data;
+ break;
+ case 0b100: // Write Accum R(17)
+ R(0x17) = data;
+ break;
+ case 0b101: // Read Command
+ m_vma_tmp.d = 0;
+ PC = data;
+ break;
+ case 0b110: // Offset Write
+ UNIMPLEMENTED("KOB");
+ break;
+
+ case 0b111: // Reserve
+ default:
+ m_vma_tmp.d = 0;
+ break;
+ }
+}
+
+void kl1839vm1_device::decode_op(u32 op)
+{
+ if ((op & 0xc0000000) == 0x00000000) // MA
+ {
+ if ((op & 0xff000000) == 0x01000000)
+ flag(op);
+ else if ((op & 0xff000000) == 0x05000000)
+ rest(op);
+ else
+ ma(op);
+ }
+ else if ((op & 0xc0000000) == 0x40000000) // MB
+ {
+ mb(op);
+ }
+ else if ((op & 0xc0000000) == 0x80000000) // MC
+ {
+ mc(op);
+ }
+ else
+ {
+ if ((op & 0xfc000000) == 0xe0000000)
+ mk(op);
+ else if ((op & 0xe0000000) == 0xc0000000)
+ yp(op);
+ else if ((op & 0xfc000000) == 0xec000000)
+ zsch(op);
+ else if ((op & 0xfc000000) == 0xe4000000)
+ psch(op);
+ else if ((op & 0xfc000000) == 0xf0000000)
+ rts(op);
+ else if ((op & 0xfc000000) == 0xe8000000)
+ acc(op);
+ else if ((op & 0xfc000000) == 0xf4000000)
+ chka(op);
+ else if ((op & 0xfc000000) == 0xf8000000)
+ chlk(op);
+ else if ((op & 0xfc000000) == 0xfc000000)
+ srf(op);
+ else
+ UNIMPLEMENTED(op);
+ }
+}
+
+void kl1839vm1_device::vax_decode_pc()
+{
+ if (m_pcm_queue_size > 0)
+ {
+ LOGVAX("Unused decoded data\n");
+ }
+ m_vma_tmp.d = 0;
+
+ const u8 op = m_ram.read_byte(PC);
+ m_op_size = 1;
+ AMC = op << 4;
+
+ const vax_disassembler::mode* args = vax_disassembler::get_operands(op);
+ u8 arg_n = 0;
+ do
+ {
+ m_mem_reg[arg_n] = ~0; // Default to unknown
+
+ const vax_disassembler::mode mode = args[arg_n];
+ switch (mode)
+ {
+ case vax_disassembler::mode::none:
+ break;
+
+ // byte
+ case vax_disassembler::mode::bb:
+ m_pcm_queue[arg_n] = s8(m_ram.read_byte(PC + m_op_size));
+ m_mem_reg[arg_n] = 0x8f;
+ m_op_size += 1;
+ break;
+
+ case vax_disassembler::mode::cntb:
+ case vax_disassembler::mode::mb:
+ case vax_disassembler::mode::urb:
+ case vax_disassembler::mode::srb:
+ case vax_disassembler::mode::wb:
+ {
+ u8 p = m_ram.read_byte(PC + m_op_size);
+ if (p == 0x8f) // M
+ {
+ m_pcm_queue[arg_n] = m_ram.read_byte(PC + m_op_size + 1);
+ m_mem_reg[arg_n] = p;
+ m_op_size += 2;
+ }
+ else if ((p & 0xf0) == 0x80) // M = R(n)+
+ {
+ m_pcm_queue[arg_n] = p & 0x0f;
+ m_mem_reg[arg_n] = p;
+ m_op_size += 1;
+ }
+ else if ((p & 0xf0) == 0x50) // R
+ {
+ m_pcm_queue[arg_n] = p & 0x0f;
+ m_mem_reg[arg_n] = p;
+ m_op_size += 1;
+ }
+ else // ?
+ {
+ LOGVAX("OP=%02x unknown prefix %02x in operand mode::%02d\n", op, p, u8(mode));
+ m_op_size = 0;
+ }
+ break;
+ }
+
+ // word
+ case vax_disassembler::mode::bw:
+ m_pcm_queue[arg_n] = s16(m_ram.read_word(PC + m_op_size));
+ m_mem_reg[arg_n] = 0x8f;
+ m_op_size += 2;
+ break;
+
+ // dword
+ case vax_disassembler::mode::rl:
+ case vax_disassembler::mode::url:
+ case vax_disassembler::mode::ml:
+ case vax_disassembler::mode::prl:
+ case vax_disassembler::mode::srl:
+ case vax_disassembler::mode::wl:
+ {
+ u8 p = m_ram.read_byte(PC + m_op_size);
+ if (p == 0x8f) // M
+ {
+ m_pcm_queue[arg_n] = m_ram.read_dword(PC + m_op_size + 1);
+ m_mem_reg[arg_n] = p;
+ m_op_size += 5;
+ }
+ else if ((p & 0xf0) == 0x80) // M = R(n)+
+ {
+ m_pcm_queue[arg_n] = p & 0x0f;
+ m_mem_reg[arg_n] = p;
+ m_op_size += 1;
+ }
+ else if ((p & 0xf0) == 0x50) // R
+ {
+ m_pcm_queue[arg_n] = p & 0x0f;
+ m_mem_reg[arg_n] = p;
+ m_op_size += 1;
+ }
+ else // ?
+ {
+ LOGVAX("OP=%02x unknown prefix %02x in operand mode::%02d\n", op, p, u8(mode));
+ m_op_size = 0;
+ }
+ break;
+ }
+
+ default:
+ LOGVAX("(%x): unknown operand mode %02d in OP=%02x (n=%d)\n", PC, u8(mode), op, arg_n + 1);
+ m_op_size = 0;
+ break;
+ }
+
+ ++arg_n;
+ } while ((arg_n < 6) && (args[arg_n] != vax_disassembler::mode::none));
+
+ m_pcm_queue_size = 0;
+ if (m_op_size > 0) // above completed without failure
+ {
+ m_pcm_queue_size = (arg_n == 1 && m_mem_reg[0] == u8(~0)) ? 0 : arg_n; // none args case
+ u8 args_type = 0;
+ if (m_pcm_queue_size > 0)
+ {
+ for (u8 i = 0; i < arg_n; ++i)
+ {
+ args_type <<= 1;
+ if ((m_mem_reg[i] & 0xf0) == 0x80)
+ args_type |= 1;
+ else if ((m_mem_reg[i] & 0xf0) == 0x50)
+ args_type |= 0;
+ else
+ LOGVAX("Unknown argument type: %02x\n", m_mem_reg[i]);
+ }
+ }
+
+ switch (op)
+ {
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ assert(m_op_size == 1); // no operands
+ break;
+
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x30: case 0x31:
+ assert(arg_n == 1);
+ break;
+
+ case 0x94: case 0x95: case 0x96: case 0x97:
+ case 0xb4: case 0xb5: case 0xb6: case 0xb7:
+ case 0xd4: case 0xd5: case 0xd6: case 0xd7:
+ assert(arg_n == 1);
+ AMC += 0x0c * args_type;
+ break;
+
+ case 0xda:
+ case 0xe8: case 0xe9:
+ assert(arg_n == 2);
+ break;
+
+ case 0xdb:
+ assert(arg_n == 2);
+ AMC += BIT(args_type, 0) ? 0x0 : 0x2;
+ break;
+
+ case 0x80: case 0x82: case 0x84: case 0x86: case 0x88: case 0x8a: case 0x8c:
+ case 0x90: case 0x92:
+ case 0xa0: case 0xa2: case 0xa4: case 0xa6: case 0xa8: case 0xaa: case 0xac:
+ case 0xb0: case 0xb2:
+ case 0xc0: case 0xc2: case 0xc4: case 0xc6: case 0xc8: case 0xca: case 0xcc:
+ case 0xd0: case 0xd2:
+ assert(arg_n == 2);
+ switch (args_type)
+ {
+ case 0b00: AMC += 0x0; break; // RR
+ case 0b01: AMC += 0x4; break; // RM
+ case 0b10: AMC += 0xe; break; // MR
+ case 0b11: AMC += 0xc; break; // MM
+ }
+ break;
+
+ case 0x91: case 0x93:
+ case 0xb1: case 0xb3:
+ case 0xd1: case 0xd3:
+ assert(arg_n == 2);
+ switch (args_type)
+ {
+ case 0b00: AMC += 0x0; break; // RR
+ case 0b01: AMC += 0x4; break; // RM
+ case 0b10:
+ case 0b11: AMC += 0xc; break; // MM, MR
+ }
+ break;
+
+ case 0x78:
+ assert(arg_n == 3);
+ AMC += BIT(args_type, 0) ? 0x0 : 0x2;
+ break;
+
+ case 0x81: case 0x83: case 0x85: case 0x87: case 0x89: case 0x8b: case 0x8d:
+ case 0xa1: case 0xa3: case 0xa5: case 0xa7: case 0xa9: case 0xab: case 0xad:
+ case 0xc1: case 0xc3: case 0xc5: case 0xc7: case 0xc9: case 0xcb: case 0xcd:
+ assert(arg_n == 3);
+ switch (args_type)
+ {
+ case 0b000: AMC += 0x0; break; // RRR
+ case 0b011: AMC += 0x4; break; // RMM
+ case 0b010: AMC += 0x6; break; // RMR
+ case 0b001: AMC += 0x8; break; // RRM
+ case 0b110: AMC += 0xe; break; // MMR
+ case 0b111: AMC += 0xc; break; // MMM
+ }
+ break;
+
+ default:
+ LOGVAX("(%x): OP=%02x with %d operands is not implemented or supported\n", PC, op, arg_n);
+ }
+ }
+
+ if (!m_op_size)
+ {
+ LOGVAX("(%x): undecoded OP=%02x .. EXIT\n", PC, op);
+ }
+ else
+ {
+ PC += m_op_size; // move to a next op
+ /*LOGVAX("(%x): Decoded: OP=%02x args:%d \n", PC, op, m_pcm_queue.size())*/;
+ }
+}
+
+u32 kl1839vm1_device::vax_pcm_pull(bool is_bo)
+{
+ if (m_pcm_queue_size == 0)
+ {
+ LOGVAX("Pooling empty decoder queue\n");
+ }
+ else
+ {
+ PCM = m_pcm_queue[0];
+
+ bool is_mem = (m_mem_reg[0] & 0xf0) == 0x80;
+ if (is_bo && !is_mem)
+ {
+ PCM = R(PCM);
+ }
+ else if (is_mem && ((m_mem_reg[0] & 0x0f) != 0x0f))
+ {
+ u8 r = PCM;
+ PCM = R(PCM);
+ R(r) = PCM + 1;
+ }
+
+ std::copy(std::begin(m_pcm_queue) + 1, std::end(m_pcm_queue), std::begin(m_pcm_queue));
+ std::copy(std::begin(m_mem_reg) + 1, std::end(m_mem_reg), std::begin(m_mem_reg));
+ m_pcm_queue_size--;
+ }
+
+ return PCM;
+}
+
+
+void kl1839vm1_device::device_start()
+{
+ m_vax_dasm = std::make_unique<vax_disassembler>();
+
+ space(AS_OPCODES).cache(m_microcode);
+ space(AS_DATA).specific(m_sysram);
+ space(AS_PROGRAM).specific(m_ram);
+ space(AS_IO).specific(m_io);
+
+ save_item(NAME(m_vma_tmp));
+ save_item(NAME(m_rv));
+ save_item(NAME(m_sch));
+ save_item(NAME(m_rsp));
+ save_item(NAME(m_amc));
+ save_item(NAME(m_ppc));
+ save_item(NAME(m_fp));
+ save_item(NAME(m_jzdra_waiting));
+ save_pointer(NAME(m_consts), 0x10);
+ save_pointer(NAME(m_reg), 0x20);
+ save_item(NAME(m_op_size));
+ save_item(NAME(m_pcm_queue_size));
+ save_pointer(NAME(m_pcm_queue), 6);
+ save_pointer(NAME(m_mem_reg), 6);
+
+ // Register debugger state
+ state_add(KL1839_AMC, "AMC", AMC).formatstr("%08X");
+ state_add(KL1839_PSW, "PSW", PSW).formatstr("%08s");
+ state_add(KL1839_IF, "cond", m_fp).formatstr("%08s");
+ state_add(KL1839_RC, "RC", RC).formatstr("%08X");
+ state_add(KL1839_RV, "RV", RV).formatstr("%08X");
+ state_add(KL1839_SCH, "SCH", SCH).formatstr("%02X");
+ state_add_divider(-1);
+ state_add(VAX_R0, "R0", R(0)).formatstr("%08X");
+ state_add(VAX_R1, "R1", R(1)).formatstr("%08X");
+ state_add(VAX_R2, "R2", R(2)).formatstr("%08X");
+ state_add(VAX_R3, "R3", R(3)).formatstr("%08X");
+ state_add(VAX_R4, "R4", R(4)).formatstr("%08X");
+ state_add(VAX_R5, "R5", R(5)).formatstr("%08X");
+ state_add(VAX_R6, "R6", R(6)).formatstr("%08X");
+ state_add(VAX_R7, "R7", R(7)).formatstr("%08X");
+ state_add(VAX_R8, "R8", R(8)).formatstr("%08X");
+ state_add(VAX_R9, "R9", R(9)).formatstr("%08X");
+ state_add(VAX_R10, "R10", R(10)).formatstr("%08X");
+ state_add(VAX_R11, "R11", R(11)).formatstr("%08X");
+ state_add_divider(-1);
+ state_add(VAX_AP, "AP", AP).formatstr("%08X");
+ state_add(VAX_FP, "FP", FP).formatstr("%08X");
+ state_add(VAX_SP, "SP", SP).formatstr("%08X");
+ state_add(VAX_PC, "PC", PC).formatstr("%08X");
+ state_add_divider(-1);
+ state_add(VAX_INST, "INST", PC).formatstr("%20s");
+ state_add_divider(-1);
+ state_add(VAX_AK0, "AK0", R(0x14)).formatstr("%08X");
+ state_add(VAX_AK1, "AK1", R(0x15)).formatstr("%08X");
+ state_add(VAX_AK2, "AK2", R(0x16)).formatstr("%08X");
+ state_add(VAX_AK3, "AK3", R(0x12)).formatstr("%08X");
+ state_add(VAX_AK4, "AK4", R(0x11)).formatstr("%08X");
+ state_add(VAX_AK5, "AK5", R(0x13)).formatstr("%08X");
+ state_add(VAX_AK6, "AK6", R(0x17)).formatstr("%08X");
+ state_add(VAX_AK7, "AK7", R(0x18)).formatstr("%08X");
+ state_add(VAX_AK8, "AK8", R(0x10)).formatstr("%08X");
+ state_add_divider(-1);
+ state_add(VAX_RNK, "RNK", RNK).formatstr("%08X");
+ state_add(VAX_RKA, "RKA", RKA).formatstr("%08X");
+ state_add(VAX_PSL, "PSL", PSL).formatstr("%08X");
+ state_add(VAX_BO, "BO", BO).formatstr("%08X");
+
+ state_add(STATE_GENPC, "GENPC", AMC).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_ppc.d).noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", RSP).formatstr("%8s").noshow();
+
+ set_icountptr(m_icount);
+}
+
+void kl1839vm1_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = string_format("%c%c%c%c%c%c%c%c",
+ RSP & 0x80 ? '?' : '.',
+ RSP & 0x40 ? '?' : '.',
+ RSP & 0x20 ? '?' : '.',
+ RSP & 0x10 ? '?' : '.',
+ RSP & NF ? 'N' : '.',
+ RSP & ZF ? 'Z' : '.',
+ RSP & VF ? 'V' : '.',
+ RSP & CF ? 'C' : '.'
+ );
+ break;
+ case KL1839_PSW:
+ str = string_format("%c%c%c%c%c%c%c%c",
+ PSW & 0x80 ? '?' : '.',
+ PSW & 0x40 ? '?' : '.',
+ PSW & 0x20 ? '?' : '.',
+ PSW & 0x10 ? '?' : '.',
+ PSW & NF ? 'N' : '.',
+ PSW & ZF ? 'Z' : '.',
+ PSW & VF ? 'V' : '.',
+ PSW & CF ? 'C' : '.'
+ );
+ break;
+ case KL1839_IF:
+ str = string_format("FP%d", m_fp);
+ break;
+ case VAX_INST:
+ if (m_op_size)
+ {
+ address_space &space_prg = space(AS_PROGRAM);
+ std::ostringstream buffer;
+ disasm_data_buffer databuf(space_prg);
+ m_vax_dasm->disassemble(buffer, PC - m_op_size, databuf, databuf);
+
+ const std::regex reg("\\s+");
+ str = regex_replace(buffer.str(), reg, " ");
+ }
+ else
+ {
+ str = "--------";
+ }
+ break;
+ }
+}
+
+void kl1839vm1_device::device_reset()
+{
+ for (auto &reg : m_reg)
+ reg.d = 0;
+
+ m_ppc.d = AMC = 0x2000;
+ m_fp = false;
+ m_jzdra_waiting = false;
+ RSP = 0;
+ m_vma_tmp.d = 0;
+ RV = 0;
+ SCH = 0;
+ m_pcm_queue_size = 0;
+ m_op_size = 0;
+}
+
+void kl1839vm1_device::execute_set_input(int irqline, int state)
+{
+}
+
+void kl1839vm1_device::execute_run()
+{
+ do
+ {
+ m_ppc.d = AMC;
+ debugger_instruction_hook(m_ppc.d);
+
+ u32 op = m_microcode.read_dword(AMC);
+ m_icount -= 2;
+ ++AMC &= 0x3fff;
+
+ decode_op(op);
+
+ if (op & 1) // S-bit
+ {
+ vax_decode_pc();
+ }
+ } while (m_icount > 0);
+}
+
+std::unique_ptr<util::disasm_interface> kl1839vm1_device::create_disassembler()
+{
+ return std::make_unique<kl1839vm1_disassembler>();
+}
diff --git a/src/devices/cpu/mpk1839/kl1839vm1.h b/src/devices/cpu/mpk1839/kl1839vm1.h
new file mode 100644
index 00000000000..3d8c32dffe9
--- /dev/null
+++ b/src/devices/cpu/mpk1839/kl1839vm1.h
@@ -0,0 +1,121 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+
+#ifndef MAME_CPU_MPK1839_KL1839VM1_H
+#define MAME_CPU_MPK1839_KL1839VM1_H
+
+#pragma once
+
+#include <deque>
+
+enum
+{
+ KL1839_AMC = STATE_GENPC, KL1839_IF, KL1839_PSW, KL1839_RC, KL1839_RV, KL1839_SCH,
+ VAX_R0, VAX_R1, VAX_R2, VAX_R3, VAX_R4, VAX_R5, VAX_R6, VAX_R7, VAX_R8, VAX_R9, VAX_R10, VAX_R11,
+ VAX_AP, VAX_FP, VAX_SP, VAX_PC,
+ VAX_AK0, VAX_AK1, VAX_AK2, VAX_AK3, VAX_AK4, VAX_AK5, VAX_AK6, VAX_AK7, VAX_AK8,
+ VAX_RNK, VAX_RKA, VAX_PSL, VAX_BO, VAX_INST
+};
+
+
+class kl1839vm1_device : public cpu_device
+{
+public:
+ // construction/destruction
+ kl1839vm1_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+protected:
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface overrides
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 16; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ // device_memory_interface overrides
+ virtual space_config_vector memory_space_config() const override;
+
+ // device_state_interface overrides
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+private:
+ class disasm_data_buffer : public util::disasm_interface::data_buffer
+ {
+ public:
+ disasm_data_buffer(address_space &space) : m_space(space)
+ {
+ }
+
+ virtual u8 r8(offs_t pc) const override { return m_space.read_byte(pc); }
+ virtual u16 r16(offs_t pc) const override { return m_space.read_word(pc); }
+ virtual u32 r32(offs_t pc) const override { return m_space.read_dword(pc); }
+ virtual u64 r64(offs_t pc) const override { return m_space.read_qword(pc); }
+
+ private:
+ address_space &m_space;
+ };
+
+ void flag(u32 op);
+ void rest(u32 op);
+ void ma(u32 op);
+ void mb(u32 op);
+ void mc(u32 op);
+ void mk(u32 op);
+ void yp(u32 op);
+ void zsch(u32 op);
+ void psch(u32 op);
+ void rts(u32 op);
+ void acc(u32 op);
+ void chka(u32 op);
+ void chlk(u32 op);
+ void srf(u32 op);
+ void invalid(u32 op);
+
+ u32 shr(u32 val, bool va, u8 fo, bool a_c, bool l_r);
+ void kob_process(u8 no, u8 fd, u8 kob, u32 kob_data, u32 data);
+ void kop(u8 kop, u8 fd, u32 x, u32 y, u8 rz, u8 ps, bool va, u8 fo);
+ void mreg_w();
+ bool mreg_r();
+ void decode_op(u32 op);
+
+ void vax_decode_pc();
+ u32 vax_pcm_pull(bool is_bo = 0);
+
+ address_space_config m_microcode_config;
+ address_space_config m_sysram_config;
+ address_space_config m_ram_config;
+ address_space_config m_io_config;
+
+ memory_access<14, 2, -2, ENDIANNESS_BIG>::cache m_microcode;
+ memory_access<24, 0, 0, ENDIANNESS_BIG>::specific m_sysram;
+ memory_access<24, 0, 0, ENDIANNESS_LITTLE>::specific m_ram;
+ memory_access<6, 2, -2, ENDIANNESS_LITTLE>::specific m_io;
+
+ std::unique_ptr<util::disasm_interface> m_vax_dasm;
+
+ PAIR m_vma_tmp; // do we have int reg for this?
+ PAIR m_rv;
+ PAIR m_sch;
+ PAIR m_rsp;
+ PAIR m_amc; // Microcode PC
+ PAIR m_ppc; // previous program counter
+ bool m_fp;
+ bool m_jzdra_waiting;
+ u32 m_consts[0x10] = { 0x4, 0x2, 0x8, 0x1, 0x0, 0, 0, 0x66, 0, 0xc00000, 0xffffffff, 0x1f0000, 0x4000000, 0, 0, 0 };
+ PAIR m_reg[0x20];
+ int m_icount;
+ u32 m_op_size;
+
+ u8 m_pcm_queue_size;
+ u32 m_pcm_queue[6];
+ u8 m_mem_reg[6];
+};
+
+DECLARE_DEVICE_TYPE(KL1839VM1, kl1839vm1_device)
+
+#endif // MAME_CPU_MPK1839_KL1839VM1_H
diff --git a/src/devices/cpu/mpk1839/kl1839vm1dasm.cpp b/src/devices/cpu/mpk1839/kl1839vm1dasm.cpp
new file mode 100644
index 00000000000..ea80d7a0613
--- /dev/null
+++ b/src/devices/cpu/mpk1839/kl1839vm1dasm.cpp
@@ -0,0 +1,445 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+/***************************************************************************
+ KL1839VM1 disassembler
+***************************************************************************/
+
+#include "emu.h"
+#include "kl1839vm1dasm.h"
+
+static const std::string r_name(u8 id)
+{
+ std::ostringstream ss;
+ switch (id)
+ {
+ case 0x0f: ss << "PC"; break;
+ case 0x14: ss << "AK0"; break;
+ case 0x15: ss << "AK1"; break;
+ case 0x16: ss << "AK2"; break;
+ case 0x12: ss << "AK3"; break;
+ case 0x11: ss << "AK4"; break;
+ case 0x13: ss << "AK5"; break;
+ case 0x17: ss << "AK6"; break;
+ case 0x18: ss << "AK7"; break;
+ case 0x10: ss << "AK8"; break;
+ case 0x1f: ss << "BO"; break;
+ default: util::stream_format(ss, "R(%02X)", id); break;
+ }
+ return ss.str();
+}
+
+static const std::string k_name(u8 id)
+{
+ std::ostringstream ss;
+ switch (id)
+ {
+ case 0x05: ss << "PCM"; break;
+ case 0x06: ss << "RC"; break;
+ default: util::stream_format(ss, "K(%X)", id); break;
+ }
+ return ss.str();
+}
+
+static const void m_base(std::ostream &stream, u32 op, char m, u8 kop, std::string x, std::string y, std::string z)
+{
+ const u8 fd = BIT(op, 28, 2);
+ const u8 ps = BIT(op, 13, 2);
+ const bool pd = BIT(op, 4);
+
+ util::stream_format(stream, "M%c%-2s :", m, "");
+ std::ostringstream ss;
+ switch(fd)
+ {
+ case 0b00: ss << "DS/"; break;
+ case 0b01: ss << "SL/"; break;
+ case 0b11: ss << "BT/"; break;
+ default: break; // 0b10
+ }
+ switch(kop)
+ {
+ case 0b0000: ss << y << "=>" << z; break;
+ case 0b0010: ss << x << "+" << y << "=>" << z; break;
+ case 0b0011: ss << x << "=>" << z; break;
+ case 0b0100: ss << x << "-" << y << "=>" << z; break;
+ case 0b0110: ss << y << "-" << x << "=>" << z; break;
+ case 0b0111: ss << x << "=>!" << x; break;
+ case 0b1000: ss << x << "(+)" << y << "=>" << z; break;
+ case 0b1001: ss << "AL" << x; break;
+ case 0b1010: ss << x << "'" << y << "=>" << z; break;
+ case 0b1011: ss << "CL" << x; break;
+ case 0b1100: ss << x << "&!" << y << "=>" << z; break;
+ case 0b1101: ss << "AP" << x; break;
+ case 0b1110: ss << x << "&" << y << "=>" << z; break;
+ case 0b1111: ss << "CP" << x; break;
+ default: break; // 0b0001, 0b0101 - reserved
+ }
+ util::stream_format(stream, "%-24s;", ss.str());
+
+ stream << (pd ? "PD " : "");
+
+ switch(ps)
+ {
+ case 0b00: stream << "ZS "; break;
+ case 0b01: stream << "MS "; break;
+ case 0b10: stream << "NV "; break;
+ default: break; // 0b11 - no state store
+ }
+}
+
+static const void ma(std::ostream &stream, u32 op)
+{
+ const u8 kop1 = BIT(op, 24, 4);
+ const u8 am = BIT(op, 20, 4);
+ const u8 x = BIT(op, 15, 5);
+ const bool va = BIT(op, 12);
+ const u8 no = BIT(op, 10, 2);
+ const u8 fo = BIT(op, 8, 2);
+ const u8 kob = BIT(op, 5, 3);
+ const bool po = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ m_base(stream, op, 'A', kop1, px ? "RX" : r_name(x), py ? "RY" : k_name(am), px ? "RX" : r_name(x));
+
+ if (kob)
+ {
+ stream << (va ? "AZ " : "A4 ");
+
+ switch(no)
+ {
+ case 0b00: break;
+ case 0b01: stream << "PP "; break;
+ case 0b10: stream << "SR "; break;
+ case 0b11: stream << "SP "; break;
+ default: break;
+ }
+
+ switch(fo)
+ {
+ case 0b00: stream << "DSO "; break;
+ case 0b01: stream << "SLO "; break;
+ case 0b10: stream << "4SO "; break;
+ case 0b11: stream << "BO "; break;
+ default: break;
+ }
+
+ switch(kob)
+ {
+ case 0b000: break;
+ case 0b001: stream << "4D "; break;
+ case 0b010: stream << "ZD "; break;
+ case 0b011: stream << "4Z "; break;
+ case 0b100: stream << "WDAK "; break;
+ case 0b101: stream << "4K "; break;
+ case 0b110: break; // reserved
+ case 0b111: stream << "BRD "; break;
+ default: break;
+ }
+ }
+
+ if (po)
+ stream << "?:" << (po ? "RO" : "");
+}
+
+static const void mb(std::ostream &stream, u32 op)
+{
+ const u8 kop2 = BIT(op, 25, 3);
+ const u8 y = BIT(op, 20, 5);
+ const u8 x = BIT(op, 15, 5);
+ const u8 ps = BIT(op, 13, 2);
+ const bool va = BIT(op, 12);
+ const u8 no = BIT(op, 10, 2);
+ const u8 fo = BIT(op, 8, 2);
+ const u8 kob = BIT(op, 5, 3);
+ const bool po = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ m_base(stream, op, 'B', kop2 << 1, px ? "RX" : r_name(x), py ? "RY" : r_name(y), px ? "RX" : r_name(x));
+
+ if (kob)
+ {
+ stream << (va ? "AZ " : "A4 ");
+
+ switch(ps)
+ {
+ case 0b00: stream << "ZS "; break;
+ case 0b01: stream << "MS "; break;
+ case 0b10: stream << "NV "; break;
+ default: break; // 0b11 - no state store
+ }
+
+ switch(no)
+ {
+ case 0b00: break;
+ case 0b01: stream << "PP "; break;
+ case 0b10: stream << "SR "; break;
+ case 0b11: stream << "SP "; break;
+ default: break;
+ }
+
+ switch(fo)
+ {
+ case 0b00: stream << "DSO "; break;
+ case 0b01: stream << "SLO "; break;
+ case 0b10: stream << "4SO "; break;
+ case 0b11: stream << "BO "; break;
+ default: break;
+ }
+
+ switch(kob)
+ {
+ case 0b000: break;
+ case 0b001: stream << "4D "; break;
+ case 0b010: stream << "ZD "; break;
+ case 0b011: stream << "4Z "; break;
+ case 0b100: stream << "WDAK "; break;
+ case 0b101: stream << "4K "; break;
+ case 0b110: break; // reserved
+ case 0b111: stream << "BRD "; break;
+ default: break;
+ }
+ }
+
+ if (po)
+ stream << "?:" << (po ? "RO" : "");
+}
+
+static const void mc(std::ostream &stream, u32 op)
+{
+ const u8 kop2 = BIT(op, 25, 3);
+ const u8 y = BIT(op, 20, 5);
+ const u8 x = BIT(op, 15, 5);
+ const u8 z = BIT(op, 7, 5);
+ const bool pz = BIT(op, 3);
+ const bool py = BIT(op, 2);
+ const bool px = BIT(op, 1);
+
+ m_base(stream, op, 'C', kop2 << 1, px ? "RX" : r_name(x), kop2 ? (py ? "RY" : r_name(y)) : (px ? "RX" : r_name(x)), pz ? "RZ" : r_name(z));
+}
+
+static const u32 mk(std::ostream &stream, u32 op)
+{
+ const bool ret = BIT(op, 17);
+ if ((op & 0xfe000000) == 0xe0000000)
+ {
+ if (BIT(~op, 16)) // madr == 0
+ {
+ const u16 addr = BIT(op, 2, 14);
+ util::stream_format(stream, "BP%s : ;A=(%04X)", ret ? " " : "B" , addr);
+ }
+ else
+ {
+ u16 addr_hi = BIT(op, 8, 8) << 6;
+ util::stream_format(stream, "BPV%s : ;A=(%04X+%s)", ret ? " " : "D" , addr_hi, r_name(0x18));
+ }
+ }
+ else if ((op & 0xfe000000) == 0xe2000000)
+ {
+ stream << "??MK-3";
+ }
+
+ return ret ? 0 : kl1839vm1_disassembler::STEP_OVER;
+}
+
+static const u32 yp(std::ostream &stream, u32 op)
+{
+ const bool uv = BIT(op, 28);
+ const bool n = BIT(op, 27);
+ const bool z = BIT(op, 26);
+ const bool v = BIT(op, 25);
+ const bool c = BIT(op, 24);
+ const bool fp = BIT(op, 23);
+ const bool fpd = BIT(op, 22);
+ const bool prb = BIT(op, 21);
+ const bool rts = BIT(op, 20);
+ const bool rd = BIT(op, 19);
+ const bool ret = BIT(op, 17);
+ const bool js = BIT(op, 16);
+ const u16 addr = BIT(op, 2, 14);
+ if (fp)
+ {
+ util::stream_format(stream, "YPF%s : ", uv);
+ }
+ else if (fpd)
+ util::stream_format(stream, "YPFPD :", uv);
+ else
+ {
+ util::stream_format(stream, "YP%s%s :", uv , (js ? "JS" : " "));
+ stream << (n ? "N" : "");
+ stream << (z ? "Z" : "");
+ stream << (v ? "V" : "");
+ stream << (c ? "C" : "");
+ }
+
+ util::stream_format(stream, " ;A=%04X", addr);
+
+ if (prb | rts | rd)
+ stream << " ?:" << (prb ? "PRB " : "") << (rts ? "RTS " : "") << (rd ? "RD " : "");
+
+ return ret ? 0 : kl1839vm1_disassembler::STEP_OVER;
+}
+
+static const void zsch(std::ostream &stream, u32 op)
+{
+ stream << "ZS4 :";
+ if (BIT(~op, 16)) // mcc == 0
+ {
+ const u8 cnst = BIT(op, 2, 8);
+ util::stream_format(stream, "S4=K(%02X) ;", cnst);
+ }
+ else
+ {
+ //const u8 cnst = BIT(op, 8, 2);
+ const u8 obb = BIT(op, 2, 6);
+ util::stream_format(stream, "S4=K(%04X) ;", obb);
+ }
+}
+
+static const void psch(std::ostream &stream, u32 op)
+{
+ stream << "PS4 :";
+ if (BIT(~op, 16)) // madr == 0
+ {
+ const u8 addr = BIT(op, 2, 14);
+ util::stream_format(stream, " ;A=%04X", addr);
+ }
+ else
+ {
+ stream << "...";
+ }
+}
+
+static const void rts(std::ostream &stream, u32 op)
+{
+ stream << "RTS : ;";
+}
+
+static const void acc(std::ostream &stream, u32 op)
+{
+ stream << "ACC : ;";
+}
+
+static const void chka(std::ostream &stream, u32 op)
+{
+ stream << "4KA :";
+ if (BIT(~op, 16)) // madr == 0
+ {
+ const u16 addr = BIT(op, 2, 14);
+ util::stream_format(stream, " ;A=%04X", addr);
+ }
+ else
+ {
+ stream << "??";
+ }
+}
+
+static const void chlk(std::ostream &stream, u32 op)
+{
+ const bool sb = BIT(op, 1);
+ const u32 cnst = BIT(op, 2, 24);
+ util::stream_format(stream, "4LK :SB%X/K(%06X) ;", sb, cnst);
+}
+
+static const void srf(std::ostream &stream, u32 op)
+{
+ if (!BIT(op, 1, 25))
+ {
+ stream << "NOP : ;";
+ }
+ else if (BIT(op, 4))
+ {
+ stream << "OCT : ;";
+ }
+ else
+ {
+ stream << "SRF : ;";
+ stream << (BIT(op, 25) ? "WIMM " : "");
+ stream << (BIT(op, 21) ? "SFP1 " : "");
+ stream << (BIT(op, 20) ? "RFP1 " : "");
+ stream << (BIT(op, 5) ? "DEC " : "");
+ stream << (BIT(op, 2) ? "JDZRA " : "");
+ stream << (BIT(op, 1) ? "INC " : "");
+ }
+}
+
+static const void flag(std::ostream &stream, u32 op)
+{
+ stream << "FLAG : ;";
+ stream << (BIT(op, 23) ? "INTMS " : "");
+ stream << (BIT(op, 22) ? "RCPU " : "");
+ stream << (BIT(op, 21) ? "SIVV " : "");
+ stream << (BIT(op, 20) ? "CCFPU " : "");
+ stream << (BIT(op, 19) ? "PROB " : "");
+ stream << (BIT(op, 17) ? "SIU " : "");
+ stream << (BIT(op, 16) ? "TOU " : "");
+ stream << (BIT(op, 15) ? "COPWT " : "");
+}
+
+static const void rest(std::ostream &stream, u32 op)
+{
+ stream << "REST : ;";
+}
+
+offs_t kl1839vm1_disassembler::disassemble(std::ostream &stream, offs_t pc, const kl1839vm1_disassembler::data_buffer &opcodes, const kl1839vm1_disassembler::data_buffer &params)
+{
+ u32 op = opcodes.r32(pc);
+ u32 step = 0;
+ if ((op & 0xc0000000) == 0x00000000) // MA
+ {
+ if ((op & 0xff000000) == 0x01000000)
+ flag(stream, op);
+ else if ((op & 0xff000000) == 0x05000000)
+ rest(stream, op);
+ else
+ ma(stream, op);
+ }
+ else if ((op & 0xc0000000) == 0x40000000) // MB
+ {
+ mb(stream, op);
+ }
+ else if ((op & 0xc0000000) == 0x80000000) // MC
+ {
+ mc(stream, op);
+ }
+ else
+ {
+ if ((op & 0xfc000000) == 0xe0000000)
+ {
+ step |= mk(stream, op);
+ }
+ else if ((op & 0xe0000000) == 0xc0000000)
+ {
+ step |= yp(stream, op) | STEP_COND;
+ }
+ else if ((op & 0xfc000000) == 0xec000000)
+ zsch(stream, op);
+ else if ((op & 0xfc000000) == 0xe4000000)
+ {
+ psch(stream, op);
+ step |= STEP_COND;
+ }
+ else if ((op & 0xfc000000) == 0xf0000000)
+ {
+ rts(stream, op);
+ step |= STEP_OUT;
+ }
+ else if ((op & 0xfc000000) == 0xe8000000)
+ acc(stream, op);
+ else if ((op & 0xfc000000) == 0xf4000000)
+ chka(stream, op);
+ else if ((op & 0xfc000000) == 0xf8000000)
+ chlk(stream, op);
+ else if ((op & 0xfc000000) == 0xfc000000)
+ srf(stream, op);
+ else
+ stream << "<invalid>";
+ }
+
+ if (op & 1)
+ {
+ stream << "S";
+ }
+
+ return 1 | SUPPORTED | step;
+}
diff --git a/src/devices/cpu/mpk1839/kl1839vm1dasm.h b/src/devices/cpu/mpk1839/kl1839vm1dasm.h
new file mode 100644
index 00000000000..3d13d90a1ae
--- /dev/null
+++ b/src/devices/cpu/mpk1839/kl1839vm1dasm.h
@@ -0,0 +1,25 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+
+#ifndef MAME_CPU_MPK1839_KL1839VM1DASM_H
+#define MAME_CPU_MPK1839_KL1839VM1DASM_H
+
+#pragma once
+
+class kl1839vm1_disassembler : public util::disasm_interface
+{
+public:
+ // construction/destruction
+ kl1839vm1_disassembler() = default;
+ virtual ~kl1839vm1_disassembler() = default;
+
+protected:
+ // disassembler overrides
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+
+};
+
+#endif // MAME_CPU_MPK1839_KL1839VM1DASM_H
diff --git a/src/devices/cpu/nanoprocessor/nanoprocessor.h b/src/devices/cpu/nanoprocessor/nanoprocessor.h
index 2aa8cf3a4ab..979c1d5d843 100644
--- a/src/devices/cpu/nanoprocessor/nanoprocessor.h
+++ b/src/devices/cpu/nanoprocessor/nanoprocessor.h
@@ -90,7 +90,6 @@ public:
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
// 3 cycles is for int. acknowledge + 1 instruction
virtual uint32_t execute_max_cycles() const noexcept override { return 3; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
// device_memory_interface overrides
@@ -134,8 +133,8 @@ private:
memory_access< 4, 0, 0, ENDIANNESS_BIG>::specific m_io;
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_run() override;
virtual void execute_set_input(int linenum, int state) override;
diff --git a/src/devices/cpu/nec/nec.cpp b/src/devices/cpu/nec/nec.cpp
index 49138a745c6..1f9e28799f8 100644
--- a/src/devices/cpu/nec/nec.cpp
+++ b/src/devices/cpu/nec/nec.cpp
@@ -108,6 +108,11 @@
#include "nec.h"
#include "necdasm.h"
+#define LOG_BUSLOCK (1 << 1)
+//#define VERBOSE (...)
+
+#include "logmacro.h"
+
typedef uint8_t BOOLEAN;
typedef uint8_t BYTE;
typedef uint16_t WORD;
@@ -626,8 +631,8 @@ void nec_common_device::execute_run()
if (m_halted)
{
+ debugger_wait_hook();
m_icount = 0;
- debugger_instruction_hook((Sreg(PS)<<4) + m_ip);
return;
}
diff --git a/src/devices/cpu/nec/nec.h b/src/devices/cpu/nec/nec.h
index af20d2f3a1a..f9c361f3840 100644
--- a/src/devices/cpu/nec/nec.h
+++ b/src/devices/cpu/nec/nec.h
@@ -31,13 +31,12 @@ protected:
nec_common_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool is_16bit, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type, address_map_constructor internal_port_map = address_map_constructor());
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 80; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
@@ -691,7 +690,7 @@ protected:
// device_memory_interface overrides
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- void v33_internal_port_map(address_map &map);
+ void v33_internal_port_map(address_map &map) ATTR_COLD;
uint16_t xam_r();
};
diff --git a/src/devices/cpu/nec/necinstr.hxx b/src/devices/cpu/nec/necinstr.hxx
index 11abacbedb0..ae1c1d50b98 100644
--- a/src/devices/cpu/nec/necinstr.hxx
+++ b/src/devices/cpu/nec/necinstr.hxx
@@ -643,7 +643,7 @@ OP( 0xed, i_inaxdx ) { Wreg(AW) = read_port_word(Wreg(DW)); CLKW(12,12,7,12,8,
OP( 0xee, i_outdxal ) { write_port_byte(Wreg(DW), Breg(AL)); CLKS(8,8,3); }
OP( 0xef, i_outdxax ) { write_port_word(Wreg(DW), Wreg(AW)); CLKW(12,12,5,12,8,3,Wreg(DW)); }
-OP( 0xf0, i_lock ) { logerror("%06x: Warning - BUSLOCK\n",PC()); m_no_interrupt=1; CLK(2); }
+OP( 0xf0, i_lock ) { LOGMASKED(LOG_BUSLOCK, "%06x: Warning - BUSLOCK\n",PC()); m_no_interrupt=1; CLK(2); }
OP( 0xf2, i_repne ) { uint32_t next = fetchop(); uint16_t c = Wreg(CW);
switch(next) { /* Segments */
case 0x26: m_seg_prefix=true; m_prefix_base=Sreg(DS1)<<4; next = fetchop(); CLK(2); break;
diff --git a/src/devices/cpu/nec/v25.cpp b/src/devices/cpu/nec/v25.cpp
index 6d96206f0ed..ee4f1886170 100644
--- a/src/devices/cpu/nec/v25.cpp
+++ b/src/devices/cpu/nec/v25.cpp
@@ -38,6 +38,11 @@
#include "v25.h"
#include "necdasm.h"
+#define LOG_BUSLOCK (1 << 1)
+//#define VERBOSE (...)
+
+#include "logmacro.h"
+
typedef uint8_t BOOLEAN;
typedef uint8_t BYTE;
typedef uint16_t WORD;
@@ -64,6 +69,8 @@ v25_common_device::v25_common_device(const machine_config &mconfig, device_type
, m_p0_out(*this)
, m_p1_out(*this)
, m_p2_out(*this)
+ , m_dma_read(*this, 0xffff)
+ , m_dma_write(*this)
, m_prefetch_size(prefetch_size)
, m_prefetch_cycles(prefetch_cycles)
, m_chip_type(chip_type)
@@ -210,9 +217,20 @@ void v25_common_device::device_reset()
m_intm = 0;
m_halted = 0;
- m_TM0 = m_MD0 = m_TM1 = m_MD1 = 0;
m_TMC0 = m_TMC1 = 0;
+ for (int i = 0; i < 2; i++)
+ {
+ m_scm[i] = 0;
+ m_scc[i] = 0;
+ m_brg[i] = 0;
+ m_sce[i] = 0;
+ }
+
+ m_dmam[0] = m_dmam[1] = 0;
+ m_dma_channel = -1;
+ m_last_dma_channel = 0;
+
m_RAMEN = 1;
m_TB = 20;
m_PCK = 8;
@@ -470,6 +488,111 @@ void v25_common_device::external_int()
}
}
+void v25_common_device::dma_process()
+{
+ uint16_t sar = m_internal_ram[m_dma_channel * 4];
+ uint16_t dar = m_internal_ram[m_dma_channel * 4 + 1];
+ uint16_t sarh_darh = m_internal_ram[m_dma_channel * 4 + 2];
+ uint8_t dmamode = BIT(m_dmam[m_dma_channel], 5, 3);
+ bool w = BIT(m_dmam[m_dma_channel], 4);
+
+ uint32_t saddr = ((uint32_t(sarh_darh) & 0xff00) << 4) + sar;
+ uint32_t daddr = ((uint32_t(sarh_darh) & 0x00ff) << 12) + dar;
+
+ switch (dmamode & 3)
+ {
+ case 0:
+ // Memory to memory transfer
+ if (w)
+ {
+ uint16_t data = v25_read_word(saddr);
+ v25_write_word(daddr, data);
+ }
+ else
+ {
+ uint8_t data = v25_read_byte(saddr);
+ v25_write_byte(daddr, data);
+ }
+ m_icount -= (w && m_program->addr_width() == 8) ? 8 : 4;
+ break;
+
+ case 1:
+ // I/O to memory transfer
+ if (w && m_program->addr_width() == 16)
+ {
+ uint16_t data = m_dma_read[m_dma_channel](daddr);
+ v25_write_word(daddr, data);
+ }
+ else
+ {
+ uint8_t data = m_dma_read[m_dma_channel](daddr);
+ v25_write_byte(daddr, data);
+ if (w)
+ {
+ logerror("Warning: V25 16-bit I/O to memory transfer\n");
+ data = m_dma_read[m_dma_channel](daddr + 1);
+ v25_write_byte(daddr + 1, data);
+ m_icount -= 2;
+ }
+ }
+ m_icount -= 2;
+ break;
+
+ case 2:
+ // Memory to I/O transfer
+ if (w && m_program->addr_width() == 16)
+ {
+ uint16_t data = v25_read_word(saddr);
+ m_dma_write[m_dma_channel](saddr, data);
+ }
+ else
+ {
+ uint8_t data = v25_read_byte(saddr);
+ m_dma_write[m_dma_channel](saddr, data);
+ if (w)
+ {
+ logerror("Warning: V25 16-bit memory to I/O transfer\n");
+ data = v25_read_byte(saddr + 1);
+ m_dma_write[m_dma_channel](saddr + 1, data);
+ m_icount -= 2;
+ }
+ }
+ m_icount -= 2;
+ break;
+
+ default:
+ logerror("Reserved DMA transfer mode\n");
+ m_icount--;
+ break;
+ }
+
+ // Update source and destination based on address control
+ uint8_t dmac = m_dmac[m_dma_channel];
+ if (BIT(dmac, 0, 2) == 1)
+ m_internal_ram[m_dma_channel * 4] = sar + (w ? 2 : 1);
+ else if (BIT(dmac, 0, 2) == 2)
+ m_internal_ram[m_dma_channel * 4] = sar - (w ? 2 : 1);
+ if (BIT(dmac, 4, 2) == 1)
+ m_internal_ram[m_dma_channel * 4 + 1] = dar + (w ? 2 : 1);
+ else if (BIT(dmac, 4, 2) == 2)
+ m_internal_ram[m_dma_channel * 4 + 1] = dar - (w ? 2 : 1);
+
+ // Update TC
+ uint16_t tc = --m_internal_ram[m_dma_channel * 4 + 3];
+ if (tc == 0)
+ {
+ m_dmam[m_dma_channel] &= 0xf0; // disable channel
+ m_pending_irq |= m_dma_channel ? INTD1 : INTD0; // request interrupt
+ }
+
+ if (dmamode == 0 || dmamode > 4 || tc == 0)
+ {
+ // Single step/single transfer modes (or end of burst)
+ m_last_dma_channel = m_dma_channel;
+ m_dma_channel = -1;
+ }
+}
+
/****************************************************************************/
/* OPCODES */
/****************************************************************************/
@@ -557,6 +680,9 @@ void v25_common_device::device_start()
m_EO = 0;
m_E16 = 0;
+ m_TM0 = m_MD0 = m_TM1 = m_MD1 = 0;
+ m_dmac[0] = m_dmac[1] = 0;
+
for (i = 0; i < 4; i++)
m_timers[i] = timer_alloc(FUNC(v25_common_device::v25_timer_callback), this);
@@ -613,6 +739,14 @@ void v25_common_device::device_start()
save_item(NAME(m_MD1));
save_item(NAME(m_TMC0));
save_item(NAME(m_TMC1));
+ save_item(NAME(m_scm));
+ save_item(NAME(m_scc));
+ save_item(NAME(m_brg));
+ save_item(NAME(m_sce));
+ save_item(NAME(m_dmac));
+ save_item(NAME(m_dmam));
+ save_item(NAME(m_dma_channel));
+ save_item(NAME(m_last_dma_channel));
save_item(NAME(m_RAMEN));
save_item(NAME(m_TB));
save_item(NAME(m_PCK));
@@ -767,12 +901,18 @@ void v25_common_device::execute_run()
if (m_halted)
{
+ debugger_wait_hook();
m_icount = 0;
- debugger_instruction_hook((Sreg(PS)<<4) + m_ip);
return;
}
while(m_icount>0) {
+ if (m_dma_channel != -1)
+ {
+ dma_process();
+ continue;
+ }
+
/* Dispatch IRQ */
m_prev_ip = m_ip;
if (m_no_interrupt==0 && (m_pending_irq & m_unmasked_irq))
@@ -791,5 +931,13 @@ void v25_common_device::execute_run()
prev_ICount = m_icount;
(this->*s_nec_instruction[fetchop()])();
do_prefetch(prev_ICount);
+
+ if ((m_dmam[0] & 0x0c) == 0x0c || (m_dmam[1] & 0x0c) == 0x0c)
+ {
+ if ((m_dmam[1 - m_last_dma_channel] & 0x0c) == 0x0c)
+ m_dma_channel = 1 - m_last_dma_channel;
+ else
+ m_dma_channel = m_last_dma_channel;
+ }
}
}
diff --git a/src/devices/cpu/nec/v25.h b/src/devices/cpu/nec/v25.h
index 726f4557e59..73b09844a19 100644
--- a/src/devices/cpu/nec/v25.h
+++ b/src/devices/cpu/nec/v25.h
@@ -39,6 +39,12 @@ public:
auto p1_out_cb() { return m_p1_out.bind(); }
auto p2_out_cb() { return m_p2_out.bind(); }
+ auto dma0_read_cb() { return m_dma_read[0].bind(); }
+ auto dma1_read_cb() { return m_dma_read[1].bind(); }
+
+ auto dma0_write_cb() { return m_dma_write[0].bind(); }
+ auto dma1_write_cb() { return m_dma_write[1].bind(); }
+
TIMER_CALLBACK_MEMBER(v25_timer_callback);
protected:
@@ -46,8 +52,8 @@ protected:
v25_common_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool is_16bit, uint8_t prefetch_size, uint8_t prefetch_cycles, uint32_t chip_type);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override { notify_clock_changed(); }
// device_execute_interface overrides
@@ -55,7 +61,6 @@ protected:
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles * m_PCK; }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 80; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI || (inputnum >= NEC_INPUT_LINE_INTP0 && inputnum <= NEC_INPUT_LINE_INTP2); }
virtual void execute_run() override;
@@ -114,13 +119,25 @@ private:
uint8_t m_no_interrupt;
uint8_t m_halted;
- /* timer related */
+ // timer related
uint16_t m_TM0, m_MD0, m_TM1, m_MD1;
uint8_t m_TMC0, m_TMC1;
emu_timer *m_timers[4];
- /* system control */
- uint8_t m_RAMEN, m_TB, m_PCK; /* PRC register */
+ // serial interface related
+ uint8_t m_scm[2];
+ uint8_t m_scc[2];
+ uint8_t m_brg[2];
+ uint8_t m_sce[2];
+
+ // DMA related
+ uint8_t m_dmac[2];
+ uint8_t m_dmam[2];
+ int8_t m_dma_channel;
+ int8_t m_last_dma_channel;
+
+ // system control
+ uint8_t m_RAMEN, m_TB, m_PCK; // PRC register
uint8_t m_RFM;
uint16_t m_WTC;
uint32_t m_IDB;
@@ -141,6 +158,9 @@ private:
devcb_write8 m_p1_out;
devcb_write8 m_p2_out;
+ devcb_read16::array<2> m_dma_read;
+ devcb_write16::array<2> m_dma_write;
+
uint8_t m_prefetch_size;
uint8_t m_prefetch_cycles;
int8_t m_prefetch_count;
@@ -172,8 +192,9 @@ private:
void nec_bankswitch(unsigned bank_num);
void nec_trap();
void external_int();
+ void dma_process();
- void ida_sfr_map(address_map &map);
+ void ida_sfr_map(address_map &map) ATTR_COLD;
uint8_t read_irqcontrol(int /*INTSOURCES*/ source, uint8_t priority);
void write_irqcontrol(int /*INTSOURCES*/ source, uint8_t d);
uint8_t p0_r();
@@ -204,6 +225,13 @@ private:
void srms0_w(uint8_t d);
uint8_t stms0_r();
void stms0_w(uint8_t d);
+ uint8_t scm0_r();
+ void scm0_w(uint8_t d);
+ uint8_t scc0_r();
+ void scc0_w(uint8_t d);
+ uint8_t brg0_r();
+ void brg0_w(uint8_t d);
+ uint8_t sce0_r();
uint8_t seic0_r();
void seic0_w(uint8_t d);
uint8_t sric0_r();
@@ -214,6 +242,13 @@ private:
void srms1_w(uint8_t d);
uint8_t stms1_r();
void stms1_w(uint8_t d);
+ uint8_t scm1_r();
+ void scm1_w(uint8_t d);
+ uint8_t scc1_r();
+ void scc1_w(uint8_t d);
+ uint8_t brg1_r();
+ void brg1_w(uint8_t d);
+ uint8_t sce1_r();
uint8_t seic1_r();
void seic1_w(uint8_t d);
uint8_t sric1_r();
@@ -238,6 +273,18 @@ private:
void tmic1_w(uint8_t d);
uint8_t tmic2_r();
void tmic2_w(uint8_t d);
+ uint8_t dmac0_r();
+ void dmac0_w(uint8_t d);
+ uint8_t dmam0_r();
+ void dmam0_w(uint8_t d);
+ uint8_t dmac1_r();
+ void dmac1_w(uint8_t d);
+ uint8_t dmam1_r();
+ void dmam1_w(uint8_t d);
+ uint8_t dic0_r();
+ void dic0_w(uint8_t d);
+ uint8_t dic1_r();
+ void dic1_w(uint8_t d);
uint8_t rfm_r();
void rfm_w(uint8_t d);
uint16_t wtc_r();
diff --git a/src/devices/cpu/nec/v25sfr.cpp b/src/devices/cpu/nec/v25sfr.cpp
index 44ad9300a4d..44d01e77999 100644
--- a/src/devices/cpu/nec/v25sfr.cpp
+++ b/src/devices/cpu/nec/v25sfr.cpp
@@ -31,11 +31,19 @@ void v25_common_device::ida_sfr_map(address_map &map)
map(0x14e, 0x14e).rw(FUNC(v25_common_device::exic2_r), FUNC(v25_common_device::exic2_w));
map(0x165, 0x165).rw(FUNC(v25_common_device::srms0_r), FUNC(v25_common_device::srms0_w));
map(0x166, 0x166).rw(FUNC(v25_common_device::stms0_r), FUNC(v25_common_device::stms0_w));
+ map(0x168, 0x168).rw(FUNC(v25_common_device::scm0_r), FUNC(v25_common_device::scm0_w));
+ map(0x169, 0x169).rw(FUNC(v25_common_device::scc0_r), FUNC(v25_common_device::scc0_w));
+ map(0x16a, 0x16a).rw(FUNC(v25_common_device::brg0_r), FUNC(v25_common_device::brg0_w));
+ map(0x16b, 0x16b).r(FUNC(v25_common_device::sce0_r));
map(0x16c, 0x16c).rw(FUNC(v25_common_device::seic0_r), FUNC(v25_common_device::seic0_w));
map(0x16d, 0x16d).rw(FUNC(v25_common_device::sric0_r), FUNC(v25_common_device::sric0_w));
map(0x16e, 0x16e).rw(FUNC(v25_common_device::stic0_r), FUNC(v25_common_device::stic0_w));
map(0x175, 0x175).rw(FUNC(v25_common_device::srms1_r), FUNC(v25_common_device::srms1_w));
map(0x176, 0x176).rw(FUNC(v25_common_device::stms1_r), FUNC(v25_common_device::stms1_w));
+ map(0x178, 0x178).rw(FUNC(v25_common_device::scm1_r), FUNC(v25_common_device::scm1_w));
+ map(0x179, 0x179).rw(FUNC(v25_common_device::scc1_r), FUNC(v25_common_device::scc1_w));
+ map(0x17a, 0x17a).rw(FUNC(v25_common_device::brg1_r), FUNC(v25_common_device::brg1_w));
+ map(0x17b, 0x17b).r(FUNC(v25_common_device::sce1_r));
map(0x17c, 0x17c).rw(FUNC(v25_common_device::seic1_r), FUNC(v25_common_device::seic1_w));
map(0x17d, 0x17d).rw(FUNC(v25_common_device::sric1_r), FUNC(v25_common_device::sric1_w));
map(0x17e, 0x17e).rw(FUNC(v25_common_device::stic1_r), FUNC(v25_common_device::stic1_w));
@@ -49,6 +57,12 @@ void v25_common_device::ida_sfr_map(address_map &map)
map(0x19c, 0x19c).rw(FUNC(v25_common_device::tmic0_r), FUNC(v25_common_device::tmic0_w));
map(0x19d, 0x19d).rw(FUNC(v25_common_device::tmic1_r), FUNC(v25_common_device::tmic1_w));
map(0x19e, 0x19e).rw(FUNC(v25_common_device::tmic2_r), FUNC(v25_common_device::tmic2_w));
+ map(0x1a0, 0x1a0).rw(FUNC(v25_common_device::dmac0_r), FUNC(v25_common_device::dmac0_w));
+ map(0x1a1, 0x1a1).rw(FUNC(v25_common_device::dmam0_r), FUNC(v25_common_device::dmam0_w));
+ map(0x1a2, 0x1a2).rw(FUNC(v25_common_device::dmac1_r), FUNC(v25_common_device::dmac1_w));
+ map(0x1a3, 0x1a3).rw(FUNC(v25_common_device::dmam1_r), FUNC(v25_common_device::dmam1_w));
+ map(0x1ac, 0x1ac).rw(FUNC(v25_common_device::dic0_r), FUNC(v25_common_device::dic0_w));
+ map(0x1ad, 0x1ad).rw(FUNC(v25_common_device::dic1_r), FUNC(v25_common_device::dic1_w));
map(0x1e1, 0x1e1).rw(FUNC(v25_common_device::rfm_r), FUNC(v25_common_device::rfm_w));
map(0x1e8, 0x1e9).rw(FUNC(v25_common_device::wtc_r), FUNC(v25_common_device::wtc_w));
map(0x1ea, 0x1ea).rw(FUNC(v25_common_device::flag_r), FUNC(v25_common_device::flag_w));
@@ -246,6 +260,46 @@ void v25_common_device::stms0_w(uint8_t d)
m_stms[0] = d & 0xf7;
}
+uint8_t v25_common_device::scm0_r()
+{
+ return m_scm[0];
+}
+
+void v25_common_device::scm0_w(uint8_t d)
+{
+ logerror("%06x: SCM0 set to %02x\n", PC(), d);
+ m_scm[0] = d;
+}
+
+uint8_t v25_common_device::scc0_r()
+{
+ return m_scc[0];
+}
+
+void v25_common_device::scc0_w(uint8_t d)
+{
+ logerror("%06x: SCC0 prescaler set to %d\n", PC(), 2 << (d & 0x0f));
+ m_scc[0] = d & 0x0f;
+}
+
+uint8_t v25_common_device::brg0_r()
+{
+ return m_brg[0];
+}
+
+void v25_common_device::brg0_w(uint8_t d)
+{
+ logerror("%06x: BRG0 divider set to %u\n", PC(), d);
+ m_brg[0] = d;
+}
+
+uint8_t v25_common_device::sce0_r()
+{
+ if (!machine().side_effects_disabled())
+ logerror("%06x: Warning: read back SCE0\n",PC());
+ return m_sce[0];
+}
+
uint8_t v25_common_device::seic0_r()
{
return read_irqcontrol(INTSER0, m_priority_ints0);
@@ -302,6 +356,46 @@ void v25_common_device::stms1_w(uint8_t d)
m_stms[1] = d & 0xf7;
}
+uint8_t v25_common_device::scm1_r()
+{
+ return m_scm[1];
+}
+
+void v25_common_device::scm1_w(uint8_t d)
+{
+ logerror("%06x: SCM1 set to %02x\n", PC(), d);
+ m_scm[1] = d;
+}
+
+uint8_t v25_common_device::scc1_r()
+{
+ return m_scc[1];
+}
+
+void v25_common_device::scc1_w(uint8_t d)
+{
+ logerror("%06x: SCC1 prescaler set to %d\n", PC(), 2 << (d & 0x0f));
+ m_scc[1] = d & 0x0f;
+}
+
+uint8_t v25_common_device::brg1_r()
+{
+ return m_brg[1];
+}
+
+void v25_common_device::brg1_w(uint8_t d)
+{
+ logerror("%06x: BRG1 divider set to %u\n", PC(), d);
+ m_brg[1] = d;
+}
+
+uint8_t v25_common_device::sce1_r()
+{
+ if (!machine().side_effects_disabled())
+ logerror("%06x: Warning: read back SCE1\n",PC());
+ return m_sce[1];
+}
+
uint8_t v25_common_device::seic1_r()
{
return read_irqcontrol(INTSER1, m_priority_ints1);
@@ -381,7 +475,13 @@ uint16_t v25_common_device::md1_r()
void v25_common_device::md1_w(uint16_t d)
{
- m_MD1 = d;
+ if (m_MD1 == 0 && d != 0)
+ {
+ m_MD1 = d;
+ tmc1_w(m_TMC1); // HACK: start timer if necessary
+ }
+ else
+ m_MD1 = d;
}
void v25_common_device::tmc0_w(uint8_t d)
@@ -389,7 +489,7 @@ void v25_common_device::tmc0_w(uint8_t d)
m_TMC0 = d;
if (BIT(d, 0)) // oneshot mode
{
- if (BIT(d, 7))
+ if (BIT(d, 7) && m_TM0 != 0)
{
unsigned tmp = m_PCK * m_TM0 * (BIT(d, 6) ? 128 : 12);
attotime time = clocks_to_attotime(tmp);
@@ -398,7 +498,7 @@ void v25_common_device::tmc0_w(uint8_t d)
else
m_timers[0]->adjust(attotime::never);
- if (BIT(d, 5))
+ if (BIT(d, 5) && m_MD0 != 0)
{
unsigned tmp = m_PCK * m_MD0 * (BIT(d, 4) ? 128 : 12);
attotime time = clocks_to_attotime(tmp);
@@ -409,7 +509,7 @@ void v25_common_device::tmc0_w(uint8_t d)
}
else // interval mode
{
- if (BIT(d, 7))
+ if (BIT(d, 7) && m_MD0 != 0)
{
unsigned tmp = m_PCK * m_MD0 * (BIT(d, 6) ? 128 : 6);
attotime time = clocks_to_attotime(tmp);
@@ -428,11 +528,11 @@ void v25_common_device::tmc0_w(uint8_t d)
void v25_common_device::tmc1_w(uint8_t d)
{
m_TMC1 = d & 0xC0;
- if (BIT(d, 7))
+ if (BIT(d, 7) && m_MD1 != 0)
{
unsigned tmp = m_PCK * m_MD1 * (BIT(d, 6) ? 128 : 6);
attotime time = clocks_to_attotime(tmp);
- m_timers[2]->adjust(time, INTTU2, time);
+ m_timers[2]->adjust(time, INTTU1 | INTTU2, time);
m_TM1 = m_MD1;
}
else
@@ -481,6 +581,115 @@ void v25_common_device::tmic2_w(uint8_t d)
write_irqcontrol(INTTU2, d);
}
+uint8_t v25_common_device::dmac0_r()
+{
+ return m_dmac[0];
+}
+
+void v25_common_device::dmac0_w(uint8_t d)
+{
+ logerror("%06x: DMAC0 set to %02x\n", PC(), d);
+ logerror(" SAR0 %s after each transfer\n", (d & 0x03) == 0x01 ? "incremented" : (d & 0x03) == 0x02 ? "decremented" : "unmodified");
+ logerror(" DAR0 %s after each transfer\n", (d & 0x30) == 0x10 ? "incremented" : (d & 0x30) == 0x20 ? "decremented" : "unmodified");
+ m_dmac[0] = d & 0x33;
+}
+
+uint8_t v25_common_device::dmam0_r()
+{
+ return m_dmam[0];
+}
+
+void v25_common_device::dmam0_w(uint8_t d)
+{
+ logerror("%06x: DMAM0 set to %02x\n", PC(), d);
+ if ((d & 0x60) == 0)
+ logerror(" %s mode, memory to memory, %s\n", BIT(d, 7) ? "Single step" : "Burst", BIT(d, 4) ? "words" : "bytes");
+ else if ((d & 0x60) != 0x60)
+ logerror(" %s mode, %s to %s, %s\n", BIT(d, 7) ? "Single transfer" : "Demand release",
+ BIT(d, 5) ? "I/O" : "memory",
+ BIT(d, 6) ? "I/O" : "memory",
+ BIT(d, 4) ? "words" : "bytes");
+ if (BIT(d, 2))
+ {
+ uint16_t sar = m_internal_ram[0];
+ uint16_t dar = m_internal_ram[1];
+ uint16_t sarh_darh = m_internal_ram[2];
+ uint16_t tc = m_internal_ram[3];
+ logerror(" DMA enabled%s (%04x:%04x -> %04x:%04x, %u %s)\n", BIT(d, 3) ? " and triggered" : "",
+ sarh_darh & 0xff00, sar,
+ (sarh_darh & 0x00ff) << 8, dar,
+ tc, BIT(d, 4) ? "words" : "bytes");
+ }
+ else
+ logerror(" DMA not enabled\n");
+ m_dmam[0] = d & 0xfc;
+}
+
+uint8_t v25_common_device::dmac1_r()
+{
+ return m_dmac[1];
+}
+
+void v25_common_device::dmac1_w(uint8_t d)
+{
+ logerror("%06x: DMAC1 set to %02x\n", PC(), d);
+ logerror(" SAR1 %s after each transfer\n", (d & 0x03) == 0x01 ? "incremented" : (d & 0x03) == 0x02 ? "decremented" : "unmodified");
+ logerror(" DAR1 %s after each transfer\n", (d & 0x30) == 0x10 ? "incremented" : (d & 0x30) == 0x20 ? "decremented" : "unmodified");
+ m_dmac[1] = d & 0x33;
+}
+
+uint8_t v25_common_device::dmam1_r()
+{
+ return m_dmam[1];
+}
+
+void v25_common_device::dmam1_w(uint8_t d)
+{
+ logerror("%06x: DMAM1 set to %02x\n", PC(), d);
+ if ((d & 0x60) == 0)
+ logerror(" %s mode, memory to memory, %s\n", BIT(d, 7) ? "Single step" : "Burst", BIT(d, 4) ? "words" : "bytes");
+ else if ((d & 0x60) != 0x60)
+ logerror(" %s mode, %s to %s, %s\n", BIT(d, 7) ? "Single transfer" : "Demand release",
+ BIT(d, 5) ? "I/O" : "memory",
+ BIT(d, 6) ? "I/O" : "memory",
+ BIT(d, 4) ? "words" : "bytes");
+ if (BIT(d, 2))
+ {
+ uint16_t sar = m_internal_ram[4];
+ uint16_t dar = m_internal_ram[5];
+ uint16_t sarh_darh = m_internal_ram[6];
+ uint16_t tc = m_internal_ram[7];
+ logerror(" DMA enabled%s (%04x:%04x -> %04x:%04x, %u %s)\n", BIT(d, 3) ? " and triggered" : "",
+ sarh_darh & 0xff00, sar,
+ (sarh_darh & 0x00ff) << 8, dar,
+ tc, BIT(d, 4) ? "words" : "bytes");
+ }
+ else
+ logerror(" DMA not enabled\n");
+ m_dmam[1] = d & 0xfc;
+}
+
+uint8_t v25_common_device::dic0_r()
+{
+ return read_irqcontrol(INTD0, m_priority_intd);
+}
+
+void v25_common_device::dic0_w(uint8_t d)
+{
+ write_irqcontrol(INTD0, d);
+ m_priority_intd = d & 0x7;
+}
+
+uint8_t v25_common_device::dic1_r()
+{
+ return read_irqcontrol(INTD1, 7);
+}
+
+void v25_common_device::dic1_w(uint8_t d)
+{
+ write_irqcontrol(INTD1, d);
+}
+
uint8_t v25_common_device::rfm_r()
{
return m_RFM;
diff --git a/src/devices/cpu/nec/v5x.cpp b/src/devices/cpu/nec/v5x.cpp
index 31e7799c556..50b2bd7da79 100644
--- a/src/devices/cpu/nec/v5x.cpp
+++ b/src/devices/cpu/nec/v5x.cpp
@@ -320,7 +320,7 @@ void v50_base_device::OPCN_w(u8 data)
m_OPCN = data & 0x0f;
m_tout1_callback((data & 0x03) == 0x03 ? m_tout1 : 1);
- m_icu->ir1_w(BIT(data, 2) ? 0 : m_intp1);
+ m_icu->ir1_w(BIT(data, 2) ? m_sint : m_intp1);
m_icu->ir2_w(BIT(data, 3) ? m_tout1 : m_intp2);
}
@@ -333,6 +333,13 @@ void v50_base_device::tout1_w(int state)
m_icu->ir2_w(state);
}
+void v50_base_device::sint_w(int state)
+{
+ m_sint = state;
+ if (BIT(m_OPCN, 2))
+ m_icu->ir1_w(state);
+}
+
void v50_base_device::device_reset()
{
nec_common_device::device_reset();
@@ -348,8 +355,11 @@ void v50_base_device::device_start()
set_irq_acknowledge_callback(*m_icu, FUNC(v5x_icu_device::inta_cb));
+ m_scu->write_cts(0);
+
save_item(NAME(m_OPCN));
save_item(NAME(m_tout1));
+ save_item(NAME(m_sint));
save_item(NAME(m_intp1));
save_item(NAME(m_intp2));
}
@@ -502,6 +512,8 @@ void v50_base_device::device_add_mconfig(machine_config &config)
m_tcu->out_handler<1>().set(m_scu, FUNC(v5x_scu_device::write_rxc));
m_tcu->out_handler<1>().append(m_scu, FUNC(v5x_scu_device::write_txc));
m_tcu->out_handler<1>().append(FUNC(v50_base_device::tout1_w));
+
+ m_scu->sint_handler().set(FUNC(v50_base_device::sint_w));
}
device_memory_interface::space_config_vector v50_base_device::memory_space_config() const
diff --git a/src/devices/cpu/nec/v5x.h b/src/devices/cpu/nec/v5x.h
index d30bb5fdb4a..bc3d0fe4f05 100644
--- a/src/devices/cpu/nec/v5x.h
+++ b/src/devices/cpu/nec/v5x.h
@@ -36,12 +36,7 @@ public:
// SCU
auto txd_handler_cb() { return m_scu.lookup()->txd_handler(); }
- auto dtr_handler_cb() { return m_scu.lookup()->dtr_handler(); }
- auto rts_handler_cb() { return m_scu.lookup()->rts_handler(); }
- auto rxrdy_handler_cb() { return m_scu.lookup()->rxrdy_handler(); }
- auto txrdy_handler_cb() { return m_scu.lookup()->txrdy_handler(); }
- auto txempty_handler_cb() { return m_scu.lookup()->txempty_handler(); }
- auto syndet_handler_cb() { return m_scu.lookup()->syndet_handler(); }
+ void rxd_w(int state) { m_scu->write_rxd(state); }
protected:
device_v5x_interface(const machine_config &mconfig, nec_common_device &device, bool is_16bit);
@@ -74,7 +69,7 @@ protected:
inline void internal_io_write_byte(offs_t a, u8 v) { m_internal_io->write_byte(a & INTERNAL_IO_ADDR_MASK, v); }
inline void internal_io_write_word(offs_t a, u16 v) { m_internal_io->write_word_unaligned(a & INTERNAL_IO_ADDR_MASK, v); }
- void remappable_io_map(address_map &map);
+ void remappable_io_map(address_map &map) ATTR_COLD;
virtual u8 temp_io_byte_r(offs_t offset) = 0;
virtual void temp_io_byte_w(offs_t offset, u8 data) = 0;
@@ -154,9 +149,9 @@ protected:
v50_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, bool is_16bit, u8 prefetch_size, u8 prefetch_cycles, u32 chip_type);
// device-specific overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks / 2); }
@@ -174,7 +169,7 @@ protected:
virtual void io_write_byte(offs_t a, u8 v) override;
virtual void io_write_word(offs_t a, u16 v) override;
- void internal_port_map(address_map &map);
+ void internal_port_map(address_map &map) ATTR_COLD;
u8 OPCN_r();
void OPCN_w(u8 data);
@@ -190,14 +185,16 @@ protected:
private:
void tout1_w(int state);
+ void sint_w(int state);
devcb_write_line m_tout1_callback;
devcb_read8 m_icu_slave_ack;
u8 m_OPCN;
- bool m_tout1;
- bool m_intp1;
- bool m_intp2;
+ u8 m_tout1;
+ u8 m_sint;
+ u8 m_intp1;
+ u8 m_intp2;
};
class v40_device : public v50_base_device
@@ -239,13 +236,21 @@ public:
template <unsigned Timer> auto tout_handler() { return m_tcu.lookup()->out_handler<Timer>(); }
+ // SCU
+ auto dtr_handler_cb() { return m_scu.lookup()->dtr_handler(); }
+ auto rts_handler_cb() { return m_scu.lookup()->rts_handler(); }
+ auto rxrdy_handler_cb() { return m_scu.lookup()->rxrdy_handler(); }
+ auto txrdy_handler_cb() { return m_scu.lookup()->txrdy_handler(); }
+ auto txempty_handler_cb() { return m_scu.lookup()->txempty_handler(); }
+ auto syndet_handler_cb() { return m_scu.lookup()->syndet_handler(); }
+
protected:
v53_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-specific overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_set_input(int inputnum, int state) override;
@@ -261,7 +266,7 @@ protected:
virtual void io_write_byte(offs_t a, u8 v) override;
virtual void io_write_word(offs_t a, u16 v) override;
- void internal_port_map(address_map &map);
+ void internal_port_map(address_map &map) ATTR_COLD;
virtual void install_peripheral_io() override;
u8 SCTL_r();
diff --git a/src/devices/cpu/nios2/nios2.h b/src/devices/cpu/nios2/nios2.h
index 5ec25c8369d..bb096065934 100644
--- a/src/devices/cpu/nios2/nios2.h
+++ b/src/devices/cpu/nios2/nios2.h
@@ -26,8 +26,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/ns32000/common.h b/src/devices/cpu/ns32000/common.h
new file mode 100644
index 00000000000..8a17ca96294
--- /dev/null
+++ b/src/devices/cpu/ns32000/common.h
@@ -0,0 +1,127 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+#ifndef MAME_CPU_NS32000_COMMON_H
+#define MAME_CPU_NS32000_COMMON_H
+
+#pragma once
+
+namespace ns32000
+{
+ enum st_mask : unsigned
+ {
+ ST_ICI = 0x0, // bus idle (CPU busy)
+ ST_ICW = 0x1, // bus idle (CPU wait)
+ ST_ISE = 0x3, // bus idle (slave execution)
+ ST_IAM = 0x4, // interrupt acknowledge, master
+ ST_IAC = 0x5, // interrupt acknowledge, cascaded
+ ST_EIM = 0x6, // end of interrupt, master
+ ST_EIC = 0x7, // end of interrupt, cascaded
+ ST_SIF = 0x8, // sequential instruction fetch
+ ST_NIF = 0x9, // non-sequential instruction fetch
+ ST_ODT = 0xa, // operand data transfer
+ ST_RMW = 0xb, // read RMW operand
+ ST_EAR = 0xc, // effective address read
+ ST_SOP = 0xd, // slave operand
+ ST_SST = 0xe, // slave status
+ ST_SID = 0xf, // slave ID
+
+ ST_PT1 = 0xd, // access pte1 by MMU (32532)
+ ST_PT2 = 0xe, // access pte2 by MMU (32532)
+ ST_SLV = 0x10, // slave access ST4 (32532)
+ };
+}
+
+class ns32000_slave_interface : public device_interface
+{
+public:
+ auto out_spc() { return m_out_spc.bind(); }
+
+ ns32000_slave_interface(machine_config const &mconfig, device_t &device)
+ : ns32000_slave_interface(mconfig, device, "ns32000_slave")
+ {
+ }
+
+ enum slave_idbyte : u8
+ {
+ FORMAT_9 = 0x3e, // fpu
+ FORMAT_11 = 0xbe, // fpu
+ FORMAT_12 = 0xfe, // fpu
+ FORMAT_14 = 0x1e, // mmu
+ };
+
+ enum slave_status : u16
+ {
+ SLAVE_Q = 0x0001, // quit (1=error)
+ SLAVE_L = 0x0004,
+ SLAVE_F = 0x0020,
+ SLAVE_Z = 0x0040,
+ SLAVE_N = 0x0080,
+ SLAVE_TS = 0x8000, // trap status (1=UND, 0=FPU)
+
+ SLAVE_OK = 0,
+ };
+
+ virtual void state_add(device_state_interface &parent, int &index) = 0;
+
+protected:
+ ns32000_slave_interface(machine_config const &mconfig, device_t &device, char const *type)
+ : device_interface(device, type)
+ , m_out_spc(*this)
+ {
+ }
+
+ devcb_write_line m_out_spc;
+};
+
+class ns32000_fpu_interface : public ns32000_slave_interface
+{
+protected:
+ ns32000_fpu_interface(machine_config const &mconfig, device_t &device)
+ : ns32000_slave_interface(mconfig, device)
+ {
+ }
+};
+
+class ns32000_mmu_interface : public ns32000_slave_interface
+{
+public:
+ enum translate_result : unsigned { COMPLETE, CANCEL, ABORT };
+ virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool flag = false, bool suppress = false) = 0;
+
+protected:
+ ns32000_mmu_interface(machine_config const &mconfig, device_t &device)
+ : ns32000_slave_interface(mconfig, device)
+ {
+ }
+};
+
+class ns32000_slow_slave_interface : public device_interface
+{
+public:
+ virtual u16 slow_status(int *icount = nullptr) = 0;
+ virtual u16 slow_read() = 0;
+ virtual void slow_write(u16 data) = 0;
+
+protected:
+ ns32000_slow_slave_interface(machine_config const &mconfig, device_t &device)
+ : device_interface(device, "ns32000_slave_slow")
+ {
+ }
+};
+
+class ns32000_fast_slave_interface : public device_interface
+{
+public:
+ virtual u32 fast_status(int *icount = nullptr) = 0;
+ virtual u32 fast_read() = 0;
+ virtual void fast_write(u32 data) = 0;
+
+protected:
+ ns32000_fast_slave_interface(machine_config const &mconfig, device_t &device)
+ : device_interface(device, "ns32000_slave_fast")
+ {
+ }
+};
+
+#endif // MAME_CPU_NS32000_COMMON_H
diff --git a/src/devices/cpu/ns32000/ns32000.cpp b/src/devices/cpu/ns32000/ns32000.cpp
index b4076283c3c..df40818387f 100644
--- a/src/devices/cpu/ns32000/ns32000.cpp
+++ b/src/devices/cpu/ns32000/ns32000.cpp
@@ -4,20 +4,27 @@
#include "emu.h"
#include "ns32000.h"
-#include "ns32000dasm.h"
+#include "ns32000d.h"
#include "debug/debugcpu.h"
+#define LOG_TRANSLATE (1U << 1)
+//#define VERBOSE (LOG_TRANSLATE)
+
+#include "logmacro.h"
+
DEFINE_DEVICE_TYPE(NS32008, ns32008_device, "ns32008", "National Semiconductor NS32008")
DEFINE_DEVICE_TYPE(NS32016, ns32016_device, "ns32016", "National Semiconductor NS32016")
DEFINE_DEVICE_TYPE(NS32032, ns32032_device, "ns32032", "National Semiconductor NS32032")
DEFINE_DEVICE_TYPE(NS32332, ns32332_device, "ns32332", "National Semiconductor NS32332")
+DEFINE_DEVICE_TYPE(NS32532, ns32532_device, "ns32532", "National Semiconductor NS32532")
/*
* TODO:
- * - prefetch queue
- * - unimplemented instructions
- * - format 6: subp,addp
- * - 32332, 32532
+ * - instruction timing
+ * - prefetch queue/caches
+ * - overflow exceptions
+ * - debug registers
+ * - translation look-aside buffer
*/
enum psr_mask : u16
@@ -27,7 +34,7 @@ enum psr_mask : u16
PSR_T = 0x0002, // trace trap enable
PSR_L = 0x0004, // less than condition
// unused
- // unused
+ PSR_V = 0x0010, // (32532 only) enable overflow trap
PSR_F = 0x0020, // general condition
PSR_Z = 0x0040, // zero condition
PSR_N = 0x0080, // negative condition
@@ -41,19 +48,24 @@ enum psr_mask : u16
// unused
// unused
// unused
- PSR_MSK = 0x0fe7, // write mask
};
enum cfg_mask : u32
{
- CFG_I = 0x01, // vectored interrupts
- CFG_F = 0x02, // fpu present
- CFG_M = 0x04, // mmu present
- CFG_C = 0x08, // custom coprocessor present
- CFG_FF = 0x10, // (32332 only) fast fpu protocol
- CFG_FM = 0x20, // (32332 only) fast mmu protocol
- CFG_FC = 0x40, // (32332 only) fast custom coprocessor protocol
- CFG_P = 0x80, // (32332 only) page size >= 4kb
+ CFG_I = 0x0001, // vectored interrupts
+ CFG_F = 0x0002, // fpu present
+ CFG_M = 0x0004, // mmu present
+ CFG_C = 0x0008, // custom coprocessor present
+ CFG_FF = 0x0010, // (32332 only) fast fpu protocol
+ CFG_FM = 0x0020, // (32332 only) fast mmu protocol
+ CFG_FC = 0x0040, // (32332 only) fast custom coprocessor protocol
+ CFG_P = 0x0080, // (32332 only) page size >= 4kb
+ CFG_DE = 0x0100, // (32532 only) direct exception mode enable
+ CFG_DC = 0x0200, // (32532 only) data cache enable
+ CFG_LDC = 0x0400, // (32532 only) lock data cache
+ CFG_IC = 0x0800, // (32532 only) instruction cache enable
+ CFG_LIC = 0x1000, // (32532 only) lock instruction cache
+ CFG_PF = 0x2000, // (32532 only) pipelined floating-point execution
};
enum exception_type : unsigned
@@ -69,46 +81,31 @@ enum exception_type : unsigned
BPT = 8, // breakpoint instruction
TRC = 9, // instruction trace
UND = 10, // undefined opcode
-};
-
-enum st_mask : unsigned
-{
- ST_ICI = 0x0, // bus idle (CPU busy)
- ST_ICW = 0x1, // bus idle (CPU wait)
- ST_ISE = 0x3, // bus idle (slave execution)
- ST_IAM = 0x4, // interrupt acknowledge, master
- ST_IAC = 0x5, // interrupt acknowledge, cascaded
- ST_EIM = 0x6, // end of interrupt, master
- ST_EIC = 0x7, // end of interrupt, cascaded
- ST_SIF = 0x8, // sequential instruction fetch
- ST_NIF = 0x9, // non-sequential instruction fetch
- ST_ODT = 0xa, // operand data transfer
- ST_RMW = 0xb, // read RMW operand
- ST_EAR = 0xc, // effective address read
- ST_SOP = 0xd, // slave operand
- ST_SST = 0xe, // slave status
- ST_SID = 0xf, // slave ID
+ BER = 11, // (32332 only) bus error
+ RBE = 11, // (32532 only) restartable bus error
+ NBE = 12, // (32532 only) non-restartable bus error
+ OVF = 13, // (32532 only) integer overflow trap
+ DBG = 14, // (32532 only) debug trap
};
class ns32000_abort : public std::exception { };
+class ns32000_delay : public std::exception { };
-static const u32 size_mask[] = { 0x000000ffU, 0x0000ffffU, 0x00000000U, 0xffffffffU };
-
-#define SP ((m_psr & PSR_S) ? m_sp1 : m_sp0)
+static const u32 size_mask[] = { 0x0000'00ffU, 0x0000'ffffU, 0x0000'0000U, 0xffff'ffffU };
-template <int Width>ns32000_device<Width>::ns32000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int databits, int addrbits)
+template <int HighBits, int Width>ns32000_device<HighBits, Width>::ns32000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: cpu_device(mconfig, type, tag, owner, clock)
- , m_address_mask(0xffffffffU >> (32 - addrbits))
- , m_program_config("program", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_iam_config("iam", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_iac_config("iac", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_eim_config("eim", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_eic_config("eic", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_sif_config("sif", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_nif_config("nif", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_odt_config("odt", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_rmw_config("rmw", ENDIANNESS_LITTLE, databits, addrbits, 0)
- , m_ear_config("ear", ENDIANNESS_LITTLE, databits, addrbits, 0)
+ , m_address_mask(util::make_bitmask<u32>(HighBits))
+ , m_program_config("program", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_iam_config("iam", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_iac_config("iac", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_eim_config("eim", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_eic_config("eic", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_sif_config("sif", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_nif_config("nif", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_odt_config("odt", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_rmw_config("rmw", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
+ , m_ear_config("ear", ENDIANNESS_LITTLE, 8 << Width, HighBits, 0)
, m_fpu(*this, finder_base::DUMMY_TAG)
, m_mmu(*this, finder_base::DUMMY_TAG)
, m_icount(0)
@@ -120,9 +117,7 @@ template <int Width>ns32000_device<Width>::ns32000_device(const machine_config &
, m_intbase(0)
, m_psr(0)
, m_mod(0)
- , m_cfg(0)
- , m_r{0}
- , m_f{0}
+ , m_r{}
, m_nmi_line(false)
, m_int_line(false)
, m_wait(false)
@@ -131,26 +126,34 @@ template <int Width>ns32000_device<Width>::ns32000_device(const machine_config &
}
ns32008_device::ns32008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : ns32000_device(mconfig, NS32008, tag, owner, clock, 8, 24)
+ : ns32000_device(mconfig, NS32008, tag, owner, clock)
{
}
ns32016_device::ns32016_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : ns32000_device(mconfig, NS32016, tag, owner, clock, 16, 24)
+ : ns32000_device(mconfig, NS32016, tag, owner, clock)
{
}
ns32032_device::ns32032_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : ns32000_device(mconfig, NS32032, tag, owner, clock, 32, 24)
+ : ns32000_device(mconfig, NS32032, tag, owner, clock)
{
}
ns32332_device::ns32332_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : ns32000_device(mconfig, NS32332, tag, owner, clock, 32, 32)
+ : ns32000_device(mconfig, NS32332, tag, owner, clock)
+{
+}
+
+ns32532_device::ns32532_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : ns32000_device(mconfig, NS32532, tag, owner, clock)
+ , ns32000_mmu_interface(mconfig, *this)
+ , m_pt1_config("pt1", ENDIANNESS_LITTLE, 32, 32, 0)
+ , m_pt2_config("pt2", ENDIANNESS_LITTLE, 32, 32, 0)
{
}
-template <int Width> void ns32000_device<Width>::device_start()
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::device_start()
{
set_icountptr(m_icount);
@@ -168,7 +171,6 @@ template <int Width> void ns32000_device<Width>::device_start()
save_item(NAME(m_cfg));
save_item(NAME(m_r));
- save_item(NAME(m_f));
save_item(NAME(m_nmi_line));
save_item(NAME(m_int_line));
@@ -203,7 +205,7 @@ template <int Width> void ns32000_device<Width>::device_start()
m_mmu->state_add(*this, index);
}
-template <int Width> void ns32000_device<Width>::device_reset()
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::device_reset()
{
for (std::pair<int, address_space_config const *> s : memory_space_config())
space(has_configured_map(s.first) ? s.first : 0).specific(m_bus[s.first]);
@@ -217,12 +219,12 @@ template <int Width> void ns32000_device<Width>::device_reset()
m_wait = false;
}
-template <int Width> void ns32000_device<Width>::state_string_export(device_state_entry const &entry, std::string &str) const
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::state_string_export(device_state_entry const &entry, std::string &str) const
{
switch (entry.index())
{
case STATE_GENFLAGS:
- str = string_format("%c%c%c%c%c%c%c%c%c%c",
+ str = string_format("%c%c%c%c%c%c%c%c%c%c%c",
(m_psr & PSR_I) ? 'I' : '.',
(m_psr & PSR_P) ? 'P' : '.',
(m_psr & PSR_S) ? 'S' : '.',
@@ -230,6 +232,7 @@ template <int Width> void ns32000_device<Width>::state_string_export(device_stat
(m_psr & PSR_N) ? 'N' : '.',
(m_psr & PSR_Z) ? 'Z' : '.',
(m_psr & PSR_F) ? 'F' : '.',
+ (m_psr & PSR_V) ? 'V' : '.',
(m_psr & PSR_L) ? 'L' : '.',
(m_psr & PSR_T) ? 'T' : '.',
(m_psr & PSR_C) ? 'C' : '.');
@@ -260,7 +263,7 @@ template <int Width> void ns32000_device<Width>::state_string_export(device_stat
*
* Underlying handlers further subdivide accesses by device bus width.
*/
-template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsigned st, u32 address, bool user, bool pfs)
+template <int HighBits, int Width> template<typename T> T ns32000_device<HighBits, Width>::mem_read(unsigned st, u32 address, bool user, bool pfs)
{
u32 physical = address;
ns32000_mmu_interface::translate_result tr = m_mmu ?
@@ -271,9 +274,12 @@ template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsi
u32 const unitmask = sizeof(T) - 1;
unsigned const offset = address & unitmask;
+ T data = 0;
+ m_ready = true;
+
if (offset)
{
- u32 const pagemask = u32(0x1ff) & ~unitmask;
+ u32 const pagemask = ((m_cfg & CFG_P) ? 0xfffU : 0x1ffU) & ~unitmask;
if (!m_mmu || (~address & pagemask))
{
@@ -281,15 +287,14 @@ template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsi
switch (sizeof(T))
{
case 1: abort(); // can't happen
- case 2: return T(m_bus[st].read_word_unaligned(physical));
- case 4: return T(m_bus[st].read_dword_unaligned(physical));
- case 8: return T(m_bus[st].read_qword_unaligned(physical));
+ case 2: data = m_bus[st].read_word_unaligned(physical); break;
+ case 4: data = m_bus[st].read_dword_unaligned(physical); break;
+ case 8: data = m_bus[st].read_qword_unaligned(physical); break;
}
}
else
{
// unaligned access, two pages
- T data = 0;
// first page
unsigned const shift = offset * 8;
@@ -315,8 +320,6 @@ template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsi
case 4: data |= m_bus[st].read_dword(physical & ~unitmask, u32(-1) >> shift) << shift; break;
case 8: data |= m_bus[st].read_qword(physical & ~unitmask, u64(-1) >> shift) << shift; break;
}
-
- return data;
}
else if (tr == ns32000_mmu_interface::ABORT)
throw ns32000_abort();
@@ -327,12 +330,17 @@ template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsi
// aligned access
switch (sizeof(T))
{
- case 1: return T(m_bus[st].read_byte(physical));
- case 2: return T(m_bus[st].read_word(physical));
- case 4: return T(m_bus[st].read_dword(physical));
- case 8: return T(m_bus[st].read_qword(physical));
+ case 1: data = m_bus[st].read_byte(physical); break;
+ case 2: data = m_bus[st].read_word(physical); break;
+ case 4: data = m_bus[st].read_dword(physical); break;
+ case 8: data = m_bus[st].read_qword(physical); break;
}
}
+
+ if (!m_ready)
+ throw ns32000_delay();
+ else
+ return data;
}
else if (tr == ns32000_mmu_interface::ABORT)
throw ns32000_abort();
@@ -340,7 +348,7 @@ template <int Width> template<typename T> T ns32000_device<Width>::mem_read(unsi
return 0;
}
-template <int Width> template<typename T> void ns32000_device<Width>::mem_write(unsigned st, u32 address, u64 data, bool user)
+template <int HighBits, int Width> template<typename T> void ns32000_device<HighBits, Width>::mem_write(unsigned st, u32 address, u64 data, bool user)
{
u32 physical = address;
ns32000_mmu_interface::translate_result tr = m_mmu ?
@@ -351,9 +359,11 @@ template <int Width> template<typename T> void ns32000_device<Width>::mem_write(
u32 const unitmask = sizeof(T) - 1;
unsigned const offset = address & unitmask;
+ m_ready = true;
+
if (offset)
{
- u32 const pagemask = u32(0x1ff) & ~unitmask;
+ u32 const pagemask = ((m_cfg & CFG_P) ? 0xfffU : 0x1ffU) & ~unitmask;
if (!m_mmu || (~address & pagemask))
{
@@ -444,6 +454,9 @@ template <int Width> template<typename T> void ns32000_device<Width>::mem_write(
case 8: m_bus[st].write_qword(physical, data); break;
}
}
+
+ if (!m_ready)
+ throw ns32000_delay();
}
else if (tr == ns32000_mmu_interface::ABORT)
throw ns32000_abort();
@@ -456,9 +469,9 @@ template <int Width> template<typename T> void ns32000_device<Width>::mem_write(
* - sequential fetch translation optimization
* - instruction fetch cycles
*/
-template <int Width> template<typename T> T ns32000_device<Width>::fetch(unsigned &bytes)
+template <int HighBits, int Width> template<typename T> T ns32000_device<HighBits, Width>::fetch(unsigned &bytes)
{
- T const data = mem_read<T>(m_sequential ? ST_SIF : ST_NIF, m_pc + bytes, false, bytes == 0);
+ T const data = mem_read<T>(m_sequential ? ns32000::ST_SIF : ns32000::ST_NIF, m_pc + bytes, false, bytes == 0);
bytes += sizeof(T);
m_sequential = true;
@@ -466,7 +479,7 @@ template <int Width> template<typename T> T ns32000_device<Width>::fetch(unsigne
return data;
}
-template <int Width> s32 ns32000_device<Width>::displacement(unsigned &bytes)
+template <int HighBits, int Width> s32 ns32000_device<HighBits, Width>::displacement(unsigned &bytes)
{
u32 const byte0 = fetch<u8>(bytes);
if (BIT(byte0, 7))
@@ -478,22 +491,22 @@ template <int Width> s32 ns32000_device<Width>::displacement(unsigned &bytes)
u32 const byte2 = fetch<u8>(bytes);
u32 const byte3 = fetch<u8>(bytes);
- return (s32((byte0 << 24) | (byte1 << 16) | (byte2 << 8) | byte3) << 2) >> 2;
+ return util::sext((byte0 << 24) | (byte1 << 16) | (byte2 << 8) | byte3, 30);
}
else
{
// word displacement
u8 const byte1 = fetch<u8>(bytes);
- return s16(((byte0 << 8) | byte1) << 2) >> 2;
+ return util::sext((byte0 << 8) | byte1, 14);
}
}
else
// byte displacement
- return s8(byte0 << 1) >> 1;
+ return util::sext(byte0, 7);
}
-template <int Width> void ns32000_device<Width>::decode(addr_mode *mode, unsigned &bytes)
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::decode(addr_mode *mode, unsigned &bytes)
{
bool scaled[] = { false, false };
@@ -550,7 +563,7 @@ template <int Width> void ns32000_device<Width>::decode(addr_mode *mode, unsigne
break;
case 0x11:
// stack memory relative disp2(disp1(SP))
- mode[i].base = SP + displacement(bytes);
+ mode[i].base = SP() + displacement(bytes);
mode[i].disp += displacement(bytes);
mode[i].type = REL;
mode[i].tea += 7 + top(SIZE_D, mode[i].base);
@@ -592,7 +605,7 @@ template <int Width> void ns32000_device<Width>::decode(addr_mode *mode, unsigne
break;
case 0x17:
// top of stack TOS
- mode[i].base = SP;
+ mode[i].base = SP();
mode[i].type = scaled[i] ? MEM : TOS;
if (!scaled[i])
{
@@ -614,7 +627,7 @@ template <int Width> void ns32000_device<Width>::decode(addr_mode *mode, unsigne
break;
case 0x19:
// stack memory disp(SP)
- mode[i].base = SP + displacement(bytes);
+ mode[i].base = SP() + displacement(bytes);
mode[i].type = MEM;
mode[i].tea += 5;
break;
@@ -633,8 +646,17 @@ template <int Width> void ns32000_device<Width>::decode(addr_mode *mode, unsigne
}
}
}
+template <int HighBits, int Width> u32 &ns32000_device<HighBits, Width>::SP()
+{
+ return SP(m_psr & PSR_S);
+}
-template <int Width> u32 ns32000_device<Width>::ea(addr_mode const mode)
+template <int HighBits, int Width> u32 &ns32000_device<HighBits, Width>::SP(bool user)
+{
+ return user ? m_sp1 : m_sp0;
+}
+
+template <int HighBits, int Width> u32 ns32000_device<HighBits, Width>::ea(addr_mode const mode)
{
u32 base;
@@ -645,12 +667,12 @@ template <int Width> u32 ns32000_device<Width>::ea(addr_mode const mode)
break;
case REL:
- base = mem_read<u32>(ST_EAR, mode.base);
+ base = mem_read<u32>(ns32000::ST_EAR, mode.base);
break;
case EXT:
- base = mem_read<u32>(ST_EAR, m_mod + 4);
- base = mem_read<u32>(ST_EAR, base + mode.base);
+ base = mem_read<u32>(ns32000::ST_EAR, m_mod + 4);
+ base = mem_read<u32>(ns32000::ST_EAR, base + mode.base);
break;
default:
@@ -661,7 +683,7 @@ template <int Width> u32 ns32000_device<Width>::ea(addr_mode const mode)
return base + mode.disp;
}
-template <int Width> u64 ns32000_device<Width>::gen_read(addr_mode mode)
+template <int HighBits, int Width> u64 ns32000_device<HighBits, Width>::gen_read(addr_mode mode)
{
if (mode.type == IMM)
return mode.imm;
@@ -669,8 +691,8 @@ template <int Width> u64 ns32000_device<Width>::gen_read(addr_mode mode)
if (mode.type == REG)
return m_r[mode.gen] & size_mask[mode.size];
- unsigned const st = (mode.access == RMW) ? ST_RMW : ST_ODT;
- u32 const address = (mode.type == TOS) ? SP : ea(mode);
+ unsigned const st = (mode.access == RMW) ? ns32000::ST_RMW : ns32000::ST_ODT;
+ u32 const address = (mode.type == TOS) ? SP() : ea(mode);
u64 data = 0;
switch (mode.size)
@@ -685,12 +707,12 @@ template <int Width> u64 ns32000_device<Width>::gen_read(addr_mode mode)
// post-increment stack pointer
if (mode.type == TOS && mode.access == READ)
- SP += mode.size + 1;
+ SP() += mode.size + 1;
return data;
}
-template <int Width> s64 ns32000_device<Width>::gen_read_sx(addr_mode mode)
+template <int HighBits, int Width> s64 ns32000_device<HighBits, Width>::gen_read_sx(addr_mode mode)
{
u64 data = gen_read(mode);
@@ -705,7 +727,7 @@ template <int Width> s64 ns32000_device<Width>::gen_read_sx(addr_mode mode)
return data;
}
-template <int Width> void ns32000_device<Width>::gen_write(addr_mode mode, u64 data)
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::gen_write(addr_mode mode, u64 data)
{
if (mode.type == REG)
{
@@ -715,22 +737,22 @@ template <int Width> void ns32000_device<Width>::gen_write(addr_mode mode, u64 d
// pre-decrement stack pointer
if (mode.type == TOS && mode.access == WRITE)
- SP -= mode.size + 1;
+ SP() -= mode.size + 1;
- u32 const address = (mode.type == TOS) ? SP : ea(mode);
+ u32 const address = (mode.type == TOS) ? SP() : ea(mode);
switch (mode.size)
{
- case SIZE_B: mem_write<u8>(ST_ODT, address, data); break;
- case SIZE_W: mem_write<u16>(ST_ODT, address, data); break;
- case SIZE_D: mem_write<u32>(ST_ODT, address, data); break;
- case SIZE_Q: mem_write<u64>(ST_ODT, address, data); break;
+ case SIZE_B: mem_write<u8>(ns32000::ST_ODT, address, data); break;
+ case SIZE_W: mem_write<u16>(ns32000::ST_ODT, address, data); break;
+ case SIZE_D: mem_write<u32>(ns32000::ST_ODT, address, data); break;
+ case SIZE_Q: mem_write<u64>(ns32000::ST_ODT, address, data); break;
}
m_icount -= top(mode.size, address);
}
-template <int Width> bool ns32000_device<Width>::condition(unsigned const cc)
+template <int HighBits, int Width> bool ns32000_device<HighBits, Width>::condition(unsigned const cc)
{
switch (cc & 15)
{
@@ -772,7 +794,7 @@ template <int Width> bool ns32000_device<Width>::condition(unsigned const cc)
return false;
}
-template <int Width> void ns32000_device<Width>::flags(u32 const src1, u32 const src2, u32 const dest, unsigned const size, bool const subtraction)
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::flags(u32 const src1, u32 const src2, u32 const dest, unsigned const size, bool const subtraction)
{
unsigned const sign_bit = (size + 1) * 8 - 1;
@@ -788,104 +810,196 @@ template <int Width> void ns32000_device<Width>::flags(u32 const src1, u32 const
m_psr |= PSR_F;
}
-template <int Width> void ns32000_device<Width>::interrupt(unsigned const type, u32 const return_address)
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::interrupt(unsigned const trap)
{
- unsigned offset = type * 4;
+ if (machine().debug_enabled() && (trap > ABT))
+ debug()->exception_hook(trap);
+
+ unsigned offset = trap * 4;
- switch (type)
+ switch (trap)
{
case NVI:
// maskable interrupt
m_sps = m_psr;
- m_psr &= ~(PSR_I | PSR_P | PSR_S | PSR_U | PSR_T);
+ m_psr &= ~(PSR_I | PSR_P | PSR_S | PSR_U | PSR_V | PSR_T);
if (m_cfg & CFG_I)
{
// acknowledge interrupt and read vector
- s8 vector = mem_read<u8>(ST_IAM, 0xfffffe00 & m_address_mask);
+ s8 vector = mem_read<u8>(ns32000::ST_IAM, 0xffff'fe00U & m_address_mask);
if (vector < 0 && vector >= -16)
{
// vectored mode, cascaded
- u32 const cascade = mem_read<u32>(ST_ODT, m_intbase + vector * 4);
+ u32 const cascade = mem_read<u32>(ns32000::ST_ODT, m_intbase + vector * 4);
- vector = mem_read<u8>(ST_IAC, cascade);
+ vector = mem_read<u8>(ns32000::ST_IAC, cascade);
}
offset = vector * 4;
}
else
// acknowledge non-vectored interrupt
- mem_read<u8>(ST_IAM, 0xfffffe00 & m_address_mask);
+ mem_read<u8>(ns32000::ST_IAM, 0xffff'fe00U & m_address_mask);
break;
case NMI:
// non-maskable interrupt
m_sps = m_psr;
- m_psr &= ~(PSR_I | PSR_P | PSR_S | PSR_U | PSR_T);
+ m_psr &= ~(PSR_I | PSR_P | PSR_S | PSR_U | PSR_V | PSR_T);
// acknowledge interrupt and discard vector
- mem_read<u8>(ST_IAM, 0xffffff00 & m_address_mask);
+ mem_read<u8>(ns32000::ST_IAM, 0xffff'ff00U & m_address_mask);
m_nmi_line = false;
break;
case ABT:
+ case BER:
// abort
- SP = m_ssp;
+ SP() = m_ssp;
m_psr &= ~PSR_P;
m_sps = m_psr;
- m_psr &= ~(PSR_I | PSR_S | PSR_U | PSR_T);
+ m_psr &= ~(PSR_I | PSR_S | PSR_U | PSR_V | PSR_T);
break;
case TRC:
// trace trap
m_psr &= ~PSR_P;
m_sps = m_psr;
- m_psr &= ~(PSR_S | PSR_U | PSR_T);
+ m_psr &= ~(PSR_S | PSR_U | PSR_V | PSR_T);
break;
default:
// traps other than trace
- SP = m_ssp;
+ SP() = m_ssp;
m_psr = m_sps;
- m_psr &= ~(PSR_P | PSR_S | PSR_U | PSR_T);
+ if ((type() == NS32332 && trap == ILL) || (type() == NS32532 && (trap == ILL || trap == UND)))
+ m_sps &= ~PSR_P;
+ m_psr &= ~(PSR_P | PSR_S | PSR_U | PSR_V | PSR_T);
break;
}
- // push saved program status
- m_sp0 -= 2;
- mem_write<u16>(ST_ODT, m_sp0, m_sps);
-
- // push mod
- m_sp0 -= 2;
- mem_write<u16>(ST_ODT, m_sp0, m_mod);
+ // push saved program status and mod
+ m_sp0 -= 4;
+ mem_write<u32>(ns32000::ST_ODT, m_sp0, u32(m_sps) << 16 | m_mod);
// push return address
m_sp0 -= 4;
- mem_write<u32>(ST_ODT, m_sp0, return_address);
+ mem_write<u32>(ns32000::ST_ODT, m_sp0, m_pc);
- // fetch external procedure descriptor
- u32 const desc = mem_read<u32>(ST_ODT, m_intbase + offset);
+ if (!(m_cfg & CFG_DE))
+ {
+ // fetch external procedure descriptor
+ u32 const desc = mem_read<u32>(ns32000::ST_ODT, m_intbase + offset);
- // update mod, sb, pc
- m_mod = u16(desc);
- m_sb = mem_read<u32>(ST_ODT, m_mod + 0);
- m_pc = mem_read<u32>(ST_ODT, m_mod + 8) + (desc >> 16);
+ // update mod, sb, pc
+ m_mod = u16(desc);
+ m_sb = mem_read<u32>(ns32000::ST_ODT, m_mod + 0);
+ m_pc = mem_read<u32>(ns32000::ST_ODT, m_mod + 8) + (desc >> 16);
+ }
+ else
+ m_pc = mem_read<u32>(ns32000::ST_ODT, m_intbase + offset);
// TODO: flush queue
m_sequential = false;
m_icount -= top(SIZE_W, m_sp0) * 2 + top(SIZE_W, m_intbase + offset) + top(SIZE_D, m_sp0) + top(SIZE_D, m_mod);
+}
+
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::lpr(unsigned reg, addr_mode const mode, bool user, unsigned &tex)
+{
+ switch (reg)
+ {
+ case 0x0:
+ m_psr = ((m_psr & 0xff00) | u8(gen_read(mode))) & PSR_MSK();
+ break;
+ case 0x8:
+ m_fp = gen_read(mode);
+ break;
+ case 0x9:
+ SP() = gen_read(mode);
+ break;
+ case 0xa:
+ m_sb = gen_read(mode);
+ break;
+ case 0xd:
+ if (!user)
+ {
+ u32 const src = gen_read(mode);
+
+ if (mode.size == SIZE_B)
+ m_psr = ((m_psr & 0xff00) | u8(src)) & PSR_MSK();
+ else
+ m_psr = src & PSR_MSK();
+ }
+ else
+ interrupt(ILL);
+ break;
+ case 0xe:
+ if (!user)
+ m_intbase = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0xf:
+ m_mod = gen_read(mode);
+ break;
+ default:
+ interrupt(UND);
+ break;
+ }
- if (machine().debug_enabled() && (type > ABT))
- debug()->exception_hook(type);
+ // TODO: tcy 19-33
+ tex = mode.tea + 19;
}
-template <int Width> void ns32000_device<Width>::execute_run()
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::spr(unsigned reg, addr_mode const mode, bool user, unsigned &tex)
+{
+ switch (reg)
+ {
+ case 0x0:
+ gen_write(mode, u8(m_psr));
+ break;
+ case 0x8:
+ gen_write(mode, m_fp);
+ break;
+ case 0x9:
+ gen_write(mode, SP());
+ break;
+ case 0xa:
+ gen_write(mode, m_sb);
+ break;
+ case 0xd:
+ if (!user)
+ gen_write(mode, m_psr);
+ else
+ interrupt(ILL);
+ break;
+ case 0xe:
+ if (!user)
+ gen_write(mode, m_intbase);
+ else
+ interrupt(ILL);
+ break;
+ case 0xf:
+ gen_write(mode, m_mod);
+ break;
+ default:
+ interrupt(UND);
+ break;
+ }
+
+ // TODO: tcy 21-27
+ tex = mode.tea + 21;
+}
+
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::execute_run()
{
while (m_icount > 0)
{
if (m_wait)
{
+ debugger_wait_hook();
m_icount = 0;
continue;
}
@@ -899,7 +1013,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
debug()->interrupt_hook(INPUT_LINE_NMI, m_pc);
// service interrupt
- interrupt(NMI, m_pc);
+ interrupt(NMI);
}
else if (m_int_line && (m_psr & PSR_I))
{
@@ -908,7 +1022,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
debug()->interrupt_hook(INPUT_LINE_IRQ0, m_pc);
// service interrupt
- interrupt(NVI, m_pc);
+ interrupt(NVI);
}
// update trace pending
@@ -920,7 +1034,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
debugger_instruction_hook(m_pc);
// save state
- m_ssp = SP;
+ m_ssp = SP();
m_sps = m_psr;
unsigned bytes = 0;
@@ -954,12 +1068,12 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
s32 const dst = displacement(bytes);
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_pc + bytes);
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_pc + bytes);
m_pc += dst;
m_sequential = false;
- tex = top(SIZE_D, SP) + 6;
+ tex = top(SIZE_D, SP()) + 6;
}
break;
case 0x1:
@@ -968,13 +1082,13 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
s32 const constant = displacement(bytes);
- u32 const addr = mem_read<u32>(ST_ODT, SP);
- SP += 4;
+ u32 const addr = mem_read<u32>(ns32000::ST_ODT, SP());
+ SP() += 4;
m_pc = addr;
m_sequential = false;
- tex = top(SIZE_D, SP) + 2;
- SP += constant;
+ tex = top(SIZE_D, SP()) + 2;
+ SP() += constant;
}
break;
case 0x2:
@@ -983,19 +1097,19 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
s32 const index = displacement(bytes);
- u32 const link_base = mem_read<u32>(ST_ODT, m_mod + 4);
- u32 const desc = mem_read<u32>(ST_ODT, link_base + index * 4);
+ u32 const link_base = mem_read<u32>(ns32000::ST_ODT, m_mod + 4);
+ u32 const desc = mem_read<u32>(ns32000::ST_ODT, link_base + index * 4);
- SP -= 4;
- mem_write<u16>(ST_ODT, SP, m_mod);
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_pc + bytes);
+ SP() -= 4;
+ mem_write<u16>(ns32000::ST_ODT, SP(), m_mod);
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_pc + bytes);
u16 const mod = u16(desc);
- u32 const sb = mem_read<u32>(ST_ODT, mod + 0);
- u32 const pc = mem_read<u32>(ST_ODT, mod + 8) + (desc >> 16);
+ u32 const sb = mem_read<u32>(ns32000::ST_ODT, mod + 0);
+ u32 const pc = mem_read<u32>(ns32000::ST_ODT, mod + 8) + (desc >> 16);
- tex = top(SIZE_D, m_mod + 4) + top(SIZE_W, link_base + index * 4) * 2 + top(SIZE_W, SP) + top(SIZE_D, SP) + top(SIZE_D, mod) * 2 + 16;
+ tex = top(SIZE_D, m_mod + 4) + top(SIZE_W, link_base + index * 4) * 2 + top(SIZE_W, SP()) + top(SIZE_D, SP()) + top(SIZE_D, mod) * 2 + 16;
m_pc = pc;
m_mod = mod;
@@ -1009,18 +1123,18 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
s32 const constant = displacement(bytes);
- u32 const pc = mem_read<u32>(ST_ODT, SP);
- SP += 4;
- u16 const mod = mem_read<u16>(ST_ODT, SP);
- SP += 4;
- u32 const sb = mem_read<u32>(ST_ODT, mod);
+ u32 const pc = mem_read<u32>(ns32000::ST_ODT, SP());
+ SP() += 4;
+ u16 const mod = mem_read<u16>(ns32000::ST_ODT, SP());
+ SP() += 4;
+ u32 const sb = mem_read<u32>(ns32000::ST_ODT, mod);
- tex = top(SIZE_D, SP) + top(SIZE_W, SP) + top(SIZE_D, mod) + 2;
+ tex = top(SIZE_D, SP()) + top(SIZE_W, SP()) + top(SIZE_D, mod) + 2;
m_pc = pc;
m_mod = mod;
m_sb = sb;
- SP += constant;
+ SP() += constant;
m_sequential = false;
}
break;
@@ -1031,65 +1145,77 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
s32 const constant = displacement(bytes);
- u32 const pc = mem_read<u32>(ST_ODT, SP);
- SP += 4;
- u16 const mod = mem_read<u16>(ST_ODT, SP);
- SP += 2;
- u16 const psr = mem_read<u16>(ST_ODT, SP) & PSR_MSK;
- SP += 2;
- u32 const sb = mem_read<u32>(ST_ODT, mod);
+ u32 const pc = mem_read<u32>(ns32000::ST_ODT, SP() + 0);
+ u16 const psr = mem_read<u16>(ns32000::ST_ODT, SP() + 6) & PSR_MSK();
+
+ if (!(m_cfg & CFG_DE))
+ {
+ u16 const mod = mem_read<u16>(ns32000::ST_ODT, SP() + 4);
+ u32 const sb = mem_read<u32>(ns32000::ST_ODT, mod);
- tex = top(SIZE_D, SP) + top(SIZE_W, SP) * 2 + top(SIZE_D, mod) + 35;
+ m_mod = mod;
+ m_sb = sb;
+
+ tex = top(SIZE_D, SP()) + top(SIZE_W, SP()) * 2 + top(SIZE_D, mod) + 35;
+ }
+ else
+ tex = top(SIZE_D, SP()) + top(SIZE_W, SP()) + 35;
+
+ SP() += 8;
m_pc = pc;
- m_mod = mod;
m_psr = psr;
- m_sb = sb;
- SP += constant;
+ SP() += constant;
+
m_sequential = false;
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
break;
case 0x5:
// RETI
if (!(m_psr & PSR_U))
{
// end of interrupt, master
- s8 vector = mem_read<u8>(ST_EIM, 0xfffffe00 & m_address_mask);
+ s8 vector = mem_read<u8>(ns32000::ST_EIM, 0xffff'fe00U & m_address_mask);
// check for vectored mode
if (m_cfg & CFG_I)
{
if (vector < 0 && vector >= -16)
{
- u32 const cascade = mem_read<u32>(ST_ODT, m_intbase + vector * 4);
+ u32 const cascade = mem_read<u32>(ns32000::ST_ODT, m_intbase + vector * 4);
// end of interrupt, cascaded
- vector = mem_read<u8>(ST_EIC, cascade);
+ vector = mem_read<u8>(ns32000::ST_EIC, cascade);
}
}
- u32 const pc = mem_read<u32>(ST_ODT, SP);
- SP += 2;
- mem_read<u16>(ST_ODT, SP);
- SP += 2;
- u16 const mod = mem_read<u16>(ST_ODT, SP);
- SP += 2;
- u16 const psr = mem_read<u16>(ST_ODT, SP) & PSR_MSK;
- SP += 2;
- u32 const sb = mem_read<u32>(ST_ODT, mod);
+ u32 const pc = mem_read<u32>(ns32000::ST_ODT, SP() + 0);
+ u16 const psr = mem_read<u16>(ns32000::ST_ODT, SP() + 6) & PSR_MSK();
+
+ if (!(m_cfg & CFG_DE))
+ {
+ u16 const mod = mem_read<u16>(ns32000::ST_ODT, SP() + 4);
+ u32 const sb = mem_read<u32>(ns32000::ST_ODT, mod);
+
+ m_mod = mod;
+ m_sb = sb;
+
+ tex = top(SIZE_B) + top(SIZE_W, SP()) * 3 + top(SIZE_D) * 3 + 39;
+ }
+ else
+ tex = top(SIZE_B) + top(SIZE_W, SP()) * 2 + top(SIZE_D) * 2 + 39;
- tex = top(SIZE_B) + top(SIZE_W, SP) * 3 + top(SIZE_D) * 3 + 39;
+ SP() += 8;
m_pc = pc;
- m_mod = mod;
m_psr = psr;
- m_sb = sb;
+
m_sequential = false;
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
break;
case 0x6:
// SAVE reglist
@@ -1102,9 +1228,9 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
if (BIT(reglist, i))
{
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_r[i]);
- tex += top(SIZE_D, SP) + 4;
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_r[i]);
+ tex += top(SIZE_D, SP()) + 4;
}
}
}
@@ -1120,9 +1246,9 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
if (BIT(reglist, i))
{
- m_r[7 - i] = mem_read<u32>(ST_ODT, SP);
- tex += top(SIZE_D, SP) + 5;
- SP += 4;
+ m_r[7 - i] = mem_read<u32>(ns32000::ST_ODT, SP());
+ tex += top(SIZE_D, SP()) + 5;
+ SP() += 4;
}
}
}
@@ -1134,19 +1260,19 @@ template <int Width> void ns32000_device<Width>::execute_run()
u8 const reglist = fetch<u8>(bytes);
s32 const constant = displacement(bytes);
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_fp);
- u32 const fp = SP;
- tex = top(SIZE_D, SP) + 18;
- SP -= constant;
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_fp);
+ u32 const fp = SP();
+ tex = top(SIZE_D, SP()) + 18;
+ SP() -= constant;
for (unsigned i = 0; i < 8; i++)
{
if (BIT(reglist, i))
{
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_r[i]);
- tex += top(SIZE_D, SP) + 4;
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_r[i]);
+ tex += top(SIZE_D, SP()) + 4;
}
}
@@ -1164,15 +1290,15 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
if (BIT(reglist, i))
{
- m_r[7 - i] = mem_read<u32>(ST_ODT, SP);
- tex += top(SIZE_D, SP) + 5;
- SP += 4;
+ m_r[7 - i] = mem_read<u32>(ns32000::ST_ODT, SP());
+ tex += top(SIZE_D, SP()) + 5;
+ SP() += 4;
}
}
- SP = m_fp;
- m_fp = mem_read<u32>(ST_ODT, SP);
- tex += top(SIZE_D, SP);
- SP += 4;
+ SP() = m_fp;
+ m_fp = mem_read<u32>(ns32000::ST_ODT, SP());
+ tex += top(SIZE_D, SP());
+ SP() += 4;
}
break;
case 0xa:
@@ -1193,7 +1319,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
// FLAG
if (m_psr & PSR_F)
{
- interrupt(FLG, m_pc);
+ interrupt(FLG);
tex = 44;
}
else
@@ -1201,12 +1327,12 @@ template <int Width> void ns32000_device<Width>::execute_run()
break;
case 0xe:
// SVC
- interrupt(SVC, m_pc);
+ interrupt(SVC);
tex = 40;
break;
case 0xf:
// BPT
- interrupt(BPT, m_pc);
+ interrupt(BPT);
tex = 40;
break;
}
@@ -1279,39 +1405,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
mode[0].write_i(size);
decode(mode, bytes);
- switch (quick)
- {
- case 0x0: // UPSR
- gen_write(mode[0], u8(m_psr));
- break;
- case 0x8: // FP
- gen_write(mode[0], m_fp);
- break;
- case 0x9: // SP
- gen_write(mode[0], SP);
- break;
- case 0xa: // SB
- gen_write(mode[0], m_sb);
- break;
- case 0xd: // PSR
- if (!(m_psr & PSR_U))
- gen_write(mode[0], m_psr);
- else
- interrupt(ILL, m_pc);
- break;
- case 0xe: // INTBASE
- if (!(m_psr & PSR_U))
- gen_write(mode[0], m_intbase);
- else
- interrupt(ILL, m_pc);
- break;
- case 0xf: // MOD
- gen_write(mode[0], m_mod);
- break;
- }
-
- // TODO: tcy 21-27
- tex = mode[0].tea + 21;
+ spr(quick, mode[0], m_psr & PSR_U, tex);
break;
case 3:
// Scondi dst
@@ -1371,49 +1465,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
mode[0].read_i(size);
decode(mode, bytes);
- switch (quick)
- {
- case 0x0: // UPSR
- m_psr = ((m_psr & 0xff00) | u8(gen_read(mode[0]))) & PSR_MSK;
- break;
- case 0x8: // FP
- m_fp = gen_read(mode[0]);
- break;
- case 0x9: // SP
- SP = gen_read(mode[0]);
- break;
- case 0xa: // SB
- m_sb = gen_read(mode[0]);
- break;
- case 0xd: // PSR
- if (!(m_psr & PSR_U))
- {
- u32 const src = gen_read(mode[0]);
-
- if (size == SIZE_B)
- m_psr = ((m_psr & 0xff00) | u8(src)) & PSR_MSK;
- else
- m_psr = src & PSR_MSK;
- }
- else
- interrupt(ILL, m_pc);
- break;
- case 0xe: // INTBASE
- if (!(m_psr & PSR_U))
- m_intbase = gen_read(mode[0]);
- else
- interrupt(ILL, m_pc);
- break;
- case 0xf: // MOD
- m_mod = gen_read(mode[0]);
- break;
- default:
- interrupt(UND, m_pc);
- break;
- }
-
- // TODO: tcy 19-33
- tex = mode[0].tea + 19;
+ lpr(quick, mode[0], m_psr & PSR_U, tex);
break;
case 7:
// format 3: gggg gooo o111 11ii
@@ -1430,15 +1482,15 @@ template <int Width> void ns32000_device<Width>::execute_run()
u32 const address = ea(mode[0]);
- SP -= 4;
- mem_write<u16>(ST_ODT, SP, m_mod);
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_pc + bytes);
+ SP() -= 4;
+ mem_write<u16>(ns32000::ST_ODT, SP(), m_mod);
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_pc + bytes);
- u32 const desc = mem_read<u32>(ST_ODT, address);
+ u32 const desc = mem_read<u32>(ns32000::ST_ODT, address);
u16 const mod = u16(desc);
- u32 const sb = mem_read<u32>(ST_ODT, mod + 0);
- u32 const pc = mem_read<u32>(ST_ODT, mod + 8) + (desc >> 16);
+ u32 const sb = mem_read<u32>(ns32000::ST_ODT, mod + 0);
+ u32 const pc = mem_read<u32>(ns32000::ST_ODT, mod + 8) + (desc >> 16);
tex = mode[0].tea + top(SIZE_W, address) * 3 + top(SIZE_D, mod) * 3 + 13;
@@ -1448,7 +1500,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
m_sequential = false;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x2:
// BICPSRi src
@@ -1468,10 +1520,10 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + ((size == SIZE_B) ? 18 : 30);
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x4:
// JUMP dst
@@ -1488,7 +1540,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + 2;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x6:
// BISPSRi src
@@ -1503,15 +1555,15 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
u16 const src = gen_read(mode[0]);
- m_psr |= src & PSR_MSK;
+ m_psr |= src & PSR_MSK();
tex = mode[0].tea + ((size == SIZE_B) ? 18 : 30);
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0xa:
// ADJSPi src
@@ -1523,7 +1575,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
s32 const src = gen_read_sx(mode[0]);
- SP -= src;
+ SP() -= src;
tex = mode[0].tea + 6;
}
@@ -1537,17 +1589,17 @@ template <int Width> void ns32000_device<Width>::execute_run()
mode[0].addr();
decode(mode, bytes);
- SP -= 4;
- mem_write<u32>(ST_ODT, SP, m_pc + bytes);
+ SP() -= 4;
+ mem_write<u32>(ns32000::ST_ODT, SP(), m_pc + bytes);
m_pc = ea(mode[0]);
m_sequential = false;
// TODO: where does the TOPi come from?
- tex = mode[0].tea + top(SIZE_D, SP) + top(size) + 5;
+ tex = mode[0].tea + top(SIZE_D, SP()) + top(size) + 5;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0xe:
// CASEi src
@@ -1566,7 +1618,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
break;
default:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
}
break;
@@ -1774,7 +1826,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = (mode[1].type == REG) ? mode[0].tea + 3 : mode[0].tea + mode[1].tea + 2;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0xa:
// ANDi src,dst
@@ -1845,7 +1897,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
else
{
- u8 const byte = mem_read<u8>(ST_ODT, ea(mode[1]) + (offset >> 3));
+ u8 const byte = mem_read<u8>(ns32000::ST_ODT, ea(mode[1]) + (offset >> 3));
if (BIT(byte, offset & 7))
m_psr |= PSR_F;
@@ -1904,12 +1956,12 @@ template <int Width> void ns32000_device<Width>::execute_run()
while (m_r[0])
{
u32 data =
- (size == SIZE_D) ? mem_read<u32>(ST_ODT, m_r[1]) :
- (size == SIZE_W) ? mem_read<u16>(ST_ODT, m_r[1]) :
- mem_read<u8>(ST_ODT, m_r[1]);
+ (size == SIZE_D) ? mem_read<u32>(ns32000::ST_ODT, m_r[1]) :
+ (size == SIZE_W) ? mem_read<u16>(ns32000::ST_ODT, m_r[1]) :
+ mem_read<u8>(ns32000::ST_ODT, m_r[1]);
if (translate)
- data = mem_read<u8>(ST_ODT, m_r[3] + u8(data));
+ data = mem_read<u8>(ns32000::ST_ODT, m_r[3] + u8(data));
tex += top(size, m_r[1]) + (translate ? top(SIZE_B) + 27 : (backward || uw) ? 24 : 13);
@@ -1921,11 +1973,11 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
if (size == SIZE_D)
- mem_write<u32>(ST_ODT, m_r[2], data);
+ mem_write<u32>(ns32000::ST_ODT, m_r[2], data);
else if (size == SIZE_W)
- mem_write<u16>(ST_ODT, m_r[2], data);
+ mem_write<u16>(ns32000::ST_ODT, m_r[2], data);
else
- mem_write<u8>(ST_ODT, m_r[2], data);
+ mem_write<u8>(ns32000::ST_ODT, m_r[2], data);
tex += top(size, m_r[2]);
@@ -1952,16 +2004,16 @@ template <int Width> void ns32000_device<Width>::execute_run()
while (m_r[0])
{
u32 src1 =
- (size == SIZE_D) ? mem_read<u32>(ST_ODT, m_r[1]) :
- (size == SIZE_W) ? mem_read<u16>(ST_ODT, m_r[1]) :
- mem_read<u8>(ST_ODT, m_r[1]);
+ (size == SIZE_D) ? mem_read<u32>(ns32000::ST_ODT, m_r[1]) :
+ (size == SIZE_W) ? mem_read<u16>(ns32000::ST_ODT, m_r[1]) :
+ mem_read<u8>(ns32000::ST_ODT, m_r[1]);
u32 src2 =
- (size == SIZE_D) ? mem_read<u32>(ST_ODT, m_r[2]) :
- (size == SIZE_W) ? mem_read<u16>(ST_ODT, m_r[2]) :
- mem_read<u8>(ST_ODT, m_r[2]);
+ (size == SIZE_D) ? mem_read<u32>(ns32000::ST_ODT, m_r[2]) :
+ (size == SIZE_W) ? mem_read<u16>(ns32000::ST_ODT, m_r[2]) :
+ mem_read<u8>(ns32000::ST_ODT, m_r[2]);
if (translate)
- src1 = mem_read<u8>(ST_ODT, m_r[3] + u8(src1));
+ src1 = mem_read<u8>(ns32000::ST_ODT, m_r[3] + u8(src1));
tex += top(size, m_r[1]) + top(size, m_r[2]) + (translate ? top(SIZE_B) + 38 : 35);
@@ -2008,12 +2060,17 @@ template <int Width> void ns32000_device<Width>::execute_run()
// short
if (!(m_psr & PSR_U))
{
- m_cfg = BIT(opword, 7, (type() == NS32332) ? 8 : 4);
+ if (type() == NS32532)
+ m_cfg = BIT(opword, 7, 4) | (CFG_P | CFG_FC | CFG_FM | CFG_FF);
+ else if (type() == NS32332)
+ m_cfg = BIT(opword, 7, 8);
+ else
+ m_cfg = BIT(opword, 7, 4);
tex = 15;
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
break;
case 3:
// SKPSi options
@@ -2023,12 +2080,12 @@ template <int Width> void ns32000_device<Width>::execute_run()
while (m_r[0])
{
u32 data =
- (size == SIZE_D) ? mem_read<u32>(ST_ODT, m_r[1]) :
- (size == SIZE_W) ? mem_read<u16>(ST_ODT, m_r[1]) :
- mem_read<u8>(ST_ODT, m_r[1]);
+ (size == SIZE_D) ? mem_read<u32>(ns32000::ST_ODT, m_r[1]) :
+ (size == SIZE_W) ? mem_read<u16>(ns32000::ST_ODT, m_r[1]) :
+ mem_read<u8>(ns32000::ST_ODT, m_r[1]);
if (translate)
- data = mem_read<u8>(ST_ODT, m_r[3] + u8(data));
+ data = mem_read<u8>(ns32000::ST_ODT, m_r[3] + u8(data));
tex += top(size, m_r[1]) + (translate ? top(SIZE_B) + 30 : 27);
@@ -2048,7 +2105,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
break;
default:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
}
}
@@ -2131,21 +2188,21 @@ template <int Width> void ns32000_device<Width>::execute_run()
else
{
u32 const byte_ea = ea(mode[1]) + (offset >> 3);
- u8 const byte = mem_read<u8>(ST_ODT, byte_ea);
+ u8 const byte = mem_read<u8>(ns32000::ST_ODT, byte_ea);
if (BIT(byte, offset & 7))
m_psr |= PSR_F;
else
m_psr &= ~PSR_F;
- mem_write<u8>(ST_ODT, byte_ea, byte & ~(1U << (offset & 7)));
+ mem_write<u8>(ns32000::ST_ODT, byte_ea, byte & ~(1U << (offset & 7)));
tex = mode[0].tea + mode[1].tea + top(SIZE_B) * 2 + 15;
}
}
break;
case 0x4:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x5:
// LSHi count,dst
@@ -2195,14 +2252,14 @@ template <int Width> void ns32000_device<Width>::execute_run()
else
{
u32 const byte_ea = ea(mode[1]) + (offset >> 3);
- u8 const byte = mem_read<u8>(ST_ODT, byte_ea);
+ u8 const byte = mem_read<u8>(ns32000::ST_ODT, byte_ea);
if (BIT(byte, offset & 7))
m_psr |= PSR_F;
else
m_psr &= ~PSR_F;
- mem_write<u8>(ST_ODT, byte_ea, byte | (1U << (offset & 7)));
+ mem_write<u8>(ns32000::ST_ODT, byte_ea, byte | (1U << (offset & 7)));
tex = mode[0].tea + mode[1].tea + top(SIZE_B) * 2 + 15;
}
@@ -2255,7 +2312,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
break;
case 0xa:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0xb:
// SUBPi src,dst
@@ -2363,14 +2420,14 @@ template <int Width> void ns32000_device<Width>::execute_run()
else
{
u32 const byte_ea = ea(mode[1]) + (offset >> 3);
- u8 const byte = mem_read<u8>(ST_ODT, byte_ea);
+ u8 const byte = mem_read<u8>(ns32000::ST_ODT, byte_ea);
if (BIT(byte, offset & 7))
m_psr |= PSR_F;
else
m_psr &= ~PSR_F;
- mem_write<u8>(ST_ODT, byte_ea, byte ^ (1U << (offset & 7)));
+ mem_write<u8>(ns32000::ST_ODT, byte_ea, byte ^ (1U << (offset & 7)));
tex = mode[0].tea + mode[1].tea + top(SIZE_B) * 2 + 17;
}
@@ -2449,9 +2506,9 @@ template <int Width> void ns32000_device<Width>::execute_run()
{
switch (size)
{
- case SIZE_B: mem_write<u8>(ST_ODT, block2, mem_read<u8>(ST_ODT, block1)); break;
- case SIZE_W: mem_write<u16>(ST_ODT, block2, mem_read<u16>(ST_ODT, block1)); break;
- case SIZE_D: mem_write<u32>(ST_ODT, block2, mem_read<u32>(ST_ODT, block1)); break;
+ case SIZE_B: mem_write<u8>(ns32000::ST_ODT, block2, mem_read<u8>(ns32000::ST_ODT, block1)); break;
+ case SIZE_W: mem_write<u16>(ns32000::ST_ODT, block2, mem_read<u16>(ns32000::ST_ODT, block1)); break;
+ case SIZE_D: mem_write<u32>(ns32000::ST_ODT, block2, mem_read<u32>(ns32000::ST_ODT, block1)); break;
default:
// can't happen
break;
@@ -2491,16 +2548,16 @@ template <int Width> void ns32000_device<Width>::execute_run()
switch (size)
{
case SIZE_B:
- int1 = s8(mem_read<u8>(ST_ODT, block1));
- int2 = s8(mem_read<u8>(ST_ODT, block2));
+ int1 = s8(mem_read<u8>(ns32000::ST_ODT, block1));
+ int2 = s8(mem_read<u8>(ns32000::ST_ODT, block2));
break;
case SIZE_W:
- int1 = s16(mem_read<u16>(ST_ODT, block1));
- int2 = s16(mem_read<u16>(ST_ODT, block2));
+ int1 = s16(mem_read<u16>(ns32000::ST_ODT, block1));
+ int2 = s16(mem_read<u16>(ns32000::ST_ODT, block2));
break;
case SIZE_D:
- int1 = s32(mem_read<u32>(ST_ODT, block1));
- int2 = s32(mem_read<u32>(ST_ODT, block2));
+ int1 = s32(mem_read<u32>(ns32000::ST_ODT, block1));
+ int2 = s32(mem_read<u32>(ns32000::ST_ODT, block2));
break;
default:
// can't happen
@@ -2587,7 +2644,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 6;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x5:
// MOVZBW src,dst
@@ -2607,7 +2664,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 5;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x6:
// MOVZiD src,dst
@@ -2626,7 +2683,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 5;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x7:
// MOVXiD src,dst
@@ -2646,7 +2703,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 6;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x8:
// MULi src,dst
@@ -2695,7 +2752,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
break;
case 0xa:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0xb:
// DEIi src,dst
@@ -2731,7 +2788,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
}
}
else
- interrupt(DVZ, m_pc);
+ interrupt(DVZ);
}
break;
case 0xc:
@@ -2756,7 +2813,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 49 + (size + 1) * 16;
}
else
- interrupt(DVZ, m_pc);
+ interrupt(DVZ);
}
break;
case 0xd:
@@ -2781,7 +2838,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 57 + (size + 1) * 16;
}
else
- interrupt(DVZ, m_pc);
+ interrupt(DVZ);
}
break;
case 0xe:
@@ -2806,7 +2863,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 54 + (size + 1) * 16;
}
else
- interrupt(DVZ, m_pc);
+ interrupt(DVZ);
}
break;
case 0xf:
@@ -2835,7 +2892,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 58 + (size + 1) * 16;
}
else
- interrupt(DVZ, m_pc);
+ interrupt(DVZ);
}
break;
}
@@ -2878,7 +2935,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
else
{
u32 const base_ea = ea(mode[0]) + (offset >> 3);
- u32 const base = mem_read<u32>(ST_ODT, base_ea);
+ u32 const base = mem_read<u32>(ns32000::ST_ODT, base_ea);
gen_write(mode[1], (base >> (offset & 7)) & mask);
@@ -2905,7 +2962,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + 7;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 2:
// INSi offset,src,base,length
@@ -2932,10 +2989,10 @@ template <int Width> void ns32000_device<Width>::execute_run()
else
{
u32 const base_ea = ea(mode[1]) + (offset >> 3);
- u32 const base = mem_read<u32>(ST_ODT, base_ea);
+ u32 const base = mem_read<u32>(ns32000::ST_ODT, base_ea);
u32 const mask = ((1U << length) - 1) << (offset & 7);
- mem_write<u32>(ST_ODT, base_ea, (base & ~mask) | ((src << (offset & 7)) & mask));
+ mem_write<u32>(ns32000::ST_ODT, base_ea, (base & ~mask) | ((src << (offset & 7)) & mask));
// TODO: tcy 29-39
tex = mode[0].tea + mode[1].tea + top(SIZE_D, base_ea) * 2 + 29;
@@ -2959,16 +3016,16 @@ template <int Width> void ns32000_device<Width>::execute_run()
switch (size)
{
case SIZE_B:
- upper = s8(mem_read<u8>(ST_ODT, bounds + 0));
- lower = s8(mem_read<u8>(ST_ODT, bounds + 1));
+ upper = s8(mem_read<u8>(ns32000::ST_ODT, bounds + 0));
+ lower = s8(mem_read<u8>(ns32000::ST_ODT, bounds + 1));
break;
case SIZE_W:
- upper = s16(mem_read<u16>(ST_ODT, bounds + 0));
- lower = s16(mem_read<u16>(ST_ODT, bounds + 2));
+ upper = s16(mem_read<u16>(ns32000::ST_ODT, bounds + 0));
+ lower = s16(mem_read<u16>(ns32000::ST_ODT, bounds + 2));
break;
case SIZE_D:
- upper = s32(mem_read<u32>(ST_ODT, bounds + 0));
- lower = s32(mem_read<u32>(ST_ODT, bounds + 4));
+ upper = s32(mem_read<u32>(ns32000::ST_ODT, bounds + 0));
+ lower = s32(mem_read<u32>(ns32000::ST_ODT, bounds + 4));
break;
default:
// can't happen
@@ -3053,9 +3110,9 @@ template <int Width> void ns32000_device<Width>::execute_run()
switch (size)
{
- case SIZE_B: mem_write<u8>(ST_ODT, ea(mode[1]), mem_read<u8>(ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
- case SIZE_W: mem_write<u16>(ST_ODT, ea(mode[1]), mem_read<u16>(ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
- case SIZE_D: mem_write<u32>(ST_ODT, ea(mode[1]), mem_read<u32>(ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
+ case SIZE_B: mem_write<u8>(ns32000::ST_ODT, ea(mode[1]), mem_read<u8>(ns32000::ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
+ case SIZE_W: mem_write<u16>(ns32000::ST_ODT, ea(mode[1]), mem_read<u16>(ns32000::ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
+ case SIZE_D: mem_write<u32>(ns32000::ST_ODT, ea(mode[1]), mem_read<u32>(ns32000::ST_ODT, ea(mode[0]), reg == 3), reg == 1); break;
default:
// can't happen
break;
@@ -3064,22 +3121,22 @@ template <int Width> void ns32000_device<Width>::execute_run()
tex = mode[0].tea + mode[1].tea + top(size) * 2 + 33;
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
break;
}
}
break;
- case 0x3e:
+ case ns32000_slave_interface::FORMAT_9:
// format 9: xxxx xyyy yyoo ofii 0011 1110
if (m_cfg & CFG_F)
{
u16 const opword = fetch<u16>(bytes);
addr_mode mode[] = { addr_mode(BIT(opword, 11, 5)), addr_mode(BIT(opword, 6, 5)) };
- size_code const size_f = BIT(opword, 0) ? SIZE_D : SIZE_Q;
+ size_code const size_f = BIT(opword, 2) ? SIZE_D : SIZE_Q;
size_code const size = size_code(opword & 3);
switch (BIT(opword, 3, 3))
@@ -3093,7 +3150,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 1:
// LFSR src
@@ -3103,7 +3160,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 2:
// MOVLF src,dst
@@ -3114,7 +3171,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 3:
// MOVFL src,dst
@@ -3125,7 +3182,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 4:
// ROUNDfi src,dst
@@ -3136,7 +3193,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 5:
// TRUNCfi src,dst
@@ -3147,17 +3204,17 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 6:
// SFSR dst
// gen
// write.D
- mode[0].write_i(size);
+ mode[1].write_i(size);
decode(mode, bytes);
- if (slave(opbyte, opword, mode[1], mode[0]))
- interrupt(SLV, m_pc);
+ if (slave(opbyte, opword, mode[0], mode[1]))
+ interrupt(SLV);
break;
case 7:
// FLOORfi src,dst
@@ -3168,17 +3225,17 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
}
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x7e: // format 10
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
- case 0xbe:
+ case ns32000_slave_interface::FORMAT_11:
// format 11: xxxx xyyy yyoo oo0f 1011 1110
if (m_cfg & CFG_F)
{
@@ -3198,7 +3255,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x1:
// MOVf src,dst
@@ -3209,7 +3266,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x2:
// CMPf src1,src2
@@ -3227,7 +3284,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
m_psr |= status & (ns32000_slave_interface::SLAVE_N | ns32000_slave_interface::SLAVE_Z | ns32000_slave_interface::SLAVE_L);
}
else
- interrupt(SLV, m_pc);
+ interrupt(SLV);
}
break;
case 0x3:
@@ -3238,7 +3295,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x4:
// SUBf src,dst
@@ -3249,7 +3306,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x5:
// NEGf src,dst
@@ -3260,7 +3317,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x8:
// DIVf src,dst
@@ -3271,7 +3328,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x9:
// Trap(SLAVE)
@@ -3281,7 +3338,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0xc:
// MULf src,dst
@@ -3292,7 +3349,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0xd:
// ABSf src,dst
@@ -3303,14 +3360,14 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
}
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
- case 0xfe:
+ case ns32000_slave_interface::FORMAT_12:
// format 12: xxxx xyyy yyoo oo0f 1111 1110
if ((m_cfg & CFG_F) && type() == NS32332)
{
@@ -3330,7 +3387,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x3:
// DOTf src,dst
@@ -3341,7 +3398,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x4:
// SCALBf src,dst
@@ -3352,7 +3409,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x5:
// LOGBf src,dst
@@ -3363,7 +3420,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x0: // REMf
case 0x8: // Trap(SLV)
@@ -3374,7 +3431,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x1: // SQRTf
case 0x9: // Trap(SLV)
@@ -3385,7 +3442,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
break;
case 0x6: // Trap(UND)
case 0x7: // Trap(UND)
@@ -3393,17 +3450,17 @@ template <int Width> void ns32000_device<Width>::execute_run()
case 0xb: // Trap(UND)
case 0xe: // Trap(UND)
case 0xf: // Trap(UND)
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
}
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
case 0x9e: // format 13
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
- case 0x1e:
+ case ns32000_slave_interface::FORMAT_14:
// format 14: xxxx xsss s0oo ooii 0001 1110
if (!(m_psr & PSR_U))
{
@@ -3435,7 +3492,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
m_psr &= ~PSR_F;
}
else
- interrupt(SLV, m_pc);
+ interrupt(SLV);
tex = mode[0].tea + top(SIZE_B) + 21;
}
@@ -3457,7 +3514,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
m_psr &= ~PSR_F;
}
else
- interrupt(SLV, m_pc);
+ interrupt(SLV);
tex = mode[0].tea + top(SIZE_B) + 21;
}
@@ -3470,7 +3527,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[0], mode[1]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
tex = mode[0].tea + top(size);
break;
@@ -3482,20 +3539,37 @@ template <int Width> void ns32000_device<Width>::execute_run()
decode(mode, bytes);
if (slave(opbyte, opword, mode[1], mode[0]))
- interrupt(SLV, m_pc);
+ interrupt(SLV);
tex = mode[0].tea + top(size);
break;
+ case 9:
+ if (type() == NS32532)
+ {
+ // CINV options,src
+ // short,gen
+ // read.D
+ mode[0].read_i(size);
+ decode(mode, bytes);
+
+ if (slave(opbyte, opword, mode[0], mode[1]))
+ interrupt(SLV);
+
+ // TODO: tex
+ }
+ else
+ interrupt(UND);
+ break;
default:
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
}
}
else
- interrupt(UND, m_pc);
+ interrupt(UND);
}
else
- interrupt(ILL, m_pc);
+ interrupt(ILL);
break;
case 0x16: // format 15.0
case 0x36: // format 15.1
@@ -3514,7 +3588,7 @@ template <int Width> void ns32000_device<Width>::execute_run()
case 0xc6:
case 0xe6:
// format 19
- interrupt(UND, m_pc);
+ interrupt(UND);
break;
}
@@ -3523,18 +3597,42 @@ template <int Width> void ns32000_device<Width>::execute_run()
// trace trap
if (m_psr & PSR_P)
- interrupt(TRC, m_pc);
+ interrupt(TRC);
m_icount -= tex;
}
+ catch (ns32000_delay const &)
+ {
+ // HACK: approximate handling /RDY by restarting the instruction;
+ // this approach can easily result in repeated incorrect memory
+ // accesses, but is sufficient to support pc532 SCSI pseudo-DMA.
+
+ // restore state
+ SP() = m_ssp;
+ m_psr = m_sps;
+
+ // burn a cycle
+ m_icount -= 1;
+ }
catch (ns32000_abort const &)
{
- interrupt(ABT, m_pc);
+ try
+ {
+ interrupt(ABT);
+ }
+ catch (ns32000_abort const &)
+ {
+ // this shouldn't happen; probably indicates supervisor stack overflow (stuck interrupt?)
+ if (machine().debug_enabled())
+ machine().debug_break();
+ else
+ fatalerror("abort during abort entry 0x%08x\n", m_pc);
+ }
}
}
}
-template <int Width> void ns32000_device<Width>::execute_set_input(int inputnum, int state)
+template <int HighBits, int Width> void ns32000_device<HighBits, Width>::execute_set_input(int inputnum, int state)
{
if (state)
m_wait = false;
@@ -3553,39 +3651,39 @@ template <int Width> void ns32000_device<Width>::execute_set_input(int inputnum,
}
}
-template <int Width> device_memory_interface::space_config_vector ns32000_device<Width>::memory_space_config() const
+template <int HighBits, int Width> device_memory_interface::space_config_vector ns32000_device<HighBits, Width>::memory_space_config() const
{
return space_config_vector{
std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(ST_IAM, &m_iam_config),
- std::make_pair(ST_IAC, &m_iac_config),
- std::make_pair(ST_EIM, &m_eim_config),
- std::make_pair(ST_EIC, &m_eic_config),
- std::make_pair(ST_SIF, &m_sif_config),
- std::make_pair(ST_NIF, &m_nif_config),
- std::make_pair(ST_ODT, &m_odt_config),
- std::make_pair(ST_RMW, &m_rmw_config),
- std::make_pair(ST_EAR, &m_ear_config),
+ std::make_pair(ns32000::ST_IAM, &m_iam_config),
+ std::make_pair(ns32000::ST_IAC, &m_iac_config),
+ std::make_pair(ns32000::ST_EIM, &m_eim_config),
+ std::make_pair(ns32000::ST_EIC, &m_eic_config),
+ std::make_pair(ns32000::ST_SIF, &m_sif_config),
+ std::make_pair(ns32000::ST_NIF, &m_nif_config),
+ std::make_pair(ns32000::ST_ODT, &m_odt_config),
+ std::make_pair(ns32000::ST_RMW, &m_rmw_config),
+ std::make_pair(ns32000::ST_EAR, &m_ear_config),
};
}
-template <int Width> bool ns32000_device<Width>::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
+template <int HighBits, int Width> bool ns32000_device<HighBits, Width>::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
{
target_space = &space(spacenum);
return !m_mmu || m_mmu->translate(space(spacenum), spacenum, address, m_psr & PSR_U, intention == TR_WRITE, false, true) == ns32000_mmu_interface::COMPLETE;
}
-template <int Width> std::unique_ptr<util::disasm_interface> ns32000_device<Width>::create_disassembler()
+template <int HighBits, int Width> std::unique_ptr<util::disasm_interface> ns32000_device<HighBits, Width>::create_disassembler()
{
return std::make_unique<ns32000_disassembler>();
}
-template <int Width> u16 ns32000_device<Width>::slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
+template <int HighBits, int Width> u16 ns32000_device<HighBits, Width>::slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
{
switch (opbyte)
{
- case 0x1e:
+ case ns32000_slave_interface::FORMAT_14:
if (!m_mmu)
fatalerror("slave mmu coprocessor not configured (%s)\n", machine().describe_context());
@@ -3595,9 +3693,9 @@ template <int Width> u16 ns32000_device<Width>::slave(u8 opbyte, u16 opword, add
return slave_slow(dynamic_cast<ns32000_slow_slave_interface &>(*m_mmu), opbyte, opword, op1, op2);
break;
- case 0x3e:
- case 0xbe:
- case 0xfe:
+ case ns32000_slave_interface::FORMAT_9:
+ case ns32000_slave_interface::FORMAT_11:
+ case ns32000_slave_interface::FORMAT_12:
if (!m_fpu)
fatalerror("slave fpu coprocessor not configured (%s)\n", machine().describe_context());
@@ -3613,10 +3711,10 @@ template <int Width> u16 ns32000_device<Width>::slave(u8 opbyte, u16 opword, add
}
}
-template <int Width> u16 ns32000_device<Width>::slave_slow(ns32000_slow_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
+template <int HighBits, int Width> u16 ns32000_device<HighBits, Width>::slave_slow(ns32000_slow_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
{
- slave.write_id(opbyte);
- slave.write_op(swapendian_int16(opword));
+ slave.slow_write(opbyte);
+ slave.slow_write(swapendian_int16(opword));
if ((op1.access == READ || op1.access == RMW) && !(op1.type == REG && op1.slave))
{
@@ -3625,20 +3723,20 @@ template <int Width> u16 ns32000_device<Width>::slave_slow(ns32000_slow_slave_in
switch (op1.size)
{
case SIZE_B:
- slave.write_op(u8(data));
+ slave.slow_write(u8(data));
break;
case SIZE_W:
- slave.write_op(u16(data));
+ slave.slow_write(u16(data));
break;
case SIZE_D:
- slave.write_op(u16(data >> 0));
- slave.write_op(u16(data >> 16));
+ slave.slow_write(u16(data >> 0));
+ slave.slow_write(u16(data >> 16));
break;
case SIZE_Q:
- slave.write_op(u16(data >> 0));
- slave.write_op(u16(data >> 16));
- slave.write_op(u16(data >> 32));
- slave.write_op(u16(data >> 48));
+ slave.slow_write(u16(data >> 0));
+ slave.slow_write(u16(data >> 16));
+ slave.slow_write(u16(data >> 32));
+ slave.slow_write(u16(data >> 48));
break;
}
}
@@ -3646,11 +3744,11 @@ template <int Width> u16 ns32000_device<Width>::slave_slow(ns32000_slow_slave_in
{
u32 const data = ea(op1);
- slave.write_op(u16(data >> 0));
- slave.write_op(u16(data >> 16));
+ slave.slow_write(u16(data >> 0));
+ slave.slow_write(u16(data >> 16));
// single-byte memory read cycle
- mem_read<u8>(ST_ODT, data, true);
+ mem_read<u8>(ns32000::ST_ODT, data, true);
}
if ((op2.access == READ || op2.access == RMW) && !(op2.type == REG && op2.slave))
@@ -3660,41 +3758,41 @@ template <int Width> u16 ns32000_device<Width>::slave_slow(ns32000_slow_slave_in
switch (op2.size)
{
case SIZE_B:
- slave.write_op(u8(data));
+ slave.slow_write(u8(data));
break;
case SIZE_W:
- slave.write_op(u16(data));
+ slave.slow_write(u16(data));
break;
case SIZE_D:
- slave.write_op(u16(data >> 0));
- slave.write_op(u16(data >> 16));
+ slave.slow_write(u16(data >> 0));
+ slave.slow_write(u16(data >> 16));
break;
case SIZE_Q:
- slave.write_op(u16(data >> 0));
- slave.write_op(u16(data >> 16));
- slave.write_op(u16(data >> 32));
- slave.write_op(u16(data >> 48));
+ slave.slow_write(u16(data >> 0));
+ slave.slow_write(u16(data >> 16));
+ slave.slow_write(u16(data >> 32));
+ slave.slow_write(u16(data >> 48));
break;
}
}
- u16 const status = slave.read_st(&m_icount);
+ u16 const status = slave.slow_status(&m_icount);
if (!(status & ns32000_slave_interface::SLAVE_Q))
{
if ((op2.access == WRITE || op2.access == RMW) && !(op2.type == REG && op2.slave))
{
- u64 data = slave.read_op();
+ u64 data = slave.slow_read();
switch (op2.size)
{
case SIZE_D:
- data |= u64(slave.read_op()) << 16;
+ data |= u64(slave.slow_read()) << 16;
break;
case SIZE_Q:
- data |= u64(slave.read_op()) << 16;
- data |= u64(slave.read_op()) << 32;
- data |= u64(slave.read_op()) << 48;
+ data |= u64(slave.slow_read()) << 16;
+ data |= u64(slave.slow_read()) << 32;
+ data |= u64(slave.slow_read()) << 48;
break;
default:
break;
@@ -3707,9 +3805,9 @@ template <int Width> u16 ns32000_device<Width>::slave_slow(ns32000_slow_slave_in
return status;
}
-template <int Width> u16 ns32000_device<Width>::slave_fast(ns32000_fast_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
+template <int HighBits, int Width> u16 ns32000_device<HighBits, Width>::slave_fast(ns32000_fast_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
{
- slave.write(u32(opbyte) << 24 | u32(swapendian_int16(opword)) << 8);
+ slave.fast_write(u32(opbyte) << 24 | u32(swapendian_int16(opword)) << 8);
if ((op1.access == READ || op1.access == RMW) && !(op1.type == REG && op1.slave))
{
@@ -3718,17 +3816,17 @@ template <int Width> u16 ns32000_device<Width>::slave_fast(ns32000_fast_slave_in
switch (op1.size)
{
case SIZE_B:
- slave.write(u8(data));
+ slave.fast_write(u8(data));
break;
case SIZE_W:
- slave.write(u16(data));
+ slave.fast_write(u16(data));
break;
case SIZE_D:
- slave.write(u32(data));
+ slave.fast_write(u32(data));
break;
case SIZE_Q:
- slave.write(u32(data >> 0));
- slave.write(u32(data >> 32));
+ slave.fast_write(u32(data >> 0));
+ slave.fast_write(u32(data >> 32));
break;
}
}
@@ -3736,10 +3834,10 @@ template <int Width> u16 ns32000_device<Width>::slave_fast(ns32000_fast_slave_in
{
u32 const data = ea(op1);
- slave.write(u32(data));
+ slave.fast_write(u32(data));
// single-byte memory read cycle
- mem_read<u8>(ST_ODT, data, true);
+ mem_read<u8>(ns32000::ST_ODT, data, true);
}
if ((op2.access == READ || op2.access == RMW) && !(op2.type == REG && op2.slave))
@@ -3749,32 +3847,32 @@ template <int Width> u16 ns32000_device<Width>::slave_fast(ns32000_fast_slave_in
switch (op2.size)
{
case SIZE_B:
- slave.write(u8(data));
+ slave.fast_write(u8(data));
break;
case SIZE_W:
- slave.write(u16(data));
+ slave.fast_write(u16(data));
break;
case SIZE_D:
- slave.write(u32(data));
+ slave.fast_write(u32(data));
break;
case SIZE_Q:
- slave.write(u32(data >> 0));
- slave.write(u32(data >> 32));
+ slave.fast_write(u32(data >> 0));
+ slave.fast_write(u32(data >> 32));
break;
}
}
// TODO: status is optional in fast protocol
- u32 const status = slave.read_st(&m_icount);
+ u32 const status = slave.fast_status(&m_icount);
if (!(status & ns32000_slave_interface::SLAVE_Q))
{
if ((op2.access == WRITE || op2.access == RMW) && !(op2.type == REG && op2.slave))
{
- u64 data = slave.read();
+ u64 data = slave.fast_read();
if (op2.size == SIZE_Q)
- data |= u64(slave.read()) << 32;
+ data |= u64(slave.fast_read()) << 32;
gen_write(op2, data);
}
@@ -3782,3 +3880,376 @@ template <int Width> u16 ns32000_device<Width>::slave_fast(ns32000_fast_slave_in
return status;
}
+
+void ns32532_device::device_add_mconfig(machine_config &config)
+{
+ set_mmu(*this);
+}
+
+void ns32532_device::device_reset()
+{
+ // TODO: pc and psr are saved in r0/r1 at reset
+ //m_r[0] = m_pc;
+ //m_r[1] = m_psr;
+
+ ns32000_device<32, 2>::device_reset();
+
+ m_cfg = CFG_P | CFG_FC | CFG_FM | CFG_FF;
+ m_mcr = 0;
+ m_msr = 0;
+ m_dcr = 0;
+}
+
+device_memory_interface::space_config_vector ns32532_device::memory_space_config() const
+{
+ auto vector = ns32000_device<32, 2>::memory_space_config();
+
+ vector.push_back(std::make_pair(ns32000::ST_PT1, &m_pt1_config));
+ vector.push_back(std::make_pair(ns32000::ST_PT2, &m_pt2_config));
+
+ return vector;
+}
+
+void ns32532_device::state_add(device_state_interface &parent, int &index)
+{
+ save_item(NAME(m_ptb));
+ save_item(NAME(m_tear));
+ save_item(NAME(m_mcr));
+ save_item(NAME(m_msr));
+
+ save_item(NAME(m_dcr));
+ save_item(NAME(m_dsr));
+ save_item(NAME(m_car));
+ save_item(NAME(m_bpc));
+
+ parent.state_add(index++, "PTB0", m_ptb[0]);
+ parent.state_add(index++, "PTB1", m_ptb[1]);
+ parent.state_add(index++, "TEAR", m_tear);
+ parent.state_add(index++, "MCR", m_mcr);
+ parent.state_add(index++, "MSR", m_msr);
+
+ parent.state_add(index++, "DCR", m_dcr);
+ parent.state_add(index++, "DSR", m_dsr);
+ parent.state_add(index++, "CAR", m_car);
+ parent.state_add(index++, "BPC", m_bpc);
+}
+
+static constexpr u32 MSR(unsigned st, bool user, bool write, unsigned tex)
+{
+ enum msr_mask : u32
+ {
+ MSR_TEX = 0x0003, // translation exception
+ MSR_DDT = 0x0004, // data direction (1=write)
+ MSR_UST = 0x0008, // user/supervisor (1=user)
+ MSR_STT = 0x00f0, // cpu status
+ };
+
+ return u32(((st << 4) & MSR_STT) | (user ? MSR_UST : 0) | (write ? MSR_DDT : 0) | (tex & MSR_TEX));
+}
+
+ns32000_mmu_interface::translate_result ns32532_device::translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool rdwrval, bool suppress)
+{
+ enum mcr_mask : u32
+ {
+ MCR_TU = 0x0001, // translate user-mode addresses
+ MCR_TS = 0x0002, // translate supervisor-mode addresses
+ MCR_DS = 0x0004, // dual-space translation
+ MCR_AO = 0x0008, // access level override
+ };
+
+ enum msr_tex_mask : u32
+ {
+ TEX_PTE1 = 0x1,
+ TEX_PTE2 = 0x2,
+ TEX_PROT = 0x3,
+ };
+
+ enum pte_mask : u32
+ {
+ PTE_V = 0x0000'0001, // valid
+ PTE_PL = 0x0000'0006, // protection level
+ PTE_CI = 0x0000'0020, // cache inhibit
+ PTE_R = 0x0000'0040, // referenced
+ PTE_M = 0x0000'0080, // modified
+ PTE_PFN = 0xffff'f000, // page frame number
+ };
+
+ enum pte_pl_mask : u32
+ {
+ PL_SRO = 0x00000000, // supervisor read only
+ PL_SRW = 0x00000002, // supervisor read write
+ PL_URO = 0x00000004, // user read only
+ PL_URW = 0x00000006, // user read write
+ };
+
+ // check translation required
+ if ((!user && !(m_mcr & MCR_TS)) || (user && !(m_mcr & MCR_TU)))
+ return COMPLETE;
+
+ // TODO: translation look-aside buffer
+
+ bool const address_space = (m_mcr & MCR_DS) && user;
+ unsigned const access_level = (user && !(m_mcr & MCR_AO))
+ ? ((write || st == ns32000::ST_RMW) ? PL_URW : PL_URO)
+ : ((write || st == ns32000::ST_RMW) ? PL_SRW : PL_SRO);
+
+ LOGMASKED(LOG_TRANSLATE, "translate address_space %d access_level %d page table 0x%08x address 0x%08x\n",
+ address_space, access_level, m_ptb[address_space], address);
+
+ // read level 1 page table entry
+ u32 const pte1_address = m_ptb[address_space] | (BIT(address, 22, 10) * 4);
+ u32 const pte1 = m_bus[ns32000::ST_PT1].read_dword(pte1_address);
+ LOGMASKED(LOG_TRANSLATE, "translate level 1 page table address 0x%08x entry 0x%08x\n", pte1_address, pte1);
+
+ // access check
+ if ((pte1 & PTE_PL) < access_level)
+ {
+ if (!suppress)
+ {
+ m_msr = MSR(st, user, write, TEX_PROT);
+ m_tear = address;
+
+ LOGMASKED(LOG_TRANSLATE, "translate level 1 protection exception\n");
+
+ return ABORT;
+ }
+ else
+ return CANCEL;
+ }
+ if (!(pte1 & PTE_V))
+ {
+ if (!suppress)
+ {
+ m_msr = MSR(st, user, write, TEX_PTE1);
+ m_tear = address;
+
+ LOGMASKED(LOG_TRANSLATE, "translate level 1 invalid\n");
+ }
+
+ return ABORT;
+ }
+
+ // set referenced
+ if (!(pte1 & PTE_R) && !suppress)
+ m_bus[ns32000::ST_PT1].write_byte(pte1_address, pte1 | PTE_R);
+
+ // read level 2 page table entry
+ u32 const pte2_address = (pte1 & PTE_PFN) | (BIT(address, 12, 10) * 4);
+ u32 const pte2 = m_bus[ns32000::ST_PT2].read_dword(pte2_address);
+ LOGMASKED(LOG_TRANSLATE, "translate level 2 page table address 0x%08x entry 0x%08x\n", pte2_address, pte2);
+
+ // access check
+ if ((pte2 & PTE_PL) < access_level)
+ {
+ if (!suppress)
+ {
+ m_msr = MSR(st, user, write, TEX_PROT);
+ m_tear = address;
+
+ LOGMASKED(LOG_TRANSLATE, "translate level 2 protection exception\n");
+
+ return ABORT;
+ }
+ else
+ return CANCEL;
+ }
+ if (!(pte2 & PTE_V))
+ {
+ if (!suppress)
+ {
+ m_msr = MSR(st, user, write, TEX_PTE2);
+ m_tear = address;
+
+ LOGMASKED(LOG_TRANSLATE, "translate level 2 invalid\n");
+
+ return ABORT;
+ }
+ else
+ return rdwrval ? COMPLETE : CANCEL;
+ }
+
+ // set modified and referenced
+ if ((!(pte2 & PTE_R) || ((write || st == ns32000::ST_RMW) && !(pte2 & PTE_M))) && !suppress)
+ m_bus[ns32000::ST_PT2].write_dword(pte2_address, pte2 | ((write || st == ns32000::ST_RMW) ? PTE_M : 0) | PTE_R);
+
+ address = (pte2 & PTE_PFN) | BIT(address, 0, 12);
+ LOGMASKED(LOG_TRANSLATE, "translate complete 0x%08x\n", address);
+
+ return COMPLETE;
+}
+
+void ns32532_device::lpr(unsigned reg, addr_mode const mode, bool user, unsigned &tex)
+{
+ switch (reg)
+ {
+ case 0x1:
+ if (!user)
+ m_dcr = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0x2:
+ if (!user)
+ m_bpc = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0x3:
+ if (!user)
+ m_dsr = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0x4:
+ if (!user)
+ m_car = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0xb:
+ if (!user)
+ SP(true) = gen_read(mode);
+ else
+ interrupt(ILL);
+ break;
+ case 0xc:
+ if (!user)
+ m_cfg = gen_read(mode) | (CFG_P | CFG_FC | CFG_FM | CFG_FF);
+ else
+ interrupt(ILL);
+ break;
+
+ default:
+ ns32000_device<32, 2>::lpr(reg, mode, user, tex);
+ return;
+ }
+
+ // TODO: tcy 19-33
+ tex = mode.tea + 19;
+}
+
+void ns32532_device::spr(unsigned reg, addr_mode const mode, bool user, unsigned &tex)
+{
+ switch (reg)
+ {
+ case 0x1:
+ if (!user)
+ gen_write(mode, m_dcr);
+ else
+ interrupt(ILL);
+ break;
+ case 0x2:
+ if (!user)
+ gen_write(mode, m_bpc);
+ else
+ interrupt(ILL);
+ break;
+ case 0x3:
+ if (!user)
+ gen_write(mode, m_dsr);
+ else
+ interrupt(ILL);
+ break;
+ case 0x4:
+ if (!user)
+ gen_write(mode, m_car);
+ else
+ interrupt(ILL);
+ break;
+ case 0xb:
+ if (!user)
+ gen_write(mode, SP(true));
+ else
+ interrupt(ILL);
+ break;
+ case 0xc:
+ if (!user)
+ gen_write(mode, m_cfg);
+ else
+ interrupt(ILL);
+ break;
+
+ default:
+ ns32000_device<32, 2>::spr(reg, mode, user, tex);
+ return;
+ }
+
+ // TODO: tcy 21-27
+ tex = mode.tea + 21;
+}
+
+
+u16 ns32532_device::slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2)
+{
+ if (opbyte == FORMAT_14)
+ {
+ switch (BIT(opword, 2, 4))
+ {
+ case 0: // rdval
+ case 1: // wrval
+ {
+ u32 address = ea(op1);
+
+ switch (translate(space(AS_PROGRAM), ns32000::ST_ODT, address, true, BIT(opword, 2), true, true))
+ {
+ case CANCEL:
+ return ns32000_slave_interface::SLAVE_F;
+
+ case ABORT:
+ interrupt(ABT);
+ break;
+
+ default:
+ break;
+ }
+ }
+ break;
+
+ case 2: // lmr
+ switch (BIT(opword, 7, 4))
+ {
+ case 0x8: break;
+ case 0x9: m_mcr = gen_read(op1); break;
+ case 0xa: m_msr = gen_read(op1); break;
+ case 0xb: m_tear = gen_read(op1); break;
+ case 0xc: m_ptb[0] = gen_read(op1) & ~0xfffU; break; // TODO: invalidate TLB
+ case 0xd: m_ptb[1] = gen_read(op1) & ~0xfffU; break; // TODO: invalidate TLB
+ case 0xe: gen_read(op1); break; // ivar0
+ case 0xf: gen_read(op1); break; // ivar1
+ default:
+ interrupt(UND);
+ break;
+ }
+ break;
+
+ case 3: // smr
+ switch (BIT(opword, 7, 4))
+ {
+ case 0x8: break;
+ case 0x9: gen_write(op2, m_mcr); break;
+ case 0xa: gen_write(op2, m_msr); break;
+ case 0xb: gen_write(op2, m_tear); break;
+ case 0xc: gen_write(op2, m_ptb[0]); break;
+ case 0xd: gen_write(op2, m_ptb[1]); break;
+ case 0xe: break;
+ case 0xf: break;
+ default:
+ interrupt(UND);
+ break;
+ }
+ break;
+
+ case 9: // cinv
+ // TODO: invalidate cache
+ break;
+
+ default:
+ interrupt(UND);
+ break;
+ }
+ }
+ else
+ return ns32000_device<32, 2>::slave(opbyte, opword, op1, op2);
+
+ return ns32000_slave_interface::SLAVE_OK;
+}
diff --git a/src/devices/cpu/ns32000/ns32000.h b/src/devices/cpu/ns32000/ns32000.h
index 763751700ff..24c46f788d1 100644
--- a/src/devices/cpu/ns32000/ns32000.h
+++ b/src/devices/cpu/ns32000/ns32000.h
@@ -6,41 +6,39 @@
#pragma once
-#include "slave.h"
+#include "common.h"
-template <int Width>
+template <int HighBits, int Width>
class ns32000_device : public cpu_device
{
public:
template <typename T> void set_fpu(T &&tag) { m_fpu.set_tag(std::forward<T>(tag)); }
template <typename T> void set_mmu(T &&tag) { m_mmu.set_tag(std::forward<T>(tag)); }
- // construction/destruction
- ns32000_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock);
+ void rdy_w(int state) { m_ready = !state; }
protected:
- ns32000_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock, int databits, int addrbits);
+ ns32000_device(machine_config const &mconfig, device_type type, char const *tag, device_t *owner, u32 clock);
- // device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 6; }
- virtual u32 execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_string_export(device_state_entry const &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
enum addr_mode_type : unsigned
@@ -133,16 +131,27 @@ protected:
s64 gen_read_sx(addr_mode mode);
void gen_write(addr_mode mode, u64 data);
+ // register helpers
+ u32 &SP();
+ u32 &SP(bool user);
+ virtual u32 const PSR_MSK() { return 0x0fe7; }
+
// other execution helpers
bool condition(unsigned const cc);
void flags(u32 const src1, u32 const src2, u32 const dest, unsigned const size, bool const subtraction);
- void interrupt(unsigned const type, u32 const return_address);
+ void interrupt(unsigned const type);
+ virtual void lpr(unsigned reg, addr_mode const mode, bool user, unsigned &tex);
+ virtual void spr(unsigned reg, addr_mode const mode, bool user, unsigned &tex);
// slave protocol helpers
- u16 slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2);
+ virtual u16 slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2);
u16 slave_slow(ns32000_slow_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2);
u16 slave_fast(ns32000_fast_slave_interface &slave, u8 opbyte, u16 opword, addr_mode op1, addr_mode op2);
+ u32 m_cfg; // configuration register
+
+ typename memory_access<HighBits, Width, 0, ENDIANNESS_LITTLE>::specific m_bus[16];
+
private:
u32 const m_address_mask;
@@ -158,14 +167,12 @@ private:
address_space_config m_rmw_config;
address_space_config m_ear_config;
- optional_device<ns32000_slave_interface> m_fpu;
+ optional_device<ns32000_fpu_interface> m_fpu;
optional_device<ns32000_mmu_interface> m_mmu;
// emulation state
int m_icount;
- typename memory_access<24, Width, 0, ENDIANNESS_LITTLE>::specific m_bus[16];
-
u32 m_ssp; // saved stack pointer
u16 m_sps; // saved program status
@@ -177,44 +184,85 @@ private:
u32 m_intbase; // interrupt base
u16 m_psr; // processor status
u16 m_mod; // module
- u8 m_cfg; // configuration
u32 m_r[8];
- u32 m_f[8];
bool m_nmi_line;
bool m_int_line;
bool m_wait;
bool m_sequential;
+ bool m_ready;
};
-class ns32008_device : public ns32000_device<0>
+class ns32008_device : public ns32000_device<24, 0>
{
public:
ns32008_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
};
-class ns32016_device : public ns32000_device<1>
+class ns32016_device : public ns32000_device<24, 1>
{
public:
ns32016_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
};
-class ns32032_device : public ns32000_device<2>
+class ns32032_device : public ns32000_device<24, 2>
{
public:
ns32032_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
};
-class ns32332_device : public ns32000_device<2>
+class ns32332_device : public ns32000_device<32, 2>
{
public:
ns32332_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
};
+class ns32532_device
+ : public ns32000_device<32, 2>
+ , public ns32000_mmu_interface
+{
+public:
+ ns32532_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+
+ // ns32000_mmu_interface implementation
+ virtual void state_add(device_state_interface &parent, int &index) override;
+ virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool rdwrval = false, bool suppress = false) override;
+
+protected:
+ // device_t implementation
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_memory_interface implementation
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual u32 const PSR_MSK() override { return 0x0ff7; }
+ virtual void lpr(unsigned reg, addr_mode const mode, bool user, unsigned &tex) override;
+ virtual void spr(unsigned reg, addr_mode const mode, bool user, unsigned &tex) override;
+ virtual u16 slave(u8 opbyte, u16 opword, addr_mode op1, addr_mode op2) override;
+
+private:
+ address_space_config m_pt1_config;
+ address_space_config m_pt2_config;
+
+ // memory management registers
+ u32 m_ptb[2]; // page table base pointer
+ u32 m_tear; // translation exception address
+ u32 m_mcr; // memory management control
+ u32 m_msr; // memory management status
+
+ // debug registers
+ u32 m_dcr; // debug condition
+ u32 m_dsr; // debug status
+ u32 m_car; // compare address
+ u32 m_bpc; // breakpoint program counter
+};
+
DECLARE_DEVICE_TYPE(NS32008, ns32008_device)
DECLARE_DEVICE_TYPE(NS32016, ns32016_device)
DECLARE_DEVICE_TYPE(NS32032, ns32032_device)
DECLARE_DEVICE_TYPE(NS32332, ns32332_device)
+DECLARE_DEVICE_TYPE(NS32532, ns32532_device)
#endif // MAME_CPU_NS32000_NS32000_H
diff --git a/src/devices/cpu/ns32000/ns32000dasm.cpp b/src/devices/cpu/ns32000/ns32000d.cpp
index d269a27b7ef..170e2c7ae88 100644
--- a/src/devices/cpu/ns32000/ns32000dasm.cpp
+++ b/src/devices/cpu/ns32000/ns32000d.cpp
@@ -3,7 +3,7 @@
#include "emu.h"
-#include "ns32000dasm.h"
+#include "ns32000d.h"
char const *const cond_code[] = { "EQ", "NE", "CS", "CC", "HI", "LS", "GT", "LE", "FS", "FC", "LO", "HS", "LT", "GE", "R", "N" };
char const size_char[] = { 'B','W',' ','D' };
@@ -21,19 +21,19 @@ s32 ns32000_disassembler::displacement(offs_t pc, data_buffer const &opcodes, un
u32 const byte2 = opcodes.r8(pc + bytes++);
u32 const byte3 = opcodes.r8(pc + bytes++);
- return (s32((byte0 << 24) | (byte1 << 16) | (byte2 << 8) | byte3) << 2) >> 2;
+ return util::sext((byte0 << 24) | (byte1 << 16) | (byte2 << 8) | byte3, 30);
}
else
{
// word displacement
u8 const byte1 = opcodes.r8(pc + bytes++);
- return s16(((byte0 << 8) | byte1) << 2) >> 2;
+ return util::sext((byte0 << 8) | byte1, 14);
}
}
else
// byte displacement
- return s8(byte0 << 1) >> 1;
+ return util::sext(byte0, 7);
}
std::string ns32000_disassembler::displacement_string(offs_t pc, data_buffer const &opcodes, unsigned &bytes, std::string const zero)
@@ -461,7 +461,7 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
u16 const opword = opcodes.r16(pc + bytes); bytes += 2;
addr_mode mode[] = { addr_mode(BIT(opword, 11, 5)), addr_mode(BIT(opword, 6, 5)) };
- size_code const size_f = BIT(opword, 0) ? SIZE_D : SIZE_Q;
+ size_code const size_f = BIT(opword, 2) ? SIZE_D : SIZE_Q;
size_code const size = size_code(opword & 3);
switch (BIT(opword, 3, 3))
@@ -473,7 +473,7 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
mode[0].size_i(size);
mode[1].size_f(size_f);
decode(mode, pc, opcodes, bytes);
- util::stream_format(stream, "MOV%c%c %s, %s", size_char[size], BIT(opword, 0) ? 'F' : 'L', mode[0].mode, mode[1].mode);
+ util::stream_format(stream, "MOV%c%c %s, %s", size_char[size], BIT(opword, 2) ? 'F' : 'L', mode[0].mode, mode[1].mode);
break;
case 1:
// LFSR src
@@ -508,7 +508,7 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
mode[0].size_f(size_f);
mode[1].size_i(size);
decode(mode, pc, opcodes, bytes);
- util::stream_format(stream, "ROUND%c%c %s, %s", BIT(opword, 0) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
+ util::stream_format(stream, "ROUND%c%c %s, %s", BIT(opword, 2) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
break;
case 5:
// TRUNCfi src,dst
@@ -517,15 +517,15 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
mode[0].size_f(size_f);
mode[1].size_i(size);
decode(mode, pc, opcodes, bytes);
- util::stream_format(stream, "TRUNC%c%c %s, %s", BIT(opword, 0) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
+ util::stream_format(stream, "TRUNC%c%c %s, %s", BIT(opword, 2) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
break;
case 6:
// SFSR dst
// gen
// write.D
- mode[0].size_i(size);
+ mode[1].size_i(size);
decode(mode, pc, opcodes, bytes);
- util::stream_format(stream, "SFSR %s", mode[0].mode);
+ util::stream_format(stream, "SFSR %s", mode[1].mode);
break;
case 7:
// FLOORfi src,dst
@@ -534,7 +534,7 @@ offs_t ns32000_disassembler::disassemble(std::ostream &stream, offs_t pc, data_b
mode[0].size_f(size_f);
mode[1].size_i(size);
decode(mode, pc, opcodes, bytes);
- util::stream_format(stream, "FLOOR%c%c %s, %s", BIT(opword, 0) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
+ util::stream_format(stream, "FLOOR%c%c %s, %s", BIT(opword, 2) ? 'F' : 'L', size_char[size], mode[0].mode, mode[1].mode);
break;
}
}
diff --git a/src/devices/cpu/ns32000/ns32000dasm.h b/src/devices/cpu/ns32000/ns32000d.h
index 7b29504cb88..299c22bf04d 100644
--- a/src/devices/cpu/ns32000/ns32000dasm.h
+++ b/src/devices/cpu/ns32000/ns32000d.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Patrick Mackinlay
-#ifndef MAME_CPU_NS32000_NS32000DASM_H
-#define MAME_CPU_NS32000_NS32000DASM_H
+#ifndef MAME_CPU_NS32000_NS32000D_H
+#define MAME_CPU_NS32000_NS32000D_H
#pragma once
@@ -49,4 +49,4 @@ protected:
std::string config(u8 imm);
};
-#endif // MAME_CPU_NS32000_NS32000DASM_H
+#endif // MAME_CPU_NS32000_NS32000D_H
diff --git a/src/devices/cpu/ns32000/slave.h b/src/devices/cpu/ns32000/slave.h
deleted file mode 100644
index 576689f2c04..00000000000
--- a/src/devices/cpu/ns32000/slave.h
+++ /dev/null
@@ -1,83 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Patrick Mackinlay
-
-#ifndef MAME_CPU_NS32000_SLAVE_H
-#define MAME_CPU_NS32000_SLAVE_H
-
-#pragma once
-
-class ns32000_slave_interface : public device_interface
-{
-public:
- auto out_scb() { return m_out_scb.bind(); }
-
- ns32000_slave_interface(machine_config const &mconfig, device_t &device)
- : device_interface(device, "ns32000_slave")
- , m_out_scb(*this)
- {
- }
-
- enum slave_status : u16
- {
- SLAVE_Q = 0x0001,
- SLAVE_L = 0x0004,
- SLAVE_F = 0x0020,
- SLAVE_Z = 0x0040,
- SLAVE_N = 0x0080,
- };
-
- virtual void state_add(device_state_interface &parent, int &index) = 0;
-
-protected:
- ns32000_slave_interface(machine_config const &mconfig, device_t &device, char const *type)
- : device_interface(device, type)
- , m_out_scb(*this)
- {
- }
-
- devcb_write_line m_out_scb;
-};
-
-class ns32000_mmu_interface : public ns32000_slave_interface
-{
-public:
- enum translate_result : unsigned { COMPLETE, CANCEL, ABORT };
- virtual translate_result translate(address_space &space, unsigned st, u32 &address, bool user, bool write, bool pfs = false, bool debug = false) = 0;
-
-protected:
- ns32000_mmu_interface(machine_config const &mconfig, device_t &device)
- : ns32000_slave_interface(mconfig, device)
- {
- }
-};
-
-class ns32000_slow_slave_interface : public ns32000_slave_interface
-{
-public:
- virtual void write_id(u16 data) = 0;
- virtual void write_op(u16 data) = 0;
- virtual u16 read_st(int *icount = nullptr) = 0;
- virtual u16 read_op() = 0;
-
-protected:
- ns32000_slow_slave_interface(machine_config const &mconfig, device_t &device)
- : ns32000_slave_interface(mconfig, device)
- {
- }
-};
-
-class ns32000_fast_slave_interface : public ns32000_slave_interface
-{
-public:
- virtual u32 read_st(int *icount = nullptr) = 0;
- virtual u32 read() = 0;
- virtual void write(u32 data) = 0;
-
-protected:
- ns32000_fast_slave_interface(machine_config const &mconfig, device_t &device)
- : ns32000_slave_interface(mconfig, device)
- {
- }
-};
-
-#endif // MAME_CPU_NS32000_SLAVE_H
diff --git a/src/devices/cpu/nuon/nuon.h b/src/devices/cpu/nuon/nuon.h
index f3a7311e985..f0d0c11ac04 100644
--- a/src/devices/cpu/nuon/nuon.h
+++ b/src/devices/cpu/nuon/nuon.h
@@ -24,13 +24,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/olms66k/msm665xx.cpp b/src/devices/cpu/olms66k/msm665xx.cpp
new file mode 100644
index 00000000000..1ac4fa02abf
--- /dev/null
+++ b/src/devices/cpu/olms66k/msm665xx.cpp
@@ -0,0 +1,3278 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/****************************************************************************
+
+ Oki MSM665xx 16-bit microcontroller family (nX-8/500S core)
+
+****************************************************************************/
+
+#include "emu.h"
+#include "msm665xx.h"
+#include "nx8dasm.h"
+
+// device type definition
+DEFINE_DEVICE_TYPE(MSM66573, msm66573_device, "msm66573", "Oki MSM66573")
+
+ALLOW_SAVE_TYPE(msm665xx_device::inst_state)
+
+
+msm665xx_device::msm665xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor data_map)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0, mem_map)
+ , m_data_config("data", ENDIANNESS_LITTLE, 16, 20, 0, data_map)
+ , m_acc(0)
+ , m_pc(0)
+ , m_ppc(0)
+ , m_psw(0)
+ , m_lrb(0)
+ , m_ssp(0)
+ , m_csr(0)
+ , m_dsr(0)
+ , m_tsr(0)
+ , m_romwin(0x30)
+ , m_memscon(0)
+ , m_inst(0)
+ , m_fetch_byte(0)
+ , m_adr(0)
+ , m_seg(0)
+ , m_tmp{0, 0}
+ , m_icount(0)
+{
+}
+
+device_memory_interface::space_config_vector msm665xx_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config)
+ };
+}
+
+std::unique_ptr<util::disasm_interface> msm665xx_device::create_disassembler()
+{
+ return std::make_unique<nx8_500s_disassembler>(m_psw);
+}
+
+
+msm66573_device::msm66573_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : msm665xx_device(mconfig, MSM66573, tag, owner, clock,
+ address_map_constructor(), // TODO: 64KB internal ROM (optional)
+ address_map_constructor(FUNC(msm66573_device::data_map), this))
+{
+}
+
+void msm66573_device::data_map(address_map &map)
+{
+ map(0x00000, 0x00001).rw(FUNC(msm66573_device::ssp_r), FUNC(msm66573_device::ssp_w));
+ map(0x00002, 0x00003).rw(FUNC(msm66573_device::lrb_r), FUNC(msm66573_device::lrb_w));
+ map(0x00004, 0x00005).rw(FUNC(msm66573_device::psw_r), FUNC(msm66573_device::psw_w));
+ map(0x00006, 0x00007).rw(FUNC(msm66573_device::acc_r), FUNC(msm66573_device::acc_w));
+ map(0x00008, 0x00008).rw(FUNC(msm66573_device::tsr_r), FUNC(msm66573_device::tsr_w));
+ map(0x00009, 0x00009).rw(FUNC(msm66573_device::dsr_r), FUNC(msm66573_device::dsr_w));
+ map(0x0000b, 0x0000b).rw(FUNC(msm66573_device::romwin_r), FUNC(msm66573_device::romwin_w));
+ map(0x00010, 0x00010).w(FUNC(msm66573_device::memsacp_w));
+ map(0x00011, 0x00011).rw(FUNC(msm66573_device::memscon_r), FUNC(msm66573_device::memscon_w));
+ // TODO: many, many other SFRs
+ map(0x00200, 0x011ff).ram().share("internal");
+}
+
+
+void msm665xx_device::device_start()
+{
+ // get address spaces and access caches
+ space(AS_PROGRAM).specific(m_program_space);
+ space(AS_PROGRAM).cache(m_program_cache);
+ space(AS_DATA).specific(m_data_space);
+ space(AS_DATA).cache(m_data_cache);
+
+ set_icountptr(m_icount);
+
+ // debug state
+ state_add(MSM665XX_ACC, "ACC", m_acc);
+ state_add(MSM665XX_CSR, "CSR", m_csr).mask(0x0f);
+ state_add(MSM665XX_PC, "PC", m_pc, [this](u16 data) { m_pc = data; prefetch(); next_inst(); });
+ state_add<u32>(STATE_GENPC, "GENPC",
+ [this]() { return u32(m_csr) << 16 | m_pc; },
+ [this](u32 data) { m_csr = (data >> 16) & 0x0f; m_pc = data & 0xffff; m_ppc = data & 0xfffff; }
+ ).mask(0xfffff).noshow();
+ state_add<u32>(STATE_GENPCBASE, "GENPCBASE", m_ppc,
+ [this](u32 data) { m_csr = (data >> 16) & 0x0f; m_pc = data & 0xffff; m_ppc = data & 0xfffff; }
+ ).mask(0xfffff).noshow();
+ state_add(MSM665XX_PSW, "PSW", m_psw);
+ state_add(STATE_GENFLAGS, "FLAGS", m_psw).formatstr("%8s").noshow();
+ state_add(MSM665XX_LRB, "LRB", m_lrb);
+ state_add(MSM665XX_SSP, "SSP", m_ssp);
+ u16 *fixed = static_cast<u16 *>(memshare("internal")->ptr());
+ for (int n = 0; n < 4; n++)
+ state_add<u16>(MSM665XX_PR0 + n, std::array<const char *, 4>{{"X1", "X2", "DP", "USP"}}[n],
+ [this, fixed, n]() { return fixed[(m_psw & 0x07) << 2 | n]; },
+ [this, fixed, n](u16 data) { fixed[(m_psw & 0x07) << 2 | n] = data; }
+ );
+ // NOTE: This assumes internal RAM is large enough (≥2KB) to provide all 256 register banks.
+ // While most nX-8/500S MCUs have that much internal RAM, ML66514 has only 1KB.
+ for (int n = 0; n < 4; n++)
+ state_add<u16>(MSM665XX_ER0 + n, util::string_format("ER%d", n).c_str(),
+ [this, fixed, n]() { return fixed[(m_lrb & 0x00ff) << 2 | n]; },
+ [this, fixed, n](u16 data) { fixed[(m_lrb & 0x00ff) << 2 | n] = data; }
+ );
+ for (int n = 0; n < 8; n++)
+ state_add<u8>(MSM665XX_R0 + n, util::string_format("R%d", n).c_str(),
+ [this, fixed, n]() { return util::little_endian_cast<const u8>(fixed)[(m_lrb & 0x00ff) << 3 | n]; },
+ [this, fixed, n](u8 data) { util::little_endian_cast<u8>(fixed)[(m_lrb & 0x00ff) << 3 | n] = data; }
+ ).noshow();
+ state_add(MSM665XX_DSR, "DSR", m_dsr).mask(0x0f);
+ state_add(MSM665XX_TSR, "TSR", m_tsr).mask(0x0f);
+ state_add(MSM665XX_ROMWIN, "ROMWIN", m_romwin);
+ state_add(MSM665XX_MEMSCON, "MEMSCON", m_memscon).mask(0x03);
+
+ // save state
+ save_item(NAME(m_acc));
+ save_item(NAME(m_pc));
+ save_item(NAME(m_ppc));
+ save_item(NAME(m_psw));
+ save_item(NAME(m_lrb));
+ save_item(NAME(m_ssp));
+ save_item(NAME(m_csr));
+ save_item(NAME(m_dsr));
+ save_item(NAME(m_tsr));
+ save_item(NAME(m_romwin));
+ save_item(NAME(m_state));
+ save_item(NAME(m_inst));
+ save_item(NAME(m_fetch_byte));
+ save_item(NAME(m_adr));
+ save_item(NAME(m_seg));
+ save_item(NAME(m_tmp));
+}
+
+u16 msm665xx_device::do_add(u16 n1, u16 n2, bool c) noexcept
+{
+ s32 sum = s16(n1) + (s16(n2) + s32(c));
+ if (u32(n1) + c > u16(~n2))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ if ((sum & 0xffff) == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(sum, 15))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (sum >= 0x8000 || sum < s32(-0x8000))
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n1 & 0x000f) + c > (~n2 & 0x000f))
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return sum & 0xffff;
+}
+
+u8 msm665xx_device::do_addb(u8 n1, u8 n2, bool c) noexcept
+{
+ s16 sum = s8(n1) + s16(c) + s8(n2);
+ if (u16(n1) + c > u8(~n2))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ if ((sum & 0xff) == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(sum, 7))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (sum >= 0x80 || sum < s16(-0x80))
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n1 & 0x0f) + c > (~n2 & 0x0f))
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return sum & 0xff;
+}
+
+u16 msm665xx_device::do_sub(u16 n1, u16 n2, bool c) noexcept
+{
+ s32 diff = s16(n1) - s32(c) - s16(n2);
+ if (n1 < n2 + u32(c))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ if ((diff & 0xffff) == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(diff, 15))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (diff >= 0x8000 || diff < s32(-0x8000))
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n1 & 0x000f) < (n2 & 0x000f) + c)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return diff & 0xffff;
+}
+
+u8 msm665xx_device::do_subb(u8 n1, u8 n2, bool c) noexcept
+{
+ s16 diff = s8(n1) - s16(c) - s8(n2);
+ if (n1 < n2 + u16(c))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ if ((diff & 0xff) == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(diff, 7))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (diff >= 0x80 || diff < s16(-0x80))
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n1 & 0x0f) < (n2 & 0x0f) + c)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return diff & 0xff;
+}
+
+u16 msm665xx_device::do_aluop_word(u16 n1, u16 n2) noexcept
+{
+ u16 result;
+ switch (BIT(m_inst, 4, 3))
+ {
+ default: // (what even are bitfields?)
+ case 0: // SUB
+ return do_sub(n1, n2);
+
+ case 1: // CMP
+ (void)do_sub(n1, n2);
+ return n1;
+
+ case 2: // ADD
+ return do_add(n1, n2);
+
+ case 3: // AND
+ result = n1 & n2;
+ setzs_word(result);
+ return result;
+
+ case 4: // OR
+ result = n1 | n2;
+ setzs_word(result);
+ return result;
+
+ case 5: // XOR
+ result = n1 ^ n2;
+ setzs_word(result);
+ return result;
+
+ case 6: // ADC
+ return do_add(n1, n2, BIT(m_psw, 15));
+
+ case 7: // SBC
+ return do_sub(n1, n2, BIT(m_psw, 15));
+ }
+}
+
+u8 msm665xx_device::do_aluop_byte(u8 n1, u8 n2) noexcept
+{
+ u8 result;
+ switch (BIT(m_inst, 4, 3))
+ {
+ default: // (what even are bitfields?)
+ case 0: // SUB
+ return do_subb(n1, n2);
+
+ case 1: // CMP
+ (void)do_subb(n1, n2);
+ return n1;
+
+ case 2: // ADD
+ return do_addb(n1, n2);
+
+ case 3: // AND
+ result = n1 & n2;
+ setzs_byte(result);
+ return result;
+
+ case 4: // OR
+ result = n1 | n2;
+ setzs_byte(result);
+ return result;
+
+ case 5: // XOR
+ result = n1 ^ n2;
+ setzs_byte(result);
+ return result;
+
+ case 6: // ADC
+ return do_addb(n1, n2, BIT(m_psw, 15));
+
+ case 7: // SBC
+ return do_subb(n1, n2, BIT(m_psw, 15));
+ }
+}
+
+u16 msm665xx_device::do_inc(u16 n) noexcept
+{
+ u16 result = n + 1;
+ if (result == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(result, 15))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (result == 0x8000)
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((result & 0x000f) == 0)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return result;
+}
+
+u8 msm665xx_device::do_incb(u8 n) noexcept
+{
+ u8 result = n + 1;
+ if (result == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(result, 7))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (result == 0x80)
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((result & 0x0f) == 0)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return result;
+}
+
+u16 msm665xx_device::do_dec(u16 n) noexcept
+{
+ u16 result = n - 1;
+ if (result == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(result, 15))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (n == 0x8000)
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n & 0x000f) == 0)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return result;
+}
+
+u8 msm665xx_device::do_decb(u8 n) noexcept
+{
+ u8 result = n - 1;
+ if (result == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (BIT(result, 7))
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ if (n == 0x80)
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((n & 0x0f) == 0)
+ m_psw |= 0x2000;
+ else
+ m_psw &= 0xdfff;
+ return result;
+}
+
+u16 msm665xx_device::do_rol(u16 n) noexcept
+{
+ bool c = BIT(m_psw, 15);
+ if (BIT(n, 15))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ return n << 1 | (c ? 1 : 0);
+}
+
+u8 msm665xx_device::do_rolb(u8 n) noexcept
+{
+ bool c = BIT(m_psw, 15);
+ if (BIT(n, 7))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ return n << 1 | (c ? 1 : 0);
+}
+
+u16 msm665xx_device::do_ror(u16 n) noexcept
+{
+ bool c = BIT(m_psw, 15);
+ if (BIT(n, 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ return n >> 1 | (c ? 0x8000 : 0);
+}
+
+u8 msm665xx_device::do_rorb(u8 n) noexcept
+{
+ bool c = BIT(m_psw, 15);
+ if (BIT(n, 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ return n >> 1 | (c ? 0x80 : 0);
+}
+
+void msm665xx_device::do_mul(u16 data) noexcept
+{
+ u32 prod = m_acc * u32(data);
+ if (prod == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+
+ // Store 32-bit product
+ m_acc = prod >> 16;
+ m_data_cache.write_word(addr_er(0), prod & 0xffff);
+}
+
+void msm665xx_device::do_div(u16 data) noexcept
+{
+ if (data == 0)
+ {
+ m_psw |= 0x8000;
+ return;
+ }
+ m_psw &= 0x7fff;
+
+ u32 div = u32(m_acc) << 16 | m_data_cache.read_word(addr_er(0));
+ u32 quot = div / data;
+ if (quot == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+
+ // Store 32-bit quotient and 16-bit remainder
+ m_acc = quot >> 16;
+ m_data_cache.write_word(addr_er(0), quot & 0xffff);
+ m_data_cache.write_word(addr_er(1), div % data);
+}
+
+void msm665xx_device::do_divb(u8 data) noexcept
+{
+ if (data == 0)
+ {
+ m_psw |= 0x8000;
+ return;
+ }
+ m_psw &= 0x7fff;
+
+ u16 quot = m_acc / data;
+ if (quot == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+
+ // Store 16-bit quotient and 8-bit remainder
+ m_data_cache.write_byte(addr_lr(1), m_acc % data);
+ m_acc = quot;
+}
+
+void msm665xx_device::do_divq(u16 data) noexcept
+{
+ if (data == 0)
+ {
+ m_psw |= 0x8000;
+ return;
+ }
+ m_psw &= 0x7fff;
+
+ u32 div = u32(m_acc) << 16 | m_data_cache.read_word(addr_er(0));
+ u32 quot = div / data;
+ if (quot >= 0x10000)
+ m_psw |= 0x0200;
+ else
+ m_psw &= 0xfdff;
+ if ((quot & 0xffff) == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+
+ // Store 16-bit quotient and 16-bit remainder
+ m_acc = quot & 0xffff;
+ m_data_cache.write_word(addr_er(1), div % data);
+}
+
+
+u16 msm665xx_device::ssp_r()
+{
+ return m_ssp;
+}
+
+void msm665xx_device::ssp_w(u16 data)
+{
+ m_ssp = data;
+}
+
+u16 msm665xx_device::lrb_r()
+{
+ return m_lrb;
+}
+
+void msm665xx_device::lrb_w(offs_t offset, u16 data, u16 mem_mask)
+{
+ m_lrb = (m_lrb & ~mem_mask) | (data & mem_mask);
+}
+
+u16 msm665xx_device::psw_r()
+{
+ return m_psw;
+}
+
+void msm665xx_device::psw_w(offs_t offset, u16 data, u16 mem_mask)
+{
+ m_psw = (m_psw & ~mem_mask) | (data & mem_mask);
+}
+
+u16 msm665xx_device::acc_r()
+{
+ return m_acc;
+}
+
+void msm665xx_device::acc_w(offs_t offset, u16 data, u16 mem_mask)
+{
+ m_acc = (m_acc & ~mem_mask) | (data & mem_mask);
+}
+
+u8 msm665xx_device::dsr_r()
+{
+ return m_dsr;
+}
+
+void msm665xx_device::dsr_w(u8 data)
+{
+ if (!BIT(m_memscon, 0))
+ logerror("%02X:%04X: Writing %02X to DSR without data memory space expansion\n", m_csr, m_pc, data);
+ m_dsr = data & 0x0f;
+}
+
+u8 msm665xx_device::tsr_r()
+{
+ return m_tsr;
+}
+
+void msm665xx_device::tsr_w(u8 data)
+{
+ if (!BIT(m_memscon, 1))
+ logerror("%02X:%04X: Writing %02X to TSR without program memory space expansion\n", m_csr, m_pc, data);
+ m_tsr = data & 0x0f;
+}
+
+u8 msm665xx_device::romwin_r()
+{
+ return m_romwin;
+}
+
+void msm665xx_device::romwin_w(u8 data)
+{
+ // ROMWIN is only supposed to be written once after reset
+ m_romwin = data | 0x30;
+}
+
+void msm665xx_device::memsacp_w(u8 data)
+{
+ logerror("%02X:%04X: Writing %02X to MEMSCAP\n", m_csr, m_pc, data);
+}
+
+u8 msm665xx_device::memscon_r()
+{
+ return m_memscon | 0xfc;
+}
+
+void msm665xx_device::memscon_w(u8 data)
+{
+ // FIXME: may be written only once after reset after double write to MEMSACP
+ m_memscon = data & 0x03;
+}
+
+u16 msm665xx_device::get_seg(u16 addr) const noexcept
+{
+ // Common area from 0 to 03FFH, 1FFFH, 3FFFH, 7FFFH is always segment 0
+ if (m_dsr == 0 || addr < (BIT(m_psw, 4, 2) == 0 ? 0x0400 : 0x1000 << BIT(m_psw, 4, 2)))
+ {
+ if (addr >= 0x1200 && (m_romwin & 0x0f) != 0 && (addr >> 12) >= (m_romwin & 0x0f) && (addr >> 12) <= (m_romwin >> 4))
+ return 0x8000 | m_tsr;
+ else
+ return 0;
+ }
+ else
+ {
+ if ((m_romwin & 0x0f) != 0 && (addr >> 12) >= (m_romwin & 0x0f) && (addr >> 12) <= (m_romwin >> 4))
+ return 0x8000 | m_tsr;
+ else
+ return m_dsr;
+ }
+}
+
+
+enum class msm665xx_device::inst_state : u8
+{
+ NOP, no_jump, store_byte, store_word,
+ RT, RTI, J_Cadr, J_Cadr_2,
+ SJ, DJNZ_Rn, prefix_stackop, FCAL, FCAL_2, FCAL_3, FRT, PUSHS_A,
+ op16_A_ERn_PRn, op8_A_Rn,
+ MOVB_Rn_N8,
+ MOV_PRn_ERn_N16, MOV_PRn_ERn_N16_2,
+ ST_A_ind_PRn, ST_A_ind_DP_post, STB_A_ind_PRn, STB_A_ind_DP_post,
+ ST_A_fix8, ST_A_off8, ST_A_sfr8, ST_A_dir, ST_A_dir_2,
+ STB_A_fix8, STB_A_off8, STB_A_sfr8, STB_A_dir, STB_A_dir_2,
+ ST_A_ERn_PRn, STB_A_Rn,
+ INC_DEC_PRn, ACAL, prefix_sbaoff6, prefix_sbafix6,
+ prefix_PRn_ERn, prefix_Rn,
+ L_A_PRn_ERn, LB_A_Rn,
+ L_A_ind_PRn, L_A_ind_DP_post,
+ L_A_fix8, L_A_off8, L_A_sfr8, L_A_dir, L_A_dir_2, L_A_obj,
+ L_A_D16_X1, L_A_D16_X1_2, L_A_n7_ind_PR, prefix_PSW, prefix_n7_ind_PR,
+ op16_A_fix8, op16_A_off8, op16_A_N16, op16_A_N16_2, op16_A_N16_3, SLL_A,
+ op8_A_fix8, op8_A_off8, op8_A_N8, op8_A_N8_2, SLLB_A,
+ LB_A_ind_PRn, LB_A_ind_DP_post,
+ LB_A_obj,
+ SRL_A,
+ SRLB_A,
+ prefix_ind8_PRn, prefix_ind16_PRn, prefix_ind_DP_post,
+ prefix_fix8, prefix_off8, prefix_sfr8, prefix_dir, prefix_dir_2,
+ prefix_D16_PRn, prefix_D16_PRn_2, prefix_ind8_X1_A, prefix_ind16_X1_A, prefix_ind8_X1_R0, prefix_ind16_X1_R0,
+ prefix_obj8, prefix_obj16,
+ ROL_A,
+ ROLB_A,
+ prefix_A16, prefix_A8,
+ ROR_A,
+ RORB_A,
+ INCB_DECB_Rn,
+ CMP_fix8_N16, CMP_off8_N16,
+ MOV_sfr8_N16, MOV_off8_N16,
+ ST_A_D16_X1, ST_A_D16_X1_2, ST_A_n7_ind_PR,
+ STB_A_D16_X1, STB_A_D16_X1_2, STB_A_n7_ind_PR,
+ RC_SC,
+ INC_A, NEG_A,
+ INCB_A, NEGB_A,
+ CMPB_fix8_N8, CMPB_off8_N8,
+ MOVB_sfr8_N8, MOVB_off8_N8,
+ RDD_SDD,
+ DI_EI,
+ DEC_A, SWAP,
+ DECB_A,
+ VCAL,
+ JGT_JLE, JZ_JNZ, JCY_JNC, JNS_JPS,
+ L_A_N16, L_A_N16_2, L_A_N16_3, LB_A_N8, LB_A_N8_2, CLR_A, CLRB_A,
+ EXTND, CPL_C, CAL_Cadr, CAL_Cadr_2, BRK,
+
+ RB_SB_obj_bit,
+ MB_C_obj_bit, MB_obj_bit_C,
+ JBR_JBS_obj_bit,
+ JBRS_JBSR_obj_bit,
+ BAND_C_obj_bit,
+ BOR_C_obj_bit,
+ BXOR_C_obj_bit,
+ MOV_ERn_PRn_obj, MOVB_Rn_obj,
+ op16_obj_fix8, op8_obj_fix8,
+ op16_obj_off8, op8_obj_off8,
+ op16_obj_sfr8, op8_obj_sfr8,
+ op16_obj1_obj2, op8_obj1_obj2,
+ op16_obj_N16, op16_obj_N16_2, op16_obj_N16_3,
+ op8_obj_N8, op8_obj_N8_2,
+ op16_obj_A, op8_obj_A,
+ op16_A_obj, op8_A_obj,
+ MOV_fix8_obj, MOV_off8_obj,
+ MOVB_fix8_obj, MOVB_off8_obj,
+ MOV_ind_PRn_obj, MOV_ind_DP_post_obj,
+ MOVB_ind_PRn_obj, MOVB_ind_DP_post_obj,
+ SLL_obj, SLLB_obj,
+ CMP_obj1_obj2, CMPB_obj1_obj2,
+ CMP_obj_N16, CMP_obj_N16_2, CMP_obj_N16_3,
+ CMPB_obj_N8, CMPB_obj_N8_2,
+ CMP_obj_A, CMPB_obj_A,
+ MOV_sfr8_obj, MOV_A_obj,
+ MOVB_sfr8_obj, MOVB_A_obj,
+ MOV_D16_PRn_obj, MOV_D16_PRn_obj_2, MOVB_D16_PRn_obj, MOVB_D16_PRn_obj_2,
+ MOV_n7_ind_PR_obj, MOVB_n7_ind_PR_obj,
+ MOV_dir_obj, MOV_dir_obj_2, MOVB_dir_obj, MOVB_dir_obj_2,
+ SRL_obj, SRLB_obj,
+ TJNZ_TJZ, TJNZB_TJZB,
+ DIV_obj, DIVB_obj,
+ MUL_obj, MULB_obj,
+ MOV_obj_A, MOV_obj_N16, MOV_obj_N16_2,
+ MOVB_obj_A, MOVB_obj_N8,
+ ROL_ROR_obj, ROLB_RORB_obj,
+ CMPC_LC_A_Tadr, CMPC_LC_A_Tadr_2, CMPCB_LCB_A_Tadr, CMPCB_LCB_A_Tadr_2,
+ SBR_RBR_obj, MBR_C_obj, MBR_obj_C,
+ INC_DEC_obj, CLR_FILL_obj, XCHG_A_obj,
+ INCB_DECB_obj, CLRB_FILLB_obj, XCHGB_A_obj,
+ TBR_obj,
+ J_ind_obj,
+ CMPC_LC_A_ind_obj, CMPCB_LCB_A_ind_obj,
+ CMPC_LC_A_T16_obj, CMPC_LC_A_T16_obj_2, CMPC_A_obj_3, CMPCB_A_obj_3, LC_A_obj_3, LCB_A_obj_3,
+ DJNZ_obj,
+ CAL_ind_obj,
+ SRA_obj, SRAB_obj,
+ MOV_obj_ind_X1_A, MOV_obj_ind_X1_R0, MOVB_obj_ind_X1_A, MOVB_obj_ind_X1_R0,
+ FJ, FJ_2, FJ_3,
+ DIVQ_obj,
+ JLTS_JGES, JLES_JGTS,
+ illegal
+};
+
+const msm665xx_device::inst_state msm665xx_device::s_inst_decode[2][0x100] =
+{
+ {
+ // 00-0F (DD = 0)
+ inst_state::NOP, inst_state::RT, inst_state::RTI, inst_state::J_Cadr,
+ inst_state::SJ, inst_state::DJNZ_Rn, inst_state::prefix_stackop, inst_state::PUSHS_A,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+
+ // 10-1F (DD = 0)
+ inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8,
+ inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+
+ // 20-2F (DD = 0)
+ inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16,
+ inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+ inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn, inst_state::op8_A_Rn,
+
+ // 30-3F (DD = 0)
+ inst_state::STB_A_ind_PRn, inst_state::STB_A_ind_DP_post, inst_state::STB_A_ind_PRn, inst_state::STB_A_ind_DP_post,
+ inst_state::STB_A_fix8, inst_state::STB_A_off8, inst_state::STB_A_sfr8, inst_state::STB_A_dir,
+ inst_state::STB_A_Rn, inst_state::STB_A_Rn, inst_state::STB_A_Rn, inst_state::STB_A_Rn,
+ inst_state::STB_A_Rn, inst_state::STB_A_Rn, inst_state::STB_A_Rn, inst_state::STB_A_Rn,
+
+ // 40-4F
+ inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn,
+ inst_state::ACAL, inst_state::ACAL, inst_state::ACAL, inst_state::ACAL,
+ inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6,
+ inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6,
+
+ // 50-5F
+ inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn,
+ inst_state::ACAL, inst_state::ACAL, inst_state::ACAL, inst_state::ACAL,
+ inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6,
+ inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6,
+
+ // 60-6F
+ inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn,
+ inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn,
+ inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn,
+ inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn,
+
+ // 70-7F
+ inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn,
+ inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn,
+ inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn,
+ inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn,
+
+ // 80-8F (DD = 0)
+ inst_state::L_A_ind_PRn, inst_state::L_A_ind_DP_post, inst_state::L_A_ind_PRn, inst_state::L_A_ind_DP_post,
+ inst_state::L_A_fix8, inst_state::L_A_off8, inst_state::L_A_sfr8, inst_state::L_A_dir,
+ inst_state::L_A_D16_X1, inst_state::L_A_n7_ind_PR, inst_state::prefix_PSW, inst_state::prefix_n7_ind_PR,
+ inst_state::op8_A_fix8, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::SLLB_A,
+
+ // 90-9F (DD = 0)
+ inst_state::LB_A_ind_PRn, inst_state::LB_A_ind_DP_post, inst_state::LB_A_ind_PRn, inst_state::LB_A_ind_DP_post,
+ inst_state::L_A_fix8, inst_state::L_A_off8, inst_state::L_A_sfr8, inst_state::L_A_dir,
+ inst_state::L_A_D16_X1, inst_state::L_A_n7_ind_PR, inst_state::prefix_PSW, inst_state::prefix_n7_ind_PR,
+ inst_state::op8_A_fix8, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::SRLB_A,
+
+ // A0-AF (DD = 0)
+ inst_state::prefix_ind8_PRn, inst_state::prefix_ind_DP_post, inst_state::prefix_ind8_PRn, inst_state::prefix_ind_DP_post,
+ inst_state::prefix_fix8, inst_state::prefix_off8, inst_state::prefix_sfr8, inst_state::prefix_dir,
+ inst_state::prefix_D16_PRn, inst_state::prefix_D16_PRn, inst_state::prefix_ind8_X1_A, inst_state::prefix_ind8_X1_R0,
+ inst_state::op8_A_fix8, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::ROLB_A,
+
+ // B0-BF (DD = 0)
+ inst_state::prefix_ind8_PRn, inst_state::prefix_ind_DP_post, inst_state::prefix_ind8_PRn, inst_state::prefix_ind_DP_post,
+ inst_state::prefix_fix8, inst_state::prefix_off8, inst_state::prefix_sfr8, inst_state::prefix_dir,
+ inst_state::prefix_D16_PRn, inst_state::prefix_D16_PRn, inst_state::prefix_ind8_X1_A, inst_state::prefix_ind8_X1_R0,
+ inst_state::prefix_A8, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::RORB_A,
+
+ // C0-CF (DD = 0)
+ inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn,
+ inst_state::CMP_fix8_N16, inst_state::CMP_off8_N16, inst_state::MOV_sfr8_N16, inst_state::MOV_off8_N16,
+ inst_state::STB_A_D16_X1, inst_state::STB_A_n7_ind_PR, inst_state::RC_SC, inst_state::RC_SC,
+ inst_state::INCB_A, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::NEGB_A,
+
+ // D0-DF (DD = 0)
+ inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn,
+ inst_state::CMPB_fix8_N8, inst_state::CMPB_off8_N8, inst_state::MOVB_sfr8_N8, inst_state::MOVB_off8_N8,
+ inst_state::RDD_SDD, inst_state::RDD_SDD, inst_state::DI_EI, inst_state::DI_EI,
+ inst_state::DECB_A, inst_state::op8_A_off8, inst_state::op8_A_N8, inst_state::SWAP,
+
+ // E0-EF
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+
+ // F0-FF
+ inst_state::JGT_JLE, inst_state::JZ_JNZ, inst_state::JCY_JNC, inst_state::JNS_JPS,
+ inst_state::JNS_JPS, inst_state::JCY_JNC, inst_state::JZ_JNZ, inst_state::JGT_JLE,
+ inst_state::L_A_N16, inst_state::LB_A_N8, inst_state::CLR_A, inst_state::CLRB_A,
+ inst_state::EXTND, inst_state::CPL_C, inst_state::CAL_Cadr, inst_state::BRK
+ },
+
+ {
+ // 00-0F (DD = 1)
+ inst_state::NOP, inst_state::RT, inst_state::RTI, inst_state::J_Cadr,
+ inst_state::SJ, inst_state::DJNZ_Rn, inst_state::prefix_stackop, inst_state::PUSHS_A,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+
+ // 10-1F (DD = 1)
+ inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8,
+ inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8, inst_state::MOVB_Rn_N8,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+
+ // 20-2F (DD = 1)
+ inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16,
+ inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16, inst_state::MOV_PRn_ERn_N16,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+ inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn, inst_state::op16_A_ERn_PRn,
+
+ // 30-3F (DD = 1)
+ inst_state::ST_A_ind_PRn, inst_state::ST_A_ind_DP_post, inst_state::ST_A_ind_PRn, inst_state::ST_A_ind_DP_post,
+ inst_state::ST_A_fix8, inst_state::ST_A_off8, inst_state::ST_A_sfr8, inst_state::ST_A_dir,
+ inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn,
+ inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn, inst_state::ST_A_ERn_PRn,
+
+ // 40-4F
+ inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn,
+ inst_state::ACAL, inst_state::ACAL, inst_state::ACAL, inst_state::ACAL,
+ inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6,
+ inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6, inst_state::prefix_sbaoff6,
+
+ // 50-5F
+ inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn, inst_state::INC_DEC_PRn,
+ inst_state::ACAL, inst_state::ACAL, inst_state::ACAL, inst_state::ACAL,
+ inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6,
+ inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6, inst_state::prefix_sbafix6,
+
+ // 60-6F
+ inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn,
+ inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn, inst_state::prefix_PRn_ERn,
+ inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn,
+ inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn, inst_state::prefix_Rn,
+
+ // 70-7F
+ inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn,
+ inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn, inst_state::L_A_PRn_ERn,
+ inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn,
+ inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn, inst_state::LB_A_Rn,
+
+ // 80-8F (DD = 1)
+ inst_state::L_A_ind_PRn, inst_state::L_A_ind_DP_post, inst_state::L_A_ind_PRn, inst_state::L_A_ind_DP_post,
+ inst_state::L_A_fix8, inst_state::L_A_off8, inst_state::L_A_sfr8, inst_state::L_A_dir,
+ inst_state::L_A_D16_X1, inst_state::L_A_n7_ind_PR, inst_state::prefix_PSW, inst_state::prefix_n7_ind_PR,
+ inst_state::op16_A_fix8, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::SLL_A,
+
+ // 90-9F (DD = 1)
+ inst_state::LB_A_ind_PRn, inst_state::LB_A_ind_DP_post, inst_state::LB_A_ind_PRn, inst_state::LB_A_ind_DP_post,
+ inst_state::L_A_fix8, inst_state::L_A_off8, inst_state::L_A_sfr8, inst_state::L_A_dir,
+ inst_state::L_A_D16_X1, inst_state::L_A_n7_ind_PR, inst_state::prefix_PSW, inst_state::prefix_n7_ind_PR,
+ inst_state::op16_A_fix8, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::SRL_A,
+
+ // A0-AF (DD = 1)
+ inst_state::prefix_ind16_PRn, inst_state::prefix_ind_DP_post, inst_state::prefix_ind16_PRn, inst_state::prefix_ind_DP_post,
+ inst_state::prefix_fix8, inst_state::prefix_off8, inst_state::prefix_sfr8, inst_state::prefix_dir,
+ inst_state::prefix_D16_PRn, inst_state::prefix_D16_PRn, inst_state::prefix_ind16_X1_A, inst_state::prefix_ind16_X1_R0,
+ inst_state::op16_A_fix8, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::ROL_A,
+
+ // B0-BF (DD = 1)
+ inst_state::prefix_ind16_PRn, inst_state::prefix_ind_DP_post, inst_state::prefix_ind16_PRn, inst_state::prefix_ind_DP_post,
+ inst_state::prefix_fix8, inst_state::prefix_off8, inst_state::prefix_sfr8, inst_state::prefix_dir,
+ inst_state::prefix_D16_PRn, inst_state::prefix_D16_PRn, inst_state::prefix_ind16_X1_A, inst_state::prefix_ind16_X1_R0,
+ inst_state::prefix_A16, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::ROR_A,
+
+ // C0-CF (DD = 1)
+ inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn,
+ inst_state::CMP_fix8_N16, inst_state::CMP_off8_N16, inst_state::MOV_sfr8_N16, inst_state::MOV_off8_N16,
+ inst_state::ST_A_D16_X1, inst_state::ST_A_n7_ind_PR, inst_state::RC_SC, inst_state::RC_SC,
+ inst_state::INC_A, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::NEG_A,
+
+ // D0-DF (DD = 1)
+ inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn, inst_state::INCB_DECB_Rn,
+ inst_state::CMPB_fix8_N8, inst_state::CMPB_off8_N8, inst_state::MOVB_sfr8_N8, inst_state::MOVB_off8_N8,
+ inst_state::RDD_SDD, inst_state::RDD_SDD, inst_state::DI_EI, inst_state::DI_EI,
+ inst_state::DEC_A, inst_state::op16_A_off8, inst_state::op16_A_N16, inst_state::SWAP,
+
+ // E0-EF
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+ inst_state::VCAL, inst_state::VCAL, inst_state::VCAL, inst_state::VCAL,
+
+ // F0-FF
+ inst_state::JGT_JLE, inst_state::JZ_JNZ, inst_state::JCY_JNC, inst_state::JNS_JPS,
+ inst_state::JNS_JPS, inst_state::JCY_JNC, inst_state::JZ_JNZ, inst_state::JGT_JLE,
+ inst_state::L_A_N16, inst_state::LB_A_N8, inst_state::CLR_A, inst_state::CLRB_A,
+ inst_state::EXTND, inst_state::CPL_C, inst_state::CAL_Cadr, inst_state::BRK
+ }
+};
+
+const msm665xx_device::inst_state msm665xx_device::s_prefixed_inst_decode[2][0x100] =
+{
+ {
+ // 00-0F (byte mode)
+ inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit,
+ inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit,
+ inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit,
+ inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit, inst_state::RB_SB_obj_bit,
+
+ // 10-1F (byte mode)
+ inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit,
+ inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit, inst_state::MB_C_obj_bit,
+ inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C,
+ inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C, inst_state::MB_obj_bit_C,
+
+ // 20-2F (byte mode)
+ inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit,
+ inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit,
+ inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit,
+ inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit, inst_state::JBR_JBS_obj_bit,
+
+ // 30-3F (byte mode)
+ inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit,
+ inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit,
+ inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit,
+ inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit, inst_state::JBRS_JBSR_obj_bit,
+
+ // 40-4F (byte mode)
+ inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit,
+ inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit,
+ inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit,
+ inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit, inst_state::BAND_C_obj_bit,
+
+ // 50-5F (byte mode)
+ inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit,
+ inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit,
+ inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit,
+ inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit, inst_state::BOR_C_obj_bit,
+
+ // 60-6F (byte mode)
+ inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit,
+ inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit, inst_state::BXOR_C_obj_bit,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 70-7F (byte mode)
+ inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj,
+ inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj, inst_state::MOVB_Rn_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 80-8F (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::MOVB_fix8_obj, inst_state::MOVB_off8_obj,
+ inst_state::MOVB_ind_PRn_obj, inst_state::MOVB_ind_DP_post_obj, inst_state::MOVB_ind_PRn_obj, inst_state::MOVB_ind_DP_post_obj,
+ inst_state::SLLB_obj, inst_state::SLLB_obj, inst_state::SLLB_obj, inst_state::SLLB_obj,
+
+ // 90-9F (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::CMPB_obj_N8,
+ inst_state::CMPB_obj_A, inst_state::op8_A_obj, inst_state::MOVB_sfr8_obj, inst_state::MOVB_A_obj,
+ inst_state::MOVB_D16_PRn_obj, inst_state::MOVB_D16_PRn_obj, inst_state::MOVB_n7_ind_PR_obj, inst_state::MOVB_dir_obj,
+ inst_state::SRLB_obj, inst_state::SRLB_obj, inst_state::SRLB_obj, inst_state::SRLB_obj,
+
+ // A0-AF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::TJNZB_TJZB, inst_state::TJNZB_TJZB,
+ inst_state::DIVB_obj, inst_state::MULB_obj, inst_state::MOVB_obj_A, inst_state::MOVB_obj_N8,
+ inst_state::ROLB_RORB_obj, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // B0-BF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::CMPCB_LCB_A_Tadr, inst_state::CMPCB_LCB_A_Tadr,
+ inst_state::SBR_RBR_obj, inst_state::SBR_RBR_obj, inst_state::MBR_C_obj, inst_state::MBR_obj_C,
+ inst_state::ROLB_RORB_obj, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // C0-CF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::INCB_DECB_obj, inst_state::CLRB_FILLB_obj,
+ inst_state::XCHGB_A_obj, inst_state::illegal, inst_state::TBR_obj, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // D0-DF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::INCB_DECB_obj, inst_state::CLRB_FILLB_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // E0-EF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::DJNZ_obj, inst_state::illegal,
+ inst_state::SRAB_obj, inst_state::SRAB_obj, inst_state::SRAB_obj, inst_state::SRAB_obj,
+
+ // F0-FF (byte mode)
+ inst_state::op8_obj_fix8, inst_state::op8_obj_off8, inst_state::op8_obj_sfr8, inst_state::op8_obj_N8,
+ inst_state::op8_obj_A, inst_state::op8_A_obj, inst_state::illegal, inst_state::illegal,
+ inst_state::MOVB_obj_ind_X1_A, inst_state::MOVB_obj_ind_X1_R0, inst_state::illegal, inst_state::illegal,
+ inst_state::JLTS_JGES, inst_state::JLES_JGTS, inst_state::JLES_JGTS, inst_state::JLTS_JGES
+ },
+
+ {
+ // 00-0F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 10-1F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 20-2F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 30-3F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 40-4F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 50-5F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 60-6F (word mode)
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 70-7F (word mode)
+ inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj,
+ inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj, inst_state::MOV_ERn_PRn_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // 80-8F (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::MOV_fix8_obj, inst_state::MOV_off8_obj,
+ inst_state::MOV_ind_PRn_obj, inst_state::MOV_ind_DP_post_obj, inst_state::MOV_ind_PRn_obj, inst_state::MOV_ind_DP_post_obj,
+ inst_state::SLL_obj, inst_state::SLL_obj, inst_state::SLL_obj, inst_state::SLL_obj,
+
+ // 90-9F (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::CMP_obj_N16,
+ inst_state::CMP_obj_A, inst_state::op16_A_obj, inst_state::MOV_sfr8_obj, inst_state::MOV_A_obj,
+ inst_state::MOV_D16_PRn_obj, inst_state::MOV_D16_PRn_obj, inst_state::MOV_n7_ind_PR_obj, inst_state::MOV_dir_obj,
+ inst_state::SRL_obj, inst_state::SRL_obj, inst_state::SRL_obj, inst_state::SRL_obj,
+
+ // A0-AF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::TJNZ_TJZ, inst_state::TJNZ_TJZ,
+ inst_state::DIV_obj, inst_state::MUL_obj, inst_state::MOV_obj_A, inst_state::MOV_obj_N16,
+ inst_state::ROL_ROR_obj, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // B0-BF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::CMPC_LC_A_Tadr, inst_state::CMPC_LC_A_Tadr,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+ inst_state::ROL_ROR_obj, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // C0-CF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::INC_DEC_obj, inst_state::CLR_FILL_obj,
+ inst_state::XCHG_A_obj, inst_state::J_ind_obj, inst_state::illegal, inst_state::illegal,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // D0-DF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::INC_DEC_obj, inst_state::CLR_FILL_obj,
+ inst_state::CMPC_LC_A_ind_obj, inst_state::CMPCB_LCB_A_ind_obj, inst_state::CMPC_LC_A_ind_obj, inst_state::CMPCB_LCB_A_ind_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal,
+
+ // E0-EF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::CMPC_LC_A_T16_obj, inst_state::CMPC_LC_A_T16_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::DJNZ_obj, inst_state::CAL_ind_obj,
+ inst_state::SRA_obj, inst_state::SRA_obj, inst_state::SRA_obj, inst_state::SRA_obj,
+
+ // F0-FF (word mode)
+ inst_state::op16_obj_fix8, inst_state::op16_obj_off8, inst_state::op16_obj_sfr8, inst_state::op16_obj_N16,
+ inst_state::op16_obj_A, inst_state::op16_A_obj, inst_state::CMPC_LC_A_T16_obj, inst_state::CMPC_LC_A_T16_obj,
+ inst_state::MOV_obj_ind_X1_A, inst_state::MOV_obj_ind_X1_R0, inst_state::FJ, inst_state::DIVQ_obj,
+ inst_state::illegal, inst_state::illegal, inst_state::illegal, inst_state::illegal
+ }
+};
+
+
+void msm665xx_device::device_reset()
+{
+ // PC will be initialized from vector following reset; LRB and ROMWIN are undefined at reset
+ m_acc = 0;
+ m_psw = 0;
+ m_ssp = 0xffff;
+ m_csr = 0;
+ m_dsr = 0;
+ m_tsr = 0;
+ m_memscon = 0;
+ m_state = inst_state::J_Cadr;
+}
+
+void msm665xx_device::execute_run()
+{
+ do
+ {
+ prefetch();
+ switch (m_state)
+ {
+ case inst_state::NOP:
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::no_jump:
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::store_byte:
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::store_word:
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::RT:
+ m_ssp += 2;
+ m_pc = data_read_word(0, m_ssp);
+ m_icount -= 4;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::RTI:
+ m_adr = m_ssp + 2;
+ m_psw = data_read_word(0, m_adr);
+ m_adr += 2;
+ m_lrb = data_read_word(0, m_adr);
+ m_adr += 2;
+ m_acc = data_read_word(0, m_adr);
+ if (BIT(m_memscon, 1))
+ {
+ m_adr += 2;
+ m_csr = data_read_word(0, m_adr) & 0x000f;
+ }
+ m_adr += 2;
+ m_pc = data_read_word(0, m_adr);
+ m_ssp = m_adr;
+ m_icount -= BIT(m_memscon, 1) ? 12 : 10;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::J_Cadr:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::J_Cadr_2;
+ break;
+
+ case inst_state::J_Cadr_2:
+ m_pc = m_fetch_byte << 8 | m_tmp[0];
+ m_icount -= 3;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::SJ:
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::DJNZ_Rn:
+ m_adr = addr_lr(BIT(m_fetch_byte, 7) ? 5 : 4);
+ m_tmp[0] = m_data_cache.read_byte(m_adr) - 1;
+ m_data_cache.write_byte(m_adr, m_tmp[0]);
+ if (m_tmp[0] != 0)
+ {
+ m_pc += s8(m_fetch_byte | 0x80);
+ m_icount -= 10 - 2;
+ m_state = inst_state::NOP;
+ }
+ else
+ {
+ m_icount -= 7;
+ next_inst();
+ }
+ break;
+
+ case inst_state::prefix_stackop:
+ m_inst = m_fetch_byte;
+ if ((m_inst & 0x30) != 0x30)
+ {
+ if (BIT(m_inst, 6))
+ {
+ m_adr = m_data_cache.read_word(addr_pr(3));
+ m_seg = get_seg(m_adr);
+ }
+ else
+ {
+ m_adr = m_ssp;
+ m_seg = 0;
+ }
+ m_tmp[1] = BIT(m_inst, 5) ? 0 : BIT(m_inst, 4) ? addr_pr(0) : addr_er(0);
+ if (BIT(m_inst, 7))
+ {
+ // POPS/POPU
+ for (int n = 0; n < 4; n++)
+ {
+ if (BIT(m_inst, n))
+ {
+ m_adr += 2;
+ if (BIT(m_inst, 6))
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ data_write_word(0, m_tmp[1] + n * 2, m_tmp[0]);
+ m_icount -= 4;
+ }
+ }
+ }
+ else
+ {
+ // PUSHS/PUSHU
+ for (int n = 3; n >= 0; n--)
+ {
+ if (BIT(m_inst, n))
+ {
+ m_tmp[0] = data_read_word(0, m_tmp[1] + n * 2);
+ data_write_word(m_seg, m_adr, m_tmp[0]);
+ m_adr -= 2;
+ if (BIT(m_inst, 6))
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ }
+ }
+ }
+ if (BIT(m_inst, 6))
+ m_data_cache.write_word(addr_pr(3), m_adr);
+ else
+ m_ssp = m_adr;
+ m_icount -= 3;
+ m_state = inst_state::NOP;
+ break;
+ }
+ else if (m_inst == 0x38 && BIT(m_memscon, 1))
+ {
+ m_state = inst_state::FCAL;
+ m_icount -= 2;
+ }
+ else if (m_inst == 0x39 && BIT(m_memscon, 1))
+ {
+ m_state = inst_state::FRT;
+ m_icount -= 2;
+ }
+ else
+ m_state = inst_state::illegal;
+ break;
+
+ case inst_state::FCAL:
+ m_tmp[0] = m_fetch_byte;
+ m_state = inst_state::FCAL_2;
+ m_icount -= 2;
+ break;
+
+ case inst_state::FCAL_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_adr = m_ssp;
+ m_seg = 0;
+ m_state = inst_state::FCAL_3;
+ m_icount -= 2;
+ break;
+
+ case inst_state::FCAL_3:
+ data_write_word(0, m_adr, m_pc);
+ m_adr -= 2;
+ data_write_word(0, m_adr, m_csr);
+ m_ssp = m_adr - 2;
+ m_pc = m_tmp[0];
+ m_csr = m_fetch_byte;
+ m_state = inst_state::NOP;
+ m_icount -= 5;
+ break;
+
+ case inst_state::FRT:
+ m_adr = m_ssp + 2;
+ m_csr = data_read_word(0, m_adr) & 0x000f;
+ m_adr += 2;
+ m_pc = data_read_word(0, m_adr);
+ m_ssp = m_adr;
+ m_state = inst_state::NOP;
+ m_icount -= 9 - (2 * 2);
+ break;
+
+ case inst_state::PUSHS_A:
+ data_write_word(0, m_ssp, m_acc);
+ m_ssp -= 2;
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::op16_A_ERn_PRn:
+ m_adr = BIT(m_inst, 2) ? addr_pr(m_inst) : addr_er(m_inst);
+ m_acc = do_aluop_word(m_acc, m_data_cache.read_word(m_adr));
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::op8_A_Rn:
+ m_adr = addr_lr(m_inst);
+ m_acc = (m_acc & 0xff00) | do_aluop_byte(m_acc & 0x00ff, m_data_cache.read_byte(m_adr));
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::MOVB_Rn_N8:
+ m_adr = addr_lr(m_inst);
+ m_seg = 0;
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOV_PRn_ERn_N16:
+ m_adr = BIT(m_inst, 2) ? addr_er(m_inst) : addr_pr(m_inst);
+ m_seg = 0;
+ m_tmp[0] = m_fetch_byte;
+ m_state = inst_state::MOV_PRn_ERn_N16_2;
+ m_icount -= 2;
+ break;
+
+ case inst_state::MOV_PRn_ERn_N16_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_state = inst_state::store_word;
+ m_icount -= 2;
+ break;
+
+ case inst_state::ST_A_ind_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ next_inst_and_store_word(m_acc);
+ break;
+
+ case inst_state::ST_A_ind_DP_post:
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 2 : -2));
+ m_icount -= 5;
+ next_inst_and_store_word(m_acc);
+ break;
+
+ case inst_state::STB_A_ind_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ next_inst_and_store_byte(m_acc & 0x00ff);
+ break;
+
+ case inst_state::STB_A_ind_DP_post:
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 1 : -1));
+ m_icount -= 5;
+ next_inst_and_store_byte(m_acc & 0x00ff);
+ break;
+
+ case inst_state::ST_A_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_A;
+ break;
+
+ case inst_state::ST_A_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_A;
+ break;
+
+ case inst_state::ST_A_sfr8:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_A;
+ break;
+
+ case inst_state::ST_A_dir:
+ m_tmp[0] = m_fetch_byte;
+ m_state = inst_state::ST_A_dir_2;
+ m_icount -= 2;
+ break;
+
+ case inst_state::ST_A_dir_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[0];
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = m_acc;
+ m_state = inst_state::store_word;
+ m_icount -= 2;
+ break;
+
+ case inst_state::STB_A_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_A;
+ break;
+
+ case inst_state::STB_A_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_A;
+ break;
+
+ case inst_state::STB_A_sfr8:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_A;
+ break;
+
+ case inst_state::STB_A_dir:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::STB_A_dir_2;
+ break;
+
+ case inst_state::STB_A_dir_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[0];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_A;
+ break;
+
+ case inst_state::ST_A_ERn_PRn:
+ m_adr = BIT(m_inst, 2) ? addr_pr(m_inst) : addr_er(m_inst);
+ m_data_cache.write_word(m_adr, m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::STB_A_Rn:
+ m_adr = addr_lr(m_inst);
+ m_data_cache.write_byte(m_adr, m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::INC_DEC_PRn:
+ m_adr = addr_pr(m_inst);
+ m_tmp[0] = m_data_cache.read_word(m_adr);
+ if (BIT(m_inst, 4))
+ m_tmp[0] = do_dec(m_tmp[0]);
+ else
+ m_tmp[0] = do_inc(m_tmp[0]);
+ m_data_cache.write_word(m_adr, m_tmp[0]);
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::ACAL:
+ m_tmp[0] = (BIT(m_inst, 4) ? 0x1400 : 0x1000) | u16(m_inst & 0x03) << 8 | m_fetch_byte;
+ data_write_word(0, m_ssp, m_pc);
+ m_ssp -= 2;
+ m_pc = m_tmp[0];
+ m_icount -= 7;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::prefix_sbaoff6:
+ set_adr_off8(0xc0 | m_fetch_byte);
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_fetch_byte, 7))
+ {
+ if (BIT(m_fetch_byte, 6) != BIT(m_tmp[0], m_inst & 0x07))
+ {
+ m_state = inst_state::SJ;
+ m_icount -= 9 - 6;
+ }
+ else
+ {
+ m_state = inst_state::no_jump;
+ m_icount -= 6 - 4;
+ }
+ }
+ else
+ {
+ if (BIT(m_fetch_byte, 6))
+ m_tmp[0] &= ~(1 << (m_inst & 0x07));
+ else
+ m_tmp[0] |= 1 << (m_inst & 0x07);
+ m_state = inst_state::store_byte;
+ m_icount -= 4 - 2;
+ }
+ break;
+
+ case inst_state::prefix_sbafix6:
+ set_adr_fix8(0xc0 | m_fetch_byte);
+ m_tmp[0] = m_data_cache.read_byte(m_adr);
+ if (BIT(m_fetch_byte, 7))
+ {
+ if (BIT(m_fetch_byte, 6) != BIT(m_tmp[0], m_inst & 0x07))
+ {
+ m_state = inst_state::SJ;
+ m_icount -= 9 - 6;
+ }
+ else
+ {
+ m_state = inst_state::no_jump;
+ m_icount -= 6 - 4;
+ }
+ }
+ else
+ {
+ if (BIT(m_fetch_byte, 6))
+ m_tmp[0] &= ~(1 << (m_inst & 0x07));
+ else
+ m_tmp[0] |= 1 << (m_inst & 0x07);
+ m_state = inst_state::store_byte;
+ m_icount -= 4 - 2;
+ }
+ break;
+
+ case inst_state::prefix_PRn_ERn:
+ m_adr = BIT(m_inst, 2) ? addr_er(m_inst) : addr_pr(m_inst);
+ m_seg = 0;
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[1][m_inst];
+ break;
+
+ case inst_state::prefix_Rn:
+ m_adr = addr_lr(m_inst);
+ m_seg = 0;
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::L_A_PRn_ERn:
+ m_adr = BIT(m_inst, 2) ? addr_er(m_inst) : addr_pr(m_inst);
+ acc_load_word(m_data_cache.read_word(m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::LB_A_Rn:
+ m_adr = addr_lr(m_inst);
+ acc_load_byte(m_data_cache.read_byte(m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::L_A_ind_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ acc_load_word(data_read_word(m_seg, m_adr));
+ m_icount -= 4;
+ next_inst();
+ break;
+
+ case inst_state::L_A_ind_DP_post:
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 2 : -2));
+ acc_load_word(data_read_word(m_seg, m_adr));
+ m_icount -= 5;
+ next_inst();
+ break;
+
+ case inst_state::L_A_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ m_icount -= 2;
+ break;
+
+ case inst_state::L_A_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ break;
+
+ case inst_state::L_A_sfr8:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ break;
+
+ case inst_state::L_A_dir:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::L_A_dir_2;
+ break;
+
+ case inst_state::L_A_dir_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[0];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ break;
+
+ case inst_state::L_A_obj:
+ acc_load_word(data_read_word(m_seg, m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::L_A_D16_X1:
+ m_tmp[0] = m_fetch_byte;
+ m_tmp[1] = m_data_cache.read_word(addr_pr(0));
+ m_icount -= 2;
+ m_state = inst_state::L_A_D16_X1_2;
+ break;
+
+ case inst_state::L_A_D16_X1_2:
+ m_adr = (m_fetch_byte << 8 | m_tmp[0]) + m_tmp[1];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ break;
+
+ case inst_state::L_A_n7_ind_PR:
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ m_state = BIT(m_inst, 4) ? inst_state::LB_A_obj : inst_state::L_A_obj;
+ break;
+
+ case inst_state::prefix_PSW:
+ set_adr_sfr8(0x04 + BIT(m_inst, 4));
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::prefix_n7_ind_PR:
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ m_icount -= 6 - 2;
+ break;
+
+ case inst_state::op16_A_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::op16_A_obj;
+ break;
+
+ case inst_state::op16_A_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::op16_A_obj;
+ break;
+
+ case inst_state::op16_A_N16:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::op16_A_N16_2;
+ break;
+
+ case inst_state::op16_A_N16_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::op16_A_N16_3;
+ break;
+
+ case inst_state::op16_A_N16_3:
+ m_acc = do_aluop_word(m_acc, m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::op8_A_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::op8_A_obj;
+ break;
+
+ case inst_state::op8_A_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::op8_A_obj;
+ break;
+
+ case inst_state::op8_A_N8:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::op8_A_N8_2;
+ break;
+
+ case inst_state::op8_A_N8_2:
+ m_acc = (m_acc & 0xff00) | do_aluop_byte(m_acc & 0x00ff, m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::LB_A_ind_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ acc_load_byte(data_read_byte(m_seg, m_adr));
+ m_icount -= 4;
+ next_inst();
+ break;
+
+ case inst_state::LB_A_ind_DP_post:
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 1 : -1));
+ acc_load_byte(data_read_byte(m_seg, m_adr));
+ m_icount -= 5;
+ next_inst();
+ break;
+
+ case inst_state::LB_A_obj:
+ acc_load_byte(data_read_byte(m_seg, m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::SLL_A:
+ if (BIT(m_acc, 15))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_acc <<= 1;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::SLLB_A:
+ if (BIT(m_acc, 7))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_acc = (m_acc & 0xff00) | ((m_acc << 1) & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::SRL_A:
+ if (BIT(m_acc, 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_acc >>= 1;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::SRLB_A:
+ if (BIT(m_acc, 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_acc = (m_acc & 0xff00) | (m_acc & 0x00ff) >> 1;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::prefix_ind8_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 4;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::prefix_ind16_PRn:
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 4;
+ m_state = s_prefixed_inst_decode[1][m_inst];
+ break;
+
+ case inst_state::prefix_ind_DP_post:
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ if (BIT(m_inst, 4))
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 1 : -1));
+ else
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 2 : -2));
+ m_icount -= 3;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_fix8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_off8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_sfr8:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_dir:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::prefix_dir_2;
+ break;
+
+ case inst_state::prefix_dir_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[0];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_D16_PRn:
+ m_tmp[0] = m_fetch_byte;
+ m_tmp[1] = m_data_cache.read_word(addr_pr(m_inst));
+ m_icount -= 2;
+ m_state = inst_state::prefix_D16_PRn_2;
+ break;
+
+ case inst_state::prefix_D16_PRn_2:
+ m_adr = (m_fetch_byte << 8 | m_tmp[0]) + m_tmp[1];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = BIT(m_inst, 4) ? inst_state::prefix_obj8 : inst_state::prefix_obj16;
+ break;
+
+ case inst_state::prefix_obj8:
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::prefix_obj16:
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[1][m_inst];
+ break;
+
+ case inst_state::prefix_ind8_X1_A:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_adr = m_tmp[0] + (m_acc & 0x00ff);
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 6;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::prefix_ind16_X1_A:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_adr = m_tmp[0] + (m_acc & 0x00ff);
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 6;
+ m_state = s_prefixed_inst_decode[1][m_inst];
+ break;
+
+ case inst_state::prefix_ind8_X1_R0:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_adr = m_tmp[0] + m_data_cache.read_byte(addr_lr(0));
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 6;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::prefix_ind16_X1_R0:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_adr = m_tmp[0] + m_data_cache.read_byte(addr_lr(0));
+ m_seg = get_seg(m_adr);
+ m_inst = m_fetch_byte;
+ m_icount -= 6;
+ m_state = s_prefixed_inst_decode[1][m_inst];
+ break;
+
+ case inst_state::ROL_A:
+ m_acc = do_rol(m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::ROLB_A:
+ m_acc = (m_acc & 0xff00) | do_rolb(m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::prefix_A16:
+ set_adr_sfr8(0x06);
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[m_inst >= 0x70][m_inst];
+ break;
+
+ case inst_state::prefix_A8:
+ set_adr_sfr8(0x06);
+ m_inst = m_fetch_byte;
+ m_icount -= 2;
+ m_state = s_prefixed_inst_decode[0][m_inst];
+ break;
+
+ case inst_state::ROR_A:
+ m_acc = do_ror(m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::RORB_A:
+ m_acc = (m_acc & 0xff00) | do_rorb(m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::INCB_DECB_Rn:
+ m_adr = addr_lr(m_inst);
+ m_tmp[0] = m_data_cache.read_byte(m_adr);
+ if (BIT(m_inst, 4))
+ m_tmp[0] = do_decb(m_tmp[0]);
+ else
+ m_tmp[0] = do_incb(m_tmp[0]);
+ m_data_cache.write_byte(m_adr, m_tmp[0]);
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::CMP_fix8_N16:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::CMP_obj_N16;
+ break;
+
+ case inst_state::CMP_off8_N16:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::CMP_obj_N16;
+ break;
+
+ case inst_state::MOV_sfr8_N16:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_N16;
+ break;
+
+ case inst_state::MOV_off8_N16:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_N16;
+ break;
+
+ case inst_state::ST_A_D16_X1:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::ST_A_D16_X1_2;
+ break;
+
+ case inst_state::ST_A_D16_X1_2:
+ m_adr = m_tmp[0] + (m_fetch_byte << 8 | m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = m_acc;
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::ST_A_n7_ind_PR:
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = m_acc;
+ m_icount -= 4;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::STB_A_D16_X1:
+ m_tmp[0] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::STB_A_D16_X1_2;
+ break;
+
+ case inst_state::STB_A_D16_X1_2:
+ m_adr = m_tmp[0] + (m_fetch_byte << 8 | m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = m_acc & 0x00ff;
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::STB_A_n7_ind_PR:
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_tmp[0] = m_acc;
+ m_icount -= 4;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::RC_SC:
+ if (BIT(m_inst, 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::INC_A:
+ m_acc = do_inc(m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::NEG_A:
+ m_acc = do_sub(0, m_acc);
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::INCB_A:
+ m_acc = (m_acc & 0xff00) | do_incb(m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::NEGB_A:
+ m_acc = (m_acc & 0xff00) | do_subb(0, m_acc & 0x00ff);
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::CMPB_fix8_N8:
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::CMPB_obj_N8;
+ break;
+
+ case inst_state::CMPB_off8_N8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::CMPB_obj_N8;
+ break;
+
+ case inst_state::MOVB_sfr8_N8:
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_N8;
+ break;
+
+ case inst_state::MOVB_off8_N8:
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::MOVB_obj_N8;
+ break;
+
+ case inst_state::RDD_SDD:
+ if (BIT(m_inst, 0))
+ m_psw |= 0x1000;
+ else
+ m_psw &= 0xefff;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::DI_EI:
+ if (BIT(m_inst, 0))
+ m_psw |= 0x0100;
+ else
+ m_psw &= 0xfeff;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::DEC_A:
+ m_acc = do_dec(m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::SWAP:
+ m_acc = swapendian_int16(m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::DECB_A:
+ m_acc = (m_acc & 0xff00) | do_decb(m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::VCAL:
+ m_adr = m_ssp;
+ data_write_word(0, m_adr, m_pc - 1);
+ if (BIT(m_memscon, 1))
+ {
+ m_adr -= 2;
+ data_write_word(0, m_adr, m_csr);
+ }
+ m_ssp = m_adr - 2;
+ m_csr = 0;
+ m_pc = 0x004a + (m_inst & 0x0f) * 2;
+ m_state = inst_state::J_Cadr; // hack
+ m_icount -= 3;
+ break;
+
+ case inst_state::JGT_JLE:
+ if ((BIT(m_psw, 14) || BIT(m_psw, 15)) == BIT(m_inst, 2))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::JZ_JNZ:
+ if (BIT(m_psw, 14) != BIT(m_inst, 2))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::JCY_JNC:
+ if (BIT(m_psw, 15) != BIT(m_inst, 2))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::JNS_JPS:
+ if (BIT(m_psw, 11) != BIT(m_inst, 2))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::L_A_N16:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::L_A_N16_2;
+ break;
+
+ case inst_state::L_A_N16_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::L_A_N16_3;
+ break;
+
+ case inst_state::L_A_N16_3:
+ acc_load_word(m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::LB_A_N8:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::LB_A_N8_2;
+ break;
+
+ case inst_state::LB_A_N8_2:
+ acc_load_byte(m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CLR_A:
+ acc_load_word(0);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CLRB_A:
+ acc_load_byte(0);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::EXTND:
+ if (BIT(m_acc, 7))
+ {
+ m_acc |= 0xff00;
+ m_psw |= 0x2000;
+ }
+ else
+ {
+ m_acc &= 0x00ff;
+ m_psw &= 0xdfff;
+ }
+ m_psw |= 0x1000;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CPL_C:
+ m_psw ^= 0x8000;
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CAL_Cadr:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CAL_Cadr_2;
+ break;
+
+ case inst_state::CAL_Cadr_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_adr = m_ssp;
+ m_seg = 0;
+ m_ssp -= 2;
+ std::swap(m_pc, m_tmp[0]);
+ m_icount -= 5;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::BRK:
+ reset(); // hacky method of performing a "software system reset"
+ m_pc = 0x0002;
+ m_icount -= 2;
+ m_state = inst_state::J_Cadr;
+ break;
+
+ case inst_state::RB_SB_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07))
+ m_psw &= 0xbfff;
+ else
+ m_psw |= 0x4000;
+ if (BIT(m_inst, 3))
+ m_tmp[0] |= 1 << (m_inst & 0x07);
+ else
+ m_tmp[0] &= ~(1 << (m_inst & 0x07));
+ m_icount -= 3;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::MB_C_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::MB_obj_bit_C:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_psw, 15))
+ m_tmp[0] |= 1 << (m_inst & 0x07);
+ else
+ m_tmp[0] &= ~(1 << (m_inst & 0x07));
+ m_icount -= 3;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::JBR_JBS_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07) == BIT(m_inst, 3))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 6;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::JBRS_JBSR_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07) == BIT(m_inst, 3))
+ {
+ m_tmp[0] ^= 1 << (m_inst & 0x07);
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 8;
+ m_state = inst_state::store_byte;
+ }
+ else
+ {
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ }
+ break;
+
+ case inst_state::BAND_C_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07) == BIT(m_inst, 3))
+ m_psw &= 0x7fff;
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::BOR_C_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07) != BIT(m_inst, 3))
+ m_psw |= 0x8000;
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::BXOR_C_obj_bit:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_inst & 0x07))
+ m_psw ^= 0x8000;
+ m_icount -= 3;
+ next_inst();
+ break;
+
+ case inst_state::MOV_ERn_PRn_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_data_cache.write_word(BIT(m_inst, 2) ? addr_pr(m_inst) : addr_er(m_inst), m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::MOVB_Rn_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_data_cache.write_byte(addr_lr(m_inst), m_tmp[0]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::op16_obj_fix8:
+ m_tmp[1] = m_data_cache.read_word(0x0200 | m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMP_obj1_obj2 : inst_state::op16_obj1_obj2;
+ break;
+
+ case inst_state::op8_obj_fix8:
+ m_tmp[1] = m_data_cache.read_byte(0x0200 | m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMPB_obj1_obj2 : inst_state::op8_obj1_obj2;
+ break;
+
+ case inst_state::op16_obj_off8:
+ m_tmp[1] = data_read_word(get_seg((m_lrb & 0xff00) | m_fetch_byte), (m_lrb & 0xff00) | m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMP_obj1_obj2 : inst_state::op16_obj1_obj2;
+ break;
+
+ case inst_state::op8_obj_off8:
+ m_tmp[1] = data_read_byte(get_seg((m_lrb & 0xff00) | m_fetch_byte), (m_lrb & 0xff00) | m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMPB_obj1_obj2 : inst_state::op8_obj1_obj2;
+ break;
+
+ case inst_state::op16_obj_sfr8:
+ m_tmp[1] = data_read_word(0, m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMP_obj1_obj2 : inst_state::op16_obj1_obj2;
+ break;
+
+ case inst_state::op8_obj_sfr8:
+ m_tmp[1] = data_read_byte(0, m_fetch_byte);
+ m_icount -= 2;
+ m_state = (m_inst & 0x90) == 0x90 ? inst_state::CMPB_obj1_obj2 : inst_state::op8_obj1_obj2;
+ break;
+
+ case inst_state::op16_obj1_obj2:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[0] = do_aluop_word(m_tmp[0], m_tmp[1]);
+ m_icount -= 3;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::op8_obj1_obj2:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[0] = do_aluop_byte(m_tmp[0], m_tmp[1]);
+ m_icount -= 3;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::op16_obj_N16:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::op16_obj_N16_2;
+ break;
+
+ case inst_state::op16_obj_N16_2:
+ m_tmp[1] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::op16_obj_N16_3;
+ break;
+
+ case inst_state::op16_obj_N16_3:
+ m_tmp[0] = do_aluop_word(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::op8_obj_N8:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::op8_obj_N8_2;
+ break;
+
+ case inst_state::op8_obj_N8_2:
+ m_tmp[0] = do_aluop_byte(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::op16_obj_A:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[0] = do_aluop_word(m_tmp[0], m_acc);
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::op8_obj_A:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[0] = do_aluop_byte(m_tmp[0], m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::op16_A_obj:
+ m_acc = do_aluop_word(m_acc, data_read_word(m_seg, m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::op8_A_obj:
+ m_acc = (m_acc & 0xff00) | do_aluop_byte(m_acc & 0x00ff, data_read_byte(m_seg, m_adr));
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::MOV_fix8_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOV_off8_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOVB_fix8_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ set_adr_fix8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOVB_off8_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ set_adr_off8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOV_ind_PRn_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::MOV_ind_DP_post_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_tmp[0] + (BIT(m_inst, 1) ? 2 : -2));
+ m_icount -= 5;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::MOVB_ind_PRn_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_adr = m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::MOVB_ind_DP_post_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = addr_pr(2);
+ m_adr = m_data_cache.read_word(m_tmp[1]);
+ m_seg = get_seg(m_adr);
+ m_data_cache.write_word(m_tmp[1], m_adr + (BIT(m_inst, 1) ? 1 : -1));
+ m_icount -= 5;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::SLL_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_psw &= 0x7fff;
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 15))
+ m_psw |= 0x8000;
+ m_tmp[0] <<= 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::SLLB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_psw &= 0x7fff;
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 7))
+ m_psw |= 0x8000;
+ m_tmp[0] <<= 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::CMP_obj1_obj2:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ (void)do_sub(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CMPB_obj1_obj2:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ (void)do_subb(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CMP_obj_N16:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CMP_obj_N16_2;
+ break;
+
+ case inst_state::CMP_obj_N16_2:
+ m_tmp[1] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::CMP_obj_N16_3;
+ break;
+
+ case inst_state::CMP_obj_N16_3:
+ (void)do_sub(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CMPB_obj_N8:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CMPB_obj_N8_2;
+ break;
+
+ case inst_state::CMPB_obj_N8_2:
+ (void)do_subb(m_tmp[0], m_tmp[1]);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CMP_obj_A:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ (void)do_sub(m_tmp[0], m_acc);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::CMPB_obj_A:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ (void)do_subb(m_tmp[0], m_acc & 0x00ff);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::MOV_sfr8_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOV_A_obj:
+ m_acc = data_read_word(m_seg, m_adr);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::MOVB_sfr8_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ set_adr_sfr8(m_fetch_byte);
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOVB_A_obj:
+ m_acc = (m_acc & 0xff00) | data_read_byte(m_seg, m_adr);
+ m_icount -= 2;
+ next_inst();
+ break;
+
+ case inst_state::MOV_D16_PRn_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::MOV_dir_obj_2;
+ break;
+
+ case inst_state::MOV_D16_PRn_obj_2:
+ m_adr = (m_fetch_byte << 8 | m_tmp[1]) + m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOVB_D16_PRn_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::MOV_dir_obj_2;
+ break;
+
+ case inst_state::MOVB_D16_PRn_obj_2:
+ m_adr = (m_fetch_byte << 8 | m_tmp[1]) + m_data_cache.read_word(addr_pr(m_inst));
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOV_n7_ind_PR_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOVB_n7_ind_PR_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_adr = m_data_cache.read_word(addr_pr(2 + BIT(m_fetch_byte, 7))) + util::sext(m_fetch_byte, 7);
+ m_seg = get_seg(m_adr);
+ m_icount -= 4;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::MOV_dir_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::MOV_dir_obj_2;
+ break;
+
+ case inst_state::MOV_dir_obj_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[1];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOVB_dir_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::MOVB_dir_obj_2;
+ break;
+
+ case inst_state::MOVB_dir_obj_2:
+ m_adr = m_fetch_byte << 8 | m_tmp[1];
+ m_seg = get_seg(m_adr);
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::SRL_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_tmp[0] >>= 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::SRLB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_tmp[0] >>= 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::TJNZ_TJZ:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ if (BIT(m_inst, 0) ? m_tmp[0] == 0 : m_tmp[0] != 0)
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::TJNZB_TJZB:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_inst, 0) ? m_tmp[0] == 0 : m_tmp[0] != 0)
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 4;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::DIV_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ do_div(m_tmp[0]);
+ m_icount -= 42;
+ next_inst();
+ break;
+
+ case inst_state::DIVB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ do_divb(m_tmp[0]);
+ m_icount -= 22;
+ next_inst();
+ break;
+
+ case inst_state::MUL_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ do_mul(m_tmp[0]);
+ m_icount -= 21; // TODO: 3 if high-speed multiplier provided
+ next_inst();
+ break;
+
+ case inst_state::MULB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ m_acc = (m_acc & 0x00ff) * m_tmp[0];
+ if (m_acc == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ m_icount -= 12; // TODO: 2 if high-speed multiplier provided
+ next_inst();
+ break;
+
+ case inst_state::MOV_obj_A:
+ m_icount -= 2;
+ next_inst_and_store_word(m_acc);
+ break;
+
+ case inst_state::MOV_obj_N16:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::MOV_obj_N16_2;
+ break;
+
+ case inst_state::MOV_obj_N16_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::MOVB_obj_A:
+ m_icount -= 2;
+ next_inst_and_store_byte(m_acc & 0x00ff);
+ break;
+
+ case inst_state::MOVB_obj_N8:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::ROL_ROR_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ m_tmp[0] = BIT(m_inst, 4) ? do_ror(m_tmp[0]) : do_rol(m_tmp[0]);
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::ROLB_RORB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ m_tmp[0] = BIT(m_inst, 4) ? do_rorb(m_tmp[0]) : do_rolb(m_tmp[0]);
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::CMPC_LC_A_Tadr:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CMPC_LC_A_Tadr_2;
+ break;
+
+ case inst_state::CMPC_LC_A_Tadr_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = BIT(m_inst, 0) ? inst_state::LC_A_obj_3 : inst_state::CMPC_A_obj_3;
+ break;
+
+ case inst_state::CMPCB_LCB_A_Tadr:
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CMPCB_LCB_A_Tadr_2;
+ break;
+
+ case inst_state::CMPCB_LCB_A_Tadr_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = BIT(m_inst, 0) ? inst_state::LCB_A_obj_3 : inst_state::CMPCB_A_obj_3;
+ break;
+
+ case inst_state::SBR_RBR_obj:
+ m_adr += (m_acc & 0x00f8) >> 3;
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_acc & 0x0007))
+ m_psw &= 0xbfff;
+ else
+ m_psw |= 0x4000;
+ if (BIT(m_inst, 0))
+ m_tmp[0] &= ~(1 << (m_acc & 0x0007));
+ else
+ m_tmp[0] |= 1 << (m_acc & 0x0007);
+ m_icount -= 5;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::MBR_C_obj:
+ m_adr += (m_acc & 0x00f8) >> 3;
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_acc & 0x0007))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_icount -= 6;
+ next_inst();
+ break;
+
+ case inst_state::MBR_obj_C:
+ m_adr += (m_acc & 0x00f8) >> 3;
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_psw, 15))
+ m_tmp[0] |= 1 << (m_acc & 0x0007);
+ else
+ m_tmp[0] &= ~(1 << (m_acc & 0x0007));
+ m_icount -= 5;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::INC_DEC_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ if (BIT(m_inst, 4))
+ m_tmp[0] = do_dec(m_tmp[0]);
+ else
+ m_tmp[0] = do_inc(m_tmp[0]);
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::CLR_FILL_obj:
+ m_tmp[0] = BIT(m_inst, 4) ? 0xffff : 0;
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::XCHG_A_obj:
+ m_tmp[1] = data_read_word(m_seg, m_adr);
+ m_tmp[0] = m_acc;
+ m_acc = m_tmp[1];
+ m_icount -= 3;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::TBR_obj:
+ m_adr += (m_acc & 0x00f8) >> 3;
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_tmp[0], m_acc & 0x0007))
+ m_psw &= 0xbfff;
+ else
+ m_psw |= 0x4000;
+ m_icount -= 5;
+ next_inst();
+ break;
+
+ case inst_state::J_ind_obj:
+ m_pc = data_read_word(m_seg, m_adr);
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::CMPC_LC_A_ind_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = data_read_word(0x8000 | m_tsr, m_tmp[0]);
+ if (BIT(m_inst, 1))
+ {
+ m_acc = m_tmp[1];
+ if (m_tmp[1] == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ }
+ else
+ (void)do_sub(m_acc, m_tmp[1]);
+ m_icount -= 9;
+ next_inst();
+ break;
+
+ case inst_state::CMPCB_LCB_A_ind_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = data_read_byte(0x8000 | m_tsr, m_tmp[0]);
+ m_acc = (m_acc & 0xff00) | m_tmp[1];
+ if (BIT(m_inst, 1))
+ {
+ if (m_tmp[1] == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ }
+ else
+ (void)do_subb(m_acc & 0x00ff, m_tmp[1]);
+ m_icount -= 6;
+ next_inst();
+ break;
+
+ case inst_state::CMPC_LC_A_T16_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ m_tmp[1] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::CMPC_LC_A_T16_obj_2;
+ break;
+
+ case inst_state::CMPC_LC_A_T16_obj_2:
+ m_tmp[0] += m_fetch_byte << 8 | m_tmp[1];
+ m_icount -= 2;
+ if (BIT(m_inst, 4))
+ m_state = BIT(m_inst, 1) ? inst_state::LCB_A_obj_3 : inst_state::CMPCB_A_obj_3;
+ else
+ m_state = BIT(m_inst, 1) ? inst_state::LC_A_obj_3 : inst_state::CMPC_A_obj_3;
+ break;
+
+ case inst_state::CMPC_A_obj_3:
+ m_tmp[1] = data_read_word(0x8000 | m_tsr, m_tmp[0]);
+ (void)do_sub(m_acc, m_tmp[1]);
+ m_icount -= 9;
+ next_inst();
+ break;
+
+ case inst_state::CMPCB_A_obj_3:
+ m_tmp[1] = data_read_byte(0x8000 | m_tsr, m_tmp[0]);
+ (void)do_subb(m_acc & 0x00ff, m_tmp[1]);
+ m_icount -= 6;
+ next_inst();
+ break;
+
+ case inst_state::LC_A_obj_3:
+ m_tmp[1] = data_read_word(0x8000 | m_tsr, m_tmp[0]);
+ m_acc = m_tmp[1];
+ if (m_tmp[1] == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ m_icount -= 9;
+ next_inst();
+ break;
+
+ case inst_state::LCB_A_obj_3:
+ m_tmp[1] = data_read_byte(0x8000 | m_tsr, m_tmp[0]);
+ m_acc = (m_acc & 0xff00) | m_tmp[1];
+ if (m_tmp[1] == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ m_icount -= 6;
+ next_inst();
+ break;
+
+ case inst_state::INCB_DECB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ if (BIT(m_inst, 4))
+ m_tmp[0] = do_decb(m_tmp[0]);
+ else
+ m_tmp[0] = do_incb(m_tmp[0]);
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::CLRB_FILLB_obj:
+ m_tmp[0] = BIT(m_inst, 4) ? 0xff : 0;
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::XCHGB_A_obj:
+ m_tmp[1] = data_read_byte(m_seg, m_adr);
+ m_tmp[0] = m_acc & 0x00ff;
+ m_acc = (m_acc & 0xff00) | m_tmp[1];
+ m_icount -= 3;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::DJNZ_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ --m_tmp[0];
+ if (m_tmp[0] != 0)
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 6;
+ }
+ else
+ m_icount -= 3;
+ m_state = inst_state::store_byte;
+ break;
+
+ case inst_state::CAL_ind_obj:
+ m_tmp[0] = m_pc - 1;
+ m_pc = data_read_word(m_seg, m_adr);
+ m_adr = m_ssp;
+ m_seg = 0;
+ m_ssp -= 2;
+ m_icount -= 3;
+ m_state = inst_state::store_word;
+ break;
+
+ case inst_state::SRA_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_tmp[0] = (m_tmp[0] & 0x8000) | m_tmp[0] >> 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::SRAB_obj:
+ m_tmp[0] = data_read_byte(m_seg, m_adr);
+ for (int n = m_inst & 0x03; n >= 0; n--)
+ {
+ if (BIT(m_tmp[0], 0))
+ m_psw |= 0x8000;
+ else
+ m_psw &= 0x7fff;
+ m_tmp[0] = (m_tmp[0] & 0x80) | m_tmp[0] >> 1;
+ --m_icount;
+ }
+ m_icount -= 2;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::MOV_obj_ind_X1_A:
+ m_tmp[1] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] += m_acc & 0x00ff;
+ m_tmp[0] = data_read_word(get_seg(m_tmp[1]), m_tmp[1]);
+ m_icount -= 6;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::MOV_obj_ind_X1_R0:
+ m_tmp[1] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] += m_data_cache.read_byte(addr_lr(0));
+ m_tmp[0] = data_read_word(get_seg(m_tmp[1]), m_tmp[1]);
+ m_icount -= 6;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::MOVB_obj_ind_X1_A:
+ m_tmp[1] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] += m_acc & 0x00ff;
+ m_tmp[0] = data_read_word(get_seg(m_tmp[1]), m_tmp[1]);
+ m_icount -= 6;
+ next_inst_and_store_word(m_tmp[0]);
+ break;
+
+ case inst_state::MOVB_obj_ind_X1_R0:
+ m_tmp[1] = m_data_cache.read_word(addr_pr(0));
+ m_tmp[1] += m_data_cache.read_byte(addr_lr(0));
+ m_tmp[0] = data_read_byte(get_seg(m_tmp[1]), m_tmp[1]);
+ m_icount -= 6;
+ next_inst_and_store_byte(m_tmp[0]);
+ break;
+
+ case inst_state::FJ:
+ if (!BIT(m_memscon, 1))
+ {
+ m_state = inst_state::illegal;
+ break;
+ }
+ m_tmp[0] = m_fetch_byte;
+ m_icount -= 2;
+ m_state = inst_state::FJ_2;
+ break;
+
+ case inst_state::FJ_2:
+ m_tmp[0] |= m_fetch_byte << 8;
+ m_icount -= 2;
+ m_state = inst_state::FJ_3;
+ break;
+
+ case inst_state::FJ_3:
+ m_csr = m_fetch_byte & 0x0f;
+ m_pc = m_tmp[0];
+ m_icount -= 3;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::DIVQ_obj:
+ m_tmp[0] = data_read_word(m_seg, m_adr);
+ do_divq(m_tmp[0]);
+ m_icount -= 42;
+ next_inst();
+ break;
+
+ case inst_state::JLTS_JGES:
+ if ((BIT(m_psw, 9) != BIT(m_psw, 11)) != BIT(m_inst, 1))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 6;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::JLES_JGTS:
+ if (((BIT(m_psw, 9) != BIT(m_psw, 11)) || BIT(m_psw, 14)) != BIT(m_inst, 1))
+ {
+ m_pc += s8(m_fetch_byte);
+ m_icount -= 6;
+ }
+ else
+ m_icount -= 2;
+ m_state = inst_state::NOP;
+ break;
+
+ case inst_state::illegal:
+ logerror("%06X: Illegal prefixed opcode %02X encountered\n", m_ppc, m_inst);
+ reset();
+ m_pc = 0x0006;
+ m_icount -= 2;
+ m_state = inst_state::J_Cadr;
+ break;
+ }
+ }
+ while (m_icount > 0);
+}
+
+
+void msm665xx_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = util::string_format("%c%c%c%c%c%c%c%c",
+ BIT(m_psw, 15) ? 'C' : '.',
+ BIT(m_psw, 14) ? 'Z' : '.',
+ BIT(m_psw, 13) ? 'H' : '.',
+ BIT(m_psw, 12) ? 'D' : 'd',
+ BIT(m_psw, 11) ? 'S' : '.',
+ BIT(m_psw, 10) ? 'P' : '.',
+ BIT(m_psw, 9) ? 'V' : '.',
+ BIT(m_psw, 8) ? 'I' : '.');
+ break;
+ }
+}
diff --git a/src/devices/cpu/olms66k/msm665xx.h b/src/devices/cpu/olms66k/msm665xx.h
new file mode 100644
index 00000000000..a4132aea6fb
--- /dev/null
+++ b/src/devices/cpu/olms66k/msm665xx.h
@@ -0,0 +1,198 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/**********************************************************************
+
+ Oki MSM665xx 16-bit microcontroller family (nX-8/500S core)
+
+**********************************************************************/
+
+#ifndef MAME_CPU_OLMS66K_MSM665XX_H
+#define MAME_CPU_OLMS66K_MSM665XX_H
+
+#pragma once
+
+
+class msm665xx_device : public cpu_device
+{
+public:
+ enum {
+ MSM665XX_ACC, MSM665XX_PC, MSM665XX_PSW, MSM665XX_LRB, MSM665XX_SSP,
+ MSM665XX_PR0, MSM665XX_X1 = MSM665XX_PR0,
+ MSM665XX_PR1, MSM665XX_X2 = MSM665XX_PR1,
+ MSM665XX_PR2, MSM665XX_DP = MSM665XX_PR2,
+ MSM665XX_PR3, MSM665XX_USP = MSM665XX_PR3,
+ MSM665XX_ER0, MSM665XX_ER1, MSM665XX_ER2, MSM665XX_ER3,
+ MSM665XX_R0, MSM665XX_R1, MSM665XX_R2, MSM665XX_R3,
+ MSM665XX_R4, MSM665XX_R5, MSM665XX_R6, MSM665XX_R7,
+ MSM665XX_CSR, MSM665XX_DSR, MSM665XX_TSR,
+ MSM665XX_ROMWIN, MSM665XX_MEMSCON
+ };
+
+ // TODO: port callbacks
+
+protected:
+ msm665xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor data_map);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ virtual void execute_run() override;
+ virtual u32 execute_min_cycles() const noexcept override { return 2; }
+ virtual u32 execute_max_cycles() const noexcept override { return 42; }
+
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ u16 ssp_r();
+ void ssp_w(u16 data);
+ u16 lrb_r();
+ void lrb_w(offs_t offset, u16 data, u16 mem_mask);
+ u16 psw_r();
+ void psw_w(offs_t offset, u16 data, u16 mem_mask);
+ u16 acc_r();
+ void acc_w(offs_t offset, u16 data, u16 mem_mask);
+ u8 dsr_r();
+ void dsr_w(u8 data);
+ u8 tsr_r();
+ void tsr_w(u8 data);
+ u8 romwin_r();
+ void romwin_w(u8 data);
+ void memsacp_w(u8 data);
+ u8 memscon_r();
+ void memscon_w(u8 data);
+
+private:
+ u16 addr_lr(u8 n) const noexcept { return 0x0200 + (n & 7) + (m_lrb & 0x00ff) * 8; }
+ u16 addr_er(u8 n) const noexcept { return 0x0200 + (n & 3) * 2 + (m_lrb & 0x00ff) * 8; }
+ u16 addr_pr(u8 n) const noexcept { return 0x0200 + (n & 3) * 2 + (m_psw & 0x0007) * 8; }
+
+ void set_adr_fix8(u8 fix8) noexcept { m_adr = 0x0200 | fix8; m_seg = 0; }
+ void set_adr_off8(u8 off8) noexcept { m_adr = (m_lrb & 0xff00) | off8; m_seg = get_seg(m_adr); }
+ void set_adr_sfr8(u8 sfr8) noexcept { m_adr = sfr8; m_seg = 0; }
+
+ u16 get_seg(u16 addr) const noexcept;
+
+ u8 data_read_byte(u16 seg, u16 adr) { return s16(seg) < 0 ? m_program_space.read_byte(u32(seg) << 16 | adr) : m_data_space.read_byte(u32(seg) << 16 | adr); }
+ u16 data_read_word(u16 seg, u16 adr) { return s16(seg) < 0 ? m_program_space.read_word_unaligned(u32(seg) << 16 | adr) : m_data_space.read_word(u32(seg) << 16 | adr); }
+ void data_write_byte(u16 seg, u16 adr, u8 data) { m_data_space.write_byte(u32(seg) << 16 | adr, data); }
+ void data_write_word(u16 seg, u16 adr, u16 data) { m_data_space.write_word(u32(seg) << 16 | adr, data); }
+
+ void next_inst() { m_inst = m_fetch_byte; m_state = s_inst_decode[BIT(m_psw, 12)][m_inst]; m_ppc = u32(m_csr) << 16 | u16(m_pc - 1); debugger_instruction_hook(m_ppc); }
+ void next_inst_and_store_byte(u8 data) { m_inst = m_fetch_byte; m_state = s_inst_decode[BIT(m_psw, 12)][m_inst]; data_write_byte(m_seg, m_adr, data); m_ppc = u32(m_csr) << 16 | u16(m_pc - 1); debugger_instruction_hook(m_ppc); }
+ void next_inst_and_store_word(u16 data) { m_inst = m_fetch_byte; m_state = s_inst_decode[BIT(m_psw, 12)][m_inst]; data_write_word(m_seg, m_adr, data); m_ppc = u32(m_csr) << 16 | u16(m_pc - 1); debugger_instruction_hook(m_ppc); }
+ void prefetch() { m_fetch_byte = m_program_cache.read_byte(u32(m_csr) << 16 | m_pc); ++m_pc; }
+
+ void acc_load_byte(u8 data) noexcept
+ {
+ m_acc = (m_acc & 0xff00) | data;
+ if (data == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ m_psw &= 0xefff;
+ }
+
+ void acc_load_word(u16 data) noexcept
+ {
+ m_acc = data;
+ if (data == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ m_psw |= 0x1000;
+ }
+
+ void setzs_byte(u8 data) noexcept
+ {
+ if (data == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (s8(data) < 0)
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ }
+
+ void setzs_word(u16 data) noexcept
+ {
+ if (data == 0)
+ m_psw |= 0x4000;
+ else
+ m_psw &= 0xbfff;
+ if (s16(data) < 0)
+ m_psw |= 0x0800;
+ else
+ m_psw &= 0xf7ff;
+ }
+
+ u16 do_add(u16 n1, u16 n2, bool c = false) noexcept;
+ u8 do_addb(u8 n1, u8 n2, bool c = false) noexcept;
+ u16 do_sub(u16 n1, u16 n2, bool c = false) noexcept;
+ u8 do_subb(u8 n1, u8 n2, bool c = false) noexcept;
+ u16 do_aluop_word(u16 n1, u16 n2) noexcept;
+ u8 do_aluop_byte(u8 n1, u8 n2) noexcept;
+ u16 do_inc(u16 n) noexcept;
+ u8 do_incb(u8 n) noexcept;
+ u16 do_dec(u16 n) noexcept;
+ u8 do_decb(u8 n) noexcept;
+ u16 do_rol(u16 n) noexcept;
+ u8 do_rolb(u8 n) noexcept;
+ u16 do_ror(u16 n) noexcept;
+ u8 do_rorb(u8 n) noexcept;
+ void do_mul(u16 n) noexcept;
+ void do_div(u16 n) noexcept;
+ void do_divb(u8 n) noexcept;
+ void do_divq(u16 n) noexcept;
+
+ enum class inst_state : u8;
+ static const inst_state s_inst_decode[2][0x100];
+ static const inst_state s_prefixed_inst_decode[2][0x100];
+
+ address_space_config m_program_config;
+ address_space_config m_data_config;
+ memory_access<20, 0, 0, ENDIANNESS_LITTLE>::cache m_program_cache;
+ memory_access<20, 0, 0, ENDIANNESS_LITTLE>::specific m_program_space;
+ memory_access<20, 1, 0, ENDIANNESS_LITTLE>::cache m_data_cache;
+ memory_access<20, 1, 0, ENDIANNESS_LITTLE>::specific m_data_space;
+
+ u16 m_acc;
+ u16 m_pc;
+ u32 m_ppc;
+ u16 m_psw;
+ u16 m_lrb;
+ u16 m_ssp;
+ u8 m_csr;
+ u8 m_dsr;
+ u8 m_tsr;
+ u8 m_romwin;
+ u8 m_memscon;
+
+ inst_state m_state;
+ u8 m_inst;
+ u8 m_fetch_byte;
+ u16 m_adr;
+ u16 m_seg;
+ u16 m_tmp[2];
+ s32 m_icount;
+};
+
+
+class msm66573_device : public msm665xx_device
+{
+public:
+ // device type constructor
+ msm66573_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+private:
+ void data_map(address_map &map) ATTR_COLD;
+};
+
+
+// device type declaration
+DECLARE_DEVICE_TYPE(MSM66573, msm66573_device)
+
+#endif // MAME_CPU_OLMS66K_MSM665XX_H
diff --git a/src/devices/cpu/olms66k/nx8dasm.cpp b/src/devices/cpu/olms66k/nx8dasm.cpp
new file mode 100644
index 00000000000..2b56815369d
--- /dev/null
+++ b/src/devices/cpu/olms66k/nx8dasm.cpp
@@ -0,0 +1,1019 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/***************************************************************************
+
+ Oki nX-8/500S disassembler
+
+ The decoding of instructions depends heavily on the dynamic state of
+ the data descriptor flag (DD = PSWH.4 = PSW.12). This flag is
+ implicitly set or cleared by accumulator load instructions.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "nx8dasm.h"
+
+#include <sstream>
+
+
+namespace {
+
+const u16 f_dummy_psw = 0;
+
+
+const char *const f_reg_names[3][4] =
+{
+ { "ER0", "ER1", "ER2", "ER3" },
+ { "X1", "X2", "DP", "USP" },
+ { "SSP", "LRB", "PSW", "A" }
+};
+
+const char *const f_pr_indirect[4] =
+{
+ "[X1]",
+ "[DP-]",
+ "[DP]",
+ "[DP+]"
+};
+
+const char *const f_bit_ops[4] =
+{
+ "SB",
+ "RB",
+ "JBS",
+ "JBR"
+};
+
+const char *const f_alu_ops[2][8] =
+{
+ { "SUBB", "CMPB", "ADDB", "ANDB", "ORB", "XORB", "SBCB", "ADCB" },
+ { "SUB", "CMP", "ADD", "AND", "OR", "XOR", "SBC", "ADC" }
+};
+
+const char *const f_jconds[8] =
+{
+ "JGT",
+ "JEQ", // alias JZ
+ "JLT", // alias JCY
+ "JNS",
+ "JPS",
+ "JGE", // alias JNC
+ "JNE", // alias JNZ
+ "JLE"
+};
+
+const char *const f_signed_jconds[4] =
+{
+ "JLTS",
+ "JLES",
+ "JGTS",
+ "JGES"
+};
+
+// FIXME: these lists combine MSM66573 and MSM66577 SFRs, including a few existing only on one or the other
+const char *const f_msm6657x_byte_sfr_names[256] =
+{
+ nullptr, nullptr, "LRBL", "LRBH", "PSWL", "PSWH", "ACCL", "ACCH",
+ "TSR", "DSR", nullptr, "ROMWIN", "ROMRDY", "RAMRDY", "STPACP", "SBYCON",
+ "MEMSACP", "MEMSCON", nullptr, "RTCCON", nullptr, "PRPHCON", nullptr, nullptr,
+ "P0", "P1", "P2", "P3", "P4", "P5", "P6", "P7",
+ "P0IO", "P1IO", "P2IO", "P3IO", "P4IO", "P5IO", "P6IO", "P7IO",
+ "P0SF", "P1SF", "P2SF", "P3SF", "P4SF", "P5SF", "P6SF", "P7SF",
+ "IRQ0", "IRQ1", "IRQ2", "IRQ3", "IE0", "IE1", "IE2", "IE3",
+ "IP0", "IP1", "IP2", "IP3", "IP4", "IP5", "IP6", "IP7",
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "FRCON", "CAPCON", nullptr, nullptr, nullptr, "CPCMCON0", "CPCMCON1", nullptr,
+ "EXI0CON", "EXI1CON", "EXI2CON", nullptr, "IRQ4", "IE4", "IP8", "IP9",
+ "TBCKDVR", nullptr, nullptr, nullptr, nullptr, nullptr, "TM0CON", nullptr,
+ "TM1C", "TM2C", "TM1R", "TM2R", "TM1CON", "TM2CON", nullptr, nullptr,
+ "TM3C", "TM3R", "TM3CON", nullptr, "TM4C", "TM4R", "TM4CON", nullptr,
+ "TM5C", "TM5R", "TM5CON", nullptr, "TM6C", "TM6R", "TM6CON", nullptr,
+ "ST0CON", "SR0CON", "S0BUF", "S0STAT", "ST1CON", "SR1CON", "S1CON", "S1STAT",
+ nullptr, nullptr, "SIO3CON", "SIO3R", "SIO4CON", "FIFOCON", "SIN4", "SOUT4",
+ "PWR0", "PWR1", "PWR2", "PWR3", "PWCY0", "PWCY1", "PWC0", "PWC1",
+ "PWCON0", "PWCON1", nullptr, nullptr, "ADCON0L", "ADCON0H", "ADINT0", nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "P8", "P9", "P10", "P11", "P12", nullptr, "P14", "P15",
+ "P8IO", "P9IO", "P10IO", "P11IO", "P14IO", "P15IO", "P14SF", "P15SF",
+ "P8SF", "P9SF", "P10SF", "P11SF", "TM9C", "TM9R", "TM9CON", "FIFOMOD",
+ nullptr, nullptr, nullptr, nullptr, nullptr, "SIO5CON", "SIN5", "SOUT5",
+ nullptr, nullptr, nullptr, nullptr, nullptr, "DACON", "DAR0", "DAR1",
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "FLAACP", "FLACON", nullptr, nullptr, "ST6CON", "SR6CON", "S6BUF", "S6STAT",
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr
+};
+
+const char *const f_msm6657x_word_sfr_names[128] =
+{
+ "SSP", "LRB", "PSW", "ACC", "DSTSR", nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "FRC", nullptr, nullptr, nullptr, nullptr, "CPCMR0", "CPCMR1", nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "TBCKDV", "TM0C", "TM0R", nullptr, "TM12C", "TM12R", nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ "PWR01", "PWR23", "PWCY", "PWC", nullptr, nullptr, nullptr, nullptr,
+ "ADR00", "ADR01", "ADR02", "ADR03", "ADR04", "ADR05", "ADR06", "ADR07",
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr, nullptr,
+ nullptr, nullptr, nullptr, nullptr, nullptr, "CPCMBFR0", "CPCMBFR0", nullptr,
+ nullptr, "FLAADRS", nullptr, nullptr, nullptr, nullptr, nullptr, nullptr
+};
+
+
+void format_n8(std::ostream &stream, u8 n8)
+{
+ if (n8 >= 0xa0)
+ stream << '0';
+ util::stream_format(stream, "%02XH", n8);
+}
+
+void format_n16(std::ostream &stream, u16 n16)
+{
+ if (n16 >= 0xa000)
+ stream << '0';
+ util::stream_format(stream, "%04XH", n16);
+}
+
+void format_fix8(std::ostream &stream, u8 n8)
+{
+ format_n16(stream, 0x0200 + n8);
+}
+
+void format_off8(std::ostream &stream, u8 n8)
+{
+ stream << '\\';
+ format_n8(stream, n8);
+}
+
+void format_dir16(std::ostream &stream, u16 n16)
+{
+ if ((n16 & 0xff00) == 0 || (n16 & 0xff00) == 0x0200)
+ stream << "dir ";
+ format_n16(stream, n16);
+}
+
+void format_sfr8(std::ostream &stream, u8 n8, bool word)
+{
+ const char *name = nullptr;
+ if (word && !BIT(n8, 0))
+ name = f_msm6657x_word_sfr_names[n8 >> 1];
+ else if (!word)
+ name = f_msm6657x_byte_sfr_names[n8];
+ if (name != nullptr)
+ stream << name;
+ else
+ {
+ stream << "sfr ";
+ format_n8(stream, n8);
+ }
+}
+
+} // anonymous namespace
+
+
+
+nx8_500s_disassembler::nx8_500s_disassembler()
+ : nx8_500s_disassembler(f_dummy_psw)
+{
+}
+
+nx8_500s_disassembler::nx8_500s_disassembler(const u16 &psw)
+ : m_psw(psw)
+{
+}
+
+offs_t nx8_500s_disassembler::opcode_alignment() const
+{
+ return 1;
+}
+
+u32 nx8_500s_disassembler::interface_flags() const
+{
+ return PAGED;
+}
+
+u32 nx8_500s_disassembler::page_address_bits() const
+{
+ return 16;
+}
+
+
+offs_t nx8_500s_disassembler::dasm_composite(std::ostream &stream, offs_t pc, offs_t prefix, const nx8_500s_disassembler::data_buffer &opcodes, std::string obj, bool word) const
+{
+ const u8 code = opcodes.r8(pc + prefix);
+ switch (code)
+ {
+ case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+ case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ util::stream_format(stream, "%-8s%s.%d", f_bit_ops[BIT(~code, 3)], obj, code & 0x07);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ util::stream_format(stream, "%-8s", "MB");
+ if (!BIT(code, 3))
+ stream << "C,";
+ util::stream_format(stream, "%s.%d", obj, code & 0x07);
+ if (BIT(code, 3))
+ stream << ",C";
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ util::stream_format(stream, "%-8s%s.%d,", f_bit_ops[2 + BIT(~code, 3)], obj, code & 0x07);
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | STEP_COND | SUPPORTED;
+
+ case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
+ case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ util::stream_format(stream, "%-8s%s.%d,", BIT(code, 3) ? "JBSR" : "JBRS", obj, code & 0x07);
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | STEP_COND | SUPPORTED;
+
+ case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
+ case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ util::stream_format(stream, "%-8sC,%s.%d", BIT(code, 3) ? "BANDN" : "BAND", obj, code & 0x07);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x50: case 0x51: case 0x52: case 0x53: case 0x54: case 0x55: case 0x56: case 0x57:
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ util::stream_format(stream, "%-8sC,%s.%d", BIT(code, 3) ? "BORN" : "BOR", obj, code & 0x07);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ util::stream_format(stream, "%-8sC,%s.%d", "BXOR", obj, code & 0x07);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ if (word)
+ util::stream_format(stream, "%-8s%s,%s", "MOV", f_reg_names[BIT(code, 2)][code & 0x03], obj);
+ else
+ util::stream_format(stream, "%-8sR%d,%s", "MOVB", code & 0x07, obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x80: case 0x90: case 0xa0: case 0xb0: case 0xc0: case 0xd0: case 0xe0: case 0xf0:
+ util::stream_format(stream, "%-8s%s,", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ format_fix8(stream, opcodes.r8(pc + prefix + 1));
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x81: case 0x91: case 0xa1: case 0xb1: case 0xc1: case 0xd1: case 0xe1: case 0xf1:
+ util::stream_format(stream, "%-8s%s,", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ format_off8(stream, opcodes.r8(pc + prefix + 1));
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x82: case 0x92: case 0xa2: case 0xb2: case 0xc2: case 0xd2: case 0xe2: case 0xf2:
+ util::stream_format(stream, "%-8s%s,", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ format_sfr8(stream, opcodes.r8(pc + prefix + 1), word);
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x83: case 0x93: case 0xa3: case 0xb3: case 0xc3: case 0xd3: case 0xe3: case 0xf3:
+ util::stream_format(stream, "%-8s%s,#", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ if (word)
+ {
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ return (prefix + 3) | SUPPORTED;
+ }
+ else
+ {
+ format_n8(stream, opcodes.r8(pc + prefix + 1));
+ return (prefix + 2) | SUPPORTED;
+ }
+
+ case 0x84: case 0x94: case 0xa4: case 0xb4: case 0xc4: case 0xd4: case 0xe4: case 0xf4:
+ util::stream_format(stream, "%-8s%s,A", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x85: case 0x95: case 0xa5: case 0xb5: case 0xc5: case 0xd5: case 0xe5: case 0xf5:
+ util::stream_format(stream, "%-8sA,%s", f_alu_ops[word][(code >> 4) & 0x07], obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x86:
+ util::stream_format(stream, "%-8s", word ? "MOV" : "MOVB");
+ format_fix8(stream, opcodes.r8(pc + prefix + 1));
+ util::stream_format(stream, ",%s", obj);
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x87:
+ util::stream_format(stream, "%-8s", word ? "MOV" : "MOVB");
+ format_off8(stream, opcodes.r8(pc + prefix + 1));
+ util::stream_format(stream, ",%s", obj);
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x88: case 0x89: case 0x8a: case 0x8b:
+ util::stream_format(stream, "%-8s%s,%s", word ? "MOV" : "MOVB", f_pr_indirect[code & 0x03], obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x8c: case 0x8d: case 0x8e: case 0x8f:
+ util::stream_format(stream, "%-8s%s,%d", word ? "SLL" : "SLLB", obj, (code & 0x03) + 1);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x96:
+ util::stream_format(stream, "%-8s", word ? "MOV" : "MOVB");
+ format_sfr8(stream, opcodes.r8(pc + prefix + 1), word);
+ util::stream_format(stream, ",%s", obj);
+ return (prefix + 2) | SUPPORTED;
+
+ case 0x97:
+ util::stream_format(stream, "%-8sA,%s", word ? "MOV" : "MOVB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0x98: case 0x99:
+ util::stream_format(stream, "%-8s", word ? "MOV" : "MOVB");
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ util::stream_format(stream, "[%s],%s", f_reg_names[1][code & 0x01], obj);
+ return (prefix + 3) | SUPPORTED;
+
+ case 0x9a:
+ {
+ u8 disp = opcodes.r8(pc + prefix + 1);
+ util::stream_format(stream, "%-8s%d[%s],%s", word ? "MOV" : "MOVB", util::sext(disp, 7), BIT(disp, 7) ? "USP" : "DP", obj);
+ return (prefix + 2) | SUPPORTED;
+ }
+
+ case 0x9b:
+ util::stream_format(stream, "%-8s", word ? "MOV" : "MOVB");
+ format_dir16(stream, opcodes.r16(pc + prefix + 1));
+ util::stream_format(stream, ",%s", obj);
+ return (prefix + 3) | SUPPORTED;
+
+ case 0x9c: case 0x9d: case 0x9e: case 0x9f:
+ util::stream_format(stream, "%-8s%s,%d", word ? "SRL" : "SRLB", obj, (code & 0x03) + 1);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xa6:
+ util::stream_format(stream, "%-8s%s,", word ? "TJNZ" : "TJNZB", obj);
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | SUPPORTED;
+
+ case 0xa7:
+ util::stream_format(stream, "%-8s%s,", word ? "TJZ" : "TJZB", obj);
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | SUPPORTED;
+
+ case 0xa8:
+ util::stream_format(stream, "%-8s%s", word ? "DIV" : "DIVB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xa9:
+ if (obj == "A")
+ util::stream_format(stream, "%-8sA", word ? "SQR" : "SQRB");
+ else
+ util::stream_format(stream, "%-8s%s", word ? "MUL" : "MULB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xaa:
+ util::stream_format(stream, "%-8s%s,A", word ? "MOV" : "MOVB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xab:
+ util::stream_format(stream, "%-8s%s,#", word ? "MOV" : "MOVB", obj);
+ if (word)
+ {
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ return (prefix + 3) | SUPPORTED;
+ }
+ else
+ {
+ format_n8(stream, opcodes.r8(pc + prefix + 1));
+ return (prefix + 2) | SUPPORTED;
+ }
+
+ case 0xac: case 0xad: case 0xae: case 0xaf:
+ util::stream_format(stream, "%-8s%s,%d", word ? "ROL" : "ROLB", obj, (code & 0x03) + 1);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xb6: // dummy prefix
+ util::stream_format(stream, "%-8sA,", word ? "CMPC" : "CMPCB");
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ return (prefix + 3) | SUPPORTED;
+
+ case 0xb7: // dummy prefix
+ util::stream_format(stream, "%-8sA,", word ? "LC" : "LCB");
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ return (prefix + 3) | SUPPORTED;
+
+ case 0xb8:
+ util::stream_format(stream, "%-8s%s", "SBR", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xb9:
+ util::stream_format(stream, "%-8s%s", "RBR", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xba:
+ util::stream_format(stream, "%-8s%s", "TBR", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xbb:
+ util::stream_format(stream, "%-8s%s,C", "MBR", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xbc: case 0xbd: case 0xbe: case 0xbf:
+ util::stream_format(stream, "%-8s%s,%d", word ? "ROR" : "RORB", obj, (code & 0x03) + 1);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xc6:
+ util::stream_format(stream, "%-8s%s", word ? "INC" : "INCB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xc7:
+ util::stream_format(stream, "%-8s%s", word ? "CLR" : "CLRB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xc8:
+ util::stream_format(stream, "%-8sA,%s", word ? "XCHG" : "XCHGB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xc9:
+ util::stream_format(stream, "%-8s[%s]", "J", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xd6:
+ util::stream_format(stream, "%-8s%s", word ? "DEC" : "DECB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xd7:
+ util::stream_format(stream, "%-8s%s", word ? "FILL" : "FILLB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xd8: case 0xd9:
+ util::stream_format(stream, "%-8sA,[%s]", BIT(code, 0) ? "CMPCB" : "CMPC", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xda: case 0xdb:
+ util::stream_format(stream, "%-8sA,[%s]", BIT(code, 0) ? "LCB" : "LC", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xe6: case 0xf6:
+ util::stream_format(stream, "%-8sA,", BIT(code, 4) ? "CMPCB" : "CMPC");
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ util::stream_format(stream, "[%s]", obj);
+ return (prefix + 3) | SUPPORTED;
+
+ case 0xe7: case 0xf7:
+ util::stream_format(stream, "%-8sA,", BIT(code, 4) ? "LCB" : "LC");
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ util::stream_format(stream, "[%s]", obj);
+ return (prefix + 3) | SUPPORTED;
+
+ case 0xea:
+ util::stream_format(stream, "%-8s%s", "DJNZ", obj);
+ if (word)
+ stream << 'L';
+ stream << ',';
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | STEP_COND | SUPPORTED;
+
+ case 0xeb:
+ util::stream_format(stream, "%-8s[%s]", "CAL", obj);
+ return (prefix + 1) | STEP_OVER | SUPPORTED;
+
+ case 0xec: case 0xed: case 0xee: case 0xef:
+ util::stream_format(stream, "%-8s%s,%d", word ? "SRA" : "SRAB", obj, (code & 0x03) + 1);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xf8:
+ util::stream_format(stream, "%-8s[X1+A],%s", word ? "MOV" : "MOVB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xf9:
+ util::stream_format(stream, "%-8s[X1+R0],%s", word ? "MOV" : "MOVB", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xfa: // dummy prefix
+ util::stream_format(stream, "%-8s", "FJ");
+ format_n8(stream, opcodes.r8(pc + prefix + 3));
+ stream << ':';
+ format_n16(stream, opcodes.r16(pc + prefix + 1));
+ return (prefix + 4) | SUPPORTED;
+
+ case 0xfb:
+ util::stream_format(stream, "%-8s%s", "DIVQ", obj);
+ return (prefix + 1) | SUPPORTED;
+
+ case 0xfc: case 0xfd: case 0xfe: case 0xff: // dummy prefix
+ util::stream_format(stream, "%-8s", f_signed_jconds[code & 0x03]);
+ format_n16(stream, pc + prefix + 2 + s8(opcodes.r8(pc + prefix + 1)));
+ return (prefix + 2) | STEP_COND | SUPPORTED;
+
+ default:
+ stream << "unknown composite instruction";
+ break;
+ }
+ return (prefix + 1) | SUPPORTED;
+}
+
+offs_t nx8_500s_disassembler::disassemble(std::ostream &stream, offs_t pc, const nx8_500s_disassembler::data_buffer &opcodes, const nx8_500s_disassembler::data_buffer &params)
+{
+ const u8 byte1 = opcodes.r8(pc);
+ switch (byte1)
+ {
+ case 0x00:
+ stream << "NOP";
+ return 1 | SUPPORTED;
+
+ case 0x01:
+ stream << "RT";
+ return 1 | STEP_OUT | SUPPORTED;
+
+ case 0x02:
+ stream << "RTI";
+ return 1 | STEP_OUT | SUPPORTED;
+
+ case 0x03:
+ util::stream_format(stream, "%-8s", "J");
+ format_n16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0x04:
+ util::stream_format(stream, "%-8s", "SJ");
+ format_n16(stream, pc + 2 + s8(opcodes.r8(pc + 1)));
+ return 2 | SUPPORTED;
+
+ case 0x05:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8sR%d,", "DJNZ", 4 + BIT(byte2, 7));
+ format_n16(stream, pc + 2 + s8(byte2 | 0x80));
+ return 2 | STEP_COND | SUPPORTED;
+ }
+
+ case 0x06:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ if (byte2 == 0x38)
+ {
+ // FCAL encoding is documented as 07 08 FadrL FadrM FadrH, but 06 38 seems be to used instead
+ util::stream_format(stream, "%-8s", "FCAL");
+ format_n8(stream, opcodes.r8(pc + 4));
+ stream << ':';
+ format_n16(stream, opcodes.r16(pc + 2));
+ return 5 | STEP_OVER | SUPPORTED;
+ }
+ else if (byte2 == 0x39)
+ {
+ // FRT encoding is documented as 07 09, but 06 39 may be used instead
+ stream << "FRT";
+ return 2 | STEP_OUT | SUPPORTED;
+ }
+ else if ((byte2 & 0x30) != 0x30 && (byte2 & 0x0f) != 0)
+ {
+ util::stream_format(stream, "%-8s", BIT(byte2, 7) ? (BIT(byte2, 6) ? "POPU" : "POPS") : (BIT(byte2, 6) ? "PUSHU" : "PUSHS"));
+ switch (byte2 & 0x3f)
+ {
+ case 0x0f:
+ stream << "ER";
+ break;
+
+ case 0x1f:
+ stream << "PR";
+ break;
+
+ case 0x2e:
+ stream << "CR";
+ break;
+
+ default:
+ for (int n = 0; n < 4; n++)
+ {
+ if (BIT(byte2, n))
+ {
+ if ((byte2 & ((1 << n) - 1)) != 0)
+ stream << ',';
+ stream << f_reg_names[(byte2 & 0x30) >> 4][n];
+ }
+ }
+ break;
+ }
+ return 2 | SUPPORTED;
+ }
+ else
+ {
+ util::stream_format(stream, "%-8s", "DB");
+ format_n8(stream, byte1);
+ stream << ',';
+ format_n8(stream, byte2);
+ return 2 | SUPPORTED;
+ }
+ }
+
+ case 0x07:
+ util::stream_format(stream, "%-8sA", "PUSHS");
+ return 1 | SUPPORTED;
+
+ case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f:
+ case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c: case 0x1d: case 0x1e: case 0x1f:
+ case 0x28: case 0x29: case 0x2a: case 0x2b: case 0x2c: case 0x2d: case 0x2e: case 0x2f:
+ util::stream_format(stream, "%-8sA,", f_alu_ops[BIT(m_psw, 12)][byte1 >> 4]);
+ if (BIT(m_psw, 12))
+ stream << f_reg_names[BIT(byte1, 2)][byte1 & 0x03];
+ else
+ util::stream_format(stream, "R%d", byte1 & 0x07);
+ return 1 | SUPPORTED;
+
+ case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
+ util::stream_format(stream, "%-8sR%d,#", "MOVB", byte1 & 0x07);
+ format_n8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+ util::stream_format(stream, "%-8s%s,#", "MOV", f_reg_names[BIT(~byte1, 2)][byte1 & 0x03]);
+ format_n16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0x30: case 0x31: case 0x32: case 0x33:
+ util::stream_format(stream, "%-8sA,%s", BIT(m_psw, 12) ? "ST" : "STB", f_pr_indirect[byte1 & 0x03]);
+ return 1 | SUPPORTED;
+
+ case 0x34:
+ util::stream_format(stream, "%-8sA,", BIT(m_psw, 12) ? "ST" : "STB");
+ format_fix8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x35:
+ util::stream_format(stream, "%-8sA,", BIT(m_psw, 12) ? "ST" : "STB");
+ format_fix8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x36:
+ util::stream_format(stream, "%-8sA,", BIT(m_psw, 12) ? "ST" : "STB");
+ format_sfr8(stream, opcodes.r8(pc + 1), BIT(m_psw, 12));
+ return 2 | SUPPORTED;
+
+ case 0x37:
+ util::stream_format(stream, "%-8sA,", BIT(m_psw, 12) ? "ST" : "STB");
+ format_dir16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0x38: case 0x39: case 0x3a: case 0x3b: case 0x3c: case 0x3d: case 0x3e: case 0x3f:
+ if (BIT(m_psw, 12))
+ util::stream_format(stream, "%-8sA,%s", "ST", f_reg_names[BIT(byte1, 2)][byte1 & 0x03]);
+ else
+ util::stream_format(stream, "%-8sA,R%d", "STB", byte1 & 0x07);
+ return 1 | SUPPORTED;
+
+ case 0x40: case 0x41: case 0x42: case 0x43:
+ util::stream_format(stream, "%-8s%s", "INC", f_reg_names[1][byte1 & 0x03]);
+ return 1 | SUPPORTED;
+
+ case 0x44: case 0x45: case 0x46: case 0x47: case 0x54: case 0x55: case 0x56: case 0x57:
+ util::stream_format(stream, "%-8s", "ACAL");
+ format_n16(stream, 0x1000 | (byte1 & 0x10) << 6 | (byte1 & 0x03) << 8 | opcodes.r8(pc + 1));
+ return 2 | STEP_OVER | SUPPORTED;
+
+ case 0x48: case 0x49: case 0x4a: case 0x4b: case 0x4c: case 0x4d: case 0x4e: case 0x4f:
+ case 0x58: case 0x59: case 0x5a: case 0x5b: case 0x5c: case 0x5d: case 0x5e: case 0x5f:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8s", f_bit_ops[byte2 >> 6]);
+ if (BIT(byte1, 4))
+ format_fix8(stream, 0xc0 | byte2);
+ else
+ format_off8(stream, 0xc0 | byte2);
+ util::stream_format(stream, ".%d", byte1 & 0x07);
+ if (BIT(byte2, 7))
+ {
+ stream << ',';
+ format_n16(stream, pc + 3 + s8(opcodes.r8(pc + 2)));
+ return 3 | STEP_COND | SUPPORTED;
+ }
+ else
+ return 2 | SUPPORTED;
+ }
+
+ case 0x50: case 0x51: case 0x52: case 0x53:
+ util::stream_format(stream, "%-8s%s", "DEC", f_reg_names[1][byte1 & 0x03]);
+ return 1 | SUPPORTED;
+
+ case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+ return dasm_composite(stream, pc, 1, opcodes, f_reg_names[BIT(~byte1, 2)][byte1 & 0x03], true);
+
+ case 0x68: case 0x69: case 0x6a: case 0x6b: case 0x6c: case 0x6d: case 0x6e: case 0x6f:
+ return dasm_composite(stream, pc, 1, opcodes, util::string_format("R%d", byte1 & 0x07), false);
+
+ case 0x70: case 0x71: case 0x72: case 0x73: case 0x74: case 0x75: case 0x76: case 0x77:
+ util::stream_format(stream, "%-8sA,%s", "L", f_reg_names[BIT(~byte1, 2)][byte1 & 0x03]);
+ return 1 | SUPPORTED;
+
+ case 0x78: case 0x79: case 0x7a: case 0x7b: case 0x7c: case 0x7d: case 0x7e: case 0x7f:
+ util::stream_format(stream, "%-8sA,R%d", "LB", byte1 & 0x07);
+ return 1 | SUPPORTED;
+
+ case 0x80: case 0x81: case 0x82: case 0x83:
+ case 0x90: case 0x91: case 0x92: case 0x93:
+ util::stream_format(stream, "%-8sA,%s", BIT(byte1, 4) ? "LB" : "L", f_pr_indirect[byte1 & 0x03]);
+ return 1 | SUPPORTED;
+
+ case 0x84: case 0x94:
+ util::stream_format(stream, "%-8sA,", BIT(byte1, 4) ? "LB" : "L");
+ format_fix8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x85: case 0x95:
+ util::stream_format(stream, "%-8sA,", BIT(byte1, 4) ? "LB" : "L");
+ format_off8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x86: case 0x96:
+ util::stream_format(stream, "%-8sA,", BIT(byte1, 4) ? "LB" : "L");
+ format_sfr8(stream, opcodes.r8(pc + 1), !BIT(byte1, 4));
+ return 2 | SUPPORTED;
+
+ case 0x87: case 0x97:
+ util::stream_format(stream, "%-8sA,", BIT(byte1, 4) ? "LB" : "L");
+ format_dir16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0x88: case 0x98:
+ util::stream_format(stream, "%-8sA,", BIT(byte1, 4) ? "LB" : "L");
+ format_n16(stream, opcodes.r16(pc + 1));
+ stream << "[X1]";
+ return 3 | SUPPORTED;
+
+ case 0x89: case 0x99:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8sA,%d", BIT(byte1, 4) ? "LB" : "L", util::sext(byte2, 7));
+ // Documentation has these the other way around, but actual code suggests otherwise
+ if (BIT(byte2, 7))
+ stream << "[USP]";
+ else
+ stream << "[DP]";
+ return 2 | SUPPORTED;
+ }
+
+ case 0x8a: case 0x9a:
+ return dasm_composite(stream, pc, 1, opcodes, util::string_format("PSW%c", "LH"[BIT(byte1, 4)]), false);
+
+ case 0x8b: case 0x9b:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ return dasm_composite(stream, pc, 2, opcodes, util::string_format("%d[%s]", util::sext(byte2, 7), BIT(byte2, 7) ? "USP" : "DP"), !BIT(byte1, 4));
+ }
+
+ case 0x8c: case 0x9c: case 0xac:
+ util::stream_format(stream, "%-8sA,", f_alu_ops[BIT(m_psw, 12)][(byte1 >> 4) & 0x07]);
+ format_fix8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x8d: case 0x9d: case 0xad: case 0xbd: case 0xcd: case 0xdd:
+ util::stream_format(stream, "%-8sA,", f_alu_ops[BIT(m_psw, 12)][(byte1 >> 4) & 0x07]);
+ format_off8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0x8e: case 0x9e: case 0xae: case 0xbe: case 0xce: case 0xde:
+ util::stream_format(stream, "%-8sA,#", f_alu_ops[BIT(m_psw, 12)][(byte1 >> 4) & 0x07]);
+ if (BIT(m_psw, 12))
+ {
+ format_n16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+ }
+ else
+ {
+ format_n8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+ }
+
+ case 0x8f:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "SLL" : "SLLB");
+ return 1 | SUPPORTED;
+
+ case 0x9f:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "SRL" : "SRLB");
+ return 1 | SUPPORTED;
+
+ case 0xa0: case 0xa1: case 0xa2: case 0xa3:
+ case 0xb0: case 0xb1: case 0xb2: case 0xb3:
+ return dasm_composite(stream, pc, 1, opcodes, f_pr_indirect[byte1 & 0x03], !BIT(byte1, 4));
+
+ case 0xa4: case 0xb4:
+ {
+ std::ostringstream string;
+ format_fix8(string, opcodes.r8(pc + 1));
+ return dasm_composite(stream, pc, 2, opcodes, string.str(), !BIT(byte1, 4));
+ }
+
+ case 0xa5: case 0xb5:
+ {
+ std::ostringstream string;
+ format_off8(string, opcodes.r8(pc + 1));
+ return dasm_composite(stream, pc, 2, opcodes, string.str(), !BIT(byte1, 4));
+ }
+
+ case 0xa6: case 0xb6:
+ {
+ std::ostringstream string;
+ format_sfr8(string, opcodes.r8(pc + 1), !BIT(byte1, 4));
+ return dasm_composite(stream, pc, 2, opcodes, string.str(), !BIT(byte1, 4));
+ }
+
+ case 0xa7: case 0xb7:
+ {
+ std::ostringstream string;
+ format_dir16(string, opcodes.r16(pc + 1));
+ return dasm_composite(stream, pc, 3, opcodes, string.str(), !BIT(byte1, 4));
+ }
+
+ case 0xa8: case 0xa9: case 0xb8: case 0xb9:
+ {
+ std::ostringstream string;
+ format_n16(string, opcodes.r16(pc + 1));
+ util::stream_format(string, "[%s]", f_reg_names[1][byte1 & 0x01]);
+ return dasm_composite(stream, pc, 3, opcodes, string.str(), !BIT(byte1, 4));
+ }
+
+ case 0xaa: case 0xba:
+ return dasm_composite(stream, pc, 1, opcodes, "[X1+A]", !BIT(byte1, 4));
+
+ case 0xab: case 0xbb:
+ return dasm_composite(stream, pc, 1, opcodes, "[X1+R0]", !BIT(byte1, 4));
+
+ case 0xaf:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "ROL" : "ROLB");
+ return 1 | SUPPORTED;
+
+ case 0xbc:
+ return dasm_composite(stream, pc, 1, opcodes, "A", BIT(m_psw, 12));
+
+ case 0xbf:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "ROR" : "RORB");
+ return 1 | SUPPORTED;
+
+ case 0xc0: case 0xc1: case 0xc2: case 0xc3:
+ util::stream_format(stream, "%-8sR%d", "INCB", byte1 & 0x03);
+ return 1 | SUPPORTED;
+
+ case 0xc4:
+ util::stream_format(stream, "%-8s", "CMP");
+ format_fix8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n16(stream, opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+
+ case 0xc5:
+ util::stream_format(stream, "%-8s", "CMP");
+ format_off8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n16(stream, opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+
+ case 0xc6:
+ util::stream_format(stream, "%-8s", "MOV");
+ format_sfr8(stream, opcodes.r8(pc + 1), true);
+ stream << ",#";
+ format_n16(stream, opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+
+ case 0xc7:
+ util::stream_format(stream, "%-8s", "MOV");
+ format_off8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n16(stream, opcodes.r16(pc + 2));
+ return 4 | SUPPORTED;
+
+ case 0xc8:
+ util::stream_format(stream, "%-8sA,", BIT(m_psw, 12) ? "ST" : "STB");
+ format_n16(stream, opcodes.r16(pc + 1));
+ stream << "[X1]";
+ return 3 | SUPPORTED;
+
+ case 0xc9:
+ {
+ const u8 byte2 = opcodes.r8(pc + 1);
+ util::stream_format(stream, "%-8sA,%d", BIT(m_psw, 12) ? "ST" : "STB", util::sext(byte2, 7));
+ // Documentation has these the other way around, but actual code suggests otherwise
+ if (BIT(byte2, 7))
+ stream << "[USP]";
+ else
+ stream << "[DP]";
+ return 2 | SUPPORTED;
+ }
+
+ case 0xca:
+ stream << "RC";
+ return 1 | SUPPORTED;
+
+ case 0xcb:
+ stream << "SC";
+ return 1 | SUPPORTED;
+
+ case 0xcc:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "INC" : "INCB");
+ return 1 | SUPPORTED;
+
+ case 0xcf:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "NEG" : "NEGB");
+ return 1 | SUPPORTED;
+
+ case 0xd0: case 0xd1: case 0xd2: case 0xd3:
+ util::stream_format(stream, "%-8sR%d", "DECB", byte1 & 0x03);
+ return 1 | SUPPORTED;
+
+ case 0xd4:
+ util::stream_format(stream, "%-8s", "CMPB");
+ format_fix8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n8(stream, opcodes.r8(pc + 2));
+ return 3 | SUPPORTED;
+
+ case 0xd5:
+ util::stream_format(stream, "%-8s", "CMPB");
+ format_off8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n8(stream, opcodes.r8(pc + 2));
+ return 3 | SUPPORTED;
+
+ case 0xd6:
+ util::stream_format(stream, "%-8s", "MOVB");
+ format_sfr8(stream, opcodes.r8(pc + 1), false);
+ stream << ",#";
+ format_n8(stream, opcodes.r8(pc + 2));
+ return 3 | SUPPORTED;
+
+ case 0xd7:
+ util::stream_format(stream, "%-8s", "MOVB");
+ format_off8(stream, opcodes.r8(pc + 1));
+ stream << ",#";
+ format_n8(stream, opcodes.r8(pc + 2));
+ return 3 | SUPPORTED;
+
+ case 0xd8:
+ stream << "RDD";
+ return 1 | SUPPORTED;
+
+ case 0xd9:
+ stream << "SDD";
+ return 1 | SUPPORTED;
+
+ case 0xda:
+ stream << "DI";
+ return 1 | SUPPORTED;
+
+ case 0xdb:
+ stream << "EI";
+ return 1 | SUPPORTED;
+
+ case 0xdc:
+ util::stream_format(stream, "%-8sA", BIT(m_psw, 12) ? "DEC" : "DECB");
+ return 1 | SUPPORTED;
+
+ case 0xdf:
+ stream << "SWAP";
+ return 1 | SUPPORTED;
+
+ case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+ case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
+ util::stream_format(stream, "%-8s0:", "VCAL");
+ format_n16(stream, 0x004a + (byte1 & 0x0f) * 2);
+ return 1 | STEP_OVER | SUPPORTED;
+
+ case 0xf0: case 0xf1: case 0xf2: case 0xf3: case 0xf4: case 0xf5: case 0xf6: case 0xf7:
+ util::stream_format(stream, "%-8s", f_jconds[byte1 & 0x07]);
+ format_n16(stream, pc + 2 + s8(opcodes.r8(pc + 1)));
+ return 2 | STEP_COND | SUPPORTED;
+
+ case 0xf8:
+ util::stream_format(stream, "%-8sA,#", "L");
+ format_n16(stream, opcodes.r16(pc + 1));
+ return 3 | SUPPORTED;
+
+ case 0xf9:
+ util::stream_format(stream, "%-8sA,#", "LB");
+ format_n8(stream, opcodes.r8(pc + 1));
+ return 2 | SUPPORTED;
+
+ case 0xfa: case 0xfb:
+ util::stream_format(stream, "%-8sA", BIT(byte1, 0) ? "CLRB" : "CLR");
+ return 1 | SUPPORTED;
+
+ case 0xfc:
+ stream << "EXTND";
+ return 1 | SUPPORTED;
+
+ case 0xfd:
+ util::stream_format(stream, "%-8sC", "CPL");
+ return 1 | SUPPORTED;
+
+ case 0xfe:
+ util::stream_format(stream, "%-8s", "CAL");
+ format_n16(stream, opcodes.r16(pc + 1));
+ return 3 | STEP_OVER | SUPPORTED;
+
+ case 0xff:
+ stream << "BRK";
+ return 1 | SUPPORTED;
+
+ default: // actually can't happen
+ util::stream_format(stream, "%-8s", "DB");
+ format_n8(stream, byte1);
+ return 1 | SUPPORTED;
+ }
+}
diff --git a/src/devices/cpu/olms66k/nx8dasm.h b/src/devices/cpu/olms66k/nx8dasm.h
new file mode 100644
index 00000000000..2d3a4fba02e
--- /dev/null
+++ b/src/devices/cpu/olms66k/nx8dasm.h
@@ -0,0 +1,28 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+
+#ifndef MAME_CPU_OLMS66K_NX8DASM_H
+#define MAME_CPU_OLMS66K_NX8DASM_H
+
+#pragma once
+
+class nx8_500s_disassembler : public util::disasm_interface
+{
+public:
+ nx8_500s_disassembler();
+ nx8_500s_disassembler(const u16 &psw);
+
+protected:
+ // disasm_interface overrides
+ virtual offs_t opcode_alignment() const override;
+ virtual u32 interface_flags() const override;
+ virtual u32 page_address_bits() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ offs_t dasm_composite(std::ostream &stream, offs_t pc, offs_t prefix, const data_buffer &opcodes, std::string obj, bool word) const;
+
+ const u16 &m_psw;
+};
+
+#endif // MAME_CPU_OLMS66K_NX8DASM_H
diff --git a/src/devices/cpu/pace/pace.h b/src/devices/cpu/pace/pace.h
index ed9cadf39b9..b5c00fbb912 100644
--- a/src/devices/cpu/pace/pace.h
+++ b/src/devices/cpu/pace/pace.h
@@ -71,8 +71,8 @@ protected:
pace_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
diff --git a/src/devices/cpu/palm/palm.cpp b/src/devices/cpu/palm/palm.cpp
new file mode 100644
index 00000000000..071c0d9a6fc
--- /dev/null
+++ b/src/devices/cpu/palm/palm.cpp
@@ -0,0 +1,330 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+/*
+ * IBM PALM (apparently "Put All Logic in Microcode") single-card microprocessor.
+ *
+ * Sources:
+ * - IBM 5100 Maintenance Information Manual, SY31-0405-3, Fourth Edition (October 1979), International Business Machines Corporation
+ *
+ * TODO:
+ * - machine check
+ * - instruction timing
+ */
+
+#include "emu.h"
+#include "palm.h"
+#include "palmd.h"
+
+//#define VERBOSE (LOG_GENERAL)
+#include "logmacro.h"
+
+ // helpers for IBM bit numbering
+template <typename T, typename U> constexpr T IBIT(T x, U n) noexcept
+{
+ return BIT(x, sizeof(T) * 8 - n - 1);
+}
+
+template <typename T, typename U, typename V> constexpr T IBIT(T x, U n, V w)
+{
+ return BIT(x, sizeof(T) * 8 - n - w, w);
+}
+
+static u8 constexpr il_priority[] = { 0, 1, 2, 2, 3, 3, 3, 3 };
+
+DEFINE_DEVICE_TYPE(PALM, palm_device, "palm", "IBM PALM")
+
+palm_device::palm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock)
+ : cpu_device(mconfig, PALM, tag, owner, clock)
+ , m_pgm_config("pgm", ENDIANNESS_BIG, 16, 16)
+ , m_rws_config("rws", ENDIANNESS_BIG, 16, 16)
+ , m_ioc_config("ioc", ENDIANNESS_BIG, 8, 4)
+ , m_iod_config("iod", ENDIANNESS_BIG, 8, 4)
+ , m_getb_bus(*this)
+ , m_program_level(*this)
+ , m_select_ros(*this)
+ , m_icount(0)
+ , m_r{}
+{
+}
+
+enum ff_mask : u8
+{
+ FF_IPL = 0x80, // initial program load
+ FF_MSS = 0x40, // microprogram storage switch
+
+ FF_IE = 0x08, // interrupt enable
+ FF_IR3 = 0x04, // interrupt request 3
+ FF_IR2 = 0x02, // interrupt request 2
+ FF_IR1 = 0x01, // interrupt request 1
+
+ FF_IR = 0x07, // interrupt request
+};
+
+void palm_device::device_start()
+{
+ set_icountptr(m_icount);
+
+ state_add(STATE_GENPC, "GENPC", m_pc).noshow();
+ state_add<u16>(STATE_GENPCBASE, "CURPC", [this]() { return m_r[m_il][0] & 0xfffeU; });
+
+ state_add(0, "IL", m_il);
+ for (unsigned i = 0; i < std::size(m_r[m_il]); i++)
+ state_add<u16>(i + 1, util::string_format("R%d", i).c_str(), [this, i]() { return m_r[m_il][i]; }, [this, i](u16 data) { m_r[m_il][i] = data; });
+
+ save_item(NAME(m_pc));
+ save_item(NAME(m_r));
+ save_item(NAME(m_il));
+ save_item(NAME(m_ff));
+
+ space(AS_PGM).specific(m_pgm);
+ space(AS_RWS).specific(m_rws);
+ space(AS_IOC).specific(m_ioc);
+ space(AS_IOD).specific(m_iod);
+}
+
+void palm_device::device_reset()
+{
+ space(AS_RWS).install_ram(0, sizeof(m_r) - 1, m_r);
+
+ // select instruction source
+ m_ff = FF_IPL | FF_MSS;
+ m_select_ros((m_ff & FF_MSS) && !(m_ff & FF_IPL));
+
+ // read initial PC from program memory
+ m_il = 0;
+ m_program_level(0);
+ m_pc = m_r[m_il][0] = m_pgm.read_word(0);
+}
+
+#define Rx r[IBIT(op, 4, 4)]
+#define Ry r[IBIT(op, 8, 4)]
+#define DA IBIT(op, 4, 4)
+#define IMM IBIT(op, 8, 8)
+#define MOD IBIT(op, 12, 4)
+
+void palm_device::execute_run()
+{
+ while (m_icount > 0)
+ {
+ // handle pending interrupts
+ u8 const il = il_priority[m_ff & FF_IR];
+ if ((m_ff & FF_IE) && m_il != il)
+ {
+ m_il = il;
+ m_program_level(m_il > 0);
+
+ // notify the debugger
+ if (m_il && debugger_enabled())
+ debug()->interrupt_hook(m_il - 1, m_r[m_il][0] & ~1);
+ }
+
+ // select active register bank
+ u16 (&r)[16] = m_r[m_il];
+
+ // notify the debugger
+ debugger_instruction_hook(r[0] & ~1);
+
+ // fetch instruction
+ u16 const op = m_pgm.read_word(r[0] & ~1);
+
+ // increment instruction address register
+ r[0] += 2;
+
+ switch (IBIT(op, 0, 4))
+ {
+ case 0x0:
+ switch (IBIT(op, 12, 4))
+ {
+ case 0x0: Rx = Ry - 2; break; // move minus 2
+ case 0x1: Rx = Ry - 1; break; // move minus 1
+ case 0x2: Rx = Ry + 1; break; // move plus 1
+ case 0x3: Rx = Ry + 2; break; // move plus 2
+ case 0x4: Rx = Ry; break; // move register
+ case 0x5: Rx &= 0xff00U | u8(Ry); break; // and byte
+ case 0x6: Rx |= u8(Ry); break; // or byte
+ case 0x7: Rx ^= u8(Ry); break; // xor byte
+ case 0x8: Rx += u8(Ry); break; // add
+ case 0x9: Rx -= u8(Ry); break; // subtract
+ case 0xa: Rx = u8(Ry) + (Rx >> 8); break; // add special #1
+ case 0xb: Rx = u8(Ry) + (Rx >> 8) - 0x100; break; // add special #2
+ case 0xc: Rx = (Rx & 0xff00U) | (Ry >> 8); break; // high to low
+ case 0xd: Rx = (Rx & 0x00ffU) | (Ry << 8); break; // low to high
+ case 0xe: Ry = (Ry & 0xff00U) | m_iod.read_byte(DA); break; // get to register
+ case 0xf: Ry += (7 - count_leading_ones_32(u32(m_iod.read_byte(DA)) << 24)) * 2; break; // get to register and add
+ }
+ break;
+ case 0x1:
+ // control
+ if (DA == 0)
+ control(IMM);
+
+ m_ioc.write_byte(DA, IMM);
+ break;
+ case 0x2: Rx = m_rws.read_word(IMM * 2); break; // load halfword direct
+ case 0x3: m_rws.write_word(IMM * 2, Rx); break; // store halfword direct
+ case 0x4:
+ // put byte
+ m_iod.write_byte(DA, m_rws.read_byte(Ry));
+ Ry += modifier(MOD);
+ break;
+ case 0x5:
+ // store halfword indirect
+ m_rws.write_word(Ry, Rx);
+ Ry += modifier(MOD);
+ break;
+ case 0x6:
+ // load byte indirect
+ Rx = m_rws.read_byte(Ry);
+ Ry += modifier(MOD);
+ break;
+ case 0x7:
+ // store byte indirect
+ m_rws.write_byte(Ry, Rx);
+ Ry += modifier(MOD);
+ break;
+ case 0x8: Rx = (Rx & 0xff00U) | IMM; break; // emit byte
+ case 0x9: Rx &= ~IMM; break; // clear immediate
+ case 0xa: Rx += IMM + 1; break; // add immediate
+ case 0xb: Rx |= IMM; break; // set immediate
+ case 0xc:
+ // jump (skip next on condition)
+ if (condition(MOD, Rx, Ry))
+ r[0] += 2;
+ else
+ r[1] = r[0] + 2;
+ break;
+ case 0xd:
+ // load halfword indirect
+ Rx = m_rws.read_word(Ry);
+ Ry += modifier(MOD);
+ break;
+ case 0xe:
+ if (DA == 0 && MOD >= 0xc)
+ {
+ switch (MOD)
+ {
+ case 0xc: Ry = (Ry & 0xff00U) | u8(Ry >> 1); break; // shift right 1
+ case 0xd: Ry = (Ry & 0xff00U) | u8(Ry << 7) | u8(Ry) >> 1; break; // shift right and rotate 1
+ case 0xe: Ry = (Ry & 0xff00U) | u8(Ry << 5) | u8(Ry) >> 3; break; // shift right and rotate 3
+ case 0xf: Ry = (Ry & 0xff00U) | u8(Ry << 4) | u8(Ry) >> 4; break; // shift right and rotate 4
+ }
+ }
+ else
+ {
+ if (MOD < 0xc)
+ {
+ // get byte
+ m_rws.write_byte(Ry, m_iod.read_byte(DA));
+ Ry += modifier(MOD);
+ }
+ else
+ {
+ m_getb_bus(DA, Ry);
+
+ // get register byte
+ Ry = (Ry & 0xff00U) | m_ioc.read_byte(DA);
+ }
+ }
+ break;
+ case 0xf: Rx -= IMM + 1; break; // subtract immediate
+ }
+
+ // TODO: average instruction time quoted as 1.75µs (~27 machine cycles)
+ m_icount -= 27;
+ m_pc = r[0];
+ }
+}
+
+void palm_device::execute_set_input(int irqline, int state)
+{
+ switch (irqline)
+ {
+ case INPUT_LINE_NMI:
+ // TODO: machine check
+ break;
+
+ default:
+ // interrupt lines are active low
+ if (!state)
+ m_ff |= 1U << irqline;
+ else
+ m_ff &= ~(1U << irqline);
+ break;
+ }
+}
+
+device_memory_interface::space_config_vector palm_device::memory_space_config() const
+{
+ return space_config_vector
+ {
+ std::make_pair(AS_PGM, &m_pgm_config),
+ std::make_pair(AS_RWS, &m_rws_config),
+ std::make_pair(AS_IOC, &m_ioc_config),
+ std::make_pair(AS_IOD, &m_iod_config),
+ };
+}
+
+std::unique_ptr<util::disasm_interface> palm_device::create_disassembler()
+{
+ return std::make_unique<palm_disassembler>();
+}
+
+bool palm_device::condition(unsigned const modifier, u16 const data, u8 const mask) const
+{
+ switch (modifier)
+ {
+ case 0x0: return u8(data) <= mask; // le: low or equal
+ case 0x1: return u8(data) < mask; // lo: low
+ case 0x2: return u8(data) == mask; // eq: equal
+ case 0x3: return u8(data) == 0x00; // no: no ones
+ case 0x4: return u8(data) == 0xff; // all: all ones
+ case 0x5: return u8(data & mask) == mask; // allm: all masked
+ case 0x6: return u8(data & mask) == 0x00; // nom: no ones masked
+ case 0x7: return u8((data >> 8) & mask) == mask; // ham: high all masked
+ case 0x8: return u8(data) > mask; // hi: high
+ case 0x9: return u8(data) >= mask; // he: high or equal
+ case 0xa: return u8(data) != mask; // hl: high or low
+ case 0xb: return u8(data) != 0x00; // sb: some bits
+ case 0xc: return u8(data) != 0xff; // sn: some not ones
+ case 0xd: return u8(data & mask) != mask; // snm: some not masked
+ case 0xe: return u8(data & mask) != 0x00; // sm: some masked
+ case 0xf: return u8((data >> 8) & mask) != mask; // hsnm: high some bit not masked
+ default:
+ // can't happen
+ abort();
+ }
+}
+
+s16 palm_device::modifier(unsigned const modifier) const
+{
+ if (modifier < 4)
+ return (modifier & 3) + 1;
+ else if (modifier < 8)
+ return -((modifier & 3) + 1);
+ else
+ return 0;
+}
+
+void palm_device::control(u8 data)
+{
+ LOG("control 0x%02x (%s)\n", data, machine().describe_context());
+
+ // 0: reset controller errors
+
+ // 1: 0=disable interrupts
+ // 2: 0=enable interrupts
+ if (!IBIT(data, 1))
+ m_ff &= ~FF_IE;
+ else if (!IBIT(data, 2))
+ m_ff |= FF_IE;
+
+ // 5: state transition
+ if (!IBIT(data, 5))
+ {
+ m_ff &= ~FF_IPL;
+ m_ff ^= FF_MSS;
+
+ m_select_ros((m_ff & FF_MSS) && !(m_ff & FF_IPL));
+ }
+}
diff --git a/src/devices/cpu/palm/palm.h b/src/devices/cpu/palm/palm.h
new file mode 100644
index 00000000000..e6e1588061b
--- /dev/null
+++ b/src/devices/cpu/palm/palm.h
@@ -0,0 +1,78 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+#ifndef MAME_CPU_PALM_PALM_H
+#define MAME_CPU_PALM_PALM_H
+
+#pragma once
+
+class palm_device : public cpu_device
+{
+public:
+ // interrupt lines are numbered 1..3
+ static unsigned constexpr IRPT_REQ1 = INPUT_LINE_IRQ0;
+ static unsigned constexpr IRPT_REQ2 = INPUT_LINE_IRQ1;
+ static unsigned constexpr IRPT_REQ3 = INPUT_LINE_IRQ2;
+
+ // four address spaces
+ static unsigned constexpr AS_PGM = AS_PROGRAM;
+ static unsigned constexpr AS_RWS = AS_DATA;
+ static unsigned constexpr AS_IOC = AS_IO;
+ static unsigned constexpr AS_IOD = 4;
+
+ auto getb_bus() { return m_getb_bus.bind(); }
+ auto program_level() { return m_program_level.bind(); }
+ auto select_ros() { return m_select_ros.bind(); }
+
+ palm_device(machine_config const &mconfig, char const *tag, device_t *owner, u32 clock);
+
+protected:
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface implementation
+ virtual u32 execute_min_cycles() const noexcept override { return 17; }
+ virtual u32 execute_max_cycles() const noexcept override { return 54; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ // device_memory_interface implementation
+ virtual space_config_vector memory_space_config() const override;
+
+ // device_disasm_interface implementation
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ bool condition(unsigned const modifier, u16 const data, u8 const mask) const;
+ s16 modifier(unsigned const modifier) const;
+
+ void control(u8 data);
+
+private:
+ // address spaces
+ address_space_config const m_pgm_config;
+ address_space_config const m_rws_config;
+ address_space_config const m_ioc_config;
+ address_space_config const m_iod_config;
+
+ memory_access<16, 1, 0, ENDIANNESS_BIG>::specific m_pgm;
+ memory_access<16, 1, 0, ENDIANNESS_BIG>::specific m_rws;
+ memory_access<4, 0, 0, ENDIANNESS_BIG>::specific m_ioc;
+ memory_access<4, 0, 0, ENDIANNESS_BIG>::specific m_iod;
+
+ devcb_write8 m_getb_bus;
+ devcb_write_line m_program_level;
+ devcb_write_line m_select_ros;
+
+ // mame state
+ int m_icount;
+ u16 m_pc;
+
+ u16 m_r[4][16]; // registers
+ u8 m_il; // interrupt level
+ u8 m_ff; // controller flip-flops
+};
+
+DECLARE_DEVICE_TYPE(PALM, palm_device)
+
+#endif // MAME_CPU_PALM_PALM_H
diff --git a/src/devices/cpu/palm/palmd.cpp b/src/devices/cpu/palm/palmd.cpp
new file mode 100644
index 00000000000..d0ce461f4b0
--- /dev/null
+++ b/src/devices/cpu/palm/palmd.cpp
@@ -0,0 +1,179 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+#include "emu.h"
+#include "palmd.h"
+
+static const char *const r[] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" };
+static const char *const jm[] = { "le", "lo", "eq", "no", "all", "allm", "nom", "ham", "hi", "he", "hl", "sb", "sn", "snm", "sm", "hsnm" };
+static const char *const im[] = { "+1", "+2", "+3", "+4", "-1", "-2", "-3", "-4" };
+
+// helper for IBM bit numbering
+template <typename T, typename U, typename V> constexpr T IBIT(T x, U n, V w)
+{
+ return BIT(x, sizeof(T) * 8 - n - w, w);
+}
+
+// instruction field shorthand
+#define Rx IBIT(op, 4, 4)
+#define Ry IBIT(op, 8, 4)
+#define DA IBIT(op, 4, 4)
+#define IMM IBIT(op, 8, 8)
+#define MOD IBIT(op, 12, 4)
+
+offs_t palm_disassembler::disassemble(std::ostream &stream, offs_t pc, data_buffer const &opcodes, data_buffer const &params)
+{
+ u16 const op = opcodes.r16(pc);
+ u32 flags = 0;
+
+ pc += 2;
+
+ switch (IBIT(op, 0, 4))
+ {
+ case 0x0:
+ switch (MOD)
+ {
+ case 0x0:
+ if (IBIT(op, 4, 8))
+ // move minus 2
+ util::stream_format(stream, "mvm2 %s,%s", r[Rx], r[Ry]);
+ else
+ // synthetic halt (branch to self)
+ util::stream_format(stream, "halt");
+ break;
+ case 0x1: util::stream_format(stream, "mvm1 %s,%s", r[Rx], r[Ry]); break; // move minus 1
+ case 0x2: util::stream_format(stream, "mvp1 %s,%s", r[Rx], r[Ry]); break; // move plus 1
+ case 0x3: util::stream_format(stream, "mvp2 %s,%s", r[Rx], r[Ry]); break; // move plus 2
+ case 0x4:
+ if (Rx)
+ // move register
+ util::stream_format(stream, "move %s,%s", r[Rx], r[Ry]);
+ else if (Ry)
+ {
+ // synthetic jump to register
+ util::stream_format(stream, "jump %s", r[Ry]);
+ flags |= STEP_COND;
+ }
+ else // synthetic no operation
+ util::stream_format(stream, "noop");
+ break;
+ case 0x5: util::stream_format(stream, "and %s,%s", r[Rx], r[Ry]); break; // and byte
+ case 0x6: util::stream_format(stream, "orb %s,%s", r[Rx], r[Ry]); break; // or byte
+ case 0x7: util::stream_format(stream, "xor %s,%s", r[Rx], r[Ry]); break; // xor byte
+ case 0x8: util::stream_format(stream, "add %s,%s", r[Rx], r[Ry]); break; // add
+ case 0x9: util::stream_format(stream, "sub %s,%s", r[Rx], r[Ry]); break; // subtract
+ case 0xa: util::stream_format(stream, "adds1 %s,%s", r[Rx], r[Ry]); break; // add special #1
+ case 0xb: util::stream_format(stream, "adds2 %s,%s", r[Rx], r[Ry]); break; // add special #2
+ case 0xc: util::stream_format(stream, "htl %s,%s", r[Rx], r[Ry]); break; // high to low
+ case 0xd: util::stream_format(stream, "lth %s,%s", r[Rx], r[Ry]); break; // low to high
+ case 0xe: util::stream_format(stream, "getr $%x,%s", DA, r[Ry]); break; // get to register
+ case 0xf: util::stream_format(stream, "geta $%x,%s", DA, r[Ry]); break; // get to register and add
+ }
+ break;
+ case 0x1: util::stream_format(stream, "ctl $%x,#$%x", DA, IMM); break; // control
+ case 0x2: util::stream_format(stream, "ldhd %s,$%x", r[Rx], IMM * 2); break; // load halfword direct
+ case 0x3: util::stream_format(stream, "sthd %s,$%x", r[Rx], IMM * 2); break; // store halfword direct
+ case 0x4:
+ // put byte
+ if (MOD < 8)
+ util::stream_format(stream, "putb $%x,%s,%s", DA, r[Ry], im[MOD]);
+ else
+ util::stream_format(stream, "putb $%x,%s", DA, r[Ry]);
+ break;
+ case 0x5:
+ // store halfword indirect
+ if (MOD < 8)
+ util::stream_format(stream, "sthi %s,%s,%s", r[Rx], r[Ry], im[MOD]);
+ else
+ util::stream_format(stream, "sthi %s,%s", r[Rx], r[Ry]);
+ break;
+ case 0x6:
+ // load byte indirect
+ if (MOD < 8)
+ util::stream_format(stream, "ldbi %s,%s,%s", r[Rx], r[Ry], im[MOD]);
+ else
+ util::stream_format(stream, "ldbi %s,%s", r[Rx], r[Ry]);
+ break;
+ case 0x7:
+ // store byte indirect
+ if (MOD < 8)
+ util::stream_format(stream, "stbi %s,%s,%s", r[Rx], r[Ry], im[MOD]);
+ else
+ util::stream_format(stream, "stbi %s,%s", r[Rx], r[Ry]);
+ break;
+ case 0x8: util::stream_format(stream, "emit %s,#$%x", r[Rx], IMM); break; // emit byte
+ case 0x9: util::stream_format(stream, "clri %s,#$%x", r[Rx], IMM); break; // clear immediate
+ case 0xa:
+ if (Rx)
+ // add immediate
+ util::stream_format(stream, "addi %s,#$%x", r[Rx], IMM + 1);
+ else
+ {
+ // synthetic jump relative (forward)
+ util::stream_format(stream, "jump $%x", pc + IMM + 1);
+ flags |= STEP_COND;
+ }
+ break;
+ case 0xb: util::stream_format(stream, "seti %s,#$%x", r[Rx], IMM); break; // set immediate
+ case 0xc:
+ switch (MOD)
+ {
+ case 0x3: case 0x4: case 0xb: case 0xc:
+ // one-operand jumps
+ util::stream_format(stream, "j%-4s %s", jm[MOD], r[Rx]);
+ break;
+ case 0x0: case 0x1: case 0x2: case 0x5:
+ case 0x6: case 0x7: case 0x8: case 0x9:
+ case 0xa: case 0xd: case 0xe: case 0xf:
+ // two-operand jumps
+ util::stream_format(stream, "j%-4s %s,%s", jm[MOD], r[Rx], r[Ry]);
+ break;
+ }
+ flags |= STEP_COND;
+ break;
+ case 0xd:
+ // load halfword indirect
+ if (MOD < 8)
+ util::stream_format(stream, "ldhi %s,%s,%s", r[Rx], r[Ry], im[MOD]);
+ else
+ util::stream_format(stream, "ldhi %s,%s", r[Rx], r[Ry]);
+ break;
+ case 0xe:
+ if (DA == 0 && MOD >= 0xc)
+ {
+ switch (MOD)
+ {
+ case 0xc: util::stream_format(stream, "shftr %s", r[Ry]); break; // shift right 1
+ case 0xd: util::stream_format(stream, "rotr %s", r[Ry]); break; // shift right and rotate 1
+ case 0xe: util::stream_format(stream, "srr3 %s", r[Ry]); break; // shift right and rotate 3
+ case 0xf: util::stream_format(stream, "srr4 %s", r[Ry]); break; // shift right and rotate 4
+ }
+ }
+ else
+ {
+ if (MOD < 0x8)
+ // get byte
+ util::stream_format(stream, "getb $%x,%s,%s", DA, r[Ry], im[MOD]);
+ else if (MOD < 0xc)
+ // get byte
+ util::stream_format(stream, "getb $%x,%s", DA, r[Ry]);
+ else
+ // get register byte
+ util::stream_format(stream, "getrb $%x,%s", DA, r[Ry]);
+ }
+ break;
+ case 0xf:
+ if (Rx)
+ // subtract immediate
+ util::stream_format(stream, "subi %s,#$%x", r[Rx], IMM + 1);
+ else
+ {
+ // synthetic jump relative (backward)
+ util::stream_format(stream, "jump $%x", pc - IMM - 1);
+ flags |= STEP_COND;
+ }
+ break;
+ }
+
+ return 2 | flags | SUPPORTED;
+}
diff --git a/src/devices/cpu/palm/palmd.h b/src/devices/cpu/palm/palmd.h
new file mode 100644
index 00000000000..773fd9a5edc
--- /dev/null
+++ b/src/devices/cpu/palm/palmd.h
@@ -0,0 +1,19 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+#ifndef MAME_CPU_PALM_PALMD_H
+#define MAME_CPU_PALM_PALMD_H
+
+#pragma once
+
+class palm_disassembler : public util::disasm_interface
+{
+public:
+ palm_disassembler() = default;
+ virtual ~palm_disassembler() = default;
+
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, data_buffer const &opcodes, data_buffer const &params) override;
+ virtual u32 opcode_alignment() const override { return 2; }
+};
+
+#endif // MAME_CPU_PALM_PALMD_H
diff --git a/src/devices/cpu/patinhofeio/patinho_feio.cpp b/src/devices/cpu/patinhofeio/patinho_feio.cpp
index 4db14b4d9de..d6ea3742db7 100644
--- a/src/devices/cpu/patinhofeio/patinho_feio.cpp
+++ b/src/devices/cpu/patinhofeio/patinho_feio.cpp
@@ -155,9 +155,9 @@ void patinho_feio_cpu_device::execute_run() {
m_ext = READ_ACC_EXTENSION_REG();
m_idx = READ_INDEX_REG();
m_update_panel_cb(ACC, READ_BYTE_PATINHO(PC), READ_BYTE_PATINHO(m_addr), m_addr, PC, FLAGS, RC, m_mode);
- debugger_instruction_hook(PC);
if (!m_run){
+ debugger_wait_hook();
if (!m_buttons_read_cb.isunset()){
uint16_t buttons = m_buttons_read_cb(0);
if (buttons & BUTTON_PARTIDA){
@@ -180,6 +180,7 @@ void patinho_feio_cpu_device::execute_run() {
}
m_icount = 0; /* if processor is stopped, just burn cycles */
} else {
+ debugger_instruction_hook(PC);
execute_instruction();
m_icount --;
}
@@ -322,7 +323,7 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x90:
//ST 0 = "Se T=0, Pula"
// If T is zero, skip the next instruction
- if ((FLAGS & T) == 0)
+ if ((FLAGS & T) == 0)
INCREMENT_PC_4K; //skip
return;
case 0x91:
@@ -337,7 +338,7 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x92:
//ST 1 = "Se T=1, Pula"
// If T is one, skip the next instruction
- if ((FLAGS & T) == T)
+ if ((FLAGS & T) == T)
INCREMENT_PC_4K; //skip
return;
case 0x93:
@@ -352,7 +353,7 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x94:
//SV 0 = "Se V=0, Pula"
// If V is zero, skip the next instruction
- if ((FLAGS & V) == 0)
+ if ((FLAGS & V) == 0)
INCREMENT_PC_4K; //skip
return;
case 0x95:
@@ -367,7 +368,7 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x96:
//SV 1 = "Se V=1, Pula"
// If V is one, skip the next instruction
- if ((FLAGS & V) == 1)
+ if ((FLAGS & V) == 1)
INCREMENT_PC_4K; //skip
return;
case 0x97:
@@ -382,15 +383,15 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x98:
//PUL="Pula para /002 a limpa estado de interrupcao"
// Jump to address /002 and disables interrupts
- PC = 0x002;
+ PC = 0x002;
m_interrupts_enabled = false;
return;
case 0x99:
//TRE="Troca conteudos de ACC e EXT"
// Exchange the value of the accumulator with the ACC extension register
- value = ACC;
- ACC = READ_ACC_EXTENSION_REG();
- WRITE_ACC_EXTENSION_REG(value);
+ value = ACC;
+ ACC = READ_ACC_EXTENSION_REG();
+ WRITE_ACC_EXTENSION_REG(value);
return;
case 0x9A:
//INIB="Inibe"
@@ -683,7 +684,7 @@ void patinho_feio_cpu_device::execute_instruction()
if (channel==0xE){
//TODO: Implement-me!
} else {
- printf("Function 8 of the /FNC instruction can only be used with"\
+ printf("Function 8 of the /FNC instruction can only be used with "
"the papertape reader device at channel /E.\n");
}
break;
@@ -694,7 +695,7 @@ void patinho_feio_cpu_device::execute_instruction()
case 0x20:
//SAL="Salta"
// Skips a couple bytes if a condition is met
- skip = false;
+ skip = false;
switch(function)
{
case 1:
diff --git a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
index 1ba4a39fdb6..a5df23f86dd 100644
--- a/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
+++ b/src/devices/cpu/patinhofeio/patinhofeio_cpu.h
@@ -1,7 +1,7 @@
// license:GPL-2.0+
// copyright-holders:Felipe Sanches
-#ifndef MAME_DEVICES_CPU_PATINHOFEIO_CPU_H
-#define MAME_DEVICES_CPU_PATINHOFEIO_CPU_H
+#ifndef MAME_CPU_PATINHOFEIO_PATINHOFEIO_CPU_H
+#define MAME_CPU_PATINHOFEIO_PATINHOFEIO_CPU_H
#pragma once
@@ -56,7 +56,7 @@ public:
void transfer_byte_from_external_device(uint8_t channel, uint8_t data);
void set_iodev_status(uint8_t channel, bool status) { m_iodev_status[channel] = status; }
- void prog_8bit(address_map &map);
+ void prog_8bit(address_map &map) ATTR_COLD;
protected:
virtual void execute_run() override;
@@ -107,8 +107,8 @@ protected:
address_space *m_program;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
@@ -132,4 +132,4 @@ private:
DECLARE_DEVICE_TYPE(PATO_FEIO_CPU, patinho_feio_cpu_device)
-#endif // MAME_DEVICES_CPU_PATINHOFEIO_CPU_H
+#endif // MAME_CPU_PATINHOFEIO_PATINHOFEIO_CPU_H
diff --git a/src/devices/cpu/pdp1/pdp1.cpp b/src/devices/cpu/pdp1/pdp1.cpp
index 5fda5e79699..efd93747fc7 100644
--- a/src/devices/cpu/pdp1/pdp1.cpp
+++ b/src/devices/cpu/pdp1/pdp1.cpp
@@ -775,7 +775,7 @@ void pdp1_device::execute_run()
if ((! m_run) && (! m_rim))
{
- debugger_instruction_hook(PC);
+ debugger_wait_hook();
m_icount = 0; /* if processor is stopped, just burn cycles */
}
else if (m_rim)
diff --git a/src/devices/cpu/pdp1/pdp1.h b/src/devices/cpu/pdp1/pdp1.h
index f1a4e934236..f4491503131 100644
--- a/src/devices/cpu/pdp1/pdp1.h
+++ b/src/devices/cpu/pdp1/pdp1.h
@@ -87,13 +87,12 @@ public:
protected:
// device-level overrides
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 31; }
- virtual uint32_t execute_input_lines() const noexcept override { return 16; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/pdp8/hd6120.h b/src/devices/cpu/pdp8/hd6120.h
index d7df0fd6547..f3a3d655ba7 100644
--- a/src/devices/cpu/pdp8/hd6120.h
+++ b/src/devices/cpu/pdp8/hd6120.h
@@ -82,8 +82,8 @@ public:
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual void execute_run() override;
diff --git a/src/devices/cpu/pdp8/pdp8.cpp b/src/devices/cpu/pdp8/pdp8.cpp
index 31086b3fb48..7e30766bf90 100644
--- a/src/devices/cpu/pdp8/pdp8.cpp
+++ b/src/devices/cpu/pdp8/pdp8.cpp
@@ -181,17 +181,6 @@ uint32_t pdp8_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t pdp8_device::execute_input_lines() const noexcept
-{
- return 0; // TODO
-}
-
-
-//-------------------------------------------------
// execute_set_input - set the state of an input
// line during execution
//-------------------------------------------------
diff --git a/src/devices/cpu/pdp8/pdp8.h b/src/devices/cpu/pdp8/pdp8.h
index ef6c4af95ae..f8352f5fda5 100644
--- a/src/devices/cpu/pdp8/pdp8.h
+++ b/src/devices/cpu/pdp8/pdp8.h
@@ -6,10 +6,10 @@
Written by Ryan Holtz
*/
-#pragma once
+#ifndef MAME_CPU_PDP8_PDP8_H
+#define MAME_CPU_PDP8_PDP8_H
-#ifndef __PDP8_H__
-#define __PDP8_H__
+#pragma once
//**************************************************************************
// TYPE DEFINITIONS
@@ -25,14 +25,13 @@ public:
pdp8_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -106,4 +105,4 @@ enum
PDP8_HALT
};
-#endif /* __PDP8_H__ */
+#endif // MAME_CPU_PDP8_PDP8_H
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.cpp b/src/devices/cpu/pic16c5x/pic16c5x.cpp
index 5f2a02a23b6..1a4fc4dce00 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.cpp
+++ b/src/devices/cpu/pic16c5x/pic16c5x.cpp
@@ -131,14 +131,76 @@ void pic16c5x_device::rom_11(address_map &map)
map(0x000, 0x7ff).rom();
}
-void pic16c5x_device::ram_5(address_map &map)
+void pic16c5x_device::core_regs(address_map &map, u8 mirror)
{
- map(0x00, 0x1f).ram();
+ map(0x00, 0x00).noprw().mirror(mirror); // Not an actual register, reading indirectly (FSR=0) returns 0
+ map(0x01, 0x01).rw(FUNC(pic16c5x_device::tmr0_r), FUNC(pic16c5x_device::tmr0_w)).mirror(mirror);
+ map(0x02, 0x02).rw(FUNC(pic16c5x_device::pcl_r), FUNC(pic16c5x_device::pcl_w)).mirror(mirror);
+ map(0x03, 0x03).rw(FUNC(pic16c5x_device::status_r), FUNC(pic16c5x_device::status_w)).mirror(mirror);
+ map(0x04, 0x04).rw(FUNC(pic16c5x_device::fsr_r), FUNC(pic16c5x_device::fsr_w)).mirror(mirror);
}
-void pic16c5x_device::ram_7(address_map &map)
+// PIC16C54, PIC16C56: 2 ports (12 pins) + 25 bytes of RAM
+void pic16c5x_device::ram_5_2ports(address_map &map)
{
- map(0x00, 0x0f).ram().mirror(0x60);
+ core_regs(map);
+ map(0x05, 0x05).rw(FUNC(pic16c5x_device::porta_r), FUNC(pic16c5x_device::porta_w));
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w));
+ map(0x07, 0x1f).ram();
+}
+
+// PIC16C55: 3 ports (20 pins) + 24 bytes of RAM
+void pic16c5x_device::ram_5_3ports(address_map &map)
+{
+ core_regs(map);
+ map(0x05, 0x05).rw(FUNC(pic16c5x_device::porta_r), FUNC(pic16c5x_device::porta_w));
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w));
+ map(0x07, 0x07).rw(FUNC(pic16c5x_device::portc_r), FUNC(pic16c5x_device::portc_w));
+ map(0x08, 0x1f).ram();
+}
+
+// PIC1655: 3 ports + 24 bytes of RAM
+void pic16c5x_device::ram_1655_3ports(address_map &map)
+{
+ core_regs(map);
+ map(0x05, 0x05).r(FUNC(pic16c5x_device::porta_r)).nopw(); // A is input-only on 1655
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w));
+ map(0x07, 0x07).rw(FUNC(pic16c5x_device::portc_r), FUNC(pic16c5x_device::portc_w));
+ map(0x08, 0x1f).ram();
+}
+
+// PIC1650: 4 ports + 23 bytes of RAM
+void pic16c5x_device::ram_5_4ports(address_map &map)
+{
+ core_regs(map);
+ map(0x05, 0x05).rw(FUNC(pic16c5x_device::porta_r), FUNC(pic16c5x_device::porta_w));
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w));
+ map(0x07, 0x07).rw(FUNC(pic16c5x_device::portc_r), FUNC(pic16c5x_device::portc_w));
+ map(0x08, 0x08).rw(FUNC(pic16c5x_device::portd_r), FUNC(pic16c5x_device::portd_w));
+ map(0x09, 0x1f).ram();
+}
+
+// PIC16C58: 2 ports (12 pins) + 73 bytes of RAM
+void pic16c5x_device::ram_7_2ports(address_map &map)
+{
+ core_regs(map, 0x60);
+ map(0x05, 0x05).rw(FUNC(pic16c5x_device::porta_r), FUNC(pic16c5x_device::porta_w)).mirror(0x60);
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w)).mirror(0x60);
+ map(0x07, 0x0f).ram().mirror(0x60);
+ map(0x10, 0x1f).ram();
+ map(0x30, 0x3f).ram();
+ map(0x50, 0x5f).ram();
+ map(0x70, 0x7f).ram();
+}
+
+// PIC16C57: 3 ports (20 pins) + 72 bytes of RAM
+void pic16c5x_device::ram_7_3ports(address_map &map)
+{
+ core_regs(map, 0x60);
+ map(0x05, 0x05).rw(FUNC(pic16c5x_device::porta_r), FUNC(pic16c5x_device::porta_w)).mirror(0x60);
+ map(0x06, 0x06).rw(FUNC(pic16c5x_device::portb_r), FUNC(pic16c5x_device::portb_w)).mirror(0x60);
+ map(0x07, 0x07).rw(FUNC(pic16c5x_device::portc_r), FUNC(pic16c5x_device::portc_w)).mirror(0x60);
+ map(0x08, 0x0f).ram().mirror(0x60);
map(0x10, 0x1f).ram();
map(0x30, 0x3f).ram();
map(0x50, 0x5f).ram();
@@ -146,69 +208,60 @@ void pic16c5x_device::ram_7(address_map &map)
}
-pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width, int picmodel)
+pic16c5x_device::pic16c5x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width, int picmodel, address_map_constructor data_map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1,
((program_width == 9) ? address_map_constructor(FUNC(pic16c5x_device::rom_9), this) :
((program_width == 10) ? address_map_constructor(FUNC(pic16c5x_device::rom_10), this) :
address_map_constructor(FUNC(pic16c5x_device::rom_11), this))))
- , m_data_config("data", ENDIANNESS_LITTLE, 8, data_width, 0,
- ((data_width == 5) ? address_map_constructor(FUNC(pic16c5x_device::ram_5), this) :
- address_map_constructor(FUNC(pic16c5x_device::ram_7), this)))
- , m_internalram(nullptr)
+ , m_data_config("data", ENDIANNESS_LITTLE, 8, data_width, 0, data_map)
, m_picmodel(picmodel)
, m_data_width(data_width)
, m_program_width(program_width)
, m_temp_config(0)
- , m_read_a(*this, 0)
- , m_read_b(*this, 0)
- , m_read_c(*this, 0)
- , m_read_d(*this, 0)
- , m_write_a(*this)
- , m_write_b(*this)
- , m_write_c(*this)
- , m_write_d(*this)
+ , m_read_port(*this, 0)
+ , m_write_port(*this)
{
}
pic16c54_device::pic16c54_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC16C54, tag, owner, clock, 9, 5, 0x16C54)
+ : pic16c5x_device(mconfig, PIC16C54, tag, owner, clock, 9, 5, 0x16C54, address_map_constructor(FUNC(pic16c54_device::ram_5_2ports), this))
{
}
pic16c55_device::pic16c55_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC16C55, tag, owner, clock, 9, 5, 0x16C55)
+ : pic16c5x_device(mconfig, PIC16C55, tag, owner, clock, 9, 5, 0x16C55, address_map_constructor(FUNC(pic16c55_device::ram_5_3ports), this))
{
}
pic16c56_device::pic16c56_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC16C56, tag, owner, clock, 10, 5, 0x16C56)
+ : pic16c5x_device(mconfig, PIC16C56, tag, owner, clock, 10, 5, 0x16C56, address_map_constructor(FUNC(pic16c56_device::ram_5_2ports), this))
{
}
pic16c57_device::pic16c57_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC16C57, tag, owner, clock, 11, 7, 0x16C57)
+ : pic16c5x_device(mconfig, PIC16C57, tag, owner, clock, 11, 7, 0x16C57, address_map_constructor(FUNC(pic16c57_device::ram_7_3ports), this))
{
}
pic16c58_device::pic16c58_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC16C58, tag, owner, clock, 11, 7, 0x16C58)
+ : pic16c5x_device(mconfig, PIC16C58, tag, owner, clock, 11, 7, 0x16C58, address_map_constructor(FUNC(pic16c58_device::ram_7_2ports), this))
{
}
pic1650_device::pic1650_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC1650, tag, owner, clock, 9, 5, 0x1650)
+ : pic16c5x_device(mconfig, PIC1650, tag, owner, clock, 9, 5, 0x1650, address_map_constructor(FUNC(pic1650_device::ram_5_4ports), this))
{
}
pic1654s_device::pic1654s_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC1654S, tag, owner, clock, 9, 5, 0x1654)
+ : pic16c5x_device(mconfig, PIC1654S, tag, owner, clock, 9, 5, 0x1654, address_map_constructor(FUNC(pic1654s_device::ram_5_2ports), this))
{
}
pic1655_device::pic1655_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : pic16c5x_device(mconfig, PIC1655, tag, owner, clock, 9, 5, 0x1655)
+ : pic16c5x_device(mconfig, PIC1655, tag, owner, clock, 9, 5, 0x1655, address_map_constructor(FUNC(pic1655_device::ram_1655_3ports), this))
{
}
@@ -226,22 +279,6 @@ std::unique_ptr<util::disasm_interface> pic16c5x_device::create_disassembler()
}
-void pic16c5x_device::update_internalram_ptr()
-{
- m_internalram = (u8 *)space(AS_DATA).get_write_ptr(0x00);
-}
-
-
-
-#define TMR0 m_internalram[1]
-#define PCL m_internalram[2]
-#define STATUS m_internalram[3]
-#define FSR m_internalram[4]
-#define PORTA m_internalram[5]
-#define PORTB m_internalram[6]
-#define PORTC m_internalram[7]
-#define PORTD m_internalram[8]
-
// ******** The following is the Status Flag register definition. ********
// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
@@ -253,12 +290,12 @@ void pic16c5x_device::update_internalram_ptr()
#define DC_FLAG 0x02 // DC Digit Carry/Borrow flag (Nibble)
#define C_FLAG 0x01 // C Carry/Borrow Flag (Byte)
-#define PA (STATUS & PA_REG)
-#define TO (STATUS & TO_FLAG)
-#define PD (STATUS & PD_FLAG)
-#define ZERO (STATUS & Z_FLAG)
-#define DC (STATUS & DC_FLAG)
-#define CARRY (STATUS & C_FLAG)
+#define PA (m_STATUS & PA_REG)
+#define TO (m_STATUS & TO_FLAG)
+#define PD (m_STATUS & PD_FLAG)
+#define ZERO (m_STATUS & Z_FLAG)
+#define DC (m_STATUS & DC_FLAG)
+#define CARRY (m_STATUS & C_FLAG)
// ******** The following is the Option Flag register definition. ********
@@ -290,9 +327,6 @@ void pic16c5x_device::update_internalram_ptr()
* Shortcuts
************************************************************************/
-#define M_RDRAM(A) (((A) < 9) ? m_internalram[A] : m_data.read_byte(A))
-#define M_WRTRAM(A,V) do { if ((A) < 9) m_internalram[A] = (V); else m_data.write_byte(A,V); } while (0)
-
#define CLR(flagreg, flag) (flagreg &= u8(~flag))
#define SET(flagreg, flag) (flagreg |= (flag))
@@ -304,9 +338,9 @@ void pic16c5x_device::update_internalram_ptr()
void pic16c5x_device::calc_zero_flag()
{
if (m_ALU == 0)
- SET(STATUS, Z_FLAG);
+ SET(m_STATUS, Z_FLAG);
else
- CLR(STATUS, Z_FLAG);
+ CLR(m_STATUS, Z_FLAG);
}
void pic16c5x_device::calc_add_flags(u8 augend)
@@ -314,14 +348,14 @@ void pic16c5x_device::calc_add_flags(u8 augend)
calc_zero_flag();
if (augend > m_ALU)
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
else
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
if ((augend & 0x0f) > (m_ALU & 0x0f))
- SET(STATUS, DC_FLAG);
+ SET(m_STATUS, DC_FLAG);
else
- CLR(STATUS, DC_FLAG);
+ CLR(m_STATUS, DC_FLAG);
}
void pic16c5x_device::calc_sub_flags(u8 minuend)
@@ -329,22 +363,21 @@ void pic16c5x_device::calc_sub_flags(u8 minuend)
calc_zero_flag();
if (minuend < m_ALU)
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
else
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
if ((minuend & 0x0f) < (m_ALU & 0x0f))
- CLR(STATUS, DC_FLAG);
+ CLR(m_STATUS, DC_FLAG);
else
- SET(STATUS, DC_FLAG);
+ SET(m_STATUS, DC_FLAG);
}
-void pic16c5x_device::set_pc(offs_t addr)
+void pic16c5x_device::set_pc(u16 addr)
{
m_PC = addr & m_program_mask;
- PCL = m_PC & 0xff;
}
u16 pic16c5x_device::pop_stack()
@@ -362,184 +395,188 @@ void pic16c5x_device::push_stack(u16 data)
-u8 pic16c5x_device::get_regfile(offs_t addr) // Read from internal memory
+u8 pic16c5x_device::get_regfile(u8 addr) // Read from internal memory
{
- u8 data = 0;
-
if (addr == 0) { // Indirect addressing
- addr = FSR & m_data_mask;
+ addr = m_FSR;
+ } else if (m_data_width != 5) {
+ addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
}
- if ((m_picmodel == 0x16C57) || (m_picmodel == 0x16C58)) {
- addr |= (FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
+ return m_data.read_byte(addr);
+}
+
+void pic16c5x_device::store_regfile(u8 addr, u8 data) // Write to internal memory
+{
+ if (addr == 0) { // Indirect addressing
+ addr = m_FSR;
+ } else if (m_data_width != 5) {
+ addr |= (m_FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
}
- if ((addr & 0x10) == 0) addr &= 0x0f;
+ m_data.write_byte(addr, data);
+}
- switch (addr)
- {
- case 0:
- // Not an actual register, reading indirectly (FSR=0) returns 0
- data = 0;
- break;
- case 5:
- // read port A
- if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
- data = m_read_a(PIC16C5x_PORTA, 0xff) & PORTA;
- }
- else if (m_picmodel == 0x1655) {
- data = m_read_a(PIC16C5x_PORTA, 0xff) & 0x0f;
- }
- else {
- data = m_read_a(PIC16C5x_PORTA, 0xff);
- data &= m_TRISA;
- data |= (u8(~m_TRISA) & PORTA);
- data &= 0x0f; // 4-bit port (only lower 4 bits used)
- }
- break;
-
- case 6:
- // read port B
- if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
- data = m_read_b(PIC16C5x_PORTB, 0xff) & PORTB;
- }
- else if (m_picmodel != 0x1655) { // B is output-only on 1655
- data = m_read_b(PIC16C5x_PORTB, 0xff);
- data &= m_TRISB;
- data |= (u8(~m_TRISB) & PORTB);
- }
- break;
+void pic16c5x_device::store_result(u8 addr, u8 data)
+{
+ if (m_opcode.b.l & 0x20)
+ store_regfile(addr, data);
+ else
+ m_W = data;
+}
- case 7:
- // read port C
- if (m_picmodel == 0x1650 || m_picmodel == 0x1655) {
- data = m_read_c(PIC16C5x_PORTC, 0xff) & PORTC;
- }
- else if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
- data = m_read_c(PIC16C5x_PORTC, 0xff);
- data &= m_TRISC;
- data |= (u8(~m_TRISC) & PORTC);
- }
- else { // PIC16C54, PIC16C56, PIC16C58
- data = M_RDRAM(addr);
- }
- break;
- case 8:
- // read port D
- if (m_picmodel == 0x1650) {
- data = m_read_d(PIC16C5x_PORTD, 0xff) & PORTD;
- }
- else {
- data = M_RDRAM(addr);
- }
- break;
- default:
- data = M_RDRAM(addr);
- break;
- }
- return data;
+u8 pic16c5x_device::tmr0_r()
+{
+ return m_TMR0;
}
-void pic16c5x_device::store_regfile(offs_t addr, u8 data) // Write to internal memory
+void pic16c5x_device::tmr0_w(u8 data)
{
- if (addr == 0) { // Indirect addressing
- addr = FSR & m_data_mask;
- }
+ m_delay_timer = 2; // Timer increment is inhibited for 2 cycles
+ if (PSA == 0) m_prescaler = 0; // Must clear the Prescaler
+ m_TMR0 = data;
+}
- if ((m_picmodel == 0x16C57) || (m_picmodel == 0x16C58)) {
- addr |= (FSR & 0x60); // FSR bits 6-5 are used for banking in direct mode
- }
+u8 pic16c5x_device::pcl_r()
+{
+ return m_PC & 0x0ff;
+}
- if ((addr & 0x10) == 0) addr &= 0x0f;
+void pic16c5x_device::pcl_w(u8 data)
+{
+ set_pc(((m_STATUS & PA_REG) << 4) | data);
+ if (!machine().side_effects_disabled())
+ m_inst_cycles++;
+}
- switch (addr)
- {
- case 0:
- // Not an actual register, nothing to save
- break;
+u8 pic16c5x_device::status_r()
+{
+ return m_STATUS;
+}
- case 1:
- m_delay_timer = 2; // Timer increment is inhibited for 2 cycles
- if (PSA == 0) m_prescaler = 0; // Must clear the Prescaler
- TMR0 = data;
- break;
+void pic16c5x_device::status_w(u8 data)
+{
+ // on GI PIC165x, high bits are 1
+ if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655)
+ m_STATUS = data | u8(~m_status_mask);
+ else
+ m_STATUS = (m_STATUS & (TO_FLAG | PD_FLAG)) | (data & u8(~(TO_FLAG | PD_FLAG)));
+}
- case 2:
- set_pc(((STATUS & PA_REG) << 4) | data);
- m_inst_cycles++;
- break;
+u8 pic16c5x_device::fsr_r()
+{
+ // high bits are 1
+ return m_FSR | u8(~m_data_mask);
+}
- case 3:
- // on GI PIC165x, high bits are 1
- if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655)
- STATUS = data | u8(~m_status_mask);
- else
- STATUS = (STATUS & (TO_FLAG | PD_FLAG)) | (data & u8(~(TO_FLAG | PD_FLAG)));
- break;
+void pic16c5x_device::fsr_w(u8 data)
+{
+ m_FSR = data & m_data_mask;
+}
- case 4:
- // high bits are 1
- FSR = data | u8(~m_data_mask);
- break;
+u8 pic16c5x_device::porta_r()
+{
+ // read port A
+ if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
+ return m_read_port[PORTA](PORTA, 0xff) & m_port_data[PORTA];
+ }
+ else if (m_picmodel == 0x1655) {
+ return m_read_port[PORTA](PORTA, 0xff) & 0x0f;
+ }
+ else {
+ u8 data = m_read_port[PORTA](PORTA, 0xff);
+ data &= m_port_tris[PORTA];
+ data |= (u8(~m_port_tris[PORTA]) & m_port_data[PORTA]);
+ return data & 0x0f; // 4-bit port (only lower 4 bits used)
+ }
+}
- case 5:
- // write port A
- if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
- m_write_a(PIC16C5x_PORTA, data, 0xff);
- }
- else if (m_picmodel != 0x1655) { // A is input-only on 1655
- data &= 0x0f; // 4-bit port (only lower 4 bits used)
- m_write_a(PIC16C5x_PORTA, data & u8(~m_TRISA) & 0x0f, u8(~m_TRISA) & 0x0f);
- }
- PORTA = data;
- break;
+void pic16c5x_device::porta_w(u8 data)
+{
+ // write port A
+ if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
+ m_write_port[PORTA](PORTA, data, 0xff);
+ }
+ else {
+ assert(m_picmodel != 0x1655);
+ data &= 0x0f; // 4-bit port (only lower 4 bits used)
+ m_write_port[PORTA](PORTA, data & u8(~m_port_tris[PORTA]) & 0x0f, u8(~m_port_tris[PORTA]) & 0x0f);
+ }
+ m_port_data[PORTA] = data;
+}
- case 6:
- // write port B
- if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655) {
- m_write_b(PIC16C5x_PORTB, data, 0xff);
- }
- else {
- m_write_b(PIC16C5x_PORTB, data & u8(~m_TRISB), u8(~m_TRISB));
- }
- PORTB = data;
- break;
+u8 pic16c5x_device::portb_r()
+{
+ // read port B
+ if ((m_picmodel == 0x1650) || (m_picmodel == 0x1654)) {
+ return m_read_port[PORTB](PORTB, 0xff) & m_port_data[PORTB];
+ }
+ else if (m_picmodel != 0x1655) { // B is output-only on 1655
+ u8 data = m_read_port[PORTB](PORTB, 0xff);
+ data &= m_port_tris[PORTB];
+ data |= (u8(~m_port_tris[PORTB]) & m_port_data[PORTB]);
+ return data;
+ }
+ else
+ return m_port_data[PORTB];
+}
- case 7:
- // write port C
- if (m_picmodel == 0x1650 || m_picmodel == 0x1655) {
- m_write_c(PIC16C5x_PORTC, data, 0xff);
- }
- else if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
- m_write_c(PIC16C5x_PORTC, data & u8(~m_TRISC), u8(~m_TRISC));
- }
- PORTC = data; // also writes to RAM
- break;
+void pic16c5x_device::portb_w(u8 data)
+{
+ // write port B
+ if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655) {
+ m_write_port[PORTB](PORTB, data, 0xff);
+ }
+ else {
+ m_write_port[PORTB](PORTB, data & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB]));
+ }
+ m_port_data[PORTB] = data;
+}
- case 8:
- // write port D
- if (m_picmodel == 0x1650) {
- m_write_d(PIC16C5x_PORTD, data, 0xff);
- }
- PORTD = data; // also writes to RAM
- break;
+u8 pic16c5x_device::portc_r()
+{
+ // read port C
+ if (m_picmodel == 0x1650 || m_picmodel == 0x1655) {
+ return m_read_port[PORTC](PORTC, 0xff) & m_port_data[PORTC];
+ }
+ else {
+ assert((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57));
+ u8 data = m_read_port[PORTC](PORTC, 0xff);
+ data &= m_port_tris[PORTC];
+ data |= (u8(~m_port_tris[PORTC]) & m_port_data[PORTC]);
+ return data;
+ }
+}
- default:
- M_WRTRAM(addr, data);
- break;
+void pic16c5x_device::portc_w(u8 data)
+{
+ // write port C
+ if (m_picmodel == 0x1650 || m_picmodel == 0x1655) {
+ m_write_port[PORTC](PORTC, data, 0xff);
}
+ else {
+ assert((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57));
+ m_write_port[PORTC](PORTC, data & u8(~m_port_tris[PORTC]), u8(~m_port_tris[PORTC]));
+ }
+ m_port_data[PORTC] = data;
}
+u8 pic16c5x_device::portd_r()
+{
+ // read port D
+ assert(m_picmodel == 0x1650);
+ return m_read_port[PORTD](PORTD, 0xff) & m_port_data[PORTD];
+}
-void pic16c5x_device::store_result(offs_t addr, u8 data)
+void pic16c5x_device::portd_w(u8 data)
{
- if (m_opcode.b.l & 0x20)
- store_regfile(addr, data);
- else
- m_W = data;
+ // write port D
+ assert(m_picmodel == 0x1650);
+ m_write_port[PORTD](PORTD, data, 0xff);
+ m_port_data[PORTD] = data;
}
@@ -549,7 +586,7 @@ void pic16c5x_device::store_result(offs_t addr, u8 data)
void pic16c5x_device::illegal()
{
- logerror("PIC16C5x: PC=%03x, Illegal opcode = %04x\n", m_PREVPC, m_opcode.w.l);
+ logerror("PIC16C5x: PC=%03x, Illegal opcode = %04x\n", m_PREVPC, m_opcode.w);
}
/*
@@ -616,27 +653,27 @@ void pic16c5x_device::btfsc()
void pic16c5x_device::call()
{
push_stack(m_PC);
- set_pc((((STATUS & PA_REG) << 4) | m_opcode.b.l) & 0x6ff);
+ set_pc((((m_STATUS & PA_REG) << 4) | m_opcode.b.l) & 0x6ff);
}
void pic16c5x_device::clrw()
{
m_W = 0;
- SET(STATUS, Z_FLAG);
+ SET(m_STATUS, Z_FLAG);
}
void pic16c5x_device::clrf()
{
store_regfile(ADDR, 0);
- SET(STATUS, Z_FLAG);
+ SET(m_STATUS, Z_FLAG);
}
void pic16c5x_device::clrwdt()
{
m_WDT = 0;
if (PSA) m_prescaler = 0;
- SET(STATUS, TO_FLAG);
- SET(STATUS, PD_FLAG);
+ SET(m_STATUS, TO_FLAG);
+ SET(m_STATUS, PD_FLAG);
}
void pic16c5x_device::comf()
@@ -665,7 +702,7 @@ void pic16c5x_device::decfsz()
void pic16c5x_device::goto_op()
{
- set_pc(((STATUS & PA_REG) << 4) | (m_opcode.w.l & 0x1ff));
+ set_pc(((m_STATUS & PA_REG) << 4) | (m_opcode.w & 0x1ff));
}
void pic16c5x_device::incf()
@@ -737,13 +774,13 @@ void pic16c5x_device::rlf()
m_ALU = get_regfile(ADDR);
int carry = BIT(m_ALU, 7);
m_ALU <<= 1;
- if (STATUS & C_FLAG) m_ALU |= 1;
+ if (m_STATUS & C_FLAG) m_ALU |= 1;
store_result(ADDR, m_ALU);
if (carry)
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
else
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
}
void pic16c5x_device::rrf()
@@ -751,21 +788,21 @@ void pic16c5x_device::rrf()
m_ALU = get_regfile(ADDR);
int carry = BIT(m_ALU, 0);
m_ALU >>= 1;
- if (STATUS & C_FLAG) m_ALU |= 0x80;
+ if (m_STATUS & C_FLAG) m_ALU |= 0x80;
store_result(ADDR, m_ALU);
if (carry)
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
else
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
}
void pic16c5x_device::sleepic()
{
if (WDTE) m_WDT = 0;
if (PSA) m_prescaler = 0;
- SET(STATUS, TO_FLAG);
- CLR(STATUS, PD_FLAG);
+ SET(m_STATUS, TO_FLAG);
+ CLR(m_STATUS, PD_FLAG);
}
void pic16c5x_device::subwf()
@@ -788,24 +825,24 @@ void pic16c5x_device::tris()
switch (m_opcode.b.l & 0x7)
{
case 5:
- if (m_TRISA != m_W) {
- m_TRISA = m_W | 0xf0;
- m_write_a(PIC16C5x_PORTA, PORTA & u8(~m_TRISA) & 0x0f, u8(~m_TRISA) & 0x0f);
+ if (m_port_tris[PORTA] != m_W) {
+ m_port_tris[PORTA] = m_W | 0xf0;
+ m_write_port[PORTA](PORTA, m_port_data[PORTA] & u8(~m_port_tris[PORTA]) & 0x0f, u8(~m_port_tris[PORTA]) & 0x0f);
}
break;
case 6:
- if (m_TRISB != m_W) {
- m_TRISB = m_W;
- m_write_b(PIC16C5x_PORTB, PORTB & u8(~m_TRISB), u8(~m_TRISB));
+ if (m_port_tris[PORTB] != m_W) {
+ m_port_tris[PORTB] = m_W;
+ m_write_port[PORTB](PORTB, m_port_data[PORTB] & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB]));
}
break;
case 7:
if ((m_picmodel == 0x16C55) || (m_picmodel == 0x16C57)) {
- if (m_TRISC != m_W) {
- m_TRISC = m_W;
- m_write_c(PIC16C5x_PORTC, PORTC & u8(~m_TRISC), u8(~m_TRISC));
+ if (m_port_tris[PORTC] != m_W) {
+ m_port_tris[PORTC] = m_W;
+ m_write_port[PORTC](PORTC, m_port_data[PORTC] & u8(~m_port_tris[PORTC]), u8(~m_port_tris[PORTC]));
}
}
else {
@@ -933,14 +970,14 @@ enum
void pic16c5x_device::device_start()
{
+ bool is_nmospic = (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655);
+
space(AS_PROGRAM).cache(m_program);
space(AS_DATA).specific(m_data);
m_program_mask = (1 << m_program_width) - 1;
m_data_mask = (1 << m_data_width) - 1;
- m_status_mask = (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655) ? 0x07 : 0xff;
-
- update_internalram_ptr();
+ m_status_mask = is_nmospic ? 0x07 : 0xff;
m_PC = 0;
m_PREVPC = 0;
@@ -949,9 +986,14 @@ void pic16c5x_device::device_start()
m_CONFIG = 0;
m_ALU = 0;
m_WDT = 0;
- memset(m_STACK, 0, sizeof(m_STACK));
+ m_TMR0 = 0;
+ m_STATUS = ~m_status_mask;
+ m_FSR = 0;
+ std::fill(std::begin(m_port_data), std::end(m_port_data), 0);
+ std::fill(std::begin(m_port_tris), std::end(m_port_tris), 0);
+ std::fill(std::begin(m_STACK), std::end(m_STACK), 0);
m_prescaler = 0;
- m_opcode.d = 0;
+ m_opcode.w = 0;
m_delay_timer = 0;
m_rtcc = 0;
@@ -967,12 +1009,15 @@ void pic16c5x_device::device_start()
save_item(NAME(m_CONFIG));
save_item(NAME(m_ALU));
save_item(NAME(m_WDT));
- save_item(NAME(m_TRISA));
- save_item(NAME(m_TRISB));
- save_item(NAME(m_TRISC));
+ save_item(NAME(m_TMR0));
+ save_item(NAME(m_STATUS));
+ save_item(NAME(m_FSR));
+ save_item(NAME(m_port_data));
+ if (!is_nmospic)
+ save_item(NAME(m_port_tris));
save_item(NAME(m_STACK));
save_item(NAME(m_prescaler));
- save_item(NAME(m_opcode.d));
+ save_item(NAME(m_opcode.w));
save_item(NAME(m_delay_timer));
save_item(NAME(m_temp_config));
@@ -990,14 +1035,20 @@ void pic16c5x_device::device_start()
state_add( PIC16C5x_OPT, "OPT", m_OPTION).formatstr("%02X");
state_add( PIC16C5x_STK0, "STK0", m_STACK[0]).mask(0xfff).formatstr("%03X");
state_add( PIC16C5x_STK1, "STK1", m_STACK[1]).mask(0xfff).formatstr("%03X");
- state_add( PIC16C5x_PRTA, "PRTA", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
+ if (m_picmodel != 0x1655)
+ state_add( PIC16C5x_PRTA, "PRTA", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
state_add( PIC16C5x_PRTB, "PRTB", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
- state_add( PIC16C5x_PRTC, "PRTC", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
- state_add( PIC16C5x_PRTD, "PRTD", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
- state_add( PIC16C5x_TRSA, "TRSA", m_TRISA).mask(0xf).formatstr("%01X");
- state_add( PIC16C5x_TRSB, "TRSB", m_TRISB).formatstr("%02X");
- state_add( PIC16C5x_TRSC, "TRSC", m_TRISC).formatstr("%02X");
- state_add( PIC16C5x_FSR, "FSR", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
+ if (m_picmodel != 0x1654 && m_picmodel != 0x16C54 && m_picmodel != 0x16C56 && m_picmodel != 0x16C58)
+ state_add( PIC16C5x_PRTC, "PRTC", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
+ if (m_picmodel == 0x1650)
+ state_add( PIC16C5x_PRTD, "PRTD", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
+ if (!is_nmospic) {
+ state_add( PIC16C5x_TRSA, "TRSA", m_port_tris[PORTA]).mask(0xf).formatstr("%01X");
+ state_add( PIC16C5x_TRSB, "TRSB", m_port_tris[PORTB]).formatstr("%02X");
+ if (m_picmodel != 0x16C54 && m_picmodel != 0x16C56 && m_picmodel != 0x16C58)
+ state_add( PIC16C5x_TRSC, "TRSC", m_port_tris[PORTC]).formatstr("%02X");
+ }
+ state_add( PIC16C5x_FSR, "FSR", m_debugger_temp).mask(m_data_mask).formatstr("%02X");
state_add( PIC16C5x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s");
state_add( STATE_GENPC, "GENPC", m_PC).noshow();
@@ -1013,25 +1064,22 @@ void pic16c5x_device::state_import(const device_state_entry &entry)
switch (entry.index())
{
case PIC16C5x_STR:
- STATUS = m_debugger_temp | u8(~m_status_mask);
+ m_STATUS = m_debugger_temp | u8(~m_status_mask);
break;
case PIC16C5x_TMR0:
- TMR0 = m_debugger_temp;
+ m_TMR0 = m_debugger_temp;
break;
case PIC16C5x_PRTA:
- PORTA = m_debugger_temp;
+ m_port_data[PORTA] = m_debugger_temp;
break;
case PIC16C5x_PRTB:
- PORTB = m_debugger_temp;
+ m_port_data[PORTB] = m_debugger_temp;
break;
case PIC16C5x_PRTC:
- PORTC = m_debugger_temp;
+ m_port_data[PORTC] = m_debugger_temp;
break;
case PIC16C5x_PRTD:
- PORTD = m_debugger_temp;
- break;
- case PIC16C5x_FSR:
- FSR = m_debugger_temp | u8(~m_data_mask);
+ m_port_data[PORTD] = m_debugger_temp;
break;
case PIC16C5x_PSCL:
m_prescaler = m_debugger_temp;
@@ -1044,25 +1092,22 @@ void pic16c5x_device::state_export(const device_state_entry &entry)
switch (entry.index())
{
case PIC16C5x_STR:
- m_debugger_temp = STATUS | u8(~m_status_mask);
+ m_debugger_temp = m_STATUS | u8(~m_status_mask);
break;
case PIC16C5x_TMR0:
- m_debugger_temp = TMR0;
+ m_debugger_temp = m_TMR0;
break;
case PIC16C5x_PRTA:
- m_debugger_temp = PORTA;
+ m_debugger_temp = m_port_data[PORTA];
break;
case PIC16C5x_PRTB:
- m_debugger_temp = PORTB;
+ m_debugger_temp = m_port_data[PORTB];
break;
case PIC16C5x_PRTC:
- m_debugger_temp = PORTC;
+ m_debugger_temp = m_port_data[PORTC];
break;
case PIC16C5x_PRTD:
- m_debugger_temp = PORTD;
- break;
- case PIC16C5x_FSR:
- m_debugger_temp = FSR | u8(~m_data_mask);
+ m_debugger_temp = m_port_data[PORTD];
break;
}
}
@@ -1077,16 +1122,16 @@ void pic16c5x_device::state_string_export(const device_state_entry &entry, std::
case STATE_GENFLAGS:
str = string_format("%01x%c%c%c%c%c %c%c%c%03x",
- (STATUS & 0xe0) >> 5,
- STATUS & 0x10 ? '.':'O', // WDT Overflow
- STATUS & 0x08 ? 'P':'D', // Power/Down
- STATUS & 0x04 ? 'Z':'.', // Zero
- STATUS & 0x02 ? 'c':'b', // Nibble Carry/Borrow
- STATUS & 0x01 ? 'C':'B', // Carry/Borrow
-
- m_OPTION & 0x20 ? 'C':'T', // Counter/Timer
- m_OPTION & 0x10 ? 'N':'P', // Negative/Positive
- m_OPTION & 0x08 ? 'W':'T', // WatchDog/Timer
+ (m_STATUS & 0xe0) >> 5,
+ m_STATUS & 0x10 ? '.':'O', // WDT Overflow
+ m_STATUS & 0x08 ? 'P':'D', // Power/Down
+ m_STATUS & 0x04 ? 'Z':'.', // Zero
+ m_STATUS & 0x02 ? 'c':'b', // Nibble Carry/Borrow
+ m_STATUS & 0x01 ? 'C':'B', // Carry/Borrow
+
+ m_OPTION & 0x20 ? 'C':'T', // Counter/Timer
+ m_OPTION & 0x10 ? 'N':'P', // Negative/Positive
+ m_OPTION & 0x08 ? 'W':'T', // WatchDog/Timer
m_OPTION & 0x08 ? (1<<(m_OPTION&7)) : (2<<(m_OPTION&7)));
break;
}
@@ -1100,9 +1145,9 @@ void pic16c5x_device::state_string_export(const device_state_entry &entry, std::
void pic16c5x_device::reset_regs()
{
m_CONFIG = m_temp_config;
- m_TRISA = 0xff;
- m_TRISB = 0xff;
- m_TRISC = 0xff;
+ m_port_tris[PORTA] = 0xff;
+ m_port_tris[PORTB] = 0xff;
+ m_port_tris[PORTC] = 0xff;
m_OPTION = T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG;
set_pc(m_program_mask);
m_PREVPC = m_PC;
@@ -1115,7 +1160,7 @@ void pic16c5x_device::reset_regs()
void pic16c5x_device::watchdog_reset()
{
- SET(STATUS, TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG);
+ SET(m_STATUS, TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG);
reset_regs();
}
@@ -1129,10 +1174,8 @@ void pic16c5x_device::set_config(u16 data)
void pic16c5x_device::device_reset()
{
reset_regs();
- CLR(STATUS, PA_REG);
- SET(STATUS, TO_FLAG | PD_FLAG);
- store_regfile(3, STATUS);
- store_regfile(4, FSR);
+ CLR(m_STATUS, PA_REG);
+ SET(m_STATUS, TO_FLAG | PD_FLAG);
}
@@ -1151,7 +1194,7 @@ void pic16c5x_device::update_watchdog(int counts)
If the current instruction is CLRWDT or SLEEP, don't update the WDT
*/
- if ((m_opcode.w.l != 3) && (m_opcode.w.l != 4)) {
+ if ((m_opcode.w != 3) && (m_opcode.w != 4)) {
u16 old_WDT = m_WDT;
m_WDT -= counts;
@@ -1165,12 +1208,12 @@ void pic16c5x_device::update_watchdog(int counts)
m_prescaler++;
if (m_prescaler >= (1 << PS)) { // Prescale values from 1 to 128
m_prescaler = 0;
- CLR(STATUS, TO_FLAG);
+ CLR(m_STATUS, TO_FLAG);
watchdog_reset();
}
}
else {
- CLR(STATUS, TO_FLAG);
+ CLR(m_STATUS, TO_FLAG);
watchdog_reset();
}
}
@@ -1196,12 +1239,12 @@ void pic16c5x_device::update_timer(int counts)
if (PSA == 0) {
m_prescaler += counts;
if (m_prescaler >= (2 << PS)) { // Prescale values from 2 to 256
- TMR0 += (m_prescaler / (2 << PS));
+ m_TMR0 += (m_prescaler / (2 << PS));
m_prescaler %= (2 << PS); // Overflow prescaler
}
}
else {
- TMR0 += counts;
+ m_TMR0 += counts;
}
}
@@ -1230,8 +1273,6 @@ void pic16c5x_device::execute_set_input(int line, int state)
void pic16c5x_device::execute_run()
{
- update_internalram_ptr();
-
do {
if (PD == 0) { // Sleep Mode
m_count_cycles = 0;
@@ -1243,12 +1284,12 @@ void pic16c5x_device::execute_run()
debugger_instruction_hook(m_PC);
- m_opcode.d = m_program.read_word(m_PC);
+ m_opcode.w = m_program.read_word(m_PC);
set_pc(m_PC + 1);
- if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655 || (m_opcode.w.l & 0xff0) != 0x000) { // Do all opcodes except the 00? ones
- m_inst_cycles = s_opcode_main[((m_opcode.w.l >> 4) & 0xff)].cycles;
- (this->*s_opcode_main[((m_opcode.w.l >> 4) & 0xff)].function)();
+ if (m_picmodel == 0x1650 || m_picmodel == 0x1654 || m_picmodel == 0x1655 || (m_opcode.w & 0xff0) != 0x000) { // Do all opcodes except the 00? ones
+ m_inst_cycles = s_opcode_main[((m_opcode.w >> 4) & 0xff)].cycles;
+ (this->*s_opcode_main[((m_opcode.w >> 4) & 0xff)].function)();
}
else { // Opcode 0x00? has many opcodes in its minor nibble
m_inst_cycles = s_opcode_00x[(m_opcode.b.l & 0x1f)].cycles;
diff --git a/src/devices/cpu/pic16c5x/pic16c5x.h b/src/devices/cpu/pic16c5x/pic16c5x.h
index e4d25f6211f..ddc3037f511 100644
--- a/src/devices/cpu/pic16c5x/pic16c5x.h
+++ b/src/devices/cpu/pic16c5x/pic16c5x.h
@@ -24,15 +24,6 @@ enum
#define PIC16C5x_T0CKI PIC16C5x_RTCC
-// i/o ports
-enum
-{
- PIC16C5x_PORTA = 0,
- PIC16C5x_PORTB,
- PIC16C5x_PORTC,
- PIC16C5x_PORTD
-};
-
DECLARE_DEVICE_TYPE(PIC16C54, pic16c54_device)
DECLARE_DEVICE_TYPE(PIC16C55, pic16c55_device)
DECLARE_DEVICE_TYPE(PIC16C56, pic16c56_device)
@@ -46,22 +37,31 @@ DECLARE_DEVICE_TYPE(PIC1655, pic1655_device)
class pic16c5x_device : public cpu_device
{
+ // i/o ports
+ enum
+ {
+ PORTA = 0,
+ PORTB,
+ PORTC,
+ PORTD
+ };
+
public:
// port a, 4 or 8 bits, 2-way
- auto read_a() { return m_read_a.bind(); }
- auto write_a() { return m_write_a.bind(); }
+ auto read_a() { return m_read_port[PORTA].bind(); }
+ auto write_a() { return m_write_port[PORTA].bind(); }
// port b, 8 bits, 2-way
- auto read_b() { return m_read_b.bind(); }
- auto write_b() { return m_write_b.bind(); }
+ auto read_b() { return m_read_port[PORTB].bind(); }
+ auto write_b() { return m_write_port[PORTB].bind(); }
// port c, 8 bits, 2-way
- auto read_c() { return m_read_c.bind(); }
- auto write_c() { return m_write_c.bind(); }
+ auto read_c() { return m_read_port[PORTC].bind(); }
+ auto write_c() { return m_write_port[PORTC].bind(); }
// port d, 8 bits, 2-way
- auto read_d() { return m_read_d.bind(); }
- auto write_d() { return m_write_d.bind(); }
+ auto read_d() { return m_read_port[PORTD].bind(); }
+ auto write_d() { return m_write_port[PORTD].bind(); }
/****************************************************************************
* Function to configure the CONFIG register. This is actually hard-wired
@@ -70,19 +70,24 @@ public:
*/
void set_config(u16 data);
- void ram_5(address_map &map);
- void ram_7(address_map &map);
- void rom_10(address_map &map);
- void rom_11(address_map &map);
- void rom_9(address_map &map);
+ void core_regs(address_map &map, u8 mirror = 0) ATTR_COLD;
+ void ram_5_2ports(address_map &map) ATTR_COLD;
+ void ram_5_3ports(address_map &map) ATTR_COLD;
+ void ram_1655_3ports(address_map &map) ATTR_COLD;
+ void ram_5_4ports(address_map &map) ATTR_COLD;
+ void ram_7_2ports(address_map &map) ATTR_COLD;
+ void ram_7_3ports(address_map &map) ATTR_COLD;
+ void rom_10(address_map &map) ATTR_COLD;
+ void rom_11(address_map &map) ATTR_COLD;
+ void rom_9(address_map &map) ATTR_COLD;
protected:
// construction/destruction
- pic16c5x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width, int picmodel);
+ pic16c5x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, int data_width, int picmodel, address_map_constructor data_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
/**************************************************************************
@@ -96,7 +101,6 @@ protected:
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2; }
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PIC16C5x_RTCC; }
virtual void execute_run() override;
virtual void execute_set_input(int line, int state) override;
@@ -124,13 +128,14 @@ private:
u16 m_CONFIG;
u8 m_ALU;
u16 m_WDT;
- u8 m_TRISA;
- u8 m_TRISB;
- u8 m_TRISC;
+ u8 m_TMR0;
+ u8 m_STATUS;
+ u8 m_FSR;
+ u8 m_port_data[4];
+ u8 m_port_tris[3];
u16 m_STACK[2];
u16 m_prescaler; // Note: this is really an 8-bit register
- PAIR m_opcode;
- u8 *m_internalram;
+ PAIR16 m_opcode;
int m_icount;
int m_picmodel;
@@ -149,14 +154,8 @@ private:
memory_access< 7, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
// i/o handlers
- devcb_read8 m_read_a;
- devcb_read8 m_read_b;
- devcb_read8 m_read_c;
- devcb_read8 m_read_d;
- devcb_write8 m_write_a;
- devcb_write8 m_write_b;
- devcb_write8 m_write_c;
- devcb_write8 m_write_d;
+ devcb_read8::array<4> m_read_port;
+ devcb_write8::array<4> m_write_port;
// For debugger
int m_debugger_temp;
@@ -171,16 +170,32 @@ private:
static const pic16c5x_opcode s_opcode_main[256];
static const pic16c5x_opcode s_opcode_00x[16];
- void update_internalram_ptr();
void calc_zero_flag();
void calc_add_flags(u8 augend);
void calc_sub_flags(u8 minuend);
u16 pop_stack();
void push_stack(u16 data);
- void set_pc(offs_t addr);
- u8 get_regfile(offs_t addr);
- void store_regfile(offs_t addr, u8 data);
- void store_result(offs_t addr, u8 data);
+ void set_pc(u16 addr);
+ u8 get_regfile(u8 addr);
+ void store_regfile(u8 addr, u8 data);
+ void store_result(u8 addr, u8 data);
+
+ u8 tmr0_r();
+ void tmr0_w(u8 data);
+ u8 pcl_r();
+ void pcl_w(u8 data);
+ u8 status_r();
+ void status_w(u8 data);
+ u8 fsr_r();
+ void fsr_w(u8 data);
+ u8 porta_r();
+ void porta_w(u8 data);
+ u8 portb_r();
+ void portb_w(u8 data);
+ u8 portc_r();
+ void portc_w(u8 data);
+ u8 portd_r();
+ void portd_w(u8 data);
void reset_regs();
void watchdog_reset();
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.cpp b/src/devices/cpu/pic16c62x/pic16c62x.cpp
index 1f956508107..22914038a2d 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.cpp
+++ b/src/devices/cpu/pic16c62x/pic16c62x.cpp
@@ -85,86 +85,97 @@ void pic16c62x_device::pic16c62x_rom_11(address_map &map)
map(0x000, 0x7ff).rom();
}
+void pic16c62x_device::core_regs(address_map &map)
+{
+ map(0x01, 0x01).rw(FUNC(pic16c62x_device::tmr0_r), FUNC(pic16c62x_device::tmr0_w));
+ map(0x02, 0x02).mirror(0x80).rw(FUNC(pic16c62x_device::pcl_r), FUNC(pic16c62x_device::pcl_w));
+ map(0x03, 0x03).mirror(0x80).rw(FUNC(pic16c62x_device::status_r), FUNC(pic16c62x_device::status_w));
+ map(0x04, 0x04).mirror(0x80).rw(FUNC(pic16c62x_device::fsr_r), FUNC(pic16c62x_device::fsr_w));
+ map(0x05, 0x05).rw(FUNC(pic16c62x_device::porta_r), FUNC(pic16c62x_device::porta_w));
+ map(0x06, 0x06).rw(FUNC(pic16c62x_device::portb_r), FUNC(pic16c62x_device::portb_w));
+ map(0x0a, 0x0a).mirror(0x80).rw(FUNC(pic16c62x_device::pclath_r), FUNC(pic16c62x_device::pclath_w));
+ map(0x0b, 0x0b).mirror(0x80).rw(FUNC(pic16c62x_device::intcon_r), FUNC(pic16c62x_device::intcon_w));
+ map(0x0c, 0x0c).rw(FUNC(pic16c62x_device::pir1_r), FUNC(pic16c62x_device::pir1_w));
+ map(0x1f, 0x1f).rw(FUNC(pic16c62x_device::cmcon_r), FUNC(pic16c62x_device::cmcon_w));
+ map(0x81, 0x81).rw(FUNC(pic16c62x_device::option_r), FUNC(pic16c62x_device::option_w));
+ map(0x85, 0x85).rw(FUNC(pic16c62x_device::trisa_r), FUNC(pic16c62x_device::trisa_w));
+ map(0x86, 0x86).rw(FUNC(pic16c62x_device::trisb_r), FUNC(pic16c62x_device::trisb_w));
+ map(0x8c, 0x8c).rw(FUNC(pic16c62x_device::pie1_r), FUNC(pic16c62x_device::pie1_w));
+ map(0x8e, 0x8e).rw(FUNC(pic16c62x_device::pcon_r), FUNC(pic16c62x_device::pcon_w));
+ map(0x9f, 0x9f).rw(FUNC(pic16c62x_device::vrcon_r), FUNC(pic16c62x_device::vrcon_w));
+}
+
void pic16c62x_device::pic16c620_ram(address_map &map)
{
- map(0x00, 0x06).ram();
- map(0x0a, 0x0c).ram();
- map(0x1f, 0x6f).ram();
- map(0x80, 0x86).ram();
- map(0x8a, 0x8e).ram();
- map(0x9f, 0x9f).ram();
+ core_regs(map);
+ map(0x20, 0x6f).ram();
}
void pic16c62x_device::pic16c622_ram(address_map &map)
{
- map(0x00, 0x06).ram();
- map(0x0a, 0x0c).ram();
- map(0x1f, 0x7f).ram();
- map(0x80, 0x86).ram();
- map(0x8a, 0x8e).ram();
- map(0x9f, 0xbf).ram();
+ core_regs(map);
+ map(0x20, 0x7f).ram();
+ map(0xa0, 0xbf).ram();
+}
+
+void pic16c62x_device::pic16c620a_ram(address_map &map)
+{
+ core_regs(map);
+ map(0x20, 0x6f).ram();
+ map(0x70, 0x7f).mirror(0x80).ram();
}
-// pic16c620a, pic16c621a and pic16c622a
-void pic16c62x_device::pic16c62xa_ram(address_map &map)
+void pic16c62x_device::pic16c622a_ram(address_map &map)
{
- map(0x00, 0x06).ram();
- map(0x0a, 0x0c).ram();
- map(0x1f, 0x6f).ram();
- map(0x70, 0x7f).ram().share(nullptr);
- map(0x80, 0x86).ram();
- map(0x8a, 0x8e).ram();
- map(0x9f, 0xbf).ram();
- map(0xf0, 0xff).ram().share(nullptr);
+ core_regs(map);
+ map(0x20, 0x6f).ram();
+ map(0x70, 0x7f).mirror(0x80).ram();
+ map(0xa0, 0xbf).ram();
}
-pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int picmodel)
+pic16c62x_device::pic16c62x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, address_map_constructor ram_map)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1
, ( ( program_width == 9 ) ? address_map_constructor(FUNC(pic16c62x_device::pic16c62x_rom_9), this) :
( ( program_width == 10 ) ? address_map_constructor(FUNC(pic16c62x_device::pic16c62x_rom_10), this) :
address_map_constructor(FUNC(pic16c62x_device::pic16c62x_rom_11), this) )))
- , m_data_config("data", ENDIANNESS_LITTLE, 8, 8, 0
- , ( ( picmodel == 0x16C620 || picmodel == 0x16C621 ) ? address_map_constructor(FUNC(pic16c62x_device::pic16c620_ram), this) :
- ( ( picmodel == 0x16C622 ) ? address_map_constructor(FUNC(pic16c62x_device::pic16c622_ram), this) :
- address_map_constructor(FUNC(pic16c62x_device::pic16c62xa_ram), this) ) ) )
- , m_io_config("io", ENDIANNESS_LITTLE, 8, 5, 0)
+ , m_data_config("data", ENDIANNESS_LITTLE, 8, 8, 0, ram_map)
, m_CONFIG(0x3fff)
, m_reset_vector(0x0)
- , m_picmodel(picmodel)
- , m_picRAMmask(0xff)
+ , m_read_port(*this, 0)
+ , m_write_port(*this)
{
}
pic16c620_device::pic16c620_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C620, tag, owner, clock, 9, 0x16C620)
+ : pic16c62x_device(mconfig, PIC16C620, tag, owner, clock, 9, address_map_constructor(FUNC(pic16c620_device::pic16c620_ram), this))
{
}
pic16c620a_device::pic16c620a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C620A, tag, owner, clock, 9, 0x16C620A)
+ : pic16c62x_device(mconfig, PIC16C620A, tag, owner, clock, 9, address_map_constructor(FUNC(pic16c620a_device::pic16c620a_ram), this))
{
}
pic16c621_device::pic16c621_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C621, tag, owner, clock, 10, 0x16C621)
+ : pic16c62x_device(mconfig, PIC16C621, tag, owner, clock, 10, address_map_constructor(FUNC(pic16c621_device::pic16c620_ram), this))
{
}
pic16c621a_device::pic16c621a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C621A, tag, owner, clock, 10, 0x16C621A)
+ : pic16c62x_device(mconfig, PIC16C621A, tag, owner, clock, 10, address_map_constructor(FUNC(pic16c621a_device::pic16c620a_ram), this))
{
}
pic16c622_device::pic16c622_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C622, tag, owner, clock, 11, 0x16C622)
+ : pic16c62x_device(mconfig, PIC16C622, tag, owner, clock, 11, address_map_constructor(FUNC(pic16c622_device::pic16c622_ram), this))
{
}
pic16c622a_device::pic16c622a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : pic16c62x_device(mconfig, PIC16C622A, tag, owner, clock, 11, 0x16C622A)
+ : pic16c62x_device(mconfig, PIC16C622A, tag, owner, clock, 11, address_map_constructor(FUNC(pic16c622a_device::pic16c622a_ram), this))
{
}
@@ -173,8 +184,7 @@ device_memory_interface::space_config_vector pic16c62x_device::memory_space_conf
{
return space_config_vector{
std::make_pair(AS_PROGRAM, &m_program_config),
- std::make_pair(AS_DATA, &m_data_config),
- std::make_pair(AS_IO, &m_io_config)
+ std::make_pair(AS_DATA, &m_data_config)
};
}
@@ -184,37 +194,16 @@ std::unique_ptr<util::disasm_interface> pic16c62x_device::create_disassembler()
}
-void pic16c62x_device::update_internalram_ptr()
-{
- m_internalram = (uint8_t *)m_data.space().get_write_ptr(0x00);
-}
-
#define PIC16C62x_RDOP(A) (m_cache.read_word(A))
-#define PIC16C62x_RAM_RDMEM(A) ((uint8_t)m_data.read_byte(A))
-#define PIC16C62x_RAM_WRMEM(A,V) (m_data.write_byte(A,V))
-#define PIC16C62x_In(Port) ((uint8_t)m_io.read_byte((Port)))
-#define PIC16C62x_Out(Port,Value) (m_io.write_byte((Port),Value))
/************ Read the state of the T0 Clock input signal ************/
-#define PIC16C62x_T0_In (m_io.read_byte(PIC16C62x_T0) >> 4)
+#define PIC16C62x_T0_In ((porta_r() >> 4) & 1)
-#define M_RDRAM(A) (((A) == 0) ? m_internalram[0] : PIC16C62x_RAM_RDMEM(A))
-#define M_WRTRAM(A,V) do { if ((A) == 0) m_internalram[0] = (V); else PIC16C62x_RAM_WRMEM(A,V); } while (0)
#define M_RDOP(A) PIC16C62x_RDOP(A)
-#define P_IN(A) PIC16C62x_In(A)
-#define P_OUT(A,V) PIC16C62x_Out(A,V)
#define S_T0_IN PIC16C62x_T0_In
#define ADDR_MASK 0x1fff
-#define TMR0 m_internalram[1]
-#define PCL m_internalram[2]
-#define STATUS m_internalram[3]
-#define FSR m_internalram[4]
-#define PORTA m_internalram[5]
-#define PORTB m_internalram[6]
-#define INDF M_RDRAM(FSR)
-
#define RISING_EDGE_T0 (( (int)(T0_in - m_old_T0) > 0) ? 1 : 0)
#define FALLING_EDGE_T0 (( (int)(T0_in - m_old_T0) < 0) ? 1 : 0)
@@ -231,14 +220,14 @@ void pic16c62x_device::update_internalram_ptr()
#define DC_FLAG 0x02 /* DC Digit Carry/Borrow flag (Nibble) */
#define C_FLAG 0x01 /* C Carry/Borrow Flag (Byte) */
-#define IRP (STATUS & IRP_FLAG)
-#define RP1 (STATUS & RP1_FLAG)
-#define RP0 (STATUS & RP0_FLAG)
-#define TO (STATUS & TO_FLAG)
-#define PD (STATUS & PD_FLAG)
-#define ZERO (STATUS & Z_FLAG)
-#define DC (STATUS & DC_FLAG)
-#define CARRY (STATUS & C_FLAG)
+#define IRP (m_STATUS & IRP_FLAG)
+#define RP1 (m_STATUS & RP1_FLAG)
+#define RP0 (m_STATUS & RP0_FLAG)
+#define TO (m_STATUS & TO_FLAG)
+#define PD (m_STATUS & PD_FLAG)
+#define ZERO (m_STATUS & Z_FLAG)
+#define DC (m_STATUS & DC_FLAG)
+#define CARRY (m_STATUS & C_FLAG)
#define ADDR ((m_opcode.b.l & 0x7f) | (RP0 << 2))
@@ -279,55 +268,53 @@ void pic16c62x_device::update_internalram_ptr()
/* Easy bit position selectors */
-#define POS ((m_opcode.w.l >> 7) & 7)
-static const unsigned int bit_clr[8] = { 0xfe, 0xfd, 0xfb, 0xf7, 0xef, 0xdf, 0xbf, 0x7f };
-static const unsigned int bit_set[8] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };
+#define POS ((m_opcode.w >> 7) & 7)
void pic16c62x_device::CALCULATE_Z_FLAG()
{
- if (m_ALU == 0) SET(STATUS, Z_FLAG);
- else CLR(STATUS, Z_FLAG);
+ if (m_ALU == 0) SET(m_STATUS, Z_FLAG);
+ else CLR(m_STATUS, Z_FLAG);
}
void pic16c62x_device::CALCULATE_ADD_CARRY()
{
if ((uint8_t)(m_old_data) > (uint8_t)(m_ALU)) {
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
}
else {
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
}
}
void pic16c62x_device::CALCULATE_ADD_DIGITCARRY()
{
if (((uint8_t)(m_old_data) & 0x0f) > ((uint8_t)(m_ALU) & 0x0f)) {
- SET(STATUS, DC_FLAG);
+ SET(m_STATUS, DC_FLAG);
}
else {
- CLR(STATUS, DC_FLAG);
+ CLR(m_STATUS, DC_FLAG);
}
}
void pic16c62x_device::CALCULATE_SUB_CARRY()
{
if ((uint8_t)(m_old_data) < (uint8_t)(m_ALU)) {
- CLR(STATUS, C_FLAG);
+ CLR(m_STATUS, C_FLAG);
}
else {
- SET(STATUS, C_FLAG);
+ SET(m_STATUS, C_FLAG);
}
}
void pic16c62x_device::CALCULATE_SUB_DIGITCARRY()
{
if (((uint8_t)(m_old_data) & 0x0f) < ((uint8_t)(m_ALU) & 0x0f)) {
- CLR(STATUS, DC_FLAG);
+ CLR(m_STATUS, DC_FLAG);
}
else {
- SET(STATUS, DC_FLAG);
+ SET(m_STATUS, DC_FLAG);
}
}
@@ -359,119 +346,26 @@ void pic16c62x_device::PUSH_STACK(uint16_t data)
-uint8_t pic16c62x_device::GET_REGFILE(offs_t addr) /* Read from internal memory */
+uint8_t pic16c62x_device::GET_REGFILE(uint8_t addr) /* Read from internal memory */
{
- uint8_t data;
-
- if (addr == 0) { /* Indirect addressing */
- addr = (FSR & m_picRAMmask);
+ if ((addr & 0x7f) == 0) { /* Indirect addressing */
+ addr = m_FSR;
}
- switch(addr)
- {
- case 0x00: /* Not an actual register, so return 0 */
- case 0x80:
- data = 0;
- break;
- case 0x02:
- case 0x03:
- case 0x0b:
- case 0x82:
- case 0x83:
- case 0x8b:
- data = M_RDRAM(addr & 0x7f);
- break;
- case 0x84:
- case 0x04: data = (FSR | (uint8_t)(~m_picRAMmask));
- break;
- case 0x05: data = P_IN(0);
- data &= m_TRISA;
- data |= ((uint8_t)(~m_TRISA) & PORTA);
- data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
- break;
- case 0x06: data = P_IN(1);
- data &= m_TRISB;
- data |= ((uint8_t)(~m_TRISB) & PORTB);
- break;
- case 0x8a:
- case 0x0a: data = m_PCLATH;
- break;
- case 0x81: data = m_OPTION;
- break;
- case 0x85: data = m_TRISA;
- break;
- case 0x86: data = m_TRISB;
- break;
- default: data = M_RDRAM(addr);
- break;
- }
- return data;
+ return m_data.read_byte(addr);
}
-void pic16c62x_device::STORE_REGFILE(offs_t addr, uint8_t data) /* Write to internal memory */
+void pic16c62x_device::STORE_REGFILE(uint8_t addr, uint8_t data) /* Write to internal memory */
{
- if (addr == 0) { /* Indirect addressing */
- addr = (FSR & m_picRAMmask);
+ if ((addr & 0x7f) == 0) { /* Indirect addressing */
+ addr = m_FSR;
}
- switch(addr)
- {
- case 0x80:
- case 0x00: /* Not an actual register, nothing to save */
- break;
- case 0x01: m_delay_timer = 2; /* Timer starts after next two instructions */
- if (PSA == 0) m_prescaler = 0; /* Must clear the Prescaler */
- TMR0 = data;
- break;
- case 0x82:
- case 0x02: PCL = data;
- m_PC = (m_PCLATH << 8) | data;
- break;
- case 0x83:
- case 0x03: STATUS &= (uint8_t)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG)); STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
- break;
- case 0x84:
- case 0x04: FSR = (data | (uint8_t)(~m_picRAMmask));
- break;
- case 0x05: data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
- P_OUT(0,data & (uint8_t)(~m_TRISA)); PORTA = data;
- break;
- case 0x06: P_OUT(1,data & (uint8_t)(~m_TRISB)); PORTB = data;
- break;
- case 0x8a:
- case 0x0a:
- m_PCLATH = data & 0x1f;
- M_WRTRAM(0x0a, m_PCLATH);
- break;
- case 0x8b:
- case 0x0b: M_WRTRAM(0x0b, data);
- break;
- case 0x81: m_OPTION = data;
- M_WRTRAM(0x81, data);
- break;
- case 0x85: if (m_TRISA != data)
- {
- m_TRISA = data | 0xf0;
- P_OUT(2,m_TRISA);
- P_OUT(0,PORTA & (uint8_t)(~m_TRISA) & 0x0f);
- M_WRTRAM(addr, data);
- }
- break;
- case 0x86: if (m_TRISB != data)
- {
- m_TRISB = data;
- P_OUT(3,m_TRISB);
- P_OUT(1,PORTB & (uint8_t)(~m_TRISB));
- M_WRTRAM(addr, data);
- }
- break;
- default: M_WRTRAM(addr, data);
- break;
- }
+ m_data.write_byte(addr, data);
}
-void pic16c62x_device::STORE_RESULT(offs_t addr, uint8_t data)
+void pic16c62x_device::STORE_RESULT(uint8_t addr, uint8_t data)
{
if (m_opcode.b.l & 0x80)
{
@@ -484,6 +378,190 @@ void pic16c62x_device::STORE_RESULT(offs_t addr, uint8_t data)
}
+uint8_t pic16c62x_device::tmr0_r()
+{
+ return m_TMR0;
+}
+
+void pic16c62x_device::tmr0_w(uint8_t data)
+{
+ m_delay_timer = 2; /* Timer starts after next two instructions */
+ if (PSA == 0) m_prescaler = 0; /* Must clear the Prescaler */
+ m_TMR0 = data;
+}
+
+uint8_t pic16c62x_device::pcl_r()
+{
+ return m_PC & 0xff;
+}
+
+void pic16c62x_device::pcl_w(uint8_t data)
+{
+ m_PC = (m_PCLATH << 8) | data;
+}
+
+uint8_t pic16c62x_device::status_r()
+{
+ return m_STATUS;
+}
+
+void pic16c62x_device::status_w(uint8_t data)
+{
+ m_STATUS &= (uint8_t)(~(IRP_FLAG|RP1_FLAG|RP0_FLAG));
+ m_STATUS |= (data & (IRP_FLAG|RP1_FLAG|RP0_FLAG));
+}
+
+uint8_t pic16c62x_device::fsr_r()
+{
+ return m_FSR;
+}
+
+void pic16c62x_device::fsr_w(uint8_t data)
+{
+ m_FSR = data;
+}
+
+uint8_t pic16c62x_device::porta_r()
+{
+ uint8_t data = m_read_port[0](0, ~m_port_tris[0]);
+ data &= m_port_tris[0];
+ data |= ((uint8_t)(~m_port_tris[0]) & m_port_data[0]);
+ return data & 0x1f; /* 5-bit port (only lower 5 bits used) */
+}
+
+void pic16c62x_device::porta_w(uint8_t data)
+{
+ data &= 0x1f; /* 5-bit port (only lower 5 bits used) */
+ m_write_port[0](0, data & (~m_port_tris[0]), ~m_port_tris[0]);
+ m_port_data[0] = data;
+}
+
+uint8_t pic16c62x_device::portb_r()
+{
+ uint8_t data = m_read_port[1](0, ~m_port_tris[1]);
+ data &= m_port_tris[1];
+ data |= ((uint8_t)(~m_port_tris[1]) & m_port_data[1]);
+ return data;
+}
+
+void pic16c62x_device::portb_w(uint8_t data)
+{
+ m_write_port[1](0, data & (~m_port_tris[1]), ~m_port_tris[1]);
+ m_port_data[1] = data;
+}
+
+uint8_t pic16c62x_device::pclath_r()
+{
+ return m_PCLATH;
+}
+
+void pic16c62x_device::pclath_w(uint8_t data)
+{
+ m_PCLATH = data & 0x1f;
+}
+
+uint8_t pic16c62x_device::intcon_r()
+{
+ return m_INTCON;
+}
+
+void pic16c62x_device::intcon_w(uint8_t data)
+{
+ m_INTCON = data;
+}
+
+uint8_t pic16c62x_device::option_r()
+{
+ return m_OPTION;
+}
+
+void pic16c62x_device::option_w(uint8_t data)
+{
+ m_OPTION = data;
+}
+
+uint8_t pic16c62x_device::trisa_r()
+{
+ return m_port_tris[0];
+}
+
+void pic16c62x_device::trisa_w(uint8_t data)
+{
+ data &= 0x1f;
+ if (m_port_tris[0] != data)
+ {
+ m_port_tris[0] = data;
+ m_write_port[0](0, m_port_data[0] & (~m_port_tris[0]), ~m_port_tris[0] & 0x1f);
+ }
+}
+
+uint8_t pic16c62x_device::trisb_r()
+{
+ return m_port_tris[1];
+}
+
+void pic16c62x_device::trisb_w(uint8_t data)
+{
+ if (m_port_tris[1] != data)
+ {
+ m_port_tris[1] = data;
+ m_write_port[1](0, m_port_data[1] & (~m_port_tris[1]), ~m_port_tris[1]);
+ }
+}
+
+uint8_t pic16c62x_device::pir1_r()
+{
+ return m_PIR1;
+}
+
+void pic16c62x_device::pir1_w(uint8_t data)
+{
+ // Only CMIF is implemented
+ m_PIR1 = data & 0x40;
+}
+
+uint8_t pic16c62x_device::pie1_r()
+{
+ return m_PIE1;
+}
+
+void pic16c62x_device::pie1_w(uint8_t data)
+{
+ // Only CMIE is implemented
+ m_PIE1 = data & 0x40;
+}
+
+uint8_t pic16c62x_device::pcon_r()
+{
+ return m_PCON;
+}
+
+void pic16c62x_device::pcon_w(uint8_t data)
+{
+ m_PCON = data & 0x03;
+}
+
+uint8_t pic16c62x_device::cmcon_r()
+{
+ // TODO: C1OUT, C2OUT
+ return m_CMCON;
+}
+
+void pic16c62x_device::cmcon_w(uint8_t data)
+{
+ m_CMCON = data & 0x0f;
+}
+
+uint8_t pic16c62x_device::vrcon_r()
+{
+ return m_VRCON;
+}
+
+void pic16c62x_device::vrcon_w(uint8_t data)
+{
+ m_VRCON = data & 0xef;
+}
+
/************************************************************************
* Emulate the Instructions
************************************************************************/
@@ -494,7 +572,7 @@ void pic16c62x_device::STORE_RESULT(offs_t addr, uint8_t data)
void pic16c62x_device::illegal()
{
- logerror("PIC16C62x: PC=%03x, Illegal opcode = %04x\n", (m_PC-1), m_opcode.w.l);
+ logerror("PIC16C62x: PC=%03x, Illegal opcode = %04x\n", (m_PC-1), m_opcode.w);
}
@@ -534,33 +612,31 @@ void pic16c62x_device::andlw()
void pic16c62x_device::bcf()
{
m_ALU = GET_REGFILE(ADDR);
- m_ALU &= bit_clr[POS];
+ m_ALU &= ~(1 << POS);
STORE_REGFILE(ADDR, m_ALU);
}
void pic16c62x_device::bsf()
{
m_ALU = GET_REGFILE(ADDR);
- m_ALU |= bit_set[POS];
+ m_ALU |= 1 << POS;
STORE_REGFILE(ADDR, m_ALU);
}
void pic16c62x_device::btfss()
{
- if ((GET_REGFILE(ADDR) & bit_set[POS]) == bit_set[POS])
+ if ((GET_REGFILE(ADDR) & (1 << POS)) != 0)
{
m_PC++;
- PCL = m_PC & 0xff;
m_inst_cycles += 1; /* Add NOP cycles */
}
}
void pic16c62x_device::btfsc()
{
- if ((GET_REGFILE(ADDR) & bit_set[POS]) == 0)
+ if ((GET_REGFILE(ADDR) & (1 << POS)) == 0)
{
m_PC++;
- PCL = m_PC & 0xff;
m_inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -568,29 +644,28 @@ void pic16c62x_device::btfsc()
void pic16c62x_device::call()
{
PUSH_STACK(m_PC);
- m_PC = ((m_PCLATH & 0x18) << 8) | (m_opcode.w.l & 0x7ff);
+ m_PC = ((m_PCLATH & 0x18) << 8) | (m_opcode.w & 0x7ff);
m_PC &= ADDR_MASK;
- PCL = m_PC & 0xff;
}
void pic16c62x_device::clrw()
{
m_W = 0;
- SET(STATUS, Z_FLAG);
+ SET(m_STATUS, Z_FLAG);
}
void pic16c62x_device::clrf()
{
STORE_REGFILE(ADDR, 0);
- SET(STATUS, Z_FLAG);
+ SET(m_STATUS, Z_FLAG);
}
void pic16c62x_device::clrwdt()
{
m_WDT = 0;
if (PSA) m_prescaler = 0;
- SET(STATUS, TO_FLAG);
- SET(STATUS, PD_FLAG);
+ SET(m_STATUS, TO_FLAG);
+ SET(m_STATUS, PD_FLAG);
}
void pic16c62x_device::comf()
@@ -614,16 +689,14 @@ void pic16c62x_device::decfsz()
if (m_ALU == 0)
{
m_PC++;
- PCL = m_PC & 0xff;
m_inst_cycles += 1; /* Add NOP cycles */
}
}
void pic16c62x_device::goto_op()
{
- m_PC = ((m_PCLATH & 0x18) << 8) | (m_opcode.w.l & 0x7ff);
+ m_PC = ((m_PCLATH & 0x18) << 8) | (m_opcode.w & 0x7ff);
m_PC &= ADDR_MASK;
- PCL = m_PC & 0xff;
}
void pic16c62x_device::incf()
@@ -640,7 +713,6 @@ void pic16c62x_device::incfsz()
if (m_ALU == 0)
{
m_PC++;
- PCL = m_PC & 0xff;
m_inst_cycles += 1; /* Add NOP cycles */
}
}
@@ -690,39 +762,36 @@ void pic16c62x_device::retlw()
{
m_W = m_opcode.b.l;
m_PC = POP_STACK();
- PCL = m_PC & 0xff;
}
void pic16c62x_device::returns()
{
m_PC = POP_STACK();
- PCL = m_PC & 0xff;
}
void pic16c62x_device::retfie()
{
m_PC = POP_STACK();
- PCL = m_PC & 0xff;
//INTCON(7)=1;
}
void pic16c62x_device::rlf()
{
- m_ALU = GET_REGFILE(ADDR);
- m_ALU <<= 1;
- if (STATUS & C_FLAG) m_ALU |= 1;
- if (GET_REGFILE(ADDR) & 0x80) SET(STATUS, C_FLAG);
- else CLR(STATUS, C_FLAG);
+ m_old_data = GET_REGFILE(ADDR);
+ m_ALU = m_old_data << 1;
+ if (m_STATUS & C_FLAG) m_ALU |= 1;
+ if (m_old_data & 0x80) SET(m_STATUS, C_FLAG);
+ else CLR(m_STATUS, C_FLAG);
STORE_RESULT(ADDR, m_ALU);
}
void pic16c62x_device::rrf()
{
- m_ALU = GET_REGFILE(ADDR);
- m_ALU >>= 1;
- if (STATUS & C_FLAG) m_ALU |= 0x80;
- if (GET_REGFILE(ADDR) & 1) SET(STATUS, C_FLAG);
- else CLR(STATUS, C_FLAG);
+ m_old_data = GET_REGFILE(ADDR);
+ m_ALU = m_old_data >> 1;
+ if (m_STATUS & C_FLAG) m_ALU |= 0x80;
+ if (m_old_data & 1) SET(m_STATUS, C_FLAG);
+ else CLR(m_STATUS, C_FLAG);
STORE_RESULT(ADDR, m_ALU);
}
@@ -730,8 +799,8 @@ void pic16c62x_device::sleepic()
{
if (WDTE) m_WDT = 0;
if (PSA) m_prescaler = 0;
- SET(STATUS, TO_FLAG);
- CLR(STATUS, PD_FLAG);
+ SET(m_STATUS, TO_FLAG);
+ CLR(m_STATUS, PD_FLAG);
}
void pic16c62x_device::subwf()
@@ -746,7 +815,8 @@ void pic16c62x_device::subwf()
void pic16c62x_device::sublw()
{
- m_ALU = (m_opcode.b.l & 0xff) - m_W;
+ m_old_data = m_opcode.b.l;
+ m_ALU = m_old_data - m_W;
m_W = m_ALU;
CALCULATE_Z_FLAG();
CALCULATE_SUB_CARRY();
@@ -755,8 +825,8 @@ void pic16c62x_device::sublw()
void pic16c62x_device::swapf()
{
- m_ALU = ((GET_REGFILE(ADDR) << 4) & 0xf0);
- m_ALU |= ((GET_REGFILE(ADDR) >> 4) & 0x0f);
+ m_ALU = GET_REGFILE(ADDR);
+ m_ALU = (m_ALU << 4) | (m_ALU >> 4);
STORE_RESULT(ADDR, m_ALU);
}
@@ -764,8 +834,8 @@ void pic16c62x_device::tris()
{
switch(m_opcode.b.l & 0x7)
{
- case 5: STORE_REGFILE(0x85, m_W); break;
- case 6: STORE_REGFILE(0x86, m_W); break;
+ case 5: m_data.write_byte(0x85, m_W); break;
+ case 6: m_data.write_byte(0x86, m_W); break;
default: illegal(); break;
}
}
@@ -791,43 +861,43 @@ void pic16c62x_device::xorwf()
const pic16c62x_device::pic16c62x_instruction pic16c62x_device::s_instructiontable[]=
{
- {(char *)"000111dfffffff", &pic16c62x_device::addwf, 1},
- {(char *)"000101dfffffff", &pic16c62x_device::andwf, 1},
- {(char *)"0000011fffffff", &pic16c62x_device::clrf, 1},
- {(char *)"00000100000011", &pic16c62x_device::clrw, 1},
- {(char *)"001001dfffffff", &pic16c62x_device::comf, 1},
- {(char *)"000011dfffffff", &pic16c62x_device::decf, 1},
- {(char *)"001011dfffffff", &pic16c62x_device::decfsz, 1},
- {(char *)"001010dfffffff", &pic16c62x_device::incf, 1},
- {(char *)"001111dfffffff", &pic16c62x_device::incfsz, 1},
- {(char *)"000100dfffffff", &pic16c62x_device::iorwf, 1},
- {(char *)"001000dfffffff", &pic16c62x_device::movf, 1},
- {(char *)"0000001fffffff", &pic16c62x_device::movwf, 1},
- {(char *)"0000000xx00000", &pic16c62x_device::nop, 1},
- {(char *)"001101dfffffff", &pic16c62x_device::rlf, 1},
- {(char *)"001100dfffffff", &pic16c62x_device::rrf, 1},
- {(char *)"000010dfffffff", &pic16c62x_device::subwf, 1},
- {(char *)"001110dfffffff", &pic16c62x_device::swapf, 1},
- {(char *)"000110dfffffff", &pic16c62x_device::xorwf, 1},
- {(char *)"0100bbbfffffff", &pic16c62x_device::bcf, 1},
- {(char *)"0101bbbfffffff", &pic16c62x_device::bsf, 1},
- {(char *)"0110bbbfffffff", &pic16c62x_device::btfsc, 1},
- {(char *)"0111bbbfffffff", &pic16c62x_device::btfss, 1},
- {(char *)"11111xkkkkkkkk", &pic16c62x_device::addlw, 1},
- {(char *)"111001kkkkkkkk", &pic16c62x_device::andlw, 1},
- {(char *)"100aaaaaaaaaaa", &pic16c62x_device::call, 2},
- {(char *)"101aaaaaaaaaaa", &pic16c62x_device::goto_op, 2},
- {(char *)"111000kkkkkkkk", &pic16c62x_device::iorlw, 1},
- {(char *)"1100xxkkkkkkkk", &pic16c62x_device::movlw, 1},
- {(char *)"00000000001001", &pic16c62x_device::retfie, 2},
- {(char *)"1101xxkkkkkkkk", &pic16c62x_device::retlw, 2},
- {(char *)"00000000001000", &pic16c62x_device::returns, 2},
- {(char *)"00000001100011", &pic16c62x_device::sleepic, 1},
- {(char *)"11110xkkkkkkkk", &pic16c62x_device::sublw, 1},
- {(char *)"111010kkkkkkkk", &pic16c62x_device::xorlw, 1},
- {(char *)"00000001100100", &pic16c62x_device::clrwdt, 1},
- {(char *)"00000001100010", &pic16c62x_device::option, 1}, // deprecated
- {(char *)"00000001100fff", &pic16c62x_device::tris, 1}, // deprecated
+ {"000111dfffffff", &pic16c62x_device::addwf, 1},
+ {"000101dfffffff", &pic16c62x_device::andwf, 1},
+ {"0000011fffffff", &pic16c62x_device::clrf, 1},
+ {"00000100000011", &pic16c62x_device::clrw, 1},
+ {"001001dfffffff", &pic16c62x_device::comf, 1},
+ {"000011dfffffff", &pic16c62x_device::decf, 1},
+ {"001011dfffffff", &pic16c62x_device::decfsz, 1},
+ {"001010dfffffff", &pic16c62x_device::incf, 1},
+ {"001111dfffffff", &pic16c62x_device::incfsz, 1},
+ {"000100dfffffff", &pic16c62x_device::iorwf, 1},
+ {"001000dfffffff", &pic16c62x_device::movf, 1},
+ {"0000001fffffff", &pic16c62x_device::movwf, 1},
+ {"0000000xx00000", &pic16c62x_device::nop, 1},
+ {"001101dfffffff", &pic16c62x_device::rlf, 1},
+ {"001100dfffffff", &pic16c62x_device::rrf, 1},
+ {"000010dfffffff", &pic16c62x_device::subwf, 1},
+ {"001110dfffffff", &pic16c62x_device::swapf, 1},
+ {"000110dfffffff", &pic16c62x_device::xorwf, 1},
+ {"0100bbbfffffff", &pic16c62x_device::bcf, 1},
+ {"0101bbbfffffff", &pic16c62x_device::bsf, 1},
+ {"0110bbbfffffff", &pic16c62x_device::btfsc, 1},
+ {"0111bbbfffffff", &pic16c62x_device::btfss, 1},
+ {"11111xkkkkkkkk", &pic16c62x_device::addlw, 1},
+ {"111001kkkkkkkk", &pic16c62x_device::andlw, 1},
+ {"100aaaaaaaaaaa", &pic16c62x_device::call, 2},
+ {"101aaaaaaaaaaa", &pic16c62x_device::goto_op, 2},
+ {"111000kkkkkkkk", &pic16c62x_device::iorlw, 1},
+ {"1100xxkkkkkkkk", &pic16c62x_device::movlw, 1},
+ {"00000000001001", &pic16c62x_device::retfie, 2},
+ {"1101xxkkkkkkkk", &pic16c62x_device::retlw, 2},
+ {"00000000001000", &pic16c62x_device::returns, 2},
+ {"00000001100011", &pic16c62x_device::sleepic, 1},
+ {"11110xkkkkkkkk", &pic16c62x_device::sublw, 1},
+ {"111010kkkkkkkk", &pic16c62x_device::xorlw, 1},
+ {"00000001100100", &pic16c62x_device::clrwdt, 1},
+ {"00000001100010", &pic16c62x_device::option, 1}, // deprecated
+ {"00000001100fff", &pic16c62x_device::tris, 1}, // deprecated
{nullptr, nullptr, 0}
};
@@ -887,33 +957,48 @@ void pic16c62x_device::build_opcode_table(void)
void pic16c62x_device::device_start()
{
space(AS_PROGRAM).cache(m_cache);
- space(AS_PROGRAM).specific(m_program);
space(AS_DATA).specific(m_data);
- space(AS_IO).specific(m_io);
-
- /* ensure the internal ram pointers are set before get_info is called */
- update_internalram_ptr();
build_opcode_table();
+ // Set largely arbitrary initial values for special registers
+ m_W = 0;
+ m_ALU = 0;
+ m_WDT = 0;
+ m_TMR0 = 0;
+ m_STATUS = 0x18;
+ m_FSR = 0;
+ m_port_data[0] = 0;
+ m_port_data[1] = 0;
+ m_PCON = 0;
+ m_INTCON = 0;
+ std::fill(std::begin(m_STACK), std::end(m_STACK), 0);
+
save_item(NAME(m_W));
save_item(NAME(m_ALU));
save_item(NAME(m_OPTION));
save_item(NAME(m_PCLATH));
- save_item(NAME(m_TRISA));
- save_item(NAME(m_TRISB));
+ save_item(NAME(m_TMR0));
+ save_item(NAME(m_STATUS));
+ save_item(NAME(m_FSR));
+ save_item(NAME(m_port_data));
+ save_item(NAME(m_port_tris));
+ save_item(NAME(m_INTCON));
+ save_item(NAME(m_PIR1));
+ save_item(NAME(m_PIE1));
+ save_item(NAME(m_PCON));
+ save_item(NAME(m_CMCON));
+ save_item(NAME(m_VRCON));
save_item(NAME(m_old_T0));
save_item(NAME(m_old_data));
- save_item(NAME(m_picRAMmask));
save_item(NAME(m_WDT));
save_item(NAME(m_prescaler));
save_item(NAME(m_STACK));
save_item(NAME(m_PC));
save_item(NAME(m_PREVPC));
save_item(NAME(m_CONFIG));
- save_item(NAME(m_opcode.d));
+ save_item(NAME(m_opcode.w));
save_item(NAME(m_delay_timer));
- save_item(NAME(m_picmodel));
save_item(NAME(m_reset_vector));
save_item(NAME(m_temp_config));
@@ -936,10 +1021,11 @@ void pic16c62x_device::device_start()
state_add( PIC16C62x_STK7, "STK7", m_STACK[7]).mask(0xfff).formatstr("%03X");
state_add( PIC16C62x_PRTA, "PRTA", m_debugger_temp).mask(0x1f).callimport().callexport().formatstr("%02X");
state_add( PIC16C62x_PRTB, "PRTB", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
- state_add( PIC16C62x_TRSA, "TRSA", m_TRISA).mask(0x1f).formatstr("%02X");
- state_add( PIC16C62x_TRSB, "TRSB", m_TRISB).formatstr("%02X");
+ state_add( PIC16C62x_TRSA, "TRSA", m_port_tris[0]).mask(0x1f).formatstr("%02X");
+ state_add( PIC16C62x_TRSB, "TRSB", m_port_tris[1]).formatstr("%02X");
state_add( PIC16C62x_FSR, "FSR", m_debugger_temp).mask(0xff).callimport().callexport().formatstr("%02X");
state_add( PIC16C62x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s");
+ state_add( PIC16C62x_PCLATH, "PCLATH", m_PCLATH).mask(0x1f);
state_add( STATE_GENPC, "GENPC", m_PC).noshow();
state_add( STATE_GENPCBASE, "CURPC", m_PREVPC).noshow();
@@ -953,19 +1039,19 @@ void pic16c62x_device::state_import(const device_state_entry &entry)
switch (entry.index())
{
case PIC16C62x_STR:
- STATUS = m_debugger_temp;
+ m_STATUS = m_debugger_temp;
break;
case PIC16C62x_TMR0:
- TMR0 = m_debugger_temp;
+ m_TMR0 = m_debugger_temp;
break;
case PIC16C62x_PRTA:
- PORTA = m_debugger_temp;
+ m_port_data[0] = m_debugger_temp;
break;
case PIC16C62x_PRTB:
- PORTB = m_debugger_temp;
+ m_port_data[1] = m_debugger_temp;
break;
case PIC16C62x_FSR:
- FSR = ((m_debugger_temp & m_picRAMmask) | (uint8_t)(~m_picRAMmask));
+ m_FSR = m_debugger_temp;
break;
case PIC16C62x_PSCL:
m_prescaler = m_debugger_temp;
@@ -978,19 +1064,19 @@ void pic16c62x_device::state_export(const device_state_entry &entry)
switch (entry.index())
{
case PIC16C62x_STR:
- m_debugger_temp = STATUS;
+ m_debugger_temp = m_STATUS;
break;
case PIC16C62x_TMR0:
- m_debugger_temp = TMR0;
+ m_debugger_temp = m_TMR0;
break;
case PIC16C62x_PRTA:
- m_debugger_temp = PORTA & 0x1f;
+ m_debugger_temp = m_port_data[0] & 0x1f;
break;
case PIC16C62x_PRTB:
- m_debugger_temp = PORTB;
+ m_debugger_temp = m_port_data[1];
break;
case PIC16C62x_FSR:
- m_debugger_temp = ((FSR) & m_picRAMmask) | (uint8_t)(~m_picRAMmask);
+ m_debugger_temp = m_FSR;
break;
}
}
@@ -1005,12 +1091,12 @@ void pic16c62x_device::state_string_export(const device_state_entry &entry, std:
case STATE_GENFLAGS:
str = string_format("%01x%c%c%c%c%c %c%c%c%03x",
- (STATUS & 0xe0) >> 5,
- STATUS & 0x10 ? '.':'O', /* WDT Overflow */
- STATUS & 0x08 ? 'P':'D', /* Power/Down */
- STATUS & 0x04 ? 'Z':'.', /* Zero */
- STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
- STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
+ (m_STATUS & 0xe0) >> 5,
+ m_STATUS & 0x10 ? '.':'O', /* WDT Overflow */
+ m_STATUS & 0x08 ? 'P':'D', /* Power/Down */
+ m_STATUS & 0x04 ? 'Z':'.', /* Zero */
+ m_STATUS & 0x02 ? 'c':'b', /* Nibble Carry/Borrow */
+ m_STATUS & 0x01 ? 'C':'B', /* Carry/Borrow */
m_OPTION & 0x20 ? 'C':'T', /* Counter/Timer */
m_OPTION & 0x10 ? 'N':'P', /* Negative/Positive */
@@ -1027,25 +1113,26 @@ void pic16c62x_device::state_string_export(const device_state_entry &entry, std:
void pic16c62x_device::pic16c62x_reset_regs()
{
m_PC = m_reset_vector;
- m_TRISA = 0x1f;
- m_TRISB = 0xff;
+ m_port_tris[0] = 0x1f;
+ m_port_tris[1] = 0xff;
m_OPTION = 0xff;
- STATUS = 0x18;
- PCL = 0;
- FSR |= (uint8_t)(~m_picRAMmask);
- PORTA = 0;
+ m_STATUS &= 0x1f;
+ m_port_data[0] &= 0x10;
m_prescaler = 0;
m_delay_timer = 0;
m_old_T0 = 0;
m_inst_cycles = 0;
- PIC16C62x_RAM_WRMEM(0x85,m_TRISA);
- PIC16C62x_RAM_WRMEM(0x86,m_TRISB);
- PIC16C62x_RAM_WRMEM(0x81,m_OPTION);
+ m_PCLATH = 0;
+ m_INTCON &= 0x01;
+ m_PIR1 = 0;
+ m_PIE1 = 0;
+ m_CMCON = 0;
+ m_VRCON = 0;
}
void pic16c62x_device::pic16c62x_soft_reset()
{
- SET(STATUS, (TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG));
+ SET(m_STATUS, (TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG));
pic16c62x_reset_regs();
}
@@ -1070,7 +1157,7 @@ void pic16c62x_device::pic16c62x_update_watchdog(int counts)
/* If the current instruction is CLRWDT or SLEEP, don't update the WDT */
- if ((m_opcode.w.l != 0x64) && (m_opcode.w.l != 0x63))
+ if ((m_opcode.w != 0x64) && (m_opcode.w != 0x63))
{
uint16_t old_WDT = m_WDT;
@@ -1086,12 +1173,12 @@ void pic16c62x_device::pic16c62x_update_watchdog(int counts)
m_prescaler++;
if (m_prescaler >= (1 << PS)) { /* Prescale values from 1 to 128 */
m_prescaler = 0;
- CLR(STATUS, TO_FLAG);
+ CLR(m_STATUS, TO_FLAG);
pic16c62x_soft_reset();
}
}
else {
- CLR(STATUS, TO_FLAG);
+ CLR(m_STATUS, TO_FLAG);
pic16c62x_soft_reset();
}
}
@@ -1108,12 +1195,12 @@ void pic16c62x_device::pic16c62x_update_timer(int counts)
if (PSA == 0) {
m_prescaler += counts;
if (m_prescaler >= (2 << PS)) { /* Prescale values from 2 to 256 */
- TMR0 += (m_prescaler / (2 << PS));
+ m_TMR0 += (m_prescaler / (2 << PS));
m_prescaler %= (2 << PS); /* Overflow prescaler */
}
}
else {
- TMR0 += counts;
+ m_TMR0 += counts;
}
}
@@ -1126,8 +1213,6 @@ void pic16c62x_device::execute_run()
{
uint8_t T0_in;
- update_internalram_ptr();
-
do
{
if (PD == 0) /* Sleep Mode */
@@ -1144,12 +1229,11 @@ void pic16c62x_device::execute_run()
debugger_instruction_hook(m_PC);
- m_opcode.d = M_RDOP(m_PC);
+ m_opcode.w = M_RDOP(m_PC);
m_PC++;
- PCL++;
- m_inst_cycles = m_opcode_table[m_opcode.w.l & 0x3fff].cycles;
- (this->*m_opcode_table[m_opcode.w.l & 0x3fff].function)();
+ m_inst_cycles = m_opcode_table[m_opcode.w & 0x3fff].cycles;
+ (this->*m_opcode_table[m_opcode.w & 0x3fff].function)();
if (T0CS) { /* Count mode */
T0_in = S_T0_IN;
@@ -1187,8 +1271,6 @@ void pic16c62x_device::execute_run()
void pic16c62x_device::device_reset()
{
- update_internalram_ptr();
-
pic16c62x_reset_regs();
- SET(STATUS, (TO_FLAG | PD_FLAG));
+ SET(m_STATUS, (TO_FLAG | PD_FLAG));
}
diff --git a/src/devices/cpu/pic16c62x/pic16c62x.h b/src/devices/cpu/pic16c62x/pic16c62x.h
index d08eeed60c0..6a708d69dff 100644
--- a/src/devices/cpu/pic16c62x/pic16c62x.h
+++ b/src/devices/cpu/pic16c62x/pic16c62x.h
@@ -36,7 +36,7 @@ enum
PIC16C62x_STK7, PIC16C62x_FSR, PIC16C62x_W, PIC16C62x_ALU,
PIC16C62x_STR, PIC16C62x_OPT, PIC16C62x_TMR0, PIC16C62x_PRTA,
PIC16C62x_PRTB, PIC16C62x_WDT, PIC16C62x_TRSA, PIC16C62x_TRSB,
- PIC16C62x_PSCL
+ PIC16C62x_PSCL, PIC16C62x_PCLATH
};
#define PIC16C62x_T0 0
@@ -54,22 +54,27 @@ DECLARE_DEVICE_TYPE(PIC16C622A, pic16c622a_device)
class pic16c62x_device : public cpu_device
{
public:
+ auto read_a() { return m_read_port[0].bind(); }
+ auto write_a() { return m_write_port[0].bind(); }
+
+ auto read_b() { return m_read_port[1].bind(); }
+ auto write_b() { return m_write_port[1].bind(); }
+
void set_config(int data);
protected:
// construction/destruction
- pic16c62x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, int picmodel);
+ pic16c62x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int program_width, address_map_constructor ram_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 2; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -86,7 +91,6 @@ protected:
private:
address_space_config m_program_config;
address_space_config m_data_config;
- address_space_config m_io_config;
/******************** CPU Internal Registers *******************/
uint16_t m_PC;
@@ -97,27 +101,34 @@ private:
uint16_t m_CONFIG;
uint8_t m_ALU;
uint16_t m_WDT;
- uint8_t m_TRISA; /* 85 */
- uint8_t m_TRISB; /* 86 */
+ uint8_t m_TMR0;
+ uint8_t m_STATUS;
+ uint8_t m_FSR;
+ uint8_t m_port_data[2];
+ uint8_t m_port_tris[2];
+ uint8_t m_INTCON;
+ uint8_t m_PIR1;
+ uint8_t m_PIE1;
+ uint8_t m_PCON;
+ uint8_t m_CMCON;
+ uint8_t m_VRCON;
uint16_t m_STACK[8];
uint16_t m_prescaler; /* Note: this is really an 8-bit register */
- PAIR m_opcode;
- uint8_t *m_internalram;
+ PAIR16 m_opcode;
int m_icount;
int m_reset_vector;
- int m_picmodel;
int m_delay_timer;
uint16_t m_temp_config;
uint8_t m_old_T0;
int8_t m_old_data;
- uint8_t m_picRAMmask;
int m_inst_cycles;
memory_access<11, 1, -1, ENDIANNESS_LITTLE>::cache m_cache;
- memory_access<11, 1, -1, ENDIANNESS_LITTLE>::specific m_program;
memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
- memory_access< 5, 0, 0, ENDIANNESS_LITTLE>::specific m_io;
+
+ devcb_read8::array<2> m_read_port;
+ devcb_write8::array<2> m_write_port;
// For debugger
int m_debugger_temp;
@@ -134,13 +145,12 @@ private:
/* instruction list entry */
struct pic16c62x_instruction
{
- char *format;
+ const char *format;
pic16c62x_ophandler function;
uint8_t cycles;
};
static const pic16c62x_instruction s_instructiontable[];
- void update_internalram_ptr();
void CALCULATE_Z_FLAG();
void CALCULATE_ADD_CARRY();
void CALCULATE_ADD_DIGITCARRY();
@@ -148,9 +158,43 @@ private:
void CALCULATE_SUB_DIGITCARRY();
uint16_t POP_STACK();
void PUSH_STACK(uint16_t data);
- uint8_t GET_REGFILE(offs_t addr);
- void STORE_REGFILE(offs_t addr, uint8_t data);
- void STORE_RESULT(offs_t addr, uint8_t data);
+ uint8_t GET_REGFILE(uint8_t addr);
+ void STORE_REGFILE(uint8_t addr, uint8_t data);
+ void STORE_RESULT(uint8_t addr, uint8_t data);
+
+ uint8_t tmr0_r();
+ void tmr0_w(uint8_t data);
+ uint8_t pcl_r();
+ void pcl_w(uint8_t data);
+ uint8_t status_r();
+ void status_w(uint8_t data);
+ uint8_t fsr_r();
+ void fsr_w(uint8_t data);
+ uint8_t porta_r();
+ void porta_w(uint8_t data);
+ uint8_t portb_r();
+ void portb_w(uint8_t data);
+ uint8_t pclath_r();
+ void pclath_w(uint8_t data);
+ uint8_t intcon_r();
+ void intcon_w(uint8_t data);
+ uint8_t option_r();
+ void option_w(uint8_t data);
+ uint8_t trisa_r();
+ void trisa_w(uint8_t data);
+ uint8_t trisb_r();
+ void trisb_w(uint8_t data);
+ uint8_t pir1_r();
+ void pir1_w(uint8_t data);
+ uint8_t pie1_r();
+ void pie1_w(uint8_t data);
+ uint8_t pcon_r();
+ void pcon_w(uint8_t data);
+ uint8_t cmcon_r();
+ void cmcon_w(uint8_t data);
+ uint8_t vrcon_r();
+ void vrcon_w(uint8_t data);
+
void illegal();
void addwf();
void addlw();
@@ -195,12 +239,15 @@ private:
void pic16c62x_update_watchdog(int counts);
void pic16c62x_update_timer(int counts);
- void pic16c620_ram(address_map &map);
- void pic16c622_ram(address_map &map);
- void pic16c62x_rom_10(address_map &map);
- void pic16c62x_rom_11(address_map &map);
- void pic16c62x_rom_9(address_map &map);
- void pic16c62xa_ram(address_map &map);
+protected:
+ void core_regs(address_map &map) ATTR_COLD;
+ void pic16c620_ram(address_map &map) ATTR_COLD;
+ void pic16c622_ram(address_map &map) ATTR_COLD;
+ void pic16c62x_rom_10(address_map &map) ATTR_COLD;
+ void pic16c62x_rom_11(address_map &map) ATTR_COLD;
+ void pic16c62x_rom_9(address_map &map) ATTR_COLD;
+ void pic16c620a_ram(address_map &map) ATTR_COLD;
+ void pic16c622a_ram(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/pic16x8x/16x8xdsm.cpp b/src/devices/cpu/pic16x8x/16x8xdsm.cpp
new file mode 100644
index 00000000000..54e335ffc60
--- /dev/null
+++ b/src/devices/cpu/pic16x8x/16x8xdsm.cpp
@@ -0,0 +1,258 @@
+// license:BSD-3-Clause
+// copyright-holders:Tony La Porta, Grull Osgo
+/************************************************************************
+
+ Microchip PIC16X8x Emulator
+
+ Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
+
+A Address to jump to.
+B Bit address within an 8-bit file register.
+D Destination select (0 = store result in W (accumulator))
+ (1 = store result in file register)
+F Register file address.
+K Literal field, constant data.
+
+Includes Flags ID's on SFR registers where possible.
+
+************************************************************************/
+
+#include "emu.h"
+#include "16x8xdsm.h"
+
+#include <cctype>
+#include <stdexcept>
+
+const u8 pic16x8x_disassembler::sfr_bank0[16] = { 0, 0, 0, 1, 0, 2, 3, 0, 0, 0, 0, 4, 0, 0, 0, 0};
+
+const char *const pic16x8x_disassembler::sfregs[12] =
+{
+ "INDF", "TMR0", "PCL", "STATUS", "FSR", "PORTA", "PORTB", "Reg$07", "EEDATA", "EEADDR", "PCLATH", "INTCON"
+};
+
+const char *const pic16x8x_disassembler::dest[2] = { "W", "Reg" };
+
+const char *const pic16x8x_disassembler::reg_flags[9][8] =
+{
+ {"0", "1", "2", "3", "4", "5", "6", "7"}, // no flags
+ {"C", "DC", "Z", "PD", "TO", "RP0", "RP1", "IRP"}, // status
+ {"RA0", "RA1", "RA2", "RA3", "RA4/T0CKI", "5", "6", "7"}, // portA
+ {"RB0/INT", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // portB
+ {"RBIF", "INTF", "T0IF", "RBIE", "INTE", "T0IE", "EEIE", "GIE"}, // intcon
+ {"PS0", "PS1", "PS2", "PSA", "T0SE", "T0CS", "INTEDG", "RBPU"}, // option
+ {"RA0", "RA1", "RA2", "RA3", "RA4", "5", "6", "7"}, // trisa
+ {"RB0", "RB1", "RB2", "RB3", "RB4", "RB5", "RB6", "RB7"}, // trisb
+ {"RD", "WR", "WREN", "WRERR", "EEIF", "5", "6", "7"} // eecon
+};
+
+const char *const pic16x8x_disassembler::PIC16X8xFormats[] =
+{
+ "00000000000000", "nop",
+ "00000000001000", "return",
+ "00000000001001", "retfie",
+ "00000000100000", "nop",
+ "00000001000000", "nop",
+ "00000001100000", "nop",
+ "00000001100011", "sleep",
+ "00000001100100", "clrwdt",
+ "0000001fffffff", "movwf %F",
+ "00000100000000", "clrw",
+ "0000011fffffff", "clrf %F",
+ "000010dfffffff", "subwf %F,%D",
+ "000011dfffffff", "decf %F,%D",
+ "000100dfffffff", "iorwf %F,%D",
+ "000101dfffffff", "andwf %F,%D",
+ "000110dfffffff", "xorwf %F,%D",
+ "000111dfffffff", "addwf %F,%D",
+ "001000dfffffff", "movf %F,%D",
+ "001001dfffffff", "comf %F,%D",
+ "001010dfffffff", "incf %F,%D",
+ "001011dfffffff", "decfsz %F,%D",
+ "001100dfffffff", "rrf %F,%D",
+ "001101dfffffff", "rlf %F,%D",
+ "001110dfffffff", "swapf %F,%D",
+ "001111dfffffff", "incfsz %F,%D",
+ "0100bbbfffffff", "bcf %F,%B",
+ "0101bbbfffffff", "bsf %F,%B",
+ "0110bbbfffffff", "btfsc %F,%B",
+ "0111bbbfffffff", "btfss %F,%B",
+ "110100kkkkkkkk", "retlw %K",
+ "110101kkkkkkkk", "retlw %K",
+ "110110kkkkkkkk", "retlw %K",
+ "110111kkkkkkkk", "retlw %K",
+ "100aaaaaaaaaaa", "call %A",
+ "101aaaaaaaaaaa", "goto %A",
+ "110000kkkkkkkk", "movlw %K",
+ "110001kkkkkkkk", "movlw %K",
+ "110010kkkkkkkk", "movlw %K",
+ "110011kkkkkkkk", "movlw %K",
+ "111000kkkkkkkk", "iorlw %K",
+ "111001kkkkkkkk", "andlw %K",
+ "111010kkkkkkkk", "xorlw %K",
+ "111100kkkkkkkk", "sublw %K",
+ "111101kkkkkkkk", "sublw %K",
+ "111110kkkkkkkk", "addlw %K",
+ "111111kkkkkkkk", "addlw %K",
+ nullptr
+};
+
+pic16x8x_disassembler::pic16x8x_disassembler()
+{
+ const char *p;
+ const char *const *ops;
+ u16 mask, bits;
+ int bit;
+
+ ops = PIC16X8xFormats;
+ while (*ops)
+ {
+ p = *ops;
+ mask = 0; bits = 0; bit = 13;
+ while (*p && bit >= 0)
+ {
+ switch (*p++)
+ {
+ case '1': mask |= 1<<bit; bits |= 1<<bit; bit--; break;
+ case '0': mask |= 1<<bit; bit--; break;
+ case ' ': break;
+ case 'a':
+ case 'b':
+ case 'd':
+ case 'f':
+ case 'k':
+ bit--;
+ break;
+ default:
+ throw std::logic_error(util::string_format("Invalid instruction encoding '%s %s'\n", ops[0],ops[1]));
+ }
+ }
+ if (bit != -1)
+ {
+ throw std::logic_error(util::string_format("not enough bits in encoding '%s %s' %d\n", ops[0],ops[1],bit));
+ }
+ while (isspace((u8)*p)) p++;
+ Op.emplace_back(mask, bits, *p, ops[0], ops[1]);
+
+ ops += 2;
+ }
+}
+
+offs_t pic16x8x_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+ int a, b, d, f, k; // these can all be filled in by parsing an instruction
+ int i;
+ int op;
+ int cnt = 1;
+ int code;
+ int bit;
+ const char *cp; // character pointer in OpFormats
+ u32 flags = 0;
+ bool bit_option = false;
+
+ op = -1; // no matching opcode
+ code = opcodes.r16(pc);
+ for (i = 0; i < int(Op.size()); i++)
+ {
+ if ((code & Op[i].mask) == Op[i].bits)
+ {
+ if (op != -1)
+ {
+ osd_printf_debug("Error: opcode %04Xh matches %d (%s) and %d (%s)\n",
+ code,i,Op[i].fmt,op,Op[op].fmt);
+ }
+ op = i;
+ }
+ }
+
+ if (op == -1)
+ {
+ util::stream_format(stream, "???? dw %04Xh",code);
+ return cnt | SUPPORTED;
+ }
+
+ // shift out operands
+ cp = Op[op].parse;
+ a = b = d = f = k = 0;
+ bit = 13;
+
+ while (bit >= 0)
+ {
+ osd_printf_debug("{%c/%d}",*cp,bit);
+ switch (*cp)
+ {
+ case 'a': a <<=1; a |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
+ case 'b': b <<=1; b |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
+ case 'd': d <<=1; d |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
+ case 'f': f <<=1; f |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
+ case 'k': k <<=1; k |= ((code & (1<<bit)) ? 1 : 0); bit--; break;
+ case ' ': break;
+ case '1': case '0': bit--; break;
+ case '\0': throw std::logic_error(util::string_format("premature end of parse string, opcode %x, bit = %d\n",code,bit));
+ }
+ cp++;
+ }
+
+
+ // now traverse format string
+ cp = Op[op].fmt;
+ if (!strncmp(cp, "call", 4))
+ flags = STEP_OVER;
+ else if (!strncmp(cp, "ret", 3))
+ flags = STEP_OUT;
+ else if (!strncmp(cp, "btfs", 4) || !strncmp(cp + 2, "cfsz", 4))
+ flags = STEP_COND;
+
+ // bit oriented instructions
+ switch (f)
+ {
+ case 0x03:
+ case 0x05:
+ case 0x06:
+ case 0x0b:
+ case 0x81:
+ case 0x85:
+ case 0x86:
+ bit_option = true;
+ break;
+ default:
+ bit_option = false;
+ break;
+ }
+
+
+ while (*cp)
+ {
+ if (*cp == '%')
+ {
+ cp++;
+ switch (*cp++)
+ {
+ case 'A': util::stream_format(stream, "$%03X", a); break;
+ case 'D': util::stream_format(stream, "%s", dest[d]); break;
+ case 'F': (f < 0xc) ? util::stream_format(stream, "%s", sfregs[f]) : util::stream_format(stream, "byte_DATA_$%02X", f); break;
+ case 'B':
+ {
+ if (bit_option)
+ util::stream_format(stream, "%s", reg_flags[sfr_bank0[f & 0x0f]][b]);
+ else
+ util::stream_format(stream, "%d", b);
+ }
+ break;
+ case 'K': util::stream_format(stream, "%02xh", k); break;
+ default:
+ throw std::logic_error(util::string_format("illegal escape character in format '%s'\n",Op[op].fmt));
+ }
+ }
+ else
+ {
+ stream << *cp++;
+ }
+ }
+
+ return cnt | flags | SUPPORTED;
+}
+
+u32 pic16x8x_disassembler::opcode_alignment() const
+{
+ return 1;
+}
diff --git a/src/devices/cpu/pic16x8x/16x8xdsm.h b/src/devices/cpu/pic16x8x/16x8xdsm.h
new file mode 100644
index 00000000000..9684a80c19f
--- /dev/null
+++ b/src/devices/cpu/pic16x8x/16x8xdsm.h
@@ -0,0 +1,46 @@
+// license:BSD-3-Clause
+// copyright-holders:Tony La Porta, Grull Osgo
+/*
+
+ Microchip PIC16X8x Emulator
+
+ Based on MAME's PIC16C5x cpu_device dissasm developed by Tony La Porta.
+
+
+*/
+
+#ifndef MAME_CPU_PIC16X8X_16X8XDSM_H
+#define MAME_CPU_PIC16X8X_16X8XDSM_H
+
+#pragma once
+
+class pic16x8x_disassembler : public util::disasm_interface
+{
+public:
+ pic16x8x_disassembler();
+ virtual ~pic16x8x_disassembler() = default;
+
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ struct PIC16X8xOpcode {
+ u16 mask; // instruction mask
+ u16 bits; // constant bits
+ u16 extcode; // value that gets extension code
+ const char *parse; // how to parse bits
+ const char *fmt; // instruction format
+
+ PIC16X8xOpcode(u16 m, u16 b, u16 e, const char *p, const char *f) : mask(m), bits(b), extcode(e), parse(p), fmt(f) {}
+ };
+
+ static const u8 sfr_bank0[16];
+ static const char *const sfregs[12];
+ static const char *const dest[2];
+ static const char *const reg_flags[9][8];
+ static const char *const PIC16X8xFormats[];
+
+ std::vector<PIC16X8xOpcode> Op;
+};
+
+#endif
diff --git a/src/devices/cpu/pic16x8x/pic16x8x.cpp b/src/devices/cpu/pic16x8x/pic16x8x.cpp
new file mode 100644
index 00000000000..4cf256763aa
--- /dev/null
+++ b/src/devices/cpu/pic16x8x/pic16x8x.cpp
@@ -0,0 +1,1413 @@
+// license:BSD-3-Clause
+// copyright-holders:Tony La Porta, Grull Osgo
+/****************************************************************************************
+
+ Microchip PIC16x8x Emulator
+
+ https://ww1.microchip.com/downloads/en/DeviceDoc/30445D.pdf
+
+ Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta
+ and improvements to SFR's accesss made by ajrhacker.
+
+ Preliminary version to give support to magicle and other games
+ on misc/magicard.cpp driver, providing some protection level via I2C bus.
+
+ Coded and partially tested:
+ - All instruction set and disassembler.
+ - I/O Ports.
+ - WDT.
+ - Timer/Counter.
+ - All (4) interrupt sources.
+ - Input lines.
+ - Internal EEPROM with default and NVRAM functionality.
+
+ ToDo:
+ - Verify if data ram addreess map mirroring is properly coded acording to datasheet description.
+
+ - Choose wich is the best option to set the config word, if via set instruction or from dump data or some sort of combination via default options.
+
+ - Improve the debug section.
+
+ - Verify eeprom write sequence (see datashhet)
+
+ Improvements:
+ - SFR's Flag description (bit oriented instructions) in disassembler where possible.
+
+****************************************************************************************/
+
+#include "emu.h"
+#include "pic16x8x.h"
+#include "16x8xdsm.h"
+
+DEFINE_DEVICE_TYPE(PIC16CR83, pic16cr83_device, "pic16cr83", "Microchip PIC16CR83")
+DEFINE_DEVICE_TYPE(PIC16CR84, pic16cr84_device, "pic16cr84", "Microchip PIC16CR84")
+DEFINE_DEVICE_TYPE(PIC16F83, pic16f83_device, "pic16f83", "Microchip PIC16F83")
+DEFINE_DEVICE_TYPE(PIC16F84, pic16f84_device, "pic16f84", "Microchip PIC16F84")
+DEFINE_DEVICE_TYPE(PIC16F84A, pic16f84a_device, "pic16f84a", "Microchip PIC16F84A")
+
+/****************************************************************************
+ * Internal Memory Maps
+ ****************************************************************************/
+
+void pic16x8x_device::rom_9(address_map &map)
+{
+ map(0x000, 0x1ff).rom();
+}
+
+void pic16x8x_device::rom_10(address_map &map)
+{
+ map(0x000, 0x3ff).rom();
+}
+
+
+/* Notes from datasheet:
+ The address depends on the device used.
+Devices with 36 bytes ends at 2Fh, devices with
+68 bytes ends at 4Fh.*/
+
+void pic16x8x_device::core_regs(address_map &map, u8 mirror)
+{
+ map(0x00, 0x00).noprw().mirror(mirror); // Not an actual register, reading indirectly (FSR=0) returns 0
+ map(0x01, 0x01).rw(FUNC(pic16x8x_device::tmr0_r), FUNC(pic16x8x_device::tmr0_w));
+ map(0x02, 0x02).rw(FUNC(pic16x8x_device::pcl_r), FUNC(pic16x8x_device::pcl_w)).mirror(mirror);
+ map(0x03, 0x03).rw(FUNC(pic16x8x_device::status_r), FUNC(pic16x8x_device::status_w)).mirror(mirror);
+ map(0x04, 0x04).rw(FUNC(pic16x8x_device::fsr_r), FUNC(pic16x8x_device::fsr_w)).mirror(mirror);
+ map(0x05, 0x05).rw(FUNC(pic16x8x_device::porta_r), FUNC(pic16x8x_device::porta_w));
+ map(0x06, 0x06).rw(FUNC(pic16x8x_device::portb_r), FUNC(pic16x8x_device::portb_w));
+ map(0x07, 0x07).noprw().mirror(mirror); // Not an actual register, returns 0
+ map(0x08, 0x08).rw(FUNC(pic16x8x_device::eedata_r), FUNC(pic16x8x_device::eedata_w));
+ map(0x09, 0x09).rw(FUNC(pic16x8x_device::eeadr_r), FUNC(pic16x8x_device::eeadr_w));
+ map(0x0a, 0x0a).rw(FUNC(pic16x8x_device::pclath_r), FUNC(pic16x8x_device::pclath_w)).mirror(mirror);
+ map(0x0b, 0x0b).rw(FUNC(pic16x8x_device::intcon_r), FUNC(pic16x8x_device::intcon_w)).mirror(mirror);
+ map(0x81, 0x81).rw(FUNC(pic16x8x_device::option_r), FUNC(pic16x8x_device::option_w));
+ map(0x85, 0x85).rw(FUNC(pic16x8x_device::trisa_r), FUNC(pic16x8x_device::trisa_w));
+ map(0x86, 0x86).rw(FUNC(pic16x8x_device::trisb_r), FUNC(pic16x8x_device::trisb_w));
+ map(0x88, 0x88).rw(FUNC(pic16x8x_device::eecon1_r), FUNC(pic16x8x_device::eecon1_w));
+ map(0x89, 0x89).rw(FUNC(pic16x8x_device::eecon2_r), FUNC(pic16x8x_device::eecon2_w));
+}
+
+void pic16x8x_device::ram_6(address_map &map)
+{
+ // 0x00 - 0x0b SFR's Bank 0
+ // 0x0c - 0x2f GPR's
+ // 0x80 - 0x8b SFR's Bank 1
+ // 0x8c - 0xaf GPR Mirrored to 0x0c - 0x2f
+ core_regs(map, 0x80);
+ map(0x0c, 0x2f).ram().mirror(0x80);
+}
+
+void pic16x8x_device::ram_7(address_map &map)
+{
+ // 0x00 - 0x0b SFR's Bank 0
+ // 0x0c - 0x4f GPR's
+ // 0x80 - 0x8b SFR's Bank 1
+ // 0x8c - 0xcf GPR Mirrored to 0x0c - 0x4f
+ core_regs(map, 0x80);
+ map(0x0c, 0x4f).ram().mirror(0x80);
+}
+
+
+pic16x8x_device::pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , device_nvram_interface(mconfig, *this)
+ , m_region(*this, DEVICE_SELF)
+ , m_program_config("program", ENDIANNESS_LITTLE, 16, program_width, -1, program_map)
+ , m_data_config("data", ENDIANNESS_LITTLE, 8, 8, 0, data_map)
+ , m_program_width(program_width)
+ , m_CONFIG(0x3fff)
+ , m_read_port(*this, 0)
+ , m_write_port(*this)
+{
+}
+
+pic16x83_device::pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
+ : pic16x8x_device(mconfig, type, tag, owner, clock, 9, address_map_constructor(FUNC(pic16x8x_device::rom_9), this), address_map_constructor(FUNC(pic16x8x_device::ram_6), this))
+{
+}
+
+pic16x84_device::pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
+ : pic16x8x_device(mconfig, type, tag, owner, clock, 10, address_map_constructor(FUNC(pic16x8x_device::rom_10), this), address_map_constructor(FUNC(pic16x8x_device::ram_7), this))
+{
+}
+
+pic16cr83_device::pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : pic16x83_device(mconfig, PIC16CR83, tag, owner, clock)
+{
+}
+
+pic16cr84_device::pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : pic16x84_device(mconfig, PIC16CR84, tag, owner, clock)
+{
+}
+
+pic16f83_device::pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : pic16x83_device(mconfig, PIC16F83, tag, owner, clock)
+{
+}
+
+pic16f84_device::pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : pic16x84_device(mconfig, PIC16F84, tag, owner, clock)
+{
+}
+
+pic16f84a_device::pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : pic16x84_device(mconfig, PIC16F84A, tag, owner, clock)
+{
+}
+
+device_memory_interface::space_config_vector pic16x8x_device::memory_space_config() const
+{
+ return space_config_vector
+ {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config)
+ };
+}
+
+std::unique_ptr<util::disasm_interface> pic16x8x_device::create_disassembler()
+{
+ return std::make_unique<pic16x8x_disassembler>();
+}
+
+
+/* Notes about NVRAM / PIC eeprom data
+
+Dump size is 4280 Bytes, 16 bits wide.
+0000h-03ffh is program data
+0400h-3fffh is dummy data
+4000h-400fh is user and config data
+4010h-41ffh is dummy data
+4200h-4280h is eeprom data
+
+NVRAM saved data is 8 bits wide, in accordance with the data width
+of the EEPROM memory of the PIC.
+This means that we need to perform the conversion from the default
+NVRAM dumped data to the NVRAM saved data.
+*/
+
+void pic16x8x_device::nvram_default()
+{
+ u16 dump_size = 0x4280;
+ u16 eeprom_dump = 0x4200;
+
+ // populate from a memory region if present
+ if (m_region.found())
+ {
+ if (m_region->bytes() != dump_size) // pic memory dump total size
+ {
+ fatalerror("Region '%s' wrong size (expected size = 0x%X)\n", tag(), dump_size);
+ }
+
+ if (m_region->bytewidth() != 2) // pic memory dumps are 16 bits wide
+ {
+ fatalerror("Region '%s' needs to be an 16-bit region\n", tag());
+ }
+
+ // Get default NVRAM data from memory region
+ memcpy(m_buff, m_region->base() + eeprom_dump, m_internal_eeprom_size * 2);
+
+ // Data width conversion
+ for (u8 i = 0; i < m_internal_eeprom_size; i++)
+ m_eeprom_data[i] = m_buff[i] & 0x00ff;
+ }
+}
+
+bool pic16x8x_device::nvram_read(util::read_stream &file)
+{
+ auto const [err, actual] = read(file, m_eeprom_data, m_internal_eeprom_size);
+ return !err && (actual == m_internal_eeprom_size);
+}
+
+bool pic16x8x_device::nvram_write(util::write_stream &file)
+{
+ auto const [err, actual] = write(file, m_eeprom_data, m_internal_eeprom_size);
+ return !err && (actual == m_internal_eeprom_size);
+}
+
+
+// EEPROM data access
+u8 pic16x8x_device::m_eeread(offs_t offs)
+{
+ return m_eeprom_data[offs];
+}
+
+void pic16x8x_device::m_eewrite(offs_t offs, u8 data)
+{
+ m_eeprom_data[offs] = data & m_data_mask;
+}
+
+
+// ******** The following is the STATUS flag register definition. ********
+// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+// | IRP | RP1 | RP0 | T0| PD| Z | DC | C |
+
+// IRP Register Bank Select - Unimplemented on this device
+constexpr u8 RP1_FLAG = 0x40; // Register Bank Select Bit 1
+constexpr u8 RP0_FLAG = 0x20; // Register Bank Select Bit 0
+ // 00 = Bank 0 (00h-7fh)
+ // 01 = Bank 1 (80h-ffh)
+ // 10 = Bank 2 (100h-17fh)
+ // 11 = Bank 3 (180h-1ffh)
+ // Each bank is 128 bytes. Only bit RP0 is used by the PIC16F8X. RP1 should be mantained clear.
+constexpr u8 TO_FLAG = 0x10; // TO Time Out flag (WatchDog)
+constexpr u8 PD_FLAG = 0x08; // PD Power Down flag
+constexpr u8 Z_FLAG = 0x04; // Z Zero Flag
+constexpr u8 DC_FLAG = 0x02; // DC Digit Carry/Borrow flag (Nibble)
+constexpr u8 C_FLAG = 0x01; // C Carry/Borrow Flag (Byte)
+
+#define RP0 (m_STATUS & RP0_FLAG)
+#define TO (m_STATUS & TO_FLAG)
+#define PD (m_STATUS & PD_FLAG)
+#define ZERO (m_STATUS & Z_FLAG)
+#define DC (m_STATUS & DC_FLAG)
+#define CARRY (m_STATUS & C_FLAG)
+
+
+// ******** The following is the OPTION flag register definition. ********
+// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+// | RBPU | INTEDG | T0CS | T0SE | PSA | PS2 | PS1 | PS0 |
+constexpr u8 RBPU_FLAG = 0x80; // RBPU PORTB Pull-up Enable bit
+constexpr u8 INTEDG_FLAG = 0x40; // INTEDG Interrupt Edge Select bit
+ // 1 = Interrupt on rising edge of RB0/INT pin
+ // 0 = Interrupt on falling edge of RB0/INT pin
+constexpr u8 T0CS_FLAG = 0x20; // T0CS Timer 0 clock source select
+ // 1 = Transition on RA4/T0CKI pin
+ // 0 = Internal instruction cycle clock (CLKOUT)
+constexpr u8 T0SE_FLAG = 0x10; // T0SE Timer 0 clock source edge select
+ // 1 = Increment on high-to-low transition on RA4/T0CKI pin
+ // 0 = Increment on low-to-high transition on RA4/T0CKI pin
+constexpr u8 PSA_FLAG = 0x08; // PSA Prescaler Assignment bit
+ // 1 = Prescaler is assigned to the WDT
+ // 0 = Prescaler is assigned to the Timer0 module
+constexpr u8 PS_REG = 0x07; // PS Prescaler Rate select
+
+#define RBPU (m_OPTION & RBPU_FLAG)
+#define INTEDG (m_OPTION & INTEDG_FLAG)
+#define T0CS (m_OPTION & T0CS_FLAG)
+#define T0SE (m_OPTION & T0SE_FLAG)
+#define PSA (m_OPTION & PSA_FLAG)
+#define PS (m_OPTION & PS_REG)
+
+
+// ******** The following is the CONFIG Flag register definition. ********
+// | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+// | CP | WDTE | FOSC |
+ // CP Code Protect (ROM read protect)
+constexpr u8 WDTE_FLAG = 0x04; // WDTE WatchDog Timer enable
+constexpr u8 FOSC_FLAG = 0x03; // FOSC Oscillator source select
+
+#define WDTE (m_CONFIG & WDTE_FLAG)
+#define FOSC (m_CONFIG & FOSC_FLAG)
+
+
+// ******** The following is the INTCON flag register definition. ********
+// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+// | GIE | EEIE | T0IE | INTE | RBIE | T0IF | INTF | RBIF |
+
+constexpr u8 GIE_FLAG = 0x80;
+constexpr u8 EEIE_FLAG = 0x40;
+constexpr u8 T0IE_FLAG = 0x20;
+constexpr u8 INTE_FLAG = 0x10;
+constexpr u8 RBIE_FLAG = 0x08;
+constexpr u8 T0IF_FLAG = 0x04;
+constexpr u8 INTF_FLAG = 0x02;
+constexpr u8 RBIF_FLAG = 0x01;
+
+#define GIE (m_INTCON & GIE_FLAG)
+#define EEIE (m_INTCON & EEIE_FLAG)
+#define T0IE (m_INTCON & T0IE_FLAG)
+#define INTE (m_INTCON & INTE_FLAG)
+#define RBIE (m_INTCON & RBIE_FLAG)
+#define T0IF (m_INTCON & T0IF_FLAG)
+#define INTF (m_INTCON & INTF_FLAG)
+#define RBIF (m_INTCON & RBIF_FLAG)
+
+// ******** The following is the EECON1 Flag register definition. ********
+// | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
+// | | | | EEIF | WRERR | WREN | WR | RD |
+
+constexpr u8 EEIF_FLAG = 0x10;
+constexpr u8 WRERR_FLAG = 0x08;
+constexpr u8 WREN_FLAG = 0x04;
+constexpr u8 EEWR_FLAG = 0x02;
+constexpr u8 EERD_FLAG = 0x01;
+
+#define EEIF (m_EECON1 & EEIF_FLAG)
+#define WRERR (m_EECON1 & WRERR_FLAG)
+#define WREN (m_EECON1 & WREN_FLAG)
+#define EEWR (m_EECON1 & EEWR_FLAG)
+#define EERD (m_EECON1 & EERD_FLAG)
+
+/************************************************************************
+ * Fixed Vectors
+ ************************************************************************/
+
+constexpr u8 RESET_VECTOR = 0x00;
+constexpr u8 INT_VECTOR = 0x04;
+
+/************************************************************************
+ * Shortcuts
+ ************************************************************************/
+
+#define RISING_EDGE_RB0 (( (int)(RB0_in - m_old_RB0) > 0) ? 1 : 0)
+#define FALLING_EDGE_RB0 (( (int)(RB0_in - m_old_RB0) < 0) ? 1 : 0)
+
+#define M_RDEEPROM(A) m_eeread(A)
+#define M_WREEPROM(A,V) m_eewrite(A, V)
+
+#define CLR(flagreg, flag) (flagreg &= u8(~flag))
+#define SET(flagreg, flag) (flagreg |= (flag))
+
+#define ADDR ((m_opcode.b.l & 0x7f) | (RP0 << 2))
+#define BITPOS ((m_opcode.w >> 7) & 7)
+
+
+void pic16x8x_device::calc_zero_flag()
+{
+ if (m_ALU == 0)
+ SET(m_STATUS, Z_FLAG);
+ else
+ CLR(m_STATUS, Z_FLAG);
+}
+
+void pic16x8x_device::calc_add_flags(u8 augend)
+{
+ calc_zero_flag();
+
+ if (augend > m_ALU)
+ SET(m_STATUS, C_FLAG);
+ else
+ CLR(m_STATUS, C_FLAG);
+
+ if ((augend & 0x0f) > (m_ALU & 0x0f))
+ SET(m_STATUS, DC_FLAG);
+ else
+ CLR(m_STATUS, DC_FLAG);
+}
+
+void pic16x8x_device::calc_sub_flags(u8 minuend)
+{
+ calc_zero_flag();
+
+ if (minuend < m_ALU)
+ CLR(m_STATUS, C_FLAG);
+ else
+ SET(m_STATUS, C_FLAG);
+
+ if ((minuend & 0x0f) < (m_ALU & 0x0f))
+ CLR(m_STATUS, DC_FLAG);
+ else
+ SET(m_STATUS, DC_FLAG);
+}
+
+void pic16x8x_device::set_pc(u16 addr)
+{
+ m_PCL = addr & m_program_mask;
+}
+
+/*
+Notes about Stack (from datasheet)
+After the stack has been PUSHed eight times, the ninth
+push overwrites the value that was stored from the first
+push. The tenth push overwrites the second push (and
+so on)
+*/
+
+u16 pic16x8x_device::pop_stack()
+{
+ m_stack_pointer = (m_stack_pointer - 1) & 0x0f;
+ u16 data = m_STACK[m_stack_pointer];
+ return data & m_program_mask;
+}
+
+void pic16x8x_device::push_stack(u16 data)
+{
+ m_STACK[m_stack_pointer] = data & m_program_mask;
+ m_stack_pointer = (m_stack_pointer + 1) & 0x0f;
+}
+
+void pic16x8x_device::store_result(u8 addr, u8 data)
+{
+ if (m_opcode.b.l & 0x80)
+ store_regfile(addr, data);
+ else
+ m_W = data;
+
+}
+
+// *** Special function registers (SFR's) ***
+
+// *** SFR Access ***
+u8 pic16x8x_device::get_regfile(u8 addr)
+{
+ if (addr == 0)
+ { // Indirect addressing
+ addr = m_FSR & m_data_mask;
+ }
+ return m_data.read_byte(addr);
+}
+
+void pic16x8x_device::store_regfile(u8 addr, u8 data)
+{
+ if (addr == 0)
+ { // Indirect addressing
+ addr = m_FSR & m_data_mask;
+ }
+ m_data.write_byte(addr, data);
+}
+
+// *** SFR Functions ***
+u8 pic16x8x_device::tmr0_r()
+{
+ return m_TMR0;
+}
+
+void pic16x8x_device::tmr0_w(u8 data)
+{
+ m_delay_timer = 2; // Timer increment is inhibited for 2 cycles
+ if (PSA == 0) m_prescaler = 0; // Must clear the Prescaler
+ m_TMR0 = data;
+}
+
+u8 pic16x8x_device::pcl_r()
+{
+ return m_PCL;
+}
+
+void pic16x8x_device::pcl_w(u8 data)
+{
+ m_PCL = data;
+ set_pc((m_PCLATH << 8) | data);
+ m_inst_cycles++;
+}
+
+u8 pic16x8x_device::status_r()
+{
+ return m_STATUS;
+}
+
+void pic16x8x_device::status_w(u8 data)
+{
+ m_STATUS = (m_STATUS & (TO_FLAG | PD_FLAG)) | (data & u8(~(TO_FLAG | PD_FLAG)));
+}
+
+u8 pic16x8x_device::fsr_r()
+{
+ return m_FSR | (uint8_t)(~m_data_mask);
+}
+
+void pic16x8x_device::fsr_w(u8 data)
+{
+ m_FSR = data | u8(~m_data_mask);
+}
+
+u8 pic16x8x_device::porta_r()
+{
+ u8 data = m_read_port[PORTA](PORTA, 0xff);
+ data &= m_port_tris[PORTA];
+ data |= (u8(~m_port_tris[PORTA]) & m_port_data[PORTA]);
+ return data & 0x1f; // 5-bit port (only lower 5 bits used)
+}
+
+void pic16x8x_device::porta_w(u8 data)
+{
+ data &= 0x1f; // 5-bit port (only lower 5 bits used)
+ m_write_port[PORTA](PORTA, data & u8(~m_port_tris[PORTA]) & 0x1f, u8(~m_port_tris[PORTA]) & 0x1f);
+ m_port_data[PORTA] = data;
+}
+
+u8 pic16x8x_device::portb_r()
+{
+ u8 data = m_read_port[PORTB](PORTB, 0xff);
+ data &= m_port_tris[PORTB];
+ data |= (u8(~m_port_tris[PORTB]) & m_port_data[PORTB]);
+ return data;
+}
+
+void pic16x8x_device::portb_w(u8 data)
+{
+ m_write_port[PORTB](PORTB, data & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB]));
+ m_port_data[PORTB] = data;
+}
+
+u8 pic16x8x_device::eedata_r()
+{
+ return m_EEDATA;
+}
+
+void pic16x8x_device::eedata_w(u8 data)
+{
+ m_EEDATA = data;
+}
+
+u8 pic16x8x_device::eeadr_r()
+{
+ return m_EEADR;
+}
+
+void pic16x8x_device::eeadr_w(u8 data)
+{
+ m_EEADR = data;
+}
+
+u8 pic16x8x_device::pclath_r()
+{
+ return m_PCLATH;
+}
+
+void pic16x8x_device::pclath_w(u8 data)
+{
+ m_PCLATH = data;
+}
+
+u8 pic16x8x_device::intcon_r()
+{
+ return m_INTCON;
+}
+
+void pic16x8x_device::intcon_w(u8 data)
+{
+ m_INTCON = data;
+}
+
+u8 pic16x8x_device::trisa_r()
+{
+ return m_port_tris[PORTA];
+}
+
+void pic16x8x_device::trisa_w(u8 data)
+{
+ if (m_port_tris[PORTA] != data)
+ {
+ m_port_tris[PORTA] = data | 0xe0;
+ m_write_port[PORTA](PORTA, m_port_data[PORTA] & u8(~m_port_tris[PORTA]) & 0x1f, u8(~m_port_tris[PORTA]) & 0x1f);
+ }
+}
+
+u8 pic16x8x_device::trisb_r()
+{
+ return m_port_tris[PORTB];
+}
+
+void pic16x8x_device::trisb_w(u8 data)
+{
+ if (m_port_tris[PORTB] != data)
+ {
+ m_port_tris[PORTB] = data;
+ m_write_port[PORTB](PORTB, m_port_data[PORTB] & u8(~m_port_tris[PORTB]), u8(~m_port_tris[PORTB]));
+ }
+}
+
+u8 pic16x8x_device::eecon1_r()
+{
+ return m_EECON1;
+}
+
+void pic16x8x_device::eecon1_w(u8 data)
+{
+ if (!((data & WREN_FLAG) && EEWR)) // The WR bit will be inhibited from being set unless the WREN bit is set.(from datasheet)
+ CLR(data, EEWR); // Clear the flag if it don't meet the requirements
+
+ m_EECON1 = data; // update register
+
+ if (EERD) // cheack flag condition to read eeprom
+ {
+ m_EEDATA = M_RDEEPROM(m_EEADR); // do eeprom read
+ CLR(m_EECON1, EERD_FLAG); // clear read enable flag
+ }
+
+ if (WREN && EEWR && (m_EECON2 == 0xff)) // check flags conditions to write eeprom
+ {
+ M_WREEPROM(m_EEADR, data); // do eeprom write
+ CLR(m_EECON1, EEWR_FLAG); // clear write enable flag
+ SET(m_EECON1, EEIF_FLAG); // assuming write was done, set EEIF
+ }
+}
+
+u8 pic16x8x_device::eecon2_r()
+{
+ return m_EECON2;
+}
+
+void pic16x8x_device::eecon2_w(u8 data)
+{
+ if ((m_EECON2 != 0x55) & (data == 0x55))
+ m_EECON2 = data;
+ else if ((m_EECON2 == 0x55) & (data == 0xaa))
+ m_EECON2 = 0xff;
+ else
+ m_EECON2 = data;
+}
+
+u8 pic16x8x_device::option_r()
+{
+ return m_OPTION;
+}
+
+void pic16x8x_device::option_w(u8 data)
+{
+ m_OPTION = data;
+}
+
+/************************************************************************
+ * Emulate the Instructions
+ ************************************************************************/
+
+void pic16x8x_device::illegal()
+{
+ logerror("PIC16x8x: PC=%03x, Illegal opcode = %04x\n", m_PREVPC, m_opcode.w);
+}
+
+/*
+ Note:
+ According to the manual, if the STATUS register is the destination for an instruction that affects the Z, DC or C bits
+ then the write to these three bits is disabled. These bits are set or cleared according to the device logic.
+ To ensure this is correctly emulated, in instructions that write to the file registers, always change the status flags
+ *after* storing the result of the instruction.
+ e.g. CALCULATE_*, SET(STATUS,*_FLAG) and CLR(STATUS,*_FLAG) should appear as the last steps of the instruction emulation.
+*/
+
+void pic16x8x_device::addlw()
+{
+ // New
+ m_ALU = m_opcode.b.l + m_W;
+ m_W = m_ALU;
+ calc_zero_flag();
+}
+
+void pic16x8x_device::addwf()
+{
+ u8 augend = get_regfile(ADDR);
+ m_ALU = augend + m_W;
+ store_result(ADDR, m_ALU);
+ calc_add_flags(augend);
+}
+
+void pic16x8x_device::andlw()
+{
+ m_ALU = m_opcode.b.l & m_W;
+ m_W = m_ALU;
+ calc_zero_flag();
+}
+
+void pic16x8x_device::andwf()
+{
+ m_ALU = get_regfile(ADDR) & m_W;
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::bcf()
+{
+ m_ALU = get_regfile(ADDR);
+ m_ALU &= ~(1 << BITPOS);
+ store_regfile(ADDR, m_ALU);
+}
+
+void pic16x8x_device::bsf()
+{
+ m_ALU = get_regfile(ADDR);
+ m_ALU |= 1 << BITPOS;
+ store_regfile(ADDR, m_ALU);
+}
+
+void pic16x8x_device::btfss()
+{
+ if (BIT(get_regfile(ADDR), BITPOS))
+ {
+ set_pc(m_PCL + 1);
+ m_inst_cycles++; // Add NOP cycles
+ }
+}
+
+void pic16x8x_device::btfsc()
+{
+ if (!BIT(get_regfile(ADDR), BITPOS))
+ {
+ set_pc(m_PCL + 1);
+ m_inst_cycles++; // Add NOP cycles
+ }
+}
+
+void pic16x8x_device::call()
+{
+ push_stack(m_PCL);
+ set_pc(((m_PCLATH & 0x18) << 8 ) | (m_opcode.w & 0x07ff));
+}
+
+
+void pic16x8x_device::clrw()
+{
+ m_W = 0;
+ SET(m_STATUS, Z_FLAG);
+}
+
+void pic16x8x_device::clrf()
+{
+ store_regfile(ADDR, 0);
+ SET(m_STATUS, Z_FLAG);
+}
+
+void pic16x8x_device::clrwdt()
+{
+ m_WDT = 0;
+ if (PSA) m_prescaler = 0;
+ SET(m_STATUS, TO_FLAG);
+ SET(m_STATUS, PD_FLAG);
+}
+
+void pic16x8x_device::comf()
+{
+ m_ALU = u8(~(get_regfile(ADDR)));
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::decf()
+{
+ m_ALU = get_regfile(ADDR) - 1;
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::decfsz()
+{
+ m_ALU = get_regfile(ADDR) - 1;
+ store_result(ADDR, m_ALU);
+ if (m_ALU == 0)
+ {
+ set_pc(m_PCL + 1);
+ m_inst_cycles++; // Add NOP cycles
+ }
+}
+
+void pic16x8x_device::goto_op()
+{
+ set_pc(((m_PCLATH & 0x18) << 8 ) | (m_opcode.w & 0x07ff));
+}
+
+void pic16x8x_device::incf()
+{
+ m_ALU = get_regfile(ADDR) + 1;
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::incfsz()
+{
+ m_ALU = get_regfile(ADDR) + 1;
+ store_result(ADDR, m_ALU);
+ if (m_ALU == 0)
+ {
+ set_pc(m_PCL + 1);
+ m_inst_cycles++; // Add NOP cycles
+ }
+}
+
+void pic16x8x_device::iorlw()
+{
+ m_ALU = m_opcode.b.l | m_W;
+ m_W = m_ALU;
+ calc_zero_flag();
+}
+
+void pic16x8x_device::iorwf()
+{
+ m_ALU = get_regfile(ADDR) | m_W;
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::movf()
+{
+ m_ALU = get_regfile(ADDR);
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+void pic16x8x_device::movlw()
+{
+ m_W = m_opcode.b.l;
+}
+
+void pic16x8x_device::movwf()
+{
+ store_regfile(ADDR, m_W);
+}
+
+void pic16x8x_device::nop()
+{
+ // Do nothing
+}
+
+void pic16x8x_device::retfie() // new for 16x8x
+{
+ // New
+ set_pc(pop_stack());
+ m_irq_in_progress = false;
+}
+
+void pic16x8x_device::retlw()
+{
+ m_W = m_opcode.b.l;
+ set_pc(pop_stack());
+}
+
+void pic16x8x_device::retrn() // new for 16x8x
+{
+ set_pc(pop_stack());
+}
+
+void pic16x8x_device::rlf()
+{
+ m_ALU = get_regfile(ADDR);
+ int carry = BIT(m_ALU, 7);
+ m_ALU <<= 1;
+ if (m_STATUS & C_FLAG) m_ALU |= 1;
+ store_result(ADDR, m_ALU);
+
+ if (carry)
+ SET(m_STATUS, C_FLAG);
+ else
+ CLR(m_STATUS, C_FLAG);
+}
+
+void pic16x8x_device::rrf()
+{
+ m_ALU = get_regfile(ADDR);
+ int carry = BIT(m_ALU, 0);
+ m_ALU >>= 1;
+ if (m_STATUS & C_FLAG) m_ALU |= 0x80;
+ store_result(ADDR, m_ALU);
+
+ if (carry)
+ SET(m_STATUS, C_FLAG);
+ else
+ CLR(m_STATUS, C_FLAG);
+}
+
+void pic16x8x_device::sleepic()
+{
+ if (WDTE) m_WDT = 0;
+ if (PSA) m_prescaler = 0;
+ SET(m_STATUS, TO_FLAG);
+ CLR(m_STATUS, PD_FLAG);
+}
+
+void pic16x8x_device::sublw() // new for 16x8x : Substract W from literal
+{
+ // New
+ u8 minuend = m_opcode.b.l;
+ m_ALU = minuend - m_W;
+ m_W = m_ALU;
+ calc_sub_flags(minuend);
+}
+
+void pic16x8x_device::subwf() // Substract W from f
+{
+ u8 minuend = get_regfile(ADDR);
+ m_ALU = minuend - m_W;
+ store_result(ADDR, m_ALU);
+ calc_sub_flags(minuend);
+}
+
+void pic16x8x_device::swapf()
+{
+ u8 reg = get_regfile(ADDR);
+ m_ALU = reg << 4 | reg >> 4;
+ store_result(ADDR, m_ALU);
+}
+
+void pic16x8x_device::xorlw()
+{
+ m_ALU = m_W ^ m_opcode.b.l;
+ m_W = m_ALU;
+ calc_zero_flag();
+}
+
+void pic16x8x_device::xorwf()
+{
+ m_ALU = get_regfile(ADDR) ^ m_W;
+ store_result(ADDR, m_ALU);
+ calc_zero_flag();
+}
+
+
+/***********************************************************************
+ * Opcode Table (Cycles, Instruction)
+ ***********************************************************************/
+
+const pic16x8x_device::pic16x8x_opcode pic16x8x_device::s_opcode_main[128]=
+{
+ {1, &pic16x8x_device::nop },{1, &pic16x8x_device::movwf },{1, &pic16x8x_device::clrw },{1, &pic16x8x_device::clrf }, // 00
+ {1, &pic16x8x_device::subwf },{1, &pic16x8x_device::subwf },{1, &pic16x8x_device::decf },{1, &pic16x8x_device::decf }, // 04
+ {1, &pic16x8x_device::iorwf },{1, &pic16x8x_device::iorwf },{1, &pic16x8x_device::andwf },{1, &pic16x8x_device::andwf }, // 08
+ {1, &pic16x8x_device::xorwf },{1, &pic16x8x_device::xorwf },{1, &pic16x8x_device::addwf },{1, &pic16x8x_device::addwf }, // 0C
+ {1, &pic16x8x_device::movf },{1, &pic16x8x_device::movf },{1, &pic16x8x_device::comf },{1, &pic16x8x_device::comf }, // 10
+ {1, &pic16x8x_device::incf },{1, &pic16x8x_device::incf },{1, &pic16x8x_device::decfsz },{1, &pic16x8x_device::decfsz }, // 14
+ {1, &pic16x8x_device::rrf },{1, &pic16x8x_device::rrf },{1, &pic16x8x_device::rlf },{1, &pic16x8x_device::rlf }, // 18
+ {1, &pic16x8x_device::swapf },{1, &pic16x8x_device::swapf },{1, &pic16x8x_device::incfsz },{1, &pic16x8x_device::incfsz }, // 1C
+ {1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf }, // 20
+ {1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },{1, &pic16x8x_device::bcf },
+ {1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf }, // 28
+ {1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },{1, &pic16x8x_device::bsf },
+ {1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc }, // 30
+ {1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },{1, &pic16x8x_device::btfsc },
+ {1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss }, // 38
+ {1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },{1, &pic16x8x_device::btfss },
+ {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, // 40
+ {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },
+ {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call }, // 48
+ {2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },{2, &pic16x8x_device::call },
+ {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, // 50
+ {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },
+ {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op }, // 58
+ {2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },{2, &pic16x8x_device::goto_op },
+ {1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw }, // 60
+ {1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },{1, &pic16x8x_device::movlw },
+ {2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw }, // 68
+ {2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },{2, &pic16x8x_device::retlw },
+ {1, &pic16x8x_device::iorlw },{1, &pic16x8x_device::iorlw },{1, &pic16x8x_device::andlw },{1, &pic16x8x_device::andlw }, // 70
+ {1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw },{1, &pic16x8x_device::xorlw }, // 74
+ {1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw },{1, &pic16x8x_device::sublw }, // 78
+ {1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw },{1, &pic16x8x_device::addlw } // 7C
+};
+
+const pic16x8x_device::pic16x8x_opcode pic16x8x_device::s_opcode_00x[128]=
+{
+ {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 00
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {2, &pic16x8x_device::retrn },{2, &pic16x8x_device::retfie },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 08
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 10
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 18
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 20
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 28
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 30
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 38
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 40
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 48
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 50
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 58
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::nop },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::sleepic }, // 60
+ {1, &pic16x8x_device::clrwdt },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 68
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 70
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }, // 78
+ {1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal },{1, &pic16x8x_device::illegal }
+};
+
+
+/****************************************************************************
+ * Inits CPU emulation
+ ****************************************************************************/
+
+enum
+{
+ PIC16X8x_PC=1, PIC16X8x_W, PIC16X8x_ALU, PIC16X8x_WDT, PIC16X8x_PSCL, PIC16X8x_CONFIG
+};
+
+void pic16x8x_device::device_start()
+{
+ space(AS_PROGRAM).cache(m_program);
+ space(AS_DATA).specific(m_data);
+
+ m_program_mask = (1 << m_program_width) - 1;
+ m_data_mask = 0xff;
+ m_status_mask = 0xff;
+ m_PCL = 0;
+ m_PREVPC = 0;
+ m_W = 0;
+ m_OPTION = 0;
+ m_ALU = 0;
+ m_WDT = 0;
+ m_TMR0 = 0;
+ m_STATUS = ~m_status_mask;
+ m_FSR = 0;
+ std::fill(std::begin(m_port_data), std::end(m_port_data), 0);
+ std::fill(std::begin(m_port_tris), std::end(m_port_tris), 0);
+ std::fill(std::begin(m_STACK), std::end(m_STACK), 0);
+ m_prescaler = 0;
+ m_opcode.w = 0;
+ m_delay_timer = 0;
+ m_rtcc = 0;
+ m_count_cycles = 0;
+ m_inst_cycles = 0;
+ m_stack_pointer = 0;
+ m_debugger_temp = 0;
+ m_portb_chdetect_temp = 0xff;
+ m_irq_in_progress = false;
+
+ // save states
+ save_item(NAME(m_PCL));
+ save_item(NAME(m_PREVPC));
+ save_item(NAME(m_CONFIG));
+ save_item(NAME(m_W));
+ save_item(NAME(m_OPTION));
+ save_item(NAME(m_ALU));
+ save_item(NAME(m_WDT));
+ save_item(NAME(m_TMR0));
+ save_item(NAME(m_STATUS));
+ save_item(NAME(m_FSR));
+ save_item(NAME(m_port_data));
+ save_item(NAME(m_port_tris));
+ save_item(NAME(m_EEDATA));
+ save_item(NAME(m_EEADR));
+ save_item(NAME(m_EECON1));
+ save_item(NAME(m_EECON2));
+ save_item(NAME(m_PCLATH));
+ save_item(NAME(m_INTCON));
+ save_item(NAME(m_STACK));
+ save_item(NAME(m_prescaler));
+ save_item(NAME(m_opcode.w));
+ save_item(NAME(m_delay_timer));
+ save_item(NAME(m_rtcc));
+ save_item(NAME(m_count_cycles));
+ save_item(NAME(m_inst_cycles));
+ save_item(NAME(m_stack_pointer));
+ save_item(NAME(m_old_RB0));
+ save_item(NAME(m_irq_in_progress));
+ save_item(NAME(m_eeprom_data));
+
+
+ // debugger
+ state_add( PIC16X8x_PC, "PC", m_PCL).mask(0xfff).formatstr("%03X");
+ state_add( PIC16X8x_W, "W", m_W).formatstr("%02X");
+ state_add( PIC16X8x_ALU, "ALU", m_ALU).formatstr("%02X");
+ state_add( PIC16X8x_WDT, "WDT", m_WDT).formatstr("%04X");
+ state_add( PIC16X8x_CONFIG, "CNF", m_CONFIG).formatstr("%04X");
+ state_add( PIC16X8x_PSCL, "PSCL", m_debugger_temp).callimport().formatstr("%3s");
+
+ state_add( STATE_GENPC, "GENPC", m_PCL).noshow();
+ state_add( STATE_GENPCBASE, "CURPC", m_PREVPC).noshow();
+ state_add( STATE_GENFLAGS, "GENFLAGS", m_OPTION).formatstr("%13s").noshow();
+
+ set_icountptr(m_icount);
+}
+
+
+void pic16x8x_device::state_import(const device_state_entry &entry)
+{
+ switch (entry.index())
+ {
+ case PIC16X8x_PSCL:
+ m_prescaler = m_debugger_temp;
+ break;
+ }
+}
+
+void pic16x8x_device::state_export(const device_state_entry &entry)
+{
+ switch (entry.index())
+ {
+ }
+}
+
+void pic16x8x_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case PIC16X8x_PSCL:
+ str = string_format("%c%02X", ((m_OPTION & 0x08) ? 'W' : 'T'), m_prescaler);
+ break;
+
+ case STATE_GENFLAGS:
+ str = string_format("%01x%c%c%c%c%c %c%c%c%03x",
+ (m_STATUS & 0xe0) >> 5,
+ m_STATUS & 0x10 ? '.':'O', // WDT Overflow
+ m_STATUS & 0x08 ? 'P':'D', // Power/Down
+ m_STATUS & 0x04 ? 'Z':'.', // Zero
+ m_STATUS & 0x02 ? 'c':'b', // Nibble Carry/Borrow
+ m_STATUS & 0x01 ? 'C':'B', // Carry/Borrow
+
+ m_OPTION & 0x20 ? 'C':'T', // Counter/Timer
+ m_OPTION & 0x10 ? 'N':'P', // Negative/Positive
+ m_OPTION & 0x08 ? 'W':'T', // WatchDog/Timer
+ m_OPTION & 0x08 ? (1<<(m_OPTION&7)) : (2<<(m_OPTION&7)));
+ break;
+ }
+}
+
+
+/****************************************************************************
+ * Reset registers to their initial values
+ ****************************************************************************/
+
+void pic16x8x_device::reset_regs()
+{
+ set_pc(RESET_VECTOR);
+ m_port_tris[PORTA] = 0x1f;
+ m_port_tris[PORTB] = 0xff;
+ m_OPTION = T0CS_FLAG | T0SE_FLAG | PSA_FLAG | PS_REG;
+ m_PREVPC = m_PCL;
+ m_STATUS = 0x18;
+ m_PCL = 0;
+ m_prescaler = 0;
+ m_delay_timer = 0;
+ m_inst_cycles = 0;
+ m_count_cycles = 0;
+ m_stack_pointer = 0;
+ m_portb_chdetect_temp = 0xff;
+ m_old_RB0 = 0;
+}
+
+void pic16x8x_device::set_config(u16 data)
+{
+ logerror("Writing %04x to the PIC16x8x configuration bits\n", data);
+ m_CONFIG = (data & 0x3fff);
+}
+
+void pic16x8x_device::watchdog_reset()
+{
+ SET(m_STATUS, TO_FLAG | PD_FLAG | Z_FLAG | DC_FLAG | C_FLAG);
+ reset_regs();
+}
+
+void pic16x8x_device::device_reset()
+{
+ reset_regs();
+ CLR(m_STATUS, RP0_FLAG);
+ CLR(m_STATUS, RP1_FLAG);
+
+ // Setting TO_FLAG from Config Word
+ if (WDTE)
+ SET(m_STATUS, TO_FLAG);
+ else
+ CLR(m_STATUS, TO_FLAG);
+
+ SET(m_STATUS, PD_FLAG);
+ store_regfile(3, m_STATUS);
+ store_regfile(4, m_FSR);
+}
+
+
+/****************************************************************************
+ * WatchDog
+ ****************************************************************************/
+
+void pic16x8x_device::update_watchdog(int counts)
+{
+ /*
+ WatchDog is set up to count 18,000 (0x464f hex) ticks to provide
+ the timeout period of 0.018ms based on a 4MHz input clock.
+ Note: the 4MHz clock should be divided by the PIC16C5x_CLOCK_DIVIDER
+ which effectively makes the PIC run at 1MHz internally.
+
+ If the current instruction is CLRWDT or SLEEP, don't update the WDT
+ */
+
+ if ((m_opcode.w != 3) && (m_opcode.w != 4))
+ {
+ u16 old_WDT = m_WDT;
+
+ m_WDT -= counts;
+
+ if (m_WDT > 0x464f)
+ {
+ m_WDT = 0x464f - (0xffff - m_WDT);
+ }
+
+ if (((old_WDT != 0) && (old_WDT < m_WDT)) || (m_WDT == 0))
+ {
+ if (PSA)
+ {
+ m_prescaler++;
+ if (m_prescaler >= (1 << PS))
+ { // Prescale values from 1 to 128
+ m_prescaler = 0;
+ CLR(m_STATUS, TO_FLAG);
+ watchdog_reset();
+ }
+ }
+ else
+ {
+ CLR(m_STATUS, TO_FLAG);
+ watchdog_reset();
+ }
+ }
+ }
+}
+
+
+/****************************************************************************
+ * Update Timer
+ ****************************************************************************/
+
+void pic16x8x_device::update_timer(int counts)
+{
+ if (m_delay_timer > 0)
+ { // Timer increment is inhibited
+ int dt = m_delay_timer;
+ m_delay_timer -= m_inst_cycles;
+ counts -= dt;
+ }
+
+ if (m_delay_timer > 0 || counts <= 0)
+ return;
+
+ if (PSA == 0)
+ { // if PSA is cleared, prescaler is assigned to timer
+ m_prescaler += counts;
+ if (m_prescaler >= (2 << PS))
+ { // Prescale values from 2 to 256
+ m_TMR0 += (m_prescaler / (2 << PS));
+ if(m_TMR0 == 0)
+ SET(m_INTCON, T0IF_FLAG);
+ m_prescaler %= (2 << PS); // Overflow prescaler
+ }
+ }
+ else
+ {
+ m_TMR0 += counts;
+ if(m_TMR0 == 0)
+ SET(m_INTCON, T0IF_FLAG);
+ }
+}
+
+void pic16x8x_device::execute_set_input(int line, int state)
+{
+ u8 RB0_in;
+ switch (line)
+ {
+ // RTCC/RA4_T0CKI pin
+ case PIC16x8x_T0CKI:
+ if (T0CS && state != m_rtcc)
+ { // Count mode, edge triggered
+ if ((T0SE && !state) || (!T0SE && state))
+ m_count_cycles++;
+ }
+ m_rtcc = state;
+ break;
+
+ case PIC16x8x_RB0INT:
+ RB0_in = state;
+ if (INTEDG)
+ { /* Interrupt on Rising edge RB0 input */
+ if (RISING_EDGE_RB0)
+ {
+ SET(m_INTCON, INTF_FLAG);
+ }
+ }
+ else
+ { /* Interrupt on Falling edge RB0 input */
+ if (FALLING_EDGE_RB0)
+ {
+ SET(m_INTCON, INTF_FLAG);
+ }
+ }
+ m_old_RB0 = RB0_in;
+ break;
+
+ default:
+ break;
+ }
+}
+
+/*-------------------------------------------------
+ check_irqs - check for and process IRQs
+-------------------------------------------------*/
+
+void pic16x8x_device::check_irqs()
+{
+ // if something is in progress, we do nothing
+ if (m_irq_in_progress)
+ return;
+
+ if (m_read_port[PORTB](PORTB, 0xf0) != m_portb_chdetect_temp)
+ {
+ m_portb_chdetect_temp = m_read_port[PORTB](PORTB, 0xf0);
+ SET(m_INTCON, RBIF_FLAG);
+ }
+ else if (GIE && RBIE && RBIF)
+ {
+ push_stack(m_PCL);
+ set_pc(INT_VECTOR);
+ standard_irq_callback(0, m_PCL);
+ m_irq_in_progress = true;
+ }
+ else if (GIE && INTE && INTF)
+ {
+ push_stack(m_PCL);
+ set_pc(INT_VECTOR);
+ standard_irq_callback(1, m_PCL);
+ m_irq_in_progress = true;
+ }
+ else if (GIE && T0IE && T0IF)
+ {
+ push_stack(m_PCL);
+ set_pc(INT_VECTOR);
+ standard_irq_callback(2, m_PCL);
+ m_irq_in_progress = true;
+ }
+ else if (GIE && EEIE && EEIF)
+ {
+ push_stack(m_PCL);
+ set_pc(INT_VECTOR);
+ standard_irq_callback(3, m_PCL);
+ m_irq_in_progress = true;
+ }
+}
+
+
+/****************************************************************************
+ * Execute IPeriod. Return 0 if emulation should be stopped
+ ****************************************************************************/
+
+void pic16x8x_device::execute_run()
+{
+ do
+ {
+ // check interrupts
+ check_irqs();
+
+ if (PD == 0)
+ { // Sleep Mode
+ m_count_cycles = 0;
+ m_inst_cycles = 1;
+ debugger_instruction_hook(m_PCL);
+ }
+ else
+ {
+ m_PREVPC = m_PCL;
+
+ debugger_instruction_hook(m_PCL);
+
+ m_opcode.w = m_program.read_word(m_PCL);
+ set_pc(m_PCL + 1);
+
+ if ( (m_opcode.w & 0x3f80) != 0x0000)
+ { // Do all opcodes except the 00? ones
+ m_inst_cycles = s_opcode_main[((m_opcode.w >> 7) & 0x7f)].cycles;
+ (this->*s_opcode_main[((m_opcode.w >> 7) & 0x7f)].function)();
+ }
+ else
+ { // Opcode 0x00? has many opcodes in its minor nibble
+ m_inst_cycles = s_opcode_00x[(m_opcode.b.l & 0x7f)].cycles;
+ (this->*s_opcode_00x[(m_opcode.b.l & 0x7f)].function)();
+ }
+
+ update_timer(T0CS ? m_count_cycles : m_inst_cycles);
+ m_count_cycles = 0;
+ }
+
+ if (WDTE)
+ {
+ update_watchdog(m_inst_cycles);
+ }
+
+ m_icount -= m_inst_cycles;
+
+ } while (m_icount > 0);
+}
diff --git a/src/devices/cpu/pic16x8x/pic16x8x.h b/src/devices/cpu/pic16x8x/pic16x8x.h
new file mode 100644
index 00000000000..a2936e5bf36
--- /dev/null
+++ b/src/devices/cpu/pic16x8x/pic16x8x.h
@@ -0,0 +1,318 @@
+// license:BSD-3-Clause
+// copyright-holders:Tony La Porta, Grull Osgo
+/************************************************************************
+
+ Microchip PIC16x8x Emulator
+
+ Based on MAME's PIC16C5x/62x cpu devices developed by Tony La Porta
+ and improvements to SFR's accesss made by ajrhacker.
+
+
+************************************************************************/
+
+#ifndef MAME_CPU_PIC16X8X_PIC16X8X_H
+#define MAME_CPU_PIC16X8X_PIC16X8X_H
+
+#pragma once
+
+// input lines
+enum
+{
+ PIC16x8x_T0CKI = 0,
+ PIC16x8x_RB0INT
+};
+
+DECLARE_DEVICE_TYPE(PIC16CR83, pic16cr83_device)
+DECLARE_DEVICE_TYPE(PIC16CR84, pic16cr84_device)
+DECLARE_DEVICE_TYPE(PIC16F83, pic16f83_device)
+DECLARE_DEVICE_TYPE(PIC16F84, pic16f84_device)
+DECLARE_DEVICE_TYPE(PIC16F84A, pic16f84a_device)
+
+class pic16x8x_device : public cpu_device, public device_nvram_interface
+{
+
+// i/o ports
+ enum
+ {
+ PORTA = 0,
+ PORTB
+ };
+
+public:
+ // port a, 5 bits, 2-way
+ auto read_a() { return m_read_port[PORTA].bind(); }
+ auto write_a() { return m_write_port[PORTA].bind(); }
+
+ // port b, 8 bits, 2-way
+ auto read_b() { return m_read_port[PORTB].bind(); }
+ auto write_b() { return m_write_port[PORTB].bind(); }
+
+ /****************************************************************************
+ * Function to configure the CONFIG register. This is actually hard-wired
+ * during ROM programming, so should be called in the driver INIT, with
+ * the value if known (available in HEX dumps of the ROM).
+ ****************************************************************************/
+ void set_config(u16 data);
+
+ void core_regs(address_map &map, u8 mirror = 0) ATTR_COLD;
+
+ void ram_6(address_map &map) ATTR_COLD;
+ void rom_9(address_map &map) ATTR_COLD;
+ void ram_7(address_map &map) ATTR_COLD;
+ void rom_10(address_map &map) ATTR_COLD;
+
+protected:
+ // construction/destruction
+ pic16x8x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int program_width, address_map_constructor program_map, address_map_constructor data_map);
+
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface overrides
+ /**************************************************************************
+ * Internal Clock divisor
+ *
+ * External Clock is divided internally by 4 for the instruction cycle
+ * times. (Each instruction cycle passes through 4 machine states). This
+ * is handled by the cpu execution engine.
+ **************************************************************************/
+ virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
+ virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 2; }
+ virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PIC16x8x_T0CKI; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int line, int state) override;
+
+ // device_memory_interface overrides
+ virtual space_config_vector memory_space_config() const override;
+
+ // device_nvram_interface implementation
+ virtual bool nvram_read(util::read_stream &file) override;
+ virtual bool nvram_write(util::write_stream &file) override;
+ virtual void nvram_default() override;
+
+ // device_state_interface overrides
+ virtual void state_import(const device_state_entry &entry) override;
+ virtual void state_export(const device_state_entry &entry) override;
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ u8 m_eeprom_data[0x40];
+ u16 m_buff[0x40];
+
+ optional_memory_region m_region;
+
+ // address spaces
+ address_space_config m_program_config;
+ address_space_config m_data_config;
+
+ int m_program_width;
+
+private:
+
+ memory_access<13, 1, -1, ENDIANNESS_LITTLE>::cache m_program;
+ memory_access< 8, 0, 0, ENDIANNESS_LITTLE>::specific m_data;
+
+ /******************** CPU Internal Registers *******************/
+ u16 m_PCL;
+ u16 m_PREVPC;
+ u8 m_W;
+ u8 m_OPTION;
+ u16 m_CONFIG;
+ u8 m_ALU;
+ u16 m_WDT;
+ u8 m_TMR0;
+ u8 m_STATUS;
+ u8 m_FSR;
+ u8 m_EEDATA;
+ u8 m_EEADR;
+ u8 m_PCLATH;
+ u8 m_INTCON;
+ u8 m_EECON1;
+ u8 m_EECON2;
+ u8 m_port_data[2];
+ u8 m_port_tris[2];
+ u16 m_STACK[8];
+ u16 m_prescaler; // Note: this is really an 8-bit register
+ PAIR16 m_opcode;
+ int m_icount;
+ int m_delay_timer;
+ int m_rtcc;
+ u8 m_count_cycles;
+ u8 m_data_mask;
+ u16 m_program_mask;
+ u8 m_status_mask;
+ u8 m_inst_cycles;
+ u8 m_stack_pointer;
+ u8 m_old_RB0;
+ u8 m_portb_chdetect_temp;
+ bool m_irq_in_progress;
+
+ const u8 m_internal_eeprom_size = 0x40;
+
+ // i/o handlers
+ devcb_read8::array<2> m_read_port;
+ devcb_write8::array<2> m_write_port;
+
+ // For debugger
+ int m_debugger_temp;
+
+ // opcode table entry
+ typedef void (pic16x8x_device::*pic16x8x_ophandler)();
+ struct pic16x8x_opcode
+ {
+ u8 cycles;
+ pic16x8x_ophandler function;
+ };
+
+ static const pic16x8x_opcode s_opcode_main[128];
+ static const pic16x8x_opcode s_opcode_00x[128];
+
+ void check_irqs();
+
+ // EEPROM data access
+ u8 m_eeread(offs_t offs);
+ void m_eewrite(offs_t offs, u8 data);
+
+ //void update_internalram_ptr();
+ void calc_zero_flag();
+ void calc_add_flags(u8 augend);
+ void calc_sub_flags(u8 minuend);
+ u16 pop_stack();
+ void push_stack(u16 data);
+ void set_pc(u16 addr);
+ u8 get_regfile(u8 addr);
+ void store_regfile(u8 addr, u8 data);
+ void store_result(u8 addr, u8 data);
+ u8 tmr0_r();
+ void tmr0_w(u8 data);
+ u8 pcl_r();
+ void pcl_w(u8 data);
+ u8 status_r();
+ void status_w(u8 data);
+ u8 fsr_r();
+ void fsr_w(u8 data);
+ u8 porta_r();
+ void porta_w(u8 data);
+ u8 portb_r();
+ void portb_w(u8 data);
+ u8 eedata_r();
+ void eedata_w(u8 data);
+ u8 eeadr_r();
+ void eeadr_w(u8 data);
+ u8 pclath_r();
+ void pclath_w(u8 data);
+ u8 intcon_r();
+ void intcon_w(u8 data);
+ u8 trisa_r();
+ void trisa_w(u8 data);
+ u8 trisb_r();
+ void trisb_w(u8 data);
+ u8 eecon1_r();
+ void eecon1_w(u8 data);
+ u8 eecon2_r();
+ void eecon2_w(u8 data);
+ u8 option_r();
+ void option_w(u8 data);
+ void reset_regs();
+ void watchdog_reset();
+ void update_watchdog(int counts);
+ void update_timer(int counts);
+
+ void illegal();
+ void addlw(); // new for 16x8x
+ void addwf();
+ void andwf();
+ void andlw();
+ void bcf();
+ void bsf();
+ void btfss();
+ void btfsc();
+ void call();
+ void clrw();
+ void clrf();
+ void clrwdt();
+ void comf();
+ void decf();
+ void decfsz();
+ void goto_op();
+ void incf();
+ void incfsz();
+ void iorlw();
+ void iorwf();
+ void movf();
+ void movlw();
+ void movwf();
+ void nop();
+ void retfie(); // new for 16x8x
+ void retlw();
+ void retrn(); // new for 16x8x - can´t use return as mnemonic - Others PIC's uses "returns", should I use it?
+ void rlf();
+ void rrf();
+ void sleepic();
+ void sublw(); // new for 16x8x
+ void subwf();
+ void swapf();
+ void xorlw();
+ void xorwf();
+};
+
+
+class pic16x83_device : public pic16x8x_device
+{
+public:
+ // construction/destruction
+ pic16x83_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
+};
+
+class pic16x84_device : public pic16x8x_device
+{
+public:
+ // construction/destruction
+ pic16x84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock); //, int program_width);
+};
+
+class pic16cr83_device : public pic16x83_device
+{
+public:
+ // construction/destruction
+ pic16cr83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class pic16cr84_device : public pic16x84_device
+{
+public:
+ // construction/destruction
+ pic16cr84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class pic16f83_device : public pic16x83_device
+{
+public:
+ // construction/destruction
+ pic16f83_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class pic16f84_device : public pic16x84_device
+{
+public:
+ // construction/destruction
+ pic16f84_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+class pic16f84a_device : public pic16x84_device
+{
+public:
+ // construction/destruction
+ pic16f84a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+#endif // MAME_CPU_PIC16X8X_PIC16X8X_H
diff --git a/src/devices/cpu/pic17/pic17.cpp b/src/devices/cpu/pic17/pic17.cpp
index 0258b052ca9..6fe0f21a08d 100644
--- a/src/devices/cpu/pic17/pic17.cpp
+++ b/src/devices/cpu/pic17/pic17.cpp
@@ -899,6 +899,7 @@ void pic17_cpu_device::execute_run()
else
{
// Do nothing until time to wake up
+ debugger_wait_hook();
m_icount = 0;
m_execphase = exec_phase::Q1;
return;
diff --git a/src/devices/cpu/pic17/pic17.h b/src/devices/cpu/pic17/pic17.h
index fed49748a67..d132950ec3d 100644
--- a/src/devices/cpu/pic17/pic17.h
+++ b/src/devices/cpu/pic17/pic17.h
@@ -43,8 +43,8 @@ protected:
pic17_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 rom_size, address_map_constructor data_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -59,7 +59,7 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// internal data map
- void core_data_map(address_map &map);
+ void core_data_map(address_map &map) ATTR_COLD;
// helpers for derived classes
void int_edge(bool rising);
@@ -134,7 +134,7 @@ private:
void q4_write();
// address map constructor
- void program_map(address_map &map);
+ void program_map(address_map &map) ATTR_COLD;
// address spaces
const address_space_config m_program_config;
diff --git a/src/devices/cpu/pic17/pic17c4x.h b/src/devices/cpu/pic17/pic17c4x.h
index fd48f2aa49a..b02b3030ade 100644
--- a/src/devices/cpu/pic17/pic17c4x.h
+++ b/src/devices/cpu/pic17/pic17c4x.h
@@ -78,15 +78,14 @@ protected:
pic17c4x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 rom_size, address_map_constructor data_map);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
- virtual u32 execute_input_lines() const noexcept override { return 6; } // for now
virtual bool execute_input_edge_triggered(int linenum) const noexcept override { return linenum == INT_LINE || linenum == T0CKI_LINE; }
virtual void execute_set_input(int linenum, int state) override;
- void data_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
virtual void increment_timers() override;
@@ -163,7 +162,7 @@ protected:
pic17c43_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 rom_size);
private:
- void data_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
};
class pic17c44_device : public pic17c43_device
diff --git a/src/devices/cpu/powerpc/ppc.h b/src/devices/cpu/powerpc/ppc.h
index caf3e2b3862..ce715b59dc1 100644
--- a/src/devices/cpu/powerpc/ppc.h
+++ b/src/devices/cpu/powerpc/ppc.h
@@ -21,6 +21,8 @@
#include "divtlb.h"
+#include <algorithm>
+
/***************************************************************************
CONSTANTS
@@ -77,9 +79,18 @@ enum
PPC_R30,
PPC_R31,
PPC_CR,
+ PPC_MQ,
PPC_LR,
PPC_CTR,
PPC_XER,
+ PPC_BAT0U,
+ PPC_BAT0L,
+ PPC_BAT1U,
+ PPC_BAT1L,
+ PPC_BAT2U,
+ PPC_BAT2L,
+ PPC_BAT3U,
+ PPC_BAT3L,
PPC_F0,
PPC_F1,
@@ -149,7 +160,6 @@ enum
PPC_SR15
};
-
/* compiler-specific options */
#define PPCDRC_STRICT_VERIFY 0x0001 /* verify all instructions */
#define PPCDRC_FLUSH_PC 0x0002 /* flush the PC value before each memory access */
@@ -250,14 +260,13 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 40; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -469,22 +478,30 @@ protected:
/* architectural distinctions */
powerpc_flavor m_flavor;
- uint32_t m_cap;
- uint8_t m_cache_line_size;
- uint32_t m_tb_divisor;
+ uint32_t m_cap;
+ uint8_t m_cache_line_size;
+ uint32_t m_tb_divisor;
/* PowerPC 4xx-specific state */
/* PowerPC 4XX-specific serial port state */
struct ppc4xx_spu_state
{
- ppc4xx_spu_state(device_t &owner) : tx_cb(owner) { }
-
- uint8_t regs[9];
- uint8_t txbuf;
- uint8_t rxbuf;
+ ppc4xx_spu_state(device_t &owner) : timer(nullptr), tx_cb(owner) { }
+
+ void clear()
+ {
+ std::fill(std::begin(regs), std::end(regs), 0);
+ txbuf = rxbuf = 0;
+ std::fill(std::begin(rxbuffer), std::end(rxbuffer), 0);
+ rxin = rxout = 0;
+ }
+
+ uint8_t regs[9];
+ uint8_t txbuf;
+ uint8_t rxbuf;
emu_timer * timer;
- uint8_t rxbuffer[256];
- uint32_t rxin, rxout;
+ uint8_t rxbuffer[256];
+ uint32_t rxin, rxout;
write8smo_delegate tx_cb;
};
@@ -492,8 +509,8 @@ protected:
emu_timer * m_fit_timer;
emu_timer * m_pit_timer;
emu_timer * m_wdog_timer;
- uint32_t m_pit_reload;
- uint32_t m_irqstate;
+ uint32_t m_pit_reload;
+ uint32_t m_irqstate;
emu_timer * m_buffered_dma_timer[4];
int m_buffered_dma_rate[4];
@@ -506,6 +523,7 @@ protected:
uint32_t m_serial_clock;
uint64_t m_tb_zero_cycles;
uint64_t m_dec_zero_cycles;
+ uint64_t m_rtc_zero_cycles;
emu_timer * m_decrementer_int_timer;
@@ -693,9 +711,6 @@ private:
//{
//public:
// ppc403_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-//
-//protected:
-// virtual uint32_t execute_input_lines() const noexcept { return 8; }
//};
//
//
@@ -703,9 +718,6 @@ private:
//{
//public:
// ppc405_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-//
-//protected:
-// virtual uint32_t execute_input_lines() const noexcept { return 8; }
//};
@@ -748,6 +760,9 @@ class ppc601_device : public ppc_device
{
public:
ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
};
@@ -783,11 +798,10 @@ public:
uint8_t ppc4xx_spu_r(offs_t offset);
void ppc4xx_spu_w(offs_t offset, uint8_t data);
- void internal_ppc4xx(address_map &map);
+ void internal_ppc4xx(address_map &map) ATTR_COLD;
protected:
ppc4xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, powerpc_flavor flavor, uint32_t cap, uint32_t tb_divisor);
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual void execute_set_input(int inputnum, int state) override;
};
diff --git a/src/devices/cpu/powerpc/ppc_dasm.h b/src/devices/cpu/powerpc/ppc_dasm.h
index 6aad80c62d2..1f5ff6dba00 100644
--- a/src/devices/cpu/powerpc/ppc_dasm.h
+++ b/src/devices/cpu/powerpc/ppc_dasm.h
@@ -30,8 +30,8 @@ public:
I_POWERPC = 1 << 1,
};
- powerpc_disassembler(bool powerpc = true)
- : m_implementation(powerpc ? I_POWERPC : I_POWER)
+ powerpc_disassembler(implementation impl = I_POWERPC)
+ : m_implementation(impl)
{
};
virtual ~powerpc_disassembler() = default;
@@ -157,7 +157,7 @@ class power_disassembler : public powerpc_disassembler
{
public:
power_disassembler()
- : powerpc_disassembler(false)
+ : powerpc_disassembler(implementation::I_POWER)
{
};
};
diff --git a/src/devices/cpu/powerpc/ppccom.cpp b/src/devices/cpu/powerpc/ppccom.cpp
index b0e4b583955..4e76a3efbb2 100644
--- a/src/devices/cpu/powerpc/ppccom.cpp
+++ b/src/devices/cpu/powerpc/ppccom.cpp
@@ -281,10 +281,16 @@ mpc8240_device::mpc8240_device(const machine_config &mconfig, const char *tag, d
}
ppc601_device::ppc601_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : ppc_device(mconfig, PPC601, tag, owner, clock, 32, 64, PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_MFIOC | PPCCAP_601BAT, 0/* no TB */, address_map_constructor())
+ : ppc_device(mconfig, PPC601, tag, owner, clock, 32, 64, PPC_MODEL_601, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_MFIOC | PPCCAP_601BAT | PPCCAP_LEGACY_POWER, 0 /* no TB */, address_map_constructor())
{
}
+std::unique_ptr<util::disasm_interface> ppc601_device::create_disassembler()
+{
+ // 601 has both POWER and PowerPC instructions
+ return std::make_unique<powerpc_disassembler>((powerpc_disassembler::implementation)(powerpc_disassembler::I_POWER|powerpc_disassembler::I_POWERPC));
+}
+
ppc604_device::ppc604_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ppc_device(mconfig, PPC604, tag, owner, clock, 32, 64, PPC_MODEL_604, PPCCAP_OEA | PPCCAP_VEA | PPCCAP_FPU | PPCCAP_MISALIGNED | PPCCAP_604_MMU, 4, address_map_constructor())
{
@@ -505,8 +511,7 @@ static inline int is_qnan_double(double x)
{
uint64_t xi = *(uint64_t*)&x;
return( ((xi & DOUBLE_EXP) == DOUBLE_EXP) &&
- ((xi & 0x0007fffffffffffU) == 0x000000000000000U) &&
- ((xi & 0x000800000000000U) == 0x000800000000000U) );
+ ((xi & 0x0008000000000000U) == 0x0008000000000000U) );
}
@@ -714,7 +719,7 @@ void ppc_device::device_start()
m_sebr = 0;
m_ser = 0;
- memset(&m_spu, 0, sizeof(m_spu));
+ m_spu.clear();
m_pit_reload = 0;
m_irqstate = 0;
memset(m_buffered_dma_rate, 0, sizeof(m_buffered_dma_rate));
@@ -722,6 +727,7 @@ void ppc_device::device_start()
m_cpu_clock = 0;
m_tb_zero_cycles = 0;
m_dec_zero_cycles = 0;
+ m_rtc_zero_cycles = 0;
m_arg1 = 0;
m_fastram_select = 0;
@@ -832,6 +838,11 @@ void ppc_device::device_start()
state_add(PPC_PC, "PC", m_core->pc).formatstr("%08X");
state_add(PPC_MSR, "MSR", m_core->msr).formatstr("%08X");
state_add(PPC_CR, "CR", m_debugger_temp).callimport().callexport().formatstr("%08X");
+ // If the legacy POWER instructions exist, that implies MQ is used and should be shown
+ if (m_cap & PPCCAP_LEGACY_POWER)
+ {
+ state_add(PPC_MQ, "MQ", m_core->spr[SPR601_MQ]).formatstr("%08X");
+ }
state_add(PPC_LR, "LR", m_core->spr[SPR_LR]).formatstr("%08X");
state_add(PPC_CTR, "CTR", m_core->spr[SPR_CTR]).formatstr("%08X");
state_add(PPC_XER, "XER", m_debugger_temp).callimport().callexport().formatstr("%08X");
@@ -1220,7 +1231,7 @@ void ppc_device::device_reset()
std::unique_ptr<util::disasm_interface> ppc_device::create_disassembler()
{
- return std::make_unique<powerpc_disassembler>();
+ return std::make_unique<powerpc_disassembler>(powerpc_disassembler::I_POWERPC);
}
@@ -1296,8 +1307,6 @@ uint32_t ppc_device::ppccom_translate_address_internal(int intention, bool debug
uint32_t lower = m_core->spr[SPROEA_IBAT0U + 2*batnum + 1];
int privbit = ((intention & TR_USER) == 0) ? 3 : 2;
-// printf("bat %d upper = %08x privbit %d\n", batnum, upper, privbit);
-
// is this pair valid?
if (lower & 0x40)
{
@@ -1634,6 +1643,29 @@ void ppc_device::ppccom_execute_mfspr()
}
}
+ /* handle 601 specific SPRs (POWER holdovers) */
+ if (m_flavor == PPC_MODEL_601)
+ {
+ switch (m_core->param0)
+ {
+ case SPR601_PWRDEC:
+ m_core->param1 = get_decrementer();
+ return;
+
+ case SPR601_RTCUR_PWR:
+ m_core->param1 = (total_cycles() - m_rtc_zero_cycles) / clock();
+ return;
+
+ case SPR601_RTCLR_PWR:
+ {
+ const uint64_t remainder = (total_cycles() - m_rtc_zero_cycles) % clock();
+ const double seconds = remainder / clock(); // get fractional seconds
+ m_core->param1 = (uint64_t)(seconds * 1'000'000'000); // and convert to nanoseconds
+ }
+ return;
+ }
+ }
+
/* handle 602 SPRs */
if (m_flavor == PPC_MODEL_602)
{ // TODO: Which are read/write only?
@@ -1777,6 +1809,21 @@ void ppc_device::ppccom_execute_mtspr()
}
}
+ /* handle 601 specific POWER-holdover SPRs */
+ if (m_flavor == PPC_MODEL_601)
+ {
+ switch (m_core->param0)
+ {
+ case SPR601_MQ:
+ m_core->spr[m_core->param0] = m_core->param1;
+ return;
+
+ case SPR601_RTCUW_PWR:
+ m_rtc_zero_cycles = total_cycles();
+ break;
+ }
+ }
+
/* handle 602 SPRs */
if (m_flavor == PPC_MODEL_602)
{
diff --git a/src/devices/cpu/powerpc/ppccom.h b/src/devices/cpu/powerpc/ppccom.h
index 00852c48b57..da12935a5cc 100644
--- a/src/devices/cpu/powerpc/ppccom.h
+++ b/src/devices/cpu/powerpc/ppccom.h
@@ -65,6 +65,7 @@
#define PPCCAP_601BAT 0x80 /* TRUE if we're doing 601-style BATs (unified I/D, different bit layout) */
#define PPCCAP_604_MMU 0x100 /* TRUE if we have 604-class MMU features */
#define PPCCAP_750_TLB 0x200 /* TRUE if we have the extended 740/750 series TLB */
+#define PPCCAP_LEGACY_POWER 0x400 /* TRUE if we support the legacy POWER instructions */
/* exception types */
enum
@@ -171,6 +172,14 @@ enum
SPR4XX_PBL2 = 0x3fe, /* R/W 403GA 406GA Protection Bound Lower 2 */
SPR4XX_PBU2 = 0x3ff, /* R/W 403GA 406GA Protection Bound Upper 2 */
+ /* PowerPC 601 POWER back compatibility SPR indexes */
+ SPR601_MQ = 0x000, /* R/W Muliplicand/Quotient for 601 POWER instructions */
+ SPR601_RTCUR_PWR = 0x004, /* R Counts up number set in SPR 20 once per second, POWER only */
+ SPR601_RTCLR_PWR = 0x005, /* R Number of nanoseconds between the seconds counted in SPR 4 */
+ SPR601_PWRDEC = 0x006, /* R Decrementer register mirror for POWER compatibilty */
+ SPR601_RTCUW_PWR = 0x014, /* W Seconds counter, set here and read SPR 4 */
+ SPR601_RTCLW_PWR = 0x015, /* W Nanoseconds counter, not clear what writing here does */
+
/* PowerPC 602 SPR register indexes */
SPR602_TCR = 0x3d8, /* 602 */
SPR602_IBR = 0x3da, /* 602 */
@@ -198,7 +207,6 @@ enum
SPR603_HID2 = 0x3f3 /* R/W 603 */
};
-
/* PowerPC 4XX DCR register indexes */
enum
{
diff --git a/src/devices/cpu/powerpc/ppcdrc.cpp b/src/devices/cpu/powerpc/ppcdrc.cpp
index 0c62dec346a..b9c7484f1f9 100644
--- a/src/devices/cpu/powerpc/ppcdrc.cpp
+++ b/src/devices/cpu/powerpc/ppcdrc.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Aaron Giles
/***************************************************************************
- ppcdrc.c
+ ppcdrc.cpp
Universal machine language-based PowerPC emulator.
@@ -1021,32 +1021,30 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
/* check for unaligned accesses and break into two */
if (!ismasked && size != 1)
{
- /* in little-endian mode, anything misaligned generates an exception */
if ((mode & MODE_LITTLE_ENDIAN) || masked == nullptr || !(m_cap & PPCCAP_MISALIGNED))
{
+ /* in little-endian mode, anything misaligned generates an exception */
UML_TEST(block, I0, size - 1); // test i0,size-1
- UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
+ UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
}
-
- /* in big-endian mode, it's more complicated */
else
{
- /* 8-byte accesses must be word-aligned */
+ /* in big-endian mode, it's more complicated */
if (size == 8)
{
+ /* 8-byte accesses must be word-aligned */
UML_TEST(block, I0, 3); // test i0,3
- UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
+ UML_JMPc(block, COND_NZ, alignex = label++); // jmp alignex,nz
/* word aligned accesses need to be broken up */
UML_TEST(block, I0, 4); // test i0,4
UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned, nz
}
-
- /* unaligned 2 and 4 byte accesses need to be broken up */
else
{
+ /* unaligned 2 and 4 byte accesses need to be broken up */
UML_TEST(block, I0, size - 1); // test i0,size-1
- UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned,nz
+ UML_JMPc(block, COND_NZ, unaligned = label++); // jmp unaligned,nz
}
}
}
@@ -1054,18 +1052,18 @@ void ppc_device::static_generate_memory_accessor(int mode, int size, int iswrite
/* general case: assume paging and perform a translation */
if (((m_cap & PPCCAP_OEA) && (mode & MODE_DATA_TRANSLATION)) || (iswrite && (m_cap & PPCCAP_4XX) && (mode & MODE_PROTECTION)))
{
- UML_SHR(block, I3, I0, 12); // shr i3,i0,12
- UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4);// load i3,[vtlb],i3,dword
- UML_TEST(block, I3, (uint64_t)1 << translate_type); // test i3,1 << translate_type
- UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
- UML_LABEL(block, tlbreturn = label++); // tlbreturn:
- UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
+ UML_SHR(block, I3, I0, 12); // shr i3,i0,12
+ UML_LOAD(block, I3, (void *)vtlb_table(), I3, SIZE_DWORD, SCALE_x4); // load i3,[vtlb],i3,dword
+ UML_TEST(block, I3, (uint64_t)1 << translate_type); // test i3,1 << translate_type
+ UML_JMPc(block, COND_Z, tlbmiss = label++); // jmp tlbmiss,z
+ UML_LABEL(block, tlbreturn = label++); // tlbreturn:
+ UML_ROLINS(block, I0, I3, 0, 0xfffff000); // rolins i0,i3,0,0xfffff000
}
else if (m_cap & PPCCAP_4XX)
UML_AND(block, I0, I0, 0x7fffffff); // and i0,i0,0x7fffffff
UML_XOR(block, I0, I0, (mode & MODE_LITTLE_ENDIAN) ? (8 - size) : 0); // xor i0,i0,8-size
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
for (ramnum = 0; ramnum < PPC_MAX_FASTRAM; ramnum++)
if (m_fastram[ramnum].base != nullptr && (!iswrite || !m_fastram[ramnum].readonly))
{
@@ -1713,7 +1711,7 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta
}
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block); // <save fastregs>
@@ -1746,12 +1744,12 @@ void ppc_device::generate_sequence_instruction(drcuml_block &block, compiler_sta
UML_EXH(block, *m_tlb_mismatch, 0); // exh tlb_mismatch,0
}
- /* validate our TLB entry at this PC; if we fail, we need to handle it */
- if ((desc->flags & OPFLAG_VALIDATE_TLB) && (m_core->mode & MODE_DATA_TRANSLATION))
+ // validate our TLB entry at this PC; if we fail, we need to handle it
+ // TODO: this code is highly sus based on the PPC architecture manual, but I'll only disable for 601 for now
+ if ((desc->flags & OPFLAG_VALIDATE_TLB) && (m_core->mode & MODE_DATA_TRANSLATION) && !(m_cap & PPCCAP_601BAT))
{
const vtlb_entry *tlbtable = vtlb_table();
- /* if we currently have a valid TLB read entry, we just verify */
if (tlbtable[desc->pc >> 12] != 0)
{
if (PRINTF_MMU)
@@ -2024,6 +2022,23 @@ bool ppc_device::generate_opcode(drcuml_block &block, compiler_state *compiler,
// muls rd,rd,ra,simm
return true;
+ case 0x9: /* DOZI (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ UML_AND(block, I0, op, 0xffff);
+ UML_CMP(block, R32(G_RA(op)), I0); // cmp ra, I0
+ UML_JMPc(block, COND_B, compiler->labelnum); // bae 0:
+
+ UML_XOR(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RD(op))); // xor rd, rd, rd (rd = 0)
+ UML_JMP(block, compiler->labelnum + 1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), I0);
+ UML_ADD(block, R32(G_RD(op)), R32(G_RD(op)), 0x1);
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ return true;
+
case 0x0e: /* ADDI */
UML_ADD(block, R32(G_RD(op)), R32Z(G_RA(op)), (int16_t)G_SIMM(op)); // add rd,ra,simm
return true;
@@ -2681,10 +2696,19 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co
case 0x0eb: /* MULLWx */
case 0x2eb: /* MULLWOx */
- UML_MULS(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // muls rd,rd,ra,rb
+ // The flags are calculated based on the resulting 32-bit value from the 32x32=32 multiplication
+ // reference: example 4 https://www.ibm.com/docs/en/aix/7.2?topic=set-mullw-muls-multiply-low-word-instruction
+ UML_MULSLW(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // mulslw rd,ra,rb
generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), false);// <update flags>
return true;
+ case 0x6b: /* MUL (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ UML_MULU(block, SPR32(SPR601_MQ), R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op))); // mulu mq, rd, ra, rb
+ generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV | XER_SO : 0), false); // <update flags>
+ return true;
+
case 0x1cb: /* DIVWUx */
case 0x3cb: /* DIVWUOx */
UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
@@ -2712,6 +2736,68 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co
UML_LABEL(block, compiler->labelnum++); // 1:
return true;
+ case 0x14b: /* DIV (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ UML_MOV(block, I0, R32(G_RA(op)));
+ UML_MOV(block, I1, SPR32(SPR601_MQ));
+ UML_DSHL(block, I0, I0, 32); // I0 = RA << 32
+ UML_DOR(block, I0, I0, I1); // I0 |= MQ
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
+
+ UML_MOV(block, R32(G_RD(op)), 0x0); // mov rd, #0
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+
+ UML_JMP(block, compiler->labelnum + 1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++);
+ UML_MOV(block, I1, R32(G_RB(op)));
+ UML_DSEXT(block, I1, I1, SIZE_DWORD);
+ UML_DDIVS(block, I0, I1, I0, I1);
+ UML_MOV(block, R32(G_RD(op)), I0);
+ UML_MOV(block, SPR32(SPR601_MQ), I1);
+ generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV | XER_SO : 0), false); // <update flags>
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ return true;
+
+ case 0x16b: /* DIVS (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
+ UML_JMPc(block, COND_NZ, compiler->labelnum); // bne 0:
+
+ UML_MOV(block, R32(G_RD(op)), 0x0); // mov rd, #0
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_MOV(block, CR32(0), 0x2); // CR = EQ
+ UML_AND(block, CR32(0), CR32(0), ~0x1);
+ UML_OR(block, CR32(0), CR32(0), XERSO32);
+ }
+
+ UML_JMP(block, compiler->labelnum + 1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_DIVS(block, R32(G_RD(op)), SPR32(SPR601_MQ), R32(G_RA(op)), R32(G_RB(op))); // divs rd,mq,ra,rb
+ generate_compute_flags(block, desc, op & M_RC, ((op & M_OE) ? XER_OV : 0), false); // <update flags>
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ return true;
+
case 0x1eb: /* DIVWx */
case 0x3eb: /* DIVWOx */
UML_CMP(block, R32(G_RB(op)), 0x0); // cmp rb, #0
@@ -2765,6 +2851,78 @@ bool ppc_device::generate_instruction_1f(drcuml_block &block, compiler_state *co
UML_LABEL(block, compiler->labelnum++); // 3:
return true;
+ case 0x108: /* DOZ (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ UML_CMP(block, R32(G_RA(op)), R32(G_RB(op))); // cmp ra, rb
+ UML_JMPc(block, COND_B, compiler->labelnum); // bae 0:
+
+ UML_XOR(block, R32(G_RD(op)), R32(G_RD(op)), R32(G_RD(op))); // xor rd, rd, rd (rd = 0)
+ UML_JMP(block, compiler->labelnum+1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_ADD(block, R32(G_RD(op)), R32(G_RA(op)), R32(G_RB(op)));
+ UML_ADD(block, R32(G_RD(op)), R32(G_RD(op)), 0x1);
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ if (op & M_OE)
+ {
+ UML_OR(block, XERSO32, XERSO32, 0x1); // SO |= 1
+ UML_OR(block, SPR32(SPR_XER), SPR32(SPR_XER), XER_OV); // OV |= 1
+ }
+ if (op & M_RC)
+ {
+ UML_TEST(block, R32(G_RD(op)), ~0); // test rd,~0
+ generate_compute_flags(block, desc, op & M_RC, 0, false); // <update flags>
+ }
+ return true;
+
+ case 0x168: /* ABS (POWER) */
+ case 0x1e8: /* NABS (POWER) */
+ assert(m_cap & PPCCAP_LEGACY_POWER);
+
+ // is rA already the correct sign (positive for ABS, negative for NABS)?
+ UML_CMP(block, R32(G_RA(op)), 0);
+ if (op & 0x080)
+ {
+ UML_JMPc(block, COND_L, compiler->labelnum); // bl 0:
+ }
+ else
+ {
+ UML_JMPc(block, COND_GE, compiler->labelnum); // bge 0:
+ }
+
+ UML_SUB(block, I0, 0, R32(G_RA(op))); // sub 0, ra (make positive)
+ UML_JMP(block, compiler->labelnum + 1); // jmp 1:
+
+ UML_LABEL(block, compiler->labelnum++); // 0:
+ UML_MOV(block, I0, R32(G_RA(op)));
+
+ UML_LABEL(block, compiler->labelnum++); // 1:
+ UML_MOV(block, R32(G_RD(op)), I0); // mov rd, I0
+ if (op & M_RC)
+ {
+ UML_GETFLGS(block, I0, FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
+ UML_LOAD(block, I0, m_cmp_cr_table, I0, SIZE_DWORD, SCALE_x4); // load i0,cmp_cr_table,i0,dword
+ }
+ if (op & M_OE)
+ {
+ UML_OR(block, CR32(G_CRFD(op)), I0, XERSO32); // or [crn],i0,[xerso]
+ }
+ return true;
+
+ case 0x21d: /* MASKIR (POWER) */
+ UML_AND(block, I0, R32(G_RS(op)), R32(G_RB(op))); // and i0, rs, rb
+ UML_XOR(block, I1, R32(G_RB(op)), 0xffffffff); // xor i1, rb, 0xffffffff
+ UML_AND(block, I1, I1, R32(G_RA(op))); // and i1, i1, ra
+ UML_OR(block, R32(G_RA(op)), I0, I1); // or ra, i0, i1
+ if (op & M_RC)
+ {
+ UML_GETFLGS(block, R32(G_RA(op)), FLAG_Z | FLAG_V | FLAG_C | FLAG_S); // getflgs i0,zvcs
+ UML_LOAD(block, I0, m_cmp_cr_table, I0, SIZE_DWORD, SCALE_x4); // load i0,cmp_cr_table,i0,dword
+ }
+ return true;
+
case 0x01c: /* ANDx */
UML_AND(block, R32(G_RA(op)), R32(G_RS(op)), R32(G_RB(op))); // and ra,rs,rb
generate_compute_flags(block, desc, op & M_RC, 0, false); // <update flags>
diff --git a/src/devices/cpu/powerpc/ppcfe.cpp b/src/devices/cpu/powerpc/ppcfe.cpp
index 57ec36cd317..1e8fb105ee1 100644
--- a/src/devices/cpu/powerpc/ppcfe.cpp
+++ b/src/devices/cpu/powerpc/ppcfe.cpp
@@ -119,6 +119,16 @@ bool ppc_device::frontend::describe(opcode_desc &desc, const opcode_desc *prev)
desc.cycles = 2; // ???
return true;
+ case 0x09: // DOZI (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED_OR_ZERO(desc, G_RA(op));
+ GPR_MODIFIED(desc, G_RD(op));
+ return true;
+
case 0x0e: // ADDI
case 0x0f: // ADDIS
GPR_USED_OR_ZERO(desc, G_RA(op));
@@ -1156,6 +1166,81 @@ bool ppc_device::frontend::describe_1f(uint32_t op, opcode_desc &desc, const opc
return false;
desc.flags |= OPFLAG_CAN_CHANGE_MODES | OPFLAG_CAN_CAUSE_EXCEPTION | OPFLAG_END_SEQUENCE;
return true;
+
+ case 0x14b: // DIV (POWER)
+ case 0x16b: // DIVS (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED(desc, G_RA(op));
+ GPR_USED(desc, G_RB(op));
+ GPR_MODIFIED(desc, G_RD(op));
+ XER_OV_MODIFIED(desc);
+ XER_SO_MODIFIED(desc);
+ if (op & M_RC)
+ CR_MODIFIED(desc, 0);
+ return true;
+
+ case 0x6b: // MUL (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED(desc, G_RA(op));
+ GPR_USED(desc, G_RB(op));
+ GPR_MODIFIED(desc, G_RD(op));
+ XER_OV_MODIFIED(desc);
+ XER_SO_MODIFIED(desc);
+ if (op & M_RC)
+ CR_MODIFIED(desc, 0);
+ return true;
+
+ case 0x108: // DOZ (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED(desc, G_RA(op));
+ GPR_USED(desc, G_RB(op));
+ GPR_MODIFIED(desc, G_RD(op));
+ XER_OV_MODIFIED(desc);
+ XER_SO_MODIFIED(desc);
+ if (op & M_RC)
+ CR_MODIFIED(desc, 0);
+ return true;
+
+ case 0x168: // ABS (POWER)
+ case 0x1e8: // NABS (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED(desc, G_RA(op));
+ GPR_USED(desc, G_RB(op));
+ GPR_MODIFIED(desc, G_RD(op));
+ XER_OV_MODIFIED(desc);
+ XER_SO_MODIFIED(desc);
+ if (op & M_RC)
+ CR_MODIFIED(desc, 0);
+ return true;
+
+ case 0x21d: // MASKIR (POWER)
+ if (!(m_ppc.m_cap & PPCCAP_LEGACY_POWER))
+ {
+ return false;
+ }
+
+ GPR_USED(desc, G_RS(op));
+ GPR_USED(desc, G_RB(op));
+ GPR_MODIFIED(desc, G_RA(op));
+ if (op & M_RC)
+ CR_MODIFIED(desc, 0);
+ return true;
}
return false;
diff --git a/src/devices/cpu/pps4/pps4.cpp b/src/devices/cpu/pps4/pps4.cpp
index aaf83860407..fbf2f3a27ea 100644
--- a/src/devices/cpu/pps4/pps4.cpp
+++ b/src/devices/cpu/pps4/pps4.cpp
@@ -252,7 +252,7 @@ void pps4_device::iADC()
*/
void pps4_device::iADSK()
{
- m_A = m_A + M() + m_C; // This fixes the diagnostic test button, same as pinmame. It means ADSK and ADCSK are the same.
+ m_A = m_A + M();
//m_A += M();
m_C = (m_A > 15) ? 1 : 0;
m_Skip = m_C;
diff --git a/src/devices/cpu/pps4/pps4.h b/src/devices/cpu/pps4/pps4.h
index 4b9b82f37c0..2e4fcebd1c7 100644
--- a/src/devices/cpu/pps4/pps4.h
+++ b/src/devices/cpu/pps4/pps4.h
@@ -53,13 +53,12 @@ protected:
pps4_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 3; }
- virtual u32 execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -175,8 +174,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides (NOTE: these assume internal XTAL divider is always used)
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 18 - 1) / 18; }
diff --git a/src/devices/cpu/pps41/mm75.h b/src/devices/cpu/pps41/mm75.h
index 39a14245cae..92785d0d5ae 100644
--- a/src/devices/cpu/pps41/mm75.h
+++ b/src/devices/cpu/pps41/mm75.h
@@ -40,7 +40,7 @@ public:
mm75_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
// opcode handlers
virtual void op_ios() override;
diff --git a/src/devices/cpu/pps41/mm76.cpp b/src/devices/cpu/pps41/mm76.cpp
index bb7d9cd7a53..d1eb8bac0ca 100644
--- a/src/devices/cpu/pps41/mm76.cpp
+++ b/src/devices/cpu/pps41/mm76.cpp
@@ -176,6 +176,7 @@ void mm76_device::execute_one()
}
break; // 0xfc
- }
+
+ } // 0xf0
}
}
diff --git a/src/devices/cpu/pps41/mm76.h b/src/devices/cpu/pps41/mm76.h
index 54db25fc93b..b984ad9c713 100644
--- a/src/devices/cpu/pps41/mm76.h
+++ b/src/devices/cpu/pps41/mm76.h
@@ -50,9 +50,9 @@ protected:
mm76_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -60,8 +60,8 @@ protected:
// device_execute_interface overrides
virtual void execute_one() override;
- void data_48x4(address_map &map);
- void program_0_6k(address_map &map);
+ void data_48x4(address_map &map) ATTR_COLD;
+ void program_0_6k(address_map &map) ATTR_COLD;
// opcode helpers
u8 ram_r();
@@ -147,7 +147,7 @@ public:
protected:
mm76e_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_1k(address_map &map);
+ void program_1k(address_map &map) ATTR_COLD;
};
class mm76el_device : public mm76e_device
diff --git a/src/devices/cpu/pps41/mm78.cpp b/src/devices/cpu/pps41/mm78.cpp
index 8512c8f3f07..dd875551fc8 100644
--- a/src/devices/cpu/pps41/mm78.cpp
+++ b/src/devices/cpu/pps41/mm78.cpp
@@ -207,7 +207,8 @@ void mm78_device::execute_one()
}
break; // 0xfc
- }
+
+ } // 0xf0
}
// TAB is delayed by 1 opcode (including a single TR)
diff --git a/src/devices/cpu/pps41/mm78.h b/src/devices/cpu/pps41/mm78.h
index d901d87988c..7676cd30226 100644
--- a/src/devices/cpu/pps41/mm78.h
+++ b/src/devices/cpu/pps41/mm78.h
@@ -51,8 +51,8 @@ protected:
mm78_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_add_mconfig(machine_config &config) override { ; }
// device_disasm_interface overrides
@@ -61,11 +61,11 @@ protected:
// device_execute_interface overrides
virtual void execute_one() override;
- void data_96x4(address_map &map);
- void data_128x4(address_map &map);
- void program_1_3k(address_map &map);
- void program_1_5k(address_map &map);
- void program_2k(address_map &map);
+ void data_96x4(address_map &map) ATTR_COLD;
+ void data_128x4(address_map &map) ATTR_COLD;
+ void program_1_3k(address_map &map) ATTR_COLD;
+ void program_1_5k(address_map &map) ATTR_COLD;
+ void program_2k(address_map &map) ATTR_COLD;
// opcode helpers
virtual bool op_is_eob(u8 op) override { return (op & 0xf8) == 0x08; }
diff --git a/src/devices/cpu/pps41/mm78la.h b/src/devices/cpu/pps41/mm78la.h
index a9c58ab4572..cdbcb1ac275 100644
--- a/src/devices/cpu/pps41/mm78la.h
+++ b/src/devices/cpu/pps41/mm78la.h
@@ -52,9 +52,9 @@ protected:
mm78la_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// opcode handlers
virtual void op_ioa() override;
@@ -83,9 +83,9 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// opcode handlers
virtual void op_ix() override;
diff --git a/src/devices/cpu/pps41/pps41base.h b/src/devices/cpu/pps41/pps41base.h
index 2d962b5a5d3..e97a8d39f33 100644
--- a/src/devices/cpu/pps41/pps41base.h
+++ b/src/devices/cpu/pps41/pps41base.h
@@ -59,15 +59,14 @@ protected:
pps41_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2; }
- virtual u32 execute_input_lines() const noexcept override { return 2; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
virtual void execute_one() = 0;
diff --git a/src/devices/cpu/pps41/pps41d.cpp b/src/devices/cpu/pps41/pps41d.cpp
index a4b91dd95cc..70e1401f87a 100644
--- a/src/devices/cpu/pps41/pps41d.cpp
+++ b/src/devices/cpu/pps41/pps41d.cpp
@@ -32,6 +32,25 @@ offs_t pps41_common_disassembler::increment_pc(offs_t pc)
// common lookup tables
+enum pps41_common_disassembler::e_mnemonics : unsigned
+{
+ // MM76/shared
+ mILL /* 0! */,
+ mXAB, mLBA, mLB, mEOB2,
+ mSB, mRB, mSKBF,
+ mXAS, mLSA,
+ mL, mX, mXDSK, mXNSK,
+ mA, mAC, mACSK, mASK, mCOM, mRC, mSC, mSKNC, mLAI, mAISK,
+ mRT, mRTSK, mT, mNOP, mTL, mTM, mTML, mTR,
+ mSKMEA, mSKBEI, mSKAEI,
+ mSOS, mROS, mSKISL, mIBM, mOB, mIAM, mOA, mIOS, mI1, mI2C, mINT1H, mDIN1, mINT0L, mDIN0, mSEG1, mSEG2,
+
+ // MM78 differences
+ mINT0H, mINT1L, mSAG, mEOB3, mTAB,
+ mI1SK, mIX, mOX, mLXA, mXAX, mIOA,
+ mTLB, mTMLB
+};
+
const char *const pps41_common_disassembler::s_name[] =
{
// MM76
diff --git a/src/devices/cpu/pps41/pps41d.h b/src/devices/cpu/pps41/pps41d.h
index 8075ef1f09b..5d61b5ebf7b 100644
--- a/src/devices/cpu/pps41/pps41d.h
+++ b/src/devices/cpu/pps41/pps41d.h
@@ -25,26 +25,7 @@ public:
virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x3f) | m_r2l[pc & 0x3f]; }
protected:
- // opcode mnemonics
- enum e_mnemonics
- {
- // MM76/shared
- mILL /* 0! */,
- mXAB, mLBA, mLB, mEOB2,
- mSB, mRB, mSKBF,
- mXAS, mLSA,
- mL, mX, mXDSK, mXNSK,
- mA, mAC, mACSK, mASK, mCOM, mRC, mSC, mSKNC, mLAI, mAISK,
- mRT, mRTSK, mT, mNOP, mTL, mTM, mTML, mTR,
- mSKMEA, mSKBEI, mSKAEI,
- mSOS, mROS, mSKISL, mIBM, mOB, mIAM, mOA, mIOS, mI1, mI2C, mINT1H, mDIN1, mINT0L, mDIN0, mSEG1, mSEG2,
-
- // MM78 differences
- mINT0H, mINT1L, mSAG, mEOB3, mTAB,
- mI1SK, mIX, mOX, mLXA, mXAX, mIOA,
- mTLB, mTMLB
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_name[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/psx/dma.cpp b/src/devices/cpu/psx/dma.cpp
index 64bb8f1c71e..d0c3836ea43 100644
--- a/src/devices/cpu/psx/dma.cpp
+++ b/src/devices/cpu/psx/dma.cpp
@@ -10,13 +10,19 @@
#include "emu.h"
#include "dma.h"
-#define LOG_CONTROL (1U << 1)
-#define LOG_INTERRUPT (1U << 2)
+#define LOG_READ (1U << 1)
+#define LOG_WRITE (1U << 2)
+#define LOG_DMA (1U << 3)
+#define LOG_IRQ (1U << 4)
-#define VERBOSE (0)
+//#define VERBOSE (LOG_READ | LOG_WRITE | LOG_DMA | LOG_IRQ)
+//#define LOG_OUTPUT_FUNC osd_printf_info
#include "logmacro.h"
-DEFINE_DEVICE_TYPE(PSX_DMA, psxdma_device, "psxdma", "Sony PSX DMA")
+#define LOGREAD(...) LOGMASKED(LOG_READ, __VA_ARGS__)
+#define LOGWRITE(...) LOGMASKED(LOG_WRITE, __VA_ARGS__)
+#define LOGDMA(...) LOGMASKED(LOG_DMA, __VA_ARGS__)
+#define LOGIRQ(...) LOGMASKED(LOG_IRQ, __VA_ARGS__)
psxdma_device::psxdma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
device_t(mconfig, PSX_DMA, tag, owner, clock), m_ram(), m_ramsize(0), m_dpcp(0), m_dicr(0),
@@ -31,69 +37,56 @@ void psxdma_device::device_reset()
for (int n = 0; n < 7; n++)
{
- // FIXME: proper reset values
- m_channel[n].n_channelcontrol = 0;
- m_channel[n].b_running = 0;
dma_stop_timer(n);
- }
-}
-
-void psxdma_device::device_post_load()
-{
- for (int n = 0; n < 7; n++)
- {
- dma_timer_adjust(n);
+ m_channel[n].n_channelcontrol = 0;
}
}
void psxdma_device::device_start()
{
- for( int index = 0; index < 7; index++ )
+ for (int index = 0; index < 7; index++)
{
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
- dma->timer = timer_alloc( FUNC( psxdma_device::dma_finished ), this );
+ dma->timer = timer_alloc(FUNC(psxdma_device::dma_finished), this);
+ dma->b_running = 0;
- save_item( NAME( dma->n_base ), index );
- save_item( NAME( dma->n_blockcontrol ), index );
- save_item( NAME( dma->n_channelcontrol ), index );
- save_item( NAME( dma->n_ticks ), index );
- save_item( NAME( dma->b_running ), index );
+ save_item(NAME(dma->n_base), index);
+ save_item(NAME(dma->n_blockcontrol), index);
+ save_item(NAME(dma->n_channelcontrol), index);
+ save_item(NAME(dma->n_ticks), index);
+ save_item(NAME(dma->b_running), index);
}
- save_item( NAME(m_dpcp) );
- save_item( NAME(m_dicr) );
+ save_item(NAME(m_dpcp));
+ save_item(NAME(m_dicr));
}
-void psxdma_device::dma_start_timer( int index, uint32_t n_ticks )
+void psxdma_device::dma_start_timer(int index, uint32_t n_ticks)
{
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
- dma->timer->adjust( attotime::from_hz(33868800) * n_ticks, index);
+ dma->timer->adjust(attotime::from_hz(33868800) * n_ticks, index);
dma->n_ticks = n_ticks;
dma->b_running = 1;
}
-void psxdma_device::dma_stop_timer( int index )
+void psxdma_device::dma_stop_timer(int index)
{
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
dma->timer->adjust(attotime::never);
dma->b_running = 0;
}
-void psxdma_device::dma_timer_adjust( int index )
+void psxdma_device::dma_timer_adjust(int index)
{
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
- if( dma->b_running )
- {
- dma_start_timer( index, dma->n_ticks );
- }
+ if (dma->b_running)
+ dma_start_timer(index, dma->n_ticks);
else
- {
- dma_stop_timer( index );
- }
+ dma_stop_timer(index);
}
void psxdma_device::dma_interrupt_update()
@@ -101,62 +94,85 @@ void psxdma_device::dma_interrupt_update()
int n_int;
int n_mask;
- n_int = ( m_dicr >> 24 ) & 0x7f;
- n_mask = ( m_dicr >> 16 ) & 0xff;
+ n_int = (m_dicr >> 24) & 0x7f;
+ n_mask = (m_dicr >> 16) & 0xff;
- if( ( n_mask & 0x80 ) != 0 && ( n_int & n_mask ) != 0 )
+ if ((n_mask & 0x80) != 0 && (n_int & n_mask) != 0)
{
- LOGMASKED( LOG_INTERRUPT, "dma_interrupt_update( %02x, %02x ) interrupt triggered\n", machine().describe_context(), n_int, n_mask );
+ LOGIRQ("dma_interrupt_update( %02x, %02x ) interrupt triggered\n", machine().describe_context(), n_int, n_mask);
m_dicr |= 0x80000000;
m_irq_handler(1);
}
- else if( n_int != 0 )
+ else if (n_int != 0)
{
- LOGMASKED( LOG_INTERRUPT, "dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", machine().describe_context(), n_int, n_mask );
+ LOGIRQ("dma_interrupt_update( %02x, %02x ) interrupt not enabled\n", machine().describe_context(), n_int, n_mask);
}
- m_dicr &= 0x00ffffff | ( m_dicr << 8 );
+ m_dicr &= 0x00ffffff | (m_dicr << 8);
}
-TIMER_CALLBACK_MEMBER( psxdma_device::dma_finished )
+TIMER_CALLBACK_MEMBER(psxdma_device::dma_finished)
{
- const int index = param;
- psx_dma_channel *dma = &m_channel[ index ];
+ int const index = param;
+ psx_dma_channel *dma = &m_channel[index];
+
+ if (dma->n_channelcontrol == 0x01000201)
+ {
+ int32_t n_size;
+ uint32_t n_address;
+ uint32_t n_adrmask;
+
+ n_adrmask = m_ramsize - 1;
+ n_address = (dma->n_base & n_adrmask);
+ n_size = dma->n_blockcontrol;
+ if ((dma->n_channelcontrol & 0x200) != 0)
+ {
+ uint32_t n_ba;
+ n_ba = dma->n_blockcontrol >> 16;
+ if (n_ba == 0)
+ {
+ n_ba = 0x10000;
+ }
+ n_size = (n_size & 0xffff) * n_ba;
+ }
- if( dma->n_channelcontrol == 0x01000401 && index == 2 )
+ LOGDMA("%s dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
+ dma->fn_write(m_ram, n_address, n_size);
+ }
+ else if (dma->n_channelcontrol == 0x01000401 && index == 2)
{
uint32_t n_size;
uint32_t n_total;
- uint32_t n_address = ( dma->n_base & 0xffffff );
+ uint32_t n_address = (dma->n_base & 0xffffff);
uint32_t n_adrmask = m_ramsize - 1;
uint32_t n_nextaddress;
- if( n_address != 0xffffff )
+ if (n_address != 0xffffff)
{
n_total = 0;
- for( ;; )
+ for (;; )
{
- if( n_address == 0xffffff )
+ if (n_address == 0xffffff)
{
dma->n_base = n_address;
//HACK: fixes pse bios 2.x & other texture uploading issues, breaks kdeadeye test mode, gtrfrk7m & gtrkfrk8m loading
//dma_start_timer( index, 19000 );
- dma_start_timer( index, 500 );
+ dma_start_timer(index, 500);
return;
}
- if( n_total > 65535 )
+ if (n_total > 65535)
{
dma->n_base = n_address;
//FIXME:
// 16000 below is based on try and error.
// Mametesters.org: sfex20103red
//dma_start_timer( index, 16 );
- dma_start_timer( index, 16000 );
+ dma_start_timer(index, 16000);
return;
}
n_address &= n_adrmask;
- n_nextaddress = m_ram[ n_address / 4 ];
+ n_nextaddress = m_ram[n_address / 4];
n_size = n_nextaddress >> 24;
- dma->fn_write( m_ram, n_address + 4, n_size );
+ dma->fn_write(m_ram, n_address + 4, n_size);
//FIXME:
// The following conditions will cause an endless loop.
// If stopping the transfer is correct I cannot judge
@@ -165,57 +181,61 @@ TIMER_CALLBACK_MEMBER( psxdma_device::dma_finished )
// Mametesters.org: psyforce0105u5red, raystorm0111u1red
if ((n_nextaddress & 0xffffff) != 0xffffff)
{
- if (n_address == m_ram[ (n_nextaddress & n_adrmask) / 4] ||
- n_address == (n_nextaddress & n_adrmask) )
+ if (n_address == m_ram[(n_nextaddress & n_adrmask) / 4] ||
+ n_address == (n_nextaddress & n_adrmask))
{
break;
}
}
- n_address = ( n_nextaddress & 0xffffff );
+ n_address = (n_nextaddress & 0xffffff);
- n_total += ( n_size + 1 );
+ n_total += (n_size + 1);
}
}
}
- dma->n_channelcontrol &= ~( ( 1L << 0x18 ) | ( 1L << 0x1c ) );
+ dma->n_channelcontrol &= ~((1L << 0x18) | (1L << 0x1c));
- m_dicr |= 1 << ( 24 + index );
+ m_dicr |= 1 << (24 + index);
dma_interrupt_update();
- dma_stop_timer( index );
+ dma_stop_timer(index);
}
-void psxdma_device::install_read_handler( int index, read_delegate p_fn_dma_read )
+void psxdma_device::install_read_handler(int index, read_delegate p_fn_dma_read)
{
- m_channel[ index ].fn_read = p_fn_dma_read;
+ m_channel[index].fn_read = p_fn_dma_read;
}
-void psxdma_device::install_write_handler( int index, write_delegate p_fn_dma_write )
+void psxdma_device::install_write_handler(int index, write_delegate p_fn_dma_write)
{
- m_channel[ index ].fn_write = p_fn_dma_write;
+ m_channel[index].fn_write = p_fn_dma_write;
}
void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
{
int index = offset / 4;
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
- if( index < 7 )
+ if (index < 7)
{
- switch( offset % 4 )
+ switch (offset % 4)
{
case 0:
- LOGMASKED( LOG_CONTROL, "%s: dmabase( %d ) = %08x\n", machine().describe_context(), index, data );
+ LOGWRITE("%s dmabase( %d ) = %08x\n", machine().describe_context(), index, data);
dma->n_base = data;
break;
+
case 1:
- LOGMASKED( LOG_CONTROL, "%s: dmablockcontrol( %d ) = %08x\n", machine().describe_context(), index, data );
+ LOGWRITE("%s dmablockcontrol( %d ) = %08x\n", machine().describe_context(), index, data);
dma->n_blockcontrol = data;
break;
+
case 2:
- LOGMASKED( LOG_CONTROL, "%s: dmachannelcontrol( %d ) = %08x\n", machine().describe_context(), index, data );
+ case 3:
+ LOGWRITE("%s dmachannelcontrol( %d ) = %08x\n", machine().describe_context(), index, data);
dma->n_channelcontrol = data;
- if( ( dma->n_channelcontrol & ( 1L << 0x18 ) ) != 0 && ( m_dpcp & ( 1 << ( 3 + ( index * 4 ) ) ) ) != 0 )
+
+ if ((dma->n_channelcontrol & (1L << 0x18)) != 0 && (m_dpcp & (1 << (3 + (index * 4)))) != 0)
{
int32_t n_size;
uint32_t n_address;
@@ -224,141 +244,129 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
n_adrmask = m_ramsize - 1;
- n_address = ( dma->n_base & n_adrmask );
+ n_address = (dma->n_base & n_adrmask);
n_size = dma->n_blockcontrol;
- if( ( dma->n_channelcontrol & 0x200 ) != 0 )
+ if ((dma->n_channelcontrol & 0x200) != 0)
{
uint32_t n_ba;
n_ba = dma->n_blockcontrol >> 16;
- if( n_ba == 0 )
- {
+ if (n_ba == 0)
n_ba = 0x10000;
- }
- n_size = ( n_size & 0xffff ) * n_ba;
+ n_size = (n_size & 0xffff) * n_ba;
}
- if( dma->n_channelcontrol == 0x01000000 &&
- !dma->fn_read.isnull() )
+ if (dma->n_channelcontrol == 0x01000000 &&
+ !dma->fn_read.isnull())
{
- LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
- dma->fn_read( m_ram, n_address, n_size );
- dma_finished( index );
+ LOGDMA("%s dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
+ dma->fn_read(m_ram, n_address, n_size);
+ dma_finished(index);
}
else if ((dma->n_channelcontrol & 0xffbffeff) == 0x11000000 && // CD DMA
- !dma->fn_read.isnull() )
+ !dma->fn_read.isnull())
{
- LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
+ LOGDMA("%s dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
// pSX's CD DMA size calc formula
- int oursize = (dma->n_blockcontrol>>16);
+ int oursize = (dma->n_blockcontrol >> 16);
oursize = (oursize > 1) ? oursize : 1;
- oursize *= (dma->n_blockcontrol&0xffff);
+ oursize *= (dma->n_blockcontrol & 0xffff);
- dma->fn_read( m_ram, n_address, oursize );
- dma_finished( index );
+ dma->fn_read(m_ram, n_address, oursize);
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x01000200 &&
- !dma->fn_read.isnull() )
+ else if (dma->n_channelcontrol == 0x01000200 &&
+ !dma->fn_read.isnull())
{
- LOG( "%s: dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
- dma->fn_read( m_ram, n_address, n_size );
- if( index == 1 )
- {
- dma_start_timer( index, 26000 );
- }
+ LOGDMA("%s dma %d read block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
+ dma->fn_read(m_ram, n_address, n_size);
+ if (index == 1)
+ dma_start_timer(index, 26000);
else
- {
- dma_finished( index );
- }
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x01000201 &&
- !dma->fn_write.isnull() )
+ else if (dma->n_channelcontrol == 0x01000201 &&
+ !dma->fn_write.isnull())
{
- LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
- dma->fn_write( m_ram, n_address, n_size );
- dma_finished( index );
+ if (index == 4)
+ dma_start_timer(index, 24000);
+ else
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x11050100 &&
- !dma->fn_write.isnull() )
+ else if (dma->n_channelcontrol == 0x11050100 &&
+ !dma->fn_write.isnull())
{
/* todo: check this is a write not a read... */
- LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
- dma->fn_write( m_ram, n_address, n_size );
- dma_finished( index );
+ LOGDMA("%s dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
+ dma->fn_write(m_ram, n_address, n_size);
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x11150100 &&
- !dma->fn_write.isnull() )
+ else if (dma->n_channelcontrol == 0x11150100 &&
+ !dma->fn_write.isnull())
{
/* todo: check this is a write not a read... */
- LOG( "%s: dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size );
- dma->fn_write( m_ram, n_address, n_size );
- dma_finished( index );
+ LOGDMA("%s dma %d write block %08x %08x\n", machine().describe_context(), index, n_address, n_size);
+ dma->fn_write(m_ram, n_address, n_size);
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x01000401 &&
+ else if (dma->n_channelcontrol == 0x01000401 &&
index == 2 &&
- !dma->fn_write.isnull() )
+ !dma->fn_write.isnull())
{
- LOG( "%s: dma %d write linked list %08x\n", machine().describe_context(), index, dma->n_base );
+ LOGDMA("%s dma %d write linked list %08x\n", machine().describe_context(), index, dma->n_base);
- dma_finished( index );
+ dma_finished(index);
}
- else if( dma->n_channelcontrol == 0x11000002 &&
- index == 6 )
+ else if (dma->n_channelcontrol == 0x11000002 &&
+ index == 6)
{
- LOG( "%s: dma 6 reverse clear %08x %08x\n", machine().describe_context(), dma->n_base, dma->n_blockcontrol );
- if( n_size > 0 )
+ LOGDMA("%s dma 6 reverse clear %08x %08x\n", machine().describe_context(), dma->n_base, dma->n_blockcontrol);
+ if (n_size > 0)
{
n_size--;
- while( n_size > 0 )
+ while (n_size > 0)
{
- n_nextaddress = ( n_address - 4 ) & 0xffffff;
- m_ram[ n_address / 4 ] = n_nextaddress;
+ n_nextaddress = (n_address - 4) & 0xffffff;
+ m_ram[n_address / 4] = n_nextaddress;
n_address = n_nextaddress;
n_size--;
}
- m_ram[ n_address / 4 ] = 0xffffff;
+ m_ram[n_address / 4] = 0xffffff;
}
- dma_start_timer( index, 2150 );
+ dma_start_timer(index, 2150);
}
else
- {
- LOG( "%s: dma %d unknown mode %08x\n", machine().describe_context(), index, dma->n_channelcontrol );
- }
- }
- else if( dma->n_channelcontrol != 0 )
- {
- LOG( "%s: psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", machine().describe_context(), offset, dma->n_channelcontrol, mem_mask );
+ LOGDMA("%s dma %d unknown mode %08x\n", machine().describe_context(), index, dma->n_channelcontrol);
}
- break;
- default:
- LOG( "%s: psx_dma_w( %04x, %08x, %08x ) Unknown dma channel register\n", machine().describe_context(), offset, data, mem_mask );
+ else if (dma->n_channelcontrol != 0)
+ LOGDMA("%s psx_dma_w( %04x, %08x, %08x ) channel not enabled\n", machine().describe_context(), offset, dma->n_channelcontrol, mem_mask);
break;
}
}
else
{
- switch( offset % 4 )
+ switch (offset % 4)
{
case 0x0:
- LOG( "%s: psx_dma_w( %04x, %08x, %08x ) dpcp\n", machine().describe_context(), offset, data, mem_mask );
- m_dpcp = ( m_dpcp & ~mem_mask ) | data;
+ LOGWRITE("%s dpcr_w(0x%08x)\n", machine().describe_context(), data);
+ m_dpcp = data;
break;
case 0x1:
+ {
+ uint32_t dicr = (m_dicr & 0x80000000) |
+ (m_dicr & ~data & 0x7f000000) |
+ (data & 0xff803f);
- m_dicr = ( m_dicr & ( 0x80000000 | ~mem_mask ) ) |
- ( m_dicr & ~data & 0x7f000000 & mem_mask ) |
- ( data & 0x00ffffff & mem_mask );
+ LOGWRITE("%s dicr_w(0x%08x) 0x%08x -> 0x%08x\n", machine().describe_context(), data, m_dicr, dicr);
+ m_dicr = dicr;
+ }
- if( ( m_dicr & 0x80000000 ) != 0 && ( m_dicr & 0x7f000000 ) == 0 )
+ if ((m_dicr & 0x80000000) != 0 && (m_dicr & 0x7f000000) == 0)
{
- LOGMASKED( LOG_INTERRUPT, "%s: dma interrupt cleared\n", machine().describe_context() );
+ LOGIRQ("%s dma interrupt cleared\n", machine().describe_context());
m_dicr &= ~0x80000000;
+ m_irq_handler(0);
}
-
- LOG( "%s: psx_dma_w( %04x, %08x, %08x ) dicr -> %08x\n", machine().describe_context(), offset, data, mem_mask, m_dicr );
- break;
- default:
- logerror( "%s: psx_dma_w( %04x, %08x, %08x ) Unknown dma control register\n", machine().describe_context(), offset, data, mem_mask );
break;
}
}
@@ -367,40 +375,46 @@ void psxdma_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
uint32_t psxdma_device::read(offs_t offset, uint32_t mem_mask)
{
int index = offset / 4;
- psx_dma_channel *dma = &m_channel[ index ];
+ psx_dma_channel *dma = &m_channel[index];
- if( index < 7 )
+ if (index < 7)
{
- switch( offset % 4 )
+ switch (offset % 4)
{
case 0:
- LOG( "%s: psx_dma_r dmabase[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_base );
+ if (!machine().side_effects_disabled())
+ LOGREAD("%s psx_dma_r dmabase[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_base);
return dma->n_base;
+
case 1:
- LOG( "%s: psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_blockcontrol );
+ if (!machine().side_effects_disabled())
+ LOGREAD("%s psx_dma_r dmablockcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_blockcontrol);
return dma->n_blockcontrol;
+
case 2:
- LOG( "%s: psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_channelcontrol );
+ case 3:
+ if (!machine().side_effects_disabled())
+ LOGREAD("%s psx_dma_r dmachannelcontrol[ %d ] ( %08x )\n", machine().describe_context(), index, dma->n_channelcontrol);
return dma->n_channelcontrol;
- default:
- logerror( "%s: psx_dma_r( %08x, %08x ) Unknown dma channel register\n", machine().describe_context(), offset, mem_mask );
- break;
}
}
else
{
- switch( offset % 4 )
+ switch (offset % 4)
{
case 0x0:
- LOG( "%s: psx_dma_r dpcp ( %08x )\n", machine().describe_context(), m_dpcp );
+ if (!machine().side_effects_disabled())
+ LOGREAD("%s dpcr_r() 0x%08x\n", machine().describe_context(), m_dpcp);
return m_dpcp;
+
case 0x1:
- LOG( "%s: psx_dma_r dicr ( %08x )\n", machine().describe_context(), m_dicr );
+ if (!machine().side_effects_disabled())
+ LOGREAD("%s dicr_r() 0x%08x\n", machine().describe_context(), m_dicr);
return m_dicr;
- default:
- logerror( "%s: psx_dma_r( %08x, %08x ) Unknown dma control register\n", machine().describe_context(), offset, mem_mask );
- break;
}
}
+
return 0;
}
+
+DEFINE_DEVICE_TYPE(PSX_DMA, psxdma_device, "psxdma", "Sony PSX DMA")
diff --git a/src/devices/cpu/psx/dma.h b/src/devices/cpu/psx/dma.h
index 0d81d67da7d..0e0c93f8a4f 100644
--- a/src/devices/cpu/psx/dma.h
+++ b/src/devices/cpu/psx/dma.h
@@ -36,9 +36,8 @@ public:
size_t m_ramsize;
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_post_load() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
struct psx_dma_channel
diff --git a/src/devices/cpu/psx/irq.h b/src/devices/cpu/psx/irq.h
index e3d9c34408f..d59f3953222 100644
--- a/src/devices/cpu/psx/irq.h
+++ b/src/devices/cpu/psx/irq.h
@@ -39,8 +39,8 @@ public:
void intin10(int state);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
private:
diff --git a/src/devices/cpu/psx/mdec.h b/src/devices/cpu/psx/mdec.h
index 8d9da890069..a380413d876 100644
--- a/src/devices/cpu/psx/mdec.h
+++ b/src/devices/cpu/psx/mdec.h
@@ -27,8 +27,8 @@ public:
void dma_read( uint32_t *ram, uint32_t n_address, int32_t n_size );
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
private:
diff --git a/src/devices/cpu/psx/psx.h b/src/devices/cpu/psx/psx.h
index f2ce1ed59d3..16950f929da 100644
--- a/src/devices/cpu/psx/psx.h
+++ b/src/devices/cpu/psx/psx.h
@@ -162,7 +162,7 @@ public:
void set_disable_rom_berr(bool mode);
- void psxcpu_internal_map(address_map &map);
+ void psxcpu_internal_map(address_map &map) ATTR_COLD;
protected:
static constexpr unsigned ICACHE_ENTRIES = 0x400;
static constexpr unsigned DCACHE_ENTRIES = 0x100;
@@ -170,15 +170,14 @@ protected:
psxcpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 40; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return ( clocks + 3 ) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return cycles * 4; }
virtual void execute_run() override;
diff --git a/src/devices/cpu/psx/psxdasm.cpp b/src/devices/cpu/psx/psxdasm.cpp
index bd7c3bcdcae..706b5523535 100644
--- a/src/devices/cpu/psx/psxdasm.cpp
+++ b/src/devices/cpu/psx/psxdasm.cpp
@@ -15,13 +15,17 @@
std::string psxcpu_disassembler::make_signed_hex_str_16( uint32_t value )
{
- if( value & 0x8000 )
+ if( int16_t( value & 0xffff ) >= -9 && int16_t( value & 0xffff ) <= 9 )
{
- return util::string_format("-$%x", -value & 0xffff );
+ return util::string_format("%d", int16_t( value & 0xffff ) );
+ }
+ else if( value & 0x8000 )
+ {
+ return util::string_format("-0x%x", -value & 0xffff );
}
else
{
- return util::string_format("$%x", value & 0xffff );
+ return util::string_format("0x%x", value & 0xffff );
}
}
@@ -159,15 +163,15 @@ std::string psxcpu_disassembler::upper_address( uint32_t op, offs_t pos, const d
if( INS_OP( nextop ) == OP_ORI && INS_RT( op ) == INS_RS( nextop ) )
{
- return util::string_format("$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) | INS_IMMEDIATE( nextop ) );
+ return util::string_format("0x%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) | INS_IMMEDIATE( nextop ) );
}
else if( INS_OP( nextop ) == OP_ADDIU && INS_RT( op ) == INS_RS( nextop ) )
{
- return util::string_format("$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (int16_t) INS_IMMEDIATE( nextop ) );
+ return util::string_format("0x%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (int16_t) INS_IMMEDIATE( nextop ) );
}
else
{
- return util::string_format("$%04x", INS_IMMEDIATE( op ) );
+ return util::string_format("0x%04x", INS_IMMEDIATE( op ) );
}
}
@@ -198,19 +202,19 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
case FUNCT_SLL:
if( op == 0 )
{
- /* the standard nop is "sll zero,zero,$0000" */
+ /* the standard nop is "sll zero,zero,0x0000" */
util::stream_format( stream, "nop" );
}
else
{
- util::stream_format( stream, "sll %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
+ util::stream_format( stream, "sll %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
}
break;
case FUNCT_SRL:
- util::stream_format( stream, "srl %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
+ util::stream_format( stream, "srl %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
break;
case FUNCT_SRA:
- util::stream_format( stream, "sra %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
+ util::stream_format( stream, "sra %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) );
break;
case FUNCT_SLLV:
util::stream_format( stream, "sllv %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ] );
@@ -225,7 +229,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "jr %s", s_cpugenreg[ INS_RS( op ) ] );
if( INS_RS( op ) == 31 )
{
- flags = STEP_OUT;
+ flags = STEP_OUT | step_over_extra( 1 );
}
break;
case FUNCT_JALR:
@@ -233,11 +237,11 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
flags = STEP_OVER | step_over_extra( 1 );
break;
case FUNCT_SYSCALL:
- util::stream_format( stream, "syscall $%05x", INS_CODE( op ) );
+ util::stream_format( stream, "syscall 0x%05x", INS_CODE( op ) );
flags = STEP_OVER;
break;
case FUNCT_BREAK:
- util::stream_format( stream, "break $%05x", INS_CODE( op ) );
+ util::stream_format( stream, "break 0x%05x", INS_CODE( op ) );
flags = STEP_OVER;
break;
case FUNCT_MFHI:
@@ -268,13 +272,22 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "add %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_ADDU:
- util::stream_format( stream, "addu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ if( INS_RT( op ) == 0 )
+ util::stream_format( stream, "move %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ] );
+ else
+ util::stream_format( stream, "addu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_SUB:
- util::stream_format( stream, "sub %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ if( INS_RS( op ) == 0 )
+ util::stream_format( stream, "neg %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ else
+ util::stream_format( stream, "sub %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_SUBU:
- util::stream_format( stream, "subu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ if( INS_RS( op ) == 0 )
+ util::stream_format( stream, "negu %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ else
+ util::stream_format( stream, "subu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_AND:
util::stream_format( stream, "and %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
@@ -286,7 +299,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "xor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_NOR:
- util::stream_format( stream, "nor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
+ if( INS_RS( op ) == 0 || INS_RT( op ) == 0 )
+ util::stream_format( stream, "not %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) != 0 ? INS_RS( op ) : INS_RT( op ) ] );
+ else
+ util::stream_format( stream, "nor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
break;
case FUNCT_SLT:
util::stream_format( stream, "slt %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] );
@@ -302,13 +318,13 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
case RT_BLTZ:
if( INS_RT( op ) == RT_BLTZAL )
{
- util::stream_format( stream, "bltzal %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "bltzal %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
if( INS_RS( op ) != 0 )
flags = STEP_OVER | STEP_COND | step_over_extra( 1 );
}
else
{
- util::stream_format( stream, "bltz %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "bltz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
if( INS_RS( op ) != 0 )
flags = STEP_COND | step_over_extra( 1 );
}
@@ -316,14 +332,14 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
case RT_BGEZ:
if( INS_RT( op ) == RT_BGEZAL )
{
- util::stream_format( stream, "bgezal %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "bgezal %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
flags = STEP_OVER | step_over_extra( 1 );
if( INS_RS( op ) != 0 )
flags |= STEP_COND;
}
else
{
- util::stream_format( stream, "bgez %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "bgez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
if( INS_RS( op ) != 0 )
flags = STEP_COND | step_over_extra( 1 );
}
@@ -331,33 +347,49 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
}
break;
case OP_J:
- util::stream_format( stream, "j $%08x", jump_address( pc, op ) );
+ util::stream_format( stream, "j 0x%08x", jump_address( pc, op ) );
break;
case OP_JAL:
- util::stream_format( stream, "jal $%08x", jump_address( pc, op ) );
+ util::stream_format( stream, "jal 0x%08x", jump_address( pc, op ) );
flags = STEP_OVER | step_over_extra( 1 );
break;
case OP_BEQ:
- util::stream_format( stream, "beq %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
- flags = STEP_COND | step_over_extra( 1 );
+ if( INS_RS( op ) == 0 && INS_RT( op ) == 0 )
+ {
+ util::stream_format( stream, "b 0x%08x", relative_address( pc, op ) );
+ }
+ else
+ {
+ if( INS_RT( op ) == 0 )
+ util::stream_format( stream, "beqz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ else
+ util::stream_format( stream, "beq %s,%s,0x%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
+ flags = STEP_COND | step_over_extra( 1 );
+ }
break;
case OP_BNE:
- util::stream_format( stream, "bne %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
+ if( INS_RT( op ) == 0 )
+ util::stream_format( stream, "bnez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
+ else
+ util::stream_format( stream, "bne %s,%s,0x%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
flags = STEP_COND | step_over_extra( 1 );
break;
case OP_BLEZ:
- util::stream_format( stream, "blez %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "blez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
flags = STEP_COND | step_over_extra( 1 );
break;
case OP_BGTZ:
- util::stream_format( stream, "bgtz %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) );
+ util::stream_format( stream, "bgtz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) );
flags = STEP_COND | step_over_extra( 1 );
break;
case OP_ADDI:
util::stream_format( stream, "addi %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
break;
case OP_ADDIU:
- util::stream_format( stream, "addiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
+ if( INS_RS( op ) == 0 )
+ util::stream_format( stream, "li %s,%s", s_cpugenreg[ INS_RT( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
+ else
+ util::stream_format( stream, "addiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
break;
case OP_SLTI:
util::stream_format( stream, "slti %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
@@ -366,13 +398,16 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "sltiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) );
break;
case OP_ANDI:
- util::stream_format( stream, "andi %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
+ util::stream_format( stream, "andi %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
break;
case OP_ORI:
- util::stream_format( stream, "ori %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
+ if( INS_RS( op ) == 0 )
+ util::stream_format( stream, "li %s,0x%04x", s_cpugenreg[ INS_RT( op ) ], INS_IMMEDIATE( op ) );
+ else
+ util::stream_format( stream, "ori %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
break;
case OP_XORI:
- util::stream_format( stream, "xori %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
+ util::stream_format( stream, "xori %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) );
break;
case OP_LUI:
util::stream_format( stream, "lui %s,%s", s_cpugenreg[ INS_RT( op ) ], upper_address( op, pos, opcodes ) );
@@ -397,10 +432,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_BC( op ) )
{
case BC_BCF:
- util::stream_format( stream, "bc0f $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc0f 0x%08x", relative_address( pc, op ) );
break;
case BC_BCT:
- util::stream_format( stream, "bc0t $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc0t 0x%08x", relative_address( pc, op ) );
break;
}
flags = STEP_COND | step_over_extra( 1 );
@@ -427,7 +462,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "rfe" );
break;
default:
- util::stream_format(stream, "cop0 $%07x", INS_COFUN(op));
+ util::stream_format(stream, "cop0 0x%07x", INS_COFUN(op));
break;
}
break;
@@ -455,10 +490,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_BC( op ) )
{
case BC_BCF:
- util::stream_format( stream, "bc1f $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc1f 0x%08x", relative_address( pc, op ) );
break;
case BC_BCT:
- util::stream_format( stream, "bc1t $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc1t 0x%08x", relative_address( pc, op ) );
break;
}
flags = STEP_COND | step_over_extra( 1 );
@@ -467,7 +502,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_CO( op ) )
{
case 1:
- util::stream_format( stream, "cop1 $%07x", INS_COFUN( op ) );
+ util::stream_format( stream, "cop1 0x%07x", INS_COFUN( op ) );
break;
}
break;
@@ -493,10 +528,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_BC( op ) )
{
case BC_BCF:
- util::stream_format( stream, "bc2f $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc2f 0x%08x", relative_address( pc, op ) );
break;
case BC_BCT:
- util::stream_format( stream, "bc2t $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc2t 0x%08x", relative_address( pc, op ) );
break;
}
flags = STEP_COND | step_over_extra( 1 );
@@ -577,7 +612,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
util::stream_format( stream, "ncct%s%s", s_gtesf[ GTE_SF( op ) ], s_gtelm[ GTE_LM( op ) ] );
break;
default:
- util::stream_format(stream, "cop2 $%07x", INS_COFUN(op));
+ util::stream_format(stream, "cop2 0x%07x", INS_COFUN(op));
break;
}
}
@@ -604,10 +639,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_BC( op ) )
{
case BC_BCF:
- util::stream_format( stream, "bc3f $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc3f 0x%08x", relative_address( pc, op ) );
break;
case BC_BCT:
- util::stream_format( stream, "bc3t $%08x", relative_address( pc, op ) );
+ util::stream_format( stream, "bc3t 0x%08x", relative_address( pc, op ) );
break;
}
flags = STEP_COND | step_over_extra( 1 );
@@ -616,7 +651,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
switch( INS_CO( op ) )
{
case 1:
- util::stream_format( stream, "cop3 $%07x", INS_COFUN( op ) );
+ util::stream_format( stream, "cop3 0x%07x", INS_COFUN( op ) );
break;
}
break;
@@ -687,7 +722,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d
// fall back if we have not emitted anything
if (current_pos == stream.tellp())
{
- util::stream_format(stream, "dw $%08x", op);
+ util::stream_format(stream, "dw 0x%08x", op);
}
return ( pos - pc ) | flags | SUPPORTED;
diff --git a/src/devices/cpu/psx/rcnt.h b/src/devices/cpu/psx/rcnt.h
index ee3e637a1e9..25df13a2d7e 100644
--- a/src/devices/cpu/psx/rcnt.h
+++ b/src/devices/cpu/psx/rcnt.h
@@ -40,8 +40,8 @@ public:
uint32_t read(offs_t offset, uint32_t mem_mask = ~0);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
TIMER_CALLBACK_MEMBER( timer_update );
diff --git a/src/devices/cpu/psx/sio.h b/src/devices/cpu/psx/sio.h
index f751e7949cf..6bc07ab1df8 100644
--- a/src/devices/cpu/psx/sio.h
+++ b/src/devices/cpu/psx/sio.h
@@ -53,7 +53,7 @@ protected:
psxsio_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual void device_post_load() override;
TIMER_CALLBACK_MEMBER( sio_tick );
diff --git a/src/devices/cpu/rii/riscii.cpp b/src/devices/cpu/rii/riscii.cpp
index 59e22c9f12d..9889e35c822 100644
--- a/src/devices/cpu/rii/riscii.cpp
+++ b/src/devices/cpu/rii/riscii.cpp
@@ -2110,6 +2110,7 @@ void riscii_series_device::execute_run()
break;
case EXEC_IDLE:
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/rii/riscii.h b/src/devices/cpu/rii/riscii.h
index 5dedcf53af5..f050ce77c6f 100644
--- a/src/devices/cpu/rii/riscii.h
+++ b/src/devices/cpu/rii/riscii.h
@@ -95,8 +95,8 @@ protected:
riscii_series_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, unsigned addrbits, unsigned pcbits, unsigned bankbits, u8 maxbank, u8 post_id_mask, address_map_constructor regs);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual void execute_run() override;
@@ -108,7 +108,7 @@ protected:
// device_state_interface implementation
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- void core_regs_map(address_map &map);
+ void core_regs_map(address_map &map) ATTR_COLD;
// register handlers
u8 fsr0_r();
@@ -399,7 +399,7 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void regs_map(address_map &map);
+ void regs_map(address_map &map) ATTR_COLD;
};
DECLARE_DEVICE_TYPE(EPG3231, epg3231_device)
diff --git a/src/devices/cpu/romp/romp.cpp b/src/devices/cpu/romp/romp.cpp
index 0f65659ae60..638af0efaa1 100644
--- a/src/devices/cpu/romp/romp.cpp
+++ b/src/devices/cpu/romp/romp.cpp
@@ -122,6 +122,7 @@ void romp_device::execute_run()
if (m_branch_state == WAIT)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/romp/romp.h b/src/devices/cpu/romp/romp.h
index 0f1f848327c..9528a15078c 100644
--- a/src/devices/cpu/romp/romp.h
+++ b/src/devices/cpu/romp/romp.h
@@ -107,13 +107,12 @@ protected:
};
// device_t overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 40; }
- virtual u32 execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/rsp/rsp.cpp b/src/devices/cpu/rsp/rsp.cpp
index c72e8652d8c..b58b7169e80 100644
--- a/src/devices/cpu/rsp/rsp.cpp
+++ b/src/devices/cpu/rsp/rsp.cpp
@@ -62,11 +62,6 @@ DEFINE_DEVICE_TYPE(RSP, rsp_device, "rsp", "Nintendo & SGI Reality Signal Proces
#define ZERO 3
#define CLIP2 4
-#define SLICE_H 3
-#define SLICE_M 2
-#define SLICE_L 1
-#define SLICE_LL 0
-
#define WRITEBACK_RESULT() memcpy(m_v[VDREG].s, vres, sizeof(uint16_t) * 8);
static const int vector_elements_2[16][8] =
@@ -209,7 +204,7 @@ void rsp_device::set_cop0_reg(int reg, uint32_t data)
void rsp_device::unimplemented_opcode(uint32_t op)
{
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
std::ostringstream string;
rsp_disassembler rspd;
@@ -265,7 +260,7 @@ void rsp_device::device_start()
for (int regIdx = 0; regIdx < 32; regIdx++)
m_r[regIdx] = 0;
- for(auto & elem : m_v)
+ for (auto & elem : m_v)
{
elem.d[0] = 0;
elem.d[1] = 0;
@@ -284,7 +279,7 @@ void rsp_device::device_start()
m_vector_busy = false;
m_paired_busy = false;
- for(auto & elem : m_accum)
+ for (auto & elem : m_accum)
{
elem.q = 0;
}
@@ -294,6 +289,35 @@ void rsp_device::device_start()
m_sr = RSP_STATUS_HALT;
m_step_count = 0;
+ // register for savestates
+ save_item(NAME(m_pc));
+ save_item(NAME(m_r));
+ save_item(NAME(m_ideduct));
+ save_item(NAME(m_scalar_busy));
+ save_item(NAME(m_vector_busy));
+ save_item(NAME(m_paired_busy));
+
+ save_item(NAME(m_sr));
+ save_item(NAME(m_step_count));
+ save_item(NAME(m_ppc));
+ save_item(NAME(m_nextpc));
+
+ save_item(NAME(m_vres));
+ save_item(NAME(m_accum));
+ save_item(NAME(m_vcarry));
+ save_item(NAME(m_vcompare));
+ save_item(NAME(m_vclip1));
+ save_item(NAME(m_vzero));
+ save_item(NAME(m_vclip2));
+
+ for (int i = 0; i < std::size(m_v); i++)
+ save_item(NAME(m_v[i].d), i);
+
+ save_item(NAME(m_reciprocal_res));
+ save_item(NAME(m_reciprocal_high));
+ save_item(NAME(m_dp_allowed));
+
+ // register state for debugger
state_add( RSP_PC, "PC", m_pc).callimport().callexport().formatstr("%08X");
state_add( RSP_R0, "R0", m_r[0]).formatstr("%08X");
state_add( RSP_R1, "R1", m_r[1]).formatstr("%08X");
@@ -528,15 +552,15 @@ void rsp_device::device_reset()
uint16_t rsp_device::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive)
{
- if ((int16_t)m_accum[accum].w[SLICE_H] < 0)
+ if ((int16_t)m_accum[accum].w.h3 < 0)
{
- if ((uint16_t)m_accum[accum].w[SLICE_H] != 0xffff)
+ if ((uint16_t)m_accum[accum].w.h3 != 0xffff)
{
return negative;
}
else
{
- if ((int16_t)m_accum[accum].w[SLICE_M] >= 0)
+ if ((int16_t)m_accum[accum].w.h2 >= 0)
{
return negative;
}
@@ -544,24 +568,24 @@ uint16_t rsp_device::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uin
{
if (slice == 0)
{
- return m_accum[accum].w[SLICE_L];
+ return m_accum[accum].w.h;
}
else if (slice == 1)
{
- return m_accum[accum].w[SLICE_M];
+ return m_accum[accum].w.h2;
}
}
}
}
else
{
- if ((uint16_t)m_accum[accum].w[SLICE_H] != 0)
+ if ((uint16_t)m_accum[accum].w.h3 != 0)
{
return positive;
}
else
{
- if ((int16_t)m_accum[accum].w[SLICE_M] < 0)
+ if ((int16_t)m_accum[accum].w.h2 < 0)
{
return positive;
}
@@ -569,11 +593,11 @@ uint16_t rsp_device::SATURATE_ACCUM(int accum, int slice, uint16_t negative, uin
{
if (slice == 0)
{
- return m_accum[accum].w[SLICE_L];
+ return m_accum[accum].w.h;
}
else
{
- return m_accum[accum].w[SLICE_M];
+ return m_accum[accum].w.h2;
}
}
}
@@ -610,19 +634,19 @@ void rsp_device::handle_vector_ops(uint32_t op)
if (s1 == -32768 && s2 == -32768)
{
// overflow
- m_accum[i].w[SLICE_H] = 0;
- m_accum[i].w[SLICE_M] = -32768;
- m_accum[i].w[SLICE_L] = -32768;
+ m_accum[i].w.h3 = 0;
+ m_accum[i].w.h2 = -32768;
+ m_accum[i].w.h = -32768;
vres[i] = 0x7fff;
}
else
{
int64_t r = s1 * s2 * 2;
r += 0x8000; // rounding ?
- m_accum[i].w[SLICE_H] = (r < 0) ? 0xffff : 0; // Sign-extend to 48-bit
- m_accum[i].w[SLICE_M] = (int16_t)(r >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r;
- vres[i] = m_accum[i].w[SLICE_M];
+ m_accum[i].w.h3 = (r < 0) ? 0xffff : 0; // Sign-extend to 48-bit
+ m_accum[i].w.h2 = (int16_t)(r >> 16);
+ m_accum[i].w.h = (uint16_t)r;
+ vres[i] = m_accum[i].w.h2;
}
}
WRITEBACK_RESULT();
@@ -645,21 +669,21 @@ void rsp_device::handle_vector_ops(uint32_t op)
int64_t r = s1 * s2 * 2;
r += 0x8000; // rounding ?
- m_accum[i].w[SLICE_H] = (uint16_t)(r >> 32);
- m_accum[i].w[SLICE_M] = (uint16_t)(r >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r;
+ m_accum[i].w.h3 = (uint16_t)(r >> 32);
+ m_accum[i].w.h2 = (uint16_t)(r >> 16);
+ m_accum[i].w.h = (uint16_t)r;
if (r < 0)
{
vres[i] = 0;
}
- else if (((int16_t)m_accum[i].w[SLICE_H] ^ (int16_t)m_accum[i].w[SLICE_M]) < 0)
+ else if (((int16_t)m_accum[i].w.h3 ^ (int16_t)m_accum[i].w.h2) < 0)
{
vres[i] = -1;
}
else
{
- vres[i] = m_accum[i].w[SLICE_M];
+ vres[i] = m_accum[i].w.h2;
}
}
WRITEBACK_RESULT();
@@ -683,11 +707,11 @@ void rsp_device::handle_vector_ops(uint32_t op)
uint32_t s2 = m_v[VS2REG].w[VEC_EL_2(EL, i)];
uint32_t r = s1 * s2;
- m_accum[i].w[SLICE_H] = 0;
- m_accum[i].w[SLICE_M] = 0;
- m_accum[i].w[SLICE_L] = (uint16_t)(r >> 16);
+ m_accum[i].w.h3 = 0;
+ m_accum[i].w.h2 = 0;
+ m_accum[i].w.h = (uint16_t)(r >> 16);
- vres[i] = m_accum[i].w[SLICE_L];
+ vres[i] = m_accum[i].w.h;
}
WRITEBACK_RESULT();
break;
@@ -710,11 +734,11 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].w[VEC_EL_2(EL, i)]; // not sign-extended
int32_t r = s1 * s2;
- m_accum[i].w[SLICE_H] = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
- m_accum[i].w[SLICE_M] = (int16_t)(r >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r;
+ m_accum[i].w.h3 = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ m_accum[i].w.h2 = (int16_t)(r >> 16);
+ m_accum[i].w.h = (uint16_t)r;
- vres[i] = m_accum[i].w[SLICE_M];
+ vres[i] = m_accum[i].w.h2;
}
WRITEBACK_RESULT();
break;
@@ -737,11 +761,11 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r = s1 * s2;
- m_accum[i].w[SLICE_H] = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
- m_accum[i].w[SLICE_M] = (int16_t)(r >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)(r);
+ m_accum[i].w.h3 = (r < 0) ? 0xffff : 0; // sign-extend to 48-bit
+ m_accum[i].w.h2 = (int16_t)(r >> 16);
+ m_accum[i].w.h = (uint16_t)(r);
- vres[i] = m_accum[i].w[SLICE_L];
+ vres[i] = m_accum[i].w.h;
}
WRITEBACK_RESULT();
break;
@@ -764,9 +788,9 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r = s1 * s2;
- m_accum[i].w[SLICE_H] = (int16_t)(r >> 16);
- m_accum[i].w[SLICE_M] = (uint16_t)(r);
- m_accum[i].w[SLICE_L] = 0;
+ m_accum[i].w.h3 = (int16_t)(r >> 16);
+ m_accum[i].w.h2 = (uint16_t)(r);
+ m_accum[i].w.h = 0;
if (r < -32768) r = -32768;
if (r > 32767) r = 32767;
@@ -792,17 +816,17 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r = s1 * s2;
- uint64_t q = (uint64_t)(uint16_t)m_accum[i].w[SLICE_LL];
- q |= (((uint64_t)(uint16_t)m_accum[i].w[SLICE_L]) << 16);
- q |= (((uint64_t)(uint16_t)m_accum[i].w[SLICE_M]) << 32);
- q |= (((uint64_t)(uint16_t)m_accum[i].w[SLICE_H]) << 48);
+ uint64_t q = (uint64_t)(uint16_t)m_accum[i].w.l;
+ q |= (((uint64_t)(uint16_t)m_accum[i].w.h) << 16);
+ q |= (((uint64_t)(uint16_t)m_accum[i].w.h2) << 32);
+ q |= (((uint64_t)(uint16_t)m_accum[i].w.h3) << 48);
q += (int64_t)(r) << 17;
- m_accum[i].w[SLICE_LL] = (uint16_t)q;
- m_accum[i].w[SLICE_L] = (uint16_t)(q >> 16);
- m_accum[i].w[SLICE_M] = (uint16_t)(q >> 32);
- m_accum[i].w[SLICE_H] = (uint16_t)(q >> 48);
+ m_accum[i].w.l = (uint16_t)q;
+ m_accum[i].w.h = (uint16_t)(q >> 16);
+ m_accum[i].w.h2 = (uint16_t)(q >> 32);
+ m_accum[i].w.h3 = (uint16_t)(q >> 48);
vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -823,32 +847,32 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s1 = m_v[VS1REG].s[i];
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r1 = s1 * s2;
- uint32_t r2 = m_accum[i].w[SLICE_L] + ((uint16_t)r1 * 2);
- uint32_t r3 = m_accum[i].w[SLICE_M] + (uint16_t)((r1 >> 16) * 2) + (uint16_t)(r2 >> 16);
+ uint32_t r2 = m_accum[i].w.h + ((uint16_t)r1 * 2);
+ uint32_t r3 = m_accum[i].w.h2 + (uint16_t)((r1 >> 16) * 2) + (uint16_t)(r2 >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r2;
- m_accum[i].w[SLICE_M] = (uint16_t)r3;
- m_accum[i].w[SLICE_H] += (uint16_t)(r3 >> 16) + (uint16_t)(r1 >> 31);
+ m_accum[i].w.h = (uint16_t)r2;
+ m_accum[i].w.h2 = (uint16_t)r3;
+ m_accum[i].w.h3 += (uint16_t)(r3 >> 16) + (uint16_t)(r1 >> 31);
- if ((int16_t)m_accum[i].w[SLICE_H] < 0)
+ if ((int16_t)m_accum[i].w.h3 < 0)
{
vres[i] = 0;
}
else
{
- if (m_accum[i].w[SLICE_H] != 0)
+ if (m_accum[i].w.h3 != 0)
{
vres[i] = 0xffff;
}
else
{
- if ((int16_t)m_accum[i].w[SLICE_M] < 0)
+ if ((int16_t)m_accum[i].w.h2 < 0)
{
vres[i] = 0xffff;
}
else
{
- vres[i] = m_accum[i].w[SLICE_M];
+ vres[i] = m_accum[i].w.h2;
}
}
}
@@ -873,12 +897,12 @@ void rsp_device::handle_vector_ops(uint32_t op)
uint32_t s1 = m_v[VS1REG].w[i];
uint32_t s2 = m_v[VS2REG].w[VEC_EL_2(EL, i)];
uint32_t r1 = s1 * s2;
- uint32_t r2 = m_accum[i].w[SLICE_L] + (r1 >> 16);
- uint32_t r3 = m_accum[i].w[SLICE_M] + (r2 >> 16);
+ uint32_t r2 = m_accum[i].w.h + (r1 >> 16);
+ uint32_t r3 = m_accum[i].w.h2 + (r2 >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r2;
- m_accum[i].w[SLICE_M] = (uint16_t)r3;
- m_accum[i].w[SLICE_H] += (int16_t)(r3 >> 16);
+ m_accum[i].w.h = (uint16_t)r2;
+ m_accum[i].w.h2 = (uint16_t)r3;
+ m_accum[i].w.h3 += (int16_t)(r3 >> 16);
vres[i] = SATURATE_ACCUM(i, 0, 0x0000, 0xffff);
}
@@ -902,14 +926,14 @@ void rsp_device::handle_vector_ops(uint32_t op)
uint32_t s1 = m_v[VS1REG].s[i];
uint32_t s2 = m_v[VS2REG].w[VEC_EL_2(EL, i)]; // not sign-extended
uint32_t r1 = s1 * s2;
- uint32_t r2 = (uint16_t)m_accum[i].w[SLICE_L] + (uint16_t)(r1);
- uint32_t r3 = (uint16_t)m_accum[i].w[SLICE_M] + (r1 >> 16) + (r2 >> 16);
+ uint32_t r2 = (uint16_t)m_accum[i].w.h + (uint16_t)(r1);
+ uint32_t r3 = (uint16_t)m_accum[i].w.h2 + (r1 >> 16) + (r2 >> 16);
- m_accum[i].w[SLICE_L] = (uint16_t)r2;
- m_accum[i].w[SLICE_M] = (uint16_t)r3;
- m_accum[i].w[SLICE_H] += (uint16_t)(r3 >> 16);
+ m_accum[i].w.h = (uint16_t)r2;
+ m_accum[i].w.h2 = (uint16_t)r3;
+ m_accum[i].w.h3 += (uint16_t)(r3 >> 16);
if ((int32_t)r1 < 0)
- m_accum[i].w[SLICE_H] -= 1;
+ m_accum[i].w.h3 -= 1;
vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -933,16 +957,16 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s1 = m_v[VS1REG].w[i]; // not sign-extended
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
- uint64_t q = (uint64_t)m_accum[i].w[SLICE_LL];
- q |= (((uint64_t)m_accum[i].w[SLICE_L]) << 16);
- q |= (((uint64_t)m_accum[i].w[SLICE_M]) << 32);
- q |= (((uint64_t)m_accum[i].w[SLICE_H]) << 48);
+ uint64_t q = (uint64_t)m_accum[i].w.l;
+ q |= (((uint64_t)m_accum[i].w.h) << 16);
+ q |= (((uint64_t)m_accum[i].w.h2) << 32);
+ q |= (((uint64_t)m_accum[i].w.h3) << 48);
q += (int64_t)(s1*s2) << 16;
- m_accum[i].w[SLICE_LL] = (uint16_t)q;
- m_accum[i].w[SLICE_L] = (uint16_t)(q >> 16);
- m_accum[i].w[SLICE_M] = (uint16_t)(q >> 32);
- m_accum[i].w[SLICE_H] = (uint16_t)(q >> 48);
+ m_accum[i].w.l = (uint16_t)q;
+ m_accum[i].w.h = (uint16_t)(q >> 16);
+ m_accum[i].w.h2 = (uint16_t)(q >> 32);
+ m_accum[i].w.h3 = (uint16_t)(q >> 48);
vres[i] = SATURATE_ACCUM(i, 0, 0x0000, 0xffff);
}
@@ -967,12 +991,12 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s1 = m_v[VS1REG].s[i];
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
- int32_t accum = (uint32_t)(uint16_t)m_accum[i].w[SLICE_M];
- accum |= ((uint32_t)((uint16_t)m_accum[i].w[SLICE_H])) << 16;
+ int32_t accum = (uint32_t)(uint16_t)m_accum[i].w.h2;
+ accum |= ((uint32_t)((uint16_t)m_accum[i].w.h3)) << 16;
accum += s1 * s2;
- m_accum[i].w[SLICE_H] = (uint16_t)(accum >> 16);
- m_accum[i].w[SLICE_M] = (uint16_t)accum;
+ m_accum[i].w.h3 = (uint16_t)(accum >> 16);
+ m_accum[i].w.h2 = (uint16_t)accum;
vres[i] = SATURATE_ACCUM(i, 1, 0x8000, 0x7fff);
}
@@ -997,7 +1021,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r = s1 + s2 + BIT(m_vcarry, i);
- m_accum[i].w[SLICE_L] = (int16_t)r;
+ m_accum[i].w.h = (int16_t)r;
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
@@ -1026,7 +1050,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t s2 = m_v[VS2REG].s[VEC_EL_2(EL, i)];
int32_t r = s1 - s2 - BIT(m_vcarry, i);
- m_accum[i].w[SLICE_L] = (int16_t)r;
+ m_accum[i].w.h = (int16_t)r;
if (r > 32767) r = 32767;
if (r < -32768) r = -32768;
@@ -1074,7 +1098,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = 0;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1101,7 +1125,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t r = s1 + s2;
vres[i] = (int16_t)r;
- m_accum[i].w[SLICE_L] = (int16_t)r;
+ m_accum[i].w.h = (int16_t)r;
if (r & 0xffff0000)
{
@@ -1133,7 +1157,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
int32_t r = s1 - s2;
vres[i] = (int16_t)(r);
- m_accum[i].w[SLICE_L] = (uint16_t)r;
+ m_accum[i].w.h = (uint16_t)r;
if ((uint16_t)r != 0)
{
@@ -1163,7 +1187,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
for (int i = 0; i < 8; i++)
{
- m_v[VDREG].w[i] = m_accum[i].w[SLICE_H];
+ m_v[VDREG].w[i] = m_accum[i].w.h3;
}
break;
}
@@ -1171,7 +1195,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
for (int i = 0; i < 8; i++)
{
- m_v[VDREG].w[i] = m_accum[i].w[SLICE_M];
+ m_v[VDREG].w[i] = m_accum[i].w.h2;
}
break;
}
@@ -1179,7 +1203,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
for (int i = 0; i < 8; i++)
{
- m_v[VDREG].w[i] = m_accum[i].w[SLICE_L];
+ m_v[VDREG].w[i] = m_accum[i].w.h;
}
break;
}
@@ -1228,7 +1252,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = s2;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
m_vzero = 0;
@@ -1264,7 +1288,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
vres[i] = s2;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
m_vzero = 0;
@@ -1301,7 +1325,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = s2;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
m_vzero = 0;
@@ -1338,7 +1362,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = s2;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
m_vzero = 0;
@@ -1367,11 +1391,11 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
if (BIT(m_vcompare, i)) // vcc_lo
{
- m_accum[i].w[SLICE_L] = -(uint16_t)s2;
+ m_accum[i].w.h = -(uint16_t)s2;
}
else
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
}
}
else
@@ -1380,12 +1404,12 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) > 0x10000)
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
m_vcompare &= ~(1 << i);
}
else
{
- m_accum[i].w[SLICE_L] = -(uint16_t)s2;
+ m_accum[i].w.h = -(uint16_t)s2;
m_vcompare |= 1 << i;
}
}
@@ -1393,12 +1417,12 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
if (((uint32_t)(uint16_t)(s1) + (uint32_t)(uint16_t)(s2)) != 0)
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
m_vcompare &= ~(1 << i);
}
else
{
- m_accum[i].w[SLICE_L] = -(uint16_t)s2;
+ m_accum[i].w.h = -(uint16_t)s2;
m_vcompare |= 1 << i;
}
}
@@ -1410,29 +1434,29 @@ void rsp_device::handle_vector_ops(uint32_t op)
{
if (BIT(m_vclip2, i)) // vcc_hi
{
- m_accum[i].w[SLICE_L] = s2;
+ m_accum[i].w.h = s2;
}
else
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
}
}
else
{
if (((int32_t)(uint16_t)s1 - (int32_t)(uint16_t)s2) >= 0)
{
- m_accum[i].w[SLICE_L] = s2;
+ m_accum[i].w.h = s2;
m_vclip2 |= 1 << i;
}
else
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
m_vclip2 &= ~(1 << i);
}
}
}
- vres[i] = m_accum[i].w[SLICE_L];
+ vres[i] = m_accum[i].w.h;
}
m_vzero = 0;
@@ -1521,7 +1545,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
m_vclip1 |= 1 << i;
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1555,12 +1579,12 @@ void rsp_device::handle_vector_ops(uint32_t op)
}
if ((s1 + s2) <= 0)
{
- m_accum[i].w[SLICE_L] = ~(uint16_t)s2;
+ m_accum[i].w.h = ~(uint16_t)s2;
m_vcompare |= 1 << i;
}
else
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
}
}
else
@@ -1571,16 +1595,16 @@ void rsp_device::handle_vector_ops(uint32_t op)
}
if ((s1 - s2) >= 0)
{
- m_accum[i].w[SLICE_L] = s2;
+ m_accum[i].w.h = s2;
m_vclip2 |= 1 << i;
}
else
{
- m_accum[i].w[SLICE_L] = s1;
+ m_accum[i].w.h = s1;
}
}
- vres[i] = m_accum[i].w[SLICE_L];
+ vres[i] = m_accum[i].w.h;
}
WRITEBACK_RESULT();
break;
@@ -1606,7 +1630,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = m_v[VS2REG].s[VEC_EL_2(EL, i)];
}
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1624,7 +1648,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = m_v[VS1REG].w[i] & m_v[VS2REG].w[VEC_EL_2(EL, i)];
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1642,7 +1666,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = ~(m_v[VS1REG].w[i] & m_v[VS2REG].w[VEC_EL_2(EL, i)]);
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1660,7 +1684,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = m_v[VS1REG].w[i] | m_v[VS2REG].w[VEC_EL_2(EL, i)];
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1678,7 +1702,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = ~(m_v[VS1REG].w[i] | m_v[VS2REG].w[VEC_EL_2(EL, i)]);
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1696,7 +1720,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = m_v[VS1REG].w[i] ^ m_v[VS2REG].w[VEC_EL_2(EL, i)];
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1714,7 +1738,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = ~(m_v[VS1REG].w[i] ^ m_v[VS2REG].w[VEC_EL_2(EL, i)]);
- m_accum[i].w[SLICE_L] = vres[i];
+ m_accum[i].w.h = vres[i];
}
WRITEBACK_RESULT();
break;
@@ -1737,7 +1761,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = 0;
uint16_t e1 = m_v[VS1REG].w[i];
uint16_t e2 = m_v[VS2REG].w[VEC_EL_2(EL, i)];
- m_accum[i].w[SLICE_L] = e1 + e2;
+ m_accum[i].w.h = e1 + e2;
}
WRITEBACK_RESULT();
break;
@@ -1796,7 +1820,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
break;
}
@@ -1871,7 +1895,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
break;
}
@@ -1890,7 +1914,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
m_v[VDREG].s[VS1REG & 7] = (int16_t)(m_reciprocal_res >> 16);
@@ -1909,7 +1933,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
m_v[VDREG].w[VS1REG & 7] = m_v[VS2REG].w[VEC_EL_2(EL, VS1REG & 7)];
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[i];
+ m_accum[i].w.h = m_v[VS2REG].w[i];
}
break;
}
@@ -1969,7 +1993,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
break;
@@ -2048,7 +2072,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
break;
@@ -2068,7 +2092,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
- m_accum[i].w[SLICE_L] = m_v[VS2REG].w[VEC_EL_2(EL, i)];
+ m_accum[i].w.h = m_v[VS2REG].w[VEC_EL_2(EL, i)];
}
m_v[VDREG].s[VS1REG & 7] = (int16_t)(m_reciprocal_res >> 16); // store high part
@@ -2103,7 +2127,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
vres[i] = 0;
uint16_t e1 = m_v[VS1REG].w[i];
uint16_t e2 = m_v[VS2REG].w[VEC_EL_2(EL, i)];
- m_accum[i].w[SLICE_L] = e1 + e2;
+ m_accum[i].w.h = e1 + e2;
}
WRITEBACK_RESULT();
break;
@@ -2123,7 +2147,7 @@ void rsp_device::handle_vector_ops(uint32_t op)
for (int i = 0; i < 8; i++)
{
vres[i] = m_v[VS1REG].w[i];
- m_accum[i].w[SLICE_L] = 0;
+ m_accum[i].w.h = 0;
}
WRITEBACK_RESULT();
break;
@@ -2840,6 +2864,7 @@ void rsp_device::execute_run()
{
if (m_sr & (RSP_STATUS_HALT | RSP_STATUS_BROKE))
{
+ debugger_wait_hook();
m_ideduct = 0;
m_scalar_busy = false;
m_vector_busy = false;
diff --git a/src/devices/cpu/rsp/rsp.h b/src/devices/cpu/rsp/rsp.h
index 3bbb95ca348..4e7378af089 100644
--- a/src/devices/cpu/rsp/rsp.h
+++ b/src/devices/cpu/rsp/rsp.h
@@ -95,14 +95,13 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override { }
@@ -149,7 +148,7 @@ protected:
memory_access<12, 2, 0, ENDIANNESS_BIG>::specific m_dmem;
private:
- union VECTOR_REG
+ union VECTOR_REG // PAIR128
{
uint64_t d[2];
uint32_t l[4];
@@ -158,13 +157,6 @@ private:
uint8_t b[16];
};
- union ACCUMULATOR_REG
- {
- uint64_t q;
- uint32_t l[2];
- uint16_t w[4];
- };
-
uint32_t m_debugger_temp;
uint16_t m_pc_temp;
uint16_t m_ppc_temp;
@@ -189,26 +181,23 @@ private:
// COP2 (vectors)
uint16_t SATURATE_ACCUM(int accum, int slice, uint16_t negative, uint16_t positive);
- uint16_t m_vres[8];
- VECTOR_REG m_v[32];
- ACCUMULATOR_REG m_accum[8];
- uint8_t m_vcarry;
- uint8_t m_vcompare;
- uint8_t m_vclip1;
- uint8_t m_vzero;
- uint8_t m_vclip2;
-
- int32_t m_reciprocal_res;
- uint32_t m_reciprocal_high;
- int32_t m_dp_allowed;
-
- void handle_cop2(uint32_t op);
- void handle_lwc2(uint32_t op);
- void handle_swc2(uint32_t op);
- void handle_vector_ops(uint32_t op);
-
- uint32_t m_div_in;
- uint32_t m_div_out;
+ uint16_t m_vres[8];
+ VECTOR_REG m_v[32];
+ PAIR64 m_accum[8];
+ uint8_t m_vcarry;
+ uint8_t m_vcompare;
+ uint8_t m_vclip1;
+ uint8_t m_vzero;
+ uint8_t m_vclip2;
+
+ int32_t m_reciprocal_res;
+ uint32_t m_reciprocal_high;
+ int32_t m_dp_allowed;
+
+ void handle_cop2(uint32_t op);
+ void handle_lwc2(uint32_t op);
+ void handle_swc2(uint32_t op);
+ void handle_vector_ops(uint32_t op);
};
DECLARE_DEVICE_TYPE(RSP, rsp_device)
diff --git a/src/devices/cpu/rsp/rsp_dasm.cpp b/src/devices/cpu/rsp/rsp_dasm.cpp
index 8c266c0df21..765c03bb7d3 100644
--- a/src/devices/cpu/rsp/rsp_dasm.cpp
+++ b/src/devices/cpu/rsp/rsp_dasm.cpp
@@ -64,11 +64,11 @@ inline std::string rsp_disassembler::signed_imm16(uint32_t op)
if (value < 0)
{
- return util::string_format("-$%04x", -value);
+ return util::string_format("-0x%04x", -value);
}
else
{
- return util::string_format("$%04x", value);
+ return util::string_format("0x%04x", value);
}
}
@@ -303,30 +303,30 @@ offs_t rsp_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op)
{
switch ((op >> 16) & 0x1f)
{
- case 0x00: util::stream_format(stream, "bltz %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x01: util::stream_format(stream, "bgez %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x10: util::stream_format(stream, "bltzal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
- case 0x11: util::stream_format(stream, "bgezal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | step_over_extra(1); if (rs != 0) flags |= STEP_COND; break;
+ case 0x00: util::stream_format(stream, "bltz %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x01: util::stream_format(stream, "bgez %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x10: util::stream_format(stream, "bltzal %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break;
+ case 0x11: util::stream_format(stream, "bgezal %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | step_over_extra(1); if (rs != 0) flags |= STEP_COND; break;
default: util::stream_format(stream, "???"); break;
}
break;
}
- case 0x02: util::stream_format(stream, "j $%08X", (op & 0x03ffffff) << 2); break;
- case 0x03: util::stream_format(stream, "jal $%08X", (op & 0x03ffffff) << 2); break;
- case 0x04: util::stream_format(stream, "beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break;
- case 0x05: util::stream_format(stream, "bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break;
- case 0x06: util::stream_format(stream, "blez %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
- case 0x07: util::stream_format(stream, "bgtz %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x02: util::stream_format(stream, "j 0x%08X", (op & 0x03ffffff) << 2); break;
+ case 0x03: util::stream_format(stream, "jal 0x%08X", (op & 0x03ffffff) << 2); break;
+ case 0x04: util::stream_format(stream, "beq %s, %s, 0x%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break;
+ case 0x05: util::stream_format(stream, "bne %s, %s, 0x%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break;
+ case 0x06: util::stream_format(stream, "blez %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
+ case 0x07: util::stream_format(stream, "bgtz %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break;
case 0x08: util::stream_format(stream, "addi %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x09: util::stream_format(stream, "addiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x0a: util::stream_format(stream, "slti %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
case 0x0b: util::stream_format(stream, "sltiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break;
- case 0x0c: util::stream_format(stream, "andi %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
- case 0x0d: util::stream_format(stream, "ori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
- case 0x0e: util::stream_format(stream, "xori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
- case 0x0f: util::stream_format(stream, "lui %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0c: util::stream_format(stream, "andi %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0d: util::stream_format(stream, "ori %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0e: util::stream_format(stream, "xori %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
+ case 0x0f: util::stream_format(stream, "lui %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break;
case 0x10: disasm_cop0(stream, op); break;
case 0x12: disasm_cop2(stream, op); break;
diff --git a/src/devices/cpu/rw5000/a5500.h b/src/devices/cpu/rw5000/a5500.h
index 138c38df630..6485a6cb868 100644
--- a/src/devices/cpu/rw5000/a5500.h
+++ b/src/devices/cpu/rw5000/a5500.h
@@ -33,8 +33,8 @@ protected:
virtual void reset_pc() override { set_pc(0, 0); }
virtual u8 sr_page() override { return 15; }
- void program_768x8(address_map &map);
- void data_48x4(address_map &map);
+ void program_768x8(address_map &map) ATTR_COLD;
+ void data_48x4(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/rw5000/a5900.h b/src/devices/cpu/rw5000/a5900.h
index b6b59508578..d9de3004d5b 100644
--- a/src/devices/cpu/rw5000/a5900.h
+++ b/src/devices/cpu/rw5000/a5900.h
@@ -20,7 +20,7 @@ public:
a5900_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- void program_512x8(address_map &map);
+ void program_512x8(address_map &map) ATTR_COLD;
// opcode handlers
virtual void op_read() override;
diff --git a/src/devices/cpu/rw5000/b5000.cpp b/src/devices/cpu/rw5000/b5000.cpp
index 685fb1b5190..f173ebea6b5 100644
--- a/src/devices/cpu/rw5000/b5000.cpp
+++ b/src/devices/cpu/rw5000/b5000.cpp
@@ -145,7 +145,8 @@ void b5000_cpu_device::execute_one()
}
break; // 0xfc
- }
+
+ } // 0xf0
}
bool b5000_cpu_device::op_is_tl(u8 op)
diff --git a/src/devices/cpu/rw5000/b5000.h b/src/devices/cpu/rw5000/b5000.h
index 828ef1d9bd7..abc84759de5 100644
--- a/src/devices/cpu/rw5000/b5000.h
+++ b/src/devices/cpu/rw5000/b5000.h
@@ -63,8 +63,8 @@ protected:
virtual u8 sr_page() { return 0; }
virtual u16 decode_digit(u8 data);
- void program_448x8(address_map &map);
- void data_45x4(address_map &map);
+ void program_448x8(address_map &map) ATTR_COLD;
+ void data_45x4(address_map &map) ATTR_COLD;
// opcode helpers
u8 ram_r();
diff --git a/src/devices/cpu/rw5000/b6000.h b/src/devices/cpu/rw5000/b6000.h
index e415c353ee5..a99c754dbd9 100644
--- a/src/devices/cpu/rw5000/b6000.h
+++ b/src/devices/cpu/rw5000/b6000.h
@@ -53,12 +53,12 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// device-level overrides
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_one() override;
virtual u16 decode_digit(u8 data) override;
- void program_512x8(address_map &map);
+ void program_512x8(address_map &map) ATTR_COLD;
// opcode handlers
virtual void op_tkbs() override;
diff --git a/src/devices/cpu/rw5000/b6100.h b/src/devices/cpu/rw5000/b6100.h
index bd6a3db9e1b..ac914a5984c 100644
--- a/src/devices/cpu/rw5000/b6100.h
+++ b/src/devices/cpu/rw5000/b6100.h
@@ -59,8 +59,8 @@ protected:
virtual u8 sr_page() override { return 15; }
virtual u16 decode_digit(u8 data) override;
- void program_896x8(address_map &map);
- void data_48x4(address_map &map);
+ void program_896x8(address_map &map) ATTR_COLD;
+ void data_48x4(address_map &map) ATTR_COLD;
// opcode handlers
virtual void op_tkbs() override;
diff --git a/src/devices/cpu/rw5000/rw5000base.h b/src/devices/cpu/rw5000/rw5000base.h
index f6dc6146af8..a84968cd5aa 100644
--- a/src/devices/cpu/rw5000/rw5000base.h
+++ b/src/devices/cpu/rw5000/rw5000base.h
@@ -41,8 +41,8 @@ protected:
rw5000_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4-phase clock
diff --git a/src/devices/cpu/rw5000/rw5000d.cpp b/src/devices/cpu/rw5000/rw5000d.cpp
index ab980f9c5d3..5d76fdafff3 100644
--- a/src/devices/cpu/rw5000/rw5000d.cpp
+++ b/src/devices/cpu/rw5000/rw5000d.cpp
@@ -32,6 +32,18 @@ offs_t rw5000_common_disassembler::increment_pc(offs_t pc)
// common lookup tables
+enum rw5000_common_disassembler::e_mnemonics : unsigned
+{
+ mILL,
+ mNOP, mRSC, mSC, mTC, mTAM,
+ mLAX, mADX, mCOMP, mATB, mATBZ,
+ mLDA, mEXC0, mEXCP, mEXCM, mADD,
+ mLB0, mLB7, mLB8, mLB9, mLB10, mLB11,
+ mRSM, mSM, mTM,
+ mTL, mTRA0, mTRA1, mRET,
+ mTKB, mTKBS, mTDIN, mREAD, mKSEG, mMTD
+};
+
const char *const rw5000_common_disassembler::s_name[] =
{
"?",
diff --git a/src/devices/cpu/rw5000/rw5000d.h b/src/devices/cpu/rw5000/rw5000d.h
index 87e6cb3dca4..ba812f7d31f 100644
--- a/src/devices/cpu/rw5000/rw5000d.h
+++ b/src/devices/cpu/rw5000/rw5000d.h
@@ -25,19 +25,7 @@ public:
virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x3f) | m_r2l[pc & 0x3f]; }
protected:
- // opcode mnemonics
- enum e_mnemonics
- {
- mILL,
- mNOP, mRSC, mSC, mTC, mTAM,
- mLAX, mADX, mCOMP, mATB, mATBZ,
- mLDA, mEXC0, mEXCP, mEXCM, mADD,
- mLB0, mLB7, mLB8, mLB9, mLB10, mLB11,
- mRSM, mSM, mTM,
- mTL, mTRA0, mTRA1, mRET,
- mTKB, mTKBS, mTDIN, mREAD, mKSEG, mMTD
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_name[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/rx01/rx01.h b/src/devices/cpu/rx01/rx01.h
index 230f1cb8170..4eaf7fc8eee 100644
--- a/src/devices/cpu/rx01/rx01.h
+++ b/src/devices/cpu/rx01/rx01.h
@@ -52,8 +52,8 @@ public:
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
diff --git a/src/devices/cpu/s2650/2650dasm.cpp b/src/devices/cpu/s2650/2650dasm.cpp
index 6b6fdf85095..a927ac4b759 100644
--- a/src/devices/cpu/s2650/2650dasm.cpp
+++ b/src/devices/cpu/s2650/2650dasm.cpp
@@ -12,32 +12,12 @@
#include "emu.h"
#include "2650dasm.h"
-/* handy table to build relative offsets from HR (holding register) */
-const int s2650_disassembler::rel[0x100] = {
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
-};
-
std::string s2650_disassembler::SYM(int addr)
{
return util::string_format("$%04x", addr);
}
-/* format an immediate */
+// format an immediate
std::string s2650_disassembler::IMM(offs_t pc, const data_buffer &params)
{
return util::string_format("$%02x", params.r8(pc));
@@ -52,7 +32,7 @@ void s2650_disassembler::add(std::string &buf, const std::string &str)
buf += str;
}
-/* format an immediate for PSL */
+// format an immediate for PSL
std::string s2650_disassembler::IMM_PSL(offs_t pc, const data_buffer &params)
{
u8 v = params.r8(pc);
@@ -68,23 +48,23 @@ std::string s2650_disassembler::IMM_PSL(offs_t pc, const data_buffer &params)
case 0x80: add(buff, "m"); break;
case 0xc0: add(buff, "cc"); break;
}
- if (v & 0x20) /* inter digit carry */
+ if (v & 0x20) // inter digit carry
add(buff, "idc");
- if (v & 0x10) /* register select */
+ if (v & 0x10) // register select
add(buff, "rs");
- if (v & 0x08) /* with carry */
+ if (v & 0x08) // with carry
add(buff, "wc");
- if (v & 0x04) /* overflow */
+ if (v & 0x04) // overflow
add(buff, "ovf");
- if (v & 0x02) /* 2's complement comparisons */
+ if (v & 0x02) // 2's complement comparisons
add(buff, "com");
- if (v & 0x01) /* carry */
+ if (v & 0x01) // carry
add(buff, "c");
return buff;
}
}
-/* format an immediate for PSU (processor status upper) */
+// format an immediate for PSU (processor status upper)
std::string s2650_disassembler::IMM_PSU(offs_t pc, const data_buffer &params)
{
int v = params.r8(pc);
@@ -94,45 +74,45 @@ std::string s2650_disassembler::IMM_PSU(offs_t pc, const data_buffer &params)
} else {
std::string buff;
- if (v & 0x80) /* sense input */
+ if (v & 0x80) // sense input
add(buff, "si");
- if (v & 0x40) /* flag output */
+ if (v & 0x40) // flag output
add(buff, "fo");
- if (v & 0x20) /* interrupt inhibit */
+ if (v & 0x20) // interrupt inhibit
add(buff, "ii");
- if (v & 0x10) /* unused bit 4 */
+ if (v & 0x10) // unused bit 4
add(buff, "4");
- if (v & 0x08) /* unused bit 3 */
+ if (v & 0x08) // unused bit 3
add(buff, "3");
- if (v & 0x04) /* stack pointer bit 2 */
+ if (v & 0x04) // stack pointer bit 2
add(buff, "sp2");
- if (v & 0x02) /* stack pointer bit 1 */
+ if (v & 0x02) // stack pointer bit 1
add(buff, "sp1");
- if (v & 0x01) /* stack pointer bit 0 */
+ if (v & 0x01) // stack pointer bit 0
add(buff, "sp0");
return buff;
}
}
-/* format an relative address */
+// format an relative address
std::string s2650_disassembler::REL(offs_t pc, const data_buffer &params)
{
int o = params.r8(pc);
- return util::string_format("%s%s", (o&0x80)?"*":"", SYM((pc&0x6000)+((pc+1+rel[o])&0x1fff)));
+ return util::string_format("%s%s", (o & 0x80) ? "*" : "", SYM((pc & 0x6000) + ((pc + 1 + util::sext(o, 7)) & 0x1fff)));
}
-/* format an relative address (implicit page 0) */
+// format an relative address (implicit page 0)
std::string s2650_disassembler::REL0(offs_t pc, const data_buffer &params)
{
int o = params.r8(pc);
- return util::string_format("%s%s", (o&0x80)?"*":"", SYM((rel[o]) & 0x1fff));
+ return util::string_format("%s%s", (o & 0x80) ? "*" : "", SYM(util::sext(o, 7) & 0x1fff));
}
-/* format a destination register and an absolute address */
+// format a destination register and an absolute address
std::string s2650_disassembler::ABS(int load, int r, offs_t pc, const data_buffer &params)
{
int h = params.r8(pc);
- int l = params.r8((pc&0x6000)+((pc+1)&0x1fff));
+ int l = params.r8((pc & 0x6000) + ((pc + 1) & 0x1fff));
int a = (pc & 0x6000) + ((h & 0x1f) << 8) + l;
if (m_config->get_z80_mnemonics_mode()) {
@@ -174,11 +154,11 @@ std::string s2650_disassembler::ABS(int load, int r, offs_t pc, const data_buffe
return "";
}
-/* format an (branch) absolute address */
+// format an (branch) absolute address
std::string s2650_disassembler::ADR(offs_t pc, const data_buffer &params)
{
int h = params.r8(pc);
- int l = params.r8((pc&0x6000)+((pc+1)&0x1fff));
+ int l = params.r8((pc & 0x6000) + ((pc + 1) & 0x1fff));
int a = ((h & 0x7f) << 8) + l;
if (h & 0x80)
return util::string_format("*%s", SYM(a));
@@ -190,7 +170,7 @@ s2650_disassembler::s2650_disassembler(config *conf) : m_config(conf)
{
}
-/* disassemble one instruction at PC into buff. return byte size of instr */
+// disassemble one instruction at PC into buff. return byte size of instr
offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
uint32_t flags = 0;
@@ -215,7 +195,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0x0c: case 0x0d: case 0x0e: case 0x0f:
- util::stream_format(stream, z80 ? "ld %s" : "loda,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "ld %s" : "loda,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0x10: case 0x11:
@@ -273,7 +253,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0x2c: case 0x2d: case 0x2e: case 0x2f:
- util::stream_format(stream, z80 ? "xor %s" : "eora,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "xor %s" : "eora,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0x30: case 0x31: case 0x32: case 0x33:
@@ -326,7 +306,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0x4c: case 0x4d: case 0x4e: case 0x4f:
- util::stream_format(stream, z80 ? "and %s" : "anda,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "and %s" : "anda,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0x50: case 0x51: case 0x52: case 0x53:
@@ -358,7 +338,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0x6c: case 0x6d: case 0x6e: case 0x6f:
- util::stream_format(stream, z80 ? "or %s" : "iora,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "or %s" : "iora,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0x70: case 0x71: case 0x72: case 0x73:
@@ -402,7 +382,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0x8c: case 0x8d: case 0x8e: case 0x8f:
- util::stream_format(stream, z80 ? "add %s" : "adda,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "add %s" : "adda,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0x90: case 0x91:
@@ -446,7 +426,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0xac: case 0xad: case 0xae: case 0xaf:
- util::stream_format(stream, z80 ? "sub %s" : "suba,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "sub %s" : "suba,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0xb0: case 0xb1: case 0xb2: case 0xb3:
@@ -497,7 +477,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0xcc: case 0xcd: case 0xce: case 0xcf:
- util::stream_format(stream, z80 ? "ld %s" : "stra,%s", ABS(0,rv,pc, params));
+ util::stream_format(stream, z80 ? "ld %s" : "stra,%s", ABS( 0, rv, pc, params));
pc+=2;
break;
case 0xd0: case 0xd1: case 0xd2: case 0xd3:
@@ -518,7 +498,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
flags = STEP_COND;
break;
case 0xe0: case 0xe1: case 0xe2: case 0xe3:
- util::stream_format(stream, z80 ? "cp r0,%d" : "comz,%d", rv);
+ util::stream_format(stream, z80 ? "cp r0,r%d" : "comz,%d", rv);
break;
case 0xe4: case 0xe5: case 0xe6: case 0xe7:
util::stream_format(stream, z80 ? "cp r%d,%s" : "comi,%d %s", rv, IMM(pc, params));
@@ -529,7 +509,7 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
pc+=1;
break;
case 0xec: case 0xed: case 0xee: case 0xef:
- util::stream_format(stream, z80 ? "cp %s" : "coma,%s", ABS(1,rv,pc, params));
+ util::stream_format(stream, z80 ? "cp %s" : "coma,%s", ABS(1, rv, pc, params));
pc+=2;
break;
case 0xf0: case 0xf1: case 0xf2: case 0xf3:
@@ -552,18 +532,3 @@ offs_t s2650_disassembler::disassemble(std::ostream &stream, offs_t pc, const da
}
return (pc - PC) | flags | SUPPORTED;
}
-
-u32 s2650_disassembler::opcode_alignment() const
-{
- return 1;
-}
-
-u32 s2650_disassembler::interface_flags() const
-{
- return PAGED;
-}
-
-u32 s2650_disassembler::page_address_bits() const
-{
- return 13;
-}
diff --git a/src/devices/cpu/s2650/2650dasm.h b/src/devices/cpu/s2650/2650dasm.h
index cb5db5f85c8..1caae51c948 100644
--- a/src/devices/cpu/s2650/2650dasm.h
+++ b/src/devices/cpu/s2650/2650dasm.h
@@ -25,13 +25,12 @@ public:
s2650_disassembler(config *conf);
virtual ~s2650_disassembler() = default;
- virtual u32 opcode_alignment() const override;
- virtual u32 interface_flags() const override;
- virtual u32 page_address_bits() const override;
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual u32 interface_flags() const override { return PAGED; }
+ virtual u32 page_address_bits() const override { return 13; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- static const int rel[0x100];
static const char cc[4];
void add(std::string &buf, const std::string &str);
diff --git a/src/devices/cpu/s2650/s2650.cpp b/src/devices/cpu/s2650/s2650.cpp
index baa8beae391..fbcd2d07afc 100644
--- a/src/devices/cpu/s2650/s2650.cpp
+++ b/src/devices/cpu/s2650/s2650.cpp
@@ -14,13 +14,15 @@
#include "emu.h"
#include "s2650.h"
-#include "s2650cpu.h"
-/* define this to have some interrupt information logged */
+// define this to have some interrupt information logged
//#define VERBOSE 1
#include "logmacro.h"
-/* define this to expand all EA calculations inline */
+// define this to enable Z80 mnemonics in the debugger
+#define DEBUG_Z80 0
+
+// define this to expand all EA calculations inline
#define INLINE_EA 1
@@ -36,7 +38,7 @@ s2650_device::s2650_device(const machine_config &mconfig, const char *tag, devic
, m_flag_handler(*this)
, m_intack_handler(*this, 0x00)
, m_ppc(0), m_page(0), m_iar(0), m_ea(0), m_psl(0), m_psu(0), m_r(0)
- , m_halt(0), m_ir(0), m_irq_state(0), m_icount(0)
+ , m_halt(0), m_ir(0), m_irq_state(0)
, m_debugger_temp(0)
{
memset(m_reg, 0x00, sizeof(m_reg));
@@ -44,8 +46,7 @@ s2650_device::s2650_device(const machine_config &mconfig, const char *tag, devic
bool s2650_device::get_z80_mnemonics_mode() const
{
- // Needs to become configurable live
- return false;
+ return bool(DEBUG_Z80);
}
std::unique_ptr<util::disasm_interface> s2650_device::create_disassembler()
@@ -55,7 +56,8 @@ std::unique_ptr<util::disasm_interface> s2650_device::create_disassembler()
device_memory_interface::space_config_vector s2650_device::memory_space_config() const
{
- return space_config_vector {
+ return space_config_vector
+ {
// Memory-mapped: M/~IO=1
std::make_pair(AS_PROGRAM, &m_program_config),
@@ -70,8 +72,9 @@ device_memory_interface::space_config_vector s2650_device::memory_space_config()
}
-/* condition code changes for a byte */
-static const uint8_t ccc[0x200] = {
+// condition code changes for a byte
+static const uint8_t ccc[0x100] =
+{
0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
@@ -103,64 +106,38 @@ static const uint8_t ccc[0x200] = {
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
- 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
- 0x04,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84
+ 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80
};
+
/***************************************************************
- * handy table to build PC relative offsets
- * from HR (holding register)
+ * macros for CPU registers/flags
***************************************************************/
-static const int S2650_relative[0x100] =
-{
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
-};
+#define PMSK 0x1fff // mask page offset
+#define PLEN 0x2000 // page length
+#define PAGE 0x6000 // mask page
+#define AMSK 0x7fff // mask address range
+
+// processor status lower
+#define C 0x01 // carry flag
+#define COM 0x02 // compare: 0 binary, 1 2s complement
+#define OVF 0x04 // 2s complement overflow
+#define WC 0x08 // with carry: use carry in arithmetic / rotate ops
+#define RS 0x10 // register select 0: R0/R1/R2/R3 1: R0/R4/R5/R6
+#define IDC 0x20 // inter digit carry: bit-3-to-bit-4 carry
+#define CC 0xc0 // condition code
+
+// processor status upper
+#define SP 0x07 // stack pointer: indexing 8 15bit words
+#define PSU34 0x18 // unused bits
+#define II 0x20 // interrupt inhibit 0: allow, 1: inhibit
+#define FO 0x40 // flag output
+#define SI 0x80 // sense input
+
+#define R0 m_reg[0]
+#define R1 m_reg[1]
+#define R2 m_reg[2]
+#define R3 m_reg[3]
/***************************************************************
@@ -216,15 +193,18 @@ inline int s2650_device::check_irq_line()
}
standard_irq_callback(0, m_page + m_iar);
- /* Say hi */
+ // Say hi
int vector = m_intack_handler();
- /* build effective address within first 8K page */
- m_ea = S2650_relative[vector] & PMSK;
- if (vector & 0x80) /* indirect bit set ? */
+
+ // build effective address within first 8K page
+ cycles += 9; // ZBSR
+ m_ea = util::sext(vector, 7) & PMSK;
+ if (vector & 0x80) // indirect bit set ?
{
int addr = m_ea;
cycles += 6;
- /* build indirect 32K address */
+
+ // build indirect 32K address
m_ea = RDMEM(addr) << 8;
if (!(++addr & PMSK)) addr -= PLEN;
m_ea = (m_ea + RDMEM(addr)) & AMSK;
@@ -237,6 +217,7 @@ inline int s2650_device::check_irq_line()
m_iar = m_ea & PMSK;
}
}
+
return cycles;
}
@@ -245,18 +226,7 @@ inline int s2650_device::check_irq_line()
* set condition code (zero,plus,minus) from result
***************************************************************/
#define SET_CC(result) \
- m_psl = (m_psl & ~CC) | ccc[result]
-
-/***************************************************************
- *
- * set condition code (zero,plus,minus) and overflow
- ***************************************************************/
-#define SET_CC_OVF(result,value) \
- m_psl = (m_psl & ~(OVF+CC)) | \
- ccc[result + (((value) & 0x80) << 1)]
-
-#define SET_CC_OVF_ADD(result,value1,value2) SET_CC_OVF(result,~((value1) ^ (value2)) & ((value1) ^ (result)))
-#define SET_CC_OVF_SUB(result,value1,value2) SET_CC_OVF(result,~((value1) ^ (value2)) & ((value1) ^ (result)))
+ m_psl = (m_psl & ~CC) | ccc[result & 0xff]
/***************************************************************
* ROP
@@ -288,13 +258,15 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address within current 8K page */ \
- m_ea = page + ((m_iar + S2650_relative[hr]) & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = m_ea; \
- m_icount -= 6; \
+ m_ea = page + ((m_iar + util::sext(hr, 7)) & PMSK); \
+ if (hr & 0x80) \
+ { \
+ /* indirect bit set ? */ \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -307,13 +279,15 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address from 0 */ \
- m_ea = (S2650_relative[hr] & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = m_ea; \
- m_icount -= 6; \
+ m_ea = (util::sext(hr, 7) & PMSK); \
+ if (hr & 0x80) \
+ { \
+ /* indirect bit set ? */ \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -324,38 +298,40 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define _ABS_EA() \
{ \
- uint8_t hr, dr; \
- hr = ARG(); /* get 'holding register' */ \
- dr = ARG(); /* get 'data bus register' */ \
+ uint8_t hr, dr; \
+ hr = ARG(); /* get 'holding register' */ \
+ dr = ARG(); /* get 'data bus register' */ \
/* build effective address within current 8K page */ \
m_ea = m_page + (((hr << 8) + dr) & PMSK); \
/* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = m_ea; \
- m_icount -= 6; \
+ if (hr & 0x80) \
+ { \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
/* check indexed addressing modes */ \
- switch (hr & 0x60) { \
+ switch (hr & 0x60) \
+ { \
case 0x00: /* not indexed */ \
break; \
case 0x20: /* auto increment indexed */ \
m_reg[m_r] += 1; \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
case 0x40: /* auto decrement indexed */ \
m_reg[m_r] -= 1; \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
case 0x60: /* indexed */ \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
} \
}
@@ -366,18 +342,19 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define _BRA_EA() \
{ \
- uint8_t hr, dr; \
- hr = ARG(); /* get 'holding register' */ \
- dr = ARG(); /* get 'data bus register' */ \
+ uint8_t hr, dr; \
+ hr = ARG(); /* get 'holding register' */ \
+ dr = ARG(); /* get 'data bus register' */ \
/* build address in 32K address space */ \
- m_ea = ((hr << 8) + dr) & AMSK; \
+ m_ea = ((hr << 8) + dr) & AMSK; \
/* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = m_ea; \
- m_icount -= 6; \
+ if (hr & 0x80) \
+ { \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -389,16 +366,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define SWAP_REGS \
{ \
- uint8_t tmp; \
- tmp = m_reg[1]; \
+ uint8_t tmp; \
+ tmp = m_reg[1]; \
m_reg[1] = m_reg[4]; \
- m_reg[4] = tmp; \
- tmp = m_reg[2]; \
+ m_reg[4] = tmp; \
+ tmp = m_reg[2]; \
m_reg[2] = m_reg[5]; \
- m_reg[5] = tmp; \
- tmp = m_reg[3]; \
+ m_reg[5] = tmp; \
+ tmp = m_reg[3]; \
m_reg[3] = m_reg[6]; \
- m_reg[6] = tmp; \
+ m_reg[6] = tmp; \
}
/***************************************************************
@@ -409,10 +386,14 @@ inline uint8_t s2650_device::ARG()
{ \
if (cond) \
{ \
- REL_EA( m_page ); \
+ REL_EA(m_page); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 1) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 1) & PMSK; \
+ } \
}
/***************************************************************
@@ -421,7 +402,7 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_ZBRR() \
{ \
- REL_ZERO( 0 ); \
+ REL_ZERO(0); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
}
@@ -432,12 +413,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BRA(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
BRA_EA(); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 2) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 2) & PMSK; \
+ } \
}
/***************************************************************
@@ -447,7 +432,7 @@ inline uint8_t s2650_device::ARG()
#define M_BXA() \
{ \
BRA_EA(); \
- m_ea = (m_ea + m_reg[3]) & AMSK; \
+ m_ea = (m_ea + m_reg[3]) & AMSK; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
}
@@ -458,14 +443,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BSR(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- REL_EA(m_page); \
- set_sp(get_sp() + 1); \
+ REL_EA(m_page); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 1) & PMSK; \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 1) & PMSK; \
+ } \
}
/***************************************************************
@@ -475,10 +464,10 @@ inline uint8_t s2650_device::ARG()
#define M_ZBSR() \
{ \
REL_ZERO(0); \
- set_sp(get_sp() + 1); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
}
/***************************************************************
@@ -487,14 +476,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BSA(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
BRA_EA(); \
- set_sp(get_sp() + 1); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 2) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 2) & PMSK; \
+ } \
}
/***************************************************************
@@ -504,8 +497,8 @@ inline uint8_t s2650_device::ARG()
#define M_BSXA() \
{ \
BRA_EA(); \
- m_ea = (m_ea + m_reg[3]) & AMSK; \
- set_sp(get_sp() + 1); \
+ m_ea = (m_ea + m_reg[3]) & AMSK; \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
@@ -517,13 +510,13 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RET(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- m_icount -= 6; \
- m_ea = m_ras[get_sp()]; \
- set_sp(get_sp() - 1); \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
+ m_icount -= 6; \
+ m_ea = m_ras[get_sp()]; \
+ set_sp(get_sp() - 1); \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
} \
}
@@ -535,14 +528,14 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RETE(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- m_ea = m_ras[get_sp()]; \
- set_sp(get_sp() - 1); \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
- set_psu(m_psu & ~II); \
- m_icount -= check_irq_line(); \
+ m_ea = m_ras[get_sp()]; \
+ set_sp(get_sp() - 1); \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
+ set_psu(m_psu & ~II); \
+ m_icount -= check_irq_line(); \
} \
}
@@ -600,15 +593,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_ADD(dest,_source) \
{ \
- uint8_t source = _source; \
- uint8_t before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* add source; carry only if WC is set */ \
- uint16_t res = dest + source + ((m_psl >> 3) & m_psl & C); \
- m_psl &= ~(C | OVF | IDC); \
- if(res & 0x100) m_psl |= C; \
+ uint16_t res = dest + source + ((m_psl >> 3) & m_psl & C); \
+ m_psl &= ~(C | OVF | IDC); \
+ if (res & 0x100) m_psl |= C; \
dest = res & 0xff; \
- if( (dest & 15) < (before & 15) ) m_psl |= IDC; \
- SET_CC_OVF_ADD(dest,before,source); \
+ if ((dest ^ before ^ source) & 0x10) m_psl |= IDC; \
+ if ((before ^ dest) & (source ^ dest) & 0x80) m_psl |= OVF; \
+ SET_CC(dest); \
}
/***************************************************************
@@ -618,15 +612,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_SUB(dest,_source) \
{ \
- uint8_t source = _source; \
- uint8_t before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* subtract source; borrow only if WC is set */ \
- uint16_t res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
- m_psl &= ~(C | OVF | IDC); \
- if((res & 0x100)==0) m_psl |= C; \
+ uint16_t res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
+ m_psl &= ~(C | OVF | IDC); \
+ if ((res & 0x100) == 0) m_psl |= C; \
dest = res & 0xff; \
- if( (dest & 15) <= (before & 15) ) m_psl |= IDC; \
- SET_CC_OVF_SUB(dest,before,source); \
+ if (~(dest ^ before ^ source) & 0x10) m_psl |= IDC; \
+ if ((before ^ source) & (before ^ dest) & 0x80) m_psl |= OVF; \
+ SET_CC(dest); \
}
/***************************************************************
@@ -636,13 +631,12 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_COM(reg,val) \
{ \
- int d; \
- m_psl &= ~CC; \
- if (m_psl & COM) d = (uint8_t)reg - (uint8_t)val; \
- else d = (int8_t)reg - (int8_t)val; \
- if( d < 0 ) m_psl |= 0x80; \
- else \
- if( d > 0 ) m_psl |= 0x40; \
+ int16_t res; \
+ m_psl &= ~CC; \
+ if (m_psl & COM) res = (uint8_t)reg - (uint8_t)val; \
+ else res = (int8_t)reg - (int8_t)val; \
+ if (res < 0) m_psl |= 0x80; \
+ else if (res > 0) m_psl |= 0x40; \
}
/***************************************************************
@@ -651,8 +645,8 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_DAR(dest) \
{ \
- if ((m_psl & C) == 0) dest += 0xA0; \
- if ((m_psl & IDC) == 0) dest = (dest & 0xF0) | ((dest + 0x0A) & 0x0F);\
+ if ((m_psl & C) == 0) dest += 0xa0; \
+ if ((m_psl & IDC) == 0) dest = (dest & 0xf0) | ((dest + 0x0a) & 0x0f); \
}
/***************************************************************
@@ -662,13 +656,13 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RRL(dest) \
{ \
- uint8_t before = dest; \
- if( m_psl & WC ) \
+ uint8_t before = dest; \
+ if (m_psl & WC) \
{ \
uint8_t c = m_psl & C; \
- m_psl &= ~(C + IDC); \
+ m_psl &= ~(C + IDC); \
dest = (before << 1) | c; \
- m_psl |= (before >> 7) + (dest & IDC); \
+ m_psl |= (before >> 7) + (dest & IDC); \
} \
else \
{ \
@@ -685,14 +679,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RRR(dest) \
{ \
- uint8_t before = dest; \
- if (m_psl & WC) \
+ uint8_t before = dest; \
+ if (m_psl & WC) \
{ \
uint8_t c = m_psl & C; \
- m_psl &= ~(C + IDC); \
+ m_psl &= ~(C + IDC); \
dest = (before >> 1) | (c << 7); \
- m_psl |= (before & C) + (dest & IDC); \
- } else dest = (before >> 1) | (before << 7); \
+ m_psl |= (before & C) + (dest & IDC); \
+ } \
+ else \
+ { \
+ dest = (before >> 1) | (before << 7); \
+ } \
SET_CC(dest); \
m_psl = (m_psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
}
@@ -716,7 +714,7 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_SPSL() \
{ \
- R0 = m_psl; \
+ R0 = m_psl; \
SET_CC(R0); \
}
@@ -727,8 +725,8 @@ inline uint8_t s2650_device::ARG()
#define M_CPSU() \
{ \
uint8_t cpsu = ARG() & ~SI; \
- set_psu(m_psu & ~cpsu); \
- m_icount -= check_irq_line(); \
+ set_psu(m_psu & ~cpsu); \
+ m_icount -= check_irq_line(); \
}
/***************************************************************
@@ -737,11 +735,11 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_CPSL() \
{ \
- uint8_t cpsl = ARG(); \
+ uint8_t cpsl = ARG(); \
/* select other register set now ? */ \
- if( (cpsl & RS) && (m_psl & RS) ) \
+ if ((cpsl & RS) && (m_psl & RS)) \
SWAP_REGS; \
- m_psl = m_psl & ~cpsl; \
+ m_psl = m_psl & ~cpsl; \
}
/***************************************************************
@@ -751,8 +749,8 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_PPSU() \
{ \
- uint8_t ppsu = (ARG() & ~PSU34) & ~SI; \
- set_psu(m_psu | ppsu); \
+ uint8_t ppsu = (ARG() & ~PSU34) & ~SI; \
+ set_psu(m_psu | ppsu); \
}
/***************************************************************
@@ -763,7 +761,7 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t ppsl = ARG(); \
/* select 2nd register set now ? */ \
- if ((ppsl & RS) && !(m_psl & RS)) \
+ if ((ppsl & RS) && !(m_psl & RS)) \
SWAP_REGS; \
m_psl = m_psl | ppsl; \
}
@@ -776,9 +774,9 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t tpsu = ARG(); \
uint8_t rpsu = get_psu(); \
- m_psl &= ~CC; \
- if( (rpsu & tpsu) != tpsu ) \
- m_psl |= 0x80; \
+ m_psl &= ~CC; \
+ if ((rpsu & tpsu) != tpsu) \
+ m_psl |= 0x80; \
}
/***************************************************************
@@ -788,10 +786,10 @@ inline uint8_t s2650_device::ARG()
#define M_TPSL() \
{ \
uint8_t tpsl = ARG(); \
- if( (m_psl & tpsl) != tpsl ) \
+ if ((m_psl & tpsl) != tpsl) \
m_psl = (m_psl & ~CC) | 0x80; \
else \
- m_psl &= ~CC; \
+ m_psl &= ~CC; \
}
/***************************************************************
@@ -800,10 +798,10 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_TMI(value) \
{ \
- uint8_t tmi = ARG(); \
- m_psl &= ~CC; \
- if( (value & tmi) != tmi ) \
- m_psl |= 0x80; \
+ uint8_t tmi = ARG(); \
+ m_psl &= ~CC; \
+ if ((value & tmi) != tmi) \
+ m_psl |= 0x80; \
}
#if INLINE_EA
@@ -910,7 +908,7 @@ void s2650_device::state_string_export(const device_state_entry &entry, std::str
switch (entry.index())
{
case STATE_GENFLAGS:
- str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
+ str = string_format("%c%c%c%c%c%c%c%c %c%c%c%c%c%c%c%c",
m_psu & 0x80 ? 'S':'.',
m_psu & 0x40 ? 'O':'.',
m_psu & 0x20 ? 'I':'.',
@@ -945,7 +943,7 @@ void s2650_device::device_reset()
memset(m_ras, 0, sizeof(m_ras));
m_psl = COM | WC;
- /* force write */
+ // force write
m_psu = 0xff;
set_psu(0);
}
@@ -991,9 +989,8 @@ void s2650_device::s2650_set_sense(int state)
void s2650_device::execute_run()
{
- /* check for external irqs */
- int cycles = check_irq_line();
- m_icount -= cycles;
+ // check for external irqs
+ m_icount -= check_irq_line();
do
{
@@ -1002,602 +999,589 @@ void s2650_device::execute_run()
debugger_instruction_hook(m_page + m_iar);
m_ir = ROP();
- m_r = m_ir & 3; /* register / value */
- switch (m_ir) {
- case 0x00: /* LODZ,0 */
- case 0x01: /* LODZ,1 */
- case 0x02: /* LODZ,2 */
- case 0x03: /* LODZ,3 */
+ m_r = m_ir & 3; // register / value
+ switch (m_ir)
+ {
+ case 0x00: // LODZ,0
+ case 0x01: // LODZ,1
+ case 0x02: // LODZ,2
+ case 0x03: // LODZ,3
m_icount -= 6;
- M_LOD( R0, m_reg[m_r] );
+ M_LOD(R0, m_reg[m_r]);
break;
- case 0x04: /* LODI,0 v */
- case 0x05: /* LODI,1 v */
- case 0x06: /* LODI,2 v */
- case 0x07: /* LODI,3 v */
+ case 0x04: // LODI,0 v
+ case 0x05: // LODI,1 v
+ case 0x06: // LODI,2 v
+ case 0x07: // LODI,3 v
m_icount -= 6;
- M_LOD( m_reg[m_r], ARG() );
+ M_LOD(m_reg[m_r], ARG());
break;
- case 0x08: /* LODR,0 (*)a */
- case 0x09: /* LODR,1 (*)a */
- case 0x0a: /* LODR,2 (*)a */
- case 0x0b: /* LODR,3 (*)a */
+ case 0x08: // LODR,0 (*)a
+ case 0x09: // LODR,1 (*)a
+ case 0x0a: // LODR,2 (*)a
+ case 0x0b: // LODR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_LOD( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_LOD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x0c: /* LODA,0 (*)a(,X) */
- case 0x0d: /* LODA,1 (*)a(,X) */
- case 0x0e: /* LODA,2 (*)a(,X) */
- case 0x0f: /* LODA,3 (*)a(,X) */
+ case 0x0c: // LODA,0 (*)a(,X)
+ case 0x0d: // LODA,1 (*)a(,X)
+ case 0x0e: // LODA,2 (*)a(,X)
+ case 0x0f: // LODA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_LOD( m_reg[m_r], RDMEM(m_ea) );
+ M_LOD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x10: /* illegal */
- case 0x11: /* illegal */
- m_icount -= 7;
- break;
- case 0x12: /* SPSU */
+ case 0x12: // SPSU
m_icount -= 6;
M_SPSU();
break;
- case 0x13: /* SPSL */
+ case 0x13: // SPSL
m_icount -= 6;
M_SPSL();
break;
- case 0x14: /* RETC,0 (zero) */
- case 0x15: /* RETC,1 (plus) */
- case 0x16: /* RETC,2 (minus) */
- m_icount -= 9; /* +2 cycles if condition is true */
- M_RET( (m_psl >> 6) == m_r );
+ case 0x14: // RETC,0 (zero)
+ case 0x15: // RETC,1 (plus)
+ case 0x16: // RETC,2 (minus)
+ m_icount -= 9; // +2 cycles if condition is true
+ M_RET((m_psl >> 6) == m_r);
break;
- case 0x17: /* RETC,3 (always) */
- m_icount -= 9; /* +2 cycles if condition is true */
- M_RET( 1 );
+ case 0x17: // RETC,3 (always)
+ m_icount -= 9; // +2 cycles if condition is true
+ M_RET(1);
break;
- case 0x18: /* BCTR,0 (*)a */
- case 0x19: /* BCTR,1 (*)a */
- case 0x1a: /* BCTR,2 (*)a */
+ case 0x18: // BCTR,0 (*)a
+ case 0x19: // BCTR,1 (*)a
+ case 0x1a: // BCTR,2 (*)a
m_icount -= 9;
- M_BRR( (m_psl >> 6) == m_r );
+ M_BRR((m_psl >> 6) == m_r);
break;
- case 0x1b: /* BCTR,3 (*)a */
+ case 0x1b: // BCTR,3 (*)a
m_icount -= 9;
- M_BRR( 1 );
+ M_BRR(1);
break;
- case 0x1c: /* BCTA,0 (*)a */
- case 0x1d: /* BCTA,1 (*)a */
- case 0x1e: /* BCTA,2 (*)a */
+ case 0x1c: // BCTA,0 (*)a
+ case 0x1d: // BCTA,1 (*)a
+ case 0x1e: // BCTA,2 (*)a
m_icount -= 9;
- M_BRA( (m_psl >> 6) == m_r );
+ M_BRA((m_psl >> 6) == m_r);
break;
- case 0x1f: /* BCTA,3 (*)a */
+ case 0x1f: // BCTA,3 (*)a
m_icount -= 9;
- M_BRA( 1 );
+ M_BRA(1);
break;
- case 0x20: /* EORZ,0 */
- case 0x21: /* EORZ,1 */
- case 0x22: /* EORZ,2 */
- case 0x23: /* EORZ,3 */
+ case 0x20: // EORZ,0
+ case 0x21: // EORZ,1
+ case 0x22: // EORZ,2
+ case 0x23: // EORZ,3
m_icount -= 6;
- M_EOR( R0, m_reg[m_r] );
+ M_EOR(R0, m_reg[m_r]);
break;
- case 0x24: /* EORI,0 v */
- case 0x25: /* EORI,1 v */
- case 0x26: /* EORI,2 v */
- case 0x27: /* EORI,3 v */
+ case 0x24: // EORI,0 v
+ case 0x25: // EORI,1 v
+ case 0x26: // EORI,2 v
+ case 0x27: // EORI,3 v
m_icount -= 6;
- M_EOR( m_reg[m_r], ARG() );
+ M_EOR(m_reg[m_r], ARG());
break;
- case 0x28: /* EORR,0 (*)a */
- case 0x29: /* EORR,1 (*)a */
- case 0x2a: /* EORR,2 (*)a */
- case 0x2b: /* EORR,3 (*)a */
+ case 0x28: // EORR,0 (*)a
+ case 0x29: // EORR,1 (*)a
+ case 0x2a: // EORR,2 (*)a
+ case 0x2b: // EORR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_EOR( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_EOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x2c: /* EORA,0 (*)a(,X) */
- case 0x2d: /* EORA,1 (*)a(,X) */
- case 0x2e: /* EORA,2 (*)a(,X) */
- case 0x2f: /* EORA,3 (*)a(,X) */
+ case 0x2c: // EORA,0 (*)a(,X)
+ case 0x2d: // EORA,1 (*)a(,X)
+ case 0x2e: // EORA,2 (*)a(,X)
+ case 0x2f: // EORA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_EOR( m_reg[m_r], RDMEM(m_ea) );
+ M_EOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x30: /* REDC,0 */
- case 0x31: /* REDC,1 */
- case 0x32: /* REDC,2 */
- case 0x33: /* REDC,3 */
+ case 0x30: // REDC,0
+ case 0x31: // REDC,1
+ case 0x32: // REDC,2
+ case 0x33: // REDC,3
m_icount -= 6;
m_reg[m_r] = m_data.read_byte(S2650_CTRL_PORT);
- SET_CC( m_reg[m_r] );
+ SET_CC(m_reg[m_r]);
break;
- case 0x34: /* RETE,0 */
- case 0x35: /* RETE,1 */
- case 0x36: /* RETE,2 */
+ case 0x34: // RETE,0
+ case 0x35: // RETE,1
+ case 0x36: // RETE,2
m_icount -= 9;
- M_RETE( (m_psl >> 6) == m_r );
+ M_RETE((m_psl >> 6) == m_r);
break;
- case 0x37: /* RETE,3 */
+ case 0x37: // RETE,3
m_icount -= 9;
- M_RETE( 1 );
+ M_RETE(1);
break;
- case 0x38: /* BSTR,0 (*)a */
- case 0x39: /* BSTR,1 (*)a */
- case 0x3a: /* BSTR,2 (*)a */
+ case 0x38: // BSTR,0 (*)a
+ case 0x39: // BSTR,1 (*)a
+ case 0x3a: // BSTR,2 (*)a
m_icount -= 9;
- M_BSR( (m_psl >> 6) == m_r );
+ M_BSR((m_psl >> 6) == m_r);
break;
- case 0x3b: /* BSTR,R3 (*)a */
+ case 0x3b: // BSTR,R3 (*)a
m_icount -= 9;
- M_BSR( 1 );
+ M_BSR(1);
break;
- case 0x3c: /* BSTA,0 (*)a */
- case 0x3d: /* BSTA,1 (*)a */
- case 0x3e: /* BSTA,2 (*)a */
+ case 0x3c: // BSTA,0 (*)a
+ case 0x3d: // BSTA,1 (*)a
+ case 0x3e: // BSTA,2 (*)a
m_icount -= 9;
- M_BSA( (m_psl >> 6) == m_r );
+ M_BSA((m_psl >> 6) == m_r);
break;
- case 0x3f: /* BSTA,3 (*)a */
+ case 0x3f: // BSTA,3 (*)a
m_icount -= 9;
- M_BSA( 1 );
+ M_BSA(1);
break;
- case 0x40: /* HALT */
+ case 0x40: // HALT
m_icount -= 6;
m_iar = (m_iar - 1) & PMSK;
m_halt = 1;
if (m_icount > 0)
m_icount = 0;
break;
- case 0x41: /* ANDZ,1 */
- case 0x42: /* ANDZ,2 */
- case 0x43: /* ANDZ,3 */
+ case 0x41: // ANDZ,1
+ case 0x42: // ANDZ,2
+ case 0x43: // ANDZ,3
m_icount -= 6;
- M_AND( R0, m_reg[m_r] );
+ M_AND(R0, m_reg[m_r]);
break;
- case 0x44: /* ANDI,0 v */
- case 0x45: /* ANDI,1 v */
- case 0x46: /* ANDI,2 v */
- case 0x47: /* ANDI,3 v */
+ case 0x44: // ANDI,0 v
+ case 0x45: // ANDI,1 v
+ case 0x46: // ANDI,2 v
+ case 0x47: // ANDI,3 v
m_icount -= 6;
- M_AND( m_reg[m_r], ARG() );
+ M_AND(m_reg[m_r], ARG());
break;
- case 0x48: /* ANDR,0 (*)a */
- case 0x49: /* ANDR,1 (*)a */
- case 0x4a: /* ANDR,2 (*)a */
- case 0x4b: /* ANDR,3 (*)a */
+ case 0x48: // ANDR,0 (*)a
+ case 0x49: // ANDR,1 (*)a
+ case 0x4a: // ANDR,2 (*)a
+ case 0x4b: // ANDR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_AND( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_AND(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x4c: /* ANDA,0 (*)a(,X) */
- case 0x4d: /* ANDA,1 (*)a(,X) */
- case 0x4e: /* ANDA,2 (*)a(,X) */
- case 0x4f: /* ANDA,3 (*)a(,X) */
+ case 0x4c: // ANDA,0 (*)a(,X)
+ case 0x4d: // ANDA,1 (*)a(,X)
+ case 0x4e: // ANDA,2 (*)a(,X)
+ case 0x4f: // ANDA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_AND( m_reg[m_r], RDMEM(m_ea) );
+ M_AND(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x50: /* RRR,0 */
- case 0x51: /* RRR,1 */
- case 0x52: /* RRR,2 */
- case 0x53: /* RRR,3 */
+ case 0x50: // RRR,0
+ case 0x51: // RRR,1
+ case 0x52: // RRR,2
+ case 0x53: // RRR,3
m_icount -= 6;
- M_RRR( m_reg[m_r] );
+ M_RRR(m_reg[m_r]);
break;
- case 0x54: /* REDE,0 v */
- case 0x55: /* REDE,1 v */
- case 0x56: /* REDE,2 v */
- case 0x57: /* REDE,3 v */
+ case 0x54: // REDE,0 v
+ case 0x55: // REDE,1 v
+ case 0x56: // REDE,2 v
+ case 0x57: // REDE,3 v
m_icount -= 9;
m_reg[m_r] = m_io.read_byte(ARG());
SET_CC(m_reg[m_r]);
break;
- case 0x58: /* BRNR,0 (*)a */
- case 0x59: /* BRNR,1 (*)a */
- case 0x5a: /* BRNR,2 (*)a */
- case 0x5b: /* BRNR,3 (*)a */
+ case 0x58: // BRNR,0 (*)a
+ case 0x59: // BRNR,1 (*)a
+ case 0x5a: // BRNR,2 (*)a
+ case 0x5b: // BRNR,3 (*)a
m_icount -= 9;
- M_BRR( m_reg[m_r] );
+ M_BRR(m_reg[m_r]);
break;
- case 0x5c: /* BRNA,0 (*)a */
- case 0x5d: /* BRNA,1 (*)a */
- case 0x5e: /* BRNA,2 (*)a */
- case 0x5f: /* BRNA,3 (*)a */
+ case 0x5c: // BRNA,0 (*)a
+ case 0x5d: // BRNA,1 (*)a
+ case 0x5e: // BRNA,2 (*)a
+ case 0x5f: // BRNA,3 (*)a
m_icount -= 9;
- M_BRA( m_reg[m_r] );
+ M_BRA(m_reg[m_r]);
break;
- case 0x60: /* IORZ,0 */
- case 0x61: /* IORZ,1 */
- case 0x62: /* IORZ,2 */
- case 0x63: /* IORZ,3 */
+ case 0x60: // IORZ,0
+ case 0x61: // IORZ,1
+ case 0x62: // IORZ,2
+ case 0x63: // IORZ,3
m_icount -= 6;
- M_IOR( R0, m_reg[m_r] );
+ M_IOR(R0, m_reg[m_r]);
break;
- case 0x64: /* IORI,0 v */
- case 0x65: /* IORI,1 v */
- case 0x66: /* IORI,2 v */
- case 0x67: /* IORI,3 v */
+ case 0x64: // IORI,0 v
+ case 0x65: // IORI,1 v
+ case 0x66: // IORI,2 v
+ case 0x67: // IORI,3 v
m_icount -= 6;
- M_IOR( m_reg[m_r], ARG() );
+ M_IOR(m_reg[m_r], ARG());
break;
- case 0x68: /* IORR,0 (*)a */
- case 0x69: /* IORR,1 (*)a */
- case 0x6a: /* IORR,2 (*)a */
- case 0x6b: /* IORR,3 (*)a */
+ case 0x68: // IORR,0 (*)a
+ case 0x69: // IORR,1 (*)a
+ case 0x6a: // IORR,2 (*)a
+ case 0x6b: // IORR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_IOR( m_reg[m_r],RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_IOR(m_reg[m_r],RDMEM(m_ea));
break;
- case 0x6c: /* IORA,0 (*)a(,X) */
- case 0x6d: /* IORA,1 (*)a(,X) */
- case 0x6e: /* IORA,2 (*)a(,X) */
- case 0x6f: /* IORA,3 (*)a(,X) */
+ case 0x6c: // IORA,0 (*)a(,X)
+ case 0x6d: // IORA,1 (*)a(,X)
+ case 0x6e: // IORA,2 (*)a(,X)
+ case 0x6f: // IORA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_IOR( m_reg[m_r], RDMEM(m_ea) );
+ M_IOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x70: /* REDD,0 */
- case 0x71: /* REDD,1 */
- case 0x72: /* REDD,2 */
- case 0x73: /* REDD,3 */
+ case 0x70: // REDD,0
+ case 0x71: // REDD,1
+ case 0x72: // REDD,2
+ case 0x73: // REDD,3
m_icount -= 6;
m_reg[m_r] = m_data.read_byte(S2650_DATA_PORT);
SET_CC(m_reg[m_r]);
break;
- case 0x74: /* CPSU */
+ case 0x74: // CPSU
m_icount -= 9;
M_CPSU();
break;
- case 0x75: /* CPSL */
+ case 0x75: // CPSL
m_icount -= 9;
M_CPSL();
break;
- case 0x76: /* PPSU */
+ case 0x76: // PPSU
m_icount -= 9;
M_PPSU();
break;
- case 0x77: /* PPSL */
+ case 0x77: // PPSL
m_icount -= 9;
M_PPSL();
break;
- case 0x78: /* BSNR,0 (*)a */
- case 0x79: /* BSNR,1 (*)a */
- case 0x7a: /* BSNR,2 (*)a */
- case 0x7b: /* BSNR,3 (*)a */
+ case 0x78: // BSNR,0 (*)a
+ case 0x79: // BSNR,1 (*)a
+ case 0x7a: // BSNR,2 (*)a
+ case 0x7b: // BSNR,3 (*)a
m_icount -= 9;
- M_BSR( m_reg[m_r] );
+ M_BSR(m_reg[m_r]);
break;
- case 0x7c: /* BSNA,0 (*)a */
- case 0x7d: /* BSNA,1 (*)a */
- case 0x7e: /* BSNA,2 (*)a */
- case 0x7f: /* BSNA,3 (*)a */
+ case 0x7c: // BSNA,0 (*)a
+ case 0x7d: // BSNA,1 (*)a
+ case 0x7e: // BSNA,2 (*)a
+ case 0x7f: // BSNA,3 (*)a
m_icount -= 9;
- M_BSA( m_reg[m_r] );
+ M_BSA(m_reg[m_r]);
break;
- case 0x80: /* ADDZ,0 */
- case 0x81: /* ADDZ,1 */
- case 0x82: /* ADDZ,2 */
- case 0x83: /* ADDZ,3 */
+ case 0x80: // ADDZ,0
+ case 0x81: // ADDZ,1
+ case 0x82: // ADDZ,2
+ case 0x83: // ADDZ,3
m_icount -= 6;
- M_ADD( R0,m_reg[m_r] );
+ M_ADD(R0,m_reg[m_r]);
break;
- case 0x84: /* ADDI,0 v */
- case 0x85: /* ADDI,1 v */
- case 0x86: /* ADDI,2 v */
- case 0x87: /* ADDI,3 v */
+ case 0x84: // ADDI,0 v
+ case 0x85: // ADDI,1 v
+ case 0x86: // ADDI,2 v
+ case 0x87: // ADDI,3 v
m_icount -= 6;
- M_ADD( m_reg[m_r], ARG() );
+ M_ADD(m_reg[m_r], ARG());
break;
- case 0x88: /* ADDR,0 (*)a */
- case 0x89: /* ADDR,1 (*)a */
- case 0x8a: /* ADDR,2 (*)a */
- case 0x8b: /* ADDR,3 (*)a */
+ case 0x88: // ADDR,0 (*)a
+ case 0x89: // ADDR,1 (*)a
+ case 0x8a: // ADDR,2 (*)a
+ case 0x8b: // ADDR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_ADD( m_reg[m_r], RDMEM(m_ea) );
+ M_ADD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x8c: /* ADDA,0 (*)a(,X) */
- case 0x8d: /* ADDA,1 (*)a(,X) */
- case 0x8e: /* ADDA,2 (*)a(,X) */
- case 0x8f: /* ADDA,3 (*)a(,X) */
+ case 0x8c: // ADDA,0 (*)a(,X)
+ case 0x8d: // ADDA,1 (*)a(,X)
+ case 0x8e: // ADDA,2 (*)a(,X)
+ case 0x8f: // ADDA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_ADD( m_reg[m_r], RDMEM(m_ea) );
+ M_ADD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x90: /* illegal */
- case 0x91: /* illegal */
- m_icount -= 7;
- break;
- case 0x92: /* LPSU */
+ case 0x92: // LPSU
m_icount -= 6;
set_psu((R0 & ~PSU34 & ~SI) | (m_psu & SI));
break;
- case 0x93: /* LPSL */
+ case 0x93: // LPSL
m_icount -= 6;
- /* change register set ? */
+ // change register set ?
if ((m_psl ^ R0) & RS)
SWAP_REGS;
m_psl = R0;
break;
- case 0x94: /* DAR,0 */
- case 0x95: /* DAR,1 */
- case 0x96: /* DAR,2 */
- case 0x97: /* DAR,3 */
+ case 0x94: // DAR,0
+ case 0x95: // DAR,1
+ case 0x96: // DAR,2
+ case 0x97: // DAR,3
m_icount -= 9;
- M_DAR( m_reg[m_r] );
+ M_DAR(m_reg[m_r]);
break;
- case 0x98: /* BCFR,0 (*)a */
- case 0x99: /* BCFR,1 (*)a */
- case 0x9a: /* BCFR,2 (*)a */
+ case 0x98: // BCFR,0 (*)a
+ case 0x99: // BCFR,1 (*)a
+ case 0x9a: // BCFR,2 (*)a
m_icount -= 9;
- M_BRR( (m_psl >> 6) != m_r );
+ M_BRR((m_psl >> 6) != m_r);
break;
- case 0x9b: /* ZBRR (*)a */
+ case 0x9b: // ZBRR (*)a
m_icount -= 9;
M_ZBRR();
break;
- case 0x9c: /* BCFA,0 (*)a */
- case 0x9d: /* BCFA,1 (*)a */
- case 0x9e: /* BCFA,2 (*)a */
+ case 0x9c: // BCFA,0 (*)a
+ case 0x9d: // BCFA,1 (*)a
+ case 0x9e: // BCFA,2 (*)a
m_icount -= 9;
- M_BRA( (m_psl >> 6) != m_r );
+ M_BRA((m_psl >> 6) != m_r);
break;
- case 0x9f: /* BXA (*)a */
+ case 0x9f: // BXA (*)a
m_icount -= 9;
M_BXA();
break;
- case 0xa0: /* SUBZ,0 */
- case 0xa1: /* SUBZ,1 */
- case 0xa2: /* SUBZ,2 */
- case 0xa3: /* SUBZ,3 */
+ case 0xa0: // SUBZ,0
+ case 0xa1: // SUBZ,1
+ case 0xa2: // SUBZ,2
+ case 0xa3: // SUBZ,3
m_icount -= 6;
- M_SUB( R0, m_reg[m_r] );
+ M_SUB(R0, m_reg[m_r]);
break;
- case 0xa4: /* SUBI,0 v */
- case 0xa5: /* SUBI,1 v */
- case 0xa6: /* SUBI,2 v */
- case 0xa7: /* SUBI,3 v */
+ case 0xa4: // SUBI,0 v
+ case 0xa5: // SUBI,1 v
+ case 0xa6: // SUBI,2 v
+ case 0xa7: // SUBI,3 v
m_icount -= 6;
- M_SUB( m_reg[m_r], ARG() );
+ M_SUB(m_reg[m_r], ARG());
break;
- case 0xa8: /* SUBR,0 (*)a */
- case 0xa9: /* SUBR,1 (*)a */
- case 0xaa: /* SUBR,2 (*)a */
- case 0xab: /* SUBR,3 (*)a */
+ case 0xa8: // SUBR,0 (*)a
+ case 0xa9: // SUBR,1 (*)a
+ case 0xaa: // SUBR,2 (*)a
+ case 0xab: // SUBR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_SUB( m_reg[m_r], RDMEM(m_ea) );
+ M_SUB(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xac: /* SUBA,0 (*)a(,X) */
- case 0xad: /* SUBA,1 (*)a(,X) */
- case 0xae: /* SUBA,2 (*)a(,X) */
- case 0xaf: /* SUBA,3 (*)a(,X) */
+ case 0xac: // SUBA,0 (*)a(,X)
+ case 0xad: // SUBA,1 (*)a(,X)
+ case 0xae: // SUBA,2 (*)a(,X)
+ case 0xaf: // SUBA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_SUB( m_reg[m_r], RDMEM(m_ea) );
+ M_SUB(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xb0: /* WRTC,0 */
- case 0xb1: /* WRTC,1 */
- case 0xb2: /* WRTC,2 */
- case 0xb3: /* WRTC,3 */
+ case 0xb0: // WRTC,0
+ case 0xb1: // WRTC,1
+ case 0xb2: // WRTC,2
+ case 0xb3: // WRTC,3
m_icount -= 6;
m_data.write_byte(S2650_CTRL_PORT,m_reg[m_r]);
break;
- case 0xb4: /* TPSU */
+ case 0xb4: // TPSU
m_icount -= 9;
M_TPSU();
break;
- case 0xb5: /* TPSL */
+ case 0xb5: // TPSL
m_icount -= 9;
M_TPSL();
break;
- case 0xb6: /* illegal */
- case 0xb7: /* illegal */
- m_icount -= 7;
- break;
- case 0xb8: /* BSFR,0 (*)a */
- case 0xb9: /* BSFR,1 (*)a */
- case 0xba: /* BSFR,2 (*)a */
+ case 0xb8: // BSFR,0 (*)a
+ case 0xb9: // BSFR,1 (*)a
+ case 0xba: // BSFR,2 (*)a
m_icount -= 9;
- M_BSR( (m_psl >> 6) != m_r );
+ M_BSR((m_psl >> 6) != m_r);
break;
- case 0xbb: /* ZBSR (*)a */
+ case 0xbb: // ZBSR (*)a
m_icount -= 9;
M_ZBSR();
break;
- case 0xbc: /* BSFA,0 (*)a */
- case 0xbd: /* BSFA,1 (*)a */
- case 0xbe: /* BSFA,2 (*)a */
+ case 0xbc: // BSFA,0 (*)a
+ case 0xbd: // BSFA,1 (*)a
+ case 0xbe: // BSFA,2 (*)a
m_icount -= 9;
- M_BSA( (m_psl >> 6) != m_r );
+ M_BSA((m_psl >> 6) != m_r);
break;
- case 0xbf: /* BSXA (*)a */
+ case 0xbf: // BSXA (*)a
m_icount -= 9;
M_BSXA();
break;
- case 0xc0: /* NOP */
+ case 0xc0: // NOP
m_icount -= 6;
break;
- case 0xc1: /* STRZ,1 */
- case 0xc2: /* STRZ,2 */
- case 0xc3: /* STRZ,3 */
+ case 0xc1: // STRZ,1
+ case 0xc2: // STRZ,2
+ case 0xc3: // STRZ,3
m_icount -= 6;
- M_LOD( m_reg[m_r], R0 );
- break;
-
- case 0xc4: /* illegal */
- case 0xc5: /* illegal */
- case 0xc6: /* illegal */
- case 0xc7: /* illegal */
- m_icount -= 7;
+ M_LOD(m_reg[m_r], R0);
break;
- case 0xc8: /* STRR,0 (*)a */
- case 0xc9: /* STRR,1 (*)a */
- case 0xca: /* STRR,2 (*)a */
- case 0xcb: /* STRR,3 (*)a */
+ case 0xc8: // STRR,0 (*)a
+ case 0xc9: // STRR,1 (*)a
+ case 0xca: // STRR,2 (*)a
+ case 0xcb: // STRR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_STR( m_ea, m_reg[m_r] );
+ M_STR(m_ea, m_reg[m_r]);
break;
- case 0xcc: /* STRA,0 (*)a(,X) */
- case 0xcd: /* STRA,1 (*)a(,X) */
- case 0xce: /* STRA,2 (*)a(,X) */
- case 0xcf: /* STRA,3 (*)a(,X) */
+ case 0xcc: // STRA,0 (*)a(,X)
+ case 0xcd: // STRA,1 (*)a(,X)
+ case 0xce: // STRA,2 (*)a(,X)
+ case 0xcf: // STRA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_STR( m_ea, m_reg[m_r] );
+ M_STR(m_ea, m_reg[m_r]);
break;
- case 0xd0: /* RRL,0 */
- case 0xd1: /* RRL,1 */
- case 0xd2: /* RRL,2 */
- case 0xd3: /* RRL,3 */
+ case 0xd0: // RRL,0
+ case 0xd1: // RRL,1
+ case 0xd2: // RRL,2
+ case 0xd3: // RRL,3
m_icount -= 6;
- M_RRL( m_reg[m_r] );
+ M_RRL(m_reg[m_r]);
break;
- case 0xd4: /* WRTE,0 v */
- case 0xd5: /* WRTE,1 v */
- case 0xd6: /* WRTE,2 v */
- case 0xd7: /* WRTE,3 v */
+ case 0xd4: // WRTE,0 v
+ case 0xd5: // WRTE,1 v
+ case 0xd6: // WRTE,2 v
+ case 0xd7: // WRTE,3 v
m_icount -= 9;
- m_io.write_byte( ARG(), m_reg[m_r] );
+ m_io.write_byte(ARG(), m_reg[m_r]);
break;
- case 0xd8: /* BIRR,0 (*)a */
- case 0xd9: /* BIRR,1 (*)a */
- case 0xda: /* BIRR,2 (*)a */
- case 0xdb: /* BIRR,3 (*)a */
+ case 0xd8: // BIRR,0 (*)a
+ case 0xd9: // BIRR,1 (*)a
+ case 0xda: // BIRR,2 (*)a
+ case 0xdb: // BIRR,3 (*)a
m_icount -= 9;
- M_BRR( ++m_reg[m_r] );
+ M_BRR(++m_reg[m_r]);
break;
- case 0xdc: /* BIRA,0 (*)a */
- case 0xdd: /* BIRA,1 (*)a */
- case 0xde: /* BIRA,2 (*)a */
- case 0xdf: /* BIRA,3 (*)a */
+ case 0xdc: // BIRA,0 (*)a
+ case 0xdd: // BIRA,1 (*)a
+ case 0xde: // BIRA,2 (*)a
+ case 0xdf: // BIRA,3 (*)a
m_icount -= 9;
- M_BRA( ++m_reg[m_r] );
+ M_BRA(++m_reg[m_r]);
break;
- case 0xe0: /* COMZ,0 */
- case 0xe1: /* COMZ,1 */
- case 0xe2: /* COMZ,2 */
- case 0xe3: /* COMZ,3 */
+ case 0xe0: // COMZ,0
+ case 0xe1: // COMZ,1
+ case 0xe2: // COMZ,2
+ case 0xe3: // COMZ,3
m_icount -= 6;
- M_COM( R0, m_reg[m_r] );
+ M_COM(R0, m_reg[m_r]);
break;
- case 0xe4: /* COMI,0 v */
- case 0xe5: /* COMI,1 v */
- case 0xe6: /* COMI,2 v */
- case 0xe7: /* COMI,3 v */
+ case 0xe4: // COMI,0 v
+ case 0xe5: // COMI,1 v
+ case 0xe6: // COMI,2 v
+ case 0xe7: // COMI,3 v
m_icount -= 6;
- M_COM( m_reg[m_r], ARG() );
+ M_COM(m_reg[m_r], ARG());
break;
- case 0xe8: /* COMR,0 (*)a */
- case 0xe9: /* COMR,1 (*)a */
- case 0xea: /* COMR,2 (*)a */
- case 0xeb: /* COMR,3 (*)a */
+ case 0xe8: // COMR,0 (*)a
+ case 0xe9: // COMR,1 (*)a
+ case 0xea: // COMR,2 (*)a
+ case 0xeb: // COMR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_COM( m_reg[m_r], RDMEM(m_ea) );
+ M_COM(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xec: /* COMA,0 (*)a(,X) */
- case 0xed: /* COMA,1 (*)a(,X) */
- case 0xee: /* COMA,2 (*)a(,X) */
- case 0xef: /* COMA,3 (*)a(,X) */
+ case 0xec: // COMA,0 (*)a(,X)
+ case 0xed: // COMA,1 (*)a(,X)
+ case 0xee: // COMA,2 (*)a(,X)
+ case 0xef: // COMA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_COM( m_reg[m_r], RDMEM(m_ea) );
+ M_COM(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xf0: /* WRTD,0 */
- case 0xf1: /* WRTD,1 */
- case 0xf2: /* WRTD,2 */
- case 0xf3: /* WRTD,3 */
+ case 0xf0: // WRTD,0
+ case 0xf1: // WRTD,1
+ case 0xf2: // WRTD,2
+ case 0xf3: // WRTD,3
m_icount -= 6;
m_data.write_byte(S2650_DATA_PORT, m_reg[m_r]);
break;
- case 0xf4: /* TMI,0 v */
- case 0xf5: /* TMI,1 v */
- case 0xf6: /* TMI,2 v */
- case 0xf7: /* TMI,3 v */
+ case 0xf4: // TMI,0 v
+ case 0xf5: // TMI,1 v
+ case 0xf6: // TMI,2 v
+ case 0xf7: // TMI,3 v
m_icount -= 9;
- M_TMI( m_reg[m_r] );
+ M_TMI(m_reg[m_r]);
break;
- case 0xf8: /* BDRR,0 (*)a */
- case 0xf9: /* BDRR,1 (*)a */
- case 0xfa: /* BDRR,2 (*)a */
- case 0xfb: /* BDRR,3 (*)a */
+ case 0xf8: // BDRR,0 (*)a
+ case 0xf9: // BDRR,1 (*)a
+ case 0xfa: // BDRR,2 (*)a
+ case 0xfb: // BDRR,3 (*)a
m_icount -= 9;
- M_BRR( --m_reg[m_r] );
+ M_BRR(--m_reg[m_r]);
break;
- case 0xfc: /* BDRA,0 (*)a */
- case 0xfd: /* BDRA,1 (*)a */
- case 0xfe: /* BDRA,2 (*)a */
- case 0xff: /* BDRA,3 (*)a */
+ case 0xfc: // BDRA,0 (*)a
+ case 0xfd: // BDRA,1 (*)a
+ case 0xfe: // BDRA,2 (*)a
+ case 0xff: // BDRA,3 (*)a
m_icount -= 9;
- M_BRA( --m_reg[m_r] );
+ M_BRA(--m_reg[m_r]);
+ break;
+
+ default: // illegal
+ m_icount -= 6;
+ logerror("%s: illegal opcode $%02X @ $%04X\n", tag(), m_ppc, m_ir);
break;
}
- } while( m_icount > 0 );
+ } while (m_icount > 0);
}
diff --git a/src/devices/cpu/s2650/s2650.h b/src/devices/cpu/s2650/s2650.h
index 008ea0bb31f..fec4760c4b6 100644
--- a/src/devices/cpu/s2650/s2650.h
+++ b/src/devices/cpu/s2650/s2650.h
@@ -38,13 +38,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
- virtual uint32_t execute_max_cycles() const noexcept override { return 13; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
+ virtual uint32_t execute_min_cycles() const noexcept override { return 6; }
+ virtual uint32_t execute_max_cycles() const noexcept override { return 18+15; } // includes interrupt
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -70,17 +69,17 @@ private:
devcb_write_line m_flag_handler;
devcb_read8 m_intack_handler;
- uint16_t m_ppc; /* previous program counter (page + iar) */
- uint16_t m_page; /* 8K page select register (A14..A13) */
- uint16_t m_iar; /* instruction address register (A12..A0) */
- uint16_t m_ea; /* effective address (A14..A0) */
- uint8_t m_psl; /* processor status lower */
- uint8_t m_psu; /* processor status upper */
- uint8_t m_r; /* absolute addressing dst/src register */
- uint8_t m_reg[7]; /* 7 general purpose registers */
- uint8_t m_halt; /* 1 if cpu is halted */
- uint8_t m_ir; /* instruction register */
- uint16_t m_ras[8]; /* 8 return address stack entries */
+ uint16_t m_ppc; // previous program counter (page + iar)
+ uint16_t m_page; // 8K page select register (A14..A13)
+ uint16_t m_iar; // instruction address register (A12..A0)
+ uint16_t m_ea; // effective address (A14..A0)
+ uint8_t m_psl; // processor status lower
+ uint8_t m_psu; // processor status upper
+ uint8_t m_r; // absolute addressing dst/src register
+ uint8_t m_reg[7]; // 7 general purpose registers
+ uint8_t m_halt; // 1 if cpu is halted
+ uint8_t m_ir; // instruction register
+ uint16_t m_ras[8]; // 8 return address stack entries
uint8_t m_irq_state;
int m_icount;
diff --git a/src/devices/cpu/s2650/s2650cpu.h b/src/devices/cpu/s2650/s2650cpu.h
deleted file mode 100644
index c4ff88f7aff..00000000000
--- a/src/devices/cpu/s2650/s2650cpu.h
+++ /dev/null
@@ -1,33 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Juergen Buchmueller
-/*******************************************************
- *
- * Portable Signetics 2650 cpu emulation
- *
- *******************************************************/
-
-#define PMSK 0x1fff /* mask page offset */
-#define PLEN 0x2000 /* page length */
-#define PAGE 0x6000 /* mask page */
-#define AMSK 0x7fff /* mask address range */
-
-/* processor status lower */
-#define C 0x01 /* carry flag */
-#define COM 0x02 /* compare: 0 binary, 1 2s complement */
-#define OVF 0x04 /* 2s complement overflow */
-#define WC 0x08 /* with carry: use carry in arithmetic / rotate ops */
-#define RS 0x10 /* register select 0: R0/R1/R2/R3 1: R0/R4/R5/R6 */
-#define IDC 0x20 /* inter digit carry: bit-3-to-bit-4 carry */
-#define CC 0xc0 /* condition code */
-
-/* processor status upper */
-#define SP 0x07 /* stack pointer: indexing 8 15bit words */
-#define PSU34 0x18 /* unused bits */
-#define II 0x20 /* interrupt inhibit 0: allow, 1: inhibit */
-#define FO 0x40 /* flag output */
-#define SI 0x80 /* sense input */
-
-#define R0 m_reg[0]
-#define R1 m_reg[1]
-#define R2 m_reg[2]
-#define R3 m_reg[3]
diff --git a/src/devices/cpu/saturn/saturn.cpp b/src/devices/cpu/saturn/saturn.cpp
index 3c89c9239ad..4ca7d0aadc7 100644
--- a/src/devices/cpu/saturn/saturn.cpp
+++ b/src/devices/cpu/saturn/saturn.cpp
@@ -337,17 +337,19 @@ void saturn_device::execute_run()
{
do
{
- m_oldpc = m_pc;
-
- debugger_instruction_hook(m_pc);
-
if ( m_sleeping )
{
+ debugger_wait_hook();
+
/* advance time when sleeping */
m_icount -= 100;
}
else
{
+ m_oldpc = m_pc;
+
+ debugger_instruction_hook(m_pc);
+
/* takes irq */
if ( m_pending_irq && (!m_in_irq) )
saturn_take_irq();
diff --git a/src/devices/cpu/saturn/saturn.h b/src/devices/cpu/saturn/saturn.h
index 5111de6d7ed..3a2132d260f 100644
--- a/src/devices/cpu/saturn/saturn.h
+++ b/src/devices/cpu/saturn/saturn.h
@@ -80,13 +80,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 21; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/sc61860/sc61860.cpp b/src/devices/cpu/sc61860/sc61860.cpp
index 70743897fe6..869339d85d7 100644
--- a/src/devices/cpu/sc61860/sc61860.cpp
+++ b/src/devices/cpu/sc61860/sc61860.cpp
@@ -6,7 +6,7 @@
* portable sharp 61860 emulator interface
* (sharp pocket computers)
*
- * Copyright Peter Trauner, all rights reserved.
+ * Copyright Peter Trauner
*
* History of changes:
* 29.7.2001 Several changes listed below taken by Mario Konegger
diff --git a/src/devices/cpu/sc61860/sc61860.h b/src/devices/cpu/sc61860/sc61860.h
index df019b6b845..bbfb2f3740e 100644
--- a/src/devices/cpu/sc61860/sc61860.h
+++ b/src/devices/cpu/sc61860/sc61860.h
@@ -6,7 +6,7 @@
* portable sharp 61860 emulator interface
* (sharp pocket computers)
*
- * Copyright Peter Trauner, all rights reserved.
+ * Copyright Peter Trauner
*
*****************************************************************************/
@@ -68,13 +68,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/sc61860/scdasm.cpp b/src/devices/cpu/sc61860/scdasm.cpp
index 8b14a920d62..7ab30cdc44e 100644
--- a/src/devices/cpu/sc61860/scdasm.cpp
+++ b/src/devices/cpu/sc61860/scdasm.cpp
@@ -6,7 +6,7 @@
* portable sharp 61860 emulator interface
* (sharp pocket computers)
*
- * Copyright Peter Trauner, all rights reserved.
+ * Copyright Peter Trauner
*
*****************************************************************************/
@@ -66,40 +66,47 @@
*/
const sc61860_disassembler::opcode sc61860_disassembler::table[]={
+// 00-0F / 0-3 4-7 8-B C-F
{ "LII", Imm }, { "LIJ", Imm }, { "LIA", Imm }, { "LIB", Imm },
{ "IX", Imp }, { "DX", Imp }, { "IY", Imp }, { "DY", Imp },
{ "MVW", Imp }, { "EXW", Imp }, { "MVB", Imp }, { "EXB", Imp },
{ "ADN", Imp }, { "SBN", Imp }, { "ADW", Imp }, { "SBW", Imp },
+// 10-1F / 0-3 4-7 8-B C-F
{ "LIDP", ImmW}, { "LIDL", Imm }, { "LIP", Imm }, { "LIQ", Imm },
{ "ADB", Imp }, { "SBB", Imp }, { "LIDP", ImmW}, { "LIDL", Imm },
{ "MVWD", Imp }, { "EXWD", Imp }, { "MVBD", Imp }, { "EXBD", Imp },
{ "SRW", Imp }, { "SLW", Imp }, { "FILM", Imp }, { "FILD", Imp },
- { "LDP", Imp }, { "LPQ", Imp }, { "LPR", Imp }, { nullptr, Ill },
+// 20-2F / 0-3 4-7 8-B C-F
+ { "LDP", Imp }, { "LPQ", Imp }, { "LPR", Imp }, { "CLRA", /* =RA undocumented */ Imp },
{ "IXL", Imp }, { "DXL", Imp }, { "IYS", Imp }, { "DYS", Imp },
{ "JRNZP", RelP}, { "JRNZM", RelM}, { "JRNCP", RelP}, { "JRNCM", RelM},
{ "JRP", RelP}, { "JRM", RelM}, { nullptr, Ill }, { "LOOP", RelM},
+// 30-3F / 0-3 4-7 8-B C-F
{ "STP", Imp }, { "STQ", Imp }, { "STR", Imp }, { nullptr, Ill },
{ "PUSH", Imp }, { "DATA", Imp }, { nullptr, Ill }, { "RTN", Imp },
{ "JRZP", RelP}, { "JRZM", RelM}, { "JRCP", RelP}, { "JRCM", RelM},
{ nullptr, Ill }, { nullptr, Ill }, { nullptr, Ill }, { nullptr, Ill },
+// 40-4F / 0-3 4-7 8-B C-F
{ "INCI", Imp }, { "DECI", Imp }, { "INCA", Imp }, { "DECA", Imp },
{ "ADM", Imp }, { "SBM", Imp }, { "ANMA", Imp }, { "ORMA", Imp },
{ "INCK", Imp }, { "DECK", Imp }, { "INCV", Imp }, { "DECV", Imp },
- { "INA", Imp }, { "NOPW", Imp }, { "WAIT", Imm }, { "IPXL"/*CDN, lxn*/, Imp },
+ { "INA", Imp }, { "NOPW", Imp }, { "WAIT", Imm }, { "IPXL"/* =CDN, lxn*/, Imp },
+// 50-5F / 0-3 4-7 8-B C-F
{ "INCP", Imp }, { "DECP", Imp }, { "STD", Imp }, { "MVDM", Imp },
{ "READM",/*mvmp*/ Imp }, { "MVMD", Imp }, { "READ"/*ldpc*/, Imp }, { "LDD", Imp },
{ "SWP", Imp }, { "LDM", Imp }, { "SL", Imp }, { "POP", Imp },
{ nullptr, Ill }, { "OUTA", Imp }, { nullptr, Ill }, { "OUTF", Imp },
+// 60-5F / 0-3 4-7 8-B C-F
{ "ANIM", Imm }, { "ORIM", Imm }, { "TSIM", Imm }, { "CPIM", Imm },
{ "ANIA", Imm }, { "ORIA", Imm }, { "TSIA", Imm }, { "CPIA", Imm },
{ nullptr, Ill }, { "ETC", Etc }, { nullptr, Ill }, { "TEST", Imm },
- { nullptr, Ill }, { nullptr, Ill }, { nullptr, Ill }, { "IPXH"/*CDN,lxp*/, Imp },
+ { nullptr, Ill }, { nullptr, Ill }, { nullptr, Ill }, { "IPXH"/* =CUP,lxp*/, Imp },
{ "ADIM", Imm }, { "SBIM", Imm }, { nullptr, Ill }, { nullptr, Ill },
{ "ADIA", Imm }, { "SBIA", Imm }, { nullptr, Ill }, { nullptr, Ill },
@@ -172,11 +179,11 @@ offs_t sc61860_disassembler::disassemble(std::ostream &stream, offs_t pc, const
util::stream_format(stream,"%-6s%04x",table[oper].mnemonic, adr);
break;
case RelM:
- adr=pc-opcodes.r8(pos++);
+ adr=pc-opcodes.r8(pos++)+1;
util::stream_format(stream,"%-6s%04x",table[oper].mnemonic, adr&0xffff);
break;
case RelP:
- adr=pc+opcodes.r8(pos++);
+ adr=pc+opcodes.r8(pos++)+1;
util::stream_format(stream,"%-6s%04x",table[oper].mnemonic, adr&0xffff);
break;
case Ptc:
diff --git a/src/devices/cpu/sc61860/scdasm.h b/src/devices/cpu/sc61860/scdasm.h
index 575106ac2c8..4a5445ba4f0 100644
--- a/src/devices/cpu/sc61860/scdasm.h
+++ b/src/devices/cpu/sc61860/scdasm.h
@@ -6,7 +6,7 @@
* portable sharp 61860 emulator interface
* (sharp pocket computers)
*
- * Copyright Peter Trauner, all rights reserved.
+ * Copyright Peter Trauner
*
*****************************************************************************/
diff --git a/src/devices/cpu/sc61860/scops.hxx b/src/devices/cpu/sc61860/scops.hxx
index f43d41cf0c3..967d0be6d56 100644
--- a/src/devices/cpu/sc61860/scops.hxx
+++ b/src/devices/cpu/sc61860/scops.hxx
@@ -6,7 +6,7 @@
* portable sharp 61860 emulator interface
* (sharp pocket computers)
*
- * Copyright Peter Trauner, all rights reserved.
+ * Copyright Peter Trauner
*
* History of changes:
* 21.07.2001 Several changes listed below were made by Mario Konegger
@@ -740,9 +740,8 @@ void sc61860_device::sc61860_exchange_ext(int count)
}
}
-// undocumented
-// only 1 opcode working in pc1403
-// both opcodes working in pc1350
+// Documented in PC1350_MachineLanguage: IPXL = CDN, IPXH = CUP
+// only 1 opcode working in pc1403 (IPXL, or IPXH?)
void sc61860_device::sc61860_wait_x(int level)
{
int c;
diff --git a/src/devices/cpu/sc61860/sctable.hxx b/src/devices/cpu/sc61860/sctable.hxx
index 822867017fb..f8520f99c20 100644
--- a/src/devices/cpu/sc61860/sctable.hxx
+++ b/src/devices/cpu/sc61860/sctable.hxx
@@ -42,6 +42,7 @@ void sc61860_device::sc61860_instruction()
case 32: sc61860_store_p();m_icount-=2;break;
case 33: sc61860_store_q();m_icount-=2;break;
case 34: sc61860_store_r();m_icount-=2;break;
+ case 35: sc61860_load_imm(A, 0);m_icount-=2/*?*/;break; // undocumented
case 36: sc61860_inc_load_dp_load();m_icount-=7;break;
case 37: sc61860_dec_load_dp_load();m_icount-=7;break;
case 38: sc61860_inc_load_dp_store();m_icount-=7;break;
@@ -83,9 +84,9 @@ void sc61860_device::sc61860_instruction()
case 81: sc61860_dec_p();m_icount-=2;break;
case 82: sc61860_store_ext(A);m_icount-=2;break;
case 83: sc61860_store_ext(m_p);m_icount-=2;break;
- case 84: sc61860_load_imm(m_p, READ_OP());m_icount-=3/*?*/;break; // undocumented
+ case 84: sc61860_load_imm(m_p, READ_OP());m_icount-=3/*?*/;break; // PC1350: 0x54 READM undocumented
case 85: sc61860_load_ext(m_p);m_icount-=3;break;
- case 86: sc61860_load_imm(m_p, READ_OP());m_icount-=3/*?*/;break; // undocumented
+ case 86: sc61860_load_imm(m_p, READ_OP());m_icount-=3/*?*/;break; // PC1350: 0x56 READ undocumented
case 87: sc61860_load_ext(A);m_icount-=3;break;
case 88: sc61860_swap();m_icount-=2;break;
case 89: sc61860_load();m_icount-=2;break;
diff --git a/src/devices/cpu/scmp/scmp.cpp b/src/devices/cpu/scmp/scmp.cpp
index f37308da5a5..efd89f31469 100644
--- a/src/devices/cpu/scmp/scmp.cpp
+++ b/src/devices/cpu/scmp/scmp.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Miodrag Milanovic
/*****************************************************************************
*
- * scmp.c
+ * scmp.cpp
*
* National Semiconductor SC/MP CPU emulation
* (SC/MP = Simple-to-use, Cost-effective MicroProcessor)
@@ -30,7 +30,7 @@ scmp_device::scmp_device(const machine_config &mconfig, const char *tag, device_
scmp_device::scmp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, 8, 16, 0)
- , m_AC(0), m_ER(0), m_SR(0), m_icount(0)
+ , m_AC(0), m_ER(0), m_SR(0)
, m_flag_out_func(*this)
, m_sout_func(*this)
, m_sin_func(*this, 0)
@@ -483,23 +483,23 @@ void scmp_device::execute_run()
void scmp_device::device_start()
{
- /* set up the state table */
- {
- state_add(SCMP_PC, "PC", m_PC.w.l);
- state_add(STATE_GENPC, "GENPC", m_PC.w.l).noshow();
- state_add(STATE_GENPCBASE, "CURPC", m_PC.w.l).noshow();
- state_add(STATE_GENFLAGS, "GENFLAGS", m_SR).noshow().formatstr("%8s");
- state_add(SCMP_P1, "P1", m_P1.w.l);
- state_add(SCMP_P2, "P2", m_P2.w.l);
- state_add(SCMP_P3, "P3", m_P3.w.l);
- state_add(SCMP_AC, "AC", m_AC);
- state_add(SCMP_ER, "ER", m_ER);
- state_add(SCMP_SR, "SR", m_SR);
- }
-
space(AS_PROGRAM).cache(m_cache);
space(AS_PROGRAM).specific(m_program);
+ // set up the state table
+ state_add(SCMP_PC, "PC", m_PC.w.l);
+ state_add(STATE_GENPC, "GENPC", m_PC.w.l).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_PC.w.l).noshow();
+ state_add(STATE_GENFLAGS, "GENFLAGS", m_SR).noshow().formatstr("%8s");
+
+ state_add(SCMP_P1, "P1", m_P1.w.l);
+ state_add(SCMP_P2, "P2", m_P2.w.l);
+ state_add(SCMP_P3, "P3", m_P3.w.l);
+ state_add(SCMP_AC, "AC", m_AC);
+ state_add(SCMP_ER, "ER", m_ER);
+ state_add(SCMP_SR, "SR", m_SR);
+
+ // register for savestates
save_item(NAME(m_PC));
save_item(NAME(m_P1));
save_item(NAME(m_P2));
diff --git a/src/devices/cpu/scmp/scmp.h b/src/devices/cpu/scmp/scmp.h
index 9928bf57290..9c102d240f2 100644
--- a/src/devices/cpu/scmp/scmp.h
+++ b/src/devices/cpu/scmp/scmp.h
@@ -29,13 +29,12 @@ protected:
scmp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 23+8; } // max opcode + interrupt
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
@@ -54,13 +53,14 @@ private:
PAIR m_P1;
PAIR m_P2;
PAIR m_P3;
- uint8_t m_AC;
- uint8_t m_ER;
- uint8_t m_SR;
+ uint8_t m_AC;
+ uint8_t m_ER;
+ uint8_t m_SR;
memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cache;
memory_access<16, 0, 0, ENDIANNESS_BIG>::specific m_program;
- int m_icount;
+
+ int m_icount;
devcb_write8 m_flag_out_func;
devcb_write_line m_sout_func;
diff --git a/src/devices/cpu/score/score.h b/src/devices/cpu/score/score.h
index badf1b2b0d8..b6328729a1a 100644
--- a/src/devices/cpu/score/score.h
+++ b/src/devices/cpu/score/score.h
@@ -37,13 +37,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 64; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/scudsp/scudsp.cpp b/src/devices/cpu/scudsp/scudsp.cpp
index 2f8c2d0e0a6..79f7c0402b8 100644
--- a/src/devices/cpu/scudsp/scudsp.cpp
+++ b/src/devices/cpu/scudsp/scudsp.cpp
@@ -5,7 +5,7 @@
* scudsp.c
* Sega SCUDSP emulator version 1.00
*
- * copyright Angelo Salese & Mariusz Wojcieszek, all rights reserved
+ * copyright Angelo Salese & Mariusz Wojcieszek
*
* Changelog:
* 131010: Angelo Salese
diff --git a/src/devices/cpu/scudsp/scudsp.h b/src/devices/cpu/scudsp/scudsp.h
index eba4ed5903c..bb4bc6b8fea 100644
--- a/src/devices/cpu/scudsp/scudsp.h
+++ b/src/devices/cpu/scudsp/scudsp.h
@@ -59,17 +59,16 @@ public:
uint32_t ram_address_r();
void ram_address_w(uint32_t data);
- void data_map(address_map &map);
- void program_map(address_map &map);
+ void data_map(address_map &map) ATTR_COLD;
+ void program_map(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 7; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/se3208/se3208.h b/src/devices/cpu/se3208/se3208.h
index 0e6608540c3..8f6b2a1ccbb 100644
--- a/src/devices/cpu/se3208/se3208.h
+++ b/src/devices/cpu/se3208/se3208.h
@@ -26,13 +26,12 @@ public:
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/sh/sh.cpp b/src/devices/cpu/sh/sh.cpp
index f6478f289e4..08054e047fe 100644
--- a/src/devices/cpu/sh/sh.cpp
+++ b/src/devices/cpu/sh/sh.cpp
@@ -2502,7 +2502,7 @@ void sh_common_execution::generate_sequence_instruction(drcuml_block &block, com
}
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_sh2_state->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block);
diff --git a/src/devices/cpu/sh/sh.h b/src/devices/cpu/sh/sh.h
index 54e27e963fc..9980fa87709 100644
--- a/src/devices/cpu/sh/sh.h
+++ b/src/devices/cpu/sh/sh.h
@@ -480,7 +480,7 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
};
class sh_frontend : public drc_frontend
diff --git a/src/devices/cpu/sh/sh2.cpp b/src/devices/cpu/sh/sh2.cpp
index 38d378b8b91..ae8acd76ee4 100644
--- a/src/devices/cpu/sh/sh2.cpp
+++ b/src/devices/cpu/sh/sh2.cpp
@@ -287,6 +287,7 @@ void sh2_device::execute_run()
if (m_cpu_off)
{
+ debugger_wait_hook();
m_sh2_state->icount = 0;
return;
}
@@ -690,7 +691,7 @@ void sh2_device::static_generate_memory_accessor(int size, int iswrite, const ch
UML_LABEL(block, label++); // label:
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
for (auto & elem : m_fastram)
{
diff --git a/src/devices/cpu/sh/sh2.h b/src/devices/cpu/sh/sh2.h
index a75f1c53f92..7e7af7c7d1e 100644
--- a/src/devices/cpu/sh/sh2.h
+++ b/src/devices/cpu/sh/sh2.h
@@ -36,13 +36,12 @@ protected:
void check_pending_irq(const char *message);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 16; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
diff --git a/src/devices/cpu/sh/sh3comn.cpp b/src/devices/cpu/sh/sh3comn.cpp
index 3ea57709ba4..3d5942aa363 100644
--- a/src/devices/cpu/sh/sh3comn.cpp
+++ b/src/devices/cpu/sh/sh3comn.cpp
@@ -9,674 +9,1792 @@
#include "sh4tmu.h"
#include "sh4dmac.h"
-/* High internal area (ffffxxxx) */
+// CCN
+uint32_t sh3_base_device::pteh_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (PTEH) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_pteh);
+ return m_pteh;
+}
-void sh3_base_device::sh3_internal_high_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+void sh3_base_device::pteh_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_sh3internal_upper[offset]);
+ COMBINE_DATA(&m_pteh);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (PTEH)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
- switch (offset)
- {
- case SH3_ICR0_IPRA_ADDR:
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - ICR0)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_ICR0_IPRA_ADDR - IPRA)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, data, mem_mask);
- sh4_handler_ipra_w(data & 0xffff, mem_mask & 0xffff);
- }
-
- break;
-
- case SH3_IPRB_ADDR:
- logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (SH3_IPRB_ADDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, data, mem_mask);
- break;
-
- case SH3_TOCR_TSTR_ADDR:
- logerror("'%s' (%08x): TMU internal write to %08x = %08x & %08x (SH3_TOCR_TSTR_ADDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, data, mem_mask);
- if (mem_mask&0xff000000)
- {
- sh4_handle_tocr_addr_w((data>>24)&0xffff, (mem_mask>>24)&0xff);
- }
- if (mem_mask&0x0000ff00)
- {
- sh4_handle_tstr_addr_w((data>>8)&0xff, (mem_mask>>8)&0xff);
- }
- if (mem_mask&0x00ff00ff)
- {
- fatalerror("SH3_TOCR_TSTR_ADDR unused bits accessed (write)\n");
- }
- break;
- case SH3_TCOR0_ADDR: sh4_handle_tcor0_addr_w(data, mem_mask);break;
- case SH3_TCOR1_ADDR: sh4_handle_tcor1_addr_w(data, mem_mask);break;
- case SH3_TCOR2_ADDR: sh4_handle_tcor2_addr_w(data, mem_mask);break;
- case SH3_TCNT0_ADDR: sh4_handle_tcnt0_addr_w(data, mem_mask);break;
- case SH3_TCNT1_ADDR: sh4_handle_tcnt1_addr_w(data, mem_mask);break;
- case SH3_TCNT2_ADDR: sh4_handle_tcnt2_addr_w(data, mem_mask);break;
- case SH3_TCR0_ADDR: sh4_handle_tcr0_addr_w(data>>16, mem_mask>>16);break;
- case SH3_TCR1_ADDR: sh4_handle_tcr1_addr_w(data>>16, mem_mask>>16);break;
- case SH3_TCR2_ADDR: sh4_handle_tcr2_addr_w(data>>16, mem_mask>>16);break;
- case SH3_TCPR2_ADDR: sh4_handle_tcpr2_addr_w(data, mem_mask);break;
-
- default:
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (unk)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, data, mem_mask);
- break;
+uint32_t sh3_base_device::ptel_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (PTEL) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_ptel);
+ return m_ptel;
+}
- }
+void sh3_base_device::ptel_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ptel);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (PTEL)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+uint32_t sh3_base_device::ttb_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (TTB) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_ttb);
+ return m_ttb;
+}
+void sh3_base_device::ttb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ttb);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (TTB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+uint32_t sh3_base_device::tea_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (TEA) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_tea);
+ return m_tea;
+}
+void sh3_base_device::tea_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tea);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (TEA)\n", tag(), m_sh2_state->pc, data, mem_mask);
}
-uint32_t sh3_base_device::sh3_internal_high_r(offs_t offset, uint32_t mem_mask)
+uint32_t sh3_base_device::mmucr_r(offs_t offset, uint32_t mem_mask)
{
- uint32_t ret = 0;
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (MMUCR) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_mmucr);
+ return m_mmucr;
+}
- switch (offset)
- {
- case SH3_ICR0_IPRA_ADDR:
- logerror("'%s' (%08x): INTC internal read from %08x mask %08x (SH3_ICR0_IPRA_ADDR - %08x)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask, m_sh3internal_upper[offset]);
- return (m_sh3internal_upper[offset] & 0xffff0000) | (m_SH4_IPRA & 0xffff);
-
- case SH3_IPRB_ADDR:
- logerror("'%s' (%08x): INTC internal read from %08x mask %08x (SH3_IPRB_ADDR - %08x)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask, m_sh3internal_upper[offset]);
- return m_sh3internal_upper[offset];
-
- case SH3_TOCR_TSTR_ADDR:
-
- if (mem_mask&0xff00000)
- {
- ret |= (sh4_handle_tocr_addr_r(mem_mask)&0xff)<<24;
- }
- if (mem_mask&0x0000ff00)
- {
- ret |= (sh4_handle_tstr_addr_r(mem_mask)&0xff)<<8;
- }
- if (mem_mask&0x00ff00ff)
- {
- fatalerror("SH3_TOCR_TSTR_ADDR unused bits accessed (read)\n");
- }
- return ret;
- case SH3_TCOR0_ADDR: return sh4_handle_tcor0_addr_r(mem_mask);
- case SH3_TCOR1_ADDR: return sh4_handle_tcor1_addr_r(mem_mask);
- case SH3_TCOR2_ADDR: return sh4_handle_tcor2_addr_r(mem_mask);
- case SH3_TCNT0_ADDR: return sh4_handle_tcnt0_addr_r(mem_mask);
- case SH3_TCNT1_ADDR: return sh4_handle_tcnt1_addr_r(mem_mask);
- case SH3_TCNT2_ADDR: return sh4_handle_tcnt2_addr_r(mem_mask);
- case SH3_TCR0_ADDR: return sh4_handle_tcr0_addr_r(mem_mask)<<16;
- case SH3_TCR1_ADDR: return sh4_handle_tcr1_addr_r(mem_mask)<<16;
- case SH3_TCR2_ADDR: return sh4_handle_tcr2_addr_r(mem_mask)<<16;
- case SH3_TCPR2_ADDR: return sh4_handle_tcpr2_addr_r(mem_mask);
-
-
- case SH3_TRA_ADDR:
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 TRA - %08x)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask, m_sh3internal_upper[offset]);
- return m_sh3internal_upper[offset];
-
- case SH3_EXPEVT_ADDR:
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 EXPEVT - %08x)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask, m_sh3internal_upper[offset]);
- return m_sh3internal_upper[offset];
-
- case SH3_INTEVT_ADDR:
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SH3 INTEVT - %08x)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask, m_sh3internal_upper[offset]);
- return m_sh3internal_upper[offset];
-
- case SH3_SCSSR_ADDR:
- // hack until SCI is not implemented
- return 0x84<<24;
-
-
- default:
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + SH3_UPPER_REGBASE, mem_mask);
- return m_sh3internal_upper[offset];
- }
+void sh3_base_device::mmucr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_mmucr);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (MMUCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
}
+uint8_t sh3_base_device::basra_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %02x (BASRA) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_basra);
+ return m_basra;
+}
-uint32_t sh3_base_device::sh3_internal_r(offs_t offset, uint32_t mem_mask)
+void sh3_base_device::basra_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
- if (offset<0x1000)
- {
- switch (offset)
- {
- case SH3_SAR0_ADDR: return sh4_handle_sar0_addr_r(mem_mask);
- case SH3_SAR1_ADDR: return sh4_handle_sar1_addr_r(mem_mask);
- case SH3_SAR2_ADDR: return sh4_handle_sar2_addr_r(mem_mask);
- case SH3_SAR3_ADDR: return sh4_handle_sar3_addr_r(mem_mask);
- case SH3_DAR0_ADDR: return sh4_handle_dar0_addr_r(mem_mask);
- case SH3_DAR1_ADDR: return sh4_handle_dar1_addr_r(mem_mask);
- case SH3_DAR2_ADDR: return sh4_handle_dar2_addr_r(mem_mask);
- case SH3_DAR3_ADDR: return sh4_handle_dar3_addr_r(mem_mask);
- case SH3_DMATCR0_ADDR: return sh4_handle_dmatcr0_addr_r(mem_mask);
- case SH3_DMATCR1_ADDR: return sh4_handle_dmatcr1_addr_r(mem_mask);
- case SH3_DMATCR2_ADDR: return sh4_handle_dmatcr2_addr_r(mem_mask);
- case SH3_DMATCR3_ADDR: return sh4_handle_dmatcr3_addr_r(mem_mask);
- case SH3_CHCR0_ADDR: return sh4_handle_chcr0_addr_r(mem_mask);
- case SH3_CHCR1_ADDR: return sh4_handle_chcr1_addr_r(mem_mask);
- case SH3_CHCR2_ADDR: return sh4_handle_chcr2_addr_r(mem_mask);
- case SH3_CHCR3_ADDR: return sh4_handle_chcr3_addr_r(mem_mask);
- case SH3_DMAOR_ADDR: return sh4_handle_dmaor_addr_r(mem_mask)<<16;
-
-
- case INTEVT2:
- {
- // logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (INTEVT2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
-
- case IRR0_IRR1:
- {
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR0)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR1)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- fatalerror("'%s' (%08x): unmapped internal read from %08x mask %08x (IRR0/1 unused bits)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- }
- }
-
- case PADR_PBDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PADR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_A) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PBDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_B) << 8;
- }
- }
- break;
-
- case PCDR_PDDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PCDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_C) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PDDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_D) << 8;
- }
- }
- break;
-
- case PEDR_PFDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PEDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_E) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PFDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_F) << 8;
- }
- }
- break;
-
- case PGDR_PHDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PGDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_G) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PHDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_H) << 8;
- }
- }
- break;
-
- case PJDR_PKDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PJDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_J) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PKDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_K) << 8;
- }
- }
- break;
-
- case PLDR_SCPDR:
- {
- if (mem_mask & 0xffff0000)
- {
- //logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (PLDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_io->read_qword(SH3_PORT_L) << 24;
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x (SCPDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- //return m_io->read_qword(SH3_PORT_K) << 8;
- }
- }
- break;
-
-
- case SCSMR2_SCBRR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSMR2 - Serial Mode Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCBRR2 - Bit Rate Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
- }
- break;
-
- case SCSCR2_SCFTDR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSCR2 - Serial Control Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFTDR2 - Transmit FIFO Data Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
- }
- break;
-
- case SCSSR2_SCFRDR2:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCSSR2 - Serial Status Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFRDR2 - Receive FIFO Data Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
- }
- break;
-
- case SCFCR2_SCFDR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFCR2 - Fifo Control Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): SCIF internal read from %08x mask %08x (SCFDR2 - Fifo Data Count Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, mem_mask);
- return m_sh3internal_lower[offset];
- }
- }
- break;
-
-
- default:
- {
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n",
- tag(), m_sh2_state->pc & SH34_AM,
- (offset *4)+0x4000000,
- mem_mask);
- }
- break;
-
- }
+ COMBINE_DATA(&m_basra);
+ logerror("'%s' (%08x): CCN unmapped internal write %02x & %02x (BASRA)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
- }
- else
- {
- logerror("'%s' (%08x): unmapped internal read from %08x mask %08x\n",
- tag(), m_sh2_state->pc & SH34_AM,
- (offset *4)+0x4000000,
- mem_mask);
- }
+uint8_t sh3_base_device::basrb_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %02x (BASRB) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_basrb);
+ return m_basrb;
+}
+
+void sh3_base_device::basrb_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_basrb);
+ logerror("'%s' (%08x): CCN unmapped internal write %02x & %02x (BASRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::ccr_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (CCR) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_ccr);
+ return m_ccr;
+}
+
+void sh3_base_device::ccr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ccr);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (CCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::tra_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (TRA) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_tra);
+ return m_tra;
+}
+
+void sh3_base_device::tra_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tra);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (TRA)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::expevt_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (EXPEVT) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_expevt);
+ return m_expevt;
+}
+
+void sh3_base_device::expevt_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_expevt);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (EXPEVT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::intevt_r(offs_t offset, uint32_t mem_mask)
+{
+ //logerror("'%s' (%08x): CCN unmapped internal read mask %08x (INTEVT) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_intevt);
+ return m_intevt;
+}
+
+void sh3_base_device::intevt_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intevt);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (INTEVT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// CCN 7709S
+uint32_t sh3_base_device::ccr2_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): CCN unmapped internal read mask %08x (CCR2) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_ccr2);
+ return m_ccr2;
+}
+
+void sh3_base_device::ccr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ccr2);
+ logerror("'%s' (%08x): CCN unmapped internal write %08x & %08x (CCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// UBC
+uint32_t sh3_base_device::bara_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BARA) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_bara);
+ return m_bara;
+}
+
+void sh3_base_device::bara_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bara);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BARA)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::bamra_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %02x (BAMRA) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_bamra);
+ return m_bamra;
+}
+
+void sh3_base_device::bamra_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_bamra);
+ logerror("'%s' (%08x): UBC unmapped internal write %02x & %02x (BAMRA)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::bbra_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %04x (BBRA) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_bbra);
+ return m_bbra;
+}
+
+void sh3_base_device::bbra_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bbra);
+ logerror("'%s' (%08x): UBC unmapped internal write %04x & %04x (BBRA)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::barb_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BARB) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_barb);
+ return m_barb;
+}
+
+void sh3_base_device::barb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_barb);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BARB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::bamrb_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %02x (BAMRB) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_bamrb);
+ return m_bamrb;
+}
+
+void sh3_base_device::bamrb_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_bamrb);
+ logerror("'%s' (%08x): UBC unmapped internal write %02x & %02x (BAMRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::bbrb_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %04x (BBRB) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_bbrb);
+ return m_bbrb;
+}
+
+void sh3_base_device::bbrb_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bbrb);
+ logerror("'%s' (%08x): UBC unmapped internal write %04x & %04x (BBRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::bdrb_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BDRB) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_bdrb);
+ return m_bdrb;
+}
+
+void sh3_base_device::bdrb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bdrb);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BDRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::bdmrb_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BDMRB) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_bdmrb);
+ return m_bdmrb;
+}
+
+void sh3_base_device::bdmrb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bdmrb);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BDMRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::brcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %04x (BRCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_brcr);
+ return m_brcr;
+}
+
+void sh3_base_device::brcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_brcr);
+ logerror("'%s' (%08x): UBC unmapped internal write %04x & %04x (BRCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// UBC 7709S
+uint16_t sh3_base_device::betr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %04x (BETR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_betr);
+ return m_betr;
+}
+
+void sh3_base_device::betr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_betr);
+ logerror("'%s' (%08x): UBC unmapped internal write %04x & %04x (BETR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::brsr_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BRSR) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_brsr);
+ return m_brsr;
+}
+
+void sh3_base_device::brsr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_brsr);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BRSR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint32_t sh3_base_device::brdr_r(offs_t offset, uint32_t mem_mask)
+{
+ logerror("'%s' (%08x): UBC unmapped internal read mask %08x (BRDR) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_brdr);
+ return m_brdr;
+}
+
+void sh3_base_device::brdr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_brdr);
+ logerror("'%s' (%08x): UBC unmapped internal write %08x & %08x (BRDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// CPG
+uint16_t sh3_base_device::frqcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): CPG unmapped internal read mask %04x (FRQCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_frqcr);
+ return m_frqcr;
+}
+
+void sh3_base_device::frqcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_frqcr);
+ logerror("'%s' (%08x): CPG unmapped internal write %04x & %04x (FRQCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::stbcr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CPG unmapped internal read mask %02x (STBCR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_stbcr);
+ return m_stbcr;
+}
+
+void sh3_base_device::stbcr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_stbcr);
+ logerror("'%s' (%08x): CPG unmapped internal write %02x & %02x (STBCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::wtcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CPG unmapped internal read mask %02x (WTCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_stbcr);
+ return m_wtcnt;
+}
+
+void sh3_base_device::wtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ if ((data & 0xff00) == 0x5a00)
+ COMBINE_DATA(&m_wtcnt);
+
+ logerror("'%s' (%08x): CPG unmapped internal write %04x & %04x (WTCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::wtcsr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CPG unmapped internal read mask %02x (WTCSR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_wtcsr);
+ return m_wtcsr;
+}
+
+void sh3_base_device::wtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ if ((data & 0xff00) == 0xa500)
+ COMBINE_DATA(&m_wtcsr);
+ logerror("'%s' (%08x): CPG unmapped internal write %04x & %04x (WTCSR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// CPG 7709
+uint8_t sh3_base_device::stbcr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): CPG unmapped internal read mask %02x (STBCR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_stbcr2);
+ return m_stbcr2;
+}
+
+void sh3_base_device::stbcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_stbcr2);
+ logerror("'%s' (%08x): CPG unmapped internal write %02x & %02x (STBCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// BSC
+uint16_t sh3_base_device::bcr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (BCR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_bcr1);
+ return m_bcr1;
+}
+
+void sh3_base_device::bcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr1);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (BCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::bcr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (BCR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_bcr2);
+ return m_bcr2;
+}
+
+void sh3_base_device::bcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr2);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (BCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::wcr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (WCR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_wcr1);
+ return m_wcr1;
+}
+
+void sh3_base_device::wcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_wcr1);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (WCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::wcr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (WCR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_wcr2);
+ return m_wcr2;
+}
+
+void sh3_base_device::wcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_wcr2);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (WCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcr);
+ return m_mcr;
+}
+
+void sh3_base_device::mcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (PCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pcr);
+ return m_pcr;
+}
+
+void sh3_base_device::pcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pcr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (PCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::rtcsr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (RTCSR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_rtcsr);
+ return m_rtcsr;
+}
+
+void sh3_base_device::rtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rtcsr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (RTCSR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::rtcnt_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (RTCNT) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_rtcnt);
+ return m_rtcnt;
+}
+
+void sh3_base_device::rtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rtcnt);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (RTCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::rtcor_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (RTCOR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_rtcor);
+ return m_rtcor;
+}
+
+void sh3_base_device::rtcor_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rtcor);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (RTCOR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::rfcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (RFCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_rfcr);
+ return m_rfcr;
+}
+
+void sh3_base_device::rfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rfcr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (RFCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+uint8_t sh3_base_device::sdmr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %02x @ %05x (SDMR)\n", tag(), m_sh2_state->pc, mem_mask, offset);
return 0;
}
-/* Lower internal area */
+void sh3_base_device::sdmr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal write %02x & %02x @ %05x (SDMR)\n", tag(), m_sh2_state->pc, data, mem_mask, offset);
+}
-void sh3_base_device::sh3_internal_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+// BSC 7708
+uint16_t sh3_base_device::dcr_r(offs_t offset, uint16_t mem_mask)
{
- if (offset<0x1000)
- {
- //uint32_t old = m_sh3internal_lower[offset];
- COMBINE_DATA(&m_sh3internal_lower[offset]);
-
- switch (offset)
- {
- case SH3_SAR0_ADDR: sh4_handle_sar0_addr_w(data, mem_mask); break;
- case SH3_SAR1_ADDR: sh4_handle_sar1_addr_w(data, mem_mask); break;
- case SH3_SAR2_ADDR: sh4_handle_sar2_addr_w(data, mem_mask); break;
- case SH3_SAR3_ADDR: sh4_handle_sar3_addr_w(data, mem_mask); break;
- case SH3_DAR0_ADDR: sh4_handle_dar0_addr_w(data, mem_mask); break;
- case SH3_DAR1_ADDR: sh4_handle_dar1_addr_w(data, mem_mask); break;
- case SH3_DAR2_ADDR: sh4_handle_dar2_addr_w(data, mem_mask); break;
- case SH3_DAR3_ADDR: sh4_handle_dar3_addr_w(data, mem_mask); break;
- case SH3_DMATCR0_ADDR: sh4_handle_dmatcr0_addr_w(data, mem_mask); break;
- case SH3_DMATCR1_ADDR: sh4_handle_dmatcr1_addr_w(data, mem_mask); break;
- case SH3_DMATCR2_ADDR: sh4_handle_dmatcr2_addr_w(data, mem_mask); break;
- case SH3_DMATCR3_ADDR: sh4_handle_dmatcr3_addr_w(data, mem_mask); break;
- case SH3_CHCR0_ADDR: sh4_handle_chcr0_addr_w(data, mem_mask); break;
- case SH3_CHCR1_ADDR: sh4_handle_chcr1_addr_w(data, mem_mask); break;
- case SH3_CHCR2_ADDR: sh4_handle_chcr2_addr_w(data, mem_mask); break;
- case SH3_CHCR3_ADDR: sh4_handle_chcr3_addr_w(data, mem_mask); break;
- case SH3_DMAOR_ADDR: sh4_handle_dmaor_addr_w(data >> 16, mem_mask >> 16); break;
-
-
- case IRR0_IRR1:
- {
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR0)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- // not sure if this is how we should clear lines in this core...
- if (!(data & 0x01000000)) execute_set_input(0, CLEAR_LINE);
- if (!(data & 0x02000000)) execute_set_input(1, CLEAR_LINE);
- if (!(data & 0x04000000)) execute_set_input(2, CLEAR_LINE);
- if (!(data & 0x08000000)) execute_set_input(3, CLEAR_LINE);
-
- }
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR1)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- if (mem_mask & 0x00ff00ff)
- {
- fatalerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (IRR0/1 unused bits)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- }
- break;
-
- case PINTER_IPRC:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PINTER)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- data &= 0xffff; mem_mask &= 0xffff;
- COMBINE_DATA(&m_SH4_IPRC);
- logerror("'%s' (%08x): INTC internal write to %08x = %08x & %08x (IPRC)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- m_exception_priority[SH4_INTC_IRL0] = INTPRI((m_SH4_IPRC & 0x000f) >> 0, SH4_INTC_IRL0);
- m_exception_priority[SH4_INTC_IRL1] = INTPRI((m_SH4_IPRC & 0x00f0) >> 4, SH4_INTC_IRL1);
- m_exception_priority[SH4_INTC_IRL2] = INTPRI((m_SH4_IPRC & 0x0f00) >> 8, SH4_INTC_IRL2);
- m_exception_priority[SH4_INTC_IRL3] = INTPRI((m_SH4_IPRC & 0xf000) >> 12, SH4_INTC_IRL3);
- sh4_exception_recompute();
- }
- }
- break;
-
- case PCCR_PDCR:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PCCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PDCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case PECR_PFCR:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PECR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PFCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
-
- case PGCR_PHCR:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PGCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PHCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
-
- case PJCR_PKCR:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PJCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PKCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
-
- case PLCR_SCPCR:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PLCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (SCPCR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case PADR_PBDR:
- {
- if (mem_mask & 0xffff0000)
- {
- m_io->write_qword(SH3_PORT_A, (data >> 24) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PADR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- m_io->write_qword(SH3_PORT_B, (data >> 8) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PBDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case PCDR_PDDR:
- {
- if (mem_mask & 0xffff0000)
- {
- m_io->write_qword(SH3_PORT_C, (data >> 24) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PADR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- m_io->write_qword(SH3_PORT_D, (data >> 8) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PBDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
- case PEDR_PFDR:
- {
- if (mem_mask & 0xffff0000)
- {
- m_io->write_qword(SH3_PORT_E, (data >> 24) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PEDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- m_io->write_qword(SH3_PORT_F, (data >> 8) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PFDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case PGDR_PHDR:
- {
- if (mem_mask & 0xffff0000)
- {
- m_io->write_qword(SH3_PORT_G, (data >> 24) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PGDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- m_io->write_qword(SH3_PORT_H, (data >> 8) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PHDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
-
- case PJDR_PKDR:
- {
- if (mem_mask & 0xffff0000)
- {
- m_io->write_qword(SH3_PORT_J, (data >> 24) & 0xff);
- // logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PJDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- m_io->write_qword(SH3_PORT_K, (data >> 8) & 0xff);
- //logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x (PKDR)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case SCSMR2_SCBRR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSMR2 - Serial Mode Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCBRR2 - Bit Rate Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case SCSCR2_SCFTDR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSCR2 - Serial Control Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFTDR2 - Transmit FIFO Data Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case SCSSR2_SCFRDR2:
- {
- if (mem_mask & 0xffff0000)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCSSR2 - Serial Status Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ff00)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFRDR2 - Receive FIFO Data Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- case SCFCR2_SCFDR2:
- {
- if (mem_mask & 0xff000000)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFCR2 - Fifo Control Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
-
- if (mem_mask & 0x0000ffff)
- {
- logerror("'%s' (%08x): SCIF internal write to %08x = %08x & %08x (SCFDR2 - Fifo Data Count Register 2)\n", tag(), m_sh2_state->pc & SH34_AM, (offset * 4) + 0x4000000, data, mem_mask);
- }
- }
- break;
-
- default:
- {
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x\n",
- tag(), m_sh2_state->pc & SH34_AM,
- (offset *4)+0x4000000,
- data,
- mem_mask);
- }
- break;
- }
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (DCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_dcr);
+ return m_dcr;
+}
- }
- else
+void sh3_base_device::dcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_dcr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (DCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pctr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (PCTR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pctr);
+ return m_pctr;
+}
+
+void sh3_base_device::pctr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pctr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (PCTR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pdtr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (PDTR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pdtr);
+ return m_pdtr;
+}
+
+void sh3_base_device::pdtr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pdtr);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (PDTR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// BSC 7709
+uint16_t sh3_base_device::bcr3_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (BCR3) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_bcr3);
+ return m_bcr3;
+}
+
+void sh3_base_device::bcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr3);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (BCR3)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// BSC 7709S
+uint16_t sh3_base_device::mcscr0_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR0) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr0);
+ return m_mcscr0;
+}
+
+void sh3_base_device::mcscr0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr0);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR0)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr1);
+ return m_mcscr1;
+}
+
+void sh3_base_device::mcscr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr1);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr2);
+ return m_mcscr2;
+}
+
+void sh3_base_device::mcscr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr2);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr3_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR3) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr3);
+ return m_mcscr3;
+}
+
+void sh3_base_device::mcscr3_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr3);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR3)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr4_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR4) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr4);
+ return m_mcscr4;
+}
+
+void sh3_base_device::mcscr4_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr4);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR4)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr5_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR5) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr5);
+ return m_mcscr5;
+}
+
+void sh3_base_device::mcscr5_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr5);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR5)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr6_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR6) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr6);
+ return m_mcscr6;
+}
+
+void sh3_base_device::mcscr6_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr6);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR6)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::mcscr7_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): BSC unmapped internal read mask %04x (MCSCR7) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_mcscr7);
+ return m_mcscr7;
+}
+
+void sh3_base_device::mcscr7_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_mcscr7);
+ logerror("'%s' (%08x): BSC unmapped internal write %04x & %04x (MCSCR7)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// RTC
+uint8_t sh3_base_device::r64cnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (R64CNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_r64cnt);
+ return m_r64cnt;
+}
+
+uint8_t sh3_base_device::rseccnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RSECCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rseccnt);
+ return m_rseccnt;
+}
+
+void sh3_base_device::rseccnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rseccnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RSECCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rmincnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RMINCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rseccnt);
+ return m_rmincnt;
+}
+
+void sh3_base_device::rmincnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmincnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RMINCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rhrcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RHRCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rhrcnt);
+ return m_rhrcnt;
+}
+
+void sh3_base_device::rhrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rhrcnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RHRCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rwkcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RWKCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rhrcnt);
+ return m_rwkcnt;
+}
+
+void sh3_base_device::rwkcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rwkcnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RWKCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rdaycnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RDAYCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rdaycnt);
+ return m_rdaycnt;
+}
+
+void sh3_base_device::rdaycnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rdaycnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RDAYCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rmoncnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RMONCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rmoncnt);
+ return m_rmoncnt;
+}
+
+void sh3_base_device::rmoncnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmoncnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RMONCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::ryrcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RYRCNT) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_ryrcnt);
+ return m_ryrcnt;
+}
+
+void sh3_base_device::ryrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_ryrcnt);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RYRCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rsecar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RSECAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rsecar);
+ return m_rsecar;
+}
+
+void sh3_base_device::rsecar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rsecar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RSECAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rminar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RMINAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rminar);
+ return m_rminar;
+}
+
+void sh3_base_device::rminar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rminar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RMINAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rhrar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RHRAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rhrar);
+ return m_rhrar;
+}
+
+void sh3_base_device::rhrar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rhrar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RHRAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rwkar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RWKAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rhrar);
+ return m_rwkar;
+}
+
+void sh3_base_device::rwkar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rwkar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RWKAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rdayar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RDAYAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rdayar);
+ return m_rdayar;
+}
+
+void sh3_base_device::rdayar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rdayar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RDAYAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rmonar_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RMONAR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rmonar);
+ return m_rmonar;
+}
+
+void sh3_base_device::rmonar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmonar);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RMONAR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rcr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %02x (RCR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_rcr1);
+ return m_rcr1;
+}
+
+void sh3_base_device::rcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rcr1);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::rcr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): RTC unmapped internal read mask %04x (RCR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_rcr2);
+ return m_rcr2;
+}
+
+void sh3_base_device::rcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rcr2);
+ logerror("'%s' (%08x): RTC unmapped internal write %02x & %02x (RCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// INTC
+uint16_t sh3_base_device::icr0_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (ICR0) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_icr0);
+ return m_icr0;
+}
+
+void sh3_base_device::icr0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_icr0);
+ logerror("'%s' (%08x): INTC unmapped internal write %04x & %04x (ICR0)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::iprb_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (IPRB) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_iprb);
+ return m_iprb;
+}
+
+void sh3_base_device::iprb_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprb);
+ logerror("'%s' (%08x): INTC unmapped internal write %04x & %04x (IPRB)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// INTC 7709
+uint32_t sh3_base_device::intevt2_r(offs_t offset, uint32_t mem_mask)
+{
+ //logerror("'%s' (%08x): INTC unmapped internal read mask %08x (INTEVT2) %08x\n", tag(), m_sh2_state->pc, mem_mask, m_intevt2);
+ return m_intevt2;
+}
+
+void sh3_base_device::intevt2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intevt2);
+ logerror("'%s' (%08x): INTC unmapped internal write %08x & %08x (INTEVT2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::irr0_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %02x (IRR0) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_irr0);
+ return m_irr0;
+}
+
+void sh3_base_device::irr0_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_irr0);
+ logerror("'%s' (%08x): INTC unmapped internal write %02x & %02x (IRR0)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ // not sure if this is how we should clear lines in this core...
+ if (!(data & 0x01)) execute_set_input(0, CLEAR_LINE);
+ if (!(data & 0x02)) execute_set_input(1, CLEAR_LINE);
+ if (!(data & 0x04)) execute_set_input(2, CLEAR_LINE);
+ if (!(data & 0x08)) execute_set_input(3, CLEAR_LINE);
+}
+
+uint8_t sh3_base_device::irr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %02x (IRR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_irr1);
+ return m_irr1;
+}
+
+void sh3_base_device::irr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_irr1);
+ logerror("'%s' (%08x): INTC unmapped internal write %02x & %02x (IRR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::irr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %02x (IRR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_irr2);
+ return m_irr2;
+}
+
+void sh3_base_device::irr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_irr2);
+ logerror("'%s' (%08x): INTC unmapped internal write %02x & %02x (IRR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::icr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (ICR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_icr1);
+ return m_icr1;
+}
+
+void sh3_base_device::icr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_icr1);
+ logerror("'%s' (%08x): INTC unmapped internal write %04x & %04x (ICR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::icr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (ICR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_icr2);
+ return m_icr2;
+}
+
+void sh3_base_device::icr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_icr2);
+ logerror("'%s' (%08x): INTC unmapped internal write %04x & %04x (ICR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pinter_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (PINTER) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pinter);
+ return m_pinter;
+}
+
+void sh3_base_device::pinter_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pinter);
+ logerror("'%s' (%08x): INTC unmapped internal write %04x & %04x (PINTER)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::iprc_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (IPRC) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_iprc);
+ return m_iprc;
+}
+
+void sh3_base_device::iprc_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprc);
+ logerror("'%s' (%08x): INTC internal write %04x & %04x (IPRC)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_exception_priority[SH4_INTC_IRL0] = INTPRI((m_iprc & 0x000f) >> 0, SH4_INTC_IRL0);
+ m_exception_priority[SH4_INTC_IRL1] = INTPRI((m_iprc & 0x00f0) >> 4, SH4_INTC_IRL1);
+ m_exception_priority[SH4_INTC_IRL2] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_IRL2);
+ m_exception_priority[SH4_INTC_IRL3] = INTPRI((m_iprc & 0xf000) >> 12, SH4_INTC_IRL3);
+ sh4_exception_recompute();
+}
+
+uint16_t sh3_base_device::iprd_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (IPRD) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_iprd);
+ return m_iprd;
+}
+
+void sh3_base_device::iprd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprd);
+ logerror("'%s' (%08x): INTC internal write %04x & %04x (IPRD)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::ipre_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): INTC unmapped internal read mask %04x (IPRE) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_ipre);
+ return m_ipre;
+}
+
+void sh3_base_device::ipre_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_ipre);
+ logerror("'%s' (%08x): INTC internal write %04x & %04x (IPRE)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// SCI
+uint8_t sh3_base_device::scsmr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCSMR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scsmr);
+ return m_scsmr;
+}
+
+void sh3_base_device::scsmr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsmr);
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCSMR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scbrr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCBRR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scbrr);
+ return m_scbrr;
+}
+
+void sh3_base_device::scbrr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scbrr);
+ logerror("'%s' (%08x): SCSI unmapped internal write %02x & %02x (SCBRR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scscr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCSCR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scscr);
+ return m_scscr;
+}
+
+void sh3_base_device::scscr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscr);
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCSCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::sctdr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCTDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_sctdr);
+ return m_sctdr;
+}
+
+void sh3_base_device::sctdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_sctdr);
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCTDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scssr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCSSR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scssr);
+ return m_scssr;
+}
+
+void sh3_base_device::scssr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ m_scssr = (m_scssr | (data & 1)) & (data | 6);
+ if (!(m_scssr & 0x80))
{
- logerror("'%s' (%08x): unmapped internal write to %08x = %08x & %08x\n",
- tag(), m_sh2_state->pc & SH34_AM,
- (offset *4)+0x4000000,
- data,
- mem_mask);
+ //printf("%c", m_sctdr);
+ m_scssr |= 0x80;
}
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCSSR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scrdr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCRDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scrdr);
+ return m_scrdr;
+}
+
+uint8_t sh3_base_device::scscmr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCSCMR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scscmr);
+ return m_scscmr;
+}
+
+void sh3_base_device::scscmr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscmr);
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCSCMR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// SCI 7708
+uint8_t sh3_base_device::scsptr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCI unmapped internal read mask %02x (SCSPTR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scsptr);
+ return m_scsptr;
+}
+
+void sh3_base_device::scsptr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsptr);
+ logerror("'%s' (%08x): SCI unmapped internal write %02x & %02x (SCSPTR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// CMT 7709
+uint16_t sh3_base_device::cmstr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): CMT unmapped internal read mask %04x (CMSTR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_cmstr);
+ return m_cmstr;
+}
+
+void sh3_base_device::cmstr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_cmstr);
+ logerror("'%s' (%08x): CMT unmapped internal write %04x & %04x (CMSTR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::cmscr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): CMT unmapped internal read mask %04x (CMSCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_cmscr);
+ return m_cmscr;
+}
+
+void sh3_base_device::cmscr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_cmscr);
+ logerror("'%s' (%08x): CMT unmapped internal write %04x & %04x (CMSCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::cmcnt_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): CMT unmapped internal read mask %04x (CMCNT) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_cmcnt);
+ return m_cmcnt;
+}
+
+void sh3_base_device::cmcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_cmcnt);
+ logerror("'%s' (%08x): CMT unmapped internal write %04x & %04x (CMCNT)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::cmcor_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): CMT unmapped internal read mask %04x (CMCOR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_cmcor);
+ return m_cmcor;
+}
+
+void sh3_base_device::cmcor_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_cmcor);
+ logerror("'%s' (%08x): CMT unmapped internal write %04x & %04x (CMCOR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// AD 7709
+uint8_t sh3_base_device::addrah_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRAH) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrah);
+ return m_addrah;
+}
+
+void sh3_base_device::addrah_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrah);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRAH)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addral_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRAL) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addral);
+ return m_addral;
+}
+
+void sh3_base_device::addral_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addral);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRAL)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addrbh_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRBH) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrbh);
+ return m_addrbh;
+}
+
+void sh3_base_device::addrbh_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrbh);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRBH)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addrbl_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRBL) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrbl);
+ return m_addrbl;
+}
+
+void sh3_base_device::addrbl_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrbl);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRBL)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addrch_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRCH) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrch);
+ return m_addrch;
+}
+
+void sh3_base_device::addrch_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrch);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRCH)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addrcl_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRCL) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrcl);
+ return m_addrcl;
+}
+
+void sh3_base_device::addrcl_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrcl);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRCL)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+uint8_t sh3_base_device::addrdh_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRDH) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrdh);
+ return m_addrdh;
+}
+
+void sh3_base_device::addrdh_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrdh);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRDH)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::addrdl_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADDRDL) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_addrdl);
+ return m_addrdl;
+}
+
+void sh3_base_device::addrdl_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_addrdl);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADDRDL)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::adcsr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADCSR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_adcsr);
+ return m_adcsr;
+}
+
+void sh3_base_device::adcsr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_adcsr);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADCSR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::adcr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): AD unmapped internal read mask %02x (ADCR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_adcr);
+ return m_adcr;
+}
+
+void sh3_base_device::adcr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_adcr);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (ADCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// DA 7709
+uint8_t sh3_base_device::dadr0_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): DA unmapped internal read mask %02x (DADR0) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_dadr0);
+ return m_dadr0;
+}
+
+void sh3_base_device::dadr0_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_dadr0);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (DADR0)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::dadr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): DA unmapped internal read mask %02x (DADR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_dadr1);
+ return m_dadr1;
+}
+
+void sh3_base_device::dadr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_dadr1);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (DADR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::dadcr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): DA unmapped internal read mask %02x (DADCR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_dadcr);
+ return m_dadcr;
+}
+
+void sh3_base_device::dadcr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_dadcr);
+ logerror("'%s' (%08x): AD unmapped internal write %02x & %02x (DADCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// PORT 7709
+uint16_t sh3_base_device::pacr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PACR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pacr);
+ return m_pacr;
+}
+
+void sh3_base_device::pacr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pacr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PACR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pbcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PBCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pbcr);
+ return m_pbcr;
+}
+
+void sh3_base_device::pbcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pbcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PBCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pccr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PCCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pccr);
+ return m_pccr;
+}
+
+void sh3_base_device::pccr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pccr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PCCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pdcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PDCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pdcr);
+ return m_pdcr;
+}
+
+void sh3_base_device::pdcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pdcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PDCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pecr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PECR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pecr);
+ return m_pecr;
+}
+
+void sh3_base_device::pecr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pecr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PECR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pfcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PFCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pfcr);
+ return m_pfcr;
+}
+
+void sh3_base_device::pfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pfcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PFCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pgcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PGCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pgcr);
+ return m_pgcr;
+}
+
+void sh3_base_device::pgcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pgcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PGCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::phcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PHCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_phcr);
+ return m_phcr;
+}
+
+void sh3_base_device::phcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_phcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PHCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pjcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PJCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pjcr);
+ return m_pjcr;
+}
+
+void sh3_base_device::pjcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pjcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PJCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::pkcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PKCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_pkcr);
+ return m_pkcr;
+}
+
+void sh3_base_device::pkcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pkcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PKCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::plcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (PLCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_plcr);
+ return m_plcr;
+}
+
+void sh3_base_device::plcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_plcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (PLCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::scpcr_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %04x (SCPCR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_scpcr);
+ return m_scpcr;
+}
+
+void sh3_base_device::scpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scpcr);
+ logerror("'%s' (%08x): PORT unmapped internal write %04x & %04x (SCPCR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::padr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PADR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_padr);
+ return m_io->read_qword(SH3_PORT_A);
+}
+
+void sh3_base_device::padr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_padr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PADR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_A, data);
+}
+
+uint8_t sh3_base_device::pbdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PBDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_padr);
+ return m_io->read_qword(SH3_PORT_B);
+}
+
+void sh3_base_device::pbdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pbdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PBDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_B, data);
+}
+
+uint8_t sh3_base_device::pcdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PCDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pcdr);
+ return m_io->read_qword(SH3_PORT_C);
+}
+
+void sh3_base_device::pcdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pcdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PCDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_C, data);
+}
+
+uint8_t sh3_base_device::pddr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PDDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pddr);
+ return m_io->read_qword(SH3_PORT_D);
+}
+
+void sh3_base_device::pddr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pddr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PDDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_D, data);
+}
+
+uint8_t sh3_base_device::pedr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PEDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pedr);
+ return m_io->read_qword(SH3_PORT_E);
+}
+
+void sh3_base_device::pedr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pedr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PEDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_E, data);
+}
+
+uint8_t sh3_base_device::pfdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PFDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pfdr);
+ return m_io->read_qword(SH3_PORT_F);
+}
+
+void sh3_base_device::pfdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pfdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PFDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_F, data);
+}
+
+uint8_t sh3_base_device::pgdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PGDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pgdr);
+ return m_io->read_qword(SH3_PORT_G);
+}
+
+void sh3_base_device::pgdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pgdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PGDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_G, data);
+}
+
+uint8_t sh3_base_device::phdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PHDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_phdr);
+ return m_io->read_qword(SH3_PORT_H);
+}
+
+void sh3_base_device::phdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_phdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PHDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_H, data);
+}
+
+uint8_t sh3_base_device::pjdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PJDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pjdr);
+ return m_io->read_qword(SH3_PORT_J);
+}
+
+void sh3_base_device::pjdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pjdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PJDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_J, data);
+}
+
+uint8_t sh3_base_device::pkdr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PKDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pkdr);
+ return m_io->read_qword(SH3_PORT_K);
+}
+
+void sh3_base_device::pkdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pkdr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PKDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_K, data);
+}
+
+uint8_t sh3_base_device::pldr_r(offs_t offset, uint8_t mem_mask)
+{
+ //logerror("'%s' (%08x): PORT unmapped internal read mask %02x (PLDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_pldr);
+ return m_io->read_qword(SH3_PORT_L);
+}
+
+void sh3_base_device::pldr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_pldr);
+ //logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (PLDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+ m_io->write_qword(SH3_PORT_L, data);
+}
+
+uint8_t sh3_base_device::scpdr_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): PORT unmapped internal read mask %02x (SCPDR) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scpdr);
+ return m_scpdr;
+}
+
+void sh3_base_device::scpdr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scpdr);
+ logerror("'%s' (%08x): PORT unmapped internal write %02x & %02x (SCPDR)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// IRDA 7709
+uint8_t sh3_base_device::scsmr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCSMR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scsmr1);
+ return m_scsmr1;
+}
+
+void sh3_base_device::scsmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsmr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCSMR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scbrr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCBRR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scbrr1);
+ return m_scbrr1;
+}
+
+void sh3_base_device::scbrr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scbrr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCBRR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scscr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCSCR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scscr1);
+ return m_scscr1;
+}
+
+void sh3_base_device::scscr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCSCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scftdr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCFTDR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scftdr1);
+ return m_scftdr1;
+}
+
+void sh3_base_device::scftdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scftdr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCFTDR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::scssr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %04x (SCSSR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_scssr1);
+ return m_scssr1;
+}
+
+void sh3_base_device::scssr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scssr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %04x & %04x (SCSSR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scfrdr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCFRDR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scfrdr1);
+ return m_scfrdr1;
+}
+
+void sh3_base_device::scfrdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scfrdr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCFRDR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scfcr1_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %02x (SCFCR1) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scfcr1);
+ return m_scfcr1;
+}
+
+void sh3_base_device::scfcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scfcr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %02x & %02x (SCFCR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::scfdr1_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): IRDA unmapped internal read mask %04x (SCFDR1) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_scfdr1);
+ return m_scfdr1;
+}
+
+void sh3_base_device::scfdr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scfdr1);
+ logerror("'%s' (%08x): IRDA unmapped internal write %04x & %04x (SCFDR1)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// SCIF 7709
+uint8_t sh3_base_device::scsmr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCSMR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scsmr2);
+ return m_scsmr2;
+}
+
+void sh3_base_device::scsmr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsmr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCSMR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scbrr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCBRR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scbrr2);
+ return m_scbrr2;
+}
+
+void sh3_base_device::scbrr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scbrr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCBRR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scscr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCSCR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scscr2);
+ return m_scscr2;
+}
+
+void sh3_base_device::scscr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCSCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scftdr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCFTDR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scftdr2);
+ return m_scftdr2;
+}
+
+void sh3_base_device::scftdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scftdr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCFTDR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::scssr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %04x (SCSSR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_scssr2);
+ return m_scssr2;
+}
+
+void sh3_base_device::scssr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scssr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %04x & %04x (SCSSR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scfrdr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCFRDR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scfrdr2);
+ return m_scfrdr2;
+}
+
+void sh3_base_device::scfrdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scfrdr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCFRDR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint8_t sh3_base_device::scfcr2_r(offs_t offset, uint8_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %02x (SCFCR2) %02x\n", tag(), m_sh2_state->pc, mem_mask, m_scfcr2);
+ return m_scfcr2;
+}
+
+void sh3_base_device::scfcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scfcr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %02x & %02x (SCFCR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+uint16_t sh3_base_device::scfdr2_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): SCIF unmapped internal read mask %04x (SCFDR2) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_scfdr2);
+ return m_scfdr2;
+}
+
+void sh3_base_device::scfdr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scfdr2);
+ logerror("'%s' (%08x): SCIF unmapped internal write %04x & %04x (SCFDR2)\n", tag(), m_sh2_state->pc, data, mem_mask);
+}
+
+// UDI 7709S
+uint16_t sh3_base_device::sdir_r(offs_t offset, uint16_t mem_mask)
+{
+ logerror("'%s' (%08x): UDI unmapped internal read mask %04x (SDIR) %04x\n", tag(), m_sh2_state->pc, mem_mask, m_sdir);
+ return m_sdir;
+}
+
+void sh3_base_device::sdir_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_sdir);
+ logerror("'%s' (%08x): UDI unmapped internal write %04x & %04x (SDIR)\n", tag(), m_sh2_state->pc, data, mem_mask);
}
diff --git a/src/devices/cpu/sh/sh3comn.h b/src/devices/cpu/sh/sh3comn.h
index 30f8e59ab68..b735cdebec9 100644
--- a/src/devices/cpu/sh/sh3comn.h
+++ b/src/devices/cpu/sh/sh3comn.h
@@ -1,9 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont
-#pragma once
+#ifndef MAME_CPU_SH_SH3COMN_H
+#define MAME_CPU_SH_SH3COMN_H
-#ifndef __SH3COMN_H__
-#define __SH3COMN_H__
+#pragma once
// actual port handling is more complex than this
@@ -22,77 +22,4 @@
#define SH3_PORT_K (0x19*8)
#define SH3_PORT_L (0x1a*8)
-/* SH3 lower area regs */
-
-#define SH3_LOWER_REGBASE (0x04000000)
-#define SH3_LOWER_REGEND (0x07ffffff)
-
-#define INTEVT2 ((0x4000000 - SH3_LOWER_REGBASE)/4)
-#define IRR0_IRR1 ((0x4000004 - SH3_LOWER_REGBASE)/4)
-#define PINTER_IPRC ((0x4000014 - SH3_LOWER_REGBASE)/4)
-
-#define SH3_SAR0_ADDR ((0x4000020 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR0_ADDR ((0x4000024 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR0_ADDR ((0x4000028 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR0_ADDR ((0x400002c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR1_ADDR ((0x4000030 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR1_ADDR ((0x4000034 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR1_ADDR ((0x4000038 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR1_ADDR ((0x400003c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR2_ADDR ((0x4000040 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR2_ADDR ((0x4000044 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR2_ADDR ((0x4000048 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR2_ADDR ((0x400004c - SH3_LOWER_REGBASE)/4)
-#define SH3_SAR3_ADDR ((0x4000050 - SH3_LOWER_REGBASE)/4)
-#define SH3_DAR3_ADDR ((0x4000054 - SH3_LOWER_REGBASE)/4)
-#define SH3_DMATCR3_ADDR ((0x4000058 - SH3_LOWER_REGBASE)/4)
-#define SH3_CHCR3_ADDR ((0x400005c - SH3_LOWER_REGBASE)/4)
-#define SH3_DMAOR_ADDR ((0x4000060 - SH3_LOWER_REGBASE)/4)
-
-
-#define PCCR_PDCR ((0x4000104 - SH3_LOWER_REGBASE)/4)
-#define PECR_PFCR ((0x4000108 - SH3_LOWER_REGBASE)/4)
-#define PGCR_PHCR ((0x400010c - SH3_LOWER_REGBASE)/4)
-#define PJCR_PKCR ((0x4000110 - SH3_LOWER_REGBASE)/4)
-#define PLCR_SCPCR ((0x4000114 - SH3_LOWER_REGBASE)/4)
-
-#define PADR_PBDR ((0x4000120 - SH3_LOWER_REGBASE)/4)
-#define PCDR_PDDR ((0x4000124 - SH3_LOWER_REGBASE)/4)
-#define PEDR_PFDR ((0x4000128 - SH3_LOWER_REGBASE)/4)
-#define PGDR_PHDR ((0x400012c - SH3_LOWER_REGBASE)/4)
-#define PJDR_PKDR ((0x4000130 - SH3_LOWER_REGBASE)/4)
-#define PLDR_SCPDR ((0x4000134 - SH3_LOWER_REGBASE)/4)
-
-#define SCSMR2_SCBRR2 ((0x4000150 - SH3_LOWER_REGBASE)/4)
-#define SCSCR2_SCFTDR2 ((0x4000154 - SH3_LOWER_REGBASE)/4)
-#define SCSSR2_SCFRDR2 ((0x4000158 - SH3_LOWER_REGBASE)/4)
-#define SCFCR2_SCFDR2 ((0x400015c - SH3_LOWER_REGBASE)/4)
-
-
-/* SH3 upper area */
-
-
-#define SH3_UPPER_REGBASE (0xffffd000)
-#define SH3_UPPER_REGEND (0xffffffff)
-
-#define SH3_ICR0_IPRA_ADDR ((0xfffffee0 - SH3_UPPER_REGBASE)/4)
-#define SH3_IPRB_ADDR ((0xfffffee4 - SH3_UPPER_REGBASE)/4)
-
-#define SH3_SCSSR_ADDR ((0xfffffe88 - SH3_UPPER_REGBASE)/4)
-
-#define SH3_TOCR_TSTR_ADDR ((0xfffffe90 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR0_ADDR ((0xfffffe94 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT0_ADDR ((0xfffffe98 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR0_ADDR ((0xfffffe9c - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR1_ADDR ((0xfffffea0 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT1_ADDR ((0xfffffea4 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR1_ADDR ((0xfffffea8 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCOR2_ADDR ((0xfffffeac - SH3_UPPER_REGBASE)/4)
-#define SH3_TCNT2_ADDR ((0xfffffeb0 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCR2_ADDR ((0xfffffeb4 - SH3_UPPER_REGBASE)/4)
-#define SH3_TCPR2_ADDR ((0xfffffeb8 - SH3_UPPER_REGBASE)/4)
-#define SH3_TRA_ADDR ((0xffffffd0 - SH3_UPPER_REGBASE)/4)
-#define SH3_EXPEVT_ADDR ((0xffffffd4 - SH3_UPPER_REGBASE)/4)
-#define SH3_INTEVT_ADDR ((0xffffffd8 - SH3_UPPER_REGBASE)/4)
-
-#endif /* __SH3COMN_H__ */
+#endif // MAME_CPU_SH_SH3COMN_H
diff --git a/src/devices/cpu/sh/sh4.cpp b/src/devices/cpu/sh/sh4.cpp
index cb384aa2971..6e73b69a531 100644
--- a/src/devices/cpu/sh/sh4.cpp
+++ b/src/devices/cpu/sh/sh4.cpp
@@ -34,10 +34,17 @@
#include "cpu/drcumlsh.h"
-DEFINE_DEVICE_TYPE(SH3LE, sh3_device, "sh3le", "Hitachi SH-3 (little)")
-DEFINE_DEVICE_TYPE(SH3BE, sh3be_device, "sh3be", "Hitachi SH-3 (big)")
-DEFINE_DEVICE_TYPE(SH4LE, sh4_device, "sh4le", "Hitachi SH-4 (little)")
-DEFINE_DEVICE_TYPE(SH4BE, sh4be_device, "sh4be", "Hitachi SH-4 (big)")
+DEFINE_DEVICE_TYPE(SH3, sh3_device, "sh3", "Hitachi SH-3 (Unidentified)")
+DEFINE_DEVICE_TYPE(SH7708S, sh7708s_device, "sh7708s", "Hitachi SH7708S")
+DEFINE_DEVICE_TYPE(SH7709, sh7709_device, "sh7709", "Hitachi SH7709")
+DEFINE_DEVICE_TYPE(SH7709S, sh7709s_device, "sh7709s", "Hitachi SH7709S")
+DEFINE_DEVICE_TYPE(SH4, sh4_device, "sh4", "Hitachi SH-4 (Unidentified)")
+DEFINE_DEVICE_TYPE(SH7091, sh7091_device, "sh7091", "Hitachi SH7091")
+DEFINE_DEVICE_TYPE(SH7750, sh7750_device, "sh7750", "Hitachi SH7750")
+DEFINE_DEVICE_TYPE(SH7750R, sh7750r_device, "sh7750r", "Hitachi SH7750R")
+DEFINE_DEVICE_TYPE(SH7750S, sh7750s_device, "sh7750s", "Hitachi SH7750S")
+DEFINE_DEVICE_TYPE(SH7751, sh7751_device, "sh7751", "Hitachi SH7751")
+DEFINE_DEVICE_TYPE(SH7751R, sh7751r_device, "sh7751r", "Hitachi SH7751R")
#if 0
@@ -47,6 +54,8 @@ void sh4_base_device::sh4_internal_map(address_map &map)
map(0x1C000000, 0x1C000FFF).ram().mirror(0x03FFD000);
map(0x1C002000, 0x1C002FFF).ram().mirror(0x03FFD000);
map(0xE0000000, 0xE000003F).ram().mirror(0x03FFFFC0);
+
+ sh4_register_map(map);
}
#endif
@@ -61,15 +70,819 @@ void sh4_base_device::sh4_internal_map(address_map &map)
map(0xF7000000, 0xF77FFFFF).rw(FUNC(sh4_base_device::sh4_utlb_data_array1_r), FUNC(sh4_base_device::sh4_utlb_data_array1_w));
map(0xF7800000, 0xF7FFFFFF).rw(FUNC(sh4_base_device::sh4_utlb_data_array2_r), FUNC(sh4_base_device::sh4_utlb_data_array2_w));
- map(0xFE000000, 0xFFFFFFFF).rw(FUNC(sh4_base_device::sh4_internal_r), FUNC(sh4_base_device::sh4_internal_w)).umask32(0xffffffff);
+ sh4_register_map(map);
+}
+
+void sh4_device::sh4_register_map(address_map &map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7751; }, "pvr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_map(map);
+ dmac_map(map);
+ cpg_7750r_map(map);
+ rtc_map(map);
+ intc_7750r_map(map);
+ tmu_7750r_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_7750r_map(map);
+ pci_7751_map(map);
+}
+
+void sh7091_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7091; }, "pvr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_map(map);
+ dmac_map(map);
+ cpg_map(map);
+ rtc_map(map);
+ intc_map(map);
+ tmu_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_map(map);
+}
+
+void sh7750_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7750; }, "pvr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_map(map);
+ dmac_map(map);
+ cpg_map(map);
+ rtc_map(map);
+ intc_map(map);
+ tmu_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_map(map);
+}
+
+void sh7750s_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7750S; }, "pvr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_map(map);
+ dmac_map(map);
+ cpg_map(map);
+ rtc_map(map);
+ intc_7750s_map(map);
+ tmu_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_map(map);
+}
+
+void sh7750r_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7750R; }, "pvr_r");
+ map(0xff000044, 0xff000047).lr32([] { return PRR_SH7750R; }, "prr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_7750r_map(map);
+ dmac_7750r_map(map);
+ cpg_7750r_map(map);
+ rtc_7750r_map(map);
+ intc_7750r_map(map);
+ tmu_7750r_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_7750r_map(map);
+}
+
+void sh7751_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7751; }, "pvr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_map(map);
+ dmac_map(map);
+ cpg_7750r_map(map);
+ rtc_map(map);
+ intc_7750r_map(map);
+ tmu_7750r_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_7750r_map(map);
+ pci_7751_map(map);
+}
+
+void sh7751r_device::sh4_register_map(address_map& map)
+{
+ map(0xff000030, 0xff000033).lr32([] { return PVR_SH7751R; }, "pvr_r");
+ map(0xff000044, 0xff000047).lr32([] { return PRR_SH7751R; }, "prr_r");
+
+ ccn_map(map);
+ ubc_map(map);
+ bsc_7750r_map(map);
+ dmac_7750r_map(map);
+ cpg_7750r_map(map);
+ rtc_7750r_map(map);
+ intc_7750r_map(map);
+ tmu_7750r_map(map);
+ sci_map(map);
+ scif_map(map);
+ hudi_7750r_map(map);
+ pci_7751_map(map);
+}
+
+void sh4_base_device::ccn_map(address_map &map)
+{
+ map(0xff000000, 0xff000003).rw(FUNC(sh4_base_device::pteh_r), FUNC(sh4_base_device::pteh_w));
+ map(0xff000004, 0xff000007).rw(FUNC(sh4_base_device::ptel_r), FUNC(sh4_base_device::ptel_w));
+ map(0xff000008, 0xff00000b).rw(FUNC(sh4_base_device::ttb_r), FUNC(sh4_base_device::ttb_w));
+ map(0xff00000c, 0xff00000f).rw(FUNC(sh4_base_device::tea_r), FUNC(sh4_base_device::tea_w));
+ map(0xff000010, 0xff000013).rw(FUNC(sh4_base_device::mmucr_r), FUNC(sh4_base_device::mmucr_w));
+ map(0xff000014, 0xff000014).rw(FUNC(sh4_base_device::basra_r), FUNC(sh4_base_device::basra_w));
+ map(0xff000018, 0xff000018).rw(FUNC(sh4_base_device::basrb_r), FUNC(sh4_base_device::basrb_w));
+ map(0xff00001c, 0xff00001f).rw(FUNC(sh4_base_device::ccr_r), FUNC(sh4_base_device::ccr_w));
+ map(0xff000020, 0xff000023).rw(FUNC(sh4_base_device::tra_r), FUNC(sh4_base_device::tra_w));
+ map(0xff000024, 0xff000027).rw(FUNC(sh4_base_device::expevt_r), FUNC(sh4_base_device::expevt_w));
+ map(0xff000028, 0xff00002b).rw(FUNC(sh4_base_device::intevt_r), FUNC(sh4_base_device::intevt_w));
+ map(0xff000034, 0xff000037).rw(FUNC(sh4_base_device::ptea_r), FUNC(sh4_base_device::ptea_w));
+ map(0xff000038, 0xff00003b).rw(FUNC(sh4_base_device::qacr0_r), FUNC(sh4_base_device::qacr0_w));
+ map(0xff00003c, 0xff00003f).rw(FUNC(sh4_base_device::qacr1_r), FUNC(sh4_base_device::qacr1_w));
+}
+
+void sh4_base_device::ubc_map(address_map &map)
+{
+ map(0xff200000, 0xff200003).rw(FUNC(sh4_base_device::bara_r), FUNC(sh4_base_device::bara_w));
+ map(0xff200004, 0xff200004).rw(FUNC(sh4_base_device::bamra_r), FUNC(sh4_base_device::bamra_w));
+ map(0xff200008, 0xff200009).rw(FUNC(sh4_base_device::bbra_r), FUNC(sh4_base_device::bbra_w));
+ map(0xff20000c, 0xff20000f).rw(FUNC(sh4_base_device::barb_r), FUNC(sh4_base_device::barb_w));
+ map(0xff200010, 0xff200010).rw(FUNC(sh4_base_device::bamrb_r), FUNC(sh4_base_device::bamrb_w));
+ map(0xff200014, 0xff200015).rw(FUNC(sh4_base_device::bbrb_r), FUNC(sh4_base_device::bbrb_w));
+ map(0xff200018, 0xff20001b).rw(FUNC(sh4_base_device::bdrb_r), FUNC(sh4_base_device::bdrb_w));
+ map(0xff20001c, 0xff20001f).rw(FUNC(sh4_base_device::bdmrb_r), FUNC(sh4_base_device::bdmrb_w));
+ map(0xff200020, 0xff200021).rw(FUNC(sh4_base_device::brcr_r), FUNC(sh4_base_device::brcr_w));
+}
+
+void sh4_base_device::bsc_map(address_map& map)
+{
+ map(0xff800000, 0xff800003).rw(FUNC(sh4_base_device::bcr1_r), FUNC(sh4_base_device::bcr1_w));
+ map(0xff800004, 0xff800005).rw(FUNC(sh4_base_device::bcr2_r), FUNC(sh4_base_device::bcr2_w));
+ map(0xff800008, 0xff80000b).rw(FUNC(sh4_base_device::wcr1_r), FUNC(sh4_base_device::wcr1_w));
+ map(0xff80000c, 0xff80000f).rw(FUNC(sh4_base_device::wcr2_r), FUNC(sh4_base_device::wcr2_w));
+ map(0xff800010, 0xff800013).rw(FUNC(sh4_base_device::wcr3_r), FUNC(sh4_base_device::wcr3_w));
+ map(0xff800014, 0xff800017).rw(FUNC(sh4_base_device::mcr_r), FUNC(sh4_base_device::mcr_w));
+ map(0xff800018, 0xff800019).rw(FUNC(sh4_base_device::pcr_r), FUNC(sh4_base_device::pcr_w));
+ map(0xff80001c, 0xff80001d).rw(FUNC(sh4_base_device::rtcsr_r), FUNC(sh4_base_device::rtcsr_w));
+ map(0xff800020, 0xff800021).rw(FUNC(sh4_base_device::rtcnt_r), FUNC(sh4_base_device::rtcnt_w));
+ map(0xff800024, 0xff800025).rw(FUNC(sh4_base_device::rtcor_r), FUNC(sh4_base_device::rtcor_w));
+ map(0xff800028, 0xff800029).rw(FUNC(sh4_base_device::rfcr_r), FUNC(sh4_base_device::rfcr_w));
+ map(0xff80002c, 0xff80002f).rw(FUNC(sh4_base_device::pctra_r), FUNC(sh4_base_device::pctra_w));
+ map(0xff800030, 0xff800031).rw(FUNC(sh4_base_device::pdtra_r), FUNC(sh4_base_device::pdtra_w));
+ map(0xff800040, 0xff800043).rw(FUNC(sh4_base_device::pctrb_r), FUNC(sh4_base_device::pctrb_w));
+ map(0xff800044, 0xff800045).rw(FUNC(sh4_base_device::pdtrb_r), FUNC(sh4_base_device::pdtrb_w));
+ map(0xff800048, 0xff800049).rw(FUNC(sh4_base_device::gpioic_r), FUNC(sh4_base_device::gpioic_w));
+ map(0xff900000, 0xff90ffff).w(FUNC(sh4_base_device::sdmr2_w));
+ map(0xff940000, 0xff94ffff).w(FUNC(sh4_base_device::sdmr3_w));
+}
+
+void sh4_base_device::bsc_7750r_map(address_map& map)
+{
+ bsc_map(map);
+
+ map(0xff800050, 0xff800051).rw(FUNC(sh4_base_device::bcr3_r), FUNC(sh4_base_device::bcr3_w));
+ map(0xfe0a00f0, 0xfe0a00f3).rw(FUNC(sh4_base_device::bcr4_r), FUNC(sh4_base_device::bcr4_w));
+}
+
+void sh4_base_device::dmac_map(address_map& map)
+{
+ map(0xffa00000, 0xffa00003).rw(FUNC(sh4_base_device::sar0_r), FUNC(sh4_base_device::sar0_w));
+ map(0xffa00004, 0xffa00007).rw(FUNC(sh4_base_device::dar0_r), FUNC(sh4_base_device::dar0_w));
+ map(0xffa00008, 0xffa0000b).rw(FUNC(sh4_base_device::dmatcr0_r), FUNC(sh4_base_device::dmatcr0_w));
+ map(0xffa0000c, 0xffa0000f).rw(FUNC(sh4_base_device::chcr0_r), FUNC(sh4_base_device::chcr0_w));
+ map(0xffa00010, 0xffa00013).rw(FUNC(sh4_base_device::sar1_r), FUNC(sh4_base_device::sar1_w));
+ map(0xffa00014, 0xffa00017).rw(FUNC(sh4_base_device::dar1_r), FUNC(sh4_base_device::dar1_w));
+ map(0xffa00018, 0xffa0001b).rw(FUNC(sh4_base_device::dmatcr1_r), FUNC(sh4_base_device::dmatcr1_w));
+ map(0xffa0001c, 0xffa0001f).rw(FUNC(sh4_base_device::chcr1_r), FUNC(sh4_base_device::chcr1_w));
+ map(0xffa00020, 0xffa00023).rw(FUNC(sh4_base_device::sar2_r), FUNC(sh4_base_device::sar2_w));
+ map(0xffa00024, 0xffa00027).rw(FUNC(sh4_base_device::dar2_r), FUNC(sh4_base_device::dar2_w));
+ map(0xffa00028, 0xffa0002b).rw(FUNC(sh4_base_device::dmatcr2_r), FUNC(sh4_base_device::dmatcr2_w));
+ map(0xffa0002c, 0xffa0002f).rw(FUNC(sh4_base_device::chcr2_r), FUNC(sh4_base_device::chcr2_w));
+ map(0xffa00030, 0xffa00033).rw(FUNC(sh4_base_device::sar3_r), FUNC(sh4_base_device::sar3_w));
+ map(0xffa00034, 0xffa00037).rw(FUNC(sh4_base_device::dar3_r), FUNC(sh4_base_device::dar3_w));
+ map(0xffa00038, 0xffa0003b).rw(FUNC(sh4_base_device::dmatcr3_r), FUNC(sh4_base_device::dmatcr3_w));
+ map(0xffa0003c, 0xffa0003f).rw(FUNC(sh4_base_device::chcr3_r), FUNC(sh4_base_device::chcr3_w));
+ map(0xffa00040, 0xffa00043).rw(FUNC(sh4_base_device::dmaor_r), FUNC(sh4_base_device::dmaor_w));
+}
+
+void sh4_base_device::dmac_7750r_map(address_map& map)
+{
+ dmac_map(map);
+
+ map(0xffa00050, 0xffa00053).rw(FUNC(sh4_base_device::sar4_r), FUNC(sh4_base_device::sar4_w));
+ map(0xffa00054, 0xffa00057).rw(FUNC(sh4_base_device::dar4_r), FUNC(sh4_base_device::dar4_w));
+ map(0xffa00058, 0xffa0005b).rw(FUNC(sh4_base_device::dmatcr4_r), FUNC(sh4_base_device::dmatcr4_w));
+ map(0xffa0005c, 0xffa0005f).rw(FUNC(sh4_base_device::chcr4_r), FUNC(sh4_base_device::chcr4_w));
+ map(0xffa00060, 0xffa00063).rw(FUNC(sh4_base_device::sar5_r), FUNC(sh4_base_device::sar5_w));
+ map(0xffa00064, 0xffa00067).rw(FUNC(sh4_base_device::dar5_r), FUNC(sh4_base_device::dar5_w));
+ map(0xffa00068, 0xffa0006b).rw(FUNC(sh4_base_device::dmatcr5_r), FUNC(sh4_base_device::dmatcr5_w));
+ map(0xffa0006c, 0xffa0006f).rw(FUNC(sh4_base_device::chcr5_r), FUNC(sh4_base_device::chcr5_w));
+ map(0xffa00070, 0xffa00073).rw(FUNC(sh4_base_device::sar6_r), FUNC(sh4_base_device::sar6_w));
+ map(0xffa00074, 0xffa00077).rw(FUNC(sh4_base_device::dar6_r), FUNC(sh4_base_device::dar6_w));
+ map(0xffa00078, 0xffa0007b).rw(FUNC(sh4_base_device::dmatcr6_r), FUNC(sh4_base_device::dmatcr6_w));
+ map(0xffa0007c, 0xffa0007f).rw(FUNC(sh4_base_device::chcr6_r), FUNC(sh4_base_device::chcr6_w));
+ map(0xffa00080, 0xffa00083).rw(FUNC(sh4_base_device::sar7_r), FUNC(sh4_base_device::sar7_w));
+ map(0xffa00084, 0xffa00087).rw(FUNC(sh4_base_device::dar7_r), FUNC(sh4_base_device::dar7_w));
+ map(0xffa00088, 0xffa0008b).rw(FUNC(sh4_base_device::dmatcr7_r), FUNC(sh4_base_device::dmatcr7_w));
+ map(0xffa0008c, 0xffa0008f).rw(FUNC(sh4_base_device::chcr7_r), FUNC(sh4_base_device::chcr7_w));
+}
+
+void sh4_base_device::cpg_map(address_map& map)
+{
+ map(0xffc00000, 0xffc00001).rw(FUNC(sh4_base_device::frqcr_r), FUNC(sh4_base_device::frqcr_w));
+ map(0xffc00004, 0xffc00004).rw(FUNC(sh4_base_device::stbcr_r), FUNC(sh4_base_device::stbcr_w));
+ map(0xffc00008, 0xffc00008).r(FUNC(sh4_base_device::wtcnt_r));
+ map(0xffc00008, 0xffc00009).w(FUNC(sh4_base_device::wtcnt_w));
+ map(0xffc0000c, 0xffc0000c).r(FUNC(sh4_base_device::wtcsr_r));
+ map(0xffc0000c, 0xffc0000d).w(FUNC(sh4_base_device::wtcsr_w));
+ map(0xffc00010, 0xffc00010).rw(FUNC(sh4_base_device::stbcr2_r), FUNC(sh4_base_device::stbcr2_w));
+}
+
+void sh4_base_device::cpg_7750r_map(address_map& map)
+{
+ cpg_map(map);
+
+ map(0xfe0a0000, 0xfe0a0003).rw(FUNC(sh4_base_device::clkstp00_r), FUNC(sh4_base_device::clkstp00_w));
+ map(0xfe0a0008, 0xfe0a000b).w(FUNC(sh4_base_device::clkstpclr_w));
+}
+
+void sh4_base_device::rtc_map(address_map& map)
+{
+ map(0xffc80000, 0xffc80000).r(FUNC(sh4_base_device::r64cnt_r));
+ map(0xffc80004, 0xffc80004).rw(FUNC(sh4_base_device::rseccnt_r), FUNC(sh4_base_device::rseccnt_w));
+ map(0xffc80008, 0xffc80008).rw(FUNC(sh4_base_device::rmincnt_r), FUNC(sh4_base_device::rmincnt_w));
+ map(0xffc8000c, 0xffc8000c).rw(FUNC(sh4_base_device::rhrcnt_r), FUNC(sh4_base_device::rhrcnt_w));
+ map(0xffc80010, 0xffc80010).rw(FUNC(sh4_base_device::rwkcnt_r), FUNC(sh4_base_device::rwkcnt_w));
+ map(0xffc80014, 0xffc80014).rw(FUNC(sh4_base_device::rdaycnt_r), FUNC(sh4_base_device::rdaycnt_w));
+ map(0xffc80018, 0xffc80018).rw(FUNC(sh4_base_device::rmoncnt_r), FUNC(sh4_base_device::rmoncnt_w));
+ map(0xffc8001c, 0xffc8001d).rw(FUNC(sh4_base_device::ryrcnt_r), FUNC(sh4_base_device::ryrcnt_w));
+ map(0xffc80020, 0xffc80020).rw(FUNC(sh4_base_device::rsecar_r), FUNC(sh4_base_device::rsecar_w));
+ map(0xffc80024, 0xffc80024).rw(FUNC(sh4_base_device::rminar_r), FUNC(sh4_base_device::rminar_w));
+ map(0xffc80028, 0xffc80028).rw(FUNC(sh4_base_device::rhrar_r), FUNC(sh4_base_device::rhrar_w));
+ map(0xffc8002c, 0xffc8002c).rw(FUNC(sh4_base_device::rwkar_r), FUNC(sh4_base_device::rwkar_w));
+ map(0xffc80030, 0xffc80030).rw(FUNC(sh4_base_device::rdayar_r), FUNC(sh4_base_device::rdayar_w));
+ map(0xffc80034, 0xffc80034).rw(FUNC(sh4_base_device::rmonar_r), FUNC(sh4_base_device::rmonar_w));
+ map(0xffc80038, 0xffc80038).rw(FUNC(sh4_base_device::rcr1_r), FUNC(sh4_base_device::rcr1_w));
+ map(0xffc8003c, 0xffc8003c).rw(FUNC(sh4_base_device::rcr2_r), FUNC(sh4_base_device::rcr2_w));
+}
+
+void sh4_base_device::rtc_7750r_map(address_map& map)
+{
+ rtc_map(map);
+
+ map(0xffc80050, 0xffc80050).rw(FUNC(sh4_base_device::rcr3_r), FUNC(sh4_base_device::rcr3_w));
+ map(0xffc80054, 0xffc80055).rw(FUNC(sh4_base_device::ryrar_r), FUNC(sh4_base_device::ryrar_w));
+}
+
+void sh4_base_device::intc_map(address_map& map)
+{
+ map(0xffd00000, 0xffd00001).rw(FUNC(sh4_base_device::icr_r), FUNC(sh4_base_device::icr_w));
+ map(0xffd00004, 0xffd00005).rw(FUNC(sh4_base_device::ipra_r), FUNC(sh4_base_device::ipra_w));
+ map(0xffd00008, 0xffd00009).rw(FUNC(sh4_base_device::iprb_r), FUNC(sh4_base_device::iprb_w));
+ map(0xffd0000c, 0xffd0000d).rw(FUNC(sh4_base_device::iprc_r), FUNC(sh4_base_device::iprc_w));
+}
+
+void sh4_base_device::intc_7750s_map(address_map& map)
+{
+ intc_map(map);
+
+ map(0xffd00010, 0xffd00011).rw(FUNC(sh4_base_device::iprd_r), FUNC(sh4_base_device::iprd_w));
+}
+
+void sh4_base_device::intc_7750r_map(address_map& map)
+{
+ intc_7750s_map(map);
+
+ map(0xfe080000, 0xfe080003).rw(FUNC(sh4_base_device::intpri00_r), FUNC(sh4_base_device::intpri00_w));
+ map(0xfe080020, 0xfe080023).rw(FUNC(sh4_base_device::intreq00_r), FUNC(sh4_base_device::intreq00_w));
+ map(0xfe080040, 0xfe080043).rw(FUNC(sh4_base_device::intmsk00_r), FUNC(sh4_base_device::intmskclr_w));
+ map(0xfe080060, 0xfe080063).w(FUNC(sh4_base_device::intmsk00_w));
+}
+
+void sh4_base_device::tmu_map(address_map& map)
+{
+ map(0xffd80000, 0xffd80000).rw(FUNC(sh4_base_device::tocr_r), FUNC(sh4_base_device::tocr_w));
+ map(0xffd80004, 0xffd80004).rw(FUNC(sh4_base_device::tstr_r), FUNC(sh4_base_device::tstr_w));
+ map(0xffd80008, 0xffd8000b).rw(FUNC(sh4_base_device::tcor0_r), FUNC(sh4_base_device::tcor0_w));
+ map(0xffd8000c, 0xffd8000f).rw(FUNC(sh4_base_device::tcnt0_r), FUNC(sh4_base_device::tcnt0_w));
+ map(0xffd80010, 0xffd80011).rw(FUNC(sh4_base_device::tcr0_r), FUNC(sh4_base_device::tcr0_w));
+ map(0xffd80014, 0xffd80017).rw(FUNC(sh4_base_device::tcor1_r), FUNC(sh4_base_device::tcor1_w));
+ map(0xffd80018, 0xffd8001b).rw(FUNC(sh4_base_device::tcnt1_r), FUNC(sh4_base_device::tcnt1_w));
+ map(0xffd8001c, 0xffd8001d).rw(FUNC(sh4_base_device::tcr1_r), FUNC(sh4_base_device::tcr1_w));
+ map(0xffd80020, 0xffd80023).rw(FUNC(sh4_base_device::tcor2_r), FUNC(sh4_base_device::tcor2_w));
+ map(0xffd80024, 0xffd80027).rw(FUNC(sh4_base_device::tcnt2_r), FUNC(sh4_base_device::tcnt2_w));
+ map(0xffd80028, 0xffd80029).rw(FUNC(sh4_base_device::tcr2_r), FUNC(sh4_base_device::tcr2_w));
+ map(0xffd8002c, 0xffd8002f).rw(FUNC(sh4_base_device::tcpr2_r), FUNC(sh4_base_device::tcpr2_w));
+}
+
+void sh4_base_device::tmu_7750r_map(address_map& map)
+{
+ tmu_map(map);
+
+ map(0xfe100004, 0xfe100004).rw(FUNC(sh4_base_device::tstr2_r), FUNC(sh4_base_device::tstr2_w));
+ map(0xfe100008, 0xfe10000b).rw(FUNC(sh4_base_device::tcor3_r), FUNC(sh4_base_device::tcor3_w));
+ map(0xfe10000c, 0xfe10000f).rw(FUNC(sh4_base_device::tcnt3_r), FUNC(sh4_base_device::tcnt3_w));
+ map(0xfe100010, 0xfe100011).rw(FUNC(sh4_base_device::tcr3_r), FUNC(sh4_base_device::tcr3_w));
+ map(0xfe100014, 0xfe100017).rw(FUNC(sh4_base_device::tcor4_r), FUNC(sh4_base_device::tcor4_w));
+ map(0xfe100018, 0xfe10001b).rw(FUNC(sh4_base_device::tcnt4_r), FUNC(sh4_base_device::tcnt4_w));
+ map(0xfe10001c, 0xfe10001d).rw(FUNC(sh4_base_device::tcr4_r), FUNC(sh4_base_device::tcr4_w));
+}
+
+void sh4_base_device::sci_map(address_map& map)
+{
+ map(0xffe00000, 0xffe00000).rw(FUNC(sh4_base_device::scsmr1_r), FUNC(sh4_base_device::scsmr1_w));
+ map(0xffe00004, 0xffe00004).rw(FUNC(sh4_base_device::scbrr1_r), FUNC(sh4_base_device::scbrr1_w));
+ map(0xffe00008, 0xffe00008).rw(FUNC(sh4_base_device::scscr1_r), FUNC(sh4_base_device::scscr1_w));
+ map(0xffe0000c, 0xffe0000c).rw(FUNC(sh4_base_device::sctdr1_r), FUNC(sh4_base_device::sctdr1_w));
+ map(0xffe00010, 0xffe00010).rw(FUNC(sh4_base_device::scssr1_r), FUNC(sh4_base_device::scssr1_w));
+ map(0xffe00014, 0xffe00014).r(FUNC(sh4_base_device::scrdr1_r));
+ map(0xffe00018, 0xffe00018).rw(FUNC(sh4_base_device::scscmr1_r), FUNC(sh4_base_device::scscmr1_w));
+ map(0xffe0001c, 0xffe0001c).rw(FUNC(sh4_base_device::scsptr1_r), FUNC(sh4_base_device::scsptr1_w));
+}
+
+void sh4_base_device::scif_map(address_map& map)
+{
+ map(0xffe80000, 0xffe80001).rw(FUNC(sh4_base_device::scsmr2_r), FUNC(sh4_base_device::scsmr2_w));
+ map(0xffe80004, 0xffe80004).rw(FUNC(sh4_base_device::scbrr2_r), FUNC(sh4_base_device::scbrr2_w));
+ map(0xffe80008, 0xffe80009).rw(FUNC(sh4_base_device::scscr2_r), FUNC(sh4_base_device::scscr2_w));
+ map(0xffe8000c, 0xffe8000c).rw(FUNC(sh4_base_device::scftdr2_r), FUNC(sh4_base_device::scftdr2_w));
+ map(0xffe80010, 0xffe80011).rw(FUNC(sh4_base_device::scfsr2_r), FUNC(sh4_base_device::scfsr2_w));
+ map(0xffe80014, 0xffe80014).r(FUNC(sh4_base_device::scfrdr2_r));
+ map(0xffe80018, 0xffe80019).rw(FUNC(sh4_base_device::scfcr2_r), FUNC(sh4_base_device::scfcr2_w));
+ map(0xffe8001c, 0xffe8001d).r(FUNC(sh4_base_device::scfdr2_r));
+ map(0xffe80020, 0xffe80021).rw(FUNC(sh4_base_device::scsptr2_r), FUNC(sh4_base_device::scsptr2_w));
+ map(0xffe80024, 0xffe80025).rw(FUNC(sh4_base_device::sclsr2_r), FUNC(sh4_base_device::sclsr2_w));
+}
+
+void sh4_base_device::hudi_map(address_map &map)
+{
+ map(0xfff00000, 0xfff00001).rw(FUNC(sh4_base_device::sdir_r), FUNC(sh4_base_device::sdir_w));
+ map(0xfff00008, 0xfff0000b).rw(FUNC(sh4_base_device::sddr_r), FUNC(sh4_base_device::sddr_w));
+}
+
+void sh4_base_device::hudi_7750r_map(address_map& map)
+{
+ hudi_map(map);
+
+ map(0xfff00014, 0xfff00015).rw(FUNC(sh4_base_device::sdint_r), FUNC(sh4_base_device::sdint_w));
+}
+
+void sh4_base_device::pci_7751_map(address_map& map)
+{
+ // PCI
+ // 0xfd000000, 0xfdffffff PCIMEM
+
+ // PCIC
+ map(0xfe200000, 0xfe200003).r(FUNC(sh4_base_device::pciconf0_r));
+ map(0xfe200004, 0xfe200007).rw(FUNC(sh4_base_device::pciconf1_r), FUNC(sh4_base_device::pciconf1_w));
+ map(0xfe200008, 0xfe20000b).rw(FUNC(sh4_base_device::pciconf2_r), FUNC(sh4_base_device::pciconf2_w));
+ map(0xfe20000c, 0xfe20000f).rw(FUNC(sh4_base_device::pciconf3_r), FUNC(sh4_base_device::pciconf3_w));
+ map(0xfe200010, 0xfe200013).rw(FUNC(sh4_base_device::pciconf4_r), FUNC(sh4_base_device::pciconf4_w));
+ map(0xfe200014, 0xfe200017).rw(FUNC(sh4_base_device::pciconf5_r), FUNC(sh4_base_device::pciconf5_w));
+ map(0xfe200018, 0xfe20001b).rw(FUNC(sh4_base_device::pciconf6_r), FUNC(sh4_base_device::pciconf6_w));
+ map(0xfe20001c, 0xfe20001f).r(FUNC(sh4_base_device::pciconf7_r));
+ map(0xfe200020, 0xfe200023).r(FUNC(sh4_base_device::pciconf8_r));
+ map(0xfe200024, 0xfe200027).r(FUNC(sh4_base_device::pciconf9_r));
+ map(0xfe200028, 0xfe20002b).r(FUNC(sh4_base_device::pciconf10_r));
+ map(0xfe20002c, 0xfe20002f).rw(FUNC(sh4_base_device::pciconf11_r), FUNC(sh4_base_device::pciconf11_w));
+ map(0xfe200030, 0xfe200033).r(FUNC(sh4_base_device::pciconf12_r));
+ map(0xfe200034, 0xfe200037).r(FUNC(sh4_base_device::pciconf13_r));
+ map(0xfe200038, 0xfe20003b).r(FUNC(sh4_base_device::pciconf14_r));
+ map(0xfe20003c, 0xfe20003f).rw(FUNC(sh4_base_device::pciconf15_r), FUNC(sh4_base_device::pciconf15_w));
+ map(0xfe200040, 0xfe200043).rw(FUNC(sh4_base_device::pciconf16_r), FUNC(sh4_base_device::pciconf16_w));
+ map(0xfe200044, 0xfe200047).rw(FUNC(sh4_base_device::pciconf17_r), FUNC(sh4_base_device::pciconf17_w));
+ map(0xfe200100, 0xfe200103).rw(FUNC(sh4_base_device::pcicr_r), FUNC(sh4_base_device::pcicr_w));
+ map(0xfe200104, 0xfe200107).rw(FUNC(sh4_base_device::pcilsr0_r), FUNC(sh4_base_device::pcilsr0_w));
+ map(0xfe200108, 0xfe20010b).rw(FUNC(sh4_base_device::pcilsr1_r), FUNC(sh4_base_device::pcilsr1_w));
+ map(0xfe20010c, 0xfe20010f).rw(FUNC(sh4_base_device::pcilar0_r), FUNC(sh4_base_device::pcilar0_w));
+ map(0xfe200110, 0xfe200113).rw(FUNC(sh4_base_device::pcilar1_r), FUNC(sh4_base_device::pcilar1_w));
+ map(0xfe200114, 0xfe200117).rw(FUNC(sh4_base_device::pciint_r), FUNC(sh4_base_device::pciint_w));
+ map(0xfe200118, 0xfe20011b).rw(FUNC(sh4_base_device::pciintm_r), FUNC(sh4_base_device::pciintm_w));
+ map(0xfe20011c, 0xfe20011f).rw(FUNC(sh4_base_device::pcialr_r), FUNC(sh4_base_device::pcialr_w));
+ map(0xfe200120, 0xfe200123).rw(FUNC(sh4_base_device::pciclr_r), FUNC(sh4_base_device::pciclr_w));
+ map(0xfe200130, 0xfe200133).rw(FUNC(sh4_base_device::pciaint_r), FUNC(sh4_base_device::pciaint_w));
+ map(0xfe200134, 0xfe200137).rw(FUNC(sh4_base_device::pciaintm_r), FUNC(sh4_base_device::pciaintm_w));
+ map(0xfe200138, 0xfe20013b).rw(FUNC(sh4_base_device::pcibllr_r), FUNC(sh4_base_device::pcibllr_w));
+ map(0xfe200140, 0xfe200143).rw(FUNC(sh4_base_device::pcidmabt_r), FUNC(sh4_base_device::pcidmabt_w));
+ map(0xfe200180, 0xfe200183).rw(FUNC(sh4_base_device::pcidpa0_r), FUNC(sh4_base_device::pcidpa0_w));
+ map(0xfe200184, 0xfe200187).rw(FUNC(sh4_base_device::pcidla0_r), FUNC(sh4_base_device::pcidla0_w));
+ map(0xfe200188, 0xfe20018b).rw(FUNC(sh4_base_device::pcidtc0_r), FUNC(sh4_base_device::pcidtc0_w));
+ map(0xfe20018c, 0xfe20018f).rw(FUNC(sh4_base_device::pcidcr0_r), FUNC(sh4_base_device::pcidcr0_w));
+ map(0xfe200190, 0xfe200193).rw(FUNC(sh4_base_device::pcidpa1_r), FUNC(sh4_base_device::pcidpa1_w));
+ map(0xfe200194, 0xfe200197).rw(FUNC(sh4_base_device::pcidla1_r), FUNC(sh4_base_device::pcidla1_w));
+ map(0xfe200198, 0xfe20019b).rw(FUNC(sh4_base_device::pcidtc1_r), FUNC(sh4_base_device::pcidtc1_w));
+ map(0xfe20019c, 0xfe20019f).rw(FUNC(sh4_base_device::pcidcr1_r), FUNC(sh4_base_device::pcidcr1_w));
+ map(0xfe2001a0, 0xfe2001a3).rw(FUNC(sh4_base_device::pcidpa2_r), FUNC(sh4_base_device::pcidpa2_w));
+ map(0xfe2001a4, 0xfe2001a7).rw(FUNC(sh4_base_device::pcidla2_r), FUNC(sh4_base_device::pcidla2_w));
+ map(0xfe2001a8, 0xfe2001ab).rw(FUNC(sh4_base_device::pcidtc2_r), FUNC(sh4_base_device::pcidtc2_w));
+ map(0xfe2001ac, 0xfe2001af).rw(FUNC(sh4_base_device::pcidcr2_r), FUNC(sh4_base_device::pcidcr2_w));
+ map(0xfe2001b0, 0xfe2001b3).rw(FUNC(sh4_base_device::pcidpa3_r), FUNC(sh4_base_device::pcidpa3_w));
+ map(0xfe2001b4, 0xfe2001b7).rw(FUNC(sh4_base_device::pcidla3_r), FUNC(sh4_base_device::pcidla3_w));
+ map(0xfe2001b8, 0xfe2001bb).rw(FUNC(sh4_base_device::pcidtc3_r), FUNC(sh4_base_device::pcidtc3_w));
+ map(0xfe2001bc, 0xfe2001bf).rw(FUNC(sh4_base_device::pcidcr3_r), FUNC(sh4_base_device::pcidcr3_w));
+ map(0xfe2001c0, 0xfe2001c3).rw(FUNC(sh4_base_device::pcipar_r), FUNC(sh4_base_device::pcipar_w));
+ map(0xfe2001c4, 0xfe2001c7).rw(FUNC(sh4_base_device::pcimbr_r), FUNC(sh4_base_device::pcimbr_w));
+ map(0xfe2001c8, 0xfe2001cb).rw(FUNC(sh4_base_device::pciiobr_r), FUNC(sh4_base_device::pciiobr_w));
+ map(0xfe2001cc, 0xfe2001cf).rw(FUNC(sh4_base_device::pcipint_r), FUNC(sh4_base_device::pcipint_w));
+ map(0xfe2001d0, 0xfe2001d3).rw(FUNC(sh4_base_device::pcipintm_r), FUNC(sh4_base_device::pcipintm_w));
+ map(0xfe2001d4, 0xfe2001d7).rw(FUNC(sh4_base_device::pciclkr_r), FUNC(sh4_base_device::pciclkr_w));
+ map(0xfe2001e0, 0xfe2001e3).rw(FUNC(sh4_base_device::pcibcr1_r), FUNC(sh4_base_device::pcibcr1_w));
+ map(0xfe2001e4, 0xfe2001e7).rw(FUNC(sh4_base_device::pcibcr2_r), FUNC(sh4_base_device::pcibcr2_w));
+ map(0xfe2001f8, 0xfe2001fb).rw(FUNC(sh4_base_device::pcibcr3_r), FUNC(sh4_base_device::pcibcr3_w));
+ map(0xfe2001e8, 0xfe2001eb).rw(FUNC(sh4_base_device::pciwcr1_r), FUNC(sh4_base_device::pciwcr1_w));
+ map(0xfe2001ec, 0xfe2001ef).rw(FUNC(sh4_base_device::pciwcr2_r), FUNC(sh4_base_device::pciwcr2_w));
+ map(0xfe2001f0, 0xfe2001f3).rw(FUNC(sh4_base_device::pciwcr3_r), FUNC(sh4_base_device::pciwcr3_w));
+ map(0xfe2001f4, 0xfe2001f7).rw(FUNC(sh4_base_device::pcimcr_r), FUNC(sh4_base_device::pcimcr_w));
+ map(0xfe200200, 0xfe200203).rw(FUNC(sh4_base_device::pcipctr_r), FUNC(sh4_base_device::pcipctr_w));
+ map(0xfe200204, 0xfe200207).rw(FUNC(sh4_base_device::pcipdtr_r), FUNC(sh4_base_device::pcipdtr_w));
+ map(0xfe200220, 0xfe200223).rw(FUNC(sh4_base_device::pcipdr_r), FUNC(sh4_base_device::pcipdr_w));
+
+ // PCIIO
+ // 0xfe240000, 0xfe27ffff
}
void sh3_base_device::sh3_internal_map(address_map &map)
{
- map(SH3_LOWER_REGBASE, SH3_LOWER_REGEND).rw(FUNC(sh3_base_device::sh3_internal_r), FUNC(sh3_base_device::sh3_internal_w));
- map(SH3_UPPER_REGBASE, SH3_UPPER_REGEND).rw(FUNC(sh3_base_device::sh3_internal_high_r), FUNC(sh3_base_device::sh3_internal_high_w));
+ sh3_register_map(map);
+}
+
+void sh3_device::sh3_register_map(address_map& map)
+{
+ ccn_7709s_map(map);
+ ubc_7709s_map(map);
+ cpg_7709_map(map);
+ bsc_7709s_map(map);
+ rtc_map(map);
+ intc_7709_map(map);
+ dmac_7709_map(map);
+ tmu_map(map);
+ sci_7709_map(map);
+ cmt_7709_map(map);
+ ad_7709_map(map);
+ da_7709_map(map);
+ port_7709_map(map);
+ irda_7709_map(map);
+ scif_7709_map(map);
+ udi_7709s_map(map);
+}
+
+void sh7708s_device::sh3_register_map(address_map& map)
+{
+ ccn_map(map);
+ ubc_map(map);
+ cpg_map(map);
+ bsc_7708_map(map);
+ rtc_map(map);
+ intc_map(map);
+ tmu_map(map);
+ sci_7708_map(map);
+}
+
+void sh7709_device::sh3_register_map(address_map& map)
+{
+ ccn_map(map);
+ ubc_map(map);
+ cpg_7709_map(map);
+ bsc_7709_map(map);
+ rtc_map(map);
+ intc_7709_map(map);
+ dmac_7709_map(map);
+ tmu_map(map);
+ sci_7709_map(map);
+ cmt_7709_map(map);
+ ad_7709_map(map);
+ da_7709_map(map);
+ port_7709_map(map);
+ irda_7709_map(map);
+ scif_7709_map(map);
+}
+
+void sh7709s_device::sh3_register_map(address_map& map)
+{
+ ccn_7709s_map(map);
+ ubc_7709s_map(map);
+ cpg_7709_map(map);
+ bsc_7709s_map(map);
+ rtc_map(map);
+ intc_7709_map(map);
+ dmac_7709_map(map);
+ tmu_map(map);
+ sci_7709_map(map);
+ cmt_7709_map(map);
+ ad_7709_map(map);
+ da_7709_map(map);
+ port_7709_map(map);
+ irda_7709_map(map);
+ scif_7709_map(map);
+ udi_7709s_map(map);
+}
+
+void sh3_base_device::ccn_map(address_map& map)
+{
+ map(0xfffffff0, 0xfffffff3).rw(FUNC(sh3_base_device::pteh_r), FUNC(sh3_base_device::pteh_w));
+ map(0xfffffff4, 0xfffffff7).rw(FUNC(sh3_base_device::ptel_r), FUNC(sh3_base_device::ptel_w));
+ map(0xfffffff8, 0xfffffffb).rw(FUNC(sh3_base_device::ttb_r), FUNC(sh3_base_device::ttb_w));
+ map(0xfffffffc, 0xffffffff).rw(FUNC(sh3_base_device::tea_r), FUNC(sh3_base_device::tea_w));
+ map(0xffffffe0, 0xffffffe3).rw(FUNC(sh3_base_device::mmucr_r), FUNC(sh3_base_device::mmucr_w));
+ map(0xffffffe4, 0xffffffe4).rw(FUNC(sh3_base_device::basra_r), FUNC(sh3_base_device::basra_w));
+ map(0xffffffe8, 0xffffffe8).rw(FUNC(sh3_base_device::basrb_r), FUNC(sh3_base_device::basrb_w));
+ map(0xffffffec, 0xffffffef).rw(FUNC(sh3_base_device::ccr_r), FUNC(sh3_base_device::ccr_w));
+ map(0xffffffd0, 0xffffffd3).rw(FUNC(sh3_base_device::tra_r), FUNC(sh3_base_device::tra_w));
+ map(0xffffffd4, 0xffffffd7).rw(FUNC(sh3_base_device::expevt_r), FUNC(sh3_base_device::expevt_w));
+ map(0xffffffd8, 0xffffffdb).rw(FUNC(sh3_base_device::intevt_r), FUNC(sh3_base_device::intevt_w));
+}
+
+void sh3_base_device::ccn_7709s_map(address_map& map)
+{
+ ccn_map(map);
+
+ map(0x400000b0, 0x400000b3).rw(FUNC(sh3_base_device::ccr2_r), FUNC(sh3_base_device::ccr2_w));
+}
+
+void sh3_base_device::ubc_map(address_map& map)
+{
+ map(0xffffffb0, 0xffffffb3).rw(FUNC(sh3_base_device::bara_r), FUNC(sh3_base_device::bara_w));
+ map(0xffffffb4, 0xffffffb4).rw(FUNC(sh3_base_device::bamra_r), FUNC(sh3_base_device::bamra_w));
+ map(0xffffffb8, 0xffffffb9).rw(FUNC(sh3_base_device::bbra_r), FUNC(sh3_base_device::bbra_w));
+ map(0xffffffa0, 0xffffffa3).rw(FUNC(sh3_base_device::barb_r), FUNC(sh3_base_device::barb_w));
+ map(0xffffffa4, 0xffffffa4).rw(FUNC(sh3_base_device::bamrb_r), FUNC(sh3_base_device::bamrb_w));
+ map(0xffffffa8, 0xffffffa9).rw(FUNC(sh3_base_device::bbrb_r), FUNC(sh3_base_device::bbrb_w));
+ map(0xffffff90, 0xffffff93).rw(FUNC(sh3_base_device::bdrb_r), FUNC(sh3_base_device::bdrb_w));
+ map(0xffffff94, 0xffffff97).rw(FUNC(sh3_base_device::bdmrb_r), FUNC(sh3_base_device::bdmrb_w));
+ map(0xffffff98, 0xffffff99).rw(FUNC(sh3_base_device::brcr_r), FUNC(sh3_base_device::brcr_w));
+}
+
+void sh3_base_device::ubc_7709s_map(address_map& map)
+{
+ ubc_map(map);
+
+ map(0xffffff9c, 0xffffff9d).rw(FUNC(sh3_base_device::betr_r), FUNC(sh3_base_device::betr_w));
+ map(0xffffffac, 0xffffffaf).rw(FUNC(sh3_base_device::brsr_r), FUNC(sh3_base_device::brsr_w));
+ map(0xffffffbc, 0xffffffbf).rw(FUNC(sh3_base_device::brdr_r), FUNC(sh3_base_device::brdr_w));
+}
+
+void sh3_base_device::cpg_map(address_map& map)
+{
+ map(0xffffff80, 0xffffff81).rw(FUNC(sh3_base_device::frqcr_r), FUNC(sh3_base_device::frqcr_w));
+ map(0xffffff82, 0xffffff83).rw(FUNC(sh3_base_device::stbcr_r), FUNC(sh3_base_device::stbcr_w));
+ map(0xffffff84, 0xffffff84).r(FUNC(sh3_base_device::wtcnt_r));
+ map(0xffffff84, 0xffffff85).w(FUNC(sh3_base_device::wtcnt_w));
+ map(0xffffff86, 0xffffff86).r(FUNC(sh3_base_device::wtcsr_r));
+ map(0xffffff86, 0xffffff87).w(FUNC(sh3_base_device::wtcsr_w));
+}
+
+void sh3_base_device::cpg_7709_map(address_map& map)
+{
+ cpg_map(map);
+
+ map(0xffffff88, 0xffffff88).rw(FUNC(sh3_base_device::stbcr2_r), FUNC(sh3_base_device::stbcr2_w));
+}
+
+void sh3_base_device::bsc_map(address_map& map)
+{
+ map(0xffffff60, 0xffffff61).rw(FUNC(sh3_base_device::bcr1_r), FUNC(sh3_base_device::bcr1_w));
+ map(0xffffff62, 0xffffff63).rw(FUNC(sh3_base_device::bcr2_r), FUNC(sh3_base_device::bcr2_w));
+ map(0xffffff64, 0xffffff65).rw(FUNC(sh3_base_device::wcr1_r), FUNC(sh3_base_device::wcr1_w));
+ map(0xffffff66, 0xffffff67).rw(FUNC(sh3_base_device::wcr2_r), FUNC(sh3_base_device::wcr2_w));
+ map(0xffffff68, 0xffffff69).rw(FUNC(sh3_base_device::mcr_r), FUNC(sh3_base_device::mcr_w));
+ map(0xffffff6c, 0xffffff6d).rw(FUNC(sh3_base_device::pcr_r), FUNC(sh3_base_device::pcr_w));
+ map(0xffffff6e, 0xffffff6f).rw(FUNC(sh3_base_device::rtcsr_r), FUNC(sh3_base_device::rtcsr_w));
+ map(0xffffff70, 0xffffff71).rw(FUNC(sh3_base_device::rtcnt_r), FUNC(sh3_base_device::rtcnt_w));
+ map(0xffffff72, 0xffffff73).rw(FUNC(sh3_base_device::rtcor_r), FUNC(sh3_base_device::rtcor_w));
+ map(0xffffff74, 0xffffff75).rw(FUNC(sh3_base_device::rfcr_r), FUNC(sh3_base_device::rfcr_w));
+ map(0xfffd0000, 0xffffeffe).rw(FUNC(sh3_base_device::sdmr_r), FUNC(sh3_base_device::sdmr_w));
+}
+
+void sh3_base_device::bsc_7708_map(address_map& map)
+{
+ bsc_map(map);
+
+ map(0xffffff6a, 0xffffff6b).rw(FUNC(sh3_base_device::dcr_r), FUNC(sh3_base_device::dcr_w));
+ map(0xffffff76, 0xffffff77).rw(FUNC(sh3_base_device::pctr_r), FUNC(sh3_base_device::pctr_w));
+ map(0xffffff78, 0xffffff79).rw(FUNC(sh3_base_device::pdtr_r), FUNC(sh3_base_device::pdtr_w));
+}
+
+void sh3_base_device::bsc_7709_map(address_map& map)
+{
+ bsc_map(map);
+
+ map(0xffffff6a, 0xffffff6b).rw(FUNC(sh3_base_device::dcr_r), FUNC(sh3_base_device::dcr_w));
+ map(0xffffff7e, 0xffffff7f).rw(FUNC(sh3_base_device::bcr3_r), FUNC(sh3_base_device::bcr3_w));
+}
+
+void sh3_base_device::bsc_7709s_map(address_map& map)
+{
+ bsc_map(map);
+
+ map(0xffffff50, 0xffffff51).rw(FUNC(sh3_base_device::mcscr0_r), FUNC(sh3_base_device::mcscr0_w));
+ map(0xffffff52, 0xffffff53).rw(FUNC(sh3_base_device::mcscr1_r), FUNC(sh3_base_device::mcscr1_w));
+ map(0xffffff54, 0xffffff55).rw(FUNC(sh3_base_device::mcscr2_r), FUNC(sh3_base_device::mcscr2_w));
+ map(0xffffff56, 0xffffff57).rw(FUNC(sh3_base_device::mcscr3_r), FUNC(sh3_base_device::mcscr3_w));
+ map(0xffffff58, 0xffffff59).rw(FUNC(sh3_base_device::mcscr4_r), FUNC(sh3_base_device::mcscr4_w));
+ map(0xffffff5a, 0xffffff5b).rw(FUNC(sh3_base_device::mcscr5_r), FUNC(sh3_base_device::mcscr5_w));
+ map(0xffffff5c, 0xffffff5d).rw(FUNC(sh3_base_device::mcscr6_r), FUNC(sh3_base_device::mcscr6_w));
+ map(0xffffff5e, 0xffffff5f).rw(FUNC(sh3_base_device::mcscr7_r), FUNC(sh3_base_device::mcscr7_w));
+}
+
+void sh3_base_device::rtc_map(address_map& map)
+{
+ map(0xfffffec0, 0xfffffec0).r(FUNC(sh3_base_device::r64cnt_r));
+ map(0xfffffec2, 0xfffffec2).rw(FUNC(sh3_base_device::rseccnt_r), FUNC(sh3_base_device::rseccnt_w));
+ map(0xfffffec4, 0xfffffec4).rw(FUNC(sh3_base_device::rmincnt_r), FUNC(sh3_base_device::rmincnt_w));
+ map(0xfffffec6, 0xfffffec6).rw(FUNC(sh3_base_device::rhrcnt_r), FUNC(sh3_base_device::rhrcnt_w));
+ map(0xfffffec8, 0xfffffec8).rw(FUNC(sh3_base_device::rwkcnt_r), FUNC(sh3_base_device::rwkcnt_w));
+ map(0xfffffeca, 0xfffffeca).rw(FUNC(sh3_base_device::rdaycnt_r), FUNC(sh3_base_device::rdaycnt_w));
+ map(0xfffffecc, 0xfffffecc).rw(FUNC(sh3_base_device::rmoncnt_r), FUNC(sh3_base_device::rmoncnt_w));
+ map(0xfffffece, 0xfffffece).rw(FUNC(sh3_base_device::ryrcnt_r), FUNC(sh3_base_device::ryrcnt_w));
+ map(0xfffffec0, 0xfffffec0).rw(FUNC(sh3_base_device::rsecar_r), FUNC(sh3_base_device::rsecar_w));
+ map(0xfffffed2, 0xfffffed2).rw(FUNC(sh3_base_device::rminar_r), FUNC(sh3_base_device::rminar_w));
+ map(0xfffffed4, 0xfffffed4).rw(FUNC(sh3_base_device::rhrar_r), FUNC(sh3_base_device::rhrar_w));
+ map(0xfffffed6, 0xfffffed6).rw(FUNC(sh3_base_device::rwkar_r), FUNC(sh3_base_device::rwkar_w));
+ map(0xfffffed8, 0xfffffed8).rw(FUNC(sh3_base_device::rdayar_r), FUNC(sh3_base_device::rdayar_w));
+ map(0xfffffeda, 0xfffffeda).rw(FUNC(sh3_base_device::rmonar_r), FUNC(sh3_base_device::rmonar_w));
+ map(0xfffffedc, 0xfffffedc).rw(FUNC(sh3_base_device::rcr1_r), FUNC(sh3_base_device::rcr1_w));
+ map(0xfffffede, 0xfffffede).rw(FUNC(sh3_base_device::rcr2_r), FUNC(sh3_base_device::rcr2_w));
+}
+
+void sh3_base_device::intc_map(address_map& map)
+{
+ map(0xfffffee0, 0xfffffee1).rw(FUNC(sh3_base_device::icr0_r), FUNC(sh3_base_device::icr0_w));
+ map(0xfffffee2, 0xfffffee3).rw(FUNC(sh3_base_device::ipra_r), FUNC(sh3_base_device::ipra_w));
+ map(0xfffffee4, 0xfffffee5).rw(FUNC(sh3_base_device::iprb_r), FUNC(sh3_base_device::iprb_w));
+}
+
+void sh3_base_device::intc_7709_map(address_map& map)
+{
+ intc_map(map);
+
+ map(0x04000000, 0x04000003).rw(FUNC(sh3_base_device::intevt2_r), FUNC(sh3_base_device::intevt2_w));
+ map(0x04000004, 0x04000004).rw(FUNC(sh3_base_device::irr0_r), FUNC(sh3_base_device::irr0_w));
+ map(0x04000006, 0x04000006).rw(FUNC(sh3_base_device::irr1_r), FUNC(sh3_base_device::irr1_w));
+ map(0x04000008, 0x04000008).rw(FUNC(sh3_base_device::irr2_r), FUNC(sh3_base_device::irr2_w));
+ map(0x04000010, 0x04000011).rw(FUNC(sh3_base_device::icr1_r), FUNC(sh3_base_device::icr1_w));
+ map(0x04000012, 0x04000013).rw(FUNC(sh3_base_device::icr2_r), FUNC(sh3_base_device::icr2_w));
+ map(0x04000014, 0x04000015).rw(FUNC(sh3_base_device::pinter_r), FUNC(sh3_base_device::pinter_w));
+ map(0x04000016, 0x04000017).rw(FUNC(sh3_base_device::iprc_r), FUNC(sh3_base_device::iprc_w));
+ map(0x04000018, 0x04000019).rw(FUNC(sh3_base_device::iprd_r), FUNC(sh3_base_device::iprd_w));
+ map(0x0400001a, 0x0400001b).rw(FUNC(sh3_base_device::ipre_r), FUNC(sh3_base_device::ipre_w));
+}
+
+void sh3_base_device::dmac_7709_map(address_map& map)
+{
+ map(0x04000020, 0x04000023).rw(FUNC(sh3_base_device::sar0_r), FUNC(sh3_base_device::sar0_w));
+ map(0x04000024, 0x04000027).rw(FUNC(sh3_base_device::dar0_r), FUNC(sh3_base_device::dar0_w));
+ map(0x04000028, 0x0400002b).rw(FUNC(sh3_base_device::dmatcr0_r), FUNC(sh3_base_device::dmatcr0_w));
+ map(0x0400002c, 0x0400002f).rw(FUNC(sh3_base_device::chcr0_r), FUNC(sh3_base_device::chcr0_w));
+ map(0x04000030, 0x04000033).rw(FUNC(sh3_base_device::sar1_r), FUNC(sh3_base_device::sar1_w));
+ map(0x04000034, 0x04000037).rw(FUNC(sh3_base_device::dar1_r), FUNC(sh3_base_device::dar1_w));
+ map(0x04000038, 0x0400003b).rw(FUNC(sh3_base_device::dmatcr1_r), FUNC(sh3_base_device::dmatcr1_w));
+ map(0x0400003c, 0x0400003f).rw(FUNC(sh3_base_device::chcr1_r), FUNC(sh3_base_device::chcr1_w));
+ map(0x04000040, 0x04000043).rw(FUNC(sh3_base_device::sar2_r), FUNC(sh3_base_device::sar2_w));
+ map(0x04000044, 0x04000047).rw(FUNC(sh3_base_device::dar2_r), FUNC(sh3_base_device::dar2_w));
+ map(0x04000048, 0x0400004b).rw(FUNC(sh3_base_device::dmatcr2_r), FUNC(sh3_base_device::dmatcr2_w));
+ map(0x0400004c, 0x0400004f).rw(FUNC(sh3_base_device::chcr2_r), FUNC(sh3_base_device::chcr2_w));
+ map(0x04000050, 0x04000053).rw(FUNC(sh3_base_device::sar3_r), FUNC(sh3_base_device::sar3_w));
+ map(0x04000054, 0x04000057).rw(FUNC(sh3_base_device::dar3_r), FUNC(sh3_base_device::dar3_w));
+ map(0x04000058, 0x0400005b).rw(FUNC(sh3_base_device::dmatcr3_r), FUNC(sh3_base_device::dmatcr3_w));
+ map(0x0400005c, 0x0400005f).rw(FUNC(sh3_base_device::chcr3_r), FUNC(sh3_base_device::chcr3_w));
+ map(0x04000060, 0x04000061).lrw16(
+ [this](offs_t offset, uint16_t mem_mask) { return dmaor_r(offset, mem_mask); }, "sh3_base_device::dmaor_r",
+ [this](offs_t offset, uint16_t data, uint16_t mem_mask) { dmaor_w(offset, data, mem_mask); }, "sh3_base_device::dmaor_w");
+}
+
+void sh3_base_device::tmu_map(address_map& map)
+{
+ map(0xfffffe90, 0xfffffe90).rw(FUNC(sh3_base_device::tocr_r), FUNC(sh3_base_device::tocr_w));
+ map(0xfffffe92, 0xfffffe92).rw(FUNC(sh3_base_device::tstr_r), FUNC(sh3_base_device::tstr_w));
+ map(0xfffffe94, 0xfffffe97).rw(FUNC(sh3_base_device::tcor0_r), FUNC(sh3_base_device::tcor0_w));
+ map(0xfffffe98, 0xfffffe9b).rw(FUNC(sh3_base_device::tcnt0_r), FUNC(sh3_base_device::tcnt0_w));
+ map(0xfffffe9c, 0xfffffe9d).rw(FUNC(sh3_base_device::tcr0_r), FUNC(sh3_base_device::tcr0_w));
+ map(0xfffffea0, 0xfffffea3).rw(FUNC(sh3_base_device::tcor1_r), FUNC(sh3_base_device::tcor1_w));
+ map(0xfffffea4, 0xfffffea7).rw(FUNC(sh3_base_device::tcnt1_r), FUNC(sh3_base_device::tcnt1_w));
+ map(0xfffffea8, 0xfffffea9).rw(FUNC(sh3_base_device::tcr1_r), FUNC(sh3_base_device::tcr1_w));
+ map(0xfffffeac, 0xfffffeaf).rw(FUNC(sh3_base_device::tcor2_r), FUNC(sh3_base_device::tcor2_w));
+ map(0xfffffeb0, 0xfffffeb3).rw(FUNC(sh3_base_device::tcnt2_r), FUNC(sh3_base_device::tcnt2_w));
+ map(0xfffffeb4, 0xfffffeb5).rw(FUNC(sh3_base_device::tcr2_r), FUNC(sh3_base_device::tcr2_w));
+ map(0xfffffeb8, 0xfffffebb).rw(FUNC(sh3_base_device::tcpr2_r), FUNC(sh3_base_device::tcpr2_w));
+}
+
+void sh3_base_device::sci_7708_map(address_map& map)
+{
+ sci_7709_map(map);
+
+ map(0xffffff7c, 0xffffff7c).rw(FUNC(sh3_base_device::scsptr_r), FUNC(sh3_base_device::scsptr_w));
+}
+
+void sh3_base_device::sci_7709_map(address_map& map)
+{
+ map(0xfffffe80, 0xfffffe80).rw(FUNC(sh3_base_device::scsmr_r), FUNC(sh3_base_device::scsmr_w));
+ map(0xfffffe82, 0xfffffe82).rw(FUNC(sh3_base_device::scbrr_r), FUNC(sh3_base_device::scbrr_w));
+ map(0xfffffe84, 0xfffffe84).rw(FUNC(sh3_base_device::scscr_r), FUNC(sh3_base_device::scscr_w));
+ map(0xfffffe86, 0xfffffe86).rw(FUNC(sh3_base_device::sctdr_r), FUNC(sh3_base_device::sctdr_w));
+ map(0xfffffe88, 0xfffffe88).rw(FUNC(sh3_base_device::scssr_r), FUNC(sh3_base_device::scssr_w));
+ map(0xfffffe8a, 0xfffffe8a).r(FUNC(sh3_base_device::scrdr_r));
+ map(0xfffffe8c, 0xfffffe8c).rw(FUNC(sh3_base_device::scscmr_r), FUNC(sh3_base_device::scscmr_w));
+}
+
+void sh3_base_device::cmt_7709_map(address_map& map)
+{
+ map(0x04000070, 0x04000071).rw(FUNC(sh3_base_device::cmstr_r), FUNC(sh3_base_device::cmstr_w));
+ map(0x04000072, 0x04000073).rw(FUNC(sh3_base_device::cmscr_r), FUNC(sh3_base_device::cmscr_w));
+ map(0x04000074, 0x04000075).rw(FUNC(sh3_base_device::cmcnt_r), FUNC(sh3_base_device::cmcnt_w));
+ map(0x04000076, 0x04000077).rw(FUNC(sh3_base_device::cmcor_r), FUNC(sh3_base_device::cmcor_w));
+}
+
+void sh3_base_device::ad_7709_map(address_map& map)
+{
+ map(0x04000080, 0x04000080).rw(FUNC(sh3_base_device::addrah_r), FUNC(sh3_base_device::addrah_w));
+ map(0x04000082, 0x04000082).rw(FUNC(sh3_base_device::addral_r), FUNC(sh3_base_device::addral_w));
+ map(0x04000084, 0x04000084).rw(FUNC(sh3_base_device::addrbh_r), FUNC(sh3_base_device::addrbh_w));
+ map(0x04000086, 0x04000086).rw(FUNC(sh3_base_device::addrbl_r), FUNC(sh3_base_device::addrbl_w));
+ map(0x04000088, 0x04000088).rw(FUNC(sh3_base_device::addrch_r), FUNC(sh3_base_device::addrch_w));
+ map(0x0400008a, 0x0400008a).rw(FUNC(sh3_base_device::addrcl_r), FUNC(sh3_base_device::addrcl_w));
+ map(0x0400008c, 0x0400008c).rw(FUNC(sh3_base_device::addrdh_r), FUNC(sh3_base_device::addrdh_w));
+ map(0x0400008e, 0x0400008e).rw(FUNC(sh3_base_device::addrdl_r), FUNC(sh3_base_device::addrdl_w));
+ map(0x04000090, 0x04000090).rw(FUNC(sh3_base_device::adcsr_r), FUNC(sh3_base_device::adcsr_w));
+ map(0x04000092, 0x04000092).rw(FUNC(sh3_base_device::adcr_r), FUNC(sh3_base_device::adcr_w));
}
+void sh3_base_device::da_7709_map(address_map& map)
+{
+ map(0x040000a0, 0x040000a0).rw(FUNC(sh3_base_device::dadr0_r), FUNC(sh3_base_device::dadr0_w));
+ map(0x040000a2, 0x040000a2).rw(FUNC(sh3_base_device::dadr1_r), FUNC(sh3_base_device::dadr1_w));
+ map(0x040000a4, 0x040000a4).rw(FUNC(sh3_base_device::dadcr_r), FUNC(sh3_base_device::dadcr_w));
+}
+
+void sh3_base_device::port_7709_map(address_map& map)
+{
+ map(0x04000100, 0x04000101).rw(FUNC(sh3_base_device::pacr_r), FUNC(sh3_base_device::pacr_w));
+ map(0x04000102, 0x04000103).rw(FUNC(sh3_base_device::pbcr_r), FUNC(sh3_base_device::pbcr_w));
+ map(0x04000104, 0x04000105).rw(FUNC(sh3_base_device::pccr_r), FUNC(sh3_base_device::pccr_w));
+ map(0x04000106, 0x04000107).rw(FUNC(sh3_base_device::pdcr_r), FUNC(sh3_base_device::pdcr_w));
+ map(0x04000108, 0x04000109).rw(FUNC(sh3_base_device::pecr_r), FUNC(sh3_base_device::pecr_w));
+ map(0x0400010a, 0x0400010b).rw(FUNC(sh3_base_device::pfcr_r), FUNC(sh3_base_device::pfcr_w));
+ map(0x0400010c, 0x0400010d).rw(FUNC(sh3_base_device::pgcr_r), FUNC(sh3_base_device::pgcr_w));
+ map(0x0400010e, 0x0400010f).rw(FUNC(sh3_base_device::phcr_r), FUNC(sh3_base_device::phcr_w));
+ map(0x04000110, 0x04000111).rw(FUNC(sh3_base_device::pjcr_r), FUNC(sh3_base_device::pjcr_w));
+ map(0x04000112, 0x04000113).rw(FUNC(sh3_base_device::pkcr_r), FUNC(sh3_base_device::pkcr_w));
+ map(0x04000114, 0x04000115).rw(FUNC(sh3_base_device::plcr_r), FUNC(sh3_base_device::plcr_w));
+ map(0x04000116, 0x04000117).rw(FUNC(sh3_base_device::scpcr_r), FUNC(sh3_base_device::scpcr_w));
+ map(0x04000120, 0x04000120).rw(FUNC(sh3_base_device::padr_r), FUNC(sh3_base_device::padr_w));
+ map(0x04000122, 0x04000122).rw(FUNC(sh3_base_device::pbdr_r), FUNC(sh3_base_device::pbdr_w));
+ map(0x04000124, 0x04000124).rw(FUNC(sh3_base_device::pcdr_r), FUNC(sh3_base_device::pcdr_w));
+ map(0x04000126, 0x04000126).rw(FUNC(sh3_base_device::pddr_r), FUNC(sh3_base_device::pddr_w));
+ map(0x04000128, 0x04000128).rw(FUNC(sh3_base_device::pedr_r), FUNC(sh3_base_device::pedr_w));
+ map(0x0400012a, 0x0400012a).rw(FUNC(sh3_base_device::pfdr_r), FUNC(sh3_base_device::pfdr_w));
+ map(0x0400012c, 0x0400012c).rw(FUNC(sh3_base_device::pgdr_r), FUNC(sh3_base_device::pgdr_w));
+ map(0x0400012e, 0x0400012e).rw(FUNC(sh3_base_device::phdr_r), FUNC(sh3_base_device::phdr_w));
+ map(0x04000130, 0x04000130).rw(FUNC(sh3_base_device::pjdr_r), FUNC(sh3_base_device::pjdr_w));
+ map(0x04000132, 0x04000132).rw(FUNC(sh3_base_device::pkdr_r), FUNC(sh3_base_device::pkdr_w));
+ map(0x04000134, 0x04000134).rw(FUNC(sh3_base_device::pldr_r), FUNC(sh3_base_device::pldr_w));
+ map(0x04000136, 0x04000136).rw(FUNC(sh3_base_device::scpdr_r), FUNC(sh3_base_device::scpdr_w));
+}
+
+void sh3_base_device::irda_7709_map(address_map& map)
+{
+ map(0x04000140, 0x04000140).rw(FUNC(sh3_base_device::scsmr1_r), FUNC(sh3_base_device::scsmr1_w));
+ map(0x04000142, 0x04000142).rw(FUNC(sh3_base_device::scbrr1_r), FUNC(sh3_base_device::scbrr1_w));
+ map(0x04000144, 0x04000144).rw(FUNC(sh3_base_device::scscr1_r), FUNC(sh3_base_device::scscr1_w));
+ map(0x04000146, 0x04000146).rw(FUNC(sh3_base_device::scftdr1_r), FUNC(sh3_base_device::scftdr1_w));
+ map(0x04000148, 0x04000149).rw(FUNC(sh3_base_device::scssr1_r), FUNC(sh3_base_device::scssr1_w));
+ map(0x0400014a, 0x0400014a).rw(FUNC(sh3_base_device::scfrdr1_r), FUNC(sh3_base_device::scfrdr1_w));
+ map(0x0400014c, 0x0400014c).rw(FUNC(sh3_base_device::scfcr1_r), FUNC(sh3_base_device::scfcr1_w));
+ map(0x0400014e, 0x0400014f).rw(FUNC(sh3_base_device::scfdr1_r), FUNC(sh3_base_device::scfdr1_w));
+}
+
+void sh3_base_device::scif_7709_map(address_map& map)
+{
+ map(0x04000150, 0x04000150).rw(FUNC(sh3_base_device::scsmr2_r), FUNC(sh3_base_device::scsmr2_w));
+ map(0x04000152, 0x04000152).rw(FUNC(sh3_base_device::scbrr2_r), FUNC(sh3_base_device::scbrr2_w));
+ map(0x04000154, 0x04000154).rw(FUNC(sh3_base_device::scscr2_r), FUNC(sh3_base_device::scscr2_w));
+ map(0x04000156, 0x04000156).rw(FUNC(sh3_base_device::scftdr2_r), FUNC(sh3_base_device::scftdr2_w));
+ map(0x04000158, 0x04000159).rw(FUNC(sh3_base_device::scssr2_r), FUNC(sh3_base_device::scssr2_w));
+ map(0x0400015a, 0x0400015a).rw(FUNC(sh3_base_device::scfrdr2_r), FUNC(sh3_base_device::scfrdr2_w));
+ map(0x0400015c, 0x0400015c).rw(FUNC(sh3_base_device::scfcr2_r), FUNC(sh3_base_device::scfcr2_w));
+ map(0x0400015e, 0x0400015f).rw(FUNC(sh3_base_device::scfdr2_r), FUNC(sh3_base_device::scfdr2_w));
+}
+
+void sh3_base_device::udi_7709s_map(address_map& map)
+{
+ map(0x4000200, 0x4000201).rw(FUNC(sh3_base_device::sdir_r), FUNC(sh3_base_device::sdir_w));
+}
sh34_base_device::sh34_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal)
: sh_common_execution(mconfig, type, tag, owner, clock, endianness, internal)
@@ -90,6 +903,32 @@ device_memory_interface::space_config_vector sh34_base_device::memory_space_conf
};
}
+bool sh34_base_device::memory_translate(int spacenum, int intention, offs_t& address, address_space*& target_space)
+{
+ target_space = &space(spacenum);
+
+ if (address >= 0xe0000000)
+ return true;
+
+ if (address >= 0x80000000) // P1/P2/P3 region
+ {
+ address &= SH34_AM;
+ return true;
+ }
+ else // P0 region
+ {
+ if (!m_sh4_mmu_enabled)
+ {
+ address &= SH34_AM;
+ return true;
+ }
+ else
+ {
+ address = get_remap(address & SH34_AM);
+ return true;
+ }
+ }
+}
sh3_base_device::sh3_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness)
: sh34_base_device(mconfig, type, tag, owner, clock, endianness, address_map_constructor(FUNC(sh3_base_device::sh3_internal_map), this))
@@ -107,29 +946,63 @@ sh4_base_device::sh4_base_device(const machine_config &mconfig, device_type type
}
-sh3_device::sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : sh3_base_device(mconfig, SH3LE, tag, owner, clock, ENDIANNESS_LITTLE)
+sh3_device::sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness)
+ : sh3_base_device(mconfig, SH3, tag, owner, clock, endianness)
+{
+}
+
+sh7708s_device::sh7708s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh3_base_device(mconfig, SH7708S, tag, owner, clock, endianness)
+{
+}
+
+sh7709_device::sh7709_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness)
+ : sh3_base_device(mconfig, SH7709, tag, owner, clock, endianness)
+{
+}
+
+sh7709s_device::sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh3_base_device(mconfig, SH7709S, tag, owner, clock, endianness)
{
}
-sh3be_device::sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : sh3_base_device(mconfig, SH3BE, tag, owner, clock, ENDIANNESS_BIG)
+sh4_device::sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH4, tag, owner, clock, endianness)
{
}
+sh7091_device::sh7091_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7091, tag, owner, clock, endianness)
+{
+}
-sh4_device::sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : sh4_base_device(mconfig, SH4LE, tag, owner, clock, ENDIANNESS_LITTLE)
+sh7750_device::sh7750_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7750, tag, owner, clock, endianness)
{
}
+sh7750s_device::sh7750s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7750S, tag, owner, clock, endianness)
+{
+}
-sh4be_device::sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : sh4_base_device(mconfig, SH4BE, tag, owner, clock, ENDIANNESS_BIG)
+sh7750r_device::sh7750r_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7750R, tag, owner, clock, endianness)
{
}
+sh7751_device::sh7751_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7751, tag, owner, clock, endianness)
+{
+ m_pciconf0 = 0x35051054;
+}
+
+sh7751r_device::sh7751r_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness)
+ : sh4_base_device(mconfig, SH7751R, tag, owner, clock, endianness)
+{
+ m_pciconf0 = 0x350e1054;
+}
std::unique_ptr<util::disasm_interface> sh34_base_device::create_disassembler()
{
@@ -149,28 +1022,28 @@ void sh34_base_device::LDTLB(const uint16_t opcode)
void sh4_base_device::LDTLB(const uint16_t opcode)
{
- int replace = (m_m[MMUCR] & 0x0000fc00) >> 10;
+ int replace = (m_mmucr & 0x0000fc00) >> 10;
logerror("using LDTLB to replace UTLB entry %02x\n", replace);
// these come from PTEH
- m_utlb[replace].VPN = (m_m[PTEH] & 0xfffffc00) >> 10;
- // m_utlb[replace].D = (m_m[PTEH] & 0x00000200) >> 9; // from PTEL
- // m_utlb[replace].V = (m_m[PTEH] & 0x00000100) >> 8; // from PTEL
- m_utlb[replace].ASID = (m_m[PTEH] & 0x000000ff) >> 0;
+ m_utlb[replace].VPN = (m_pteh & 0xfffffc00) >> 10;
+ // m_utlb[replace].D = (m_pteh & 0x00000200) >> 9; // from PTEL
+ // m_utlb[replace].V = (m_pteh & 0x00000100) >> 8; // from PTEL
+ m_utlb[replace].ASID = (m_pteh & 0x000000ff) >> 0;
// these come from PTEL
- m_utlb[replace].PPN = (m_m[PTEL] & 0x1ffffc00) >> 10;
- m_utlb[replace].V = (m_m[PTEL] & 0x00000100) >> 8;
- m_utlb[replace].PSZ = (m_m[PTEL] & 0x00000080) >> 6;
- m_utlb[replace].PSZ |= (m_m[PTEL] & 0x00000010) >> 4;
- m_utlb[replace].PPR = (m_m[PTEL] & 0x00000060) >> 5;
- m_utlb[replace].C = (m_m[PTEL] & 0x00000008) >> 3;
- m_utlb[replace].D = (m_m[PTEL] & 0x00000004) >> 2;
- m_utlb[replace].SH = (m_m[PTEL] & 0x00000002) >> 1;
- m_utlb[replace].WT = (m_m[PTEL] & 0x00000001) >> 0;
+ m_utlb[replace].PPN = (m_ptel & 0x1ffffc00) >> 10;
+ m_utlb[replace].V = (m_ptel & 0x00000100) >> 8;
+ m_utlb[replace].PSZ = (m_ptel & 0x00000080) >> 6;
+ m_utlb[replace].PSZ |= (m_ptel & 0x00000010) >> 4;
+ m_utlb[replace].PPR = (m_ptel & 0x00000060) >> 5;
+ m_utlb[replace].C = (m_ptel & 0x00000008) >> 3;
+ m_utlb[replace].D = (m_ptel & 0x00000004) >> 2;
+ m_utlb[replace].SH = (m_ptel & 0x00000002) >> 1;
+ m_utlb[replace].WT = (m_ptel & 0x00000001) >> 0;
// these come from PTEA
- m_utlb[replace].TC = (m_m[PTEA] & 0x00000008) >> 3;
- m_utlb[replace].SA = (m_m[PTEA] & 0x00000007) >> 0;
+ m_utlb[replace].TC = (m_ptea & 0x00000008) >> 3;
+ m_utlb[replace].SA = (m_ptea & 0x00000007) >> 0;
}
#if 0
@@ -452,7 +1325,7 @@ inline void sh34_base_device::LDCSR(const uint16_t opcode)
// important to store the value now so that it doesn't get affected by the bank change
uint32_t reg = m_sh2_state->r[REG_N];
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29);
if ((m_sh2_state->r[REG_N] & sRB) != (m_sh2_state->sr & sRB))
@@ -468,7 +1341,7 @@ inline void sh34_base_device::LDCMSR(const uint16_t opcode)
uint32_t old = m_sh2_state->sr;
m_sh2_state->ea = m_sh2_state->r[REG_N];
m_sh2_state->sr = read_long(m_sh2_state->ea) & SH34_FLAGS;
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
sh4_syncronize_register_bank((old & sRB) >> 29);
if ((old & sRB) != (m_sh2_state->sr & sRB))
sh4_change_register_bank(m_sh2_state->sr & sRB ? 1 : 0);
@@ -482,7 +1355,7 @@ inline void sh34_base_device::RTE()
{
m_sh2_state->m_delay = m_sh2_state->ea = m_sh2_state->m_spc;
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29);
if ((m_sh2_state->m_ssr & sRB) != (m_sh2_state->sr & sRB))
sh4_change_register_bank(m_sh2_state->m_ssr & sRB ? 1 : 0);
@@ -499,11 +1372,11 @@ inline void sh34_base_device::TRAPA(uint32_t i)
if (m_cpu_type == CPU_TYPE_SH4)
{
- m_m[TRA] = imm << 2;
+ m_tra = imm << 2;
}
else /* SH3 */
{
- m_sh3internal_upper[SH3_TRA_ADDR] = imm << 2;
+ m_tra = imm << 2;
}
m_sh2_state->m_ssr = m_sh2_state->sr;
@@ -512,7 +1385,7 @@ inline void sh34_base_device::TRAPA(uint32_t i)
m_sh2_state->m_sgr = m_sh2_state->r[15];
m_sh2_state->sr |= MD;
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29);
if (!(m_sh2_state->sr & sRB))
sh4_change_register_bank(1);
@@ -522,11 +1395,11 @@ inline void sh34_base_device::TRAPA(uint32_t i)
if (m_cpu_type == CPU_TYPE_SH4)
{
- m_m[EXPEVT] = 0x00000160;
+ m_expevt = 0x00000160;
}
else /* SH3 */
{
- m_sh3internal_upper[SH3_EXPEVT_ADDR] = 0x00000160;
+ m_expevt = 0x00000160;
}
m_sh2_state->pc = m_sh2_state->vbr + 0x00000100;
@@ -813,7 +1686,7 @@ inline void sh34_base_device::PREFM(const uint16_t opcode)
{
if (m_cpu_type == CPU_TYPE_SH4)
{
- dest |= (m_m[QACR0] & 0x1C) << 24;
+ dest |= (m_qacr0 & 0x1C) << 24;
}
else
{
@@ -824,7 +1697,7 @@ inline void sh34_base_device::PREFM(const uint16_t opcode)
{
if (m_cpu_type == CPU_TYPE_SH4)
{
- dest |= (m_m[QACR1] & 0x1C) << 24;
+ dest |= (m_qacr1 & 0x1C) << 24;
}
else
{
@@ -1614,41 +2487,67 @@ void sh34_base_device::device_reset()
m_sh2_state->m_test_irq = 0;
memset(m_exception_priority, 0, sizeof(m_exception_priority));
memset(m_exception_requesting, 0, sizeof(m_exception_requesting));
- memset(m_m, 0, sizeof(m_m));
- memset(m_sh3internal_upper, 0, sizeof(m_sh3internal_upper));
- memset(m_sh3internal_lower, 0, sizeof(m_sh3internal_lower));
memset(m_irq_line_state, 0, sizeof(m_irq_line_state));
- m_SH4_TSTR = 0;
- m_SH4_TCNT0 = 0;
- m_SH4_TCNT1 = 0;
- m_SH4_TCNT2 = 0;
- m_SH4_TCR0 = 0;
- m_SH4_TCR1 = 0;
- m_SH4_TCR2 = 0;
- m_SH4_TCOR0 = 0;
- m_SH4_TCOR1 = 0;
- m_SH4_TCOR2 = 0;
- m_SH4_TOCR = 0;
- m_SH4_TCPR2 = 0;
- m_SH4_IPRA = 0;
- m_SH4_IPRC = 0;
- m_SH4_SAR0 = 0;
- m_SH4_SAR1 = 0;
- m_SH4_SAR2 = 0;
- m_SH4_SAR3 = 0;
- m_SH4_DAR0 = 0;
- m_SH4_DAR1 = 0;
- m_SH4_DAR2 = 0;
- m_SH4_DAR3 = 0;
- m_SH4_CHCR0 = 0;
- m_SH4_CHCR1 = 0;
- m_SH4_CHCR2 = 0;
- m_SH4_CHCR3 = 0;
- m_SH4_DMATCR0 = 0;
- m_SH4_DMATCR1 = 0;
- m_SH4_DMATCR2 = 0;
- m_SH4_DMATCR3 = 0;
- m_SH4_DMAOR = 0;
+
+ // CCN
+ m_pteh = 0;
+ m_ptel = 0;
+ m_ttb = 0;
+ m_mmucr = 0;
+ m_ccr = 0;
+ m_tra = 0;
+ m_expevt = 0;
+ m_intevt = 0;
+
+ // CCN 7709S
+ m_ccr2 = 0;
+
+ // CCN 7091
+ m_ptea = 0;
+ m_qacr0 = 0;
+ m_qacr1 = 0;
+
+ // TMU
+ m_tocr = 0;
+ m_tstr = 0;
+ m_tcor0 = 0xffffffff;
+ m_tcnt0 = 0xffffffff;
+ m_tcr0 = 0;
+ m_tcor1 = 0xffffffff;
+ m_tcnt1 = 0xffffffff;
+ m_tcr1 = 0;
+ m_tcor2 = 0xffffffff;
+ m_tcnt2 = 0xffffffff;
+ m_tcr2 = 0;
+ m_tcpr2 = 0;
+
+ // INTC
+ m_icr = 0;
+ m_ipra = 0;
+ m_iprc = 0;
+
+ // INTC 7709
+ m_intevt2 = 0;
+
+ // DMAC
+ m_sar0 = 0;
+ m_sar1 = 0;
+ m_sar2 = 0;
+ m_sar3 = 0;
+ m_dar0 = 0;
+ m_dar1 = 0;
+ m_dar2 = 0;
+ m_dar3 = 0;
+ m_chcr0 = 0;
+ m_chcr1 = 0;
+ m_chcr2 = 0;
+ m_chcr3 = 0;
+ m_dmatcr0 = 0;
+ m_dmatcr1 = 0;
+ m_dmatcr2 = 0;
+ m_dmatcr3 = 0;
+ m_dmaor = 0;
+
m_nmi_line_state = 0;
m_sh2_state->m_frt_input = 0;
m_internal_irq_vector = 0;
@@ -1662,11 +2561,6 @@ void sh34_base_device::device_reset()
if (m_dma_timer[i])
m_dma_timer[i]->adjust(attotime::never, i);
}
- if (m_refresh_timer)
- m_refresh_timer->adjust(attotime::never);
- m_refresh_timer_base = 0;
- if (m_rtc_timer)
- m_rtc_timer->adjust(attotime::never);
memset(m_dma_timer_active, 0, sizeof(m_dma_timer_active));
memset(m_dma_source, 0, sizeof(m_dma_source));
memset(m_dma_destination, 0, sizeof(m_dma_destination));
@@ -1682,10 +2576,8 @@ void sh34_base_device::device_reset()
sh4_default_exception_priorities();
- m_rtc_timer->adjust(attotime::from_hz(128));
-
m_sh2_state->pc = 0xa0000000;
- m_sh2_state->m_ppc = m_sh2_state->pc & SH34_AM;
+ m_sh2_state->m_ppc = m_sh2_state->pc;
m_sh2_state->r[15] = read_long(4);
m_sh2_state->sr = 0x700000f0;
m_sh2_state->m_fpscr = 0x00040001;
@@ -1710,25 +2602,158 @@ void sh3_base_device::device_reset()
{
sh34_base_device::device_reset();
- m_SH4_TCOR0 = 0xffffffff;
- m_SH4_TCNT0 = 0xffffffff;
- m_SH4_TCOR1 = 0xffffffff;
- m_SH4_TCNT1 = 0xffffffff;
- m_SH4_TCOR2 = 0xffffffff;
- m_SH4_TCNT2 = 0xffffffff;
+ // INTC
+ m_icr0 &= 0x8000;
+ m_iprb = 0;
+
+ // INTC 7709
+ m_irr0 = 0;
+ m_irr1 = 0;
+ m_irr2 = 0;
+ m_icr1 = 0;
+ m_icr2 = 0;
+ m_pinter = 0;
+ m_iprd = 0;
+ m_ipre = 0;
+
+ // SCI
+ m_scsmr = 0;
+ m_scbrr = 0xff;
+ m_scscr = 0;
+ m_sctdr = 0xff;
+ m_scssr = 0x84;
+ m_scrdr = 0;
+ m_scscmr = 0;
+
+ // SCI 7709
+ m_scsptr = 0;
+
+ // CMT 7709
+ m_cmstr = 0;
+ m_cmscr = 0;
+ m_cmcnt = 0;
+ m_cmcor = 0xffff;
+
+ // AD 7709
+ m_addrah = 0;
+ m_addral = 0;
+ m_addrbh = 0;
+ m_addrbl = 0;
+ m_addrch = 0;
+ m_addrcl = 0;
+ m_addrdh = 0;
+ m_addrdl = 0;
+ m_adcsr = 0;
+ m_adcr = 0x07;
+
+ // DA 7709
+ m_dadr0 = 0;
+ m_dadr1 = 0;
+ m_dadcr = 0x1f;
+
+ // PORT 7709
+ m_pacr = 0;
+ m_pbcr = 0;
+ m_pccr = 0xaaaa;
+ m_pdcr = 0xaa8a;
+ m_pecr = 0xaaaa; // asemd0=0x2aa8
+ m_pfcr = 0xaaaa; // asemd0=0x00aa
+ m_pgcr = 0xaaaa; // asemd0=0xa200
+ m_phcr = 0xaaaa; // asemd0=0x8aaa
+ m_pjcr = 0;
+ m_pkcr = 0;
+ m_plcr = 0;
+ m_scpcr = 0xa888;
+ m_padr = 0;
+ m_pbdr = 0;
+ m_pcdr = 0;
+ m_pddr = 0;
+ m_pedr = 0;
+ m_pfdr = 0;
+ m_pgdr = 0;
+ m_phdr = 0;
+ m_pjdr = 0;
+ m_pkdr = 0;
+ m_pldr = 0;
+ m_scpdr = 0;
+
+ // IRDA 7709
+ m_scsmr1 = 0;
+ m_scbrr1 = 0xff;
+ m_scscr1 = 0;
+ m_scftdr1 = 0;
+ m_scssr1 = 0x60;
+ m_scfrdr1 = 0;
+ m_scfcr1 = 0;
+ m_scfdr1 = 0;
+
+ // SCIF 7709
+ m_scsmr2 = 0;
+ m_scbrr2 = 0xff;
+ m_scscr2 = 0;
+ m_scftdr2 = 0;
+ m_scssr2 = 0x60;
+ m_scfrdr2 = 0;
+ m_scfcr2 = 0;
+ m_scfdr2 = 0;
+
+ // UDI 7709S
+ m_sdir = 0xffff;
}
void sh4_base_device::device_reset()
{
sh34_base_device::device_reset();
- m_m[RCR2] = 0x09;
- m_SH4_TCOR0 = 0xffffffff;
- m_SH4_TCNT0 = 0xffffffff;
- m_SH4_TCOR1 = 0xffffffff;
- m_SH4_TCNT1 = 0xffffffff;
- m_SH4_TCOR2 = 0xffffffff;
- m_SH4_TCNT2 = 0xffffffff;
+ m_rtc_timer->adjust(attotime::from_hz(128));
+ m_refresh_timer->adjust(attotime::never);
+ m_refresh_timer_base = 0;
+
+ // DMAC 7750R
+ m_sar4 = 0;
+ m_dar4 = 0;
+ m_sar5 = 0;
+ m_dar5 = 0;
+ m_sar6 = 0;
+ m_dar6 = 0;
+ m_sar7 = 0;
+ m_dar7 = 0;
+ m_chcr4 = 0;
+ m_chcr5 = 0;
+ m_chcr6 = 0;
+ m_chcr7 = 0;
+ m_dmatcr4 = 0;
+ m_dmatcr5 = 0;
+ m_dmatcr6 = 0;
+ m_dmatcr7 = 0;
+
+ // INTC
+ m_iprb = 0;
+
+ // INTC 7750S
+ m_iprd = 0xda74;
+
+ // SCI
+ m_scsmr1 = 0;
+ m_scbrr1 = 0xff;
+ m_scscr1 = 0;
+ m_sctdr1 = 0xff;
+ m_scssr1 = 0x84;
+ m_scrdr1 = 0x00;
+ m_scscmr1 = 0x00;
+ m_scsptr1 = 0;
+
+ // SCIF
+ m_scsmr2 = 0;
+ m_scbrr2 = 0xff;
+ m_scscr2 = 0;
+ m_scftdr2 = 0;
+ m_scfsr2 = 0x60;
+ m_scfrdr2 = 0;
+ m_scfcr2 = 0;
+ m_scfdr2 = 0;
+ m_scsptr2 = 0;
+ m_sclsr2 = 0;
}
inline void sh34_base_device::execute_one_0000(const uint16_t opcode)
@@ -1960,14 +2985,15 @@ void sh34_base_device::execute_run()
if (m_sh2_state->m_cpu_off)
{
+ debugger_wait_hook();
m_sh2_state->icount = 0;
return;
}
do
{
- m_sh2_state->m_ppc = m_sh2_state->pc & SH34_AM;
- debugger_instruction_hook(m_sh2_state->pc & SH34_AM);
+ m_sh2_state->m_ppc = m_sh2_state->pc;
+ debugger_instruction_hook(m_sh2_state->pc);
uint16_t opcode;
@@ -1993,90 +3019,265 @@ void sh34_base_device::execute_run()
} while (m_sh2_state->icount > 0);
}
-void sh3be_device::execute_run()
-{
- if (m_isdrc)
- {
- execute_run_drc();
- return;
- }
-
- if (m_sh2_state->m_cpu_off)
- {
- m_sh2_state->icount = 0;
- return;
- }
-
- do
- {
- m_sh2_state->m_ppc = m_sh2_state->pc & SH34_AM;
- debugger_instruction_hook(m_sh2_state->pc & SH34_AM);
-
- const uint16_t opcode = m_pr16(m_sh2_state->pc & SH34_AM);
-
- if (m_sh2_state->m_delay)
- {
- m_sh2_state->pc = m_sh2_state->m_delay;
- m_sh2_state->m_delay = 0;
- }
- else
- m_sh2_state->pc += 2;
-
- execute_one(opcode);
-
- if (m_sh2_state->m_test_irq && !m_sh2_state->m_delay)
- {
- sh4_check_pending_irq("mame_sh4_execute");
- }
-
- m_sh2_state->icount--;
- } while (m_sh2_state->icount > 0);
-}
-
-void sh4be_device::execute_run()
+void sh3_base_device::device_start()
{
- if (m_isdrc)
- {
- execute_run_drc();
- return;
- }
-
- if (m_sh2_state->m_cpu_off)
- {
- m_sh2_state->icount = 0;
- return;
- }
-
- do
- {
- m_sh2_state->m_ppc = m_sh2_state->pc & SH34_AM;
- debugger_instruction_hook(m_sh2_state->pc & SH34_AM);
-
- const uint16_t opcode = m_pr16(m_sh2_state->pc & SH34_AM);
-
- if (m_sh2_state->m_delay)
- {
- m_sh2_state->pc = m_sh2_state->m_delay;
- m_sh2_state->m_delay = 0;
- }
- else
- m_sh2_state->pc += 2;
-
- execute_one(opcode);
-
- if (m_sh2_state->m_test_irq && !m_sh2_state->m_delay)
- {
- sh4_check_pending_irq("mame_sh4_execute");
- }
+ sh34_base_device::device_start();
- m_sh2_state->icount--;
- } while (m_sh2_state->icount > 0);
+ // UBC
+ m_bara = 0;
+ m_bamra = 0;
+ m_bbra = 0;
+ m_barb = 0;
+ m_bamrb = 0;
+ m_bbrb = 0;
+ m_bdrb = 0;
+ m_bdmrb = 0;
+ m_brcr = 0;
+
+ // UBC 7709S
+ m_betr = 0;
+ m_brsr = 0;
+ m_brdr = 0;
+
+ // CPG
+ m_frqcr = 0x0102;
+ m_wtcnt = 0;
+ m_wtcsr = 0;
+ m_stbcr = 0;
+
+ // CPG 7709
+ m_stbcr2 = 0;
+
+ // BSC
+ m_bcr1 = 0;
+ m_bcr2 = 0x3ff0;
+ m_wcr1 = 0x3ff3;
+ m_wcr2 = 0xffff;
+ m_mcr = 0;
+ m_pcr = 0;
+ m_rtcsr = 0;
+ m_rtcnt = 0;
+ m_rtcor = 0;
+ m_rfcr = 0;
+
+ // BSC 7708
+ m_dcr = 0;
+ m_pctr = 0;
+ m_pdtr = 0;
+
+ // BSC 7709
+ m_bcr3 = 0;
+
+ // BSC 7709S
+ m_mcscr0 = 0;
+ m_mcscr1 = 0;
+ m_mcscr2 = 0;
+ m_mcscr3 = 0;
+ m_mcscr4 = 0;
+ m_mcscr5 = 0;
+ m_mcscr6 = 0;
+ m_mcscr7 = 0;
+
+ // RTC
+ m_r64cnt = 0;
+ m_rseccnt = 0;
+ m_rmincnt = 0;
+ m_rhrcnt = 0;
+ m_rwkcnt = 0;
+ m_rmoncnt = 0;
+ m_rdaycnt = 0;
+ m_ryrcnt = 0;
+ m_rsecar = 0;
+ m_rminar = 0;
+ m_rhrar = 0;
+ m_rwkar = 0;
+ m_rdayar = 0;
+ m_rmonar = 0;
+ m_rcr1 = 0;
+ m_rcr2 = 0x09;
+
+ // INTC
+ m_icr0 = 0;
+
+ // UBC
+ save_item(NAME(m_bara));
+ save_item(NAME(m_bamra));
+ save_item(NAME(m_bbra));
+ save_item(NAME(m_barb));
+ save_item(NAME(m_bamrb));
+ save_item(NAME(m_bbrb));
+ save_item(NAME(m_bdrb));
+ save_item(NAME(m_bdmrb));
+ save_item(NAME(m_brcr));
+
+ // UBC 7709S
+ save_item(NAME(m_betr));
+ save_item(NAME(m_brsr));
+ save_item(NAME(m_brdr));
+
+ // CPG
+ save_item(NAME(m_frqcr));
+ save_item(NAME(m_stbcr));
+ save_item(NAME(m_wtcnt));
+ save_item(NAME(m_wtcsr));
+
+ // CPG 7709
+ save_item(NAME(m_stbcr2));
+
+ // BSC
+ save_item(NAME(m_bcr1));
+ save_item(NAME(m_bcr2));
+ save_item(NAME(m_wcr1));
+ save_item(NAME(m_wcr2));
+ save_item(NAME(m_mcr));
+ save_item(NAME(m_pcr));
+ save_item(NAME(m_rtcsr));
+ save_item(NAME(m_rtcnt));
+ save_item(NAME(m_rtcor));
+ save_item(NAME(m_rfcr));
+
+ // BSC 7708
+ save_item(NAME(m_dcr));
+ save_item(NAME(m_pctr));
+ save_item(NAME(m_pdtr));
+
+ // BSC 7709
+ save_item(NAME(m_bcr3));
+
+ // BSC 7709S
+ save_item(NAME(m_mcscr0));
+ save_item(NAME(m_mcscr1));
+ save_item(NAME(m_mcscr2));
+ save_item(NAME(m_mcscr3));
+ save_item(NAME(m_mcscr4));
+ save_item(NAME(m_mcscr5));
+ save_item(NAME(m_mcscr6));
+ save_item(NAME(m_mcscr7));
+
+ // RTC
+ save_item(NAME(m_r64cnt));
+ save_item(NAME(m_rseccnt));
+ save_item(NAME(m_rmincnt));
+ save_item(NAME(m_rhrcnt));
+ save_item(NAME(m_rwkcnt));
+ save_item(NAME(m_rmoncnt));
+ save_item(NAME(m_rdaycnt));
+ save_item(NAME(m_ryrcnt));
+ save_item(NAME(m_rsecar));
+ save_item(NAME(m_rminar));
+ save_item(NAME(m_rhrar));
+ save_item(NAME(m_rwkar));
+ save_item(NAME(m_rdayar));
+ save_item(NAME(m_rmonar));
+ save_item(NAME(m_rcr1));
+ save_item(NAME(m_rcr2));
+
+ // INTC
+ save_item(NAME(m_icr0));
+ save_item(NAME(m_iprb));
+
+ // INTC 7709
+ save_item(NAME(m_irr0));
+ save_item(NAME(m_irr1));
+ save_item(NAME(m_irr2));
+ save_item(NAME(m_icr1));
+ save_item(NAME(m_icr2));
+ save_item(NAME(m_pinter));
+ save_item(NAME(m_iprd));
+ save_item(NAME(m_ipre));
+
+ // SCI
+ save_item(NAME(m_scsmr));
+ save_item(NAME(m_scbrr));
+ save_item(NAME(m_scscr));
+ save_item(NAME(m_sctdr));
+ save_item(NAME(m_scssr));
+ save_item(NAME(m_scrdr));
+ save_item(NAME(m_scscmr));
+
+ // SCI 7709
+ save_item(NAME(m_scsptr));
+
+ // CMT 7709
+ save_item(NAME(m_cmstr));
+ save_item(NAME(m_cmscr));
+ save_item(NAME(m_cmcnt));
+ save_item(NAME(m_cmcor));
+
+ // AD 7709
+ save_item(NAME(m_addrah));
+ save_item(NAME(m_addral));
+ save_item(NAME(m_addrbh));
+ save_item(NAME(m_addrbl));
+ save_item(NAME(m_addrch));
+ save_item(NAME(m_addrcl));
+ save_item(NAME(m_addrdh));
+ save_item(NAME(m_addrdl));
+ save_item(NAME(m_adcsr));
+ save_item(NAME(m_adcr));
+
+ // DA 7709
+ save_item(NAME(m_dadr0));
+ save_item(NAME(m_dadr1));
+ save_item(NAME(m_dadcr));
+
+ // PORT 7709
+ save_item(NAME(m_pacr));
+ save_item(NAME(m_pbcr));
+ save_item(NAME(m_pccr));
+ save_item(NAME(m_pdcr));
+ save_item(NAME(m_pecr));
+ save_item(NAME(m_pfcr));
+ save_item(NAME(m_pgcr));
+ save_item(NAME(m_phcr));
+ save_item(NAME(m_pjcr));
+ save_item(NAME(m_pkcr));
+ save_item(NAME(m_plcr));
+ save_item(NAME(m_scpcr));
+ save_item(NAME(m_padr));
+ save_item(NAME(m_pbdr));
+ save_item(NAME(m_pcdr));
+ save_item(NAME(m_pddr));
+ save_item(NAME(m_pedr));
+ save_item(NAME(m_pfdr));
+ save_item(NAME(m_pgdr));
+ save_item(NAME(m_phdr));
+ save_item(NAME(m_pjdr));
+ save_item(NAME(m_pkdr));
+ save_item(NAME(m_pldr));
+ save_item(NAME(m_scpdr));
+
+ // IRDA 7709
+ save_item(NAME(m_scsmr1));
+ save_item(NAME(m_scbrr1));
+ save_item(NAME(m_scscr1));
+ save_item(NAME(m_scftdr1));
+ save_item(NAME(m_scssr1));
+ save_item(NAME(m_scfrdr1));
+ save_item(NAME(m_scfcr1));
+ save_item(NAME(m_scfdr1));
+
+ // SCIF 7709
+ save_item(NAME(m_scsmr2));
+ save_item(NAME(m_scbrr2));
+ save_item(NAME(m_scscr2));
+ save_item(NAME(m_scftdr2));
+ save_item(NAME(m_scssr2));
+ save_item(NAME(m_scfrdr2));
+ save_item(NAME(m_scfcr2));
+ save_item(NAME(m_scfdr2));
+
+ // UDI 7709S
+ save_item(NAME(m_sdir));
}
void sh4_base_device::device_start()
{
sh34_base_device::device_start();
+ m_rtc_timer = timer_alloc(FUNC(sh4_base_device::sh4_rtc_timer_callback), this);
+ m_refresh_timer = timer_alloc(FUNC(sh4_base_device::sh4_refresh_timer_callback), this);
+
int i;
for (i = 0;i < 64;i++)
{
@@ -2094,6 +3295,156 @@ void sh4_base_device::device_start()
m_utlb[i].TC = 0;
}
+ // UBC
+ m_bara = 0;
+ m_bamra = 0;
+ m_bbra = 0;
+ m_barb = 0;
+ m_bamrb = 0;
+ m_bbrb = 0;
+ m_bdrb = 0;
+ m_bdmrb = 0;
+ m_brcr = 0;
+
+ // BSC
+ m_bcr1 = 0;
+ m_bcr2 = 0;
+ m_wcr1 = 0;
+ m_wcr2 = 0;
+ m_wcr3 = 0;
+ m_mcr = 0;
+ m_pcr = 0;
+ m_rtcsr = 0;
+ m_rtcnt = 0;
+ m_rtcor = 0;
+ m_rfcr = 0;
+ m_pctra = 0;
+ m_pdtra = 0;
+ m_pctrb = 0;
+ m_pdtrb = 0;
+ m_gpioic = 0;
+
+ // BSC 7750R
+ m_bcr3 = 0;
+ m_bcr4 = 0;
+
+ // CPG
+ m_frqcr = 0;
+ m_stbcr = 0;
+ m_wtcnt = 0;
+ m_wtcsr = 0;
+ m_stbcr2 = 0;
+
+ // RTC
+ m_r64cnt = 0;
+ m_rseccnt = 0;
+ m_rmincnt = 0;
+ m_rhrcnt = 0;
+ m_rwkcnt = 0;
+ m_rmoncnt = 0;
+ m_rdaycnt = 0;
+ m_ryrcnt = 0;
+ m_rsecar = 0;
+ m_rminar = 0;
+ m_rhrar = 0;
+ m_rwkar = 0;
+ m_rdayar = 0;
+ m_rmonar = 0;
+ m_rcr1 = 0;
+ m_rcr2 = 0x09;
+
+ // RTC 7750R
+ m_rcr3 = 0;
+ m_ryrar = 0;
+
+ // INTC 7750R
+ m_intpri00 = 0;
+ m_intreq00 = 0;
+ m_intmsk00 = 0x000003ff;
+
+ // CPG 7750R
+ m_clkstp00 = 0;
+
+ // TMU 7750R
+ m_tstr2 = 0;
+ m_tcor3 = 0xffffffff;
+ m_tcnt3 = 0xffffffff;
+ m_tcr3 = 0;
+ m_tcor4 = 0xffffffff;
+ m_tcnt4 = 0xffffffff;
+ m_tcr4 = 0;
+
+ // PCI 7751
+ m_pciconf1 = 0x02900080;
+ m_pciconf2 = 0;
+ m_pciconf3 = 0;
+ m_pciconf4 = 1;
+ m_pciconf5 = 0;
+ m_pciconf6 = 0;
+ m_pciconf7 = 0;
+ m_pciconf8 = 0;
+ m_pciconf9 = 0;
+ m_pciconf10 = 0;
+ m_pciconf11 = 0;
+ m_pciconf12 = 0;
+ m_pciconf13 = 0x00000040;
+ m_pciconf14 = 0;
+ m_pciconf15 = 0x00000100;
+ m_pciconf16 = 0x00010001;
+ m_pciconf17 = 0;
+ m_pcicr = 0;
+ m_pcilsr0 = 0;
+ m_pcilsr1 = 0;
+ m_pcilar0 = 0;
+ m_pcilar1 = 0;
+ m_pciint = 0;
+ m_pciintm = 0;
+ m_pcialr = 0;
+ m_pciclr = 0;
+ m_pciaint = 0;
+ m_pciaintm = 0;
+ m_pcibllr = 0;
+ m_pcidmabt = 0;
+ m_pcidpa0 = 0;
+ m_pcidla0 = 0;
+ m_pcidtc0 = 0;
+ m_pcidcr0 = 0;
+ m_pcidpa1 = 0;
+ m_pcidla1 = 0;
+ m_pcidtc1 = 0;
+ m_pcidcr1 = 0;
+ m_pcidpa2 = 0;
+ m_pcidla2 = 0;
+ m_pcidtc2 = 0;
+ m_pcidcr2 = 0;
+ m_pcidpa3 = 0;
+ m_pcidla3 = 0;
+ m_pcidtc3 = 0;
+ m_pcidcr3 = 0;
+ m_pcipar = 0;
+ m_pcimbr = 0;
+ m_pciiobr = 0;
+ m_pcipint = 0;
+ m_pcipintm = 0;
+ m_pciclkr = 0;
+ m_pcibcr1 = 0;
+ m_pcibcr2 = 0x00003ffc;
+ m_pcibcr3 = 1;
+ m_pciwcr1 = 0x77777777;
+ m_pciwcr2 = 0xfffeefff;
+ m_pciwcr3 = 0x07777777;
+ m_pcimcr = 0;
+ m_pcipctr = 0;
+ m_pcipdtr = 0;
+ m_pcipdr = 0;
+
+ // H-UDI
+ m_sdir = 0xffff;
+ m_sddr = 0;
+ m_sdint = 0;
+
+ save_item(NAME(m_refresh_timer_base));
+
for (i = 0;i < 64;i++)
{
save_item(NAME(m_utlb[i].ASID), i);
@@ -2109,6 +3460,201 @@ void sh4_base_device::device_start()
save_item(NAME(m_utlb[i].SA), i);
save_item(NAME(m_utlb[i].TC), i);
}
+
+ // UBC
+ save_item(NAME(m_bara));
+ save_item(NAME(m_bamra));
+ save_item(NAME(m_bbra));
+ save_item(NAME(m_barb));
+ save_item(NAME(m_bamrb));
+ save_item(NAME(m_bbrb));
+ save_item(NAME(m_bdrb));
+ save_item(NAME(m_bdmrb));
+ save_item(NAME(m_brcr));
+
+ // BSC
+ save_item(NAME(m_bcr1));
+ save_item(NAME(m_bcr2));
+ save_item(NAME(m_wcr1));
+ save_item(NAME(m_wcr2));
+ save_item(NAME(m_wcr3));
+ save_item(NAME(m_mcr));
+ save_item(NAME(m_pcr));
+ save_item(NAME(m_rtcsr));
+ save_item(NAME(m_rtcnt));
+ save_item(NAME(m_rtcor));
+ save_item(NAME(m_rfcr));
+ save_item(NAME(m_pctra));
+ save_item(NAME(m_pdtra));
+ save_item(NAME(m_pctrb));
+ save_item(NAME(m_pdtrb));
+ save_item(NAME(m_gpioic));
+
+ // BSC 7750R
+ save_item(NAME(m_bcr3));
+ save_item(NAME(m_bcr4));
+
+ // DMAC 7750R
+ save_item(NAME(m_sar4));
+ save_item(NAME(m_dar4));
+ save_item(NAME(m_dmatcr4));
+ save_item(NAME(m_chcr4));
+ save_item(NAME(m_sar5));
+ save_item(NAME(m_dar5));
+ save_item(NAME(m_dmatcr5));
+ save_item(NAME(m_chcr5));
+ save_item(NAME(m_sar6));
+ save_item(NAME(m_dar6));
+ save_item(NAME(m_dmatcr6));
+ save_item(NAME(m_chcr6));
+ save_item(NAME(m_sar7));
+ save_item(NAME(m_dar7));
+ save_item(NAME(m_dmatcr7));
+ save_item(NAME(m_chcr7));
+
+ // CPG
+ save_item(NAME(m_frqcr));
+ save_item(NAME(m_stbcr));
+ save_item(NAME(m_wtcnt));
+ save_item(NAME(m_wtcsr));
+ save_item(NAME(m_stbcr2));
+
+ // CPG 7750R
+ save_item(NAME(m_clkstp00));
+
+ // RTC
+ save_item(NAME(m_r64cnt));
+ save_item(NAME(m_rseccnt));
+ save_item(NAME(m_rmincnt));
+ save_item(NAME(m_rhrcnt));
+ save_item(NAME(m_rwkcnt));
+ save_item(NAME(m_rmoncnt));
+ save_item(NAME(m_rdaycnt));
+ save_item(NAME(m_ryrcnt));
+ save_item(NAME(m_rsecar));
+ save_item(NAME(m_rminar));
+ save_item(NAME(m_rhrar));
+ save_item(NAME(m_rwkar));
+ save_item(NAME(m_rdayar));
+ save_item(NAME(m_rmonar));
+ save_item(NAME(m_rcr1));
+ save_item(NAME(m_rcr2));
+
+ // INTC
+ save_item(NAME(m_iprb));
+
+ // INTC 7750S
+ save_item(NAME(m_iprd));
+
+ // INTC 7750R
+ save_item(NAME(m_intpri00));
+ save_item(NAME(m_intreq00));
+ save_item(NAME(m_intmsk00));
+
+ // TMU 7750R
+ save_item(NAME(m_tstr2));
+ save_item(NAME(m_tcor3));
+ save_item(NAME(m_tcnt3));
+ save_item(NAME(m_tcr3));
+ save_item(NAME(m_tcor4));
+ save_item(NAME(m_tcnt4));
+ save_item(NAME(m_tcr4));
+
+ // RTC 7750R
+ save_item(NAME(m_rcr3));
+ save_item(NAME(m_ryrar));
+
+ // SCI
+ save_item(NAME(m_scsmr1));
+ save_item(NAME(m_scbrr1));
+ save_item(NAME(m_scscr1));
+ save_item(NAME(m_sctdr1));
+ save_item(NAME(m_scssr1));
+ save_item(NAME(m_scrdr1));
+ save_item(NAME(m_scscmr1));
+ save_item(NAME(m_scsptr1));
+
+ // SCIF
+ save_item(NAME(m_scsmr2));
+ save_item(NAME(m_scbrr2));
+ save_item(NAME(m_scscr2));
+ save_item(NAME(m_scftdr2));
+ save_item(NAME(m_scfsr2));
+ save_item(NAME(m_scfrdr2));
+ save_item(NAME(m_scfcr2));
+ save_item(NAME(m_scfdr2));
+ save_item(NAME(m_scsptr2));
+ save_item(NAME(m_sclsr2));
+
+ // H-UDI
+ save_item(NAME(m_sdir));
+ save_item(NAME(m_sddr));
+ save_item(NAME(m_sdint));
+
+ // PCI 7751
+ save_item(NAME(m_pciconf0));
+ save_item(NAME(m_pciconf1));
+ save_item(NAME(m_pciconf2));
+ save_item(NAME(m_pciconf3));
+ save_item(NAME(m_pciconf4));
+ save_item(NAME(m_pciconf5));
+ save_item(NAME(m_pciconf6));
+ save_item(NAME(m_pciconf7));
+ save_item(NAME(m_pciconf8));
+ save_item(NAME(m_pciconf9));
+ save_item(NAME(m_pciconf10));
+ save_item(NAME(m_pciconf11));
+ save_item(NAME(m_pciconf12));
+ save_item(NAME(m_pciconf13));
+ save_item(NAME(m_pciconf14));
+ save_item(NAME(m_pciconf15));
+ save_item(NAME(m_pciconf16));
+ save_item(NAME(m_pciconf17));
+ save_item(NAME(m_pcicr));
+ save_item(NAME(m_pcilsr0));
+ save_item(NAME(m_pcilsr1));
+ save_item(NAME(m_pcilar0));
+ save_item(NAME(m_pcilar1));
+ save_item(NAME(m_pciint));
+ save_item(NAME(m_pciintm));
+ save_item(NAME(m_pcialr));
+ save_item(NAME(m_pciclr));
+ save_item(NAME(m_pciaint));
+ save_item(NAME(m_pciaintm));
+ save_item(NAME(m_pcibllr));
+ save_item(NAME(m_pcidmabt));
+ save_item(NAME(m_pcidpa0));
+ save_item(NAME(m_pcidla0));
+ save_item(NAME(m_pcidtc0));
+ save_item(NAME(m_pcidcr0));
+ save_item(NAME(m_pcidpa1));
+ save_item(NAME(m_pcidla1));
+ save_item(NAME(m_pcidtc1));
+ save_item(NAME(m_pcidcr1));
+ save_item(NAME(m_pcidpa2));
+ save_item(NAME(m_pcidla2));
+ save_item(NAME(m_pcidtc2));
+ save_item(NAME(m_pcidcr2));
+ save_item(NAME(m_pcidpa3));
+ save_item(NAME(m_pcidla3));
+ save_item(NAME(m_pcidtc3));
+ save_item(NAME(m_pcidcr3));
+ save_item(NAME(m_pcipar));
+ save_item(NAME(m_pcimbr));
+ save_item(NAME(m_pciiobr));
+ save_item(NAME(m_pcipint));
+ save_item(NAME(m_pcipintm));
+ save_item(NAME(m_pciclkr));
+ save_item(NAME(m_pcibcr1));
+ save_item(NAME(m_pcibcr2));
+ save_item(NAME(m_pcibcr3));
+ save_item(NAME(m_pciwcr1));
+ save_item(NAME(m_pciwcr2));
+ save_item(NAME(m_pciwcr3));
+ save_item(NAME(m_pcimcr));
+ save_item(NAME(m_pcipctr));
+ save_item(NAME(m_pcipdtr));
+ save_item(NAME(m_pcipdr));
}
@@ -2131,13 +3677,6 @@ void sh34_base_device::device_start()
m_dma_timer[i]->adjust(attotime::never, i);
}
- m_refresh_timer = timer_alloc(FUNC(sh34_base_device::sh4_refresh_timer_callback), this);
- m_refresh_timer->adjust(attotime::never);
- m_refresh_timer_base = 0;
-
- m_rtc_timer = timer_alloc(FUNC(sh34_base_device::sh4_rtc_timer_callback), this);
- m_rtc_timer->adjust(attotime::never);
-
sh4_parse_configuration();
m_internal = &space(AS_PROGRAM);
@@ -2199,41 +3738,80 @@ void sh34_base_device::device_start()
save_item(NAME(m_exception_priority));
save_item(NAME(m_exception_requesting));
save_item(NAME(m_irq_line_state));
- save_item(NAME(m_m));
- save_item(NAME(m_SH4_TSTR));
- save_item(NAME(m_SH4_TCNT0));
- save_item(NAME(m_SH4_TCNT1));
- save_item(NAME(m_SH4_TCNT2));
- save_item(NAME(m_SH4_TCR0));
- save_item(NAME(m_SH4_TCR1));
- save_item(NAME(m_SH4_TCR2));
- save_item(NAME(m_SH4_TCOR0));
- save_item(NAME(m_SH4_TCOR1));
- save_item(NAME(m_SH4_TCOR2));
- save_item(NAME(m_SH4_TOCR));
- save_item(NAME(m_SH4_TCPR2));
- save_item(NAME(m_SH4_IPRA));
- save_item(NAME(m_SH4_IPRC));
- save_item(NAME(m_SH4_DAR0));
- save_item(NAME(m_SH4_DAR1));
- save_item(NAME(m_SH4_DAR2));
- save_item(NAME(m_SH4_DAR3));
- save_item(NAME(m_SH4_CHCR0));
- save_item(NAME(m_SH4_CHCR1));
- save_item(NAME(m_SH4_CHCR2));
- save_item(NAME(m_SH4_CHCR3));
- save_item(NAME(m_SH4_DMATCR0));
- save_item(NAME(m_SH4_DMATCR1));
- save_item(NAME(m_SH4_DMATCR2));
- save_item(NAME(m_SH4_DMATCR3));
- save_item(NAME(m_SH4_DMAOR));
+
+ // CCN
+ m_tea = 0;
+ m_basra = 0;
+ m_basrb = 0;
+
+ // CCN
+ save_item(NAME(m_pteh));
+ save_item(NAME(m_ptel));
+ save_item(NAME(m_ttb));
+ save_item(NAME(m_tea));
+ save_item(NAME(m_mmucr));
+ save_item(NAME(m_basra));
+ save_item(NAME(m_basrb));
+ save_item(NAME(m_ccr));
+ save_item(NAME(m_tra));
+ save_item(NAME(m_expevt));
+ save_item(NAME(m_intevt));
+
+ // CCN 7709S
+ save_item(NAME(m_ccr2));
+
+ // CCN 7091
+ save_item(NAME(m_ptea));
+ save_item(NAME(m_qacr0));
+ save_item(NAME(m_qacr1));
+
+ // TMU
+ save_item(NAME(m_tocr));
+ save_item(NAME(m_tstr));
+ save_item(NAME(m_tcor0));
+ save_item(NAME(m_tcnt0));
+ save_item(NAME(m_tcr0));
+ save_item(NAME(m_tcor1));
+ save_item(NAME(m_tcnt1));
+ save_item(NAME(m_tcr1));
+ save_item(NAME(m_tcor2));
+ save_item(NAME(m_tcnt2));
+ save_item(NAME(m_tcr2));
+ save_item(NAME(m_tcpr2));
+
+ // INTC
+ save_item(NAME(m_icr));
+ save_item(NAME(m_ipra));
+ save_item(NAME(m_iprc));
+
+ // INTC 7709
+ save_item(NAME(m_intevt2));
+
+ // DMAC
+ save_item(NAME(m_sar0));
+ save_item(NAME(m_sar1));
+ save_item(NAME(m_sar2));
+ save_item(NAME(m_sar3));
+ save_item(NAME(m_dar0));
+ save_item(NAME(m_dar1));
+ save_item(NAME(m_dar2));
+ save_item(NAME(m_dar3));
+ save_item(NAME(m_chcr0));
+ save_item(NAME(m_chcr1));
+ save_item(NAME(m_chcr2));
+ save_item(NAME(m_chcr3));
+ save_item(NAME(m_dmatcr0));
+ save_item(NAME(m_dmatcr1));
+ save_item(NAME(m_dmatcr2));
+ save_item(NAME(m_dmatcr3));
+ save_item(NAME(m_dmaor));
+
save_item(NAME(m_nmi_line_state));
save_item(NAME(m_sh2_state->m_frt_input));
save_item(NAME(m_irln));
save_item(NAME(m_internal_irq_level));
save_item(NAME(m_internal_irq_vector));
- save_item(NAME(m_refresh_timer_base));
save_item(NAME(m_dma_timer_active));
save_item(NAME(m_dma_source));
save_item(NAME(m_dma_destination));
@@ -2251,8 +3829,6 @@ void sh34_base_device::device_start()
save_item(NAME(m_ioport4_pullup));
save_item(NAME(m_ioport4_direction));
save_item(NAME(m_sh4_mmu_enabled));
- save_item(NAME(m_sh3internal_upper));
- save_item(NAME(m_sh3internal_lower));
// Debugger state
@@ -2488,7 +4064,7 @@ void sh34_base_device::state_export(const device_state_entry &entry)
switch (entry.index())
{
case STATE_GENPC:
- m_debugger_temp = (m_sh2_state->pc & SH34_AM);
+ m_debugger_temp = m_sh2_state->pc;
break;
}
}
@@ -2654,43 +4230,23 @@ void sh34_base_device::sh4_set_ftcsr_callback(sh4_ftcsr_callback callback)
}
*/
-const opcode_desc* sh4be_device::get_desclist(offs_t pc)
-{
- return m_drcfe->describe_code(pc);
-}
-
-void sh4be_device::init_drc_frontend()
-{
- m_drcfe = std::make_unique<sh4be_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
-}
-
-const opcode_desc* sh4_device::get_desclist(offs_t pc)
+const opcode_desc* sh4_base_device::get_desclist(offs_t pc)
{
return m_drcfe->describe_code(pc);
}
-void sh4_device::init_drc_frontend()
+void sh4_base_device::init_drc_frontend()
{
m_drcfe = std::make_unique<sh4_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
}
-const opcode_desc* sh3be_device::get_desclist(offs_t pc)
-{
- return m_drcfe->describe_code(pc);
-}
-
-void sh3be_device::init_drc_frontend()
-{
- m_drcfe = std::make_unique<sh4be_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
-}
-
-const opcode_desc* sh3_device::get_desclist(offs_t pc)
+const opcode_desc* sh3_base_device::get_desclist(offs_t pc)
{
return m_drcfe->describe_code(pc);
}
-void sh3_device::init_drc_frontend()
+void sh3_base_device::init_drc_frontend()
{
m_drcfe = std::make_unique<sh4_frontend>(this, COMPILE_BACKWARDS_BYTES, COMPILE_FORWARDS_BYTES, SINGLE_INSTRUCTION_MODE ? 1 : COMPILE_MAX_SEQUENCE);
}
@@ -2811,7 +4367,7 @@ void sh34_base_device::static_generate_memory_accessor(int size, int iswrite, co
UML_LABEL(block, label++); // label:
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
for (auto & elem : m_fastram)
{
diff --git a/src/devices/cpu/sh/sh4.h b/src/devices/cpu/sh/sh4.h
index e344a42385e..c4fc1c0cd1c 100644
--- a/src/devices/cpu/sh/sh4.h
+++ b/src/devices/cpu/sh/sh4.h
@@ -10,8 +10,8 @@
*
*****************************************************************************/
-#ifndef MAME_CPU_SH4_SH4_H
-#define MAME_CPU_SH4_SH4_H
+#ifndef MAME_CPU_SH_SH4_H
+#define MAME_CPU_SH_SH4_H
#pragma once
@@ -156,7 +156,6 @@ struct sh4_utlb
typedef void (*sh4_ftcsr_callback)(uint32_t);
class sh4_frontend;
-class sh4be_frontend;
class sh34_base_device : public sh_common_execution
{
@@ -168,8 +167,6 @@ public:
void set_mmu_hacktype(int hacktype) { m_mmuhack = hacktype; }
- TIMER_CALLBACK_MEMBER(sh4_refresh_timer_callback);
- TIMER_CALLBACK_MEMBER(sh4_rtc_timer_callback);
TIMER_CALLBACK_MEMBER(sh4_timer_callback);
TIMER_CALLBACK_MEMBER(sh4_dmac_callback);
@@ -257,19 +254,19 @@ protected:
sh34_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness, address_map_constructor internal);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
+ virtual bool memory_translate(int spacenum, int intention, offs_t& address, address_space*& target_space) override;
// device_state_interface overrides
virtual void state_import(const device_state_entry &entry) override;
@@ -299,50 +296,67 @@ protected:
address_space *m_program;
address_space *m_io;
- // sh4 internal
- uint32_t m_m[16384];
-
- // timer regs handled manually for reuse
- uint32_t m_SH4_TSTR;
- uint32_t m_SH4_TCNT0;
- uint32_t m_SH4_TCNT1;
- uint32_t m_SH4_TCNT2;
- uint32_t m_SH4_TCR0;
- uint32_t m_SH4_TCR1;
- uint32_t m_SH4_TCR2;
- uint32_t m_SH4_TCOR0;
- uint32_t m_SH4_TCOR1;
- uint32_t m_SH4_TCOR2;
- uint32_t m_SH4_TOCR;
- uint32_t m_SH4_TCPR2;
-
- // INTC regs
- uint32_t m_SH4_IPRA;
-
- uint32_t m_SH4_IPRC;
-
- // DMAC regs
- uint32_t m_SH4_SAR0;
- uint32_t m_SH4_SAR1;
- uint32_t m_SH4_SAR2;
- uint32_t m_SH4_SAR3;
-
- uint32_t m_SH4_DAR0;
- uint32_t m_SH4_DAR1;
- uint32_t m_SH4_DAR2;
- uint32_t m_SH4_DAR3;
-
- uint32_t m_SH4_CHCR0;
- uint32_t m_SH4_CHCR1;
- uint32_t m_SH4_CHCR2;
- uint32_t m_SH4_CHCR3;
-
- uint32_t m_SH4_DMATCR0;
- uint32_t m_SH4_DMATCR1;
- uint32_t m_SH4_DMATCR2;
- uint32_t m_SH4_DMATCR3;
-
- uint32_t m_SH4_DMAOR;
+ // CCN
+ uint32_t m_pteh;
+ uint32_t m_ptel;
+ uint32_t m_ttb;
+ uint32_t m_tea;
+ uint32_t m_mmucr;
+ uint8_t m_basra;
+ uint8_t m_basrb;
+ uint32_t m_ccr;
+ uint32_t m_tra;
+ uint32_t m_expevt;
+ uint32_t m_intevt;
+
+ // CCN 7709S
+ uint32_t m_ccr2;
+
+ // CCN 7091
+ uint32_t m_ptea;
+ uint32_t m_qacr0;
+ uint32_t m_qacr1;
+
+ // TMU
+ uint8_t m_tocr;
+ uint8_t m_tstr;
+ uint32_t m_tcor0;
+ uint32_t m_tcnt0;
+ uint16_t m_tcr0;
+ uint32_t m_tcor1;
+ uint32_t m_tcnt1;
+ uint16_t m_tcr1;
+ uint32_t m_tcor2;
+ uint32_t m_tcnt2;
+ uint16_t m_tcr2;
+ uint32_t m_tcpr2;
+
+ // INTC
+ uint16_t m_icr;
+ uint16_t m_ipra;
+ uint16_t m_iprc;
+
+ // INTC 7709
+ uint32_t m_intevt2;
+
+ // DMAC
+ uint32_t m_sar0;
+ uint32_t m_dar0;
+ uint32_t m_dmatcr0;
+ uint32_t m_chcr0;
+ uint32_t m_sar1;
+ uint32_t m_dar1;
+ uint32_t m_dmatcr1;
+ uint32_t m_chcr1;
+ uint32_t m_sar2;
+ uint32_t m_dar2;
+ uint32_t m_dmatcr2;
+ uint32_t m_chcr2;
+ uint32_t m_sar3;
+ uint32_t m_dar3;
+ uint32_t m_dmatcr3;
+ uint32_t m_chcr3;
+ uint32_t m_dmaor;
int8_t m_nmi_line_state;
@@ -351,10 +365,7 @@ protected:
int m_internal_irq_vector;
emu_timer *m_dma_timer[4];
- emu_timer *m_refresh_timer;
- emu_timer *m_rtc_timer;
emu_timer *m_timer[3];
- uint32_t m_refresh_timer_base;
int m_dma_timer_active[4];
uint32_t m_dma_source[4];
uint32_t m_dma_destination[4];
@@ -379,10 +390,6 @@ protected:
bool m_sh4_mmu_enabled;
- // sh3 internal
- uint32_t m_sh3internal_upper[0x3000/4];
- uint32_t m_sh3internal_lower[0x1000];
-
uint64_t m_debugger_temp;
inline void sh4_check_pending_irq(const char *message) // look for highest priority active exception and handle it
@@ -419,76 +426,74 @@ protected:
void sh4_exception_checkunrequest(int exception);
void sh4_exception_process(int exception, uint32_t vector);
void sh4_exception(const char *message, int exception);
- uint32_t compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor);
- void sh4_refresh_timer_recompute();
- void increment_rtc_time(int mode);
void sh4_dmac_nmi();
- void sh4_handler_ipra_w(uint32_t data, uint32_t mem_mask);
+ uint16_t ipra_r(offs_t offset, uint16_t mem_mask);
+ void ipra_w(offs_t offset, uint16_t data, uint16_t mem_mask);
virtual uint32_t get_remap(uint32_t address);
virtual uint32_t sh4_getsqremap(uint32_t address);
void sh4_parse_configuration();
void sh4_timer_recompute(int which);
- uint32_t sh4_handle_tcnt0_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcnt1_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcnt2_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcor0_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcor1_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcor2_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcr0_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcr1_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcr2_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tstr_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tocr_addr_r(uint32_t mem_mask);
- uint32_t sh4_handle_tcpr2_addr_r(uint32_t mem_mask);
- void sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcr0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcr1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcr2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcor0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcor1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcor2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcnt0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcnt1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcnt2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tocr_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_tcpr2_addr_w(uint32_t data, uint32_t mem_mask);
+ uint8_t tocr_r(offs_t offset, uint8_t mem_mask);
+ void tocr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t tstr_r(offs_t offset, uint8_t mem_mask);
+ void tstr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint32_t tcor0_r(offs_t offset, uint32_t mem_mask);
+ void tcor0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tcnt0_r(offs_t offset, uint32_t mem_mask);
+ void tcnt0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t tcr0_r(offs_t offset, uint16_t mem_mask);
+ void tcr0_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t tcor1_r(offs_t offset, uint32_t mem_mask);
+ void tcor1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tcnt1_r(offs_t offset, uint32_t mem_mask);
+ void tcnt1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t tcr1_r(offs_t offset, uint16_t mem_mask);
+ void tcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t tcor2_r(offs_t offset, uint32_t mem_mask);
+ void tcor2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tcnt2_r(offs_t offset, uint32_t mem_mask);
+ void tcnt2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t tcr2_r(offs_t offset, uint16_t mem_mask);
+ void tcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t tcpr2_r(offs_t offset, uint32_t mem_mask);
+ void tcpr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
int sh4_dma_transfer(int channel, int timermode, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr);
int sh4_dma_transfer_device(int channel, uint32_t chcr, uint32_t *sar, uint32_t *dar, uint32_t *dmatcr);
void sh4_dmac_check(int channel);
- void sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask);
- void sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask);
- uint32_t sh4_handle_sar0_addr_r(uint32_t mem_mask) { return m_SH4_SAR0; }
- uint32_t sh4_handle_sar1_addr_r(uint32_t mem_mask) { return m_SH4_SAR1; }
- uint32_t sh4_handle_sar2_addr_r(uint32_t mem_mask) { return m_SH4_SAR2; }
- uint32_t sh4_handle_sar3_addr_r(uint32_t mem_mask) { return m_SH4_SAR3; }
- uint32_t sh4_handle_dar0_addr_r(uint32_t mem_mask) { return m_SH4_DAR0; }
- uint32_t sh4_handle_dar1_addr_r(uint32_t mem_mask) { return m_SH4_DAR1; }
- uint32_t sh4_handle_dar2_addr_r(uint32_t mem_mask) { return m_SH4_DAR2; }
- uint32_t sh4_handle_dar3_addr_r(uint32_t mem_mask) { return m_SH4_DAR3; }
- uint32_t sh4_handle_dmatcr0_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR0; }
- uint32_t sh4_handle_dmatcr1_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR1; }
- uint32_t sh4_handle_dmatcr2_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR2; }
- uint32_t sh4_handle_dmatcr3_addr_r(uint32_t mem_mask) { return m_SH4_DMATCR3; }
- uint32_t sh4_handle_chcr0_addr_r(uint32_t mem_mask) { return m_SH4_CHCR0; }
- uint32_t sh4_handle_chcr1_addr_r(uint32_t mem_mask) { return m_SH4_CHCR1; }
- uint32_t sh4_handle_chcr2_addr_r(uint32_t mem_mask) { return m_SH4_CHCR2; }
- uint32_t sh4_handle_chcr3_addr_r(uint32_t mem_mask) { return m_SH4_CHCR3; }
- uint32_t sh4_handle_dmaor_addr_r(uint32_t mem_mask) { return m_SH4_DMAOR; }
+ uint32_t sar0_r(offs_t offset, uint32_t mem_mask);
+ void sar0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar0_r(offs_t offset, uint32_t mem_mask);
+ void dar0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr0_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr0_r(offs_t offset, uint32_t mem_mask);
+ void chcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar1_r(offs_t offset, uint32_t mem_mask);
+ void sar1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar1_r(offs_t offset, uint32_t mem_mask);
+ void dar1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr1_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr1_r(offs_t offset, uint32_t mem_mask);
+ void chcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar2_r(offs_t offset, uint32_t mem_mask);
+ void sar2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar2_r(offs_t offset, uint32_t mem_mask);
+ void dar2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr2_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr2_r(offs_t offset, uint32_t mem_mask);
+ void chcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar3_r(offs_t offset, uint32_t mem_mask);
+ void sar3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar3_r(offs_t offset, uint32_t mem_mask);
+ void dar3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr3_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr3_r(offs_t offset, uint32_t mem_mask);
+ void chcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmaor_r(offs_t offset, uint32_t mem_mask);
+ void dmaor_w(offs_t offset, uint32_t data, uint32_t mem_mask);
// memory handlers
virtual uint8_t read_byte(offs_t offset) override;
@@ -679,27 +684,592 @@ private:
class sh3_base_device : public sh34_base_device
{
-public:
- void sh3_internal_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
- uint32_t sh3_internal_r(offs_t offset, uint32_t mem_mask = ~0);
-
- void sh3_internal_high_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
- uint32_t sh3_internal_high_r(offs_t offset, uint32_t mem_mask = ~0);
+ friend class sh4_frontend;
- void sh3_internal_map(address_map &map);
protected:
// construction/destruction
sh3_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness);
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void sh3_internal_map(address_map &map) ATTR_COLD;
+ virtual void sh3_register_map(address_map& map) ATTR_COLD {}
+
+ void ccn_map(address_map& map) ATTR_COLD;
+ void ccn_7709s_map(address_map& map) ATTR_COLD;
+ void ubc_map(address_map& map) ATTR_COLD;
+ void ubc_7709s_map(address_map& map) ATTR_COLD;
+ void cpg_map(address_map& map) ATTR_COLD;
+ void cpg_7709_map(address_map& map) ATTR_COLD;
+ void bsc_map(address_map& map) ATTR_COLD;
+ void bsc_7708_map(address_map& map) ATTR_COLD;
+ void bsc_7709_map(address_map& map) ATTR_COLD;
+ void bsc_7709s_map(address_map& map) ATTR_COLD;
+ void rtc_map(address_map& map) ATTR_COLD;
+ void intc_map(address_map& map) ATTR_COLD;
+ void intc_7709_map(address_map& map) ATTR_COLD;
+ void dmac_7709_map(address_map& map) ATTR_COLD;
+ void tmu_map(address_map& map) ATTR_COLD;
+ void sci_7708_map(address_map& map) ATTR_COLD;
+ void sci_7709_map(address_map& map) ATTR_COLD;
+ void cmt_7709_map(address_map& map) ATTR_COLD;
+ void ad_7709_map(address_map& map) ATTR_COLD;
+ void da_7709_map(address_map& map) ATTR_COLD;
+ void port_7709_map(address_map& map) ATTR_COLD;
+ void irda_7709_map(address_map& map) ATTR_COLD;
+ void scif_7709_map(address_map& map) ATTR_COLD;
+ void udi_7709s_map(address_map& map) ATTR_COLD;
+
+ // CCN
+ uint32_t pteh_r(offs_t offset, uint32_t mem_mask);
+ void pteh_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t ptel_r(offs_t offset, uint32_t mem_mask);
+ void ptel_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t ttb_r(offs_t offset, uint32_t mem_mask);
+ void ttb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tea_r(offs_t offset, uint32_t mem_mask);
+ void tea_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t mmucr_r(offs_t offset, uint32_t mem_mask);
+ void mmucr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t basra_r(offs_t offset, uint8_t mem_mask);
+ void basra_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t basrb_r(offs_t offset, uint8_t mem_mask);
+ void basrb_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint32_t ccr_r(offs_t offset, uint32_t mem_mask);
+ void ccr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tra_r(offs_t offset, uint32_t mem_mask);
+ void tra_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t expevt_r(offs_t offset, uint32_t mem_mask);
+ void expevt_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t intevt_r(offs_t offset, uint32_t mem_mask);
+ void intevt_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // CCN 7709S
+ uint32_t ccr2_r(offs_t offset, uint32_t mem_mask);
+ void ccr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // UBC
+ uint32_t bara_r(offs_t offset, uint32_t mem_mask);
+ void bara_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t bamra_r(offs_t offset, uint8_t mem_mask);
+ void bamra_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t bbra_r(offs_t offset, uint16_t mem_mask);
+ void bbra_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t barb_r(offs_t offset, uint32_t mem_mask);
+ void barb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t bamrb_r(offs_t offset, uint8_t mem_mask);
+ void bamrb_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t bbrb_r(offs_t offset, uint16_t mem_mask);
+ void bbrb_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t bdrb_r(offs_t offset, uint32_t mem_mask);
+ void bdrb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t bdmrb_r(offs_t offset, uint32_t mem_mask);
+ void bdmrb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t brcr_r(offs_t offset, uint16_t mem_mask);
+ void brcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // UBC 7709S
+ uint16_t betr_r(offs_t offset, uint16_t mem_mask);
+ void betr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t brsr_r(offs_t offset, uint32_t mem_mask);
+ void brsr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t brdr_r(offs_t offset, uint32_t mem_mask);
+ void brdr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // CPG
+ uint16_t frqcr_r(offs_t offset, uint16_t mem_mask);
+ void frqcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t stbcr_r(offs_t offset, uint8_t mem_mask);
+ void stbcr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t wtcnt_r(offs_t offset, uint8_t mem_mask);
+ void wtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t wtcsr_r(offs_t offset, uint8_t mem_mask);
+ void wtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // CPG 7709
+ uint8_t stbcr2_r(offs_t offset, uint8_t mem_mask);
+ void stbcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // BSC
+ uint16_t bcr1_r(offs_t offset, uint16_t mem_mask);
+ void bcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t bcr2_r(offs_t offset, uint16_t mem_mask);
+ void bcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t wcr1_r(offs_t offset, uint16_t mem_mask);
+ void wcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t wcr2_r(offs_t offset, uint16_t mem_mask);
+ void wcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcr_r(offs_t offset, uint16_t mem_mask);
+ void mcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pcr_r(offs_t offset, uint16_t mem_mask);
+ void pcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcsr_r(offs_t offset, uint16_t mem_mask);
+ void rtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcnt_r(offs_t offset, uint16_t mem_mask);
+ void rtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcor_r(offs_t offset, uint16_t mem_mask);
+ void rtcor_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rfcr_r(offs_t offset, uint16_t mem_mask);
+ void rfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t sdmr_r(offs_t offset, uint8_t mem_mask);
+ void sdmr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // BSC 7708
+ uint16_t dcr_r(offs_t offset, uint16_t mem_mask);
+ void dcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pctr_r(offs_t offset, uint16_t mem_mask);
+ void pctr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pdtr_r(offs_t offset, uint16_t mem_mask);
+ void pdtr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // BSC 7709
+ uint16_t bcr3_r(offs_t offset, uint16_t mem_mask);
+ void bcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // BSC 7709S
+ uint16_t mcscr0_r(offs_t offset, uint16_t mem_mask);
+ void mcscr0_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr1_r(offs_t offset, uint16_t mem_mask);
+ void mcscr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr2_r(offs_t offset, uint16_t mem_mask);
+ void mcscr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr3_r(offs_t offset, uint16_t mem_mask);
+ void mcscr3_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr4_r(offs_t offset, uint16_t mem_mask);
+ void mcscr4_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr5_r(offs_t offset, uint16_t mem_mask);
+ void mcscr5_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr6_r(offs_t offset, uint16_t mem_mask);
+ void mcscr6_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t mcscr7_r(offs_t offset, uint16_t mem_mask);
+ void mcscr7_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // RTC
+ uint8_t r64cnt_r(offs_t offset, uint8_t mem_mask);
+ uint8_t rseccnt_r(offs_t offset, uint8_t mem_mask);
+ void rseccnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmincnt_r(offs_t offset, uint8_t mem_mask);
+ void rmincnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rhrcnt_r(offs_t offset, uint8_t mem_mask);
+ void rhrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rwkcnt_r(offs_t offset, uint8_t mem_mask);
+ void rwkcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rdaycnt_r(offs_t offset, uint8_t mem_mask);
+ void rdaycnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmoncnt_r(offs_t offset, uint8_t mem_mask);
+ void rmoncnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t ryrcnt_r(offs_t offset, uint8_t mem_mask);
+ void ryrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rsecar_r(offs_t offset, uint8_t mem_mask);
+ void rsecar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rminar_r(offs_t offset, uint8_t mem_mask);
+ void rminar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rhrar_r(offs_t offset, uint8_t mem_mask);
+ void rhrar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rwkar_r(offs_t offset, uint8_t mem_mask);
+ void rwkar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rdayar_r(offs_t offset, uint8_t mem_mask);
+ void rdayar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmonar_r(offs_t offset, uint8_t mem_mask);
+ void rmonar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rcr1_r(offs_t offset, uint8_t mem_mask);
+ void rcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rcr2_r(offs_t offset, uint8_t mem_mask);
+ void rcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // INTC
+ uint16_t icr0_r(offs_t offset, uint16_t mem_mask);
+ void icr0_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t iprb_r(offs_t offset, uint16_t mem_mask);
+ void iprb_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // INTC 7709
+ uint32_t intevt2_r(offs_t offset, uint32_t mem_mask);
+ void intevt2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t irr0_r(offs_t offset, uint8_t mem_mask);
+ void irr0_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t irr1_r(offs_t offset, uint8_t mem_mask);
+ void irr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t irr2_r(offs_t offset, uint8_t mem_mask);
+ void irr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t icr1_r(offs_t offset, uint16_t mem_mask);
+ void icr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t icr2_r(offs_t offset, uint16_t mem_mask);
+ void icr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pinter_r(offs_t offset, uint16_t mem_mask);
+ void pinter_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t iprc_r(offs_t offset, uint16_t mem_mask);
+ void iprc_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t iprd_r(offs_t offset, uint16_t mem_mask);
+ void iprd_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t ipre_r(offs_t offset, uint16_t mem_mask);
+ void ipre_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // SCI
+ uint8_t scsmr_r(offs_t offset, uint8_t mem_mask);
+ void scsmr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scbrr_r(offs_t offset, uint8_t mem_mask);
+ void scbrr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscr_r(offs_t offset, uint8_t mem_mask);
+ void scscr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t sctdr_r(offs_t offset, uint8_t mem_mask);
+ void sctdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scssr_r(offs_t offset, uint8_t mem_mask);
+ void scssr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scrdr_r(offs_t offset, uint8_t mem_mask);
+ void scscmr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscmr_r(offs_t offset, uint8_t mem_mask);
+
+ // SCI 7708
+ uint8_t scsptr_r(offs_t offset, uint8_t mem_mask);
+ void scsptr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // CMT 7709
+ uint16_t cmstr_r(offs_t offset, uint16_t mem_mask);
+ void cmstr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t cmscr_r(offs_t offset, uint16_t mem_mask);
+ void cmscr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t cmcnt_r(offs_t offset, uint16_t mem_mask);
+ void cmcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t cmcor_r(offs_t offset, uint16_t mem_mask);
+ void cmcor_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // AD 7709
+ uint8_t addrah_r(offs_t offset, uint8_t mem_mask);
+ void addrah_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addral_r(offs_t offset, uint8_t mem_mask);
+ void addral_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrbh_r(offs_t offset, uint8_t mem_mask);
+ void addrbh_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrbl_r(offs_t offset, uint8_t mem_mask);
+ void addrbl_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrch_r(offs_t offset, uint8_t mem_mask);
+ void addrch_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrcl_r(offs_t offset, uint8_t mem_mask);
+ void addrcl_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrdh_r(offs_t offset, uint8_t mem_mask);
+ void addrdh_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t addrdl_r(offs_t offset, uint8_t mem_mask);
+ void addrdl_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t adcsr_r(offs_t offset, uint8_t mem_mask);
+ void adcsr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t adcr_r(offs_t offset, uint8_t mem_mask);
+ void adcr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // DA 7709
+ uint8_t dadr0_r(offs_t offset, uint8_t mem_mask);
+ void dadr0_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t dadr1_r(offs_t offset, uint8_t mem_mask);
+ void dadr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t dadcr_r(offs_t offset, uint8_t mem_mask);
+ void dadcr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // PORT 7709
+ uint16_t pacr_r(offs_t offset, uint16_t mem_mask);
+ void pacr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pbcr_r(offs_t offset, uint16_t mem_mask);
+ void pbcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pccr_r(offs_t offset, uint16_t mem_mask);
+ void pccr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pdcr_r(offs_t offset, uint16_t mem_mask);
+ void pdcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pecr_r(offs_t offset, uint16_t mem_mask);
+ void pecr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pfcr_r(offs_t offset, uint16_t mem_mask);
+ void pfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pgcr_r(offs_t offset, uint16_t mem_mask);
+ void pgcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t phcr_r(offs_t offset, uint16_t mem_mask);
+ void phcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pjcr_r(offs_t offset, uint16_t mem_mask);
+ void pjcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t pkcr_r(offs_t offset, uint16_t mem_mask);
+ void pkcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t plcr_r(offs_t offset, uint16_t mem_mask);
+ void plcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t scpcr_r(offs_t offset, uint16_t mem_mask);
+ void scpcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t padr_r(offs_t offset, uint8_t mem_mask);
+ void padr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pbdr_r(offs_t offset, uint8_t mem_mask);
+ void pbdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pcdr_r(offs_t offset, uint8_t mem_mask);
+ void pcdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pddr_r(offs_t offset, uint8_t mem_mask);
+ void pddr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pedr_r(offs_t offset, uint8_t mem_mask);
+ void pedr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pfdr_r(offs_t offset, uint8_t mem_mask);
+ void pfdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pgdr_r(offs_t offset, uint8_t mem_mask);
+ void pgdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t phdr_r(offs_t offset, uint8_t mem_mask);
+ void phdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pjdr_r(offs_t offset, uint8_t mem_mask);
+ void pjdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pkdr_r(offs_t offset, uint8_t mem_mask);
+ void pkdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t pldr_r(offs_t offset, uint8_t mem_mask);
+ void pldr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scpdr_r(offs_t offset, uint8_t mem_mask);
+ void scpdr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // IRDA 7709
+ uint8_t scsmr1_r(offs_t offset, uint8_t mem_mask);
+ void scsmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scbrr1_r(offs_t offset, uint8_t mem_mask);
+ void scbrr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscr1_r(offs_t offset, uint8_t mem_mask);
+ void scscr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scftdr1_r(offs_t offset, uint8_t mem_mask);
+ void scftdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scssr1_r(offs_t offset, uint16_t mem_mask);
+ void scssr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t scfrdr1_r(offs_t offset, uint8_t mem_mask);
+ void scfrdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scfcr1_r(offs_t offset, uint8_t mem_mask);
+ void scfcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scfdr1_r(offs_t offset, uint16_t mem_mask);
+ void scfdr1_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // SCIF 7709
+ uint8_t scsmr2_r(offs_t offset, uint8_t mem_mask);
+ void scsmr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scbrr2_r(offs_t offset, uint8_t mem_mask);
+ void scbrr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscr2_r(offs_t offset, uint8_t mem_mask);
+ void scscr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scftdr2_r(offs_t offset, uint8_t mem_mask);
+ void scftdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scssr2_r(offs_t offset, uint16_t mem_mask);
+ void scssr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t scfrdr2_r(offs_t offset, uint8_t mem_mask);
+ void scfrdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scfcr2_r(offs_t offset, uint8_t mem_mask);
+ void scfcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scfdr2_r(offs_t offset, uint16_t mem_mask);
+ void scfdr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // UDI 7709S
+ uint16_t sdir_r(offs_t offset, uint16_t mem_mask);
+ void sdir_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ std::unique_ptr<sh4_frontend> m_drcfe; /* pointer to the DRC front-end state */
+ virtual const opcode_desc* get_desclist(offs_t pc) override;
+ virtual void init_drc_frontend() override;
+
+ // UBC
+ uint32_t m_bara;
+ uint8_t m_bamra;
+ uint16_t m_bbra;
+ uint32_t m_barb;
+ uint8_t m_bamrb;
+ uint16_t m_bbrb;
+ uint32_t m_bdrb;
+ uint32_t m_bdmrb;
+ uint16_t m_brcr;
+
+ // UBC 7709S
+ uint16_t m_betr;
+ uint32_t m_brsr;
+ uint32_t m_brdr;
+
+ // CPG
+ uint16_t m_frqcr;
+ uint8_t m_stbcr;
+ uint16_t m_wtcnt;
+ uint16_t m_wtcsr;
+
+ // CPG 7709
+ uint8_t m_stbcr2;
+
+ // BSC
+ uint16_t m_bcr1;
+ uint16_t m_bcr2;
+ uint16_t m_wcr1;
+ uint16_t m_wcr2;
+ uint16_t m_mcr;
+ uint16_t m_pcr;
+ uint16_t m_rtcsr;
+ uint16_t m_rtcnt;
+ uint16_t m_rtcor;
+ uint16_t m_rfcr;
+
+ // BSC 7708
+ uint16_t m_dcr;
+ uint16_t m_pctr;
+ uint16_t m_pdtr;
+
+ // BSC 7709
+ uint16_t m_bcr3;
+
+ // BSC 7709S
+ uint16_t m_mcscr0;
+ uint16_t m_mcscr1;
+ uint16_t m_mcscr2;
+ uint16_t m_mcscr3;
+ uint16_t m_mcscr4;
+ uint16_t m_mcscr5;
+ uint16_t m_mcscr6;
+ uint16_t m_mcscr7;
+
+ // RTC
+ uint8_t m_r64cnt;
+ uint8_t m_rseccnt;
+ uint8_t m_rmincnt;
+ uint8_t m_rhrcnt;
+ uint8_t m_rwkcnt;
+ uint8_t m_rmoncnt;
+ uint8_t m_rdaycnt;
+ uint8_t m_ryrcnt;
+ uint8_t m_rsecar;
+ uint8_t m_rminar;
+ uint8_t m_rhrar;
+ uint8_t m_rwkar;
+ uint8_t m_rdayar;
+ uint8_t m_rmonar;
+ uint8_t m_rcr1;
+ uint8_t m_rcr2;
+
+ // INTC
+ uint16_t m_icr0;
+ uint16_t m_iprb;
+
+ // INTC 7709
+ uint8_t m_irr0;
+ uint8_t m_irr1;
+ uint8_t m_irr2;
+ uint16_t m_icr1;
+ uint16_t m_icr2;
+ uint16_t m_pinter;
+ uint16_t m_iprd;
+ uint16_t m_ipre;
+
+ // SCI
+ uint8_t m_scsmr;
+ uint8_t m_scbrr;
+ uint8_t m_scscr;
+ uint8_t m_sctdr;
+ uint8_t m_scssr;
+ uint8_t m_scrdr;
+ uint8_t m_scscmr;
+
+ // SCI 7709
+ uint8_t m_scsptr;
+
+ // CMT 7709
+ uint16_t m_cmstr;
+ uint16_t m_cmscr;
+ uint16_t m_cmcnt;
+ uint16_t m_cmcor;
+
+ // AD 7709
+ uint8_t m_addrah;
+ uint8_t m_addral;
+ uint8_t m_addrbh;
+ uint8_t m_addrbl;
+ uint8_t m_addrch;
+ uint8_t m_addrcl;
+ uint8_t m_addrdh;
+ uint8_t m_addrdl;
+ uint8_t m_adcsr;
+ uint8_t m_adcr;
+
+ // DA 7709
+ uint8_t m_dadr0;
+ uint8_t m_dadr1;
+ uint8_t m_dadcr;
+
+ // PORT 7709
+ uint16_t m_pacr;
+ uint16_t m_pbcr;
+ uint16_t m_pccr;
+ uint16_t m_pdcr;
+ uint16_t m_pecr;
+ uint16_t m_pfcr;
+ uint16_t m_pgcr;
+ uint16_t m_phcr;
+ uint16_t m_pjcr;
+ uint16_t m_pkcr;
+ uint16_t m_plcr;
+ uint16_t m_scpcr;
+ uint8_t m_padr;
+ uint8_t m_pbdr;
+ uint8_t m_pcdr;
+ uint8_t m_pddr;
+ uint8_t m_pedr;
+ uint8_t m_pfdr;
+ uint8_t m_pgdr;
+ uint8_t m_phdr;
+ uint8_t m_pjdr;
+ uint8_t m_pkdr;
+ uint8_t m_pldr;
+ uint8_t m_scpdr;
+
+ // IRDA 7709
+ uint8_t m_scsmr1;
+ uint8_t m_scbrr1;
+ uint8_t m_scscr1;
+ uint8_t m_scftdr1;
+ uint16_t m_scssr1;
+ uint8_t m_scfrdr1;
+ uint8_t m_scfcr1;
+ uint16_t m_scfdr1;
+
+ // SCIF 7709
+ uint8_t m_scsmr2;
+ uint8_t m_scbrr2;
+ uint8_t m_scscr2;
+ uint8_t m_scftdr2;
+ uint16_t m_scssr2;
+ uint16_t m_scfrdr2;
+ uint8_t m_scfcr2;
+ uint8_t m_scfdr2;
+
+ // UDI 7709S
+ uint16_t m_sdir;
};
class sh4_base_device : public sh34_base_device
{
-public:
- void sh4_internal_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
- uint32_t sh4_internal_r(offs_t offset, uint32_t mem_mask = ~0);
+protected:
+ friend class sh4_frontend;
+
+ // construction/destruction
+ sh4_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ virtual void init_drc_frontend() override;
+ std::unique_ptr<sh4_frontend> m_drcfe; /* pointer to the DRC front-end state */
+ virtual const opcode_desc* get_desclist(offs_t pc) override;
+
+ void sh4_internal_map(address_map& map) ATTR_COLD;
+ virtual void sh4_register_map(address_map& map) ATTR_COLD {}
+
+ void ccn_map(address_map &map) ATTR_COLD;
+ void ubc_map(address_map& map) ATTR_COLD;
+ void bsc_map(address_map& map) ATTR_COLD;
+ void bsc_7750r_map(address_map& map) ATTR_COLD;
+ void dmac_map(address_map& map) ATTR_COLD;
+ void dmac_7750r_map(address_map& map) ATTR_COLD;
+ void cpg_map(address_map& map) ATTR_COLD;
+ void cpg_7750r_map(address_map& map) ATTR_COLD;
+ void rtc_map(address_map& map) ATTR_COLD;
+ void rtc_7750r_map(address_map& map) ATTR_COLD;
+ void intc_map(address_map& map) ATTR_COLD;
+ void intc_7750s_map(address_map& map) ATTR_COLD;
+ void intc_7750r_map(address_map& map) ATTR_COLD;
+ void tmu_map(address_map& map) ATTR_COLD;
+ void tmu_7750r_map(address_map& map) ATTR_COLD;
+ void sci_map(address_map &map) ATTR_COLD;
+ void scif_map(address_map &map) ATTR_COLD;
+ void hudi_map(address_map& map) ATTR_COLD;
+ void hudi_7750r_map(address_map& map) ATTR_COLD;
+ void pci_7751_map(address_map& map) ATTR_COLD;
uint64_t sh4_utlb_address_array_r(offs_t offset);
void sh4_utlb_address_array_w(offs_t offset, uint64_t data);
@@ -708,73 +1278,698 @@ public:
uint64_t sh4_utlb_data_array2_r(offs_t offset);
void sh4_utlb_data_array2_w(offs_t offset, uint64_t data);
+ // CCN
+ uint32_t pteh_r(offs_t offset, uint32_t mem_mask);
+ void pteh_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t ptel_r(offs_t offset, uint32_t mem_mask);
+ void ptel_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t ttb_r(offs_t offset, uint32_t mem_mask);
+ void ttb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tea_r(offs_t offset, uint32_t mem_mask);
+ void tea_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t mmucr_r(offs_t offset, uint32_t mem_mask);
+ void mmucr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t basra_r(offs_t offset, uint8_t mem_mask);
+ void basra_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t basrb_r(offs_t offset, uint8_t mem_mask);
+ void basrb_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint32_t ccr_r(offs_t offset, uint32_t mem_mask);
+ void ccr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tra_r(offs_t offset, uint32_t mem_mask);
+ void tra_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t expevt_r(offs_t offset, uint32_t mem_mask);
+ void expevt_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t intevt_r(offs_t offset, uint32_t mem_mask);
+ void intevt_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t ptea_r(offs_t offset, uint32_t mem_mask);
+ void ptea_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t qacr0_r(offs_t offset, uint32_t mem_mask);
+ void qacr0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t qacr1_r(offs_t offset, uint32_t mem_mask);
+ void qacr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // UBC
+ uint32_t bara_r(offs_t offset, uint32_t mem_mask);
+ void bara_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t bamra_r(offs_t offset, uint8_t mem_mask);
+ void bamra_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t bbra_r(offs_t offset, uint16_t mem_mask);
+ void bbra_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t barb_r(offs_t offset, uint32_t mem_mask);
+ void barb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint8_t bamrb_r(offs_t offset, uint8_t mem_mask);
+ void bamrb_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t bbrb_r(offs_t offset, uint16_t mem_mask);
+ void bbrb_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t bdrb_r(offs_t offset, uint32_t mem_mask);
+ void bdrb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t bdmrb_r(offs_t offset, uint32_t mem_mask);
+ void bdmrb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t brcr_r(offs_t offset, uint16_t mem_mask);
+ void brcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // BSC
+ uint32_t bcr1_r(offs_t offset, uint32_t mem_mask);
+ void bcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t bcr2_r(offs_t offset, uint16_t mem_mask);
+ void bcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t wcr1_r(offs_t offset, uint32_t mem_mask);
+ void wcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t wcr2_r(offs_t offset, uint32_t mem_mask);
+ void wcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t wcr3_r(offs_t offset, uint32_t mem_mask);
+ void wcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t mcr_r(offs_t offset, uint32_t mem_mask);
+ void mcr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t pcr_r(offs_t offset, uint16_t mem_mask);
+ void pcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcsr_r(offs_t offset, uint16_t mem_mask);
+ void rtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcnt_r(offs_t offset, uint16_t mem_mask);
+ void rtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rtcor_r(offs_t offset, uint16_t mem_mask);
+ void rtcor_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t rfcr_r(offs_t offset, uint16_t mem_mask);
+ void rfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t pctra_r(offs_t offset, uint32_t mem_mask);
+ void pctra_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t pdtra_r(offs_t offset, uint16_t mem_mask);
+ void pdtra_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t pctrb_r(offs_t offset, uint32_t mem_mask);
+ void pctrb_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t pdtrb_r(offs_t offset, uint16_t mem_mask);
+ void pdtrb_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t gpioic_r(offs_t offset, uint16_t mem_mask);
+ void gpioic_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ void sdmr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ void sdmr3_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // BSC 7750R
+ uint16_t bcr3_r(offs_t offset, uint16_t mem_mask);
+ void bcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t bcr4_r(offs_t offset, uint32_t mem_mask);
+ void bcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // DMAC 7750R
+ uint32_t sar4_r(offs_t offset, uint32_t mem_mask);
+ void sar4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar4_r(offs_t offset, uint32_t mem_mask);
+ void dar4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr4_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr4_r(offs_t offset, uint32_t mem_mask);
+ void chcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar5_r(offs_t offset, uint32_t mem_mask);
+ void sar5_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar5_r(offs_t offset, uint32_t mem_mask);
+ void dar5_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr5_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr5_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr5_r(offs_t offset, uint32_t mem_mask);
+ void chcr5_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar6_r(offs_t offset, uint32_t mem_mask);
+ void sar6_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar6_r(offs_t offset, uint32_t mem_mask);
+ void dar6_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr6_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr6_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr6_r(offs_t offset, uint32_t mem_mask);
+ void chcr6_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t sar7_r(offs_t offset, uint32_t mem_mask);
+ void sar7_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dar7_r(offs_t offset, uint32_t mem_mask);
+ void dar7_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t dmatcr7_r(offs_t offset, uint32_t mem_mask);
+ void dmatcr7_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t chcr7_r(offs_t offset, uint32_t mem_mask);
+ void chcr7_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // CPG
+ uint16_t frqcr_r(offs_t offset, uint16_t mem_mask);
+ void frqcr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t stbcr_r(offs_t offset, uint8_t mem_mask);
+ void stbcr_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t wtcnt_r(offs_t offset, uint8_t mem_mask);
+ void wtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t wtcsr_r(offs_t offset, uint8_t mem_mask);
+ void wtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t stbcr2_r(offs_t offset, uint8_t mem_mask);
+ void stbcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // CPG 7750R
+ uint32_t clkstp00_r(offs_t offset, uint32_t mem_mask);
+ void clkstp00_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void clkstpclr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // RTC
+ uint8_t r64cnt_r(offs_t offset, uint8_t mem_mask);
+ uint8_t rseccnt_r(offs_t offset, uint8_t mem_mask);
+ void rseccnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmincnt_r(offs_t offset, uint8_t mem_mask);
+ void rmincnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rhrcnt_r(offs_t offset, uint8_t mem_mask);
+ void rhrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rwkcnt_r(offs_t offset, uint8_t mem_mask);
+ void rwkcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rdaycnt_r(offs_t offset, uint8_t mem_mask);
+ void rdaycnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmoncnt_r(offs_t offset, uint8_t mem_mask);
+ void rmoncnt_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t ryrcnt_r(offs_t offset, uint16_t mem_mask);
+ void ryrcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t rsecar_r(offs_t offset, uint8_t mem_mask);
+ void rsecar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rminar_r(offs_t offset, uint8_t mem_mask);
+ void rminar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rhrar_r(offs_t offset, uint8_t mem_mask);
+ void rhrar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rwkar_r(offs_t offset, uint8_t mem_mask);
+ void rwkar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rdayar_r(offs_t offset, uint8_t mem_mask);
+ void rdayar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rmonar_r(offs_t offset, uint8_t mem_mask);
+ void rmonar_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rcr1_r(offs_t offset, uint8_t mem_mask);
+ void rcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t rcr2_r(offs_t offset, uint8_t mem_mask);
+ void rcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // RTC 7750R
+ uint8_t rcr3_r(offs_t offset, uint8_t mem_mask);
+ void rcr3_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t ryrar_r(offs_t offset, uint16_t mem_mask);
+ void ryrar_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // INTC
+ uint16_t icr_r(offs_t offset, uint16_t mem_mask);
+ void icr_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t iprb_r(offs_t offset, uint16_t mem_mask);
+ void iprb_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t iprc_r(offs_t offset, uint16_t mem_mask);
+ void iprc_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // INTC 7750S
+ uint16_t iprd_r(offs_t offset, uint16_t mem_mask);
+ void iprd_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // INTC 7750R
+ uint32_t intpri00_r(offs_t offset, uint32_t mem_mask);
+ void intpri00_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t intreq00_r(offs_t offset, uint32_t mem_mask);
+ void intreq00_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t intmsk00_r(offs_t offset, uint32_t mem_mask);
+ void intmsk00_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ void intmskclr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // TMU 7750R
+ uint8_t tstr2_r(offs_t offset, uint8_t mem_mask);
+ void tstr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint32_t tcor3_r(offs_t offset, uint32_t mem_mask);
+ void tcor3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tcnt3_r(offs_t offset, uint32_t mem_mask);
+ void tcnt3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t tcr3_r(offs_t offset, uint16_t mem_mask);
+ void tcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t tcor4_r(offs_t offset, uint32_t mem_mask);
+ void tcor4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t tcnt4_r(offs_t offset, uint32_t mem_mask);
+ void tcnt4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint16_t tcr4_r(offs_t offset, uint16_t mem_mask);
+ void tcr4_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // SCI
+ uint8_t scsmr1_r(offs_t offset, uint8_t mem_mask);
+ void scsmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scbrr1_r(offs_t offset, uint8_t mem_mask);
+ void scbrr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscr1_r(offs_t offset, uint8_t mem_mask);
+ void scscr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t sctdr1_r(offs_t offset, uint8_t mem_mask);
+ void sctdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scssr1_r(offs_t offset, uint8_t mem_mask);
+ void scssr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scrdr1_r(offs_t offset, uint8_t mem_mask);
+ void scscmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint8_t scscmr1_r(offs_t offset, uint8_t mem_mask);
+ uint8_t scsptr1_r(offs_t offset, uint8_t mem_mask);
+ void scsptr1_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+
+ // SCIF
+ uint16_t scsmr2_r(offs_t offset, uint16_t mem_mask);
+ void scsmr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t scbrr2_r(offs_t offset, uint8_t mem_mask);
+ void scbrr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scscr2_r(offs_t offset, uint16_t mem_mask);
+ void scscr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t scftdr2_r(offs_t offset, uint8_t mem_mask);
+ void scftdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask);
+ uint16_t scfsr2_r(offs_t offset, uint16_t mem_mask);
+ void scfsr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint8_t scfrdr2_r(offs_t offset, uint8_t mem_mask);
+ uint16_t scfcr2_r(offs_t offset, uint16_t mem_mask);
+ void scfcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t scfdr2_r(offs_t offset, uint16_t mem_mask);
+ uint16_t scsptr2_r(offs_t offset, uint16_t mem_mask);
+ void scsptr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint16_t sclsr2_r(offs_t offset, uint16_t mem_mask);
+ void sclsr2_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // H-UDI
+ uint16_t sdir_r(offs_t offset, uint16_t mem_mask);
+ void sdir_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ uint32_t sddr_r(offs_t offset, uint32_t mem_mask);
+ void sddr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ // H-UDI 7750R
+ uint16_t sdint_r(offs_t offset, uint16_t mem_mask);
+ void sdint_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+
+ // PCI 7751
+ uint32_t pciconf0_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf1_r(offs_t offset, uint32_t mem_mask);
+ void pciconf1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf2_r(offs_t offset, uint32_t mem_mask);
+ void pciconf2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf3_r(offs_t offset, uint32_t mem_mask);
+ void pciconf3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf4_r(offs_t offset, uint32_t mem_mask);
+ void pciconf4_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf5_r(offs_t offset, uint32_t mem_mask);
+ void pciconf5_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf6_r(offs_t offset, uint32_t mem_mask);
+ void pciconf6_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf7_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf8_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf9_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf10_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf11_r(offs_t offset, uint32_t mem_mask);
+ void pciconf11_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf12_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf13_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf14_r(offs_t offset, uint32_t mem_mask);
+ uint32_t pciconf15_r(offs_t offset, uint32_t mem_mask);
+ void pciconf15_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf16_r(offs_t offset, uint32_t mem_mask);
+ void pciconf16_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciconf17_r(offs_t offset, uint32_t mem_mask);
+ void pciconf17_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcicr_r(offs_t offset, uint32_t mem_mask);
+ void pcicr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcilsr0_r(offs_t offset, uint32_t mem_mask);
+ void pcilsr0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcilsr1_r(offs_t offset, uint32_t mem_mask);
+ void pcilsr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcilar0_r(offs_t offset, uint32_t mem_mask);
+ void pcilar0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcilar1_r(offs_t offset, uint32_t mem_mask);
+ void pcilar1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciint_r(offs_t offset, uint32_t mem_mask);
+ void pciint_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciintm_r(offs_t offset, uint32_t mem_mask);
+ void pciintm_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcialr_r(offs_t offset, uint32_t mem_mask);
+ void pcialr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciclr_r(offs_t offset, uint32_t mem_mask);
+ void pciclr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciaint_r(offs_t offset, uint32_t mem_mask);
+ void pciaint_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciaintm_r(offs_t offset, uint32_t mem_mask);
+ void pciaintm_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcibllr_r(offs_t offset, uint32_t mem_mask);
+ void pcibllr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidmabt_r(offs_t offset, uint32_t mem_mask);
+ void pcidmabt_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidpa0_r(offs_t offset, uint32_t mem_mask);
+ void pcidpa0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidla0_r(offs_t offset, uint32_t mem_mask);
+ void pcidla0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidtc0_r(offs_t offset, uint32_t mem_mask);
+ void pcidtc0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidcr0_r(offs_t offset, uint32_t mem_mask);
+ void pcidcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidpa1_r(offs_t offset, uint32_t mem_mask);
+ void pcidpa1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidla1_r(offs_t offset, uint32_t mem_mask);
+ void pcidla1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidtc1_r(offs_t offset, uint32_t mem_mask);
+ void pcidtc1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidcr1_r(offs_t offset, uint32_t mem_mask);
+ void pcidcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidpa2_r(offs_t offset, uint32_t mem_mask);
+ void pcidpa2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidla2_r(offs_t offset, uint32_t mem_mask);
+ void pcidla2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidtc2_r(offs_t offset, uint32_t mem_mask);
+ void pcidtc2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidcr2_r(offs_t offset, uint32_t mem_mask);
+ void pcidcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidpa3_r(offs_t offset, uint32_t mem_mask);
+ void pcidpa3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidla3_r(offs_t offset, uint32_t mem_mask);
+ void pcidla3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidtc3_r(offs_t offset, uint32_t mem_mask);
+ void pcidtc3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcidcr3_r(offs_t offset, uint32_t mem_mask);
+ void pcidcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipar_r(offs_t offset, uint32_t mem_mask);
+ void pcipar_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcimbr_r(offs_t offset, uint32_t mem_mask);
+ void pcimbr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciiobr_r(offs_t offset, uint32_t mem_mask);
+ void pciiobr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipint_r(offs_t offset, uint32_t mem_mask);
+ void pcipint_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipintm_r(offs_t offset, uint32_t mem_mask);
+ void pcipintm_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciclkr_r(offs_t offset, uint32_t mem_mask);
+ void pciclkr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcibcr1_r(offs_t offset, uint32_t mem_mask);
+ void pcibcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcibcr2_r(offs_t offset, uint32_t mem_mask);
+ void pcibcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcibcr3_r(offs_t offset, uint32_t mem_mask);
+ void pcibcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciwcr1_r(offs_t offset, uint32_t mem_mask);
+ void pciwcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciwcr2_r(offs_t offset, uint32_t mem_mask);
+ void pciwcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pciwcr3_r(offs_t offset, uint32_t mem_mask);
+ void pciwcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcimcr_r(offs_t offset, uint32_t mem_mask);
+ void pcimcr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipctr_r(offs_t offset, uint32_t mem_mask);
+ void pcipctr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipdtr_r(offs_t offset, uint32_t mem_mask);
+ void pcipdtr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+ uint32_t pcipdr_r(offs_t offset, uint32_t mem_mask);
+ void pcipdr_w(offs_t offset, uint32_t data, uint32_t mem_mask);
+
+ TIMER_CALLBACK_MEMBER(sh4_rtc_timer_callback);
+ TIMER_CALLBACK_MEMBER(sh4_refresh_timer_callback);
+ void increment_rtc_time(int mode);
+ uint32_t compute_ticks_refresh_timer(emu_timer* timer, int hertz, int base, int divisor);
+ void sh4_refresh_timer_recompute();
virtual void LDTLB(const uint16_t opcode) override;
virtual uint32_t get_remap(uint32_t address) override;
virtual uint32_t sh4_getsqremap(uint32_t address) override;
- sh4_utlb m_utlb[64];
- void sh4_internal_map(address_map &map);
-protected:
- // construction/destruction
- sh4_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness);
+ emu_timer* m_rtc_timer;
+ emu_timer* m_refresh_timer;
+ uint32_t m_refresh_timer_base;
+ sh4_utlb m_utlb[64];
- virtual void device_start() override;
- virtual void device_reset() override;
+ // UBC
+ uint32_t m_bara;
+ uint8_t m_bamra;
+ uint16_t m_bbra;
+ uint32_t m_barb;
+ uint8_t m_bamrb;
+ uint16_t m_bbrb;
+ uint32_t m_bdrb;
+ uint32_t m_bdmrb;
+ uint16_t m_brcr;
+
+ // BSC
+ uint32_t m_bcr1;
+ uint16_t m_bcr2;
+ uint32_t m_wcr1;
+ uint32_t m_wcr2;
+ uint32_t m_wcr3;
+ uint32_t m_mcr;
+ uint16_t m_pcr;
+ uint16_t m_rtcsr;
+ uint16_t m_rtcnt;
+ uint16_t m_rtcor;
+ uint16_t m_rfcr;
+ uint32_t m_pctra;
+ uint16_t m_pdtra;
+ uint32_t m_pctrb;
+ uint16_t m_pdtrb;
+ uint16_t m_gpioic;
+
+ // BSC 7750R
+ uint32_t m_bcr3;
+ uint32_t m_bcr4;
+
+ // DMAC 7750R
+ uint32_t m_sar4;
+ uint32_t m_dar4;
+ uint32_t m_dmatcr4;
+ uint32_t m_chcr4;
+ uint32_t m_sar5;
+ uint32_t m_dar5;
+ uint32_t m_dmatcr5;
+ uint32_t m_chcr5;
+ uint32_t m_sar6;
+ uint32_t m_dar6;
+ uint32_t m_dmatcr6;
+ uint32_t m_chcr6;
+ uint32_t m_sar7;
+ uint32_t m_dar7;
+ uint32_t m_dmatcr7;
+ uint32_t m_chcr7;
+
+ // CPG
+ uint16_t m_frqcr;
+ uint8_t m_stbcr;
+ uint16_t m_wtcnt;
+ uint16_t m_wtcsr;
+ uint8_t m_stbcr2;
+
+ // CPG 7750R
+ uint32_t m_clkstp00;
+
+ // RTC
+ uint8_t m_r64cnt;
+ uint8_t m_rseccnt;
+ uint8_t m_rmincnt;
+ uint8_t m_rhrcnt;
+ uint8_t m_rwkcnt;
+ uint8_t m_rmoncnt;
+ uint8_t m_rdaycnt;
+ uint16_t m_ryrcnt;
+ uint8_t m_rsecar;
+ uint8_t m_rminar;
+ uint8_t m_rhrar;
+ uint8_t m_rwkar;
+ uint8_t m_rdayar;
+ uint8_t m_rmonar;
+ uint8_t m_rcr1;
+ uint8_t m_rcr2;
+
+ // RTC 7750R
+ uint8_t m_rcr3;
+ uint16_t m_ryrar;
+
+ // INTC
+ uint16_t m_iprb;
+
+ // INTC 7750S
+ uint16_t m_iprd;
+
+ // INTC 7750R
+ uint32_t m_intpri00;
+ uint32_t m_intreq00;
+ uint32_t m_intmsk00;
+
+ // TMU 7750R
+ uint8_t m_tstr2;
+ uint32_t m_tcor3;
+ uint32_t m_tcnt3;
+ uint16_t m_tcr3;
+ uint32_t m_tcor4;
+ uint32_t m_tcnt4;
+ uint16_t m_tcr4;
+
+ // SCI
+ uint8_t m_scsmr1;
+ uint8_t m_scbrr1;
+ uint8_t m_scscr1;
+ uint8_t m_sctdr1;
+ uint8_t m_scssr1;
+ uint8_t m_scrdr1;
+ uint8_t m_scscmr1;
+ uint8_t m_scsptr1;
+
+ // SCIF
+ uint16_t m_scsmr2;
+ uint8_t m_scbrr2;
+ uint16_t m_scscr2;
+ uint8_t m_scftdr2;
+ uint16_t m_scfsr2;
+ uint8_t m_scfrdr2;
+ uint16_t m_scfcr2;
+ uint16_t m_scfdr2;
+ uint16_t m_scsptr2;
+ uint16_t m_sclsr2;
+
+ // H-UDI
+ uint16_t m_sdir;
+ uint32_t m_sddr;
+ uint16_t m_sdint;
+
+ // PCI 7751
+ uint32_t m_pciconf0;
+ uint32_t m_pciconf1;
+ uint32_t m_pciconf2;
+ uint32_t m_pciconf3;
+ uint32_t m_pciconf4;
+ uint32_t m_pciconf5;
+ uint32_t m_pciconf6;
+ uint32_t m_pciconf7;
+ uint32_t m_pciconf8;
+ uint32_t m_pciconf9;
+ uint32_t m_pciconf10;
+ uint32_t m_pciconf11;
+ uint32_t m_pciconf12;
+ uint32_t m_pciconf13;
+ uint32_t m_pciconf14;
+ uint32_t m_pciconf15;
+ uint32_t m_pciconf16;
+ uint32_t m_pciconf17;
+ uint32_t m_pcicr;
+ uint32_t m_pcilsr0;
+ uint32_t m_pcilsr1;
+ uint32_t m_pcilar0;
+ uint32_t m_pcilar1;
+ uint32_t m_pciint;
+ uint32_t m_pciintm;
+ uint32_t m_pcialr;
+ uint32_t m_pciclr;
+ uint32_t m_pciaint;
+ uint32_t m_pciaintm;
+ uint32_t m_pcibllr;
+ uint32_t m_pcidmabt;
+ uint32_t m_pcidpa0;
+ uint32_t m_pcidla0;
+ uint32_t m_pcidtc0;
+ uint32_t m_pcidcr0;
+ uint32_t m_pcidpa1;
+ uint32_t m_pcidla1;
+ uint32_t m_pcidtc1;
+ uint32_t m_pcidcr1;
+ uint32_t m_pcidpa2;
+ uint32_t m_pcidla2;
+ uint32_t m_pcidtc2;
+ uint32_t m_pcidcr2;
+ uint32_t m_pcidpa3;
+ uint32_t m_pcidla3;
+ uint32_t m_pcidtc3;
+ uint32_t m_pcidcr3;
+ uint32_t m_pcipar;
+ uint32_t m_pcimbr;
+ uint32_t m_pciiobr;
+ uint32_t m_pcipint;
+ uint32_t m_pcipintm;
+ uint32_t m_pciclkr;
+ uint32_t m_pcibcr1;
+ uint32_t m_pcibcr2;
+ uint32_t m_pcibcr3;
+ uint32_t m_pciwcr1;
+ uint32_t m_pciwcr2;
+ uint32_t m_pciwcr3;
+ uint32_t m_pcimcr;
+ uint32_t m_pcipctr;
+ uint32_t m_pcipdtr;
+ uint32_t m_pcipdr;
};
class sh3_device : public sh3_base_device
{
- friend class sh4_frontend;
public:
- sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- std::unique_ptr<sh4_frontend> m_drcfe; /* pointer to the DRC front-end state */
- virtual const opcode_desc* get_desclist(offs_t pc) override;
- virtual void init_drc_frontend() override;
+ sh3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+ virtual void sh3_register_map(address_map& map) override ATTR_COLD;
};
+class sh7708s_device : public sh3_base_device
+{
+public:
+ sh7708s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+ virtual void sh3_register_map(address_map& map) override ATTR_COLD;
+};
-class sh3be_device : public sh3_base_device
+class sh7709_device : public sh3_base_device
{
- friend class sh4be_frontend;
+public:
+ sh7709_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+ virtual void sh3_register_map(address_map& map) override ATTR_COLD;
+};
+class sh7709s_device : public sh3_base_device
+{
public:
- sh3be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- std::unique_ptr<sh4be_frontend> m_drcfe; /* pointer to the DRC front-end state */
- virtual const opcode_desc* get_desclist(offs_t pc) override;
- virtual void init_drc_frontend() override;
+ sh7709s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
-protected:
- virtual void execute_run() override;
+ virtual void sh3_register_map(address_map& map) override ATTR_COLD;
};
class sh4_device : public sh4_base_device
{
- friend class sh4_frontend;
+public:
+ sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
+};
+class sh7091_device : public sh4_base_device
+{
public:
- sh4_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- std::unique_ptr<sh4_frontend> m_drcfe; /* pointer to the DRC front-end state */
- virtual const opcode_desc* get_desclist(offs_t pc) override;
- virtual void init_drc_frontend() override;
+ sh7091_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
+};
+
+class sh7750_device : public sh4_base_device
+{
+public:
+ sh7750_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
+};
+
+class sh7750s_device : public sh4_base_device
+{
+public:
+ sh7750s_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
};
+class sh7750r_device : public sh4_base_device
+{
+public:
+ sh7750r_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
+};
-class sh4be_device : public sh4_base_device
+class sh7751_device : public sh4_base_device
{
- friend class sh4be_frontend;
+public:
+ sh7751_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
+
+protected:
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
+};
+class sh7751r_device : public sh4_base_device
+{
public:
- sh4be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- std::unique_ptr<sh4be_frontend> m_drcfe; /* pointer to the DRC front-end state */
- virtual const opcode_desc* get_desclist(offs_t pc) override;
- virtual void init_drc_frontend() override;
+ sh7751r_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock, endianness_t endianness = ENDIANNESS_LITTLE);
protected:
- virtual void execute_run() override;
+ virtual void sh4_register_map(address_map& map) override ATTR_COLD;
};
class sh4_frontend : public sh_frontend
@@ -793,20 +1988,16 @@ private:
bool describe_op1111_0xf13(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode);
};
-class sh4be_frontend : public sh4_frontend
-{
-public:
- sh4be_frontend(sh_common_execution *device, uint32_t window_start, uint32_t window_end, uint32_t max_sequence) :
- sh4_frontend(device, window_start, window_end, max_sequence)
- {}
-protected:
- virtual uint16_t read_word(opcode_desc &desc) override;
-};
-
-DECLARE_DEVICE_TYPE(SH3LE, sh3_device)
-DECLARE_DEVICE_TYPE(SH3BE, sh3be_device)
-DECLARE_DEVICE_TYPE(SH4LE, sh4_device)
-DECLARE_DEVICE_TYPE(SH4BE, sh4be_device)
-
-
-#endif // MAME_CPU_SH4_SH4_H
+DECLARE_DEVICE_TYPE(SH3, sh3_device)
+DECLARE_DEVICE_TYPE(SH7708S, sh7708s_device)
+DECLARE_DEVICE_TYPE(SH7709, sh7709_device)
+DECLARE_DEVICE_TYPE(SH7709S, sh7709s_device)
+DECLARE_DEVICE_TYPE(SH4, sh4_device)
+DECLARE_DEVICE_TYPE(SH7091, sh7091_device)
+DECLARE_DEVICE_TYPE(SH7750, sh7750_device)
+DECLARE_DEVICE_TYPE(SH7750R, sh7750r_device)
+DECLARE_DEVICE_TYPE(SH7750S, sh7750s_device)
+DECLARE_DEVICE_TYPE(SH7751, sh7751_device)
+DECLARE_DEVICE_TYPE(SH7751R, sh7751r_device)
+
+#endif // MAME_CPU_SH_SH4_H
diff --git a/src/devices/cpu/sh/sh4comn.cpp b/src/devices/cpu/sh/sh4comn.cpp
index b8c59aa7ee5..313230b70a6 100644
--- a/src/devices/cpu/sh/sh4comn.cpp
+++ b/src/devices/cpu/sh/sh4comn.cpp
@@ -363,7 +363,7 @@ void sh34_base_device::sh4_exception_process(int exception, uint32_t vector)
//printf("stored m_spc %08x m_ssr %08x m_sgr %08x\n", m_spc, m_ssr, m_sgr);
m_sh2_state->sr |= MD;
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
sh4_syncronize_register_bank((m_sh2_state->sr & sRB) >> 29);
if (!(m_sh2_state->sr & sRB))
sh4_change_register_bank(1);
@@ -392,11 +392,11 @@ void sh34_base_device::sh4_exception(const char *message, int exception) // hand
if (exception == SH4_INTC_NMI)
{
- if ((m_sh2_state->sr & BL) && !(m_m[ICR] & 0x200))
+ if ((m_sh2_state->sr & BL) && !(m_icr & 0x200))
return;
- m_m[ICR] &= ~0x200;
- m_m[INTEVT] = 0x1c0;
+ m_icr &= ~0x200;
+ m_intevt = 0x1c0;
vector = 0x600;
standard_irq_callback(INPUT_LINE_NMI, m_sh2_state->pc);
@@ -404,13 +404,13 @@ void sh34_base_device::sh4_exception(const char *message, int exception) // hand
}
else
{
- // if ((m_m[ICR] & 0x4000) && (m_nmi_line_state == ASSERT_LINE))
+ // if ((m_icr & 0x4000) && (m_nmi_line_state == ASSERT_LINE))
// return;
if (m_sh2_state->sr & BL)
return;
if (((m_exception_priority[exception] >> 8) & 255) <= ((m_sh2_state->sr >> 4) & 15))
return;
- m_m[INTEVT] = exception_codes[exception];
+ m_intevt = exception_codes[exception];
vector = 0x600;
if (exception >= SH4_INTC_IRL0 && exception <= SH4_INTC_IRL3)
standard_irq_callback((exception - SH4_INTC_IRL0) + SH4_IRL0, m_sh2_state->pc);
@@ -446,12 +446,12 @@ void sh34_base_device::sh4_exception(const char *message, int exception) // hand
if (sh3_intevt2_exception_codes[exception] == -1)
fatalerror("sh3_intevt2_exception_codes unpopulated for exception %02x\n", exception);
- m_sh3internal_lower[INTEVT2] = sh3_intevt2_exception_codes[exception];
- m_sh3internal_upper[SH3_EXPEVT_ADDR] = exception_codes[exception];
+ m_intevt2 = sh3_intevt2_exception_codes[exception];
+ m_expevt = exception_codes[exception];
if (sh3_intevt2_exception_codes[exception] >= 0x600)
- m_sh3internal_upper[SH3_INTEVT_ADDR] = 0x3e0 - ((m_exception_priority[exception] >> 8) & 255) * 0x20;
+ m_intevt = 0x3e0 - ((m_exception_priority[exception] >> 8) & 255) * 0x20;
else
- m_sh3internal_upper[SH3_INTEVT_ADDR] = sh3_intevt2_exception_codes[exception];
+ m_intevt = sh3_intevt2_exception_codes[exception];
LOG("SH-3 '%s' interrupt exception #%d after [%s]\n", tag(), exception, message);
@@ -464,63 +464,54 @@ void sh34_base_device::sh4_exception(const char *message, int exception) // hand
}
-uint32_t sh34_base_device::compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor)
+uint32_t sh4_base_device::compute_ticks_refresh_timer(emu_timer *timer, int hertz, int base, int divisor)
{
// elapsed:total = x : ticks
- // x=elapsed*tics/total -> x=elapsed*(double)100000000/rtcnt_div[(m_m[RTCSR] >> 3) & 7]
- // ticks/total=ticks / ((rtcnt_div[(m_m[RTCSR] >> 3) & 7] * ticks) / 100000000)=1/((rtcnt_div[(m_m[RTCSR] >> 3) & 7] / 100000000)=100000000/rtcnt_div[(m_m[RTCSR] >> 3) & 7]
+ // x=elapsed*tics/total -> x=elapsed*(double)100000000/rtcnt_div[(m_rtcsr >> 3) & 7]
+ // ticks/total=ticks / ((rtcnt_div[(m_rtcsr >> 3) & 7] * ticks) / 100000000)=1/((rtcnt_div[(m_rtcsr >> 3) & 7] / 100000000)=100000000/rtcnt_div[(m_rtcsr >> 3) & 7]
return base + (uint32_t)((timer->elapsed().as_double() * hertz) / divisor);
}
-void sh34_base_device::sh4_refresh_timer_recompute()
+void sh4_base_device::sh4_refresh_timer_recompute()
{
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("sh4_refresh_timer_recompute uses m_m[] with SH3\n");
-
//if rtcnt < rtcor then rtcor-rtcnt
//if rtcnt >= rtcor then 256-rtcnt+rtcor=256+rtcor-rtcnt
- uint32_t ticks = m_m[RTCOR]-m_m[RTCNT];
+ uint32_t ticks = m_rtcor-m_rtcnt;
if (ticks <= 0)
ticks = 256 + ticks;
- m_refresh_timer->adjust(attotime::from_hz(m_bus_clock) * rtcnt_div[(m_m[RTCSR] >> 3) & 7] * ticks);
- m_refresh_timer_base = m_m[RTCNT];
+ m_refresh_timer->adjust(attotime::from_hz(m_bus_clock) * rtcnt_div[(m_rtcsr >> 3) & 7] * ticks);
+ m_refresh_timer_base = m_rtcnt;
}
-TIMER_CALLBACK_MEMBER(sh34_base_device::sh4_refresh_timer_callback)
+TIMER_CALLBACK_MEMBER(sh4_base_device::sh4_refresh_timer_callback)
{
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("sh4_refresh_timer_callback uses m_m[] with SH3\n");
-
- m_m[RTCNT] = 0;
+ m_rtcnt = 0;
sh4_refresh_timer_recompute();
- m_m[RTCSR] |= 128;
- if ((m_m[MCR] & 4) && !(m_m[MCR] & 2))
+ m_rtcsr |= 128;
+ if ((m_mcr & 4) && !(m_mcr & 2))
{
- m_m[RFCR] = (m_m[RFCR] + 1) & 1023;
- if (((m_m[RTCSR] & 1) && m_m[RFCR] == 512) || m_m[RFCR] == 0)
+ m_rfcr = (m_rfcr + 1) & 1023;
+ if (((m_rtcsr & 1) && m_rfcr == 512) || m_rfcr == 0)
{
- m_m[RFCR] = 0;
- m_m[RTCSR] |= 4;
+ m_rfcr = 0;
+ m_rtcsr |= 4;
}
}
}
-void sh34_base_device::increment_rtc_time(int mode)
+void sh4_base_device::increment_rtc_time(int mode)
{
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("increment_rtc_time uses m_m[] with SH3\n");
-
int carry;
if (mode == 0)
{
carry = 0;
- m_m[RSECCNT] = m_m[RSECCNT] + 1;
- if ((m_m[RSECCNT] & 0xf) == 0xa)
- m_m[RSECCNT] = m_m[RSECCNT] + 6;
- if (m_m[RSECCNT] == 0x60)
+ m_rseccnt = m_rseccnt + 1;
+ if ((m_rseccnt & 0xf) == 0xa)
+ m_rseccnt = m_rseccnt + 6;
+ if (m_rseccnt == 0x60)
{
- m_m[RSECCNT] = 0;
+ m_rseccnt = 0;
carry = 1;
}
else
@@ -529,36 +520,36 @@ void sh34_base_device::increment_rtc_time(int mode)
else
carry = 1;
- m_m[RMINCNT] = m_m[RMINCNT] + carry;
- if ((m_m[RMINCNT] & 0xf) == 0xa)
- m_m[RMINCNT] = m_m[RMINCNT] + 6;
+ m_rmincnt = m_rmincnt + carry;
+ if ((m_rmincnt & 0xf) == 0xa)
+ m_rmincnt = m_rmincnt + 6;
carry = 0;
- if (m_m[RMINCNT] == 0x60)
+ if (m_rmincnt == 0x60)
{
- m_m[RMINCNT] = 0;
+ m_rmincnt = 0;
carry = 1;
}
- m_m[RHRCNT] = m_m[RHRCNT] + carry;
- if ((m_m[RHRCNT] & 0xf) == 0xa)
- m_m[RHRCNT] = m_m[RHRCNT] + 6;
+ m_rhrcnt = m_rhrcnt + carry;
+ if ((m_rhrcnt & 0xf) == 0xa)
+ m_rhrcnt = m_rhrcnt + 6;
carry = 0;
- if (m_m[RHRCNT] == 0x24)
+ if (m_rhrcnt == 0x24)
{
- m_m[RHRCNT] = 0;
+ m_rhrcnt = 0;
carry = 1;
}
- m_m[RWKCNT] = m_m[RWKCNT] + carry;
- if (m_m[RWKCNT] == 0x7)
+ m_rwkcnt = m_rwkcnt + carry;
+ if (m_rwkcnt == 0x7)
{
- m_m[RWKCNT] = 0;
+ m_rwkcnt = 0;
}
int days = 0;
- int year = (m_m[RYRCNT] & 0xf) + ((m_m[RYRCNT] & 0xf0) >> 4) * 10 + ((m_m[RYRCNT] & 0xf00) >> 8) * 100 + ((m_m[RYRCNT] & 0xf000) >> 12) * 1000;
+ int year = (m_ryrcnt & 0xf) + ((m_ryrcnt & 0xf0) >> 4) * 10 + ((m_ryrcnt & 0xf00) >> 8) * 100 + ((m_ryrcnt & 0xf000) >> 12) * 1000;
int leap = 0;
if (!(year % 100))
{
@@ -567,58 +558,52 @@ void sh34_base_device::increment_rtc_time(int mode)
}
else if (!(year % 4))
leap = 1;
- if (m_m[RMONCNT] != 2)
+ if (m_rmoncnt != 2)
leap = 0;
- if (m_m[RMONCNT])
- days = daysmonth[(m_m[RMONCNT] & 0xf) + ((m_m[RMONCNT] & 0xf0) >> 4) * 10 - 1];
+ if (m_rmoncnt)
+ days = daysmonth[(m_rmoncnt & 0xf) + ((m_rmoncnt & 0xf0) >> 4) * 10 - 1];
- m_m[RDAYCNT] = m_m[RDAYCNT] + carry;
- if ((m_m[RDAYCNT] & 0xf) == 0xa)
- m_m[RDAYCNT] = m_m[RDAYCNT] + 6;
+ m_rdaycnt = m_rdaycnt + carry;
+ if ((m_rdaycnt & 0xf) == 0xa)
+ m_rdaycnt = m_rdaycnt + 6;
carry = 0;
- if (m_m[RDAYCNT] > (days + leap))
+ if (m_rdaycnt > (days + leap))
{
- m_m[RDAYCNT] = 1;
+ m_rdaycnt = 1;
carry = 1;
}
- m_m[RMONCNT] = m_m[RMONCNT] + carry;
- if ((m_m[RMONCNT] & 0xf) == 0xa)
- m_m[RMONCNT] = m_m[RMONCNT] + 6;
+ m_rmoncnt = m_rmoncnt + carry;
+ if ((m_rmoncnt & 0xf) == 0xa)
+ m_rmoncnt = m_rmoncnt + 6;
carry = 0;
- if (m_m[RMONCNT] == 0x13)
+ if (m_rmoncnt == 0x13)
{
- m_m[RMONCNT] = 1;
+ m_rmoncnt = 1;
carry = 1;
}
- m_m[RYRCNT] = m_m[RYRCNT] + carry;
- if ((m_m[RYRCNT] & 0xf) >= 0xa)
- m_m[RYRCNT] = m_m[RYRCNT] + 6;
- if ((m_m[RYRCNT] & 0xf0) >= 0xa0)
- m_m[RYRCNT] = m_m[RYRCNT] + 0x60;
- if ((m_m[RYRCNT] & 0xf00) >= 0xa00)
- m_m[RYRCNT] = m_m[RYRCNT] + 0x600;
- if ((m_m[RYRCNT] & 0xf000) >= 0xa000)
- m_m[RYRCNT] = 0;
+ m_ryrcnt = m_ryrcnt + carry;
+ if ((m_ryrcnt & 0xf) >= 0xa)
+ m_ryrcnt = m_ryrcnt + 6;
+ if ((m_ryrcnt & 0xf0) >= 0xa0)
+ m_ryrcnt = m_ryrcnt + 0x60;
+ if ((m_ryrcnt & 0xf00) >= 0xa00)
+ m_ryrcnt = m_ryrcnt + 0x600;
+ if ((m_ryrcnt & 0xf000) >= 0xa000)
+ m_ryrcnt = 0;
}
-TIMER_CALLBACK_MEMBER(sh34_base_device::sh4_rtc_timer_callback)
+TIMER_CALLBACK_MEMBER(sh4_base_device::sh4_rtc_timer_callback)
{
- if (m_cpu_type != CPU_TYPE_SH4)
- {
- logerror("sh4_rtc_timer_callback uses m_m[] with SH3\n");
- return;
- }
-
m_rtc_timer->adjust(attotime::from_hz(128));
- m_m[R64CNT] = (m_m[R64CNT] + 1) & 0x7f;
- if (m_m[R64CNT] == 64)
+ m_r64cnt = (m_r64cnt + 1) & 0x7f;
+ if (m_r64cnt == 64)
{
- m_m[RCR1] |= 0x80;
+ m_rcr1 |= 0x80;
increment_rtc_time(0);
//sh4_exception_request(SH4_INTC_NMI); // TEST
}
@@ -629,7 +614,7 @@ void sh34_base_device::sh4_dmac_nmi() // manage dma when nmi gets asserted
{
int s;
- m_SH4_DMAOR |= DMAOR_NMIF;
+ m_dmaor |= DMAOR_NMIF;
for (s = 0;s < 4;s++)
{
if (m_dma_timer_active[s])
@@ -641,85 +626,71 @@ void sh34_base_device::sh4_dmac_nmi() // manage dma when nmi gets asserted
}
}
-void sh34_base_device::sh4_handler_ipra_w(uint32_t data, uint32_t mem_mask)
+// CCN
+uint32_t sh4_base_device::pteh_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_IPRA);
- /* 15 - 12 TMU0 */
- /* 11 - 8 TMU1 */
- /* 7 - 4 TMU2 */
- /* 3 - 0 RTC */
- m_exception_priority[SH4_INTC_ATI] = INTPRI(m_SH4_IPRA & 0x000f, SH4_INTC_ATI);
- m_exception_priority[SH4_INTC_PRI] = INTPRI(m_SH4_IPRA & 0x000f, SH4_INTC_PRI);
- m_exception_priority[SH4_INTC_CUI] = INTPRI(m_SH4_IPRA & 0x000f, SH4_INTC_CUI);
-
- m_exception_priority[SH4_INTC_TUNI2] = INTPRI((m_SH4_IPRA & 0x00f0) >> 4, SH4_INTC_TUNI2);
- m_exception_priority[SH4_INTC_TICPI2] = INTPRI((m_SH4_IPRA & 0x00f0) >> 4, SH4_INTC_TICPI2);
+ return m_pteh;
+}
- m_exception_priority[SH4_INTC_TUNI1] = INTPRI((m_SH4_IPRA & 0x0f00) >> 8, SH4_INTC_TUNI1);
+void sh4_base_device::pteh_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ // for use with LDTLB opcode
+ /*
+ NNNN NNNN NNNN NNNN NNNN NN-- AAAA AAAA
- m_exception_priority[SH4_INTC_TUNI0] = INTPRI((m_SH4_IPRA & 0xf000) >> 12, SH4_INTC_TUNI0);
+ N = VPM = Virtual Page Number
+ A = ASID = Address Space Identifier
- logerror("setting priorities TMU0 %01x TMU1 %01x TMU2 %01x RTC %01x\n", (m_SH4_IPRA & 0xf000)>>12, (m_SH4_IPRA & 0x0f00)>>8, (m_SH4_IPRA & 0x00f0)>>4, (m_SH4_IPRA & 0x000f)>>0);
+ same as the address table part of the utlb but with 2 unused bits (these are sourced from PTEL instead when LDTLB is called)
+ */
+ COMBINE_DATA(&m_pteh);
+}
- sh4_exception_recompute();
+uint32_t sh4_base_device::ptel_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_ptel;
}
+void sh4_base_device::ptel_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ /*
+ ---P PPPP PPPP PPPP PPPP PP-V zRRz CDHW
-void sh4_base_device::sh4_internal_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+ same format as data array 1 of the utlb
+ */
+ COMBINE_DATA(&m_ptel);
+}
+
+uint32_t sh4_base_device::ttb_r(offs_t offset, uint32_t mem_mask)
{
- uint32_t addr = (offset << 2) + 0xfe000000;
- offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
+ return m_ttb;
+}
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("sh4_internal_w uses m_m[] with SH3\n");
+void sh4_base_device::ttb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ttb);
+ logerror("TTB set to %08x\n", m_ttb);
+}
- uint32_t old = m_m[offset];
- COMBINE_DATA(m_m + offset);
+uint32_t sh4_base_device::tea_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tea;
+}
-// printf("sh4_internal_w: Write %08x (%x), %08x @ %08x\n", 0xfe000000 + ((offset & 0x3fc0) << 11) + ((offset & 0x3f) << 2), offset, data, mem_mask);
+void sh4_base_device::tea_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tea);
+ logerror("TEA set to %08x\n", m_tea);
+}
- switch (offset)
- {
- case PTEH: // for use with LDTLB opcode
- m_m[PTEH] &= 0xffffffff;
- /*
- NNNN NNNN NNNN NNNN NNNN NN-- AAAA AAAA
-
- N = VPM = Virtual Page Number
- A = ASID = Address Space Identifier
-
- same as the address table part of the utlb but with 2 unused bits (these are sourced from PTEL instead when LDTLB is called)
- */
- break;
-
- case PTEL:
- m_m[PTEL] &= 0xffffffff;
- /*
- ---P PPPP PPPP PPPP PPPP PP-V zRRz CDHW
-
- same format as data array 1 of the utlb
- */
- break;
-
- case PTEA:
- m_m[PTEA] &= 0xffffffff;
- /*
- ---- ---- ---- ---- ---- ---- ---- TSSS
-
- same format as data array 2 of the utlb
- */
- break;
-
- case TTB:
- m_m[TTB] &= 0xffffffff;
- logerror("TTB set to %08x\n", data);
- break;
-
- case TEA:
- m_m[TEA] &= 0xffffffff;
- logerror("TEA set to %08x\n", data);
- break;
+uint32_t sh4_base_device::mmucr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_mmucr;
+}
+void sh4_base_device::mmucr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ // MMU Control
/*
LLLL LL-- BBBB BB-- CCCC CCQV ---- -T-A
@@ -731,336 +702,2054 @@ void sh4_base_device::sh4_internal_w(offs_t offset, uint32_t data, uint32_t mem_
T = TI = TLB invalidate
A = AT = Address translation bit (enable)
*/
- case MMUCR: // MMU Control
- m_m[MMUCR] &= 0xffffffff;
- // MMUCR_AT
- m_sh4_mmu_enabled = BIT(data, 0);
- logerror("%s: MMUCR %08x (enable: %d)\n", machine().describe_context(), data, m_sh4_mmu_enabled);
+ COMBINE_DATA(&m_mmucr);
+ // MMUCR_AT
+ m_sh4_mmu_enabled = BIT(data, 0);
+ logerror("%s: MMUCR %08x (enable: %d)\n", machine().describe_context(), data, m_sh4_mmu_enabled);
- if (m_sh4_mmu_enabled)
- {
- // Newer versions of the Dreamcast Katana SDK use MMU to remap the SQ write-back space (cfr. ikaruga and several later NAOMI GD-ROM releases)
- // Anything beyond that is bound to fail,
- // i.e. DC WinCE games, DC Linux distros, v2 Sega checkers, aristmk6.cpp
+ if (m_sh4_mmu_enabled)
+ {
+ // Newer versions of the Dreamcast Katana SDK use MMU to remap the SQ write-back space (cfr. ikaruga and several later NAOMI GD-ROM releases)
+ // Anything beyond that is bound to fail,
+ // i.e. DC WinCE games, DC Linux distros, v2 Sega checkers, aristmk6.cpp
#if 0
- if (m_mmuhack == 1)
- {
- printf("SH4 MMU Enabled\n");
- printf("If you're seeing this, but running something other than a Naomi GD-ROM game then chances are it won't work\n");
- printf("The MMU emulation is a hack specific to that system\n");
- }
+ if (m_mmuhack == 1)
+ {
+ printf("SH4 MMU Enabled\n");
+ printf("If you're seeing this, but running something other than a Naomi GD-ROM game then chances are it won't work\n");
+ printf("The MMU emulation is a hack specific to that system\n");
+ }
#endif
- if (m_mmuhack == 2)
+ if (m_mmuhack == 2)
+ {
+ for (int i = 0; i < 64; i++)
{
- for (int i = 0; i < 64; i++)
+ if (m_utlb[i].V)
{
- if (m_utlb[i].V)
- {
- // FIXME: potentially verbose, move to logmacro.h pattern
- // cfr. MMU Check_4 in v2.xx DC CHECKER
- logerror("(entry %02x | ASID: %02x VPN: %08x V: %02x PPN: %08x SZ: %02x SH: %02x C: %02x PPR: %02x D: %02x WT %02x: SA: %02x TC: %02x)\n",
- i,
- m_utlb[i].ASID,
- m_utlb[i].VPN << 10,
- m_utlb[i].V,
- m_utlb[i].PPN << 10,
- m_utlb[i].PSZ,
- m_utlb[i].SH,
- m_utlb[i].C,
- m_utlb[i].PPR,
- m_utlb[i].D,
- m_utlb[i].WT,
- m_utlb[i].SA,
- m_utlb[i].TC);
- }
+ // FIXME: potentially verbose, move to logmacro.h pattern
+ // cfr. MMU Check_4 in v2.xx DC CHECKER
+ logerror("(entry %02x | ASID: %02x VPN: %08x V: %02x PPN: %08x SZ: %02x SH: %02x C: %02x PPR: %02x D: %02x WT %02x: SA: %02x TC: %02x)\n",
+ i,
+ m_utlb[i].ASID,
+ m_utlb[i].VPN << 10,
+ m_utlb[i].V,
+ m_utlb[i].PPN << 10,
+ m_utlb[i].PSZ,
+ m_utlb[i].SH,
+ m_utlb[i].C,
+ m_utlb[i].PPR,
+ m_utlb[i].D,
+ m_utlb[i].WT,
+ m_utlb[i].SA,
+ m_utlb[i].TC);
}
}
}
- break;
+ }
+}
+
+uint8_t sh4_base_device::basra_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_basra;
+}
+
+void sh4_base_device::basra_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_basra);
+ logerror("basra_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::basrb_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_basrb;
+}
+
+void sh4_base_device::basrb_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_basrb);
+ logerror("basrb_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::ccr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_ccr;
+}
+
+void sh4_base_device::ccr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_ccr);
+ logerror("ccr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::tra_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tra;
+}
+
+void sh4_base_device::tra_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tra);
+ logerror("tra_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::expevt_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_expevt;
+}
+
+void sh4_base_device::expevt_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_expevt);
+ logerror("expevt: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::intevt_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_intevt;
+}
+
+void sh4_base_device::intevt_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intevt);
+ logerror("intevt_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::ptea_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_ptea;
+}
+
+void sh4_base_device::ptea_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ /*
+ ---- ---- ---- ---- ---- ---- ---- TSSS
+
+ same format as data array 2 of the utlb
+ */
+ COMBINE_DATA(&m_ptea);
+}
+
+uint32_t sh4_base_device::qacr0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_qacr0;
+}
+
+void sh4_base_device::qacr0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_qacr0);
+}
+
+uint32_t sh4_base_device::qacr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_qacr1;
+}
+
+void sh4_base_device::qacr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_qacr1);
+}
+
+// UBC
+uint32_t sh4_base_device::bara_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_bara;
+}
+
+void sh4_base_device::bara_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bara);
+ logerror("bara_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::bamra_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_bamra;
+}
+
+void sh4_base_device::bamra_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_bamra);
+ logerror("bamra_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::bbra_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_bbra;
+}
+
+void sh4_base_device::bbra_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bbra);
+ logerror("bbra_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::barb_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_barb;
+}
+
+void sh4_base_device::barb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_barb);
+ logerror("barb_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::bamrb_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_bamrb;
+}
+
+void sh4_base_device::bamrb_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_bamrb);
+ logerror("bamrb_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::bbrb_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_bbrb;
+}
+
+void sh4_base_device::bbrb_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bbrb);
+ logerror("bbrb_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::bdrb_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_bdrb;
+}
+void sh4_base_device::bdrb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bdrb);
+ logerror("bdrb_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::bdmrb_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_bdmrb;
+}
+
+void sh4_base_device::bdmrb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bdmrb);
+ logerror("bdmrb_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::brcr_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_brcr;
+}
+
+void sh4_base_device::brcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_brcr);
+ logerror("brcr_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// BSC
+uint32_t sh4_base_device::bcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_bcr1;
+}
+
+void sh4_base_device::bcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr1);
+ logerror("bcr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::bcr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_bcr2;
+}
+
+void sh4_base_device::bcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr2);
+ logerror("bcr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::wcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_wcr1;
+}
+
+void sh4_base_device::wcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_wcr1);
+ logerror("wcr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::wcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_wcr2;
+}
+
+void sh4_base_device::wcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_wcr2);
+ logerror("wcr2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::wcr3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_wcr3;
+}
+
+void sh4_base_device::wcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_wcr3);
+ logerror("wcr3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::mcr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_mcr;
+}
+
+void sh4_base_device::mcr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_mcr);
+ logerror("mcr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::pcr_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_pcr;
+}
+
+void sh4_base_device::pcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pcr);
+ logerror("pcr_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::rtcsr_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_rtcsr;
+}
+
+void sh4_base_device::rtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
// Memory refresh
- case RTCSR:
- m_m[RTCSR] &= 255;
- if ((old >> 3) & 7)
- m_m[RTCNT] = compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(old >> 3) & 7]) & 0xff;
- if ((m_m[RTCSR] >> 3) & 7)
- { // activated
- sh4_refresh_timer_recompute();
- }
- else
- {
- m_refresh_timer->adjust(attotime::never);
- }
- break;
+ uint16_t old = m_rtcsr;
+ COMBINE_DATA(&m_rtcsr);
+ m_rtcsr &= 255;
+ if ((old >> 3) & 7)
+ m_rtcnt = compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(old >> 3) & 7]) & 0xff;
+ if ((m_rtcsr >> 3) & 7)
+ { // activated
+ sh4_refresh_timer_recompute();
+ }
+ else
+ {
+ m_refresh_timer->adjust(attotime::never);
+ }
+}
- case RTCNT:
- m_m[RTCNT] &= 255;
- if ((m_m[RTCSR] >> 3) & 7)
- { // active
- sh4_refresh_timer_recompute();
- }
- break;
-
- case RTCOR:
- m_m[RTCOR] &= 255;
- if ((m_m[RTCSR] >> 3) & 7)
- { // active
- m_m[RTCNT] = compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(m_m[RTCSR] >> 3) & 7]) & 0xff;
- sh4_refresh_timer_recompute();
- }
- break;
+uint16_t sh4_base_device::rtcnt_r(offs_t offset, uint16_t mem_mask)
+{
+ if ((m_rtcsr >> 3) & 7)
+ { // activated
+ //((double)rtcnt_div[(m_rtcsr >> 3) & 7] / (double)100000000)
+ //return (refresh_timer_base + (m_refresh_timer->elapsed() * (double)100000000) / (double)rtcnt_div[(m_rtcsr >> 3) & 7]) & 0xff;
+ return compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(m_rtcsr >> 3) & 7]) & 0xff;
+ }
+ else
+ return m_rtcnt;
+}
- case RFCR:
- m_m[RFCR] &= 1023;
- break;
+void sh4_base_device::rtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rtcnt);
+ m_rtcnt &= 255;
+ if ((m_rtcsr >> 3) & 7)
+ { // active
+ sh4_refresh_timer_recompute();
+ }
+}
- // RTC
- case RCR1:
- if ((m_m[RCR1] & 8) && (~old & 8)) // 0 -> 1
- m_m[RCR1] ^= 1;
- break;
+uint16_t sh4_base_device::rtcor_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_rtcor;
+}
- case RCR2:
- if (m_m[RCR2] & 2)
- {
- m_m[R64CNT] = 0;
- m_m[RCR2] ^= 2;
- }
- if (m_m[RCR2] & 4)
- {
- m_m[R64CNT] = 0;
- if (m_m[RSECCNT] >= 30)
- increment_rtc_time(1);
- m_m[RSECCNT] = 0;
- }
- if ((m_m[RCR2] & 8) && (~old & 8))
- { // 0 -> 1
- m_rtc_timer->adjust(attotime::from_hz(128));
- }
- else if (~m_m[RCR2] & 8)
- { // 0
- m_rtc_timer->adjust(attotime::never);
- }
- break;
-
-/*********************************************************************************************************************
- TMU (Timer Unit)
-*********************************************************************************************************************/
- case SH4_TSTR_ADDR: sh4_handle_tstr_addr_w(data, mem_mask); break;
- case SH4_TCR0_ADDR: sh4_handle_tcr0_addr_w(data, mem_mask); break;
- case SH4_TCR1_ADDR: sh4_handle_tcr1_addr_w(data, mem_mask); break;
- case SH4_TCR2_ADDR: sh4_handle_tcr2_addr_w(data, mem_mask); break;
- case SH4_TCOR0_ADDR: sh4_handle_tcor0_addr_w(data, mem_mask); break;
- case SH4_TCNT0_ADDR: sh4_handle_tcnt0_addr_w(data, mem_mask); break;
- case SH4_TCOR1_ADDR: sh4_handle_tcor1_addr_w(data, mem_mask); break;
- case SH4_TCNT1_ADDR: sh4_handle_tcnt1_addr_w(data, mem_mask); break;
- case SH4_TCOR2_ADDR: sh4_handle_tcor2_addr_w(data, mem_mask); break;
- case SH4_TCNT2_ADDR: sh4_handle_tcnt2_addr_w(data, mem_mask); break;
- case SH4_TOCR_ADDR: sh4_handle_tocr_addr_w(data, mem_mask); break; // not supported
- case SH4_TCPR2_ADDR: sh4_handle_tcpr2_addr_w(data, mem_mask); break; // not supported
-/*********************************************************************************************************************
- INTC (Interrupt Controller)
-*********************************************************************************************************************/
- case ICR:
- m_m[ICR] = (m_m[ICR] & 0x7fff) | (old & 0x8000);
- break;
- case IPRA: sh4_handler_ipra_w(data, mem_mask); break;
- case IPRB:
- m_exception_priority[SH4_INTC_SCI1ERI] = INTPRI((m_m[IPRB] & 0x00f0) >> 4, SH4_INTC_SCI1ERI);
- m_exception_priority[SH4_INTC_SCI1RXI] = INTPRI((m_m[IPRB] & 0x00f0) >> 4, SH4_INTC_SCI1RXI);
- m_exception_priority[SH4_INTC_SCI1TXI] = INTPRI((m_m[IPRB] & 0x00f0) >> 4, SH4_INTC_SCI1TXI);
- m_exception_priority[SH4_INTC_SCI1TEI] = INTPRI((m_m[IPRB] & 0x00f0) >> 4, SH4_INTC_SCI1TEI);
- m_exception_priority[SH4_INTC_RCMI] = INTPRI((m_m[IPRB] & 0x0f00) >> 8, SH4_INTC_RCMI);
- m_exception_priority[SH4_INTC_ROVI] = INTPRI((m_m[IPRB] & 0x0f00) >> 8, SH4_INTC_ROVI);
- m_exception_priority[SH4_INTC_ITI] = INTPRI((m_m[IPRB] & 0xf000) >> 12, SH4_INTC_ITI);
- sh4_exception_recompute();
- break;
- case IPRC:
- m_exception_priority[SH4_INTC_HUDI] = INTPRI(m_m[IPRC] & 0x000f, SH4_INTC_HUDI);
- m_exception_priority[SH4_INTC_SCIFERI] = INTPRI((m_m[IPRC] & 0x00f0) >> 4, SH4_INTC_SCIFERI);
- m_exception_priority[SH4_INTC_SCIFRXI] = INTPRI((m_m[IPRC] & 0x00f0) >> 4, SH4_INTC_SCIFRXI);
- m_exception_priority[SH4_INTC_SCIFBRI] = INTPRI((m_m[IPRC] & 0x00f0) >> 4, SH4_INTC_SCIFBRI);
- m_exception_priority[SH4_INTC_SCIFTXI] = INTPRI((m_m[IPRC] & 0x00f0) >> 4, SH4_INTC_SCIFTXI);
- m_exception_priority[SH4_INTC_DMTE0] = INTPRI((m_m[IPRC] & 0x0f00) >> 8, SH4_INTC_DMTE0);
- m_exception_priority[SH4_INTC_DMTE1] = INTPRI((m_m[IPRC] & 0x0f00) >> 8, SH4_INTC_DMTE1);
- m_exception_priority[SH4_INTC_DMTE2] = INTPRI((m_m[IPRC] & 0x0f00) >> 8, SH4_INTC_DMTE2);
- m_exception_priority[SH4_INTC_DMTE3] = INTPRI((m_m[IPRC] & 0x0f00) >> 8, SH4_INTC_DMTE3);
- m_exception_priority[SH4_INTC_DMAE] = INTPRI((m_m[IPRC] & 0x0f00) >> 8, SH4_INTC_DMAE);
- m_exception_priority[SH4_INTC_GPOI] = INTPRI((m_m[IPRC] & 0xf000) >> 12, SH4_INTC_GPOI);
- sh4_exception_recompute();
- break;
-/*********************************************************************************************************************
- DMAC (DMA Controller)
-*********************************************************************************************************************/
- case SH4_SAR0_ADDR: sh4_handle_sar0_addr_w(data, mem_mask); break;
- case SH4_SAR1_ADDR: sh4_handle_sar1_addr_w(data, mem_mask); break;
- case SH4_SAR2_ADDR: sh4_handle_sar2_addr_w(data, mem_mask); break;
- case SH4_SAR3_ADDR: sh4_handle_sar3_addr_w(data, mem_mask); break;
- case SH4_DAR0_ADDR: sh4_handle_dar0_addr_w(data, mem_mask); break;
- case SH4_DAR1_ADDR: sh4_handle_dar1_addr_w(data, mem_mask); break;
- case SH4_DAR2_ADDR: sh4_handle_dar2_addr_w(data, mem_mask); break;
- case SH4_DAR3_ADDR: sh4_handle_dar3_addr_w(data, mem_mask); break;
- case SH4_DMATCR0_ADDR: sh4_handle_dmatcr0_addr_w(data, mem_mask); break;
- case SH4_DMATCR1_ADDR: sh4_handle_dmatcr1_addr_w(data, mem_mask); break;
- case SH4_DMATCR2_ADDR: sh4_handle_dmatcr2_addr_w(data, mem_mask); break;
- case SH4_DMATCR3_ADDR: sh4_handle_dmatcr3_addr_w(data, mem_mask); break;
- case SH4_CHCR0_ADDR: sh4_handle_chcr0_addr_w(data, mem_mask); break;
- case SH4_CHCR1_ADDR: sh4_handle_chcr1_addr_w(data, mem_mask); break;
- case SH4_CHCR2_ADDR: sh4_handle_chcr2_addr_w(data, mem_mask); break;
- case SH4_CHCR3_ADDR: sh4_handle_chcr3_addr_w(data, mem_mask); break;
- case SH4_DMAOR_ADDR: sh4_handle_dmaor_addr_w(data, mem_mask); break;
-/*********************************************************************************************************************
- Store Queues
-*********************************************************************************************************************/
- case QACR0:
- case QACR1:
- break;
-/*********************************************************************************************************************
- I/O
-*********************************************************************************************************************/
- case PCTRA:
- m_ioport16_pullup = 0;
- m_ioport16_direction = 0;
- for (int a = 0; a < 16; a++)
- {
- m_ioport16_direction |= (m_m[PCTRA] & (1 << (a * 2))) >> a;
- m_ioport16_pullup |= (m_m[PCTRA] & (1 << (a * 2 + 1))) >> (a + 1);
- }
- m_ioport16_direction &= 0xffff;
- m_ioport16_pullup = (m_ioport16_pullup | m_ioport16_direction) ^ 0xffff;
- if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_m[PDTRA] & m_ioport16_direction) | ((uint64_t)m_m[PCTRA] << 16));
- break;
- case PDTRA:
- if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_m[PDTRA] & m_ioport16_direction) | ((uint64_t)m_m[PCTRA] << 16));
- break;
- case PCTRB:
- m_ioport4_pullup = 0;
- m_ioport4_direction = 0;
- for (int a = 0; a < 4; a++)
- {
- m_ioport4_direction |= (m_m[PCTRB] & (1 << (a * 2))) >> a;
- m_ioport4_pullup |= (m_m[PCTRB] & (1 << (a * 2 + 1))) >> (a + 1);
- }
- m_ioport4_direction &= 0xf;
- m_ioport4_pullup = (m_ioport4_pullup | m_ioport4_direction) ^ 0xf;
- if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_4, (m_m[PDTRB] & m_ioport4_direction) | (m_m[PCTRB] << 16));
- break;
- case PDTRB:
- if (m_m[BCR2] & 1)
- m_io->write_dword(SH4_IOPORT_4, (m_m[PDTRB] & m_ioport4_direction) | (m_m[PCTRB] << 16));
- break;
-
- case SCBRR2:
- break;
-
- case SCSPTR2: //trips often in aristocrat mk-6
- break;
-
- default:
- logerror("sh4_internal_w: Unmapped write %08x, %08x @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), data, mem_mask);
- break;
+void sh4_base_device::rtcor_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rtcor);
+ m_rtcor &= 255;
+ if ((m_rtcsr >> 3) & 7)
+ { // active
+ m_rtcnt = compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(m_rtcsr >> 3) & 7]) & 0xff;
+ sh4_refresh_timer_recompute();
}
}
-uint32_t sh4_base_device::sh4_internal_r(offs_t offset, uint32_t mem_mask)
+uint16_t sh4_base_device::rfcr_r(offs_t offset, uint16_t mem_mask)
{
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("sh4_internal_r uses m_m[] with SH3\n");
+ return m_rfcr;
+}
- uint32_t addr = (offset << 2) + 0xfe000000;
- offset = ((addr & 0xfc) >> 2) | ((addr & 0x1fe0000) >> 11);
+void sh4_base_device::rfcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_rfcr);
+ m_rfcr &= 1023;
+}
-// printf("sh4_internal_r: Read %08x (%x) @ %08x\n", 0xfe000000+((offset & 0x3fc0) << 11)+((offset & 0x3f) << 2), offset, mem_mask);
+uint32_t sh4_base_device::pctra_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pctra;
+}
- switch (offset)
+void sh4_base_device::pctra_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pctra);
+ m_ioport16_pullup = 0;
+ m_ioport16_direction = 0;
+ for (int a = 0; a < 16; a++)
{
- case VERSION:
- return PVR_SH7091; // 0x040205c1, this is what a real SH7091 in a Dreamcast returns - the later Naomi BIOSes check and care!
- case PRR:
- return 0;
- case IPRD:
- return 0x00000000; // SH7750 ignores writes here and always returns zero
- case RTCNT:
- if ((m_m[RTCSR] >> 3) & 7)
- { // activated
- //((double)rtcnt_div[(m_m[RTCSR] >> 3) & 7] / (double)100000000)
- //return (refresh_timer_base + (m_refresh_timer->elapsed() * (double)100000000) / (double)rtcnt_div[(m_m[RTCSR] >> 3) & 7]) & 0xff;
- return compute_ticks_refresh_timer(m_refresh_timer, m_bus_clock, m_refresh_timer_base, rtcnt_div[(m_m[RTCSR] >> 3) & 7]) & 0xff;
- }
- else
- return m_m[RTCNT];
-
-/*********************************************************************************************************************
- INTC (Interrupt Controller)
-*********************************************************************************************************************/
-
- case IPRA:
- return m_SH4_IPRA;
-
-/*********************************************************************************************************************
- TMU (Timer Unit)
-*********************************************************************************************************************/
- case SH4_TSTR_ADDR: return sh4_handle_tstr_addr_r(mem_mask);
- case SH4_TCR0_ADDR: return sh4_handle_tcr0_addr_r(mem_mask);
- case SH4_TCR1_ADDR: return sh4_handle_tcr1_addr_r(mem_mask);
- case SH4_TCR2_ADDR: return sh4_handle_tcr2_addr_r(mem_mask);
- case SH4_TCNT0_ADDR: return sh4_handle_tcnt0_addr_r(mem_mask);
- case SH4_TCNT1_ADDR: return sh4_handle_tcnt1_addr_r(mem_mask);
- case SH4_TCNT2_ADDR: return sh4_handle_tcnt2_addr_r(mem_mask);
- case SH4_TCOR0_ADDR: return sh4_handle_tcor0_addr_r(mem_mask);
- case SH4_TCOR1_ADDR: return sh4_handle_tcor1_addr_r(mem_mask);
- case SH4_TCOR2_ADDR: return sh4_handle_tcor2_addr_r(mem_mask);
- case SH4_TOCR_ADDR: return sh4_handle_tocr_addr_r(mem_mask); // not supported
- case SH4_TCPR2_ADDR: return sh4_handle_tcpr2_addr_r(mem_mask); // not supported
-/*********************************************************************************************************************
- DMAC (DMA Controller)
-*********************************************************************************************************************/
- case SH4_SAR0_ADDR: return sh4_handle_sar0_addr_r(mem_mask);
- case SH4_SAR1_ADDR: return sh4_handle_sar1_addr_r(mem_mask);
- case SH4_SAR2_ADDR: return sh4_handle_sar2_addr_r(mem_mask);
- case SH4_SAR3_ADDR: return sh4_handle_sar3_addr_r(mem_mask);
- case SH4_DAR0_ADDR: return sh4_handle_dar0_addr_r(mem_mask);
- case SH4_DAR1_ADDR: return sh4_handle_dar1_addr_r(mem_mask);
- case SH4_DAR2_ADDR: return sh4_handle_dar2_addr_r(mem_mask);
- case SH4_DAR3_ADDR: return sh4_handle_dar3_addr_r(mem_mask);
- case SH4_DMATCR0_ADDR: return sh4_handle_dmatcr0_addr_r(mem_mask);
- case SH4_DMATCR1_ADDR: return sh4_handle_dmatcr1_addr_r(mem_mask);
- case SH4_DMATCR2_ADDR: return sh4_handle_dmatcr2_addr_r(mem_mask);
- case SH4_DMATCR3_ADDR: return sh4_handle_dmatcr3_addr_r(mem_mask);
- case SH4_CHCR0_ADDR: return sh4_handle_chcr0_addr_r(mem_mask);
- case SH4_CHCR1_ADDR: return sh4_handle_chcr1_addr_r(mem_mask);
- case SH4_CHCR2_ADDR: return sh4_handle_chcr2_addr_r(mem_mask);
- case SH4_CHCR3_ADDR: return sh4_handle_chcr3_addr_r(mem_mask);
- case SH4_DMAOR_ADDR: return sh4_handle_dmaor_addr_r(mem_mask);
-/*********************************************************************************************************************
- I/O Ports
-*********************************************************************************************************************/
-
- case PDTRA:
- if (m_m[BCR2] & 1)
- return (m_io->read_dword(SH4_IOPORT_16) & ~m_ioport16_direction) | (m_m[PDTRA] & m_ioport16_direction);
- break;
- case PDTRB:
- if (m_m[BCR2] & 1)
- return (m_io->read_dword(SH4_IOPORT_4) & ~m_ioport4_direction) | (m_m[PDTRB] & m_ioport4_direction);
- break;
-
- // SCIF (UART with FIFO)
- case SCFSR2:
- return 0x60; //read-only status register
+ m_ioport16_direction |= (m_pctra & (1 << (a * 2))) >> a;
+ m_ioport16_pullup |= (m_pctra & (1 << (a * 2 + 1))) >> (a + 1);
}
- return m_m[offset];
+ m_ioport16_direction &= 0xffff;
+ m_ioport16_pullup = (m_ioport16_pullup | m_ioport16_direction) ^ 0xffff;
+ if (m_bcr2 & 1)
+ m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_pdtra & m_ioport16_direction) | ((uint64_t)m_pctra << 16));
}
-void sh34_base_device::set_frt_input(int state)
+uint16_t sh4_base_device::pdtra_r(offs_t offset, uint16_t mem_mask)
{
- if (m_cpu_type != CPU_TYPE_SH4)
- fatalerror("sh4_set_frt_input uses m_m[] with SH3\n");
+ if (m_bcr2 & 1)
+ return (m_io->read_dword(SH4_IOPORT_16) & ~m_ioport16_direction) | (m_pdtra & m_ioport16_direction);
+
+ return m_pdtra;
+}
+
+void sh4_base_device::pdtra_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pdtra);
+ if (m_bcr2 & 1)
+ m_io->write_dword(SH4_IOPORT_16, (uint64_t)(m_pdtra & m_ioport16_direction) | ((uint64_t)m_pctra << 16));
+}
+
+uint32_t sh4_base_device::pctrb_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pctrb;
+}
+
+void sh4_base_device::pctrb_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pctrb);
+ m_ioport4_pullup = 0;
+ m_ioport4_direction = 0;
+ for (int a = 0; a < 4; a++)
+ {
+ m_ioport4_direction |= (m_pctrb & (1 << (a * 2))) >> a;
+ m_ioport4_pullup |= (m_pctrb & (1 << (a * 2 + 1))) >> (a + 1);
+ }
+ m_ioport4_direction &= 0xf;
+ m_ioport4_pullup = (m_ioport4_pullup | m_ioport4_direction) ^ 0xf;
+ if (m_bcr2 & 1)
+ m_io->write_dword(SH4_IOPORT_4, (m_pdtrb & m_ioport4_direction) | (m_pctrb << 16));
+}
+
+uint16_t sh4_base_device::pdtrb_r(offs_t offset, uint16_t mem_mask)
+{
+ if (m_bcr2 & 1)
+ return (m_io->read_dword(SH4_IOPORT_4) & ~m_ioport4_direction) | (m_pdtrb & m_ioport4_direction);
+
+ return m_pdtrb;
+}
+
+void sh4_base_device::pdtrb_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_pdtrb);
+ if (m_bcr2 & 1)
+ m_io->write_dword(SH4_IOPORT_4, (m_pdtrb & m_ioport4_direction) | (m_pctrb << 16));
+}
+
+uint16_t sh4_base_device::gpioic_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_gpioic;
+}
+
+void sh4_base_device::gpioic_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_gpioic);
+ logerror("gpioic_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+void sh4_base_device::sdmr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ logerror("sdmr2_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+void sh4_base_device::sdmr3_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ logerror("sdmr3_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+// BSC 7750R
+uint16_t sh4_base_device::bcr3_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_bcr3;
+}
+
+void sh4_base_device::bcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr3);
+ logerror("bcr3_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::bcr4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_bcr4;
+}
+
+void sh4_base_device::bcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_bcr4);
+ logerror("bcr4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+// DMAC 7750R
+uint32_t sh4_base_device::sar4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar4;
+}
+
+void sh4_base_device::sar4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar4);
+ logerror("sar4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dar4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar4;
+}
+
+void sh4_base_device::dar4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar4);
+ logerror("dar4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dmatcr4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr4;
+}
+
+void sh4_base_device::dmatcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr4);
+ logerror("dmatcr4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::chcr4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr4;
+}
+
+void sh4_base_device::chcr4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_chcr4);
+ logerror("chcr4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::sar5_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar5;
+}
+
+void sh4_base_device::sar5_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar5);
+ logerror("sar5_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dar5_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar5;
+}
+
+void sh4_base_device::dar5_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar5);
+ logerror("dar5_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dmatcr5_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr5;
+}
+
+void sh4_base_device::dmatcr5_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr5);
+ logerror("dmatcr5_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::chcr5_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr5;
+}
+
+void sh4_base_device::chcr5_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_chcr5);
+ logerror("chcr5_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::sar6_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar6;
+}
+
+void sh4_base_device::sar6_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar6);
+ logerror("sar6_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dar6_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar6;
+}
+
+void sh4_base_device::dar6_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar6);
+ logerror("dar6_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dmatcr6_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr6;
+}
+
+void sh4_base_device::dmatcr6_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr6);
+ logerror("dmatcr6_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::chcr6_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr6;
+}
+
+void sh4_base_device::chcr6_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_chcr6);
+ logerror("chcr6_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::sar7_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar7;
+}
+
+void sh4_base_device::sar7_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar7);
+ logerror("sar7_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dar7_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar7;
+}
+
+void sh4_base_device::dar7_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar7);
+ logerror("dar7_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::dmatcr7_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr7;
+}
+
+void sh4_base_device::dmatcr7_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr7);
+ logerror("dmatcr7_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::chcr7_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr7;
+}
+
+void sh4_base_device::chcr7_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_chcr7);
+ logerror("chcr7_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+// CPG
+uint16_t sh4_base_device::frqcr_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_frqcr;
+}
+
+void sh4_base_device::frqcr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_frqcr);
+ logerror("frqcr_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::stbcr_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_stbcr;
+}
+
+void sh4_base_device::stbcr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_stbcr);
+ logerror("stbcr_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::wtcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_wtcnt;
+}
+
+void sh4_base_device::wtcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_wtcnt);
+ logerror("wtcnt_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::wtcsr_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_wtcsr;
+}
+
+void sh4_base_device::wtcsr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_wtcsr);
+ logerror("wtcsr_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::stbcr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_stbcr2;
+}
+
+void sh4_base_device::stbcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_stbcr2);
+ logerror("stbcr2_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+// CPG 7750R
+uint32_t sh4_base_device::clkstp00_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_clkstp00;
+}
+
+void sh4_base_device::clkstp00_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_clkstp00);
+ logerror("clkstp00_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+void sh4_base_device::clkstpclr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ logerror("clkstpclr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+// RTC
+uint8_t sh4_base_device::r64cnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_r64cnt;
+}
+
+uint8_t sh4_base_device::rseccnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rseccnt;
+}
+
+void sh4_base_device::rseccnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rseccnt);
+}
+
+uint8_t sh4_base_device::rmincnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rmincnt;
+}
+
+void sh4_base_device::rmincnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmincnt);
+}
+
+uint8_t sh4_base_device::rhrcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rhrcnt;
+}
+
+void sh4_base_device::rhrcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rhrcnt);
+}
+
+uint8_t sh4_base_device::rwkcnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rwkcnt;
+}
+
+void sh4_base_device::rwkcnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rwkcnt);
+}
+
+uint8_t sh4_base_device::rdaycnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rdaycnt;
+}
+
+void sh4_base_device::rdaycnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rdaycnt);
+}
+
+uint8_t sh4_base_device::rmoncnt_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rmoncnt;
+}
+
+void sh4_base_device::rmoncnt_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmoncnt);
+}
+
+uint16_t sh4_base_device::ryrcnt_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_ryrcnt;
+}
+
+void sh4_base_device::ryrcnt_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_ryrcnt);
+}
+
+uint8_t sh4_base_device::rsecar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rsecar;
+}
+
+void sh4_base_device::rsecar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rsecar);
+ logerror("rsecar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rminar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rminar;
+}
+
+void sh4_base_device::rminar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rminar);
+ logerror("rminar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rhrar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rhrar;
+}
+
+void sh4_base_device::rhrar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rhrar);
+ logerror("rhrar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rwkar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rwkar;
+}
+
+void sh4_base_device::rwkar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rwkar);
+ logerror("rwkar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rdayar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rdayar;
+}
+
+void sh4_base_device::rdayar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rdayar);
+ logerror("rdayar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rmonar_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rmonar;
+}
+
+void sh4_base_device::rmonar_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rmonar);
+ logerror("rmonar_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::rcr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rcr1;
+}
+
+void sh4_base_device::rcr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ uint8_t old = m_rcr1;
+ COMBINE_DATA(&m_rcr1);
+ if ((m_rcr1 & 8) && (~old & 8)) // 0 -> 1
+ m_rcr1 ^= 1;
+}
+
+uint8_t sh4_base_device::rcr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rcr2;
+}
+
+void sh4_base_device::rcr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ uint8_t old = m_rcr2;
+ COMBINE_DATA(&m_rcr2);
+ if (m_rcr2 & 2)
+ {
+ m_r64cnt = 0;
+ m_rcr2 ^= 2;
+ }
+ if (m_rcr2 & 4)
+ {
+ m_r64cnt = 0;
+ if (m_rseccnt >= 30)
+ increment_rtc_time(1);
+ m_rseccnt = 0;
+ }
+ if ((m_rcr2 & 8) && (~old & 8))
+ { // 0 -> 1
+ m_rtc_timer->adjust(attotime::from_hz(128));
+ }
+ else if (~m_rcr2 & 8)
+ { // 0
+ m_rtc_timer->adjust(attotime::never);
+ }
+}
+
+// RTC 7750R
+uint8_t sh4_base_device::rcr3_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_rcr3;
+}
+
+void sh4_base_device::rcr3_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_rcr3);
+ logerror("rcr3_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::ryrar_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_ryrar;
+}
+
+void sh4_base_device::ryrar_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_ryrar);
+ logerror("ryrar_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// INTC
+uint16_t sh4_base_device::icr_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_icr;
+}
+
+void sh4_base_device::icr_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint16_t old = m_icr;
+ COMBINE_DATA(&m_icr);
+ m_icr = (m_icr & 0x7fff) | (old & 0x8000);
+}
+
+uint16_t sh34_base_device::ipra_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_ipra;
+}
+
+void sh34_base_device::ipra_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_ipra);
+ /* 15 - 12 TMU0 */
+ /* 11 - 8 TMU1 */
+ /* 7 - 4 TMU2 */
+ /* 3 - 0 RTC */
+ m_exception_priority[SH4_INTC_ATI] = INTPRI(m_ipra & 0x000f, SH4_INTC_ATI);
+ m_exception_priority[SH4_INTC_PRI] = INTPRI(m_ipra & 0x000f, SH4_INTC_PRI);
+ m_exception_priority[SH4_INTC_CUI] = INTPRI(m_ipra & 0x000f, SH4_INTC_CUI);
+
+ m_exception_priority[SH4_INTC_TUNI2] = INTPRI((m_ipra & 0x00f0) >> 4, SH4_INTC_TUNI2);
+ m_exception_priority[SH4_INTC_TICPI2] = INTPRI((m_ipra & 0x00f0) >> 4, SH4_INTC_TICPI2);
+
+ m_exception_priority[SH4_INTC_TUNI1] = INTPRI((m_ipra & 0x0f00) >> 8, SH4_INTC_TUNI1);
+
+ m_exception_priority[SH4_INTC_TUNI0] = INTPRI((m_ipra & 0xf000) >> 12, SH4_INTC_TUNI0);
+
+ logerror("setting priorities TMU0 %01x TMU1 %01x TMU2 %01x RTC %01x\n", (m_ipra & 0xf000) >> 12, (m_ipra & 0x0f00) >> 8, (m_ipra & 0x00f0) >> 4, (m_ipra & 0x000f) >> 0);
+
+ sh4_exception_recompute();
+}
+
+uint16_t sh4_base_device::iprb_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_iprb;
+}
+
+void sh4_base_device::iprb_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprb);
+ m_exception_priority[SH4_INTC_SCI1ERI] = INTPRI((m_iprb & 0x00f0) >> 4, SH4_INTC_SCI1ERI);
+ m_exception_priority[SH4_INTC_SCI1RXI] = INTPRI((m_iprb & 0x00f0) >> 4, SH4_INTC_SCI1RXI);
+ m_exception_priority[SH4_INTC_SCI1TXI] = INTPRI((m_iprb & 0x00f0) >> 4, SH4_INTC_SCI1TXI);
+ m_exception_priority[SH4_INTC_SCI1TEI] = INTPRI((m_iprb & 0x00f0) >> 4, SH4_INTC_SCI1TEI);
+ m_exception_priority[SH4_INTC_RCMI] = INTPRI((m_iprb & 0x0f00) >> 8, SH4_INTC_RCMI);
+ m_exception_priority[SH4_INTC_ROVI] = INTPRI((m_iprb & 0x0f00) >> 8, SH4_INTC_ROVI);
+ m_exception_priority[SH4_INTC_ITI] = INTPRI((m_iprb & 0xf000) >> 12, SH4_INTC_ITI);
+ sh4_exception_recompute();
+}
+
+uint16_t sh4_base_device::iprc_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_iprc;
+}
+
+void sh4_base_device::iprc_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprc);
+ m_exception_priority[SH4_INTC_HUDI] = INTPRI(m_iprc & 0x000f, SH4_INTC_HUDI);
+ m_exception_priority[SH4_INTC_SCIFERI] = INTPRI((m_iprc & 0x00f0) >> 4, SH4_INTC_SCIFERI);
+ m_exception_priority[SH4_INTC_SCIFRXI] = INTPRI((m_iprc & 0x00f0) >> 4, SH4_INTC_SCIFRXI);
+ m_exception_priority[SH4_INTC_SCIFBRI] = INTPRI((m_iprc & 0x00f0) >> 4, SH4_INTC_SCIFBRI);
+ m_exception_priority[SH4_INTC_SCIFTXI] = INTPRI((m_iprc & 0x00f0) >> 4, SH4_INTC_SCIFTXI);
+ m_exception_priority[SH4_INTC_DMTE0] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_DMTE0);
+ m_exception_priority[SH4_INTC_DMTE1] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_DMTE1);
+ m_exception_priority[SH4_INTC_DMTE2] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_DMTE2);
+ m_exception_priority[SH4_INTC_DMTE3] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_DMTE3);
+ m_exception_priority[SH4_INTC_DMAE] = INTPRI((m_iprc & 0x0f00) >> 8, SH4_INTC_DMAE);
+ m_exception_priority[SH4_INTC_GPOI] = INTPRI((m_iprc & 0xf000) >> 12, SH4_INTC_GPOI);
+ sh4_exception_recompute();
+}
+
+// INTC 7750S
+uint16_t sh4_base_device::iprd_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_iprd;
+}
+
+void sh4_base_device::iprd_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_iprd);
+ logerror("iprd_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// INTC 7750R
+uint32_t sh4_base_device::intpri00_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_intpri00;
+}
+
+void sh4_base_device::intpri00_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intpri00);
+ logerror("intpri00_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::intreq00_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_intreq00;
+}
+
+void sh4_base_device::intreq00_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intreq00);
+ logerror("intreq00_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::intmsk00_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_intmsk00;
+}
+
+void sh4_base_device::intmsk00_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_intmsk00);
+ logerror("intmsk00_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+void sh4_base_device::intmskclr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ logerror("intmskclr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+// TMU 7750R
+uint8_t sh4_base_device::tstr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_tstr2;
+}
+
+void sh4_base_device::tstr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_tstr2);
+ logerror("tstr2_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::tcor3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tcor3;
+}
+
+void sh4_base_device::tcor3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcor3);
+ logerror("tcor3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::tcnt3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tcnt3;
+}
+
+void sh4_base_device::tcnt3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcnt3);
+ logerror("tcnt3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::tcr3_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_tcr3;
+}
+
+void sh4_base_device::tcr3_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_tcr3);
+ logerror("tcr3_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::tcor4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tcor4;
+}
+
+void sh4_base_device::tcor4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcor4);
+ logerror("tcor4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+uint32_t sh4_base_device::tcnt4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tcnt4;
+}
+
+void sh4_base_device::tcnt4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcnt4);
+ logerror("tcnt4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::tcr4_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_tcr4;
+}
+
+void sh4_base_device::tcr4_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_tcr4);
+ logerror("tcr4_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// SCI
+uint8_t sh4_base_device::scsmr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scsmr1;
+}
+
+void sh4_base_device::scsmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsmr1);
+ logerror("scsmr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scbrr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scbrr1;
+}
+
+void sh4_base_device::scbrr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scbrr1);
+ logerror("scbrr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scscr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scscr1;
+}
+
+void sh4_base_device::scscr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscr1);
+ logerror("scscr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::sctdr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_sctdr1;
+}
+
+void sh4_base_device::sctdr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_sctdr1);
+ logerror("sctdr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scssr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scssr1;
+}
+
+void sh4_base_device::scssr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scssr1);
+ logerror("scssr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scrdr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scrdr1;
+}
+
+uint8_t sh4_base_device::scscmr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scscmr1;
+}
+
+void sh4_base_device::scscmr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scscmr1);
+ logerror("scscmr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scsptr1_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scsptr1;
+}
+
+void sh4_base_device::scsptr1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scsptr1);
+ logerror("scsptr1_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+// SCIF
+uint16_t sh4_base_device::scsmr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scsmr2;
+}
+
+void sh4_base_device::scsmr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scsmr2);
+ logerror("scsmr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scbrr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scbrr2;
+}
+
+void sh4_base_device::scbrr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scbrr2);
+ logerror("scbrr2_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::scscr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scscr2;
+}
+
+void sh4_base_device::scscr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scscr2);
+ logerror("scscr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scftdr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scftdr2;
+}
+
+void sh4_base_device::scftdr2_w(offs_t offset, uint8_t data, uint8_t mem_mask)
+{
+ COMBINE_DATA(&m_scftdr2);
+ logerror("scftdr2_w: Unmapped write %02x @ %02x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::scfsr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scfsr2;
+}
+
+void sh4_base_device::scfsr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ m_scfsr2 &= data | 0xff0c;
+ logerror("scfsr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint8_t sh4_base_device::scfrdr2_r(offs_t offset, uint8_t mem_mask)
+{
+ return m_scfrdr2;
+}
+
+uint16_t sh4_base_device::scfcr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scfcr2;
+}
+
+void sh4_base_device::scfcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scfcr2);
+ logerror("scfcr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint16_t sh4_base_device::scfdr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scfdr2;
+}
+
+uint16_t sh4_base_device::scsptr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_scsptr2;
+}
+
+void sh4_base_device::scsptr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_scsptr2);
+ //trips often in aristocrat mk-6
+}
+
+uint16_t sh4_base_device::sclsr2_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_sclsr2;
+}
+
+void sh4_base_device::sclsr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ m_sclsr2 &= data | 0xfffe;
+ logerror("sclsr2_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// H-UDI
+uint16_t sh4_base_device::sdir_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_sdir;
+}
+
+void sh4_base_device::sdir_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_sdir);
+ logerror("sdir_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::sddr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sddr;
+}
+
+void sh4_base_device::sddr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sddr);
+ logerror("sddr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+// H-UDI 7750R
+uint16_t sh4_base_device::sdint_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_sdint;
+}
+
+void sh4_base_device::sdint_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_sdint);
+ logerror("sdint_w: Unmapped write %04x @ %04x\n", data, mem_mask);
+}
+
+// PCI 7751
+uint32_t sh4_base_device::pciconf0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf0;
+}
+
+uint32_t sh4_base_device::pciconf1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf1;
+}
+
+void sh4_base_device::pciconf1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf1);
+ logerror("pciconf1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf2;
+}
+
+void sh4_base_device::pciconf2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf2);
+ logerror("pciconf2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf3;
+}
+
+void sh4_base_device::pciconf3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf3);
+ logerror("pciconf3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf4_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf4;
+}
+
+void sh4_base_device::pciconf4_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf4);
+ logerror("pciconf4_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf5_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf5;
+}
+
+void sh4_base_device::pciconf5_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf5);
+ logerror("pciconf5_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf6_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf6;
+}
+
+void sh4_base_device::pciconf6_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf6);
+ logerror("pciconf6_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf7_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf7;
+}
+
+uint32_t sh4_base_device::pciconf8_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf8;
+}
+
+uint32_t sh4_base_device::pciconf9_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf9;
+}
+
+uint32_t sh4_base_device::pciconf10_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf10;
+}
+
+uint32_t sh4_base_device::pciconf11_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf11;
+}
+
+void sh4_base_device::pciconf11_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf11);
+ logerror("pciconf11_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf12_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf12;
+}
+
+uint32_t sh4_base_device::pciconf13_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf13;
+}
+
+uint32_t sh4_base_device::pciconf14_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf14;
+}
+
+uint32_t sh4_base_device::pciconf15_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf15;
+}
+
+void sh4_base_device::pciconf15_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf15);
+ logerror("pciconf15_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf16_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf16;
+}
+
+void sh4_base_device::pciconf16_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf16);
+ logerror("pciconf16_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciconf17_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciconf17;
+}
+
+void sh4_base_device::pciconf17_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciconf17);
+ logerror("pciconf17_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcicr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcicr;
+}
+
+void sh4_base_device::pcicr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcicr);
+ logerror("pcicr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcilsr0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcilsr0;
+}
+
+void sh4_base_device::pcilsr0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcilsr0);
+ logerror("pcilsr0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcilsr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcilsr1;
+}
+
+void sh4_base_device::pcilsr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcilsr1);
+ logerror("pcilsr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcilar0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcilar0;
+}
+
+void sh4_base_device::pcilar0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcilar0);
+ logerror("pcilar0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcilar1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcilar1;
+}
+
+void sh4_base_device::pcilar1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcilar1);
+ logerror("pcilar1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciint_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciint;
+}
+
+void sh4_base_device::pciint_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciint);
+ logerror("pciint_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciintm_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciintm;
+}
+
+void sh4_base_device::pciintm_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciintm);
+ logerror("pciintm_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcialr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcialr;
+}
+
+void sh4_base_device::pcialr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcialr);
+ logerror("pcialr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciclr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciclr;
+}
+
+void sh4_base_device::pciclr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciclr);
+ logerror("pciclr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciaint_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciaint;
+}
+
+void sh4_base_device::pciaint_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciaint);
+ logerror("pciaint_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciaintm_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciaintm;
+}
+
+void sh4_base_device::pciaintm_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciaintm);
+ logerror("pciaintm_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcibllr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcibllr;
+}
+
+void sh4_base_device::pcibllr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcibllr);
+ logerror("pcibllr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidmabt_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidmabt;
+}
+
+void sh4_base_device::pcidmabt_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidmabt);
+ logerror("pcidmabt_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidpa0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidpa0;
+}
+
+void sh4_base_device::pcidpa0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidpa0);
+ logerror("pcidpa0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidla0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidla0;
+}
+
+void sh4_base_device::pcidla0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidla0);
+ logerror("pcidla0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidtc0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidtc0;
+}
+
+void sh4_base_device::pcidtc0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidtc0);
+ logerror("pcidtc0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidcr0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidcr0;
+}
+
+void sh4_base_device::pcidcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidcr0);
+ logerror("pcidcr0_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidpa1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidpa1;
+}
+
+void sh4_base_device::pcidpa1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidpa1);
+ logerror("pcidpa1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidla1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidla1;
+}
+
+void sh4_base_device::pcidla1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidla1);
+ logerror("pcidla1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidtc1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidtc1;
+}
+
+void sh4_base_device::pcidtc1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidtc1);
+ logerror("pcidtc1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidcr1;
+}
+
+void sh4_base_device::pcidcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidcr1);
+ logerror("pcidcr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidpa2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidpa2;
+}
+
+void sh4_base_device::pcidpa2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidpa2);
+ logerror("pcidpa2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidla2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidla2;
+}
+
+void sh4_base_device::pcidla2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidla2);
+ logerror("pcidla2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidtc2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidtc2;
+}
+
+void sh4_base_device::pcidtc2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidtc2);
+ logerror("pcidtc2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidcr2;
+}
+
+void sh4_base_device::pcidcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidcr2);
+ logerror("pcidcr2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidpa3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidpa3;
+}
+
+void sh4_base_device::pcidpa3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidpa3);
+ logerror("pcidpa3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidla3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidla3;
+}
+
+void sh4_base_device::pcidla3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidla3);
+ logerror("pcidla3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidtc3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidtc3;
+}
+
+void sh4_base_device::pcidtc3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidtc3);
+ logerror("pcidtc3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcidcr3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcidcr3;
+}
+
+void sh4_base_device::pcidcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcidcr3);
+ logerror("pcidcr3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipar_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipar;
+}
+
+void sh4_base_device::pcipar_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipar);
+ logerror("pcipar_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcimbr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcimbr;
+}
+
+void sh4_base_device::pcimbr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcimbr);
+ logerror("pcimbr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciiobr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciiobr;
+}
+
+void sh4_base_device::pciiobr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciiobr);
+ logerror("pciiobr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipint_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipint;
+}
+
+void sh4_base_device::pcipint_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipint);
+ logerror("pcipint_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipintm_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipintm;
+}
+
+void sh4_base_device::pcipintm_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipintm);
+ logerror("pcipintm_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciclkr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciclkr;
+}
+
+void sh4_base_device::pciclkr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciclkr);
+ logerror("pciclkr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcibcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcibcr1;
+}
+
+void sh4_base_device::pcibcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcibcr1);
+ logerror("pcibcr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcibcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcibcr2;
+}
+
+void sh4_base_device::pcibcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcibcr2);
+ logerror("pcibcr2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcibcr3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcibcr3;
+}
+
+void sh4_base_device::pcibcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcibcr3);
+ logerror("pcibcr3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciwcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciwcr1;
+}
+
+void sh4_base_device::pciwcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciwcr1);
+ logerror("pciwcr1_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciwcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciwcr2;
+}
+
+void sh4_base_device::pciwcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciwcr2);
+ logerror("pciwcr2_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pciwcr3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pciwcr3;
+}
+
+void sh4_base_device::pciwcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pciwcr3);
+ logerror("pciwcr3_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcimcr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcimcr;
+}
+
+void sh4_base_device::pcimcr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcimcr);
+ logerror("pcimcr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipctr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipctr;
+}
+
+void sh4_base_device::pcipctr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipctr);
+ logerror("pcipctr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipdtr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipdtr;
+}
+
+void sh4_base_device::pcipdtr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipdtr);
+ logerror("pcipdtr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+uint32_t sh4_base_device::pcipdr_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_pcipdr;
+}
+
+void sh4_base_device::pcipdr_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_pcipdr);
+ logerror("pcipdr_w: Unmapped write %08x @ %08x\n", data, mem_mask);
+}
+
+void sh34_base_device::set_frt_input(int state)
+{
if (m_sh2_state->m_frt_input == state)
{
return;
@@ -1068,6 +2757,7 @@ void sh34_base_device::set_frt_input(int state)
m_sh2_state->m_frt_input = state;
+#if 0
if (m_cpu_type == CPU_TYPE_SH4)
{
if (m_m[5] & 0x8000)
@@ -1090,7 +2780,6 @@ void sh34_base_device::set_frt_input(int state)
fatalerror("sh4_set_frt_input uses m_m[] with SH3\n");
}
-#if 0
sh4_timer_resync();
m_icr = m_frc;
m_m[4] |= ICF;
@@ -1148,7 +2837,7 @@ void sh34_base_device::execute_set_input(int irqline, int state) // set state of
if (m_nmi_line_state == state)
return;
- if (m_m[ICR] & 0x100)
+ if (m_icr & 0x100)
{
if (state == CLEAR_LINE && m_nmi_line_state == ASSERT_LINE) // rising
{
@@ -1167,14 +2856,14 @@ void sh34_base_device::execute_set_input(int irqline, int state) // set state of
}
}
if (state == CLEAR_LINE)
- m_m[ICR] ^= 0x8000;
+ m_icr ^= 0x8000;
else
- m_m[ICR] |= 0x8000;
+ m_icr |= 0x8000;
m_nmi_line_state = state;
}
else
{
- if (m_m[ICR] & 0x80) // four independent external interrupt sources
+ if (m_icr & 0x80) // four independent external interrupt sources
{
if (irqline > SH4_IRL3)
return;
diff --git a/src/devices/cpu/sh/sh4comn.h b/src/devices/cpu/sh/sh4comn.h
index 5f02378ed9f..bac004d36b4 100644
--- a/src/devices/cpu/sh/sh4comn.h
+++ b/src/devices/cpu/sh/sh4comn.h
@@ -8,10 +8,10 @@
*
*****************************************************************************/
-#pragma once
+#ifndef MAME_CPU_SH_SH4COMN_H
+#define MAME_CPU_SH_SH4COMN_H
-#ifndef __SH4COMN_H__
-#define __SH4COMN_H__
+#pragma once
#include "sh.h"
@@ -73,4 +73,4 @@ enum
#define REGFLAG_SSR (1 << 10)
#define REGFLAG_SPC (1 << 11)
-#endif /* __SH4COMN_H__ */
+#endif // MAME_CPU_SH_SH4COMN_H
diff --git a/src/devices/cpu/sh/sh4dmac.cpp b/src/devices/cpu/sh/sh4dmac.cpp
index 51607032f64..77d571c4477 100644
--- a/src/devices/cpu/sh/sh4dmac.cpp
+++ b/src/devices/cpu/sh/sh4dmac.cpp
@@ -21,27 +21,27 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_dmac_callback )
switch (channel)
{
case 0:
- m_SH4_DMATCR0 = 0;
- m_SH4_CHCR0 |= CHCR_TE;
- if (m_SH4_CHCR0 & CHCR_IE)
+ m_dmatcr0 = 0;
+ m_chcr0 |= CHCR_TE;
+ if (m_chcr0 & CHCR_IE)
sh4_exception_request(SH4_INTC_DMTE0);
break;
case 1:
- m_SH4_DMATCR1 = 0;
- m_SH4_CHCR1 |= CHCR_TE;
- if (m_SH4_CHCR1 & CHCR_IE)
+ m_dmatcr1 = 0;
+ m_chcr1 |= CHCR_TE;
+ if (m_chcr1 & CHCR_IE)
sh4_exception_request(SH4_INTC_DMTE1);
break;
case 2:
- m_SH4_DMATCR2 = 0;
- m_SH4_CHCR2 |= CHCR_TE;
- if (m_SH4_CHCR2 & CHCR_IE)
+ m_dmatcr2 = 0;
+ m_chcr2 |= CHCR_TE;
+ if (m_chcr2 & CHCR_IE)
sh4_exception_request(SH4_INTC_DMTE2);
break;
case 3:
- m_SH4_DMATCR3 = 0;
- m_SH4_CHCR3 |= CHCR_TE;
- if (m_SH4_CHCR3 & CHCR_IE)
+ m_dmatcr3 = 0;
+ m_chcr3 |= CHCR_TE;
+ if (m_chcr3 & CHCR_IE)
sh4_exception_request(SH4_INTC_DMTE3);
break;
}
@@ -99,7 +99,7 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr
src --;
if (incd == 2)
dst --;
- m_program->write_byte(dst, m_program->read_byte(src));
+ m_program->write_byte(dst & SH34_AM, m_program->read_byte(src & SH34_AM));
if (incs == 1)
src ++;
if (incd == 1)
@@ -115,7 +115,7 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr
src -= 2;
if (incd == 2)
dst -= 2;
- m_program->write_word(dst, m_program->read_word(src));
+ m_program->write_word(dst & SH34_AM, m_program->read_word(src & SH34_AM));
if (incs == 1)
src += 2;
if (incd == 1)
@@ -131,7 +131,7 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr
src -= 8;
if (incd == 2)
dst -= 8;
- m_program->write_qword(dst, m_program->read_qword(src));
+ m_program->write_qword(dst & SH34_AM, m_program->read_qword(src & SH34_AM));
if (incs == 1)
src += 8;
if (incd == 1)
@@ -148,7 +148,7 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr
src -= 4;
if (incd == 2)
dst -= 4;
- m_program->write_dword(dst, m_program->read_dword(src));
+ m_program->write_dword(dst & SH34_AM, m_program->read_dword(src & SH34_AM));
if (incs == 1)
src += 4;
if (incd == 1)
@@ -165,10 +165,10 @@ int sh34_base_device::sh4_dma_transfer(int channel, int timermode, uint32_t chcr
src -= 32;
if (incd == 2)
dst -= 32;
- m_program->write_qword(dst, m_program->read_qword(src));
- m_program->write_qword(dst + 8, m_program->read_qword(src + 8));
- m_program->write_qword(dst + 16, m_program->read_qword(src + 16));
- m_program->write_qword(dst + 24, m_program->read_qword(src + 24));
+ m_program->write_qword(dst & SH34_AM, m_program->read_qword(src & SH34_AM));
+ m_program->write_qword((dst + 8) & SH34_AM, m_program->read_qword((src + 8) & SH34_AM));
+ m_program->write_qword((dst + 16) & SH34_AM, m_program->read_qword((src + 16) & SH34_AM));
+ m_program->write_qword((dst + 24) & SH34_AM, m_program->read_qword((src + 24) & SH34_AM));
if (incs == 1)
src += 32;
if (incd == 1)
@@ -238,41 +238,41 @@ void sh34_base_device::sh4_dmac_check(int channel)
switch (channel)
{
case 0:
- sar = m_SH4_SAR0;
- dar = m_SH4_DAR0;
- chcr = m_SH4_CHCR0;
- dmatcr = m_SH4_DMATCR0;
+ sar = m_sar0;
+ dar = m_dar0;
+ chcr = m_chcr0;
+ dmatcr = m_dmatcr0;
break;
case 1:
- sar = m_SH4_SAR1;
- dar = m_SH4_DAR1;
- chcr = m_SH4_CHCR1;
- dmatcr = m_SH4_DMATCR1;
+ sar = m_sar1;
+ dar = m_dar1;
+ chcr = m_chcr1;
+ dmatcr = m_dmatcr1;
break;
case 2:
- sar = m_SH4_SAR2;
- dar = m_SH4_DAR2;
- chcr = m_SH4_CHCR2;
- dmatcr = m_SH4_DMATCR2;
+ sar = m_sar2;
+ dar = m_dar2;
+ chcr = m_chcr2;
+ dmatcr = m_dmatcr2;
break;
case 3:
- sar = m_SH4_SAR3;
- dar = m_SH4_DAR3;
- chcr = m_SH4_CHCR3;
- dmatcr = m_SH4_DMATCR3;
+ sar = m_sar3;
+ dar = m_dar3;
+ chcr = m_chcr3;
+ dmatcr = m_dmatcr3;
break;
default:
return;
}
- if (chcr & m_SH4_DMAOR & DMAOR_DME)
+ if (chcr & m_dmaor & DMAOR_DME)
{
if ((((chcr & CHCR_RS) >> 8) < 2) || (((chcr & CHCR_RS) >> 8) > 6))
return;
- if (!m_dma_timer_active[channel] && !(chcr & CHCR_TE) && !(m_SH4_DMAOR & (DMAOR_AE | DMAOR_NMIF)))
+ if (!m_dma_timer_active[channel] && !(chcr & CHCR_TE) && !(m_dmaor & (DMAOR_AE | DMAOR_NMIF)))
{
if (((chcr & CHCR_RS) >> 8) > 3)
sh4_dma_transfer(channel, 1, chcr, &sar, &dar, &dmatcr);
- else if ((m_SH4_DMAOR & DMAOR_DDT) == 0)
+ else if ((m_dmaor & DMAOR_DDT) == 0)
sh4_dma_transfer_device(channel, chcr, &sar, &dar, &dmatcr); // tell device we are ready to transfer
}
}
@@ -311,38 +311,38 @@ int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
case 8:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 8;
- *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & ~7);
+ *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & SH34_AM & ~7);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 8;
break;
case 1:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel]--;
- *(uint8_t *)data = m_program->read_byte(m_dma_source[channel]);
+ *(uint8_t *)data = m_program->read_byte(m_dma_source[channel] & SH34_AM);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel]++;
break;
case 2:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 2;
- *(uint16_t *)data = m_program->read_word(m_dma_source[channel] & ~1);
+ *(uint16_t *)data = m_program->read_word(m_dma_source[channel] & SH34_AM & ~1);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 2;
break;
case 4:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 4;
- *(uint32_t *)data = m_program->read_dword(m_dma_source[channel] & ~3);
+ *(uint32_t *)data = m_program->read_dword(m_dma_source[channel] & SH34_AM & ~3);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 4;
break;
case 32:
if (m_dma_source_increment[channel] == 2)
m_dma_source[channel] -= 32;
- *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & ~31);
- *((uint64_t *)data+1) = m_program->read_qword((m_dma_source[channel] & ~31)+8);
- *((uint64_t *)data+2) = m_program->read_qword((m_dma_source[channel] & ~31)+16);
- *((uint64_t *)data+3) = m_program->read_qword((m_dma_source[channel] & ~31)+24);
+ *(uint64_t *)data = m_program->read_qword(m_dma_source[channel] & SH34_AM & ~31);
+ *((uint64_t *)data+1) = m_program->read_qword((m_dma_source[channel] & SH34_AM & ~31)+8);
+ *((uint64_t *)data+2) = m_program->read_qword((m_dma_source[channel] & SH34_AM & ~31)+16);
+ *((uint64_t *)data+3) = m_program->read_qword((m_dma_source[channel] & SH34_AM & ~31)+24);
if (m_dma_source_increment[channel] == 1)
m_dma_source[channel] += 32;
break;
@@ -370,38 +370,38 @@ int sh34_base_device::sh4_dma_data(struct sh4_device_dma *s)
case 8:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=8;
- m_program->write_qword(m_dma_destination[channel] & ~7, *(uint64_t *)data);
+ m_program->write_qword(m_dma_destination[channel] & SH34_AM & ~7, *(uint64_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=8;
break;
case 1:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]--;
- m_program->write_byte(m_dma_destination[channel], *(uint8_t *)data);
+ m_program->write_byte(m_dma_destination[channel] & SH34_AM, *(uint8_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]++;
break;
case 2:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=2;
- m_program->write_word(m_dma_destination[channel] & ~1, *(uint16_t *)data);
+ m_program->write_word(m_dma_destination[channel] & SH34_AM & ~1, *(uint16_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=2;
break;
case 4:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=4;
- m_program->write_dword(m_dma_destination[channel] & ~3, *(uint32_t *)data);
+ m_program->write_dword(m_dma_destination[channel] & SH34_AM & ~3, *(uint32_t *)data);
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=4;
break;
case 32:
if (m_dma_destination_increment[channel] == 2)
m_dma_destination[channel]-=32;
- m_program->write_qword(m_dma_destination[channel] & ~31, *(uint64_t *)data);
- m_program->write_qword((m_dma_destination[channel] & ~31)+8, *((uint64_t *)data+1));
- m_program->write_qword((m_dma_destination[channel] & ~31)+16, *((uint64_t *)data+2));
- m_program->write_qword((m_dma_destination[channel] & ~31)+24, *((uint64_t *)data+3));
+ m_program->write_qword(m_dma_destination[channel] & SH34_AM & ~31, *(uint64_t *)data);
+ m_program->write_qword((m_dma_destination[channel] & SH34_AM & ~31)+8, *((uint64_t *)data+1));
+ m_program->write_qword((m_dma_destination[channel] & SH34_AM & ~31)+16, *((uint64_t *)data+2));
+ m_program->write_qword((m_dma_destination[channel] & SH34_AM & ~31)+24, *((uint64_t *)data+3));
if (m_dma_destination_increment[channel] == 1)
m_dma_destination[channel]+=32;
break;
@@ -434,44 +434,44 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
{
case 0:
if (s->mode & 1)
- s->source = m_SH4_SAR0;
+ s->source = m_sar0;
if (s->mode & 2)
- m_SH4_SAR0 = s->source;
+ m_sar0 = s->source;
if (s->mode & 4)
- s->destination = m_SH4_DAR0;
+ s->destination = m_dar0;
if (s->mode & 8)
- m_SH4_DAR0 = s->destination;
+ m_dar0 = s->destination;
break;
case 1:
if (s->mode & 1)
- s->source = m_SH4_SAR1;
+ s->source = m_sar1;
if (s->mode & 2)
- m_SH4_SAR1 = s->source;
+ m_sar1 = s->source;
if (s->mode & 4)
- s->destination = m_SH4_DAR1;
+ s->destination = m_dar1;
if (s->mode & 8)
- m_SH4_DAR1 = s->destination;
+ m_dar1 = s->destination;
break;
case 2:
if (s->mode & 1)
- s->source = m_SH4_SAR2;
+ s->source = m_sar2;
if (s->mode & 2)
- m_SH4_SAR2 = s->source;
+ m_sar2 = s->source;
if (s->mode & 4)
- s->destination = m_SH4_DAR2;
+ s->destination = m_dar2;
if (s->mode & 8)
- m_SH4_DAR2 = s->destination;
+ m_dar2 = s->destination;
break;
case 3:
default:
if (s->mode & 1)
- s->source = m_SH4_SAR3;
+ s->source = m_sar3;
if (s->mode & 2)
- m_SH4_SAR3 = s->source;
+ m_sar3 = s->source;
if (s->mode & 4)
- s->destination = m_SH4_DAR3;
+ s->destination = m_dar3;
if (s->mode & 8)
- m_SH4_DAR3 = s->destination;
+ m_dar3 = s->destination;
break;
}
uint32_t len;
@@ -479,21 +479,21 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
switch (s->channel)
{
case 0:
- chcr = m_SH4_CHCR0;
- len = m_SH4_DMATCR0;
+ chcr = m_chcr0;
+ len = m_dmatcr0;
break;
case 1:
- chcr = m_SH4_CHCR1;
- len = m_SH4_DMATCR1;
+ chcr = m_chcr1;
+ len = m_dmatcr1;
break;
case 2:
- chcr = m_SH4_CHCR2;
- len = m_SH4_DMATCR2;
+ chcr = m_chcr2;
+ len = m_dmatcr2;
break;
case 3:
default:
- chcr = m_SH4_CHCR3;
- len = m_SH4_DMATCR3;
+ chcr = m_chcr3;
+ len = m_dmatcr3;
break;
}
@@ -528,7 +528,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
uint32_t *p32bits = (uint32_t *)s->buffer;
for (uint32_t pos = 0; pos < s->length; pos++)
{
- *p32bits++ = m_program->read_dword(s->source);
+ *p32bits++ = m_program->read_dword(s->source & SH34_AM);
s->source = s->source + 4;
}
}
@@ -537,7 +537,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
uint32_t *p32bits = (uint32_t *)s->buffer;
for (uint32_t pos = 0; pos < s->length; pos++)
{
- m_program->write_dword(s->destination, *p32bits);
+ m_program->write_dword(s->destination & SH34_AM, *p32bits);
p32bits++;
s->destination = s->destination + 4;
}
@@ -550,7 +550,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
uint64_t *p32bytes = (uint64_t *)s->buffer;
for (uint32_t pos = 0; pos < s->length * 4; pos++)
{
- *p32bytes++ = m_program->read_qword(s->source);
+ *p32bytes++ = m_program->read_qword(s->source & SH34_AM);
s->destination = s->destination + 8;
}
}
@@ -559,7 +559,7 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
uint64_t *p32bytes = (uint64_t *)s->buffer;
for (uint32_t pos = 0; pos < s->length * 4; pos++)
{
- m_program->write_qword(s->destination, *p32bytes);
+ m_program->write_qword(s->destination & SH34_AM, *p32bytes);
p32bytes++;
s->destination = s->destination + 8;
}
@@ -568,100 +568,184 @@ void sh34_base_device::sh4_dma_ddt(struct sh4_ddt_dma *s)
}
}
+uint32_t sh34_base_device::sar0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar0;
+}
- void sh34_base_device::sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::sar0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_SAR0);
+ COMBINE_DATA(&m_sar0);
}
- void sh34_base_device::sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::dar0_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_SAR1);
+ return m_dar0;
}
- void sh34_base_device::sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::dar0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_SAR2);
+ COMBINE_DATA(&m_dar0);
}
- void sh34_base_device::sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::dmatcr0_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_SAR3);
+ return m_dmatcr0;
}
- void sh34_base_device::sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::dmatcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DAR0);
+ COMBINE_DATA(&m_dmatcr0);
}
- void sh34_base_device::sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::chcr0_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DAR1);
+ return m_chcr0;
}
- void sh34_base_device::sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::chcr0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DAR2);
+ COMBINE_DATA(&m_chcr0);
+ sh4_dmac_check(0);
}
- void sh34_base_device::sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::sar1_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DAR3);
+ return m_sar1;
}
- void sh34_base_device::sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::sar1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DMATCR0);
+ COMBINE_DATA(&m_sar1);
}
- void sh34_base_device::sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::dar1_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DMATCR1);
+ return m_dar1;
}
- void sh34_base_device::sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::dar1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DMATCR2);
+ COMBINE_DATA(&m_dar1);
}
- void sh34_base_device::sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::dmatcr1_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_DMATCR3);
+ return m_dmatcr1;
}
- void sh34_base_device::sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::dmatcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_CHCR0);
- sh4_dmac_check(0);
+ COMBINE_DATA(&m_dmatcr1);
+}
+
+uint32_t sh34_base_device::chcr1_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr1;
}
- void sh34_base_device::sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::chcr1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_CHCR1);
+ COMBINE_DATA(&m_chcr1);
sh4_dmac_check(1);
}
- void sh34_base_device::sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::sar2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar2;
+}
+
+void sh34_base_device::sar2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar2);
+}
+
+uint32_t sh34_base_device::dar2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar2;
+}
+
+void sh34_base_device::dar2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar2);
+}
+
+uint32_t sh34_base_device::dmatcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr2;
+}
+
+void sh34_base_device::dmatcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr2);
+}
+
+uint32_t sh34_base_device::chcr2_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_chcr2;
+}
+
+void sh34_base_device::chcr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_CHCR2);
+ COMBINE_DATA(&m_chcr2);
sh4_dmac_check(2);
}
- void sh34_base_device::sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::sar3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_sar3;
+}
+
+void sh34_base_device::sar3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_sar3);
+}
+
+uint32_t sh34_base_device::dar3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dar3;
+}
+
+void sh34_base_device::dar3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dar3);
+}
+
+uint32_t sh34_base_device::dmatcr3_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmatcr3;
+}
+
+void sh34_base_device::dmatcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr3);
+}
+
+uint32_t sh34_base_device::chcr3_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_CHCR3);
+ return m_chcr3;
+}
+
+void sh34_base_device::chcr3_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_chcr3);
sh4_dmac_check(3);
}
- void sh34_base_device::sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::dmaor_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_dmaor;
+}
+
+void sh34_base_device::dmaor_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- uint32_t old = m_SH4_DMAOR;
- COMBINE_DATA(&m_SH4_DMAOR);
+ uint32_t old = m_dmaor;
+ COMBINE_DATA(&m_dmaor);
- if ((m_SH4_DMAOR & DMAOR_AE) && (~old & DMAOR_AE))
- m_SH4_DMAOR &= ~DMAOR_AE;
- if ((m_SH4_DMAOR & DMAOR_NMIF) && (~old & DMAOR_NMIF))
- m_SH4_DMAOR &= ~DMAOR_NMIF;
+ if ((m_dmaor & DMAOR_AE) && (~old & DMAOR_AE))
+ m_dmaor &= ~DMAOR_AE;
+ if ((m_dmaor & DMAOR_NMIF) && (~old & DMAOR_NMIF))
+ m_dmaor &= ~DMAOR_NMIF;
sh4_dmac_check(0);
sh4_dmac_check(1);
sh4_dmac_check(2);
diff --git a/src/devices/cpu/sh/sh4dmac.h b/src/devices/cpu/sh/sh4dmac.h
index b7918fac997..a3ad1d0b5dc 100644
--- a/src/devices/cpu/sh/sh4dmac.h
+++ b/src/devices/cpu/sh/sh4dmac.h
@@ -26,38 +26,3 @@
#define DMAOR_AE 0x0004
#define DMAOR_NMIF 0x0002
#define DMAOR_DME 0x0001
-
-void sh4_handle_sar0_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_sar1_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_sar2_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_sar3_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dar0_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dar1_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dar2_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dar3_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dmatcr0_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dmatcr1_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dmatcr2_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dmatcr3_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_chcr0_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_chcr1_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_chcr2_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_chcr3_addr_w(uint32_t data, uint32_t mem_mask);
-void sh4_handle_dmaor_addr_w(uint32_t data, uint32_t mem_mask);
-uint32_t sh4_handle_sar0_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_sar1_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_sar2_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_sar3_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dar0_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dar1_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dar2_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dar3_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dmatcr0_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dmatcr1_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dmatcr2_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dmatcr3_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_chcr0_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_chcr1_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_chcr2_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_chcr3_addr_r(uint32_t mem_mask);
-uint32_t sh4_handle_dmaor_addr_r(uint32_t mem_mask);
diff --git a/src/devices/cpu/sh/sh4fe.cpp b/src/devices/cpu/sh/sh4fe.cpp
index 61941b7ec26..cb3afaba6fe 100644
--- a/src/devices/cpu/sh/sh4fe.cpp
+++ b/src/devices/cpu/sh/sh4fe.cpp
@@ -31,14 +31,6 @@ uint16_t sh4_frontend::read_word(opcode_desc &desc)
return m_sh->m_pr16(desc.physpc & SH34_AM);
}
-uint16_t sh4be_frontend::read_word(opcode_desc &desc)
-{
- if (desc.physpc >= 0xe0000000)
- return m_sh->m_pr16(desc.physpc);
-
- return m_sh->m_pr16(desc.physpc & SH34_AM);
-}
-
bool sh4_frontend::describe_group_0(opcode_desc &desc, const opcode_desc *prev, uint16_t opcode)
{
diff --git a/src/devices/cpu/sh/sh4regs.h b/src/devices/cpu/sh/sh4regs.h
index 384f062858e..691fef33998 100644
--- a/src/devices/cpu/sh/sh4regs.h
+++ b/src/devices/cpu/sh/sh4regs.h
@@ -1,166 +1,9 @@
// license:BSD-3-Clause
// copyright-holders:R. Belmont
-#pragma once
-
-#ifndef __SH4REGS_H__
-#define __SH4REGS_H__
-
-/* 00000001111111100000000011111100 */
-#define PTEH 0x2000 /* FF000000 */
-#define PTEL 0x2001 /* FF000004 */
-#define TTB 0x2002 /* FF000008 */
-#define TEA 0x2003 /* FF00000C */
-#define MMUCR 0x2004 /* FF000010 */
-#define BASRA 0x2005 /* FF000014 */
-#define BASRB 0x2006 /* FF000018 */
-#define CCR 0x2007 /* FF00001C */
-#define TRA 0x2008 /* FF000020 */
-#define EXPEVT 0x2009 /* FF000024 */
-#define INTEVT 0x200A /* FF000028 */
-#define VERSION 0x200C /* FF000030 */
-#define PTEA 0x200D /* FF000034 */
-#define QACR0 0x200E /* FF000038 */
-#define QACR1 0x200F /* FF00003C */
-#define PRR 0x2011 /* FF000044 */
-#define BARA 0x2400 /* FF200000 */
-#define BAMRA 0x2401 /* FF200004 */
-#define BBRA 0x2402 /* FF200008 */
-#define BARB 0x2403 /* FF20000C */
-#define BAMRB 0x2404 /* FF200010 */
-#define BBRB 0x2405 /* FF200014 */
-#define BDRB 0x2406 /* FF200018 */
-#define BDMRB 0x2407 /* FF20001C */
-#define BRCR 0x2408 /* FF200020 */
-#define BCR1 0x3000 /* FF800000 */
-#define BCR2 0x3001 /* FF800004 */
-#define BCR3 0x3014 /* FF800050 */
-#define BCR4 0x17C /* FE0A00F0 */
-#define WCR1 0x3002 /* FF800008 */
-#define WCR2 0x3003 /* FF80000C */
-#define WCR3 0x3004 /* FF800010 */
-#define MCR 0x3005 /* FF800014 */
-#define PCR 0x3006 /* FF800018 */
-#define RTCSR 0x3007 /* FF80001C */
-#define RTCNT 0x3008 /* FF800020 */
-#define RTCOR 0x3009 /* FF800024 */
-#define RFCR 0x300A /* FF800028 */
-#define PCTRA 0x300B /* FF80002C */
-#define PDTRA 0x300C /* FF800030 */
-#define PCTRB 0x3010 /* FF800040 */
-#define PDTRB 0x3011 /* FF800044 */
-#define GPIOIC 0x3012 /* FF800048 */
-#define SDMR2 0x3200 /* FF900000 */
-#define SDMR3 0x3280 /* FF940000 */
-#define SH4_SAR0_ADDR 0x3400 /* FFA00000 */
-#define SH4_DAR0_ADDR 0x3401 /* FFA00004 */
-#define SH4_DMATCR0_ADDR 0x3402 /* FFA00008 */
-#define SH4_CHCR0_ADDR 0x3403 /* FFA0000C */
-#define SH4_SAR1_ADDR 0x3404 /* FFA00010 */
-#define SH4_DAR1_ADDR 0x3405 /* FFA00014 */
-#define SH4_DMATCR1_ADDR 0x3406 /* FFA00018 */
-#define SH4_CHCR1_ADDR 0x3407 /* FFA0001C */
-#define SH4_SAR2_ADDR 0x3408 /* FFA00020 */
-#define SH4_DAR2_ADDR 0x3409 /* FFA00024 */
-#define SH4_DMATCR2_ADDR 0x340A /* FFA00028 */
-#define SH4_CHCR2_ADDR 0x340B /* FFA0002C */
-#define SH4_SAR3_ADDR 0x340C /* FFA00030 */
-#define SH4_DAR3_ADDR 0x340D /* FFA00034 */
-#define SH4_DMATCR3_ADDR 0x340E /* FFA00038 */
-#define SH4_CHCR3_ADDR 0x340F /* FFA0003C */
-#define SH4_DMAOR_ADDR 0x3410 /* FFA00040 */
-#define SAR4 0x3414 /* FFA00050 */
-#define DAR4 0x3415 /* FFA00054 */
-#define DMATCR4 0x3416 /* FFA00058 */
-#define CHCR4 0x3417 /* FFA0005C */
-#define SAR5 0x3418 /* FFA00060 */
-#define DAR5 0x3419 /* FFA00064 */
-#define DMATCR5 0x341A /* FFA00068 */
-#define CHCR5 0x341B /* FFA0006C */
-#define SAR6 0x341C /* FFA00070 */
-#define DAR6 0x341D /* FFA00074 */
-#define DMATCR6 0x341E /* FFA00078 */
-#define CHCR6 0x341F /* FFA0007C */
-#define SAR7 0x3420 /* FFA00080 */
-#define DAR7 0x3421 /* FFA00084 */
-#define DMATCR7 0x3422 /* FFA00088 */
-#define CHCR7 0x3423 /* FFA0008C */
-#define FRQCR 0x3800 /* FFC00000 */
-#define STBCR 0x3801 /* FFC00004 */
-#define WTCNT 0x3802 /* FFC00008 */
-#define WTCSR 0x3803 /* FFC0000C */
-#define STBCR2 0x3804 /* FFC00010 */
-#define R64CNT 0x3900 /* FFC80000 */
-#define RSECCNT 0x3901 /* FFC80004 */
-#define RMINCNT 0x3902 /* FFC80008 */
-#define RHRCNT 0x3903 /* FFC8000C */
-#define RWKCNT 0x3904 /* FFC80010 */
-#define RDAYCNT 0x3905 /* FFC80014 */
-#define RMONCNT 0x3906 /* FFC80018 */
-#define RYRCNT 0x3907 /* FFC8001C */
-#define RSECAR 0x3908 /* FFC80020 */
-#define RMINAR 0x3909 /* FFC80024 */
-#define RHRAR 0x390A /* FFC80028 */
-#define RWKAR 0x390B /* FFC8002C */
-#define RDAYAR 0x390C /* FFC80030 */
-#define RMONAR 0x390D /* FFC80034 */
-#define RCR1 0x390E /* FFC80038 */
-#define RCR2 0x390F /* FFC8003C */
-#define RCR3 0x3914 /* FFC80050 */
-#define RYRAR 0x3915 /* FFC80054 */
-#define ICR 0x3A00 /* FFD00000 */
-#define IPRA 0x3A01 /* FFD00004 */
-#define IPRB 0x3A02 /* FFD00008 */
-#define IPRC 0x3A03 /* FFD0000C */
-#define IPRD 0x3A04 /* FFD00010 */
-#define INTPRI00 0x100 /* FE080000 */
-#define INTREQ00 0x108 /* FE080020 */
-#define INTMSK00 0x110 /* FE080040 */
-#define INTMSKCLR00 0x118 /* FE080060 */
-#define CLKSTP00 0x140 /* FE0A0000 */
-#define CLKSTPCLR00 0x142 /* FE0A0008 */
-#define TSTR2 0x201 /* FE100004 */
-#define TCOR3 0x202 /* FE100008 */
-#define TCNT3 0x203 /* FE10000C */
-#define TCR3 0x204 /* FE100010 */
-#define TCOR4 0x205 /* FE100014 */
-#define TCNT4 0x206 /* FE100018 */
-#define TCR4 0x207 /* FE10001C */
-#define SH4_TOCR_ADDR 0x3B00 /* FFD80000 */
-#define SH4_TSTR_ADDR 0x3B01 /* FFD80004 */
-#define SH4_TCOR0_ADDR 0x3B02 /* FFD80008 */
-#define SH4_TCNT0_ADDR 0x3B03 /* FFD8000C */
-#define SH4_TCR0_ADDR 0x3B04 /* FFD80010 */
-#define SH4_TCOR1_ADDR 0x3B05 /* FFD80014 */
-#define SH4_TCNT1_ADDR 0x3B06 /* FFD80018 */
-#define SH4_TCR1_ADDR 0x3B07 /* FFD8001C */
-#define SH4_TCOR2_ADDR 0x3B08 /* FFD80020 */
-#define SH4_TCNT2_ADDR 0x3B09 /* FFD80024 */
-#define SH4_TCR2_ADDR 0x3B0A /* FFD80028 */
-#define SH4_TCPR2_ADDR 0x3B0B /* FFD8002C */
-#define SCSMR1 0x3C00 /* FFE00000 */
-#define SCBRR1 0x3C01 /* FFE00004 */
-#define SCSCR1 0x3C02 /* FFE00008 */
-#define SCTDR1 0x3C03 /* FFE0000C */
-#define SCSSR1 0x3C04 /* FFE00010 */
-#define SCRDR1 0x3C05 /* FFE00014 */
-#define SCSCMR1 0x3C06 /* FFE00018 */
-#define SCSPTR1 0x3C07 /* FFE0001C */
-#define SCSMR2 0x3D00 /* FFE80000 */
-#define SCBRR2 0x3D01 /* FFE80004 */
-#define SCSCR2 0x3D02 /* FFE80008 */
-#define SCFTDR2 0x3D03 /* FFE8000C */
-#define SCFSR2 0x3D04 /* FFE80010 */
-#define SCFRDR2 0x3D05 /* FFE80014 */
-#define SCFCR2 0x3D06 /* FFE80018 */
-#define SCFDR2 0x3D07 /* FFE8001C */
-#define SCSPTR2 0x3D08 /* FFE80020 */
-#define SCLSR2 0x3D09 /* FFE80024 */
-#define SDIR 0x3E00 /* FFF00000 */
-#define SDDR 0x3E02 /* FFF00008 */
-#define SDINT 0x3E05 /* FFF00014 */
-#define SIZEREGS 15878
-
+#ifndef MAME_CPU_SH_SH4REGS_H
+#define MAME_CPU_SH_SH4REGS_H
+#pragma once
#define MMUCR_LRUI 0xfc000000
#define MMUCR_URB 0x00fc0000
@@ -180,4 +23,4 @@
#define PVR_SH7751R 0x04050000
#define PRR_SH7751R 0x00000110
-#endif /* __SH4REGS_H__ */
+#endif // MAME_CPU_SH_SH4REGS_H
diff --git a/src/devices/cpu/sh/sh4tmu.cpp b/src/devices/cpu/sh/sh4tmu.cpp
index 8bcce44b37a..dcdb9454e32 100644
--- a/src/devices/cpu/sh/sh4tmu.cpp
+++ b/src/devices/cpu/sh/sh4tmu.cpp
@@ -37,18 +37,18 @@ void sh34_base_device::sh4_timer_recompute(int which)
switch (which)
{
case 0:
- tcr = m_SH4_TCR0;
- tcnt = m_SH4_TCNT0;
+ tcr = m_tcr0;
+ tcnt = m_tcnt0;
break;
case 1:
- tcr = m_SH4_TCR1;
- tcnt = m_SH4_TCNT1;
+ tcr = m_tcr1;
+ tcnt = m_tcnt1;
break;
case 2:
- tcr = m_SH4_TCR2;
- tcnt = m_SH4_TCNT2;
+ tcr = m_tcr2;
+ tcnt = m_tcnt2;
break;
}
@@ -64,15 +64,15 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
switch (which)
{
case 0:
- m_SH4_TCNT0 = m_SH4_TCOR0;
+ m_tcnt0 = m_tcor0;
break;
case 1:
- m_SH4_TCNT1 = m_SH4_TCOR1;
+ m_tcnt1 = m_tcor1;
break;
case 2:
- m_SH4_TCNT2 = m_SH4_TCOR2;
+ m_tcnt2 = m_tcor2;
break;
}
@@ -82,15 +82,15 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
switch (which)
{
case 0:
- m_SH4_TCR0 |= 0x100;
+ m_tcr0 |= 0x100;
break;
case 1:
- m_SH4_TCR1 |= 0x100;
+ m_tcr1 |= 0x100;
break;
case 2:
- m_SH4_TCR2 |= 0x100;
+ m_tcr2 |= 0x100;
break;
}
@@ -98,7 +98,7 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
switch (which)
{
case 0:
- if (m_SH4_TCR0 & 0x20)
+ if (m_tcr0 & 0x20)
{
sh4_exception_request(SH4_INTC_TUNI0);
// logerror("SH4_INTC_TUNI0 requested\n");
@@ -106,7 +106,7 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
break;
case 1:
- if (m_SH4_TCR1 & 0x20)
+ if (m_tcr1 & 0x20)
{
sh4_exception_request(SH4_INTC_TUNI1);
// logerror("SH4_INTC_TUNI1 requested\n");
@@ -114,7 +114,7 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
break;
case 2:
- if (m_SH4_TCR2 & 0x20)
+ if (m_tcr2 & 0x20)
{
sh4_exception_request(SH4_INTC_TUNI2);
// logerror("SH4_INTC_TUNI2 requested\n");
@@ -124,88 +124,32 @@ TIMER_CALLBACK_MEMBER( sh34_base_device::sh4_timer_callback )
}
}
-
-uint32_t sh34_base_device::sh4_handle_tcnt0_addr_r(uint32_t mem_mask)
-{
- if (m_SH4_TSTR & 1)
- return compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
- else
- return m_SH4_TCNT0;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcnt1_addr_r(uint32_t mem_mask)
-{
- if (m_SH4_TSTR & 2)
- return compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
- else
- return m_SH4_TCNT1;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcnt2_addr_r(uint32_t mem_mask)
-{
- if (m_SH4_TSTR & 4)
- return compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
- else
- return m_SH4_TCNT2;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcor0_addr_r(uint32_t mem_mask)
-{
- return m_SH4_TCOR0;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcor1_addr_r(uint32_t mem_mask)
-{
- return m_SH4_TCOR1;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcor2_addr_r(uint32_t mem_mask)
+void sh34_base_device::tocr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
- return m_SH4_TCOR2;
+ COMBINE_DATA(&m_tocr);
}
-uint32_t sh34_base_device::sh4_handle_tcr0_addr_r(uint32_t mem_mask)
+uint8_t sh34_base_device::tocr_r(offs_t offset, uint8_t mem_mask)
{
- return m_SH4_TCR0;
+ return m_tocr;
}
-uint32_t sh34_base_device::sh4_handle_tcr1_addr_r(uint32_t mem_mask)
+uint8_t sh34_base_device::tstr_r(offs_t offset, uint8_t mem_mask)
{
- return m_SH4_TCR1;
+ return m_tstr;
}
-uint32_t sh34_base_device::sh4_handle_tcr2_addr_r(uint32_t mem_mask)
+void sh34_base_device::tstr_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
- return m_SH4_TCR2;
-}
-
-uint32_t sh34_base_device::sh4_handle_tstr_addr_r(uint32_t mem_mask)
-{
- return m_SH4_TSTR;
-}
-
-uint32_t sh34_base_device::sh4_handle_tocr_addr_r(uint32_t mem_mask)
-{
- return m_SH4_TOCR;
-}
-
-uint32_t sh34_base_device::sh4_handle_tcpr2_addr_r(uint32_t mem_mask)
-{
- return m_SH4_TCPR2;
-}
-
-
-void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
-{
- uint32_t chg = m_SH4_TSTR;
- COMBINE_DATA(&m_SH4_TSTR);
- chg ^= m_SH4_TSTR;
+ uint32_t chg = m_tstr;
+ COMBINE_DATA(&m_tstr);
+ chg ^= m_tstr;
if (chg & 1)
{
- if ((m_SH4_TSTR & 1) == 0)
+ if ((m_tstr & 1) == 0)
{
- m_SH4_TCNT0 = compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_SH4_TCR0 & 7]);
+ m_tcnt0 = compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_tcr0 & 7]);
m_timer[0]->adjust(attotime::never);
}
else
@@ -214,9 +158,9 @@ void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
if (chg & 2)
{
- if ((m_SH4_TSTR & 2) == 0)
+ if ((m_tstr & 2) == 0)
{
- m_SH4_TCNT1 = compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_SH4_TCR1 & 7]);
+ m_tcnt1 = compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_tcr1 & 7]);
m_timer[1]->adjust(attotime::never);
}
else
@@ -225,9 +169,9 @@ void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
if (chg & 4)
{
- if ((m_SH4_TSTR & 4) == 0)
+ if ((m_tstr & 4) == 0)
{
- m_SH4_TCNT2 = compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_SH4_TCR2 & 7]);
+ m_tcnt2 = compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_tcr2 & 7]);
m_timer[2]->adjust(attotime::never);
}
else
@@ -235,87 +179,141 @@ void sh34_base_device::sh4_handle_tstr_addr_w(uint32_t data, uint32_t mem_mask)
}
}
-void sh34_base_device::sh4_handle_tcr0_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::tcor0_r(offs_t offset, uint32_t mem_mask)
+{
+ return m_tcor0;
+}
+
+void sh34_base_device::tcor0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcor0);
+}
+
+uint32_t sh34_base_device::tcnt0_r(offs_t offset, uint32_t mem_mask)
{
- uint32_t old2 = m_SH4_TCR0;
- COMBINE_DATA(&m_SH4_TCR0);
- if (m_SH4_TSTR & 1)
+ if (m_tstr & 1)
+ return compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[m_tcr0 & 7]);
+ else
+ return m_tcnt0;
+}
+
+void sh34_base_device::tcnt0_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcnt0);
+ if (m_tstr & 1)
+ sh4_timer_recompute(0);
+}
+
+uint16_t sh34_base_device::tcr0_r(offs_t offset, uint16_t mem_mask)
+{
+ return m_tcr0;
+}
+
+void sh34_base_device::tcr0_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint32_t old2 = m_tcr0;
+ COMBINE_DATA(&m_tcr0);
+ if (m_tstr & 1)
{
- m_SH4_TCNT0 = compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[old2 & 7]);
+ m_tcnt0 = compute_ticks_timer(m_timer[0], m_pm_clock, tcnt_div[old2 & 7]);
sh4_timer_recompute(0);
}
- if (!(m_SH4_TCR0 & 0x20) || !(m_SH4_TCR0 & 0x100))
+ if (!(m_tcr0 & 0x20) || !(m_tcr0 & 0x100))
sh4_exception_unrequest(SH4_INTC_TUNI0);
}
-void sh34_base_device::sh4_handle_tcr1_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::tcor1_r(offs_t offset, uint32_t mem_mask)
{
- uint32_t old2 = m_SH4_TCR1;
- COMBINE_DATA(&m_SH4_TCR1);
- if (m_SH4_TSTR & 2)
- {
- m_SH4_TCNT1 = compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[old2 & 7]);
+ return m_tcor1;
+}
+
+void sh34_base_device::tcor1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcor1);
+}
+
+uint32_t sh34_base_device::tcnt1_r(offs_t offset, uint32_t mem_mask)
+{
+ if (m_tstr & 2)
+ return compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[m_tcr1 & 7]);
+ else
+ return m_tcnt1;
+}
+
+void sh34_base_device::tcnt1_w(offs_t offset, uint32_t data, uint32_t mem_mask)
+{
+ COMBINE_DATA(&m_tcnt1);
+ if (m_tstr & 2)
sh4_timer_recompute(1);
- }
- if (!(m_SH4_TCR1 & 0x20) || !(m_SH4_TCR1 & 0x100))
- sh4_exception_unrequest(SH4_INTC_TUNI1);
}
-void sh34_base_device::sh4_handle_tcr2_addr_w(uint32_t data, uint32_t mem_mask)
+uint16_t sh34_base_device::tcr1_r(offs_t offset, uint16_t mem_mask)
{
- uint32_t old2 = m_SH4_TCR2;
- COMBINE_DATA(&m_SH4_TCR2);
- if (m_SH4_TSTR & 4)
+ return m_tcr1;
+}
+
+void sh34_base_device::tcr1_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ uint32_t old2 = m_tcr1;
+ COMBINE_DATA(&m_tcr1);
+ if (m_tstr & 2)
{
- m_SH4_TCNT2 = compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[old2 & 7]);
- sh4_timer_recompute(2);
+ m_tcnt1 = compute_ticks_timer(m_timer[1], m_pm_clock, tcnt_div[old2 & 7]);
+ sh4_timer_recompute(1);
}
- if (!(m_SH4_TCR2 & 0x20) || !(m_SH4_TCR2 & 0x100))
- sh4_exception_unrequest(SH4_INTC_TUNI2);
+ if (!(m_tcr1 & 0x20) || !(m_tcr1 & 0x100))
+ sh4_exception_unrequest(SH4_INTC_TUNI1);
}
-void sh34_base_device::sh4_handle_tcor0_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::tcor2_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCOR0);
+ return m_tcor2;
}
-void sh34_base_device::sh4_handle_tcor1_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::tcor2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCOR1);
+ COMBINE_DATA(&m_tcor2);
}
-void sh34_base_device::sh4_handle_tcor2_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::tcnt2_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCOR2);
+ if (m_tstr & 4)
+ return compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[m_tcr2 & 7]);
+ else
+ return m_tcnt2;
}
-void sh34_base_device::sh4_handle_tcnt0_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::tcnt2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCNT0);
- if (m_SH4_TSTR & 1)
- sh4_timer_recompute(0);
+ COMBINE_DATA(&m_tcnt2);
+ if (m_tstr & 4)
+ sh4_timer_recompute(2);
}
-void sh34_base_device::sh4_handle_tcnt1_addr_w(uint32_t data, uint32_t mem_mask)
+uint16_t sh34_base_device::tcr2_r(offs_t offset, uint16_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCNT1);
- if (m_SH4_TSTR & 2)
- sh4_timer_recompute(1);
+ return m_tcr2;
}
-void sh34_base_device::sh4_handle_tcnt2_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::tcr2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCNT2);
- if (m_SH4_TSTR & 4)
+ uint32_t old2 = m_tcr2;
+ COMBINE_DATA(&m_tcr2);
+ if (m_tstr & 4)
+ {
+ m_tcnt2 = compute_ticks_timer(m_timer[2], m_pm_clock, tcnt_div[old2 & 7]);
sh4_timer_recompute(2);
+ }
+ if (!(m_tcr2 & 0x20) || !(m_tcr2 & 0x100))
+ sh4_exception_unrequest(SH4_INTC_TUNI2);
}
-void sh34_base_device::sh4_handle_tocr_addr_w(uint32_t data, uint32_t mem_mask)
+uint32_t sh34_base_device::tcpr2_r(offs_t offset, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TOCR);
+ return m_tcpr2;
}
-void sh34_base_device::sh4_handle_tcpr2_addr_w(uint32_t data, uint32_t mem_mask)
+void sh34_base_device::tcpr2_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
- COMBINE_DATA(&m_SH4_TCPR2);
+ COMBINE_DATA(&m_tcpr2);
}
diff --git a/src/devices/cpu/sh/sh7014.h b/src/devices/cpu/sh/sh7014.h
index 40f33e1ac55..8999558b6ef 100644
--- a/src/devices/cpu/sh/sh7014.h
+++ b/src/devices/cpu/sh/sh7014.h
@@ -48,16 +48,16 @@ public:
auto read_portf() { return m_port.lookup()->port_f_read_callback(); }
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual void sh2_exception_internal(const char *message, int irqline, int vector) override;
private:
- void sh7014_map(address_map &map);
+ void sh7014_map(address_map &map) ATTR_COLD;
void set_irq(int vector, int level, bool is_internal);
diff --git a/src/devices/cpu/sh/sh7014_bsc.h b/src/devices/cpu/sh/sh7014_bsc.h
index 97f4b0c879c..0a2f77df123 100644
--- a/src/devices/cpu/sh/sh7014_bsc.h
+++ b/src/devices/cpu/sh/sh7014_bsc.h
@@ -17,11 +17,11 @@ class sh7014_bsc_device : public device_t
public:
sh7014_bsc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
uint16_t bcr1_r();
diff --git a/src/devices/cpu/sh/sh7014_dmac.h b/src/devices/cpu/sh/sh7014_dmac.h
index d9c92918222..d44b3414a0d 100644
--- a/src/devices/cpu/sh/sh7014_dmac.h
+++ b/src/devices/cpu/sh/sh7014_dmac.h
@@ -51,15 +51,15 @@ public:
auto notify_dma_source_callback() { return m_notify_dma_source_cb.bind(); }
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
void dma_check();
bool is_dma_activated(int vector);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
enum {
@@ -143,15 +143,15 @@ public:
m_chan[1].lookup()->notify_dma_source_callback().set(std::forward<T>(args)...);
}
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
int is_dma_activated(int vector);
bool is_transfer_allowed();
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
private:
enum {
diff --git a/src/devices/cpu/sh/sh7014_intc.h b/src/devices/cpu/sh/sh7014_intc.h
index d8d71f6dbc3..3a6629dcb60 100644
--- a/src/devices/cpu/sh/sh7014_intc.h
+++ b/src/devices/cpu/sh/sh7014_intc.h
@@ -71,15 +71,15 @@ public:
template <typename... T> void set_irq_callback(T &&... args) { m_set_irq_cb.set(std::forward<T>(args)...); }
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
void set_input(int inputnum, int state);
void set_interrupt(int vector, int state);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
enum {
diff --git a/src/devices/cpu/sh/sh7014_mtu.h b/src/devices/cpu/sh/sh7014_mtu.h
index c9c9e784390..1dc2f71653e 100644
--- a/src/devices/cpu/sh/sh7014_mtu.h
+++ b/src/devices/cpu/sh/sh7014_mtu.h
@@ -28,12 +28,12 @@ public:
m_intc.set_tag(std::forward<T>(intc));
}
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
private:
enum {
@@ -78,15 +78,15 @@ public:
m_tgr_count = chan_id == 0 ? 4 : 2;
}
- void map_chan0(address_map &map);
- void map_chan1_2(address_map &map);
+ void map_chan0(address_map &map) ATTR_COLD;
+ void map_chan1_2(address_map &map) ATTR_COLD;
void set_enable(bool enabled);
bool is_enabled() { return m_channel_active; }
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
enum {
diff --git a/src/devices/cpu/sh/sh7014_port.h b/src/devices/cpu/sh/sh7014_port.h
index 675812ebbaa..dc69a62a839 100644
--- a/src/devices/cpu/sh/sh7014_port.h
+++ b/src/devices/cpu/sh/sh7014_port.h
@@ -71,8 +71,8 @@ public:
uint8_t pfdr_r();
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
devcb_read16 m_port_a_read_cb;
diff --git a/src/devices/cpu/sh/sh7014_sci.h b/src/devices/cpu/sh/sh7014_sci.h
index cc713bc737c..1673c631477 100644
--- a/src/devices/cpu/sh/sh7014_sci.h
+++ b/src/devices/cpu/sh/sh7014_sci.h
@@ -39,11 +39,11 @@ public:
void set_external_clock_period(const attotime &_period);
void set_send_full_data_transmit_on_sync_hack(bool enabled);
- void map(address_map &map);
+ void map(address_map &map) ATTR_COLD;
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void rcv_complete() override;
diff --git a/src/devices/cpu/sh/sh7021.h b/src/devices/cpu/sh/sh7021.h
index 8540b2bbb62..487470ed8b1 100644
--- a/src/devices/cpu/sh/sh7021.h
+++ b/src/devices/cpu/sh/sh7021.h
@@ -26,8 +26,8 @@ public:
template <int Line> void write_pbdr_bit(int state);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_run() override;
@@ -184,7 +184,7 @@ protected:
uint16_t pfc_cascr_r();
void pfc_cascr_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
void recalc_irq();
diff --git a/src/devices/cpu/sh/sh7032.h b/src/devices/cpu/sh/sh7032.h
index 907fe84a8c9..8608da410d6 100644
--- a/src/devices/cpu/sh/sh7032.h
+++ b/src/devices/cpu/sh/sh7032.h
@@ -16,11 +16,11 @@ public:
sh7032_device(const machine_config &mconfig, const char *_tag, device_t *_owner, uint32_t _clock);
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
- void sh7032_map(address_map &map);
+ void sh7032_map(address_map &map) ATTR_COLD;
uint16_t sh7032_r(offs_t offset);
void sh7032_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
diff --git a/src/devices/cpu/sh/sh7042.cpp b/src/devices/cpu/sh/sh7042.cpp
index 7c3f7d2fba1..9fef06c64ad 100644
--- a/src/devices/cpu/sh/sh7042.cpp
+++ b/src/devices/cpu/sh/sh7042.cpp
@@ -7,15 +7,140 @@
#include "sh7042.h"
DEFINE_DEVICE_TYPE(SH7042, sh7042_device, "sh7042", "Hitachi SH-2 (SH7042)")
+DEFINE_DEVICE_TYPE(SH7042A, sh7042a_device, "sh7042a", "Hitachi SH-2 (SH7042A)")
+DEFINE_DEVICE_TYPE(SH7043, sh7043_device, "sh7043", "Hitachi SH-2 (SH7043)")
+DEFINE_DEVICE_TYPE(SH7043A, sh7043a_device, "sh7043a", "Hitachi SH-2 (SH7043A)")
sh7042_device::sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
- sh2_device(mconfig, SH7042, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff)
+ sh7042_device(mconfig, SH7042, tag, owner, clock)
{
+ m_die_a = false;
+}
+
+sh7042a_device::sh7042a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ sh7042_device(mconfig, SH7042A, tag, owner, clock)
+{
+ m_die_a = true;
+}
+
+sh7043_device::sh7043_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ sh7042_device(mconfig, SH7043, tag, owner, clock)
+{
+ m_die_a = false;
+}
+
+sh7043a_device::sh7043a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ sh7042_device(mconfig, SH7043A, tag, owner, clock)
+{
+ m_die_a = true;
+}
+
+sh7042_device::sh7042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
+ sh2_device(mconfig, type, tag, owner, clock, CPU_TYPE_SH2, address_map_constructor(FUNC(sh7042_device::map), this), 32, 0xffffffff),
+ m_intc(*this, "intc"),
+ m_adc0(*this, "adc0"),
+ m_adc1(*this, "adc1"),
+ m_bsc(*this, "bsc"),
+ m_cmt(*this, "cmt"),
+ m_dmac(*this, "dmac"),
+ m_dmac0(*this, "dmac:0"),
+ m_dmac1(*this, "dmac:1"),
+ m_dmac2(*this, "dmac:2"),
+ m_dmac3(*this, "dmac:3"),
+ m_mtu(*this, "mtu"),
+ m_mtu0(*this, "mtu:0"),
+ m_mtu1(*this, "mtu:1"),
+ m_mtu2(*this, "mtu:2"),
+ m_mtu3(*this, "mtu:3"),
+ m_mtu4(*this, "mtu:4"),
+ m_porta(*this, "porta"),
+ m_portb(*this, "portb"),
+ m_portc(*this, "portc"),
+ m_portd(*this, "portd"),
+ m_porte(*this, "porte"),
+ m_portf(*this, "portf"),
+ m_sci(*this, "sci%d", 0),
+ m_read_adc(*this, 0),
+ m_sci_tx(*this),
+ m_sci_clk(*this),
+ m_read_port16(*this, 0xffff),
+ m_write_port16(*this),
+ m_read_port32(*this, 0xffffffff),
+ m_write_port32(*this)
+{
+ m_port16_names = "bcef";
+ m_port32_names = "ad";
+ for(unsigned int i=0; i != m_read_adc.size(); i++)
+ m_read_adc[i].bind().set([this, i]() { return adc_default(i); });
+ for(unsigned int i=0; i != m_read_port16.size(); i++) {
+ m_read_port16[i].bind().set([this, i]() { return port16_default_r(i); });
+ m_write_port16[i].bind().set([this, i](u16 data) { port16_default_w(i, data); });
+ }
+ for(unsigned int i=0; i != m_read_port32.size(); i++) {
+ m_read_port32[i].bind().set([this, i]() { return port32_default_r(i); });
+ m_write_port32[i].bind().set([this, i](u32 data) { port32_default_w(i, data); });
+ }
+}
+
+u16 sh7042_device::port16_default_r(int port)
+{
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked port %c\n", m_port16_names[port]);
+ return 0xffff;
+}
+
+void sh7042_device::port16_default_w(int port, u16 data)
+{
+ logerror("write of un-hooked port %c %04x\n", m_port16_names[port], data);
+}
+
+u32 sh7042_device::port32_default_r(int port)
+{
+ if(!machine().side_effects_disabled())
+ logerror("read of un-hooked port %c\n", m_port32_names[port]);
+ return 0xffff;
+}
+
+void sh7042_device::port32_default_w(int port, u32 data)
+{
+ logerror("write of un-hooked port %c %04x\n", m_port32_names[port], data);
+}
+
+
+u16 sh7042_device::adc_default(int adc)
+{
+ logerror("read of un-hooked adc %d\n", adc);
+ return 0;
}
void sh7042_device::device_start()
{
sh2_device::device_start();
+
+ m_event_timer = timer_alloc(FUNC(sh7042_device::event_timer_tick), this);
+
+ save_item(NAME(m_pcf_ah));
+ save_item(NAME(m_pcf_al));
+ save_item(NAME(m_pcf_b));
+ save_item(NAME(m_pcf_c));
+ save_item(NAME(m_pcf_dh));
+ save_item(NAME(m_pcf_dl));
+ save_item(NAME(m_pcf_e));
+ save_item(NAME(m_pcf_if));
+
+ m_pcf_ah = 0;
+ m_pcf_al = 0;
+ m_pcf_b = 0;
+ m_pcf_c = 0;
+ m_pcf_dh = 0;
+ m_pcf_dl = 0;
+ m_pcf_e = 0;
+ m_pcf_if = 0;
+}
+
+void sh7042_device::execute_set_input(int irqline, int state)
+{
+ m_intc->set_input(irqline, state);
}
void sh7042_device::device_reset()
@@ -23,7 +148,358 @@ void sh7042_device::device_reset()
sh2_device::device_reset();
}
+
void sh7042_device::map(address_map &map)
{
+ map(0xffff81a0, 0xffff81a0).rw(m_sci[0], FUNC(sh_sci_device::smr_r), FUNC(sh_sci_device::smr_w));
+ map(0xffff81a1, 0xffff81a1).rw(m_sci[0], FUNC(sh_sci_device::brr_r), FUNC(sh_sci_device::brr_w));
+ map(0xffff81a2, 0xffff81a2).rw(m_sci[0], FUNC(sh_sci_device::scr_r), FUNC(sh_sci_device::scr_w));
+ map(0xffff81a3, 0xffff81a3).rw(m_sci[0], FUNC(sh_sci_device::tdr_r), FUNC(sh_sci_device::tdr_w));
+ map(0xffff81a4, 0xffff81a4).rw(m_sci[0], FUNC(sh_sci_device::ssr_r), FUNC(sh_sci_device::ssr_w));
+ map(0xffff81a5, 0xffff81a5).r(m_sci[0], FUNC(sh_sci_device::rdr_r));
+ map(0xffff81b0, 0xffff81b0).rw(m_sci[1], FUNC(sh_sci_device::smr_r), FUNC(sh_sci_device::smr_w));
+ map(0xffff81b1, 0xffff81b1).rw(m_sci[1], FUNC(sh_sci_device::brr_r), FUNC(sh_sci_device::brr_w));
+ map(0xffff81b2, 0xffff81b2).rw(m_sci[1], FUNC(sh_sci_device::scr_r), FUNC(sh_sci_device::scr_w));
+ map(0xffff81b3, 0xffff81b3).rw(m_sci[1], FUNC(sh_sci_device::tdr_r), FUNC(sh_sci_device::tdr_w));
+ map(0xffff81b4, 0xffff81b4).rw(m_sci[1], FUNC(sh_sci_device::ssr_r), FUNC(sh_sci_device::ssr_w));
+ map(0xffff81b5, 0xffff81b5).r(m_sci[1], FUNC(sh_sci_device::rdr_r));
+
+ map(0xffff8200, 0xffff8200).rw(m_mtu3, FUNC(sh_mtu_channel_device::tcr_r), FUNC(sh_mtu_channel_device::tcr_w));
+ map(0xffff8201, 0xffff8201).rw(m_mtu4, FUNC(sh_mtu_channel_device::tcr_r), FUNC(sh_mtu_channel_device::tcr_w));
+ map(0xffff8202, 0xffff8202).rw(m_mtu3, FUNC(sh_mtu_channel_device::tmdr_r), FUNC(sh_mtu_channel_device::tmdr_w));
+ map(0xffff8203, 0xffff8203).rw(m_mtu4, FUNC(sh_mtu_channel_device::tmdr_r), FUNC(sh_mtu_channel_device::tmdr_w));
+ map(0xffff8204, 0xffff8205).rw(m_mtu3, FUNC(sh_mtu_channel_device::tior_r), FUNC(sh_mtu_channel_device::tior_w));
+ map(0xffff8206, 0xffff8207).rw(m_mtu4, FUNC(sh_mtu_channel_device::tior_r), FUNC(sh_mtu_channel_device::tior_w));
+ map(0xffff8208, 0xffff8208).rw(m_mtu3, FUNC(sh_mtu_channel_device::tier_r), FUNC(sh_mtu_channel_device::tier_w));
+ map(0xffff8209, 0xffff8209).rw(m_mtu4, FUNC(sh_mtu_channel_device::tier_r), FUNC(sh_mtu_channel_device::tier_w));
+ map(0xffff820a, 0xffff820a).rw(m_mtu, FUNC(sh_mtu_device::toer_r), FUNC(sh_mtu_device::toer_w));
+ map(0xffff820b, 0xffff820b).rw(m_mtu, FUNC(sh_mtu_device::tocr_r), FUNC(sh_mtu_device::tocr_w));
+ map(0xffff820d, 0xffff820d).rw(m_mtu, FUNC(sh_mtu_device::tgcr_r), FUNC(sh_mtu_device::tgcr_w));
+ map(0xffff8210, 0xffff8211).rw(m_mtu3, FUNC(sh_mtu_channel_device::tcnt_r), FUNC(sh_mtu_channel_device::tcnt_w));
+ map(0xffff8212, 0xffff8213).rw(m_mtu4, FUNC(sh_mtu_channel_device::tcnt_r), FUNC(sh_mtu_channel_device::tcnt_w));
+ map(0xffff8214, 0xffff8215).rw(m_mtu, FUNC(sh_mtu_device::tcdr_r), FUNC(sh_mtu_device::tcdr_w));
+ map(0xffff8216, 0xffff8217).rw(m_mtu, FUNC(sh_mtu_device::tddr_r), FUNC(sh_mtu_device::tddr_w));
+ map(0xffff8218, 0xffff821b).rw(m_mtu3, FUNC(sh_mtu_channel_device::tgr_r), FUNC(sh_mtu_channel_device::tgr_w));
+ map(0xffff821c, 0xffff821f).rw(m_mtu4, FUNC(sh_mtu_channel_device::tgr_r), FUNC(sh_mtu_channel_device::tgr_w));
+ map(0xffff8220, 0xffff8221).rw(m_mtu, FUNC(sh_mtu_device::tcnts_r), FUNC(sh_mtu_device::tcnts_w));
+ map(0xffff8222, 0xffff8223).rw(m_mtu, FUNC(sh_mtu_device::tcbr_r), FUNC(sh_mtu_device::tcbr_w));
+ map(0xffff8224, 0xffff8227).rw(m_mtu3, FUNC(sh_mtu_channel_device::tgrc_r), FUNC(sh_mtu_channel_device::tgrc_w));
+ map(0xffff8228, 0xffff822b).rw(m_mtu4, FUNC(sh_mtu_channel_device::tgrc_r), FUNC(sh_mtu_channel_device::tgrc_w));
+ map(0xffff822c, 0xffff822c).rw(m_mtu3, FUNC(sh_mtu_channel_device::tsr_r), FUNC(sh_mtu_channel_device::tsr_w));
+ map(0xffff822d, 0xffff822d).rw(m_mtu4, FUNC(sh_mtu_channel_device::tsr_r), FUNC(sh_mtu_channel_device::tsr_w));
+ map(0xffff8240, 0xffff8240).rw(m_mtu, FUNC(sh_mtu_device::tstr_r), FUNC(sh_mtu_device::tstr_w));
+ map(0xffff8241, 0xffff8241).rw(m_mtu, FUNC(sh_mtu_device::tsyr_r), FUNC(sh_mtu_device::tsyr_w));
+ map(0xffff8260, 0xffff8260).rw(m_mtu0, FUNC(sh_mtu_channel_device::tcr_r), FUNC(sh_mtu_channel_device::tcr_w));
+ map(0xffff8261, 0xffff8261).rw(m_mtu0, FUNC(sh_mtu_channel_device::tmdr_r), FUNC(sh_mtu_channel_device::tmdr_w));
+ map(0xffff8262, 0xffff8263).rw(m_mtu0, FUNC(sh_mtu_channel_device::tior_r), FUNC(sh_mtu_channel_device::tior_w));
+ map(0xffff8264, 0xffff8264).rw(m_mtu0, FUNC(sh_mtu_channel_device::tier_r), FUNC(sh_mtu_channel_device::tier_w));
+ map(0xffff8265, 0xffff8265).rw(m_mtu0, FUNC(sh_mtu_channel_device::tsr_r), FUNC(sh_mtu_channel_device::tsr_w));
+ map(0xffff8266, 0xffff8267).rw(m_mtu0, FUNC(sh_mtu_channel_device::tcnt_r), FUNC(sh_mtu_channel_device::tcnt_w));
+ map(0xffff8268, 0xffff826f).rw(m_mtu0, FUNC(sh_mtu_channel_device::tgr_r), FUNC(sh_mtu_channel_device::tgr_w));
+ map(0xffff8280, 0xffff8280).rw(m_mtu1, FUNC(sh_mtu_channel_device::tcr_r), FUNC(sh_mtu_channel_device::tcr_w));
+ map(0xffff8281, 0xffff8281).rw(m_mtu1, FUNC(sh_mtu_channel_device::tmdr_r), FUNC(sh_mtu_channel_device::tmdr_w));
+ map(0xffff8282, 0xffff8283).rw(m_mtu1, FUNC(sh_mtu_channel_device::tior_r), FUNC(sh_mtu_channel_device::tior_w));
+ map(0xffff8284, 0xffff8284).rw(m_mtu1, FUNC(sh_mtu_channel_device::tier_r), FUNC(sh_mtu_channel_device::tier_w));
+ map(0xffff8285, 0xffff8285).rw(m_mtu1, FUNC(sh_mtu_channel_device::tsr_r), FUNC(sh_mtu_channel_device::tsr_w));
+ map(0xffff8286, 0xffff8287).rw(m_mtu1, FUNC(sh_mtu_channel_device::tcnt_r), FUNC(sh_mtu_channel_device::tcnt_w));
+ map(0xffff8288, 0xffff828b).rw(m_mtu1, FUNC(sh_mtu_channel_device::tgr_r), FUNC(sh_mtu_channel_device::tgr_w));
+ map(0xffff82a0, 0xffff82a0).rw(m_mtu2, FUNC(sh_mtu_channel_device::tcr_r), FUNC(sh_mtu_channel_device::tcr_w));
+ map(0xffff82a1, 0xffff82a1).rw(m_mtu2, FUNC(sh_mtu_channel_device::tmdr_r), FUNC(sh_mtu_channel_device::tmdr_w));
+ map(0xffff82a2, 0xffff82a3).rw(m_mtu2, FUNC(sh_mtu_channel_device::tior_r), FUNC(sh_mtu_channel_device::tior_w));
+ map(0xffff82a4, 0xffff82a4).rw(m_mtu2, FUNC(sh_mtu_channel_device::tier_r), FUNC(sh_mtu_channel_device::tier_w));
+ map(0xffff82a5, 0xffff82a5).rw(m_mtu2, FUNC(sh_mtu_channel_device::tsr_r), FUNC(sh_mtu_channel_device::tsr_w));
+ map(0xffff82a6, 0xffff82a7).rw(m_mtu2, FUNC(sh_mtu_channel_device::tcnt_r), FUNC(sh_mtu_channel_device::tcnt_w));
+ map(0xffff82a8, 0xffff82ab).rw(m_mtu2, FUNC(sh_mtu_channel_device::tgr_r), FUNC(sh_mtu_channel_device::tgr_w));
+
+ map(0xffff8348, 0xffff8357).rw(m_intc, FUNC(sh_intc_device::ipr_r), FUNC(sh_intc_device::ipr_w));
+ map(0xffff8358, 0xffff8359).rw(m_intc, FUNC(sh_intc_device::icr_r), FUNC(sh_intc_device::icr_w));
+ map(0xffff835a, 0xffff835b).rw(m_intc, FUNC(sh_intc_device::isr_r), FUNC(sh_intc_device::isr_w));
+
+ map(0xffff8380, 0xffff8383).rw(m_porta, FUNC(sh_port32_device::dr_r), FUNC(sh_port32_device::dr_w));
+ map(0xffff8384, 0xffff8387).rw(m_porta, FUNC(sh_port32_device::io_r), FUNC(sh_port32_device::io_w));
+ map(0xffff8388, 0xffff8389).rw(FUNC(sh7042_device::pcf_ah_r), FUNC(sh7042_device::pcf_ah_w));
+ map(0xffff838c, 0xffff838f).rw(FUNC(sh7042_device::pcf_al_r), FUNC(sh7042_device::pcf_al_w));
+ map(0xffff8390, 0xffff8391).rw(m_portb, FUNC(sh_port16_device::dr_r), FUNC(sh_port16_device::dr_w));
+ map(0xffff8392, 0xffff8393).rw(m_portc, FUNC(sh_port16_device::dr_r), FUNC(sh_port16_device::dr_w));
+ map(0xffff8394, 0xffff8395).rw(m_portb, FUNC(sh_port16_device::io_r), FUNC(sh_port16_device::io_w));
+ map(0xffff8396, 0xffff8397).rw(m_portc, FUNC(sh_port16_device::io_r), FUNC(sh_port16_device::io_w));
+ map(0xffff8398, 0xffff839b).rw(FUNC(sh7042_device::pcf_b_r), FUNC(sh7042_device::pcf_b_w));
+ map(0xffff839c, 0xffff839d).rw(FUNC(sh7042_device::pcf_c_r), FUNC(sh7042_device::pcf_c_w));
+ map(0xffff83a0, 0xffff83a3).rw(m_portd, FUNC(sh_port32_device::dr_r), FUNC(sh_port32_device::dr_w));
+ map(0xffff83a4, 0xffff83a7).rw(m_portd, FUNC(sh_port32_device::io_r), FUNC(sh_port32_device::io_w));
+ map(0xffff83a8, 0xffff83ab).rw(FUNC(sh7042_device::pcf_dh_r), FUNC(sh7042_device::pcf_dh_w));
+ map(0xffff83ac, 0xffff83ad).rw(FUNC(sh7042_device::pcf_dl_r), FUNC(sh7042_device::pcf_dl_w));
+ map(0xffff83b0, 0xffff83b1).rw(m_porte, FUNC(sh_port16_device::dr_r), FUNC(sh_port16_device::dr_w));
+ map(0xffff83b2, 0xffff83b3).r (m_portf, FUNC(sh_port16_device::dr_r));
+ map(0xffff83b4, 0xffff83b5).rw(m_porte, FUNC(sh_port16_device::io_r), FUNC(sh_port16_device::io_w));
+ map(0xffff83b8, 0xffff83bb).rw(FUNC(sh7042_device::pcf_e_r), FUNC(sh7042_device::pcf_e_w));
+ map(0xffff83c8, 0xffff83c9).rw(FUNC(sh7042_device::pcf_if_r), FUNC(sh7042_device::pcf_if_w));
+ map(0xffff83d0, 0xffff83d1).rw(m_cmt, FUNC(sh_cmt_device::cmstr_r), FUNC(sh_cmt_device::cmstr_w));
+ map(0xffff83d2, 0xffff83d3).rw(m_cmt, FUNC(sh_cmt_device::cmcsr0_r), FUNC(sh_cmt_device::cmcsr0_w));
+ map(0xffff83d4, 0xffff83d5).rw(m_cmt, FUNC(sh_cmt_device::cmcnt0_r), FUNC(sh_cmt_device::cmcnt0_w));
+ map(0xffff83d6, 0xffff83d7).rw(m_cmt, FUNC(sh_cmt_device::cmcor0_r), FUNC(sh_cmt_device::cmcor0_w));
+ map(0xffff83d8, 0xffff83d9).rw(m_cmt, FUNC(sh_cmt_device::cmcsr1_r), FUNC(sh_cmt_device::cmcsr1_w));
+ map(0xffff83da, 0xffff83db).rw(m_cmt, FUNC(sh_cmt_device::cmcnt1_r), FUNC(sh_cmt_device::cmcnt1_w));
+ map(0xffff83dc, 0xffff83dd).rw(m_cmt, FUNC(sh_cmt_device::cmcor1_r), FUNC(sh_cmt_device::cmcor1_w));
+
+ if(!m_die_a) {
+ map(0xffff83e0, 0xffff83e0).rw(m_adc0, FUNC(sh_adc_device::adcsr_r), FUNC(sh_adc_device::adcsr_w));
+ map(0xffff83e1, 0xffff83e1).rw(m_adc0, FUNC(sh_adc_device::adcr_r), FUNC(sh_adc_device::adcr_w));
+ map(0xffff83f0, 0xffff83ff).r(m_adc0, FUNC(sh_adc_device::addr_r));
+ } else {
+ map(0xffff8400, 0xffff8407).r(m_adc0, FUNC(sh_adc_device::addr_r));
+ map(0xffff8408, 0xffff840f).r(m_adc1, FUNC(sh_adc_device::addr_r));
+ map(0xffff8410, 0xffff8410).rw(m_adc0, FUNC(sh_adc_device::adcsr_r), FUNC(sh_adc_device::adcsr_w));
+ map(0xffff8411, 0xffff8411).rw(m_adc1, FUNC(sh_adc_device::adcsr_r), FUNC(sh_adc_device::adcsr_w));
+ map(0xffff8412, 0xffff8412).rw(m_adc0, FUNC(sh_adc_device::adcr_r), FUNC(sh_adc_device::adcr_w));
+ map(0xffff8413, 0xffff8413).rw(m_adc1, FUNC(sh_adc_device::adcr_r), FUNC(sh_adc_device::adcr_w));
+ }
+
+ map(0xffff8620, 0xffff8621).rw(m_bsc, FUNC(sh_bsc_device::bcr1_r), FUNC(sh_bsc_device::bcr1_w));
+ map(0xffff8622, 0xffff8623).rw(m_bsc, FUNC(sh_bsc_device::bcr2_r), FUNC(sh_bsc_device::bcr2_w));
+ map(0xffff8624, 0xffff8625).rw(m_bsc, FUNC(sh_bsc_device::wcr1_r), FUNC(sh_bsc_device::wcr1_w));
+ map(0xffff8626, 0xffff8627).rw(m_bsc, FUNC(sh_bsc_device::wcr2_r), FUNC(sh_bsc_device::wcr2_w));
+ map(0xffff862a, 0xffff862b).rw(m_bsc, FUNC(sh_bsc_device::dcr_r), FUNC(sh_bsc_device::dcr_w));
+ map(0xffff862c, 0xffff862d).rw(m_bsc, FUNC(sh_bsc_device::rtcsr_r), FUNC(sh_bsc_device::rtcsr_w));
+ map(0xffff862e, 0xffff862f).rw(m_bsc, FUNC(sh_bsc_device::rtcnt_r), FUNC(sh_bsc_device::rtcnt_w));
+ map(0xffff8630, 0xffff8631).rw(m_bsc, FUNC(sh_bsc_device::rtcor_r), FUNC(sh_bsc_device::rtcor_w));
+ map(0xffff86b0, 0xffff86b1).rw(m_dmac, FUNC(sh_dmac_device::dmaor_r), FUNC(sh_dmac_device::dmaor_w));
+ map(0xffff86c0, 0xffff86c3).rw(m_dmac0, FUNC(sh_dmac_channel_device::sar_r), FUNC(sh_dmac_channel_device::sar_w));
+ map(0xffff86c4, 0xffff86c7).rw(m_dmac0, FUNC(sh_dmac_channel_device::dar_r), FUNC(sh_dmac_channel_device::dar_w));
+ map(0xffff86c8, 0xffff86cb).rw(m_dmac0, FUNC(sh_dmac_channel_device::dmatcr_r), FUNC(sh_dmac_channel_device::dmatcr_w));
+ map(0xffff86cc, 0xffff86cf).rw(m_dmac0, FUNC(sh_dmac_channel_device::chcr_r), FUNC(sh_dmac_channel_device::chcr_w));
+ map(0xffff86d0, 0xffff86d3).rw(m_dmac1, FUNC(sh_dmac_channel_device::sar_r), FUNC(sh_dmac_channel_device::sar_w));
+ map(0xffff86d4, 0xffff86d7).rw(m_dmac1, FUNC(sh_dmac_channel_device::dar_r), FUNC(sh_dmac_channel_device::dar_w));
+ map(0xffff86d8, 0xffff86db).rw(m_dmac1, FUNC(sh_dmac_channel_device::dmatcr_r), FUNC(sh_dmac_channel_device::dmatcr_w));
+ map(0xffff86dc, 0xffff86df).rw(m_dmac1, FUNC(sh_dmac_channel_device::chcr_r), FUNC(sh_dmac_channel_device::chcr_w));
+ map(0xffff86e0, 0xffff86e3).rw(m_dmac2, FUNC(sh_dmac_channel_device::sar_r), FUNC(sh_dmac_channel_device::sar_w));
+ map(0xffff86e4, 0xffff86e7).rw(m_dmac2, FUNC(sh_dmac_channel_device::dar_r), FUNC(sh_dmac_channel_device::dar_w));
+ map(0xffff86e8, 0xffff86eb).rw(m_dmac2, FUNC(sh_dmac_channel_device::dmatcr_r), FUNC(sh_dmac_channel_device::dmatcr_w));
+ map(0xffff86ec, 0xffff86ef).rw(m_dmac2, FUNC(sh_dmac_channel_device::chcr_r), FUNC(sh_dmac_channel_device::chcr_w));
+ map(0xffff86f0, 0xffff86f3).rw(m_dmac3, FUNC(sh_dmac_channel_device::sar_r), FUNC(sh_dmac_channel_device::sar_w));
+ map(0xffff86f4, 0xffff86f7).rw(m_dmac3, FUNC(sh_dmac_channel_device::dar_r), FUNC(sh_dmac_channel_device::dar_w));
+ map(0xffff86f8, 0xffff86fb).rw(m_dmac3, FUNC(sh_dmac_channel_device::dmatcr_r), FUNC(sh_dmac_channel_device::dmatcr_w));
+ map(0xffff86fc, 0xffff86ff).rw(m_dmac3, FUNC(sh_dmac_channel_device::chcr_r), FUNC(sh_dmac_channel_device::chcr_w));
+
map(0xfffff000, 0xffffffff).ram();
}
+
+void sh7042_device::device_add_mconfig(machine_config &config)
+{
+ SH_INTC(config, m_intc, *this);
+ if(m_die_a) {
+ SH_ADC_MS(config, m_adc0, *this, m_intc, 0, 136);
+ SH_ADC_MS(config, m_adc1, *this, m_intc, 4, 137);
+ } else
+ SH_ADC_HS(config, m_adc0, *this, m_intc, 136);
+ SH_BSC(config, m_bsc);
+ SH_CMT(config, m_cmt, *this, m_intc, 144, 148);
+ SH_DMAC(config, m_dmac, *this);
+ SH_DMAC_CHANNEL(config, m_dmac0, *this, m_intc);
+ SH_DMAC_CHANNEL(config, m_dmac1, *this, m_intc);
+ SH_DMAC_CHANNEL(config, m_dmac2, *this, m_intc);
+ SH_DMAC_CHANNEL(config, m_dmac3, *this, m_intc);
+ SH_MTU(config, m_mtu, *this, 5);
+ SH_MTU_CHANNEL(config, m_mtu0, *this, 4, 0x60, m_intc, 88,
+ sh_mtu_channel_device::DIV_1,
+ sh_mtu_channel_device::DIV_4,
+ sh_mtu_channel_device::DIV_16,
+ sh_mtu_channel_device::DIV_64,
+ sh_mtu_channel_device::INPUT_A,
+ sh_mtu_channel_device::INPUT_B,
+ sh_mtu_channel_device::INPUT_C,
+ sh_mtu_channel_device::INPUT_D);
+ SH_MTU_CHANNEL(config, m_mtu1, *this, 2, 0x4c, m_intc, 96,
+ sh_mtu_channel_device::DIV_1,
+ sh_mtu_channel_device::DIV_4,
+ sh_mtu_channel_device::DIV_16,
+ sh_mtu_channel_device::DIV_64,
+ sh_mtu_channel_device::INPUT_A,
+ sh_mtu_channel_device::INPUT_B,
+ sh_mtu_channel_device::DIV_256,
+ sh_mtu_channel_device::CHAIN).set_chain(m_mtu2);
+ SH_MTU_CHANNEL(config, m_mtu2, *this, 2, 0x4c, m_intc, 104,
+ sh_mtu_channel_device::DIV_1,
+ sh_mtu_channel_device::DIV_4,
+ sh_mtu_channel_device::DIV_16,
+ sh_mtu_channel_device::DIV_64,
+ sh_mtu_channel_device::INPUT_A,
+ sh_mtu_channel_device::INPUT_B,
+ sh_mtu_channel_device::INPUT_C,
+ sh_mtu_channel_device::DIV_1024);
+ SH_MTU_CHANNEL(config, m_mtu3, *this, 4, 0x60, m_intc, 112,
+ sh_mtu_channel_device::DIV_1,
+ sh_mtu_channel_device::DIV_4,
+ sh_mtu_channel_device::DIV_16,
+ sh_mtu_channel_device::DIV_64,
+ sh_mtu_channel_device::DIV_256,
+ sh_mtu_channel_device::DIV_1024,
+ sh_mtu_channel_device::INPUT_A,
+ sh_mtu_channel_device::INPUT_B);
+ SH_MTU_CHANNEL(config, m_mtu4, *this, 4, 0x60, m_intc, 120,
+ sh_mtu_channel_device::DIV_1,
+ sh_mtu_channel_device::DIV_4,
+ sh_mtu_channel_device::DIV_16,
+ sh_mtu_channel_device::DIV_64,
+ sh_mtu_channel_device::DIV_256,
+ sh_mtu_channel_device::DIV_1024,
+ sh_mtu_channel_device::INPUT_A,
+ sh_mtu_channel_device::INPUT_B);
+ SH_PORT32(config, m_porta, *this, 0, 0x00000000, 0xff000000);
+ SH_PORT16(config, m_portb, *this, 0, 0x0000, 0xfc00);
+ SH_PORT16(config, m_portc, *this, 1, 0x0000, 0x0000);
+ SH_PORT32(config, m_portd, *this, 1, 0x0000, 0x0000);
+ SH_PORT16(config, m_porte, *this, 2, 0x0000, 0x0000);
+ SH_PORT16(config, m_portf, *this, 3, 0x0000, 0xff00);
+ SH_SCI(config, m_sci[0], 0, *this, m_intc, 128, 129, 130, 131);
+ SH_SCI(config, m_sci[1], 1, *this, m_intc, 132, 133, 134, 135);
+
+}
+
+void sh7042_device::internal_update()
+{
+ internal_update(current_cycles());
+}
+
+void sh7042_device::add_event(u64 &event_time, u64 new_event)
+{
+ if(!new_event)
+ return;
+ if(!event_time || event_time > new_event)
+ event_time = new_event;
+}
+
+void sh7042_device::recompute_timer(u64 event_time)
+{
+ if(!event_time) {
+ m_event_timer->adjust(attotime::never);
+ return;
+ }
+
+ m_event_timer->adjust(attotime::from_ticks(2*event_time + 1, 2*clock()) - machine().time());
+}
+
+TIMER_CALLBACK_MEMBER(sh7042_device::event_timer_tick)
+{
+ internal_update();
+}
+
+void sh7042_device::internal_update(u64 current_time)
+{
+ u64 event_time = 0;
+
+ add_event(event_time, m_adc0->internal_update(current_time));
+ if(m_adc1)
+ add_event(event_time, m_adc1->internal_update(current_time));
+ add_event(event_time, m_cmt->internal_update(current_time));
+ add_event(event_time, m_mtu0->internal_update(current_time));
+ add_event(event_time, m_mtu1->internal_update(current_time));
+ add_event(event_time, m_mtu2->internal_update(current_time));
+ add_event(event_time, m_mtu3->internal_update(current_time));
+ add_event(event_time, m_mtu4->internal_update(current_time));
+ add_event(event_time, m_sci[0]->internal_update(current_time));
+ add_event(event_time, m_sci[1]->internal_update(current_time));
+
+ recompute_timer(event_time);
+}
+
+u16 sh7042_device::pcf_ah_r()
+{
+ return m_pcf_ah;
+}
+
+void sh7042_device::pcf_ah_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_ah);
+ logerror("pcf ah = %04x\n", m_pcf_ah);
+}
+
+u32 sh7042_device::pcf_al_r()
+{
+ return m_pcf_al;
+}
+
+void sh7042_device::pcf_al_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_al);
+ logerror("pcf al = %08x\n", m_pcf_al);
+}
+
+u32 sh7042_device::pcf_b_r()
+{
+ return m_pcf_b;
+}
+
+void sh7042_device::pcf_b_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_b);
+ logerror("pcf b = %08x\n", m_pcf_b);
+}
+
+u16 sh7042_device::pcf_c_r()
+{
+ return m_pcf_c;
+}
+
+void sh7042_device::pcf_c_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_c);
+ logerror("pcf c = %04x\n", m_pcf_c);
+}
+
+u32 sh7042_device::pcf_dh_r()
+{
+ return m_pcf_dh;
+}
+
+void sh7042_device::pcf_dh_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_dh);
+ logerror("pcf dh = %08x\n", m_pcf_dh);
+}
+
+u16 sh7042_device::pcf_dl_r()
+{
+ return m_pcf_dl;
+}
+
+void sh7042_device::pcf_dl_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_dl);
+ logerror("pcf dl = %04x\n", m_pcf_dl);
+}
+
+u32 sh7042_device::pcf_e_r()
+{
+ return m_pcf_e;
+}
+
+void sh7042_device::pcf_e_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_e);
+ logerror("pcf e = %08x\n", m_pcf_e);
+}
+
+u16 sh7042_device::pcf_if_r()
+{
+ return m_pcf_if;
+}
+
+void sh7042_device::pcf_if_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_pcf_if);
+ logerror("pcf if = %04x\n", m_pcf_if);
+}
+
+void sh7042_device::set_internal_interrupt(int level, u32 vector)
+{
+ m_sh2_state->internal_irq_level = level;
+ m_internal_irq_vector = vector;
+ m_test_irq = 1;
+}
+
+void sh7042_device::sh2_exception_internal(const char *message, int irqline, int vector)
+{
+ sh2_device::sh2_exception_internal(message, irqline, vector);
+ m_intc->interrupt_taken(irqline, vector);
+}
diff --git a/src/devices/cpu/sh/sh7042.h b/src/devices/cpu/sh/sh7042.h
index b47242013b4..dbe2b32f6aa 100644
--- a/src/devices/cpu/sh/sh7042.h
+++ b/src/devices/cpu/sh/sh7042.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
-// SH7042, sh2 variant
+// SH704x, sh2 variant
#ifndef MAME_CPU_SH_SH7042_H
#define MAME_CPU_SH_SH7042_H
@@ -9,20 +9,182 @@
#pragma once
#include "sh2.h"
+#include "sh_intc.h"
+#include "sh_adc.h"
+#include "sh_bsc.h"
+#include "sh_cmt.h"
+#include "sh_dmac.h"
+#include "sh_mtu.h"
+#include "sh_port.h"
+#include "sh_sci.h"
class sh7042_device : public sh2_device
{
public:
sh7042_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template<int Port> auto read_adc() { return m_read_adc[Port].bind(); }
+ template<int Sci> void sci_rx_w(int state) { m_sci[Sci]->do_rx_w(state); }
+ template<int Sci> void sci_clk_w(int state) { m_sci[Sci]->do_clk_w(state); }
+ template<int Sci> auto write_sci_tx() { return m_sci_tx[Sci].bind(); }
+ template<int Sci> auto write_sci_clk() { return m_sci_clk[Sci].bind(); }
+
+ void sci_set_external_clock_period(int sci, const attotime &period) {
+ m_sci[sci].lookup()->do_set_external_clock_period(period);
+ }
+
+ auto read_porta() { return m_read_port32 [0].bind(); }
+ auto write_porta() { return m_write_port32[0].bind(); }
+ auto read_portb() { return m_read_port16 [0].bind(); }
+ auto write_portb() { return m_write_port16[0].bind(); }
+ auto read_portc() { return m_read_port16 [1].bind(); }
+ auto write_portc() { return m_write_port16[1].bind(); }
+ auto read_portd() { return m_read_port32 [1].bind(); }
+ auto write_portd() { return m_write_port32[1].bind(); }
+ auto read_porte() { return m_read_port16 [2].bind(); }
+ auto write_porte() { return m_write_port16[2].bind(); }
+ auto read_portf() { return m_read_port16 [3].bind(); }
+
+ void internal_update();
+ u16 do_read_adc(int port) { return m_read_adc[port](); }
+ u16 do_read_port16(int port) { return m_read_port16[port](); }
+ void do_write_port16(int port, u16 data, u16 ddr) { m_write_port16[port](0, data, ddr); }
+ u32 do_read_port32(int port) { return m_read_port32[port](); }
+ void do_write_port32(int port, u32 data, u32 ddr) { m_write_port32[port](0, data, ddr); }
+
+ u64 current_cycles() { return machine().time().as_ticks(clock()); }
+
+ void set_internal_interrupt(int level, u32 vector);
+
+ void do_sci_tx(int sci, int state) { m_sci_tx[sci](state); }
+ void do_sci_clk(int sci, int state) { m_sci_clk[sci](state); }
+
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
+ const char *m_port16_names;
+ const char *m_port32_names;
+ enum {
+ CSR_ADF = 0x80,
+ CSR_ADIE = 0x40,
+ CSR_ADST = 0x20,
+ CSR_CKS = 0x10,
+ CSR_GRP = 0x08,
+ CSR_CHAN = 0x07
+ };
+
+ enum {
+ CR_PWR = 0x40,
+ CR_TRGS = 0x30,
+ CR_SCAN = 0x08,
+ CR_SIM = 0x04,
+ CR_BUF = 0x03
+ };
+
+ bool m_die_a;
+
+ sh7042_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void sh2_exception_internal(const char *message, int irqline, int vector) override;
+ virtual void execute_set_input(int irqline, int state) override;
private:
- void map(address_map &map);
+ required_device<sh_intc_device> m_intc;
+ required_device<sh_adc_device> m_adc0;
+ optional_device<sh_adc_device> m_adc1;
+ required_device<sh_bsc_device> m_bsc;
+ required_device<sh_cmt_device> m_cmt;
+ required_device<sh_dmac_device> m_dmac;
+ required_device<sh_dmac_channel_device> m_dmac0;
+ required_device<sh_dmac_channel_device> m_dmac1;
+ required_device<sh_dmac_channel_device> m_dmac2;
+ required_device<sh_dmac_channel_device> m_dmac3;
+ required_device<sh_mtu_device> m_mtu;
+ required_device<sh_mtu_channel_device> m_mtu0;
+ required_device<sh_mtu_channel_device> m_mtu1;
+ required_device<sh_mtu_channel_device> m_mtu2;
+ required_device<sh_mtu_channel_device> m_mtu3;
+ required_device<sh_mtu_channel_device> m_mtu4;
+ required_device<sh_port32_device> m_porta;
+ required_device<sh_port16_device> m_portb;
+ required_device<sh_port16_device> m_portc;
+ required_device<sh_port32_device> m_portd;
+ required_device<sh_port16_device> m_porte;
+ required_device<sh_port16_device> m_portf;
+ required_device_array<sh_sci_device, 2> m_sci;
+
+ devcb_read16::array<8> m_read_adc;
+ devcb_write_line::array<2> m_sci_tx, m_sci_clk;
+ devcb_read16::array<4> m_read_port16;
+ devcb_write16::array<4> m_write_port16;
+ devcb_read32::array<2> m_read_port32;
+ devcb_write32::array<2> m_write_port32;
+
+ emu_timer *m_event_timer;
+
+ u16 m_pcf_ah;
+ u32 m_pcf_al;
+ u32 m_pcf_b;
+ u16 m_pcf_c;
+ u32 m_pcf_dh;
+ u16 m_pcf_dl;
+ u32 m_pcf_e;
+ u16 m_pcf_if;
+
+ void map(address_map &map) ATTR_COLD;
+
+ u16 adc_default(int adc);
+ u16 port16_default_r(int port);
+ void port16_default_w(int port, u16 data);
+ u32 port32_default_r(int port);
+ void port32_default_w(int port, u32 data);
+
+ void add_event(u64 &event_time, u64 new_event);
+ void recompute_timer(u64 event_time);
+ TIMER_CALLBACK_MEMBER(event_timer_tick);
+ void internal_update(u64 current_time);
+
+ u16 pcf_ah_r();
+ void pcf_ah_w(offs_t, u16 data, u16 mem_mask);
+ u32 pcf_al_r();
+ void pcf_al_w(offs_t, u32 data, u32 mem_mask);
+ u32 pcf_b_r();
+ void pcf_b_w(offs_t, u32 data, u32 mem_mask);
+ u16 pcf_c_r();
+ void pcf_c_w(offs_t, u16 data, u16 mem_mask);
+ u32 pcf_dh_r();
+ void pcf_dh_w(offs_t, u32 data, u32 mem_mask);
+ u16 pcf_dl_r();
+ void pcf_dl_w(offs_t, u16 data, u16 mem_mask);
+ u32 pcf_e_r();
+ void pcf_e_w(offs_t, u32 data, u32 mem_mask);
+ u16 pcf_if_r();
+ void pcf_if_w(offs_t, u16 data, u16 mem_mask);
+};
+
+class sh7042a_device : public sh7042_device
+{
+public:
+ sh7042a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
};
-DECLARE_DEVICE_TYPE(SH7042, sh7042_device)
+class sh7043_device : public sh7042_device
+{
+public:
+ sh7043_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class sh7043a_device : public sh7042_device
+{
+public:
+ sh7043a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+DECLARE_DEVICE_TYPE(SH7042, sh7042_device)
+DECLARE_DEVICE_TYPE(SH7042A, sh7042a_device)
+DECLARE_DEVICE_TYPE(SH7043, sh7043_device)
+DECLARE_DEVICE_TYPE(SH7043A, sh7043a_device)
#endif // MAME_CPU_SH_SH7042_H
diff --git a/src/devices/cpu/sh/sh7604.h b/src/devices/cpu/sh/sh7604.h
index c75c6964e49..bc0bfcc3330 100644
--- a/src/devices/cpu/sh/sh7604.h
+++ b/src/devices/cpu/sh/sh7604.h
@@ -37,8 +37,8 @@ public:
protected:
sh7604_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int cpu_type, address_map_constructor internal_map, int addrlines);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void sh2_exception(const char *message, int irqline) override;
@@ -55,7 +55,7 @@ private:
CCLRA = 0x01
};
- void sh7604_map(address_map &map);
+ void sh7604_map(address_map &map) ATTR_COLD;
uint32_t sh2_internal_a5();
diff --git a/src/devices/cpu/sh/sh7604_bus.h b/src/devices/cpu/sh/sh7604_bus.h
index 8189e6d2bf0..6400f27cb43 100644
--- a/src/devices/cpu/sh/sh7604_bus.h
+++ b/src/devices/cpu/sh/sh7604_bus.h
@@ -26,7 +26,7 @@ public:
sh7604_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
- void bus_regs(address_map &map);
+ void bus_regs(address_map &map) ATTR_COLD;
void write(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t read(address_space &space, offs_t offset);
@@ -48,8 +48,8 @@ public:
protected:
// device-level overrides
//virtual void device_validity_check(validity_checker &valid) const;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
bool m_is_slave;
diff --git a/src/devices/cpu/sh/sh7604_sci.h b/src/devices/cpu/sh/sh7604_sci.h
index c760ff42588..87748a17a3e 100644
--- a/src/devices/cpu/sh/sh7604_sci.h
+++ b/src/devices/cpu/sh/sh7604_sci.h
@@ -26,7 +26,7 @@ public:
sh7604_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
- void sci_regs(address_map &map);
+ void sci_regs(address_map &map) ATTR_COLD;
void write(address_space &space, offs_t offset, uint8_t data);
uint8_t read(address_space &space, offs_t offset);
@@ -59,8 +59,8 @@ protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
const address_space_config m_space_config;
diff --git a/src/devices/cpu/sh/sh7604_wdt.h b/src/devices/cpu/sh/sh7604_wdt.h
index dd39f4be514..88f33b0e9e8 100644
--- a/src/devices/cpu/sh/sh7604_wdt.h
+++ b/src/devices/cpu/sh/sh7604_wdt.h
@@ -6,13 +6,12 @@
***************************************************************************/
-#ifndef MAME_CPU_SH7604_WDT_H
-#define MAME_CPU_SH7604_WDT_H
+#ifndef MAME_CPU_SH_SH7604_WDT_H
+#define MAME_CPU_SH_SH7604_WDT_H
#pragma once
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -26,7 +25,7 @@ public:
sh7604_wdt_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// I/O operations
- void wdt_regs(address_map &map);
+ void wdt_regs(address_map &map) ATTR_COLD;
void write(address_space &space, offs_t offset, uint16_t data);
uint8_t read(address_space &space, offs_t offset);
@@ -34,8 +33,8 @@ public:
protected:
// device-level overrides
// virtual void device_validity_check(validity_checker &valid) const;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
const address_space_config m_space_config;
};
@@ -44,4 +43,4 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(SH7604_WDT, sh7604_wdt_device)
-#endif // MAME_CPU_SH7604_WDT_H
+#endif // MAME_CPU_SH_SH7604_WDT_H
diff --git a/src/devices/cpu/sh/sh_adc.cpp b/src/devices/cpu/sh/sh_adc.cpp
new file mode 100644
index 00000000000..282e994254a
--- /dev/null
+++ b/src/devices/cpu/sh/sh_adc.cpp
@@ -0,0 +1,342 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
+#include "emu.h"
+#include "sh_adc.h"
+#include "sh7042.h"
+#include "sh_intc.h"
+
+// Verbosity level
+// 0 = no messages
+// 1 = everything
+static constexpr int V = 0;
+
+DEFINE_DEVICE_TYPE(SH_ADC_MS, sh_adc_ms_device, "sh_adc_ms", "SH2/704x ADC (medium speed)")
+DEFINE_DEVICE_TYPE(SH_ADC_HS, sh_adc_hs_device, "sh_adc_hs", "SH2/704x ADC (high speed)")
+
+sh_adc_device::sh_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, type, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_intc_vector(0), m_adcsr(0), m_adcr(0), m_trigger(0), m_start_mode(0), m_start_channel(0),
+ m_end_channel(0), m_start_count(0), m_mode(0), m_channel(0), m_count(0), m_analog_powered(false), m_adtrg(false), m_next_event(0)
+{
+}
+
+sh_adc_ms_device::sh_adc_ms_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ sh_adc_device(mconfig, SH_ADC_MS, tag, owner, clock)
+{
+ m_is_hs = false;
+ m_port_base = 0;
+ m_port_mask = 3;
+ m_port_shift = 6;
+ m_analog_powered = true;
+}
+
+sh_adc_hs_device::sh_adc_hs_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ sh_adc_device(mconfig, SH_ADC_HS, tag, owner, clock)
+{
+ m_is_hs = true;
+ m_port_base = 0;
+ m_port_mask = 7;
+ m_port_shift = 0;
+ m_analog_powered = false;
+}
+
+
+u16 sh_adc_device::addr_r(offs_t offset)
+{
+ return m_addr[offset] << m_port_shift;
+}
+
+u8 sh_adc_device::adcsr_r()
+{
+ if(V>=1) logerror("adcsr_r %02x\n", m_adcsr);
+ return m_adcsr;
+}
+
+u8 sh_adc_device::adcr_r()
+{
+ if(V>=1) logerror("adcr_r %02x\n", m_adcr);
+ return m_adcr;
+}
+
+void sh_adc_device::adcsr_w(u8 data)
+{
+ if(V>=1) logerror("adcsr_w %02x\n", data);
+ u8 prev = m_adcsr;
+ m_adcsr = (data & (0x70 | m_port_mask)) | (m_adcsr & data & F_ADF);
+ mode_update();
+ if((prev & F_ADF) && !(m_adcsr & F_ADF)) {
+ if(m_mode & HALTED) {
+ m_mode &= ~HALTED;
+ if(!(m_adcsr & F_ADST)) {
+ sampling();
+ conversion_wait(false, false);
+ } else
+ done();
+ }
+ }
+
+ if(!(prev & F_ADST) && (m_adcsr & F_ADST))
+ start_conversion();
+}
+
+void sh_adc_device::adcr_w(u8 data)
+{
+ if(V>=1) logerror("adcr_w %02x\n", data);
+ m_adcr = data;
+ mode_update();
+}
+
+void sh_adc_device::adtrg_w(int state)
+{
+ if(state != m_adtrg) {
+ m_adtrg = state;
+ if(!m_adtrg && (m_trigger & T_EXT) && !(m_adcsr & F_ADST)) {
+ m_adcsr |= F_ADST;
+ start_conversion();
+ }
+ }
+}
+
+void sh_adc_device::set_suspend(bool suspend)
+{
+}
+
+void sh_adc_device::device_start()
+{
+ save_item(NAME(m_addr));
+ save_item(NAME(m_buf));
+ save_item(NAME(m_adcsr));
+ save_item(NAME(m_adcr));
+ save_item(NAME(m_trigger));
+ save_item(NAME(m_start_mode));
+ save_item(NAME(m_start_channel));
+ save_item(NAME(m_end_channel));
+ save_item(NAME(m_start_count));
+ save_item(NAME(m_suspend_on_interrupt));
+ save_item(NAME(m_mode));
+ save_item(NAME(m_channel));
+ save_item(NAME(m_count));
+ save_item(NAME(m_analog_powered));
+ save_item(NAME(m_next_event));
+ save_item(NAME(m_adtrg));
+}
+
+void sh_adc_device::device_reset()
+{
+ memset(m_addr, 0, sizeof(m_addr));
+ memset(m_buf, 0, sizeof(m_buf));
+ m_adcsr = m_adcr = 0;
+ m_trigger = T_SOFT;
+ m_start_mode = IDLE;
+ m_start_channel = m_end_channel = 0;
+ m_start_count = 1;
+ m_mode = IDLE;
+ m_channel = 0;
+ m_count = 0;
+ m_next_event = 0;
+ mode_update();
+ m_adtrg = true;
+}
+
+void sh_adc_device::done()
+{
+ m_mode = IDLE;
+ m_adcsr &= ~F_ADST;
+ if(m_analog_power_control)
+ m_analog_powered = false;
+}
+
+u64 sh_adc_device::internal_update(u64 current_time)
+{
+ if(m_next_event && m_next_event <= current_time) {
+ m_next_event = 0;
+ timeout(current_time);
+ }
+ return m_next_event;
+}
+
+void sh_adc_device::conversion_wait(bool first, bool poweron, u64 current_time)
+{
+ if(current_time)
+ m_next_event = current_time + conversion_time(first, poweron);
+ else {
+ m_next_event = m_cpu->total_cycles() + conversion_time(first, poweron);
+ m_cpu->internal_update();
+ }
+}
+
+void sh_adc_device::buffer_value(int port, int buffer)
+{
+ m_buf[buffer] = m_cpu->do_read_adc(port + m_port_base);
+}
+
+void sh_adc_device::commit_value(int reg, int buffer)
+{
+ if(V>=1) logerror("adc commit %d -> %d:%03x\n", buffer, reg, m_buf[buffer]);
+ m_addr[reg] = m_buf[buffer];
+}
+
+void sh_adc_device::sampling()
+{
+ if(m_mode & COUNTED)
+ m_channel = get_channel_index(m_start_count - m_count);
+ if(m_mode & DUAL) {
+ buffer_value(m_channel, 0);
+ buffer_value(m_channel+1, 1);
+ } else
+ buffer_value(m_channel);
+}
+
+void sh_adc_device::start_conversion()
+{
+ m_mode = m_start_mode;
+ m_channel = m_start_channel;
+ m_count = m_start_count;
+ sampling();
+ conversion_wait(true, !m_analog_powered);
+ m_analog_powered = true;
+}
+
+void sh_adc_device::timeout(u64 current_time)
+{
+ if(m_mode & BUFFER) {
+ do_buffering((m_mode & DUAL) && (m_channel & 1));
+ if((m_mode & DUAL) && !(m_channel & 1)) {
+ m_channel++;
+ conversion_wait(false, false, current_time);
+ return;
+ }
+ } else {
+ if(m_mode & DUAL) {
+ if(m_channel & 1)
+ commit_value(m_channel, 1);
+ else {
+ commit_value(m_channel, 0);
+ m_channel++;
+ conversion_wait(false, false, current_time);
+ return;
+ }
+ } else
+ commit_value(m_channel);
+ }
+
+ if(m_mode & ROTATE) {
+ if(m_channel != m_end_channel) {
+ m_channel++;
+ sampling();
+ conversion_wait(false, false, current_time);
+ return;
+ }
+ m_channel = m_start_channel;
+ }
+
+ if(m_mode & COUNTED) {
+ m_count--;
+ if(m_count) {
+ sampling();
+ conversion_wait(false, false, current_time);
+ return;
+ }
+ }
+
+ m_adcsr |= F_ADF;
+ if(m_adcsr & F_ADIE)
+ m_intc->internal_interrupt(m_intc_vector);
+
+ if(m_mode & REPEAT) {
+ if(m_suspend_on_interrupt && (m_adcsr & F_ADIE)) {
+ m_mode |= HALTED;
+ return;
+ }
+ m_channel = m_start_channel;
+ m_count = m_start_count;
+ sampling();
+ conversion_wait(false, false, current_time);
+ return;
+ }
+
+ done();
+}
+
+int sh_adc_device::conversion_time(bool first, bool poweron)
+{
+ int tm = m_adcsr & 0x10 ? 44 : 24;
+ if(first)
+ tm += m_adcsr & 0x10 ? 20 : 10;
+ if(poweron)
+ tm += 200;
+ return tm;
+}
+
+void sh_adc_device::mode_update()
+{
+ if(m_is_hs) {
+ m_trigger = 1 << ((m_adcr >> 4) & 3);
+ m_analog_power_control = !(m_adcr & 0x40);
+
+ m_mode = ACTIVE | (m_adcr & 0x08 ? REPEAT : 0);
+
+ if(m_adcr & 0x03) {
+ m_mode |= BUFFER;
+
+ }
+
+ if(m_adcsr & 0x08) {
+ m_mode |= ROTATE;
+ m_start_channel = 0;
+ if(m_adcr & 0x04) {
+ m_mode |= DUAL;
+ m_end_channel = (m_adcsr & 6)+1;
+ } else
+ m_end_channel = m_adcsr & 7;
+ } else
+ m_start_channel = m_end_channel = m_adcsr & 7;
+
+ } else {
+ m_trigger = T_SOFT;
+
+ m_mode = ACTIVE;
+
+ if(m_adcsr & 0x08) {
+ m_mode |= ROTATE;
+ m_start_channel = 0;
+ m_end_channel = m_adcsr & 3;
+ } else
+ m_start_channel = m_end_channel = m_adcsr & 3;
+ }
+}
+
+void sh_adc_device::do_buffering(int buffer)
+{
+ if((m_mode & COUNTED) && m_channel >= 2) {
+ commit_value(m_channel, buffer);
+ return;
+ }
+ switch(m_adcsr & 3) {
+ case 0:
+ commit_value(m_channel, buffer);
+ break;
+ case 1:
+ m_addr[1] = m_addr[0];
+ commit_value(0, buffer);
+ break;
+ case 2:
+ m_addr[2+buffer] = m_addr[buffer];
+ commit_value(buffer, buffer);
+ break;
+ case 3:
+ m_addr[3] = m_addr[2];
+ m_addr[2] = m_addr[1];
+ m_addr[1] = m_addr[0];
+ commit_value(0, buffer);
+ break;
+ }
+}
+
+int sh_adc_device::get_channel_index(int count)
+{
+ abort();
+}
diff --git a/src/devices/cpu/sh/sh_adc.h b/src/devices/cpu/sh/sh_adc.h
new file mode 100644
index 00000000000..d9e8236f09b
--- /dev/null
+++ b/src/devices/cpu/sh/sh_adc.h
@@ -0,0 +1,124 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_adc.h
+
+ SH Analog to Digital Converter subsystem
+
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_ADC_H
+#define MAME_CPU_SH_SH_ADC_H
+
+#pragma once
+
+class sh7042_device;
+class sh_intc_device;
+
+class sh_adc_device : public device_t {
+public:
+ u16 addr_r(offs_t offset);
+ u8 adcsr_r();
+ u8 adcr_r();
+ void adcsr_w(u8 data);
+ void adcr_w(u8 data);
+ void adtrg_w(int state);
+
+ void set_suspend(bool suspend);
+ u64 internal_update(u64 current_time);
+
+protected:
+ sh_adc_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
+ required_device<sh7042_device> m_cpu;
+ required_device<sh_intc_device> m_intc;
+ int m_port_base, m_port_mask, m_port_shift;
+ int m_intc_vector;
+ bool m_is_hs;
+
+ enum {
+ T_SOFT = 1<<0,
+ T_TPU = 1<<1,
+ T_TIMER = 1<<2,
+ T_EXT = 1<<3
+ };
+
+ enum {
+ F_ADF = 0x80,
+ F_ADIE = 0x40,
+ F_ADST = 0x20
+ };
+
+ enum {
+ IDLE = 0,
+ ACTIVE = 1,
+ HALTED = 2,
+ REPEAT = 4,
+ ROTATE = 8,
+ DUAL = 16,
+ BUFFER = 32,
+ COUNTED = 64
+ };
+
+ u16 m_addr[8], m_buf[2];
+ u8 m_adcsr, m_adcr;
+ int m_register_mask;
+ int m_trigger, m_start_mode, m_start_channel, m_end_channel, m_start_count;
+ bool m_suspend_on_interrupt, m_analog_power_control;
+ int m_mode, m_channel, m_count;
+ bool m_analog_powered, m_adtrg;
+ u64 m_next_event;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void sampling();
+ void start_conversion();
+ void conversion_wait(bool first, bool poweron, u64 current_time = 0);
+ void buffer_value(int port, int buffer = 0);
+ void commit_value(int reg, int buffer = 0);
+ void timeout(u64 current_time);
+ void done();
+
+ int conversion_time(bool first, bool poweron);
+ void mode_update();
+ void do_buffering(int buffer);
+ int get_channel_index(int count);
+};
+
+class sh_adc_ms_device : public sh_adc_device {
+public:
+ sh_adc_ms_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template<typename T, typename U> sh_adc_ms_device(const machine_config &mconfig, const char *tag, device_t *owner,
+ T &&cpu, U &&intc, int port_base, int vect) :
+ sh_adc_ms_device(mconfig, tag, owner)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_is_hs = false;
+ m_port_base = port_base;
+ m_intc_vector = vect;
+ }
+};
+
+class sh_adc_hs_device : public sh_adc_device {
+public:
+ sh_adc_hs_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template<typename T, typename U> sh_adc_hs_device(const machine_config &mconfig, const char *tag, device_t *owner,
+ T &&cpu, U &&intc, int vect) :
+ sh_adc_hs_device(mconfig, tag, owner)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_intc_vector = vect;
+ }
+};
+
+DECLARE_DEVICE_TYPE(SH_ADC_MS, sh_adc_ms_device)
+DECLARE_DEVICE_TYPE(SH_ADC_HS, sh_adc_hs_device)
+
+#endif // MAME_CPU_SH_SH_ADC_H
diff --git a/src/devices/cpu/sh/sh_bsc.cpp b/src/devices/cpu/sh/sh_bsc.cpp
new file mode 100644
index 00000000000..1151b220928
--- /dev/null
+++ b/src/devices/cpu/sh/sh_bsc.cpp
@@ -0,0 +1,139 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_bsc.h
+
+ SH DMA controller
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh_bsc.h"
+
+DEFINE_DEVICE_TYPE(SH_BSC, sh_bsc_device, "sh_bsc", "SH Bus State Controller")
+
+sh_bsc_device::sh_bsc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_BSC, tag, owner, clock)
+{
+}
+
+void sh_bsc_device::device_start()
+{
+ save_item(NAME(m_bcr1));
+ save_item(NAME(m_bcr2));
+ save_item(NAME(m_wcr1));
+ save_item(NAME(m_wcr2));
+ save_item(NAME(m_dcr));
+ save_item(NAME(m_rtcsr));
+ save_item(NAME(m_rtcnt));
+ save_item(NAME(m_rtcor));
+}
+
+void sh_bsc_device::device_reset()
+{
+ m_bcr1 = 0x200f;
+ m_bcr2 = 0xffff;
+ m_wcr1 = 0xffff;
+ m_wcr2 = 0x000f;
+ m_dcr = 0;
+ m_rtcsr = 0;
+ m_rtcnt = 0;
+ m_rtcor = 0;
+}
+
+u16 sh_bsc_device::bcr1_r()
+{
+ logerror("bcr1_r\n");
+ return m_bcr1;
+}
+
+void sh_bsc_device::bcr1_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_bcr1);
+ logerror("bcr1_w %04x\n", m_bcr1);
+}
+
+u16 sh_bsc_device::bcr2_r()
+{
+ logerror("bcr2_r\n");
+ return m_bcr2;
+}
+
+void sh_bsc_device::bcr2_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_bcr2);
+ logerror("bcr2_w %04x\n", m_bcr2);
+}
+
+u16 sh_bsc_device::wcr1_r()
+{
+ logerror("wcr1_r\n");
+ return m_wcr1;
+}
+
+void sh_bsc_device::wcr1_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_wcr1);
+ logerror("wcr1_w %04x\n", m_wcr1);
+}
+
+u16 sh_bsc_device::wcr2_r()
+{
+ logerror("wcr2_r\n");
+ return m_wcr2;
+}
+
+void sh_bsc_device::wcr2_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_wcr2);
+ logerror("wcr2_w %04x\n", m_wcr2);
+}
+
+u16 sh_bsc_device::dcr_r()
+{
+ logerror("dcr_r\n");
+ return m_dcr;
+}
+
+void sh_bsc_device::dcr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_dcr);
+ logerror("dcr_w %04x\n", m_dcr);
+}
+
+u16 sh_bsc_device::rtcsr_r()
+{
+ logerror("rtcsr_r\n");
+ return m_rtcsr;
+}
+
+void sh_bsc_device::rtcsr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_rtcsr);
+ logerror("rtcsr_w %04x\n", m_rtcsr);
+}
+
+u16 sh_bsc_device::rtcnt_r()
+{
+ logerror("rtcnt_r\n");
+ return m_rtcnt;
+}
+
+void sh_bsc_device::rtcnt_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_rtcnt);
+ logerror("rtcnt_w %04x\n", m_rtcnt);
+}
+
+u16 sh_bsc_device::rtcor_r()
+{
+ logerror("rtcor_r\n");
+ return m_rtcor;
+}
+
+void sh_bsc_device::rtcor_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_rtcor);
+ logerror("rtcor_w %04x\n", m_rtcor);
+}
diff --git a/src/devices/cpu/sh/sh_bsc.h b/src/devices/cpu/sh/sh_bsc.h
new file mode 100644
index 00000000000..f1c78916cf7
--- /dev/null
+++ b/src/devices/cpu/sh/sh_bsc.h
@@ -0,0 +1,47 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_bsc.h
+
+ SH Bus State Controller
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_BSC_H
+#define MAME_CPU_SH_SH_BSC_H
+
+#pragma once
+
+class sh_bsc_device : public device_t {
+public:
+ sh_bsc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ u16 bcr1_r();
+ void bcr1_w(offs_t, u16 data, u16 mem_mask);
+ u16 bcr2_r();
+ void bcr2_w(offs_t, u16 data, u16 mem_mask);
+ u16 wcr1_r();
+ void wcr1_w(offs_t, u16 data, u16 mem_mask);
+ u16 wcr2_r();
+ void wcr2_w(offs_t, u16 data, u16 mem_mask);
+ u16 dcr_r();
+ void dcr_w(offs_t, u16 data, u16 mem_mask);
+ u16 rtcsr_r();
+ void rtcsr_w(offs_t, u16 data, u16 mem_mask);
+ u16 rtcnt_r();
+ void rtcnt_w(offs_t, u16 data, u16 mem_mask);
+ u16 rtcor_r();
+ void rtcor_w(offs_t, u16 data, u16 mem_mask);
+
+
+protected:
+ u16 m_bcr1, m_bcr2, m_wcr1, m_wcr2, m_dcr, m_rtcsr, m_rtcnt, m_rtcor;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(SH_BSC, sh_bsc_device)
+
+#endif
diff --git a/src/devices/cpu/sh/sh_cmt.cpp b/src/devices/cpu/sh/sh_cmt.cpp
new file mode 100644
index 00000000000..74b7299a53b
--- /dev/null
+++ b/src/devices/cpu/sh/sh_cmt.cpp
@@ -0,0 +1,202 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_cmt.h
+
+ SH Compare/Match timer subsystem
+
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh7042.h"
+#include "sh_intc.h"
+
+DEFINE_DEVICE_TYPE(SH_CMT, sh_cmt_device, "sh_cmt", "SH2/704x CMT")
+
+sh_cmt_device::sh_cmt_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_CMT, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_intc_vector{0, 0},
+ m_str(0),
+ m_csr{ 0, 0 },
+ m_cnt{ 0, 0 },
+ m_cor{ 0xffff, 0xffff }
+{
+}
+
+void sh_cmt_device::device_start()
+{
+ save_item(NAME(m_next_event));
+ save_item(NAME(m_str));
+ save_item(NAME(m_csr));
+ save_item(NAME(m_cnt));
+ save_item(NAME(m_cor));
+
+}
+
+void sh_cmt_device::device_reset()
+{
+ std::fill(m_next_event.begin(), m_next_event.end(), 0);
+ m_str = 0;
+ std::fill(m_csr.begin(), m_csr.end(), 0);
+ std::fill(m_cnt.begin(), m_cnt.end(), 0);
+ std::fill(m_cor.begin(), m_cor.end(), 0xffff);
+}
+
+u64 sh_cmt_device::internal_update(u64 current_time)
+{
+ u64 next = 0;
+ for(int i = 0; i != 2; i++) {
+ if(m_next_event[i] && current_time >= m_next_event[i]) {
+ m_csr[i] |= 0x80;
+ if(BIT(m_csr[i], 6))
+ m_intc->internal_interrupt(m_intc_vector[i]);
+ cnt_update(i, current_time);
+ }
+ if(!next || (m_next_event[i] && m_next_event[i] < next))
+ next = m_next_event[i];
+ }
+ return next;
+}
+
+
+u16 sh_cmt_device::cmstr_r()
+{
+ return m_str;
+}
+
+u16 sh_cmt_device::cmcsr0_r()
+{
+ return m_csr[0];
+}
+
+u16 sh_cmt_device::cmcnt0_r()
+{
+ cnt_update(0, m_cpu->current_cycles());
+ return m_cnt[0];
+}
+
+u16 sh_cmt_device::cmcor0_r()
+{
+ return m_cor[0];
+}
+
+u16 sh_cmt_device::cmcsr1_r()
+{
+ return m_csr[1];
+}
+
+u16 sh_cmt_device::cmcnt1_r()
+{
+ cnt_update(1, m_cpu->current_cycles());
+ return m_cnt[1];
+}
+
+u16 sh_cmt_device::cmcor1_r()
+{
+ return m_cor[1];
+}
+
+void sh_cmt_device::cmcsr0_w(offs_t, u16 data, u16 mem_mask)
+{
+ csr_w(0, data, mem_mask);
+}
+
+void sh_cmt_device::cmcsr1_w(offs_t, u16 data, u16 mem_mask)
+{
+ csr_w(1, data, mem_mask);
+}
+
+void sh_cmt_device::cmcnt0_w(offs_t, u16 data, u16 mem_mask)
+{
+ cnt_w(0, data, mem_mask);
+}
+
+void sh_cmt_device::cmcnt1_w(offs_t, u16 data, u16 mem_mask)
+{
+ cnt_w(1, data, mem_mask);
+}
+
+void sh_cmt_device::cmcor0_w(offs_t, u16 data, u16 mem_mask)
+{
+ cor_w(0, data, mem_mask);
+}
+
+void sh_cmt_device::cmcor1_w(offs_t, u16 data, u16 mem_mask)
+{
+ cor_w(1, data, mem_mask);
+}
+
+void sh_cmt_device::cmstr_w(offs_t, u16 data, u16 mem_mask)
+{
+ cnt_update(0, m_cpu->current_cycles());
+ cnt_update(1, m_cpu->current_cycles());
+ u16 old = m_str;
+ COMBINE_DATA(&m_str);
+ for(int i=0; i != 2; i++)
+ if(!BIT(old, i) && BIT(m_str, i))
+ clock_start(i);
+ else if(!BIT(m_str, i))
+ m_next_event[i] = 0;
+ m_cpu->internal_update();
+}
+
+void sh_cmt_device::csr_w(int reg, u16 data, u16 mem_mask)
+{
+ cnt_update(reg, m_cpu->current_cycles());
+ COMBINE_DATA(&m_csr[reg]);
+}
+
+void sh_cmt_device::cnt_w(int reg, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_cnt[reg]);
+ if((m_str >> reg) & 1) {
+ compute_next_event(reg);
+ m_cpu->internal_update();
+ }
+}
+
+void sh_cmt_device::cor_w(int reg, u16 data, u16 mem_mask)
+{
+ cnt_update(reg, m_cpu->current_cycles());
+ COMBINE_DATA(&m_cor[reg]);
+ if((m_str >> reg) & 1) {
+ compute_next_event(reg);
+ m_cpu->internal_update();
+ }
+}
+
+void sh_cmt_device::clock_start(int clk)
+{
+ //logerror("start clock %d %dHz\n", clk, (m_cpu->clock() >> (3 + 2*BIT(m_csr[clk], 0, 2))) / (m_cor[clk] + 1));
+ compute_next_event(clk);
+}
+
+void sh_cmt_device::compute_next_event(int clk)
+{
+ u64 step1 = 1 << (3 + 2*BIT(m_csr[clk], 0, 2));
+ u64 time = m_cpu->current_cycles();
+ if(time & (step1 - 1))
+ time = (time | (step1 - 1)) + 1;
+ s32 counts = m_cor[clk] + 1 - m_cnt[clk];
+ if(counts < 0)
+ counts += 0x10000;
+ time += step1 * counts;
+ m_next_event[clk] = time;
+}
+
+void sh_cmt_device::cnt_update(int clk, u64 current_time)
+{
+ if(!((m_str >> clk) & 1))
+ return;
+ u64 step = (m_cor[clk] + 1) << (3 + 2*BIT(m_csr[clk], 0, 2));
+ if(m_next_event[clk]) {
+ while(current_time >= m_next_event[clk])
+ m_next_event[clk] += step;
+ u64 delta = m_next_event[clk] - current_time;
+ m_cnt[clk] = m_cor[clk] - ((delta - 1) >> (3 + 2*BIT(m_csr[clk], 0, 2)));
+ }
+}
diff --git a/src/devices/cpu/sh/sh_cmt.h b/src/devices/cpu/sh/sh_cmt.h
new file mode 100644
index 00000000000..4451e90e3ef
--- /dev/null
+++ b/src/devices/cpu/sh/sh_cmt.h
@@ -0,0 +1,75 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_cmt.h
+
+ SH Compare/Match timer subsystem
+
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_CMT_H
+#define MAME_CPU_SH_SH_CMT_H
+
+#pragma once
+
+class sh7042_device;
+class sh_intc_device;
+
+class sh_cmt_device : public device_t {
+public:
+ sh_cmt_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template<typename T, typename U> sh_cmt_device(const machine_config &mconfig, const char *tag, device_t *owner,
+ T &&cpu, U &&intc, int vect0, int vect1) :
+ sh_cmt_device(mconfig, tag, owner)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_intc_vector[0] = vect0;
+ m_intc_vector[1] = vect1;
+ }
+
+ u64 internal_update(u64 current_time);
+
+ u16 cmstr_r();
+ void cmstr_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcsr0_r();
+ void cmcsr0_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcnt0_r();
+ void cmcnt0_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcor0_r();
+ void cmcor0_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcsr1_r();
+ void cmcsr1_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcnt1_r();
+ void cmcnt1_w(offs_t, u16 data, u16 mem_mask);
+ u16 cmcor1_r();
+ void cmcor1_w(offs_t, u16 data, u16 mem_mask);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ required_device<sh_intc_device> m_intc;
+ std::array<u64, 2> m_next_event;
+ std::array<int, 2> m_intc_vector;
+ u16 m_str;
+ std::array<u16, 2> m_csr;
+ std::array<u16, 2> m_cnt;
+ std::array<u16, 2> m_cor;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void csr_w(int reg, u16 data, u16 mem_mask);
+ void cnt_w(int reg, u16 data, u16 mem_mask);
+ void cor_w(int reg, u16 data, u16 mem_mask);
+
+ void clock_start(int clk);
+ void compute_next_event(int clk);
+ void cnt_update(int clk, u64 current_time);
+};
+
+DECLARE_DEVICE_TYPE(SH_CMT, sh_cmt_device)
+
+#endif // MAME_CPU_SH_SH_CMT_H
diff --git a/src/devices/cpu/sh/sh_dasm.cpp b/src/devices/cpu/sh/sh_dasm.cpp
index 26454484e3f..016d3022708 100644
--- a/src/devices/cpu/sh/sh_dasm.cpp
+++ b/src/devices/cpu/sh/sh_dasm.cpp
@@ -122,7 +122,7 @@ uint32_t sh_disassembler::op0000(std::ostream &stream, uint32_t pc, uint16_t opc
util::stream_format(stream, "MOV.L @(R0,%s),%s", regname[Rm], regname[Rn]);
break;
case 15:
- util::stream_format(stream, "MAC.L @%s+,@%s+", regname[Rn], regname[Rm]);
+ util::stream_format(stream, "MAC.L @%s+,@%s+", regname[Rm], regname[Rn]);
break;
}
}
diff --git a/src/devices/cpu/sh/sh_dasm.h b/src/devices/cpu/sh/sh_dasm.h
index 52d6b2eb723..2b29187ee73 100644
--- a/src/devices/cpu/sh/sh_dasm.h
+++ b/src/devices/cpu/sh/sh_dasm.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:Juergen Buchmueller, R. Belmont
-#ifndef MAME_CPU_SH_SHDASM_H
-#define MAME_CPU_SH_SHDASM_H
+#ifndef MAME_CPU_SH_SH_DASM_H
+#define MAME_CPU_SH_SH_DASM_H
#pragma once
@@ -42,4 +42,4 @@ private:
bool m_is_sh34;
};
-#endif
+#endif // MAME_CPU_SH_SH_DASM_H
diff --git a/src/devices/cpu/sh/sh_dmac.cpp b/src/devices/cpu/sh/sh_dmac.cpp
new file mode 100644
index 00000000000..39775445ba9
--- /dev/null
+++ b/src/devices/cpu/sh/sh_dmac.cpp
@@ -0,0 +1,115 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_dmac.h
+
+ SH DMA controller
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh_dmac.h"
+#include "sh7042.h"
+
+DEFINE_DEVICE_TYPE(SH_DMAC, sh_dmac_device, "sh_dmac", "SH DMA controller")
+DEFINE_DEVICE_TYPE(SH_DMAC_CHANNEL, sh_dmac_channel_device, "sh_dmac_channel", "SH DMA controller channel")
+
+sh_dmac_device::sh_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_DMAC, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_dmac_device::device_start()
+{
+ save_item(NAME(m_dmaor));
+}
+
+void sh_dmac_device::device_reset()
+{
+ m_dmaor = 0;
+}
+
+u16 sh_dmac_device::dmaor_r()
+{
+ logerror("dmaor_r\n");
+ return m_dmaor;
+}
+
+void sh_dmac_device::dmaor_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_dmaor);
+ logerror("dmaor_w %04x\n", m_dmaor);
+}
+
+sh_dmac_channel_device::sh_dmac_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_DMAC_CHANNEL, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_intc(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_dmac_channel_device::device_start()
+{
+ save_item(NAME(m_sar));
+ save_item(NAME(m_dar));
+ save_item(NAME(m_dmatcr));
+ save_item(NAME(m_chcr));
+}
+
+void sh_dmac_channel_device::device_reset()
+{
+ m_sar = 0;
+ m_dar = 0;
+ m_dmatcr = 0;
+ m_chcr = 0;
+}
+
+u32 sh_dmac_channel_device::sar_r()
+{
+ logerror("sar_r\n");
+ return m_sar;
+}
+
+void sh_dmac_channel_device::sar_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_sar);
+ logerror("sar_w %08x\n", m_sar);
+}
+
+u32 sh_dmac_channel_device::dar_r()
+{
+ logerror("dar_r\n");
+ return m_dar;
+}
+
+void sh_dmac_channel_device::dar_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_dar);
+ logerror("dar_w %08x\n", m_dar);
+}
+
+u32 sh_dmac_channel_device::dmatcr_r()
+{
+ logerror("dmatcr_r\n");
+ return m_dmatcr;
+}
+
+void sh_dmac_channel_device::dmatcr_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_dmatcr);
+ logerror("dmatcr_w %08x\n", m_dmatcr);
+}
+
+u32 sh_dmac_channel_device::chcr_r()
+{
+ logerror("chcr_r\n");
+ return m_chcr;
+}
+
+void sh_dmac_channel_device::chcr_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_chcr);
+ logerror("chcr_w %08x\n", m_chcr);
+}
diff --git a/src/devices/cpu/sh/sh_dmac.h b/src/devices/cpu/sh/sh_dmac.h
new file mode 100644
index 00000000000..3c8436df0d8
--- /dev/null
+++ b/src/devices/cpu/sh/sh_dmac.h
@@ -0,0 +1,79 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_dmac.h
+
+ SH DMA controller
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_DMAC_H
+#define MAME_CPU_SH_SH_DMAC_H
+
+#pragma once
+
+// To generalize eventually
+class sh7042_device;
+class sh_intc_device;
+
+class sh_dmac_device : public device_t {
+public:
+ sh_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template <typename T> sh_dmac_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu)
+ : sh_dmac_device(mconfig, tag, owner)
+ {
+ set_info(cpu);
+ }
+
+ template<typename T> void set_info(T &&cpu) { m_cpu.set_tag(std::forward<T>(cpu)); }
+
+ u16 dmaor_r();
+ void dmaor_w(offs_t, u16 data, u16 mem_mask);
+
+
+protected:
+ required_device<sh7042_device> m_cpu;
+
+ u16 m_dmaor;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+class sh_dmac_channel_device : public device_t {
+public:
+ sh_dmac_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template <typename T, typename U> sh_dmac_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, U &&intc)
+ : sh_dmac_channel_device(mconfig, tag, owner)
+ {
+ set_info(cpu, intc);
+ }
+
+ template<typename T, typename U> void set_info(T &&cpu, U &&intc) { m_cpu.set_tag(std::forward<T>(cpu)); m_intc.set_tag(std::forward<U>(intc)); }
+
+ u32 sar_r();
+ void sar_w(offs_t, u32 data, u32 mem_mask);
+ u32 dar_r();
+ void dar_w(offs_t, u32 data, u32 mem_mask);
+ u32 dmatcr_r();
+ void dmatcr_w(offs_t, u32 data, u32 mem_mask);
+ u32 chcr_r();
+ void chcr_w(offs_t, u32 data, u32 mem_mask);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ required_device<sh_intc_device> m_intc;
+
+ u32 m_sar, m_dar, m_dmatcr, m_chcr;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(SH_DMAC, sh_dmac_device)
+DECLARE_DEVICE_TYPE(SH_DMAC_CHANNEL, sh_dmac_channel_device)
+
+#endif
diff --git a/src/devices/cpu/sh/sh_intc.cpp b/src/devices/cpu/sh/sh_intc.cpp
new file mode 100644
index 00000000000..989cc8d62a1
--- /dev/null
+++ b/src/devices/cpu/sh/sh_intc.cpp
@@ -0,0 +1,151 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_intc.cpp
+
+ SH interrupt controllers family
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh_intc.h"
+
+#include "sh7042.h"
+
+DEFINE_DEVICE_TYPE(SH_INTC, sh_intc_device, "sh_intc", "SH interrupt controller")
+
+const u8 sh_intc_device::pribit[0x100] = {
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 2, 3, 4, 5, 6, 7, 8, 8, 8, 8, 9, 9, 9, 9,
+ 10, 10, 10, 10, 11, 11, 11, 11, 12, 12, 12, 12, 13, 13, 13, 13,
+ 14, 14, 14, 14, 15, 15, 15, 15, 16, 16, 16, 16, 17, 17, 17, 17,
+ 18, 18, 18, 18, 19, 19, 19, 19, 20, 20, 20, 20, 21, 21, 21, 21,
+ 22, 22, 22, 22, 23, 23, 23, 23, 24, 24, 24, 24, 25, 25, 25, 25,
+ 26, 26, 26, 26, 27, 27, 27, 27, 28, 28, 28, 28, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+ 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29, 29,
+};
+
+sh_intc_device::sh_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_INTC, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_intc_device::device_start()
+{
+ save_item(NAME(m_ipr));
+ save_item(NAME(m_icr));
+ save_item(NAME(m_isr));
+ save_item(NAME(m_pending));
+ save_item(NAME(m_lines));
+
+ std::fill(m_ipr.begin(), m_ipr.end(), 0);
+ m_isr = 0;
+ m_icr = 0;
+ m_lines = 0;
+}
+
+void sh_intc_device::device_reset()
+{
+ std::fill(m_pending.begin(), m_pending.end(), 0);
+}
+
+void sh_intc_device::interrupt_taken(int irqline, int vector)
+{
+ // Don't clear an external interrupt which is level and still active
+ if(vector < 64 || vector >= 72 || BIT(m_icr, 7-(vector & 7)) || !BIT(m_lines, vector & 7))
+ m_pending[vector >> 5] &= ~(1 << (vector & 31));
+
+ update_irq();
+}
+
+void sh_intc_device::update_irq()
+{
+ int best_level = -1;
+ int best_vector = 0;
+
+ for(u32 bv = 64/32; bv != 160/32; bv ++) {
+ if(!m_pending[bv])
+ continue;
+ for(u32 iv = 0; iv != 32; iv++) {
+ if(!BIT(m_pending[bv], iv))
+ continue;
+ u32 vector = bv*32 + iv;
+ u32 slot = pribit[vector];
+ u32 shift = 12-4*(slot & 3);
+ int level = (m_ipr[slot >> 2] >> shift) & 15;
+ if(level > best_level) {
+ best_level = level;
+ best_vector = vector;
+ }
+ }
+ }
+ m_cpu->set_internal_interrupt(best_level, best_vector);
+}
+
+void sh_intc_device::internal_interrupt(int vector)
+{
+ m_pending[vector >> 5] |= 1 << (vector & 31);
+ update_irq();
+}
+
+void sh_intc_device::set_input(int inputnum, int state)
+{
+ if(BIT(m_lines, inputnum) == state)
+ return;
+ if(BIT(m_icr, 7-inputnum)) {
+ // Level interrupt
+ if(state)
+ m_pending[64 >> 5] |= 1 << inputnum;
+ else
+ m_pending[64 >> 5] &= ~(1 << inputnum);
+ } else {
+ // Edge interrupt
+ if(state)
+ m_pending[64 >> 5] |= 1 << inputnum;
+ }
+ update_irq();
+}
+
+u16 sh_intc_device::icr_r()
+{
+ return m_icr;
+}
+
+void sh_intc_device::icr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_icr);
+ logerror("icr_w %04x @ %04x\n", data, mem_mask);
+}
+
+u16 sh_intc_device::isr_r()
+{
+ return m_isr;
+}
+
+void sh_intc_device::isr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_isr);
+ logerror("isr_w %04x @ %04x\n", data, mem_mask);
+}
+
+u16 sh_intc_device::ipr_r(offs_t offset)
+{
+ return m_ipr[offset];
+}
+
+void sh_intc_device::ipr_w(offs_t offset, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_ipr[offset]);
+ logerror("ipr_w %x, %04x @ %04x\n", offset, data, mem_mask);
+}
+
diff --git a/src/devices/cpu/sh/sh_intc.h b/src/devices/cpu/sh/sh_intc.h
new file mode 100644
index 00000000000..9a743f4e778
--- /dev/null
+++ b/src/devices/cpu/sh/sh_intc.h
@@ -0,0 +1,58 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_intc.h
+
+ SH interrupt controllers family
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_INTC_H
+#define MAME_CPU_SH_SH_INTC_H
+
+#pragma once
+
+class sh7042_device;
+
+class sh_intc_device : public device_t {
+public:
+ sh_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ template<typename T> sh_intc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu) :
+ sh_intc_device(mconfig, tag, owner)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ }
+
+ void interrupt_taken(int irqline, int vector);
+ void internal_interrupt(int vector);
+ void set_input(int inputnum, int state);
+
+ u16 icr_r();
+ void icr_w(offs_t, u16 data, u16 mem_mask);
+ u16 isr_r();
+ void isr_w(offs_t, u16 data, u16 mem_mask);
+ u16 ipr_r(offs_t offset);
+ void ipr_w(offs_t offset, u16 data, u16 mem_mask);
+
+protected:
+ static const u8 pribit[256];
+
+ std::array<u32, 8> m_pending;
+ std::array<u16, 8> m_ipr;
+
+ u16 m_isr, m_icr;
+
+ u8 m_lines;
+
+ required_device<sh7042_device> m_cpu;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ void update_irq();
+};
+
+DECLARE_DEVICE_TYPE(SH_INTC, sh_intc_device)
+
+#endif // MAME_CPU_SH_SH_INTC_H
diff --git a/src/devices/cpu/sh/sh_mtu.cpp b/src/devices/cpu/sh/sh_mtu.cpp
new file mode 100644
index 00000000000..532a47da5a8
--- /dev/null
+++ b/src/devices/cpu/sh/sh_mtu.cpp
@@ -0,0 +1,529 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_mtu.h
+
+ SH DMA controller
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh_mtu.h"
+#include "sh7042.h"
+
+#define V 1
+
+DEFINE_DEVICE_TYPE(SH_MTU, sh_mtu_device, "sh_mtu", "SH Multifuntion timer pulse unit")
+DEFINE_DEVICE_TYPE(SH_MTU_CHANNEL, sh_mtu_channel_device, "sh_mtu_channel", "SH Multifuntion timer pulse unit channel")
+
+sh_mtu_device::sh_mtu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_MTU, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_timer_channel(*this, "%u", 0)
+{
+}
+
+void sh_mtu_device::device_start()
+{
+ save_item(NAME(m_tstr));
+ save_item(NAME(m_tsyr));
+ save_item(NAME(m_toer));
+ save_item(NAME(m_tocr));
+ save_item(NAME(m_tgcr));
+ save_item(NAME(m_tcdr));
+ save_item(NAME(m_tddr));
+ save_item(NAME(m_tcnts));
+ save_item(NAME(m_tcbr));
+}
+
+void sh_mtu_device::device_reset()
+{
+ m_tstr = 0;
+ m_tsyr = 0;
+ m_toer = 0xc0;
+ m_tocr = 0;
+ m_tgcr = 0x80;
+ m_tcdr = 0xffff;
+ m_tddr = 0xffff;
+ m_tcnts = 0;
+ m_tcbr = 0xffff;
+}
+
+u8 sh_mtu_device::tstr_r()
+{
+ logerror("tstr_r\n");
+ return m_tstr;
+}
+
+void sh_mtu_device::tstr_w(u8 data)
+{
+ m_tstr = data;
+ logerror("tstr_w %02x\n", m_tstr);
+ // To generalize
+ m_timer_channel[0]->set_enable(BIT(m_tstr, 0));
+ m_timer_channel[1]->set_enable(BIT(m_tstr, 1));
+ m_timer_channel[2]->set_enable(BIT(m_tstr, 2));
+ m_timer_channel[3]->set_enable(BIT(m_tstr, 6));
+ m_timer_channel[4]->set_enable(BIT(m_tstr, 7));
+}
+
+u8 sh_mtu_device::tsyr_r()
+{
+ logerror("tsyr_r\n");
+ return m_tsyr;
+}
+
+void sh_mtu_device::tsyr_w(u8 data)
+{
+ m_tsyr = data;
+ logerror("tsyr_w %02x\n", m_tsyr);
+}
+
+u8 sh_mtu_device::toer_r()
+{
+ logerror("toer_r\n");
+ return m_toer;
+}
+
+void sh_mtu_device::toer_w(u8 data)
+{
+ m_toer = data;
+ logerror("toer_w %02x\n", m_toer);
+}
+
+u8 sh_mtu_device::tocr_r()
+{
+ logerror("tocr_r\n");
+ return m_tocr;
+}
+
+void sh_mtu_device::tocr_w(u8 data)
+{
+ m_tocr = data;
+ logerror("tocr_w %02x\n", m_tocr);
+}
+
+u8 sh_mtu_device::tgcr_r()
+{
+ logerror("tgcr_r\n");
+ return m_tgcr;
+}
+
+void sh_mtu_device::tgcr_w(u8 data)
+{
+ m_tgcr = data;
+ logerror("tgcr_w %02x\n", m_tgcr);
+}
+
+u16 sh_mtu_device::tcdr_r()
+{
+ logerror("tcdr_r\n");
+ return m_tcdr;
+}
+
+void sh_mtu_device::tcdr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_tcdr);
+ logerror("tcdr_w %04x\n", m_tcdr);
+}
+
+u16 sh_mtu_device::tddr_r()
+{
+ logerror("tddr_r\n");
+ return m_tddr;
+}
+
+void sh_mtu_device::tddr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_tddr);
+ logerror("tddr_w %04x\n", m_tddr);
+}
+
+u16 sh_mtu_device::tcnts_r()
+{
+ logerror("tcnts_r\n");
+ return m_tcnts;
+}
+
+void sh_mtu_device::tcnts_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_tcnts);
+ logerror("tcnts_w %04x\n", m_tcnts);
+}
+
+u16 sh_mtu_device::tcbr_r()
+{
+ logerror("tcbr_r\n");
+ return m_tcbr;
+}
+
+void sh_mtu_device::tcbr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_tcbr);
+ logerror("tcbr_w %04x\n", m_tcbr);
+}
+
+sh_mtu_channel_device::sh_mtu_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_MTU_CHANNEL, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_chained_timer(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_mtu_channel_device::device_start()
+{
+ m_channel_active = false;
+ device_reset();
+
+ save_item(NAME(m_tgr_count));
+ save_item(NAME(m_tbr_count));
+ save_item(NAME(m_tgr_clearing));
+ save_item(NAME(m_tcr));
+ save_item(NAME(m_tmdr));
+ save_item(NAME(m_tior));
+ save_item(NAME(m_tier));
+ save_item(NAME(m_tsr));
+ save_item(NAME(m_clock_type));
+ save_item(NAME(m_clock_divider));
+ save_item(NAME(m_tcnt));
+ save_item(NAME(m_tgr));
+ save_item(NAME(m_last_clock_update));
+ save_item(NAME(m_event_time));
+ save_item(NAME(m_phase));
+ save_item(NAME(m_counter_cycle));
+ save_item(NAME(m_counter_incrementing));
+ save_item(NAME(m_channel_active));
+
+ m_tsr = 0xc0;
+}
+
+void sh_mtu_channel_device::device_reset()
+{
+ // Don't touch channel_active here, top level device handles it.
+
+ m_tbr_count = 0;
+ m_tgr_clearing = TGR_CLEAR_NONE;
+ m_tcr = 0;
+ m_tmdr = 0xc0;
+ m_tior = 0;
+ m_tier = 0x40 & m_tier_mask;
+ m_clock_type = DIV_1;
+ m_clock_divider = 0;
+ m_tcnt = 0;
+ std::fill(m_tgr.begin(), m_tgr.end(), 0xffff);
+ m_last_clock_update = 0;
+ m_event_time = 0;
+ m_phase = 0;
+ m_counter_cycle = 1;
+ m_counter_incrementing = true;
+}
+
+u8 sh_mtu_channel_device::tcr_r()
+{
+ return m_tcr;
+}
+
+void sh_mtu_channel_device::tcr_w(u8 data)
+{
+ update_counter();
+ m_tcr = data;
+ logerror("tcr_w %02x\n", m_tcr);
+ switch(m_tcr & 0x60) {
+ case 0x00:
+ m_tgr_clearing = TGR_CLEAR_NONE;
+ if(V>=1) logerror("No automatic tcnt clearing\n");
+ break;
+ case 0x20: case 0x40: {
+ m_tgr_clearing = m_tcr & 0x20 ? 0 : 1;
+ if(m_tgr_count > 2 && (m_tcr & 0x80))
+ m_tgr_clearing += 2;
+ if(V>=1) logerror("Auto-clear on tgr%c\n", 'a'+m_tgr_clearing);
+ break;
+ }
+ case 0x60:
+ m_tgr_clearing = TGR_CLEAR_EXT;
+ if(V>=1) logerror("External sync clear\n");
+ break;
+ }
+
+ int count_type = m_count_types[m_tcr & 7];
+ if(count_type >= DIV_1 && m_clock_type <= DIV_4) {
+ m_clock_type = DIV_1;
+ m_clock_divider = count_type - DIV_1;
+ if(V>=1) logerror("clock divider %d (%d)\n", m_clock_divider, 1 << m_clock_divider);
+ if(!m_clock_divider)
+ m_phase = 0;
+ else {
+ switch(m_tcr & 0x18) {
+ case 0x00:
+ m_phase = 0;
+ if(V>=1) logerror("Phase 0\n");
+ break;
+ case 0x08:
+ m_phase = 1 << (m_clock_divider-1);
+ if(V>=1) logerror("Phase 180\n");
+ break;
+ case 0x10: case 0x18:
+ m_phase = 0;
+ m_clock_divider--;
+ if(V>=1) logerror("Phase 0+180\n");
+ break;
+ }
+ }
+
+ } else if(count_type == CHAIN) {
+ m_clock_type = CHAIN;
+ m_clock_divider = 0;
+ m_phase = 0;
+ if(V>=1) logerror("chained timer\n");
+
+ } else if(count_type >= INPUT_A && count_type <= INPUT_D) {
+ m_clock_type = count_type;
+ m_clock_divider = 0;
+ m_phase = 0;
+ if(V>=1) logerror("counting input %c\n", 'a'+count_type-INPUT_A);
+ }
+ recalc_event();
+}
+
+u8 sh_mtu_channel_device::tmdr_r()
+{
+ return m_tmdr;
+}
+
+void sh_mtu_channel_device::tmdr_w(u8 data)
+{
+ m_tmdr = data;
+ logerror("tmdr_w %02x\n", m_tmdr);
+}
+
+u8 sh_mtu_channel_device::tior_r()
+{
+ return m_tior;
+}
+
+void sh_mtu_channel_device::tior_w(u8 data)
+{
+ m_tior = data;
+}
+
+u8 sh_mtu_channel_device::tier_r()
+{
+ return m_tier;
+}
+
+void sh_mtu_channel_device::tier_w(u8 data)
+{
+ update_counter();
+ m_tier = data;
+ if(0)
+ logerror("irq %c%c%c%c%c%c\n",
+ m_tier & IRQ_A ? 'a' : '.',
+ m_tier & IRQ_B ? 'b' : '.',
+ m_tier & IRQ_C ? 'c' : '.',
+ m_tier & IRQ_D ? 'd' : '.',
+ m_tier & IRQ_V ? 'v' : '.',
+ m_tier & IRQ_U ? 'u' : '.');
+ recalc_event();
+}
+
+u8 sh_mtu_channel_device::tsr_r()
+{
+ return m_tsr;
+}
+
+void sh_mtu_channel_device::tsr_w(u8 data)
+{
+ update_counter();
+ m_tsr = (data & 0x80) | (m_tsr & ~data & 0x7f);
+ recalc_event();
+}
+
+u16 sh_mtu_channel_device::tcnt_r()
+{
+ if(!machine().side_effects_disabled())
+ update_counter();
+ // Need to implement phase counting for the rotary controller on the psr540
+ if(m_tmdr & 0xf)
+ return 0;
+ return m_tcnt;
+}
+
+void sh_mtu_channel_device::tcnt_w(offs_t, u16 data, u16 mem_mask)
+{
+ update_counter();
+ COMBINE_DATA(&m_tcnt);
+ recalc_event();
+}
+
+u16 sh_mtu_channel_device::tgr_r(offs_t reg)
+{
+ return m_tgr[reg];
+}
+
+void sh_mtu_channel_device::tgr_w(offs_t reg, u16 data, u16 mem_mask)
+{
+ update_counter();
+ COMBINE_DATA(&m_tgr[reg]);
+ recalc_event();
+}
+
+u16 sh_mtu_channel_device::tgrc_r(offs_t reg)
+{
+ return tgr_r(reg + 2);
+}
+
+void sh_mtu_channel_device::tgrc_w(offs_t reg, u16 data, u16 mem_mask)
+{
+ tgr_w(reg + 2, data, mem_mask);
+}
+
+void sh_mtu_channel_device::set_enable(bool enable)
+{
+ update_counter();
+ m_channel_active = enable;
+ if(enable)
+ logerror("enabled\n");
+ else
+ logerror("disabled\n");
+ recalc_event();
+}
+
+u64 sh_mtu_channel_device::internal_update(u64 current_time)
+{
+ while(m_event_time && current_time >= m_event_time) {
+ update_counter(m_event_time);
+ recalc_event(m_event_time);
+ }
+
+ return m_event_time;
+}
+
+void sh_mtu_channel_device::recalc_event(u64 cur_time)
+{
+ if(!m_channel_active) {
+ m_event_time = 0;
+ return;
+ }
+
+ bool update_cpu = cur_time == 0;
+ u64 old_event_time = m_event_time;
+
+ if(m_clock_type != DIV_1) {
+ m_event_time = 0;
+ if(old_event_time && update_cpu)
+ m_cpu->internal_update();
+
+ return;
+ }
+
+ if(!cur_time)
+ cur_time = m_cpu->current_cycles();
+
+ if(m_counter_incrementing) {
+ u32 event_delay = 0xffffffff;
+ if(m_tgr_clearing >= 0)
+ m_counter_cycle = m_tgr[m_tgr_clearing] + 1;
+ else
+ m_counter_cycle = 0x10000;
+ if((m_tier & IRQ_V && m_interrupt[4] != -1) && (m_counter_cycle == 0x10000 || m_tcnt >= m_counter_cycle))
+ event_delay = 0x10000 - m_tcnt;
+
+ for(int i = 0; i < m_tgr_count; i++)
+ if(BIT(m_tier, i) && m_interrupt[i] != -1) {
+ u32 new_delay = 0xffffffff;
+ u16 cmp = m_tgr[i] + 1;
+ if(cmp > m_tcnt) {
+ if(m_tcnt >= m_counter_cycle || cmp <= m_counter_cycle)
+ new_delay = cmp - m_tcnt;
+ } else if(cmp <= m_counter_cycle) {
+ if(m_tcnt < m_counter_cycle)
+ new_delay = (m_counter_cycle - m_tcnt) + cmp;
+ else
+ new_delay = (0x10000 - m_tcnt) + cmp;
+ }
+
+ if(event_delay > new_delay)
+ event_delay = new_delay;
+ }
+ if(event_delay != 0xffffffff)
+ m_event_time = ((((cur_time + (1ULL << m_clock_divider) - m_phase) >> m_clock_divider) + event_delay - 1) << m_clock_divider) + m_phase;
+ else
+ m_event_time = 0;
+ } else {
+ logerror("decrementing counter\n");
+ exit(1);
+ }
+
+ if(old_event_time != m_event_time && update_cpu)
+ m_cpu->internal_update();
+}
+
+void sh_mtu_channel_device::update_counter(u64 cur_time)
+{
+ if(m_clock_type != DIV_1)
+ return;
+
+ if(!cur_time)
+ cur_time = m_cpu->current_cycles();
+
+ if(!m_channel_active) {
+ m_last_clock_update = cur_time;
+ return;
+ }
+
+ u64 base_time = m_last_clock_update;
+ m_last_clock_update = cur_time;
+ u64 new_time = cur_time;
+ if(m_clock_divider) {
+ base_time = (base_time + m_phase) >> m_clock_divider;
+ new_time = (new_time + m_phase) >> m_clock_divider;
+ }
+ if(new_time == base_time)
+ return;
+
+ if(m_counter_incrementing) {
+ u16 prev = m_tcnt;
+ u64 delta = new_time - base_time;
+ u64 tt = m_tcnt + delta;
+
+ if(prev >= m_counter_cycle) {
+ if(tt >= 0x10000)
+ m_tcnt = (tt - 0x10000) % m_counter_cycle;
+ else
+ m_tcnt = tt;
+ } else
+ m_tcnt = tt % m_counter_cycle;
+
+ for(int i = 0; i < m_tgr_count; i++) {
+ u16 cmp = m_tgr[i] + 1;
+ bool match = m_tcnt == cmp || (tt == cmp && tt == m_counter_cycle);
+ if(!match) {
+ // Need to do additional checks here for software that polls the flags with interrupts disabled, since recalc_event only schedules IRQ events.
+ if(prev >= m_counter_cycle)
+ match = (cmp > prev && tt >= cmp) || (cmp <= m_counter_cycle && m_tcnt < m_counter_cycle && (delta - (0x10000 - prev)) >= cmp);
+ else if(cmp <= m_counter_cycle)
+ match = delta >= m_counter_cycle || (prev < cmp && tt >= cmp) || (m_tcnt <= prev && m_tcnt >= cmp);
+
+ if(match && BIT(m_tier, i) && m_interrupt[i] != -1)
+ logerror("update_counter unexpected TGR %d IRQ\n", i);
+ }
+
+ if(match) {
+ m_tsr |= 1 << i;
+ if(BIT(m_tier, i) && m_interrupt[i] != -1)
+ m_intc->internal_interrupt(m_interrupt[i]);
+ }
+ }
+ if(tt >= 0x10000 && (m_counter_cycle == 0x10000 || prev >= m_counter_cycle)) {
+ m_tsr |= IRQ_V;
+ if(m_tier & IRQ_V && m_interrupt[4] != -1)
+ m_intc->internal_interrupt(m_interrupt[4]);
+ }
+ } else {
+ logerror("decrementing counter\n");
+ exit(1);
+ }
+}
diff --git a/src/devices/cpu/sh/sh_mtu.h b/src/devices/cpu/sh/sh_mtu.h
new file mode 100644
index 00000000000..7d1a9be9d6e
--- /dev/null
+++ b/src/devices/cpu/sh/sh_mtu.h
@@ -0,0 +1,182 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_mtu.h
+
+ SH Multifunction timer pulse unit
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_MTU_H
+#define MAME_CPU_SH_SH_MTU_H
+
+#pragma once
+
+// To generalize eventually
+class sh7042_device;
+class sh_intc_device;
+
+class sh_mtu_channel_device : public device_t {
+public:
+ enum {
+ CHAIN,
+ INPUT_A,
+ INPUT_B,
+ INPUT_C,
+ INPUT_D,
+ DIV_1,
+ DIV_2,
+ DIV_4,
+ DIV_8,
+ DIV_16,
+ DIV_32,
+ DIV_64,
+ DIV_128,
+ DIV_256,
+ DIV_512,
+ DIV_1024,
+ DIV_2048,
+ DIV_4096
+ };
+
+ enum {
+ TGR_CLEAR_NONE = -1,
+ TGR_CLEAR_EXT = -2
+ };
+
+ enum {
+ IRQ_A = 0x01,
+ IRQ_B = 0x02,
+ IRQ_C = 0x04,
+ IRQ_D = 0x08,
+ IRQ_V = 0x10,
+ IRQ_U = 0x20,
+ IRQ_E = 0x80
+ };
+
+ sh_mtu_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template <typename T, typename U> sh_mtu_channel_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int tgr_count, int tier_mask, U &&intc, int irq_base,
+ int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7)
+ : sh_mtu_channel_device(mconfig, tag, owner)
+ {
+ set_info(cpu, intc);
+ m_tgr_count = tgr_count;
+ m_tbr_count = 0;
+ m_tier_mask = tier_mask;
+
+ m_interrupt[0] = irq_base;
+ m_interrupt[1] = irq_base + 1;
+ m_interrupt[2] = tier_mask & 0x04 ? -1 : irq_base + 2;
+ m_interrupt[3] = tier_mask & 0x08 ? -1 : irq_base + 3;
+ m_interrupt[4] = irq_base + 4;
+ m_interrupt[5] = tier_mask & 0x20 ? -1 : irq_base + 5;
+
+ m_count_types[0] = t0;
+ m_count_types[1] = t1;
+ m_count_types[2] = t2;
+ m_count_types[3] = t3;
+ m_count_types[4] = t4;
+ m_count_types[5] = t5;
+ m_count_types[6] = t6;
+ m_count_types[7] = t7;
+ }
+
+ template<typename T, typename U> void set_info(T &&cpu, U &&intc) { m_cpu.set_tag(std::forward<T>(cpu)); m_intc.set_tag(std::forward<U>(intc)); }
+ template<typename T> void set_chain(T &&chain) { m_chained_timer.set_tag(std::forward<T>(chain)); }
+
+ u8 tcr_r();
+ void tcr_w(u8 data);
+ u8 tmdr_r();
+ void tmdr_w(u8 data);
+ u8 tior_r();
+ void tior_w(u8 data);
+ u8 tier_r();
+ void tier_w(u8 data);
+ u8 tsr_r();
+ void tsr_w(u8 data);
+ u16 tcnt_r();
+ void tcnt_w(offs_t, u16 data, u16 mem_mask);
+ u16 tgr_r(offs_t reg);
+ void tgr_w(offs_t reg, u16 data, u16 mem_mask);
+ u16 tgrc_r(offs_t reg);
+ void tgrc_w(offs_t reg, u16 data, u16 mem_mask);
+
+ void set_enable(bool enable);
+ u64 internal_update(u64 current_time);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ required_device<sh_intc_device> m_intc;
+ optional_device<sh_mtu_channel_device> m_chained_timer;
+ int m_interrupt[6];
+ u8 m_tier_mask;
+
+ int m_tgr_count, m_tbr_count;
+ int m_tgr_clearing;
+ u8 m_tcr, m_tmdr, m_tior, m_tier, m_tsr;
+ int m_clock_type, m_clock_divider;
+ u16 m_tcnt;
+ std::array<u16, 4> m_tgr;
+ u64 m_last_clock_update, m_event_time;
+ u32 m_phase, m_counter_cycle;
+ bool m_counter_incrementing;
+ bool m_channel_active;
+ std::array<int, 8> m_count_types;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ void update_counter(u64 cur_time = 0);
+ void recalc_event(u64 cur_time = 0);
+};
+
+class sh_mtu_device : public device_t {
+public:
+ sh_mtu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+
+ template <typename T> sh_mtu_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int timer_count)
+ : sh_mtu_device(mconfig, tag, owner)
+ {
+ set_info(cpu);
+ m_timer_count = timer_count;
+ }
+
+ template<typename T> void set_info(T &&cpu) { m_cpu.set_tag(std::forward<T>(cpu)); }
+
+ u8 tstr_r();
+ void tstr_w(u8 data);
+ u8 tsyr_r();
+ void tsyr_w(u8 data);
+ u8 toer_r();
+ void toer_w(u8 data);
+ u8 tocr_r();
+ void tocr_w(u8 data);
+ u8 tgcr_r();
+ void tgcr_w(u8 data);
+ u16 tcdr_r();
+ void tcdr_w(offs_t, u16 data, u16 mem_mask);
+ u16 tddr_r();
+ void tddr_w(offs_t, u16 data, u16 mem_mask);
+ u16 tcnts_r();
+ void tcnts_w(offs_t, u16 data, u16 mem_mask);
+ u16 tcbr_r();
+ void tcbr_w(offs_t, u16 data, u16 mem_mask);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ required_device_array<sh_mtu_channel_device, 5> m_timer_channel;
+
+ int m_timer_count;
+
+ u8 m_tstr, m_tsyr, m_toer, m_tocr, m_tgcr;
+ u16 m_tcdr, m_tddr, m_tcnts, m_tcbr;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(SH_MTU, sh_mtu_device)
+DECLARE_DEVICE_TYPE(SH_MTU_CHANNEL, sh_mtu_channel_device)
+
+#endif
diff --git a/src/devices/cpu/sh/sh_port.cpp b/src/devices/cpu/sh/sh_port.cpp
new file mode 100644
index 00000000000..2cf5735826b
--- /dev/null
+++ b/src/devices/cpu/sh/sh_port.cpp
@@ -0,0 +1,109 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_port.h
+
+ SH i/o ports
+
+***************************************************************************/
+
+#include "emu.h"
+#include "sh_intc.h"
+
+#include "sh7042.h"
+
+DEFINE_DEVICE_TYPE(SH_PORT16, sh_port16_device, "sh_port16", "SH 16-bits port")
+DEFINE_DEVICE_TYPE(SH_PORT32, sh_port32_device, "sh_port32", "SH 32-bits port")
+
+sh_port16_device::sh_port16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_PORT16, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_port16_device::device_start()
+{
+ m_io = m_default_io;
+ save_item(NAME(m_dr));
+ save_item(NAME(m_io));
+}
+
+void sh_port16_device::device_reset()
+{
+}
+
+u16 sh_port16_device::dr_r()
+{
+ if(~m_io & ~m_mask)
+ return (m_dr & m_io) | (m_cpu->do_read_port16(m_index) & ~m_io);
+ return m_dr;
+}
+
+void sh_port16_device::dr_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_dr);
+ m_dr &= ~m_mask;
+ if(m_io)
+ m_cpu->do_write_port16(m_index, m_dr & m_io, m_io);
+}
+
+u16 sh_port16_device::io_r()
+{
+ return m_io;
+}
+
+void sh_port16_device::io_w(offs_t, u16 data, u16 mem_mask)
+{
+ COMBINE_DATA(&m_io);
+ m_io &= ~m_mask;
+ if(m_io)
+ m_cpu->do_write_port16(m_index, m_dr & m_io, m_io);
+}
+
+
+sh_port32_device::sh_port32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_PORT32, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG)
+{
+}
+
+void sh_port32_device::device_start()
+{
+ m_io = m_default_io;
+ save_item(NAME(m_dr));
+ save_item(NAME(m_io));
+}
+
+void sh_port32_device::device_reset()
+{
+}
+
+u32 sh_port32_device::dr_r()
+{
+ if((~m_io) & (~m_mask))
+ return (m_dr & m_io) | (m_cpu->do_read_port32(m_index) & ~m_io);
+ return m_dr;
+}
+
+void sh_port32_device::dr_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_dr);
+ m_dr &= ~m_mask;
+ if(m_io)
+ m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
+}
+
+u32 sh_port32_device::io_r()
+{
+ return m_io;
+}
+
+void sh_port32_device::io_w(offs_t, u32 data, u32 mem_mask)
+{
+ COMBINE_DATA(&m_io);
+ m_io &= ~m_mask;
+ if(m_io)
+ m_cpu->do_write_port32(m_index, m_dr & m_io, m_io);
+}
+
diff --git a/src/devices/cpu/sh/sh_port.h b/src/devices/cpu/sh/sh_port.h
new file mode 100644
index 00000000000..45f7d14feaf
--- /dev/null
+++ b/src/devices/cpu/sh/sh_port.h
@@ -0,0 +1,75 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_port.h
+
+ SH i/o ports
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_PORT_H
+#define MAME_CPU_SH_SH_PORT_H
+
+#pragma once
+
+class sh7042_device;
+
+class sh_port16_device : public device_t {
+public:
+ sh_port16_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ template<typename T> sh_port16_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int index, u16 default_io, u16 mask) :
+ sh_port16_device(mconfig, tag, owner)
+ {
+ m_index = index;
+ m_default_io = default_io;
+ m_mask = mask;
+ m_cpu.set_tag(std::forward<T>(cpu));
+ }
+
+ u16 dr_r();
+ void dr_w(offs_t, u16 data, u16 mem_mask);
+ u16 io_r();
+ void io_w(offs_t, u16 data, u16 mem_mask);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ int m_index;
+ u16 m_default_io, m_mask;
+ u16 m_dr, m_io;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+class sh_port32_device : public device_t {
+public:
+ sh_port32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
+ template<typename T> sh_port32_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu, int index, u32 default_io, u32 mask) :
+ sh_port32_device(mconfig, tag, owner)
+ {
+ m_index = index;
+ m_default_io = default_io;
+ m_mask = mask;
+ m_cpu.set_tag(std::forward<T>(cpu));
+ }
+
+ u32 dr_r();
+ void dr_w(offs_t, u32 data, u32 mem_mask);
+ u32 io_r();
+ void io_w(offs_t, u32 data, u32 mem_mask);
+
+protected:
+ required_device<sh7042_device> m_cpu;
+ int m_index;
+ u32 m_default_io, m_mask;
+ u32 m_dr, m_io;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+};
+
+DECLARE_DEVICE_TYPE(SH_PORT16, sh_port16_device)
+DECLARE_DEVICE_TYPE(SH_PORT32, sh_port32_device)
+
+#endif // MAME_CPU_SH_SH_PORT_H
diff --git a/src/devices/cpu/sh/sh_sci.cpp b/src/devices/cpu/sh/sh_sci.cpp
new file mode 100644
index 00000000000..edb35d84489
--- /dev/null
+++ b/src/devices/cpu/sh/sh_sci.cpp
@@ -0,0 +1,765 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+
+#include "emu.h"
+#include "sh_sci.h"
+#include "sh7042.h"
+#include "sh_intc.h"
+
+#define LOG_REGS (1 << 1U) // Register writes
+#define LOG_RREGS (1 << 2U) // Register reads
+#define LOG_RATE (1 << 3U) // Bitrate setting
+#define LOG_DATA (1 << 4U) // Bytes transmitted
+#define LOG_CLOCK (1 << 5U) // Clock and transmission start/stop
+#define LOG_STATE (1 << 6U) // State machine states
+#define LOG_TICK (1 << 7U) // Clock ticks
+
+#define VERBOSE (LOG_DATA|LOG_RATE)
+
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(SH_SCI, sh_sci_device, "sh_sci", "SH Serial Communications Interface")
+
+
+// Clocking:
+// Async mode:
+// The circuit wants 16 events per bit.
+// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
+// then by (brr+1) then by 2.
+// * External clocking: the external clock is supposed to be 16*bitrate.
+// Sync mode:
+// The circuit wants 2 events per bit, a positive and a negative edge.
+// * Internal clocking: the cpu clock is divided by one of (1, 4, 16, 64) from the cks field of smr
+// then by (brr+1) then by 2. Events are then interpreted has been alternatively positive and
+// negative (e.g. another divide-by-two, sync-wise).
+// * External clocking: the external clock is supposed to be at bitrate, both edges are used.
+//
+// Synchronization:
+// Async mode:
+// Both modes use a 4-bits counter incremented on every event (16/bit).
+//
+// * Transmit sets the counter to 0 at transmit start. Output data line changes value
+// on counter == 0. If the clock output is required, clk=1 outside of transmit,
+// clk=0 on counter==0, clk=1 on counter==8.
+//
+// * Receive sets the counter to 0 when the data line initially goes down (start bit)
+// Output line is read on counter==8. It is unknown whether the counter is reset
+// on every data line level change.
+//
+// Sync mode:
+// * Transmit changes the data line on negative edges, the clock line, following positive and
+// negative edge definition, is output as long as transmit is active and is otherwise 1.
+//
+// * Receive reads the data line on positive edges.
+//
+// Framing:
+// Async mode: 1 bit of start at 0, 7 or 8 bits of data, nothing or 1 bit of parity or 1 bit of multiprocessing, 1 or 2 bits of stop at 1.
+// Sync mode: 8 bits of data.
+//
+// Multiprocessing bit is an extra bit which value can be set on transmit in bit zero of ssr.
+// On receive when zero the byte is dropped.
+
+
+const char *const sh_sci_device::state_names[] = { "idle", "start", "bit", "parity", "stop", "last-tick" };
+
+sh_sci_device::sh_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, SH_SCI, tag, owner, clock),
+ m_cpu(*this, finder_base::DUMMY_TAG),
+ m_intc(*this, finder_base::DUMMY_TAG),
+ m_external_to_internal_ratio(0), m_internal_to_external_ratio(0), m_id(0), m_eri_int(0), m_rxi_int(0), m_txi_int(0), m_tei_int(0),
+ m_tx_state(0), m_rx_state(0), m_tx_bit(0), m_rx_bit(0), m_clock_state(0), m_tx_parity(0), m_rx_parity(0), m_tx_clock_counter(0), m_rx_clock_counter(0),
+ m_clock_mode(INTERNAL_ASYNC), m_ext_clock_value(false), m_rx_value(true),
+ m_rdr(0), m_tdr(0), m_smr(0), m_scr(0), m_ssr(0), m_brr(0), m_rsr(0), m_tsr(0), m_clock_event(0), m_divider(0)
+{
+ m_external_clock_period = attotime::never;
+}
+
+void sh_sci_device::do_set_external_clock_period(const attotime &period)
+{
+ m_external_clock_period = period;
+}
+
+void sh_sci_device::smr_w(u8 data)
+{
+ m_smr = data;
+
+ LOGMASKED(LOG_REGS, "smr_w %02x %s %c%c%c%s /%d (%06x)\n", data,
+ data & SMR_CA ? "sync" : "async",
+ data & SMR_CHR ? '7' : '8',
+ data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n',
+ data & SMR_STOP ? '2' : '1',
+ data & SMR_MP ? " mp" : "",
+ 1 << 2*(data & SMR_CKS),
+ m_cpu->pc());
+
+ clock_update();
+}
+
+u8 sh_sci_device::smr_r()
+{
+ LOGMASKED(LOG_RREGS, "smr_r %02x (%06x)\n", m_smr, m_cpu->pc());
+ return m_smr;
+}
+
+void sh_sci_device::brr_w(u8 data)
+{
+ m_brr = data;
+ LOGMASKED(LOG_REGS, "brr_w %02x (%06x)\n", m_brr, m_cpu->pc());
+ clock_update();
+}
+
+u8 sh_sci_device::brr_r()
+{
+ LOGMASKED(LOG_RREGS, "brr_r %02x (%06x)\n", m_brr, m_cpu->pc());
+ return m_brr;
+}
+
+bool sh_sci_device::is_sync_start() const
+{
+ return (m_smr & SMR_CA) && ((m_scr & (SCR_TE|SCR_RE)) == (SCR_TE|SCR_RE));
+}
+
+bool sh_sci_device::has_recv_error() const
+{
+ return m_ssr & (SSR_ORER|SSR_PER|SSR_FER);
+}
+
+void sh_sci_device::scr_w(u8 data)
+{
+ LOGMASKED(LOG_REGS, "scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", data,
+ data & SCR_TIE ? " txi" : "",
+ data & SCR_RIE ? " rxi" : "",
+ data & SCR_TE ? " tx" : "",
+ data & SCR_RE ? " rx" : "",
+ data & SCR_MPIE ? " mpi" : "",
+ data & SCR_TEIE ? " tei" : "",
+ data & SCR_CKE,
+ m_cpu->pc());
+
+ u8 delta = m_scr ^ data;
+ m_scr = data;
+ clock_update();
+
+ if((delta & SCR_RE) && !(m_scr & SCR_RE)) {
+ m_rx_state = ST_IDLE;
+ clock_stop(CLK_RX);
+ }
+
+ if((delta & SCR_RE) && (m_scr & SCR_RE) && m_rx_state == ST_IDLE && !has_recv_error() && !is_sync_start())
+ rx_start();
+ if((delta & SCR_TIE) && (m_scr & SCR_TIE) && (m_ssr & SSR_TDRE))
+ m_intc->internal_interrupt(m_txi_int);
+ if((delta & SCR_TEIE) && (m_scr & SCR_TEIE) && (m_ssr & SSR_TEND))
+ m_intc->internal_interrupt(m_tei_int);
+ if((delta & SCR_RIE) && (m_scr & SCR_RIE) && (m_ssr & SSR_RDRF))
+ m_intc->internal_interrupt(m_rxi_int);
+ if((delta & SCR_RIE) && (m_scr & SCR_RIE) && has_recv_error())
+ m_intc->internal_interrupt(m_eri_int);
+}
+
+u8 sh_sci_device::scr_r()
+{
+ LOGMASKED(LOG_RREGS, "scr_r %02x (%06x)\n", m_scr, m_cpu->pc());
+ return m_scr;
+}
+
+void sh_sci_device::tdr_w(u8 data)
+{
+ LOGMASKED(LOG_REGS, "tdr_w %02x (%06x)\n", data, m_cpu->pc());
+ m_tdr = data;
+#if 0
+ if(m_cpu->access_is_dma()) {
+ m_ssr &= ~SSR_TDRE;
+ if(m_tx_state == ST_IDLE)
+ tx_start();
+ }
+#endif
+}
+
+u8 sh_sci_device::tdr_r()
+{
+ LOGMASKED(LOG_RREGS, "tdr_r %02x (%06x)\n", m_tdr, m_cpu->pc());
+ return m_tdr;
+}
+
+void sh_sci_device::ssr_w(u8 data)
+{
+ if(!(m_scr & SCR_TE)) {
+ data |= SSR_TDRE;
+ m_ssr |= SSR_TDRE;
+ }
+ if((m_ssr & SSR_TDRE) && !(data & SSR_TDRE))
+ m_ssr &= ~SSR_TEND;
+ m_ssr = ((m_ssr & ~SSR_MPBT) | (data & SSR_MPBT)) & (data | (SSR_TEND|SSR_MPB|SSR_MPBT));
+ LOGMASKED(LOG_REGS, "ssr_w %02x -> %02x (%06x)\n", data, m_ssr, m_cpu->pc());
+
+ if(m_tx_state == ST_IDLE && !(m_ssr & SSR_TDRE))
+ tx_start();
+
+ if((m_scr & SCR_RE) && m_rx_state == ST_IDLE && !has_recv_error() && !is_sync_start())
+ rx_start();
+}
+
+u8 sh_sci_device::ssr_r()
+{
+ LOGMASKED(LOG_RREGS, "ssr_r %02x (%06x)\n", m_ssr, m_cpu->pc());
+ return m_ssr;
+}
+
+u8 sh_sci_device::rdr_r()
+{
+ LOGMASKED(LOG_RREGS, "rdr_r %02x (%06x)\n", m_rdr, m_cpu->pc());
+
+#if 0
+ if(!machine().side_effects_disabled() && m_cpu->access_is_dma())
+ m_ssr &= ~SSR_RDRF;
+#endif
+ return m_rdr;
+}
+
+void sh_sci_device::scmr_w(u8 data)
+{
+ LOGMASKED(LOG_REGS, "scmr_w %02x (%06x)\n", data, m_cpu->pc());
+}
+
+u8 sh_sci_device::scmr_r()
+{
+ LOGMASKED(LOG_RREGS, "scmr_r (%06x)\n", m_cpu->pc());
+ return 0x00;
+}
+
+void sh_sci_device::clock_update()
+{
+ m_divider = 2 << (2*(m_smr & SMR_CKS));
+ m_divider *= m_brr+1;
+
+ if(m_smr & SMR_CA) {
+ if(m_scr & SCR_CKE1)
+ m_clock_mode = EXTERNAL_SYNC;
+ else
+ m_clock_mode = INTERNAL_SYNC_OUT;
+ } else {
+ if(m_scr & SCR_CKE1)
+ m_clock_mode = EXTERNAL_ASYNC;
+ else if(m_scr & SCR_CKE0)
+ m_clock_mode = INTERNAL_ASYNC_OUT;
+ else
+ m_clock_mode = INTERNAL_ASYNC;
+ }
+
+ if(m_clock_mode == EXTERNAL_ASYNC && !m_external_clock_period.is_never())
+ m_clock_mode = EXTERNAL_RATE_ASYNC;
+ if(m_clock_mode == EXTERNAL_SYNC && !m_external_clock_period.is_never())
+ m_clock_mode = EXTERNAL_RATE_SYNC;
+
+ if(VERBOSE & LOG_RATE) {
+ std::string new_message;
+ switch(m_clock_mode) {
+ case INTERNAL_ASYNC:
+ new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps\n", int(m_cpu->clock() / m_divider), int(m_cpu->clock() / (m_divider*16)));
+ break;
+ case INTERNAL_ASYNC_OUT:
+ new_message = util::string_format("clock internal at %d Hz, async, bitrate %d bps, output\n", int(m_cpu->clock() / m_divider), int(m_cpu->clock() / (m_divider*16)));
+ break;
+ case EXTERNAL_ASYNC:
+ new_message = "clock external, async\n";
+ break;
+ case EXTERNAL_RATE_ASYNC:
+ new_message = util::string_format("clock external at %d Hz, async, bitrate %d bps\n", int(m_cpu->clock()*m_internal_to_external_ratio), int(m_cpu->clock()*m_internal_to_external_ratio/16));
+ break;
+ case INTERNAL_SYNC_OUT:
+ new_message = util::string_format("clock internal at %d Hz, sync, output\n", int(m_cpu->clock() / (m_divider*2)));
+ break;
+ case EXTERNAL_SYNC:
+ new_message = "clock external, sync\n";
+ break;
+ case EXTERNAL_RATE_SYNC:
+ new_message = util::string_format("clock external at %d Hz, sync\n", int(m_cpu->clock()*m_internal_to_external_ratio));
+ break;
+ }
+ if(new_message != m_last_clock_message) {
+ (LOG_OUTPUT_FUNC)(new_message);
+ m_last_clock_message = std::move(new_message);
+ }
+ }
+}
+
+void sh_sci_device::device_start()
+{
+ if(m_external_clock_period.is_never()) {
+ m_internal_to_external_ratio = 0;
+ m_external_to_internal_ratio = 0;
+ } else {
+ m_external_to_internal_ratio = (m_external_clock_period*m_cpu->clock()).as_double();
+ m_internal_to_external_ratio = 1/m_external_to_internal_ratio;
+ }
+
+ save_item(NAME(m_tx_state));
+ save_item(NAME(m_rx_state));
+ save_item(NAME(m_tx_bit));
+ save_item(NAME(m_rx_bit));
+ save_item(NAME(m_clock_state));
+ save_item(NAME(m_tx_parity));
+ save_item(NAME(m_rx_parity));
+ save_item(NAME(m_tx_clock_counter));
+ save_item(NAME(m_rx_clock_counter));
+ save_item(NAME(m_clock_mode));
+ save_item(NAME(m_ext_clock_value));
+ save_item(NAME(m_rx_value));
+
+ save_item(NAME(m_rdr));
+ save_item(NAME(m_tdr));
+ save_item(NAME(m_smr));
+ save_item(NAME(m_scr));
+ save_item(NAME(m_ssr));
+ save_item(NAME(m_brr));
+ save_item(NAME(m_rsr));
+ save_item(NAME(m_tsr));
+ save_item(NAME(m_clock_event));
+ save_item(NAME(m_clock_step));
+ save_item(NAME(m_divider));
+}
+
+void sh_sci_device::device_reset()
+{
+ m_rdr = 0x00;
+ m_tdr = 0xff;
+ m_smr = 0x00;
+ m_scr = 0x00;
+ m_ssr = 0x84;
+ m_brr = 0xff;
+ m_rsr = 0x00;
+ m_tsr = 0xff;
+ m_rx_bit = 0;
+ m_tx_bit = 0;
+ m_tx_state = ST_IDLE;
+ m_rx_state = ST_IDLE;
+ m_clock_state = 0;
+ m_clock_mode = INTERNAL_ASYNC;
+ m_clock_event = 0;
+ clock_update();
+ m_ext_clock_value = true;
+ m_tx_clock_counter = 0;
+ m_rx_clock_counter = 0;
+ m_cpu->do_sci_clk(m_id, 1);
+ m_cpu->do_sci_tx(m_id, 1);
+}
+
+TIMER_CALLBACK_MEMBER(sh_sci_device::sync_tick)
+{
+ // Used only to force system-wide syncs
+}
+
+void sh_sci_device::do_rx_w(int state)
+{
+#if 0
+ if(m_cpu->standby()) {
+ m_rx_value = state;
+ return;
+ }
+#endif
+
+ if(state != m_rx_value && (m_clock_state & CLK_RX))
+ if(m_rx_clock_counter == 1 || m_rx_clock_counter == 15)
+ m_rx_clock_counter = 0;
+
+ m_rx_value = state;
+ if(!m_rx_value && !(m_clock_state & CLK_RX) && m_rx_state != ST_IDLE)
+ clock_start(CLK_RX);
+}
+
+void sh_sci_device::do_clk_w(int state)
+{
+ if(m_ext_clock_value == state)
+ return;
+
+ m_ext_clock_value = state;
+ if(!m_clock_state /* || m_cpu->standby() */)
+ return;
+
+ if(m_clock_mode == EXTERNAL_ASYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_async_tick();
+ if(m_clock_state & CLK_RX)
+ rx_async_tick();
+ } else if(m_clock_mode == EXTERNAL_SYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_sync_tick();
+ if(m_clock_state & CLK_RX)
+ rx_sync_tick();
+ }
+}
+
+u64 sh_sci_device::internal_update(u64 current_time)
+{
+ if(!m_clock_event || current_time < m_clock_event)
+ return m_clock_event;
+
+ if(m_clock_mode == INTERNAL_ASYNC || m_clock_mode == INTERNAL_ASYNC_OUT || m_clock_mode == EXTERNAL_RATE_ASYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_async_tick();
+ if(m_clock_state & CLK_RX)
+ rx_async_tick();
+ } else if(m_clock_mode == INTERNAL_SYNC_OUT || m_clock_mode == EXTERNAL_RATE_SYNC) {
+ if(m_clock_state & CLK_TX)
+ tx_sync_tick();
+ if(m_clock_state & CLK_RX)
+ rx_sync_tick();
+ }
+
+ if(m_clock_state) {
+ if(m_clock_step)
+ m_clock_event += m_clock_step;
+ else if(m_clock_mode == EXTERNAL_RATE_ASYNC || m_clock_mode == EXTERNAL_RATE_SYNC)
+ m_clock_event = u64(u64(m_clock_event * m_internal_to_external_ratio + 1) * m_external_to_internal_ratio + 1);
+ else
+ m_clock_event = 0;
+
+ if(m_clock_event)
+ m_cpu->internal_update();
+
+ } else if(!m_clock_state) {
+ m_clock_event = 0;
+ if(m_clock_mode == INTERNAL_ASYNC_OUT || m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+ }
+
+ return m_clock_event;
+}
+
+void sh_sci_device::clock_start(int mode)
+{
+ // Happens when back-to-back
+ if(m_clock_state & mode)
+ return;
+
+ if(mode == CLK_TX)
+ m_tx_clock_counter = 15;
+ else
+ m_rx_clock_counter = 15;
+
+ m_clock_state |= mode;
+ if(m_clock_state != mode)
+ return;
+
+ m_clock_step = 0;
+
+ switch(m_clock_mode) {
+ case INTERNAL_ASYNC:
+ case INTERNAL_ASYNC_OUT:
+ case INTERNAL_SYNC_OUT: {
+ LOGMASKED(LOG_CLOCK, "Starting internal clock\n");
+ m_clock_step = m_divider;
+ u64 now = m_cpu->current_cycles();
+ m_clock_event = (now / m_clock_step + 1) * m_clock_step;
+ m_cpu->internal_update();
+ break;
+ }
+
+ case EXTERNAL_RATE_ASYNC:
+ case EXTERNAL_RATE_SYNC: {
+ LOGMASKED(LOG_CLOCK, "Simulating external clock\n", m_clock_mode == EXTERNAL_RATE_ASYNC ? "async" : "sync");
+ u64 now = m_cpu->current_cycles();
+ m_clock_event = u64(u64(now * m_internal_to_external_ratio + 1) * m_external_to_internal_ratio + 1);
+ m_cpu->internal_update();
+ break;
+ }
+
+ case EXTERNAL_ASYNC:
+ case EXTERNAL_SYNC:
+ LOGMASKED(LOG_CLOCK, "Waiting for external clock\n");
+ break;
+ }
+}
+
+void sh_sci_device::clock_stop(int mode)
+{
+ m_clock_state &= ~mode;
+ if(!m_clock_state) {
+ m_clock_event = 0;
+ m_clock_step = 0;
+ LOGMASKED(LOG_CLOCK, "Stopping clocks\n");
+ }
+ m_cpu->internal_update();
+}
+
+void sh_sci_device::tx_start()
+{
+ m_ssr |= SSR_TDRE;
+ m_tsr = m_tdr;
+ m_tx_parity = m_smr & SMR_OE ? 0 : 1;
+ LOGMASKED(LOG_DATA, "start transmit %02x '%c'\n", m_tsr, m_tsr >= 32 && m_tsr < 127 ? m_tsr : '.');
+ if(m_scr & SCR_TIE)
+ m_intc->internal_interrupt(m_txi_int);
+ if(m_smr & SMR_CA) {
+ m_tx_state = ST_BIT;
+ m_tx_bit = 8;
+ } else {
+ m_tx_state = ST_START;
+ m_tx_bit = 1;
+ }
+ clock_start(CLK_TX);
+ if(m_rx_state == ST_IDLE && !has_recv_error() && is_sync_start())
+ rx_start();
+}
+
+void sh_sci_device::tx_async_tick()
+{
+ m_tx_clock_counter = (m_tx_clock_counter + 1) & 15;
+ LOGMASKED(LOG_TICK, "tx_async_tick %x\n", m_tx_clock_counter);
+ if(m_tx_clock_counter == 0) {
+ tx_async_step();
+
+ if(m_clock_mode == INTERNAL_ASYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ } else if(m_tx_clock_counter == 8 && m_clock_mode == INTERNAL_ASYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+}
+
+void sh_sci_device::tx_async_step()
+{
+ LOGMASKED(LOG_STATE, "tx_async_step state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
+ switch(m_tx_state) {
+ case ST_START:
+ m_cpu->do_sci_tx(m_id, false);
+ assert(m_tx_bit == 1);
+ m_tx_state = ST_BIT;
+ m_tx_bit = m_smr & SMR_CHR ? 7 : 8;
+ break;
+
+ case ST_BIT:
+ m_tx_parity ^= (m_tsr & 1);
+ m_cpu->do_sci_tx(m_id, m_tsr & 1);
+ m_tsr >>= 1;
+ m_tx_bit--;
+ if(!m_tx_bit) {
+ if(m_smr & SMR_CA) {
+ if(!(m_ssr & SSR_TDRE))
+ tx_start();
+ else {
+ m_tx_state = ST_LAST_TICK;
+ m_tx_bit = 0;
+ }
+ } else if(m_smr & SMR_PE) {
+ m_tx_state = ST_PARITY;
+ m_tx_bit = 1;
+ } else {
+ m_tx_state = ST_STOP;
+ m_tx_bit = m_smr & SMR_STOP ? 2 : 1;
+ }
+ }
+ break;
+
+ case ST_PARITY:
+ m_cpu->do_sci_tx(m_id, m_tx_parity);
+ assert(m_tx_bit == 1);
+ m_tx_state = ST_STOP;
+ m_tx_bit = m_smr & SMR_STOP ? 2 : 1;
+ break;
+
+ case ST_STOP:
+ m_cpu->do_sci_tx(m_id, true);
+ m_tx_bit--;
+ if(!m_tx_bit) {
+ if(!(m_ssr & SSR_TDRE))
+ tx_start();
+ else {
+ m_tx_state = ST_LAST_TICK;
+ m_tx_bit = 0;
+ }
+ }
+ break;
+
+ case ST_LAST_TICK:
+ m_tx_state = ST_IDLE;
+ m_tx_bit = 0;
+ clock_stop(CLK_TX);
+ m_cpu->do_sci_tx(m_id, 1);
+ m_ssr |= SSR_TEND;
+ if(m_scr & SCR_TEIE)
+ m_intc->internal_interrupt(m_tei_int);
+
+ // if there's more to send, start the transmitter
+ if((m_scr & SCR_TE) && !(m_ssr & SSR_TDRE))
+ tx_start();
+ break;
+
+ default:
+ abort();
+ }
+ LOGMASKED(LOG_STATE, " -> state=%s bit=%d\n", state_names[m_tx_state], m_tx_bit);
+}
+
+void sh_sci_device::tx_sync_tick()
+{
+ m_tx_clock_counter = (m_tx_clock_counter + 1) & 1;
+ LOGMASKED(LOG_TICK, "tx_sync_tick %x\n", m_tx_clock_counter);
+ if(m_tx_clock_counter == 0) {
+ tx_sync_step();
+
+ if(m_clock_mode == INTERNAL_SYNC_OUT && m_tx_state != ST_IDLE)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ } else if(m_tx_clock_counter == 1 && m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+}
+
+void sh_sci_device::tx_sync_step()
+{
+ LOGMASKED(LOG_STATE, "tx_sync_step bit=%d\n", m_tx_bit);
+ if(!m_tx_bit) {
+ m_tx_state = ST_IDLE;
+ clock_stop(CLK_TX);
+ m_cpu->do_sci_tx(m_id, 1);
+ m_ssr |= SSR_TEND;
+ if(m_scr & SCR_TEIE)
+ m_intc->internal_interrupt(m_tei_int);
+
+ // if there's more to send, start the transmitter
+ if((m_scr & SCR_TE) && !(m_ssr & SSR_TDRE))
+ tx_start();
+ } else {
+ m_cpu->do_sci_tx(m_id, m_tsr & 1);
+ m_tsr >>= 1;
+ m_tx_bit--;
+ }
+}
+
+void sh_sci_device::rx_start()
+{
+ m_rx_parity = m_smr & SMR_OE ? 0 : 1;
+ m_rsr = 0x00;
+ LOGMASKED(LOG_STATE, "start receive\n");
+ if(m_smr & SMR_CA) {
+ m_rx_state = ST_BIT;
+ m_rx_bit = 8;
+ clock_start(CLK_RX);
+ } else {
+ m_rx_state = ST_START;
+ m_rx_bit = 1;
+ if(!m_rx_value)
+ clock_start(CLK_RX);
+ }
+}
+
+void sh_sci_device::rx_done()
+{
+ if(!(m_ssr & SSR_FER)) {
+ if((m_smr & SMR_PE) && m_rx_parity) {
+ m_ssr |= SSR_PER;
+ LOGMASKED(LOG_DATA, "Receive parity error\n");
+ } else if(m_ssr & SSR_RDRF) {
+ m_ssr |= SSR_ORER;
+ LOGMASKED(LOG_DATA, "Receive overrun\n");
+ } else {
+ m_ssr |= SSR_RDRF;
+ LOGMASKED(LOG_DATA, "Received %02x '%c'\n", m_rsr, m_rsr >= 32 && m_rsr < 127 ? m_rsr : '.');
+ m_rdr = m_rsr;
+ }
+ }
+ if(m_scr & SCR_RIE) {
+ if(has_recv_error())
+ m_intc->internal_interrupt(m_eri_int);
+ else
+ m_intc->internal_interrupt(m_rxi_int);
+ }
+ if((m_scr & SCR_RE) && !has_recv_error() && !is_sync_start())
+ rx_start();
+ else {
+ clock_stop(CLK_RX);
+ m_rx_state = ST_IDLE;
+ }
+}
+
+void sh_sci_device::rx_async_tick()
+{
+ m_rx_clock_counter = (m_rx_clock_counter + 1) & 15;
+ LOGMASKED(LOG_TICK, "rx_async_tick %x\n", m_rx_clock_counter);
+ if(m_rx_clock_counter == 8)
+ rx_async_step();
+}
+
+void sh_sci_device::rx_async_step()
+{
+ LOGMASKED(LOG_STATE, "rx_async_step state=%s bit=%d\n", state_names[m_rx_state], m_rx_bit);
+ switch(m_rx_state) {
+ case ST_START:
+ if(m_rx_value) {
+ clock_stop(CLK_RX);
+ break;
+ }
+ m_rx_state = ST_BIT;
+ m_rx_bit = m_smr & SMR_CHR ? 7 : 8;
+ break;
+
+ case ST_BIT:
+ m_rx_parity ^= m_rx_value;
+ m_rsr >>= 1;
+ if(m_rx_value) {
+ m_rx_parity = !m_rx_parity;
+ m_rsr |= (m_smr & (SMR_CA|SMR_CHR)) == SMR_CHR ? 0x40 : 0x80;
+ }
+ m_rx_bit--;
+ if(!m_rx_bit) {
+ if(m_smr & SMR_CA)
+ rx_done();
+ else if(m_smr & SMR_PE) {
+ m_rx_state = ST_PARITY;
+ m_rx_bit = 1;
+ } else {
+ m_rx_state = ST_STOP;
+ m_rx_bit = 1; // Always 1 on rx
+ }
+ }
+ break;
+
+ case ST_PARITY:
+ m_rx_parity ^= m_rx_value;
+ assert(m_rx_bit == 1);
+ m_rx_state = ST_STOP;
+ m_rx_bit = 1;
+ break;
+
+ case ST_STOP:
+ assert(m_rx_bit == 1);
+ if(!m_rx_value)
+ m_ssr |= SSR_FER;
+ else if((m_smr & SMR_PE) && m_rx_parity)
+ m_ssr |= SSR_PER;
+ rx_done();
+ break;
+
+ default:
+ abort();
+ }
+ LOGMASKED(LOG_STATE, " -> state=%s, bit=%d\n", state_names[m_rx_state], m_rx_bit);
+}
+
+void sh_sci_device::rx_sync_tick()
+{
+ m_rx_clock_counter = (m_rx_clock_counter + 1) & 1;
+ LOGMASKED(LOG_TICK, "rx_sync_tick %x\n", m_rx_clock_counter);
+
+ if(m_rx_clock_counter == 0 && m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 0);
+
+ else if(m_rx_clock_counter == 1) {
+ if(m_clock_mode == INTERNAL_SYNC_OUT)
+ m_cpu->do_sci_clk(m_id, 1);
+
+ rx_sync_step();
+ }
+}
+
+void sh_sci_device::rx_sync_step()
+{
+ LOGMASKED(LOG_STATE, "rx_sync_step bit=%d\n", m_rx_value);
+ m_rsr >>= 1;
+ if(m_rx_value)
+ m_rsr |= 0x80;
+ m_rx_bit--;
+
+ if(!m_rx_bit)
+ rx_done();
+}
diff --git a/src/devices/cpu/sh/sh_sci.h b/src/devices/cpu/sh/sh_sci.h
new file mode 100644
index 00000000000..3c36a346254
--- /dev/null
+++ b/src/devices/cpu/sh/sh_sci.h
@@ -0,0 +1,151 @@
+// license:BSD-3-Clause
+// copyright-holders:Olivier Galibert
+/***************************************************************************
+
+ sh_sci.h
+
+ SH Serial Communications Interface
+
+
+***************************************************************************/
+
+#ifndef MAME_CPU_SH_SH_SCI_H
+#define MAME_CPU_SH_SH_SCI_H
+
+#pragma once
+
+class sh7042_device;
+class sh_intc_device;
+
+class sh_sci_device : public device_t {
+public:
+ sh_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ template<typename T, typename U> sh_sci_device(const machine_config &mconfig, const char *tag, device_t *owner, int id, T &&cpu, U &&intc, int eri, int rxi, int txi, int tei)
+ : sh_sci_device(mconfig, tag, owner, 0)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu));
+ m_intc.set_tag(std::forward<U>(intc));
+ m_id = id;
+ m_eri_int = eri;
+ m_rxi_int = rxi;
+ m_txi_int = txi;
+ m_tei_int = tei;
+ }
+
+ void do_set_external_clock_period(const attotime &_period);
+
+ void smr_w(u8 data);
+ u8 smr_r();
+ void brr_w(u8 data);
+ u8 brr_r();
+ void scr_w(u8 data);
+ u8 scr_r();
+ void tdr_w(u8 data);
+ u8 tdr_r();
+ void ssr_w(u8 data);
+ u8 ssr_r();
+ u8 rdr_r();
+ void scmr_w(u8 data);
+ u8 scmr_r();
+
+ void do_rx_w(int state);
+ void do_clk_w(int state);
+
+ u64 internal_update(u64 current_time);
+
+protected:
+ enum {
+ ST_IDLE, ST_START, ST_BIT, ST_PARITY, ST_STOP, ST_LAST_TICK
+ };
+
+ static const char *const state_names[];
+
+ enum {
+ CLK_TX = 1,
+ CLK_RX = 2
+ };
+
+ enum {
+ INTERNAL_ASYNC,
+ INTERNAL_ASYNC_OUT,
+ EXTERNAL_ASYNC,
+ EXTERNAL_RATE_ASYNC,
+ INTERNAL_SYNC_OUT,
+ EXTERNAL_SYNC,
+ EXTERNAL_RATE_SYNC
+ };
+
+ enum {
+ SMR_CA = 0x80,
+ SMR_CHR = 0x40,
+ SMR_PE = 0x20,
+ SMR_OE = 0x10,
+ SMR_STOP = 0x08,
+ SMR_MP = 0x04,
+ SMR_CKS = 0x03,
+
+ SCR_TIE = 0x80,
+ SCR_RIE = 0x40,
+ SCR_TE = 0x20,
+ SCR_RE = 0x10,
+ SCR_MPIE = 0x08,
+ SCR_TEIE = 0x04,
+ SCR_CKE = 0x03,
+ SCR_CKE1 = 0x02,
+ SCR_CKE0 = 0x01,
+
+ SSR_TDRE = 0x80,
+ SSR_RDRF = 0x40,
+ SSR_ORER = 0x20,
+ SSR_FER = 0x10,
+ SSR_PER = 0x08,
+ SSR_TEND = 0x04,
+ SSR_MPB = 0x02,
+ SSR_MPBT = 0x01
+ };
+
+ required_device<sh7042_device> m_cpu;
+ required_device<sh_intc_device> m_intc;
+ attotime m_external_clock_period;
+ double m_external_to_internal_ratio, m_internal_to_external_ratio;
+
+ int m_id, m_eri_int, m_rxi_int, m_txi_int, m_tei_int;
+
+ int m_tx_state, m_rx_state, m_tx_bit, m_rx_bit, m_clock_state, m_tx_parity, m_rx_parity, m_tx_clock_counter, m_rx_clock_counter;
+ u32 m_clock_mode;
+ bool m_ext_clock_value, m_rx_value;
+
+ u8 m_rdr, m_tdr, m_smr, m_scr, m_ssr, m_brr, m_rsr, m_tsr;
+ u64 m_clock_event, m_clock_step, m_divider;
+
+ std::string m_last_clock_message;
+
+ void device_start() override ATTR_COLD;
+ void device_reset() override ATTR_COLD;
+
+ TIMER_CALLBACK_MEMBER(sync_tick);
+
+ void clock_start(int mode);
+ void clock_stop(int mode);
+ void clock_update();
+
+ void tx_start();
+ void tx_async_tick();
+ void tx_async_step();
+ void tx_sync_tick();
+ void tx_sync_step();
+
+ void rx_start();
+ void rx_done();
+ void rx_async_tick();
+ void rx_async_step();
+ void rx_sync_tick();
+ void rx_sync_step();
+
+ bool is_sync_start() const;
+ bool has_recv_error() const;
+};
+
+DECLARE_DEVICE_TYPE(SH_SCI, sh_sci_device)
+
+#endif // MAME_CPU_SH_SH_SCI_H
diff --git a/src/devices/cpu/sharc/compute.hxx b/src/devices/cpu/sharc/compute.hxx
index 077788f3c3c..c0c8d3a121f 100644
--- a/src/devices/cpu/sharc/compute.hxx
+++ b/src/devices/cpu/sharc/compute.hxx
@@ -942,7 +942,7 @@ void adsp21062_device::compute_fabs(int rn, int rx)
/* Rn = (unsigned)Rx * (unsigned)Ry, integer, no rounding */
void adsp21062_device::compute_mul_uuin(int rn, int rx, int ry)
{
- uint64_t r = (uint64_t)(uint32_t)REG(rx) * (uint64_t)(uint32_t)REG(ry);
+ uint64_t r = mulu_32x32(REG(rx), REG(ry));
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN((uint32_t)r);
@@ -955,7 +955,7 @@ void adsp21062_device::compute_mul_uuin(int rn, int rx, int ry)
/* Rn = (signed)Rx * (signed)Ry, integer, no rounding */
void adsp21062_device::compute_mul_ssin(int rn, int rx, int ry)
{
- uint64_t r = (int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry);
+ uint64_t r = mul_32x32(REG(rx), REG(ry));
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN((uint32_t)r);
@@ -968,7 +968,7 @@ void adsp21062_device::compute_mul_ssin(int rn, int rx, int ry)
/* MRF + (signed)Rx * (signed)Ry, integer, no rounding */
uint32_t adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry)
{
- uint64_t r = m_core->mrf + ((int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry));
+ uint64_t r = m_core->mrf + mul_32x32(REG(rx), REG(ry));
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN((uint32_t)r);
@@ -981,7 +981,7 @@ uint32_t adsp21062_device::compute_mrf_plus_mul_ssin(int rx, int ry)
/* MRB + (signed)Rx * (signed)Ry, integer, no rounding */
uint32_t adsp21062_device::compute_mrb_plus_mul_ssin(int rx, int ry)
{
- int64_t r = m_core->mrb + ((int64_t)(int32_t)REG(rx) * (int64_t)(int32_t)REG(ry));
+ int64_t r = m_core->mrb + mul_32x32(REG(rx), REG(ry));
CLEAR_MULTIPLIER_FLAGS();
SET_FLAG_MN((uint32_t)r);
@@ -1075,7 +1075,7 @@ void adsp21062_device::compute_dual_add_sub(int ra, int rs, int rx, int ry)
/* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa + Rya */
void adsp21062_device::compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, int rxa, int rya)
{
- uint32_t r_mul = (uint32_t)(((int64_t)(REG(rxm)) * (int64_t)(REG(rym))) >> 31);
+ uint32_t r_mul = (uint32_t)mul_32x32_shift(REG(rxm), REG(rym), 31);
uint32_t r_add = REG(rxa) + REG(rya);
CLEAR_MULTIPLIER_FLAGS();
@@ -1100,7 +1100,7 @@ void adsp21062_device::compute_mul_ssfr_add(int rm, int rxm, int rym, int ra, in
/* Rm = (signed)Rxm * (signed)Rym, fractional, rounding, Ra = Rxa - Rya */
void adsp21062_device::compute_mul_ssfr_sub(int rm, int rxm, int rym, int ra, int rxa, int rya)
{
- uint32_t r_mul = (uint32_t)(((int64_t)(REG(rxm)) * (int64_t)(REG(rym))) >> 31);
+ uint32_t r_mul = (uint32_t)mul_32x32_shift(REG(rxm), REG(rym), 31);
uint32_t r_sub = REG(rxa) - REG(rya);
CLEAR_MULTIPLIER_FLAGS();
diff --git a/src/devices/cpu/sharc/sharc.cpp b/src/devices/cpu/sharc/sharc.cpp
index e3b965eb25d..f03dd5bbfc4 100644
--- a/src/devices/cpu/sharc/sharc.cpp
+++ b/src/devices/cpu/sharc/sharc.cpp
@@ -490,34 +490,22 @@ void adsp21062_device::device_start()
m_drcuml->symbol_add(&m_core->pc, sizeof(m_core->pc), "pc");
m_drcuml->symbol_add(&m_core->icount, sizeof(m_core->icount), "icount");
- for (int i=0; i < 16; i++)
+ for (int i = 0; i < 16; i++)
{
char buf[10];
- sprintf(buf, "r%d", i);
+
+ snprintf(buf, std::size(buf), "r%d", i);
m_drcuml->symbol_add(&m_core->r[i], sizeof(m_core->r[i]), buf);
- if (i < 8)
- {
- sprintf(buf, "dag_i%d", i);
- m_drcuml->symbol_add(&m_core->dag1.i[i & 7], sizeof(m_core->dag1.i[i & 7]), buf);
- sprintf(buf, "dag_m%d", i);
- m_drcuml->symbol_add(&m_core->dag1.m[i & 7], sizeof(m_core->dag1.m[i & 7]), buf);
- sprintf(buf, "dag_l%d", i);
- m_drcuml->symbol_add(&m_core->dag1.l[i & 7], sizeof(m_core->dag1.l[i & 7]), buf);
- sprintf(buf, "dag_b%d", i);
- m_drcuml->symbol_add(&m_core->dag1.b[i & 7], sizeof(m_core->dag1.b[i & 7]), buf);
- }
- else
- {
- sprintf(buf, "dag_i%d", i);
- m_drcuml->symbol_add(&m_core->dag2.i[i & 7], sizeof(m_core->dag2.i[i & 7]), buf);
- sprintf(buf, "dag_m%d", i);
- m_drcuml->symbol_add(&m_core->dag2.m[i & 7], sizeof(m_core->dag2.m[i & 7]), buf);
- sprintf(buf, "dag_l%d", i);
- m_drcuml->symbol_add(&m_core->dag2.l[i & 7], sizeof(m_core->dag2.l[i & 7]), buf);
- sprintf(buf, "dag_b%d", i);
- m_drcuml->symbol_add(&m_core->dag2.b[i & 7], sizeof(m_core->dag2.b[i & 7]), buf);
- }
+ SHARC_DAG &dag((i < 8) ? m_core->dag1 : m_core->dag2);
+ snprintf(buf, std::size(buf), "dag_i%d", i);
+ m_drcuml->symbol_add(&dag.i[i & 7], sizeof(dag.i[i & 7]), buf);
+ snprintf(buf, std::size(buf), "dag_m%d", i);
+ m_drcuml->symbol_add(&dag.m[i & 7], sizeof(dag.m[i & 7]), buf);
+ snprintf(buf, std::size(buf), "dag_l%d", i);
+ m_drcuml->symbol_add(&dag.l[i & 7], sizeof(dag.l[i & 7]), buf);
+ snprintf(buf, std::size(buf), "dag_b%d", i);
+ m_drcuml->symbol_add(&dag.b[i & 7], sizeof(dag.b[i & 7]), buf);
}
m_drcuml->symbol_add(&m_core->astat, sizeof(m_core->astat), "astat");
@@ -1050,6 +1038,8 @@ void adsp21062_device::execute_run()
if (m_core->idle && m_core->irq_pending == 0)
{
+ debugger_wait_hook();
+
int dma_count = m_core->icount;
// run active DMAs even while idling
@@ -1064,7 +1054,6 @@ void adsp21062_device::execute_run()
}
m_core->icount = 0;
- debugger_instruction_hook(m_core->daddr);
}
if (m_core->irq_pending != 0)
{
diff --git a/src/devices/cpu/sharc/sharc.h b/src/devices/cpu/sharc/sharc.h
index c9c008effdb..e8246a32d8f 100644
--- a/src/devices/cpu/sharc/sharc.h
+++ b/src/devices/cpu/sharc/sharc.h
@@ -200,17 +200,16 @@ public:
EXCEPTION_COUNT
};
- void internal_data(address_map &map);
- void internal_pgm(address_map &map);
+ void internal_data(address_map &map) ATTR_COLD;
+ void internal_pgm(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 8; }
virtual uint32_t execute_max_cycles() const noexcept override { return 8; }
- virtual uint32_t execute_input_lines() const noexcept override { return 32; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/sharc/sharcdrc.cpp b/src/devices/cpu/sharc/sharcdrc.cpp
index a2671db7a76..39d56646e22 100644
--- a/src/devices/cpu/sharc/sharcdrc.cpp
+++ b/src/devices/cpu/sharc/sharcdrc.cpp
@@ -1030,7 +1030,7 @@ void adsp21062_device::generate_sequence_instruction(drcuml_block &block, compil
UML_MAPVAR(block, MAPVAR_CYCLES, compiler.cycles); // mapvar CYCLES,compiler.cycles
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
UML_MOV(block, mem(&m_core->pc), desc->pc); // mov [pc],desc->pc
save_fast_iregs(block); // <save fastregs>
diff --git a/src/devices/cpu/sm510/sm500.cpp b/src/devices/cpu/sm510/sm500.cpp
index bb440388974..7050d99c30d 100644
--- a/src/devices/cpu/sm510/sm500.cpp
+++ b/src/devices/cpu/sm510/sm500.cpp
@@ -232,7 +232,7 @@ void sm500_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
}
bool sm500_device::op_argument()
diff --git a/src/devices/cpu/sm510/sm500.h b/src/devices/cpu/sm510/sm500.h
index 04cc902e90f..93f7da163c6 100644
--- a/src/devices/cpu/sm510/sm500.h
+++ b/src/devices/cpu/sm510/sm500.h
@@ -59,11 +59,11 @@ public:
protected:
sm500_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_1_2k(address_map &map);
- void data_4x10x4(address_map &map);
+ void program_1_2k(address_map &map) ATTR_COLD;
+ void data_4x10x4(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
virtual bool op_argument() override;
diff --git a/src/devices/cpu/sm510/sm500op.cpp b/src/devices/cpu/sm510/sm500op.cpp
index 39af8e6020b..13449506650 100644
--- a/src/devices/cpu/sm510/sm500op.cpp
+++ b/src/devices/cpu/sm510/sm500op.cpp
@@ -1,5 +1,6 @@
// license:BSD-3-Clause
-// copyright-holders:hap, Igor
+// copyright-holders:hap
+// thanks-to:Igor
// SM500 shared opcode handlers
diff --git a/src/devices/cpu/sm510/sm510.cpp b/src/devices/cpu/sm510/sm510.cpp
index 624057181cb..f1f2490009f 100644
--- a/src/devices/cpu/sm510/sm510.cpp
+++ b/src/devices/cpu/sm510/sm510.cpp
@@ -152,7 +152,7 @@ void sm510_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
// BM high bit is only valid for 1 step
m_bmask = (m_op == 0x02) ? 0x40 : 0;
diff --git a/src/devices/cpu/sm510/sm510.h b/src/devices/cpu/sm510/sm510.h
index 49cb0e7b9c6..64f6d7c7258 100644
--- a/src/devices/cpu/sm510/sm510.h
+++ b/src/devices/cpu/sm510/sm510.h
@@ -64,8 +64,8 @@ public:
sm510_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768);
protected:
- void program_2_7k(address_map &map);
- void data_96_32x4(address_map &map);
+ void program_2_7k(address_map &map) ATTR_COLD;
+ void data_96_32x4(address_map &map) ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
diff --git a/src/devices/cpu/sm510/sm510base.cpp b/src/devices/cpu/sm510/sm510base.cpp
index c25f809fad5..3c645676720 100644
--- a/src/devices/cpu/sm510/sm510base.cpp
+++ b/src/devices/cpu/sm510/sm510base.cpp
@@ -291,6 +291,7 @@ void sm510_base_device::execute_run()
else
{
// got nothing to do
+ debugger_wait_hook();
m_icount = 0;
return;
}
diff --git a/src/devices/cpu/sm510/sm510base.h b/src/devices/cpu/sm510/sm510base.h
index 1e3aa5c9795..3f65b117c97 100644
--- a/src/devices/cpu/sm510/sm510base.h
+++ b/src/devices/cpu/sm510/sm510base.h
@@ -70,15 +70,14 @@ protected:
sm510_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + m_clk_div - 1) / m_clk_div; } // default 2 cycles per machine cycle
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * m_clk_div); } // "
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 3+1; }
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
diff --git a/src/devices/cpu/sm510/sm510d.cpp b/src/devices/cpu/sm510/sm510d.cpp
index c02ddaed8fe..5a4bbc8fc8f 100644
--- a/src/devices/cpu/sm510/sm510d.cpp
+++ b/src/devices/cpu/sm510/sm510d.cpp
@@ -46,6 +46,38 @@ offs_t sm510_common_disassembler::increment_pc(offs_t pc, u8 pclen)
// common lookup tables
+enum sm510_common_disassembler::e_mnemonics : unsigned
+{
+ // SM510 common
+ mILL /* 0! */, mEXT,
+ mLB, mLBL, mSBM, mEXBLA, mINCB, mDECB,
+ mATPL, mRTN0, mRTN1, mTL, mTML, mTM, mT,
+ mEXC, mBDC, mEXCI, mEXCD, mLDA, mLAX, mPTW, mWR, mWS,
+ mKTA, mATBP, mATX, mATL, mATFC, mATR,
+ mADD, mADD11, mADX, mCOMA, mROT, mRC, mSC,
+ mTB, mTC, mTAM, mTMI, mTA0, mTABL, mTIS, mTAL, mTF1, mTF4,
+ mRM, mSM,
+ mPRE, mSME, mRME, mTMEL,
+ mSKIP, mCEND, mIDIV, mDR, mDTA, mCLKLO, mCLKHI,
+
+ // SM500 common
+ mCOMCB, mRTN, mRTNS, mSSR, mTR, mTRS, mRBM,
+ mADDC, mPDTW, mTW, mDTW,
+ mATS, mEXKSA, mEXKFA,
+ mRMF, mSMF, mCOMCN,
+ mTA, mTM2, mTG,
+
+ // SM530 common
+ mSABM, mSABL, mEXBL,
+ mTG2, mTBA,
+ mKETA, mATF, mSDS, mRDS,
+ mINIS,
+
+ // SM590 common
+ mTAX, mLBLX, mMTR, mSTR, mINBM, mDEBM, mRTA, mBLTA, mEXAX, mTBA2, mADS, mADC, mLBMX, mTLS,
+ mNOP, mCCTRL, mINBL, mDEBL, mXBLA, mADCS, mTR7 // aliases
+};
+
const char *const sm510_common_disassembler::s_mnemonics[] =
{
// SM510
diff --git a/src/devices/cpu/sm510/sm510d.h b/src/devices/cpu/sm510/sm510d.h
index 59257b73173..dacc7ca4264 100644
--- a/src/devices/cpu/sm510/sm510d.h
+++ b/src/devices/cpu/sm510/sm510d.h
@@ -25,38 +25,7 @@ public:
virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x3f) | m_r2l6[pc & 0x3f]; }
protected:
- enum e_mnemonics
- {
- // SM510 common
- mILL /* 0! */, mEXT,
- mLB, mLBL, mSBM, mEXBLA, mINCB, mDECB,
- mATPL, mRTN0, mRTN1, mTL, mTML, mTM, mT,
- mEXC, mBDC, mEXCI, mEXCD, mLDA, mLAX, mPTW, mWR, mWS,
- mKTA, mATBP, mATX, mATL, mATFC, mATR,
- mADD, mADD11, mADX, mCOMA, mROT, mRC, mSC,
- mTB, mTC, mTAM, mTMI, mTA0, mTABL, mTIS, mTAL, mTF1, mTF4,
- mRM, mSM,
- mPRE, mSME, mRME, mTMEL,
- mSKIP, mCEND, mIDIV, mDR, mDTA, mCLKLO, mCLKHI,
-
- // SM500 common
- mCOMCB, mRTN, mRTNS, mSSR, mTR, mTRS, mRBM,
- mADDC, mPDTW, mTW, mDTW,
- mATS, mEXKSA, mEXKFA,
- mRMF, mSMF, mCOMCN,
- mTA, mTM2, mTG,
-
- // SM530 common
- mSABM, mSABL, mEXBL,
- mTG2, mTBA,
- mKETA, mATF, mSDS, mRDS,
- mINIS,
-
- // SM590 common
- mTAX, mLBLX, mMTR, mSTR, mINBM, mDEBM, mRTA, mBLTA, mEXAX, mTBA2, mADS, mADC, mLBMX, mTLS,
- mNOP, mCCTRL, mINBL, mDEBL, mXBLA, mADCS, mTR7 // aliases
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonics[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/sm510/sm511.cpp b/src/devices/cpu/sm510/sm511.cpp
index dc3a3763d6c..a9a1ad61d97 100644
--- a/src/devices/cpu/sm510/sm511.cpp
+++ b/src/devices/cpu/sm510/sm511.cpp
@@ -247,7 +247,7 @@ void sm511_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
// BM high bit is only valid for 1 step
m_bmask = (m_op == 0x02) ? 0x40 : 0;
diff --git a/src/devices/cpu/sm510/sm511.h b/src/devices/cpu/sm510/sm511.h
index 463ede6be04..c6eef9ce1b9 100644
--- a/src/devices/cpu/sm510/sm511.h
+++ b/src/devices/cpu/sm510/sm511.h
@@ -32,11 +32,11 @@ public:
protected:
sm511_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_4k(address_map &map);
- void data_96_32x4(address_map &map);
+ void program_4k(address_map &map) ATTR_COLD;
+ void data_96_32x4(address_map &map) ATTR_COLD;
virtual void device_post_load() override { notify_clock_changed(); }
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
@@ -53,7 +53,7 @@ public:
sm512_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768);
protected:
- void data_80_48x4(address_map &map);
+ void data_80_48x4(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/sm510/sm530.cpp b/src/devices/cpu/sm510/sm530.cpp
index 1110a22db33..e276f53d571 100644
--- a/src/devices/cpu/sm510/sm530.cpp
+++ b/src/devices/cpu/sm510/sm530.cpp
@@ -234,7 +234,7 @@ void sm530_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
// SABM/SABL is only valid for 1 step
m_bmask = (m_op == 0x72) ? 0x40 : ((m_op == 0x73) ? 0x08 : 0);
diff --git a/src/devices/cpu/sm510/sm530.h b/src/devices/cpu/sm510/sm530.h
index 654bcf2963e..adcde423087 100644
--- a/src/devices/cpu/sm510/sm530.h
+++ b/src/devices/cpu/sm510/sm530.h
@@ -77,11 +77,11 @@ public:
protected:
sm530_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_2k(address_map &map);
- void data_64_24x4(address_map &map);
+ void program_2k(address_map &map) ATTR_COLD;
+ void data_64_24x4(address_map &map) ATTR_COLD;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 3 - 1) / 3; } // 3 cycles per machine cycle
diff --git a/src/devices/cpu/sm510/sm590.cpp b/src/devices/cpu/sm510/sm590.cpp
index f833b7e2683..b4cecee68cc 100644
--- a/src/devices/cpu/sm510/sm590.cpp
+++ b/src/devices/cpu/sm510/sm590.cpp
@@ -172,7 +172,7 @@ void sm590_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
}
bool sm590_device::op_argument()
diff --git a/src/devices/cpu/sm510/sm590.h b/src/devices/cpu/sm510/sm590.h
index 8e866b954f8..bb0455c4bad 100644
--- a/src/devices/cpu/sm510/sm590.h
+++ b/src/devices/cpu/sm510/sm590.h
@@ -99,14 +99,14 @@ public:
protected:
sm590_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_512x8(address_map &map);
- void program_768x8(address_map &map);
- void program_1kx8(address_map &map);
- void data_32x4(address_map &map);
- void data_56x4(address_map &map);
-
- virtual void device_start() override;
- virtual void device_reset() override;
+ void program_512x8(address_map &map) ATTR_COLD;
+ void program_768x8(address_map &map) ATTR_COLD;
+ void program_1kx8(address_map &map) ATTR_COLD;
+ void data_32x4(address_map &map) ATTR_COLD;
+ void data_56x4(address_map &map) ATTR_COLD;
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
diff --git a/src/devices/cpu/sm510/sm5a.cpp b/src/devices/cpu/sm510/sm5a.cpp
index c2512aeaf71..594c23ca836 100644
--- a/src/devices/cpu/sm510/sm5a.cpp
+++ b/src/devices/cpu/sm510/sm5a.cpp
@@ -1,5 +1,6 @@
// license:BSD-3-Clause
-// copyright-holders:hap, Igor
+// copyright-holders:hap
+// thanks-to:Igor
/*
Sharp SM5A MCU core implementation
@@ -17,7 +18,6 @@
// MCU types
DEFINE_DEVICE_TYPE(SM5A, sm5a_device, "sm5a", "Sharp SM5A") // 1.8K ROM, 5x13x4 RAM, shift registers for LCD
DEFINE_DEVICE_TYPE(SM5L, sm5l_device, "sm5l", "Sharp SM5L") // low-power version of SM5A
-DEFINE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device, "kb1013vk1_2", "KB1013VK1-2") // Soviet-era clone of SM5A
// internal memory maps
@@ -51,10 +51,6 @@ sm5l_device::sm5l_device(const machine_config &mconfig, const char *tag, device_
sm5a_device(mconfig, SM5L, tag, owner, clock, 1, 9, 11, address_map_constructor(FUNC(sm5l_device::program_1_8k), this), 7, address_map_constructor(FUNC(sm5l_device::data_5x13x4), this))
{ }
-kb1013vk12_device::kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
- sm5a_device(mconfig, KB1013VK12, tag, owner, clock, 1, 9, 11, address_map_constructor(FUNC(kb1013vk12_device::program_1_8k), this), 7, address_map_constructor(FUNC(kb1013vk12_device::data_5x13x4), this))
-{ }
-
// disasm
std::unique_ptr<util::disasm_interface> sm5a_device::create_disassembler()
@@ -152,5 +148,5 @@ void sm5a_device::execute_one()
}
break; // 0xfc
- } // big switch
+ } // 0xf0
}
diff --git a/src/devices/cpu/sm510/sm5a.h b/src/devices/cpu/sm510/sm5a.h
index 193c5123610..f4acf8a1788 100644
--- a/src/devices/cpu/sm510/sm5a.h
+++ b/src/devices/cpu/sm510/sm5a.h
@@ -65,8 +65,8 @@ public:
protected:
sm5a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int stack_levels, int o_pins, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
- void program_1_8k(address_map &map);
- void data_5x13x4(address_map &map);
+ void program_1_8k(address_map &map) ATTR_COLD;
+ void data_5x13x4(address_map &map) ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_one() override;
@@ -83,15 +83,8 @@ public:
sm5l_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768);
};
-class kb1013vk12_device : public sm5a_device
-{
-public:
- kb1013vk12_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 32768);
-};
-
DECLARE_DEVICE_TYPE(SM5A, sm5a_device)
DECLARE_DEVICE_TYPE(SM5L, sm5l_device)
-DECLARE_DEVICE_TYPE(KB1013VK12, kb1013vk12_device)
#endif // MAME_CPU_SM510_SM5A_H
diff --git a/src/devices/cpu/sm8500/sm8500.cpp b/src/devices/cpu/sm8500/sm8500.cpp
index d64b898f1dc..f1a97dc9628 100644
--- a/src/devices/cpu/sm8500/sm8500.cpp
+++ b/src/devices/cpu/sm8500/sm8500.cpp
@@ -361,10 +361,10 @@ void sm8500_cpu_device::execute_run()
uint32_t d1,d2;
uint32_t res;
- debugger_instruction_hook(m_PC);
- m_oldpc = m_PC;
process_interrupts();
if ( !m_halted ) {
+ m_oldpc = m_PC;
+ debugger_instruction_hook(m_PC);
uint8_t op = mem_readbyte( m_PC++ );
m_SYS = m_program->read_byte(0x19);
m_PS0 = m_program->read_byte(0x1e);
@@ -379,6 +379,7 @@ void sm8500_cpu_device::execute_run()
mem_writebyte(0x1e,m_PS0); // need to update debugger
m_program->write_byte(0x1f,m_PS1);
} else {
+ debugger_wait_hook();
mycycles = 4;
m_dma_func( mycycles );
}
diff --git a/src/devices/cpu/sm8500/sm8500.h b/src/devices/cpu/sm8500/sm8500.h
index 5e93029c030..b65634e34d9 100644
--- a/src/devices/cpu/sm8500/sm8500.h
+++ b/src/devices/cpu/sm8500/sm8500.h
@@ -51,13 +51,12 @@ protected:
static constexpr uint8_t FLAG_I = 0x01;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 16; }
- virtual uint32_t execute_input_lines() const noexcept override { return 11; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/sparc/sparc.cpp b/src/devices/cpu/sparc/sparc.cpp
index 8717d56e22e..9bdd1bfbad5 100644
--- a/src/devices/cpu/sparc/sparc.cpp
+++ b/src/devices/cpu/sparc/sparc.cpp
@@ -1211,17 +1211,6 @@ uint32_t sparc_base_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t sparc_base_device::execute_input_lines() const noexcept
-{
- return 16;
-}
-
-
-//-------------------------------------------------
// execute_set_input - set the state of an input
// line during execution
//-------------------------------------------------
@@ -4291,13 +4280,13 @@ void sparcv8_device::execute_mul(uint32_t op)
uint32_t result = 0;
if (UMUL || UMULCC)
{
- uint64_t dresult = (uint64_t)RS1REG * (uint64_t)operand2;
+ uint64_t dresult = mulu_32x32(RS1REG, operand2);
Y = (uint32_t)(dresult >> 32);
result = (uint32_t)dresult;
}
else if (SMUL || SMULCC)
{
- int64_t dresult = (int64_t)(int32_t)RS1REG * (int64_t)(int32_t)operand2;
+ int64_t dresult = mul_32x32(RS1REG, operand2);
Y = (uint32_t)(dresult >> 32);
result = (uint32_t)dresult;
}
@@ -4482,19 +4471,22 @@ void sparc_base_device::run_loop()
continue;
}*/
- if (CHECK_DEBUG)
- debugger_instruction_hook(PC);
-
if (MODE == MODE_RESET)
{
+ if (CHECK_DEBUG)
+ debugger_wait_hook();
reset_step();
}
else if (MODE == MODE_ERROR)
{
+ if (CHECK_DEBUG)
+ debugger_wait_hook();
error_step();
}
else if (MODE == MODE_EXECUTE)
{
+ if (CHECK_DEBUG)
+ debugger_instruction_hook(PC);
execute_step();
}
@@ -4518,7 +4510,7 @@ void sparc_base_device::run_loop()
void sparc_base_device::execute_run()
{
- bool debug = machine().debug_flags & DEBUG_FLAG_ENABLED;
+ const bool debug = debugger_enabled();
if (m_bp_reset_in)
{
diff --git a/src/devices/cpu/sparc/sparc.h b/src/devices/cpu/sparc/sparc.h
index 5a3e1bd4c2d..f61ddb30e5e 100644
--- a/src/devices/cpu/sparc/sparc.h
+++ b/src/devices/cpu/sparc/sparc.h
@@ -26,15 +26,14 @@ public:
template <typename T> void set_mmu(T &&tag) { m_mmu.set_tag(std::forward<T>(tag)); }
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
- virtual void device_resolve_objects() override;
+ virtual void device_resolve_objects() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -296,8 +295,8 @@ public:
protected:
sparcv8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual bool execute_extra_group2(uint32_t op) override;
virtual bool execute_extra_group3(uint32_t op) override;
@@ -340,8 +339,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
virtual bool execute_extra_group2(uint32_t op) override;
@@ -398,14 +397,14 @@ protected:
u32 dcache_data_r(offs_t offset, u32 mem_mask);
void dcache_data_w(offs_t offset, u32 data, u32 mem_mask);
- void control_map(address_map &map);
- void icache_lock_map(address_map &map);
- void dcache_lock_map(address_map &map);
- template <uint8_t Asi> void mmu_map(address_map &map);
- void icache_tag_map(address_map &map);
- void icache_data_map(address_map &map);
- void dcache_tag_map(address_map &map);
- void dcache_data_map(address_map &map);
+ void control_map(address_map &map) ATTR_COLD;
+ void icache_lock_map(address_map &map) ATTR_COLD;
+ void dcache_lock_map(address_map &map) ATTR_COLD;
+ template <uint8_t Asi> void mmu_map(address_map &map) ATTR_COLD;
+ void icache_tag_map(address_map &map) ATTR_COLD;
+ void icache_data_map(address_map &map) ATTR_COLD;
+ void dcache_tag_map(address_map &map) ATTR_COLD;
+ void dcache_data_map(address_map &map) ATTR_COLD;
void update_addr_masks();
void update_wait_states();
diff --git a/src/devices/cpu/sparc/sparcdasm.h b/src/devices/cpu/sparc/sparcdasm.h
index 91a22df173a..b92a2c283a3 100644
--- a/src/devices/cpu/sparc/sparcdasm.h
+++ b/src/devices/cpu/sparc/sparcdasm.h
@@ -4,8 +4,8 @@
SPARC disassembler
*/
-#ifndef MAME_DEVICES_CPU_SPARC_SPARC_DASM_H
-#define MAME_DEVICES_CPU_SPARC_SPARC_DASM_H
+#ifndef MAME_CPU_SPARC_SPARCDASM_H
+#define MAME_CPU_SPARC_SPARCDASM_H
#pragma once
@@ -255,4 +255,4 @@ private:
vis_op_desc_map m_vis_op_desc;
};
-#endif // MAME_DEVICES_CPU_SPARC_SPARC_DASM_H
+#endif // MAME_CPU_SPARC_SPARCDASM_H
diff --git a/src/devices/cpu/sparc/sparcdefs.h b/src/devices/cpu/sparc/sparcdefs.h
index 66147c37780..19784b173a7 100644
--- a/src/devices/cpu/sparc/sparcdefs.h
+++ b/src/devices/cpu/sparc/sparcdefs.h
@@ -7,10 +7,10 @@
//
//================================================================
-#pragma once
+#ifndef MAME_CPU_SPARC_SPARCDEFS_H
+#define MAME_CPU_SPARC_SPARCDEFS_H
-#ifndef CPU_SPARC_SPARC_DEFS_H
-#define CPU_SPARC_SPARC_DEFS_H
+#pragma once
#define PSR_CWP_MASK 0x0000001f
#define PSR_ET_SHIFT 5
@@ -485,4 +485,4 @@
#define FPOP_FCMPED 0x056
#define FPOP_FCMPEX 0x057
-#endif // CPU_SPARC_SPARC_DEFS_H
+#endif // MAME_CPU_SPARC_SPARCDEFS_H
diff --git a/src/devices/cpu/spc700/spc700.cpp b/src/devices/cpu/spc700/spc700.cpp
index b477ee008a1..d9293839c90 100644
--- a/src/devices/cpu/spc700/spc700.cpp
+++ b/src/devices/cpu/spc700/spc700.cpp
@@ -1349,6 +1349,7 @@ void spc700_device::execute_run()
{
if (CPU_STOPPED)
{
+ debugger_wait_hook();
CLOCKS = 0;
return;
}
diff --git a/src/devices/cpu/spc700/spc700.h b/src/devices/cpu/spc700/spc700.h
index 33e3190ac10..59c862f645a 100644
--- a/src/devices/cpu/spc700/spc700.h
+++ b/src/devices/cpu/spc700/spc700.h
@@ -17,13 +17,12 @@ protected:
spc700_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map = address_map_constructor());
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 8; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/spc700/spc700ds.cpp b/src/devices/cpu/spc700/spc700ds.cpp
index 2d99819e1b4..3e43fb2cf64 100644
--- a/src/devices/cpu/spc700/spc700ds.cpp
+++ b/src/devices/cpu/spc700/spc700ds.cpp
@@ -8,7 +8,6 @@
SPC700 CPU Emulator V0.90
Copyright Karl Stenerud
-All rights reserved.
*/
diff --git a/src/devices/cpu/spc700/spc700ds.h b/src/devices/cpu/spc700/spc700ds.h
index fdd7bbeba7b..88a606e08cf 100644
--- a/src/devices/cpu/spc700/spc700ds.h
+++ b/src/devices/cpu/spc700/spc700ds.h
@@ -1,9 +1,10 @@
// license:BSD-3-Clause
// copyright-holders:Karl Stenerud
+#ifndef MAME_CPU_SPC700_SPC700DS_H
+#define MAME_CPU_SPC700_SPC700DS_H
+
#pragma once
-#ifndef __SPC700DS_H__
-#define __SPC700DS_H__
/* ======================================================================== */
/* =============================== COPYRIGHT ============================== */
/* ======================================================================== */
@@ -12,8 +13,6 @@
Sony SPC700 CPU Emulator V1.0
Copyright Karl Stenerud
-All rights reserved.
-
*/
@@ -62,4 +61,4 @@ private:
};
-#endif /* __SPC700DS_H__ */
+#endif // MAME_CPU_SPC700_SPC700DS_H
diff --git a/src/devices/cpu/ssem/ssem.cpp b/src/devices/cpu/ssem/ssem.cpp
index 77bc62edb14..6e80840c8dc 100644
--- a/src/devices/cpu/ssem/ssem.cpp
+++ b/src/devices/cpu/ssem/ssem.cpp
@@ -195,17 +195,6 @@ uint32_t ssem_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t ssem_device::execute_input_lines() const noexcept
-{
- return 0;
-}
-
-
-//-------------------------------------------------
// execute_set_input - set the state of an input
// line during execution
//-------------------------------------------------
diff --git a/src/devices/cpu/ssem/ssem.h b/src/devices/cpu/ssem/ssem.h
index 7cfe5d17435..f3d4d9b8041 100644
--- a/src/devices/cpu/ssem/ssem.h
+++ b/src/devices/cpu/ssem/ssem.h
@@ -26,14 +26,13 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/ssp1601/ssp1601.h b/src/devices/cpu/ssp1601/ssp1601.h
index e912ff9891b..48133cd5790 100644
--- a/src/devices/cpu/ssp1601/ssp1601.h
+++ b/src/devices/cpu/ssp1601/ssp1601.h
@@ -26,13 +26,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 4; }
- virtual uint32_t execute_input_lines() const noexcept override { return 3; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/ssp1601/ssp1601d.h b/src/devices/cpu/ssp1601/ssp1601d.h
index 9c868a5d308..6ebd8db47aa 100644
--- a/src/devices/cpu/ssp1601/ssp1601d.h
+++ b/src/devices/cpu/ssp1601/ssp1601d.h
@@ -8,8 +8,8 @@
*/
-#ifndef MAME_CPU_SSP1601_SSP1601DASM_H
-#define MAME_CPU_SSP1601_SSP1601DASM_H
+#ifndef MAME_CPU_SSP1601_SSP1601D_H
+#define MAME_CPU_SSP1601_SSP1601D_H
#pragma once
@@ -34,4 +34,4 @@ private:
static std::string get_cond(int op);
};
-#endif
+#endif // MAME_CPU_SSP1601_SSP1601D_H
diff --git a/src/devices/cpu/st62xx/st62xx.cpp b/src/devices/cpu/st62xx/st62xx.cpp
index 7b47c087dfd..d1cebf0e5ae 100644
--- a/src/devices/cpu/st62xx/st62xx.cpp
+++ b/src/devices/cpu/st62xx/st62xx.cpp
@@ -495,11 +495,6 @@ uint32_t st6228_device::execute_max_cycles() const noexcept
return 5;
}
-uint32_t st6228_device::execute_input_lines() const noexcept
-{
- return 0;
-}
-
void st6228_device::execute_set_input(int inputnum, int state)
{
logerror("%s: Unimplemented: execute_set_input line %d = %d\n", machine().describe_context(), inputnum, state);
diff --git a/src/devices/cpu/st62xx/st62xx.h b/src/devices/cpu/st62xx/st62xx.h
index 30f17b5c155..5d584d9db19 100644
--- a/src/devices/cpu/st62xx/st62xx.h
+++ b/src/devices/cpu/st62xx/st62xx.h
@@ -30,8 +30,8 @@
**********************************************************************/
-#ifndef MAME_CPU_ST62XX_H
-#define MAME_CPU_ST62XX_H
+#ifndef MAME_CPU_ST62XX_ST62XX_H
+#define MAME_CPU_ST62XX_ST62XX_H
#pragma once
@@ -89,13 +89,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -109,8 +108,8 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// address spaces
- void st6228_program_map(address_map &map);
- void st6228_data_map(address_map &map);
+ void st6228_program_map(address_map &map) ATTR_COLD;
+ void st6228_data_map(address_map &map) ATTR_COLD;
void unimplemented_opcode(uint8_t op);
@@ -309,4 +308,4 @@ protected:
DECLARE_DEVICE_TYPE(ST6228, st6228_device)
-#endif // MAME_CPU_ST62XX_H
+#endif // MAME_CPU_ST62XX_ST62XX_H
diff --git a/src/devices/cpu/st62xx/st62xx_dasm.h b/src/devices/cpu/st62xx/st62xx_dasm.h
index 1e30f04dd47..5a93b964921 100644
--- a/src/devices/cpu/st62xx/st62xx_dasm.h
+++ b/src/devices/cpu/st62xx/st62xx_dasm.h
@@ -6,8 +6,8 @@
**********************************************************************/
-#ifndef MAME_CPU_ST62XX_DASM_H
-#define MAME_CPU_ST62XX_DASM_H
+#ifndef MAME_CPU_ST62XX_ST62XX_DASM_H
+#define MAME_CPU_ST62XX_ST62XX_DASM_H
#pragma once
@@ -24,4 +24,4 @@ protected:
std::string reg_name(const uint8_t reg);
};
-#endif // MAME_CPU_ST62XX_DASM_H
+#endif // MAME_CPU_ST62XX_ST62XX_DASM_H
diff --git a/src/devices/cpu/st9/st905x.h b/src/devices/cpu/st9/st905x.h
index 17605756f1b..813251666f9 100644
--- a/src/devices/cpu/st9/st905x.h
+++ b/src/devices/cpu/st9/st905x.h
@@ -22,8 +22,8 @@ protected:
st9_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor regmap);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -86,7 +86,7 @@ public:
st90r50_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
private:
- void register_map(address_map &map);
+ void register_map(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/st9/st9dasm.cpp b/src/devices/cpu/st9/st9dasm.cpp
index fa8c2a6abf5..dcce74300a0 100644
--- a/src/devices/cpu/st9/st9dasm.cpp
+++ b/src/devices/cpu/st9/st9dasm.cpp
@@ -1186,7 +1186,7 @@ offs_t st9_disassembler::disassemble(std::ostream &stream, offs_t pc, const st9_
case 0x9f:
{
const u8 byte1 = opcodes.r8(pc + 1);
- util::stream_format(stream, "%-8sr%d,(rr%d),", BIT(byte1, 4) ? "cpjt" : "cpjf", byte1 & 0x0f, (byte1 & 0xe0) >> 4);
+ util::stream_format(stream, "%-8sr%d,(rr%d),", BIT(byte1, 4) ? "cpjti" : "cpjfi", byte1 & 0x0f, (byte1 & 0xe0) >> 4);
format_label(stream, pc + 3 + s8(opcodes.r8(pc + 2)));
return 3 | STEP_COND | SUPPORTED;
}
@@ -1222,9 +1222,9 @@ offs_t st9_disassembler::disassemble(std::ostream &stream, offs_t pc, const st9_
{
const u8 byte1 = opcodes.r8(pc + 1);
if (BIT(byte1, 0))
- util::stream_format(stream, "%-8sr%d,(rr%d)", "ld", byte1 >> 4, byte1 & 0x0e);
- else
util::stream_format(stream, "%-8s(rr%d),r%d", "ld", byte1 & 0x0e, byte1 >> 4);
+ else
+ util::stream_format(stream, "%-8sr%d,(rr%d)", "ld", byte1 >> 4, byte1 & 0x0e);
return 2 | SUPPORTED;
}
diff --git a/src/devices/cpu/superfx/superfx.cpp b/src/devices/cpu/superfx/superfx.cpp
index e91ec0d5deb..e274420bbae 100644
--- a/src/devices/cpu/superfx/superfx.cpp
+++ b/src/devices/cpu/superfx/superfx.cpp
@@ -790,6 +790,7 @@ void superfx_device::execute_run()
{
if(!(m_sfr & SUPERFX_SFR_G))
{
+ debugger_wait_hook();
superfx_add_clocks_internal(6);
m_icount = std::min(m_icount, 0);
break;
diff --git a/src/devices/cpu/superfx/superfx.h b/src/devices/cpu/superfx/superfx.h
index 54f07ec184f..32ac4bc1016 100644
--- a/src/devices/cpu/superfx/superfx.h
+++ b/src/devices/cpu/superfx/superfx.h
@@ -108,11 +108,10 @@ protected:
superfx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/t11/t11.cpp b/src/devices/cpu/t11/t11.cpp
index 9e2af21ba29..f347f655025 100644
--- a/src/devices/cpu/t11/t11.cpp
+++ b/src/devices/cpu/t11/t11.cpp
@@ -36,12 +36,22 @@
DEFINE_DEVICE_TYPE(T11, t11_device, "t11", "DEC T11")
+DEFINE_DEVICE_TYPE(K1801VM1, k1801vm1_device, "k1801vm1", "K1801VM1")
DEFINE_DEVICE_TYPE(K1801VM2, k1801vm2_device, "k1801vm2", "K1801VM2")
+k1801vm1_device::k1801vm1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : t11_device(mconfig, K1801VM1, tag, owner, clock)
+ , z80_daisy_chain_interface(mconfig, *this)
+{
+ c_insn_set = IS_LEIS | IS_MXPS | IS_VM1;
+}
+
k1801vm2_device::k1801vm2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: t11_device(mconfig, K1801VM2, tag, owner, clock)
+ , z80_daisy_chain_interface(mconfig, *this)
{
+ c_insn_set = IS_LEIS | IS_EIS | IS_MXPS | IS_VM2;
}
t11_device::t11_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
@@ -66,6 +76,7 @@ t11_device::t11_device(const machine_config &mconfig, device_type type, const ch
t11_device::t11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: t11_device(mconfig, T11, tag, owner, clock)
{
+ c_insn_set = IS_LEIS | IS_MFPT | IS_MXPS | IS_T11;
}
device_memory_interface::space_config_vector t11_device::memory_space_config() const
@@ -84,8 +95,7 @@ device_memory_interface::space_config_vector t11_device::memory_space_config() c
int t11_device::ROPCODE()
{
- PC &= 0xfffe;
- int val = m_cache.read_word(PC);
+ int val = m_cache.read_word(PC & 0xfffe);
PC += 2;
return val;
}
@@ -155,6 +165,8 @@ int t11_device::POP()
#define GET_V (PSW & VFLAG)
#define GET_Z (PSW & ZFLAG)
#define GET_N (PSW & NFLAG)
+#define GET_T (PSW & (1 << 4))
+#define GET_I (PSW & (1 << 7))
/* clears flags */
#define CLR_C (PSW &= ~CFLAG)
@@ -202,6 +214,119 @@ static const struct irq_table_entry irq_table[] =
{ 7<<5, 0140 }
};
+// PSW7 masks external interrupts (except IRQ1) -- IRQ2, IRQ3, VIRQ
+// PSW11 also masks IRQ1. PSW10 also masks ACLO.
+void k1801vm1_device::t11_check_irqs()
+{
+ // 2. bus error on vector fetch; nm, vec 160012
+ // 3. double bus error; nm, vec 160006
+ // 4. bus error; PSW11, PSW10
+ if (m_bus_error)
+ {
+ m_bus_error = false;
+ m_mcir = MCIR_IRQ;
+ m_vsel = T11_TIMEOUT;
+ }
+ // 5. illegal insn; nm
+ else if (m_mcir == MCIR_ILL)
+ {
+ take_interrupt(m_vsel);
+ }
+ // 6. trace trap; WCPU
+ else if (m_trace_trap && m_mcir == MCIR_NONE) // allow trap_to() to execute first
+ {
+ if (GET_T)
+ {
+ m_mcir = MCIR_IRQ;
+ m_vsel = T11_BPT;
+ }
+ else
+ m_trace_trap = false;
+ }
+ else if (GET_T)
+ {
+ m_trace_trap = true;
+ }
+ // 7. power fail (ACLO pin); PSW10
+ else if (m_power_fail)
+ {
+ m_mcir = MCIR_IRQ;
+ m_vsel = T11_PWRFAIL;
+ }
+ // 8. external HALT (nIRQ1 pin); PSW11, PSW10
+ else if (m_hlt_active)
+ {
+ m_hlt_active = 0;
+ m_mcir = MCIR_HALT;
+ m_vsel = VM1_HALT;
+ }
+ // 9. internal timer, vector 0270; PSW7, PSW10
+ // 10. line clock (nIRQ2 pin); PSW7, PSW10
+ else if (BIT(m_cp_state, 2) && !GET_I)
+ {
+ m_mcir = MCIR_IRQ;
+ m_vsel = VM1_EVNT;
+ }
+ // 11. nIRQ3 pin; PSW7, PSW10
+ else if (BIT(m_cp_state, 3) && !GET_I)
+ {
+ m_mcir = MCIR_IRQ;
+ m_vsel = VM1_IRQ3;
+ }
+ // 12. nVIRQ pin; PSW7, PSW10
+ else if (m_vec_active && !GET_I)
+ {
+ device_z80daisy_interface *intf = daisy_get_irq_device();
+ int vec = (intf != nullptr) ? intf->z80daisy_irq_ack() : m_in_iack_func(0);
+ if (vec == -1 || vec == 0)
+ {
+ m_vec_active = 0;
+ return;
+ }
+ m_mcir = MCIR_IRQ;
+ m_vsel = vec;
+ }
+
+ switch (m_mcir)
+ {
+ case MCIR_SET:
+ if (m_vsel >= 0160000)
+ take_interrupt_halt(m_vsel);
+ else
+ take_interrupt(m_vsel);
+ break;
+
+ case MCIR_IRQ:
+ take_interrupt(m_vsel);
+ break;
+
+ case MCIR_HALT:
+ take_interrupt_halt(m_vsel);
+ break;
+ }
+
+ m_mcir = MCIR_NONE;
+}
+
+void k1801vm1_device::take_interrupt_halt(uint16_t vector)
+{
+ // vectors in HALT mode are word (not doubleworld) aligned
+ assert((vector & 1) == 0);
+
+ // enter HALT mode
+ WWORD(VM1_SEL1, RWORD(VM1_SEL1) | SEL1_HALT);
+
+ // push the old state, set the new one
+ WWORD(VM1_STACK, PC);
+ WWORD(VM1_STACK + 2, PSW);
+ PCD = RWORD(vector);
+ PSW = RWORD(vector + 2);
+
+ // count cycles and clear the WAIT flag
+ m_icount -= 114;
+ m_wait_state = 0;
+}
+
void t11_device::t11_check_irqs()
{
// HLT is nonmaskable
@@ -329,6 +454,10 @@ void t11_device::device_start()
save_item(NAME(m_hlt_active));
save_item(NAME(m_power_fail));
save_item(NAME(m_ext_halt));
+ save_item(NAME(m_trace_trap));
+ save_item(NAME(m_check_irqs));
+ save_item(NAME(m_mcir));
+ save_item(NAME(m_vsel));
// Register debugger state
state_add( T11_PC, "PC", m_reg[7].w.l).formatstr("%06O");
@@ -341,8 +470,8 @@ void t11_device::device_start()
state_add( T11_R4, "R4", m_reg[4].w.l).formatstr("%06O");
state_add( T11_R5, "R5", m_reg[5].w.l).formatstr("%06O");
- state_add(STATE_GENPC, "GENPC", m_reg[7].w.l).noshow();
- state_add(STATE_GENPCBASE, "CURPC", m_ppc.w.l).noshow();
+ state_add(STATE_GENPC, "GENPC", m_reg[7].w.l).formatstr("%06O").noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_ppc.w.l).formatstr("%06O").noshow();
state_add(STATE_GENFLAGS, "GENFLAGS", m_psw.b.l).formatstr("%8s").noshow();
set_icountptr(m_icount);
@@ -367,6 +496,25 @@ void t11_device::state_string_export(const device_state_entry &entry, std::strin
}
}
+void k1801vm1_device::state_string_export(const device_state_entry &entry, std::string &str) const
+{
+ switch (entry.index())
+ {
+ case STATE_GENFLAGS:
+ str = string_format("%c%c%c%c%c%c%c%c",
+ m_psw.b.l & 0x80 ? 'I':'.',
+ m_psw.b.l & 0x40 ? '?':'.',
+ m_psw.b.l & 0x20 ? '?':'.',
+ m_psw.b.l & 0x10 ? 'T':'.',
+ m_psw.b.l & 0x08 ? 'N':'.',
+ m_psw.b.l & 0x04 ? 'Z':'.',
+ m_psw.b.l & 0x02 ? 'V':'.',
+ m_psw.b.l & 0x01 ? 'C':'.'
+ );
+ break;
+ }
+}
+
void k1801vm2_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
switch (entry.index())
@@ -409,6 +557,19 @@ void t11_device::device_reset()
m_power_fail = false;
m_bus_error = false;
m_ext_halt = false;
+ m_trace_trap = false;
+ m_check_irqs = false;
+}
+
+void k1801vm1_device::device_reset()
+{
+ t11_device::device_reset();
+
+ PC = RWORD(VM1_SEL1) & 0177400;
+ WWORD(VM1_SEL1, RWORD(VM1_SEL1) | SEL1_HALT);
+
+ m_mcir = MCIR_NONE;
+ m_vsel = 0;
}
void k1801vm2_device::device_reset()
@@ -479,6 +640,7 @@ void t11_device::execute_run()
if (m_wait_state)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -493,6 +655,12 @@ void t11_device::execute_run()
op = ROPCODE();
(this->*s_opcode_table[op >> 3])(op);
+
+ if (m_check_irqs || m_trace_trap || GET_T)
+ {
+ m_check_irqs = false;
+ t11_check_irqs();
+ }
}
}
diff --git a/src/devices/cpu/t11/t11.h b/src/devices/cpu/t11/t11.h
index cf83f65638e..0ac0a17790a 100644
--- a/src/devices/cpu/t11/t11.h
+++ b/src/devices/cpu/t11/t11.h
@@ -7,17 +7,14 @@
#pragma once
+#include "machine/z80daisy.h"
+
enum
{
T11_R0=1, T11_R1, T11_R2, T11_R3, T11_R4, T11_R5, T11_SP, T11_PC, T11_PSW
};
-#define T11_IRQ0 0 /* IRQ0 */
-#define T11_IRQ1 1 /* IRQ1 */
-#define T11_IRQ2 2 /* IRQ2 */
-#define T11_IRQ3 3 /* IRQ3 */
-
class t11_device : public cpu_device
{
@@ -56,19 +53,48 @@ protected:
T11_IOT = 020, // IOT instruction vector
T11_PWRFAIL = 024, // Power fail vector
T11_EMT = 030, // EMT instruction vector
- T11_TRAP = 034 // TRAP instruction vector
+ T11_TRAP = 034, // TRAP instruction vector
+ // K1801 vectors
+ VM1_EVNT = 0100, // EVNT pin vector
+ VM1_IRQ3 = 0270, // IRQ3 pin vector
+ VM1_HALT = 0160002, // HALT instruction vector
+ VM2_HALT = 0170 // HALT instruction vector
+ };
+ // K1801 microcode constants
+ enum
+ {
+ VM1_STACK = 0177674, // start of HALT mode save area
+ VM1_SEL1 = 0177716, // DIP switch register (read) and HALT mode selector (write)
+ SEL1_HALT = 010,
+ MCIR_ILL = -2,
+ MCIR_SET = -1,
+ MCIR_WAIT = 0,
+ MCIR_NONE = 1,
+ MCIR_HALT = 2,
+ MCIR_IRQ = 3
+ };
+ enum
+ {
+ // DEC command set extensions
+ IS_LEIS = 1 << 0, // MARK, RTT, SOB, SXT, XOR
+ IS_EIS = 1 << 1, // same plus ASH, ASHC, MUL, DIV
+ IS_MFPT = 1 << 2, // MFPT
+ IS_MXPS = 1 << 3, // MFPS, MTPS
+ IS_T11 = 1 << 4, // LEIS without MARK
+ // K1801 command set extensions
+ IS_VM1 = 1 << 5, // START, STEP
+ IS_VM2 = 1 << 6, // same plus RSEL, MxUS, RCPx, WCPx
};
t11_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 12; }
virtual uint32_t execute_max_cycles() const noexcept override { return 114; }
- virtual uint32_t execute_input_lines() const noexcept override { return 8; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == PF_LINE || inputnum == HLT_LINE || inputnum == BUS_ERROR; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -85,12 +111,15 @@ protected:
address_space_config m_program_config;
uint16_t c_initial_mode;
+ uint16_t c_insn_set;
PAIR m_ppc; /* previous program counter */
PAIR m_reg[8];
PAIR m_psw;
uint16_t m_initial_pc;
uint8_t m_wait_state;
+ int8_t m_mcir;
+ uint16_t m_vsel;
uint8_t m_cp_state;
bool m_vec_active;
bool m_pf_active;
@@ -99,6 +128,8 @@ protected:
bool m_power_fail;
bool m_bus_error;
bool m_ext_halt;
+ bool m_check_irqs;
+ bool m_trace_trap;
int m_icount;
memory_access<16, 1, 0, ENDIANNESS_LITTLE>::cache m_cache;
memory_access<16, 1, 0, ENDIANNESS_LITTLE>::specific m_program;
@@ -113,7 +144,8 @@ protected:
inline void WWORD(int addr, int data);
inline void PUSH(int val);
inline int POP();
- void t11_check_irqs();
+
+ virtual void t11_check_irqs();
void take_interrupt(uint8_t vector);
void trap_to(uint16_t vector);
@@ -121,6 +153,7 @@ protected:
static const opcode_func s_opcode_table[65536 >> 3];
void op_0000(uint16_t op);
+ void op_0001(uint16_t op);
void halt(uint16_t op);
void illegal(uint16_t op);
void illegal4(uint16_t op);
@@ -1162,7 +1195,25 @@ protected:
void sub_ixd_ixd(uint16_t op);
};
-class k1801vm2_device : public t11_device
+class k1801vm1_device : public t11_device, public z80_daisy_chain_interface
+{
+public:
+ // construction/destruction
+ k1801vm1_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+protected:
+ // device-level overrides
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_state_interface overrides
+ virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+
+ virtual void t11_check_irqs() override;
+ void take_interrupt_halt(uint16_t vector);
+};
+
+
+class k1801vm2_device : public t11_device, public z80_daisy_chain_interface
{
public:
// construction/destruction
@@ -1170,7 +1221,7 @@ public:
protected:
// device-level overrides
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -1178,6 +1229,7 @@ protected:
DECLARE_DEVICE_TYPE(T11, t11_device)
+DECLARE_DEVICE_TYPE(K1801VM1, k1801vm1_device)
DECLARE_DEVICE_TYPE(K1801VM2, k1801vm2_device)
#endif // MAME_CPU_T11_T11_H
diff --git a/src/devices/cpu/t11/t11ops.hxx b/src/devices/cpu/t11/t11ops.hxx
index 450f485a2e4..bae21eab67d 100644
--- a/src/devices/cpu/t11/t11ops.hxx
+++ b/src/devices/cpu/t11/t11ops.hxx
@@ -219,13 +219,13 @@
#define MFPS_M(d) int dreg, result, ea; result = PSW; CLR_NZV; SETB_NZ; PUT_DB_##d(result)
/* MOV: dst = src */
#define MOV_R(s,d) int sreg, dreg, source, result; GET_SW_##s; CLR_NZV; result = source; SETW_NZ; PUT_DW_##d(result)
-#define MOV_M(s,d) int sreg, dreg, source, result, ea; GET_SW_##s; CLR_NZV; result = source; SETW_NZ; PUT_DWT_##d(result)
+#define MOV_M(s,d) int sreg, dreg, source, result, ea; GET_SW_##s; CLR_NZV; result = source; SETW_NZ; if (c_insn_set & IS_VM1) { PUT_DW_##d(result); } else { PUT_DWT_##d(result); }
#define MOVB_R(s,d) int sreg, dreg, source, result; GET_SB_##s; CLR_NZV; result = source; SETB_NZ; PUT_DW_##d((signed char)result)
#define MOVB_X(s,d) int sreg, dreg, source, result, ea; GET_SB_##s; CLR_NZV; result = source; SETB_NZ; PUT_DW_##d((signed char)result)
-#define MOVB_M(s,d) int sreg, dreg, source, result, ea; GET_SB_##s; CLR_NZV; result = source; SETB_NZ; PUT_DBT_##d(result)
+#define MOVB_M(s,d) int sreg, dreg, source, result, ea; GET_SB_##s; CLR_NZV; result = source; SETB_NZ; if (c_insn_set & IS_VM1) { PUT_DB_##d(result); } else { PUT_DBT_##d(result); }
/* MTPS: flags = src */
-#define MTPS_R(d) int dreg, dest; GET_DW_##d; PSW = (PSW & ~0xef) | (dest & 0xef); t11_check_irqs()
-#define MTPS_M(d) int dreg, dest, ea; GET_DW_##d; PSW = (PSW & ~0xef) | (dest & 0xef); t11_check_irqs()
+#define MTPS_R(d) int dreg, dest; GET_DB_##d; PSW = (PSW & ~0xef) | (dest & 0xef); m_check_irqs = true
+#define MTPS_M(d) int dreg, dest, ea; GET_DB_##d; PSW = (PSW & ~0xef) | (dest & 0xef); m_check_irqs = true
/* NEG: dst = -dst */
#define NEG_R(d) int dreg, dest, result; GET_DW_##d; CLR_NZVC; result = -dest; SETW_NZ; if (dest == 0x8000) SET_V; if (result) SET_C; PUT_DW_DREG(result)
#define NEG_M(d) int dreg, dest, result, ea; GET_DW_##d; CLR_NZVC; result = -dest; SETW_NZ; if (dest == 0x8000) SET_V; if (result) SET_C; PUT_DW_EA(result)
@@ -268,14 +268,27 @@
#define XOR_R(d) int sreg, dreg, source, dest, result; GET_SREG; source = REGW(sreg); GET_DW_##d; CLR_NZV; result = dest ^ source; SETW_NZ; PUT_DW_DREG(result)
#define XOR_M(d) int sreg, dreg, source, dest, result, ea; GET_SREG; source = REGW(sreg); GET_DW_##d; CLR_NZV; result = dest ^ source; SETW_NZ; PUT_DW_EA(result)
+/* test if insn is supported by the CPU */
+#define CHECK_IS(d) do { if (!(c_insn_set & (d))) { illegal(op); return; } } while (false)
void t11_device::trap_to(uint16_t vector)
{
- PUSH(PSW);
- PUSH(PC);
- PC = RWORD(vector);
- PSW = RWORD(vector + 2);
- t11_check_irqs();
+ if (c_insn_set & IS_VM1)
+ {
+ m_vsel = vector;
+ if (vector == T11_ILLINST || vector == T11_TIMEOUT)
+ m_mcir = MCIR_ILL;
+ else
+ m_mcir = MCIR_SET;
+ }
+ else
+ {
+ PUSH(PSW);
+ PUSH(PC);
+ PC = RWORD(vector);
+ PSW = RWORD(vector + 2);
+ }
+ m_check_irqs = true;
}
void t11_device::op_0000(uint16_t op)
@@ -284,12 +297,36 @@ void t11_device::op_0000(uint16_t op)
{
case 0x00: /* HALT */ halt(op); break;
case 0x01: /* WAIT */ m_icount = 0; m_wait_state = 1; break;
- case 0x02: /* RTI */ m_icount -= 24; PC = POP(); PSW = POP(); t11_check_irqs(); break;
- case 0x03: /* BPT */ m_icount -= 48; trap_to(0x0c); break;
- case 0x04: /* IOT */ m_icount -= 48; trap_to(0x10); break;
+ case 0x02: /* RTI */ m_icount -= 24; PC = POP(); PSW = POP(); if (GET_T) m_trace_trap = true; m_check_irqs = true; break;
+ case 0x03: /* BPT */ m_icount -= 48; trap_to(T11_BPT); break;
+ case 0x04: /* IOT */ m_icount -= 48; trap_to(T11_IOT); break;
case 0x05: /* RESET */ m_out_reset_func(ASSERT_LINE); m_out_reset_func(CLEAR_LINE); m_icount -= 110; break;
- case 0x06: /* RTT */ m_icount -= 33; PC = POP(); PSW = POP(); t11_check_irqs(); break;
- case 0x07: /* MFPT */ REGB(0) = 4; break;
+ case 0x06: /* RTT */ if (c_insn_set & IS_LEIS) { m_icount -= 33; PC = POP(); PSW = POP(); m_check_irqs = true; } else illegal(op); break;
+ case 0x07: /* MFPT */ if (c_insn_set & IS_MFPT) REGB(0) = 4; else illegal(op); break;
+
+ default: illegal(op); break;
+ }
+}
+
+void t11_device::op_0001(uint16_t op)
+{
+ CHECK_IS(IS_VM1);
+
+ switch (op & 014)
+ {
+ case 010: // START
+ m_icount -= 24;
+ PC = RWORD(VM1_STACK);
+ PSW = RWORD(VM1_STACK + 2);
+ WWORD(VM1_SEL1, RWORD(VM1_SEL1) & ~SEL1_HALT);
+ break;
+ case 014: // STEP
+ m_icount -= 24;
+ PC = RWORD(VM1_STACK);
+ PSW = RWORD(VM1_STACK + 2);
+ WWORD(VM1_SEL1, RWORD(VM1_SEL1) & ~SEL1_HALT);
+ PC += 2;
+ break;
default: illegal(op); break;
}
@@ -298,27 +335,40 @@ void t11_device::op_0000(uint16_t op)
void t11_device::halt(uint16_t op)
{
m_icount -= 48;
- PUSH(PSW);
- PUSH(PC);
- PC = m_initial_pc + 4;
- PSW = 0340;
- t11_check_irqs();
+ if (c_insn_set & IS_VM1)
+ {
+ trap_to(VM1_HALT);
+ }
+ else
+ {
+ PUSH(PSW);
+ PUSH(PC);
+ PC = m_initial_pc + 4;
+ PSW = 0340;
+ }
+ m_check_irqs = true;
}
void t11_device::illegal(uint16_t op)
{
m_icount -= 48;
- trap_to(0x08);
+ trap_to(T11_ILLINST);
}
void t11_device::illegal4(uint16_t op)
{
m_icount -= 48;
- trap_to(0x04);
+ trap_to(T11_TIMEOUT);
}
void t11_device::mark(uint16_t op)
{
+ if ((c_insn_set & IS_T11) || !(c_insn_set & IS_LEIS))
+ {
+ illegal(op);
+ return;
+ }
+
m_icount -= 36;
SP = PC + 2 * (op & 0x3f);
@@ -479,14 +529,14 @@ void t11_device::asl_ded(uint16_t op) { m_icount -= 30; { ASL_M(DED); } }
void t11_device::asl_ix(uint16_t op) { m_icount -= 30; { ASL_M(IX); } }
void t11_device::asl_ixd(uint16_t op) { m_icount -= 36; { ASL_M(IXD); } }
-void t11_device::sxt_rg(uint16_t op) { m_icount -= 12; { SXT_R(RG); } }
-void t11_device::sxt_rgd(uint16_t op) { m_icount -= 21; { SXT_M(RGD); } }
-void t11_device::sxt_in(uint16_t op) { m_icount -= 21; { SXT_M(IN); } }
-void t11_device::sxt_ind(uint16_t op) { m_icount -= 27; { SXT_M(IND); } }
-void t11_device::sxt_de(uint16_t op) { m_icount -= 24; { SXT_M(DE); } }
-void t11_device::sxt_ded(uint16_t op) { m_icount -= 30; { SXT_M(DED); } }
-void t11_device::sxt_ix(uint16_t op) { m_icount -= 30; { SXT_M(IX); } }
-void t11_device::sxt_ixd(uint16_t op) { m_icount -= 36; { SXT_M(IXD); } }
+void t11_device::sxt_rg(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 12; { SXT_R(RG); } }
+void t11_device::sxt_rgd(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 21; { SXT_M(RGD); } }
+void t11_device::sxt_in(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 21; { SXT_M(IN); } }
+void t11_device::sxt_ind(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 27; { SXT_M(IND); } }
+void t11_device::sxt_de(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 24; { SXT_M(DE); } }
+void t11_device::sxt_ded(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 30; { SXT_M(DED); } }
+void t11_device::sxt_ix(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 30; { SXT_M(IX); } }
+void t11_device::sxt_ixd(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 36; { SXT_M(IXD); } }
void t11_device::mov_rg_rg(uint16_t op) { m_icount -= 9+ 3; { MOV_R(RG,RG); } }
void t11_device::mov_rg_rgd(uint16_t op) { m_icount -= 9+12; { MOV_M(RG,RGD); } }
@@ -878,19 +928,21 @@ void t11_device::add_ixd_ded(uint16_t op) { m_icount -= 30+21; { ADD_M(IXD,DED
void t11_device::add_ixd_ix(uint16_t op) { m_icount -= 30+21; { ADD_M(IXD,IX); } }
void t11_device::add_ixd_ixd(uint16_t op) { m_icount -= 30+27; { ADD_M(IXD,IXD); } }
-void t11_device::xor_rg(uint16_t op) { m_icount -= 12; { XOR_R(RG); } }
-void t11_device::xor_rgd(uint16_t op) { m_icount -= 21; { XOR_M(RGD); } }
-void t11_device::xor_in(uint16_t op) { m_icount -= 21; { XOR_M(IN); } }
-void t11_device::xor_ind(uint16_t op) { m_icount -= 27; { XOR_M(IND); } }
-void t11_device::xor_de(uint16_t op) { m_icount -= 24; { XOR_M(DE); } }
-void t11_device::xor_ded(uint16_t op) { m_icount -= 30; { XOR_M(DED); } }
-void t11_device::xor_ix(uint16_t op) { m_icount -= 30; { XOR_M(IX); } }
-void t11_device::xor_ixd(uint16_t op) { m_icount -= 36; { XOR_M(IXD); } }
+void t11_device::xor_rg(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 12; { XOR_R(RG); } }
+void t11_device::xor_rgd(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 21; { XOR_M(RGD); } }
+void t11_device::xor_in(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 21; { XOR_M(IN); } }
+void t11_device::xor_ind(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 27; { XOR_M(IND); } }
+void t11_device::xor_de(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 24; { XOR_M(DE); } }
+void t11_device::xor_ded(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 30; { XOR_M(DED); } }
+void t11_device::xor_ix(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 30; { XOR_M(IX); } }
+void t11_device::xor_ixd(uint16_t op) { CHECK_IS(IS_LEIS); m_icount -= 36; { XOR_M(IXD); } }
void t11_device::sob(uint16_t op)
{
int sreg, source;
+ CHECK_IS(IS_LEIS);
+
m_icount -= 18;
GET_SREG; source = REGD(sreg);
source -= 1;
@@ -911,13 +963,13 @@ void t11_device::bcs(uint16_t op) { m_icount -= 12; { BR( GET_C); } }
void t11_device::emt(uint16_t op)
{
m_icount -= 48;
- trap_to(0x18);
+ trap_to(T11_EMT);
}
void t11_device::trap(uint16_t op)
{
m_icount -= 48;
- trap_to(0x1c);
+ trap_to(T11_TRAP);
}
void t11_device::clrb_rg(uint16_t op) { m_icount -= 12; { CLRB_R(RG); } }
@@ -1028,23 +1080,23 @@ void t11_device::aslb_ded(uint16_t op) { m_icount -= 30; { ASLB_M(DED); } }
void t11_device::aslb_ix(uint16_t op) { m_icount -= 30; { ASLB_M(IX); } }
void t11_device::aslb_ixd(uint16_t op) { m_icount -= 36; { ASLB_M(IXD); } }
-void t11_device::mtps_rg(uint16_t op) { m_icount -= 24; { MTPS_R(RG); } }
-void t11_device::mtps_rgd(uint16_t op) { m_icount -= 30; { MTPS_M(RGD); } }
-void t11_device::mtps_in(uint16_t op) { m_icount -= 30; { MTPS_M(IN); } }
-void t11_device::mtps_ind(uint16_t op) { m_icount -= 36; { MTPS_M(IND); } }
-void t11_device::mtps_de(uint16_t op) { m_icount -= 33; { MTPS_M(DE); } }
-void t11_device::mtps_ded(uint16_t op) { m_icount -= 39; { MTPS_M(DED); } }
-void t11_device::mtps_ix(uint16_t op) { m_icount -= 39; { MTPS_M(IX); } }
-void t11_device::mtps_ixd(uint16_t op) { m_icount -= 45; { MTPS_M(IXD); } }
-
-void t11_device::mfps_rg(uint16_t op) { m_icount -= 12; { MFPS_R(RG); } }
-void t11_device::mfps_rgd(uint16_t op) { m_icount -= 21; { MFPS_M(RGD); } }
-void t11_device::mfps_in(uint16_t op) { m_icount -= 21; { MFPS_M(IN); } }
-void t11_device::mfps_ind(uint16_t op) { m_icount -= 27; { MFPS_M(IND); } }
-void t11_device::mfps_de(uint16_t op) { m_icount -= 24; { MFPS_M(DE); } }
-void t11_device::mfps_ded(uint16_t op) { m_icount -= 30; { MFPS_M(DED); } }
-void t11_device::mfps_ix(uint16_t op) { m_icount -= 30; { MFPS_M(IX); } }
-void t11_device::mfps_ixd(uint16_t op) { m_icount -= 36; { MFPS_M(IXD); } }
+void t11_device::mtps_rg(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 24; { MTPS_R(RG); } }
+void t11_device::mtps_rgd(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 30; { MTPS_M(RGD); } }
+void t11_device::mtps_in(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 30; { MTPS_M(IN); } }
+void t11_device::mtps_ind(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 36; { MTPS_M(IND); } }
+void t11_device::mtps_de(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 33; { MTPS_M(DE); } }
+void t11_device::mtps_ded(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 39; { MTPS_M(DED); } }
+void t11_device::mtps_ix(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 39; { MTPS_M(IX); } }
+void t11_device::mtps_ixd(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 45; { MTPS_M(IXD); } }
+
+void t11_device::mfps_rg(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 12; { MFPS_R(RG); } }
+void t11_device::mfps_rgd(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 21; { MFPS_M(RGD); } }
+void t11_device::mfps_in(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 21; { MFPS_M(IN); } }
+void t11_device::mfps_ind(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 27; { MFPS_M(IND); } }
+void t11_device::mfps_de(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 24; { MFPS_M(DE); } }
+void t11_device::mfps_ded(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 30; { MFPS_M(DED); } }
+void t11_device::mfps_ix(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 30; { MFPS_M(IX); } }
+void t11_device::mfps_ixd(uint16_t op) { CHECK_IS(IS_MXPS); m_icount -= 36; { MFPS_M(IXD); } }
void t11_device::movb_rg_rg(uint16_t op) { m_icount -= 9+ 3; { MOVB_R(RG,RG); } }
void t11_device::movb_rg_rgd(uint16_t op) { m_icount -= 9+12; { MOVB_M(RG,RGD); } }
diff --git a/src/devices/cpu/t11/t11table.hxx b/src/devices/cpu/t11/t11table.hxx
index 48ebf95c5ce..98ffaa6195f 100644
--- a/src/devices/cpu/t11/t11table.hxx
+++ b/src/devices/cpu/t11/t11table.hxx
@@ -25,7 +25,7 @@ modes:
const t11_device::opcode_func t11_device::s_opcode_table[65536 >> 3] =
{
/* 0x0000 */
- OP(op_0000), OP(halt), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal),
+ OP(op_0000), OP(op_0001), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal), OP(illegal),
OP(illegal4), OP(jmp_rgd), OP(jmp_in), OP(jmp_ind), OP(jmp_de), OP(jmp_ded), OP(jmp_ix), OP(jmp_ixd),
OP(rts), OP(illegal), OP(illegal), OP(illegal), OP(ccc), OP(ccc), OP(scc), OP(scc),
OP(swab_rg), OP(swab_rgd), OP(swab_in), OP(swab_ind), OP(swab_de), OP(swab_ded), OP(swab_ix), OP(swab_ixd),
diff --git a/src/devices/cpu/tlcs870/tlcs870.h b/src/devices/cpu/tlcs870/tlcs870.h
index b6c3d73478d..e6e4d5f5d05 100644
--- a/src/devices/cpu/tlcs870/tlcs870.h
+++ b/src/devices/cpu/tlcs870/tlcs870.h
@@ -45,13 +45,12 @@ protected:
tlcs870_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 26; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -67,7 +66,7 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void tmp87ph40an_mem(address_map &map);
+ void tmp87ph40an_mem(address_map &map) ATTR_COLD;
uint32_t m_debugger_temp;
diff --git a/src/devices/cpu/tlcs90/tlcs90.cpp b/src/devices/cpu/tlcs90/tlcs90.cpp
index be2f05a181a..40ba8291c7c 100644
--- a/src/devices/cpu/tlcs90/tlcs90.cpp
+++ b/src/devices/cpu/tlcs90/tlcs90.cpp
@@ -6,10 +6,6 @@
emulation by Luca Elia, based on the Z80 core by Juergen Buchmueller
- ChangeLog:
-
- 20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
-
*************************************************************************************************************/
#include "emu.h"
@@ -284,31 +280,28 @@ static uint8_t SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r
#define OP_16 0x80
-
-
-
-#define OP( X,CT ) m_op = X; m_cyc_t = (CT*2);
-#define OP16( X,CT ) OP( (X)|OP_16,CT )
-
-#define OPCC( X,CF,CT ) OP( X, CT ) m_cyc_f = (CF*2);
-#define OPCC16( X,CF,CT ) OPCC( (X)|OP_16,CF,CT )
-
-#define BIT8( N,I ) m_mode##N = e_mode::BIT8; m_r##N = I;
-#define I8( N,I ) m_mode##N = e_mode::I8; m_r##N = I;
-#define D8( N,I ) m_mode##N = e_mode::D8; m_r##N = I;
-#define I16( N,I ) m_mode##N = e_mode::I16; m_r##N = I;
-#define D16( N,I ) m_mode##N = e_mode::D16; m_r##N = I;
-#define R8( N,R ) m_mode##N = e_mode::R8; m_r##N = R;
-#define R16( N,R ) m_mode##N = e_mode::R16; m_r##N = R;
-#define Q16( N,R ) m_mode##N = e_mode::R16; m_r##N = R; if (m_r##N == SP) m_r##N = AF;
-#define MI16( N,I ) m_mode##N = e_mode::MI16; m_r##N = I;
-#define MR16( N,R ) m_mode##N = e_mode::MR16; m_r##N = R;
-#define MR16D8( N,R,I ) m_mode##N = e_mode::MR16D8; m_r##N = R; m_r##N##b = I;
-#define MR16R8( N,R,g ) m_mode##N = e_mode::MR16R8; m_r##N = R; m_r##N##b = g;
-#define NONE( N ) m_mode##N = e_mode::NONE;
-#define CC( N,cc ) m_mode##N = e_mode::CC; m_r##N = cc;
-#define R16D8( N,R,I ) m_mode##N = e_mode::R16D8; m_r##N = R; m_r##N##b = I;
-#define R16R8( N,R,g ) m_mode##N = e_mode::R16R8; m_r##N = R; m_r##N##b = g;
+#define OP( X,CT ) m_op = X; m_cyc_t = (CT*2);
+#define OP16( X,CT ) OP( (X)|OP_16,CT )
+
+#define OPCC( X,CF,CT ) OP( X, CT ) m_cyc_f = (CF*2);
+#define OPCC16( X,CF,CT ) OPCC( (X)|OP_16,CF,CT )
+
+#define BIT8( N,I ) m_mode##N = e_mode::BIT8; m_r##N = I;
+#define I8( N,I ) m_mode##N = e_mode::I8; m_r##N = I;
+#define D8( N,I ) m_mode##N = e_mode::D8; m_r##N = I;
+#define I16( N,I ) m_mode##N = e_mode::I16; m_r##N = I;
+#define D16( N,I ) m_mode##N = e_mode::D16; m_r##N = I;
+#define R8( N,R ) m_mode##N = e_mode::R8; m_r##N = R;
+#define R16( N,R ) m_mode##N = e_mode::R16; m_r##N = R;
+#define Q16( N,R ) m_mode##N = e_mode::R16; m_r##N = R; if (m_r##N == SP) m_r##N = AF;
+#define MI16( N,I ) m_mode##N = e_mode::MI16; m_r##N = I;
+#define MR16( N,R ) m_mode##N = e_mode::MR16; m_r##N = R;
+#define MR16D8( N,R,I ) m_mode##N = e_mode::MR16D8; m_r##N = R; m_r##N##b = I;
+#define MR16R8( N,R,g ) m_mode##N = e_mode::MR16R8; m_r##N = R; m_r##N##b = g;
+#define NONE( N ) m_mode##N = e_mode::NONE;
+#define CC( N,cc ) m_mode##N = e_mode::CC; m_r##N = cc;
+#define R16D8( N,R,I ) m_mode##N = e_mode::R16D8; m_r##N = R; m_r##N##b = I;
+#define R16R8( N,R,g ) m_mode##N = e_mode::R16R8; m_r##N = R; m_r##N##b = g;
uint8_t tlcs90_device::RM8 (uint32_t a) { return m_program->read_byte( a ); }
uint16_t tlcs90_device::RM16(uint32_t a) { return RM8(a) | (RM8( (a+1) & 0xffff ) << 8); }
@@ -1465,7 +1458,10 @@ void tlcs90_device::execute_run()
// when in HALT state, the fetched opcode is not dispatched (aka a NOP) and the PC is not increased
if (m_halt)
+ {
+ debugger_wait_hook();
m_op = NOP;
+ }
else
{
m_prvpc.d = m_pc.d;
@@ -2130,11 +2126,6 @@ void tlcs90_device::device_reset()
std::fill(std::begin(m_treg_16bit), std::end(m_treg_16bit), 0);
}
-void tlcs90_device::execute_burn(int32_t cycles)
-{
- m_icount -= 4 * ((cycles + 3) / 4);
-}
-
/*************************************************************************************************************
diff --git a/src/devices/cpu/tlcs90/tlcs90.h b/src/devices/cpu/tlcs90/tlcs90.h
index d42eb719255..9f690c934ad 100644
--- a/src/devices/cpu/tlcs90/tlcs90.h
+++ b/src/devices/cpu/tlcs90/tlcs90.h
@@ -5,30 +5,30 @@
#pragma once
-enum tlcs90_e_irq { INTSWI = 0, INTNMI, INTWD, INT0, INTT0, INTT1, INTT2, INTT3, INTT4, INT1, INTT5, INT2, INTRX, INTTX, INTMAX };
-DECLARE_ENUM_INCDEC_OPERATORS(tlcs90_e_irq)
class tlcs90_device : public cpu_device
{
- static constexpr int MAX_PORTS = 9;
- //static constexpr int MAX_ANALOG_INPUTS = 16;
-
-protected:
- TIMER_CALLBACK_MEMBER( t90_timer_callback );
- TIMER_CALLBACK_MEMBER( t90_timer4_callback );
-
- void tmp90840_regs(address_map &map);
- void tmp90840_mem(address_map &map);
- void tmp90841_mem(address_map &map);
- void tmp90844_regs(address_map &map);
- void tmp90ph44_mem(address_map &map);
- void tmp91640_mem(address_map &map);
- void tmp91641_mem(address_map &map);
-
- enum _e_op { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV };
-
-
public:
+ enum tlcs90_e_irq
+ {
+ INTSWI = 0,
+ INTNMI,
+ INTWD,
+ INT0,
+ INTT0,
+ INTT1,
+ INTT2,
+ INTT3,
+ INTT4,
+ INT1,
+ INTT5,
+ INT2,
+ INTRX,
+ INTTX,
+
+ INTMAX
+ };
+
// configuration
template <size_t Port> auto port_read() { return m_port_read_cb[Port].bind(); }
template <size_t Port> auto port_write() { return m_port_write_cb[Port].bind(); }
@@ -38,17 +38,15 @@ protected:
tlcs90_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor program_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 26; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- virtual void execute_burn(int32_t cycles) override;
// device_memory_interface overrides
virtual space_config_vector memory_space_config() const override;
@@ -56,6 +54,18 @@ protected:
// device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
+ // address maps
+ void tmp90840_regs(address_map &map) ATTR_COLD;
+ void tmp90840_mem(address_map &map) ATTR_COLD;
+ void tmp90841_mem(address_map &map) ATTR_COLD;
+ void tmp90844_regs(address_map &map) ATTR_COLD;
+ void tmp90ph44_mem(address_map &map) ATTR_COLD;
+ void tmp91640_mem(address_map &map) ATTR_COLD;
+ void tmp91641_mem(address_map &map) ATTR_COLD;
+
+ TIMER_CALLBACK_MEMBER(t90_timer_callback);
+ TIMER_CALLBACK_MEMBER(t90_timer4_callback);
+
// internal registers
uint8_t p1_r();
void p1_w(uint8_t data);
@@ -104,7 +114,21 @@ protected:
void reserved_w(offs_t offset, uint8_t data);
private:
- enum class e_mode : u8 {
+ enum _e_op
+ {
+ UNKNOWN,
+ NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR,
+ LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP,
+ JP, JR, CALL, CALLR, RET, RETI, HALT, DI,
+ EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF,
+ CCF, TSET, BIT, SET, RES, INC, DEC, INCX,
+ DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND,
+ XOR, OR, CP, RLC, RRC, RL, RR, SLA,
+ SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV
+ };
+
+ enum class e_mode : u8
+ {
NONE, BIT8, CC,
I8, D8, R8,
I16, D16, R16,
@@ -112,18 +136,21 @@ private:
R16D8, R16R8
};
+ static constexpr int MAX_PORTS = 9;
+ //static constexpr int MAX_ANALOG_INPUTS = 16;
+
address_space_config m_program_config;
devcb_read8::array<MAX_PORTS> m_port_read_cb;
devcb_write8::array<MAX_PORTS> m_port_write_cb;
- PAIR m_prvpc,m_pc,m_sp,m_af,m_bc,m_de,m_hl,m_ix,m_iy;
- PAIR m_af2,m_bc2,m_de2,m_hl2;
- uint8_t m_halt, m_after_EI;
- uint16_t m_irq_state, m_irq_line_state, m_irq_mask;
+ PAIR m_prvpc, m_pc, m_sp, m_af, m_bc, m_de, m_hl, m_ix, m_iy;
+ PAIR m_af2, m_bc2, m_de2, m_hl2;
+ uint8_t m_halt, m_after_EI;
+ uint16_t m_irq_state, m_irq_line_state, m_irq_mask;
address_space *m_program;
- int m_icount;
- int m_extra_cycles; // extra cycles for interrupts
+ int m_icount;
+ int m_extra_cycles; // extra cycles for interrupts
uint8_t m_port_latch[MAX_PORTS];
@@ -134,13 +161,13 @@ private:
uint8_t m_p8cr;
uint8_t m_smmod;
- uint32_t m_ixbase,m_iybase;
+ uint32_t m_ixbase,m_iybase;
// Timers: 4 x 8-bit + 1 x 16-bit
- emu_timer *m_timer[4+1];
- uint8_t m_timer_value[4];
- uint16_t m_timer4_value;
- attotime m_timer_period;
+ emu_timer *m_timer[4+1];
+ uint8_t m_timer_value[4];
+ uint16_t m_timer4_value;
+ attotime m_timer_period;
uint8_t m_tmod;
uint8_t m_tclk;
uint8_t m_trun;
@@ -149,44 +176,44 @@ private:
uint16_t m_treg_16bit[2];
// Work registers
- uint8_t m_op;
+ uint8_t m_op;
- e_mode m_mode1;
- uint16_t m_r1,m_r1b;
+ e_mode m_mode1;
+ uint16_t m_r1, m_r1b;
- e_mode m_mode2;
- uint16_t m_r2,m_r2b;
+ e_mode m_mode2;
+ uint16_t m_r2, m_r2b;
- int m_cyc_t,m_cyc_f;
+ int m_cyc_t, m_cyc_f;
- uint32_t m_addr;
+ uint32_t m_addr;
- inline uint8_t RM8 (uint32_t a);
+ inline uint8_t RM8(uint32_t a);
inline uint16_t RM16(uint32_t a);
- inline void WM8 (uint32_t a, uint8_t v);
+ inline void WM8(uint32_t a, uint8_t v);
inline void WM16(uint32_t a, uint16_t v);
- inline uint8_t RX8 (uint32_t a, uint32_t base);
+ inline uint8_t RX8(uint32_t a, uint32_t base);
inline uint16_t RX16(uint32_t a, uint32_t base);
- inline void WX8 (uint32_t a, uint8_t v, uint32_t base);
+ inline void WX8(uint32_t a, uint8_t v, uint32_t base);
inline void WX16(uint32_t a, uint16_t v, uint32_t base);
- inline uint8_t READ8();
+ inline uint8_t READ8();
inline uint16_t READ16();
void decode();
- inline uint16_t r8( const uint16_t r );
- inline void w8( const uint16_t r, uint16_t value );
- inline uint16_t r16( const uint16_t r );
- inline void w16( const uint16_t r, uint16_t value );
+ inline uint16_t r8(const uint16_t r);
+ inline void w8(const uint16_t r, uint16_t value);
+ inline uint16_t r16(const uint16_t r);
+ inline void w16(const uint16_t r, uint16_t value);
inline uint8_t Read1_8();
inline uint16_t Read1_16();
inline uint8_t Read2_8();
inline uint16_t Read2_16();
- inline void Write1_8( uint8_t value );
- inline void Write1_16( uint16_t value );
- inline void Write2_8( uint8_t value );
- inline void Write2_16( uint16_t value );
- inline int Test( uint8_t cond );
- inline void Push( uint16_t rr );
- inline void Pop( uint16_t rr );
+ inline void Write1_8(uint8_t value);
+ inline void Write1_16(uint16_t value);
+ inline void Write2_8(uint8_t value);
+ inline void Write2_16(uint16_t value);
+ inline int Test(uint8_t cond);
+ inline void Push(uint16_t rr);
+ inline void Pop(uint16_t rr);
inline void halt();
inline void leave_halt();
inline void raise_irq(int irq);
@@ -275,6 +302,8 @@ protected:
};
+DECLARE_ENUM_INCDEC_OPERATORS(tlcs90_device::tlcs90_e_irq)
+
DECLARE_DEVICE_TYPE(TMP90840, tmp90840_device)
DECLARE_DEVICE_TYPE(TMP90841, tmp90841_device)
DECLARE_DEVICE_TYPE(TMP90845, tmp90845_device)
diff --git a/src/devices/cpu/tlcs90/tlcs90d.cpp b/src/devices/cpu/tlcs90/tlcs90d.cpp
index 8f850d4c486..4254faddd2b 100644
--- a/src/devices/cpu/tlcs90/tlcs90d.cpp
+++ b/src/devices/cpu/tlcs90/tlcs90d.cpp
@@ -2,25 +2,39 @@
// copyright-holders:Luca Elia
/*************************************************************************************************************
- Toshiba TLCS-90 Series MCU's
-
- emulation by Luca Elia, based on the Z80 core by Juergen Buchmueller
-
- ChangeLog:
-
- 20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
+ Toshiba TLCS-90 Series MCU's disassembler
*************************************************************************************************************/
#include "emu.h"
#include "tlcs90d.h"
-const char *const tlcs90_disassembler::op_names[] = { "??", "nop", "ex", "exx", "ld", "ldw", "lda", "ldi", "ldir", "ldd", "lddr", "cpi", "cpir", "cpd", "cpdr", "push", "pop", "jp", "jr", "call", "callr", "ret", "reti", "halt", "di", "ei", "swi", "daa", "cpl", "neg", "ldar", "rcf", "scf", "ccf", "tset", "bit", "set", "res", "inc", "dec", "incx", "decx", "incw", "decw", "add", "adc", "sub", "sbc", "and", "xor", "or", "cp", "rlc", "rrc", "rl", "rr", "sla", "sra", "sll", "srl", "rld", "rrd", "djnz", "mul", "div" };
+const char *const tlcs90_disassembler::op_names[] =
+{
+ "??",
+ "nop", "ex", "exx", "ld", "ldw", "lda", "ldi", "ldir",
+ "ldd", "lddr", "cpi", "cpir", "cpd", "cpdr", "push", "pop",
+ "jp", "jr", "call", "callr","ret", "reti", "halt", "di",
+ "ei", "swi", "daa", "cpl", "neg", "ldar", "rcf", "scf",
+ "ccf", "tset", "bit", "set", "res", "inc", "dec", "incx",
+ "decx", "incw", "decw", "add", "adc", "sub", "sbc", "and",
+ "xor", "or", "cp", "rlc", "rrc", "rl", "rr", "sla",
+ "sra", "sll", "srl", "rld", "rrd", "djnz", "mul", "div"
+};
-const char *const tlcs90_disassembler::r8_names[] = { "b", "c", "d", "e", "h", "l", "a" };
-const char *const tlcs90_disassembler::r16_names[] = { "bc", "de", "hl", "??", "ix", "iy", "sp", "af", "af'", "pc" };
+const char *const tlcs90_disassembler::r8_names[] =
+{
+ "b", "c", "d", "e", "h", "l", "a"
+};
+const char *const tlcs90_disassembler::r16_names[] =
+{
+ "bc", "de", "hl", "??", "ix", "iy", "sp", "af", "af'", "pc"
+};
-const char *const tlcs90_disassembler::cc_names[] = { "f", "lt", "le", "ule", "ov", "mi", "z", "c", "", "ge", "gt", "ugt", "nov", "pl", "nz", "nc" };
+const char *const tlcs90_disassembler::cc_names[] =
+{
+ "f", "lt", "le", "ule", "ov", "mi", "z", "c", "", "ge", "gt", "ugt", "nov", "pl", "nz", "nc"
+};
u32 tlcs90_disassembler::opcode_alignment() const
{
@@ -32,7 +46,8 @@ tlcs90_disassembler::tlcs90_disassembler(uint16_t iobase, const char *const ir_n
{
}
-const char *const tmp90840_disassembler::ir_names[0x40] = {
+const char *const tmp90840_disassembler::ir_names[0x40] =
+{
"P0", "P1", "P01CR/IRFL", "IRFH", "P2", "P2CR", "P3", "P3CR",
"P4", "P4CR", "P5", "SMMOD", "P6", "P7", "P67CR", "SMCR",
"P8", "P8CR", "WDMOD", "WDCR", "TREG0", "TREG1", "TREG2", "TREG3",
@@ -48,7 +63,8 @@ tmp90840_disassembler::tmp90840_disassembler()
{
}
-const char *const tmp90844_disassembler::ir_names[0x40] = {
+const char *const tmp90844_disassembler::ir_names[0x40] =
+{
"P0", "P0CR", "P1", "P1CR", "P2", "P2CR", "P3", "P3CR",
"P4", "P4CR", "P5", "P6", "P7", "P67CR", "P23FR", "P4FR",
"P67FR", "P25FR", "WDMOD", "WDCR", "TREG0", "TREG1", "TREG2", "TREG3",
@@ -64,7 +80,8 @@ tmp90844_disassembler::tmp90844_disassembler()
{
}
-const char *const tmp90c051_disassembler::ir_names[0x4c] = {
+const char *const tmp90c051_disassembler::ir_names[0x4c] =
+{
"P2", "P2CR", "P3", "P3CR",
"P3FR", "P4", "P5", "P45CR", "P45FR", "P6", "P6CR", "P6FR",
"TREG0", "TREG1", "TREG2", "TREG3", "T01MOD", "T23MOD", "TFFCR", "TRDC",
@@ -143,28 +160,28 @@ const char *tlcs90_disassembler::internal_registers_names(uint16_t x) const
#define ZF 0x40
#define SF 0x80
-#define OP( X,CT ) m_op = X;
-#define OP16( X,CT ) m_op = X;
-
-#define OPCC( X,CF,CT ) m_op = X;
-#define OPCC16( X,CF,CT ) m_op = X;
-
-#define BIT8( N,I ) m_mode##N = e_mode::BIT8; m_r##N = I;
-#define I8( N,I ) m_mode##N = e_mode::I8; m_r##N = I;
-#define D8( N,I ) m_mode##N = e_mode::D8; m_r##N = I;
-#define I16( N,I ) m_mode##N = e_mode::I16; m_r##N = I;
-#define D16( N,I ) m_mode##N = e_mode::D16; m_r##N = I;
-#define R8( N,R ) m_mode##N = e_mode::R8; m_r##N = R;
-#define R16( N,R ) m_mode##N = e_mode::R16; m_r##N = R;
-#define Q16( N,R ) m_mode##N = e_mode::R16; m_r##N = R; if (m_r##N == SP) m_r##N = AF;
-#define MI16( N,I ) m_mode##N = e_mode::MI16; m_r##N = I;
-#define MR16( N,R ) m_mode##N = e_mode::MR16; m_r##N = R;
-#define MR16D8( N,R,I ) m_mode##N = e_mode::MR16D8; m_r##N = R; m_r##N##b = I;
-#define MR16R8( N,R,g ) m_mode##N = e_mode::MR16R8; m_r##N = R; m_r##N##b = g;
-#define NONE( N ) m_mode##N = e_mode::NONE;
-#define CC( N,cc ) m_mode##N = e_mode::CC; m_r##N = cc;
-#define R16D8( N,R,I ) m_mode##N = e_mode::R16D8; m_r##N = R; m_r##N##b = I;
-#define R16R8( N,R,g ) m_mode##N = e_mode::R16R8; m_r##N = R; m_r##N##b = g;
+#define OP( X,CT ) m_op = X;
+#define OP16( X,CT ) m_op = X;
+
+#define OPCC( X,CF,CT ) m_op = X;
+#define OPCC16( X,CF,CT ) m_op = X;
+
+#define BIT8( N,I ) m_mode##N = e_mode::BIT8; m_r##N = I;
+#define I8( N,I ) m_mode##N = e_mode::I8; m_r##N = I;
+#define D8( N,I ) m_mode##N = e_mode::D8; m_r##N = I;
+#define I16( N,I ) m_mode##N = e_mode::I16; m_r##N = I;
+#define D16( N,I ) m_mode##N = e_mode::D16; m_r##N = I;
+#define R8( N,R ) m_mode##N = e_mode::R8; m_r##N = R;
+#define R16( N,R ) m_mode##N = e_mode::R16; m_r##N = R;
+#define Q16( N,R ) m_mode##N = e_mode::R16; m_r##N = R; if (m_r##N == SP) m_r##N = AF;
+#define MI16( N,I ) m_mode##N = e_mode::MI16; m_r##N = I;
+#define MR16( N,R ) m_mode##N = e_mode::MR16; m_r##N = R;
+#define MR16D8( N,R,I ) m_mode##N = e_mode::MR16D8; m_r##N = R; m_r##N##b = I;
+#define MR16R8( N,R,g ) m_mode##N = e_mode::MR16R8; m_r##N = R; m_r##N##b = g;
+#define NONE( N ) m_mode##N = e_mode::NONE;
+#define CC( N,cc ) m_mode##N = e_mode::CC; m_r##N = cc;
+#define R16D8( N,R,I ) m_mode##N = e_mode::R16D8; m_r##N = R; m_r##N##b = I;
+#define R16R8( N,R,g ) m_mode##N = e_mode::R16R8; m_r##N = R; m_r##N##b = g;
uint8_t tlcs90_disassembler::READ8()
{
@@ -960,7 +977,7 @@ bool tlcs90_disassembler::stream_arg(std::ostream &stream, uint32_t pc, const ch
if (reg_name)
util::stream_format(stream, "%s(%s)", pre, reg_name);
else
- util::stream_format(stream, "%s($%04X)", pre, r );
+ util::stream_format(stream, "%s($%04X)", pre, r);
return true;
case e_mode::R8: util::stream_format(stream, "%s%s", pre, r8_names[r] ); return true;
case e_mode::R16: util::stream_format(stream, "%s%s", pre, r16_names[r] ); return true;
diff --git a/src/devices/cpu/tlcs90/tlcs90d.h b/src/devices/cpu/tlcs90/tlcs90d.h
index 2c71cd432d2..a8392e74eb3 100644
--- a/src/devices/cpu/tlcs90/tlcs90d.h
+++ b/src/devices/cpu/tlcs90/tlcs90d.h
@@ -2,13 +2,7 @@
// copyright-holders:Luca Elia
/*************************************************************************************************************
- Toshiba TLCS-90 Series MCU's
-
- emulation by Luca Elia, based on the Z80 core by Juergen Buchmueller
-
- ChangeLog:
-
- 20150517 Fixed TRUN bit masking (timers start/stop handling) [Rainer Keuchel]
+ Toshiba TLCS-90 Series MCU's disassembler
*************************************************************************************************************/
@@ -28,9 +22,21 @@ protected:
tlcs90_disassembler(uint16_t iobase, const char *const ir_names[]);
private:
- enum _e_op { UNKNOWN, NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR, LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP, JP, JR, CALL, CALLR, RET, RETI, HALT, DI, EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF, CCF, TSET, BIT, SET, RES, INC, DEC, INCX, DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND, XOR, OR, CP, RLC, RRC, RL, RR, SLA, SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV };
+ enum _e_op
+ {
+ UNKNOWN,
+ NOP, EX, EXX, LD, LDW, LDA, LDI, LDIR,
+ LDD, LDDR, CPI, CPIR, CPD, CPDR, PUSH, POP,
+ JP, JR, CALL, CALLR, RET, RETI, HALT, DI,
+ EI, SWI, DAA, CPL, NEG, LDAR, RCF, SCF,
+ CCF, TSET, BIT, SET, RES, INC, DEC, INCX,
+ DECX, INCW, DECW, ADD, ADC, SUB, SBC, AND,
+ XOR, OR, CP, RLC, RRC, RL, RR, SLA,
+ SRA, SLL, SRL, RLD, RRD, DJNZ, MUL, DIV
+ };
- enum class e_mode : u8 {
+ enum class e_mode : u8
+ {
NONE, BIT8, CC,
I8, D8, R8,
I16, D16, R16,
@@ -46,18 +52,18 @@ private:
const uint16_t m_iobase;
const char *const *m_ir_names;
- uint8_t m_op;
+ uint8_t m_op;
- e_mode m_mode1;
- uint16_t m_r1,m_r1b;
+ e_mode m_mode1;
+ uint16_t m_r1, m_r1b;
- e_mode m_mode2;
- uint16_t m_r2,m_r2b;
+ e_mode m_mode2;
+ uint16_t m_r2, m_r2b;
offs_t m_addr;
const data_buffer *m_opcodes;
- inline uint8_t READ8();
+ inline uint8_t READ8();
inline uint16_t READ16();
void decode();
diff --git a/src/devices/cpu/tlcs900/tlcs900.cpp b/src/devices/cpu/tlcs900/tlcs900.cpp
index 3fc240cdb4a..ac8bfaf78fc 100644
--- a/src/devices/cpu/tlcs900/tlcs900.cpp
+++ b/src/devices/cpu/tlcs900/tlcs900.cpp
@@ -70,13 +70,12 @@ std::unique_ptr<util::disasm_interface> tlcs900_device::create_disassembler()
}
-/* Flag defines */
-#define FLAG_CF 0x01
-#define FLAG_NF 0x02
-#define FLAG_VF 0x04
-#define FLAG_HF 0x10
-#define FLAG_ZF 0x40
-#define FLAG_SF 0x80
+static constexpr u8 FLAG_CF = 0x01;
+static constexpr u8 FLAG_NF = 0x02;
+static constexpr u8 FLAG_VF = 0x04;
+static constexpr u8 FLAG_HF = 0x10;
+static constexpr u8 FLAG_ZF = 0x40;
+static constexpr u8 FLAG_SF = 0x80;
inline uint8_t tlcs900_device::RDOP()
@@ -139,7 +138,7 @@ void tlcs900_device::device_start()
save_item( NAME(m_dmac) );
save_item( NAME(m_dmam) );
save_item( NAME(m_timer_pre) );
- save_item( NAME(m_timer) );
+ save_item( NAME(m_timer_8) );
save_item( NAME(m_timer_change) );
save_item( NAME(m_level) );
save_item( NAME(m_check_irqs) );
@@ -151,7 +150,7 @@ void tlcs900_device::device_start()
save_item( NAME(m_halted) );
save_item( NAME(m_regbank) );
- state_add( TLCS900_PC, "PC", m_pc.d ).formatstr("%08X");
+ state_add( TLCS900_PC, "PC", m_pc.d ).callimport().formatstr("%08X");
state_add( TLCS900_XWA0, "XWA0", m_xwa[0].d ).formatstr("%08X");
state_add( TLCS900_XBC0, "XBC0", m_xbc[0].d ).formatstr("%08X");
state_add( TLCS900_XDE0, "XDE0", m_xde[0].d ).formatstr("%08X");
@@ -190,8 +189,8 @@ void tlcs900_device::device_start()
state_add( TLCS900_DMAC3, "DMAC3", m_dmac[3].w.l ).formatstr("%04X");
state_add( TLCS900_DMAM3, "DMAM3", m_dmam[3].b.l ).formatstr("%02X");
- state_add( STATE_GENPC, "GENPC", m_pc.d ).noshow();
- state_add( STATE_GENPCBASE, "CURPC", m_pc.d ).noshow();
+ state_add( STATE_GENPC, "GENPC", m_pc.d ).callimport().noshow();
+ state_add( STATE_GENPCBASE, "CURPC", m_pc.d ).callimport().noshow();
state_add( STATE_GENFLAGS, "GENFLAGS", m_sr.w.l ).formatstr("%12s").noshow();
set_icountptr(m_icount);
@@ -201,7 +200,7 @@ void tlcs900_device::device_reset()
{
m_pc.d = 0x00008000;
/* system mode, iff set to 111, min mode, register bank 0 */
- m_sr.d = 0xF000;
+ m_sr.d = 0xf000;
m_regbank = 0;
m_xssp.d = 0x0100;
m_halted = 0;
@@ -211,12 +210,12 @@ void tlcs900_device::device_reset()
void tlcs900h_device::device_reset()
{
- m_pc.b.l = RDMEM( 0xFFFF00 );
- m_pc.b.h = RDMEM( 0xFFFF01 );
- m_pc.b.h2 = RDMEM( 0xFFFF02 );
+ m_pc.b.l = RDMEM( 0xffff00 );
+ m_pc.b.h = RDMEM( 0xffff01 );
+ m_pc.b.h2 = RDMEM( 0xffff02 );
m_pc.b.h3 = 0;
/* system mode, iff set to 111, max mode, register bank 0 */
- m_sr.d = 0xF800;
+ m_sr.d = 0xf800;
m_regbank = 0;
m_xssp.d = 0x0100;
m_halted = 0;
@@ -225,6 +224,18 @@ void tlcs900h_device::device_reset()
}
+void tlcs900_device::state_import(const device_state_entry &entry)
+{
+ switch (entry.index())
+ {
+ case STATE_GENPC:
+ case STATE_GENPCBASE:
+ case TLCS900_PC:
+ m_prefetch_clear = true;
+ break;
+ }
+}
+
void tlcs900_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
switch (entry.index())
@@ -266,14 +277,15 @@ void tlcs900_device::execute_run()
m_check_irqs = 0;
}
- debugger_instruction_hook( m_pc.d );
-
if ( m_halted )
{
+ debugger_wait_hook();
m_cycles += 8;
}
else
{
+ debugger_instruction_hook( m_pc.d );
+
m_op = RDOP();
inst = &m_mnemonic[m_op];
prepare_operands( inst );
diff --git a/src/devices/cpu/tlcs900/tlcs900.h b/src/devices/cpu/tlcs900/tlcs900.h
index f3b77d44622..36feca4e7b1 100644
--- a/src/devices/cpu/tlcs900/tlcs900.h
+++ b/src/devices/cpu/tlcs900/tlcs900.h
@@ -20,6 +20,9 @@ enum tlcs900_inputs
TLCS900_INT6,
TLCS900_INT7,
TLCS900_INT8,
+ TLCS900_INT9,
+ TLCS900_INTA,
+ TLCS900_INTB,
TLCS900_TIO,
TLCS900_NUM_INPUTS
};
@@ -51,13 +54,12 @@ protected:
tlcs900_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; } /* FIXME */
virtual uint32_t execute_max_cycles() const noexcept override { return 1; } /* FIXME */
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
@@ -65,6 +67,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
// device_state_interface overrides
+ virtual void state_import(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// device_disasm_interface overrides
@@ -102,8 +105,8 @@ protected:
/* Internal timers, irqs, etc */
uint32_t m_timer_pre;
- uint8_t m_timer[6];
- int m_timer_change[4];
+ uint8_t m_timer_8[6];
+ int m_timer_change[8];
bool m_prefetch_clear;
uint8_t m_prefetch_index;
uint8_t m_prefetch[4];
@@ -644,7 +647,7 @@ protected:
tlcs900h_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual int tlcs900_gpr_cycles() const override { return 1; }
virtual int tlcs900_mem_index_cycles() const override { return 1; }
diff --git a/src/devices/cpu/tlcs900/tmp94c241.cpp b/src/devices/cpu/tlcs900/tmp94c241.cpp
new file mode 100644
index 00000000000..e0bfc8dd07b
--- /dev/null
+++ b/src/devices/cpu/tlcs900/tmp94c241.cpp
@@ -0,0 +1,1332 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR,Felipe Sanches
+/****************************************************************************
+
+ Toshiba TMP94C241 microcontroller
+
+****************************************************************************/
+
+#include "emu.h"
+#include "tmp94c241.h"
+#include "dasm900.h"
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+// device type definition
+DEFINE_DEVICE_TYPE(TMP94C241, tmp94c241_device, "tmp94c241", "Toshiba TMP94C241")
+
+enum
+{
+ INTE45,
+ INTE67,
+ INTE89,
+ INTEAB,
+ INTET01,
+ INTET23,
+ INTET45,
+ INTET67,
+ INTET89,
+ INTETAB,
+ INTES0,
+ INTES1,
+ INTETC01,
+ INTETC23,
+ INTETC45,
+ INTETC67,
+ INTE0AD,
+ INTNMWDT
+};
+
+static const struct {
+ uint8_t reg;
+ uint8_t iff;
+ uint8_t vector;
+ uint8_t dma_start_vector;
+} tmp94c241_irq_vector_map[] =
+{
+ { INTE0AD, 0x08, 0x28, 0x0a}, // INT0 Pin
+ { INTE45, 0x08, 0x2c, 0x0b}, // INT4 Pin
+ { INTE45, 0x80, 0x30, 0x0c}, // INT5 Pin
+ { INTE67, 0x08, 0x34, 0x0d}, // INT6 Pin
+ { INTE67, 0x80, 0x38, 0x0e}, // INT7 Pin
+ // 0x3c - reserved
+ { INTE89, 0x08, 0x40, 0x10}, // INT8 Pin
+ { INTE89, 0x80, 0x44, 0x11}, // INT9 Pin
+ { INTEAB, 0x08, 0x48, 0x12}, // INTA Pin
+ { INTEAB, 0x80, 0x4c, 0x13}, // INTB Pin
+ { INTET01, 0x08, 0x50, 0x14}, // INTT0: 8-bit timer (Timer 0)
+ { INTET01, 0x80, 0x54, 0x15}, // INTT1: 8-bit timer (Timer 1)
+ { INTET23, 0x08, 0x58, 0x16}, // INTT2: 8-bit timer (Timer 2)
+ { INTET23, 0x80, 0x5c, 0x17}, // INTT3: 8-bit timer (Timer 3)
+ { INTET45, 0x08, 0x60, 0x18}, // INTTR4: 16-bit timer (Treg 4)
+ { INTET45, 0x80, 0x64, 0x19}, // INTTR5: 16-bit timer (Treg 5)
+ { INTET67, 0x08, 0x68, 0x1a}, // INTTR6: 16-bit timer (Treg 6)
+ { INTET67, 0x80, 0x6c, 0x1b}, // INTTR7: 16-bit timer (Treg 7)
+ { INTET89, 0x08, 0x70, 0x1c}, // INTTR8: 16-bit timer (Treg 8)
+ { INTET89, 0x80, 0x74, 0x1d}, // INTTR9: 16-bit timer (Treg 9)
+ { INTETAB, 0x08, 0x78, 0x1e}, // INTTRA: 16-bit timer (Treg A)
+ { INTETAB, 0x80, 0x7c, 0x1f}, // INTTRB: 16-bit timer (Treg B)
+ { INTES0, 0x08, 0x80, 0x20}, // INTRX0: Serial receive 0
+ { INTES0, 0x80, 0x84, 0x21}, // INTTX0: Serial send 0
+ { INTES1, 0x08, 0x88, 0x22}, // INTRX1: Serial receive 1
+ { INTES1, 0x80, 0x8c, 0x23}, // INTTX1: Serial send 1
+ { INTE0AD, 0x80, 0x90, 0x24}, // INTAD: AD conversion completion
+ { INTETC01, 0x08, 0x94, 0x25}, // INTTC0: micro-DMA completion Ch.0
+ { INTETC01, 0x80, 0x98, 0x26}, // INTTC1: micro-DMA completion Ch.1
+ { INTETC23, 0x08, 0x9c, 0x27}, // INTTC2: micro-DMA completion Ch.2
+ { INTETC23, 0x80, 0xa0, 0x28}, // INTTC3: micro-DMA completion Ch.3
+ { INTETC45, 0x08, 0xa4, 0x29}, // INTTC4: micro-DMA completion Ch.4
+ { INTETC45, 0x80, 0xa8, 0x2a}, // INTTC5: micro-DMA completion Ch.5
+ { INTETC67, 0x08, 0xac, 0x2b}, // INTTC6: micro-DMA completion Ch.6
+ { INTETC67, 0x80, 0xb0, 0x2c}, // INTTC7: micro-DMA completion Ch.7
+ /* 0xb4 ... 0xfc (Reserved) */
+};
+static constexpr u8 NUM_MASKABLE_IRQS = sizeof(tmp94c241_irq_vector_map) / 4;
+
+
+//**************************************************************************
+// DEVICE CONSTRUCTION AND INITIALIZATION
+//**************************************************************************
+
+//-------------------------------------------------
+// tmp94c241_device - constructor
+//-------------------------------------------------
+
+tmp94c241_device::tmp94c241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ tlcs900h_device(mconfig, TMP94C241, tag, owner, clock),
+ m_an_read(*this, 0),
+ m_port_read(*this, 0),
+ m_port_write(*this),
+ m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_timer_flipflops{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_t8run(0),
+ m_t01mod(0),
+ m_t23mod(0),
+ m_t4mod(0),
+ m_t6mod(0),
+ m_t8mod(0),
+ m_tamod(0),
+ m_tffcr(0),
+ m_t4ffcr(0),
+ m_t6ffcr(0),
+ m_t8ffcr(0),
+ m_taffcr(0),
+ m_trdc(0),
+ m_t16run(0),
+ m_treg_8{ 0, 0, 0, 0 },
+ m_treg_16{ 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_t16_cap{ 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_timer_16{ 0, 0, 0, 0 },
+ m_watchdog_mode(0),
+ m_serial_control{ 0, 0 },
+ m_serial_mode{ 0, 0 },
+ m_baud_rate{ 0, 0 },
+ m_od_enable(0),
+ m_ad_mode1(0),
+ m_ad_mode2(0),
+ m_ad_result{ 0, 0, 0, 0 },
+ m_int_reg{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_iimc(0),
+ m_dma_vector{ 0, 0, 0, 0 },
+ m_block_cs{ 0, 0, 0, 0 },
+ m_external_cs(0),
+ m_msar{ 0, 0, 0, 0, 0, 0 },
+ m_mamr{ 0, 0, 0, 0, 0, 0 },
+ m_dram_refresh{ 0, 0 },
+ m_dram_access{ 0, 0 },
+ m_da_drive(0)
+{
+}
+
+//-------------------------------------------------
+// device_config_complete - device-specific startup
+//-------------------------------------------------
+
+void tmp94c241_device::device_config_complete()
+{
+ if (m_am8_16 == 0)
+ m_program_config = address_space_config("program", ENDIANNESS_LITTLE, 16, 24, 0, address_map_constructor(FUNC(tmp94c241_device::internal_mem), this));
+ else
+ m_program_config = address_space_config("program", ENDIANNESS_LITTLE, 8, 24, 0, address_map_constructor(FUNC(tmp94c241_device::internal_mem), this));
+}
+
+
+void tmp94c241_device::device_resolve_objects()
+{
+ m_nmi_state = CLEAR_LINE;
+ for (int i = 0; i < TLCS900_NUM_INPUTS; i++)
+ {
+ m_level[i] = CLEAR_LINE;
+ }
+}
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void tmp94c241_device::device_start()
+{
+ tlcs900h_device::device_start();
+
+ save_item(NAME(m_port_latch));
+ save_item(NAME(m_port_control));
+ save_item(NAME(m_port_function));
+ save_item(NAME(m_timer_flipflops));
+ save_item(NAME(m_t8run));
+ save_item(NAME(m_t01mod));
+ save_item(NAME(m_t23mod));
+ save_item(NAME(m_t4mod));
+ save_item(NAME(m_t6mod));
+ save_item(NAME(m_t8mod));
+ save_item(NAME(m_tamod));
+ save_item(NAME(m_trdc));
+ save_item(NAME(m_treg_8));
+ save_item(NAME(m_treg_16));
+ save_item(NAME(m_t16_cap));
+ save_item(NAME(m_tffcr));
+ save_item(NAME(m_t4ffcr));
+ save_item(NAME(m_t6ffcr));
+ save_item(NAME(m_t8ffcr));
+ save_item(NAME(m_taffcr));
+ save_item(NAME(m_t16run));
+ save_item(NAME(m_watchdog_mode));
+ save_item(NAME(m_serial_control));
+ save_item(NAME(m_serial_mode));
+ save_item(NAME(m_baud_rate));
+ save_item(NAME(m_od_enable));
+ save_item(NAME(m_ad_mode1));
+ save_item(NAME(m_ad_mode2));
+ save_item(NAME(m_ad_result));
+ save_item(NAME(m_int_reg));
+ save_item(NAME(m_iimc));
+ save_item(NAME(m_dma_vector));
+ save_item(NAME(m_block_cs));
+ save_item(NAME(m_external_cs));
+ save_item(NAME(m_msar));
+ save_item(NAME(m_mamr));
+ save_item(NAME(m_dram_refresh));
+ save_item(NAME(m_dram_access));
+ save_item(NAME(m_da_drive));
+}
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void tmp94c241_device::device_reset()
+{
+ tlcs900h_device::device_reset();
+
+ m_ad_cycles_left = 0;
+ m_timer_pre = 0;
+
+ m_port_latch[PORT_0] = 0x00;
+ m_port_latch[PORT_1] = 0x00;
+ m_port_latch[PORT_2] = 0x00;
+ m_port_latch[PORT_3] = 0x00;
+ m_port_latch[PORT_4] = 0x00;
+ m_port_latch[PORT_5] = 0x00;
+ m_port_latch[PORT_6] = 0x00;
+ m_port_latch[PORT_7] = 0x7f;
+ m_port_latch[PORT_8] = 0x3b;
+ m_port_latch[PORT_A] = 0x1f;
+ m_port_latch[PORT_B] = 0x1f;
+ m_port_latch[PORT_C] = 0x00;
+ m_port_latch[PORT_D] = 0x00;
+ m_port_latch[PORT_E] = 0x00;
+ m_port_latch[PORT_F] = 0x00;
+ m_port_latch[PORT_H] = 0x00;
+ m_port_latch[PORT_Z] = 0x00;
+
+ m_port_function[PORT_0] = 0x01;
+ m_port_function[PORT_1] = 0x01;
+ m_port_function[PORT_2] = 0x01;
+ m_port_function[PORT_3] = 0x01;
+ m_port_function[PORT_4] = 0xff;
+ m_port_function[PORT_5] = 0xff;
+ m_port_function[PORT_6] = 0xff;
+ m_port_function[PORT_7] = 0x01;
+ m_port_function[PORT_8] = 0x00;
+ m_port_function[PORT_A] = 0x00;
+ m_port_function[PORT_B] = 0x00;
+ m_port_function[PORT_C] = 0x00;
+ m_port_function[PORT_D] = 0x00;
+ m_port_function[PORT_E] = 0x00;
+ m_port_function[PORT_F] = 0x00;
+ m_port_function[PORT_H] = 0x00;
+ m_port_function[PORT_Z] = 0x00;
+
+ std::fill_n(&m_port_control[0], NUM_PORTS, 0x00);
+ std::fill_n(&m_timer_flipflops[0], 12, 0x00);
+ m_t8run = 0x00;
+ m_trdc = 0x00;
+ m_t01mod = 0x00;
+ m_t23mod = 0x00;
+ m_t4mod = 0x00;
+ m_t6mod = 0x00;
+ m_t8mod = 0x00;
+ m_tamod = 0x00;
+ m_tffcr = 0x00;
+ m_t4ffcr = 0x00;
+ m_t6ffcr = 0x00;
+ m_t8ffcr = 0x00;
+ m_taffcr = 0x00;
+ std::fill_n(&m_timer_change[0], 8, 0x00);
+ std::fill_n(&m_timer_8[0], 4, 0x00);
+ std::fill_n(&m_timer_16[0], 4, 0x00);
+ m_watchdog_mode = 0x80;
+ for (int i = 0; i < 2; i++)
+ {
+ m_serial_control[i] &= 0x80;
+ m_serial_mode[i] &= 0x80;
+ m_baud_rate[i] = 0x00;
+ }
+ m_od_enable = 0x00;
+ m_ad_mode1 = 0x00;
+ m_ad_mode2 = 0x00;
+ std::fill_n(&m_int_reg[0], 18, 0x00);
+ m_iimc = 0x00;
+ std::fill_n(&m_dma_vector[0], 4, 0x00);
+ m_block_cs[0] = 0x0000;
+ m_block_cs[1] = 0x0000;
+ m_block_cs[2] = 0x1000; //FIXME!
+ m_block_cs[3] = 0x0000;
+ m_block_cs[4] = 0x0000;
+ m_block_cs[5] = 0x0000;
+ m_external_cs = 0x0000;
+ std::fill_n(&m_msar[0], 6, 0xff);
+ std::fill_n(&m_mamr[0], 6, 0xff);
+ std::fill_n(&m_dram_refresh[0], 2, 0x00);
+ std::fill_n(&m_dram_access[0], 2, 0x80);
+ m_da_drive = 0x00;
+}
+
+uint8_t tmp94c241_device::inte_r(offs_t offset)
+{
+ return m_int_reg[offset];
+}
+
+void tmp94c241_device::inte_w(offs_t offset, uint8_t data)
+{
+ if (data & 0x80)
+ data = (data & 0x7f) | (m_int_reg[offset] & 0x80);
+ if (data & 0x08)
+ data = (data & 0xf7) | (m_int_reg[offset] & 0x08);
+
+ m_int_reg[offset] = data;
+ m_check_irqs = 1;
+}
+
+uint8_t tmp94c241_device::intnmwdt_r(offs_t offset)
+{
+ return m_int_reg[INTNMWDT];
+}
+
+void tmp94c241_device::intnmwdt_w(offs_t offset, uint8_t data)
+{
+ if (data & 0x80)
+ data = (data & 0x7f) | (m_int_reg[INTNMWDT] & 0x80);
+ if ( data & 0x08 )
+ data = (data & 0xf7) | (m_int_reg[INTNMWDT] & 0x08);
+
+ m_int_reg[INTNMWDT] = data;
+ m_check_irqs = 1;
+}
+
+void tmp94c241_device::iimc_w(uint8_t data)
+{
+ m_iimc = data;
+ m_check_irqs = 1;
+}
+
+void tmp94c241_device::intclr_w(uint8_t data)
+{
+ for (int i = 0; i < NUM_MASKABLE_IRQS; i++)
+ {
+ if (data == tmp94c241_irq_vector_map[i].dma_start_vector)
+ {
+ // clear interrupt request
+ m_int_reg[tmp94c241_irq_vector_map[i].reg] &= ~ tmp94c241_irq_vector_map[i].iff;
+ return;
+ }
+ }
+}
+
+void tmp94c241_device::dmav_w(offs_t offset, uint8_t data)
+{
+ m_dma_vector[offset] = data;
+}
+
+template <uint8_t N>
+void tmp94c241_device::bNcs_w(offs_t offset, uint16_t data, uint16_t mem_mask)
+{
+ COMBINE_DATA(&m_block_cs[N]);
+}
+
+template <uint8_t N>
+void tmp94c241_device::mamr_w(uint8_t data)
+{
+ m_mamr[N] = data;
+}
+
+template <uint8_t N>
+void tmp94c241_device::msar_w(uint8_t data)
+{
+ m_msar[N] = data;
+}
+
+template <uint8_t N>
+uint8_t tmp94c241_device::mamr_r()
+{
+ return m_mamr[N];
+}
+
+template <uint8_t N>
+uint8_t tmp94c241_device::msar_r()
+{
+ return m_msar[N];
+}
+
+uint8_t tmp94c241_device::t8run_r()
+{
+ return m_t8run;
+}
+
+void tmp94c241_device::t8run_w(uint8_t data)
+{
+ m_t8run = data;
+ for (int i = 0; i < 4; i++)
+ {
+ // These correspond to UP_COUNTER and TIMER_CHANGE for 8-bit timers 0, 1, 2 and 3
+ if (!BIT(m_t8run, i)) // Timer isn't running
+ {
+ m_timer_8[i] = 0;
+ m_timer_change[i] = 0;
+ }
+ }
+}
+
+uint8_t tmp94c241_device::t01mod_r()
+{
+ return m_t01mod;
+}
+
+void tmp94c241_device::t01mod_w(uint8_t data)
+{
+ m_t01mod = data;
+}
+
+uint8_t tmp94c241_device::tffcr_r()
+{
+ return m_tffcr;
+}
+
+enum
+{
+ FF_INVERT,
+ FF_SET,
+ FF_CLEAR,
+ FF_DONTCARE
+};
+
+void tmp94c241_device::change_timer_flipflop(uint8_t flipflop, uint8_t operation)
+{
+ /* First we update the timer flip-flop */
+ bool &ff_state = m_timer_flipflops[flipflop];
+
+ switch (operation)
+ {
+ case FF_INVERT:
+ ff_state = !ff_state;
+ break;
+ case FF_SET:
+ ff_state = true;
+ break;
+ case FF_CLEAR:
+ ff_state = false;
+ break;
+ default:
+ // invalid operation
+ return;
+ }
+
+ /* The value of the flipflop is only exposed to a pin in certain modes of operation
+ determined by fields of the port function registers.
+
+ So here we bail out if the flipflop is not routed to its corresponding port bit:
+ */
+ switch (flipflop)
+ {
+ case 0x1:
+ if (!BIT(m_port_function[PORT_C], 0) || BIT(m_port_control[PORT_C], 0)) return;
+ break;
+ case 0x7:
+ if (!BIT(m_port_function[PORT_C], 0) || !BIT(m_port_control[PORT_C], 0)) return;
+ break;
+ case 0x3:
+ if (!BIT(m_port_function[PORT_C], 1) || BIT(m_port_control[PORT_C], 1)) return;
+ break;
+ case 0xb:
+ if (!BIT(m_port_function[PORT_C], 1) || !BIT(m_port_control[PORT_C], 1)) return;
+ break;
+ case 0x4:
+ if (!BIT(m_port_function[PORT_D], 0)) return;
+ break;
+ case 0x6:
+ if (!BIT(m_port_function[PORT_D], 4)) return;
+ break;
+ case 0x8:
+ if (!BIT(m_port_function[PORT_E], 0)) return;
+ break;
+ case 0xA:
+ if (!BIT(m_port_function[PORT_E], 4)) return;
+ break;
+ default:
+ // invalid flip flop
+ return;
+ }
+
+ // And here we actually send the value to the corresponding pin
+ uint8_t new_port_value = 0;
+ switch (flipflop)
+ {
+ case 0x1:
+ case 0x7:
+ new_port_value = m_port_latch[PORT_C] & 0xfe;
+ if (ff_state) new_port_value |= 0x01;
+ port_w<PORT_C>(new_port_value);
+ break;
+ case 0x3:
+ case 0xb:
+ new_port_value = m_port_latch[PORT_C] & 0xfd;
+ if (ff_state) new_port_value |= 0x02;
+ port_w<PORT_C>(new_port_value);
+ break;
+ case 0x4:
+ new_port_value = m_port_latch[PORT_D] & 0xfe;
+ if (ff_state) new_port_value |= 0x01;
+ port_w<PORT_D>(new_port_value);
+ break;
+ case 0x6:
+ new_port_value = m_port_latch[PORT_D] & 0xef;
+ if (ff_state) new_port_value |= 0x10;
+ port_w<PORT_D>(new_port_value);
+ break;
+ case 0x8:
+ new_port_value = m_port_latch[PORT_E] & 0xfe;
+ if (ff_state) new_port_value |= 0x01;
+ port_w<PORT_E>(new_port_value);
+ break;
+ case 0xa:
+ new_port_value = m_port_latch[PORT_E] & 0xef;
+ if (ff_state) new_port_value |= 0x10;
+ port_w<PORT_E>(new_port_value);
+ break;
+ }
+}
+
+void tmp94c241_device::tffcr_w(uint8_t data)
+{
+ change_timer_flipflop( 1, (data >> 2) & 3 );
+ change_timer_flipflop( 3, (data >> 6) & 3 );
+ m_tffcr = data | 0xcc;
+}
+
+uint8_t tmp94c241_device::t23mod_r()
+{
+ return m_t23mod;
+}
+
+void tmp94c241_device::t23mod_w(uint8_t data)
+{
+ m_t23mod = data;
+}
+
+uint8_t tmp94c241_device::trdc_r()
+{
+ return m_trdc;
+}
+
+void tmp94c241_device::trdc_w(uint8_t data)
+{
+ m_trdc = data;
+}
+
+template <uint8_t Timer>
+void tmp94c241_device::treg_8_w(uint8_t data)
+{
+ m_treg_8[Timer] = data;
+}
+
+template <uint8_t Timer>
+void tmp94c241_device::treg_16_w(uint16_t data)
+{
+ m_treg_16[Timer] = data;
+}
+
+uint8_t tmp94c241_device::t4mod_r()
+{
+ return m_t4mod;
+}
+
+void tmp94c241_device::t4mod_w(uint8_t data)
+{
+ m_t4mod = data;
+}
+
+uint8_t tmp94c241_device::t6mod_r()
+{
+ return m_t6mod;
+}
+
+void tmp94c241_device::t6mod_w(uint8_t data)
+{
+ m_t6mod = data;
+}
+
+uint8_t tmp94c241_device::t8mod_r()
+{
+ return m_t8mod;
+}
+
+void tmp94c241_device::t8mod_w(uint8_t data)
+{
+ m_t8mod = data;
+}
+
+uint8_t tmp94c241_device::tamod_r()
+{
+ return m_tamod;
+}
+
+void tmp94c241_device::tamod_w(uint8_t data)
+{
+ m_tamod = data;
+}
+
+uint8_t tmp94c241_device::t4ffcr_r()
+{
+ return m_t4ffcr;
+}
+
+void tmp94c241_device::t4ffcr_w(uint8_t data)
+{
+ change_timer_flipflop( 4, data & 3 );
+ change_timer_flipflop( 5, (data >> 6) & 3 );
+ m_t4ffcr = data | 0xc3;
+}
+
+uint8_t tmp94c241_device::t6ffcr_r()
+{
+ return m_t6ffcr;
+}
+
+void tmp94c241_device::t6ffcr_w(uint8_t data)
+{
+ change_timer_flipflop( 6, data & 3 );
+ change_timer_flipflop( 7, (data >> 6) & 3 );
+ m_t6ffcr = data | 0xc3;
+}
+
+uint8_t tmp94c241_device::t8ffcr_r()
+{
+ return m_t8ffcr;
+}
+
+void tmp94c241_device::t8ffcr_w(uint8_t data)
+{
+ change_timer_flipflop( 8, data & 3 );
+ change_timer_flipflop( 9, (data >> 6) & 3 );
+ m_t8ffcr = data | 0xc3;
+}
+
+uint8_t tmp94c241_device::taffcr_r()
+{
+ return m_taffcr;
+}
+
+void tmp94c241_device::taffcr_w(uint8_t data)
+{
+ change_timer_flipflop( 0xa, data & 3 );
+ change_timer_flipflop( 0xb, (data >> 6) & 3 );
+ m_taffcr = data | 0xc3;
+}
+
+uint8_t tmp94c241_device::t16run_r()
+{
+ return m_t16run;
+}
+
+void tmp94c241_device::t16run_w(uint8_t data)
+{
+ m_t16run = data;
+ for (int i = 0; i < 4; i++)
+ {
+ if (!BIT(m_t16run, i)) // Timer isn't running
+ {
+ // These correspond to UP_COUNTER and TIMER_CHANGE for 16-bit timers 4, 6, 8 and A
+ m_timer_16[i] = 0;
+ m_timer_change[4 + i] = 0;
+ }
+ }
+}
+
+template <uint8_t Timer>
+uint16_t tmp94c241_device::cap_r()
+{
+ return m_t16_cap[Timer];
+}
+
+uint8_t tmp94c241_device::wdmod_r()
+{
+ return m_watchdog_mode;
+}
+
+void tmp94c241_device::wdmod_w(uint8_t data)
+{
+ m_watchdog_mode = data;
+}
+
+void tmp94c241_device::wdcr_w(uint8_t data)
+{
+}
+
+template <uint8_t Channel>
+uint8_t tmp94c241_device::scNbuf_r()
+{
+ return 0;
+}
+
+template <uint8_t Channel>
+void tmp94c241_device::scNbuf_w(uint8_t data)
+{
+ // Fake finish sending data
+ m_int_reg[(Channel == 0) ? INTES0 : INTES1] |= 0x80;
+ m_check_irqs = 1;
+ logerror("sc%dbuf write: %02X\n", Channel, data);
+ //machine().debugger().debug_break();
+}
+
+template <uint8_t Channel>
+uint8_t tmp94c241_device::scNcr_r()
+{
+ uint8_t reg = m_serial_control[Channel];
+ if (!machine().side_effects_disabled())
+ m_serial_control[Channel] &= 0xe3;
+ return reg;
+}
+
+template <uint8_t Channel>
+void tmp94c241_device::scNcr_w(uint8_t data)
+{
+ m_serial_control[Channel] = data;
+}
+
+template <uint8_t Channel>
+uint8_t tmp94c241_device::scNmod_r()
+{
+ return m_serial_mode[Channel];
+}
+
+template <uint8_t Channel>
+void tmp94c241_device::scNmod_w(uint8_t data)
+{
+ m_serial_mode[Channel] = data;
+}
+
+template <uint8_t Channel>
+uint8_t tmp94c241_device::brNcr_r()
+{
+ return m_baud_rate[Channel];
+}
+
+template <uint8_t Channel>
+void tmp94c241_device::brNcr_w(uint8_t data)
+{
+ m_baud_rate[Channel] = data;
+}
+
+uint8_t tmp94c241_device::ode_r()
+{
+ return m_od_enable;
+}
+
+void tmp94c241_device::ode_w(uint8_t data)
+{
+ m_od_enable = data;
+}
+
+uint8_t tmp94c241_device::admod1_r()
+{
+ return m_ad_mode1;
+}
+
+void tmp94c241_device::admod1_w(uint8_t data)
+{
+ // Preserve read-only bits
+ data = (m_ad_mode1 & 0xc0) | ( data & 0x34 );
+
+ // Check for A/D conversion start
+ if (data & 0x04)
+ {
+ data &= ~0x04;
+ data |= 0x40;
+
+ switch ((m_ad_mode2 >> 4) & 3)
+ {
+ case 0: m_ad_cycles_left = 160; break;
+ case 1: m_ad_cycles_left = 320; break;
+ case 2: m_ad_cycles_left = 640; break;
+ case 3: m_ad_cycles_left = 1280; break;
+ }
+ }
+
+ m_ad_mode1 = data;
+}
+
+uint8_t tmp94c241_device::admod2_r()
+{
+ return m_ad_mode2;
+}
+
+void tmp94c241_device::admod2_w(uint8_t data)
+{
+ m_ad_mode2 = data;
+}
+
+uint8_t tmp94c241_device::adreg_r(offs_t offset)
+{
+ if (BIT(offset, 0))
+ return m_ad_result[offset >> 1] >> 2;
+ else
+ return m_ad_result[offset >> 1] << 6 | 0x3f;
+}
+
+uint8_t tmp94c241_device::dadrv_r()
+{
+ return m_da_drive;
+}
+
+void tmp94c241_device::dadrv_w(uint8_t data)
+{
+ m_da_drive = data;
+}
+
+void tmp94c241_device::dareg_w(offs_t offset, uint8_t data)
+{
+}
+
+template <uint8_t P>
+void tmp94c241_device::port_w(uint8_t data)
+{
+ m_port_latch[P] = data;
+ m_port_write[P](0, data, 0xff);
+}
+
+template <uint8_t P>
+uint8_t tmp94c241_device::port_r()
+{
+ return m_port_read[P](0);
+}
+
+template <uint8_t P>
+void tmp94c241_device::port_cr_w(uint8_t data)
+{
+ m_port_control[P] = data;
+}
+
+template <uint8_t P>
+void tmp94c241_device::port_fc_w(uint8_t data)
+{
+ m_port_function[P] = data;
+}
+
+//**************************************************************************
+// INTERNAL REGISTERS
+//**************************************************************************
+
+//-------------------------------------------------
+// internal_mem - memory map for internal RAM and
+// I/O registers
+//-------------------------------------------------
+
+void tmp94c241_device::internal_mem(address_map &map)
+{
+ map(0x000000, 0x000000).rw(FUNC(tmp94c241_device::port_r<PORT_0>), FUNC(tmp94c241_device::port_w<PORT_0>));
+ map(0x000002, 0x000002).w(FUNC(tmp94c241_device::port_cr_w<PORT_0>));
+ map(0x000003, 0x000003).w(FUNC(tmp94c241_device::port_fc_w<PORT_0>));
+ map(0x000004, 0x000004).rw(FUNC(tmp94c241_device::port_r<PORT_1>), FUNC(tmp94c241_device::port_w<PORT_1>));
+ map(0x000006, 0x000006).w(FUNC(tmp94c241_device::port_cr_w<PORT_1>));
+ map(0x000007, 0x000007).w(FUNC(tmp94c241_device::port_fc_w<PORT_1>));
+ map(0x000008, 0x000008).rw(FUNC(tmp94c241_device::port_r<PORT_2>), FUNC(tmp94c241_device::port_w<PORT_2>));
+ map(0x00000a, 0x00000a).w(FUNC(tmp94c241_device::port_cr_w<PORT_2>));
+ map(0x00000b, 0x00000b).w(FUNC(tmp94c241_device::port_fc_w<PORT_2>));
+ map(0x00000c, 0x00000c).rw(FUNC(tmp94c241_device::port_r<PORT_3>), FUNC(tmp94c241_device::port_w<PORT_3>));
+ map(0x00000e, 0x00000e).w(FUNC(tmp94c241_device::port_cr_w<PORT_3>));
+ map(0x00000f, 0x00000f).w(FUNC(tmp94c241_device::port_fc_w<PORT_3>));
+ map(0x000010, 0x000010).rw(FUNC(tmp94c241_device::port_r<PORT_4>), FUNC(tmp94c241_device::port_w<PORT_4>));
+ map(0x000012, 0x000012).w(FUNC(tmp94c241_device::port_cr_w<PORT_4>));
+ map(0x000013, 0x000013).w(FUNC(tmp94c241_device::port_fc_w<PORT_4>));
+ map(0x000014, 0x000014).rw(FUNC(tmp94c241_device::port_r<PORT_5>), FUNC(tmp94c241_device::port_w<PORT_5>));
+ map(0x000016, 0x000016).w(FUNC(tmp94c241_device::port_cr_w<PORT_5>));
+ map(0x000017, 0x000017).w(FUNC(tmp94c241_device::port_fc_w<PORT_5>));
+ map(0x000018, 0x000018).rw(FUNC(tmp94c241_device::port_r<PORT_6>), FUNC(tmp94c241_device::port_w<PORT_6>));
+ map(0x00001a, 0x00001a).w(FUNC(tmp94c241_device::port_cr_w<PORT_6>));
+ map(0x00001b, 0x00001b).w(FUNC(tmp94c241_device::port_fc_w<PORT_6>));
+ map(0x00001c, 0x00001c).rw(FUNC(tmp94c241_device::port_r<PORT_7>), FUNC(tmp94c241_device::port_w<PORT_7>));
+ map(0x00001e, 0x00001e).w(FUNC(tmp94c241_device::port_cr_w<PORT_7>));
+ map(0x00001f, 0x00001f).w(FUNC(tmp94c241_device::port_fc_w<PORT_7>));
+ map(0x000020, 0x000020).rw(FUNC(tmp94c241_device::port_r<PORT_8>), FUNC(tmp94c241_device::port_w<PORT_8>));
+ map(0x000022, 0x000022).w(FUNC(tmp94c241_device::port_cr_w<PORT_8>));
+ map(0x000023, 0x000023).w(FUNC(tmp94c241_device::port_fc_w<PORT_8>));
+ map(0x000028, 0x000028).rw(FUNC(tmp94c241_device::port_r<PORT_A>), FUNC(tmp94c241_device::port_w<PORT_A>));
+ map(0x00002b, 0x00002b).w(FUNC(tmp94c241_device::port_fc_w<PORT_A>));
+ map(0x00002c, 0x00002c).rw(FUNC(tmp94c241_device::port_r<PORT_B>), FUNC(tmp94c241_device::port_w<PORT_B>));
+ map(0x00002f, 0x00002f).w(FUNC(tmp94c241_device::port_fc_w<PORT_B>));
+ map(0x000030, 0x000030).rw(FUNC(tmp94c241_device::port_r<PORT_C>), FUNC(tmp94c241_device::port_w<PORT_C>));
+ map(0x000032, 0x000032).w(FUNC(tmp94c241_device::port_cr_w<PORT_C>));
+ map(0x000033, 0x000033).w(FUNC(tmp94c241_device::port_fc_w<PORT_C>));
+ map(0x000034, 0x000034).rw(FUNC(tmp94c241_device::port_r<PORT_D>), FUNC(tmp94c241_device::port_w<PORT_D>));
+ map(0x000036, 0x000036).w(FUNC(tmp94c241_device::port_cr_w<PORT_D>));
+ map(0x000037, 0x000037).w(FUNC(tmp94c241_device::port_fc_w<PORT_D>));
+ map(0x000038, 0x000038).rw(FUNC(tmp94c241_device::port_r<PORT_E>), FUNC(tmp94c241_device::port_w<PORT_E>));
+ map(0x00003a, 0x00003a).w(FUNC(tmp94c241_device::port_cr_w<PORT_E>));
+ map(0x00003b, 0x00003b).w(FUNC(tmp94c241_device::port_fc_w<PORT_E>));
+ map(0x00003c, 0x00003c).rw(FUNC(tmp94c241_device::port_r<PORT_F>), FUNC(tmp94c241_device::port_w<PORT_F>));
+ map(0x00003e, 0x00003e).w(FUNC(tmp94c241_device::port_cr_w<PORT_F>));
+ map(0x00003f, 0x00003f).w(FUNC(tmp94c241_device::port_fc_w<PORT_F>));
+ map(0x000040, 0x000040).r(FUNC(tmp94c241_device::port_r<PORT_G>));
+ map(0x000044, 0x000044).rw(FUNC(tmp94c241_device::port_r<PORT_H>), FUNC(tmp94c241_device::port_w<PORT_H>));
+ map(0x000046, 0x000046).w(FUNC(tmp94c241_device::port_cr_w<PORT_H>));
+ map(0x000047, 0x000047).w(FUNC(tmp94c241_device::port_fc_w<PORT_H>));
+ map(0x000068, 0x000068).rw(FUNC(tmp94c241_device::port_r<PORT_Z>), FUNC(tmp94c241_device::port_w<PORT_Z>));
+ map(0x00006a, 0x00006a).w(FUNC(tmp94c241_device::port_cr_w<PORT_Z>));
+ map(0x000080, 0x000080).rw(FUNC(tmp94c241_device::t8run_r), FUNC(tmp94c241_device::t8run_w));
+ map(0x000081, 0x000081).rw(FUNC(tmp94c241_device::trdc_r), FUNC(tmp94c241_device::trdc_w));
+ map(0x000082, 0x000082).rw(FUNC(tmp94c241_device::tffcr_r), FUNC(tmp94c241_device::tffcr_w));
+ map(0x000084, 0x000084).rw(FUNC(tmp94c241_device::t01mod_r), FUNC(tmp94c241_device::t01mod_w));
+ map(0x000085, 0x000085).rw(FUNC(tmp94c241_device::t23mod_r), FUNC(tmp94c241_device::t23mod_w));
+ map(0x000088, 0x000088).w(FUNC(tmp94c241_device::treg_8_w<TREG0>));
+ map(0x000089, 0x000089).w(FUNC(tmp94c241_device::treg_8_w<TREG1>));
+ map(0x00008a, 0x00008a).w(FUNC(tmp94c241_device::treg_8_w<TREG2>));
+ map(0x00008b, 0x00008b).w(FUNC(tmp94c241_device::treg_8_w<TREG3>));
+ map(0x000090, 0x000091).w(FUNC(tmp94c241_device::treg_16_w<TREG4>));
+ map(0x000092, 0x000093).w(FUNC(tmp94c241_device::treg_16_w<TREG5>));
+ map(0x000094, 0x000095).r(FUNC(tmp94c241_device::cap_r<CAP4>));
+ map(0x000096, 0x000097).r(FUNC(tmp94c241_device::cap_r<CAP5>));
+ map(0x000098, 0x000098).rw(FUNC(tmp94c241_device::t4mod_r), FUNC(tmp94c241_device::t4mod_w));
+ map(0x000099, 0x000099).rw(FUNC(tmp94c241_device::t4ffcr_r), FUNC(tmp94c241_device::t4ffcr_w));
+ map(0x00009e, 0x00009e).rw(FUNC(tmp94c241_device::t16run_r), FUNC(tmp94c241_device::t16run_w));
+ map(0x0000a0, 0x0000a1).w(FUNC(tmp94c241_device::treg_16_w<TREG6>));
+ map(0x0000a2, 0x0000a3).w(FUNC(tmp94c241_device::treg_16_w<TREG7>));
+ map(0x0000a4, 0x0000a5).r(FUNC(tmp94c241_device::cap_r<CAP6>));
+ map(0x0000a6, 0x0000a7).r(FUNC(tmp94c241_device::cap_r<CAP7>));
+ map(0x0000a8, 0x0000a8).rw(FUNC(tmp94c241_device::t6mod_r), FUNC(tmp94c241_device::t6mod_w));
+ map(0x0000a9, 0x0000a9).rw(FUNC(tmp94c241_device::t6ffcr_r), FUNC(tmp94c241_device::t6ffcr_w));
+ map(0x0000b0, 0x0000b1).w(FUNC(tmp94c241_device::treg_16_w<TREG8>));
+ map(0x0000b2, 0x0000b3).w(FUNC(tmp94c241_device::treg_16_w<TREG9>));
+ map(0x0000b4, 0x0000b5).r(FUNC(tmp94c241_device::cap_r<CAP8>));
+ map(0x0000b6, 0x0000b7).r(FUNC(tmp94c241_device::cap_r<CAP9>));
+ map(0x0000b8, 0x0000b8).rw(FUNC(tmp94c241_device::t8mod_r), FUNC(tmp94c241_device::t8mod_w));
+ map(0x0000b9, 0x0000b9).rw(FUNC(tmp94c241_device::t8ffcr_r), FUNC(tmp94c241_device::t8ffcr_w));
+ map(0x0000c0, 0x0000c1).w(FUNC(tmp94c241_device::treg_16_w<TREGA>));
+ map(0x0000c2, 0x0000c3).w(FUNC(tmp94c241_device::treg_16_w<TREGB>));
+ map(0x0000c4, 0x0000c5).r(FUNC(tmp94c241_device::cap_r<CAPA>));
+ map(0x0000c6, 0x0000c7).r(FUNC(tmp94c241_device::cap_r<CAPB>));
+ map(0x0000c8, 0x0000c8).rw(FUNC(tmp94c241_device::tamod_r), FUNC(tmp94c241_device::tamod_w));
+ map(0x0000c9, 0x0000c9).rw(FUNC(tmp94c241_device::taffcr_r), FUNC(tmp94c241_device::taffcr_w));
+ map(0x0000d0, 0x0000d0).rw(FUNC(tmp94c241_device::scNbuf_r<0>), FUNC(tmp94c241_device::scNbuf_w<0>));
+ map(0x0000d1, 0x0000d1).rw(FUNC(tmp94c241_device::scNcr_r<0>), FUNC(tmp94c241_device::scNcr_w<0>));
+ map(0x0000d2, 0x0000d2).rw(FUNC(tmp94c241_device::scNmod_r<0>), FUNC(tmp94c241_device::scNmod_w<0>));
+ map(0x0000d3, 0x0000d3).rw(FUNC(tmp94c241_device::brNcr_r<0>), FUNC(tmp94c241_device::brNcr_w<0>));
+ map(0x0000d4, 0x0000d4).rw(FUNC(tmp94c241_device::scNbuf_r<1>), FUNC(tmp94c241_device::scNbuf_w<1>));
+ map(0x0000d5, 0x0000d5).rw(FUNC(tmp94c241_device::scNcr_r<1>), FUNC(tmp94c241_device::scNcr_w<1>));
+ map(0x0000d6, 0x0000d6).rw(FUNC(tmp94c241_device::scNmod_r<1>), FUNC(tmp94c241_device::scNmod_w<1>));
+ map(0x0000d7, 0x0000d7).rw(FUNC(tmp94c241_device::brNcr_r<1>), FUNC(tmp94c241_device::brNcr_w<1>));
+ map(0x0000e0, 0x0000f0).rw(FUNC(tmp94c241_device::inte_r), FUNC(tmp94c241_device::inte_w));
+ map(0x0000f6, 0x0000f6).w(FUNC(tmp94c241_device::iimc_w));
+ map(0x0000f7, 0x0000f7).rw(FUNC(tmp94c241_device::intnmwdt_r), FUNC(tmp94c241_device::intnmwdt_w));
+ map(0x0000f8, 0x0000f8).w(FUNC(tmp94c241_device::intclr_w));
+ map(0x000100, 0x000103).w(FUNC(tmp94c241_device::dmav_w));
+ map(0x000110, 0x000110).rw(FUNC(tmp94c241_device::wdmod_r), FUNC(tmp94c241_device::wdmod_w));
+ map(0x000111, 0x000111).w(FUNC(tmp94c241_device::wdcr_w));
+ map(0x000120, 0x000127).r(FUNC(tmp94c241_device::adreg_r));
+ map(0x000128, 0x000128).rw(FUNC(tmp94c241_device::admod1_r), FUNC(tmp94c241_device::admod1_w));
+ map(0x000129, 0x000129).rw(FUNC(tmp94c241_device::admod2_r), FUNC(tmp94c241_device::admod2_w));
+ map(0x000130, 0x000131).w(FUNC(tmp94c241_device::dareg_w));
+ map(0x000132, 0x000132).rw(FUNC(tmp94c241_device::dadrv_r), FUNC(tmp94c241_device::dadrv_w));
+ map(0x000140, 0x000141).w(FUNC(tmp94c241_device::bNcs_w<0>));
+ map(0x000142, 0x000142).rw(FUNC(tmp94c241_device::mamr_r<0>), FUNC(tmp94c241_device::mamr_w<0>));
+ map(0x000143, 0x000143).rw(FUNC(tmp94c241_device::msar_r<0>), FUNC(tmp94c241_device::msar_w<0>));
+ map(0x000144, 0x000145).w(FUNC(tmp94c241_device::bNcs_w<1>));
+ map(0x000146, 0x000146).rw(FUNC(tmp94c241_device::mamr_r<1>), FUNC(tmp94c241_device::mamr_w<1>));
+ map(0x000147, 0x000147).rw(FUNC(tmp94c241_device::msar_r<1>), FUNC(tmp94c241_device::msar_w<1>));
+ map(0x000148, 0x000149).w(FUNC(tmp94c241_device::bNcs_w<2>));
+ map(0x00014a, 0x00014a).rw(FUNC(tmp94c241_device::mamr_r<2>), FUNC(tmp94c241_device::mamr_w<2>));
+ map(0x00014b, 0x00014b).rw(FUNC(tmp94c241_device::msar_r<2>), FUNC(tmp94c241_device::msar_w<2>));
+ map(0x00014c, 0x00014d).w(FUNC(tmp94c241_device::bNcs_w<3>));
+ map(0x00014e, 0x00014e).rw(FUNC(tmp94c241_device::mamr_r<3>), FUNC(tmp94c241_device::mamr_w<3>));
+ map(0x00014f, 0x00014f).rw(FUNC(tmp94c241_device::msar_r<3>), FUNC(tmp94c241_device::msar_w<3>));
+ map(0x000150, 0x000151).w(FUNC(tmp94c241_device::bNcs_w<4>));
+ map(0x000152, 0x000152).rw(FUNC(tmp94c241_device::mamr_r<4>), FUNC(tmp94c241_device::mamr_w<4>));
+ map(0x000153, 0x000153).rw(FUNC(tmp94c241_device::msar_r<4>), FUNC(tmp94c241_device::msar_w<4>));
+ map(0x000154, 0x000155).w(FUNC(tmp94c241_device::bNcs_w<5>));
+ map(0x000156, 0x000156).rw(FUNC(tmp94c241_device::mamr_r<5>), FUNC(tmp94c241_device::mamr_w<5>));
+ map(0x000157, 0x000157).rw(FUNC(tmp94c241_device::msar_r<5>), FUNC(tmp94c241_device::msar_w<5>));
+ map(0x000400, 0x000bff).ram();
+}
+
+//**************************************************************************
+// EXECUTION CALLBACKS
+//**************************************************************************
+
+//-------------------------------------------------
+// tlcs900_check_hdma -
+//-------------------------------------------------
+
+void tmp94c241_device::tlcs900_check_hdma()
+{
+}
+
+
+//-------------------------------------------------
+// tlcs900_check_irqs -
+//-------------------------------------------------
+
+void tmp94c241_device::tlcs900_check_irqs()
+{
+ // Check for NMI
+ if (m_nmi_state == ASSERT_LINE)
+ {
+ m_xssp.d -= 4;
+ WRMEML(m_xssp.d, m_pc.d);
+ m_xssp.d -= 2;
+ WRMEMW(m_xssp.d, m_sr.w.l);
+ m_pc.d = RDMEML( 0xffff00 + 0x20 );
+ m_cycles += 18;
+ m_prefetch_clear = true;
+ m_halted = 0;
+ m_nmi_state = CLEAR_LINE;
+ return;
+ }
+
+ /* Check regular IRQs
+ The smaller the vector value, the higher the priority. */
+ int irq_vectors[8] = { -1, -1, -1, -1, -1, -1, -1, -1 };
+ for (int i = NUM_MASKABLE_IRQS - 1; i >= 0; i--)
+ {
+ if (m_int_reg[tmp94c241_irq_vector_map[i].reg] & tmp94c241_irq_vector_map[i].iff)
+ {
+ switch (tmp94c241_irq_vector_map[i].iff)
+ {
+ case 0x80:
+ irq_vectors[(m_int_reg[tmp94c241_irq_vector_map[i].reg] >> 4) & 0x07] = i;
+ break;
+ case 0x08:
+ irq_vectors[m_int_reg[tmp94c241_irq_vector_map[i].reg] & 0x07] = i;
+ break;
+ }
+ }
+ }
+
+ // Check highest allowed priority IRQ
+ int irq = -1;
+ int level = 0;
+ for (int i = std::max(1, (m_sr.b.h & 0x70) >> 4); i < 7; i++)
+ {
+ if (irq_vectors[i] >= 0)
+ {
+ irq = irq_vectors[i];
+ level = i + 1;
+ }
+ }
+
+ // Take IRQ
+ if (irq >= 0)
+ {
+ uint8_t vector = tmp94c241_irq_vector_map[irq].vector;
+
+ m_xssp.d -= 4;
+ WRMEML(m_xssp.d, m_pc.d);
+ m_xssp.d -= 2;
+ WRMEMW(m_xssp.d, m_sr.w.l);
+
+ // Mask off any lower priority interrupts
+ m_sr.b.h = (m_sr.b.h & 0x8f) | (level << 4);
+
+ m_pc.d = RDMEML(0xffff00 + vector);
+
+ m_cycles += 18;
+ m_prefetch_clear = true;
+
+ m_halted = 0;
+
+ // Clear taken IRQ
+ m_int_reg[tmp94c241_irq_vector_map[irq].reg] &= ~ tmp94c241_irq_vector_map[irq].iff;
+ }
+}
+
+
+//-------------------------------------------------
+// tlcs900_handle_ad -
+//-------------------------------------------------
+
+void tmp94c241_device::tlcs900_handle_ad()
+{
+}
+
+
+//-------------------------------------------------
+// tlcs900_handle_timers -
+//-------------------------------------------------
+
+// Prescaler shift amounts corresponding to each possible timer input clock source:
+static constexpr uint8_t T1 = 3;
+static constexpr uint8_t T4 = 5;
+static constexpr uint8_t T16 = 7;
+static constexpr uint8_t T256 = 11;
+
+void tmp94c241_device::tlcs900_handle_timers()
+{
+ auto const update_timer_count =
+ [this, old_pre = m_timer_pre] (
+ uint8_t timer_index,
+ uint8_t input_clk_select,
+ uint8_t s1,
+ uint8_t s2,
+ uint8_t s3)
+ {
+ switch (input_clk_select)
+ {
+ case 0:
+ /* Not yet implemented.
+ - For the 8 bit timers: TIO, TO0TRG, invalid and TO2TRG
+ - For all 16 bit timers: TIA
+ */
+ break;
+ case 1: m_timer_change[timer_index] += ((m_timer_pre >> s1) - (old_pre >> s1)); break;
+ case 2: m_timer_change[timer_index] += ((m_timer_pre >> s2) - (old_pre >> s2)); break;
+ case 3: m_timer_change[timer_index] += ((m_timer_pre >> s3) - (old_pre >> s3)); break;
+ }
+ };
+
+ auto const timer_8bits =
+ [this] (
+ uint8_t timer_index,
+ uint8_t timer_reg,
+ uint8_t interrupt,
+ uint8_t interrupt_mask,
+ uint8_t operating_mode,
+ bool invert)
+ {
+ for ( ; m_timer_change[timer_index] > 0; m_timer_change[timer_index]--)
+ {
+ m_timer_8[timer_index]++;
+ if (m_timer_8[timer_index] == m_treg_8[timer_reg])
+ {
+ if (BIT(timer_index, 0) == 0)
+ {
+ if (operating_mode == 0) // mode == MODE_8BIT_TIMER
+ m_timer_change[timer_index | 1]++;
+
+ // In 16-bit timer mode the timer should not be reset
+ if (operating_mode != 1) // mode != MODE_16BIT_TIMER
+ {
+ m_timer_8[timer_index] = 0;
+ m_int_reg[interrupt] |= interrupt_mask;
+ m_check_irqs = 1;
+ }
+ }
+ else
+ {
+ m_timer_8[timer_index] = 0;
+ m_int_reg[interrupt] |= interrupt_mask;
+ m_check_irqs = 1;
+
+ // In 16-bit timer mode also reset its 8-bit counterpart (timer N-1)
+ if (operating_mode == 1) // mode == MODE_16BIT_TIMER
+ m_timer_8[timer_index & ~1] = 0;
+ }
+
+ if (invert)
+ change_timer_flipflop(timer_index | 1, FF_INVERT);
+ }
+ }
+ };
+
+ auto const timer_16bits =
+ [this] (
+ uint8_t timer_id,
+ uint8_t timer_reg_low,
+ uint8_t timer_reg_high,
+ uint8_t tffcr,
+ uint8_t interrupt)
+ {
+ /*
+ timer_id 4 => m_timer_16[0] m_timer_change[4]
+ timer_id 6 => m_timer_16[1] m_timer_change[5]
+ timer_id 8 => m_timer_16[2] m_timer_change[6]
+ timer_id A => m_timer_16[3] m_timer_change[7]
+ */
+ uint8_t timer_index = (timer_id - 4)/2;
+
+ for ( ; m_timer_change[timer_index + 4] > 0; m_timer_change[timer_index + 4]--)
+ {
+ m_timer_16[timer_index]++;
+ // TODO: also check for criteria of up counter matching CAPn registers
+ if (((m_timer_16[timer_index] == m_treg_16[timer_reg_high]) && BIT(tffcr, 3)) ||
+ ((m_timer_16[timer_index] == m_treg_16[timer_reg_low]) && BIT(tffcr, 2)) )
+ {
+ change_timer_flipflop(timer_id, FF_INVERT);
+ m_timer_16[timer_index] = 0;
+ m_int_reg[interrupt] |= 0x08;
+ m_check_irqs = 1;
+ }
+ }
+ };
+
+ if (BIT(m_t16run, 7)) // prescaler is active
+ m_timer_pre += m_cycles;
+
+ if (BIT(m_t8run, 0)) // Timer 0 is running
+ {
+ update_timer_count(0, m_t01mod & 3, T1, T4, T16);
+ timer_8bits(
+ 0, TREG0, INTET01, 0x08,
+ (m_t01mod >> 6) & 3, // TO1_OPERATING_MODE
+ (m_tffcr & 3) == 2); // "FF1 Invert Enable" && "Invert by 8-bit timer 0"
+ }
+
+ if (BIT(m_t8run, 1)) // Timer 1 is running
+ {
+ update_timer_count(1, (m_t01mod >> 2) & 3, T1, T16, T256);
+ timer_8bits(
+ 1, TREG1, INTET01, 0x80,
+ (m_t01mod >> 6) & 3, // TO1_OPERATING_MODE
+ (m_tffcr & 3) == 3); // "FF1 Invert Enable" && "Invert by 8-bit timer 1"
+ }
+
+ if (BIT(m_t8run, 2)) // Timer 2 is running
+ {
+ update_timer_count(2, m_t23mod & 3, T1, T4, T16);
+ timer_8bits(
+ 2, TREG2, INTET23, 0x08,
+ (m_t23mod >> 6) & 3, // T23_OPERATING_MODE
+ ((m_tffcr >> 4) & 3) == 2); // "FF3 Invert Enable" && "Invert by 8-bit timer 2"
+ }
+
+ if (BIT(m_t8run, 3)) // Timer 3 is running
+ {
+ update_timer_count(3, (m_t23mod >> 2) & 3, T1, T16, T256);
+ timer_8bits(
+ 3, TREG3, INTET23, 0x80,
+ (m_t23mod >> 6) & 3, // T23_OPERATING_MODE
+ ((m_tffcr >> 4) & 3) == 3); // "FF3 Invert Enable" && "Invert by 8-bit timer 3"
+ }
+
+ if (BIT(m_t16run, 0)) // Timer 4 is running
+ {
+ update_timer_count(4, m_t4mod & 3, T1, T4, T16);
+ timer_16bits(4, TREG4, TREG5, m_t4ffcr, INTET45);
+ }
+
+ if (BIT(m_t16run, 1)) // Timer 6 is running
+ {
+ update_timer_count(5, m_t6mod & 3, T1, T4, T16);
+ timer_16bits(6, TREG6, TREG7, m_t6ffcr, INTET67);
+ }
+
+ if (BIT(m_t16run, 2)) // Timer 8 is running
+ {
+ update_timer_count(6, m_t8mod & 3, T1, T4, T16);
+ timer_16bits(8, TREG8, TREG9, m_t8ffcr, INTET89);
+ }
+
+ if (BIT(m_t16run, 3)) // Timer A is running
+ {
+ update_timer_count(7, m_tamod & 3, T1, T4, T16);
+ timer_16bits(0xa, TREGA, TREGB, m_taffcr, INTETAB);
+ }
+
+ m_timer_pre &= 0xffffff;
+}
+
+
+//-------------------------------------------------
+// execute_set_input - called when a synchronized
+// input is changed
+//-------------------------------------------------
+
+void tmp94c241_device::execute_set_input(int input, int level)
+{
+ auto const update_int_reg =
+ [this, level, input] (uint8_t reg, uint8_t mask)
+ {
+ if (level != m_level[input])
+ {
+ m_level[input] = level;
+ if (level == ASSERT_LINE)
+ m_int_reg[reg] |= mask;
+ else
+ m_int_reg[reg] &= ~mask;
+ }
+ };
+
+ switch (input)
+ {
+ case INPUT_LINE_NMI:
+ case TLCS900_NMI:
+ if (level != m_level[TLCS900_NMI])
+ {
+ m_level[TLCS900_NMI] = level;
+ if (level == ASSERT_LINE)
+ m_nmi_state = ASSERT_LINE;
+ }
+ break;
+
+ case TLCS900_INTWD:
+ break;
+
+ case TLCS900_INT0:
+ if (m_iimc & 0x02)
+ {
+ // Rising edge detect
+ if (level != m_level[TLCS900_INT0] && level == ASSERT_LINE)
+ {
+ // Leave HALT state
+ m_halted = 0;
+ m_int_reg[INTE0AD] |= 0x08;
+ }
+ m_level[TLCS900_INT0] = level;
+ }
+ else
+ {
+ // Level detect
+ update_int_reg(INTE0AD, 0x08);
+ }
+ break;
+
+ case TLCS900_INT4: update_int_reg(INTE45, 0x08); break;
+ case TLCS900_INT5: update_int_reg(INTE45, 0x80); break;
+ case TLCS900_INT6: update_int_reg(INTE67, 0x08); break;
+ case TLCS900_INT7: update_int_reg(INTE67, 0x80); break;
+ case TLCS900_INT8: update_int_reg(INTE89, 0x08); break;
+ case TLCS900_INT9: update_int_reg(INTE89, 0x80); break;
+ case TLCS900_INTA: update_int_reg(INTEAB, 0x08); break;
+ case TLCS900_INTB: update_int_reg(INTEAB, 0x80); break;
+
+ default:
+ // invalid
+ return;
+ }
+ m_check_irqs = 1;
+}
+
+std::unique_ptr<util::disasm_interface> tmp94c241_device::create_disassembler()
+{
+ return std::make_unique<tlcs900_disassembler>();
+}
diff --git a/src/devices/cpu/tlcs900/tmp94c241.h b/src/devices/cpu/tlcs900/tmp94c241.h
new file mode 100644
index 00000000000..bb83a748f73
--- /dev/null
+++ b/src/devices/cpu/tlcs900/tmp94c241.h
@@ -0,0 +1,279 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR,Felipe Sanches
+/****************************************************************************
+
+ Toshiba TMP94C241 microcontroller
+
+****************************************************************************/
+
+#ifndef MAME_CPU_TLCS900_TMP94C241_H
+#define MAME_CPU_TLCS900_TMP94C241_H
+
+#pragma once
+
+#include "tlcs900.h"
+
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+// ======================> tmp94c241_device
+
+class tmp94c241_device : public tlcs900h_device
+{
+ static constexpr uint8_t PORT_0 = 0; // 8 bit I/O. Shared with d0-d7
+ static constexpr uint8_t PORT_1 = 1; // 8 bit I/O. Shared with d8-d15
+ static constexpr uint8_t PORT_2 = 2; // 8 bit I/O. Shared with d16-d23
+ static constexpr uint8_t PORT_3 = 3; // 8 bit I/O. Shared with d24-d31
+ static constexpr uint8_t PORT_4 = 4; // 8 bit I/O. Shared with a0-a7
+ static constexpr uint8_t PORT_5 = 5; // 8 bit I/O. Shared with a8-a15
+ static constexpr uint8_t PORT_6 = 6; // 8 bit I/O. Shared with a16-a23
+ static constexpr uint8_t PORT_7 = 7; // 8 bit I/O. Shared with external memory & bus signals
+ static constexpr uint8_t PORT_8 = 8; // 7 bit I/O. Shared with chip-select signals
+ static constexpr uint8_t PORT_A = 9; // 5 bit I/O. Shared with external DRAM (channel 0)
+ static constexpr uint8_t PORT_B = 10; // 5 bit I/O. Shared with external DRAM (channel 1)
+ static constexpr uint8_t PORT_C = 11; // 2 bit I/O. Shared with outputs for 8-bit or 16-bit timers
+ static constexpr uint8_t PORT_D = 12; // 6 bit I/O. Shared with 16-bit timer I/O and interrupt input
+ static constexpr uint8_t PORT_E = 13; // 6 bit I/O. Shared with 8-bit or 16-bit timer output and interrupt input
+ static constexpr uint8_t PORT_F = 14; // 6 bit I/O. Shared with I/O functions of serial interface
+ static constexpr uint8_t PORT_G = 15; // 8 bit input-only. Shared with AD converter.
+ static constexpr uint8_t PORT_H = 16; // 5 bit I/O. Shared with /INT0 and micro DMA
+ static constexpr uint8_t PORT_Z = 17; // 8 bit I/O.
+ static constexpr uint8_t NUM_PORTS = 18;
+
+ static constexpr uint8_t TREG0 = 0;
+ static constexpr uint8_t TREG1 = 1;
+ static constexpr uint8_t TREG2 = 2;
+ static constexpr uint8_t TREG3 = 3;
+ static constexpr uint8_t TREG4 = 0;
+ static constexpr uint8_t TREG5 = 1;
+ static constexpr uint8_t TREG6 = 2;
+ static constexpr uint8_t TREG7 = 3;
+ static constexpr uint8_t TREG8 = 4;
+ static constexpr uint8_t TREG9 = 5;
+ static constexpr uint8_t TREGA = 6;
+ static constexpr uint8_t TREGB = 7;
+
+ static constexpr uint8_t CAP4 = 0;
+ static constexpr uint8_t CAP5 = 1;
+ static constexpr uint8_t CAP6 = 2;
+ static constexpr uint8_t CAP7 = 3;
+ static constexpr uint8_t CAP8 = 4;
+ static constexpr uint8_t CAP9 = 5;
+ static constexpr uint8_t CAPA = 6;
+ static constexpr uint8_t CAPB = 7;
+
+public:
+ // device type constructor
+ tmp94c241_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // configuration helpers
+ auto port0_read() { return m_port_read[PORT_0].bind(); }
+ auto port0_write() { return m_port_write[PORT_0].bind(); }
+ auto port1_read() { return m_port_read[PORT_1].bind(); }
+ auto port1_write() { return m_port_write[PORT_1].bind(); }
+ auto port2_read() { return m_port_read[PORT_2].bind(); }
+ auto port2_write() { return m_port_write[PORT_2].bind(); }
+ auto port3_read() { return m_port_read[PORT_3].bind(); }
+ auto port3_write() { return m_port_write[PORT_3].bind(); }
+ auto port4_read() { return m_port_read[PORT_4].bind(); }
+ auto port4_write() { return m_port_write[PORT_4].bind(); }
+ auto port5_read() { return m_port_read[PORT_5].bind(); }
+ auto port5_write() { return m_port_write[PORT_5].bind(); }
+ auto port6_read() { return m_port_read[PORT_6].bind(); }
+ auto port6_write() { return m_port_write[PORT_6].bind(); }
+ auto port7_read() { return m_port_read[PORT_7].bind(); }
+ auto port7_write() { return m_port_write[PORT_7].bind(); }
+ auto port8_read() { return m_port_read[PORT_8].bind(); }
+ auto port8_write() { return m_port_write[PORT_8].bind(); }
+ auto porta_read() { return m_port_read[PORT_A].bind(); }
+ auto porta_write() { return m_port_write[PORT_A].bind(); }
+ auto portb_read() { return m_port_read[PORT_B].bind(); }
+ auto portb_write() { return m_port_write[PORT_B].bind(); }
+ auto portc_read() { return m_port_read[PORT_C].bind(); }
+ auto portc_write() { return m_port_write[PORT_C].bind(); }
+ auto portd_read() { return m_port_read[PORT_D].bind(); }
+ auto portd_write() { return m_port_write[PORT_D].bind(); }
+ auto porte_read() { return m_port_read[PORT_E].bind(); }
+ auto porte_write() { return m_port_write[PORT_E].bind(); }
+ auto portf_read() { return m_port_read[PORT_F].bind(); }
+ auto portf_write() { return m_port_write[PORT_F].bind(); }
+ auto portg_read() { return m_port_read[PORT_G].bind(); }
+ auto porth_read() { return m_port_read[PORT_H].bind(); }
+ auto porth_write() { return m_port_write[PORT_H].bind(); }
+ auto portz_read() { return m_port_read[PORT_Z].bind(); }
+ auto portz_write() { return m_port_write[PORT_Z].bind(); }
+
+protected:
+ // device_t implementation
+ virtual void device_config_complete() override ATTR_COLD;
+ virtual void device_resolve_objects() override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface overrides
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ // tlcs900_device overrides
+ virtual void tlcs900_check_hdma() override;
+ virtual void tlcs900_check_irqs() override;
+ virtual void tlcs900_handle_ad() override;
+ virtual void tlcs900_handle_timers() override;
+
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+private:
+ void change_timer_flipflop(uint8_t flipflop, uint8_t operation);
+
+ // Ports
+ template <uint8_t P> uint8_t port_r();
+ template <uint8_t P> void port_w(uint8_t data);
+ template <uint8_t P> void port_cr_w(uint8_t data);
+ template <uint8_t P> void port_fc_w(uint8_t data);
+
+ // Special Function Registers
+ template <uint8_t N> void bNcs_w(offs_t offset, uint16_t data, uint16_t mem_mask);
+ template <uint8_t Timer> uint16_t cap_r();
+ template <uint8_t N> uint8_t mamr_r();
+ template <uint8_t N> void mamr_w(uint8_t data);
+ template <uint8_t N> uint8_t msar_r();
+ template <uint8_t N> void msar_w(uint8_t data);
+ template <uint8_t Timer> void treg_8_w(uint8_t data);
+ template <uint8_t Timer> void treg_16_w(uint16_t data);
+ template <uint8_t Channel> uint8_t scNbuf_r();
+ template <uint8_t Channel> void scNbuf_w(uint8_t data);
+ template <uint8_t Channel> uint8_t scNcr_r();
+ template <uint8_t Channel> void scNcr_w(uint8_t data);
+ template <uint8_t Channel> uint8_t scNmod_r();
+ template <uint8_t Channel> void scNmod_w(uint8_t data);
+ template <uint8_t Channel> uint8_t brNcr_r();
+ template <uint8_t Channel> void brNcr_w(uint8_t data);
+ uint8_t t8run_r();
+ void t8run_w(uint8_t data);
+ uint8_t t01mod_r();
+ void t01mod_w(uint8_t data);
+ uint8_t tffcr_r();
+ void tffcr_w(uint8_t data);
+ uint8_t t23mod_r();
+ void t23mod_w(uint8_t data);
+ uint8_t trdc_r();
+ void trdc_w(uint8_t data);
+ uint8_t t4mod_r();
+ uint8_t t6mod_r();
+ uint8_t t8mod_r();
+ uint8_t tamod_r();
+ void t4mod_w(uint8_t data);
+ void t6mod_w(uint8_t data);
+ void t8mod_w(uint8_t data);
+ void tamod_w(uint8_t data);
+ uint8_t t4ffcr_r();
+ void t4ffcr_w(uint8_t data);
+ uint8_t t8ffcr_r();
+ void t8ffcr_w(uint8_t data);
+ uint8_t t6ffcr_r();
+ void t6ffcr_w(uint8_t data);
+ uint8_t taffcr_r();
+ void taffcr_w(uint8_t data);
+ uint8_t t16run_r();
+ void t16run_w(uint8_t data);
+ uint8_t wdmod_r();
+ void wdmod_w(uint8_t data);
+ void wdcr_w(uint8_t data);
+ uint8_t ode_r();
+ void ode_w(uint8_t data);
+ uint8_t admod1_r();
+ void admod1_w(uint8_t data);
+ uint8_t admod2_r();
+ void admod2_w(uint8_t data);
+ uint8_t adreg_r(offs_t offset);
+ uint8_t inte_r(offs_t offset);
+ void inte_w(offs_t offset, uint8_t data);
+ uint8_t intnmwdt_r(offs_t offset);
+ void intnmwdt_w(offs_t offset, uint8_t data);
+ void iimc_w(uint8_t data);
+ void intclr_w(uint8_t data);
+ void dmav_w(offs_t offset, uint8_t data);
+ uint8_t drefcr1_r();
+ void drefcr1_w(uint8_t data);
+ uint8_t dmemcr1_r();
+ void dmemcr1_w(uint8_t data);
+ uint8_t drefcr3_r();
+ void drefcr3_w(uint8_t data);
+ uint8_t dmemcr3_r();
+ void dmemcr3_w(uint8_t data);
+ uint8_t dadrv_r();
+ void dadrv_w(uint8_t data);
+ void dareg_w(offs_t offset, uint8_t data);
+
+ void internal_mem(address_map &map);
+
+ // analogue inputs, sampled at 10 bits
+ devcb_read16::array<8> m_an_read;
+
+ // I/O Ports
+ devcb_read8::array<NUM_PORTS> m_port_read;
+ devcb_write8::array<NUM_PORTS> m_port_write;
+ uint8_t m_port_latch[NUM_PORTS];
+ uint8_t m_port_control[NUM_PORTS];
+ uint8_t m_port_function[NUM_PORTS];
+
+ // Timer Control
+ bool m_timer_flipflops[12];
+ uint8_t m_t8run;
+ uint8_t m_t01mod;
+ uint8_t m_t23mod;
+ uint8_t m_t4mod;
+ uint8_t m_t6mod;
+ uint8_t m_t8mod;
+ uint8_t m_tamod;
+ uint8_t m_tffcr;
+ uint8_t m_t4ffcr;
+ uint8_t m_t6ffcr;
+ uint8_t m_t8ffcr;
+ uint8_t m_taffcr;
+ uint8_t m_trdc;
+ uint8_t m_t16run;
+ uint8_t m_treg_8[4]; // TREG0 - TREG3
+ uint16_t m_treg_16[8]; //TREG4 - TREGB
+ uint16_t m_t16_cap[8]; //CAP4 - CAPB
+ uint16_t m_timer_16[4]; // UPCOUNTERA - UPCOUNTERB
+
+ // Watchdog Timer
+ uint8_t m_watchdog_mode;
+
+ // Serial Channel
+ uint8_t m_serial_control[2];
+ uint8_t m_serial_mode[2];
+ uint8_t m_baud_rate[2];
+ uint8_t m_od_enable;
+
+ // A/D Converter Control
+ uint8_t m_ad_mode1;
+ uint8_t m_ad_mode2;
+ uint16_t m_ad_result[4];
+
+ // Interrupt Control
+ uint8_t m_int_reg[18];
+ uint8_t m_iimc;
+ uint8_t m_dma_vector[4];
+
+ // Chip Select/Wait Control
+ uint16_t m_block_cs[6];
+ uint8_t m_external_cs;
+ uint8_t m_msar[6];
+ uint8_t m_mamr[6];
+
+ // DRAM Control
+ uint8_t m_dram_refresh[2];
+ uint8_t m_dram_access[2];
+
+ // D/A Converter Control
+ uint8_t m_da_drive;
+};
+
+// device type declaration
+DECLARE_DEVICE_TYPE(TMP94C241, tmp94c241_device)
+
+#endif // MAME_CPU_TLCS900_TMP94C241_H
diff --git a/src/devices/cpu/tlcs900/tmp95c061.cpp b/src/devices/cpu/tlcs900/tmp95c061.cpp
index 5602e707387..e6dbf029ac8 100644
--- a/src/devices/cpu/tlcs900/tmp95c061.cpp
+++ b/src/devices/cpu/tlcs900/tmp95c061.cpp
@@ -14,26 +14,12 @@ DEFINE_DEVICE_TYPE(TMP95C061, tmp95c061_device, "tmp95c061", "Toshiba TMP95C061"
tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
tlcs900h_device(mconfig, TMP95C061, tag, owner, clock),
- m_port1_read(*this, 0),
- m_port1_write(*this),
- m_port2_write(*this),
- m_port5_read(*this, 0),
- m_port5_write(*this),
- m_port6_read(*this, 0),
- m_port6_write(*this),
- m_port7_read(*this, 0),
- m_port7_write(*this),
- m_port8_read(*this, 0),
- m_port8_write(*this),
- m_port9_read(*this, 0),
- m_porta_read(*this, 0),
- m_porta_write(*this),
- m_portb_read(*this, 0),
- m_portb_write(*this),
m_an_read(*this, 0),
- m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
- m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
- m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_read(*this, 0),
+ m_port_write(*this),
+ m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0 },
m_trun(0),
m_t8_reg{ 0, 0, 0, 0 },
m_t8_mode{ 0, 0 },
@@ -67,26 +53,79 @@ tmp95c061_device::tmp95c061_device(const machine_config &mconfig, const char *ta
{
}
+template <uint8_t P>
+void tmp95c061_device::port_w(uint8_t data)
+{
+ m_port_latch[P] = data;
+ m_port_write[P](0, data, 0xff);
+}
+
+template <uint8_t P>
+uint8_t tmp95c061_device::port_r()
+{
+ return m_port_read[P](0);
+}
+
+template <uint8_t P>
+void tmp95c061_device::port_cr_w(uint8_t data)
+{
+ m_port_control[P] = data;
+}
+
+template <uint8_t P>
+void tmp95c061_device::port_fc_w(uint8_t data)
+{
+ m_port_function[P] = data;
+}
+
+template <>
+void tmp95c061_device::port_w<tmp95c061_device::PORT_A>(uint8_t data)
+{
+ m_port_latch[PORT_A] = data;
+ update_porta();
+}
+
+template <>
+void tmp95c061_device::port_cr_w<tmp95c061_device::PORT_A>(uint8_t data)
+{
+ m_port_control[PORT_A] = data;
+ update_porta();
+}
+
+template <>
+void tmp95c061_device::port_fc_w<tmp95c061_device::PORT_A>(uint8_t data)
+{
+ m_port_function[PORT_A] = data;
+ update_porta();
+}
+
+void tmp95c061_device::update_porta()
+{
+ int fc = (m_to1 << 2) | (m_to3 << 3);
+
+ m_port_write[PORT_A](0, ((fc & m_port_function[PORT_A]) | (m_port_latch[PORT_A] & ~m_port_function[PORT_A])) & m_port_control[PORT_A], 0xff);
+}
+
void tmp95c061_device::internal_mem(address_map &map)
{
- map(0x000001, 0x000001).rw(FUNC(tmp95c061_device::p1_r), FUNC(tmp95c061_device::p1_w));
- map(0x000004, 0x000004).w(FUNC(tmp95c061_device::p1cr_w));
- map(0x000006, 0x000006).rw(FUNC(tmp95c061_device::p2_r), FUNC(tmp95c061_device::p2_w));
- map(0x000009, 0x000009).w(FUNC(tmp95c061_device::p2fc_w));
- map(0x00000d, 0x00000d).rw(FUNC(tmp95c061_device::p5_r), FUNC(tmp95c061_device::p5_w));
- map(0x000010, 0x000010).w(FUNC(tmp95c061_device::p5cr_w));
- map(0x000011, 0x000011).w(FUNC(tmp95c061_device::p5fc_w));
- map(0x000012, 0x000012).rw(FUNC(tmp95c061_device::p6_r), FUNC(tmp95c061_device::p6_w));
- map(0x000013, 0x000013).rw(FUNC(tmp95c061_device::p7_r), FUNC(tmp95c061_device::p7_w));
- map(0x000015, 0x000015).w(FUNC(tmp95c061_device::p6fc_w));
- map(0x000016, 0x000016).w(FUNC(tmp95c061_device::p7cr_w));
- map(0x000017, 0x000017).w(FUNC(tmp95c061_device::p7fc_w));
- map(0x000018, 0x000018).rw(FUNC(tmp95c061_device::p8_r), FUNC(tmp95c061_device::p8_w));
- map(0x000019, 0x000019).r(FUNC(tmp95c061_device::p9_r));
- map(0x00001a, 0x00001a).w(FUNC(tmp95c061_device::p8cr_w));
- map(0x00001b, 0x00001b).w(FUNC(tmp95c061_device::p8fc_w));
- map(0x00001e, 0x00001e).rw(FUNC(tmp95c061_device::pa_r), FUNC(tmp95c061_device::pa_w));
- map(0x00001f, 0x00001f).rw(FUNC(tmp95c061_device::pb_r), FUNC(tmp95c061_device::pb_w));
+ map(0x000001, 0x000001).rw(FUNC(tmp95c061_device::port_r<PORT_1>), FUNC(tmp95c061_device::port_w<PORT_1>));
+ map(0x000004, 0x000004).w(FUNC(tmp95c061_device::port_cr_w<PORT_1>));
+ map(0x000006, 0x000006).rw(FUNC(tmp95c061_device::port_r<PORT_2>), FUNC(tmp95c061_device::port_w<PORT_2>));
+ map(0x000009, 0x000009).w(FUNC(tmp95c061_device::port_fc_w<PORT_2>));
+ map(0x00000d, 0x00000d).rw(FUNC(tmp95c061_device::port_r<PORT_5>), FUNC(tmp95c061_device::port_w<PORT_5>));
+ map(0x000010, 0x000010).w(FUNC(tmp95c061_device::port_cr_w<PORT_5>));
+ map(0x000011, 0x000011).w(FUNC(tmp95c061_device::port_fc_w<PORT_5>));
+ map(0x000012, 0x000012).rw(FUNC(tmp95c061_device::port_r<PORT_6>), FUNC(tmp95c061_device::port_w<PORT_7>));
+ map(0x000013, 0x000013).rw(FUNC(tmp95c061_device::port_r<PORT_7>), FUNC(tmp95c061_device::port_w<PORT_7>));
+ map(0x000015, 0x000015).w(FUNC(tmp95c061_device::port_fc_w<PORT_6>));
+ map(0x000016, 0x000016).w(FUNC(tmp95c061_device::port_cr_w<PORT_7>));
+ map(0x000017, 0x000017).w(FUNC(tmp95c061_device::port_fc_w<PORT_7>));
+ map(0x000018, 0x000018).rw(FUNC(tmp95c061_device::port_r<PORT_8>), FUNC(tmp95c061_device::port_w<PORT_8>));
+ map(0x000019, 0x000019).r(FUNC(tmp95c061_device::port_r<PORT_9>));
+ map(0x00001a, 0x00001a).w(FUNC(tmp95c061_device::port_cr_w<PORT_8>));
+ map(0x00001b, 0x00001b).w(FUNC(tmp95c061_device::port_fc_w<PORT_8>));
+ map(0x00001e, 0x00001e).rw(FUNC(tmp95c061_device::port_r<PORT_A>), FUNC(tmp95c061_device::port_w<PORT_A>));
+ map(0x00001f, 0x00001f).rw(FUNC(tmp95c061_device::port_r<PORT_B>), FUNC(tmp95c061_device::port_w<PORT_B>));
map(0x000020, 0x000020).rw(FUNC(tmp95c061_device::trun_r), FUNC(tmp95c061_device::trun_w));
map(0x000022, 0x000023).w(FUNC(tmp95c061_device::treg01_w));
map(0x000024, 0x000024).w(FUNC(tmp95c061_device::t01mod_w));
@@ -94,10 +133,10 @@ void tmp95c061_device::internal_mem(address_map &map)
map(0x000026, 0x000027).w(FUNC(tmp95c061_device::treg23_w));
map(0x000028, 0x000028).w(FUNC(tmp95c061_device::t23mod_w));
map(0x000029, 0x000029).rw(FUNC(tmp95c061_device::trdc_r), FUNC(tmp95c061_device::trdc_w));
- map(0x00002c, 0x00002c).w(FUNC(tmp95c061_device::pacr_w));
- map(0x00002d, 0x00002d).w(FUNC(tmp95c061_device::pafc_w));
- map(0x00002e, 0x00002e).w(FUNC(tmp95c061_device::pbcr_w));
- map(0x00002f, 0x00002f).w(FUNC(tmp95c061_device::pbfc_w));
+ map(0x00002c, 0x00002c).w(FUNC(tmp95c061_device::port_cr_w<PORT_A>));
+ map(0x00002d, 0x00002d).w(FUNC(tmp95c061_device::port_fc_w<PORT_A>));
+ map(0x00002e, 0x00002e).w(FUNC(tmp95c061_device::port_cr_w<PORT_B>));
+ map(0x00002f, 0x00002f).w(FUNC(tmp95c061_device::port_fc_w<PORT_B>));
map(0x000030, 0x000033).w(FUNC(tmp95c061_device::treg45_w));
map(0x000034, 0x000037).r(FUNC(tmp95c061_device::cap12_r));
map(0x000038, 0x000038).rw(FUNC(tmp95c061_device::t4mod_r), FUNC(tmp95c061_device::t4mod_w));
@@ -152,6 +191,15 @@ void tmp95c061_device::device_config_complete()
}
+void tmp95c061_device::device_resolve_objects()
+{
+ m_nmi_state = CLEAR_LINE;
+ for( int i = 0; i < TLCS900_NUM_INPUTS; i++ )
+ {
+ m_level[i] = CLEAR_LINE;
+ }
+}
+
void tmp95c061_device::device_start()
{
@@ -200,25 +248,24 @@ void tmp95c061_device::device_reset()
m_to3 = 0;
m_ad_cycles_left = 0;
- m_nmi_state = CLEAR_LINE;
m_timer_pre = 0;
m_timer_change[0] = 0;
m_timer_change[1] = 0;
m_timer_change[2] = 0;
m_timer_change[3] = 0;
- m_port_latch[1] = 0x00;
- m_port_latch[2] = 0xff;
- m_port_latch[5] = 0x3d;
- m_port_latch[6] = 0x3b;
- m_port_latch[7] = 0xff;
- m_port_latch[8] = 0x3f;
- m_port_latch[0xa] = 0x0f;
- m_port_latch[0xb] = 0xff;
- std::fill_n(&m_port_control[0], 0xc, 0x00);
- std::fill_n(&m_port_function[0], 0xc, 0x00);
- m_port_control[0xa] = 0x0c; // HACK ngpc needs this but should be zero
- m_port_function[0xa] = 0x0c; // HACK ngpc needs this but should be zero
+ m_port_latch[PORT_1] = 0x00;
+ m_port_latch[PORT_2] = 0xff;
+ m_port_latch[PORT_5] = 0x3d;
+ m_port_latch[PORT_6] = 0x3b;
+ m_port_latch[PORT_7] = 0xff;
+ m_port_latch[PORT_8] = 0x3f;
+ m_port_latch[PORT_A] = 0x0f;
+ m_port_latch[PORT_B] = 0xff;
+ std::fill_n(&m_port_control[0], NUM_PORTS, 0x00);
+ std::fill_n(&m_port_function[0], NUM_PORTS, 0x00);
+ m_port_control[PORT_A] = 0x0c; // HACK ngpc needs this but should be zero
+ m_port_function[PORT_A] = 0x0c; // HACK ngpc needs this but should be zero
m_trun = 0x00;
std::fill_n(&m_t8_mode[0], 2, 0x00);
m_t8_invert = 0xcc;
@@ -250,57 +297,54 @@ void tmp95c061_device::device_reset()
std::fill_n(&m_mem_start_mask[0], 4, 0xff);
m_dram_refresh = 0x00;
m_dram_access = 0x80;
-
- for (int i = 0; i < TLCS900_NUM_INPUTS; i++)
- {
- m_level[i] = CLEAR_LINE;
- }
}
+enum
+{
+ INTE0AD,
+ INTE45,
+ INTE67,
+ INTET10,
+ INTET32,
+ INTET54,
+ INTET76,
+ INTES0,
+ INTES1,
+ INTETC10,
+ INTETC32
+};
-#define TMP95C061_INTE0AD 0x0
-#define TMP95C061_INTE45 0x1
-#define TMP95C061_INTE67 0x2
-#define TMP95C061_INTET10 0x3
-#define TMP95C061_INTET32 0x4
-#define TMP95C061_INTET54 0x5
-#define TMP95C061_INTET76 0x6
-#define TMP95C061_INTES0 0x7
-#define TMP95C061_INTES1 0x8
-#define TMP95C061_INTETC10 0x9
-#define TMP95C061_INTETC32 0xa
-
-#define TMP95C061_NUM_MASKABLE_IRQS 22
static const struct {
uint8_t reg;
uint8_t iff;
uint8_t vector;
-} tmp95c061_irq_vector_map[TMP95C061_NUM_MASKABLE_IRQS] =
-{
- { TMP95C061_INTETC32, 0x80, 0x80 }, /* INTTC3 */
- { TMP95C061_INTETC32, 0x08, 0x7c }, /* INTTC2 */
- { TMP95C061_INTETC10, 0x80, 0x78 }, /* INTTC1 */
- { TMP95C061_INTETC10, 0x08, 0x74 }, /* INTTC0 */
- { TMP95C061_INTE0AD, 0x80, 0x70 }, /* INTAD */
- { TMP95C061_INTES1, 0x80, 0x6c }, /* INTTX1 */
- { TMP95C061_INTES1, 0x08, 0x68 }, /* INTRX1 */
- { TMP95C061_INTES0, 0x80, 0x64 }, /* INTTX0 */
- { TMP95C061_INTES0, 0x08, 0x60 }, /* INTRX0 */
- { TMP95C061_INTET76, 0x80, 0x5c }, /* INTTR7 */
- { TMP95C061_INTET76, 0x08, 0x58 }, /* INTTR6 */
- { TMP95C061_INTET54, 0x80, 0x54 }, /* INTTR5 */
- { TMP95C061_INTET54, 0x08, 0x50 }, /* INTTR4 */
- { TMP95C061_INTET32, 0x80, 0x4c }, /* INTT3 */
- { TMP95C061_INTET32, 0x08, 0x48 }, /* INTT2 */
- { TMP95C061_INTET10, 0x80, 0x44 }, /* INTT1 */
- { TMP95C061_INTET10, 0x08, 0x40 }, /* INTT0 */
- /* 0x3c - reserved */
- { TMP95C061_INTE67, 0x80, 0x38 }, /* INT7 */
- { TMP95C061_INTE67, 0x08, 0x34 }, /* INT6 */
- { TMP95C061_INTE45, 0x80, 0x30 }, /* INT5 */
- { TMP95C061_INTE45, 0x08, 0x2c }, /* INT4 */
- { TMP95C061_INTE0AD, 0x08, 0x28 } /* INT0 */
+} tmp95c061_irq_vector_map[] =
+{
+ { INTETC32, 0x80, 0x80 }, // INTTC3
+ { INTETC32, 0x08, 0x7c }, // INTTC2
+ { INTETC10, 0x80, 0x78 }, // INTTC1
+ { INTETC10, 0x08, 0x74 }, // INTTC0
+ { INTE0AD, 0x80, 0x70 }, // INTAD
+ { INTES1, 0x80, 0x6c }, // INTTX1
+ { INTES1, 0x08, 0x68 }, // INTRX1
+ { INTES0, 0x80, 0x64 }, // INTTX0
+ { INTES0, 0x08, 0x60 }, // INTRX0
+ { INTET76, 0x80, 0x5c }, // INTTR7
+ { INTET76, 0x08, 0x58 }, // INTTR6
+ { INTET54, 0x80, 0x54 }, // INTTR5
+ { INTET54, 0x08, 0x50 }, // INTTR4
+ { INTET32, 0x80, 0x4c }, // INTT3
+ { INTET32, 0x08, 0x48 }, // INTT2
+ { INTET10, 0x80, 0x44 }, // INTT1
+ { INTET10, 0x08, 0x40 }, // INTT0
+ // 0x3c - reserved
+ { INTE67, 0x80, 0x38 }, // INT7
+ { INTE67, 0x08, 0x34 }, // INT6
+ { INTE45, 0x80, 0x30 }, // INT5
+ { INTE45, 0x08, 0x2c }, // INT4
+ { INTE0AD, 0x08, 0x28 } // INT0
};
+static constexpr u8 NUM_MASKABLE_IRQS = sizeof(tmp95c061_irq_vector_map) / 3;
int tmp95c061_device::tlcs900_process_hdma( int channel )
@@ -308,15 +352,15 @@ int tmp95c061_device::tlcs900_process_hdma( int channel )
uint8_t vector = ( m_dma_vector[channel] & 0x1f ) << 2;
/* Check if any HDMA actions should be performed */
- if ( vector >= 0x28 && vector != 0x3C && vector < 0x74 )
+ if ( vector >= 0x28 && vector != 0x3c && vector < 0x74 )
{
int irq = 0;
- while( irq < TMP95C061_NUM_MASKABLE_IRQS && tmp95c061_irq_vector_map[irq].vector != vector )
+ while( irq < NUM_MASKABLE_IRQS && tmp95c061_irq_vector_map[irq].vector != vector )
irq++;
/* Check if our interrupt flip-flop is set */
- if ( irq < TMP95C061_NUM_MASKABLE_IRQS && m_int_reg[tmp95c061_irq_vector_map[irq].reg] & tmp95c061_irq_vector_map[irq].iff )
+ if ( irq < NUM_MASKABLE_IRQS && m_int_reg[tmp95c061_irq_vector_map[irq].reg] & tmp95c061_irq_vector_map[irq].iff )
{
switch( m_dmam[channel].b.l & 0x1f )
{
@@ -406,16 +450,16 @@ int tmp95c061_device::tlcs900_process_hdma( int channel )
switch( channel )
{
case 0:
- m_int_reg[TMP95C061_INTETC10] |= 0x08;
+ m_int_reg[INTETC10] |= 0x08;
break;
case 1:
- m_int_reg[TMP95C061_INTETC10] |= 0x80;
+ m_int_reg[INTETC10] |= 0x80;
break;
case 2:
- m_int_reg[TMP95C061_INTETC32] |= 0x08;
+ m_int_reg[INTETC32] |= 0x08;
break;
case 3:
- m_int_reg[TMP95C061_INTETC32] |= 0x80;
+ m_int_reg[INTETC32] |= 0x80;
break;
}
}
@@ -451,11 +495,6 @@ void tmp95c061_device::tlcs900_check_hdma()
void tmp95c061_device::tlcs900_check_irqs()
{
- int irq_vectors[9] = { -1, -1, -1, -1, -1, -1, -1, -1, -1 };
- int level = 0;
- int irq = -1;
- int i;
-
/* Check for NMI */
if ( m_nmi_state == ASSERT_LINE )
{
@@ -475,7 +514,8 @@ void tmp95c061_device::tlcs900_check_irqs()
}
/* Check regular irqs */
- for( i = 0; i < TMP95C061_NUM_MASKABLE_IRQS; i++ )
+ int irq_vectors[9] = { -1, -1, -1, -1, -1, -1, -1, -1, -1 };
+ for( int i = 0; i < NUM_MASKABLE_IRQS; i++ )
{
if ( m_int_reg[tmp95c061_irq_vector_map[i].reg] & tmp95c061_irq_vector_map[i].iff )
{
@@ -492,7 +532,9 @@ void tmp95c061_device::tlcs900_check_irqs()
}
/* Check highest allowed priority irq */
- for ( i = std::max( 1, ( ( m_sr.b.h & 0x70 ) >> 4 ) ); i < 7; i++ )
+ int irq = -1;
+ int level = 0;
+ for ( int i = std::max( 1, ( ( m_sr.b.h & 0x70 ) >> 4 ) ); i < 7; i++ )
{
if ( irq_vectors[i] >= 0 )
{
@@ -563,7 +605,7 @@ void tmp95c061_device::tlcs900_handle_ad()
m_ad_mode &= ~ 0x40;
m_ad_mode |= 0x80;
- m_int_reg[TMP95C061_INTE0AD] |= 0x80;
+ m_int_reg[INTE0AD] |= 0x80;
m_check_irqs = 1;
/* AD repeat mode */
@@ -649,8 +691,8 @@ void tmp95c061_device::tlcs900_handle_timers()
for( ; m_timer_change[0] > 0; m_timer_change[0]-- )
{
- m_timer[0] += 1;
- if ( m_timer[0] == m_t8_reg[0] )
+ m_timer_8[0] += 1;
+ if ( m_timer_8[0] == m_t8_reg[0] )
{
if ( ( m_trun & 0x02 ) && ( m_t8_mode[0] & 0x0c ) == 0x00 )
{
@@ -660,8 +702,8 @@ void tmp95c061_device::tlcs900_handle_timers()
/* In 16bit timer mode the timer should not be reset */
if ( ( m_t8_mode[0] & 0xc0 ) != 0x40 )
{
- m_timer[0] = 0;
- m_int_reg[TMP95C061_INTET10] |= 0x08;
+ m_timer_8[0] = 0;
+ m_int_reg[INTET10] |= 0x08;
}
}
}
@@ -687,11 +729,11 @@ void tmp95c061_device::tlcs900_handle_timers()
for( ; m_timer_change[1] > 0; m_timer_change[1]-- )
{
- m_timer[1] += 1;
- if ( m_timer[1] == m_t8_reg[1] )
+ m_timer_8[1] += 1;
+ if ( m_timer_8[1] == m_t8_reg[1] )
{
- m_timer[1] = 0;
- m_int_reg[TMP95C061_INTET10] |= 0x80;
+ m_timer_8[1] = 0;
+ m_int_reg[INTET10] |= 0x80;
if ( m_t8_invert & 0x02 )
{
@@ -701,7 +743,7 @@ void tmp95c061_device::tlcs900_handle_timers()
/* In 16bit timer mode also reset timer 0 */
if ( ( m_t8_mode[0] & 0xc0 ) == 0x40 )
{
- m_timer[0] = 0;
+ m_timer_8[0] = 0;
}
}
}
@@ -726,8 +768,8 @@ void tmp95c061_device::tlcs900_handle_timers()
for( ; m_timer_change[2] > 0; m_timer_change[2]-- )
{
- m_timer[2] += 1;
- if ( m_timer[2] == m_t8_reg[2] )
+ m_timer_8[2] += 1;
+ if ( m_timer_8[2] == m_t8_reg[2] )
{
if ( ( m_trun & 0x08 ) && ( m_t8_mode[1] & 0x0c ) == 0x00 )
{
@@ -737,8 +779,8 @@ void tmp95c061_device::tlcs900_handle_timers()
/* In 16bit timer mode the timer should not be reset */
if ( ( m_t8_mode[1] & 0xc0 ) != 0x40 )
{
- m_timer[2] = 0;
- m_int_reg[TMP95C061_INTET32] |= 0x08;
+ m_timer_8[2] = 0;
+ m_int_reg[INTET32] |= 0x08;
}
}
}
@@ -764,11 +806,11 @@ void tmp95c061_device::tlcs900_handle_timers()
for( ; m_timer_change[3] > 0; m_timer_change[3]-- )
{
- m_timer[3] += 1;
- if ( m_timer[3] == m_t8_reg[3] )
+ m_timer_8[3] += 1;
+ if ( m_timer_8[3] == m_t8_reg[3] )
{
- m_timer[3] = 0;
- m_int_reg[TMP95C061_INTET32] |= 0x80;
+ m_timer_8[3] = 0;
+ m_int_reg[INTET32] |= 0x80;
if ( m_t8_invert & 0x20 )
{
@@ -778,7 +820,7 @@ void tmp95c061_device::tlcs900_handle_timers()
/* In 16bit timer mode also reset timer 2 */
if ( ( m_t8_mode[1] & 0xc0 ) == 0x40 )
{
- m_timer[2] = 0;
+ m_timer_8[2] = 0;
}
}
}
@@ -815,38 +857,38 @@ void tmp95c061_device::execute_set_input(int input, int level)
{
/* Leave HALT state */
m_halted = 0;
- m_int_reg[TMP95C061_INTE0AD] |= 0x08;
+ m_int_reg[INTE0AD] |= 0x08;
}
}
else
{
/* Level detect */
if ( level == ASSERT_LINE )
- m_int_reg[TMP95C061_INTE0AD] |= 0x08;
+ m_int_reg[INTE0AD] |= 0x08;
else
- m_int_reg[TMP95C061_INTE0AD] &= ~ 0x08;
+ m_int_reg[INTE0AD] &= ~ 0x08;
}
}
m_level[TLCS900_INT0] = level;
break;
case TLCS900_INT4:
- if ( ! ( m_port_control[0xb] & 0x01 ) )
+ if ( ! ( m_port_control[PORT_B] & 0x01 ) )
{
if ( m_level[TLCS900_INT4] == CLEAR_LINE && level == ASSERT_LINE )
{
- m_int_reg[TMP95C061_INTE45] |= 0x08;
+ m_int_reg[INTE45] |= 0x08;
}
}
m_level[TLCS900_INT4] = level;
break;
case TLCS900_INT5:
- if ( ! ( m_port_control[0xb] & 0x02 ) )
+ if ( ! ( m_port_control[PORT_B] & 0x02 ) )
{
if ( m_level[TLCS900_INT5] == CLEAR_LINE && level == ASSERT_LINE )
{
- m_int_reg[TMP95C061_INTE45] |= 0x80;
+ m_int_reg[INTE45] |= 0x80;
}
}
m_level[TLCS900_INT5] = level;
@@ -866,175 +908,6 @@ void tmp95c061_device::execute_set_input(int input, int level)
m_check_irqs = 1;
}
-
-uint8_t tmp95c061_device::p1_r()
-{
- return m_port1_read(0);
-}
-
-void tmp95c061_device::p1_w(uint8_t data)
-{
- m_port_latch[1] = data;
- m_port1_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p1cr_w(uint8_t data)
-{
- m_port_control[1] = data;
-}
-
-uint8_t tmp95c061_device::p2_r()
-{
- return m_port_latch[2];
-}
-
-void tmp95c061_device::p2_w(uint8_t data)
-{
- m_port_latch[2] = data;
- m_port2_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p2fc_w(uint8_t data)
-{
- m_port_control[2] = data;
-}
-
-uint8_t tmp95c061_device::p5_r()
-{
- return m_port5_read(0);
-}
-
-void tmp95c061_device::p5_w(uint8_t data)
-{
- m_port_latch[5] = data;
- m_port5_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p5cr_w(uint8_t data)
-{
- m_port_control[5] = data;
-}
-
-void tmp95c061_device::p5fc_w(uint8_t data)
-{
- m_port_function[5] = data;
-}
-
-uint8_t tmp95c061_device::p6_r()
-{
- return m_port6_read(0);
-}
-
-void tmp95c061_device::p6_w(uint8_t data)
-{
- m_port_latch[6] = data;
- m_port6_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p6fc_w(uint8_t data)
-{
- m_port_function[6] = data;
-}
-
-uint8_t tmp95c061_device::p7_r()
-{
- return m_port7_read(0);
-}
-
-void tmp95c061_device::p7_w(uint8_t data)
-{
- m_port_latch[7] = data;
- m_port7_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p7cr_w(uint8_t data)
-{
- m_port_control[7] = data;
-}
-
-void tmp95c061_device::p7fc_w(uint8_t data)
-{
- m_port_function[7] = data;
-}
-
-uint8_t tmp95c061_device::p8_r()
-{
- return m_port8_read(0);
-}
-
-void tmp95c061_device::p8_w(uint8_t data)
-{
- m_port_latch[8] = data;
- m_port8_write(0, data, 0xff);
-}
-
-void tmp95c061_device::p8cr_w(uint8_t data)
-{
- m_port_control[8] = data;
-}
-
-void tmp95c061_device::p8fc_w(uint8_t data)
-{
- m_port_function[8] = data;
-}
-
-uint8_t tmp95c061_device::p9_r()
-{
- return m_port9_read(0);
-}
-
-uint8_t tmp95c061_device::pa_r()
-{
- return m_porta_read(0);
-}
-
-void tmp95c061_device::pa_w(uint8_t data)
-{
- m_port_latch[0xa] = data;
- update_porta();
-}
-
-void tmp95c061_device::pacr_w(uint8_t data)
-{
- m_port_control[0xa] = data;
- update_porta();
-}
-
-void tmp95c061_device::pafc_w(uint8_t data)
-{
- m_port_function[0xa] = data;
- update_porta();
-}
-
-void tmp95c061_device::update_porta()
-{
- int fc = (m_to1 << 2) | (m_to3 << 3);
-
- m_porta_write(0, ((fc & m_port_function[0xa]) | (m_port_latch[0xa] & ~m_port_function[0xa])) & m_port_control[0xa], 0xff);
-}
-
-uint8_t tmp95c061_device::pb_r()
-{
- return m_portb_read(0);
-}
-
-void tmp95c061_device::pb_w(uint8_t data)
-{
- m_port_latch[0xb] = data;
- m_portb_write(0, data, 0xff);
-}
-
-void tmp95c061_device::pbcr_w(uint8_t data)
-{
- m_port_control[0xb] = data;
-}
-
-void tmp95c061_device::pbfc_w(uint8_t data)
-{
- m_port_function[0xb] = data;
-}
-
-
uint8_t tmp95c061_device::trun_r()
{
return m_trun;
@@ -1044,28 +917,28 @@ void tmp95c061_device::trun_w(uint8_t data)
{
if ( ! ( data & 0x01 ) )
{
- m_timer[0] = 0;
+ m_timer_8[0] = 0;
m_timer_change[0] = 0;
}
if ( ! ( data & 0x02 ) )
{
- m_timer[1] = 0;
+ m_timer_8[1] = 0;
m_timer_change[1] = 0;
}
if ( ! ( data & 0x04 ) )
{
- m_timer[2] = 0;
+ m_timer_8[2] = 0;
m_timer_change[2] = 0;
}
if ( ! ( data & 0x08 ) )
{
- m_timer[3] = 0;
+ m_timer_8[3] = 0;
m_timer_change[3] = 0;
}
if ( ! ( data & 0x10 ) )
- m_timer[4] = 0;
+ m_timer_8[4] = 0;
if ( ! ( data & 0x20 ) )
- m_timer[5] = 0;
+ m_timer_8[5] = 0;
m_trun = data;
}
@@ -1262,7 +1135,7 @@ uint8_t tmp95c061_device::sc0buf_r()
void tmp95c061_device::sc0buf_w(uint8_t data)
{
// Fake finish sending data
- m_int_reg[TMP95C061_INTES0] |= 0x80;
+ m_int_reg[INTES0] |= 0x80;
m_check_irqs = 1;
}
@@ -1307,7 +1180,7 @@ uint8_t tmp95c061_device::sc1buf_r()
void tmp95c061_device::sc1buf_w(uint8_t data)
{
// Fake finish sending data
- m_int_reg[TMP95C061_INTES1] |= 0x80;
+ m_int_reg[INTES1] |= 0x80;
m_check_irqs = 1;
}
@@ -1364,7 +1237,7 @@ uint8_t tmp95c061_device::adreg_r(offs_t offset)
return m_ad_result[offset >> 1] >> 2;
// Reading data from the upper 8 bits clears INTE0AD IADC
- m_int_reg[TMP95C061_INTE0AD] &= ~0x80;
+ m_int_reg[INTE0AD] &= ~0x80;
return m_ad_result[offset >> 1] << 6 | 0x3f;
}
diff --git a/src/devices/cpu/tlcs900/tmp95c061.h b/src/devices/cpu/tlcs900/tmp95c061.h
index 106ca5c57ce..031ba79f727 100644
--- a/src/devices/cpu/tlcs900/tmp95c061.h
+++ b/src/devices/cpu/tlcs900/tmp95c061.h
@@ -13,32 +13,44 @@ DECLARE_DEVICE_TYPE(TMP95C061, tmp95c061_device)
class tmp95c061_device : public tlcs900h_device
{
+ static constexpr uint8_t PORT_1 = 0; // 8 bit I/O. Shared with D8-D15
+ static constexpr uint8_t PORT_2 = 1; // 8 bit output only. Shared with A16-A23
+ static constexpr uint8_t PORT_5 = 2; // 4 bit I/O. Shared with HWR, BUSRQ, BUSAK, RW
+ static constexpr uint8_t PORT_6 = 3; // 6 bit I/O. Shared with CS0, CS1, CS3/LCAS, RAS, REFOUT
+ static constexpr uint8_t PORT_7 = 4; // 8 bit I/O. Shared with PG0-OUT, PG1-OUT
+ static constexpr uint8_t PORT_8 = 5; // 6 bit I/O. Shared with TXD0, TXD1, RXD0, RXD1, CTS0, SCLK0, SCLK1
+ static constexpr uint8_t PORT_9 = 6; // 4 bit input only. Shared with AN0-AN3
+ static constexpr uint8_t PORT_A = 7; // 4 bit I/O. Shared with WAIT, TI0, TO1, TO2
+ static constexpr uint8_t PORT_B = 8; // 8 bit I/O. Shared with TI4/INT4, TI5/INT5, TI6/INT6, TI7/INT7, TO4, TO5, TO6
+ static constexpr uint8_t NUM_PORTS = 9;
+
public:
// construction/destruction
tmp95c061_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
- auto port1_read() { return m_port1_read.bind(); }
- auto port1_write() { return m_port1_write.bind(); }
- auto port2_write() { return m_port2_write.bind(); }
- auto port5_read() { return m_port5_read.bind(); }
- auto port5_write() { return m_port5_write.bind(); }
- auto port6_write() { return m_port6_write.bind(); }
- auto port7_read() { return m_port7_read.bind(); }
- auto port7_write() { return m_port7_write.bind(); }
- auto port8_read() { return m_port8_read.bind(); }
- auto port8_write() { return m_port8_write.bind(); }
- auto port9_read() { return m_port9_read.bind(); }
- auto porta_read() { return m_porta_read.bind(); }
- auto porta_write() { return m_porta_write.bind(); }
- auto portb_read() { return m_portb_read.bind(); }
- auto portb_write() { return m_portb_write.bind(); }
+ auto port1_read() { return m_port_read[PORT_1].bind(); }
+ auto port1_write() { return m_port_write[PORT_1].bind(); }
+ auto port2_write() { return m_port_write[PORT_2].bind(); }
+ auto port5_read() { return m_port_read[PORT_5].bind(); }
+ auto port5_write() { return m_port_write[PORT_5].bind(); }
+ auto port6_write() { return m_port_write[PORT_6].bind(); }
+ auto port7_read() { return m_port_read[PORT_7].bind(); }
+ auto port7_write() { return m_port_write[PORT_7].bind(); }
+ auto port8_read() { return m_port_read[PORT_8].bind(); }
+ auto port8_write() { return m_port_write[PORT_8].bind(); }
+ auto port9_read() { return m_port_read[PORT_9].bind(); }
+ auto porta_read() { return m_port_read[PORT_A].bind(); }
+ auto porta_write() { return m_port_write[PORT_A].bind(); }
+ auto portb_read() { return m_port_read[PORT_B].bind(); }
+ auto portb_write() { return m_port_write[PORT_B].bind(); }
template <size_t Bit> auto an_read() { return m_an_read[Bit].bind(); }
protected:
- virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_config_complete() override ATTR_COLD;
+ virtual void device_resolve_objects() override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual void tlcs900_check_hdma() override;
@@ -51,36 +63,10 @@ protected:
void update_porta();
private:
- uint8_t p1_r();
- void p1_w(uint8_t data);
- void p1cr_w(uint8_t data);
- uint8_t p2_r();
- void p2_w(uint8_t data);
- void p2fc_w(uint8_t data);
- uint8_t p5_r();
- void p5_w(uint8_t data);
- void p5cr_w(uint8_t data);
- void p5fc_w(uint8_t data);
- uint8_t p6_r();
- void p6_w(uint8_t data);
- void p6fc_w(uint8_t data);
- uint8_t p7_r();
- void p7_w(uint8_t data);
- void p7cr_w(uint8_t data);
- void p7fc_w(uint8_t data);
- uint8_t p8_r();
- void p8_w(uint8_t data);
- void p8cr_w(uint8_t data);
- void p8fc_w(uint8_t data);
- uint8_t p9_r();
- uint8_t pa_r();
- void pa_w(uint8_t data);
- void pacr_w(uint8_t data);
- void pafc_w(uint8_t data);
- uint8_t pb_r();
- void pb_w(uint8_t data);
- void pbcr_w(uint8_t data);
- void pbfc_w(uint8_t data);
+ template <uint8_t> uint8_t port_r();
+ template <uint8_t> void port_w(uint8_t data);
+ template <uint8_t> void port_cr_w(uint8_t data);
+ template <uint8_t> void port_fc_w(uint8_t data);
uint8_t trun_r();
void trun_w(uint8_t data);
void treg01_w(offs_t offset, uint8_t data);
@@ -148,49 +134,17 @@ private:
uint8_t dmemcr_r();
void dmemcr_w(uint8_t data);
- void internal_mem(address_map &map);
-
- // Port 1: 8 bit I/O. Shared with D8-D15
- devcb_read8 m_port1_read;
- devcb_write8 m_port1_write;
-
- // Port 2: 8 bit output only. Shared with A16-A23
- devcb_write8 m_port2_write;
-
- // Port 5: 4 bit I/O. Shared with HWR, BUSRQ, BUSAK, RW
- devcb_read8 m_port5_read;
- devcb_write8 m_port5_write;
-
- // Port 6: 6 bit I/O. Shared with CS0, CS1, CS3/LCAS, RAS, REFOUT
- devcb_read8 m_port6_read;
- devcb_write8 m_port6_write;
-
- // Port 7: 8 bit I/O. Shared with PG0-OUT, PG1-OUT
- devcb_read8 m_port7_read;
- devcb_write8 m_port7_write;
-
- // Port 8: 6 bit I/O. Shared with TXD0, TXD1, RXD0, RXD1, CTS0, SCLK0, SCLK1
- devcb_read8 m_port8_read;
- devcb_write8 m_port8_write;
-
- // Port 9: 4 bit input only. Shared with AN0-AN3
- devcb_read8 m_port9_read;
-
- // Port A: 4 bit I/O. Shared with WAIT, TI0, TO1, TO2
- devcb_read8 m_porta_read;
- devcb_write8 m_porta_write;
-
- // Port B: 8 bit I/O. Shared with TI4/INT4, TI5/INT5, TI6/INT6, TI7/INT7, TO4, TO5, TO6
- devcb_read8 m_portb_read;
- devcb_write8 m_portb_write;
+ void internal_mem(address_map &map) ATTR_COLD;
// analogue inputs, sampled at 10 bits
devcb_read16::array<4> m_an_read;
- // I/O Port Control
- uint8_t m_port_latch[0xc];
- uint8_t m_port_control[0xc];
- uint8_t m_port_function[0xc];
+ // I/O Ports
+ devcb_read8::array<NUM_PORTS> m_port_read;
+ devcb_write8::array<NUM_PORTS> m_port_write;
+ uint8_t m_port_latch[NUM_PORTS];
+ uint8_t m_port_control[NUM_PORTS];
+ uint8_t m_port_function[NUM_PORTS];
// Timer Control
uint8_t m_trun;
diff --git a/src/devices/cpu/tlcs900/tmp95c063.cpp b/src/devices/cpu/tlcs900/tmp95c063.cpp
index c70a19e85cc..23f4025a411 100644
--- a/src/devices/cpu/tlcs900/tmp95c063.cpp
+++ b/src/devices/cpu/tlcs900/tmp95c063.cpp
@@ -14,32 +14,12 @@ DEFINE_DEVICE_TYPE(TMP95C063, tmp95c063_device, "tmp95c063", "Toshiba TMP95C063"
tmp95c063_device::tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
tlcs900h_device(mconfig, TMP95C063, tag, owner, clock),
- m_port1_read(*this, 0),
- m_port1_write(*this),
- m_port2_write(*this),
- m_port5_read(*this, 0),
- m_port5_write(*this),
- m_port6_read(*this, 0),
- m_port6_write(*this),
- m_port7_read(*this, 0),
- m_port7_write(*this),
- m_port8_read(*this, 0),
- m_port8_write(*this),
- m_port9_read(*this, 0),
- m_port9_write(*this),
- m_porta_read(*this, 0),
- m_porta_write(*this),
- m_portb_read(*this, 0),
- m_portb_write(*this),
- m_portc_read(*this, 0),
- m_portd_read(*this, 0),
- m_portd_write(*this),
- m_porte_read(*this, 0),
- m_porte_write(*this),
m_an_read(*this, 0),
- m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
- m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
- m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_read(*this, 0),
+ m_port_write(*this),
+ m_port_latch{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_control{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ m_port_function{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
m_t8run(0),
m_t8_reg{ 0, 0, 0, 0, 0, 0, 0, 0 },
m_t8_mode{ 0, 0, 0, 0 },
@@ -74,28 +54,54 @@ tmp95c063_device::tmp95c063_device(const machine_config &mconfig, const char *ta
{
}
+template <uint8_t P>
+void tmp95c063_device::port_w(uint8_t data)
+{
+ m_port_latch[P] = data;
+ m_port_write[P](0, data, 0xff);
+}
+
+template <uint8_t P>
+uint8_t tmp95c063_device::port_r()
+{
+ return m_port_read[P](0);
+}
+
+template <uint8_t P>
+void tmp95c063_device::port_cr_w(uint8_t data)
+{
+ m_port_control[P] = data;
+}
+
+template <uint8_t P>
+void tmp95c063_device::port_fc_w(uint8_t data)
+{
+ m_port_function[P] = data;
+}
+
+
void tmp95c063_device::internal_mem(address_map &map)
{
- map(0x000001, 0x000001).rw(FUNC(tmp95c063_device::p1_r), FUNC(tmp95c063_device::p1_w));
- map(0x000004, 0x000004).w(FUNC(tmp95c063_device::p1cr_w));
- map(0x000006, 0x000006).rw(FUNC(tmp95c063_device::p2_r), FUNC(tmp95c063_device::p2_w));
- map(0x000009, 0x000009).w(FUNC(tmp95c063_device::p2fc_w));
- map(0x00000d, 0x00000d).rw(FUNC(tmp95c063_device::p5_r), FUNC(tmp95c063_device::p5_w));
- map(0x000010, 0x000010).w(FUNC(tmp95c063_device::p5cr_w));
- map(0x000011, 0x000011).w(FUNC(tmp95c063_device::p5fc_w));
- map(0x000012, 0x000012).rw(FUNC(tmp95c063_device::p6_r), FUNC(tmp95c063_device::p6_w));
- map(0x000013, 0x000013).rw(FUNC(tmp95c063_device::p7_r), FUNC(tmp95c063_device::p7_w));
- map(0x000015, 0x000015).w(FUNC(tmp95c063_device::p6fc_w));
- map(0x000016, 0x000016).w(FUNC(tmp95c063_device::p7cr_w));
- map(0x000017, 0x000017).w(FUNC(tmp95c063_device::p7fc_w));
- map(0x000018, 0x000018).rw(FUNC(tmp95c063_device::p8_r), FUNC(tmp95c063_device::p8_w));
- map(0x000019, 0x000019).rw(FUNC(tmp95c063_device::p9_r), FUNC(tmp95c063_device::p9_w));
- map(0x00001a, 0x00001a).w(FUNC(tmp95c063_device::p8cr_w));
- map(0x00001b, 0x00001b).w(FUNC(tmp95c063_device::p8fc_w));
- map(0x00001c, 0x00001c).w(FUNC(tmp95c063_device::p9cr_w));
- map(0x00001d, 0x00001d).w(FUNC(tmp95c063_device::p9fc_w));
- map(0x00001e, 0x00001e).rw(FUNC(tmp95c063_device::pa_r), FUNC(tmp95c063_device::pa_w));
- map(0x00001f, 0x00001f).rw(FUNC(tmp95c063_device::pb_r), FUNC(tmp95c063_device::pb_w));
+ map(0x000001, 0x000001).rw(FUNC(tmp95c063_device::port_r<PORT_1>), FUNC(tmp95c063_device::port_w<PORT_1>));
+ map(0x000004, 0x000004).w(FUNC(tmp95c063_device::port_cr_w<PORT_1>));
+ map(0x000006, 0x000006).rw(FUNC(tmp95c063_device::port_r<PORT_2>), FUNC(tmp95c063_device::port_w<PORT_2>));
+ map(0x000009, 0x000009).w(FUNC(tmp95c063_device::port_fc_w<PORT_2>));
+ map(0x00000d, 0x00000d).rw(FUNC(tmp95c063_device::port_r<PORT_5>), FUNC(tmp95c063_device::port_w<PORT_5>));
+ map(0x000010, 0x000010).w(FUNC(tmp95c063_device::port_cr_w<PORT_5>));
+ map(0x000011, 0x000011).w(FUNC(tmp95c063_device::port_fc_w<PORT_5>));
+ map(0x000012, 0x000012).rw(FUNC(tmp95c063_device::port_r<PORT_6>), FUNC(tmp95c063_device::port_w<PORT_6>));
+ map(0x000013, 0x000013).rw(FUNC(tmp95c063_device::port_r<PORT_7>), FUNC(tmp95c063_device::port_w<PORT_7>));
+ map(0x000015, 0x000015).w(FUNC(tmp95c063_device::port_fc_w<PORT_6>));
+ map(0x000016, 0x000016).w(FUNC(tmp95c063_device::port_cr_w<PORT_7>));
+ map(0x000017, 0x000017).w(FUNC(tmp95c063_device::port_fc_w<PORT_7>));
+ map(0x000018, 0x000018).rw(FUNC(tmp95c063_device::port_r<PORT_8>), FUNC(tmp95c063_device::port_w<PORT_8>));
+ map(0x000019, 0x000019).rw(FUNC(tmp95c063_device::port_r<PORT_9>), FUNC(tmp95c063_device::port_w<PORT_9>));
+ map(0x00001a, 0x00001a).w(FUNC(tmp95c063_device::port_cr_w<PORT_8>));
+ map(0x00001b, 0x00001b).w(FUNC(tmp95c063_device::port_fc_w<PORT_8>));
+ map(0x00001c, 0x00001c).w(FUNC(tmp95c063_device::port_cr_w<PORT_9>));
+ map(0x00001d, 0x00001d).w(FUNC(tmp95c063_device::port_fc_w<PORT_9>));
+ map(0x00001e, 0x00001e).rw(FUNC(tmp95c063_device::port_r<PORT_A>), FUNC(tmp95c063_device::port_w<PORT_A>));
+ map(0x00001f, 0x00001f).rw(FUNC(tmp95c063_device::port_r<PORT_B>), FUNC(tmp95c063_device::port_w<PORT_B>));
map(0x000020, 0x000020).rw(FUNC(tmp95c063_device::t8run_r), FUNC(tmp95c063_device::t8run_w));
map(0x000021, 0x000021).rw(FUNC(tmp95c063_device::trdc_r), FUNC(tmp95c063_device::trdc_w));
map(0x000022, 0x000023).w(FUNC(tmp95c063_device::treg01_w));
@@ -140,15 +146,15 @@ void tmp95c063_device::internal_mem(address_map &map)
map(0x00006f, 0x00006f).w(FUNC(tmp95c063_device::wdcr_w));
map(0x000070, 0x00007e).rw(FUNC(tmp95c063_device::inte_r), FUNC(tmp95c063_device::inte_w));
map(0x00007f, 0x00007f).w(FUNC(tmp95c063_device::iimc_w));
- map(0x000080, 0x000080).w(FUNC(tmp95c063_device::pacr_w));
- map(0x000081, 0x000081).w(FUNC(tmp95c063_device::pafc_w));
- map(0x000082, 0x000082).w(FUNC(tmp95c063_device::pbcr_w));
- map(0x000083, 0x000083).w(FUNC(tmp95c063_device::pbfc_w));
- map(0x000084, 0x000084).r(FUNC(tmp95c063_device::pc_r));
- map(0x000085, 0x000085).rw(FUNC(tmp95c063_device::pd_r), FUNC(tmp95c063_device::pd_w));
- map(0x000088, 0x000088).w(FUNC(tmp95c063_device::pdcr_w));
- map(0x00008a, 0x00008a).rw(FUNC(tmp95c063_device::pe_r), FUNC(tmp95c063_device::pe_w));
- map(0x00008c, 0x00008c).w(FUNC(tmp95c063_device::pecr_w));
+ map(0x000080, 0x000080).w(FUNC(tmp95c063_device::port_cr_w<PORT_A>));
+ map(0x000081, 0x000081).w(FUNC(tmp95c063_device::port_fc_w<PORT_A>));
+ map(0x000082, 0x000082).w(FUNC(tmp95c063_device::port_cr_w<PORT_B>));
+ map(0x000083, 0x000083).w(FUNC(tmp95c063_device::port_fc_w<PORT_B>));
+ map(0x000084, 0x000084).r(FUNC(tmp95c063_device::port_r<PORT_C>));
+ map(0x000085, 0x000085).rw(FUNC(tmp95c063_device::port_r<PORT_D>), FUNC(tmp95c063_device::port_w<PORT_D>));
+ map(0x000088, 0x000088).w(FUNC(tmp95c063_device::port_cr_w<PORT_D>));
+ map(0x00008a, 0x00008a).rw(FUNC(tmp95c063_device::port_r<PORT_E>), FUNC(tmp95c063_device::port_w<PORT_E>));
+ map(0x00008c, 0x00008c).w(FUNC(tmp95c063_device::port_cr_w<PORT_E>));
map(0x00008f, 0x00008f).w(FUNC(tmp95c063_device::bexcs_w));
map(0x000090, 0x000093).w(FUNC(tmp95c063_device::bcs_w));
map(0x000094, 0x00009b).rw(FUNC(tmp95c063_device::msar_r), FUNC(tmp95c063_device::msar_w));
@@ -176,64 +182,64 @@ void tmp95c063_device::device_config_complete()
}
}
+enum
+{
+ INTE0AD,
+ INTE12,
+ INTE34,
+ INTE56,
+ INTE78,
+ INTET01,
+ INTET23,
+ INTET45,
+ INTET67,
+ INTET89,
+ INTETAB,
+ INTES0,
+ INTES1,
+ INTETC01,
+ INTETC23
+};
-
-#define TMP95C063_INTE0AD 0x0
-#define TMP95C063_INTE12 0x1
-#define TMP95C063_INTE34 0x2
-#define TMP95C063_INTE56 0x3
-#define TMP95C063_INTE78 0x4
-#define TMP95C063_INTET01 0x5
-#define TMP95C063_INTET23 0x6
-#define TMP95C063_INTET45 0x7
-#define TMP95C063_INTET67 0x8
-#define TMP95C063_INTET89 0x9
-#define TMP95C063_INTETAB 0xa
-#define TMP95C063_INTES0 0xb
-#define TMP95C063_INTES1 0xc
-#define TMP95C063_INTETC01 0xd
-#define TMP95C063_INTETC23 0xe
-
-
-#define TMP95C063_NUM_MASKABLE_IRQS 30
static const struct {
uint8_t reg;
uint8_t iff;
uint8_t vector;
-} tmp95c063_irq_vector_map[TMP95C063_NUM_MASKABLE_IRQS] =
-{
- { TMP95C063_INTETC23, 0x80, 0xa0 }, /* INTTC3 */
- { TMP95C063_INTETC23, 0x08, 0x9c }, /* INTTC2 */
- { TMP95C063_INTETC01, 0x80, 0x98 }, /* INTTC1 */
- { TMP95C063_INTETC01, 0x08, 0x94 }, /* INTTC0 */
- { TMP95C063_INTE0AD, 0x80, 0x90 }, /* INTAD */
- { TMP95C063_INTES1, 0x80, 0x8c }, /* INTTX1 */
- { TMP95C063_INTES1, 0x08, 0x88 }, /* INTRX1 */
- { TMP95C063_INTES0, 0x80, 0x84 }, /* INTTX0 */
- { TMP95C063_INTES0, 0x08, 0x80 }, /* INTRX0 */
- { TMP95C063_INTETAB, 0x80, 0x7c }, /* INTTRB */
- { TMP95C063_INTETAB, 0x08, 0x78 }, /* INTTRA */
- { TMP95C063_INTET89, 0x80, 0x74 }, /* INTTR9 */
- { TMP95C063_INTET89, 0x80, 0x70 }, /* INTTR8 */
- { TMP95C063_INTET67, 0x80, 0x6c }, /* INTT7 */
- { TMP95C063_INTET67, 0x08, 0x68 }, /* INTT6 */
- { TMP95C063_INTET45, 0x80, 0x64 }, /* INTT5 */
- { TMP95C063_INTET45, 0x08, 0x60 }, /* INTT4 */
- { TMP95C063_INTET23, 0x80, 0x5c }, /* INTT3 */
- { TMP95C063_INTET23, 0x08, 0x58 }, /* INTT2 */
- { TMP95C063_INTET01, 0x80, 0x54 }, /* INTT1 */
- { TMP95C063_INTET01, 0x08, 0x50 }, /* INTT0 */
- { TMP95C063_INTE78, 0x80, 0x4c }, /* int8_t */
- { TMP95C063_INTE78, 0x08, 0x48 }, /* INT7 */
- { TMP95C063_INTE56, 0x80, 0x44 }, /* INT6 */
- { TMP95C063_INTE56, 0x08, 0x40 }, /* INT5 */
- /* 0x3c - reserved */
- { TMP95C063_INTE34, 0x80, 0x38 }, /* INT4 */
- { TMP95C063_INTE34, 0x08, 0x34 }, /* INT3 */
- { TMP95C063_INTE12, 0x80, 0x30 }, /* INT2 */
- { TMP95C063_INTE12, 0x08, 0x2c }, /* INT1 */
- { TMP95C063_INTE0AD, 0x08, 0x28 } /* INT0 */
+} tmp95c063_irq_vector_map[] =
+{
+ { INTETC23, 0x80, 0xa0 }, // INTTC3
+ { INTETC23, 0x08, 0x9c }, // INTTC2
+ { INTETC01, 0x80, 0x98 }, // INTTC1
+ { INTETC01, 0x08, 0x94 }, // INTTC0
+ { INTE0AD, 0x80, 0x90 }, // INTAD
+ { INTES1, 0x80, 0x8c }, // INTTX1
+ { INTES1, 0x08, 0x88 }, // INTRX1
+ { INTES0, 0x80, 0x84 }, // INTTX0
+ { INTES0, 0x08, 0x80 }, // INTRX0
+ { INTETAB, 0x80, 0x7c }, // INTTRB
+ { INTETAB, 0x08, 0x78 }, // INTTRA
+ { INTET89, 0x80, 0x74 }, // INTTR9
+ { INTET89, 0x80, 0x70 }, // INTTR8
+ { INTET67, 0x80, 0x6c }, // INTT7
+ { INTET67, 0x08, 0x68 }, // INTT6
+ { INTET45, 0x80, 0x64 }, // INTT5
+ { INTET45, 0x08, 0x60 }, // INTT4
+ { INTET23, 0x80, 0x5c }, // INTT3
+ { INTET23, 0x08, 0x58 }, // INTT2
+ { INTET01, 0x80, 0x54 }, // INTT1
+ { INTET01, 0x08, 0x50 }, // INTT0
+ { INTE78, 0x80, 0x4c }, // INT8
+ { INTE78, 0x08, 0x48 }, // INT7
+ { INTE56, 0x80, 0x44 }, // INT6
+ { INTE56, 0x08, 0x40 }, // INT5
+ // 0x3c - reserved
+ { INTE34, 0x80, 0x38 }, // INT4
+ { INTE34, 0x08, 0x34 }, // INT3
+ { INTE12, 0x80, 0x30 }, // INT2
+ { INTE12, 0x08, 0x2c }, // INT1
+ { INTE0AD, 0x08, 0x28 } // INT0
};
+static constexpr u8 NUM_MASKABLE_IRQS = sizeof(tmp95c063_irq_vector_map) / 3;
void tmp95c063_device::tlcs900_handle_timers()
{
@@ -265,8 +271,8 @@ void tmp95c063_device::tlcs900_handle_timers()
for( ; m_timer_change[0] > 0; m_timer_change[0]-- )
{
- m_timer[0] += 1;
- if ( m_timer[0] == m_t8_reg[0] )
+ m_timer_8[0] += 1;
+ if ( m_timer_8[0] == m_t8_reg[0] )
{
if ( ( m_t8run & 0x02 ) && ( m_t8_mode[0] & 0x0c ) == 0x00 )
{
@@ -276,8 +282,8 @@ void tmp95c063_device::tlcs900_handle_timers()
/* In 16bit timer mode the timer should not be reset */
if ( ( m_t8_mode[0] & 0xc0 ) != 0x40 )
{
- m_timer[0] = 0;
- m_int_reg[TMP95C063_INTET01] |= 0x08;
+ m_timer_8[0] = 0;
+ m_int_reg[INTET01] |= 0x08;
}
}
}
@@ -303,11 +309,11 @@ void tmp95c063_device::tlcs900_handle_timers()
for( ; m_timer_change[1] > 0; m_timer_change[1]-- )
{
- m_timer[1] += 1;
- if ( m_timer[1] == m_t8_reg[1] )
+ m_timer_8[1] += 1;
+ if ( m_timer_8[1] == m_t8_reg[1] )
{
- m_timer[1] = 0;
- m_int_reg[TMP95C063_INTET01] |= 0x80;
+ m_timer_8[1] = 0;
+ m_int_reg[INTET01] |= 0x80;
if ( m_t8_invert[0] & 0x02 )
{
@@ -317,7 +323,7 @@ void tmp95c063_device::tlcs900_handle_timers()
/* In 16bit timer mode also reset timer 0 */
if ( ( m_t8_mode[0] & 0xc0 ) == 0x40 )
{
- m_timer[0] = 0;
+ m_timer_8[0] = 0;
}
}
}
@@ -342,8 +348,8 @@ void tmp95c063_device::tlcs900_handle_timers()
for( ; m_timer_change[2] > 0; m_timer_change[2]-- )
{
- m_timer[2] += 1;
- if ( m_timer[2] == m_t8_reg[2] )
+ m_timer_8[2] += 1;
+ if ( m_timer_8[2] == m_t8_reg[2] )
{
if ( ( m_t8run & 0x08 ) && ( m_t8_mode[1] & 0x0c ) == 0x00 )
{
@@ -353,8 +359,8 @@ void tmp95c063_device::tlcs900_handle_timers()
/* In 16bit timer mode the timer should not be reset */
if ( ( m_t8_mode[1] & 0xc0 ) != 0x40 )
{
- m_timer[2] = 0;
- m_int_reg[TMP95C063_INTET23] |= 0x08;
+ m_timer_8[2] = 0;
+ m_int_reg[INTET23] |= 0x08;
}
}
}
@@ -380,11 +386,11 @@ void tmp95c063_device::tlcs900_handle_timers()
for( ; m_timer_change[3] > 0; m_timer_change[3]-- )
{
- m_timer[3] += 1;
- if ( m_timer[3] == m_t8_reg[3] )
+ m_timer_8[3] += 1;
+ if ( m_timer_8[3] == m_t8_reg[3] )
{
- m_timer[3] = 0;
- m_int_reg[TMP95C063_INTET23] |= 0x80;
+ m_timer_8[3] = 0;
+ m_int_reg[INTET23] |= 0x80;
if ( m_t8_invert[1] & 0x20 )
{
@@ -394,7 +400,7 @@ void tmp95c063_device::tlcs900_handle_timers()
/* In 16bit timer mode also reset timer 2 */
if ( ( m_t8_mode[1] & 0xc0 ) == 0x40 )
{
- m_timer[2] = 0;
+ m_timer_8[2] = 0;
}
}
}
@@ -410,11 +416,6 @@ void tmp95c063_device::tlcs900_check_hdma()
void tmp95c063_device::tlcs900_check_irqs()
{
- int irq_vectors[9] = { -1, -1, -1, -1, -1, -1, -1, -1, -1 };
- int level = 0;
- int irq = -1;
- int i;
-
/* Check for NMI */
if ( m_nmi_state == ASSERT_LINE )
{
@@ -434,7 +435,8 @@ void tmp95c063_device::tlcs900_check_irqs()
}
/* Check regular irqs */
- for( i = 0; i < TMP95C063_NUM_MASKABLE_IRQS; i++ )
+ int irq_vectors[9] = { -1, -1, -1, -1, -1, -1, -1, -1, -1 };
+ for( int i = 0; i < NUM_MASKABLE_IRQS; i++ )
{
if ( m_int_reg[tmp95c063_irq_vector_map[i].reg] & tmp95c063_irq_vector_map[i].iff )
{
@@ -451,7 +453,9 @@ void tmp95c063_device::tlcs900_check_irqs()
}
/* Check highest allowed priority irq */
- for ( i = std::max( 1, ( ( m_sr.b.h & 0x70 ) >> 4 ) ); i < 7; i++ )
+ int irq = -1;
+ int level = 0;
+ for ( int i = std::max( 1, ( ( m_sr.b.h & 0x70 ) >> 4 ) ); i < 7; i++ )
{
if ( irq_vectors[i] >= 0 )
{
@@ -544,13 +548,22 @@ void tmp95c063_device::tlcs900_handle_ad()
m_ad_mode1 &= ~ 0x40;
m_ad_mode1 |= 0x80;
- m_int_reg[TMP95C063_INTE0AD] |= 0x80;
+ m_int_reg[INTE0AD] |= 0x80;
m_check_irqs = 1;
}
}
}
+void tmp95c063_device::device_resolve_objects()
+{
+ m_nmi_state = CLEAR_LINE;
+ for( int i = 0; i < TLCS900_NUM_INPUTS; i++ )
+ {
+ m_level[i] = CLEAR_LINE;
+ }
+}
+
void tmp95c063_device::device_start()
{
tlcs900h_device::device_start();
@@ -596,23 +609,24 @@ void tmp95c063_device::device_reset()
tlcs900h_device::device_reset();
m_ad_cycles_left = 0;
- m_nmi_state = CLEAR_LINE;
m_timer_pre = 0;
m_timer_change[0] = 0;
m_timer_change[1] = 0;
m_timer_change[2] = 0;
m_timer_change[3] = 0;
- m_port_latch[1] = 0x00;
- m_port_latch[2] = 0xff;
- m_port_latch[5] = 0x3d;
- m_port_latch[6] = 0x3b;
- m_port_latch[7] = 0xff;
- m_port_latch[8] = 0x3f;
- m_port_latch[0xa] = 0x0f;
- m_port_latch[0xb] = 0xff;
- std::fill_n(&m_port_control[0], 0xc, 0x00);
- std::fill_n(&m_port_function[0], 0xc, 0x00);
+ m_port_latch[PORT_1] = 0x00;
+ m_port_latch[PORT_2] = 0xff;
+ m_port_latch[PORT_5] = 0x3d;
+ m_port_latch[PORT_6] = 0x3b;
+ m_port_latch[PORT_7] = 0xff;
+ m_port_latch[PORT_8] = 0x3f;
+ m_port_latch[PORT_A] = 0x0f;
+ m_port_latch[PORT_B] = 0xff;
+ // FIXME: init ports 9, C, D & E
+ std::fill_n(&m_port_control[0], NUM_PORTS, 0x00);
+ std::fill_n(&m_port_function[0], NUM_PORTS, 0x00);
+
m_t8run = 0x00;
std::fill_n(&m_t8_mode[0], 4, 0x00);
std::fill_n(&m_t8_invert[0], 2, 0xcc);
@@ -647,222 +661,8 @@ void tmp95c063_device::device_reset()
std::fill_n(&m_dram_refresh[0], 2, 0x00);
std::fill_n(&m_dram_access[0], 2, 0x80);
m_da_drive = 0x00;
-
- for (int i = 0; i < TLCS900_NUM_INPUTS; i++)
- m_level[i] = CLEAR_LINE;
}
-
-uint8_t tmp95c063_device::p1_r()
-{
- return m_port1_read(0);
-}
-
-void tmp95c063_device::p1_w(uint8_t data)
-{
- m_port_latch[1] = data;
- m_port1_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p1cr_w(uint8_t data)
-{
- m_port_control[1] = data;
-}
-
-uint8_t tmp95c063_device::p2_r()
-{
- return m_port_latch[2];
-}
-
-void tmp95c063_device::p2_w(uint8_t data)
-{
- m_port_latch[2] = data;
- m_port2_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p2fc_w(uint8_t data)
-{
- m_port_control[2] = data;
-}
-
-uint8_t tmp95c063_device::p5_r()
-{
- return m_port5_read(0);
-}
-
-void tmp95c063_device::p5_w(uint8_t data)
-{
- m_port_latch[5] = data;
- m_port5_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p5cr_w(uint8_t data)
-{
- m_port_control[5] = data;
-}
-
-void tmp95c063_device::p5fc_w(uint8_t data)
-{
- m_port_function[5] = data;
-}
-
-uint8_t tmp95c063_device::p6_r()
-{
- return m_port6_read(0);
-}
-
-void tmp95c063_device::p6_w(uint8_t data)
-{
- m_port_latch[6] = data;
- m_port6_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p6fc_w(uint8_t data)
-{
- m_port_function[6] = data;
-}
-
-uint8_t tmp95c063_device::p7_r()
-{
- return m_port7_read(0);
-}
-
-void tmp95c063_device::p7_w(uint8_t data)
-{
- m_port_latch[7] = data;
- m_port7_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p7cr_w(uint8_t data)
-{
- m_port_control[7] = data;
-}
-
-void tmp95c063_device::p7fc_w(uint8_t data)
-{
- m_port_function[7] = data;
-}
-
-uint8_t tmp95c063_device::p8_r()
-{
- return m_port8_read(0);
-}
-
-void tmp95c063_device::p8_w(uint8_t data)
-{
- m_port_latch[8] = data;
- m_port8_write(0, data, 0xff);
-}
-
-void tmp95c063_device::p8cr_w(uint8_t data)
-{
- m_port_control[8] = data;
-}
-
-void tmp95c063_device::p8fc_w(uint8_t data)
-{
- m_port_function[8] = data;
-}
-
-uint8_t tmp95c063_device::p9_r()
-{
- return m_port9_read(0);
-}
-
-void tmp95c063_device::p9_w(uint8_t data)
-{
- m_port_latch[0x9] = data;
-}
-
-void tmp95c063_device::p9cr_w(uint8_t data)
-{
- m_port_control[0x9] = data;
-}
-
-void tmp95c063_device::p9fc_w(uint8_t data)
-{
- m_port_function[0x9] = data;
-}
-
-uint8_t tmp95c063_device::pa_r()
-{
- return m_porta_read(0);
-}
-
-void tmp95c063_device::pa_w(uint8_t data)
-{
- m_port_latch[0xa] = data;
-}
-
-void tmp95c063_device::pacr_w(uint8_t data)
-{
- m_port_control[0xa] = data;
-}
-
-void tmp95c063_device::pafc_w(uint8_t data)
-{
- m_port_function[0xa] = data;
-}
-
-uint8_t tmp95c063_device::pb_r()
-{
- return m_portb_read(0);
-}
-
-void tmp95c063_device::pb_w(uint8_t data)
-{
- m_port_latch[0xb] = data;
- m_portb_write(0, data, 0xff);
-}
-
-void tmp95c063_device::pbcr_w(uint8_t data)
-{
- m_port_control[0xb] = data;
-}
-
-void tmp95c063_device::pbfc_w(uint8_t data)
-{
- m_port_function[0xb] = data;
-}
-
-uint8_t tmp95c063_device::pc_r()
-{
- return m_portc_read(0);
-}
-
-uint8_t tmp95c063_device::pd_r()
-{
- return m_portd_read(0);
-}
-
-void tmp95c063_device::pd_w(uint8_t data)
-{
- m_port_latch[0xd] = data;
- m_portd_write(0, data, 0xff);
-}
-
-void tmp95c063_device::pdcr_w(uint8_t data)
-{
- m_port_control[0xd] = data;
-}
-
-uint8_t tmp95c063_device::pe_r()
-{
- return m_porte_read(0);
-}
-
-void tmp95c063_device::pe_w(uint8_t data)
-{
- m_port_latch[0xe] = data;
- m_porte_write(0, data, 0xff);
-}
-
-void tmp95c063_device::pecr_w(uint8_t data)
-{
- m_port_control[0xe] = data;
-}
-
-
uint8_t tmp95c063_device::t8run_r()
{
return m_t8run;
@@ -872,28 +672,28 @@ void tmp95c063_device::t8run_w(uint8_t data)
{
if ( ! ( data & 0x01 ) )
{
- m_timer[0] = 0;
+ m_timer_8[0] = 0;
m_timer_change[0] = 0;
}
if ( ! ( data & 0x02 ) )
{
- m_timer[1] = 0;
+ m_timer_8[1] = 0;
m_timer_change[1] = 0;
}
if ( ! ( data & 0x04 ) )
{
- m_timer[2] = 0;
+ m_timer_8[2] = 0;
m_timer_change[2] = 0;
}
if ( ! ( data & 0x08 ) )
{
- m_timer[3] = 0;
+ m_timer_8[3] = 0;
m_timer_change[3] = 0;
}
if ( ! ( data & 0x10 ) )
- m_timer[4] = 0;
+ m_timer_8[4] = 0;
if ( ! ( data & 0x20 ) )
- m_timer[5] = 0;
+ m_timer_8[5] = 0;
m_t8run = data;
}
@@ -1225,7 +1025,7 @@ uint8_t tmp95c063_device::sc0buf_r()
void tmp95c063_device::sc0buf_w(uint8_t data)
{
// Fake finish sending data
- m_int_reg[TMP95C063_INTES0] |= 0x80;
+ m_int_reg[INTES0] |= 0x80;
m_check_irqs = 1;
}
@@ -1270,7 +1070,7 @@ uint8_t tmp95c063_device::sc1buf_r()
void tmp95c063_device::sc1buf_w(uint8_t data)
{
// Fake finish sending data
- m_int_reg[TMP95C063_INTES1] |= 0x80;
+ m_int_reg[INTES1] |= 0x80;
m_check_irqs = 1;
}
@@ -1503,16 +1303,16 @@ void tmp95c063_device::execute_set_input(int input, int level)
{
/* Leave HALT state */
m_halted = 0;
- m_int_reg[TMP95C063_INTE0AD] |= 0x08;
+ m_int_reg[INTE0AD] |= 0x08;
}
}
else
{
/* Level detect */
if (level == ASSERT_LINE)
- m_int_reg[TMP95C063_INTE0AD] |= 0x08;
+ m_int_reg[INTE0AD] |= 0x08;
else
- m_int_reg[TMP95C063_INTE0AD] &= ~ 0x08;
+ m_int_reg[INTE0AD] &= ~ 0x08;
}
}
m_level[TLCS900_INT0] = level;
@@ -1521,11 +1321,11 @@ void tmp95c063_device::execute_set_input(int input, int level)
case TLCS900_INT1:
if (m_level[TLCS900_INT1] == CLEAR_LINE && level == ASSERT_LINE)
{
- m_int_reg[TMP95C063_INTE12] |= 0x08;
+ m_int_reg[INTE12] |= 0x08;
}
else if (m_level[TLCS900_INT1] == ASSERT_LINE && level == CLEAR_LINE)
{
- m_int_reg[TMP95C063_INTE12] &= ~0x08;
+ m_int_reg[INTE12] &= ~0x08;
}
m_level[TLCS900_INT1] = level;
break;
@@ -1533,11 +1333,11 @@ void tmp95c063_device::execute_set_input(int input, int level)
case TLCS900_INT2:
if (m_level[TLCS900_INT2] == CLEAR_LINE && level == ASSERT_LINE)
{
- m_int_reg[TMP95C063_INTE12] |= 0x80;
+ m_int_reg[INTE12] |= 0x80;
}
else if (m_level[TLCS900_INT2] == ASSERT_LINE && level == CLEAR_LINE)
{
- m_int_reg[TMP95C063_INTE12] &= ~0x80;
+ m_int_reg[INTE12] &= ~0x80;
}
m_level[TLCS900_INT2] = level;
break;
@@ -1545,11 +1345,11 @@ void tmp95c063_device::execute_set_input(int input, int level)
case TLCS900_INT3:
if (m_level[TLCS900_INT3] == CLEAR_LINE && level == ASSERT_LINE)
{
- m_int_reg[TMP95C063_INTE34] |= 0x08;
+ m_int_reg[INTE34] |= 0x08;
}
else if (m_level[TLCS900_INT3] == ASSERT_LINE && level == CLEAR_LINE)
{
- m_int_reg[TMP95C063_INTE34] &= ~0x08;
+ m_int_reg[INTE34] &= ~0x08;
}
m_level[TLCS900_INT3] = level;
break;
@@ -1559,7 +1359,7 @@ void tmp95c063_device::execute_set_input(int input, int level)
{
if ( m_level[TLCS900_INT4] == CLEAR_LINE && level == ASSERT_LINE )
{
- m_int_reg[TMP95C063_INTE34] |= 0x80;
+ m_int_reg[INTE34] |= 0x80;
}
}
m_level[TLCS900_INT4] = level;
@@ -1570,7 +1370,7 @@ void tmp95c063_device::execute_set_input(int input, int level)
{
if ( m_level[TLCS900_INT5] == CLEAR_LINE && level == ASSERT_LINE )
{
- m_int_reg[TMP95C063_INTE56] |= 0x08;
+ m_int_reg[INTE56] |= 0x08;
}
}
m_level[TLCS900_INT5] = level;
@@ -1579,11 +1379,11 @@ void tmp95c063_device::execute_set_input(int input, int level)
case TLCS900_INT6:
if (m_level[TLCS900_INT6] == CLEAR_LINE && level == ASSERT_LINE)
{
- m_int_reg[TMP95C063_INTE56] |= 0x80;
+ m_int_reg[INTE56] |= 0x80;
}
else if (m_level[TLCS900_INT6] == ASSERT_LINE && level == CLEAR_LINE)
{
- m_int_reg[TMP95C063_INTE56] &= ~0x80;
+ m_int_reg[INTE56] &= ~0x80;
}
m_level[TLCS900_INT6] = level;
break;
diff --git a/src/devices/cpu/tlcs900/tmp95c063.h b/src/devices/cpu/tlcs900/tmp95c063.h
index 4c9c05bb433..32033aad155 100644
--- a/src/devices/cpu/tlcs900/tmp95c063.h
+++ b/src/devices/cpu/tlcs900/tmp95c063.h
@@ -13,39 +13,54 @@ DECLARE_DEVICE_TYPE(TMP95C063, tmp95c063_device)
class tmp95c063_device : public tlcs900h_device
{
+ static constexpr uint8_t PORT_1 = 0; // 8 bit I/O. Shared with d8-d15
+ static constexpr uint8_t PORT_2 = 1; // 8 bit output only. Shared with a16-a23
+ static constexpr uint8_t PORT_5 = 2; // 6 bit I/O
+ static constexpr uint8_t PORT_6 = 3; // 8 bit I/O. Shared with cs1, cs3 & dram control
+ static constexpr uint8_t PORT_7 = 4; // 8 bit I/O
+ static constexpr uint8_t PORT_8 = 5; // 8 bit I/O. Shared with SCOUT, WAIT, NMI2, INT0-INT3
+ static constexpr uint8_t PORT_9 = 6; // 8 bit I/O. Shared with clock input and output for the 8-bit timers
+ static constexpr uint8_t PORT_A = 7; // 8 bit I/O. Shared with serial channels 0/1
+ static constexpr uint8_t PORT_B = 8; // 8 bit I/O. Shared with 16bit timers
+ static constexpr uint8_t PORT_C = 9; // 8 bit input only. Shared with analogue inputs
+ static constexpr uint8_t PORT_D = 10; // 5 bit I/O. Shared with INT8
+ static constexpr uint8_t PORT_E = 11; // 8 bit I/O.
+ static constexpr uint8_t NUM_PORTS = 12;
+
public:
// construction/destruction
tmp95c063_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
- auto port1_read() { return m_port1_read.bind(); }
- auto port1_write() { return m_port1_write.bind(); }
- auto port2_write() { return m_port2_write.bind(); }
- auto port5_read() { return m_port5_read.bind(); }
- auto port5_write() { return m_port5_write.bind(); }
- auto port6_read() { return m_port6_read.bind(); }
- auto port6_write() { return m_port6_write.bind(); }
- auto port7_read() { return m_port7_read.bind(); }
- auto port7_write() { return m_port7_write.bind(); }
- auto port8_read() { return m_port8_read.bind(); }
- auto port8_write() { return m_port8_write.bind(); }
- auto port9_read() { return m_port9_read.bind(); }
- auto port9_write() { return m_port9_write.bind(); }
- auto porta_read() { return m_porta_read.bind(); }
- auto porta_write() { return m_porta_write.bind(); }
- auto portb_read() { return m_portb_read.bind(); }
- auto portb_write() { return m_portb_write.bind(); }
- auto portc_read() { return m_portc_read.bind(); }
- auto portd_read() { return m_portd_read.bind(); }
- auto portd_write() { return m_portd_write.bind(); }
- auto porte_read() { return m_porte_read.bind(); }
- auto porte_write() { return m_porte_write.bind(); }
+ auto port1_read() { return m_port_read[PORT_1].bind(); }
+ auto port1_write() { return m_port_write[PORT_1].bind(); }
+ auto port2_write() { return m_port_write[PORT_2].bind(); }
+ auto port5_read() { return m_port_read[PORT_5].bind(); }
+ auto port5_write() { return m_port_write[PORT_5].bind(); }
+ auto port6_read() { return m_port_read[PORT_6].bind(); }
+ auto port6_write() { return m_port_write[PORT_6].bind(); }
+ auto port7_read() { return m_port_read[PORT_7].bind(); }
+ auto port7_write() { return m_port_write[PORT_7].bind(); }
+ auto port8_read() { return m_port_read[PORT_8].bind(); }
+ auto port8_write() { return m_port_write[PORT_8].bind(); }
+ auto port9_read() { return m_port_read[PORT_9].bind(); }
+ auto port9_write() { return m_port_write[PORT_9].bind(); }
+ auto porta_read() { return m_port_read[PORT_A].bind(); }
+ auto porta_write() { return m_port_write[PORT_A].bind(); }
+ auto portb_read() { return m_port_read[PORT_B].bind(); }
+ auto portb_write() { return m_port_write[PORT_B].bind(); }
+ auto portc_read() { return m_port_read[PORT_C].bind(); }
+ auto portd_read() { return m_port_read[PORT_D].bind(); }
+ auto portd_write() { return m_port_write[PORT_D].bind(); }
+ auto porte_read() { return m_port_read[PORT_E].bind(); }
+ auto porte_write() { return m_port_write[PORT_E].bind(); }
template <size_t Bit> auto an_read() { return m_an_read[Bit].bind(); }
protected:
- virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_config_complete() override ATTR_COLD;
+ virtual void device_resolve_objects() override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void execute_set_input(int inputnum, int state) override;
virtual void tlcs900_check_hdma() override;
@@ -54,46 +69,10 @@ protected:
virtual void tlcs900_handle_timers() override;
private:
- uint8_t p1_r();
- void p1_w(uint8_t data);
- void p1cr_w(uint8_t data);
- uint8_t p2_r();
- void p2_w(uint8_t data);
- void p2fc_w(uint8_t data);
- uint8_t p5_r();
- void p5_w(uint8_t data);
- void p5cr_w(uint8_t data);
- void p5fc_w(uint8_t data);
- uint8_t p6_r();
- void p6_w(uint8_t data);
- void p6fc_w(uint8_t data);
- uint8_t p7_r();
- void p7_w(uint8_t data);
- void p7cr_w(uint8_t data);
- void p7fc_w(uint8_t data);
- uint8_t p8_r();
- void p8_w(uint8_t data);
- void p8cr_w(uint8_t data);
- void p8fc_w(uint8_t data);
- uint8_t p9_r();
- void p9_w(uint8_t data);
- void p9cr_w(uint8_t data);
- void p9fc_w(uint8_t data);
- uint8_t pa_r();
- void pa_w(uint8_t data);
- void pacr_w(uint8_t data);
- void pafc_w(uint8_t data);
- uint8_t pb_r();
- void pb_w(uint8_t data);
- void pbcr_w(uint8_t data);
- void pbfc_w(uint8_t data);
- uint8_t pc_r();
- uint8_t pd_r();
- void pd_w(uint8_t data);
- void pdcr_w(uint8_t data);
- uint8_t pe_r();
- void pe_w(uint8_t data);
- void pecr_w(uint8_t data);
+ template <uint8_t> uint8_t port_r();
+ template <uint8_t> void port_w(uint8_t data);
+ template <uint8_t> void port_cr_w(uint8_t data);
+ template <uint8_t> void port_fc_w(uint8_t data);
uint8_t t8run_r();
void t8run_w(uint8_t data);
void treg01_w(offs_t offset, uint8_t data);
@@ -180,61 +159,17 @@ private:
void dadrv_w(uint8_t data);
void dareg_w(offs_t offset, uint8_t data);
- void internal_mem(address_map &map);
-
- // Port 1: 8 bit I/O. Shared with d8-d15
- devcb_read8 m_port1_read;
- devcb_write8 m_port1_write;
-
- // Port 2: 8 bit output only. Shared with a16-a23
- devcb_write8 m_port2_write;
-
- // Port 5: 6 bit I/O
- devcb_read8 m_port5_read;
- devcb_write8 m_port5_write;
-
- // Port 6: 8 bit I/O. Shared with cs1, cs3 & dram control
- devcb_read8 m_port6_read;
- devcb_write8 m_port6_write;
-
- // Port 7: 8 bit I/O
- devcb_read8 m_port7_read;
- devcb_write8 m_port7_write;
-
- // Port 8: 8 bit I/O. Shared with SCOUT, WAIT, NMI2, INT0-INT3
- devcb_read8 m_port8_read;
- devcb_write8 m_port8_write;
-
- // Port 9: 8 bit I/O. Shared with clock input and output for the 8-bit timers
- devcb_read8 m_port9_read;
- devcb_write8 m_port9_write;
-
- // Port A: 8 bit I/O. Shared with serial channels 0/1
- devcb_read8 m_porta_read;
- devcb_write8 m_porta_write;
-
- // Port B: 8 bit I/O. Shared with 16bit timers
- devcb_read8 m_portb_read;
- devcb_write8 m_portb_write;
-
- // Port C: 8 bit input only. Shared with analogue inputs
- devcb_read8 m_portc_read;
-
- // Port D: 5 bit I/O. Shared with int8_t
- devcb_read8 m_portd_read;
- devcb_write8 m_portd_write;
-
- // Port E: 8 bit I/O.
- devcb_read8 m_porte_read;
- devcb_write8 m_porte_write;
+ void internal_mem(address_map &map) ATTR_COLD;
// analogue inputs, sampled at 10 bits
devcb_read16::array<8> m_an_read;
- // I/O Port Control
- uint8_t m_port_latch[0xf];
- uint8_t m_port_control[0xf];
- uint8_t m_port_function[0xf];
+ // I/O Ports
+ devcb_read8::array<NUM_PORTS> m_port_read;
+ devcb_write8::array<NUM_PORTS> m_port_write;
+ uint8_t m_port_latch[NUM_PORTS];
+ uint8_t m_port_control[NUM_PORTS];
+ uint8_t m_port_function[NUM_PORTS];
// Timer Control
uint8_t m_t8run;
diff --git a/src/devices/cpu/tlcs900/tmp96c141.h b/src/devices/cpu/tlcs900/tmp96c141.h
index 973693a201b..4710820f71e 100644
--- a/src/devices/cpu/tlcs900/tmp96c141.h
+++ b/src/devices/cpu/tlcs900/tmp96c141.h
@@ -76,8 +76,8 @@ public:
protected:
// device-level overrides
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_set_input(int inputnum, int state) override;
@@ -89,7 +89,7 @@ protected:
virtual void tlcs900_handle_timers() override;
private:
- void internal_mem(address_map &map);
+ void internal_mem(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/tms1000/smc1102.h b/src/devices/cpu/tms1000/smc1102.h
index 648d637544d..b94f4b7807f 100644
--- a/src/devices/cpu/tms1000/smc1102.h
+++ b/src/devices/cpu/tms1000/smc1102.h
@@ -52,11 +52,10 @@ protected:
smc1102_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_add_mconfig(machine_config &config) override { }
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/tms1000/tms0270.h b/src/devices/cpu/tms1000/tms0270.h
index e6f3f89197e..f47b4bb3c2b 100644
--- a/src/devices/cpu/tms1000/tms0270.h
+++ b/src/devices/cpu/tms1000/tms0270.h
@@ -21,10 +21,10 @@ public:
protected:
// overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void write_o_reg(u8 index) override { tms1k_base_device::write_o_reg(index); }
virtual u8 read_k_input() override;
diff --git a/src/devices/cpu/tms1000/tms0970.h b/src/devices/cpu/tms1000/tms0970.h
index 583a9480e91..901f092b88e 100644
--- a/src/devices/cpu/tms1000/tms0970.h
+++ b/src/devices/cpu/tms1000/tms0970.h
@@ -23,8 +23,8 @@ protected:
tms0970_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void write_o_reg(u8 index) override;
@@ -40,7 +40,7 @@ public:
protected:
// overrides
virtual void device_reset() override { tms1000_cpu_device::device_reset(); }
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void op_rstr() override { } // assume it has no RSTR or CLO
virtual void op_clo() override { } // "
diff --git a/src/devices/cpu/tms1000/tms0980.h b/src/devices/cpu/tms1000/tms0980.h
index b2d8b4c106d..87ab670af28 100644
--- a/src/devices/cpu/tms1000/tms0980.h
+++ b/src/devices/cpu/tms1000/tms0980.h
@@ -46,14 +46,14 @@ public:
protected:
tms0980_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
- void ram_144x4(address_map &map);
+ void ram_144x4(address_map &map) ATTR_COLD;
// overrides
virtual u32 decode_fixed(offs_t offset);
virtual u32 decode_micro(offs_t offset) override;
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -78,7 +78,7 @@ public:
protected:
// overrides
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void write_o_reg(u8 index) override { tms1k_base_device::write_o_reg(index); }
diff --git a/src/devices/cpu/tms1000/tms1000.h b/src/devices/cpu/tms1000/tms1000.h
index c850b98e6d0..3faeb98d96e 100644
--- a/src/devices/cpu/tms1000/tms1000.h
+++ b/src/devices/cpu/tms1000/tms1000.h
@@ -68,12 +68,12 @@ public:
protected:
tms1000_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
- void rom_9bitm(address_map &map);
- void ram_32x4(address_map &map);
+ void rom_9bitm(address_map &map) ATTR_COLD;
+ void ram_32x4(address_map &map) ATTR_COLD;
// overrides
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual u32 decode_micro(offs_t offset);
@@ -100,7 +100,7 @@ public:
protected:
tms1070_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void write_o_output(u16 data) override { tms1000_cpu_device::write_o_output(bitswap<10>(data,0,1,9,8,7,6,5,4,3,2)); }
};
diff --git a/src/devices/cpu/tms1000/tms1000c.h b/src/devices/cpu/tms1000/tms1000c.h
index b698a575615..35539a257ed 100644
--- a/src/devices/cpu/tms1000/tms1000c.h
+++ b/src/devices/cpu/tms1000/tms1000c.h
@@ -21,7 +21,7 @@ public:
protected:
// overrides
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual u32 decode_micro(offs_t offset) override;
};
diff --git a/src/devices/cpu/tms1000/tms1100.h b/src/devices/cpu/tms1000/tms1100.h
index c421a562d58..534f436275a 100644
--- a/src/devices/cpu/tms1000/tms1100.h
+++ b/src/devices/cpu/tms1000/tms1100.h
@@ -69,8 +69,8 @@ protected:
tms1100_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/tms1000/tms1400.h b/src/devices/cpu/tms1000/tms1400.h
index acac9ea4ca1..47e5a123624 100644
--- a/src/devices/cpu/tms1000/tms1400.h
+++ b/src/devices/cpu/tms1000/tms1400.h
@@ -47,8 +47,8 @@ protected:
tms1400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h
index 01437ba9d4d..1d749ebd1e7 100644
--- a/src/devices/cpu/tms1000/tms1k_base.h
+++ b/src/devices/cpu/tms1000/tms1k_base.h
@@ -55,8 +55,8 @@ protected:
tms1k_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u32 execute_min_cycles() const noexcept override { return 1; }
@@ -138,12 +138,12 @@ protected:
F_EXTRA = (1ULL << 28), // custom opcodes
};
- void rom_10bit(address_map &map);
- void rom_11bit(address_map &map);
- void rom_12bit(address_map &map);
- void ram_6bit(address_map &map);
- void ram_7bit(address_map &map);
- void ram_8bit(address_map &map);
+ void rom_10bit(address_map &map) ATTR_COLD;
+ void rom_11bit(address_map &map) ATTR_COLD;
+ void rom_12bit(address_map &map) ATTR_COLD;
+ void ram_6bit(address_map &map) ATTR_COLD;
+ void ram_7bit(address_map &map) ATTR_COLD;
+ void ram_8bit(address_map &map) ATTR_COLD;
void next_pc();
diff --git a/src/devices/cpu/tms1000/tms1k_dasm.cpp b/src/devices/cpu/tms1000/tms1k_dasm.cpp
index 3aeb2d2bac9..745907f9377 100644
--- a/src/devices/cpu/tms1000/tms1k_dasm.cpp
+++ b/src/devices/cpu/tms1000/tms1k_dasm.cpp
@@ -84,6 +84,22 @@ offs_t tms1000_base_disassembler::pc_real_to_linear(offs_t pc) const
// common lookup tables
+enum tms1000_base_disassembler::e_mnemonics : unsigned
+{
+ mILL = 0,
+ mAC0AC, mAC1AC, mACACC, mACNAA, mALEC, mALEM, mAMAAC, mBRANCH,
+ mCALL, mCCLA, mCLA, mCLO, mCOMC, mCOMX, mCOMX8, mCPAIZ, mCTMDYN,
+ mDAN, mDMAN, mDMEA, mDNAA, mDYN, mHALT,
+ mIA, mIMAC, mINTDIS, mINTEN, mINTRTN, mIYC,
+ mKNEZ, mLDP, mLDX2, mLDX3, mLDX4, mMNEA, mMNEZ,
+ mNDMEA, mOFF, mRBIT, mREAC, mRETN, mRSTR,
+ mSAL, mSAMAN, mSBIT, mSBL, mSEAC, mSELIN, mSETR,
+ mTAC, mTADM, mTAM, mTAMACS, mTAMDYN, mTAMIY, mTAMIYC, mTAMZA,
+ mTASR, mTAX, mTAY, mTBIT, mTCA, mTCMIY, mTCY, mTDO, mTKA,
+ mTKM, mTMA, mTMSET, mTMY, mTPC, mTRA, mTSG, mTXA, mTYA,
+ mXDA, mXMA, mYMCY, mYNEA, mYNEC
+};
+
const char *const tms1000_base_disassembler::s_mnemonic[] =
{
"?",
diff --git a/src/devices/cpu/tms1000/tms1k_dasm.h b/src/devices/cpu/tms1000/tms1k_dasm.h
index f2aa2aa8f96..da2ab18b488 100644
--- a/src/devices/cpu/tms1000/tms1k_dasm.h
+++ b/src/devices/cpu/tms1000/tms1k_dasm.h
@@ -25,22 +25,7 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
protected:
- enum e_mnemonics
- {
- mILL = 0,
- mAC0AC, mAC1AC, mACACC, mACNAA, mALEC, mALEM, mAMAAC, mBRANCH,
- mCALL, mCCLA, mCLA, mCLO, mCOMC, mCOMX, mCOMX8, mCPAIZ, mCTMDYN,
- mDAN, mDMAN, mDMEA, mDNAA, mDYN, mHALT,
- mIA, mIMAC, mINTDIS, mINTEN, mINTRTN, mIYC,
- mKNEZ, mLDP, mLDX2, mLDX3, mLDX4, mMNEA, mMNEZ,
- mNDMEA, mOFF, mRBIT, mREAC, mRETN, mRSTR,
- mSAL, mSAMAN, mSBIT, mSBL, mSEAC, mSELIN, mSETR,
- mTAC, mTADM, mTAM, mTAMACS, mTAMDYN, mTAMIY, mTAMIYC, mTAMZA,
- mTASR, mTAX, mTAY, mTBIT, mTCA, mTCMIY, mTCY, mTDO, mTKA,
- mTKM, mTMA, mTMSET, mTMY, mTPC, mTRA, mTSG, mTXA, mTYA,
- mXDA, mXMA, mYMCY, mYNEA, mYNEC
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonic[];
static const u32 s_flags[];
static const u8 s_bits[];
diff --git a/src/devices/cpu/tms1000/tms2100.h b/src/devices/cpu/tms1000/tms2100.h
index c72edc4952f..886ea90684a 100644
--- a/src/devices/cpu/tms1000/tms2100.h
+++ b/src/devices/cpu/tms1000/tms2100.h
@@ -75,12 +75,11 @@ protected:
tms2100_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void device_clock_changed() override { reset_prescaler(); }
- virtual u32 execute_input_lines() const noexcept override { return 2; }
virtual void execute_set_input(int line, int state) override;
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == TMS2100_INPUT_LINE_INT || inputnum == TMS2100_INPUT_LINE_EC1; }
diff --git a/src/devices/cpu/tms1000/tms2400.h b/src/devices/cpu/tms1000/tms2400.h
index 25692d3207e..91be18e6b5c 100644
--- a/src/devices/cpu/tms1000/tms2400.h
+++ b/src/devices/cpu/tms1000/tms2400.h
@@ -23,7 +23,7 @@ protected:
tms2400_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 o_pins, u8 r_pins, u8 pc_bits, u8 byte_bits, u8 x_bits, u8 stack_levels, int rom_width, address_map_constructor rom_map, int ram_width, address_map_constructor ram_map);
// overrides
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/tms1000/tp0320.h b/src/devices/cpu/tms1000/tp0320.h
index c972e009b1b..c08676fb286 100644
--- a/src/devices/cpu/tms1000/tp0320.h
+++ b/src/devices/cpu/tms1000/tp0320.h
@@ -20,15 +20,15 @@ public:
tp0320_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
- void ram_192x4(address_map &map);
+ void ram_192x4(address_map &map) ATTR_COLD;
// overrides
virtual u32 decode_fixed(offs_t offset) override { return 0; } // not yet
virtual u32 decode_micro(offs_t offset) override;
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
};
diff --git a/src/devices/cpu/tms32010/32010dsm.h b/src/devices/cpu/tms32010/32010dsm.h
index d2b93d5f5a4..bbbd7876fa5 100644
--- a/src/devices/cpu/tms32010/32010dsm.h
+++ b/src/devices/cpu/tms32010/32010dsm.h
@@ -24,8 +24,8 @@
* *
\**************************************************************************/
-#ifndef MAME_CPU_TMS32010_DIS32010_H
-#define MAME_CPU_TMS32010_DIS32010_H
+#ifndef MAME_CPU_TMS32010_32010DSM_H
+#define MAME_CPU_TMS32010_32010DSM_H
#pragma once
@@ -56,4 +56,4 @@ private:
std::vector<TMS32010Opcode> Op;
};
-#endif
+#endif // MAME_CPU_TMS32010_32010DSM_H
diff --git a/src/devices/cpu/tms32010/tms32010.cpp b/src/devices/cpu/tms32010/tms32010.cpp
index c1067de5486..bd2d0271054 100644
--- a/src/devices/cpu/tms32010/tms32010.cpp
+++ b/src/devices/cpu/tms32010/tms32010.cpp
@@ -1,60 +1,18 @@
// license:BSD-3-Clause
// copyright-holders:Tony La Porta
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * *
- * Notes : The term 'DMA' within this document, is in reference *
- * to Direct Memory Addressing, and NOT the usual term *
- * of Direct Memory Access. *
- * This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- * *
- * *
- * **** Change Log **** *
- * *
- * TLP (13-Jul-2002) *
- * - Added Save-State support *
- * - Converted the pending_irq flag to INTF (a real flag in this device) *
- * - Fixed the ignore Interrupt Request for previous critical *
- * instructions requiring an extra instruction to be processed. For *
- * this reason, instant IRQ servicing cannot be supported here, so *
- * INTF needs to be polled within the instruction execution loop *
- * - Removed IRQ callback (IRQ ACK not supported on this device) *
- * - A pending IRQ will remain pending until it's serviced. De-asserting *
- * the IRQ Pin does not remove a pending IRQ state *
- * - BIO is no longer treated as an IRQ line. It's polled when required. *
- * This is the true behaviour of the device *
- * - Removed the Clear OV flag from overflow instructions. Overflow *
- * instructions can only set the flag. Flag test instructions clear it *
- * - Fixed the ABST, SUBC and SUBH instructions *
- * - Fixed the signedness in many equation based instructions *
- * - Added the missing Previous PC to the get_register function *
- * - Changed Cycle timings to include clock ticks *
- * - Converted some registers from ints to pairs for much cleaner code *
- * TLP (20-Jul-2002) Ver 1.10 *
- * - Fixed the dissasembly from the debugger *
- * - Changed all references from TMS320C10 to TMS32010 *
- * ASG (24-Sep-2002) Ver 1.20 *
- * - Fixed overflow handling *
- * - Simplified logic in a few locations *
- * TLP (22-Feb-2004) Ver 1.21 *
- * - Overflow for ADDH only affects upper 16bits (was modifying 32 bits) *
- * - Internal Data Memory map is assigned here now *
- * - Cycle counts for invalid opcodes 7F1E and 7F1F are now 0 *
- * RK (23-Nov-2006) Ver 1.22 *
- * - Fixed state of the Overflow Flag on reset *
- * - Fixed the SUBC instruction which was incorrectly zeroing the divisor *
- * TLP (13-Jul-2010) Ver 1.30 *
- * - LST instruction was incorrectly setting an Indirect Addressing *
- * feature when Direct Addressing mode was selected *
- * - Added TMS32015 and TMS32016 variants *
- * TLP (27-Jul-2010) Ver 1.31 *
- * - Corrected cycle timing for conditional branch instructions *
- * *
- \**************************************************************************/
+/**************************************************************************
+
+ Texas Instruments TMS32010 DSP Emulator
+
+ Copyright Tony La Porta
+
+ Notes:
+ * The term 'DMA' within this document, is in reference to Direct
+ Memory Addressing, and NOT the usual term of Direct Memory Access.
+ * This is a word based microcontroller, with addressing architecture
+ based on the Harvard addressing scheme.
+
+**************************************************************************/
#include "emu.h"
@@ -82,7 +40,8 @@ DEFINE_DEVICE_TYPE(TMS32016, tms32016_device, "tms32016", "Texas Instruments TMS
* TMS32010 Internal Memory Map
****************************************************************************/
-void tms32010_device::tms32010_ram(address_map &map)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::tms32010_ram(address_map &map)
{
map(0x00, 0x7f).ram(); /* Page 0 */
map(0x80, 0x8f).ram(); /* Page 1 */
@@ -92,42 +51,45 @@ void tms32010_device::tms32010_ram(address_map &map)
* TMS32015/6 Internal Memory Map
****************************************************************************/
-void tms32010_device::tms32015_ram(address_map &map)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::tms32015_ram(address_map &map)
{
map(0x00, 0x7f).ram(); /* Page 0 */
map(0x80, 0xff).ram(); /* Page 1 */
}
-tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : tms32010_device(mconfig, TMS32010, tag, owner, clock, address_map_constructor(FUNC(tms32010_device::tms32010_ram), this), 0x0fff)
-{
-}
-
-
-tms32010_device::tms32010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor data_map, int addr_mask)
+template <int HighBits>
+tms3201x_base_device<HighBits>::tms3201x_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor data_map)
: cpu_device(mconfig, type, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_BIG, 16, 12, -1)
+ , m_program_config("program", ENDIANNESS_BIG, 16, HighBits, -1)
, m_data_config("data", ENDIANNESS_BIG, 16, 8, -1, data_map)
, m_io_config("io", ENDIANNESS_BIG, 16, 4, -1)
, m_bio_in(*this, 0)
- , m_addr_mask(addr_mask)
+ , m_addr_mask(util::make_bitmask<uint32_t>(HighBits))
+{
+}
+
+
+tms32010_device::tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : tms3201x_base_device(mconfig, TMS32010, tag, owner, clock, address_map_constructor(FUNC(tms32010_device::tms32010_ram), this))
{
}
tms32015_device::tms32015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : tms32010_device(mconfig, TMS32015, tag, owner, clock, address_map_constructor(FUNC(tms32015_device::tms32015_ram), this), 0x0fff)
+ : tms3201x_base_device(mconfig, TMS32015, tag, owner, clock, address_map_constructor(FUNC(tms32015_device::tms32015_ram), this))
{
}
tms32016_device::tms32016_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : tms32010_device(mconfig, TMS32016, tag, owner, clock, address_map_constructor(FUNC(tms32016_device::tms32015_ram), this), 0xffff)
+ : tms3201x_base_device(mconfig, TMS32016, tag, owner, clock, address_map_constructor(FUNC(tms32016_device::tms32015_ram), this))
{
}
-device_memory_interface::space_config_vector tms32010_device::memory_space_config() const
+template <int HighBits>
+device_memory_interface::space_config_vector tms3201x_base_device<HighBits>::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
@@ -136,7 +98,8 @@ device_memory_interface::space_config_vector tms32010_device::memory_space_confi
};
}
-std::unique_ptr<util::disasm_interface> tms32010_device::create_disassembler()
+template <int HighBits>
+std::unique_ptr<util::disasm_interface> tms3201x_base_device<HighBits>::create_disassembler()
{
return std::make_unique<tms32010_disassembler>();
}
@@ -229,28 +192,33 @@ std::unique_ptr<util::disasm_interface> tms32010_device::create_disassembler()
* Shortcuts
************************************************************************/
-void tms32010_device::CLR(uint16_t flag) { m_STR &= ~flag; m_STR |= 0x1efe; }
-void tms32010_device::SET_FLAG(uint16_t flag) { m_STR |= flag; m_STR |= 0x1efe; }
+template <int HighBits>
+void tms3201x_base_device<HighBits>::CLR(uint16_t flag) { m_STR &= ~flag; m_STR |= 0x1efe; }
+template <int HighBits>
+void tms3201x_base_device<HighBits>::SET_FLAG(uint16_t flag) { m_STR |= flag; m_STR |= 0x1efe; }
-void tms32010_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::CALCULATE_ADD_OVERFLOW(int32_t addval)
{
- if ((int32_t)(~(m_oldacc.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
+ if (int32_t(~(m_oldacc.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-void tms32010_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::CALCULATE_SUB_OVERFLOW(int32_t subval)
{
- if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
+ if (int32_t((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
}
}
-uint16_t tms32010_device::POP_STACK()
+template <int HighBits>
+uint16_t tms3201x_base_device<HighBits>::POP_STACK()
{
uint16_t data = m_STACK[3];
m_STACK[3] = m_STACK[2];
@@ -258,7 +226,8 @@ uint16_t tms32010_device::POP_STACK()
m_STACK[1] = m_STACK[0];
return (data & m_addr_mask);
}
-void tms32010_device::PUSH_STACK(uint16_t data)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::PUSH_STACK(uint16_t data)
{
m_STACK[0] = m_STACK[1];
m_STACK[1] = m_STACK[2];
@@ -266,7 +235,8 @@ void tms32010_device::PUSH_STACK(uint16_t data)
m_STACK[3] = (data & m_addr_mask);
}
-void tms32010_device::UPDATE_AR()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::UPDATE_AR()
{
if (m_opcode.b.l & 0x30) {
uint16_t tmpAR = m_AR[ARP];
@@ -275,7 +245,8 @@ void tms32010_device::UPDATE_AR()
m_AR[ARP] = (m_AR[ARP] & 0xfe00) | (tmpAR & 0x01ff);
}
}
-void tms32010_device::UPDATE_ARP()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::UPDATE_ARP()
{
if (~m_opcode.b.l & 0x08) {
if (m_opcode.b.l & 0x01) SET_FLAG(ARP_REG);
@@ -284,7 +255,8 @@ void tms32010_device::UPDATE_ARP()
}
-void tms32010_device::getdata(uint8_t shift,uint8_t signext)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::getdata(uint8_t shift,uint8_t signext)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -300,7 +272,8 @@ void tms32010_device::getdata(uint8_t shift,uint8_t signext)
}
}
-void tms32010_device::putdata(uint16_t data)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::putdata(uint16_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -313,7 +286,8 @@ void tms32010_device::putdata(uint16_t data)
}
M_WRTRAM(m_memaccess,data);
}
-void tms32010_device::putdata_sar(uint8_t data)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::putdata_sar(uint8_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -326,7 +300,8 @@ void tms32010_device::putdata_sar(uint8_t data)
}
M_WRTRAM(m_memaccess,m_AR[data]);
}
-void tms32010_device::putdata_sst(uint16_t data)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::putdata_sst(uint16_t data)
{
if (m_opcode.b.l & 0x80)
m_memaccess = IND;
@@ -348,17 +323,23 @@ void tms32010_device::putdata_sst(uint16_t data)
/* This following function is here to fill in the void for */
/* the opcode call function. This function is never called. */
-void tms32010_device::opcodes_7F() { fatalerror("Should never get here!\n"); }
+template <int HighBits>
+void tms3201x_base_device<HighBits>::opcodes_7F()
+{
+ fatalerror("Should never get here!\n");
+}
-void tms32010_device::illegal()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::illegal()
{
logerror("TMS32010: PC=%04x, Illegal opcode = %04x\n", (m_PC-1), m_opcode.w.l);
}
-void tms32010_device::abst()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::abst()
{
- if ( (int32_t)(m_ACC.d) < 0 ) {
+ if (int32_t(m_ACC.d) < 0) {
m_ACC.d = -m_ACC.d;
if (OVM && (m_ACC.d == 0x80000000)) m_ACC.d-- ;
}
@@ -369,51 +350,60 @@ void tms32010_device::abst()
*** while newer generations of this type of chip supported it. The ***********
*** manual may be wrong wrong (apart from other errors the manual has). ******
-void tms32010_device::add_sh() { getdata(m_opcode.b.h,1); m_ACC.d += m_ALU.d; }
-void tms32010_device::addh() { getdata(0,0); m_ACC.d += (m_ALU.d << 16); }
+template <int HighBits>
+void tms3201x_base_device<HighBits>::add_sh() { getdata(m_opcode.b.h,1); m_ACC.d += m_ALU.d; }
+template <int HighBits>
+void tms3201x_base_device<HighBits>::addh() { getdata(0,0); m_ACC.d += (m_ALU.d << 16); }
***/
-void tms32010_device::add_sh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::add_sh()
{
m_oldacc.d = m_ACC.d;
getdata((m_opcode.b.h & 0xf),1);
m_ACC.d += m_ALU.d;
CALCULATE_ADD_OVERFLOW(m_ALU.d);
}
-void tms32010_device::addh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::addh()
{
m_oldacc.d = m_ACC.d;
getdata(0,0);
m_ACC.w.h += m_ALU.w.l;
- if ((int16_t)(~(m_oldacc.w.h ^ m_ALU.w.h) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
+ if (int16_t(~(m_oldacc.w.h ^ m_ALU.w.h) & (m_oldacc.w.h ^ m_ACC.w.h)) < 0) {
SET_FLAG(OV_FLAG);
if (OVM)
m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
-void tms32010_device::adds()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::adds()
{
m_oldacc.d = m_ACC.d;
getdata(0,0);
m_ACC.d += m_ALU.d;
CALCULATE_ADD_OVERFLOW(m_ALU.d);
}
-void tms32010_device::and_()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::and_()
{
getdata(0,0);
m_ACC.d &= m_ALU.d;
}
-void tms32010_device::apac()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::apac()
{
m_oldacc.d = m_ACC.d;
m_ACC.d += m_Preg.d;
CALCULATE_ADD_OVERFLOW(m_Preg.d);
}
-void tms32010_device::br()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::br()
{
m_PC = M_RDOP_ARG(m_PC);
}
-void tms32010_device::banz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::banz()
{
if (m_AR[ARP] & 0x01ff) {
m_PC = M_RDOP_ARG(m_PC);
@@ -425,25 +415,28 @@ void tms32010_device::banz()
m_ALU.w.l-- ;
m_AR[ARP] = (m_AR[ARP] & 0xfe00) | (m_ALU.w.l & 0x01ff);
}
-void tms32010_device::bgez()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bgez()
{
- if ( (int32_t)(m_ACC.d) >= 0 ) {
+ if (int32_t(m_ACC.d) >= 0) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
else
m_PC++ ;
}
-void tms32010_device::bgz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bgz()
{
- if ( (int32_t)(m_ACC.d) > 0 ) {
+ if (int32_t(m_ACC.d) > 0) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
else
m_PC++ ;
}
-void tms32010_device::bioz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bioz()
{
if (m_bio_in() != CLEAR_LINE) {
m_PC = M_RDOP_ARG(m_PC);
@@ -452,25 +445,28 @@ void tms32010_device::bioz()
else
m_PC++ ;
}
-void tms32010_device::blez()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::blez()
{
- if ( (int32_t)(m_ACC.d) <= 0 ) {
+ if (int32_t(m_ACC.d) <= 0) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
else
m_PC++ ;
}
-void tms32010_device::blz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::blz()
{
- if ( (int32_t)(m_ACC.d) < 0 ) {
+ if (int32_t(m_ACC.d) < 0) {
m_PC = M_RDOP_ARG(m_PC);
m_icount -= add_branch_cycle();
}
else
m_PC++ ;
}
-void tms32010_device::bnz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bnz()
{
if (m_ACC.d != 0) {
m_PC = M_RDOP_ARG(m_PC);
@@ -479,7 +475,8 @@ void tms32010_device::bnz()
else
m_PC++ ;
}
-void tms32010_device::bv()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bv()
{
if (OV) {
CLR(OV_FLAG);
@@ -489,7 +486,8 @@ void tms32010_device::bv()
else
m_PC++ ;
}
-void tms32010_device::bz()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::bz()
{
if (m_ACC.d == 0) {
m_PC = M_RDOP_ARG(m_PC);
@@ -498,70 +496,84 @@ void tms32010_device::bz()
else
m_PC++ ;
}
-void tms32010_device::cala()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::cala()
{
PUSH_STACK(m_PC);
m_PC = m_ACC.w.l & m_addr_mask;
}
-void tms32010_device::call()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::call()
{
m_PC++ ;
PUSH_STACK(m_PC);
m_PC = M_RDOP_ARG((m_PC - 1));
}
-void tms32010_device::dint()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::dint()
{
SET_FLAG(INTM_FLAG);
}
-void tms32010_device::dmov()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::dmov()
{
getdata(0,0);
M_WRTRAM((m_memaccess + 1),m_ALU.w.l);
}
-void tms32010_device::eint()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::eint()
{
CLR(INTM_FLAG);
}
-void tms32010_device::in_p()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::in_p()
{
m_ALU.w.l = P_IN(m_opcode.b.h & 7);
putdata(m_ALU.w.l);
}
-void tms32010_device::lac_sh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lac_sh()
{
getdata((m_opcode.b.h & 0x0f),1);
m_ACC.d = m_ALU.d;
}
-void tms32010_device::lack()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lack()
{
m_ACC.d = m_opcode.b.l;
}
-void tms32010_device::lar_ar0()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lar_ar0()
{
getdata(0,0);
m_AR[0] = m_ALU.w.l;
}
-void tms32010_device::lar_ar1()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lar_ar1()
{
getdata(0,0);
m_AR[1] = m_ALU.w.l;
}
-void tms32010_device::lark_ar0()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lark_ar0()
{
m_AR[0] = m_opcode.b.l;
}
-void tms32010_device::lark_ar1()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lark_ar1()
{
m_AR[1] = m_opcode.b.l;
}
-void tms32010_device::larp_mar()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::larp_mar()
{
if (m_opcode.b.l & 0x80) {
UPDATE_AR();
UPDATE_ARP();
}
}
-void tms32010_device::ldp()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::ldp()
{
getdata(0,0);
if (m_ALU.d & 1)
@@ -569,14 +581,16 @@ void tms32010_device::ldp()
else
CLR(DP_REG);
}
-void tms32010_device::ldpk()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::ldpk()
{
if (m_opcode.b.l & 1)
SET_FLAG(DP_REG);
else
CLR(DP_REG);
}
-void tms32010_device::lst()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lst()
{
if (m_opcode.b.l & 0x80) {
m_opcode.b.l |= 0x08; /* In Indirect Addressing mode, next ARP is not supported here so mask it */
@@ -587,12 +601,14 @@ void tms32010_device::lst()
m_STR |= m_ALU.w.l;
m_STR |= 0x1efe;
}
-void tms32010_device::lt()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lt()
{
getdata(0,0);
m_Treg = m_ALU.w.l;
}
-void tms32010_device::lta()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::lta()
{
m_oldacc.d = m_ACC.d;
getdata(0,0);
@@ -600,7 +616,8 @@ void tms32010_device::lta()
m_ACC.d += m_Preg.d;
CALCULATE_ADD_OVERFLOW(m_Preg.d);
}
-void tms32010_device::ltd()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::ltd()
{
m_oldacc.d = m_ACC.d;
getdata(0,0);
@@ -609,143 +626,170 @@ void tms32010_device::ltd()
m_ACC.d += m_Preg.d;
CALCULATE_ADD_OVERFLOW(m_Preg.d);
}
-void tms32010_device::mpy()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::mpy()
{
getdata(0,0);
m_Preg.d = (int16_t)m_ALU.w.l * (int16_t)m_Treg;
if (m_Preg.d == 0x40000000) m_Preg.d = 0xc0000000;
}
-void tms32010_device::mpyk()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::mpyk()
{
- m_Preg.d = (int16_t)m_Treg * ((int16_t)(m_opcode.w.l << 3) >> 3);
+ m_Preg.d = (int16_t)m_Treg * (int16_t(m_opcode.w.l << 3) >> 3);
}
-void tms32010_device::nop()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::nop()
{
/* Nothing to do */
}
-void tms32010_device::or_()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::or_()
{
getdata(0,0);
m_ACC.w.l |= m_ALU.w.l;
}
-void tms32010_device::out_p()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::out_p()
{
getdata(0,0);
P_OUT( (m_opcode.b.h & 7), m_ALU.w.l );
}
-void tms32010_device::pac()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::pac()
{
m_ACC.d = m_Preg.d;
}
-void tms32010_device::pop()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::pop()
{
m_ACC.w.l = POP_STACK();
m_ACC.w.h = 0x0000;
}
-void tms32010_device::push()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::push()
{
PUSH_STACK(m_ACC.w.l);
}
-void tms32010_device::ret()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::ret()
{
m_PC = POP_STACK();
}
-void tms32010_device::rovm()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::rovm()
{
CLR(OVM_FLAG);
}
-void tms32010_device::sach_sh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sach_sh()
{
m_ALU.d = (m_ACC.d << (m_opcode.b.h & 7));
putdata(m_ALU.w.h);
}
-void tms32010_device::sacl()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sacl()
{
putdata(m_ACC.w.l);
}
-void tms32010_device::sar_ar0()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sar_ar0()
{
putdata_sar(0);
}
-void tms32010_device::sar_ar1()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sar_ar1()
{
putdata_sar(1);
}
-void tms32010_device::sovm()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sovm()
{
SET_FLAG(OVM_FLAG);
}
-void tms32010_device::spac()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::spac()
{
m_oldacc.d = m_ACC.d;
m_ACC.d -= m_Preg.d;
CALCULATE_SUB_OVERFLOW(m_Preg.d);
}
-void tms32010_device::sst()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sst()
{
putdata_sst(m_STR);
}
-void tms32010_device::sub_sh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::sub_sh()
{
m_oldacc.d = m_ACC.d;
getdata((m_opcode.b.h & 0x0f),1);
m_ACC.d -= m_ALU.d;
CALCULATE_SUB_OVERFLOW(m_ALU.d);
}
-void tms32010_device::subc()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::subc()
{
m_oldacc.d = m_ACC.d;
getdata(15,0);
m_ALU.d = (int32_t) m_ACC.d - m_ALU.d;
- if ((int32_t)((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0)
+ if (int32_t((m_oldacc.d ^ m_ALU.d) & (m_oldacc.d ^ m_ACC.d)) < 0)
SET_FLAG(OV_FLAG);
- if ( (int32_t)(m_ALU.d) >= 0 )
- m_ACC.d = ((m_ALU.d << 1) + 1);
+ if (int32_t(m_ALU.d) >= 0)
+ m_ACC.d = (m_ALU.d << 1) + 1;
else
- m_ACC.d = (m_ACC.d << 1);
+ m_ACC.d = m_ACC.d << 1;
}
-void tms32010_device::subh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::subh()
{
m_oldacc.d = m_ACC.d;
getdata(16,0);
m_ACC.d -= m_ALU.d;
CALCULATE_SUB_OVERFLOW(m_ALU.d);
}
-void tms32010_device::subs()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::subs()
{
m_oldacc.d = m_ACC.d;
getdata(0,0);
m_ACC.d -= m_ALU.d;
CALCULATE_SUB_OVERFLOW(m_ALU.d);
}
-void tms32010_device::tblr()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::tblr()
{
m_ALU.d = M_RDROM((m_ACC.w.l & m_addr_mask));
putdata(m_ALU.w.l);
m_STACK[0] = m_STACK[1];
}
-void tms32010_device::tblw()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::tblw()
{
getdata(0,0);
M_WRTROM(((m_ACC.w.l & m_addr_mask)),m_ALU.w.l);
m_STACK[0] = m_STACK[1];
}
-void tms32010_device::xor_()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::xor_()
{
getdata(0,0);
m_ACC.w.l ^= m_ALU.w.l;
}
-void tms32010_device::zac()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::zac()
{
m_ACC.d = 0;
}
-void tms32010_device::zalh()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::zalh()
{
getdata(0,0);
m_ACC.w.h = m_ALU.w.l;
m_ACC.w.l = 0x0000;
}
-void tms32010_device::zals()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::zals()
{
getdata(0,0);
m_ACC.w.l = m_ALU.w.l;
@@ -760,51 +804,54 @@ void tms32010_device::zals()
/* Conditional Branch instructions take two cycles when the test condition is met and the branch performed */
-const tms32010_device::tms32010_opcode tms32010_device::s_opcode_main[256]=
-{
-/*00*/ {1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },
-/*08*/ {1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },{1, &tms32010_device::add_sh },
-/*10*/ {1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },
-/*18*/ {1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },{1, &tms32010_device::sub_sh },
-/*20*/ {1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },
-/*28*/ {1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },{1, &tms32010_device::lac_sh },
-/*30*/ {1, &tms32010_device::sar_ar0 },{1, &tms32010_device::sar_ar1 },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*38*/ {1, &tms32010_device::lar_ar0 },{1, &tms32010_device::lar_ar1 },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*40*/ {2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },{2, &tms32010_device::in_p },
-/*48*/ {2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },{2, &tms32010_device::out_p },
-/*50*/ {1, &tms32010_device::sacl },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*58*/ {1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },{1, &tms32010_device::sach_sh },
-/*60*/ {1, &tms32010_device::addh },{1, &tms32010_device::adds },{1, &tms32010_device::subh },{1, &tms32010_device::subs },{1, &tms32010_device::subc },{1, &tms32010_device::zalh },{1, &tms32010_device::zals },{3, &tms32010_device::tblr },
-/*68*/ {1, &tms32010_device::larp_mar},{1, &tms32010_device::dmov },{1, &tms32010_device::lt },{1, &tms32010_device::ltd },{1, &tms32010_device::lta },{1, &tms32010_device::mpy },{1, &tms32010_device::ldpk },{1, &tms32010_device::ldp },
-/*70*/ {1, &tms32010_device::lark_ar0},{1, &tms32010_device::lark_ar1 },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*78*/ {1, &tms32010_device::xor_ },{1, &tms32010_device::and_ },{1, &tms32010_device::or_ },{1, &tms32010_device::lst },{1, &tms32010_device::sst },{3, &tms32010_device::tblw },{1, &tms32010_device::lack },{0, &tms32010_device::opcodes_7F },
-/*80*/ {1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },
-/*88*/ {1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },
-/*90*/ {1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },
-/*98*/ {1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },{1, &tms32010_device::mpyk },
-/*A0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*A8*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*B0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*B8*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*C0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*C8*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*D0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*D8*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*E0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*E8*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*F0*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{1, &tms32010_device::banz },{1, &tms32010_device::bv },{1, &tms32010_device::bioz },{0, &tms32010_device::illegal },
-/*F8*/ {2, &tms32010_device::call },{2, &tms32010_device::br },{1, &tms32010_device::blz },{1, &tms32010_device::blez },{1, &tms32010_device::bgz },{1, &tms32010_device::bgez },{1, &tms32010_device::bnz },{1, &tms32010_device::bz }
+template <int HighBits>
+const typename tms3201x_base_device<HighBits>::tms32010_opcode tms3201x_base_device<HighBits>::s_opcode_main[256]=
+{
+/*00*/ {1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },
+/*08*/ {1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },{1, &tms3201x_base_device::add_sh },
+/*10*/ {1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },
+/*18*/ {1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },{1, &tms3201x_base_device::sub_sh },
+/*20*/ {1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },
+/*28*/ {1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },{1, &tms3201x_base_device::lac_sh },
+/*30*/ {1, &tms3201x_base_device::sar_ar0 },{1, &tms3201x_base_device::sar_ar1 },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*38*/ {1, &tms3201x_base_device::lar_ar0 },{1, &tms3201x_base_device::lar_ar1 },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*40*/ {2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },{2, &tms3201x_base_device::in_p },
+/*48*/ {2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },{2, &tms3201x_base_device::out_p },
+/*50*/ {1, &tms3201x_base_device::sacl },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*58*/ {1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },{1, &tms3201x_base_device::sach_sh },
+/*60*/ {1, &tms3201x_base_device::addh },{1, &tms3201x_base_device::adds },{1, &tms3201x_base_device::subh },{1, &tms3201x_base_device::subs },{1, &tms3201x_base_device::subc },{1, &tms3201x_base_device::zalh },{1, &tms3201x_base_device::zals },{3, &tms3201x_base_device::tblr },
+/*68*/ {1, &tms3201x_base_device::larp_mar},{1, &tms3201x_base_device::dmov },{1, &tms3201x_base_device::lt },{1, &tms3201x_base_device::ltd },{1, &tms3201x_base_device::lta },{1, &tms3201x_base_device::mpy },{1, &tms3201x_base_device::ldpk },{1, &tms3201x_base_device::ldp },
+/*70*/ {1, &tms3201x_base_device::lark_ar0},{1, &tms3201x_base_device::lark_ar1 },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*78*/ {1, &tms3201x_base_device::xor_ },{1, &tms3201x_base_device::and_ },{1, &tms3201x_base_device::or_ },{1, &tms3201x_base_device::lst },{1, &tms3201x_base_device::sst },{3, &tms3201x_base_device::tblw },{1, &tms3201x_base_device::lack },{0, &tms3201x_base_device::opcodes_7F },
+/*80*/ {1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },
+/*88*/ {1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },
+/*90*/ {1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },
+/*98*/ {1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },{1, &tms3201x_base_device::mpyk },
+/*A0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*A8*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*B0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*B8*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*C0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*C8*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*D0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*D8*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*E0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*E8*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*F0*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{1, &tms3201x_base_device::banz },{1, &tms3201x_base_device::bv },{1, &tms3201x_base_device::bioz },{0, &tms3201x_base_device::illegal },
+/*F8*/ {2, &tms3201x_base_device::call },{2, &tms3201x_base_device::br },{1, &tms3201x_base_device::blz },{1, &tms3201x_base_device::blez },{1, &tms3201x_base_device::bgz },{1, &tms3201x_base_device::bgez },{1, &tms3201x_base_device::bnz },{1, &tms3201x_base_device::bz }
};
-const tms32010_device::tms32010_opcode tms32010_device::s_opcode_7F[32]=
+template <int HighBits>
+const typename tms3201x_base_device<HighBits>::tms32010_opcode tms3201x_base_device<HighBits>::s_opcode_7F[32]=
{
-/*80*/ {1, &tms32010_device::nop },{1, &tms32010_device::dint },{1, &tms32010_device::eint },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*88*/ {1, &tms32010_device::abst },{1, &tms32010_device::zac },{1, &tms32010_device::rovm },{1, &tms32010_device::sovm },{2, &tms32010_device::cala },{2, &tms32010_device::ret },{1, &tms32010_device::pac },{1, &tms32010_device::apac },
-/*90*/ {1, &tms32010_device::spac },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },
-/*98*/ {0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal },{2, &tms32010_device::push },{2, &tms32010_device::pop },{0, &tms32010_device::illegal },{0, &tms32010_device::illegal }
+/*80*/ {1, &tms3201x_base_device::nop },{1, &tms3201x_base_device::dint },{1, &tms3201x_base_device::eint },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*88*/ {1, &tms3201x_base_device::abst },{1, &tms3201x_base_device::zac },{1, &tms3201x_base_device::rovm },{1, &tms3201x_base_device::sovm },{2, &tms3201x_base_device::cala },{2, &tms3201x_base_device::ret },{1, &tms3201x_base_device::pac },{1, &tms3201x_base_device::apac },
+/*90*/ {1, &tms3201x_base_device::spac },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },
+/*98*/ {0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal },{2, &tms3201x_base_device::push },{2, &tms3201x_base_device::pop },{0, &tms3201x_base_device::illegal },{0, &tms3201x_base_device::illegal }
};
-int tms32010_device::add_branch_cycle()
+template <int HighBits>
+int tms3201x_base_device<HighBits>::add_branch_cycle()
{
return s_opcode_main[m_opcode.b.h].cycles;
}
@@ -813,7 +860,8 @@ int tms32010_device::add_branch_cycle()
* Inits CPU emulation
****************************************************************************/
-void tms32010_device::device_start()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::device_start()
{
save_item(NAME(m_PC));
save_item(NAME(m_PREVPC));
@@ -822,12 +870,8 @@ void tms32010_device::device_start()
save_item(NAME(m_ALU.d));
save_item(NAME(m_Preg.d));
save_item(NAME(m_Treg));
- save_item(NAME(m_AR[0]));
- save_item(NAME(m_AR[1]));
- save_item(NAME(m_STACK[0]));
- save_item(NAME(m_STACK[1]));
- save_item(NAME(m_STACK[2]));
- save_item(NAME(m_STACK[3]));
+ save_item(NAME(m_AR));
+ save_item(NAME(m_STACK));
save_item(NAME(m_INTF));
save_item(NAME(m_opcode.d));
save_item(NAME(m_oldacc.d));
@@ -876,7 +920,8 @@ void tms32010_device::device_start()
* TMS32010 Reset registers to their initial values
****************************************************************************/
-void tms32010_device::device_reset()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::device_reset()
{
m_PC = 0;
m_ACC.d = 0;
@@ -887,7 +932,8 @@ void tms32010_device::device_reset()
}
-void tms32010_device::state_string_export(const device_state_entry &entry, std::string &str) const
+template <int HighBits>
+void tms3201x_base_device<HighBits>::state_string_export(const device_state_entry &entry, std::string &str) const
{
switch (entry.index())
{
@@ -919,7 +965,8 @@ void tms32010_device::state_string_export(const device_state_entry &entry, std::
* Set IRQ line state
****************************************************************************/
-void tms32010_device::execute_set_input(int irqline, int state)
+template <int HighBits>
+void tms3201x_base_device<HighBits>::execute_set_input(int irqline, int state)
{
/* Pending Interrupts cannot be cleared! */
if (state == ASSERT_LINE) m_INTF |= TMS32010_INT_PENDING;
@@ -931,11 +978,12 @@ void tms32010_device::execute_set_input(int irqline, int state)
* Issue an interrupt if necessary
****************************************************************************/
-int tms32010_device::Ext_IRQ()
+template <int HighBits>
+int tms3201x_base_device<HighBits>::Ext_IRQ()
{
if (INTM == 0)
{
- logerror("TMS32010: EXT INTERRUPT\n");
+ standard_irq_callback(0, m_PC);
m_INTF = TMS32010_INT_NONE;
SET_FLAG(INTM_FLAG);
PUSH_STACK(m_PC);
@@ -950,12 +998,13 @@ int tms32010_device::Ext_IRQ()
* Execute IPeriod. Return 0 if emulation should be stopped
****************************************************************************/
-void tms32010_device::execute_run()
+template <int HighBits>
+void tms3201x_base_device<HighBits>::execute_run()
{
do
{
if (m_INTF) {
- /* Dont service INT if previous instruction was MPY, MPYK or EINT */
+ /* Don't service INT if previous instruction was MPY, MPYK or EINT */
if ((m_opcode.b.h != 0x6d) && ((m_opcode.b.h & 0xe0) != 0x80) && (m_opcode.w.l != 0x7f82))
m_icount -= Ext_IRQ();
}
@@ -967,7 +1016,7 @@ void tms32010_device::execute_run()
m_opcode.d = M_RDOP(m_PC);
m_PC++;
- if (m_opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
+ if (m_opcode.b.h != 0x7f) { /* Do all opcodes except the 7Fxx ones */
m_icount -= s_opcode_main[m_opcode.b.h].cycles;
(this->*s_opcode_main[m_opcode.b.h].function)();
}
diff --git a/src/devices/cpu/tms32010/tms32010.h b/src/devices/cpu/tms32010/tms32010.h
index beebee1b0b0..b240c0b3ab8 100644
--- a/src/devices/cpu/tms32010/tms32010.h
+++ b/src/devices/cpu/tms32010/tms32010.h
@@ -1,14 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Tony La Porta
- /**************************************************************************\
- * Texas Instruments TMS32010 DSP Emulator *
- * *
- * Copyright Tony La Porta *
- * *
- * Note : This is a word based microcontroller, with addressing *
- * architecture based on the Harvard addressing scheme. *
- * *
- \**************************************************************************/
+/**************************************************************************
+
+ Texas Instruments TMS32010 DSP Emulator
+
+ Copyright Tony La Porta
+
+**************************************************************************/
#ifndef MAME_CPU_TMS32010_TMS32010_H
#define MAME_CPU_TMS32010_TMS32010_H
@@ -30,43 +28,40 @@ enum
* Public Functions
*/
-
-class tms32010_device : public cpu_device
+template <int HighBits>
+class tms3201x_base_device : public cpu_device
{
public:
- // construction/destruction
- tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-
// configuration helpers
auto bio() { return m_bio_in.bind(); }
- void tms32010_ram(address_map &map);
- void tms32015_ram(address_map &map);
protected:
- tms32010_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor data_map, int addr_mask);
+ tms3201x_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor data_map);
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 3; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+ void tms32010_ram(address_map &map) ATTR_COLD;
+ void tms32015_ram(address_map &map) ATTR_COLD;
+
private:
address_space_config m_program_config;
address_space_config m_data_config;
@@ -74,7 +69,7 @@ private:
devcb_read_line m_bio_in;
- typedef void ( tms32010_device::*opcode_func ) ();
+ using opcode_func = void (tms3201x_base_device::*)();
struct tms32010_opcode
{
uint8_t cycles;
@@ -87,24 +82,24 @@ private:
uint16_t m_PC;
uint16_t m_PREVPC; /* previous program counter */
uint16_t m_STR;
- PAIR m_ACC;
- PAIR m_ALU;
- PAIR m_Preg;
+ PAIR m_ACC;
+ PAIR m_ALU;
+ PAIR m_Preg;
uint16_t m_Treg;
uint16_t m_AR[2];
uint16_t m_STACK[4];
- PAIR m_opcode;
- int m_INTF; /* Pending Interrupt flag */
- int m_icount;
- PAIR m_oldacc;
+ PAIR m_opcode;
+ int m_INTF; /* Pending Interrupt flag */
+ int m_icount;
+ PAIR m_oldacc;
uint16_t m_memaccess;
- int m_addr_mask;
+ int m_addr_mask;
- memory_access<12, 1, -1, ENDIANNESS_BIG>::cache m_cache;
- memory_access<12, 1, -1, ENDIANNESS_BIG>::specific m_program;
- memory_access< 8, 1, -1, ENDIANNESS_BIG>::specific m_data;
- memory_access< 4, 1, -1, ENDIANNESS_BIG>::specific m_io;
+ typename memory_access<HighBits, 1, -1, ENDIANNESS_BIG>::cache m_cache;
+ typename memory_access<HighBits, 1, -1, ENDIANNESS_BIG>::specific m_program;
+ memory_access<8, 1, -1, ENDIANNESS_BIG>::specific m_data;
+ memory_access<4, 1, -1, ENDIANNESS_BIG>::specific m_io;
inline void CLR(uint16_t flag);
inline void SET_FLAG(uint16_t flag);
@@ -187,7 +182,15 @@ private:
};
-class tms32015_device : public tms32010_device
+class tms32010_device : public tms3201x_base_device<12>
+{
+public:
+ // construction/destruction
+ tms32010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+class tms32015_device : public tms3201x_base_device<12>
{
public:
// construction/destruction
@@ -195,7 +198,7 @@ public:
};
-class tms32016_device : public tms32010_device
+class tms32016_device : public tms3201x_base_device<16>
{
public:
// construction/destruction
@@ -207,5 +210,4 @@ DECLARE_DEVICE_TYPE(TMS32010, tms32010_device)
DECLARE_DEVICE_TYPE(TMS32015, tms32015_device)
DECLARE_DEVICE_TYPE(TMS32016, tms32016_device)
-
#endif // MAME_CPU_TMS32010_TMS32010_H
diff --git a/src/devices/cpu/tms32025/tms32025.cpp b/src/devices/cpu/tms32025/tms32025.cpp
index 028c3e11f01..2d543fe3bc0 100644
--- a/src/devices/cpu/tms32025/tms32025.cpp
+++ b/src/devices/cpu/tms32025/tms32025.cpp
@@ -1,13 +1,14 @@
// license:BSD-3-Clause
// copyright-holders:Tony La Porta
/**************************************************************************\
- * Texas Instruments TMS320x25 DSP Emulator *
+ * Texas Instruments TMS320x2x DSP Emulator *
* *
* Copyright Tony La Porta *
* Written for the MAME project. *
* *
* *
- * Three versions of the chip are available, and they are: *
+ * Four versions of the chip are available, and they are: *
+ * TMS32020 Internal ROM does not exist *
* TMS320C25 Internal ROM one time programmed at TI *
* TMS320E25 Internal ROM programmable as a normal EPROM *
* TMS320P25 Internal ROM programmable once as a normal EPROM only *
@@ -51,6 +52,9 @@
Fix the levels for S_IN and S_OUT - use assert/release line
+ # Architecture difference between TMS32020 and TMS320C25/6 is only
+ partially implemented.
+
# Support for the built in Timer/Counter Page 91
When idling, Counter must still be activly counting down. When counter
reaches 0 it should issue a TINT (if it's not masked), then come out of
@@ -191,30 +195,31 @@ Table 3-2. TMS32025/26 Memory Blocks
use set_mp_mc in the device configuration to set the pin for internal ROM mode
*/
+DEFINE_DEVICE_TYPE(TMS32020, tms32020_device, "tms32020", "Texas Instruments TMS32020")
DEFINE_DEVICE_TYPE(TMS32025, tms32025_device, "tms32025", "Texas Instruments TMS32025")
DEFINE_DEVICE_TYPE(TMS32026, tms32026_device, "tms32026", "Texas Instruments TMS32026")
-void tms32025_device::tms32025_data(address_map &map)
+void tms3202x_device::tms3202x_data(address_map &map)
{
- map(0x0000, 0x0000).rw(FUNC(tms32025_device::drr_r), FUNC(tms32025_device::drr_w));
- map(0x0001, 0x0001).rw(FUNC(tms32025_device::dxr_r), FUNC(tms32025_device::dxr_w));
- map(0x0002, 0x0002).rw(FUNC(tms32025_device::tim_r), FUNC(tms32025_device::tim_w));
- map(0x0003, 0x0003).rw(FUNC(tms32025_device::prd_r), FUNC(tms32025_device::prd_w));
- map(0x0004, 0x0004).rw(FUNC(tms32025_device::imr_r), FUNC(tms32025_device::imr_w));
- map(0x0005, 0x0005).rw(FUNC(tms32025_device::greg_r), FUNC(tms32025_device::greg_w));
+ map(0x0000, 0x0000).rw(FUNC(tms3202x_device::drr_r), FUNC(tms3202x_device::drr_w));
+ map(0x0001, 0x0001).rw(FUNC(tms3202x_device::dxr_r), FUNC(tms3202x_device::dxr_w));
+ map(0x0002, 0x0002).rw(FUNC(tms3202x_device::tim_r), FUNC(tms3202x_device::tim_w));
+ map(0x0003, 0x0003).rw(FUNC(tms3202x_device::prd_r), FUNC(tms3202x_device::prd_w));
+ map(0x0004, 0x0004).rw(FUNC(tms3202x_device::imr_r), FUNC(tms3202x_device::imr_w));
+ map(0x0005, 0x0005).rw(FUNC(tms3202x_device::greg_r), FUNC(tms3202x_device::greg_w));
map(0x0060, 0x007f).ram().share("b2");
map(0x0200, 0x02ff).ram().share("b0");
map(0x0300, 0x03ff).ram().share("b1");
}
-void tms32025_device::tms32026_data(address_map &map)
+void tms3202x_device::tms32026_data(address_map &map)
{
- map(0x0000, 0x0000).rw(FUNC(tms32025_device::drr_r), FUNC(tms32025_device::drr_w));
- map(0x0001, 0x0001).rw(FUNC(tms32025_device::dxr_r), FUNC(tms32025_device::dxr_w));
- map(0x0002, 0x0002).rw(FUNC(tms32025_device::tim_r), FUNC(tms32025_device::tim_w));
- map(0x0003, 0x0003).rw(FUNC(tms32025_device::prd_r), FUNC(tms32025_device::prd_w));
- map(0x0004, 0x0004).rw(FUNC(tms32025_device::imr_r), FUNC(tms32025_device::imr_w));
- map(0x0005, 0x0005).rw(FUNC(tms32025_device::greg_r), FUNC(tms32025_device::greg_w));
+ map(0x0000, 0x0000).rw(FUNC(tms3202x_device::drr_r), FUNC(tms3202x_device::drr_w));
+ map(0x0001, 0x0001).rw(FUNC(tms3202x_device::dxr_r), FUNC(tms3202x_device::dxr_w));
+ map(0x0002, 0x0002).rw(FUNC(tms3202x_device::tim_r), FUNC(tms3202x_device::tim_w));
+ map(0x0003, 0x0003).rw(FUNC(tms3202x_device::prd_r), FUNC(tms3202x_device::prd_w));
+ map(0x0004, 0x0004).rw(FUNC(tms3202x_device::imr_r), FUNC(tms3202x_device::imr_w));
+ map(0x0005, 0x0005).rw(FUNC(tms3202x_device::greg_r), FUNC(tms3202x_device::greg_w));
map(0x0060, 0x007f).ram().share("b2");
map(0x0200, 0x03ff).ram().share("b0");
map(0x0400, 0x05ff).ram().share("b1");
@@ -223,7 +228,7 @@ void tms32025_device::tms32026_data(address_map &map)
#if 0
// Instead of using the map here we install the ROM depending on the MP/MC pin set in the config
-void tms32025_device::tms32025_program(address_map &map)
+void tms3202x_device::tms32025_program(address_map &map)
{
map(0x0000, 0x0fff).rom().region("internal", 0); // 4K Words Internal ROM / EPROM
}
@@ -240,7 +245,15 @@ const tiny_rom_entry *tms32025_device::device_rom_region() const
}
-tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap)
+tms3202x_device::tms3202x_device(
+ const machine_config &mconfig,
+ device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ unsigned stack_depth,
+ address_map_constructor prgmap,
+ address_map_constructor datamap)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_BIG, 16, 16, -1, prgmap)
, m_data_config("data", ENDIANNESS_BIG, 16, 16, -1, datamap)
@@ -255,29 +268,40 @@ tms32025_device::tms32025_device(const machine_config &mconfig, device_type type
, m_xf_out(*this)
, m_dr_in(*this, 0xffff)
, m_dx_out(*this)
- , m_mp_mc(true)
+ , m_stack_limit(stack_depth - 1)
{
}
-tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : tms32025_device(mconfig, TMS32025, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this))
+tms32020_device::tms32020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : tms3202x_device(mconfig, TMS32020, tag, owner, clock, 4, address_map_constructor(), address_map_constructor(FUNC(tms3202x_device::tms3202x_data), this))
{
m_fixed_STR1 = 0x0180;
}
+tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap)
+ : tms3202x_device(mconfig, type, tag, owner, clock, 8, prgmap, datamap)
+ , m_mp_mc(true)
+{
+}
+
tms32025_device::tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
- : tms32025_device(mconfig, type, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32025_device::tms32025_data), this))
+ : tms32025_device(mconfig, type, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms3202x_device::tms3202x_data), this))
{
m_fixed_STR1 = 0x0180;
}
+tms32025_device::tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : tms32025_device(mconfig, TMS32025, tag, owner, clock)
+{
+}
+
tms32026_device::tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: tms32025_device(mconfig, TMS32026, tag, owner, clock, address_map_constructor(), address_map_constructor(FUNC(tms32026_device::tms32026_data), this))
{
m_fixed_STR1 = 0x0100;
}
-device_memory_interface::space_config_vector tms32025_device::memory_space_config() const
+device_memory_interface::space_config_vector tms3202x_device::memory_space_config() const
{
return space_config_vector {
std::make_pair(AS_PROGRAM, &m_program_config),
@@ -286,27 +310,27 @@ device_memory_interface::space_config_vector tms32025_device::memory_space_confi
};
}
-std::unique_ptr<util::disasm_interface> tms32025_device::create_disassembler()
+std::unique_ptr<util::disasm_interface> tms3202x_device::create_disassembler()
{
return std::make_unique<tms32025_disassembler>();
}
-uint16_t tms32025_device::drr_r()
+uint16_t tms3202x_device::drr_r()
{
return m_drr;
}
-void tms32025_device::drr_w(uint16_t data)
+void tms3202x_device::drr_w(uint16_t data)
{
m_drr = data;
}
-uint16_t tms32025_device::dxr_r()
+uint16_t tms3202x_device::dxr_r()
{
return m_dxr;
}
-void tms32025_device::dxr_w(uint16_t data)
+void tms3202x_device::dxr_w(uint16_t data)
{
m_dxr = data;
@@ -318,65 +342,65 @@ void tms32025_device::dxr_w(uint16_t data)
}
}
-uint16_t tms32025_device::tim_r()
+uint16_t tms3202x_device::tim_r()
{
return m_tim;
}
-void tms32025_device::tim_w(uint16_t data)
+void tms3202x_device::tim_w(uint16_t data)
{
m_tim = data;
}
-uint16_t tms32025_device::prd_r()
+uint16_t tms3202x_device::prd_r()
{
return m_prd;
}
-void tms32025_device::prd_w(uint16_t data)
+void tms3202x_device::prd_w(uint16_t data)
{
m_prd = data;
}
-uint16_t tms32025_device::imr_r()
+uint16_t tms3202x_device::imr_r()
{
return m_imr;
}
-void tms32025_device::imr_w(uint16_t data)
+void tms3202x_device::imr_w(uint16_t data)
{
m_imr = data;
}
-uint16_t tms32025_device::greg_r()
+uint16_t tms3202x_device::greg_r()
{
return m_greg;
}
-void tms32025_device::greg_w(uint16_t data)
+void tms3202x_device::greg_w(uint16_t data)
{
m_greg = data;
}
-void tms32025_device::CLR0(uint16_t flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
-void tms32025_device::SET0(uint16_t flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
-void tms32025_device::CLR1(uint16_t flag) { m_STR1 &= ~flag; m_STR1 |= m_fixed_STR1; }
-void tms32025_device::SET1(uint16_t flag) { m_STR1 |= flag; m_STR1 |= m_fixed_STR1; }
+inline void tms3202x_device::CLR0(uint16_t flag) { m_STR0 &= ~flag; m_STR0 |= 0x0400; }
+inline void tms3202x_device::SET0(uint16_t flag) { m_STR0 |= flag; m_STR0 |= 0x0400; }
+inline void tms3202x_device::CLR1(uint16_t flag) { m_STR1 &= ~flag; m_STR1 |= m_fixed_STR1; }
+inline void tms3202x_device::SET1(uint16_t flag) { m_STR1 |= flag; m_STR1 |= m_fixed_STR1; }
-void tms32025_device::MODIFY_DP(int data)
+inline void tms3202x_device::MODIFY_DP(int data)
{
m_STR0 &= ~DP_REG;
m_STR0 |= (data & DP_REG);
m_STR0 |= 0x0400;
}
-void tms32025_device::MODIFY_PM(int data)
+inline void tms3202x_device::MODIFY_PM(int data)
{
m_STR1 &= ~PM_REG;
m_STR1 |= (data & PM_REG);
m_STR1 |= m_fixed_STR1;
}
-void tms32025_device::MODIFY_ARP(int data)
+inline void tms3202x_device::MODIFY_ARP(int data)
{
m_STR1 &= ~ARB_REG;
m_STR1 |= (m_STR0 & ARP_REG);
@@ -386,23 +410,23 @@ void tms32025_device::MODIFY_ARP(int data)
m_STR0 |= 0x0400;
}
-uint16_t tms32025_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 )
+uint16_t tms3202x_device::reverse_carry_add(uint16_t arg0, uint16_t arg1 )
{
uint16_t result = 0;
int carry = 0;
int count;
- for( count=0; count<16; count++ )
+ for (count = 0; count < 16; count++)
{
- int sum = (arg0>>15)+(arg1>>15)+carry;
- result = (result<<1)|(sum&1);
- carry = sum>>1;
- arg0<<=1;
- arg1<<=1;
+ int sum = (arg0 >> 15) + (arg1 >> 15) + carry;
+ result = (result << 1) | (sum & 1);
+ carry = sum >> 1;
+ arg0 <<= 1;
+ arg1 <<= 1;
}
return result;
}
-void tms32025_device::MODIFY_AR_ARP()
+inline void tms3202x_device::MODIFY_AR_ARP()
{ /* modify address register referenced by ARP */
switch (m_opcode.b.l & 0x70) /* Cases ordered by predicted useage */
{
@@ -437,7 +461,7 @@ void tms32025_device::MODIFY_AR_ARP()
break;
}
- if( !m_mHackIgnoreARP )
+ if (!m_mHackIgnoreARP)
{
if (m_opcode.b.l & 8)
{ /* bit 3 determines if new value is loaded into ARP */
@@ -446,76 +470,71 @@ void tms32025_device::MODIFY_AR_ARP()
}
}
-void tms32025_device::CALCULATE_ADD_CARRY()
+inline void tms3202x_device::CALCULATE_ADD_CARRY()
{
- if ( (uint32_t)(m_oldacc.d) > (uint32_t)(m_ACC.d) ) {
+ if (uint32_t(m_oldacc.d) > uint32_t(m_ACC.d))
+ {
SET1(C_FLAG);
}
- else {
+ else
+ {
CLR1(C_FLAG);
}
}
-void tms32025_device::CALCULATE_SUB_CARRY()
+inline void tms3202x_device::CALCULATE_SUB_CARRY()
{
- if ( (uint32_t)(m_oldacc.d) < (uint32_t)(m_ACC.d) ) {
+ if (uint32_t(m_oldacc.d) < uint32_t(m_ACC.d))
+ {
CLR1(C_FLAG);
}
- else {
+ else
+ {
SET1(C_FLAG);
}
}
-void tms32025_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
+inline void tms3202x_device::CALCULATE_ADD_OVERFLOW(int32_t addval)
{
- if ((int32_t)((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
+ if (int32_t((m_ACC.d ^ addval) & (m_oldacc.d ^ m_ACC.d)) < 0)
{
SET0(OV_FLAG);
if (OVM)
{
- m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = (int32_t(m_oldacc.d) < 0) ? 0x80000000 : 0x7fffffff;
}
}
}
-void tms32025_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
+
+inline void tms3202x_device::CALCULATE_SUB_OVERFLOW(int32_t subval)
{
if ((int32_t)((m_oldacc.d ^ subval) & (m_oldacc.d ^ m_ACC.d)) < 0)
{
SET0(OV_FLAG);
if (OVM)
{
- m_ACC.d = ((int32_t)m_oldacc.d < 0) ? 0x80000000 : 0x7fffffff;
+ m_ACC.d = (int32_t(m_oldacc.d) < 0) ? 0x80000000 : 0x7fffffff;
}
}
}
-uint16_t tms32025_device::POP_STACK()
+inline uint16_t tms3202x_device::POP_STACK()
{
- uint16_t data = m_STACK[7];
- m_STACK[7] = m_STACK[6];
- m_STACK[6] = m_STACK[5];
- m_STACK[5] = m_STACK[4];
- m_STACK[4] = m_STACK[3];
- m_STACK[3] = m_STACK[2];
- m_STACK[2] = m_STACK[1];
- m_STACK[1] = m_STACK[0];
+ uint16_t const data = m_STACK[m_stack_limit];
+ for (unsigned i = m_stack_limit; 0 < i; --i)
+ m_STACK[i] = m_STACK[i - 1];
return data;
}
-void tms32025_device::PUSH_STACK(uint16_t data)
+inline void tms3202x_device::PUSH_STACK(uint16_t data)
{
- m_STACK[0] = m_STACK[1];
- m_STACK[1] = m_STACK[2];
- m_STACK[2] = m_STACK[3];
- m_STACK[3] = m_STACK[4];
- m_STACK[4] = m_STACK[5];
- m_STACK[5] = m_STACK[6];
- m_STACK[6] = m_STACK[7];
- m_STACK[7] = data;
+ for (unsigned i = 0; m_stack_limit > i; ++i)
+ m_STACK[i] = m_STACK[i + 1];
+ m_STACK[m_stack_limit] = data;
}
-void tms32025_device::SHIFT_Preg_TO_ALU()
+inline void tms3202x_device::SHIFT_Preg_TO_ALU()
{
- switch(PM) /* PM (in STR1) is the shift mode for Preg */
+ switch (PM) /* PM (in STR1) is the shift mode for Preg */
{
case 0: m_ALU.d = m_Preg.d; break;
case 1: m_ALU.d = (m_Preg.d << 1); break;
@@ -525,7 +544,7 @@ void tms32025_device::SHIFT_Preg_TO_ALU()
}
}
-void tms32025_device::GETDATA(int shift,int signext)
+inline void tms3202x_device::GETDATA(int shift,int signext)
{
if (m_opcode.b.l & 0x80)
{ /* indirect memory access */
@@ -553,23 +572,25 @@ void tms32025_device::GETDATA(int shift,int signext)
if (m_opcode.b.l & 0x80) MODIFY_AR_ARP();
}
-void tms32025_device::PUTDATA(uint16_t data)
+inline void tms3202x_device::PUTDATA(uint16_t data)
{
- if (m_opcode.b.l & 0x80) {
+ if (m_opcode.b.l & 0x80)
+ {
if (m_memaccess >= 0x800) m_external_mem_access = 1; /* Pause if hold pin is active */
else m_external_mem_access = 0;
m_data.write_word(IND, data);
MODIFY_AR_ARP();
}
- else {
+ else
+ {
if (m_memaccess >= 0x800) m_external_mem_access = 1; /* Pause if hold pin is active */
else m_external_mem_access = 0;
m_data.write_word(DMA, data);
}
}
-void tms32025_device::PUTDATA_SST(uint16_t data)
+inline void tms3202x_device::PUTDATA_SST(uint16_t data)
{
if (m_opcode.b.l & 0x80) m_memaccess = IND;
else m_memaccess = DMApg0;
@@ -592,15 +613,15 @@ void tms32025_device::PUTDATA_SST(uint16_t data)
/* The following functions are here to fill the void for the */
/* opcode call functions. These functions are never actually called. */
-void tms32025_device::opcodes_CE() { fatalerror("Should never get here!\n"); }
-void tms32025_device::opcodes_Dx() { fatalerror("Should never get here!\n"); }
+void tms3202x_device::opcodes_CE() { fatalerror("Should never get here!\n"); }
+void tms3202x_device::opcodes_Dx() { fatalerror("Should never get here!\n"); }
-void tms32025_device::illegal()
+void tms3202x_device::illegal()
{
- logerror("TMS32025: PC = %04x, Illegal opcode = %04x\n", (m_PC-1), m_opcode.w.l);
+ logerror("TMS3202x: PC = %04x, Illegal opcode = %04x\n", (m_PC-1), m_opcode.w.l);
}
-void tms32025_device::abst()
+void tms3202x_device::abst()
{
if ( (int32_t)(m_ACC.d) < 0 ) {
m_ACC.d = -m_ACC.d;
@@ -611,7 +632,7 @@ void tms32025_device::abst()
}
CLR1(C_FLAG);
}
-void tms32025_device::add()
+void tms3202x_device::add()
{
m_oldacc.d = m_ACC.d;
GETDATA((m_opcode.b.h & 0xf), SXM);
@@ -619,7 +640,7 @@ void tms32025_device::add()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::addc()
+void tms3202x_device::addc()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -629,7 +650,7 @@ void tms32025_device::addc()
if (m_ACC.d == m_oldacc.d) {} /* edge case, carry remains same */
else CALCULATE_ADD_CARRY();
}
-void tms32025_device::addh()
+void tms3202x_device::addh()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -642,7 +663,7 @@ void tms32025_device::addh()
if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
-void tms32025_device::addk()
+void tms3202x_device::addk()
{
m_oldacc.d = m_ACC.d;
m_ALU.d = (uint8_t)m_opcode.b.l;
@@ -650,7 +671,7 @@ void tms32025_device::addk()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::adds()
+void tms3202x_device::adds()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -658,7 +679,7 @@ void tms32025_device::adds()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::addt()
+void tms3202x_device::addt()
{
m_oldacc.d = m_ACC.d;
GETDATA((m_Treg & 0xf), SXM);
@@ -666,7 +687,7 @@ void tms32025_device::addt()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::adlk()
+void tms3202x_device::adlk()
{
m_oldacc.d = m_ACC.d;
if (SXM) m_ALU.d = (int16_t)m_cache.read_word(m_PC);
@@ -677,16 +698,16 @@ void tms32025_device::adlk()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::adrk()
+void tms3202x_device::adrk()
{
m_AR[ARP] += m_opcode.b.l;
}
-void tms32025_device::and_()
+void tms3202x_device::and_()
{
GETDATA(0, 0);
m_ACC.d &= m_ALU.d;
}
-void tms32025_device::andk()
+void tms3202x_device::andk()
{
m_oldacc.d = m_ACC.d;
m_ALU.d = (uint16_t)m_cache.read_word(m_PC);
@@ -694,7 +715,7 @@ void tms32025_device::andk()
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d &= m_ALU.d;
}
-void tms32025_device::apac()
+void tms3202x_device::apac()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -702,76 +723,76 @@ void tms32025_device::apac()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::br()
+void tms3202x_device::br()
{
m_PC = m_cache.read_word(m_PC);
MODIFY_AR_ARP();
}
-void tms32025_device::bacc()
+void tms3202x_device::bacc()
{
m_PC = m_ACC.w.l;
}
-void tms32025_device::banz()
+void tms3202x_device::banz()
{
if (m_AR[ARP]) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bbnz()
+void tms3202x_device::bbnz()
{
if (TC) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bbz()
+void tms3202x_device::bbz()
{
if (TC == 0) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bc()
+void tms3202x_device::bc()
{
if (CARRY) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bgez()
+void tms3202x_device::bgez()
{
if ( (int32_t)(m_ACC.d) >= 0 ) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bgz()
+void tms3202x_device::bgz()
{
if ( (int32_t)(m_ACC.d) > 0 ) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bioz()
+void tms3202x_device::bioz()
{
if (m_bio_in() != CLEAR_LINE) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bit()
+void tms3202x_device::bit()
{
GETDATA(0, 0);
if (m_ALU.d & (0x8000 >> (m_opcode.b.h & 0xf))) SET1(TC_FLAG);
else CLR1(TC_FLAG);
}
-void tms32025_device::bitt()
+void tms3202x_device::bitt()
{
GETDATA(0, 0);
if (m_ALU.d & (0x8000 >> (m_Treg & 0xf))) SET1(TC_FLAG);
else CLR1(TC_FLAG);
}
-void tms32025_device::blez()
+void tms3202x_device::blez()
{
if ( (int32_t)(m_ACC.d) <= 0 ) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::blkd()
+void tms3202x_device::blkd()
{ /** Fix cycle timing **/
if (m_init_load_addr) {
m_PFC = m_cache.read_word(m_PC);
@@ -782,7 +803,7 @@ void tms32025_device::blkd()
m_PFC++;
m_tms32025_dec_cycles += (1*CLK);
}
-void tms32025_device::blkp()
+void tms3202x_device::blkp()
{ /** Fix cycle timing **/
if (m_init_load_addr) {
m_PFC = m_cache.read_word(m_PC);
@@ -793,19 +814,19 @@ void tms32025_device::blkp()
m_PFC++;
m_tms32025_dec_cycles += (2*CLK);
}
-void tms32025_device::blz()
+void tms3202x_device::blz()
{
if ( (int32_t)(m_ACC.d) < 0 ) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bnc()
+void tms3202x_device::bnc()
{
if (CARRY == 0) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bnv()
+void tms3202x_device::bnv()
{
if (OV == 0) m_PC = m_cache.read_word(m_PC);
else {
@@ -814,13 +835,13 @@ void tms32025_device::bnv()
}
MODIFY_AR_ARP();
}
-void tms32025_device::bnz()
+void tms3202x_device::bnz()
{
if (m_ACC.d != 0) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bv()
+void tms3202x_device::bv()
{
if (OV) {
m_PC = m_cache.read_word(m_PC);
@@ -829,29 +850,29 @@ void tms32025_device::bv()
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::bz()
+void tms3202x_device::bz()
{
if (m_ACC.d == 0) m_PC = m_cache.read_word(m_PC);
else m_PC++;
MODIFY_AR_ARP();
}
-void tms32025_device::cala()
+void tms3202x_device::cala()
{
PUSH_STACK(m_PC);
m_PC = m_ACC.w.l;
}
-void tms32025_device::call()
+void tms3202x_device::call()
{
m_PC++;
PUSH_STACK(m_PC);
m_PC = m_cache.read_word(m_PC - 1);
MODIFY_AR_ARP();
}
-void tms32025_device::cmpl()
+void tms3202x_device::cmpl()
{
m_ACC.d = (~m_ACC.d);
}
-void tms32025_device::cmpr()
+void tms3202x_device::cmpr()
{
switch (m_opcode.b.l & 3)
{
@@ -873,7 +894,7 @@ void tms32025_device::cmpr()
break;
}
}
-void tms32025_device::cnfd() /** next two fetches need to use previous CNF value ! **/
+void tms3202x_device::cnfd() /** next two fetches need to use previous CNF value ! **/
{
if(m_STR1 & CNF0_REG) {
space(AS_PROGRAM).unmap_readwrite(0xff00, 0xffff);
@@ -881,7 +902,7 @@ void tms32025_device::cnfd() /** next two fetches need to use previous CNF valu
CLR1(CNF0_REG);
}
}
-void tms32025_device::cnfp() /** next two fetches need to use previous CNF value ! **/
+void tms3202x_device::cnfp() /** next two fetches need to use previous CNF value ! **/
{
if(!(m_STR1 & CNF0_REG)) {
space(AS_PROGRAM).install_ram(0xff00, 0xffff, m_b0);
@@ -890,7 +911,7 @@ void tms32025_device::cnfp() /** next two fetches need to use previous CNF valu
}
}
-void tms32025_device::conf()
+void tms3202x_device::conf()
{
// Disabled on tms32025
}
@@ -944,49 +965,49 @@ void tms32026_device::conf() /** Need to reconfigure the memory blocks */
space(AS_DATA).unmap_readwrite(0x0600, 0x07ff);
}
}
-void tms32025_device::dint()
+void tms3202x_device::dint()
{
SET0(INTM_FLAG);
}
-void tms32025_device::dmov() /** Careful with how memory is configured !! */
+void tms3202x_device::dmov() /** Careful with how memory is configured !! */
{
GETDATA(0, 0);
m_data.write_word(m_memaccess + 1, m_ALU.w.l);
}
-void tms32025_device::eint()
+void tms3202x_device::eint()
{
CLR0(INTM_FLAG);
}
-void tms32025_device::fort()
+void tms3202x_device::fort()
{
if (m_opcode.b.l & 1) SET1(FO_FLAG);
else CLR1(FO_FLAG);
}
-void tms32025_device::idle()
+void tms3202x_device::idle()
{
CLR0(INTM_FLAG);
m_idle = 1;
}
-void tms32025_device::in()
+void tms3202x_device::in()
{
m_ALU.w.l = m_io.read_word(m_opcode.b.h & 0xf);
PUTDATA(m_ALU.w.l);
}
-void tms32025_device::lac()
+void tms3202x_device::lac()
{
GETDATA((m_opcode.b.h & 0xf), SXM);
m_ACC.d = m_ALU.d;
}
-void tms32025_device::lack() /* ZAC is a subset of this instruction */
+void tms3202x_device::lack() /* ZAC is a subset of this instruction */
{
m_ACC.d = (uint8_t)m_opcode.b.l;
}
-void tms32025_device::lact()
+void tms3202x_device::lact()
{
GETDATA((m_Treg & 0xf), SXM);
m_ACC.d = m_ALU.d;
}
-void tms32025_device::lalk()
+void tms3202x_device::lalk()
{
if (SXM) m_ALU.d = (int16_t)m_cache.read_word(m_PC);
else m_ALU.d = (uint16_t)m_cache.read_word(m_PC);
@@ -994,43 +1015,43 @@ void tms32025_device::lalk()
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d = m_ALU.d;
}
-void tms32025_device::lar_ar0() { GETDATA(0, 0); m_AR[0] = m_ALU.w.l; }
-void tms32025_device::lar_ar1() { GETDATA(0, 0); m_AR[1] = m_ALU.w.l; }
-void tms32025_device::lar_ar2() { GETDATA(0, 0); m_AR[2] = m_ALU.w.l; }
-void tms32025_device::lar_ar3() { GETDATA(0, 0); m_AR[3] = m_ALU.w.l; }
-void tms32025_device::lar_ar4() { GETDATA(0, 0); m_AR[4] = m_ALU.w.l; }
-void tms32025_device::lar_ar5() { GETDATA(0, 0); m_AR[5] = m_ALU.w.l; }
-void tms32025_device::lar_ar6() { GETDATA(0, 0); m_AR[6] = m_ALU.w.l; }
-void tms32025_device::lar_ar7() { GETDATA(0, 0); m_AR[7] = m_ALU.w.l; }
-void tms32025_device::lark_ar0() { m_AR[0] = m_opcode.b.l; }
-void tms32025_device::lark_ar1() { m_AR[1] = m_opcode.b.l; }
-void tms32025_device::lark_ar2() { m_AR[2] = m_opcode.b.l; }
-void tms32025_device::lark_ar3() { m_AR[3] = m_opcode.b.l; }
-void tms32025_device::lark_ar4() { m_AR[4] = m_opcode.b.l; }
-void tms32025_device::lark_ar5() { m_AR[5] = m_opcode.b.l; }
-void tms32025_device::lark_ar6() { m_AR[6] = m_opcode.b.l; }
-void tms32025_device::lark_ar7() { m_AR[7] = m_opcode.b.l; }
-void tms32025_device::ldp()
+void tms3202x_device::lar_ar0() { GETDATA(0, 0); m_AR[0] = m_ALU.w.l; }
+void tms3202x_device::lar_ar1() { GETDATA(0, 0); m_AR[1] = m_ALU.w.l; }
+void tms3202x_device::lar_ar2() { GETDATA(0, 0); m_AR[2] = m_ALU.w.l; }
+void tms3202x_device::lar_ar3() { GETDATA(0, 0); m_AR[3] = m_ALU.w.l; }
+void tms3202x_device::lar_ar4() { GETDATA(0, 0); m_AR[4] = m_ALU.w.l; }
+void tms3202x_device::lar_ar5() { GETDATA(0, 0); m_AR[5] = m_ALU.w.l; }
+void tms3202x_device::lar_ar6() { GETDATA(0, 0); m_AR[6] = m_ALU.w.l; }
+void tms3202x_device::lar_ar7() { GETDATA(0, 0); m_AR[7] = m_ALU.w.l; }
+void tms3202x_device::lark_ar0() { m_AR[0] = m_opcode.b.l; }
+void tms3202x_device::lark_ar1() { m_AR[1] = m_opcode.b.l; }
+void tms3202x_device::lark_ar2() { m_AR[2] = m_opcode.b.l; }
+void tms3202x_device::lark_ar3() { m_AR[3] = m_opcode.b.l; }
+void tms3202x_device::lark_ar4() { m_AR[4] = m_opcode.b.l; }
+void tms3202x_device::lark_ar5() { m_AR[5] = m_opcode.b.l; }
+void tms3202x_device::lark_ar6() { m_AR[6] = m_opcode.b.l; }
+void tms3202x_device::lark_ar7() { m_AR[7] = m_opcode.b.l; }
+void tms3202x_device::ldp()
{
GETDATA(0, 0);
MODIFY_DP(m_ALU.d & 0x1ff);
}
-void tms32025_device::ldpk()
+void tms3202x_device::ldpk()
{
MODIFY_DP(m_opcode.w.l & 0x1ff);
}
-void tms32025_device::lph()
+void tms3202x_device::lph()
{
GETDATA(0, 0);
m_Preg.w.h = m_ALU.w.l;
}
-void tms32025_device::lrlk()
+void tms3202x_device::lrlk()
{
m_ALU.d = (uint16_t)m_cache.read_word(m_PC);
m_PC++;
m_AR[m_opcode.b.h & 7] = m_ALU.w.l;
}
-void tms32025_device::lst()
+void tms3202x_device::lst()
{
m_mHackIgnoreARP = 1;
GETDATA(0, 0);
@@ -1041,7 +1062,7 @@ void tms32025_device::lst()
m_STR0 |= m_ALU.w.l; /* Must not affect INTM */
m_STR0 |= 0x0400;
}
-void tms32025_device::lst1()
+void tms3202x_device::lst1()
{
m_mHackIgnoreARP = 1;
GETDATA(0, 0);
@@ -1051,12 +1072,12 @@ void tms32025_device::lst1()
m_STR0 &= (~ARP_REG); /* ARB also gets copied to ARP */
m_STR0 |= (m_STR1 & ARB_REG);
}
-void tms32025_device::lt()
+void tms3202x_device::lt()
{
GETDATA(0, 0);
m_Treg = m_ALU.w.l;
}
-void tms32025_device::lta()
+void tms3202x_device::lta()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1066,7 +1087,7 @@ void tms32025_device::lta()
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::ltd() /** Careful with how memory is configured !! */
+void tms3202x_device::ltd() /** Careful with how memory is configured !! */
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1077,7 +1098,7 @@ void tms32025_device::ltd() /** Careful with how memory is configured !! */
CALCULATE_ADD_OVERFLOW(m_ALU.d);
CALCULATE_ADD_CARRY();
}
-void tms32025_device::ltp()
+void tms3202x_device::ltp()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1085,7 +1106,7 @@ void tms32025_device::ltp()
SHIFT_Preg_TO_ALU();
m_ACC.d = m_ALU.d;
}
-void tms32025_device::lts()
+void tms3202x_device::lts()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1095,7 +1116,7 @@ void tms32025_device::lts()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::mac() /** RAM blocks B0,B1,B2 may be important ! */
+void tms3202x_device::mac() /** RAM blocks B0,B1,B2 may be important ! */
{ /** Fix cycle timing **/
m_oldacc.d = m_ACC.d;
if (m_init_load_addr) {
@@ -1112,7 +1133,7 @@ void tms32025_device::mac() /** RAM blocks B0,B1,B2 may be important !
m_PFC++;
m_tms32025_dec_cycles += (2*CLK);
}
-void tms32025_device::macd() /** RAM blocks B0,B1,B2 may be important ! */
+void tms3202x_device::macd() /** RAM blocks B0,B1,B2 may be important ! */
{ /** Fix cycle timing **/
m_oldacc.d = m_ACC.d;
if (m_init_load_addr) {
@@ -1132,16 +1153,16 @@ void tms32025_device::macd() /** RAM blocks B0,B1,B2 may be important !
m_PFC++;
m_tms32025_dec_cycles += (2*CLK);
}
-void tms32025_device::mar() /* LARP and NOP are a subset of this instruction */
+void tms3202x_device::mar() /* LARP and NOP are a subset of this instruction */
{
if (m_opcode.b.l & 0x80) MODIFY_AR_ARP();
}
-void tms32025_device::mpy()
+void tms3202x_device::mpy()
{
GETDATA(0, 0);
m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
-void tms32025_device::mpya()
+void tms3202x_device::mpya()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -1151,12 +1172,12 @@ void tms32025_device::mpya()
GETDATA(0, 0);
m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
-void tms32025_device::mpyk()
+void tms3202x_device::mpyk()
{
m_Preg.d = (int16_t)m_Treg * ((int16_t)(m_opcode.w.l << 3) >> 3);
}
-void tms32025_device::mpys()
+void tms3202x_device::mpys()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -1166,12 +1187,12 @@ void tms32025_device::mpys()
GETDATA(0, 0);
m_Preg.d = (int16_t)(m_ALU.w.l) * (int16_t)(m_Treg);
}
-void tms32025_device::mpyu()
+void tms3202x_device::mpyu()
{
GETDATA(0, 0);
m_Preg.d = (uint16_t)(m_ALU.w.l) * (uint16_t)(m_Treg);
}
-void tms32025_device::neg()
+void tms3202x_device::neg()
{
if (m_ACC.d == 0x80000000) {
SET0(OV_FLAG);
@@ -1182,9 +1203,9 @@ void tms32025_device::neg()
else SET1(C_FLAG);
}
/*
-void tms32025_device::nop() { } // NOP is a subset of the MAR instruction
+void tms3202x_device::nop() { } // NOP is a subset of the MAR instruction
*/
-void tms32025_device::norm()
+void tms3202x_device::norm()
{
if (m_ACC.d !=0 && (int32_t)(m_ACC.d ^ (m_ACC.d << 1)) >= 0)
{
@@ -1194,63 +1215,63 @@ void tms32025_device::norm()
}
else SET1(TC_FLAG);
}
-void tms32025_device::or_()
+void tms3202x_device::or_()
{
GETDATA(0, 0);
m_ACC.w.l |= m_ALU.w.l;
}
-void tms32025_device::ork()
+void tms3202x_device::ork()
{
m_ALU.d = (uint16_t)m_cache.read_word(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d |= (m_ALU.d);
}
-void tms32025_device::out()
+void tms3202x_device::out()
{
GETDATA(0, 0);
m_io.write_word(m_opcode.b.h & 0xf, m_ALU.w.l );
}
-void tms32025_device::pac()
+void tms3202x_device::pac()
{
SHIFT_Preg_TO_ALU();
m_ACC.d = m_ALU.d;
}
-void tms32025_device::pop()
+void tms3202x_device::pop()
{
m_ACC.d = (uint16_t)POP_STACK();
}
-void tms32025_device::popd()
+void tms3202x_device::popd()
{
m_ALU.d = (uint16_t)POP_STACK();
PUTDATA(m_ALU.w.l);
}
-void tms32025_device::pshd()
+void tms3202x_device::pshd()
{
GETDATA(0, 0);
PUSH_STACK(m_ALU.w.l);
}
-void tms32025_device::push()
+void tms3202x_device::push()
{
PUSH_STACK(m_ACC.w.l);
}
-void tms32025_device::rc()
+void tms3202x_device::rc()
{
CLR1(C_FLAG);
}
-void tms32025_device::ret()
+void tms3202x_device::ret()
{
m_PC = POP_STACK();
}
-void tms32025_device::rfsm() /** serial port mode */
+void tms3202x_device::rfsm() /** serial port mode */
{
CLR1(FSM_FLAG);
}
-void tms32025_device::rhm()
+void tms3202x_device::rhm()
{
CLR1(HM_FLAG);
}
-void tms32025_device::rol()
+void tms3202x_device::rol()
{
m_ALU.d = m_ACC.d;
m_ACC.d <<= 1;
@@ -1258,7 +1279,7 @@ void tms32025_device::rol()
if (m_ALU.d & 0x80000000) SET1(C_FLAG);
else CLR1(C_FLAG);
}
-void tms32025_device::ror()
+void tms3202x_device::ror()
{
m_ALU.d = m_ACC.d;
m_ACC.d >>= 1;
@@ -1266,58 +1287,58 @@ void tms32025_device::ror()
if (m_ALU.d & 1) SET1(C_FLAG);
else CLR1(C_FLAG);
}
-void tms32025_device::rovm()
+void tms3202x_device::rovm()
{
CLR0(OVM_FLAG);
}
-void tms32025_device::rpt()
+void tms3202x_device::rpt()
{
GETDATA(0, 0);
m_RPTC = m_ALU.b.l;
m_init_load_addr = 2; /* Initiate repeat mode */
}
-void tms32025_device::rptk()
+void tms3202x_device::rptk()
{
m_RPTC = m_opcode.b.l;
m_init_load_addr = 2; /* Initiate repeat mode */
}
-void tms32025_device::rsxm()
+void tms3202x_device::rsxm()
{
CLR1(SXM_FLAG);
}
-void tms32025_device::rtc()
+void tms3202x_device::rtc()
{
CLR1(TC_FLAG);
}
-void tms32025_device::rtxm() /** Serial port stuff */
+void tms3202x_device::rtxm() /** Serial port stuff */
{
CLR1(TXM_FLAG);
}
-void tms32025_device::rxf()
+void tms3202x_device::rxf()
{
CLR1(XF_FLAG);
m_xf_out(CLEAR_LINE);
}
-void tms32025_device::sach()
+void tms3202x_device::sach()
{
m_ALU.d = (m_ACC.d << (m_opcode.b.h & 7));
PUTDATA(m_ALU.w.h);
}
-void tms32025_device::sacl()
+void tms3202x_device::sacl()
{
m_ALU.d = (m_ACC.d << (m_opcode.b.h & 7));
PUTDATA(m_ALU.w.l);
}
-void tms32025_device::sar_ar0() { PUTDATA(m_AR[0]); }
-void tms32025_device::sar_ar1() { PUTDATA(m_AR[1]); }
-void tms32025_device::sar_ar2() { PUTDATA(m_AR[2]); }
-void tms32025_device::sar_ar3() { PUTDATA(m_AR[3]); }
-void tms32025_device::sar_ar4() { PUTDATA(m_AR[4]); }
-void tms32025_device::sar_ar5() { PUTDATA(m_AR[5]); }
-void tms32025_device::sar_ar6() { PUTDATA(m_AR[6]); }
-void tms32025_device::sar_ar7() { PUTDATA(m_AR[7]); }
+void tms3202x_device::sar_ar0() { PUTDATA(m_AR[0]); }
+void tms3202x_device::sar_ar1() { PUTDATA(m_AR[1]); }
+void tms3202x_device::sar_ar2() { PUTDATA(m_AR[2]); }
+void tms3202x_device::sar_ar3() { PUTDATA(m_AR[3]); }
+void tms3202x_device::sar_ar4() { PUTDATA(m_AR[4]); }
+void tms3202x_device::sar_ar5() { PUTDATA(m_AR[5]); }
+void tms3202x_device::sar_ar6() { PUTDATA(m_AR[6]); }
+void tms3202x_device::sar_ar7() { PUTDATA(m_AR[7]); }
-void tms32025_device::sblk()
+void tms3202x_device::sblk()
{
m_oldacc.d = m_ACC.d;
if (SXM) m_ALU.d = (int16_t)m_cache.read_word(m_PC);
@@ -1328,22 +1349,22 @@ void tms32025_device::sblk()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::sbrk_ar()
+void tms3202x_device::sbrk_ar()
{
m_AR[ARP] -= m_opcode.b.l;
}
-void tms32025_device::sc()
+void tms3202x_device::sc()
{
SET1(C_FLAG);
}
-void tms32025_device::sfl()
+void tms3202x_device::sfl()
{
m_ALU.d = m_ACC.d;
m_ACC.d <<= 1;
if (m_ALU.d & 0x80000000) SET1(C_FLAG);
else CLR1(C_FLAG);
}
-void tms32025_device::sfr()
+void tms3202x_device::sfr()
{
m_ALU.d = m_ACC.d;
m_ACC.d >>= 1;
@@ -1353,19 +1374,19 @@ void tms32025_device::sfr()
if (m_ALU.d & 1) SET1(C_FLAG);
else CLR1(C_FLAG);
}
-void tms32025_device::sfsm() /** Serial port mode */
+void tms3202x_device::sfsm() /** Serial port mode */
{
SET1(FSM_FLAG);
}
-void tms32025_device::shm()
+void tms3202x_device::shm()
{
SET1(HM_FLAG);
}
-void tms32025_device::sovm()
+void tms3202x_device::sovm()
{
SET0(OVM_FLAG);
}
-void tms32025_device::spac()
+void tms3202x_device::spac()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -1373,21 +1394,21 @@ void tms32025_device::spac()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::sph()
+void tms3202x_device::sph()
{
SHIFT_Preg_TO_ALU();
PUTDATA(m_ALU.w.h);
}
-void tms32025_device::spl()
+void tms3202x_device::spl()
{
SHIFT_Preg_TO_ALU();
PUTDATA(m_ALU.w.l);
}
-void tms32025_device::spm()
+void tms3202x_device::spm()
{
MODIFY_PM((m_opcode.b.l & 3) );
}
-void tms32025_device::sqra()
+void tms3202x_device::sqra()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -1398,7 +1419,7 @@ void tms32025_device::sqra()
m_Treg = m_ALU.w.l;
m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l);
}
-void tms32025_device::sqrs()
+void tms3202x_device::sqrs()
{
m_oldacc.d = m_ACC.d;
SHIFT_Preg_TO_ALU();
@@ -1409,27 +1430,27 @@ void tms32025_device::sqrs()
m_Treg = m_ALU.w.l;
m_Preg.d = ((int16_t)m_ALU.w.l * (int16_t)m_ALU.w.l);
}
-void tms32025_device::sst()
+void tms3202x_device::sst()
{
PUTDATA_SST(m_STR0);
}
-void tms32025_device::sst1()
+void tms3202x_device::sst1()
{
PUTDATA_SST(m_STR1);
}
-void tms32025_device::ssxm()
+void tms3202x_device::ssxm()
{
SET1(SXM_FLAG);
}
-void tms32025_device::stc()
+void tms3202x_device::stc()
{
SET1(TC_FLAG);
}
-void tms32025_device::stxm() /** Serial port stuff */
+void tms3202x_device::stxm() /** Serial port stuff */
{
SET1(TXM_FLAG);
}
-void tms32025_device::sub()
+void tms3202x_device::sub()
{
m_oldacc.d = m_ACC.d;
GETDATA((m_opcode.b.h & 0xf), SXM);
@@ -1437,7 +1458,7 @@ void tms32025_device::sub()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::subb()
+void tms3202x_device::subb()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1447,7 +1468,7 @@ void tms32025_device::subb()
if (m_ACC.d == m_oldacc.d) {} /* edge case, carry remains same */
else CALCULATE_SUB_CARRY();
}
-void tms32025_device::subc()
+void tms3202x_device::subc()
{
m_oldacc.d = m_ACC.d;
GETDATA(15, SXM);
@@ -1465,7 +1486,7 @@ void tms32025_device::subc()
m_ACC.d = m_oldacc.d << 1;
}
}
-void tms32025_device::subh()
+void tms3202x_device::subh()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1478,7 +1499,7 @@ void tms32025_device::subh()
if (OVM) m_ACC.w.h = ((int16_t)m_oldacc.w.h < 0) ? 0x8000 : 0x7fff;
}
}
-void tms32025_device::subk()
+void tms3202x_device::subk()
{
m_oldacc.d = m_ACC.d;
m_ALU.d = (uint8_t)m_opcode.b.l;
@@ -1486,7 +1507,7 @@ void tms32025_device::subk()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::subs()
+void tms3202x_device::subs()
{
m_oldacc.d = m_ACC.d;
GETDATA(0, 0);
@@ -1494,7 +1515,7 @@ void tms32025_device::subs()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::subt()
+void tms3202x_device::subt()
{
m_oldacc.d = m_ACC.d;
GETDATA((m_Treg & 0xf), SXM);
@@ -1502,12 +1523,12 @@ void tms32025_device::subt()
CALCULATE_SUB_OVERFLOW(m_ALU.d);
CALCULATE_SUB_CARRY();
}
-void tms32025_device::sxf()
+void tms3202x_device::sxf()
{
SET1(XF_FLAG);
m_xf_out(ASSERT_LINE);
}
-void tms32025_device::tblr()
+void tms3202x_device::tblr()
{
if (m_init_load_addr) {
m_PFC = m_ACC.w.l;
@@ -1518,7 +1539,7 @@ void tms32025_device::tblr()
PUTDATA(m_ALU.w.l);
m_PFC++;
}
-void tms32025_device::tblw()
+void tms3202x_device::tblw()
{
if (m_init_load_addr) {
m_PFC = m_ACC.w.l;
@@ -1529,36 +1550,36 @@ void tms32025_device::tblw()
m_program.write_word(m_PFC, m_ALU.w.l);
m_PFC++;
}
-void tms32025_device::trap()
+void tms3202x_device::trap()
{
PUSH_STACK(m_PC);
m_PC = 0x001E; /* Trap vector */
}
-void tms32025_device::xor_()
+void tms3202x_device::xor_()
{
GETDATA(0, 0);
m_ACC.w.l ^= m_ALU.w.l;
}
-void tms32025_device::xork()
+void tms3202x_device::xork()
{
m_ALU.d = m_cache.read_word(m_PC);
m_PC++;
m_ALU.d <<= (m_opcode.b.h & 0xf);
m_ACC.d ^= m_ALU.d;
}
-void tms32025_device::zalh()
+void tms3202x_device::zalh()
{
GETDATA(0, 0);
m_ACC.w.h = m_ALU.w.l;
m_ACC.w.l = 0x0000;
}
-void tms32025_device::zalr()
+void tms3202x_device::zalr()
{
GETDATA(0, 0);
m_ACC.w.h = m_ALU.w.l;
m_ACC.w.l = 0x8000;
}
-void tms32025_device::zals()
+void tms3202x_device::zals()
{
GETDATA(0, 0);
m_ACC.w.l = m_ALU.w.l;
@@ -1570,81 +1591,81 @@ void tms32025_device::zals()
* Opcode Table (Cycles, Instruction)
***********************************************************************/
-const tms32025_device::tms32025_opcode tms32025_device::s_opcode_main[256]=
-{
-/*00*/ {1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },
-/*08*/ {1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },{1*CLK, &tms32025_device::add },
-/*10*/ {1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },
-/*18*/ {1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },{1*CLK, &tms32025_device::sub },
-/*20*/ {1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },
-/*28*/ {1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },{1*CLK, &tms32025_device::lac },
-/*30*/ {1*CLK, &tms32025_device::lar_ar0 },{1*CLK, &tms32025_device::lar_ar1 },{1*CLK, &tms32025_device::lar_ar2 },{1*CLK, &tms32025_device::lar_ar3 },{1*CLK, &tms32025_device::lar_ar4 },{1*CLK, &tms32025_device::lar_ar5 },{1*CLK, &tms32025_device::lar_ar6 },{1*CLK, &tms32025_device::lar_ar7 },
-/*38*/ {1*CLK, &tms32025_device::mpy },{1*CLK, &tms32025_device::sqra },{1*CLK, &tms32025_device::mpya },{1*CLK, &tms32025_device::mpys },{1*CLK, &tms32025_device::lt },{1*CLK, &tms32025_device::lta },{1*CLK, &tms32025_device::ltp },{1*CLK, &tms32025_device::ltd },
-/*40*/ {1*CLK, &tms32025_device::zalh },{1*CLK, &tms32025_device::zals },{1*CLK, &tms32025_device::lact },{1*CLK, &tms32025_device::addc },{1*CLK, &tms32025_device::subh },{1*CLK, &tms32025_device::subs },{1*CLK, &tms32025_device::subt },{1*CLK, &tms32025_device::subc },
-/*48*/ {1*CLK, &tms32025_device::addh },{1*CLK, &tms32025_device::adds },{1*CLK, &tms32025_device::addt },{1*CLK, &tms32025_device::rpt },{1*CLK, &tms32025_device::xor_ },{1*CLK, &tms32025_device::or_ },{1*CLK, &tms32025_device::and_ },{1*CLK, &tms32025_device::subb },
-/*50*/ {1*CLK, &tms32025_device::lst },{1*CLK, &tms32025_device::lst1 },{1*CLK, &tms32025_device::ldp },{1*CLK, &tms32025_device::lph },{1*CLK, &tms32025_device::pshd },{1*CLK, &tms32025_device::mar },{1*CLK, &tms32025_device::dmov },{1*CLK, &tms32025_device::bitt },
-/*58*/ {3*CLK, &tms32025_device::tblr },{2*CLK, &tms32025_device::tblw },{1*CLK, &tms32025_device::sqrs },{1*CLK, &tms32025_device::lts },{2*CLK, &tms32025_device::macd },{2*CLK, &tms32025_device::mac },{2*CLK, &tms32025_device::bc },{2*CLK, &tms32025_device::bnc },
-/*60*/ {1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },{1*CLK, &tms32025_device::sacl },
-/*68*/ {1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },{1*CLK, &tms32025_device::sach },
-/*70*/ {1*CLK, &tms32025_device::sar_ar0 },{1*CLK, &tms32025_device::sar_ar1 },{1*CLK, &tms32025_device::sar_ar2 },{1*CLK, &tms32025_device::sar_ar3 },{1*CLK, &tms32025_device::sar_ar4 },{1*CLK, &tms32025_device::sar_ar5 },{1*CLK, &tms32025_device::sar_ar6 },{1*CLK, &tms32025_device::sar_ar7 },
-/*78*/ {1*CLK, &tms32025_device::sst },{1*CLK, &tms32025_device::sst1 },{1*CLK, &tms32025_device::popd },{1*CLK, &tms32025_device::zalr },{1*CLK, &tms32025_device::spl },{1*CLK, &tms32025_device::sph },{1*CLK, &tms32025_device::adrk },{1*CLK, &tms32025_device::sbrk_ar },
-/*80*/ {2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },
-/*88*/ {2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },{2*CLK, &tms32025_device::in },
-/*90*/ {1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },
-/*98*/ {1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },{1*CLK, &tms32025_device::bit },
-/*A0*/ {1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },
-/*A8*/ {1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },
-/*B0*/ {1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },
-/*B8*/ {1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },{1*CLK, &tms32025_device::mpyk },
-/*C0*/ {1*CLK, &tms32025_device::lark_ar0 },{1*CLK, &tms32025_device::lark_ar1 },{1*CLK, &tms32025_device::lark_ar2 },{1*CLK, &tms32025_device::lark_ar3 },{1*CLK, &tms32025_device::lark_ar4 },{1*CLK, &tms32025_device::lark_ar5 },{1*CLK, &tms32025_device::lark_ar6 },{1*CLK, &tms32025_device::lark_ar7 },
-/*C8*/ {1*CLK, &tms32025_device::ldpk },{1*CLK, &tms32025_device::ldpk },{1*CLK, &tms32025_device::lack },{1*CLK, &tms32025_device::rptk },{1*CLK, &tms32025_device::addk },{1*CLK, &tms32025_device::subk },{1*CLK, &tms32025_device::opcodes_CE},{1*CLK, &tms32025_device::mpyu },
-/*D0*/ {1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{0*CLK, &tms32025_device::opcodes_Dx},
-/*D8*/ {1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},{1*CLK, &tms32025_device::opcodes_Dx},
-/*E0*/ {2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },
-/*E8*/ {2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },{2*CLK, &tms32025_device::out },
-/*F0*/ {2*CLK, &tms32025_device::bv },{2*CLK, &tms32025_device::bgz },{2*CLK, &tms32025_device::blez },{2*CLK, &tms32025_device::blz },{2*CLK, &tms32025_device::bgez },{2*CLK, &tms32025_device::bnz },{2*CLK, &tms32025_device::bz },{2*CLK, &tms32025_device::bnv },
-/*F8*/ {2*CLK, &tms32025_device::bbz },{2*CLK, &tms32025_device::bbnz },{2*CLK, &tms32025_device::bioz },{2*CLK, &tms32025_device::banz },{2*CLK, &tms32025_device::blkp },{2*CLK, &tms32025_device::blkd },{2*CLK, &tms32025_device::call },{2*CLK, &tms32025_device::br }
+const tms3202x_device::tms32025_opcode tms3202x_device::s_opcode_main[256]=
+{
+/*00*/ {1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },
+/*08*/ {1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },{1*CLK, &tms3202x_device::add },
+/*10*/ {1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },
+/*18*/ {1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },{1*CLK, &tms3202x_device::sub },
+/*20*/ {1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },
+/*28*/ {1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },{1*CLK, &tms3202x_device::lac },
+/*30*/ {1*CLK, &tms3202x_device::lar_ar0 },{1*CLK, &tms3202x_device::lar_ar1 },{1*CLK, &tms3202x_device::lar_ar2 },{1*CLK, &tms3202x_device::lar_ar3 },{1*CLK, &tms3202x_device::lar_ar4 },{1*CLK, &tms3202x_device::lar_ar5 },{1*CLK, &tms3202x_device::lar_ar6 },{1*CLK, &tms3202x_device::lar_ar7 },
+/*38*/ {1*CLK, &tms3202x_device::mpy },{1*CLK, &tms3202x_device::sqra },{1*CLK, &tms3202x_device::mpya },{1*CLK, &tms3202x_device::mpys },{1*CLK, &tms3202x_device::lt },{1*CLK, &tms3202x_device::lta },{1*CLK, &tms3202x_device::ltp },{1*CLK, &tms3202x_device::ltd },
+/*40*/ {1*CLK, &tms3202x_device::zalh },{1*CLK, &tms3202x_device::zals },{1*CLK, &tms3202x_device::lact },{1*CLK, &tms3202x_device::addc },{1*CLK, &tms3202x_device::subh },{1*CLK, &tms3202x_device::subs },{1*CLK, &tms3202x_device::subt },{1*CLK, &tms3202x_device::subc },
+/*48*/ {1*CLK, &tms3202x_device::addh },{1*CLK, &tms3202x_device::adds },{1*CLK, &tms3202x_device::addt },{1*CLK, &tms3202x_device::rpt },{1*CLK, &tms3202x_device::xor_ },{1*CLK, &tms3202x_device::or_ },{1*CLK, &tms3202x_device::and_ },{1*CLK, &tms3202x_device::subb },
+/*50*/ {1*CLK, &tms3202x_device::lst },{1*CLK, &tms3202x_device::lst1 },{1*CLK, &tms3202x_device::ldp },{1*CLK, &tms3202x_device::lph },{1*CLK, &tms3202x_device::pshd },{1*CLK, &tms3202x_device::mar },{1*CLK, &tms3202x_device::dmov },{1*CLK, &tms3202x_device::bitt },
+/*58*/ {3*CLK, &tms3202x_device::tblr },{2*CLK, &tms3202x_device::tblw },{1*CLK, &tms3202x_device::sqrs },{1*CLK, &tms3202x_device::lts },{2*CLK, &tms3202x_device::macd },{2*CLK, &tms3202x_device::mac },{2*CLK, &tms3202x_device::bc },{2*CLK, &tms3202x_device::bnc },
+/*60*/ {1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },{1*CLK, &tms3202x_device::sacl },
+/*68*/ {1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },{1*CLK, &tms3202x_device::sach },
+/*70*/ {1*CLK, &tms3202x_device::sar_ar0 },{1*CLK, &tms3202x_device::sar_ar1 },{1*CLK, &tms3202x_device::sar_ar2 },{1*CLK, &tms3202x_device::sar_ar3 },{1*CLK, &tms3202x_device::sar_ar4 },{1*CLK, &tms3202x_device::sar_ar5 },{1*CLK, &tms3202x_device::sar_ar6 },{1*CLK, &tms3202x_device::sar_ar7 },
+/*78*/ {1*CLK, &tms3202x_device::sst },{1*CLK, &tms3202x_device::sst1 },{1*CLK, &tms3202x_device::popd },{1*CLK, &tms3202x_device::zalr },{1*CLK, &tms3202x_device::spl },{1*CLK, &tms3202x_device::sph },{1*CLK, &tms3202x_device::adrk },{1*CLK, &tms3202x_device::sbrk_ar },
+/*80*/ {2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },
+/*88*/ {2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },{2*CLK, &tms3202x_device::in },
+/*90*/ {1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },
+/*98*/ {1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },{1*CLK, &tms3202x_device::bit },
+/*A0*/ {1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },
+/*A8*/ {1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },
+/*B0*/ {1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },
+/*B8*/ {1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },{1*CLK, &tms3202x_device::mpyk },
+/*C0*/ {1*CLK, &tms3202x_device::lark_ar0 },{1*CLK, &tms3202x_device::lark_ar1 },{1*CLK, &tms3202x_device::lark_ar2 },{1*CLK, &tms3202x_device::lark_ar3 },{1*CLK, &tms3202x_device::lark_ar4 },{1*CLK, &tms3202x_device::lark_ar5 },{1*CLK, &tms3202x_device::lark_ar6 },{1*CLK, &tms3202x_device::lark_ar7 },
+/*C8*/ {1*CLK, &tms3202x_device::ldpk },{1*CLK, &tms3202x_device::ldpk },{1*CLK, &tms3202x_device::lack },{1*CLK, &tms3202x_device::rptk },{1*CLK, &tms3202x_device::addk },{1*CLK, &tms3202x_device::subk },{1*CLK, &tms3202x_device::opcodes_CE},{1*CLK, &tms3202x_device::mpyu },
+/*D0*/ {1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{0*CLK, &tms3202x_device::opcodes_Dx},
+/*D8*/ {1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},{1*CLK, &tms3202x_device::opcodes_Dx},
+/*E0*/ {2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },
+/*E8*/ {2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },{2*CLK, &tms3202x_device::out },
+/*F0*/ {2*CLK, &tms3202x_device::bv },{2*CLK, &tms3202x_device::bgz },{2*CLK, &tms3202x_device::blez },{2*CLK, &tms3202x_device::blz },{2*CLK, &tms3202x_device::bgez },{2*CLK, &tms3202x_device::bnz },{2*CLK, &tms3202x_device::bz },{2*CLK, &tms3202x_device::bnv },
+/*F8*/ {2*CLK, &tms3202x_device::bbz },{2*CLK, &tms3202x_device::bbnz },{2*CLK, &tms3202x_device::bioz },{2*CLK, &tms3202x_device::banz },{2*CLK, &tms3202x_device::blkp },{2*CLK, &tms3202x_device::blkd },{2*CLK, &tms3202x_device::call },{2*CLK, &tms3202x_device::br }
};
-const tms32025_device::tms32025_opcode tms32025_device::s_opcode_CE_subset[256]= /* Instructions living under the CExx opcode */
-{
-/*00*/ {1*CLK, &tms32025_device::eint },{1*CLK, &tms32025_device::dint },{1*CLK, &tms32025_device::rovm },{1*CLK, &tms32025_device::sovm },{1*CLK, &tms32025_device::cnfd },{1*CLK, &tms32025_device::cnfp },{1*CLK, &tms32025_device::rsxm },{1*CLK, &tms32025_device::ssxm },
-/*08*/ {1*CLK, &tms32025_device::spm },{1*CLK, &tms32025_device::spm },{1*CLK, &tms32025_device::spm },{1*CLK, &tms32025_device::spm },{1*CLK, &tms32025_device::rxf },{1*CLK, &tms32025_device::sxf },{1*CLK, &tms32025_device::fort },{1*CLK, &tms32025_device::fort },
-/*10*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::pac },{1*CLK, &tms32025_device::apac },{1*CLK, &tms32025_device::spac },{0*CLK, &tms32025_device::illegal },
-/*18*/ {1*CLK, &tms32025_device::sfl },{1*CLK, &tms32025_device::sfr },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::abst },{1*CLK, &tms32025_device::push },{1*CLK, &tms32025_device::pop },{2*CLK, &tms32025_device::trap },{3*CLK, &tms32025_device::idle },
-/*20*/ {1*CLK, &tms32025_device::rtxm },{1*CLK, &tms32025_device::stxm },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::neg },{2*CLK, &tms32025_device::cala },{2*CLK, &tms32025_device::bacc },{2*CLK, &tms32025_device::ret },{1*CLK, &tms32025_device::cmpl },
-/*28*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*30*/ {1*CLK, &tms32025_device::rc },{1*CLK, &tms32025_device::sc },{1*CLK, &tms32025_device::rtc },{1*CLK, &tms32025_device::stc },{1*CLK, &tms32025_device::rol },{1*CLK, &tms32025_device::ror },{1*CLK, &tms32025_device::rfsm },{1*CLK, &tms32025_device::sfsm },
-/*38*/ {1*CLK, &tms32025_device::rhm },{1*CLK, &tms32025_device::shm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::conf },{1*CLK, &tms32025_device::conf },{1*CLK, &tms32025_device::conf },{1*CLK, &tms32025_device::conf },
-/*40*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*48*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*50*/ {1*CLK, &tms32025_device::cmpr },{1*CLK, &tms32025_device::cmpr },{1*CLK, &tms32025_device::cmpr },{1*CLK, &tms32025_device::cmpr },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*58*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*60*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*68*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*70*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*78*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*80*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*88*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*90*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*98*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*A0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*A8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*B0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*B8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*C0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*C8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*D0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*D8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*E0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*E8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*F0*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{1*CLK, &tms32025_device::norm },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },
-/*F8*/ {0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal },{0*CLK, &tms32025_device::illegal }
+const tms3202x_device::tms32025_opcode tms3202x_device::s_opcode_CE_subset[256]= /* Instructions living under the CExx opcode */
+{
+/*00*/ {1*CLK, &tms3202x_device::eint },{1*CLK, &tms3202x_device::dint },{1*CLK, &tms3202x_device::rovm },{1*CLK, &tms3202x_device::sovm },{1*CLK, &tms3202x_device::cnfd },{1*CLK, &tms3202x_device::cnfp },{1*CLK, &tms3202x_device::rsxm },{1*CLK, &tms3202x_device::ssxm },
+/*08*/ {1*CLK, &tms3202x_device::spm },{1*CLK, &tms3202x_device::spm },{1*CLK, &tms3202x_device::spm },{1*CLK, &tms3202x_device::spm },{1*CLK, &tms3202x_device::rxf },{1*CLK, &tms3202x_device::sxf },{1*CLK, &tms3202x_device::fort },{1*CLK, &tms3202x_device::fort },
+/*10*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::pac },{1*CLK, &tms3202x_device::apac },{1*CLK, &tms3202x_device::spac },{0*CLK, &tms3202x_device::illegal },
+/*18*/ {1*CLK, &tms3202x_device::sfl },{1*CLK, &tms3202x_device::sfr },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::abst },{1*CLK, &tms3202x_device::push },{1*CLK, &tms3202x_device::pop },{2*CLK, &tms3202x_device::trap },{3*CLK, &tms3202x_device::idle },
+/*20*/ {1*CLK, &tms3202x_device::rtxm },{1*CLK, &tms3202x_device::stxm },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::neg },{2*CLK, &tms3202x_device::cala },{2*CLK, &tms3202x_device::bacc },{2*CLK, &tms3202x_device::ret },{1*CLK, &tms3202x_device::cmpl },
+/*28*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*30*/ {1*CLK, &tms3202x_device::rc },{1*CLK, &tms3202x_device::sc },{1*CLK, &tms3202x_device::rtc },{1*CLK, &tms3202x_device::stc },{1*CLK, &tms3202x_device::rol },{1*CLK, &tms3202x_device::ror },{1*CLK, &tms3202x_device::rfsm },{1*CLK, &tms3202x_device::sfsm },
+/*38*/ {1*CLK, &tms3202x_device::rhm },{1*CLK, &tms3202x_device::shm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::conf },{1*CLK, &tms3202x_device::conf },{1*CLK, &tms3202x_device::conf },{1*CLK, &tms3202x_device::conf },
+/*40*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*48*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*50*/ {1*CLK, &tms3202x_device::cmpr },{1*CLK, &tms3202x_device::cmpr },{1*CLK, &tms3202x_device::cmpr },{1*CLK, &tms3202x_device::cmpr },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*58*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*60*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*68*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*70*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*78*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*80*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*88*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*90*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*98*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*A0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*A8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*B0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*B8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*C0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*C8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*D0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*D8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*E0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*E8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*F0*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{1*CLK, &tms3202x_device::norm },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },
+/*F8*/ {0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal },{0*CLK, &tms3202x_device::illegal }
};
-const tms32025_device::tms32025_opcode tms32025_device::s_opcode_Dx_subset[8]= /* Instructions living under the Dxxx opcode */
+const tms3202x_device::tms32025_opcode tms3202x_device::s_opcode_Dx_subset[8]= /* Instructions living under the Dxxx opcode */
{
-/*00*/ {2*CLK, &tms32025_device::lrlk },{2*CLK, &tms32025_device::lalk },{2*CLK, &tms32025_device::adlk },{2*CLK, &tms32025_device::sblk },{2*CLK, &tms32025_device::andk },{2*CLK, &tms32025_device::ork },{2*CLK, &tms32025_device::xork },{0*CLK, &tms32025_device::illegal }
+/*00*/ {2*CLK, &tms3202x_device::lrlk },{2*CLK, &tms3202x_device::lalk },{2*CLK, &tms3202x_device::adlk },{2*CLK, &tms3202x_device::sblk },{2*CLK, &tms3202x_device::andk },{2*CLK, &tms3202x_device::ork },{2*CLK, &tms3202x_device::xork },{0*CLK, &tms3202x_device::illegal }
};
@@ -1652,18 +1673,13 @@ const tms32025_device::tms32025_opcode tms32025_device::s_opcode_Dx_subset[8]=
/****************************************************************************
* Initialise the CPU emulation
****************************************************************************/
-void tms32025_device::device_start()
+void tms3202x_device::device_start()
{
space(AS_PROGRAM).cache(m_cache);
space(AS_PROGRAM).specific(m_program);
space(AS_DATA).specific(m_data);
space(AS_IO).specific(m_io);
- if (!m_mp_mc) // if pin 1 is 0 then we're using internal ROM
- {
- m_program.space().install_rom(0x0000, 0x0fff, memregion("internal")->base());
- }
-
m_PREVPC = 0;
m_PFC = 0;
m_STR0 = 0;
@@ -1715,7 +1731,6 @@ void tms32025_device::device_start()
save_item(NAME(m_oldacc.d));
save_item(NAME(m_memaccess));
save_item(NAME(m_waiting_for_serial_frame));
- save_item(NAME(m_mp_mc));
state_add( TMS32025_PC, "PC", m_PC).formatstr("%04X");
state_add( TMS32025_STR0, "STR0", m_STR0).formatstr("%04X");
@@ -1755,8 +1770,20 @@ void tms32025_device::device_start()
set_icountptr(m_icount);
}
+void tms32025_device::device_start()
+{
+ tms3202x_device::device_start();
+
+ if (!m_mp_mc) // if pin 1 is 0 then we're using internal ROM
+ {
+ m_program.space().install_rom(0x0000, 0x0fff, memregion("internal")->base());
+ }
+
+ save_item(NAME(m_mp_mc));
+}
+
-void tms32025_device::state_string_export(const device_state_entry &entry, std::string &str) const
+void tms3202x_device::state_string_export(const device_state_entry &entry, std::string &str) const
{
switch (entry.index())
{
@@ -1791,7 +1818,7 @@ void tms32025_device::state_string_export(const device_state_entry &entry, std::
/****************************************************************************
* Reset registers to their initial values
****************************************************************************/
-void tms32025_device::common_reset()
+void tms3202x_device::common_reset()
{
m_PC = 0; /* Starting address on a reset */
m_STR0 |= 0x0600; /* INTM and unused bit set to 1 */
@@ -1814,7 +1841,7 @@ void tms32025_device::common_reset()
m_init_load_addr = 1;
}
-void tms32025_device::device_reset()
+void tms3202x_device::device_reset()
{
if(m_STR1 & CNF0_REG) {
m_program.space().unmap_readwrite(0xff00, 0xffff);
@@ -1833,7 +1860,7 @@ void tms32026_device::device_reset()
/****************************************************************************
* Issue an interrupt if necessary
****************************************************************************/
-int tms32025_device::process_IRQs()
+inline int tms3202x_device::process_IRQs()
{
/********** Interrupt Flag Register (IFR) **********
| 5 | 4 | 3 | 2 | 1 | 0 |
@@ -1850,7 +1877,7 @@ int tms32025_device::process_IRQs()
PUSH_STACK(m_PC);
if ((m_IFR & 0x01) && (m_imr & 0x01)) { /* IRQ line 0 */
- //logerror("TMS32025: Active INT0\n");
+ //logerror("TMS3202x: Active INT0\n");
standard_irq_callback(0, m_PC);
m_PC = 0x0002;
m_idle = 0;
@@ -1859,7 +1886,7 @@ int tms32025_device::process_IRQs()
return m_tms32025_irq_cycles;
}
if ((m_IFR & 0x02) && (m_imr & 0x02)) { /* IRQ line 1 */
- //logerror("TMS32025: Active INT1\n");
+ //logerror("TMS3202x: Active INT1\n");
standard_irq_callback(1, m_PC);
m_PC = 0x0004;
m_idle = 0;
@@ -1868,7 +1895,7 @@ int tms32025_device::process_IRQs()
return m_tms32025_irq_cycles;
}
if ((m_IFR & 0x04) && (m_imr & 0x04)) { /* IRQ line 2 */
- //logerror("TMS32025: Active INT2\n");
+ //logerror("TMS3202x: Active INT2\n");
standard_irq_callback(2, m_PC);
m_PC = 0x0006;
m_idle = 0;
@@ -1877,7 +1904,7 @@ int tms32025_device::process_IRQs()
return m_tms32025_irq_cycles;
}
if ((m_IFR & 0x08) && (m_imr & 0x08)) { /* Timer IRQ (internal) */
-// logerror("TMS32025: Active TINT (Timer)\n");
+// logerror("TMS3202x: Active TINT (Timer)\n");
m_PC = 0x0018;
m_idle = 0;
m_IFR &= (~0x08);
@@ -1885,7 +1912,7 @@ int tms32025_device::process_IRQs()
return m_tms32025_irq_cycles;
}
if ((m_IFR & 0x10) && (m_imr & 0x10)) { /* Serial port receive IRQ (internal) */
-// logerror("TMS32025: Active RINT (Serial receive)\n");
+// logerror("TMS3202x: Active RINT (Serial receive)\n");
m_drr = m_dr_in();
m_PC = 0x001A;
m_idle = 0;
@@ -1894,7 +1921,7 @@ int tms32025_device::process_IRQs()
return m_tms32025_irq_cycles;
}
if ((m_IFR & 0x20) && (m_imr & 0x20)) { /* Serial port transmit IRQ (internal) */
-// logerror("TMS32025: Active XINT (Serial transmit)\n");
+// logerror("TMS3202x: Active XINT (Serial transmit)\n");
m_dx_out(m_dxr);
m_PC = 0x001C;
m_idle = 0;
@@ -1907,39 +1934,36 @@ int tms32025_device::process_IRQs()
}
-void tms32025_device::process_timer(int clocks)
+inline void tms3202x_device::process_timer(int clocks)
{
- int preclocks, ticks;
-
- /* easy case: no actual ticks */
-again:
- preclocks = CLK - m_timerover;
- if (clocks < preclocks)
+ while (true)
{
- m_timerover += clocks;
- m_icount -= clocks;
- return;
- }
+ int const preclocks = CLK - m_timerover;
+ if (clocks < preclocks)
+ {
+ /* easy case: no actual ticks */
+ m_timerover += clocks;
+ m_icount -= clocks;
+ break;
+ }
- /* if we're not going to overflow the timer, just count the clocks */
- ticks = 1 + (clocks - preclocks) / CLK;
- if (ticks <= m_tim)
- {
- m_icount -= clocks;
- m_timerover = clocks - (ticks - 1) * CLK - preclocks;
- m_tim -= ticks;
- }
+ int const ticks = 1 + (clocks - preclocks) / CLK;
+ if (ticks <= m_tim)
+ {
+ /* if we're not going to overflow the timer, just count the clocks */
+ m_icount -= clocks;
+ m_timerover = clocks - (ticks - 1) * CLK - preclocks;
+ m_tim -= ticks;
+ break;
+ }
- /* otherwise, overflow the timer and signal an interrupt */
- else
- {
+ /* otherwise, overflow the timer and signal an interrupt */
m_icount -= preclocks + CLK * m_tim;
m_timerover = 0;
m_tim = m_prd;
m_IFR |= 0x08;
clocks = process_IRQs(); /* Handle Timer IRQ */
- goto again;
}
}
@@ -1947,7 +1971,7 @@ again:
/****************************************************************************
* Execute ICount cycles. Exit when 0 or less
****************************************************************************/
-void tms32025_device::execute_run()
+void tms3202x_device::execute_run()
{
/**** Respond to external hold signal */
if (m_hold_in() == ASSERT_LINE) {
@@ -1976,11 +2000,11 @@ void tms32025_device::execute_run()
if (m_idle && m_IFR && m_icount > 0)
m_icount -= process_IRQs();
- while (m_idle && m_icount > 0)
- process_timer(m_icount);
-
- if (m_icount <= 0) debugger_instruction_hook(m_PC);
-
+ if (m_idle) {
+ debugger_wait_hook();
+ while (m_idle && m_icount > 0)
+ process_timer(m_icount);
+ }
while (m_icount > 0)
{
@@ -2084,7 +2108,7 @@ void tms32025_device::execute_run()
/****************************************************************************
* Set IRQ line state
****************************************************************************/
-void tms32025_device::execute_set_input(int irqline, int state)
+void tms3202x_device::execute_set_input(int irqline, int state)
{
if ( irqline == TMS32025_FSX ) {
if (state != CLEAR_LINE && m_waiting_for_serial_frame)
diff --git a/src/devices/cpu/tms32025/tms32025.h b/src/devices/cpu/tms32025/tms32025.h
index c234d2127ac..c35a2841c74 100644
--- a/src/devices/cpu/tms32025/tms32025.h
+++ b/src/devices/cpu/tms32025/tms32025.h
@@ -17,8 +17,8 @@
* *
\***************************************************************************/
-#ifndef MAME_TMS32025_TMS32025_H
-#define MAME_TMS32025_TMS32025_H
+#ifndef MAME_CPU_TMS32025_TMS32025_H
+#define MAME_CPU_TMS32025_TMS32025_H
#pragma once
@@ -58,13 +58,9 @@ enum
*/
-class tms32025_device : public cpu_device
+class tms3202x_device : public cpu_device
{
public:
- // construction/destruction
- tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
-
// configuration helpers
auto bio_in_cb() { return m_bio_in.bind(); }
auto hold_in_cb() { return m_hold_in.bind(); }
@@ -73,36 +69,33 @@ public:
auto dr_in_cb() { return m_dr_in.bind(); }
auto dx_out_cb() { return m_dx_out.bind(); }
- void set_mp_mc(bool state) { m_mp_mc = state; }
+ //void tms32025_program(address_map &map) ATTR_COLD;
+ void tms3202x_data(address_map &map) ATTR_COLD;
+ void tms32026_data(address_map &map) ATTR_COLD;
- //void tms32025_program(address_map &map);
- void tms32025_data(address_map &map);
- void tms32026_data(address_map &map);
protected:
- tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap);
+ // construction/destruction
+ tms3202x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, unsigned stack_depth, address_map_constructor prgmap, address_map_constructor datamap);
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 4; }
virtual uint32_t execute_max_cycles() const noexcept override { return 20; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- // device_state_interface overrides
+ // device_state_interface implementation
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- virtual const tiny_rom_entry *device_rom_region() const override;
-
void common_reset();
address_space_config m_program_config;
@@ -119,7 +112,7 @@ protected:
memory_access<16, 1, -1, ENDIANNESS_BIG>::specific m_data;
memory_access<16, 1, -1, ENDIANNESS_BIG>::specific m_io;
- typedef void ( tms32025_device::*opcode_func ) ();
+ typedef void ( tms3202x_device::*opcode_func ) ();
struct tms32025_opcode
{
uint8_t cycles;
@@ -136,6 +129,8 @@ protected:
devcb_read16 m_dr_in;
devcb_write16 m_dx_out;
+ unsigned const m_stack_limit;
+
/******************** CPU Internal Registers *******************/
uint16_t m_PREVPC; /* previous program counter */
@@ -147,8 +142,8 @@ protected:
PAIR m_ACC;
PAIR m_Preg;
uint16_t m_Treg;
- uint16_t m_AR[8];
- uint16_t m_STACK[8];
+ uint16_t m_AR[8]; // 5 for TMS32020, 8 for rest
+ uint16_t m_STACK[8]; // 4 level for TMS32020, 8 level for rest
PAIR m_ALU;
uint16_t m_drr, m_dxr, m_tim, m_prd, m_imr, m_greg;
@@ -170,7 +165,6 @@ protected:
int m_icount;
int m_mHackIgnoreARP; /* special handling for lst, lst1 instructions */
int m_waiting_for_serial_frame;
- bool m_mp_mc;
uint16_t drr_r();
void drr_w(uint16_t data);
@@ -185,25 +179,25 @@ protected:
uint16_t greg_r();
void greg_w(uint16_t data);
- inline void CLR0(uint16_t flag);
- inline void SET0(uint16_t flag);
- inline void CLR1(uint16_t flag);
- inline void SET1(uint16_t flag);
- inline void MODIFY_DP(int data);
- inline void MODIFY_PM(int data);
- inline void MODIFY_ARP(int data);
+ void CLR0(uint16_t flag);
+ void SET0(uint16_t flag);
+ void CLR1(uint16_t flag);
+ void SET1(uint16_t flag);
+ void MODIFY_DP(int data);
+ void MODIFY_PM(int data);
+ void MODIFY_ARP(int data);
uint16_t reverse_carry_add(uint16_t arg0, uint16_t arg1 );
- inline void MODIFY_AR_ARP();
- inline void CALCULATE_ADD_CARRY();
- inline void CALCULATE_SUB_CARRY();
- inline void CALCULATE_ADD_OVERFLOW(int32_t addval);
- inline void CALCULATE_SUB_OVERFLOW(int32_t subval);
- inline uint16_t POP_STACK();
- inline void PUSH_STACK(uint16_t data);
- inline void SHIFT_Preg_TO_ALU();
- inline void GETDATA(int shift,int signext);
- inline void PUTDATA(uint16_t data);
- inline void PUTDATA_SST(uint16_t data);
+ void MODIFY_AR_ARP();
+ void CALCULATE_ADD_CARRY();
+ void CALCULATE_SUB_CARRY();
+ void CALCULATE_ADD_OVERFLOW(int32_t addval);
+ void CALCULATE_SUB_OVERFLOW(int32_t subval);
+ uint16_t POP_STACK();
+ void PUSH_STACK(uint16_t data);
+ void SHIFT_Preg_TO_ALU();
+ void GETDATA(int shift,int signext);
+ void PUTDATA(uint16_t data);
+ void PUTDATA_SST(uint16_t data);
void opcodes_CE();
void opcodes_Dx();
void illegal();
@@ -359,10 +353,39 @@ protected:
void zalh();
void zalr();
void zals();
- inline int process_IRQs();
- inline void process_timer(int clocks);
+ int process_IRQs();
+ void process_timer(int clocks);
+};
+
+
+class tms32020_device : public tms3202x_device
+{
+public:
+ // construction/destruction
+ tms32020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
+class tms32025_device : public tms3202x_device
+{
+public:
+ // construction/destruction
+ tms32025_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // configuration helpers
+ void set_mp_mc(bool state) { m_mp_mc = state; }
+
+protected:
+ // construction/destruction
+ tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ tms32025_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prgmap, address_map_constructor datamap);
+
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
+
+ bool m_mp_mc;
+};
class tms32026_device : public tms32025_device
{
@@ -371,13 +394,14 @@ public:
tms32026_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
virtual void cnfd() override;
virtual void cnfp() override;
virtual void conf() override;
};
+DECLARE_DEVICE_TYPE(TMS32020, tms32020_device)
DECLARE_DEVICE_TYPE(TMS32025, tms32025_device)
DECLARE_DEVICE_TYPE(TMS32026, tms32026_device)
-#endif // MAME_TMS32025_TMS32025_H
+#endif // MAME_CPU_TMS32025_TMS32025_H
diff --git a/src/devices/cpu/tms32031/32031ops.hxx b/src/devices/cpu/tms32031/32031ops.hxx
index b9ae91e762c..f419c85c943 100644
--- a/src/devices/cpu/tms32031/32031ops.hxx
+++ b/src/devices/cpu/tms32031/32031ops.hxx
@@ -71,7 +71,7 @@
void tms3203x_device::illegal(uint32_t op)
{
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
logerror("Illegal op @ %06X: %08X (tbl=%03X)\n", m_pc - 1, op, op >> 21);
machine().debug_break();
@@ -5492,7 +5492,7 @@ inline void tms3203x_device::execute_delayed(uint32_t newpc)
{
m_delayed = true;
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
execute_one();
execute_one();
diff --git a/src/devices/cpu/tms32031/tms32031.cpp b/src/devices/cpu/tms32031/tms32031.cpp
index dd318f7debf..afa635c1b61 100644
--- a/src/devices/cpu/tms32031/tms32031.cpp
+++ b/src/devices/cpu/tms32031/tms32031.cpp
@@ -817,6 +817,7 @@ void tms3203x_device::check_irqs()
if (!m_delayed)
{
uint16_t intmask = 1 << (whichtrap - 1);
+ standard_irq_callback(whichtrap - 1, m_pc);
// bit in IF is cleared when interrupt is taken
IREG(TMR_IF) &= ~intmask;
@@ -855,17 +856,6 @@ uint32_t tms3203x_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t tms3203x_device::execute_input_lines() const noexcept
-{
- return 14;
-}
-
-
-//-------------------------------------------------
// execute_clocks_to_cycles - convert the raw
// clock into cycles per second
//-------------------------------------------------
@@ -965,12 +955,13 @@ void tms3203x_device::execute_run()
// if we're idling, just eat the cycles
if (m_is_idling)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
// non-debug case
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
while (m_icount > 0)
{
diff --git a/src/devices/cpu/tms32031/tms32031.h b/src/devices/cpu/tms32031/tms32031.h
index 975a8d1cb32..282ac81b7d2 100644
--- a/src/devices/cpu/tms32031/tms32031.h
+++ b/src/devices/cpu/tms32031/tms32031.h
@@ -144,18 +144,17 @@ protected:
// construction/destruction
tms3203x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t chiptype, int clock_per_inst, address_map_constructor internal_map);
- void common_3203x(address_map &map);
+ void common_3203x(address_map &map) ATTR_COLD;
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override;
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override;
virtual void execute_run() override;
@@ -804,7 +803,7 @@ class tms32030_device : public tms3203x_device
public:
// construction/destruction
tms32030_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void internal_32030(address_map &map);
+ void internal_32030(address_map &map) ATTR_COLD;
};
@@ -815,7 +814,7 @@ class tms32031_device : public tms3203x_device
public:
// construction/destruction
tms32031_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void internal_32031(address_map &map);
+ void internal_32031(address_map &map) ATTR_COLD;
};
@@ -826,7 +825,7 @@ class tms32032_device : public tms3203x_device
public:
// construction/destruction
tms32032_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void internal_32032(address_map &map);
+ void internal_32032(address_map &map) ATTR_COLD;
};
@@ -837,7 +836,7 @@ class tms32033_device : public tms3203x_device
public:
// construction/destruction
tms32033_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void internal_32033(address_map &map);
+ void internal_32033(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/tms32051/tms32051.h b/src/devices/cpu/tms32051/tms32051.h
index 63552d7e605..f3df84fa4d3 100644
--- a/src/devices/cpu/tms32051/tms32051.h
+++ b/src/devices/cpu/tms32051/tms32051.h
@@ -62,19 +62,18 @@ public:
uint16_t cpuregs_r(offs_t offset);
void cpuregs_w(offs_t offset, uint16_t data);
- void tms32051_internal_data(address_map &map);
- void tms32051_internal_pgm(address_map &map);
+ void tms32051_internal_data(address_map &map) ATTR_COLD;
+ void tms32051_internal_pgm(address_map &map) ATTR_COLD;
protected:
tms32051_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_pgm, address_map_constructor internal_data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
- virtual uint32_t execute_input_lines() const noexcept override { return 6; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -375,10 +374,10 @@ public:
// construction/destruction
tms32053_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void tms32053_internal_data(address_map &map);
- void tms32053_internal_pgm(address_map &map);
+ void tms32053_internal_data(address_map &map) ATTR_COLD;
+ void tms32053_internal_pgm(address_map &map) ATTR_COLD;
protected:
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
diff --git a/src/devices/cpu/tms32082/tms32082.h b/src/devices/cpu/tms32082/tms32082.h
index 415ce95d564..7a66698d9d6 100644
--- a/src/devices/cpu/tms32082/tms32082.h
+++ b/src/devices/cpu/tms32082/tms32082.h
@@ -73,16 +73,15 @@ public:
template <typename... T> void set_command_callback(T &&... args) { m_cmd_callback.set(std::forward<T>(args)...); }
- void mp_internal_map(address_map &map);
+ void mp_internal_map(address_map &map) ATTR_COLD;
protected:
// device level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -164,16 +163,15 @@ public:
PP_PC = 1
};
- void pp_internal_map(address_map &map);
+ void pp_internal_map(address_map &map) ATTR_COLD;
protected:
// device level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/tms34010/34010ops.hxx b/src/devices/cpu/tms34010/34010ops.hxx
index bb4791d9d76..4aa88eb300d 100644
--- a/src/devices/cpu/tms34010/34010ops.hxx
+++ b/src/devices/cpu/tms34010/34010ops.hxx
@@ -180,6 +180,7 @@ void tms340x0_device::cmp_xy_b(uint16_t op) { CMP_XY(B); }
void tms340x0_device::cpw_a(uint16_t op) { CPW(A); }
void tms340x0_device::cpw_b(uint16_t op) { CPW(B); }
+// TODO: Handle cycles properly, currently we assume power of two
#define CVXYL(R) \
{ \
R##REG(DSTREG(op)) = DXYTOL(R##REG_XY(SRCREG(op))); \
@@ -2117,7 +2118,7 @@ void tms34020_device::clip(uint16_t op)
bool is_b = wend.y > daddr.y;
if (!(is_l || is_r || is_t || is_b))
{
- // ...no itersection, set flags and return
+ // ...no intersection, set flags and return
m_st |= STBIT_Z | STBIT_V;
// TODO: manual does not specify cycles, only states that this is complex instruction
COUNT_CYCLES(3);
@@ -2245,7 +2246,34 @@ void tms34020_device::cvdxyl_a(uint16_t op)
void tms34020_device::cvdxyl_b(uint16_t op)
{
- logerror("020:cvdxyl_b\n");
+ // Convert destination XY address to linear
+ // (Y half of Rd x DPTCH) + (X half of Rd x PSIZE) + (A4 or B4) -> Rd
+ const XY rd = BREG_XY(DSTREG(op));
+ const off_t dptch = DPTCH();
+ const off_t offset = BREG(4);
+
+ const off_t result = (rd.y * dptch) + (rd.x << m_pixelshift) + offset;
+ // logerror("020:cvdxyl_b: PC=0x%08x: DADDR=%x, x=%x, y=%x, DPTCH=%d, PIXELSIZE=%d, OFFSET=%d, result: %x\n",
+ // m_pc, rd, rd.x, rd.y, dptch, m_pixelshift, offset, result);
+
+ DADDR() = result;
+
+ // Handle cycles related to pitch:
+ switch (population_count_32(dptch))
+ {
+ // power of 2: 2 clocks
+ case 1:
+ COUNT_CYCLES(2);
+ break;
+ // 2 powers of 2: 3 clocks
+ case 2:
+ COUNT_CYCLES(3);
+ break;
+ // arbitrary: 14 clocks
+ default:
+ COUNT_CYCLES(14);
+ break;
+ }
}
void tms34020_device::cvmxyl_a(uint16_t op)
@@ -2413,7 +2441,7 @@ void tms34020_device::setcdp(uint16_t op)
// Check whether we're dealing with an even number
if ((dptch & 1) == 0)
{
- switch(population_count_32(dptch))
+ switch (population_count_32(dptch))
{
// .. only single bit set, pitch is power of two!
case 1:
@@ -2472,15 +2500,21 @@ void tms34020_device::trapl(uint16_t op)
void tms34020_device::vblt_b_l(uint16_t op)
{
+ // Linear VRAM pixel block transfer
+ // logerror("020:vblt_b_l: SADDR=0x%x, SPTCH=%d, DADDR=0x%x, DPTCH=%d, DYDX=(%dx%d), TEMP=%x\n", SADDR(), SPTCH(), DADDR(), DPTCH(), DYDX_X(), DYDX_Y(), TEMP());
logerror("020:vblt_b_l\n");
}
void tms34020_device::vfill_l(uint16_t op)
{
+ // Linear VRAM fast fill
+ // logerror("020:vfill_l: DADDR=0x%x, DPTCH=%d, DYDX=(%dx%d)\n", DADDR(), DPTCH(), DYDX_X(), DYDX_Y());
logerror("020:vfill_l\n");
}
void tms34020_device::vlcol(uint16_t op)
{
+ // Latch COLOR1 into the VRAM color registers
+ //logerror("020:vlcol: COLOR1=%x\n", COLOR1());
logerror("020:vlcol\n");
}
diff --git a/src/devices/cpu/tms34010/tms34010.cpp b/src/devices/cpu/tms34010/tms34010.cpp
index 5f83443da68..cc2d2481a0c 100644
--- a/src/devices/cpu/tms34010/tms34010.cpp
+++ b/src/devices/cpu/tms34010/tms34010.cpp
@@ -863,6 +863,7 @@ void tms340x0_device::execute_run()
/* Get out if CPU is halted. Absolutely no interrupts must be taken!!! */
if (IOREG(REG_HSTCTLH) & 0x8000)
{
+ debugger_wait_hook();
m_icount = 0;
return;
}
@@ -876,7 +877,7 @@ void tms340x0_device::execute_run()
/* check interrupts first */
m_executing = true;
check_interrupt();
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) == 0)
+ if (!debugger_enabled())
{
do
{
@@ -1547,7 +1548,8 @@ u16 tms34010_device::io_register_r(offs_t offset)
{
int result, total;
- LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg_name[offset]);
+ if (!machine().side_effects_disabled())
+ LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg_name[offset]);
switch (offset)
{
@@ -1588,7 +1590,8 @@ u16 tms34020_device::io_register_r(offs_t offset)
{
int result, total;
- LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg020_name[offset]);
+ if (!machine().side_effects_disabled())
+ LOGCONTROLREGS("%s: read %s\n", machine().describe_context(), ioreg020_name[offset]);
switch (offset)
{
@@ -1718,13 +1721,16 @@ u16 tms340x0_device::host_r(offs_t offset)
addr = (IOREG(REG_HSTADRH) << 16) | IOREG(REG_HSTADRL);
result = TMS34010_RDMEM_WORD(addr & 0xfffffff0);
- /* optional postincrement (it says preincrement, but data is preloaded, so it
- is effectively a postincrement */
- if (IOREG(REG_HSTCTLH) & 0x1000)
+ if (!machine().side_effects_disabled())
{
- addr += 0x10;
- IOREG(REG_HSTADRH) = addr >> 16;
- IOREG(REG_HSTADRL) = (uint16_t)addr;
+ /* optional postincrement (it says preincrement, but data is preloaded, so it
+ is effectively a postincrement */
+ if (IOREG(REG_HSTCTLH) & 0x1000)
+ {
+ addr += 0x10;
+ IOREG(REG_HSTADRH) = addr >> 16;
+ IOREG(REG_HSTADRL) = (uint16_t)addr;
+ }
}
break;
@@ -1735,7 +1741,8 @@ u16 tms340x0_device::host_r(offs_t offset)
/* error case */
default:
- logerror("tms34010_host_control_r called on invalid register %d\n", reg);
+ if (!machine().side_effects_disabled())
+ logerror("tms34010_host_control_r called on invalid register %d\n", reg);
break;
}
diff --git a/src/devices/cpu/tms34010/tms34010.h b/src/devices/cpu/tms34010/tms34010.h
index b9165b17f77..f53843e3452 100644
--- a/src/devices/cpu/tms34010/tms34010.h
+++ b/src/devices/cpu/tms34010/tms34010.h
@@ -255,14 +255,13 @@ protected:
tms340x0_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_regs_map, bool is_34020);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 10000; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -966,12 +965,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 8 - 1) / 8; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 8); }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void internal_regs_map(address_map &map);
+ void internal_regs_map(address_map &map) ATTR_COLD;
virtual uint16_t ROPCODE() override;
virtual void execute_op(uint16_t op) override;
@@ -1006,12 +1005,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void internal_regs_map(address_map &map);
+ void internal_regs_map(address_map &map) ATTR_COLD;
virtual uint16_t ROPCODE() override;
virtual void execute_op(uint16_t op) override;
diff --git a/src/devices/cpu/tms57002/tms57002.cpp b/src/devices/cpu/tms57002/tms57002.cpp
index f93ca5796bf..3485ba25695 100644
--- a/src/devices/cpu/tms57002/tms57002.cpp
+++ b/src/devices/cpu/tms57002/tms57002.cpp
@@ -920,21 +920,20 @@ void tms57002_device::execute_run()
icount = 0;
}
-void tms57002_device::sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs)
+void tms57002_device::sound_stream_update(sound_stream &stream)
{
- assert(inputs[0].samples() == 1);
- assert(outputs[0].samples() == 1);
+ assert(stream.samples() == 1);
- stream_buffer::sample_t in_scale = 32768.0 * ((st0 & ST0_SIM) ? 256.0 : 1.0);
- si[0] = s32(inputs[0].get(0) * in_scale) & 0xffffff;
- si[1] = s32(inputs[1].get(0) * in_scale) & 0xffffff;
- si[2] = s32(inputs[2].get(0) * in_scale) & 0xffffff;
- si[3] = s32(inputs[3].get(0) * in_scale) & 0xffffff;
+ sound_stream::sample_t in_scale = 32768.0 * ((st0 & ST0_SIM) ? 256.0 : 1.0);
+ si[0] = s32(stream.get(0, 0) * in_scale) & 0xffffff;
+ si[1] = s32(stream.get(1, 0) * in_scale) & 0xffffff;
+ si[2] = s32(stream.get(2, 0) * in_scale) & 0xffffff;
+ si[3] = s32(stream.get(3, 0) * in_scale) & 0xffffff;
- outputs[0].put_int(0, s32(so[0] << 8) >> 1, 32768 * 32768);
- outputs[1].put_int(0, s32(so[1] << 8) >> 1, 32768 * 32768);
- outputs[2].put_int(0, s32(so[2] << 8) >> 1, 32768 * 32768);
- outputs[3].put_int(0, s32(so[3] << 8) >> 1, 32768 * 32768);
+ stream.put(0, 0, s32(so[0] << 8) / 2147483648.0);
+ stream.put(1, 0, s32(so[1] << 8) / 2147483648.0);
+ stream.put(2, 0, s32(so[2] << 8) / 2147483648.0);
+ stream.put(3, 0, s32(so[3] << 8) / 2147483648.0);
sync_w(1);
}
@@ -1023,11 +1022,6 @@ u32 tms57002_device::execute_max_cycles() const noexcept
return 3;
}
-u32 tms57002_device::execute_input_lines() const noexcept
-{
- return 0;
-}
-
device_memory_interface::space_config_vector tms57002_device::memory_space_config() const
{
return space_config_vector {
diff --git a/src/devices/cpu/tms57002/tms57002.h b/src/devices/cpu/tms57002/tms57002.h
index dd0967e72a8..547afff6d08 100644
--- a/src/devices/cpu/tms57002/tms57002.h
+++ b/src/devices/cpu/tms57002/tms57002.h
@@ -31,16 +31,15 @@ public:
int pc0_r();
void sync_w(int state);
- void internal_pgm(address_map &map);
+ void internal_pgm(address_map &map) ATTR_COLD;
protected:
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void sound_stream_update(sound_stream &stream) override;
virtual space_config_vector memory_space_config() const override;
virtual u32 execute_min_cycles() const noexcept override;
virtual u32 execute_max_cycles() const noexcept override;
- virtual u32 execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
diff --git a/src/devices/cpu/tms7000/tms7000.h b/src/devices/cpu/tms7000/tms7000.h
index 3c39ed217b6..a6b22f8d5a5 100644
--- a/src/devices/cpu/tms7000/tms7000.h
+++ b/src/devices/cpu/tms7000/tms7000.h
@@ -60,13 +60,13 @@ public:
bool chip_is_family_70x2() const { return chip_get_family() == CHIP_FAMILY_70X2; }
bool chip_is_family_70cx2() const { return chip_get_family() == CHIP_FAMILY_70CX2; }
- void tms7000_mem(address_map &map);
- void tms7001_mem(address_map &map);
- void tms7002_mem(address_map &map);
- void tms7020_mem(address_map &map);
- void tms7040_mem(address_map &map);
- void tms7041_mem(address_map &map);
- void tms7042_mem(address_map &map);
+ void tms7000_mem(address_map &map) ATTR_COLD;
+ void tms7001_mem(address_map &map) ATTR_COLD;
+ void tms7002_mem(address_map &map) ATTR_COLD;
+ void tms7020_mem(address_map &map) ATTR_COLD;
+ void tms7040_mem(address_map &map) ATTR_COLD;
+ void tms7041_mem(address_map &map) ATTR_COLD;
+ void tms7042_mem(address_map &map) ATTR_COLD;
protected:
// chip info flags
static constexpr uint32_t CHIP_IS_CMOS = 0x01;
@@ -78,15 +78,14 @@ protected:
tms7000_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal, uint32_t info_flags);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + m_divider - 1) / m_divider; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * m_divider); }
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 49; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual void execute_run() override;
virtual void execute_set_input(int extline, int state) override;
@@ -337,11 +336,11 @@ public:
uint8_t e_bus_data_r() { return machine().side_effects_disabled() ? 0xff : ((m_control & 0x20) ? 0xff : m_port_in_cb[4]()); }
void e_bus_data_w(uint8_t data) { if (~m_control & 0x20) m_port_out_cb[4](data); }
- void tms70c46_mem(address_map &map);
+ void tms70c46_mem(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
uint8_t m_control;
diff --git a/src/devices/cpu/tms9900/9900dasm.h b/src/devices/cpu/tms9900/9900dasm.h
index bdae664e297..5b5df98313c 100644
--- a/src/devices/cpu/tms9900/9900dasm.h
+++ b/src/devices/cpu/tms9900/9900dasm.h
@@ -7,8 +7,8 @@
*
*****************************************************************************/
-#ifndef MAME_CPU_TMS9900_TMS9900DASM_H
-#define MAME_CPU_TMS9900_TMS9900DASM_H
+#ifndef MAME_CPU_TMS9900_9900DASM_H
+#define MAME_CPU_TMS9900_9900DASM_H
#pragma once
@@ -133,4 +133,4 @@ private:
void print_arg (std::ostream &stream, int mode, int arg, const data_buffer &params, offs_t &PC);
};
-#endif
+#endif // MAME_CPU_TMS9900_9900DASM_H
diff --git a/src/devices/cpu/tms9900/ti990_10.cpp b/src/devices/cpu/tms9900/ti990_10.cpp
index 99cf65dfb0b..b31849737d4 100644
--- a/src/devices/cpu/tms9900/ti990_10.cpp
+++ b/src/devices/cpu/tms9900/ti990_10.cpp
@@ -118,11 +118,6 @@ uint32_t ti990_10_device::execute_max_cycles() const noexcept
return 10;
}
-uint32_t ti990_10_device::execute_input_lines() const noexcept
-{
- return 2;
-}
-
// TODO: check 9900dasm
std::unique_ptr<util::disasm_interface> ti990_10_device::create_disassembler()
{
diff --git a/src/devices/cpu/tms9900/ti990_10.h b/src/devices/cpu/tms9900/ti990_10.h
index 93d3ecec4a0..428e27dfde6 100644
--- a/src/devices/cpu/tms9900/ti990_10.h
+++ b/src/devices/cpu/tms9900/ti990_10.h
@@ -26,9 +26,8 @@ protected:
void device_reset() override;
// device_execute_interface overrides
- uint32_t execute_min_cycles() const noexcept override;
- uint32_t execute_max_cycles() const noexcept override;
- uint32_t execute_input_lines() const noexcept override;
+ uint32_t execute_min_cycles() const noexcept override;
+ uint32_t execute_max_cycles() const noexcept override;
void execute_set_input(int irqline, int state) override;
void execute_run() override;
diff --git a/src/devices/cpu/tms9900/tms9900.cpp b/src/devices/cpu/tms9900/tms9900.cpp
index 49e60c1a28b..5ae5cb54f6b 100644
--- a/src/devices/cpu/tms9900/tms9900.cpp
+++ b/src/devices/cpu/tms9900/tms9900.cpp
@@ -1346,6 +1346,12 @@ void tms99xx_device::service_interrupt()
m_reset = false;
LOG("** RESET triggered\n");
+
+ // RESET could occur during a data derivation sequence, so we have to
+ // prevent the execution loop to return into that sequence by
+ // clearing the return index. This fixes a bug that leads to undefined
+ // behaviour in that situation.
+ m_caller_index = NOPRG;
}
else
{
@@ -2765,15 +2771,6 @@ uint32_t tms99xx_device::execute_max_cycles() const noexcept
return 124;
}
-uint32_t tms99xx_device::execute_input_lines() const noexcept
-{
- return 2;
-}
-
-// clocks to cycles, cycles to clocks = id
-// execute_default_irq_vector = 0
-// execute_burn = nop
-
// device_disasm_interface overrides
std::unique_ptr<util::disasm_interface> tms99xx_device::create_disassembler()
diff --git a/src/devices/cpu/tms9900/tms9900.h b/src/devices/cpu/tms9900/tms9900.h
index 67e6fd034c1..c67ed48999f 100644
--- a/src/devices/cpu/tms9900/tms9900.h
+++ b/src/devices/cpu/tms9900/tms9900.h
@@ -74,7 +74,6 @@ protected:
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
diff --git a/src/devices/cpu/tms9900/tms9980a.cpp b/src/devices/cpu/tms9900/tms9980a.cpp
index a57bb4d3639..9f5d058705b 100644
--- a/src/devices/cpu/tms9900/tms9980a.cpp
+++ b/src/devices/cpu/tms9900/tms9980a.cpp
@@ -283,15 +283,6 @@ uint32_t tms9980a_device::execute_max_cycles() const noexcept
return 136;
}
-uint32_t tms9980a_device::execute_input_lines() const noexcept
-{
- return 8;
-}
-
-// clocks to cycles, cycles to clocks = id
-// execute_default_irq_vector = 0
-// execute_burn = nop
-
// device_disasm_interface overrides
std::unique_ptr<util::disasm_interface> tms9980a_device::create_disassembler()
diff --git a/src/devices/cpu/tms9900/tms9980a.h b/src/devices/cpu/tms9900/tms9980a.h
index c93212e6a4c..4219c14f819 100644
--- a/src/devices/cpu/tms9900/tms9980a.h
+++ b/src/devices/cpu/tms9900/tms9980a.h
@@ -40,7 +40,6 @@ protected:
uint32_t execute_min_cycles() const noexcept override;
uint32_t execute_max_cycles() const noexcept override;
- uint32_t execute_input_lines() const noexcept override;
void execute_set_input(int irqline, int state) override;
// The clock is internally divided by 4
diff --git a/src/devices/cpu/tms9900/tms9995.cpp b/src/devices/cpu/tms9900/tms9995.cpp
index 905357dc597..7f721c25197 100644
--- a/src/devices/cpu/tms9900/tms9995.cpp
+++ b/src/devices/cpu/tms9900/tms9995.cpp
@@ -3512,11 +3512,6 @@ uint32_t tms9995_device::execute_max_cycles() const noexcept
return 47;
}
-uint32_t tms9995_device::execute_input_lines() const noexcept
-{
- return 2;
-}
-
std::unique_ptr<util::disasm_interface> tms9995_device::create_disassembler()
{
return std::make_unique<tms9900_disassembler>(TMS9995_ID);
diff --git a/src/devices/cpu/tms9900/tms9995.h b/src/devices/cpu/tms9900/tms9995.h
index 13f16ffafff..c175906eeaf 100644
--- a/src/devices/cpu/tms9900/tms9995.h
+++ b/src/devices/cpu/tms9900/tms9995.h
@@ -7,8 +7,8 @@
Also see tms9900.h for types of TMS99xx processors.
*/
-#ifndef MAME_CPU_TMS9995_TMS9995_H
-#define MAME_CPU_TMS9995_TMS9995_H
+#ifndef MAME_CPU_TMS9900_TMS9995_H
+#define MAME_CPU_TMS9900_TMS9995_H
#pragma once
@@ -68,7 +68,6 @@ protected:
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_set_input(int irqline, int state) override;
virtual void execute_run() override;
@@ -417,4 +416,4 @@ public:
}
};
-#endif // MAME_CPU_TMS9995_TMS9995_H
+#endif // MAME_CPU_TMS9900_TMS9995_H
diff --git a/src/devices/cpu/tms9900/tms99com.h b/src/devices/cpu/tms9900/tms99com.h
index 02cc729263d..a293f161b53 100644
--- a/src/devices/cpu/tms9900/tms99com.h
+++ b/src/devices/cpu/tms9900/tms99com.h
@@ -42,8 +42,10 @@
significant changes (e.g. privileged mode, address mapper).
*/
-#ifndef __TMS99COMMON_H__
-#define __TMS99COMMON_H__
+#ifndef MAME_CPU_TMS9900_TMS99COM_H
+#define MAME_CPU_TMS9900_TMS99COM_H
+
+#pragma once
enum
{
@@ -80,4 +82,5 @@ enum
TMS99xx_BUS_DBIN = 1,
TMS99xx_BUS_IAQ = 2
};
-#endif /* __TMS99COMMON_H__ */
+
+#endif // MAME_CPU_TMS9900_TMS99COM_H
diff --git a/src/devices/cpu/tx0/tx0.cpp b/src/devices/cpu/tx0/tx0.cpp
index c2d18c6c6b0..6887eb238b7 100644
--- a/src/devices/cpu/tx0/tx0.cpp
+++ b/src/devices/cpu/tx0/tx0.cpp
@@ -262,7 +262,7 @@ void tx0_64kw_device::execute_run()
if ((! m_run) && (! m_rim))
{
- debugger_instruction_hook(PC);
+ debugger_wait_hook();
m_icount = 0; /* if processor is stopped, just burn cycles */
}
else if (m_rim)
@@ -368,7 +368,7 @@ void tx0_8kw_device::execute_run()
if ((! m_run) && (! m_rim))
{
- debugger_instruction_hook(PC);
+ debugger_wait_hook();
m_icount = 0; /* if processor is stopped, just burn cycles */
}
else if (m_rim)
diff --git a/src/devices/cpu/tx0/tx0.h b/src/devices/cpu/tx0/tx0.h
index 8c57c08e8f7..035c44476af 100644
--- a/src/devices/cpu/tx0/tx0.h
+++ b/src/devices/cpu/tx0/tx0.h
@@ -44,8 +44,8 @@ protected:
tx0_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addr_bits, int address_mask, int ir_mask);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
diff --git a/src/devices/cpu/ucom4/ucom4.cpp b/src/devices/cpu/ucom4/ucom4.cpp
index 0a0ea9b604a..af0f37f4c99 100644
--- a/src/devices/cpu/ucom4/ucom4.cpp
+++ b/src/devices/cpu/ucom4/ucom4.cpp
@@ -495,6 +495,6 @@ void ucom4_cpu_device::execute_run()
}
break; // 0xff
- } // big switch
+ } // 0xf0
}
}
diff --git a/src/devices/cpu/ucom4/ucom4.h b/src/devices/cpu/ucom4/ucom4.h
index 29b766b5cd4..686b8293996 100644
--- a/src/devices/cpu/ucom4/ucom4.h
+++ b/src/devices/cpu/ucom4/ucom4.h
@@ -84,15 +84,14 @@ protected:
ucom4_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int family, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; } // 4 cycles per machine cycle
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); } // "
virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 2+1; } // max 2 + interrupt
- virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual void execute_set_input(int line, int state) override;
virtual void execute_run() override;
@@ -106,10 +105,10 @@ protected:
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
// memorymaps
- void program_1k(address_map &map);
- void program_2k(address_map &map);
- void data_64x4(address_map &map);
- void data_96x4(address_map &map);
+ void program_1k(address_map &map) ATTR_COLD;
+ void program_2k(address_map &map) ATTR_COLD;
+ void data_64x4(address_map &map) ATTR_COLD;
+ void data_96x4(address_map &map) ATTR_COLD;
address_space_config m_program_config;
address_space_config m_data_config;
diff --git a/src/devices/cpu/ucom4/ucom4d.cpp b/src/devices/cpu/ucom4/ucom4d.cpp
index 17505de32df..6b450c7fbc9 100644
--- a/src/devices/cpu/ucom4/ucom4d.cpp
+++ b/src/devices/cpu/ucom4/ucom4d.cpp
@@ -9,6 +9,22 @@
#include "emu.h"
#include "ucom4d.h"
+
+// common lookup tables
+
+enum ucom4_disassembler::e_mnemonics : unsigned
+{
+ mILL,
+ mLI, mL, mLM, mLDI, mLDZ, mS, mTAL, mTLA,
+ mX, mXI, mXD, mXM, mXMI, mXMD, mAD, mADC, mADS, mDAA, mDAS,
+ mEXL, mCLA, mCMA, mCIA, mCLC, mSTC, mTC, mINC, mDEC, mIND, mDED,
+ mRMB, mSMB, mREB, mSEB, mRPB, mSPB, mJMP, mJCP, mJPA, mCAL, mCZP, mRT, mRTS,
+ mCI, mCM, mCMB, mTAB, mCLI, mTMB, mTPA, mTPB,
+ mTIT, mIA, mIP, mOE, mOP, mOCD, mNOP,
+ mTAW, mTAZ, mTHX, mTLY, mXAW, mXAZ, mXHR, mXHX, mXLS, mXLY, mXC,
+ mSFB, mRFB, mFBT, mFBF, mRAR, mINM, mDEM, mSTM, mTTM, mEI, mDI
+};
+
const char *const ucom4_disassembler::s_mnemonics[] =
{
"?",
@@ -75,6 +91,8 @@ const u8 ucom4_disassembler::ucom4_mnemonic[0x100] =
};
+// disasm
+
offs_t ucom4_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
{
offs_t pos = pc;
diff --git a/src/devices/cpu/ucom4/ucom4d.h b/src/devices/cpu/ucom4/ucom4d.h
index 73fe1155b69..fc0263f8497 100644
--- a/src/devices/cpu/ucom4/ucom4d.h
+++ b/src/devices/cpu/ucom4/ucom4d.h
@@ -6,7 +6,6 @@
*/
-
#ifndef MAME_CPU_UCOM4_UCOM4D_H
#define MAME_CPU_UCOM4_UCOM4D_H
@@ -25,19 +24,7 @@ public:
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
private:
- enum e_mnemonics
- {
- mILL,
- mLI, mL, mLM, mLDI, mLDZ, mS, mTAL, mTLA,
- mX, mXI, mXD, mXM, mXMI, mXMD, mAD, mADC, mADS, mDAA, mDAS,
- mEXL, mCLA, mCMA, mCIA, mCLC, mSTC, mTC, mINC, mDEC, mIND, mDED,
- mRMB, mSMB, mREB, mSEB, mRPB, mSPB, mJMP, mJCP, mJPA, mCAL, mCZP, mRT, mRTS,
- mCI, mCM, mCMB, mTAB, mCLI, mTMB, mTPA, mTPB,
- mTIT, mIA, mIP, mOE, mOP, mOCD, mNOP,
- mTAW, mTAZ, mTHX, mTLY, mXAW, mXAZ, mXHR, mXHX, mXLS, mXLY, mXC,
- mSFB, mRFB, mFBT, mFBF, mRAR, mINM, mDEM, mSTM, mTTM, mEI, mDI
- };
-
+ enum e_mnemonics : unsigned;
static const char *const s_mnemonics[];
static const u8 s_bits[];
static const u32 s_flags[];
diff --git a/src/devices/cpu/uml.cpp b/src/devices/cpu/uml.cpp
index 30dea00f6b2..7663ee90208 100644
--- a/src/devices/cpu/uml.cpp
+++ b/src/devices/cpu/uml.cpp
@@ -33,8 +33,12 @@
#include "emu.h"
#include "drcuml.h"
+
#include "drcumlsh.h"
+#include <type_traits>
+
+
using namespace uml;
@@ -43,7 +47,6 @@ using namespace uml;
// DEBUGGING
//**************************************************************************
-#define VALIDATE_BACKEND (0)
#define LOG_SIMPLIFICATIONS (0)
@@ -53,19 +56,19 @@ using namespace uml;
//**************************************************************************
// opcode validation condition/flag valid bitmasks
-#define OPFLAGS_NONE 0x00
-#define OPFLAGS_C FLAG_C
-#define OPFLAGS_Z FLAG_Z
-#define OPFLAGS_SZ (FLAG_S | FLAG_Z)
-#define OPFLAGS_SZC (FLAG_S | FLAG_Z | FLAG_C)
-#define OPFLAGS_SZV (FLAG_S | FLAG_Z | FLAG_V)
-#define OPFLAGS_SZVC (FLAG_S | FLAG_Z | FLAG_V | FLAG_C)
-#define OPFLAGS_UZC (FLAG_U | FLAG_Z | FLAG_C)
-#define OPFLAGS_ALL 0x1f
-#define OPFLAGS_P1 0x81
-#define OPFLAGS_P2 0x82
-#define OPFLAGS_P3 0x83
-#define OPFLAGS_P4 0x84
+constexpr u8 OPFLAGS_NONE = FLAGS_NONE;
+constexpr u8 OPFLAGS_C = FLAG_C;
+constexpr u8 OPFLAGS_Z = FLAG_Z;
+constexpr u8 OPFLAGS_SZ = FLAG_S | FLAG_Z;
+constexpr u8 OPFLAGS_SZC = FLAG_S | FLAG_Z | FLAG_C;
+constexpr u8 OPFLAGS_SZV = FLAG_S | FLAG_Z | FLAG_V;
+constexpr u8 OPFLAGS_SZVC = FLAG_S | FLAG_Z | FLAG_V | FLAG_C;
+constexpr u8 OPFLAGS_UZC = FLAG_U | FLAG_Z | FLAG_C;
+constexpr u8 OPFLAGS_ALL = FLAGS_ALL;
+constexpr u8 OPFLAGS_P1 = 0x81;
+constexpr u8 OPFLAGS_P2 = 0x82;
+constexpr u8 OPFLAGS_P3 = 0x83;
+constexpr u8 OPFLAGS_P4 = 0x84;
// parameter input/output states
#define PIO_IN 0x01
@@ -86,7 +89,6 @@ using namespace uml;
#define PTYPES_IMM (1 << parameter::PTYPE_IMMEDIATE)
#define PTYPES_IREG (1 << parameter::PTYPE_INT_REGISTER)
#define PTYPES_FREG (1 << parameter::PTYPE_FLOAT_REGISTER)
-#define PTYPES_VREG (1 << parameter::PTYPE_VECTOR_REGISTER)
#define PTYPES_MVAR (1 << parameter::PTYPE_MAPVAR)
#define PTYPES_MEM (1 << parameter::PTYPE_MEMORY)
#define PTYPES_SIZE (1 << parameter::PTYPE_SIZE)
@@ -137,45 +139,49 @@ opcode_info const instruction::s_opcode_info_table[OP_MAX] =
// Control Flow Operations
OPINFO0(NOP, "nop", 4, false, NONE, NONE, NONE)
- OPINFO1(DEBUG, "debug", 4, false, NONE, NONE, ALL, PINFO(IN, OP, IANY))
+ OPINFO1(DEBUG, "debug", 4, false, NONE, NONE, ALL, PINFO(IN, OP, IANY)) // MAME debugger breakpoint
+ OPINFO0(BREAK, "break", 4, false, NONE, NONE, NONE) // (for debugging) Issues a breakpoint exception to allow for debugging the generated assembly
OPINFO1(EXIT, "exit", 4, true, NONE, NONE, ALL, PINFO(IN, OP, IANY))
OPINFO3(HASHJMP, "hashjmp", 4, false, NONE, NONE, ALL, PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, HANDLE))
OPINFO1(JMP, "jmp", 4, true, NONE, NONE, NONE, PINFO(IN, OP, LABEL))
- OPINFO2(EXH, "exh", 4, true, NONE, NONE, ALL, PINFO(IN, OP, HANDLE), PINFO(IN, OP, IANY))
- OPINFO1(CALLH, "callh", 4, true, NONE, NONE, ALL, PINFO(IN, OP, HANDLE))
+ OPINFO2(EXH, "exh", 4, true, NONE, NONE, ALL, PINFO(IN, OP, HANDLE), PINFO(IN, OP, IANY)) // Call exception handler
+ OPINFO1(CALLH, "callh", 4, true, NONE, NONE, ALL, PINFO(IN, OP, HANDLE)) // Call handle
OPINFO0(RET, "ret", 4, true, NONE, NONE, ALL)
- OPINFO2(CALLC, "callc", 4, true, NONE, NONE, ALL, PINFO(IN, OP, CFUNC), PINFO(IN, OP, PTR))
- OPINFO2(RECOVER, "recover", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, MVAR))
+ OPINFO2(CALLC, "callc", 4, true, NONE, NONE, ALL, PINFO(IN, OP, CFUNC), PINFO(IN, OP, PTR)) // Call C function
+ OPINFO2(RECOVER, "recover", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, MVAR)) // Get value from mapvar
// Internal Register Operations
- OPINFO1(SETFMOD, "setfmod", 4, false, NONE, NONE, ALL, PINFO(IN, OP, IANY))
- OPINFO1(GETFMOD, "getfmod", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM))
- OPINFO1(GETEXP, "getexp", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM))
- OPINFO2(GETFLGS, "getflgs", 4, false, P2, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IMV))
- OPINFO1(SAVE, "save", 4, false, ALL, NONE, ALL, PINFO(OUT, OP, STATE))
- OPINFO1(RESTORE, "restore", 4, false, NONE, ALL, ALL, PINFO(IN, OP, STATE))
+ OPINFO1(SETFMOD, "setfmod", 4, false, NONE, NONE, ALL, PINFO(IN, OP, IANY)) // Set floating point control mode
+ OPINFO1(GETFMOD, "getfmod", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM)) // Get floating point control mode
+ OPINFO1(GETEXP, "getexp", 4, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM)) // Get exception parameter value
+ OPINFO2(GETFLGS, "getflgs", 4, false, P2, NONE, NONE, PINFO(OUT, OP, IRM), PINFO(IN, OP, IMV)) // Get status register flags
+ OPINFO1(SETFLGS, "setflgs", 4, false, NONE, ALL, ALL, PINFO(IN, OP, IANY)) // (for debugging) Set status register flags
+ OPINFO1(SAVE, "save", 4, false, ALL, NONE, ALL, PINFO(OUT, OP, STATE)) // Save current state to drcuml_machine_state
+ OPINFO1(RESTORE, "restore", 4, false, NONE, ALL, ALL, PINFO(IN, OP, STATE)) // Load saved state from drcuml_machine_state
// Integer Operations
- OPINFO4(LOAD, "!load", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSIZE))
- OPINFO4(LOADS, "!loads", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSIZE))
- OPINFO4(STORE, "!store", 4|8, false, NONE, NONE, ALL, PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SCSIZE))
- OPINFO3(READ, "!read", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSIZE))
- OPINFO4(READM, "!readm", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE))
- OPINFO3(WRITE, "!write", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE))
- OPINFO4(WRITEM, "!writem", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE))
- OPINFO2(CARRY, "!carry", 4|8, false, NONE, C, ALL, PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
- OPINFO1(SET, "!set", 4|8, true, NONE, NONE, ALL, PINFO(OUT, OP, IRM))
+ OPINFO4(LOAD, "!load", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSIZE)) // Load unsigned value from specified memory location
+ OPINFO4(LOADS, "!loads", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, SCSIZE)) // Load signed value from specified memory location
+ OPINFO4(STORE, "!store", 4|8, false, NONE, NONE, ALL, PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SCSIZE)) // Store value to specified memory location
+ OPINFO3(READ, "!read", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSIZE)) // Read memory from emulated machine using memory space reader
+ OPINFO4(READM, "!readm", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, IRM), PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE)) // Read memory from emulated machine using memory space reader (masked)
+ OPINFO3(WRITE, "!write", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE)) // Write to emulated machine's memory using memory space writer
+ OPINFO4(WRITEM, "!writem", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, SPSIZE)) // Write to emulated machine's memory using memory space writer (masked)
+ OPINFO2(CARRY, "!carry", 4|8, false, NONE, C, ALL, PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Set carry status flag on CPU
+ OPINFO1(SET, "!set", 4|8, true, NONE, NONE, ALL, PINFO(OUT, OP, IRM)) // Get the state of the specified condition (e.g. calling UML_SET with COND_NZ will return 0 if the condition is not met and 1 if the condition is met)
OPINFO2(MOV, "!mov", 4|8, true, NONE, NONE, NONE, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY))
OPINFO3(SEXT, "!sext", 4|8, false, NONE, SZ, ALL, PINFO(OUT, OP, IRM), PINFO(IN, P3, IANY), PINFO(IN, OP, SIZE))
- OPINFO4(ROLAND, "!roland", 4|8, false, NONE, SZ, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
- OPINFO4(ROLINS, "!rolins", 4|8, false, NONE, SZ, ALL, PINFO(INOUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
+ OPINFO4(ROLAND, "!roland", 4|8, false, NONE, SZ, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Rotate left + AND (see drcbec.cpp for implementation)
+ OPINFO4(ROLINS, "!rolins", 4|8, false, NONE, SZ, ALL, PINFO(INOUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Rotate left + OR (see drcbec.cpp for implementation)
OPINFO3(ADD, "!add", 4|8, false, NONE, SZVC, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO3(ADDC, "!addc", 4|8, false, C, SZVC, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO3(SUB, "!sub", 4|8, false, NONE, SZVC, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO3(SUBB, "!subb", 4|8, false, C, SZVC, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO2(CMP, "!cmp", 4|8, false, NONE, SZVC, ALL, PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
- OPINFO4(MULU, "!mulu", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
- OPINFO4(MULS, "!muls", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
+ OPINFO4(MULU, "!mulu", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Unsigned 32x32=64 and 64x64=128 multiplication
+ OPINFO3(MULULW, "!mululw", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Unsigned 32x32=32 and 64x64=64 multiplication (overflow set based on 32x32=64 calculation but zero and sign based on 32-bit result)
+ OPINFO4(MULS, "!muls", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Signed 32x32=64 and 64x64=128 multiplication
+ OPINFO3(MULSLW, "!mulslw", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY)) // Signed 32x32=32 and 64x64=64 multiplication (overflow set based on 32x32=64 calculation but zero and sign based on 32-bit result)
OPINFO4(DIVU, "!divu", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO4(DIVS, "!divs", 4|8, false, NONE, SZV, ALL, PINFO(OUT, OP, IRM), PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
OPINFO3(AND, "!and", 4|8, false, NONE, SZ, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
@@ -194,18 +200,18 @@ opcode_info const instruction::s_opcode_info_table[OP_MAX] =
OPINFO3(RORC, "!rorc", 4|8, false, C, SZC, ALL, PINFO(OUT, OP, IRM), PINFO(IN, OP, IANY), PINFO(IN, OP, IANY))
// Floating Point Operations
- OPINFO3(FLOAD, "f#load", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY))
- OPINFO3(FSTORE, "f#store", 4|8, false, NONE, NONE, ALL, PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, FRM))
- OPINFO3(FREAD, "f#read", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSIZE))
- OPINFO3(FWRITE, "f#write", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, FANY), PINFO(IN, OP, SPSIZE))
+ OPINFO3(FLOAD, "f#load", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, PTR), PINFO(IN, 4, IANY)) // Load float/double value from specified memory location
+ OPINFO3(FSTORE, "f#store", 4|8, false, NONE, NONE, ALL, PINFO(IN, OP, PTR), PINFO(IN, 4, IANY), PINFO(IN, OP, FRM)) // Save float/double value to specified memory location
+ OPINFO3(FREAD, "f#read", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, 4, IANY), PINFO(IN, OP, SPSIZE)) // Read float/double value from emulated machine using memory space reader
+ OPINFO3(FWRITE, "f#write", 4|8, false, NONE, NONE, ALL, PINFO(IN, 4, IANY), PINFO(IN, OP, FANY), PINFO(IN, OP, SPSIZE)) // Write float/double value to emulated machine using memory space writer
OPINFO2(FMOV, "f#mov", 4|8, true, NONE, NONE, NONE, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
- OPINFO4(FTOINT, "f#toint", 4|8, false, NONE, NONE, ALL, PINFO(OUT, P3, IRM), PINFO(IN, OP, FANY), PINFO(IN, OP, SIZE), PINFO(IN, OP, ROUND))
- OPINFO3(FFRINT, "f#frint", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, IANY), PINFO(IN, OP, SIZE))
- OPINFO3(FFRFLT, "f#frflt", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY), PINFO(IN, OP, SIZE))
- OPINFO2(FRNDS, "f#rnds", 8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY))
+ OPINFO4(FTOINT, "f#toint", 4|8, false, NONE, NONE, ALL, PINFO(OUT, P3, IRM), PINFO(IN, OP, FANY), PINFO(IN, OP, SIZE), PINFO(IN, OP, ROUND)) // Float/double to integer
+ OPINFO3(FFRINT, "f#frint", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, IANY), PINFO(IN, OP, SIZE)) // Float/double from integer
+ OPINFO3(FFRFLT, "f#frflt", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY), PINFO(IN, OP, SIZE)) // Convert float to double or double to float
+ OPINFO2(FRNDS, "f#rnds", 8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, P3, FANY)) // Convert double to float and then back to double, or float to double and back to float
OPINFO3(FADD, "f#add", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
OPINFO3(FSUB, "f#sub", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
- OPINFO2(FCMP, "f#cmp", 4|8, false, NONE, UZC, ALL, PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
+ OPINFO2(FCMP, "f#cmp", 4|8, false, NONE, UZC, ALL, PINFO(IN, OP, FANY), PINFO(IN, OP, FANY)) // Note: status flags except FLAG_U are undefined when comparing with NaN
OPINFO3(FMUL, "f#mul", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
OPINFO3(FDIV, "f#div", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY), PINFO(IN, OP, FANY))
OPINFO2(FNEG, "f#neg", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
@@ -213,8 +219,8 @@ opcode_info const instruction::s_opcode_info_table[OP_MAX] =
OPINFO2(FSQRT, "f#sqrt", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
OPINFO2(FRECIP, "f#recip", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
OPINFO2(FRSQRT, "f#rsqrt", 4|8, false, NONE, NONE, ALL, PINFO(OUT, OP, FRM), PINFO(IN, OP, FANY))
- OPINFO2(FCOPYI, "f#copyi", 4|8, false, NONE, NONE, NONE, PINFO(OUT, OP, FRM), PINFO(IN, OP, IRM))
- OPINFO2(ICOPYF, "icopyf#", 4|8, false, NONE, NONE, NONE, PINFO(OUT, OP, IRM), PINFO(IN, OP, FRM))
+ OPINFO2(FCOPYI, "f#copyi", 4|8, false, NONE, NONE, NONE, PINFO(OUT, OP, FRM), PINFO(IN, OP, IRM)) // Load float/double value from integer representation (e.g. 0x3f800000 -> 1.0f)
+ OPINFO2(ICOPYF, "icopyf#", 4|8, false, NONE, NONE, NONE, PINFO(OUT, OP, IRM), PINFO(IN, OP, FRM)) // Store float/double value as integer representation (e.g. 1.0f -> 0x3f800000)
};
@@ -256,6 +262,830 @@ void uml::code_handle::set_codeptr(drccodeptr code)
// UML INSTRUCTION
//**************************************************************************
+struct uml::instruction::simplify_op
+{
+private:
+ static inline constexpr u64 paramsizemask[] = { 0xffU, 0xffffU, 0xffffffffU, 0xffffffff'ffffffffU };
+
+ static u64 size_mask(instruction const &inst)
+ {
+ return (inst.size() == 4) ? 0xffffffffU : 0xffffffff'ffffffffU;
+ }
+
+ static void truncate_immediate(instruction &inst, int pnum, u64 mask)
+ {
+ if (inst.param(pnum).is_immediate())
+ inst.m_param[pnum] = inst.param(pnum).immediate() & mask;
+ }
+
+ static void normalise_commutative(instruction &inst)
+ {
+ const u64 mask = size_mask(inst);
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, mask);
+
+ // if a source is the destination put it first, and put a single immediate last
+ if ((inst.param(0) == inst.param(2)) || (inst.param(1).is_immediate() && !inst.param(2).is_immediate()))
+ {
+ using std::swap;
+ swap(inst.m_param[1], inst.m_param[2]);
+ }
+ }
+
+ static void convert_to_mov_immediate(instruction &inst, u64 immediate)
+ {
+ u64 const mask = size_mask(inst);
+ immediate &= mask;
+ if (!inst.flags())
+ {
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ inst.m_param[1] = immediate;
+ }
+ else if (immediate == mask)
+ {
+ inst.m_opcode = OP_OR;
+ inst.m_numparams = 3;
+ inst.m_param[1] = inst.param(0);
+ inst.m_param[2] = mask;
+ }
+ else
+ {
+ inst.m_opcode = OP_AND;
+ inst.m_numparams = 3;
+ if (immediate)
+ {
+ inst.m_param[1] = immediate;
+ inst.m_param[2] = mask;
+ }
+ else
+ {
+ inst.m_param[1] = inst.param(0);
+ inst.m_param[2] = 0;
+ }
+ }
+ }
+
+public:
+ static void truncate_imm(instruction &inst)
+ {
+ u64 const mask = size_mask(inst);
+
+ for (int i = 0; inst.numparams() > i; ++i)
+ truncate_immediate(inst, i, mask);
+ }
+
+ static void read(instruction &inst)
+ {
+ // truncate immediate address to size
+ truncate_immediate(inst, 1, 0xffffffff);
+ }
+
+ static void readm(instruction &inst)
+ {
+ auto const size = inst.param(3).size();
+ u64 const mask = paramsizemask[size];
+
+ // truncate immediate address and mask to size
+ truncate_immediate(inst, 1, 0xffffffff);
+ truncate_immediate(inst, 2, mask);
+
+ // convert to READ if the mask is all ones
+ if (inst.param(2).is_immediate_value(mask))
+ {
+ inst.m_opcode = OP_READ;
+ inst.m_param[2] = inst.param(3);
+ inst.m_numparams = 3;
+ }
+ }
+
+ static void write(instruction &inst)
+ {
+ auto const size = inst.param(2).size();
+
+ // truncate immediate address and data to size
+ truncate_immediate(inst, 0, 0xffffffff);
+ truncate_immediate(inst, 1, paramsizemask[size]);
+ }
+
+ static void writem(instruction &inst)
+ {
+ auto const size = inst.param(3).size();
+ u64 const mask = paramsizemask[size];
+
+ // truncate immediate address, data and mask to size
+ truncate_immediate(inst, 0, 0xffffffff);
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, mask);
+
+ // convert to WRITE if the mask is all ones
+ if (inst.param(2).is_immediate_value(mask))
+ {
+ inst.m_opcode = OP_WRITE;
+ inst.m_param[2] = inst.param(3);
+ inst.m_numparams = 3;
+ }
+ }
+
+ static void set(instruction &inst)
+ {
+ // convert to MOV if the condition is constant
+ if (inst.condition() == COND_ALWAYS)
+ convert_to_mov_immediate(inst, 1);
+ }
+
+ static void mov(instruction &inst)
+ {
+ // convert move-to-self to NOP if the destination isn't larger than the size
+ if (inst.param(0) == inst.param(1))
+ {
+ if (!inst.param(0).is_int_register() || (inst.size() == 8))
+ {
+ inst.nop();
+ return;
+ }
+ }
+
+ // truncate immediate source to instruction size
+ truncate_immediate(inst, 1, size_mask(inst));
+ }
+
+ static void sext(instruction &inst)
+ {
+ // convert immediate source to MOV or a logic operation if flags are requested
+ if (inst.param(1).is_immediate())
+ {
+ u64 val = inst.param(1).immediate();
+ switch (inst.param(2).size())
+ {
+ case SIZE_BYTE: val = u64(s64(s8(u8(val)))); break;
+ case SIZE_WORD: val = u64(s64(s16(u16(val)))); break;
+ case SIZE_DWORD: val = u64(s64(s32(u32(val)))); break;
+ case SIZE_QWORD: break;
+ }
+ convert_to_mov_immediate(inst, val);
+ }
+ }
+
+ static void roland(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+ truncate_immediate(inst, 3, mask);
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate() && inst.param(3).is_immediate())
+ {
+ // constant result, convert to MOV or a logic operation
+ if (size == 4)
+ convert_to_mov_immediate(inst, rotl_32(inst.param(1).immediate(), inst.param(2).immediate()) & inst.param(3).immediate());
+ else
+ convert_to_mov_immediate(inst, rotl_64(inst.param(1).immediate(), inst.param(2).immediate()) & inst.param(3).immediate());
+ }
+ else if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // only mask is variable, convert to AND
+ inst.m_opcode = OP_AND;
+ if (size == 4)
+ inst.m_param[1] = parameter(rotl_32(inst.param(1).immediate(), inst.param(2).immediate()));
+ else
+ inst.m_param[1] = parameter(rotl_64(inst.param(1).immediate(), inst.param(2).immediate()));
+ inst.m_param[2] = inst.param(3);
+ inst.m_numparams = 3;
+ }
+ else if (inst.param(2).is_immediate_value(0) || inst.param(3).is_immediate_value(0))
+ {
+ // no shift or zero mask, convert to AND (may be subsequently converted to MOV)
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = inst.param(3);
+ inst.m_numparams = 3;
+ }
+ else if (inst.param(3).is_immediate_value(mask))
+ {
+ // all mask bits set, convert to ROL
+ inst.m_opcode = OP_ROL;
+ inst.m_numparams = 3;
+ }
+ else if (inst.param(2).is_immediate() && inst.param(3).is_immediate_value((mask << inst.param(2).immediate()) & mask))
+ {
+ // equivalent to shift left
+ inst.m_opcode = OP_SHL;
+ inst.m_numparams = 3;
+ }
+ else if (inst.param(2).is_immediate() && inst.param(3).is_immediate_value(mask >> (bits - inst.param(2).immediate())))
+ {
+ // equivalent to shift right
+ inst.m_opcode = OP_SHR;
+ inst.m_numparams = 3;
+ inst.m_param[2] = bits - inst.param(2).immediate();
+ }
+ }
+
+ static void rolins(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+ truncate_immediate(inst, 3, mask);
+
+ if (inst.param(3).is_immediate_value(mask))
+ {
+ // all mask bits set, convert to ROL
+ inst.m_opcode = OP_ROL;
+ inst.m_numparams = 3;
+ }
+ else if (inst.param(3).is_immediate_value(0))
+ {
+ // no mask bits set, convert to AND
+ inst.m_opcode = OP_AND;
+ inst.m_numparams = 3;
+ inst.m_param[1] = inst.param(0);
+ inst.m_param[2] = mask;
+ }
+ }
+
+ static void add(instruction &inst)
+ {
+ // clean up operands
+ normalise_commutative(inst);
+
+ // can't optimise carry or overflow flag generation
+ if (inst.flags() & (FLAG_C | FLAG_V))
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant value, convert to MOV or a logic operation
+ convert_to_mov_immediate(inst, inst.param(1).immediate() + inst.param(2).immediate());
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // add zero, convert to MOV or AND
+ if (inst.flags())
+ {
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = size_mask(inst);
+ }
+ else
+ {
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ }
+ }
+
+ static void sub(instruction &inst)
+ {
+ u64 const mask = size_mask(inst);
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, mask);
+
+ // can't optimise carry or overflow flag generation
+ if (inst.flags() & (FLAG_C | FLAG_V))
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant value, convert to MOV or a logic operation
+ convert_to_mov_immediate(inst, inst.param(1).immediate() - inst.param(2).immediate());
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // subtract zero, convert to MOV or AND
+ if (inst.flags())
+ {
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ else
+ {
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ }
+ }
+
+ static void cmp(instruction &inst)
+ {
+ u64 const mask = size_mask(inst);
+
+ // completely elide if flags are not used
+ if (!inst.flags())
+ {
+ inst.nop();
+ return;
+ }
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 0, mask);
+ truncate_immediate(inst, 1, mask);
+ }
+
+ template <opcode_t LoWordOp, typename Short, typename Long>
+ static void mul(instruction &inst)
+ {
+ bool const low_only = inst.param(0) == inst.param(1);
+
+ // if the two destination operands are identical and the S and Z flags aren't required, convert to MUL.LW
+ if (low_only && !(inst.flags() & (FLAG_Z | FLAG_S)))
+ {
+ inst.m_opcode = LoWordOp;
+ inst.m_param[1] = inst.param(2);
+ inst.m_param[2] = inst.param(3);
+ inst.m_numparams = 3;
+ return;
+ }
+
+ const u64 mask = size_mask(inst);
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 2, mask);
+ truncate_immediate(inst, 3, mask);
+
+ // put a single immediate last
+ if (inst.param(2).is_immediate() && !inst.param(3).is_immediate())
+ {
+ using std::swap;
+ swap(inst.m_param[2], inst.m_param[3]);
+ }
+
+ // can only simplify the low-only form, can't optimise overflow flag generation
+ if (!low_only || (inst.flags() & FLAG_V))
+ return;
+
+ if (inst.param(2).is_immediate_value(0) || inst.param(3).is_immediate_value(0))
+ {
+ // multiplying anything by zero yields zero
+ convert_to_mov_immediate(inst, 0);
+ }
+ else if (inst.param(2).is_immediate() && inst.param(3).is_immediate())
+ {
+ // convert constant result to MOV or a logic op
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ assert((size == 4) || (size == 8));
+
+ if (size == 4)
+ {
+ Short const param2 = Short(u32(inst.param(2).immediate()));
+ Short const param3 = Short(u32(inst.param(3).immediate()));
+ Short const val = param2 * param3;
+ bool const no_overflow = (val / param2) == param3;
+ bool const z_ok = !(inst.flags() & FLAG_Z) || no_overflow;
+ bool const s_ok = !(inst.flags() & FLAG_S) || (std::is_signed_v<Short> ? !BIT(param2 ^ param3 ^ val, bits - 1) : (no_overflow && !BIT(val, bits - 1)));
+
+ if (z_ok && s_ok)
+ convert_to_mov_immediate(inst, u32(val));
+ }
+ else
+ {
+ Long const param2 = Long(inst.param(2).immediate());
+ Long const param3 = Long(inst.param(3).immediate());
+ Long const val = param2 * param3;
+ bool const no_overflow = (val / param2) == param3;
+ bool const z_ok = !(inst.flags() & FLAG_Z) || no_overflow;
+ bool const s_ok = !(inst.flags() & FLAG_S) || (std::is_signed_v<Long> ? !BIT(param2 ^ param3 ^ val, bits - 1) : (no_overflow && !BIT(val, bits - 1)));
+
+ if (z_ok && s_ok)
+ convert_to_mov_immediate(inst, u64(val));
+ }
+ }
+ }
+
+ template <typename Short, typename Long>
+ static void mullw(instruction &inst)
+ {
+ // clean up operands
+ normalise_commutative(inst);
+
+ // can't optimise overflow flag generation
+ if (inst.flags() & FLAG_V)
+ return;
+
+ if (inst.param(1).is_immediate_value(0) || inst.param(2).is_immediate_value(0))
+ {
+ // multiplying anything by zero yields zero
+ convert_to_mov_immediate(inst, 0);
+ }
+ else if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // convert constant result to MOV or a logic op
+ auto const size = inst.size();
+ assert((size == 4) || (size == 8));
+
+ if (size == 4)
+ {
+ Short const param1 = Short(u32(inst.param(1).immediate()));
+ Short const param2 = Short(u32(inst.param(2).immediate()));
+ Short const val = param1 * param2;
+ convert_to_mov_immediate(inst, u32(val));
+ }
+ else
+ {
+ Long const param1 = Long(inst.param(1).immediate());
+ Long const param2 = Long(inst.param(2).immediate());
+ Long const val = param1 * param2;
+ convert_to_mov_immediate(inst, u64(val));
+ }
+ }
+ }
+
+ template <typename Short, typename Long>
+ static void div(instruction &inst)
+ {
+ auto const size = inst.size();
+ u64 const mask = size_mask(inst);
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 2, mask);
+ truncate_immediate(inst, 3, mask);
+
+ // can't optimise overflow flag generation
+ if (inst.flags() & FLAG_V)
+ return;
+
+ // optimise the quotient-only form with two immediate inputs if not dividing by zero
+ if ((inst.param(0) == inst.param(1)) && inst.param(2).is_immediate() && inst.param(3).is_immediate() && !inst.param(3).is_immediate_value(0))
+ {
+ if (inst.param(2).is_immediate_value(0))
+ {
+ // dividing zero by anything yields zero
+ convert_to_mov_immediate(inst, 0);
+ }
+ else
+ {
+ // convert constant result to MOV or a logic op
+ assert((size == 4) || (size == 8));
+
+ if (size == 4)
+ convert_to_mov_immediate(inst, u32(Short(u32(inst.param(2).immediate())) / Short(u32(inst.param(3).immediate()))));
+ else
+ convert_to_mov_immediate(inst, u64(Long(inst.param(2).immediate()) / Long(inst.param(3).immediate())));
+ }
+ }
+ }
+
+ static void _and(instruction &inst)
+ {
+ // clean up operands
+ normalise_commutative(inst);
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant value, convert to MOV or a logic operation
+ convert_to_mov_immediate(inst, inst.param(1).immediate() & inst.param(2).immediate());
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // any immediate zero always yields zero
+ convert_to_mov_immediate(inst, 0);
+ }
+ else if (inst.param(2).is_immediate_value(size_mask(inst)) || (inst.param(1) == inst.param(2)))
+ {
+ if (!inst.flags())
+ {
+ // convert to MOV if the value will be unaffected and flags aren't updated
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ else if ((inst.param(0) == inst.param(1)) && (!inst.param(0).is_int_register() || (inst.size() == 8)))
+ {
+ // convert to TEST if the value will be unaffected and the destination is no larger than the operand size
+ inst.m_opcode = OP_TEST;
+ inst.m_numparams = 2;
+ }
+ }
+ }
+
+ static void test(instruction &inst)
+ {
+ u64 const mask = size_mask(inst);
+
+ // completely elide if flags are not used
+ if (!inst.flags())
+ {
+ inst.nop();
+ return;
+ }
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 0, mask);
+ truncate_immediate(inst, 1, mask);
+
+ // put a single immediate second
+ if (inst.param(0).is_immediate() && !inst.param(1).is_immediate())
+ {
+ using std::swap;
+ swap(inst.m_param[0], inst.m_param[1]);
+ }
+
+ if (inst.param(0).is_immediate() && inst.param(1).is_immediate())
+ {
+ // two immediates, combine values and set second operand to all 0 or all 1
+ u64 const val = inst.param(0).immediate() & inst.param(1).immediate();
+ inst.m_param[0] = val;
+ inst.m_param[1] = val ? mask : 0;
+ }
+ else if (inst.param(0) == inst.param(1))
+ {
+ // testing a value against itself, turn the second operand into an immediate
+ inst.m_param[1] = mask;
+ }
+ }
+
+ static void _or(instruction &inst)
+ {
+ u64 const mask = size_mask(inst);
+
+ // clean up operands
+ normalise_commutative(inst);
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant value, convert to MOV or a logic operation
+ convert_to_mov_immediate(inst, inst.param(1).immediate() | inst.param(2).immediate());
+ }
+ else if (inst.param(2).is_immediate_value(mask))
+ {
+ // an immediate with all bits set is unaffected by the other value
+ convert_to_mov_immediate(inst, mask);
+ }
+ else if (inst.param(2).is_immediate_value(0) || (inst.param(1) == inst.param(2)))
+ {
+ if (!inst.flags())
+ {
+ // convert to MOV if the value will be unaffected and flags aren't updated
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ else if ((inst.param(0) == inst.param(1)) && (!inst.param(0).is_int_register() || (inst.size() == 8)))
+ {
+ // convert to TEST if the value will be unaffected and the destination is no larger than the operand size
+ inst.m_opcode = OP_TEST;
+ inst.m_numparams = 2;
+ }
+ else
+ {
+ // convert to AND to simplify code generation
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ }
+ }
+
+ static void _xor(instruction &inst)
+ {
+ // clean up operands
+ normalise_commutative(inst);
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant value, convert to MOV or a logic operation
+ convert_to_mov_immediate(inst, inst.param(1).immediate() ^ inst.param(2).immediate());
+ }
+ else if (inst.param(1) == inst.param(2))
+ {
+ // equivalent values cancel out
+ convert_to_mov_immediate(inst, 0);
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ if (!inst.flags())
+ {
+ // convert to MOV if the value will be unaffected and flags aren't updated
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ else if ((inst.param(0) == inst.param(1)) && (!inst.param(0).is_int_register() || (inst.size() == 8)))
+ {
+ // convert to TEST if the value will be unaffected and the destination is no larger than the operand size
+ inst.m_opcode = OP_TEST;
+ inst.m_numparams = 2;
+ }
+ else
+ {
+ // convert to AND to simplify code generation
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = size_mask(inst);
+ }
+ }
+ }
+
+ static void lzcnt(instruction &inst)
+ {
+ // convert immediate source to MOV or a logic operation if flags are requested
+ if (inst.param(1).is_immediate())
+ {
+ auto const size = inst.size();
+ assert((size == 4) || (size == 8));
+
+ u64 const val = inst.param(1).immediate();
+ convert_to_mov_immediate(inst, (size == 4) ? count_leading_zeros_32(u32(val)) : count_leading_zeros_64(val));
+ }
+ }
+
+ static void bswap(instruction &inst)
+ {
+ // convert immediate source to MOV or a logic operation if flags are requested
+ if (inst.param(1).is_immediate())
+ {
+ auto const size = inst.size();
+ assert((size == 4) || (size == 8));
+
+ u64 const val = inst.param(1).immediate();
+ convert_to_mov_immediate(inst, (size == 4) ? swapendian_int32(u32(val)) : swapendian_int64(val));
+ }
+ }
+
+ static void shl(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+
+ // can't optimise carry flag generation
+ if (inst.flags() & FLAG_C)
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant result, convert to MOV or a logic operation
+ if (size == 4)
+ convert_to_mov_immediate(inst, u32(inst.param(1).immediate()) << inst.param(2).immediate());
+ else
+ convert_to_mov_immediate(inst, inst.param(1).immediate() << inst.param(2).immediate());
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // no shift, convert to AND (may be subsequently converted to MOV)
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ }
+
+ template <typename Short, typename Long>
+ static void shr(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+
+ // can't optimise carry flag generation
+ if (inst.flags() & FLAG_C)
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant result, convert to MOV or a logic operation
+ if (size == 4)
+ convert_to_mov_immediate(inst, u32(Short(u32(inst.param(1).immediate())) >> inst.param(2).immediate()));
+ else
+ convert_to_mov_immediate(inst, u64(Long(inst.param(1).immediate()) >> inst.param(2).immediate()));
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // no shift, convert to AND (may be subsequently converted to MOV)
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ }
+
+ static void rol(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+
+ // can't optimise carry flag generation
+ if (inst.flags() & FLAG_C)
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant result, convert to MOV or a logic operation
+ if (size == 4)
+ convert_to_mov_immediate(inst, rotl_32(inst.param(1).immediate(), inst.param(2).immediate()));
+ else
+ convert_to_mov_immediate(inst, rotl_64(inst.param(1).immediate(), inst.param(2).immediate()));
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // no shift, convert to AND (may be subsequently converted to MOV)
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ }
+
+ static void ror(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+
+ // can't optimise carry flag generation
+ if (inst.flags() & FLAG_C)
+ return;
+
+ if (inst.param(1).is_immediate() && inst.param(2).is_immediate())
+ {
+ // constant result, convert to MOV or a logic operation
+ if (size == 4)
+ convert_to_mov_immediate(inst, rotr_32(inst.param(1).immediate(), inst.param(2).immediate()));
+ else
+ convert_to_mov_immediate(inst, rotr_64(inst.param(1).immediate(), inst.param(2).immediate()));
+ }
+ else if (inst.param(2).is_immediate_value(0))
+ {
+ // no shift, convert to AND (may be subsequently converted to MOV)
+ inst.m_opcode = OP_AND;
+ inst.m_param[2] = mask;
+ }
+ }
+
+ static void rolrc(instruction &inst)
+ {
+ auto const size = inst.size();
+ auto const bits = size << 3;
+ u64 const mask = size_mask(inst);
+ assert((size == 4) || (size == 8));
+
+ // truncate immediates to instruction size
+ truncate_immediate(inst, 1, mask);
+ truncate_immediate(inst, 2, bits - 1);
+
+ // can't optimise zero or sign flag generation
+ if (inst.flags() & (FLAG_Z | FLAG_S))
+ return;
+
+ // convert to NOP or MOV if there's no rotation
+ if (inst.param(2).is_immediate_value(0))
+ {
+ if ((inst.param(0) == inst.param(1)) && (!inst.param(0).is_int_register() || (inst.size() == 8)))
+ {
+ inst.nop();
+ }
+ else
+ {
+ inst.m_opcode = OP_MOV;
+ inst.m_numparams = 2;
+ }
+ }
+ }
+
+ static void fmov(instruction &inst)
+ {
+ // convert move-to-self to NOP
+ if (inst.param(0) == inst.param(1))
+ inst.nop();
+ }
+
+ static void fread(instruction &inst)
+ {
+ // truncate immediate address to size
+ truncate_immediate(inst, 1, 0xffffffff);
+ }
+
+ static void fwrite(instruction &inst)
+ {
+ // truncate immediate address to size
+ truncate_immediate(inst, 0, 0xffffffff);
+ }
+};
+
+
//-------------------------------------------------
// configure - configure an opcode with no
// parameters
@@ -369,339 +1199,69 @@ void uml::instruction::configure(opcode_t op, u8 size, parameter p0, parameter p
void uml::instruction::simplify()
{
- // can't simplify if flags are in play
- if (m_flags != 0)
- return;
-
- static constexpr u64 instsizemask[] = { 0, 0, 0, 0, 0xffffffff, 0, 0, 0, 0xffffffffffffffffU };
- static constexpr u64 paramsizemask[] = { 0xff, 0xffff, 0xffffffff, 0xffffffffffffffffU };
-
// loop until we've simplified all we can
opcode_t origop;
do
{
+#if LOG_SIMPLIFICATIONS
+ uml::instruction const orig = *this;
+#endif
+
// switch off the opcode
origop = m_opcode;
switch (m_opcode)
{
- // READM: convert to READ if the mask is wide open
- case OP_READM:
- if (m_param[2].is_immediate_value(paramsizemask[m_param[3].size()]))
- {
- m_opcode = OP_READ;
- m_numparams = 2;
- m_param[2] = m_param[3];
- }
- break;
-
- // WRITEM: convert to WRITE if the mask is wide open
- case OP_WRITEM:
- if (m_param[2].is_immediate_value(paramsizemask[m_param[3].size()]))
- {
- m_opcode = OP_WRITE;
- m_numparams = 2;
- m_param[2] = m_param[3];
- }
- break;
-
- // SET: convert to MOV if constant condition
- case OP_SET:
- if (m_condition == COND_ALWAYS)
- convert_to_mov_immediate(1);
- break;
-
- // MOV: convert to NOP if move-to-self
- case OP_MOV:
- if (m_param[0] == m_param[1])
- nop();
- break;
-
- // SEXT: convert immediates to MOV
- case OP_SEXT:
- if (m_param[1].is_immediate())
- switch (m_param[2].size())
- {
- case SIZE_BYTE: convert_to_mov_immediate(s8(m_param[1].immediate())); break;
- case SIZE_WORD: convert_to_mov_immediate(s16(m_param[1].immediate())); break;
- case SIZE_DWORD: convert_to_mov_immediate(s32(m_param[1].immediate())); break;
- case SIZE_QWORD: convert_to_mov_immediate(s64(m_param[1].immediate())); break;
- case SIZE_DQWORD: fatalerror("Invalid SEXT target size\n");
- }
- break;
-
- // ROLAND: convert to MOV if all immediate, or to ROL or AND if one is not needed, or to SHL/SHR if the mask is right
- case OP_ROLAND:
- if (m_param[1].is_immediate() && m_param[2].is_immediate() && m_param[3].is_immediate())
- {
- assert(m_size == 4 || m_size == 8);
- if (m_size == 4)
- convert_to_mov_immediate(rotl_32(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
- else
- convert_to_mov_immediate(rotl_64(m_param[1].immediate(), m_param[2].immediate()) & m_param[3].immediate());
- }
- else if (m_param[2].is_immediate_value(0))
- {
- m_opcode = OP_AND;
- m_numparams = 3;
- m_param[2] = m_param[3];
- }
- else if (m_param[3].is_immediate_value(instsizemask[m_size]))
- {
- m_opcode = OP_ROL;
- m_numparams = 3;
- }
- else if (m_param[2].is_immediate() && m_param[3].is_immediate_value((0xffffffffffffffffU << m_param[2].immediate()) & instsizemask[m_size]))
- {
- m_opcode = OP_SHL;
- m_numparams = 3;
- }
- else if (m_param[2].is_immediate() && m_param[3].is_immediate_value(instsizemask[m_size] >> (8 * m_size - m_param[2].immediate())))
- {
- m_opcode = OP_SHR;
- m_numparams = 3;
- m_param[2] = 8 * m_size - m_param[2].immediate();
- }
- break;
-
- // ROLINS: convert to ROLAND if the mask is full
- case OP_ROLINS:
- if (m_param[3].is_immediate_value(instsizemask[m_size]))
- m_opcode = OP_ROLAND;
- break;
-
- // ADD: convert to MOV if immediate, or if adding 0
- case OP_ADD:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() + m_param[2].immediate());
- else if (m_param[1].is_immediate_value(0))
- convert_to_mov_param(2);
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // SUB: convert to MOV if immediate, or if subtracting 0
- case OP_SUB:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() - m_param[2].immediate());
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // CMP: no-op if no flags needed, compare i0 to i0 if the parameters are equal
- case OP_CMP:
- if (m_flags == 0)
- nop();
- else if (m_param[0] == m_param[1])
- cmp(I0, I0);
- break;
-
- // MULU: convert simple form to MOV if immediate, or if multiplying by 0
- case OP_MULU:
- if (m_param[0] == m_param[1])
- {
- if (m_param[2].is_immediate_value(0) || m_param[3].is_immediate_value(0))
- convert_to_mov_immediate(0);
- else if (m_param[2].is_immediate() && m_param[3].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(u32(u32(m_param[1].immediate()) * u32(m_param[2].immediate())));
- else if (m_size == 8)
- convert_to_mov_immediate(u64(u64(m_param[1].immediate()) * u64(m_param[2].immediate())));
- }
- }
- break;
-
- // MULS: convert simple form to MOV if immediate, or if multiplying by 0
- case OP_MULS:
- if (m_param[0] == m_param[1])
- {
- if (m_param[2].is_immediate_value(0) || m_param[3].is_immediate_value(0))
- convert_to_mov_immediate(0);
- else if (m_param[2].is_immediate() && m_param[3].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(s32(s32(m_param[1].immediate()) * s32(m_param[2].immediate())));
- else if (m_size == 8)
- convert_to_mov_immediate(s64(s64(m_param[1].immediate()) * s64(m_param[2].immediate())));
- }
- }
- break;
-
- // DIVU: convert simple form to MOV if immediate, or if dividing with 0
- case OP_DIVU:
- if (m_param[0] == m_param[1] && !m_param[3].is_immediate_value(0))
- {
- if (m_param[2].is_immediate_value(0))
- convert_to_mov_immediate(0);
- else if (m_param[2].is_immediate() && m_param[3].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(u32(u32(m_param[1].immediate()) / u32(m_param[2].immediate())));
- else if (m_size == 8)
- convert_to_mov_immediate(u64(u64(m_param[1].immediate()) / u64(m_param[2].immediate())));
- }
- }
- break;
-
- // DIVS: convert simple form to MOV if immediate, or if dividing with 0
- case OP_DIVS:
- if (m_param[0] == m_param[1] && !m_param[3].is_immediate_value(0))
- {
- if (m_param[2].is_immediate_value(0))
- convert_to_mov_immediate(0);
- else if (m_param[2].is_immediate() && m_param[3].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(s32(s32(m_param[1].immediate()) / s32(m_param[2].immediate())));
- else if (m_size == 8)
- convert_to_mov_immediate(s64(s64(m_param[1].immediate()) / s64(m_param[2].immediate())));
- }
- }
- break;
-
- // AND: convert to MOV if immediate, or if anding against 0 or 0xffffffff
- case OP_AND:
- if (m_param[1].is_immediate_value(0) || m_param[2].is_immediate_value(0))
- convert_to_mov_immediate(0);
- else if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() & m_param[2].immediate());
- else if (m_param[1].is_immediate_value(instsizemask[m_size]))
- convert_to_mov_param(2);
- else if (m_param[2].is_immediate_value(instsizemask[m_size]))
- convert_to_mov_param(1);
- break;
-
- // TEST: no-op if no flags needed
- case OP_TEST:
- if (m_flags == 0)
- nop();
- break;
-
- // OR: convert to MOV if immediate, or if oring against 0 or 0xffffffff
- case OP_OR:
- if (m_param[1].is_immediate_value(instsizemask[m_size]) || m_param[2].is_immediate_value(instsizemask[m_size]))
- convert_to_mov_immediate(instsizemask[m_size]);
- else if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() | m_param[2].immediate());
- else if (m_param[1].is_immediate_value(0))
- convert_to_mov_param(2);
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // XOR: convert to MOV if immediate, or if xoring against 0
- case OP_XOR:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() ^ m_param[2].immediate());
- else if (m_param[1].is_immediate_value(0))
- convert_to_mov_param(2);
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // LZCNT: convert to MOV if immediate
- case OP_LZCNT:
- if (m_param[1].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(count_leading_zeros_32(m_param[1].immediate()));
- else if (m_size == 8)
- convert_to_mov_immediate(count_leading_zeros_64(m_param[1].immediate()));
- }
- break;
-
- // BSWAP: convert to MOV if immediate
- case OP_BSWAP:
- if (m_param[1].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(swapendian_int32(m_param[1].immediate()));
- else if (m_size == 8)
- convert_to_mov_immediate(swapendian_int64(m_param[1].immediate()));
- }
- break;
-
- // SHL: convert to MOV if immediate or shifting by 0
- case OP_SHL:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- convert_to_mov_immediate(m_param[1].immediate() << m_param[2].immediate());
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // SHR: convert to MOV if immediate or shifting by 0
- case OP_SHR:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(u32(m_param[1].immediate()) >> m_param[2].immediate());
- else if (m_size == 8)
- convert_to_mov_immediate(u64(m_param[1].immediate()) >> m_param[2].immediate());
- }
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // SAR: convert to MOV if immediate or shifting by 0
- case OP_SAR:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(s32(m_param[1].immediate()) >> m_param[2].immediate());
- else if (m_size == 8)
- convert_to_mov_immediate(s64(m_param[1].immediate()) >> m_param[2].immediate());
- }
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // ROL: convert to NOP if immediate or rotating by 0
- case OP_ROL:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(rotl_32(m_param[1].immediate(), m_param[2].immediate()));
- else if (m_size == 8)
- convert_to_mov_immediate(rotl_64(m_param[1].immediate(), m_param[2].immediate()));
- }
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // ROR: convert to NOP if immediate or rotating by 0
- case OP_ROR:
- if (m_param[1].is_immediate() && m_param[2].is_immediate())
- {
- if (m_size == 4)
- convert_to_mov_immediate(rotr_32(m_param[1].immediate(), m_param[2].immediate()));
- else if (m_size == 8)
- convert_to_mov_immediate(rotr_64(m_param[1].immediate(), m_param[2].immediate()));
- }
- else if (m_param[2].is_immediate_value(0))
- convert_to_mov_param(1);
- break;
-
- // FMOV: convert to NOP if move-to-self
- case OP_FMOV:
- if (m_param[0] == m_param[1])
- nop();
- break;
-
- default:
- break;
+ case OP_DEBUG: simplify_op::truncate_imm(*this); break;
+ case OP_EXIT: simplify_op::truncate_imm(*this); break;
+ case OP_EXH: simplify_op::truncate_imm(*this); break;
+ case OP_READ: simplify_op::read(*this); break;
+ case OP_READM: simplify_op::readm(*this); break;
+ case OP_WRITE: simplify_op::write(*this); break;
+ case OP_WRITEM: simplify_op::writem(*this); break;
+ case OP_SET: simplify_op::set(*this); break;
+ case OP_MOV: simplify_op::mov(*this); break;
+ case OP_SEXT: simplify_op::sext(*this); break;
+ case OP_ROLAND: simplify_op::roland(*this); break;
+ case OP_ROLINS: simplify_op::rolins(*this); break;
+ case OP_ADD: simplify_op::add(*this); break;
+ case OP_ADDC: simplify_op::truncate_imm(*this); break;
+ case OP_SUB: simplify_op::sub(*this); break;
+ case OP_SUBB: simplify_op::truncate_imm(*this); break;
+ case OP_CMP: simplify_op::cmp(*this); break;
+ case OP_MULU: simplify_op::mul<OP_MULULW, u32, u64>(*this); break;
+ case OP_MULULW: simplify_op::mullw<u32, u64>(*this); break;
+ case OP_MULS: simplify_op::mul<OP_MULSLW, s32, s64>(*this); break;
+ case OP_MULSLW: simplify_op::mullw<s32, s64>(*this); break;
+ case OP_DIVU: simplify_op::div<u32, u64>(*this); break;
+ case OP_DIVS: simplify_op::div<s32, s64>(*this); break;
+ case OP_AND: simplify_op::_and(*this); break;
+ case OP_TEST: simplify_op::test(*this); break;
+ case OP_OR: simplify_op::_or(*this); break;
+ case OP_XOR: simplify_op::_xor(*this); break;
+ case OP_LZCNT: simplify_op::lzcnt(*this); break;
+ case OP_TZCNT: simplify_op::truncate_imm(*this); break;
+ case OP_BSWAP: simplify_op::bswap(*this); break;
+ case OP_SHL: simplify_op::shl(*this); break;
+ case OP_SHR: simplify_op::shr<u32, u64>(*this); break;
+ case OP_SAR: simplify_op::shr<s32, s64>(*this); break;
+ case OP_ROL: simplify_op::rol(*this); break;
+ case OP_ROLC: simplify_op::rolrc(*this); break;
+ case OP_ROR: simplify_op::ror(*this); break;
+ case OP_RORC: simplify_op::rolrc(*this); break;
+ case OP_FREAD: simplify_op::fread(*this); break;
+ case OP_FWRITE: simplify_op::fwrite(*this); break;
+
+ default: break;
}
- /*
- if (LOG_SIMPLIFICATIONS && memcmp(&orig, inst, sizeof(orig)) != 0)
- {
- std::string disasm1 = orig.disasm(block->drcuml);
- std::string disasm2 = inst->disasm(block->drcuml);
- osd_printf_debug("Simplified: %-50.50s -> %s\n", disasm1, disasm2);
- }
- */
+#if LOG_SIMPLIFICATIONS
+ if (orig != *this)
+ osd_printf_debug("Simplified: %-50.50s -> %s\n", orig.disasm(), disasm());
+#endif
// loop until we stop changing opcodes
- } while (m_opcode != origop);
+ }
+ while (m_opcode != origop);
}
@@ -922,22 +1482,24 @@ std::string uml::instruction::disasm(drcuml_state *drcuml) const
const char *symbol;
u32 symoffset;
- // symbol
- if (drcuml != nullptr && (symbol = drcuml->symbol_find(param.memory(), &symoffset)) != nullptr)
+ if (drcuml && (symbol = drcuml->symbol_find(param.memory(), &symoffset)) != nullptr)
{
+ // symbol
if (symoffset == 0)
util::stream_format(buffer, "[%s]", symbol);
else
util::stream_format(buffer, "[%s+$%X]", symbol, symoffset);
}
-
- // cache memory
else if (drcuml != nullptr && drcuml->cache().contains_pointer(param.memory()))
+ {
+ // cache memory
util::stream_format(buffer, "[+$%X]", u32(uintptr_t(drccodeptr(param.memory()) - drcuml->cache().near())));
-
- // general memory
+ }
else
+ {
+ // general memory
util::stream_format(buffer, "[[$%p]]", param.memory());
+ }
}
break;
@@ -981,5 +1543,5 @@ std::string uml::instruction::disasm(drcuml_state *drcuml) const
if (m_flags & FLAG_C)
buffer.put('C');
}
- return buffer.str();
+ return std::move(buffer).str();
}
diff --git a/src/devices/cpu/uml.h b/src/devices/cpu/uml.h
index 662a0dda2b6..23b6b238c3e 100644
--- a/src/devices/cpu/uml.h
+++ b/src/devices/cpu/uml.h
@@ -14,6 +14,8 @@
#include "drccache.h"
+#include <algorithm>
+
//**************************************************************************
// TYPE DEFINITIONS
@@ -39,12 +41,6 @@ namespace uml
constexpr int REG_F_COUNT = 10;
constexpr int REG_F_END = REG_F0 + REG_F_COUNT;
- // vector registers
- constexpr int REG_V0 = 0xc00;
- constexpr int REG_V_COUNT = 10;
- constexpr int REG_V_END = REG_V0 + REG_V_COUNT;
-
- // map variables
constexpr int MAPVAR_M0 = 0x1000;
constexpr int MAPVAR_COUNT = 10;
constexpr int MAPVAR_END = MAPVAR_M0 + MAPVAR_COUNT;
@@ -56,22 +52,26 @@ namespace uml
constexpr u8 FLAG_S = 0x08; // sign flag (defined for integer only)
constexpr u8 FLAG_U = 0x10; // unordered flag (defined for FP only)
+ // flag combinations
+ constexpr u8 FLAGS_NONE = 0x00;
+ constexpr u8 FLAGS_ALL = FLAG_U | FLAG_S | FLAG_Z | FLAG_V | FLAG_C;
+
// testable conditions; note that these are defined such that (condition ^ 1) is
// always the opposite
enum condition_t
{
COND_ALWAYS = 0,
- COND_Z = 0x80, // requires Z
- COND_NZ, // requires Z
- COND_S, // requires S
- COND_NS, // requires S
- COND_C, // requires C
- COND_NC, // requires C
- COND_V, // requires V
- COND_NV, // requires V
- COND_U, // requires U
- COND_NU, // requires U
+ COND_Z = 0x80, // requires Z (zero/equal)
+ COND_NZ, // requires Z (not zero/unequal)
+ COND_S, // requires S (signed)
+ COND_NS, // requires S (not signed)
+ COND_C, // requires C (carry)
+ COND_NC, // requires C (no carry)
+ COND_V, // requires V (overflow)
+ COND_NV, // requires V (no overflow)
+ COND_U, // requires U (unordered)
+ COND_NU, // requires U (not unordered)
COND_A, // requires CZ, unsigned
COND_BE, // requires CZ, unsigned
COND_G, // requires SVZ, signed
@@ -105,7 +105,6 @@ namespace uml
SIZE_WORD, // 2-byte
SIZE_DWORD, // 4-byte
SIZE_QWORD, // 8-byte
- SIZE_DQWORD, // 16-byte (vector)
SIZE_SHORT = SIZE_DWORD, // 4-byte (float)
SIZE_DOUBLE = SIZE_QWORD // 8-byte (float)
};
@@ -116,8 +115,7 @@ namespace uml
SCALE_x1 = 0, // index * 1
SCALE_x2, // index * 2
SCALE_x4, // index * 4
- SCALE_x8, // index * 8
- SCALE_DEFAULT
+ SCALE_x8 // index * 8
};
// spaces
@@ -125,7 +123,8 @@ namespace uml
{
SPACE_PROGRAM = AS_PROGRAM,
SPACE_DATA = AS_DATA,
- SPACE_IO = AS_IO
+ SPACE_IO = AS_IO,
+ SPACE_OPCODES = AS_OPCODES
};
// opcodes
@@ -143,6 +142,7 @@ namespace uml
// control flow operations
OP_NOP, // NOP
OP_DEBUG, // DEBUG pc
+ OP_BREAK, // BREAK
OP_EXIT, // EXIT src1[,c]
OP_HASHJMP, // HASHJMP mode,pc,handle
OP_JMP, // JMP imm[,c]
@@ -157,6 +157,7 @@ namespace uml
OP_GETFMOD, // GETFMOD dst
OP_GETEXP, // GETEXP dst
OP_GETFLGS, // GETFLGS dst[,f]
+ OP_SETFLGS, // SETFLGS src
OP_SAVE, // SAVE mem
OP_RESTORE, // RESTORE mem
@@ -180,7 +181,9 @@ namespace uml
OP_SUBB, // SUBB dst,src1,src2[,f]
OP_CMP, // CMP src1,src2[,f]
OP_MULU, // MULU dst,edst,src1,src2[,f]
+ OP_MULULW, // MULULW dst,src1,src2[,f]
OP_MULS, // MULS dst,edst,src1,src2[,f]
+ OP_MULSLW, // MULSLW dst,src1,src2[,f]
OP_DIVU, // DIVU dst,edst,src1,src2[,f]
OP_DIVS, // DIVS dst,edst,src1,src2[,f]
OP_AND, // AND dst,src1,src2[,f]
@@ -225,7 +228,7 @@ namespace uml
};
// C function callback definition
- typedef void (*c_function)(void *ptr);
+ using c_function = void (*)(void *ptr);
// class describing a global code handle
class code_handle
@@ -280,7 +283,6 @@ namespace uml
PTYPE_IMMEDIATE, // immediate; value = sign-extended to 64 bits
PTYPE_INT_REGISTER, // integer register; value = REG_I0 - REG_I_END
PTYPE_FLOAT_REGISTER, // floating point register; value = REG_F0 - REG_F_END
- PTYPE_VECTOR_REGISTER, // vector register; value = REG_V0 - REG_V_END
PTYPE_MAPVAR, // map variable; value = MAPVAR_M0 - MAPVAR_END
PTYPE_MEMORY, // memory; value = pointer to memory
PTYPE_SIZE, // size; value = operand_size
@@ -301,19 +303,18 @@ namespace uml
constexpr parameter() : m_type(PTYPE_NONE), m_value(0) { }
constexpr parameter(parameter const &param) : m_type(param.m_type), m_value(param.m_value) { }
constexpr parameter(u64 val) : m_type(PTYPE_IMMEDIATE), m_value(val) { }
- parameter(operand_size size, memory_scale scale) : m_type(PTYPE_SIZE_SCALE), m_value((scale << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); assert(scale >= SCALE_x1 && scale <= SCALE_x8); }
- parameter(operand_size size, memory_space space) : m_type(PTYPE_SIZE_SPACE), m_value((space << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); assert(space >= SPACE_PROGRAM && space <= SPACE_IO); }
+ parameter(operand_size size, memory_scale scale) : m_type(PTYPE_SIZE_SCALE), m_value((scale << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_QWORD); assert(scale >= SCALE_x1 && scale <= SCALE_x8); }
+ parameter(operand_size size, memory_space space) : m_type(PTYPE_SIZE_SPACE), m_value((space << 4) | size) { assert(size >= SIZE_BYTE && size <= SIZE_QWORD); }
parameter(code_handle &handle) : m_type(PTYPE_CODE_HANDLE), m_value(reinterpret_cast<parameter_value>(&handle)) { }
constexpr parameter(code_label const &label) : m_type(PTYPE_CODE_LABEL), m_value(label) { }
// creators for types that don't safely default
static parameter make_ireg(int regnum) { assert(regnum >= REG_I0 && regnum < REG_I_END); return parameter(PTYPE_INT_REGISTER, regnum); }
static parameter make_freg(int regnum) { assert(regnum >= REG_F0 && regnum < REG_F_END); return parameter(PTYPE_FLOAT_REGISTER, regnum); }
- static parameter make_vreg(int regnum) { assert(regnum >= REG_V0 && regnum < REG_V_END); return parameter(PTYPE_VECTOR_REGISTER, regnum); }
static parameter make_mapvar(int mvnum) { assert(mvnum >= MAPVAR_M0 && mvnum < MAPVAR_END); return parameter(PTYPE_MAPVAR, mvnum); }
static parameter make_memory(void *base) { return parameter(PTYPE_MEMORY, reinterpret_cast<parameter_value>(base)); }
static parameter make_memory(void const *base) { return parameter(PTYPE_MEMORY, reinterpret_cast<parameter_value>(const_cast<void *>(base))); }
- static parameter make_size(operand_size size) { assert(size >= SIZE_BYTE && size <= SIZE_DQWORD); return parameter(PTYPE_SIZE, size); }
+ static parameter make_size(operand_size size) { assert(size >= SIZE_BYTE && size <= SIZE_QWORD); return parameter(PTYPE_SIZE, size); }
static parameter make_string(char const *string) { return parameter(PTYPE_STRING, reinterpret_cast<parameter_value>(const_cast<char *>(string))); }
static parameter make_cfunc(c_function func) { return parameter(PTYPE_C_FUNCTION, reinterpret_cast<parameter_value>(func)); }
static parameter make_rounding(float_rounding_mode mode) { assert(mode >= ROUND_TRUNC && mode <= ROUND_DEFAULT); return parameter(PTYPE_ROUNDING, mode); }
@@ -327,7 +328,6 @@ namespace uml
u64 immediate() const { assert(m_type == PTYPE_IMMEDIATE); return m_value; }
int ireg() const { assert(m_type == PTYPE_INT_REGISTER); assert(m_value >= REG_I0 && m_value < REG_I_END); return m_value; }
int freg() const { assert(m_type == PTYPE_FLOAT_REGISTER); assert(m_value >= REG_F0 && m_value < REG_F_END); return m_value; }
- int vreg() const { assert(m_type == PTYPE_VECTOR_REGISTER); assert(m_value >= REG_V0 && m_value < REG_V_END); return m_value; }
int mapvar() const { assert(m_type == PTYPE_MAPVAR); assert(m_value >= MAPVAR_M0 && m_value < MAPVAR_END); return m_value; }
void *memory() const { assert(m_type == PTYPE_MEMORY); return reinterpret_cast<void *>(m_value); }
operand_size size() const { assert(m_type == PTYPE_SIZE || m_type == PTYPE_SIZE_SCALE || m_type == PTYPE_SIZE_SPACE); return operand_size(m_value & 15); }
@@ -343,7 +343,6 @@ namespace uml
constexpr bool is_immediate() const { return m_type == PTYPE_IMMEDIATE; }
constexpr bool is_int_register() const { return m_type == PTYPE_INT_REGISTER; }
constexpr bool is_float_register() const { return m_type == PTYPE_FLOAT_REGISTER; }
- constexpr bool is_vector_register() const { return m_type == PTYPE_VECTOR_REGISTER; }
constexpr bool is_mapvar() const { return m_type == PTYPE_MAPVAR; }
constexpr bool is_memory() const { return m_type == PTYPE_MEMORY; }
constexpr bool is_size() const { return m_type == PTYPE_SIZE; }
@@ -391,9 +390,14 @@ namespace uml
class instruction
{
public:
+ // constants
+ static constexpr int MAX_PARAMS = 4;
+
// construction/destruction
constexpr instruction() : m_param{ } { }
+ bool is_param_out(int paramnum) const { assert(m_opcode < OP_MAX); assert(paramnum < m_numparams); return (s_opcode_info_table[m_opcode].param[paramnum].output & 0x02) != 0; }
+
// getters
constexpr opcode_t opcode() const { return m_opcode; }
constexpr condition_t condition() const { return m_condition; }
@@ -413,6 +417,22 @@ namespace uml
u8 modified_flags() const;
void simplify();
+ // operators
+ bool operator==(instruction const &that) const
+ {
+ if ((m_opcode != that.m_opcode) || (m_condition != that.m_condition) || (m_flags != that.m_flags) || (m_size != that.m_size) || (m_numparams != that.m_numparams))
+ return false;
+ auto const last = m_param + m_numparams;
+ return std::mismatch(std::begin(m_param), last, std::begin(that.m_param)).first == last;
+ }
+ bool operator!=(instruction const &that) const
+ {
+ if ((m_opcode != that.m_opcode) || (m_condition != that.m_condition) || (m_flags != that.m_flags) || (m_size != that.m_size) || (m_numparams != that.m_numparams))
+ return true;
+ auto const last = m_param + m_numparams;
+ return std::mismatch(std::begin(m_param), last, std::begin(that.m_param)).first != last;
+ }
+
// compile-time opcodes
void handle(code_handle &hand) { configure(OP_HANDLE, 4, hand); }
void hash(u32 mode, u32 pc) { configure(OP_HASH, 4, mode, pc); }
@@ -422,6 +442,7 @@ namespace uml
// control flow operations
void nop() { configure(OP_NOP, 4); }
+ void break_() { configure(OP_BREAK, 4); }
void debug(u32 pc) { configure(OP_DEBUG, 4, pc); }
void exit(parameter param) { configure(OP_EXIT, 4, param); }
void exit(condition_t cond, parameter param) { configure(OP_EXIT, 4, param, cond); }
@@ -443,17 +464,18 @@ namespace uml
void getfmod(parameter dst) { configure(OP_GETFMOD, 4, dst); }
void getexp(parameter dst) { configure(OP_GETEXP, 4, dst); }
void getflgs(parameter dst, u32 flags) { configure(OP_GETFLGS, 4, dst, flags); }
+ void setflgs(u32 flags) { configure(OP_SETFLGS, 4, flags); }
void save(drcuml_machine_state *dst) { configure(OP_SAVE, 4, parameter::make_memory(dst)); }
void restore(drcuml_machine_state *src) { configure(OP_RESTORE, 4, parameter::make_memory(src)); }
// 32-bit integer operations
- void load(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_LOAD, 4, dst, parameter::make_memory(base), index, parameter(size, scale)); }
- void loads(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_LOADS, 4, dst, parameter::make_memory(base), index, parameter(size, scale)); }
- void store(void *base, parameter index, parameter src1, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_STORE, 4, parameter::make_memory(base), index, src1, parameter(size, scale)); }
- void read(parameter dst, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READ, 4, dst, src1, parameter(size, space)); }
- void readm(parameter dst, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READM, 4, dst, src1, mask, parameter(size, space)); }
- void write(parameter dst, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITE, 4, dst, src1, parameter(size, space)); }
- void writem(parameter dst, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITEM, 4, dst, src1, mask, parameter(size, space)); }
+ void load(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale) { configure(OP_LOAD, 4, dst, parameter::make_memory(base), index, parameter(size, scale)); }
+ void loads(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale) { configure(OP_LOADS, 4, dst, parameter::make_memory(base), index, parameter(size, scale)); }
+ void store(void *base, parameter index, parameter src1, operand_size size, memory_scale scale) { configure(OP_STORE, 4, parameter::make_memory(base), index, src1, parameter(size, scale)); }
+ void read(parameter dst, parameter addr, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READ, 4, dst, addr, parameter(size, space)); }
+ void readm(parameter dst, parameter addr, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READM, 4, dst, addr, mask, parameter(size, space)); }
+ void write(parameter addr, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITE, 4, addr, src1, parameter(size, space)); }
+ void writem(parameter addr, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITEM, 4, addr, src1, mask, parameter(size, space)); }
void carry(parameter src, parameter bitnum) { configure(OP_CARRY, 4, src, bitnum); }
void set(condition_t cond, parameter dst) { configure(OP_SET, 4, dst, cond); }
void mov(parameter dst, parameter src1) { configure(OP_MOV, 4, dst, src1); }
@@ -467,7 +489,9 @@ namespace uml
void subb(parameter dst, parameter src1, parameter src2) { configure(OP_SUBB, 4, dst, src1, src2); }
void cmp(parameter src1, parameter src2) { configure(OP_CMP, 4, src1, src2); }
void mulu(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_MULU, 4, dst, edst, src1, src2); }
+ void mululw(parameter dst, parameter src1, parameter src2) { configure(OP_MULULW, 4, dst, src1, src2); }
void muls(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_MULS, 4, dst, edst, src1, src2); }
+ void mulslw(parameter dst, parameter src1, parameter src2) { configure(OP_MULSLW, 4, dst, src1, src2); }
void divu(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_DIVU, 4, dst, edst, src1, src2); }
void divs(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_DIVS, 4, dst, edst, src1, src2); }
void _and(parameter dst, parameter src1, parameter src2) { configure(OP_AND, 4, dst, src1, src2); }
@@ -486,13 +510,13 @@ namespace uml
void rorc(parameter dst, parameter src, parameter count) { configure(OP_RORC, 4, dst, src, count); }
// 64-bit integer operations
- void dload(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_LOAD, 8, dst, parameter::make_memory(base), index, parameter(size, scale)); }
- void dloads(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_LOADS, 8, dst, parameter::make_memory(base), index, parameter(size, scale)); }
- void dstore(void *base, parameter index, parameter src1, operand_size size, memory_scale scale = SCALE_DEFAULT) { configure(OP_STORE, 8, parameter::make_memory(base), index, src1, parameter(size, scale)); }
- void dread(parameter dst, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READ, 8, dst, src1, parameter(size, space)); }
- void dreadm(parameter dst, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READM, 8, dst, src1, mask, parameter(size, space)); }
- void dwrite(parameter dst, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITE, 8, dst, src1, parameter(size, space)); }
- void dwritem(parameter dst, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITEM, 8, dst, src1, mask, parameter(size, space)); }
+ void dload(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale) { configure(OP_LOAD, 8, dst, parameter::make_memory(base), index, parameter(size, scale)); }
+ void dloads(parameter dst, void const *base, parameter index, operand_size size, memory_scale scale) { configure(OP_LOADS, 8, dst, parameter::make_memory(base), index, parameter(size, scale)); }
+ void dstore(void *base, parameter index, parameter src1, operand_size size, memory_scale scale) { configure(OP_STORE, 8, parameter::make_memory(base), index, src1, parameter(size, scale)); }
+ void dread(parameter dst, parameter addr, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READ, 8, dst, addr, parameter(size, space)); }
+ void dreadm(parameter dst, parameter addr, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_READM, 8, dst, addr, mask, parameter(size, space)); }
+ void dwrite(parameter addr, parameter src1, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITE, 8, addr, src1, parameter(size, space)); }
+ void dwritem(parameter addr, parameter src1, parameter mask, operand_size size, memory_space space = SPACE_PROGRAM) { configure(OP_WRITEM, 8, addr, src1, mask, parameter(size, space)); }
void dcarry(parameter src, parameter bitnum) { configure(OP_CARRY, 8, src, bitnum); }
void dset(condition_t cond, parameter dst) { configure(OP_SET, 8, dst, cond); }
void dmov(parameter dst, parameter src1) { configure(OP_MOV, 8, dst, src1); }
@@ -506,7 +530,9 @@ namespace uml
void dsubb(parameter dst, parameter src1, parameter src2) { configure(OP_SUBB, 8, dst, src1, src2); }
void dcmp(parameter src1, parameter src2) { configure(OP_CMP, 8, src1, src2); }
void dmulu(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_MULU, 8, dst, edst, src1, src2); }
+ void dmululw(parameter dst, parameter src1, parameter src2) { configure(OP_MULULW, 8, dst, src1, src2); }
void dmuls(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_MULS, 8, dst, edst, src1, src2); }
+ void dmulslw(parameter dst, parameter src1, parameter src2) { configure(OP_MULSLW, 8, dst, src1, src2); }
void ddivu(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_DIVU, 8, dst, edst, src1, src2); }
void ddivs(parameter dst, parameter edst, parameter src1, parameter src2) { configure(OP_DIVS, 8, dst, edst, src1, src2); }
void dand(parameter dst, parameter src1, parameter src2) { configure(OP_AND, 8, dst, src1, src2); }
@@ -527,8 +553,8 @@ namespace uml
// 32-bit floating point operations
void fsload(parameter dst, void const *base, parameter index) { configure(OP_FLOAD, 4, dst, parameter::make_memory(base), index); }
void fsstore(void *base, parameter index, parameter src1) { configure(OP_FSTORE, 4, parameter::make_memory(base), index, src1); }
- void fsread(parameter dst, parameter src1, memory_space space) { configure(OP_FREAD, 4, dst, src1, parameter(SIZE_SHORT, space)); }
- void fswrite(parameter dst, parameter src1, memory_space space) { configure(OP_FWRITE, 4, dst, src1, parameter(SIZE_SHORT, space)); }
+ void fsread(parameter dst, parameter addr, memory_space space) { configure(OP_FREAD, 4, dst, addr, parameter(SIZE_SHORT, space)); }
+ void fswrite(parameter addr, parameter src1, memory_space space) { configure(OP_FWRITE, 4, addr, src1, parameter(SIZE_SHORT, space)); }
void fsmov(parameter dst, parameter src1) { configure(OP_FMOV, 4, dst, src1); }
void fsmov(condition_t cond, parameter dst, parameter src1) { configure(OP_FMOV, 4, dst, src1, cond); }
void fstoint(parameter dst, parameter src1, operand_size size, float_rounding_mode round) { configure(OP_FTOINT, 4, dst, src1, parameter::make_size(size), parameter::make_rounding(round)); }
@@ -550,8 +576,8 @@ namespace uml
// 64-bit floating point operations
void fdload(parameter dst, void const *base, parameter index) { configure(OP_FLOAD, 8, dst, parameter::make_memory(base), index); }
void fdstore(void *base, parameter index, parameter src1) { configure(OP_FSTORE, 8, parameter::make_memory(base), index, src1); }
- void fdread(parameter dst, parameter src1, memory_space space) { configure(OP_FREAD, 8, dst, src1, parameter(SIZE_DOUBLE, space)); }
- void fdwrite(parameter dst, parameter src1, memory_space space) { configure(OP_FWRITE, 8, dst, src1, parameter(SIZE_DOUBLE, space)); }
+ void fdread(parameter dst, parameter addr, memory_space space) { configure(OP_FREAD, 8, dst, addr, parameter(SIZE_DOUBLE, space)); }
+ void fdwrite(parameter addr, parameter src1, memory_space space) { configure(OP_FWRITE, 8, addr, src1, parameter(SIZE_DOUBLE, space)); }
void fdmov(parameter dst, parameter src1) { configure(OP_FMOV, 8, dst, src1); }
void fdmov(condition_t cond, parameter dst, parameter src1) { configure(OP_FMOV, 8, dst, src1, cond); }
void fdtoint(parameter dst, parameter src1, operand_size size, float_rounding_mode round) { configure(OP_FTOINT, 8, dst, src1, parameter::make_size(size), parameter::make_rounding(round)); }
@@ -571,9 +597,6 @@ namespace uml
void fdcopyi(parameter dst, parameter src) { configure(OP_FCOPYI, 8, dst, src); }
void icopyfd(parameter dst, parameter src) { configure(OP_ICOPYF, 8, dst, src); }
- // constants
- static constexpr int MAX_PARAMS = 4;
-
private:
// internal configuration
void configure(opcode_t op, u8 size, condition_t cond = COND_ALWAYS);
@@ -584,8 +607,6 @@ namespace uml
// opcode validation and simplification
void validate();
- void convert_to_mov_immediate(u64 immediate) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = immediate; }
- void convert_to_mov_param(int pnum) { m_opcode = OP_MOV; m_numparams = 2; m_param[1] = m_param[pnum]; }
// internal state
opcode_t m_opcode = OP_INVALID; // opcode
@@ -596,6 +617,7 @@ namespace uml
parameter m_param[MAX_PARAMS]; // up to 4 parameters
static opcode_info const s_opcode_info_table[OP_MAX];
+ struct simplify_op;
};
// structure describing rules for parameter encoding
@@ -609,7 +631,6 @@ namespace uml
// global inline functions to specify a register parameter by index
inline parameter ireg(int n) { return parameter::make_ireg(REG_I0 + n); }
inline parameter freg(int n) { return parameter::make_freg(REG_F0 + n); }
- inline parameter vreg(int n) { return parameter::make_vreg(REG_V0 + n); }
inline parameter mapvar(int n) { return parameter::make_mapvar(MAPVAR_M0 + n); }
// global inline functions to define memory parameters
@@ -638,17 +659,6 @@ namespace uml
const parameter F8(parameter::make_freg(REG_F0 + 8));
const parameter F9(parameter::make_freg(REG_F0 + 9));
- const parameter V0(parameter::make_vreg(REG_V0 + 0));
- const parameter V1(parameter::make_vreg(REG_V0 + 1));
- const parameter V2(parameter::make_vreg(REG_V0 + 2));
- const parameter V3(parameter::make_vreg(REG_V0 + 3));
- const parameter V4(parameter::make_vreg(REG_V0 + 4));
- const parameter V5(parameter::make_vreg(REG_V0 + 5));
- const parameter V6(parameter::make_vreg(REG_V0 + 6));
- const parameter V7(parameter::make_vreg(REG_V0 + 7));
- const parameter V8(parameter::make_vreg(REG_V0 + 8));
- const parameter V9(parameter::make_vreg(REG_V0 + 9));
-
const parameter M0(parameter::make_mapvar(MAPVAR_M0 + 0));
const parameter M1(parameter::make_mapvar(MAPVAR_M0 + 1));
const parameter M2(parameter::make_mapvar(MAPVAR_M0 + 2));
diff --git a/src/devices/cpu/unsp/unsp.h b/src/devices/cpu/unsp/unsp.h
index 010720adeec..b7b72a3cf5a 100644
--- a/src/devices/cpu/unsp/unsp.h
+++ b/src/devices/cpu/unsp/unsp.h
@@ -124,14 +124,13 @@ protected:
unsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_stop() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_stop() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 5; }
virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
- virtual uint32_t execute_input_lines() const noexcept override { return 0; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -395,8 +394,8 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
virtual void execute_extended_group(uint16_t op) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
enum
diff --git a/src/devices/cpu/unsp/unspdrc.cpp b/src/devices/cpu/unsp/unspdrc.cpp
index 8034e79f4a3..a8162b82b22 100644
--- a/src/devices/cpu/unsp/unspdrc.cpp
+++ b/src/devices/cpu/unsp/unspdrc.cpp
@@ -610,7 +610,7 @@ void unsp_device::generate_sequence_instruction(drcuml_block &block, compiler_st
UML_MAPVAR(block, MAPVAR_PC, desc->pc);
/* if we are debugging, call the debugger */
- if ((machine().debug_flags & DEBUG_FLAG_ENABLED) != 0)
+ if (debugger_enabled())
{
//save_fast_iregs(block);
UML_DEBUG(block, desc->pc);
diff --git a/src/devices/cpu/upd177x/upd177x.cpp b/src/devices/cpu/upd177x/upd177x.cpp
new file mode 100644
index 00000000000..f8e9590f873
--- /dev/null
+++ b/src/devices/cpu/upd177x/upd177x.cpp
@@ -0,0 +1,792 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*
+
+TODO:
+- Only upd1771c supported
+- Noise, time, and external interrupts not implemented
+- CH1/CH2 not implemented
+- Not all instructions implemented
+
+*/
+
+#include "emu.h"
+#include "upd177x.h"
+#include "upd177xd.h"
+
+#define VERBOSE 0
+#include "logmacro.h"
+
+
+DEFINE_DEVICE_TYPE(UPD1771C, upd1771c_cpu_device, "upd1771c", "NEC uPD1771C")
+
+
+enum
+{
+ UPD177X_PC, UPD177X_SP,
+ UPD177X_A, UPD177X_A_SAVE, UPD177X_H, UPD177X_N, UPD177X_X, UPD177X_Y,
+ UPD177X_TIMER, UPD177X_PNC1, UPD177X_PNC2,
+ UPD177X_PA, UPD177X_PB, UPD177X_MD0, UPD177X_MD1, UPD177X_SKIP, UPD177X_SKIP_SAVE
+};
+
+
+static constexpr u8 INT_TONE1 = 1 << 0;
+static constexpr u8 INT_TONE2 = 1 << 1;
+static constexpr u8 INT_TONE3 = 1 << 2;
+static constexpr u8 INT_TONE4 = 1 << 3;
+static constexpr u8 INT_NOISE = 1 << 4;
+static constexpr u8 INT_EXT = 1 << 5;
+static constexpr u8 INT_TIME = 1 << 6;
+
+static constexpr u8 MD0_3264_BIT = 0;
+static constexpr u8 MD0_TN_BIT = 1;
+static constexpr u8 MD0_NS_BIT = 2;
+static constexpr u8 MD0_NSF1_BIT = 3;
+static constexpr u8 MD0_NSF2_BIT = 4;
+static constexpr u8 MD0_OUT_BIT = 5;
+static constexpr u8 MD0_IF_BIT = 6;
+static constexpr u8 MD1_NSF3_BIT = 0;
+static constexpr u8 MD1_TIME_BIT = 1;
+static constexpr u8 MD1_EXT_BIT = 2;
+
+static constexpr u16 VECTOR_TONE1 = 0x20;
+static constexpr u16 VECTOR_TONE2 = 0x24;
+static constexpr u16 VECTOR_TONE3 = 0x28;
+static constexpr u16 VECTOR_TONE4 = 0x2c;
+static constexpr u16 VECTOR_NOISE = 0x48;
+static constexpr u16 VECTOR_EXT = 0x60;
+static constexpr u16 VECTOR_TIME = 0x80;
+
+static constexpr u8 STACK_START = 0x20;
+
+
+upd177x_cpu_device::upd177x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , device_sound_interface(mconfig, *this)
+ , m_program_config("program", ENDIANNESS_LITTLE, 16, 16, -1, address_map_constructor(FUNC(upd177x_cpu_device::program_map), this))
+ , m_pb_out_cb(*this)
+{ }
+
+
+upd1771c_cpu_device::upd1771c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : upd177x_cpu_device(mconfig, UPD1771C, tag, owner, clock)
+{ }
+
+
+device_memory_interface::space_config_vector upd177x_cpu_device::memory_space_config() const
+{
+ return space_config_vector
+ {
+ std::make_pair(AS_PROGRAM, &m_program_config)
+ };
+}
+
+
+void upd177x_cpu_device::program_map(address_map &map)
+{
+ map(0, 0x1ff).rom();
+}
+
+
+void upd177x_cpu_device::device_start()
+{
+ space(AS_PROGRAM).specific(m_program);
+
+ state_add(UPD177X_PC, "PC", m_pc);
+ state_add(STATE_GENPC, "GENPC", m_pc).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_pc).noshow();
+ state_add(UPD177X_SP, "SP", m_sp);
+ state_add(UPD177X_A, "A", m_a);
+ state_add(UPD177X_A_SAVE, "A'", m_a_save);
+ state_add(UPD177X_H, "H", m_h);
+ state_add(UPD177X_N, "N", m_n);
+ state_add(UPD177X_TIMER, "Timer", m_timer);
+ state_add(UPD177X_X, "X", m_x);
+ state_add(UPD177X_Y, "Y", m_y);
+ state_add(UPD177X_PA, "PA", m_pa);
+ state_add(UPD177X_PB, "PB", m_pb);
+ state_add(UPD177X_MD0, "MD0", m_md0);
+ state_add(UPD177X_MD1, "MD1", m_md1);
+ state_add(UPD177X_PNC1, "PNC1", m_pnc1);
+ state_add(UPD177X_PNC2, "PNC2", m_pnc2);
+ state_add(UPD177X_SKIP, "SKIP", m_skip);
+ state_add(UPD177X_SKIP_SAVE, "SKIP'", m_skip_save);
+
+ save_item(NAME(m_pc));
+ save_item(NAME(m_sp));
+ save_item(NAME(m_a));
+ save_item(NAME(m_a_save));
+ save_item(NAME(m_h));
+ save_item(NAME(m_n));
+ save_item(NAME(m_timer));
+ save_item(NAME(m_x));
+ save_item(NAME(m_y));
+ save_item(NAME(m_pa));
+ save_item(NAME(m_pb));
+ save_item(NAME(m_ram));
+ save_item(NAME(m_md0));
+ save_item(NAME(m_md1));
+ save_item(NAME(m_pnc1));
+ save_item(NAME(m_pnc2));
+ save_item(NAME(m_skip));
+ save_item(NAME(m_skip_save));
+ save_item(NAME(m_ts));
+ save_item(NAME(m_ns));
+ save_item(NAME(m_ss));
+ save_item(NAME(m_dac));
+ save_item(NAME(m_dac_sign));
+ save_item(NAME(m_tn_int));
+ save_item(NAME(m_counter));
+
+ set_icountptr(m_icount);
+
+ m_channel = stream_alloc(0, 1, clock() / 4);
+}
+
+
+void upd177x_cpu_device::device_reset()
+{
+ m_pc = 0;
+ m_sp = 0;
+ m_a = 0;
+ m_a_save = 0;
+ m_h = 0;
+ m_n = 0;
+ m_x = 0;
+ m_y = 0;
+ m_pa = 0;
+ m_pb = 0;
+ m_md0 = 0;
+ m_md1 = 0;
+ m_skip = false;
+ m_skip_save = false;
+ m_ts = false;
+ m_ns = false;
+ m_ss = false;
+ m_dac = 0;
+ m_dac_sign = true;
+ m_tn_int = false;
+ m_counter = 0;
+ m_timer = 0;
+ set_noise_counter_bit();
+}
+
+
+std::unique_ptr<util::disasm_interface> upd177x_cpu_device::create_disassembler()
+{
+ return std::make_unique<upd177x_disassembler>();
+}
+
+
+void upd177x_cpu_device::op0xxx(u16 opcode)
+{
+ switch (opcode)
+ {
+ case 0x0000: // NOP
+ break;
+ case 0x0002: // OUT PA
+ m_pa = m_a;
+ break;
+ case 0x0004: // OUT PB
+ m_pb = m_a;
+ m_pb_out_cb(m_pb);
+ break;
+ case 0x0008: // MOV X,RG
+ m_x = m_pnc1 & 0x7f;
+ break;
+ case 0x0201: // MOV N,A
+ m_n = m_a;
+ break;
+ case 0x0208: // MOV X,A
+ m_x = m_a & 0x7f;
+ break;
+ case 0x0401: // IN PA
+ m_a = m_pa;
+ break;
+ case 0x0402: // IN PB
+ m_a = m_pb;
+ break;
+ case 0x0404: // RAR
+ m_a = ((m_a & 0x01) << 7) | (m_a >> 1);
+ break;
+ case 0x0408: // RAL
+ m_a = ((m_a & 0x80) >> 7) | (m_a << 1);
+ break;
+ case 0x0502: // OUT DA
+ m_channel->update();
+ m_dac = (m_ss ^ m_ts) ? ~m_a : m_a;
+ m_dac_sign = m_ss;
+ break;
+ case 0x0504: // MUL1
+ if (!BIT(m_y, 0))
+ {
+ m_a = m_a >> 1;
+ }
+ m_y = m_y >> 1;
+ break;
+ case 0x050c: // MUL2, usually gets executed 5 times to calculate X * (Y / 32)
+ if (BIT(m_y, 0))
+ {
+ m_a = (m_a + m_x) >> 1;
+ }
+ else
+ {
+ m_a = m_a >> 1;
+ }
+ m_y = m_y >> 1;
+ break;
+ case 0x0800: // RET
+ m_sp = (m_sp - 1) & 0x07;
+ m_pc = (m_ram[STACK_START + (m_sp * 2) + 1] << 8) | m_ram[STACK_START + (m_sp * 2)];
+ break;
+ case 0x090f: // RETI
+ m_sp = (m_sp - 1) & 0x07;
+ m_pc = (m_ram[STACK_START + (m_sp * 2) + 1] << 8) | m_ram[STACK_START + (m_sp * 2)];
+ m_a = m_a_save;
+ m_skip = m_skip_save;
+ m_tn_int = false;
+ break;
+
+ case 0x0005: // STF
+ case 0x0101: // MON
+ case 0x0501: // JMPA
+ case 0x0602: // OFF
+ case 0x0801: // RETS
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::op1xxx(u16 opcode)
+{
+ switch (opcode & 0x0e0f)
+ {
+ case 0x0000: // MOV Y,Rr
+ m_y = m_ram[(opcode >> 4) & 0x1f] & 0x1f;
+ break;
+ case 0x0005: // MOV A,Rr
+ m_a = m_ram[(opcode >> 4) & 0x1f];
+ break;
+ case 0x0201: // MOV Rr,A
+ m_ram[(opcode >> 4) & 0x1f] = m_a;
+ break;
+ case 0x0409: // MIX Rr
+ case 0x0509: // MIX Rr
+ m_ns = BIT(m_md0, MD0_NSF1_BIT) ? BIT(m_pnc2 , 2) : false;
+ if (m_ts ^ m_ns)
+ {
+ m_ss = m_ts ^ ((m_ram[(opcode >> 4) & 0x1f] < m_a) ? true : false);
+ m_a = m_ram[(opcode >> 4) & 0x1f] - m_a;
+ }
+ else
+ {
+ m_ss = m_ts ^ ((m_ram[(opcode >> 4) & 0x1f] + m_a > 255) ? true : false);
+ m_a = m_ram[(opcode >> 4) & 0x1f] + m_a;
+ }
+ break;
+ case 0x0601: // MOV (H),A
+ m_ram[m_h] = m_a;
+ break;
+ case 0x0801: // TBL0 A,(Rr)
+ case 0x0901: // TBL0 A,(Rr)
+ {
+ const u8 reg = (opcode >> 4) & 0x1e;
+ const u16 addr = (m_ram[reg + 1] << 8) | m_ram[reg];
+ const u16 data = m_program.read_word(addr >> 1);
+ m_a = BIT(addr, 0) ? data >> 8 : data & 0xff;
+ }
+ m_cycle();
+ break;
+ case 0x0802: // TBL0 X,(Rr)
+ case 0x0902: // TBL0 X,(Rr)
+ {
+ const u8 reg = (opcode >> 4) & 0x1e;
+ const u16 addr = (m_ram[reg + 1] << 8) | m_ram[reg];
+ const u16 data = m_program.read_word(addr >> 1);
+ m_x = BIT(addr, 0) ? (data >> 8) : data;
+ m_ts = BIT(m_x, 7);
+ m_x &= 0x7f;
+ }
+ m_cycle();
+ break;
+
+ case 0x000a: // MOV H,Rr
+ case 0x0202: // MOV Rr,H
+ case 0x0205: // XCHG Rr,A
+ case 0x020a: // XCHG Rr,H
+ case 0x0405: // MOV A,(H)
+ case 0x0605: // XCHG (H),A
+ case 0x0804: // TBL0 Y,(Rr)
+ case 0x0904: // TBL0 Y,(Rr)
+ case 0x0808: // CALL0 (Rr)
+ case 0x0908: // CALL0 (Rr)
+ case 0x0a01: // TBL1 A,(Rr)
+ case 0x0b01: // TBL1 A,(Rr)
+ case 0x0a02: // TBL1 X,(Rr)
+ case 0x0b02: // TBL1 X,(Rr)
+ case 0x0a04: // TBL1 Y,(Rr)
+ case 0x0b04: // TBL1 Y,(Rr)
+ case 0x0a08: // CALL1 (Rr)
+ case 0x0b08: // CALL1 (Rr)
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::op2xxx(u16 opcode)
+{
+ switch (opcode & 0x0f00)
+ {
+ case 0x0100: // MVI MD0,A
+ m_md0 = opcode & 0x7f;
+ set_noise_counter_bit();
+ break;
+ case 0x0000: // JPP n
+ case 0x8000: // JMPFZ n
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::op3xxx(u16 opcode)
+{
+ switch (opcode & 0x0f00)
+ {
+ case 0x0400: // MVI A,n
+ m_a = opcode & 0xff;
+ break;
+ case 0x0800:
+ if (!(opcode & 0x00c0))
+ {
+ m_h = opcode & 0x3f;
+ }
+ break;
+ case 0x0100: // MVI MD1,n
+ case 0x0200: // MVI (H),n
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::op7xxx(u16 opcode)
+{
+ // CALL
+ m_ram[STACK_START + (m_sp * 2) + 1] = m_pc >> 8;
+ m_ram[STACK_START + (m_sp * 2)] = m_pc & 0xff;
+ m_sp = (m_sp + 1) & 0x07;
+ m_pc = (m_pc & 0xf000) | (opcode & 0x0fff);
+}
+
+
+void upd177x_cpu_device::op89xxx(u16 opcode)
+{
+ switch (opcode & 0x1f00)
+ {
+ case 0x0000: // ADI A,n
+ m_a = m_a + (opcode & 0xff);
+ break;
+ case 0x0200: // ANDI A,n
+ m_a = m_a & (opcode & 0xff);
+ break;
+ case 0x0600: // ORI A,n
+ m_a = m_a | (opcode & 0xff);
+ break;
+ case 0x0800: // ADIS A,n
+ m_a = m_a + (opcode & 0xff);
+ m_skip = (m_a < (opcode & 0xff));
+ break;
+ case 0x0c00: // SBIS A,n
+ m_skip = m_a < (opcode & 0xff);
+ m_a = m_a - (opcode & 0xff);
+ break;
+ case 0x0e00: // XORI A,n
+ m_a = m_a ^ (opcode & 0xff);
+ break;
+ case 0x1000: // TADI NC A,n
+ m_skip = (m_a + (opcode & 0xff) < 0x100);
+ break;
+ case 0x1400: // TSBI NC A,n
+ m_skip = (m_a >= (opcode & 0xff));
+ break;
+ case 0x1600: // TSBI NZ A,n
+ m_skip = (m_a != (opcode & 0xff));
+ break;
+ case 0x1a00: // TANDI Z A,n
+ m_skip = (m_a & (opcode & 0xff)) == 0;
+ break;
+ case 0x1c00: // TSBI C A,n
+ m_skip = (m_a < (opcode & 0xff));
+ break;
+
+ case 0x0100: // ADI MD1,n
+ case 0x1100: // ADI MD0,n
+ case 0x0300: // ANDI MD1,n
+ case 0x1300: // ANDI MD0,n
+ case 0x0400: // SBI A,n
+ case 0x0500: // SBI MD1,n
+ case 0x1500: // SBI MD0,n
+ case 0x0700: // ORI MD1,n
+ case 0x1700: // ORI MD0,n
+ case 0x0900: // ADIS MD1,n
+ case 0x1900: // ADIS MD0,n
+ case 0x0a00: // ANDIS A,n
+ case 0x0b00: // ANDIS MD1,n
+ case 0x1b00: // ANDIS MD0,n
+ case 0x0d00: // SBIS MD1,n
+ case 0x1d00: // SBIS MD0,n
+ case 0x0f00: // XORI MD1,n
+ case 0x1f00: // XORI MD0,n
+ case 0x1200: // TANDI NZ A,n
+ case 0x1800: // TADI C A,n
+ case 0x1e00: // TSBI Z A,n
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::opabxxx(u16 opcode)
+{
+ switch (opcode & 0x1f00)
+ {
+ case 0x0d00: // SBS H,n
+ {
+ u8 old_h = m_h;
+ m_h = (m_h - (opcode & 0x3f)) & 0x3f;
+ if (old_h < m_h)
+ {
+ m_skip = true;
+ }
+ }
+ break;
+ case 0x1200: // TANDI NZ (H),n
+ m_skip = (m_ram[m_h] & (opcode & 0xff));
+ break;
+ case 0x1a00: // TANDI Z (H),n
+ m_skip = (m_ram[m_h] & (opcode & 0xff)) == 0;
+ break;
+ case 0x1f00: // TSB Z H,n
+ m_skip = (m_h == (opcode & 0xff));
+ break;
+
+ case 0x0000: // AD (H),n
+ case 0x0100: // AD H,n
+ case 0x0200: // AND (H),n
+ case 0x0300: // AND H,n
+ case 0x0400: // SB (H),n
+ case 0x0500: // SB H,n
+ case 0x0600: // OR (H),n
+ case 0x0700: // OR H,n
+ case 0x0800: // ADS (H),n
+ case 0x0900: // ADS H,n
+ case 0x0a00: // ANDS (H),n
+ case 0x0b00: // ANDS H,n
+ case 0x0c00: // SBS (H),n
+ case 0x0e00: // XOR (H),n
+ case 0x0f00: // XOR H,n
+ case 0x1000: // TAD NC (H),n
+ case 0x1100: // TAD NC H,n
+ case 0x1300: // TAND NZ H,n
+ case 0x1400: // TSB NC (H),n
+ case 0x1500: // TSB NC H,n
+ case 0x1600: // TSB NZ (H),n
+ case 0x1700: // TSB NZ H,n
+ case 0x1800: // TAD C (H),n
+ case 0x1900: // TAD C H,n
+ case 0x1b00: // TAND Z H,n
+ case 0x1c00: // TSB C (H),n
+ case 0x1d00: // TSB C H,n
+ case 0x1e00: // TSB Z (H),n
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::opcdxxx(u16 opcode)
+{
+ switch (opcode & 0x1e0f)
+ {
+ case 0x0008: // AD Rr,A
+ m_ram[(opcode >> 4) & 0x1f] += m_a;
+ break;
+ case 0x1e00: // TSB Z A,Rr
+ m_skip = (m_a == m_ram[(opcode >> 4) & 0x1f]);
+ break;
+ case 0x0000: // AD A,Rr
+ m_a += m_ram[(opcode >> 4) & 0x1f];
+ break;
+
+ case 0x0001: // AD A,(H)
+ case 0x0009: // AD (H),A
+ case 0x0200: // AND A,Rr
+ case 0x0201: // AND A,(H)
+ case 0x0208: // AND Rr,A
+ case 0x0209: // AND (H),A
+ case 0x0400: // SB A,Rr
+ case 0x0401: // SB A,(H)
+ case 0x0408: // SB Rr,A
+ case 0x0409: // SB (H),A
+ case 0x0600: // OR A,Rr
+ case 0x0601: // OR A,(H)
+ case 0x0608: // OR Rr,A
+ case 0x0609: // OR (H),A
+ case 0x0800: // ADS A,Rr
+ case 0x0801: // ADS A,(H)
+ case 0x0808: // ADS Rr,A
+ case 0x0809: // ADS (H),A
+ case 0x0a00: // ANDS A,Rr
+ case 0x0a01: // ANDS A,(H)
+ case 0x0a08: // ANDS Rr,A
+ case 0x0a09: // ANDS (H),A
+ case 0x0c00: // SBS A,Rr
+ case 0x0c01: // SBS A,(H)
+ case 0x0c08: // SBS Rr,A
+ case 0x0c09: // SBS (H),A
+ case 0x0e00: // XOR A,Rr
+ case 0x0e01: // XOR A,(H)
+ case 0x0e08: // XOR Rr,A
+ case 0x0e09: // XOR (H),A
+ case 0x1000: // TAD NC A,Rr
+ case 0x1001: // TAD NC A,(H)
+ case 0x1008: // TAD NC Rr,A
+ case 0x1009: // TAD NC (H),A
+ case 0x1200: // TAND NZ A,Rr
+ case 0x1201: // TAND NZ A,(H)
+ case 0x1208: // TAND NZ Rr,A
+ case 0x1209: // TAND NZ (H),A
+ case 0x1400: // TSB NC A,Rr
+ case 0x1401: // TSB NC A,(H)
+ case 0x1408: // TSB NC Rr,A
+ case 0x1409: // TSB NC (H),A
+ case 0x1600: // TSB NZ A,Rr
+ case 0x1601: // TSB NZ A,(H)
+ case 0x1608: // TSB NZ Rr,A
+ case 0x1609: // TSB NZ (H),A
+ case 0x1800: // TAD C A,Rr
+ case 0x1801: // TAD C A,(H)
+ case 0x1808: // TAD C Rr,A
+ case 0x1809: // TAD C (H),A
+ case 0x1a00: // TAND Z A,Rr
+ case 0x1a01: // TAND Z A,(H)
+ case 0x1a08: // TAND Z Rr,A
+ case 0x1a09: // TAND Z (H),A
+ case 0x1c00: // TSB C A,Rr
+ case 0x1c01: // TSB C A,(H)
+ case 0x1c08: // TSB C Rr,A
+ case 0x1c09: // TSB C (H),A
+ case 0x1e01: // TSB Z A,(H)
+ case 0x1e08: // TSB Z Rr,A
+ case 0x1e09: // TSB Z (H),A
+ default:
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+}
+
+
+void upd177x_cpu_device::opefxxx(u16 opcode)
+{
+ switch (opcode & 0x1e00)
+ {
+ case 0x0000: // ADI Rr,n
+ m_ram[(opcode >> 4) & 0x1f] += (opcode & 0x0f);
+ break;
+ case 0x0200: // ADIS Rr,n
+ m_ram[(opcode >> 4) & 0x1f] += (opcode & 0x0f);
+ m_skip = (m_ram[(opcode >> 4) & 0x1f] < (opcode & 0x0f));
+ break;
+ case 0x0400: // SBI Rr,n
+ m_ram[(opcode >> 4) & 0x1f] -= (opcode & 0x0f);
+ break;
+ case 0x0600: // SBIS Rr,n
+ m_skip = (m_ram[(opcode >> 4) & 0x1f] < (opcode & 0x0f));
+ m_ram[(opcode >> 4) & 0x1f] -= (opcode & 0x0f);
+ break;
+ case 0x0800: // TADI NC Rr,n
+ m_skip = (m_ram[(opcode >> 4) & 0x1f] + (opcode & 0x0f) < 0x100);
+ break;
+ case 0x0c00: // TSBI NC Rr,n
+ m_skip = (m_ram[(opcode >> 4) & 0x1f] >= (opcode & 0x0f));
+ break;
+ case 0x0e00: // TSBI C Rr,n
+ m_skip = (m_ram[(opcode >> 4) & 0x1f] < (opcode & 0x0f));
+ break;
+ case 0x1200: // ADIMS Rr,n
+ {
+ const u8 reg = (opcode >> 4) & 0x1f;
+ if (BIT(m_md0, 0))
+ {
+ m_skip = ((m_ram[reg] & 0x3f) + (opcode & 0x0f)) > 0x3f;
+ m_ram[reg] = (m_ram[reg] & 0xc0) | ((m_ram[reg] + (opcode & 0x0f)) & 0x3f);
+ }
+ else
+ {
+ m_skip = ((m_ram[reg] & 0x1f) + (opcode & 0x0f)) > 0x1f;
+ m_ram[reg] = (m_ram[reg] & 0xe0) | ((m_ram[reg] + (opcode & 0x0f)) & 0x1f);
+ }
+ }
+ break;
+
+ case 0x0a00: // TADI C Rr,n
+ case 0x1000: // ADI5 Rr,n
+ case 0x1800: // TADI5 Rr,n
+ default:
+ if (opcode != 0xffff)
+ {
+ fatalerror("%s, %04x: Unsupported instruction %04x\n", tag(), m_pc - 1, opcode);
+ }
+ }
+}
+
+
+void upd177x_cpu_device::handle_timer()
+{
+ if (m_n >= 8)
+ {
+ if (m_timer == 0 || !--m_timer)
+ {
+ if (BIT(m_md0, MD0_TN_BIT) && !m_tn_int)
+ {
+ // Trigger TN IRQ
+ m_ram[STACK_START + (m_sp * 2) + 1] = m_pc >> 8;
+ m_ram[STACK_START + (m_sp * 2)] = m_pc & 0xff;
+ m_sp = (m_sp + 1) & 0x07;
+ m_skip_save = m_skip;
+ m_skip = false;
+ m_a_save = m_a;
+ if (m_n >= 0x40)
+ {
+ m_pc = VECTOR_TONE4;
+ }
+ else if (m_n >= 0x20)
+ {
+ m_pc = VECTOR_TONE3;
+ }
+ else if (m_n >= 0x10)
+ {
+ m_pc = VECTOR_TONE2;
+ }
+ else
+ {
+ m_pc = VECTOR_TONE1;
+ }
+ m_tn_int = true;
+ }
+ if (m_n >= 0x40)
+ {
+ m_timer = m_n;
+ }
+ else if (m_n >= 0x20)
+ {
+ m_timer = m_n * 2;
+ }
+ else if (m_n >= 0x10)
+ {
+ m_timer = m_n * 4;
+ }
+ else
+ {
+ m_timer = m_n * 8;
+ }
+ }
+ }
+}
+
+
+void upd177x_cpu_device::set_noise_counter_bit()
+{
+ if (BIT(m_md0, MD0_NSF2_BIT))
+ {
+ m_noise_counter_bit = (BIT(m_md1, MD1_NSF3_BIT)) ? 5 : 8;
+ }
+ else
+ {
+ m_noise_counter_bit = (BIT(m_md1, MD1_NSF3_BIT)) ? 6 : 9;
+ }
+}
+
+
+void upd177x_cpu_device::m_cycle()
+{
+ m_icount -= 8;
+ const u16 old_counter = m_counter;
+ m_counter++;
+ const u16 counter_diff = old_counter ^ m_counter;
+ if (BIT(counter_diff, 9))
+ {
+ if (BIT(m_md1, MD1_TIME_BIT))
+ {
+ fatalerror("%s: TM int not supported\n", tag());
+ }
+ }
+ if (BIT(counter_diff, m_noise_counter_bit))
+ {
+ m_pnc1 = ((m_pnc1 << 1) | ((BIT(m_pnc1, 6) ^ BIT(m_pnc1, 5)) ? 1 : 0)) & 0x7f;
+ if (BIT(m_md0, MD0_NSF1_BIT))
+ {
+ m_pnc2 = (m_pnc2 << 1) | (BIT(m_pnc2, 0) ? 0 : 1);
+ }
+ else
+ {
+ m_pnc2 = (m_pnc2 << 1) | ((BIT(m_pnc2, 2) ^ BIT(m_pnc2, 1)) ? 0 : 1);
+ }
+
+ if (BIT(m_md0, MD0_NS_BIT))
+ {
+ fatalerror("%s: NS int not supported\n", tag());
+ }
+ }
+}
+
+
+void upd177x_cpu_device::execute_run()
+{
+ do
+ {
+ handle_timer();
+ debugger_instruction_hook(m_pc);
+ if (!m_skip)
+ {
+ u16 opcode = m_program.read_word(m_pc++);
+ switch (opcode & 0xf000)
+ {
+ case 0x0000: op0xxx(opcode); break;
+ case 0x1000: op1xxx(opcode); break;
+ case 0x2000: op2xxx(opcode); break;
+ case 0x3000: op3xxx(opcode); break;
+ case 0x4000: m_ram[(opcode >> 8) & 0x1f] = opcode & 0xff; break; // MVI Rr,n
+ case 0x5000: m_ram[(opcode >> 8) & 0x1f] = opcode & 0xff; break; // MVI Rr,n
+ case 0x6000: m_pc = (m_pc & 0xf000) | (opcode & 0x0fff); break; // JMP n
+ case 0x7000: op7xxx(opcode); break;
+ case 0x8000: op89xxx(opcode); break;
+ case 0x9000: op89xxx(opcode); break;
+ case 0xa000: opabxxx(opcode); break;
+ case 0xb000: opabxxx(opcode); break;
+ case 0xc000: opcdxxx(opcode); break;
+ case 0xd000: opcdxxx(opcode); break;
+ case 0xe000: opefxxx(opcode); break;
+ case 0xf000: opefxxx(opcode); break;
+ }
+ }
+ else
+ {
+ m_pc++;
+ m_skip = false;
+ }
+ m_cycle();
+ } while (m_icount > 0);
+}
+
+
+void upd177x_cpu_device::sound_stream_update(sound_stream &stream)
+{
+ const int smpl = m_dac_sign ? -m_dac : m_dac;
+ for (int sampindex = 0; sampindex < stream.samples(); sampindex++)
+ {
+ stream.put_int(0, sampindex, smpl, 256);
+ }
+}
diff --git a/src/devices/cpu/upd177x/upd177x.h b/src/devices/cpu/upd177x/upd177x.h
new file mode 100644
index 00000000000..0dcb245a446
--- /dev/null
+++ b/src/devices/cpu/upd177x/upd177x.h
@@ -0,0 +1,124 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*****************************************************************************
+
+ uPD177x
+
+******************************************************************************
+
+
+ ___ ___
+ PB4 1 |* u | 28 PB3
+ PB5 2 | | 27 PB2
+ PB6 3 | | 26 PB1
+ PB7 4 | | 25 PA8
+ PB8 5 | u | 24 PA7
+ /AC 6 | P | 23 PA6
+ /PW ON 7 | D | 22 PA5
+ Vdd 8 | 1 | 21 PA4
+ X1 9 | 7 | 20 PA3
+ X0 10 | 7 | 19 PA2
+ SOUND2 11 | 1 | 18 PA1
+ Vda 12 | | 17 CH2
+ SOUND1 13 | | 16 /EXINT
+ GND 14 |_______| 15 CH1
+
+****************************************************************************/
+
+
+#ifndef MAME_CPU_UPD177X_UPD177X_H
+#define MAME_CPU_UPD177X_UPD177X_H
+
+class upd177x_cpu_device : public cpu_device
+ , public device_sound_interface
+{
+public:
+ upd177x_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // configuration helpers
+ auto pb_out_cb() { return m_pb_out_cb.bind(); }
+
+ u8 pa_r() { return m_pa; }
+ void pa_w(u8 data) { m_pa = data; }
+ void pb_w(u8 data) { m_pb = data; }
+
+protected:
+ upd177x_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
+ virtual u32 execute_max_cycles() const noexcept override { return 2; }
+ virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
+ virtual void execute_run() override;
+
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ virtual void sound_stream_update(sound_stream &stream) override;
+
+ void program_map(address_map &map) ATTR_COLD;
+
+private:
+ void op0xxx(u16 opcode);
+ void op1xxx(u16 opcode);
+ void op2xxx(u16 opcode);
+ void op3xxx(u16 opcode);
+ void op7xxx(u16 opcode);
+ void op89xxx(u16 opcode);
+ void opabxxx(u16 opcode);
+ void opcdxxx(u16 opcode);
+ void opefxxx(u16 opcode);
+ void handle_timer();
+ void set_noise_counter_bit();
+ void m_cycle();
+
+ address_space_config m_program_config;
+
+ memory_access<16, 1, -1, ENDIANNESS_LITTLE>::specific m_program;
+ devcb_write8 m_pb_out_cb;
+ sound_stream *m_channel;
+
+ int m_icount;
+
+ u16 m_pc; // 16 bits
+ u8 m_sp; // 3 bits
+ u8 m_a; // 8 bits
+ u8 m_a_save; // 8 bits
+ u8 m_h; // 6 bits
+ u8 m_n; // 8 bits
+ u8 m_timer;
+ u16 m_counter;
+ u8 m_x; // 7 bits
+ u8 m_y; // 5 bits
+ u8 m_pa;
+ u8 m_pb;
+ u8 m_ram[0x40];
+ u8 m_md0;
+ u8 m_md1;
+ u8 m_pnc1; // 7 bits
+ u8 m_pnc2; // 3 bits
+ bool m_skip;
+ bool m_skip_save;
+ bool m_ts;
+ bool m_ns;
+ bool m_ss;
+ u8 m_dac;
+ bool m_dac_sign;
+ bool m_tn_int;
+ u8 m_noise_counter_bit;
+};
+
+
+class upd1771c_cpu_device : public upd177x_cpu_device
+{
+public:
+ upd1771c_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+
+DECLARE_DEVICE_TYPE(UPD1771C, upd1771c_cpu_device)
+
+#endif // MAME_CPU_UPD177X_UPD177X_H
diff --git a/src/devices/cpu/upd177x/upd177xd.cpp b/src/devices/cpu/upd177x/upd177xd.cpp
index d3ec79e84c7..d4e9dcd15d7 100644
--- a/src/devices/cpu/upd177x/upd177xd.cpp
+++ b/src/devices/cpu/upd177x/upd177xd.cpp
@@ -16,9 +16,9 @@ std::string upd177x_disassembler::reg4(u16 opcode)
return util::string_format("r%02x", (opcode >> 4) & 0x1f);
}
-std::string upd177x_disassembler::reg9(u16 opcode)
+std::string upd177x_disassembler::reg8(u16 opcode)
{
- return util::string_format("r%02x", (opcode >> 9) & 0x1f);
+ return util::string_format("r%02x", (opcode >> 8) & 0x1f);
}
std::string upd177x_disassembler::imm8(u16 opcode)
@@ -72,12 +72,12 @@ std::string upd177x_disassembler::abs4_4(u16 opcode, u16 pc)
#define P std::ostream &stream, u16 opcode, u16 pc
const upd177x_disassembler::instruction upd177x_disassembler::instructions[] {
- { 0x4000, 0xe000, [](P) -> u32 { util::stream_format(stream, "mvi %s, %s", reg9(opcode), imm8(opcode)); return 1; } },
+ { 0x4000, 0xe000, [](P) -> u32 { util::stream_format(stream, "mvi %s, %s", reg8(opcode), imm8(opcode)); return 1; } },
{ 0x3200, 0xff00, [](P) -> u32 { util::stream_format(stream, "mvi (h), %s", imm8(opcode)); return 1; } },
{ 0x3400, 0xff00, [](P) -> u32 { util::stream_format(stream, "mvi a, %s", imm8(opcode)); return 1; } },
{ 0x3800, 0xffc0, [](P) -> u32 { util::stream_format(stream, "mvi h, %s", imm6(opcode)); return 1; } },
- { 0x3100, 0xff1f, [](P) -> u32 { util::stream_format(stream, "mvi mdi, %s", imm3_5(opcode)); return 1; } },
- { 0x2100, 0xff80, [](P) -> u32 { util::stream_format(stream, "mvi mdo, %s", imm7(opcode)); return 1; } },
+ { 0x3100, 0xff1f, [](P) -> u32 { util::stream_format(stream, "mvi md1, %s", imm3_5(opcode)); return 1; } },
+ { 0x2100, 0xff80, [](P) -> u32 { util::stream_format(stream, "mvi md0, %s", imm7(opcode)); return 1; } },
{ 0x1201, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "mov %s, a", reg4(opcode)); return 1; } },
{ 0x1005, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "mov a, %s", reg4(opcode)); return 1; } },
@@ -105,18 +105,18 @@ const upd177x_disassembler::instruction upd177x_disassembler::instructions[] {
{ 0x1801, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tblo a, (%s)", reg4(opcode)); return 1; } },
{ 0x1802, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tblo x, (%s)", reg4(opcode)); return 1; } },
{ 0x1804, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tblo y, (%s)", reg4(opcode)); return 1; } },
- { 0x1808, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "callo (%s)", reg4(opcode)); return 1; } },
+ { 0x1808, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "callo (%s)", reg4(opcode)); return 1 | STEP_OVER; } },
{ 0x6000, 0xf000, [](P) -> u32 { util::stream_format(stream, "jmp %s", abs12(opcode, pc)); return 1; } },
- { 0x2000, 0xff0f, [](P) -> u32 { util::stream_format(stream, "jmp %s", abs4_4(opcode, pc)); return 1; } },
+ { 0x2000, 0xff0f, [](P) -> u32 { util::stream_format(stream, "jpp %s", abs4_4(opcode, pc)); return 1; } },
{ 0x0501, 0xffff, [](P) -> u32 { util::stream_format(stream, "jmpa"); return 1; } },
{ 0x2400, 0xff00, [](P) -> u32 { util::stream_format(stream, "jmpfz %s", abs8(opcode, pc)); return 1; } },
- { 0x7000, 0xf000, [](P) -> u32 { util::stream_format(stream, "call %s", abs12(opcode, pc)); return 1; } },
+ { 0x7000, 0xf000, [](P) -> u32 { util::stream_format(stream, "call %s", abs12(opcode, pc)); return 1 | STEP_OVER; } },
- { 0x0800, 0xffff, [](P) -> u32 { util::stream_format(stream, "ret"); return 1; } },
- { 0x0801, 0xffff, [](P) -> u32 { util::stream_format(stream, "rets"); return 1; } },
- { 0x090f, 0xffff, [](P) -> u32 { util::stream_format(stream, "reti"); return 1; } },
+ { 0x0800, 0xffff, [](P) -> u32 { util::stream_format(stream, "ret"); return 1 | STEP_OUT; } },
+ { 0x0801, 0xffff, [](P) -> u32 { util::stream_format(stream, "rets"); return 1 | STEP_OUT; } },
+ { 0x090f, 0xffff, [](P) -> u32 { util::stream_format(stream, "reti"); return 1 | STEP_OUT; } },
{ 0x0005, 0xffff, [](P) -> u32 { util::stream_format(stream, "stf"); return 1; } },
{ 0x0602, 0xffff, [](P) -> u32 { util::stream_format(stream, "off"); return 1; } },
@@ -279,7 +279,7 @@ const upd177x_disassembler::instruction upd177x_disassembler::instructions[] {
{ 0x1a01, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tbli a, (%s)", reg4(opcode)); return 1; } },
{ 0x1a02, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tbli x, (%s)", reg4(opcode)); return 1; } },
{ 0x1a04, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "tbli y, (%s)", reg4(opcode)); return 1; } },
- { 0x1a08, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "calli (%s)", reg4(opcode)); return 1; } },
+ { 0x1a08, 0xfe0f, [](P) -> u32 { util::stream_format(stream, "calli (%s)", reg4(opcode)); return 1 | STEP_OVER; } },
{ 0x0101, 0xffff, [](P) -> u32 { util::stream_format(stream, "mon"); return 1; } },
diff --git a/src/devices/cpu/upd177x/upd177xd.h b/src/devices/cpu/upd177x/upd177xd.h
index 7cefe63aec0..75895fc25be 100644
--- a/src/devices/cpu/upd177x/upd177xd.h
+++ b/src/devices/cpu/upd177x/upd177xd.h
@@ -27,7 +27,7 @@ private:
static const instruction instructions[];
static std::string reg4(u16 opcode);
- static std::string reg9(u16 opcode);
+ static std::string reg8(u16 opcode);
static std::string imm8(u16 opcode);
static std::string imm7(u16 opcode);
static std::string imm6(u16 opcode);
diff --git a/src/devices/cpu/upd7725/upd7725.cpp b/src/devices/cpu/upd7725/upd7725.cpp
index 45f685c1370..a7d43f50e68 100644
--- a/src/devices/cpu/upd7725/upd7725.cpp
+++ b/src/devices/cpu/upd7725/upd7725.cpp
@@ -269,17 +269,6 @@ uint32_t necdsp_device::execute_max_cycles() const noexcept
//-------------------------------------------------
-// execute_input_lines - return the number of
-// input/interrupt lines
-//-------------------------------------------------
-
-uint32_t necdsp_device::execute_input_lines() const noexcept
-{
- return 3; // TODO: there should be 11: INT, SCK, /SIEN, /SOEN, SI, and /DACK, plus SO, /SORQ and DRQ; for now, just INT, P0, and P1 are enough.
-}
-
-
-//-------------------------------------------------
// execute_set_input -
//-------------------------------------------------
@@ -316,7 +305,7 @@ void necdsp_device::execute_run()
do
{
// call debugger hook if necessary
- if (device_t::machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if (debugger_enabled())
{
debugger_instruction_hook(regs.pc);
}
@@ -384,7 +373,7 @@ void necdsp_device::exec_op(uint32_t opcode) {
case 12: regs.idb = bitswap<16>(regs.si, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); break; //LSB = first bit in from serial, 'reversed' SI register order
case 13: regs.idb = regs.k; break;
case 14: regs.idb = regs.l; break;
- case 15: regs.idb = dataRAM[regs.dp]; break;
+ case 15: regs.idb = dataRAM[regs.dp & 0x07ff]; break;
}
if(alu) {
@@ -398,7 +387,7 @@ void necdsp_device::exec_op(uint32_t opcode) {
flag.ov1 = 0;
switch(pselect) {
- case 0: p = dataRAM[regs.dp]; break;
+ case 0: p = dataRAM[regs.dp & 0x07ff]; break;
case 1: p = regs.idb; break;
case 2: p = regs.m; break;
case 3: p = regs.n; break;
@@ -573,45 +562,51 @@ void necdsp_device::exec_ld(uint32_t opcode) {
case 9: regs.so = id; break; //MSB first output, output tapped at bit 15 shifting left
case 10: regs.k = id; break;
case 11: regs.k = id; regs.l = m_data.read_word(regs.rp); break;
- case 12: regs.l = id; regs.k = dataRAM[regs.dp | 0x40]; break;
+ case 12: regs.l = id; regs.k = dataRAM[(regs.dp & 0x7ff) | 0x40]; break;
case 13: regs.l = id; break;
case 14: regs.trb = id; break;
- case 15: dataRAM[regs.dp] = id; break;
+ case 15: dataRAM[regs.dp & 0x7ff] = id; break;
}
}
-uint8_t necdsp_device::snesdsp_read(bool mode) {
- if (!mode)
- {
- return regs.sr >> 8;
- }
+uint8_t necdsp_device::status_r()
+{
+ return regs.sr >> 8;
+}
+
+uint8_t necdsp_device::data_r()
+{
if (regs.sr.drc == 0)
{
//16-bit
if(regs.sr.drs == 0)
{
- regs.sr.drs = 1;
+ if (!machine().side_effects_disabled())
+ regs.sr.drs = 1;
return regs.dr >> 0;
}
else
{
- regs.sr.rqm = 0;
- regs.sr.drs = 0;
+ if (!machine().side_effects_disabled())
+ {
+ regs.sr.rqm = 0;
+ regs.sr.drs = 0;
+ }
return regs.dr >> 8;
}
}
else
{
//8-bit
- regs.sr.rqm = 0;
+ if (!machine().side_effects_disabled())
+ regs.sr.rqm = 0;
return regs.dr >> 0;
}
}
-void necdsp_device::snesdsp_write(bool mode, uint8_t data) {
- if (!mode) return;
-
+void necdsp_device::data_w(uint8_t data)
+{
if (regs.sr.drc == 0)
{
//16-bit
diff --git a/src/devices/cpu/upd7725/upd7725.h b/src/devices/cpu/upd7725/upd7725.h
index ed17af002eb..d77e3620dcf 100644
--- a/src/devices/cpu/upd7725/upd7725.h
+++ b/src/devices/cpu/upd7725/upd7725.h
@@ -36,25 +36,25 @@ public:
auto p0() { return m_out_p0_cb.bind(); }
auto p1() { return m_out_p1_cb.bind(); }
- uint8_t snesdsp_read(bool mode);
- void snesdsp_write(bool mode, uint8_t data);
+ uint8_t status_r();
+ uint8_t data_r();
+ void data_w(uint8_t data);
protected:
// construction/destruction
necdsp_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t abits, uint32_t dbits);
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
- // device_execute_interface overrides
+ // device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
- // device_memory_interface overrides
+ // device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
// device_state_interface overrides
@@ -62,7 +62,7 @@ protected:
virtual void state_export(const device_state_entry &entry) override;
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
- // device_disasm_interface overrides
+ // device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
// inline data
@@ -75,12 +75,12 @@ private:
{
bool s1, s0, c, z, ov1, ov0;
- inline operator unsigned() const
+ operator unsigned() const
{
- return (s1 << 5) + (s0 << 4) + (c << 3) + (z << 2) + (ov1 << 1) + (ov0 << 0);
+ return (s1 << 5) | (s0 << 4) | (c << 3) | (z << 2) | (ov1 << 1) | (ov0 << 0);
}
- inline unsigned operator=(unsigned d)
+ unsigned operator=(unsigned d)
{
s1 = d & 0x20; s0 = d & 0x10; c = d & 0x08; z = d & 0x04; ov1 = d & 0x02; ov0 = d & 0x01;
return d;
@@ -91,14 +91,14 @@ private:
{
bool rqm, usf1, usf0, drs, dma, drc, soc, sic, ei, p1, p0;
- inline operator unsigned() const
+ operator unsigned() const
{
- return (rqm << 15) + (usf1 << 14) + (usf0 << 13) + (drs << 12)
- + (dma << 11) + (drc << 10) + (soc << 9) + (sic << 8)
- + (ei << 7) + (p1 << 1) + (p0 << 0);
+ return (rqm << 15) | (usf1 << 14) | (usf0 << 13) | (drs << 12)
+ | (dma << 11) | (drc << 10) | (soc << 9) | (sic << 8)
+ | (ei << 7) | (p1 << 1) | (p0 << 0);
}
- inline unsigned operator=(unsigned d)
+ unsigned operator=(unsigned d)
{
rqm = d & 0x8000; usf1 = d & 0x4000; usf0 = d & 0x2000; drs = d & 0x1000;
dma = d & 0x0800; drc = d & 0x0400; soc = d & 0x0200; sic = d & 0x0100;
@@ -175,8 +175,11 @@ public:
// construction/destruction
upd96050_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- uint16_t dataram_r(uint16_t addr) { return dataRAM[addr]; }
- void dataram_w(uint16_t addr, uint16_t data) { dataRAM[addr] = data; }
+ uint16_t dataram_r(uint16_t addr) { return dataRAM[addr & 0x07ff]; }
+ void dataram_w(uint16_t addr, uint16_t data, uint16_t mem_mask = uint16_t(~0))
+ {
+ COMBINE_DATA(&dataRAM[addr & 0x07ff]);
+ }
};
// device type definition
diff --git a/src/devices/cpu/upd777/upd777.cpp b/src/devices/cpu/upd777/upd777.cpp
new file mode 100644
index 00000000000..d915c031b87
--- /dev/null
+++ b/src/devices/cpu/upd777/upd777.cpp
@@ -0,0 +1,1262 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+
+#include "emu.h"
+#include "upd777.h"
+
+#include "upd777dasm.h"
+
+
+#define LOG_UNHANDLED_OPS (1U << 1)
+
+#define VERBOSE (LOG_UNHANDLED_OPS)
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(UPD777, upd777_cpu_device, "upd777", "uPD777")
+
+upd777_cpu_device::upd777_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor data)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_datamem(*this, "datamem")
+ , m_space_config("program", ENDIANNESS_BIG, 16, 11, -1, address_map_constructor(FUNC(upd777_cpu_device::internal_map), this))
+ , m_data_config("data", ENDIANNESS_BIG, 8, 7, 0, data)
+ , m_gfxdecode(*this, "gfxdecode")
+ , m_palette(*this, "palette")
+ , m_screen(*this, "screen")
+ , m_prgregion(*this, "prg")
+ , m_patregion(*this, "patterns")
+ , m_port_in(*this, 0xff)
+{
+}
+
+upd777_cpu_device::upd777_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : upd777_cpu_device(mconfig, UPD777, tag, owner, clock, address_map_constructor(FUNC(upd777_cpu_device::internal_data_map), this))
+{
+}
+
+std::unique_ptr<util::disasm_interface> upd777_cpu_device::create_disassembler()
+{
+ return std::make_unique<upd777_disassembler>();
+}
+
+device_memory_interface::space_config_vector upd777_cpu_device::memory_space_config() const
+{
+ return space_config_vector{
+ std::make_pair(AS_PROGRAM, &m_space_config),
+ std::make_pair(AS_DATA, &m_data_config)
+ };
+}
+
+void upd777_cpu_device::internal_map(address_map &map)
+{
+ map(0x000, 0x7ff).rom().region("prg", 0);
+}
+
+void upd777_cpu_device::internal_data_map(address_map &map)
+{
+ // 0x20 groups of 4 7-bit values
+ // groups 0x00-0x18 are used for sprite/pattern entries with the format
+
+ // 6543210
+ // 00 yyyyyyp (y = ypos, p = PRIO)
+ // 01 xxxxxxx (x = xpos)
+ // 02 ttttttt (t = pattern)
+ // 03 YYYRGBS (Y = , RGB = color, S=ySUB)
+
+ map(0x00, 0x7f).ram().share("datamem");
+}
+
+void upd777_cpu_device::increment_pc()
+{
+ u16 lowpc = m_pc & 0x07f;
+ u16 highpc = m_pc & 0x780;
+
+ const u16 xnor = BIT(lowpc, 6) ^ BIT(lowpc, 5) ^ 1;
+ lowpc = ((lowpc << 1) | xnor) & 0x7f;
+
+ // is returning to the start of the page the correct behavior?
+ if (lowpc == 0x00)
+ {
+ logerror("overflowing PC, returning to start of current page %03x\n", highpc);
+ // pakpak runs better if you do this, but that is clearly by chance as
+ // most other cases show this isn't meant to happen
+ //highpc += 0x80;
+ //highpc &= 0x7ff;
+ }
+
+ m_pc = highpc | lowpc;
+}
+
+void upd777_cpu_device::device_start()
+{
+ space(AS_PROGRAM).specific(m_space);
+ space(AS_DATA).specific(m_data);
+
+ set_icountptr(m_icount);
+
+ state_add(UPD777_PC, "PC", m_pc);
+ state_add(STATE_GENPC, "GENPC", m_pc).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_pc).noshow();
+
+ state_add(UPD777_A1, "A1", m_a[0]);
+ state_add(UPD777_A2, "A2", m_a[1]);
+ state_add(UPD777_A3, "A3", m_a[2]);
+ state_add(UPD777_A4, "A4", m_a[3]);
+
+ state_add(UPD777_L, "L", m_l);
+ state_add(UPD777_H, "H", m_h);
+
+ state_add(UPD777_ADDR_STACK0, "ADDR_STACK0", m_stack[0]);
+ state_add(UPD777_ADDR_STACK1, "ADDR_STACK1", m_stack[1]);
+ state_add(UPD777_ADDR_STACK2, "ADDR_STACK2", m_stack[2]);
+ state_add(UPD777_ADDR_STACK_POS, "ADDR_STACK_POS", m_stackpos);
+
+ //state_add(UPD777_SKIP, "SKIP", m_skip); // will always be showing 0 as debugger doesn't hook on skipped opcodes
+
+ save_item(NAME(m_ppc));
+ save_item(NAME(m_pc));
+ save_item(NAME(m_skip));
+ save_item(NAME(m_a));
+ save_item(NAME(m_l));
+ save_item(NAME(m_ldash));
+ save_item(NAME(m_x4));
+ save_item(NAME(m_h));
+
+ save_item(NAME(m_frs));
+ save_item(NAME(m_fls));
+
+ save_item(NAME(m_mode));
+ save_item(NAME(m_stb));
+
+ save_item(NAME(m_stack));
+ save_item(NAME(m_stackpos));
+
+ save_item(NAME(m_disp));
+ save_item(NAME(m_gpe));
+ save_item(NAME(m_kie));
+ save_item(NAME(m_sme));
+}
+
+void upd777_cpu_device::device_reset()
+{
+ m_ppc = 0;
+ m_pc = 0;
+
+ m_a[0] = m_a[1] = m_a[2] = m_a[3] = 0;
+ m_l = 0;
+ m_ldash = 0;
+ m_x4 = 0;
+ m_h = 0;
+
+ m_frs = 0;
+ m_fls = 0;
+
+ m_skip = 1; // the first opcode is always 'NOP' so maybe skip is 1 on startup?
+
+ m_stack[0] = m_stack[1] = m_stack[2] = 0;
+ m_stackpos = 0;
+
+ m_disp = 0;
+ m_gpe = 0;
+ m_kie = 0;
+ m_sme = 0;
+}
+
+inline u16 upd777_cpu_device::fetch()
+{
+ u16 opcode = m_space.read_word(m_pc);
+ m_ppc = m_pc;
+ increment_pc();
+ return opcode;
+}
+
+
+inline void upd777_cpu_device::set_a11(int a11)
+{
+ m_pc = (m_pc & 0x3ff) | (a11 & 1) << 10;
+}
+
+inline void upd777_cpu_device::set_new_pc(int newpc)
+{
+ m_pc = newpc;
+}
+
+// L reg (lower memory pointer) is 2 bit
+inline void upd777_cpu_device::set_l(int l)
+{
+ m_l = l & 0x3;
+}
+
+inline u8 upd777_cpu_device::get_l() const
+{
+ return m_l & 0x3;
+}
+
+// H reg (upper memory pointer) is 5-bit
+inline void upd777_cpu_device::set_h(int h)
+{
+ m_h = h & 0x1f;
+}
+
+// H reg is used as upper bits of memory address
+inline u8 upd777_cpu_device::get_h_shifted() const
+{
+ return (m_h & 0x1f) << 2;
+}
+
+inline u8 upd777_cpu_device::get_h() const
+{
+ return m_h & 0x1f;
+}
+
+// M is the content of memory address pointed to by H and L
+inline u8 upd777_cpu_device::get_m_data()
+{
+ u8 addr = get_h_shifted() | get_l();
+ return read_data_mem(addr & 0x7f) & 0x7f;
+}
+
+inline void upd777_cpu_device::set_m_data(u8 data)
+{
+ u8 addr = get_h_shifted() | get_l();
+ write_data_mem(addr & 0x7f, data & 0x7f);
+}
+
+// 'A' regs are 7-bit
+inline void upd777_cpu_device::set_a1(u8 data) { m_a[0] = data & 0x7f; }
+inline void upd777_cpu_device::set_a2(u8 data) { m_a[1] = data & 0x7f; }
+inline void upd777_cpu_device::set_a3(u8 data) { m_a[2] = data & 0x7f; }
+inline void upd777_cpu_device::set_a4(u8 data) { m_a[3] = data & 0x7f; }
+
+inline void upd777_cpu_device::set_a1_or_a2(int reg, u8 value)
+{
+ if (reg == 0)
+ set_a1(value);
+ else
+ set_a2(value);
+}
+
+// 'A' regs are 7-bit
+inline u8 upd777_cpu_device::get_a1() const { return m_a[0] & 0x7f; }
+inline u8 upd777_cpu_device::get_a2() const { return m_a[1] & 0x7f; }
+inline u8 upd777_cpu_device::get_a3() const { return m_a[2] & 0x7f; }
+inline u8 upd777_cpu_device::get_a4() const { return m_a[3] & 0x7f; }
+
+inline u8 upd777_cpu_device::get_a1_or_a2(int reg) const
+{
+ if (reg == 0)
+ return get_a1();
+ else
+ return get_a2();
+}
+
+// FRS/FLS are the 2 7-bit sound registers
+inline void upd777_cpu_device::set_frs(u8 frs) { m_frs = frs & 0x7f; }
+inline void upd777_cpu_device::set_fls(u8 fls) { m_fls = fls & 0x7f; }
+
+// MODE is a 7-bit register with the following format
+// 6543210
+// rbhpRGB (r = reverberate sound effect, b = brightness, h = hue, p = black/prio, RGB = color)
+inline void upd777_cpu_device::set_mode(u8 mode) { m_mode = mode & 0x7f; }
+
+// single bit enable registers, although they have an important effect on the K->M opcode
+inline void upd777_cpu_device::set_disp(u8 data) { m_disp = data & 1; }
+inline void upd777_cpu_device::set_gpe(u8 data) { m_gpe = data & 1; }
+inline void upd777_cpu_device::set_kie(u8 data) { m_kie = data & 1; }
+inline void upd777_cpu_device::set_sme(u8 data) { m_sme = data & 1; }
+
+inline u8 upd777_cpu_device::get_kie() const { return m_kie & 1; }
+inline u8 upd777_cpu_device::get_sme() const { return m_sme & 1; }
+
+
+inline u8 upd777_cpu_device::read_data_mem(u8 addr)
+{
+ // data memory is 7-bit
+ return m_data.read_byte(addr) & 0x7f;
+}
+
+inline void upd777_cpu_device::write_data_mem(u8 addr, u8 data)
+{
+ // data memory is 7-bit
+ m_data.write_byte(addr, data & 0x7f);
+}
+
+inline void upd777_cpu_device::push_to_stack(u16 addr)
+{
+ if (m_stackpos < 3)
+ {
+ m_stack[m_stackpos] = addr;
+ m_stackpos++;
+ }
+ else
+ {
+ logerror("attempting to push to full address stack\n");
+ }
+}
+
+inline u16 upd777_cpu_device::pull_from_stack()
+{
+ if (m_stackpos > 0)
+ {
+ m_stackpos--;
+ return m_stack[m_stackpos];
+ }
+ else
+ {
+ logerror("attempting to pull from empty address stack\n");
+ return 0;
+ }
+}
+
+void upd777_cpu_device::do_op()
+{
+ const u16 inst = fetch();
+
+ if (inst >= 0b0000'1000'0000 && inst <= 0b0000'1111'1111)
+ {
+ // 080 - 0ff Skip if (M[H[5:1],L[2:1]][7:1]-K[7:1]) makes borrow
+ const int k = inst & 0x7f;
+ u8 m = get_m_data();
+ m = m - k;
+ if (m & 0x80)
+ m_skip = 1;
+ }
+ else if (inst >= 0b0001'0000'0000 && inst <= 0b0001'0111'1111)
+ {
+ // 100-17f M[H[5:1],L[2:1]][7:1]+K[7:1]->M[H[5:1],L[2:1]][7:1], Skip if carry, N->L[2:1]
+ const int k = inst & 0x1f;
+ const int n = (inst >> 5) & 0x3;
+ u8 m = get_m_data();
+ m = m + k;
+ set_m_data(m & 0x7f);
+
+ if (m & 0x80)
+ m_skip = 1;
+
+ // TODO: prevents infinitely scrolling screen, and allows pakpak to boot, but this does't make logical
+ // sense, unless the 'Skip if carry' in the text above is specifically meaning this only applies
+ // when skipping, however if you apply the same to the next opcode it breaks text rendering
+ // eg 'score' text in the same game.
+ if (m_skip)
+ set_l(n);
+ }
+ else if (inst >= 0b0001'1000'0000 && inst <= 0b0001'1111'1111)
+ {
+ // 180-1ff M[H[5:1],L[2:1]][7:1]-K[7:1]->M[H[5:1],L[2:1]][7:1], Skip if borrow, N->L[2:1]
+ const int k = inst & 0x1f;
+ const int n = (inst >> 5) & 0x3;
+ u8 m = get_m_data();
+ m = m - k;
+ set_m_data(m & 0x7f);
+
+ if (m & 0x80)
+ m_skip = 1;
+
+ set_l(n);
+ }
+ else if (inst >= 0b0100'1000'0000 && inst <= 0b0100'1011'1111)
+ {
+ // 480-4bf H[5:1]-K[5:1]->H[5:1], Skip if borrow
+ const int k = inst & 0x1f;
+ u8 h = get_h();
+ h = h - k;
+ if (h & 0x20)
+ m_skip = 1;
+ set_h(h & 0x1f);
+ }
+ else if (inst >= 0b0100'1100'0000 && inst <= 0b0100'1111'1111)
+ {
+ // 4c0 - 4ff H[5:1]+K[5:1]->H[5:1], Skip if carry
+ const int k = inst & 0x1f;
+ u8 h = get_h();
+ h = h + k;
+ if (h & 0x20)
+ m_skip = 1;
+ set_h(h & 0x1f);
+ }
+ else if (inst >= 0b0101'0000'0000 && inst <= 0b0101'0111'1111)
+ {
+ // 500 - 57f
+ // When (KIE=0)&(SME=0), Store K[7:1] to M[H[5:1],L[2:1]][7:1]
+ // When (KIE=1), Store KIN[7:1] to M[H[5:1],L[2:1]][7:1]
+ // When (SME=1), Store HCL[7:1] to M[H[5:1],L[2:1]][7:1]
+ const int k = inst & 0x7f;
+
+ if (get_kie()) // documentation does not state if KIE or SME has priority
+ {
+ LOGMASKED(LOG_UNHANDLED_OPS, "KIE->M\n", k);
+ // Inputs for Cassette Vision appear to be read by this
+ // (selected based on the STB output value?)
+ set_m_data(m_port_in(m_stb));
+ }
+ else if (get_sme())
+ {
+ LOGMASKED(LOG_UNHANDLED_OPS, "SME->M\n", k);
+ set_m_data(0);
+ }
+ else
+ {
+ set_m_data(k & 0x7f);
+ }
+ }
+ else if (inst >= 0b0101'1000'0000 && inst <= 0b0101'1111'1111)
+ {
+ // 580 - 5ff Store K[7:6] to L[2:1] and K[5:1] to H[5:1]
+ const int k = inst & 0x7f;
+ set_l(k >> 5);
+ set_h(k & 0x1f);
+ }
+ else if (inst >= 0b0110'0000'0000 && inst <= 0b0111'1111'1111)
+ {
+ // 600-67f Store K[7:1] to A1[7:1]
+ // 680-6ff Store K[7:1] to A2[7:1]
+ // 700-77f Store K[7:1] to A3[7:1]
+ // 780-7ff Store K[7:1] to A4[7:1]
+ const int reg = (inst & 0x180) >> 7;
+ const int k = inst & 0x7f;
+ switch (reg)
+ {
+ case 0: set_a1(k); break;
+ case 1: set_a2(k); break;
+ case 2: set_a3(k); break;
+ case 3: set_a4(k); break;
+ }
+ }
+ else if (inst >= 0b1000'0000'0000 && inst <= 0b1011'1111'1111)
+ {
+ // 800 - bff Move K[10:1] to A[10:1], Jump to A[11:1]
+ u16 fulladdress = (m_ppc & 0x400) | (inst & 0x3ff);
+ set_new_pc(fulladdress);
+ }
+ else if (inst >= 0b1100'0000'0000 && inst <= 0b1111'1111'1111)
+ {
+ // c00 - fff Move K[10:1] to A[10:1], 0 to A11, Jump to A[11:1], Push next A[11:1] up to ROM address stack
+ const int k = inst & 0x3ff;
+ push_to_stack(m_pc);
+ set_new_pc(k);
+ }
+ else if (((inst & 0b1111'0000'0000) == 0b0010'0000'0000) && ((inst & 0b0000'0000'1100) != 0b0000'0000'0100))
+ {
+ // 0b0010'rrnR'oonn where rr = reg1 (A1, A2, M or H), n = invert condition, R = reg2 (A1 or A2) and oo = optype (only 0,2,3 are valid, no cases here for 1) nn = next l value
+
+ // optype · (AND)
+ // 200 Skip if (A1[7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 220 Skip if (A1[7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 210 Skip if (A1[7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 230 Skip if (A1[7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 240 Skip if (A2[7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 260 Skip if (A2[7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 250 Skip if (A2[7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 270 Skip if (A2[7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 280 Skip if (M[H[5:1],L[2:1]][7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 2a0 Skip if (M[H[5:1],L[2:1]][7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 290 Skip if (M[H[5:1],L[2:1]][7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 2b0 Skip if (M[H[5:1],L[2:1]][7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 2c0 Skip if (H[5:1]·A1[5:1]) makes zero, N->L[2:1]
+ // 2e0 Skip if (H[5:1]·A1[5:1]) makes non zero, N->L[2:1]
+ // 2d0 Skip if (H[5:1]·A2[5:1]) makes zero, N->L[2:1]
+ // 2f0 Skip if (H[5:1]·A2[5:1]) makes non zero, N->L[2:1]
+
+ // optype = (these are expressed as x=y in the opcopde syntax, but x-y in the description, in reality it seems to act as 'CMP' so x-y = 0)
+ // 208 Skip if (A1[7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 228 Skip if (A1[7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 218 Skip if (A1[7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 238 Skip if (A1[7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 248 Skip if (A2[7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 268 Skip if (A2[7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 258 Skip if (A2[7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 278 Skip if (A2[7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 288 Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 2a8 Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 298 Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 2b8 Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 2c8 Skip if (H[5:1]-A1[5:1]) makes zero, N->L[2:1]
+ // 2e8 Skip if (H[5:1]-A1[5:1]) makes non zero, N->L[2:1]
+ // 2d8 Skip if (H[5:1]-A2[5:1]) makes zero, N->L[2:1]
+ // 2f8 Skip if (H[5:1]-A2[5:1]) makes non zero, N->L[2:1]
+
+ // optype -
+ // 20c Skip if (A1[7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 22c Skip if (A1[7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 21c Skip if (A1[7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 23c Skip if (A1[7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 24c Skip if (A2[7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 26c Skip if (A2[7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 25c Skip if (A2[7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 27c Skip if (A2[7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 28c Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 2ac Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 29c Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 2bc Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 2cc Skip if (H[5:1]-A1[5:1]) makes borrow, N->L[2:1]
+ // 2ec Skip if (H[5:1]-A1[5:1]) makes non borrow, N->L[2:1]
+ // 2dc Skip if (H[5:1]-A2[5:1]) makes borrow, N->L[2:1]
+ // 2fc Skip if (H[5:1]-A2[5:1]) makes non borrow, N->L[2:1]
+ const int non = inst & 0x20;
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg1 = (inst & 0xc0) >> 6;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 srcreg2 = get_a1_or_a2(reg2);
+ u8 srcreg1 = 0;
+ switch (reg1)
+ {
+ case 0: srcreg1 = get_a1(); break;
+ case 1: srcreg1 = get_a2(); break;
+ case 2: srcreg1 = get_m_data(); break;
+ case 3:
+ {
+ srcreg1 = get_h();
+ srcreg2 &= 0x1f;
+ break;
+ }
+ }
+
+ switch (optype)
+ {
+ case 0: // AND
+ {
+ if (!non)
+ {
+ if ((srcreg1 & srcreg2) == 0) // skip if (x·y) makes zero, N->L[2:1]
+ m_skip = 1;
+ }
+ else
+ {
+ if ((srcreg1 & srcreg2) != 0) // skip if (x·y) makes non zero, N->L[2:1]
+ m_skip = 1;
+ }
+ break;
+ }
+ case 1: // invalid
+ {
+ // can't happen, no switch case leads here
+ break;
+ }
+ case 2: // =
+ {
+ if (!non)
+ {
+ if (srcreg1 == srcreg2) // skip if (x-y) makes zero, N->L[2:1]
+ m_skip = 1;
+ }
+ else
+ {
+ if (srcreg1 != srcreg2) // skip if (x-y) makes non zero, N->L[2:1]
+ m_skip = 1;
+ }
+ break;
+ }
+ case 3: // -
+ {
+ u8 result = srcreg1 - srcreg2;
+
+ if (!non)
+ {
+ if (result & 0x80) // skip if (x-y) makes borrow, N->L[2:1]
+ m_skip = 1;
+ }
+ else
+ {
+ if ((result & 0x80) == 0) // skip if (x-y) makes non borrow, N->L[2:1]
+ m_skip = 1;
+ }
+
+ break;
+ }
+ }
+
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1010'0000) == 0b0011'0010'0000)
+ {
+ // 0b0011'0r1R'oonn (where r = reg1, R = reg2, o = optype, and n = next l value)
+ // 320 AND A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 324 Add A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 328 OR A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 32c Subtract A1[7:1] and A1[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ // 330 AND A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 334 Add A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 338 OR A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 33c Subtract A1[7:1] and A2[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ // 360 AND A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 364 Add A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 368 OR A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 36c Subtract A2[7:1] and A1[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ // 370 AND A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 374 Add A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 378 OR A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 37c Subtract A2[7:1] and A2[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int reg1 = (inst & 0x40) >> 6;
+ const int n = inst & 0x3;
+
+ u8 src1 = get_a1_or_a2(reg1);
+ u8 src2 = get_a1_or_a2(reg2);
+
+ switch (optype)
+ {
+ case 0: // AND
+ {
+ src1 = src1 & src2;
+ break;
+ }
+ case 1: // ADD
+ {
+ src1 = src1 + src2;
+ // not in this case?
+ //if (src1 & 0x80)
+ // m_skip = 1;
+ break;
+ }
+ case 2: // OR
+ {
+ src1 = src1 | src2;
+ break;
+ }
+ case 3: // MINUS
+ {
+ src1 = src1 - src2;
+ if (src1 & 0x80)
+ m_skip = 1;
+ break;
+ }
+ }
+ set_a1_or_a2(reg1, src1);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'0000) == 0b0011'1010'0000)
+ {
+ // 0b0011'101r'oonn (where r = reg, o = optype, n = next l value)
+ // 3a0 AND M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3a4 Add M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if carry
+ // 3a8 OR M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3ac Subtract M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if borrow
+ // 3b0 AND M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3b4 Add M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if carry
+ // 3b8 OR M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3bc Subtract M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if borrow
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 src2 = get_a1_or_a2(reg2);
+ u8 m = get_m_data();
+
+ switch (optype)
+ {
+ case 0: // AND
+ {
+ m = m & src2;
+ break;
+ }
+ case 1: // ADD
+ {
+ m = m + src2;
+ if (m & 0x80)
+ m_skip = 1;
+ break;
+ }
+ case 2: // OR
+ {
+ m = m | src2;
+ break;
+ }
+ case 3: // MINUS
+ {
+ m = m - src2;
+ if (m & 0x80)
+ m_skip = 1;
+ break;
+ }
+ }
+ set_m_data(m);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'0000) == 0b0011'1110'0000)
+ {
+ // 0b0011'111r'oonn (where r = reg, o = optype, n = next l value)
+ // 3e0 AND H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3e4 Add H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3e8 OR H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3ec Subtract H[5:1] and A1[5:1], store to H[5:1], Skip if borrow, N->L[2:1]
+ // 3f0 AND H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3f4 Add H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3f8 OR H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3fc Subtract H[5:1] and A2[5:1], store to H[5:1], Skip if borrow, N->L[2:1]
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 src2 = get_a1_or_a2(reg2) & 0x1f;
+ u8 h = get_h();
+
+ switch (optype)
+ {
+ case 0: // AND
+ {
+ h = h & src2;
+ break;
+ }
+ case 1: // ADD
+ {
+ h = h + src2;
+ break;
+ }
+ case 2: // OR
+ {
+ h = h | src2;
+ break;
+ }
+ case 3: // MINUS
+ {
+ h = h - src2;
+ if (h & 0x20)
+ m_skip = 1;
+ break;
+ }
+ }
+ set_h(h & 0x1f);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1100'0010) == 0b0100'0100'0000)
+ {
+ // 0b0100'01dg'ks0n (where d = DISP, G = GPE, K = KIE, S = SME, n = A11)
+ // 440 Set D to DISP, G to GPE, K to KIE, S to SME, N->A[11]
+ const int d = (inst >> 5) & 0x1;
+ const int g = (inst >> 4) & 0x1;
+ const int k = (inst >> 3) & 0x1;
+ const int s = (inst >> 2) & 0x1;
+ const int n = inst & 0x1;
+ set_disp(d);
+ set_gpe(g);
+ set_kie(k);
+ set_sme(s);
+ set_a11(n);
+ }
+ else if (inst == 0b0000'0000'0000)
+ {
+ // 000 No Operation
+ // nothing
+ }
+ else if (inst == 0b0000'0000'0100)
+ {
+ // 004 Skip if (Gun Port Latch) = 1
+ LOGMASKED(LOG_UNHANDLED_OPS, "GPL\n");
+ }
+ else if (inst == 0b0000'0000'1000)
+ {
+ // 008 Move H[5:1] to Line Buffer Register[5:1]
+ u8 h = get_h();
+ //LOGMASKED(LOG_UNHANDLED_OPS, "H(%02x)->NRM\n", h);
+
+ // this seems to push a value from RAM into the line buffer for the current 4(?) scanlines
+ u8 m1 = read_data_mem(get_h_shifted() | 0);
+ u8 m2 = read_data_mem(get_h_shifted() | 1);
+ u8 m3 = read_data_mem(get_h_shifted() | 2);
+ u8 m4 = read_data_mem(get_h_shifted() | 3);
+ push_to_line_buffer(h, m1,m2,m3,m4);
+ }
+ else if (inst == 0b0000'0001'1000)
+ {
+ // 018 H[5:1]<->X4[5:1], 0->X4[7:6], 0->X3[7:1], 0->X1'[1], 0->A1'[1], L[2:1]<->L'[2:1]
+ LOGMASKED(LOG_UNHANDLED_OPS, "H<->X\n");
+#if 1
+ // this opcode is not well explained! but X4 etc. are referenced on Data RAM & Register Files which makes
+ // it even more confusing (while L' isn't referenced anywhere else at all!)
+ u8 temp;
+
+ temp = m_x4;
+ m_x4 = get_h();
+ m_h = temp;
+
+ temp = m_ldash;
+ m_ldash = get_l();
+ set_l(temp);
+#endif
+ }
+ else if (inst == 0b0000'0010'0000)
+ {
+ // 020 Subroutine End, Pop down address stack
+ u16 addr = pull_from_stack();
+ set_new_pc(addr);
+ }
+ else if (inst == 0b0000'0100'1001)
+ {
+ // 049 Skip if (4H Horizontal Blank) = 1
+ //LOGMASKED(LOG_UNHANDLED_OPS, "4H BLK\n");
+ if (get_hbl_4_state())
+ m_skip = 1;
+ }
+ else if (inst == 0b0000'0100'1010)
+ {
+ // 04a Skip if (Vertical Blank) = 1, 0->M[[18:00],[3]][1]
+ LOGMASKED(LOG_UNHANDLED_OPS, "VBLK\n");
+ if (get_vbl_state())
+ m_skip = 1;
+
+ // TODO:
+ // need to do the 0->M[[18:00],[3]][1] bit
+ }
+ else if (inst == 0b0000'0100'1100)
+ {
+ // 04c Skip if (GP&SW/ input) = 1
+ LOGMASKED(LOG_UNHANDLED_OPS, "GPSW/\n");
+ }
+ else if (inst == 0b0000'0101'0100)
+ {
+ // 054 Move (A4[7:1],A3[7:1],A2[7:1],A1[7:1]) to M[H[5:1]][28:1]
+ write_data_mem(get_h_shifted() | 0, get_a1());
+ write_data_mem(get_h_shifted() | 1, get_a2());
+ write_data_mem(get_h_shifted() | 2, get_a3());
+ write_data_mem(get_h_shifted() | 3, get_a4());
+ }
+ else if (inst == 0b0000'0101'1000)
+ {
+ // 058 Move M[H[5:1]][28:1] to (A4[7:1],A3[7:1],A2[7:1],A1[7:1])
+ u8 m1 = read_data_mem(get_h_shifted() | 0);
+ u8 m2 = read_data_mem(get_h_shifted() | 1);
+ u8 m3 = read_data_mem(get_h_shifted() | 2);
+ u8 m4 = read_data_mem(get_h_shifted() | 3);
+ set_a1(m1);
+ set_a2(m2);
+ set_a3(m3);
+ set_a4(m4);
+ }
+ else if (inst == 0b0000'0101'1100)
+ {
+ // 05c Exchange (A4[7:1],A3[7:1],A2[7:1],A1[7:1]) and M[H[5:1]][28:1]
+ u8 m1 = read_data_mem(get_h_shifted() | 0);
+ u8 m2 = read_data_mem(get_h_shifted() | 1);
+ u8 m3 = read_data_mem(get_h_shifted() | 2);
+ u8 m4 = read_data_mem(get_h_shifted() | 3);
+ write_data_mem(get_h_shifted() | 0, get_a1());
+ write_data_mem(get_h_shifted() | 1, get_a2());
+ write_data_mem(get_h_shifted() | 2, get_a3());
+ write_data_mem(get_h_shifted() | 3, get_a4());
+ set_a1(m1);
+ set_a2(m2);
+ set_a3(m3);
+ set_a4(m4);
+ }
+ else if (inst == 0b0000'0110'0000)
+ {
+ // 060 Subroutine End, Pop down address stack, Skip
+ u16 addr = pull_from_stack();
+ set_new_pc(addr);
+ m_skip = 1;
+ }
+ else if (inst == 0b0011'0000'1000)
+ {
+ // 308 Move A1[7:1] to FLS[7:1], 0->L[2:1]
+ u8 a1 = get_a1();
+ set_fls(a1);
+ set_l(0);
+ }
+ else if (inst == 0b0011'0100'1000)
+ {
+ // 348 Move A2[7:1] to FLS[7:1], 0->L[2:1]
+ u8 a2 = get_a2();
+ set_fls(a2);
+ set_l(0);
+ }
+ else if (inst == 0b0011'1000'1000)
+ {
+ // 388 Move M[H[5:1],L[2:1]][7:1] to FLS[7:1], 0->L[2:1]
+ u8 m = get_m_data();
+ set_fls(m);
+ set_l(0);
+ }
+ else if (inst == 0b0011'0000'1001)
+ {
+ // 309 Move A1[7:1] to FRS[7:1], 1->L[2:1]
+ u8 a1 = get_a1();
+ set_frs(a1);
+ set_l(1);
+ }
+ else if (inst == 0b0011'0100'1001)
+ {
+ // 349 Move A2[7:1] to FRS[7:1], 1->L[2:1]
+ u8 a2 = get_a2();
+ set_frs(a2);
+ set_l(1);
+ }
+ else if (inst == 0b0011'1000'1001)
+ {
+ // 389 Move M[H[5:1],L[2:1]][7:1] to FRS[7:1], 1->L[2:1]
+ u8 m = get_m_data();
+ set_frs(m);
+ set_l(1);
+ }
+ else if ((inst == 0b0000'0010'1000) || (inst == 0b0000'0010'1001))
+ {
+ // 028 Shift STB[4:1], N->STB[1]
+ // STB is an input strobe / shifter
+ const int n = inst & 1;
+ LOGMASKED(LOG_UNHANDLED_OPS, "0x%d->STB\n", n);
+
+ m_stb = (m_stb << 1) | n;
+ m_stb &= 0xf;
+ }
+
+ else if ((inst == 0b0011'0000'1010) || (inst == 0b0011'0000'1011))
+ {
+ // 30a Move A1[7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ u8 a1 = get_a1();
+ set_mode(a1);
+ set_l(n);
+ }
+ else if ((inst == 0b0011'01001010) || (inst == 0b0011'0100'1011))
+ {
+ // 34a Move A2[7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ u8 a2 = get_a2();
+ set_mode(a2);
+ set_l(n);
+ }
+ else if ((inst == 0b0011'1000'1010) || (inst == 0b00111000'1011))
+ {
+ // 38a Move M[H[5:1],L[2:1]][7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ u8 m = get_m_data();
+ set_mode(m);
+ set_l(n);
+ }
+ else if ((inst == 0b0100'0000'0000) || (inst == 0b0100'0000'0001))
+ {
+ // 400 N->A[11]
+ const int n = inst & 0x1;
+ set_a11(n);
+ }
+ else if ((inst == 0b0100'0000'0010) || (inst == 0b0100'0000'0011))
+ {
+ // 402 Jump to (000,M[H[5:1],L[2:1]][5:1],1N), 0->L[2:1], N->A[11]
+ const int n = inst & 0x1;
+ LOGMASKED(LOG_UNHANDLED_OPS, "JPM, 0->L, %d->A11\n", n);
+ set_a11(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0000'0000)
+ {
+ // 300 N->L[2:1]
+ const int n = inst & 0x3;
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'0000)
+ {
+ // 310 Move A2[7:1] to A1[7:1], N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a2 = get_a2();
+ set_a1(a2);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0100'0000)
+ {
+ // 340 Move A1[7:1] to A2[7:1], N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a1 = get_a1();
+ set_a2(a1);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'1000)
+ {
+ // 318 Right shift A1[7:1], 0->A1[7], N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a1 = get_a1();
+ a1 = a1 >> 1;
+ set_a1(a1);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0101'1000)
+ {
+ // 358 Right shift A2[7:1], 0->A2[7], N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a2 = get_a2();
+ a2 = a2 >> 1;
+ set_a2(a2);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'1001'1000)
+ {
+ // 398 Right shift M[H[5:1],L[2:1]][7:1], 0->M[H[5:1],L[2:1]][7], N->L[2:1]
+ const int n = inst & 0x3;
+ u8 m = get_m_data();
+ m = m >> 1;
+ set_m_data(m);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'1100)
+ {
+ // 31c Subtract A1[7:1] and A2[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a1 = get_a1();
+ u8 a2 = get_a2();
+ a2 = a1 - a2;
+ if (a2 & 0x80)
+ m_skip = 1;
+ set_a2(a2);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0100'1100)
+ {
+ // 34c Subtract A2[7:1] and A1[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ const int n = inst & 0x3;
+ u8 a1 = get_a1();
+ u8 a2 = get_a2();
+ a1 = a2 - a1;
+ if (a1 & 0x80)
+ m_skip = 1;
+ set_a1(a1);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'0000)
+ {
+ // 380 Move A1[7:1] to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 390 Move A2[7:1] to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 src = get_a1_or_a2(reg);
+ set_m_data(src);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'0100)
+ {
+ // 384 Exchange M[H[5:1],L[2:1]][7:1] and A1[7:1], N->L[2:1]
+ // 394 Exchange M[H[5:1],L[2:1]][7:1] and A2[7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 src = get_a1_or_a2(reg);
+ u8 m = get_m_data();
+ set_m_data(src);
+ set_a1_or_a2(reg,m);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'1100)
+ {
+ // 38c Move M[H[5:1],L[2:1]][7:1] to A1[7:1], N->L[2:1]
+ // 39c Move M[H[5:1],L[2:1]][7:1] to A2[7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 m = get_m_data();
+ set_a1_or_a2(reg,m);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1100'0000)
+ {
+ // 3c0 Move A1[5:1] to H[5:1], N->L[2:1]
+ // 3d0 Move A2[5:1] to H[5:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 src = get_a1_or_a2(reg);
+ set_h(src);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1100'1100)
+ {
+ // 3cc Move H[5:1] to A1[5:1], 0->A1[7:6], N->L[2:1]
+ // 3dc Move H[5:1] to A2[5:1], 0->A2[7:6], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ u8 h = get_h() & 0x1f;
+ set_a1_or_a2(reg,h);
+ set_l(n);
+ }
+ else if ((inst & 0b1111'1011'0011) == 0b0000'0011'0000)
+ {
+ // 30 Skip if (PD1 input) = 1
+ // 34 Skip if (PD2 input) = 1
+ // 38 Skip if (PD3 input) = 1
+ // 3c Skip if (PD4 input) = 1
+ // 70 Skip if (PD1 input) = 0
+ // 74 Skip if (PD2 input) = 0
+ // 78 Skip if (PD3 input) = 0
+ // 7c Skip if (PD4 input) = 0
+ const int which = (inst & 0x00c) >> 2;
+ const int inv = inst & 0x40;
+ LOGMASKED(LOG_UNHANDLED_OPS, "PD%d %sJ\n", which + 1, inv ? "/" : "");
+ }
+ else
+ {
+ LOGMASKED(LOG_UNHANDLED_OPS, "%04x <ILLEGAL>\n", inst);
+ }
+}
+
+void upd777_cpu_device::execute_run()
+{
+ while (m_icount > 0)
+ {
+ if (m_skip)
+ {
+ fetch();
+ m_skip = 0;
+ }
+
+ debugger_instruction_hook(m_pc);
+ do_op();
+ m_icount--;
+ }
+}
+
+void upd777_cpu_device::execute_set_input(int inputnum, int state)
+{
+}
+
+
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
+
+
+bool upd777_cpu_device::get_vbl_state()
+{
+ int vpos = m_screen->vpos();
+ if (vpos > 240)
+ return true;
+
+ return false;
+}
+
+bool upd777_cpu_device::get_hbl_4_state()
+{
+ // I *think* this is Hblank for every 4th line (so a new display list can be written?)
+ int vpos = m_screen->vpos();
+ if ((vpos % 4) == 0)
+ {
+ int hpos = m_screen->hpos();
+ if (hpos > 200)
+ return true;
+ }
+
+ return false;
+}
+
+uint32_t upd777_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
+{
+ // this needs to be scanline based, drawing whatever has been pushed to the linebuffer for the current
+ // group of scanlines!
+
+ bitmap.fill(0, cliprect);
+ gfx_element *gfx = m_gfxdecode->gfx(0);
+ gfx_element *gfx2 = m_gfxdecode->gfx(1);
+
+ for (int i = 0; i <= 0x18; i++)
+ {
+ u8 s0 = m_datamem[(i * 4) + 0];
+ u8 s1 = m_datamem[(i * 4) + 1];
+ u8 s2 = m_datamem[(i * 4) + 2];
+ u8 s3 = m_datamem[(i * 4) + 3];
+
+ int ypos = (s0 & 0x7e) >> 1;
+ //int prio = (s0 & 0x01);
+ int xpos = (s1 & 0x7f);
+ int patn = (s2 & 0x7f);
+ //int ylow = (s3 & 0x70);
+ int pal = (s3 & 0x0e) >> 1;
+ //int ysub = (s3 & 0x01);
+
+ if (patn<0x70)
+ gfx->zoom_transpen(bitmap, cliprect, patn, pal, 0, 0, xpos * 4, ypos * 4, 0x40000, 0x40000, 0);
+ else
+ gfx2->zoom_transpen(bitmap, cliprect, patn-0x70, pal, 0, 0, xpos * 4, ypos * 4, 0x40000, 0x40000, 0);
+ }
+
+ return 0;
+}
+
+// documentation says patterns 0x00 - 0x6e are 7x7
+// and patterns 0x70 - 0x7e are 8x7
+// but they all seem to be stored at 11x7, just with some columns blank?
+// this is probably because of how they were read out, over 11 data lines
+
+// 0x00-0x2f are 'Normal (7x7)
+// 0x30-0x67 are 'Bent' (7x7)
+// 0x68-0x6f are 'Y Repeat' (7x7)
+// 0x70-0x77 are 'XY Repeat' (8x7)
+// 0x78-0x7f are 'X Repeat' (8x7)
+//
+// NOTE, sprite patterns *7 and *f are unused so documentation expresses these ranges as to 66, 6e etc. rather than 67 6f
+//
+// it isn't clear how the 'Bent' effect etc. is enabled, as clearly not all patterns in this range should use it?
+
+static const gfx_layout test_layout =
+{
+ 7,7,
+ 0x70,
+ 1,
+ { 0 },
+ { 4,5,6,7,8,9,10 },
+ { 0*11,1*11,2*11,3*11,4*11,5*11,6*11 },
+ 7*11
+};
+
+static const gfx_layout test2_layout =
+{
+ 8,7,
+ 0x10,
+ 1,
+ { 0 },
+ { 3,4,5,6,7,8,9,10 },
+ { 0*11,1*11,2*11,3*11,4*11,5*11,6*11 },
+ 7*11
+};
+
+static GFXDECODE_START( gfx_ud777 )
+ GFXDECODE_ENTRY( "patterns", 0x000, test_layout, 0, 8 )
+ GFXDECODE_ENTRY( "patterns", 0x436, test2_layout, 0, 8 )
+GFXDECODE_END
+
+
+void upd777_cpu_device::palette_init(palette_device &palette) const
+{
+ // just a fake palette for now
+ for (int i = 0; i < palette.entries(); i++)
+ {
+ if (i & 1)
+ {
+ palette.set_pen_color(i, rgb_t(((i >> 1) & 1) ? 0xff : 0x7f, ((i >> 2) & 1) ? 0xff : 0x7f, ((i >> 3) & 1) ? 0xff : 0x7f));
+ }
+ else
+ {
+ palette.set_pen_color(i, rgb_t(0, 0, 0));
+ }
+ }
+}
+
+void upd777_cpu_device::push_to_line_buffer(u8 h, u8 m1, u8 m2, u8 m3, u8 m4)
+{
+ logerror("sprite %02x pushed to line buffer at scanline %d hpos %d: details %02x %02x %02x %02x\n", h, m_screen->vpos(), m_screen->hpos(), m1, m2, m3, m4);
+}
+
+TIMER_DEVICE_CALLBACK_MEMBER(upd777_cpu_device::scanline_timer)
+{
+ int scanline = param;
+
+ logerror("scanline %d\n", scanline);
+}
+
+void upd777_cpu_device::device_add_mconfig(machine_config &config)
+{
+ // or pass the screen from the driver?
+ SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
+ m_screen->set_refresh_hz(60);
+ m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(2000));
+ m_screen->set_size(512, 256);
+ m_screen->set_visarea(0, 512-1, 0, 256-0-1);
+ m_screen->set_screen_update(FUNC(upd777_cpu_device::screen_update));
+ m_screen->set_palette(m_palette);
+
+ TIMER(config, "scantimer").configure_scanline(FUNC(upd777_cpu_device::scanline_timer), "screen", 0, 1);
+
+ GFXDECODE(config, m_gfxdecode, m_palette, gfx_ud777);
+ PALETTE(config, m_palette, FUNC(upd777_cpu_device::palette_init), 32 * 3).set_entries(0x10);
+}
+
+ROM_START( upd777 )
+ ROM_REGION16_BE( 0x1000, "prg", ROMREGION_ERASEFF )
+ ROM_REGION( 0x4d0, "patterns", ROMREGION_ERASEFF )
+ROM_END
+
+const tiny_rom_entry *upd777_cpu_device::device_rom_region() const
+{
+ return ROM_NAME(upd777);
+}
+
diff --git a/src/devices/cpu/upd777/upd777.h b/src/devices/cpu/upd777/upd777.h
new file mode 100644
index 00000000000..cdb787fd104
--- /dev/null
+++ b/src/devices/cpu/upd777/upd777.h
@@ -0,0 +1,165 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+
+#ifndef MAME_CPU_UPD777_UPD777_H
+#define MAME_CPU_UPD777_UPD777_H
+
+#pragma once
+
+#include "machine/timer.h"
+
+#include "emupal.h"
+#include "screen.h"
+
+
+class upd777_cpu_device : public cpu_device
+{
+public:
+ upd777_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ enum {
+ UPD777_PC = 0,
+ UPD777_A1,
+ UPD777_A2,
+ UPD777_A3,
+ UPD777_A4,
+ UPD777_SKIP,
+ UPD777_H,
+ UPD777_L,
+ UPD777_ADDR_STACK0,
+ UPD777_ADDR_STACK1,
+ UPD777_ADDR_STACK2,
+ UPD777_ADDR_STACK_POS,
+ };
+
+ u16* get_prgregion() { return &m_prgregion[0]; }
+ u8* get_patregion() { return &m_patregion[0]; }
+
+ auto in_cb() { return m_port_in.bind(); }
+
+protected:
+ upd777_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor data);
+
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual const tiny_rom_entry *device_rom_region() const override;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ virtual space_config_vector memory_space_config() const override;
+
+ bool get_vbl_state();
+ bool get_hbl_4_state();
+
+
+ void internal_map(address_map &map);
+ void internal_data_map(address_map &map);
+
+ required_shared_ptr<u8> m_datamem;
+
+private:
+ void increment_pc();
+ u16 fetch();
+ void do_op();
+
+
+ u8 get_l() const;
+ void set_l(int l);
+ u8 get_h_shifted() const;
+ u8 get_h() const;
+ void set_h(int h);
+ void set_a11(int a11);
+ void set_new_pc(int newpc);
+
+ void set_frs(u8 frs);
+ void set_fls(u8 fls);
+ void set_mode(u8 mode);
+
+ u8 get_m_data();
+ void set_m_data(u8 data);
+
+ u8 get_a1() const;
+ u8 get_a2() const;
+ u8 get_a3() const;
+ u8 get_a4() const;
+ u8 get_a1_or_a2(int reg) const;
+
+ void set_a1(u8 data);
+ void set_a2(u8 data);
+ void set_a3(u8 data);
+ void set_a4(u8 data);
+ void set_a1_or_a2(int reg, u8 value);
+
+ void set_disp(u8 data);
+ void set_gpe(u8 data);
+ void set_kie(u8 data);
+ void set_sme(u8 data);
+
+ u8 get_kie() const;
+ u8 get_sme() const;
+
+ u8 read_data_mem(u8 addr);
+ void write_data_mem(u8 addr, u8 data);
+ void push_to_stack(u16 addr);
+ u16 pull_from_stack();
+
+ address_space_config m_space_config;
+ address_space_config m_data_config;
+
+ memory_access<11, 1, -1, ENDIANNESS_BIG>::specific m_space;
+ memory_access<8, 0, 0, ENDIANNESS_BIG>::specific m_data;
+
+ u32 m_ppc;
+ u32 m_pc;
+ s32 m_icount;
+ u8 m_skip;
+ u8 m_a[4]; // A1 to A4
+ u8 m_h;
+ u8 m_l;
+ u16 m_stack[3]; // 3 11-bit registers
+ u8 m_stackpos;
+
+ u8 m_frs;
+ u8 m_fls;
+
+ u8 m_mode;
+
+ u8 m_stb;
+
+ // what are these, used by H<->X opcode
+ u8 m_ldash;
+ u8 m_x4;
+
+ // single bit enable registers?
+ u8 m_disp;
+ u8 m_gpe;
+ u8 m_kie;
+ u8 m_sme;
+
+ ///////////////////////////////////// VIDEO RELATED
+
+ uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
+
+ void push_to_line_buffer(u8 h, u8 m1, u8 m2, u8 m3, u8 m4);
+
+ void palette_init(palette_device &palette) const;
+
+ TIMER_DEVICE_CALLBACK_MEMBER(scanline_timer);
+
+ required_device<gfxdecode_device> m_gfxdecode;
+ required_device<palette_device> m_palette;
+ required_device<screen_device> m_screen;
+ required_region_ptr<uint16_t> m_prgregion;
+ required_region_ptr<uint8_t> m_patregion;
+
+ devcb_read8 m_port_in;
+};
+
+DECLARE_DEVICE_TYPE(UPD777, upd777_cpu_device)
+
+#endif // MAME_CPU_UPD777_UPD777_H
diff --git a/src/devices/cpu/upd777/upd777dasm.cpp b/src/devices/cpu/upd777/upd777dasm.cpp
new file mode 100644
index 00000000000..5ebd92eb451
--- /dev/null
+++ b/src/devices/cpu/upd777/upd777dasm.cpp
@@ -0,0 +1,504 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+
+#include "emu.h"
+#include "upd777dasm.h"
+
+upd777_disassembler::upd777_disassembler()
+ : util::disasm_interface()
+{
+ // init lfsr pc lut
+ for (u32 i = 0, pc = 0; i < 0x7f; i++)
+ {
+ m_l2r[i] = pc;
+ m_r2l[pc] = i;
+ const int top1 = (pc & 0x40) >> 6;
+ const int top2 = (pc & 0x20) >> 5;
+ const int nor = (top1 ^ top2) ^ 1;
+ pc = (pc << 1) | nor;
+ pc &= 0x7f;
+ }
+ m_l2r[0x7f] = 0x7f;
+ m_r2l[0x7f] = 0x7f;
+}
+
+
+std::string upd777_disassembler::get_300optype_name(int optype)
+{
+ switch (optype)
+ {
+ case 0x00: return "."; // 'AND' expressed as '·' in documentation, but disassembler isn't keen on that
+ case 0x01: return "+";
+ case 0x02: return "v"; // 'OR'
+ case 0x03: return "-";
+ }
+ return "<invalid optype>";
+}
+
+std::string upd777_disassembler::get_200optype_name(int optype)
+{
+ switch (optype)
+ {
+ case 0x00: return "."; // 'AND' expressed as '·' in documentation, but disassembler isn't keen on that
+ case 0x01: return "<invalid optype>";
+ case 0x02: return "=";
+ case 0x03: return "-";
+ }
+ return "<invalid optype>";
+}
+
+std::string upd777_disassembler::get_reg_name(int reg)
+{
+ switch (reg)
+ {
+ case 0x00: return "A1"; // general reg A1
+ case 0x01: return "A2"; // general reg A2
+ case 0x02: return "M"; // content of memory
+ case 0x03: return "H"; // high address
+ }
+ return "<invalid reg>";
+}
+
+offs_t upd777_disassembler::disassemble(std::ostream &stream, offs_t pc, const upd777_disassembler::data_buffer &opcodes, const upd777_disassembler::data_buffer &params)
+{
+ u16 inst = opcodes.r16(pc);
+
+ if (inst >= 0b0000'1000'0000 && inst <= 0b0000'1111'1111)
+ {
+ // 080 - 0ff Skip if (M[H[5:1],L[2:1]][7:1]-K[7:1]) makes borrow
+ const int k = inst & 0x7f;
+ util::stream_format(stream, "M-0x%02x", k);
+ }
+ else if (inst >= 0b0001'0000'0000 && inst <= 0b0001'0111'1111)
+ {
+ // 100-17f M[H[5:1],L[2:1]][7:1]+K[7:1]->M[H[5:1],L[2:1]][7:1], Skip if carry, N->L[2:1]
+ const int k = inst & 0x1f;
+ const int n = (inst >> 5) & 0x3;
+ util::stream_format(stream, "M+0x%02x->M, 0x%d->L", k, n);
+ }
+ else if (inst >= 0b0001'1000'0000 && inst <= 0b0001'1111'1111)
+ {
+ // 180-1ff M[H[5:1],L[2:1]][7:1]-K[7:1]->M[H[5:1],L[2:1]][7:1], Skip if borrow, N->L[2:1]
+ const int k = inst & 0x1f;
+ const int n = (inst >> 5) & 0x3;
+ util::stream_format(stream, "M-0x%02x->M, 0x%d->L", k, n);
+ }
+ else if (inst >= 0b0100'1000'0000 && inst <= 0b0100'1011'1111)
+ {
+ // 480-4bf H[5:1]-K[5:1]->H[5:1], Skip if borrow
+ const int k = inst & 0x1f;
+ util::stream_format(stream, "H-0x%02x->H BOJ", k);
+ }
+ else if (inst >= 0b0100'1100'0000 && inst <= 0b0100'1111'1111)
+ {
+ // 4c0 - 4ff H[5:1]+K[5:1]->H[5:1], Skip if carry
+ const int k = inst & 0x1f;
+ util::stream_format(stream, "H+0x%02x->H CAJ", k);
+ }
+ else if (inst >= 0b0101'0000'0000 && inst <= 0b0101'0111'1111)
+ {
+ // 500 - 57f
+ // When (KIE=0)&(SME=0), Store K[7:1] to M[H[5:1],L[2:1]][7:1]
+ // When (KIE=1), Store KIN[7:1] to M[H[5:1],L[2:1]][7:1]
+ // When (SME=1), Store HCL[7:1] to M[H[5:1],L[2:1]][7:1]
+ const int k = inst & 0x7f;
+ util::stream_format(stream, "0x%02x->M", k);
+ }
+ else if (inst >= 0b0101'1000'0000 && inst <= 0b0101'1111'1111)
+ {
+ // 580 - 5ff Store K[7:6] to L[2:1] and K[5:1] to H[5:1]
+ const int k = inst & 0x7f;
+ util::stream_format(stream, "0x%02x->L,H", k);
+ }
+ else if (inst >= 0b0110'0000'0000 && inst <= 0b0111'1111'1111)
+ {
+ // 600-67f Store K[7:1] to A1[7:1]
+ // 680-6ff Store K[7:1] to A2[7:1]
+ // 700-77f Store K[7:1] to A3[7:1]
+ // 780-7ff Store K[7:1] to A4[7:1]
+ const int reg = (inst & 0x180) >> 7;
+ const int k = inst & 0x7f;
+ util::stream_format(stream, "0x%02x->A%d", k, reg+1);
+ }
+ else if (inst >= 0b1000'0000'0000 && inst <= 0b1011'1111'1111)
+ {
+ // 800 - bff Move K[10:1] to A[10:1], Jump to A[11:1]
+ u16 fulladdress = (pc & 0x400) | (inst & 0x3ff);
+ util::stream_format(stream, "JP 0x%03x (%01x:%02x)", fulladdress, (fulladdress & 0x780)>>7, inst & 0x07f);
+ }
+ else if (inst >= 0b1100'0000'0000 && inst <= 0b1111'1111'1111)
+ {
+ // c00 - fff Move K[10:1] to A[10:1], 0 to A11, Jump to A[11:1], Push next A[11:1] up to ROM address stack
+ const int k = inst & 0x3ff;
+ util::stream_format(stream, "JS 0x%03x (%01x:%02x)", k & 0x3ff, (k & 0x380)>>7, k & 0x07f);
+ }
+ else if (((inst & 0b1111'0000'0000) == 0b0010'0000'0000) && ((inst & 0b0000'0000'1100) != 0b0000'0000'0100))
+ {
+ // 0b0010'rrnR'oonn where rr = reg1 (A1, A2, M or H), n = invert condition, R = reg2 (A1 or A2) and oo = optype (only 0,2,3 are valid, no cases here for 1) nn = next l value
+ //
+ // optype · (AND)
+ // 200 Skip if (A1[7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 220 Skip if (A1[7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 210 Skip if (A1[7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 230 Skip if (A1[7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 240 Skip if (A2[7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 260 Skip if (A2[7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 250 Skip if (A2[7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 270 Skip if (A2[7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 280 Skip if (M[H[5:1],L[2:1]][7:1]·A1[7:1]) makes zero, N->L[2:1]
+ // 2a0 Skip if (M[H[5:1],L[2:1]][7:1]·A1[7:1]) makes non zero, N->L[2:1]
+ // 290 Skip if (M[H[5:1],L[2:1]][7:1]·A2[7:1]) makes zero, N->L[2:1]
+ // 2b0 Skip if (M[H[5:1],L[2:1]][7:1]·A2[7:1]) makes non zero, N->L[2:1]
+ // 2c0 Skip if (H[5:1]·A1[5:1]) makes zero, N->L[2:1]
+ // 2e0 Skip if (H[5:1]·A1[5:1]) makes non zero, N->L[2:1]
+ // 2d0 Skip if (H[5:1]·A2[5:1]) makes zero, N->L[2:1]
+ // 2f0 Skip if (H[5:1]·A2[5:1]) makes non zero, N->L[2:1]
+
+ // optype = (these are expressed as x=y in the opcopde syntax, but x-y in the description, in reality it seems to act as 'CMP' so x-y = 0)
+ // 208 Skip if (A1[7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 228 Skip if (A1[7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 218 Skip if (A1[7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 238 Skip if (A1[7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 248 Skip if (A2[7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 268 Skip if (A2[7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 258 Skip if (A2[7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 278 Skip if (A2[7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 288 Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes zero, N->L[2:1]
+ // 2a8 Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes non zero, N->L[2:1]
+ // 298 Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes zero, N->L[2:1]
+ // 2b8 Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes non zero, N->L[2:1]
+ // 2c8 Skip if (H[5:1]-A1[5:1]) makes zero, N->L[2:1]
+ // 2e8 Skip if (H[5:1]-A1[5:1]) makes non zero, N->L[2:1]
+ // 2d8 Skip if (H[5:1]-A2[5:1]) makes zero, N->L[2:1]
+ // 2f8 Skip if (H[5:1]-A2[5:1]) makes non zero, N->L[2:1]
+
+ // optype -
+ // 20c Skip if (A1[7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 22c Skip if (A1[7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 21c Skip if (A1[7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 23c Skip if (A1[7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 24c Skip if (A2[7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 26c Skip if (A2[7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 25c Skip if (A2[7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 27c Skip if (A2[7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 28c Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes borrow, N->L[2:1]
+ // 2ac Skip if (M[H[5:1],L[2:1]][7:1]-A1[7:1]) makes non borrow, N->L[2:1]
+ // 29c Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes borrow, N->L[2:1]
+ // 2bc Skip if (M[H[5:1],L[2:1]][7:1]-A2[7:1]) makes non borrow, N->L[2:1]
+ // 2cc Skip if (H[5:1]-A1[5:1]) makes borrow, N->L[2:1]
+ // 2ec Skip if (H[5:1]-A1[5:1]) makes non borrow, N->L[2:1]
+ // 2dc Skip if (H[5:1]-A2[5:1]) makes borrow, N->L[2:1]
+ // 2fc Skip if (H[5:1]-A2[5:1]) makes non borrow, N->L[2:1]
+ const int non = inst & 0x20;
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg1 = (inst & 0xc0) >> 6;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "%s%s%s, 0x%d->L %s%s", get_reg_name(reg1), get_200optype_name(optype), get_reg_name(reg2), n, (optype == 3) ? "BOJ" : "EQJ", non ? "/" : "");
+ }
+ else if ((inst & 0b1111'1010'0000) == 0b0011'0010'0000)
+ {
+ // 0b0011'0r1R'oonn (where r = reg1, R = reg2, o = optype, and n = next l value)
+ // 320 AND A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 324 Add A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 328 OR A1[7:1] and A1[7:1], store to A1[7:1], N->L[2:1]
+ // 32c Subtract A1[7:1] and A1[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ // 330 AND A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 334 Add A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 338 OR A1[7:1] and A2[7:1], store to A1[7:1], N->L[2:1]
+ // 33c Subtract A1[7:1] and A2[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ // 360 AND A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 364 Add A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 368 OR A2[7:1] and A1[7:1], store to A2[7:1], N->L[2:1]
+ // 36c Subtract A2[7:1] and A1[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ // 370 AND A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 374 Add A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 378 OR A2[7:1] and A2[7:1], store to A2[7:1], N->L[2:1]
+ // 37c Subtract A2[7:1] and A2[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int reg1 = (inst & 0x40) >> 6;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "%s%s%s->%s, 0x%d->L %s", get_reg_name(reg1), get_300optype_name(optype), get_reg_name(reg2), get_reg_name(reg1), n, (optype == 3) ? "BOJ" : "");
+ }
+ else if ((inst & 0b1111'1110'0000) == 0b0011'1010'0000)
+ {
+ // 0b0011'101r'oonn (where r = reg, o = optype, n = next l value)
+ // 3a0 AND M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3a4 Add M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if carry
+ // 3a8 OR M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3ac Subtract M[H[5:1],L[2:1]][7:1] and A1[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if borrow
+ // 3b0 AND M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3b4 Add M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if carry
+ // 3b8 OR M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 3bc Subtract M[H[5:1],L[2:1]][7:1] and A2[7:1], store to M[H[5:1],L[2:1]][7:1], N->L[2:1] Skip if borrow
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg2 = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "M%s%s->M, 0x%d->L", get_300optype_name(optype), get_reg_name(reg2), n);
+ }
+ else if ((inst & 0b1111'1110'0000) == 0b0011'1110'0000)
+ {
+ // 0b0011'111r'oonn (where r = reg, o = optype, n = next l value)
+ // 3e0 AND H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3e4 Add H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3e8 OR H[5:1] and A1[5:1], store to H[5:1], N->L[2:1]
+ // 3ec Subtract H[5:1] and A1[5:1], store to H[5:1], Skip if borrow, N->L[2:1]
+ // 3f0 AND H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3f4 Add H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3f8 OR H[5:1] and A2[5:1], store to H[5:1], N->L[2:1]
+ // 3fc Subtract H[5:1] and A2[5:1], store to H[5:1], Skip if borrow, N->L[2:1]
+ const int optype = (inst & 0x0c) >> 2;
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "H%s%s->H, 0x%d->L", get_300optype_name(optype), get_reg_name(reg), n);
+ }
+ else if ((inst & 0b1111'1100'0010) == 0b0100'0100'0000)
+ {
+ // 0b0100'01dg'ks0n (where d = DISP, G = GPE, K = KIE, S = SME, n = A11)
+ // 440 Set D to DISP, G to GPE, K to KIE, S to SME, N->A[11]
+ const int d = (inst >> 5) & 0x1;
+ const int g = (inst >> 4) & 0x1;
+ const int k = (inst >> 3) & 0x1;
+ const int s = (inst >> 2) & 0x1;
+ const int n = inst & 0x1;
+ util::stream_format(stream, "%d->D, %d->G, %d->K, %d->S, %d->A11", d, g, k, s, n);
+ }
+ else if (inst == 0b0000'0000'0000)
+ {
+ // 000 No Operation
+ util::stream_format(stream, "NOP");
+ }
+ else if (inst == 0b0000'0000'0100)
+ {
+ // 004 Skip if (Gun Port Latch) = 1
+ util::stream_format(stream, "GPL");
+ }
+ else if (inst == 0b0000'0000'1000)
+ {
+ // 008 Move H[5:1] to Line Buffer Register[5:1]
+ util::stream_format(stream, "H->NRM");
+ }
+ else if (inst == 0b0000'0001'1000)
+ {
+ // 018 H[5:1]<->X4[5:1], 0->X4[7:6], 0->X3[7:1], 0->X1'[1], 0->A1'[1], L[2:1]<->L'[2:1]
+ util::stream_format(stream, "H<->X");
+ }
+ else if (inst == 0b0000'0010'0000)
+ {
+ // 020 Subroutine End, Pop down address stack
+ util::stream_format(stream, "SRE");
+ }
+ else if (inst == 0b0000'0100'1001)
+ {
+ // 049 Skip if (4H Horizontal Blank) = 1
+ util::stream_format(stream, "4H BLK");
+ }
+ else if (inst == 0b0000'0100'1010)
+ {
+ // 04a Skip if (Vertical Blank) = 1, 0->M[[18:00],[3]][1]
+ util::stream_format(stream, "VBLK");
+ }
+ else if (inst == 0b0000'0100'1100)
+ {
+ // 04c Skip if (GP&SW/ input) = 1
+ util::stream_format(stream, "GPSW/");
+ }
+ else if (inst == 0b0000'0101'0100)
+ {
+ // 054 Move (A4[7:1],A3[7:1],A2[7:1],A1[7:1]) to M[H[5:1]][28:1]
+ util::stream_format(stream, "A->MA");
+ }
+ else if (inst == 0b0000'0101'1000)
+ {
+ // 058 Move M[H[5:1]][28:1] to (A4[7:1],A3[7:1],A2[7:1],A1[7:1])
+ util::stream_format(stream, "MA->A");
+ }
+ else if (inst == 0b0000'0101'1100)
+ {
+ // 05c Exchange (A4[7:1],A3[7:1],A2[7:1],A1[7:1]) and M[H[5:1]][28:1]
+ util::stream_format(stream, "MA<->A");
+ }
+ else if (inst == 0b0000'0110'0000)
+ {
+ // 060 Subroutine End, Pop down address stack, Skip
+ util::stream_format(stream, "SRE+1");
+ }
+ else if (inst == 0b0011'0000'1000)
+ {
+ // 308 Move A1[7:1] to FLS[7:1], 0->L[2:1]
+ util::stream_format(stream, "A1->FLS, 0->L");
+ }
+ else if (inst == 0b0011'0100'1000)
+ {
+ // 348 Move A2[7:1] to FLS[7:1], 0->L[2:1]
+ util::stream_format(stream, "A2->FLS, 0->L");
+ }
+ else if (inst == 0b0011'1000'1000)
+ {
+ // 388 Move M[H[5:1],L[2:1]][7:1] to FLS[7:1], 0->L[2:1]
+ util::stream_format(stream, "M->FLS, 0->L");
+ }
+ else if (inst == 0b0011'0000'1001)
+ {
+ // 309 Move A1[7:1] to FRS[7:1], 1->L[2:1]
+ util::stream_format(stream, "A1->FRS, 1->L");
+ }
+ else if (inst == 0b0011'0100'1001)
+ {
+ // 349 Move A2[7:1] to FRS[7:1], 1->L[2:1]
+ util::stream_format(stream, "A2->FRS, 1->L");
+ }
+ else if (inst == 0b0011'1000'1001)
+ {
+ // 389 Move M[H[5:1],L[2:1]][7:1] to FRS[7:1], 1->L[2:1]
+ util::stream_format(stream, "M->FRS, 1->L");
+ }
+ else if ((inst == 0b0000'0010'1000) || (inst == 0b0000'0010'1001))
+ {
+ // 028 Shift STB[4:1], N->STB[1]
+ // STB is an input strobe / shifter
+ const int n = inst & 1;
+ util::stream_format(stream, "0x%d->STB", n);
+ }
+ else if ((inst == 0b0011'0000'1010) || (inst == 0b0011'0000'1011))
+ {
+ // 30a Move A1[7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ util::stream_format(stream, "A1->MODE, 0x%d->L", n);
+ }
+ else if ((inst == 0b0011'01001010) || (inst == 0b0011'0100'1011))
+ {
+ // 34a Move A2[7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ util::stream_format(stream, "A2->MODE, 0x%d->L", n);
+ }
+ else if ((inst == 0b0011'1000'1010) || (inst == 0b00111000'1011))
+ {
+ // 38a Move M[H[5:1],L[2:1]][7:1] to MODE[7:1], 1N->L[2:1]
+ const int n = (inst & 0x1) + 2;
+ util::stream_format(stream, "M->MODE, 0x%d->L", n);
+ }
+
+ else if ((inst == 0b0100'0000'0000) || (inst == 0b0100'0000'0001))
+ {
+ // 400 N->A[11]
+ const int n = inst & 0x1;
+ util::stream_format(stream, "%d->A11", n);
+ }
+ else if ((inst == 0b0100'0000'0010) || (inst == 0b0100'0000'0011))
+ {
+ // 402 Jump to (000,M[H[5:1],L[2:1]][5:1],1N), 0->L[2:1], N->A[11]
+ const int n = inst & 0x1;
+ util::stream_format(stream, "JPM, 0->L, %d->A11", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0000'0000)
+ {
+ // 300 N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'0000)
+ {
+ // 310 Move A2[7:1] to A1[7:1], N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A2->A1, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0100'0000)
+ {
+ // 340 Move A1[7:1] to A2[7:1], N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A1->A2, 0x%d->L", n);
+ }
+
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'1000)
+ {
+ // 318 Right shift A1[7:1], 0->A1[7], N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A1->RS, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0101'1000)
+ {
+ // 358 Right shift A2[7:1], 0->A2[7], N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A2->RS, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'1001'1000)
+ {
+ // 398 Right shift M[H[5:1],L[2:1]][7:1], 0->M[H[5:1],L[2:1]][7], N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "M->RS, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0001'1100)
+ {
+ // 31c Subtract A1[7:1] and A2[7:1], store to A2[7:1], Skip if borrow, N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A1-A2->A2, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1111'1100) == 0b0011'0100'1100)
+ {
+ // 34c Subtract A2[7:1] and A1[7:1], store to A1[7:1], Skip if borrow, N->L[2:1]
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A2-A1->A1, 0x%d->L", n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'0000)
+ {
+ // 380 Move A1[7:1] to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ // 390 Move A2[7:1] to M[H[5:1],L[2:1]][7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A%d->M, 0x%d->L", reg + 1, n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'0100)
+ {
+ // 384 Exchange M[H[5:1],L[2:1]][7:1] and A1[7:1], N->L[2:1]
+ // 394 Exchange M[H[5:1],L[2:1]][7:1] and A2[7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "M<->A%d, 0x%d->L", reg + 1, n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1000'1100)
+ {
+ // 38c Move M[H[5:1],L[2:1]][7:1] to A1[7:1], N->L[2:1]
+ // 39c Move M[H[5:1],L[2:1]][7:1] to A2[7:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "M->A%d, 0x%d->L", reg + 1, n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1100'0000)
+ {
+ // 3c0 Move A1[5:1] to H[5:1], N->L[2:1]
+ // 3d0 Move A2[5:1] to H[5:1], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "A%d->H, 0x%d->L", reg + 1, n);
+ }
+ else if ((inst & 0b1111'1110'1100) == 0b0011'1100'1100)
+ {
+ // 3cc Move H[5:1] to A1[5:1], 0->A1[7:6], N->L[2:1]
+ // 3dc Move H[5:1] to A2[5:1], 0->A2[7:6], N->L[2:1]
+ const int reg = (inst & 0x10) >> 4;
+ const int n = inst & 0x3;
+ util::stream_format(stream, "H->A%d, 0x%d->L", reg + 1, n);
+ }
+ else if ((inst & 0b1111'1011'0011) == 0b0000'0011'0000)
+ {
+ // 30 Skip if (PD1 input) = 1
+ // 34 Skip if (PD2 input) = 1
+ // 38 Skip if (PD3 input) = 1
+ // 3c Skip if (PD4 input) = 1
+ // 70 Skip if (PD1 input) = 0
+ // 74 Skip if (PD2 input) = 0
+ // 78 Skip if (PD3 input) = 0
+ // 7c Skip if (PD4 input) = 0
+ const int which = (inst & 0x00c) >> 2;
+ const int inv = inst & 0x40;
+ util::stream_format(stream, "PD%d %sJ", which + 1, inv ? "/" : "");
+ }
+ else
+ {
+ util::stream_format(stream, "%04x <ILLEGAL>", inst);
+ }
+
+ return 1;
+}
diff --git a/src/devices/cpu/upd777/upd777dasm.h b/src/devices/cpu/upd777/upd777dasm.h
new file mode 100644
index 00000000000..b7729edbc30
--- /dev/null
+++ b/src/devices/cpu/upd777/upd777dasm.h
@@ -0,0 +1,34 @@
+// license:BSD-3-Clause
+// copyright-holders:Vas Crabb
+
+#ifndef MAME_CPU_UPD777_UPD777DASM_H
+#define MAME_CPU_UPD777_UPD777DASM_H
+
+#pragma once
+
+
+class upd777_disassembler : public util::disasm_interface
+{
+public:
+ // construction/destruction
+ upd777_disassembler();
+
+protected:
+ // disassembler overrides
+ virtual u32 opcode_alignment() const override { return 1; }
+ virtual u32 interface_flags() const override { return NONLINEAR_PC | PAGED; }
+ virtual u32 page_address_bits() const override { return 7; }
+ virtual offs_t pc_linear_to_real(offs_t pc) const override { return (pc & ~0x7f) | m_l2r[pc & 0x7f]; }
+ virtual offs_t pc_real_to_linear(offs_t pc) const override { return (pc & ~0x7f) | m_r2l[pc & 0x7f]; }
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+private:
+ u8 m_l2r[0x80];
+ u8 m_r2l[0x80];
+
+ std::string get_300optype_name(int optype);
+ std::string get_200optype_name(int optype);
+ std::string get_reg_name(int reg);
+};
+
+#endif // MAME_CPU_UPD777_UPD777DASM_H
diff --git a/src/devices/cpu/upd7810/upd7810.cpp b/src/devices/cpu/upd7810/upd7810.cpp
index fd43adb2294..4f706c09a13 100644
--- a/src/devices/cpu/upd7810/upd7810.cpp
+++ b/src/devices/cpu/upd7810/upd7810.cpp
@@ -376,6 +376,9 @@ STOP 01001000 10111011 12 stop
DEFINE_DEVICE_TYPE(UPD7810, upd7810_device, "upd7810", "NEC uPD7810")
DEFINE_DEVICE_TYPE(UPD78C10, upd78c10_device, "upd78c10", "NEC uPD78C10")
+DEFINE_DEVICE_TYPE(UPD7811, upd7811_device, "upd7811", "NEC uPD7811")
+DEFINE_DEVICE_TYPE(UPD78C11, upd78c11_device, "upd78c11", "NEC uPD78C11")
+DEFINE_DEVICE_TYPE(UPD78C14, upd78c14_device, "upd78c14", "NEC uPD78C14")
DEFINE_DEVICE_TYPE(UPD7807, upd7807_device, "upd7807", "NEC uPD7807")
DEFINE_DEVICE_TYPE(UPD7801, upd7801_device, "upd7801", "NEC uPD7801")
DEFINE_DEVICE_TYPE(UPD78C05, upd78c05_device, "upd78c05", "NEC uPD78C05")
@@ -389,7 +392,8 @@ void upd7810_device::upd_internal_128_ram_map(address_map &map)
void upd7810_device::upd_internal_256_ram_map(address_map &map)
{
- map(0xff00, 0xffff).ram();
+ map(0xff00, 0xffff).view(m_ram_view);
+ m_ram_view[0](0xff00, 0xffff).ram();
}
void upd7810_device::upd_internal_4096_rom_128_ram_map(address_map &map)
@@ -401,7 +405,15 @@ void upd7810_device::upd_internal_4096_rom_128_ram_map(address_map &map)
void upd7810_device::upd_internal_4096_rom_256_ram_map(address_map &map)
{
map(0x0000, 0x0fff).rom();
- map(0xff00, 0xffff).ram();
+ map(0xff00, 0xffff).view(m_ram_view);
+ m_ram_view[0](0xff00, 0xffff).ram();
+}
+
+void upd7810_device::upd_internal_16k_rom_256_ram_map(address_map &map)
+{
+ map(0x0000, 0x3fff).rom();
+ map(0xff00, 0xffff).view(m_ram_view);
+ m_ram_view[0](0xff00, 0xffff).ram();
}
upd7810_device::upd7810_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map)
@@ -424,6 +436,7 @@ upd7810_device::upd7810_device(const machine_config &mconfig, device_type type,
, m_pf_out_cb(*this)
, m_pt_in_cb(*this, 0) // TODO: uPD7807 only
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, internal_map)
+ , m_ram_view(*this, "ram_view")
, m_pa_pullups(0xff)
, m_pb_pullups(0xff)
, m_pc_pullups(0xff)
@@ -459,6 +472,21 @@ upd78c10_device::upd78c10_device(const machine_config &mconfig, const char *tag,
{
}
+upd7811_device::upd7811_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : upd7810_device(mconfig, UPD7811, tag, owner, clock, address_map_constructor(FUNC(upd7811_device::upd_internal_4096_rom_256_ram_map), this))
+{
+}
+
+upd78c11_device::upd78c11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : upd78c10_device(mconfig, UPD78C11, tag, owner, clock, address_map_constructor(FUNC(upd78c11_device::upd_internal_4096_rom_256_ram_map), this))
+{
+}
+
+upd78c14_device::upd78c14_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : upd78c10_device(mconfig, UPD78C14, tag, owner, clock, address_map_constructor(FUNC(upd78c14_device::upd_internal_16k_rom_256_ram_map), this))
+{
+}
+
void upd7807_device::configure_ops()
{
m_opXX = s_opXX_7807;
@@ -608,25 +636,7 @@ uint8_t upd7810_device::RP(offs_t port)
data = (m_pb_in & m_mb) | (m_pb_out & ~m_mb);
break;
case UPD7810_PORTC:
- if (m_mc && !m_pc_in_cb.isunset()) // NS20031301 no need to read if the port is set as output
- m_pc_in = m_pc_in_cb(0, m_mc);
- data = (m_pc_in & m_mc) | (m_pc_out & ~m_mc);
- if (m_mcc & 0x01) /* PC0 = TxD output */
- data = (data & ~0x01) | (m_txd & 1 ? 0x01 : 0x00);
- if (m_mcc & 0x02) /* PC1 = RxD input */
- data = (data & ~0x02) | (m_rxd & 1 ? 0x02 : 0x00);
- if (m_mcc & 0x04) /* PC2 = SCK input/output */
- data = (data & ~0x04) | (m_sck & 1 ? 0x04 : 0x00);
- if (m_mcc & 0x08) /* PC3 = TI/INT2 input */
- data = (data & ~0x08) | (m_int2 & 1 ? 0x08 : 0x00);
- if (m_mcc & 0x10) /* PC4 = TO output */
- data = (data & ~0x10) | (m_to & 1 ? 0x10 : 0x00);
- if (m_mcc & 0x20) /* PC5 = CI input */
- data = (data & ~0x20) | (m_ci & 1 ? 0x20 : 0x00);
- if (m_mcc & 0x40) /* PC6 = CO0 output */
- data = (data & ~0x40) | (m_co0 & 1 ? 0x40 : 0x00);
- if (m_mcc & 0x80) /* PC7 = CO1 output */
- data = (data & ~0x80) | (m_co1 & 1 ? 0x80 : 0x00);
+ data = read_pc();
break;
case UPD7810_PORTD:
if (!m_pd_in_cb.isunset())
@@ -674,6 +684,42 @@ uint8_t upd7810_device::RP(offs_t port)
return data;
}
+uint8_t upd7810_device::read_pc()
+{
+ if (m_mc && !m_pc_in_cb.isunset()) // NS20031301 no need to read if the port is set as output
+ m_pc_in = m_pc_in_cb(0, m_mc);
+ uint8_t data = (m_pc_in & m_mc) | (m_pc_out & ~m_mc);
+ if (m_mcc & 0x01) /* PC0 = TxD output */
+ data = (data & ~0x01) | (m_txd & 1 ? 0x01 : 0x00);
+ if (m_mcc & 0x02) /* PC1 = RxD input */
+ data = (data & ~0x02) | (m_rxd & 1 ? 0x02 : 0x00);
+ if (m_mcc & 0x04) /* PC2 = SCK input/output */
+ data = (data & ~0x04) | (m_sck & 1 ? 0x04 : 0x00);
+ if (m_mcc & 0x08) /* PC3 = TI/INT2 input */
+ data = (data & ~0x08) | (m_int2 & 1 ? 0x08 : 0x00);
+ if (m_mcc & 0x10) /* PC4 = TO output */
+ data = (data & ~0x10) | (m_to & 1 ? 0x10 : 0x00);
+ if (m_mcc & 0x20) /* PC5 = CI input */
+ data = (data & ~0x20) | (m_ci & 1 ? 0x20 : 0x00);
+ if (m_mcc & 0x40) /* PC6 = CO0 output */
+ data = (data & ~0x40) | (m_co0 & 1 ? 0x40 : 0x00);
+ if (m_mcc & 0x80) /* PC7 = CO1 output */
+ data = (data & ~0x80) | (m_co1 & 1 ? 0x80 : 0x00);
+ return data;
+}
+
+uint8_t upd7801_device::read_pc()
+{
+ if ((m_mc & 0x87) && !m_pc_in_cb.isunset()) // NS20031301 no need to read if the port is set as output
+ m_pc_in = m_pc_in_cb(0, 0x84 | (m_mc & 0x03));
+ uint8_t data = (m_pc_in & 0x87) | (m_pc_out & ~0x87);
+ if (!BIT(m_mc, 2)) /* TODO PC2 = -SCS input */
+ data = (data & ~0x04) | 0x04;
+ if (!BIT(m_mc, 7)) /* TODO PC7 = HOLD input */
+ data = (data & ~0x80);
+ return data;
+}
+
void upd7810_device::WP(offs_t port, uint8_t data)
{
switch (port)
@@ -690,24 +736,7 @@ void upd7810_device::WP(offs_t port, uint8_t data)
break;
case UPD7810_PORTC:
m_pc_out = data;
- data = (data & ~m_mc) | (m_pc_pullups & m_mc);
- if (m_mcc & 0x01) /* PC0 = TxD output */
- data = (data & ~0x01) | (m_txd & 1 ? 0x01 : 0x00);
- if (m_mcc & 0x02) /* PC1 = RxD input */
- data = (data & ~0x02) | (m_rxd & 1 ? 0x02 : 0x00);
- if (m_mcc & 0x04) /* PC2 = SCK input/output */
- data = (data & ~0x04) | (m_sck & 1 ? 0x04 : 0x00);
- if (m_mcc & 0x08) /* PC3 = TI/INT2 input */
- data = (data & ~0x08) | (m_int2 & 1 ? 0x08 : 0x00);
- if (m_mcc & 0x10) /* PC4 = TO output */
- data = (data & ~0x10) | (m_to & 1 ? 0x10 : 0x00);
- if (m_mcc & 0x20) /* PC5 = CI input */
- data = (data & ~0x20) | (m_ci & 1 ? 0x20 : 0x00);
- if (m_mcc & 0x40) /* PC6 = CO0 output */
- data = (data & ~0x40) | (m_co0 & 1 ? 0x40 : 0x00);
- if (m_mcc & 0x80) /* PC7 = CO1 output */
- data = (data & ~0x80) | (m_co1 & 1 ? 0x80 : 0x00);
- m_pc_out_cb(data);
+ write_pc(data);
break;
case UPD7810_PORTD:
m_pd_out = data;
@@ -748,6 +777,42 @@ void upd7810_device::WP(offs_t port, uint8_t data)
}
}
+void upd7810_device::write_pc(uint8_t data)
+{
+ data = (data & ~m_mc) | (m_pc_pullups & m_mc);
+ if (m_mcc & 0x01) /* PC0 = TxD output */
+ data = (data & ~0x01) | (m_txd & 1 ? 0x01 : 0x00);
+ if (m_mcc & 0x02) /* PC1 = RxD input */
+ data = (data & ~0x02) | (m_rxd & 1 ? 0x02 : 0x00);
+ if (m_mcc & 0x04) /* PC2 = SCK input/output */
+ data = (data & ~0x04) | (m_sck & 1 ? 0x04 : 0x00);
+ if (m_mcc & 0x08) /* PC3 = TI/INT2 input */
+ data = (data & ~0x08) | (m_int2 & 1 ? 0x08 : 0x00);
+ if (m_mcc & 0x10) /* PC4 = TO output */
+ data = (data & ~0x10) | (m_to & 1 ? 0x10 : 0x00);
+ if (m_mcc & 0x20) /* PC5 = CI input */
+ data = (data & ~0x20) | (m_ci & 1 ? 0x20 : 0x00);
+ if (m_mcc & 0x40) /* PC6 = CO0 output */
+ data = (data & ~0x40) | (m_co0 & 1 ? 0x40 : 0x00);
+ if (m_mcc & 0x80) /* PC7 = CO1 output */
+ data = (data & ~0x80) | (m_co1 & 1 ? 0x80 : 0x00);
+ m_pc_out_cb(data);
+}
+
+void upd7801_device::write_pc(uint8_t data)
+{
+ data = (data & 0x78) | (m_pc_pullups & ~0x78);
+ if (!BIT(m_mc, 3)) /* TODO PC3 = SAK output */
+ data = (data & ~0x08);
+ if (!BIT(m_mc, 4)) /* PC4 = TO output */
+ data = (data & ~0x10) | (m_to & 1 ? 0x10 : 0x00);
+ if (!BIT(m_mc, 5)) /* TODO PC5 = IO/-M input */
+ data = (data & ~0x20);
+ if (!BIT(m_mc, 6)) /* TODO PC6 = HLDA output */
+ data = (data & ~0x40);
+ m_pc_out_cb(data);
+}
+
void upd7810_device::upd7810_take_irq()
{
uint16_t vector = 0;
@@ -1696,6 +1761,9 @@ void upd7810_device::device_start()
{
base_device_start();
+ MM = 8;
+ m_ram_view.select(0);
+
state_add( UPD7810_PC, "PC", m_pc.w.l).formatstr("%04X");
state_add( UPD7810_SP, "SP", m_sp.w.l).formatstr("%04X");
state_add( UPD7810_PSW, "PSW", m_psw).formatstr("%02X");
@@ -1756,6 +1824,31 @@ void upd7810_device::device_start()
state_add( STATE_GENFLAGS, "GENFLAGS", m_psw ).formatstr("%17s").noshow();
}
+void upd7801_device::device_start()
+{
+ base_device_start();
+
+ state_add( UPD7810_PC, "PC", m_pc.w.l).formatstr("%04X");
+ state_add( UPD7810_SP, "SP", m_sp.w.l).formatstr("%04X");
+ state_add( UPD7810_PSW, "PSW", m_psw).formatstr("%02X");
+ state_add( UPD7810_A, "A", m_va.b.l).formatstr("%02X");
+ state_add( UPD7810_V, "V", m_va.b.h).formatstr("%02X");
+ state_add( UPD7810_EA, "EA", m_ea.w.l).formatstr("%04X");
+ state_add( UPD7810_BC, "BC", m_bc.w.l).formatstr("%04X");
+ state_add( UPD7810_DE, "DE", m_de.w.l).formatstr("%04X");
+ state_add( UPD7810_HL, "HL", m_hl.w.l).formatstr("%04X");
+ state_add( UPD7810_CNT0, "CNT0", m_cnt.b.l).formatstr("%02X");
+ state_add( UPD7810_CNT1, "CNT1", m_cnt.b.h).formatstr("%02X");
+ state_add( UPD7810_TM0, "TM0", m_tm.b.l).formatstr("%02X");
+ state_add( UPD7810_TM1, "TM1", m_tm.b.h).formatstr("%02X");
+ state_add( UPD7810_MB, "MB", m_mb).formatstr("%02X");
+ state_add( UPD7810_MKL, "MKL", m_mkl).formatstr("%02X");
+
+ state_add( STATE_GENPC, "GENPC", m_pc.w.l ).formatstr("%04X").noshow();
+ state_add( STATE_GENPCBASE, "CURPC", m_ppc.w.l ).formatstr("%04X").noshow();
+ state_add( STATE_GENFLAGS, "GENFLAGS", m_psw ).formatstr("%17s").noshow();
+}
+
void upd78c05_device::device_start()
{
base_device_start();
@@ -1828,9 +1921,9 @@ void upd7810_device::device_reset()
m_etm.d = 0;
MA = 0xff;
MB = 0xff;
- m_mcc = 0;
+ MCC = 0;
MC = 0xff;
- m_mm = 0;
+ MM &= 8;
MF = 0xff;
m_mt = 0;
TMM = 0xff;
diff --git a/src/devices/cpu/upd7810/upd7810.h b/src/devices/cpu/upd7810/upd7810.h
index 4b6315c1fd7..cdda6dd8077 100644
--- a/src/devices/cpu/upd7810/upd7810.h
+++ b/src/devices/cpu/upd7810/upd7810.h
@@ -86,10 +86,11 @@ public:
void sck_w(int state);
protected:
- void upd_internal_128_ram_map(address_map &map);
- void upd_internal_256_ram_map(address_map &map);
- void upd_internal_4096_rom_128_ram_map(address_map &map);
- void upd_internal_4096_rom_256_ram_map(address_map &map);
+ void upd_internal_128_ram_map(address_map &map) ATTR_COLD;
+ void upd_internal_256_ram_map(address_map &map) ATTR_COLD;
+ void upd_internal_4096_rom_128_ram_map(address_map &map) ATTR_COLD;
+ void upd_internal_4096_rom_256_ram_map(address_map &map) ATTR_COLD;
+ void upd_internal_16k_rom_256_ram_map(address_map &map) ATTR_COLD;
// flags
enum
@@ -136,15 +137,14 @@ protected:
upd7810_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 3 - 1) / 3; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 3); }
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 40; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return true; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -200,6 +200,8 @@ protected:
};
virtual void configure_ops();
+ virtual uint8_t read_pc();
+ virtual void write_pc(uint8_t data);
static const struct opcode_s s_op48[256];
static const struct opcode_s s_op4C[256];
@@ -236,6 +238,7 @@ protected:
static const struct opcode_s s_opXX_78c06[256];
address_space_config m_program_config;
+ memory_view m_ram_view;
PAIR m_ppc; /* previous program counter */
PAIR m_pc; /* program counter */
@@ -1366,6 +1369,30 @@ protected:
};
+class upd7811_device : public upd7810_device
+{
+public:
+ // construction/destruction
+ upd7811_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+class upd78c11_device : public upd78c10_device
+{
+public:
+ // construction/destruction
+ upd78c11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
+class upd78c14_device : public upd78c10_device
+{
+public:
+ // construction/destruction
+ upd78c14_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
class upd7807_device : public upd7810_device
{
public:
@@ -1385,7 +1412,8 @@ public:
upd7801_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
protected:
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
virtual void execute_set_input(int inputnum, int state) override;
@@ -1393,6 +1421,8 @@ protected:
virtual void handle_timers(int cycles) override;
virtual void upd7810_take_irq() override;
virtual void configure_ops() override;
+ virtual uint8_t read_pc() override;
+ virtual void write_pc(uint8_t data) override;
};
@@ -1405,8 +1435,8 @@ public:
protected:
upd78c05_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_map);
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
@@ -1426,6 +1456,9 @@ public:
DECLARE_DEVICE_TYPE(UPD7810, upd7810_device)
DECLARE_DEVICE_TYPE(UPD78C10, upd78c10_device)
+DECLARE_DEVICE_TYPE(UPD7811, upd7811_device)
+DECLARE_DEVICE_TYPE(UPD78C11, upd78c11_device)
+DECLARE_DEVICE_TYPE(UPD78C14, upd78c14_device)
DECLARE_DEVICE_TYPE(UPD7807, upd7807_device)
DECLARE_DEVICE_TYPE(UPD7801, upd7801_device)
DECLARE_DEVICE_TYPE(UPD78C05, upd78c05_device)
diff --git a/src/devices/cpu/upd7810/upd7810_dasm.h b/src/devices/cpu/upd7810/upd7810_dasm.h
index a367ab24a48..7aaf47e8d14 100644
--- a/src/devices/cpu/upd7810/upd7810_dasm.h
+++ b/src/devices/cpu/upd7810/upd7810_dasm.h
@@ -8,8 +8,8 @@
*
*****************************************************************************/
-#ifndef MAME_CPU_UPD7810_UPD7810DASM_H
-#define MAME_CPU_UPD7810_UPD7810DASM_H
+#ifndef MAME_CPU_UPD7810_UPD7810_DASM_H
+#define MAME_CPU_UPD7810_UPD7810_DASM_H
#pragma once
@@ -288,4 +288,4 @@ public:
virtual ~upd78c05_disassembler() = default;
};
-#endif
+#endif // MAME_CPU_UPD7810_UPD7810_DASM_H
diff --git a/src/devices/cpu/upd7810/upd7810_opcodes.cpp b/src/devices/cpu/upd7810/upd7810_opcodes.cpp
index 7df4a498fdc..f9580278be5 100644
--- a/src/devices/cpu/upd7810/upd7810_opcodes.cpp
+++ b/src/devices/cpu/upd7810/upd7810_opcodes.cpp
@@ -309,7 +309,10 @@ void upd7810_device::DIV_A()
A = remainder;
}
else
- EA = 0xffff; /* guess */
+ {
+ A = EAL;
+ EA = 0xffff;
+ }
}
/* 48 3e: 0100 1000 0011 1110 */
@@ -1042,6 +1045,11 @@ void upd7810_device::MOV_TMM_A()
void upd7810_device::MOV_MM_A()
{
MM = A;
+
+ if (BIT(A, 3))
+ m_ram_view.select(0);
+ else
+ m_ram_view.disable();
}
/* 4d d1: 0100 1101 1101 0001 */
@@ -9454,7 +9462,7 @@ void upd7810_device::STM_7801()
upd7810_to_output_change(1);
/* Reload the timer */
- m_ovc0 = 16 * ( TM0 + ( ( TM1 & 0x0f ) << 8 ) );
+ m_ovc0 = 8 * ( TM0 + ( ( TM1 & 0x0f ) << 8 ) );
}
void upd7810_device::MOV_MC_A_7801()
@@ -9469,5 +9477,8 @@ void upd7810_device::MOV_MC_A_7801()
/* PC5 Output IO/-M Output */
/* PC6 Output HLDA Output */
/* PC7 Input HOLD Input */
- MC = 0x84 | ( ( A & 0x02 ) ? 0x02 : 0x00 ) | ( ( A & 0x01 ) ? 0x01 : 0x00 );
+ if (MC == A)
+ return;
+ MC = A;
+ WP(UPD7810_PORTC, m_pc_out);
}
diff --git a/src/devices/cpu/upd7810/upd7811.cpp b/src/devices/cpu/upd7810/upd7811.cpp
deleted file mode 100644
index e5105e4f9b7..00000000000
--- a/src/devices/cpu/upd7810/upd7811.cpp
+++ /dev/null
@@ -1,37 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Juergen Buchmueller
-
-/*
-
- uPD7811 - variant of uPD7810 with internal ROM
-
-*/
-
-#include "emu.h"
-#include "upd7811.h"
-
-/*
- the MODE pins can cause this to work with external ROM instead
- todo: document MODE pins
-
- M0 M1
-
- 0 0 -
- 0 1 -
- 1 0 -
- 1 1 -
-
-*/
-
-DEFINE_DEVICE_TYPE(UPD7811, upd7811_device, "upd7811", "NEC uPD7811")
-DEFINE_DEVICE_TYPE(UPD78C11, upd78c11_device, "upd78c11", "NEC uPD78C11")
-
-upd7811_device::upd7811_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : upd7810_device(mconfig, UPD7811, tag, owner, clock, address_map_constructor(FUNC(upd7811_device::upd_internal_4096_rom_256_ram_map), this))
-{
-}
-
-upd78c11_device::upd78c11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : upd78c10_device(mconfig, UPD78C11, tag, owner, clock, address_map_constructor(FUNC(upd78c11_device::upd_internal_4096_rom_256_ram_map), this))
-{
-}
diff --git a/src/devices/cpu/upd7810/upd7811.h b/src/devices/cpu/upd7810/upd7811.h
deleted file mode 100644
index 2d98f64da5f..00000000000
--- a/src/devices/cpu/upd7810/upd7811.h
+++ /dev/null
@@ -1,28 +0,0 @@
-// license:BSD-3-Clause
-// copyright-holders:Juergen Buchmueller
-
-#ifndef MAME_CPU_UPD7810_UPD7811_H
-#define MAME_CPU_UPD7810_UPD7811_H
-
-#pragma once
-
-#include "upd7810.h"
-
-DECLARE_DEVICE_TYPE(UPD7811, upd7811_device)
-DECLARE_DEVICE_TYPE(UPD78C11, upd78c11_device)
-
-class upd7811_device : public upd7810_device
-{
-public:
- // construction/destruction
- upd7811_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-class upd78c11_device : public upd78c10_device
-{
-public:
- // construction/destruction
- upd78c11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-
-#endif // MAME_CPU_UPD7810_UPD7811_H
diff --git a/src/devices/cpu/upd78k/upd78k0.h b/src/devices/cpu/upd78k/upd78k0.h
index 566dfab340f..d0b5acb506c 100644
--- a/src/devices/cpu/upd78k/upd78k0.h
+++ b/src/devices/cpu/upd78k/upd78k0.h
@@ -36,8 +36,8 @@ protected:
upd78k0_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u16 iram_size, address_map_constructor mem_map, address_map_constructor sfr_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -50,7 +50,7 @@ protected:
private:
// internal memory map
- void iram_map(address_map &map);
+ void iram_map(address_map &map) ATTR_COLD;
// internal helpers
inline u16 register_base() const noexcept;
@@ -97,8 +97,8 @@ protected:
private:
// type-specific internal memory maps
- void mem_map(address_map &map);
- void sfr_map(address_map &map);
+ void mem_map(address_map &map) ATTR_COLD;
+ void sfr_map(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/upd78k/upd78k2.h b/src/devices/cpu/upd78k/upd78k2.h
index c0a8e07b825..48210a28124 100644
--- a/src/devices/cpu/upd78k/upd78k2.h
+++ b/src/devices/cpu/upd78k/upd78k2.h
@@ -35,8 +35,8 @@ protected:
upd78k2_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int iram_bits, address_map_constructor mem_map, address_map_constructor sfr_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -51,7 +51,7 @@ protected:
private:
// internal memory map
- void iram_map(address_map &map);
+ void iram_map(address_map &map) ATTR_COLD;
// internal helpers
inline u8 register_base() const noexcept;
@@ -88,7 +88,7 @@ protected:
private:
// type-specific internal memory maps
- void sfr_map(address_map &map);
+ void sfr_map(address_map &map) ATTR_COLD;
};
// ======================> upd78213_device
@@ -105,8 +105,8 @@ protected:
private:
// type-specific internal memory maps
- void mem_map(address_map &map);
- void sfr_map(address_map &map);
+ void mem_map(address_map &map) ATTR_COLD;
+ void sfr_map(address_map &map) ATTR_COLD;
};
// device type declarations
diff --git a/src/devices/cpu/upd78k/upd78k2d.cpp b/src/devices/cpu/upd78k/upd78k2d.cpp
index 7fcc4bd85a2..45c7fd64342 100644
--- a/src/devices/cpu/upd78k/upd78k2d.cpp
+++ b/src/devices/cpu/upd78k/upd78k2d.cpp
@@ -14,7 +14,7 @@ offs_t upd78k2_disassembler::dasm_01xx(std::ostream &stream, u8 op2, offs_t pc,
if (op2 == 0x05)
{
u8 op3 = opcodes.r8(pc + 2);
- if ((op3 & 0xed) == 0x89)
+ if ((op3 & 0xed) == 0x8c)
{
util::stream_format(stream, "%-8s&[%s]", BIT(op3, 4) ? "ROL4" : "ROR4", BIT(op3, 1) ? "HL" : "DE");
return 3 | SUPPORTED;
@@ -127,7 +127,7 @@ offs_t upd78k2_disassembler::dasm_05xx(std::ostream &stream, u8 op2, offs_t pc,
util::stream_format(stream, "%-8s%s", BIT(op2, 4) ? "CALL" : "BR", s_rp_names[(op2 & 0x06) >> 1]);
return 2 | (BIT(op2, 4) ? STEP_OVER : 0) | SUPPORTED;
}
- else if ((op2 & 0xed) == 0x89)
+ else if ((op2 & 0xed) == 0x8c)
{
util::stream_format(stream, "%-8s[%s]", BIT(op2, 4) ? "ROL4" : "ROR4", BIT(op2, 1) ? "HL" : "DE");
return 2 | SUPPORTED;
diff --git a/src/devices/cpu/upd78k/upd78k3.h b/src/devices/cpu/upd78k/upd78k3.h
index 22867376847..234b427a7d1 100644
--- a/src/devices/cpu/upd78k/upd78k3.h
+++ b/src/devices/cpu/upd78k/upd78k3.h
@@ -42,8 +42,8 @@ protected:
upd78k3_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor sfr_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -60,7 +60,7 @@ protected:
private:
// internal memory map
- void iram_map(address_map &map);
+ void iram_map(address_map &map) ATTR_COLD;
// internal helpers
inline u8 register_base() const noexcept;
@@ -112,8 +112,8 @@ protected:
private:
// type-specific internal memory maps
- void mem_map(address_map &map);
- void sfr_map(address_map &map);
+ void mem_map(address_map &map) ATTR_COLD;
+ void sfr_map(address_map &map) ATTR_COLD;
};
// ======================> upd78310_device
diff --git a/src/devices/cpu/upd78k/upd78k4.h b/src/devices/cpu/upd78k/upd78k4.h
index 435600b563c..edf30005ed9 100644
--- a/src/devices/cpu/upd78k/upd78k4.h
+++ b/src/devices/cpu/upd78k/upd78k4.h
@@ -44,8 +44,8 @@ protected:
upd78k4_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor sfr_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -60,7 +60,7 @@ protected:
private:
// internal memory map
- void iram_map(address_map &map);
+ void iram_map(address_map &map) ATTR_COLD;
// internal helpers
inline u16 register_base() const noexcept;
@@ -100,8 +100,8 @@ protected:
private:
// type-specific internal memory maps
- void mem_map(address_map &map);
- void sfr_map(address_map &map);
+ void mem_map(address_map &map) ATTR_COLD;
+ void sfr_map(address_map &map) ATTR_COLD;
};
// device type declaration
diff --git a/src/devices/cpu/v30mz/v30mz.h b/src/devices/cpu/v30mz/v30mz.h
index f194fba269c..da1612977ff 100644
--- a/src/devices/cpu/v30mz/v30mz.h
+++ b/src/devices/cpu/v30mz/v30mz.h
@@ -1,7 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Wilbert Pol,Bryan McPhail
-#ifndef MAME_CPU_V32MZ_V30MZ_H
-#define MAME_CPU_V32MZ_V30MZ_H
+#ifndef MAME_CPU_V30MZ_V30MZ_H
+#define MAME_CPU_V30MZ_V30MZ_H
#include "cpu/nec/necdasm.h"
@@ -29,13 +29,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 80; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -230,4 +229,4 @@ protected:
uint16_t m_debugger_temp;
};
-#endif // MAME_CPU_V32MZ_V30MZ_H
+#endif // MAME_CPU_V30MZ_V30MZ_H
diff --git a/src/devices/cpu/v60/op12.hxx b/src/devices/cpu/v60/op12.hxx
index 87223ab5020..742a486e564 100644
--- a/src/devices/cpu/v60/op12.hxx
+++ b/src/devices/cpu/v60/op12.hxx
@@ -580,26 +580,17 @@ uint32_t v60_device::opDIVW() /* TRUSTED */
uint32_t v60_device::opDIVX()
{
- uint32_t a, b;
+ int32_t a, b;
int64_t dv;
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
if (m_flag2)
- {
- a = m_reg[m_op2 & 0x1F];
- b = m_reg[(m_op2 & 0x1F) + 1];
- }
+ dv = ((uint64_t)m_reg[(m_op2 & 0x1F) + 1] << 32) | m_reg[m_op2 & 0x1F];
else
- {
- a = m_program->read_dword_unaligned(m_op2);
- b = m_program->read_dword_unaligned(m_op2 + 4);
- }
-
- dv = ((uint64_t)b << 32) | ((uint64_t)a);
+ dv = m_program->read_qword_unaligned(m_op2);
- a = dv / (int64_t)((int32_t)m_op1);
- b = dv % (int64_t)((int32_t)m_op1);
+ a = div_64x32_rem(dv, m_op1, b);
_S = ((a & 0x80000000) != 0);
_Z = (a == 0);
@@ -626,19 +617,11 @@ uint32_t v60_device::opDIVUX()
F12DecodeOperands(&v60_device::ReadAM, 2,&v60_device::ReadAMAddress, 3);
if (m_flag2)
- {
- a = m_reg[m_op2 & 0x1F];
- b = m_reg[(m_op2 & 0x1F) + 1];
- }
+ dv = ((uint64_t)m_reg[(m_op2 & 0x1F) + 1] << 32) | m_reg[m_op2 & 0x1F];
else
- {
- a = m_program->read_dword_unaligned(m_op2);
- b = m_program->read_dword_unaligned(m_op2 + 4);
- }
+ dv = m_program->read_qword_unaligned(m_op2);
- dv = (uint64_t)(((uint64_t)b << 32) | (uint64_t)a);
- a = (uint32_t)(dv / (uint64_t)m_op1);
- b = (uint32_t)(dv % (uint64_t)m_op1);
+ a = divu_64x32_rem(dv, m_op1, b);
_S = ((a & 0x80000000) != 0);
_Z = (a == 0);
@@ -812,31 +795,22 @@ uint32_t v60_device::opLDTASK()
uint32_t v60_device::opMOVD() /* TRUSTED */
{
- uint32_t a, b;
+ uint64_t d;
F12DecodeOperands(&v60_device::ReadAMAddress, 3,&v60_device::ReadAMAddress, 3);
if (m_flag1)
- {
- a = m_reg[m_op1 & 0x1F];
- b = m_reg[(m_op1 & 0x1F) + 1];
- }
+ d = ((uint64_t)m_reg[(m_op1 & 0x1F) + 1] << 32) | m_reg[m_op1 & 0x1F];
else
- {
- a = m_program->read_dword_unaligned(m_op1);
- b = m_program->read_dword_unaligned(m_op1 + 4);
- }
+ d = m_program->read_qword_unaligned(m_op1);
if (m_flag2)
{
- m_reg[m_op2 & 0x1F] = a;
- m_reg[(m_op2 & 0x1F) + 1] = b;
+ m_reg[m_op2 & 0x1F] = (uint32_t)d;
+ m_reg[(m_op2 & 0x1F) + 1] = (uint32_t)(d >> 32);
}
else
- {
- m_program->write_dword_unaligned(m_op2, a);
- m_program->write_dword_unaligned(m_op2 + 4, b);
- }
+ m_program->write_qword_unaligned(m_op2, d);
F12END();
}
@@ -1033,7 +1007,7 @@ uint32_t v60_device::opMULW()
F12LOADOP2WORD();
- tmp = (int32_t)appw * (int64_t)(int32_t)m_op1;
+ tmp = mul_32x32(appw, m_op1);
appw = tmp;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -1087,7 +1061,7 @@ uint32_t v60_device::opMULUW()
F12LOADOP2WORD();
- tmp = (uint64_t)appw * (uint64_t)m_op1;
+ tmp = mulu_32x32(appw, m_op1);
appw = tmp;
_Z = (appw == 0);
_S = ((appw & 0x80000000) != 0);
@@ -1588,15 +1562,7 @@ uint32_t v60_device::opRVBIT()
{
F12DecodeFirstOperand(&v60_device::ReadAM, 0);
- m_modwritevalb =(uint8_t)
- (((m_op1 & (1 << 0)) << 7) |
- ((m_op1 & (1 << 1)) << 5) |
- ((m_op1 & (1 << 2)) << 3) |
- ((m_op1 & (1 << 3)) << 1) |
- ((m_op1 & (1 << 4)) >> 1) |
- ((m_op1 & (1 << 5)) >> 3) |
- ((m_op1 & (1 << 6)) >> 5) |
- ((m_op1 & (1 << 7)) >> 7));
+ m_modwritevalb = bitswap<8>(m_op1, 0, 1, 2, 3, 4, 5, 6, 7);
F12WriteSecondOperand(0);
F12END();
@@ -1606,10 +1572,7 @@ uint32_t v60_device::opRVBYT() /* TRUSTED */
{
F12DecodeFirstOperand(&v60_device::ReadAM, 2);
- m_modwritevalw = ((m_op1 & 0x000000FF) << 24) |
- ((m_op1 & 0x0000FF00) << 8) |
- ((m_op1 & 0x00FF0000) >> 8) |
- ((m_op1 & 0xFF000000) >> 24);
+ m_modwritevalw = swapendian_int32(m_op1);
F12WriteSecondOperand(2);
F12END();
@@ -2329,7 +2292,7 @@ uint32_t v60_device::opMULX()
a = m_program->read_dword_unaligned(m_op2);
}
- res = (int64_t)a * (int64_t)(int32_t)m_op1;
+ res = mul_32x32(a, m_op1);
b = (int32_t)((res >> 32)&0xffffffff);
a = (int32_t)(res & 0xffffffff);
@@ -2343,10 +2306,7 @@ uint32_t v60_device::opMULX()
m_reg[(m_op2 & 0x1F) + 1] = b;
}
else
- {
- m_program->write_dword_unaligned(m_op2, a);
- m_program->write_dword_unaligned(m_op2 + 4, b);
- }
+ m_program->write_qword_unaligned(m_op2, res);
F12END();
}
@@ -2367,7 +2327,7 @@ uint32_t v60_device::opMULUX()
a = m_program->read_dword_unaligned(m_op2);
}
- res = (uint64_t)a * (uint64_t)m_op1;
+ res = mulu_32x32(a, m_op1);
b = (int32_t)((res >> 32)&0xffffffff);
a = (int32_t)(res & 0xffffffff);
@@ -2380,10 +2340,7 @@ uint32_t v60_device::opMULUX()
m_reg[(m_op2 & 0x1F) + 1] = b;
}
else
- {
- m_program->write_dword_unaligned(m_op2, a);
- m_program->write_dword_unaligned(m_op2 + 4, b);
- }
+ m_program->write_qword_unaligned(m_op2, res);
F12END();
}
diff --git a/src/devices/cpu/v60/op2.hxx b/src/devices/cpu/v60/op2.hxx
index c4abd0af06b..8227405ddc2 100644
--- a/src/devices/cpu/v60/op2.hxx
+++ b/src/devices/cpu/v60/op2.hxx
@@ -69,14 +69,22 @@ uint32_t v60_device::opCVTSW()
F2DecodeFirstOperand(&v60_device::ReadAM, 2);
- // Convert to uint32_t
+ // Apply RDI rounding control
val = u2f(m_op1);
- m_modwritevalw = (uint32_t)val;
+ switch (TKCW & 7)
+ {
+ case 0: val = roundf(val); break;
+ case 1: val = floorf(val); break;
+ case 2: val = ceilf(val); break;
+ default: val = truncf(val); break;
+ }
+
+ // Convert to uint32_t
+ m_modwritevalw = (uint32_t)(int64_t)val;
- _OV = 0;
- _CY =(val < 0.0f);
_S = ((m_modwritevalw & 0x80000000) != 0);
- _Z = (val == 0.0f);
+ _OV = (_S && val >= 0.0f) || (!_S && val <= -1.0f);
+ _Z = (m_modwritevalw == 0);
F2WriteSecondOperand(2);
F2END();
@@ -117,7 +125,7 @@ uint32_t v60_device::opABSFS()
appf = u2f(m_op1);
- if(appf < 0)
+ if (appf < 0)
appf = -appf;
_OV = 0;
diff --git a/src/devices/cpu/v60/v60.h b/src/devices/cpu/v60/v60.h
index d617ec1bd56..0f79535a39c 100644
--- a/src/devices/cpu/v60/v60.h
+++ b/src/devices/cpu/v60/v60.h
@@ -92,13 +92,12 @@ protected:
v60_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int databits, int addrbits, uint32_t pir);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
- virtual uint32_t execute_input_lines() const noexcept override { return 1; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -777,7 +776,6 @@ private:
[[noreturn]] uint32_t opUNHANDLED();
void v60_do_irq(int vector);
void v60_try_irq();
-
};
diff --git a/src/devices/cpu/v620/v620dasm.h b/src/devices/cpu/v620/v620dasm.h
index 8c93150cf9b..58be863ba9b 100644
--- a/src/devices/cpu/v620/v620dasm.h
+++ b/src/devices/cpu/v620/v620dasm.h
@@ -1,8 +1,8 @@
// license:BSD-3-Clause
// copyright-holders:AJR
-#ifndef MAME_CPU_V620_V620_H
-#define MAME_CPU_V620_V620_H
+#ifndef MAME_CPU_V620_V620DASM_H
+#define MAME_CPU_V620_V620DASM_H
#pragma once
@@ -51,4 +51,4 @@ protected:
virtual offs_t dasm_io(std::ostream &stream, u16 inst, offs_t pc, const data_buffer &opcodes) const override;
};
-#endif // MAME_CPU_V620_V620_H
+#endif // MAME_CPU_V620_V620DASM_H
diff --git a/src/devices/cpu/v810/v810.h b/src/devices/cpu/v810/v810.h
index 4a56ecf9fb1..29940c6d1e3 100644
--- a/src/devices/cpu/v810/v810.h
+++ b/src/devices/cpu/v810/v810.h
@@ -87,13 +87,12 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 3; }
virtual uint32_t execute_max_cycles() const noexcept override { return 6; }
- virtual uint32_t execute_input_lines() const noexcept override { return 16; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
diff --git a/src/devices/cpu/vax/vax.cpp b/src/devices/cpu/vax/vax.cpp
new file mode 100644
index 00000000000..b2930a55021
--- /dev/null
+++ b/src/devices/cpu/vax/vax.cpp
@@ -0,0 +1,100 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+/***************************************************************************
+
+ DEC VAX CPUs
+
+ Currently these devices are just stubs with no actual execution core.
+
+***************************************************************************/
+
+#include "emu.h"
+#include "vax.h"
+#include "vaxdasm.h"
+
+// device type definitions
+DEFINE_DEVICE_TYPE(KD32A, kd32a_device, "kd32a", "DEC KD32-A MicroVAX I CPU")
+DEFINE_DEVICE_TYPE(DC333, dc333_device, "dc333", "DEC DC333 MicroVAX II CPU")
+DEFINE_DEVICE_TYPE(DC341, dc341_device, "dc341", "DEC DC341 CVAX CPU")
+
+
+vax_cpu_device::vax_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrwidth)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_LITTLE, 32, addrwidth, 0, 32, 9)
+ , m_psl(0)
+ , m_icount(0)
+{
+}
+
+kd32a_device::kd32a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : vax_cpu_device(mconfig, KD32A, tag, owner, clock, 30)
+{
+}
+
+dc333_device::dc333_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : vax_cpu_device(mconfig, DC333, tag, owner, clock, 32)
+{
+}
+
+dc341_device::dc341_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : vax_cpu_device(mconfig, DC341, tag, owner, clock, 32)
+{
+}
+
+std::unique_ptr<util::disasm_interface> vax_cpu_device::create_disassembler()
+{
+ return std::make_unique<vax_disassembler>();
+}
+
+device_memory_interface::space_config_vector vax_cpu_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ };
+}
+
+
+void vax_cpu_device::device_start()
+{
+ address_space &space = this->space(AS_PROGRAM);
+ space.specific(m_program_space);
+ space.cache(m_cache);
+
+ std::fill_n(&m_gpr[0], 16, 0);
+
+ set_icountptr(m_icount);
+
+ state_add(STATE_GENPC, "GENPC", m_gpr[15]).noshow();
+ state_add(STATE_GENPCBASE, "CURPC", m_gpr[15]).noshow();
+ for (int i = 0; i < 12; i++)
+ state_add(VAX_R0 + i, util::string_format("R%d", i).c_str(), m_gpr[i]);
+ state_add(VAX_AP, "AP", m_gpr[12]);
+ state_add(VAX_FP, "FP", m_gpr[13]);
+ state_add(VAX_SP, "SP", m_gpr[14]);
+ state_add(VAX_PC, "PC", m_gpr[15]);
+ state_add(VAX_PSL, "PSL", m_psl);
+
+ save_item(NAME(m_gpr));
+ save_item(NAME(m_psl));
+}
+
+void vax_cpu_device::device_reset()
+{
+ m_gpr[15] = 0;
+ m_psl = 0x041f0000;
+}
+
+void dc341_device::device_reset()
+{
+ vax_cpu_device::device_reset();
+
+ m_gpr[15] = 0x20040000; // 0x20060000 in run mode
+}
+
+
+void vax_cpu_device::execute_run()
+{
+ debugger_instruction_hook(m_gpr[15]);
+
+ m_icount = 0;
+}
diff --git a/src/devices/cpu/vax/vax.h b/src/devices/cpu/vax/vax.h
new file mode 100644
index 00000000000..1d2745e97fa
--- /dev/null
+++ b/src/devices/cpu/vax/vax.h
@@ -0,0 +1,82 @@
+// license:BSD-3-Clause
+// copyright-holders:AJR
+
+#ifndef MAME_CPU_VAX_VAX_H
+#define MAME_CPU_VAX_VAX_H
+
+#pragma once
+
+
+class vax_cpu_device : public cpu_device
+{
+public:
+ enum
+ {
+ VAX_R0, VAX_R1, VAX_R2, VAX_R3,
+ VAX_R4, VAX_R5, VAX_R6, VAX_R7,
+ VAX_R8, VAX_R9, VAX_R10, VAX_R11,
+ VAX_AP, VAX_FP, VAX_SP, VAX_PC,
+ VAX_PSL
+ };
+
+protected:
+ // construction/destruction
+ vax_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int addrwidth);
+
+ // device-level overrides
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_disasm_interface overrides
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ // device_execute_interface overrides
+ virtual void execute_run() override;
+
+ // device_memory_interface overrides
+ virtual space_config_vector memory_space_config() const override;
+
+ // address space
+ address_space_config m_program_config;
+ memory_access<32, 2, 0, ENDIANNESS_LITTLE>::specific m_program_space;
+ memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache m_cache;
+
+ // internal state
+ u32 m_gpr[16];
+ u32 m_psl;
+
+ // execution sequencing
+ s32 m_icount;
+};
+
+class kd32a_device : public vax_cpu_device
+{
+public:
+ // construction/destruction
+ kd32a_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class dc333_device : public vax_cpu_device
+{
+public:
+ // construction/destruction
+ dc333_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+};
+
+class dc341_device : public vax_cpu_device
+{
+public:
+ // construction/destruction
+ dc341_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ // device-level overrides
+ virtual void device_reset() override ATTR_COLD;
+};
+
+
+// device type declarations
+DECLARE_DEVICE_TYPE(KD32A, kd32a_device)
+DECLARE_DEVICE_TYPE(DC333, dc333_device)
+DECLARE_DEVICE_TYPE(DC341, dc341_device)
+
+#endif // MAME_CPU_VAX_VAX_H
diff --git a/src/devices/cpu/vax/vaxdasm.cpp b/src/devices/cpu/vax/vaxdasm.cpp
index 9919e171f14..7e15cd1b953 100644
--- a/src/devices/cpu/vax/vaxdasm.cpp
+++ b/src/devices/cpu/vax/vaxdasm.cpp
@@ -23,37 +23,11 @@ u32 vax_disassembler::opcode_alignment() const
return 1;
}
-enum class vax_disassembler::mode : u8
-{
- none,
- rb, srb, urb, cntb, rw, srw, urw, mskw, rl, srl, url, posl, prl, rq, srq, urq, ro, uro,
- mb, mw, ml, mq, mo,
- wb, ww, wl, wq, wo,
- ab, aw, al, aq, ao,
- bb, bw,
- vb
-};
-
namespace {
using namespace std::literals;
using mode = vax_disassembler::mode;
-static constexpr bool is_read_mode(mode m)
-{
- switch (m)
- {
- case mode::rb: case mode::srb: case mode::urb: case mode::cntb:
- case mode::rw: case mode::srw: case mode::urw: case mode::mskw:
- case mode::rl: case mode::srl: case mode::url: case mode::posl: case mode::prl:
- case mode::rq: case mode::urq:
- case mode::ro: case mode::uro:
- return true;
- default:
- return false;
- }
-}
-
static constexpr bool is_address_mode(mode m)
{
return m == mode::ab || m == mode::aw || m == mode::al || m == mode::aq || m == mode::ao;
@@ -380,12 +354,12 @@ static const vax_disassembler::opdef s_nonprefix_ops[0x100 - 3] =
{ "DIVP"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::rw, mode::ab }, 0 },
{ "MOVC3"sv, { mode::rw, mode::ab, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "CMPC3"sv, { mode::rw, mode::ab, mode::ab, mode::none, mode::none, mode::none }, 0 },
- { "SCANC"sv, { mode::rw, mode::ab, mode::ab, mode::rb, mode::none, mode::none }, 0 },
- { "SPANC"sv, { mode::rw, mode::ab, mode::ab, mode::rb, mode::none, mode::none }, 0 },
- { "MOVC5"sv, { mode::rw, mode::ab, mode::rb, mode::rw, mode::ab, mode::none }, 0 },
- { "CMPC5"sv, { mode::rw, mode::ab, mode::rb, mode::rw, mode::ab, mode::none }, 0 },
- { "MOVTC"sv, { mode::rw, mode::ab, mode::rb, mode::ab, mode::rw, mode::ab }, 0 },
- { "MOVTUC"sv, { mode::rw, mode::ab, mode::rb, mode::ab, mode::rw, mode::ab }, 0 },
+ { "SCANC"sv, { mode::rw, mode::ab, mode::ab, mode::urb, mode::none, mode::none }, 0 },
+ { "SPANC"sv, { mode::rw, mode::ab, mode::ab, mode::urb, mode::none, mode::none }, 0 },
+ { "MOVC5"sv, { mode::rw, mode::ab, mode::urb, mode::rw, mode::ab, mode::none }, 0 },
+ { "CMPC5"sv, { mode::rw, mode::ab, mode::urb, mode::rw, mode::ab, mode::none }, 0 },
+ { "MOVTC"sv, { mode::rw, mode::ab, mode::urb, mode::ab, mode::rw, mode::ab }, 0 },
+ { "MOVTUC"sv, { mode::rw, mode::ab, mode::urb, mode::ab, mode::rw, mode::ab }, 0 },
{ "BSBW"sv, { mode::bw, mode::none, mode::none, mode::none, mode::none, mode::none }, vax_disassembler::STEP_OVER },
{ "BRW"sv, { mode::bw, mode::none, mode::none, mode::none, mode::none, mode::none }, 0 },
@@ -397,8 +371,8 @@ static const vax_disassembler::opdef s_nonprefix_ops[0x100 - 3] =
{ "CMPP4"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::none, mode::none }, 0 },
{ "EDITPC"sv, { mode::rw, mode::ab, mode::ab, mode::ab, mode::none, mode::none }, 0 },
{ "MATCHC"sv, { mode::rw, mode::ab, mode::rw, mode::ab, mode::none, mode::none }, 0 },
- { "LOCC"sv, { mode::rb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
- { "SKPC"sv, { mode::rb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
+ { "LOCC"sv, { mode::urb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
+ { "SKPC"sv, { mode::urb, mode::rw, mode::ab, mode::none, mode::none, mode::none }, 0 },
{ "MOVZWL"sv, { mode::rw, mode::wl, mode::none, mode::none, mode::none, mode::none }, 0 },
{ "ACBW"sv, { mode::srw, mode::srw, mode::mw, mode::bw, mode::none, mode::none }, vax_disassembler::STEP_COND },
{ "MOVAW"sv, { mode::aw, mode::wl, mode::none, mode::none, mode::none, mode::none }, 0 },
@@ -963,6 +937,7 @@ offs_t vax_disassembler::disassemble_inst(std::ostream &stream, const vax_disass
break;
case mode::urb:
+ case mode::ab: // Immediate bytes may be used as MOVCn sources, at least with a length of 0
util::stream_format(stream, "#^X%02X", opcodes.r8(pc++));
break;
@@ -1024,7 +999,7 @@ offs_t vax_disassembler::disassemble_inst(std::ostream &stream, const vax_disass
break;
case mode::ro: case mode::uro:
- util::stream_format(stream, "#^X%016X%016X", opcodes.r64(pc), opcodes.r64(pc + 4));
+ util::stream_format(stream, "#^X%016X%016X", opcodes.r64(pc + 8), opcodes.r64(pc));
pc += 16;
break;
@@ -1118,3 +1093,23 @@ offs_t vax_disassembler::disassemble(std::ostream &stream, offs_t pc, const vax_
else
return disassemble_inst(stream, s_nonprefix_ops[op], pc, ppc, opcodes);
}
+
+bool vax_disassembler::is_read_mode(vax_disassembler::mode m)
+{
+ switch (m)
+ {
+ case mode::rb: case mode::srb: case mode::urb: case mode::cntb:
+ case mode::rw: case mode::srw: case mode::urw: case mode::mskw:
+ case mode::rl: case mode::srl: case mode::url: case mode::posl: case mode::prl:
+ case mode::rq: case mode::urq:
+ case mode::ro: case mode::uro:
+ return true;
+ default:
+ return false;
+ }
+}
+
+const vax_disassembler::mode *vax_disassembler::get_operands(u8 op)
+{
+ return s_nonprefix_ops[op].operand;
+}
diff --git a/src/devices/cpu/vax/vaxdasm.h b/src/devices/cpu/vax/vaxdasm.h
index e5549d4d59f..f219bb1eba6 100644
--- a/src/devices/cpu/vax/vaxdasm.h
+++ b/src/devices/cpu/vax/vaxdasm.h
@@ -9,7 +9,16 @@
class vax_disassembler : public util::disasm_interface
{
public:
- enum class mode : u8;
+ enum class mode : u8
+ {
+ none,
+ rb, srb, urb, cntb, rw, srw, urw, mskw, rl, srl, url, posl, prl, rq, srq, urq, ro, uro,
+ mb, mw, ml, mq, mo,
+ wb, ww, wl, wq, wo,
+ ab, aw, al, aq, ao,
+ bb, bw,
+ vb
+ };
struct opdef
{
@@ -21,6 +30,9 @@ public:
// construction/destruction
vax_disassembler();
+ static bool is_read_mode(mode m);
+ static const mode *get_operands(u8 op);
+
protected:
// disassembler overrides
virtual u32 opcode_alignment() const override;
diff --git a/src/devices/cpu/vt50/vt50.h b/src/devices/cpu/vt50/vt50.h
index fcb7fc1d91c..b4a5e7e8741 100644
--- a/src/devices/cpu/vt50/vt50.h
+++ b/src/devices/cpu/vt50/vt50.h
@@ -42,8 +42,8 @@ protected:
// device_t implementation
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual void execute_run() override;
diff --git a/src/devices/cpu/vt61/vt61.h b/src/devices/cpu/vt61/vt61.h
index 971343fe095..ced1a984fea 100644
--- a/src/devices/cpu/vt61/vt61.h
+++ b/src/devices/cpu/vt61/vt61.h
@@ -31,8 +31,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/we32000/we32100.h b/src/devices/cpu/we32000/we32100.h
index c34afc4279e..cae514319a4 100644
--- a/src/devices/cpu/we32000/we32100.h
+++ b/src/devices/cpu/we32000/we32100.h
@@ -26,8 +26,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
diff --git a/src/devices/cpu/xa/xa.cpp b/src/devices/cpu/xa/xa.cpp
new file mode 100644
index 00000000000..92062ded6c0
--- /dev/null
+++ b/src/devices/cpu/xa/xa.cpp
@@ -0,0 +1,2651 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+/*
+ While advertised as a type of 80c51 (and even referred to as such by the test mode in some IGS titles)
+ this is a distinct architecture. The opcode set does extend on an 80c51, and tools were provided to
+ help convert 80c51 sources to run on the XA architecture, but the encoding is entirely different and
+ there is no binary compatibility.
+
+ https://www.ceibo.com/eng/datasheets/Philips-XA-User-Guide.pdf
+*/
+
+#include "emu.h"
+#include "xa.h"
+#include "xadasm.h"
+
+#define LOG_DEBUG (1U << 1)
+#define VERBOSE (0)
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(XA, xa_cpu, "xa", "Philips 80c51 XA")
+DEFINE_DEVICE_TYPE(MX10EXA, mx10exa_cpu_device, "mx10exa", "Philips MX10EXA")
+
+xa_cpu::xa_cpu(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor prg_map, address_map_constructor dat_map)
+ : cpu_device(mconfig, type, tag, owner, clock)
+ , m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, prg_map)
+ , m_data_config("data", ENDIANNESS_LITTLE, 16, 24, 0, dat_map)
+ , m_sfr_config("sfr", ENDIANNESS_LITTLE, 8, 11, 0, address_map_constructor(FUNC(xa_cpu::sfr_map), this))
+ , m_pc(0)
+ , m_program(nullptr)
+ , m_data(nullptr)
+ , m_sfr(nullptr)
+ , m_icount(0)
+ , m_port_in_cb(*this, 0xff)
+ , m_port_out_cb(*this)
+{
+ add_names(default_names);
+}
+
+xa_cpu::xa_cpu(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : xa_cpu(mconfig, XA, tag, owner, clock, address_map_constructor(FUNC(xa_cpu::internal_map), this), address_map_constructor(FUNC(xa_cpu::internal_data_map), this))
+{
+}
+
+
+mx10exa_cpu_device::mx10exa_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : xa_cpu(mconfig, MX10EXA, tag, owner, clock, address_map_constructor(FUNC(mx10exa_cpu_device::mx10exa_internal_map), this), address_map_constructor(FUNC(mx10exa_cpu_device::mx10exa_internal_data_map), this))
+{
+}
+
+std::unique_ptr<util::disasm_interface> xa_cpu::create_disassembler()
+{
+ return std::make_unique<xa_dasm>();
+}
+
+/*****************************************************************************/
+
+u8 xa_cpu::sfr_port_r(offs_t offset)
+{
+ return m_port_in_cb[offset]();
+}
+
+void xa_cpu::sfr_port_w(offs_t offset, u8 data)
+{
+ m_port_out_cb[offset](data);
+}
+
+u8 xa_cpu::sfr_PxCFGA_r(offs_t offset)
+{
+ return m_PxCFGA[offset];
+}
+
+void xa_cpu::sfr_PxCFGA_w(offs_t offset, u8 data)
+{
+ LOGMASKED(LOG_DEBUG, "P%d CFGA - Port Configuration A write %02x\n", offset, data);
+ m_PxCFGA[offset] = data;
+}
+
+u8 xa_cpu::sfr_PxCFGB_r(offs_t offset)
+{
+ return m_PxCFGB[offset];
+}
+
+void xa_cpu::sfr_PxCFGB_w(offs_t offset, u8 data)
+{
+ LOGMASKED(LOG_DEBUG, "P%d CFGB - Port Configuration B write %02x\n", offset, data);
+ m_PxCFGB[offset] = data;
+}
+
+
+
+void xa_cpu::set_pc_in_current_page(u16 addr)
+{
+ m_pc = addr;
+}
+
+u8 xa_cpu::sfr_WDCON_r()
+{
+ return m_WDCON;
+}
+
+// PSWL C AC - - - V N Z
+u8 xa_cpu::sfr_PSWL_r()
+{
+ u8 ret = m_PSWL & 0x38;
+ if (get_z_flag()) ret |= 0x01;
+ if (get_n_flag()) ret |= 0x02;
+ if (get_v_flag()) ret |= 0x04;
+ if (get_ac_flag()) ret |= 0x40;
+ if (get_c_flag()) ret |= 0x80;
+ LOGMASKED(LOG_DEBUG, "read %02x from PSWL\n", ret);
+ return ret;
+}
+
+void xa_cpu::sfr_PSWL_w(u8 data)
+{
+ LOGMASKED(LOG_DEBUG, "write %02x to PSWL\n", data);
+ m_PSWL = data;
+ if (data & 0x01) set_z_flag(); else clear_z_flag();
+ if (data & 0x02) set_n_flag(); else clear_n_flag();
+ if (data & 0x04) set_v_flag(); else clear_v_flag();
+ if (data & 0x40) set_ac_flag(); else clear_ac_flag();
+ if (data & 0x80) set_c_flag(); else clear_c_flag();
+}
+
+u8 xa_cpu::sfr_PSWH_r()
+{
+ u8 ret = m_PSWH;
+ LOGMASKED(LOG_DEBUG, "read %02x from PSWH\n", ret);
+ return m_PSWH;
+}
+
+void xa_cpu::sfr_PSWH_w(u8 data)
+{
+ // PSWH SM TM RS1 RS0 IM3 IM2 IM1 IM0
+ LOGMASKED(LOG_DEBUG, "write %02x to PSWH\n", data);
+ m_PSWH = data;
+
+ if (m_PSWH & 0x80)
+ m_usermode = false;
+ else
+ m_usermode = true;
+
+ m_regbank = (m_PSWH & 0x30) >> 4;
+
+}
+
+void xa_cpu::sfr_PSW51_w(u8 data)
+{
+ // PSW51 C AC F0 RS1 RS0 OV F1 P
+
+}
+
+u8 xa_cpu::sfr_IEL_r()
+{
+ return m_IEL;
+}
+
+void xa_cpu::sfr_IEL_w(u8 data)
+{
+ m_IEL = data;
+ LOGMASKED(LOG_DEBUG, "write to m_IEL %02x\n", data);
+}
+
+void xa_cpu::sfr_SCR_w(u8 data)
+{
+ /* System Configuration Register (SCR)
+
+ ---- PPCZ
+
+ PP = PT0/1: Peripheral timer multiplier
+ C = CM: 80c51 Compatibility Mode (registers appear in data memory, indirect addressing behavior changed)
+ Z = Page Zero / Small Memory mode (only 16-bits of address are pushed / pulled from stack, faster timing on those ops)
+
+ */
+
+ LOGMASKED(LOG_DEBUG, "write %02x to SCR\n", data);
+ m_SCR = data;
+ m_pagezeromode = (data & 1);
+}
+
+void xa_cpu::sfr_WFEED1_w(u8 data)
+{
+ LOGMASKED(LOG_DEBUG, "write %02x to WFEED1\n", data);
+}
+
+void xa_cpu::sfr_WFEED2_w(u8 data)
+{
+ LOGMASKED(LOG_DEBUG, "write %02x to WFEED2\n", data);
+}
+
+/*****************************************************************************/
+
+void xa_cpu::data_map(address_map &map)
+{
+}
+
+void xa_cpu::sfr_map(address_map &map)
+{
+ map(0x000, 0x000).rw(FUNC(xa_cpu::sfr_PSWL_r), FUNC(xa_cpu::sfr_PSWL_w));
+ map(0x001, 0x001).rw(FUNC(xa_cpu::sfr_PSWH_r), FUNC(xa_cpu::sfr_PSWH_w));
+ map(0x002, 0x002).w(FUNC(xa_cpu::sfr_PSW51_w));
+
+ //0x003, "SSEL"
+ //0x004, "PCON"
+ //0x010, "TCON"
+ //0x011, "TSTAT"
+ //0x018, "T2CON"
+ //0x019, "T2MOD"
+
+ map(0x01f, 0x01f).r(FUNC(xa_cpu::sfr_WDCON_r));
+
+ //0x020, "S0CON"
+ //0x021, "S0STAT"
+ //0x024, "S1CON"
+ //0x025, "S1STAT"
+
+ map(0x026, 0x026).rw(FUNC(xa_cpu::sfr_IEL_r), FUNC(xa_cpu::sfr_IEL_w));
+
+ //0x027, "IEH"
+ //0x02A, "SWR"
+
+ map(0x030, 0x033).rw(FUNC(xa_cpu::sfr_port_r), FUNC(xa_cpu::sfr_port_w));
+
+ map(0x040, 0x040).w(FUNC(xa_cpu::sfr_SCR_w));
+
+ //0x041, "DS"
+ //0x042, "ES"
+ //0x043, "CS"
+
+ //0x050, "TL0"
+ //0x051, "TH0"
+ //0x052, "TL1"
+ //0x053, "TH1"
+ //0x054, "RTL0"
+ //0x055, "RTH0"
+ //0x056, "RTL1"
+ //0x057, "RTH1"
+ //0x058, "TL2"
+ //0x059, "TH2"
+ //0x05A, "T2CAPL"
+ //0x05B, "T2CAPH"
+ //0x05C, "TMOD"
+
+ map(0x05d, 0x05d).w(FUNC(xa_cpu::sfr_WFEED1_w));
+ map(0x05e, 0x05e).w(FUNC(xa_cpu::sfr_WFEED2_w));
+
+ //0x05F, "WDL"
+ //0x060, "S0BUF"
+ //0x061, "S0ADDR"
+ //0x062, "S0ADEN"
+ //0x064, "S1BUF"
+ //0x065, "S1ADDR"
+ //0x066, "S1ADEN"
+ //0x068, "BTRL"
+ //0x069, "BTRH"
+ //0x06A, "BCR"
+
+ map(0x070, 0x073).rw(FUNC(xa_cpu::sfr_PxCFGA_r), FUNC(xa_cpu::sfr_PxCFGA_w));
+
+ //0x07A, "SWE"
+ //0x0A0, "IPA0"
+ //0x0A1, "IPA1"
+ //0x0A2, "IPA2"
+ //0x0A3, "IPA3"
+ //0x0A4, "IPA4"
+ //0x0A5, "IPA5"
+
+ map(0x0f0, 0x0f3).rw(FUNC(xa_cpu::sfr_PxCFGB_r), FUNC(xa_cpu::sfr_PxCFGB_w));
+}
+
+void xa_cpu::internal_map(address_map &map)
+{
+}
+
+void mx10exa_cpu_device::mx10exa_internal_map(address_map &map)
+{
+ map(0x000000, 0x00ffff).rom();
+}
+
+void xa_cpu::internal_data_map(address_map &map)
+{
+}
+
+void mx10exa_cpu_device::mx10exa_internal_data_map(address_map &map)
+{
+ map(0x000000, 0x0007ff).ram();
+}
+
+
+
+device_memory_interface::space_config_vector xa_cpu::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(AS_PROGRAM, &m_program_config),
+ std::make_pair(AS_DATA, &m_data_config),
+ std::make_pair(AS_IO, &m_sfr_config)
+ };
+}
+
+/*****************************************************************************/
+
+const xa_cpu::op_func xa_cpu::s_instruction[256] =
+{
+// group 0
+&xa_cpu::e_nop, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_push_rlist,
+&xa_cpu::e_bitgroup, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_add, &xa_cpu::e_push_rlist,
+// group 1
+&xa_cpu::e_illegal, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_pushu_rlist,
+&xa_cpu::e_illegal, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_addc, &xa_cpu::e_pushu_rlist,
+// group 2
+&xa_cpu::e_illegal, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_pop_rlist,
+&xa_cpu::e_illegal, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_sub, &xa_cpu::e_pop_rlist,
+// group 3
+&xa_cpu::e_illegal, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_popu_rlist,
+&xa_cpu::e_illegal, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_subb, &xa_cpu::e_popu_rlist,
+// group 4
+&xa_cpu::e_lea_offset8, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_push_rlist,
+&xa_cpu::e_lea_offset16, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_cmp, &xa_cpu::e_push_rlist,
+// group 5
+&xa_cpu::e_xch_type1, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_pushu_rlist,
+&xa_cpu::e_xch_type1, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_and, &xa_cpu::e_pushu_rlist,
+// group 6
+&xa_cpu::e_xch_type2, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_pop_rlist,
+&xa_cpu::e_xch_type2, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_or, &xa_cpu::e_pop_rlist,
+// group 7
+&xa_cpu::e_illegal, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_popu_rlist,
+&xa_cpu::e_illegal, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_xor, &xa_cpu::e_popu_rlist,
+// group 8
+&xa_cpu::e_movc_rd_rsinc,&xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_pushpop_djnz_subgroup,
+&xa_cpu::e_movc_rd_rsinc,&xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_mov, &xa_cpu::e_pushpop_djnz_subgroup,
+// group 9
+&xa_cpu::e_g9_subgroup, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_jb_mov_subgroup,
+&xa_cpu::e_g9_subgroup, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_alu, &xa_cpu::e_jb_mov_subgroup,
+// group a
+&xa_cpu::e_movdir, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_movx_subgroup,
+&xa_cpu::e_movdir, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_adds, &xa_cpu::e_movx_subgroup,
+// group b
+&xa_cpu::e_rr, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_rrc,
+&xa_cpu::e_rr, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_movs, &xa_cpu::e_rrc,
+// group c
+&xa_cpu::e_lsr_fc, &xa_cpu::e_asl_c, &xa_cpu::e_asr_c, &xa_cpu::e_norm, &xa_cpu::e_lsr_fc, &xa_cpu::e_asl_c, &xa_cpu::e_asr_c, &xa_cpu::e_norm,
+&xa_cpu::e_lsr_fc, &xa_cpu::e_asl_c, &xa_cpu::e_asr_c, &xa_cpu::e_norm, &xa_cpu::e_lsr_fc, &xa_cpu::e_asl_c, &xa_cpu::e_asr_c, &xa_cpu::e_norm,
+// group d
+&xa_cpu::e_lsr_fj, &xa_cpu::e_asl_j, &xa_cpu::e_asr_j, &xa_cpu::e_rl, &xa_cpu::e_lsr_fj, &xa_cpu::e_asl_j, &xa_cpu::e_asr_j, &xa_cpu::e_rlc,
+&xa_cpu::e_lsr_fj, &xa_cpu::e_asl_j, &xa_cpu::e_asr_j, &xa_cpu::e_rl, &xa_cpu::e_lsr_fj, &xa_cpu::e_asl_j, &xa_cpu::e_asr_j, &xa_cpu::e_rlc,
+// group e
+&xa_cpu::e_mulu_b, &xa_cpu::e_divu_b, &xa_cpu::e_djnz_cjne, &xa_cpu::e_cjne_d8, &xa_cpu::e_mulu_w, &xa_cpu::e_divu_w, &xa_cpu::e_mul_w, &xa_cpu::e_div_w,
+&xa_cpu::e_div_data8, &xa_cpu::e_div_d16, &xa_cpu::e_djnz_cjne, &xa_cpu::e_cjne_d16, &xa_cpu::e_jz_rel8, &xa_cpu::e_divu_d, &xa_cpu::e_jnz_rel8, &xa_cpu::e_div_d,
+// group f
+&xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch,
+&xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_branch, &xa_cpu::e_bkpt,
+};
+
+// SFR names
+const xa_cpu::mem_info xa_cpu::default_names[] = {
+ // the following are bit addressable
+ { 0x400, "PSWL" },
+ { 0x401, "PSWH" },
+ { 0x402, "PSW51" },
+ { 0x403, "SSEL" },
+ { 0x404, "PCON" },
+ { 0x410, "TCON" },
+ { 0x411, "TSTAT" },
+ { 0x418, "T2CON" },
+ { 0x419, "T2MOD" },
+ { 0x41F, "WDCON" },
+ { 0x420, "S0CON" },
+ { 0x421, "S0STAT" },
+ { 0x424, "S1CON" },
+ { 0x425, "S1STAT" },
+ { 0x426, "IEL" },
+ { 0x427, "IEH" },
+ { 0x42A, "SWR" },
+ { 0x430, "P0" },
+ { 0x431, "P1" },
+ { 0x432, "P2" },
+ { 0x433, "P3" },
+ { 0x440, "SCR" },
+ { 0x441, "DS" },
+ { 0x442, "ES" },
+ { 0x443, "CS" },
+ { 0x450, "TL0" },
+ { 0x451, "TH0" },
+ { 0x452, "TL1" },
+ { 0x453, "TH1" },
+ { 0x454, "RTL0" },
+ { 0x455, "RTH0" },
+ { 0x456, "RTL1" },
+ { 0x457, "RTH1" },
+ { 0x458, "TL2" },
+ { 0x459, "TH2" },
+ { 0x45A, "T2CAPL" },
+ { 0x45B, "T2CAPH" },
+ { 0x45C, "TMOD" },
+ { 0x45D, "WFEED1" },
+ { 0x45E, "WFEED2" },
+ { 0x45F, "WDL" },
+ { 0x460, "S0BUF" },
+ { 0x461, "S0ADDR" },
+ { 0x462, "S0ADEN" },
+ { 0x464, "S1BUF" },
+ { 0x465, "S1ADDR" },
+ { 0x466, "S1ADEN" },
+ { 0x468, "BTRL" },
+ { 0x469, "BTRH" },
+ { 0x46A, "BCR" },
+ { 0x470, "P0CFGA" },
+ { 0x471, "P1CFGA" },
+ { 0x472, "P2CFGA" },
+ { 0x473, "P3CFGA" },
+ { 0x47A, "SWE" },
+ { 0x4A0, "IPA0" },
+ { 0x4A1, "IPA1" },
+ { 0x4A2, "IPA2" },
+ { 0x4A3, "IPA3" },
+ { 0x4A4, "IPA4" },
+ { 0x4A5, "IPA5" },
+ { 0x4F0, "P0CFGB" },
+ { 0x4F1, "P1CFGB" },
+ { 0x4F2, "P2CFGB" },
+ { 0x4F3, "P3CFGB" },
+ { -1 }
+};
+
+void xa_cpu::add_names(const mem_info *info)
+{
+ for(unsigned int i=0; info[i].addr >= 0; i++)
+ m_names[info[i].addr] = info[i].name;
+}
+
+u16 xa_cpu::expand_rel16(u16 rel16)
+{
+ int address = m_pc + ((s16)rel16) * 2;
+ address &= ~1; // must be word aligned
+ return address;
+}
+
+u16 xa_cpu::expand_rel8(u8 rel8)
+{
+ int address = m_pc + ((s8)rel8) * 2;
+ address &= ~1; // must be word aligned
+ return address;
+}
+
+
+void xa_cpu::do_nz_flags_16(u16 data)
+{
+ if (data & 0x8000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ if (data == 0x0000)
+ set_z_flag();
+ else
+ clear_z_flag();
+}
+
+
+void xa_cpu::do_nz_flags_8(u8 data)
+{
+ if (data & 0x80)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ if (data == 0x00)
+ set_z_flag();
+ else
+ clear_z_flag();
+}
+
+void xa_cpu::push_word_to_user_stack(u16 data)
+{
+ // should use the segment register as well!
+ m_USP -= 2;
+ m_data->write_word(m_USP, data);
+}
+
+void xa_cpu::push_word_to_system_stack(u16 data)
+{
+ m_SSP -= 2;
+ m_data->write_word(m_SSP, data);
+}
+
+void xa_cpu::push_word_to_stack(u16 data)
+{
+ if (m_usermode)
+ {
+ push_word_to_user_stack(data);
+ }
+ else
+ {
+ push_word_to_system_stack(data);
+ }
+}
+
+u16 xa_cpu::pull_word_from_user_stack()
+{
+ // should use the segment register as well!
+ u16 data = m_data->read_word(m_USP);
+ m_USP += 2;
+ return data;
+}
+
+u16 xa_cpu::pull_word_from_system_stack()
+{
+ u16 data = m_data->read_word(m_SSP);
+ m_SSP += 2;
+ return data;
+}
+
+
+u16 xa_cpu::pull_word_from_stack()
+{
+ if (m_usermode)
+ {
+ return pull_word_from_user_stack();
+ }
+ else
+ {
+ return pull_word_from_system_stack();
+ }
+}
+
+void xa_cpu::push_byte_to_user_stack(u8 data)
+{
+ // should use the segment register as well!
+ m_USP -= 2;
+ m_data->write_byte(m_USP, data);
+}
+
+void xa_cpu::push_byte_to_system_stack(u8 data)
+{
+ m_SSP -= 2;
+ m_data->write_byte(m_SSP, data);
+}
+
+void xa_cpu::push_byte_to_stack(u16 data)
+{
+ if (m_usermode)
+ {
+ push_byte_to_user_stack(data);
+ }
+ else
+ {
+ push_byte_to_system_stack(data);
+ }
+}
+
+u8 xa_cpu::pull_byte_from_user_stack()
+{
+ // should use the segment register as well!
+ u8 data = m_data->read_byte(m_USP);
+ m_USP += 2;
+ return data;
+}
+
+u8 xa_cpu::pull_byte_from_system_stack()
+{
+ u8 data = m_data->read_byte(m_SSP);
+ m_SSP += 2;
+ return data;
+}
+
+u8 xa_cpu::pull_byte_from_stack()
+{
+ if (m_usermode)
+ {
+ return pull_byte_from_user_stack();
+ }
+ else
+ {
+ return pull_byte_from_system_stack();
+ }
+}
+
+
+u8 xa_cpu::gr8(int reg)
+{
+ int high = reg & 1;
+
+ reg >>= 1;
+
+ if (reg < 4)
+ {
+ // banked regs
+ int regbank = m_regbank;
+
+ if (high)
+ return (m_regs[(regbank * 4) + reg] & 0xff00) >> 8;
+ else
+ return (m_regs[(regbank * 4) + reg] & 0x00ff) >> 0;
+ }
+ else
+ {
+ if (reg == 7)
+ {
+ fatalerror("gr8 on register R7\n");
+ return 0;
+ }
+
+ reg -= 4;
+ if (high)
+ return (m_regs[(4 * 4) + reg] & 0xff00) >> 8;
+ else
+ return (m_regs[(4 * 4) + reg] & 0x00ff) >> 0;
+ }
+}
+
+void xa_cpu::sr8(int reg, u8 data)
+{
+ int high = reg & 1;
+
+ reg >>= 1;
+
+ if (reg < 4)
+ {
+ // banked regs
+ int regbank = m_regbank;
+
+ if (high)
+ m_regs[(regbank * 4) + reg] = (m_regs[(regbank * 4) + reg] & 0x00ff) | (data << 8);
+ else
+ m_regs[(regbank * 4) + reg] = (m_regs[(regbank * 4) + reg] & 0xff00) | (data << 0);
+ }
+ else
+ {
+ if (reg == 7)
+ {
+ fatalerror("sr8 on register R7\n");
+ }
+
+ reg -= 4;
+ if (high)
+ m_regs[(4 * 4) + reg] = (m_regs[(4 * 4) + reg] & 0x00ff) | (data << 8);
+ else
+ m_regs[(4 * 4) + reg] = (m_regs[(4 * 4) + reg] & 0xff00) | (data << 0);
+ }
+}
+
+
+void xa_cpu::sr16(int reg, u16 data)
+{
+ if (reg < 4)
+ {
+ // banked regs
+ int regbank = m_regbank;
+ m_regs[(regbank * 4) + reg] = data;
+
+ }
+ else if (reg < 8)
+ {
+ if (reg == 7)
+ {
+ // R7 is the stack pointer, which switches between USP and SSP depending on mode
+ if (m_usermode)
+ m_USP = data;
+ else
+ m_SSP = data;
+
+ return;
+ }
+
+ // do we need to calculate parity bit (in PSW51) on all R4 writes (as R4 as backwards compatibility with accumulator)
+ // or only when the backwards compatible instructions are used? (for now, simply ignore it)
+ reg -= 4;
+ m_regs[(4 * 4) + reg] = data;
+ }
+ else
+ {
+ fatalerror("sr16 with reg %d val = %04x\n", reg, data);
+ }
+}
+
+u16 xa_cpu::gr16(int reg)
+{
+ if (reg < 4)
+ {
+ // banked regs
+ int regbank = m_regbank;
+ return m_regs[(regbank * 4) + reg];
+
+ }
+ else if (reg < 8)
+ {
+ if (reg == 7)
+ {
+ // R7 is the stack pointer, which switches between USP and SSP depending on mode
+ if (m_usermode)
+ return m_USP;
+ else
+ return m_SSP;
+ }
+
+ // do we need to calculate parity bit (in PSW51) on all R4 writes (as R4 as backwards compatibility with accumulator)
+ // or only when the backwards compatible instructions are used? (for now, simply ignore it)
+ reg -= 4;
+ return m_regs[(4 * 4) + reg];
+ }
+ else
+ {
+ fatalerror("gr16 with reg %d\n", reg);
+ return 0;
+ }
+}
+
+void xa_cpu::wdat8(int address, u8 data)
+{
+ m_data->write_byte(address, data);
+}
+
+void xa_cpu::wdat16(int address, u16 data)
+{
+ if (address & 1)
+ fatalerror("unaligned in wdat16\n");
+
+ m_data->write_word(address, data);
+}
+
+
+u8 xa_cpu::rdat8(int address)
+{
+ return m_data->read_byte(address);
+}
+
+u16 xa_cpu::rdat16(int address)
+{
+ if (address & 1)
+ fatalerror("unaligned in rdat16\n");
+
+ return m_data->read_word(address);
+}
+
+
+
+void xa_cpu::write_direct16(u16 addr, u16 data)
+{
+ if (addr < 0x400)
+ {
+ if (addr & 1)
+ fatalerror("write_direct16 (odd address) %04x %04x\n", addr, data);
+
+ m_data->write_word(addr, data);
+ }
+ else
+ {
+ fatalerror("write_direct16 (SFR) %04x %04x\n", addr, data);
+ }
+}
+
+void xa_cpu::write_direct8(u16 addr, u8 data)
+{
+ if (addr < 0x400)
+ {
+ m_data->write_byte(addr, data);
+ }
+ else
+ {
+ m_sfr->write_byte(addr - 0x400, data);
+ }
+}
+
+u16 xa_cpu::read_direct16(u16 addr)
+{
+ if (addr < 0x400)
+ {
+ return m_data->read_word(addr);
+ }
+ else
+ {
+ fatalerror("read_direct16 on sfr %03x\n", addr);
+ return 0;
+ }
+ return 0;
+}
+
+u8 xa_cpu::read_direct8(u16 addr)
+{
+ if (addr < 0x400)
+ {
+ return m_data->read_byte(addr);
+ }
+ else
+ {
+ return m_sfr->read_byte(addr - 0x400);
+ }
+ return 0;
+}
+
+std::string xa_cpu::get_data_address(u16 arg) const
+{
+ auto i = m_names.find(arg);
+ if (i == m_names.end())
+ return util::string_format("unk_SFR_%03X", arg);
+ else
+ return i->second;
+}
+
+std::string xa_cpu::get_bittext(int bit)
+{
+ int position = bit & 7;
+
+ if (bit < 0x100)
+ {
+ int reg = ((bit & 0x1ff) >> 3);
+
+ if (reg < 16)
+ return util::string_format("%s.%d", m_regnames8[reg], position);
+ else
+ return util::string_format("ill_REG_%02x.%d", reg, position);
+ }
+ else if (bit < 0x200)
+ {
+ int addr = ((bit & 0x1ff) >> 3) + 0x20;
+ return util::string_format("$%02x.%d", addr, position);
+ }
+
+ int sfr = ((bit & 0x1ff) >> 3) + 0x400;
+ return util::string_format("%s.%d", get_data_address(sfr), position);
+}
+
+std::string xa_cpu::get_directtext(int direct)
+{
+ if (direct < 0x400)
+ {
+ return util::string_format("$%03x", direct);
+ }
+
+ return util::string_format("%s", get_data_address(direct));
+}
+
+void xa_cpu::e_illegal(u8 op)
+{
+ fatalerror( "illegal");
+}
+
+void xa_cpu::handle_shift(u8 op, int shift_type)
+{
+ int size = (op & 0x0c) >> 2;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ u8 data, rd;
+ if (size == 0x03)
+ {
+ data = op2 & 0x1f;
+ rd = (op2 & 0xe0) >> 4;
+ }
+ else
+ {
+ data = op2 & 0x0f;
+ rd = (op2 & 0xf0) >> 4;
+ }
+
+ // size == 1 has already been filtered out by the time we get here
+ switch (shift_type)
+ {
+ case 0x0:
+ {
+ if (size == 0) asl_byte_rd_imm4(rd, data);
+ else if (size == 2) asl_word_rd_imm4(rd, data);
+ else if (size == 3) asl_dword_rd_imm5(rd, data);
+ break;
+ }
+ case 0x1:
+ {
+ if (size == 0) asr_byte_rd_imm4(rd, data);
+ else if (size == 2) asr_word_rd_imm4(rd, data);
+ else if (size == 3) asr_dword_rd_imm5(rd, data);
+ break;
+ }
+ case 0x2:
+ {
+ if (size == 0) lsr_byte_rd_imm4(rd, data);
+ else if (size == 2) lsr_word_rd_imm4(rd, data);
+ else if (size == 3) lsr_dword_rd_imm5(rd, data);
+ break;
+ }
+ }
+}
+
+
+void xa_cpu::handle_alu_type0(u8 op, int alu_op)
+{
+ const int size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+
+ switch (op & 0x07)
+ {
+ case 0x01:
+ {
+ const u8 rs = (op2 & 0x0f);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rd_rs(alu_op, rd, rs); } else { aluop_byte_rd_rs(alu_op, rd, rs); }
+ break;
+ }
+
+ case 0x02:
+ {
+ const int optype = op2 & 0x08;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rd_indrs(alu_op, rd, rs); } else { aluop_byte_rd_indrs(alu_op, rd, rs); }
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_indrd_rs(alu_op, rd, rs); } else { aluop_byte_indrd_rs(alu_op, rd, rs); }
+ }
+ break;
+ }
+
+ case 0x03:
+ {
+ const int optype = op2 & 0x08;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rd_indrsinc(alu_op, rd, rs); } else { aluop_byte_rd_indrsinc(alu_op, rd, rs); }
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_indrdinc_rs(alu_op, rd, rs); } else { aluop_byte_indrdinc_rs(alu_op, rd, rs); }
+ }
+ break;
+ }
+
+ case 0x04:
+ {
+ const int optype = op2 & 0x08;
+ const u8 offset8 = m_program->read_byte(m_pc++);
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rd_rsoff8(alu_op, rd, rs, offset8); } else { aluop_byte_rd_rsoff8(alu_op, rd, rs, offset8); }
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rdoff8_rs(alu_op, rd, offset8, rs); } else { aluop_byte_rdoff8_rs(alu_op, rd, offset8, rs); }
+ }
+ break;
+ }
+
+ case 0x05:
+ {
+ const int optype = op2 & 0x08;
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const int offset16 = (op3 << 8) | op4;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rsoff16(alu_op, rd, rs, offset16); } else { aluop_byte_rsoff16(alu_op, rd, rs, offset16); }
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rdoff16_rs(alu_op, rd, offset16, rs); } else { aluop_byte_rdoff16_rs(alu_op, rd, offset16, rs); }
+ }
+ break;
+ }
+
+ case 0x06:
+ {
+ const int optype = op2 & 0x08;
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+ if (!optype)
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_rd_direct(alu_op, rd, direct); } else { aluop_byte_rd_direct(alu_op, rd, direct); }
+ }
+ else
+ {
+ const u8 rs = (op2 & 0xf0) >> 4;
+ if (size) { aluop_word_direct_rs(alu_op, direct, rs); } else { aluop_byte_direct_rs(alu_op, direct, rs); }
+ }
+ break;
+ }
+
+ }
+}
+
+
+
+void xa_cpu::handle_alu_type1(u8 op, u8 op2)
+{
+ int alu_op = op2 & 0x0f;
+ switch (op & 0x0f)
+ {
+ case 0x01: // ALUOP.b Rd, data8
+ {
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ aluop_byte_rd_data8(alu_op, rd, data8);
+ break;
+ }
+
+ case 0x02: // ALUOP.b [Rd], data8
+ {
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ aluop_byte_indrd_data8(alu_op, rd, data8);
+ break;
+ }
+
+ case 0x03: // ALUOP.b [Rd+], data8
+ {
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ aluop_byte_indrdinc_data8(alu_op, rd, data8);
+ break;
+ }
+
+ case 0x04: // ALUOP.b [Rd+offs8], data8
+ {
+ const u8 offset8 = m_program->read_byte(m_pc++);
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ aluop_byte_rdoff8_data8(alu_op, rd, offset8, data8);
+ break;
+ }
+
+ case 0x05: // ALUOP.b [Rd+offs16], data8
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 offset16 = (op3 << 8) | op4;
+ aluop_byte_rdoff16_data8(alu_op, rd, offset16, data8);
+ break;
+ }
+
+ case 0x06: // ALUOP.b DIRECT, data8
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u16 direct = ((op2 & 0xf0) << 4) | op3;
+ aluop_byte_direct_data8(alu_op, direct, data8);
+ break;
+ }
+
+ case 0x09: // ALUOP.w Rd, data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data16 = (op3 << 8) | op4;
+ aluop_byte_rd_data16(alu_op, rd, data16);
+ break;
+ }
+
+ case 0x0a: // ALUOP.w [Rd], data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data16 = (op3 << 8) | op4;
+ aluop_byte_indrd_data16(alu_op, rd, data16);
+ break;
+ }
+
+ case 0x0b: // ALUOP.w [Rd+], data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data16 = (op3 << 8) | op4;
+ aluop_byte_indrdinc_data16(alu_op, rd, data16);
+ break;
+ }
+
+ case 0x0c: // ALPOP.w [Rd+offs8], data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 op5 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const int offset8 = op3;
+ const u16 data16 = (op4 << 8) | op5;
+ aluop_byte_rdoff8_data16(alu_op, rd, offset8, data16);
+ break;
+ }
+
+ case 0x0d: // ALUOP.w [Rd+offs16], data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 op5 = m_program->read_byte(m_pc++);
+ const u8 op6 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const int offset16= (op3 << 8) | op4;
+ const u16 data16 = (op5 << 8) | op6;
+ aluop_byte_rdoff16_data16(alu_op, rd, offset16, data16);
+ break;
+ }
+
+ case 0x0e: // ALUOP.w DIRECT, data16
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 op5 = m_program->read_byte(m_pc++);
+ const u16 direct =( (op2 & 0xf0) << 4) | op3;
+ const u16 data16 = (op4 << 8) | op5;
+ aluop_byte_direct_data16(alu_op, direct, data16);
+ break;
+ }
+ }
+}
+
+std::string xa_cpu::show_expanded_data4(u16 data4, int size)
+{
+ u16 extended = util::sext(data4, 4);
+
+ if (!size)
+ {
+ extended &= 0xff;
+ return util::string_format("#$%02x", extended);
+ }
+
+ return util::string_format("#$%04x", extended);
+}
+
+void xa_cpu::handle_adds_movs(u8 op, int which)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u16 data4 = op2 & 0x0f;
+
+ switch (op & 0x07)
+ {
+ case 0x01:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ if (which) { if (size) { movs_word_rd_data4(rd, data4); } else { movs_byte_rd_data4(rd, data4); } }
+ else { if (size) { adds_word_rd_data4(rd, data4); } else { adds_byte_rd_data4(rd, data4); } }
+ break;
+ }
+ case 0x02:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ if (which == 1) { if (size) { movs_word_indrd_data4(rd, data4); } else { movs_byte_indrd_data4(rd, data4); } }
+ else { if (size) { adds_word_indrd_data4(rd, data4); } else { adds_byte_indrd_data4(rd, data4); } }
+ break;
+ }
+ case 0x03:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ if (which) { if (size) { movs_word_indrdinc_data4(rd, data4); } else { movs_byte_indrdinc_data4(rd, data4); } }
+ else { if (size) { adds_word_indrdinc_data4(rd, data4); } else { adds_byte_indrdinc_data4(rd, data4); } }
+ break;
+ }
+ case 0x04:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ const u8 off8 = m_program->read_byte(m_pc++);
+ if (which == 1) { if (size) { movs_word_indrdoff8_data4(rd, off8, data4); } else { movs_byte_indrdoff8_data4(rd, off8, data4); } }
+ else { if (size) { adds_word_indrdoff8_data4(rd, off8, data4); } else { adds_byte_indrdoff8_data4(rd, off8, data4); } }
+ break;
+ }
+ case 0x05:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const int off16 = (op3 << 8) | op4;
+ if (which == 1) { if (size) { movs_word_indrdoff16_data4(rd, off16, data4); } else { movs_byte_indrdoff16_data4(rd, off16, data4); } }
+ else { if (size) { adds_word_indrdoff16_data4(rd, off16, data4); } else { adds_byte_indrdoff16_data4(rd, off16, data4); } }
+ break;
+ }
+ case 0x06:
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u16 direct = ((op2 & 0xf0) << 4) | op3;
+ if (which == 1) { if (size) { movs_word_direct_data4(direct, data4); } else { movs_byte_direct_data4(direct, data4); } }
+ else { if (size) { adds_word_direct_data4(direct, data4); } else { adds_byte_direct_data4(direct, data4); } }
+ break;
+ }
+ }
+}
+
+std::string xa_cpu::get_word_reglist(u8 op2)
+{
+ std::string temp;
+
+ bool firstbit = true;
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+
+ if (bit)
+ {
+ temp += util::string_format("%s%s", firstbit ? "" : ",", m_regnames16[i]);
+ firstbit = false;
+ }
+ }
+ return temp;
+}
+
+std::string xa_cpu::get_byte_reglist(u8 op2, int h)
+{
+ std::string temp;
+
+ bool firstbit = true;
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+
+ if (bit)
+ {
+ temp += util::string_format("%s%s", firstbit ? "" : ",", m_regnames8[i + (h ? 8 : 0)]);
+ firstbit = false;
+ }
+ }
+ return temp;
+}
+
+void xa_cpu::push_byte_reglist(u8 op2, int h, bool force_user)
+{
+ for (int i = 7; i >= 0; i--)
+ {
+ int bit = (op2 & (1 << i));
+ if (bit)
+ {
+ u8 regval = gr8(i + (h ? 8 : 0));
+ if (force_user)
+ push_byte_to_user_stack(regval);
+ else
+ push_byte_to_stack(regval);
+ cy(2);
+ }
+ }
+}
+
+void xa_cpu::push_word_reglist(u8 op2, int h, bool force_user)
+{
+ // h is unused for word ops?
+ for (int i = 7; i >= 0; i--)
+ {
+ int bit = (op2 & (1 << i));
+ if (bit)
+ {
+ u16 regval = gr16(i);
+ if (force_user)
+ push_word_to_user_stack(regval);
+ else
+ push_word_to_stack(regval);
+ cy(2);
+ }
+ }
+}
+
+void xa_cpu::pull_byte_reglist(u8 op2, int h, bool force_user)
+{
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+ if (bit)
+ {
+ u8 stackval;
+ if (force_user)
+ stackval = pull_byte_from_user_stack();
+ else
+ stackval = pull_byte_from_stack();
+
+ sr8(i + (h ? 8 : 0), stackval);
+ cy(2);
+ }
+ }
+}
+
+void xa_cpu::pull_word_reglist(u8 op2, int h, bool force_user)
+{
+ // h is unused for word ops?
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+ if (bit)
+ {
+ u16 stackval;
+ if (force_user)
+ stackval = pull_word_from_user_stack();
+ else
+ stackval = pull_word_from_stack();
+
+ sr16(i, stackval);
+ cy(2);
+ }
+ }
+}
+
+
+void xa_cpu::handle_push_rlist(u8 op)
+{
+ const u8 h = op & 0x40;
+ const u8 size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ if (size) { push_word_rlist(op2, h); } else { push_byte_rlist(op2, h); }
+}
+
+void xa_cpu::handle_pushu_rlist(u8 op)
+{
+ const u8 h = op & 0x40;
+ const u8 size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ if (size) { pushu_word_rlist(op2, h); } else { pushu_byte_rlist(op2, h); }
+}
+
+void xa_cpu::handle_pop_rlist(u8 op)
+{
+ const u8 h = op & 0x40;
+ const u8 size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ if (size) { pop_word_rlist(op2, h); } else { pop_byte_rlist(op2, h); }
+}
+
+void xa_cpu::handle_popu_rlist(u8 op)
+{
+ const u8 h = op & 0x40;
+ const u8 size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ if (size) { popu_word_rlist(op2, h); } else { popu_byte_rlist(op2, h); }
+}
+
+// -------------------------------------- Group 0 --------------------------------------
+
+/*
+NOP No operation 1 3 0000 0000
+*/
+void xa_cpu::e_nop(u8 op)
+{
+ do_nop();
+}
+
+/*
+CLR bit Clear bit 3 4 0000 1000 0000 00bb bbbb bbbb
+SETB bit Sets the bit specified 3 4 0000 1000 0001 00bb bbbb bbbb
+MOV C, bit Move bit to the carry flag 3 4 0000 1000 0010 00bb bbbb bbbb
+MOV bit, C Move carry to bit 3 4 0000 1000 0011 00bb bbbb bbbb
+ANL C, bit Logical AND bit to carry 3 4 0000 1000 0100 00bb bbbb bbbb
+ANL C, /bit Logical AND complement of a bit to carry 3 4 0000 1000 0101 00bb bbbb bbbb
+ORL C, bit Logical OR a bit to carry 3 4 0000 1000 0110 00bb bbbb bbbb
+ORL C, /bit Logical OR complement of a bit to carry 3 4 0000 1000 0111 00bb bbbb bbbb
+*/
+
+void xa_cpu::e_bitgroup(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+
+ u16 bit = ((op2 & 0x03) << 8) | op3;
+
+ switch (op2 & 0xf0)
+ {
+ case 0x00: clr_bit(bit); break;
+ case 0x10: setb_bit(bit); break;
+ case 0x20: mov_c_bit(bit); break;
+ case 0x30: mov_bit_c(bit); break;
+ case 0x40: anl_c_bit(bit); break;
+ case 0x50: anl_c_notbit(bit); break;
+ case 0x60: orl_c_bit(bit); break;
+ case 0x70: orl_c_notbit(bit); break;
+ default: LOGMASKED(LOG_DEBUG, "illegal bit op %s", get_bittext(bit) ); do_nop(); break;
+ }
+ return;
+}
+
+/*
+ADD Rd, Rs Add regs direct 2 3 0000 S001 dddd ssss
+ADD Rd, [Rs] Add reg-ind to reg 2 4 0000 S010 dddd 0sss
+ADD [Rd], Rs Add reg to reg-ind 2 4 0000 S010 ssss 1ddd
+ADD Rd, [Rs+] Add reg-ind w/ autoinc to reg 2 5 0000 S011 dddd 0sss
+ADD [Rd+], Rs Add reg-ind w/ autoinc to reg 2 5 0000 S011 ssss 1ddd
+ADD Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg 3 6 0000 S100 dddd 0sss oooo oooo
+ADD [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs 3 6 0000 S100 ssss 1ddd oooo oooo
+ADD Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg 4 6 0000 S101 dddd 0sss oooo oooo oooo oooo
+ADD [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs 4 6 0000 S101 ssss 1ddd oooo oooo oooo oooo
+ADD direct, Rs Add reg to mem 3 4 0000 S110 ssss 1DDD DDDD DDDD
+ADD Rd, direct Add mem to reg 3 4 0000 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_add(u8 op)
+{
+ handle_alu_type0(op, 0);
+}
+
+/*
+PUSH Rlist Push regs (b/w) onto the current stack 2 b* 0H00 S111 LLLL LLLL
+*/
+void xa_cpu::e_push_rlist(u8 op)
+{
+ // PUSH
+ handle_push_rlist(op);
+}
+
+// -------------------------------------- Group 1 --------------------------------------
+
+/*
+ADDC Rd, Rs Add regs direct w/ carry 2 3 0001 S001 dddd ssss
+ADDC Rd, [Rs] Add reg-ind to reg w/ carry 2 4 0001 S010 dddd 0sss
+ADDC [Rd], Rs Add reg to reg-ind w/ carry 2 4 0001 S010 ssss 1ddd
+ADDC Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg w/ carry 3 6 0001 S100 dddd 0sss oooo oooo
+ADDC [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs w/ carry 3 6 0001 S100 ssss 1ddd oooo oooo
+ADDC Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg w/ carry 4 6 0001 S101 dddd 0sss oooo oooo oooo oooo
+ADDC [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs w/ carry 4 6 0001 S101 ssss 1ddd oooo oooo oooo oooo
+ADDC Rd, [Rs+] Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 dddd 0sss
+ADDC [Rd+], Rs Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 ssss 1ddd
+ADDC direct, Rs Add reg to mem w/ carry 3 4 0001 S110 ssss 1DDD DDDD DDDD
+ADDC Rd, direct Add mem to reg w/ carry 3 4 0001 S110 dddd 0DDD DDDD DDDD
+*/
+
+void xa_cpu::e_addc(u8 op)
+{
+ handle_alu_type0(op, 1);
+}
+
+/*
+PUSHU Rlist Push regs (b/w) from the user stack 2 b* 0H01 S111 LLLL LLLL
+*/
+void xa_cpu::e_pushu_rlist(u8 op)
+{
+ // PUSHU
+ handle_pushu_rlist(op);
+}
+
+
+// -------------------------------------- Group 2 --------------------------------------
+
+/*
+SUB Rd, Rs Subtract regs direct 2 3 0010 S001 dddd ssss
+SUB Rd, [Rs] Subtract reg-ind to reg 2 4 0010 S010 dddd 0sss
+SUB [Rd], Rs Subtract reg to reg-ind 2 4 0010 S010 ssss 1ddd
+SUB Rd, [Rs+offset8] Subtract reg-ind w/ 8-bit offs to reg 3 6 0010 S100 dddd 0sss oooo oooo
+SUB [Rd+offset8], Rs Subtract reg to reg-ind w/ 8-bit offs 3 6 0010 S100 ssss 1ddd oooo oooo
+SUB Rd, [Rs+offset16] Subtract reg-ind w/ 16-bit offs to reg 4 6 0010 S101 dddd 0sss oooo oooo oooo oooo
+SUB [Rd+offset16], Rs Subtract reg to reg-ind w/ 16-bit offs 4 6 0010 S101 ssss 1ddd oooo oooo oooo oooo
+SUB Rd, [Rs+] Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 dddd 0sss
+SUB [Rd+], Rs Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 ssss 1ddd
+SUB direct, Rs Subtract reg to mem 3 4 0010 S110 ssss 1DDD DDDD DDDD
+SUB Rd, direct Subtract mem to reg 3 4 0010 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_sub(u8 op)
+{
+ handle_alu_type0(op, 2);
+}
+
+/*
+POP Rlist Pop regs (b/w) from the current stack 2 c* 0H10 S111 LLLL LLLL
+*/
+void xa_cpu::e_pop_rlist(u8 op)
+{
+ // POP
+ handle_pop_rlist(op);
+}
+
+
+// -------------------------------------- Group 3 --------------------------------------
+
+/*
+SUBB Rd, Rs Subtract w/ borrow regs direct 2 3 0011 S001 dddd ssss
+SUBB Rd, [Rs] Subtract w/ borrow reg-ind to reg 2 4 0011 S010 dddd 0sss
+SUBB [Rd], Rs Subtract w/ borrow reg to reg-ind 2 4 0011 S010 ssss 1ddd
+SUBB Rd, [Rs+] Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 dddd 0sss
+SUBB [Rd+], Rs Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 ssss 1ddd
+SUBB Rd, [Rs+offset8] Subtract w/ borrow reg-ind w/ 8-bit offs to reg 3 6 0011 S100 dddd 0sss oooo oooo
+SUBB [Rd+offset8], Rs Subtract w/ borrow reg to reg-ind w/ 8-bit offs 3 6 0011 S100 ssss 1ddd oooo oooo
+SUBB Rd, [Rs+offset16] Subtract w/ borrow reg-ind w/ 16-bit offs to reg 4 6 0011 S101 dddd 0sss oooo oooo oooo oooo
+SUBB [Rd+offset16], Rs Subtract w/ borrow reg to reg-ind w/ 16-bit offs 4 6 0011 S101 ssss 1ddd oooo oooo oooo oooo
+SUBB direct, Rs Subtract w/ borrow reg to mem 3 4 0011 S110 ssss 1DDD DDDD DDDD
+SUBB Rd, direct Subtract w/ borrow mem to reg 3 4 0011 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_subb(u8 op)
+{
+ handle_alu_type0(op, 3);
+}
+
+/*
+POPU Rlist Pop regs (b/w) from the user stack 2 c* 0H11 S111 LLLL LLLL
+*/
+void xa_cpu::e_popu_rlist(u8 op)
+{
+ // POPU
+ handle_popu_rlist(op);
+}
+
+
+// -------------------------------------- Group 4 --------------------------------------
+
+/*
+LEA Rd, Rs+offset8 Load 16-bit effective address w/ 8-bit offs to reg 3 3 0100 0000 0ddd 0sss oooo oooo
+*/
+void xa_cpu::e_lea_offset8(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 offs8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0x70) >> 4;
+ const u8 rs = (op2 & 0x07);
+ lea_word_rd_rs_off8(rd, rs, offs8);
+}
+
+/*
+LEA Rd, Rs+offset16 Load 16-bit effective address w/ 16-bit offs to reg 4 3 0100 1000 0ddd 0sss oooo oooo oooo oooo
+*/
+void xa_cpu::e_lea_offset16(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0x70) >> 4;
+ const u8 rs = (op2 & 0x07);
+ const u16 offs16 = (op3 << 8) | op4;
+ lea_word_rd_rs_off16(rd, rs, offs16);
+}
+
+/*
+CMP Rd, Rs Compare dest and src regs 2 3 0100 S001 dddd ssss
+CMP Rd, [Rs] Compare reg-ind w/ reg 2 4 0100 S010 dddd 0sss
+CMP [Rd], Rs Compare reg w/ reg-ind 2 4 0100 S010 ssss 1ddd
+CMP Rd, [Rs+offset8] Compare reg-ind w/ 8-bit offs w/ reg 3 6 0100 S100 dddd 0sss oooo oooo
+CMP [Rd+offset8], Rs Compare reg w/ reg-ind w/ 8-bit offs 3 6 0100 S100 ssss 1ddd oooo oooo
+CMP Rd, [Rs+offset16] Compare reg-ind w/ 16-bit offs w/ reg 4 6 0100 S101 dddd 0sss oooo oooo oooo oooo
+CMP [Rd+offset16], Rs Compare reg w/ reg-ind w/ 16-bit offs 4 6 0100 S101 ssss 1ddd oooo oooo oooo oooo
+CMP Rd, [Rs+] Compare autoinc reg-ind w/ reg 2 5 0100 S011 dddd 0sss
+CMP [Rd+], Rs Compare reg w/ autoinc reg-ind 2 5 0100 S011 ssss 1ddd
+CMP direct, Rs Compare reg w/ mem 3 4 0100 S110 ssss 1DDD DDDD DDDD
+CMP Rd, direct Compare mem w/ reg 3 4 0100 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_cmp(u8 op)
+{
+ handle_alu_type0(op, 4);
+}
+
+// -------------------------------------- Group 5 --------------------------------------
+
+/*
+XCH Rd, [Rs] Exchange contents of a reg-ind address w/ a reg 2 6 0101 S000 dddd 0sss
+*/
+void xa_cpu::e_xch_type1(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x07);
+
+ if (size) { xch_word_rd_indrs(rd, rs); } else { xch_byte_rd_indrs(rd, rs); }
+}
+
+/*
+AND Rd, Rs Logical AND regs direct 2 3 0101 S001 dddd ssss
+AND Rd, [Rs] Logical AND reg-ind to reg 2 4 0101 S010 dddd 0sss
+AND [Rd], Rs Logical AND reg to reg-ind 2 4 0101 S010 ssss 1ddd
+AND Rd, [Rs+offset8] Logical AND reg-ind w/ 8-bit offs to reg 3 6 0101 S100 dddd 0sss oooo oooo
+AND [Rd+offset8], Rs Logical AND reg to reg-ind w/ 8-bit offs 3 6 0101 S100 ssss 1ddd oooo oooo
+AND Rd, [Rs+offset16] Logical AND reg-ind w/ 16-bit offs to reg 4 6 0101 S101 dddd 0sss oooo oooo oooo oooo
+AND [Rd+offset16], Rs Logical AND reg to reg-ind w/ 16-bit offs 4 6 0101 S101 ssss 1ddd oooo oooo oooo oooo
+AND Rd, [Rs+] Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 dddd 0sss
+AND [Rd+], Rs Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 ssss 1ddd
+AND direct, Rs Logical AND reg to mem 3 4 0101 S110 ssss 1DDD DDDD DDDD
+AND Rd, direct Logical AND mem to reg 3 4 0101 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_and(u8 op)
+{
+ handle_alu_type0(op, 5);
+}
+
+// -------------------------------------- Group 6 --------------------------------------
+
+/*
+XCH Rd, Rs Exchange contents of two regs 2 5 0110 S000 dddd ssss
+*/
+void xa_cpu::e_xch_type2(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ if (size) { xch_word_rd_rs(rd, rs); } else { xch_byte_rd_rs(rd, rs); }
+}
+
+/*
+OR Rd, Rs Logical OR regs 2 3 0110 S001 dddd ssss
+OR Rd, [Rs] Logical OR reg-ind to reg 2 4 0110 S010 dddd 0sss
+OR [Rd], Rs Logical OR reg to reg-ind 2 4 0110 S010 ssss 1ddd
+OR Rd, [Rs+offset8] Logical OR reg-ind w/ 8-bit offs to reg 3 6 0110 S100 dddd 0sss oooo oooo
+OR [Rd+offset8], Rs Logical OR reg to reg-ind w/ 8-bit offs 3 6 0110 S100 ssss 1ddd oooo oooo
+OR Rd, [Rs+offset16] Logical OR reg-ind w/ 16-bit offs to reg 4 6 0110 S101 dddd 0sss oooo oooo oooo oooo
+OR [Rd+offset16], Rs Logical OR reg to reg-ind w/ 16-bit offs 4 6 0110 S101 ssss 1ddd oooo oooo oooo oooo
+OR Rd, [Rs+] Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 dddd 0sss
+OR [Rd+], Rs Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 ssss 1ddd
+OR direct, Rs Logical OR reg to mem 3 4 0110 S110 ssss 1DDD DDDD DDDD
+OR Rd, direct Logical OR mem to reg 3 4 0110 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_or(u8 op)
+{
+ handle_alu_type0(op, 6);
+}
+
+// -------------------------------------- Group 7 --------------------------------------
+
+/*
+XOR Rd, Rs Logical XOR regs 2 3 0111 S001 dddd ssss
+XOR Rd, [Rs] Logical XOR reg-ind to reg 2 4 0111 S010 dddd 0sss
+XOR [Rd], Rs Logical XOR reg to reg-ind 2 4 0111 S010 ssss 1ddd
+XOR Rd, [Rs+offset8] Logical XOR reg-ind w/ 8-bit offs to reg 3 6 0111 S100 dddd 0sss oooo oooo
+XOR [Rd+offset8], Rs Logical XOR reg to reg-ind w/ 8-bit offs 3 6 0111 S100 ssss 1ddd oooo oooo
+XOR Rd, [Rs+offset16] Logical XOR reg-ind w/ 16-bit offs to reg 4 6 0111 S101 dddd 0sss oooo oooo oooo oooo
+XOR [Rd+offset16], Rs Logical XOR reg to reg-ind w/ 16-bit offs 4 6 0111 S101 ssss 1ddd oooo oooo oooo oooo
+XOR Rd, [Rs+] Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 dddd 0sss
+XOR [Rd+], Rs Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 ssss 1ddd
+XOR direct, Rs Logical XOR reg to mem 3 4 0111 S110 ssss 1DDD DDDD DDDD
+XOR Rd, direct Logical XOR mem to reg 3 4 0111 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_xor(u8 op)
+{
+ handle_alu_type0(op, 7);
+}
+
+// -------------------------------------- Group 8 --------------------------------------
+
+/*
+MOVC Rd, [Rs+] Move data from WS:Rs address of code mem to reg w/ autoinc 2 4 1000 S000 dddd 0sss
+*/
+void xa_cpu::e_movc_rd_rsinc(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ int rd = (op2 & 0xf0) >> 4;
+ int rs = (op2 & 0x07);
+ if (size) { movc_word_rd_indrsinc(rd, rs); } else { movc_byte_rd_indrsinc(rd, rs); }
+}
+
+/*
+MOV Rd, Rs Move reg to reg 2 3 1000 S001 dddd ssss
+MOV Rd, [Rs] Move reg-ind to reg 2 3 1000 S010 dddd 0sss
+MOV [Rd], Rs Move reg to reg-ind 2 3 1000 S010 ssss 1ddd
+MOV Rd, [Rs+offset8] Move reg-ind w/ 8-bit offs to reg 3 5 1000 S100 dddd 0sss oooo oooo
+MOV [Rd+offset8], Rs Move reg to reg-ind w/ 8-bit offs 3 5 1000 S100 ssss 1ddd oooo oooo
+MOV Rd, [Rs+offset16] Move reg-ind w/ 16-bit offs to reg 4 5 1000 S101 dddd 0sss oooo oooo oooo oooo
+MOV [Rd+offset16], Rs Move reg to reg-ind w/ 16-bit offs 4 5 1000 S101 ssss 1ddd oooo oooo oooo oooo
+MOV Rd, [Rs+] Move reg-ind w/ autoinc to reg 2 4 1000 S011 dddd 0sss
+MOV [Rd+], Rs Move reg-ind w/ autoinc to reg 2 4 1000 S011 ssss 1ddd
+MOV direct, Rs Move reg to mem 3 4 1000 S110 ssss 1DDD DDDD DDDD
+MOV Rd, direct Move mem to reg 3 4 1000 S110 dddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_mov(u8 op)
+{
+ handle_alu_type0(op, 8);
+}
+
+/*
+POPU direct Pop the mem content (b/w) from the user stack 3 5 1000 S111 0000 0DDD DDDD DDDD
+POP direct Pop the mem content (b/w) from the current stack 3 5 1000 S111 0001 0DDD DDDD DDDD
+PUSHU direct Push the mem content (b/w) onto the user stack 3 5 1000 S111 0010 0DDD DDDD DDDD
+PUSH direct Push the mem content (b/w) onto the current stack 3 5 1000 S111 0011 0DDD DDDD DDDD
+DJNZ Rd,rel8 Decrement reg and jump if not zero 3 8t/5nt 1000 S111 dddd 1000 rrrr rrrr
+*/
+void xa_cpu::e_pushpop_djnz_subgroup(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ if (op2 & 0x08)
+ {
+ const u8 rel8 = m_program->read_byte(m_pc++);
+ int rd = (op2 & 0xf0) >> 4;
+ if (size) { djnz_word_rd_rel8(rd, rel8); } else { djnz_byte_rd_rel8(rd, rel8); }
+ }
+ else
+ {
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+ switch (op2 & 0xf0)
+ {
+ case 0x00: { if (size) { popu_word_direct(direct); } else { popu_byte_direct(direct); } break; }
+ case 0x10: { if (size) { pop_word_direct(direct); } else { pop_byte_direct(direct); } break; }
+ case 0x20: { if (size) { pushu_word_direct(direct); } else { pushu_byte_direct(direct); } break; }
+ case 0x30: { if (size) { push_word_direct(direct); } else { push_byte_direct(direct); } break; }
+ default: LOGMASKED(LOG_DEBUG, "illegal push/pop"); do_nop(); break;
+ }
+ }
+}
+
+
+
+// -------------------------------------- Group 9 --------------------------------------
+
+/*
+MOV [Rd+], [Rs+] Move reg-ind to reg-ind, both pointers autoinc 2 6 1001 S000 0ddd 0sss
+DA Rd Decimal Adjust byte reg 2 4 1001 0000 dddd 1000
+SEXT Rd Sign extend last operation to reg 2 3 1001 S000 dddd 1001
+CPL Rd Complement (ones complement) reg 2 3 1001 S000 dddd 1010
+NEG Rd Negate (twos complement) reg 2 3 1001 S000 dddd 1011
+MOVC A, [A+PC] Move data from code mem to the accumulator ind w/ PC 2 6 1001 0000 0100 1100
+MOVC A, [A+DPTR] Move data from code mem to the accumulator ind w/ DPTR 2 6 1001 0000 0100 1110
+MOV Rd, USP Move User Stack Pointer to reg (system mode only) 2 3 1001 0000 dddd 1111
+MOV USP, Rs Move reg to User Stack Pointer (system mode only) 2 3 1001 1000 ssss 1111
+*/
+void xa_cpu::e_g9_subgroup(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ if ((op2 & 0x0f) < 0x08)
+ {
+ int rd = (op2 & 0x70) >> 4;
+ int rs = (op2 & 0x07);
+ if (size) { mov_word_indrdinc_indrsinc(rd, rs); } else { mov_byte_indrdinc_indrsinc(rd, rs); }
+ }
+ else
+ {
+ switch (op2 & 0x0f)
+ {
+ case 0x08: { int rd = (op2 & 0xf0) >> 4; da_rd(rd); break; }
+ case 0x09: { int rd = (op2 & 0xf0) >> 4; if (size) { sext_word_rd(rd); } else { sext_byte_rd(rd); } break; }
+ case 0x0a: { int rd = (op2 & 0xf0) >> 4; if (size) { cpl_word_rd(rd); } else { cpl_byte_rd(rd); } break; }
+ case 0x0b: { int rd = (op2 & 0xf0) >> 4; if (size) { neg_word_rd(rd); } else { neg_byte_rd(rd); } break; }
+ case 0x0c: { movc_a_apc(); break; }
+ case 0x0e: { movc_a_adptr(); break; }
+ case 0x0f: { int reg = (op2 & 0xf0) >> 4; if (!size) { mov_rd_usp(reg); } else { mov_usp_rs(reg); } break; }
+ default: { LOGMASKED(LOG_DEBUG, "illegal %02x", op2); do_nop(); break; }
+ }
+ }
+}
+
+/*
+ADD Rd, #data8 Add 8-bit imm data to reg 3 3 1001 0001 dddd 0000 iiii iiii
+ADD [Rd], #data8 Add 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0000 iiii iiii
+ADD [Rd+], #data8 Add 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0000 iiii iiii
+ADD [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0000 oooo oooo iiii iiii
+ADD [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0000 oooo oooo oooo oooo iiii iiii
+ADD direct, #data8 Add 8-bit imm data to mem 4 4 1001 0110 0DDD 0000 DDDD DDDD iiii iiii
+ADD Rd, #data16 Add 16-bit imm data to reg 4 3 1001 1001 dddd 0000 iiii iiii iiii iiii
+ADD [Rd], #data16 Add 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0000 iiii iiii iiii iiii
+ADD [Rd+], #data16 Add 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0000 iiii iiii iiii iiii
+ADD [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0000 oooo oooo iiii iiii iiii iiii
+ADD [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0000 oooo oooo oooo oooo iiii iiii iiii iiii
+ADD direct, #data16 Add 16-bit imm data to mem 5 4 1001 1110 0DDD 0000 DDDD DDDD iiii iiii iiii iiii
+
+ADDC Rd, #data8 Add 8-bit imm data to reg w/ carry 3 3 1001 0001 dddd 0001 iiii iiii
+ADDC Rd, #data16 Add 16-bit imm data to reg w/ carry 4 3 1001 1001 dddd 0001 iiii iiii iiii iiii
+ADDC [Rd], #data8 Add 16-bit imm data to reg-ind w/ carry 3 4 1001 0010 0ddd 0001 iiii iiii
+ADDC [Rd], #data16 Add 16-bit imm data to reg-ind w/ carry 4 4 1001 1010 0ddd 0001 iiii iiii iiii iiii
+ADDC [Rd+], #data8 Add 8-bit imm data to reg-ind and autoinc w/ carry 3 5 1001 0011 0ddd 0001 iiii iiii
+ADDC [Rd+], #data16 Add 16-bit imm data to reg-ind and autoinc w/ carry 4 5 1001 1011 0ddd 0001 iiii iiii iiii iiii
+ADDC [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs and carry 4 6 1001 0100 0ddd 0001 oooo oooo iiii iiii
+ADDC [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs and carry 5 6 1001 1100 0ddd 0001 oooo oooo iiii iiii iiii iiii
+ADDC [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs and carry 5 6 1001 0101 0ddd 0001 oooo oooo oooo oooo iiii iiii
+ADDC [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs and carry 6 6 1001 1101 0ddd 0001 oooo oooo oooo oooo iiii iiii iiii iiii
+ADDC direct, #data8 Add 8-bit imm data to mem w/ carry 4 4 1001 0110 0DDD 0001 DDDD DDDD iiii iiii
+ADDC direct, #data16 Add 16-bit imm data to mem w/ carry 5 4 1001 1110 0DDD 0001 DDDD DDDD iiii iiii iiii iiii
+
+SUB Rd, #data8 Subtract 8-bit imm data to reg 3 3 1001 0001 dddd 0010 iiii iiii
+SUB Rd, #data16 Subtract 16-bit imm data to reg 4 3 1001 1001 dddd 0010 iiii iiii iiii iiii
+SUB [Rd], #data8 Subtract 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0010 iiii iiii
+SUB [Rd], #data16 Subtract 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0010 iiii iiii iiii iiii
+SUB [Rd+], #data8 Subtract 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0010 iiii iiii
+SUB [Rd+], #data16 Subtract 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0010 iiii iiii iiii iiii
+SUB [Rd+offset8], #data8 Subtract 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0010 oooo oooo iiii iiii
+SUB [Rd+offset8], #data16 Subtract 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0010 oooo oooo iiii iiii iiii iiii
+SUB [Rd+offset16], #data8 Subtract 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0010 oooo oooo oooo oooo iiii iiii
+SUB [Rd+offset16], #data16 Subtract 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0010 oooo oooo oooo oooo iiii iiii iiii iiii
+SUB direct, #data8 Subtract 8-bit imm data to mem 4 4 1001 0110 0DDD 0010 DDDD DDDD iiii iiii
+SUB direct, #data16 Subtract 16-bit imm data to mem 5 4 1001 1110 0DDD 0010 DDDD DDDD iiii iiii iiii iiii
+
+SUBB Rd, #data8 Subtract w/ borrow 8-bit imm data to reg 3 3 1001 0001 dddd 0011 iiii iiii
+SUBB Rd, #data16 Subtract w/ borrow 16-bit imm data to reg 4 3 1001 1001 dddd 0011 iiii iiii iiii iiii
+SUBB [Rd], #data8 Subtract w/ borrow 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0011 iiii iiii
+SUBB [Rd], #data16 Subtract w/ borrow 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0011 iiii iiii iiii iiii
+SUBB [Rd+], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0011 iiii iiii
+SUBB [Rd+], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0011 iiii iiii iiii iiii
+SUBB [Rd+offset8], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0011 oooo oooo iiii iiii
+SUBB [Rd+offset8], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0011 oooo oooo iiii iiii iiii iiii
+SUBB [Rd+offset16], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0011 oooo oooo oooo oooo iiii iiii
+SUBB [Rd+offset16], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0011 oooo oooo oooo oooo iiii iiii iiii iiii
+SUBB direct, #data8 Subtract w/ borrow 8-bit imm data to mem 4 4 1001 0110 0DDD 0011 DDDD DDDD iiii iiii
+SUBB direct, #data16 Subtract w/ borrow 16-bit imm data to mem 5 4 1001 1110 0DDD 0011 DDDD DDDD iiii iiii iiii iiii
+
+CMP Rd, #data8 Compare 8-bit imm data to reg 3 3 1001 0001 dddd 0100 iiii iiii
+CMP Rd, #data16 Compare 16-bit imm data to reg 4 3 1001 1001 dddd 0100 iiii iiii iiii iiii
+CMP [Rd], #data8 Compare 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0100 iiii iiii
+CMP [Rd], #data16 Compare 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0100 iiii iiii iiii iiii
+CMP [Rd+], #data8 Compare 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0100 iiii iiii
+CMP [Rd+], #data16 Compare 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0100 iiii iiii iiii iiii
+CMP [Rd+offset8], #data8 Compare 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0100 oooo oooo iiii iiii
+CMP [Rd+offset8], #data16 Compare 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0100 oooo oooo iiii iiii iiii iiii
+CMP [Rd+offset16], #data8 Compare 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0100 oooo oooo oooo oooo iiii iiii
+CMP [Rd+offset16], #data16 Compare 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0100 oooo oooo oooo oooo iiii iiii iiii iiii
+CMP direct, #data8 Compare 8-bit imm data to mem 4 4 1001 0110 0DDD 0100 DDDD DDDD iiii iiii
+CMP direct, #data16 Compare 16-bit imm data to mem 5 4 1001 1110 0DDD 0100 DDDD DDDD iiii iiii iiii iiii
+
+AND Rd, #data8 Logical AND 8-bit imm data to reg 3 3 1001 0001 dddd 0101 iiii iiii
+AND Rd, #data16 Logical AND 16-bit imm data to reg 4 3 1001 1001 dddd 0101 iiii iiii iiii iiii
+AND [Rd], #data8 Logical AND 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0101 iiii iiii
+AND [Rd], #data16 Logical AND 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0101 iiii iiii iiii iiii
+AND [Rd+], #data8 Logical AND 8-bit imm data to reg-ind and autoinc 3 5 1001 0011 0ddd 0101 iiii iiii
+AND [Rd+], #data16 Logical AND 16-bit imm data to reg-ind and autoinc 4 5 1001 1011 0ddd 0101 iiii iiii iiii iiii
+AND [Rd+offset8], #data8 Logical AND 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0101 oooo oooo iiii iiii
+AND [Rd+offset8], #data16 Logical AND 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0101 oooo oooo iiii iiii iiii iiii
+AND [Rd+offset16], #data8 Logical AND 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0101 oooo oooo oooo oooo iiii iiii
+AND [Rd+offset16], #data16 Logical AND 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0101 oooo oooo oooo oooo iiii iiii iiii iiii
+AND direct, #data8 Logical AND 8-bit imm data to mem 4 4 1001 0110 0DDD 0101 DDDD DDDD iiii iiii
+AND direct, #data16 Logical AND 16-bit imm data to mem 5 4 1001 1110 0DDD 0101 DDDD DDDD iiii iiii iiii iiii
+
+OR Rd, #data8 Logical OR 8-bit imm data to reg 3 3 1001 0001 dddd 0110 iiii iiii
+OR Rd, #data16 Logical OR 16-bit imm data to reg 4 3 1001 1001 dddd 0110 iiii iiii iiii iiii
+OR [Rd], #data8 Logical OR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0110 iiii iiii
+OR [Rd], #data16 Logical OR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0110 iiii iiii iiii iiii
+OR [Rd+], #data8 Logical OR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0110 iiii iiii
+OR [Rd+], #data16 Logical OR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0110 iiii iiii iiii iiii
+OR [Rd+offset8], #data8 Logical OR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0110 oooo oooo iiii iiii
+OR [Rd+offset8], #data16 Logical OR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0110 oooo oooo iiii iiii iiii iiii
+OR [Rd+offset16], #data8 Logical OR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0110 oooo oooo oooo oooo iiii iiii
+OR [Rd+offset16], #data16 Logical OR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0110 oooo oooo oooo oooo iiii iiii iiii iiii
+OR direct, #data8 Logical OR 8-bit imm data to mem 4 4 1001 0110 0DDD 0110 DDDD DDDD iiii iiii
+OR direct, #data16 Logical OR 16-bit imm data to mem 5 4 1001 1110 0DDD 0110 DDDD DDDD iiii iiii iiii iiii
+
+XOR Rd, #data8 Logical XOR 8-bit imm data to reg 3 3 1001 0001 dddd 0111 iiii iiii
+XOR Rd, #data16 Logical XOR 16-bit imm data to reg 4 3 1001 1001 dddd 0111 iiii iiii iiii iiii
+XOR [Rd], #data8 Logical XOR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0111 iiii iiii
+XOR [Rd], #data16 Logical XOR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0111 iiii iiii iiii iiii
+XOR [Rd+], #data8 Logical XOR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0111 iiii iiii
+XOR [Rd+], #data16 Logical XOR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0111 iiii iiii iiii iiii
+XOR [Rd+offset8], #data8 Logical XOR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0111 oooo oooo iiii iiii
+XOR [Rd+offset8], #data16 Logical XOR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0111 oooo oooo iiii iiii iiii iiii
+XOR [Rd+offset16], #data8 Logical XOR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0111 oooo oooo oooo oooo iiii iiii
+XOR [Rd+offset16], #data16 Logical XOR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0111 oooo oooo oooo oooo iiii iiii iiii iiii
+XOR direct, #data8 Logical XOR 8-bit imm data to mem 4 4 1001 0110 0DDD 0111 DDDD DDDD iiii iiii
+XOR direct, #data16 Logical XOR 16-bit imm data to mem 5 4 1001 1110 0DDD 0111 DDDD DDDD iiii iiii iiii iiii
+
+MOV Rd, #data8 Move 8-bit imm data to reg 3 3 1001 0001 dddd 1000 iiii iiii
+MOV Rd, #data16 Move 16-bit imm data to reg 4 3 1001 1001 dddd 1000 iiii iiii iiii iiii
+MOV [Rd], #data8 Move 16-bit imm data to reg-ind 3 3 1001 0010 0ddd 1000 iiii iiii
+MOV [Rd], #data16 Move 16-bit imm data to reg-ind 4 3 1001 1010 0ddd 1000 iiii iiii iiii iiii
+MOV [Rd+], #data8 Move 8-bit imm data to reg-ind w/ autoinc 3 4 1001 0011 0ddd 1000 iiii iiii
+MOV [Rd+], #data16 Move 16-bit imm data to reg-ind w/ autoinc 4 4 1001 1011 0ddd 1000 iiii iiii iiii iiii
+MOV [Rd+offset8], #data8 Move 8-bit imm data to reg-ind w/ 8-bit offs 4 5 1001 0100 0ddd 1000 oooo oooo iiii iiii
+MOV [Rd+offset8], #data16 Move 16-bit imm data to reg-ind w/ 8-bit offs 5 5 1001 1100 0ddd 1000 oooo oooo iiii iiii iiii iiii
+MOV [Rd+offset16], #data8 Move 8-bit imm data to reg-ind w/ 16-bit offs 5 5 1001 0101 0ddd 1000 oooo oooo oooo oooo iiii iiii
+MOV [Rd+offset16], #data16 Move 16-bit imm data to reg-ind w/ 16-bit offs 6 5 1001 1101 0ddd 1000 oooo oooo oooo oooo iiii iiii iiii iiii
+MOV direct, #data8 Move 8-bit imm data to mem 4 3 1001 0110 0DDD 1000 DDDD DDDD iiii iiii
+MOV direct, #data16 Move 16-bit imm data to mem 5 3 1001 1110 0DDD 1000 DDDD DDDD iiii iiii iiii iiii
+*/
+void xa_cpu::e_alu(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ handle_alu_type1(op, op2);
+}
+
+/*
+MOV direct, direct Move mem to mem 4 4 1001 S111 0DDD 0ddd DDDD DDDD dddd dddd
+JB bit,rel8 Jump if bit set 4 10t/6nt 1001 0111 1000 00bb bbbb bbbb rrrr rrrr
+JNB bit,rel8 Jump if bit not set 4 10t/6nt 1001 0111 1010 00bb bbbb bbbb rrrr rrrr
+JBC bit,rel8 Jump if bit set and then clear the bit 4 11t/7nt 1001 0111 1100 00bb bbbb bbbb rrrr rrrr
+*/
+void xa_cpu::e_jb_mov_subgroup(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+
+ if (op2 & 0x80)
+ {
+ int bit = ((op2 & 0x03) << 8) | op3;
+ switch (op2 & 0x70)
+ {
+ case 0x00: jb_bit_rel8(bit, op4); break;
+ case 0x20: jnb_bit_rel8(bit, op4); break;
+ case 0x40: jbc_bit_rel8(bit, op4); break;
+ default: LOGMASKED(LOG_DEBUG, "illegal conditional jump %s $%02x", get_bittext(bit), expand_rel8(op4) ); break;
+ }
+ }
+ else
+ {
+ int direct_dst = ((op2 & 0x70) << 4) | op3;
+ int direct_src = ((op2 & 0x07) << 8) | op4;
+ int size = op & 0x08;
+ if (size) { mov_word_direct_direct(direct_dst, direct_src); } else { mov_byte_direct_direct(direct_dst, direct_src); }
+ }
+}
+
+// -------------------------------------- Group a --------------------------------------
+
+/*
+XCH Rd, direct Exchange contents of mem w/ a reg 3 6 1010 S000 dddd 1DDD DDDD DDDD
+
+MOV direct, [Rs] Move reg-ind to mem 3 4 1010 S000 1sss 0DDD DDDD DDDD
+MOV [Rd], direct Move mem to reg-ind 3 4 1010 S000 0ddd 0DDD DDDD DDDD
+*/
+void xa_cpu::e_movdir(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+
+ if (op2 & 0x08)
+ {
+ const u8 rd = op2 & (0xf0) >> 4;
+ if (size) { xch_word_rd_direct(rd, direct); } else { xch_byte_rd_direct(rd, direct); }
+ }
+ else
+ {
+ if (op2 & 0x80)
+ {
+ const u8 rs = op2 & (0x70) >> 4;
+ if (size) { mov_word_direct_indrs(direct, rs); } else { mov_byte_direct_indrs(direct, rs); }
+ }
+ else
+ {
+ const u8 rd = op2 & (0x70) >> 4;
+ if (size) { mov_word_indrd_direct(rd, direct); } else { mov_byte_indrd_direct(rd, direct); }
+ }
+ }
+}
+
+/*
+ADDS Rd, #data4 Add 4-bit signed imm data to reg 2 3 1010 S001 dddd iiii
+ADDS [Rd], #data4 Add 4-bit signed imm data to reg-ind 2 4 1010 S010 0ddd iiii
+ADDS [Rd+], #data4 Add 4-bit signed imm data to reg-ind w/ autoinc 2 5 1010 S011 0ddd iiii
+ADDS [Rd+offset8], #data4 Add reg-ind w/ 8-bit offs to 4-bit signed imm data 3 6 1010 S100 0ddd iiii oooo oooo
+ADDS [Rd+offset16], #data4 Add reg-ind w/ 16-bit offs to 4-bit signed imm data 4 6 1010 S101 0ddd iiii oooo oooo oooo oooo
+ADDS direct, #data4 Add 4-bit signed imm data to mem 3 4 1010 S110 0DDD iiii DDDD DDDD
+*/
+void xa_cpu::e_adds(u8 op)
+{
+ handle_adds_movs(op, 0);
+}
+
+/*
+MOVX [Rd], Rs Move external data from reg to mem 2 6 1010 S111 ssss 1ddd
+MOVX Rd, [Rs] Move external data from mem to reg 2 6 1010 S111 dddd 0sss
+*/
+void xa_cpu::e_movx_subgroup(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ if (op2 & 0x08)
+ {
+ const u8 rs = (op2 & 0xf0) >> 4;
+ const u8 rd = (op2 & 0x07);
+ if (size) { movx_word_indrd_rs(rd, rs); } else { movx_byte_indrd_rs(rd, rs); }
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x07);
+ if (size) { movx_word_rd_indrs(rd, rs); } else { movx_byte_rd_indrs(rd, rs); }
+ }
+}
+
+// -------------------------------------- Group b --------------------------------------
+
+/*
+RR Rd, #data4 Rotate right reg by the 4-bit imm value 2 a* 1011 S000 dddd iiii
+*/
+void xa_cpu::e_rr(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data = rd & 0x0f;
+ if (size) { rr_word_rd_data4(rd, data); } else { rr_byte_rd_data4(rd, data); }
+}
+
+/*
+MOVS Rd, #data4 Move 4-bit sign-extended imm data to reg 2 3 1011 S001 dddd iiii
+MOVS [Rd], #data4 Move 4-bit sign-extended imm data to reg-ind 2 3 1011 S010 0ddd iiii
+MOVS [Rd+], #data4 Move 4-bit sign-extended imm data to reg-ind w/ autoinc 2 4 1011 S011 0ddd iiii
+MOVS [Rd+offset8], #data4 Move reg-ind w/ 8-bit offs to 4-bit sign-extended imm data 3 5 1011 S100 0ddd iiii oooo oooo
+MOVS [Rd+offset16], #data4 Move reg-ind w/ 16-bit offs to 4-bit sign-extended imm data 4 5 1011 S101 0ddd iiii oooo oooo oooo oooo
+MOVS direct, #data4 Move 4-bit sign-extended imm data to mem 3 3 1011 S110 0DDD iiii DDDD DDDD
+*/
+void xa_cpu::e_movs(u8 op)
+{
+ handle_adds_movs(op, 1);
+}
+
+/*
+RRC Rd, #data4 Rotate right reg though carry by the 4-bit imm value 2 a* 1011 S111 dddd iiii
+*/
+void xa_cpu::e_rrc(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data = rd & 0x0f;
+ if (size) { rrc_word_rd_data4(rd, data); } else { rrc_byte_rd_data4(rd, data); }
+}
+
+
+// -------------------------------------- Group c --------------------------------------
+
+/*
+LSR Rd, Rs Logical right shift dest reg by the value in the src reg 2 a* 1100 SS00 dddd ssss
+FCALL addr24 Far call (full 24-bit address space) 4 12/8(PZ) 1100 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+*/
+void xa_cpu::e_lsr_fc(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u32 addr = (op2 << 8) | op3 | (op4 << 16);
+ fcall_addr24(addr);
+ }
+ else
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ if (size == 0) lsr_byte_rd_rs(rd, rs);
+ else if (size == 2) lsr_word_rd_rs(rd, rs);
+ else if (size == 3) lsr_dword_rd_rs(rd, rs);
+ }
+}
+
+/*
+ASL Rd, Rs Logical left shift dest reg by the value in the src reg 2 a* 1100 SS01 dddd ssss
+CALL rel16 Relative call (range +/- 64K) 3 7/4(PZ) 1100 0101 rrrr rrrr rrrr rrrr
+*/
+void xa_cpu::e_asl_c(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ u16 rel16 = (op2 << 8) | op3;
+ call_rel16(rel16);
+ }
+ else
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ if (size == 0) asl_byte_rd_rs(rd, rs);
+ else if (size == 2) asl_word_rd_rs(rd, rs);
+ else if (size == 3) asl_dword_rd_rs(rd, rs);
+ }
+}
+
+/*
+ASR Rd, Rs Arithmetic shift right dest reg by the count in the src 2 a* 1100 SS10 dddd ssss
+CALL [Rs] Subroutine call ind w/ a reg 2 8/5(PZ) 1100 0110 0000 0sss
+*/
+void xa_cpu::e_asr_c(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rs = op2 & 0x07;
+ call_indrs(rs);
+ }
+ else
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ if (size == 0) asr_byte_rd_rs(rd, rs);
+ else if (size == 2) asr_word_rd_rs(rd, rs);
+ else if (size == 3) asr_dword_rd_rs(rd, rs);
+ }
+}
+
+/*
+NORM Rd, Rs Logical shift left dest reg by the value in the src reg until MSB set 2 a* 1100 SS11 dddd ssss
+*/
+void xa_cpu::e_norm(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ LOGMASKED(LOG_DEBUG, "illegal %02x", op2); do_nop();
+ }
+ else
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ int rd = (op2 & 0xf0) >> 4;
+ int rs = (op2 & 0x0f);
+ if (size == 0) norm_byte_rd_rs(rd, rs);
+ else if (size == 2) norm_word_rd_rs(rd, rs);
+ else if (size == 3) norm_dword_rd_rs(rd, rs);
+ }
+}
+
+// -------------------------------------- Group d --------------------------------------
+
+/*
+LSR Rd, #data4 Logical right shift reg by the 4-bit imm value 2 a* 1101 SS00 dddd iiii
+LSR Rd, #data5 Logical right shift reg by the 4-bit imm value 2 a* 1101 1100 dddi iiii
+FJMP addr24 Far jump (full 24-bit address space) 4 6 1101 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+*/
+void xa_cpu::e_lsr_fj(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u32 addr = (op2 << 8) | op3 | (op4 << 16);
+ fjmp_addr24(addr);
+ }
+ else
+ {
+ handle_shift(op, 2);
+ }
+}
+
+/*
+ASL Rd, #data4 Logical left shift reg by the 4-bit imm value 2 a* 1101 SS01 dddd iiii
+ASL Rd, #data5 Logical left shift reg by the 5-bit imm value 2 a* 1101 1101 dddi iiii
+JMP rel16 Long unconditional branch 3 6 1101 0101 rrrr rrrr rrrr rrrr
+*/
+void xa_cpu::e_asl_j(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ u16 offset = (op2 << 8) | op3;
+ jmp_rel16(offset);
+ }
+ else
+ {
+ handle_shift(op, 0);
+ }
+}
+
+/*
+ASR Rd, #data4 Arithmetic shift right reg by the 4-bit imm count 2 a* 1101 SS10 dddd iiii
+ASR Rd, #data5 Arithmetic shift right reg by the 5-bit imm count 2 a* 1101 1110 dddi iiii
+RESET Causes a hardware Reset (same as external Reset) 2 18 1101 0110 0001 0000
+TRAP #data4 Causes 1 of 16 hardware traps to be executed 2 23/19(PZ) 1101 0110 0011 tttt
+JMP [A+DPTR] Jump ind relative to the DPTR 2 5 1101 0110 0100 0110
+JMP [[Rs+]] Jump double-ind to the address (pointer to a pointer) 2 8 1101 0110 0110 0sss
+JMP [Rs] Jump ind to the address in the reg (64K) 2 7 1101 0110 0111 0sss
+RET Return from subroutine 2 8/6(PZ) 1101 0110 1000 0000
+RETI Return from interrupt 2 10/8(PZ) 1101 0110 1001 0000
+*/
+void xa_cpu::e_asr_j(u8 op)
+{
+ int size = (op & 0x0c) >> 2;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ if (size == 0x01)
+ {
+ switch (op2 & 0xf0)
+ {
+ case 0x10: reset(); break;
+ case 0x30: trap_data4(op2 & 0x0f); break;
+ case 0x40: jmp_ind_adptr(); break;
+ case 0x60: jmp_dblindrs(op2 & 0x07); break;
+ case 0x70: jmp_indrs(op2 & 0x07); break;
+ case 0x80: ret(); break;
+ case 0x90: reti(); break;
+ default: LOGMASKED(LOG_DEBUG, "illegal"); do_nop(); break;
+ }
+ }
+ else
+ {
+ handle_shift(op, 1);
+ }
+}
+
+/*
+RL Rd, #data4 Rotate left reg by the 4-bit imm value 2 a* 1101 S011 dddd iiii
+*/
+void xa_cpu::e_rl(u8 op)
+{
+ int size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data4 = (op2 & 0x0f);
+ if (size) { rl_word_rd_data4(rd, data4); } else { rl_byte_rd_data4(rd, data4); }
+}
+
+/*
+RLC Rd, #data4 Rotate left reg though carry by the 4-bit imm value 2 a* 1101 S111 dddd iiii
+*/
+void xa_cpu::e_rlc(u8 op)
+{
+ int size = op & 0x08;
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data4 = (op2 & 0x0f);
+ if (size) { rlc_word_rd_data4(rd, data4); } else { rlc_byte_rd_data4(rd, data4); }
+}
+
+// -------------------------------------- Group e --------------------------------------
+
+/*
+DJNZ direct,rel8 Decrement mem and jump if not zero 4 9t/5nt 1110 S010 0000 1DDD DDDD DDDD rrrr rrrr
+CJNE Rd,direct,rel8 Compare dir byte to reg and jump if not equal 4 10t/7nt 1110 S010 dddd 0DDD DDDD DDDD rrrr rrrr
+*/
+void xa_cpu::e_djnz_cjne(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ int size = op & 0x08;
+
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+ if (op2 & 0x08)
+ {
+ if (size) { djnz_word_direct_rel8(direct, op4); } else { djnz_byte_direct_rel8(direct, op4); }
+ }
+ else
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ if (size) { cjne_word_rd_direct_rel8(rd, direct, op4); } else { cjne_byte_rd_direct_rel8(rd, direct, op4); }
+ }
+}
+
+/*
+MULU.b Rd, Rs 8X8 unsigned multiply of reg contents 2 12 1110 0000 dddd ssss
+*/
+void xa_cpu::e_mulu_b(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ mulu_byte_rd_rs(rd, rs);
+}
+
+/*
+DIVU.b Rd, Rs 8x8 unsigned reg divide 2 12 1110 0001 dddd ssss
+*/
+void xa_cpu::e_divu_b(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ divu_byte_rd_rs(rd, rs);
+}
+
+/*
+MULU.w Rd, Rs 16X16 unsigned reg multiply 2 12 1110 0100 dddd ssss
+*/
+void xa_cpu::e_mulu_w(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ mulu_word_rd_rs(rd, rs);
+}
+
+/*
+DIVU.w Rd, Rs 16X8 unsigned reg divide 2 12 1110 0101 dddd ssss
+*/
+void xa_cpu::e_divu_w(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ divu_word_rd_rs(rd, rs);
+}
+
+/*
+MUL.w Rd, Rs 16X16 signed multiply of reg contents 2 12 1110 0110 dddd ssss
+*/
+void xa_cpu::e_mul_w(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ mul_word_rd_rs(rd, rs);
+}
+
+/*
+DIV.w Rd, Rs 16x8 signed reg divide 2 14 1110 0111 dddd ssss
+*/
+void xa_cpu::e_div_w(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ div_word_rd_rs(rd, rs);
+}
+
+/*
+MULU.b Rd, #data8 8X8 unsigned multiply of 8-bit imm data w/ reg 3 12 1110 1000 dddd 0000 iiii iiii
+DIVU.b Rd, #data8 8X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0001 iiii iiii
+DIVU.w Rd, #data8 16X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0011 iiii iiii
+DIV.w Rd, #data8 16x8 signed divide reg w/ imm word 3 14 1110 1000 dddd 1011 iiii iiii
+
+*/
+void xa_cpu::e_div_data8(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 data8 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+
+ switch (op2 & 0x0f)
+ {
+ case 0x00: { mulu_byte_rd_data8(rd, data8); break; }
+ case 0x01: { divu_byte_rd_data8(rd, data8); break; }
+ case 0x03: { divu_word_rd_data8(rd, data8); break; }
+ case 0x0b: { div_word_rd_data8(rd, data8);break; }
+ default: { LOGMASKED(LOG_DEBUG, "illegal mul/div data8 %s #$%02x", m_regnames8[rd], data8); do_nop(); break; }
+ }
+}
+
+/*
+MULU.w Rd, #data16 16X16 unsigned multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 0000 iiii iiii iiii iiii
+DIVU.d Rd, #data16 32X16 unsigned double reg divide w/ imm word 4 22 1110 1001 ddd0 0001 iiii iiii iiii iiii
+MUL.w Rd, #data16 16X16 signed multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 1000 iiii iiii iiii iiii
+DIV.d Rd, #data16 32x16 signed double reg divide w/ imm word 4 24 1110 1001 ddd0 1001 iiii iiii iiii iiii
+*/
+void xa_cpu::e_div_d16(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u16 data16 = (op3 << 8) | op4;
+ switch (op2 & 0x0f)
+ {
+ case 0x00: { const u8 rd = (op2 & 0xf0) >> 4; mulu_word_rd_data16(rd, data16); break; }
+ case 0x01: { const u8 rd = (op2 & 0xe0) >> 4; divu_dword_rd_data16(rd, data16); break; }
+ case 0x08: { const u8 rd = (op2 & 0xf0) >> 4; mul_word_rd_data16(rd, data16); break; }
+ case 0x09: { const u8 rd = (op2 & 0xe0) >> 4; div_dword_rd_data16(rd, data16); break; }
+ default: { const u8 rd = (op2 & 0xf0) >> 4; LOGMASKED(LOG_DEBUG, "illegal mul/div data16 %s, #$%04x", m_regnames16[rd], data16); do_nop(); break; }
+ }
+}
+
+/*
+DIVU.d Rd, Rs 32X16 unsigned double reg divide 2 22 1110 1101 ddd0 ssss
+*/
+void xa_cpu::e_divu_d(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xe0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ divu_dword_rd_rs(rd, rs);
+}
+
+/*
+DIV.d Rd, Rs 32x16 signed double reg divide 2 24 1110 1111 ddd0 ssss
+*/
+void xa_cpu::e_div_d(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 rd = (op2 & 0xe0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ div_dword_rd_rs(rd, rs);
+}
+
+/*
+CJNE [Rd],#data8,rel8 Compare imm word to reg-ind and jump if not equal 4 10t/7nt 1110 0011 0ddd 1000 rrrr rrrr iiii iiii
+CJNE Rd,#data8,rel8 Compare imm byte to reg and jump if not equal 4 9t/6nt 1110 0011 dddd 0000 rrrr rrrr iiii iiii
+*/
+void xa_cpu::e_cjne_d8(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ if (op2 & 0x08)
+ {
+ const u8 rd = (op2 & 0x70) >> 4;
+ cjne_indrd_data8_rel8(rd, op4, op3);
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ cjne_rd_data8_rel8(rd, op4, op3);
+ }
+}
+
+/*
+CJNE [Rd],#data16,rel8 Compare imm word to reg-ind and jump if not equal 5 10t/7nt 1110 1011 0ddd 1000 rrrr rrrr iiii iiii iiii iiii
+CJNE Rd,#data16,rel8 Compare imm word to reg and jump if not equal 5 9t/6nt 1110 1011 dddd 0000 rrrr rrrr iiii iiii iiii iiii
+*/
+void xa_cpu::e_cjne_d16(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ const u8 op3 = m_program->read_byte(m_pc++);
+ const u8 op4 = m_program->read_byte(m_pc++);
+ const u8 op5 = m_program->read_byte(m_pc++);
+ const u16 data = (op4 << 8) | op5;
+ if (op2 & 0x08)
+ {
+ const u8 rd = (op2 & 0x70) >> 4;
+ cjne_indrd_data16_rel8(rd, data, op3);
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ cjne_rd_data16_rel8(rd, data, op3);
+ }
+}
+
+/*
+JZ rel8 Jump if accumulator equals zero 2 6t/3nt 1110 1100 rrrr rrrr
+*/
+void xa_cpu::e_jz_rel8(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ jz_rel8(op2);
+}
+
+/*
+JNZ rel8 Jump if accumulator not equal zero 2 6t/3nt 1110 1110 rrrr rrrr
+*/
+void xa_cpu::e_jnz_rel8(u8 op)
+{
+ const u8 op2 = m_program->read_byte(m_pc++);
+ jnz_rel8(op2);
+}
+
+
+// -------------------------------------- Group f --------------------------------------
+
+/*
+BCC rel8 Branch if the carry flag is clear 2 6t/3nt 1111 0000 rrrr rrrr
+BCS rel8 Branch if the carry flag is set 2 6t/3nt 1111 0001 rrrr rrrr
+BNE rel8 Branch if the zero flag is not set 2 6t/3nt 1111 0010 rrrr rrrr
+BEQ rel8 Branch if the zero flag is set 2 6t/3nt 1111 0011 rrrr rrrr
+BNV rel8 Branch if overflow flag is clear 2 6t/3nt 1111 0100 rrrr rrrr
+BOV rel8 Branch if overflow flag is set 2 6t/3nt 1111 0101 rrrr rrrr
+BPL rel8 Branch if the negative flag is clear 2 6t/3nt 1111 0110 rrrr rrrr
+BMI rel8 Branch if the negative flag is set 2 6t/3nt 1111 0111 rrrr rrrr
+BG rel8 Branch if greater than (unsigned) 2 6t/3nt 1111 1000 rrrr rrrr
+BL rel8 Branch if less than or equal to (unsigned) 2 6t/3nt 1111 1001 rrrr rrrr
+BGE rel8 Branch if greater than or equal to (signed) 2 6t/3nt 1111 1010 rrrr rrrr
+BLT rel8 Branch if less than (signed) 2 6t/3nt 1111 1011 rrrr rrrr
+BGT rel8 Branch if greater than (signed) 2 6t/3nt 1111 1100 rrrr rrrr
+BLE rel8 Branch if less than or equal to (signed) 2 6t/3nt 1111 1101 rrrr rrrr
+BR rel8 Short unconditional branch 2 6 1111 1110 rrrr rrrr
+*/
+
+void xa_cpu::e_branch(u8 op)
+{
+ const u8 rel8 = m_program->read_byte(m_pc++);
+ switch (op & 0x0f)
+ {
+ case 0x00: bcc_rel8(rel8); break;
+ case 0x01: bcs_rel8(rel8); break;
+ case 0x02: bne_rel8(rel8); break;
+ case 0x03: beq_rel8(rel8); break;
+ case 0x04: bnv_rel8(rel8); break;
+ case 0x05: bov_rel8(rel8); break;
+ case 0x06: bpl_rel8(rel8); break;
+ case 0x07: bmi_rel8(rel8); break;
+ case 0x08: bg_rel8(rel8); break;
+ case 0x09: bl_rel8(rel8); break;
+ case 0x0a: bge_rel8(rel8); break;
+ case 0x0b: blt_rel8(rel8); break;
+ case 0x0c: bgt_rel8(rel8); break;
+ case 0x0d: ble_rel8(rel8); break;
+ case 0x0e: br_rel8(rel8); break;
+ case 0x0f: LOGMASKED(LOG_DEBUG, "Illegal branch type"); do_nop(); break; // probably acts as 'branch never'
+ }
+}
+
+/*
+BKPT Cause the breakpoint trap to be executed. 1 23/19(PZ) 1111 1111
+*/
+void xa_cpu::e_bkpt(u8 op)
+{
+ fatalerror( "BKPT");
+}
+
+
+/*****************************************************************************/
+
+void xa_cpu::device_start()
+{
+ m_program = &space(AS_PROGRAM);
+ m_data = &space(AS_DATA);
+ m_sfr = &space(AS_IO);
+
+ state_add(STATE_GENPC, "GENPC", m_pc).formatstr("%08X");
+ state_add(STATE_GENPCBASE, "CURPC", m_pc).callexport().noshow();
+
+ state_add(XA_BANK0_R0, "BANK0_R0", m_regs[0]);
+ state_add(XA_BANK0_R1, "BANK0_R1", m_regs[1]);
+ state_add(XA_BANK0_R2, "BANK0_R2", m_regs[2]);
+ state_add(XA_BANK0_R3, "BANK0_R3", m_regs[3]);
+
+ state_add(XA_BANK1_R0, "BANK1_R0", m_regs[4]);
+ state_add(XA_BANK1_R1, "BANK1_R1", m_regs[5]);
+ state_add(XA_BANK1_R2, "BANK1_R2", m_regs[6]);
+ state_add(XA_BANK1_R3, "BANK1_R3", m_regs[7]);
+
+ state_add(XA_BANK2_R0, "BANK2_R0", m_regs[8]);
+ state_add(XA_BANK2_R1, "BANK2_R1", m_regs[9]);
+ state_add(XA_BANK2_R2, "BANK2_R2", m_regs[10]);
+ state_add(XA_BANK2_R3, "BANK2_R3", m_regs[11]);
+
+ state_add(XA_BANK3_R0, "BANK3_R0", m_regs[12]);
+ state_add(XA_BANK3_R1, "BANK3_R1", m_regs[13]);
+ state_add(XA_BANK3_R2, "BANK3_R2", m_regs[14]);
+ state_add(XA_BANK3_R3, "BANK3_R3", m_regs[15]);
+
+ state_add(XA_R4, "R4", m_regs[16]);
+ state_add(XA_R5, "R5", m_regs[17]);
+ state_add(XA_R6, "R6", m_regs[18]);
+// state_add(XA_R7, "R7", m_usermode ? m_USP : m_SSP);
+
+ state_add(XA_USP, "R7 USP", m_USP);
+ state_add(XA_SSP, "R7 SSP", m_SSP);
+
+ set_icountptr(m_icount);
+
+ save_item(NAME(m_im));
+ save_item(NAME(m_rs));
+ save_item(NAME(m_zflag));
+ save_item(NAME(m_nflag));
+ save_item(NAME(m_vflag));
+ save_item(NAME(m_cflag));
+ save_item(NAME(m_acflag));
+ save_item(NAME(m_sm_flag));
+ save_item(NAME(m_tm_flag));
+ save_item(NAME(m_p_flag));
+ save_item(NAME(m_f0_flag));
+ save_item(NAME(m_f1_flag));
+ save_item(NAME(m_pc));
+ save_item(NAME(m_usermode));
+ save_item(NAME(m_pagezeromode));
+ save_item(NAME(m_USP));
+ save_item(NAME(m_SSP));
+ save_item(NAME(m_WDCON));
+ save_item(NAME(m_SCR));
+ save_item(NAME(m_IEL));
+ save_item(NAME(m_regs));
+ save_item(NAME(m_PSWL));
+ save_item(NAME(m_PSWH));
+ save_item(NAME(m_regbank));
+
+ save_item(NAME(m_PxCFGA));
+ save_item(NAME(m_PxCFGB));
+
+ save_item(NAME(m_in_interrupt));
+ save_item(NAME(m_irq_pending));
+
+}
+
+void xa_cpu::device_reset()
+{
+ u16 temppsw = m_program->read_word(0);
+ sfr_PSWL_w(temppsw & 0xff);
+ sfr_PSWH_w((temppsw >> 8) & 0xff);
+ m_pc = m_program->read_word(2);
+
+ m_WDCON = 0x00;
+ m_SCR = 0x00;
+ m_IEL = 0x00;
+
+ m_USP = 0x0100;
+ m_SSP = 0x0100;
+
+ for (int i = 0; i < 4 * 4 + 4; i++)
+ {
+ m_regs[i] = 0x0000;
+ }
+
+ m_nflag = 0;
+ m_zflag = 0;
+ m_cflag = 0;
+ m_vflag = 0;
+ m_acflag = 0;
+
+ m_pagezeromode = 1;
+
+ m_in_interrupt = 0;
+ m_irq_pending = 0;
+
+ for (int i = 0; i < 4; i++)
+ {
+ m_PxCFGA[i] = 0;
+ m_PxCFGB[i] = 0;
+ }
+}
+
+/*****************************************************************************/
+
+void xa_cpu::check_external_irq_level(int level)
+{
+ if (m_IEL & 0x80)
+ {
+ if (m_IEL & (1 << level))
+ {
+ if (m_irq_pending & (1 << level))
+ {
+ LOGMASKED(LOG_DEBUG, "testing irq %d\n", level);
+ int vector = 0x20 + level;
+ push_word_to_system_stack(sfr_PSWH_r());
+ push_word_to_system_stack(sfr_PSWL_r());
+ push_word_to_system_stack(m_pc);
+
+ u16 temppsw = m_program->read_word(vector*4);
+ sfr_PSWL_w(temppsw & 0xff);
+ sfr_PSWH_w((temppsw >> 8) & 0xff);
+ m_pc = m_program->read_word((vector*4)+2);
+ m_in_interrupt = 1;
+ m_irq_pending &= ~(1 << level);
+ standard_irq_callback(level, m_pc);
+ }
+ }
+ }
+}
+
+void xa_cpu::check_interrupts()
+{
+ if (m_irq_pending)
+ {
+ if (!m_in_interrupt)
+ {
+ for (int i = 0; i < 4; i++)
+ check_external_irq_level(i);
+ }
+ }
+
+}
+
+void xa_cpu::execute_set_input(int inputnum, int state)
+{
+ // This is not accurate, just test code for fearless/superkds
+ if (state)
+ m_irq_pending |= 1 << inputnum;
+ check_interrupts();
+}
+
+void xa_cpu::execute_run()
+{
+ while (m_icount > 0)
+ {
+ check_interrupts();
+
+ debugger_instruction_hook(m_pc);
+ u32 oldpc = m_pc;
+ u8 op = m_program->read_byte(m_pc++);
+ int old_icount = m_icount;
+ (this->*s_instruction[op])(op);
+ if (m_icount == old_icount)
+ fatalerror("op at %06x took no cycles\n", oldpc);
+ }
+}
diff --git a/src/devices/cpu/xa/xa.h b/src/devices/cpu/xa/xa.h
new file mode 100644
index 00000000000..bf09ec1c5f4
--- /dev/null
+++ b/src/devices/cpu/xa/xa.h
@@ -0,0 +1,968 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#ifndef MAME_CPU_XA_XA_H
+#define MAME_CPU_XA_XA_H
+
+#pragma once
+
+enum {
+ XA_EXT_IRQ0,
+ XA_EXT_IRQ1,
+ XA_EXT_IRQ2,
+ XA_EXT_IRQ3,
+};
+
+enum {
+ XA_BANK0_R0,
+ XA_BANK0_R1,
+ XA_BANK0_R2,
+ XA_BANK0_R3,
+
+ XA_BANK1_R0,
+ XA_BANK1_R1,
+ XA_BANK1_R2,
+ XA_BANK1_R3,
+
+ XA_BANK2_R0,
+ XA_BANK2_R1,
+ XA_BANK2_R2,
+ XA_BANK2_R3,
+
+ XA_BANK3_R0,
+ XA_BANK3_R1,
+ XA_BANK3_R2,
+ XA_BANK3_R3,
+
+ XA_R4,
+ XA_R5,
+ XA_R6,
+ XA_R7,
+
+ XA_USP,
+ XA_SSP,
+};
+
+
+class xa_cpu : public cpu_device
+{
+public:
+ xa_cpu(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ template <unsigned N> auto port_in_cb() { return m_port_in_cb[N].bind(); }
+ template <unsigned N> auto port_out_cb() { return m_port_out_cb[N].bind(); }
+
+protected:
+ xa_cpu(const machine_config& mconfig, device_type type, const char* tag, device_t* owner, uint32_t clock, address_map_constructor prg_map, address_map_constructor dat_map);
+
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
+ virtual uint32_t execute_max_cycles() const noexcept override { return 5; }
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ virtual space_config_vector memory_space_config() const override;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+private:
+ void internal_map(address_map &map) ATTR_COLD;
+ void internal_data_map(address_map &map) ATTR_COLD;
+ void data_map(address_map &map) ATTR_COLD;
+ void sfr_map(address_map &map) ATTR_COLD;
+
+ address_space_config m_program_config;
+ address_space_config m_data_config;
+ address_space_config m_sfr_config;
+
+ struct mem_info {
+ int addr;
+ const char *name;
+ };
+
+
+ static const mem_info default_names[];
+ void add_names(const mem_info *info);
+
+ std::string get_data_address(u16 arg) const;
+
+ typedef void (xa_cpu::*op_func) (u8 op);
+ static const op_func s_instruction[256];
+
+ const char* m_regnames16[16] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal" };
+ const char* m_regnames8[16] = { "R0L", "R0H", "R1L", "R1H", "R2L", "R2H", "R3L", "R3H", "R4L", "R4H", "R5L", "R5H", "R6L", "R6H", "R7L", "R7H"};
+
+ std::string get_bittext(int bit);
+ std::string get_directtext(int bit);
+ std::string show_expanded_data4(u16 data4, int size);
+ std::string get_word_reglist(u8 op2);
+ std::string get_byte_reglist(u8 op2, int h);
+
+ void check_external_irq_level(int level);
+ void check_interrupts();
+
+ u16 expand_rel16(u16 rel16);
+ u16 expand_rel8(u8 rel8);
+
+ void cy(u8 cycles)
+ {
+ m_icount -= cycles;
+ }
+
+ void do_nz_flags_16(u16 data);
+ void do_nz_flags_8(u8 data);
+
+ u8 get_n_flag() { return m_nflag; }
+ void set_n_flag() { m_nflag = 1; }
+ void clear_n_flag() { m_nflag = 0; }
+
+ u8 get_z_flag() { return m_zflag; }
+ void set_z_flag() { m_zflag = 1; }
+ void clear_z_flag() { m_zflag = 0; }
+
+ u8 get_c_flag() { return m_cflag; }
+ void set_c_flag() { m_cflag = 1; }
+ void clear_c_flag() { m_cflag = 0; }
+
+ u8 get_v_flag() { return m_vflag; }
+ void set_v_flag() { m_vflag = 1; }
+ void clear_v_flag() { m_vflag = 0; }
+
+ u8 get_ac_flag() { return m_acflag; }
+ void set_ac_flag() { m_acflag = 1; }
+ void clear_ac_flag() { m_acflag = 0; }
+
+
+ u8 gr8(int reg);
+ void sr8(int reg, u8 data);
+
+ u16 gr16(int reg);
+ void sr16(int reg, u16 data);
+
+ u32 gr32(int reg);
+ void sr32(int reg, u32 data);
+
+ void set_pc_in_current_page(u16 addr);
+
+ void push_word_reglist(u8 op2, int h, bool force_user);
+ void pull_word_reglist(u8 op2, int h, bool force_user);
+ void push_byte_reglist(u8 op2, int h, bool force_user);
+ void pull_byte_reglist(u8 op2, int h, bool force_user);
+
+ void push_word_to_user_stack(u16 data);
+ void push_word_to_system_stack(u16 data);
+ void push_word_to_stack(u16 data);
+
+ u16 pull_word_from_user_stack();
+ u16 pull_word_from_system_stack();
+ u16 pull_word_from_stack();
+
+ void push_byte_to_user_stack(u8 data);
+ void push_byte_to_system_stack(u8 data);
+ void push_byte_to_stack(u16 data);
+
+ u8 pull_byte_from_user_stack();
+ u8 pull_byte_from_system_stack();
+ u8 pull_byte_from_stack();
+
+ void wdat8(int address, u8 data);
+ void wdat16(int address, u16 data);
+
+ u8 rdat8(int address);
+ u16 rdat16(int address);
+
+ u8 sfr_WDCON_r();
+
+ u8 sfr_PSWL_r();
+ void sfr_PSWL_w(u8 data);
+
+ u8 sfr_PSWH_r();
+ void sfr_PSWH_w(u8 data);
+ void sfr_PSW51_w(u8 data);
+
+ void sfr_SCR_w(u8 data);
+ void sfr_WFEED1_w(u8 data);
+ void sfr_WFEED2_w(u8 data);
+
+ u8 sfr_IEL_r();
+ void sfr_IEL_w(u8 data);
+
+ u8 sfr_port_r(offs_t offset);
+ void sfr_port_w(offs_t offset, u8 data);
+
+ u8 sfr_PxCFGA_r(offs_t offset);
+ void sfr_PxCFGA_w(offs_t offset, u8 data);
+
+ u8 sfr_PxCFGB_r(offs_t offset);
+ void sfr_PxCFGB_w(offs_t offset, u8 data);
+
+ void set_bit_8_helper(u16 bit, u8 val);
+
+ u32 asl32_helper(u32 fullreg, u8 amount);
+ u32 lsr32_helper(u32 fullreg, u8 amount);
+ u16 lsr16_helper(u16 fullreg, u8 amount);
+
+ u8 read_direct8(u16 addr);
+ u16 read_direct16(u16 addr);
+
+ void write_direct8(u16 addr, u8 data);
+ void write_direct16(u16 addr, u16 data);
+
+ u16 do_subb_16(u16 val1, u16 val2);
+ u16 do_sub_16(u16 val1, u16 val2);
+ u16 do_sub_16_helper(u16 val1, u16 val2, u8 c);
+
+ u16 do_addc_16(u16 val1, u16 val2);
+ u16 do_add_16(u16 val1, u16 val2);
+ u16 do_add_16_helper(u16 val1, u16 val2, u8 c);
+
+ u16 do_xor_16(u16 val1, u16 val2);
+ u16 do_or_16(u16 val1, u16 val2);
+ u16 do_and_16(u16 val1, u16 val2);
+
+ u8 do_sub_8(u8 val1, u8 val2);
+ u8 do_subb_8(u8 val1, u8 val2);
+ u8 do_sub_8_helper(u8 val1, u8 val2, u8 c);
+
+ u8 do_add_8(u8 val1, u8 val2);
+ u8 do_addc_8(u8 val1, u8 val2);
+ u8 do_add_8_helper(u8 val1, u8 val2, u8 c);
+
+ u8 do_xor_8(u8 val1, u8 val2);
+ u8 do_or_8(u8 val1, u8 val2);
+ u8 do_and_8(u8 val1, u8 val2);
+
+ u8 do_cjne_8_helper(u8 val1, u8 val2);
+
+ void handle_alu_type0(u8 op, int alu_op);
+ void handle_alu_type1(u8 op, u8 op2);
+ void handle_push_rlist(u8 op);
+ void handle_pushu_rlist(u8 op);
+ void handle_pop_rlist(u8 op);
+ void handle_popu_rlist(u8 op);
+ void handle_adds_movs(u8 op, int which);
+ void handle_shift(u8 op, int shift_type);
+
+ void e_illegal(u8 op);
+
+ void e_nop(u8 op);
+ void e_bitgroup(u8 op);
+ void e_add(u8 op);
+ void e_push_rlist(u8 op);
+ void e_addc(u8 op);
+ void e_pushu_rlist(u8 op);
+ void e_sub(u8 op);
+ void e_pop_rlist(u8 op);
+ void e_subb(u8 op);
+ void e_popu_rlist(u8 op);
+ void e_lea_offset8(u8 op);
+ void e_lea_offset16(u8 op);
+ void e_cmp(u8 op);
+ void e_xch_type1(u8 op);
+ void e_and(u8 op);
+ void e_xch_type2(u8 op);
+ void e_or(u8 op);
+ void e_xor(u8 op);
+ void e_movc_rd_rsinc(u8 op);
+ void e_mov(u8 op);
+ void e_pushpop_djnz_subgroup(u8 op);
+ void e_g9_subgroup(u8 op);
+ void e_alu(u8 op);
+ void e_jb_mov_subgroup(u8 op);
+ void e_movdir(u8 op);
+ void e_adds(u8 op);
+ void e_movx_subgroup(u8 op);
+ void e_rr(u8 op);
+ void e_movs(u8 op);
+ void e_rrc(u8 op);
+ void e_lsr_fc(u8 op);
+ void e_asl_c(u8 op);
+ void e_asr_c(u8 op);
+ void e_norm(u8 op);
+ void e_lsr_fj(u8 op);
+ void e_asl_j(u8 op);
+ void e_asr_j(u8 op);
+ void e_rl(u8 op);
+ void e_rlc(u8 op);
+ void e_djnz_cjne(u8 op);
+ void e_mulu_b(u8 op);
+ void e_divu_b(u8 op);
+ void e_mulu_w(u8 op);
+ void e_divu_w(u8 op);
+ void e_mul_w(u8 op);
+ void e_div_w(u8 op);
+ void e_div_data8(u8 op);
+ void e_div_d16(u8 op);
+ void e_divu_d(u8 op);
+ void e_div_d(u8 op);
+ void e_cjne_d8(u8 op);
+ void e_cjne_d16(u8 op);
+ void e_jz_rel8(u8 op);
+ void e_jnz_rel8(u8 op);
+ void e_branch(u8 op);
+ void e_bkpt(u8 op);
+
+ void do_nop();
+
+ void add_byte_rd_data8(u8 rd, u8 data8);
+ void addc_byte_rd_data8(u8 rd, u8 data8);
+ void sub_byte_rd_data8(u8 rd, u8 data8);
+ void subb_byte_rd_data8(u8 rd, u8 data8);
+ void cmp_byte_rd_data8(u8 rd, u8 data8);
+ void and_byte_rd_data8(u8 rd, u8 data8);
+ void or_byte_rd_data8(u8 rd, u8 data8);
+ void xor_byte_rd_data8(u8 rd, u8 data8);
+ void mov_byte_rd_data8(u8 rd, u8 data8);
+
+ void add_byte_indrd_data8(u8 rd, u8 data8);
+ void addc_byte_indrd_data8(u8 rd, u8 data8);
+ void sub_byte_indrd_data8(u8 rd, u8 data8);
+ void subb_byte_indrd_data8(u8 rd, u8 data8);
+ void cmp_byte_indrd_data8(u8 rd, u8 data8);
+ void and_byte_indrd_data8(u8 rd, u8 data8);
+ void or_byte_indrd_data8(u8 rd, u8 data8);
+ void xor_byte_indrd_data8(u8 rd, u8 data8);
+ void mov_byte_indrd_data8(u8 rd, u8 data8);
+
+ void add_byte_indrdinc_data8(u8 rd, u8 data8);
+ void addc_byte_indrdinc_data8(u8 rd, u8 data8);
+ void sub_byte_indrdinc_data8(u8 rd, u8 data8);
+ void subb_byte_indrdinc_data8(u8 rd, u8 data8);
+ void cmp_byte_indrdinc_data8(u8 rd, u8 data8);
+ void and_byte_indrdinc_data8(u8 rd, u8 data8);
+ void or_byte_indrdinc_data8(u8 rd, u8 data8);
+ void xor_byte_indrdinc_data8(u8 rd, u8 data8);
+ void mov_byte_indrdinc_data8(u8 rd, u8 data8);
+
+ void add_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void addc_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void sub_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void subb_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void cmp_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void and_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void or_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void xor_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+ void mov_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8);
+
+ void add_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void addc_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void sub_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void subb_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void cmp_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void and_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void or_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void xor_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+ void mov_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8);
+
+ void add_byte_direct_data8(u16 direct, u8 data8);
+ void addc_byte_direct_data8(u16 direct, u8 data8);
+ void sub_byte_direct_data8(u16 direct, u8 data8);
+ void subb_byte_direct_data8(u16 direct, u8 data8);
+ void cmp_byte_direct_data8(u16 direct, u8 data8);
+ void and_byte_direct_data8(u16 direct, u8 data8);
+ void or_byte_direct_data8(u16 direct, u8 data8);
+ void xor_byte_direct_data8(u16 direct, u8 data8);
+ void mov_byte_direct_data8(u16 direct, u8 data8);
+
+ void add_word_rd_data16(u8 rd, u16 data16);
+ void addc_word_rd_data16(u8 rd, u16 data16);
+ void sub_word_rd_data16(u8 rd, u16 data16);
+ void subb_word_rd_data16(u8 rd, u16 data16);
+ void cmp_word_rd_data16(u8 rd, u16 data16);
+ void and_word_rd_data16(u8 rd, u16 data16);
+ void or_word_rd_data16(u8 rd, u16 data16);
+ void xor_word_rd_data16(u8 rd, u16 data16);
+ void mov_word_rd_data16(u8 rd, u16 data16);
+
+ void add_word_indrd_data16(u8 rd, u16 data16);
+ void addc_word_indrd_data16(u8 rd, u16 data16);
+ void sub_word_indrd_data16(u8 rd, u16 data16);
+ void subb_word_indrd_data16(u8 rd, u16 data16);
+ void cmp_word_indrd_data16(u8 rd, u16 data16);
+ void and_word_indrd_data16(u8 rd, u16 data16);
+ void or_word_indrd_data16(u8 rd, u16 data16);
+ void xor_word_indrd_data16(u8 rd, u16 data16);
+ void mov_word_indrd_data16(u8 rd, u16 data16);
+
+ void add_word_indrdinc_data16(u8 rd, u16 data16);
+ void addc_word_indrdinc_data16(u8 rd, u16 data16);
+ void sub_word_indrdinc_data16(u8 rd, u16 data16);
+ void subb_word_indrdinc_data16(u8 rd, u16 data16);
+ void cmp_word_indrdinc_data16(u8 rd, u16 data16);
+ void and_word_indrdinc_data16(u8 rd, u16 data16);
+ void or_word_indrdinc_data16(u8 rd, u16 data16);
+ void xor_word_indrdinc_data16(u8 rd, u16 data16);
+ void mov_word_indrdinc_data16(u8 rd, u16 data16);
+
+ void add_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void addc_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void sub_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void subb_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void cmp_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void and_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void or_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void xor_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+ void mov_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16);
+
+ void add_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void addc_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void sub_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void subb_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void cmp_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void and_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void or_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void xor_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+ void mov_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16);
+
+ void add_word_direct_data16(u16 direct, u16 data16);
+ void addc_word_direct_data16(u16 direct, u16 data16);
+ void sub_word_direct_data16(u16 direct, u16 data16);
+ void subb_word_direct_data16(u16 direct, u16 data16);
+ void cmp_word_direct_data16(u16 direct, u16 data16);
+ void and_word_direct_data16(u16 direct, u16 data16);
+ void or_word_direct_data16(u16 direct, u16 data16);
+ void xor_word_direct_data16(u16 direct, u16 data16);
+ void mov_word_direct_data16(u16 direct, u16 data16);
+
+ void aluop_word_rd_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_byte_rd_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_word_rd_indrs(int alu_op, u8 rd, u8 rs);
+ void aluop_byte_rd_indrs(int alu_op, u8 rd, u8 rs);
+ void aluop_word_indrd_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_byte_indrd_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_word_rd_indrsinc(int alu_op, u8 rd, u8 rs);
+ void aluop_byte_rd_indrsinc(int alu_op, u8 rd, u8 rs);
+ void aluop_word_indrdinc_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_byte_indrdinc_rs(int alu_op, u8 rd, u8 rs);
+ void aluop_word_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8);
+ void aluop_byte_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8);
+ void aluop_word_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs);
+ void aluop_byte_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs);
+ void aluop_word_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16);
+ void aluop_byte_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16);
+ void aluop_word_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs);
+ void aluop_byte_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs);
+ void aluop_word_rd_direct(int alu_op, u8 rd, u16 direct);
+ void aluop_byte_rd_direct(int alu_op, u8 rd, u16 direct);
+ void aluop_word_direct_rs(int alu_op, u16 direct, u8 rs);
+ void aluop_byte_direct_rs(int alu_op, u16 direct, u8 rs);
+
+ void aluop_byte_rd_data8(int alu_op, u8 rd, u8 data8);
+ void aluop_byte_indrd_data8(int alu_op, u8 rd, u8 data8);
+ void aluop_byte_indrdinc_data8(int alu_op, u8 rd, u8 data8);
+ void aluop_byte_rdoff8_data8(int alu_op, u8 rd, u8 offset8, u8 data8);
+ void aluop_byte_rdoff16_data8(int alu_op, u8 rd, u16 offset16, u8 data8);
+ void aluop_byte_direct_data8(int alu_op, u16 direct, u8 data8);
+ void aluop_byte_rd_data16(int alu_op, u8 rd, u16 data16);
+ void aluop_byte_indrd_data16(int alu_op, u8 rd, u16 data16);
+ void aluop_byte_indrdinc_data16(int alu_op, u8 rd, u16 data16);
+ void aluop_byte_rdoff8_data16(int alu_op, u8 rd, u8 offset8, u16 data16);
+ void aluop_byte_rdoff16_data16(int alu_op, u8 rd, u16 offset16, u16 data16);
+ void aluop_byte_direct_data16(int alu_op, u16 direct, u16 data16);
+
+ void add_word_rd_rs(u8 rd, u8 rs);
+ void addc_word_rd_rs(u8 rd, u8 rs);
+ void sub_word_rd_rs(u8 rd, u8 rs);
+ void subb_word_rd_rs(u8 rd, u8 rs);
+ void cmp_word_rd_rs(u8 rd, u8 rs);
+ void and_word_rd_rs(u8 rd, u8 rs);
+ void or_word_rd_rs(u8 rd, u8 rs);
+ void xor_word_rd_rs(u8 rd, u8 rs);
+ void mov_word_rd_rs(u8 rd, u8 rs);
+
+ void add_byte_rd_rs(u8 rd, u8 rs);
+ void addc_byte_rd_rs(u8 rd, u8 rs);
+ void sub_byte_rd_rs(u8 rd, u8 rs);
+ void subb_byte_rd_rs(u8 rd, u8 rs);
+ void cmp_byte_rd_rs(u8 rd, u8 rs);
+ void and_byte_rd_rs(u8 rd, u8 rs);
+ void or_byte_rd_rs(u8 rd, u8 rs);
+ void xor_byte_rd_rs(u8 rd, u8 rs);
+ void mov_byte_rd_rs(u8 rd, u8 rs);
+
+ void add_word_rd_indrs(u8 rd, u8 rs);
+ void addc_word_rd_indrs(u8 rd, u8 rs);
+ void sub_word_rd_indrs(u8 rd, u8 rs);
+ void subb_word_rd_indrs(u8 rd, u8 rs);
+ void cmp_word_rd_indrs(u8 rd, u8 rs);
+ void and_word_rd_indrs(u8 rd, u8 rs);
+ void or_word_rd_indrs(u8 rd, u8 rs);
+ void xor_word_rd_indrs(u8 rd, u8 rs);
+ void mov_word_rd_indrs(u8 rd, u8 rs);
+
+ void add_byte_rd_indrs(u8 rd, u8 rs);
+ void addc_byte_rd_indrs(u8 rd, u8 rs);
+ void sub_byte_rd_indrs(u8 rd, u8 rs);
+ void subb_byte_rd_indrs(u8 rd, u8 rs);
+ void cmp_byte_rd_indrs(u8 rd, u8 rs);
+ void and_byte_rd_indrs(u8 rd, u8 rs);
+ void or_byte_rd_indrs(u8 rd, u8 rs);
+ void xor_byte_rd_indrs(u8 rd, u8 rs);
+ void mov_byte_rd_indrs(u8 rd, u8 rs);
+
+ void add_word_indrd_rs(u8 rd, u8 rs);
+ void addc_word_indrd_rs(u8 rd, u8 rs);
+ void sub_word_indrd_rs(u8 rd, u8 rs);
+ void subb_word_indrd_rs(u8 rd, u8 rs);
+ void cmp_word_indrd_rs(u8 rd, u8 rs);
+ void and_word_indrd_rs(u8 rd, u8 rs);
+ void or_word_indrd_rs(u8 rd, u8 rs);
+ void xor_word_indrd_rs(u8 rd, u8 rs);
+ void mov_word_indrd_rs(u8 rd, u8 rs);
+
+ void add_byte_indrd_rs(u8 rd, u8 rs);
+ void addc_byte_indrd_rs(u8 rd, u8 rs);
+ void sub_byte_indrd_rs(u8 rd, u8 rs);
+ void subb_byte_indrd_rs(u8 rd, u8 rs);
+ void cmp_byte_indrd_rs(u8 rd, u8 rs);
+ void and_byte_indrd_rs(u8 rd, u8 rs);
+ void or_byte_indrd_rs(u8 rd, u8 rs);
+ void xor_byte_indrd_rs(u8 rd, u8 rs);
+ void mov_byte_indrd_rs(u8 rd, u8 rs);
+
+ void add_word_rd_indrsinc(u8 rd, u8 rs);
+ void addc_word_rd_indrsinc(u8 rd, u8 rs);
+ void sub_word_rd_indrsinc(u8 rd, u8 rs);
+ void subb_word_rd_indrsinc(u8 rd, u8 rs);
+ void cmp_word_rd_indrsinc(u8 rd, u8 rs);
+ void and_word_rd_indrsinc(u8 rd, u8 rs);
+ void or_word_rd_indrsinc(u8 rd, u8 rs);
+ void xor_word_rd_indrsinc(u8 rd, u8 rs);
+ void mov_word_rd_indrsinc(u8 rd, u8 rs);
+
+ void add_byte_rd_indrsinc(u8 rd, u8 rs);
+ void addc_byte_rd_indrsinc(u8 rd, u8 rs);
+ void sub_byte_rd_indrsinc(u8 rd, u8 rs);
+ void subb_byte_rd_indrsinc(u8 rd, u8 rs);
+ void cmp_byte_rd_indrsinc(u8 rd, u8 rs);
+ void and_byte_rd_indrsinc(u8 rd, u8 rs);
+ void or_byte_rd_indrsinc(u8 rd, u8 rs);
+ void xor_byte_rd_indrsinc(u8 rd, u8 rs);
+ void mov_byte_rd_indrsinc(u8 rd, u8 rs);
+
+ void add_word_indrdinc_rs(u8 rd, u8 rs);
+ void addc_word_indrdinc_rs(u8 rd, u8 rs);
+ void sub_word_indrdinc_rs(u8 rd, u8 rs);
+ void subb_word_indrdinc_rs(u8 rd, u8 rs);
+ void cmp_word_indrdinc_rs(u8 rd, u8 rs);
+ void and_word_indrdinc_rs(u8 rd, u8 rs);
+ void or_word_indrdinc_rs(u8 rd, u8 rs);
+ void xor_word_indrdinc_rs(u8 rd, u8 rs);
+ void mov_word_indrdinc_rs(u8 rd, u8 rs);
+
+ void add_byte_indrdinc_rs(u8 rd, u8 rs);
+ void addc_byte_indrdinc_rs(u8 rd, u8 rs);
+ void sub_byte_indrdinc_rs(u8 rd, u8 rs);
+ void subb_byte_indrdinc_rs(u8 rd, u8 rs);
+ void cmp_byte_indrdinc_rs(u8 rd, u8 rs);
+ void and_byte_indrdinc_rs(u8 rd, u8 rs);
+ void or_byte_indrdinc_rs(u8 rd, u8 rs);
+ void xor_byte_indrdinc_rs(u8 rd, u8 rs);
+ void mov_byte_indrdinc_rs(u8 rd, u8 rs);
+
+ void add_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void addc_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void sub_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void subb_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void cmp_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void and_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void or_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void xor_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void mov_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+
+ void add_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void addc_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void sub_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void subb_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void cmp_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void and_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void or_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void xor_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+ void mov_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8);
+
+ void add_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void addc_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void sub_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void subb_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void cmp_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void and_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void or_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void xor_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void mov_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+
+ void add_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void addc_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void sub_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void subb_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void cmp_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void and_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void or_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void xor_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+ void mov_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs);
+
+ void add_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void addc_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void sub_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void subb_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void cmp_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void and_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void or_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void xor_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void mov_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+
+ void add_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void addc_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void sub_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void subb_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void cmp_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void and_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void or_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void xor_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+ void mov_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16);
+
+ void add_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void addc_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void sub_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void subb_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void cmp_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void and_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void or_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void xor_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void mov_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+
+ void add_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void addc_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void sub_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void subb_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void cmp_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void and_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void or_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void xor_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+ void mov_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs);
+
+ void add_word_rd_direct(u8 rd, u16 direct);
+ void addc_word_rd_direct(u8 rd, u16 direct);
+ void sub_word_rd_direct(u8 rd, u16 direct);
+ void subb_word_rd_direct(u8 rd, u16 direct);
+ void cmp_word_rd_direct(u8 rd, u16 direct);
+ void and_word_rd_direct(u8 rd, u16 direct);
+ void or_word_rd_direct(u8 rd, u16 direct);
+ void xor_word_rd_direct(u8 rd, u16 direct);
+ void mov_word_rd_direct(u8 rd, u16 direct);
+
+ void add_byte_rd_direct(u8 rd, u16 direct);
+ void addc_byte_rd_direct(u8 rd, u16 direct);
+ void sub_byte_rd_direct(u8 rd, u16 direct);
+ void subb_byte_rd_direct(u8 rd, u16 direct);
+ void cmp_byte_rd_direct(u8 rd, u16 direct);
+ void and_byte_rd_direct(u8 rd, u16 direct);
+ void or_byte_rd_direct(u8 rd, u16 direct);
+ void xor_byte_rd_direct(u8 rd, u16 direct);
+ void mov_byte_rd_direct(u8 rd, u16 direct);
+
+ void add_word_direct_rs(u16 direct, u8 rs);
+ void addc_word_direct_rs(u16 direct, u8 rs);
+ void sub_word_direct_rs(u16 direct, u8 rs);
+ void subb_word_direct_rs(u16 direct, u8 rs);
+ void cmp_word_direct_rs(u16 direct, u8 rs);
+ void and_word_direct_rs(u16 direct, u8 rs);
+ void or_word_direct_rs(u16 direct, u8 rs);
+ void xor_word_direct_rs(u16 direct, u8 rs);
+ void mov_word_direct_rs(u16 direct, u8 rs);
+
+ void add_byte_direct_rs(u16 direct, u8 rs);
+ void addc_byte_direct_rs(u16 direct, u8 rs);
+ void sub_byte_direct_rs(u16 direct, u8 rs);
+ void subb_byte_direct_rs(u16 direct, u8 rs);
+ void cmp_byte_direct_rs(u16 direct, u8 rs);
+ void and_byte_direct_rs(u16 direct, u8 rs);
+ void or_byte_direct_rs(u16 direct, u8 rs);
+ void xor_byte_direct_rs(u16 direct, u8 rs);
+ void mov_byte_direct_rs(u16 direct, u8 rs);
+
+ void movs_word_rd_data4(u8 rd, u8 data4);
+ void movs_byte_rd_data4(u8 rd, u8 data4);
+ void adds_word_rd_data4(u8 rd, u8 data4);
+ void adds_byte_rd_data4(u8 rd, u8 data4);
+
+ void movs_word_indrd_data4(u8 rd, u8 data4);
+ void movs_byte_indrd_data4(u8 rd, u8 data4);
+ void adds_word_indrd_data4(u8 rd, u8 data4);
+ void adds_byte_indrd_data4(u8 rd, u8 data4);
+
+ void movs_word_indrdinc_data4(u8 rd, u8 data4);
+ void movs_byte_indrdinc_data4(u8 rd, u8 data4);
+ void adds_word_indrdinc_data4(u8 rd, u8 data4);
+ void adds_byte_indrdinc_data4(u8 rd, u8 data4);
+
+ void movs_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
+ void movs_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
+ void adds_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
+ void adds_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4);
+
+ void movs_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
+ void movs_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
+ void adds_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
+ void adds_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4);
+
+ void movs_word_direct_data4(u16 direct, u8 data4);
+ void movs_byte_direct_data4(u16 direct, u8 data4);
+ void adds_word_direct_data4(u16 direct, u8 data4);
+ void adds_byte_direct_data4(u16 direct, u8 data4);
+
+ void call_rel16(u16 rel16);
+
+ void bcc_rel8(u8 rel8);
+ void bcs_rel8(u8 rel8);
+ void bne_rel8(u8 rel8);
+ void beq_rel8(u8 rel8);
+ void bnv_rel8(u8 rel8);
+ void bov_rel8(u8 rel8);
+ void bpl_rel8(u8 rel8);
+ void bmi_rel8(u8 rel8);
+ void bg_rel8(u8 rel8);
+ void bl_rel8(u8 rel8);
+ void bge_rel8(u8 rel8);
+ void blt_rel8(u8 rel8);
+ void bgt_rel8(u8 rel8);
+ void ble_rel8(u8 rel8);
+ void br_rel8(u8 rel8);
+
+ void asl_byte_rd_imm4(u8 rd, u8 amount);
+ void asl_word_rd_imm4(u8 rd, u8 amount);
+ void asl_dword_rd_imm5(u8 rd, u8 amount);
+
+ void asr_byte_rd_imm4(u8 rd, u8 amount);
+ void asr_word_rd_imm4(u8 rd, u8 amount);
+ void asr_dword_rd_imm5(u8 rd, u8 amount);
+
+ void lsr_byte_rd_imm4(u8 rd, u8 amount);
+ void lsr_word_rd_imm4(u8 rd, u8 amount);
+ void lsr_dword_rd_imm5(u8 rd, u8 amount);
+
+ void asl_byte_rd_rs(u8 rd, u8 rs);
+ void asl_word_rd_rs(u8 rd, u8 rs);
+ void asl_dword_rd_rs(u8 rd, u8 rs);
+
+ void asr_byte_rd_rs(u8 rd, u8 rs);
+ void asr_word_rd_rs(u8 rd, u8 rs);
+ void asr_dword_rd_rs(u8 rd, u8 rs);
+
+ void lsr_byte_rd_rs(u8 rd, u8 rs);
+ void lsr_word_rd_rs(u8 rd, u8 rs);
+ void lsr_dword_rd_rs(u8 rd, u8 rs);
+
+ void norm_byte_rd_rs(u8 rd, u8 rs);
+ void norm_word_rd_rs(u8 rd, u8 rs);
+ void norm_dword_rd_rs(u8 rd, u8 rs);
+
+ void mulu_byte_rd_rs(u8 rd, u8 rs);
+ void divu_byte_rd_rs(u8 rd, u8 rs);
+ void mulu_word_rd_rs(u8 rd, u8 rs);
+ void divu_word_rd_rs(u8 rd, u8 rs);
+ void mul_word_rd_rs(u8 rd, u8 rs);
+ void div_word_rd_rs(u8 rd, u8 rs);
+ void div_word_rd_data8(u8 rd, u8 data8);
+ void divu_byte_rd_data8(u8 rd, u8 data8);
+ void divu_word_rd_data8(u8 rd, u8 data8);
+ void mulu_byte_rd_data8(u8 rd, u8 data8);
+ void mulu_word_rd_data16(u8 rd, u16 data16);
+ void mul_word_rd_data16(u8 rd, u16 data16);
+ void divu_dword_rd_data16(u8 rd, u16 data16);
+ void div_dword_rd_data16(u8 rd, u16 data16);
+ void divu_dword_rd_rs(u8 rd, u8 rs);
+ void div_dword_rd_rs(u8 rd, u8 rs);
+
+ void clr_bit(u16 bit);
+ void setb_bit(u16 bit);
+ void mov_c_bit(u16 bit);
+ void mov_bit_c(u16 bit);
+ void anl_c_bit(u16 bit);
+ void anl_c_notbit(u16 bit);
+ void orl_c_bit(u16 bit);
+ void orl_c_notbit(u16 bit);
+
+ void lea_word_rd_rs_off8(u8 rd, u8 rs, u8 offs8);
+ void lea_word_rd_rs_off16(u8 rd, u8 rs, u16 offs16);
+
+ void xch_word_rd_indrs(u8 rd, u8 rs);
+ void xch_byte_rd_indrs(u8 rd, u8 rs);
+ void xch_word_rd_rs(u8 rd, u8 rs);
+ void xch_byte_rd_rs(u8 rd, u8 rs);
+
+ void movc_word_rd_indrsinc(u8 rd, u8 rs);
+ void movc_byte_rd_indrsinc(u8 rd, u8 rs);
+
+ void djnz_word_rd_rel8(u8 rd, u8 rel8);
+ void djnz_byte_rd_rel8(u8 rd, u8 rel8);
+
+ void popu_word_direct(u16 direct);
+ void popu_byte_direct(u16 direct);
+ void pop_word_direct(u16 direct);
+ void pop_byte_direct(u16 direct);
+ void pushu_word_direct(u16 direct);
+ void pushu_byte_direct(u16 direct);
+ void push_word_direct(u16 direct);
+ void push_byte_direct(u16 direct);
+
+ void mov_word_indrdinc_indrsinc(u8 rd, u8 rs);
+ void mov_byte_indrdinc_indrsinc(u8 rd, u8 rs);
+
+ void da_rd(u8 rd);
+ void sext_word_rd(u8 rd);
+ void sext_byte_rd(u8 rd);
+ void cpl_word_rd(u8 rd);
+ void cpl_byte_rd(u8 rd);
+ void neg_word_rd(u8 rd);
+ void neg_byte_rd(u8 rd);
+ void movc_a_apc();
+ void movc_a_adptr();
+ void mov_rd_usp(u8 rd);
+ void mov_usp_rs(u8 rs);
+
+ void jb_bit_rel8(u16 bit, u8 rel8);
+ void jnb_bit_rel8(u16 bit, u8 rel8);
+ void jbc_bit_rel8(u16 bit, u8 rel8);
+
+ void mov_word_direct_direct(u16 direct1, u16 direct2);
+ void mov_byte_direct_direct(u16 direct1, u16 direct2);
+
+ void xch_word_rd_direct(u8 rd, u16 direct);
+ void xch_byte_rd_direct(u8 rd, u16 direct);
+
+ void mov_word_direct_indrs(u16 direct, u8 rs);
+ void mov_byte_direct_indrs(u16 direct, u8 rs);
+
+ void mov_word_indrd_direct(u8 rd, u16 direct);
+ void mov_byte_indrd_direct(u8 rd, u16 direct);
+
+ void movx_word_indrd_rs(u8 rd, u8 rs);
+ void movx_byte_indrd_rs(u8 rd, u8 rs);
+
+ void movx_word_rd_indrs(u8 rd, u8 rs);
+ void movx_byte_rd_indrs(u8 rd, u8 rs);
+
+ void rr_word_rd_data4(u8 rd, u8 data4);
+ void rr_byte_rd_data4(u8 rd, u8 data4);
+
+ void rrc_word_rd_data4(u8 rd, u8 data4);
+ void rrc_byte_rd_data4(u8 rd, u8 data4);
+
+ void rl_word_rd_data4(u8 rd, u8 data4);
+ void rl_byte_rd_data4(u8 rd, u8 data4);
+
+ void rlc_word_rd_data4(u8 rd, u8 data4);
+ void rlc_byte_rd_data4(u8 rd, u8 data4);
+
+ void fcall_addr24(u32 addr24);
+ void call_indrs(u8 rs);
+ void fjmp_addr24(u32 addr24);
+ void jmp_rel16(u16 rel16);
+
+ void djnz_word_direct_rel8(u16 direct, u8 rel8);
+ void djnz_byte_direct_rel8(u16 direct, u8 rel8);
+
+ void cjne_word_rd_direct_rel8(u8 rd, u16 direct, u8 rel8);
+ void cjne_byte_rd_direct_rel8(u8 rd, u16 direct, u8 rel8);
+
+ void cjne_indrd_data8_rel8(u8 rd, u8 data8, u8 rel8);
+ void cjne_rd_data8_rel8(u8 rd, u8 data8, u8 rel8);
+
+ void cjne_indrd_data16_rel8(u8 rd, u16 data16, u8 rel8);
+ void cjne_rd_data16_rel8(u8 rd, u16 data16, u8 rel8);
+
+ void reset();
+ void trap_data4(u8 data4);
+ void jmp_ind_adptr();
+ void jmp_dblindrs(u8 rs);
+ void jmp_indrs(u8 rs);
+ void ret();
+ void reti();
+
+ void jz_rel8(u8 rel8);
+ void jnz_rel8(u8 rel8);
+
+ void push_word_rlist(u8 bitfield, int h);
+ void push_byte_rlist(u8 bitfield, int h);
+
+ void pushu_word_rlist(u8 bitfield, int h);
+ void pushu_byte_rlist(u8 bitfield, int h);
+
+ void pop_word_rlist(u8 bitfield, int h);
+ void pop_byte_rlist(u8 bitfield, int h);
+
+ void popu_word_rlist(u8 bitfield, int h);
+ void popu_byte_rlist(u8 bitfield, int h);
+
+ std::unordered_map<offs_t, const char *> m_names;
+
+ u8 m_im;
+ u8 m_rs;
+ u8 m_zflag;
+ u8 m_nflag;
+ u8 m_vflag;
+ u8 m_cflag;
+ u8 m_acflag;
+ u8 m_sm_flag;
+ u8 m_tm_flag;
+ u8 m_p_flag;
+ u8 m_f0_flag;
+ u8 m_f1_flag;
+
+ uint32_t m_pc;
+
+ bool m_usermode;
+ u8 m_pagezeromode;
+
+ u16 m_USP; // user stack pointer
+ u16 m_SSP; // system stack pointer
+
+ u8 m_WDCON;
+ u8 m_SCR;
+ u8 m_IEL;
+ u8 m_PSWL;
+ u8 m_PSWH;
+
+ u8 m_regbank;
+
+ u8 m_PxCFGA[4];
+ u8 m_PxCFGB[4];
+
+ // hacks for IRQ testing
+ u8 m_in_interrupt;
+ u8 m_irq_pending;
+
+
+ // 16-bit regs R0-R3 can have 4 selectable banks, R4-R7 are global
+ // for 8-bit use each register can be seen as High and Low parts
+ // R4 when split is R4H and R4L, R4L acts as ACC from i8051 for compatibility, R4H acts as B
+ // R6H is DPH, R6L is DPL
+ u16 m_regs[(4 * 4) + 4];
+
+ address_space *m_program;
+ address_space *m_data;
+ address_space *m_sfr;
+ int m_icount;
+
+ devcb_read8::array<4> m_port_in_cb;
+ devcb_write8::array<4> m_port_out_cb;
+};
+
+class mx10exa_cpu_device : public xa_cpu
+{
+public:
+ mx10exa_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+private:
+ void mx10exa_internal_map(address_map &map) ATTR_COLD;
+ void mx10exa_internal_data_map(address_map &map) ATTR_COLD;
+
+};
+
+
+DECLARE_DEVICE_TYPE(XA, xa_cpu)
+DECLARE_DEVICE_TYPE(MX10EXA, mx10exa_cpu_device)
+
+#endif // MAME_CPU_XA_XA_H
diff --git a/src/devices/cpu/xa/xa_ops.cpp b/src/devices/cpu/xa/xa_ops.cpp
new file mode 100644
index 00000000000..32010edae24
--- /dev/null
+++ b/src/devices/cpu/xa/xa_ops.cpp
@@ -0,0 +1,1926 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#include "emu.h"
+#include "xa.h"
+#include "xadasm.h"
+
+#define get_addr gr16
+#define set_addr sr16
+
+u32 xa_cpu::gr32(int reg)
+{
+ if (reg & 1)
+ fatalerror("gr32 with low bit set\n");
+
+ u16 reg1 = gr16(reg);
+ u16 reg2 = gr16(reg + 1);
+
+ return (reg2 << 16) | reg1;
+}
+
+void xa_cpu::sr32(int reg, u32 data)
+{
+ if (reg & 1)
+ fatalerror("sr32 with low bit set\n");
+
+ sr16(reg, data & 0xffff);
+ sr16(reg + 1, (data >> 16) & 0xffff);
+}
+
+u16 xa_cpu::do_subb_16(u16 val1, u16 val2)
+{
+ return do_sub_16_helper(val1, val2, get_c_flag());
+}
+
+u16 xa_cpu::do_sub_16(u16 val1, u16 val2)
+{
+ return do_sub_16_helper(val1, val2, 0);
+}
+
+u16 xa_cpu::do_sub_16_helper(u16 val1, u16 val2, u8 c)
+{
+ u32 result = val1 - (val2 + c);
+ s32 result1 = (s16)val1 - (s16)(val2 + c);
+ u32 result3 = (val1 & 0x0fff) - ((val2 & 0x0fff) + c);
+
+ if (result & 0x10000) set_c_flag(); else clear_c_flag();
+ if (result3 & 0x1000) set_ac_flag(); else clear_ac_flag();
+ if ((result1 < -32768 || result1 > 32767)) set_v_flag(); else clear_v_flag();
+
+ do_nz_flags_16((u16)result);
+ return (u16)result;
+}
+
+
+u16 xa_cpu::do_addc_16(u16 val1, u16 val2)
+{
+ return do_add_16_helper(val1, val2, get_c_flag());
+}
+
+u16 xa_cpu::do_add_16(u16 val1, u16 val2)
+{
+ return do_add_16_helper(val1, val2, 0);
+}
+
+
+u16 xa_cpu::do_add_16_helper(u16 val1, u16 val2, u8 c)
+{
+ u32 result = val1 + val2 + c;
+ s32 result1 = (s16)val1 + (s16)val2 + c;
+ u32 result3 = (val1 & 0x0fff) + (val2 & 0x0fff) + c;
+ if (result & 0x10000) set_c_flag(); else clear_c_flag();
+ if (result3 & 0x1000) set_ac_flag(); else clear_ac_flag();
+ if ((result1 < -32768 || result1 > 32767)) set_v_flag(); else clear_v_flag();
+
+ do_nz_flags_16((u16)result);
+ return (u16)result;
+}
+
+
+u16 xa_cpu::do_xor_16(u16 val1, u16 val2)
+{
+ u16 result = val1 ^ val2;
+ do_nz_flags_16(result);
+ return result;
+}
+
+u16 xa_cpu::do_or_16(u16 val1, u16 val2)
+{
+ u16 result = val1 | val2;
+ do_nz_flags_16(result);
+ return result;
+}
+
+u16 xa_cpu::do_and_16(u16 val1, u16 val2)
+{
+ u16 result = val1 & val2;
+ do_nz_flags_16(result);
+ return result;
+}
+
+u32 xa_cpu::asl32_helper(u32 fullreg, u8 amount)
+{
+ cy(6 + (amount >> 1));
+
+ int lastbit = 0;
+
+ u32 topbit = fullreg & 0x8000000;
+
+ while (amount)
+ {
+ lastbit = fullreg & 0x8000000;
+ fullreg = fullreg << 1;
+ amount--;
+ }
+
+ if (lastbit)
+ set_c_flag();
+ else
+ clear_c_flag();
+
+ if (fullreg == 0)
+ set_z_flag();
+ else
+ clear_z_flag();
+
+ if (fullreg & 0x8000000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ if (topbit != (fullreg & 0x8000000))
+ set_v_flag();
+ else
+ clear_v_flag();
+
+ return fullreg;
+}
+
+u32 xa_cpu::lsr32_helper(u32 fullreg, u8 amount)
+{
+ cy(6 + (amount >> 1));
+
+ int lastbit = 0;
+
+ while (amount)
+ {
+ lastbit = fullreg & 0x0000001;
+ fullreg = fullreg >> 1;
+ amount--;
+ }
+
+ if (lastbit)
+ set_c_flag();
+ else
+ clear_c_flag();
+
+ if (fullreg == 0)
+ set_z_flag();
+ else
+ clear_z_flag();
+
+ if (fullreg & 0x8000000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ return fullreg;
+}
+
+u16 xa_cpu::lsr16_helper(u16 fullreg, u8 amount)
+{
+ cy(6 + (amount >> 1));
+
+ int lastbit = 0;
+
+ while (amount)
+ {
+ lastbit = fullreg & 0x0001;
+ fullreg = fullreg >> 1;
+ amount--;
+ }
+
+ if (lastbit)
+ set_c_flag();
+ else
+ clear_c_flag();
+
+ if (fullreg == 0)
+ set_z_flag();
+ else
+ clear_z_flag();
+
+ if (fullreg & 0x8000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ return fullreg;
+}
+
+
+u8 xa_cpu::do_subb_8(u8 val1, u8 val2)
+{
+ return do_sub_8_helper(val1, val2, get_c_flag());
+}
+
+u8 xa_cpu::do_sub_8(u8 val1, u8 val2)
+{
+ return do_sub_8_helper(val1, val2, 0);
+}
+
+u8 xa_cpu::do_sub_8_helper(u8 val1, u8 val2, u8 c)
+{
+ u16 result = val1 - (val2 + c);
+ s16 result1 = (s8)val1 - (s8)(val2 + c);
+ u16 result3 = (val1 & 0x0f) - ((val2 & 0x0f) + c);
+ if (result & 0x100) set_c_flag(); else clear_c_flag();
+ if (result3 & 0x10) set_ac_flag(); else clear_ac_flag();
+ if ((result1 < -128 || result1 > 127)) set_v_flag(); else clear_v_flag();
+
+ do_nz_flags_8((u8)result);
+ return (u8)result;
+}
+
+u8 xa_cpu::do_addc_8(u8 val1, u8 val2)
+{
+ return do_add_8_helper(val1, val2, get_c_flag());
+}
+
+u8 xa_cpu::do_add_8(u8 val1, u8 val2)
+{
+ return do_add_8_helper(val1, val2, 0);
+}
+
+
+u8 xa_cpu::do_add_8_helper(u8 val1, u8 val2, u8 c)
+{
+ u16 result = val1 + val2 + c;
+ s16 result1 = (s8)val1 + (s8)val2 + c;
+ u16 result3 = (val1 & 0x0f) + (val2 & 0x0f) + c;
+ if (result & 0x100) set_c_flag(); else clear_c_flag();
+ if (result3 & 0x10) set_ac_flag(); else clear_ac_flag();
+ if ((result1 < -128 || result1 > 127)) set_v_flag(); else clear_v_flag();
+
+ do_nz_flags_8((u8)result);
+ return (u8)result;
+}
+
+u8 xa_cpu::do_xor_8(u8 val1, u8 val2)
+{
+ u8 result = val1 ^ val2;
+ do_nz_flags_8(result);
+ return result;
+}
+
+u8 xa_cpu::do_or_8(u8 val1, u8 val2)
+{
+ u8 result = val1 | val2;
+ do_nz_flags_8(result);
+ return result;
+}
+
+u8 xa_cpu::do_and_8(u8 val1, u8 val2)
+{
+ u8 result = val1 & val2;
+ do_nz_flags_8(result);
+ return result;
+}
+
+
+
+u8 xa_cpu::do_cjne_8_helper(u8 val1, u8 val2)
+{
+ u16 result = val1 - val2;
+ do_nz_flags_8((u8)result);
+ if (result & 0x100) set_c_flag(); else clear_c_flag();
+ return (u8)result;
+}
+
+
+void xa_cpu::set_bit_8_helper(u16 bit, u8 val)
+{
+ int position = bit & 7;
+
+ if (bit < 0x100)
+ {
+ int reg = ((bit & 0x1ff) >> 3);
+
+ if (reg < 16)
+ fatalerror("set_bit_helper %s.%d", m_regnames8[reg], position);
+ else
+ fatalerror("set_bit_helper ill_REG_%02x.%d", reg, position);
+ }
+ else if (bit < 0x200)
+ {
+ int addr = ((bit & 0x1ff) >> 3) + 0x20;
+ fatalerror("set_bit_helper $%02x.%d", addr, position);
+ }
+
+ int sfr = ((bit & 0x1ff) >> 3);
+ u8 mask = (1 << position) ^ 0xff;
+
+ u8 sfr_val = m_sfr->read_byte(sfr) & mask;
+ sfr_val |= (val << position);
+ m_sfr->write_byte(sfr, sfr_val);
+}
+
+// NOP No operation 1 3 0000 0000
+void xa_cpu::do_nop() { cy(3); }
+
+// ALUOP.b Rd, data8
+// ADD Rd, #data8 Add 8-bit imm data to reg 3 3 1001 0001 dddd 0000 iiii iiii
+// ADDC Rd, #data8 Add 8-bit imm data to reg w/ carry 3 3 1001 0001 dddd 0001 iiii iiii
+// SUB Rd, #data8 Subtract 8-bit imm data to reg 3 3 1001 0001 dddd 0010 iiii iiii
+// SUBB Rd, #data8 Subtract w/ borrow 8-bit imm data to reg 3 3 1001 0001 dddd 0011 iiii iiii
+// CMP Rd, #data8 Compare 8-bit imm data to reg 3 3 1001 0001 dddd 0100 iiii iiii
+// AND Rd, #data8 Logical AND 8-bit imm data to reg 3 3 1001 0001 dddd 0101 iiii iiii
+// OR Rd, #data8 Logical OR 8-bit imm data to reg 3 3 1001 0001 dddd 0110 iiii iiii
+// XOR Rd, #data8 Logical XOR 8-bit imm data to reg 3 3 1001 0001 dddd 0111 iiii iiii
+// MOV Rd, #data8 Move 8-bit imm data to reg 3 3 1001 0001 dddd 1000 iiii iiii
+void xa_cpu::aluop_byte_rd_data8(int alu_op, u8 rd, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_data8(rd, data8); break;
+ case 0x1: addc_byte_rd_data8(rd, data8); break;
+ case 0x2: sub_byte_rd_data8(rd, data8); break;
+ case 0x3: subb_byte_rd_data8(rd, data8); break;
+ case 0x4: cmp_byte_rd_data8(rd, data8); break;
+ case 0x5: and_byte_rd_data8(rd, data8); break;
+ case 0x6: or_byte_rd_data8(rd, data8); break;
+ case 0x7: xor_byte_rd_data8(rd, data8); break;
+ case 0x8: mov_byte_rd_data8(rd, data8); break;
+ default: logerror("UNK_ALUOP.b %s, #$%02x", m_regnames8[rd], data8); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); u8 result = do_add_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::addc_byte_rd_data8(u8 rd, u8 data8){ u8 rdval = gr8(rd); u8 result = do_addc_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::sub_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); u8 result = do_sub_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::subb_byte_rd_data8(u8 rd, u8 data8){ u8 rdval = gr8(rd); u8 result = do_subb_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::cmp_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); do_sub_8(rdval, data8); cy(3); }
+void xa_cpu::and_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); u8 result = do_and_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::or_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); u8 result = do_or_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::xor_byte_rd_data8(u8 rd, u8 data8) { u8 rdval = gr8(rd); u8 result = do_xor_8(rdval, data8); sr8(rd, result); cy(3); }
+void xa_cpu::mov_byte_rd_data8(u8 rd, u8 data8) { u8 result = data8; do_nz_flags_8(result); sr8(rd, result); cy(3); }
+
+// ------------------------------------------
+
+// ALUOP.b [Rd], data8
+// ADD [Rd], #data8 Add 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0000 iiii iiii
+// ADDC [Rd], #data8 Add 16-bit imm data to reg-ind w/ carry 3 4 1001 0010 0ddd 0001 iiii iiii
+// SUB [Rd], #data8 Subtract 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0010 iiii iiii
+// SUBB [Rd], #data8 Subtract w/ borrow 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0011 iiii iiii
+// CMP [Rd], #data8 Compare 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0100 iiii iiii
+// AND [Rd], #data8 Logical AND 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0101 iiii iiii
+// OR [Rd], #data8 Logical OR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0110 iiii iiii
+// XOR [Rd], #data8 Logical XOR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0111 iiii iiii
+// MOV [Rd], #data8 Move 16-bit imm data to reg-ind 3 3 1001 0010 0ddd 1000 iiii iiii
+void xa_cpu::aluop_byte_indrd_data8(int alu_op, u8 rd, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrd_data8(rd, data8); break;
+ case 0x1: addc_byte_indrd_data8(rd, data8); break;
+ case 0x2: sub_byte_indrd_data8(rd, data8); break;
+ case 0x3: subb_byte_indrd_data8(rd, data8); break;
+ case 0x4: cmp_byte_indrd_data8(rd, data8); break;
+ case 0x5: and_byte_indrd_data8(rd, data8); break;
+ case 0x6: or_byte_indrd_data8(rd, data8); break;
+ case 0x7: xor_byte_indrd_data8(rd, data8); break;
+ case 0x8: mov_byte_indrd_data8(rd, data8); break;
+ default: logerror("UNK_ALUOP.b [%s], #$%02x", m_regnames16[rd], data8); do_nop(); break;
+ }
+}
+void xa_cpu::add_byte_indrd_data8(u8 rd, u8 data8) { fatalerror( "ADD.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::addc_byte_indrd_data8(u8 rd, u8 data8){ fatalerror( "ADDC.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::sub_byte_indrd_data8(u8 rd, u8 data8) { fatalerror( "SUB.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::subb_byte_indrd_data8(u8 rd, u8 data8){ fatalerror( "SUBB.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::cmp_byte_indrd_data8(u8 rd, u8 data8) { u16 address = get_addr(rd); u8 rdval = rdat8(address); do_sub_8(rdval, data8); cy(3); }
+void xa_cpu::and_byte_indrd_data8(u8 rd, u8 data8) { u16 address = get_addr(rd); u8 rdval = rdat8(address); u8 result = do_and_8(rdval, data8); wdat8(address, result); cy(3); }
+void xa_cpu::or_byte_indrd_data8(u8 rd, u8 data8) { fatalerror( "OR.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::xor_byte_indrd_data8(u8 rd, u8 data8) { fatalerror( "XOR.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::mov_byte_indrd_data8(u8 rd, u8 data8) { fatalerror( "MOV.b [%s], #$%02x ([RD], DATA8)", m_regnames16[rd], data8 ); }
+
+// ------------------------------------------
+// ALUOP.b [Rd+], data8
+// ADD [Rd+], #data8 Add 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0000 iiii iiii
+// ADDC [Rd+], #data8 Add 8-bit imm data to reg-ind and autoinc w/ carry 3 5 1001 0011 0ddd 0001 iiii iiii
+// SUB [Rd+], #data8 Subtract 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0010 iiii iiii
+// SUBB [Rd+], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0011 iiii iiii
+// CMP [Rd+], #data8 Compare 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0100 iiii iiii
+// AND [Rd+], #data8 Logical AND 8-bit imm data to reg-ind and autoinc 3 5 1001 0011 0ddd 0101 iiii iiii
+// OR [Rd+], #data8 Logical OR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0110 iiii iiii
+// XOR [Rd+], #data8 Logical XOR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0111 iiii iiii
+// MOV [Rd+], #data8 Move 8-bit imm data to reg-ind w/ autoinc 3 4 1001 0011 0ddd 1000 iiii iiii
+void xa_cpu::aluop_byte_indrdinc_data8(int alu_op, u8 rd, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrdinc_data8(rd, data8); break;
+ case 0x1: addc_byte_indrdinc_data8(rd, data8); break;
+ case 0x2: sub_byte_indrdinc_data8(rd, data8); break;
+ case 0x3: subb_byte_indrdinc_data8(rd, data8); break;
+ case 0x4: cmp_byte_indrdinc_data8(rd, data8); break;
+ case 0x5: and_byte_indrdinc_data8(rd, data8); break;
+ case 0x6: or_byte_indrdinc_data8(rd, data8); break;
+ case 0x7: xor_byte_indrdinc_data8(rd, data8); break;
+ case 0x8: mov_byte_indrdinc_data8(rd, data8); break;
+ default: logerror("UNK_ALUOP.b [%s+], #$%02x", m_regnames16[rd], data8); do_nop(); break;
+ }
+}
+void xa_cpu::add_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "ADD.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::addc_byte_indrdinc_data8(u8 rd, u8 data8){ fatalerror( "ADDC.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::sub_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "SUB.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::subb_byte_indrdinc_data8(u8 rd, u8 data8){ fatalerror( "SUBB.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::cmp_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "CMP.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::and_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "AND.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::or_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "OR.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::xor_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "XOR.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+void xa_cpu::mov_byte_indrdinc_data8(u8 rd, u8 data8) { fatalerror( "MOV.b [%s+], #$%02x ([RD+], DATA8)", m_regnames16[rd], data8 ); }
+
+// ------------------------------------------
+// ALUOP.b [Rd+offs8], data8
+// ADD [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0000 oooo oooo iiii iiii
+// ADDC [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs and carry 4 6 1001 0100 0ddd 0001 oooo oooo iiii iiii
+// SUB [Rd+offset8], #data8 Subtract 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0010 oooo oooo iiii iiii
+// SUBB [Rd+offset8], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0011 oooo oooo iiii iiii
+// CMP [Rd+offset8], #data8 Compare 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0100 oooo oooo iiii iiii
+// AND [Rd+offset8], #data8 Logical AND 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0101 oooo oooo iiii iiii
+// OR [Rd+offset8], #data8 Logical OR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0110 oooo oooo iiii iiii
+// XOR [Rd+offset8], #data8 Logical XOR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0111 oooo oooo iiii iiii
+// MOV [Rd+offset8], #data8 Move 8-bit imm data to reg-ind w/ 8-bit offs 4 5 1001 0100 0ddd 1000 oooo oooo iiii iiii
+void xa_cpu::aluop_byte_rdoff8_data8(int alu_op, u8 rd, u8 offset8, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x1: addc_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x2: sub_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x3: subb_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x4: cmp_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x5: and_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x6: or_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x7: xor_byte_indrdoff8_data8(rd, offset8, data8); break;
+ case 0x8: mov_byte_indrdoff8_data8(rd, offset8, data8); break;
+ default: logerror("UNK_ALUOP.b [%s+#$%02x], #$%02x", m_regnames16[rd], offset8, data8); do_nop(); break;
+ }
+}
+void xa_cpu::add_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_add_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::addc_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_addc_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::sub_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_sub_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::subb_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_subb_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::cmp_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); do_sub_8(val, data8); cy(6); }
+void xa_cpu::and_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_and_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::or_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_or_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::xor_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_xor_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::mov_byte_indrdoff8_data8(u8 rd, u8 offset8, u8 data8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; do_nz_flags_8(data8); wdat8(address, data8); cy(5); }
+
+// ------------------------------------------
+// ALUOP.b [Rd+offs16], data8
+// ADD [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0000 oooo oooo oooo oooo iiii iiii
+// ADDC [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs and carry 5 6 1001 0101 0ddd 0001 oooo oooo oooo oooo iiii iiii
+// SUB [Rd+offset16], #data8 Subtract 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0010 oooo oooo oooo oooo iiii iiii
+// SUBB [Rd+offset16], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0011 oooo oooo oooo oooo iiii iiii
+// CMP [Rd+offset16], #data8 Compare 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0100 oooo oooo oooo oooo iiii iiii
+// AND [Rd+offset16], #data8 Logical AND 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0101 oooo oooo oooo oooo iiii iiii
+// OR [Rd+offset16], #data8 Logical OR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0110 oooo oooo oooo oooo iiii iiii
+// XOR [Rd+offset16], #data8 Logical XOR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0111 oooo oooo oooo oooo iiii iiii
+// MOV [Rd+offset16], #data8 Move 8-bit imm data to reg-ind w/ 16-bit offs 5 5 1001 0101 0ddd 1000 oooo oooo oooo oooo iiii iiii
+void xa_cpu::aluop_byte_rdoff16_data8(int alu_op, u8 rd, u16 offset16, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x1: addc_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x2: sub_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x3: subb_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x4: cmp_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x5: and_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x6: or_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x7: xor_byte_indrdoff16_data8(rd, offset16, data8); break;
+ case 0x8: mov_byte_indrdoff16_data8(rd, offset16, data8); break;
+ default: logerror("UNK_ALUOP.b [%s+#$%04x], #$%02d", m_regnames16[rd], offset16, data8); do_nop(); break;
+ }
+}
+void xa_cpu::add_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_add_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::addc_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8){ u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_addc_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::sub_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_sub_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::subb_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8){ u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_subb_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::cmp_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); do_sub_8(val, data8); cy(6); }
+void xa_cpu::and_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_and_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::or_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_or_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::xor_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u8 val = rdat8(address); u8 result = do_xor_8(val, data8); wdat8(address, result); cy(6); }
+void xa_cpu::mov_byte_indrdoff16_data8(u8 rd, u16 offset16, u8 data8) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; do_nz_flags_8(data8); wdat8(address, data8); cy(5); }
+
+// ------------------------------------------
+// ADD direct, #data8 Add 8-bit imm data to mem 4 4 1001 0110 0DDD 0000 DDDD DDDD iiii iiii
+// ADDC direct, #data8 Add 8-bit imm data to mem w/ carry 4 4 1001 0110 0DDD 0001 DDDD DDDD iiii iiii
+// SUB direct, #data8 Subtract 8-bit imm data to mem 4 4 1001 0110 0DDD 0010 DDDD DDDD iiii iiii
+// SUBB direct, #data8 Subtract w/ borrow 8-bit imm data to mem 4 4 1001 0110 0DDD 0011 DDDD DDDD iiii iiii
+// CMP direct, #data8 Compare 8-bit imm data to mem 4 4 1001 0110 0DDD 0100 DDDD DDDD iiii iiii
+// AND direct, #data8 Logical AND 8-bit imm data to mem 4 4 1001 0110 0DDD 0101 DDDD DDDD iiii iiii
+// OR direct, #data8 Logical OR 8-bit imm data to mem 4 4 1001 0110 0DDD 0110 DDDD DDDD iiii iiii
+// XOR direct, #data8 Logical XOR 8-bit imm data to mem 4 4 1001 0110 0DDD 0111 DDDD DDDD iiii iiii
+// MOV direct, #data8 Move 8-bit imm data to mem 4 3 1001 0110 0DDD 1000 DDDD DDDD iiii iiii
+void xa_cpu::aluop_byte_direct_data8(int alu_op, u16 direct, u8 data8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_direct_data8(direct, data8); break;
+ case 0x1: addc_byte_direct_data8(direct, data8); break;
+ case 0x2: sub_byte_direct_data8(direct, data8); break;
+ case 0x3: subb_byte_direct_data8(direct, data8); break;
+ case 0x4: cmp_byte_direct_data8(direct, data8); break;
+ case 0x5: and_byte_direct_data8(direct, data8); break;
+ case 0x6: or_byte_direct_data8(direct, data8); break;
+ case 0x7: xor_byte_direct_data8(direct, data8); break;
+ case 0x8: mov_byte_direct_data8(direct, data8); break;
+ default: logerror("UNK_ALUOP.b %s, #$%02x (DIRECT, DATA8)", get_directtext(direct), data8); do_nop(); break;
+ }
+}
+void xa_cpu::add_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); u8 result = do_add_8(val, data8); write_direct8(direct, result); cy(4); }
+void xa_cpu::addc_byte_direct_data8(u16 direct, u8 data8){ u8 val = read_direct8(direct); u8 result = do_addc_8(val, data8); write_direct8(direct, result); cy(4);}
+void xa_cpu::sub_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); u8 result = do_sub_8(val, data8); write_direct8(direct, result); cy(4); }
+void xa_cpu::subb_byte_direct_data8(u16 direct, u8 data8){ u8 val = read_direct8(direct); u8 result = do_subb_8(val, data8); write_direct8(direct, result); cy(4);}
+void xa_cpu::cmp_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); do_sub_8(val, data8); cy(4); }
+void xa_cpu::and_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); u8 result = do_and_8(val, data8); write_direct8(direct, result); cy(4); }
+void xa_cpu::or_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); u8 result = do_or_8(val, data8); write_direct8(direct, result); cy(4); }
+void xa_cpu::xor_byte_direct_data8(u16 direct, u8 data8) { u8 val = read_direct8(direct); u8 result = do_xor_8(val, data8); write_direct8(direct, result); cy(4); }
+void xa_cpu::mov_byte_direct_data8(u16 direct, u8 data8) { u8 result = data8; do_nz_flags_8(result); write_direct8(direct, result); cy(3); }
+
+// -----------------------------------------------
+// ALUOP.w Rd, data16
+// ADD Rd, #data16 Add 16-bit imm data to reg 4 3 1001 1001 dddd 0000 iiii iiii iiii iiii
+// ADDC Rd, #data16 Add 16-bit imm data to reg w/ carry 4 3 1001 1001 dddd 0001 iiii iiii iiii iiii
+// SUB Rd, #data16 Subtract 16-bit imm data to reg 4 3 1001 1001 dddd 0010 iiii iiii iiii iiii
+// SUBB Rd, #data16 Subtract w/ borrow 16-bit imm data to reg 4 3 1001 1001 dddd 0011 iiii iiii iiii iiii
+// CMP Rd, #data16 Compare 16-bit imm data to reg 4 3 1001 1001 dddd 0100 iiii iiii iiii iiii
+// AND Rd, #data16 Logical AND 16-bit imm data to reg 4 3 1001 1001 dddd 0101 iiii iiii iiii iiii
+// OR Rd, #data16 Logical OR 16-bit imm data to reg 4 3 1001 1001 dddd 0110 iiii iiii iiii iiii
+// XOR Rd, #data16 Logical XOR 16-bit imm data to reg 4 3 1001 1001 dddd 0111 iiii iiii iiii iiii
+// MOV Rd, #data16 Move 16-bit imm data to reg 4 3 1001 1001 dddd 1000 iiii iiii iiii iiii
+void xa_cpu::aluop_byte_rd_data16(int alu_op, u8 rd, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_data16(rd, data16); break;
+ case 0x1: addc_word_rd_data16(rd, data16); break;
+ case 0x2: sub_word_rd_data16(rd, data16); break;
+ case 0x3: subb_word_rd_data16(rd, data16); break;
+ case 0x4: cmp_word_rd_data16(rd, data16); break;
+ case 0x5: and_word_rd_data16(rd, data16); break;
+ case 0x6: or_word_rd_data16(rd, data16); break;
+ case 0x7: xor_word_rd_data16(rd, data16); break;
+ case 0x8: mov_word_rd_data16(rd, data16); break;
+ default: logerror("UNK_ALUOP.w %s, #$%04x (RD, DATA16)", m_regnames16[rd], data16); do_nop(); break;
+ }
+}
+void xa_cpu::add_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); u16 result = do_add_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::addc_word_rd_data16(u8 rd, u16 data16){ u16 rdval = gr16(rd); u16 result = do_addc_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::sub_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); u16 result = do_sub_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::subb_word_rd_data16(u8 rd, u16 data16){ u16 rdval = gr16(rd); u16 result = do_subb_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::cmp_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); do_sub_16(rdval, data16); cy(3); }
+void xa_cpu::and_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); u16 result = do_and_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::or_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); u16 result = do_or_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::xor_word_rd_data16(u8 rd, u16 data16) { u16 rdval = gr16(rd); u16 result = do_xor_16(rdval, data16); sr16(rd, result); cy(3); }
+void xa_cpu::mov_word_rd_data16(u8 rd, u16 data16) { u16 result = data16; do_nz_flags_16(result); sr16(rd, result); cy(3); }
+
+// -----------------------------------------------
+// ALUOP.w [Rd], data16
+// ADD [Rd], #data16 Add 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0000 iiii iiii iiii iiii
+// ADDC [Rd], #data16 Add 16-bit imm data to reg-ind w/ carry 4 4 1001 1010 0ddd 0001 iiii iiii iiii iiii
+// SUB [Rd], #data16 Subtract 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0010 iiii iiii iiii iiii
+// SUBB [Rd], #data16 Subtract w/ borrow 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0011 iiii iiii iiii iiii
+// CMP [Rd], #data16 Compare 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0100 iiii iiii iiii iiii
+// AND [Rd], #data16 Logical AND 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0101 iiii iiii iiii iiii
+// OR [Rd], #data16 Logical OR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0110 iiii iiii iiii iiii
+// XOR [Rd], #data16 Logical XOR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0111 iiii iiii iiii iiii
+// MOV [Rd], #data16 Move 16-bit imm data to reg-ind 4 3 1001 1010 0ddd 1000 iiii iiii iiii iiii
+void xa_cpu::aluop_byte_indrd_data16(int alu_op, u8 rd, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrd_data16(rd, data16); break;
+ case 0x1: addc_word_indrd_data16(rd, data16); break;
+ case 0x2: sub_word_indrd_data16(rd, data16); break;
+ case 0x3: subb_word_indrd_data16(rd, data16); break;
+ case 0x4: cmp_word_indrd_data16(rd, data16); break;
+ case 0x5: and_word_indrd_data16(rd, data16); break;
+ case 0x6: or_word_indrd_data16(rd, data16); break;
+ case 0x7: xor_word_indrd_data16(rd, data16); break;
+ case 0x8: mov_word_indrd_data16(rd, data16); break;
+ default: logerror("UNK_ALUOP.w [%s], #$%04x", m_regnames16[rd], data16); do_nop(); break;
+ }
+}
+void xa_cpu::add_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_add_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::addc_word_indrd_data16(u8 rd, u16 data16){ u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_addc_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::sub_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_sub_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::subb_word_indrd_data16(u8 rd, u16 data16){ u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_subb_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::cmp_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); do_sub_16(val, data16); cy(4); }
+void xa_cpu::and_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_and_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::or_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_or_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::xor_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); u16 val = rdat16(address); u16 result = do_xor_16(val, data16); wdat16(address, result); cy(4); }
+void xa_cpu::mov_word_indrd_data16(u8 rd, u16 data16) { u16 address = get_addr(rd); do_nz_flags_16(data16); wdat16(address, data16); cy(3); }
+
+// ALUOP.w [Rd+], data16
+// ADD [Rd+], #data16 Add 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0000 iiii iiii iiii iiii
+// ADDC [Rd+], #data16 Add 16-bit imm data to reg-ind and autoinc w/ carry 4 5 1001 1011 0ddd 0001 iiii iiii iiii iiii
+// SUB [Rd+], #data16 Subtract 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0010 iiii iiii iiii iiii
+// SUBB [Rd+], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0011 iiii iiii iiii iiii
+// CMP [Rd+], #data16 Compare 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0100 iiii iiii iiii iiii
+// AND [Rd+], #data16 Logical AND 16-bit imm data to reg-ind and autoinc 4 5 1001 1011 0ddd 0101 iiii iiii iiii iiii
+// OR [Rd+], #data16 Logical OR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0110 iiii iiii iiii iiii
+// XOR [Rd+], #data16 Logical XOR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0111 iiii iiii iiii iiii
+// MOV [Rd+], #data16 Move 16-bit imm data to reg-ind w/ autoinc 4 4 1001 1011 0ddd 1000 iiii iiii iiii iiii
+void xa_cpu::aluop_byte_indrdinc_data16(int alu_op, u8 rd, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrdinc_data16(rd, data16); break;
+ case 0x1: addc_word_indrdinc_data16(rd, data16); break;
+ case 0x2: sub_word_indrdinc_data16(rd, data16); break;
+ case 0x3: subb_word_indrdinc_data16(rd, data16); break;
+ case 0x4: cmp_word_indrdinc_data16(rd, data16); break;
+ case 0x5: and_word_indrdinc_data16(rd, data16); break;
+ case 0x6: or_word_indrdinc_data16(rd, data16); break;
+ case 0x7: xor_word_indrdinc_data16(rd, data16); break;
+ case 0x8: mov_word_indrdinc_data16(rd, data16); break;
+ default: logerror("UNK_ALUOP.w [%s+], #$%04x", m_regnames16[rd], data16); do_nop(); break;
+ }
+}
+void xa_cpu::add_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "ADD.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::addc_word_indrdinc_data16(u8 rd, u16 data16){ fatalerror( "ADDC.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::sub_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "SUB.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::subb_word_indrdinc_data16(u8 rd, u16 data16){ fatalerror( "SUBB.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::cmp_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "CMP.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::and_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "AND.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::or_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "OR.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::xor_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "XOR.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+void xa_cpu::mov_word_indrdinc_data16(u8 rd, u16 data16) { fatalerror( "MOV.w [%s+], #$%04x ([RD+], DATA16)", m_regnames16[rd], data16); }
+
+// ALPOP.w [Rd+offs8], data16
+// ADD [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0000 oooo oooo iiii iiii iiii iiii
+// ADDC [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs and carry 5 6 1001 1100 0ddd 0001 oooo oooo iiii iiii iiii iiii
+// SUB [Rd+offset8], #data16 Subtract 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0010 oooo oooo iiii iiii iiii iiii
+// SUBB [Rd+offset8], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0011 oooo oooo iiii iiii iiii iiii
+// CMP [Rd+offset8], #data16 Compare 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0100 oooo oooo iiii iiii iiii iiii
+// AND [Rd+offset8], #data16 Logical AND 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0101 oooo oooo iiii iiii iiii iiii
+// OR [Rd+offset8], #data16 Logical OR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0110 oooo oooo iiii iiii iiii iiii
+// XOR [Rd+offset8], #data16 Logical XOR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0111 oooo oooo iiii iiii iiii iiii
+// MOV [Rd+offset8], #data16 Move 16-bit imm data to reg-ind w/ 8-bit offs 5 5 1001 1100 0ddd 1000 oooo oooo iiii iiii iiii iiii
+void xa_cpu::aluop_byte_rdoff8_data16(int alu_op, u8 rd, u8 offset8, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x1: addc_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x2: sub_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x3: subb_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x4: cmp_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x5: and_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x6: or_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x7: xor_word_indrdoff8_data16(rd, offset8, data16); break;
+ case 0x8: mov_word_indrdoff8_data16(rd, offset8, data16); break;
+ default: logerror("UNK_ALUOP.w [%s+#$%02x], #$%04x", m_regnames16[rd], offset8, data16); do_nop(); break;
+ }
+}
+
+
+void xa_cpu::add_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_add_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::addc_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_addc_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::sub_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_sub_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::subb_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_subb_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::cmp_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); do_sub_16(val, data16); cy(6); }
+void xa_cpu::and_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_and_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::or_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_or_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::xor_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_xor_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::mov_word_indrdoff8_data16(u8 rd, u8 offset8, u16 data16) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; do_nz_flags_16(data16); wdat16(address, data16); cy(5); }
+
+// ALUOP.w [Rd+offs16], data16
+// ADD [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0000 oooo oooo oooo oooo iiii iiii iiii iiii
+// ADDC [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs and carry 6 6 1001 1101 0ddd 0001 oooo oooo oooo oooo iiii iiii iiii iiii
+// SUB [Rd+offset16], #data16 Subtract 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0010 oooo oooo oooo oooo iiii iiii iiii iiii
+// SUBB [Rd+offset16], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0011 oooo oooo oooo oooo iiii iiii iiii iiii
+// CMP [Rd+offset16], #data16 Compare 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0100 oooo oooo oooo oooo iiii iiii iiii iiii
+// AND [Rd+offset16], #data16 Logical AND 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0101 oooo oooo oooo oooo iiii iiii iiii iiii
+// OR [Rd+offset16], #data16 Logical OR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0110 oooo oooo oooo oooo iiii iiii iiii iiii
+// XOR [Rd+offset16], #data16 Logical XOR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0111 oooo oooo oooo oooo iiii iiii iiii iiii
+// MOV [Rd+offset16], #data16 Move 16-bit imm data to reg-ind w/ 16-bit offs 6 5 1001 1101 0ddd 1000 oooo oooo oooo oooo iiii iiii iiii iiii
+void xa_cpu::aluop_byte_rdoff16_data16(int alu_op, u8 rd, u16 offset16, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x1: addc_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x2: sub_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x3: subb_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x4: cmp_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x5: and_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x6: or_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x7: xor_word_indrdoff16_data16(rd, offset16, data16); break;
+ case 0x8: mov_word_indrdoff16_data16(rd, offset16, data16); break;
+ default: logerror("UNK_ALUOP.w [%s+#$%04x], #$%04x", m_regnames16[rd], offset16, data16); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_add_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::addc_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16){ u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_addc_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::sub_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_sub_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::subb_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16){ u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_subb_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::cmp_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); do_sub_16(val, data16); cy(6); }
+void xa_cpu::and_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_and_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::or_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_or_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::xor_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 result = do_xor_16(val, data16); wdat16(address, result); cy(6); }
+void xa_cpu::mov_word_indrdoff16_data16(u8 rd, u16 offset16, u16 data16) { u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; do_nz_flags_16(data16); wdat16(address, data16); cy(5); }
+
+// ALUOP.w DIRECT, data16
+// ADD direct, #data16 Add 16-bit imm data to mem 5 4 1001 1110 0DDD 0000 DDDD DDDD iiii iiii iiii iiii
+// ADDC direct, #data16 Add 16-bit imm data to mem w/ carry 5 4 1001 1110 0DDD 0001 DDDD DDDD iiii iiii iiii iiii
+// SUB direct, #data16 Subtract 16-bit imm data to mem 5 4 1001 1110 0DDD 0010 DDDD DDDD iiii iiii iiii iiii
+// SUBB direct, #data16 Subtract w/ borrow 16-bit imm data to mem 5 4 1001 1110 0DDD 0011 DDDD DDDD iiii iiii iiii iiii
+// CMP direct, #data16 Compare 16-bit imm data to mem 5 4 1001 1110 0DDD 0100 DDDD DDDD iiii iiii iiii iiii
+// AND direct, #data16 Logical AND 16-bit imm data to mem 5 4 1001 1110 0DDD 0101 DDDD DDDD iiii iiii iiii iiii
+// OR direct, #data16 Logical OR 16-bit imm data to mem 5 4 1001 1110 0DDD 0110 DDDD DDDD iiii iiii iiii iiii
+// XOR direct, #data16 Logical XOR 16-bit imm data to mem 5 4 1001 1110 0DDD 0111 DDDD DDDD iiii iiii iiii iiii
+// MOV direct, #data16 Move 16-bit imm data to mem 5 3 1001 1110 0DDD 1000 DDDD DDDD iiii iiii iiii iiii
+void xa_cpu::aluop_byte_direct_data16(int alu_op, u16 direct, u16 data16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_direct_data16(direct, data16); break;
+ case 0x1: addc_word_direct_data16(direct, data16); break;
+ case 0x2: sub_word_direct_data16(direct, data16); break;
+ case 0x3: subb_word_direct_data16(direct, data16); break;
+ case 0x4: cmp_word_direct_data16(direct, data16); break;
+ case 0x5: and_word_direct_data16(direct, data16); break;
+ case 0x6: or_word_direct_data16(direct, data16); break;
+ case 0x7: xor_word_direct_data16(direct, data16); break;
+ case 0x8: mov_word_direct_data16(direct, data16); break;
+ default: logerror("UNK_ALUOP.w %s, #$%04x", get_directtext(direct), data16); do_nop(); break;
+ }
+}
+void xa_cpu::add_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); u16 result = do_add_16(val, data16); write_direct16(direct, result); cy(4); }
+void xa_cpu::addc_word_direct_data16(u16 direct, u16 data16){ u16 val = read_direct16(direct); u16 result = do_addc_16(val, data16); write_direct16(direct, result); cy(4);}
+void xa_cpu::sub_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); u16 result = do_sub_16(val, data16); write_direct16(direct, result); cy(4); }
+void xa_cpu::subb_word_direct_data16(u16 direct, u16 data16){ u16 val = read_direct16(direct); u16 result = do_subb_16(val, data16); write_direct16(direct, result); cy(4);}
+void xa_cpu::cmp_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); do_sub_16(val, data16); cy(4); }
+void xa_cpu::and_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); u16 result = do_and_16(val, data16); write_direct16(direct, result); cy(4); }
+void xa_cpu::or_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); u16 result = do_or_16(val, data16); write_direct16(direct, result); cy(4); }
+void xa_cpu::xor_word_direct_data16(u16 direct, u16 data16) { u16 val = read_direct16(direct); u16 result = do_xor_16(val, data16); write_direct16(direct, result); cy(4); }
+void xa_cpu::mov_word_direct_data16(u16 direct, u16 data16) { u16 result = data16; do_nz_flags_16(result); write_direct16(direct, result); cy(3); }
+
+// ------------------------------------------
+// ------------------------------------------
+// ------------------------------------------
+
+
+// ALUOP.w Rd, Rs
+// ALUOP.b Rd, Rs
+// ADD Rd, Rs Add regs direct 2 3 0000 S001 dddd ssss
+// ADDC Rd, Rs Add regs direct w/ carry 2 3 0001 S001 dddd ssss
+// SUB Rd, Rs Subtract regs direct 2 3 0010 S001 dddd ssss
+// SUBB Rd, Rs Subtract w/ borrow regs direct 2 3 0011 S001 dddd ssss
+// CMP Rd, Rs Compare dest and src regs 2 3 0100 S001 dddd ssss
+// AND Rd, Rs Logical AND regs direct 2 3 0101 S001 dddd ssss
+// OR Rd, Rs Logical OR regs 2 3 0110 S001 dddd ssss
+// XOR Rd, Rs Logical XOR regs 2 3 0111 S001 dddd ssss
+// MOV Rd, Rs Move reg to reg 2 3 1000 S001 dddd ssss
+void xa_cpu::aluop_word_rd_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_rs(rd, rs); break;
+ case 0x1: addc_word_rd_rs(rd, rs); break;
+ case 0x2: sub_word_rd_rs(rd, rs); break;
+ case 0x3: subb_word_rd_rs(rd, rs); break;
+ case 0x4: cmp_word_rd_rs(rd, rs); break;
+ case 0x5: and_word_rd_rs(rd, rs); break;
+ case 0x6: or_word_rd_rs(rd, rs); break;
+ case 0x7: xor_word_rd_rs(rd, rs); break;
+ case 0x8: mov_word_rd_rs(rd, rs); break;
+ default: fatalerror("UNK_ALUOP.w %s, %s", m_regnames16[rd], m_regnames16[rs]); // ALUOP.w Rd, Rs
+ }
+}
+void xa_cpu::aluop_byte_rd_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_rs(rd, rs); break;
+ case 0x1: addc_byte_rd_rs(rd, rs); break;
+ case 0x2: sub_byte_rd_rs(rd, rs); break;
+ case 0x3: subb_byte_rd_rs(rd, rs); break;
+ case 0x4: cmp_byte_rd_rs(rd, rs); break;
+ case 0x5: and_byte_rd_rs(rd, rs); break;
+ case 0x6: or_byte_rd_rs(rd, rs); break;
+ case 0x7: xor_byte_rd_rs(rd, rs); break;
+ case 0x8: mov_byte_rd_rs(rd, rs); break;
+ default: fatalerror("UNK_ALUOP.b %s, %s", m_regnames8[rd], m_regnames8[rs]); // ALUOP.b Rd, Rs
+ }
+}
+
+void xa_cpu::add_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_add_16(rdval, rsval); sr16(rd, result); cy(3);}
+void xa_cpu::addc_word_rd_rs(u8 rd, u8 rs){ u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_addc_16(rdval, rsval); sr16(rd, result); cy(3);}
+void xa_cpu::sub_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_sub_16(rdval, rsval); sr16(rd, result); cy(3);}
+void xa_cpu::subb_word_rd_rs(u8 rd, u8 rs){ u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_subb_16(rdval, rsval); sr16(rd, result); cy(3);}
+void xa_cpu::cmp_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); do_sub_16(rdval, rsval); cy(3); }
+void xa_cpu::and_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_and_16(rdval, rsval); sr16(rd, result); cy(3); }
+void xa_cpu::or_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_or_16(rdval, rsval); sr16(rd, result); cy(3); }
+void xa_cpu::xor_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); u16 result = do_xor_16(rdval, rsval); sr16(rd, result); cy(3);}
+void xa_cpu::mov_word_rd_rs(u8 rd, u8 rs) { u16 val = gr16(rs); do_nz_flags_16(val); sr16(rd, val); cy(3); }
+
+void xa_cpu::add_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_add_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::addc_byte_rd_rs(u8 rd, u8 rs){ u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_addc_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::sub_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_sub_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::subb_byte_rd_rs(u8 rd, u8 rs){ u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_subb_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::cmp_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); do_sub_8(rdval, rsval); cy(3);}
+void xa_cpu::and_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_and_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::or_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_or_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::xor_byte_rd_rs(u8 rd, u8 rs) { u8 rdval = gr8(rd); u8 rsval = gr8(rs); u8 result = do_xor_8(rdval, rsval); sr8(rd, result); cy(3); }
+void xa_cpu::mov_byte_rd_rs(u8 rd, u8 rs) { u8 val = gr8(rs); do_nz_flags_8(val); sr8(rd, val); cy(3);}
+
+// ALUOP.w Rd, [Rs]
+// ALUOP.b Rd, [Rs]
+// ADD Rd, [Rs] Add reg-ind to reg 2 4 0000 S010 dddd 0sss
+// ADDC Rd, [Rs] Add reg-ind to reg w/ carry 2 4 0001 S010 dddd 0sss
+// SUB Rd, [Rs] Subtract reg-ind to reg 2 4 0010 S010 dddd 0sss
+// SUBB Rd, [Rs] Subtract w/ borrow reg-ind to reg 2 4 0011 S010 dddd 0sss
+// CMP Rd, [Rs] Compare reg-ind w/ reg 2 4 0100 S010 dddd 0sss
+// AND Rd, [Rs] Logical AND reg-ind to reg 2 4 0101 S010 dddd 0sss
+// OR Rd, [Rs] Logical OR reg-ind to reg 2 4 0110 S010 dddd 0sss
+// XOR Rd, [Rs] Logical XOR reg-ind to reg 2 4 0111 S010 dddd 0sss
+// MOV Rd, [Rs] Move reg-ind to reg 2 3 1000 S010 dddd 0sss
+void xa_cpu::aluop_word_rd_indrs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_indrs(rd, rs); break;
+ case 0x1: addc_word_rd_indrs(rd, rs); break;
+ case 0x2: sub_word_rd_indrs(rd, rs); break;
+ case 0x3: subb_word_rd_indrs(rd, rs); break;
+ case 0x4: cmp_word_rd_indrs(rd, rs); break;
+ case 0x5: and_word_rd_indrs(rd, rs); break;
+ case 0x6: or_word_rd_indrs(rd, rs); break;
+ case 0x7: xor_word_rd_indrs(rd, rs); break;
+ case 0x8: mov_word_rd_indrs(rd, rs); break;
+ default: fatalerror("UNK_ALUOP.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]); // ALUOP.w Rd, [Rs]
+ }
+}
+void xa_cpu::aluop_byte_rd_indrs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_indrs(rd, rs); break;
+ case 0x1: addc_byte_rd_indrs(rd, rs); break;
+ case 0x2: sub_byte_rd_indrs(rd, rs); break;
+ case 0x3: subb_byte_rd_indrs(rd, rs); break;
+ case 0x4: cmp_byte_rd_indrs(rd, rs); break;
+ case 0x5: and_byte_rd_indrs(rd, rs); break;
+ case 0x6: or_byte_rd_indrs(rd, rs); break;
+ case 0x7: xor_byte_rd_indrs(rd, rs); break;
+ case 0x8: mov_byte_rd_indrs(rd, rs); break;
+ default: fatalerror("UNK_ALUOP.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]); // ALUOP.b Rd, [Rs]
+ }
+}
+void xa_cpu::add_word_rd_indrs(u8 rd, u8 rs) { fatalerror("ADD.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::addc_word_rd_indrs(u8 rd, u8 rs){ fatalerror("ADDC.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::sub_word_rd_indrs(u8 rd, u8 rs) { fatalerror("SUB.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::subb_word_rd_indrs(u8 rd, u8 rs){ fatalerror("SUBB.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_word_rd_indrs(u8 rd, u8 rs) { fatalerror("CMP.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::and_word_rd_indrs(u8 rd, u8 rs) { fatalerror("AND.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::or_word_rd_indrs(u8 rd, u8 rs) { fatalerror("OR.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::xor_word_rd_indrs(u8 rd, u8 rs) { fatalerror("XOR.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::mov_word_rd_indrs(u8 rd, u8 rs) { u16 address = get_addr(rs); u16 val = rdat16(address); do_nz_flags_16(val); sr16(rd, val); cy(3); }
+
+void xa_cpu::add_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("ADD.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::addc_byte_rd_indrs(u8 rd, u8 rs){ fatalerror("ADDC.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::sub_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("SUB.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::subb_byte_rd_indrs(u8 rd, u8 rs){ fatalerror("SUBB.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("CMP.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::and_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("AND.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::or_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("OR.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::xor_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("XOR.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::mov_byte_rd_indrs(u8 rd, u8 rs) { u16 address = get_addr(rs); u8 val = rdat8(address); do_nz_flags_8(val); sr8(rd, val); cy(3); }
+
+
+// ALUOP.w [Rd], Rs
+// ALUOP.b [Rd], Rs
+// ADD [Rd], Rs Add reg to reg-ind 2 4 0000 S010 ssss 1ddd
+// ADDC [Rd], Rs Add reg to reg-ind w/ carry 2 4 0001 S010 ssss 1ddd
+// SUB [Rd], Rs Subtract reg to reg-ind 2 4 0010 S010 ssss 1ddd
+// SUBB [Rd], Rs Subtract w/ borrow reg to reg-ind 2 4 0011 S010 ssss 1ddd
+// CMP [Rd], Rs Compare reg w/ reg-ind 2 4 0100 S010 ssss 1ddd
+// AND [Rd], Rs Logical AND reg to reg-ind 2 4 0101 S010 ssss 1ddd
+// OR [Rd], Rs Logical OR reg to reg-ind 2 4 0110 S010 ssss 1ddd
+// XOR [Rd], Rs Logical XOR reg to reg-ind 2 4 0111 S010 ssss 1ddd
+// MOV [Rd], Rs Move reg to reg-ind 2 3 1000 S010 ssss 1ddd
+void xa_cpu::aluop_word_indrd_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrd_rs(rd, rs); break;
+ case 0x1: addc_word_indrd_rs(rd, rs); break;
+ case 0x2: sub_word_indrd_rs(rd, rs); break;
+ case 0x3: subb_word_indrd_rs(rd, rs); break;
+ case 0x4: cmp_word_indrd_rs(rd, rs); break;
+ case 0x5: and_word_indrd_rs(rd, rs); break;
+ case 0x6: or_word_indrd_rs(rd, rs); break;
+ case 0x7: xor_word_indrd_rs(rd, rs); break;
+ case 0x8: mov_word_indrd_rs(rd, rs); break;
+ default: logerror("UNK_ALUOP.w [%s], %s", m_regnames16[rd], m_regnames16[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::aluop_byte_indrd_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrd_rs(rd, rs); break;
+ case 0x1: addc_byte_indrd_rs(rd, rs); break;
+ case 0x2: sub_byte_indrd_rs(rd, rs); break;
+ case 0x3: subb_byte_indrd_rs(rd, rs); break;
+ case 0x4: cmp_byte_indrd_rs(rd, rs); break;
+ case 0x5: and_byte_indrd_rs(rd, rs); break;
+ case 0x6: or_byte_indrd_rs(rd, rs); break;
+ case 0x7: xor_byte_indrd_rs(rd, rs); break;
+ case 0x8: mov_byte_indrd_rs(rd, rs); break;
+ default: logerror("UNK_ALUOP.b [%s], %s", m_regnames16[rd], m_regnames8[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_indrd_rs(u8 rd, u8 rs) { fatalerror("ADD.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::addc_word_indrd_rs(u8 rd, u8 rs){ fatalerror("ADDC.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::sub_word_indrd_rs(u8 rd, u8 rs) { fatalerror("SUB.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::subb_word_indrd_rs(u8 rd, u8 rs){ fatalerror("SUBB.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_word_indrd_rs(u8 rd, u8 rs) { fatalerror("CMP.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::and_word_indrd_rs(u8 rd, u8 rs) { fatalerror("AND.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::or_word_indrd_rs(u8 rd, u8 rs) { fatalerror("OR.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::xor_word_indrd_rs(u8 rd, u8 rs) { fatalerror("XOR.w [%s], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::mov_word_indrd_rs(u8 rd, u8 rs) { u16 val = gr16(rs); do_nz_flags_16(val); u16 addr = get_addr(rd); wdat16(addr, val); cy(3); }
+
+void xa_cpu::add_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("ADD.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::addc_byte_indrd_rs(u8 rd, u8 rs){ fatalerror("ADDC.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::sub_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("SUB.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::subb_byte_indrd_rs(u8 rd, u8 rs){ fatalerror("SUBB.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::cmp_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("CMP.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::and_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("AND.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::or_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("OR.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::xor_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("XOR.b [%s], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::mov_byte_indrd_rs(u8 rd, u8 rs) { u8 val = gr8(rs); do_nz_flags_8(val); u16 addr = get_addr(rd); wdat8(addr, val); cy(3); }
+
+// ALUOP.w Rd, [Rs+]
+// ALUOP.b Rd, [Rs+]
+// ADD Rd, [Rs+] Add reg-ind w/ autoinc to reg 2 5 0000 S011 dddd 0sss
+// ADDC Rd, [Rs+] Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 dddd 0sss
+// SUB Rd, [Rs+] Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 dddd 0sss
+// SUBB Rd, [Rs+] Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 dddd 0sss
+// CMP Rd, [Rs+] Compare autoinc reg-ind w/ reg 2 5 0100 S011 dddd 0sss
+// AND Rd, [Rs+] Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 dddd 0sss
+// OR Rd, [Rs+] Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 dddd 0sss
+// XOR Rd, [Rs+] Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 dddd 0sss
+// MOV Rd, [Rs+] Move reg-ind w/ autoinc to reg 2 4 1000 S011 dddd 0sss
+void xa_cpu::aluop_word_rd_indrsinc(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_indrsinc(rd, rs); break;
+ case 0x1: addc_word_rd_indrsinc(rd, rs); break;
+ case 0x2: sub_word_rd_indrsinc(rd, rs); break;
+ case 0x3: subb_word_rd_indrsinc(rd, rs); break;
+ case 0x4: cmp_word_rd_indrsinc(rd, rs); break;
+ case 0x5: and_word_rd_indrsinc(rd, rs); break;
+ case 0x6: or_word_rd_indrsinc(rd, rs); break;
+ case 0x7: xor_word_rd_indrsinc(rd, rs); break;
+ case 0x8: mov_word_rd_indrsinc(rd, rs); break;
+ default: logerror("UNK_ALUOP.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]); do_nop(); break;
+ }
+}
+void xa_cpu::aluop_byte_rd_indrsinc(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_indrsinc(rd, rs); break;
+ case 0x1: addc_byte_rd_indrsinc(rd, rs); break;
+ case 0x2: sub_byte_rd_indrsinc(rd, rs); break;
+ case 0x3: subb_byte_rd_indrsinc(rd, rs); break;
+ case 0x4: cmp_byte_rd_indrsinc(rd, rs); break;
+ case 0x5: and_byte_rd_indrsinc(rd, rs); break;
+ case 0x6: or_byte_rd_indrsinc(rd, rs); break;
+ case 0x7: xor_byte_rd_indrsinc(rd, rs); break;
+ case 0x8: mov_byte_rd_indrsinc(rd, rs); break;
+ default: logerror("UNK_ALUOP.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]); do_nop(); break;
+ }
+}
+void xa_cpu::add_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("ADD.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::addc_word_rd_indrsinc(u8 rd, u8 rs){ fatalerror("ADDC.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::sub_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("SUB.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::subb_word_rd_indrsinc(u8 rd, u8 rs){ fatalerror("SUBB.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("CMP.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::and_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("AND.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::or_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("OR.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::xor_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("XOR.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::mov_word_rd_indrsinc(u8 rd, u8 rs) { fatalerror("MOV.w %s, [%s+]", m_regnames16[rd], m_regnames16[rs]);}
+
+void xa_cpu::add_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("ADD.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::addc_byte_rd_indrsinc(u8 rd, u8 rs){ fatalerror("ADDC.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::sub_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("SUB.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::subb_byte_rd_indrsinc(u8 rd, u8 rs){ fatalerror("SUBB.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("CMP.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::and_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("AND.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::or_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("OR.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::xor_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("XOR.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+void xa_cpu::mov_byte_rd_indrsinc(u8 rd, u8 rs) { fatalerror("MOV.b %s, [%s+]", m_regnames8[rd], m_regnames16[rs]);}
+
+// ALUOP.w [Rd+], Rs
+// ALUOP.b [Rd+], Rs
+// ADD [Rd+], Rs Add reg-ind w/ autoinc to reg 2 5 0000 S011 ssss 1ddd
+// ADDC [Rd+], Rs Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 ssss 1ddd
+// SUB [Rd+], Rs Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 ssss 1ddd
+// SUBB [Rd+], Rs Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 ssss 1ddd
+// CMP [Rd+], Rs Compare reg w/ autoinc reg-ind 2 5 0100 S011 ssss 1ddd
+// AND [Rd+], Rs Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 ssss 1ddd
+// OR [Rd+], Rs Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 ssss 1ddd
+// XOR [Rd+], Rs Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 ssss 1ddd
+// MOV [Rd+], Rs Move reg-ind w/ autoinc to reg 2 4 1000 S011 ssss 1ddd
+void xa_cpu::aluop_word_indrdinc_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_indrdinc_rs(rd, rs); break;
+ case 0x1: addc_word_indrdinc_rs(rd, rs); break;
+ case 0x2: sub_word_indrdinc_rs(rd, rs); break;
+ case 0x3: subb_word_indrdinc_rs(rd, rs); break;
+ case 0x4: cmp_word_indrdinc_rs(rd, rs); break;
+ case 0x5: and_word_indrdinc_rs(rd, rs); break;
+ case 0x6: or_word_indrdinc_rs(rd, rs); break;
+ case 0x7: xor_word_indrdinc_rs(rd, rs); break;
+ case 0x8: mov_word_indrdinc_rs(rd, rs); break;
+ default: logerror("UNK_ALUOP.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::aluop_byte_indrdinc_rs(int alu_op, u8 rd, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_indrdinc_rs(rd, rs); break;
+ case 0x1: addc_byte_indrdinc_rs(rd, rs); break;
+ case 0x2: sub_byte_indrdinc_rs(rd, rs); break;
+ case 0x3: subb_byte_indrdinc_rs(rd, rs); break;
+ case 0x4: cmp_byte_indrdinc_rs(rd, rs); break;
+ case 0x5: and_byte_indrdinc_rs(rd, rs); break;
+ case 0x6: or_byte_indrdinc_rs(rd, rs); break;
+ case 0x7: xor_byte_indrdinc_rs(rd, rs); break;
+ case 0x8: mov_byte_indrdinc_rs(rd, rs); break;
+ default: logerror("UNK_ALUOP.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("ADD.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::addc_word_indrdinc_rs(u8 rd, u8 rs){ fatalerror("ADDC.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::sub_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("SUB.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::subb_word_indrdinc_rs(u8 rd, u8 rs){ fatalerror("SUBB.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::cmp_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("CMP.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::and_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("AND.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::or_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("OR.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::xor_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("XOR.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+void xa_cpu::mov_word_indrdinc_rs(u8 rd, u8 rs) { fatalerror("MOV.w [%s+], %s", m_regnames16[rd], m_regnames16[rs]);}
+
+void xa_cpu::add_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("ADD.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::addc_byte_indrdinc_rs(u8 rd, u8 rs){ fatalerror("ADDC.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::sub_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("SUB.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::subb_byte_indrdinc_rs(u8 rd, u8 rs){ fatalerror("SUBB.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::cmp_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("CMP.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::and_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("AND.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::or_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("OR.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::xor_byte_indrdinc_rs(u8 rd, u8 rs) { fatalerror("XOR.b [%s+], %s", m_regnames16[rd], m_regnames8[rs]);}
+void xa_cpu::mov_byte_indrdinc_rs(u8 rd, u8 rs) { u16 address = get_addr(rd); u8 result = gr8(rs); wdat8(address, result); address++; do_nz_flags_8(result); set_addr(rd, address); cy(4); }
+
+
+// ALUOP.w Rd, [Rs+off8]
+// ALUOP.b Rd, [Rs+off8]
+// ADD Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg 3 6 0000 S100 dddd 0sss oooo oooo
+// ADDC Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg w/ carry 3 6 0001 S100 dddd 0sss oooo oooo
+// SUB Rd, [Rs+offset8] Subtract reg-ind w/ 8-bit offs to reg 3 6 0010 S100 dddd 0sss oooo oooo
+// SUBB Rd, [Rs+offset8] Subtract w/ borrow reg-ind w/ 8-bit offs to reg 3 6 0011 S100 dddd 0sss oooo oooo
+// CMP Rd, [Rs+offset8] Compare reg-ind w/ 8-bit offs w/ reg 3 6 0100 S100 dddd 0sss oooo oooo
+// AND Rd, [Rs+offset8] Logical AND reg-ind w/ 8-bit offs to reg 3 6 0101 S100 dddd 0sss oooo oooo
+// OR Rd, [Rs+offset8] Logical OR reg-ind w/ 8-bit offs to reg 3 6 0110 S100 dddd 0sss oooo oooo
+// XOR Rd, [Rs+offset8] Logical XOR reg-ind w/ 8-bit offs to reg 3 6 0111 S100 dddd 0sss oooo oooo
+// MOV Rd, [Rs+offset8] Move reg-ind w/ 8-bit offs to reg 3 5 1000 S100 dddd 0sss oooo oooo
+void xa_cpu::aluop_word_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x1: addc_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x2: sub_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x3: subb_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x4: cmp_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x5: and_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x6: or_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x7: xor_word_rd_rsoff8(rd, rs, offset8); break;
+ case 0x8: mov_word_rd_rsoff8(rd, rs, offset8); break;
+ default: logerror("UNK_ALUOP.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8); do_nop(); break;
+ }
+}
+void xa_cpu::aluop_byte_rd_rsoff8(int alu_op, u8 rd, u8 rs, u8 offset8)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x1: addc_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x2: sub_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x3: subb_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x4: cmp_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x5: and_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x6: or_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x7: xor_byte_rd_rsoff8(rd, rs, offset8); break;
+ case 0x8: mov_byte_rd_rsoff8(rd, rs, offset8); break;
+ default: logerror("UNK_ALUOP.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { u16 rdval = gr16(rd); u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rs) + fulloffset; u16 val = rdat16(address); u16 result = do_add_16(rdval, val); sr16(rd, result); cy(6); }
+void xa_cpu::addc_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8){ fatalerror("ADDC.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::sub_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("SUB.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::subb_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8){ fatalerror("SUBB.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::cmp_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("CMP.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::and_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("AND.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::or_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("OR.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::xor_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("XOR.w %s, [%s+#$%02x]", m_regnames16[rd], m_regnames16[rs], offset8);}
+void xa_cpu::mov_word_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rs) + fulloffset; u16 val = rdat16(address); do_nz_flags_16(val); sr16(rd, val); cy(5); }
+
+void xa_cpu::add_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("ADD.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::addc_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8){ fatalerror("ADDC.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::sub_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("SUB.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::subb_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8){ fatalerror("SUBB.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::cmp_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("CMP.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::and_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("AND.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::or_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("OR.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::xor_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { fatalerror("XOR.b %s, [%s+#$%02x]", m_regnames8[rd], m_regnames16[rs], offset8);}
+void xa_cpu::mov_byte_rd_rsoff8(u8 rd, u8 rs, u8 offset8) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rs) + fulloffset; u8 val = rdat8(address); do_nz_flags_8(val); sr8(rd, val); cy(5); }
+
+// ALUOP.w [Rd+off8], Rs
+// ALUOP.b [Rd+off8], Rs
+// ADD [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs 3 6 0000 S100 ssss 1ddd oooo oooo
+// ADDC [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs w/ carry 3 6 0001 S100 ssss 1ddd oooo oooo
+// SUB [Rd+offset8], Rs Subtract reg to reg-ind w/ 8-bit offs 3 6 0010 S100 ssss 1ddd oooo oooo
+// SUBB [Rd+offset8], Rs Subtract w/ borrow reg to reg-ind w/ 8-bit offs 3 6 0011 S100 ssss 1ddd oooo oooo
+// CMP [Rd+offset8], Rs Compare reg w/ reg-ind w/ 8-bit offs 3 6 0100 S100 ssss 1ddd oooo oooo
+// AND [Rd+offset8], Rs Logical AND reg to reg-ind w/ 8-bit offs 3 6 0101 S100 ssss 1ddd oooo oooo
+// OR [Rd+offset8], Rs Logical OR reg to reg-ind w/ 8-bit offs 3 6 0110 S100 ssss 1ddd oooo oooo
+// XOR [Rd+offset8], Rs Logical XOR reg to reg-ind w/ 8-bit offs 3 6 0111 S100 ssss 1ddd oooo oooo
+// MOV [Rd+offset8], Rs Move reg to reg-ind w/ 8-bit offs 3 5 1000 S100 ssss 1ddd oooo oooo
+void xa_cpu::aluop_word_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x1: addc_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x2: sub_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x3: subb_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x4: cmp_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x5: and_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x6: or_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x7: xor_word_rdoff8_rs(rd, offset8, rs); break;
+ case 0x8: mov_word_rdoff8_rs(rd, offset8, rs); break;
+ default: logerror("UNK_ALUOP.w [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames16[rs]); do_nop(); break;
+ }
+}
+void xa_cpu::aluop_byte_rdoff8_rs(int alu_op, u8 rd, u8 offset8, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x1: addc_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x2: sub_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x3: subb_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x4: cmp_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x5: and_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x6: or_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x7: xor_byte_rdoff8_rs(rd, offset8, rs); break;
+ case 0x8: mov_byte_rdoff8_rs(rd, offset8, rs); break;
+ default: logerror("UNK_ALUOP.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_add_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::addc_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_addc_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::sub_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_sub_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::subb_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs){ u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_subb_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::cmp_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); do_sub_16(val, rsval); cy(6); }
+void xa_cpu::and_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_and_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::or_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_or_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::xor_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; u16 val = rdat16(address); u16 rsval = gr16(rs); u16 result = do_xor_16(val, rsval); wdat16(address, result); cy(6); }
+void xa_cpu::mov_word_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u16 val = gr16(rs); u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; do_nz_flags_16(val); wdat16(address, val); cy(5); }
+
+void xa_cpu::add_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("ADD.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::addc_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs){ fatalerror("ADDC.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::sub_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("SUB.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::subb_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs){ fatalerror("SUBB.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::cmp_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("CMP.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::and_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("AND.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::or_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("OR.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::xor_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { fatalerror("XOR.b [%s+#$%02x], %s", m_regnames16[rd], offset8, m_regnames8[rs]);}
+void xa_cpu::mov_byte_rdoff8_rs(u8 rd, u8 offset8, u8 rs) { u8 val = gr8(rs); u16 fulloffset = util::sext(offset8, 8); u16 address = get_addr(rd) + fulloffset; do_nz_flags_8(val); wdat8(address, val); cy(5); }
+
+
+// ALUOP.w Rd, [Rs+off16]
+// ALUOP.b Rd, [Rs+off16]
+// ADD Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg 4 6 0000 S101 dddd 0sss oooo oooo oooo oooo
+// ADDC Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg w/ carry 4 6 0001 S101 dddd 0sss oooo oooo oooo oooo
+// SUB Rd, [Rs+offset16] Subtract reg-ind w/ 16-bit offs to reg 4 6 0010 S101 dddd 0sss oooo oooo oooo oooo
+// SUBB Rd, [Rs+offset16] Subtract w/ borrow reg-ind w/ 16-bit offs to reg 4 6 0011 S101 dddd 0sss oooo oooo oooo oooo
+// CMP Rd, [Rs+offset16] Compare reg-ind w/ 16-bit offs w/ reg 4 6 0100 S101 dddd 0sss oooo oooo oooo oooo
+// AND Rd, [Rs+offset16] Logical AND reg-ind w/ 16-bit offs to reg 4 6 0101 S101 dddd 0sss oooo oooo oooo oooo
+// OR Rd, [Rs+offset16] Logical OR reg-ind w/ 16-bit offs to reg 4 6 0110 S101 dddd 0sss oooo oooo oooo oooo
+// XOR Rd, [Rs+offset16] Logical XOR reg-ind w/ 16-bit offs to reg 4 6 0111 S101 dddd 0sss oooo oooo oooo oooo
+// MOV Rd, [Rs+offset16] Move reg-ind w/ 16-bit offs to reg 4 5 1000 S101 dddd 0sss oooo oooo oooo oooo
+void xa_cpu::aluop_word_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x1: addc_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x2: sub_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x3: subb_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x4: cmp_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x5: and_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x6: or_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x7: xor_word_rd_rsoff16(rd, rs, offset16); break;
+ case 0x8: mov_word_rd_rsoff16(rd, rs, offset16); break;
+ default: logerror("UNK_ALUOP.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16); do_nop(); break;
+ }
+}
+void xa_cpu::aluop_byte_rsoff16(int alu_op, u8 rd, u8 rs, u16 offset16)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x1: addc_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x2: sub_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x3: subb_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x4: cmp_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x5: and_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x6: or_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x7: xor_byte_rd_rsoff16(rd, rs, offset16); break;
+ case 0x8: mov_byte_rd_rsoff16(rd, rs, offset16); break;
+ default: logerror("UNK_ALUOP.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("ADD.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::addc_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16){ fatalerror("ADDC.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::sub_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("SUB.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::subb_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16){ fatalerror("SUBB.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::cmp_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("CMP.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::and_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("AND.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::or_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("OR.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::xor_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("XOR.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+void xa_cpu::mov_word_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("MOV.w %s, [%s+#$%04x]", m_regnames16[rd], m_regnames16[rs], offset16);}
+
+void xa_cpu::add_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("ADD.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::addc_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16){ fatalerror("ADDC.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::sub_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("SUB.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::subb_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16){ fatalerror("SUBB.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::cmp_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("CMP.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::and_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("AND.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::or_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("OR.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::xor_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("XOR.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+void xa_cpu::mov_byte_rd_rsoff16(u8 rd, u8 rs, u16 offset16) { fatalerror("MOV.b %s, [%s+#$%04x]", m_regnames8[rd], m_regnames16[rs], offset16);}
+
+// ALUOP.w [Rd+off16], Rs
+// ALUOP.b [Rd+off16], Rs
+// ADD [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs 4 6 0000 S101 ssss 1ddd oooo oooo oooo oooo
+// ADDC [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs w/ carry 4 6 0001 S101 ssss 1ddd oooo oooo oooo oooo
+// SUB [Rd+offset16], Rs Subtract reg to reg-ind w/ 16-bit offs 4 6 0010 S101 ssss 1ddd oooo oooo oooo oooo
+// SUBB [Rd+offset16], Rs Subtract w/ borrow reg to reg-ind w/ 16-bit offs 4 6 0011 S101 ssss 1ddd oooo oooo oooo oooo
+// CMP [Rd+offset16], Rs Compare reg w/ reg-ind w/ 16-bit offs 4 6 0100 S101 ssss 1ddd oooo oooo oooo oooo
+// AND [Rd+offset16], Rs Logical AND reg to reg-ind w/ 16-bit offs 4 6 0101 S101 ssss 1ddd oooo oooo oooo oooo
+// OR [Rd+offset16], Rs Logical OR reg to reg-ind w/ 16-bit offs 4 6 0110 S101 ssss 1ddd oooo oooo oooo oooo
+// XOR [Rd+offset16], Rs Logical XOR reg to reg-ind w/ 16-bit offs 4 6 0111 S101 ssss 1ddd oooo oooo oooo oooo
+// MOV [Rd+offset16], Rs Move reg to reg-ind w/ 16-bit offs 4 5 1000 S101 ssss 1ddd oooo oooo oooo oooo
+void xa_cpu::aluop_word_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x1: addc_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x2: sub_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x3: subb_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x4: cmp_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x5: and_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x6: or_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x7: xor_word_rdoff16_rs(rd, offset16, rs); break;
+ case 0x8: mov_word_rdoff16_rs(rd, offset16, rs); break;
+ default: logerror("UNK_ALUOP.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]); do_nop(); break;
+ }
+}
+void xa_cpu::aluop_byte_rdoff16_rs(int alu_op, u8 rd, u16 offset16, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x1: addc_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x2: sub_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x3: subb_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x4: cmp_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x5: and_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x6: or_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x7: xor_byte_rdoff16_rs(rd, offset16, rs); break;
+ case 0x8: mov_byte_rdoff16_rs(rd, offset16, rs); break;
+ default: logerror("UNK_ALUOP.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("ADD.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::addc_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs){ fatalerror("ADDC.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::sub_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("SUB.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::subb_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs){ fatalerror("SUBB.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::cmp_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("CMP.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::and_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("AND.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::or_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("OR.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::xor_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("XOR.w [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames16[rs]);}
+void xa_cpu::mov_word_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { u16 val = gr16(rs); u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; do_nz_flags_16(val); wdat16(address, val); cy(5); }
+
+void xa_cpu::add_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("ADD.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::addc_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs){ fatalerror("ADDC.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::sub_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("SUB.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::subb_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs){ fatalerror("SUBB.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::cmp_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("CMP.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::and_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("AND.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::or_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("OR.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::xor_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { fatalerror("XOR.b [%s+#$%04x], %s", m_regnames16[rd], offset16, m_regnames8[rs]);}
+void xa_cpu::mov_byte_rdoff16_rs(u8 rd, u16 offset16, u8 rs) { u8 val = gr16(rs); u16 fulloffset = offset16; u16 address = get_addr(rd) + fulloffset; do_nz_flags_8(val); wdat8(address, val); cy(5); }
+
+// ALUOP.w Rd, Direct
+// ALUOP.b Rd, Direct
+// ADD Rd, direct Add mem to reg 3 4 0000 S110 dddd 0DDD DDDD DDDD
+// ADDC Rd, direct Add mem to reg w/ carry 3 4 0001 S110 dddd 0DDD DDDD DDDD
+// SUB Rd, direct Subtract mem to reg 3 4 0010 S110 dddd 0DDD DDDD DDDD
+// SUBB Rd, direct Subtract w/ borrow mem to reg 3 4 0011 S110 dddd 0DDD DDDD DDDD
+// CMP Rd, direct Compare mem w/ reg 3 4 0100 S110 dddd 0DDD DDDD DDDD
+// AND Rd, direct Logical AND mem to reg 3 4 0101 S110 dddd 0DDD DDDD DDDD
+// OR Rd, direct Logical OR mem to reg 3 4 0110 S110 dddd 0DDD DDDD DDDD
+// XOR Rd, direct Logical XOR mem to reg 3 4 0111 S110 dddd 0DDD DDDD DDDD
+// MOV Rd, direct Move mem to reg 3 4 1000 S110 dddd 0DDD DDDD DDDD
+void xa_cpu::aluop_word_rd_direct(int alu_op, u8 rd, u16 direct)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_rd_direct(rd, direct); break;
+ case 0x1: addc_word_rd_direct(rd, direct); break;
+ case 0x2: sub_word_rd_direct(rd, direct); break;
+ case 0x3: subb_word_rd_direct(rd, direct); break;
+ case 0x4: cmp_word_rd_direct(rd, direct); break;
+ case 0x5: and_word_rd_direct(rd, direct); break;
+ case 0x6: or_word_rd_direct(rd, direct); break;
+ case 0x7: xor_word_rd_direct(rd, direct); break;
+ case 0x8: mov_word_rd_direct(rd, direct); break;
+ default: logerror("UNK_ALUOP.w %s, %s", m_regnames16[rd], get_directtext(direct)); do_nop(); break;
+ }
+}
+
+void xa_cpu::aluop_byte_rd_direct(int alu_op, u8 rd, u16 direct)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_rd_direct(rd, direct); break;
+ case 0x1: addc_byte_rd_direct(rd, direct); break;
+ case 0x2: sub_byte_rd_direct(rd, direct); break;
+ case 0x3: subb_byte_rd_direct(rd, direct); break;
+ case 0x4: cmp_byte_rd_direct(rd, direct); break;
+ case 0x5: and_byte_rd_direct(rd, direct); break;
+ case 0x6: or_byte_rd_direct(rd, direct); break;
+ case 0x7: xor_byte_rd_direct(rd, direct); break;
+ case 0x8: mov_byte_rd_direct(rd, direct); break;
+ default: logerror("UNK_ALUOP.b %s, %s", m_regnames8[rd], get_directtext(direct)); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_add_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::addc_word_rd_direct(u8 rd, u16 direct){ u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_addc_16(rdval, val); sr16(rd, result); cy(4);}
+void xa_cpu::sub_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_sub_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::subb_word_rd_direct(u8 rd, u16 direct){ u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_subb_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::cmp_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); do_sub_16(rdval, val); cy(4); }
+void xa_cpu::and_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_and_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::or_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_or_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::xor_word_rd_direct(u8 rd, u16 direct) { u16 rdval = gr16(rd); u16 val = read_direct16(direct); u16 result = do_xor_16(rdval, val); sr16(rd, result); cy(4); }
+void xa_cpu::mov_word_rd_direct(u8 rd, u16 direct) { u16 val = read_direct16(direct); do_nz_flags_16(val); sr16(rd, val); cy(4);}
+
+void xa_cpu::add_byte_rd_direct(u8 rd, u16 direct) { fatalerror("ADD.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::addc_byte_rd_direct(u8 rd, u16 direct){ fatalerror("ADDC.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::sub_byte_rd_direct(u8 rd, u16 direct) { fatalerror("SUB.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::subb_byte_rd_direct(u8 rd, u16 direct){ fatalerror("SUBB.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::cmp_byte_rd_direct(u8 rd, u16 direct) { u8 rdval = gr8(rd); u8 val = read_direct8(direct); do_sub_8(rdval, val); cy(4); }
+void xa_cpu::and_byte_rd_direct(u8 rd, u16 direct) { fatalerror("AND.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::or_byte_rd_direct(u8 rd, u16 direct) { fatalerror("OR.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::xor_byte_rd_direct(u8 rd, u16 direct) { fatalerror("XOR.b %s, %s", m_regnames8[rd], get_directtext(direct));}
+void xa_cpu::mov_byte_rd_direct(u8 rd, u16 direct) { u8 val = read_direct8(direct); do_nz_flags_8(val); sr8(rd, val); cy(4); }
+
+// ALUOP.w Direct, Rs
+// ALUOP.b Direct, Rs
+// ADD direct, Rs Add reg to mem 3 4 0000 S110 ssss 1DDD DDDD DDDD
+// ADDC direct, Rs Add reg to mem w/ carry 3 4 0001 S110 ssss 1DDD DDDD DDDD
+// SUB direct, Rs Subtract reg to mem 3 4 0010 S110 ssss 1DDD DDDD DDDD
+// SUBB direct, Rs Subtract w/ borrow reg to mem 3 4 0011 S110 ssss 1DDD DDDD DDDD
+// CMP direct, Rs Compare reg w/ mem 3 4 0100 S110 ssss 1DDD DDDD DDDD
+// AND direct, Rs Logical AND reg to mem 3 4 0101 S110 ssss 1DDD DDDD DDDD
+// OR direct, Rs Logical OR reg to mem 3 4 0110 S110 ssss 1DDD DDDD DDDD
+// XOR direct, Rs Logical XOR reg to mem 3 4 0111 S110 ssss 1DDD DDDD DDDD
+// MOV direct, Rs Move reg to mem 3 4 1000 S110 ssss 1DDD DDDD DDDD
+
+void xa_cpu::aluop_word_direct_rs(int alu_op, u16 direct, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_word_direct_rs(direct, rs); break;
+ case 0x1: addc_word_direct_rs(direct, rs); break;
+ case 0x2: sub_word_direct_rs(direct, rs); break;
+ case 0x3: subb_word_direct_rs(direct, rs); break;
+ case 0x4: cmp_word_direct_rs(direct, rs); break;
+ case 0x5: and_word_direct_rs(direct, rs); break;
+ case 0x6: or_word_direct_rs(direct, rs); break;
+ case 0x7: xor_word_direct_rs(direct, rs); break;
+ case 0x8: mov_word_direct_rs(direct, rs); break;
+ default: logerror("UNK_ALUOP.w %s, %s", get_directtext(direct), m_regnames16[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::aluop_byte_direct_rs(int alu_op, u16 direct, u8 rs)
+{
+ switch (alu_op)
+ {
+ case 0x0: add_byte_direct_rs(direct, rs); break;
+ case 0x1: addc_byte_direct_rs(direct, rs); break;
+ case 0x2: sub_byte_direct_rs(direct, rs); break;
+ case 0x3: subb_byte_direct_rs(direct, rs); break;
+ case 0x4: cmp_byte_direct_rs(direct, rs); break;
+ case 0x5: and_byte_direct_rs(direct, rs); break;
+ case 0x6: or_byte_direct_rs(direct, rs); break;
+ case 0x7: xor_byte_direct_rs(direct, rs); break;
+ case 0x8: mov_byte_direct_rs(direct, rs); break;
+ default: logerror("UNK_ALUOP.b %s, %s", get_directtext(direct), m_regnames8[rs]); do_nop(); break;
+ }
+}
+
+void xa_cpu::add_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_add_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::addc_word_direct_rs(u16 direct, u8 rs){ u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_addc_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::sub_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_sub_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::subb_word_direct_rs(u16 direct, u8 rs){ u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_subb_16(directval, val); write_direct16(direct, result); cy(4) ; }
+void xa_cpu::cmp_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); do_sub_16(directval, val); cy(4); }
+void xa_cpu::and_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_and_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::or_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_or_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::xor_word_direct_rs(u16 direct, u8 rs) { u16 directval = read_direct16(direct); u16 val = gr16(rs); u16 result = do_xor_16(directval, val); write_direct16(direct, result); cy(4); }
+void xa_cpu::mov_word_direct_rs(u16 direct, u8 rs) { u16 val = gr16(rs); do_nz_flags_16(val); write_direct16(direct, val); cy(4); }
+
+void xa_cpu::add_byte_direct_rs(u16 direct, u8 rs) { fatalerror("ADD.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::addc_byte_direct_rs(u16 direct, u8 rs){ fatalerror("ADDC.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::sub_byte_direct_rs(u16 direct, u8 rs) { fatalerror("SUB.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::subb_byte_direct_rs(u16 direct, u8 rs){ fatalerror("SUBB.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::cmp_byte_direct_rs(u16 direct, u8 rs) { u8 directval = read_direct8(direct); u8 val = gr8(rs); do_sub_8(directval, val); cy(4); }
+void xa_cpu::and_byte_direct_rs(u16 direct, u8 rs) { fatalerror("AND.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::or_byte_direct_rs(u16 direct, u8 rs) { fatalerror("OR.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::xor_byte_direct_rs(u16 direct, u8 rs) { fatalerror("XOR.b %s, %s", get_directtext(direct), m_regnames8[rs]);}
+void xa_cpu::mov_byte_direct_rs(u16 direct, u8 rs) { u8 val = gr8(rs); do_nz_flags_8(val); write_direct8(direct, val); cy(4); }
+
+///////////////////////////////////////////////////////
+
+// MOVS Rd, #data4 Move 4-bit sign-extended imm data to reg 2 3 1011 S001 dddd iiii
+void xa_cpu::movs_word_rd_data4(u8 rd, u8 data4) { u16 data = util::sext(data4, 4); sr16(rd, data); do_nz_flags_16(data); cy(3); }
+void xa_cpu::movs_byte_rd_data4(u8 rd, u8 data4) { u8 data = util::sext(data4, 4); sr8(rd, data); do_nz_flags_8(data); cy(3); }
+// ADDS Rd, #data4 Add 4-bit signed imm data to reg 2 3 1010 S001 dddd iiii
+void xa_cpu::adds_word_rd_data4(u8 rd, u8 data4) { u16 data = util::sext(data4, 4); u16 regval = gr16(rd); regval += data; do_nz_flags_16(regval); sr16(rd, regval); cy(3); }
+void xa_cpu::adds_byte_rd_data4(u8 rd, u8 data4) { u8 data = util::sext(data4, 4); u8 regval = gr8(rd); regval += data; do_nz_flags_8(regval); sr8(rd, regval); cy(3); }
+
+// MOVS [Rd], #data4 Move 4-bit sign-extended imm data to reg-ind 2 3 1011 S010 0ddd iiii
+void xa_cpu::movs_word_indrd_data4(u8 rd, u8 data4){ u16 data = util::sext(data4, 4); u16 address = get_addr(rd); wdat16(address, data); do_nz_flags_16(data); cy(3); }
+void xa_cpu::movs_byte_indrd_data4(u8 rd, u8 data4){ u8 data = util::sext(data4, 4); u16 address = get_addr(rd); wdat8(address, data); do_nz_flags_8(data); cy(3); }
+// ADDS [Rd], #data4 Add 4-bit signed imm data to reg-ind 2 4 1010 S010 0ddd iiii
+void xa_cpu::adds_word_indrd_data4(u8 rd, u8 data4){ u16 data = util::sext(data4, 4); u16 address = get_addr(rd); u16 rdval = rdat16(address); u16 result = do_add_16(rdval, data); wdat16(address, result); cy(4); }
+void xa_cpu::adds_byte_indrd_data4(u8 rd, u8 data4){ u8 data = util::sext(data4, 4); u16 address = get_addr(rd); u8 rdval = rdat8(address); u8 result = do_add_8(rdval, data); wdat8(address, result); cy(4); }
+
+// MOVS [Rd+], #data4 Move 4-bit sign-extended imm data to reg-ind w/ autoinc 2 4 1011 S011 0ddd iiii
+void xa_cpu::movs_word_indrdinc_data4(u8 rd, u8 data4) { u16 data = util::sext(data4, 4); u16 address = get_addr(rd); wdat16(address, data); address += 2; do_nz_flags_16(data); set_addr(rd, address); cy(4); }
+void xa_cpu::movs_byte_indrdinc_data4(u8 rd, u8 data4) { u8 data = util::sext(data4, 4); u16 address = get_addr(rd); wdat8(address, data); address++; do_nz_flags_8(data); set_addr(rd, address); cy(4); }
+// ADDS [Rd+], #data4 Add 4-bit signed imm data to reg-ind w/ autoinc 2 5 1010 S011 0ddd iiii
+void xa_cpu::adds_word_indrdinc_data4(u8 rd, u8 data4){ fatalerror("ADDS.w [%s+], %s", m_regnames16[rd], show_expanded_data4(data4, 1)); }
+void xa_cpu::adds_byte_indrdinc_data4(u8 rd, u8 data4){ fatalerror("ADDS.b [%s+], %s", m_regnames16[rd], show_expanded_data4(data4, 0)); }
+
+// MOVS [Rd+offset8], #data4 Move reg-ind w/ 8-bit offs to 4-bit sign-extended imm data 3 5 1011 S100 0ddd iiii oooo oooo
+void xa_cpu::movs_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4) { u16 data = util::sext(data4, 4); u16 fulloffset = util::sext(off8, 8); u16 address = get_addr(rd) + fulloffset; wdat16(address, data); do_nz_flags_16(data); cy(5); }
+void xa_cpu::movs_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4){ u8 data = util::sext(data4, 4); u16 fulloffset = util::sext(off8, 8); u16 address = get_addr(rd) + fulloffset; wdat8(address, data); do_nz_flags_8(data); cy(5); }
+// ADDS [Rd+offset8], #data4 Add reg-ind w/ 8-bit offs to 4-bit signed imm data 3 6 1010 S100 0ddd iiii oooo oooo
+void xa_cpu::adds_word_indrdoff8_data4(u8 rd, u8 off8, u8 data4){ u16 data = util::sext(data4, 4); u16 fulloffset = util::sext(off8, 8); u16 address = get_addr(rd) + fulloffset; u16 rdval = rdat16(address); u16 result = do_add_16(rdval, data); wdat16(address, result); cy(4); }
+void xa_cpu::adds_byte_indrdoff8_data4(u8 rd, u8 off8, u8 data4){ u8 data = util::sext(data4, 4); u16 fulloffset = util::sext(off8, 8); u16 address = get_addr(rd) + fulloffset; u8 rdval = rdat8(address); u8 result = do_add_8(rdval, data); wdat8(address, result); cy(4); }
+
+// MOVS [Rd+offset16], #data4 Move reg-ind w/ 16-bit offs to 4-bit sign-extended imm data 4 5 1011 S101 0ddd iiii oooo oooo oooo oooo
+void xa_cpu::movs_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4){ fatalerror("MOVS.w [%s+$%04x], %s", m_regnames16[rd], off16, show_expanded_data4(data4, 1)); }
+void xa_cpu::movs_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4){ fatalerror("MOVS.b [%s+$%04x], %s", m_regnames16[rd], off16, show_expanded_data4(data4, 0)); }
+// ADDS [Rd+offset16], #data4 Add reg-ind w/ 16-bit offs to 4-bit signed imm data 4 6 1010 S101 0ddd iiii oooo oooo oooo oooo
+void xa_cpu::adds_word_indrdoff16_data4(u8 rd, u16 off16, u8 data4){ fatalerror("ADDS.w [%s+$%04x], %s", m_regnames16[rd], off16, show_expanded_data4(data4, 1)); }
+void xa_cpu::adds_byte_indrdoff16_data4(u8 rd, u16 off16, u8 data4){ fatalerror("ADDS.b [%s+$%04x], %s", m_regnames16[rd], off16, show_expanded_data4(data4, 0)); }
+
+// MOVS direct, #data4 Move 4-bit sign-extended imm data to mem 3 3 1011 S110 0DDD iiii DDDD DDDD
+void xa_cpu::movs_word_direct_data4(u16 direct, u8 data4) { u16 data = util::sext(data4, 4); do_nz_flags_16(data); write_direct16(direct, data); cy(3); }
+void xa_cpu::movs_byte_direct_data4(u16 direct, u8 data4) { u8 data = util::sext(data4, 4); do_nz_flags_8(data); write_direct8(direct, data); cy(3); }
+// ADDS direct, #data4 Add 4-bit signed imm data to mem 3 4 1010 S110 0DDD iiii DDDD DDDD
+void xa_cpu::adds_word_direct_data4(u16 direct, u8 data4){ fatalerror("ADDS.w %s, %s\n", get_directtext(direct), show_expanded_data4(data4, 0)); }
+void xa_cpu::adds_byte_direct_data4(u16 direct, u8 data4){ u8 directval = read_direct8(direct); u8 data = util::sext(data4, 4); directval += data; do_nz_flags_8(directval); write_direct8(direct, directval); cy(4); }
+
+// CALL rel16 Relative call (range +/- 64K) 3 7/4(PZ) 1100 0101 rrrr rrrr rrrr rrrr
+void xa_cpu::call_rel16(u16 rel16) { if (m_pagezeromode) { push_word_to_stack(m_pc); set_pc_in_current_page(expand_rel16(rel16)); cy(4); } else { cy(7); fatalerror("CALL rel16 not in pagezero mode"); } }
+
+// BCC rel8 Branch if the carry flag is clear 2 6t/3nt 1111 0000 rrrr rrrr
+void xa_cpu::bcc_rel8(u8 rel8) { if (get_c_flag() == 0) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BCS rel8 Branch if the carry flag is set 2 6t/3nt 1111 0001 rrrr rrrr
+void xa_cpu::bcs_rel8(u8 rel8) { if (get_c_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BNE rel8 Branch if the zero flag is not set 2 6t/3nt 1111 0010 rrrr rrrr
+void xa_cpu::bne_rel8(u8 rel8) { if (get_z_flag() == 0) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BEQ rel8 Branch if the zero flag is set 2 6t/3nt 1111 0011 rrrr rrrr
+void xa_cpu::beq_rel8(u8 rel8) { if (get_z_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BNV rel8 Branch if overflow flag is clear 2 6t/3nt 1111 0100 rrrr rrrr
+void xa_cpu::bnv_rel8(u8 rel8) { if (!get_v_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BOV rel8 Branch if overflow flag is set 2 6t/3nt 1111 0101 rrrr rrrr
+void xa_cpu::bov_rel8(u8 rel8) { if (get_v_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BPL rel8 Branch if the negative flag is clear 2 6t/3nt 1111 0110 rrrr rrrr
+void xa_cpu::bpl_rel8(u8 rel8) { if (!get_n_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BMI rel8 Branch if the negative flag is set 2 6t/3nt 1111 0111 rrrr rrrr
+void xa_cpu::bmi_rel8(u8 rel8) { if (get_n_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BG rel8 Branch if greater than (unsigned) 2 6t/3nt 1111 1000 rrrr rrrr
+void xa_cpu::bg_rel8(u8 rel8) { fatalerror("BG %04x\n", expand_rel8(rel8)); }
+// BL rel8 Branch if less than or equal to (unsigned) 2 6t/3nt 1111 1001 rrrr rrrr
+void xa_cpu::bl_rel8(u8 rel8) { fatalerror("BL %04x\n", expand_rel8(rel8)); }
+// BGE rel8 Branch if greater than or equal to (signed) 2 6t/3nt 1111 1010 rrrr rrrr
+void xa_cpu::bge_rel8(u8 rel8) { fatalerror("BGE %04x\n", expand_rel8(rel8)); }
+// BLT rel8 Branch if less than (signed) 2 6t/3nt 1111 1011 rrrr rrrr
+void xa_cpu::blt_rel8(u8 rel8) { if (get_n_flag() ^ get_v_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BGT rel8 Branch if greater than (signed) 2 6t/3nt 1111 1100 rrrr rrrr
+void xa_cpu::bgt_rel8(u8 rel8) { if ((get_z_flag() | get_n_flag()) ^ get_v_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); } else { cy(3); } }
+// BLE rel8 Branch if less than or equal to (signed) 2 6t/3nt 1111 1101 rrrr rrrr
+void xa_cpu::ble_rel8(u8 rel8) { fatalerror("BLE %04x\n", expand_rel8(rel8)); }
+// BR rel8 Short unconditional branch 2 6 1111 1110 rrrr rrrr
+void xa_cpu::br_rel8(u8 rel8) { set_pc_in_current_page(expand_rel8(rel8)); cy(6); }
+
+// immediate shifts
+
+// ASL Rd, #data4 Logical left shift reg by the 4-bit imm value 2 a* 1101 SS01 dddd iiii
+void xa_cpu::asl_byte_rd_imm4(u8 rd, u8 amount) { fatalerror("ASL.b %s, %d", m_regnames8[rd], amount); }
+void xa_cpu::asl_word_rd_imm4(u8 rd, u8 amount) { u16 fullreg = gr16(rd); fullreg = asl32_helper(fullreg, amount); sr16(rd, fullreg); }
+// ASL Rd, #data5 Logical left shift reg by the 5-bit imm value 2 a* 1101 1101 dddi iiii
+void xa_cpu::asl_dword_rd_imm5(u8 rd, u8 amount) { u32 fullreg = gr32(rd); fullreg = asl32_helper(fullreg, amount); sr32(rd, fullreg); }
+
+// ASR Rd, #data4 Arithmetic shift right reg by the 4-bit imm count 2 a* 1101 SS10 dddd iiii
+void xa_cpu::asr_byte_rd_imm4(u8 rd, u8 amount) { fatalerror("ASR.b %s, %d", m_regnames8[rd], amount); }
+void xa_cpu::asr_word_rd_imm4(u8 rd, u8 amount) { fatalerror("ASR.w %s, %d", m_regnames16[rd], amount); }
+// ASR Rd, #data5 Arithmetic shift right reg by the 5-bit imm count 2 a* 1101 1110 dddi iiii
+void xa_cpu::asr_dword_rd_imm5(u8 rd, u8 amount) { fatalerror("ASR.dw %s, %d", m_regnames16[rd], amount); }
+
+// LSR Rd, #data4 Logical right shift reg by the 4-bit imm value 2 a* 1101 SS00 dddd iiii
+void xa_cpu::lsr_byte_rd_imm4(u8 rd, u8 amount) { fatalerror("LSR.b %s, %d", m_regnames8[rd], amount); }
+void xa_cpu::lsr_word_rd_imm4(u8 rd, u8 amount) { u16 fullreg = gr16(rd); fullreg = lsr32_helper(fullreg, amount); sr16(rd, fullreg); }
+// LSR Rd, #data5 Logical right shift reg by the 4-bit imm value 2 a* 1101 1100 dddi iiii
+void xa_cpu::lsr_dword_rd_imm5(u8 rd, u8 amount) { u32 fullreg = gr32(rd); fullreg = lsr32_helper(fullreg, amount); sr32(rd, fullreg); }
+
+// register form shifts
+
+//ASL Rd, Rs Logical left shift dest reg by the value in the src reg 2 a* 1100 SS01 dddd ssss
+void xa_cpu::asl_byte_rd_rs(u8 rd, u8 rs) { fatalerror("ASL.b %s, %d", m_regnames8[rd], m_regnames8[rs]); }
+void xa_cpu::asl_word_rd_rs(u8 rd, u8 rs) { fatalerror("ASL.w %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+void xa_cpu::asl_dword_rd_rs(u8 rd, u8 rs) { u32 fullreg = gr32(rd); u8 amount = gr8(rs); fullreg = lsr32_helper(fullreg, amount); sr32(rd, fullreg); cy(7); }
+
+// ASR Rd, Rs Arithmetic shift right dest reg by the count in the src 2 a* 1100 SS10 dddd ssss
+void xa_cpu::asr_byte_rd_rs(u8 rd, u8 rs) { fatalerror("ASR.b %s, %d", m_regnames8[rd], m_regnames8[rs]); }
+void xa_cpu::asr_word_rd_rs(u8 rd, u8 rs) { fatalerror("ASR.w %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+void xa_cpu::asr_dword_rd_rs(u8 rd, u8 rs) { fatalerror("ASR.dw %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+
+// LSR Rd, Rs Logical right shift dest reg by the value in the src reg 2 a* 1100 SS00 dddd ssss
+void xa_cpu::lsr_byte_rd_rs(u8 rd, u8 rs) { fatalerror("LSR.b %s, %d", m_regnames8[rd], m_regnames8[rs]); }
+void xa_cpu::lsr_word_rd_rs(u8 rd, u8 rs) { fatalerror("LSR.w %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+void xa_cpu::lsr_dword_rd_rs(u8 rd, u8 rs) { fatalerror("LSR.dw %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+
+// NORM Rd, Rs Logical shift left dest reg by the value in the src reg until MSB set 2 a* 1100 SS11 dddd ssss
+void xa_cpu::norm_byte_rd_rs(u8 rd, u8 rs) { fatalerror("NORM.b %s, %d", m_regnames8[rd], m_regnames8[rs]); }
+void xa_cpu::norm_word_rd_rs(u8 rd, u8 rs) { fatalerror("NORM.w %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+void xa_cpu::norm_dword_rd_rs(u8 rd, u8 rs) { fatalerror("NORM.dw %s, %d", m_regnames16[rd], m_regnames8[rs]); }
+
+
+//MULU.b Rd, Rs
+void xa_cpu::mulu_byte_rd_rs(u8 rd, u8 rs) { fatalerror( "MULU.b %s, %s", m_regnames8[rd], m_regnames8[rs]); }
+//DIVU.b Rd, Rs
+void xa_cpu::divu_byte_rd_rs(u8 rd, u8 rs) { fatalerror( "DIVU.b %s, %s", m_regnames8[rd], m_regnames8[rs]); }
+//MULU.w Rd, Rs
+void xa_cpu::mulu_word_rd_rs(u8 rd, u8 rs)
+{
+ if (rd & 1)
+ fatalerror("mulu_word_rd_rs with low rd bit set\n");
+
+ u16 fullval = gr16(rd);
+ u16 rsval = gr16(rs);
+
+ u32 result = (u32)fullval * rsval;
+
+ if (result & 0xffff0000)
+ set_v_flag();
+ else
+ clear_v_flag();
+
+ if (result == 0x0000)
+ set_z_flag();
+ else
+ clear_z_flag();
+
+ if (result & 0x8000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ // TODO: verify these are writing to the correct registers
+ sr16(rd, result & 0xffff);
+ sr16(rd + 1, result >> 16);
+
+ clear_c_flag();
+
+ cy(12);
+}
+//DIVU.w Rd, Rs
+void xa_cpu::divu_word_rd_rs(u8 rd, u8 rs) { fatalerror( "DIVU.w %s, %s", m_regnames16[rd], m_regnames16[rs]); }
+// MUL.w Rd, Rs
+void xa_cpu::mul_word_rd_rs(u8 rd, u8 rs) { fatalerror( "MUL.w %s, %s", m_regnames16[rd], m_regnames16[rs]); }
+// DIV.w Rd, Rs
+void xa_cpu::div_word_rd_rs(u8 rd, u8 rs) { fatalerror( "DIV.w %s, %s", m_regnames16[rd], m_regnames16[rs]); }
+
+//DIV.w Rd, #data8
+void xa_cpu::div_word_rd_data8(u8 rd, u8 data8) { fatalerror( "DIV.w %s, #$%02x", m_regnames8[rd], data8); }
+//DIVU.b Rd, #data8
+void xa_cpu::divu_byte_rd_data8(u8 rd, u8 data8) { fatalerror( "DIVU.b %s, #$%02x", m_regnames8[rd], data8); }
+//DIVU.w Rd, #data8
+void xa_cpu::divu_word_rd_data8(u8 rd, u8 data8) { fatalerror( "DIVU.w %s, #$%02x", m_regnames8[rd], data8); }
+//MULU.b Rd, #data8
+void xa_cpu::mulu_byte_rd_data8(u8 rd, u8 data8) { fatalerror( "MULU.b %s, #$%02x", m_regnames8[rd], data8); }
+
+//MULU.w Rd, #data16
+void xa_cpu::mulu_word_rd_data16(u8 rd, u16 data16) { fatalerror( "MULU.w %s, #$%04x", m_regnames16[rd], data16); }
+// DIVU.d Rd, #data16 32X16 unsigned double reg divide w/ imm word 4 22 1110 1001 ddd0 0001 iiii iiii iiii iiii
+void xa_cpu::divu_dword_rd_data16(u8 rd, u16 data16) { fatalerror( "DIVU.d %s, #$%04x", m_regnames16[rd], data16); }
+//MUL.w Rd, #data16
+void xa_cpu::mul_word_rd_data16(u8 rd, u16 data16) { fatalerror( "MUL.w %s, #$%04x", m_regnames16[rd], data16); }
+//DIV.d Rd, #data16
+void xa_cpu::div_dword_rd_data16(u8 rd, u16 data16) { fatalerror( "DIV.d %s, #$%04x", m_regnames16[rd], data16); }
+
+// DIVU.d Rd, Rs 32X16 unsigned double reg divide 2 22 1110 1101 ddd0 ssss
+void xa_cpu::divu_dword_rd_rs(u8 rd, u8 rs)
+{
+ u32 fullval = gr32(rd);
+ u16 rsval = gr16(rs);
+
+ if (rsval)
+ {
+ u32 result = fullval / rsval;
+ u32 remainder = fullval % rsval;
+
+ if (result & 0xffff0000)
+ set_v_flag();
+ else
+ clear_v_flag();
+
+ // are z and n based on the 32-bit result, or 16 bit result?
+ result &= 0xffff;
+
+ if (result == 0x0000)
+ set_z_flag();
+ else
+ clear_z_flag();
+
+ if (result & 0x8000)
+ set_n_flag();
+ else
+ clear_n_flag();
+
+ // TODO: verify these are writing to the correct registers
+ sr16(rd, result);
+ sr16(rd + 1, remainder);
+ }
+ else
+ {
+ set_v_flag();
+ logerror("%s divide by zero\n", machine().describe_context());
+ }
+
+ clear_c_flag();
+
+ cy(22);
+}
+//DIV.d Rd, Rs
+void xa_cpu::div_dword_rd_rs(u8 rd, u8 rs) { fatalerror( "DIV.d %s, %s", m_regnames16[rd], m_regnames16[rs]); }
+
+// CLR bit Clear bit 3 4 0000 1000 0000 00bb bbbb bbbb
+void xa_cpu::clr_bit(u16 bit) { set_bit_8_helper(bit, 0); cy(4); }
+// SETB bit Sets the bit specified 3 4 0000 1000 0001 00bb bbbb bbbb
+void xa_cpu::setb_bit(u16 bit) { set_bit_8_helper(bit, 1); cy(4); }
+// MOV C, bit Move bit to the carry flag 3 4 0000 1000 0010 00bb bbbb bbbb
+void xa_cpu::mov_c_bit(u16 bit) { fatalerror( "MOV C, %s", get_bittext(bit) ); }
+// MOV bit, C Move carry to bit 3 4 0000 1000 0011 00bb bbbb bbbb
+void xa_cpu::mov_bit_c(u16 bit) { fatalerror( "MOV %s, C", get_bittext(bit) ); }
+// ANL C, bit Logical AND bit to carry 3 4 0000 1000 0100 00bb bbbb bbbb
+void xa_cpu::anl_c_bit(u16 bit) { fatalerror( "ANL C, %s", get_bittext(bit) ); }
+// ANL C, /bit Logical AND complement of a bit to carry 3 4 0000 1000 0101 00bb bbbb bbbb
+void xa_cpu::anl_c_notbit(u16 bit) { fatalerror( "ANL C, /%s", get_bittext(bit) ); }
+// ORL C, bit Logical OR a bit to carry 3 4 0000 1000 0110 00bb bbbb bbbb
+void xa_cpu::orl_c_bit(u16 bit) { fatalerror( "ORL C, %s", get_bittext(bit) ); }
+// ORL C, /bit Logical OR complement of a bit to carry 3 4 0000 1000 0111 00bb bbbb bbbb
+void xa_cpu::orl_c_notbit(u16 bit) { fatalerror( "ORL C, /%s", get_bittext(bit) ); }
+
+// LEA Rd, Rs+offset8 Load 16-bit effective address w/ 8-bit offs to reg 3 3 0100 0000 0ddd 0sss oooo oooo
+void xa_cpu::lea_word_rd_rs_off8(u8 rd, u8 rs, u8 offs8) { fatalerror("LEA %s, %s+#$%02x", m_regnames16[rd], m_regnames16[rs], offs8); }
+
+// LEA Rd, Rs+offset16 Load 16-bit effective address w/ 16-bit offs to reg 4 3 0100 1000 0ddd 0sss oooo oooo oooo oooo
+void xa_cpu::lea_word_rd_rs_off16(u8 rd, u8 rs, u16 offs16) { fatalerror( "LEA %s, %s+#$%04x", m_regnames16[rd], m_regnames16[rs], offs16); }
+
+// XCH Rd, [Rs] Exchange contents of a reg-ind address w/ a reg 2 6 0101 S000 dddd 0sss
+void xa_cpu::xch_word_rd_indrs(u8 rd, u8 rs) { fatalerror("XCH.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]); }
+void xa_cpu::xch_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("XCH.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]); }
+
+// XCH Rd, Rs Exchange contents of two regs 2 5 0110 S000 dddd ssss
+void xa_cpu::xch_word_rd_rs(u8 rd, u8 rs) { u16 rdval = gr16(rd); u16 rsval = gr16(rs); sr16(rd, rsval); sr16(rs, rdval); cy(5); }
+void xa_cpu::xch_byte_rd_rs(u8 rd, u8 rs) { fatalerror("XCH.b %s, %s", m_regnames8[rd], m_regnames8[rs]); }
+
+// MOVC Rd, [Rs+] Move data from WS:Rs address of code mem to reg w/ autoinc 2 4 1000 S000 dddd 0sss
+void xa_cpu::movc_word_rd_indrsinc(u8 rd, u8 rs) { u16 address = get_addr(rs); u16 data = m_program->read_word(address); address+=2; set_addr(rs, address); do_nz_flags_16(data); sr16(rd, data); cy(4); }
+void xa_cpu::movc_byte_rd_indrsinc(u8 rd, u8 rs) { u16 address = get_addr(rs); u8 data = m_program->read_byte(address); address++; set_addr(rs, address); do_nz_flags_8(data); sr8(rd, data); cy(4); }
+
+// DJNZ Rd,rel8 Decrement reg and jump if not zero 3 8t/5nt 1000 S111 dddd 1000 rrrr rrrr
+void xa_cpu::djnz_word_rd_rel8(u8 rd, u8 rel8) { u16 regval = gr16(rd); regval--; do_nz_flags_16(regval); sr16(rd, regval); if (get_z_flag() == 0) { set_pc_in_current_page(expand_rel8(rel8)); cy(8); } else { cy(5); } }
+void xa_cpu::djnz_byte_rd_rel8(u8 rd, u8 rel8) { fatalerror("DJNZ.b %s, $%04x", m_regnames8[rd], expand_rel8(rel8)); }
+
+// POPU direct Pop the mem content (b/w) from the user stack 3 5 1000 S111 0000 0DDD DDDD DDDD
+void xa_cpu::popu_word_direct(u16 direct) { fatalerror("POPU.w %s", get_directtext(direct)); }
+void xa_cpu::popu_byte_direct(u16 direct) { fatalerror("POPU.b %s", get_directtext(direct)); }
+// POP direct Pop the mem content (b/w) from the current stack 3 5 1000 S111 0001 0DDD DDDD DDDD
+void xa_cpu::pop_word_direct(u16 direct) { fatalerror("POP.w %s", get_directtext(direct)); }
+void xa_cpu::pop_byte_direct(u16 direct) { fatalerror("POP.b %s", get_directtext(direct)); }
+// PUSHU direct Push the mem content (b/w) onto the user stack 3 5 1000 S111 0010 0DDD DDDD DDDD
+void xa_cpu::pushu_word_direct(u16 direct) { fatalerror("PUSHU.w %s", get_directtext(direct)); }
+void xa_cpu::pushu_byte_direct(u16 direct) { fatalerror("PUSHU.b %s", get_directtext(direct)); }
+// PUSH direct Push the mem content (b/w) onto the current stack 3 5 1000 S111 0011 0DDD DDDD DDDD
+void xa_cpu::push_word_direct(u16 direct) { fatalerror("PUSH.w %s", get_directtext(direct)); }
+void xa_cpu::push_byte_direct(u16 direct) { fatalerror("PUSH.b %s", get_directtext(direct)); }
+
+// MOV [Rd+], [Rs+] Move reg-ind to reg-ind, both pointers autoinc 2 6 1001 S000 0ddd 0sss
+void xa_cpu::mov_word_indrdinc_indrsinc(u8 rd, u8 rs) { fatalerror("MOV.w [%s+], [%s+]", m_regnames16[rd], m_regnames16[rs]); }
+void xa_cpu::mov_byte_indrdinc_indrsinc(u8 rd, u8 rs) { fatalerror("MOV.b [%s+], [%s+]", m_regnames16[rd], m_regnames16[rs]); }
+
+// DA Rd Decimal Adjust byte reg 2 4 1001 0000 dddd 1000
+void xa_cpu::da_rd(u8 rd) { fatalerror( "DA %s", m_regnames8[rd]); }
+// SEXT Rd Sign extend last operation to reg 2 3 1001 S000 dddd 1001
+void xa_cpu::sext_word_rd(u8 rd) { if(m_nflag) sr16(rd, 0xffff); else sr16(rd, 0); cy(2); }
+void xa_cpu::sext_byte_rd(u8 rd) { if(m_nflag) sr8(rd, 0xff); else sr8(rd, 0); cy(2); }
+// CPL Rd Complement (ones complement) reg 2 3 1001 S000 dddd 1010
+void xa_cpu::cpl_word_rd(u8 rd) { u16 rdval = gr16(rd); u16 result = rdval ^ 0xffff; do_nz_flags_16(result); sr16(rd, result); cy(3); }
+void xa_cpu::cpl_byte_rd(u8 rd) { fatalerror("CPL.b %s", m_regnames8[rd]); }
+// NEG Rd Negate (twos complement) reg 2 3 1001 S000 dddd 1011
+void xa_cpu::neg_word_rd(u8 rd) { fatalerror("NEG.w %sx", m_regnames16[rd]); }
+void xa_cpu::neg_byte_rd(u8 rd) { fatalerror("NEG.b %sx", m_regnames8[rd]); }
+// MOVC A, [A+PC] Move data from code mem to the accumulator ind w/ PC 2 6 1001 0000 0100 1100
+void xa_cpu::movc_a_apc() { fatalerror( "MOVC A, [A+PC]"); }
+// MOVC A, [A+DPTR] Move data from code mem to the accumulator ind w/ DPTR 2 6 1001 0000 0100 1110
+void xa_cpu::movc_a_adptr() { fatalerror( "MOVC A, [A+DPTR]"); }
+// MOV Rd, USP Move User Stack Pointer to reg (system mode only) 2 3 1001 0000 dddd 1111
+void xa_cpu::mov_rd_usp(u8 rd) { fatalerror( "MOV %s, USP", m_regnames16[rd]); }
+// MOV USP, Rs Move reg to User Stack Pointer (system mode only) 2 3 1001 1000 ssss 1111
+void xa_cpu::mov_usp_rs(u8 rs) { fatalerror( "MOV USP, %s", m_regnames16[rs]); }
+
+//JB bit,rel8 Jump if bit set 4 10t/6nt 1001 0111 1000 00bb bbbb bbbb rrrr rrrr
+void xa_cpu::jb_bit_rel8(u16 bit, u8 rel8) { fatalerror( "JB %s, $%02x", get_bittext(bit), expand_rel8(rel8) ); }
+//JNB bit,rel8 Jump if bit not set 4 10t/6nt 1001 0111 1010 00bb bbbb bbbb rrrr rrrr
+void xa_cpu::jnb_bit_rel8(u16 bit, u8 rel8) { fatalerror( "JNB %s, $%02x", get_bittext(bit), expand_rel8(rel8) ); }
+//JBC bit,rel8 Jump if bit set and then clear the bit 4 11t/7nt 1001 0111 1100 00bb bbbb bbbb rrrr rrrr
+void xa_cpu::jbc_bit_rel8(u16 bit, u8 rel8) { fatalerror( "JBC %s, $%02x", get_bittext(bit), expand_rel8(rel8) ); }
+
+// MOV direct, direct Move mem to mem 4 4 1001 S111 0DDD 0ddd DDDD DDDD dddd dddd
+void xa_cpu::mov_word_direct_direct(u16 direct_d, u16 direct_s) { fatalerror("MOV.w %s, %s", get_directtext(direct_d), get_directtext(direct_s)); }
+void xa_cpu::mov_byte_direct_direct(u16 direct_d, u16 direct_s) { u8 val = read_direct8(direct_s); do_nz_flags_8(val); write_direct8(direct_d, val); cy(4); }
+
+// XCH Rd, direct Exchange contents of mem w/ a reg 3 6 1010 S000 dddd 1DDD DDDD DDDD
+void xa_cpu::xch_word_rd_direct(u8 rd, u16 direct) { fatalerror("XCH.w %s, %s", m_regnames16[rd], get_directtext(direct)); }
+void xa_cpu::xch_byte_rd_direct(u8 rd, u16 direct) { fatalerror("XCH.b %s, %s", m_regnames8[rd], get_directtext(direct)); }
+
+// MOV direct, [Rs] Move reg-ind to mem 3 4 1010 S000 1sss 0DDD DDDD DDDD
+void xa_cpu::mov_word_direct_indrs(u16 direct, u8 rs) { fatalerror("MOV.w %s, [%s]", get_directtext(direct), m_regnames16[rs]); }
+void xa_cpu::mov_byte_direct_indrs(u16 direct, u8 rs) { fatalerror("MOV.b %s, [%s]", get_directtext(direct), m_regnames16[rs]); }
+
+// MOV [Rd], direct Move mem to reg-ind 3 4 1010 S000 0ddd 0DDD DDDD DDDD
+void xa_cpu::mov_word_indrd_direct(u8 rd, u16 direct) { fatalerror("MOV.w [%s], %s", m_regnames16[rd], get_directtext(direct)); }
+void xa_cpu::mov_byte_indrd_direct(u8 rd, u16 direct) { fatalerror("MOV.b [%s], %s", m_regnames16[rd], get_directtext(direct)); }
+
+// MOVX [Rd], Rs Move external data from reg to mem 2 6 1010 S111 ssss 1ddd
+void xa_cpu::movx_word_indrd_rs(u8 rd, u8 rs) { fatalerror("MOVX.w [%s], %s", m_regnames16[rd], m_regnames16[rs]); }
+void xa_cpu::movx_byte_indrd_rs(u8 rd, u8 rs) { fatalerror("MOVX.b [%s], %s", m_regnames16[rd], m_regnames8[rs]); }
+
+// MOVX Rd, [Rs] Move external data from mem to reg 2 6 1010 S111 dddd 0sss
+void xa_cpu::movx_word_rd_indrs(u8 rd, u8 rs) { fatalerror("MOVX.w %s, [%s]", m_regnames16[rd], m_regnames16[rs]); }
+void xa_cpu::movx_byte_rd_indrs(u8 rd, u8 rs) { fatalerror("MOVX.b %s, [%s]", m_regnames8[rd], m_regnames16[rs]); }
+
+// RR Rd, #data4 Rotate right reg by the 4-bit imm value 2 a* 1011 S000 dddd iiii
+void xa_cpu::rr_word_rd_data4(u8 rd, u8 data4) { fatalerror("RR.w %s, %d", m_regnames16[rd], data4); }
+void xa_cpu::rr_byte_rd_data4(u8 rd, u8 data4) { fatalerror("RR.b %s, %d", m_regnames8[rd], data4); }
+
+// RRC Rd, #data4 Rotate right reg though carry by the 4-bit imm value 2 a* 1011 S111 dddd iiii
+void xa_cpu::rrc_word_rd_data4(u8 rd, u8 data4) { fatalerror("RRC.w %s, %d", m_regnames16[rd], data4); }
+void xa_cpu::rrc_byte_rd_data4(u8 rd, u8 data4) { fatalerror("RRC.b %s, %d", m_regnames8[rd], data4); }
+
+// RL Rd, #data4 Rotate left reg by the 4-bit imm value 2 a* 1101 S011 dddd iiii
+void xa_cpu::rl_word_rd_data4(u8 rd, u8 data4) { fatalerror("RL.w %d, %d", m_regnames16[rd], data4); }
+void xa_cpu::rl_byte_rd_data4(u8 rd, u8 data4) { fatalerror("RL.b %d, %d", m_regnames8[rd], data4); }
+
+// RLC Rd, #data4 Rotate left reg though carry by the 4-bit imm value 2 a* 1101 S111 dddd iiii
+void xa_cpu::rlc_word_rd_data4(u8 rd, u8 data4) { fatalerror( "RLC.w Rd, %d", m_regnames16[rd], data4); }
+void xa_cpu::rlc_byte_rd_data4(u8 rd, u8 data4) { fatalerror( "RLC.b Rd, %d", m_regnames8[rd], data4); }
+
+// FCALL addr24 Far call (full 24-bit address space) 4 12/8(PZ) 1100 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+void xa_cpu::fcall_addr24(u32 addr24) { fatalerror("FCALL $%06x", addr24); }
+
+// CALL [Rs] Subroutine call ind w/ a reg 2 8/5(PZ) 1100 0110 0000 0sss
+void xa_cpu::call_indrs(u8 rs) { fatalerror("CALL [%s]", m_regnames16[rs]); }
+
+// FJMP addr24 Far jump (full 24-bit address space) 4 6 1101 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+void xa_cpu::fjmp_addr24(u32 addr24) { fatalerror( "FJMP $%06x", addr24); }
+
+// JMP rel16 Long unconditional branch 3 6 1101 0101 rrrr rrrr rrrr rrrr
+void xa_cpu::jmp_rel16(u16 rel16) { m_pc = expand_rel16(rel16); cy(6); }
+
+// DJNZ direct,rel8 Decrement mem and jump if not zero 4 9t/5nt 1110 S010 0000 1DDD DDDD DDDD rrrr rrrr
+void xa_cpu::djnz_word_direct_rel8(u16 direct, u8 rel8) { fatalerror("DJNZ.w %s, $%04x", get_directtext(direct), expand_rel8(rel8)); }
+void xa_cpu::djnz_byte_direct_rel8(u16 direct, u8 rel8) { fatalerror("DJNZ.b %s, $%04x", get_directtext(direct), expand_rel8(rel8)); }
+
+// CJNE Rd,direct,rel8 Compare dir byte to reg and jump if not equal 4 10t/7nt 1110 S010 dddd 0DDD DDDD DDDD rrrr rrrr
+void xa_cpu::cjne_word_rd_direct_rel8(u8 rd, u16 direct, u8 rel8) { fatalerror("CJNE.w %s, %s, $%04x", m_regnames16[rd], get_directtext(direct), expand_rel8(rel8)); }
+void xa_cpu::cjne_byte_rd_direct_rel8(u8 rd, u16 direct, u8 rel8) { fatalerror("CJNE.b %s, %s, $%04x", m_regnames8[rd], get_directtext(direct), expand_rel8(rel8)); }
+
+// CJNE [Rd],#data8,rel8 Compare imm word to reg-ind and jump if not equal 4 10t/7nt 1110 0011 0ddd 1000 rrrr rrrr iiii iiii
+void xa_cpu::cjne_indrd_data8_rel8(u8 rd, u8 data8, u8 rel8) { fatalerror( "CJNE [%s], #$%02x, $%04x", m_regnames16[rd], data8, expand_rel8(rel8));}
+
+// CJNE Rd,#data8,rel8 Compare imm byte to reg and jump if not equal 4 9t/6nt 1110 0011 dddd 0000 rrrr rrrr iiii iiii
+void xa_cpu::cjne_rd_data8_rel8(u8 rd, u8 data8, u8 rel8) { u8 regval = gr8(rd); do_cjne_8_helper(regval, data8); if (!get_z_flag()) { set_pc_in_current_page(expand_rel8(rel8)); cy(9); } else { cy(6); } }
+
+// CJNE [Rd],#data16,rel8 Compare imm word to reg-ind and jump if not equal 5 10t/7nt 1110 1011 0ddd 1000 rrrr rrrr iiii iiii iiii iiii
+void xa_cpu::cjne_indrd_data16_rel8(u8 rd, u16 data16, u8 rel8) { fatalerror( "CJNE [%s], #$%04x, $%04x", m_regnames16[rd], data16, expand_rel8(rel8));}
+
+// CJNE Rd,#data16,rel8 Compare imm word to reg and jump if not equal 5 9t/6nt 1110 1011 dddd 0000 rrrr rrrr iiii iiii iiii iiii
+void xa_cpu::cjne_rd_data16_rel8(u8 rd, u16 data16, u8 rel8) { fatalerror( "CJNE %s, #$%04x, $%04x", m_regnames8[rd], data16, expand_rel8(rel8)); }
+
+// RESET Causes a hardware Reset (same as external Reset) 2 18 1101 0110 0001 0000
+void xa_cpu::reset() { fatalerror( "RESET"); }
+
+// TRAP #data4 Causes 1 of 16 hardware traps to be executed 2 23/19(PZ) 1101 0110 0011 tttt
+void xa_cpu::trap_data4(u8 data4) { fatalerror( "TRAP %d", data4); }
+
+// JMP [A+DPTR] Jump ind relative to the DPTR 2 5 1101 0110 0100 0110
+void xa_cpu::jmp_ind_adptr() { fatalerror( "JMP [A+DPTR]"); }
+
+// JMP [[Rs+]] Jump double-ind to the address (pointer to a pointer) 2 8 1101 0110 0110 0sss
+void xa_cpu::jmp_dblindrs(u8 rs) { fatalerror( "JMP [[%s+]]", m_regnames16[rs]); }
+
+// JMP [Rs] Jump ind to the address in the reg (64K) 2 7 1101 0110 0111 0sss
+void xa_cpu::jmp_indrs(u8 rs) { fatalerror( "JMP [%s]", m_regnames16[rs]); }
+
+// RET Return from subroutine 2 8/6(PZ) 1101 0110 1000 0000
+void xa_cpu::ret() {
+ if (m_pagezeromode)
+ {
+ u16 addr = pull_word_from_stack();
+ set_pc_in_current_page(addr);
+ cy(6);
+ }
+ else
+ {
+ cy(8);
+ fatalerror("RET not in pagezero mode");
+ }
+}
+
+// RETI Return from interrupt 2 10/8(PZ) 1101 0110 1001 0000
+void xa_cpu::reti()
+{
+ if (m_pagezeromode)
+ {
+ // probably wrong order
+ m_pc = pull_word_from_system_stack();
+ m_PSWL = pull_word_from_system_stack();
+ m_PSWH = pull_word_from_system_stack();
+ sfr_PSWL_w(m_PSWL);
+ sfr_PSWH_w(m_PSWH);
+ cy(8);
+ m_in_interrupt = 0;
+
+ }
+ else
+ {
+ fatalerror("RETI when not in page zero mode\n");
+ }
+}
+
+// JZ rel8 Jump if accumulator equals zero 2 6t/3nt 1110 1100 rrrr rrrr
+void xa_cpu::jz_rel8(u8 rel8) { fatalerror( "JZ $%04x", expand_rel8(rel8)); }
+
+// JNZ rel8 Jump if accumulator not equal zero 2 6t/3nt 1110 1110 rrrr rrrr
+void xa_cpu::jnz_rel8(u8 rel8) { fatalerror( "JNZ $%04x", expand_rel8(rel8)); }
+
+// PUSH Rlist Push regs (b/w) onto the current stack 2 b* 0H00 S111 LLLL LLLL
+void xa_cpu::push_word_rlist(u8 bitfield, int h) { cy(2); push_word_reglist(bitfield, h, false); }
+void xa_cpu::push_byte_rlist(u8 bitfield, int h) { cy(2); push_byte_reglist(bitfield, h, false); }
+
+// PUSHU Rlist Push regs (b/w) from the user stack 2 b* 0H01 S111 LLLL LLLL
+void xa_cpu::pushu_word_rlist(u8 bitfield, int h) { fatalerror("PUSHU.w %s", get_word_reglist(bitfield)); }
+void xa_cpu::pushu_byte_rlist(u8 bitfield, int h) { push_byte_reglist(bitfield, h, true); }
+
+// POP Rlist Pop regs (b/w) from the current stack 2 c* 0H10 S111 LLLL LLLL
+void xa_cpu::pop_word_rlist(u8 bitfield, int h) { cy(2); pull_word_reglist(bitfield, h, false); }
+void xa_cpu::pop_byte_rlist(u8 bitfield, int h) { cy(2); pull_byte_reglist(bitfield, h, false); }
+
+// POPU Rlist Pop regs (b/w) from the user stack 2 c* 0H11 S111 LLLL LLLL
+void xa_cpu::popu_word_rlist(u8 bitfield, int h) { fatalerror("POPU.w %s", get_word_reglist(bitfield)); }
+void xa_cpu::popu_byte_rlist(u8 bitfield, int h) { cy(2); pull_byte_reglist(bitfield, h, true); }
diff --git a/src/devices/cpu/xa/xadasm.cpp b/src/devices/cpu/xa/xadasm.cpp
new file mode 100644
index 00000000000..96bb39d2350
--- /dev/null
+++ b/src/devices/cpu/xa/xadasm.cpp
@@ -0,0 +1,1908 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#include "emu.h"
+#include "xadasm.h"
+
+const xa_dasm::op_func xa_dasm::s_instruction[256] =
+{
+// group 0
+&xa_dasm::d_nop, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
+&xa_dasm::d_bitgroup, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_add, &xa_dasm::d_push_rlist,
+// group 1
+&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
+&xa_dasm::d_illegal, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_addc, &xa_dasm::d_pushu_rlist,
+// group 2
+&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
+&xa_dasm::d_illegal, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_sub, &xa_dasm::d_pop_rlist,
+// group 3
+&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
+&xa_dasm::d_illegal, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_subb, &xa_dasm::d_popu_rlist,
+// group 4
+&xa_dasm::d_lea_offset8, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
+&xa_dasm::d_lea_offset16, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_cmp, &xa_dasm::d_push_rlist,
+// group 5
+&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
+&xa_dasm::d_xch_type1, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_and, &xa_dasm::d_pushu_rlist,
+// group 6
+&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
+&xa_dasm::d_xch_type2, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_or, &xa_dasm::d_pop_rlist,
+// group 7
+&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
+&xa_dasm::d_illegal, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_xor, &xa_dasm::d_popu_rlist,
+// group 8
+&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
+&xa_dasm::d_movc_rd_rsinc, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_mov, &xa_dasm::d_pushpop_djnz_subgroup,
+// group 9
+&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
+&xa_dasm::d_g9_subgroup, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_alu, &xa_dasm::d_jb_mov_subgroup,
+// group a
+&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
+&xa_dasm::d_movdir, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_adds, &xa_dasm::d_movx_subgroup,
+// group b
+&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
+&xa_dasm::d_rr, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_movs, &xa_dasm::d_rrc,
+// group c
+&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
+&xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm, &xa_dasm::d_lsr_fc, &xa_dasm::d_asl_c, &xa_dasm::d_asr_c, &xa_dasm::d_norm,
+// group d
+&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
+&xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rl, &xa_dasm::d_lsr_fj, &xa_dasm::d_asl_j, &xa_dasm::d_asr_j, &xa_dasm::d_rlc,
+// group e
+&xa_dasm::d_mulu_b, &xa_dasm::d_divu_b, &xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d8, &xa_dasm::d_mulu_w, &xa_dasm::d_divu_w, &xa_dasm::d_mul_w, &xa_dasm::d_div_w,
+&xa_dasm::d_div_data8, &xa_dasm::d_div_d16,&xa_dasm::d_djnz_cjne, &xa_dasm::d_cjne_d16, &xa_dasm::d_jz_rel8,&xa_dasm::d_divu_d, &xa_dasm::d_jnz_rel8, &xa_dasm::d_div_d,
+// group f
+&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch,
+&xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_branch, &xa_dasm::d_bkpt,
+};
+
+// SFR names
+const xa_dasm::mem_info xa_dasm::default_names[] = {
+ // the following are bit addressable
+ { 0x400, "PSWL" },
+ { 0x401, "PSWH" },
+ { 0x402, "PSW51" },
+ { 0x403, "SSEL" },
+ { 0x404, "PCON" },
+ { 0x410, "TCON" },
+ { 0x411, "TSTAT" },
+ { 0x418, "T2CON" },
+ { 0x419, "T2MOD" },
+ { 0x41F, "WDCON" },
+ { 0x420, "S0CON" },
+ { 0x421, "S0STAT" },
+ { 0x424, "S1CON" },
+ { 0x425, "S1STAT" },
+ { 0x426, "IEL" },
+ { 0x427, "IEH" },
+ { 0x42A, "SWR" },
+ { 0x430, "P0" },
+ { 0x431, "P1" },
+ { 0x432, "P2" },
+ { 0x433, "P3" },
+ { 0x440, "SCR" },
+ { 0x441, "DS" },
+ { 0x442, "ES" },
+ { 0x443, "CS" },
+ { 0x450, "TL0" },
+ { 0x451, "TH0" },
+ { 0x452, "TL1" },
+ { 0x453, "TH1" },
+ { 0x454, "RTL0" },
+ { 0x455, "RTH0" },
+ { 0x456, "RTL1" },
+ { 0x457, "RTH1" },
+ { 0x458, "TL2" },
+ { 0x459, "TH2" },
+ { 0x45A, "T2CAPL" },
+ { 0x45B, "T2CAPH" },
+ { 0x45C, "TMOD" },
+ { 0x45D, "WFEED1" },
+ { 0x45E, "WFEED2" },
+ { 0x45F, "WDL" },
+ { 0x460, "S0BUF" },
+ { 0x461, "S0ADDR" },
+ { 0x462, "S0ADEN" },
+ { 0x464, "S1BUF" },
+ { 0x465, "S1ADDR" },
+ { 0x466, "S1ADEN" },
+ { 0x468, "BTRL" },
+ { 0x469, "BTRH" },
+ { 0x46A, "BCR" },
+ { 0x470, "P0CFGA" },
+ { 0x471, "P1CFGA" },
+ { 0x472, "P2CFGA" },
+ { 0x473, "P3CFGA" },
+ { 0x47A, "SWE" },
+ { 0x4A0, "IPA0" },
+ { 0x4A1, "IPA1" },
+ { 0x4A2, "IPA2" },
+ { 0x4A3, "IPA3" },
+ { 0x4A4, "IPA4" },
+ { 0x4A5, "IPA5" },
+ { 0x4F0, "P0CFGB" },
+ { 0x4F1, "P1CFGB" },
+ { 0x4F2, "P2CFGB" },
+ { 0x4F3, "P3CFGB" },
+ { -1 }
+};
+
+void xa_dasm::add_names(const mem_info *info)
+{
+ for(unsigned int i=0; info[i].addr >= 0; i++)
+ m_names[info[i].addr] = info[i].name;
+}
+
+std::string xa_dasm::get_data_address(u16 arg) const
+{
+ auto i = m_names.find(arg);
+ if (i == m_names.end())
+ return util::string_format("unk_SFR_%03X", arg);
+ else
+ return i->second;
+}
+
+std::string xa_dasm::get_bittext(int bit)
+{
+ int position = bit & 7;
+
+ if (bit < 0x100)
+ {
+ int reg = ((bit & 0x1ff) >> 3);
+
+ if (reg < 16)
+ return util::string_format("%s.%d", m_regnames8[reg], position);
+ else
+ return util::string_format("ill_REG_%02x.%d", reg, position);
+ }
+ else if (bit < 0x200)
+ {
+ int addr = ((bit & 0x1ff) >> 3) + 0x20;
+ return util::string_format("$%02x.%d", addr, position);
+ }
+
+ int sfr = ((bit & 0x1ff) >> 3) + 0x400;
+ return util::string_format("%s.%d", get_data_address(sfr), position);
+}
+
+std::string xa_dasm::get_directtext(int direct)
+{
+ if (direct < 0x400)
+ {
+ return util::string_format("$%03x", direct);
+ }
+
+ return util::string_format("%s", get_data_address(direct));
+}
+
+int xa_dasm::d_illegal(XA_DASM_PARAMS)
+{
+ util::stream_format(stream, "illegal");
+ return 1;
+}
+
+int xa_dasm::handle_shift(XA_DASM_PARAMS, int shift_type)
+{
+ int size = (op & 0x0c) >> 2;
+ const u8 op2 = opcodes.r8(pc++);
+ u8 data, rd;
+ if (size == 0x03)
+ {
+ data = op2 & 0x1f;
+ rd = (op2 & 0xe0) >> 4;
+ }
+ else
+ {
+ data = op2 & 0x0f;
+ rd = (op2 & 0xf0) >> 4;
+ }
+
+ if (size == 0x00)
+ {
+ util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size], m_regnames8[rd], data);
+ }
+ else
+ {
+ util::stream_format(stream, "%s%s %s, %d", m_shifts[shift_type], m_dwparamsizes[size], m_regnames16[rd], data);
+ }
+
+ return 2;
+}
+
+
+int xa_dasm::handle_alu_type0(XA_DASM_PARAMS, int alu_op)
+{
+ const int size = op & 0x08;
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+
+ switch (op & 0x07)
+ {
+ case 0x01:
+ {
+ const u8 rs = (op2 & 0x0f);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, %s", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], regnames[rs] );
+ return 2;
+ }
+
+ case 0x02:
+ {
+ const int optype = op2 & 0x08;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, [%s]", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], m_regnames16[rs] );
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s [%s], %s", m_aluops[alu_op], size ? ".w" : ".b", m_regnames16[rd], regnames[rs] );
+ }
+ return 2;
+ }
+
+ case 0x03:
+ {
+ const int optype = op2 & 0x08;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, [%s+]", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], m_regnames16[rs] );
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s [%s+], %s", m_aluops[alu_op], size ? ".w" : ".b", m_regnames16[rd], regnames[rs] );
+ }
+ return 2;
+ }
+
+ case 0x04:
+ {
+ const int optype = op2 & 0x08;
+ const u8 op3 = opcodes.r8(pc++);
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, [%s+#$%02x]", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], m_regnames16[rs], op3 );
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s [%s+#$%02x], %s", m_aluops[alu_op], size ? ".w" : ".b", m_regnames16[rd], op3, regnames[rs] );
+ }
+ return 3;
+ }
+
+ case 0x05:
+ {
+ const int optype = op2 & 0x08;
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const int offset16 = (op3 << 8) | op4;
+ if (!optype)
+ {
+ const u8 rs = (op2 & 0x07);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, [%s+#$%04x]", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], m_regnames16[rs], offset16 );
+ }
+ else
+ {
+ const u8 rd = (op2 & 0x07);
+ const u8 rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s [%s+#$%04x], %s", m_aluops[alu_op], size ? ".w" : ".b", m_regnames16[rd], offset16, regnames[rs] );
+ }
+ return 4;
+ }
+
+ case 0x06:
+ {
+ const int optype = op2 & 0x08;
+ const u8 op3 = opcodes.r8(pc++);
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+ if (!optype)
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, %s", m_aluops[alu_op], size ? ".w" : ".b", regnames[rd], get_directtext(direct) );
+ }
+ else
+ {
+ const u8 rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s%s %s, %s", m_aluops[alu_op], size ? ".w" : ".b", get_directtext(direct), regnames[rs] );
+ }
+ return 3;
+ }
+
+ }
+
+ return 1;
+}
+
+
+
+int xa_dasm::handle_alu_type1(XA_DASM_PARAMS, u8 op2)
+{
+ int alu_op = op2 & 0x0f;
+ switch (op & 0x0f)
+ {
+ case 0x01:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s.b %s, #$%02x", m_aluops[alu_op], m_regnames8[rd], op3 );
+ return 3;
+ }
+
+ case 0x02:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s.b [%s], #$%02x", m_aluops[alu_op], m_regnames16[rd], op3 );
+ return 3;
+ }
+
+ case 0x03:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s.b [%s+], #$%02x", m_aluops[alu_op], m_regnames16[rd], op3 );
+ return 3;
+ }
+
+ case 0x04:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "%s.b [%s+#$%02x], #$%02x", m_aluops[alu_op], m_regnames16[rd], op3, op4 );
+ return 4;
+ }
+
+ case 0x05:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 op5 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 offset = (op3 << 8) | op4;
+ util::stream_format(stream, "%s.b [%s+#$%04x], #$%02d", m_aluops[alu_op], m_regnames16[rd], offset, op5 );
+ return 5;
+ }
+
+ case 0x06:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u16 direct = ((op2 & 0xf0) << 4) | op3;
+ util::stream_format(stream, "%s.b %s, #$%02x", m_aluops[alu_op], get_directtext(direct), op4 );
+ return 4;
+ }
+
+ case 0x09:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data = (op3 << 8) | op4;
+ util::stream_format(stream, "%s.w %s, #$%04x", m_aluops[alu_op], m_regnames16[rd], data );
+ return 4;
+ }
+
+ case 0x0a:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data = (op3 << 8) | op4;
+ util::stream_format(stream, "%s.w [%s], #$%04x", m_aluops[alu_op], m_regnames16[rd], data );
+ return 4;
+ }
+
+ case 0x0b:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u16 data = (op3 << 8) | op4;
+ util::stream_format(stream, "%s.w [%s+], #$%04x", m_aluops[alu_op], m_regnames16[rd], data );
+ return 4;
+ }
+
+ case 0x0c:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 op5 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const int offset = op3;
+ const u16 data = (op4 << 8) | op5;
+ util::stream_format(stream, "%s.w [%s+#$%02x], #$%04x", m_aluops[alu_op], m_regnames16[rd], offset, data );
+ return 5;
+ }
+
+ case 0x0d:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 op5 = opcodes.r8(pc++);
+ const u8 op6 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const int offset = (op3 << 8) | op4;
+ const u16 data = (op5 << 8) | op6;
+ util::stream_format(stream, "%s.w [%s+#$%04x], #$%04x", m_aluops[alu_op], m_regnames16[rd], offset, data );
+ return 6;
+ }
+
+ case 0x0e:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 op5 = opcodes.r8(pc++);
+ const u16 direct =( (op2 & 0xf0) << 4) | op3;
+ const u16 data = (op4 << 8) | op5;
+ util::stream_format(stream, "%s.w %s, #$%04x", m_aluops[alu_op], get_directtext(direct), data );
+ return 5;
+ }
+ }
+ return 1;
+}
+
+std::string xa_dasm::show_expanded_data4(u16 data4, int size)
+{
+ u16 extended = util::sext(data4, 4);
+
+ if (!size)
+ {
+ extended &= 0xff;
+ return util::string_format("#$%02x", extended);
+ }
+
+ return util::string_format("#$%04x", extended);
+}
+
+int xa_dasm::handle_adds_movs(XA_DASM_PARAMS, int which)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+
+ const u16 data4 = op2 & 0x0f;
+
+ switch (op & 0x07)
+ {
+ case 0x01:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ util::stream_format(stream, "%s%s %s, %s", m_addsmovs[which], size ? ".w" : ".b", regnames[rd], show_expanded_data4(data4, size)); // last is not m_regnames8
+ ;
+ return 2;
+ }
+
+ case 0x02:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ util::stream_format(stream, "%s%s [%s], %s", m_addsmovs[which], size ? ".w" : ".b", m_regnames16[rd], show_expanded_data4(data4, size));
+ return 2;
+ }
+
+ case 0x03:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ util::stream_format(stream, "%s%s [%s+], %s", m_addsmovs[which], size ? ".w" : ".b", m_regnames16[rd], show_expanded_data4(data4, size));
+ return 2;
+ }
+
+ case 0x04:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ const u8 op3 = opcodes.r8(pc++);
+ util::stream_format(stream, "%s%s [%s+$%02x], %s", m_addsmovs[which], size ? ".w" : ".b", m_regnames16[rd], op3, show_expanded_data4(data4, size));
+ return 3;
+ }
+
+ case 0x05:
+ {
+ int rd = (op2 & 0x70) >> 4;
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const int offset = (op3 << 8) | op4;
+ util::stream_format(stream, "%s%s [%s+$%04x], %s", m_addsmovs[which], size ? ".w" : ".b", m_regnames16[rd], offset, show_expanded_data4(data4, size));
+ return 4;
+ }
+ case 0x06:
+ {
+ const u8 op3 = opcodes.r8(pc++);
+ const u16 direct = ((op2 & 0xf0) << 4) | op3;
+ util::stream_format(stream, "%s%s %s, %s", m_addsmovs[which], size ? ".w" : ".b", get_directtext(direct), show_expanded_data4(data4, size));
+ return 3;
+ }
+ }
+
+ return 1;
+}
+
+
+int xa_dasm::handle_pushpop_rlist(XA_DASM_PARAMS, int type)
+{
+ const u8 h = op & 0x40;
+ const u8 size = op & 0x08;
+ const u8 op2 = opcodes.r8(pc++);
+
+ if (size)
+ {
+ // h is ignored?
+ util::stream_format(stream, "%s%s ", m_pushpull[type], size ? ".w" : ".b");
+
+ bool firstbit = true;
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+
+ if (bit)
+ {
+ util::stream_format(stream, "%s%s", firstbit ? "" : ",", m_regnames16[i]);
+ firstbit = false;
+ }
+ }
+ }
+ else
+ {
+ util::stream_format(stream, "%s%s ", m_pushpull[type], size ? ".w" : ".b");
+
+ bool firstbit = true;
+ for (int i = 0; i < 8; i++)
+ {
+ int bit = (op2 & (1 << i));
+
+ if (bit)
+ {
+ util::stream_format(stream, "%s%s", firstbit ? "" : ",", m_regnames8[i + (h ? 8 : 0)]);
+ firstbit = false;
+ }
+ }
+ }
+
+ return 2;
+}
+
+
+
+// -------------------------------------- Group 0 --------------------------------------
+
+/*
+NOP No operation 1 3 0000 0000
+*/
+int xa_dasm::d_nop(XA_DASM_PARAMS)
+{
+ util::stream_format(stream, "NOP");
+ return 1;
+}
+
+/*
+CLR bit Clear bit 3 4 0000 1000 0000 00bb bbbb bbbb
+SETB bit Sets the bit specified 3 4 0000 1000 0001 00bb bbbb bbbb
+MOV C, bit Move bit to the carry flag 3 4 0000 1000 0010 00bb bbbb bbbb
+MOV bit, C Move carry to bit 3 4 0000 1000 0011 00bb bbbb bbbb
+ANL C, bit Logical AND bit to carry 3 4 0000 1000 0100 00bb bbbb bbbb
+ANL C, /bit Logical AND complement of a bit to carry 3 4 0000 1000 0101 00bb bbbb bbbb
+ORL C, bit Logical OR a bit to carry 3 4 0000 1000 0110 00bb bbbb bbbb
+ORL C, /bit Logical OR complement of a bit to carry 3 4 0000 1000 0111 00bb bbbb bbbb
+*/
+
+int xa_dasm::d_bitgroup(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+
+ u16 bit = ((op2 & 0x03) << 8) | op3;
+
+ switch (op2 & 0xf0)
+ {
+ case 0x00: util::stream_format(stream, "CLR %s", get_bittext(bit) ); break;
+ case 0x10: util::stream_format(stream, "SETB %s", get_bittext(bit) ); break;
+ case 0x20: util::stream_format(stream, "MOV C, %s", get_bittext(bit) ); break;
+ case 0x30: util::stream_format(stream, "MOV %s, C", get_bittext(bit) ); break;
+ case 0x40: util::stream_format(stream, "ANL C, %s", get_bittext(bit) ); break;
+ case 0x50: util::stream_format(stream, "ANL C, /%s", get_bittext(bit) ); break;
+ case 0x60: util::stream_format(stream, "ORL C, %s", get_bittext(bit) ); break;
+ case 0x70: util::stream_format(stream, "ORL C, /%s", get_bittext(bit) ); break;
+ default: util::stream_format(stream, "illegal bit op %s", get_bittext(bit) ); break;
+ }
+ return 3;
+}
+
+/*
+ADD Rd, Rs Add regs direct 2 3 0000 S001 dddd ssss
+ADD Rd, [Rs] Add reg-ind to reg 2 4 0000 S010 dddd 0sss
+ADD [Rd], Rs Add reg to reg-ind 2 4 0000 S010 ssss 1ddd
+ADD Rd, [Rs+] Add reg-ind w/ autoinc to reg 2 5 0000 S011 dddd 0sss
+ADD [Rd+], Rs Add reg-ind w/ autoinc to reg 2 5 0000 S011 ssss 1ddd
+ADD Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg 3 6 0000 S100 dddd 0sss oooo oooo
+ADD [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs 3 6 0000 S100 ssss 1ddd oooo oooo
+ADD Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg 4 6 0000 S101 dddd 0sss oooo oooo oooo oooo
+ADD [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs 4 6 0000 S101 ssss 1ddd oooo oooo oooo oooo
+ADD direct, Rs Add reg to mem 3 4 0000 S110 ssss 1DDD DDDD DDDD
+ADD Rd, direct Add mem to reg 3 4 0000 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_add(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 0);
+}
+
+/*
+PUSH Rlist Push regs (b/w) onto the current stack 2 b* 0H00 S111 LLLL LLLL
+*/
+int xa_dasm::d_push_rlist(XA_DASM_PARAMS)
+{
+ return handle_pushpop_rlist(XA_CALL_PARAMS, 0);
+}
+
+// -------------------------------------- Group 1 --------------------------------------
+
+/*
+ADDC Rd, Rs Add regs direct w/ carry 2 3 0001 S001 dddd ssss
+ADDC Rd, [Rs] Add reg-ind to reg w/ carry 2 4 0001 S010 dddd 0sss
+ADDC [Rd], Rs Add reg to reg-ind w/ carry 2 4 0001 S010 ssss 1ddd
+ADDC Rd, [Rs+offset8] Add reg-ind w/ 8-bit offs to reg w/ carry 3 6 0001 S100 dddd 0sss oooo oooo
+ADDC [Rd+offset8], Rs Add reg to reg-ind w/ 8-bit offs w/ carry 3 6 0001 S100 ssss 1ddd oooo oooo
+ADDC Rd, [Rs+offset16] Add reg-ind w/ 16-bit offs to reg w/ carry 4 6 0001 S101 dddd 0sss oooo oooo oooo oooo
+ADDC [Rd+offset16], Rs Add reg to reg-ind w/ 16-bit offs w/ carry 4 6 0001 S101 ssss 1ddd oooo oooo oooo oooo
+ADDC Rd, [Rs+] Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 dddd 0sss
+ADDC [Rd+], Rs Add reg-ind w/ autoinc to reg w/ carry 2 5 0001 S011 ssss 1ddd
+ADDC direct, Rs Add reg to mem w/ carry 3 4 0001 S110 ssss 1DDD DDDD DDDD
+ADDC Rd, direct Add mem to reg w/ carry 3 4 0001 S110 dddd 0DDD DDDD DDDD
+*/
+
+int xa_dasm::d_addc(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 1);
+}
+
+/*
+PUSHU Rlist Push regs (b/w) from the user stack 2 b* 0H01 S111 LLLL LLLL
+*/
+int xa_dasm::d_pushu_rlist(XA_DASM_PARAMS)
+{
+ return handle_pushpop_rlist(XA_CALL_PARAMS, 1);
+}
+
+
+// -------------------------------------- Group 2 --------------------------------------
+
+/*
+SUB Rd, Rs Subtract regs direct 2 3 0010 S001 dddd ssss
+SUB Rd, [Rs] Subtract reg-ind to reg 2 4 0010 S010 dddd 0sss
+SUB [Rd], Rs Subtract reg to reg-ind 2 4 0010 S010 ssss 1ddd
+SUB Rd, [Rs+offset8] Subtract reg-ind w/ 8-bit offs to reg 3 6 0010 S100 dddd 0sss oooo oooo
+SUB [Rd+offset8], Rs Subtract reg to reg-ind w/ 8-bit offs 3 6 0010 S100 ssss 1ddd oooo oooo
+SUB Rd, [Rs+offset16] Subtract reg-ind w/ 16-bit offs to reg 4 6 0010 S101 dddd 0sss oooo oooo oooo oooo
+SUB [Rd+offset16], Rs Subtract reg to reg-ind w/ 16-bit offs 4 6 0010 S101 ssss 1ddd oooo oooo oooo oooo
+SUB Rd, [Rs+] Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 dddd 0sss
+SUB [Rd+], Rs Subtract reg-ind w/ autoinc to reg 2 5 0010 S011 ssss 1ddd
+SUB direct, Rs Subtract reg to mem 3 4 0010 S110 ssss 1DDD DDDD DDDD
+SUB Rd, direct Subtract mem to reg 3 4 0010 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_sub(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 2);
+}
+
+/*
+POP Rlist Pop regs (b/w) from the current stack 2 c* 0H10 S111 LLLL LLLL
+*/
+int xa_dasm::d_pop_rlist(XA_DASM_PARAMS)
+{
+ return handle_pushpop_rlist(XA_CALL_PARAMS, 2);
+}
+
+
+// -------------------------------------- Group 3 --------------------------------------
+
+/*
+SUBB Rd, Rs Subtract w/ borrow regs direct 2 3 0011 S001 dddd ssss
+SUBB Rd, [Rs] Subtract w/ borrow reg-ind to reg 2 4 0011 S010 dddd 0sss
+SUBB [Rd], Rs Subtract w/ borrow reg to reg-ind 2 4 0011 S010 ssss 1ddd
+SUBB Rd, [Rs+] Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 dddd 0sss
+SUBB [Rd+], Rs Subtract w/ borrow reg-ind w/ autoinc to reg 2 5 0011 S011 ssss 1ddd
+SUBB Rd, [Rs+offset8] Subtract w/ borrow reg-ind w/ 8-bit offs to reg 3 6 0011 S100 dddd 0sss oooo oooo
+SUBB [Rd+offset8], Rs Subtract w/ borrow reg to reg-ind w/ 8-bit offs 3 6 0011 S100 ssss 1ddd oooo oooo
+SUBB Rd, [Rs+offset16] Subtract w/ borrow reg-ind w/ 16-bit offs to reg 4 6 0011 S101 dddd 0sss oooo oooo oooo oooo
+SUBB [Rd+offset16], Rs Subtract w/ borrow reg to reg-ind w/ 16-bit offs 4 6 0011 S101 ssss 1ddd oooo oooo oooo oooo
+SUBB direct, Rs Subtract w/ borrow reg to mem 3 4 0011 S110 ssss 1DDD DDDD DDDD
+SUBB Rd, direct Subtract w/ borrow mem to reg 3 4 0011 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_subb(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 3);
+}
+
+/*
+POPU Rlist Pop regs (b/w) from the user stack 2 c* 0H11 S111 LLLL LLLL
+*/
+int xa_dasm::d_popu_rlist(XA_DASM_PARAMS)
+{
+ return handle_pushpop_rlist(XA_CALL_PARAMS, 3);
+}
+
+
+// -------------------------------------- Group 4 --------------------------------------
+
+/*
+LEA Rd, Rs+offset8 Load 16-bit effective address w/ 8-bit offs to reg 3 3 0100 0000 0ddd 0sss oooo oooo
+*/
+int xa_dasm::d_lea_offset8(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0x70) >> 4;
+ const u8 rs = (op2 & 0x07);
+ util::stream_format(stream, "LEA %s, %s+#$%02x", m_regnames16[rd], m_regnames16[rs], op3);
+ return 3;
+}
+
+/*
+LEA Rd, Rs+offset16 Load 16-bit effective address w/ 16-bit offs to reg 4 3 0100 1000 0ddd 0sss oooo oooo oooo oooo
+*/
+int xa_dasm::d_lea_offset16(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0x70) >> 4;
+ const u8 rs = (op2 & 0x07);
+ const u16 offset = (op3 << 8) | op4;
+
+ util::stream_format(stream, "LEA %s, %s+#$%04x ", m_regnames16[rd], m_regnames16[rs], offset);
+ return 4;
+}
+
+/*
+CMP Rd, Rs Compare dest and src regs 2 3 0100 S001 dddd ssss
+CMP Rd, [Rs] Compare reg-ind w/ reg 2 4 0100 S010 dddd 0sss
+CMP [Rd], Rs Compare reg w/ reg-ind 2 4 0100 S010 ssss 1ddd
+CMP Rd, [Rs+offset8] Compare reg-ind w/ 8-bit offs w/ reg 3 6 0100 S100 dddd 0sss oooo oooo
+CMP [Rd+offset8], Rs Compare reg w/ reg-ind w/ 8-bit offs 3 6 0100 S100 ssss 1ddd oooo oooo
+CMP Rd,[Rs+offset16] Compare reg-ind w/ 16-bit offs w/ reg 4 6 0100 S101 dddd 0sss oooo oooo oooo oooo
+CMP [Rd+offset16], Rs Compare reg w/ reg-ind w/ 16-bit offs 4 6 0100 S101 ssss 1ddd oooo oooo oooo oooo
+CMP Rd, [Rs+] Compare autoinc reg-ind w/ reg 2 5 0100 S011 dddd 0sss
+CMP [Rd+], Rs Compare reg w/ autoinc reg-ind 2 5 0100 S011 ssss 1ddd
+CMP direct, Rs Compare reg w/ mem 3 4 0100 S110 ssss 1DDD DDDD DDDD
+CMP Rd, direct Compare mem w/ reg 3 4 0100 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_cmp(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 4);
+}
+
+// -------------------------------------- Group 5 --------------------------------------
+
+/*
+XCH Rd, [Rs] Exchange contents of a reg-ind address w/ a reg 2 6 0101 S000 dddd 0sss
+*/
+int xa_dasm::d_xch_type1(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x07);
+ util::stream_format(stream, "XCH%s %s, [%s]", size ? ".w" : ".b", regnames[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+AND Rd, Rs Logical AND regs direct 2 3 0101 S001 dddd ssss
+AND Rd, [Rs] Logical AND reg-ind to reg 2 4 0101 S010 dddd 0sss
+AND [Rd], Rs Logical AND reg to reg-ind 2 4 0101 S010 ssss 1ddd
+AND Rd, [Rs+offset8] Logical AND reg-ind w/ 8-bit offs to reg 3 6 0101 S100 dddd 0sss oooo oooo
+AND [Rd+offset8], Rs Logical AND reg to reg-ind w/ 8-bit offs 3 6 0101 S100 ssss 1ddd oooo oooo
+AND Rd, [Rs+offset16] Logical AND reg-ind w/ 16-bit offs to reg 4 6 0101 S101 dddd 0sss oooo oooo oooo oooo
+AND [Rd+offset16], Rs Logical AND reg to reg-ind w/ 16-bit offs 4 6 0101 S101 ssss 1ddd oooo oooo oooo oooo
+AND Rd, [Rs+] Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 dddd 0sss
+AND [Rd+], Rs Logical AND reg-ind w/ autoinc to reg 2 5 0101 S011 ssss 1ddd
+AND direct, Rs Logical AND reg to mem 3 4 0101 S110 ssss 1DDD DDDD DDDD
+AND Rd, direct Logical AND mem to reg 3 4 0101 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_and(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 5);
+}
+
+// -------------------------------------- Group 6 --------------------------------------
+
+/*
+XCH Rd, Rs Exchange contents of two regs 2 5 0110 S000 dddd ssss
+*/
+int xa_dasm::d_xch_type2(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+
+ util::stream_format(stream, "XCH%s %s, %s", size ? ".w" : ".b", regnames[rd], regnames[rs]);
+ return 2;
+}
+
+/*
+OR Rd, Rs Logical OR regs 2 3 0110 S001 dddd ssss
+OR Rd, [Rs] Logical OR reg-ind to reg 2 4 0110 S010 dddd 0sss
+OR [Rd], Rs Logical OR reg to reg-ind 2 4 0110 S010 ssss 1ddd
+OR Rd, [Rs+offset8] Logical OR reg-ind w/ 8-bit offs to reg 3 6 0110 S100 dddd 0sss oooo oooo
+OR [Rd+offset8], Rs Logical OR reg to reg-ind w/ 8-bit offs 3 6 0110 S100 ssss 1ddd oooo oooo
+OR Rd, [Rs+offset16] Logical OR reg-ind w/ 16-bit offs to reg 4 6 0110 S101 dddd 0sss oooo oooo oooo oooo
+OR [Rd+offset16], Rs Logical OR reg to reg-ind w/ 16-bit offs 4 6 0110 S101 ssss 1ddd oooo oooo oooo oooo
+OR Rd, [Rs+] Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 dddd 0sss
+OR [Rd+], Rs Logical OR reg-ind w/ autoinc to reg 2 5 0110 S011 ssss 1ddd
+OR direct, Rs Logical OR reg to mem 3 4 0110 S110 ssss 1DDD DDDD DDDD
+OR Rd, direct Logical OR mem to reg 3 4 0110 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_or(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 6);
+}
+
+// -------------------------------------- Group 7 --------------------------------------
+
+/*
+XOR Rd, Rs Logical XOR regs 2 3 0111 S001 dddd ssss
+XOR Rd, [Rs] Logical XOR reg-ind to reg 2 4 0111 S010 dddd 0sss
+XOR [Rd], Rs Logical XOR reg to reg-ind 2 4 0111 S010 ssss 1ddd
+XOR Rd, [Rs+offset8] Logical XOR reg-ind w/ 8-bit offs to reg 3 6 0111 S100 dddd 0sss oooo oooo
+XOR [Rd+offset8], Rs Logical XOR reg to reg-ind w/ 8-bit offs 3 6 0111 S100 ssss 1ddd oooo oooo
+XOR Rd, [Rs+offset16] Logical XOR reg-ind w/ 16-bit offs to reg 4 6 0111 S101 dddd 0sss oooo oooo oooo oooo
+XOR [Rd+offset16], Rs Logical XOR reg to reg-ind w/ 16-bit offs 4 6 0111 S101 ssss 1ddd oooo oooo oooo oooo
+XOR Rd, [Rs+] Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 dddd 0sss
+XOR [Rd+], Rs Logical XOR reg-ind w/ autoinc to reg 2 5 0111 S011 ssss 1ddd
+XOR direct, Rs Logical XOR reg to mem 3 4 0111 S110 ssss 1DDD DDDD DDDD
+XOR Rd, direct Logical XOR mem to reg 3 4 0111 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_xor(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 7);
+}
+
+// -------------------------------------- Group 8 --------------------------------------
+
+/*
+MOVC Rd, [Rs+] Move data from WS:Rs address of code mem to reg w/ autoinc 2 4 1000 S000 dddd 0sss
+*/
+int xa_dasm::d_movc_rd_rsinc(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+
+ int rd = (op2 & 0xf0) >> 4;
+ int rs = (op2 & 0x07);
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+
+ util::stream_format(stream, "MOVC%s %s, [%s+]", size ? ".w" : ".b", regnames[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+MOV Rd, Rs Move reg to reg 2 3 1000 S001 dddd ssss
+MOV Rd, [Rs] Move reg-ind to reg 2 3 1000 S010 dddd 0sss
+MOV [Rd], Rs Move reg to reg-ind 2 3 1000 S010 ssss 1ddd
+MOV Rd, [Rs+offset8] Move reg-ind w/ 8-bit offs to reg 3 5 1000 S100 dddd 0sss oooo oooo
+MOV [Rd+offset8], Rs Move reg to reg-ind w/ 8-bit offs 3 5 1000 S100 ssss 1ddd oooo oooo
+MOV Rd, [Rs+offset16] Move reg-ind w/ 16-bit offs to reg 4 5 1000 S101 dddd 0sss oooo oooo oooo oooo
+MOV [Rd+offset16], Rs Move reg to reg-ind w/ 16-bit offs 4 5 1000 S101 ssss 1ddd oooo oooo oooo oooo
+MOV Rd, [Rs+] Move reg-ind w/ autoinc to reg 2 4 1000 S011 dddd 0sss
+MOV [Rd+], Rs Move reg-ind w/ autoinc to reg 2 4 1000 S011 ssss 1ddd
+MOV direct, Rs Move reg to mem 3 4 1000 S110 ssss 1DDD DDDD DDDD
+MOV Rd, direct Move mem to reg 3 4 1000 S110 dddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_mov(XA_DASM_PARAMS)
+{
+ return handle_alu_type0(XA_CALL_PARAMS, 8);
+}
+
+/*
+POPU direct Pop the mem content (b/w) from the user stack 3 5 1000 S111 0000 0DDD DDDD DDDD
+POP direct Pop the mem content (b/w) from the current stack 3 5 1000 S111 0001 0DDD DDDD DDDD
+PUSHU direct Push the mem content (b/w) onto the user stack 3 5 1000 S111 0010 0DDD DDDD DDDD
+PUSH direct Push the mem content (b/w) onto the current stack 3 5 1000 S111 0011 0DDD DDDD DDDD
+DJNZ Rd,rel8 Decrement reg and jump if not zero 3 8t/5nt 1000 S111 dddd 1000 rrrr rrrr
+*/
+int xa_dasm::d_pushpop_djnz_subgroup(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ int size = op & 0x08;
+
+
+ if (op2 & 0x08)
+ {
+ int address = pc + ((s8)op3)*2;
+ int rd = (op2 & 0xf0) >> 4;
+ address &= ~1; // must be word aligned
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ util::stream_format(stream, "DJNZ%s %s, $%04x", size ? ".w" : ".b", regnames[rd], address);
+ return 3;
+ }
+ else
+ {
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+
+ switch (op2 & 0xf0)
+ {
+ case 0x00:
+ util::stream_format(stream, "POPU%s %s", size ? ".w" : ".b", get_directtext(direct));
+ break;
+
+ case 0x10:
+ util::stream_format(stream, "POP%s %s", size ? ".w" : ".b", get_directtext(direct));
+ break;
+
+ case 0x20:
+ util::stream_format(stream, "PUSHU%s %s", size ? ".w" : ".b", get_directtext(direct));
+ break;
+
+ case 0x30:
+ util::stream_format(stream, "PUSH%s %s", size ? ".w" : ".b", get_directtext(direct));
+ break;
+
+ default:
+ util::stream_format(stream, "illegal");
+ break;
+ }
+ }
+ return 3;
+}
+
+
+
+// -------------------------------------- Group 9 --------------------------------------
+
+/*
+MOV [Rd+], [Rs+] Move reg-ind to reg-ind, both pointers autoinc 2 6 1001 S000 0ddd 0sss
+DA Rd Decimal Adjust byte reg 2 4 1001 0000 dddd 1000
+SEXT Rd Sign extend last operation to reg 2 3 1001 S000 dddd 1001
+CPL Rd Complement (ones complement) reg 2 3 1001 S000 dddd 1010
+NEG Rd Negate (twos complement) reg 2 3 1001 S000 dddd 1011
+MOVC A, [A+PC] Move data from code mem to the accumulator ind w/ PC 2 6 1001 0000 0100 1100
+MOVC A, [A+DPTR] Move data from code mem to the accumulator ind w/ DPTR 2 6 1001 0000 0100 1110
+MOV Rd, USP Move User Stack Pointer to reg (system mode only) 2 3 1001 0000 dddd 1111
+MOV USP, Rs Move reg to User Stack Pointer (system mode only) 2 3 1001 1000 ssss 1111
+*/
+int xa_dasm::d_g9_subgroup(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+
+ if ((op2 & 0x0f) < 0x08)
+ {
+ int rd = (op2 & 0x70) >> 4;
+ int rs = (op2 & 0x07);
+ util::stream_format(stream, "MOV%s [%s+], [%s+]", size ? ".w" : ".b", m_regnames16[rd], m_regnames16[rs]);
+ }
+ else
+ {
+ switch (op2 & 0x0f)
+ {
+ case 0x08:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "DA %s", m_regnames8[rd]);
+ return 2;
+ }
+ case 0x09:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "SEXT%s %s", size ? ".w" : ".b", regnames[rd]);
+ return 2;
+ }
+ case 0x0a:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "CPL%s %s", size ? ".w" : ".b", regnames[rd]);
+ return 2;
+ }
+ case 0x0b:
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "NEG%s %sx", size ? ".w" : ".b", regnames[rd]);
+ return 2;
+ }
+ case 0x0c:
+ {
+ util::stream_format(stream, "MOVC A, [A+PC]");
+ return 2;
+ }
+ case 0x0e:
+ {
+ util::stream_format(stream, "MOVC A, [A+DPTR]");
+ return 2;
+ }
+ case 0x0f:
+ {
+ if (!size)
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "MOV %s, USP", m_regnames16[rd]);
+ }
+ else
+ {
+ int rs = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "MOV USP, %s", m_regnames16[rs]);
+ }
+ return 2;
+ }
+ default:
+ {
+ util::stream_format(stream, "illegal %02x", op2);
+ return 2;
+ }
+
+ }
+ }
+
+ return 2;
+}
+
+/*
+ADD Rd, #data8 Add 8-bit imm data to reg 3 3 1001 0001 dddd 0000 iiii iiii
+ADD [Rd], #data8 Add 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0000 iiii iiii
+ADD [Rd+], #data8 Add 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0000 iiii iiii
+ADD [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0000 oooo oooo iiii iiii
+ADD [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0000 oooo oooo oooo oooo iiii iiii
+ADD direct, #data8 Add 8-bit imm data to mem 4 4 1001 0110 0DDD 0000 DDDD DDDD iiii iiii
+ADD Rd, #data16 Add 16-bit imm data to reg 4 3 1001 1001 dddd 0000 iiii iiii iiii iiii
+ADD [Rd], #data16 Add 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0000 iiii iiii iiii iiii
+ADD [Rd+], #data16 Add 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0000 iiii iiii iiii iiii
+ADD [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0000 oooo oooo iiii iiii iiii iiii
+ADD [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0000 oooo oooo oooo oooo iiii iiii iiii iiii
+ADD direct, #data16 Add 16-bit imm data to mem 5 4 1001 1110 0DDD 0000 DDDD DDDD iiii iiii iiii iiii
+
+ADDC Rd, #data8 Add 8-bit imm data to reg w/ carry 3 3 1001 0001 dddd 0001 iiii iiii
+ADDC Rd, #data16 Add 16-bit imm data to reg w/ carry 4 3 1001 1001 dddd 0001 iiii iiii iiii iiii
+ADDC [Rd], #data8 Add 16-bit imm data to reg-ind w/ carry 3 4 1001 0010 0ddd 0001 iiii iiii
+ADDC [Rd], #data16 Add 16-bit imm data to reg-ind w/ carry 4 4 1001 1010 0ddd 0001 iiii iiii iiii iiii
+ADDC [Rd+], #data8 Add 8-bit imm data to reg-ind and autoinc w/ carry 3 5 1001 0011 0ddd 0001 iiii iiii
+ADDC [Rd+], #data16 Add 16-bit imm data to reg-ind and autoinc w/ carry 4 5 1001 1011 0ddd 0001 iiii iiii iiii iiii
+ADDC [Rd+offset8], #data8 Add 8-bit imm data to reg-ind w/ 8-bit offs and carry 4 6 1001 0100 0ddd 0001 oooo oooo iiii iiii
+ADDC [Rd+offset8], #data16 Add 16-bit imm data to reg-ind w/ 8-bit offs and carry 5 6 1001 1100 0ddd 0001 oooo oooo iiii iiii iiii iiii
+ADDC [Rd+offset16], #data8 Add 8-bit imm data to reg-ind w/ 16-bit offs and carry 5 6 1001 0101 0ddd 0001 oooo oooo oooo oooo iiii iiii
+ADDC [Rd+offset16], #data16 Add 16-bit imm data to reg-ind w/ 16-bit offs and carry 6 6 1001 1101 0ddd 0001 oooo oooo oooo oooo iiii iiii iiii iiii
+ADDC direct, #data8 Add 8-bit imm data to mem w/ carry 4 4 1001 0110 0DDD 0001 DDDD DDDD iiii iiii
+ADDC direct, #data16 Add 16-bit imm data to mem w/ carry 5 4 1001 1110 0DDD 0001 DDDD DDDD iiii iiii iiii iiii
+
+SUB Rd, #data8 Subtract 8-bit imm data to reg 3 3 1001 0001 dddd 0010 iiii iiii
+SUB Rd, #data16 Subtract 16-bit imm data to reg 4 3 1001 1001 dddd 0010 iiii iiii iiii iiii
+SUB [Rd], #data8 Subtract 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0010 iiii iiii
+SUB [Rd], #data16 Subtract 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0010 iiii iiii iiii iiii
+SUB [Rd+], #data8 Subtract 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0010 iiii iiii
+SUB [Rd+], #data16 Subtract 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0010 iiii iiii iiii iiii
+SUB [Rd+offset8], #data8 Subtract 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0010 oooo oooo iiii iiii
+SUB [Rd+offset8], #data16 Subtract 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0010 oooo oooo iiii iiii iiii iiii
+SUB [Rd+offset16], #data8 Subtract 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0010 oooo oooo oooo oooo iiii iiii
+SUB [Rd+offset16], #data16 Subtract 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0010 oooo oooo oooo oooo iiii iiii iiii iiii
+SUB direct, #data8 Subtract 8-bit imm data to mem 4 4 1001 0110 0DDD 0010 DDDD DDDD iiii iiii
+SUB direct, #data16 Subtract 16-bit imm data to mem 5 4 1001 1110 0DDD 0010 DDDD DDDD iiii iiii iiii iiii
+
+SUBB Rd, #data8 Subtract w/ borrow 8-bit imm data to reg 3 3 1001 0001 dddd 0011 iiii iiii
+SUBB Rd, #data16 Subtract w/ borrow 16-bit imm data to reg 4 3 1001 1001 dddd 0011 iiii iiii iiii iiii
+SUBB [Rd], #data8 Subtract w/ borrow 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0011 iiii iiii
+SUBB [Rd], #data16 Subtract w/ borrow 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0011 iiii iiii iiii iiii
+SUBB [Rd+], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0011 iiii iiii
+SUBB [Rd+], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0011 iiii iiii iiii iiii
+SUBB [Rd+offset8], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0011 oooo oooo iiii iiii
+SUBB [Rd+offset8], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0011 oooo oooo iiii iiii iiii iiii
+SUBB [Rd+offset16], #data8 Subtract w/ borrow 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0011 oooo oooo oooo oooo iiii iiii
+SUBB [Rd+offset16], #data16 Subtract w/ borrow 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0011 oooo oooo oooo oooo iiii iiii iiii iiii
+SUBB direct, #data8 Subtract w/ borrow 8-bit imm data to mem 4 4 1001 0110 0DDD 0011 DDDD DDDD iiii iiii
+SUBB direct, #data16 Subtract w/ borrow 16-bit imm data to mem 5 4 1001 1110 0DDD 0011 DDDD DDDD iiii iiii iiii iiii
+
+CMP Rd, #data8 Compare 8-bit imm data to reg 3 3 1001 0001 dddd 0100 iiii iiii
+CMP Rd, #data16 Compare 16-bit imm data to reg 4 3 1001 1001 dddd 0100 iiii iiii iiii iiii
+CMP [Rd], #data8 Compare 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0100 iiii iiii
+CMP [Rd], #data16 Compare 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0100 iiii iiii iiii iiii
+CMP [Rd+], #data8 Compare 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0100 iiii iiii
+CMP [Rd+], #data16 Compare 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0100 iiii iiii iiii iiii
+CMP [Rd+offset8], #data8 Compare 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0100 oooo oooo iiii iiii
+CMP [Rd+offset8], #data16 Compare 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0100 oooo oooo iiii iiii iiii iiii
+CMP [Rd+offset16], #data8 Compare 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0100 oooo oooo oooo oooo iiii iiii
+CMP [Rd+offset16], #data16 Compare 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0100 oooo oooo oooo oooo iiii iiii iiii iiii
+CMP direct, #data8 Compare 8-bit imm data to mem 4 4 1001 0110 0DDD 0100 DDDD DDDD iiii iiii
+CMP direct, #data16 Compare 16-bit imm data to mem 5 4 1001 1110 0DDD 0100 DDDD DDDD iiii iiii iiii iiii
+
+AND Rd, #data8 Logical AND 8-bit imm data to reg 3 3 1001 0001 dddd 0101 iiii iiii
+AND Rd, #data16 Logical AND 16-bit imm data to reg 4 3 1001 1001 dddd 0101 iiii iiii iiii iiii
+AND [Rd], #data8 Logical AND 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0101 iiii iiii
+AND [Rd], #data16 Logical AND 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0101 iiii iiii iiii iiii
+AND [Rd+], #data8 Logical AND 8-bit imm data to reg-ind and autoinc 3 5 1001 0011 0ddd 0101 iiii iiii
+AND [Rd+], #data16 Logical AND 16-bit imm data to reg-ind and autoinc 4 5 1001 1011 0ddd 0101 iiii iiii iiii iiii
+AND [Rd+offset8], #data8 Logical AND 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0101 oooo oooo iiii iiii
+AND [Rd+offset8], #data16 Logical AND 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0101 oooo oooo iiii iiii iiii iiii
+AND [Rd+offset16], #data8 Logical AND 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0101 oooo oooo oooo oooo iiii iiii
+AND [Rd+offset16], #data16 Logical AND 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0101 oooo oooo oooo oooo iiii iiii iiii iiii
+AND direct, #data8 Logical AND 8-bit imm data to mem 4 4 1001 0110 0DDD 0101 DDDD DDDD iiii iiii
+AND direct, #data16 Logical AND 16-bit imm data to mem 5 4 1001 1110 0DDD 0101 DDDD DDDD iiii iiii iiii iiii
+
+OR Rd, #data8 Logical OR 8-bit imm data to reg 3 3 1001 0001 dddd 0110 iiii iiii
+OR Rd, #data16 Logical OR 16-bit imm data to reg 4 3 1001 1001 dddd 0110 iiii iiii iiii iiii
+OR [Rd], #data8 Logical OR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0110 iiii iiii
+OR [Rd], #data16 Logical OR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0110 iiii iiii iiii iiii
+OR [Rd+], #data8 Logical OR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0110 iiii iiii
+OR [Rd+], #data16 Logical OR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0110 iiii iiii iiii iiii
+OR [Rd+offset8], #data8 Logical OR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0110 oooo oooo iiii iiii
+OR [Rd+offset8], #data16 Logical OR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0110 oooo oooo iiii iiii iiii iiii
+OR [Rd+offset16], #data8 Logical OR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0110 oooo oooo oooo oooo iiii iiii
+OR [Rd+offset16], #data16 Logical OR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0110 oooo oooo oooo oooo iiii iiii iiii iiii
+OR direct, #data8 Logical OR 8-bit imm data to mem 4 4 1001 0110 0DDD 0110 DDDD DDDD iiii iiii
+OR direct, #data16 Logical OR 16-bit imm data to mem 5 4 1001 1110 0DDD 0110 DDDD DDDD iiii iiii iiii iiii
+
+XOR Rd, #data8 Logical XOR 8-bit imm data to reg 3 3 1001 0001 dddd 0111 iiii iiii
+XOR Rd, #data16 Logical XOR 16-bit imm data to reg 4 3 1001 1001 dddd 0111 iiii iiii iiii iiii
+XOR [Rd], #data8 Logical XOR 8-bit imm data to reg-ind 3 4 1001 0010 0ddd 0111 iiii iiii
+XOR [Rd], #data16 Logical XOR 16-bit imm data to reg-ind 4 4 1001 1010 0ddd 0111 iiii iiii iiii iiii
+XOR [Rd+], #data8 Logical XOR 8-bit imm data to reg-ind w/ autoinc 3 5 1001 0011 0ddd 0111 iiii iiii
+XOR [Rd+], #data16 Logical XOR 16-bit imm data to reg-ind w/ autoinc 4 5 1001 1011 0ddd 0111 iiii iiii iiii iiii
+XOR [Rd+offset8], #data8 Logical XOR 8-bit imm data to reg-ind w/ 8-bit offs 4 6 1001 0100 0ddd 0111 oooo oooo iiii iiii
+XOR [Rd+offset8], #data16 Logical XOR 16-bit imm data to reg-ind w/ 8-bit offs 5 6 1001 1100 0ddd 0111 oooo oooo iiii iiii iiii iiii
+XOR [Rd+offset16], #data8 Logical XOR 8-bit imm data to reg-ind w/ 16-bit offs 5 6 1001 0101 0ddd 0111 oooo oooo oooo oooo iiii iiii
+XOR [Rd+offset16], #data16 Logical XOR 16-bit imm data to reg-ind w/ 16-bit offs 6 6 1001 1101 0ddd 0111 oooo oooo oooo oooo iiii iiii iiii iiii
+XOR direct, #data8 Logical XOR 8-bit imm data to mem 4 4 1001 0110 0DDD 0111 DDDD DDDD iiii iiii
+XOR direct, #data16 Logical XOR 16-bit imm data to mem 5 4 1001 1110 0DDD 0111 DDDD DDDD iiii iiii iiii iiii
+
+MOV Rd, #data8 Move 8-bit imm data to reg 3 3 1001 0001 dddd 1000 iiii iiii
+MOV Rd, #data16 Move 16-bit imm data to reg 4 3 1001 1001 dddd 1000 iiii iiii iiii iiii
+MOV [Rd], #data8 Move 16-bit imm data to reg-ind 3 3 1001 0010 0ddd 1000 iiii iiii
+MOV [Rd], #data16 Move 16-bit imm data to reg-ind 4 3 1001 1010 0ddd 1000 iiii iiii iiii iiii
+MOV [Rd+], #data8 Move 8-bit imm data to reg-ind w/ autoinc 3 4 1001 0011 0ddd 1000 iiii iiii
+MOV [Rd+], #data16 Move 16-bit imm data to reg-ind w/ autoinc 4 4 1001 1011 0ddd 1000 iiii iiii iiii iiii
+MOV [Rd+offset8], #data8 Move 8-bit imm data to reg-ind w/ 8-bit offs 4 5 1001 0100 0ddd 1000 oooo oooo iiii iiii
+MOV [Rd+offset8], #data16 Move 16-bit imm data to reg-ind w/ 8-bit offs 5 5 1001 1100 0ddd 1000 oooo oooo iiii iiii iiii iiii
+MOV [Rd+offset16], #data8 Move 8-bit imm data to reg-ind w/ 16-bit offs 5 5 1001 0101 0ddd 1000 oooo oooo oooo oooo iiii iiii
+MOV [Rd+offset16], #data16 Move 16-bit imm data to reg-ind w/ 16-bit offs 6 5 1001 1101 0ddd 1000 oooo oooo oooo oooo iiii iiii iiii iiii
+MOV direct, #data8 Move 8-bit imm data to mem 4 3 1001 0110 0DDD 1000 DDDD DDDD iiii iiii
+MOV direct, #data16 Move 16-bit imm data to mem 5 3 1001 1110 0DDD 1000 DDDD DDDD iiii iiii iiii iiii
+*/
+int xa_dasm::d_alu(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ return handle_alu_type1(XA_CALL_PARAMS, op2);
+}
+
+/*
+MOV direct, direct Move mem to mem 4 4 1001 S111 0DDD 0ddd DDDD DDDD dddd dddd
+JB bit,rel8 Jump if bit set 4 10t/6nt 1001 0111 1000 00bb bbbb bbbb rrrr rrrr
+JNB bit,rel8 Jump if bit not set 4 10t/6nt 1001 0111 1010 00bb bbbb bbbb rrrr rrrr
+JBC bit,rel8 Jump if bit set and then clear the bit 4 11t/7nt 1001 0111 1100 00bb bbbb bbbb rrrr rrrr
+*/
+int xa_dasm::d_jb_mov_subgroup(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+
+ if (op2 & 0x80)
+ {
+ int address = pc + ((s8)op4)*2;
+ int bit = ((op2 & 0x03) << 8) | op3;
+ address &= ~1; // must be word aligned
+
+ switch (op2 & 0x70)
+ {
+ case 0x00: util::stream_format(stream, "JB %s, $%02x", get_bittext(bit), address ); break;
+ case 0x20: util::stream_format(stream, "JNB %s, $%02x", get_bittext(bit), address ); break;
+ case 0x40: util::stream_format(stream, "JBC %s, $%02x", get_bittext(bit), address ); break;
+ default: util::stream_format(stream, "illegal %s $%02x", get_bittext(bit), address ); break;
+ }
+ }
+ else
+ {
+ int direct_dst = ((op2 & 0x70) << 4) | op3;
+ int direct_src = ((op2 & 0x07) << 8) | op4;
+ int size = op & 0x08;
+
+ util::stream_format(stream, "MOV%s %s, %s", size ? ".w" : ".b", get_directtext(direct_dst), get_directtext(direct_src));
+ }
+
+ return 4;
+}
+
+// -------------------------------------- Group a --------------------------------------
+
+/*
+XCH Rd, direct Exchange contents of mem w/ a reg 3 6 1010 S000 dddd 1DDD DDDD DDDD
+
+MOV direct, [Rs] Move reg-ind to mem 3 4 1010 S000 1sss 0DDD DDDD DDDD
+MOV [Rd], direct Move mem to reg-ind 3 4 1010 S000 0ddd 0DDD DDDD DDDD
+*/
+int xa_dasm::d_movdir(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+
+ if (op2 & 0x08)
+ {
+ const u8 rd = op2 & (0xf0) >> 4;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ util::stream_format(stream, "XCH%s %s, %s", size ? ".w" : ".b", regnames[rd], get_directtext(direct) );
+ return 3;
+ }
+ else
+ {
+ if (op2 & 0x80)
+ {
+ const u8 rs = op2 & (0x70) >> 4;
+ util::stream_format(stream, "MOV%s %s, [%s]", size ? ".w" : ".b", get_directtext(direct), m_regnames16[rs]);
+ return 3;
+ }
+ else
+ {
+ const u8 rd = op2 & (0x70) >> 4;
+ util::stream_format(stream, "MOV%s [%s], %s", size ? ".w" : ".b", m_regnames16[rd], get_directtext(direct));
+ return 3;
+ }
+ }
+
+ return 3;
+}
+
+/*
+ADDS Rd, #data4 Add 4-bit signed imm data to reg 2 3 1010 S001 dddd iiii
+ADDS [Rd], #data4 Add 4-bit signed imm data to reg-ind 2 4 1010 S010 0ddd iiii
+ADDS [Rd+], #data4 Add 4-bit signed imm data to reg-ind w/ autoinc 2 5 1010 S011 0ddd iiii
+ADDS [Rd+offset8], #data4 Add reg-ind w/ 8-bit offs to 4-bit signed imm data 3 6 1010 S100 0ddd iiii oooo oooo
+ADDS [Rd+offset16], #data4 Add reg-ind w/ 16-bit offs to 4-bit signed imm data 4 6 1010 S101 0ddd iiii oooo oooo oooo oooo
+ADDS direct, #data4 Add 4-bit signed imm data to mem 3 4 1010 S110 0DDD iiii DDDD DDDD
+*/
+int xa_dasm::d_adds(XA_DASM_PARAMS)
+{
+ return handle_adds_movs(XA_CALL_PARAMS, 0);
+}
+
+/*
+MOVX [Rd], Rs Move external data from reg to mem 2 6 1010 S111 ssss 1ddd
+MOVX Rd, [Rs] Move external data from mem to reg 2 6 1010 S111 dddd 0sss
+*/
+int xa_dasm::d_movx_subgroup(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+
+ if (op2 & 0x08)
+ {
+ const u8 rs = (op2 & 0xf0) >> 4;
+ const u8 rd = (op2 & 0x07);
+ util::stream_format(stream, "MOVX%s [%s], %s", size ? ".w" : ".b", m_regnames16[rd], regnames[rs]);
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x07);
+ util::stream_format(stream, "MOVX%s %s, [%s]", size ? ".w" : ".b", regnames[rd], m_regnames16[rs]);
+ }
+ return 2;
+}
+
+// -------------------------------------- Group b --------------------------------------
+
+/*
+RR Rd, #data4 Rotate right reg by the 4-bit imm value 2 a* 1011 S000 dddd iiii
+*/
+int xa_dasm::d_rr(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data = rd & 0x0f;
+ util::stream_format(stream, "RR%s %s, %d", size ? ".w" : ".b", regnames[rd], data);
+ return 2;
+}
+
+/*
+MOVS Rd, #data4 Move 4-bit sign-extended imm data to reg 2 3 1011 S001 dddd iiii
+MOVS [Rd], #data4 Move 4-bit sign-extended imm data to reg-ind 2 3 1011 S010 0ddd iiii
+MOVS [Rd+], #data4 Move 4-bit sign-extended imm data to reg-ind w/ autoinc 2 4 1011 S011 0ddd iiii
+MOVS [Rd+offset8], #data4 Move reg-ind w/ 8-bit offs to 4-bit sign-extended imm data 3 5 1011 S100 0ddd iiii oooo oooo
+MOVS [Rd+offset16], #data4 Move reg-ind w/ 16-bit offs to 4-bit sign-extended imm data 4 5 1011 S101 0ddd iiii oooo oooo oooo oooo
+MOVS direct, #data4 Move 4-bit sign-extended imm data to mem 3 3 1011 S110 0DDD iiii DDDD DDDD
+*/
+int xa_dasm::d_movs(XA_DASM_PARAMS)
+{
+ return handle_adds_movs(XA_CALL_PARAMS, 1);
+}
+
+/*
+RRC Rd, #data4 Rotate right reg though carry by the 4-bit imm value 2 a* 1011 S111 dddd iiii
+*/
+int xa_dasm::d_rrc(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int size = op & 0x08;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data = rd & 0x0f;
+ util::stream_format(stream, "RRC%s %s, %d", size ? ".w" : ".b", regnames[rd], data);
+
+ return 2;
+}
+
+
+// -------------------------------------- Group c --------------------------------------
+
+/*
+LSR Rd, Rs Logical right shift dest reg by the value in the src reg 2 a* 1100 SS00 dddd ssss
+FCALL addr24 Far call (full 24-bit address space) 4 12/8(PZ) 1100 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+*/
+int xa_dasm::d_lsr_fc(XA_DASM_PARAMS)
+{
+ int size = op & 0x0c;
+ if (size == 0x04)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+
+ const u32 addr = (op2 << 8) | op3 | (op4 << 16);
+
+ util::stream_format(stream, "FCALL $%06x", addr);
+
+ return 4;
+ }
+ else
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "LSR %s, %s", regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
+ return 2;
+ }
+
+ return 1;
+}
+
+/*
+ASL Rd, Rs Logical left shift dest reg by the value in the src reg 2 a* 1100 SS01 dddd ssss
+CALL rel16 Relative call (range +/- 64K) 3 7/4(PZ) 1100 0101 rrrr rrrr rrrr rrrr
+*/
+int xa_dasm::d_asl_c(XA_DASM_PARAMS)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ u16 offset = (op2 << 8) | op3;
+ int address = pc + ((s16)offset)*2;
+ address &= ~1; // must be word aligned
+ util::stream_format(stream, "CALL $%04x", address);
+ return 3;
+ }
+ else
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "ASL%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param? (check 03D4 in superkds)
+ return 2;
+ }
+ return 1;
+}
+
+/*
+ASR Rd, Rs Arithmetic shift right dest reg by the count in the src 2 a* 1100 SS10 dddd ssss
+CALL [Rs] Subroutine call ind w/ a reg 2 8/5(PZ) 1100 0110 0000 0sss
+*/
+int xa_dasm::d_asr_c(XA_DASM_PARAMS)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rs = op2 & 0x07;
+ util::stream_format(stream, "CALL [%s]", m_regnames16[rs]);
+ return 2;
+ }
+ else
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "ASR%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
+ return 2;
+ }
+ return 1;
+}
+
+/*
+NORM Rd, Rs Logical shift left dest reg by the value in the src reg until MSB set 2 a* 1100 SS11 dddd ssss
+*/
+int xa_dasm::d_norm(XA_DASM_PARAMS)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ util::stream_format(stream, "illegal %02x", op2);
+ return 2;
+ }
+ else
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ int rd = (op2 & 0xf0) >> 4;
+ int rs = (op2 & 0x0f);
+ const char** regnames = ((size != 0) ? m_regnames16 : m_regnames8);
+ util::stream_format(stream, "NORM%s %s, %s", m_dwparamsizes[size], regnames[rd], m_regnames8[rs]); // m_regnames8 or regnames for last param?
+ return 2;
+ }
+ return 2;
+}
+
+// -------------------------------------- Group d --------------------------------------
+
+/*
+LSR Rd, #data4 Logical right shift reg by the 4-bit imm value 2 a* 1101 SS00 dddd iiii
+LSR Rd, #data5 Logical right shift reg by the 4-bit imm value 2 a* 1101 1100 dddi iiii
+FJMP addr24 Far jump (full 24-bit address space) 4 6 1101 0100 aaaa aaaa AAAA AAAA AAAA AAAA
+*/
+int xa_dasm::d_lsr_fj(XA_DASM_PARAMS)
+{
+ int size = (op & 0x0c) >> 2;
+ if (size == 0x01)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u32 addr = (op2 << 8) | op3 | (op4 << 16);
+ util::stream_format(stream, "FJMP $%06x", addr);
+ return 4;
+ }
+ else
+ {
+ return handle_shift(XA_CALL_PARAMS, 2);
+ }
+ return 1;
+}
+
+/*
+ASL Rd, #data4 Logical left shift reg by the 4-bit imm value 2 a* 1101 SS01 dddd iiii
+ASL Rd, #data5 Logical left shift reg by the 5-bit imm value 2 a* 1101 1101 dddi iiii
+JMP rel16 Long unconditional branch 3 6 1101 0101 rrrr rrrr rrrr rrrr
+*/
+int xa_dasm::d_asl_j(XA_DASM_PARAMS)
+{
+ int size = op & 0x0c;
+ if (size == 0x04)
+ {
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ u16 offset = (op2 << 8) | op3;
+ int address = pc + ((s16)offset)*2;
+ address &= ~1; // must be word aligned
+ util::stream_format(stream, "JMP $%04x", address);
+ return 3;
+ }
+ else
+ {
+ return handle_shift(XA_CALL_PARAMS, 0);
+ }
+ return 1;
+}
+
+/*
+ASR Rd, #data4 Arithmetic shift right reg by the 4-bit imm count 2 a* 1101 SS10 dddd iiii
+ASR Rd, #data5 Arithmetic shift right reg by the 5-bit imm count 2 a* 1101 1110 dddi iiii
+RESET Causes a hardware Reset (same as external Reset) 2 18 1101 0110 0001 0000
+TRAP #data4 Causes 1 of 16 hardware traps to be executed 2 23/19(PZ) 1101 0110 0011 tttt
+JMP [A+DPTR] Jump ind relative to the DPTR 2 5 1101 0110 0100 0110
+JMP [[Rs+]] Jump double-ind to the address (pointer to a pointer) 2 8 1101 0110 0110 0sss
+JMP [Rs] Jump ind to the address in the reg (64K) 2 7 1101 0110 0111 0sss
+RET Return from subroutine 2 8/6(PZ) 1101 0110 1000 0000
+RETI Return from interrupt 2 10/8(PZ) 1101 0110 1001 0000
+*/
+int xa_dasm::d_asr_j(XA_DASM_PARAMS)
+{
+ int size = op & 0x0c;
+ const u8 op2 = opcodes.r8(pc++);
+ if (size == 0x04)
+ {
+ switch (op2 & 0xf0)
+ {
+ case 0x10: util::stream_format(stream, "RESET"); break;
+ case 0x30: util::stream_format(stream, "TRAP %d", op2 & 0x0f); break;
+ case 0x40: util::stream_format(stream, "JMP [A+DPTR]"); break;
+ case 0x60: util::stream_format(stream, "JMP [[%s+]]", m_regnames16[op2 & 0x07]); break;
+ case 0x70: util::stream_format(stream, "JMP [%s]", m_regnames16[op2 & 0x07]); break;
+ case 0x80: util::stream_format(stream, "RET"); break;
+ case 0x90: util::stream_format(stream, "RTI"); break;
+ default: util::stream_format(stream, "illegal"); break;
+ }
+ }
+ else
+ {
+ return handle_shift(XA_CALL_PARAMS, 1);
+ }
+ return 2;
+}
+
+/*
+RL Rd, #data4 Rotate left reg by the 4-bit imm value 2 a* 1101 S011 dddd iiii
+*/
+int xa_dasm::d_rl(XA_DASM_PARAMS)
+{
+ int size = op & 0x08;
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data4 = (op2 & 0x0f);
+ util::stream_format(stream, "RL%s %d, %d", size ? ".w" : ".b", regnames[rd], data4);
+ return 2;
+}
+
+/*
+RLC Rd, #data4 Rotate left reg though carry by the 4-bit imm value 2 a* 1101 S111 dddd iiii
+*/
+int xa_dasm::d_rlc(XA_DASM_PARAMS)
+{
+ int size = op & 0x08;
+ const u8 op2 = opcodes.r8(pc++);
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 data4 = (op2 & 0x0f);
+ util::stream_format(stream, "RLC%s Rd, %d", size ? ".w" : ".b", regnames[rd], data4);
+ return 2;
+}
+
+// -------------------------------------- Group e --------------------------------------
+
+/*
+DJNZ direct,rel8 Decrement mem and jump if not zero 4 9t/5nt 1110 S010 0000 1DDD DDDD DDDD rrrr rrrr
+CJNE Rd,direct,rel8 Compare dir byte to reg and jump if not equal 4 10t/7nt 1110 S010 dddd 0DDD DDDD DDDD rrrr rrrr
+*/
+int xa_dasm::d_djnz_cjne(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ int size = op & 0x08;
+
+ int address = pc + ((s8)op4)*2;
+ address &= ~1; // must be word aligned
+ const u16 direct = ((op2 & 0x07) << 8) | op3;
+ if (op2 & 0x08)
+ {
+ util::stream_format(stream, "DJNZ%s %s, $%04x", size ? ".w" : ".b", get_directtext(direct), address);
+ }
+ else
+ {
+ int rd = (op2 & 0xf0) >> 4;
+ const char** regnames = size ? m_regnames16 : m_regnames8;
+ util::stream_format(stream, "CJNE%s %s, %s, $%04x", size ? ".w" : ".b", regnames[rd], get_directtext(direct), address);
+ }
+ return 4;
+}
+
+/*
+MULU.b Rd, Rs 8X8 unsigned multiply of reg contents 2 12 1110 0000 dddd ssss
+*/
+int xa_dasm::d_mulu_b(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "MULU.b %s, %s", m_regnames8[rd], m_regnames8[rs]);
+ return 2;
+}
+
+/*
+DIVU.b Rd, Rs 8x8 unsigned reg divide 2 12 1110 0001 dddd ssss
+*/
+int xa_dasm::d_divu_b(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "DIVU.b %s, %s", m_regnames8[rd], m_regnames8[rs]);
+ return 2;
+}
+
+/*
+MULU.w Rd, Rs 16X16 unsigned reg multiply 2 12 1110 0100 dddd ssss
+*/
+int xa_dasm::d_mulu_w(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "MULU.w %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+DIVU.w Rd, Rs 16X8 unsigned reg divide 2 12 1110 0101 dddd ssss
+*/
+int xa_dasm::d_divu_w(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "DIVU.w %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+MUL.w Rd, Rs 16X16 signed multiply of reg contents 2 12 1110 0110 dddd ssss
+*/
+int xa_dasm::d_mul_w(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "MUL.w %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+DIV.w Rd, Rs 16x8 signed reg divide 2 14 1110 0111 dddd ssss
+*/
+int xa_dasm::d_div_w(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "DIV.w %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+MULU.b Rd, #data8 8X8 unsigned multiply of 8-bit imm data w/ reg 3 12 1110 1000 dddd 0000 iiii iiii
+DIVU.b Rd, #data8 8X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0001 iiii iiii
+DIVU.w Rd, #data8 16X8 unsigned reg divide w/ imm byte 3 12 1110 1000 dddd 0011 iiii iiii
+DIV.w Rd, #data8 16x8 signed divide reg w/ imm word 3 14 1110 1000 dddd 1011 iiii iiii
+*/
+int xa_dasm::d_div_data8(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xf0) >> 4;
+
+ switch (op2 & 0x0f)
+ {
+ case 0x00:
+ {
+ util::stream_format(stream, "MULU.b %s, #$%02x", m_regnames8[rd], op3);
+ break;
+ }
+ case 0x01:
+ {
+ util::stream_format(stream, "DIVU.b %s, #$%02x", m_regnames8[rd], op3);
+ break;
+ }
+ case 0x03:
+ {
+ util::stream_format(stream, "DIVU.w %s, #$%02x", m_regnames8[rd], op3);
+ break;
+ }
+ case 0x0b:
+ {
+ util::stream_format(stream, "DIV.w %s, #$%02x", m_regnames8[rd], op3);
+ break;
+ }
+ default:
+ {
+ util::stream_format(stream, "illegal %s #$%02x", m_regnames8[rd], op3);
+ break;
+ }
+ }
+ return 3;
+}
+
+/*
+MULU.w Rd, #data16 16X16 unsigned multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 0000 iiii iiii iiii iiii
+DIVU.d Rd, #data16 32X16 unsigned double reg divide w/ imm word 4 22 1110 1001 ddd0 0001 iiii iiii iiii iiii
+MUL.w Rd, #data16 16X16 signed multiply 16-bit imm data w/ reg 4 12 1110 1001 dddd 1000 iiii iiii iiii iiii
+DIV.d Rd, #data16 32x16 signed double reg divide w/ imm word 4 24 1110 1001 ddd0 1001 iiii iiii iiii iiii
+*/
+int xa_dasm::d_div_d16(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u16 data = (op3 << 8) | op4;
+ switch (op2 & 0x0f)
+ {
+ case 0x00:
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "MULU.w %s, #$%04x", m_regnames16[rd], data);
+ break;
+ }
+ case 0x01:
+ {
+ const u8 rd = (op2 & 0xe0) >> 4;
+ util::stream_format(stream, "DIVU.d %s, #$%04x", m_regnames16[rd], data);
+ break;
+ }
+ case 0x08:
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "MUL.w %s, #$%04x", m_regnames16[rd], data);
+ break;
+ }
+ case 0x09:
+ {
+ const u8 rd = (op2 & 0xe0) >> 4;
+ util::stream_format(stream, "DIV.d %s, #$%04x", m_regnames16[rd], data);
+ break;
+ }
+ default:
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "illegal %s, #$%04x", m_regnames16[rd], data);
+ break;
+ }
+ }
+ return 4;
+}
+
+/*
+DIVU.d Rd, Rs 32X16 unsigned double reg divide 2 22 1110 1101 ddd0 ssss
+*/
+int xa_dasm::d_divu_d(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xe0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "DIVU.d %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+DIV.d Rd, Rs 32x16 signed double reg divide 2 24 1110 1111 ddd0 ssss
+*/
+int xa_dasm::d_div_d(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 rd = (op2 & 0xe0) >> 4;
+ const u8 rs = (op2 & 0x0f);
+ util::stream_format(stream, "DIV.d %s, %s", m_regnames16[rd], m_regnames16[rs]);
+ return 2;
+}
+
+/*
+CJNE [Rd],#data8,rel8 Compare imm word to reg-ind and jump if not equal 4 10t/7nt 1110 0011 0ddd 1000 rrrr rrrr iiii iiii
+CJNE Rd,#data8,rel8 Compare imm byte to reg and jump if not equal 4 9t/6nt 1110 0011 dddd 0000 rrrr rrrr iiii iiii
+*/
+int xa_dasm::d_cjne_d8(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ int address = pc + ((s8)op3)*2;
+ address &= ~1; // must be word aligned
+ if (op2 & 0x08)
+ {
+ const u8 rd = (op2 & 0x70) >> 4;
+ util::stream_format(stream, "CJNE [%s], #$%02x, $%04x", m_regnames16[rd], op4, address);
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "CJNE %s, #$%02x, $%04x", m_regnames8[rd], op4, address);
+ }
+ return 4;
+}
+
+/*
+CJNE [Rd],#data16,rel8 Compare imm word to reg-ind and jump if not equal 5 10t/7nt 1110 1011 0ddd 1000 rrrr rrrr iiii iiii iiii iiii
+CJNE Rd,#data16,rel8 Compare imm word to reg and jump if not equal 5 9t/6nt 1110 1011 dddd 0000 rrrr rrrr iiii iiii iiii iiii
+*/
+int xa_dasm::d_cjne_d16(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ const u8 op3 = opcodes.r8(pc++);
+ const u8 op4 = opcodes.r8(pc++);
+ const u8 op5 = opcodes.r8(pc++);
+ const u16 data = (op4 << 8) | op5;
+ int address = pc + ((s8)op3)*2;
+ address &= ~1; // must be word aligned
+ if (op2 & 0x08)
+ {
+ const u8 rd = (op2 & 0x70) >> 4;
+ util::stream_format(stream, "CJNE [%s], #$%04x, $%04x", m_regnames16[rd], data, address);
+ }
+ else
+ {
+ const u8 rd = (op2 & 0xf0) >> 4;
+ util::stream_format(stream, "CJNE %s, #$%04x, $%04x", m_regnames8[rd], data, address);
+ }
+ return 5;
+}
+
+/*
+JZ rel8 Jump if accumulator equals zero 2 6t/3nt 1110 1100 rrrr rrrr
+*/
+int xa_dasm::d_jz_rel8(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int address = pc + ((s8)op2)*2;
+ address &= ~1; // must be word aligned
+ util::stream_format(stream, "JZ $%04x", address);
+ return 2;
+}
+
+/*
+JNZ rel8 Jump if accumulator not equal zero 2 6t/3nt 1110 1110 rrrr rrrr
+*/
+int xa_dasm::d_jnz_rel8(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int address = pc + ((s8)op2)*2;
+ address &= ~1; // must be word aligned
+ util::stream_format(stream, "JNZ $%04x", address);
+ return 2;
+}
+
+
+// -------------------------------------- Group f --------------------------------------
+
+/*
+BCC rel8 Branch if the carry flag is clear 2 6t/3nt 1111 0000 rrrr rrrr
+BCS rel8 Branch if the carry flag is set 2 6t/3nt 1111 0001 rrrr rrrr
+BNE rel8 Branch if the zero flag is not set 2 6t/3nt 1111 0010 rrrr rrrr
+BEQ rel8 Branch if the zero flag is set 2 6t/3nt 1111 0011 rrrr rrrr
+BNV rel8 Branch if overflow flag is clear 2 6t/3nt 1111 0100 rrrr rrrr
+BOV rel8 Branch if overflow flag is set 2 6t/3nt 1111 0101 rrrr rrrr
+BPL rel8 Branch if the negative flag is clear 2 6t/3nt 1111 0110 rrrr rrrr
+BMI rel8 Branch if the negative flag is set 2 6t/3nt 1111 0111 rrrr rrrr
+BG rel8 Branch if greater than (unsigned) 2 6t/3nt 1111 1000 rrrr rrrr
+BL rel8 Branch if less than or equal to (unsigned) 2 6t/3nt 1111 1001 rrrr rrrr
+BGE rel8 Branch if greater than or equal to (signed) 2 6t/3nt 1111 1010 rrrr rrrr
+BLT rel8 Branch if less than (signed) 2 6t/3nt 1111 1011 rrrr rrrr
+BGT rel8 Branch if greater than (signed) 2 6t/3nt 1111 1100 rrrr rrrr
+BLE rel8 Branch if less than or equal to (signed) 2 6t/3nt 1111 1101 rrrr rrrr
+BR rel8 Short unconditional branch 2 6 1111 1110 rrrr rrrr
+*/
+int xa_dasm::d_branch(XA_DASM_PARAMS)
+{
+ const u8 op2 = opcodes.r8(pc++);
+ int address = pc + ((s8)op2)*2;
+ address &= ~1; // must be word aligned
+ util::stream_format(stream, "%s $%04x", m_branches[op & 0xf], address);
+ return 2;
+}
+
+/*
+BKPT Cause the breakpoint trap to be executed. 1 23/19(PZ) 1111 1111
+*/
+int xa_dasm::d_bkpt(XA_DASM_PARAMS)
+{
+ util::stream_format(stream, "BKPT");
+ return 1;
+}
+
+u32 xa_dasm::opcode_alignment() const
+{
+ return 1;
+}
+
+offs_t xa_dasm::disassemble(std::ostream& stream, offs_t pc, const data_buffer& opcodes, const data_buffer& params)
+{
+ const u8 op = opcodes.r8(pc++);
+
+ int size = (this->*s_instruction[op])(XA_CALL_PARAMS);
+
+ return size;
+}
+
diff --git a/src/devices/cpu/xa/xadasm.h b/src/devices/cpu/xa/xadasm.h
new file mode 100644
index 00000000000..7cb8380c086
--- /dev/null
+++ b/src/devices/cpu/xa/xadasm.h
@@ -0,0 +1,121 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#ifndef MAME_CPU_XA_XADASM_H
+#define MAME_CPU_XA_XADASM_H
+
+#pragma once
+
+#define XA_DASM_PARAMS u8 op, std::ostream& stream, offs_t pc, const data_buffer& opcodes, const data_buffer& params
+#define XA_CALL_PARAMS op, stream, pc, opcodes, params
+
+class xa_dasm : public util::disasm_interface
+{
+public:
+ xa_dasm()
+ {
+ add_names(default_names);
+ };
+
+ virtual ~xa_dasm() = default;
+
+private:
+
+ struct mem_info {
+ int addr;
+ const char *name;
+ };
+
+ static const mem_info default_names[];
+ void add_names(const mem_info *info);
+
+ std::string get_data_address(u16 arg) const;
+
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+ typedef int (xa_dasm::*op_func) (XA_DASM_PARAMS);
+ static const op_func s_instruction[256];
+
+ const char* m_regnames16[16] = { "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal", "illegal" };
+ const char* m_regnames8[16] = { "R0L", "R0H", "R1L", "R1H", "R2L", "R2H", "R3L", "R3H", "R4L", "R4H", "R5L", "R5H", "R6L", "R6H", "R7L", "R7H"};
+ const char* m_aluops[16] = { "ADD", "ADDC", "SUB", "SUBB", "CMP", "AND", "OR", "XOR", "MOV", "illegal ALU 0x09", "illegal ALU 0x0a", "illegal ALU 0x0b", "illegal ALU 0x0c", "illegal ALU 0x0d", "illegal ALU 0x0e", "illegal ALU 0x0f"};
+ const char* m_branches[15] = { "BCC", "BCS", "BNE", "BEQ", "BNV", "BOV", "BPL", "BMI", "BG", "BL", "BGE", "BLT", "BGT", "BLE", "BR" };
+ const char* m_addsmovs[2] = { "ADDS", "MOVS" };
+ const char* m_pushpull[4] = { "PUSH", "PUSHU", "POP", "POPU" };
+ const char* m_shifts[3] = { "ASL", "ASR", "LSR" };
+ const char* m_dwparamsizes[4] = { ".b", "invalid", ".w", ".dw" };
+
+ std::string get_bittext(int bit);
+ std::string get_directtext(int bit);
+ std::string show_expanded_data4(u16 data4, int size);
+
+ int handle_alu_type0(XA_DASM_PARAMS, int alu_op);
+ int handle_alu_type1(XA_DASM_PARAMS, u8 op2);
+ int handle_pushpop_rlist(XA_DASM_PARAMS, int type);
+ int handle_adds_movs(XA_DASM_PARAMS, int which);
+ int handle_shift(XA_DASM_PARAMS, int shift_type);
+
+ int d_illegal(XA_DASM_PARAMS);
+
+ int d_nop(XA_DASM_PARAMS);
+ int d_bitgroup(XA_DASM_PARAMS);
+ int d_add(XA_DASM_PARAMS);
+ int d_push_rlist(XA_DASM_PARAMS);
+ int d_addc(XA_DASM_PARAMS);
+ int d_pushu_rlist(XA_DASM_PARAMS);
+ int d_sub(XA_DASM_PARAMS);
+ int d_pop_rlist(XA_DASM_PARAMS);
+ int d_subb(XA_DASM_PARAMS);
+ int d_popu_rlist(XA_DASM_PARAMS);
+ int d_lea_offset8(XA_DASM_PARAMS);
+ int d_lea_offset16(XA_DASM_PARAMS);
+ int d_cmp(XA_DASM_PARAMS);
+ int d_xch_type1(XA_DASM_PARAMS);
+ int d_and(XA_DASM_PARAMS);
+ int d_xch_type2(XA_DASM_PARAMS);
+ int d_or(XA_DASM_PARAMS);
+ int d_xor(XA_DASM_PARAMS);
+ int d_movc_rd_rsinc(XA_DASM_PARAMS);
+ int d_mov(XA_DASM_PARAMS);
+ int d_pushpop_djnz_subgroup(XA_DASM_PARAMS);
+ int d_g9_subgroup(XA_DASM_PARAMS);
+ int d_alu(XA_DASM_PARAMS);
+ int d_jb_mov_subgroup(XA_DASM_PARAMS);
+ int d_movdir(XA_DASM_PARAMS);
+ int d_adds(XA_DASM_PARAMS);
+ int d_movx_subgroup(XA_DASM_PARAMS);
+ int d_rr(XA_DASM_PARAMS);
+ int d_movs(XA_DASM_PARAMS);
+ int d_rrc(XA_DASM_PARAMS);
+ int d_lsr_fc(XA_DASM_PARAMS);
+ int d_asl_c(XA_DASM_PARAMS);
+ int d_asr_c(XA_DASM_PARAMS);
+ int d_norm(XA_DASM_PARAMS);
+ int d_lsr_fj(XA_DASM_PARAMS);
+ int d_asl_j(XA_DASM_PARAMS);
+ int d_asr_j(XA_DASM_PARAMS);
+ int d_rl(XA_DASM_PARAMS);
+ int d_rlc(XA_DASM_PARAMS);
+ int d_djnz_cjne(XA_DASM_PARAMS);
+ int d_mulu_b(XA_DASM_PARAMS);
+ int d_divu_b(XA_DASM_PARAMS);
+ int d_mulu_w(XA_DASM_PARAMS);
+ int d_divu_w(XA_DASM_PARAMS);
+ int d_mul_w(XA_DASM_PARAMS);
+ int d_div_w(XA_DASM_PARAMS);
+ int d_div_data8(XA_DASM_PARAMS);
+ int d_div_d16(XA_DASM_PARAMS);
+ int d_divu_d(XA_DASM_PARAMS);
+ int d_div_d(XA_DASM_PARAMS);
+ int d_cjne_d8(XA_DASM_PARAMS);
+ int d_cjne_d16(XA_DASM_PARAMS);
+ int d_jz_rel8(XA_DASM_PARAMS);
+ int d_jnz_rel8(XA_DASM_PARAMS);
+ int d_branch(XA_DASM_PARAMS);
+ int d_bkpt(XA_DASM_PARAMS);
+
+ std::unordered_map<offs_t, const char *> m_names;
+};
+
+#endif // MAME_CPU_XA_XADASM_H
diff --git a/src/devices/cpu/xavix2/xavix2.cpp b/src/devices/cpu/xavix2/xavix2.cpp
index 04e94af800e..748f1b848c9 100644
--- a/src/devices/cpu/xavix2/xavix2.cpp
+++ b/src/devices/cpu/xavix2/xavix2.cpp
@@ -136,11 +136,6 @@ uint32_t xavix2_device::execute_max_cycles() const noexcept
return 5;
}
-uint32_t xavix2_device::execute_input_lines() const noexcept
-{
- return 1;
-}
-
u32 xavix2_device::check_interrupt(u32 cpc)
{
if(m_int_line && ((m_hr[4] & F_I) || m_wait)) {
@@ -196,7 +191,7 @@ void xavix2_device::execute_run()
if(!m_ei_count)
m_pc = check_interrupt(m_pc);
}
- if(machine().debug_flags & DEBUG_FLAG_ENABLED)
+ if(debugger_enabled())
debugger_instruction_hook(m_pc);
u32 opcode = m_program_cache.read_byte(m_pc) << 24;
diff --git a/src/devices/cpu/xavix2/xavix2.h b/src/devices/cpu/xavix2/xavix2.h
index 30e9ec5faea..459a6180fdd 100644
--- a/src/devices/cpu/xavix2/xavix2.h
+++ b/src/devices/cpu/xavix2/xavix2.h
@@ -27,11 +27,10 @@ protected:
static const u8 bpo[8];
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual uint32_t execute_min_cycles() const noexcept override;
virtual uint32_t execute_max_cycles() const noexcept override;
- virtual uint32_t execute_input_lines() const noexcept override;
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
virtual space_config_vector memory_space_config() const override;
diff --git a/src/devices/cpu/xtensa/xtensa.h b/src/devices/cpu/xtensa/xtensa.h
index fc0e1d46c26..332ae4e77cd 100644
--- a/src/devices/cpu/xtensa/xtensa.h
+++ b/src/devices/cpu/xtensa/xtensa.h
@@ -41,8 +41,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual void execute_run() override;
@@ -135,7 +135,7 @@ private:
void set_callinc(u8 val);
u8 get_callinc();
- void ext_regs(address_map &map);
+ void ext_regs(address_map &map) ATTR_COLD;
bool handle_bz(u32 inst);
void handle_retw();
diff --git a/src/devices/cpu/z180/hd647180x.h b/src/devices/cpu/z180/hd647180x.h
index ca122201a5e..0916a240b7c 100644
--- a/src/devices/cpu/z180/hd647180x.h
+++ b/src/devices/cpu/z180/hd647180x.h
@@ -43,8 +43,8 @@ public:
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// z180_device overrides
virtual uint8_t z180_internal_port_read(uint8_t port) override;
@@ -52,7 +52,7 @@ protected:
private:
// internal memory map
- void internal_map(address_map &map);
+ void internal_map(address_map &map) ATTR_COLD;
// port callbacks
devcb_read8::array<7> m_port_input_cb;
diff --git a/src/devices/cpu/z180/z180.cpp b/src/devices/cpu/z180/z180.cpp
index 3097427bd69..7d8f0c4c4f3 100644
--- a/src/devices/cpu/z180/z180.cpp
+++ b/src/devices/cpu/z180/z180.cpp
@@ -2,7 +2,6 @@
// copyright-holders:Juergen Buchmueller
/*****************************************************************************
*
- * z180.c
* Portable Z180 emulator V0.3
*
*****************************************************************************/
@@ -13,8 +12,8 @@
- HALT processing is not yet perfect. The manual states that
during HALT, all dma and internal i/o incl. timers continue to
work. Currently, only timers are implemented. Ideally, the
- burn_cycles routine would go away and halt processing be
- implemented in cpu_execute.
+ (currently unused) burn_cycles routine would go away and halt
+ processing be implemented in execute_run.
- Documentation for RXS/CTS1 pin is contradictory.
@@ -67,7 +66,7 @@ Package: P = 64-Pin Plastic SDIP
Environmental Flow: C = Plastic Standard
-Example from Ms.Pac-Man/Galaga - 20 year Reunion hardware (see src/mame/drivers/20pacgal.c):
+Example from Ms.Pac-Man/Galaga - 20 year Reunion hardware (see src/mame/namco/20pacgal.cpp):
CPU is Z8S18020VSC = Z180, 20MHz, 68-Pin PLCC, 0C to +70C, Plastic Standard
@@ -1919,7 +1918,7 @@ again:
if ((m_dstat & Z180_DSTAT_DE0) == Z180_DSTAT_DE0 &&
(m_dmode & Z180_DMODE_MMOD) == Z180_DMODE_MMOD)
{
- debugger_instruction_hook(_PCD);
+ debugger_wait_hook();
/* FIXME z180_dma0 should be handled in handle_io_timers */
curcycles = z180_dma0(m_icount);
@@ -1935,18 +1934,21 @@ again:
handle_io_timers(curcycles);
m_after_EI = 0;
- _PPC = _PCD;
- debugger_instruction_hook(_PCD);
-
if (!m_HALT)
{
+ _PPC = _PCD;
+ debugger_instruction_hook(_PCD);
+
m_R++;
m_extra_cycles = 0;
curcycles = exec_op(ROP());
curcycles += m_extra_cycles;
}
else
+ {
+ debugger_wait_hook();
curcycles = 3;
+ }
m_icount -= curcycles;
@@ -1993,18 +1995,21 @@ again:
handle_io_timers(curcycles);
m_after_EI = 0;
- _PPC = _PCD;
- debugger_instruction_hook(_PCD);
-
if (!m_HALT)
{
+ _PPC = _PCD;
+ debugger_instruction_hook(_PCD);
+
m_R++;
m_extra_cycles = 0;
curcycles = exec_op(ROP());
curcycles += m_extra_cycles;
}
else
+ {
+ debugger_wait_hook();
curcycles = 3;
+ }
m_icount -= curcycles;
handle_io_timers(curcycles);
@@ -2015,7 +2020,7 @@ again:
/****************************************************************************
* Burn 'cycles' T-states. Adjust R register for the lost time
****************************************************************************/
-void z180_device::execute_burn(int32_t cycles)
+void z180_device::burn_cycles(int32_t cycles)
{
int extra_cycles = memory_wait_states();
diff --git a/src/devices/cpu/z180/z180.h b/src/devices/cpu/z180/z180.h
index 69b1b979d69..d55c32efe0c 100644
--- a/src/devices/cpu/z180/z180.h
+++ b/src/devices/cpu/z180/z180.h
@@ -135,20 +135,18 @@ protected:
z180_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, bool extended_io, address_map_constructor internal_map);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// device_execute_interface implementation
virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
virtual uint32_t execute_max_cycles() const noexcept override { return 16; }
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
- virtual uint32_t execute_input_lines() const noexcept override { return 5; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
- virtual void execute_burn(int32_t cycles) override;
virtual void execute_set_input(int inputnum, int state) override;
// device_memory_interface implementation
@@ -165,6 +163,7 @@ protected:
virtual uint8_t z180_internal_port_read(uint8_t port);
virtual void z180_internal_port_write(uint8_t port, uint8_t data);
+ [[maybe_unused]] void burn_cycles(int32_t cycles);
address_space_config m_program_config;
address_space_config m_io_config;
@@ -1834,10 +1833,10 @@ protected:
z8s180_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_clock_changed() override;
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
// device_execute_interface implementation
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return BIT(m_cmr, 7) ? (clocks * 2) : BIT(m_ccr, 7) ? clocks : (clocks + 2 - 1) / 2; }
diff --git a/src/devices/cpu/z180/z180asci.cpp b/src/devices/cpu/z180/z180asci.cpp
index d7ce1ce9ba1..298afe55932 100644
--- a/src/devices/cpu/z180/z180asci.cpp
+++ b/src/devices/cpu/z180/z180asci.cpp
@@ -463,31 +463,31 @@ void z180asci_channel_base::transmit_edge()
void z180asci_channel_base::update_received()
{
uint8_t rx_error = 0;
- int stop_bits = (m_asci_cntla & Z180_CNTLA_MODE_STOPB) ? 2 : 1;
+ int data_bits = (m_asci_cntla & Z180_CNTLA_MODE_DATA) ? 8 : 7;
if (m_rsr == 0) // Break detect
{
m_asci_ext |= Z180_ASEXT_BRK_DET;
}
- uint8_t stop_val = (m_asci_cntla & Z180_CNTLA_MODE_STOPB) ? 3: 1;
- if ((m_rsr & stop_val) != stop_val)
+ if (m_rxa == 0)
rx_error |= Z180_STAT_FE;
if (m_asci_cntlb & Z180_CNTLB_MP)
{
- m_asci_cntla |= ((m_rsr >> stop_bits) & 1) ? Z180_CNTLA_MPBR_EFR : 0;
+ m_asci_cntla |= ((m_rsr >> data_bits) & 1) ? Z180_CNTLA_MPBR_EFR : 0;
}
else if (m_asci_cntla & Z180_CNTLA_MODE_PARITY)
{
uint8_t parity = 0;
- for (int i = 0; i < ((m_asci_cntla & Z180_CNTLA_MODE_DATA) ? 8 : 7); i++)
+ for (int i = 0; i < data_bits; i++)
parity ^= BIT(m_rsr, i);
if (m_asci_cntlb & Z180_CNTLB_PEO) parity ^= 1; // odd parity
- if (((m_rsr >> stop_bits) & 1) != parity)
+ if (((m_rsr >> data_bits) & 1) != parity)
rx_error |= Z180_STAT_PE;
}
// Skip only if MPE mode active and MPB is 0
if (!((m_asci_cntla & Z180_CNTLA_MPE) && ((m_asci_cntla & Z180_CNTLA_MPBR_EFR) == 0)))
{
+ LOG("%s: %X received%s%s\n", machine().time().to_string(), m_rsr, (rx_error & Z180_STAT_FE) ? " (framing error)" : "", (rx_error & Z180_STAT_PE) ? " (bad parity)" : "");
set_fifo_data(m_rsr, rx_error);
}
}
diff --git a/src/devices/cpu/z180/z180asci.h b/src/devices/cpu/z180/z180asci.h
index b99eec339ee..4dcd74112b7 100644
--- a/src/devices/cpu/z180/z180asci.h
+++ b/src/devices/cpu/z180/z180asci.h
@@ -53,8 +53,8 @@ protected:
z180asci_channel_base(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const int id, const bool ext);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_clock_changed() override;
void transmit_edge();
@@ -144,7 +144,7 @@ protected:
z180asci_channel_0(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const bool ext);
// device_t implementation
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
//**************************************************************************
@@ -164,7 +164,7 @@ protected:
z180asci_channel_1(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const bool ext);
// device_t implementation
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
};
//**************************************************************************
diff --git a/src/devices/cpu/z180/z180csio.h b/src/devices/cpu/z180/z180csio.h
index 3cc1c53393f..8a73eab8877 100644
--- a/src/devices/cpu/z180/z180csio.h
+++ b/src/devices/cpu/z180/z180csio.h
@@ -37,9 +37,9 @@ public:
protected:
// device_t implementation
- virtual void device_resolve_objects() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_resolve_objects() override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
void clock_edge(u8 cks);
diff --git a/src/devices/cpu/z180/z180dasm.cpp b/src/devices/cpu/z180/z180dasm.cpp
index 393f9a51946..835c620770d 100644
--- a/src/devices/cpu/z180/z180dasm.cpp
+++ b/src/devices/cpu/z180/z180dasm.cpp
@@ -2,7 +2,6 @@
// copyright-holders:Juergen Buchmueller
/*****************************************************************************
*
- * z180dasm.c
* Portable Z8x180 disassembler
*
*****************************************************************************/
diff --git a/src/devices/cpu/z180/z180dasm.h b/src/devices/cpu/z180/z180dasm.h
index a13c7d92fe1..1d6de1bbf5d 100644
--- a/src/devices/cpu/z180/z180dasm.h
+++ b/src/devices/cpu/z180/z180dasm.h
@@ -2,7 +2,6 @@
// copyright-holders:Juergen Buchmueller
/*****************************************************************************
*
- * z180dasm.c
* Portable Z8x180 disassembler
*
*****************************************************************************/
diff --git a/src/devices/cpu/z180/z180dd.hxx b/src/devices/cpu/z180/z180dd.hxx
index d73c9720cf3..2bee2a99d62 100644
--- a/src/devices/cpu/z180/z180dd.hxx
+++ b/src/devices/cpu/z180/z180dd.hxx
@@ -1,6 +1,7 @@
// license:BSD-3-Clause
// copyright-holders:Juergen Buchmueller
-OP(illegal,1) {
+OP(illegal,1)
+{
logerror("Z180 '%s' ill. opcode $%02x $%02x\n",
tag(), m_copcodes.read_byte((_PCD-1)&0xffff), m_copcodes.read_byte(_PCD));
}
diff --git a/src/devices/cpu/z180/z180op.hxx b/src/devices/cpu/z180/z180op.hxx
index bdecb65966e..824f95dccaa 100644
--- a/src/devices/cpu/z180/z180op.hxx
+++ b/src/devices/cpu/z180/z180op.hxx
@@ -33,7 +33,7 @@ OP(op,17) { RLA; } /* RLA
OP(op,18) { JR(); } /* JR o */
OP(op,19) { ADD16(HL,DE); } /* ADD HL,DE */
OP(op,1a) { _A = RM(_DE); } /* LD A,(DE) */
-OP(op,1b) { _DE--; ; } /* DEC DE */
+OP(op,1b) { _DE--; } /* DEC DE */
OP(op,1c) { _E = INC(_E); } /* INC E */
OP(op,1d) { _E = DEC(_E); } /* DEC E */
OP(op,1e) { _E = ARG(); } /* LD E,n */
diff --git a/src/devices/cpu/z8/z8.cpp b/src/devices/cpu/z8/z8.cpp
index 4f93091f802..adf82562f04 100644
--- a/src/devices/cpu/z8/z8.cpp
+++ b/src/devices/cpu/z8/z8.cpp
@@ -29,6 +29,7 @@
#define LOG_TIMER (1U << 1)
#define LOG_RECEIVE (1U << 2)
#define LOG_TRANSMIT (1U << 3)
+#define LOG_IRQ (1U << 4)
#define VERBOSE 0
#include "logmacro.h"
@@ -1331,7 +1332,10 @@ void z8_device::request_interrupt(int irq)
assert(irq >= 0 && irq < 6);
if (m_irq_initialized)
+ {
m_irq |= 1 << irq;
+ LOGMASKED(LOG_IRQ, "%s: IRQ%d requested\n", machine().time().to_string(), irq);
+ }
}
void z8_device::take_interrupt(int irq)
diff --git a/src/devices/cpu/z8/z8.h b/src/devices/cpu/z8/z8.h
index c092cfd4066..c50b40b140b 100644
--- a/src/devices/cpu/z8/z8.h
+++ b/src/devices/cpu/z8/z8.h
@@ -42,13 +42,12 @@ protected:
z8_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, uint32_t rom_size, bool preprogrammed);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 6; }
virtual uint32_t execute_max_cycles() const noexcept override { return 27; }
- virtual uint32_t execute_input_lines() const noexcept override { return 4; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return true; }
virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 2); }
@@ -65,9 +64,9 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
- void program_map(address_map &map);
- void preprogrammed_map(address_map &map);
- void register_map(address_map &map);
+ void program_map(address_map &map) ATTR_COLD;
+ void preprogrammed_map(address_map &map) ATTR_COLD;
+ void register_map(address_map &map) ATTR_COLD;
private:
address_space_config m_program_config;
diff --git a/src/devices/cpu/z8/z8ops.hxx b/src/devices/cpu/z8/z8ops.hxx
index 22934842657..e49b54ac8e5 100644
--- a/src/devices/cpu/z8/z8ops.hxx
+++ b/src/devices/cpu/z8/z8ops.hxx
@@ -777,7 +777,7 @@ INSTRUCTION( swap_IR1 ) { mode_IR1(swap) }
INSTRUCTION( ccf ) { m_flags ^= Z8_FLAGS_C; }
INSTRUCTION( di ) { m_imr &= ~Z8_IMR_ENABLE; }
-INSTRUCTION( ei ) { m_imr |= Z8_IMR_ENABLE; m_irq_initialized = true; }
+INSTRUCTION( ei ) { m_imr |= Z8_IMR_ENABLE; if (!m_irq_initialized) LOGMASKED(LOG_IRQ, "(%04X): IRQs first enabled\n", m_ppc); m_irq_initialized = true; }
INSTRUCTION( nop ) { /* no operation */ }
INSTRUCTION( rcf ) { set_flag_c(0); }
INSTRUCTION( scf ) { set_flag_c(1); }
diff --git a/src/devices/cpu/z80/kc82.cpp b/src/devices/cpu/z80/kc82.cpp
index 6dc575139de..fd09910429c 100644
--- a/src/devices/cpu/z80/kc82.cpp
+++ b/src/devices/cpu/z80/kc82.cpp
@@ -228,7 +228,7 @@ void kc82_device::data_write(u16 addr, u8 value)
u8 kc82_device::opcode_read()
{
- u32 pc = m_pc.w.l + m_mmu_base[m_pc.b.h >> 2];
+ u32 pc = m_pc.w + m_mmu_base[m_pc.b.h >> 2];
// no refresh
return m_opcodes.read_byte(pc);
}
@@ -240,6 +240,6 @@ u8 kc82_device::opcode_read()
u8 kc82_device::arg_read()
{
- u32 pc = m_pc.w.l + m_mmu_base[m_pc.b.h >> 2];
+ u32 pc = m_pc.w + m_mmu_base[m_pc.b.h >> 2];
return m_args.read_byte(pc);
}
diff --git a/src/devices/cpu/z80/kc82.h b/src/devices/cpu/z80/kc82.h
index 3c7f05cd70d..a1a30b07ac6 100644
--- a/src/devices/cpu/z80/kc82.h
+++ b/src/devices/cpu/z80/kc82.h
@@ -32,8 +32,8 @@ protected:
kc82_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, address_map_constructor mem_map, address_map_constructor io_map);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
// device_memory_interface overrides
diff --git a/src/devices/cpu/z80/kl5c80a12.h b/src/devices/cpu/z80/kl5c80a12.h
index 2d3884ad409..1a6340c6045 100644
--- a/src/devices/cpu/z80/kl5c80a12.h
+++ b/src/devices/cpu/z80/kl5c80a12.h
@@ -51,10 +51,10 @@ public:
protected:
// device_t implementation
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
@@ -73,8 +73,8 @@ private:
void portb_update_output(unsigned n);
// internal address maps
- void internal_ram(address_map &map);
- void internal_io(address_map &map);
+ void internal_ram(address_map &map) ATTR_COLD;
+ void internal_io(address_map &map) ATTR_COLD;
// subdevice finders
required_device<kp69_device> m_kp69;
diff --git a/src/devices/cpu/z80/kl5c80a16.h b/src/devices/cpu/z80/kl5c80a16.h
index a7cd2178396..10ba3df08f4 100644
--- a/src/devices/cpu/z80/kl5c80a16.h
+++ b/src/devices/cpu/z80/kl5c80a16.h
@@ -48,10 +48,10 @@ public:
protected:
// device_t implementation
- virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
virtual void device_config_complete() override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) / 2; }
@@ -63,7 +63,7 @@ private:
void port_w(offs_t offset, u8 data);
// internal address map
- void internal_io(address_map &map);
+ void internal_io(address_map &map) ATTR_COLD;
// subdevice finders
required_device<kp69_device> m_kp69;
diff --git a/src/devices/cpu/z80/kp63.h b/src/devices/cpu/z80/kp63.h
index 93e2779d668..7d58017b6fa 100644
--- a/src/devices/cpu/z80/kp63.h
+++ b/src/devices/cpu/z80/kp63.h
@@ -35,8 +35,8 @@ protected:
kp63_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 num_counters, u8 mode_mask);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
static const char *const s_count_modes[4];
diff --git a/src/devices/cpu/z80/kp64.h b/src/devices/cpu/z80/kp64.h
index d8a76dc91b6..53391c6dbc0 100644
--- a/src/devices/cpu/z80/kp64.h
+++ b/src/devices/cpu/z80/kp64.h
@@ -37,8 +37,8 @@ public:
protected:
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
// timer callbacks
diff --git a/src/devices/cpu/z80/kp69.h b/src/devices/cpu/z80/kp69.h
index 31bfbd71fea..ad93c6a86af 100644
--- a/src/devices/cpu/z80/kp69.h
+++ b/src/devices/cpu/z80/kp69.h
@@ -44,8 +44,8 @@ protected:
kp69_base_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_z80daisy_interface implementation
virtual int z80daisy_irq_state() override;
@@ -91,8 +91,8 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
private:
bool m_ivr_written;
diff --git a/src/devices/cpu/z80/ky80.h b/src/devices/cpu/z80/ky80.h
index fce065a9c8f..2f5cef749f2 100644
--- a/src/devices/cpu/z80/ky80.h
+++ b/src/devices/cpu/z80/ky80.h
@@ -31,8 +31,8 @@ protected:
private:
// internal address maps
- void internal_ram(address_map &map);
- void internal_io(address_map &map);
+ void internal_ram(address_map &map) ATTR_COLD;
+ void internal_io(address_map &map) ATTR_COLD;
};
diff --git a/src/devices/cpu/z80/lz8420m.h b/src/devices/cpu/z80/lz8420m.h
index afa653c340d..50941b8a2b2 100644
--- a/src/devices/cpu/z80/lz8420m.h
+++ b/src/devices/cpu/z80/lz8420m.h
@@ -33,9 +33,9 @@ public:
protected:
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
};
diff --git a/src/devices/cpu/z80/nsc800.cpp b/src/devices/cpu/z80/nsc800.cpp
new file mode 100644
index 00000000000..e2c0bfd0087
--- /dev/null
+++ b/src/devices/cpu/z80/nsc800.cpp
@@ -0,0 +1,87 @@
+// license:BSD-3-Clause
+// copyright-holders:Juergen Buchmueller
+/*
+
+ National Semiconductor NSC800
+
+*/
+
+#include "emu.h"
+#include "nsc800.h"
+
+#include "z80.inc"
+
+#define LOG_INT (1U << 1) // z80.lst
+
+//#define VERBOSE (LOG_INT)
+#include "logmacro.h"
+
+
+// device type definition
+DEFINE_DEVICE_TYPE(NSC800, nsc800_device, "nsc800", "National Semiconductor NSC800")
+
+nsc800_device::nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : z80_device(mconfig, NSC800, tag, owner, clock)
+{
+}
+
+
+//-------------------------------------------------
+// initialization
+//-------------------------------------------------
+
+void nsc800_device::device_start()
+{
+ z80_device::device_start();
+
+ save_item(NAME(m_nsc800_irq_state));
+}
+
+void nsc800_device::device_reset()
+{
+ z80_device::device_reset();
+ memset(m_nsc800_irq_state, 0, sizeof(m_nsc800_irq_state));
+}
+
+
+//-------------------------------------------------
+// execute
+//-------------------------------------------------
+void nsc800_device::execute_run()
+{
+ #include "cpu/z80/nsc800.hxx"
+}
+
+void nsc800_device::execute_set_input(int inputnum, int state)
+{
+ bool update_irq_attention = false;
+ switch (inputnum)
+ {
+ case NSC800_RSTA:
+ update_irq_attention = true;
+ m_nsc800_irq_state[0] = state;
+ break;
+
+ case NSC800_RSTB:
+ update_irq_attention = true;
+ m_nsc800_irq_state[1] = state;
+ break;
+
+ case NSC800_RSTC:
+ update_irq_attention = true;
+ m_nsc800_irq_state[2] = state;
+ break;
+
+ default:
+ z80_device::execute_set_input(inputnum, state);
+ break;
+ }
+
+ if (update_irq_attention)
+ {
+ if (m_nsc800_irq_state[0] != CLEAR_LINE || m_nsc800_irq_state[1] != CLEAR_LINE || m_nsc800_irq_state[2] != CLEAR_LINE)
+ set_service_attention<SA_NSC800_IRQ_ON, 1>();
+ else
+ set_service_attention<SA_NSC800_IRQ_ON, 0>();
+ }
+}
diff --git a/src/devices/cpu/z80/nsc800.h b/src/devices/cpu/z80/nsc800.h
new file mode 100644
index 00000000000..aa05d2adf51
--- /dev/null
+++ b/src/devices/cpu/z80/nsc800.h
@@ -0,0 +1,38 @@
+// license:BSD-3-Clause
+// copyright-holders:Juergen Buchmueller
+#ifndef MAME_CPU_Z80_NSC800_H
+#define MAME_CPU_Z80_NSC800_H
+
+#pragma once
+
+#include "z80.h"
+
+enum
+{
+ NSC800_RSTA = Z80_INPUT_LINE_MAX,
+ NSC800_RSTB,
+ NSC800_RSTC
+};
+
+
+class nsc800_device : public z80_device
+{
+public:
+ nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+protected:
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface implementation
+ virtual void execute_run() override;
+ virtual void execute_set_input(int inputnum, int state) override;
+
+ u8 m_nsc800_irq_state[3]; // state of NSC800 restart interrupts A, B, C
+};
+
+DECLARE_DEVICE_TYPE(NSC800, nsc800_device)
+
+
+#endif // MAME_CPU_Z80_NSC800_H
diff --git a/src/devices/cpu/z80/r800.cpp b/src/devices/cpu/z80/r800.cpp
index 1748f8eca39..419bbacef05 100644
--- a/src/devices/cpu/z80/r800.cpp
+++ b/src/devices/cpu/z80/r800.cpp
@@ -1,16 +1,30 @@
// license:BSD-3-Clause
-// copyright-holders:AJR
+// copyright-holders:AJR,Wilbert Pol
/***************************************************************************
ASCII R800 CPU
- TODO: this uses a sped-up Z80 core with added multiply instructions
- ('mulub', 'muluw').
+TODO:
+- Internal configuration registers.
+- External 24 bits address bus accessible through 9 memory mappers.
+- DMA channels.
+- Interrupt levels.
+- Bits 3 and 5 of the flag register behave differently from the z80.
+- Page break penalties.
+- Refresh delays.
***************************************************************************/
#include "emu.h"
#include "r800.h"
+#include "r800dasm.h"
+
+#include "z80.inc"
+
+#define LOG_INT (1U << 1) // z80.lst
+
+//#define VERBOSE (LOG_INT)
+#include "logmacro.h"
//**************************************************************************
@@ -32,4 +46,53 @@ DEFINE_DEVICE_TYPE(R800, r800_device, "r800", "ASCII R800")
r800_device::r800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: z80_device(mconfig, R800, tag, owner, clock)
{
+ z80_set_m1_cycles(1);
+ z80_set_memrq_cycles(1);
+ z80_set_iorq_cycles(1);
+}
+
+std::unique_ptr<util::disasm_interface> r800_device::create_disassembler()
+{
+ return std::make_unique<r800_disassembler>();
+}
+
+void r800_device::device_validity_check(validity_checker &valid) const
+{
+ cpu_device::device_validity_check(valid);
+}
+
+
+/***************************************************************
+ * SLL r8
+ ***************************************************************/
+u8 r800_device::r800_sll(u8 value)
+{
+ const u8 c = (value & 0x80) ? CF : 0;
+ const u8 res = u8(value << 1);
+ set_f(SZP[res] | c);
+ return res;
+}
+
+void r800_device::mulub(u8 value)
+{
+ const u16 res = A * value;
+ HL = res;
+ const u8 c = (H) ? CF : 0;
+ const u8 z = (res) ? 0 : ZF;
+ set_f((F & (HF|NF)) | z | c);
+}
+
+void r800_device::muluw(u16 value)
+{
+ const u32 res = HL * value;
+ DE = res >> 16;
+ HL = res & 0xffff;
+ const u8 c = (DE) ? CF : 0;
+ const u8 z = (res) ? 0 : ZF;
+ set_f((F & (HF|NF)) | z | c);
+}
+
+void r800_device::execute_run()
+{
+ #include "cpu/z80/r800.hxx"
}
diff --git a/src/devices/cpu/z80/r800.h b/src/devices/cpu/z80/r800.h
index bad16f8cfdd..967ed29417d 100644
--- a/src/devices/cpu/z80/r800.h
+++ b/src/devices/cpu/z80/r800.h
@@ -1,5 +1,5 @@
// license:BSD-3-Clause
-// copyright-holders:AJR
+// copyright-holders:AJR,Wilbert Pol
/***************************************************************************
ASCII R800 CPU
@@ -24,10 +24,23 @@ public:
// device type constructor
r800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+ static constexpr feature_type imperfect_features() { return feature::TIMING; }
+
protected:
+ // device_t implementation
+ virtual void device_validity_check(validity_checker &valid) const override;
+
// device_execute_interface overrides
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return (cycles * 4); }
+ virtual void execute_run() override;
+
+ // device_disasm_interface implementation
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+ u8 r800_sll(u8 value);
+ void mulub(u8 value);
+ void muluw(u16 value);
};
// device type declaration
diff --git a/src/devices/cpu/z80/r800dasm.cpp b/src/devices/cpu/z80/r800dasm.cpp
new file mode 100644
index 00000000000..462feb07dad
--- /dev/null
+++ b/src/devices/cpu/z80/r800dasm.cpp
@@ -0,0 +1,607 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*****************************************************************************
+ *
+ * r800dasm.cpp
+ * Disassembler for ASCII R800 based on portable Z80 disassembler.
+ *
+ *****************************************************************************/
+
+#include "emu.h"
+#include "r800dasm.h"
+
+enum r800_disassembler::e_mnemonics : unsigned
+{
+ zADD ,zADDC ,zADJ ,zAND ,zBC ,zBIT ,zBM ,zBNC ,
+ zBNZ ,zBP ,zBPE ,zBPO ,zBR ,zBRK ,zBZ ,zCALL ,
+ zCLR ,zCMP ,zCMPM ,zDB ,zDBNZ ,zDEC ,zDI ,zEI ,
+ zHALT ,zIM ,zIN ,zINC ,zINM ,zLD ,zMOVE ,zMOVEM,
+ zMULUB,zMULUW,zNEG ,zNOP ,zNOT ,zNOTC ,zOR ,zOUT ,
+ zOUTM ,zPOP ,zPUSH ,zRET ,zRETI ,zRETN ,zROL ,zROL4 ,
+ zROLA ,zROLC ,zROLCA,zROR ,zROR4 ,zRORA ,zRORC ,zRORCA,
+ zSET ,zSETC ,zSHL ,zSHORT,zSHR ,zSHRA ,zSLA ,zSUB ,
+ zSUBC ,zXCH ,zXCHX ,zXOR
+};
+
+struct r800_disassembler::r800dasm
+{
+ e_mnemonics mnemonic;
+ const char *arguments;
+};
+
+static const char *const s_mnemonic[] =
+{
+ "add" ,"addc" ,"adj" ,"and" ,"bc" ,"bit" ,"bm" ,"bnc" ,
+ "bnz" ,"bp" ,"bpe" ,"bpo" ,"br" ,"brk" ,"bz" ,"call" ,
+ "clr" ,"cmp" ,"cmpm" ,"db" ,"dbnz" ,"dec" ,"di" ,"ei" ,
+ "halt" ,"im" ,"in" ,"inc" ,"inm" ,"ld" ,"move" ,"movem",
+ "mulub","muluw","neg" ,"nop" ,"not" ,"notc" ,"or" ,"out" ,
+ "outm" ,"pop" ,"push" ,"ret" ,"reti" ,"retn" ,"rol" ,"rol4" ,
+ "rola" ,"rolc" ,"rolca","ror" ,"ror4" ,"rora" ,"rorc" ,"rorca",
+ "set" ,"setc" ,"shl" ,"short","shr" ,"shra" ,"sla" ,"sub" ,
+ "subc" ,"xch" ,"xchx" ,"xor"
+};
+
+const u32 r800_disassembler::s_flags[] =
+{
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ 0 ,0 ,0 ,0 ,0 ,STEP_OVER,0 ,STEP_OVER,
+ 0 ,0 ,STEP_COND,0 ,STEP_COND,0 ,0 ,0 ,
+ STEP_OVER,0 ,0 ,0 ,STEP_COND,0 ,0 ,STEP_COND,
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ STEP_COND,0 ,0 ,STEP_OUT ,STEP_OUT ,STEP_OUT ,0 ,0 ,
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ 0 ,0 ,0 ,0
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_xx_cb[256] =
+{
+ // 00 - 0F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zROLC,"Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zRORC,"Y"}, {zDB,"?"},
+ // 10 - 1F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zROL,"Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zROR,"Y"}, {zDB,"?"},
+ // 20 - 2F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSLA,"Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSHRA,"Y"}, {zDB,"?"},
+ // 30 - 3F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSHL,"Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSHR,"Y"}, {zDB,"?"},
+ // 40 - 4F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"0,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"1,Y"}, {zDB,"?"},
+ // 50 - 5F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"2,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"3,Y"}, {zDB,"?"},
+ // 60 - 6F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"4,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"5,Y"}, {zDB,"?"},
+ // 70 - 6F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"6,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zBIT,"7,Y"}, {zDB,"?"},
+ // 80 - 8F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"0,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"1,Y"}, {zDB,"?"},
+ // 90 - 9F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"2,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"3,Y"}, {zDB,"?"},
+ // A0 - AF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"4,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"5,Y"}, {zDB,"?"},
+ // B0 - BF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"6,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zCLR,"7,Y"}, {zDB,"?"},
+ // C0 - CF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"0,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"1,Y"}, {zDB,"?"},
+ // D0 - DF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"2,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"3,Y"}, {zDB,"?"},
+ // E0 - EF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"4,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"5,Y"}, {zDB,"?"},
+ // F0 - FF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"6,Y"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zSET,"7,Y"}, {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_cb[256] =
+{
+ // 00 - 1F
+ {zROLC,".b"}, {zROLC,".c"}, {zROLC,".d"}, {zROLC,".e"},
+ {zROLC,".h"}, {zROLC,".l"}, {zROLC,"[.hl]"}, {zROLC,".a"},
+ {zRORC,".b"}, {zRORC,".c"}, {zRORC,".d"}, {zRORC,".e"},
+ {zRORC,".h"}, {zRORC,".l"}, {zRORC,"[.hl]"}, {zRORC,".a"},
+ // 10 - 1F
+ {zROL,".b"}, {zROL,".c"}, {zROL,".d"}, {zROL,".e"},
+ {zROL,".h"}, {zROL,".l"}, {zROL,"[.hl]"}, {zROL,".a"},
+ {zROR,".b"}, {zROR,".c"}, {zROR,".d"}, {zROR,".e"},
+ {zROR,".h"}, {zROR,".l"}, {zROR,"[.hl]"}, {zROR,".a"},
+ // 20 - 2F
+ {zSHL,".b"}, {zSHL,".c"}, {zSHL,".d"}, {zSHL,".e"},
+ {zSHL,".h"}, {zSHL,".l"}, {zSHL,"[.hl]"}, {zSHL,".a"},
+ {zSHRA,".b"}, {zSHRA,".c"}, {zSHRA,".d"}, {zSHRA,".e"},
+ {zSHRA,".h"}, {zSHRA,".l"}, {zSHRA,"[.hl]"}, {zSHRA,".a"},
+ // 30 - 3F
+ {zSHL,".b"}, {zSHL,".c"}, {zSHL,".d"}, {zSHL,".e"},
+ {zSHL,".h"}, {zSHL,".l"}, {zSHL,"[.hl]"}, {zSHL,".a"},
+ {zSHR,".b"}, {zSHR,".c"}, {zSHR,".d"}, {zSHR,".e"},
+ {zSHR,".h"}, {zSHR,".l"}, {zSHR,"[.hl]"}, {zSHR,".a"},
+ // 40 - 4F
+ {zBIT,"0,.b"}, {zBIT,"0,.c"}, {zBIT,"0,.d"}, {zBIT,"0,.e"},
+ {zBIT,"0,.h"}, {zBIT,"0,.l"}, {zBIT,"0,[.hl]"}, {zBIT,"0,.a"},
+ {zBIT,"1,.b"}, {zBIT,"1,.c"}, {zBIT,"1,.d"}, {zBIT,"1,.e"},
+ {zBIT,"1,.h"}, {zBIT,"1,.l"}, {zBIT,"1,[.hl]"}, {zBIT,"1,.a"},
+ // 50 - 5F
+ {zBIT,"2,.b"}, {zBIT,"2,.c"}, {zBIT,"2,.d"}, {zBIT,"2,.e"},
+ {zBIT,"2,.h"}, {zBIT,"2,.l"}, {zBIT,"2,[.hl]"}, {zBIT,"2,.a"},
+ {zBIT,"3,.b"}, {zBIT,"3,.c"}, {zBIT,"3,.d"}, {zBIT,"3,.e"},
+ {zBIT,"3,.h"}, {zBIT,"3,.l"}, {zBIT,"3,[.hl]"}, {zBIT,"3,.a"},
+ // 60 - 6F
+ {zBIT,"4,.b"}, {zBIT,"4,.c"}, {zBIT,"4,.d"}, {zBIT,"4,.e"},
+ {zBIT,"4,.h"}, {zBIT,"4,.l"}, {zBIT,"4,[.hl]"}, {zBIT,"4,.a"},
+ {zBIT,"5,.b"}, {zBIT,"5,.c"}, {zBIT,"5,.d"}, {zBIT,"5,.e"},
+ {zBIT,"5,.h"}, {zBIT,"5,.l"}, {zBIT,"5,[.hl]"}, {zBIT,"5,.a"},
+ // 70 - 7F
+ {zBIT,"6,.b"}, {zBIT,"6,.c"}, {zBIT,"6,.d"}, {zBIT,"6,.e"},
+ {zBIT,"6,.h"}, {zBIT,"6,.l"}, {zBIT,"6,[.hl]"}, {zBIT,"6,.a"},
+ {zBIT,"7,.b"}, {zBIT,"7,.c"}, {zBIT,"7,.d"}, {zBIT,"7,.e"},
+ {zBIT,"7,.h"}, {zBIT,"7,.l"}, {zBIT,"7,[.hl]"}, {zBIT,"7,.a"},
+ // 80 - 8F
+ {zCLR,"0,.b"}, {zCLR,"0,.c"}, {zCLR,"0,.d"}, {zCLR,"0,.e"},
+ {zCLR,"0,.h"}, {zCLR,"0,.l"}, {zCLR,"0,[.hl]"}, {zCLR,"0,.a"},
+ {zCLR,"1,.b"}, {zCLR,"1,.c"}, {zCLR,"1,.d"}, {zCLR,"1,.e"},
+ {zCLR,"1,.h"}, {zCLR,"1,.l"}, {zCLR,"1,[.hl]"}, {zCLR,"1,.a"},
+ // 90 - 9F
+ {zCLR,"2,.b"}, {zCLR,"2,.c"}, {zCLR,"2,.d"}, {zCLR,"2,.e"},
+ {zCLR,"2,.h"}, {zCLR,"2,.l"}, {zCLR,"2,[.hl]"}, {zCLR,"2,.a"},
+ {zCLR,"3,.b"}, {zCLR,"3,.c"}, {zCLR,"3,.d"}, {zCLR,"3,.e"},
+ {zCLR,"3,.h"}, {zCLR,"3,.l"}, {zCLR,"3,[.hl]"}, {zCLR,"3,.a"},
+ // A0 - AF
+ {zCLR,"4,.b"}, {zCLR,"4,.c"}, {zCLR,"4,.d"}, {zCLR,"4,.e"},
+ {zCLR,"4,.h"}, {zCLR,"4,.l"}, {zCLR,"4,[.hl]"}, {zCLR,"4,.a"},
+ {zCLR,"5,.b"}, {zCLR,"5,.c"}, {zCLR,"5,.d"}, {zCLR,"5,.e"},
+ {zCLR,"5,.h"}, {zCLR,"5,.l"}, {zCLR,"5,[.hl]"}, {zCLR,"5,.a"},
+ // B0 - BF
+ {zCLR,"6,.b"}, {zCLR,"6,.c"}, {zCLR,"6,.d"}, {zCLR,"6,.e"},
+ {zCLR,"6,.h"}, {zCLR,"6,.l"}, {zCLR,"6,[.hl]"}, {zCLR,"6,.a"},
+ {zCLR,"7,.b"}, {zCLR,"7,.c"}, {zCLR,"7,.d"}, {zCLR,"7,.e"},
+ {zCLR,"7,.h"}, {zCLR,"7,.l"}, {zCLR,"7,[.hl]"}, {zCLR,"7,.a"},
+ // C0 - CF
+ {zSET,"0,.b"}, {zSET,"0,.c"}, {zSET,"0,.d"}, {zSET,"0,.e"},
+ {zSET,"0,.h"}, {zSET,"0,.l"}, {zSET,"0,[.hl]"}, {zSET,"0,.a"},
+ {zSET,"1,.b"}, {zSET,"1,.c"}, {zSET,"1,.d"}, {zSET,"1,.e"},
+ {zSET,"1,.h"}, {zSET,"1,.l"}, {zSET,"1,[.hl]"}, {zSET,"1,.a"},
+ // D0 - DF
+ {zSET,"2,.b"}, {zSET,"2,.c"}, {zSET,"2,.d"}, {zSET,"2,.e"},
+ {zSET,"2,.h"}, {zSET,"2,.l"}, {zSET,"2,[.hl]"}, {zSET,"2,.a"},
+ {zSET,"3,.b"}, {zSET,"3,.c"}, {zSET,"3,.d"}, {zSET,"3,.e"},
+ {zSET,"3,.h"}, {zSET,"3,.l"}, {zSET,"3,[.hl]"}, {zSET,"3,.a"},
+ // E0 - EF
+ {zSET,"4,.b"}, {zSET,"4,.c"}, {zSET,"4,.d"}, {zSET,"4,.e"},
+ {zSET,"4,.h"}, {zSET,"4,.l"}, {zSET,"4,[.hl]"}, {zSET,"4,.a"},
+ {zSET,"5,.b"}, {zSET,"5,.c"}, {zSET,"5,.d"}, {zSET,"5,.e"},
+ {zSET,"5,.h"}, {zSET,"5,.l"}, {zSET,"5,[.hl]"}, {zSET,"5,.a"},
+ // F0 - FF
+ {zSET,"6,.b"}, {zSET,"6,.c"}, {zSET,"6,.d"}, {zSET,"6,.e"},
+ {zSET,"6,.h"}, {zSET,"6,.l"}, {zSET,"6,[.hl]"}, {zSET,"6,.a"},
+ {zSET,"7,.b"}, {zSET,"7,.c"}, {zSET,"7,.d"}, {zSET,"7,.e"},
+ {zSET,"7,.h"}, {zSET,"7,.l"}, {zSET,"7,[.hl]"}, {zSET,"7,.a"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_ed[256] =
+{
+ // 00 - 0F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 10 - 1F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 20 - 2F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 30 - 3F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 40 - 4F
+ {zIN,".b,[.c]"}, {zOUT,"[.c],.b"}, {zSUBC,".hl,.bc"}, {zLD,"(W),.bc"},
+ {zNEG,".a"}, {zRETN,nullptr}, {zIM,"0"}, {zLD,".i,.a"},
+ {zIN,".c,[.c]"}, {zOUT,"[.c],.c"}, {zADDC,".hl,.bc"}, {zLD,".bc,(W)"},
+ {zDB,"?"}, {zRETI,nullptr}, {zDB,"?"}, {zLD,".r,.a"},
+ // 50 - 5F
+ {zIN,".d,[.c]"}, {zOUT,"[.c],.d"}, {zSUBC,".hl,.de"}, {zLD,"(W),.de"},
+ {zDB,"?"}, {zDB,"?"}, {zIM,"1"}, {zLD,".a,.i"},
+ {zIN,".e,[.c]"}, {zOUT,"[.c],.e"}, {zADDC,".hl,.de"}, {zLD,".de,(W)"},
+ {zDB,"?"}, {zDB,"?"}, {zIM,"2"}, {zLD,".a,.r"},
+ // 60 - 6F
+ {zIN,".h,[.c]"}, {zOUT,"[.c],.h"}, {zSUBC,".hl,.hl"}, {zLD,"(W),.hl"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zROR4,"[.hl]"},
+ {zIN,".l,[.c]"}, {zOUT,"[.c],.l"}, {zADDC,".hl,.hl"}, {zLD,".hl,(W)"},
+ {zDB,"?"}, {zRETI,nullptr}, {zIM,"0"}, {zROL4,"[.hl]"},
+ // 70 - 7F
+ {zIN,".f,[.c]"}, {zDB,"?"}, {zSUBC,".hl,.sp"}, {zLD,"(W),.sp"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zIN,".a,[.c]"}, {zOUT,"[.c],.a"}, {zADDC,".hl,.sp"}, {zLD,".sp,(W)"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 80 - 8F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 90 - 9F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // A0 - AF
+ {zMOVE,"[.hl++],[.de++]"}, {zCMP,".a,[.hl++]"}, {zIN,"[.c],[.hl++]"}, {zOUT,"[.c],[.hl++]"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zMOVE,"[.hl--],[.de--]"}, {zCMP,".a,[.hl--]"}, {zIN,"[.c],[.hl--]"}, {zOUT,"[.c],[.hl--]"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // B0 - BF
+ {zMOVEM,"[.hl++],[.de++]"}, {zCMPM,".a,[.hl++]"}, {zINM,"[.c],[.hl++]"}, {zOUTM,"[.c],[.hl++]"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zMOVEM,"[.hl--],[.de--]"}, {zCMPM,".a,[.hl--]"}, {zINM,"[.c],[.hl--]"}, {zOUTM,"[.c],[.hl--]"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // C0 - CF
+ {zDB,"?"}, {zMULUB,".a,.b"}, {zDB,"?"}, {zMULUW,".hl,.bc"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zMULUB,".a,.c"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // D0 - DF
+ {zDB,"?"}, {zMULUB,".a,.d"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zMULUB,".a,.e"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // E0 - EF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // F0 - FF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zMULUW,".hl,.sp"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_xx[256] =
+{
+ // 00 - 0F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zADD,".I,.bc"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 10 - 1F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zADD,".I,.de"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 20 - 2F
+ {zDB,"?"}, {zLD,".I,N"}, {zLD,"(W),.I"}, {zINC,".I"},
+ {zINC,".Ih"}, {zDEC,".Ih"}, {zLD,".Ih,B"}, {zDB,"?"},
+ {zDB,"?"}, {zADD,".I,.I"}, {zLD,".I,(W)"}, {zDEC,".I"},
+ {zINC,".Il"}, {zDEC,".Il"}, {zLD,".Il,B"}, {zDB,"?"},
+ // 30 - 3F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zINC,"X"}, {zDEC,"X"}, {zLD,"X,B"}, {zDB,"?"},
+ {zDB,"?"}, {zADD,".I,.sp"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // 40 - 4F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLD,".b,.Ih"}, {zLD,".b,.Il"}, {zLD,".b,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLD,".c,.Ih"}, {zLD,".c,.Il"}, {zLD,".c,X"}, {zDB,"?"},
+ // 50 - 5F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLD,".d,.Ih"}, {zLD,".d,.Il"}, {zLD,".d,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLD,".e,.Ih"}, {zLD,".e,.Il"}, {zLD,".e,X"}, {zDB,"?"},
+ // 60 - 6F
+ {zLD,".Ih,.b"}, {zLD,".Ih,.c"}, {zLD,".Ih,.d"}, {zLD,".Ih,.e"},
+ {zLD,".Ih,.Ih"}, {zLD,".Ih,.Il"}, {zLD,".h,X"}, {zLD,".Ih,.a"},
+ {zLD,".Il,.b"}, {zLD,".Il,.c"}, {zLD,".Il,.d"}, {zLD,".Il,.e"},
+ {zLD,".Il,.Ih"}, {zLD,".Il,.Il"}, {zLD,".l,X"}, {zLD,".Il,.a"},
+ // 70 - 7F
+ {zLD,"X,.b"}, {zLD,"X,.c"}, {zLD,"X,.d"}, {zLD,"X,.e"},
+ {zLD,"X,.h"}, {zLD,"X,.l"}, {zDB,"?"}, {zLD,"X,.a"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLD,".a,.Ih"}, {zLD,".a,Il"}, {zLD,".a,X"}, {zDB,"?"},
+ // 80 - 8F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zADD,".a,.Ih"}, {zADD,".a,.Il"}, {zADD,".a,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zADDC,".a,.Ih"}, {zADDC,".a,.Il"}, {zADDC,".a,X"}, {zDB,"?"},
+ // 90 - 9F
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zSUB,".a,.Ih"}, {zSUB,".a,.Il"}, {zSUB,".a,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zSUBC,".a,.Ih"}, {zSUBC,".a,.Il"}, {zSUBC,".a,X"}, {zDB,"?"},
+ // A0 - AF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zAND,".a,.Ih"}, {zAND,".a,.Il"}, {zAND,".a,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zXOR,".a,.Ih"}, {zXOR,".a,.Il"}, {zXOR,".a,X"}, {zDB,"?"},
+ // B0 - BF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zOR,".a,.Ih"}, {zOR,".a,.Il"}, {zOR,".a,X"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zCMP,".a,.Ih"}, {zCMP,".a,.Il"}, {zCMP,".a,X"}, {zDB,"?"},
+ // C0 - CF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"cb"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // D0 - DF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // E0 - EF
+ {zDB,"?"}, {zPOP,".I"}, {zDB,"?"}, {zXCH,"[.sp],.I"},
+ {zDB,"?"}, {zPUSH,".I"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zBR,"[.I]"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ // F0 - FF
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zLD,".sp,I"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"}
+};
+
+const r800_disassembler::r800dasm r800_disassembler::mnemonic_main[256] =
+{
+ // 00 - 0F
+ {zNOP,nullptr}, {zLD,".bc,N"}, {zLD,"[.bc],.a"}, {zINC,".bc"},
+ {zINC,".b"}, {zDEC,".b"}, {zLD,".b,B"}, {zROLCA,nullptr},
+ {zXCH,".af,.af'"}, {zADD,".hl,.bc"}, {zLD,".a,[.bc]"}, {zDEC,".bc"},
+ {zINC,".c"}, {zDEC,".c"}, {zLD,".c,B"}, {zRORCA,nullptr},
+ // 10 - 1F
+ {zDBNZ,"O"}, {zLD,".de,N"}, {zLD,"[.de],.a"}, {zINC,".de"},
+ {zINC,".d"}, {zDEC,".d"}, {zLD,".d,B"}, {zROLA,nullptr},
+ {zSHORT,"br O"}, {zADD,".hl,.de"}, {zLD,".a,[.de]"}, {zDEC,".de"},
+ {zINC,".e"}, {zDEC,".e"}, {zLD,".e,B"}, {zRORA,nullptr},
+ // 20 - 2F
+ {zSHORT,"bnz O"}, {zLD,".hl,N"}, {zLD,"(W),.hl"}, {zINC,".hl"},
+ {zINC,".h"}, {zDEC,".h"}, {zLD,".h,B"}, {zADJ,".a"},
+ {zSHORT,"bz O"}, {zADD,".hl,.hl"}, {zLD,".hl,(W)"}, {zDEC,".hl"},
+ {zINC,".l"}, {zDEC,".l"}, {zLD,".l,B"}, {zNOT,".a"},
+ // 30 - 3F
+ {zSHORT,"bnc O"}, {zLD,".sp,N"}, {zLD,"(W),.a"}, {zINC,".sp"},
+ {zINC,"[.hl]"}, {zDEC,"[.hl]"}, {zLD,"[.hl],B"}, {zSETC,nullptr},
+ {zSHORT,"bc O"}, {zADD,".hl,.sp"}, {zLD,".a,(W)"}, {zDEC,".sp"},
+ {zINC,".a"}, {zDEC,".a"}, {zLD,".a,B"}, {zNOTC,nullptr},
+ // 40 - 4F
+ {zLD,".b,.b"}, {zLD,".b,.c"}, {zLD,".b,.d"}, {zLD,".b,.e"},
+ {zLD,".b,.h"}, {zLD,".b,.l"}, {zLD,".b,[.hl]"}, {zLD,".b,.a"},
+ {zLD,".c,.b"}, {zLD,".c,.c"}, {zLD,".c,.d"}, {zLD,".c,.e"},
+ {zLD,".c,.h"}, {zLD,".c,.l"}, {zLD,".c,[.hl]"}, {zLD,".c,.a"},
+ // 50 - 5F
+ {zLD,".d,.b"}, {zLD,".d,.c"}, {zLD,".d,.d"}, {zLD,".d,.e"},
+ {zLD,".d,.h"}, {zLD,".d,.l"}, {zLD,".d,[.hl]"}, {zLD,".d,.a"},
+ {zLD,".e,.b"}, {zLD,".e,.c"}, {zLD,".e,.d"}, {zLD,".e,.e"},
+ {zLD,".e,.h"}, {zLD,".e,.l"}, {zLD,".e,[.hl]"}, {zLD,".e,.a"},
+ // 60 - 6F
+ {zLD,".h,.b"}, {zLD,".h,.c"}, {zLD,".h,.d"}, {zLD,".h,.e"},
+ {zLD,".h,.h"}, {zLD,".h,.l"}, {zLD,".h,[.hl]"}, {zLD,".h,.a"},
+ {zLD,".l,.b"}, {zLD,".l,.c"}, {zLD,".l,.d"}, {zLD,".l,.e"},
+ {zLD,".l,.h"}, {zLD,".l,.l"}, {zLD,".l,[.hl]"}, {zLD,".l,.a"},
+ // 70 - 7F
+ {zLD,"[.hl],.b"}, {zLD,"[.hl],.c"}, {zLD,"[.hl],.d"}, {zLD,"[.hl],.e"},
+ {zLD,"[.hl],.h"}, {zLD,"[.hl],.l"}, {zHALT,nullptr}, {zLD,"[.hl],.a"},
+ {zLD,".a,.b"}, {zLD,".a,.c"}, {zLD,".a,.d"}, {zLD,".a,.e"},
+ {zLD,".a,.h"}, {zLD,".a,.l"}, {zLD,".a,[.hl]"}, {zLD,".a,.a"},
+ // 80 - BF
+ {zADD,".a,.b"}, {zADD,".a,.c"}, {zADD,".a,.d"}, {zADD,".a,.e"},
+ {zADD,".a,.h"}, {zADD,".a,.l"}, {zADD,".a,[.hl]"}, {zADD,".a,.a"},
+ {zADDC,".a,.b"}, {zADDC,".a,.c"}, {zADDC,".a,.d"}, {zADDC,".a,.e"},
+ {zADDC,".a,.h"}, {zADDC,".a,.l"}, {zADDC,".a,[.hl]"}, {zADDC,".a,.a"},
+ // 90 - 9F
+ {zSUB,".a,.b"}, {zSUB,".a,.c"}, {zSUB,".a,.d"}, {zSUB,".a,.e"},
+ {zSUB,".a,.h"}, {zSUB,".a,.l"}, {zSUB,".a,[.hl]"}, {zSUB,".a,.a"},
+ {zSUBC,".a,.b"}, {zSUBC,".a,.c"}, {zSUBC,".a,.d"}, {zSUBC,".a,.e"},
+ {zSUBC,".a,.h"}, {zSUBC,".a,.l"}, {zSUBC,".a,[.hl]"}, {zSUBC,".a,.a"},
+ // A0 - AF
+ {zAND,".a,.b"}, {zAND,".a,.c"}, {zAND,".a,.d"}, {zAND,".a,.e"},
+ {zAND,".a,.h"}, {zAND,".a,.l"}, {zAND,".a,[.hl]"}, {zAND,".a,.a"},
+ {zXOR,".a,.b"}, {zXOR,".a,.c"}, {zXOR,".a,.d"}, {zXOR,".a,.e"},
+ {zXOR,".a,.h"}, {zXOR,".a,.l"}, {zXOR,".a,[.hl]"}, {zXOR,".a,.a"},
+ // B0 - BF
+ {zOR,".a,.b"}, {zOR,".a,.c"}, {zOR,".a,.d"}, {zOR,".a,.e"},
+ {zOR,".a,.h"}, {zOR,".a,.l"}, {zOR,".a,[.hl]"}, {zOR,".a,.a"},
+ {zCMP,".a,.b"}, {zCMP,".a,.c"}, {zCMP,".d"}, {zCMP,".a,.e"},
+ {zCMP,".a,.h"}, {zCMP,".a,.l"}, {zCMP,".a,[.hl]"}, {zCMP,".a,.a"},
+ // C0 - CF
+ {zRET,"nz"}, {zPOP,".bc"}, {zBNZ,"A"}, {zBP,"A"},
+ {zCALL,"nz,A"}, {zPUSH,".bc"}, {zADD,".a,B"}, {zBRK,"V"},
+ {zRET,"z"}, {zRET,nullptr}, {zBZ,"A"}, {zDB,"cb"},
+ {zCALL,"z,A"}, {zCALL,"A"}, {zADDC,".a,B"}, {zBRK,"V"},
+ // D0 - DF
+ {zRET,"nc"}, {zPOP,".de"}, {zBNC,"A"}, {zOUT,"[P],[.a]"},
+ {zCALL,"nc,A"}, {zPUSH,".de"}, {zSUB,".a,B"}, {zBRK,"V"},
+ {zRET,"c"}, {zXCHX,nullptr}, {zBC,"A"}, {zIN,".a,[P]"},
+ {zCALL,"c,A"}, {zDB,"dd"}, {zSUBC,".a,B"}, {zBRK,"V"},
+ // E0 - EF
+ {zRET,"po"}, {zPOP,".hl"}, {zBPO,"A"}, {zXCH,"[.sp],.hl"},
+ {zCALL,"po,A"}, {zPUSH,".hl"}, {zAND,".a,B"}, {zBRK,"V"},
+ {zRET,"pe"}, {zBR,"[.hl]"}, {zBPE,"A"}, {zXCH,".de,.hl"},
+ {zCALL,"pe,A"}, {zDB,"ed"}, {zXOR,".a,B"}, {zBRK,"V"},
+ // F0 - FF
+ {zRET,"p"}, {zPOP,".af"}, {zBP,"A"}, {zDI,nullptr},
+ {zCALL,"p,A"}, {zPUSH,".af"}, {zOR,".a,B"}, {zBRK,"V"},
+ {zRET,"m"}, {zLD,".sp,.hl"}, {zBM,"A"}, {zEI,nullptr},
+ {zCALL,"m,A"}, {zDB,"fd"}, {zCMP,".a,B"}, {zBRK,"V"}
+};
+
+char r800_disassembler::sign(s8 offset)
+{
+ return (offset < 0) ? '-' : '+';
+}
+
+u32 r800_disassembler::offs(s8 offset)
+{
+ if (offset < 0)
+ return -offset;
+ return offset;
+}
+
+r800_disassembler::r800_disassembler()
+{
+}
+
+u32 r800_disassembler::opcode_alignment() const
+{
+ return 1;
+}
+
+offs_t r800_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params)
+{
+ s8 offset = 0;
+
+ offs_t pos = pc;
+ std::string ixy = "oops!!";
+
+ const r800dasm *d = nullptr;
+ u8 op = opcodes.r8(pos++);
+ switch (op)
+ {
+ case 0xcb:
+ op = opcodes.r8(pos++);
+ d = &mnemonic_cb[op];
+ break;
+ case 0xed:
+ d = &mnemonic_ed[opcodes.r8(pos++)];
+ if (d->mnemonic == zDB)
+ pos--;
+ break;
+ case 0xdd:
+ case 0xfd:
+ {
+ ixy = (op == 0xdd) ? "ix" : "iy";
+ u8 op1 = opcodes.r8(pos++);
+ if (op1 == 0xcb)
+ {
+ offset = params.r8(pos++);
+ op1 = params.r8(pos++);
+ d = &mnemonic_xx_cb[op1];
+ }
+ else
+ {
+ d = &mnemonic_xx[op1];
+ if (d->mnemonic == zDB)
+ pos--;
+ }
+ break;
+ }
+ default:
+ d = &mnemonic_main[op];
+ break;
+ }
+
+ uint32_t flags = s_flags[d->mnemonic];
+ if (d->arguments)
+ {
+ util::stream_format(stream, "%-5s ", s_mnemonic[d->mnemonic]);
+ const char *src = d->arguments;
+ while (*src)
+ {
+ switch (*src)
+ {
+ case '?': // illegal opcode
+ util::stream_format(stream, "$%02x", op);
+ break;
+ case 'A':
+ util::stream_format(stream, "$%04X", params.r16(pos));
+ pos += 2;
+ if (src != d->arguments)
+ flags |= STEP_COND;
+ break;
+ case 'B': // Byte op arg
+ util::stream_format(stream, "$%02X", params.r8(pos++));
+ break;
+ case 'N': // Immediate 16 bit
+ util::stream_format(stream, "$%04X", params.r16(pos));
+ pos += 2;
+ break;
+ case 'O': // Offset relative to PC
+ util::stream_format(stream, "$%04X", (pc + s8(params.r8(pos++)) + 2) & 0xffff);
+ if (src != d->arguments)
+ flags |= STEP_COND;
+ break;
+ case 'P': // Port number
+ util::stream_format(stream, "$%02X", params.r8(pos++));
+ break;
+ case 'V': // Break vector
+ util::stream_format(stream, "$%02X", op & 0x38);
+ break;
+ case 'W': // Memory address word
+ util::stream_format(stream, "$%04X", params.r16(pos));
+ pos += 2;
+ break;
+ case 'X':
+ offset = params.r8(pos++);
+ [[fallthrough]];
+ case 'Y':
+ util::stream_format(stream,"[.%s%c$%02x]", ixy, sign(offset), offs(offset));
+ break;
+ case 'I':
+ util::stream_format(stream, "%s", ixy);
+ break;
+ default:
+ stream << *src;
+ break;
+ }
+ src++;
+ }
+ if (d->mnemonic == zRET)
+ flags |= STEP_COND;
+ }
+ else
+ {
+ util::stream_format(stream, "%s", s_mnemonic[d->mnemonic]);
+ }
+
+ return (pos - pc) | flags | SUPPORTED;
+}
diff --git a/src/devices/cpu/z80/r800dasm.h b/src/devices/cpu/z80/r800dasm.h
new file mode 100644
index 00000000000..c08b6aa90de
--- /dev/null
+++ b/src/devices/cpu/z80/r800dasm.h
@@ -0,0 +1,39 @@
+// license:BSD-3-Clause
+// copyright-holders:Wilbert Pol
+/*****************************************************************************
+ *
+ * r800dasm.h
+ * Disassembler for ASCII R800 based on portable Z80 disassembler.
+ *
+ *****************************************************************************/
+
+#ifndef MAME_CPU_Z80_R800DASM_H
+#define MAME_CPU_Z80_R800DASM_H
+
+#pragma once
+
+class r800_disassembler : public util::disasm_interface
+{
+public:
+ r800_disassembler();
+ virtual ~r800_disassembler() = default;
+
+ virtual u32 opcode_alignment() const override;
+ virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
+
+protected:
+ enum e_mnemonics : unsigned;
+ struct r800dasm;
+
+ static const u32 s_flags[];
+ static const r800dasm mnemonic_xx_cb[256];
+ static const r800dasm mnemonic_cb[256];
+ static const r800dasm mnemonic_ed[256];
+ static const r800dasm mnemonic_xx[256];
+ static const r800dasm mnemonic_main[256];
+
+ static inline char sign(s8 offset);
+ static inline u32 offs(s8 offset);
+};
+
+#endif
diff --git a/src/devices/cpu/z80/t6a84.cpp b/src/devices/cpu/z80/t6a84.cpp
new file mode 100644
index 00000000000..a3d2e5d1fb0
--- /dev/null
+++ b/src/devices/cpu/z80/t6a84.cpp
@@ -0,0 +1,237 @@
+// license:BSD-3-Clause
+// copyright-holders:QUFB
+/***************************************************************************
+
+ Toshiba T6A84, TLCS-Z80 ASSP Family
+
+***************************************************************************/
+
+#include "emu.h"
+#include "t6a84.h"
+
+#include "z80.inc"
+
+#define LOG_INT (1U << 1) // z80.lst
+#define LOG_UNDOC (1U << 2)
+#define LOG_PAGE_R (1U << 3)
+#define LOG_PAGE_W (1U << 4)
+#define LOG_MEM (1U << 5)
+
+//#define VERBOSE (LOG_PAGE_R | LOG_PAGE_W | LOG_MEM)
+#include "logmacro.h"
+
+
+DEFINE_DEVICE_TYPE(T6A84, t6a84_device, "t6a84", "Toshiba T6A84")
+
+void t6a84_device::internal_io_map(address_map &map) const
+{
+ map.global_mask(0xff);
+ map(0xfc, 0xfc).rw(FUNC(t6a84_device::stack_page_r), FUNC(t6a84_device::stack_page_w));
+ map(0xfd, 0xfd).rw(FUNC(t6a84_device::data_page_r), FUNC(t6a84_device::data_page_w));
+ map(0xfe, 0xfe).rw(FUNC(t6a84_device::code_page_r), FUNC(t6a84_device::code_page_w));
+ map(0xff, 0xff).rw(FUNC(t6a84_device::vector_page_r), FUNC(t6a84_device::vector_page_w));
+}
+
+t6a84_device::t6a84_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ t6a84_device(mconfig, T6A84, tag, owner, clock, address_map_constructor(FUNC(t6a84_device::internal_io_map), this))
+{ }
+
+t6a84_device::t6a84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor io_map)
+ : z80_device(mconfig, type, tag, owner, clock)
+ , m_program_space_config("program", ENDIANNESS_LITTLE, 8, 20, 0, 16, 0)
+ , m_data_space_config("data", ENDIANNESS_LITTLE, 8, 20, 0, 16, 0)
+ , m_stack_space_config("stack", ENDIANNESS_LITTLE, 8, 20, 0, 16, 0)
+ , m_io_space_config("io", ENDIANNESS_LITTLE, 8, 16, 0, io_map)
+ , m_code_page(0)
+ , m_delay_code_page(0)
+ , m_is_delay_code_page_set(false)
+ , m_prev_code_page(0)
+ , m_data_page(8)
+ , m_stack_page(8)
+ , m_vector_page(0)
+{
+}
+
+// Interrupt vectors need to be fetched and executed from their corresponding page.
+// For simplicity, we switch pages via callbacks, instead of using a dedicated address space.
+// TODO: Find a better way to solve this, at least these hacks are isolated to t6a84.cpp for now.
+void t6a84_device::paged_irqfetch()
+{
+ LOGMASKED(LOG_PAGE_W, "IRQ FETCH %02x => %02x\n", m_code_page, m_vector_page);
+ m_prev_code_page = m_code_page;
+ m_code_page = m_vector_page;
+}
+
+void t6a84_device::paged_reti()
+{
+ LOGMASKED(LOG_PAGE_W, "IRQ RET %02x => %02x\n", m_code_page, m_prev_code_page);
+ m_code_page = m_prev_code_page;
+}
+
+void t6a84_device::paged_jump()
+{
+ /*
+ When setting a code page, it only becomes effective after jumping to a far address in that page.
+ Any instructions fetched and executed before that jump still use the previous code page.
+ This can be seen in Sega Ferie Kitten, when test program at page 7 gets mapped, as we are still
+ executing on page 0, but we expect to start executing that program when jumping to RST0:
+
+ ROM_00::1ea9 3e 07 LD A,0x7
+ ROM_00::1eab d3 fe OUT (DAT_io_00fe),A
+ ROM_00::1ead c3 00 00 JP RST0
+ */
+ if (!machine().side_effects_disabled() && m_is_delay_code_page_set) {
+ LOGMASKED(LOG_PAGE_W, "BRANCH %02x => %02x\n", m_code_page, m_prev_code_page);
+ m_code_page = m_delay_code_page;
+ m_is_delay_code_page_set = false;
+ }
+}
+
+void t6a84_device::execute_run()
+{
+ #include "cpu/z80/t6a84.hxx"
+}
+
+void t6a84_device::device_start()
+{
+ z80_device::device_start();
+
+ space(AS_PROGRAM).cache(m_args);
+ space(AS_DATA).specific(m_data);
+ space(AS_STACK).specific(m_stack);
+
+ save_item(NAME(m_code_page));
+ save_item(NAME(m_delay_code_page));
+ save_item(NAME(m_is_delay_code_page_set));
+ save_item(NAME(m_prev_code_page));
+ save_item(NAME(m_data_page));
+ save_item(NAME(m_stack_page));
+ save_item(NAME(m_vector_page));
+}
+
+void t6a84_device::device_reset()
+{
+ m_code_page = 0;
+ m_delay_code_page = 0;
+ m_is_delay_code_page_set = false;
+ m_prev_code_page = 0;
+ m_data_page = 8;
+ m_stack_page = 8;
+ m_vector_page = 0;
+
+ z80_device::device_reset();
+}
+
+device_memory_interface::space_config_vector t6a84_device::memory_space_config() const
+{
+ auto r = z80_device::memory_space_config();
+ r.emplace_back(AS_DATA, &m_data_space_config);
+ r.emplace_back(AS_STACK, &m_stack_space_config);
+ for (auto it = r.begin(); it != r.end(); ++it) {
+ if ((*it).first == AS_IO) {
+ (*it).second = &m_io_space_config;
+ } else if ((*it).first == AS_PROGRAM) {
+ (*it).second = &m_program_space_config;
+ }
+ }
+
+ return r;
+}
+
+bool t6a84_device::memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space)
+{
+ if (spacenum == AS_PROGRAM) {
+ address = code_address(address);
+ } else if (spacenum == AS_DATA) {
+ address = data_address(address);
+ } else if (spacenum == AS_STACK) {
+ address = stack_address(address);
+ }
+
+ target_space = &space(spacenum);
+
+ return true;
+}
+
+uint32_t t6a84_device::code_address(uint16_t address)
+{
+ const uint32_t page_address = m_code_page << 16 | address;
+ LOGMASKED(LOG_MEM, "CODE @ %06x => %06x\n", address, page_address);
+
+ return page_address;
+}
+
+uint32_t t6a84_device::data_address(uint16_t address)
+{
+ const uint32_t page_address = m_data_page << 16 | address;
+ LOGMASKED(LOG_MEM, "DATA @ %06x => %06x\n", address, page_address);
+
+ return page_address;
+}
+
+uint32_t t6a84_device::stack_address(uint16_t address)
+{
+ const uint32_t page_address = m_stack_page << 16 | address;
+ LOGMASKED(LOG_MEM, "STACK @ %06x => %06x\n", address, page_address);
+
+ return page_address;
+}
+
+uint8_t t6a84_device::stack_read(uint16_t addr)
+{
+ return m_stack.read_byte(addr);
+}
+
+void t6a84_device::stack_write(uint16_t addr, uint8_t value)
+{
+ m_stack.write_byte(addr, value);
+}
+
+uint8_t t6a84_device::data_page_r()
+{
+ LOGMASKED(LOG_PAGE_R, "data_page_r: %02x @ %06x\n", m_data_page, pc());
+ return m_data_page;
+}
+
+uint8_t t6a84_device::stack_page_r()
+{
+ LOGMASKED(LOG_PAGE_R, "stack_page_r: %02x @ %06x\n", m_stack_page, pc());
+ return m_stack_page;
+}
+
+uint8_t t6a84_device::code_page_r()
+{
+ LOGMASKED(LOG_PAGE_R, "code_page_r: %02x @ %06x\n", m_code_page, pc());
+ return m_code_page;
+}
+
+uint8_t t6a84_device::vector_page_r()
+{
+ LOGMASKED(LOG_PAGE_R, "vector_page_r: %02x @ %06x\n", m_vector_page, pc());
+ return m_vector_page;
+}
+
+void t6a84_device::data_page_w(uint8_t page)
+{
+ LOGMASKED(LOG_PAGE_W, "data_page_w: %02x @ %06x\n", page, pc());
+ m_data_page = page;
+}
+
+void t6a84_device::stack_page_w(uint8_t page)
+{
+ LOGMASKED(LOG_PAGE_W, "stack_page_w: %02x @ %06x\n", page, pc());
+ m_stack_page = page;
+}
+
+void t6a84_device::code_page_w(uint8_t page)
+{
+ LOGMASKED(LOG_PAGE_W, "code_page_w: %02x @ %06x\n", page, pc());
+ m_delay_code_page = page;
+ m_is_delay_code_page_set = true;
+}
+
+void t6a84_device::vector_page_w(uint8_t page)
+{
+ LOGMASKED(LOG_PAGE_W, "vector_page_w: %02x @ %06x\n", page, pc());
+ m_vector_page = page;
+}
diff --git a/src/devices/cpu/z80/t6a84.h b/src/devices/cpu/z80/t6a84.h
new file mode 100644
index 00000000000..730b799bcc2
--- /dev/null
+++ b/src/devices/cpu/z80/t6a84.h
@@ -0,0 +1,96 @@
+// license:BSD-3-Clause
+// copyright-holders:QUFB
+/***************************************************************************
+
+ Toshiba T6A84, TLCS-Z80 ASSP Family
+
+ Unknown specs. Disassembled code suggests that this processor uses
+ separate code and data address spaces. Mapped pages on each space are
+ configured by writing to I/O ports. Values 0 to 7 map the corresponding
+ 0x10000 sized page from ROM offset 0 to 0x7ffff, while value 8 seems to
+ map full contents of RAM.
+
+ Pinout: https://patents.google.com/patent/CN2280961Y/en
+
+***************************************************************************/
+
+#ifndef MAME_CPU_Z80_T6A84_H
+#define MAME_CPU_Z80_T6A84_H
+
+#pragma once
+
+#include "z80.h"
+
+
+/***************************************************************************
+ TYPE DEFINITIONS
+***************************************************************************/
+
+class t6a84_device : public z80_device
+{
+public:
+ enum address_spaces : uint8_t
+ {
+ AS_STACK = AS_OPCODES + 1
+ };
+
+ t6a84_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ uint32_t code_address(uint16_t address);
+ uint32_t data_address(uint16_t address);
+ uint32_t stack_address(uint16_t address);
+
+protected:
+ t6a84_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor io_map);
+
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ // device_execute_interface implementation
+ virtual void execute_run() override;
+
+ // z80 overrides
+ virtual uint8_t stack_read(uint16_t addr) override;
+ virtual void stack_write(uint16_t addr, uint8_t value) override;
+
+ uint8_t code_page_r();
+ uint8_t data_page_r();
+ uint8_t stack_page_r();
+ uint8_t vector_page_r();
+ void code_page_w(uint8_t page);
+ void data_page_w(uint8_t page);
+ void stack_page_w(uint8_t page);
+ void vector_page_w(uint8_t page);
+
+ void paged_irqfetch();
+ void paged_reti();
+ void paged_jump();
+
+ void internal_io_map(address_map &map) const;
+ virtual space_config_vector memory_space_config() const override;
+ virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
+
+ const address_space_config m_program_space_config;
+ const address_space_config m_data_space_config;
+ const address_space_config m_stack_space_config;
+ const address_space_config m_io_space_config;
+
+ memory_access<16, 0, 0, ENDIANNESS_LITTLE>::specific m_stack;
+
+private:
+ uint8_t m_code_page;
+ uint8_t m_delay_code_page;
+ bool m_is_delay_code_page_set;
+ uint8_t m_prev_code_page;
+ uint8_t m_data_page;
+ uint8_t m_stack_page;
+ uint8_t m_vector_page;
+};
+
+
+// device type definition
+DECLARE_DEVICE_TYPE(T6A84, t6a84_device)
+
+
+#endif // MAME_CPU_Z80_T6A84_H
diff --git a/src/devices/cpu/z80/tmpz84c011.h b/src/devices/cpu/z80/tmpz84c011.h
index 8349905d5b9..a6909e0d697 100644
--- a/src/devices/cpu/z80/tmpz84c011.h
+++ b/src/devices/cpu/z80/tmpz84c011.h
@@ -79,12 +79,12 @@ public:
void tmpz84c011_dir_pd_w(uint8_t data) { m_pio_dir[3] = data; }
void tmpz84c011_dir_pe_w(uint8_t data) { m_pio_dir[4] = data; }
- void tmpz84c011_internal_io_map(address_map &map);
+ void tmpz84c011_internal_io_map(address_map &map) ATTR_COLD;
protected:
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
const address_space_config m_io_space_config;
diff --git a/src/devices/cpu/z80/tmpz84c015.h b/src/devices/cpu/z80/tmpz84c015.h
index 449b9cd2725..03c688519bd 100644
--- a/src/devices/cpu/z80/tmpz84c015.h
+++ b/src/devices/cpu/z80/tmpz84c015.h
@@ -116,9 +116,9 @@ protected:
tmpz84c015_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor io_map);
// device-level overrides
- virtual void device_add_mconfig(machine_config &config) override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_add_mconfig(machine_config &config) override ATTR_COLD;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
virtual void device_post_load() override;
const address_space_config m_io_space_config;
diff --git a/src/devices/cpu/z80/z80.cpp b/src/devices/cpu/z80/z80.cpp
index 84baa3e3904..9d2c5958dd7 100644
--- a/src/devices/cpu/z80/z80.cpp
+++ b/src/devices/cpu/z80/z80.cpp
@@ -1,297 +1,56 @@
// license:BSD-3-Clause
// copyright-holders:Juergen Buchmueller
/*****************************************************************************
- *
- * z80.cpp
- * Portable Z80 emulator V3.9
- *
- * TODO:
- * - Interrupt mode 0 should be able to execute arbitrary opcodes
- * - If LD A,I or LD A,R is interrupted, P/V flag gets reset, even if IFF2
- * was set before this instruction (implemented, but not enabled: we need
- * document Z80 types first, see below)
- * - WAIT only stalls between instructions now, it should stall immediately.
- * - Ideally, the tiny differences between Z80 types should be supported,
- * currently known differences:
- * - LD A,I/R P/V flag reset glitch is fixed on CMOS Z80
- * - OUT (C),0 outputs 0 on NMOS Z80, $FF on CMOS Z80
- * - SCF/CCF X/Y flags is ((flags | A) & 0x28) on SGS/SHARP/ZiLOG NMOS Z80,
- * (flags & A & 0x28).
- * However, recent findings say that SCF/CCF X/Y results depend on whether
- * or not the previous instruction touched the flag register.
- * This Z80 emulator assumes a ZiLOG NMOS model.
- *
- * Changes in 0.243:
- * Foundation for M cycles emulation. Currently we preserve cc_* tables with total timings.
- * execute_run() behavior (simplified) ...
- * Changes in 3.9:
- * - Fixed cycle counts for LD IYL/IXL/IYH/IXH,n [Marshmellow]
- * - Fixed X/Y flags in CCF/SCF/BIT, ZEXALL is happy now [hap]
- * - Simplified DAA, renamed MEMPTR (3.8) to WZ, added TODO [hap]
- * - Fixed IM2 interrupt cycles [eke]
- * Changes in 3.8 [Miodrag Milanovic]:
- * - Added MEMPTR register (according to informations provided
- * by Vladimir Kladov
- * - BIT n,(HL) now return valid values due to use of MEMPTR
- * - Fixed BIT 6,(XY+o) undocumented instructions
- * Changes in 3.7 [Aaron Giles]:
- * - Changed NMI handling. NMIs are now latched in set_irq_state
- * but are not taken there. Instead they are taken at the start of the
- * execute loop.
- * - Changed IRQ handling. IRQ state is set in set_irq_state but not taken
- * except during the inner execute loop.
- * - Removed x86 assembly hacks and obsolete timing loop catchers.
- * Changes in 3.6:
- * - Got rid of the code that would inexactly emulate a Z80, i.e. removed
- * all the #if Z80_EXACT #else branches.
- * - Removed leading underscores from local register name shortcuts as
- * this violates the C99 standard.
- * - Renamed the registers inside the Z80 context to lower case to avoid
- * ambiguities (shortcuts would have had the same names as the fields
- * of the structure).
- * Changes in 3.5:
- * - Implemented OTIR, INIR, etc. without look-up table for PF flag.
- * [Ramsoft, Sean Young]
- * Changes in 3.4:
- * - Removed Z80-MSX specific code as it's not needed any more.
- * - Implemented DAA without look-up table [Ramsoft, Sean Young]
- * Changes in 3.3:
- * - Fixed undocumented flags XF & YF in the non-asm versions of CP,
- * and all the 16 bit arithmetic instructions. [Sean Young]
- * Changes in 3.2:
- * - Fixed undocumented flags XF & YF of RRCA, and CF and HF of
- * INI/IND/OUTI/OUTD/INIR/INDR/OTIR/OTDR [Sean Young]
- * Changes in 3.1:
- * - removed the REPEAT_AT_ONCE execution of LDIR/CPIR etc. opcodes
- * for readabilities sake and because the implementation was buggy
- * (and i was not able to find the difference)
- * Changes in 3.0:
- * - 'finished' switch to dynamically overrideable cycle count tables
- * Changes in 2.9:
- * - added methods to access and override the cycle count tables
- * - fixed handling and timing of multiple DD/FD prefixed opcodes
- * Changes in 2.8:
- * - OUTI/OUTD/OTIR/OTDR also pre-decrement the B register now.
- * This was wrong because of a bug fix on the wrong side
- * (astrocade sound driver).
- * Changes in 2.7:
- * - removed z80_vm specific code, it's not needed (and never was).
- * Changes in 2.6:
- * - BUSY_LOOP_HACKS needed to call change_pc() earlier, before
- * checking the opcodes at the new address, because otherwise they
- * might access the old (wrong or even nullptr) banked memory region.
- * Thanks to Sean Young for finding this nasty bug.
- * Changes in 2.5:
- * - Burning cycles always adjusts the ICount by a multiple of 4.
- * - In REPEAT_AT_ONCE cases the r register wasn't incremented twice
- * per repetition as it should have been. Those repeated opcodes
- * could also underflow the ICount.
- * - Simplified TIME_LOOP_HACKS for BC and added two more for DE + HL
- * timing loops. i think those hacks weren't endian safe before too.
- * Changes in 2.4:
- * - z80_reset zaps the entire context, sets IX and IY to 0xffff(!) and
- * sets the Z flag. With these changes the Tehkan World Cup driver
- * _seems_ to work again.
- * Changes in 2.3:
- * - External termination of the execution loop calls z80_burn() and
- * z80_vm_burn() to burn an amount of cycles (r adjustment)
- * - Shortcuts which burn CPU cycles (BUSY_LOOP_HACKS and TIME_LOOP_HACKS)
- * now also adjust the r register depending on the skipped opcodes.
- * Changes in 2.2:
- * - Fixed bugs in CPL, SCF and CCF instructions flag handling.
- * - Changed variable ea and arg16() function to u32; this
- * produces slightly more efficient code.
- * - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E
- * are changed to calls to the X6/XE opcodes to reduce object size.
- * They're hardly ever used so this should not yield a speed penalty.
- * New in 2.0:
- * - Optional more exact Z80 emulation (#define Z80_EXACT 1) according
- * to a detailed description by Sean Young which can be found at:
- * http://www.msxnet.org/tech/z80-documented.pdf
- *****************************************************************************/
+
+ ZiLOG Z80 emulator
+
+TODO:
+- Interrupt mode 0 should be able to execute arbitrary opcodes
+- If LD A,I or LD A,R is interrupted, P/V flag gets reset, even if IFF2
+ was set before this instruction (implemented, but not enabled: we need
+ document Z80 types first, see below)
+- Ideally, the tiny differences between Z80 types should be supported,
+ currently known differences:
+ - LD A,I/R P/V flag reset glitch is fixed on CMOS Z80
+ - OUT (C),0 outputs 0 on NMOS Z80, $FF on CMOS Z80
+ - SCF/CCF X/Y flags is ((flags | A) & 0x28) on SGS/SHARP/ZiLOG NMOS Z80,
+ (flags & A & 0x28).
+ However, recent findings say that SCF/CCF X/Y results depend on whether
+ or not the previous instruction touched the flag register.
+ This Z80 emulator assumes a ZiLOG NMOS model.
+
+*****************************************************************************/
#include "emu.h"
#include "z80.h"
#include "z80dasm.h"
-#define LOG_UNDOC (1U << 1)
-#define LOG_INT (1U << 2)
-#define LOG_TIME (1U << 3)
-
-#define VERBOSE ( LOG_UNDOC /*| LOG_INT*/ )
-#include "logmacro.h"
-
-#define LOGUNDOC(...) LOGMASKED(LOG_UNDOC, __VA_ARGS__)
-#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__)
+#include "z80.inc"
+#define LOG_INT (1U << 1) // z80.lst
+#define LOG_UNDOC (1U << 2)
-/* On an NMOS Z80, if LD A,I or LD A,R is interrupted, P/V flag gets reset,
- even if IFF2 was set before this instruction. This issue was fixed on
- the CMOS Z80, so until knowing (most) Z80 types on hardware, it's disabled */
-#define HAS_LDAIR_QUIRK 0
-
-
-/****************************************************************************
- * The Z80 registers. halt is set to 1 when the CPU is halted, the refresh
- * register is calculated as follows: refresh = (r & 127) | (r2 & 128)
- ****************************************************************************/
-#define CF 0x01
-#define NF 0x02
-#define PF 0x04
-#define VF PF
-#define XF 0x08
-#define HF 0x10
-#define YF 0x20
-#define ZF 0x40
-#define SF 0x80
-
-#define INT_IRQ 0x01
-#define NMI_IRQ 0x02
-
-#define PRVPC m_prvpc.d // previous program counter
-
-#define PCD m_pc.d
-#define PC m_pc.w.l
-
-#define SPD m_sp.d
-#define SP m_sp.w.l
-
-#define AFD m_af.d
-#define AF m_af.w.l
-#define A m_af.b.h
-#define F m_af.b.l
-#define Q m_q
-
-#define BCD m_bc.d
-#define BC m_bc.w.l
-#define B m_bc.b.h
-#define C m_bc.b.l
-
-#define DED m_de.d
-#define DE m_de.w.l
-#define D m_de.b.h
-#define E m_de.b.l
-
-#define HLD m_hl.d
-#define HL m_hl.w.l
-#define H m_hl.b.h
-#define L m_hl.b.l
-
-#define IXD m_ix.d
-#define IX m_ix.w.l
-#define HX m_ix.b.h
-#define LX m_ix.b.l
-
-#define IYD m_iy.d
-#define IY m_iy.w.l
-#define HY m_iy.b.h
-#define LY m_iy.b.l
-
-#define WZ m_wz.w.l
-#define WZ_H m_wz.b.h
-#define WZ_L m_wz.b.l
-
-
-static bool tables_initialised = false;
-static u8 SZ[256]; // zero and sign flags
-static u8 SZ_BIT[256]; // zero, sign and parity/overflow (=zero) flags for BIT opcode
-static u8 SZP[256]; // zero, sign and parity flags
-static u8 SZHV_inc[256]; // zero, sign, half carry and overflow flags INC r8
-static u8 SZHV_dec[256]; // zero, sign, half carry and overflow flags DEC r8
-
-static u8 SZHVC_add[2*256*256];
-static u8 SZHVC_sub[2*256*256];
+#define VERBOSE (LOG_UNDOC)
+#include "logmacro.h"
-/***************************************************************
- * define an opcode function
- ***************************************************************/
-#define OP(prefix,opcode) inline void z80_device::prefix##_##opcode()
+bool z80_device::tables_initialised = false;
+u8 z80_device::SZ[] = {}; // zero and sign flags
+u8 z80_device::SZ_BIT[] = {}; // zero, sign and parity/overflow (=zero) flags for BIT opcode
+u8 z80_device::SZP[] = {}; // zero, sign and parity flags
+u8 z80_device::SZHV_inc[] = {}; // zero, sign, half carry and overflow flags INC r8
+u8 z80_device::SZHV_dec[] = {}; // zero, sign, half carry and overflow flags DEC r8
-/***************************************************************
- * adjust cycle count by n T-states
- ***************************************************************/
-#define T(icount) execute_cycles(icount)
-
-#define EXEC(prefix,opcode) do { \
- unsigned op = opcode; \
- switch(op) \
- { \
- case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \
- case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \
- case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \
- case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \
- case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \
- case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \
- case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \
- case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \
- case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \
- case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \
- case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \
- case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \
- case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \
- case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \
- case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \
- case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \
- case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \
- case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \
- case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \
- case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \
- case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \
- case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \
- case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \
- case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \
- case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \
- case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \
- case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \
- case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \
- case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \
- case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \
- case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \
- case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \
- case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \
- case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \
- case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \
- case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \
- case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \
- case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \
- case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \
- case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \
- case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \
- case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \
- case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \
- case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \
- case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \
- case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \
- case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \
- case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \
- case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \
- case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \
- case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \
- case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \
- case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \
- case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \
- case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \
- case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \
- case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \
- case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \
- case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \
- case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \
- case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \
- case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \
- case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \
- case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \
- } \
-} while (0)
/***************************************************************
* Enter halt state; write 1 to callback on first execution
***************************************************************/
-inline void z80_device::halt()
+void z80_device::halt()
{
if (!m_halt)
{
m_halt = 1;
+ set_service_attention<SA_HALT, 1>();
m_halt_cb(1);
}
}
@@ -299,100 +58,30 @@ inline void z80_device::halt()
/***************************************************************
* Leave halt state; write 0 to callback
***************************************************************/
-inline void z80_device::leave_halt()
+void z80_device::leave_halt()
{
if (m_halt)
{
m_halt = 0;
+ set_service_attention<SA_HALT, 0>();
m_halt_cb(0);
}
}
/***************************************************************
- * Input a byte from given I/O port
- ***************************************************************/
-inline u8 z80_device::in(u16 port)
-{
- u8 res = m_io.read_byte(port);
- T(m_iorq_cycles);
- return res;
-}
-
-/***************************************************************
- * Output a byte to given I/O port
- ***************************************************************/
-inline void z80_device::out(u16 port, u8 value)
-{
- m_io.write_byte(port, value);
- T(m_iorq_cycles);
-}
-
-/***************************************************************
* Read a byte from given memory location
***************************************************************/
-inline u8 z80_device::data_read(u16 addr)
-{
- return m_data.read_byte(translate_memory_address(addr));
-}
-
-u8 z80_device::rm(u16 addr)
-{
- u8 res = data_read(addr);
- T(m_memrq_cycles);
- return res;
-}
-
-u8 z80_device::rm_reg(u16 addr)
-{
- u8 res = rm(addr);
- nomreq_addr(addr, 1);
- return res;
-}
-
-/***************************************************************
- * Read a word from given memory location
- ***************************************************************/
-inline void z80_device::rm16(u16 addr, PAIR &r)
+u8 z80_device::data_read(u16 addr)
{
- r.b.l = data_read(addr);
- T(m_memrq_cycles);
- r.b.h = data_read(addr + 1);
- T(m_memrq_cycles);
+ return m_data.read_interruptible(addr);
}
/***************************************************************
* Write a byte to given memory location
***************************************************************/
-inline void z80_device::data_write(u16 addr, u8 value)
-{
- m_data.write_byte(translate_memory_address((u32)addr), value);
-}
-
-inline void z80_device::wm(u16 addr, u8 value)
-{
- data_write(addr, value);
- T(m_memrq_cycles);
-}
-
-/***************************************************************
- * Write a word to given memory location
- ***************************************************************/
-inline void z80_device::wm16(u16 addr, PAIR &r)
+void z80_device::data_write(u16 addr, u8 value)
{
- wm(addr, r.b.l);
- wm(addr + 1, r.b.h);
-}
-
-/***************************************************************
- * Write a word to (SP)
- * in: TDAT
- ***************************************************************/
-inline void z80_device::wm16_sp(PAIR &r)
-{
- SP--;
- wm(SPD, r.b.h);
- SP--;
- wm(SPD, r.b.l);
+ m_data.write_interruptible(addr, value);
}
/***************************************************************
@@ -400,23 +89,9 @@ inline void z80_device::wm16_sp(PAIR &r)
* reading opcodes. In case of system with memory mapped I/O,
* this function can be used to greatly speed up emulation
***************************************************************/
-inline u8 z80_device::opcode_read()
+u8 z80_device::opcode_read()
{
- return m_opcodes.read_byte(translate_memory_address(PCD));
-}
-
-u8 z80_device::rop()
-{
- u8 res = opcode_read();
- T(m_m1_cycles - 2);
- m_refresh_cb((m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f), 0x00, 0xff);
- T(2);
- PC++;
- m_r++;
- Q = m_qtemp;
- m_qtemp = YF | XF;
-
- return res;
+ return m_opcodes.read_byte(PC);
}
/****************************************************************
@@ -426,251 +101,33 @@ u8 z80_device::rop()
* opcodes and opcode arguments
* out: TDAT8
***************************************************************/
-inline u8 z80_device::arg_read()
-{
- return m_args.read_byte(translate_memory_address(PCD));
-}
-
-u8 z80_device::arg()
-{
- u8 res = arg_read();
- T(m_memrq_cycles);
- PC++;
-
- return res;
-}
-
-u16 z80_device::arg16()
-{
- u8 const res = arg();
-
- return (u16(arg()) << 8) | res;
-}
-
-/***************************************************************
- * Calculate the effective address EA of an opcode using
- * IX+offset resp. IY+offset addressing.
- ***************************************************************/
-inline void z80_device::eax()
-{
- m_ea = (u32)(u16)(IX + (s8)arg());
- WZ = m_ea;
-}
-
-inline void z80_device::eay()
+u8 z80_device::arg_read()
{
- m_ea = (u32)(u16)(IY + (s8)arg());
- WZ = m_ea;
-}
-
-/***************************************************************
- * POP
- ***************************************************************/
-inline void z80_device::pop(PAIR &r)
-{
- rm16(SPD, r);
- SP += 2;
-}
-
-/***************************************************************
- * PUSH
- ***************************************************************/
-inline void z80_device::push(PAIR &r)
-{
- nomreq_ir(1);
- wm16_sp(r);
-}
-
-/***************************************************************
- * JP
- ***************************************************************/
-inline void z80_device::jp(void)
-{
- PCD = arg16();
- WZ = PCD;
-}
-
-/***************************************************************
- * JP_COND
- ***************************************************************/
-inline void z80_device::jp_cond(bool cond)
-{
- if (cond)
- {
- PCD = arg16();
- WZ = PCD;
- }
- else
- WZ = arg16(); // implicit do PC += 2
-}
-
-/***************************************************************
- * JR
- ***************************************************************/
-inline void z80_device::jr()
-{
- s8 a = (s8)arg(); // arg() also increments PC
- nomreq_addr(PCD - 1, 5);
- PC += a; // so don't do PC += arg()
- WZ = PC;
-}
-
-/***************************************************************
- * JR_COND
- ***************************************************************/
-inline void z80_device::jr_cond(bool cond, u8 opcode)
-{
- if (cond)
- {
- jr();
- }
- else
- {
- arg();
- // nomreq_addr(PCD, 3);
- // PC++;
- }
-}
-
-/***************************************************************
- * CALL
- ***************************************************************/
-inline void z80_device::call()
-{
- m_ea = arg16();
- nomreq_addr(PCD - 1, 1);
- WZ = m_ea;
- wm16_sp(m_pc);
- PCD = m_ea;
-}
-
-/***************************************************************
- * CALL_COND
- ***************************************************************/
-inline void z80_device::call_cond(bool cond, u8 opcode)
-{
- if (cond)
- {
- m_ea = arg16();
- nomreq_addr(PCD - 1, 1);
- WZ = m_ea;
- wm16_sp(m_pc);
- PCD = m_ea;
- }
- else
- WZ = arg16(); // implicit call PC+=2;
-}
-
-/***************************************************************
- * RET_COND
- ***************************************************************/
-inline void z80_device::ret_cond(bool cond, u8 opcode)
-{
- nomreq_ir(1);
- if (cond)
- {
- pop(m_pc);
- WZ = PC;
- }
-}
-
-/***************************************************************
- * RETN
- ***************************************************************/
-inline void z80_device::retn()
-{
- LOGINT("RETN m_iff1:%d m_iff2:%d\n", m_iff1, m_iff2);
- pop(m_pc);
- WZ = PC;
- m_iff1 = m_iff2;
-}
-
-/***************************************************************
- * RETI
- ***************************************************************/
-inline void z80_device::reti()
-{
- pop(m_pc);
- WZ = PC;
- m_iff1 = m_iff2;
- daisy_call_reti_device();
-}
-
-/***************************************************************
- * LD R,A
- ***************************************************************/
-inline void z80_device::ld_r_a()
-{
- nomreq_ir(1);
- m_r = A;
- m_r2 = A & 0x80; // keep bit 7 of r
-}
-
-/***************************************************************
- * LD A,R
- ***************************************************************/
-inline void z80_device::ld_a_r()
-{
- nomreq_ir(1);
- A = (m_r & 0x7f) | m_r2;
- set_f((F & CF) | SZ[A] | (m_iff2 << 2));
- m_after_ldair = true;
-}
-
-/***************************************************************
- * LD I,A
- ***************************************************************/
-inline void z80_device::ld_i_a()
-{
- nomreq_ir(1);
- m_i = A;
-}
-
-/***************************************************************
- * LD A,I
- ***************************************************************/
-inline void z80_device::ld_a_i()
-{
- nomreq_ir(1);
- A = m_i;
- set_f((F & CF) | SZ[A] | (m_iff2 << 2));
- m_after_ldair = true;
-}
-
-/***************************************************************
- * RST
- ***************************************************************/
-inline void z80_device::rst(u16 addr)
-{
- push(m_pc);
- PCD = addr;
- WZ = PC;
+ return m_args.read_byte(PC);
}
/***************************************************************
* INC r8
***************************************************************/
-inline u8 z80_device::inc(u8 value)
+void z80_device::inc(u8 &r)
{
- u8 res = value + 1;
- set_f((F & CF) | SZHV_inc[res]);
- return (u8)res;
+ ++r;
+ set_f((F & CF) | SZHV_inc[r]);
}
/***************************************************************
* DEC r8
***************************************************************/
-inline u8 z80_device::dec(u8 value)
+void z80_device::dec(u8 &r)
{
- u8 res = value - 1;
- set_f((F & CF) | SZHV_dec[res]);
- return res;
+ --r;
+ set_f((F & CF) | SZHV_dec[r]);
}
/***************************************************************
* RLCA
***************************************************************/
-inline void z80_device::rlca()
+void z80_device::rlca()
{
A = (A << 1) | (A >> 7);
set_f((F & (SF | ZF | PF)) | (A & (YF | XF | CF)));
@@ -679,7 +136,7 @@ inline void z80_device::rlca()
/***************************************************************
* RRCA
***************************************************************/
-inline void z80_device::rrca()
+void z80_device::rrca()
{
set_f((F & (SF | ZF | PF)) | (A & CF));
A = (A >> 1) | (A << 7);
@@ -689,7 +146,7 @@ inline void z80_device::rrca()
/***************************************************************
* RLA
***************************************************************/
-inline void z80_device::rla()
+void z80_device::rla()
{
u8 res = (A << 1) | (F & CF);
u8 c = (A & 0x80) ? CF : 0;
@@ -700,7 +157,7 @@ inline void z80_device::rla()
/***************************************************************
* RRA
***************************************************************/
-inline void z80_device::rra()
+void z80_device::rra()
{
u8 res = (A >> 1) | (F << 7);
u8 c = (A & 0x01) ? CF : 0;
@@ -709,114 +166,97 @@ inline void z80_device::rra()
}
/***************************************************************
- * RRD
- ***************************************************************/
-inline void z80_device::rrd()
-{
- u8 n = rm(HL);
- WZ = HL + 1;
- nomreq_addr(HL, 4);
- wm(HL, (n >> 4) | (A << 4));
- A = (A & 0xf0) | (n & 0x0f);
- set_f((F & CF) | SZP[A]);
-}
-
-/***************************************************************
- * RLD
- ***************************************************************/
-inline void z80_device::rld()
-{
- u8 n = rm(HL);
- WZ = HL + 1;
- nomreq_addr(HL, 4);
- wm(HL, (n << 4) | (A & 0x0f));
- A = (A & 0xf0) | (n >> 4);
- set_f((F & CF) | SZP[A]);
-}
-
-/***************************************************************
* ADD A,n
***************************************************************/
-inline void z80_device::add_a(u8 value)
+void z80_device::add_a(u8 value)
{
- u32 ah = AFD & 0xff00;
- u32 res = (u8)((ah >> 8) + value);
- set_f(SZHVC_add[ah | res]);
+ const u16 res = A + value;
+ u8 f = (((A ^ res) & (value ^ res)) >> 5) & VF;
+ f |= flags_szyxc(res);
+ f |= ((A & 0x0f) + (value & 0x0f)) & HF;
+ set_f(f);
A = res;
}
/***************************************************************
* ADC A,n
***************************************************************/
-inline void z80_device::adc_a(u8 value)
+void z80_device::adc_a(u8 value)
{
- u32 ah = AFD & 0xff00, c = AFD & 1;
- u32 res = (u8)((ah >> 8) + value + c);
- set_f(SZHVC_add[(c << 16) | ah | res]);
+ const int c = F & CF;
+ const u16 res = A + value + c;
+ u8 f = (((A ^ res) & (value ^ res)) >> 5) & VF;
+ f |= flags_szyxc(res);
+ f |= ((A & 0x0f) + (value & 0x0f) + c) & HF;
+
+ set_f(f);
A = res;
}
/***************************************************************
- * SUB n
+ * SUB A,n
***************************************************************/
-inline void z80_device::sub(u8 value)
+void z80_device::sub_a(u8 value)
{
- u32 ah = AFD & 0xff00;
- u32 res = (u8)((ah >> 8) - value);
- set_f(SZHVC_sub[ah | res]);
+ const u16 res = A - value;
+ u8 f = (((A ^ value) & (A ^ res)) >> 5) & VF;
+ f |= NF | flags_szyxc(res);
+ f |= ((A & 0x0f) - (value & 0x0f)) & HF;
+
+ set_f(f);
A = res;
}
/***************************************************************
* SBC A,n
***************************************************************/
-inline void z80_device::sbc_a(u8 value)
+void z80_device::sbc_a(u8 value)
{
- u32 ah = AFD & 0xff00, c = AFD & 1;
- u32 res = (u8)((ah >> 8) - value - c);
- set_f(SZHVC_sub[(c << 16) | ah | res]);
+ const int c = F & CF;
+ const u16 res = A - value - c;
+ u8 f = (((A ^ value) & (A ^ res)) >> 5) & VF;
+ f |= NF | flags_szyxc(res);
+ f |= ((A & 0x0f) - (value & 0x0f) - c) & HF;
+
+ set_f(f);
A = res;
}
/***************************************************************
* NEG
***************************************************************/
-inline void z80_device::neg()
+void z80_device::neg()
{
u8 value = A;
A = 0;
- sub(value);
+ sub_a(value);
}
/***************************************************************
* DAA
***************************************************************/
-inline void z80_device::daa()
+void z80_device::daa()
{
u8 a = A;
if (F & NF)
{
- if ((F & HF) | ((A & 0xf) > 9))
- a -= 6;
- if ((F & CF) | (A > 0x99))
- a -= 0x60;
+ if ((F&HF) | ((A&0xf)>9)) a-=6;
+ if ((F&CF) | (A>0x99)) a-=0x60;
}
else
{
- if ((F & HF) | ((A & 0xf) > 9))
- a += 6;
- if ((F & CF) | (A > 0x99))
- a += 0x60;
+ if ((F&HF) | ((A&0xf)>9)) a+=6;
+ if ((F&CF) | (A>0x99)) a+=0x60;
}
- set_f((F & (CF | NF)) | (A > 0x99) | ((A ^ a) & HF) | SZP[a]);
+ set_f((F&(CF|NF)) | (A>0x99) | ((A^a)&HF) | SZP[a]);
A = a;
}
/***************************************************************
* AND n
***************************************************************/
-inline void z80_device::and_a(u8 value)
+void z80_device::and_a(u8 value)
{
A &= value;
set_f(SZP[A] | HF);
@@ -825,7 +265,7 @@ inline void z80_device::and_a(u8 value)
/***************************************************************
* OR n
***************************************************************/
-inline void z80_device::or_a(u8 value)
+void z80_device::or_a(u8 value)
{
A |= value;
set_f(SZP[A]);
@@ -834,7 +274,7 @@ inline void z80_device::or_a(u8 value)
/***************************************************************
* XOR n
***************************************************************/
-inline void z80_device::xor_a(u8 value)
+void z80_device::xor_a(u8 value)
{
A ^= value;
set_f(SZP[A]);
@@ -843,18 +283,20 @@ inline void z80_device::xor_a(u8 value)
/***************************************************************
* CP n
***************************************************************/
-inline void z80_device::cp(u8 value)
+void z80_device::cp(u8 value)
{
- unsigned val = value;
- u32 ah = AFD & 0xff00;
- u32 res = (u8)((ah >> 8) - val);
- set_f((SZHVC_sub[ah | res] & ~(YF | XF)) | (val & (YF | XF)));
+ const u16 res = A - value;
+ u8 f = (((A ^ value) & (A ^ res)) >> 5) & VF;
+ f |= NF | flags_szyxc(res);
+ f |= ((A & 0x0f) - (value & 0x0f)) & HF;
+
+ set_f((f & ~(YF | XF)) | (value & (YF | XF)));
}
/***************************************************************
* EXX
***************************************************************/
-inline void z80_device::exx()
+void z80_device::exx()
{
using std::swap;
swap(m_bc, m_bc2);
@@ -863,70 +305,9 @@ inline void z80_device::exx()
}
/***************************************************************
- * EX (SP),r16
- * in: TDAT
- ***************************************************************/
-inline void z80_device::ex_sp(PAIR &r)
-{
- PAIR tmp = {{0, 0, 0, 0}};
- pop(tmp);
- nomreq_addr(SPD - 1, 1);
- wm16_sp(r);
- nomreq_addr(SPD, 2);
- r = tmp;
- WZ = r.d;
-}
-
-/***************************************************************
- * ADD16
- ***************************************************************/
-inline void z80_device::add16(PAIR &dr, PAIR &sr)
-{
- nomreq_ir(7);
- u32 res = dr.d + sr.d;
- WZ = dr.d + 1;
- set_f((F & (SF | ZF | VF)) |
- (((dr.d ^ res ^ sr.d) >> 8) & HF) |
- ((res >> 16) & CF) | ((res >> 8) & (YF | XF)));
- dr.w.l = (u16)res;
-}
-
-/***************************************************************
- * ADC HL,r16
- ***************************************************************/
-inline void z80_device::adc_hl(PAIR &r)
-{
- nomreq_ir(7);
- u32 res = HLD + r.d + (F & CF);
- WZ = HL + 1;
- set_f((((HLD ^ res ^ r.d) >> 8) & HF) |
- ((res >> 16) & CF) |
- ((res >> 8) & (SF | YF | XF)) |
- ((res & 0xffff) ? 0 : ZF) |
- (((r.d ^ HLD ^ 0x8000) & (r.d ^ res) & 0x8000) >> 13));
- HL = (u16)res;
-}
-
-/***************************************************************
- * SBC HL,r16
- ***************************************************************/
-inline void z80_device::sbc_hl(PAIR &r)
-{
- nomreq_ir(7);
- u32 res = HLD - r.d - (F & CF);
- WZ = HL + 1;
- set_f((((HLD ^ res ^ r.d) >> 8) & HF) | NF |
- ((res >> 16) & CF) |
- ((res >> 8) & (SF | YF | XF)) |
- ((res & 0xffff) ? 0 : ZF) |
- (((r.d ^ HLD) & (HLD ^ res) & 0x8000) >> 13));
- HL = (u16)res;
-}
-
-/***************************************************************
* RLC r8
***************************************************************/
-inline u8 z80_device::rlc(u8 value)
+u8 z80_device::rlc(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -938,7 +319,7 @@ inline u8 z80_device::rlc(u8 value)
/***************************************************************
* RRC r8
***************************************************************/
-inline u8 z80_device::rrc(u8 value)
+u8 z80_device::rrc(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -950,7 +331,7 @@ inline u8 z80_device::rrc(u8 value)
/***************************************************************
* RL r8
***************************************************************/
-inline u8 z80_device::rl(u8 value)
+u8 z80_device::rl(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -962,7 +343,7 @@ inline u8 z80_device::rl(u8 value)
/***************************************************************
* RR r8
***************************************************************/
-inline u8 z80_device::rr(u8 value)
+u8 z80_device::rr(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -974,7 +355,7 @@ inline u8 z80_device::rr(u8 value)
/***************************************************************
* SLA r8
***************************************************************/
-inline u8 z80_device::sla(u8 value)
+u8 z80_device::sla(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -986,7 +367,7 @@ inline u8 z80_device::sla(u8 value)
/***************************************************************
* SRA r8
***************************************************************/
-inline u8 z80_device::sra(u8 value)
+u8 z80_device::sra(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -998,7 +379,7 @@ inline u8 z80_device::sra(u8 value)
/***************************************************************
* SLL r8
***************************************************************/
-inline u8 z80_device::sll(u8 value)
+u8 z80_device::sll(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x80) ? CF : 0;
@@ -1010,7 +391,7 @@ inline u8 z80_device::sll(u8 value)
/***************************************************************
* SRL r8
***************************************************************/
-inline u8 z80_device::srl(u8 value)
+u8 z80_device::srl(u8 value)
{
unsigned res = value;
unsigned c = (res & 0x01) ? CF : 0;
@@ -1022,7 +403,7 @@ inline u8 z80_device::srl(u8 value)
/***************************************************************
* BIT bit,r8
***************************************************************/
-inline void z80_device::bit(int bit, u8 value)
+void z80_device::bit(int bit, u8 value)
{
set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | (value & (YF | XF)));
}
@@ -1030,7 +411,7 @@ inline void z80_device::bit(int bit, u8 value)
/***************************************************************
* BIT bit,(HL)
***************************************************************/
-inline void z80_device::bit_hl(int bit, u8 value)
+void z80_device::bit_hl(int bit, u8 value)
{
set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | (WZ_H & (YF | XF)));
}
@@ -1038,7 +419,7 @@ inline void z80_device::bit_hl(int bit, u8 value)
/***************************************************************
* BIT bit,(IX/Y+o)
***************************************************************/
-inline void z80_device::bit_xy(int bit, u8 value)
+void z80_device::bit_xy(int bit, u8 value)
{
set_f((F & CF) | HF | (SZ_BIT[value & (1 << bit)] & ~(YF | XF)) | ((m_ea >> 8) & (YF | XF)));
}
@@ -1046,7 +427,7 @@ inline void z80_device::bit_xy(int bit, u8 value)
/***************************************************************
* RES bit,r8
***************************************************************/
-inline u8 z80_device::res(int bit, u8 value)
+u8 z80_device::res(int bit, u8 value)
{
return value & ~(1 << bit);
}
@@ -1054,2278 +435,70 @@ inline u8 z80_device::res(int bit, u8 value)
/***************************************************************
* SET bit,r8
***************************************************************/
-inline u8 z80_device::set(int bit, u8 value)
+u8 z80_device::set(int bit, u8 value)
{
return value | (1 << bit);
}
-/***************************************************************
- * LDI
- ***************************************************************/
-inline void z80_device::ldi()
-{
- u8 io = rm(HL);
- wm(DE, io);
- nomreq_addr(DE, 2);
- set_f(F & (SF | ZF | CF));
- if ((A + io) & 0x02)
- F |= YF; // bit 1 -> flag 5
- if ((A + io) & 0x08)
- F |= XF; // bit 3 -> flag 3
- HL++;
- DE++;
- BC--;
- if (BC)
- F |= VF;
-}
-
-/***************************************************************
- * CPI
- ***************************************************************/
-inline void z80_device::cpi()
-{
- u8 val = rm(HL);
- nomreq_addr(HL, 5);
- u8 res = A - val;
- WZ++;
- HL++;
- BC--;
- set_f((F & CF) | (SZ[res] & ~(YF | XF)) | ((A ^ val ^ res) & HF) | NF);
- if (F & HF)
- res -= 1;
- if (res & 0x02)
- F |= YF; // bit 1 -> flag 5
- if (res & 0x08)
- F |= XF; // bit 3 -> flag 3
- if (BC)
- F |= VF;
-}
-
-/***************************************************************
- * INI
- ***************************************************************/
-inline u8 z80_device::ini()
-{
- nomreq_ir(1);
- const u8 io = in(BC);
- WZ = BC + 1;
- B--;
- wm(HL, io);
- HL++;
- set_f(SZ[B]);
- unsigned t = (unsigned)((C + 1) & 0xff) + (unsigned)io;
- if (io & SF)
- F |= NF;
- if (t & 0x100)
- F |= HF | CF;
- F |= SZP[(u8)(t & 0x07) ^ B] & PF;
-
- return io;
-}
-
-/***************************************************************
- * OUTI
- ***************************************************************/
-inline u8 z80_device::outi()
-{
- nomreq_ir(1);
- const u8 io = rm(HL);
- B--;
- WZ = BC + 1;
- out(BC, io);
- HL++;
- set_f(SZ[B]);
- unsigned t = (unsigned)L + (unsigned)io;
- if (io & SF)
- F |= NF;
- if (t & 0x100)
- F |= HF | CF;
- F |= SZP[(u8)(t & 0x07) ^ B] & PF;
-
- return io;
-}
-
-/***************************************************************
- * LDD
- ***************************************************************/
-inline void z80_device::ldd()
-{
- const u8 io = rm(HL);
- wm(DE, io);
- nomreq_addr(DE, 2);
- set_f(F & (SF | ZF | CF));
- if ((A + io) & 0x02)
- F |= YF; // bit 1 -> flag 5
- if ((A + io) & 0x08)
- F |= XF; // bit 3 -> flag 3
- HL--;
- DE--;
- BC--;
- if (BC)
- F |= VF;
-}
-
-/***************************************************************
- * CPD
- ***************************************************************/
-inline void z80_device::cpd()
-{
- u8 val = rm(HL);
- nomreq_addr(HL, 5);
- u8 res = A - val;
- WZ--;
- HL--;
- BC--;
- set_f((F & CF) | (SZ[res] & ~(YF | XF)) | ((A ^ val ^ res) & HF) | NF);
- if (F & HF)
- res -= 1;
- if (res & 0x02)
- F |= YF; // bit 1 -> flag 5
- if (res & 0x08)
- F |= XF; // bit 3 -> flag 3
- if (BC)
- F |= VF;
-}
-
-/***************************************************************
- * IND
- ***************************************************************/
-inline u8 z80_device::ind()
-{
- nomreq_ir(1);
- const u8 io = in(BC);
- WZ = BC - 1;
- B--;
- wm(HL, io);
- HL--;
- set_f(SZ[B]);
- unsigned t = ((unsigned)(C - 1) & 0xff) + (unsigned)io;
- if (io & SF)
- F |= NF;
- if (t & 0x100)
- F |= HF | CF;
- F |= SZP[(u8)(t & 0x07) ^ B] & PF;
-
- return io;
-}
-
-/***************************************************************
- * OUTD
- ***************************************************************/
-inline u8 z80_device::outd()
-{
- nomreq_ir(1);
- const u8 io = rm(HL);
- B--;
- WZ = BC - 1;
- out(BC, io);
- HL--;
- set_f(SZ[B]);
- unsigned t = (unsigned)L + (unsigned)io;
- if (io & SF)
- F |= NF;
- if (t & 0x100)
- F |= HF | CF;
- F |= SZP[(u8)(t & 0x07) ^ B] & PF;
-
- return io;
-}
-
-/***************************************************************
- * LDIR
- ***************************************************************/
-inline void z80_device::ldir()
-{
- ldi();
- if (BC != 0)
- {
- nomreq_addr(DE, 5);
- PC -= 2;
- WZ = PC + 1;
- F &= ~(YF | XF);
- F |= (PC >> 8) & (YF | XF);
- }
-}
-
-/***************************************************************
- * CPIR
- ***************************************************************/
-inline void z80_device::cpir()
-{
- cpi();
- if (BC != 0 && !(F & ZF))
- {
- nomreq_addr(HL, 5);
- PC -= 2;
- WZ = PC + 1;
- F &= ~(YF | XF);
- F |= (PC >> 8) & (YF | XF);
- }
-}
-
-inline void z80_device::block_io_interrupted_flags(u8 data)
+void z80_device::block_io_interrupted_flags()
{
F &= ~(YF | XF);
F |= (PC >> 8) & (YF | XF);
if (F & CF)
{
F &= ~HF;
- if (data & 0x80)
+ if (TDAT8 & 0x80)
{
F ^= (SZP[(B - 1) & 0x07] ^ PF) & PF;
- if ((B & 0x0f) == 0x00)
- F |= HF;
+ if ((B & 0x0f) == 0x00) F |= HF;
}
else
{
F ^= (SZP[(B + 1) & 0x07] ^ PF) & PF;
- if ((B & 0x0f) == 0x0f)
- F |= HF;
+ if ((B & 0x0f) == 0x0f) F |= HF;
}
}
else
{
- F ^= (SZP[B & 0x07] ^ PF) & PF;
- }
-}
-
-/***************************************************************
- * INIR
- ***************************************************************/
-inline void z80_device::inir()
-{
- const u8 data = ini();
- if (B != 0)
- {
- nomreq_addr(HL, 5);
- PC -= 2;
- WZ = PC + 1;
- block_io_interrupted_flags(data);
- }
-}
-
-/***************************************************************
- * OTIR
- ***************************************************************/
-inline void z80_device::otir()
-{
- const u8 data = outi();
- if (B != 0)
- {
- nomreq_addr(BC, 5);
- PC -= 2;
- WZ = PC + 1;
- block_io_interrupted_flags(data);
- }
-}
-
-/***************************************************************
- * LDDR
- ***************************************************************/
-inline void z80_device::lddr()
-{
- ldd();
- if (BC != 0)
- {
- nomreq_addr(DE, 5);
- PC -= 2;
- WZ = PC + 1;
- F &= ~(YF | XF);
- F |= (PC >> 8) & (YF | XF);
- }
-}
-
-/***************************************************************
- * CPDR
- ***************************************************************/
-inline void z80_device::cpdr()
-{
- cpd();
- if (BC != 0 && !(F & ZF))
- {
- nomreq_addr(HL, 5);
- PC -= 2;
- WZ = PC + 1;
- F &= ~(YF | XF);
- F |= (PC >> 8) & (YF | XF);
- }
-}
-
-/***************************************************************
- * INDR
- ***************************************************************/
-inline void z80_device::indr()
-{
- const u8 data = ind();
- if (B != 0)
- {
- nomreq_addr(HL, 5);
- PC -= 2;
- WZ = PC + 1;
- block_io_interrupted_flags(data);
- }
-}
-
-/***************************************************************
- * OTDR
- ***************************************************************/
-inline void z80_device::otdr()
-{
- const u8 data = outd();
- if (B != 0)
- {
- nomreq_addr(BC, 5);
- PC -= 2;
- WZ = PC + 1;
- block_io_interrupted_flags(data);
+ F ^=(SZP[B & 0x07] ^ PF) & PF;
}
}
/***************************************************************
* EI
***************************************************************/
-inline void z80_device::ei()
+void z80_device::ei()
{
m_iff1 = m_iff2 = 1;
- m_after_ei = true;
+ set_service_attention<SA_AFTER_EI, 1>();
}
-inline void z80_device::set_f(u8 f)
+void z80_device::set_f(u8 f)
{
- m_qtemp = 0;
+ QT = 0;
F = f;
}
-inline void z80_device::illegal_1()
+void z80_device::illegal_1()
{
- LOGUNDOC("ill. opcode $%02x $%02x ($%04x)\n",
- m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff)), m_opcodes.read_byte(translate_memory_address(PCD)), PCD - 1);
+ LOGMASKED(LOG_UNDOC, "ill. opcode $%02x $%02x ($%04x)\n",
+ m_opcodes.read_byte((PC - 1) & 0xffff), m_opcodes.read_byte(PC), PC - 1);
}
-inline void z80_device::illegal_2()
+void z80_device::illegal_2()
{
- LOGUNDOC("ill. opcode $ed $%02x\n",
- m_opcodes.read_byte(translate_memory_address((PCD - 1) & 0xffff)));
+ LOGMASKED(LOG_UNDOC, "ill. opcode $ed $%02x\n",
+ m_opcodes.read_byte((PC - 1) & 0xffff));
}
-/**********************************************************
- * opcodes with CB prefix
- * rotate, shift and bit operations
- **********************************************************/
-OP(cb,00) { B = rlc(B); } /* RLC B */
-OP(cb,01) { C = rlc(C); } /* RLC C */
-OP(cb,02) { D = rlc(D); } /* RLC D */
-OP(cb,03) { E = rlc(E); } /* RLC E */
-OP(cb,04) { H = rlc(H); } /* RLC H */
-OP(cb,05) { L = rlc(L); } /* RLC L */
-OP(cb,06) { wm(HL, rlc(rm_reg(HL)));} /* RLC (HL) */
-OP(cb,07) { A = rlc(A); } /* RLC A */
-
-OP(cb,08) { B = rrc(B); } /* RRC B */
-OP(cb,09) { C = rrc(C); } /* RRC C */
-OP(cb,0a) { D = rrc(D); } /* RRC D */
-OP(cb,0b) { E = rrc(E); } /* RRC E */
-OP(cb,0c) { H = rrc(H); } /* RRC H */
-OP(cb,0d) { L = rrc(L); } /* RRC L */
-OP(cb,0e) { wm(HL, rrc(rm_reg(HL)));} /* RRC (HL) */
-OP(cb,0f) { A = rrc(A); } /* RRC A */
-
-OP(cb,10) { B = rl(B); } /* RL B */
-OP(cb,11) { C = rl(C); } /* RL C */
-OP(cb,12) { D = rl(D); } /* RL D */
-OP(cb,13) { E = rl(E); } /* RL E */
-OP(cb,14) { H = rl(H); } /* RL H */
-OP(cb,15) { L = rl(L); } /* RL L */
-OP(cb,16) { wm(HL, rl(rm_reg(HL))); } /* RL (HL) */
-OP(cb,17) { A = rl(A); } /* RL A */
-
-OP(cb,18) { B = rr(B); } /* RR B */
-OP(cb,19) { C = rr(C); } /* RR C */
-OP(cb,1a) { D = rr(D); } /* RR D */
-OP(cb,1b) { E = rr(E); } /* RR E */
-OP(cb,1c) { H = rr(H); } /* RR H */
-OP(cb,1d) { L = rr(L); } /* RR L */
-OP(cb,1e) { wm(HL, rr(rm_reg(HL))); } /* RR (HL) */
-OP(cb,1f) { A = rr(A); } /* RR A */
-
-OP(cb,20) { B = sla(B); } /* SLA B */
-OP(cb,21) { C = sla(C); } /* SLA C */
-OP(cb,22) { D = sla(D); } /* SLA D */
-OP(cb,23) { E = sla(E); } /* SLA E */
-OP(cb,24) { H = sla(H); } /* SLA H */
-OP(cb,25) { L = sla(L); } /* SLA L */
-OP(cb,26) { wm(HL, sla(rm_reg(HL)));} /* SLA (HL) */
-OP(cb,27) { A = sla(A); } /* SLA A */
-
-OP(cb,28) { B = sra(B); } /* SRA B */
-OP(cb,29) { C = sra(C); } /* SRA C */
-OP(cb,2a) { D = sra(D); } /* SRA D */
-OP(cb,2b) { E = sra(E); } /* SRA E */
-OP(cb,2c) { H = sra(H); } /* SRA H */
-OP(cb,2d) { L = sra(L); } /* SRA L */
-OP(cb,2e) { wm(HL, sra(rm_reg(HL)));} /* SRA (HL) */
-OP(cb,2f) { A = sra(A); } /* SRA A */
-
-OP(cb,30) { B = sll(B); } /* SLL B */
-OP(cb,31) { C = sll(C); } /* SLL C */
-OP(cb,32) { D = sll(D); } /* SLL D */
-OP(cb,33) { E = sll(E); } /* SLL E */
-OP(cb,34) { H = sll(H); } /* SLL H */
-OP(cb,35) { L = sll(L); } /* SLL L */
-OP(cb,36) { wm(HL, sll(rm_reg(HL)));} /* SLL (HL) */
-OP(cb,37) { A = sll(A); } /* SLL A */
-
-OP(cb,38) { B = srl(B); } /* SRL B */
-OP(cb,39) { C = srl(C); } /* SRL C */
-OP(cb,3a) { D = srl(D); } /* SRL D */
-OP(cb,3b) { E = srl(E); } /* SRL E */
-OP(cb,3c) { H = srl(H); } /* SRL H */
-OP(cb,3d) { L = srl(L); } /* SRL L */
-OP(cb,3e) { wm(HL, srl(rm_reg(HL)));} /* SRL (HL) */
-OP(cb,3f) { A = srl(A); } /* SRL A */
-
-OP(cb,40) { bit(0, B); } /* BIT 0,B */
-OP(cb,41) { bit(0, C); } /* BIT 0,C */
-OP(cb,42) { bit(0, D); } /* BIT 0,D */
-OP(cb,43) { bit(0, E); } /* BIT 0,E */
-OP(cb,44) { bit(0, H); } /* BIT 0,H */
-OP(cb,45) { bit(0, L); } /* BIT 0,L */
-OP(cb,46) { bit_hl(0, rm_reg(HL)); } /* BIT 0,(HL) */
-OP(cb,47) { bit(0, A); } /* BIT 0,A */
-
-OP(cb,48) { bit(1, B); } /* BIT 1,B */
-OP(cb,49) { bit(1, C); } /* BIT 1,C */
-OP(cb,4a) { bit(1, D); } /* BIT 1,D */
-OP(cb,4b) { bit(1, E); } /* BIT 1,E */
-OP(cb,4c) { bit(1, H); } /* BIT 1,H */
-OP(cb,4d) { bit(1, L); } /* BIT 1,L */
-OP(cb,4e) { bit_hl(1, rm_reg(HL)); } /* BIT 1,(HL) */
-OP(cb,4f) { bit(1, A); } /* BIT 1,A */
-
-OP(cb,50) { bit(2, B); } /* BIT 2,B */
-OP(cb,51) { bit(2, C); } /* BIT 2,C */
-OP(cb,52) { bit(2, D); } /* BIT 2,D */
-OP(cb,53) { bit(2, E); } /* BIT 2,E */
-OP(cb,54) { bit(2, H); } /* BIT 2,H */
-OP(cb,55) { bit(2, L); } /* BIT 2,L */
-OP(cb,56) { bit_hl(2, rm_reg(HL)); } /* BIT 2,(HL) */
-OP(cb,57) { bit(2, A); } /* BIT 2,A */
-
-OP(cb,58) { bit(3, B); } /* BIT 3,B */
-OP(cb,59) { bit(3, C); } /* BIT 3,C */
-OP(cb,5a) { bit(3, D); } /* BIT 3,D */
-OP(cb,5b) { bit(3, E); } /* BIT 3,E */
-OP(cb,5c) { bit(3, H); } /* BIT 3,H */
-OP(cb,5d) { bit(3, L); } /* BIT 3,L */
-OP(cb,5e) { bit_hl(3, rm_reg(HL)); } /* BIT 3,(HL) */
-OP(cb,5f) { bit(3, A); } /* BIT 3,A */
-
-OP(cb,60) { bit(4, B); } /* BIT 4,B */
-OP(cb,61) { bit(4, C); } /* BIT 4,C */
-OP(cb,62) { bit(4, D); } /* BIT 4,D */
-OP(cb,63) { bit(4, E); } /* BIT 4,E */
-OP(cb,64) { bit(4, H); } /* BIT 4,H */
-OP(cb,65) { bit(4, L); } /* BIT 4,L */
-OP(cb,66) { bit_hl(4, rm_reg(HL)); } /* BIT 4,(HL) */
-OP(cb,67) { bit(4, A); } /* BIT 4,A */
-
-OP(cb,68) { bit(5, B); } /* BIT 5,B */
-OP(cb,69) { bit(5, C); } /* BIT 5,C */
-OP(cb,6a) { bit(5, D); } /* BIT 5,D */
-OP(cb,6b) { bit(5, E); } /* BIT 5,E */
-OP(cb,6c) { bit(5, H); } /* BIT 5,H */
-OP(cb,6d) { bit(5, L); } /* BIT 5,L */
-OP(cb,6e) { bit_hl(5, rm_reg(HL)); } /* BIT 5,(HL) */
-OP(cb,6f) { bit(5, A); } /* BIT 5,A */
-
-OP(cb,70) { bit(6, B); } /* BIT 6,B */
-OP(cb,71) { bit(6, C); } /* BIT 6,C */
-OP(cb,72) { bit(6, D); } /* BIT 6,D */
-OP(cb,73) { bit(6, E); } /* BIT 6,E */
-OP(cb,74) { bit(6, H); } /* BIT 6,H */
-OP(cb,75) { bit(6, L); } /* BIT 6,L */
-OP(cb,76) { bit_hl(6, rm_reg(HL)); } /* BIT 6,(HL) */
-OP(cb,77) { bit(6, A); } /* BIT 6,A */
-
-OP(cb,78) { bit(7, B); } /* BIT 7,B */
-OP(cb,79) { bit(7, C); } /* BIT 7,C */
-OP(cb,7a) { bit(7, D); } /* BIT 7,D */
-OP(cb,7b) { bit(7, E); } /* BIT 7,E */
-OP(cb,7c) { bit(7, H); } /* BIT 7,H */
-OP(cb,7d) { bit(7, L); } /* BIT 7,L */
-OP(cb,7e) { bit_hl(7, rm_reg(HL)); } /* BIT 7,(HL) */
-OP(cb,7f) { bit(7, A); } /* BIT 7,A */
-
-OP(cb,80) { B = res(0, B); } /* RES 0,B */
-OP(cb,81) { C = res(0, C); } /* RES 0,C */
-OP(cb,82) { D = res(0, D); } /* RES 0,D */
-OP(cb,83) { E = res(0, E); } /* RES 0,E */
-OP(cb,84) { H = res(0, H); } /* RES 0,H */
-OP(cb,85) { L = res(0, L); } /* RES 0,L */
-OP(cb,86) { wm(HL, res(0, rm_reg(HL))); } /* RES 0,(HL) */
-OP(cb,87) { A = res(0, A); } /* RES 0,A */
-
-OP(cb,88) { B = res(1, B); } /* RES 1,B */
-OP(cb,89) { C = res(1, C); } /* RES 1,C */
-OP(cb,8a) { D = res(1, D); } /* RES 1,D */
-OP(cb,8b) { E = res(1, E); } /* RES 1,E */
-OP(cb,8c) { H = res(1, H); } /* RES 1,H */
-OP(cb,8d) { L = res(1, L); } /* RES 1,L */
-OP(cb,8e) { wm(HL, res(1, rm_reg(HL))); } /* RES 1,(HL) */
-OP(cb,8f) { A = res(1, A); } /* RES 1,A */
-
-OP(cb,90) { B = res(2, B); } /* RES 2,B */
-OP(cb,91) { C = res(2, C); } /* RES 2,C */
-OP(cb,92) { D = res(2, D); } /* RES 2,D */
-OP(cb,93) { E = res(2, E); } /* RES 2,E */
-OP(cb,94) { H = res(2, H); } /* RES 2,H */
-OP(cb,95) { L = res(2, L); } /* RES 2,L */
-OP(cb,96) { wm(HL, res(2, rm_reg(HL))); } /* RES 2,(HL) */
-OP(cb,97) { A = res(2, A); } /* RES 2,A */
-
-OP(cb,98) { B = res(3, B); } /* RES 3,B */
-OP(cb,99) { C = res(3, C); } /* RES 3,C */
-OP(cb,9a) { D = res(3, D); } /* RES 3,D */
-OP(cb,9b) { E = res(3, E); } /* RES 3,E */
-OP(cb,9c) { H = res(3, H); } /* RES 3,H */
-OP(cb,9d) { L = res(3, L); } /* RES 3,L */
-OP(cb,9e) { wm(HL, res(3, rm_reg(HL))); } /* RES 3,(HL) */
-OP(cb,9f) { A = res(3, A); } /* RES 3,A */
-
-OP(cb,a0) { B = res(4, B); } /* RES 4,B */
-OP(cb,a1) { C = res(4, C); } /* RES 4,C */
-OP(cb,a2) { D = res(4, D); } /* RES 4,D */
-OP(cb,a3) { E = res(4, E); } /* RES 4,E */
-OP(cb,a4) { H = res(4, H); } /* RES 4,H */
-OP(cb,a5) { L = res(4, L); } /* RES 4,L */
-OP(cb,a6) {wm(HL, res(4, rm_reg(HL))); } /* RES 4,(HL) */
-OP(cb,a7) { A = res(4, A); } /* RES 4,A */
-
-OP(cb,a8) { B = res(5, B); } /* RES 5,B */
-OP(cb,a9) { C = res(5, C); } /* RES 5,C */
-OP(cb,aa) { D = res(5, D); } /* RES 5,D */
-OP(cb,ab) { E = res(5, E); } /* RES 5,E */
-OP(cb,ac) { H = res(5, H); } /* RES 5,H */
-OP(cb,ad) { L = res(5, L); } /* RES 5,L */
-OP(cb,ae) { wm(HL, res(5, rm_reg(HL))); } /* RES 5,(HL) */
-OP(cb,af) { A = res(5, A); } /* RES 5,A */
-
-OP(cb,b0) { B = res(6, B); } /* RES 6,B */
-OP(cb,b1) { C = res(6, C); } /* RES 6,C */
-OP(cb,b2) { D = res(6, D); } /* RES 6,D */
-OP(cb,b3) { E = res(6, E); } /* RES 6,E */
-OP(cb,b4) { H = res(6, H); } /* RES 6,H */
-OP(cb,b5) { L = res(6, L); } /* RES 6,L */
-OP(cb,b6) { wm(HL, res(6, rm_reg(HL))); } /* RES 6,(HL) */
-OP(cb,b7) { A = res(6, A); } /* RES 6,A */
-
-OP(cb,b8) { B = res(7, B); } /* RES 7,B */
-OP(cb,b9) { C = res(7, C); } /* RES 7,C */
-OP(cb,ba) { D = res(7, D); } /* RES 7,D */
-OP(cb,bb) { E = res(7, E); } /* RES 7,E */
-OP(cb,bc) { H = res(7, H); } /* RES 7,H */
-OP(cb,bd) { L = res(7, L); } /* RES 7,L */
-OP(cb,be) { wm(HL, res(7, rm_reg(HL))); } /* RES 7,(HL) */
-OP(cb,bf) { A = res(7, A); } /* RES 7,A */
-
-OP(cb,c0) { B = set(0, B); } /* SET 0,B */
-OP(cb,c1) { C = set(0, C); } /* SET 0,C */
-OP(cb,c2) { D = set(0, D); } /* SET 0,D */
-OP(cb,c3) { E = set(0, E); } /* SET 0,E */
-OP(cb,c4) { H = set(0, H); } /* SET 0,H */
-OP(cb,c5) { L = set(0, L); } /* SET 0,L */
-OP(cb,c6) { wm(HL, set(0, rm_reg(HL))); } /* SET 0,(HL) */
-OP(cb,c7) { A = set(0, A); } /* SET 0,A */
-
-OP(cb,c8) { B = set(1, B); } /* SET 1,B */
-OP(cb,c9) { C = set(1, C); } /* SET 1,C */
-OP(cb,ca) { D = set(1, D); } /* SET 1,D */
-OP(cb,cb) { E = set(1, E); } /* SET 1,E */
-OP(cb,cc) { H = set(1, H); } /* SET 1,H */
-OP(cb,cd) { L = set(1, L); } /* SET 1,L */
-OP(cb,ce) { wm(HL, set(1, rm_reg(HL))); } /* SET 1,(HL) */
-OP(cb,cf) { A = set(1, A); } /* SET 1,A */
-
-OP(cb,d0) { B = set(2, B); } /* SET 2,B */
-OP(cb,d1) { C = set(2, C); } /* SET 2,C */
-OP(cb,d2) { D = set(2, D); } /* SET 2,D */
-OP(cb,d3) { E = set(2, E); } /* SET 2,E */
-OP(cb,d4) { H = set(2, H); } /* SET 2,H */
-OP(cb,d5) { L = set(2, L); } /* SET 2,L */
-OP(cb,d6) { wm(HL, set(2, rm_reg(HL))); } /* SET 2,(HL) */
-OP(cb,d7) { A = set(2, A); } /* SET 2,A */
-
-OP(cb,d8) { B = set(3, B); } /* SET 3,B */
-OP(cb,d9) { C = set(3, C); } /* SET 3,C */
-OP(cb,da) { D = set(3, D); } /* SET 3,D */
-OP(cb,db) { E = set(3, E); } /* SET 3,E */
-OP(cb,dc) { H = set(3, H); } /* SET 3,H */
-OP(cb,dd) { L = set(3, L); } /* SET 3,L */
-OP(cb,de) { wm(HL, set(3, rm_reg(HL))); } /* SET 3,(HL) */
-OP(cb,df) { A = set(3, A); } /* SET 3,A */
-
-OP(cb,e0) { B = set(4, B); } /* SET 4,B */
-OP(cb,e1) { C = set(4, C); } /* SET 4,C */
-OP(cb,e2) { D = set(4, D); } /* SET 4,D */
-OP(cb,e3) { E = set(4, E); } /* SET 4,E */
-OP(cb,e4) { H = set(4, H); } /* SET 4,H */
-OP(cb,e5) { L = set(4, L); } /* SET 4,L */
-OP(cb,e6) { wm(HL, set(4, rm_reg(HL))); } /* SET 4,(HL) */
-OP(cb,e7) { A = set(4, A); } /* SET 4,A */
-
-OP(cb,e8) { B = set(5, B); } /* SET 5,B */
-OP(cb,e9) { C = set(5, C); } /* SET 5,C */
-OP(cb,ea) { D = set(5, D); } /* SET 5,D */
-OP(cb,eb) { E = set(5, E); } /* SET 5,E */
-OP(cb,ec) { H = set(5, H); } /* SET 5,H */
-OP(cb,ed) { L = set(5, L); } /* SET 5,L */
-OP(cb,ee) { wm(HL, set(5, rm_reg(HL))); } /* SET 5,(HL) */
-OP(cb,ef) { A = set(5, A); } /* SET 5,A */
-
-OP(cb,f0) { B = set(6, B); } /* SET 6,B */
-OP(cb,f1) { C = set(6, C); } /* SET 6,C */
-OP(cb,f2) { D = set(6, D); } /* SET 6,D */
-OP(cb,f3) { E = set(6, E); } /* SET 6,E */
-OP(cb,f4) { H = set(6, H); } /* SET 6,H */
-OP(cb,f5) { L = set(6, L); } /* SET 6,L */
-OP(cb,f6) { wm(HL, set(6, rm_reg(HL))); } /* SET 6,(HL) */
-OP(cb,f7) { A = set(6, A); } /* SET 6,A */
-
-OP(cb,f8) { B = set(7, B); } /* SET 7,B */
-OP(cb,f9) { C = set(7, C); } /* SET 7,C */
-OP(cb,fa) { D = set(7, D); } /* SET 7,D */
-OP(cb,fb) { E = set(7, E); } /* SET 7,E */
-OP(cb,fc) { H = set(7, H); } /* SET 7,H */
-OP(cb,fd) { L = set(7, L); } /* SET 7,L */
-OP(cb,fe) { wm(HL, set(7, rm_reg(HL))); } /* SET 7,(HL) */
-OP(cb,ff) { A = set(7, A); } /* SET 7,A */
-
-
-/**********************************************************
-* opcodes with DD/FD CB prefix
-* rotate, shift and bit operations with (IX+o)
-**********************************************************/
-OP(xycb,00) { B = rlc(rm_reg(m_ea)); wm(m_ea, B); } /* RLC B=(XY+o) */
-OP(xycb,01) { C = rlc(rm_reg(m_ea)); wm(m_ea, C); } /* RLC C=(XY+o) */
-OP(xycb,02) { D = rlc(rm_reg(m_ea)); wm(m_ea, D); } /* RLC D=(XY+o) */
-OP(xycb,03) { E = rlc(rm_reg(m_ea)); wm(m_ea, E); } /* RLC E=(XY+o) */
-OP(xycb,04) { H = rlc(rm_reg(m_ea)); wm(m_ea, H); } /* RLC H=(XY+o) */
-OP(xycb,05) { L = rlc(rm_reg(m_ea)); wm(m_ea, L); } /* RLC L=(XY+o) */
-OP(xycb,06) { wm(m_ea, rlc(rm_reg(m_ea))); } /* RLC (XY+o) */
-OP(xycb,07) { A = rlc(rm_reg(m_ea)); wm(m_ea, A); } /* RLC A=(XY+o) */
-
-OP(xycb,08) { B = rrc(rm_reg(m_ea)); wm(m_ea, B); } /* RRC B=(XY+o) */
-OP(xycb,09) { C = rrc(rm_reg(m_ea)); wm(m_ea, C); } /* RRC C=(XY+o) */
-OP(xycb,0a) { D = rrc(rm_reg(m_ea)); wm(m_ea, D); } /* RRC D=(XY+o) */
-OP(xycb,0b) { E = rrc(rm_reg(m_ea)); wm(m_ea, E); } /* RRC E=(XY+o) */
-OP(xycb,0c) { H = rrc(rm_reg(m_ea)); wm(m_ea, H); } /* RRC H=(XY+o) */
-OP(xycb,0d) { L = rrc(rm_reg(m_ea)); wm(m_ea, L); } /* RRC L=(XY+o) */
-OP(xycb,0e) { wm(m_ea,rrc(rm_reg(m_ea))); } /* RRC (XY+o) */
-OP(xycb,0f) { A = rrc(rm_reg(m_ea)); wm(m_ea, A); } /* RRC A=(XY+o) */
-
-OP(xycb,10) { B = rl(rm_reg(m_ea)); wm(m_ea, B); } /* RL B=(XY+o) */
-OP(xycb,11) { C = rl(rm_reg(m_ea)); wm(m_ea, C); } /* RL C=(XY+o) */
-OP(xycb,12) { D = rl(rm_reg(m_ea)); wm(m_ea, D); } /* RL D=(XY+o) */
-OP(xycb,13) { E = rl(rm_reg(m_ea)); wm(m_ea, E); } /* RL E=(XY+o) */
-OP(xycb,14) { H = rl(rm_reg(m_ea)); wm(m_ea, H); } /* RL H=(XY+o) */
-OP(xycb,15) { L = rl(rm_reg(m_ea)); wm(m_ea, L); } /* RL L=(XY+o) */
-OP(xycb,16) { wm(m_ea,rl(rm_reg(m_ea))); } /* RL (XY+o) */
-OP(xycb,17) { A = rl(rm_reg(m_ea)); wm(m_ea, A); } /* RL A=(XY+o) */
-
-OP(xycb,18) { B = rr(rm_reg(m_ea)); wm(m_ea, B); } /* RR B=(XY+o) */
-OP(xycb,19) { C = rr(rm_reg(m_ea)); wm(m_ea, C); } /* RR C=(XY+o) */
-OP(xycb,1a) { D = rr(rm_reg(m_ea)); wm(m_ea, D); } /* RR D=(XY+o) */
-OP(xycb,1b) { E = rr(rm_reg(m_ea)); wm(m_ea, E); } /* RR E=(XY+o) */
-OP(xycb,1c) { H = rr(rm_reg(m_ea)); wm(m_ea, H); } /* RR H=(XY+o) */
-OP(xycb,1d) { L = rr(rm_reg(m_ea)); wm(m_ea, L); } /* RR L=(XY+o) */
-OP(xycb,1e) { wm(m_ea, rr(rm_reg(m_ea))); } /* RR (XY+o) */
-OP(xycb,1f) { A = rr(rm_reg(m_ea)); wm(m_ea, A); } /* RR A=(XY+o) */
-
-OP(xycb,20) { B = sla(rm_reg(m_ea)); wm(m_ea, B); } /* SLA B=(XY+o) */
-OP(xycb,21) { C = sla(rm_reg(m_ea)); wm(m_ea, C); } /* SLA C=(XY+o) */
-OP(xycb,22) { D = sla(rm_reg(m_ea)); wm(m_ea, D); } /* SLA D=(XY+o) */
-OP(xycb,23) { E = sla(rm_reg(m_ea)); wm(m_ea, E); } /* SLA E=(XY+o) */
-OP(xycb,24) { H = sla(rm_reg(m_ea)); wm(m_ea, H); } /* SLA H=(XY+o) */
-OP(xycb,25) { L = sla(rm_reg(m_ea)); wm(m_ea, L); } /* SLA L=(XY+o) */
-OP(xycb,26) { wm(m_ea, sla(rm_reg(m_ea))); } /* SLA (XY+o) */
-OP(xycb,27) { A = sla(rm_reg(m_ea)); wm(m_ea, A); } /* SLA A=(XY+o) */
-
-OP(xycb,28) { B = sra(rm_reg(m_ea)); wm(m_ea, B); } /* SRA B=(XY+o) */
-OP(xycb,29) { C = sra(rm_reg(m_ea)); wm(m_ea, C); } /* SRA C=(XY+o) */
-OP(xycb,2a) { D = sra(rm_reg(m_ea)); wm(m_ea, D); } /* SRA D=(XY+o) */
-OP(xycb,2b) { E = sra(rm_reg(m_ea)); wm(m_ea, E); } /* SRA E=(XY+o) */
-OP(xycb,2c) { H = sra(rm_reg(m_ea)); wm(m_ea, H); } /* SRA H=(XY+o) */
-OP(xycb,2d) { L = sra(rm_reg(m_ea)); wm(m_ea, L); } /* SRA L=(XY+o) */
-OP(xycb,2e) { wm(m_ea, sra(rm_reg(m_ea))); } /* SRA (XY+o) */
-OP(xycb,2f) { A = sra(rm_reg(m_ea)); wm(m_ea, A); } /* SRA A=(XY+o) */
-
-OP(xycb,30) { B = sll(rm_reg(m_ea)); wm(m_ea, B); } /* SLL B=(XY+o) */
-OP(xycb,31) { C = sll(rm_reg(m_ea)); wm(m_ea, C); } /* SLL C=(XY+o) */
-OP(xycb,32) { D = sll(rm_reg(m_ea)); wm(m_ea, D); } /* SLL D=(XY+o) */
-OP(xycb,33) { E = sll(rm_reg(m_ea)); wm(m_ea, E); } /* SLL E=(XY+o) */
-OP(xycb,34) { H = sll(rm_reg(m_ea)); wm(m_ea, H); } /* SLL H=(XY+o) */
-OP(xycb,35) { L = sll(rm_reg(m_ea)); wm(m_ea, L); } /* SLL L=(XY+o) */
-OP(xycb,36) { wm(m_ea, sll(rm_reg(m_ea))); } /* SLL (XY+o) */
-OP(xycb,37) { A = sll(rm_reg(m_ea)); wm(m_ea, A); } /* SLL A=(XY+o) */
-
-OP(xycb,38) { B = srl(rm_reg(m_ea)); wm(m_ea, B); } /* SRL B=(XY+o) */
-OP(xycb,39) { C = srl(rm_reg(m_ea)); wm(m_ea, C); } /* SRL C=(XY+o) */
-OP(xycb,3a) { D = srl(rm_reg(m_ea)); wm(m_ea, D); } /* SRL D=(XY+o) */
-OP(xycb,3b) { E = srl(rm_reg(m_ea)); wm(m_ea, E); } /* SRL E=(XY+o) */
-OP(xycb,3c) { H = srl(rm_reg(m_ea)); wm(m_ea, H); } /* SRL H=(XY+o) */
-OP(xycb,3d) { L = srl(rm_reg(m_ea)); wm(m_ea, L); } /* SRL L=(XY+o) */
-OP(xycb,3e) { wm(m_ea, srl(rm_reg(m_ea))); } /* SRL (XY+o) */
-OP(xycb,3f) { A = srl(rm_reg(m_ea)); wm(m_ea, A); } /* SRL A=(XY+o) */
-
-OP(xycb,40) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,41) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,42) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,43) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,44) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,45) { xycb_46(); } /* BIT 0,(XY+o) */
-OP(xycb,46) { bit_xy(0, rm_reg(m_ea)); } /* BIT 0,(XY+o) */
-OP(xycb,47) { xycb_46(); } /* BIT 0,(XY+o) */
-
-OP(xycb,48) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,49) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,4a) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,4b) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,4c) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,4d) { xycb_4e(); } /* BIT 1,(XY+o) */
-OP(xycb,4e) { bit_xy(1, rm_reg(m_ea)); } /* BIT 1,(XY+o) */
-OP(xycb,4f) { xycb_4e(); } /* BIT 1,(XY+o) */
-
-OP(xycb,50) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,51) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,52) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,53) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,54) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,55) { xycb_56(); } /* BIT 2,(XY+o) */
-OP(xycb,56) { bit_xy(2, rm_reg(m_ea)); } /* BIT 2,(XY+o) */
-OP(xycb,57) { xycb_56(); } /* BIT 2,(XY+o) */
-
-OP(xycb,58) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,59) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,5a) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,5b) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,5c) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,5d) { xycb_5e(); } /* BIT 3,(XY+o) */
-OP(xycb,5e) { bit_xy(3, rm_reg(m_ea)); } /* BIT 3,(XY+o) */
-OP(xycb,5f) { xycb_5e(); } /* BIT 3,(XY+o) */
-
-OP(xycb,60) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,61) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,62) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,63) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,64) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,65) { xycb_66(); } /* BIT 4,(XY+o) */
-OP(xycb,66) { bit_xy(4, rm_reg(m_ea)); } /* BIT 4,(XY+o) */
-OP(xycb,67) { xycb_66(); } /* BIT 4,(XY+o) */
-
-OP(xycb,68) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,69) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,6a) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,6b) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,6c) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,6d) { xycb_6e(); } /* BIT 5,(XY+o) */
-OP(xycb,6e) { bit_xy(5, rm_reg(m_ea)); } /* BIT 5,(XY+o) */
-OP(xycb,6f) { xycb_6e(); } /* BIT 5,(XY+o) */
-
-OP(xycb,70) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,71) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,72) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,73) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,74) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,75) { xycb_76(); } /* BIT 6,(XY+o) */
-OP(xycb,76) { bit_xy(6, rm_reg(m_ea)); } /* BIT 6,(XY+o) */
-OP(xycb,77) { xycb_76(); } /* BIT 6,(XY+o) */
-
-OP(xycb,78) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,79) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,7a) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,7b) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,7c) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,7d) { xycb_7e(); } /* BIT 7,(XY+o) */
-OP(xycb,7e) { bit_xy(7, rm_reg(m_ea)); } /* BIT 7,(XY+o) */
-OP(xycb,7f) { xycb_7e(); } /* BIT 7,(XY+o) */
-
-OP(xycb,80) { B = res(0, rm_reg(m_ea)); wm(m_ea, B); } /* RES 0,B=(XY+o) */
-OP(xycb,81) { C = res(0, rm_reg(m_ea)); wm(m_ea, C); } /* RES 0,C=(XY+o) */
-OP(xycb,82) { D = res(0, rm_reg(m_ea)); wm(m_ea, D); } /* RES 0,D=(XY+o) */
-OP(xycb,83) { E = res(0, rm_reg(m_ea)); wm(m_ea, E); } /* RES 0,E=(XY+o) */
-OP(xycb,84) { H = res(0, rm_reg(m_ea)); wm(m_ea, H); } /* RES 0,H=(XY+o) */
-OP(xycb,85) { L = res(0, rm_reg(m_ea)); wm(m_ea, L); } /* RES 0,L=(XY+o) */
-OP(xycb,86) { wm(m_ea, res(0, rm_reg(m_ea))); } /* RES 0,(XY+o) */
-OP(xycb,87) { A = res(0, rm_reg(m_ea)); wm(m_ea, A); } /* RES 0,A=(XY+o) */
-
-OP(xycb,88) { B = res(1, rm_reg(m_ea)); wm(m_ea, B); } /* RES 1,B=(XY+o) */
-OP(xycb,89) { C = res(1, rm_reg(m_ea)); wm(m_ea, C); } /* RES 1,C=(XY+o) */
-OP(xycb,8a) { D = res(1, rm_reg(m_ea)); wm(m_ea, D); } /* RES 1,D=(XY+o) */
-OP(xycb,8b) { E = res(1, rm_reg(m_ea)); wm(m_ea, E); } /* RES 1,E=(XY+o) */
-OP(xycb,8c) { H = res(1, rm_reg(m_ea)); wm(m_ea, H); } /* RES 1,H=(XY+o) */
-OP(xycb,8d) { L = res(1, rm_reg(m_ea)); wm(m_ea, L); } /* RES 1,L=(XY+o) */
-OP(xycb,8e) { wm(m_ea, res(1, rm_reg(m_ea))); } /* RES 1,(XY+o) */
-OP(xycb,8f) { A = res(1, rm_reg(m_ea)); wm(m_ea, A); } /* RES 1,A=(XY+o) */
-
-OP(xycb,90) { B = res(2, rm_reg(m_ea)); wm(m_ea, B); } /* RES 2,B=(XY+o) */
-OP(xycb,91) { C = res(2, rm_reg(m_ea)); wm(m_ea, C); } /* RES 2,C=(XY+o) */
-OP(xycb,92) { D = res(2, rm_reg(m_ea)); wm(m_ea, D); } /* RES 2,D=(XY+o) */
-OP(xycb,93) { E = res(2, rm_reg(m_ea)); wm(m_ea, E); } /* RES 2,E=(XY+o) */
-OP(xycb,94) { H = res(2, rm_reg(m_ea)); wm(m_ea, H); } /* RES 2,H=(XY+o) */
-OP(xycb,95) { L = res(2, rm_reg(m_ea)); wm(m_ea, L); } /* RES 2,L=(XY+o) */
-OP(xycb,96) { wm(m_ea, res(2, rm_reg(m_ea))); } /* RES 2,(XY+o) */
-OP(xycb,97) { A = res(2, rm_reg(m_ea)); wm(m_ea, A); } /* RES 2,A=(XY+o) */
-
-OP(xycb,98) { B = res(3, rm_reg(m_ea)); wm(m_ea, B); } /* RES 3,B=(XY+o) */
-OP(xycb,99) { C = res(3, rm_reg(m_ea)); wm(m_ea, C); } /* RES 3,C=(XY+o) */
-OP(xycb,9a) { D = res(3, rm_reg(m_ea)); wm(m_ea, D); } /* RES 3,D=(XY+o) */
-OP(xycb,9b) { E = res(3, rm_reg(m_ea)); wm(m_ea, E); } /* RES 3,E=(XY+o) */
-OP(xycb,9c) { H = res(3, rm_reg(m_ea)); wm(m_ea, H); } /* RES 3,H=(XY+o) */
-OP(xycb,9d) { L = res(3, rm_reg(m_ea)); wm(m_ea, L); } /* RES 3,L=(XY+o) */
-OP(xycb,9e) { wm(m_ea, res(3, rm_reg(m_ea))); } /* RES 3,(XY+o) */
-OP(xycb,9f) { A = res(3, rm_reg(m_ea)); wm(m_ea, A); } /* RES 3,A=(XY+o) */
-
-OP(xycb,a0) { B = res(4, rm_reg(m_ea)); wm(m_ea, B); } /* RES 4,B=(XY+o) */
-OP(xycb,a1) { C = res(4, rm_reg(m_ea)); wm(m_ea, C); } /* RES 4,C=(XY+o) */
-OP(xycb,a2) { D = res(4, rm_reg(m_ea)); wm(m_ea, D); } /* RES 4,D=(XY+o) */
-OP(xycb,a3) { E = res(4, rm_reg(m_ea)); wm(m_ea, E); } /* RES 4,E=(XY+o) */
-OP(xycb,a4) { H = res(4, rm_reg(m_ea)); wm(m_ea, H); } /* RES 4,H=(XY+o) */
-OP(xycb,a5) { L = res(4, rm_reg(m_ea)); wm(m_ea, L); } /* RES 4,L=(XY+o) */
-OP(xycb,a6) { wm(m_ea, res(4, rm_reg(m_ea))); } /* RES 4,(XY+o) */
-OP(xycb,a7) { A = res(4, rm_reg(m_ea)); wm(m_ea, A); } /* RES 4,A=(XY+o) */
-
-OP(xycb,a8) { B = res(5, rm_reg(m_ea)); wm(m_ea, B); } /* RES 5,B=(XY+o) */
-OP(xycb,a9) { C = res(5, rm_reg(m_ea)); wm(m_ea, C); } /* RES 5,C=(XY+o) */
-OP(xycb,aa) { D = res(5, rm_reg(m_ea)); wm(m_ea, D); } /* RES 5,D=(XY+o) */
-OP(xycb,ab) { E = res(5, rm_reg(m_ea)); wm(m_ea, E); } /* RES 5,E=(XY+o) */
-OP(xycb,ac) { H = res(5, rm_reg(m_ea)); wm(m_ea, H); } /* RES 5,H=(XY+o) */
-OP(xycb,ad) { L = res(5, rm_reg(m_ea)); wm(m_ea, L); } /* RES 5,L=(XY+o) */
-OP(xycb,ae) { wm(m_ea, res(5, rm_reg(m_ea))); } /* RES 5,(XY+o) */
-OP(xycb,af) { A = res(5, rm_reg(m_ea)); wm(m_ea, A); } /* RES 5,A=(XY+o) */
-
-OP(xycb,b0) { B = res(6, rm_reg(m_ea)); wm(m_ea, B); } /* RES 6,B=(XY+o) */
-OP(xycb,b1) { C = res(6, rm_reg(m_ea)); wm(m_ea, C); } /* RES 6,C=(XY+o) */
-OP(xycb,b2) { D = res(6, rm_reg(m_ea)); wm(m_ea, D); } /* RES 6,D=(XY+o) */
-OP(xycb,b3) { E = res(6, rm_reg(m_ea)); wm(m_ea, E); } /* RES 6,E=(XY+o) */
-OP(xycb,b4) { H = res(6, rm_reg(m_ea)); wm(m_ea, H); } /* RES 6,H=(XY+o) */
-OP(xycb,b5) { L = res(6, rm_reg(m_ea)); wm(m_ea, L); } /* RES 6,L=(XY+o) */
-OP(xycb,b6) { wm(m_ea, res(6, rm_reg(m_ea))); } /* RES 6,(XY+o) */
-OP(xycb,b7) { A = res(6, rm_reg(m_ea)); wm(m_ea, A); } /* RES 6,A=(XY+o) */
-
-OP(xycb,b8) { B = res(7, rm_reg(m_ea)); wm(m_ea, B); } /* RES 7,B=(XY+o) */
-OP(xycb,b9) { C = res(7, rm_reg(m_ea)); wm(m_ea, C); } /* RES 7,C=(XY+o) */
-OP(xycb,ba) { D = res(7, rm_reg(m_ea)); wm(m_ea, D); } /* RES 7,D=(XY+o) */
-OP(xycb,bb) { E = res(7, rm_reg(m_ea)); wm(m_ea, E); } /* RES 7,E=(XY+o) */
-OP(xycb,bc) { H = res(7, rm_reg(m_ea)); wm(m_ea, H); } /* RES 7,H=(XY+o) */
-OP(xycb,bd) { L = res(7, rm_reg(m_ea)); wm(m_ea, L); } /* RES 7,L=(XY+o) */
-OP(xycb,be) { wm(m_ea, res(7, rm_reg(m_ea))); } /* RES 7,(XY+o) */
-OP(xycb,bf) { A = res(7, rm_reg(m_ea)); wm(m_ea, A); } /* RES 7,A=(XY+o) */
-
-OP(xycb,c0) { B = set(0, rm_reg(m_ea)); wm(m_ea, B); } /* SET 0,B=(XY+o) */
-OP(xycb,c1) { C = set(0, rm_reg(m_ea)); wm(m_ea, C); } /* SET 0,C=(XY+o) */
-OP(xycb,c2) { D = set(0, rm_reg(m_ea)); wm(m_ea, D); } /* SET 0,D=(XY+o) */
-OP(xycb,c3) { E = set(0, rm_reg(m_ea)); wm(m_ea, E); } /* SET 0,E=(XY+o) */
-OP(xycb,c4) { H = set(0, rm_reg(m_ea)); wm(m_ea, H); } /* SET 0,H=(XY+o) */
-OP(xycb,c5) { L = set(0, rm_reg(m_ea)); wm(m_ea, L); } /* SET 0,L=(XY+o) */
-OP(xycb,c6) { wm(m_ea, set(0, rm_reg(m_ea))); } /* SET 0,(XY+o) */
-OP(xycb,c7) { A = set(0, rm_reg(m_ea)); wm(m_ea, A); } /* SET 0,A=(XY+o) */
-
-OP(xycb,c8) { B = set(1, rm_reg(m_ea)); wm(m_ea, B); } /* SET 1,B=(XY+o) */
-OP(xycb,c9) { C = set(1, rm_reg(m_ea)); wm(m_ea, C); } /* SET 1,C=(XY+o) */
-OP(xycb,ca) { D = set(1, rm_reg(m_ea)); wm(m_ea, D); } /* SET 1,D=(XY+o) */
-OP(xycb,cb) { E = set(1, rm_reg(m_ea)); wm(m_ea, E); } /* SET 1,E=(XY+o) */
-OP(xycb,cc) { H = set(1, rm_reg(m_ea)); wm(m_ea, H); } /* SET 1,H=(XY+o) */
-OP(xycb,cd) { L = set(1, rm_reg(m_ea)); wm(m_ea, L); } /* SET 1,L=(XY+o) */
-OP(xycb,ce) { wm(m_ea, set(1, rm_reg(m_ea))); } /* SET 1,(XY+o) */
-OP(xycb,cf) { A = set(1, rm_reg(m_ea)); wm(m_ea, A); } /* SET 1,A=(XY+o) */
-
-OP(xycb,d0) { B = set(2, rm_reg(m_ea)); wm(m_ea, B); } /* SET 2,B=(XY+o) */
-OP(xycb,d1) { C = set(2, rm_reg(m_ea)); wm(m_ea, C); } /* SET 2,C=(XY+o) */
-OP(xycb,d2) { D = set(2, rm_reg(m_ea)); wm(m_ea, D); } /* SET 2,D=(XY+o) */
-OP(xycb,d3) { E = set(2, rm_reg(m_ea)); wm(m_ea, E); } /* SET 2,E=(XY+o) */
-OP(xycb,d4) { H = set(2, rm_reg(m_ea)); wm(m_ea, H); } /* SET 2,H=(XY+o) */
-OP(xycb,d5) { L = set(2, rm_reg(m_ea)); wm(m_ea, L); } /* SET 2,L=(XY+o) */
-OP(xycb,d6) { wm(m_ea, set(2, rm_reg(m_ea))); } /* SET 2,(XY+o) */
-OP(xycb,d7) { A = set(2, rm_reg(m_ea)); wm(m_ea, A); } /* SET 2,A=(XY+o) */
-
-OP(xycb,d8) { B = set(3, rm_reg(m_ea)); wm(m_ea, B); } /* SET 3,B=(XY+o) */
-OP(xycb,d9) { C = set(3, rm_reg(m_ea)); wm(m_ea, C); } /* SET 3,C=(XY+o) */
-OP(xycb,da) { D = set(3, rm_reg(m_ea)); wm(m_ea, D); } /* SET 3,D=(XY+o) */
-OP(xycb,db) { E = set(3, rm_reg(m_ea)); wm(m_ea, E); } /* SET 3,E=(XY+o) */
-OP(xycb,dc) { H = set(3, rm_reg(m_ea)); wm(m_ea, H); } /* SET 3,H=(XY+o) */
-OP(xycb,dd) { L = set(3, rm_reg(m_ea)); wm(m_ea, L); } /* SET 3,L=(XY+o) */
-OP(xycb,de) { wm(m_ea, set(3, rm_reg(m_ea))); } /* SET 3,(XY+o) */
-OP(xycb,df) { A = set(3, rm_reg(m_ea)); wm(m_ea, A); } /* SET 3,A=(XY+o) */
-
-OP(xycb,e0) { B = set(4, rm_reg(m_ea)); wm(m_ea, B); } /* SET 4,B=(XY+o) */
-OP(xycb,e1) { C = set(4, rm_reg(m_ea)); wm(m_ea, C); } /* SET 4,C=(XY+o) */
-OP(xycb,e2) { D = set(4, rm_reg(m_ea)); wm(m_ea, D); } /* SET 4,D=(XY+o) */
-OP(xycb,e3) { E = set(4, rm_reg(m_ea)); wm(m_ea, E); } /* SET 4,E=(XY+o) */
-OP(xycb,e4) { H = set(4, rm_reg(m_ea)); wm(m_ea, H); } /* SET 4,H=(XY+o) */
-OP(xycb,e5) { L = set(4, rm_reg(m_ea)); wm(m_ea, L); } /* SET 4,L=(XY+o) */
-OP(xycb,e6) { wm(m_ea, set(4, rm_reg(m_ea))); } /* SET 4,(XY+o) */
-OP(xycb,e7) { A = set(4, rm_reg(m_ea)); wm(m_ea, A); } /* SET 4,A=(XY+o) */
-
-OP(xycb,e8) { B = set(5, rm_reg(m_ea)); wm(m_ea, B); } /* SET 5,B=(XY+o) */
-OP(xycb,e9) { C = set(5, rm_reg(m_ea)); wm(m_ea, C); } /* SET 5,C=(XY+o) */
-OP(xycb,ea) { D = set(5, rm_reg(m_ea)); wm(m_ea, D); } /* SET 5,D=(XY+o) */
-OP(xycb,eb) { E = set(5, rm_reg(m_ea)); wm(m_ea, E); } /* SET 5,E=(XY+o) */
-OP(xycb,ec) { H = set(5, rm_reg(m_ea)); wm(m_ea, H); } /* SET 5,H=(XY+o) */
-OP(xycb,ed) { L = set(5, rm_reg(m_ea)); wm(m_ea, L); } /* SET 5,L=(XY+o) */
-OP(xycb,ee) { wm(m_ea, set(5, rm_reg(m_ea))); } /* SET 5,(XY+o) */
-OP(xycb,ef) { A = set(5, rm_reg(m_ea)); wm(m_ea, A); } /* SET 5,A=(XY+o) */
-
-OP(xycb,f0) { B = set(6, rm_reg(m_ea)); wm(m_ea, B); } /* SET 6,B=(XY+o) */
-OP(xycb,f1) { C = set(6, rm_reg(m_ea)); wm(m_ea, C); } /* SET 6,C=(XY+o) */
-OP(xycb,f2) { D = set(6, rm_reg(m_ea)); wm(m_ea, D); } /* SET 6,D=(XY+o) */
-OP(xycb,f3) { E = set(6, rm_reg(m_ea)); wm(m_ea, E); } /* SET 6,E=(XY+o) */
-OP(xycb,f4) { H = set(6, rm_reg(m_ea)); wm(m_ea, H); } /* SET 6,H=(XY+o) */
-OP(xycb,f5) { L = set(6, rm_reg(m_ea)); wm(m_ea, L); } /* SET 6,L=(XY+o) */
-OP(xycb,f6) { wm(m_ea, set(6, rm_reg(m_ea))); } /* SET 6,(XY+o) */
-OP(xycb,f7) { A = set(6, rm_reg(m_ea)); wm(m_ea, A); } /* SET 6,A=(XY+o) */
-
-OP(xycb,f8) { B = set(7, rm_reg(m_ea)); wm(m_ea, B); } /* SET 7,B=(XY+o) */
-OP(xycb,f9) { C = set(7, rm_reg(m_ea)); wm(m_ea, C); } /* SET 7,C=(XY+o) */
-OP(xycb,fa) { D = set(7, rm_reg(m_ea)); wm(m_ea, D); } /* SET 7,D=(XY+o) */
-OP(xycb,fb) { E = set(7, rm_reg(m_ea)); wm(m_ea, E); } /* SET 7,E=(XY+o) */
-OP(xycb,fc) { H = set(7, rm_reg(m_ea)); wm(m_ea, H); } /* SET 7,H=(XY+o) */
-OP(xycb,fd) { L = set(7, rm_reg(m_ea)); wm(m_ea, L); } /* SET 7,L=(XY+o) */
-OP(xycb,fe) { wm(m_ea, set(7, rm_reg(m_ea))); } /* SET 7,(XY+o) */
-OP(xycb,ff) { A = set(7, rm_reg(m_ea)); wm(m_ea, A); } /* SET 7,A=(XY+o) */
-
-
-/**********************************************************
- * IX register related opcodes (DD prefix)
- **********************************************************/
-OP(dd,00) { illegal_1(); op_00(); } /* DB DD */
-OP(dd,01) { illegal_1(); op_01(); } /* DB DD */
-OP(dd,02) { illegal_1(); op_02(); } /* DB DD */
-OP(dd,03) { illegal_1(); op_03(); } /* DB DD */
-OP(dd,04) { illegal_1(); op_04(); } /* DB DD */
-OP(dd,05) { illegal_1(); op_05(); } /* DB DD */
-OP(dd,06) { illegal_1(); op_06(); } /* DB DD */
-OP(dd,07) { illegal_1(); op_07(); } /* DB DD */
-
-OP(dd,08) { illegal_1(); op_08(); } /* DB DD */
-OP(dd,09) { add16(m_ix, m_bc); } /* ADD IX,BC */
-OP(dd,0a) { illegal_1(); op_0a(); } /* DB DD */
-OP(dd,0b) { illegal_1(); op_0b(); } /* DB DD */
-OP(dd,0c) { illegal_1(); op_0c(); } /* DB DD */
-OP(dd,0d) { illegal_1(); op_0d(); } /* DB DD */
-OP(dd,0e) { illegal_1(); op_0e(); } /* DB DD */
-OP(dd,0f) { illegal_1(); op_0f(); } /* DB DD */
-
-OP(dd,10) { illegal_1(); op_10(); } /* DB DD */
-OP(dd,11) { illegal_1(); op_11(); } /* DB DD */
-OP(dd,12) { illegal_1(); op_12(); } /* DB DD */
-OP(dd,13) { illegal_1(); op_13(); } /* DB DD */
-OP(dd,14) { illegal_1(); op_14(); } /* DB DD */
-OP(dd,15) { illegal_1(); op_15(); } /* DB DD */
-OP(dd,16) { illegal_1(); op_16(); } /* DB DD */
-OP(dd,17) { illegal_1(); op_17(); } /* DB DD */
-
-OP(dd,18) { illegal_1(); op_18(); } /* DB DD */
-OP(dd,19) { add16(m_ix, m_de); } /* ADD IX,DE */
-OP(dd,1a) { illegal_1(); op_1a(); } /* DB DD */
-OP(dd,1b) { illegal_1(); op_1b(); } /* DB DD */
-OP(dd,1c) { illegal_1(); op_1c(); } /* DB DD */
-OP(dd,1d) { illegal_1(); op_1d(); } /* DB DD */
-OP(dd,1e) { illegal_1(); op_1e(); } /* DB DD */
-OP(dd,1f) { illegal_1(); op_1f(); } /* DB DD */
-
-OP(dd,20) { illegal_1(); op_20(); } /* DB DD */
-OP(dd,21) { IX = arg16(); } /* LD IX,w */
-OP(dd,22) { m_ea = arg16(); wm16(m_ea, m_ix); WZ = m_ea + 1; } /* LD (w),IX */
-OP(dd,23) { nomreq_ir(2); IX++; } /* INC IX */
-OP(dd,24) { HX = inc(HX); } /* INC HX */
-OP(dd,25) { HX = dec(HX); } /* DEC HX */
-OP(dd,26) { HX = arg(); } /* LD HX,n */
-OP(dd,27) { illegal_1(); op_27(); } /* DB DD */
-
-OP(dd,28) { illegal_1(); op_28(); } /* DB DD */
-OP(dd,29) { add16(m_ix, m_ix); } /* ADD IX,IX */
-OP(dd,2a) { m_ea = arg16(); rm16(m_ea, m_ix); WZ = m_ea + 1; } /* LD IX,(w) */
-OP(dd,2b) { nomreq_ir(2); IX--; } /* DEC IX */
-OP(dd,2c) { LX = inc(LX); } /* INC LX */
-OP(dd,2d) { LX = dec(LX); } /* DEC LX */
-OP(dd,2e) { LX = arg(); } /* LD LX,n */
-OP(dd,2f) { illegal_1(); op_2f(); } /* DB DD */
-
-OP(dd,30) { illegal_1(); op_30(); } /* DB DD */
-OP(dd,31) { illegal_1(); op_31(); } /* DB DD */
-OP(dd,32) { illegal_1(); op_32(); } /* DB DD */
-OP(dd,33) { illegal_1(); op_33(); } /* DB DD */
-OP(dd,34) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, inc(rm_reg(m_ea))); } /* INC (IX+o) */
-OP(dd,35) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, dec(rm_reg(m_ea))); } /* DEC (IX+o) */
-OP(dd,36) { eax(); u8 a = arg(); nomreq_addr(PCD-1, 2); wm(m_ea, a); } /* LD (IX+o),n */
-OP(dd,37) { illegal_1(); op_37(); } /* DB DD */
-
-OP(dd,38) { illegal_1(); op_38(); } /* DB DD */
-OP(dd,39) { add16(m_ix, m_sp); } /* ADD IX,SP */
-OP(dd,3a) { illegal_1(); op_3a(); } /* DB DD */
-OP(dd,3b) { illegal_1(); op_3b(); } /* DB DD */
-OP(dd,3c) { illegal_1(); op_3c(); } /* DB DD */
-OP(dd,3d) { illegal_1(); op_3d(); } /* DB DD */
-OP(dd,3e) { illegal_1(); op_3e(); } /* DB DD */
-OP(dd,3f) { illegal_1(); op_3f(); } /* DB DD */
-
-OP(dd,40) { illegal_1(); op_40(); } /* DB DD */
-OP(dd,41) { illegal_1(); op_41(); } /* DB DD */
-OP(dd,42) { illegal_1(); op_42(); } /* DB DD */
-OP(dd,43) { illegal_1(); op_43(); } /* DB DD */
-OP(dd,44) { B = HX; } /* LD B,HX */
-OP(dd,45) { B = LX; } /* LD B,LX */
-OP(dd,46) { eax(); nomreq_addr(PCD-1, 5); B = rm(m_ea); } /* LD B,(IX+o) */
-OP(dd,47) { illegal_1(); op_47(); } /* DB DD */
-
-OP(dd,48) { illegal_1(); op_48(); } /* DB DD */
-OP(dd,49) { illegal_1(); op_49(); } /* DB DD */
-OP(dd,4a) { illegal_1(); op_4a(); } /* DB DD */
-OP(dd,4b) { illegal_1(); op_4b(); } /* DB DD */
-OP(dd,4c) { C = HX; } /* LD C,HX */
-OP(dd,4d) { C = LX; } /* LD C,LX */
-OP(dd,4e) { eax(); nomreq_addr(PCD-1, 5); C = rm(m_ea); } /* LD C,(IX+o) */
-OP(dd,4f) { illegal_1(); op_4f(); } /* DB DD */
-
-OP(dd,50) { illegal_1(); op_50(); } /* DB DD */
-OP(dd,51) { illegal_1(); op_51(); } /* DB DD */
-OP(dd,52) { illegal_1(); op_52(); } /* DB DD */
-OP(dd,53) { illegal_1(); op_53(); } /* DB DD */
-OP(dd,54) { D = HX; } /* LD D,HX */
-OP(dd,55) { D = LX; } /* LD D,LX */
-OP(dd,56) { eax(); nomreq_addr(PCD-1, 5); D = rm(m_ea); } /* LD D,(IX+o) */
-OP(dd,57) { illegal_1(); op_57(); } /* DB DD */
-
-OP(dd,58) { illegal_1(); op_58(); } /* DB DD */
-OP(dd,59) { illegal_1(); op_59(); } /* DB DD */
-OP(dd,5a) { illegal_1(); op_5a(); } /* DB DD */
-OP(dd,5b) { illegal_1(); op_5b(); } /* DB DD */
-OP(dd,5c) { E = HX; } /* LD E,HX */
-OP(dd,5d) { E = LX; } /* LD E,LX */
-OP(dd,5e) { eax(); nomreq_addr(PCD-1, 5); E = rm(m_ea); } /* LD E,(IX+o) */
-OP(dd,5f) { illegal_1(); op_5f(); } /* DB DD */
-
-OP(dd,60) { HX = B; } /* LD HX,B */
-OP(dd,61) { HX = C; } /* LD HX,C */
-OP(dd,62) { HX = D; } /* LD HX,D */
-OP(dd,63) { HX = E; } /* LD HX,E */
-OP(dd,64) { } /* LD HX,HX */
-OP(dd,65) { HX = LX; } /* LD HX,LX */
-OP(dd,66) { eax(); nomreq_addr(PCD-1, 5); H = rm(m_ea); } /* LD H,(IX+o) */
-OP(dd,67) { HX = A; } /* LD HX,A */
-
-OP(dd,68) { LX = B; } /* LD LX,B */
-OP(dd,69) { LX = C; } /* LD LX,C */
-OP(dd,6a) { LX = D; } /* LD LX,D */
-OP(dd,6b) { LX = E; } /* LD LX,E */
-OP(dd,6c) { LX = HX; } /* LD LX,HX */
-OP(dd,6d) { } /* LD LX,LX */
-OP(dd,6e) { eax(); nomreq_addr(PCD-1, 5); L = rm(m_ea); } /* LD L,(IX+o) */
-OP(dd,6f) { LX = A; } /* LD LX,A */
-
-OP(dd,70) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, B); } /* LD (IX+o),B */
-OP(dd,71) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, C); } /* LD (IX+o),C */
-OP(dd,72) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, D); } /* LD (IX+o),D */
-OP(dd,73) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, E); } /* LD (IX+o),E */
-OP(dd,74) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, H); } /* LD (IX+o),H */
-OP(dd,75) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, L); } /* LD (IX+o),L */
-OP(dd,76) { illegal_1(); op_76(); } /* DB DD */
-OP(dd,77) { eax(); nomreq_addr(PCD-1, 5); wm(m_ea, A); } /* LD (IX+o),A */
-
-OP(dd,78) { illegal_1(); op_78(); } /* DB DD */
-OP(dd,79) { illegal_1(); op_79(); } /* DB DD */
-OP(dd,7a) { illegal_1(); op_7a(); } /* DB DD */
-OP(dd,7b) { illegal_1(); op_7b(); } /* DB DD */
-OP(dd,7c) { A = HX; } /* LD A,HX */
-OP(dd,7d) { A = LX; } /* LD A,LX */
-OP(dd,7e) { eax(); nomreq_addr(PCD-1, 5); A = rm(m_ea); } /* LD A,(IX+o) */
-OP(dd,7f) { illegal_1(); op_7f(); } /* DB DD */
-
-OP(dd,80) { illegal_1(); op_80(); } /* DB DD */
-OP(dd,81) { illegal_1(); op_81(); } /* DB DD */
-OP(dd,82) { illegal_1(); op_82(); } /* DB DD */
-OP(dd,83) { illegal_1(); op_83(); } /* DB DD */
-OP(dd,84) { add_a(HX); } /* ADD A,HX */
-OP(dd,85) { add_a(LX); } /* ADD A,LX */
-OP(dd,86) { eax(); nomreq_addr(PCD-1, 5); add_a(rm(m_ea)); } /* ADD A,(IX+o) */
-OP(dd,87) { illegal_1(); op_87(); } /* DB DD */
-
-OP(dd,88) { illegal_1(); op_88(); } /* DB DD */
-OP(dd,89) { illegal_1(); op_89(); } /* DB DD */
-OP(dd,8a) { illegal_1(); op_8a(); } /* DB DD */
-OP(dd,8b) { illegal_1(); op_8b(); } /* DB DD */
-OP(dd,8c) { adc_a(HX); } /* ADC A,HX */
-OP(dd,8d) { adc_a(LX); } /* ADC A,LX */
-OP(dd,8e) { eax(); nomreq_addr(PCD-1, 5); adc_a(rm(m_ea)); } /* ADC A,(IX+o) */
-OP(dd,8f) { illegal_1(); op_8f(); } /* DB DD */
-
-OP(dd,90) { illegal_1(); op_90(); } /* DB DD */
-OP(dd,91) { illegal_1(); op_91(); } /* DB DD */
-OP(dd,92) { illegal_1(); op_92(); } /* DB DD */
-OP(dd,93) { illegal_1(); op_93(); } /* DB DD */
-OP(dd,94) { sub(HX); } /* SUB HX */
-OP(dd,95) { sub(LX); } /* SUB LX */
-OP(dd,96) { eax(); nomreq_addr(PCD-1, 5); sub(rm(m_ea)); } /* SUB (IX+o) */
-OP(dd,97) { illegal_1(); op_97(); } /* DB DD */
-
-OP(dd,98) { illegal_1(); op_98(); } /* DB DD */
-OP(dd,99) { illegal_1(); op_99(); } /* DB DD */
-OP(dd,9a) { illegal_1(); op_9a(); } /* DB DD */
-OP(dd,9b) { illegal_1(); op_9b(); } /* DB DD */
-OP(dd,9c) { sbc_a(HX); } /* SBC A,HX */
-OP(dd,9d) { sbc_a(LX); } /* SBC A,LX */
-OP(dd,9e) { eax(); nomreq_addr(PCD-1, 5); sbc_a(rm(m_ea)); } /* SBC A,(IX+o) */
-OP(dd,9f) { illegal_1(); op_9f(); } /* DB DD */
-
-OP(dd,a0) { illegal_1(); op_a0(); } /* DB DD */
-OP(dd,a1) { illegal_1(); op_a1(); } /* DB DD */
-OP(dd,a2) { illegal_1(); op_a2(); } /* DB DD */
-OP(dd,a3) { illegal_1(); op_a3(); } /* DB DD */
-OP(dd,a4) { and_a(HX); } /* AND HX */
-OP(dd,a5) { and_a(LX); } /* AND LX */
-OP(dd,a6) { eax(); nomreq_addr(PCD-1, 5); and_a(rm(m_ea)); } /* AND (IX+o) */
-OP(dd,a7) { illegal_1(); op_a7(); } /* DB DD */
-
-OP(dd,a8) { illegal_1(); op_a8(); } /* DB DD */
-OP(dd,a9) { illegal_1(); op_a9(); } /* DB DD */
-OP(dd,aa) { illegal_1(); op_aa(); } /* DB DD */
-OP(dd,ab) { illegal_1(); op_ab(); } /* DB DD */
-OP(dd,ac) { xor_a(HX); } /* XOR HX */
-OP(dd,ad) { xor_a(LX); } /* XOR LX */
-OP(dd,ae) { eax(); nomreq_addr(PCD-1, 5); xor_a(rm(m_ea)); } /* XOR (IX+o) */
-OP(dd,af) { illegal_1(); op_af(); } /* DB DD */
-
-OP(dd,b0) { illegal_1(); op_b0(); } /* DB DD */
-OP(dd,b1) { illegal_1(); op_b1(); } /* DB DD */
-OP(dd,b2) { illegal_1(); op_b2(); } /* DB DD */
-OP(dd,b3) { illegal_1(); op_b3(); } /* DB DD */
-OP(dd,b4) { or_a(HX); } /* OR HX */
-OP(dd,b5) { or_a(LX); } /* OR LX */
-OP(dd,b6) { eax(); nomreq_addr(PCD-1, 5); or_a(rm(m_ea)); } /* OR (IX+o) */
-OP(dd,b7) { illegal_1(); op_b7(); } /* DB DD */
-
-OP(dd,b8) { illegal_1(); op_b8(); } /* DB DD */
-OP(dd,b9) { illegal_1(); op_b9(); } /* DB DD */
-OP(dd,ba) { illegal_1(); op_ba(); } /* DB DD */
-OP(dd,bb) { illegal_1(); op_bb(); } /* DB DD */
-OP(dd,bc) { cp(HX); } /* CP HX */
-OP(dd,bd) { cp(LX); } /* CP LX */
-OP(dd,be) { eax(); nomreq_addr(PCD-1, 5); cp(rm(m_ea)); } /* CP (IX+o) */
-OP(dd,bf) { illegal_1(); op_bf(); } /* DB DD */
-
-OP(dd,c0) { illegal_1(); op_c0(); } /* DB DD */
-OP(dd,c1) { illegal_1(); op_c1(); } /* DB DD */
-OP(dd,c2) { illegal_1(); op_c2(); } /* DB DD */
-OP(dd,c3) { illegal_1(); op_c3(); } /* DB DD */
-OP(dd,c4) { illegal_1(); op_c4(); } /* DB DD */
-OP(dd,c5) { illegal_1(); op_c5(); } /* DB DD */
-OP(dd,c6) { illegal_1(); op_c6(); } /* DB DD */
-OP(dd,c7) { illegal_1(); op_c7(); } /* DB DD */
-
-OP(dd,c8) { illegal_1(); op_c8(); } /* DB DD */
-OP(dd,c9) { illegal_1(); op_c9(); } /* DB DD */
-OP(dd,ca) { illegal_1(); op_ca(); } /* DB DD */
-OP(dd,cb) { eax(); u8 a = arg(); nomreq_addr(PCD-1, 2); EXEC(xycb, a); } /* ** DD CB xx */
-OP(dd,cc) { illegal_1(); op_cc(); } /* DB DD */
-OP(dd,cd) { illegal_1(); op_cd(); } /* DB DD */
-OP(dd,ce) { illegal_1(); op_ce(); } /* DB DD */
-OP(dd,cf) { illegal_1(); op_cf(); } /* DB DD */
-
-OP(dd,d0) { illegal_1(); op_d0(); } /* DB DD */
-OP(dd,d1) { illegal_1(); op_d1(); } /* DB DD */
-OP(dd,d2) { illegal_1(); op_d2(); } /* DB DD */
-OP(dd,d3) { illegal_1(); op_d3(); } /* DB DD */
-OP(dd,d4) { illegal_1(); op_d4(); } /* DB DD */
-OP(dd,d5) { illegal_1(); op_d5(); } /* DB DD */
-OP(dd,d6) { illegal_1(); op_d6(); } /* DB DD */
-OP(dd,d7) { illegal_1(); op_d7(); } /* DB DD */
-
-OP(dd,d8) { illegal_1(); op_d8(); } /* DB DD */
-OP(dd,d9) { illegal_1(); op_d9(); } /* DB DD */
-OP(dd,da) { illegal_1(); op_da(); } /* DB DD */
-OP(dd,db) { illegal_1(); op_db(); } /* DB DD */
-OP(dd,dc) { illegal_1(); op_dc(); } /* DB DD */
-OP(dd,dd) { illegal_1(); op_dd(); } /* DB DD */
-OP(dd,de) { illegal_1(); op_de(); } /* DB DD */
-OP(dd,df) { illegal_1(); op_df(); } /* DB DD */
-
-OP(dd,e0) { illegal_1(); op_e0(); } /* DB DD */
-OP(dd,e1) { pop(m_ix); } /* POP IX */
-OP(dd,e2) { illegal_1(); op_e2(); } /* DB DD */
-OP(dd,e3) { ex_sp(m_ix); } /* EX (SP),IX */
-OP(dd,e4) { illegal_1(); op_e4(); } /* DB DD */
-OP(dd,e5) { push(m_ix); } /* PUSH IX */
-OP(dd,e6) { illegal_1(); op_e6(); } /* DB DD */
-OP(dd,e7) { illegal_1(); op_e7(); } /* DB DD */
-
-OP(dd,e8) { illegal_1(); op_e8(); } /* DB DD */
-OP(dd,e9) { PC = IX; } /* JP (IX) */
-OP(dd,ea) { illegal_1(); op_ea(); } /* DB DD */
-OP(dd,eb) { illegal_1(); op_eb(); } /* DB DD */
-OP(dd,ec) { illegal_1(); op_ec(); } /* DB DD */
-OP(dd,ed) { illegal_1(); op_ed(); } /* DB DD */
-OP(dd,ee) { illegal_1(); op_ee(); } /* DB DD */
-OP(dd,ef) { illegal_1(); op_ef(); } /* DB DD */
-
-OP(dd,f0) { illegal_1(); op_f0(); } /* DB DD */
-OP(dd,f1) { illegal_1(); op_f1(); } /* DB DD */
-OP(dd,f2) { illegal_1(); op_f2(); } /* DB DD */
-OP(dd,f3) { illegal_1(); op_f3(); } /* DB DD */
-OP(dd,f4) { illegal_1(); op_f4(); } /* DB DD */
-OP(dd,f5) { illegal_1(); op_f5(); } /* DB DD */
-OP(dd,f6) { illegal_1(); op_f6(); } /* DB DD */
-OP(dd,f7) { illegal_1(); op_f7(); } /* DB DD */
-
-OP(dd,f8) { illegal_1(); op_f8(); } /* DB DD */
-OP(dd,f9) { nomreq_ir(2); SP = IX; } /* LD SP,IX */
-OP(dd,fa) { illegal_1(); op_fa(); } /* DB DD */
-OP(dd,fb) { illegal_1(); op_fb(); } /* DB DD */
-OP(dd,fc) { illegal_1(); op_fc(); } /* DB DD */
-OP(dd,fd) { illegal_1(); op_fd(); } /* DB DD */
-OP(dd,fe) { illegal_1(); op_fe(); } /* DB DD */
-OP(dd,ff) { illegal_1(); op_ff(); } /* DB DD */
-
-/**********************************************************
- * IY register related opcodes (FD prefix)
- **********************************************************/
-OP(fd,00) { illegal_1(); op_00(); } /* DB FD */
-OP(fd,01) { illegal_1(); op_01(); } /* DB FD */
-OP(fd,02) { illegal_1(); op_02(); } /* DB FD */
-OP(fd,03) { illegal_1(); op_03(); } /* DB FD */
-OP(fd,04) { illegal_1(); op_04(); } /* DB FD */
-OP(fd,05) { illegal_1(); op_05(); } /* DB FD */
-OP(fd,06) { illegal_1(); op_06(); } /* DB FD */
-OP(fd,07) { illegal_1(); op_07(); } /* DB FD */
-
-OP(fd,08) { illegal_1(); op_08(); } /* DB FD */
-OP(fd,09) { add16(m_iy, m_bc); } /* ADD IY,BC */
-OP(fd,0a) { illegal_1(); op_0a(); } /* DB FD */
-OP(fd,0b) { illegal_1(); op_0b(); } /* DB FD */
-OP(fd,0c) { illegal_1(); op_0c(); } /* DB FD */
-OP(fd,0d) { illegal_1(); op_0d(); } /* DB FD */
-OP(fd,0e) { illegal_1(); op_0e(); } /* DB FD */
-OP(fd,0f) { illegal_1(); op_0f(); } /* DB FD */
-
-OP(fd,10) { illegal_1(); op_10(); } /* DB FD */
-OP(fd,11) { illegal_1(); op_11(); } /* DB FD */
-OP(fd,12) { illegal_1(); op_12(); } /* DB FD */
-OP(fd,13) { illegal_1(); op_13(); } /* DB FD */
-OP(fd,14) { illegal_1(); op_14(); } /* DB FD */
-OP(fd,15) { illegal_1(); op_15(); } /* DB FD */
-OP(fd,16) { illegal_1(); op_16(); } /* DB FD */
-OP(fd,17) { illegal_1(); op_17(); } /* DB FD */
-
-OP(fd,18) { illegal_1(); op_18(); } /* DB FD */
-OP(fd,19) { add16(m_iy, m_de); } /* ADD IY,DE */
-OP(fd,1a) { illegal_1(); op_1a(); } /* DB FD */
-OP(fd,1b) { illegal_1(); op_1b(); } /* DB FD */
-OP(fd,1c) { illegal_1(); op_1c(); } /* DB FD */
-OP(fd,1d) { illegal_1(); op_1d(); } /* DB FD */
-OP(fd,1e) { illegal_1(); op_1e(); } /* DB FD */
-OP(fd,1f) { illegal_1(); op_1f(); } /* DB FD */
-
-OP(fd,20) { illegal_1(); op_20(); } /* DB FD */
-OP(fd,21) { IY = arg16(); } /* LD IY,w */
-OP(fd,22) { m_ea = arg16(); wm16(m_ea, m_iy); WZ = m_ea + 1; } /* LD (w),IY */
-OP(fd,23) { nomreq_ir(2); IY++; } /* INC IY */
-OP(fd,24) { HY = inc(HY); } /* INC HY */
-OP(fd,25) { HY = dec(HY); } /* DEC HY */
-OP(fd,26) { HY = arg(); } /* LD HY,n */
-OP(fd,27) { illegal_1(); op_27(); } /* DB FD */
-
-OP(fd,28) { illegal_1(); op_28(); } /* DB FD */
-OP(fd,29) { add16(m_iy, m_iy); } /* ADD IY,IY */
-OP(fd,2a) { m_ea = arg16(); rm16(m_ea, m_iy); WZ = m_ea + 1; } /* LD IY,(w) */
-OP(fd,2b) { nomreq_ir(2); IY--; } /* DEC IY */
-OP(fd,2c) { LY = inc(LY); } /* INC LY */
-OP(fd,2d) { LY = dec(LY); } /* DEC LY */
-OP(fd,2e) { LY = arg(); } /* LD LY,n */
-OP(fd,2f) { illegal_1(); op_2f(); } /* DB FD */
-
-OP(fd,30) { illegal_1(); op_30(); } /* DB FD */
-OP(fd,31) { illegal_1(); op_31(); } /* DB FD */
-OP(fd,32) { illegal_1(); op_32(); } /* DB FD */
-OP(fd,33) { illegal_1(); op_33(); } /* DB FD */
-OP(fd,34) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, inc(rm_reg(m_ea))); } /* INC (IY+o) */
-OP(fd,35) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, dec(rm_reg(m_ea))); } /* DEC (IY+o) */
-OP(fd,36) { eay(); u8 a = arg(); nomreq_addr(PCD-1, 2); wm(m_ea, a); } /* LD (IY+o),n */
-OP(fd,37) { illegal_1(); op_37(); } /* DB FD */
-
-OP(fd,38) { illegal_1(); op_38(); } /* DB FD */
-OP(fd,39) { add16(m_iy, m_sp); } /* ADD IY,SP */
-OP(fd,3a) { illegal_1(); op_3a(); } /* DB FD */
-OP(fd,3b) { illegal_1(); op_3b(); } /* DB FD */
-OP(fd,3c) { illegal_1(); op_3c(); } /* DB FD */
-OP(fd,3d) { illegal_1(); op_3d(); } /* DB FD */
-OP(fd,3e) { illegal_1(); op_3e(); } /* DB FD */
-OP(fd,3f) { illegal_1(); op_3f(); } /* DB FD */
-
-OP(fd,40) { illegal_1(); op_40(); } /* DB FD */
-OP(fd,41) { illegal_1(); op_41(); } /* DB FD */
-OP(fd,42) { illegal_1(); op_42(); } /* DB FD */
-OP(fd,43) { illegal_1(); op_43(); } /* DB FD */
-OP(fd,44) { B = HY; } /* LD B,HY */
-OP(fd,45) { B = LY; } /* LD B,LY */
-OP(fd,46) { eay(); nomreq_addr(PCD-1, 5); B = rm(m_ea); } /* LD B,(IY+o) */
-OP(fd,47) { illegal_1(); op_47(); } /* DB FD */
-
-OP(fd,48) { illegal_1(); op_48(); } /* DB FD */
-OP(fd,49) { illegal_1(); op_49(); } /* DB FD */
-OP(fd,4a) { illegal_1(); op_4a(); } /* DB FD */
-OP(fd,4b) { illegal_1(); op_4b(); } /* DB FD */
-OP(fd,4c) { C = HY; } /* LD C,HY */
-OP(fd,4d) { C = LY; } /* LD C,LY */
-OP(fd,4e) { eay(); nomreq_addr(PCD-1, 5); C = rm(m_ea); } /* LD C,(IY+o) */
-OP(fd,4f) { illegal_1(); op_4f(); } /* DB FD */
-
-OP(fd,50) { illegal_1(); op_50(); } /* DB FD */
-OP(fd,51) { illegal_1(); op_51(); } /* DB FD */
-OP(fd,52) { illegal_1(); op_52(); } /* DB FD */
-OP(fd,53) { illegal_1(); op_53(); } /* DB FD */
-OP(fd,54) { D = HY; } /* LD D,HY */
-OP(fd,55) { D = LY; } /* LD D,LY */
-OP(fd,56) { eay(); nomreq_addr(PCD-1, 5); D = rm(m_ea); } /* LD D,(IY+o) */
-OP(fd,57) { illegal_1(); op_57(); } /* DB FD */
-
-OP(fd,58) { illegal_1(); op_58(); } /* DB FD */
-OP(fd,59) { illegal_1(); op_59(); } /* DB FD */
-OP(fd,5a) { illegal_1(); op_5a(); } /* DB FD */
-OP(fd,5b) { illegal_1(); op_5b(); } /* DB FD */
-OP(fd,5c) { E = HY; } /* LD E,HY */
-OP(fd,5d) { E = LY; } /* LD E,LY */
-OP(fd,5e) { eay(); nomreq_addr(PCD-1, 5); E = rm(m_ea); } /* LD E,(IY+o) */
-OP(fd,5f) { illegal_1(); op_5f(); } /* DB FD */
-
-OP(fd,60) { HY = B; } /* LD HY,B */
-OP(fd,61) { HY = C; } /* LD HY,C */
-OP(fd,62) { HY = D; } /* LD HY,D */
-OP(fd,63) { HY = E; } /* LD HY,E */
-OP(fd,64) { } /* LD HY,HY */
-OP(fd,65) { HY = LY; } /* LD HY,LY */
-OP(fd,66) { eay(); nomreq_addr(PCD-1, 5); H = rm(m_ea); } /* LD H,(IY+o) */
-OP(fd,67) { HY = A; } /* LD HY,A */
-
-OP(fd,68) { LY = B; } /* LD LY,B */
-OP(fd,69) { LY = C; } /* LD LY,C */
-OP(fd,6a) { LY = D; } /* LD LY,D */
-OP(fd,6b) { LY = E; } /* LD LY,E */
-OP(fd,6c) { LY = HY; } /* LD LY,HY */
-OP(fd,6d) { } /* LD LY,LY */
-OP(fd,6e) { eay(); nomreq_addr(PCD-1, 5); L = rm(m_ea); } /* LD L,(IY+o) */
-OP(fd,6f) { LY = A; } /* LD LY,A */
-
-OP(fd,70) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, B); } /* LD (IY+o),B */
-OP(fd,71) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, C); } /* LD (IY+o),C */
-OP(fd,72) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, D); } /* LD (IY+o),D */
-OP(fd,73) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, E); } /* LD (IY+o),E */
-OP(fd,74) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, H); } /* LD (IY+o),H */
-OP(fd,75) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, L); } /* LD (IY+o),L */
-OP(fd,76) { illegal_1(); op_76(); } /* DB FD */
-OP(fd,77) { eay(); nomreq_addr(PCD-1, 5); wm(m_ea, A); } /* LD (IY+o),A */
-
-OP(fd,78) { illegal_1(); op_78(); } /* DB FD */
-OP(fd,79) { illegal_1(); op_79(); } /* DB FD */
-OP(fd,7a) { illegal_1(); op_7a(); } /* DB FD */
-OP(fd,7b) { illegal_1(); op_7b(); } /* DB FD */
-OP(fd,7c) { A = HY; } /* LD A,HY */
-OP(fd,7d) { A = LY; } /* LD A,LY */
-OP(fd,7e) { eay(); nomreq_addr(PCD-1, 5); A = rm(m_ea); } /* LD A,(IY+o) */
-OP(fd,7f) { illegal_1(); op_7f(); } /* DB FD */
-
-OP(fd,80) { illegal_1(); op_80(); } /* DB FD */
-OP(fd,81) { illegal_1(); op_81(); } /* DB FD */
-OP(fd,82) { illegal_1(); op_82(); } /* DB FD */
-OP(fd,83) { illegal_1(); op_83(); } /* DB FD */
-OP(fd,84) { add_a(HY); } /* ADD A,HY */
-OP(fd,85) { add_a(LY); } /* ADD A,LY */
-OP(fd,86) { eay(); nomreq_addr(PCD-1, 5); add_a(rm(m_ea)); } /* ADD A,(IY+o) */
-OP(fd,87) { illegal_1(); op_87(); } /* DB FD */
-
-OP(fd,88) { illegal_1(); op_88(); } /* DB FD */
-OP(fd,89) { illegal_1(); op_89(); } /* DB FD */
-OP(fd,8a) { illegal_1(); op_8a(); } /* DB FD */
-OP(fd,8b) { illegal_1(); op_8b(); } /* DB FD */
-OP(fd,8c) { adc_a(HY); } /* ADC A,HY */
-OP(fd,8d) { adc_a(LY); } /* ADC A,LY */
-OP(fd,8e) { eay(); nomreq_addr(PCD-1, 5); adc_a(rm(m_ea)); } /* ADC A,(IY+o) */
-OP(fd,8f) { illegal_1(); op_8f(); } /* DB FD */
-
-OP(fd,90) { illegal_1(); op_90(); } /* DB FD */
-OP(fd,91) { illegal_1(); op_91(); } /* DB FD */
-OP(fd,92) { illegal_1(); op_92(); } /* DB FD */
-OP(fd,93) { illegal_1(); op_93(); } /* DB FD */
-OP(fd,94) { sub(HY); } /* SUB HY */
-OP(fd,95) { sub(LY); } /* SUB LY */
-OP(fd,96) { eay(); nomreq_addr(PCD-1, 5); sub(rm(m_ea)); } /* SUB (IY+o) */
-OP(fd,97) { illegal_1(); op_97(); } /* DB FD */
-
-OP(fd,98) { illegal_1(); op_98(); } /* DB FD */
-OP(fd,99) { illegal_1(); op_99(); } /* DB FD */
-OP(fd,9a) { illegal_1(); op_9a(); } /* DB FD */
-OP(fd,9b) { illegal_1(); op_9b(); } /* DB FD */
-OP(fd,9c) { sbc_a(HY); } /* SBC A,HY */
-OP(fd,9d) { sbc_a(LY); } /* SBC A,LY */
-OP(fd,9e) { eay(); nomreq_addr(PCD-1, 5); sbc_a(rm(m_ea)); } /* SBC A,(IY+o) */
-OP(fd,9f) { illegal_1(); op_9f(); } /* DB FD */
-
-OP(fd,a0) { illegal_1(); op_a0(); } /* DB FD */
-OP(fd,a1) { illegal_1(); op_a1(); } /* DB FD */
-OP(fd,a2) { illegal_1(); op_a2(); } /* DB FD */
-OP(fd,a3) { illegal_1(); op_a3(); } /* DB FD */
-OP(fd,a4) { and_a(HY); } /* AND HY */
-OP(fd,a5) { and_a(LY); } /* AND LY */
-OP(fd,a6) { eay(); nomreq_addr(PCD-1, 5); and_a(rm(m_ea)); } /* AND (IY+o) */
-OP(fd,a7) { illegal_1(); op_a7(); } /* DB FD */
-
-OP(fd,a8) { illegal_1(); op_a8(); } /* DB FD */
-OP(fd,a9) { illegal_1(); op_a9(); } /* DB FD */
-OP(fd,aa) { illegal_1(); op_aa(); } /* DB FD */
-OP(fd,ab) { illegal_1(); op_ab(); } /* DB FD */
-OP(fd,ac) { xor_a(HY); } /* XOR HY */
-OP(fd,ad) { xor_a(LY); } /* XOR LY */
-OP(fd,ae) { eay(); nomreq_addr(PCD-1, 5); xor_a(rm(m_ea)); } /* XOR (IY+o) */
-OP(fd,af) { illegal_1(); op_af(); } /* DB FD */
-
-OP(fd,b0) { illegal_1(); op_b0(); } /* DB FD */
-OP(fd,b1) { illegal_1(); op_b1(); } /* DB FD */
-OP(fd,b2) { illegal_1(); op_b2(); } /* DB FD */
-OP(fd,b3) { illegal_1(); op_b3(); } /* DB FD */
-OP(fd,b4) { or_a(HY); } /* OR HY */
-OP(fd,b5) { or_a(LY); } /* OR LY */
-OP(fd,b6) { eay(); nomreq_addr(PCD-1, 5); or_a(rm(m_ea)); } /* OR (IY+o) */
-OP(fd,b7) { illegal_1(); op_b7(); } /* DB FD */
-
-OP(fd,b8) { illegal_1(); op_b8(); } /* DB FD */
-OP(fd,b9) { illegal_1(); op_b9(); } /* DB FD */
-OP(fd,ba) { illegal_1(); op_ba(); } /* DB FD */
-OP(fd,bb) { illegal_1(); op_bb(); } /* DB FD */
-OP(fd,bc) { cp(HY); } /* CP HY */
-OP(fd,bd) { cp(LY); } /* CP LY */
-OP(fd,be) { eay(); nomreq_addr(PCD-1, 5); cp(rm(m_ea)); } /* CP (IY+o) */
-OP(fd,bf) { illegal_1(); op_bf(); } /* DB FD */
-
-OP(fd,c0) { illegal_1(); op_c0(); } /* DB FD */
-OP(fd,c1) { illegal_1(); op_c1(); } /* DB FD */
-OP(fd,c2) { illegal_1(); op_c2(); } /* DB FD */
-OP(fd,c3) { illegal_1(); op_c3(); } /* DB FD */
-OP(fd,c4) { illegal_1(); op_c4(); } /* DB FD */
-OP(fd,c5) { illegal_1(); op_c5(); } /* DB FD */
-OP(fd,c6) { illegal_1(); op_c6(); } /* DB FD */
-OP(fd,c7) { illegal_1(); op_c7(); } /* DB FD */
-
-OP(fd,c8) { illegal_1(); op_c8(); } /* DB FD */
-OP(fd,c9) { illegal_1(); op_c9(); } /* DB FD */
-OP(fd,ca) { illegal_1(); op_ca(); } /* DB FD */
-OP(fd,cb) { eay(); u8 a = arg(); nomreq_addr(PCD-1, 2); EXEC(xycb, a); } /* ** FD CB xx */
-OP(fd,cc) { illegal_1(); op_cc(); } /* DB FD */
-OP(fd,cd) { illegal_1(); op_cd(); } /* DB FD */
-OP(fd,ce) { illegal_1(); op_ce(); } /* DB FD */
-OP(fd,cf) { illegal_1(); op_cf(); } /* DB FD */
-
-OP(fd,d0) { illegal_1(); op_d0(); } /* DB FD */
-OP(fd,d1) { illegal_1(); op_d1(); } /* DB FD */
-OP(fd,d2) { illegal_1(); op_d2(); } /* DB FD */
-OP(fd,d3) { illegal_1(); op_d3(); } /* DB FD */
-OP(fd,d4) { illegal_1(); op_d4(); } /* DB FD */
-OP(fd,d5) { illegal_1(); op_d5(); } /* DB FD */
-OP(fd,d6) { illegal_1(); op_d6(); } /* DB FD */
-OP(fd,d7) { illegal_1(); op_d7(); } /* DB FD */
-
-OP(fd,d8) { illegal_1(); op_d8(); } /* DB FD */
-OP(fd,d9) { illegal_1(); op_d9(); } /* DB FD */
-OP(fd,da) { illegal_1(); op_da(); } /* DB FD */
-OP(fd,db) { illegal_1(); op_db(); } /* DB FD */
-OP(fd,dc) { illegal_1(); op_dc(); } /* DB FD */
-OP(fd,dd) { illegal_1(); op_dd(); } /* DB FD */
-OP(fd,de) { illegal_1(); op_de(); } /* DB FD */
-OP(fd,df) { illegal_1(); op_df(); } /* DB FD */
-
-OP(fd,e0) { illegal_1(); op_e0(); } /* DB FD */
-OP(fd,e1) { pop(m_iy); } /* POP IY */
-OP(fd,e2) { illegal_1(); op_e2(); } /* DB FD */
-OP(fd,e3) { ex_sp(m_iy); } /* EX (SP),IY */
-OP(fd,e4) { illegal_1(); op_e4(); } /* DB FD */
-OP(fd,e5) { push(m_iy); } /* PUSH IY */
-OP(fd,e6) { illegal_1(); op_e6(); } /* DB FD */
-OP(fd,e7) { illegal_1(); op_e7(); } /* DB FD */
-
-OP(fd,e8) { illegal_1(); op_e8(); } /* DB FD */
-OP(fd,e9) { PC = IY; } /* JP (IY) */
-OP(fd,ea) { illegal_1(); op_ea(); } /* DB FD */
-OP(fd,eb) { illegal_1(); op_eb(); } /* DB FD */
-OP(fd,ec) { illegal_1(); op_ec(); } /* DB FD */
-OP(fd,ed) { illegal_1(); op_ed(); } /* DB FD */
-OP(fd,ee) { illegal_1(); op_ee(); } /* DB FD */
-OP(fd,ef) { illegal_1(); op_ef(); } /* DB FD */
-
-OP(fd,f0) { illegal_1(); op_f0(); } /* DB FD */
-OP(fd,f1) { illegal_1(); op_f1(); } /* DB FD */
-OP(fd,f2) { illegal_1(); op_f2(); } /* DB FD */
-OP(fd,f3) { illegal_1(); op_f3(); } /* DB FD */
-OP(fd,f4) { illegal_1(); op_f4(); } /* DB FD */
-OP(fd,f5) { illegal_1(); op_f5(); } /* DB FD */
-OP(fd,f6) { illegal_1(); op_f6(); } /* DB FD */
-OP(fd,f7) { illegal_1(); op_f7(); } /* DB FD */
-
-OP(fd,f8) { illegal_1(); op_f8(); } /* DB FD */
-OP(fd,f9) { nomreq_ir(2); SP = IY; } /* LD SP,IY */
-OP(fd,fa) { illegal_1(); op_fa(); } /* DB FD */
-OP(fd,fb) { illegal_1(); op_fb(); } /* DB FD */
-OP(fd,fc) { illegal_1(); op_fc(); } /* DB FD */
-OP(fd,fd) { illegal_1(); op_fd(); } /* DB FD */
-OP(fd,fe) { illegal_1(); op_fe(); } /* DB FD */
-OP(fd,ff) { illegal_1(); op_ff(); } /* DB FD */
-
-
-/**********************************************************
- * special opcodes (ED prefix)
- **********************************************************/
-OP(ed,00) { illegal_2(); } /* DB ED */
-OP(ed,01) { illegal_2(); } /* DB ED */
-OP(ed,02) { illegal_2(); } /* DB ED */
-OP(ed,03) { illegal_2(); } /* DB ED */
-OP(ed,04) { illegal_2(); } /* DB ED */
-OP(ed,05) { illegal_2(); } /* DB ED */
-OP(ed,06) { illegal_2(); } /* DB ED */
-OP(ed,07) { illegal_2(); } /* DB ED */
-
-OP(ed,08) { illegal_2(); } /* DB ED */
-OP(ed,09) { illegal_2(); } /* DB ED */
-OP(ed,0a) { illegal_2(); } /* DB ED */
-OP(ed,0b) { illegal_2(); } /* DB ED */
-OP(ed,0c) { illegal_2(); } /* DB ED */
-OP(ed,0d) { illegal_2(); } /* DB ED */
-OP(ed,0e) { illegal_2(); } /* DB ED */
-OP(ed,0f) { illegal_2(); } /* DB ED */
-
-OP(ed,10) { illegal_2(); } /* DB ED */
-OP(ed,11) { illegal_2(); } /* DB ED */
-OP(ed,12) { illegal_2(); } /* DB ED */
-OP(ed,13) { illegal_2(); } /* DB ED */
-OP(ed,14) { illegal_2(); } /* DB ED */
-OP(ed,15) { illegal_2(); } /* DB ED */
-OP(ed,16) { illegal_2(); } /* DB ED */
-OP(ed,17) { illegal_2(); } /* DB ED */
-
-OP(ed,18) { illegal_2(); } /* DB ED */
-OP(ed,19) { illegal_2(); } /* DB ED */
-OP(ed,1a) { illegal_2(); } /* DB ED */
-OP(ed,1b) { illegal_2(); } /* DB ED */
-OP(ed,1c) { illegal_2(); } /* DB ED */
-OP(ed,1d) { illegal_2(); } /* DB ED */
-OP(ed,1e) { illegal_2(); } /* DB ED */
-OP(ed,1f) { illegal_2(); } /* DB ED */
-
-OP(ed,20) { illegal_2(); } /* DB ED */
-OP(ed,21) { illegal_2(); } /* DB ED */
-OP(ed,22) { illegal_2(); } /* DB ED */
-OP(ed,23) { illegal_2(); } /* DB ED */
-OP(ed,24) { illegal_2(); } /* DB ED */
-OP(ed,25) { illegal_2(); } /* DB ED */
-OP(ed,26) { illegal_2(); } /* DB ED */
-OP(ed,27) { illegal_2(); } /* DB ED */
-
-OP(ed,28) { illegal_2(); } /* DB ED */
-OP(ed,29) { illegal_2(); } /* DB ED */
-OP(ed,2a) { illegal_2(); } /* DB ED */
-OP(ed,2b) { illegal_2(); } /* DB ED */
-OP(ed,2c) { illegal_2(); } /* DB ED */
-OP(ed,2d) { illegal_2(); } /* DB ED */
-OP(ed,2e) { illegal_2(); } /* DB ED */
-OP(ed,2f) { illegal_2(); } /* DB ED */
-
-OP(ed,30) { illegal_2(); } /* DB ED */
-OP(ed,31) { illegal_2(); } /* DB ED */
-OP(ed,32) { illegal_2(); } /* DB ED */
-OP(ed,33) { illegal_2(); } /* DB ED */
-OP(ed,34) { illegal_2(); } /* DB ED */
-OP(ed,35) { illegal_2(); } /* DB ED */
-OP(ed,36) { illegal_2(); } /* DB ED */
-OP(ed,37) { illegal_2(); } /* DB ED */
-
-OP(ed,38) { illegal_2(); } /* DB ED */
-OP(ed,39) { illegal_2(); } /* DB ED */
-OP(ed,3a) { illegal_2(); } /* DB ED */
-OP(ed,3b) { illegal_2(); } /* DB ED */
-OP(ed,3c) { illegal_2(); } /* DB ED */
-OP(ed,3d) { illegal_2(); } /* DB ED */
-OP(ed,3e) { illegal_2(); } /* DB ED */
-OP(ed,3f) { illegal_2(); } /* DB ED */
-
-OP(ed,40) { B = in(BC); set_f((F & CF) | SZP[B]); WZ = BC + 1; } /* IN B,(C) */
-OP(ed,41) { out(BC, B); WZ = BC + 1; } /* OUT (C),B */
-OP(ed,42) { sbc_hl(m_bc); } /* SBC HL,BC */
-OP(ed,43) { m_ea = arg16(); wm16(m_ea, m_bc); WZ = m_ea + 1; } /* LD (w),BC */
-OP(ed,44) { neg(); } /* NEG */
-OP(ed,45) { retn(); } /* RETN */
-OP(ed,46) { m_im = 0; } /* IM 0 */
-OP(ed,47) { ld_i_a(); } /* LD i,A */
-
-OP(ed,48) { C = in(BC); set_f((F & CF) | SZP[C]); WZ = BC + 1; } /* IN C,(C) */
-OP(ed,49) { out(BC, C); WZ = BC + 1; } /* OUT (C),C */
-OP(ed,4a) { adc_hl(m_bc); } /* ADC HL,BC */
-OP(ed,4b) { m_ea = arg16(); rm16(m_ea, m_bc); WZ = m_ea + 1; } /* LD BC,(w) */
-OP(ed,4c) { neg(); } /* NEG */
-OP(ed,4d) { reti(); } /* RETI */
-OP(ed,4e) { m_im = 0; } /* IM 0 */
-OP(ed,4f) { ld_r_a(); } /* LD r,A */
-
-OP(ed,50) { D = in(BC); set_f((F & CF) | SZP[D]); WZ = BC + 1; } /* IN D,(C) */
-OP(ed,51) { out(BC, D); WZ = BC + 1; } /* OUT (C),D */
-OP(ed,52) { sbc_hl(m_de); } /* SBC HL,DE */
-OP(ed,53) { m_ea = arg16(); wm16(m_ea, m_de); WZ = m_ea + 1; } /* LD (w),DE */
-OP(ed,54) { neg(); } /* NEG */
-OP(ed,55) { retn(); } /* RETN */
-OP(ed,56) { m_im = 1; } /* IM 1 */
-OP(ed,57) { ld_a_i(); } /* LD A,i */
-
-OP(ed,58) { E = in(BC); set_f((F & CF) | SZP[E]); WZ = BC + 1; } /* IN E,(C) */
-OP(ed,59) { out(BC, E); WZ = BC + 1; } /* OUT (C),E */
-OP(ed,5a) { adc_hl(m_de); } /* ADC HL,DE */
-OP(ed,5b) { m_ea = arg16(); rm16(m_ea, m_de); WZ = m_ea + 1; } /* LD DE,(w) */
-OP(ed,5c) { neg(); } /* NEG */
-OP(ed,5d) { reti(); } /* RETI */
-OP(ed,5e) { m_im = 2; } /* IM 2 */
-OP(ed,5f) { ld_a_r(); } /* LD A,r */
-
-OP(ed,60) { H = in(BC); set_f((F & CF) | SZP[H]); WZ = BC + 1; } /* IN H,(C) */
-OP(ed,61) { out(BC, H); WZ = BC + 1; } /* OUT (C),H */
-OP(ed,62) { sbc_hl(m_hl); } /* SBC HL,HL */
-OP(ed,63) { m_ea = arg16(); wm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD (w),HL */
-OP(ed,64) { neg(); } /* NEG */
-OP(ed,65) { retn(); } /* RETN */
-OP(ed,66) { m_im = 0; } /* IM 0 */
-OP(ed,67) { rrd(); } /* RRD (HL) */
-
-OP(ed,68) { L = in(BC); set_f((F & CF) | SZP[L]); WZ = BC + 1; } /* IN L,(C) */
-OP(ed,69) { out(BC, L); WZ = BC + 1; } /* OUT (C),L */
-OP(ed,6a) { adc_hl(m_hl); } /* ADC HL,HL */
-OP(ed,6b) { m_ea = arg16(); rm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD HL,(w) */
-OP(ed,6c) { neg(); } /* NEG */
-OP(ed,6d) { reti(); } /* RETI */
-OP(ed,6e) { m_im = 0; } /* IM 0 */
-OP(ed,6f) { rld(); } /* RLD (HL) */
-
-OP(ed,70) { u8 res = in(BC); set_f((F & CF) | SZP[res]); WZ = BC + 1; } /* IN 0,(C) */
-OP(ed,71) { out(BC, 0); WZ = BC + 1; } /* OUT (C),0 */
-OP(ed,72) { sbc_hl(m_sp); } /* SBC HL,SP */
-OP(ed,73) { m_ea = arg16(); wm16(m_ea, m_sp); WZ = m_ea + 1; } /* LD (w),SP */
-OP(ed,74) { neg(); } /* NEG */
-OP(ed,75) { retn(); } /* RETN */
-OP(ed,76) { m_im = 1; } /* IM 1 */
-OP(ed,77) { illegal_2(); } /* DB ED,77 */
-
-OP(ed,78) { A = in(BC); set_f((F & CF) | SZP[A]); WZ = BC + 1; } /* IN A,(C) */
-OP(ed,79) { out(BC, A); WZ = BC + 1; } /* OUT (C),A */
-OP(ed,7a) { adc_hl(m_sp); } /* ADC HL,SP */
-OP(ed,7b) { m_ea = arg16(); rm16(m_ea, m_sp); WZ = m_ea + 1; } /* LD SP,(w) */
-OP(ed,7c) { neg(); } /* NEG */
-OP(ed,7d) { reti(); } /* RETI */
-OP(ed,7e) { m_im = 2; } /* IM 2 */
-OP(ed,7f) { illegal_2(); } /* DB ED,7F */
-
-OP(ed,80) { illegal_2(); } /* DB ED */
-OP(ed,81) { illegal_2(); } /* DB ED */
-OP(ed,82) { illegal_2(); } /* DB ED */
-OP(ed,83) { illegal_2(); } /* DB ED */
-OP(ed,84) { illegal_2(); } /* DB ED */
-OP(ed,85) { illegal_2(); } /* DB ED */
-OP(ed,86) { illegal_2(); } /* DB ED */
-OP(ed,87) { illegal_2(); } /* DB ED */
-
-OP(ed,88) { illegal_2(); } /* DB ED */
-OP(ed,89) { illegal_2(); } /* DB ED */
-OP(ed,8a) { illegal_2(); } /* DB ED */
-OP(ed,8b) { illegal_2(); } /* DB ED */
-OP(ed,8c) { illegal_2(); } /* DB ED */
-OP(ed,8d) { illegal_2(); } /* DB ED */
-OP(ed,8e) { illegal_2(); } /* DB ED */
-OP(ed,8f) { illegal_2(); } /* DB ED */
-
-OP(ed,90) { illegal_2(); } /* DB ED */
-OP(ed,91) { illegal_2(); } /* DB ED */
-OP(ed,92) { illegal_2(); } /* DB ED */
-OP(ed,93) { illegal_2(); } /* DB ED */
-OP(ed,94) { illegal_2(); } /* DB ED */
-OP(ed,95) { illegal_2(); } /* DB ED */
-OP(ed,96) { illegal_2(); } /* DB ED */
-OP(ed,97) { illegal_2(); } /* DB ED */
-
-OP(ed,98) { illegal_2(); } /* DB ED */
-OP(ed,99) { illegal_2(); } /* DB ED */
-OP(ed,9a) { illegal_2(); } /* DB ED */
-OP(ed,9b) { illegal_2(); } /* DB ED */
-OP(ed,9c) { illegal_2(); } /* DB ED */
-OP(ed,9d) { illegal_2(); } /* DB ED */
-OP(ed,9e) { illegal_2(); } /* DB ED */
-OP(ed,9f) { illegal_2(); } /* DB ED */
-
-OP(ed,a0) { ldi(); } /* LDI */
-OP(ed,a1) { cpi(); } /* CPI */
-OP(ed,a2) { ini(); } /* INI */
-OP(ed,a3) { outi(); } /* OUTI */
-OP(ed,a4) { illegal_2(); } /* DB ED */
-OP(ed,a5) { illegal_2(); } /* DB ED */
-OP(ed,a6) { illegal_2(); } /* DB ED */
-OP(ed,a7) { illegal_2(); } /* DB ED */
-
-OP(ed,a8) { ldd(); } /* LDD */
-OP(ed,a9) { cpd(); } /* CPD */
-OP(ed,aa) { ind(); } /* IND */
-OP(ed,ab) { outd(); } /* OUTD */
-OP(ed,ac) { illegal_2(); } /* DB ED */
-OP(ed,ad) { illegal_2(); } /* DB ED */
-OP(ed,ae) { illegal_2(); } /* DB ED */
-OP(ed,af) { illegal_2(); } /* DB ED */
-
-OP(ed,b0) { ldir(); } /* LDIR */
-OP(ed,b1) { cpir(); } /* CPIR */
-OP(ed,b2) { inir(); } /* INIR */
-OP(ed,b3) { otir(); } /* OTIR */
-OP(ed,b4) { illegal_2(); } /* DB ED */
-OP(ed,b5) { illegal_2(); } /* DB ED */
-OP(ed,b6) { illegal_2(); } /* DB ED */
-OP(ed,b7) { illegal_2(); } /* DB ED */
-
-OP(ed,b8) { lddr(); } /* LDDR */
-OP(ed,b9) { cpdr(); } /* CPDR */
-OP(ed,ba) { indr(); } /* INDR */
-OP(ed,bb) { otdr(); } /* OTDR */
-OP(ed,bc) { illegal_2(); } /* DB ED */
-OP(ed,bd) { illegal_2(); } /* DB ED */
-OP(ed,be) { illegal_2(); } /* DB ED */
-OP(ed,bf) { illegal_2(); } /* DB ED */
-
-OP(ed,c0) { illegal_2(); } /* DB ED */
-OP(ed,c1) { illegal_2(); } /* DB ED */
-OP(ed,c2) { illegal_2(); } /* DB ED */
-OP(ed,c3) { illegal_2(); } /* DB ED */
-OP(ed,c4) { illegal_2(); } /* DB ED */
-OP(ed,c5) { illegal_2(); } /* DB ED */
-OP(ed,c6) { illegal_2(); } /* DB ED */
-OP(ed,c7) { illegal_2(); } /* DB ED */
-
-OP(ed,c8) { illegal_2(); } /* DB ED */
-OP(ed,c9) { illegal_2(); } /* DB ED */
-OP(ed,ca) { illegal_2(); } /* DB ED */
-OP(ed,cb) { illegal_2(); } /* DB ED */
-OP(ed,cc) { illegal_2(); } /* DB ED */
-OP(ed,cd) { illegal_2(); } /* DB ED */
-OP(ed,ce) { illegal_2(); } /* DB ED */
-OP(ed,cf) { illegal_2(); } /* DB ED */
-
-OP(ed,d0) { illegal_2(); } /* DB ED */
-OP(ed,d1) { illegal_2(); } /* DB ED */
-OP(ed,d2) { illegal_2(); } /* DB ED */
-OP(ed,d3) { illegal_2(); } /* DB ED */
-OP(ed,d4) { illegal_2(); } /* DB ED */
-OP(ed,d5) { illegal_2(); } /* DB ED */
-OP(ed,d6) { illegal_2(); } /* DB ED */
-OP(ed,d7) { illegal_2(); } /* DB ED */
-
-OP(ed,d8) { illegal_2(); } /* DB ED */
-OP(ed,d9) { illegal_2(); } /* DB ED */
-OP(ed,da) { illegal_2(); } /* DB ED */
-OP(ed,db) { illegal_2(); } /* DB ED */
-OP(ed,dc) { illegal_2(); } /* DB ED */
-OP(ed,dd) { illegal_2(); } /* DB ED */
-OP(ed,de) { illegal_2(); } /* DB ED */
-OP(ed,df) { illegal_2(); } /* DB ED */
-
-OP(ed,e0) { illegal_2(); } /* DB ED */
-OP(ed,e1) { illegal_2(); } /* DB ED */
-OP(ed,e2) { illegal_2(); } /* DB ED */
-OP(ed,e3) { illegal_2(); } /* DB ED */
-OP(ed,e4) { illegal_2(); } /* DB ED */
-OP(ed,e5) { illegal_2(); } /* DB ED */
-OP(ed,e6) { illegal_2(); } /* DB ED */
-OP(ed,e7) { illegal_2(); } /* DB ED */
-
-OP(ed,e8) { illegal_2(); } /* DB ED */
-OP(ed,e9) { illegal_2(); } /* DB ED */
-OP(ed,ea) { illegal_2(); } /* DB ED */
-OP(ed,eb) { illegal_2(); } /* DB ED */
-OP(ed,ec) { illegal_2(); } /* DB ED */
-OP(ed,ed) { illegal_2(); } /* DB ED */
-OP(ed,ee) { illegal_2(); } /* DB ED */
-OP(ed,ef) { illegal_2(); } /* DB ED */
-
-OP(ed,f0) { illegal_2(); } /* DB ED */
-OP(ed,f1) { illegal_2(); } /* DB ED */
-OP(ed,f2) { illegal_2(); } /* DB ED */
-OP(ed,f3) { illegal_2(); } /* DB ED */
-OP(ed,f4) { illegal_2(); } /* DB ED */
-OP(ed,f5) { illegal_2(); } /* DB ED */
-OP(ed,f6) { illegal_2(); } /* DB ED */
-OP(ed,f7) { illegal_2(); } /* DB ED */
-
-OP(ed,f8) { illegal_2(); } /* DB ED */
-OP(ed,f9) { illegal_2(); } /* DB ED */
-OP(ed,fa) { illegal_2(); } /* DB ED */
-OP(ed,fb) { illegal_2(); } /* DB ED */
-OP(ed,fc) { illegal_2(); } /* DB ED */
-OP(ed,fd) { illegal_2(); } /* DB ED */
-OP(ed,fe) { illegal_2(); } /* DB ED */
-OP(ed,ff) { illegal_2(); } /* DB ED */
-
-
-/**********************************************************
- * main opcodes
- **********************************************************/
-OP(op,00) { } /* NOP */
-OP(op,01) { BC = arg16(); } /* LD BC,w */
-OP(op,02) { wm(BC,A); WZ_L = (BC + 1) & 0xFF; WZ_H = A; } /* LD (BC),A */
-OP(op,03) { nomreq_ir(2); BC++; } /* INC BC */
-OP(op,04) { B = inc(B); } /* INC B */
-OP(op,05) { B = dec(B); } /* DEC B */
-OP(op,06) { B = arg(); } /* LD B,n */
-OP(op,07) { rlca(); } /* RLCA */
-
-OP(op,08) { using std::swap; swap(m_af, m_af2); } /* EX AF,AF' */
-OP(op,09) { add16(m_hl, m_bc); } /* ADD HL,BC */
-OP(op,0a) { A = rm(BC); WZ=BC+1; } /* LD A,(BC) */
-OP(op,0b) { nomreq_ir(2); BC--; } /* DEC BC */
-OP(op,0c) { C = inc(C); } /* INC C */
-OP(op,0d) { C = dec(C); } /* DEC C */
-OP(op,0e) { C = arg(); } /* LD C,n */
-OP(op,0f) { rrca(); } /* RRCA */
-
-OP(op,10) { nomreq_ir(1); B--; jr_cond(B, 0x10); } /* DJNZ o */
-OP(op,11) { DE = arg16(); } /* LD DE,w */
-OP(op,12) { wm(DE,A); WZ_L = (DE + 1) & 0xFF; WZ_H = A; } /* LD (DE),A */
-OP(op,13) { nomreq_ir(2); DE++; } /* INC DE */
-OP(op,14) { D = inc(D); } /* INC D */
-OP(op,15) { D = dec(D); } /* DEC D */
-OP(op,16) { D = arg(); } /* LD D,n */
-OP(op,17) { rla(); } /* RLA */
-
-OP(op,18) { jr(); } /* JR o */
-OP(op,19) { add16(m_hl, m_de); } /* ADD HL,DE */
-OP(op,1a) { A = rm(DE); WZ = DE + 1; } /* LD A,(DE) */
-OP(op,1b) { nomreq_ir(2); DE--; } /* DEC DE */
-OP(op,1c) { E = inc(E); } /* INC E */
-OP(op,1d) { E = dec(E); } /* DEC E */
-OP(op,1e) { E = arg(); } /* LD E,n */
-OP(op,1f) { rra(); } /* RRA */
-
-OP(op,20) { jr_cond(!(F & ZF), 0x20); } /* JR NZ,o */
-OP(op,21) { HL = arg16(); } /* LD HL,w */
-OP(op,22) { m_ea = arg16(); wm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD (w),HL */
-OP(op,23) { nomreq_ir(2); HL++; } /* INC HL */
-OP(op,24) { H = inc(H); } /* INC H */
-OP(op,25) { H = dec(H); } /* DEC H */
-OP(op,26) { H = arg(); } /* LD H,n */
-OP(op,27) { daa(); } /* DAA */
-
-OP(op,28) { jr_cond(F & ZF, 0x28); } /* JR Z,o */
-OP(op,29) { add16(m_hl, m_hl); } /* ADD HL,HL */
-OP(op,2a) { m_ea = arg16(); rm16(m_ea, m_hl); WZ = m_ea + 1; } /* LD HL,(w) */
-OP(op,2b) { nomreq_ir(2); HL--; } /* DEC HL */
-OP(op,2c) { L = inc(L); } /* INC L */
-OP(op,2d) { L = dec(L); } /* DEC L */
-OP(op,2e) { L = arg(); } /* LD L,n */
-OP(op,2f) { A ^= 0xff; set_f((F & (SF | ZF | PF | CF)) | HF | NF | (A & (YF | XF))); } /* CPL */
-
-OP(op,30) { jr_cond(!(F & CF), 0x30); } /* JR NC,o */
-OP(op,31) { SP = arg16(); } /* LD SP,w */
-OP(op,32) { m_ea = arg16(); wm(m_ea, A); WZ_L = (m_ea + 1) & 0xFF; WZ_H = A; } /* LD (w),A */
-OP(op,33) { nomreq_ir(2); SP++; } /* INC SP */
-OP(op,34) { wm(HL, inc(rm_reg(HL))); } /* INC (HL) */
-OP(op,35) { wm(HL, dec(rm_reg(HL))); } /* DEC (HL) */
-OP(op,36) { wm(HL, arg()); } /* LD (HL),n */
-OP(op,37) { set_f((F & (SF | ZF | PF)) | CF | (((F & Q) | A) & (YF | XF))); } /* SCF */
-
-OP(op,38) { jr_cond(F & CF, 0x38); } /* JR C,o */
-OP(op,39) { add16(m_hl, m_sp); } /* ADD HL,SP */
-OP(op,3a) { m_ea = arg16(); A = rm(m_ea); WZ = m_ea + 1; } /* LD A,(w) */
-OP(op,3b) { nomreq_ir(2); SP--; } /* DEC SP */
-OP(op,3c) { A = inc(A); } /* INC A */
-OP(op,3d) { A = dec(A); } /* DEC A */
-OP(op,3e) { A = arg(); } /* LD A,n */
-OP(op,3f) { set_f(((F & (SF | ZF | PF | CF)) ^ CF) | ((F & CF) << 4) | (((F & Q) | A) & (YF | XF))); } /* CCF */
-
-OP(op,40) { } /* LD B,B */
-OP(op,41) { B = C; } /* LD B,C */
-OP(op,42) { B = D; } /* LD B,D */
-OP(op,43) { B = E; } /* LD B,E */
-OP(op,44) { B = H; } /* LD B,H */
-OP(op,45) { B = L; } /* LD B,L */
-OP(op,46) { B = rm(HL); } /* LD B,(HL) */
-OP(op,47) { B = A; } /* LD B,A */
-
-OP(op,48) { C = B; } /* LD C,B */
-OP(op,49) { } /* LD C,C */
-OP(op,4a) { C = D; } /* LD C,D */
-OP(op,4b) { C = E; } /* LD C,E */
-OP(op,4c) { C = H; } /* LD C,H */
-OP(op,4d) { C = L; } /* LD C,L */
-OP(op,4e) { C = rm(HL); } /* LD C,(HL) */
-OP(op,4f) { C = A; } /* LD C,A */
-
-OP(op,50) { D = B; } /* LD D,B */
-OP(op,51) { D = C; } /* LD D,C */
-OP(op,52) { } /* LD D,D */
-OP(op,53) { D = E; } /* LD D,E */
-OP(op,54) { D = H; } /* LD D,H */
-OP(op,55) { D = L; } /* LD D,L */
-OP(op,56) { D = rm(HL); } /* LD D,(HL) */
-OP(op,57) { D = A; } /* LD D,A */
-
-OP(op,58) { E = B; } /* LD E,B */
-OP(op,59) { E = C; } /* LD E,C */
-OP(op,5a) { E = D; } /* LD E,D */
-OP(op,5b) { } /* LD E,E */
-OP(op,5c) { E = H; } /* LD E,H */
-OP(op,5d) { E = L; } /* LD E,L */
-OP(op,5e) { E = rm(HL); } /* LD E,(HL) */
-OP(op,5f) { E = A; } /* LD E,A */
-
-OP(op,60) { H = B; } /* LD H,B */
-OP(op,61) { H = C; } /* LD H,C */
-OP(op,62) { H = D; } /* LD H,D */
-OP(op,63) { H = E; } /* LD H,E */
-OP(op,64) { } /* LD H,H */
-OP(op,65) { H = L; } /* LD H,L */
-OP(op,66) { H = rm(HL); } /* LD H,(HL) */
-OP(op,67) { H = A; } /* LD H,A */
-
-OP(op,68) { L = B; } /* LD L,B */
-OP(op,69) { L = C; } /* LD L,C */
-OP(op,6a) { L = D; } /* LD L,D */
-OP(op,6b) { L = E; } /* LD L,E */
-OP(op,6c) { L = H; } /* LD L,H */
-OP(op,6d) { } /* LD L,L */
-OP(op,6e) { L = rm(HL); } /* LD L,(HL) */
-OP(op,6f) { L = A; } /* LD L,A */
-
-OP(op,70) { wm(HL, B); } /* LD (HL),B */
-OP(op,71) { wm(HL, C); } /* LD (HL),C */
-OP(op,72) { wm(HL, D); } /* LD (HL),D */
-OP(op,73) { wm(HL, E); } /* LD (HL),E */
-OP(op,74) { wm(HL, H); } /* LD (HL),H */
-OP(op,75) { wm(HL, L); } /* LD (HL),L */
-OP(op,76) { halt(); } /* HALT */
-OP(op,77) { wm(HL, A); } /* LD (HL),A */
-
-OP(op,78) { A = B; } /* LD A,B */
-OP(op,79) { A = C; } /* LD A,C */
-OP(op,7a) { A = D; } /* LD A,D */
-OP(op,7b) { A = E; } /* LD A,E */
-OP(op,7c) { A = H; } /* LD A,H */
-OP(op,7d) { A = L; } /* LD A,L */
-OP(op,7e) { A = rm(HL); } /* LD A,(HL) */
-OP(op,7f) { } /* LD A,A */
-
-OP(op,80) { add_a(B); } /* ADD A,B */
-OP(op,81) { add_a(C); } /* ADD A,C */
-OP(op,82) { add_a(D); } /* ADD A,D */
-OP(op,83) { add_a(E); } /* ADD A,E */
-OP(op,84) { add_a(H); } /* ADD A,H */
-OP(op,85) { add_a(L); } /* ADD A,L */
-OP(op,86) { add_a(rm(HL)); } /* ADD A,(HL) */
-OP(op,87) { add_a(A); } /* ADD A,A */
-
-OP(op,88) { adc_a(B); } /* ADC A,B */
-OP(op,89) { adc_a(C); } /* ADC A,C */
-OP(op,8a) { adc_a(D); } /* ADC A,D */
-OP(op,8b) { adc_a(E); } /* ADC A,E */
-OP(op,8c) { adc_a(H); } /* ADC A,H */
-OP(op,8d) { adc_a(L); } /* ADC A,L */
-OP(op,8e) { adc_a(rm(HL)); } /* ADC A,(HL) */
-OP(op,8f) { adc_a(A); } /* ADC A,A */
-
-OP(op,90) { sub(B); } /* SUB B */
-OP(op,91) { sub(C); } /* SUB C */
-OP(op,92) { sub(D); } /* SUB D */
-OP(op,93) { sub(E); } /* SUB E */
-OP(op,94) { sub(H); } /* SUB H */
-OP(op,95) { sub(L); } /* SUB L */
-OP(op,96) { sub(rm(HL)); } /* SUB (HL) */
-OP(op,97) { sub(A); } /* SUB A */
-
-OP(op,98) { sbc_a(B); } /* SBC A,B */
-OP(op,99) { sbc_a(C); } /* SBC A,C */
-OP(op,9a) { sbc_a(D); } /* SBC A,D */
-OP(op,9b) { sbc_a(E); } /* SBC A,E */
-OP(op,9c) { sbc_a(H); } /* SBC A,H */
-OP(op,9d) { sbc_a(L); } /* SBC A,L */
-OP(op,9e) { sbc_a(rm(HL)); } /* SBC A,(HL) */
-OP(op,9f) { sbc_a(A); } /* SBC A,A */
-
-OP(op,a0) { and_a(B); } /* AND B */
-OP(op,a1) { and_a(C); } /* AND C */
-OP(op,a2) { and_a(D); } /* AND D */
-OP(op,a3) { and_a(E); } /* AND E */
-OP(op,a4) { and_a(H); } /* AND H */
-OP(op,a5) { and_a(L); } /* AND L */
-OP(op,a6) { and_a(rm(HL)); } /* AND (HL) */
-OP(op,a7) { and_a(A); } /* AND A */
-
-OP(op,a8) { xor_a(B); } /* XOR B */
-OP(op,a9) { xor_a(C); } /* XOR C */
-OP(op,aa) { xor_a(D); } /* XOR D */
-OP(op,ab) { xor_a(E); } /* XOR E */
-OP(op,ac) { xor_a(H); } /* XOR H */
-OP(op,ad) { xor_a(L); } /* XOR L */
-OP(op,ae) { xor_a(rm(HL)); } /* XOR (HL) */
-OP(op,af) { xor_a(A); } /* XOR A */
-
-OP(op,b0) { or_a(B); } /* OR B */
-OP(op,b1) { or_a(C); } /* OR C */
-OP(op,b2) { or_a(D); } /* OR D */
-OP(op,b3) { or_a(E); } /* OR E */
-OP(op,b4) { or_a(H); } /* OR H */
-OP(op,b5) { or_a(L); } /* OR L */
-OP(op,b6) { or_a(rm(HL)); } /* OR (HL) */
-OP(op,b7) { or_a(A); } /* OR A */
-
-OP(op,b8) { cp(B); } /* CP B */
-OP(op,b9) { cp(C); } /* CP C */
-OP(op,ba) { cp(D); } /* CP D */
-OP(op,bb) { cp(E); } /* CP E */
-OP(op,bc) { cp(H); } /* CP H */
-OP(op,bd) { cp(L); } /* CP L */
-OP(op,be) { cp(rm(HL)); } /* CP (HL) */
-OP(op,bf) { cp(A); } /* CP A */
-
-OP(op,c0) { ret_cond(!(F & ZF), 0xc0); } /* RET NZ */
-OP(op,c1) { pop(m_bc); } /* POP BC */
-OP(op,c2) { jp_cond(!(F & ZF)); } /* JP NZ,a */
-OP(op,c3) { jp(); } /* JP a */
-OP(op,c4) { call_cond(!(F & ZF), 0xc4); } /* CALL NZ,a */
-OP(op,c5) { push(m_bc); } /* PUSH BC */
-OP(op,c6) { add_a(arg()); } /* ADD A,n */
-OP(op,c7) { rst(0x00); } /* RST 0 */
-
-OP(op,c8) { ret_cond(F & ZF, 0xc8); } /* RET Z */
-OP(op,c9) { pop(m_pc); WZ = PCD; } /* RET */
-OP(op,ca) { jp_cond(F & ZF); } /* JP Z,a */
-OP(op,cb) { EXEC(cb, rop()); } /* **** CB xx */
-OP(op,cc) { call_cond(F & ZF, 0xcc); } /* CALL Z,a */
-OP(op,cd) { call(); } /* CALL a */
-OP(op,ce) { adc_a(arg()); } /* ADC A,n */
-OP(op,cf) { rst(0x08); } /* RST 1 */
-
-OP(op,d0) { ret_cond(!(F & CF), 0xd0); } /* RET NC */
-OP(op,d1) { pop(m_de); } /* POP DE */
-OP(op,d2) { jp_cond(!(F & CF)); } /* JP NC,a */
-OP(op,d3) { unsigned n = arg() | (A << 8); out(n, A); WZ_L = ((n & 0xff) + 1) & 0xff; WZ_H = A; } /* OUT (n),A */
-OP(op,d4) { call_cond(!(F & CF), 0xd4); } /* CALL NC,a */
-OP(op,d5) { push(m_de); } /* PUSH DE */
-OP(op,d6) { sub(arg()); } /* SUB n */
-OP(op,d7) { rst(0x10); } /* RST 2 */
-
-OP(op,d8) { ret_cond(F & CF, 0xd8); } /* RET C */
-OP(op,d9) { exx(); } /* EXX */
-OP(op,da) { jp_cond(F & CF); } /* JP C,a */
-OP(op,db) { unsigned n = arg() | (A << 8); A = in(n); WZ = n + 1; } /* IN A,(n) */
-OP(op,dc) { call_cond(F & CF, 0xdc); } /* CALL C,a */
-OP(op,dd) { EXEC(dd, rop()); } /* **** DD xx */
-OP(op,de) { sbc_a(arg()); } /* SBC A,n */
-OP(op,df) { rst(0x18); } /* RST 3 */
-
-OP(op,e0) { ret_cond(!(F & PF), 0xe0); } /* RET PO */
-OP(op,e1) { pop(m_hl); } /* POP HL */
-OP(op,e2) { jp_cond(!(F & PF)); } /* JP PO,a */
-OP(op,e3) { ex_sp(m_hl); } /* EX HL,(SP) */
-OP(op,e4) { call_cond(!(F & PF), 0xe4); } /* CALL PO,a */
-OP(op,e5) { push(m_hl); } /* PUSH HL */
-OP(op,e6) { and_a(arg()); } /* AND n */
-OP(op,e7) { rst(0x20); } /* RST 4 */
-
-OP(op,e8) { ret_cond(F & PF, 0xe8); } /* RET PE */
-OP(op,e9) { PC = HL; } /* JP (HL) */
-OP(op,ea) { jp_cond(F & PF); } /* JP PE,a */
-OP(op,eb) { using std::swap; swap(DE, HL); } /* EX DE,HL */
-OP(op,ec) { call_cond(F & PF, 0xec); } /* CALL PE,a */
-OP(op,ed) { EXEC(ed, rop()); } /* **** ED xx */
-OP(op,ee) { xor_a(arg()); } /* XOR n */
-OP(op,ef) { rst(0x28); } /* RST 5 */
-
-OP(op,f0) { ret_cond(!(F & SF), 0xf0); } /* RET P */
-OP(op,f1) { pop(m_af); } /* POP AF */
-OP(op,f2) { jp_cond(!(F & SF)); } /* JP P,a */
-OP(op,f3) { m_iff1 = m_iff2 = 0; } /* DI */
-OP(op,f4) { call_cond(!(F & SF), 0xf4); } /* CALL P,a */
-OP(op,f5) { push(m_af); } /* PUSH AF */
-OP(op,f6) { or_a(arg()); } /* OR n */
-OP(op,f7) { rst(0x30); } /* RST 6 */
-
-OP(op,f8) { ret_cond(F & SF, 0xf8); } /* RET M */
-OP(op,f9) { nomreq_ir(2); SP = HL; } /* LD SP,HL */
-OP(op,fa) { jp_cond(F & SF); } /* JP M,a */
-OP(op,fb) { ei(); } /* EI */
-OP(op,fc) { call_cond(F & SF, 0xfc); } /* CALL M,a */
-OP(op,fd) { EXEC(fd, rop()); } /* **** FD xx */
-OP(op,fe) { cp(arg()); } /* CP n */
-OP(op,ff) { rst(0x38); } /* RST 7 */
-
-
-void z80_device::take_nmi()
+u8 z80_device::flags_szyxc(u16 value)
{
- // Check if processor was halted
- leave_halt();
-
-#if HAS_LDAIR_QUIRK
- // reset parity flag after LD A,I or LD A,R
- if (m_after_ldair) F &= ~PF;
-#endif
-
- m_iff1 = 0;
- m_r++;
-
- T(5);
- wm16_sp(m_pc);
- PCD = 0x0066;
- WZ = PCD;
- m_nmi_pending = false;
+ u8 f = value & (SF | YF | XF); // SF + undocumented flag bits 5+3
+ f |= u8(value) ? 0 : ZF;
+ f |= (value >> 8) & CF;
+ return f;
}
-void z80_device::take_interrupt()
-{
- // check if processor was halted
- leave_halt();
-
- // clear both interrupt flip flops
- m_iff1 = m_iff2 = 0;
-
- // say hi
- // Not precise in all cases. z80 must finish current instruction (NOP) to reach this state - in such case frame timings are shifter from cb event if calulated based on it.
- m_irqack_cb(true);
- m_r++;
-
- // fetch the IRQ vector
- device_z80daisy_interface *intf = daisy_get_irq_device();
- int irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w.l);
- LOGINT("single INT irq_vector $%02x\n", irq_vector);
-
- // 'interrupt latency' cycles
- T(2);
-
- // Interrupt mode 2. Call [i:databyte]
- if (m_im == 2)
- {
- // Zilog's datasheet claims that "the least-significant bit must be a zero."
- // However, experiments have confirmed that IM 2 vectors do not have to be
- // even, and all 8 bits will be used; even $FF is handled normally.
- // CALL opcode timing
- T(5);
- wm16_sp(m_pc);
- irq_vector = (irq_vector & 0xff) | (m_i << 8);
- rm16(irq_vector, m_pc);
- LOGINT("IM2 [$%04x] = $%04x\n", irq_vector, PCD);
- }
- else if (m_im == 1)
- {
- // Interrupt mode 1. RST 38h
- LOGINT("'%s' IM1 $0038\n", tag());
- // RST $38
- T(5);
- wm16_sp(m_pc);
- PCD = 0x0038;
- }
- else
- {
- /* Interrupt mode 0. We check for CALL and JP instructions,
- if neither of these were found we assume a 1 byte opcode
- was placed on the databus */
- LOGINT("IM0 $%04x\n", irq_vector);
-
- // check for nop
- if (irq_vector != 0x00)
- {
- switch (irq_vector & 0xff0000)
- {
- case 0xcd0000: // call
- // CALL $xxxx cycles
- T(11);
- wm16_sp(m_pc);
- PCD = irq_vector & 0xffff;
- break;
- case 0xc30000: // jump
- // JP $xxxx cycles
- T(10);
- PCD = irq_vector & 0xffff;
- break;
- default: // rst (or other opcodes?)
- if (irq_vector == 0xfb)
- {
- // EI
- T(4);
- ei();
- }
- else if ((irq_vector & 0xc7) == 0xc7)
- {
- // RST $xx cycles
- T(5);
- wm16_sp(m_pc);
- PCD = irq_vector & 0x0038;
- }
- else
- logerror("take_interrupt: unexpected opcode in im0 mode: 0x%02x\n", irq_vector);
- break;
- }
- }
- }
- WZ = PCD;
-
-#if HAS_LDAIR_QUIRK
- // reset parity flag after LD A,I or LD A,R
- if (m_after_ldair) F &= ~PF;
-#endif
-}
-
-void z80_device::nomreq_ir(s8 cycles)
-{
- nomreq_addr((m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f), cycles);
-}
-
-void z80_device::nomreq_addr(u16 addr, s8 cycles)
-{
- while (cycles--)
- {
- m_nomreq_cb(addr, 0x00, 0xff);
- T(1);
- }
-}
-
-void nsc800_device::take_interrupt_nsc800()
-{
- // Check if processor was halted
- leave_halt();
-
- // Clear both interrupt flip flops
- m_iff1 = m_iff2 = 0;
-
- // 'interrupt latency' cycles
- T(7);
- if (m_nsc800_irq_state[NSC800_RSTA])
- {
- wm16_sp(m_pc);
- PCD = 0x003c;
- }
- else if (m_nsc800_irq_state[NSC800_RSTB])
- {
- wm16_sp(m_pc);
- PCD = 0x0034;
- }
- else if (m_nsc800_irq_state[NSC800_RSTC])
- {
- wm16_sp(m_pc);
- PCD = 0x002c;
- }
- else
- {
- T(2 * m_memrq_cycles);
- }
-
- WZ = PCD;
-
-#if HAS_LDAIR_QUIRK
- // reset parity flag after LD A,I or LD A,R
- if (m_after_ldair) F &= ~PF;
-#endif
-}
/****************************************************************************
* Processor initialization
@@ -3346,80 +519,28 @@ void z80_device::device_start()
{
if (!tables_initialised)
{
- u8 *padd = &SZHVC_add[ 0*256];
- u8 *padc = &SZHVC_add[256*256];
- u8 *psub = &SZHVC_sub[ 0*256];
- u8 *psbc = &SZHVC_sub[256*256];
- for (int oldval = 0; oldval < 256; oldval++)
- {
- for (int newval = 0; newval < 256; newval++)
- {
- // add or adc w/o carry set
- int val = newval - oldval;
- *padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padd |= (newval & (YF | XF)); // undocumented flag bits 5+3
- if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF;
- if( newval < oldval ) *padd |= CF;
- if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padd |= VF;
- padd++;
-
- // adc with carry set
- val = newval - oldval - 1;
- *padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
- *padc |= (newval & (YF | XF)); // undocumented flag bits 5+3
- if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF;
- if( newval <= oldval ) *padc |= CF;
- if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF;
- padc++;
-
- // cp, sub or sbc w/o carry set
- val = oldval - newval;
- *psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psub |= (newval & (YF | XF)); // undocumented flag bits 5+3
- if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF;
- if( newval > oldval ) *psub |= CF;
- if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF;
- psub++;
-
- // sbc with carry set
- val = oldval - newval - 1;
- *psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
- *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
- if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF;
- if( newval >= oldval ) *psbc |= CF;
- if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF;
- psbc++;
- }
- }
-
for (int i = 0; i < 256; i++)
{
int p = 0;
- if( i&0x01 ) ++p;
- if( i&0x02 ) ++p;
- if( i&0x04 ) ++p;
- if( i&0x08 ) ++p;
- if( i&0x10 ) ++p;
- if( i&0x20 ) ++p;
- if( i&0x40 ) ++p;
- if( i&0x80 ) ++p;
+ for (int b = 0; b < 8; b++)
+ p += BIT(i, b);
SZ[i] = i ? i & SF : ZF;
SZ[i] |= (i & (YF | XF)); // undocumented flag bits 5+3
SZ_BIT[i] = i ? i & SF : ZF | PF;
SZ_BIT[i] |= (i & (YF | XF)); // undocumented flag bits 5+3
SZP[i] = SZ[i] | ((p & 1) ? 0 : PF);
SZHV_inc[i] = SZ[i];
- if( i == 0x80 ) SZHV_inc[i] |= VF;
- if( (i & 0x0f) == 0x00 ) SZHV_inc[i] |= HF;
+ if (i == 0x80) SZHV_inc[i] |= VF;
+ if ((i & 0x0f) == 0x00) SZHV_inc[i] |= HF;
SZHV_dec[i] = SZ[i] | NF;
- if( i == 0x7f ) SZHV_dec[i] |= VF;
- if( (i & 0x0f) == 0x0f ) SZHV_dec[i] |= HF;
+ if (i == 0x7f) SZHV_dec[i] |= VF;
+ if ((i & 0x0f) == 0x0f) SZHV_dec[i] |= HF;
}
tables_initialised = true;
}
- save_item(NAME(m_prvpc.w.l));
+ save_item(NAME(PRVPC));
save_item(NAME(PC));
save_item(NAME(SP));
save_item(NAME(AF));
@@ -3429,57 +550,64 @@ void z80_device::device_start()
save_item(NAME(IX));
save_item(NAME(IY));
save_item(NAME(WZ));
- save_item(NAME(m_af2.w.l));
- save_item(NAME(m_bc2.w.l));
- save_item(NAME(m_de2.w.l));
- save_item(NAME(m_hl2.w.l));
- save_item(NAME(m_r));
- save_item(NAME(m_r2));
- save_item(NAME(m_q));
- save_item(NAME(m_qtemp));
+ save_item(NAME(m_af2.w));
+ save_item(NAME(m_bc2.w));
+ save_item(NAME(m_de2.w));
+ save_item(NAME(m_hl2.w));
+ save_item(NAME(QT));
+ save_item(NAME(Q));
+ save_item(NAME(R));
+ save_item(NAME(R2));
save_item(NAME(m_iff1));
save_item(NAME(m_iff2));
save_item(NAME(m_halt));
save_item(NAME(m_im));
save_item(NAME(m_i));
save_item(NAME(m_nmi_state));
- save_item(NAME(m_nmi_pending));
save_item(NAME(m_irq_state));
save_item(NAME(m_wait_state));
save_item(NAME(m_busrq_state));
- save_item(NAME(m_after_ei));
- save_item(NAME(m_after_ldair));
+ save_item(NAME(m_busack_state));
+ save_item(NAME(m_ea));
+ save_item(NAME(m_service_attention));
+ save_item(NAME(m_tmp_irq_vector));
+ save_item(NAME(m_shared_data.w));
+ save_item(NAME(m_shared_data2.w));
+ save_item(NAME(m_rtemp));
+ save_item(NAME(m_ref));
// Reset registers to their initial values
PRVPC = 0;
- PCD = 0;
- SPD = 0;
- AFD = 0;
- BCD = 0;
- DED = 0;
- HLD = 0;
- IXD = 0;
- IYD = 0;
+ PC = 0;
+ SP = 0;
+ AF = 0;
+ BC = 0;
+ DE = 0;
+ HL = 0;
+ IX = 0;
+ IY = 0;
WZ = 0;
- m_af2.d = 0;
- m_bc2.d = 0;
- m_de2.d = 0;
- m_hl2.d = 0;
- m_r = 0;
- m_r2 = 0;
+ m_af2.w = 0;
+ m_bc2.w = 0;
+ m_de2.w = 0;
+ m_hl2.w = 0;
+ QT = 0;
+ Q = 0;
+ R = 0;
+ R2 = 0;
m_iff1 = 0;
m_iff2 = 0;
m_halt = 0;
m_im = 0;
m_i = 0;
m_nmi_state = 0;
- m_nmi_pending = 0;
m_irq_state = 0;
m_wait_state = 0;
m_busrq_state = 0;
- m_after_ei = 0;
- m_after_ldair = 0;
+ m_busack_state = 0;
m_ea = 0;
+ m_service_attention = 0;
+ m_rtemp = 0;
space(AS_PROGRAM).cache(m_args);
space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(m_opcodes);
@@ -3490,8 +618,8 @@ void z80_device::device_start()
set_f(ZF); // Zero flag is set
// set up the state table
- state_add(STATE_GENPC, "PC", m_pc.w.l).callimport();
- state_add(STATE_GENPCBASE, "CURPC", m_prvpc.w.l).callimport().noshow();
+ state_add(STATE_GENPC, "PC", m_pc.w).callimport();
+ state_add(STATE_GENPCBASE, "CURPC", m_prvpc.w).callimport().noshow();
state_add(Z80_SP, "SP", SP);
state_add(STATE_GENFLAGS, "GENFLAGS", F).noshow().formatstr("%8s");
state_add(Z80_A, "A", A).noshow();
@@ -3507,10 +635,10 @@ void z80_device::device_start()
state_add(Z80_HL, "HL", HL);
state_add(Z80_IX, "IX", IX);
state_add(Z80_IY, "IY", IY);
- state_add(Z80_AF2, "AF2", m_af2.w.l);
- state_add(Z80_BC2, "BC2", m_bc2.w.l);
- state_add(Z80_DE2, "DE2", m_de2.w.l);
- state_add(Z80_HL2, "HL2", m_hl2.w.l);
+ state_add(Z80_AF2, "AF2", m_af2.w);
+ state_add(Z80_BC2, "BC2", m_bc2.w);
+ state_add(Z80_DE2, "DE2", m_de2.w);
+ state_add(Z80_HL2, "HL2", m_hl2.w);
state_add(Z80_WZ, "WZ", WZ);
state_add(Z80_R, "R", m_rtemp).callimport().callexport();
state_add(Z80_I, "I", m_i);
@@ -3523,13 +651,6 @@ void z80_device::device_start()
set_icountptr(m_icount);
}
-void nsc800_device::device_start()
-{
- z80_device::device_start();
-
- save_item(NAME(m_nsc800_irq_state));
-}
-
/****************************************************************************
* Do a reset
****************************************************************************/
@@ -3537,28 +658,15 @@ void z80_device::device_reset()
{
leave_halt();
+ m_ref = 0xffff00;
PC = 0x0000;
+ WZ = PC;
m_i = 0;
m_r = 0;
m_r2 = 0;
- m_nmi_pending = false;
- m_after_ei = false;
- m_after_ldair = false;
m_iff1 = 0;
m_iff2 = 0;
-
- WZ = PCD;
-}
-
-void nsc800_device::device_reset()
-{
- z80_device::device_reset();
- memset(m_nsc800_irq_state, 0, sizeof(m_nsc800_irq_state));
-}
-
-inline void z80_device::execute_cycles(u8 icount)
-{
- m_icount -= icount;
+ m_service_attention = 0;
}
/****************************************************************************
@@ -3566,42 +674,7 @@ inline void z80_device::execute_cycles(u8 icount)
****************************************************************************/
void z80_device::execute_run()
{
- do
- {
- if (m_wait_state)
- {
- // stalled
- m_icount = 0;
- return;
- }
-
- // check for interrupts before each instruction
- check_interrupts();
-
- m_after_ei = false;
- m_after_ldair = false;
-
- PRVPC = PCD;
- debugger_instruction_hook(PCD);
-
- u8 opcode = rop();
-
- // when in HALT state, the fetched opcode is not dispatched (aka a NOP)
- if (m_halt)
- {
- PC--;
- opcode = 0;
- }
- EXEC(op, opcode);
- } while (m_icount > 0);
-}
-
-void z80_device::check_interrupts()
-{
- if (m_nmi_pending)
- take_nmi();
- else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei)
- take_interrupt();
+ #include "cpu/z80/z80.hxx"
}
void z80_device::execute_set_input(int inputnum, int state)
@@ -3610,12 +683,18 @@ void z80_device::execute_set_input(int inputnum, int state)
{
case Z80_INPUT_LINE_BUSRQ:
m_busrq_state = state;
+ if (state != CLEAR_LINE)
+ set_service_attention<SA_BUSRQ, 1>();
+ else
+ set_service_attention<SA_BUSRQ, 0>();
break;
case INPUT_LINE_NMI:
// mark an NMI pending on the rising edge
if (m_nmi_state == CLEAR_LINE && state != CLEAR_LINE)
- m_nmi_pending = true;
+ {
+ set_service_attention<SA_NMI_PENDING, 1>();
+ }
m_nmi_state = state;
break;
@@ -3624,6 +703,10 @@ void z80_device::execute_set_input(int inputnum, int state)
m_irq_state = state;
if (daisy_chain_present())
m_irq_state = (daisy_update_irq_state() == ASSERT_LINE) ? ASSERT_LINE : m_irq_state;
+ if (state != CLEAR_LINE)
+ set_service_attention<SA_IRQ_ON, 1>();
+ else
+ set_service_attention<SA_IRQ_ON, 0>();
// the main execute loop will take the interrupt
break;
@@ -3637,38 +720,6 @@ void z80_device::execute_set_input(int inputnum, int state)
}
}
-void nsc800_device::check_interrupts()
-{
- if (m_nmi_pending)
- take_nmi();
- else if ((m_nsc800_irq_state[NSC800_RSTA] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTB] != CLEAR_LINE || m_nsc800_irq_state[NSC800_RSTC] != CLEAR_LINE) && m_iff1 && !m_after_ei)
- take_interrupt_nsc800();
- else if (m_irq_state != CLEAR_LINE && m_iff1 && !m_after_ei)
- take_interrupt();
-}
-
-void nsc800_device::execute_set_input(int inputnum, int state)
-{
- switch (inputnum)
- {
- case NSC800_RSTA:
- m_nsc800_irq_state[NSC800_RSTA] = state;
- break;
-
- case NSC800_RSTB:
- m_nsc800_irq_state[NSC800_RSTB] = state;
- break;
-
- case NSC800_RSTC:
- m_nsc800_irq_state[NSC800_RSTC] = state;
- break;
-
- default:
- z80_device::execute_set_input(inputnum, state);
- break;
- }
-}
-
/**************************************************************************
* STATE IMPORT/EXPORT
**************************************************************************/
@@ -3676,12 +727,15 @@ void z80_device::state_import(const device_state_entry &entry)
{
switch (entry.index())
{
- case STATE_GENPC:
- m_prvpc = m_pc;
- break;
-
case STATE_GENPCBASE:
m_pc = m_prvpc;
+ [[fallthrough]];
+ case STATE_GENPC:
+ m_prvpc = m_pc;
+ m_ref = 0xffff00;
+ set_service_attention<SA_AFTER_EI, 0>();
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 0>();
break;
case Z80_R:
@@ -3733,7 +787,8 @@ std::unique_ptr<util::disasm_interface> z80_device::create_disassembler()
return std::make_unique<z80_disassembler>();
}
-z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : z80_device(mconfig, Z80, tag, owner, clock)
+z80_device::z80_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : z80_device(mconfig, Z80, tag, owner, clock)
{
}
@@ -3747,6 +802,7 @@ z80_device::z80_device(const machine_config &mconfig, device_type type, const ch
m_refresh_cb(*this),
m_nomreq_cb(*this),
m_halt_cb(*this),
+ m_busack_cb(*this),
m_m1_cycles(4),
m_memrq_cycles(3),
m_iorq_cycles(4)
@@ -3771,10 +827,3 @@ device_memory_interface::space_config_vector z80_device::memory_space_config() c
}
DEFINE_DEVICE_TYPE(Z80, z80_device, "z80", "Zilog Z80")
-
-nsc800_device::nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : z80_device(mconfig, NSC800, tag, owner, clock)
-{
-}
-
-DEFINE_DEVICE_TYPE(NSC800, nsc800_device, "nsc800", "National Semiconductor NSC800")
diff --git a/src/devices/cpu/z80/z80.h b/src/devices/cpu/z80/z80.h
index db38863f84c..3498f100dcd 100644
--- a/src/devices/cpu/z80/z80.h
+++ b/src/devices/cpu/z80/z80.h
@@ -9,12 +9,10 @@
enum
{
- NSC800_RSTA = INPUT_LINE_IRQ0 + 1,
- NSC800_RSTB,
- NSC800_RSTC,
- Z80_INPUT_LINE_WAIT,
- Z80_INPUT_LINE_BOGUSWAIT, // WAIT pin implementation used to be nonexistent, please remove this when all drivers are updated with Z80_INPUT_LINE_WAIT
- Z80_INPUT_LINE_BUSRQ
+ Z80_INPUT_LINE_WAIT = INPUT_LINE_IRQ0 + 1,
+ Z80_INPUT_LINE_BUSRQ,
+
+ Z80_INPUT_LINE_MAX
};
enum
@@ -43,19 +41,24 @@ public:
auto refresh_cb() { return m_refresh_cb.bind(); }
auto nomreq_cb() { return m_nomreq_cb.bind(); }
auto halt_cb() { return m_halt_cb.bind(); }
+ auto busack_cb() { return m_busack_cb.bind(); }
+
+ // output pins state
+ int halt_r() { return m_halt; }
+ int busack_r() { return m_busack_state; }
protected:
z80_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device_t implementation
virtual void device_validity_check(validity_checker &valid) const override;
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface implementation
- virtual u32 execute_min_cycles() const noexcept override { return 2; }
+ virtual bool cpu_is_interruptible() const override { return true; }
+ virtual u32 execute_min_cycles() const noexcept override { return 1; }
virtual u32 execute_max_cycles() const noexcept override { return 16; }
- virtual u32 execute_input_lines() const noexcept override { return 4; }
virtual u32 execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;
@@ -63,7 +66,6 @@ protected:
// device_memory_interface implementation
virtual space_config_vector memory_space_config() const override;
- virtual u32 translate_memory_address(u16 address) { return address; }
// device_state_interface implementation
virtual void state_import(const device_state_entry &entry) override;
@@ -73,125 +75,23 @@ protected:
// device_disasm_interface implementation
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
-#undef PROTOTYPES
-#define PROTOTYPES(prefix) \
- void prefix##_00(); void prefix##_01(); void prefix##_02(); void prefix##_03(); \
- void prefix##_04(); void prefix##_05(); void prefix##_06(); void prefix##_07(); \
- void prefix##_08(); void prefix##_09(); void prefix##_0a(); void prefix##_0b(); \
- void prefix##_0c(); void prefix##_0d(); void prefix##_0e(); void prefix##_0f(); \
- void prefix##_10(); void prefix##_11(); void prefix##_12(); void prefix##_13(); \
- void prefix##_14(); void prefix##_15(); void prefix##_16(); void prefix##_17(); \
- void prefix##_18(); void prefix##_19(); void prefix##_1a(); void prefix##_1b(); \
- void prefix##_1c(); void prefix##_1d(); void prefix##_1e(); void prefix##_1f(); \
- void prefix##_20(); void prefix##_21(); void prefix##_22(); void prefix##_23(); \
- void prefix##_24(); void prefix##_25(); void prefix##_26(); void prefix##_27(); \
- void prefix##_28(); void prefix##_29(); void prefix##_2a(); void prefix##_2b(); \
- void prefix##_2c(); void prefix##_2d(); void prefix##_2e(); void prefix##_2f(); \
- void prefix##_30(); void prefix##_31(); void prefix##_32(); void prefix##_33(); \
- void prefix##_34(); void prefix##_35(); void prefix##_36(); void prefix##_37(); \
- void prefix##_38(); void prefix##_39(); void prefix##_3a(); void prefix##_3b(); \
- void prefix##_3c(); void prefix##_3d(); void prefix##_3e(); void prefix##_3f(); \
- void prefix##_40(); void prefix##_41(); void prefix##_42(); void prefix##_43(); \
- void prefix##_44(); void prefix##_45(); void prefix##_46(); void prefix##_47(); \
- void prefix##_48(); void prefix##_49(); void prefix##_4a(); void prefix##_4b(); \
- void prefix##_4c(); void prefix##_4d(); void prefix##_4e(); void prefix##_4f(); \
- void prefix##_50(); void prefix##_51(); void prefix##_52(); void prefix##_53(); \
- void prefix##_54(); void prefix##_55(); void prefix##_56(); void prefix##_57(); \
- void prefix##_58(); void prefix##_59(); void prefix##_5a(); void prefix##_5b(); \
- void prefix##_5c(); void prefix##_5d(); void prefix##_5e(); void prefix##_5f(); \
- void prefix##_60(); void prefix##_61(); void prefix##_62(); void prefix##_63(); \
- void prefix##_64(); void prefix##_65(); void prefix##_66(); void prefix##_67(); \
- void prefix##_68(); void prefix##_69(); void prefix##_6a(); void prefix##_6b(); \
- void prefix##_6c(); void prefix##_6d(); void prefix##_6e(); void prefix##_6f(); \
- void prefix##_70(); void prefix##_71(); void prefix##_72(); void prefix##_73(); \
- void prefix##_74(); void prefix##_75(); void prefix##_76(); void prefix##_77(); \
- void prefix##_78(); void prefix##_79(); void prefix##_7a(); void prefix##_7b(); \
- void prefix##_7c(); void prefix##_7d(); void prefix##_7e(); void prefix##_7f(); \
- void prefix##_80(); void prefix##_81(); void prefix##_82(); void prefix##_83(); \
- void prefix##_84(); void prefix##_85(); void prefix##_86(); void prefix##_87(); \
- void prefix##_88(); void prefix##_89(); void prefix##_8a(); void prefix##_8b(); \
- void prefix##_8c(); void prefix##_8d(); void prefix##_8e(); void prefix##_8f(); \
- void prefix##_90(); void prefix##_91(); void prefix##_92(); void prefix##_93(); \
- void prefix##_94(); void prefix##_95(); void prefix##_96(); void prefix##_97(); \
- void prefix##_98(); void prefix##_99(); void prefix##_9a(); void prefix##_9b(); \
- void prefix##_9c(); void prefix##_9d(); void prefix##_9e(); void prefix##_9f(); \
- void prefix##_a0(); void prefix##_a1(); void prefix##_a2(); void prefix##_a3(); \
- void prefix##_a4(); void prefix##_a5(); void prefix##_a6(); void prefix##_a7(); \
- void prefix##_a8(); void prefix##_a9(); void prefix##_aa(); void prefix##_ab(); \
- void prefix##_ac(); void prefix##_ad(); void prefix##_ae(); void prefix##_af(); \
- void prefix##_b0(); void prefix##_b1(); void prefix##_b2(); void prefix##_b3(); \
- void prefix##_b4(); void prefix##_b5(); void prefix##_b6(); void prefix##_b7(); \
- void prefix##_b8(); void prefix##_b9(); void prefix##_ba(); void prefix##_bb(); \
- void prefix##_bc(); void prefix##_bd(); void prefix##_be(); void prefix##_bf(); \
- void prefix##_c0(); void prefix##_c1(); void prefix##_c2(); void prefix##_c3(); \
- void prefix##_c4(); void prefix##_c5(); void prefix##_c6(); void prefix##_c7(); \
- void prefix##_c8(); void prefix##_c9(); void prefix##_ca(); void prefix##_cb(); \
- void prefix##_cc(); void prefix##_cd(); void prefix##_ce(); void prefix##_cf(); \
- void prefix##_d0(); void prefix##_d1(); void prefix##_d2(); void prefix##_d3(); \
- void prefix##_d4(); void prefix##_d5(); void prefix##_d6(); void prefix##_d7(); \
- void prefix##_d8(); void prefix##_d9(); void prefix##_da(); void prefix##_db(); \
- void prefix##_dc(); void prefix##_dd(); void prefix##_de(); void prefix##_df(); \
- void prefix##_e0(); void prefix##_e1(); void prefix##_e2(); void prefix##_e3(); \
- void prefix##_e4(); void prefix##_e5(); void prefix##_e6(); void prefix##_e7(); \
- void prefix##_e8(); void prefix##_e9(); void prefix##_ea(); void prefix##_eb(); \
- void prefix##_ec(); void prefix##_ed(); void prefix##_ee(); void prefix##_ef(); \
- void prefix##_f0(); void prefix##_f1(); void prefix##_f2(); void prefix##_f3(); \
- void prefix##_f4(); void prefix##_f5(); void prefix##_f6(); void prefix##_f7(); \
- void prefix##_f8(); void prefix##_f9(); void prefix##_fa(); void prefix##_fb(); \
- void prefix##_fc(); void prefix##_fd(); void prefix##_fe(); void prefix##_ff();
-
- PROTOTYPES(op)
- PROTOTYPES(cb)
- PROTOTYPES(dd)
- PROTOTYPES(ed)
- PROTOTYPES(fd)
- PROTOTYPES(xycb)
-
void illegal_1();
void illegal_2();
+ u8 flags_szyxc(u16 value);
+ template <u8 Bit, bool State> void set_service_attention() { static_assert(Bit < 8, "out of range bit index"); if (State) m_service_attention |= (1 << Bit); else m_service_attention &= ~(1 << Bit); };
+ template <u8 Bit> bool get_service_attention() { static_assert(Bit < 8, "out of range bit index"); return m_service_attention & (1 << Bit); };
void halt();
void leave_halt();
- u8 in(u16 port);
- void out(u16 port, u8 value);
- u8 rm(u16 addr);
- u8 rm_reg(u16 addr);
- void rm16(u16 addr, PAIR &r);
- void wm(u16 addr, u8 value);
- void wm16(u16 addr, PAIR &r);
- void wm16_sp(PAIR &r);
- u8 rop();
- u8 arg();
- u16 arg16();
- void eax();
- void eay();
- void pop(PAIR &r);
- void push(PAIR &r);
- void jp(void);
- void jp_cond(bool cond);
- void jr();
- void jr_cond(bool cond, u8 opcode);
- void call();
- void call_cond(bool cond, u8 opcode);
- void ret_cond(bool cond, u8 opcode);
- void retn();
- void reti();
- void ld_r_a();
- void ld_a_r();
- void ld_i_a();
- void ld_a_i();
- void rst(u16 addr);
- u8 inc(u8 value);
- u8 dec(u8 value);
+ void inc(u8 &r);
+ void dec(u8 &r);
void rlca();
void rrca();
void rla();
void rra();
- void rrd();
- void rld();
void add_a(u8 value);
void adc_a(u8 value);
- void sub(u8 value);
+ void sub_a(u8 value);
void sbc_a(u8 value);
void neg();
void daa();
@@ -200,10 +100,6 @@ protected:
void xor_a(u8 value);
void cp(u8 value);
void exx();
- void ex_sp(PAIR &r);
- void add16(PAIR &dr, PAIR &sr);
- void adc_hl(PAIR &r);
- void sbc_hl(PAIR &r);
u8 rlc(u8 value);
u8 rrc(u8 value);
u8 rl(u8 value);
@@ -217,35 +113,14 @@ protected:
void bit_xy(int bit, u8 value);
u8 res(int bit, u8 value);
u8 set(int bit, u8 value);
- void ldi();
- void cpi();
- u8 ini();
- u8 outi();
- void ldd();
- void cpd();
- u8 ind();
- u8 outd();
- void ldir();
- void cpir();
- void inir();
- void otir();
- void lddr();
- void cpdr();
- void indr();
- void otdr();
void ei();
void set_f(u8 f);
- void block_io_interrupted_flags(u8 data);
-
- void execute_cycles(u8 icount);
- virtual void check_interrupts();
- void take_interrupt();
- void take_nmi();
- void nomreq_ir(s8 cycles);
- void nomreq_addr(u16 addr, s8 cycles);
+ void block_io_interrupted_flags();
virtual u8 data_read(u16 addr);
virtual void data_write(u16 addr, u8 value);
+ virtual u8 stack_read(u16 addr) { return data_read(addr); }
+ virtual void stack_write(u16 addr, u8 value) { return data_write(addr, value); }
virtual u8 opcode_read();
virtual u8 arg_read();
@@ -262,21 +137,32 @@ protected:
devcb_write8 m_refresh_cb;
devcb_write8 m_nomreq_cb;
devcb_write_line m_halt_cb;
-
- PAIR m_prvpc;
- PAIR m_pc;
- PAIR m_sp;
- PAIR m_af;
- PAIR m_bc;
- PAIR m_de;
- PAIR m_hl;
- PAIR m_ix;
- PAIR m_iy;
- PAIR m_wz;
- PAIR m_af2;
- PAIR m_bc2;
- PAIR m_de2;
- PAIR m_hl2;
+ devcb_write_line m_busack_cb;
+
+ static constexpr u8 SA_BUSRQ = 0;
+ static constexpr u8 SA_BUSACK = 1;
+ static constexpr u8 SA_NMI_PENDING = 2;
+ static constexpr u8 SA_IRQ_ON = 3;
+ static constexpr u8 SA_HALT = 4;
+ static constexpr u8 SA_AFTER_EI = 5;
+ static constexpr u8 SA_AFTER_LDAIR = 6;
+ static constexpr u8 SA_NSC800_IRQ_ON = 7;
+ u8 m_service_attention; // bitmap for required handling in service step
+
+ PAIR16 m_prvpc;
+ PAIR16 m_pc;
+ PAIR16 m_sp;
+ PAIR16 m_af;
+ PAIR16 m_bc;
+ PAIR16 m_de;
+ PAIR16 m_hl;
+ PAIR16 m_ix;
+ PAIR16 m_iy;
+ PAIR16 m_wz;
+ PAIR16 m_af2;
+ PAIR16 m_bc2;
+ PAIR16 m_de2;
+ PAIR16 m_hl2;
u8 m_qtemp;
u8 m_q;
u8 m_r;
@@ -286,45 +172,33 @@ protected:
u8 m_halt;
u8 m_im;
u8 m_i;
- u8 m_nmi_state; // nmi line state
- u8 m_nmi_pending; // nmi pending
- u8 m_irq_state; // irq line state
- int m_wait_state; // wait line state
- int m_busrq_state; // bus request line state
- u8 m_after_ei; // are we in the EI shadow?
- u8 m_after_ldair; // same, but for LD A,I or LD A,R
- u32 m_ea;
+ u8 m_nmi_state; // nmi pin state
+ u8 m_irq_state; // irq pin state
+ int m_wait_state; // wait pin state
+ int m_busrq_state; // bus request pin state
+ u8 m_busack_state; // bus acknowledge pin state
+ u16 m_ea;
int m_icount;
+ int m_tmp_irq_vector;
+ PAIR16 m_shared_data;
+ PAIR16 m_shared_data2;
u8 m_rtemp;
+ u32 m_ref;
u8 m_m1_cycles;
u8 m_memrq_cycles;
u8 m_iorq_cycles;
-};
-DECLARE_DEVICE_TYPE(Z80, z80_device)
-
-class nsc800_device : public z80_device
-{
-public:
- nsc800_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
-
-protected:
- // device_t implementation
- virtual void device_start() override;
- virtual void device_reset() override;
-
- // device_execute_interface implementation
- virtual u32 execute_input_lines() const noexcept override { return 7; }
- virtual void execute_set_input(int inputnum, int state) override;
-
- virtual void check_interrupts() override;
- void take_interrupt_nsc800();
- u8 m_nsc800_irq_state[4]; // state of NSC800 restart interrupts A, B, C
+ static bool tables_initialised;
+ static u8 SZ[0x100]; // zero and sign flags
+ static u8 SZ_BIT[0x100]; // zero, sign and parity/overflow (=zero) flags for BIT opcode
+ static u8 SZP[0x100]; // zero, sign and parity flags
+ static u8 SZHV_inc[0x100]; // zero, sign, half carry and overflow flags INC r8
+ static u8 SZHV_dec[0x100]; // zero, sign, half carry and overflow flags DEC r8
};
-DECLARE_DEVICE_TYPE(NSC800, nsc800_device)
+DECLARE_DEVICE_TYPE(Z80, z80_device)
#endif // MAME_CPU_Z80_Z80_H
diff --git a/src/devices/cpu/z80/z80.inc b/src/devices/cpu/z80/z80.inc
new file mode 100644
index 00000000000..1c7dd7843a0
--- /dev/null
+++ b/src/devices/cpu/z80/z80.inc
@@ -0,0 +1,67 @@
+/* On an NMOS Z80, if LD A,I or LD A,R is interrupted, P/V flag gets reset,
+ even if IFF2 was set before this instruction. This issue was fixed on
+ the CMOS Z80, so until knowing (most) Z80 types on hardware, it's disabled */
+#define HAS_LDAIR_QUIRK 0
+
+
+/****************************************************************************
+ * The Z80 registers. halt is set to 1 when the CPU is halted, the refresh
+ * register is calculated as follows: refresh = (r & 127) | (r2 & 128)
+ ****************************************************************************/
+#define CF 0x01
+#define NF 0x02
+#define PF 0x04
+#define VF PF
+#define XF 0x08
+#define HF 0x10
+#define YF 0x20
+#define ZF 0x40
+#define SF 0x80
+
+#define INT_IRQ 0x01
+#define NMI_IRQ 0x02
+
+#define PRVPC m_prvpc.w // previous program counter
+#define PC m_pc.w
+
+#define SP m_sp.w
+
+#define AF m_af.w
+#define A m_af.b.h
+#define F m_af.b.l
+#define Q m_q
+#define QT m_qtemp
+#define I m_i
+#define R m_r
+#define R2 m_r2
+
+#define BC m_bc.w
+#define B m_bc.b.h
+#define C m_bc.b.l
+
+#define DE m_de.w
+#define D m_de.b.h
+#define E m_de.b.l
+
+#define HL m_hl.w
+#define H m_hl.b.h
+#define L m_hl.b.l
+
+#define IX m_ix.w
+#define HX m_ix.b.h
+#define LX m_ix.b.l
+
+#define IY m_iy.w
+#define HY m_iy.b.h
+#define LY m_iy.b.l
+
+#define WZ m_wz.w
+#define WZ_H m_wz.b.h
+#define WZ_L m_wz.b.l
+
+
+#define TDAT m_shared_data.w // 16bit input(if use as second parameter) or output in steps.
+#define TDAT2 m_shared_data2.w
+#define TDAT_H m_shared_data.b.h
+#define TDAT_L m_shared_data.b.l
+#define TDAT8 m_shared_data.b.l // Typically represents values from D0..8 pins. 8bit input or output in steps.
diff --git a/src/devices/cpu/z80/z80.lst b/src/devices/cpu/z80/z80.lst
new file mode 100644
index 00000000000..17298dffca5
--- /dev/null
+++ b/src/devices/cpu/z80/z80.lst
@@ -0,0 +1,8987 @@
+# license:BSD-3-Clause
+# copyright-holders:Juergen Buchmueller, Andrei I. Holub
+##########################################################
+# macros
+##########################################################
+macro nomreq_addr %addr
+ if (nomemrq_en)
+ m_nomreq_cb(%addr, 0x00, 0xff);
+ + 1
+
+macro nomreq_ir %cycles
+ %cycles * @nomreq_addr (m_i << 8) | (m_r2 & 0x80) | (m_r & 0x7f)
+
+macro in %port
+ m_iorq_cycles !! TDAT8 = m_io.read_interruptible(%port);
+
+macro out %port
+ m_iorq_cycles !! m_io.write_interruptible(%port, TDAT8);
+
+macro rm %addr
+ m_memrq_cycles !! TDAT8 = data_read(%addr);
+
+macro rm_reg %addr
+ @rm %addr
+ @nomreq_addr %addr
+
+macro rm16 %addr
+ @rm %addr
+ TDAT_H = TDAT_L;
+ @rm %addr+1
+ using std::swap;
+ swap(TDAT_H, TDAT_L);
+
+macro wm %addr
+ m_memrq_cycles !! data_write(%addr, TDAT8);
+
+macro wm16 %addr
+ @wm %addr
+ TDAT8 = TDAT_H;
+ @wm %addr+1
+
+macro wm16_sp %d16
+ SP--;
+ m_memrq_cycles !! stack_write(SP, (%d16) >> 8);
+ SP--;
+ m_memrq_cycles !! stack_write(SP, %d16);
+
+macro rop
+ m_m1_cycles-2 !! TDAT8 = opcode_read();
+ if (refresh_en)
+ m_refresh_cb((I << 8) | (R2 & 0x80) | (R & 0x7f), 0x00, 0xff);
+ + 2
+ PC++;
+ R++;
+ Q = QT;
+ QT = YF | XF;
+
+macro r800:rop
+ m_m1_cycles !! TDAT8 = opcode_read();
+ PC++;
+ R++;
+ Q = QT;
+ QT = YF | XF;
+
+macro arg
+ m_memrq_cycles !! TDAT8 = arg_read();
+ PC++;
+
+macro arg16
+ @arg
+ TDAT_H = TDAT_L;
+ @arg
+ using std::swap;
+ swap(TDAT_H, TDAT_L);
+
+macro eax
+ @arg
+ m_ea = (u16)(IX + (s8)TDAT8);
+ WZ = m_ea;
+
+macro eay
+ @arg
+ m_ea = (u16)(IY + (s8)TDAT8);
+ WZ = m_ea;
+
+macro pop
+ m_memrq_cycles !! TDAT_L = stack_read(SP);
+ SP++;
+ m_memrq_cycles !! TDAT_H = stack_read(SP);
+ SP++;
+
+macro push %d16
+ @nomreq_ir 1
+ @wm16_sp %d16
+
+macro jp
+ @arg16
+ PC = TDAT;
+ WZ = PC;
+
+macro t6a84:jp
+ @arg16
+ PC = TDAT;
+ WZ = PC;
+ paged_jump();
+
+macro jp_cond
+ if (TDAT8) {
+ @arg16
+ PC = TDAT;
+ WZ = PC;
+ } else {
+ // implicit do PC += 2
+ @arg16
+ WZ = TDAT;
+ }
+
+macro t6a84:jp_cond
+ if (TDAT8) {
+ @arg16
+ PC = TDAT;
+ WZ = PC;
+ paged_jump();
+ } else {
+ // implicit do PC += 2
+ @arg16
+ WZ = TDAT;
+ }
+
+macro jr
+ @arg
+ 5 * @nomreq_addr PC-1
+ PC += (s8)TDAT8;
+ WZ = PC;
+
+macro t6a84:jr
+ @arg
+ 5 * @nomreq_addr PC-1
+ PC += (s8)TDAT8;
+ WZ = PC;
+ paged_jump();
+
+macro r800:jr
+ @arg
+ + 1
+ PC += (s8)TDAT8;
+ WZ = PC;
+
+macro jr_cond
+ if (TDAT8) {
+ @jr
+ } else {
+ @arg
+ }
+
+macro arg16_call
+ @arg16
+ m_ea = TDAT;
+ @nomreq_addr PC-1
+ WZ = m_ea;
+ @wm16_sp PC
+ PC = m_ea;
+
+macro r800:arg16_call
+ @arg16
+ m_ea = TDAT;
+ @nomreq_addr PC-1
+ WZ = m_ea;
+ @wm16_sp PC
+ PC = m_ea;
+
+macro call_cond
+ if (TDAT8) {
+ @arg16_call
+ } else {
+ @arg16
+ WZ = TDAT;
+ }
+
+macro ret_cond
+ @nomreq_ir 1
+ if (TDAT8) {
+ @pop
+ PC = TDAT;
+ WZ = PC;
+ }
+
+macro retn
+ @pop
+ PC = TDAT;
+ LOGMASKED(LOG_INT, "RETN m_iff1:%d m_iff2:%d\n", m_iff1, m_iff2);
+ WZ = PC;
+ m_iff1 = m_iff2;
+
+macro z80n:retn
+ m_out_retn_seen_cb(0);
+ @pop
+ if (m_stackless) {
+ m_pc.b.l = m_in_nextreg_cb(0xc2);
+ m_pc.b.h = m_in_nextreg_cb(0xc3);
+ } else {
+ PC = TDAT;
+ }
+ LOGMASKED(LOG_INT, "RETN m_iff1:%d m_iff2:%d\n", m_iff1, m_iff2);
+ WZ = PC;
+ m_iff1 = m_iff2;
+
+macro reti
+ @pop
+ PC = TDAT;
+ WZ = PC;
+ m_iff1 = m_iff2;
+ daisy_call_reti_device();
+
+macro t6a84:reti
+ @pop
+ PC = TDAT;
+ WZ = PC;
+ m_iff1 = m_iff2;
+ paged_reti();
+ daisy_call_reti_device();
+
+macro ld_r_a
+ @nomreq_ir 1
+ m_r = A;
+ m_r2 = A & 0x80; // keep bit 7 of r
+
+macro r800:ld_r_a
+ m_r = A;
+ m_r2 = A & 0x80; // keep bit 7 of r
+
+macro ld_a_r
+ @nomreq_ir 1
+ A = (m_r & 0x7f) | m_r2;
+ set_f((F & CF) | SZ[A] | (m_iff2 << 2));
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 1>();
+
+macro r800:ld_a_r
+ A = (m_r & 0x7f) | m_r2;
+ set_f((F & CF) | SZ[A] | (m_iff2 << 2));
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 1>();
+
+macro ld_i_a
+ @nomreq_ir 1
+ m_i = A;
+
+macro r800:ld_i_a
+ m_i = A;
+
+macro ld_a_i
+ @nomreq_ir 1
+ A = m_i;
+ set_f((F & CF) | SZ[A] | (m_iff2 << 2));
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 1>();
+
+macro r800:ld_a_i
+ A = m_i;
+ set_f((F & CF) | SZ[A] | (m_iff2 << 2));
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 1>();
+
+macro rst addr
+ @push PC
+ PC = addr;
+ WZ = PC;
+
+macro rrd
+ @rm HL
+ WZ = HL+1;
+ 4 * @nomreq_addr HL
+ TDAT_H = TDAT8;
+ TDAT8 = (TDAT8 >> 4) | (A << 4);
+ @wm HL
+ A = (A & 0xf0) | (TDAT_H & 0x0f);
+ set_f((F & CF) | SZP[A]);
+
+macro rld
+ @rm HL
+ WZ = HL+1;
+ 4 * @nomreq_addr HL
+ TDAT_H = TDAT8;
+ TDAT8 = (TDAT8 << 4) | (A & 0x0f);
+ @wm HL
+ A = (A & 0xf0) | (TDAT_H >> 4);
+ set_f((F & CF) | SZP[A]);
+
+macro ex_sp %d16
+ @pop
+ @nomreq_addr SP-1
+ @wm16_sp %d16
+ %d16 = TDAT;
+ 2 * @nomreq_addr SP
+ WZ = TDAT;
+
+macro add16
+{
+ @nomreq_ir 7
+ u32 res = TDAT + TDAT2;
+ WZ = TDAT + 1;
+ set_f((F & (SF | ZF | VF)) | (((TDAT ^ res ^ TDAT2) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (YF | XF)));
+ TDAT = (u16)res;
+}
+
+macro r800:add16
+{
+ u32 res = TDAT + TDAT2;
+ WZ = TDAT + 1;
+ set_f((F & (SF | ZF | VF)) | (((TDAT ^ res ^ TDAT2) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (YF | XF)));
+ TDAT = (u16)res;
+}
+
+macro adc_hl
+{
+ @nomreq_ir 7
+ u32 res = HL + TDAT + (F & CF);
+ WZ = HL + 1;
+ set_f((((HL ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13));
+ HL = (u16)res;
+}
+
+macro r800:adc_hl
+{
+ u32 res = HL + TDAT + (F & CF);
+ WZ = HL + 1;
+ set_f((((HL ^ res ^ TDAT) >> 8) & HF) | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL ^ 0x8000) & (TDAT ^ res) & 0x8000) >> 13));
+ HL = (u16)res;
+}
+
+macro sbc_hl
+{
+ @nomreq_ir 7
+ u32 res = HL - TDAT - (F & CF);
+ WZ = HL + 1;
+ set_f((((HL ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL) & (HL ^ res) & 0x8000) >> 13));
+ HL = (u16)res;
+}
+
+macro r800:sbc_hl
+{
+ u32 res = HL - TDAT - (F & CF);
+ WZ = HL + 1;
+ set_f((((HL ^ res ^ TDAT) >> 8) & HF) | NF | ((res >> 16) & CF) | ((res >> 8) & (SF | YF | XF)) | ((res & 0xffff) ? 0 : ZF) | (((TDAT ^ HL) & (HL ^ res) & 0x8000) >> 13));
+ HL = (u16)res;
+}
+
+macro ldi
+ @rm HL
+ @wm DE
+ 2 * @nomreq_addr DE
+ set_f(F & (SF | ZF | CF));
+ if ((A + TDAT8) & 0x02)
+ F |= YF;
+ if ((A + TDAT8) & 0x08)
+ F |= XF;
+ HL++;
+ DE++;
+ BC--;
+ if (BC)
+ F |= VF;
+
+macro r800:ldi
+ @rm HL
+ @wm DE
+ @nomreq_addr DE
+ set_f(F & (SF | ZF | CF));
+ if ((A + TDAT8) & 0x02)
+ F |= YF;
+ if ((A + TDAT8) & 0x08)
+ F |= XF;
+ HL++;
+ DE++;
+ BC--;
+ if (BC)
+ F |= VF;
+
+macro cpi
+{
+ @rm HL
+ 5 * @nomreq_addr HL
+ u8 res = A - TDAT8;
+ WZ++;
+ HL++;
+ BC--;
+ set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF);
+ if (F & HF)
+ res -= 1;
+ if (res & 0x02)
+ F |= YF;
+ if (res & 0x08)
+ F |= XF;
+ if (BC)
+ F |= VF;
+}
+
+macro r800:cpi
+{
+ @rm HL
+ @nomreq_addr HL
+ u8 res = A - TDAT8;
+ WZ++;
+ HL++;
+ BC--;
+ set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF);
+ if (F & HF)
+ res -= 1;
+ if (res & 0x02)
+ F |= YF;
+ if (res & 0x08)
+ F |= XF;
+ if (BC)
+ F |= VF;
+}
+
+macro ini
+{
+ @nomreq_ir 1
+ @in BC
+ WZ = BC + 1;
+ B--;
+ @wm HL
+ HL++;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)((C + 1) & 0xff) + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro r800:ini
+{
+ @in BC
+ WZ = BC + 1;
+ B--;
+ @wm HL
+ HL++;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)((C + 1) & 0xff) + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro outi
+{
+ @nomreq_ir 1
+ @rm HL
+ B--;
+ WZ = BC + 1;
+ @out BC
+ HL++;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)L + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro r800:outi
+{
+ @rm HL
+ B--;
+ WZ = BC + 1;
+ @out BC
+ HL++;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)L + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro ldd
+{
+ @rm HL
+ @wm DE
+ 2 * @nomreq_addr DE
+ set_f(F & (SF | ZF | CF));
+ if ((A + TDAT8) & 0x02)
+ F |= YF;
+ if ((A + TDAT8) & 0x08)
+ F |= XF;
+ HL--;
+ DE--;
+ BC--;
+ if (BC)
+ F |= VF;
+}
+
+macro r800:ldd
+{
+ @rm HL
+ @wm DE
+ @nomreq_addr DE
+ set_f(F & (SF | ZF | CF));
+ if ((A + TDAT8) & 0x02)
+ F |= YF;
+ if ((A + TDAT8) & 0x08)
+ F |= XF;
+ HL--;
+ DE--;
+ BC--;
+ if (BC)
+ F |= VF;
+}
+
+macro cpd
+{
+ @rm HL
+ 5 * @nomreq_addr HL
+ u8 res = A - TDAT8;
+ WZ--;
+ HL--;
+ BC--;
+ set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF);
+ if (F & HF)
+ res -= 1;
+ if (res & 0x02)
+ F |= YF;
+ if (res & 0x08)
+ F |= XF;
+ if (BC)
+ F |= VF;
+}
+
+macro r800:cpd
+{
+ @rm HL
+ @nomreq_addr HL
+ u8 res = A - TDAT8;
+ WZ--;
+ HL--;
+ BC--;
+ set_f((F & CF) | (SZ[res]&~(YF|XF)) | ((A^TDAT8^res)&HF) | NF);
+ if (F & HF)
+ res -= 1;
+ if (res & 0x02)
+ F |= YF;
+ if (res & 0x08)
+ F |= XF;
+ if (BC)
+ F |= VF;
+}
+
+macro ind
+{
+ @nomreq_ir 1
+ @in BC
+ WZ = BC - 1;
+ B--;
+ @wm HL
+ HL--;
+ set_f(SZ[B]);
+ unsigned t = ((unsigned)(C - 1) & 0xff) + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro r800:ind
+{
+ @in BC
+ WZ = BC - 1;
+ B--;
+ @wm HL
+ HL--;
+ set_f(SZ[B]);
+ unsigned t = ((unsigned)(C - 1) & 0xff) + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro outd
+{
+ @nomreq_ir 1
+ @rm HL
+ B--;
+ WZ = BC - 1;
+ @out BC
+ HL--;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)L + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro r800:outd
+{
+ @rm HL
+ B--;
+ WZ = BC - 1;
+ @out BC
+ HL--;
+ set_f(SZ[B]);
+ unsigned t = (unsigned)L + (unsigned)TDAT8;
+ if (TDAT8 & SF)
+ F |= NF;
+ if (t & 0x100)
+ F |= HF | CF;
+ F |= SZP[(u8)(t & 0x07) ^ B] & PF;
+}
+
+macro ldir
+ @ldi
+ if (BC != 0) {
+ 5 * @nomreq_addr DE
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro r800:ldir
+ @ldi
+ if (BC != 0) {
+ @nomreq_addr DE
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro cpir
+ @cpi
+ if (BC != 0 && !(F & ZF)) {
+ 5 * @nomreq_addr HL
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro r800:cpir
+ @cpi
+ @nomreq_addr HL
+ if (BC != 0 && !(F & ZF)) {
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro inir
+ @ini
+ if (B != 0) {
+ 5 * @nomreq_addr HL
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro r800:inir
+ if (B == 1) {
+ + 1
+ ;
+ }
+ @ini
+ if (B != 0) {
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro otir
+ @outi
+ if (B != 0) {
+ 5 * @nomreq_addr BC
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro r800:otir
+ if (B == 1) {
+ + 1
+ ;
+ }
+ @outi
+ if (B != 0) {
+ 5 * @nomreq_addr BC
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro lddr
+ @ldd
+ if (BC != 0) {
+ 5 * @nomreq_addr DE
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro r800:lddr
+ @ldd
+ if (BC != 0) {
+ @nomreq_addr DE
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro cpdr
+ @cpd
+ if (BC != 0 && !(F & ZF)) {
+ 5 * @nomreq_addr HL
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro r800:cpdr
+ @cpd
+ @nomreq_addr HL /* suspected wrong. must be inside if? */
+ if (BC != 0 && !(F & ZF)) {
+ PC -= 2;
+ WZ = PC + 1;
+ F &= ~(YF | XF);
+ F |= (PC >> 8) & (YF | XF);
+ }
+
+macro indr
+ @ind
+ if (B != 0) {
+ 5 * @nomreq_addr HL
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro r800:indr
+ if (B == 1) {
+ + 1
+ ;
+ }
+ @ind
+ if (B != 0) {
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro otdr
+ @outd
+ if (B != 0) {
+ 5 * @nomreq_addr BC
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro r800:otdr
+ if (B == 1) {
+ + 1
+ ;
+ }
+ @outd
+ if (B != 0) {
+ PC -= 2;
+ block_io_interrupted_flags();
+ }
+
+macro jump %po
+ m_ref = 0x%po00;
+ goto process;
+
+macro jump_prefixed %prefix
+ m_ref = (%prefix << 16) | (TDAT8 << 8);
+ goto process;
+
+macro take_nmi
+ // Check if processor was halted
+ leave_halt();
+ if (HAS_LDAIR_QUIRK)
+ // reset parity flag after LD A,I or LD A,R
+ if (get_service_attention<SA_AFTER_LDAIR>()) F &= ~PF;
+ m_iff1 = 0;
+ m_r++;
+ + 5
+ @wm16_sp PC
+ PC = 0x0066;
+ WZ = PC;
+ set_service_attention<SA_NMI_PENDING, 0>();
+
+macro irqfetch
+{
+ // fetch the IRQ vector
+ device_z80daisy_interface *intf = daisy_get_irq_device();
+ m_tmp_irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w);
+ LOGMASKED(LOG_INT, "single INT m_tmp_irq_vector $%02x\n", m_tmp_irq_vector);
+}
+
+macro t6a84:irqfetch
+{
+ // fetch the IRQ vector
+ paged_irqfetch();
+ device_z80daisy_interface *intf = daisy_get_irq_device();
+ m_tmp_irq_vector = (intf != nullptr) ? intf->z80daisy_irq_ack() : standard_irq_callback(0, m_pc.w);
+ LOGMASKED(LOG_INT, "single INT m_tmp_irq_vector $%02x\n", m_tmp_irq_vector);
+}
+
+macro take_interrupt
+ // check if processor was halted
+ leave_halt();
+ // clear both interrupt flip flops
+ m_iff1 = m_iff2 = 0;
+ // say hi
+ // Not precise in all cases. z80 must finish current instruction (NOP) to reach this state - in such case frame timings are shifter from cb event if calculated based on it.
+ m_irqack_cb(1);
+ m_r++;
+ @irqfetch
+ // 'interrupt latency' cycles
+ + 2
+ // Interrupt mode 2. Call [i:databyte]
+ if (m_im == 2) {
+ // Zilog's datasheet claims that "the least-significant bit must be a zero."
+ // However, experiments have confirmed that IM 2 vectors do not have to be
+ // even, and all 8 bits will be used; even $FF is handled normally.
+ // CALL opcode timing
+ + 5
+ @wm16_sp PC
+ m_tmp_irq_vector = (m_tmp_irq_vector & 0xff) | (m_i << 8);
+ @rm16 m_tmp_irq_vector
+ PC = TDAT;
+ LOGMASKED(LOG_INT, "IM2 [$%04x] = $%04x\n", m_tmp_irq_vector, PC);
+ } else if (m_im == 1) {
+ // Interrupt mode 1. RST 38h
+ LOGMASKED(LOG_INT, "'%s' IM1 $0038\n", tag());
+ // RST $38
+ + 5
+ @wm16_sp PC
+ PC = 0x0038;
+ } else {
+ /* Interrupt mode 0. We check for CALL and JP instructions,
+ if neither of these were found we assume a 1 byte opcode
+ was placed on the databus */
+ LOGMASKED(LOG_INT, "IM0 $%04x\n", m_tmp_irq_vector);
+
+ // check for nop
+ if (m_tmp_irq_vector != 0x00) {
+ if ((m_tmp_irq_vector & 0xff0000) == 0xcd0000) {
+ // CALL $xxxx cycles
+ + 11
+ @wm16_sp PC
+ PC = m_tmp_irq_vector & 0xffff;
+ } else if ((m_tmp_irq_vector & 0xff0000) == 0xc30000) {
+ // JP $xxxx cycles
+ + 10
+ PC = m_tmp_irq_vector & 0xffff;
+ } else if ((m_tmp_irq_vector & 0xc7) == 0xc7) {
+ // RST $xx cycles
+ + 5
+ @wm16_sp PC
+ PC = m_tmp_irq_vector & 0x0038;
+ } else if (m_tmp_irq_vector == 0xfb) {
+ // EI cycles
+ + 4
+ ei();
+ } else {
+ logerror("take_interrupt: unexpected opcode in im0 mode: 0x%02x\n", m_tmp_irq_vector);
+ }
+ }
+ }
+ WZ = PC;
+ if (HAS_LDAIR_QUIRK)
+ // reset parity flag after LD A,I or LD A,R
+ if (get_service_attention<SA_AFTER_LDAIR>()) F &= ~PF;
+
+macro check_interrupts
+ if (get_service_attention<SA_NMI_PENDING>()) {
+ @take_nmi
+ } else if (m_irq_state != CLEAR_LINE && m_iff1 && !get_service_attention<SA_AFTER_EI>()) { // SA_IRQ_ON
+ @take_interrupt
+ }
+
+macro z80n:check_interrupts
+ if (get_service_attention<SA_NMI_PENDING>()) {
+ if (m_stackless) {
+ // on take_nmi
+ m_out_nextreg_cb(0xc2, m_pc.b.l);
+ m_out_nextreg_cb(0xc3, m_pc.b.h);
+ }
+ @take_nmi
+ } else if (m_irq_state != CLEAR_LINE && m_iff1 && !get_service_attention<SA_AFTER_EI>()) {
+ @take_interrupt
+ }
+
+macro nsc800_take_interrupt
+ // Check if processor was halted
+ leave_halt();
+ // Clear both interrupt flip flops
+ m_iff1 = m_iff2 = 0;
+ // 'interrupt latency' cycles
+ + 7
+ if (m_nsc800_irq_state[0]) {
+ @wm16_sp PC
+ PC = 0x003c;
+ } else if (m_nsc800_irq_state[1]) {
+ @wm16_sp PC
+ PC = 0x0034;
+ } else if (m_nsc800_irq_state[2]) {
+ @wm16_sp PC
+ PC = 0x002c;
+ } else {
+ + 2 * m_memrq_cycles
+ ;
+ }
+ WZ = PC;
+ if (HAS_LDAIR_QUIRK)
+ // reset parity flag after LD A,I or LD A,R
+ if (get_service_attention<SA_AFTER_LDAIR>()) F &= ~PF;
+
+macro nsc800:check_interrupts
+ if (get_service_attention<SA_NMI_PENDING>()) {
+ @take_nmi
+ } else if (get_service_attention<SA_NSC800_IRQ_ON>() && m_iff1 && !get_service_attention<SA_AFTER_EI>()) {
+ @nsc800_take_interrupt
+ } else if (m_irq_state != CLEAR_LINE && m_iff1 && !get_service_attention<SA_AFTER_EI>()) { // SA_IRQ_ON
+ @take_interrupt
+ }
+
+
+##########################################################
+# ROP
+##########################################################
+ffff
+ if (m_icount <= 0) {
+ m_ref = 0xffff00;
+ return;
+ }
+ if (m_service_attention) {
+ if (m_busrq_state) { // SA_BUSRQ
+ if (!m_busack_state) {
+ m_busack_state = 1;
+ set_service_attention<SA_BUSACK, 1>();
+ m_busack_cb(1);
+ }
+ if (m_icount > 0)
+ m_icount = 0;
+ m_ref = 0xffff00;
+ return;
+ } else if (m_busack_state) { // SA_BUSACK
+ m_busack_state = 0;
+ set_service_attention<SA_BUSACK, 0>();
+ m_busack_cb(0);
+ }
+ @check_interrupts
+ set_service_attention<SA_AFTER_EI, 0>();
+ if (HAS_LDAIR_QUIRK)
+ set_service_attention<SA_AFTER_LDAIR, 0>();
+ if (m_halt) { // SA_HALT
+ debugger_wait_hook();
+ @rop
+ PC--;
+ continue;
+ }
+ }
+ PRVPC = PC;
+ debugger_instruction_hook(PC);
+ @rop
+ m_ref = (0x00 << 16) | (TDAT8 << 8);
+ goto process;
+
+
+##########################################################
+# opcodes with CB prefix
+# rotate, shift and bit operations
+##########################################################
+cb00 # RLC B
+ B = rlc(B);
+
+cb01 # RLC C
+ C = rlc(C);
+
+cb02 # RLC D
+ D = rlc(D);
+
+cb03 # RLC E
+ E = rlc(E);
+
+cb04 # RLC H
+ H = rlc(H);
+
+cb05 # RLC L
+ L = rlc(L);
+
+cb06 # RLC (HL)
+ @rm_reg HL
+ TDAT8 = rlc(TDAT8);
+ @wm HL
+
+cb07 # RLC A
+ A = rlc(A);
+
+cb08 # RRC B
+ B = rrc(B);
+
+cb09 # RRC C
+ C = rrc(C);
+
+cb0a # RRC D
+ D = rrc(D);
+
+cb0b # RRC E
+ E = rrc(E);
+
+cb0c # RRC H
+ H = rrc(H);
+
+cb0d # RRC L
+ L = rrc(L);
+
+cb0e # RRC (HL)
+ @rm_reg HL
+ TDAT8 = rrc(TDAT8);
+ @wm HL
+
+cb0f # RRC A
+ A = rrc(A);
+
+cb10 # RL B
+ B = rl(B);
+
+cb11 # RL C
+ C = rl(C);
+
+cb12 # RL D
+ D = rl(D);
+
+cb13 # RL E
+ E = rl(E);
+
+cb14 # RL H
+ H = rl(H);
+
+cb15 # RL L
+ L = rl(L);
+
+cb16 # RL (HL)
+ @rm_reg HL
+ TDAT8 = rl(TDAT8);
+ @wm HL
+
+cb17 # RL A
+ A = rl(A);
+
+cb18 # RR B
+ B = rr(B);
+
+cb19 # RR C
+ C = rr(C);
+
+cb1a # RR D
+ D = rr(D);
+
+cb1b # RR E
+ E = rr(E);
+
+cb1c # RR H
+ H = rr(H);
+
+cb1d # RR L
+ L = rr(L);
+
+cb1e # RR (HL)
+ @rm_reg HL
+ TDAT8 = rr(TDAT8);
+ @wm HL
+
+cb1f # RR A
+ A = rr(A);
+
+cb20 # SLA B
+ B = sla(B);
+
+cb21 # SLA C
+ C = sla(C);
+
+cb22 # SLA D
+ D = sla(D);
+
+cb23 # SLA E
+ E = sla(E);
+
+cb24 # SLA H
+ H = sla(H);
+
+cb25 # SLA L
+ L = sla(L);
+
+cb26 # SLA (HL)
+ @rm_reg HL
+ TDAT8 = sla(TDAT8);
+ @wm HL
+
+cb27 # SLA A
+ A = sla(A);
+
+cb28 # SRA B
+ B = sra(B);
+
+cb29 # SRA C
+ C = sra(C);
+
+cb2a # SRA D
+ D = sra(D);
+
+cb2b # SRA E
+ E = sra(E);
+
+cb2c # SRA H
+ H = sra(H);
+
+cb2d # SRA L
+ L = sra(L);
+
+cb2e # SRA (HL)
+ @rm_reg HL
+ TDAT8 = sra(TDAT8);
+ @wm HL
+
+cb2f # SRA A
+ A = sra(A);
+
+cb30 # SLL B
+ B = sll(B);
+
+cb31 # SLL C
+ C = sll(C);
+
+cb32 # SLL D
+ D = sll(D);
+
+cb33 # SLL E
+ E = sll(E);
+
+cb34 # SLL H
+ H = sll(H);
+
+cb35 # SLL L
+ L = sll(L);
+
+cb36 # SLL (HL)
+ @rm_reg HL
+ TDAT8 = sll(TDAT8);
+ @wm HL
+
+cb37 # SLL A
+ A = sll(A);
+
+cb38 # SRL B
+ B = srl(B);
+
+cb39 # SRL C
+ C = srl(C);
+
+cb3a # SRL D
+ D = srl(D);
+
+cb3b # SRL E
+ E = srl(E);
+
+cb3c # SRL H
+ H = srl(H);
+
+cb3d # SRL L
+ L = srl(L);
+
+cb3e # SRL (HL)
+ @rm_reg HL
+ TDAT8 = srl(TDAT8);
+ @wm HL
+
+cb3f # SRL A
+ A = srl(A);
+
+cb40 # BIT 0,B
+ bit(0, B);
+
+cb41 # BIT 0,C
+ bit(0, C);
+
+cb42 # BIT 0,D
+ bit(0, D);
+
+cb43 # BIT 0,E
+ bit(0, E);
+
+cb44 # BIT 0,H
+ bit(0, H);
+
+cb45 # BIT 0,L
+ bit(0, L);
+
+cb46 # BIT 0,(HL)
+ @rm_reg HL
+ bit_hl(0, TDAT8);
+
+cb47 # BIT 0,A
+ bit(0, A);
+
+cb48 # BIT 1,B
+ bit(1, B);
+
+cb49 # BIT 1,C
+ bit(1, C);
+
+cb4a # BIT 1,D
+ bit(1, D);
+
+cb4b # BIT 1,E
+ bit(1, E);
+
+cb4c # BIT 1,H
+ bit(1, H);
+
+cb4d # BIT 1,L
+ bit(1, L);
+
+cb4e # BIT 1,(HL)
+ @rm_reg HL
+ bit_hl(1, TDAT8);
+
+cb4f # BIT 1,A
+ bit(1, A);
+
+cb50 # BIT 2,B
+ bit(2, B);
+
+cb51 # BIT 2,C
+ bit(2, C);
+
+cb52 # BIT 2,D
+ bit(2, D);
+
+cb53 # BIT 2,E
+ bit(2, E);
+
+cb54 # BIT 2,H
+ bit(2, H);
+
+cb55 # BIT 2,L
+ bit(2, L);
+
+cb56 # BIT 2,(HL)
+ @rm_reg HL
+ bit_hl(2, TDAT8);
+
+cb57 # BIT 2,A
+ bit(2, A);
+
+cb58 # BIT 3,B
+ bit(3, B);
+
+cb59 # BIT 3,C
+ bit(3, C);
+
+cb5a # BIT 3,D
+ bit(3, D);
+
+cb5b # BIT 3,E
+ bit(3, E);
+
+cb5c # BIT 3,H
+ bit(3, H);
+
+cb5d # BIT 3,L
+ bit(3, L);
+
+cb5e # BIT 3,(HL)
+ @rm_reg HL
+ bit_hl(3, TDAT8);
+
+cb5f # BIT 3,A
+ bit(3, A);
+
+cb60 # BIT 4,B
+ bit(4, B);
+
+cb61 # BIT 4,C
+ bit(4, C);
+
+cb62 # BIT 4,D
+ bit(4, D);
+
+cb63 # BIT 4,E
+ bit(4, E);
+
+cb64 # BIT 4,H
+ bit(4, H);
+
+cb65 # BIT 4,L
+ bit(4, L);
+
+cb66 # BIT 4,(HL)
+ @rm_reg HL
+ bit_hl(4, TDAT8);
+
+cb67 # BIT 4,A
+ bit(4, A);
+
+cb68 # BIT 5,B
+ bit(5, B);
+
+cb69 # BIT 5,C
+ bit(5, C);
+
+cb6a # BIT 5,D
+ bit(5, D);
+
+cb6b # BIT 5,E
+ bit(5, E);
+
+cb6c # BIT 5,H
+ bit(5, H);
+
+cb6d # BIT 5,L
+ bit(5, L);
+
+cb6e # BIT 5,(HL)
+ @rm_reg HL
+ bit_hl(5, TDAT8);
+
+cb6f # BIT 5,A
+ bit(5, A);
+
+cb70 # BIT 6,B
+ bit(6, B);
+
+cb71 # BIT 6,C
+ bit(6, C);
+
+cb72 # BIT 6,D
+ bit(6, D);
+
+cb73 # BIT 6,E
+ bit(6, E);
+
+cb74 # BIT 6,H
+ bit(6, H);
+
+cb75 # BIT 6,L
+ bit(6, L);
+
+cb76 # BIT 6,(HL)
+ @rm_reg HL
+ bit_hl(6, TDAT8);
+
+cb77 # BIT 6,A
+ bit(6, A);
+
+cb78 # BIT 7,B
+ bit(7, B);
+
+cb79 # BIT 7,C
+ bit(7, C);
+
+cb7a # BIT 7,D
+ bit(7, D);
+
+cb7b # BIT 7,E
+ bit(7, E);
+
+cb7c # BIT 7,H
+ bit(7, H);
+
+cb7d # BIT 7,L
+ bit(7, L);
+
+cb7e # BIT 7,(HL)
+ @rm_reg HL
+ bit_hl(7, TDAT8);
+
+cb7f # BIT 7,A
+ bit(7, A);
+
+cb80 # RES 0,B
+ B = res(0, B);
+
+cb81 # RES 0,C
+ C = res(0, C);
+
+cb82 # RES 0,D
+ D = res(0, D);
+
+cb83 # RES 0,E
+ E = res(0, E);
+
+cb84 # RES 0,H
+ H = res(0, H);
+
+cb85 # RES 0,L
+ L = res(0, L);
+
+cb86 # RES 0,(HL)
+ @rm_reg HL
+ TDAT8 = res(0, TDAT8);
+ @wm HL
+
+cb87 # RES 0,A
+ A = res(0, A);
+
+cb88 # RES 1,B
+ B = res(1, B);
+
+cb89 # RES 1,C
+ C = res(1, C);
+
+cb8a # RES 1,D
+ D = res(1, D);
+
+cb8b # RES 1,E
+ E = res(1, E);
+
+cb8c # RES 1,H
+ H = res(1, H);
+
+cb8d # RES 1,L
+ L = res(1, L);
+
+cb8e # RES 1,(HL)
+ @rm_reg HL
+ TDAT8 = res(1, TDAT8);
+ @wm HL
+
+cb8f # RES 1,A
+ A = res(1, A);
+
+cb90 # RES 2,B
+ B = res(2, B);
+
+cb91 # RES 2,C
+ C = res(2, C);
+
+cb92 # RES 2,D
+ D = res(2, D);
+
+cb93 # RES 2,E
+ E = res(2, E);
+
+cb94 # RES 2,H
+ H = res(2, H);
+
+cb95 # RES 2,L
+ L = res(2, L);
+
+cb96 # RES 2,(HL)
+ @rm_reg HL
+ TDAT8 = res(2, TDAT8);
+ @wm HL
+
+cb97 # RES 2,A
+ A = res(2, A);
+
+cb98 # RES 3,B
+ B = res(3, B);
+
+cb99 # RES 3,C
+ C = res(3, C);
+
+cb9a # RES 3,D
+ D = res(3, D);
+
+cb9b # RES 3,E
+ E = res(3, E);
+
+cb9c # RES 3,H
+ H = res(3, H);
+
+cb9d # RES 3,L
+ L = res(3, L);
+
+cb9e # RES 3,(HL)
+ @rm_reg HL
+ TDAT8 = res(3, TDAT8);
+ @wm HL
+
+cb9f # RES 3,A
+ A = res(3, A);
+
+cba0 # RES 4,B
+ B = res(4, B);
+
+cba1 # RES 4,C
+ C = res(4, C);
+
+cba2 # RES 4,D
+ D = res(4, D);
+
+cba3 # RES 4,E
+ E = res(4, E);
+
+cba4 # RES 4,H
+ H = res(4, H);
+
+cba5 # RES 4,L
+ L = res(4, L);
+
+cba6 # RES 4,(HL)
+ @rm_reg HL
+ TDAT8 = res(4, TDAT8);
+ @wm HL
+
+cba7 # RES 4,A
+ A = res(4, A);
+
+cba8 # RES 5,B
+ B = res(5, B);
+
+cba9 # RES 5,C
+ C = res(5, C);
+
+cbaa # RES 5,D
+ D = res(5, D);
+
+cbab # RES 5,E
+ E = res(5, E);
+
+cbac # RES 5,H
+ H = res(5, H);
+
+cbad # RES 5,L
+ L = res(5, L);
+
+cbae # RES 5,(HL)
+ @rm_reg HL
+ TDAT8 = res(5, TDAT8);
+ @wm HL
+
+cbaf # RES 5,A
+ A = res(5, A);
+
+cbb0 # RES 6,B
+ B = res(6, B);
+
+cbb1 # RES 6,C
+ C = res(6, C);
+
+cbb2 # RES 6,D
+ D = res(6, D);
+
+cbb3 # RES 6,E
+ E = res(6, E);
+
+cbb4 # RES 6,H
+ H = res(6, H);
+
+cbb5 # RES 6,L
+ L = res(6, L);
+
+cbb6 # RES 6,(HL)
+ @rm_reg HL
+ TDAT8 = res(6, TDAT8);
+ @wm HL
+
+cbb7 # RES 6,A
+ A = res(6, A);
+
+cbb8 # RES 7,B
+ B = res(7, B);
+
+cbb9 # RES 7,C
+ C = res(7, C);
+
+cbba # RES 7,D
+ D = res(7, D);
+
+cbbb # RES 7,E
+ E = res(7, E);
+
+cbbc # RES 7,H
+ H = res(7, H);
+
+cbbd # RES 7,L
+ L = res(7, L);
+
+cbbe # RES 7,(HL)
+ @rm_reg HL
+ TDAT8 = res(7, TDAT8);
+ @wm HL
+
+cbbf # RES 7,A
+ A = res(7, A);
+
+cbc0 # SET 0,B
+ B = set(0, B);
+
+cbc1 # SET 0,C
+ C = set(0, C);
+
+cbc2 # SET 0,D
+ D = set(0, D);
+
+cbc3 # SET 0,E
+ E = set(0, E);
+
+cbc4 # SET 0,H
+ H = set(0, H);
+
+cbc5 # SET 0,L
+ L = set(0, L);
+
+cbc6 # SET 0,(HL)
+ @rm_reg HL
+ TDAT8 = set(0, TDAT8);
+ @wm HL
+
+cbc7 # SET 0,A
+ A = set(0, A);
+
+cbc8 # SET 1,B
+ B = set(1, B);
+
+cbc9 # SET 1,C
+ C = set(1, C);
+
+cbca # SET 1,D
+ D = set(1, D);
+
+cbcb # SET 1,E
+ E = set(1, E);
+
+cbcc # SET 1,H
+ H = set(1, H);
+
+cbcd # SET 1,L
+ L = set(1, L);
+
+cbce # SET 1,(HL)
+ @rm_reg HL
+ TDAT8 = set(1, TDAT8);
+ @wm HL
+
+cbcf # SET 1,A
+ A = set(1, A);
+
+cbd0 # SET 2,B
+ B = set(2, B);
+
+cbd1 # SET 2,C
+ C = set(2, C);
+
+cbd2 # SET 2,D
+ D = set(2, D);
+
+cbd3 # SET 2,E
+ E = set(2, E);
+
+cbd4 # SET 2,H
+ H = set(2, H);
+
+cbd5 # SET 2,L
+ L = set(2, L);
+
+cbd6 # SET 2,(HL)
+ @rm_reg HL
+ TDAT8 = set(2, TDAT8);
+ @wm HL
+
+cbd7 # SET 2,A
+ A = set(2, A);
+
+cbd8 # SET 3,B
+ B = set(3, B);
+
+cbd9 # SET 3,C
+ C = set(3, C);
+
+cbda # SET 3,D
+ D = set(3, D);
+
+cbdb # SET 3,E
+ E = set(3, E);
+
+cbdc # SET 3,H
+ H = set(3, H);
+
+cbdd # SET 3,L
+ L = set(3, L);
+
+cbde # SET 3,(HL)
+ @rm_reg HL
+ TDAT8 = set(3, TDAT8);
+ @wm HL
+
+cbdf # SET 3,A
+ A = set(3, A);
+
+cbe0 # SET 4,B
+ B = set(4, B);
+
+cbe1 # SET 4,C
+ C = set(4, C);
+
+cbe2 # SET 4,D
+ D = set(4, D);
+
+cbe3 # SET 4,E
+ E = set(4, E);
+
+cbe4 # SET 4,H
+ H = set(4, H);
+
+cbe5 # SET 4,L
+ L = set(4, L);
+
+cbe6 # SET 4,(HL)
+ @rm_reg HL
+ TDAT8 = set(4, TDAT8);
+ @wm HL
+
+cbe7 # SET 4,A
+ A = set(4, A);
+
+cbe8 # SET 5,B
+ B = set(5, B);
+
+cbe9 # SET 5,C
+ C = set(5, C);
+
+cbea # SET 5,D
+ D = set(5, D);
+
+cbeb # SET 5,E
+ E = set(5, E);
+
+cbec # SET 5,H
+ H = set(5, H);
+
+cbed # SET 5,L
+ L = set(5, L);
+
+cbee # SET 5,(HL)
+ @rm_reg HL
+ TDAT8 = set(5, TDAT8);
+ @wm HL
+
+cbef # SET 5,A
+ A = set(5, A);
+
+cbf0 # SET 6,B
+ B = set(6, B);
+
+cbf1 # SET 6,C
+ C = set(6, C);
+
+cbf2 # SET 6,D
+ D = set(6, D);
+
+cbf3 # SET 6,E
+ E = set(6, E);
+
+cbf4 # SET 6,H
+ H = set(6, H);
+
+cbf5 # SET 6,L
+ L = set(6, L);
+
+cbf6 # SET 6,(HL)
+ @rm_reg HL
+ TDAT8 = set(6, TDAT8);
+ @wm HL
+
+cbf7 # SET 6,A
+ A = set(6, A);
+
+cbf8 # SET 7,B
+ B = set(7, B);
+
+cbf9 # SET 7,C
+ C = set(7, C);
+
+cbfa # SET 7,D
+ D = set(7, D);
+
+cbfb # SET 7,E
+ E = set(7, E);
+
+cbfc # SET 7,H
+ H = set(7, H);
+
+cbfd # SET 7,L
+ L = set(7, L);
+
+cbfe # SET 7,(HL)
+ @rm_reg HL
+ TDAT8 = set(7, TDAT8);
+ @wm HL
+
+cbff # SET 7,A
+ A = set(7, A);
+
+
+##########################################################
+# opcodes with DD/FD CB prefix
+# rotate, shift and bit operations with (IX+o)
+##########################################################
+fe00 # RLC B = (XY+o)
+ @rm_reg m_ea
+ B = rlc(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe01 # RLC C = (XY+o)
+ @rm_reg m_ea
+ C = rlc(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe02 # RLC D = (XY+o)
+ @rm_reg m_ea
+ D = rlc(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe03 # RLC E = (XY+o)
+ @rm_reg m_ea
+ E = rlc(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe04 # RLC H = (XY+o)
+ @rm_reg m_ea
+ H = rlc(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe05 # RLC L = (XY+o)
+ @rm_reg m_ea
+ L = rlc(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe06 # RLC (XY+o)
+ @rm_reg m_ea
+ TDAT8 = rlc(TDAT8);
+ @wm m_ea
+
+fe07 # RLC A = (XY+o)
+ @rm_reg m_ea
+ A = rlc(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe08 # RRC B = (XY+o)
+ @rm_reg m_ea
+ B = rrc(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe09 # RRC C = (XY+o)
+ @rm_reg m_ea
+ C = rrc(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe0a # RRC D = (XY+o)
+ @rm_reg m_ea
+ D = rrc(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe0b # RRC E = (XY+o)
+ @rm_reg m_ea
+ E = rrc(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe0c # RRC H = (XY+o)
+ @rm_reg m_ea
+ H = rrc(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe0d # RRC L = (XY+o)
+ @rm_reg m_ea
+ L = rrc(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe0e # RRC (XY+o)
+ @rm_reg m_ea
+ TDAT8 = rrc(TDAT8);
+ @wm m_ea
+
+fe0f # RRC A = (XY+o)
+ @rm_reg m_ea
+ A = rrc(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe10 # RL B = (XY+o)
+ @rm_reg m_ea
+ B = rl(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe11 # RL C = (XY+o)
+ @rm_reg m_ea
+ C = rl(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe12 # RL D = (XY+o)
+ @rm_reg m_ea
+ D = rl(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe13 # RL E = (XY+o)
+ @rm_reg m_ea
+ E = rl(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe14 # RL H = (XY+o)
+ @rm_reg m_ea
+ H = rl(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe15 # RL L = (XY+o)
+ @rm_reg m_ea
+ L = rl(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe16 # RL (XY+o)
+ @rm_reg m_ea
+ TDAT8 = rl(TDAT8);
+ @wm m_ea
+
+fe17 # RL A = (XY+o)
+ @rm_reg m_ea
+ A = rl(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe18 # RR B = (XY+o)
+ @rm_reg m_ea
+ B = rr(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe19 # RR C = (XY+o)
+ @rm_reg m_ea
+ C = rr(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe1a # RR D = (XY+o)
+ @rm_reg m_ea
+ D = rr(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe1b # RR E = (XY+o)
+ @rm_reg m_ea
+ E = rr(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe1c # RR H = (XY+o)
+ @rm_reg m_ea
+ H = rr(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe1d # RR L = (XY+o)
+ @rm_reg m_ea
+ L = rr(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe1e # RR (XY+o)
+ @rm_reg m_ea
+ TDAT8 = rr(TDAT8);
+ @wm m_ea
+
+fe1f # RR A = (XY+o)
+ @rm_reg m_ea
+ A = rr(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe20 # SLA B = (XY+o)
+ @rm_reg m_ea
+ B = sla(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe21 # SLA C = (XY+o)
+ @rm_reg m_ea
+ C = sla(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe22 # SLA D = (XY+o)
+ @rm_reg m_ea
+ D = sla(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe23 # SLA E = (XY+o)
+ @rm_reg m_ea
+ E = sla(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe24 # SLA H = (XY+o)
+ @rm_reg m_ea
+ H = sla(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe25 # SLA L = (XY+o)
+ @rm_reg m_ea
+ L = sla(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe26 # SLA (XY+o)
+ @rm_reg m_ea
+ TDAT8 = sla(TDAT8);
+ @wm m_ea
+
+fe27 # SLA A = (XY+o)
+ @rm_reg m_ea
+ A = sla(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe28 # SRA B = (XY+o)
+ @rm_reg m_ea
+ B = sra(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe29 # SRA C = (XY+o)
+ @rm_reg m_ea
+ C = sra(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe2a # SRA D = (XY+o)
+ @rm_reg m_ea
+ D = sra(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe2b # SRA E = (XY+o)
+ @rm_reg m_ea
+ E = sra(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe2c # SRA H = (XY+o)
+ @rm_reg m_ea
+ H = sra(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe2d # SRA L = (XY+o)
+ @rm_reg m_ea
+ L = sra(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe2e # SRA (XY+o)
+ @rm_reg m_ea
+ TDAT8 = sra(TDAT8);
+ @wm m_ea
+
+fe2f # SRA A = (XY+o)
+ @rm_reg m_ea
+ A = sra(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe30 # SLL B = (XY+o)
+ @rm_reg m_ea
+ B = sll(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe31 # SLL C = (XY+o)
+ @rm_reg m_ea
+ C = sll(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe32 # SLL D = (XY+o)
+ @rm_reg m_ea
+ D = sll(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe33 # SLL E = (XY+o)
+ @rm_reg m_ea
+ E = sll(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe34 # SLL H = (XY+o)
+ @rm_reg m_ea
+ H = sll(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe35 # SLL L = (XY+o)
+ @rm_reg m_ea
+ L = sll(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe36 # SLL (XY+o)
+ @rm_reg m_ea
+ TDAT8 = sll(TDAT8);
+ @wm m_ea
+
+fe37 # SLL A = (XY+o)
+ @rm_reg m_ea
+ A = sll(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe38 # SRL B = (XY+o)
+ @rm_reg m_ea
+ B = srl(TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe39 # SRL C = (XY+o)
+ @rm_reg m_ea
+ C = srl(TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe3a # SRL D = (XY+o)
+ @rm_reg m_ea
+ D = srl(TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe3b # SRL E = (XY+o)
+ @rm_reg m_ea
+ E = srl(TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe3c # SRL H = (XY+o)
+ @rm_reg m_ea
+ H = srl(TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe3d # SRL L = (XY+o)
+ @rm_reg m_ea
+ L = srl(TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe3e # SRL (XY+o)
+ @rm_reg m_ea
+ TDAT8 = srl(TDAT8);
+ @wm m_ea
+
+fe3f # SRL A = (XY+o)
+ @rm_reg m_ea
+ A = srl(TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe40 # BIT 0,(XY+o)
+ @jump fe46
+
+fe41 # BIT 0,(XY+o)
+ @jump fe46
+
+fe42 # BIT 0,(XY+o)
+ @jump fe46
+
+fe43 # BIT 0,(XY+o)
+ @jump fe46
+
+fe44 # BIT 0,(XY+o)
+ @jump fe46
+
+fe45 # BIT 0,(XY+o)
+ @jump fe46
+
+fe46 # BIT 0,(XY+o)
+ @rm_reg m_ea
+ bit_xy(0, TDAT8);
+
+fe47 # BIT 0,(XY+o)
+ @jump fe46
+
+fe48 # BIT 1,(XY+o)
+ @jump fe4e
+
+fe49 # BIT 1,(XY+o)
+ @jump fe4e
+
+fe4a # BIT 1,(XY+o)
+ @jump fe4e
+
+fe4b # BIT 1,(XY+o)
+ @jump fe4e
+
+fe4c # BIT 1,(XY+o)
+ @jump fe4e
+
+fe4d # BIT 1,(XY+o)
+ @jump fe4e
+
+fe4e # BIT 1,(XY+o)
+ @rm_reg m_ea
+ bit_xy(1, TDAT8);
+
+fe4f # BIT 1,(XY+o)
+ @jump fe4e
+
+fe50 # BIT 2,(XY+o)
+ @jump fe56
+
+fe51 # BIT 2,(XY+o)
+ @jump fe56
+
+fe52 # BIT 2,(XY+o)
+ @jump fe56
+
+fe53 # BIT 2,(XY+o)
+ @jump fe56
+
+fe54 # BIT 2,(XY+o)
+ @jump fe56
+
+fe55 # BIT 2,(XY+o)
+ @jump fe56
+
+fe56 # BIT 2,(XY+o)
+ @rm_reg m_ea
+ bit_xy(2, TDAT8);
+
+fe57 # BIT 2,(XY+o)
+ @jump fe56
+
+fe58 # BIT 3,(XY+o)
+ @jump fe5e
+
+fe59 # BIT 3,(XY+o)
+ @jump fe5e
+
+fe5a # BIT 3,(XY+o)
+ @jump fe5e
+
+fe5b # BIT 3,(XY+o)
+ @jump fe5e
+
+fe5c # BIT 3,(XY+o)
+ @jump fe5e
+
+fe5d # BIT 3,(XY+o)
+ @jump fe5e
+
+fe5e # BIT 3,(XY+o)
+ @rm_reg m_ea
+ bit_xy(3, TDAT8);
+
+fe5f # BIT 3,(XY+o)
+ @jump fe5e
+
+fe60 # BIT 4,(XY+o)
+ @jump fe66
+
+fe61 # BIT 4,(XY+o)
+ @jump fe66
+
+fe62 # BIT 4,(XY+o)
+ @jump fe66
+
+fe63 # BIT 4,(XY+o)
+ @jump fe66
+
+fe64 # BIT 4,(XY+o)
+ @jump fe66
+
+fe65 # BIT 4,(XY+o)
+ @jump fe66
+
+fe66 # BIT 4,(XY+o)
+ @rm_reg m_ea
+ bit_xy(4, TDAT8);
+
+fe67 # BIT 4,(XY+o)
+ @jump fe66
+
+fe68 # BIT 5,(XY+o)
+ @jump fe6e
+
+fe69 # BIT 5,(XY+o)
+ @jump fe6e
+
+fe6a # BIT 5,(XY+o)
+ @jump fe6e
+
+fe6b # BIT 5,(XY+o)
+ @jump fe6e
+
+fe6c # BIT 5,(XY+o)
+ @jump fe6e
+
+fe6d # BIT 5,(XY+o)
+ @jump fe6e
+
+fe6e # BIT 5,(XY+o)
+ @rm_reg m_ea
+ bit_xy(5, TDAT8);
+
+fe6f # BIT 5,(XY+o)
+ @jump fe6e
+
+fe70 # BIT 6,(XY+o)
+ @jump fe76
+
+fe71 # BIT 6,(XY+o)
+ @jump fe76
+
+fe72 # BIT 6,(XY+o)
+ @jump fe76
+
+fe73 # BIT 6,(XY+o)
+ @jump fe76
+
+fe74 # BIT 6,(XY+o)
+ @jump fe76
+
+fe75 # BIT 6,(XY+o)
+ @jump fe76
+
+fe76 # BIT 6,(XY+o)
+ @rm_reg m_ea
+ bit_xy(6, TDAT8);
+
+fe77 # BIT 6,(XY+o)
+ @jump fe76
+
+fe78 # BIT 7,(XY+o)
+ @jump fe7e
+
+fe79 # BIT 7,(XY+o)
+ @jump fe7e
+
+fe7a # BIT 7,(XY+o)
+ @jump fe7e
+
+fe7b # BIT 7,(XY+o)
+ @jump fe7e
+
+fe7c # BIT 7,(XY+o)
+ @jump fe7e
+
+fe7d # BIT 7,(XY+o)
+ @jump fe7e
+
+fe7e # BIT 7,(XY+o)
+ @rm_reg m_ea
+ bit_xy(7, TDAT8);
+
+fe7f # BIT 7,(XY+o)
+ @jump fe7e
+
+fe80 # RES 0,B = (XY+o)
+ @rm_reg m_ea
+ B = res(0, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe81 # RES 0,C = (XY+o)
+ @rm_reg m_ea
+ C = res(0, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe82 # RES 0,D = (XY+o)
+ @rm_reg m_ea
+ D = res(0, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe83 # RES 0,E = (XY+o)
+ @rm_reg m_ea
+ E = res(0, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe84 # RES 0,H = (XY+o)
+ @rm_reg m_ea
+ H = res(0, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe85 # RES 0,L = (XY+o)
+ @rm_reg m_ea
+ L = res(0, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe86 # RES 0,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(0, TDAT8);
+ @wm m_ea
+
+fe87 # RES 0,A = (XY+o)
+ @rm_reg m_ea
+ A = res(0, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe88 # RES 1,B = (XY+o)
+ @rm_reg m_ea
+ B = res(1, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe89 # RES 1,C = (XY+o)
+ @rm_reg m_ea
+ C = res(1, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe8a # RES 1,D = (XY+o)
+ @rm_reg m_ea
+ D = res(1, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe8b # RES 1,E = (XY+o)
+ @rm_reg m_ea
+ E = res(1, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe8c # RES 1,H = (XY+o)
+ @rm_reg m_ea
+ H = res(1, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe8d # RES 1,L = (XY+o)
+ @rm_reg m_ea
+ L = res(1, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe8e # RES 1,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(1, TDAT8);
+ @wm m_ea
+
+fe8f # RES 1,A = (XY+o)
+ @rm_reg m_ea
+ A = res(1, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe90 # RES 2,B = (XY+o)
+ @rm_reg m_ea
+ B = res(2, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe91 # RES 2,C = (XY+o)
+ @rm_reg m_ea
+ C = res(2, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe92 # RES 2,D = (XY+o)
+ @rm_reg m_ea
+ D = res(2, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe93 # RES 2,E = (XY+o)
+ @rm_reg m_ea
+ E = res(2, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe94 # RES 2,H = (XY+o)
+ @rm_reg m_ea
+ H = res(2, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe95 # RES 2,L = (XY+o)
+ @rm_reg m_ea
+ L = res(2, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe96 # RES 2,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(2, TDAT8);
+ @wm m_ea
+
+fe97 # RES 2,A = (XY+o)
+ @rm_reg m_ea
+ A = res(2, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fe98 # RES 3,B = (XY+o)
+ @rm_reg m_ea
+ B = res(3, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fe99 # RES 3,C = (XY+o)
+ @rm_reg m_ea
+ C = res(3, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fe9a # RES 3,D = (XY+o)
+ @rm_reg m_ea
+ D = res(3, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fe9b # RES 3,E = (XY+o)
+ @rm_reg m_ea
+ E = res(3, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fe9c # RES 3,H = (XY+o)
+ @rm_reg m_ea
+ H = res(3, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fe9d # RES 3,L = (XY+o)
+ @rm_reg m_ea
+ L = res(3, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fe9e # RES 3,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(3, TDAT8);
+ @wm m_ea
+
+fe9f # RES 3,A = (XY+o)
+ @rm_reg m_ea
+ A = res(3, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fea0 # RES 4,B = (XY+o)
+ @rm_reg m_ea
+ B = res(4, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fea1 # RES 4,C = (XY+o)
+ @rm_reg m_ea
+ C = res(4, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fea2 # RES 4,D = (XY+o)
+ @rm_reg m_ea
+ D = res(4, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fea3 # RES 4,E = (XY+o)
+ @rm_reg m_ea
+ E = res(4, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fea4 # RES 4,H = (XY+o)
+ @rm_reg m_ea
+ H = res(4, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fea5 # RES 4,L = (XY+o)
+ @rm_reg m_ea
+ L = res(4, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fea6 # RES 4,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(4, TDAT8);
+ @wm m_ea
+
+fea7 # RES 4,A = (XY+o)
+ @rm_reg m_ea
+ A = res(4, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fea8 # RES 5,B = (XY+o)
+ @rm_reg m_ea
+ B = res(5, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fea9 # RES 5,C = (XY+o)
+ @rm_reg m_ea
+ C = res(5, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feaa # RES 5,D = (XY+o)
+ @rm_reg m_ea
+ D = res(5, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+feab # RES 5,E = (XY+o)
+ @rm_reg m_ea
+ E = res(5, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+feac # RES 5,H = (XY+o)
+ @rm_reg m_ea
+ H = res(5, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fead # RES 5,L = (XY+o)
+ @rm_reg m_ea
+ L = res(5, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+feae # RES 5,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(5, TDAT8);
+ @wm m_ea
+
+feaf # RES 5,A = (XY+o)
+ @rm_reg m_ea
+ A = res(5, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+feb0 # RES 6,B = (XY+o)
+ @rm_reg m_ea
+ B = res(6, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+feb1 # RES 6,C = (XY+o)
+ @rm_reg m_ea
+ C = res(6, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feb2 # RES 6,D = (XY+o)
+ @rm_reg m_ea
+ D = res(6, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+feb3 # RES 6,E = (XY+o)
+ @rm_reg m_ea
+ E = res(6, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+feb4 # RES 6,H = (XY+o)
+ @rm_reg m_ea
+ H = res(6, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+feb5 # RES 6,L = (XY+o)
+ @rm_reg m_ea
+ L = res(6, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+feb6 # RES 6,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(6, TDAT8);
+ @wm m_ea
+
+feb7 # RES 6,A = (XY+o)
+ @rm_reg m_ea
+ A = res(6, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+feb8 # RES 7,B = (XY+o)
+ @rm_reg m_ea
+ B = res(7, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+feb9 # RES 7,C = (XY+o)
+ @rm_reg m_ea
+ C = res(7, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feba # RES 7,D = (XY+o)
+ @rm_reg m_ea
+ D = res(7, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+febb # RES 7,E = (XY+o)
+ @rm_reg m_ea
+ E = res(7, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+febc # RES 7,H = (XY+o)
+ @rm_reg m_ea
+ H = res(7, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+febd # RES 7,L = (XY+o)
+ @rm_reg m_ea
+ L = res(7, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+febe # RES 7,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = res(7, TDAT8);
+ @wm m_ea
+
+febf # RES 7,A = (XY+o)
+ @rm_reg m_ea
+ A = res(7, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fec0 # SET 0,B = (XY+o)
+ @rm_reg m_ea
+ B = set(0, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fec1 # SET 0,C = (XY+o)
+ @rm_reg m_ea
+ C = set(0, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fec2 # SET 0,D = (XY+o)
+ @rm_reg m_ea
+ D = set(0, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fec3 # SET 0,E = (XY+o)
+ @rm_reg m_ea
+ E = set(0, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fec4 # SET 0,H = (XY+o)
+ @rm_reg m_ea
+ H = set(0, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fec5 # SET 0,L = (XY+o)
+ @rm_reg m_ea
+ L = set(0, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fec6 # SET 0,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(0, TDAT8);
+ @wm m_ea
+
+fec7 # SET 0,A = (XY+o)
+ @rm_reg m_ea
+ A = set(0, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fec8 # SET 1,B = (XY+o)
+ @rm_reg m_ea
+ B = set(1, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fec9 # SET 1,C = (XY+o)
+ @rm_reg m_ea
+ C = set(1, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feca # SET 1,D = (XY+o)
+ @rm_reg m_ea
+ D = set(1, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fecb # SET 1,E = (XY+o)
+ @rm_reg m_ea
+ E = set(1, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fecc # SET 1,H = (XY+o)
+ @rm_reg m_ea
+ H = set(1, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fecd # SET 1,L = (XY+o)
+ @rm_reg m_ea
+ L = set(1, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fece # SET 1,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(1, TDAT8);
+ @wm m_ea
+
+fecf # SET 1,A = (XY+o)
+ @rm_reg m_ea
+ A = set(1, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fed0 # SET 2,B = (XY+o)
+ @rm_reg m_ea
+ B = set(2, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fed1 # SET 2,C = (XY+o)
+ @rm_reg m_ea
+ C = set(2, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fed2 # SET 2,D = (XY+o)
+ @rm_reg m_ea
+ D = set(2, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fed3 # SET 2,E = (XY+o)
+ @rm_reg m_ea
+ E = set(2, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fed4 # SET 2,H = (XY+o)
+ @rm_reg m_ea
+ H = set(2, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fed5 # SET 2,L = (XY+o)
+ @rm_reg m_ea
+ L = set(2, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fed6 # SET 2,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(2, TDAT8);
+ @wm m_ea
+
+fed7 # SET 2,A = (XY+o)
+ @rm_reg m_ea
+ A = set(2, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fed8 # SET 3,B = (XY+o)
+ @rm_reg m_ea
+ B = set(3, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fed9 # SET 3,C = (XY+o)
+ @rm_reg m_ea
+ C = set(3, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feda # SET 3,D = (XY+o)
+ @rm_reg m_ea
+ D = set(3, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fedb # SET 3,E = (XY+o)
+ @rm_reg m_ea
+ E = set(3, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fedc # SET 3,H = (XY+o)
+ @rm_reg m_ea
+ H = set(3, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fedd # SET 3,L = (XY+o)
+ @rm_reg m_ea
+ L = set(3, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fede # SET 3,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(3, TDAT8);
+ @wm m_ea
+
+fedf # SET 3,A = (XY+o)
+ @rm_reg m_ea
+ A = set(3, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fee0 # SET 4,B = (XY+o)
+ @rm_reg m_ea
+ B = set(4, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fee1 # SET 4,C = (XY+o)
+ @rm_reg m_ea
+ C = set(4, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fee2 # SET 4,D = (XY+o)
+ @rm_reg m_ea
+ D = set(4, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fee3 # SET 4,E = (XY+o)
+ @rm_reg m_ea
+ E = set(4, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fee4 # SET 4,H = (XY+o)
+ @rm_reg m_ea
+ H = set(4, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fee5 # SET 4,L = (XY+o)
+ @rm_reg m_ea
+ L = set(4, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fee6 # SET 4,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(4, TDAT8);
+ @wm m_ea
+
+fee7 # SET 4,A = (XY+o)
+ @rm_reg m_ea
+ A = set(4, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fee8 # SET 5,B = (XY+o)
+ @rm_reg m_ea
+ B = set(5, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fee9 # SET 5,C = (XY+o)
+ @rm_reg m_ea
+ C = set(5, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+feea # SET 5,D = (XY+o)
+ @rm_reg m_ea
+ D = set(5, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+feeb # SET 5,E = (XY+o)
+ @rm_reg m_ea
+ E = set(5, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+feec # SET 5,H = (XY+o)
+ @rm_reg m_ea
+ H = set(5, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+feed # SET 5,L = (XY+o)
+ @rm_reg m_ea
+ L = set(5, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+feee # SET 5,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(5, TDAT8);
+ @wm m_ea
+
+feef # SET 5,A = (XY+o)
+ @rm_reg m_ea
+ A = set(5, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fef0 # SET 6,B = (XY+o)
+ @rm_reg m_ea
+ B = set(6, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fef1 # SET 6,C = (XY+o)
+ @rm_reg m_ea
+ C = set(6, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fef2 # SET 6,D = (XY+o)
+ @rm_reg m_ea
+ D = set(6, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fef3 # SET 6,E = (XY+o)
+ @rm_reg m_ea
+ E = set(6, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fef4 # SET 6,H = (XY+o)
+ @rm_reg m_ea
+ H = set(6, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fef5 # SET 6,L = (XY+o)
+ @rm_reg m_ea
+ L = set(6, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fef6 # SET 6,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(6, TDAT8);
+ @wm m_ea
+
+fef7 # SET 6,A = (XY+o)
+ @rm_reg m_ea
+ A = set(6, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+fef8 # SET 7,B = (XY+o)
+ @rm_reg m_ea
+ B = set(7, TDAT8);
+ TDAT8 = B;
+ @wm m_ea
+
+fef9 # SET 7,C = (XY+o)
+ @rm_reg m_ea
+ C = set(7, TDAT8);
+ TDAT8 = C;
+ @wm m_ea
+
+fefa # SET 7,D = (XY+o)
+ @rm_reg m_ea
+ D = set(7, TDAT8);
+ TDAT8 = D;
+ @wm m_ea
+
+fefb # SET 7,E = (XY+o)
+ @rm_reg m_ea
+ E = set(7, TDAT8);
+ TDAT8 = E;
+ @wm m_ea
+
+fefc # SET 7,H = (XY+o)
+ @rm_reg m_ea
+ H = set(7, TDAT8);
+ TDAT8 = H;
+ @wm m_ea
+
+fefd # SET 7,L = (XY+o)
+ @rm_reg m_ea
+ L = set(7, TDAT8);
+ TDAT8 = L;
+ @wm m_ea
+
+fefe # SET 7,(XY+o)
+ @rm_reg m_ea
+ TDAT8 = set(7, TDAT8);
+ @wm m_ea
+
+feff # SET 7,A = (XY+o)
+ @rm_reg m_ea
+ A = set(7, TDAT8);
+ TDAT8 = A;
+ @wm m_ea
+
+
+##########################################################
+# IX register related opcodes (DD prefix)
+##########################################################
+dd00 # DB DD
+ illegal_1();
+ @jump 0000
+
+dd01 # DB DD
+ illegal_1();
+ @jump 0001
+
+dd02 # DB DD
+ illegal_1();
+ @jump 0002
+
+dd03 # DB DD
+ illegal_1();
+ @jump 0003
+
+dd04 # DB DD
+ illegal_1();
+ @jump 0004
+
+dd05 # DB DD
+ illegal_1();
+ @jump 0005
+
+dd06 # DB DD
+ illegal_1();
+ @jump 0006
+
+dd07 # DB DD
+ illegal_1();
+ @jump 0007
+
+dd08 # DB DD
+ illegal_1();
+ @jump 0008
+
+dd09 # ADD IX,BC
+ TDAT = IX;
+ TDAT2 = BC;
+ @add16
+ IX = TDAT;
+
+dd0a # DB DD
+ illegal_1();
+ @jump 000a
+
+dd0b # DB DD
+ illegal_1();
+ @jump 000b
+
+dd0c # DB DD
+ illegal_1();
+ @jump 000c
+
+dd0d # DB DD
+ illegal_1();
+ @jump 000d
+
+dd0e # DB DD
+ illegal_1();
+ @jump 000e
+
+dd0f # DB DD
+ illegal_1();
+ @jump 000f
+
+dd10 # DB DD
+ illegal_1();
+ @jump 0010
+
+dd11 # DB DD
+ illegal_1();
+ @jump 0011
+
+dd12 # DB DD
+ illegal_1();
+ @jump 0012
+
+dd13 # DB DD
+ illegal_1();
+ @jump 0013
+
+dd14 # DB DD
+ illegal_1();
+ @jump 0014
+
+dd15 # DB DD
+ illegal_1();
+ @jump 0015
+
+dd16 # DB DD
+ illegal_1();
+ @jump 0016
+
+dd17 # DB DD
+ illegal_1();
+ @jump 0017
+
+dd18 # DB DD
+ illegal_1();
+ @jump 0018
+
+dd19 # ADD IX,DE
+ TDAT = IX;
+ TDAT2 = DE;
+ @add16
+ IX = TDAT;
+
+dd1a # DB DD
+ illegal_1();
+ @jump 001a
+
+dd1b # DB DD
+ illegal_1();
+ @jump 001b
+
+dd1c # DB DD
+ illegal_1();
+ @jump 001c
+
+dd1d # DB DD
+ illegal_1();
+ @jump 001d
+
+dd1e # DB DD
+ illegal_1();
+ @jump 001e
+
+dd1f # DB DD
+ illegal_1();
+ @jump 001f
+
+dd20 # DB DD
+ illegal_1();
+ @jump 0020
+
+dd21 # LD IX,w
+ @arg16
+ IX = TDAT;
+
+dd22 # LD (w),IX
+ @arg16
+ m_ea = TDAT;
+ TDAT = IX;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+dd23 # INC IX
+ @nomreq_ir 2
+ IX++;
+
+dd24 # INC HX
+ inc(HX);
+
+dd25 # DEC HX
+ dec(HX);
+
+dd26 # LD HX,n
+ @arg
+ HX = TDAT8;
+
+dd27 # DB DD
+ illegal_1();
+ @jump 0027
+
+dd28 # DB DD
+ illegal_1();
+ @jump 0028
+
+dd29 # ADD IX,IX
+ TDAT = IX;
+ TDAT2 = IX;
+ @add16
+ IX = TDAT;
+
+dd2a # LD IX,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ IX = TDAT;
+ WZ = m_ea + 1;
+
+dd2b # DEC IX
+ @nomreq_ir 2
+ IX--;
+
+dd2c # INC LX
+ inc(LX);
+
+dd2d # DEC LX
+ dec(LX);
+
+dd2e # LD LX,n
+ @arg
+ LX = TDAT8;
+
+dd2f # DB DD
+ illegal_1();
+ @jump 002f
+
+dd30 # DB DD
+ illegal_1();
+ @jump 0030
+
+dd31 # DB DD
+ illegal_1();
+ @jump 0031
+
+dd32 # DB DD
+ illegal_1();
+ @jump 0032
+
+dd33 # DB DD
+ illegal_1();
+ @jump 0033
+
+dd34 # INC (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm_reg m_ea
+ inc(TDAT8);
+ @wm m_ea
+
+dd35 # DEC (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm_reg m_ea
+ dec(TDAT8);
+ @wm m_ea
+
+dd36 # LD (IX+o),n
+ @eax
+ @arg
+ 2 * @nomreq_addr PC-1
+ @wm m_ea
+
+dd37 # DB DD
+ illegal_1();
+ @jump 0037
+
+dd38 # DB DD
+ illegal_1();
+ @jump 0038
+
+dd39 # ADD IX,SP
+ TDAT = IX;
+ TDAT2 = SP;
+ @add16
+ IX = TDAT;
+
+dd3a # DB DD
+ illegal_1();
+ @jump 003a
+
+dd3b # DB DD
+ illegal_1();
+ @jump 003b
+
+dd3c # DB DD
+ illegal_1();
+ @jump 003c
+
+dd3d # DB DD
+ illegal_1();
+ @jump 003d
+
+dd3e # DB DD
+ illegal_1();
+ @jump 003e
+
+dd3f # DB DD
+ illegal_1();
+ @jump 003f
+
+dd40 # DB DD
+ illegal_1();
+ @jump 0040
+
+dd41 # DB DD
+ illegal_1();
+ @jump 0041
+
+dd42 # DB DD
+ illegal_1();
+ @jump 0042
+
+dd43 # DB DD
+ illegal_1();
+ @jump 0043
+
+dd44 # LD B,HX
+ B = HX;
+
+dd45 # LD B,LX
+ B = LX;
+
+dd46 # LD B,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ B = TDAT8;
+
+dd47 # DB DD
+ illegal_1();
+ @jump 0047
+
+dd48 # DB DD
+ illegal_1();
+ @jump 0048
+
+dd49 # DB DD
+ illegal_1();
+ @jump 0049
+
+dd4a # DB DD
+ illegal_1();
+ @jump 004a
+
+dd4b # DB DD
+ illegal_1();
+ @jump 004b
+
+dd4c # LD C,HX
+ C = HX;
+
+dd4d # LD C,LX
+ C = LX;
+
+dd4e # LD C,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ C = TDAT8;
+
+dd4f # DB DD
+ illegal_1();
+ @jump 004f
+
+dd50 # DB DD
+ illegal_1();
+ @jump 0050
+
+dd51 # DB DD
+ illegal_1();
+ @jump 0051
+
+dd52 # DB DD
+ illegal_1();
+ @jump 0052
+
+dd53 # DB DD
+ illegal_1();
+ @jump 0053
+
+dd54 # LD D,HX
+ D = HX;
+
+dd55 # LD D,LX
+ D = LX;
+
+dd56 # LD D,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ D = TDAT8;
+
+dd57 # DB DD
+ illegal_1();
+ @jump 0057
+
+dd58 # DB DD
+ illegal_1();
+ @jump 0058
+
+dd59 # DB DD
+ illegal_1();
+ @jump 0059
+
+dd5a # DB DD
+ illegal_1();
+ @jump 005a
+
+dd5b # DB DD
+ illegal_1();
+ @jump 005b
+
+dd5c # LD E,HX
+ E = HX;
+
+dd5d # LD E,LX
+ E = LX;
+
+dd5e # LD E,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ E = TDAT8;
+
+dd5f # DB DD
+ illegal_1();
+ @jump 005f
+
+dd60 # LD HX,B
+ HX = B;
+
+dd61 # LD HX,C
+ HX = C;
+
+dd62 # LD HX,D
+ HX = D;
+
+dd63 # LD HX,E
+ HX = E;
+
+dd64 # LD HX,HX
+
+dd65 # LD HX,LX
+ HX = LX;
+
+dd66 # LD H,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ H = TDAT8;
+
+dd67 # LD HX,A
+ HX = A;
+
+dd68 # LD LX,B
+ LX = B;
+
+dd69 # LD LX,C
+ LX = C;
+
+dd6a # LD LX,D
+ LX = D;
+
+dd6b # LD LX,E
+ LX = E;
+
+dd6c # LD LX,HX
+ LX = HX;
+
+dd6d # LD LX,LX
+
+dd6e # LD L,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ L = TDAT8;
+
+dd6f # LD LX,A
+ LX = A;
+
+dd70 # LD (IX+o),B
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = B;
+ @wm m_ea
+
+dd71 # LD (IX+o),C
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = C;
+ @wm m_ea
+
+dd72 # LD (IX+o),D
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = D;
+ @wm m_ea
+
+dd73 # LD (IX+o),E
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = E;
+ @wm m_ea
+
+dd74 # LD (IX+o),H
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = H;
+ @wm m_ea
+
+dd75 # LD (IX+o),L
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = L;
+ @wm m_ea
+
+dd76 # DB DD
+ illegal_1();
+ @jump 0076
+
+dd77 # LD (IX+o),A
+ @eax
+ 5 * @nomreq_addr PC-1
+ TDAT8 = A;
+ @wm m_ea
+
+dd78 # DB DD
+ illegal_1();
+ @jump 0078
+
+dd79 # DB DD
+ illegal_1();
+ @jump 0079
+
+dd7a # DB DD
+ illegal_1();
+ @jump 007a
+
+dd7b # DB DD
+ illegal_1();
+ @jump 007b
+
+dd7c # LD A,HX
+ A = HX;
+
+dd7d # LD A,LX
+ A = LX;
+
+dd7e # LD A,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ A = TDAT8;
+
+dd7f # DB DD
+ illegal_1();
+ @jump 007f
+
+dd80 # DB DD
+ illegal_1();
+ @jump 0080
+
+dd81 # DB DD
+ illegal_1();
+ @jump 0081
+
+dd82 # DB DD
+ illegal_1();
+ @jump 0082
+
+dd83 # DB DD
+ illegal_1();
+ @jump 0083
+
+dd84 # ADD A,HX
+ add_a(HX);
+
+dd85 # ADD A,LX
+ add_a(LX);
+
+dd86 # ADD A,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ add_a(TDAT8);
+
+dd87 # DB DD
+ illegal_1();
+ @jump 0087
+
+dd88 # DB DD
+ illegal_1();
+ @jump 0088
+
+dd89 # DB DD
+ illegal_1();
+ @jump 0089
+
+dd8a # DB DD
+ illegal_1();
+ @jump 008a
+
+dd8b # DB DD
+ illegal_1();
+ @jump 008b
+
+dd8c # ADC A,HX
+ adc_a(HX);
+
+dd8d # ADC A,LX
+ adc_a(LX);
+
+dd8e # ADC A,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ adc_a(TDAT8);
+
+dd8f # DB DD
+ illegal_1();
+ @jump 008f
+
+dd90 # DB DD
+ illegal_1();
+ @jump 0090
+
+dd91 # DB DD
+ illegal_1();
+ @jump 0091
+
+dd92 # DB DD
+ illegal_1();
+ @jump 0092
+
+dd93 # DB DD
+ illegal_1();
+ @jump 0093
+
+dd94 # SUB HX
+ sub_a(HX);
+
+dd95 # SUB LX
+ sub_a(LX);
+
+dd96 # SUB (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ sub_a(TDAT8);
+
+dd97 # DB DD
+ illegal_1();
+ @jump 0097
+
+dd98 # DB DD
+ illegal_1();
+ @jump 0098
+
+dd99 # DB DD
+ illegal_1();
+ @jump 0099
+
+dd9a # DB DD
+ illegal_1();
+ @jump 009a
+
+dd9b # DB DD
+ illegal_1();
+ @jump 009b
+
+dd9c # SBC A,HX
+ sbc_a(HX);
+
+dd9d # SBC A,LX
+ sbc_a(LX);
+
+dd9e # SBC A,(IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ sbc_a(TDAT8);
+
+dd9f # DB DD
+ illegal_1();
+ @jump 009f
+
+dda0 # DB DD
+ illegal_1();
+ @jump 00a0
+
+dda1 # DB DD
+ illegal_1();
+ @jump 00a1
+
+dda2 # DB DD
+ illegal_1();
+ @jump 00a2
+
+dda3 # DB DD
+ illegal_1();
+ @jump 00a3
+
+dda4 # AND HX
+ and_a(HX);
+
+dda5 # AND LX
+ and_a(LX);
+
+dda6 # AND (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ and_a(TDAT8);
+
+dda7 # DB DD
+ illegal_1();
+ @jump 00a7
+
+dda8 # DB DD
+ illegal_1();
+ @jump 00a8
+
+dda9 # DB DD
+ illegal_1();
+ @jump 00a9
+
+ddaa # DB DD
+ illegal_1();
+ @jump 00aa
+
+ddab # DB DD
+ illegal_1();
+ @jump 00ab
+
+ddac # XOR HX
+ xor_a(HX);
+
+ddad # XOR LX
+ xor_a(LX);
+
+ddae # XOR (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ xor_a(TDAT8);
+
+ddaf # DB DD
+ illegal_1();
+ @jump 00af
+
+ddb0 # DB DD
+ illegal_1();
+ @jump 00b0
+
+ddb1 # DB DD
+ illegal_1();
+ @jump 00b1
+
+ddb2 # DB DD
+ illegal_1();
+ @jump 00b2
+
+ddb3 # DB DD
+ illegal_1();
+ @jump 00b3
+
+ddb4 # OR HX
+ or_a(HX);
+
+ddb5 # OR LX
+ or_a(LX);
+
+ddb6 # OR (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ or_a(TDAT8);
+
+ddb7 # DB DD
+ illegal_1();
+ @jump 00b7
+
+ddb8 # DB DD
+ illegal_1();
+ @jump 00b8
+
+ddb9 # DB DD
+ illegal_1();
+ @jump 00b9
+
+ddba # DB DD
+ illegal_1();
+ @jump 00ba
+
+ddbb # DB DD
+ illegal_1();
+ @jump 00bb
+
+ddbc # CP HX
+ cp(HX);
+
+ddbd # CP LX
+ cp(LX);
+
+ddbe # CP (IX+o)
+ @eax
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ cp(TDAT8);
+
+ddbf # DB DD
+ illegal_1();
+ @jump 00bf
+
+ddc0 # DB DD
+ illegal_1();
+ @jump 00c0
+
+ddc1 # DB DD
+ illegal_1();
+ @jump 00c1
+
+ddc2 # DB DD
+ illegal_1();
+ @jump 00c2
+
+ddc3 # DB DD
+ illegal_1();
+ @jump 00c3
+
+ddc4 # DB DD
+ illegal_1();
+ @jump 00c4
+
+ddc5 # DB DD
+ illegal_1();
+ @jump 00c5
+
+ddc6 # DB DD
+ illegal_1();
+ @jump 00c6
+
+ddc7 # DB DD
+ illegal_1();
+ @jump 00c7
+
+ddc8 # DB DD
+ illegal_1();
+ @jump 00c8
+
+ddc9 # DB DD
+ illegal_1();
+ @jump 00c9
+
+ddca # DB DD
+ illegal_1();
+ @jump 00ca
+
+ddcb # ** DD CB xx
+ @eax
+ @arg
+ 2 * @nomreq_addr PC-1
+ @jump_prefixed 0xfe
+
+ddcc # DB DD
+ illegal_1();
+ @jump 00cc
+
+ddcd # DB DD
+ illegal_1();
+ @jump 00cd
+
+ddce # DB DD
+ illegal_1();
+ @jump 00ce
+
+ddcf # DB DD
+ illegal_1();
+ @jump 00cf
+
+ddd0 # DB DD
+ illegal_1();
+ @jump 00d0
+
+ddd1 # DB DD
+ illegal_1();
+ @jump 00d1
+
+ddd2 # DB DD
+ illegal_1();
+ @jump 00d2
+
+ddd3 # DB DD
+ illegal_1();
+ @jump 00d3
+
+ddd4 # DB DD
+ illegal_1();
+ @jump 00d4
+
+ddd5 # DB DD
+ illegal_1();
+ @jump 00d5
+
+ddd6 # DB DD
+ illegal_1();
+ @jump 00d6
+
+ddd7 # DB DD
+ illegal_1();
+ @jump 00d7
+
+ddd8 # DB DD
+ illegal_1();
+ @jump 00d8
+
+ddd9 # DB DD
+ illegal_1();
+ @jump 00d9
+
+ddda # DB DD
+ illegal_1();
+ @jump 00da
+
+dddb # DB DD
+ illegal_1();
+ @jump 00db
+
+dddc # DB DD
+ illegal_1();
+ @jump 00dc
+
+dddd # DB DD
+ illegal_1();
+ @jump 00dd
+
+ddde # DB DD
+ illegal_1();
+ @jump 00de
+
+dddf # DB DD
+ illegal_1();
+ @jump 00df
+
+dde0 # DB DD
+ illegal_1();
+ @jump 00e0
+
+dde1 # POP IX
+ @pop
+ IX = TDAT;
+
+dde2 # DB DD
+ illegal_1();
+ @jump 00e2
+
+dde3 # EX (SP),IX
+ @ex_sp IX
+
+dde4 # DB DD
+ illegal_1();
+ @jump 00e4
+
+dde5 # PUSH IX
+ @push IX
+
+dde6 # DB DD
+ illegal_1();
+ @jump 00e6
+
+dde7 # DB DD
+ illegal_1();
+ @jump 00e7
+
+dde8 # DB DD
+ illegal_1();
+ @jump 00e8
+
+dde9 # JP (IX)
+ PC = IX;
+
+ddea # DB DD
+ illegal_1();
+ @jump 00ea
+
+ddeb # DB DD
+ illegal_1();
+ @jump 00eb
+
+ddec # DB DD
+ illegal_1();
+ @jump 00ec
+
+dded # DB DD
+ illegal_1();
+ @jump 00ed
+
+ddee # DB DD
+ illegal_1();
+ @jump 00ee
+
+ddef # DB DD
+ illegal_1();
+ @jump 00ef
+
+ddf0 # DB DD
+ illegal_1();
+ @jump 00f0
+
+ddf1 # DB DD
+ illegal_1();
+ @jump 00f1
+
+ddf2 # DB DD
+ illegal_1();
+ @jump 00f2
+
+ddf3 # DB DD
+ illegal_1();
+ @jump 00f3
+
+ddf4 # DB DD
+ illegal_1();
+ @jump 00f4
+
+ddf5 # DB DD
+ illegal_1();
+ @jump 00f5
+
+ddf6 # DB DD
+ illegal_1();
+ @jump 00f6
+
+ddf7 # DB DD
+ illegal_1();
+ @jump 00f7
+
+ddf8 # DB DD
+ illegal_1();
+ @jump 00f8
+
+ddf9 # LD SP,IX
+ @nomreq_ir 2
+ SP = IX;
+
+ddfa # DB DD
+ illegal_1();
+ @jump 00fa
+
+ddfb # DB DD
+ illegal_1();
+ @jump 00fb
+
+ddfc # DB DD
+ illegal_1();
+ @jump 00fc
+
+ddfd # DB DD
+ illegal_1();
+ @jump 00fd
+
+ddfe # DB DD
+ illegal_1();
+ @jump 00fe
+
+ddff # DB DD
+ illegal_1();
+ @jump 00ff
+
+
+##########################################################
+# IY register related opcodes (FD prefix)
+##########################################################
+fd00 # DB FD
+ illegal_1();
+ @jump 0000
+
+fd01 # DB FD
+ illegal_1();
+ @jump 0001
+
+fd02 # DB FD
+ illegal_1();
+ @jump 0002
+
+fd03 # DB FD
+ illegal_1();
+ @jump 0003
+
+fd04 # DB FD
+ illegal_1();
+ @jump 0004
+
+fd05 # DB FD
+ illegal_1();
+ @jump 0005
+
+fd06 # DB FD
+ illegal_1();
+ @jump 0006
+
+fd07 # DB FD
+ illegal_1();
+ @jump 0007
+
+fd08 # DB FD
+ illegal_1();
+ @jump 0008
+
+fd09 # ADD IY,BC
+ TDAT = IY;
+ TDAT2 = BC;
+ @add16
+ IY = TDAT;
+
+fd0a # DB FD
+ illegal_1();
+ @jump 000a
+
+fd0b # DB FD
+ illegal_1();
+ @jump 000b
+
+fd0c # DB FD
+ illegal_1();
+ @jump 000c
+
+fd0d # DB FD
+ illegal_1();
+ @jump 000d
+
+fd0e # DB FD
+ illegal_1();
+ @jump 000e
+
+fd0f # DB FD
+ illegal_1();
+ @jump 000f
+
+fd10 # DB FD
+ illegal_1();
+ @jump 0010
+
+fd11 # DB FD
+ illegal_1();
+ @jump 0011
+
+fd12 # DB FD
+ illegal_1();
+ @jump 0012
+
+fd13 # DB FD
+ illegal_1();
+ @jump 0013
+
+fd14 # DB FD
+ illegal_1();
+ @jump 0014
+
+fd15 # DB FD
+ illegal_1();
+ @jump 0015
+
+fd16 # DB FD
+ illegal_1();
+ @jump 0016
+
+fd17 # DB FD
+ illegal_1();
+ @jump 0017
+
+fd18 # DB FD
+ illegal_1();
+ @jump 0018
+
+fd19 # ADD IY,DE
+ TDAT = IY;
+ TDAT2 = DE;
+ @add16
+ IY = TDAT;
+
+fd1a # DB FD
+ illegal_1();
+ @jump 001a
+
+fd1b # DB FD
+ illegal_1();
+ @jump 001b
+
+fd1c # DB FD
+ illegal_1();
+ @jump 001c
+
+fd1d # DB FD
+ illegal_1();
+ @jump 001d
+
+fd1e # DB FD
+ illegal_1();
+ @jump 001e
+
+fd1f # DB FD
+ illegal_1();
+ @jump 001f
+
+fd20 # DB FD
+ illegal_1();
+ @jump 0020
+
+fd21 # LD IY,w
+ @arg16
+ IY = TDAT;
+
+fd22 # LD (w),IY
+ @arg16
+ m_ea = TDAT;
+ TDAT = IY;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+fd23 # INC IY
+ @nomreq_ir 2
+ IY++;
+
+fd24 # INC HY
+ inc(HY);
+
+fd25 # DEC HY
+ dec(HY);
+
+fd26 # LD HY,n
+ @arg
+ HY = TDAT8;
+
+fd27 # DB FD
+ illegal_1();
+ @jump 0027
+
+fd28 # DB FD
+ illegal_1();
+ @jump 0028
+
+fd29 # ADD IY,IY
+ TDAT = IY;
+ TDAT2 = IY;
+ @add16
+ IY = TDAT;
+
+fd2a # LD IY,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ IY = TDAT;
+ WZ = m_ea + 1;
+
+fd2b # DEC IY
+ @nomreq_ir 2
+ IY--;
+
+fd2c # INC LY
+ inc(LY);
+
+fd2d # DEC LY
+ dec(LY);
+
+fd2e # LD LY,n
+ @arg
+ LY = TDAT8;
+
+fd2f # DB FD
+ illegal_1();
+ @jump 002f
+
+fd30 # DB FD
+ illegal_1();
+ @jump 0030
+
+fd31 # DB FD
+ illegal_1();
+ @jump 0031
+
+fd32 # DB FD
+ illegal_1();
+ @jump 0032
+
+fd33 # DB FD
+ illegal_1();
+ @jump 0033
+
+fd34 # INC (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm_reg m_ea
+ inc(TDAT8);
+ @wm m_ea
+
+fd35 # DEC (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm_reg m_ea
+ dec(TDAT8);
+ @wm m_ea
+
+fd36 # LD (IY+o),n
+ @eay
+ @arg
+ 2 * @nomreq_addr PC-1
+ @wm m_ea
+
+fd37 # DB FD
+ illegal_1();
+ @jump 0037
+
+fd38 # DB FD
+ illegal_1();
+ @jump 0038
+
+fd39 # ADD IY,SP
+ TDAT = IY;
+ TDAT2 = SP;
+ @add16
+ IY = TDAT;
+
+fd3a # DB FD
+ illegal_1();
+ @jump 003a
+
+fd3b # DB FD
+ illegal_1();
+ @jump 003b
+
+fd3c # DB FD
+ illegal_1();
+ @jump 003c
+
+fd3d # DB FD
+ illegal_1();
+ @jump 003d
+
+fd3e # DB FD
+ illegal_1();
+ @jump 003e
+
+fd3f # DB FD
+ illegal_1();
+ @jump 003f
+
+fd40 # DB FD
+ illegal_1();
+ @jump 0040
+
+fd41 # DB FD
+ illegal_1();
+ @jump 0041
+
+fd42 # DB FD
+ illegal_1();
+ @jump 0042
+
+fd43 # DB FD
+ illegal_1();
+ @jump 0043
+
+fd44 # LD B,HY
+ B = HY;
+
+fd45 # LD B,LY
+ B = LY;
+
+fd46 # LD B,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ B = TDAT8;
+
+fd47 # DB FD
+ illegal_1();
+ @jump 0047
+
+fd48 # DB FD
+ illegal_1();
+ @jump 0048
+
+fd49 # DB FD
+ illegal_1();
+ @jump 0049
+
+fd4a # DB FD
+ illegal_1();
+ @jump 004a
+
+fd4b # DB FD
+ illegal_1();
+ @jump 004b
+
+fd4c # LD C,HY
+ C = HY;
+
+fd4d # LD C,LY
+ C = LY;
+
+fd4e # LD C,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ C = TDAT8;
+
+fd4f # DB FD
+ illegal_1();
+ @jump 004f
+
+fd50 # DB FD
+ illegal_1();
+ @jump 0050
+
+fd51 # DB FD
+ illegal_1();
+ @jump 0051
+
+fd52 # DB FD
+ illegal_1();
+ @jump 0052
+
+fd53 # DB FD
+ illegal_1();
+ @jump 0053
+
+fd54 # LD D,HY
+ D = HY;
+
+fd55 # LD D,LY
+ D = LY;
+
+fd56 # LD D,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ D = TDAT8;
+
+fd57 # DB FD
+ illegal_1();
+ @jump 0057
+
+fd58 # DB FD
+ illegal_1();
+ @jump 0058
+
+fd59 # DB FD
+ illegal_1();
+ @jump 0059
+
+fd5a # DB FD
+ illegal_1();
+ @jump 005a
+
+fd5b # DB FD
+ illegal_1();
+ @jump 005b
+
+fd5c # LD E,HY
+ E = HY;
+
+fd5d # LD E,LY
+ E = LY;
+
+fd5e # LD E,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ E = TDAT8;
+
+fd5f # DB FD
+ illegal_1();
+ @jump 005f
+
+fd60 # LD HY,B
+ HY = B;
+
+fd61 # LD HY,C
+ HY = C;
+
+fd62 # LD HY,D
+ HY = D;
+
+fd63 # LD HY,E
+ HY = E;
+
+fd64 # LD HY,HY
+
+fd65 # LD HY,LY
+ HY = LY;
+
+fd66 # LD H,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ H = TDAT8;
+
+fd67 # LD HY,A
+ HY = A;
+
+fd68 # LD LY,B
+ LY = B;
+
+fd69 # LD LY,C
+ LY = C;
+
+fd6a # LD LY,D
+ LY = D;
+
+fd6b # LD LY,E
+ LY = E;
+
+fd6c # LD LY,HY
+ LY = HY;
+
+fd6d # LD LY,LY
+
+fd6e # LD L,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ L = TDAT8;
+
+fd6f # LD LY,A
+ LY = A;
+
+fd70 # LD (IY+o),B
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = B;
+ @wm m_ea
+
+fd71 # LD (IY+o),C
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = C;
+ @wm m_ea
+
+fd72 # LD (IY+o),D
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = D;
+ @wm m_ea
+
+fd73 # LD (IY+o),E
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = E;
+ @wm m_ea
+
+fd74 # LD (IY+o),H
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = H;
+ @wm m_ea
+
+fd75 # LD (IY+o),L
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = L;
+ @wm m_ea
+
+fd76 # DB FD
+ illegal_1();
+ @jump 0076
+
+fd77 # LD (IY+o),A
+ @eay
+ 5 * @nomreq_addr PC-1
+ TDAT8 = A;
+ @wm m_ea
+
+fd78 # DB FD
+ illegal_1();
+ @jump 0078
+
+fd79 # DB FD
+ illegal_1();
+ @jump 0079
+
+fd7a # DB FD
+ illegal_1();
+ @jump 007a
+
+fd7b # DB FD
+ illegal_1();
+ @jump 007b
+
+fd7c # LD A,HY
+ A = HY;
+
+fd7d # LD A,LY
+ A = LY;
+
+fd7e # LD A,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ A = TDAT8;
+
+fd7f # DB FD
+ illegal_1();
+ @jump 007f
+
+fd80 # DB FD
+ illegal_1();
+ @jump 0080
+
+fd81 # DB FD
+ illegal_1();
+ @jump 0081
+
+fd82 # DB FD
+ illegal_1();
+ @jump 0082
+
+fd83 # DB FD
+ illegal_1();
+ @jump 0083
+
+fd84 # ADD A,HY
+ add_a(HY);
+
+fd85 # ADD A,LY
+ add_a(LY);
+
+fd86 # ADD A,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ add_a(TDAT8);
+
+fd87 # DB FD
+ illegal_1();
+ @jump 0087
+
+fd88 # DB FD
+ illegal_1();
+ @jump 0088
+
+fd89 # DB FD
+ illegal_1();
+ @jump 0089
+
+fd8a # DB FD
+ illegal_1();
+ @jump 008a
+
+fd8b # DB FD
+ illegal_1();
+ @jump 008b
+
+fd8c # ADC A,HY
+ adc_a(HY);
+
+fd8d # ADC A,LY
+ adc_a(LY);
+
+fd8e # ADC A,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ adc_a(TDAT8);
+
+fd8f # DB FD
+ illegal_1();
+ @jump 008f
+
+fd90 # DB FD
+ illegal_1();
+ @jump 0090
+
+fd91 # DB FD
+ illegal_1();
+ @jump 0091
+
+fd92 # DB FD
+ illegal_1();
+ @jump 0092
+
+fd93 # DB FD
+ illegal_1();
+ @jump 0093
+
+fd94 # SUB HY
+ sub_a(HY);
+
+fd95 # SUB LY
+ sub_a(LY);
+
+fd96 # SUB (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ sub_a(TDAT8);
+
+fd97 # DB FD
+ illegal_1();
+ @jump 0097
+
+fd98 # DB FD
+ illegal_1();
+ @jump 0098
+
+fd99 # DB FD
+ illegal_1();
+ @jump 0099
+
+fd9a # DB FD
+ illegal_1();
+ @jump 009a
+
+fd9b # DB FD
+ illegal_1();
+ @jump 009b
+
+fd9c # SBC A,HY
+ sbc_a(HY);
+
+fd9d # SBC A,LY
+ sbc_a(LY);
+
+fd9e # SBC A,(IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ sbc_a(TDAT8);
+
+fd9f # DB FD
+ illegal_1();
+ @jump 009f
+
+fda0 # DB FD
+ illegal_1();
+ @jump 00a0
+
+fda1 # DB FD
+ illegal_1();
+ @jump 00a1
+
+fda2 # DB FD
+ illegal_1();
+ @jump 00a2
+
+fda3 # DB FD
+ illegal_1();
+ @jump 00a3
+
+fda4 # AND HY
+ and_a(HY);
+
+fda5 # AND LY
+ and_a(LY);
+
+fda6 # AND (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ and_a(TDAT8);
+
+fda7 # DB FD
+ illegal_1();
+ @jump 00a7
+
+fda8 # DB FD
+ illegal_1();
+ @jump 00a8
+
+fda9 # DB FD
+ illegal_1();
+ @jump 00a9
+
+fdaa # DB FD
+ illegal_1();
+ @jump 00aa
+
+fdab # DB FD
+ illegal_1();
+ @jump 00ab
+
+fdac # XOR HY
+ xor_a(HY);
+
+fdad # XOR LY
+ xor_a(LY);
+
+fdae # XOR (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ xor_a(TDAT8);
+
+fdaf # DB FD
+ illegal_1();
+ @jump 00af
+
+fdb0 # DB FD
+ illegal_1();
+ @jump 00b0
+
+fdb1 # DB FD
+ illegal_1();
+ @jump 00b1
+
+fdb2 # DB FD
+ illegal_1();
+ @jump 00b2
+
+fdb3 # DB FD
+ illegal_1();
+ @jump 00b3
+
+fdb4 # OR HY
+ or_a(HY);
+
+fdb5 # OR LY
+ or_a(LY);
+
+fdb6 # OR (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ or_a(TDAT8);
+
+fdb7 # DB FD
+ illegal_1();
+ @jump 00b7
+
+fdb8 # DB FD
+ illegal_1();
+ @jump 00b8
+
+fdb9 # DB FD
+ illegal_1();
+ @jump 00b9
+
+fdba # DB FD
+ illegal_1();
+ @jump 00ba
+
+fdbb # DB FD
+ illegal_1();
+ @jump 00bb
+
+fdbc # CP HY
+ cp(HY);
+
+fdbd # CP LY
+ cp(LY);
+
+fdbe # CP (IY+o)
+ @eay
+ 5 * @nomreq_addr PC-1
+ @rm m_ea
+ cp(TDAT8);
+
+fdbf # DB FD
+ illegal_1();
+ @jump 00bf
+
+fdc0 # DB FD
+ illegal_1();
+ @jump 00c0
+
+fdc1 # DB FD
+ illegal_1();
+ @jump 00c1
+
+fdc2 # DB FD
+ illegal_1();
+ @jump 00c2
+
+fdc3 # DB FD
+ illegal_1();
+ @jump 00c3
+
+fdc4 # DB FD
+ illegal_1();
+ @jump 00c4
+
+fdc5 # DB FD
+ illegal_1();
+ @jump 00c5
+
+fdc6 # DB FD
+ illegal_1();
+ @jump 00c6
+
+fdc7 # DB FD
+ illegal_1();
+ @jump 00c7
+
+fdc8 # DB FD
+ illegal_1();
+ @jump 00c8
+
+fdc9 # DB FD
+ illegal_1();
+ @jump 00c9
+
+fdca # DB FD
+ illegal_1();
+ @jump 00ca
+
+fdcb # ** FD CB xx
+ @eay
+ @arg
+ 2 * @nomreq_addr PC-1
+ @jump_prefixed 0xfe
+
+fdcc # DB FD
+ illegal_1();
+ @jump 00cc
+
+fdcd # DB FD
+ illegal_1();
+ @jump 00cd
+
+fdce # DB FD
+ illegal_1();
+ @jump 00ce
+
+fdcf # DB FD
+ illegal_1();
+ @jump 00cf
+
+fdd0 # DB FD
+ illegal_1();
+ @jump 00d0
+
+fdd1 # DB FD
+ illegal_1();
+ @jump 00d1
+
+fdd2 # DB FD
+ illegal_1();
+ @jump 00d2
+
+fdd3 # DB FD
+ illegal_1();
+ @jump 00d3
+
+fdd4 # DB FD
+ illegal_1();
+ @jump 00d4
+
+fdd5 # DB FD
+ illegal_1();
+ @jump 00d5
+
+fdd6 # DB FD
+ illegal_1();
+ @jump 00d6
+
+fdd7 # DB FD
+ illegal_1();
+ @jump 00d7
+
+fdd8 # DB FD
+ illegal_1();
+ @jump 00d8
+
+fdd9 # DB FD
+ illegal_1();
+ @jump 00d9
+
+fdda # DB FD
+ illegal_1();
+ @jump 00da
+
+fddb # DB FD
+ illegal_1();
+ @jump 00db
+
+fddc # DB FD
+ illegal_1();
+ @jump 00dc
+
+fddd # DB FD
+ illegal_1();
+ @jump 00dd
+
+fdde # DB FD
+ illegal_1();
+ @jump 00de
+
+fddf # DB FD
+ illegal_1();
+ @jump 00df
+
+fde0 # DB FD
+ illegal_1();
+ @jump 00e0
+
+fde1 # POP IY
+ @pop
+ IY = TDAT;
+
+fde2 # DB FD
+ illegal_1();
+ @jump 00e2
+
+fde3 # EX (SP),IY
+ @ex_sp IY
+
+fde4 # DB FD
+ illegal_1();
+ @jump 00e4
+
+fde5 # PUSH IY
+ @push IY
+
+fde6 # DB FD
+ illegal_1();
+ @jump 00e6
+
+fde7 # DB FD
+ illegal_1();
+ @jump 00e7
+
+fde8 # DB FD
+ illegal_1();
+ @jump 00e8
+
+fde9 # JP (IY)
+ PC = IY;
+
+fdea # DB FD
+ illegal_1();
+ @jump 00ea
+
+fdeb # DB FD
+ illegal_1();
+ @jump 00eb
+
+fdec # DB FD
+ illegal_1();
+ @jump 00ec
+
+fded # DB FD
+ illegal_1();
+ @jump 00ed
+
+fdee # DB FD
+ illegal_1();
+ @jump 00ee
+
+fdef # DB FD
+ illegal_1();
+ @jump 00ef
+
+fdf0 # DB FD
+ illegal_1();
+ @jump 00f0
+
+fdf1 # DB FD
+ illegal_1();
+ @jump 00f1
+
+fdf2 # DB FD
+ illegal_1();
+ @jump 00f2
+
+fdf3 # DB FD
+ illegal_1();
+ @jump 00f3
+
+fdf4 # DB FD
+ illegal_1();
+ @jump 00f4
+
+fdf5 # DB FD
+ illegal_1();
+ @jump 00f5
+
+fdf6 # DB FD
+ illegal_1();
+ @jump 00f6
+
+fdf7 # DB FD
+ illegal_1();
+ @jump 00f7
+
+fdf8 # DB FD
+ illegal_1();
+ @jump 00f8
+
+fdf9 # LD SP,IY
+ @nomreq_ir 2
+ SP = IY;
+
+fdfa # DB FD
+ illegal_1();
+ @jump 00fa
+
+fdfb # DB FD
+ illegal_1();
+ @jump 00fb
+
+fdfc # DB FD
+ illegal_1();
+ @jump 00fc
+
+fdfd # DB FD
+ illegal_1();
+ @jump 00fd
+
+fdfe # DB FD
+ illegal_1();
+ @jump 00fe
+
+fdff # DB FD
+ illegal_1();
+ @jump 00ff
+
+
+##########################################################
+# special opcodes (ED prefix)
+##########################################################
+ed00 # DB ED
+ illegal_2();
+
+ed01 # DB ED
+ illegal_2();
+
+ed02 # DB ED
+ illegal_2();
+
+ed03 # DB ED
+ illegal_2();
+
+ed04 # DB ED
+ illegal_2();
+
+ed05 # DB ED
+ illegal_2();
+
+ed06 # DB ED
+ illegal_2();
+
+ed07 # DB ED
+ illegal_2();
+
+ed08 # DB ED
+ illegal_2();
+
+ed09 # DB ED
+ illegal_2();
+
+ed0a # DB ED
+ illegal_2();
+
+ed0b # DB ED
+ illegal_2();
+
+ed0c # DB ED
+ illegal_2();
+
+ed0d # DB ED
+ illegal_2();
+
+ed0e # DB ED
+ illegal_2();
+
+ed0f # DB ED
+ illegal_2();
+
+ed10 # DB ED
+ illegal_2();
+
+ed11 # DB ED
+ illegal_2();
+
+ed12 # DB ED
+ illegal_2();
+
+ed13 # DB ED
+ illegal_2();
+
+ed14 # DB ED
+ illegal_2();
+
+ed15 # DB ED
+ illegal_2();
+
+ed16 # DB ED
+ illegal_2();
+
+ed17 # DB ED
+ illegal_2();
+
+ed18 # DB ED
+ illegal_2();
+
+ed19 # DB ED
+ illegal_2();
+
+ed1a # DB ED
+ illegal_2();
+
+ed1b # DB ED
+ illegal_2();
+
+ed1c # DB ED
+ illegal_2();
+
+ed1d # DB ED
+ illegal_2();
+
+ed1e # DB ED
+ illegal_2();
+
+ed1f # DB ED
+ illegal_2();
+
+ed20 # DB ED
+ illegal_2();
+
+ed21 # DB ED
+ illegal_2();
+
+ed22 # DB ED
+ illegal_2();
+
+ed23 # DB ED
+ illegal_2();
+
+ed24 # DB ED
+ illegal_2();
+
+ed25 # DB ED
+ illegal_2();
+
+ed26 # DB ED
+ illegal_2();
+
+ed27 # DB ED
+ illegal_2();
+
+ed28 # DB ED
+ illegal_2();
+
+ed29 # DB ED
+ illegal_2();
+
+ed2a # DB ED
+ illegal_2();
+
+ed2b # DB ED
+ illegal_2();
+
+ed2c # DB ED
+ illegal_2();
+
+ed2d # DB ED
+ illegal_2();
+
+ed2e # DB ED
+ illegal_2();
+
+ed2f # DB ED
+ illegal_2();
+
+ed30 # DB ED
+ illegal_2();
+
+ed31 # DB ED
+ illegal_2();
+
+ed32 # DB ED
+ illegal_2();
+
+ed33 # DB ED
+ illegal_2();
+
+ed34 # DB ED
+ illegal_2();
+
+ed35 # DB ED
+ illegal_2();
+
+ed36 # DB ED
+ illegal_2();
+
+ed37 # DB ED
+ illegal_2();
+
+ed38 # DB ED
+ illegal_2();
+
+ed39 # DB ED
+ illegal_2();
+
+ed3a # DB ED
+ illegal_2();
+
+ed3b # DB ED
+ illegal_2();
+
+ed3c # DB ED
+ illegal_2();
+
+ed3d # DB ED
+ illegal_2();
+
+ed3e # DB ED
+ illegal_2();
+
+ed3f # DB ED
+ illegal_2();
+
+ed40 # IN B,(C)
+ @in BC
+ B = TDAT8;
+ set_f((F & CF) | SZP[B]);
+ WZ = BC + 1;
+
+ed41 # OUT (C),B
+ TDAT8 = B;
+ @out BC
+ WZ = BC + 1;
+
+ed42 # SBC HL,BC
+ TDAT = BC;
+ @sbc_hl
+
+ed43 # LD (w),BC
+ @arg16
+ m_ea = TDAT;
+ TDAT = BC;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+ed44 # NEG
+ neg();
+
+ed45 # RETN
+ @retn
+
+ed46 # IM 0
+ m_im = 0;
+
+ed47 # LD i,A
+ @ld_i_a
+
+ed48 # IN C,(C)
+ @in BC
+ C = TDAT8;
+ set_f((F & CF) | SZP[C]);
+ WZ = BC + 1;
+
+ed49 # OUT (C),C
+ TDAT8 = C;
+ @out BC
+ WZ = BC + 1;
+
+ed4a # ADC HL,BC
+ TDAT = BC;
+ @adc_hl
+
+ed4b # LD BC,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ BC = TDAT;
+ WZ = m_ea + 1;
+
+ed4c # NEG
+ neg();
+
+ed4d # RETI
+ @reti
+
+ed4e # IM 0
+ m_im = 0;
+
+ed4f # LD r,A
+ @ld_r_a
+
+ed50 # IN D,(C)
+ @in BC
+ D = TDAT8;
+ set_f((F & CF) | SZP[D]);
+ WZ = BC + 1;
+
+ed51 # OUT (C),D
+ TDAT8 = D;
+ @out BC
+ WZ = BC + 1;
+
+ed52 # SBC HL,DE
+ TDAT = DE;
+ @sbc_hl
+
+ed53 # LD (w),DE
+ @arg16
+ m_ea = TDAT;
+ TDAT = DE;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+ed54 # NEG
+ neg();
+
+ed55 # RETN
+ @retn
+
+ed56 # IM 1
+ m_im = 1;
+
+ed57 # LD A,i
+ @ld_a_i
+
+ed58 # IN E,(C)
+ @in BC
+ E = TDAT8;
+ set_f((F & CF) | SZP[E]);
+ WZ = BC + 1;
+
+ed59 # OUT (C),E
+ TDAT8 = E;
+ @out BC
+ WZ = BC + 1;
+
+ed5a # ADC HL,DE
+ TDAT = DE;
+ @adc_hl
+
+ed5b # LD DE,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ DE = TDAT;
+ WZ = m_ea + 1;
+
+ed5c # NEG
+ neg();
+
+ed5d # RETI
+ @reti
+
+ed5e # IM 2
+ m_im = 2;
+
+ed5f # LD A,r
+ @ld_a_r
+
+ed60 # IN H,(C)
+ @in BC
+ H = TDAT8;
+ set_f((F & CF) | SZP[H]);
+ WZ = BC + 1;
+
+ed61 # OUT (C),H
+ TDAT8 = H;
+ @out BC
+ WZ = BC + 1;
+
+ed62 # SBC HL,HL
+ TDAT = HL;
+ @sbc_hl
+
+ed63 # LD (w),HL
+ @arg16
+ m_ea = TDAT;
+ TDAT = HL;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+ed64 # NEG
+ neg();
+
+ed65 # RETN
+ @retn
+
+ed66 # IM 0
+ m_im = 0;
+
+ed67 # RRD (HL)
+ @rrd
+
+ed68 # IN L,(C)
+ @in BC
+ L = TDAT8;
+ set_f((F & CF) | SZP[L]);
+ WZ = BC + 1;
+
+ed69 # OUT (C),L
+ TDAT8 = L;
+ @out BC
+ WZ = BC + 1;
+
+ed6a # ADC HL,HL
+ TDAT = HL;
+ @adc_hl
+
+ed6b # LD HL,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ HL = TDAT;
+ WZ = m_ea + 1;
+
+ed6c # NEG
+ neg();
+
+ed6d # RETI
+ @reti
+
+ed6e # IM 0
+ m_im = 0;
+
+ed6f # RLD (HL)
+ @rld
+
+ed70 # IN 0,(C)
+ @in BC
+ set_f((F & CF) | SZP[TDAT8]);
+ WZ = BC + 1;
+
+ed71 # OUT (C),0
+ TDAT8 = 0;
+ @out BC
+ WZ = BC + 1;
+
+ed72 # SBC HL,SP
+ TDAT = SP;
+ @sbc_hl
+
+ed73 # LD (w),SP
+ @arg16
+ m_ea = TDAT;
+ TDAT = SP;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+ed74 # NEG
+ neg();
+
+ed75 # RETN
+ @retn
+
+ed76 # IM 1
+ m_im = 1;
+
+ed77 # DB ED,77
+ illegal_2();
+
+ed78 # IN A,(C)
+ @in BC
+ A = TDAT8;
+ set_f((F & CF) | SZP[A]);
+ WZ = BC + 1;
+
+ed79 # OUT (C),A
+ TDAT8 = A;
+ @out BC
+ WZ = BC + 1;
+
+ed7a # ADC HL,SP
+ TDAT = SP;
+ @adc_hl
+
+ed7b # LD SP,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ SP = TDAT;
+ WZ = m_ea + 1;
+
+ed7c # NEG
+ neg();
+
+ed7d # RETI
+ @reti
+
+ed7e # IM 2
+ m_im = 2;
+
+ed7f # DB ED,7F
+ illegal_2();
+
+ed80 # DB ED
+ illegal_2();
+
+ed81 # DB ED
+ illegal_2();
+
+ed82 # DB ED
+ illegal_2();
+
+ed83 # DB ED
+ illegal_2();
+
+ed84 # DB ED
+ illegal_2();
+
+ed85 # DB ED
+ illegal_2();
+
+ed86 # DB ED
+ illegal_2();
+
+ed87 # DB ED
+ illegal_2();
+
+ed88 # DB ED
+ illegal_2();
+
+ed89 # DB ED
+ illegal_2();
+
+ed8a # DB ED
+ illegal_2();
+
+ed8b # DB ED
+ illegal_2();
+
+ed8c # DB ED
+ illegal_2();
+
+ed8d # DB ED
+ illegal_2();
+
+ed8e # DB ED
+ illegal_2();
+
+ed8f # DB ED
+ illegal_2();
+
+ed90 # DB ED
+ illegal_2();
+
+ed91 # DB ED
+ illegal_2();
+
+ed92 # DB ED
+ illegal_2();
+
+ed93 # DB ED
+ illegal_2();
+
+ed94 # DB ED
+ illegal_2();
+
+ed95 # DB ED
+ illegal_2();
+
+ed96 # DB ED
+ illegal_2();
+
+ed97 # DB ED
+ illegal_2();
+
+ed98 # DB ED
+ illegal_2();
+
+ed99 # DB ED
+ illegal_2();
+
+ed9a # DB ED
+ illegal_2();
+
+ed9b # DB ED
+ illegal_2();
+
+ed9c # DB ED
+ illegal_2();
+
+ed9d # DB ED
+ illegal_2();
+
+ed9e # DB ED
+ illegal_2();
+
+ed9f # DB ED
+ illegal_2();
+
+eda0 # LDI
+ @ldi
+
+eda1 # CPI
+ @cpi
+
+eda2 # INI
+ @ini
+
+eda3 # OUTI
+ @outi
+
+eda4 # DB ED
+ illegal_2();
+
+eda5 # DB ED
+ illegal_2();
+
+eda6 # DB ED
+ illegal_2();
+
+eda7 # DB ED
+ illegal_2();
+
+eda8 # LDD
+ @ldd
+
+eda9 # CPD
+ @cpd
+
+edaa # IND
+ @ind
+
+edab # OUTD
+ @outd
+
+edac # DB ED
+ illegal_2();
+
+edad # DB ED
+ illegal_2();
+
+edae # DB ED
+ illegal_2();
+
+edaf # DB ED
+ illegal_2();
+
+edb0 # LDIR
+ @ldir
+
+edb1 # CPIR
+ @cpir
+
+edb2 # INIR
+ @inir
+
+edb3 # OTIR
+ @otir
+
+edb4 # DB ED
+ illegal_2();
+
+edb5 # DB ED
+ illegal_2();
+
+edb6 # DB ED
+ illegal_2();
+
+edb7 # DB ED
+ illegal_2();
+
+edb8 # LDDR
+ @lddr
+
+edb9 # CPDR
+ @cpdr
+
+edba # INDR
+ @indr
+
+edbb # OTDR
+ @otdr
+
+edbc # DB ED
+ illegal_2();
+
+edbd # DB ED
+ illegal_2();
+
+edbe # DB ED
+ illegal_2();
+
+edbf # DB ED
+ illegal_2();
+
+edc0 # DB ED
+ illegal_2();
+
+edc1 # DB ED
+ illegal_2();
+
+edc2 # DB ED
+ illegal_2();
+
+edc3 # DB ED
+ illegal_2();
+
+edc4 # DB ED
+ illegal_2();
+
+edc5 # DB ED
+ illegal_2();
+
+edc6 # DB ED
+ illegal_2();
+
+edc7 # DB ED
+ illegal_2();
+
+edc8 # DB ED
+ illegal_2();
+
+edc9 # DB ED
+ illegal_2();
+
+edca # DB ED
+ illegal_2();
+
+edcb # DB ED
+ illegal_2();
+
+edcc # DB ED
+ illegal_2();
+
+edcd # DB ED
+ illegal_2();
+
+edce # DB ED
+ illegal_2();
+
+edcf # DB ED
+ illegal_2();
+
+edd0 # DB ED
+ illegal_2();
+
+edd1 # DB ED
+ illegal_2();
+
+edd2 # DB ED
+ illegal_2();
+
+edd3 # DB ED
+ illegal_2();
+
+edd4 # DB ED
+ illegal_2();
+
+edd5 # DB ED
+ illegal_2();
+
+edd6 # DB ED
+ illegal_2();
+
+edd7 # DB ED
+ illegal_2();
+
+edd8 # DB ED
+ illegal_2();
+
+edd9 # DB ED
+ illegal_2();
+
+edda # DB ED
+ illegal_2();
+
+eddb # DB ED
+ illegal_2();
+
+eddc # DB ED
+ illegal_2();
+
+eddd # DB ED
+ illegal_2();
+
+edde # DB ED
+ illegal_2();
+
+eddf # DB ED
+ illegal_2();
+
+ede0 # DB ED
+ illegal_2();
+
+ede1 # DB ED
+ illegal_2();
+
+ede2 # DB ED
+ illegal_2();
+
+ede3 # DB ED
+ illegal_2();
+
+ede4 # DB ED
+ illegal_2();
+
+ede5 # DB ED
+ illegal_2();
+
+ede6 # DB ED
+ illegal_2();
+
+ede7 # DB ED
+ illegal_2();
+
+ede8 # DB ED
+ illegal_2();
+
+ede9 # DB ED
+ illegal_2();
+
+edea # DB ED
+ illegal_2();
+
+edeb # DB ED
+ illegal_2();
+
+edec # DB ED
+ illegal_2();
+
+eded # DB ED
+ illegal_2();
+
+edee # DB ED
+ illegal_2();
+
+edef # DB ED
+ illegal_2();
+
+edf0 # DB ED
+ illegal_2();
+
+edf1 # DB ED
+ illegal_2();
+
+edf2 # DB ED
+ illegal_2();
+
+edf3 # DB ED
+ illegal_2();
+
+edf4 # DB ED
+ illegal_2();
+
+edf5 # DB ED
+ illegal_2();
+
+edf6 # DB ED
+ illegal_2();
+
+edf7 # DB ED
+ illegal_2();
+
+edf8 # DB ED
+ illegal_2();
+
+edf9 # DB ED
+ illegal_2();
+
+edfa # DB ED
+ illegal_2();
+
+edfb # DB ED
+ illegal_2();
+
+edfc # DB ED
+ illegal_2();
+
+edfd # DB ED
+ illegal_2();
+
+edfe # DB ED
+ illegal_2();
+
+edff # DB ED
+ illegal_2();
+
+
+##########################################################
+# main opcodes
+##########################################################
+0000 # NOP
+
+0001 # LD BC,w
+ @arg16
+ BC = TDAT;
+
+0002 # LD (BC),A
+ TDAT8 = A;
+ @wm BC
+ WZ_L = (BC + 1) & 0xFF;
+ WZ_H = A;
+
+0003 # INC BC
+ @nomreq_ir 2
+ BC++;
+
+0004 # INC B
+ inc(B);
+
+0005 # DEC B
+ dec(B);
+
+0006 # LD B,n
+ @arg
+ B = TDAT8;
+
+0007 # RLCA
+ rlca();
+
+0008 # EX AF,AF'
+ using std::swap;
+ swap(m_af, m_af2);
+
+0009 # ADD HL,BC
+ TDAT = HL;
+ TDAT2 = BC;
+ @add16
+ HL = TDAT;
+
+000a # LD A,(BC)
+ @rm BC
+ A = TDAT8;
+ WZ = BC+1;
+
+000b # DEC BC
+ @nomreq_ir 2
+ BC--;
+
+000c # INC C
+ inc(C);
+
+000d # DEC C
+ dec(C);
+
+000e # LD C,n
+ @arg
+ C = TDAT8;
+
+000f # RRCA
+ rrca();
+
+0010 # DJNZ o
+ @nomreq_ir 1
+ TDAT8 = --B;
+ @jr_cond
+
+0011 # LD DE,w
+ @arg16
+ DE = TDAT;
+
+0012 # LD (DE),A
+ TDAT8 = A;
+ @wm DE
+ WZ_L = (DE + 1) & 0xFF;
+ WZ_H = A;
+
+0013 # INC DE
+ @nomreq_ir 2
+ DE++;
+
+0014 # INC D
+ inc(D);
+
+0015 # DEC D
+ dec(D);
+
+0016 # LD D,n
+ @arg
+ D = TDAT8;
+
+0017 # RLA
+ rla();
+
+0018 # JR o
+ @jr
+
+0019 # ADD HL,DE
+ TDAT = HL;
+ TDAT2 = DE;
+ @add16
+ HL = TDAT;
+
+001a # LD A,(DE)
+ @rm DE
+ A = TDAT8;
+ WZ = DE + 1;
+
+001b # DEC DE
+ @nomreq_ir 2
+ DE--;
+
+001c # INC E
+ inc(E);
+
+001d # DEC E
+ dec(E);
+
+001e # LD E,n
+ @arg
+ E = TDAT8;
+
+001f # RRA
+ rra();
+
+0020 # JR NZ,o
+ TDAT8 = !(F & ZF);
+ @jr_cond
+
+0021 # LD HL,w
+ @arg16
+ HL = TDAT;
+
+0022 # LD (w),HL
+ @arg16
+ m_ea = TDAT;
+ TDAT = HL;
+ @wm16 m_ea
+ WZ = m_ea + 1;
+
+0023 # INC HL
+ @nomreq_ir 2
+ HL++;
+
+0024 # INC H
+ inc(H);
+
+0025 # DEC H
+ dec(H);
+
+0026 # LD H,n
+ @arg
+ H = TDAT8;
+
+0027 # DAA
+ daa();
+
+0028 # JR Z,o
+ TDAT8 = F & ZF;
+ @jr_cond
+
+0029 # ADD HL,HL
+ TDAT = HL;
+ TDAT2 = HL;
+ @add16
+ HL = TDAT;
+
+002a # LD HL,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm16 m_ea
+ HL = TDAT;
+ WZ = m_ea + 1;
+
+002b # DEC HL
+ @nomreq_ir 2
+ HL--;
+
+002c # INC L
+ inc(L);
+
+002d # DEC L
+ dec(L);
+
+002e # LD L,n
+ @arg
+ L = TDAT8;
+
+002f # CPL
+ A ^= 0xff;
+ set_f((F & (SF | ZF | PF | CF)) | HF | NF | (A & (YF | XF)));
+
+0030 # JR NC,o
+ TDAT8 = !(F & CF);
+ @jr_cond
+
+0031 # LD SP,w
+ @arg16
+ SP = TDAT;
+
+0032 # LD (w),A
+ @arg16
+ m_ea = TDAT;
+ TDAT8 = A;
+ @wm m_ea
+ WZ_L = (m_ea + 1) & 0xFF;
+ WZ_H = A;
+
+0033 # INC SP
+ @nomreq_ir 2
+ SP++;
+
+0034 # INC (HL)
+ @rm_reg HL
+ inc(TDAT8);
+ @wm HL
+
+0035 # DEC (HL)
+ @rm_reg HL
+ dec(TDAT8);
+ @wm HL
+
+0036 # LD (HL),n
+ @arg
+ @wm HL
+
+0037 # SCF
+ set_f((F & (SF | ZF | PF)) | CF | (((F & Q) | A) & (YF | XF)));
+
+0038 # JR C,o
+ TDAT8 = F & CF;
+ @jr_cond
+
+0039 # ADD HL,SP
+ TDAT = HL;
+ TDAT2 = SP;
+ @add16
+ HL = TDAT;
+
+003a # LD A,(w)
+ @arg16
+ m_ea = TDAT;
+ @rm m_ea
+ A = TDAT8;
+ WZ = m_ea + 1;
+
+003b # DEC SP
+ @nomreq_ir 2
+ SP--;
+
+003c # INC A
+ inc(A);
+
+003d # DEC A
+ dec(A);
+
+003e # LD A,n
+ @arg
+ A = TDAT8;
+
+003f # CCF
+ set_f(((F & (SF | ZF | PF | CF)) ^ CF) | ((F & CF) << 4) | (((F & Q) | A) & (YF | XF)));
+
+0040 # LD B,B
+
+0041 # LD B,C
+ B = C;
+
+0042 # LD B,D
+ B = D;
+
+0043 # LD B,E
+ B = E;
+
+0044 # LD B,H
+ B = H;
+
+0045 # LD B,L
+ B = L;
+
+0046 # LD B,(HL)
+ @rm HL
+ B = TDAT8;
+
+0047 # LD B,A
+ B = A;
+
+0048 # LD C,B
+ C = B;
+
+0049 # LD C,C
+
+004a # LD C,D
+ C = D;
+
+004b # LD C,E
+ C = E;
+
+004c # LD C,H
+ C = H;
+
+004d # LD C,L
+ C = L;
+
+004e # LD C,(HL)
+ @rm HL
+ C = TDAT8;
+
+004f # LD C,A
+ C = A;
+
+0050 # LD D,B
+ D = B;
+
+0051 # LD D,C
+ D = C;
+
+0052 # LD D,D
+
+0053 # LD D,E
+ D = E;
+
+0054 # LD D,H
+ D = H;
+
+0055 # LD D,L
+ D = L;
+
+0056 # LD D,(HL)
+ @rm HL
+ D = TDAT8;
+
+0057 # LD D,A
+ D = A;
+
+0058 # LD E,B
+ E = B;
+
+0059 # LD E,C
+ E = C;
+
+005a # LD E,D
+ E = D;
+
+005b # LD E,E
+
+005c # LD E,H
+ E = H;
+
+005d # LD E,L
+ E = L;
+
+005e # LD E,(HL)
+ @rm HL
+ E = TDAT8;
+
+005f # LD E,A
+ E = A;
+
+0060 # LD H,B
+ H = B;
+
+0061 # LD H,C
+ H = C;
+
+0062 # LD H,D
+ H = D;
+
+0063 # LD H,E
+ H = E;
+
+0064 # LD H,H
+
+0065 # LD H,L
+ H = L;
+
+0066 # LD H,(HL)
+ @rm HL
+ H = TDAT8;
+
+0067 # LD H,A
+ H = A;
+
+0068 # LD L,B
+ L = B;
+
+0069 # LD L,C
+ L = C;
+
+006a # LD L,D
+ L = D;
+
+006b # LD L,E
+ L = E;
+
+006c # LD L,H
+ L = H;
+
+006d # LD L,L
+
+006e # LD L,(HL)
+ @rm HL
+ L = TDAT8;
+
+006f # LD L,A
+ L = A;
+
+0070 # LD (HL),B
+ TDAT = B;
+ @wm HL
+
+0071 # LD (HL),C
+ TDAT = C;
+ @wm HL
+
+0072 # LD (HL),D
+ TDAT = D;
+ @wm HL
+
+0073 # LD (HL),E
+ TDAT = E;
+ @wm HL
+
+0074 # LD (HL),H
+ TDAT = H;
+ @wm HL
+
+0075 # LD (HL),L
+ TDAT = L;
+ @wm HL
+
+0076 # HALT
+ halt();
+
+0077 # LD (HL),A
+ TDAT = A;
+ @wm HL
+
+0078 # LD A,B
+ A = B;
+
+0079 # LD A,C
+ A = C;
+
+007a # LD A,D
+ A = D;
+
+007b # LD A,E
+ A = E;
+
+007c # LD A,H
+ A = H;
+
+007d # LD A,L
+ A = L;
+
+007e # LD A,(HL)
+ @rm HL
+ A = TDAT8;
+
+007f # LD A,A
+
+0080 # ADD A,B
+ add_a(B);
+
+0081 # ADD A,C
+ add_a(C);
+
+0082 # ADD A,D
+ add_a(D);
+
+0083 # ADD A,E
+ add_a(E);
+
+0084 # ADD A,H
+ add_a(H);
+
+0085 # ADD A,L
+ add_a(L);
+
+0086 # ADD A,(HL)
+ @rm HL
+ add_a(TDAT8);
+
+0087 # ADD A,A
+ add_a(A);
+
+0088 # ADC A,B
+ adc_a(B);
+
+0089 # ADC A,C
+ adc_a(C);
+
+008a # ADC A,D
+ adc_a(D);
+
+008b # ADC A,E
+ adc_a(E);
+
+008c # ADC A,H
+ adc_a(H);
+
+008d # ADC A,L
+ adc_a(L);
+
+008e # ADC A,(HL)
+ @rm HL
+ adc_a(TDAT8);
+
+008f # ADC A,A
+ adc_a(A);
+
+0090 # SUB B
+ sub_a(B);
+
+0091 # SUB C
+ sub_a(C);
+
+0092 # SUB D
+ sub_a(D);
+
+0093 # SUB E
+ sub_a(E);
+
+0094 # SUB H
+ sub_a(H);
+
+0095 # SUB L
+ sub_a(L);
+
+0096 # SUB (HL)
+ @rm HL
+ sub_a(TDAT8);
+
+0097 # SUB A
+ sub_a(A);
+
+0098 # SBC A,B
+ sbc_a(B);
+
+0099 # SBC A,C
+ sbc_a(C);
+
+009a # SBC A,D
+ sbc_a(D);
+
+009b # SBC A,E
+ sbc_a(E);
+
+009c # SBC A,H
+ sbc_a(H);
+
+009d # SBC A,L
+ sbc_a(L);
+
+009e # SBC A,(HL)
+ @rm HL
+ sbc_a(TDAT8);
+
+009f # SBC A,A
+ sbc_a(A);
+
+00a0 # AND B
+ and_a(B);
+
+00a1 # AND C
+ and_a(C);
+
+00a2 # AND D
+ and_a(D);
+
+00a3 # AND E
+ and_a(E);
+
+00a4 # AND H
+ and_a(H);
+
+00a5 # AND L
+ and_a(L);
+
+00a6 # AND (HL)
+ @rm HL
+ and_a(TDAT8);
+
+00a7 # AND A
+ and_a(A);
+
+00a8 # XOR B
+ xor_a(B);
+
+00a9 # XOR C
+ xor_a(C);
+
+00aa # XOR D
+ xor_a(D);
+
+00ab # XOR E
+ xor_a(E);
+
+00ac # XOR H
+ xor_a(H);
+
+00ad # XOR L
+ xor_a(L);
+
+00ae # XOR (HL)
+ @rm HL
+ xor_a(TDAT8);
+
+00af # XOR A
+ xor_a(A);
+
+00b0 # OR B
+ or_a(B);
+
+00b1 # OR C
+ or_a(C);
+
+00b2 # OR D
+ or_a(D);
+
+00b3 # OR E
+ or_a(E);
+
+00b4 # OR H
+ or_a(H);
+
+00b5 # OR L
+ or_a(L);
+
+00b6 # OR (HL)
+ @rm HL
+ or_a(TDAT8);
+
+00b7 # OR A
+ or_a(A);
+
+00b8 # CP B
+ cp(B);
+
+00b9 # CP C
+ cp(C);
+
+00ba # CP D
+ cp(D);
+
+00bb # CP E
+ cp(E);
+
+00bc # CP H
+ cp(H);
+
+00bd # CP L
+ cp(L);
+
+00be # CP (HL)
+ @rm HL
+ cp(TDAT8);
+
+00bf # CP A
+ cp(A);
+
+00c0 # RET NZ
+ TDAT8 = !(F & ZF);
+ @ret_cond
+
+00c1 # POP BC
+ @pop
+ BC = TDAT;
+
+00c2 # JP NZ,a
+ TDAT8 = !(F & ZF);
+ @jp_cond
+
+00c3 # JP a
+ @jp
+
+00c4 # CALL NZ,a
+ TDAT8 = !(F & ZF);
+ @call_cond
+
+00c5 # PUSH BC
+ @push BC
+
+00c6 # ADD A,n
+ @arg
+ add_a(TDAT8);
+
+00c7 # RST 0
+ @rst 0x00
+
+00c8 # RET Z
+ TDAT8 = (F & ZF);
+ @ret_cond
+
+00c9 # RET
+ @pop
+ PC = TDAT;
+ WZ = PC;
+
+00ca # JP Z,a
+ TDAT8 = F & ZF;
+ @jp_cond
+
+00cb # **** CB xx
+ @rop
+ @jump_prefixed 0xcb
+
+00cc # CALL Z,a
+ TDAT8 = F & ZF;
+ @call_cond
+
+00cd # CALL a
+ @arg16_call
+
+00ce # ADC A,n
+ @arg
+ adc_a(TDAT8);
+
+00cf # RST 1
+ @rst 0x08
+
+00d0 # RET NC
+ TDAT8 = !(F & CF);
+ @ret_cond
+
+00d1 # POP DE
+ @pop
+ DE = TDAT;
+
+00d2 # JP NC,a
+ TDAT8 = !(F & CF);
+ @jp_cond
+
+00d3 # OUT (n),A
+ @arg
+ TDAT2 = TDAT8 | (A << 8);
+ TDAT = A;
+ @out TDAT2
+ WZ_L = ((TDAT2 & 0xff) + 1) & 0xff;
+ WZ_H = A;
+
+00d4 # CALL NC,a
+ TDAT8 = !(F & CF);
+ @call_cond
+
+00d5 # PUSH DE
+ @push DE
+
+00d6 # SUB n
+ @arg
+ sub_a(TDAT8);
+
+00d7 # RST 2
+ @rst 0x10
+
+00d8 # RET C
+ TDAT8 = (F & CF);
+ @ret_cond
+
+00d9 # EXX
+ exx();
+
+00da # JP C,a
+ TDAT8 = F & CF;
+ @jp_cond
+
+00db # IN A,(n)
+ @arg
+ TDAT2 = TDAT8 | (A << 8);
+ @in TDAT2
+ A = TDAT8;
+ WZ = TDAT2 + 1;
+
+00dc # CALL C,a
+ TDAT8 = F & CF;
+ @call_cond
+
+00dd # **** DD xx
+ @rop
+ @jump_prefixed 0xdd
+
+00de # SBC A,n
+ @arg
+ sbc_a(TDAT8);
+
+00df # RST 3
+ @rst 0x18
+
+00e0 # RET PO
+ TDAT8 = !(F & PF);
+ @ret_cond
+
+00e1 # POP HL
+ @pop
+ HL = TDAT;
+
+00e2 # JP PO,a
+ TDAT8 = !(F & PF);
+ @jp_cond
+
+00e3 # EX HL,(SP)
+ @ex_sp HL
+
+00e4 # CALL PO,a
+ TDAT8 = !(F & PF);
+ @call_cond
+
+00e5 # PUSH HL
+ @push HL
+
+00e6 # AND n
+ @arg
+ and_a(TDAT8);
+
+00e7 # RST 4
+ @rst 0x20
+
+00e8 # RET PE
+ TDAT8 = (F & PF);
+ @ret_cond
+
+00e9 # JP (HL)
+ PC = HL;
+
+00ea # JP PE,a
+ TDAT8 = F & PF;
+ @jp_cond
+
+00eb # EX DE,HL
+ using std::swap;
+ swap(DE, HL);
+
+00ec # CALL PE,a
+ TDAT8 = F & PF;
+ @call_cond
+
+00ed # **** ED xx
+ @rop
+ @jump_prefixed 0xed
+
+00ee # XOR n
+ @arg
+ xor_a(TDAT8);
+
+00ef # RST 5
+ @rst 0x28
+
+00f0 # RET P
+ TDAT8 = !(F & SF);
+ @ret_cond
+
+00f1 # POP AF
+ @pop
+ AF = TDAT;
+
+00f2 # JP P,a
+ TDAT8 = !(F & SF);
+ @jp_cond
+
+00f3 # DI
+ m_iff1 = m_iff2 = 0;
+
+00f4 # CALL P,a
+ TDAT8 = !(F & SF);
+ @call_cond
+
+00f5 # PUSH AF
+ @push AF
+
+00f6 # OR n
+ @arg
+ or_a(TDAT8);
+
+00f7 # RST 6
+ @rst 0x30
+
+00f8 # RET M
+ TDAT8 = (F & SF);
+ @ret_cond
+
+00f9 # LD SP,HL
+ @nomreq_ir 2
+ SP = HL;
+
+00fa # JP M,a
+ TDAT8 = F & SF;
+ @jp_cond
+
+00fb # EI
+ ei();
+
+00fc # CALL M,a
+ TDAT8 = F & SF;
+ @call_cond
+
+00fd # **** FD xx
+ @rop
+ @jump_prefixed 0xfd
+
+00fe # CP n
+ @arg
+ cp(TDAT8);
+
+00ff # RST 7
+ @rst 0x38
+
+
+
+##########################################################
+# R800
+##########################################################
+
+r800:fe00 # illegal
+ illegal_1();
+
+r800:fe01 # illegal
+ illegal_1();
+
+r800:fe02 # illegal
+ illegal_1();
+
+r800:fe03 # illegal
+ illegal_1();
+
+r800:fe04 # illegal
+ illegal_1();
+
+r800:fe05 # illegal
+ illegal_1();
+
+r800:fe07 # illegal
+ illegal_1();
+
+r800:fe08 # illegal
+ illegal_1();
+
+r800:fe09 # illegal
+ illegal_1();
+
+r800:fe0a # illegal
+ illegal_1();
+
+r800:fe0b # illegal
+ illegal_1();
+
+r800:fe0c # illegal
+ illegal_1();
+
+r800:fe0d # illegal
+ illegal_1();
+
+r800:fe0f # illegal
+ illegal_1();
+
+r800:fe10 # illegal
+ illegal_1();
+
+r800:fe11 # illegal
+ illegal_1();
+
+r800:fe12 # illegal
+ illegal_1();
+
+r800:fe13 # illegal
+ illegal_1();
+
+r800:fe14 # illegal
+ illegal_1();
+
+r800:fe15 # illegal
+ illegal_1();
+
+r800:fe17 # illegal
+ illegal_1();
+
+r800:fe18 # illegal
+ illegal_1();
+
+r800:fe19 # illegal
+ illegal_1();
+
+r800:fe1a # illegal
+ illegal_1();
+
+r800:fe1b # illegal
+ illegal_1();
+
+r800:fe1c # illegal
+ illegal_1();
+
+r800:fe1d # illegal
+ illegal_1();
+
+r800:fe1f # illegal
+ illegal_1();
+
+r800:fe20 # illegal
+ illegal_1();
+
+r800:fe21 # illegal
+ illegal_1();
+
+r800:fe22 # illegal
+ illegal_1();
+
+r800:fe23 # illegal
+ illegal_1();
+
+r800:fe24 # illegal
+ illegal_1();
+
+r800:fe25 # illegal
+ illegal_1();
+
+r800:fe27 # illegal
+ illegal_1();
+
+r800:fe28 # illegal
+ illegal_1();
+
+r800:fe29 # illegal
+ illegal_1();
+
+r800:fe2a # illegal
+ illegal_1();
+
+r800:fe2b # illegal
+ illegal_1();
+
+r800:fe2c # illegal
+ illegal_1();
+
+r800:fe2d # illegal
+ illegal_1();
+
+r800:fe2f # illegal
+ illegal_1();
+
+r800:fe30 # illegal
+ illegal_1();
+
+r800:fe31 # illegal
+ illegal_1();
+
+r800:fe32 # illegal
+ illegal_1();
+
+r800:fe33 # illegal
+ illegal_1();
+
+r800:fe34 # illegal
+ illegal_1();
+
+r800:fe35 # illegal
+ illegal_1();
+
+r800:fe37 # illegal
+ illegal_1();
+
+r800:fe38 # illegal
+ illegal_1();
+
+r800:fe39 # illegal
+ illegal_1();
+
+r800:fe3a # illegal
+ illegal_1();
+
+r800:fe3b # illegal
+ illegal_1();
+
+r800:fe3c # illegal
+ illegal_1();
+
+r800:fe3d # illegal
+ illegal_1();
+
+r800:fe3f # illegal
+ illegal_1();
+
+r800:fe40 # illegal
+ illegal_1();
+
+r800:fe41 # illegal
+ illegal_1();
+
+r800:fe42 # illegal
+ illegal_1();
+
+r800:fe43 # illegal
+ illegal_1();
+
+r800:fe44 # illegal
+ illegal_1();
+
+r800:fe45 # illegal
+ illegal_1();
+
+r800:fe47 # illegal
+ illegal_1();
+
+r800:fe48 # illegal
+ illegal_1();
+
+r800:fe49 # illegal
+ illegal_1();
+
+r800:fe4a # illegal
+ illegal_1();
+
+r800:fe4b # illegal
+ illegal_1();
+
+r800:fe4c # illegal
+ illegal_1();
+
+r800:fe4d # illegal
+ illegal_1();
+
+r800:fe4f # illegal
+ illegal_1();
+
+r800:fe50 # illegal
+ illegal_1();
+
+r800:fe51 # illegal
+ illegal_1();
+
+r800:fe52 # illegal
+ illegal_1();
+
+r800:fe53 # illegal
+ illegal_1();
+
+r800:fe54 # illegal
+ illegal_1();
+
+r800:fe55 # illegal
+ illegal_1();
+
+r800:fe57 # illegal
+ illegal_1();
+
+r800:fe58 # illegal
+ illegal_1();
+
+r800:fe59 # illegal
+ illegal_1();
+
+r800:fe5a # illegal
+ illegal_1();
+
+r800:fe5b # illegal
+ illegal_1();
+
+r800:fe5c # illegal
+ illegal_1();
+
+r800:fe5d # illegal
+ illegal_1();
+
+r800:fe5f # illegal
+ illegal_1();
+
+r800:fe60 # illegal
+ illegal_1();
+
+r800:fe61 # illegal
+ illegal_1();
+
+r800:fe62 # illegal
+ illegal_1();
+
+r800:fe63 # illegal
+ illegal_1();
+
+r800:fe64 # illegal
+ illegal_1();
+
+r800:fe65 # illegal
+ illegal_1();
+
+r800:fe67 # illegal
+ illegal_1();
+
+r800:fe68 # illegal
+ illegal_1();
+
+r800:fe69 # illegal
+ illegal_1();
+
+r800:fe6a # illegal
+ illegal_1();
+
+r800:fe6b # illegal
+ illegal_1();
+
+r800:fe6c # illegal
+ illegal_1();
+
+r800:fe6d # illegal
+ illegal_1();
+
+r800:fe6f # illegal
+ illegal_1();
+
+r800:fe70 # illegal
+ illegal_1();
+
+r800:fe71 # illegal
+ illegal_1();
+
+r800:fe72 # illegal
+ illegal_1();
+
+r800:fe73 # illegal
+ illegal_1();
+
+r800:fe74 # illegal
+ illegal_1();
+
+r800:fe75 # illegal
+ illegal_1();
+
+r800:fe77 # illegal
+ illegal_1();
+
+r800:fe78 # illegal
+ illegal_1();
+
+r800:fe79 # illegal
+ illegal_1();
+
+r800:fe7a # illegal
+ illegal_1();
+
+r800:fe7b # illegal
+ illegal_1();
+
+r800:fe7c # illegal
+ illegal_1();
+
+r800:fe7d # illegal
+ illegal_1();
+
+r800:fe7f # illegal
+ illegal_1();
+
+r800:fe80 # illegal
+ illegal_1();
+
+r800:fe81 # illegal
+ illegal_1();
+
+r800:fe82 # illegal
+ illegal_1();
+
+r800:fe83 # illegal
+ illegal_1();
+
+r800:fe84 # illegal
+ illegal_1();
+
+r800:fe85 # illegal
+ illegal_1();
+
+r800:fe87 # illegal
+ illegal_1();
+
+r800:fe88 # illegal
+ illegal_1();
+
+r800:fe89 # illegal
+ illegal_1();
+
+r800:fe8a # illegal
+ illegal_1();
+
+r800:fe8b # illegal
+ illegal_1();
+
+r800:fe8c # illegal
+ illegal_1();
+
+r800:fe8d # illegal
+ illegal_1();
+
+r800:fe8f # illegal
+ illegal_1();
+
+r800:fe90 # illegal
+ illegal_1();
+
+r800:fe91 # illegal
+ illegal_1();
+
+r800:fe92 # illegal
+ illegal_1();
+
+r800:fe93 # illegal
+ illegal_1();
+
+r800:fe94 # illegal
+ illegal_1();
+
+r800:fe95 # illegal
+ illegal_1();
+
+r800:fe97 # illegal
+ illegal_1();
+
+r800:fe98 # illegal
+ illegal_1();
+
+r800:fe99 # illegal
+ illegal_1();
+
+r800:fe9a # illegal
+ illegal_1();
+
+r800:fe9b # illegal
+ illegal_1();
+
+r800:fe9c # illegal
+ illegal_1();
+
+r800:fe9d # illegal
+ illegal_1();
+
+r800:fe9f # illegal
+ illegal_1();
+
+r800:fea0 # illegal
+ illegal_1();
+
+r800:fea1 # illegal
+ illegal_1();
+
+r800:fea2 # illegal
+ illegal_1();
+
+r800:fea3 # illegal
+ illegal_1();
+
+r800:fea4 # illegal
+ illegal_1();
+
+r800:fea5 # illegal
+ illegal_1();
+
+r800:fea7 # illegal
+ illegal_1();
+
+r800:fea8 # illegal
+ illegal_1();
+
+r800:fea9 # illegal
+ illegal_1();
+
+r800:feaa # illegal
+ illegal_1();
+
+r800:feab # illegal
+ illegal_1();
+
+r800:feac # illegal
+ illegal_1();
+
+r800:fead # illegal
+ illegal_1();
+
+r800:feaf # illegal
+ illegal_1();
+
+r800:feb0 # illegal
+ illegal_1();
+
+r800:feb1 # illegal
+ illegal_1();
+
+r800:feb2 # illegal
+ illegal_1();
+
+r800:feb3 # illegal
+ illegal_1();
+
+r800:feb4 # illegal
+ illegal_1();
+
+r800:feb5 # illegal
+ illegal_1();
+
+r800:feb7 # illegal
+ illegal_1();
+
+r800:feb8 # illegal
+ illegal_1();
+
+r800:feb9 # illegal
+ illegal_1();
+
+r800:feba # illegal
+ illegal_1();
+
+r800:febb # illegal
+ illegal_1();
+
+r800:febc # illegal
+ illegal_1();
+
+r800:febd # illegal
+ illegal_1();
+
+r800:febf # illegal
+ illegal_1();
+
+r800:fec0 # illegal
+ illegal_1();
+
+r800:fec1 # illegal
+ illegal_1();
+
+r800:fec2 # illegal
+ illegal_1();
+
+r800:fec3 # illegal
+ illegal_1();
+
+r800:fec4 # illegal
+ illegal_1();
+
+r800:fec5 # illegal
+ illegal_1();
+
+r800:fec7 # illegal
+ illegal_1();
+
+r800:fec8 # illegal
+ illegal_1();
+
+r800:fec9 # illegal
+ illegal_1();
+
+r800:feca # illegal
+ illegal_1();
+
+r800:fecb # illegal
+ illegal_1();
+
+r800:fecc # illegal
+ illegal_1();
+
+r800:fecd # illegal
+ illegal_1();
+
+r800:fecf # illegal
+ illegal_1();
+
+r800:fed0 # illegal
+ illegal_1();
+
+r800:fed1 # illegal
+ illegal_1();
+
+r800:fed2 # illegal
+ illegal_1();
+
+r800:fed3 # illegal
+ illegal_1();
+
+r800:fed4 # illegal
+ illegal_1();
+
+r800:fed5 # illegal
+ illegal_1();
+
+r800:fed7 # illegal
+ illegal_1();
+
+r800:fed8 # illegal
+ illegal_1();
+
+r800:fed9 # illegal
+ illegal_1();
+
+r800:feda # illegal
+ illegal_1();
+
+r800:fedb # illegal
+ illegal_1();
+
+r800:fedc # illegal
+ illegal_1();
+
+r800:fedd # illegal
+ illegal_1();
+
+r800:fedf # illegal
+ illegal_1();
+
+r800:fee0 # illegal
+ illegal_1();
+
+r800:fee1 # illegal
+ illegal_1();
+
+r800:fee2 # illegal
+ illegal_1();
+
+r800:fee3 # illegal
+ illegal_1();
+
+r800:fee4 # illegal
+ illegal_1();
+
+r800:fee5 # illegal
+ illegal_1();
+
+r800:fee7 # illegal
+ illegal_1();
+
+r800:fee8 # illegal
+ illegal_1();
+
+r800:fee9 # illegal
+ illegal_1();
+
+r800:feea # illegal
+ illegal_1();
+
+r800:feeb # illegal
+ illegal_1();
+
+r800:feec # illegal
+ illegal_1();
+
+r800:feed # illegal
+ illegal_1();
+
+r800:feef # illegal
+ illegal_1();
+
+r800:fef0 # illegal
+ illegal_1();
+
+r800:fef1 # illegal
+ illegal_1();
+
+r800:fef2 # illegal
+ illegal_1();
+
+r800:fef3 # illegal
+ illegal_1();
+
+r800:fef4 # illegal
+ illegal_1();
+
+r800:fef5 # illegal
+ illegal_1();
+
+r800:fef7 # illegal
+ illegal_1();
+
+r800:fef8 # illegal
+ illegal_1();
+
+r800:fef9 # illegal
+ illegal_1();
+
+r800:fefa # illegal
+ illegal_1();
+
+r800:fefb # illegal
+ illegal_1();
+
+r800:fefc # illegal
+ illegal_1();
+
+r800:fefd # illegal
+ illegal_1();
+
+r800:feff # illegal
+ illegal_1();
+
+r800:cb30 # SLL B
+ B = r800_sll(B);
+
+r800:cb31 # SLL C
+ C = r800_sll(C);
+
+r800:cb32 # SLL D
+ D = r800_sll(D);
+
+r800:cb33 # SLL E
+ E = r800_sll(E);
+
+r800:cb34 # SLL H
+ H = r800_sll(H);
+
+r800:cb35 # SLL L
+ L = r800_sll(L);
+
+r800:cb36 # SLL (HL)
+ @rm_reg HL
+ TDAT8 = r800_sll(TDAT8);
+ @wm HL
+
+r800:cb37 # SLL A
+ A = r800_sll(A);
+
+r800:dd00 # illegal
+ illegal_1();
+
+r800:dd01 # illegal
+ illegal_1();
+
+r800:dd02 # illegal
+ illegal_1();
+
+r800:dd03 # illegal
+ illegal_1();
+
+r800:dd04 # illegal
+ illegal_1();
+
+r800:dd05 # illegal
+ illegal_1();
+
+r800:dd06 # illegal
+ illegal_1();
+
+r800:dd07 # illegal
+ illegal_1();
+
+r800:dd08 # illegal
+ illegal_1();
+
+r800:dd0a # illegal
+ illegal_1();
+
+r800:dd0b # illegal
+ illegal_1();
+
+r800:dd0c # illegal
+ illegal_1();
+
+r800:dd0d # illegal
+ illegal_1();
+
+r800:dd0e # illegal
+ illegal_1();
+
+r800:dd0f # illegal
+ illegal_1();
+
+r800:dd10 # illegal
+ illegal_1();
+
+r800:dd11 # illegal
+ illegal_1();
+
+r800:dd12 # illegal
+ illegal_1();
+
+r800:dd13 # illegal
+ illegal_1();
+
+r800:dd14 # illegal
+ illegal_1();
+
+r800:dd15 # illegal
+ illegal_1();
+
+r800:dd16 # illegal
+ illegal_1();
+
+r800:dd17 # illegal
+ illegal_1();
+
+r800:dd18 # illegal
+ illegal_1();
+
+r800:dd1a # illegal
+ illegal_1();
+
+r800:dd1b # illegal
+ illegal_1();
+
+r800:dd1c # illegal
+ illegal_1();
+
+r800:dd1d # illegal
+ illegal_1();
+
+r800:dd1e # illegal
+ illegal_1();
+
+r800:dd1f # illegal
+ illegal_1();
+
+r800:dd20 # illegal
+ illegal_1();
+
+r800:dd27 # illegal
+ illegal_1();
+
+r800:dd28 # illegal
+ illegal_1();
+
+r800:dd2f # illegal
+ illegal_1();
+
+r800:dd30 # illegal
+ illegal_1();
+
+r800:dd31 # illegal
+ illegal_1();
+
+r800:dd32 # illegal
+ illegal_1();
+
+r800:dd33 # illegal
+ illegal_1();
+
+r800:dd37 # illegal
+ illegal_1();
+
+r800:dd38 # illegal
+ illegal_1();
+
+r800:dd3a # illegal
+ illegal_1();
+
+r800:dd3b # illegal
+ illegal_1();
+
+r800:dd3c # illegal
+ illegal_1();
+
+r800:dd3d # illegal
+ illegal_1();
+
+r800:dd3e # illegal
+ illegal_1();
+
+r800:dd3f # illegal
+ illegal_1();
+
+r800:dd40 # illegal
+ illegal_1();
+
+r800:dd41 # illegal
+ illegal_1();
+
+r800:dd42 # illegal
+ illegal_1();
+
+r800:dd43 # illegal
+ illegal_1();
+
+r800:dd47 # illegal
+ illegal_1();
+
+r800:dd48 # illegal
+ illegal_1();
+
+r800:dd49 # illegal
+ illegal_1();
+
+r800:dd4a # illegal
+ illegal_1();
+
+r800:dd4b # illegal
+ illegal_1();
+
+r800:dd4f # illegal
+ illegal_1();
+
+r800:dd50 # illegal
+ illegal_1();
+
+r800:dd51 # illegal
+ illegal_1();
+
+r800:dd52 # illegal
+ illegal_1();
+
+r800:dd53 # illegal
+ illegal_1();
+
+r800:dd57 # illegal
+ illegal_1();
+
+r800:dd58 # illegal
+ illegal_1();
+
+r800:dd59 # illegal
+ illegal_1();
+
+r800:dd5a # illegal
+ illegal_1();
+
+r800:dd5b # illegal
+ illegal_1();
+
+r800:dd5f # illegal
+ illegal_1();
+
+r800:dd76 # illegal
+ illegal_1();
+
+r800:dd78 # illegal
+ illegal_1();
+
+r800:dd79 # illegal
+ illegal_1();
+
+r800:dd7a # illegal
+ illegal_1();
+
+r800:dd7b # illegal
+ illegal_1();
+
+r800:dd7f # illegal
+ illegal_1();
+
+r800:dd80 # illegal
+ illegal_1();
+
+r800:dd81 # illegal
+ illegal_1();
+
+r800:dd82 # illegal
+ illegal_1();
+
+r800:dd83 # illegal
+ illegal_1();
+
+r800:dd87 # illegal
+ illegal_1();
+
+r800:dd88 # illegal
+ illegal_1();
+
+r800:dd89 # illegal
+ illegal_1();
+
+r800:dd8a # illegal
+ illegal_1();
+
+r800:dd8b # illegal
+ illegal_1();
+
+r800:dd8f # illegal
+ illegal_1();
+
+r800:dd90 # illegal
+ illegal_1();
+
+r800:dd91 # illegal
+ illegal_1();
+
+r800:dd92 # illegal
+ illegal_1();
+
+r800:dd93 # illegal
+ illegal_1();
+
+r800:dd97 # illegal
+ illegal_1();
+
+r800:dd98 # illegal
+ illegal_1();
+
+r800:dd99 # illegal
+ illegal_1();
+
+r800:dd9a # illegal
+ illegal_1();
+
+r800:dd9b # illegal
+ illegal_1();
+
+r800:dd9f # illegal
+ illegal_1();
+
+r800:dda0 # illegal
+ illegal_1();
+
+r800:dda1 # illegal
+ illegal_1();
+
+r800:dda2 # illegal
+ illegal_1();
+
+r800:dda3 # illegal
+ illegal_1();
+
+r800:dda7 # illegal
+ illegal_1();
+
+r800:dda8 # illegal
+ illegal_1();
+
+r800:dda9 # illegal
+ illegal_1();
+
+r800:ddaa # illegal
+ illegal_1();
+
+r800:ddab # illegal
+ illegal_1();
+
+r800:ddaf # illegal
+ illegal_1();
+
+r800:ddb0 # illegal
+ illegal_1();
+
+r800:ddb1 # illegal
+ illegal_1();
+
+r800:ddb2 # illegal
+ illegal_1();
+
+r800:ddb3 # illegal
+ illegal_1();
+
+r800:ddb7 # illegal
+ illegal_1();
+
+r800:ddb8 # illegal
+ illegal_1();
+
+r800:ddb9 # illegal
+ illegal_1();
+
+r800:ddba # illegal
+ illegal_1();
+
+r800:ddbb # illegal
+ illegal_1();
+
+r800:ddbf # illegal
+ illegal_1();
+
+r800:ddc0 # illegal
+ illegal_1();
+
+r800:ddc1 # illegal
+ illegal_1();
+
+r800:ddc2 # illegal
+ illegal_1();
+
+r800:ddc3 # illegal
+ illegal_1();
+
+r800:ddc4 # illegal
+ illegal_1();
+
+r800:ddc5 # illegal
+ illegal_1();
+
+r800:ddc6 # illegal
+ illegal_1();
+
+r800:ddc7 # illegal
+ illegal_1();
+
+r800:ddc8 # illegal
+ illegal_1();
+
+r800:ddc9 # illegal
+ illegal_1();
+
+r800:ddca # illegal
+ illegal_1();
+
+r800:ddcc # illegal
+ illegal_1();
+
+r800:ddcd # illegal
+ illegal_1();
+
+r800:ddce # illegal
+ illegal_1();
+
+r800:ddcf # illegal
+ illegal_1();
+
+r800:ddd0 # illegal
+ illegal_1();
+
+r800:ddd1 # illegal
+ illegal_1();
+
+r800:ddd2 # illegal
+ illegal_1();
+
+r800:ddd3 # illegal
+ illegal_1();
+
+r800:ddd4 # illegal
+ illegal_1();
+
+r800:ddd5 # illegal
+ illegal_1();
+
+r800:ddd6 # illegal
+ illegal_1();
+
+r800:ddd7 # illegal
+ illegal_1();
+
+r800:ddd8 # illegal
+ illegal_1();
+
+r800:ddd9 # illegal
+ illegal_1();
+
+r800:ddda # illegal
+ illegal_1();
+
+r800:dddb # illegal
+ illegal_1();
+
+r800:dddc # illegal
+ illegal_1();
+
+r800:dddd # illegal
+ illegal_1();
+
+r800:ddde # illegal
+ illegal_1();
+
+r800:dddf # illegal
+ illegal_1();
+
+r800:dde0 # illegal
+ illegal_1();
+
+r800:dde2 # illegal
+ illegal_1();
+
+r800:dde4 # illegal
+ illegal_1();
+
+r800:dde6 # illegal
+ illegal_1();
+
+r800:dde7 # illegal
+ illegal_1();
+
+r800:dde8 # illegal
+ illegal_1();
+
+r800:ddea # illegal
+ illegal_1();
+
+r800:ddeb # illegal
+ illegal_1();
+
+r800:ddec # illegal
+ illegal_1();
+
+r800:dded # illegal
+ illegal_1();
+
+r800:ddee # illegal
+ illegal_1();
+
+r800:ddef # illegal
+ illegal_1();
+
+r800:ddf0 # illegal
+ illegal_1();
+
+r800:ddf1 # illegal
+ illegal_1();
+
+r800:ddf2 # illegal
+ illegal_1();
+
+r800:ddf3 # illegal
+ illegal_1();
+
+r800:ddf4 # illegal
+ illegal_1();
+
+r800:ddf5 # illegal
+ illegal_1();
+
+r800:ddf6 # illegal
+ illegal_1();
+
+r800:ddf7 # illegal
+ illegal_1();
+
+r800:ddf8 # illegal
+ illegal_1();
+
+r800:ddfa # illegal
+ illegal_1();
+
+r800:ddfb # illegal
+ illegal_1();
+
+r800:ddfc # illegal
+ illegal_1();
+
+r800:ddfd # illegal
+ illegal_1();
+
+r800:ddfe # illegal
+ illegal_1();
+
+r800:ddff # illegal
+ illegal_1();
+
+r800:fd00 # illegal
+ illegal_1();
+
+r800:fd01 # illegal
+ illegal_1();
+
+r800:fd02 # illegal
+ illegal_1();
+
+r800:fd03 # illegal
+ illegal_1();
+
+r800:fd04 # illegal
+ illegal_1();
+
+r800:fd05 # illegal
+ illegal_1();
+
+r800:fd06 # illegal
+ illegal_1();
+
+r800:fd07 # illegal
+ illegal_1();
+
+r800:fd08 # illegal
+ illegal_1();
+
+r800:fd0a # illegal
+ illegal_1();
+
+r800:fd0b # illegal
+ illegal_1();
+
+r800:fd0c # illegal
+ illegal_1();
+
+r800:fd0d # illegal
+ illegal_1();
+
+r800:fd0e # illegal
+ illegal_1();
+
+r800:fd0f # illegal
+ illegal_1();
+
+r800:fd10 # illegal
+ illegal_1();
+
+r800:fd11 # illegal
+ illegal_1();
+
+r800:fd12 # illegal
+ illegal_1();
+
+r800:fd13 # illegal
+ illegal_1();
+
+r800:fd14 # illegal
+ illegal_1();
+
+r800:fd15 # illegal
+ illegal_1();
+
+r800:fd16 # illegal
+ illegal_1();
+
+r800:fd17 # illegal
+ illegal_1();
+
+r800:fd18 # illegal
+ illegal_1();
+
+r800:fd1a # illegal
+ illegal_1();
+
+r800:fd1b # illegal
+ illegal_1();
+
+r800:fd1c # illegal
+ illegal_1();
+
+r800:fd1d # illegal
+ illegal_1();
+
+r800:fd1e # illegal
+ illegal_1();
+
+r800:fd1f # illegal
+ illegal_1();
+
+r800:fd20 # illegal
+ illegal_1();
+
+r800:fd27 # illegal
+ illegal_1();
+
+r800:fd28 # illegal
+ illegal_1();
+
+r800:fd2f # illegal
+ illegal_1();
+
+r800:fd30 # illegal
+ illegal_1();
+
+r800:fd31 # illegal
+ illegal_1();
+
+r800:fd32 # illegal
+ illegal_1();
+
+r800:fd33 # illegal
+ illegal_1();
+
+r800:fd37 # illegal
+ illegal_1();
+
+r800:fd38 # illegal
+ illegal_1();
+
+r800:fd3a # illegal
+ illegal_1();
+
+r800:fd3b # illegal
+ illegal_1();
+
+r800:fd3c # illegal
+ illegal_1();
+
+r800:fd3d # illegal
+ illegal_1();
+
+r800:fd3e # illegal
+ illegal_1();
+
+r800:fd3f # illegal
+ illegal_1();
+
+r800:fd40 # illegal
+ illegal_1();
+
+r800:fd41 # illegal
+ illegal_1();
+
+r800:fd42 # illegal
+ illegal_1();
+
+r800:fd43 # illegal
+ illegal_1();
+
+r800:fd47 # illegal
+ illegal_1();
+
+r800:fd48 # illegal
+ illegal_1();
+
+r800:fd49 # illegal
+ illegal_1();
+
+r800:fd4a # illegal
+ illegal_1();
+
+r800:fd4b # illegal
+ illegal_1();
+
+r800:fd4f # illegal
+ illegal_1();
+
+r800:fd50 # illegal
+ illegal_1();
+
+r800:fd51 # illegal
+ illegal_1();
+
+r800:fd52 # illegal
+ illegal_1();
+
+r800:fd53 # illegal
+ illegal_1();
+
+r800:fd57 # illegal
+ illegal_1();
+
+r800:fd58 # illegal
+ illegal_1();
+
+r800:fd59 # illegal
+ illegal_1();
+
+r800:fd5a # illegal
+ illegal_1();
+
+r800:fd5b # illegal
+ illegal_1();
+
+r800:fd5f # illegal
+ illegal_1();
+
+r800:fd76 # illegal
+ illegal_1();
+
+r800:fd78 # illegal
+ illegal_1();
+
+r800:fd79 # illegal
+ illegal_1();
+
+r800:fd7a # illegal
+ illegal_1();
+
+r800:fd7b # illegal
+ illegal_1();
+
+r800:fd7f # illegal
+ illegal_1();
+
+r800:fd80 # illegal
+ illegal_1();
+
+r800:fd81 # illegal
+ illegal_1();
+
+r800:fd82 # illegal
+ illegal_1();
+
+r800:fd83 # illegal
+ illegal_1();
+
+r800:fd87 # illegal
+ illegal_1();
+
+r800:fd88 # illegal
+ illegal_1();
+
+r800:fd89 # illegal
+ illegal_1();
+
+r800:fd8a # illegal
+ illegal_1();
+
+r800:fd8b # illegal
+ illegal_1();
+
+r800:fd8f # illegal
+ illegal_1();
+
+r800:fd90 # illegal
+ illegal_1();
+
+r800:fd91 # illegal
+ illegal_1();
+
+r800:fd92 # illegal
+ illegal_1();
+
+r800:fd93 # illegal
+ illegal_1();
+
+r800:fd97 # illegal
+ illegal_1();
+
+r800:fd98 # illegal
+ illegal_1();
+
+r800:fd99 # illegal
+ illegal_1();
+
+r800:fd9a # illegal
+ illegal_1();
+
+r800:fd9b # illegal
+ illegal_1();
+
+r800:fd9f # illegal
+ illegal_1();
+
+r800:fda0 # illegal
+ illegal_1();
+
+r800:fda1 # illegal
+ illegal_1();
+
+r800:fda2 # illegal
+ illegal_1();
+
+r800:fda3 # illegal
+ illegal_1();
+
+r800:fda7 # illegal
+ illegal_1();
+
+r800:fda8 # illegal
+ illegal_1();
+
+r800:fda9 # illegal
+ illegal_1();
+
+r800:fdaa # illegal
+ illegal_1();
+
+r800:fdab # illegal
+ illegal_1();
+
+r800:fdaf # illegal
+ illegal_1();
+
+r800:fdb0 # illegal
+ illegal_1();
+
+r800:fdb1 # illegal
+ illegal_1();
+
+r800:fdb2 # illegal
+ illegal_1();
+
+r800:fdb3 # illegal
+ illegal_1();
+
+r800:fdb7 # illegal
+ illegal_1();
+
+r800:fdb8 # illegal
+ illegal_1();
+
+r800:fdb9 # illegal
+ illegal_1();
+
+r800:fdba # illegal
+ illegal_1();
+
+r800:fdbb # illegal
+ illegal_1();
+
+r800:fdbf # illegal
+ illegal_1();
+
+r800:fdc0 # illegal
+ illegal_1();
+
+r800:fdc1 # illegal
+ illegal_1();
+
+r800:fdc2 # illegal
+ illegal_1();
+
+r800:fdc3 # illegal
+ illegal_1();
+
+r800:fdc4 # illegal
+ illegal_1();
+
+r800:fdc5 # illegal
+ illegal_1();
+
+r800:fdc6 # illegal
+ illegal_1();
+
+r800:fdc7 # illegal
+ illegal_1();
+
+r800:fdc8 # illegal
+ illegal_1();
+
+r800:fdc9 # illegal
+ illegal_1();
+
+r800:fdca # illegal
+ illegal_1();
+
+r800:fdcc # illegal
+ illegal_1();
+
+r800:fdcd # illegal
+ illegal_1();
+
+r800:fdce # illegal
+ illegal_1();
+
+r800:fdcf # illegal
+ illegal_1();
+
+r800:fdd0 # illegal
+ illegal_1();
+
+r800:fdd1 # illegal
+ illegal_1();
+
+r800:fdd2 # illegal
+ illegal_1();
+
+r800:fdd3 # illegal
+ illegal_1();
+
+r800:fdd4 # illegal
+ illegal_1();
+
+r800:fdd5 # illegal
+ illegal_1();
+
+r800:fdd6 # illegal
+ illegal_1();
+
+r800:fdd7 # illegal
+ illegal_1();
+
+r800:fdd8 # illegal
+ illegal_1();
+
+r800:fdd9 # illegal
+ illegal_1();
+
+r800:fdda # illegal
+ illegal_1();
+
+r800:fddb # illegal
+ illegal_1();
+
+r800:fddc # illegal
+ illegal_1();
+
+r800:fddd # illegal
+ illegal_1();
+
+r800:fdde # illegal
+ illegal_1();
+
+r800:fddf # illegal
+ illegal_1();
+
+r800:fde0 # illegal
+ illegal_1();
+
+r800:fde2 # illegal
+ illegal_1();
+
+r800:fde4 # illegal
+ illegal_1();
+
+r800:fde6 # illegal
+ illegal_1();
+
+r800:fde7 # illegal
+ illegal_1();
+
+r800:fde8 # illegal
+ illegal_1();
+
+r800:fdea # illegal
+ illegal_1();
+
+r800:fdeb # illegal
+ illegal_1();
+
+r800:fdec # illegal
+ illegal_1();
+
+r800:fded # illegal
+ illegal_1();
+
+r800:fdee # illegal
+ illegal_1();
+
+r800:fdef # illegal
+ illegal_1();
+
+r800:fdf0 # illegal
+ illegal_1();
+
+r800:fdf1 # illegal
+ illegal_1();
+
+r800:fdf2 # illegal
+ illegal_1();
+
+r800:fdf3 # illegal
+ illegal_1();
+
+r800:fdf4 # illegal
+ illegal_1();
+
+r800:fdf5 # illegal
+ illegal_1();
+
+r800:fdf6 # illegal
+ illegal_1();
+
+r800:fdf7 # illegal
+ illegal_1();
+
+r800:fdf8 # illegal
+ illegal_1();
+
+r800:fdfa # illegal
+ illegal_1();
+
+r800:fdfb # illegal
+ illegal_1();
+
+r800:fdfc # illegal
+ illegal_1();
+
+r800:fdfd # illegal
+ illegal_1();
+
+r800:fdfe # illegal
+ illegal_1();
+
+r800:fdff # illegal
+ illegal_1();
+
+r800:ed46 # IM 0
+ m_im = 0;
+ + 1
+
+r800:ed4c # illegal
+ illegal_2();
+
+r800:ed4e # illegal
+ illegal_2();
+
+r800:ed54 # illegal
+ illegal_2();
+
+r800:ed55 # illegal
+ illegal_2();
+
+r800:ed56 # IM 1
+ m_im = 1;
+ + 1
+
+r800:ed5c # illegal
+ illegal_2();
+
+r800:ed5d # illegal
+ illegal_2();
+
+r800:ed5e # IM 2
+ m_im = 2;
+ + 1
+
+r800:ed64 # illegal
+ illegal_2();
+
+r800:ed65 # illegal
+ illegal_2();
+
+r800:ed66 # illegal
+ illegal_2();
+
+r800:ed6c # illegal
+ illegal_2();
+
+r800:ed6e # IM 0
+ m_im = 0;
+ + 1
+
+# ed70 became legal IN F,(C)
+
+r800:ed71 # illegal
+ illegal_2();
+
+r800:ed74 # illegal
+ illegal_2();
+
+r800:ed75 # illegal
+ illegal_2();
+
+r800:ed76 # illegal
+ illegal_2();
+
+r800:ed7c # illegal
+ illegal_2();
+
+r800:ed7d # illegal
+ illegal_2();
+
+r800:ed7e # illegal
+ illegal_2();
+
+r800:ed7f # illegal
+ illegal_2();
+
+r800:edc1 # MULUB A,B
+ mulub(B);
+ + 12
+
+r800:edc3 # MULUW HL,BC
+ muluw(BC);
+ + 34
+
+r800:edc9 # MULUB A,C
+ mulub(C);
+ + 12
+
+r800:edd1 # MULUB A,D
+ mulub(D);
+ + 12
+
+r800:edd9 # MULUB A,E
+ mulub(E);
+ + 12
+
+r800:ede1 # MULUB A,H (undocumented)
+ mulub(H);
+ + 12
+
+r800:ede9 # MULUB A,L (undocumented)
+ mulub(L);
+ + 12
+
+r800:edf1 # MULUB A,A (undocumented)
+ mulub(A);
+ + 12
+
+r800:edf3 # MULUW HL,SP
+ muluw(SP);
+ + 34
+
+r800:edf9 # MULUB A,A (undocumented)
+ mulub(A);
+ + 12
+
+r800:00f3 # DI
+ m_iff1 = m_iff2 = 0;
+ + 1
+
+
+
+##########################################################
+# Z80N
+##########################################################
+macro ldix
+{
+ @rm HL
+ if (TDAT8 != A) {
+ @wm DE
+ ;
+ }
+ HL++;
+ DE++;
+ BC--;
+}
+
+macro lddx
+{
+ @rm HL
+ if (TDAT8 != A) {
+ @wm DE
+ ;
+ }
+ DE++;
+ HL--;
+ BC--;
+}
+
+z80n:ed23 # swapnib
+ A = (A << 4) | (A >> 4);
+
+z80n:ed24 # mirror a
+ A = bitswap<8>(A, 0, 1, 2, 3, 4, 5, 6, 7);
+
+z80n:ed27 # test *
+ TDAT_H = A;
+ @arg
+ and_a(TDAT8);
+ A = TDAT_H;
+
+z80n:ed28 # bsla de,b
+ DE <<= std::min(B & 31, 16);
+
+z80n:ed29 # bsra de,b
+{
+ const u16 fill = (DE & 0x8000) ? ~u16(0) : u16(0);
+ DE = (DE >> std::min(B & 31, 16)) | (fill << (16 - std::min(B & 31, 16)));
+}
+
+z80n:ed2a # bsrl de,b
+ DE >>= std::min(B & 31, 16);
+
+z80n:ed2b # bsrf de,b
+ DE = (DE >> std::min(B & 31, 16)) | (~u16(0) << (16 - std::min(B & 31, 16)));
+
+z80n:ed2c # brlc de,b
+ DE = (DE << (B & 15)) | (DE >> (16 - (B & 15)));
+
+z80n:ed30 # mul d,e
+ DE = D * E;
+
+z80n:ed31 # add hl,a
+ HL += A;
+
+z80n:ed32 # add de,a
+ DE += A;
+
+z80n:ed33 # add bc,a
+ BC += A;
+
+z80n:ed34 # add hl,**
+ @arg16
+ HL += TDAT;
+
+z80n:ed35 # add de,**
+ @arg16
+ DE += TDAT;
+
+z80n:ed36 # add bc,**
+ @arg16
+ BC += TDAT;
+
+z80n:ed8a # push **
+ @arg
+ TDAT_H = TDAT_L;
+ @arg
+ @push TDAT
+
+z80n:ed90 # outinb
+ @rm HL
+ @out BC
+ HL++;
+
+z80n:ed91 # nextreg *,*
+ @arg16
+ m_out_nextreg_cb(TDAT_L, TDAT_H);
+
+z80n:ed92 # nextreg *,a
+ @arg
+ m_out_nextreg_cb(TDAT8, A);
+
+z80n:ed93 # pixeldn
+ if (0x07 != (H & 0x07))
+ HL = HL + 0x100;
+ else if (0xe0 != (L & 0xe0))
+ HL = (HL & 0xf8ff) + 0x20;
+ else
+ HL = (HL & 0xf81f) + 0x800;
+
+z80n:ed94 # pixelad
+ HL = 0x4000 + ((D & 0xc0) << 5) + ((D & 0x07) << 8) + ((D & 0x38) << 2) + (E >> 3);
+
+z80n:ed95 # setae
+ A = 0x80 >> (E & 7);
+
+z80n:ed98 # jp (c)
+ @in BC
+ PC = (PC & 0xc000) + (TDAT8 << 6);
+
+z80n:eda4 # ldix
+ @ldix
+
+z80n:eda5 # ldws
+ @rm HL
+ @wm DE
+ L++;
+ inc(D);
+
+z80n:edac # lddx
+ @lddx
+
+z80n:edb4 # ldirx
+ @ldix
+ if (BC != 0)
+ PC -= 2;
+
+z80n:edb7 # ldpirx
+ @rm (HL & 0xfff8) + (E & 7)
+ if (TDAT8 != A) {
+ @wm DE
+ ;
+ }
+ DE++;
+ BC--;
+ if (BC != 0)
+ PC -= 2;
+
+z80n:edbc # lddrx
+ @lddx
+ if (BC != 0)
+ PC -= 2;
diff --git a/src/devices/cpu/z80/z80dasm.cpp b/src/devices/cpu/z80/z80dasm.cpp
index 47c1049e98c..fcd358c3c78 100644
--- a/src/devices/cpu/z80/z80dasm.cpp
+++ b/src/devices/cpu/z80/z80dasm.cpp
@@ -2,7 +2,7 @@
// copyright-holders:Juergen Buchmueller
/*****************************************************************************
*
- * z80dasm.c
+ * z80dasm.cpp
* Portable Z80 disassembler
*
*****************************************************************************/
@@ -22,19 +22,31 @@ static const char *const s_mnemonic[] =
"retn","rl" ,"rla" ,"rlc" ,"rlca","rld" ,"rr" ,"rra" ,
"rrc" ,"rrca","rrd" ,"rst" ,"sbc" ,"scf" ,"set" ,"sla" ,
"sll" ,"sra" ,"srl" ,"sub" ,"xor "
+
+ // z80n
+ ,"swap","mirr","test",
+ "bsla","bsra","bsrl","bsrf","brlc","mul" ,"otib","nreg",
+ "pxdn","pxad","stae","ldix","ldws","lddx","lirx","lprx",
+ "ldrx"
};
const u32 z80_disassembler::s_flags[] =
{
0 ,0 ,0 ,0 ,STEP_OVER,0 ,0 ,0 ,
- STEP_COND,0 ,STEP_COND,0 ,0 ,0 ,0 ,0 ,
+ STEP_OVER,0 ,STEP_OVER,0 ,0 ,0 ,0 ,0 ,
STEP_COND,0 ,0 ,0 ,STEP_OVER,0 ,0 ,0 ,
- 0 ,STEP_COND,0 ,STEP_COND,0 ,0 ,0 ,0 ,
- STEP_COND,0 ,STEP_COND,0 ,0 ,0 ,STEP_COND,STEP_COND,
+ 0 ,STEP_OVER,0 ,STEP_OVER,0 ,0 ,0 ,0 ,
+ STEP_OVER,0 ,STEP_OVER,0 ,0 ,0 ,STEP_OVER,STEP_OVER,
0 ,0 ,0 ,0 ,0 ,0 ,STEP_OUT ,STEP_OUT ,
STEP_OUT ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
0 ,0 ,0 ,STEP_OVER,0 ,0 ,0 ,0 ,
0 ,0 ,0 ,0 ,0
+
+ // z80n
+ ,0 ,0 ,0 ,
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ 0 ,0 ,0 ,0 ,0 ,0 ,0 ,0 ,
+ 0
};
const z80_disassembler::z80dasm z80_disassembler::mnemonic_xx_cb[256] =
@@ -215,13 +227,13 @@ const z80_disassembler::z80dasm z80_disassembler::mnemonic_ed[256] =
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDI,nullptr}, {zCPI,nullptr}, {zINI,nullptr}, {zOUTI,nullptr},
+ {zLDI,nullptr}, {zCPI,nullptr}, {zINI,nullptr}, {zOUTI,nullptr},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDD,nullptr}, {zCPD,nullptr}, {zIND,nullptr}, {zOUTD,nullptr},
+ {zLDD,nullptr}, {zCPD,nullptr}, {zIND,nullptr}, {zOUTD,nullptr},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDIR,nullptr}, {zCPIR,nullptr}, {zINIR,nullptr}, {zOTIR,nullptr},
+ {zLDIR,nullptr},{zCPIR,nullptr},{zINIR,nullptr},{zOTIR,nullptr},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
- {zLDDR,nullptr}, {zCPDR,nullptr}, {zINDR,nullptr}, {zOTDR,nullptr},
+ {zLDDR,nullptr},{zCPDR,nullptr},{zINDR,nullptr},{zOTDR,nullptr},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
{zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
@@ -340,7 +352,7 @@ const z80_disassembler::z80dasm z80_disassembler::mnemonic_main[256] =
{zLD,"l,b"}, {zLD,"l,c"}, {zLD,"l,d"}, {zLD,"l,e"},
{zLD,"l,h"}, {zLD,"l,l"}, {zLD,"l,(hl)"}, {zLD,"l,a"},
{zLD,"(hl),b"}, {zLD,"(hl),c"}, {zLD,"(hl),d"}, {zLD,"(hl),e"},
- {zLD,"(hl),h"}, {zLD,"(hl),l"}, {zHLT,nullptr}, {zLD,"(hl),a"},
+ {zLD,"(hl),h"}, {zLD,"(hl),l"}, {zHLT,nullptr}, {zLD,"(hl),a"},
{zLD,"a,b"}, {zLD,"a,c"}, {zLD,"a,d"}, {zLD,"a,e"},
{zLD,"a,h"}, {zLD,"a,l"}, {zLD,"a,(hl)"}, {zLD,"a,a"},
{zADD,"a,b"}, {zADD,"a,c"}, {zADD,"a,d"}, {zADD,"a,e"},
@@ -379,7 +391,7 @@ const z80_disassembler::z80dasm z80_disassembler::mnemonic_main[256] =
char z80_disassembler::sign(s8 offset)
{
- return (offset < 0)? '-':'+';
+ return (offset < 0) ? '-' : '+';
}
u32 z80_disassembler::offs(s8 offset)
@@ -414,7 +426,7 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
d = &mnemonic_cb[op];
break;
case 0xed:
- d = &mnemonic_ed[opcodes.r8(pos++)];
+ d = &get_mnemonic_ed(opcodes.r8(pos++));
if (d->mnemonic == zDB)
pos--;
break;
@@ -422,7 +434,7 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
{
ixy = "ix";
u8 op1 = opcodes.r8(pos++);
- if( op1 == 0xcb )
+ if (op1 == 0xcb)
{
offset = params.r8(pos++);
op1 = params.r8(pos++);
@@ -440,7 +452,7 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
{
ixy = "iy";
u8 op1 = opcodes.r8(pos++);
- if( op1 == 0xcb )
+ if (op1 == 0xcb)
{
offset = params.r8(pos++);
op1 = params.r8(pos++);
@@ -460,15 +472,15 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
}
uint32_t flags = s_flags[d->mnemonic];
- if( d->arguments )
+ if (d->arguments)
{
util::stream_format(stream, "%-4s ", s_mnemonic[d->mnemonic]);
const char *src = d->arguments;
- while( *src )
+ while (*src)
{
- switch( *src )
+ switch (*src)
{
- case '?': /* illegal opcode */
+ case '?': // illegal opcode
util::stream_format(stream, "$%02x", op );
break;
case 'A':
@@ -477,25 +489,25 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
if (src != d->arguments)
flags |= STEP_COND;
break;
- case 'B': /* Byte op arg */
+ case 'B': // Byte op arg
util::stream_format(stream, "$%02X", params.r8(pos++) );
break;
- case 'N': /* Immediate 16 bit */
+ case 'N': // Immediate 16 bit
util::stream_format(stream, "$%04X", params.r16(pos) );
pos += 2;
break;
- case 'O': /* Offset relative to PC */
+ case 'O': // Offset relative to PC
util::stream_format(stream, "$%04X", (pc + s8(params.r8(pos++)) + 2) & 0xffff);
if (src != d->arguments)
flags |= STEP_COND;
break;
- case 'P': /* Port number */
+ case 'P': // Port number
util::stream_format(stream, "$%02X", params.r8(pos++) );
break;
- case 'V': /* Restart vector */
+ case 'V': // Restart vector
util::stream_format(stream, "$%02X", op & 0x38 );
break;
- case 'W': /* Memory address word */
+ case 'W': // Memory address word
util::stream_format(stream, "$%04X", params.r16(pos) );
pos += 2;
break;
@@ -510,6 +522,7 @@ offs_t z80_disassembler::disassemble(std::ostream &stream, offs_t pc, const data
break;
default:
stream << *src;
+ break;
}
src++;
}
diff --git a/src/devices/cpu/z80/z80dasm.h b/src/devices/cpu/z80/z80dasm.h
index 774f4df89a8..5067e7f25e2 100644
--- a/src/devices/cpu/z80/z80dasm.h
+++ b/src/devices/cpu/z80/z80dasm.h
@@ -30,6 +30,7 @@ protected:
enum e_mnemonics
{
+ // z80
zADC ,zADD ,zAND ,zBIT ,zCALL ,zCCF ,zCP ,zCPD ,
zCPDR ,zCPI ,zCPIR ,zCPL ,zDAA ,zDB ,zDEC ,zDI ,
zDJNZ ,zEI ,zEX ,zEXX ,zHLT ,zIM ,zIN ,zINC ,
@@ -39,6 +40,12 @@ protected:
zRETN ,zRL ,zRLA ,zRLC ,zRLCA ,zRLD ,zRR ,zRRA ,
zRRC ,zRRCA ,zRRD ,zRST ,zSBC ,zSCF ,zSET ,zSLA ,
zSLL ,zSRA ,zSRL ,zSUB ,zXOR
+
+ // z80n
+ ,zSWAP ,zMIRR ,zTEST ,
+ zBSLA ,zBSRA ,zBSRL ,zBSRF ,zBRLC ,zMUL ,zOTIB ,zNREG ,
+ zPXDN ,zPXAD ,zSTAE ,zLDIX ,zLDWS ,zLDDX ,zLIRX ,zLPRX ,
+ zLDRX
};
static inline char sign(s8 offset);
@@ -51,6 +58,7 @@ protected:
static const z80dasm mnemonic_xx[256];
static const z80dasm mnemonic_main[256];
+ virtual const z80dasm &get_mnemonic_ed(u8 opcode) { return mnemonic_ed[opcode]; }
};
#endif
diff --git a/src/devices/cpu/z80/z80make.py b/src/devices/cpu/z80/z80make.py
new file mode 100644
index 00000000000..c1c75d12fb6
--- /dev/null
+++ b/src/devices/cpu/z80/z80make.py
@@ -0,0 +1,351 @@
+#!/usr/bin/python
+# license:BSD-3-Clause
+# copyright-holders:Andre I. Holub
+from __future__ import print_function
+
+USAGE = """
+Usage:
+%s [type] z80.lst z80.inc
+"""
+import sys
+
+class IndStr:
+ def __init__(self, src, indent = None):
+ self.str = src.strip()
+ self.indent = indent
+ if not indent:
+ self.indent = src[:len(src) - len(src.lstrip())]
+
+ def line(self):
+ return self.str
+
+ def get_indent(self):
+ return self.indent
+
+ def is_comment(self):
+ return self.str.startswith("#") and not self.str.startswith("#if") and not self.str.startswith("#endif")
+
+ def is_blank(self):
+ return not self.str
+
+ def has_indent(self):
+ return self.indent != '' or self.str[0] == "{" or self.str[0] == "}"
+
+ def strip_indent(self, n):
+ if self.indent != '':
+ self.indent = self.indent[n:]
+
+ def replace(self, new):
+ self.str = new
+
+ def replace(self, old, new):
+ return IndStr(self.str.replace(old, new), self.indent)
+
+ def with_str(self, new_str):
+ return IndStr(new_str, self.indent)
+
+ def split(self):
+ return self.str.split()
+
+ def print(self, str, f):
+ print("\t\t%s%s" % (self.indent, str), file=f)
+
+
+
+class Opcode:
+ def __init__(self, prefix, code):
+ self.prefix = prefix
+ self.code = code
+ self.source = []
+
+ def add_source_lines(self, lines):
+ self.source.extend(lines)
+
+ def with_steps(self):
+ for i in range(0, len(self.source)):
+ tokens = self.source[i].line().split()
+ if (tokens[0] == '+') or (len(tokens) > 2 and tokens[1] == "!!"):
+ return True
+ return False
+
+ def save_dasm(self, step_switch: bool, f):
+ has_steps = self.with_steps()
+ if has_steps:
+ if step_switch:
+ print("\t\tswitch (u8(m_ref))", file=f)
+ print("\t\t{", file=f)
+ print("\t\tcase 0x00:", file=f)
+ else:
+ print("\t\t//case 0x00:", file=f)
+ step = 0
+ for i in range(0, len(self.source)):
+ il = self.source[i]
+ if not has_steps or not step_switch:
+ il.strip_indent(1)
+ line = il.line()
+ tokens = line.split()
+ last_line = i + 1 == len(self.source)
+
+ if tokens[0] == '+':
+ il.print("m_icount -= %s;" % (" ".join(tokens[1:])), f)
+ step += 1
+ il.print("if (m_icount <= 0) {", f)
+ if not last_line:
+ to_step = hex(256 + step)[3:]
+ il.print(" m_ref = 0x%s%s%s;" % (self.prefix, self.code, to_step), f)
+ il.print(" return;", f)
+ il.print("}", f)
+ if step_switch:
+ il.print("[[fallthrough]];", f)
+ print("\t\tcase 0x%s:" % (to_step), file=f)
+ else:
+ print("\t\t//case 0x%s:" % (to_step), file=f)
+ else:
+ il.print(" m_ref = 0xffff00;", f)
+ il.print(" return;", f)
+ il.print("}", f)
+ elif (len(tokens) > 2 and tokens[1] == "!!"):
+ step += 1;
+ if step_switch:
+ il.print("[[fallthrough]];", f)
+ print("\t\tcase 0x%s:" % (hex(256 + step)[3:]), file=f)
+ else:
+ print("\t\t//case 0x%s:" % (hex(256 + step)[3:]), file=f)
+ il.print("%s" % " ".join(tokens[2:]), f)
+ il.print("m_icount -= %s;" % (tokens[0]), f)
+ il.print("if (m_icount <= 0) {", f)
+ il.print(" if (access_to_be_redone()) {", f)
+ il.print(" m_icount += %s;" % (tokens[0]), f)
+ il.print(" m_ref = 0x%s%s%s;" % (self.prefix, self.code, hex(256 + step)[3:]), f)
+ il.print(" } else {", f)
+ if not last_line:
+ step += 1
+ to_step = hex(256 + step)[3:]
+ il.print(" m_ref = 0x%s%s%s;" % (self.prefix, self.code, to_step), f)
+ il.print(" }", f)
+ il.print(" return;", f)
+ il.print("}", f)
+ if step_switch:
+ il.print("[[fallthrough]];", f)
+ print("\t\tcase 0x%s:" % (to_step), file=f)
+ else:
+ print("\t\t//case 0x%s:" % (to_step), file=f)
+ else:
+ il.print(" m_ref = 0xffff00;", f)
+ il.print(" }", f)
+ il.print(" return;", f)
+ il.print("}", f)
+ else:
+ il.print("%s" % line, f)
+ if has_steps and step_switch:
+ print("\t\t}", file=f)
+
+class Macro:
+ def __init__(self, name, arg_name = None):
+ self.name = name
+ self.source = []
+ self.arg_name = arg_name
+
+ def apply(self, arg):
+ if self.arg_name is not None:
+ return [ r.replace(self.arg_name, arg) for r in self.source ]
+ else:
+ return self.source
+
+ def add_source_lines(self, lines):
+ self.source.extend(lines)
+
+class OpcodeList:
+ def __init__(self, gen, fname):
+ self.gen = gen
+ self.opcode_info = {} # prefix -> [Opcode]
+ self.macros = {}
+
+ try:
+ f = open(fname, "r")
+ except Exception:
+ err = sys.exc_info()[1]
+ sys.stderr.write("Cannot read opcodes file %s [%s]\n" % (fname, err))
+ sys.exit(1)
+
+ inf = None
+ for ln in f:
+ line = IndStr(ln)
+ # Skip comments except macros
+ if line.is_comment() or line.is_blank():
+ continue
+ if line.has_indent():
+ if inf is not None:
+ if isinstance(inf, Macro):
+ inf.add_source_lines([line])
+ else:
+ inf.add_source_lines(self.pre_process(line))
+ else:
+ # New opcode
+ tokens = line.split()
+ if tokens[0] == "macro":
+ arg_name = None
+ if len(tokens) > 2:
+ arg_name = tokens[2]
+ nnames = tokens[1].split(":")
+ if len(nnames) == 2:
+ inf = Macro(nnames[1], arg_name)
+ if nnames[0] == self.gen:
+ self.macros[nnames[1]] = inf
+ else:
+ inf = Macro(nnames[0], arg_name)
+ if None == self.gen:
+ if nnames[0] in self.macros:
+ sys.stderr.write("Replacing macro: %s\n" % nnames[0])
+ self.macros[nnames[0]] = inf
+ else:
+ if not nnames[0] in self.macros:
+ self.macros[nnames[0]] = inf
+ else:
+ ntokens = tokens[0].split(":")
+ gen = None if len(ntokens) == 1 else ntokens[0]
+ prefix = ntokens[0][:2] if len(ntokens) == 1 else ntokens[1][:2]
+ opcode = ntokens[0][2:] if len(ntokens) == 1 else ntokens[1][2:]
+ if self.opcode_info.get(prefix) is None:
+ self.opcode_info[prefix] = []
+ opcodes = self.opcode_info[prefix]
+
+ if None == gen:
+ inf = Opcode(prefix, opcode)
+ opcodes.append(inf)
+ elif gen == self.gen:
+ # Replace for ext generator
+ found = False
+ found_index = 0
+ for i in range(len(opcodes)):
+ if opcodes[i].code == opcode:
+ found = True
+ found_index = i
+ if found:
+ inf = Opcode(prefix, opcode)
+ opcodes[found_index] = inf
+ else:
+ sys.stderr.write("[%s] Cannot find opcode: %s%s\n" % (gen, prefix, opcode))
+ sys.exit(1)
+ else:
+ inf = Opcode(prefix, '/dev/null')
+
+ def pre_process(self, iline):
+ out = []
+ line = iline.str
+ line_toc = line.split()
+ times = 1
+ if len(line_toc) > 2 and line_toc[1] == "*":
+ times = int(line_toc[0])
+ line_toc = line_toc[2:]
+ line = " ".join(line_toc)
+ for i in range(times):
+ if line_toc[0].startswith('@'):
+ name = line_toc[0][1:]
+ arg = None
+ if len(line_toc) > 1:
+ arg = " ".join(line_toc[1:])
+ if name in self.macros:
+ macro = self.macros[name]
+ ([out.extend(self.pre_process(il)) for il in macro.apply(arg)])
+ else:
+ sys.stderr.write("Macro not found %s\n" % name)
+ out.append(iline.with_str("... %s" % name))
+ else:
+ out.append(iline.with_str(line))
+ return out
+
+ def switch_prefix(self, prefixes, reenter: bool, f):
+ prefix_switch = len(prefixes) > 1
+
+ if prefix_switch:
+ print("switch (u8(m_ref >> 16)) // prefix", file=f)
+ print("{", file=f)
+
+ for prefix in sorted(prefixes):
+ is_rop = prefix == 'ff'
+ opc_switch = not is_rop
+ if prefix_switch:
+ print("case 0x%s:" % (prefix), file=f)
+ print("{", file=f)
+ if opc_switch:
+ print("\tswitch (u8(m_ref >> 8)) // opcode", file=f)
+ print("\t{", file=f)
+ for opc in self.opcode_info[prefix]:
+ # reenter loop only process steps > 0
+ if not reenter or opc.with_steps():
+ if opc_switch:
+ print("\tcase 0x%s:" % (opc.code), file=f)
+ opc.save_dasm(step_switch=reenter, f=f)
+ print("\t\tcontinue;", file=f)
+ print("", file=f)
+ if opc_switch:
+ print("\t}", file=f)
+
+ if prefix_switch:
+ print("} break; // prefix: %s" % (prefix), file=f)
+ print("", file=f)
+ if prefix_switch:
+ print("} // switch prefix", file=f)
+
+ def save_exec(self, f):
+ print("if (m_wait_state)", file=f)
+ print("{", file=f)
+ print("\tm_icount = 0; // stalled", file=f)
+ print("\treturn;", file=f)
+ print("}", file=f)
+ print("", file=f)
+ print("const bool nomemrq_en = !m_nomreq_cb.isunset();", file=f)
+ print("[[maybe_unused]] const bool refresh_en = !m_refresh_cb.isunset();", file=f)
+ print("", file=f)
+ print("bool interrupted = true;", file=f)
+ print("while (u8(m_ref) != 0x00) {", file=f)
+ print("// slow re-enter", file=f)
+ print("\t// workaround to simulate main loop behavior where continue statement relays on having it set after", file=f)
+ print("\tif (!interrupted) {", file=f)
+ print("\t\tm_ref = 0xffff00;", file=f)
+ print("\t\tcontinue;", file=f)
+ print("\t}", file=f)
+ print("\tinterrupted = false;", file=f)
+ print("", file=f)
+ self.switch_prefix(self.opcode_info.keys(), reenter=True, f=f)
+ print("", file=f)
+ print('assert((void("switch statement above must cover all possible cases!"), false));', file=f)
+ print("} // end: slow", file=f)
+ print("if (m_ref != 0xffff00) goto process;", file=f)
+ print("", file=f)
+ print("while (true) { // fast process", file=f)
+ print("\t\t// rop: unwrapped ff prefix", file=f)
+ self.switch_prefix(['ff'], reenter=False, f=f)
+ print("", file=f)
+ print("process:", file=f)
+ self.switch_prefix(self.opcode_info.keys() - ['ff'], reenter=False, f=f)
+ print("} // end: fast", file=f)
+ print('assert((void("unreachable!"), false));', file=f)
+
+def main(argv):
+ if len(argv) != 3 and len(argv) != 4:
+ print(USAGE % argv[0])
+ return 1
+
+ fidx = 1
+ gen = None
+ if len(argv) == 4:
+ gen = argv[1]
+ fidx = 2
+
+ opcodes = OpcodeList(gen, argv[fidx])
+
+ try:
+ f = open(argv[fidx + 1], "w")
+ except Exception:
+ err = sys.exc_info()[fidx]
+ sys.stderr.write("cannot write file %s [%s]\n" % (argv[fidx + 1], err))
+ sys.exit(1)
+
+ opcodes.save_exec(f)
+ f.close()
+
+# ======================================================================
+if __name__ == "__main__":
+ sys.exit(main(sys.argv))
diff --git a/src/devices/cpu/z80/z80n.cpp b/src/devices/cpu/z80/z80n.cpp
new file mode 100644
index 00000000000..52e804d69d1
--- /dev/null
+++ b/src/devices/cpu/z80/z80n.cpp
@@ -0,0 +1,49 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+/***************************************************************************
+ Z80N
+***************************************************************************/
+
+#include "emu.h"
+#include "z80n.h"
+#include "z80ndasm.h"
+
+#include "z80.inc"
+
+#define LOG_INT (1U << 1) // z80.lst
+
+//#define VERBOSE (LOG_INT)
+#include "logmacro.h"
+
+
+DEFINE_DEVICE_TYPE(Z80N, z80n_device, "z80n", "Z80N")
+
+std::unique_ptr<util::disasm_interface> z80n_device::create_disassembler()
+{
+ return std::make_unique<z80n_disassembler>();
+}
+
+z80n_device::z80n_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : z80_device(mconfig, Z80N, tag, owner, clock)
+ , m_out_retn_seen_cb(*this)
+ , m_in_nextreg_cb(*this, 0)
+ , m_out_nextreg_cb(*this)
+{
+}
+
+void z80n_device::execute_run()
+{
+ #include "cpu/z80/z80n.hxx"
+}
+
+void z80n_device::device_start()
+{
+ z80_device::device_start();
+ save_item(NAME(m_stackless));
+}
+
+void z80n_device::device_reset()
+{
+ z80_device::device_reset();
+ m_stackless = 0;
+}
diff --git a/src/devices/cpu/z80/z80n.h b/src/devices/cpu/z80/z80n.h
new file mode 100644
index 00000000000..d4d452955fd
--- /dev/null
+++ b/src/devices/cpu/z80/z80n.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:Andrei I. Holub
+#ifndef MAME_CPU_Z80_Z80N_H
+#define MAME_CPU_Z80_Z80N_H
+
+#pragma once
+
+#include "z80.h"
+
+class z80n_device : public z80_device
+{
+public:
+ // construction/destruction
+ z80n_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ auto in_nextreg_cb() { return m_in_nextreg_cb.bind(); }
+ auto out_nextreg_cb() { return m_out_nextreg_cb.bind(); }
+ auto out_retn_seen_cb() { return m_out_retn_seen_cb.bind(); }
+
+ bool nmi_stackless_r() { return m_stackless; }
+ void nmi_stackless_w(bool data) { m_stackless = data; }
+
+ void nmi() { set_service_attention<SA_NMI_PENDING, 1>(); }
+
+protected:
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
+
+ // device_execute_interface implementation
+ virtual void execute_run() override;
+
+ devcb_write8 m_out_retn_seen_cb;
+ devcb_read8 m_in_nextreg_cb;
+ devcb_write8 m_out_nextreg_cb;
+
+ virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
+
+private:
+ bool m_stackless;
+
+};
+
+DECLARE_DEVICE_TYPE(Z80N, z80n_device)
+
+#endif // MAME_CPU_Z80_Z80N_H
diff --git a/src/devices/cpu/z80/z80ndasm.cpp b/src/devices/cpu/z80/z80ndasm.cpp
new file mode 100644
index 00000000000..ccf5be7ef98
--- /dev/null
+++ b/src/devices/cpu/z80/z80ndasm.cpp
@@ -0,0 +1,77 @@
+// license:BSD-3-Clause
+/*****************************************************************************
+ *
+ * Z80N disassembler
+ *
+ *****************************************************************************/
+
+#include "emu.h"
+#include "z80ndasm.h"
+
+const z80_disassembler::z80dasm z80n_disassembler::mnemonic_ed_n[256] =
+{
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zSWAP,nullptr},
+ {zMIRR,nullptr},{zDB,"?"}, {zDB,"?"}, {zTEST,"B"},
+ {zBSLA,"de,b"}, {zBSRA,"de,b"}, {zBSRL,"de,b"}, {zBSRF,"de,b"},
+ {zBRLC,"de,b"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zMUL,"d,e"}, {zADD,"hl,a"}, {zADD,"de,a"}, {zADD,"bc,a"},
+ {zADD,"hl,W"}, {zADD,"de,W"}, {zADD,"bc,W"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zIN,"b,(c)"}, {zOUT,"(c),b"}, {zSBC,"hl,bc"}, {zLD,"(W),bc"},
+ {zNEG,nullptr}, {zRETN,nullptr},{zIM,"0"}, {zLD,"i,a"},
+ {zIN,"c,(c)"}, {zOUT,"(c),c"}, {zADC,"hl,bc"}, {zLD,"bc,(W)"},
+ {zNEG,"*"}, {zRETI,nullptr},{zIM,"0"}, {zLD,"r,a"},
+ {zIN,"d,(c)"}, {zOUT,"(c),d"}, {zSBC,"hl,de"}, {zLD,"(W),de"},
+ {zNEG,"*"}, {zRETN,nullptr},{zIM,"1"}, {zLD,"a,i"},
+ {zIN,"e,(c)"}, {zOUT,"(c),e"}, {zADC,"hl,de"}, {zLD,"de,(W)"},
+ {zNEG,"*"}, {zRETI,nullptr},{zIM,"2"}, {zLD,"a,r"},
+ {zIN,"h,(c)"}, {zOUT,"(c),h"}, {zSBC,"hl,hl"}, {zLD,"(W),hl"},
+ {zNEG,"*"}, {zRETN,nullptr},{zIM,"0"}, {zRRD,"(hl)"},
+ {zIN,"l,(c)"}, {zOUT,"(c),l"}, {zADC,"hl,hl"}, {zLD,"hl,(W)"},
+ {zNEG,"*"}, {zRETI,nullptr},{zIM,"0"}, {zRLD,"(hl)"},
+ {zIN,"0,(c)"}, {zOUT,"(c),0"}, {zSBC,"hl,sp"}, {zLD,"(W),sp"},
+ {zNEG,"*"}, {zRETN,nullptr},{zIM,"1"}, {zDB,"?"},
+ {zIN,"a,(c)"}, {zOUT,"(c),a"}, {zADC,"hl,sp"}, {zLD,"sp,(W)"},
+ {zNEG,"*"}, {zRETI,nullptr},{zIM,"2"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zPUSH,"B,B"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zOTIB,nullptr},{zNREG,"B,B"}, {zNREG,"B,a"}, {zPXDN,nullptr},
+ {zPXAD,nullptr},{zSTAE,nullptr},{zDB,"?"}, {zDB,"?"},
+ {zJP,"(c)"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLDI,nullptr}, {zCPI,nullptr}, {zINI,nullptr}, {zOUTI,nullptr},
+ {zLDIX,nullptr},{zLDWS,nullptr},{zDB,"?"}, {zDB,"?"},
+ {zLDD,nullptr}, {zCPD,nullptr}, {zIND,nullptr}, {zOUTD,nullptr},
+ {zLDDX,nullptr},{zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zLDIR,nullptr},{zCPIR,nullptr},{zINIR,nullptr},{zOTIR,nullptr},
+ {zLIRX,nullptr},{zDB,"?"}, {zDB,"?"}, {zLPRX,nullptr},
+ {zLDDR,nullptr},{zCPDR,nullptr},{zINDR,nullptr},{zOTDR,nullptr},
+ {zLDRX,nullptr},{zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"},
+ {zDB,"?"}, {zDB,"?"}, {zDB,"?"}, {zDB,"?"}
+};
diff --git a/src/devices/cpu/z80/z80ndasm.h b/src/devices/cpu/z80/z80ndasm.h
new file mode 100644
index 00000000000..7ae021ced93
--- /dev/null
+++ b/src/devices/cpu/z80/z80ndasm.h
@@ -0,0 +1,23 @@
+// license:BSD-3-Clause
+/*****************************************************************************
+ *
+ * Z80N disassembler
+ *
+ *****************************************************************************/
+
+#ifndef MAME_CPU_Z80_Z80NDASM_H
+#define MAME_CPU_Z80_Z80NDASM_H
+
+#pragma once
+
+#include "z80dasm.h"
+
+class z80n_disassembler : public z80_disassembler
+{
+protected:
+ static const z80dasm mnemonic_ed_n[256];
+
+ virtual const z80dasm &get_mnemonic_ed(u8 opcode) override { return mnemonic_ed_n[opcode]; }
+};
+
+#endif
diff --git a/src/devices/cpu/z80/z84c015.cpp b/src/devices/cpu/z80/z84c015.cpp
index 66807a920a6..60108e15c0d 100644
--- a/src/devices/cpu/z80/z84c015.cpp
+++ b/src/devices/cpu/z80/z84c015.cpp
@@ -9,6 +9,8 @@
#include "emu.h"
#include "z84c015.h"
+#include "z80.inc"
+
DEFINE_DEVICE_TYPE(Z84C015, z84c015_device, "z84c015", "Zilog Z84C015")
void z84c015_device::internal_io_map(address_map &map) const
@@ -60,6 +62,26 @@ u32 z84c015_device::translate_memory_address(u16 addr)
? 0x20000 : 0) | addr;
}
+u8 z84c015_device::data_read(u16 addr)
+{
+ return m_data.read_interruptible(translate_memory_address(addr));
+}
+
+void z84c015_device::data_write(u16 addr, u8 value)
+{
+ m_data.write_interruptible(translate_memory_address(addr), value);
+}
+
+u8 z84c015_device::opcode_read()
+{
+ return m_opcodes.read_byte(translate_memory_address(PC));
+}
+
+u8 z84c015_device::arg_read()
+{
+ return m_args.read_byte(translate_memory_address(PC));
+}
+
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
diff --git a/src/devices/cpu/z80/z84c015.h b/src/devices/cpu/z80/z84c015.h
index 0e5c71cb11c..0b5261cba34 100644
--- a/src/devices/cpu/z80/z84c015.h
+++ b/src/devices/cpu/z80/z84c015.h
@@ -32,7 +32,7 @@ public:
protected:
// device-level overrides
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
const address_space_config m_program_space_config;
const address_space_config m_opcodes_space_config;
@@ -40,9 +40,15 @@ protected:
void internal_io_map(address_map &map) const;
virtual space_config_vector memory_space_config() const override;
virtual bool memory_translate(int spacenum, int intention, offs_t &address, address_space *&target_space) override;
- virtual u32 translate_memory_address(u16 address) override;
+
+ u8 data_read(u16 addr) override;
+ void data_write(u16 addr, u8 value) override;
+ u8 opcode_read() override;
+ u8 arg_read() override;
private:
+ u32 translate_memory_address(u16 address);
+
// system control registers
u8 m_scrp;
u8 m_wcr;
diff --git a/src/devices/cpu/z8000/z8000.cpp b/src/devices/cpu/z8000/z8000.cpp
index 8cfe08c72ec..5ec71cbcf22 100644
--- a/src/devices/cpu/z8000/z8000.cpp
+++ b/src/devices/cpu/z8000/z8000.cpp
@@ -637,6 +637,7 @@ void z8002_device::execute_run()
if (m_halt)
{
+ debugger_wait_hook();
m_icount = 0;
}
else
diff --git a/src/devices/cpu/z8000/z8000.h b/src/devices/cpu/z8000/z8000.h
index 3f4900788a6..c8ba14a9157 100644
--- a/src/devices/cpu/z8000/z8000.h
+++ b/src/devices/cpu/z8000/z8000.h
@@ -90,13 +90,12 @@ protected:
z8002_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int addrbits, int vecmult);
// device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// device_execute_interface overrides
virtual uint32_t execute_min_cycles() const noexcept override { return 2; }
virtual uint32_t execute_max_cycles() const noexcept override { return 744; }
- virtual uint32_t execute_input_lines() const noexcept override { return 2; }
virtual uint32_t execute_default_irq_vector(int inputnum) const noexcept override { return 0xff; }
virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return inputnum == INPUT_LINE_NMI; }
virtual void execute_run() override;